diff options
Diffstat (limited to 'drivers/net')
67 files changed, 1326 insertions, 781 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5ff0922e628c..a3d46ea37126 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -2263,6 +2263,7 @@ config GIANFAR | |||
2263 | tristate "Gianfar Ethernet" | 2263 | tristate "Gianfar Ethernet" |
2264 | depends on 85xx || 83xx || PPC_86xx | 2264 | depends on 85xx || 83xx || PPC_86xx |
2265 | select PHYLIB | 2265 | select PHYLIB |
2266 | select CRC32 | ||
2266 | help | 2267 | help |
2267 | This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx, | 2268 | This driver supports the Gigabit TSEC on the MPC83xx, MPC85xx, |
2268 | and MPC86xx family of chips, and the FEC on the 8540. | 2269 | and MPC86xx family of chips, and the FEC on the 8540. |
@@ -2372,22 +2373,23 @@ config CHELSIO_T1_NAPI | |||
2372 | when the driver is receiving lots of packets from the card. | 2373 | when the driver is receiving lots of packets from the card. |
2373 | 2374 | ||
2374 | config CHELSIO_T3 | 2375 | config CHELSIO_T3 |
2375 | tristate "Chelsio Communications T3 10Gb Ethernet support" | 2376 | tristate "Chelsio Communications T3 10Gb Ethernet support" |
2376 | depends on PCI | 2377 | depends on PCI |
2377 | help | 2378 | select FW_LOADER |
2378 | This driver supports Chelsio T3-based gigabit and 10Gb Ethernet | 2379 | help |
2379 | adapters. | 2380 | This driver supports Chelsio T3-based gigabit and 10Gb Ethernet |
2381 | adapters. | ||
2380 | 2382 | ||
2381 | For general information about Chelsio and our products, visit | 2383 | For general information about Chelsio and our products, visit |
2382 | our website at <http://www.chelsio.com>. | 2384 | our website at <http://www.chelsio.com>. |
2383 | 2385 | ||
2384 | For customer support, please visit our customer support page at | 2386 | For customer support, please visit our customer support page at |
2385 | <http://www.chelsio.com/support.htm>. | 2387 | <http://www.chelsio.com/support.htm>. |
2386 | 2388 | ||
2387 | Please send feedback to <linux-bugs@chelsio.com>. | 2389 | Please send feedback to <linux-bugs@chelsio.com>. |
2388 | 2390 | ||
2389 | To compile this driver as a module, choose M here: the module | 2391 | To compile this driver as a module, choose M here: the module |
2390 | will be called cxgb3. | 2392 | will be called cxgb3. |
2391 | 2393 | ||
2392 | config EHEA | 2394 | config EHEA |
2393 | tristate "eHEA Ethernet support" | 2395 | tristate "eHEA Ethernet support" |
diff --git a/drivers/net/atl1/atl1_hw.c b/drivers/net/atl1/atl1_hw.c index 314dbaabb642..69482e0d849b 100644 --- a/drivers/net/atl1/atl1_hw.c +++ b/drivers/net/atl1/atl1_hw.c | |||
@@ -334,7 +334,6 @@ u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr) | |||
334 | int i; | 334 | int i; |
335 | 335 | ||
336 | crc32 = ether_crc_le(6, mc_addr); | 336 | crc32 = ether_crc_le(6, mc_addr); |
337 | crc32 = ~crc32; | ||
338 | for (i = 0; i < 32; i++) | 337 | for (i = 0; i < 32; i++) |
339 | value |= (((crc32 >> i) & 1) << (31 - i)); | 338 | value |= (((crc32 >> i) & 1) << (31 - i)); |
340 | 339 | ||
diff --git a/drivers/net/atl1/atl1_main.c b/drivers/net/atl1/atl1_main.c index 88d4f70035bb..8606eac5bec8 100644 --- a/drivers/net/atl1/atl1_main.c +++ b/drivers/net/atl1/atl1_main.c | |||
@@ -1328,7 +1328,7 @@ static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb, | |||
1328 | 1328 | ||
1329 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { | 1329 | if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { |
1330 | cso = skb->h.raw - skb->data; | 1330 | cso = skb->h.raw - skb->data; |
1331 | css = (skb->h.raw + skb->csum) - skb->data; | 1331 | css = (skb->h.raw + skb->csum_offset) - skb->data; |
1332 | if (unlikely(cso & 0x1)) { | 1332 | if (unlikely(cso & 0x1)) { |
1333 | printk(KERN_DEBUG "%s: payload offset != even number\n", | 1333 | printk(KERN_DEBUG "%s: payload offset != even number\n", |
1334 | atl1_driver_name); | 1334 | atl1_driver_name); |
@@ -1562,7 +1562,7 @@ static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
1562 | /* mss will be nonzero if we're doing segment offload (TSO/GSO) */ | 1562 | /* mss will be nonzero if we're doing segment offload (TSO/GSO) */ |
1563 | mss = skb_shinfo(skb)->gso_size; | 1563 | mss = skb_shinfo(skb)->gso_size; |
1564 | if (mss) { | 1564 | if (mss) { |
1565 | if (skb->protocol == ntohs(ETH_P_IP)) { | 1565 | if (skb->protocol == htons(ETH_P_IP)) { |
1566 | proto_hdr_len = ((skb->h.raw - skb->data) + | 1566 | proto_hdr_len = ((skb->h.raw - skb->data) + |
1567 | (skb->h.th->doff << 2)); | 1567 | (skb->h.th->doff << 2)); |
1568 | if (unlikely(proto_hdr_len > len)) { | 1568 | if (unlikely(proto_hdr_len > len)) { |
@@ -2320,6 +2320,16 @@ static void __devexit atl1_remove(struct pci_dev *pdev) | |||
2320 | return; | 2320 | return; |
2321 | 2321 | ||
2322 | adapter = netdev_priv(netdev); | 2322 | adapter = netdev_priv(netdev); |
2323 | |||
2324 | /* Some atl1 boards lack persistent storage for their MAC, and get it | ||
2325 | * from the BIOS during POST. If we've been messing with the MAC | ||
2326 | * address, we need to save the permanent one. | ||
2327 | */ | ||
2328 | if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) { | ||
2329 | memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN); | ||
2330 | atl1_set_mac_addr(&adapter->hw); | ||
2331 | } | ||
2332 | |||
2323 | iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE); | 2333 | iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE); |
2324 | unregister_netdev(netdev); | 2334 | unregister_netdev(netdev); |
2325 | pci_iounmap(pdev, adapter->hw.hw_addr); | 2335 | pci_iounmap(pdev, adapter->hw.hw_addr); |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index aaada572732a..d742bfe24471 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -1709,7 +1709,7 @@ static void __b44_set_rx_mode(struct net_device *dev) | |||
1709 | bw32(bp, B44_RXCONFIG, val); | 1709 | bw32(bp, B44_RXCONFIG, val); |
1710 | } else { | 1710 | } else { |
1711 | unsigned char zero[6] = {0, 0, 0, 0, 0, 0}; | 1711 | unsigned char zero[6] = {0, 0, 0, 0, 0, 0}; |
1712 | int i = 0; | 1712 | int i = 1; |
1713 | 1713 | ||
1714 | __b44_set_mac_addr(bp); | 1714 | __b44_set_mac_addr(bp); |
1715 | 1715 | ||
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index c12e5ea61819..e85f5ec48f96 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c | |||
@@ -54,8 +54,8 @@ | |||
54 | 54 | ||
55 | #define DRV_MODULE_NAME "bnx2" | 55 | #define DRV_MODULE_NAME "bnx2" |
56 | #define PFX DRV_MODULE_NAME ": " | 56 | #define PFX DRV_MODULE_NAME ": " |
57 | #define DRV_MODULE_VERSION "1.5.5" | 57 | #define DRV_MODULE_VERSION "1.5.8" |
58 | #define DRV_MODULE_RELDATE "February 1, 2007" | 58 | #define DRV_MODULE_RELDATE "April 24, 2007" |
59 | 59 | ||
60 | #define RUN_AT(x) (jiffies + (x)) | 60 | #define RUN_AT(x) (jiffies + (x)) |
61 | 61 | ||
@@ -2033,8 +2033,8 @@ bnx2_has_work(struct bnx2 *bp) | |||
2033 | (sblk->status_tx_quick_consumer_index0 != bp->hw_tx_cons)) | 2033 | (sblk->status_tx_quick_consumer_index0 != bp->hw_tx_cons)) |
2034 | return 1; | 2034 | return 1; |
2035 | 2035 | ||
2036 | if (((sblk->status_attn_bits & STATUS_ATTN_BITS_LINK_STATE) != 0) != | 2036 | if ((sblk->status_attn_bits & STATUS_ATTN_BITS_LINK_STATE) != |
2037 | bp->link_up) | 2037 | (sblk->status_attn_bits_ack & STATUS_ATTN_BITS_LINK_STATE)) |
2038 | return 1; | 2038 | return 1; |
2039 | 2039 | ||
2040 | return 0; | 2040 | return 0; |
@@ -3099,20 +3099,18 @@ bnx2_nvram_write(struct bnx2 *bp, u32 offset, u8 *data_buf, | |||
3099 | 3099 | ||
3100 | if ((align_start = (offset32 & 3))) { | 3100 | if ((align_start = (offset32 & 3))) { |
3101 | offset32 &= ~3; | 3101 | offset32 &= ~3; |
3102 | len32 += (4 - align_start); | 3102 | len32 += align_start; |
3103 | if (len32 < 4) | ||
3104 | len32 = 4; | ||
3103 | if ((rc = bnx2_nvram_read(bp, offset32, start, 4))) | 3105 | if ((rc = bnx2_nvram_read(bp, offset32, start, 4))) |
3104 | return rc; | 3106 | return rc; |
3105 | } | 3107 | } |
3106 | 3108 | ||
3107 | if (len32 & 3) { | 3109 | if (len32 & 3) { |
3108 | if ((len32 > 4) || !align_start) { | 3110 | align_end = 4 - (len32 & 3); |
3109 | align_end = 4 - (len32 & 3); | 3111 | len32 += align_end; |
3110 | len32 += align_end; | 3112 | if ((rc = bnx2_nvram_read(bp, offset32 + len32 - 4, end, 4))) |
3111 | if ((rc = bnx2_nvram_read(bp, offset32 + len32 - 4, | 3113 | return rc; |
3112 | end, 4))) { | ||
3113 | return rc; | ||
3114 | } | ||
3115 | } | ||
3116 | } | 3114 | } |
3117 | 3115 | ||
3118 | if (align_start || align_end) { | 3116 | if (align_start || align_end) { |
@@ -3187,17 +3185,17 @@ bnx2_nvram_write(struct bnx2 *bp, u32 offset, u8 *data_buf, | |||
3187 | if ((rc = bnx2_enable_nvram_write(bp)) != 0) | 3185 | if ((rc = bnx2_enable_nvram_write(bp)) != 0) |
3188 | goto nvram_write_end; | 3186 | goto nvram_write_end; |
3189 | 3187 | ||
3190 | /* Erase the page */ | ||
3191 | if ((rc = bnx2_nvram_erase_page(bp, page_start)) != 0) | ||
3192 | goto nvram_write_end; | ||
3193 | |||
3194 | /* Re-enable the write again for the actual write */ | ||
3195 | bnx2_enable_nvram_write(bp); | ||
3196 | |||
3197 | /* Loop to write back the buffer data from page_start to | 3188 | /* Loop to write back the buffer data from page_start to |
3198 | * data_start */ | 3189 | * data_start */ |
3199 | i = 0; | 3190 | i = 0; |
3200 | if (bp->flash_info->buffered == 0) { | 3191 | if (bp->flash_info->buffered == 0) { |
3192 | /* Erase the page */ | ||
3193 | if ((rc = bnx2_nvram_erase_page(bp, page_start)) != 0) | ||
3194 | goto nvram_write_end; | ||
3195 | |||
3196 | /* Re-enable the write again for the actual write */ | ||
3197 | bnx2_enable_nvram_write(bp); | ||
3198 | |||
3201 | for (addr = page_start; addr < data_start; | 3199 | for (addr = page_start; addr < data_start; |
3202 | addr += 4, i += 4) { | 3200 | addr += 4, i += 4) { |
3203 | 3201 | ||
@@ -3423,6 +3421,9 @@ bnx2_init_chip(struct bnx2 *bp) | |||
3423 | val = REG_RD(bp, BNX2_MQ_CONFIG); | 3421 | val = REG_RD(bp, BNX2_MQ_CONFIG); |
3424 | val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE; | 3422 | val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE; |
3425 | val |= BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256; | 3423 | val |= BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE_256; |
3424 | if (CHIP_ID(bp) == CHIP_ID_5709_A0 || CHIP_ID(bp) == CHIP_ID_5709_A1) | ||
3425 | val |= BNX2_MQ_CONFIG_HALT_DIS; | ||
3426 | |||
3426 | REG_WR(bp, BNX2_MQ_CONFIG, val); | 3427 | REG_WR(bp, BNX2_MQ_CONFIG, val); |
3427 | 3428 | ||
3428 | val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE); | 3429 | val = 0x10000 + (MAX_CID_CNT * MB_KERNEL_CTX_SIZE); |
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index ccbdf81c6599..878eee58f12a 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -6518,6 +6518,7 @@ struct bnx2 { | |||
6518 | #define CHIP_ID_5708_B0 0x57081000 | 6518 | #define CHIP_ID_5708_B0 0x57081000 |
6519 | #define CHIP_ID_5708_B1 0x57081010 | 6519 | #define CHIP_ID_5708_B1 0x57081010 |
6520 | #define CHIP_ID_5709_A0 0x57090000 | 6520 | #define CHIP_ID_5709_A0 0x57090000 |
6521 | #define CHIP_ID_5709_A1 0x57090010 | ||
6521 | 6522 | ||
6522 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) | 6523 | #define CHIP_BOND_ID(bp) (((bp)->chip_id) & 0xf) |
6523 | 6524 | ||
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h index e23deeb7d06d..8d1379633698 100644 --- a/drivers/net/cxgb3/common.h +++ b/drivers/net/cxgb3/common.h | |||
@@ -112,8 +112,7 @@ enum { | |||
112 | }; | 112 | }; |
113 | 113 | ||
114 | enum { | 114 | enum { |
115 | SUPPORTED_OFFLOAD = 1 << 24, | 115 | SUPPORTED_IRQ = 1 << 24 |
116 | SUPPORTED_IRQ = 1 << 25 | ||
117 | }; | 116 | }; |
118 | 117 | ||
119 | enum { /* adapter interrupt-maintained statistics */ | 118 | enum { /* adapter interrupt-maintained statistics */ |
@@ -260,6 +259,10 @@ struct mac_stats { | |||
260 | unsigned long serdes_signal_loss; | 259 | unsigned long serdes_signal_loss; |
261 | unsigned long xaui_pcs_ctc_err; | 260 | unsigned long xaui_pcs_ctc_err; |
262 | unsigned long xaui_pcs_align_change; | 261 | unsigned long xaui_pcs_align_change; |
262 | |||
263 | unsigned long num_toggled; /* # times toggled TxEn due to stuck TX */ | ||
264 | unsigned long num_resets; /* # times reset due to stuck TX */ | ||
265 | |||
263 | }; | 266 | }; |
264 | 267 | ||
265 | struct tp_mib_stats { | 268 | struct tp_mib_stats { |
@@ -354,6 +357,9 @@ enum { | |||
354 | MC5_MODE_72_BIT = 2 | 357 | MC5_MODE_72_BIT = 2 |
355 | }; | 358 | }; |
356 | 359 | ||
360 | /* MC5 min active region size */ | ||
361 | enum { MC5_MIN_TIDS = 16 }; | ||
362 | |||
357 | struct vpd_params { | 363 | struct vpd_params { |
358 | unsigned int cclk; | 364 | unsigned int cclk; |
359 | unsigned int mclk; | 365 | unsigned int mclk; |
@@ -398,6 +404,13 @@ struct adapter_params { | |||
398 | unsigned int stats_update_period; /* MAC stats accumulation period */ | 404 | unsigned int stats_update_period; /* MAC stats accumulation period */ |
399 | unsigned int linkpoll_period; /* link poll period in 0.1s */ | 405 | unsigned int linkpoll_period; /* link poll period in 0.1s */ |
400 | unsigned int rev; /* chip revision */ | 406 | unsigned int rev; /* chip revision */ |
407 | unsigned int offload; | ||
408 | }; | ||
409 | |||
410 | enum { /* chip revisions */ | ||
411 | T3_REV_A = 0, | ||
412 | T3_REV_B = 2, | ||
413 | T3_REV_B2 = 3, | ||
401 | }; | 414 | }; |
402 | 415 | ||
403 | struct trace_params { | 416 | struct trace_params { |
@@ -465,6 +478,13 @@ struct cmac { | |||
465 | struct adapter *adapter; | 478 | struct adapter *adapter; |
466 | unsigned int offset; | 479 | unsigned int offset; |
467 | unsigned int nucast; /* # of address filters for unicast MACs */ | 480 | unsigned int nucast; /* # of address filters for unicast MACs */ |
481 | unsigned int tx_tcnt; | ||
482 | unsigned int tx_xcnt; | ||
483 | u64 tx_mcnt; | ||
484 | unsigned int rx_xcnt; | ||
485 | u64 rx_mcnt; | ||
486 | unsigned int toggle_cnt; | ||
487 | unsigned int txen; | ||
468 | struct mac_stats stats; | 488 | struct mac_stats stats; |
469 | }; | 489 | }; |
470 | 490 | ||
@@ -588,7 +608,7 @@ static inline int is_10G(const struct adapter *adap) | |||
588 | 608 | ||
589 | static inline int is_offload(const struct adapter *adap) | 609 | static inline int is_offload(const struct adapter *adap) |
590 | { | 610 | { |
591 | return adapter_info(adap)->caps & SUPPORTED_OFFLOAD; | 611 | return adap->params.offload; |
592 | } | 612 | } |
593 | 613 | ||
594 | static inline unsigned int core_ticks_per_usec(const struct adapter *adap) | 614 | static inline unsigned int core_ticks_per_usec(const struct adapter *adap) |
@@ -666,6 +686,7 @@ int t3_mac_set_address(struct cmac *mac, unsigned int idx, u8 addr[6]); | |||
666 | int t3_mac_set_num_ucast(struct cmac *mac, int n); | 686 | int t3_mac_set_num_ucast(struct cmac *mac, int n); |
667 | const struct mac_stats *t3_mac_update_stats(struct cmac *mac); | 687 | const struct mac_stats *t3_mac_update_stats(struct cmac *mac); |
668 | int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc); | 688 | int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc); |
689 | int t3b2_mac_watchdog_task(struct cmac *mac); | ||
669 | 690 | ||
670 | void t3_mc5_prep(struct adapter *adapter, struct mc5 *mc5, int mode); | 691 | void t3_mc5_prep(struct adapter *adapter, struct mc5 *mc5, int mode); |
671 | int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters, | 692 | int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters, |
diff --git a/drivers/net/cxgb3/cxgb3_defs.h b/drivers/net/cxgb3/cxgb3_defs.h index e14862b43d17..483a594210a7 100644 --- a/drivers/net/cxgb3/cxgb3_defs.h +++ b/drivers/net/cxgb3/cxgb3_defs.h | |||
@@ -67,7 +67,10 @@ static inline union listen_entry *stid2entry(const struct tid_info *t, | |||
67 | static inline struct t3c_tid_entry *lookup_tid(const struct tid_info *t, | 67 | static inline struct t3c_tid_entry *lookup_tid(const struct tid_info *t, |
68 | unsigned int tid) | 68 | unsigned int tid) |
69 | { | 69 | { |
70 | return tid < t->ntids ? &(t->tid_tab[tid]) : NULL; | 70 | struct t3c_tid_entry *t3c_tid = tid < t->ntids ? |
71 | &(t->tid_tab[tid]) : NULL; | ||
72 | |||
73 | return (t3c_tid && t3c_tid->client) ? t3c_tid : NULL; | ||
71 | } | 74 | } |
72 | 75 | ||
73 | /* | 76 | /* |
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index 7ff834e45d6b..67b4b219d927 100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/workqueue.h> | 42 | #include <linux/workqueue.h> |
43 | #include <linux/proc_fs.h> | 43 | #include <linux/proc_fs.h> |
44 | #include <linux/rtnetlink.h> | 44 | #include <linux/rtnetlink.h> |
45 | #include <linux/firmware.h> | ||
45 | #include <asm/uaccess.h> | 46 | #include <asm/uaccess.h> |
46 | 47 | ||
47 | #include "common.h" | 48 | #include "common.h" |
@@ -184,16 +185,24 @@ void t3_os_link_changed(struct adapter *adapter, int port_id, int link_stat, | |||
184 | int speed, int duplex, int pause) | 185 | int speed, int duplex, int pause) |
185 | { | 186 | { |
186 | struct net_device *dev = adapter->port[port_id]; | 187 | struct net_device *dev = adapter->port[port_id]; |
188 | struct port_info *pi = netdev_priv(dev); | ||
189 | struct cmac *mac = &pi->mac; | ||
187 | 190 | ||
188 | /* Skip changes from disabled ports. */ | 191 | /* Skip changes from disabled ports. */ |
189 | if (!netif_running(dev)) | 192 | if (!netif_running(dev)) |
190 | return; | 193 | return; |
191 | 194 | ||
192 | if (link_stat != netif_carrier_ok(dev)) { | 195 | if (link_stat != netif_carrier_ok(dev)) { |
193 | if (link_stat) | 196 | if (link_stat) { |
197 | t3_mac_enable(mac, MAC_DIRECTION_RX); | ||
194 | netif_carrier_on(dev); | 198 | netif_carrier_on(dev); |
195 | else | 199 | } else { |
196 | netif_carrier_off(dev); | 200 | netif_carrier_off(dev); |
201 | pi->phy.ops->power_down(&pi->phy, 1); | ||
202 | t3_mac_disable(mac, MAC_DIRECTION_RX); | ||
203 | t3_link_start(&pi->phy, mac, &pi->link_config); | ||
204 | } | ||
205 | |||
197 | link_report(dev); | 206 | link_report(dev); |
198 | } | 207 | } |
199 | } | 208 | } |
@@ -406,7 +415,7 @@ static void quiesce_rx(struct adapter *adap) | |||
406 | static int setup_sge_qsets(struct adapter *adap) | 415 | static int setup_sge_qsets(struct adapter *adap) |
407 | { | 416 | { |
408 | int i, j, err, irq_idx = 0, qset_idx = 0, dummy_dev_idx = 0; | 417 | int i, j, err, irq_idx = 0, qset_idx = 0, dummy_dev_idx = 0; |
409 | unsigned int ntxq = is_offload(adap) ? SGE_TXQ_PER_SET : 1; | 418 | unsigned int ntxq = SGE_TXQ_PER_SET; |
410 | 419 | ||
411 | if (adap->params.rev > 0 && !(adap->flags & USING_MSI)) | 420 | if (adap->params.rev > 0 && !(adap->flags & USING_MSI)) |
412 | irq_idx = -1; | 421 | irq_idx = -1; |
@@ -484,12 +493,14 @@ static ssize_t show_##name(struct device *d, struct device_attribute *attr, \ | |||
484 | static ssize_t set_nfilters(struct net_device *dev, unsigned int val) | 493 | static ssize_t set_nfilters(struct net_device *dev, unsigned int val) |
485 | { | 494 | { |
486 | struct adapter *adap = dev->priv; | 495 | struct adapter *adap = dev->priv; |
496 | int min_tids = is_offload(adap) ? MC5_MIN_TIDS : 0; | ||
487 | 497 | ||
488 | if (adap->flags & FULL_INIT_DONE) | 498 | if (adap->flags & FULL_INIT_DONE) |
489 | return -EBUSY; | 499 | return -EBUSY; |
490 | if (val && adap->params.rev == 0) | 500 | if (val && adap->params.rev == 0) |
491 | return -EINVAL; | 501 | return -EINVAL; |
492 | if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nservers) | 502 | if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nservers - |
503 | min_tids) | ||
493 | return -EINVAL; | 504 | return -EINVAL; |
494 | adap->params.mc5.nfilters = val; | 505 | adap->params.mc5.nfilters = val; |
495 | return 0; | 506 | return 0; |
@@ -507,7 +518,8 @@ static ssize_t set_nservers(struct net_device *dev, unsigned int val) | |||
507 | 518 | ||
508 | if (adap->flags & FULL_INIT_DONE) | 519 | if (adap->flags & FULL_INIT_DONE) |
509 | return -EBUSY; | 520 | return -EBUSY; |
510 | if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nfilters) | 521 | if (val > t3_mc5_size(&adap->mc5) - adap->params.mc5.nfilters - |
522 | MC5_MIN_TIDS) | ||
511 | return -EINVAL; | 523 | return -EINVAL; |
512 | adap->params.mc5.nservers = val; | 524 | adap->params.mc5.nservers = val; |
513 | return 0; | 525 | return 0; |
@@ -707,6 +719,28 @@ static void bind_qsets(struct adapter *adap) | |||
707 | } | 719 | } |
708 | } | 720 | } |
709 | 721 | ||
722 | #define FW_FNAME "t3fw-%d.%d.%d.bin" | ||
723 | |||
724 | static int upgrade_fw(struct adapter *adap) | ||
725 | { | ||
726 | int ret; | ||
727 | char buf[64]; | ||
728 | const struct firmware *fw; | ||
729 | struct device *dev = &adap->pdev->dev; | ||
730 | |||
731 | snprintf(buf, sizeof(buf), FW_FNAME, FW_VERSION_MAJOR, | ||
732 | FW_VERSION_MINOR, FW_VERSION_MICRO); | ||
733 | ret = request_firmware(&fw, buf, dev); | ||
734 | if (ret < 0) { | ||
735 | dev_err(dev, "could not upgrade firmware: unable to load %s\n", | ||
736 | buf); | ||
737 | return ret; | ||
738 | } | ||
739 | ret = t3_load_fw(adap, fw->data, fw->size); | ||
740 | release_firmware(fw); | ||
741 | return ret; | ||
742 | } | ||
743 | |||
710 | /** | 744 | /** |
711 | * cxgb_up - enable the adapter | 745 | * cxgb_up - enable the adapter |
712 | * @adapter: adapter being enabled | 746 | * @adapter: adapter being enabled |
@@ -723,6 +757,8 @@ static int cxgb_up(struct adapter *adap) | |||
723 | 757 | ||
724 | if (!(adap->flags & FULL_INIT_DONE)) { | 758 | if (!(adap->flags & FULL_INIT_DONE)) { |
725 | err = t3_check_fw_version(adap); | 759 | err = t3_check_fw_version(adap); |
760 | if (err == -EINVAL) | ||
761 | err = upgrade_fw(adap); | ||
726 | if (err) | 762 | if (err) |
727 | goto out; | 763 | goto out; |
728 | 764 | ||
@@ -734,6 +770,8 @@ static int cxgb_up(struct adapter *adap) | |||
734 | if (err) | 770 | if (err) |
735 | goto out; | 771 | goto out; |
736 | 772 | ||
773 | t3_write_reg(adap, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12)); | ||
774 | |||
737 | err = setup_sge_qsets(adap); | 775 | err = setup_sge_qsets(adap); |
738 | if (err) | 776 | if (err) |
739 | goto out; | 777 | goto out; |
@@ -894,7 +932,7 @@ static int cxgb_open(struct net_device *dev) | |||
894 | return err; | 932 | return err; |
895 | 933 | ||
896 | set_bit(pi->port_id, &adapter->open_device_map); | 934 | set_bit(pi->port_id, &adapter->open_device_map); |
897 | if (!ofld_disable) { | 935 | if (is_offload(adapter) && !ofld_disable) { |
898 | err = offload_open(dev); | 936 | err = offload_open(dev); |
899 | if (err) | 937 | if (err) |
900 | printk(KERN_WARNING | 938 | printk(KERN_WARNING |
@@ -1031,7 +1069,11 @@ static char stats_strings[][ETH_GSTRING_LEN] = { | |||
1031 | "VLANinsertions ", | 1069 | "VLANinsertions ", |
1032 | "TxCsumOffload ", | 1070 | "TxCsumOffload ", |
1033 | "RxCsumGood ", | 1071 | "RxCsumGood ", |
1034 | "RxDrops " | 1072 | "RxDrops ", |
1073 | |||
1074 | "CheckTXEnToggled ", | ||
1075 | "CheckResets ", | ||
1076 | |||
1035 | }; | 1077 | }; |
1036 | 1078 | ||
1037 | static int get_stats_count(struct net_device *dev) | 1079 | static int get_stats_count(struct net_device *dev) |
@@ -1145,6 +1187,9 @@ static void get_stats(struct net_device *dev, struct ethtool_stats *stats, | |||
1145 | *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM); | 1187 | *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_TX_CSUM); |
1146 | *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD); | 1188 | *data++ = collect_sge_port_stats(adapter, pi, SGE_PSTAT_RX_CSUM_GOOD); |
1147 | *data++ = s->rx_cong_drops; | 1189 | *data++ = s->rx_cong_drops; |
1190 | |||
1191 | *data++ = s->num_toggled; | ||
1192 | *data++ = s->num_resets; | ||
1148 | } | 1193 | } |
1149 | 1194 | ||
1150 | static inline void reg_block_dump(struct adapter *ap, void *buf, | 1195 | static inline void reg_block_dump(struct adapter *ap, void *buf, |
@@ -1362,23 +1407,27 @@ static int set_rx_csum(struct net_device *dev, u32 data) | |||
1362 | 1407 | ||
1363 | static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) | 1408 | static void get_sge_param(struct net_device *dev, struct ethtool_ringparam *e) |
1364 | { | 1409 | { |
1365 | struct adapter *adapter = dev->priv; | 1410 | const struct adapter *adapter = dev->priv; |
1411 | const struct port_info *pi = netdev_priv(dev); | ||
1412 | const struct qset_params *q = &adapter->params.sge.qset[pi->first_qset]; | ||
1366 | 1413 | ||
1367 | e->rx_max_pending = MAX_RX_BUFFERS; | 1414 | e->rx_max_pending = MAX_RX_BUFFERS; |
1368 | e->rx_mini_max_pending = 0; | 1415 | e->rx_mini_max_pending = 0; |
1369 | e->rx_jumbo_max_pending = MAX_RX_JUMBO_BUFFERS; | 1416 | e->rx_jumbo_max_pending = MAX_RX_JUMBO_BUFFERS; |
1370 | e->tx_max_pending = MAX_TXQ_ENTRIES; | 1417 | e->tx_max_pending = MAX_TXQ_ENTRIES; |
1371 | 1418 | ||
1372 | e->rx_pending = adapter->params.sge.qset[0].fl_size; | 1419 | e->rx_pending = q->fl_size; |
1373 | e->rx_mini_pending = adapter->params.sge.qset[0].rspq_size; | 1420 | e->rx_mini_pending = q->rspq_size; |
1374 | e->rx_jumbo_pending = adapter->params.sge.qset[0].jumbo_size; | 1421 | e->rx_jumbo_pending = q->jumbo_size; |
1375 | e->tx_pending = adapter->params.sge.qset[0].txq_size[0]; | 1422 | e->tx_pending = q->txq_size[0]; |
1376 | } | 1423 | } |
1377 | 1424 | ||
1378 | static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) | 1425 | static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) |
1379 | { | 1426 | { |
1380 | int i; | 1427 | int i; |
1428 | struct qset_params *q; | ||
1381 | struct adapter *adapter = dev->priv; | 1429 | struct adapter *adapter = dev->priv; |
1430 | const struct port_info *pi = netdev_priv(dev); | ||
1382 | 1431 | ||
1383 | if (e->rx_pending > MAX_RX_BUFFERS || | 1432 | if (e->rx_pending > MAX_RX_BUFFERS || |
1384 | e->rx_jumbo_pending > MAX_RX_JUMBO_BUFFERS || | 1433 | e->rx_jumbo_pending > MAX_RX_JUMBO_BUFFERS || |
@@ -1393,9 +1442,8 @@ static int set_sge_param(struct net_device *dev, struct ethtool_ringparam *e) | |||
1393 | if (adapter->flags & FULL_INIT_DONE) | 1442 | if (adapter->flags & FULL_INIT_DONE) |
1394 | return -EBUSY; | 1443 | return -EBUSY; |
1395 | 1444 | ||
1396 | for (i = 0; i < SGE_QSETS; ++i) { | 1445 | q = &adapter->params.sge.qset[pi->first_qset]; |
1397 | struct qset_params *q = &adapter->params.sge.qset[i]; | 1446 | for (i = 0; i < pi->nqsets; ++i, ++q) { |
1398 | |||
1399 | q->rspq_size = e->rx_mini_pending; | 1447 | q->rspq_size = e->rx_mini_pending; |
1400 | q->fl_size = e->rx_pending; | 1448 | q->fl_size = e->rx_pending; |
1401 | q->jumbo_size = e->rx_jumbo_pending; | 1449 | q->jumbo_size = e->rx_jumbo_pending; |
@@ -2067,6 +2115,42 @@ static void check_link_status(struct adapter *adapter) | |||
2067 | } | 2115 | } |
2068 | } | 2116 | } |
2069 | 2117 | ||
2118 | static void check_t3b2_mac(struct adapter *adapter) | ||
2119 | { | ||
2120 | int i; | ||
2121 | |||
2122 | if (!rtnl_trylock()) /* synchronize with ifdown */ | ||
2123 | return; | ||
2124 | |||
2125 | for_each_port(adapter, i) { | ||
2126 | struct net_device *dev = adapter->port[i]; | ||
2127 | struct port_info *p = netdev_priv(dev); | ||
2128 | int status; | ||
2129 | |||
2130 | if (!netif_running(dev)) | ||
2131 | continue; | ||
2132 | |||
2133 | status = 0; | ||
2134 | if (netif_running(dev) && netif_carrier_ok(dev)) | ||
2135 | status = t3b2_mac_watchdog_task(&p->mac); | ||
2136 | if (status == 1) | ||
2137 | p->mac.stats.num_toggled++; | ||
2138 | else if (status == 2) { | ||
2139 | struct cmac *mac = &p->mac; | ||
2140 | |||
2141 | t3_mac_set_mtu(mac, dev->mtu); | ||
2142 | t3_mac_set_address(mac, 0, dev->dev_addr); | ||
2143 | cxgb_set_rxmode(dev); | ||
2144 | t3_link_start(&p->phy, mac, &p->link_config); | ||
2145 | t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); | ||
2146 | t3_port_intr_enable(adapter, p->port_id); | ||
2147 | p->mac.stats.num_resets++; | ||
2148 | } | ||
2149 | } | ||
2150 | rtnl_unlock(); | ||
2151 | } | ||
2152 | |||
2153 | |||
2070 | static void t3_adap_check_task(struct work_struct *work) | 2154 | static void t3_adap_check_task(struct work_struct *work) |
2071 | { | 2155 | { |
2072 | struct adapter *adapter = container_of(work, struct adapter, | 2156 | struct adapter *adapter = container_of(work, struct adapter, |
@@ -2087,6 +2171,9 @@ static void t3_adap_check_task(struct work_struct *work) | |||
2087 | adapter->check_task_cnt = 0; | 2171 | adapter->check_task_cnt = 0; |
2088 | } | 2172 | } |
2089 | 2173 | ||
2174 | if (p->rev == T3_REV_B2) | ||
2175 | check_t3b2_mac(adapter); | ||
2176 | |||
2090 | /* Schedule the next check update if any port is active. */ | 2177 | /* Schedule the next check update if any port is active. */ |
2091 | spin_lock(&adapter->work_lock); | 2178 | spin_lock(&adapter->work_lock); |
2092 | if (adapter->open_device_map & PORT_MASK) | 2179 | if (adapter->open_device_map & PORT_MASK) |
@@ -2195,9 +2282,9 @@ static void __devinit print_port_info(struct adapter *adap, | |||
2195 | 2282 | ||
2196 | if (!test_bit(i, &adap->registered_device_map)) | 2283 | if (!test_bit(i, &adap->registered_device_map)) |
2197 | continue; | 2284 | continue; |
2198 | printk(KERN_INFO "%s: %s %s RNIC (rev %d) %s%s\n", | 2285 | printk(KERN_INFO "%s: %s %s %sNIC (rev %d) %s%s\n", |
2199 | dev->name, ai->desc, pi->port_type->desc, | 2286 | dev->name, ai->desc, pi->port_type->desc, |
2200 | adap->params.rev, buf, | 2287 | is_offload(adap) ? "R" : "", adap->params.rev, buf, |
2201 | (adap->flags & USING_MSIX) ? " MSI-X" : | 2288 | (adap->flags & USING_MSIX) ? " MSI-X" : |
2202 | (adap->flags & USING_MSI) ? " MSI" : ""); | 2289 | (adap->flags & USING_MSI) ? " MSI" : ""); |
2203 | if (adap->name == dev->name && adap->params.vpd.mclk) | 2290 | if (adap->name == dev->name && adap->params.vpd.mclk) |
diff --git a/drivers/net/cxgb3/cxgb3_offload.c b/drivers/net/cxgb3/cxgb3_offload.c index f6ed033efb56..199e5066acf3 100644 --- a/drivers/net/cxgb3/cxgb3_offload.c +++ b/drivers/net/cxgb3/cxgb3_offload.c | |||
@@ -508,6 +508,7 @@ void cxgb3_queue_tid_release(struct t3cdev *tdev, unsigned int tid) | |||
508 | 508 | ||
509 | spin_lock_bh(&td->tid_release_lock); | 509 | spin_lock_bh(&td->tid_release_lock); |
510 | p->ctx = (void *)td->tid_release_list; | 510 | p->ctx = (void *)td->tid_release_list; |
511 | p->client = NULL; | ||
511 | td->tid_release_list = p; | 512 | td->tid_release_list = p; |
512 | if (!p->ctx) | 513 | if (!p->ctx) |
513 | schedule_work(&td->tid_release_task); | 514 | schedule_work(&td->tid_release_task); |
@@ -553,7 +554,9 @@ int cxgb3_alloc_atid(struct t3cdev *tdev, struct cxgb3_client *client, | |||
553 | struct tid_info *t = &(T3C_DATA(tdev))->tid_maps; | 554 | struct tid_info *t = &(T3C_DATA(tdev))->tid_maps; |
554 | 555 | ||
555 | spin_lock_bh(&t->atid_lock); | 556 | spin_lock_bh(&t->atid_lock); |
556 | if (t->afree) { | 557 | if (t->afree && |
558 | t->atids_in_use + atomic_read(&t->tids_in_use) + MC5_MIN_TIDS <= | ||
559 | t->ntids) { | ||
557 | union active_open_entry *p = t->afree; | 560 | union active_open_entry *p = t->afree; |
558 | 561 | ||
559 | atid = (p - t->atid_tab) + t->atid_base; | 562 | atid = (p - t->atid_tab) + t->atid_base; |
@@ -621,7 +624,8 @@ static int do_act_open_rpl(struct t3cdev *dev, struct sk_buff *skb) | |||
621 | struct t3c_tid_entry *t3c_tid; | 624 | struct t3c_tid_entry *t3c_tid; |
622 | 625 | ||
623 | t3c_tid = lookup_atid(&(T3C_DATA(dev))->tid_maps, atid); | 626 | t3c_tid = lookup_atid(&(T3C_DATA(dev))->tid_maps, atid); |
624 | if (t3c_tid->ctx && t3c_tid->client && t3c_tid->client->handlers && | 627 | if (t3c_tid && t3c_tid->ctx && t3c_tid->client && |
628 | t3c_tid->client->handlers && | ||
625 | t3c_tid->client->handlers[CPL_ACT_OPEN_RPL]) { | 629 | t3c_tid->client->handlers[CPL_ACT_OPEN_RPL]) { |
626 | return t3c_tid->client->handlers[CPL_ACT_OPEN_RPL] (dev, skb, | 630 | return t3c_tid->client->handlers[CPL_ACT_OPEN_RPL] (dev, skb, |
627 | t3c_tid-> | 631 | t3c_tid-> |
@@ -640,7 +644,7 @@ static int do_stid_rpl(struct t3cdev *dev, struct sk_buff *skb) | |||
640 | struct t3c_tid_entry *t3c_tid; | 644 | struct t3c_tid_entry *t3c_tid; |
641 | 645 | ||
642 | t3c_tid = lookup_stid(&(T3C_DATA(dev))->tid_maps, stid); | 646 | t3c_tid = lookup_stid(&(T3C_DATA(dev))->tid_maps, stid); |
643 | if (t3c_tid->ctx && t3c_tid->client->handlers && | 647 | if (t3c_tid && t3c_tid->ctx && t3c_tid->client->handlers && |
644 | t3c_tid->client->handlers[p->opcode]) { | 648 | t3c_tid->client->handlers[p->opcode]) { |
645 | return t3c_tid->client->handlers[p->opcode] (dev, skb, | 649 | return t3c_tid->client->handlers[p->opcode] (dev, skb, |
646 | t3c_tid->ctx); | 650 | t3c_tid->ctx); |
@@ -658,7 +662,7 @@ static int do_hwtid_rpl(struct t3cdev *dev, struct sk_buff *skb) | |||
658 | struct t3c_tid_entry *t3c_tid; | 662 | struct t3c_tid_entry *t3c_tid; |
659 | 663 | ||
660 | t3c_tid = lookup_tid(&(T3C_DATA(dev))->tid_maps, hwtid); | 664 | t3c_tid = lookup_tid(&(T3C_DATA(dev))->tid_maps, hwtid); |
661 | if (t3c_tid->ctx && t3c_tid->client->handlers && | 665 | if (t3c_tid && t3c_tid->ctx && t3c_tid->client->handlers && |
662 | t3c_tid->client->handlers[p->opcode]) { | 666 | t3c_tid->client->handlers[p->opcode]) { |
663 | return t3c_tid->client->handlers[p->opcode] | 667 | return t3c_tid->client->handlers[p->opcode] |
664 | (dev, skb, t3c_tid->ctx); | 668 | (dev, skb, t3c_tid->ctx); |
@@ -687,6 +691,28 @@ static int do_cr(struct t3cdev *dev, struct sk_buff *skb) | |||
687 | } | 691 | } |
688 | } | 692 | } |
689 | 693 | ||
694 | /* | ||
695 | * Returns an sk_buff for a reply CPL message of size len. If the input | ||
696 | * sk_buff has no other users it is trimmed and reused, otherwise a new buffer | ||
697 | * is allocated. The input skb must be of size at least len. Note that this | ||
698 | * operation does not destroy the original skb data even if it decides to reuse | ||
699 | * the buffer. | ||
700 | */ | ||
701 | static struct sk_buff *cxgb3_get_cpl_reply_skb(struct sk_buff *skb, size_t len, | ||
702 | int gfp) | ||
703 | { | ||
704 | if (likely(!skb_cloned(skb))) { | ||
705 | BUG_ON(skb->len < len); | ||
706 | __skb_trim(skb, len); | ||
707 | skb_get(skb); | ||
708 | } else { | ||
709 | skb = alloc_skb(len, gfp); | ||
710 | if (skb) | ||
711 | __skb_put(skb, len); | ||
712 | } | ||
713 | return skb; | ||
714 | } | ||
715 | |||
690 | static int do_abort_req_rss(struct t3cdev *dev, struct sk_buff *skb) | 716 | static int do_abort_req_rss(struct t3cdev *dev, struct sk_buff *skb) |
691 | { | 717 | { |
692 | union opcode_tid *p = cplhdr(skb); | 718 | union opcode_tid *p = cplhdr(skb); |
@@ -694,30 +720,39 @@ static int do_abort_req_rss(struct t3cdev *dev, struct sk_buff *skb) | |||
694 | struct t3c_tid_entry *t3c_tid; | 720 | struct t3c_tid_entry *t3c_tid; |
695 | 721 | ||
696 | t3c_tid = lookup_tid(&(T3C_DATA(dev))->tid_maps, hwtid); | 722 | t3c_tid = lookup_tid(&(T3C_DATA(dev))->tid_maps, hwtid); |
697 | if (t3c_tid->ctx && t3c_tid->client->handlers && | 723 | if (t3c_tid && t3c_tid->ctx && t3c_tid->client->handlers && |
698 | t3c_tid->client->handlers[p->opcode]) { | 724 | t3c_tid->client->handlers[p->opcode]) { |
699 | return t3c_tid->client->handlers[p->opcode] | 725 | return t3c_tid->client->handlers[p->opcode] |
700 | (dev, skb, t3c_tid->ctx); | 726 | (dev, skb, t3c_tid->ctx); |
701 | } else { | 727 | } else { |
702 | struct cpl_abort_req_rss *req = cplhdr(skb); | 728 | struct cpl_abort_req_rss *req = cplhdr(skb); |
703 | struct cpl_abort_rpl *rpl; | 729 | struct cpl_abort_rpl *rpl; |
730 | struct sk_buff *reply_skb; | ||
731 | unsigned int tid = GET_TID(req); | ||
732 | u8 cmd = req->status; | ||
733 | |||
734 | if (req->status == CPL_ERR_RTX_NEG_ADVICE || | ||
735 | req->status == CPL_ERR_PERSIST_NEG_ADVICE) | ||
736 | goto out; | ||
704 | 737 | ||
705 | struct sk_buff *skb = | 738 | reply_skb = cxgb3_get_cpl_reply_skb(skb, |
706 | alloc_skb(sizeof(struct cpl_abort_rpl), GFP_ATOMIC); | 739 | sizeof(struct |
707 | if (!skb) { | 740 | cpl_abort_rpl), |
741 | GFP_ATOMIC); | ||
742 | |||
743 | if (!reply_skb) { | ||
708 | printk("do_abort_req_rss: couldn't get skb!\n"); | 744 | printk("do_abort_req_rss: couldn't get skb!\n"); |
709 | goto out; | 745 | goto out; |
710 | } | 746 | } |
711 | skb->priority = CPL_PRIORITY_DATA; | 747 | reply_skb->priority = CPL_PRIORITY_DATA; |
712 | __skb_put(skb, sizeof(struct cpl_abort_rpl)); | 748 | __skb_put(reply_skb, sizeof(struct cpl_abort_rpl)); |
713 | rpl = cplhdr(skb); | 749 | rpl = cplhdr(reply_skb); |
714 | rpl->wr.wr_hi = | 750 | rpl->wr.wr_hi = |
715 | htonl(V_WR_OP(FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL)); | 751 | htonl(V_WR_OP(FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL)); |
716 | rpl->wr.wr_lo = htonl(V_WR_TID(GET_TID(req))); | 752 | rpl->wr.wr_lo = htonl(V_WR_TID(tid)); |
717 | OPCODE_TID(rpl) = | 753 | OPCODE_TID(rpl) = htonl(MK_OPCODE_TID(CPL_ABORT_RPL, tid)); |
718 | htonl(MK_OPCODE_TID(CPL_ABORT_RPL, GET_TID(req))); | 754 | rpl->cmd = cmd; |
719 | rpl->cmd = req->status; | 755 | cxgb3_ofld_send(dev, reply_skb); |
720 | cxgb3_ofld_send(dev, skb); | ||
721 | out: | 756 | out: |
722 | return CPL_RET_BUF_DONE; | 757 | return CPL_RET_BUF_DONE; |
723 | } | 758 | } |
@@ -730,7 +765,7 @@ static int do_act_establish(struct t3cdev *dev, struct sk_buff *skb) | |||
730 | struct t3c_tid_entry *t3c_tid; | 765 | struct t3c_tid_entry *t3c_tid; |
731 | 766 | ||
732 | t3c_tid = lookup_atid(&(T3C_DATA(dev))->tid_maps, atid); | 767 | t3c_tid = lookup_atid(&(T3C_DATA(dev))->tid_maps, atid); |
733 | if (t3c_tid->ctx && t3c_tid->client->handlers && | 768 | if (t3c_tid && t3c_tid->ctx && t3c_tid->client->handlers && |
734 | t3c_tid->client->handlers[CPL_ACT_ESTABLISH]) { | 769 | t3c_tid->client->handlers[CPL_ACT_ESTABLISH]) { |
735 | return t3c_tid->client->handlers[CPL_ACT_ESTABLISH] | 770 | return t3c_tid->client->handlers[CPL_ACT_ESTABLISH] |
736 | (dev, skb, t3c_tid->ctx); | 771 | (dev, skb, t3c_tid->ctx); |
@@ -741,17 +776,6 @@ static int do_act_establish(struct t3cdev *dev, struct sk_buff *skb) | |||
741 | } | 776 | } |
742 | } | 777 | } |
743 | 778 | ||
744 | static int do_set_tcb_rpl(struct t3cdev *dev, struct sk_buff *skb) | ||
745 | { | ||
746 | struct cpl_set_tcb_rpl *rpl = cplhdr(skb); | ||
747 | |||
748 | if (rpl->status != CPL_ERR_NONE) | ||
749 | printk(KERN_ERR | ||
750 | "Unexpected SET_TCB_RPL status %u for tid %u\n", | ||
751 | rpl->status, GET_TID(rpl)); | ||
752 | return CPL_RET_BUF_DONE; | ||
753 | } | ||
754 | |||
755 | static int do_trace(struct t3cdev *dev, struct sk_buff *skb) | 779 | static int do_trace(struct t3cdev *dev, struct sk_buff *skb) |
756 | { | 780 | { |
757 | struct cpl_trace_pkt *p = cplhdr(skb); | 781 | struct cpl_trace_pkt *p = cplhdr(skb); |
@@ -771,7 +795,7 @@ static int do_term(struct t3cdev *dev, struct sk_buff *skb) | |||
771 | struct t3c_tid_entry *t3c_tid; | 795 | struct t3c_tid_entry *t3c_tid; |
772 | 796 | ||
773 | t3c_tid = lookup_tid(&(T3C_DATA(dev))->tid_maps, hwtid); | 797 | t3c_tid = lookup_tid(&(T3C_DATA(dev))->tid_maps, hwtid); |
774 | if (t3c_tid->ctx && t3c_tid->client->handlers && | 798 | if (t3c_tid && t3c_tid->ctx && t3c_tid->client->handlers && |
775 | t3c_tid->client->handlers[opcode]) { | 799 | t3c_tid->client->handlers[opcode]) { |
776 | return t3c_tid->client->handlers[opcode] (dev, skb, | 800 | return t3c_tid->client->handlers[opcode] (dev, skb, |
777 | t3c_tid->ctx); | 801 | t3c_tid->ctx); |
@@ -970,7 +994,7 @@ void cxgb_redirect(struct dst_entry *old, struct dst_entry *new) | |||
970 | for (tid = 0; tid < ti->ntids; tid++) { | 994 | for (tid = 0; tid < ti->ntids; tid++) { |
971 | te = lookup_tid(ti, tid); | 995 | te = lookup_tid(ti, tid); |
972 | BUG_ON(!te); | 996 | BUG_ON(!te); |
973 | if (te->ctx && te->client && te->client->redirect) { | 997 | if (te && te->ctx && te->client && te->client->redirect) { |
974 | update_tcb = te->client->redirect(te->ctx, old, new, e); | 998 | update_tcb = te->client->redirect(te->ctx, old, new, e); |
975 | if (update_tcb) { | 999 | if (update_tcb) { |
976 | l2t_hold(L2DATA(tdev), e); | 1000 | l2t_hold(L2DATA(tdev), e); |
@@ -1213,7 +1237,8 @@ void __init cxgb3_offload_init(void) | |||
1213 | t3_register_cpl_handler(CPL_CLOSE_CON_RPL, do_hwtid_rpl); | 1237 | t3_register_cpl_handler(CPL_CLOSE_CON_RPL, do_hwtid_rpl); |
1214 | t3_register_cpl_handler(CPL_ABORT_REQ_RSS, do_abort_req_rss); | 1238 | t3_register_cpl_handler(CPL_ABORT_REQ_RSS, do_abort_req_rss); |
1215 | t3_register_cpl_handler(CPL_ACT_ESTABLISH, do_act_establish); | 1239 | t3_register_cpl_handler(CPL_ACT_ESTABLISH, do_act_establish); |
1216 | t3_register_cpl_handler(CPL_SET_TCB_RPL, do_set_tcb_rpl); | 1240 | t3_register_cpl_handler(CPL_SET_TCB_RPL, do_hwtid_rpl); |
1241 | t3_register_cpl_handler(CPL_GET_TCB_RPL, do_hwtid_rpl); | ||
1217 | t3_register_cpl_handler(CPL_RDMA_TERMINATE, do_term); | 1242 | t3_register_cpl_handler(CPL_RDMA_TERMINATE, do_term); |
1218 | t3_register_cpl_handler(CPL_RDMA_EC_STATUS, do_hwtid_rpl); | 1243 | t3_register_cpl_handler(CPL_RDMA_EC_STATUS, do_hwtid_rpl); |
1219 | t3_register_cpl_handler(CPL_TRACE_PKT, do_trace); | 1244 | t3_register_cpl_handler(CPL_TRACE_PKT, do_trace); |
diff --git a/drivers/net/cxgb3/mc5.c b/drivers/net/cxgb3/mc5.c index 644d62ea86a6..84c1ffa8e2d3 100644 --- a/drivers/net/cxgb3/mc5.c +++ b/drivers/net/cxgb3/mc5.c | |||
@@ -328,6 +328,9 @@ int t3_mc5_init(struct mc5 *mc5, unsigned int nservers, unsigned int nfilters, | |||
328 | unsigned int tcam_size = mc5->tcam_size; | 328 | unsigned int tcam_size = mc5->tcam_size; |
329 | struct adapter *adap = mc5->adapter; | 329 | struct adapter *adap = mc5->adapter; |
330 | 330 | ||
331 | if (!tcam_size) | ||
332 | return 0; | ||
333 | |||
331 | if (nroutes > MAX_ROUTES || nroutes + nservers + nfilters > tcam_size) | 334 | if (nroutes > MAX_ROUTES || nroutes + nservers + nfilters > tcam_size) |
332 | return -EINVAL; | 335 | return -EINVAL; |
333 | 336 | ||
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h index b56c5f52bcdc..e5a553410e24 100644 --- a/drivers/net/cxgb3/regs.h +++ b/drivers/net/cxgb3/regs.h | |||
@@ -1206,6 +1206,14 @@ | |||
1206 | 1206 | ||
1207 | #define A_TP_RX_TRC_KEY0 0x120 | 1207 | #define A_TP_RX_TRC_KEY0 0x120 |
1208 | 1208 | ||
1209 | #define A_TP_TX_DROP_CNT_CH0 0x12d | ||
1210 | |||
1211 | #define S_TXDROPCNTCH0RCVD 0 | ||
1212 | #define M_TXDROPCNTCH0RCVD 0xffff | ||
1213 | #define V_TXDROPCNTCH0RCVD(x) ((x) << S_TXDROPCNTCH0RCVD) | ||
1214 | #define G_TXDROPCNTCH0RCVD(x) (((x) >> S_TXDROPCNTCH0RCVD) & \ | ||
1215 | M_TXDROPCNTCH0RCVD) | ||
1216 | |||
1209 | #define A_ULPRX_CTL 0x500 | 1217 | #define A_ULPRX_CTL 0x500 |
1210 | 1218 | ||
1211 | #define S_ROUND_ROBIN 4 | 1219 | #define S_ROUND_ROBIN 4 |
@@ -1226,9 +1234,15 @@ | |||
1226 | 1234 | ||
1227 | #define A_ULPRX_ISCSI_TAGMASK 0x514 | 1235 | #define A_ULPRX_ISCSI_TAGMASK 0x514 |
1228 | 1236 | ||
1237 | #define S_HPZ0 0 | ||
1238 | #define M_HPZ0 0xf | ||
1239 | #define V_HPZ0(x) ((x) << S_HPZ0) | ||
1240 | #define G_HPZ0(x) (((x) >> S_HPZ0) & M_HPZ0) | ||
1241 | |||
1229 | #define A_ULPRX_TDDP_LLIMIT 0x51c | 1242 | #define A_ULPRX_TDDP_LLIMIT 0x51c |
1230 | 1243 | ||
1231 | #define A_ULPRX_TDDP_ULIMIT 0x520 | 1244 | #define A_ULPRX_TDDP_ULIMIT 0x520 |
1245 | #define A_ULPRX_TDDP_PSZ 0x528 | ||
1232 | 1246 | ||
1233 | #define A_ULPRX_STAG_LLIMIT 0x52c | 1247 | #define A_ULPRX_STAG_LLIMIT 0x52c |
1234 | 1248 | ||
@@ -1834,6 +1848,8 @@ | |||
1834 | #define V_TXPAUSEEN(x) ((x) << S_TXPAUSEEN) | 1848 | #define V_TXPAUSEEN(x) ((x) << S_TXPAUSEEN) |
1835 | #define F_TXPAUSEEN V_TXPAUSEEN(1U) | 1849 | #define F_TXPAUSEEN V_TXPAUSEEN(1U) |
1836 | 1850 | ||
1851 | #define A_XGM_TX_PAUSE_QUANTA 0x808 | ||
1852 | |||
1837 | #define A_XGM_RX_CTRL 0x80c | 1853 | #define A_XGM_RX_CTRL 0x80c |
1838 | 1854 | ||
1839 | #define S_RXEN 0 | 1855 | #define S_RXEN 0 |
@@ -1920,11 +1936,20 @@ | |||
1920 | 1936 | ||
1921 | #define A_XGM_TXFIFO_CFG 0x888 | 1937 | #define A_XGM_TXFIFO_CFG 0x888 |
1922 | 1938 | ||
1939 | #define S_TXIPG 13 | ||
1940 | #define M_TXIPG 0xff | ||
1941 | #define V_TXIPG(x) ((x) << S_TXIPG) | ||
1942 | #define G_TXIPG(x) (((x) >> S_TXIPG) & M_TXIPG) | ||
1943 | |||
1923 | #define S_TXFIFOTHRESH 4 | 1944 | #define S_TXFIFOTHRESH 4 |
1924 | #define M_TXFIFOTHRESH 0x1ff | 1945 | #define M_TXFIFOTHRESH 0x1ff |
1925 | 1946 | ||
1926 | #define V_TXFIFOTHRESH(x) ((x) << S_TXFIFOTHRESH) | 1947 | #define V_TXFIFOTHRESH(x) ((x) << S_TXFIFOTHRESH) |
1927 | 1948 | ||
1949 | #define S_ENDROPPKT 21 | ||
1950 | #define V_ENDROPPKT(x) ((x) << S_ENDROPPKT) | ||
1951 | #define F_ENDROPPKT V_ENDROPPKT(1U) | ||
1952 | |||
1928 | #define A_XGM_SERDES_CTRL 0x890 | 1953 | #define A_XGM_SERDES_CTRL 0x890 |
1929 | #define A_XGM_SERDES_CTRL0 0x8e0 | 1954 | #define A_XGM_SERDES_CTRL0 0x8e0 |
1930 | 1955 | ||
@@ -2190,6 +2215,13 @@ | |||
2190 | 2215 | ||
2191 | #define A_XGM_RX_MAX_PKT_SIZE_ERR_CNT 0x9a4 | 2216 | #define A_XGM_RX_MAX_PKT_SIZE_ERR_CNT 0x9a4 |
2192 | 2217 | ||
2218 | #define A_XGM_TX_SPI4_SOP_EOP_CNT 0x9a8 | ||
2219 | |||
2220 | #define S_TXSPI4SOPCNT 16 | ||
2221 | #define M_TXSPI4SOPCNT 0xffff | ||
2222 | #define V_TXSPI4SOPCNT(x) ((x) << S_TXSPI4SOPCNT) | ||
2223 | #define G_TXSPI4SOPCNT(x) (((x) >> S_TXSPI4SOPCNT) & M_TXSPI4SOPCNT) | ||
2224 | |||
2193 | #define A_XGM_RX_SPI4_SOP_EOP_CNT 0x9ac | 2225 | #define A_XGM_RX_SPI4_SOP_EOP_CNT 0x9ac |
2194 | 2226 | ||
2195 | #define XGMAC0_1_BASE_ADDR 0xa00 | 2227 | #define XGMAC0_1_BASE_ADDR 0xa00 |
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c index c23783432e51..027ab2c3825c 100644 --- a/drivers/net/cxgb3/sge.c +++ b/drivers/net/cxgb3/sge.c | |||
@@ -2631,7 +2631,7 @@ int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports, | |||
2631 | q->txq[TXQ_ETH].stop_thres = nports * | 2631 | q->txq[TXQ_ETH].stop_thres = nports * |
2632 | flits_to_desc(sgl_len(MAX_SKB_FRAGS + 1) + 3); | 2632 | flits_to_desc(sgl_len(MAX_SKB_FRAGS + 1) + 3); |
2633 | 2633 | ||
2634 | if (ntxq == 1) { | 2634 | if (!is_offload(adapter)) { |
2635 | #ifdef USE_RX_PAGE | 2635 | #ifdef USE_RX_PAGE |
2636 | q->fl[0].buf_size = RX_PAGE_SIZE; | 2636 | q->fl[0].buf_size = RX_PAGE_SIZE; |
2637 | #else | 2637 | #else |
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index eaa7a2e89a30..fb485d0a43d8 100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c | |||
@@ -438,23 +438,23 @@ static const struct adapter_info t3_adap_info[] = { | |||
438 | {2, 0, 0, 0, | 438 | {2, 0, 0, 0, |
439 | F_GPIO2_OEN | F_GPIO4_OEN | | 439 | F_GPIO2_OEN | F_GPIO4_OEN | |
440 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, | 440 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, |
441 | SUPPORTED_OFFLOAD, | 441 | 0, |
442 | &mi1_mdio_ops, "Chelsio PE9000"}, | 442 | &mi1_mdio_ops, "Chelsio PE9000"}, |
443 | {2, 0, 0, 0, | 443 | {2, 0, 0, 0, |
444 | F_GPIO2_OEN | F_GPIO4_OEN | | 444 | F_GPIO2_OEN | F_GPIO4_OEN | |
445 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, | 445 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, |
446 | SUPPORTED_OFFLOAD, | 446 | 0, |
447 | &mi1_mdio_ops, "Chelsio T302"}, | 447 | &mi1_mdio_ops, "Chelsio T302"}, |
448 | {1, 0, 0, 0, | 448 | {1, 0, 0, 0, |
449 | F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | | 449 | F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | |
450 | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, | 450 | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, |
451 | SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_OFFLOAD, | 451 | SUPPORTED_10000baseT_Full | SUPPORTED_AUI, |
452 | &mi1_mdio_ext_ops, "Chelsio T310"}, | 452 | &mi1_mdio_ext_ops, "Chelsio T310"}, |
453 | {2, 0, 0, 0, | 453 | {2, 0, 0, 0, |
454 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | | 454 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | |
455 | F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL | | 455 | F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL | |
456 | F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, | 456 | F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, |
457 | SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_OFFLOAD, | 457 | SUPPORTED_10000baseT_Full | SUPPORTED_AUI, |
458 | &mi1_mdio_ext_ops, "Chelsio T320"}, | 458 | &mi1_mdio_ext_ops, "Chelsio T320"}, |
459 | }; | 459 | }; |
460 | 460 | ||
@@ -681,7 +681,8 @@ enum { | |||
681 | SF_ERASE_SECTOR = 0xd8, /* erase sector */ | 681 | SF_ERASE_SECTOR = 0xd8, /* erase sector */ |
682 | 682 | ||
683 | FW_FLASH_BOOT_ADDR = 0x70000, /* start address of FW in flash */ | 683 | FW_FLASH_BOOT_ADDR = 0x70000, /* start address of FW in flash */ |
684 | FW_VERS_ADDR = 0x77ffc /* flash address holding FW version */ | 684 | FW_VERS_ADDR = 0x77ffc, /* flash address holding FW version */ |
685 | FW_MIN_SIZE = 8 /* at least version and csum */ | ||
685 | }; | 686 | }; |
686 | 687 | ||
687 | /** | 688 | /** |
@@ -935,7 +936,7 @@ int t3_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size) | |||
935 | const u32 *p = (const u32 *)fw_data; | 936 | const u32 *p = (const u32 *)fw_data; |
936 | int ret, addr, fw_sector = FW_FLASH_BOOT_ADDR >> 16; | 937 | int ret, addr, fw_sector = FW_FLASH_BOOT_ADDR >> 16; |
937 | 938 | ||
938 | if (size & 3) | 939 | if ((size & 3) || size < FW_MIN_SIZE) |
939 | return -EINVAL; | 940 | return -EINVAL; |
940 | if (size > FW_VERS_ADDR + 8 - FW_FLASH_BOOT_ADDR) | 941 | if (size > FW_VERS_ADDR + 8 - FW_FLASH_BOOT_ADDR) |
941 | return -EFBIG; | 942 | return -EFBIG; |
@@ -1522,19 +1523,25 @@ static int mac_intr_handler(struct adapter *adap, unsigned int idx) | |||
1522 | */ | 1523 | */ |
1523 | int t3_phy_intr_handler(struct adapter *adapter) | 1524 | int t3_phy_intr_handler(struct adapter *adapter) |
1524 | { | 1525 | { |
1525 | static const int intr_gpio_bits[] = { 8, 0x20 }; | 1526 | u32 mask, gpi = adapter_info(adapter)->gpio_intr; |
1526 | |||
1527 | u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE); | 1527 | u32 i, cause = t3_read_reg(adapter, A_T3DBG_INT_CAUSE); |
1528 | 1528 | ||
1529 | for_each_port(adapter, i) { | 1529 | for_each_port(adapter, i) { |
1530 | if (cause & intr_gpio_bits[i]) { | 1530 | struct port_info *p = adap2pinfo(adapter, i); |
1531 | struct cphy *phy = &adap2pinfo(adapter, i)->phy; | 1531 | |
1532 | int phy_cause = phy->ops->intr_handler(phy); | 1532 | mask = gpi - (gpi & (gpi - 1)); |
1533 | gpi -= mask; | ||
1534 | |||
1535 | if (!(p->port_type->caps & SUPPORTED_IRQ)) | ||
1536 | continue; | ||
1537 | |||
1538 | if (cause & mask) { | ||
1539 | int phy_cause = p->phy.ops->intr_handler(&p->phy); | ||
1533 | 1540 | ||
1534 | if (phy_cause & cphy_cause_link_change) | 1541 | if (phy_cause & cphy_cause_link_change) |
1535 | t3_link_changed(adapter, i); | 1542 | t3_link_changed(adapter, i); |
1536 | if (phy_cause & cphy_cause_fifo_error) | 1543 | if (phy_cause & cphy_cause_fifo_error) |
1537 | phy->fifo_errors++; | 1544 | p->phy.fifo_errors++; |
1538 | } | 1545 | } |
1539 | } | 1546 | } |
1540 | 1547 | ||
@@ -2899,6 +2906,9 @@ static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type) | |||
2899 | struct adapter *adapter = mc7->adapter; | 2906 | struct adapter *adapter = mc7->adapter; |
2900 | const struct mc7_timing_params *p = &mc7_timings[mem_type]; | 2907 | const struct mc7_timing_params *p = &mc7_timings[mem_type]; |
2901 | 2908 | ||
2909 | if (!mc7->size) | ||
2910 | return 0; | ||
2911 | |||
2902 | val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); | 2912 | val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); |
2903 | slow = val & F_SLOW; | 2913 | slow = val & F_SLOW; |
2904 | width = G_WIDTH(val); | 2914 | width = G_WIDTH(val); |
@@ -3099,8 +3109,10 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params) | |||
3099 | do { /* wait for uP to initialize */ | 3109 | do { /* wait for uP to initialize */ |
3100 | msleep(20); | 3110 | msleep(20); |
3101 | } while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts); | 3111 | } while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts); |
3102 | if (!attempts) | 3112 | if (!attempts) { |
3113 | CH_ERR(adapter, "uP initialization timed out\n"); | ||
3103 | goto out_err; | 3114 | goto out_err; |
3115 | } | ||
3104 | 3116 | ||
3105 | err = 0; | 3117 | err = 0; |
3106 | out_err: | 3118 | out_err: |
@@ -3200,7 +3212,7 @@ static void __devinit mc7_prep(struct adapter *adapter, struct mc7 *mc7, | |||
3200 | mc7->name = name; | 3212 | mc7->name = name; |
3201 | mc7->offset = base_addr - MC7_PMRX_BASE_ADDR; | 3213 | mc7->offset = base_addr - MC7_PMRX_BASE_ADDR; |
3202 | cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); | 3214 | cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); |
3203 | mc7->size = mc7_calc_size(cfg); | 3215 | mc7->size = mc7->size = G_DEN(cfg) == M_DEN ? 0 : mc7_calc_size(cfg); |
3204 | mc7->width = G_WIDTH(cfg); | 3216 | mc7->width = G_WIDTH(cfg); |
3205 | } | 3217 | } |
3206 | 3218 | ||
@@ -3227,6 +3239,7 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai) | |||
3227 | V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); | 3239 | V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); |
3228 | t3_write_reg(adapter, A_T3DBG_GPIO_EN, | 3240 | t3_write_reg(adapter, A_T3DBG_GPIO_EN, |
3229 | ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL); | 3241 | ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL); |
3242 | t3_write_reg(adapter, A_MC5_DB_SERVER_INDEX, 0); | ||
3230 | 3243 | ||
3231 | if (adapter->params.rev == 0 || !uses_xaui(adapter)) | 3244 | if (adapter->params.rev == 0 || !uses_xaui(adapter)) |
3232 | val |= F_ENRGMII; | 3245 | val |= F_ENRGMII; |
@@ -3243,15 +3256,17 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai) | |||
3243 | } | 3256 | } |
3244 | 3257 | ||
3245 | /* | 3258 | /* |
3246 | * Reset the adapter. PCIe cards lose their config space during reset, PCI-X | 3259 | * Reset the adapter. |
3260 | * Older PCIe cards lose their config space during reset, PCI-X | ||
3247 | * ones don't. | 3261 | * ones don't. |
3248 | */ | 3262 | */ |
3249 | int t3_reset_adapter(struct adapter *adapter) | 3263 | int t3_reset_adapter(struct adapter *adapter) |
3250 | { | 3264 | { |
3251 | int i; | 3265 | int i, save_and_restore_pcie = |
3266 | adapter->params.rev < T3_REV_B2 && is_pcie(adapter); | ||
3252 | uint16_t devid = 0; | 3267 | uint16_t devid = 0; |
3253 | 3268 | ||
3254 | if (is_pcie(adapter)) | 3269 | if (save_and_restore_pcie) |
3255 | pci_save_state(adapter->pdev); | 3270 | pci_save_state(adapter->pdev); |
3256 | t3_write_reg(adapter, A_PL_RST, F_CRSTWRM | F_CRSTWRMMODE); | 3271 | t3_write_reg(adapter, A_PL_RST, F_CRSTWRM | F_CRSTWRMMODE); |
3257 | 3272 | ||
@@ -3269,7 +3284,7 @@ int t3_reset_adapter(struct adapter *adapter) | |||
3269 | if (devid != 0x1425) | 3284 | if (devid != 0x1425) |
3270 | return -1; | 3285 | return -1; |
3271 | 3286 | ||
3272 | if (is_pcie(adapter)) | 3287 | if (save_and_restore_pcie) |
3273 | pci_restore_state(adapter->pdev); | 3288 | pci_restore_state(adapter->pdev); |
3274 | return 0; | 3289 | return 0; |
3275 | } | 3290 | } |
@@ -3323,7 +3338,13 @@ int __devinit t3_prep_adapter(struct adapter *adapter, | |||
3323 | p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size); | 3338 | p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size); |
3324 | p->ntimer_qs = p->cm_size >= (128 << 20) || | 3339 | p->ntimer_qs = p->cm_size >= (128 << 20) || |
3325 | adapter->params.rev > 0 ? 12 : 6; | 3340 | adapter->params.rev > 0 ? 12 : 6; |
3341 | } | ||
3342 | |||
3343 | adapter->params.offload = t3_mc7_size(&adapter->pmrx) && | ||
3344 | t3_mc7_size(&adapter->pmtx) && | ||
3345 | t3_mc7_size(&adapter->cm); | ||
3326 | 3346 | ||
3347 | if (is_offload(adapter)) { | ||
3327 | adapter->params.mc5.nservers = DEFAULT_NSERVERS; | 3348 | adapter->params.mc5.nservers = DEFAULT_NSERVERS; |
3328 | adapter->params.mc5.nfilters = adapter->params.rev > 0 ? | 3349 | adapter->params.mc5.nfilters = adapter->params.rev > 0 ? |
3329 | DEFAULT_NFILTERS : 0; | 3350 | DEFAULT_NFILTERS : 0; |
diff --git a/drivers/net/cxgb3/version.h b/drivers/net/cxgb3/version.h index 82278f850259..042e27e291cd 100644 --- a/drivers/net/cxgb3/version.h +++ b/drivers/net/cxgb3/version.h | |||
@@ -36,6 +36,9 @@ | |||
36 | #define DRV_NAME "cxgb3" | 36 | #define DRV_NAME "cxgb3" |
37 | /* Driver version */ | 37 | /* Driver version */ |
38 | #define DRV_VERSION "1.0-ko" | 38 | #define DRV_VERSION "1.0-ko" |
39 | |||
40 | /* Firmware version */ | ||
39 | #define FW_VERSION_MAJOR 3 | 41 | #define FW_VERSION_MAJOR 3 |
40 | #define FW_VERSION_MINOR 2 | 42 | #define FW_VERSION_MINOR 3 |
43 | #define FW_VERSION_MICRO 0 | ||
41 | #endif /* __CHELSIO_VERSION_H */ | 44 | #endif /* __CHELSIO_VERSION_H */ |
diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c index 907a272ae32d..a506792f9575 100644 --- a/drivers/net/cxgb3/xgmac.c +++ b/drivers/net/cxgb3/xgmac.c | |||
@@ -124,9 +124,6 @@ int t3_mac_reset(struct cmac *mac) | |||
124 | xaui_serdes_reset(mac); | 124 | xaui_serdes_reset(mac); |
125 | } | 125 | } |
126 | 126 | ||
127 | if (adap->params.rev > 0) | ||
128 | t3_write_reg(adap, A_XGM_PAUSE_TIMER + oft, 0xf000); | ||
129 | |||
130 | val = F_MAC_RESET_; | 127 | val = F_MAC_RESET_; |
131 | if (is_10G(adap)) | 128 | if (is_10G(adap)) |
132 | val |= F_PCS_RESET_; | 129 | val |= F_PCS_RESET_; |
@@ -145,6 +142,58 @@ int t3_mac_reset(struct cmac *mac) | |||
145 | return 0; | 142 | return 0; |
146 | } | 143 | } |
147 | 144 | ||
145 | int t3b2_mac_reset(struct cmac *mac) | ||
146 | { | ||
147 | struct adapter *adap = mac->adapter; | ||
148 | unsigned int oft = mac->offset; | ||
149 | u32 val; | ||
150 | |||
151 | if (!macidx(mac)) | ||
152 | t3_set_reg_field(adap, A_MPS_CFG, F_PORT0ACTIVE, 0); | ||
153 | else | ||
154 | t3_set_reg_field(adap, A_MPS_CFG, F_PORT1ACTIVE, 0); | ||
155 | |||
156 | t3_write_reg(adap, A_XGM_RESET_CTRL + oft, F_MAC_RESET_); | ||
157 | t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ | ||
158 | |||
159 | msleep(10); | ||
160 | |||
161 | /* Check for xgm Rx fifo empty */ | ||
162 | if (t3_wait_op_done(adap, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT + oft, | ||
163 | 0x80000000, 1, 5, 2)) { | ||
164 | CH_ERR(adap, "MAC %d Rx fifo drain failed\n", | ||
165 | macidx(mac)); | ||
166 | return -1; | ||
167 | } | ||
168 | |||
169 | t3_write_reg(adap, A_XGM_RESET_CTRL + oft, 0); | ||
170 | t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ | ||
171 | |||
172 | val = F_MAC_RESET_; | ||
173 | if (is_10G(adap)) | ||
174 | val |= F_PCS_RESET_; | ||
175 | else if (uses_xaui(adap)) | ||
176 | val |= F_PCS_RESET_ | F_XG2G_RESET_; | ||
177 | else | ||
178 | val |= F_RGMII_RESET_ | F_XG2G_RESET_; | ||
179 | t3_write_reg(adap, A_XGM_RESET_CTRL + oft, val); | ||
180 | t3_read_reg(adap, A_XGM_RESET_CTRL + oft); /* flush */ | ||
181 | if ((val & F_PCS_RESET_) && adap->params.rev) { | ||
182 | msleep(1); | ||
183 | t3b_pcs_reset(mac); | ||
184 | } | ||
185 | t3_write_reg(adap, A_XGM_RX_CFG + oft, | ||
186 | F_DISPAUSEFRAMES | F_EN1536BFRAMES | | ||
187 | F_RMFCS | F_ENJUMBO | F_ENHASHMCAST); | ||
188 | |||
189 | if (!macidx(mac)) | ||
190 | t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT0ACTIVE); | ||
191 | else | ||
192 | t3_set_reg_field(adap, A_MPS_CFG, 0, F_PORT1ACTIVE); | ||
193 | |||
194 | return 0; | ||
195 | } | ||
196 | |||
148 | /* | 197 | /* |
149 | * Set the exact match register 'idx' to recognize the given Ethernet address. | 198 | * Set the exact match register 'idx' to recognize the given Ethernet address. |
150 | */ | 199 | */ |
@@ -251,9 +300,11 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
251 | * Adjust the PAUSE frame watermarks. We always set the LWM, and the | 300 | * Adjust the PAUSE frame watermarks. We always set the LWM, and the |
252 | * HWM only if flow-control is enabled. | 301 | * HWM only if flow-control is enabled. |
253 | */ | 302 | */ |
254 | hwm = max(MAC_RXFIFO_SIZE - 3 * mtu, MAC_RXFIFO_SIZE / 2U); | 303 | hwm = max_t(unsigned int, MAC_RXFIFO_SIZE - 3 * mtu, |
255 | hwm = min(hwm, 3 * MAC_RXFIFO_SIZE / 4 + 1024); | 304 | MAC_RXFIFO_SIZE * 38 / 100); |
256 | lwm = hwm - 1024; | 305 | hwm = min(hwm, MAC_RXFIFO_SIZE - 8192); |
306 | lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); | ||
307 | |||
257 | v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset); | 308 | v = t3_read_reg(adap, A_XGM_RXFIFO_CFG + mac->offset); |
258 | v &= ~V_RXFIFOPAUSELWM(M_RXFIFOPAUSELWM); | 309 | v &= ~V_RXFIFOPAUSELWM(M_RXFIFOPAUSELWM); |
259 | v |= V_RXFIFOPAUSELWM(lwm / 8); | 310 | v |= V_RXFIFOPAUSELWM(lwm / 8); |
@@ -270,7 +321,15 @@ int t3_mac_set_mtu(struct cmac *mac, unsigned int mtu) | |||
270 | thres = mtu > thres ? (mtu - thres + 7) / 8 : 0; | 321 | thres = mtu > thres ? (mtu - thres + 7) / 8 : 0; |
271 | thres = max(thres, 8U); /* need at least 8 */ | 322 | thres = max(thres, 8U); /* need at least 8 */ |
272 | t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + mac->offset, | 323 | t3_set_reg_field(adap, A_XGM_TXFIFO_CFG + mac->offset, |
273 | V_TXFIFOTHRESH(M_TXFIFOTHRESH), V_TXFIFOTHRESH(thres)); | 324 | V_TXFIFOTHRESH(M_TXFIFOTHRESH) | V_TXIPG(M_TXIPG), |
325 | V_TXFIFOTHRESH(thres) | V_TXIPG(1)); | ||
326 | |||
327 | if (adap->params.rev > 0) | ||
328 | t3_write_reg(adap, A_XGM_PAUSE_TIMER + mac->offset, | ||
329 | (hwm - lwm) * 4 / 8); | ||
330 | t3_write_reg(adap, A_XGM_TX_PAUSE_QUANTA + mac->offset, | ||
331 | MAC_RXFIFO_SIZE * 4 * 8 / 512); | ||
332 | |||
274 | return 0; | 333 | return 0; |
275 | } | 334 | } |
276 | 335 | ||
@@ -298,12 +357,6 @@ int t3_mac_set_speed_duplex_fc(struct cmac *mac, int speed, int duplex, int fc) | |||
298 | V_PORTSPEED(M_PORTSPEED), val); | 357 | V_PORTSPEED(M_PORTSPEED), val); |
299 | } | 358 | } |
300 | 359 | ||
301 | val = t3_read_reg(adap, A_XGM_RXFIFO_CFG + oft); | ||
302 | val &= ~V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM); | ||
303 | if (fc & PAUSE_TX) | ||
304 | val |= V_RXFIFOPAUSEHWM(G_RXFIFOPAUSELWM(val) + 128); /* +1KB */ | ||
305 | t3_write_reg(adap, A_XGM_RXFIFO_CFG + oft, val); | ||
306 | |||
307 | t3_set_reg_field(adap, A_XGM_TX_CFG + oft, F_TXPAUSEEN, | 360 | t3_set_reg_field(adap, A_XGM_TX_CFG + oft, F_TXPAUSEEN, |
308 | (fc & PAUSE_RX) ? F_TXPAUSEEN : 0); | 361 | (fc & PAUSE_RX) ? F_TXPAUSEEN : 0); |
309 | return 0; | 362 | return 0; |
@@ -314,13 +367,28 @@ int t3_mac_enable(struct cmac *mac, int which) | |||
314 | int idx = macidx(mac); | 367 | int idx = macidx(mac); |
315 | struct adapter *adap = mac->adapter; | 368 | struct adapter *adap = mac->adapter; |
316 | unsigned int oft = mac->offset; | 369 | unsigned int oft = mac->offset; |
317 | 370 | struct mac_stats *s = &mac->stats; | |
371 | |||
318 | if (which & MAC_DIRECTION_TX) { | 372 | if (which & MAC_DIRECTION_TX) { |
319 | t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN); | 373 | t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN); |
320 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx); | 374 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx); |
321 | t3_write_reg(adap, A_TP_PIO_DATA, 0xbf000001); | 375 | t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401); |
322 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE); | 376 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE); |
323 | t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx); | 377 | t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx); |
378 | |||
379 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CNT_CH0 + idx); | ||
380 | mac->tx_mcnt = s->tx_frames; | ||
381 | mac->tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap, | ||
382 | A_TP_PIO_DATA))); | ||
383 | mac->tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap, | ||
384 | A_XGM_TX_SPI4_SOP_EOP_CNT + | ||
385 | oft))); | ||
386 | mac->rx_mcnt = s->rx_frames; | ||
387 | mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap, | ||
388 | A_XGM_RX_SPI4_SOP_EOP_CNT + | ||
389 | oft))); | ||
390 | mac->txen = F_TXEN; | ||
391 | mac->toggle_cnt = 0; | ||
324 | } | 392 | } |
325 | if (which & MAC_DIRECTION_RX) | 393 | if (which & MAC_DIRECTION_RX) |
326 | t3_write_reg(adap, A_XGM_RX_CTRL + oft, F_RXEN); | 394 | t3_write_reg(adap, A_XGM_RX_CTRL + oft, F_RXEN); |
@@ -331,19 +399,102 @@ int t3_mac_disable(struct cmac *mac, int which) | |||
331 | { | 399 | { |
332 | int idx = macidx(mac); | 400 | int idx = macidx(mac); |
333 | struct adapter *adap = mac->adapter; | 401 | struct adapter *adap = mac->adapter; |
402 | int val; | ||
334 | 403 | ||
335 | if (which & MAC_DIRECTION_TX) { | 404 | if (which & MAC_DIRECTION_TX) { |
336 | t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0); | 405 | t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0); |
337 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx); | 406 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx); |
338 | t3_write_reg(adap, A_TP_PIO_DATA, 0xc000001f); | 407 | t3_write_reg(adap, A_TP_PIO_DATA, 0xc000001f); |
339 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE); | 408 | t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE); |
340 | t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 0); | 409 | t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx); |
410 | mac->txen = 0; | ||
341 | } | 411 | } |
342 | if (which & MAC_DIRECTION_RX) | 412 | if (which & MAC_DIRECTION_RX) { |
413 | t3_set_reg_field(mac->adapter, A_XGM_RESET_CTRL + mac->offset, | ||
414 | F_PCS_RESET_, 0); | ||
415 | msleep(100); | ||
343 | t3_write_reg(adap, A_XGM_RX_CTRL + mac->offset, 0); | 416 | t3_write_reg(adap, A_XGM_RX_CTRL + mac->offset, 0); |
417 | val = F_MAC_RESET_; | ||
418 | if (is_10G(adap)) | ||
419 | val |= F_PCS_RESET_; | ||
420 | else if (uses_xaui(adap)) | ||
421 | val |= F_PCS_RESET_ | F_XG2G_RESET_; | ||
422 | else | ||
423 | val |= F_RGMII_RESET_ | F_XG2G_RESET_; | ||
424 | t3_write_reg(mac->adapter, A_XGM_RESET_CTRL + mac->offset, val); | ||
425 | } | ||
344 | return 0; | 426 | return 0; |
345 | } | 427 | } |
346 | 428 | ||
429 | int t3b2_mac_watchdog_task(struct cmac *mac) | ||
430 | { | ||
431 | struct adapter *adap = mac->adapter; | ||
432 | struct mac_stats *s = &mac->stats; | ||
433 | unsigned int tx_tcnt, tx_xcnt; | ||
434 | unsigned int tx_mcnt = s->tx_frames; | ||
435 | unsigned int rx_mcnt = s->rx_frames; | ||
436 | unsigned int rx_xcnt; | ||
437 | int status; | ||
438 | |||
439 | if (tx_mcnt == mac->tx_mcnt) { | ||
440 | tx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap, | ||
441 | A_XGM_TX_SPI4_SOP_EOP_CNT + | ||
442 | mac->offset))); | ||
443 | if (tx_xcnt == 0) { | ||
444 | t3_write_reg(adap, A_TP_PIO_ADDR, | ||
445 | A_TP_TX_DROP_CNT_CH0 + macidx(mac)); | ||
446 | tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap, | ||
447 | A_TP_PIO_DATA))); | ||
448 | } else { | ||
449 | mac->toggle_cnt = 0; | ||
450 | return 0; | ||
451 | } | ||
452 | } else { | ||
453 | mac->toggle_cnt = 0; | ||
454 | return 0; | ||
455 | } | ||
456 | |||
457 | if (((tx_tcnt != mac->tx_tcnt) && | ||
458 | (tx_xcnt == 0) && (mac->tx_xcnt == 0)) || | ||
459 | ((mac->tx_mcnt == tx_mcnt) && | ||
460 | (tx_xcnt != 0) && (mac->tx_xcnt != 0))) { | ||
461 | if (mac->toggle_cnt > 4) | ||
462 | status = 2; | ||
463 | else | ||
464 | status = 1; | ||
465 | } else { | ||
466 | mac->toggle_cnt = 0; | ||
467 | return 0; | ||
468 | } | ||
469 | |||
470 | if (rx_mcnt != mac->rx_mcnt) | ||
471 | rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap, | ||
472 | A_XGM_RX_SPI4_SOP_EOP_CNT + | ||
473 | mac->offset))); | ||
474 | else | ||
475 | return 0; | ||
476 | |||
477 | if (mac->rx_mcnt != s->rx_frames && rx_xcnt == 0 && mac->rx_xcnt == 0) | ||
478 | status = 2; | ||
479 | |||
480 | mac->tx_tcnt = tx_tcnt; | ||
481 | mac->tx_xcnt = tx_xcnt; | ||
482 | mac->tx_mcnt = s->tx_frames; | ||
483 | mac->rx_xcnt = rx_xcnt; | ||
484 | mac->rx_mcnt = s->rx_frames; | ||
485 | if (status == 1) { | ||
486 | t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0); | ||
487 | t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */ | ||
488 | t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, mac->txen); | ||
489 | t3_read_reg(adap, A_XGM_TX_CTRL + mac->offset); /* flush */ | ||
490 | mac->toggle_cnt++; | ||
491 | } else if (status == 2) { | ||
492 | t3b2_mac_reset(mac); | ||
493 | mac->toggle_cnt = 0; | ||
494 | } | ||
495 | return status; | ||
496 | } | ||
497 | |||
347 | /* | 498 | /* |
348 | * This function is called periodically to accumulate the current values of the | 499 | * This function is called periodically to accumulate the current values of the |
349 | * RMON counters into the port statistics. Since the packet counters are only | 500 | * RMON counters into the port statistics. Since the packet counters are only |
@@ -373,7 +524,11 @@ const struct mac_stats *t3_mac_update_stats(struct cmac *mac) | |||
373 | RMON_UPDATE(mac, rx_symbol_errs, RX_SYM_CODE_ERR_FRAMES); | 524 | RMON_UPDATE(mac, rx_symbol_errs, RX_SYM_CODE_ERR_FRAMES); |
374 | 525 | ||
375 | RMON_UPDATE(mac, rx_too_long, RX_OVERSIZE_FRAMES); | 526 | RMON_UPDATE(mac, rx_too_long, RX_OVERSIZE_FRAMES); |
376 | mac->stats.rx_too_long += RMON_READ(mac, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT); | 527 | |
528 | v = RMON_READ(mac, A_XGM_RX_MAX_PKT_SIZE_ERR_CNT); | ||
529 | if (mac->adapter->params.rev == T3_REV_B2) | ||
530 | v &= 0x7fffffff; | ||
531 | mac->stats.rx_too_long += v; | ||
377 | 532 | ||
378 | RMON_UPDATE(mac, rx_frames_64, RX_64B_FRAMES); | 533 | RMON_UPDATE(mac, rx_frames_64, RX_64B_FRAMES); |
379 | RMON_UPDATE(mac, rx_frames_65_127, RX_65_127B_FRAMES); | 534 | RMON_UPDATE(mac, rx_frames_65_127, RX_65_127B_FRAMES); |
diff --git a/drivers/net/depca.c b/drivers/net/depca.c index 5113eef755b9..f3807aaf10aa 100644 --- a/drivers/net/depca.c +++ b/drivers/net/depca.c | |||
@@ -1491,8 +1491,9 @@ static void __init depca_platform_probe (void) | |||
1491 | depca_io_ports[i].device = pldev; | 1491 | depca_io_ports[i].device = pldev; |
1492 | 1492 | ||
1493 | if (platform_device_add(pldev)) { | 1493 | if (platform_device_add(pldev)) { |
1494 | platform_device_put(pldev); | ||
1495 | depca_io_ports[i].device = NULL; | 1494 | depca_io_ports[i].device = NULL; |
1495 | pldev->dev.platform_data = NULL; | ||
1496 | platform_device_put(pldev); | ||
1496 | continue; | 1497 | continue; |
1497 | } | 1498 | } |
1498 | 1499 | ||
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 1d08e937af82..b28a915bd980 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -3796,7 +3796,7 @@ e1000_intr_msi(int irq, void *data) | |||
3796 | 3796 | ||
3797 | for (i = 0; i < E1000_MAX_INTR; i++) | 3797 | for (i = 0; i < E1000_MAX_INTR; i++) |
3798 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | 3798 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & |
3799 | e1000_clean_tx_irq(adapter, adapter->tx_ring))) | 3799 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
3800 | break; | 3800 | break; |
3801 | 3801 | ||
3802 | if (likely(adapter->itr_setting & 3)) | 3802 | if (likely(adapter->itr_setting & 3)) |
@@ -3899,7 +3899,7 @@ e1000_intr(int irq, void *data) | |||
3899 | 3899 | ||
3900 | for (i = 0; i < E1000_MAX_INTR; i++) | 3900 | for (i = 0; i < E1000_MAX_INTR; i++) |
3901 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & | 3901 | if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) & |
3902 | e1000_clean_tx_irq(adapter, adapter->tx_ring))) | 3902 | !e1000_clean_tx_irq(adapter, adapter->tx_ring))) |
3903 | break; | 3903 | break; |
3904 | 3904 | ||
3905 | if (likely(adapter->itr_setting & 3)) | 3905 | if (likely(adapter->itr_setting & 3)) |
@@ -3949,7 +3949,7 @@ e1000_clean(struct net_device *poll_dev, int *budget) | |||
3949 | poll_dev->quota -= work_done; | 3949 | poll_dev->quota -= work_done; |
3950 | 3950 | ||
3951 | /* If no Tx and not enough Rx work done, exit the polling mode */ | 3951 | /* If no Tx and not enough Rx work done, exit the polling mode */ |
3952 | if ((tx_cleaned && (work_done < work_to_do)) || | 3952 | if ((!tx_cleaned && (work_done == 0)) || |
3953 | !netif_running(poll_dev)) { | 3953 | !netif_running(poll_dev)) { |
3954 | quit_polling: | 3954 | quit_polling: |
3955 | if (likely(adapter->itr_setting & 3)) | 3955 | if (likely(adapter->itr_setting & 3)) |
@@ -3979,7 +3979,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
3979 | #ifdef CONFIG_E1000_NAPI | 3979 | #ifdef CONFIG_E1000_NAPI |
3980 | unsigned int count = 0; | 3980 | unsigned int count = 0; |
3981 | #endif | 3981 | #endif |
3982 | boolean_t cleaned = TRUE; | 3982 | boolean_t cleaned = FALSE; |
3983 | unsigned int total_tx_bytes=0, total_tx_packets=0; | 3983 | unsigned int total_tx_bytes=0, total_tx_packets=0; |
3984 | 3984 | ||
3985 | i = tx_ring->next_to_clean; | 3985 | i = tx_ring->next_to_clean; |
@@ -4013,10 +4013,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
4013 | #ifdef CONFIG_E1000_NAPI | 4013 | #ifdef CONFIG_E1000_NAPI |
4014 | #define E1000_TX_WEIGHT 64 | 4014 | #define E1000_TX_WEIGHT 64 |
4015 | /* weight of a sort for tx, to avoid endless transmit cleanup */ | 4015 | /* weight of a sort for tx, to avoid endless transmit cleanup */ |
4016 | if (count++ == E1000_TX_WEIGHT) { | 4016 | if (count++ == E1000_TX_WEIGHT) break; |
4017 | cleaned = FALSE; | ||
4018 | break; | ||
4019 | } | ||
4020 | #endif | 4017 | #endif |
4021 | } | 4018 | } |
4022 | 4019 | ||
diff --git a/drivers/net/ewrk3.c b/drivers/net/ewrk3.c index c8c41f0a47d6..714ea1176ec7 100644 --- a/drivers/net/ewrk3.c +++ b/drivers/net/ewrk3.c | |||
@@ -414,10 +414,9 @@ ewrk3_hw_init(struct net_device *dev, u_long iobase) | |||
414 | icr &= 0x70; | 414 | icr &= 0x70; |
415 | outb(icr, EWRK3_ICR); /* Disable all the IRQs */ | 415 | outb(icr, EWRK3_ICR); /* Disable all the IRQs */ |
416 | 416 | ||
417 | if (nicsr == (CSR_TXD | CSR_RXD)) | 417 | if (nicsr != (CSR_TXD | CSR_RXD)) |
418 | return -ENXIO; | 418 | return -ENXIO; |
419 | 419 | ||
420 | |||
421 | /* Check that the EEPROM is alive and well and not living on Pluto... */ | 420 | /* Check that the EEPROM is alive and well and not living on Pluto... */ |
422 | for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) { | 421 | for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) { |
423 | union { | 422 | union { |
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 46e1697d9cfd..d04214e4e581 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -2050,9 +2050,10 @@ static void nv_tx_timeout(struct net_device *dev) | |||
2050 | nv_drain_tx(dev); | 2050 | nv_drain_tx(dev); |
2051 | nv_init_tx(dev); | 2051 | nv_init_tx(dev); |
2052 | setup_hw_rings(dev, NV_SETUP_TX_RING); | 2052 | setup_hw_rings(dev, NV_SETUP_TX_RING); |
2053 | netif_wake_queue(dev); | ||
2054 | } | 2053 | } |
2055 | 2054 | ||
2055 | netif_wake_queue(dev); | ||
2056 | |||
2056 | /* 4) restart tx engine */ | 2057 | /* 4) restart tx engine */ |
2057 | nv_start_tx(dev); | 2058 | nv_start_tx(dev); |
2058 | spin_unlock_irq(&np->lock); | 2059 | spin_unlock_irq(&np->lock); |
@@ -3536,7 +3537,10 @@ static void nv_do_nic_poll(unsigned long data) | |||
3536 | pci_push(base); | 3537 | pci_push(base); |
3537 | 3538 | ||
3538 | if (!using_multi_irqs(dev)) { | 3539 | if (!using_multi_irqs(dev)) { |
3539 | nv_nic_irq(0, dev); | 3540 | if (np->desc_ver == DESC_VER_3) |
3541 | nv_nic_irq_optimized(0, dev); | ||
3542 | else | ||
3543 | nv_nic_irq(0, dev); | ||
3540 | if (np->msi_flags & NV_MSI_X_ENABLED) | 3544 | if (np->msi_flags & NV_MSI_X_ENABLED) |
3541 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); | 3545 | enable_irq_lockdep(np->msi_x_entry[NV_MSI_X_VECTOR_ALL].vector); |
3542 | else | 3546 | else |
diff --git a/drivers/net/hamradio/baycom_ser_fdx.c b/drivers/net/hamradio/baycom_ser_fdx.c index 59214e74b9cf..30baf6ecfc63 100644 --- a/drivers/net/hamradio/baycom_ser_fdx.c +++ b/drivers/net/hamradio/baycom_ser_fdx.c | |||
@@ -75,12 +75,14 @@ | |||
75 | #include <linux/ioport.h> | 75 | #include <linux/ioport.h> |
76 | #include <linux/string.h> | 76 | #include <linux/string.h> |
77 | #include <linux/init.h> | 77 | #include <linux/init.h> |
78 | #include <asm/uaccess.h> | ||
79 | #include <asm/io.h> | ||
80 | #include <linux/hdlcdrv.h> | 78 | #include <linux/hdlcdrv.h> |
81 | #include <linux/baycom.h> | 79 | #include <linux/baycom.h> |
82 | #include <linux/jiffies.h> | 80 | #include <linux/jiffies.h> |
83 | 81 | ||
82 | #include <asm/uaccess.h> | ||
83 | #include <asm/io.h> | ||
84 | #include <asm/irq.h> | ||
85 | |||
84 | /* --------------------------------------------------------------------- */ | 86 | /* --------------------------------------------------------------------- */ |
85 | 87 | ||
86 | #define BAYCOM_DEBUG | 88 | #define BAYCOM_DEBUG |
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c index ca2b21f9d444..07b4c0d7a75c 100644 --- a/drivers/net/ifb.c +++ b/drivers/net/ifb.c | |||
@@ -96,17 +96,24 @@ static void ri_tasklet(unsigned long dev) | |||
96 | skb->tc_verd = SET_TC_NCLS(skb->tc_verd); | 96 | skb->tc_verd = SET_TC_NCLS(skb->tc_verd); |
97 | stats->tx_packets++; | 97 | stats->tx_packets++; |
98 | stats->tx_bytes +=skb->len; | 98 | stats->tx_bytes +=skb->len; |
99 | |||
100 | skb->dev = __dev_get_by_index(skb->iif); | ||
101 | if (!skb->dev) { | ||
102 | dev_kfree_skb(skb); | ||
103 | stats->tx_dropped++; | ||
104 | break; | ||
105 | } | ||
106 | skb->iif = _dev->ifindex; | ||
107 | |||
99 | if (from & AT_EGRESS) { | 108 | if (from & AT_EGRESS) { |
100 | dp->st_rx_frm_egr++; | 109 | dp->st_rx_frm_egr++; |
101 | dev_queue_xmit(skb); | 110 | dev_queue_xmit(skb); |
102 | } else if (from & AT_INGRESS) { | 111 | } else if (from & AT_INGRESS) { |
103 | |||
104 | dp->st_rx_frm_ing++; | 112 | dp->st_rx_frm_ing++; |
113 | skb_pull(skb, skb->dev->hard_header_len); | ||
105 | netif_rx(skb); | 114 | netif_rx(skb); |
106 | } else { | 115 | } else |
107 | dev_kfree_skb(skb); | 116 | BUG(); |
108 | stats->tx_dropped++; | ||
109 | } | ||
110 | } | 117 | } |
111 | 118 | ||
112 | if (netif_tx_trylock(_dev)) { | 119 | if (netif_tx_trylock(_dev)) { |
@@ -157,26 +164,10 @@ static int ifb_xmit(struct sk_buff *skb, struct net_device *dev) | |||
157 | stats->rx_packets++; | 164 | stats->rx_packets++; |
158 | stats->rx_bytes+=skb->len; | 165 | stats->rx_bytes+=skb->len; |
159 | 166 | ||
160 | if (!from || !skb->input_dev) { | 167 | if (!(from & (AT_INGRESS|AT_EGRESS)) || !skb->iif) { |
161 | dropped: | ||
162 | dev_kfree_skb(skb); | 168 | dev_kfree_skb(skb); |
163 | stats->rx_dropped++; | 169 | stats->rx_dropped++; |
164 | return ret; | 170 | return ret; |
165 | } else { | ||
166 | /* | ||
167 | * note we could be going | ||
168 | * ingress -> egress or | ||
169 | * egress -> ingress | ||
170 | */ | ||
171 | skb->dev = skb->input_dev; | ||
172 | skb->input_dev = dev; | ||
173 | if (from & AT_INGRESS) { | ||
174 | skb_pull(skb, skb->dev->hard_header_len); | ||
175 | } else { | ||
176 | if (!(from & AT_EGRESS)) { | ||
177 | goto dropped; | ||
178 | } | ||
179 | } | ||
180 | } | 171 | } |
181 | 172 | ||
182 | if (skb_queue_len(&dp->rq) >= dev->tx_queue_len) { | 173 | if (skb_queue_len(&dp->rq) >= dev->tx_queue_len) { |
diff --git a/drivers/net/irda/irda-usb.c b/drivers/net/irda/irda-usb.c index 340ee99652eb..1d510bdc9b84 100644 --- a/drivers/net/irda/irda-usb.c +++ b/drivers/net/irda/irda-usb.c | |||
@@ -1057,6 +1057,8 @@ static int stir421x_fw_upload(struct irda_usb_cb *self, | |||
1057 | 1057 | ||
1058 | if (ret < 0) | 1058 | if (ret < 0) |
1059 | break; | 1059 | break; |
1060 | |||
1061 | mdelay(10); | ||
1060 | } | 1062 | } |
1061 | 1063 | ||
1062 | kfree(patch_block); | 1064 | kfree(patch_block); |
diff --git a/drivers/net/irda/pxaficp_ir.c b/drivers/net/irda/pxaficp_ir.c index 9137e239fac2..2272156af31e 100644 --- a/drivers/net/irda/pxaficp_ir.c +++ b/drivers/net/irda/pxaficp_ir.c | |||
@@ -321,15 +321,22 @@ static void pxa_irda_fir_dma_tx_irq(int channel, void *data) | |||
321 | pxa_irda_set_speed(si, si->newspeed); | 321 | pxa_irda_set_speed(si, si->newspeed); |
322 | si->newspeed = 0; | 322 | si->newspeed = 0; |
323 | } else { | 323 | } else { |
324 | int i = 64; | ||
325 | |||
324 | ICCR0 = 0; | 326 | ICCR0 = 0; |
325 | pxa_irda_fir_dma_rx_start(si); | 327 | pxa_irda_fir_dma_rx_start(si); |
328 | while ((ICSR1 & ICSR1_RNE) && i--) | ||
329 | (void)ICDR; | ||
326 | ICCR0 = ICCR0_ITR | ICCR0_RXE; | 330 | ICCR0 = ICCR0_ITR | ICCR0_RXE; |
331 | |||
332 | if (i < 0) | ||
333 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); | ||
327 | } | 334 | } |
328 | netif_wake_queue(dev); | 335 | netif_wake_queue(dev); |
329 | } | 336 | } |
330 | 337 | ||
331 | /* EIF(Error in FIFO/End in Frame) handler for FIR */ | 338 | /* EIF(Error in FIFO/End in Frame) handler for FIR */ |
332 | static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev) | 339 | static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0) |
333 | { | 340 | { |
334 | unsigned int len, stat, data; | 341 | unsigned int len, stat, data; |
335 | 342 | ||
@@ -350,7 +357,7 @@ static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev) | |||
350 | } | 357 | } |
351 | if (stat & ICSR1_ROR) { | 358 | if (stat & ICSR1_ROR) { |
352 | printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); | 359 | printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); |
353 | si->stats.rx_frame_errors++; | 360 | si->stats.rx_over_errors++; |
354 | } | 361 | } |
355 | } else { | 362 | } else { |
356 | si->dma_rx_buff[len++] = data; | 363 | si->dma_rx_buff[len++] = data; |
@@ -362,7 +369,15 @@ static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev) | |||
362 | 369 | ||
363 | if (stat & ICSR1_EOF) { | 370 | if (stat & ICSR1_EOF) { |
364 | /* end of frame. */ | 371 | /* end of frame. */ |
365 | struct sk_buff *skb = alloc_skb(len+1,GFP_ATOMIC); | 372 | struct sk_buff *skb; |
373 | |||
374 | if (icsr0 & ICSR0_FRE) { | ||
375 | printk(KERN_ERR "pxa_ir: dropping erroneous frame\n"); | ||
376 | si->stats.rx_dropped++; | ||
377 | return; | ||
378 | } | ||
379 | |||
380 | skb = alloc_skb(len+1,GFP_ATOMIC); | ||
366 | if (!skb) { | 381 | if (!skb) { |
367 | printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); | 382 | printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); |
368 | si->stats.rx_dropped++; | 383 | si->stats.rx_dropped++; |
@@ -392,7 +407,7 @@ static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) | |||
392 | { | 407 | { |
393 | struct net_device *dev = dev_id; | 408 | struct net_device *dev = dev_id; |
394 | struct pxa_irda *si = netdev_priv(dev); | 409 | struct pxa_irda *si = netdev_priv(dev); |
395 | int icsr0; | 410 | int icsr0, i = 64; |
396 | 411 | ||
397 | /* stop RX DMA */ | 412 | /* stop RX DMA */ |
398 | DCSR(si->rxdma) &= ~DCSR_RUN; | 413 | DCSR(si->rxdma) &= ~DCSR_RUN; |
@@ -412,13 +427,18 @@ static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) | |||
412 | 427 | ||
413 | if (icsr0 & ICSR0_EIF) { | 428 | if (icsr0 & ICSR0_EIF) { |
414 | /* An error in FIFO occured, or there is a end of frame */ | 429 | /* An error in FIFO occured, or there is a end of frame */ |
415 | pxa_irda_fir_irq_eif(si, dev); | 430 | pxa_irda_fir_irq_eif(si, dev, icsr0); |
416 | } | 431 | } |
417 | 432 | ||
418 | ICCR0 = 0; | 433 | ICCR0 = 0; |
419 | pxa_irda_fir_dma_rx_start(si); | 434 | pxa_irda_fir_dma_rx_start(si); |
435 | while ((ICSR1 & ICSR1_RNE) && i--) | ||
436 | (void)ICDR; | ||
420 | ICCR0 = ICCR0_ITR | ICCR0_RXE; | 437 | ICCR0 = ICCR0_ITR | ICCR0_RXE; |
421 | 438 | ||
439 | if (i < 0) | ||
440 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); | ||
441 | |||
422 | return IRQ_HANDLED; | 442 | return IRQ_HANDLED; |
423 | } | 443 | } |
424 | 444 | ||
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c index 1ee27c360a4b..8015a7c5b0c9 100644 --- a/drivers/net/mv643xx_eth.c +++ b/drivers/net/mv643xx_eth.c | |||
@@ -1379,7 +1379,7 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
1379 | 1379 | ||
1380 | spin_lock_init(&mp->lock); | 1380 | spin_lock_init(&mp->lock); |
1381 | 1381 | ||
1382 | port_num = pd->port_number; | 1382 | port_num = mp->port_num = pd->port_number; |
1383 | 1383 | ||
1384 | /* set default config values */ | 1384 | /* set default config values */ |
1385 | eth_port_uc_addr_get(dev, dev->dev_addr); | 1385 | eth_port_uc_addr_get(dev, dev->dev_addr); |
@@ -1411,8 +1411,6 @@ static int mv643xx_eth_probe(struct platform_device *pdev) | |||
1411 | duplex = pd->duplex; | 1411 | duplex = pd->duplex; |
1412 | speed = pd->speed; | 1412 | speed = pd->speed; |
1413 | 1413 | ||
1414 | mp->port_num = port_num; | ||
1415 | |||
1416 | /* Hook up MII support for ethtool */ | 1414 | /* Hook up MII support for ethtool */ |
1417 | mp->mii.dev = dev; | 1415 | mp->mii.dev = dev; |
1418 | mp->mii.mdio_read = mv643xx_mdio_read; | 1416 | mp->mii.mdio_read = mv643xx_mdio_read; |
@@ -1516,9 +1514,23 @@ static int mv643xx_eth_shared_remove(struct platform_device *pdev) | |||
1516 | return 0; | 1514 | return 0; |
1517 | } | 1515 | } |
1518 | 1516 | ||
1517 | static void mv643xx_eth_shutdown(struct platform_device *pdev) | ||
1518 | { | ||
1519 | struct net_device *dev = platform_get_drvdata(pdev); | ||
1520 | struct mv643xx_private *mp = netdev_priv(dev); | ||
1521 | unsigned int port_num = mp->port_num; | ||
1522 | |||
1523 | /* Mask all interrupts on ethernet port */ | ||
1524 | mv_write(MV643XX_ETH_INTERRUPT_MASK_REG(port_num), 0); | ||
1525 | mv_read (MV643XX_ETH_INTERRUPT_MASK_REG(port_num)); | ||
1526 | |||
1527 | eth_port_reset(port_num); | ||
1528 | } | ||
1529 | |||
1519 | static struct platform_driver mv643xx_eth_driver = { | 1530 | static struct platform_driver mv643xx_eth_driver = { |
1520 | .probe = mv643xx_eth_probe, | 1531 | .probe = mv643xx_eth_probe, |
1521 | .remove = mv643xx_eth_remove, | 1532 | .remove = mv643xx_eth_remove, |
1533 | .shutdown = mv643xx_eth_shutdown, | ||
1522 | .driver = { | 1534 | .driver = { |
1523 | .name = MV643XX_ETH_NAME, | 1535 | .name = MV643XX_ETH_NAME, |
1524 | }, | 1536 | }, |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index ac02b3b60f92..f8efe0e70a6b 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -71,7 +71,7 @@ | |||
71 | #include "myri10ge_mcp.h" | 71 | #include "myri10ge_mcp.h" |
72 | #include "myri10ge_mcp_gen_header.h" | 72 | #include "myri10ge_mcp_gen_header.h" |
73 | 73 | ||
74 | #define MYRI10GE_VERSION_STR "1.2.0" | 74 | #define MYRI10GE_VERSION_STR "1.3.0-1.233" |
75 | 75 | ||
76 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); | 76 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); |
77 | MODULE_AUTHOR("Maintainer: help@myri.com"); | 77 | MODULE_AUTHOR("Maintainer: help@myri.com"); |
@@ -234,7 +234,7 @@ static int myri10ge_msi = 1; /* enable msi by default */ | |||
234 | module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR); | 234 | module_param(myri10ge_msi, int, S_IRUGO | S_IWUSR); |
235 | MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n"); | 235 | MODULE_PARM_DESC(myri10ge_msi, "Enable Message Signalled Interrupts\n"); |
236 | 236 | ||
237 | static int myri10ge_intr_coal_delay = 25; | 237 | static int myri10ge_intr_coal_delay = 75; |
238 | module_param(myri10ge_intr_coal_delay, int, S_IRUGO); | 238 | module_param(myri10ge_intr_coal_delay, int, S_IRUGO); |
239 | MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n"); | 239 | MODULE_PARM_DESC(myri10ge_intr_coal_delay, "Interrupt coalescing delay\n"); |
240 | 240 | ||
@@ -279,7 +279,7 @@ static int myri10ge_fill_thresh = 256; | |||
279 | module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR); | 279 | module_param(myri10ge_fill_thresh, int, S_IRUGO | S_IWUSR); |
280 | MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n"); | 280 | MODULE_PARM_DESC(myri10ge_fill_thresh, "Number of empty rx slots allowed\n"); |
281 | 281 | ||
282 | static int myri10ge_wcfifo = 1; | 282 | static int myri10ge_wcfifo = 0; |
283 | module_param(myri10ge_wcfifo, int, S_IRUGO); | 283 | module_param(myri10ge_wcfifo, int, S_IRUGO); |
284 | MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n"); | 284 | MODULE_PARM_DESC(myri10ge_wcfifo, "Enable WC Fifo when WC is enabled\n"); |
285 | 285 | ||
@@ -900,9 +900,7 @@ myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx, | |||
900 | /* try to refill entire ring */ | 900 | /* try to refill entire ring */ |
901 | while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) { | 901 | while (rx->fill_cnt != (rx->cnt + rx->mask + 1)) { |
902 | idx = rx->fill_cnt & rx->mask; | 902 | idx = rx->fill_cnt & rx->mask; |
903 | 903 | if (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE) { | |
904 | if ((bytes < MYRI10GE_ALLOC_SIZE / 2) && | ||
905 | (rx->page_offset + bytes <= MYRI10GE_ALLOC_SIZE)) { | ||
906 | /* we can use part of previous page */ | 904 | /* we can use part of previous page */ |
907 | get_page(rx->page); | 905 | get_page(rx->page); |
908 | } else { | 906 | } else { |
@@ -933,6 +931,13 @@ myri10ge_alloc_rx_pages(struct myri10ge_priv *mgp, struct myri10ge_rx_buf *rx, | |||
933 | 931 | ||
934 | /* start next packet on a cacheline boundary */ | 932 | /* start next packet on a cacheline boundary */ |
935 | rx->page_offset += SKB_DATA_ALIGN(bytes); | 933 | rx->page_offset += SKB_DATA_ALIGN(bytes); |
934 | |||
935 | #if MYRI10GE_ALLOC_SIZE > 4096 | ||
936 | /* don't cross a 4KB boundary */ | ||
937 | if ((rx->page_offset >> 12) != | ||
938 | ((rx->page_offset + bytes - 1) >> 12)) | ||
939 | rx->page_offset = (rx->page_offset + 4096) & ~4095; | ||
940 | #endif | ||
936 | rx->fill_cnt++; | 941 | rx->fill_cnt++; |
937 | 942 | ||
938 | /* copy 8 descriptors to the firmware at a time */ | 943 | /* copy 8 descriptors to the firmware at a time */ |
@@ -2007,10 +2012,9 @@ again: | |||
2007 | mss = 0; | 2012 | mss = 0; |
2008 | max_segments = MXGEFW_MAX_SEND_DESC; | 2013 | max_segments = MXGEFW_MAX_SEND_DESC; |
2009 | 2014 | ||
2010 | if (skb->len > (dev->mtu + ETH_HLEN)) { | 2015 | if (skb_is_gso(skb)) { |
2011 | mss = skb_shinfo(skb)->gso_size; | 2016 | mss = skb_shinfo(skb)->gso_size; |
2012 | if (mss != 0) | 2017 | max_segments = MYRI10GE_MAX_SEND_DESC_TSO; |
2013 | max_segments = MYRI10GE_MAX_SEND_DESC_TSO; | ||
2014 | } | 2018 | } |
2015 | 2019 | ||
2016 | if ((unlikely(avail < max_segments))) { | 2020 | if ((unlikely(avail < max_segments))) { |
@@ -2483,6 +2487,12 @@ static void myri10ge_enable_ecrc(struct myri10ge_priv *mgp) | |||
2483 | 2487 | ||
2484 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 | 2488 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE23 0x25f7 |
2485 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa | 2489 | #define PCI_DEVICE_ID_INTEL_E5000_PCIE47 0x25fa |
2490 | #define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 0x3510 | ||
2491 | #define PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4 0x351b | ||
2492 | #define PCI_DEVICE_ID_INTEL_E3000_PCIE 0x2779 | ||
2493 | #define PCI_DEVICE_ID_INTEL_E3010_PCIE 0x277a | ||
2494 | #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST 0x140 | ||
2495 | #define PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST 0x142 | ||
2486 | 2496 | ||
2487 | static void myri10ge_select_firmware(struct myri10ge_priv *mgp) | 2497 | static void myri10ge_select_firmware(struct myri10ge_priv *mgp) |
2488 | { | 2498 | { |
@@ -2514,6 +2524,24 @@ static void myri10ge_select_firmware(struct myri10ge_priv *mgp) | |||
2514 | ((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS | 2524 | ((bridge->vendor == PCI_VENDOR_ID_SERVERWORKS |
2515 | && bridge->device == | 2525 | && bridge->device == |
2516 | PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE) | 2526 | PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE) |
2527 | /* ServerWorks HT2100 */ | ||
2528 | || (bridge->vendor == PCI_VENDOR_ID_SERVERWORKS | ||
2529 | && bridge->device >= | ||
2530 | PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_FIRST | ||
2531 | && bridge->device <= | ||
2532 | PCI_DEVICE_ID_SERVERWORKS_HT2100_PCIE_LAST) | ||
2533 | /* All Intel E3000/E3010 PCIE ports */ | ||
2534 | || (bridge->vendor == PCI_VENDOR_ID_INTEL | ||
2535 | && (bridge->device == | ||
2536 | PCI_DEVICE_ID_INTEL_E3000_PCIE | ||
2537 | || bridge->device == | ||
2538 | PCI_DEVICE_ID_INTEL_E3010_PCIE)) | ||
2539 | /* All Intel 6310/6311/6321ESB PCIE ports */ | ||
2540 | || (bridge->vendor == PCI_VENDOR_ID_INTEL | ||
2541 | && bridge->device >= | ||
2542 | PCI_DEVICE_ID_INTEL_6300ESB_PCIEE1 | ||
2543 | && bridge->device <= | ||
2544 | PCI_DEVICE_ID_INTEL_6300ESB_PCIEE4) | ||
2517 | /* All Intel E5000 PCIE ports */ | 2545 | /* All Intel E5000 PCIE ports */ |
2518 | || (bridge->vendor == PCI_VENDOR_ID_INTEL | 2546 | || (bridge->vendor == PCI_VENDOR_ID_INTEL |
2519 | && bridge->device >= | 2547 | && bridge->device >= |
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index c6172a77a6d7..349b96a3ec4c 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c | |||
@@ -1712,7 +1712,7 @@ static void init_registers(struct net_device *dev) | |||
1712 | 1712 | ||
1713 | /* Enable interrupts by setting the interrupt mask. */ | 1713 | /* Enable interrupts by setting the interrupt mask. */ |
1714 | writel(DEFAULT_INTR, ioaddr + IntrMask); | 1714 | writel(DEFAULT_INTR, ioaddr + IntrMask); |
1715 | writel(1, ioaddr + IntrEnable); | 1715 | natsemi_irq_enable(dev); |
1716 | 1716 | ||
1717 | writel(RxOn | TxOn, ioaddr + ChipCmd); | 1717 | writel(RxOn | TxOn, ioaddr + ChipCmd); |
1718 | writel(StatsClear, ioaddr + StatsCtrl); /* Clear Stats */ | 1718 | writel(StatsClear, ioaddr + StatsCtrl); /* Clear Stats */ |
@@ -2119,28 +2119,35 @@ static irqreturn_t intr_handler(int irq, void *dev_instance) | |||
2119 | struct netdev_private *np = netdev_priv(dev); | 2119 | struct netdev_private *np = netdev_priv(dev); |
2120 | void __iomem * ioaddr = ns_ioaddr(dev); | 2120 | void __iomem * ioaddr = ns_ioaddr(dev); |
2121 | 2121 | ||
2122 | if (np->hands_off) | 2122 | /* Reading IntrStatus automatically acknowledges so don't do |
2123 | * that while interrupts are disabled, (for example, while a | ||
2124 | * poll is scheduled). */ | ||
2125 | if (np->hands_off || !readl(ioaddr + IntrEnable)) | ||
2123 | return IRQ_NONE; | 2126 | return IRQ_NONE; |
2124 | 2127 | ||
2125 | /* Reading automatically acknowledges. */ | ||
2126 | np->intr_status = readl(ioaddr + IntrStatus); | 2128 | np->intr_status = readl(ioaddr + IntrStatus); |
2127 | 2129 | ||
2130 | if (!np->intr_status) | ||
2131 | return IRQ_NONE; | ||
2132 | |||
2128 | if (netif_msg_intr(np)) | 2133 | if (netif_msg_intr(np)) |
2129 | printk(KERN_DEBUG | 2134 | printk(KERN_DEBUG |
2130 | "%s: Interrupt, status %#08x, mask %#08x.\n", | 2135 | "%s: Interrupt, status %#08x, mask %#08x.\n", |
2131 | dev->name, np->intr_status, | 2136 | dev->name, np->intr_status, |
2132 | readl(ioaddr + IntrMask)); | 2137 | readl(ioaddr + IntrMask)); |
2133 | 2138 | ||
2134 | if (!np->intr_status) | ||
2135 | return IRQ_NONE; | ||
2136 | |||
2137 | prefetch(&np->rx_skbuff[np->cur_rx % RX_RING_SIZE]); | 2139 | prefetch(&np->rx_skbuff[np->cur_rx % RX_RING_SIZE]); |
2138 | 2140 | ||
2139 | if (netif_rx_schedule_prep(dev)) { | 2141 | if (netif_rx_schedule_prep(dev)) { |
2140 | /* Disable interrupts and register for poll */ | 2142 | /* Disable interrupts and register for poll */ |
2141 | natsemi_irq_disable(dev); | 2143 | natsemi_irq_disable(dev); |
2142 | __netif_rx_schedule(dev); | 2144 | __netif_rx_schedule(dev); |
2143 | } | 2145 | } else |
2146 | printk(KERN_WARNING | ||
2147 | "%s: Ignoring interrupt, status %#08x, mask %#08x.\n", | ||
2148 | dev->name, np->intr_status, | ||
2149 | readl(ioaddr + IntrMask)); | ||
2150 | |||
2144 | return IRQ_HANDLED; | 2151 | return IRQ_HANDLED; |
2145 | } | 2152 | } |
2146 | 2153 | ||
@@ -2156,6 +2163,20 @@ static int natsemi_poll(struct net_device *dev, int *budget) | |||
2156 | int work_done = 0; | 2163 | int work_done = 0; |
2157 | 2164 | ||
2158 | do { | 2165 | do { |
2166 | if (netif_msg_intr(np)) | ||
2167 | printk(KERN_DEBUG | ||
2168 | "%s: Poll, status %#08x, mask %#08x.\n", | ||
2169 | dev->name, np->intr_status, | ||
2170 | readl(ioaddr + IntrMask)); | ||
2171 | |||
2172 | /* netdev_rx() may read IntrStatus again if the RX state | ||
2173 | * machine falls over so do it first. */ | ||
2174 | if (np->intr_status & | ||
2175 | (IntrRxDone | IntrRxIntr | RxStatusFIFOOver | | ||
2176 | IntrRxErr | IntrRxOverrun)) { | ||
2177 | netdev_rx(dev, &work_done, work_to_do); | ||
2178 | } | ||
2179 | |||
2159 | if (np->intr_status & | 2180 | if (np->intr_status & |
2160 | (IntrTxDone | IntrTxIntr | IntrTxIdle | IntrTxErr)) { | 2181 | (IntrTxDone | IntrTxIntr | IntrTxIdle | IntrTxErr)) { |
2161 | spin_lock(&np->lock); | 2182 | spin_lock(&np->lock); |
@@ -2167,12 +2188,6 @@ static int natsemi_poll(struct net_device *dev, int *budget) | |||
2167 | if (np->intr_status & IntrAbnormalSummary) | 2188 | if (np->intr_status & IntrAbnormalSummary) |
2168 | netdev_error(dev, np->intr_status); | 2189 | netdev_error(dev, np->intr_status); |
2169 | 2190 | ||
2170 | if (np->intr_status & | ||
2171 | (IntrRxDone | IntrRxIntr | RxStatusFIFOOver | | ||
2172 | IntrRxErr | IntrRxOverrun)) { | ||
2173 | netdev_rx(dev, &work_done, work_to_do); | ||
2174 | } | ||
2175 | |||
2176 | *budget -= work_done; | 2191 | *budget -= work_done; |
2177 | dev->quota -= work_done; | 2192 | dev->quota -= work_done; |
2178 | 2193 | ||
@@ -2399,19 +2414,8 @@ static struct net_device_stats *get_stats(struct net_device *dev) | |||
2399 | #ifdef CONFIG_NET_POLL_CONTROLLER | 2414 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2400 | static void natsemi_poll_controller(struct net_device *dev) | 2415 | static void natsemi_poll_controller(struct net_device *dev) |
2401 | { | 2416 | { |
2402 | struct netdev_private *np = netdev_priv(dev); | ||
2403 | |||
2404 | disable_irq(dev->irq); | 2417 | disable_irq(dev->irq); |
2405 | 2418 | intr_handler(dev->irq, dev); | |
2406 | /* | ||
2407 | * A real interrupt might have already reached us at this point | ||
2408 | * but NAPI might still haven't called us back. As the interrupt | ||
2409 | * status register is cleared by reading, we should prevent an | ||
2410 | * interrupt loss in this case... | ||
2411 | */ | ||
2412 | if (!np->intr_status) | ||
2413 | intr_handler(dev->irq, dev); | ||
2414 | |||
2415 | enable_irq(dev->irq); | 2419 | enable_irq(dev->irq); |
2416 | } | 2420 | } |
2417 | #endif | 2421 | #endif |
@@ -3071,7 +3075,7 @@ static void enable_wol_mode(struct net_device *dev, int enable_intr) | |||
3071 | * Could be used to send a netlink message. | 3075 | * Could be used to send a netlink message. |
3072 | */ | 3076 | */ |
3073 | writel(WOLPkt | LinkChange, ioaddr + IntrMask); | 3077 | writel(WOLPkt | LinkChange, ioaddr + IntrMask); |
3074 | writel(1, ioaddr + IntrEnable); | 3078 | natsemi_irq_enable(dev); |
3075 | } | 3079 | } |
3076 | } | 3080 | } |
3077 | 3081 | ||
@@ -3202,7 +3206,7 @@ static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state) | |||
3202 | disable_irq(dev->irq); | 3206 | disable_irq(dev->irq); |
3203 | spin_lock_irq(&np->lock); | 3207 | spin_lock_irq(&np->lock); |
3204 | 3208 | ||
3205 | writel(0, ioaddr + IntrEnable); | 3209 | natsemi_irq_disable(dev); |
3206 | np->hands_off = 1; | 3210 | np->hands_off = 1; |
3207 | natsemi_stop_rxtx(dev); | 3211 | natsemi_stop_rxtx(dev); |
3208 | netif_stop_queue(dev); | 3212 | netif_stop_queue(dev); |
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h index 81742e4e5610..dd8ce35332fe 100644 --- a/drivers/net/netxen/netxen_nic.h +++ b/drivers/net/netxen/netxen_nic.h | |||
@@ -232,6 +232,7 @@ enum { | |||
232 | #define MPORT_SINGLE_FUNCTION_MODE 0x1111 | 232 | #define MPORT_SINGLE_FUNCTION_MODE 0x1111 |
233 | 233 | ||
234 | extern unsigned long long netxen_dma_mask; | 234 | extern unsigned long long netxen_dma_mask; |
235 | extern unsigned long last_schedule_time; | ||
235 | 236 | ||
236 | /* | 237 | /* |
237 | * NetXen host-peg signal message structure | 238 | * NetXen host-peg signal message structure |
diff --git a/drivers/net/netxen/netxen_nic_ethtool.c b/drivers/net/netxen/netxen_nic_ethtool.c index 986ef98db229..ee1b5a24cbe7 100644 --- a/drivers/net/netxen/netxen_nic_ethtool.c +++ b/drivers/net/netxen/netxen_nic_ethtool.c | |||
@@ -462,6 +462,7 @@ netxen_nic_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, | |||
462 | } | 462 | } |
463 | printk(KERN_INFO "%s: flash unlocked. \n", | 463 | printk(KERN_INFO "%s: flash unlocked. \n", |
464 | netxen_nic_driver_name); | 464 | netxen_nic_driver_name); |
465 | last_schedule_time = jiffies; | ||
465 | ret = netxen_flash_erase_secondary(adapter); | 466 | ret = netxen_flash_erase_secondary(adapter); |
466 | if (ret != FLASH_SUCCESS) { | 467 | if (ret != FLASH_SUCCESS) { |
467 | printk(KERN_ERR "%s: Flash erase failed.\n", | 468 | printk(KERN_ERR "%s: Flash erase failed.\n", |
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index 1be55702557d..6537574a9cda 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -822,7 +822,10 @@ int netxen_nic_set_mtu_xgb(struct netxen_port *port, int new_mtu) | |||
822 | { | 822 | { |
823 | struct netxen_adapter *adapter = port->adapter; | 823 | struct netxen_adapter *adapter = port->adapter; |
824 | new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE; | 824 | new_mtu += NETXEN_NIU_HDRSIZE + NETXEN_NIU_TLRSIZE; |
825 | netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu); | 825 | if (port->portnum == 0) |
826 | netxen_nic_write_w0(adapter, NETXEN_NIU_XGE_MAX_FRAME_SIZE, new_mtu); | ||
827 | else if (port->portnum == 1) | ||
828 | netxen_nic_write_w0(adapter, NETXEN_NIU_XG1_MAX_FRAME_SIZE, new_mtu); | ||
826 | return 0; | 829 | return 0; |
827 | } | 830 | } |
828 | 831 | ||
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c index 586d32b676af..eff965dc5fff 100644 --- a/drivers/net/netxen/netxen_nic_init.c +++ b/drivers/net/netxen/netxen_nic_init.c | |||
@@ -42,6 +42,8 @@ struct crb_addr_pair { | |||
42 | u32 data; | 42 | u32 data; |
43 | }; | 43 | }; |
44 | 44 | ||
45 | unsigned long last_schedule_time; | ||
46 | |||
45 | #define NETXEN_MAX_CRB_XFORM 60 | 47 | #define NETXEN_MAX_CRB_XFORM 60 |
46 | static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; | 48 | static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM]; |
47 | #define NETXEN_ADDR_ERROR (0xffffffff) | 49 | #define NETXEN_ADDR_ERROR (0xffffffff) |
@@ -404,9 +406,14 @@ static inline int do_rom_fast_write(struct netxen_adapter *adapter, int addr, | |||
404 | static inline int | 406 | static inline int |
405 | do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) | 407 | do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) |
406 | { | 408 | { |
409 | if (jiffies > (last_schedule_time + (8 * HZ))) { | ||
410 | last_schedule_time = jiffies; | ||
411 | schedule(); | ||
412 | } | ||
413 | |||
407 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); | 414 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr); |
408 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); | 415 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3); |
409 | udelay(70); /* prevent bursting on CRB */ | 416 | udelay(100); /* prevent bursting on CRB */ |
410 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | 417 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); |
411 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); | 418 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb); |
412 | if (netxen_wait_rom_done(adapter)) { | 419 | if (netxen_wait_rom_done(adapter)) { |
@@ -415,7 +422,7 @@ do_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp) | |||
415 | } | 422 | } |
416 | /* reset abyte_cnt and dummy_byte_cnt */ | 423 | /* reset abyte_cnt and dummy_byte_cnt */ |
417 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); | 424 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0); |
418 | udelay(70); /* prevent bursting on CRB */ | 425 | udelay(100); /* prevent bursting on CRB */ |
419 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); | 426 | netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); |
420 | 427 | ||
421 | *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); | 428 | *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA); |
@@ -431,6 +438,7 @@ do_rom_fast_read_words(struct netxen_adapter *adapter, int addr, | |||
431 | 438 | ||
432 | for (addridx = addr; addridx < (addr + size); addridx += 4) { | 439 | for (addridx = addr; addridx < (addr + size); addridx += 4) { |
433 | ret = do_rom_fast_read(adapter, addridx, (int *)bytes); | 440 | ret = do_rom_fast_read(adapter, addridx, (int *)bytes); |
441 | *(int *)bytes = cpu_to_le32(*(int *)bytes); | ||
434 | if (ret != 0) | 442 | if (ret != 0) |
435 | break; | 443 | break; |
436 | bytes += 4; | 444 | bytes += 4; |
@@ -490,7 +498,7 @@ static inline int do_rom_fast_write_words(struct netxen_adapter *adapter, | |||
490 | int timeout = 0; | 498 | int timeout = 0; |
491 | int data; | 499 | int data; |
492 | 500 | ||
493 | data = *(u32*)bytes; | 501 | data = le32_to_cpu((*(u32*)bytes)); |
494 | 502 | ||
495 | ret = do_rom_fast_write(adapter, addridx, data); | 503 | ret = do_rom_fast_write(adapter, addridx, data); |
496 | if (ret < 0) | 504 | if (ret < 0) |
diff --git a/drivers/net/pci-skeleton.c b/drivers/net/pci-skeleton.c index 00ca0fdb837b..6ca4e4fa6b88 100644 --- a/drivers/net/pci-skeleton.c +++ b/drivers/net/pci-skeleton.c | |||
@@ -710,8 +710,8 @@ match: | |||
710 | tp->chipset, | 710 | tp->chipset, |
711 | rtl_chip_info[tp->chipset].name); | 711 | rtl_chip_info[tp->chipset].name); |
712 | 712 | ||
713 | i = register_netdev (dev); | 713 | rc = register_netdev (dev); |
714 | if (i) | 714 | if (rc) |
715 | goto err_out_unmap; | 715 | goto err_out_unmap; |
716 | 716 | ||
717 | DPRINTK ("EXIT, returning 0\n"); | 717 | DPRINTK ("EXIT, returning 0\n"); |
diff --git a/drivers/net/pcmcia/ibmtr_cs.c b/drivers/net/pcmcia/ibmtr_cs.c index a956a51d284f..1060154ae750 100644 --- a/drivers/net/pcmcia/ibmtr_cs.c +++ b/drivers/net/pcmcia/ibmtr_cs.c | |||
@@ -138,7 +138,7 @@ static const struct ethtool_ops netdev_ethtool_ops = { | |||
138 | 138 | ||
139 | ======================================================================*/ | 139 | ======================================================================*/ |
140 | 140 | ||
141 | static int ibmtr_attach(struct pcmcia_device *link) | 141 | static int __devinit ibmtr_attach(struct pcmcia_device *link) |
142 | { | 142 | { |
143 | ibmtr_dev_t *info; | 143 | ibmtr_dev_t *info; |
144 | struct net_device *dev; | 144 | struct net_device *dev; |
@@ -217,7 +217,7 @@ static void ibmtr_detach(struct pcmcia_device *link) | |||
217 | #define CS_CHECK(fn, ret) \ | 217 | #define CS_CHECK(fn, ret) \ |
218 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) | 218 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) |
219 | 219 | ||
220 | static int ibmtr_config(struct pcmcia_device *link) | 220 | static int __devinit ibmtr_config(struct pcmcia_device *link) |
221 | { | 221 | { |
222 | ibmtr_dev_t *info = link->priv; | 222 | ibmtr_dev_t *info = link->priv; |
223 | struct net_device *dev = info->dev; | 223 | struct net_device *dev = info->dev; |
diff --git a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c index 933e2f3c77aa..caabbc408c34 100644 --- a/drivers/net/ppp_async.c +++ b/drivers/net/ppp_async.c | |||
@@ -802,9 +802,9 @@ process_input_packet(struct asyncppp *ap) | |||
802 | 802 | ||
803 | /* check for address/control and protocol compression */ | 803 | /* check for address/control and protocol compression */ |
804 | p = skb->data; | 804 | p = skb->data; |
805 | if (p[0] == PPP_ALLSTATIONS && p[1] == PPP_UI) { | 805 | if (p[0] == PPP_ALLSTATIONS) { |
806 | /* chop off address/control */ | 806 | /* chop off address/control */ |
807 | if (skb->len < 3) | 807 | if (p[1] != PPP_UI || skb->len < 3) |
808 | goto err; | 808 | goto err; |
809 | p = skb_pull(skb, 2); | 809 | p = skb_pull(skb, 2); |
810 | } | 810 | } |
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index 11b575f89856..ef58e4128782 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -2544,6 +2544,9 @@ static void ppp_destroy_interface(struct ppp *ppp) | |||
2544 | ppp->active_filter = NULL; | 2544 | ppp->active_filter = NULL; |
2545 | #endif /* CONFIG_PPP_FILTER */ | 2545 | #endif /* CONFIG_PPP_FILTER */ |
2546 | 2546 | ||
2547 | if (ppp->xmit_pending) | ||
2548 | kfree_skb(ppp->xmit_pending); | ||
2549 | |||
2547 | kfree(ppp); | 2550 | kfree(ppp); |
2548 | } | 2551 | } |
2549 | 2552 | ||
diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c index d3f65dab306c..a8246eb2f8d9 100755 --- a/drivers/net/qla3xxx.c +++ b/drivers/net/qla3xxx.c | |||
@@ -1691,6 +1691,27 @@ static int ql_populate_free_queue(struct ql3_adapter *qdev) | |||
1691 | /* | 1691 | /* |
1692 | * Caller holds hw_lock. | 1692 | * Caller holds hw_lock. |
1693 | */ | 1693 | */ |
1694 | static void ql_update_small_bufq_prod_index(struct ql3_adapter *qdev) | ||
1695 | { | ||
1696 | struct ql3xxx_port_registers __iomem *port_regs = qdev->mem_map_registers; | ||
1697 | if (qdev->small_buf_release_cnt >= 16) { | ||
1698 | while (qdev->small_buf_release_cnt >= 16) { | ||
1699 | qdev->small_buf_q_producer_index++; | ||
1700 | |||
1701 | if (qdev->small_buf_q_producer_index == | ||
1702 | NUM_SBUFQ_ENTRIES) | ||
1703 | qdev->small_buf_q_producer_index = 0; | ||
1704 | qdev->small_buf_release_cnt -= 8; | ||
1705 | } | ||
1706 | wmb(); | ||
1707 | writel(qdev->small_buf_q_producer_index, | ||
1708 | &port_regs->CommonRegs.rxSmallQProducerIndex); | ||
1709 | } | ||
1710 | } | ||
1711 | |||
1712 | /* | ||
1713 | * Caller holds hw_lock. | ||
1714 | */ | ||
1694 | static void ql_update_lrg_bufq_prod_index(struct ql3_adapter *qdev) | 1715 | static void ql_update_lrg_bufq_prod_index(struct ql3_adapter *qdev) |
1695 | { | 1716 | { |
1696 | struct bufq_addr_element *lrg_buf_q_ele; | 1717 | struct bufq_addr_element *lrg_buf_q_ele; |
@@ -1732,13 +1753,10 @@ static void ql_update_lrg_bufq_prod_index(struct ql3_adapter *qdev) | |||
1732 | lrg_buf_q_ele = qdev->lrg_buf_q_virt_addr; | 1753 | lrg_buf_q_ele = qdev->lrg_buf_q_virt_addr; |
1733 | } | 1754 | } |
1734 | } | 1755 | } |
1735 | 1756 | wmb(); | |
1736 | qdev->lrg_buf_next_free = lrg_buf_q_ele; | 1757 | qdev->lrg_buf_next_free = lrg_buf_q_ele; |
1737 | 1758 | writel(qdev->lrg_buf_q_producer_index, | |
1738 | ql_write_common_reg(qdev, | 1759 | &port_regs->CommonRegs.rxLargeQProducerIndex); |
1739 | &port_regs->CommonRegs. | ||
1740 | rxLargeQProducerIndex, | ||
1741 | qdev->lrg_buf_q_producer_index); | ||
1742 | } | 1760 | } |
1743 | } | 1761 | } |
1744 | 1762 | ||
@@ -1915,17 +1933,18 @@ static void ql_process_macip_rx_intr(struct ql3_adapter *qdev, | |||
1915 | u16 checksum = le16_to_cpu(ib_ip_rsp_ptr->checksum); | 1933 | u16 checksum = le16_to_cpu(ib_ip_rsp_ptr->checksum); |
1916 | if (checksum & | 1934 | if (checksum & |
1917 | (IB_IP_IOCB_RSP_3032_ICE | | 1935 | (IB_IP_IOCB_RSP_3032_ICE | |
1918 | IB_IP_IOCB_RSP_3032_CE | | 1936 | IB_IP_IOCB_RSP_3032_CE)) { |
1919 | IB_IP_IOCB_RSP_3032_NUC)) { | ||
1920 | printk(KERN_ERR | 1937 | printk(KERN_ERR |
1921 | "%s: Bad checksum for this %s packet, checksum = %x.\n", | 1938 | "%s: Bad checksum for this %s packet, checksum = %x.\n", |
1922 | __func__, | 1939 | __func__, |
1923 | ((checksum & | 1940 | ((checksum & |
1924 | IB_IP_IOCB_RSP_3032_TCP) ? "TCP" : | 1941 | IB_IP_IOCB_RSP_3032_TCP) ? "TCP" : |
1925 | "UDP"),checksum); | 1942 | "UDP"),checksum); |
1926 | } else if (checksum & IB_IP_IOCB_RSP_3032_TCP) { | 1943 | } else if ((checksum & IB_IP_IOCB_RSP_3032_TCP) || |
1944 | (checksum & IB_IP_IOCB_RSP_3032_UDP && | ||
1945 | !(checksum & IB_IP_IOCB_RSP_3032_NUC))) { | ||
1927 | skb2->ip_summed = CHECKSUM_UNNECESSARY; | 1946 | skb2->ip_summed = CHECKSUM_UNNECESSARY; |
1928 | } | 1947 | } |
1929 | } | 1948 | } |
1930 | skb2->dev = qdev->ndev; | 1949 | skb2->dev = qdev->ndev; |
1931 | skb2->protocol = eth_type_trans(skb2, qdev->ndev); | 1950 | skb2->protocol = eth_type_trans(skb2, qdev->ndev); |
@@ -1944,16 +1963,12 @@ static void ql_process_macip_rx_intr(struct ql3_adapter *qdev, | |||
1944 | static int ql_tx_rx_clean(struct ql3_adapter *qdev, | 1963 | static int ql_tx_rx_clean(struct ql3_adapter *qdev, |
1945 | int *tx_cleaned, int *rx_cleaned, int work_to_do) | 1964 | int *tx_cleaned, int *rx_cleaned, int work_to_do) |
1946 | { | 1965 | { |
1947 | struct ql3xxx_port_registers __iomem *port_regs = qdev->mem_map_registers; | ||
1948 | struct net_rsp_iocb *net_rsp; | 1966 | struct net_rsp_iocb *net_rsp; |
1949 | struct net_device *ndev = qdev->ndev; | 1967 | struct net_device *ndev = qdev->ndev; |
1950 | unsigned long hw_flags; | ||
1951 | int work_done = 0; | 1968 | int work_done = 0; |
1952 | 1969 | ||
1953 | u32 rsp_producer_index = le32_to_cpu(*(qdev->prsp_producer_index)); | ||
1954 | |||
1955 | /* While there are entries in the completion queue. */ | 1970 | /* While there are entries in the completion queue. */ |
1956 | while ((rsp_producer_index != | 1971 | while ((le32_to_cpu(*(qdev->prsp_producer_index)) != |
1957 | qdev->rsp_consumer_index) && (work_done < work_to_do)) { | 1972 | qdev->rsp_consumer_index) && (work_done < work_to_do)) { |
1958 | 1973 | ||
1959 | net_rsp = qdev->rsp_current; | 1974 | net_rsp = qdev->rsp_current; |
@@ -2009,33 +2024,7 @@ static int ql_tx_rx_clean(struct ql3_adapter *qdev, | |||
2009 | work_done = *tx_cleaned + *rx_cleaned; | 2024 | work_done = *tx_cleaned + *rx_cleaned; |
2010 | } | 2025 | } |
2011 | 2026 | ||
2012 | if(work_done) { | 2027 | return work_done; |
2013 | spin_lock_irqsave(&qdev->hw_lock, hw_flags); | ||
2014 | |||
2015 | ql_update_lrg_bufq_prod_index(qdev); | ||
2016 | |||
2017 | if (qdev->small_buf_release_cnt >= 16) { | ||
2018 | while (qdev->small_buf_release_cnt >= 16) { | ||
2019 | qdev->small_buf_q_producer_index++; | ||
2020 | |||
2021 | if (qdev->small_buf_q_producer_index == | ||
2022 | NUM_SBUFQ_ENTRIES) | ||
2023 | qdev->small_buf_q_producer_index = 0; | ||
2024 | qdev->small_buf_release_cnt -= 8; | ||
2025 | } | ||
2026 | |||
2027 | wmb(); | ||
2028 | ql_write_common_reg(qdev, | ||
2029 | &port_regs->CommonRegs. | ||
2030 | rxSmallQProducerIndex, | ||
2031 | qdev->small_buf_q_producer_index); | ||
2032 | |||
2033 | } | ||
2034 | |||
2035 | spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); | ||
2036 | } | ||
2037 | |||
2038 | return *tx_cleaned + *rx_cleaned; | ||
2039 | } | 2028 | } |
2040 | 2029 | ||
2041 | static int ql_poll(struct net_device *ndev, int *budget) | 2030 | static int ql_poll(struct net_device *ndev, int *budget) |
@@ -2059,9 +2048,10 @@ quit_polling: | |||
2059 | netif_rx_complete(ndev); | 2048 | netif_rx_complete(ndev); |
2060 | 2049 | ||
2061 | spin_lock_irqsave(&qdev->hw_lock, hw_flags); | 2050 | spin_lock_irqsave(&qdev->hw_lock, hw_flags); |
2062 | ql_write_common_reg(qdev, | 2051 | ql_update_small_bufq_prod_index(qdev); |
2063 | &port_regs->CommonRegs.rspQConsumerIndex, | 2052 | ql_update_lrg_bufq_prod_index(qdev); |
2064 | qdev->rsp_consumer_index); | 2053 | writel(qdev->rsp_consumer_index, |
2054 | &port_regs->CommonRegs.rspQConsumerIndex); | ||
2065 | spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); | 2055 | spin_unlock_irqrestore(&qdev->hw_lock, hw_flags); |
2066 | 2056 | ||
2067 | ql_enable_interrupts(qdev); | 2057 | ql_enable_interrupts(qdev); |
@@ -2217,12 +2207,7 @@ static int ql_send_map(struct ql3_adapter *qdev, | |||
2217 | int seg_cnt, seg = 0; | 2207 | int seg_cnt, seg = 0; |
2218 | int frag_cnt = (int)skb_shinfo(skb)->nr_frags; | 2208 | int frag_cnt = (int)skb_shinfo(skb)->nr_frags; |
2219 | 2209 | ||
2220 | seg_cnt = tx_cb->seg_count = ql_get_seg_count(qdev, | 2210 | seg_cnt = tx_cb->seg_count; |
2221 | (skb_shinfo(skb)->nr_frags)); | ||
2222 | if(seg_cnt == -1) { | ||
2223 | printk(KERN_ERR PFX"%s: invalid segment count!\n",__func__); | ||
2224 | return NETDEV_TX_BUSY; | ||
2225 | } | ||
2226 | /* | 2211 | /* |
2227 | * Map the skb buffer first. | 2212 | * Map the skb buffer first. |
2228 | */ | 2213 | */ |
@@ -2278,7 +2263,7 @@ static int ql_send_map(struct ql3_adapter *qdev, | |||
2278 | pci_unmap_addr_set(&tx_cb->map[seg], mapaddr, | 2263 | pci_unmap_addr_set(&tx_cb->map[seg], mapaddr, |
2279 | map); | 2264 | map); |
2280 | pci_unmap_len_set(&tx_cb->map[seg], maplen, | 2265 | pci_unmap_len_set(&tx_cb->map[seg], maplen, |
2281 | len); | 2266 | sizeof(struct oal)); |
2282 | oal_entry = (struct oal_entry *)oal; | 2267 | oal_entry = (struct oal_entry *)oal; |
2283 | oal++; | 2268 | oal++; |
2284 | seg++; | 2269 | seg++; |
@@ -2380,6 +2365,7 @@ static int ql3xxx_send(struct sk_buff *skb, struct net_device *ndev) | |||
2380 | } | 2365 | } |
2381 | 2366 | ||
2382 | mac_iocb_ptr = tx_cb->queue_entry; | 2367 | mac_iocb_ptr = tx_cb->queue_entry; |
2368 | memset((void *)mac_iocb_ptr, 0, sizeof(struct ob_mac_iocb_req)); | ||
2383 | mac_iocb_ptr->opcode = qdev->mac_ob_opcode; | 2369 | mac_iocb_ptr->opcode = qdev->mac_ob_opcode; |
2384 | mac_iocb_ptr->flags = OB_MAC_IOCB_REQ_X; | 2370 | mac_iocb_ptr->flags = OB_MAC_IOCB_REQ_X; |
2385 | mac_iocb_ptr->flags |= qdev->mb_bit_mask; | 2371 | mac_iocb_ptr->flags |= qdev->mb_bit_mask; |
@@ -3054,15 +3040,6 @@ static int ql_adapter_initialize(struct ql3_adapter *qdev) | |||
3054 | goto out; | 3040 | goto out; |
3055 | } | 3041 | } |
3056 | 3042 | ||
3057 | if (qdev->mac_index) | ||
3058 | ql_write_page0_reg(qdev, | ||
3059 | &port_regs->mac1MaxFrameLengthReg, | ||
3060 | qdev->max_frame_size); | ||
3061 | else | ||
3062 | ql_write_page0_reg(qdev, | ||
3063 | &port_regs->mac0MaxFrameLengthReg, | ||
3064 | qdev->max_frame_size); | ||
3065 | |||
3066 | value = qdev->nvram_data.tcpMaxWindowSize; | 3043 | value = qdev->nvram_data.tcpMaxWindowSize; |
3067 | ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value); | 3044 | ql_write_page0_reg(qdev, &port_regs->tcpMaxWindow, value); |
3068 | 3045 | ||
@@ -3082,6 +3059,14 @@ static int ql_adapter_initialize(struct ql3_adapter *qdev) | |||
3082 | ql_sem_unlock(qdev, QL_FLASH_SEM_MASK); | 3059 | ql_sem_unlock(qdev, QL_FLASH_SEM_MASK); |
3083 | } | 3060 | } |
3084 | 3061 | ||
3062 | if (qdev->mac_index) | ||
3063 | ql_write_page0_reg(qdev, | ||
3064 | &port_regs->mac1MaxFrameLengthReg, | ||
3065 | qdev->max_frame_size); | ||
3066 | else | ||
3067 | ql_write_page0_reg(qdev, | ||
3068 | &port_regs->mac0MaxFrameLengthReg, | ||
3069 | qdev->max_frame_size); | ||
3085 | 3070 | ||
3086 | if(ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, | 3071 | if(ql_sem_spinlock(qdev, QL_PHY_GIO_SEM_MASK, |
3087 | (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * | 3072 | (QL_RESOURCE_BITS_BASE_CODE | (qdev->mac_index) * |
@@ -3152,7 +3137,8 @@ static int ql_adapter_initialize(struct ql3_adapter *qdev) | |||
3152 | if (qdev->device_id == QL3032_DEVICE_ID) { | 3137 | if (qdev->device_id == QL3032_DEVICE_ID) { |
3153 | value = | 3138 | value = |
3154 | (QL3032_PORT_CONTROL_EF | QL3032_PORT_CONTROL_KIE | | 3139 | (QL3032_PORT_CONTROL_EF | QL3032_PORT_CONTROL_KIE | |
3155 | QL3032_PORT_CONTROL_EIv6 | QL3032_PORT_CONTROL_EIv4); | 3140 | QL3032_PORT_CONTROL_EIv6 | QL3032_PORT_CONTROL_EIv4 | |
3141 | QL3032_PORT_CONTROL_ET); | ||
3156 | ql_write_page0_reg(qdev, &port_regs->functionControl, | 3142 | ql_write_page0_reg(qdev, &port_regs->functionControl, |
3157 | ((value << 16) | value)); | 3143 | ((value << 16) | value)); |
3158 | } else { | 3144 | } else { |
diff --git a/drivers/net/qla3xxx.h b/drivers/net/qla3xxx.h index 34cd6580fd07..0203f88f0544 100755 --- a/drivers/net/qla3xxx.h +++ b/drivers/net/qla3xxx.h | |||
@@ -1014,8 +1014,7 @@ struct eeprom_data { | |||
1014 | 1014 | ||
1015 | /* Transmit and Receive Buffers */ | 1015 | /* Transmit and Receive Buffers */ |
1016 | #define NUM_LBUFQ_ENTRIES 128 | 1016 | #define NUM_LBUFQ_ENTRIES 128 |
1017 | #define JUMBO_NUM_LBUFQ_ENTRIES \ | 1017 | #define JUMBO_NUM_LBUFQ_ENTRIES 32 |
1018 | (NUM_LBUFQ_ENTRIES/(JUMBO_MTU_SIZE/NORMAL_MTU_SIZE)) | ||
1019 | #define NUM_SBUFQ_ENTRIES 64 | 1018 | #define NUM_SBUFQ_ENTRIES 64 |
1020 | #define QL_SMALL_BUFFER_SIZE 32 | 1019 | #define QL_SMALL_BUFFER_SIZE 32 |
1021 | #define QL_ADDR_ELE_PER_BUFQ_ENTRY \ | 1020 | #define QL_ADDR_ELE_PER_BUFQ_ENTRY \ |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 521b5f0618a4..6a77b8a92245 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -66,6 +66,7 @@ VERSION 2.2LK <2005/01/25> | |||
66 | #include <linux/init.h> | 66 | #include <linux/init.h> |
67 | #include <linux/dma-mapping.h> | 67 | #include <linux/dma-mapping.h> |
68 | 68 | ||
69 | #include <asm/system.h> | ||
69 | #include <asm/io.h> | 70 | #include <asm/io.h> |
70 | #include <asm/irq.h> | 71 | #include <asm/irq.h> |
71 | 72 | ||
@@ -486,6 +487,7 @@ static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *, | |||
486 | void __iomem *); | 487 | void __iomem *); |
487 | static int rtl8169_change_mtu(struct net_device *dev, int new_mtu); | 488 | static int rtl8169_change_mtu(struct net_device *dev, int new_mtu); |
488 | static void rtl8169_down(struct net_device *dev); | 489 | static void rtl8169_down(struct net_device *dev); |
490 | static void rtl8169_rx_clear(struct rtl8169_private *tp); | ||
489 | 491 | ||
490 | #ifdef CONFIG_R8169_NAPI | 492 | #ifdef CONFIG_R8169_NAPI |
491 | static int rtl8169_poll(struct net_device *dev, int *budget); | 493 | static int rtl8169_poll(struct net_device *dev, int *budget); |
@@ -1751,16 +1753,10 @@ static int rtl8169_open(struct net_device *dev) | |||
1751 | { | 1753 | { |
1752 | struct rtl8169_private *tp = netdev_priv(dev); | 1754 | struct rtl8169_private *tp = netdev_priv(dev); |
1753 | struct pci_dev *pdev = tp->pci_dev; | 1755 | struct pci_dev *pdev = tp->pci_dev; |
1754 | int retval; | 1756 | int retval = -ENOMEM; |
1755 | 1757 | ||
1756 | rtl8169_set_rxbufsize(tp, dev); | ||
1757 | |||
1758 | retval = | ||
1759 | request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, dev->name, dev); | ||
1760 | if (retval < 0) | ||
1761 | goto out; | ||
1762 | 1758 | ||
1763 | retval = -ENOMEM; | 1759 | rtl8169_set_rxbufsize(tp, dev); |
1764 | 1760 | ||
1765 | /* | 1761 | /* |
1766 | * Rx and Tx desscriptors needs 256 bytes alignment. | 1762 | * Rx and Tx desscriptors needs 256 bytes alignment. |
@@ -1769,19 +1765,26 @@ static int rtl8169_open(struct net_device *dev) | |||
1769 | tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES, | 1765 | tp->TxDescArray = pci_alloc_consistent(pdev, R8169_TX_RING_BYTES, |
1770 | &tp->TxPhyAddr); | 1766 | &tp->TxPhyAddr); |
1771 | if (!tp->TxDescArray) | 1767 | if (!tp->TxDescArray) |
1772 | goto err_free_irq; | 1768 | goto out; |
1773 | 1769 | ||
1774 | tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES, | 1770 | tp->RxDescArray = pci_alloc_consistent(pdev, R8169_RX_RING_BYTES, |
1775 | &tp->RxPhyAddr); | 1771 | &tp->RxPhyAddr); |
1776 | if (!tp->RxDescArray) | 1772 | if (!tp->RxDescArray) |
1777 | goto err_free_tx; | 1773 | goto err_free_tx_0; |
1778 | 1774 | ||
1779 | retval = rtl8169_init_ring(dev); | 1775 | retval = rtl8169_init_ring(dev); |
1780 | if (retval < 0) | 1776 | if (retval < 0) |
1781 | goto err_free_rx; | 1777 | goto err_free_rx_1; |
1782 | 1778 | ||
1783 | INIT_DELAYED_WORK(&tp->task, NULL); | 1779 | INIT_DELAYED_WORK(&tp->task, NULL); |
1784 | 1780 | ||
1781 | smp_mb(); | ||
1782 | |||
1783 | retval = request_irq(dev->irq, rtl8169_interrupt, IRQF_SHARED, | ||
1784 | dev->name, dev); | ||
1785 | if (retval < 0) | ||
1786 | goto err_release_ring_2; | ||
1787 | |||
1785 | rtl8169_hw_start(dev); | 1788 | rtl8169_hw_start(dev); |
1786 | 1789 | ||
1787 | rtl8169_request_timer(dev); | 1790 | rtl8169_request_timer(dev); |
@@ -1790,14 +1793,14 @@ static int rtl8169_open(struct net_device *dev) | |||
1790 | out: | 1793 | out: |
1791 | return retval; | 1794 | return retval; |
1792 | 1795 | ||
1793 | err_free_rx: | 1796 | err_release_ring_2: |
1797 | rtl8169_rx_clear(tp); | ||
1798 | err_free_rx_1: | ||
1794 | pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray, | 1799 | pci_free_consistent(pdev, R8169_RX_RING_BYTES, tp->RxDescArray, |
1795 | tp->RxPhyAddr); | 1800 | tp->RxPhyAddr); |
1796 | err_free_tx: | 1801 | err_free_tx_0: |
1797 | pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray, | 1802 | pci_free_consistent(pdev, R8169_TX_RING_BYTES, tp->TxDescArray, |
1798 | tp->TxPhyAddr); | 1803 | tp->TxPhyAddr); |
1799 | err_free_irq: | ||
1800 | free_irq(dev->irq, dev); | ||
1801 | goto out; | 1804 | goto out; |
1802 | } | 1805 | } |
1803 | 1806 | ||
@@ -2887,7 +2890,7 @@ static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2887 | void __iomem *ioaddr = tp->mmio_addr; | 2890 | void __iomem *ioaddr = tp->mmio_addr; |
2888 | 2891 | ||
2889 | if (!netif_running(dev)) | 2892 | if (!netif_running(dev)) |
2890 | goto out; | 2893 | goto out_pci_suspend; |
2891 | 2894 | ||
2892 | netif_device_detach(dev); | 2895 | netif_device_detach(dev); |
2893 | netif_stop_queue(dev); | 2896 | netif_stop_queue(dev); |
@@ -2901,10 +2904,11 @@ static int rtl8169_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2901 | 2904 | ||
2902 | spin_unlock_irq(&tp->lock); | 2905 | spin_unlock_irq(&tp->lock); |
2903 | 2906 | ||
2907 | out_pci_suspend: | ||
2904 | pci_save_state(pdev); | 2908 | pci_save_state(pdev); |
2905 | pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled); | 2909 | pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled); |
2906 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 2910 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
2907 | out: | 2911 | |
2908 | return 0; | 2912 | return 0; |
2909 | } | 2913 | } |
2910 | 2914 | ||
@@ -2912,15 +2916,15 @@ static int rtl8169_resume(struct pci_dev *pdev) | |||
2912 | { | 2916 | { |
2913 | struct net_device *dev = pci_get_drvdata(pdev); | 2917 | struct net_device *dev = pci_get_drvdata(pdev); |
2914 | 2918 | ||
2919 | pci_set_power_state(pdev, PCI_D0); | ||
2920 | pci_restore_state(pdev); | ||
2921 | pci_enable_wake(pdev, PCI_D0, 0); | ||
2922 | |||
2915 | if (!netif_running(dev)) | 2923 | if (!netif_running(dev)) |
2916 | goto out; | 2924 | goto out; |
2917 | 2925 | ||
2918 | netif_device_attach(dev); | 2926 | netif_device_attach(dev); |
2919 | 2927 | ||
2920 | pci_set_power_state(pdev, PCI_D0); | ||
2921 | pci_restore_state(pdev); | ||
2922 | pci_enable_wake(pdev, PCI_D0, 0); | ||
2923 | |||
2924 | rtl8169_schedule_work(dev, rtl8169_reset_task); | 2928 | rtl8169_schedule_work(dev, rtl8169_reset_task); |
2925 | out: | 2929 | out: |
2926 | return 0; | 2930 | return 0; |
diff --git a/drivers/net/saa9730.c b/drivers/net/saa9730.c index b269513cde45..143958f1ef0a 100644 --- a/drivers/net/saa9730.c +++ b/drivers/net/saa9730.c | |||
@@ -64,37 +64,37 @@ static unsigned int pci_irq_line; | |||
64 | 64 | ||
65 | static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp) | 65 | static void evm_saa9730_enable_lan_int(struct lan_saa9730_private *lp) |
66 | { | 66 | { |
67 | outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT, | 67 | writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT, |
68 | &lp->evm_saa9730_regs->InterruptBlock1); | 68 | &lp->evm_saa9730_regs->InterruptBlock1); |
69 | outl(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT, | 69 | writel(readl(&lp->evm_saa9730_regs->InterruptStatus1) | EVM_LAN_INT, |
70 | &lp->evm_saa9730_regs->InterruptStatus1); | 70 | &lp->evm_saa9730_regs->InterruptStatus1); |
71 | outl(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT | | 71 | writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) | EVM_LAN_INT | |
72 | EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1); | 72 | EVM_MASTER_EN, &lp->evm_saa9730_regs->InterruptEnable1); |
73 | } | 73 | } |
74 | 74 | ||
75 | static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp) | 75 | static void evm_saa9730_disable_lan_int(struct lan_saa9730_private *lp) |
76 | { | 76 | { |
77 | outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT, | 77 | writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT, |
78 | &lp->evm_saa9730_regs->InterruptBlock1); | 78 | &lp->evm_saa9730_regs->InterruptBlock1); |
79 | outl(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT, | 79 | writel(readl(&lp->evm_saa9730_regs->InterruptEnable1) & ~EVM_LAN_INT, |
80 | &lp->evm_saa9730_regs->InterruptEnable1); | 80 | &lp->evm_saa9730_regs->InterruptEnable1); |
81 | } | 81 | } |
82 | 82 | ||
83 | static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp) | 83 | static void evm_saa9730_clear_lan_int(struct lan_saa9730_private *lp) |
84 | { | 84 | { |
85 | outl(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1); | 85 | writel(EVM_LAN_INT, &lp->evm_saa9730_regs->InterruptStatus1); |
86 | } | 86 | } |
87 | 87 | ||
88 | static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp) | 88 | static void evm_saa9730_block_lan_int(struct lan_saa9730_private *lp) |
89 | { | 89 | { |
90 | outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT, | 90 | writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) & ~EVM_LAN_INT, |
91 | &lp->evm_saa9730_regs->InterruptBlock1); | 91 | &lp->evm_saa9730_regs->InterruptBlock1); |
92 | } | 92 | } |
93 | 93 | ||
94 | static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp) | 94 | static void evm_saa9730_unblock_lan_int(struct lan_saa9730_private *lp) |
95 | { | 95 | { |
96 | outl(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT, | 96 | writel(readl(&lp->evm_saa9730_regs->InterruptBlock1) | EVM_LAN_INT, |
97 | &lp->evm_saa9730_regs->InterruptBlock1); | 97 | &lp->evm_saa9730_regs->InterruptBlock1); |
98 | } | 98 | } |
99 | 99 | ||
100 | static void __attribute_used__ show_saa9730_regs(struct lan_saa9730_private *lp) | 100 | static void __attribute_used__ show_saa9730_regs(struct lan_saa9730_private *lp) |
@@ -147,7 +147,7 @@ static void __attribute_used__ show_saa9730_regs(struct lan_saa9730_private *lp) | |||
147 | printk("lp->lan_saa9730_regs->RxStatus = %x\n", | 147 | printk("lp->lan_saa9730_regs->RxStatus = %x\n", |
148 | readl(&lp->lan_saa9730_regs->RxStatus)); | 148 | readl(&lp->lan_saa9730_regs->RxStatus)); |
149 | for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) { | 149 | for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) { |
150 | outl(i, &lp->lan_saa9730_regs->CamAddress); | 150 | writel(i, &lp->lan_saa9730_regs->CamAddress); |
151 | printk("lp->lan_saa9730_regs->CamData = %x\n", | 151 | printk("lp->lan_saa9730_regs->CamData = %x\n", |
152 | readl(&lp->lan_saa9730_regs->CamData)); | 152 | readl(&lp->lan_saa9730_regs->CamData)); |
153 | } | 153 | } |
@@ -288,28 +288,27 @@ static int lan_saa9730_allocate_buffers(struct pci_dev *pdev, | |||
288 | * Set rx buffer A and rx buffer B to point to the first two buffer | 288 | * Set rx buffer A and rx buffer B to point to the first two buffer |
289 | * spaces. | 289 | * spaces. |
290 | */ | 290 | */ |
291 | outl(lp->dma_addr + rxoffset, | 291 | writel(lp->dma_addr + rxoffset, &lp->lan_saa9730_regs->RxBuffA); |
292 | &lp->lan_saa9730_regs->RxBuffA); | 292 | writel(lp->dma_addr + rxoffset + |
293 | outl(lp->dma_addr + rxoffset + | 293 | LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE, |
294 | LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_RCV_Q_SIZE, | 294 | &lp->lan_saa9730_regs->RxBuffB); |
295 | &lp->lan_saa9730_regs->RxBuffB); | ||
296 | 295 | ||
297 | /* | 296 | /* |
298 | * Set txm_buf_a and txm_buf_b to point to the first two buffer | 297 | * Set txm_buf_a and txm_buf_b to point to the first two buffer |
299 | * space | 298 | * space |
300 | */ | 299 | */ |
301 | outl(lp->dma_addr + txoffset, | 300 | writel(lp->dma_addr + txoffset, |
302 | &lp->lan_saa9730_regs->TxBuffA); | 301 | &lp->lan_saa9730_regs->TxBuffA); |
303 | outl(lp->dma_addr + txoffset + | 302 | writel(lp->dma_addr + txoffset + |
304 | LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE, | 303 | LAN_SAA9730_PACKET_SIZE * LAN_SAA9730_TXM_Q_SIZE, |
305 | &lp->lan_saa9730_regs->TxBuffB); | 304 | &lp->lan_saa9730_regs->TxBuffB); |
306 | 305 | ||
307 | /* Set packet number */ | 306 | /* Set packet number */ |
308 | outl((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) | | 307 | writel((lp->DmaRcvPackets << PK_COUNT_RX_A_SHF) | |
309 | (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) | | 308 | (lp->DmaRcvPackets << PK_COUNT_RX_B_SHF) | |
310 | (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) | | 309 | (lp->DmaTxmPackets << PK_COUNT_TX_A_SHF) | |
311 | (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF), | 310 | (lp->DmaTxmPackets << PK_COUNT_TX_B_SHF), |
312 | &lp->lan_saa9730_regs->PacketCount); | 311 | &lp->lan_saa9730_regs->PacketCount); |
313 | 312 | ||
314 | return 0; | 313 | return 0; |
315 | 314 | ||
@@ -326,10 +325,10 @@ static int lan_saa9730_cam_load(struct lan_saa9730_private *lp) | |||
326 | 325 | ||
327 | for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) { | 326 | for (i = 0; i < LAN_SAA9730_CAM_DWORDS; i++) { |
328 | /* First set address to where data is written */ | 327 | /* First set address to where data is written */ |
329 | outl(i, &lp->lan_saa9730_regs->CamAddress); | 328 | writel(i, &lp->lan_saa9730_regs->CamAddress); |
330 | outl((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16) | 329 | writel((NetworkAddress[0] << 24) | (NetworkAddress[1] << 16) | |
331 | | (NetworkAddress[2] << 8) | NetworkAddress[3], | 330 | (NetworkAddress[2] << 8) | NetworkAddress[3], |
332 | &lp->lan_saa9730_regs->CamData); | 331 | &lp->lan_saa9730_regs->CamData); |
333 | NetworkAddress += 4; | 332 | NetworkAddress += 4; |
334 | } | 333 | } |
335 | return 0; | 334 | return 0; |
@@ -365,8 +364,8 @@ static int lan_saa9730_mii_init(struct lan_saa9730_private *lp) | |||
365 | } | 364 | } |
366 | 365 | ||
367 | /* Now set the control and address register. */ | 366 | /* Now set the control and address register. */ |
368 | outl(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF, | 367 | writel(MD_CA_BUSY | PHY_STATUS | PHY_ADDRESS << MD_CA_PHY_SHF, |
369 | &lp->lan_saa9730_regs->StationMgmtCtl); | 368 | &lp->lan_saa9730_regs->StationMgmtCtl); |
370 | 369 | ||
371 | /* check link status, spin here till station is not busy */ | 370 | /* check link status, spin here till station is not busy */ |
372 | i = 0; | 371 | i = 0; |
@@ -391,23 +390,23 @@ static int lan_saa9730_mii_init(struct lan_saa9730_private *lp) | |||
391 | /* Link is down, reset the PHY first. */ | 390 | /* Link is down, reset the PHY first. */ |
392 | 391 | ||
393 | /* set PHY address = 'CONTROL' */ | 392 | /* set PHY address = 'CONTROL' */ |
394 | outl(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL, | 393 | writel(PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | PHY_CONTROL, |
395 | &lp->lan_saa9730_regs->StationMgmtCtl); | 394 | &lp->lan_saa9730_regs->StationMgmtCtl); |
396 | 395 | ||
397 | /* Wait for 1 ms. */ | 396 | /* Wait for 1 ms. */ |
398 | mdelay(1); | 397 | mdelay(1); |
399 | 398 | ||
400 | /* set 'CONTROL' = force reset and renegotiate */ | 399 | /* set 'CONTROL' = force reset and renegotiate */ |
401 | outl(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG | | 400 | writel(PHY_CONTROL_RESET | PHY_CONTROL_AUTO_NEG | |
402 | PHY_CONTROL_RESTART_AUTO_NEG, | 401 | PHY_CONTROL_RESTART_AUTO_NEG, |
403 | &lp->lan_saa9730_regs->StationMgmtData); | 402 | &lp->lan_saa9730_regs->StationMgmtData); |
404 | 403 | ||
405 | /* Wait for 50 ms. */ | 404 | /* Wait for 50 ms. */ |
406 | mdelay(50); | 405 | mdelay(50); |
407 | 406 | ||
408 | /* set 'BUSY' to start operation */ | 407 | /* set 'BUSY' to start operation */ |
409 | outl(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | | 408 | writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | MD_CA_WR | |
410 | PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl); | 409 | PHY_CONTROL, &lp->lan_saa9730_regs->StationMgmtCtl); |
411 | 410 | ||
412 | /* await completion */ | 411 | /* await completion */ |
413 | i = 0; | 412 | i = 0; |
@@ -427,9 +426,9 @@ static int lan_saa9730_mii_init(struct lan_saa9730_private *lp) | |||
427 | 426 | ||
428 | for (l = 0; l < 2; l++) { | 427 | for (l = 0; l < 2; l++) { |
429 | /* set PHY address = 'STATUS' */ | 428 | /* set PHY address = 'STATUS' */ |
430 | outl(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | | 429 | writel(MD_CA_BUSY | PHY_ADDRESS << MD_CA_PHY_SHF | |
431 | PHY_STATUS, | 430 | PHY_STATUS, |
432 | &lp->lan_saa9730_regs->StationMgmtCtl); | 431 | &lp->lan_saa9730_regs->StationMgmtCtl); |
433 | 432 | ||
434 | /* await completion */ | 433 | /* await completion */ |
435 | i = 0; | 434 | i = 0; |
@@ -462,35 +461,35 @@ static int lan_saa9730_mii_init(struct lan_saa9730_private *lp) | |||
462 | static int lan_saa9730_control_init(struct lan_saa9730_private *lp) | 461 | static int lan_saa9730_control_init(struct lan_saa9730_private *lp) |
463 | { | 462 | { |
464 | /* Initialize DMA control register. */ | 463 | /* Initialize DMA control register. */ |
465 | outl((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) | | 464 | writel((LANMB_ANY << DMA_CTL_MAX_XFER_SHF) | |
466 | (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) | | 465 | (LANEND_LITTLE << DMA_CTL_ENDIAN_SHF) | |
467 | (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF) | 466 | (LAN_SAA9730_RCV_Q_INT_THRESHOLD << DMA_CTL_RX_INT_COUNT_SHF) |
468 | | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN | | 467 | | DMA_CTL_RX_INT_TO_EN | DMA_CTL_RX_INT_EN | |
469 | DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN, | 468 | DMA_CTL_MAC_RX_INT_EN | DMA_CTL_MAC_TX_INT_EN, |
470 | &lp->lan_saa9730_regs->LanDmaCtl); | 469 | &lp->lan_saa9730_regs->LanDmaCtl); |
471 | 470 | ||
472 | /* Initial MAC control register. */ | 471 | /* Initial MAC control register. */ |
473 | outl((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP, | 472 | writel((MACCM_MII << MAC_CONTROL_CONN_SHF) | MAC_CONTROL_FULL_DUP, |
474 | &lp->lan_saa9730_regs->MacCtl); | 473 | &lp->lan_saa9730_regs->MacCtl); |
475 | 474 | ||
476 | /* Initialize CAM control register. */ | 475 | /* Initialize CAM control register. */ |
477 | outl(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC, | 476 | writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_BROAD_ACC, |
478 | &lp->lan_saa9730_regs->CamCtl); | 477 | &lp->lan_saa9730_regs->CamCtl); |
479 | 478 | ||
480 | /* | 479 | /* |
481 | * Initialize CAM enable register, only turn on first entry, should | 480 | * Initialize CAM enable register, only turn on first entry, should |
482 | * contain own addr. | 481 | * contain own addr. |
483 | */ | 482 | */ |
484 | outl(0x0001, &lp->lan_saa9730_regs->CamEnable); | 483 | writel(0x0001, &lp->lan_saa9730_regs->CamEnable); |
485 | 484 | ||
486 | /* Initialize Tx control register */ | 485 | /* Initialize Tx control register */ |
487 | outl(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl); | 486 | writel(TX_CTL_EN_COMP, &lp->lan_saa9730_regs->TxCtl); |
488 | 487 | ||
489 | /* Initialize Rcv control register */ | 488 | /* Initialize Rcv control register */ |
490 | outl(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl); | 489 | writel(RX_CTL_STRIP_CRC, &lp->lan_saa9730_regs->RxCtl); |
491 | 490 | ||
492 | /* Reset DMA engine */ | 491 | /* Reset DMA engine */ |
493 | outl(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest); | 492 | writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest); |
494 | 493 | ||
495 | return 0; | 494 | return 0; |
496 | } | 495 | } |
@@ -500,14 +499,14 @@ static int lan_saa9730_stop(struct lan_saa9730_private *lp) | |||
500 | int i; | 499 | int i; |
501 | 500 | ||
502 | /* Stop DMA first */ | 501 | /* Stop DMA first */ |
503 | outl(readl(&lp->lan_saa9730_regs->LanDmaCtl) & | 502 | writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) & |
504 | ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA), | 503 | ~(DMA_CTL_EN_TX_DMA | DMA_CTL_EN_RX_DMA), |
505 | &lp->lan_saa9730_regs->LanDmaCtl); | 504 | &lp->lan_saa9730_regs->LanDmaCtl); |
506 | 505 | ||
507 | /* Set the SW Reset bits in DMA and MAC control registers */ | 506 | /* Set the SW Reset bits in DMA and MAC control registers */ |
508 | outl(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest); | 507 | writel(DMA_TEST_SW_RESET, &lp->lan_saa9730_regs->DmaTest); |
509 | outl(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET, | 508 | writel(readl(&lp->lan_saa9730_regs->MacCtl) | MAC_CONTROL_RESET, |
510 | &lp->lan_saa9730_regs->MacCtl); | 509 | &lp->lan_saa9730_regs->MacCtl); |
511 | 510 | ||
512 | /* | 511 | /* |
513 | * Wait for MAC reset to have finished. The reset bit is auto cleared | 512 | * Wait for MAC reset to have finished. The reset bit is auto cleared |
@@ -532,8 +531,8 @@ static int lan_saa9730_dma_init(struct lan_saa9730_private *lp) | |||
532 | /* Stop lan controller. */ | 531 | /* Stop lan controller. */ |
533 | lan_saa9730_stop(lp); | 532 | lan_saa9730_stop(lp); |
534 | 533 | ||
535 | outl(LAN_SAA9730_DEFAULT_TIME_OUT_CNT, | 534 | writel(LAN_SAA9730_DEFAULT_TIME_OUT_CNT, |
536 | &lp->lan_saa9730_regs->Timeout); | 535 | &lp->lan_saa9730_regs->Timeout); |
537 | 536 | ||
538 | return 0; | 537 | return 0; |
539 | } | 538 | } |
@@ -552,19 +551,19 @@ static int lan_saa9730_start(struct lan_saa9730_private *lp) | |||
552 | lp->PendingTxmPacketIndex = 0; | 551 | lp->PendingTxmPacketIndex = 0; |
553 | lp->PendingTxmBufferIndex = 0; | 552 | lp->PendingTxmBufferIndex = 0; |
554 | 553 | ||
555 | outl(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA | | 554 | writel(readl(&lp->lan_saa9730_regs->LanDmaCtl) | DMA_CTL_EN_TX_DMA | |
556 | DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl); | 555 | DMA_CTL_EN_RX_DMA, &lp->lan_saa9730_regs->LanDmaCtl); |
557 | 556 | ||
558 | /* For Tx, turn on MAC then DMA */ | 557 | /* For Tx, turn on MAC then DMA */ |
559 | outl(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN, | 558 | writel(readl(&lp->lan_saa9730_regs->TxCtl) | TX_CTL_TX_EN, |
560 | &lp->lan_saa9730_regs->TxCtl); | 559 | &lp->lan_saa9730_regs->TxCtl); |
561 | 560 | ||
562 | /* For Rx, turn on DMA then MAC */ | 561 | /* For Rx, turn on DMA then MAC */ |
563 | outl(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN, | 562 | writel(readl(&lp->lan_saa9730_regs->RxCtl) | RX_CTL_RX_EN, |
564 | &lp->lan_saa9730_regs->RxCtl); | 563 | &lp->lan_saa9730_regs->RxCtl); |
565 | 564 | ||
566 | /* Set Ok2Use to let hardware own the buffers. */ | 565 | /* Set Ok2Use to let hardware own the buffers. */ |
567 | outl(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use); | 566 | writel(OK2USE_RX_A | OK2USE_RX_B, &lp->lan_saa9730_regs->Ok2Use); |
568 | 567 | ||
569 | return 0; | 568 | return 0; |
570 | } | 569 | } |
@@ -587,7 +586,7 @@ static int lan_saa9730_tx(struct net_device *dev) | |||
587 | printk("lan_saa9730_tx interrupt\n"); | 586 | printk("lan_saa9730_tx interrupt\n"); |
588 | 587 | ||
589 | /* Clear interrupt. */ | 588 | /* Clear interrupt. */ |
590 | outl(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus); | 589 | writel(DMA_STATUS_MAC_TX_INT, &lp->lan_saa9730_regs->DmaStatus); |
591 | 590 | ||
592 | while (1) { | 591 | while (1) { |
593 | pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex] | 592 | pPacket = lp->TxmBuffer[lp->PendingTxmBufferIndex] |
@@ -660,8 +659,8 @@ static int lan_saa9730_rx(struct net_device *dev) | |||
660 | printk("lan_saa9730_rx interrupt\n"); | 659 | printk("lan_saa9730_rx interrupt\n"); |
661 | 660 | ||
662 | /* Clear receive interrupts. */ | 661 | /* Clear receive interrupts. */ |
663 | outl(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT | | 662 | writel(DMA_STATUS_MAC_RX_INT | DMA_STATUS_RX_INT | |
664 | DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus); | 663 | DMA_STATUS_RX_TO_INT, &lp->lan_saa9730_regs->DmaStatus); |
665 | 664 | ||
666 | /* Address next packet */ | 665 | /* Address next packet */ |
667 | BufferIndex = lp->NextRcvBufferIndex; | 666 | BufferIndex = lp->NextRcvBufferIndex; |
@@ -725,8 +724,8 @@ static int lan_saa9730_rx(struct net_device *dev) | |||
725 | *pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF); | 724 | *pPacket = cpu_to_le32(RXSF_READY << RX_STAT_CTL_OWNER_SHF); |
726 | 725 | ||
727 | /* Make sure A or B is available to hardware as appropriate. */ | 726 | /* Make sure A or B is available to hardware as appropriate. */ |
728 | outl(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A, | 727 | writel(BufferIndex ? OK2USE_RX_B : OK2USE_RX_A, |
729 | &lp->lan_saa9730_regs->Ok2Use); | 728 | &lp->lan_saa9730_regs->Ok2Use); |
730 | 729 | ||
731 | /* Go to next packet in sequence. */ | 730 | /* Go to next packet in sequence. */ |
732 | lp->NextRcvPacketIndex++; | 731 | lp->NextRcvPacketIndex++; |
@@ -844,8 +843,8 @@ static int lan_saa9730_write(struct lan_saa9730_private *lp, | |||
844 | (len << TX_STAT_CTL_LENGTH_SHF)); | 843 | (len << TX_STAT_CTL_LENGTH_SHF)); |
845 | 844 | ||
846 | /* Make sure A or B is available to hardware as appropriate. */ | 845 | /* Make sure A or B is available to hardware as appropriate. */ |
847 | outl(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A, | 846 | writel(BufferIndex ? OK2USE_TX_B : OK2USE_TX_A, |
848 | &lp->lan_saa9730_regs->Ok2Use); | 847 | &lp->lan_saa9730_regs->Ok2Use); |
849 | 848 | ||
850 | return 0; | 849 | return 0; |
851 | } | 850 | } |
@@ -938,15 +937,15 @@ static void lan_saa9730_set_multicast(struct net_device *dev) | |||
938 | 937 | ||
939 | if (dev->flags & IFF_PROMISC) { | 938 | if (dev->flags & IFF_PROMISC) { |
940 | /* accept all packets */ | 939 | /* accept all packets */ |
941 | outl(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC | | 940 | writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_STATION_ACC | |
942 | CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC, | 941 | CAM_CONTROL_GROUP_ACC | CAM_CONTROL_BROAD_ACC, |
943 | &lp->lan_saa9730_regs->CamCtl); | 942 | &lp->lan_saa9730_regs->CamCtl); |
944 | } else { | 943 | } else { |
945 | if (dev->flags & IFF_ALLMULTI) { | 944 | if (dev->flags & IFF_ALLMULTI) { |
946 | /* accept all multicast packets */ | 945 | /* accept all multicast packets */ |
947 | outl(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC | | 946 | writel(CAM_CONTROL_COMP_EN | CAM_CONTROL_GROUP_ACC | |
948 | CAM_CONTROL_BROAD_ACC, | 947 | CAM_CONTROL_BROAD_ACC, |
949 | &lp->lan_saa9730_regs->CamCtl); | 948 | &lp->lan_saa9730_regs->CamCtl); |
950 | } else { | 949 | } else { |
951 | /* | 950 | /* |
952 | * Will handle the multicast stuff later. -carstenl | 951 | * Will handle the multicast stuff later. -carstenl |
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c index 1eae16b72b4b..103c3174ab54 100644 --- a/drivers/net/sb1250-mac.c +++ b/drivers/net/sb1250-mac.c | |||
@@ -243,7 +243,7 @@ struct sbmac_softc { | |||
243 | * Controller-specific things | 243 | * Controller-specific things |
244 | */ | 244 | */ |
245 | 245 | ||
246 | volatile void __iomem *sbm_base; /* MAC's base address */ | 246 | void __iomem *sbm_base; /* MAC's base address */ |
247 | sbmac_state_t sbm_state; /* current state */ | 247 | sbmac_state_t sbm_state; /* current state */ |
248 | 248 | ||
249 | volatile void __iomem *sbm_macenable; /* MAC Enable Register */ | 249 | volatile void __iomem *sbm_macenable; /* MAC Enable Register */ |
diff --git a/drivers/net/sc92031.c b/drivers/net/sc92031.c index 4a926f20b6ea..c32c21af3fdd 100644 --- a/drivers/net/sc92031.c +++ b/drivers/net/sc92031.c | |||
@@ -964,7 +964,7 @@ static int sc92031_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
964 | goto out; | 964 | goto out; |
965 | } | 965 | } |
966 | 966 | ||
967 | spin_lock_bh(&priv->lock); | 967 | spin_lock(&priv->lock); |
968 | 968 | ||
969 | if (unlikely(!netif_carrier_ok(dev))) { | 969 | if (unlikely(!netif_carrier_ok(dev))) { |
970 | err = -ENOLINK; | 970 | err = -ENOLINK; |
@@ -1005,7 +1005,7 @@ static int sc92031_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1005 | netif_stop_queue(dev); | 1005 | netif_stop_queue(dev); |
1006 | 1006 | ||
1007 | out_unlock: | 1007 | out_unlock: |
1008 | spin_unlock_bh(&priv->lock); | 1008 | spin_unlock(&priv->lock); |
1009 | 1009 | ||
1010 | out: | 1010 | out: |
1011 | dev_kfree_skb(skb); | 1011 | dev_kfree_skb(skb); |
@@ -1042,12 +1042,12 @@ static int sc92031_open(struct net_device *dev) | |||
1042 | priv->pm_config = 0; | 1042 | priv->pm_config = 0; |
1043 | 1043 | ||
1044 | /* Interrupts already disabled by sc92031_stop or sc92031_probe */ | 1044 | /* Interrupts already disabled by sc92031_stop or sc92031_probe */ |
1045 | spin_lock(&priv->lock); | 1045 | spin_lock_bh(&priv->lock); |
1046 | 1046 | ||
1047 | _sc92031_reset(dev); | 1047 | _sc92031_reset(dev); |
1048 | mmiowb(); | 1048 | mmiowb(); |
1049 | 1049 | ||
1050 | spin_unlock(&priv->lock); | 1050 | spin_unlock_bh(&priv->lock); |
1051 | sc92031_enable_interrupts(dev); | 1051 | sc92031_enable_interrupts(dev); |
1052 | 1052 | ||
1053 | if (netif_carrier_ok(dev)) | 1053 | if (netif_carrier_ok(dev)) |
@@ -1077,13 +1077,13 @@ static int sc92031_stop(struct net_device *dev) | |||
1077 | /* Disable interrupts, stop Tx and Rx. */ | 1077 | /* Disable interrupts, stop Tx and Rx. */ |
1078 | sc92031_disable_interrupts(dev); | 1078 | sc92031_disable_interrupts(dev); |
1079 | 1079 | ||
1080 | spin_lock(&priv->lock); | 1080 | spin_lock_bh(&priv->lock); |
1081 | 1081 | ||
1082 | _sc92031_disable_tx_rx(dev); | 1082 | _sc92031_disable_tx_rx(dev); |
1083 | _sc92031_tx_clear(dev); | 1083 | _sc92031_tx_clear(dev); |
1084 | mmiowb(); | 1084 | mmiowb(); |
1085 | 1085 | ||
1086 | spin_unlock(&priv->lock); | 1086 | spin_unlock_bh(&priv->lock); |
1087 | 1087 | ||
1088 | free_irq(pdev->irq, dev); | 1088 | free_irq(pdev->irq, dev); |
1089 | pci_free_consistent(pdev, TX_BUF_TOT_LEN, priv->tx_bufs, | 1089 | pci_free_consistent(pdev, TX_BUF_TOT_LEN, priv->tx_bufs, |
@@ -1539,13 +1539,13 @@ static int sc92031_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1539 | /* Disable interrupts, stop Tx and Rx. */ | 1539 | /* Disable interrupts, stop Tx and Rx. */ |
1540 | sc92031_disable_interrupts(dev); | 1540 | sc92031_disable_interrupts(dev); |
1541 | 1541 | ||
1542 | spin_lock(&priv->lock); | 1542 | spin_lock_bh(&priv->lock); |
1543 | 1543 | ||
1544 | _sc92031_disable_tx_rx(dev); | 1544 | _sc92031_disable_tx_rx(dev); |
1545 | _sc92031_tx_clear(dev); | 1545 | _sc92031_tx_clear(dev); |
1546 | mmiowb(); | 1546 | mmiowb(); |
1547 | 1547 | ||
1548 | spin_unlock(&priv->lock); | 1548 | spin_unlock_bh(&priv->lock); |
1549 | 1549 | ||
1550 | out: | 1550 | out: |
1551 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 1551 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
@@ -1565,12 +1565,12 @@ static int sc92031_resume(struct pci_dev *pdev) | |||
1565 | goto out; | 1565 | goto out; |
1566 | 1566 | ||
1567 | /* Interrupts already disabled by sc92031_suspend */ | 1567 | /* Interrupts already disabled by sc92031_suspend */ |
1568 | spin_lock(&priv->lock); | 1568 | spin_lock_bh(&priv->lock); |
1569 | 1569 | ||
1570 | _sc92031_reset(dev); | 1570 | _sc92031_reset(dev); |
1571 | mmiowb(); | 1571 | mmiowb(); |
1572 | 1572 | ||
1573 | spin_unlock(&priv->lock); | 1573 | spin_unlock_bh(&priv->lock); |
1574 | sc92031_enable_interrupts(dev); | 1574 | sc92031_enable_interrupts(dev); |
1575 | 1575 | ||
1576 | netif_device_attach(dev); | 1576 | netif_device_attach(dev); |
diff --git a/drivers/net/sis190.c b/drivers/net/sis190.c index b08508b35833..34463ce6f132 100644 --- a/drivers/net/sis190.c +++ b/drivers/net/sis190.c | |||
@@ -324,6 +324,7 @@ static struct mii_chip_info { | |||
324 | u32 feature; | 324 | u32 feature; |
325 | } mii_chip_table[] = { | 325 | } mii_chip_table[] = { |
326 | { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 }, | 326 | { "Broadcom PHY BCM5461", { 0x0020, 0x60c0 }, LAN, F_PHY_BCM5461 }, |
327 | { "Broadcom PHY AC131", { 0x0143, 0xbc70 }, LAN, 0 }, | ||
327 | { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN, 0 }, | 328 | { "Agere PHY ET1101B", { 0x0282, 0xf010 }, LAN, 0 }, |
328 | { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 }, | 329 | { "Marvell PHY 88E1111", { 0x0141, 0x0cc0 }, LAN, F_PHY_88E1111 }, |
329 | { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN, 0 }, | 330 | { "Realtek PHY RTL8201", { 0x0000, 0x8200 }, LAN, 0 }, |
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c index b3750f284279..b2a3b19d773a 100644 --- a/drivers/net/sis900.c +++ b/drivers/net/sis900.c | |||
@@ -1755,6 +1755,24 @@ static int sis900_rx(struct net_device *net_dev) | |||
1755 | } else { | 1755 | } else { |
1756 | struct sk_buff * skb; | 1756 | struct sk_buff * skb; |
1757 | 1757 | ||
1758 | pci_unmap_single(sis_priv->pci_dev, | ||
1759 | sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, | ||
1760 | PCI_DMA_FROMDEVICE); | ||
1761 | |||
1762 | /* refill the Rx buffer, what if there is not enought | ||
1763 | * memory for new socket buffer ?? */ | ||
1764 | if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { | ||
1765 | /* | ||
1766 | * Not enough memory to refill the buffer | ||
1767 | * so we need to recycle the old one so | ||
1768 | * as to avoid creating a memory hole | ||
1769 | * in the rx ring | ||
1770 | */ | ||
1771 | skb = sis_priv->rx_skbuff[entry]; | ||
1772 | sis_priv->stats.rx_dropped++; | ||
1773 | goto refill_rx_ring; | ||
1774 | } | ||
1775 | |||
1758 | /* This situation should never happen, but due to | 1776 | /* This situation should never happen, but due to |
1759 | some unknow bugs, it is possible that | 1777 | some unknow bugs, it is possible that |
1760 | we are working on NULL sk_buff :-( */ | 1778 | we are working on NULL sk_buff :-( */ |
@@ -1768,9 +1786,6 @@ static int sis900_rx(struct net_device *net_dev) | |||
1768 | break; | 1786 | break; |
1769 | } | 1787 | } |
1770 | 1788 | ||
1771 | pci_unmap_single(sis_priv->pci_dev, | ||
1772 | sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE, | ||
1773 | PCI_DMA_FROMDEVICE); | ||
1774 | /* give the socket buffer to upper layers */ | 1789 | /* give the socket buffer to upper layers */ |
1775 | skb = sis_priv->rx_skbuff[entry]; | 1790 | skb = sis_priv->rx_skbuff[entry]; |
1776 | skb_put(skb, rx_size); | 1791 | skb_put(skb, rx_size); |
@@ -1783,33 +1798,14 @@ static int sis900_rx(struct net_device *net_dev) | |||
1783 | net_dev->last_rx = jiffies; | 1798 | net_dev->last_rx = jiffies; |
1784 | sis_priv->stats.rx_bytes += rx_size; | 1799 | sis_priv->stats.rx_bytes += rx_size; |
1785 | sis_priv->stats.rx_packets++; | 1800 | sis_priv->stats.rx_packets++; |
1786 | 1801 | sis_priv->dirty_rx++; | |
1787 | /* refill the Rx buffer, what if there is not enought | 1802 | refill_rx_ring: |
1788 | * memory for new socket buffer ?? */ | ||
1789 | if ((skb = dev_alloc_skb(RX_BUF_SIZE)) == NULL) { | ||
1790 | /* not enough memory for skbuff, this makes a | ||
1791 | * "hole" on the buffer ring, it is not clear | ||
1792 | * how the hardware will react to this kind | ||
1793 | * of degenerated buffer */ | ||
1794 | if (netif_msg_rx_status(sis_priv)) | ||
1795 | printk(KERN_INFO "%s: Memory squeeze," | ||
1796 | "deferring packet.\n", | ||
1797 | net_dev->name); | ||
1798 | sis_priv->rx_skbuff[entry] = NULL; | ||
1799 | /* reset buffer descriptor state */ | ||
1800 | sis_priv->rx_ring[entry].cmdsts = 0; | ||
1801 | sis_priv->rx_ring[entry].bufptr = 0; | ||
1802 | sis_priv->stats.rx_dropped++; | ||
1803 | sis_priv->cur_rx++; | ||
1804 | break; | ||
1805 | } | ||
1806 | skb->dev = net_dev; | 1803 | skb->dev = net_dev; |
1807 | sis_priv->rx_skbuff[entry] = skb; | 1804 | sis_priv->rx_skbuff[entry] = skb; |
1808 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; | 1805 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; |
1809 | sis_priv->rx_ring[entry].bufptr = | 1806 | sis_priv->rx_ring[entry].bufptr = |
1810 | pci_map_single(sis_priv->pci_dev, skb->data, | 1807 | pci_map_single(sis_priv->pci_dev, skb->data, |
1811 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 1808 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1812 | sis_priv->dirty_rx++; | ||
1813 | } | 1809 | } |
1814 | sis_priv->cur_rx++; | 1810 | sis_priv->cur_rx++; |
1815 | entry = sis_priv->cur_rx % NUM_RX_DESC; | 1811 | entry = sis_priv->cur_rx % NUM_RX_DESC; |
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index eea75a401b0c..d476a3cc2e94 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -105,7 +105,8 @@ static const int txqaddr[] = { Q_XA1, Q_XA2 }; | |||
105 | static const int rxqaddr[] = { Q_R1, Q_R2 }; | 105 | static const int rxqaddr[] = { Q_R1, Q_R2 }; |
106 | static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F }; | 106 | static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F }; |
107 | static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F }; | 107 | static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F }; |
108 | static const u32 irqmask[] = { IS_R1_F|IS_XA1_F, IS_R2_F|IS_XA2_F }; | 108 | static const u32 napimask[] = { IS_R1_F|IS_XA1_F, IS_R2_F|IS_XA2_F }; |
109 | static const u32 portmask[] = { IS_PORT_1, IS_PORT_2 }; | ||
109 | 110 | ||
110 | static int skge_get_regs_len(struct net_device *dev) | 111 | static int skge_get_regs_len(struct net_device *dev) |
111 | { | 112 | { |
@@ -162,27 +163,46 @@ static void skge_wol_init(struct skge_port *skge) | |||
162 | { | 163 | { |
163 | struct skge_hw *hw = skge->hw; | 164 | struct skge_hw *hw = skge->hw; |
164 | int port = skge->port; | 165 | int port = skge->port; |
165 | enum pause_control save_mode; | 166 | u16 ctrl; |
166 | u32 ctrl; | ||
167 | 167 | ||
168 | /* Bring hardware out of reset */ | ||
169 | skge_write16(hw, B0_CTST, CS_RST_CLR); | 168 | skge_write16(hw, B0_CTST, CS_RST_CLR); |
170 | skge_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR); | 169 | skge_write16(hw, SK_REG(port, GMAC_LINK_CTRL), GMLC_RST_CLR); |
171 | 170 | ||
172 | skge_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_CLR); | 171 | /* Turn on Vaux */ |
173 | skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); | 172 | skge_write8(hw, B0_POWER_CTRL, |
173 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF); | ||
174 | 174 | ||
175 | /* Force to 10/100 skge_reset will re-enable on resume */ | 175 | /* WA code for COMA mode -- clear PHY reset */ |
176 | save_mode = skge->flow_control; | 176 | if (hw->chip_id == CHIP_ID_YUKON_LITE && |
177 | skge->flow_control = FLOW_MODE_SYMMETRIC; | 177 | hw->chip_rev >= CHIP_REV_YU_LITE_A3) { |
178 | u32 reg = skge_read32(hw, B2_GP_IO); | ||
179 | reg |= GP_DIR_9; | ||
180 | reg &= ~GP_IO_9; | ||
181 | skge_write32(hw, B2_GP_IO, reg); | ||
182 | } | ||
178 | 183 | ||
179 | ctrl = skge->advertising; | 184 | skge_write32(hw, SK_REG(port, GPHY_CTRL), |
180 | skge->advertising &= ~(ADVERTISED_1000baseT_Half|ADVERTISED_1000baseT_Full); | 185 | GPC_DIS_SLEEP | |
186 | GPC_HWCFG_M_3 | GPC_HWCFG_M_2 | GPC_HWCFG_M_1 | GPC_HWCFG_M_0 | | ||
187 | GPC_ANEG_1 | GPC_RST_SET); | ||
181 | 188 | ||
182 | skge_phy_reset(skge); | 189 | skge_write32(hw, SK_REG(port, GPHY_CTRL), |
190 | GPC_DIS_SLEEP | | ||
191 | GPC_HWCFG_M_3 | GPC_HWCFG_M_2 | GPC_HWCFG_M_1 | GPC_HWCFG_M_0 | | ||
192 | GPC_ANEG_1 | GPC_RST_CLR); | ||
193 | |||
194 | skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_CLR); | ||
195 | |||
196 | /* Force to 10/100 skge_reset will re-enable on resume */ | ||
197 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, | ||
198 | PHY_AN_100FULL | PHY_AN_100HALF | | ||
199 | PHY_AN_10FULL | PHY_AN_10HALF| PHY_AN_CSMA); | ||
200 | /* no 1000 HD/FD */ | ||
201 | gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, 0); | ||
202 | gm_phy_write(hw, port, PHY_MARV_CTRL, | ||
203 | PHY_CT_RESET | PHY_CT_SPS_LSB | PHY_CT_ANE | | ||
204 | PHY_CT_RE_CFG | PHY_CT_DUP_MD); | ||
183 | 205 | ||
184 | skge->flow_control = save_mode; | ||
185 | skge->advertising = ctrl; | ||
186 | 206 | ||
187 | /* Set GMAC to no flow control and auto update for speed/duplex */ | 207 | /* Set GMAC to no flow control and auto update for speed/duplex */ |
188 | gma_write16(hw, port, GM_GP_CTRL, | 208 | gma_write16(hw, port, GM_GP_CTRL, |
@@ -226,12 +246,10 @@ static int skge_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
226 | struct skge_port *skge = netdev_priv(dev); | 246 | struct skge_port *skge = netdev_priv(dev); |
227 | struct skge_hw *hw = skge->hw; | 247 | struct skge_hw *hw = skge->hw; |
228 | 248 | ||
229 | if (wol->wolopts & wol_supported(hw)) | 249 | if (wol->wolopts & ~wol_supported(hw)) |
230 | return -EOPNOTSUPP; | 250 | return -EOPNOTSUPP; |
231 | 251 | ||
232 | skge->wol = wol->wolopts; | 252 | skge->wol = wol->wolopts; |
233 | if (!netif_running(dev)) | ||
234 | skge_wol_init(skge); | ||
235 | return 0; | 253 | return 0; |
236 | } | 254 | } |
237 | 255 | ||
@@ -671,7 +689,7 @@ static void skge_led(struct skge_port *skge, enum led_mode mode) | |||
671 | struct skge_hw *hw = skge->hw; | 689 | struct skge_hw *hw = skge->hw; |
672 | int port = skge->port; | 690 | int port = skge->port; |
673 | 691 | ||
674 | mutex_lock(&hw->phy_mutex); | 692 | spin_lock_bh(&hw->phy_lock); |
675 | if (hw->chip_id == CHIP_ID_GENESIS) { | 693 | if (hw->chip_id == CHIP_ID_GENESIS) { |
676 | switch (mode) { | 694 | switch (mode) { |
677 | case LED_MODE_OFF: | 695 | case LED_MODE_OFF: |
@@ -742,7 +760,7 @@ static void skge_led(struct skge_port *skge, enum led_mode mode) | |||
742 | PHY_M_LED_MO_RX(MO_LED_ON)); | 760 | PHY_M_LED_MO_RX(MO_LED_ON)); |
743 | } | 761 | } |
744 | } | 762 | } |
745 | mutex_unlock(&hw->phy_mutex); | 763 | spin_unlock_bh(&hw->phy_lock); |
746 | } | 764 | } |
747 | 765 | ||
748 | /* blink LED's for finding board */ | 766 | /* blink LED's for finding board */ |
@@ -1316,7 +1334,7 @@ static void xm_phy_init(struct skge_port *skge) | |||
1316 | xm_phy_write(hw, port, PHY_XMAC_CTRL, ctrl); | 1334 | xm_phy_write(hw, port, PHY_XMAC_CTRL, ctrl); |
1317 | 1335 | ||
1318 | /* Poll PHY for status changes */ | 1336 | /* Poll PHY for status changes */ |
1319 | schedule_delayed_work(&skge->link_thread, LINK_HZ); | 1337 | mod_timer(&skge->link_timer, jiffies + LINK_HZ); |
1320 | } | 1338 | } |
1321 | 1339 | ||
1322 | static void xm_check_link(struct net_device *dev) | 1340 | static void xm_check_link(struct net_device *dev) |
@@ -1391,10 +1409,9 @@ static void xm_check_link(struct net_device *dev) | |||
1391 | * Since internal PHY is wired to a level triggered pin, can't | 1409 | * Since internal PHY is wired to a level triggered pin, can't |
1392 | * get an interrupt when carrier is detected. | 1410 | * get an interrupt when carrier is detected. |
1393 | */ | 1411 | */ |
1394 | static void xm_link_timer(struct work_struct *work) | 1412 | static void xm_link_timer(unsigned long arg) |
1395 | { | 1413 | { |
1396 | struct skge_port *skge = | 1414 | struct skge_port *skge = (struct skge_port *) arg; |
1397 | container_of(work, struct skge_port, link_thread.work); | ||
1398 | struct net_device *dev = skge->netdev; | 1415 | struct net_device *dev = skge->netdev; |
1399 | struct skge_hw *hw = skge->hw; | 1416 | struct skge_hw *hw = skge->hw; |
1400 | int port = skge->port; | 1417 | int port = skge->port; |
@@ -1414,13 +1431,13 @@ static void xm_link_timer(struct work_struct *work) | |||
1414 | goto nochange; | 1431 | goto nochange; |
1415 | } | 1432 | } |
1416 | 1433 | ||
1417 | mutex_lock(&hw->phy_mutex); | 1434 | spin_lock(&hw->phy_lock); |
1418 | xm_check_link(dev); | 1435 | xm_check_link(dev); |
1419 | mutex_unlock(&hw->phy_mutex); | 1436 | spin_unlock(&hw->phy_lock); |
1420 | 1437 | ||
1421 | nochange: | 1438 | nochange: |
1422 | if (netif_running(dev)) | 1439 | if (netif_running(dev)) |
1423 | schedule_delayed_work(&skge->link_thread, LINK_HZ); | 1440 | mod_timer(&skge->link_timer, jiffies + LINK_HZ); |
1424 | } | 1441 | } |
1425 | 1442 | ||
1426 | static void genesis_mac_init(struct skge_hw *hw, int port) | 1443 | static void genesis_mac_init(struct skge_hw *hw, int port) |
@@ -2323,7 +2340,7 @@ static void skge_phy_reset(struct skge_port *skge) | |||
2323 | netif_stop_queue(skge->netdev); | 2340 | netif_stop_queue(skge->netdev); |
2324 | netif_carrier_off(skge->netdev); | 2341 | netif_carrier_off(skge->netdev); |
2325 | 2342 | ||
2326 | mutex_lock(&hw->phy_mutex); | 2343 | spin_lock_bh(&hw->phy_lock); |
2327 | if (hw->chip_id == CHIP_ID_GENESIS) { | 2344 | if (hw->chip_id == CHIP_ID_GENESIS) { |
2328 | genesis_reset(hw, port); | 2345 | genesis_reset(hw, port); |
2329 | genesis_mac_init(hw, port); | 2346 | genesis_mac_init(hw, port); |
@@ -2331,7 +2348,7 @@ static void skge_phy_reset(struct skge_port *skge) | |||
2331 | yukon_reset(hw, port); | 2348 | yukon_reset(hw, port); |
2332 | yukon_init(hw, port); | 2349 | yukon_init(hw, port); |
2333 | } | 2350 | } |
2334 | mutex_unlock(&hw->phy_mutex); | 2351 | spin_unlock_bh(&hw->phy_lock); |
2335 | 2352 | ||
2336 | dev->set_multicast_list(dev); | 2353 | dev->set_multicast_list(dev); |
2337 | } | 2354 | } |
@@ -2354,12 +2371,12 @@ static int skge_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
2354 | /* fallthru */ | 2371 | /* fallthru */ |
2355 | case SIOCGMIIREG: { | 2372 | case SIOCGMIIREG: { |
2356 | u16 val = 0; | 2373 | u16 val = 0; |
2357 | mutex_lock(&hw->phy_mutex); | 2374 | spin_lock_bh(&hw->phy_lock); |
2358 | if (hw->chip_id == CHIP_ID_GENESIS) | 2375 | if (hw->chip_id == CHIP_ID_GENESIS) |
2359 | err = __xm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); | 2376 | err = __xm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); |
2360 | else | 2377 | else |
2361 | err = __gm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); | 2378 | err = __gm_phy_read(hw, skge->port, data->reg_num & 0x1f, &val); |
2362 | mutex_unlock(&hw->phy_mutex); | 2379 | spin_unlock_bh(&hw->phy_lock); |
2363 | data->val_out = val; | 2380 | data->val_out = val; |
2364 | break; | 2381 | break; |
2365 | } | 2382 | } |
@@ -2368,14 +2385,14 @@ static int skge_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
2368 | if (!capable(CAP_NET_ADMIN)) | 2385 | if (!capable(CAP_NET_ADMIN)) |
2369 | return -EPERM; | 2386 | return -EPERM; |
2370 | 2387 | ||
2371 | mutex_lock(&hw->phy_mutex); | 2388 | spin_lock_bh(&hw->phy_lock); |
2372 | if (hw->chip_id == CHIP_ID_GENESIS) | 2389 | if (hw->chip_id == CHIP_ID_GENESIS) |
2373 | err = xm_phy_write(hw, skge->port, data->reg_num & 0x1f, | 2390 | err = xm_phy_write(hw, skge->port, data->reg_num & 0x1f, |
2374 | data->val_in); | 2391 | data->val_in); |
2375 | else | 2392 | else |
2376 | err = gm_phy_write(hw, skge->port, data->reg_num & 0x1f, | 2393 | err = gm_phy_write(hw, skge->port, data->reg_num & 0x1f, |
2377 | data->val_in); | 2394 | data->val_in); |
2378 | mutex_unlock(&hw->phy_mutex); | 2395 | spin_unlock_bh(&hw->phy_lock); |
2379 | break; | 2396 | break; |
2380 | } | 2397 | } |
2381 | return err; | 2398 | return err; |
@@ -2481,12 +2498,12 @@ static int skge_up(struct net_device *dev) | |||
2481 | goto free_rx_ring; | 2498 | goto free_rx_ring; |
2482 | 2499 | ||
2483 | /* Initialize MAC */ | 2500 | /* Initialize MAC */ |
2484 | mutex_lock(&hw->phy_mutex); | 2501 | spin_lock_bh(&hw->phy_lock); |
2485 | if (hw->chip_id == CHIP_ID_GENESIS) | 2502 | if (hw->chip_id == CHIP_ID_GENESIS) |
2486 | genesis_mac_init(hw, port); | 2503 | genesis_mac_init(hw, port); |
2487 | else | 2504 | else |
2488 | yukon_mac_init(hw, port); | 2505 | yukon_mac_init(hw, port); |
2489 | mutex_unlock(&hw->phy_mutex); | 2506 | spin_unlock_bh(&hw->phy_lock); |
2490 | 2507 | ||
2491 | /* Configure RAMbuffers */ | 2508 | /* Configure RAMbuffers */ |
2492 | chunk = hw->ram_size / ((hw->ports + 1)*2); | 2509 | chunk = hw->ram_size / ((hw->ports + 1)*2); |
@@ -2504,6 +2521,11 @@ static int skge_up(struct net_device *dev) | |||
2504 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); | 2521 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); |
2505 | skge_led(skge, LED_MODE_ON); | 2522 | skge_led(skge, LED_MODE_ON); |
2506 | 2523 | ||
2524 | spin_lock_irq(&hw->hw_lock); | ||
2525 | hw->intr_mask |= portmask[port]; | ||
2526 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2527 | spin_unlock_irq(&hw->hw_lock); | ||
2528 | |||
2507 | netif_poll_enable(dev); | 2529 | netif_poll_enable(dev); |
2508 | return 0; | 2530 | return 0; |
2509 | 2531 | ||
@@ -2530,8 +2552,17 @@ static int skge_down(struct net_device *dev) | |||
2530 | printk(KERN_INFO PFX "%s: disabling interface\n", dev->name); | 2552 | printk(KERN_INFO PFX "%s: disabling interface\n", dev->name); |
2531 | 2553 | ||
2532 | netif_stop_queue(dev); | 2554 | netif_stop_queue(dev); |
2555 | |||
2533 | if (hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC) | 2556 | if (hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC) |
2534 | cancel_delayed_work(&skge->link_thread); | 2557 | del_timer_sync(&skge->link_timer); |
2558 | |||
2559 | netif_poll_disable(dev); | ||
2560 | netif_carrier_off(dev); | ||
2561 | |||
2562 | spin_lock_irq(&hw->hw_lock); | ||
2563 | hw->intr_mask &= ~portmask[port]; | ||
2564 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2565 | spin_unlock_irq(&hw->hw_lock); | ||
2535 | 2566 | ||
2536 | skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF); | 2567 | skge_write8(skge->hw, SK_REG(skge->port, LNK_LED_REG), LED_OFF); |
2537 | if (hw->chip_id == CHIP_ID_GENESIS) | 2568 | if (hw->chip_id == CHIP_ID_GENESIS) |
@@ -2575,8 +2606,10 @@ static int skge_down(struct net_device *dev) | |||
2575 | 2606 | ||
2576 | skge_led(skge, LED_MODE_OFF); | 2607 | skge_led(skge, LED_MODE_OFF); |
2577 | 2608 | ||
2578 | netif_poll_disable(dev); | 2609 | netif_tx_lock_bh(dev); |
2579 | skge_tx_clean(dev); | 2610 | skge_tx_clean(dev); |
2611 | netif_tx_unlock_bh(dev); | ||
2612 | |||
2580 | skge_rx_clean(skge); | 2613 | skge_rx_clean(skge); |
2581 | 2614 | ||
2582 | kfree(skge->rx_ring.start); | 2615 | kfree(skge->rx_ring.start); |
@@ -2721,7 +2754,6 @@ static void skge_tx_clean(struct net_device *dev) | |||
2721 | struct skge_port *skge = netdev_priv(dev); | 2754 | struct skge_port *skge = netdev_priv(dev); |
2722 | struct skge_element *e; | 2755 | struct skge_element *e; |
2723 | 2756 | ||
2724 | netif_tx_lock_bh(dev); | ||
2725 | for (e = skge->tx_ring.to_clean; e != skge->tx_ring.to_use; e = e->next) { | 2757 | for (e = skge->tx_ring.to_clean; e != skge->tx_ring.to_use; e = e->next) { |
2726 | struct skge_tx_desc *td = e->desc; | 2758 | struct skge_tx_desc *td = e->desc; |
2727 | skge_tx_free(skge, e, td->control); | 2759 | skge_tx_free(skge, e, td->control); |
@@ -2730,7 +2762,6 @@ static void skge_tx_clean(struct net_device *dev) | |||
2730 | 2762 | ||
2731 | skge->tx_ring.to_clean = e; | 2763 | skge->tx_ring.to_clean = e; |
2732 | netif_wake_queue(dev); | 2764 | netif_wake_queue(dev); |
2733 | netif_tx_unlock_bh(dev); | ||
2734 | } | 2765 | } |
2735 | 2766 | ||
2736 | static void skge_tx_timeout(struct net_device *dev) | 2767 | static void skge_tx_timeout(struct net_device *dev) |
@@ -3049,7 +3080,7 @@ static int skge_poll(struct net_device *dev, int *budget) | |||
3049 | 3080 | ||
3050 | spin_lock_irqsave(&hw->hw_lock, flags); | 3081 | spin_lock_irqsave(&hw->hw_lock, flags); |
3051 | __netif_rx_complete(dev); | 3082 | __netif_rx_complete(dev); |
3052 | hw->intr_mask |= irqmask[skge->port]; | 3083 | hw->intr_mask |= napimask[skge->port]; |
3053 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 3084 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
3054 | skge_read32(hw, B0_IMSK); | 3085 | skge_read32(hw, B0_IMSK); |
3055 | spin_unlock_irqrestore(&hw->hw_lock, flags); | 3086 | spin_unlock_irqrestore(&hw->hw_lock, flags); |
@@ -3160,28 +3191,29 @@ static void skge_error_irq(struct skge_hw *hw) | |||
3160 | } | 3191 | } |
3161 | 3192 | ||
3162 | /* | 3193 | /* |
3163 | * Interrupt from PHY are handled in work queue | 3194 | * Interrupt from PHY are handled in tasklet (softirq) |
3164 | * because accessing phy registers requires spin wait which might | 3195 | * because accessing phy registers requires spin wait which might |
3165 | * cause excess interrupt latency. | 3196 | * cause excess interrupt latency. |
3166 | */ | 3197 | */ |
3167 | static void skge_extirq(struct work_struct *work) | 3198 | static void skge_extirq(unsigned long arg) |
3168 | { | 3199 | { |
3169 | struct skge_hw *hw = container_of(work, struct skge_hw, phy_work); | 3200 | struct skge_hw *hw = (struct skge_hw *) arg; |
3170 | int port; | 3201 | int port; |
3171 | 3202 | ||
3172 | mutex_lock(&hw->phy_mutex); | ||
3173 | for (port = 0; port < hw->ports; port++) { | 3203 | for (port = 0; port < hw->ports; port++) { |
3174 | struct net_device *dev = hw->dev[port]; | 3204 | struct net_device *dev = hw->dev[port]; |
3175 | struct skge_port *skge = netdev_priv(dev); | ||
3176 | 3205 | ||
3177 | if (netif_running(dev)) { | 3206 | if (netif_running(dev)) { |
3207 | struct skge_port *skge = netdev_priv(dev); | ||
3208 | |||
3209 | spin_lock(&hw->phy_lock); | ||
3178 | if (hw->chip_id != CHIP_ID_GENESIS) | 3210 | if (hw->chip_id != CHIP_ID_GENESIS) |
3179 | yukon_phy_intr(skge); | 3211 | yukon_phy_intr(skge); |
3180 | else if (hw->phy_type == SK_PHY_BCOM) | 3212 | else if (hw->phy_type == SK_PHY_BCOM) |
3181 | bcom_phy_intr(skge); | 3213 | bcom_phy_intr(skge); |
3214 | spin_unlock(&hw->phy_lock); | ||
3182 | } | 3215 | } |
3183 | } | 3216 | } |
3184 | mutex_unlock(&hw->phy_mutex); | ||
3185 | 3217 | ||
3186 | spin_lock_irq(&hw->hw_lock); | 3218 | spin_lock_irq(&hw->hw_lock); |
3187 | hw->intr_mask |= IS_EXT_REG; | 3219 | hw->intr_mask |= IS_EXT_REG; |
@@ -3206,7 +3238,7 @@ static irqreturn_t skge_intr(int irq, void *dev_id) | |||
3206 | status &= hw->intr_mask; | 3238 | status &= hw->intr_mask; |
3207 | if (status & IS_EXT_REG) { | 3239 | if (status & IS_EXT_REG) { |
3208 | hw->intr_mask &= ~IS_EXT_REG; | 3240 | hw->intr_mask &= ~IS_EXT_REG; |
3209 | schedule_work(&hw->phy_work); | 3241 | tasklet_schedule(&hw->phy_task); |
3210 | } | 3242 | } |
3211 | 3243 | ||
3212 | if (status & (IS_XA1_F|IS_R1_F)) { | 3244 | if (status & (IS_XA1_F|IS_R1_F)) { |
@@ -3275,24 +3307,35 @@ static int skge_set_mac_address(struct net_device *dev, void *p) | |||
3275 | struct skge_hw *hw = skge->hw; | 3307 | struct skge_hw *hw = skge->hw; |
3276 | unsigned port = skge->port; | 3308 | unsigned port = skge->port; |
3277 | const struct sockaddr *addr = p; | 3309 | const struct sockaddr *addr = p; |
3310 | u16 ctrl; | ||
3278 | 3311 | ||
3279 | if (!is_valid_ether_addr(addr->sa_data)) | 3312 | if (!is_valid_ether_addr(addr->sa_data)) |
3280 | return -EADDRNOTAVAIL; | 3313 | return -EADDRNOTAVAIL; |
3281 | 3314 | ||
3282 | mutex_lock(&hw->phy_mutex); | ||
3283 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | 3315 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); |
3284 | memcpy_toio(hw->regs + B2_MAC_1 + port*8, | ||
3285 | dev->dev_addr, ETH_ALEN); | ||
3286 | memcpy_toio(hw->regs + B2_MAC_2 + port*8, | ||
3287 | dev->dev_addr, ETH_ALEN); | ||
3288 | 3316 | ||
3289 | if (hw->chip_id == CHIP_ID_GENESIS) | 3317 | if (!netif_running(dev)) { |
3290 | xm_outaddr(hw, port, XM_SA, dev->dev_addr); | 3318 | memcpy_toio(hw->regs + B2_MAC_1 + port*8, dev->dev_addr, ETH_ALEN); |
3291 | else { | 3319 | memcpy_toio(hw->regs + B2_MAC_2 + port*8, dev->dev_addr, ETH_ALEN); |
3292 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); | 3320 | } else { |
3293 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); | 3321 | /* disable Rx */ |
3322 | spin_lock_bh(&hw->phy_lock); | ||
3323 | ctrl = gma_read16(hw, port, GM_GP_CTRL); | ||
3324 | gma_write16(hw, port, GM_GP_CTRL, ctrl & ~GM_GPCR_RX_ENA); | ||
3325 | |||
3326 | memcpy_toio(hw->regs + B2_MAC_1 + port*8, dev->dev_addr, ETH_ALEN); | ||
3327 | memcpy_toio(hw->regs + B2_MAC_2 + port*8, dev->dev_addr, ETH_ALEN); | ||
3328 | |||
3329 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
3330 | xm_outaddr(hw, port, XM_SA, dev->dev_addr); | ||
3331 | else { | ||
3332 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, dev->dev_addr); | ||
3333 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, dev->dev_addr); | ||
3334 | } | ||
3335 | |||
3336 | gma_write16(hw, port, GM_GP_CTRL, ctrl); | ||
3337 | spin_unlock_bh(&hw->phy_lock); | ||
3294 | } | 3338 | } |
3295 | mutex_unlock(&hw->phy_mutex); | ||
3296 | 3339 | ||
3297 | return 0; | 3340 | return 0; |
3298 | } | 3341 | } |
@@ -3407,10 +3450,9 @@ static int skge_reset(struct skge_hw *hw) | |||
3407 | else | 3450 | else |
3408 | hw->ram_size = t8 * 4096; | 3451 | hw->ram_size = t8 * 4096; |
3409 | 3452 | ||
3410 | hw->intr_mask = IS_HW_ERR | IS_PORT_1; | 3453 | hw->intr_mask = IS_HW_ERR; |
3411 | if (hw->ports > 1) | ||
3412 | hw->intr_mask |= IS_PORT_2; | ||
3413 | 3454 | ||
3455 | /* Use PHY IRQ for all but fiber based Genesis board */ | ||
3414 | if (!(hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC)) | 3456 | if (!(hw->chip_id == CHIP_ID_GENESIS && hw->phy_type == SK_PHY_XMAC)) |
3415 | hw->intr_mask |= IS_EXT_REG; | 3457 | hw->intr_mask |= IS_EXT_REG; |
3416 | 3458 | ||
@@ -3478,14 +3520,12 @@ static int skge_reset(struct skge_hw *hw) | |||
3478 | 3520 | ||
3479 | skge_write32(hw, B0_IMSK, hw->intr_mask); | 3521 | skge_write32(hw, B0_IMSK, hw->intr_mask); |
3480 | 3522 | ||
3481 | mutex_lock(&hw->phy_mutex); | ||
3482 | for (i = 0; i < hw->ports; i++) { | 3523 | for (i = 0; i < hw->ports; i++) { |
3483 | if (hw->chip_id == CHIP_ID_GENESIS) | 3524 | if (hw->chip_id == CHIP_ID_GENESIS) |
3484 | genesis_reset(hw, i); | 3525 | genesis_reset(hw, i); |
3485 | else | 3526 | else |
3486 | yukon_reset(hw, i); | 3527 | yukon_reset(hw, i); |
3487 | } | 3528 | } |
3488 | mutex_unlock(&hw->phy_mutex); | ||
3489 | 3529 | ||
3490 | return 0; | 3530 | return 0; |
3491 | } | 3531 | } |
@@ -3533,6 +3573,7 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, | |||
3533 | skge->netdev = dev; | 3573 | skge->netdev = dev; |
3534 | skge->hw = hw; | 3574 | skge->hw = hw; |
3535 | skge->msg_enable = netif_msg_init(debug, default_msg); | 3575 | skge->msg_enable = netif_msg_init(debug, default_msg); |
3576 | |||
3536 | skge->tx_ring.count = DEFAULT_TX_RING_SIZE; | 3577 | skge->tx_ring.count = DEFAULT_TX_RING_SIZE; |
3537 | skge->rx_ring.count = DEFAULT_RX_RING_SIZE; | 3578 | skge->rx_ring.count = DEFAULT_RX_RING_SIZE; |
3538 | 3579 | ||
@@ -3549,7 +3590,7 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, | |||
3549 | skge->port = port; | 3590 | skge->port = port; |
3550 | 3591 | ||
3551 | /* Only used for Genesis XMAC */ | 3592 | /* Only used for Genesis XMAC */ |
3552 | INIT_DELAYED_WORK(&skge->link_thread, xm_link_timer); | 3593 | setup_timer(&skge->link_timer, xm_link_timer, (unsigned long) skge); |
3553 | 3594 | ||
3554 | if (hw->chip_id != CHIP_ID_GENESIS) { | 3595 | if (hw->chip_id != CHIP_ID_GENESIS) { |
3555 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; | 3596 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; |
@@ -3631,9 +3672,9 @@ static int __devinit skge_probe(struct pci_dev *pdev, | |||
3631 | } | 3672 | } |
3632 | 3673 | ||
3633 | hw->pdev = pdev; | 3674 | hw->pdev = pdev; |
3634 | mutex_init(&hw->phy_mutex); | ||
3635 | INIT_WORK(&hw->phy_work, skge_extirq); | ||
3636 | spin_lock_init(&hw->hw_lock); | 3675 | spin_lock_init(&hw->hw_lock); |
3676 | spin_lock_init(&hw->phy_lock); | ||
3677 | tasklet_init(&hw->phy_task, &skge_extirq, (unsigned long) hw); | ||
3637 | 3678 | ||
3638 | hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); | 3679 | hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); |
3639 | if (!hw->regs) { | 3680 | if (!hw->regs) { |
@@ -3719,6 +3760,8 @@ static void __devexit skge_remove(struct pci_dev *pdev) | |||
3719 | dev0 = hw->dev[0]; | 3760 | dev0 = hw->dev[0]; |
3720 | unregister_netdev(dev0); | 3761 | unregister_netdev(dev0); |
3721 | 3762 | ||
3763 | tasklet_disable(&hw->phy_task); | ||
3764 | |||
3722 | spin_lock_irq(&hw->hw_lock); | 3765 | spin_lock_irq(&hw->hw_lock); |
3723 | hw->intr_mask = 0; | 3766 | hw->intr_mask = 0; |
3724 | skge_write32(hw, B0_IMSK, 0); | 3767 | skge_write32(hw, B0_IMSK, 0); |
@@ -3741,21 +3784,6 @@ static void __devexit skge_remove(struct pci_dev *pdev) | |||
3741 | } | 3784 | } |
3742 | 3785 | ||
3743 | #ifdef CONFIG_PM | 3786 | #ifdef CONFIG_PM |
3744 | static int vaux_avail(struct pci_dev *pdev) | ||
3745 | { | ||
3746 | int pm_cap; | ||
3747 | |||
3748 | pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); | ||
3749 | if (pm_cap) { | ||
3750 | u16 ctl; | ||
3751 | pci_read_config_word(pdev, pm_cap + PCI_PM_PMC, &ctl); | ||
3752 | if (ctl & PCI_PM_CAP_AUX_POWER) | ||
3753 | return 1; | ||
3754 | } | ||
3755 | return 0; | ||
3756 | } | ||
3757 | |||
3758 | |||
3759 | static int skge_suspend(struct pci_dev *pdev, pm_message_t state) | 3787 | static int skge_suspend(struct pci_dev *pdev, pm_message_t state) |
3760 | { | 3788 | { |
3761 | struct skge_hw *hw = pci_get_drvdata(pdev); | 3789 | struct skge_hw *hw = pci_get_drvdata(pdev); |
@@ -3777,10 +3805,6 @@ static int skge_suspend(struct pci_dev *pdev, pm_message_t state) | |||
3777 | wol |= skge->wol; | 3805 | wol |= skge->wol; |
3778 | } | 3806 | } |
3779 | 3807 | ||
3780 | if (wol && vaux_avail(pdev)) | ||
3781 | skge_write8(hw, B0_POWER_CTRL, | ||
3782 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF); | ||
3783 | |||
3784 | skge_write32(hw, B0_IMSK, 0); | 3808 | skge_write32(hw, B0_IMSK, 0); |
3785 | pci_enable_wake(pdev, pci_choose_state(pdev, state), wol); | 3809 | pci_enable_wake(pdev, pci_choose_state(pdev, state), wol); |
3786 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 3810 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
@@ -3826,6 +3850,28 @@ out: | |||
3826 | } | 3850 | } |
3827 | #endif | 3851 | #endif |
3828 | 3852 | ||
3853 | static void skge_shutdown(struct pci_dev *pdev) | ||
3854 | { | ||
3855 | struct skge_hw *hw = pci_get_drvdata(pdev); | ||
3856 | int i, wol = 0; | ||
3857 | |||
3858 | for (i = 0; i < hw->ports; i++) { | ||
3859 | struct net_device *dev = hw->dev[i]; | ||
3860 | struct skge_port *skge = netdev_priv(dev); | ||
3861 | |||
3862 | if (skge->wol) | ||
3863 | skge_wol_init(skge); | ||
3864 | wol |= skge->wol; | ||
3865 | } | ||
3866 | |||
3867 | pci_enable_wake(pdev, PCI_D3hot, wol); | ||
3868 | pci_enable_wake(pdev, PCI_D3cold, wol); | ||
3869 | |||
3870 | pci_disable_device(pdev); | ||
3871 | pci_set_power_state(pdev, PCI_D3hot); | ||
3872 | |||
3873 | } | ||
3874 | |||
3829 | static struct pci_driver skge_driver = { | 3875 | static struct pci_driver skge_driver = { |
3830 | .name = DRV_NAME, | 3876 | .name = DRV_NAME, |
3831 | .id_table = skge_id_table, | 3877 | .id_table = skge_id_table, |
@@ -3835,6 +3881,7 @@ static struct pci_driver skge_driver = { | |||
3835 | .suspend = skge_suspend, | 3881 | .suspend = skge_suspend, |
3836 | .resume = skge_resume, | 3882 | .resume = skge_resume, |
3837 | #endif | 3883 | #endif |
3884 | .shutdown = skge_shutdown, | ||
3838 | }; | 3885 | }; |
3839 | 3886 | ||
3840 | static int __init skge_init_module(void) | 3887 | static int __init skge_init_module(void) |
diff --git a/drivers/net/skge.h b/drivers/net/skge.h index e9354dfa7e9a..86467ae74d45 100644 --- a/drivers/net/skge.h +++ b/drivers/net/skge.h | |||
@@ -2424,8 +2424,8 @@ struct skge_hw { | |||
2424 | u32 ram_size; | 2424 | u32 ram_size; |
2425 | u32 ram_offset; | 2425 | u32 ram_offset; |
2426 | u16 phy_addr; | 2426 | u16 phy_addr; |
2427 | struct work_struct phy_work; | 2427 | spinlock_t phy_lock; |
2428 | struct mutex phy_mutex; | 2428 | struct tasklet_struct phy_task; |
2429 | }; | 2429 | }; |
2430 | 2430 | ||
2431 | enum pause_control { | 2431 | enum pause_control { |
@@ -2457,7 +2457,7 @@ struct skge_port { | |||
2457 | 2457 | ||
2458 | struct net_device_stats net_stats; | 2458 | struct net_device_stats net_stats; |
2459 | 2459 | ||
2460 | struct delayed_work link_thread; | 2460 | struct timer_list link_timer; |
2461 | enum pause_control flow_control; | 2461 | enum pause_control flow_control; |
2462 | enum pause_status flow_status; | 2462 | enum pause_status flow_status; |
2463 | u8 rx_csum; | 2463 | u8 rx_csum; |
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index ab0ab92583fe..ac36152c68bf 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -49,7 +49,7 @@ | |||
49 | #include "sky2.h" | 49 | #include "sky2.h" |
50 | 50 | ||
51 | #define DRV_NAME "sky2" | 51 | #define DRV_NAME "sky2" |
52 | #define DRV_VERSION "1.13" | 52 | #define DRV_VERSION "1.14" |
53 | #define PFX DRV_NAME " " | 53 | #define PFX DRV_NAME " " |
54 | 54 | ||
55 | /* | 55 | /* |
@@ -123,7 +123,10 @@ static const struct pci_device_id sky2_id_table[] = { | |||
123 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */ | 123 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, /* 88E8050 */ |
124 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */ | 124 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, /* 88E8053 */ |
125 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */ | 125 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) }, /* 88E8055 */ |
126 | #ifdef broken | ||
127 | /* This device causes data corruption problems that are not resolved */ | ||
126 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */ | 128 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4364) }, /* 88E8056 */ |
129 | #endif | ||
127 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */ | 130 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4366) }, /* 88EC036 */ |
128 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */ | 131 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4367) }, /* 88EC032 */ |
129 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */ | 132 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4368) }, /* 88EC034 */ |
@@ -510,9 +513,9 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
510 | ledover &= ~PHY_M_LED_MO_RX; | 513 | ledover &= ~PHY_M_LED_MO_RX; |
511 | } | 514 | } |
512 | 515 | ||
513 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && hw->chip_rev == CHIP_REV_YU_EC_A1) { | 516 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && |
517 | hw->chip_rev == CHIP_REV_YU_EC_U_A1) { | ||
514 | /* apply fixes in PHY AFE */ | 518 | /* apply fixes in PHY AFE */ |
515 | pg = gm_phy_read(hw, port, PHY_MARV_EXT_ADR); | ||
516 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255); | 519 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 255); |
517 | 520 | ||
518 | /* increase differential signal amplitude in 10BASE-T */ | 521 | /* increase differential signal amplitude in 10BASE-T */ |
@@ -524,7 +527,7 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
524 | gm_phy_write(hw, port, 0x17, 0x2002); | 527 | gm_phy_write(hw, port, 0x17, 0x2002); |
525 | 528 | ||
526 | /* set page register to 0 */ | 529 | /* set page register to 0 */ |
527 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, pg); | 530 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); |
528 | } else if (hw->chip_id != CHIP_ID_YUKON_EX) { | 531 | } else if (hw->chip_id != CHIP_ID_YUKON_EX) { |
529 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); | 532 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); |
530 | 533 | ||
@@ -740,12 +743,17 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
740 | if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) { | 743 | if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) { |
741 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); | 744 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); |
742 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); | 745 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); |
743 | if (hw->dev[port]->mtu > ETH_DATA_LEN) { | 746 | |
744 | /* set Tx GMAC FIFO Almost Empty Threshold */ | 747 | /* set Tx GMAC FIFO Almost Empty Threshold */ |
745 | sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), 0x180); | 748 | sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), |
746 | /* Disable Store & Forward mode for TX */ | 749 | (ECU_JUMBO_WM << 16) | ECU_AE_THR); |
747 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); | 750 | |
748 | } | 751 | if (hw->dev[port]->mtu > ETH_DATA_LEN) |
752 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | ||
753 | TX_JUMBO_ENA | TX_STFW_DIS); | ||
754 | else | ||
755 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | ||
756 | TX_JUMBO_DIS | TX_STFW_ENA); | ||
749 | } | 757 | } |
750 | 758 | ||
751 | } | 759 | } |
@@ -1278,7 +1286,7 @@ static int sky2_up(struct net_device *dev) | |||
1278 | /* Set almost empty threshold */ | 1286 | /* Set almost empty threshold */ |
1279 | if (hw->chip_id == CHIP_ID_YUKON_EC_U | 1287 | if (hw->chip_id == CHIP_ID_YUKON_EC_U |
1280 | && hw->chip_rev == CHIP_REV_YU_EC_U_A0) | 1288 | && hw->chip_rev == CHIP_REV_YU_EC_U_A0) |
1281 | sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0); | 1289 | sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); |
1282 | 1290 | ||
1283 | sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, | 1291 | sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, |
1284 | TX_RING_SIZE - 1); | 1292 | TX_RING_SIZE - 1); |
@@ -1561,6 +1569,7 @@ static int sky2_down(struct net_device *dev) | |||
1561 | 1569 | ||
1562 | /* Stop more packets from being queued */ | 1570 | /* Stop more packets from being queued */ |
1563 | netif_stop_queue(dev); | 1571 | netif_stop_queue(dev); |
1572 | netif_carrier_off(dev); | ||
1564 | 1573 | ||
1565 | /* Disable port IRQ */ | 1574 | /* Disable port IRQ */ |
1566 | imask = sky2_read32(hw, B0_IMSK); | 1575 | imask = sky2_read32(hw, B0_IMSK); |
@@ -1583,13 +1592,6 @@ static int sky2_down(struct net_device *dev) | |||
1583 | sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), | 1592 | sky2_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), |
1584 | RB_RST_SET | RB_DIS_OP_MD); | 1593 | RB_RST_SET | RB_DIS_OP_MD); |
1585 | 1594 | ||
1586 | /* WA for dev. #4.209 */ | ||
1587 | if (hw->chip_id == CHIP_ID_YUKON_EC_U | ||
1588 | && (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) | ||
1589 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | ||
1590 | sky2->speed != SPEED_1000 ? | ||
1591 | TX_STFW_ENA : TX_STFW_DIS); | ||
1592 | |||
1593 | ctrl = gma_read16(hw, port, GM_GP_CTRL); | 1595 | ctrl = gma_read16(hw, port, GM_GP_CTRL); |
1594 | ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA); | 1596 | ctrl &= ~(GM_GPCR_TX_ENA | GM_GPCR_RX_ENA); |
1595 | gma_write16(hw, port, GM_GP_CTRL, ctrl); | 1597 | gma_write16(hw, port, GM_GP_CTRL, ctrl); |
@@ -1889,6 +1891,7 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
1889 | { | 1891 | { |
1890 | struct sky2_port *sky2 = netdev_priv(dev); | 1892 | struct sky2_port *sky2 = netdev_priv(dev); |
1891 | struct sky2_hw *hw = sky2->hw; | 1893 | struct sky2_hw *hw = sky2->hw; |
1894 | unsigned port = sky2->port; | ||
1892 | int err; | 1895 | int err; |
1893 | u16 ctl, mode; | 1896 | u16 ctl, mode; |
1894 | u32 imask; | 1897 | u32 imask; |
@@ -1896,9 +1899,8 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
1896 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) | 1899 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) |
1897 | return -EINVAL; | 1900 | return -EINVAL; |
1898 | 1901 | ||
1899 | /* TSO on Yukon Ultra and MTU > 1500 not supported */ | 1902 | if (new_mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_FE) |
1900 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && new_mtu > ETH_DATA_LEN) | 1903 | return -EINVAL; |
1901 | dev->features &= ~NETIF_F_TSO; | ||
1902 | 1904 | ||
1903 | if (!netif_running(dev)) { | 1905 | if (!netif_running(dev)) { |
1904 | dev->mtu = new_mtu; | 1906 | dev->mtu = new_mtu; |
@@ -1914,8 +1916,18 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
1914 | 1916 | ||
1915 | synchronize_irq(hw->pdev->irq); | 1917 | synchronize_irq(hw->pdev->irq); |
1916 | 1918 | ||
1917 | ctl = gma_read16(hw, sky2->port, GM_GP_CTRL); | 1919 | if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) { |
1918 | gma_write16(hw, sky2->port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); | 1920 | if (new_mtu > ETH_DATA_LEN) { |
1921 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | ||
1922 | TX_JUMBO_ENA | TX_STFW_DIS); | ||
1923 | dev->features &= NETIF_F_TSO | NETIF_F_SG | NETIF_F_IP_CSUM; | ||
1924 | } else | ||
1925 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | ||
1926 | TX_JUMBO_DIS | TX_STFW_ENA); | ||
1927 | } | ||
1928 | |||
1929 | ctl = gma_read16(hw, port, GM_GP_CTRL); | ||
1930 | gma_write16(hw, port, GM_GP_CTRL, ctl & ~GM_GPCR_RX_ENA); | ||
1919 | sky2_rx_stop(sky2); | 1931 | sky2_rx_stop(sky2); |
1920 | sky2_rx_clean(sky2); | 1932 | sky2_rx_clean(sky2); |
1921 | 1933 | ||
@@ -1927,9 +1939,9 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
1927 | if (dev->mtu > ETH_DATA_LEN) | 1939 | if (dev->mtu > ETH_DATA_LEN) |
1928 | mode |= GM_SMOD_JUMBO_ENA; | 1940 | mode |= GM_SMOD_JUMBO_ENA; |
1929 | 1941 | ||
1930 | gma_write16(hw, sky2->port, GM_SERIAL_MODE, mode); | 1942 | gma_write16(hw, port, GM_SERIAL_MODE, mode); |
1931 | 1943 | ||
1932 | sky2_write8(hw, RB_ADDR(rxqaddr[sky2->port], RB_CTRL), RB_ENA_OP_MD); | 1944 | sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); |
1933 | 1945 | ||
1934 | err = sky2_rx_start(sky2); | 1946 | err = sky2_rx_start(sky2); |
1935 | sky2_write32(hw, B0_IMSK, imask); | 1947 | sky2_write32(hw, B0_IMSK, imask); |
@@ -1937,7 +1949,7 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
1937 | if (err) | 1949 | if (err) |
1938 | dev_close(dev); | 1950 | dev_close(dev); |
1939 | else { | 1951 | else { |
1940 | gma_write16(hw, sky2->port, GM_GP_CTRL, ctl); | 1952 | gma_write16(hw, port, GM_GP_CTRL, ctl); |
1941 | 1953 | ||
1942 | netif_poll_enable(hw->dev[0]); | 1954 | netif_poll_enable(hw->dev[0]); |
1943 | netif_wake_queue(dev); | 1955 | netif_wake_queue(dev); |
@@ -2339,26 +2351,22 @@ static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) | |||
2339 | } | 2351 | } |
2340 | } | 2352 | } |
2341 | 2353 | ||
2342 | /* This should never happen it is a fatal situation */ | 2354 | /* This should never happen it is a bug. */ |
2343 | static void sky2_descriptor_error(struct sky2_hw *hw, unsigned port, | 2355 | static void sky2_le_error(struct sky2_hw *hw, unsigned port, |
2344 | const char *rxtx, u32 mask) | 2356 | u16 q, unsigned ring_size) |
2345 | { | 2357 | { |
2346 | struct net_device *dev = hw->dev[port]; | 2358 | struct net_device *dev = hw->dev[port]; |
2347 | struct sky2_port *sky2 = netdev_priv(dev); | 2359 | struct sky2_port *sky2 = netdev_priv(dev); |
2348 | u32 imask; | 2360 | unsigned idx; |
2349 | 2361 | const u64 *le = (q == Q_R1 || q == Q_R2) | |
2350 | printk(KERN_ERR PFX "%s: %s descriptor error (hardware problem)\n", | 2362 | ? (u64 *) sky2->rx_le : (u64 *) sky2->tx_le; |
2351 | dev ? dev->name : "<not registered>", rxtx); | ||
2352 | 2363 | ||
2353 | imask = sky2_read32(hw, B0_IMSK); | 2364 | idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); |
2354 | imask &= ~mask; | 2365 | printk(KERN_ERR PFX "%s: descriptor error q=%#x get=%u [%llx] put=%u\n", |
2355 | sky2_write32(hw, B0_IMSK, imask); | 2366 | dev->name, (unsigned) q, idx, (unsigned long long) le[idx], |
2367 | (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX))); | ||
2356 | 2368 | ||
2357 | if (dev) { | 2369 | sky2_write32(hw, Q_ADDR(q, Q_CSR), BMU_CLR_IRQ_CHK); |
2358 | spin_lock(&sky2->phy_lock); | ||
2359 | sky2_link_down(sky2); | ||
2360 | spin_unlock(&sky2->phy_lock); | ||
2361 | } | ||
2362 | } | 2370 | } |
2363 | 2371 | ||
2364 | /* If idle then force a fake soft NAPI poll once a second | 2372 | /* If idle then force a fake soft NAPI poll once a second |
@@ -2382,23 +2390,15 @@ static void sky2_idle(unsigned long arg) | |||
2382 | mod_timer(&hw->idle_timer, jiffies + msecs_to_jiffies(idle_timeout)); | 2390 | mod_timer(&hw->idle_timer, jiffies + msecs_to_jiffies(idle_timeout)); |
2383 | } | 2391 | } |
2384 | 2392 | ||
2385 | 2393 | /* Hardware/software error handling */ | |
2386 | static int sky2_poll(struct net_device *dev0, int *budget) | 2394 | static void sky2_err_intr(struct sky2_hw *hw, u32 status) |
2387 | { | 2395 | { |
2388 | struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw; | 2396 | if (net_ratelimit()) |
2389 | int work_limit = min(dev0->quota, *budget); | 2397 | dev_warn(&hw->pdev->dev, "error interrupt status=%#x\n", status); |
2390 | int work_done = 0; | ||
2391 | u32 status = sky2_read32(hw, B0_Y2_SP_EISR); | ||
2392 | 2398 | ||
2393 | if (status & Y2_IS_HW_ERR) | 2399 | if (status & Y2_IS_HW_ERR) |
2394 | sky2_hw_intr(hw); | 2400 | sky2_hw_intr(hw); |
2395 | 2401 | ||
2396 | if (status & Y2_IS_IRQ_PHY1) | ||
2397 | sky2_phy_intr(hw, 0); | ||
2398 | |||
2399 | if (status & Y2_IS_IRQ_PHY2) | ||
2400 | sky2_phy_intr(hw, 1); | ||
2401 | |||
2402 | if (status & Y2_IS_IRQ_MAC1) | 2402 | if (status & Y2_IS_IRQ_MAC1) |
2403 | sky2_mac_intr(hw, 0); | 2403 | sky2_mac_intr(hw, 0); |
2404 | 2404 | ||
@@ -2406,16 +2406,33 @@ static int sky2_poll(struct net_device *dev0, int *budget) | |||
2406 | sky2_mac_intr(hw, 1); | 2406 | sky2_mac_intr(hw, 1); |
2407 | 2407 | ||
2408 | if (status & Y2_IS_CHK_RX1) | 2408 | if (status & Y2_IS_CHK_RX1) |
2409 | sky2_descriptor_error(hw, 0, "receive", Y2_IS_CHK_RX1); | 2409 | sky2_le_error(hw, 0, Q_R1, RX_LE_SIZE); |
2410 | 2410 | ||
2411 | if (status & Y2_IS_CHK_RX2) | 2411 | if (status & Y2_IS_CHK_RX2) |
2412 | sky2_descriptor_error(hw, 1, "receive", Y2_IS_CHK_RX2); | 2412 | sky2_le_error(hw, 1, Q_R2, RX_LE_SIZE); |
2413 | 2413 | ||
2414 | if (status & Y2_IS_CHK_TXA1) | 2414 | if (status & Y2_IS_CHK_TXA1) |
2415 | sky2_descriptor_error(hw, 0, "transmit", Y2_IS_CHK_TXA1); | 2415 | sky2_le_error(hw, 0, Q_XA1, TX_RING_SIZE); |
2416 | 2416 | ||
2417 | if (status & Y2_IS_CHK_TXA2) | 2417 | if (status & Y2_IS_CHK_TXA2) |
2418 | sky2_descriptor_error(hw, 1, "transmit", Y2_IS_CHK_TXA2); | 2418 | sky2_le_error(hw, 1, Q_XA2, TX_RING_SIZE); |
2419 | } | ||
2420 | |||
2421 | static int sky2_poll(struct net_device *dev0, int *budget) | ||
2422 | { | ||
2423 | struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw; | ||
2424 | int work_limit = min(dev0->quota, *budget); | ||
2425 | int work_done = 0; | ||
2426 | u32 status = sky2_read32(hw, B0_Y2_SP_EISR); | ||
2427 | |||
2428 | if (unlikely(status & Y2_IS_ERROR)) | ||
2429 | sky2_err_intr(hw, status); | ||
2430 | |||
2431 | if (status & Y2_IS_IRQ_PHY1) | ||
2432 | sky2_phy_intr(hw, 0); | ||
2433 | |||
2434 | if (status & Y2_IS_IRQ_PHY2) | ||
2435 | sky2_phy_intr(hw, 1); | ||
2419 | 2436 | ||
2420 | work_done = sky2_status_intr(hw, work_limit); | 2437 | work_done = sky2_status_intr(hw, work_limit); |
2421 | if (work_done < work_limit) { | 2438 | if (work_done < work_limit) { |
@@ -2533,16 +2550,14 @@ static void sky2_reset(struct sky2_hw *hw) | |||
2533 | int i; | 2550 | int i; |
2534 | 2551 | ||
2535 | /* disable ASF */ | 2552 | /* disable ASF */ |
2536 | if (hw->chip_id <= CHIP_ID_YUKON_EC) { | 2553 | if (hw->chip_id == CHIP_ID_YUKON_EX) { |
2537 | if (hw->chip_id == CHIP_ID_YUKON_EX) { | 2554 | status = sky2_read16(hw, HCU_CCSR); |
2538 | status = sky2_read16(hw, HCU_CCSR); | 2555 | status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE | |
2539 | status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE | | 2556 | HCU_CCSR_UC_STATE_MSK); |
2540 | HCU_CCSR_UC_STATE_MSK); | 2557 | sky2_write16(hw, HCU_CCSR, status); |
2541 | sky2_write16(hw, HCU_CCSR, status); | 2558 | } else |
2542 | } else | 2559 | sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); |
2543 | sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); | 2560 | sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); |
2544 | sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); | ||
2545 | } | ||
2546 | 2561 | ||
2547 | /* do a SW reset */ | 2562 | /* do a SW reset */ |
2548 | sky2_write8(hw, B0_CTST, CS_RST_SET); | 2563 | sky2_write8(hw, B0_CTST, CS_RST_SET); |
@@ -3327,6 +3342,36 @@ static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
3327 | regs->len - B3_RI_WTO_R1); | 3342 | regs->len - B3_RI_WTO_R1); |
3328 | } | 3343 | } |
3329 | 3344 | ||
3345 | /* In order to do Jumbo packets on these chips, need to turn off the | ||
3346 | * transmit store/forward. Therefore checksum offload won't work. | ||
3347 | */ | ||
3348 | static int no_tx_offload(struct net_device *dev) | ||
3349 | { | ||
3350 | const struct sky2_port *sky2 = netdev_priv(dev); | ||
3351 | const struct sky2_hw *hw = sky2->hw; | ||
3352 | |||
3353 | return dev->mtu > ETH_DATA_LEN && | ||
3354 | (hw->chip_id == CHIP_ID_YUKON_EX | ||
3355 | || hw->chip_id == CHIP_ID_YUKON_EC_U); | ||
3356 | } | ||
3357 | |||
3358 | static int sky2_set_tx_csum(struct net_device *dev, u32 data) | ||
3359 | { | ||
3360 | if (data && no_tx_offload(dev)) | ||
3361 | return -EINVAL; | ||
3362 | |||
3363 | return ethtool_op_set_tx_csum(dev, data); | ||
3364 | } | ||
3365 | |||
3366 | |||
3367 | static int sky2_set_tso(struct net_device *dev, u32 data) | ||
3368 | { | ||
3369 | if (data && no_tx_offload(dev)) | ||
3370 | return -EINVAL; | ||
3371 | |||
3372 | return ethtool_op_set_tso(dev, data); | ||
3373 | } | ||
3374 | |||
3330 | static const struct ethtool_ops sky2_ethtool_ops = { | 3375 | static const struct ethtool_ops sky2_ethtool_ops = { |
3331 | .get_settings = sky2_get_settings, | 3376 | .get_settings = sky2_get_settings, |
3332 | .set_settings = sky2_set_settings, | 3377 | .set_settings = sky2_set_settings, |
@@ -3342,9 +3387,9 @@ static const struct ethtool_ops sky2_ethtool_ops = { | |||
3342 | .get_sg = ethtool_op_get_sg, | 3387 | .get_sg = ethtool_op_get_sg, |
3343 | .set_sg = ethtool_op_set_sg, | 3388 | .set_sg = ethtool_op_set_sg, |
3344 | .get_tx_csum = ethtool_op_get_tx_csum, | 3389 | .get_tx_csum = ethtool_op_get_tx_csum, |
3345 | .set_tx_csum = ethtool_op_set_tx_csum, | 3390 | .set_tx_csum = sky2_set_tx_csum, |
3346 | .get_tso = ethtool_op_get_tso, | 3391 | .get_tso = ethtool_op_get_tso, |
3347 | .set_tso = ethtool_op_set_tso, | 3392 | .set_tso = sky2_set_tso, |
3348 | .get_rx_csum = sky2_get_rx_csum, | 3393 | .get_rx_csum = sky2_get_rx_csum, |
3349 | .set_rx_csum = sky2_set_rx_csum, | 3394 | .set_rx_csum = sky2_set_rx_csum, |
3350 | .get_strings = sky2_get_strings, | 3395 | .get_strings = sky2_get_strings, |
@@ -3769,6 +3814,11 @@ static int sky2_resume(struct pci_dev *pdev) | |||
3769 | goto out; | 3814 | goto out; |
3770 | 3815 | ||
3771 | pci_enable_wake(pdev, PCI_D0, 0); | 3816 | pci_enable_wake(pdev, PCI_D0, 0); |
3817 | |||
3818 | /* Re-enable all clocks */ | ||
3819 | if (hw->chip_id == CHIP_ID_YUKON_EX || hw->chip_id == CHIP_ID_YUKON_EC_U) | ||
3820 | sky2_pci_write32(hw, PCI_DEV_REG3, 0); | ||
3821 | |||
3772 | sky2_reset(hw); | 3822 | sky2_reset(hw); |
3773 | 3823 | ||
3774 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); | 3824 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); |
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h index ac24bdc42976..5efb5afc45ba 100644 --- a/drivers/net/sky2.h +++ b/drivers/net/sky2.h | |||
@@ -288,6 +288,9 @@ enum { | |||
288 | | Y2_IS_CHK_TXA1 | Y2_IS_CHK_RX1, | 288 | | Y2_IS_CHK_TXA1 | Y2_IS_CHK_RX1, |
289 | Y2_IS_PORT_2 = Y2_IS_IRQ_PHY2 | Y2_IS_IRQ_MAC2 | 289 | Y2_IS_PORT_2 = Y2_IS_IRQ_PHY2 | Y2_IS_IRQ_MAC2 |
290 | | Y2_IS_CHK_TXA2 | Y2_IS_CHK_RX2, | 290 | | Y2_IS_CHK_TXA2 | Y2_IS_CHK_RX2, |
291 | Y2_IS_ERROR = Y2_IS_HW_ERR | | ||
292 | Y2_IS_IRQ_MAC1 | Y2_IS_CHK_TXA1 | Y2_IS_CHK_RX1 | | ||
293 | Y2_IS_IRQ_MAC2 | Y2_IS_CHK_TXA2 | Y2_IS_CHK_RX2, | ||
291 | }; | 294 | }; |
292 | 295 | ||
293 | /* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */ | 296 | /* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */ |
@@ -738,6 +741,11 @@ enum { | |||
738 | TX_GMF_RP = 0x0d70,/* 32 bit Tx GMAC FIFO Read Pointer */ | 741 | TX_GMF_RP = 0x0d70,/* 32 bit Tx GMAC FIFO Read Pointer */ |
739 | TX_GMF_RSTP = 0x0d74,/* 32 bit Tx GMAC FIFO Restart Pointer */ | 742 | TX_GMF_RSTP = 0x0d74,/* 32 bit Tx GMAC FIFO Restart Pointer */ |
740 | TX_GMF_RLEV = 0x0d78,/* 32 bit Tx GMAC FIFO Read Level */ | 743 | TX_GMF_RLEV = 0x0d78,/* 32 bit Tx GMAC FIFO Read Level */ |
744 | |||
745 | /* Threshold values for Yukon-EC Ultra and Extreme */ | ||
746 | ECU_AE_THR = 0x0070, /* Almost Empty Threshold */ | ||
747 | ECU_TXFF_LEV = 0x01a0, /* Tx BMU FIFO Level */ | ||
748 | ECU_JUMBO_WM = 0x0080, /* Jumbo Mode Watermark */ | ||
741 | }; | 749 | }; |
742 | 750 | ||
743 | /* Descriptor Poll Timer Registers */ | 751 | /* Descriptor Poll Timer Registers */ |
@@ -1631,6 +1639,9 @@ enum { | |||
1631 | TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */ | 1639 | TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */ |
1632 | TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */ | 1640 | TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */ |
1633 | 1641 | ||
1642 | TX_JUMBO_ENA = 1<<23,/* PCI Jumbo Mode enable (Yukon-EC Ultra) */ | ||
1643 | TX_JUMBO_DIS = 1<<22,/* PCI Jumbo Mode enable (Yukon-EC Ultra) */ | ||
1644 | |||
1634 | GMF_WSP_TST_ON = 1<<18,/* Write Shadow Pointer Test On */ | 1645 | GMF_WSP_TST_ON = 1<<18,/* Write Shadow Pointer Test On */ |
1635 | GMF_WSP_TST_OFF = 1<<17,/* Write Shadow Pointer Test Off */ | 1646 | GMF_WSP_TST_OFF = 1<<17,/* Write Shadow Pointer Test Off */ |
1636 | GMF_WSP_STEP = 1<<16,/* Write Shadow Pointer Step/Increment */ | 1647 | GMF_WSP_STEP = 1<<16,/* Write Shadow Pointer Step/Increment */ |
diff --git a/drivers/net/spider_net.c b/drivers/net/spider_net.c index 3b91af89e4c7..e3019d52c30f 100644 --- a/drivers/net/spider_net.c +++ b/drivers/net/spider_net.c | |||
@@ -719,7 +719,7 @@ spider_net_prepare_tx_descr(struct spider_net_card *card, | |||
719 | SPIDER_NET_DESCR_CARDOWNED | SPIDER_NET_DMAC_NOCS; | 719 | SPIDER_NET_DESCR_CARDOWNED | SPIDER_NET_DMAC_NOCS; |
720 | spin_unlock_irqrestore(&chain->lock, flags); | 720 | spin_unlock_irqrestore(&chain->lock, flags); |
721 | 721 | ||
722 | if (skb->protocol == htons(ETH_P_IP)) | 722 | if (skb->protocol == htons(ETH_P_IP) && skb->ip_summed == CHECKSUM_PARTIAL) |
723 | switch (skb->nh.iph->protocol) { | 723 | switch (skb->nh.iph->protocol) { |
724 | case IPPROTO_TCP: | 724 | case IPPROTO_TCP: |
725 | hwdescr->dmac_cmd_status |= SPIDER_NET_DMAC_TCP; | 725 | hwdescr->dmac_cmd_status |= SPIDER_NET_DMAC_TCP; |
diff --git a/drivers/net/sun3lance.c b/drivers/net/sun3lance.c index c62e85d89f41..7bee45b42a2c 100644 --- a/drivers/net/sun3lance.c +++ b/drivers/net/sun3lance.c | |||
@@ -336,13 +336,27 @@ static int __init lance_probe( struct net_device *dev) | |||
336 | 336 | ||
337 | /* XXX - leak? */ | 337 | /* XXX - leak? */ |
338 | MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000); | 338 | MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000); |
339 | if (MEM == NULL) { | ||
340 | #ifdef CONFIG_SUN3 | ||
341 | iounmap((void __iomem *)ioaddr); | ||
342 | #endif | ||
343 | printk(KERN_WARNING "SUN3 Lance couldn't allocate DVMA memory\n"); | ||
344 | return 0; | ||
345 | } | ||
339 | 346 | ||
340 | lp->iobase = (volatile unsigned short *)ioaddr; | 347 | lp->iobase = (volatile unsigned short *)ioaddr; |
341 | dev->base_addr = (unsigned long)ioaddr; /* informational only */ | 348 | dev->base_addr = (unsigned long)ioaddr; /* informational only */ |
342 | 349 | ||
343 | REGA(CSR0) = CSR0_STOP; | 350 | REGA(CSR0) = CSR0_STOP; |
344 | 351 | ||
345 | request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev); | 352 | if (request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev) < 0) { |
353 | #ifdef CONFIG_SUN3 | ||
354 | iounmap((void __iomem *)ioaddr); | ||
355 | #endif | ||
356 | dvma_free((void *)MEM); | ||
357 | printk(KERN_WARNING "SUN3 Lance unable to allocate IRQ\n"); | ||
358 | return 0; | ||
359 | } | ||
346 | dev->irq = (unsigned short)LANCE_IRQ; | 360 | dev->irq = (unsigned short)LANCE_IRQ; |
347 | 361 | ||
348 | 362 | ||
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c index 616be8d0fa85..08ea61db46fe 100644 --- a/drivers/net/sungem.c +++ b/drivers/net/sungem.c | |||
@@ -2530,6 +2530,35 @@ static struct net_device_stats *gem_get_stats(struct net_device *dev) | |||
2530 | return &gp->net_stats; | 2530 | return &gp->net_stats; |
2531 | } | 2531 | } |
2532 | 2532 | ||
2533 | static int gem_set_mac_address(struct net_device *dev, void *addr) | ||
2534 | { | ||
2535 | struct sockaddr *macaddr = (struct sockaddr *) addr; | ||
2536 | struct gem *gp = dev->priv; | ||
2537 | unsigned char *e = &dev->dev_addr[0]; | ||
2538 | |||
2539 | if (!is_valid_ether_addr(macaddr->sa_data)) | ||
2540 | return -EADDRNOTAVAIL; | ||
2541 | |||
2542 | if (!netif_running(dev) || !netif_device_present(dev)) { | ||
2543 | /* We'll just catch it later when the | ||
2544 | * device is up'd or resumed. | ||
2545 | */ | ||
2546 | memcpy(dev->dev_addr, macaddr->sa_data, dev->addr_len); | ||
2547 | return 0; | ||
2548 | } | ||
2549 | |||
2550 | mutex_lock(&gp->pm_mutex); | ||
2551 | memcpy(dev->dev_addr, macaddr->sa_data, dev->addr_len); | ||
2552 | if (gp->running) { | ||
2553 | writel((e[4] << 8) | e[5], gp->regs + MAC_ADDR0); | ||
2554 | writel((e[2] << 8) | e[3], gp->regs + MAC_ADDR1); | ||
2555 | writel((e[0] << 8) | e[1], gp->regs + MAC_ADDR2); | ||
2556 | } | ||
2557 | mutex_unlock(&gp->pm_mutex); | ||
2558 | |||
2559 | return 0; | ||
2560 | } | ||
2561 | |||
2533 | static void gem_set_multicast(struct net_device *dev) | 2562 | static void gem_set_multicast(struct net_device *dev) |
2534 | { | 2563 | { |
2535 | struct gem *gp = dev->priv; | 2564 | struct gem *gp = dev->priv; |
@@ -3122,6 +3151,7 @@ static int __devinit gem_init_one(struct pci_dev *pdev, | |||
3122 | dev->change_mtu = gem_change_mtu; | 3151 | dev->change_mtu = gem_change_mtu; |
3123 | dev->irq = pdev->irq; | 3152 | dev->irq = pdev->irq; |
3124 | dev->dma = 0; | 3153 | dev->dma = 0; |
3154 | dev->set_mac_address = gem_set_mac_address; | ||
3125 | #ifdef CONFIG_NET_POLL_CONTROLLER | 3155 | #ifdef CONFIG_NET_POLL_CONTROLLER |
3126 | dev->poll_controller = gem_poll_controller; | 3156 | dev->poll_controller = gem_poll_controller; |
3127 | #endif | 3157 | #endif |
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c index ef671739cfea..192bbc91c731 100644 --- a/drivers/net/sunhme.c +++ b/drivers/net/sunhme.c | |||
@@ -3314,7 +3314,7 @@ static int __devexit hme_sbus_remove(struct of_device *dev) | |||
3314 | struct happy_meal *hp = dev_get_drvdata(&dev->dev); | 3314 | struct happy_meal *hp = dev_get_drvdata(&dev->dev); |
3315 | struct net_device *net_dev = hp->dev; | 3315 | struct net_device *net_dev = hp->dev; |
3316 | 3316 | ||
3317 | unregister_netdevice(net_dev); | 3317 | unregister_netdev(net_dev); |
3318 | 3318 | ||
3319 | /* XXX qfe parent interrupt... */ | 3319 | /* XXX qfe parent interrupt... */ |
3320 | 3320 | ||
diff --git a/drivers/net/sunlance.c b/drivers/net/sunlance.c index 5b00d79b5573..b0929a457b60 100644 --- a/drivers/net/sunlance.c +++ b/drivers/net/sunlance.c | |||
@@ -1550,7 +1550,7 @@ static int __exit sunlance_sun4_remove(void) | |||
1550 | struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev); | 1550 | struct lance_private *lp = dev_get_drvdata(&sun4_sdev.ofdev.dev); |
1551 | struct net_device *net_dev = lp->dev; | 1551 | struct net_device *net_dev = lp->dev; |
1552 | 1552 | ||
1553 | unregister_netdevice(net_dev); | 1553 | unregister_netdev(net_dev); |
1554 | 1554 | ||
1555 | lance_free_hwresources(lp); | 1555 | lance_free_hwresources(lp); |
1556 | 1556 | ||
@@ -1590,7 +1590,7 @@ static int __devexit sunlance_sbus_remove(struct of_device *dev) | |||
1590 | struct lance_private *lp = dev_get_drvdata(&dev->dev); | 1590 | struct lance_private *lp = dev_get_drvdata(&dev->dev); |
1591 | struct net_device *net_dev = lp->dev; | 1591 | struct net_device *net_dev = lp->dev; |
1592 | 1592 | ||
1593 | unregister_netdevice(net_dev); | 1593 | unregister_netdev(net_dev); |
1594 | 1594 | ||
1595 | lance_free_hwresources(lp); | 1595 | lance_free_hwresources(lp); |
1596 | 1596 | ||
diff --git a/drivers/net/sunqe.c b/drivers/net/sunqe.c index 7874eb1ef043..f3bad56d476a 100644 --- a/drivers/net/sunqe.c +++ b/drivers/net/sunqe.c | |||
@@ -845,6 +845,8 @@ static int __init qec_ether_init(struct sbus_dev *sdev) | |||
845 | if (!dev) | 845 | if (!dev) |
846 | return -ENOMEM; | 846 | return -ENOMEM; |
847 | 847 | ||
848 | memcpy(dev->dev_addr, idprom->id_ethaddr, 6); | ||
849 | |||
848 | qe = netdev_priv(dev); | 850 | qe = netdev_priv(dev); |
849 | 851 | ||
850 | i = of_getintprop_default(sdev->ofdev.node, "channel#", -1); | 852 | i = of_getintprop_default(sdev->ofdev.node, "channel#", -1); |
@@ -960,7 +962,7 @@ static int __devexit qec_sbus_remove(struct of_device *dev) | |||
960 | struct sunqe *qp = dev_get_drvdata(&dev->dev); | 962 | struct sunqe *qp = dev_get_drvdata(&dev->dev); |
961 | struct net_device *net_dev = qp->dev; | 963 | struct net_device *net_dev = qp->dev; |
962 | 964 | ||
963 | unregister_netdevice(net_dev); | 965 | unregister_netdev(net_dev); |
964 | 966 | ||
965 | sbus_iounmap(qp->qcregs, CREG_REG_SIZE); | 967 | sbus_iounmap(qp->qcregs, CREG_REG_SIZE); |
966 | sbus_iounmap(qp->mregs, MREGS_REG_SIZE); | 968 | sbus_iounmap(qp->mregs, MREGS_REG_SIZE); |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 8c8f9f4d47a5..256969e1300c 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -64,8 +64,8 @@ | |||
64 | 64 | ||
65 | #define DRV_MODULE_NAME "tg3" | 65 | #define DRV_MODULE_NAME "tg3" |
66 | #define PFX DRV_MODULE_NAME ": " | 66 | #define PFX DRV_MODULE_NAME ": " |
67 | #define DRV_MODULE_VERSION "3.74" | 67 | #define DRV_MODULE_VERSION "3.75" |
68 | #define DRV_MODULE_RELDATE "February 20, 2007" | 68 | #define DRV_MODULE_RELDATE "March 23, 2007" |
69 | 69 | ||
70 | #define TG3_DEF_MAC_MODE 0 | 70 | #define TG3_DEF_MAC_MODE 0 |
71 | #define TG3_DEF_RX_MODE 0 | 71 | #define TG3_DEF_RX_MODE 0 |
@@ -3568,32 +3568,34 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id) | |||
3568 | * Reading the PCI State register will confirm whether the | 3568 | * Reading the PCI State register will confirm whether the |
3569 | * interrupt is ours and will flush the status block. | 3569 | * interrupt is ours and will flush the status block. |
3570 | */ | 3570 | */ |
3571 | if ((sblk->status & SD_STATUS_UPDATED) || | 3571 | if (unlikely(!(sblk->status & SD_STATUS_UPDATED))) { |
3572 | !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { | 3572 | if ((tp->tg3_flags & TG3_FLAG_CHIP_RESETTING) || |
3573 | /* | 3573 | (tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { |
3574 | * Writing any value to intr-mbox-0 clears PCI INTA# and | 3574 | handled = 0; |
3575 | * chip-internal interrupt pending events. | ||
3576 | * Writing non-zero to intr-mbox-0 additional tells the | ||
3577 | * NIC to stop sending us irqs, engaging "in-intr-handler" | ||
3578 | * event coalescing. | ||
3579 | */ | ||
3580 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | ||
3581 | 0x00000001); | ||
3582 | if (tg3_irq_sync(tp)) | ||
3583 | goto out; | 3575 | goto out; |
3584 | sblk->status &= ~SD_STATUS_UPDATED; | ||
3585 | if (likely(tg3_has_work(tp))) { | ||
3586 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | ||
3587 | netif_rx_schedule(dev); /* schedule NAPI poll */ | ||
3588 | } else { | ||
3589 | /* No work, shared interrupt perhaps? re-enable | ||
3590 | * interrupts, and flush that PCI write | ||
3591 | */ | ||
3592 | tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | ||
3593 | 0x00000000); | ||
3594 | } | 3576 | } |
3595 | } else { /* shared interrupt */ | 3577 | } |
3596 | handled = 0; | 3578 | |
3579 | /* | ||
3580 | * Writing any value to intr-mbox-0 clears PCI INTA# and | ||
3581 | * chip-internal interrupt pending events. | ||
3582 | * Writing non-zero to intr-mbox-0 additional tells the | ||
3583 | * NIC to stop sending us irqs, engaging "in-intr-handler" | ||
3584 | * event coalescing. | ||
3585 | */ | ||
3586 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); | ||
3587 | if (tg3_irq_sync(tp)) | ||
3588 | goto out; | ||
3589 | sblk->status &= ~SD_STATUS_UPDATED; | ||
3590 | if (likely(tg3_has_work(tp))) { | ||
3591 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | ||
3592 | netif_rx_schedule(dev); /* schedule NAPI poll */ | ||
3593 | } else { | ||
3594 | /* No work, shared interrupt perhaps? re-enable | ||
3595 | * interrupts, and flush that PCI write | ||
3596 | */ | ||
3597 | tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | ||
3598 | 0x00000000); | ||
3597 | } | 3599 | } |
3598 | out: | 3600 | out: |
3599 | return IRQ_RETVAL(handled); | 3601 | return IRQ_RETVAL(handled); |
@@ -3611,31 +3613,33 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id) | |||
3611 | * Reading the PCI State register will confirm whether the | 3613 | * Reading the PCI State register will confirm whether the |
3612 | * interrupt is ours and will flush the status block. | 3614 | * interrupt is ours and will flush the status block. |
3613 | */ | 3615 | */ |
3614 | if ((sblk->status_tag != tp->last_tag) || | 3616 | if (unlikely(sblk->status_tag == tp->last_tag)) { |
3615 | !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { | 3617 | if ((tp->tg3_flags & TG3_FLAG_CHIP_RESETTING) || |
3616 | /* | 3618 | (tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { |
3617 | * writing any value to intr-mbox-0 clears PCI INTA# and | 3619 | handled = 0; |
3618 | * chip-internal interrupt pending events. | ||
3619 | * writing non-zero to intr-mbox-0 additional tells the | ||
3620 | * NIC to stop sending us irqs, engaging "in-intr-handler" | ||
3621 | * event coalescing. | ||
3622 | */ | ||
3623 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | ||
3624 | 0x00000001); | ||
3625 | if (tg3_irq_sync(tp)) | ||
3626 | goto out; | 3620 | goto out; |
3627 | if (netif_rx_schedule_prep(dev)) { | ||
3628 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | ||
3629 | /* Update last_tag to mark that this status has been | ||
3630 | * seen. Because interrupt may be shared, we may be | ||
3631 | * racing with tg3_poll(), so only update last_tag | ||
3632 | * if tg3_poll() is not scheduled. | ||
3633 | */ | ||
3634 | tp->last_tag = sblk->status_tag; | ||
3635 | __netif_rx_schedule(dev); | ||
3636 | } | 3621 | } |
3637 | } else { /* shared interrupt */ | 3622 | } |
3638 | handled = 0; | 3623 | |
3624 | /* | ||
3625 | * writing any value to intr-mbox-0 clears PCI INTA# and | ||
3626 | * chip-internal interrupt pending events. | ||
3627 | * writing non-zero to intr-mbox-0 additional tells the | ||
3628 | * NIC to stop sending us irqs, engaging "in-intr-handler" | ||
3629 | * event coalescing. | ||
3630 | */ | ||
3631 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); | ||
3632 | if (tg3_irq_sync(tp)) | ||
3633 | goto out; | ||
3634 | if (netif_rx_schedule_prep(dev)) { | ||
3635 | prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]); | ||
3636 | /* Update last_tag to mark that this status has been | ||
3637 | * seen. Because interrupt may be shared, we may be | ||
3638 | * racing with tg3_poll(), so only update last_tag | ||
3639 | * if tg3_poll() is not scheduled. | ||
3640 | */ | ||
3641 | tp->last_tag = sblk->status_tag; | ||
3642 | __netif_rx_schedule(dev); | ||
3639 | } | 3643 | } |
3640 | out: | 3644 | out: |
3641 | return IRQ_RETVAL(handled); | 3645 | return IRQ_RETVAL(handled); |
@@ -4823,6 +4827,21 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4823 | if (write_op == tg3_write_flush_reg32) | 4827 | if (write_op == tg3_write_flush_reg32) |
4824 | tp->write32 = tg3_write32; | 4828 | tp->write32 = tg3_write32; |
4825 | 4829 | ||
4830 | /* Prevent the irq handler from reading or writing PCI registers | ||
4831 | * during chip reset when the memory enable bit in the PCI command | ||
4832 | * register may be cleared. The chip does not generate interrupt | ||
4833 | * at this time, but the irq handler may still be called due to irq | ||
4834 | * sharing or irqpoll. | ||
4835 | */ | ||
4836 | tp->tg3_flags |= TG3_FLAG_CHIP_RESETTING; | ||
4837 | if (tp->hw_status) { | ||
4838 | tp->hw_status->status = 0; | ||
4839 | tp->hw_status->status_tag = 0; | ||
4840 | } | ||
4841 | tp->last_tag = 0; | ||
4842 | smp_mb(); | ||
4843 | synchronize_irq(tp->pdev->irq); | ||
4844 | |||
4826 | /* do the reset */ | 4845 | /* do the reset */ |
4827 | val = GRC_MISC_CFG_CORECLK_RESET; | 4846 | val = GRC_MISC_CFG_CORECLK_RESET; |
4828 | 4847 | ||
@@ -4904,6 +4923,8 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4904 | 4923 | ||
4905 | pci_restore_state(tp->pdev); | 4924 | pci_restore_state(tp->pdev); |
4906 | 4925 | ||
4926 | tp->tg3_flags &= ~TG3_FLAG_CHIP_RESETTING; | ||
4927 | |||
4907 | /* Make sure PCI-X relaxed ordering bit is clear. */ | 4928 | /* Make sure PCI-X relaxed ordering bit is clear. */ |
4908 | pci_read_config_dword(tp->pdev, TG3PCI_X_CAPS, &val); | 4929 | pci_read_config_dword(tp->pdev, TG3PCI_X_CAPS, &val); |
4909 | val &= ~PCIX_CAPS_RELAXED_ORDERING; | 4930 | val &= ~PCIX_CAPS_RELAXED_ORDERING; |
@@ -6321,8 +6342,6 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6321 | RDMAC_MODE_ADDROFLOW_ENAB | RDMAC_MODE_FIFOOFLOW_ENAB | | 6342 | RDMAC_MODE_ADDROFLOW_ENAB | RDMAC_MODE_FIFOOFLOW_ENAB | |
6322 | RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | | 6343 | RDMAC_MODE_FIFOURUN_ENAB | RDMAC_MODE_FIFOOREAD_ENAB | |
6323 | RDMAC_MODE_LNGREAD_ENAB); | 6344 | RDMAC_MODE_LNGREAD_ENAB); |
6324 | if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) | ||
6325 | rdmac_mode |= RDMAC_MODE_SPLIT_ENABLE; | ||
6326 | 6345 | ||
6327 | /* If statement applies to 5705 and 5750 PCI devices only */ | 6346 | /* If statement applies to 5705 and 5750 PCI devices only */ |
6328 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && | 6347 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && |
@@ -6495,9 +6514,6 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
6495 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { | 6514 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { |
6496 | val &= ~(PCIX_CAPS_SPLIT_MASK | PCIX_CAPS_BURST_MASK); | 6515 | val &= ~(PCIX_CAPS_SPLIT_MASK | PCIX_CAPS_BURST_MASK); |
6497 | val |= (PCIX_CAPS_MAX_BURST_CPIOB << PCIX_CAPS_BURST_SHIFT); | 6516 | val |= (PCIX_CAPS_MAX_BURST_CPIOB << PCIX_CAPS_BURST_SHIFT); |
6498 | if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) | ||
6499 | val |= (tp->split_mode_max_reqs << | ||
6500 | PCIX_CAPS_SPLIT_SHIFT); | ||
6501 | } | 6517 | } |
6502 | tw32(TG3PCI_X_CAPS, val); | 6518 | tw32(TG3PCI_X_CAPS, val); |
6503 | } | 6519 | } |
@@ -10863,14 +10879,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
10863 | grc_misc_cfg = tr32(GRC_MISC_CFG); | 10879 | grc_misc_cfg = tr32(GRC_MISC_CFG); |
10864 | grc_misc_cfg &= GRC_MISC_CFG_BOARD_ID_MASK; | 10880 | grc_misc_cfg &= GRC_MISC_CFG_BOARD_ID_MASK; |
10865 | 10881 | ||
10866 | /* Broadcom's driver says that CIOBE multisplit has a bug */ | ||
10867 | #if 0 | ||
10868 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 && | ||
10869 | grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5704CIOBE) { | ||
10870 | tp->tg3_flags |= TG3_FLAG_SPLIT_MODE; | ||
10871 | tp->split_mode_max_reqs = SPLIT_MODE_5704_MAX_REQ; | ||
10872 | } | ||
10873 | #endif | ||
10874 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && | 10882 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && |
10875 | (grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788 || | 10883 | (grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788 || |
10876 | grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788M)) | 10884 | grc_misc_cfg == GRC_MISC_CFG_BOARD_ID_5788M)) |
@@ -11968,14 +11976,12 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
11968 | i == 5 ? '\n' : ':'); | 11976 | i == 5 ? '\n' : ':'); |
11969 | 11977 | ||
11970 | printk(KERN_INFO "%s: RXcsums[%d] LinkChgREG[%d] " | 11978 | printk(KERN_INFO "%s: RXcsums[%d] LinkChgREG[%d] " |
11971 | "MIirq[%d] ASF[%d] Split[%d] WireSpeed[%d] " | 11979 | "MIirq[%d] ASF[%d] WireSpeed[%d] TSOcap[%d]\n", |
11972 | "TSOcap[%d] \n", | ||
11973 | dev->name, | 11980 | dev->name, |
11974 | (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0, | 11981 | (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0, |
11975 | (tp->tg3_flags & TG3_FLAG_USE_LINKCHG_REG) != 0, | 11982 | (tp->tg3_flags & TG3_FLAG_USE_LINKCHG_REG) != 0, |
11976 | (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT) != 0, | 11983 | (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT) != 0, |
11977 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0, | 11984 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0, |
11978 | (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) != 0, | ||
11979 | (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0, | 11985 | (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0, |
11980 | (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0); | 11986 | (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0); |
11981 | printk(KERN_INFO "%s: dma_rwctrl[%08x] dma_mask[%d-bit]\n", | 11987 | printk(KERN_INFO "%s: dma_rwctrl[%08x] dma_mask[%d-bit]\n", |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 086892d8c1f1..d515ed23841b 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -2223,7 +2223,7 @@ struct tg3 { | |||
2223 | #define TG3_FLAG_40BIT_DMA_BUG 0x08000000 | 2223 | #define TG3_FLAG_40BIT_DMA_BUG 0x08000000 |
2224 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 | 2224 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 |
2225 | #define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000 | 2225 | #define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000 |
2226 | #define TG3_FLAG_SPLIT_MODE 0x40000000 | 2226 | #define TG3_FLAG_CHIP_RESETTING 0x40000000 |
2227 | #define TG3_FLAG_INIT_COMPLETE 0x80000000 | 2227 | #define TG3_FLAG_INIT_COMPLETE 0x80000000 |
2228 | u32 tg3_flags2; | 2228 | u32 tg3_flags2; |
2229 | #define TG3_FLG2_RESTART_TIMER 0x00000001 | 2229 | #define TG3_FLG2_RESTART_TIMER 0x00000001 |
@@ -2262,9 +2262,6 @@ struct tg3 { | |||
2262 | #define TG3_FLG2_NO_FWARE_REPORTED 0x40000000 | 2262 | #define TG3_FLG2_NO_FWARE_REPORTED 0x40000000 |
2263 | #define TG3_FLG2_PHY_ADJUST_TRIM 0x80000000 | 2263 | #define TG3_FLG2_PHY_ADJUST_TRIM 0x80000000 |
2264 | 2264 | ||
2265 | u32 split_mode_max_reqs; | ||
2266 | #define SPLIT_MODE_5704_MAX_REQ 3 | ||
2267 | |||
2268 | struct timer_list timer; | 2265 | struct timer_list timer; |
2269 | u16 timer_counter; | 2266 | u16 timer_counter; |
2270 | u16 timer_multiplier; | 2267 | u16 timer_multiplier; |
diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c index 36202e94ee91..01d55315ee8c 100644 --- a/drivers/net/tokenring/ibmtr.c +++ b/drivers/net/tokenring/ibmtr.c | |||
@@ -346,7 +346,7 @@ static void ibmtr_cleanup_card(struct net_device *dev) | |||
346 | * which references it. | 346 | * which references it. |
347 | ****************************************************************************/ | 347 | ****************************************************************************/ |
348 | 348 | ||
349 | static int __init ibmtr_probe(struct net_device *dev) | 349 | static int __devinit ibmtr_probe(struct net_device *dev) |
350 | { | 350 | { |
351 | int i; | 351 | int i; |
352 | int base_addr = dev->base_addr; | 352 | int base_addr = dev->base_addr; |
@@ -366,7 +366,7 @@ static int __init ibmtr_probe(struct net_device *dev) | |||
366 | return -ENODEV; | 366 | return -ENODEV; |
367 | } | 367 | } |
368 | 368 | ||
369 | int __init ibmtr_probe_card(struct net_device *dev) | 369 | int __devinit ibmtr_probe_card(struct net_device *dev) |
370 | { | 370 | { |
371 | int err = ibmtr_probe(dev); | 371 | int err = ibmtr_probe(dev); |
372 | if (!err) { | 372 | if (!err) { |
diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c index 24a29c99ba94..9aeac76184f3 100644 --- a/drivers/net/tulip/dmfe.c +++ b/drivers/net/tulip/dmfe.c | |||
@@ -190,13 +190,13 @@ | |||
190 | 190 | ||
191 | /* Structure/enum declaration ------------------------------- */ | 191 | /* Structure/enum declaration ------------------------------- */ |
192 | struct tx_desc { | 192 | struct tx_desc { |
193 | u32 tdes0, tdes1, tdes2, tdes3; /* Data for the card */ | 193 | __le32 tdes0, tdes1, tdes2, tdes3; /* Data for the card */ |
194 | char *tx_buf_ptr; /* Data for us */ | 194 | char *tx_buf_ptr; /* Data for us */ |
195 | struct tx_desc *next_tx_desc; | 195 | struct tx_desc *next_tx_desc; |
196 | } __attribute__(( aligned(32) )); | 196 | } __attribute__(( aligned(32) )); |
197 | 197 | ||
198 | struct rx_desc { | 198 | struct rx_desc { |
199 | u32 rdes0, rdes1, rdes2, rdes3; /* Data for the card */ | 199 | __le32 rdes0, rdes1, rdes2, rdes3; /* Data for the card */ |
200 | struct sk_buff *rx_skb_ptr; /* Data for us */ | 200 | struct sk_buff *rx_skb_ptr; /* Data for us */ |
201 | struct rx_desc *next_rx_desc; | 201 | struct rx_desc *next_rx_desc; |
202 | } __attribute__(( aligned(32) )); | 202 | } __attribute__(( aligned(32) )); |
@@ -458,7 +458,7 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev, | |||
458 | 458 | ||
459 | /* read 64 word srom data */ | 459 | /* read 64 word srom data */ |
460 | for (i = 0; i < 64; i++) | 460 | for (i = 0; i < 64; i++) |
461 | ((u16 *) db->srom)[i] = | 461 | ((__le16 *) db->srom)[i] = |
462 | cpu_to_le16(read_srom_word(db->ioaddr, i)); | 462 | cpu_to_le16(read_srom_word(db->ioaddr, i)); |
463 | 463 | ||
464 | /* Set Node address */ | 464 | /* Set Node address */ |
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index dab88b958d6e..639e1e6913bf 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c | |||
@@ -3607,7 +3607,6 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3607 | if (bd == ugeth->confBd[txQ]) { | 3607 | if (bd == ugeth->confBd[txQ]) { |
3608 | if (!netif_queue_stopped(dev)) | 3608 | if (!netif_queue_stopped(dev)) |
3609 | netif_stop_queue(dev); | 3609 | netif_stop_queue(dev); |
3610 | return NETDEV_TX_BUSY; | ||
3611 | } | 3610 | } |
3612 | 3611 | ||
3613 | ugeth->txBd[txQ] = bd; | 3612 | ugeth->txBd[txQ] = bd; |
@@ -3623,7 +3622,7 @@ static int ucc_geth_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3623 | 3622 | ||
3624 | spin_unlock_irq(&ugeth->lock); | 3623 | spin_unlock_irq(&ugeth->lock); |
3625 | 3624 | ||
3626 | return NETDEV_TX_OK; | 3625 | return 0; |
3627 | } | 3626 | } |
3628 | 3627 | ||
3629 | static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) | 3628 | static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit) |
diff --git a/drivers/net/wan/lmc/lmc_media.h b/drivers/net/wan/lmc/lmc_media.h deleted file mode 100644 index ddcc00403563..000000000000 --- a/drivers/net/wan/lmc/lmc_media.h +++ /dev/null | |||
@@ -1,65 +0,0 @@ | |||
1 | #ifndef _LMC_MEDIA_H_ | ||
2 | #define _LMC_MEDIA_H_ | ||
3 | |||
4 | lmc_media_t lmc_ds3_media = { | ||
5 | lmc_ds3_init, /* special media init stuff */ | ||
6 | lmc_ds3_default, /* reset to default state */ | ||
7 | lmc_ds3_set_status, /* reset status to state provided */ | ||
8 | lmc_dummy_set_1, /* set clock source */ | ||
9 | lmc_dummy_set2_1, /* set line speed */ | ||
10 | lmc_ds3_set_100ft, /* set cable length */ | ||
11 | lmc_ds3_set_scram, /* set scrambler */ | ||
12 | lmc_ds3_get_link_status, /* get link status */ | ||
13 | lmc_dummy_set_1, /* set link status */ | ||
14 | lmc_ds3_set_crc_length, /* set CRC length */ | ||
15 | lmc_dummy_set_1, /* set T1 or E1 circuit type */ | ||
16 | lmc_ds3_watchdog | ||
17 | }; | ||
18 | |||
19 | lmc_media_t lmc_hssi_media = { | ||
20 | lmc_hssi_init, /* special media init stuff */ | ||
21 | lmc_hssi_default, /* reset to default state */ | ||
22 | lmc_hssi_set_status, /* reset status to state provided */ | ||
23 | lmc_hssi_set_clock, /* set clock source */ | ||
24 | lmc_dummy_set2_1, /* set line speed */ | ||
25 | lmc_dummy_set_1, /* set cable length */ | ||
26 | lmc_dummy_set_1, /* set scrambler */ | ||
27 | lmc_hssi_get_link_status, /* get link status */ | ||
28 | lmc_hssi_set_link_status, /* set link status */ | ||
29 | lmc_hssi_set_crc_length, /* set CRC length */ | ||
30 | lmc_dummy_set_1, /* set T1 or E1 circuit type */ | ||
31 | lmc_hssi_watchdog | ||
32 | }; | ||
33 | |||
34 | lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */ | ||
35 | lmc_ssi_default, /* reset to default state */ | ||
36 | lmc_ssi_set_status, /* reset status to state provided */ | ||
37 | lmc_ssi_set_clock, /* set clock source */ | ||
38 | lmc_ssi_set_speed, /* set line speed */ | ||
39 | lmc_dummy_set_1, /* set cable length */ | ||
40 | lmc_dummy_set_1, /* set scrambler */ | ||
41 | lmc_ssi_get_link_status, /* get link status */ | ||
42 | lmc_ssi_set_link_status, /* set link status */ | ||
43 | lmc_ssi_set_crc_length, /* set CRC length */ | ||
44 | lmc_dummy_set_1, /* set T1 or E1 circuit type */ | ||
45 | lmc_ssi_watchdog | ||
46 | }; | ||
47 | |||
48 | lmc_media_t lmc_t1_media = { | ||
49 | lmc_t1_init, /* special media init stuff */ | ||
50 | lmc_t1_default, /* reset to default state */ | ||
51 | lmc_t1_set_status, /* reset status to state provided */ | ||
52 | lmc_t1_set_clock, /* set clock source */ | ||
53 | lmc_dummy_set2_1, /* set line speed */ | ||
54 | lmc_dummy_set_1, /* set cable length */ | ||
55 | lmc_dummy_set_1, /* set scrambler */ | ||
56 | lmc_t1_get_link_status, /* get link status */ | ||
57 | lmc_dummy_set_1, /* set link status */ | ||
58 | lmc_t1_set_crc_length, /* set CRC length */ | ||
59 | lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */ | ||
60 | lmc_t1_watchdog | ||
61 | }; | ||
62 | |||
63 | |||
64 | #endif | ||
65 | |||
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index a8c2bfe26c27..2ada76a93cb6 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -2852,7 +2852,7 @@ static struct net_device *_init_airo_card( unsigned short irq, int port, | |||
2852 | if (rc) { | 2852 | if (rc) { |
2853 | airo_print_err(dev->name, "register interrupt %d failed, rc %d", | 2853 | airo_print_err(dev->name, "register interrupt %d failed, rc %d", |
2854 | irq, rc); | 2854 | irq, rc); |
2855 | goto err_out_unlink; | 2855 | goto err_out_nets; |
2856 | } | 2856 | } |
2857 | if (!is_pcmcia) { | 2857 | if (!is_pcmcia) { |
2858 | if (!request_region( dev->base_addr, 64, dev->name )) { | 2858 | if (!request_region( dev->base_addr, 64, dev->name )) { |
@@ -2935,6 +2935,8 @@ err_out_res: | |||
2935 | release_region( dev->base_addr, 64 ); | 2935 | release_region( dev->base_addr, 64 ); |
2936 | err_out_irq: | 2936 | err_out_irq: |
2937 | free_irq(dev->irq, dev); | 2937 | free_irq(dev->irq, dev); |
2938 | err_out_nets: | ||
2939 | airo_networks_free(ai); | ||
2938 | err_out_unlink: | 2940 | err_out_unlink: |
2939 | del_airo_dev(dev); | 2941 | del_airo_dev(dev); |
2940 | err_out_thr: | 2942 | err_out_thr: |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c index 80cb88eb98c6..a38e7eec0e62 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_main.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c | |||
@@ -946,6 +946,7 @@ static int bcm43xx_geo_init(struct bcm43xx_private *bcm) | |||
946 | u8 channel; | 946 | u8 channel; |
947 | struct bcm43xx_phyinfo *phy; | 947 | struct bcm43xx_phyinfo *phy; |
948 | const char *iso_country; | 948 | const char *iso_country; |
949 | u8 max_bg_channel; | ||
949 | 950 | ||
950 | geo = kzalloc(sizeof(*geo), GFP_KERNEL); | 951 | geo = kzalloc(sizeof(*geo), GFP_KERNEL); |
951 | if (!geo) | 952 | if (!geo) |
@@ -967,6 +968,23 @@ static int bcm43xx_geo_init(struct bcm43xx_private *bcm) | |||
967 | } | 968 | } |
968 | iso_country = bcm43xx_locale_iso(bcm->sprom.locale); | 969 | iso_country = bcm43xx_locale_iso(bcm->sprom.locale); |
969 | 970 | ||
971 | /* set the maximum channel based on locale set in sprom or witle locale option */ | ||
972 | switch (bcm->sprom.locale) { | ||
973 | case BCM43xx_LOCALE_THAILAND: | ||
974 | case BCM43xx_LOCALE_ISRAEL: | ||
975 | case BCM43xx_LOCALE_JORDAN: | ||
976 | case BCM43xx_LOCALE_USA_CANADA_ANZ: | ||
977 | case BCM43xx_LOCALE_USA_LOW: | ||
978 | max_bg_channel = 11; | ||
979 | break; | ||
980 | case BCM43xx_LOCALE_JAPAN: | ||
981 | case BCM43xx_LOCALE_JAPAN_HIGH: | ||
982 | max_bg_channel = 14; | ||
983 | break; | ||
984 | default: | ||
985 | max_bg_channel = 13; | ||
986 | } | ||
987 | |||
970 | if (have_a) { | 988 | if (have_a) { |
971 | for (i = 0, channel = IEEE80211_52GHZ_MIN_CHANNEL; | 989 | for (i = 0, channel = IEEE80211_52GHZ_MIN_CHANNEL; |
972 | channel <= IEEE80211_52GHZ_MAX_CHANNEL; channel++) { | 990 | channel <= IEEE80211_52GHZ_MAX_CHANNEL; channel++) { |
@@ -978,7 +996,7 @@ static int bcm43xx_geo_init(struct bcm43xx_private *bcm) | |||
978 | } | 996 | } |
979 | if (have_bg) { | 997 | if (have_bg) { |
980 | for (i = 0, channel = IEEE80211_24GHZ_MIN_CHANNEL; | 998 | for (i = 0, channel = IEEE80211_24GHZ_MIN_CHANNEL; |
981 | channel <= IEEE80211_24GHZ_MAX_CHANNEL; channel++) { | 999 | channel <= max_bg_channel; channel++) { |
982 | chan = &geo->bg[i++]; | 1000 | chan = &geo->bg[i++]; |
983 | chan->freq = bcm43xx_channel_to_freq_bg(channel); | 1001 | chan->freq = bcm43xx_channel_to_freq_bg(channel); |
984 | chan->channel = channel; | 1002 | chan->channel = channel; |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c index cae89258a640..72529a440f15 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_phy.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_phy.c | |||
@@ -757,7 +757,7 @@ static void bcm43xx_phy_initb5(struct bcm43xx_private *bcm) | |||
757 | if (radio->version == 0x2050) | 757 | if (radio->version == 0x2050) |
758 | bcm43xx_phy_write(bcm, 0x0038, 0x0667); | 758 | bcm43xx_phy_write(bcm, 0x0038, 0x0667); |
759 | 759 | ||
760 | if (phy->type == BCM43xx_PHYTYPE_G) { | 760 | if (phy->connected) { |
761 | if (radio->version == 0x2050) { | 761 | if (radio->version == 0x2050) { |
762 | bcm43xx_radio_write16(bcm, 0x007A, | 762 | bcm43xx_radio_write16(bcm, 0x007A, |
763 | bcm43xx_radio_read16(bcm, 0x007A) | 763 | bcm43xx_radio_read16(bcm, 0x007A) |
@@ -978,7 +978,7 @@ static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm) | |||
978 | { | 978 | { |
979 | struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm); | 979 | struct bcm43xx_phyinfo *phy = bcm43xx_current_phy(bcm); |
980 | struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm); | 980 | struct bcm43xx_radioinfo *radio = bcm43xx_current_radio(bcm); |
981 | u16 backup_phy[15]; | 981 | u16 backup_phy[15] = {0}; |
982 | u16 backup_radio[3]; | 982 | u16 backup_radio[3]; |
983 | u16 backup_bband; | 983 | u16 backup_bband; |
984 | u16 i; | 984 | u16 i; |
@@ -989,8 +989,10 @@ static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm) | |||
989 | backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001); | 989 | backup_phy[1] = bcm43xx_phy_read(bcm, 0x0001); |
990 | backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811); | 990 | backup_phy[2] = bcm43xx_phy_read(bcm, 0x0811); |
991 | backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812); | 991 | backup_phy[3] = bcm43xx_phy_read(bcm, 0x0812); |
992 | backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814); | 992 | if (phy->rev != 1) { |
993 | backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815); | 993 | backup_phy[4] = bcm43xx_phy_read(bcm, 0x0814); |
994 | backup_phy[5] = bcm43xx_phy_read(bcm, 0x0815); | ||
995 | } | ||
994 | backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A); | 996 | backup_phy[6] = bcm43xx_phy_read(bcm, 0x005A); |
995 | backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059); | 997 | backup_phy[7] = bcm43xx_phy_read(bcm, 0x0059); |
996 | backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058); | 998 | backup_phy[8] = bcm43xx_phy_read(bcm, 0x0058); |
@@ -1018,14 +1020,16 @@ static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm) | |||
1018 | bcm43xx_phy_read(bcm, 0x0811) | 0x0001); | 1020 | bcm43xx_phy_read(bcm, 0x0811) | 0x0001); |
1019 | bcm43xx_phy_write(bcm, 0x0812, | 1021 | bcm43xx_phy_write(bcm, 0x0812, |
1020 | bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE); | 1022 | bcm43xx_phy_read(bcm, 0x0812) & 0xFFFE); |
1021 | bcm43xx_phy_write(bcm, 0x0814, | 1023 | if (phy->rev != 1) { |
1022 | bcm43xx_phy_read(bcm, 0x0814) | 0x0001); | 1024 | bcm43xx_phy_write(bcm, 0x0814, |
1023 | bcm43xx_phy_write(bcm, 0x0815, | 1025 | bcm43xx_phy_read(bcm, 0x0814) | 0x0001); |
1024 | bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE); | 1026 | bcm43xx_phy_write(bcm, 0x0815, |
1025 | bcm43xx_phy_write(bcm, 0x0814, | 1027 | bcm43xx_phy_read(bcm, 0x0815) & 0xFFFE); |
1026 | bcm43xx_phy_read(bcm, 0x0814) | 0x0002); | 1028 | bcm43xx_phy_write(bcm, 0x0814, |
1027 | bcm43xx_phy_write(bcm, 0x0815, | 1029 | bcm43xx_phy_read(bcm, 0x0814) | 0x0002); |
1028 | bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD); | 1030 | bcm43xx_phy_write(bcm, 0x0815, |
1031 | bcm43xx_phy_read(bcm, 0x0815) & 0xFFFD); | ||
1032 | } | ||
1029 | bcm43xx_phy_write(bcm, 0x0811, | 1033 | bcm43xx_phy_write(bcm, 0x0811, |
1030 | bcm43xx_phy_read(bcm, 0x0811) | 0x000C); | 1034 | bcm43xx_phy_read(bcm, 0x0811) | 0x000C); |
1031 | bcm43xx_phy_write(bcm, 0x0812, | 1035 | bcm43xx_phy_write(bcm, 0x0812, |
@@ -1048,10 +1052,12 @@ static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm) | |||
1048 | bcm43xx_phy_read(bcm, 0x000A) | 1052 | bcm43xx_phy_read(bcm, 0x000A) |
1049 | | 0x2000); | 1053 | | 0x2000); |
1050 | } | 1054 | } |
1051 | bcm43xx_phy_write(bcm, 0x0814, | 1055 | if (phy->rev != 1) { |
1052 | bcm43xx_phy_read(bcm, 0x0814) | 0x0004); | 1056 | bcm43xx_phy_write(bcm, 0x0814, |
1053 | bcm43xx_phy_write(bcm, 0x0815, | 1057 | bcm43xx_phy_read(bcm, 0x0814) | 0x0004); |
1054 | bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB); | 1058 | bcm43xx_phy_write(bcm, 0x0815, |
1059 | bcm43xx_phy_read(bcm, 0x0815) & 0xFFFB); | ||
1060 | } | ||
1055 | bcm43xx_phy_write(bcm, 0x0003, | 1061 | bcm43xx_phy_write(bcm, 0x0003, |
1056 | (bcm43xx_phy_read(bcm, 0x0003) | 1062 | (bcm43xx_phy_read(bcm, 0x0003) |
1057 | & 0xFF9F) | 0x0040); | 1063 | & 0xFF9F) | 0x0040); |
@@ -1138,8 +1144,10 @@ static void bcm43xx_calc_loopback_gain(struct bcm43xx_private *bcm) | |||
1138 | } | 1144 | } |
1139 | } | 1145 | } |
1140 | 1146 | ||
1141 | bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]); | 1147 | if (phy->rev != 1) { |
1142 | bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]); | 1148 | bcm43xx_phy_write(bcm, 0x0814, backup_phy[4]); |
1149 | bcm43xx_phy_write(bcm, 0x0815, backup_phy[5]); | ||
1150 | } | ||
1143 | bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]); | 1151 | bcm43xx_phy_write(bcm, 0x005A, backup_phy[6]); |
1144 | bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]); | 1152 | bcm43xx_phy_write(bcm, 0x0059, backup_phy[7]); |
1145 | bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]); | 1153 | bcm43xx_phy_write(bcm, 0x0058, backup_phy[8]); |
@@ -1188,24 +1196,23 @@ static void bcm43xx_phy_initg(struct bcm43xx_private *bcm) | |||
1188 | bcm43xx_phy_write(bcm, 0x0811, 0x0000); | 1196 | bcm43xx_phy_write(bcm, 0x0811, 0x0000); |
1189 | bcm43xx_phy_write(bcm, 0x0015, 0x00C0); | 1197 | bcm43xx_phy_write(bcm, 0x0015, 0x00C0); |
1190 | } | 1198 | } |
1191 | if (phy->rev >= 3) { | 1199 | if (phy->rev > 5) { |
1192 | bcm43xx_phy_write(bcm, 0x0811, 0x0400); | 1200 | bcm43xx_phy_write(bcm, 0x0811, 0x0400); |
1193 | bcm43xx_phy_write(bcm, 0x0015, 0x00C0); | 1201 | bcm43xx_phy_write(bcm, 0x0015, 0x00C0); |
1194 | } | 1202 | } |
1195 | if (phy->connected) { | 1203 | if (phy->rev >= 2 && phy->connected) { |
1196 | tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF; | 1204 | tmp = bcm43xx_phy_read(bcm, 0x0400) & 0xFF; |
1197 | if (tmp < 6) { | 1205 | if (tmp ==3 || tmp == 5) { |
1198 | bcm43xx_phy_write(bcm, 0x04C2, 0x1816); | 1206 | bcm43xx_phy_write(bcm, 0x04C2, 0x1816); |
1199 | bcm43xx_phy_write(bcm, 0x04C3, 0x8006); | 1207 | bcm43xx_phy_write(bcm, 0x04C3, 0x8006); |
1200 | if (tmp != 3) { | 1208 | if (tmp == 5) { |
1201 | bcm43xx_phy_write(bcm, 0x04CC, | 1209 | bcm43xx_phy_write(bcm, 0x04CC, |
1202 | (bcm43xx_phy_read(bcm, 0x04CC) | 1210 | (bcm43xx_phy_read(bcm, 0x04CC) |
1203 | & 0x00FF) | 0x1F00); | 1211 | & 0x00FF) | 0x1F00); |
1204 | } | 1212 | } |
1205 | } | 1213 | } |
1206 | } | ||
1207 | if (phy->rev < 3 && phy->connected) | ||
1208 | bcm43xx_phy_write(bcm, 0x047E, 0x0078); | 1214 | bcm43xx_phy_write(bcm, 0x047E, 0x0078); |
1215 | } | ||
1209 | if (radio->revision == 8) { | 1216 | if (radio->revision == 8) { |
1210 | bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080); | 1217 | bcm43xx_phy_write(bcm, 0x0801, bcm43xx_phy_read(bcm, 0x0801) | 0x0080); |
1211 | bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004); | 1218 | bcm43xx_phy_write(bcm, 0x043E, bcm43xx_phy_read(bcm, 0x043E) | 0x0004); |
@@ -1232,7 +1239,7 @@ static void bcm43xx_phy_initg(struct bcm43xx_private *bcm) | |||
1232 | if (phy->rev >= 6) { | 1239 | if (phy->rev >= 6) { |
1233 | bcm43xx_phy_write(bcm, 0x0036, | 1240 | bcm43xx_phy_write(bcm, 0x0036, |
1234 | (bcm43xx_phy_read(bcm, 0x0036) | 1241 | (bcm43xx_phy_read(bcm, 0x0036) |
1235 | & 0xF000) | (radio->txctl2 << 12)); | 1242 | & 0x0FFF) | (radio->txctl2 << 12)); |
1236 | } | 1243 | } |
1237 | if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) | 1244 | if (bcm->sprom.boardflags & BCM43xx_BFL_PACTRL) |
1238 | bcm43xx_phy_write(bcm, 0x002E, 0x8075); | 1245 | bcm43xx_phy_write(bcm, 0x002E, 0x8075); |
@@ -1243,7 +1250,7 @@ static void bcm43xx_phy_initg(struct bcm43xx_private *bcm) | |||
1243 | else | 1250 | else |
1244 | bcm43xx_phy_write(bcm, 0x002F, 0x0202); | 1251 | bcm43xx_phy_write(bcm, 0x002F, 0x0202); |
1245 | } | 1252 | } |
1246 | if (phy->connected) { | 1253 | if (phy->connected || phy->rev >= 2) { |
1247 | bcm43xx_phy_lo_adjust(bcm, 0); | 1254 | bcm43xx_phy_lo_adjust(bcm, 0); |
1248 | bcm43xx_phy_write(bcm, 0x080F, 0x8078); | 1255 | bcm43xx_phy_write(bcm, 0x080F, 0x8078); |
1249 | } | 1256 | } |
@@ -1257,7 +1264,7 @@ static void bcm43xx_phy_initg(struct bcm43xx_private *bcm) | |||
1257 | */ | 1264 | */ |
1258 | bcm43xx_nrssi_hw_update(bcm, 0xFFFF); | 1265 | bcm43xx_nrssi_hw_update(bcm, 0xFFFF); |
1259 | bcm43xx_calc_nrssi_threshold(bcm); | 1266 | bcm43xx_calc_nrssi_threshold(bcm); |
1260 | } else if (phy->connected) { | 1267 | } else if (phy->connected || phy->rev >= 2) { |
1261 | if (radio->nrssi[0] == -1000) { | 1268 | if (radio->nrssi[0] == -1000) { |
1262 | assert(radio->nrssi[1] == -1000); | 1269 | assert(radio->nrssi[1] == -1000); |
1263 | bcm43xx_calc_nrssi_slope(bcm); | 1270 | bcm43xx_calc_nrssi_slope(bcm); |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_radio.c b/drivers/net/wireless/bcm43xx/bcm43xx_radio.c index 32beb91b7164..4025dd0089d2 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_radio.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_radio.c | |||
@@ -458,7 +458,7 @@ static void bcm43xx_calc_nrssi_offset(struct bcm43xx_private *bcm) | |||
458 | bcm43xx_phy_write(bcm, 0x005A, 0x0480); | 458 | bcm43xx_phy_write(bcm, 0x005A, 0x0480); |
459 | bcm43xx_phy_write(bcm, 0x0059, 0x0810); | 459 | bcm43xx_phy_write(bcm, 0x0059, 0x0810); |
460 | bcm43xx_phy_write(bcm, 0x0058, 0x000D); | 460 | bcm43xx_phy_write(bcm, 0x0058, 0x000D); |
461 | if (phy->rev == 0) { | 461 | if (phy->analog == 0) { |
462 | bcm43xx_phy_write(bcm, 0x0003, 0x0122); | 462 | bcm43xx_phy_write(bcm, 0x0003, 0x0122); |
463 | } else { | 463 | } else { |
464 | bcm43xx_phy_write(bcm, 0x000A, | 464 | bcm43xx_phy_write(bcm, 0x000A, |
@@ -570,9 +570,9 @@ void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm) | |||
570 | nrssi0 = (s16)bcm43xx_phy_read(bcm, 0x0027); | 570 | nrssi0 = (s16)bcm43xx_phy_read(bcm, 0x0027); |
571 | bcm43xx_radio_write16(bcm, 0x007A, | 571 | bcm43xx_radio_write16(bcm, 0x007A, |
572 | bcm43xx_radio_read16(bcm, 0x007A) & 0x007F); | 572 | bcm43xx_radio_read16(bcm, 0x007A) & 0x007F); |
573 | if (phy->rev >= 2) { | 573 | if (phy->analog >= 2) { |
574 | bcm43xx_write16(bcm, 0x03E6, 0x0040); | 574 | bcm43xx_write16(bcm, 0x03E6, 0x0040); |
575 | } else if (phy->rev == 0) { | 575 | } else if (phy->analog == 0) { |
576 | bcm43xx_write16(bcm, 0x03E6, 0x0122); | 576 | bcm43xx_write16(bcm, 0x03E6, 0x0122); |
577 | } else { | 577 | } else { |
578 | bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, | 578 | bcm43xx_write16(bcm, BCM43xx_MMIO_CHANNEL_EXT, |
@@ -596,7 +596,7 @@ void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm) | |||
596 | bcm43xx_phy_write(bcm, 0x0015, backup[5]); | 596 | bcm43xx_phy_write(bcm, 0x0015, backup[5]); |
597 | bcm43xx_phy_write(bcm, 0x002A, backup[6]); | 597 | bcm43xx_phy_write(bcm, 0x002A, backup[6]); |
598 | bcm43xx_synth_pu_workaround(bcm, radio->channel); | 598 | bcm43xx_synth_pu_workaround(bcm, radio->channel); |
599 | if (phy->rev != 0) | 599 | if (phy->analog != 0) |
600 | bcm43xx_write16(bcm, 0x03F4, backup[13]); | 600 | bcm43xx_write16(bcm, 0x03F4, backup[13]); |
601 | 601 | ||
602 | bcm43xx_phy_write(bcm, 0x0020, backup[7]); | 602 | bcm43xx_phy_write(bcm, 0x0020, backup[7]); |
@@ -692,7 +692,7 @@ void bcm43xx_calc_nrssi_slope(struct bcm43xx_private *bcm) | |||
692 | 692 | ||
693 | bcm43xx_radio_write16(bcm, 0x007A, | 693 | bcm43xx_radio_write16(bcm, 0x007A, |
694 | bcm43xx_radio_read16(bcm, 0x007A) & 0x007F); | 694 | bcm43xx_radio_read16(bcm, 0x007A) & 0x007F); |
695 | if (phy->rev >= 2) { | 695 | if (phy->analog >= 2) { |
696 | bcm43xx_phy_write(bcm, 0x0003, | 696 | bcm43xx_phy_write(bcm, 0x0003, |
697 | (bcm43xx_phy_read(bcm, 0x0003) | 697 | (bcm43xx_phy_read(bcm, 0x0003) |
698 | & 0xFF9F) | 0x0040); | 698 | & 0xFF9F) | 0x0040); |
@@ -882,10 +882,10 @@ static void _stack_save(u32 *_stackptr, size_t *stackidx, | |||
882 | { | 882 | { |
883 | u32 *stackptr = &(_stackptr[*stackidx]); | 883 | u32 *stackptr = &(_stackptr[*stackidx]); |
884 | 884 | ||
885 | assert((offset & 0xF000) == 0x0000); | 885 | assert((offset & 0xE000) == 0x0000); |
886 | assert((id & 0xF0) == 0x00); | 886 | assert((id & 0xF8) == 0x00); |
887 | *stackptr = offset; | 887 | *stackptr = offset; |
888 | *stackptr |= ((u32)id) << 12; | 888 | *stackptr |= ((u32)id) << 13; |
889 | *stackptr |= ((u32)value) << 16; | 889 | *stackptr |= ((u32)value) << 16; |
890 | (*stackidx)++; | 890 | (*stackidx)++; |
891 | assert(*stackidx < BCM43xx_INTERFSTACK_SIZE); | 891 | assert(*stackidx < BCM43xx_INTERFSTACK_SIZE); |
@@ -896,12 +896,12 @@ static u16 _stack_restore(u32 *stackptr, | |||
896 | { | 896 | { |
897 | size_t i; | 897 | size_t i; |
898 | 898 | ||
899 | assert((offset & 0xF000) == 0x0000); | 899 | assert((offset & 0xE000) == 0x0000); |
900 | assert((id & 0xF0) == 0x00); | 900 | assert((id & 0xF8) == 0x00); |
901 | for (i = 0; i < BCM43xx_INTERFSTACK_SIZE; i++, stackptr++) { | 901 | for (i = 0; i < BCM43xx_INTERFSTACK_SIZE; i++, stackptr++) { |
902 | if ((*stackptr & 0x00000FFF) != offset) | 902 | if ((*stackptr & 0x00001FFF) != offset) |
903 | continue; | 903 | continue; |
904 | if (((*stackptr & 0x0000F000) >> 12) != id) | 904 | if (((*stackptr & 0x00007000) >> 13) != id) |
905 | continue; | 905 | continue; |
906 | return ((*stackptr & 0xFFFF0000) >> 16); | 906 | return ((*stackptr & 0xFFFF0000) >> 16); |
907 | } | 907 | } |
@@ -1579,7 +1579,7 @@ void bcm43xx_radio_set_tx_iq(struct bcm43xx_private *bcm) | |||
1579 | 1579 | ||
1580 | for (i = 0; i < 5; i++) { | 1580 | for (i = 0; i < 5; i++) { |
1581 | for (j = 0; j < 5; j++) { | 1581 | for (j = 0; j < 5; j++) { |
1582 | if (tmp == (data_high[i] << 4 | data_low[j])) { | 1582 | if (tmp == (data_high[i] | data_low[j])) { |
1583 | bcm43xx_phy_write(bcm, 0x0069, (i - j) << 8 | 0x00C0); | 1583 | bcm43xx_phy_write(bcm, 0x0069, (i - j) << 8 | 0x00C0); |
1584 | return; | 1584 | return; |
1585 | } | 1585 | } |
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c index 9c64f894b71b..87ee3ee020fe 100644 --- a/drivers/net/wireless/zd1211rw/zd_chip.c +++ b/drivers/net/wireless/zd1211rw/zd_chip.c | |||
@@ -337,6 +337,7 @@ static int read_pod(struct zd_chip *chip, u8 *rf_type) | |||
337 | chip->patch_cr157 = (value >> 13) & 0x1; | 337 | chip->patch_cr157 = (value >> 13) & 0x1; |
338 | chip->patch_6m_band_edge = (value >> 21) & 0x1; | 338 | chip->patch_6m_band_edge = (value >> 21) & 0x1; |
339 | chip->new_phy_layout = (value >> 31) & 0x1; | 339 | chip->new_phy_layout = (value >> 31) & 0x1; |
340 | chip->al2230s_bit = (value >> 7) & 0x1; | ||
340 | chip->link_led = ((value >> 4) & 1) ? LED1 : LED2; | 341 | chip->link_led = ((value >> 4) & 1) ? LED1 : LED2; |
341 | chip->supports_tx_led = 1; | 342 | chip->supports_tx_led = 1; |
342 | if (value & (1 << 24)) { /* LED scenario */ | 343 | if (value & (1 << 24)) { /* LED scenario */ |
@@ -591,16 +592,16 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip) | |||
591 | return r; | 592 | return r; |
592 | } | 593 | } |
593 | 594 | ||
594 | /* CR157 can be optionally patched by the EEPROM */ | 595 | /* CR157 can be optionally patched by the EEPROM for original ZD1211 */ |
595 | static int patch_cr157(struct zd_chip *chip) | 596 | static int patch_cr157(struct zd_chip *chip) |
596 | { | 597 | { |
597 | int r; | 598 | int r; |
598 | u32 value; | 599 | u16 value; |
599 | 600 | ||
600 | if (!chip->patch_cr157) | 601 | if (!chip->patch_cr157) |
601 | return 0; | 602 | return 0; |
602 | 603 | ||
603 | r = zd_ioread32_locked(chip, &value, E2P_PHY_REG); | 604 | r = zd_ioread16_locked(chip, &value, E2P_PHY_REG); |
604 | if (r) | 605 | if (r) |
605 | return r; | 606 | return r; |
606 | 607 | ||
@@ -790,11 +791,6 @@ static int zd1211b_hw_reset_phy(struct zd_chip *chip) | |||
790 | goto out; | 791 | goto out; |
791 | 792 | ||
792 | r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); | 793 | r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); |
793 | if (r) | ||
794 | goto unlock; | ||
795 | |||
796 | r = patch_cr157(chip); | ||
797 | unlock: | ||
798 | t = zd_chip_unlock_phy_regs(chip); | 794 | t = zd_chip_unlock_phy_regs(chip); |
799 | if (t && !r) | 795 | if (t && !r) |
800 | r = t; | 796 | r = t; |
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h index b07569e391ee..e57ed75d9425 100644 --- a/drivers/net/wireless/zd1211rw/zd_chip.h +++ b/drivers/net/wireless/zd1211rw/zd_chip.h | |||
@@ -641,8 +641,8 @@ enum { | |||
641 | * also only 11 channels. */ | 641 | * also only 11 channels. */ |
642 | #define E2P_ALLOWED_CHANNEL E2P_DATA(0x18) | 642 | #define E2P_ALLOWED_CHANNEL E2P_DATA(0x18) |
643 | 643 | ||
644 | #define E2P_PHY_REG E2P_DATA(0x1a) | ||
645 | #define E2P_DEVICE_VER E2P_DATA(0x20) | 644 | #define E2P_DEVICE_VER E2P_DATA(0x20) |
645 | #define E2P_PHY_REG E2P_DATA(0x25) | ||
646 | #define E2P_36M_CAL_VALUE1 E2P_DATA(0x28) | 646 | #define E2P_36M_CAL_VALUE1 E2P_DATA(0x28) |
647 | #define E2P_36M_CAL_VALUE2 E2P_DATA(0x2a) | 647 | #define E2P_36M_CAL_VALUE2 E2P_DATA(0x2a) |
648 | #define E2P_36M_CAL_VALUE3 E2P_DATA(0x2c) | 648 | #define E2P_36M_CAL_VALUE3 E2P_DATA(0x2c) |
@@ -711,7 +711,7 @@ struct zd_chip { | |||
711 | u16 link_led; | 711 | u16 link_led; |
712 | unsigned int pa_type:4, | 712 | unsigned int pa_type:4, |
713 | patch_cck_gain:1, patch_cr157:1, patch_6m_band_edge:1, | 713 | patch_cck_gain:1, patch_cr157:1, patch_6m_band_edge:1, |
714 | new_phy_layout:1, | 714 | new_phy_layout:1, al2230s_bit:1, |
715 | is_zd1211b:1, supports_tx_led:1; | 715 | is_zd1211b:1, supports_tx_led:1; |
716 | }; | 716 | }; |
717 | 717 | ||
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c index 25323a13a3db..5235a7827ac5 100644 --- a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c +++ b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c | |||
@@ -358,6 +358,12 @@ int zd_rf_init_al2230(struct zd_rf *rf) | |||
358 | { | 358 | { |
359 | struct zd_chip *chip = zd_rf_to_chip(rf); | 359 | struct zd_chip *chip = zd_rf_to_chip(rf); |
360 | 360 | ||
361 | if (chip->al2230s_bit) { | ||
362 | dev_err(zd_chip_dev(chip), "AL2230S devices are not yet " | ||
363 | "supported by this driver.\n"); | ||
364 | return -ENODEV; | ||
365 | } | ||
366 | |||
361 | rf->switch_radio_off = al2230_switch_radio_off; | 367 | rf->switch_radio_off = al2230_switch_radio_off; |
362 | if (chip->is_zd1211b) { | 368 | if (chip->is_zd1211b) { |
363 | rf->init_hw = zd1211b_al2230_init_hw; | 369 | rf->init_hw = zd1211b_al2230_init_hw; |
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c index aac8a1c5ba08..edaaad2f648b 100644 --- a/drivers/net/wireless/zd1211rw/zd_usb.c +++ b/drivers/net/wireless/zd1211rw/zd_usb.c | |||
@@ -62,6 +62,7 @@ static struct usb_device_id usb_ids[] = { | |||
62 | { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B }, | 62 | { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B }, |
63 | { USB_DEVICE(0x13b1, 0x0024), .driver_info = DEVICE_ZD1211B }, | 63 | { USB_DEVICE(0x13b1, 0x0024), .driver_info = DEVICE_ZD1211B }, |
64 | { USB_DEVICE(0x0586, 0x340f), .driver_info = DEVICE_ZD1211B }, | 64 | { USB_DEVICE(0x0586, 0x340f), .driver_info = DEVICE_ZD1211B }, |
65 | { USB_DEVICE(0x0baf, 0x0121), .driver_info = DEVICE_ZD1211B }, | ||
65 | /* "Driverless" devices that need ejecting */ | 66 | /* "Driverless" devices that need ejecting */ |
66 | { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER }, | 67 | { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER }, |
67 | {} | 68 | {} |