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-rw-r--r--drivers/net/irda/w83977af_ir.c36
1 files changed, 0 insertions, 36 deletions
diff --git a/drivers/net/irda/w83977af_ir.c b/drivers/net/irda/w83977af_ir.c
index 551810fd2976..980625feb2c0 100644
--- a/drivers/net/irda/w83977af_ir.c
+++ b/drivers/net/irda/w83977af_ir.c
@@ -65,7 +65,6 @@
65#undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */ 65#undef CONFIG_NETWINDER_TX_DMA_PROBLEMS /* Not needed */
66#define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */ 66#define CONFIG_NETWINDER_RX_DMA_PROBLEMS /* Must have this one! */
67#endif 67#endif
68#undef CONFIG_USE_INTERNAL_TIMER /* Just cannot make that timer work */
69#define CONFIG_USE_W977_PNP /* Currently needed */ 68#define CONFIG_USE_W977_PNP /* Currently needed */
70#define PIO_MAX_SPEED 115200 69#define PIO_MAX_SPEED 115200
71 70
@@ -533,25 +532,6 @@ static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
533 self->tx_buff.len = skb->len; 532 self->tx_buff.len = skb->len;
534 533
535 mtt = irda_get_mtt(skb); 534 mtt = irda_get_mtt(skb);
536#ifdef CONFIG_USE_INTERNAL_TIMER
537 if (mtt > 50) {
538 /* Adjust for timer resolution */
539 mtt /= 1000+1;
540
541 /* Setup timer */
542 switch_bank(iobase, SET4);
543 outb(mtt & 0xff, iobase+TMRL);
544 outb((mtt >> 8) & 0x0f, iobase+TMRH);
545
546 /* Start timer */
547 outb(IR_MSL_EN_TMR, iobase+IR_MSL);
548 self->io.direction = IO_XMIT;
549
550 /* Enable timer interrupt */
551 switch_bank(iobase, SET0);
552 outb(ICR_ETMRI, iobase+ICR);
553 } else {
554#endif
555 IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __func__ , jiffies, mtt); 535 IRDA_DEBUG(4, "%s(%ld), mtt=%d\n", __func__ , jiffies, mtt);
556 if (mtt) 536 if (mtt)
557 udelay(mtt); 537 udelay(mtt);
@@ -560,9 +540,6 @@ static netdev_tx_t w83977af_hard_xmit(struct sk_buff *skb,
560 switch_bank(iobase, SET0); 540 switch_bank(iobase, SET0);
561 outb(ICR_EDMAI, iobase+ICR); 541 outb(ICR_EDMAI, iobase+ICR);
562 w83977af_dma_write(self, iobase); 542 w83977af_dma_write(self, iobase);
563#ifdef CONFIG_USE_INTERNAL_TIMER
564 }
565#endif
566 } else { 543 } else {
567 self->tx_buff.data = self->tx_buff.head; 544 self->tx_buff.data = self->tx_buff.head;
568 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, 545 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
@@ -876,20 +853,7 @@ static int w83977af_dma_receive_complete(struct w83977af_ir *self)
876 /* Check if we have transferred all data to memory */ 853 /* Check if we have transferred all data to memory */
877 switch_bank(iobase, SET0); 854 switch_bank(iobase, SET0);
878 if (inb(iobase+USR) & USR_RDR) { 855 if (inb(iobase+USR) & USR_RDR) {
879#ifdef CONFIG_USE_INTERNAL_TIMER
880 /* Put this entry back in fifo */
881 st_fifo->head--;
882 st_fifo->len++;
883 st_fifo->entries[st_fifo->head].status = status;
884 st_fifo->entries[st_fifo->head].len = len;
885
886 /* Restore set register */
887 outb(set, iobase+SSR);
888
889 return FALSE; /* I'll be back! */
890#else
891 udelay(80); /* Should be enough!? */ 856 udelay(80); /* Should be enough!? */
892#endif
893 } 857 }
894 858
895 skb = dev_alloc_skb(len+1); 859 skb = dev_alloc_skb(len+1);