diff options
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/chelsio/sge.c | 6 | ||||
| -rw-r--r-- | drivers/net/e100.c | 5 | ||||
| -rw-r--r-- | drivers/net/e1000/e1000_main.c | 8 | ||||
| -rw-r--r-- | drivers/net/tg3.c | 52 | ||||
| -rw-r--r-- | drivers/net/tg3.h | 1 |
5 files changed, 55 insertions, 17 deletions
diff --git a/drivers/net/chelsio/sge.c b/drivers/net/chelsio/sge.c index 2c5b849b7ba4..30ff8ea1a402 100644 --- a/drivers/net/chelsio/sge.c +++ b/drivers/net/chelsio/sge.c | |||
| @@ -1021,7 +1021,7 @@ static void restart_tx_queues(struct sge *sge) | |||
| 1021 | if (test_and_clear_bit(nd->if_port, | 1021 | if (test_and_clear_bit(nd->if_port, |
| 1022 | &sge->stopped_tx_queues) && | 1022 | &sge->stopped_tx_queues) && |
| 1023 | netif_running(nd)) { | 1023 | netif_running(nd)) { |
| 1024 | sge->stats.cmdQ_restarted[3]++; | 1024 | sge->stats.cmdQ_restarted[2]++; |
| 1025 | netif_wake_queue(nd); | 1025 | netif_wake_queue(nd); |
| 1026 | } | 1026 | } |
| 1027 | } | 1027 | } |
| @@ -1350,7 +1350,7 @@ static int t1_sge_tx(struct sk_buff *skb, struct adapter *adapter, | |||
| 1350 | if (unlikely(credits < count)) { | 1350 | if (unlikely(credits < count)) { |
| 1351 | netif_stop_queue(dev); | 1351 | netif_stop_queue(dev); |
| 1352 | set_bit(dev->if_port, &sge->stopped_tx_queues); | 1352 | set_bit(dev->if_port, &sge->stopped_tx_queues); |
| 1353 | sge->stats.cmdQ_full[3]++; | 1353 | sge->stats.cmdQ_full[2]++; |
| 1354 | spin_unlock(&q->lock); | 1354 | spin_unlock(&q->lock); |
| 1355 | if (!netif_queue_stopped(dev)) | 1355 | if (!netif_queue_stopped(dev)) |
| 1356 | CH_ERR("%s: Tx ring full while queue awake!\n", | 1356 | CH_ERR("%s: Tx ring full while queue awake!\n", |
| @@ -1358,7 +1358,7 @@ static int t1_sge_tx(struct sk_buff *skb, struct adapter *adapter, | |||
| 1358 | return NETDEV_TX_BUSY; | 1358 | return NETDEV_TX_BUSY; |
| 1359 | } | 1359 | } |
| 1360 | if (unlikely(credits - count < q->stop_thres)) { | 1360 | if (unlikely(credits - count < q->stop_thres)) { |
| 1361 | sge->stats.cmdQ_full[3]++; | 1361 | sge->stats.cmdQ_full[2]++; |
| 1362 | netif_stop_queue(dev); | 1362 | netif_stop_queue(dev); |
| 1363 | set_bit(dev->if_port, &sge->stopped_tx_queues); | 1363 | set_bit(dev->if_port, &sge->stopped_tx_queues); |
| 1364 | } | 1364 | } |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 24253c807e55..f57a85feda3d 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
| @@ -2154,6 +2154,9 @@ static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode) | |||
| 2154 | 2154 | ||
| 2155 | msleep(10); | 2155 | msleep(10); |
| 2156 | 2156 | ||
| 2157 | pci_dma_sync_single_for_cpu(nic->pdev, nic->rx_to_clean->dma_addr, | ||
| 2158 | RFD_BUF_LEN, PCI_DMA_FROMDEVICE); | ||
| 2159 | |||
| 2157 | if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd), | 2160 | if(memcmp(nic->rx_to_clean->skb->data + sizeof(struct rfd), |
| 2158 | skb->data, ETH_DATA_LEN)) | 2161 | skb->data, ETH_DATA_LEN)) |
| 2159 | err = -EAGAIN; | 2162 | err = -EAGAIN; |
| @@ -2161,8 +2164,8 @@ static int e100_loopback_test(struct nic *nic, enum loopback loopback_mode) | |||
| 2161 | err_loopback_none: | 2164 | err_loopback_none: |
| 2162 | mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0); | 2165 | mdio_write(nic->netdev, nic->mii.phy_id, MII_BMCR, 0); |
| 2163 | nic->loopback = lb_none; | 2166 | nic->loopback = lb_none; |
| 2164 | e100_hw_init(nic); | ||
| 2165 | e100_clean_cbs(nic); | 2167 | e100_clean_cbs(nic); |
| 2168 | e100_hw_reset(nic); | ||
| 2166 | err_clean_rx: | 2169 | err_clean_rx: |
| 2167 | e100_rx_clean_list(nic); | 2170 | e100_rx_clean_list(nic); |
| 2168 | return err; | 2171 | return err; |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 4c4db96d0b7b..84dcca3776ee 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
| @@ -3710,7 +3710,7 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter, | |||
| 3710 | e1000_rx_checksum(adapter, | 3710 | e1000_rx_checksum(adapter, |
| 3711 | (uint32_t)(status) | | 3711 | (uint32_t)(status) | |
| 3712 | ((uint32_t)(rx_desc->errors) << 24), | 3712 | ((uint32_t)(rx_desc->errors) << 24), |
| 3713 | rx_desc->csum, skb); | 3713 | le16_to_cpu(rx_desc->csum), skb); |
| 3714 | 3714 | ||
| 3715 | skb->protocol = eth_type_trans(skb, netdev); | 3715 | skb->protocol = eth_type_trans(skb, netdev); |
| 3716 | #ifdef CONFIG_E1000_NAPI | 3716 | #ifdef CONFIG_E1000_NAPI |
| @@ -3854,11 +3854,11 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |||
| 3854 | } | 3854 | } |
| 3855 | 3855 | ||
| 3856 | e1000_rx_checksum(adapter, staterr, | 3856 | e1000_rx_checksum(adapter, staterr, |
| 3857 | rx_desc->wb.lower.hi_dword.csum_ip.csum, skb); | 3857 | le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb); |
| 3858 | skb->protocol = eth_type_trans(skb, netdev); | 3858 | skb->protocol = eth_type_trans(skb, netdev); |
| 3859 | 3859 | ||
| 3860 | if (likely(rx_desc->wb.upper.header_status & | 3860 | if (likely(rx_desc->wb.upper.header_status & |
| 3861 | E1000_RXDPS_HDRSTAT_HDRSP)) | 3861 | cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))) |
| 3862 | adapter->rx_hdr_split++; | 3862 | adapter->rx_hdr_split++; |
| 3863 | #ifdef CONFIG_E1000_NAPI | 3863 | #ifdef CONFIG_E1000_NAPI |
| 3864 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { | 3864 | if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
| @@ -3884,7 +3884,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |||
| 3884 | #endif | 3884 | #endif |
| 3885 | 3885 | ||
| 3886 | next_desc: | 3886 | next_desc: |
| 3887 | rx_desc->wb.middle.status_error &= ~0xFF; | 3887 | rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF); |
| 3888 | buffer_info->skb = NULL; | 3888 | buffer_info->skb = NULL; |
| 3889 | 3889 | ||
| 3890 | /* return some buffers to hardware, one at a time is too slow */ | 3890 | /* return some buffers to hardware, one at a time is too slow */ |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index b8f1524da557..caf4102b54ce 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
| @@ -9552,12 +9552,36 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
| 9552 | } | 9552 | } |
| 9553 | } | 9553 | } |
| 9554 | 9554 | ||
| 9555 | /* Find msi capability. */ | 9555 | /* The EPB bridge inside 5714, 5715, and 5780 cannot support |
| 9556 | * DMA addresses > 40-bit. This bridge may have other additional | ||
| 9557 | * 57xx devices behind it in some 4-port NIC designs for example. | ||
| 9558 | * Any tg3 device found behind the bridge will also need the 40-bit | ||
| 9559 | * DMA workaround. | ||
| 9560 | */ | ||
| 9556 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 || | 9561 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 || |
| 9557 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) { | 9562 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5714) { |
| 9558 | tp->tg3_flags2 |= TG3_FLG2_5780_CLASS; | 9563 | tp->tg3_flags2 |= TG3_FLG2_5780_CLASS; |
| 9564 | tp->tg3_flags |= TG3_FLAG_40BIT_DMA_BUG; | ||
| 9559 | tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI); | 9565 | tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI); |
| 9560 | } | 9566 | } |
| 9567 | else { | ||
| 9568 | struct pci_dev *bridge = NULL; | ||
| 9569 | |||
| 9570 | do { | ||
| 9571 | bridge = pci_get_device(PCI_VENDOR_ID_SERVERWORKS, | ||
| 9572 | PCI_DEVICE_ID_SERVERWORKS_EPB, | ||
| 9573 | bridge); | ||
| 9574 | if (bridge && bridge->subordinate && | ||
| 9575 | (bridge->subordinate->number <= | ||
| 9576 | tp->pdev->bus->number) && | ||
| 9577 | (bridge->subordinate->subordinate >= | ||
| 9578 | tp->pdev->bus->number)) { | ||
| 9579 | tp->tg3_flags |= TG3_FLAG_40BIT_DMA_BUG; | ||
| 9580 | pci_dev_put(bridge); | ||
| 9581 | break; | ||
| 9582 | } | ||
| 9583 | } while (bridge); | ||
| 9584 | } | ||
| 9561 | 9585 | ||
| 9562 | /* Initialize misc host control in PCI block. */ | 9586 | /* Initialize misc host control in PCI block. */ |
| 9563 | tp->misc_host_ctrl |= (misc_ctrl_reg & | 9587 | tp->misc_host_ctrl |= (misc_ctrl_reg & |
| @@ -10303,7 +10327,14 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
| 10303 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { | 10327 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) { |
| 10304 | u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); | 10328 | u32 ccval = (tr32(TG3PCI_CLOCK_CTRL) & 0x1f); |
| 10305 | 10329 | ||
| 10306 | if (ccval == 0x6 || ccval == 0x7) | 10330 | /* If the 5704 is behind the EPB bridge, we can |
| 10331 | * do the less restrictive ONE_DMA workaround for | ||
| 10332 | * better performance. | ||
| 10333 | */ | ||
| 10334 | if ((tp->tg3_flags & TG3_FLAG_40BIT_DMA_BUG) && | ||
| 10335 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704) | ||
| 10336 | tp->dma_rwctrl |= 0x8000; | ||
| 10337 | else if (ccval == 0x6 || ccval == 0x7) | ||
| 10307 | tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; | 10338 | tp->dma_rwctrl |= DMA_RWCTRL_ONE_DMA; |
| 10308 | 10339 | ||
| 10309 | /* Set bit 23 to enable PCIX hw bug fix */ | 10340 | /* Set bit 23 to enable PCIX hw bug fix */ |
| @@ -10759,19 +10790,20 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
| 10759 | goto err_out_iounmap; | 10790 | goto err_out_iounmap; |
| 10760 | } | 10791 | } |
| 10761 | 10792 | ||
| 10762 | /* 5714, 5715 and 5780 cannot support DMA addresses > 40-bit. | 10793 | /* The EPB bridge inside 5714, 5715, and 5780 and any |
| 10794 | * device behind the EPB cannot support DMA addresses > 40-bit. | ||
| 10763 | * On 64-bit systems with IOMMU, use 40-bit dma_mask. | 10795 | * On 64-bit systems with IOMMU, use 40-bit dma_mask. |
| 10764 | * On 64-bit systems without IOMMU, use 64-bit dma_mask and | 10796 | * On 64-bit systems without IOMMU, use 64-bit dma_mask and |
| 10765 | * do DMA address check in tg3_start_xmit(). | 10797 | * do DMA address check in tg3_start_xmit(). |
| 10766 | */ | 10798 | */ |
| 10767 | if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { | 10799 | if (tp->tg3_flags2 & TG3_FLG2_IS_5788) |
| 10800 | persist_dma_mask = dma_mask = DMA_32BIT_MASK; | ||
| 10801 | else if (tp->tg3_flags & TG3_FLAG_40BIT_DMA_BUG) { | ||
| 10768 | persist_dma_mask = dma_mask = DMA_40BIT_MASK; | 10802 | persist_dma_mask = dma_mask = DMA_40BIT_MASK; |
| 10769 | #ifdef CONFIG_HIGHMEM | 10803 | #ifdef CONFIG_HIGHMEM |
| 10770 | dma_mask = DMA_64BIT_MASK; | 10804 | dma_mask = DMA_64BIT_MASK; |
| 10771 | #endif | 10805 | #endif |
| 10772 | } else if (tp->tg3_flags2 & TG3_FLG2_IS_5788) | 10806 | } else |
| 10773 | persist_dma_mask = dma_mask = DMA_32BIT_MASK; | ||
| 10774 | else | ||
| 10775 | persist_dma_mask = dma_mask = DMA_64BIT_MASK; | 10807 | persist_dma_mask = dma_mask = DMA_64BIT_MASK; |
| 10776 | 10808 | ||
| 10777 | /* Configure DMA attributes. */ | 10809 | /* Configure DMA attributes. */ |
| @@ -10908,8 +10940,10 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
| 10908 | (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) != 0, | 10940 | (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) != 0, |
| 10909 | (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0, | 10941 | (tp->tg3_flags2 & TG3_FLG2_NO_ETH_WIRE_SPEED) == 0, |
| 10910 | (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0); | 10942 | (tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) != 0); |
| 10911 | printk(KERN_INFO "%s: dma_rwctrl[%08x]\n", | 10943 | printk(KERN_INFO "%s: dma_rwctrl[%08x] dma_mask[%d-bit]\n", |
| 10912 | dev->name, tp->dma_rwctrl); | 10944 | dev->name, tp->dma_rwctrl, |
| 10945 | (pdev->dma_mask == DMA_32BIT_MASK) ? 32 : | ||
| 10946 | (((u64) pdev->dma_mask == DMA_40BIT_MASK) ? 40 : 64)); | ||
| 10913 | 10947 | ||
| 10914 | return 0; | 10948 | return 0; |
| 10915 | 10949 | ||
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 7f4b7f6ac40d..7e3b613afb29 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
| @@ -2163,6 +2163,7 @@ struct tg3 { | |||
| 2163 | #define TG3_FLAG_10_100_ONLY 0x01000000 | 2163 | #define TG3_FLAG_10_100_ONLY 0x01000000 |
| 2164 | #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 | 2164 | #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 |
| 2165 | #define TG3_FLAG_IN_RESET_TASK 0x04000000 | 2165 | #define TG3_FLAG_IN_RESET_TASK 0x04000000 |
| 2166 | #define TG3_FLAG_40BIT_DMA_BUG 0x08000000 | ||
| 2166 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 | 2167 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 |
| 2167 | #define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000 | 2168 | #define TG3_FLAG_GOT_SERDES_FLOWCTL 0x20000000 |
| 2168 | #define TG3_FLAG_SPLIT_MODE 0x40000000 | 2169 | #define TG3_FLAG_SPLIT_MODE 0x40000000 |
