diff options
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/tg3.c | 15 | ||||
-rw-r--r-- | drivers/net/tg3.h | 10 |
2 files changed, 16 insertions, 9 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 36f2e1b8cbb1..2576effca845 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -12433,7 +12433,7 @@ skip_phy_reset: | |||
12433 | 12433 | ||
12434 | static void __devinit tg3_read_partno(struct tg3 *tp) | 12434 | static void __devinit tg3_read_partno(struct tg3 *tp) |
12435 | { | 12435 | { |
12436 | unsigned char vpd_data[256]; /* in little-endian format */ | 12436 | unsigned char vpd_data[TG3_NVM_VPD_LEN]; /* in little-endian format */ |
12437 | unsigned int i; | 12437 | unsigned int i; |
12438 | u32 magic; | 12438 | u32 magic; |
12439 | 12439 | ||
@@ -12442,14 +12442,14 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
12442 | goto out_not_found; | 12442 | goto out_not_found; |
12443 | 12443 | ||
12444 | if (magic == TG3_EEPROM_MAGIC) { | 12444 | if (magic == TG3_EEPROM_MAGIC) { |
12445 | for (i = 0; i < 256; i += 4) { | 12445 | for (i = 0; i < TG3_NVM_VPD_LEN; i += 4) { |
12446 | u32 tmp; | 12446 | u32 tmp; |
12447 | 12447 | ||
12448 | /* The data is in little-endian format in NVRAM. | 12448 | /* The data is in little-endian format in NVRAM. |
12449 | * Use the big-endian read routines to preserve | 12449 | * Use the big-endian read routines to preserve |
12450 | * the byte order as it exists in NVRAM. | 12450 | * the byte order as it exists in NVRAM. |
12451 | */ | 12451 | */ |
12452 | if (tg3_nvram_read_be32(tp, 0x100 + i, &tmp)) | 12452 | if (tg3_nvram_read_be32(tp, TG3_NVM_VPD_OFF + i, &tmp)) |
12453 | goto out_not_found; | 12453 | goto out_not_found; |
12454 | 12454 | ||
12455 | memcpy(&vpd_data[i], &tmp, sizeof(tmp)); | 12455 | memcpy(&vpd_data[i], &tmp, sizeof(tmp)); |
@@ -12458,7 +12458,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
12458 | int vpd_cap; | 12458 | int vpd_cap; |
12459 | 12459 | ||
12460 | vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD); | 12460 | vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD); |
12461 | for (i = 0; i < 256; i += 4) { | 12461 | for (i = 0; i < TG3_NVM_VPD_LEN; i += 4) { |
12462 | u32 tmp, j = 0; | 12462 | u32 tmp, j = 0; |
12463 | __le32 v; | 12463 | __le32 v; |
12464 | u16 tmp16; | 12464 | u16 tmp16; |
@@ -12483,7 +12483,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
12483 | } | 12483 | } |
12484 | 12484 | ||
12485 | /* Now parse and find the part number. */ | 12485 | /* Now parse and find the part number. */ |
12486 | for (i = 0; i < 254; ) { | 12486 | for (i = 0; i < TG3_NVM_VPD_LEN - 2; ) { |
12487 | unsigned char val = vpd_data[i]; | 12487 | unsigned char val = vpd_data[i]; |
12488 | unsigned int block_end; | 12488 | unsigned int block_end; |
12489 | 12489 | ||
@@ -12502,7 +12502,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
12502 | (vpd_data[i + 2] << 8))); | 12502 | (vpd_data[i + 2] << 8))); |
12503 | i += 3; | 12503 | i += 3; |
12504 | 12504 | ||
12505 | if (block_end > 256) | 12505 | if (block_end > TG3_NVM_VPD_LEN) |
12506 | goto out_not_found; | 12506 | goto out_not_found; |
12507 | 12507 | ||
12508 | while (i < (block_end - 2)) { | 12508 | while (i < (block_end - 2)) { |
@@ -12511,7 +12511,8 @@ static void __devinit tg3_read_partno(struct tg3 *tp) | |||
12511 | int partno_len = vpd_data[i + 2]; | 12511 | int partno_len = vpd_data[i + 2]; |
12512 | 12512 | ||
12513 | i += 3; | 12513 | i += 3; |
12514 | if (partno_len > 24 || (partno_len + i) > 256) | 12514 | if (partno_len > TG3_BPN_SIZE || |
12515 | (partno_len + i) > TG3_NVM_VPD_LEN) | ||
12515 | goto out_not_found; | 12516 | goto out_not_found; |
12516 | 12517 | ||
12517 | memcpy(tp->board_part_number, | 12518 | memcpy(tp->board_part_number, |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 6a2c31071caf..cd30889650f8 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -1821,6 +1821,11 @@ | |||
1821 | 1821 | ||
1822 | #define TG3_OTP_DEFAULT 0x286c1640 | 1822 | #define TG3_OTP_DEFAULT 0x286c1640 |
1823 | 1823 | ||
1824 | |||
1825 | /* Hardware Legacy NVRAM layout */ | ||
1826 | #define TG3_NVM_VPD_OFF 0x100 | ||
1827 | #define TG3_NVM_VPD_LEN 256 | ||
1828 | |||
1824 | /* Hardware Selfboot NVRAM layout */ | 1829 | /* Hardware Selfboot NVRAM layout */ |
1825 | #define TG3_NVM_HWSB_CFG1 0x00000004 | 1830 | #define TG3_NVM_HWSB_CFG1 0x00000004 |
1826 | #define TG3_NVM_HWSB_CFG1_MAJMSK 0xf8000000 | 1831 | #define TG3_NVM_HWSB_CFG1_MAJMSK 0xf8000000 |
@@ -2893,8 +2898,9 @@ struct tg3 { | |||
2893 | u32 led_ctrl; | 2898 | u32 led_ctrl; |
2894 | u32 phy_otp; | 2899 | u32 phy_otp; |
2895 | 2900 | ||
2896 | char board_part_number[24]; | 2901 | #define TG3_BPN_SIZE 24 |
2897 | #define TG3_VER_SIZE 32 | 2902 | char board_part_number[TG3_BPN_SIZE]; |
2903 | #define TG3_VER_SIZE ETHTOOL_FWVERS_LEN | ||
2898 | char fw_ver[TG3_VER_SIZE]; | 2904 | char fw_ver[TG3_VER_SIZE]; |
2899 | u32 nic_sram_data_cfg; | 2905 | u32 nic_sram_data_cfg; |
2900 | u32 pci_clock_ctrl; | 2906 | u32 pci_clock_ctrl; |