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-rw-r--r--drivers/net/tg3.c26
1 files changed, 17 insertions, 9 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 7a837c465960..201be425643a 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -2190,7 +2190,14 @@ static int tg3_nvram_read_using_eeprom(struct tg3 *tp,
2190 if (!(tmp & EEPROM_ADDR_COMPLETE)) 2190 if (!(tmp & EEPROM_ADDR_COMPLETE))
2191 return -EBUSY; 2191 return -EBUSY;
2192 2192
2193 *val = tr32(GRC_EEPROM_DATA); 2193 tmp = tr32(GRC_EEPROM_DATA);
2194
2195 /*
2196 * The data will always be opposite the native endian
2197 * format. Perform a blind byteswap to compensate.
2198 */
2199 *val = swab32(tmp);
2200
2194 return 0; 2201 return 0;
2195} 2202}
2196 2203
@@ -10663,7 +10670,13 @@ static int tg3_nvram_write_block_using_eeprom(struct tg3 *tp,
10663 10670
10664 memcpy(&data, buf + i, 4); 10671 memcpy(&data, buf + i, 4);
10665 10672
10666 tw32(GRC_EEPROM_DATA, be32_to_cpu(data)); 10673 /*
10674 * The SEEPROM interface expects the data to always be opposite
10675 * the native endian format. We accomplish this by reversing
10676 * all the operations that would have been performed on the
10677 * data from a call to tg3_nvram_read_be32().
10678 */
10679 tw32(GRC_EEPROM_DATA, swab32(be32_to_cpu(data)));
10667 10680
10668 val = tr32(GRC_EEPROM_ADDR); 10681 val = tr32(GRC_EEPROM_ADDR);
10669 tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE); 10682 tw32(GRC_EEPROM_ADDR, val | EEPROM_ADDR_COMPLETE);
@@ -12443,13 +12456,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
12443 /* Next, try NVRAM. */ 12456 /* Next, try NVRAM. */
12444 if (!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) && 12457 if (!tg3_nvram_read_be32(tp, mac_offset + 0, &hi) &&
12445 !tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) { 12458 !tg3_nvram_read_be32(tp, mac_offset + 4, &lo)) {
12446 dev->dev_addr[0] = ((hi >> 16) & 0xff); 12459 memcpy(&dev->dev_addr[0], ((char *)&hi) + 2, 2);
12447 dev->dev_addr[1] = ((hi >> 24) & 0xff); 12460 memcpy(&dev->dev_addr[2], (char *)&lo, sizeof(lo));
12448 dev->dev_addr[2] = ((lo >> 0) & 0xff);
12449 dev->dev_addr[3] = ((lo >> 8) & 0xff);
12450 dev->dev_addr[4] = ((lo >> 16) & 0xff);
12451 dev->dev_addr[5] = ((lo >> 24) & 0xff);
12452
12453 } 12461 }
12454 /* Finally just fetch it out of the MAC control regs. */ 12462 /* Finally just fetch it out of the MAC control regs. */
12455 else { 12463 else {