4 files changed, 90 insertions, 52 deletions

diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index ed53aaab4c02..ae419736158e 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -471,7 +471,7 @@ static int cpmac_start_xmit(struct sk_buff *skb, struct net_device *dev)
         }
 
         len = max(skb->len, ETH_ZLEN);
-        queue = skb->queue_mapping;
+        queue = skb_get_queue_mapping(skb);
 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
         netif_stop_subqueue(dev, queue);
 #else
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index ed1f9bbb2a32..112ab079ce7d 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -3103,31 +3103,12 @@ static int niu_alloc_tx_ring_info(struct niu *np,
 
 static void niu_size_rbr(struct niu *np, struct rx_ring_info *rp)
 {
-        u16 bs;
+        u16 bss;
 
-        switch (PAGE_SIZE) {
-        case 4 * 1024:
-        case 8 * 1024:
-        case 16 * 1024:
-        case 32 * 1024:
-                rp->rbr_block_size = PAGE_SIZE;
-                rp->rbr_blocks_per_page = 1;
-                break;
+        bss = min(PAGE_SHIFT, 15);
 
-        default:
-                if (PAGE_SIZE % (32 * 1024) == 0)
-                        bs = 32 * 1024;
-                else if (PAGE_SIZE % (16 * 1024) == 0)
-                        bs = 16 * 1024;
-                else if (PAGE_SIZE % (8 * 1024) == 0)
-                        bs = 8 * 1024;
-                else if (PAGE_SIZE % (4 * 1024) == 0)
-                        bs = 4 * 1024;
-                else
-                        BUG();
-                rp->rbr_block_size = bs;
-                rp->rbr_blocks_per_page = PAGE_SIZE / bs;
-        }
+        rp->rbr_block_size = 1 << bss;
+        rp->rbr_blocks_per_page = 1 << (PAGE_SHIFT-bss);
 
         rp->rbr_sizes[0] = 256;
         rp->rbr_sizes[1] = 1024;
@@ -7902,12 +7883,7 @@ static int __init niu_init(void)
 {
         int err = 0;
 
-        BUILD_BUG_ON((PAGE_SIZE < 4 * 1024) ||
-                     ((PAGE_SIZE > 32 * 1024) &&
-                      ((PAGE_SIZE % (32 * 1024)) != 0 &&
-                       (PAGE_SIZE % (16 * 1024)) != 0 &&
-                       (PAGE_SIZE % (8 * 1024)) != 0 &&
-                       (PAGE_SIZE % (4 * 1024)) != 0)));
+        BUILD_BUG_ON(PAGE_SIZE < 4 * 1024);
 
         niu_debug = netif_msg_init(debug, NIU_MSG_DEFAULT);
 
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 014dc2cfe4d6..09440d783e65 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -64,8 +64,8 @@
 
 #define DRV_MODULE_NAME         "tg3"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "3.84"
-#define DRV_MODULE_RELDATE      "October 12, 2007"
+#define DRV_MODULE_VERSION      "3.85"
+#define DRV_MODULE_RELDATE      "October 18, 2007"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -200,6 +200,7 @@ static struct pci_device_id tg3_pci_tbl[] = {
         {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)},
         {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5784)},
         {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5764)},
+        {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5723)},
         {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761)},
         {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5761E)},
         {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)},
@@ -5028,10 +5029,7 @@ static int tg3_poll_fw(struct tg3 *tp)
 /* Save PCI command register before chip reset */
 static void tg3_save_pci_state(struct tg3 *tp)
 {
-        u32 val;
-
-        pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val);
-        tp->pci_cmd = val;
+        pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd);
 }
 
 /* Restore PCI state after chip reset */
@@ -5054,7 +5052,7 @@ static void tg3_restore_pci_state(struct tg3 *tp)
                        PCISTATE_ALLOW_APE_SHMEM_WR;
         pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
 
-        pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd);
+        pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd);
 
         if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) {
                 pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
@@ -10820,9 +10818,24 @@ out_not_found:
                 strcpy(tp->board_part_number, "none");
 }
 
+static int __devinit tg3_fw_img_is_valid(struct tg3 *tp, u32 offset)
+{
+        u32 val;
+
+        if (tg3_nvram_read_swab(tp, offset, &val) ||
+            (val & 0xfc000000) != 0x0c000000 ||
+            tg3_nvram_read_swab(tp, offset + 4, &val) ||
+            val != 0)
+                return 0;
+
+        return 1;
+}
+
 static void __devinit tg3_read_fw_ver(struct tg3 *tp)
 {
         u32 val, offset, start;
+        u32 ver_offset;
+        int i, bcnt;
 
         if (tg3_nvram_read_swab(tp, 0, &val))
                 return;
@@ -10835,29 +10848,71 @@ static void __devinit tg3_read_fw_ver(struct tg3 *tp)
                 return;
 
         offset = tg3_nvram_logical_addr(tp, offset);
-        if (tg3_nvram_read_swab(tp, offset, &val))
+
+        if (!tg3_fw_img_is_valid(tp, offset) ||
+            tg3_nvram_read_swab(tp, offset + 8, &ver_offset))
                 return;
 
-        if ((val & 0xfc000000) == 0x0c000000) {
-                u32 ver_offset, addr;
-                int i;
+        offset = offset + ver_offset - start;
+        for (i = 0; i < 16; i += 4) {
+                if (tg3_nvram_read(tp, offset + i, &val))
+                        return;
 
-                if (tg3_nvram_read_swab(tp, offset + 4, &val) ||
-                    tg3_nvram_read_swab(tp, offset + 8, &ver_offset))
+                val = le32_to_cpu(val);
+                memcpy(tp->fw_ver + i, &val, 4);
+        }
+
+        if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF) ||
+             (tp->tg3_flags & TG3_FLG3_ENABLE_APE))
+                return;
+
+        for (offset = TG3_NVM_DIR_START;
+             offset < TG3_NVM_DIR_END;
+             offset += TG3_NVM_DIRENT_SIZE) {
+                if (tg3_nvram_read_swab(tp, offset, &val))
                         return;
 
-                if (val != 0)
+                if ((val >> TG3_NVM_DIRTYPE_SHIFT) == TG3_NVM_DIRTYPE_ASFINI)
+                        break;
+        }
+
+        if (offset == TG3_NVM_DIR_END)
+                return;
+
+        if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
+                start = 0x08000000;
+        else if (tg3_nvram_read_swab(tp, offset - 4, &start))
+                return;
+
+        if (tg3_nvram_read_swab(tp, offset + 4, &offset) ||
+            !tg3_fw_img_is_valid(tp, offset) ||
+            tg3_nvram_read_swab(tp, offset + 8, &val))
+                return;
+
+        offset += val - start;
+
+        bcnt = strlen(tp->fw_ver);
+
+        tp->fw_ver[bcnt++] = ',';
+        tp->fw_ver[bcnt++] = ' ';
+
+        for (i = 0; i < 4; i++) {
+                if (tg3_nvram_read(tp, offset, &val))
                         return;
 
-                addr = offset + ver_offset - start;
-                for (i = 0; i < 16; i += 4) {
-                        if (tg3_nvram_read(tp, addr + i, &val))
-                                return;
+                val = le32_to_cpu(val);
+                offset += sizeof(val);
 
-                        val = cpu_to_le32(val);
-                        memcpy(tp->fw_ver + i, &val, 4);
+                if (bcnt > TG3_VER_SIZE - sizeof(val)) {
+                        memcpy(&tp->fw_ver[bcnt], &val, TG3_VER_SIZE - bcnt);
+                        break;
                 }
+
+                memcpy(&tp->fw_ver[bcnt], &val, sizeof(val));
+                bcnt += sizeof(val);
         }
+
+        tp->fw_ver[TG3_VER_SIZE - 1] = 0;
 }
 
 static struct pci_dev * __devinit tg3_find_peer(struct tg3 *);
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 6dbdad2b8f88..1d5b2a3dd29d 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1540,6 +1540,12 @@
 #define TG3_EEPROM_MAGIC_HW             0xabcd
 #define TG3_EEPROM_MAGIC_HW_MSK         0xffff
 
+#define TG3_NVM_DIR_START               0x18
+#define TG3_NVM_DIR_END                 0x78
+#define TG3_NVM_DIRENT_SIZE             0xc
+#define TG3_NVM_DIRTYPE_SHIFT           24
+#define TG3_NVM_DIRTYPE_ASFINI          1
+
 /* 32K Window into NIC internal memory */
 #define NIC_SRAM_WIN_BASE               0x00008000
 
@@ -2415,10 +2421,11 @@ struct tg3 {
 #define PHY_REV_BCM5411_X0              0x1 /* Found on Netgear GA302T */
 
         u32                             led_ctrl;
-        u32                             pci_cmd;
+        u16                             pci_cmd;
 
         char                            board_part_number[24];
-        char                            fw_ver[16];
+#define TG3_VER_SIZE 32
+        char                            fw_ver[TG3_VER_SIZE];
         u32                             nic_sram_data_cfg;
         u32                             pci_clock_ctrl;
         struct pci_dev                  *pdev_peer;