diff options
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/r8169.c | 93 |
1 files changed, 31 insertions, 62 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 5d620d81e8cb..0025b8367ece 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -356,31 +356,6 @@ enum RTL8169_register_content { | |||
356 | LinkStatus = 0x02, | 356 | LinkStatus = 0x02, |
357 | FullDup = 0x01, | 357 | FullDup = 0x01, |
358 | 358 | ||
359 | /* GIGABIT_PHY_registers */ | ||
360 | PHY_CTRL_REG = 0, | ||
361 | PHY_STAT_REG = 1, | ||
362 | PHY_AUTO_NEGO_REG = 4, | ||
363 | PHY_1000_CTRL_REG = 9, | ||
364 | |||
365 | /* GIGABIT_PHY_REG_BIT */ | ||
366 | PHY_Restart_Auto_Nego = 0x0200, | ||
367 | PHY_Enable_Auto_Nego = 0x1000, | ||
368 | |||
369 | /* PHY_STAT_REG = 1 */ | ||
370 | PHY_Auto_Neco_Comp = 0x0020, | ||
371 | |||
372 | /* PHY_AUTO_NEGO_REG = 4 */ | ||
373 | PHY_Cap_10_Half = 0x0020, | ||
374 | PHY_Cap_10_Full = 0x0040, | ||
375 | PHY_Cap_100_Half = 0x0080, | ||
376 | PHY_Cap_100_Full = 0x0100, | ||
377 | |||
378 | /* PHY_1000_CTRL_REG = 9 */ | ||
379 | PHY_Cap_1000_Half = 0x0100, | ||
380 | PHY_Cap_1000_Full = 0x0200, | ||
381 | |||
382 | PHY_Cap_Null = 0x0, | ||
383 | |||
384 | /* _MediaType */ | 359 | /* _MediaType */ |
385 | _10_Half = 0x01, | 360 | _10_Half = 0x01, |
386 | _10_Full = 0x02, | 361 | _10_Full = 0x02, |
@@ -522,11 +497,6 @@ static const u16 rtl8169_napi_event = | |||
522 | static const unsigned int rtl8169_rx_config = | 497 | static const unsigned int rtl8169_rx_config = |
523 | (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); | 498 | (RX_FIFO_THRESH << RxCfgFIFOShift) | (RX_DMA_BURST << RxCfgDMAShift); |
524 | 499 | ||
525 | #define PHY_Cap_10_Half_Or_Less PHY_Cap_10_Half | ||
526 | #define PHY_Cap_10_Full_Or_Less PHY_Cap_10_Full | PHY_Cap_10_Half_Or_Less | ||
527 | #define PHY_Cap_100_Half_Or_Less PHY_Cap_100_Half | PHY_Cap_10_Full_Or_Less | ||
528 | #define PHY_Cap_100_Full_Or_Less PHY_Cap_100_Full | PHY_Cap_100_Half_Or_Less | ||
529 | |||
530 | static void mdio_write(void __iomem *ioaddr, int RegAddr, int value) | 500 | static void mdio_write(void __iomem *ioaddr, int RegAddr, int value) |
531 | { | 501 | { |
532 | int i; | 502 | int i; |
@@ -579,7 +549,7 @@ static unsigned int rtl8169_tbi_reset_pending(void __iomem *ioaddr) | |||
579 | 549 | ||
580 | static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr) | 550 | static unsigned int rtl8169_xmii_reset_pending(void __iomem *ioaddr) |
581 | { | 551 | { |
582 | return mdio_read(ioaddr, 0) & 0x8000; | 552 | return mdio_read(ioaddr, MII_BMCR) & BMCR_RESET; |
583 | } | 553 | } |
584 | 554 | ||
585 | static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr) | 555 | static unsigned int rtl8169_tbi_link_ok(void __iomem *ioaddr) |
@@ -601,8 +571,8 @@ static void rtl8169_xmii_reset_enable(void __iomem *ioaddr) | |||
601 | { | 571 | { |
602 | unsigned int val; | 572 | unsigned int val; |
603 | 573 | ||
604 | val = (mdio_read(ioaddr, PHY_CTRL_REG) | 0x8000) & 0xffff; | 574 | val = (mdio_read(ioaddr, MII_BMCR) | BMCR_RESET) & 0xffff; |
605 | mdio_write(ioaddr, PHY_CTRL_REG, val); | 575 | mdio_write(ioaddr, MII_BMCR, val); |
606 | } | 576 | } |
607 | 577 | ||
608 | static void rtl8169_check_link_status(struct net_device *dev, | 578 | static void rtl8169_check_link_status(struct net_device *dev, |
@@ -777,34 +747,34 @@ static int rtl8169_set_speed_xmii(struct net_device *dev, | |||
777 | void __iomem *ioaddr = tp->mmio_addr; | 747 | void __iomem *ioaddr = tp->mmio_addr; |
778 | int auto_nego, giga_ctrl; | 748 | int auto_nego, giga_ctrl; |
779 | 749 | ||
780 | auto_nego = mdio_read(ioaddr, PHY_AUTO_NEGO_REG); | 750 | auto_nego = mdio_read(ioaddr, MII_ADVERTISE); |
781 | auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_10_Full | | 751 | auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | |
782 | PHY_Cap_100_Half | PHY_Cap_100_Full); | 752 | ADVERTISE_100HALF | ADVERTISE_100FULL); |
783 | giga_ctrl = mdio_read(ioaddr, PHY_1000_CTRL_REG); | 753 | giga_ctrl = mdio_read(ioaddr, MII_CTRL1000); |
784 | giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_1000_Half | PHY_Cap_Null); | 754 | giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
785 | 755 | ||
786 | if (autoneg == AUTONEG_ENABLE) { | 756 | if (autoneg == AUTONEG_ENABLE) { |
787 | auto_nego |= (PHY_Cap_10_Half | PHY_Cap_10_Full | | 757 | auto_nego |= (ADVERTISE_10HALF | ADVERTISE_10FULL | |
788 | PHY_Cap_100_Half | PHY_Cap_100_Full); | 758 | ADVERTISE_100HALF | ADVERTISE_100FULL); |
789 | giga_ctrl |= PHY_Cap_1000_Full | PHY_Cap_1000_Half; | 759 | giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
790 | } else { | 760 | } else { |
791 | if (speed == SPEED_10) | 761 | if (speed == SPEED_10) |
792 | auto_nego |= PHY_Cap_10_Half | PHY_Cap_10_Full; | 762 | auto_nego |= ADVERTISE_10HALF | ADVERTISE_10FULL; |
793 | else if (speed == SPEED_100) | 763 | else if (speed == SPEED_100) |
794 | auto_nego |= PHY_Cap_100_Half | PHY_Cap_100_Full; | 764 | auto_nego |= ADVERTISE_100HALF | ADVERTISE_100FULL; |
795 | else if (speed == SPEED_1000) | 765 | else if (speed == SPEED_1000) |
796 | giga_ctrl |= PHY_Cap_1000_Full | PHY_Cap_1000_Half; | 766 | giga_ctrl |= ADVERTISE_1000FULL | ADVERTISE_1000HALF; |
797 | 767 | ||
798 | if (duplex == DUPLEX_HALF) | 768 | if (duplex == DUPLEX_HALF) |
799 | auto_nego &= ~(PHY_Cap_10_Full | PHY_Cap_100_Full); | 769 | auto_nego &= ~(ADVERTISE_10FULL | ADVERTISE_100FULL); |
800 | 770 | ||
801 | if (duplex == DUPLEX_FULL) | 771 | if (duplex == DUPLEX_FULL) |
802 | auto_nego &= ~(PHY_Cap_10_Half | PHY_Cap_100_Half); | 772 | auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_100HALF); |
803 | 773 | ||
804 | /* This tweak comes straight from Realtek's driver. */ | 774 | /* This tweak comes straight from Realtek's driver. */ |
805 | if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) && | 775 | if ((speed == SPEED_100) && (duplex == DUPLEX_HALF) && |
806 | (tp->mac_version == RTL_GIGA_MAC_VER_13)) { | 776 | (tp->mac_version == RTL_GIGA_MAC_VER_13)) { |
807 | auto_nego = PHY_Cap_100_Half | 0x01; | 777 | auto_nego = ADVERTISE_100HALF | ADVERTISE_CSMA; |
808 | } | 778 | } |
809 | } | 779 | } |
810 | 780 | ||
@@ -812,12 +782,12 @@ static int rtl8169_set_speed_xmii(struct net_device *dev, | |||
812 | if ((tp->mac_version == RTL_GIGA_MAC_VER_13) || | 782 | if ((tp->mac_version == RTL_GIGA_MAC_VER_13) || |
813 | (tp->mac_version == RTL_GIGA_MAC_VER_14) || | 783 | (tp->mac_version == RTL_GIGA_MAC_VER_14) || |
814 | (tp->mac_version == RTL_GIGA_MAC_VER_15)) { | 784 | (tp->mac_version == RTL_GIGA_MAC_VER_15)) { |
815 | if ((giga_ctrl & (PHY_Cap_1000_Full | PHY_Cap_1000_Half)) && | 785 | if ((giga_ctrl & (ADVERTISE_1000FULL | ADVERTISE_1000HALF)) && |
816 | netif_msg_link(tp)) { | 786 | netif_msg_link(tp)) { |
817 | printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", | 787 | printk(KERN_INFO "%s: PHY does not support 1000Mbps.\n", |
818 | dev->name); | 788 | dev->name); |
819 | } | 789 | } |
820 | giga_ctrl &= ~(PHY_Cap_1000_Full | PHY_Cap_1000_Half); | 790 | giga_ctrl &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
821 | } | 791 | } |
822 | 792 | ||
823 | auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | 793 | auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; |
@@ -825,10 +795,9 @@ static int rtl8169_set_speed_xmii(struct net_device *dev, | |||
825 | tp->phy_auto_nego_reg = auto_nego; | 795 | tp->phy_auto_nego_reg = auto_nego; |
826 | tp->phy_1000_ctrl_reg = giga_ctrl; | 796 | tp->phy_1000_ctrl_reg = giga_ctrl; |
827 | 797 | ||
828 | mdio_write(ioaddr, PHY_AUTO_NEGO_REG, auto_nego); | 798 | mdio_write(ioaddr, MII_ADVERTISE, auto_nego); |
829 | mdio_write(ioaddr, PHY_1000_CTRL_REG, giga_ctrl); | 799 | mdio_write(ioaddr, MII_CTRL1000, giga_ctrl); |
830 | mdio_write(ioaddr, PHY_CTRL_REG, PHY_Enable_Auto_Nego | | 800 | mdio_write(ioaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); |
831 | PHY_Restart_Auto_Nego); | ||
832 | return 0; | 801 | return 0; |
833 | } | 802 | } |
834 | 803 | ||
@@ -840,7 +809,7 @@ static int rtl8169_set_speed(struct net_device *dev, | |||
840 | 809 | ||
841 | ret = tp->set_speed(dev, autoneg, speed, duplex); | 810 | ret = tp->set_speed(dev, autoneg, speed, duplex); |
842 | 811 | ||
843 | if (netif_running(dev) && (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)) | 812 | if (netif_running(dev) && (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)) |
844 | mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT); | 813 | mod_timer(&tp->timer, jiffies + RTL8169_PHY_TIMEOUT); |
845 | 814 | ||
846 | return ret; | 815 | return ret; |
@@ -993,15 +962,15 @@ static void rtl8169_gset_xmii(struct net_device *dev, struct ethtool_cmd *cmd) | |||
993 | cmd->autoneg = 1; | 962 | cmd->autoneg = 1; |
994 | cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg; | 963 | cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg; |
995 | 964 | ||
996 | if (tp->phy_auto_nego_reg & PHY_Cap_10_Half) | 965 | if (tp->phy_auto_nego_reg & ADVERTISE_10HALF) |
997 | cmd->advertising |= ADVERTISED_10baseT_Half; | 966 | cmd->advertising |= ADVERTISED_10baseT_Half; |
998 | if (tp->phy_auto_nego_reg & PHY_Cap_10_Full) | 967 | if (tp->phy_auto_nego_reg & ADVERTISE_10FULL) |
999 | cmd->advertising |= ADVERTISED_10baseT_Full; | 968 | cmd->advertising |= ADVERTISED_10baseT_Full; |
1000 | if (tp->phy_auto_nego_reg & PHY_Cap_100_Half) | 969 | if (tp->phy_auto_nego_reg & ADVERTISE_100HALF) |
1001 | cmd->advertising |= ADVERTISED_100baseT_Half; | 970 | cmd->advertising |= ADVERTISED_100baseT_Half; |
1002 | if (tp->phy_auto_nego_reg & PHY_Cap_100_Full) | 971 | if (tp->phy_auto_nego_reg & ADVERTISE_100FULL) |
1003 | cmd->advertising |= ADVERTISED_100baseT_Full; | 972 | cmd->advertising |= ADVERTISED_100baseT_Full; |
1004 | if (tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full) | 973 | if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL) |
1005 | cmd->advertising |= ADVERTISED_1000baseT_Full; | 974 | cmd->advertising |= ADVERTISED_1000baseT_Full; |
1006 | 975 | ||
1007 | status = RTL_R8(PHYstatus); | 976 | status = RTL_R8(PHYstatus); |
@@ -1235,7 +1204,7 @@ static void rtl8169_get_phy_version(struct rtl8169_private *tp, void __iomem *io | |||
1235 | }, *p = phy_info; | 1204 | }, *p = phy_info; |
1236 | u16 reg; | 1205 | u16 reg; |
1237 | 1206 | ||
1238 | reg = mdio_read(ioaddr, 3) & 0xffff; | 1207 | reg = mdio_read(ioaddr, MII_PHYSID2) & 0xffff; |
1239 | while ((reg & p->mask) != p->set) | 1208 | while ((reg & p->mask) != p->set) |
1240 | p++; | 1209 | p++; |
1241 | tp->phy_version = p->phy_version; | 1210 | tp->phy_version = p->phy_version; |
@@ -1355,7 +1324,7 @@ static void rtl8169_phy_timer(unsigned long __opaque) | |||
1355 | assert(tp->mac_version > RTL_GIGA_MAC_VER_01); | 1324 | assert(tp->mac_version > RTL_GIGA_MAC_VER_01); |
1356 | assert(tp->phy_version < RTL_GIGA_PHY_VER_H); | 1325 | assert(tp->phy_version < RTL_GIGA_PHY_VER_H); |
1357 | 1326 | ||
1358 | if (!(tp->phy_1000_ctrl_reg & PHY_Cap_1000_Full)) | 1327 | if (!(tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL)) |
1359 | return; | 1328 | return; |
1360 | 1329 | ||
1361 | spin_lock_irq(&tp->lock); | 1330 | spin_lock_irq(&tp->lock); |
@@ -1663,7 +1632,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1663 | tp->phy_reset_pending = rtl8169_tbi_reset_pending; | 1632 | tp->phy_reset_pending = rtl8169_tbi_reset_pending; |
1664 | tp->link_ok = rtl8169_tbi_link_ok; | 1633 | tp->link_ok = rtl8169_tbi_link_ok; |
1665 | 1634 | ||
1666 | tp->phy_1000_ctrl_reg = PHY_Cap_1000_Full; /* Implied by TBI */ | 1635 | tp->phy_1000_ctrl_reg = ADVERTISE_1000FULL; /* Implied by TBI */ |
1667 | } else { | 1636 | } else { |
1668 | tp->set_speed = rtl8169_set_speed_xmii; | 1637 | tp->set_speed = rtl8169_set_speed_xmii; |
1669 | tp->get_settings = rtl8169_gset_xmii; | 1638 | tp->get_settings = rtl8169_gset_xmii; |