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-rw-r--r--drivers/net/e1000/e1000_main.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index ce1044a80bd2..ad92115f20a0 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -1151,6 +1151,7 @@ e1000_setup_tx_resources(struct e1000_adapter *adapter,
1151 return -ENOMEM; 1151 return -ENOMEM;
1152 } 1152 }
1153 memset(txdr->buffer_info, 0, size); 1153 memset(txdr->buffer_info, 0, size);
1154 memset(&txdr->previous_buffer_info, 0, sizeof(struct e1000_buffer));
1154 1155
1155 /* round up to nearest 4K */ 1156 /* round up to nearest 4K */
1156 1157
@@ -1199,6 +1200,7 @@ setup_tx_desc_die:
1199 1200
1200 txdr->next_to_use = 0; 1201 txdr->next_to_use = 0;
1201 txdr->next_to_clean = 0; 1202 txdr->next_to_clean = 0;
1203 spin_lock_init(&txdr->tx_lock);
1202 1204
1203 return 0; 1205 return 0;
1204} 1206}
@@ -1312,6 +1314,19 @@ e1000_configure_tx(struct e1000_adapter *adapter)
1312 1314
1313 E1000_WRITE_REG(hw, TCTL, tctl); 1315 E1000_WRITE_REG(hw, TCTL, tctl);
1314 1316
1317 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1318 tarc = E1000_READ_REG(hw, TARC0);
1319 tarc |= ((1 << 25) | (1 << 21));
1320 E1000_WRITE_REG(hw, TARC0, tarc);
1321 tarc = E1000_READ_REG(hw, TARC1);
1322 tarc |= (1 << 25);
1323 if (tctl & E1000_TCTL_MULR)
1324 tarc &= ~(1 << 28);
1325 else
1326 tarc |= (1 << 28);
1327 E1000_WRITE_REG(hw, TARC1, tarc);
1328 }
1329
1315 e1000_config_collision_dist(hw); 1330 e1000_config_collision_dist(hw);
1316 1331
1317 /* Setup Transmit Descriptor Settings for eop descriptor */ 1332 /* Setup Transmit Descriptor Settings for eop descriptor */
@@ -1601,6 +1616,14 @@ e1000_configure_rx(struct e1000_adapter *adapter)
1601 1000000000 / (adapter->itr * 256)); 1616 1000000000 / (adapter->itr * 256));
1602 } 1617 }
1603 1618
1619 if (hw->mac_type >= e1000_82571) {
1620 /* Reset delay timers after every interrupt */
1621 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1622 ctrl_ext |= E1000_CTRL_EXT_CANC;
1623 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1624 E1000_WRITE_FLUSH(hw);
1625 }
1626
1604 /* Setup the HW Rx Head and Tail Descriptor Pointers and 1627 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1605 * the Base and Length of the Rx Descriptor Ring */ 1628 * the Base and Length of the Rx Descriptor Ring */
1606 switch (adapter->num_queues) { 1629 switch (adapter->num_queues) {