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-rw-r--r--drivers/net/3c59x.c9
-rw-r--r--drivers/net/Kconfig10
-rw-r--r--drivers/net/Space.c2
-rw-r--r--drivers/net/appletalk/Kconfig2
-rw-r--r--drivers/net/appletalk/cops.c4
-rw-r--r--drivers/net/appletalk/cops_ffdrv.h2
-rw-r--r--drivers/net/appletalk/cops_ltdrv.h2
-rw-r--r--drivers/net/appletalk/ltpc.c2
-rw-r--r--drivers/net/arcnet/capmode.c2
-rw-r--r--drivers/net/gt96100eth.h4
-rw-r--r--drivers/net/hamradio/6pack.c4
-rw-r--r--drivers/net/hamradio/Kconfig4
-rw-r--r--drivers/net/hamradio/baycom_epp.c4
-rw-r--r--drivers/net/hamradio/bpqether.c10
-rw-r--r--drivers/net/hamradio/dmascc.c4
-rw-r--r--drivers/net/hamradio/hdlcdrv.c4
-rw-r--r--drivers/net/hamradio/mkiss.c4
-rw-r--r--drivers/net/hamradio/scc.c5
-rw-r--r--drivers/net/hamradio/yam.c4
-rw-r--r--drivers/net/hp100.c4
-rw-r--r--drivers/net/irda/Kconfig10
-rw-r--r--drivers/net/loopback.c2
-rw-r--r--drivers/net/mv643xx_eth.c4
-rw-r--r--drivers/net/ppp_deflate.c6
-rw-r--r--drivers/net/ppp_generic.c12
-rw-r--r--drivers/net/r8169.c2
-rw-r--r--drivers/net/slip.c30
-rw-r--r--drivers/net/sunbmac.c13
-rw-r--r--drivers/net/sunhme.c16
-rw-r--r--drivers/net/sunlance.c17
-rw-r--r--drivers/net/sunqe.c17
-rw-r--r--drivers/net/tg3.c662
-rw-r--r--drivers/net/tg3.h25
-rw-r--r--drivers/net/wan/Kconfig6
-rw-r--r--drivers/net/wan/cycx_x25.c8
-rw-r--r--drivers/net/wan/pc300_drv.c22
-rw-r--r--drivers/net/wan/pc300_tty.c27
-rw-r--r--drivers/net/wan/sdla_chdlc.c13
-rw-r--r--drivers/net/wan/x25_asy.c20
39 files changed, 680 insertions, 318 deletions
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index 43e2ac532f82..b5e076043431 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -1581,7 +1581,8 @@ vortex_up(struct net_device *dev)
1581 1581
1582 if (VORTEX_PCI(vp)) { 1582 if (VORTEX_PCI(vp)) {
1583 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */ 1583 pci_set_power_state(VORTEX_PCI(vp), PCI_D0); /* Go active */
1584 pci_restore_state(VORTEX_PCI(vp)); 1584 if (vp->pm_state_valid)
1585 pci_restore_state(VORTEX_PCI(vp));
1585 pci_enable_device(VORTEX_PCI(vp)); 1586 pci_enable_device(VORTEX_PCI(vp));
1586 } 1587 }
1587 1588
@@ -2741,6 +2742,7 @@ vortex_down(struct net_device *dev, int final_down)
2741 outl(0, ioaddr + DownListPtr); 2742 outl(0, ioaddr + DownListPtr);
2742 2743
2743 if (final_down && VORTEX_PCI(vp)) { 2744 if (final_down && VORTEX_PCI(vp)) {
2745 vp->pm_state_valid = 1;
2744 pci_save_state(VORTEX_PCI(vp)); 2746 pci_save_state(VORTEX_PCI(vp));
2745 acpi_set_WOL(dev); 2747 acpi_set_WOL(dev);
2746 } 2748 }
@@ -3243,9 +3245,10 @@ static void acpi_set_WOL(struct net_device *dev)
3243 outw(RxEnable, ioaddr + EL3_CMD); 3245 outw(RxEnable, ioaddr + EL3_CMD);
3244 3246
3245 pci_enable_wake(VORTEX_PCI(vp), 0, 1); 3247 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3248
3249 /* Change the power state to D3; RxEnable doesn't take effect. */
3250 pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
3246 } 3251 }
3247 /* Change the power state to D3; RxEnable doesn't take effect. */
3248 pci_set_power_state(VORTEX_PCI(vp), PCI_D3hot);
3249} 3252}
3250 3253
3251 3254
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 68242bda4b9c..3a0a55b62aaf 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -589,7 +589,7 @@ config EL2
589 589
590config ELPLUS 590config ELPLUS
591 tristate "3c505 \"EtherLink Plus\" support" 591 tristate "3c505 \"EtherLink Plus\" support"
592 depends on NET_VENDOR_3COM && ISA 592 depends on NET_VENDOR_3COM && ISA && ISA_DMA_API
593 ---help--- 593 ---help---
594 Information about this network (Ethernet) card can be found in 594 Information about this network (Ethernet) card can be found in
595 <file:Documentation/networking/3c505.txt>. If you have a card of 595 <file:Documentation/networking/3c505.txt>. If you have a card of
@@ -630,7 +630,7 @@ config EL3
630 630
631config 3C515 631config 3C515
632 tristate "3c515 ISA \"Fast EtherLink\"" 632 tristate "3c515 ISA \"Fast EtherLink\""
633 depends on NET_VENDOR_3COM && (ISA || EISA) 633 depends on NET_VENDOR_3COM && (ISA || EISA) && ISA_DMA_API
634 help 634 help
635 If you have a 3Com ISA EtherLink XL "Corkscrew" 3c515 Fast Ethernet 635 If you have a 3Com ISA EtherLink XL "Corkscrew" 3c515 Fast Ethernet
636 network card, say Y and read the Ethernet-HOWTO, available from 636 network card, say Y and read the Ethernet-HOWTO, available from
@@ -708,7 +708,7 @@ config TYPHOON
708 708
709config LANCE 709config LANCE
710 tristate "AMD LANCE and PCnet (AT1500 and NE2100) support" 710 tristate "AMD LANCE and PCnet (AT1500 and NE2100) support"
711 depends on NET_ETHERNET && ISA 711 depends on NET_ETHERNET && ISA && ISA_DMA_API
712 help 712 help
713 If you have a network (Ethernet) card of this type, say Y and read 713 If you have a network (Ethernet) card of this type, say Y and read
714 the Ethernet-HOWTO, available from 714 the Ethernet-HOWTO, available from
@@ -864,7 +864,7 @@ config NI52
864 864
865config NI65 865config NI65
866 tristate "NI6510 support" 866 tristate "NI6510 support"
867 depends on NET_VENDOR_RACAL && ISA 867 depends on NET_VENDOR_RACAL && ISA && ISA_DMA_API
868 help 868 help
869 If you have a network (Ethernet) card of this type, say Y and read 869 If you have a network (Ethernet) card of this type, say Y and read
870 the Ethernet-HOWTO, available from 870 the Ethernet-HOWTO, available from
@@ -1072,7 +1072,7 @@ config NE2000
1072 1072
1073config ZNET 1073config ZNET
1074 tristate "Zenith Z-Note support (EXPERIMENTAL)" 1074 tristate "Zenith Z-Note support (EXPERIMENTAL)"
1075 depends on NET_ISA && EXPERIMENTAL 1075 depends on NET_ISA && EXPERIMENTAL && ISA_DMA_API
1076 help 1076 help
1077 The Zenith Z-Note notebook computer has a built-in network 1077 The Zenith Z-Note notebook computer has a built-in network
1078 (Ethernet) card, and this is the Linux driver for it. Note that the 1078 (Ethernet) card, and this is the Linux driver for it. Note that the
diff --git a/drivers/net/Space.c b/drivers/net/Space.c
index fc519377b5aa..fb433325aa27 100644
--- a/drivers/net/Space.c
+++ b/drivers/net/Space.c
@@ -7,7 +7,7 @@
7 * 7 *
8 * Version: @(#)Space.c 1.0.7 08/12/93 8 * Version: @(#)Space.c 1.0.7 08/12/93
9 * 9 *
10 * Authors: Ross Biro, <bir7@leland.Stanford.Edu> 10 * Authors: Ross Biro
11 * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> 11 * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
12 * Donald J. Becker, <becker@scyld.com> 12 * Donald J. Becker, <becker@scyld.com>
13 * 13 *
diff --git a/drivers/net/appletalk/Kconfig b/drivers/net/appletalk/Kconfig
index 60b19679ca5c..69c488d933a2 100644
--- a/drivers/net/appletalk/Kconfig
+++ b/drivers/net/appletalk/Kconfig
@@ -13,7 +13,7 @@ config DEV_APPLETALK
13 13
14config LTPC 14config LTPC
15 tristate "Apple/Farallon LocalTalk PC support" 15 tristate "Apple/Farallon LocalTalk PC support"
16 depends on DEV_APPLETALK && (ISA || EISA) 16 depends on DEV_APPLETALK && (ISA || EISA) && ISA_DMA_API
17 help 17 help
18 This allows you to use the AppleTalk PC card to connect to LocalTalk 18 This allows you to use the AppleTalk PC card to connect to LocalTalk
19 networks. The card is also known as the Farallon PhoneNet PC card. 19 networks. The card is also known as the Farallon PhoneNet PC card.
diff --git a/drivers/net/appletalk/cops.c b/drivers/net/appletalk/cops.c
index 2161c2d585f0..9edaa183227a 100644
--- a/drivers/net/appletalk/cops.c
+++ b/drivers/net/appletalk/cops.c
@@ -65,7 +65,7 @@ static const char *version =
65#include <linux/etherdevice.h> 65#include <linux/etherdevice.h>
66#include <linux/skbuff.h> 66#include <linux/skbuff.h>
67#include <linux/if_arp.h> 67#include <linux/if_arp.h>
68#include <linux/if_ltalk.h> /* For ltalk_setup() */ 68#include <linux/if_ltalk.h>
69#include <linux/delay.h> /* For udelay() */ 69#include <linux/delay.h> /* For udelay() */
70#include <linux/atalk.h> 70#include <linux/atalk.h>
71#include <linux/spinlock.h> 71#include <linux/spinlock.h>
@@ -223,7 +223,7 @@ struct net_device * __init cops_probe(int unit)
223 int base_addr; 223 int base_addr;
224 int err = 0; 224 int err = 0;
225 225
226 dev = alloc_netdev(sizeof(struct cops_local), "lt%d", ltalk_setup); 226 dev = alloc_ltalkdev(sizeof(struct cops_local));
227 if (!dev) 227 if (!dev)
228 return ERR_PTR(-ENOMEM); 228 return ERR_PTR(-ENOMEM);
229 229
diff --git a/drivers/net/appletalk/cops_ffdrv.h b/drivers/net/appletalk/cops_ffdrv.h
index 4131b4a7a65b..31cf8c9c947f 100644
--- a/drivers/net/appletalk/cops_ffdrv.h
+++ b/drivers/net/appletalk/cops_ffdrv.h
@@ -28,7 +28,7 @@
28 28
29#ifdef CONFIG_COPS_DAYNA 29#ifdef CONFIG_COPS_DAYNA
30 30
31unsigned char ffdrv_code[] = { 31static const unsigned char ffdrv_code[] = {
32 58,3,0,50,228,149,33,255,255,34,226,149, 32 58,3,0,50,228,149,33,255,255,34,226,149,
33 249,17,40,152,33,202,154,183,237,82,77,68, 33 249,17,40,152,33,202,154,183,237,82,77,68,
34 11,107,98,19,54,0,237,176,175,50,80,0, 34 11,107,98,19,54,0,237,176,175,50,80,0,
diff --git a/drivers/net/appletalk/cops_ltdrv.h b/drivers/net/appletalk/cops_ltdrv.h
index 05de66dd9206..4afb8e18ba65 100644
--- a/drivers/net/appletalk/cops_ltdrv.h
+++ b/drivers/net/appletalk/cops_ltdrv.h
@@ -27,7 +27,7 @@
27 27
28#ifdef CONFIG_COPS_TANGENT 28#ifdef CONFIG_COPS_TANGENT
29 29
30unsigned char ltdrv_code[] = { 30static const unsigned char ltdrv_code[] = {
31 58,3,0,50,148,10,33,143,15,62,85,119, 31 58,3,0,50,148,10,33,143,15,62,85,119,
32 190,32,9,62,170,119,190,32,3,35,24,241, 32 190,32,9,62,170,119,190,32,3,35,24,241,
33 34,146,10,249,17,150,10,33,143,15,183,237, 33 34,146,10,249,17,150,10,33,143,15,183,237,
diff --git a/drivers/net/appletalk/ltpc.c b/drivers/net/appletalk/ltpc.c
index ad8e943231a1..db4f369637b6 100644
--- a/drivers/net/appletalk/ltpc.c
+++ b/drivers/net/appletalk/ltpc.c
@@ -1039,7 +1039,7 @@ struct net_device * __init ltpc_probe(void)
1039 unsigned long f; 1039 unsigned long f;
1040 unsigned long timeout; 1040 unsigned long timeout;
1041 1041
1042 dev = alloc_netdev(sizeof(struct ltpc_private), "lt%d", ltalk_setup); 1042 dev = alloc_ltalkdev(sizeof(struct ltpc_private));
1043 if (!dev) 1043 if (!dev)
1044 goto out; 1044 goto out;
1045 1045
diff --git a/drivers/net/arcnet/capmode.c b/drivers/net/arcnet/capmode.c
index 16e155b04129..66485585ab39 100644
--- a/drivers/net/arcnet/capmode.c
+++ b/drivers/net/arcnet/capmode.c
@@ -48,7 +48,7 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
48static int ack_tx(struct net_device *dev, int acked); 48static int ack_tx(struct net_device *dev, int acked);
49 49
50 50
51struct ArcProto capmode_proto = 51static struct ArcProto capmode_proto =
52{ 52{
53 'r', 53 'r',
54 XMTU, 54 XMTU,
diff --git a/drivers/net/gt96100eth.h b/drivers/net/gt96100eth.h
index 2f4bfd4dacbe..395869c5ed3e 100644
--- a/drivers/net/gt96100eth.h
+++ b/drivers/net/gt96100eth.h
@@ -214,7 +214,7 @@ typedef struct {
214 u32 cmdstat; 214 u32 cmdstat;
215 u32 next; 215 u32 next;
216 u32 buff_ptr; 216 u32 buff_ptr;
217} gt96100_td_t __attribute__ ((packed)); 217} __attribute__ ((packed)) gt96100_td_t;
218 218
219typedef struct { 219typedef struct {
220#ifdef DESC_BE 220#ifdef DESC_BE
@@ -227,7 +227,7 @@ typedef struct {
227 u32 cmdstat; 227 u32 cmdstat;
228 u32 next; 228 u32 next;
229 u32 buff_ptr; 229 u32 buff_ptr;
230} gt96100_rd_t __attribute__ ((packed)); 230} __attribute__ ((packed)) gt96100_rd_t;
231 231
232 232
233/* Values for the Tx command-status descriptor entry. */ 233/* Values for the Tx command-status descriptor entry. */
diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c
index 067b353e1cbd..89454915b857 100644
--- a/drivers/net/hamradio/6pack.c
+++ b/drivers/net/hamradio/6pack.c
@@ -394,13 +394,11 @@ static void sp_bump(struct sixpack *sp, char cmd)
394 if ((skb = dev_alloc_skb(count)) == NULL) 394 if ((skb = dev_alloc_skb(count)) == NULL)
395 goto out_mem; 395 goto out_mem;
396 396
397 skb->dev = sp->dev;
398 ptr = skb_put(skb, count); 397 ptr = skb_put(skb, count);
399 *ptr++ = cmd; /* KISS command */ 398 *ptr++ = cmd; /* KISS command */
400 399
401 memcpy(ptr, sp->cooked_buf + 1, count); 400 memcpy(ptr, sp->cooked_buf + 1, count);
402 skb->mac.raw = skb->data; 401 skb->protocol = ax25_type_trans(skb, sp->dev);
403 skb->protocol = htons(ETH_P_AX25);
404 netif_rx(skb); 402 netif_rx(skb);
405 sp->dev->last_rx = jiffies; 403 sp->dev->last_rx = jiffies;
406 sp->stats.rx_packets++; 404 sp->stats.rx_packets++;
diff --git a/drivers/net/hamradio/Kconfig b/drivers/net/hamradio/Kconfig
index 34068f81d45e..7cdebe1a0b61 100644
--- a/drivers/net/hamradio/Kconfig
+++ b/drivers/net/hamradio/Kconfig
@@ -45,7 +45,7 @@ config BPQETHER
45 45
46config DMASCC 46config DMASCC
47 tristate "High-speed (DMA) SCC driver for AX.25" 47 tristate "High-speed (DMA) SCC driver for AX.25"
48 depends on ISA && AX25 && BROKEN_ON_SMP 48 depends on ISA && AX25 && BROKEN_ON_SMP && ISA_DMA_API
49 ---help--- 49 ---help---
50 This is a driver for high-speed SCC boards, i.e. those supporting 50 This is a driver for high-speed SCC boards, i.e. those supporting
51 DMA on one port. You usually use those boards to connect your 51 DMA on one port. You usually use those boards to connect your
@@ -78,7 +78,7 @@ config DMASCC
78 78
79config SCC 79config SCC
80 tristate "Z8530 SCC driver" 80 tristate "Z8530 SCC driver"
81 depends on ISA && AX25 81 depends on ISA && AX25 && ISA_DMA_API
82 ---help--- 82 ---help---
83 These cards are used to connect your Linux box to an amateur radio 83 These cards are used to connect your Linux box to an amateur radio
84 in order to communicate with other computers. If you want to use 84 in order to communicate with other computers. If you want to use
diff --git a/drivers/net/hamradio/baycom_epp.c b/drivers/net/hamradio/baycom_epp.c
index e8cb87d906fc..1c563f905a59 100644
--- a/drivers/net/hamradio/baycom_epp.c
+++ b/drivers/net/hamradio/baycom_epp.c
@@ -601,12 +601,10 @@ static void do_rxpacket(struct net_device *dev)
601 bc->stats.rx_dropped++; 601 bc->stats.rx_dropped++;
602 return; 602 return;
603 } 603 }
604 skb->dev = dev;
605 cp = skb_put(skb, pktlen); 604 cp = skb_put(skb, pktlen);
606 *cp++ = 0; /* KISS kludge */ 605 *cp++ = 0; /* KISS kludge */
607 memcpy(cp, bc->hdlcrx.buf, pktlen - 1); 606 memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
608 skb->protocol = htons(ETH_P_AX25); 607 skb->protocol = ax25_type_trans(skb, dev);
609 skb->mac.raw = skb->data;
610 netif_rx(skb); 608 netif_rx(skb);
611 dev->last_rx = jiffies; 609 dev->last_rx = jiffies;
612 bc->stats.rx_packets++; 610 bc->stats.rx_packets++;
diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c
index ef1a359e2273..ba9f0580e1f9 100644
--- a/drivers/net/hamradio/bpqether.c
+++ b/drivers/net/hamradio/bpqether.c
@@ -211,11 +211,7 @@ static int bpq_rcv(struct sk_buff *skb, struct net_device *dev, struct packet_ty
211 ptr = skb_push(skb, 1); 211 ptr = skb_push(skb, 1);
212 *ptr = 0; 212 *ptr = 0;
213 213
214 skb->dev = dev; 214 skb->protocol = ax25_type_trans(skb, dev);
215 skb->protocol = htons(ETH_P_AX25);
216 skb->mac.raw = skb->data;
217 skb->pkt_type = PACKET_HOST;
218
219 netif_rx(skb); 215 netif_rx(skb);
220 dev->last_rx = jiffies; 216 dev->last_rx = jiffies;
221unlock: 217unlock:
@@ -272,8 +268,6 @@ static int bpq_xmit(struct sk_buff *skb, struct net_device *dev)
272 skb = newskb; 268 skb = newskb;
273 } 269 }
274 270
275 skb->protocol = htons(ETH_P_AX25);
276
277 ptr = skb_push(skb, 2); 271 ptr = skb_push(skb, 2);
278 272
279 *ptr++ = (size + 5) % 256; 273 *ptr++ = (size + 5) % 256;
@@ -287,7 +281,7 @@ static int bpq_xmit(struct sk_buff *skb, struct net_device *dev)
287 return -ENODEV; 281 return -ENODEV;
288 } 282 }
289 283
290 skb->dev = dev; 284 skb->protocol = ax25_type_trans(skb, dev);
291 skb->nh.raw = skb->data; 285 skb->nh.raw = skb->data;
292 dev->hard_header(skb, dev, ETH_P_BPQ, bpq->dest_addr, NULL, 0); 286 dev->hard_header(skb, dev, ETH_P_BPQ, bpq->dest_addr, NULL, 0);
293 bpq->stats.tx_packets++; 287 bpq->stats.tx_packets++;
diff --git a/drivers/net/hamradio/dmascc.c b/drivers/net/hamradio/dmascc.c
index f3269b70a8c5..f515245a3fd0 100644
--- a/drivers/net/hamradio/dmascc.c
+++ b/drivers/net/hamradio/dmascc.c
@@ -1306,9 +1306,7 @@ static void rx_bh(void *arg)
1306 data = skb_put(skb, cb + 1); 1306 data = skb_put(skb, cb + 1);
1307 data[0] = 0; 1307 data[0] = 0;
1308 memcpy(&data[1], priv->rx_buf[i], cb); 1308 memcpy(&data[1], priv->rx_buf[i], cb);
1309 skb->dev = priv->dev; 1309 skb->protocol = ax25_type_trans(skb, priv->dev);
1310 skb->protocol = ntohs(ETH_P_AX25);
1311 skb->mac.raw = skb->data;
1312 netif_rx(skb); 1310 netif_rx(skb);
1313 priv->dev->last_rx = jiffies; 1311 priv->dev->last_rx = jiffies;
1314 priv->stats.rx_packets++; 1312 priv->stats.rx_packets++;
diff --git a/drivers/net/hamradio/hdlcdrv.c b/drivers/net/hamradio/hdlcdrv.c
index b89959a596d7..b4c836e4fe86 100644
--- a/drivers/net/hamradio/hdlcdrv.c
+++ b/drivers/net/hamradio/hdlcdrv.c
@@ -174,12 +174,10 @@ static void hdlc_rx_flag(struct net_device *dev, struct hdlcdrv_state *s)
174 s->stats.rx_dropped++; 174 s->stats.rx_dropped++;
175 return; 175 return;
176 } 176 }
177 skb->dev = dev;
178 cp = skb_put(skb, pkt_len); 177 cp = skb_put(skb, pkt_len);
179 *cp++ = 0; /* KISS kludge */ 178 *cp++ = 0; /* KISS kludge */
180 memcpy(cp, s->hdlcrx.buffer, pkt_len - 1); 179 memcpy(cp, s->hdlcrx.buffer, pkt_len - 1);
181 skb->protocol = htons(ETH_P_AX25); 180 skb->protocol = ax25_type_trans(skb, dev);
182 skb->mac.raw = skb->data;
183 netif_rx(skb); 181 netif_rx(skb);
184 dev->last_rx = jiffies; 182 dev->last_rx = jiffies;
185 s->stats.rx_packets++; 183 s->stats.rx_packets++;
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c
index d9ea080aea0f..62790511098f 100644
--- a/drivers/net/hamradio/mkiss.c
+++ b/drivers/net/hamradio/mkiss.c
@@ -332,12 +332,10 @@ static void ax_bump(struct ax_disp *ax)
332 return; 332 return;
333 } 333 }
334 334
335 skb->dev = ax->dev;
336 spin_lock_bh(&ax->buflock); 335 spin_lock_bh(&ax->buflock);
337 memcpy(skb_put(skb,count), ax->rbuff, count); 336 memcpy(skb_put(skb,count), ax->rbuff, count);
338 spin_unlock_bh(&ax->buflock); 337 spin_unlock_bh(&ax->buflock);
339 skb->mac.raw = skb->data; 338 skb->protocol = ax25_type_trans(skb, ax->dev);
340 skb->protocol = htons(ETH_P_AX25);
341 netif_rx(skb); 339 netif_rx(skb);
342 ax->dev->last_rx = jiffies; 340 ax->dev->last_rx = jiffies;
343 ax->rx_packets++; 341 ax->rx_packets++;
diff --git a/drivers/net/hamradio/scc.c b/drivers/net/hamradio/scc.c
index ce9e7af020da..ece1b1a13186 100644
--- a/drivers/net/hamradio/scc.c
+++ b/drivers/net/hamradio/scc.c
@@ -1630,10 +1630,7 @@ static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb)
1630 scc->dev_stat.rx_packets++; 1630 scc->dev_stat.rx_packets++;
1631 scc->dev_stat.rx_bytes += skb->len; 1631 scc->dev_stat.rx_bytes += skb->len;
1632 1632
1633 skb->dev = scc->dev; 1633 skb->protocol = ax25_type_trans(skb, scc->dev);
1634 skb->protocol = htons(ETH_P_AX25);
1635 skb->mac.raw = skb->data;
1636 skb->pkt_type = PACKET_HOST;
1637 1634
1638 netif_rx(skb); 1635 netif_rx(skb);
1639 scc->dev->last_rx = jiffies; 1636 scc->dev->last_rx = jiffies;
diff --git a/drivers/net/hamradio/yam.c b/drivers/net/hamradio/yam.c
index fd7b00fe38e5..41213ef602dc 100644
--- a/drivers/net/hamradio/yam.c
+++ b/drivers/net/hamradio/yam.c
@@ -522,12 +522,10 @@ static inline void yam_rx_flag(struct net_device *dev, struct yam_port *yp)
522 ++yp->stats.rx_dropped; 522 ++yp->stats.rx_dropped;
523 } else { 523 } else {
524 unsigned char *cp; 524 unsigned char *cp;
525 skb->dev = dev;
526 cp = skb_put(skb, pkt_len); 525 cp = skb_put(skb, pkt_len);
527 *cp++ = 0; /* KISS kludge */ 526 *cp++ = 0; /* KISS kludge */
528 memcpy(cp, yp->rx_buf, pkt_len - 1); 527 memcpy(cp, yp->rx_buf, pkt_len - 1);
529 skb->protocol = htons(ETH_P_AX25); 528 skb->protocol = ax25_type_trans(skb, dev);
530 skb->mac.raw = skb->data;
531 netif_rx(skb); 529 netif_rx(skb);
532 dev->last_rx = jiffies; 530 dev->last_rx = jiffies;
533 ++yp->stats.rx_packets; 531 ++yp->stats.rx_packets;
diff --git a/drivers/net/hp100.c b/drivers/net/hp100.c
index acb170152bbd..b3a898c5a585 100644
--- a/drivers/net/hp100.c
+++ b/drivers/net/hp100.c
@@ -13,8 +13,8 @@
13** This driver has only been tested with 13** This driver has only been tested with
14** -- HP J2585B 10/100 Mbit/s PCI Busmaster 14** -- HP J2585B 10/100 Mbit/s PCI Busmaster
15** -- HP J2585A 10/100 Mbit/s PCI 15** -- HP J2585A 10/100 Mbit/s PCI
16** -- HP J2970 10 Mbit/s PCI Combo 10base-T/BNC 16** -- HP J2970A 10 Mbit/s PCI Combo 10base-T/BNC
17** -- HP J2973 10 Mbit/s PCI 10base-T 17** -- HP J2973A 10 Mbit/s PCI 10base-T
18** -- HP J2573 10/100 ISA 18** -- HP J2573 10/100 ISA
19** -- Compex ReadyLink ENET100-VG4 10/100 Mbit/s PCI / EISA 19** -- Compex ReadyLink ENET100-VG4 10/100 Mbit/s PCI / EISA
20** -- Compex FreedomLine 100/VG 10/100 Mbit/s ISA / EISA / PCI 20** -- Compex FreedomLine 100/VG 10/100 Mbit/s ISA / EISA / PCI
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig
index 6bf76a444d48..1c553d7efdd9 100644
--- a/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@ -310,7 +310,7 @@ config SIGMATEL_FIR
310 310
311config NSC_FIR 311config NSC_FIR
312 tristate "NSC PC87108/PC87338" 312 tristate "NSC PC87108/PC87338"
313 depends on IRDA 313 depends on IRDA && ISA_DMA_API
314 help 314 help
315 Say Y here if you want to build support for the NSC PC87108 and 315 Say Y here if you want to build support for the NSC PC87108 and
316 PC87338 IrDA chipsets. This driver supports SIR, 316 PC87338 IrDA chipsets. This driver supports SIR,
@@ -321,7 +321,7 @@ config NSC_FIR
321 321
322config WINBOND_FIR 322config WINBOND_FIR
323 tristate "Winbond W83977AF (IR)" 323 tristate "Winbond W83977AF (IR)"
324 depends on IRDA 324 depends on IRDA && ISA_DMA_API
325 help 325 help
326 Say Y here if you want to build IrDA support for the Winbond 326 Say Y here if you want to build IrDA support for the Winbond
327 W83977AF super-io chipset. This driver should be used for the IrDA 327 W83977AF super-io chipset. This driver should be used for the IrDA
@@ -347,7 +347,7 @@ config AU1000_FIR
347 347
348config SMC_IRCC_FIR 348config SMC_IRCC_FIR
349 tristate "SMSC IrCC (EXPERIMENTAL)" 349 tristate "SMSC IrCC (EXPERIMENTAL)"
350 depends on EXPERIMENTAL && IRDA 350 depends on EXPERIMENTAL && IRDA && ISA_DMA_API
351 help 351 help
352 Say Y here if you want to build support for the SMC Infrared 352 Say Y here if you want to build support for the SMC Infrared
353 Communications Controller. It is used in a wide variety of 353 Communications Controller. It is used in a wide variety of
@@ -357,7 +357,7 @@ config SMC_IRCC_FIR
357 357
358config ALI_FIR 358config ALI_FIR
359 tristate "ALi M5123 FIR (EXPERIMENTAL)" 359 tristate "ALi M5123 FIR (EXPERIMENTAL)"
360 depends on EXPERIMENTAL && IRDA 360 depends on EXPERIMENTAL && IRDA && ISA_DMA_API
361 help 361 help
362 Say Y here if you want to build support for the ALi M5123 FIR 362 Say Y here if you want to build support for the ALi M5123 FIR
363 Controller. The ALi M5123 FIR Controller is embedded in ALi M1543C, 363 Controller. The ALi M5123 FIR Controller is embedded in ALi M1543C,
@@ -385,7 +385,7 @@ config SA1100_FIR
385 385
386config VIA_FIR 386config VIA_FIR
387 tristate "VIA VT8231/VT1211 SIR/MIR/FIR" 387 tristate "VIA VT8231/VT1211 SIR/MIR/FIR"
388 depends on IRDA 388 depends on IRDA && ISA_DMA_API
389 help 389 help
390 Say Y here if you want to build support for the VIA VT8231 390 Say Y here if you want to build support for the VIA VT8231
391 and VIA VT1211 IrDA controllers, found on the motherboards using 391 and VIA VT1211 IrDA controllers, found on the motherboards using
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 2ffc31708d5f..b33111e21313 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -7,7 +7,7 @@
7 * 7 *
8 * Version: @(#)loopback.c 1.0.4b 08/16/93 8 * Version: @(#)loopback.c 1.0.4b 08/16/93
9 * 9 *
10 * Authors: Ross Biro, <bir7@leland.Stanford.Edu> 10 * Authors: Ross Biro
11 * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG> 11 * Fred N. van Kempen, <waltje@uWalt.NL.Mugnet.ORG>
12 * Donald Becker, <becker@scyld.com> 12 * Donald Becker, <becker@scyld.com>
13 * 13 *
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 7e94d455533c..0405e1f0d3df 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -99,7 +99,7 @@ static spinlock_t mv643xx_eth_phy_lock = SPIN_LOCK_UNLOCKED;
99 99
100static inline u32 mv_read(int offset) 100static inline u32 mv_read(int offset)
101{ 101{
102 void *__iomem reg_base; 102 void __iomem *reg_base;
103 103
104 reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS; 104 reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS;
105 105
@@ -108,7 +108,7 @@ static inline u32 mv_read(int offset)
108 108
109static inline void mv_write(int offset, u32 data) 109static inline void mv_write(int offset, u32 data)
110{ 110{
111 void * __iomem reg_base; 111 void __iomem *reg_base;
112 112
113 reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS; 113 reg_base = mv643xx_eth_shared_base - MV643XX_ETH_SHARED_REGS;
114 writel(data, reg_base + offset); 114 writel(data, reg_base + offset);
diff --git a/drivers/net/ppp_deflate.c b/drivers/net/ppp_deflate.c
index 507d6328d4eb..3872088fdd10 100644
--- a/drivers/net/ppp_deflate.c
+++ b/drivers/net/ppp_deflate.c
@@ -87,8 +87,7 @@ static void z_comp_free(void *arg)
87 87
88 if (state) { 88 if (state) {
89 zlib_deflateEnd(&state->strm); 89 zlib_deflateEnd(&state->strm);
90 if (state->strm.workspace) 90 vfree(state->strm.workspace);
91 vfree(state->strm.workspace);
92 kfree(state); 91 kfree(state);
93 } 92 }
94} 93}
@@ -308,8 +307,7 @@ static void z_decomp_free(void *arg)
308 307
309 if (state) { 308 if (state) {
310 zlib_inflateEnd(&state->strm); 309 zlib_inflateEnd(&state->strm);
311 if (state->strm.workspace) 310 kfree(state->strm.workspace);
312 kfree(state->strm.workspace);
313 kfree(state); 311 kfree(state);
314 } 312 }
315} 313}
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index c456dc81b873..3b377f6cd4a0 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -2467,14 +2467,10 @@ static void ppp_destroy_interface(struct ppp *ppp)
2467 skb_queue_purge(&ppp->mrq); 2467 skb_queue_purge(&ppp->mrq);
2468#endif /* CONFIG_PPP_MULTILINK */ 2468#endif /* CONFIG_PPP_MULTILINK */
2469#ifdef CONFIG_PPP_FILTER 2469#ifdef CONFIG_PPP_FILTER
2470 if (ppp->pass_filter) { 2470 kfree(ppp->pass_filter);
2471 kfree(ppp->pass_filter); 2471 ppp->pass_filter = NULL;
2472 ppp->pass_filter = NULL; 2472 kfree(ppp->active_filter);
2473 } 2473 ppp->active_filter = NULL;
2474 if (ppp->active_filter) {
2475 kfree(ppp->active_filter);
2476 ppp->active_filter = NULL;
2477 }
2478#endif /* CONFIG_PPP_FILTER */ 2474#endif /* CONFIG_PPP_FILTER */
2479 2475
2480 kfree(ppp); 2476 kfree(ppp);
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 07e2df09491f..c59507f8a76b 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -2385,7 +2385,7 @@ core_down:
2385 } 2385 }
2386 2386
2387 /* Give a racing hard_start_xmit a few cycles to complete. */ 2387 /* Give a racing hard_start_xmit a few cycles to complete. */
2388 synchronize_kernel(); 2388 synchronize_sched(); /* FIXME: should this be synchronize_irq()? */
2389 2389
2390 /* 2390 /*
2391 * And now for the 50k$ question: are IRQ disabled or not ? 2391 * And now for the 50k$ question: are IRQ disabled or not ?
diff --git a/drivers/net/slip.c b/drivers/net/slip.c
index 4ce52f5f2419..8f7841c0374d 100644
--- a/drivers/net/slip.c
+++ b/drivers/net/slip.c
@@ -185,15 +185,12 @@ sl_alloc_bufs(struct slip *sl, int mtu)
185 /* Cleanup */ 185 /* Cleanup */
186err_exit: 186err_exit:
187#ifdef SL_INCLUDE_CSLIP 187#ifdef SL_INCLUDE_CSLIP
188 if (cbuff) 188 kfree(cbuff);
189 kfree(cbuff);
190 if (slcomp) 189 if (slcomp)
191 slhc_free(slcomp); 190 slhc_free(slcomp);
192#endif 191#endif
193 if (xbuff) 192 kfree(xbuff);
194 kfree(xbuff); 193 kfree(rbuff);
195 if (rbuff)
196 kfree(rbuff);
197 return err; 194 return err;
198} 195}
199 196
@@ -204,13 +201,13 @@ sl_free_bufs(struct slip *sl)
204 void * tmp; 201 void * tmp;
205 202
206 /* Free all SLIP frame buffers. */ 203 /* Free all SLIP frame buffers. */
207 if ((tmp = xchg(&sl->rbuff, NULL)) != NULL) 204 tmp = xchg(&sl->rbuff, NULL);
208 kfree(tmp); 205 kfree(tmp);
209 if ((tmp = xchg(&sl->xbuff, NULL)) != NULL) 206 tmp = xchg(&sl->xbuff, NULL);
210 kfree(tmp); 207 kfree(tmp);
211#ifdef SL_INCLUDE_CSLIP 208#ifdef SL_INCLUDE_CSLIP
212 if ((tmp = xchg(&sl->cbuff, NULL)) != NULL) 209 tmp = xchg(&sl->cbuff, NULL);
213 kfree(tmp); 210 kfree(tmp);
214 if ((tmp = xchg(&sl->slcomp, NULL)) != NULL) 211 if ((tmp = xchg(&sl->slcomp, NULL)) != NULL)
215 slhc_free(tmp); 212 slhc_free(tmp);
216#endif 213#endif
@@ -297,13 +294,10 @@ done_on_bh:
297 spin_unlock_bh(&sl->lock); 294 spin_unlock_bh(&sl->lock);
298 295
299done: 296done:
300 if (xbuff) 297 kfree(xbuff);
301 kfree(xbuff); 298 kfree(rbuff);
302 if (rbuff)
303 kfree(rbuff);
304#ifdef SL_INCLUDE_CSLIP 299#ifdef SL_INCLUDE_CSLIP
305 if (cbuff) 300 kfree(cbuff);
306 kfree(cbuff);
307#endif 301#endif
308 return err; 302 return err;
309} 303}
diff --git a/drivers/net/sunbmac.c b/drivers/net/sunbmac.c
index 025dcd867eaa..f88f5e32b714 100644
--- a/drivers/net/sunbmac.c
+++ b/drivers/net/sunbmac.c
@@ -37,8 +37,18 @@
37 37
38#include "sunbmac.h" 38#include "sunbmac.h"
39 39
40#define DRV_NAME "sunbmac"
41#define DRV_VERSION "2.0"
42#define DRV_RELDATE "11/24/03"
43#define DRV_AUTHOR "David S. Miller (davem@redhat.com)"
44
40static char version[] __initdata = 45static char version[] __initdata =
41 "sunbmac.c:v2.0 24/Nov/03 David S. Miller (davem@redhat.com)\n"; 46 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
47
48MODULE_VERSION(DRV_VERSION);
49MODULE_AUTHOR(DRV_AUTHOR);
50MODULE_DESCRIPTION("Sun BigMAC 100baseT ethernet driver");
51MODULE_LICENSE("GPL");
42 52
43#undef DEBUG_PROBE 53#undef DEBUG_PROBE
44#undef DEBUG_TX 54#undef DEBUG_TX
@@ -1321,4 +1331,3 @@ static void __exit bigmac_cleanup(void)
1321 1331
1322module_init(bigmac_probe); 1332module_init(bigmac_probe);
1323module_exit(bigmac_cleanup); 1333module_exit(bigmac_cleanup);
1324MODULE_LICENSE("GPL");
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c
index d837b3c35723..f02fe4119b2c 100644
--- a/drivers/net/sunhme.c
+++ b/drivers/net/sunhme.c
@@ -13,9 +13,6 @@
13 * argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50 13 * argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
14 */ 14 */
15 15
16static char version[] =
17 "sunhme.c:v2.02 24/Aug/2003 David S. Miller (davem@redhat.com)\n";
18
19#include <linux/config.h> 16#include <linux/config.h>
20#include <linux/module.h> 17#include <linux/module.h>
21#include <linux/kernel.h> 18#include <linux/kernel.h>
@@ -67,15 +64,24 @@ static char version[] =
67 64
68#include "sunhme.h" 65#include "sunhme.h"
69 66
67#define DRV_NAME "sunhme"
68#define DRV_VERSION "2.02"
69#define DRV_RELDATE "8/24/03"
70#define DRV_AUTHOR "David S. Miller (davem@redhat.com)"
71
72static char version[] =
73 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
70 74
71#define DRV_NAME "sunhme" 75MODULE_VERSION(DRV_VERSION);
76MODULE_AUTHOR(DRV_AUTHOR);
77MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
78MODULE_LICENSE("GPL");
72 79
73static int macaddr[6]; 80static int macaddr[6];
74 81
75/* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */ 82/* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
76module_param_array(macaddr, int, NULL, 0); 83module_param_array(macaddr, int, NULL, 0);
77MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set"); 84MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
78MODULE_LICENSE("GPL");
79 85
80static struct happy_meal *root_happy_dev; 86static struct happy_meal *root_happy_dev;
81 87
diff --git a/drivers/net/sunlance.c b/drivers/net/sunlance.c
index 62d464c7ef51..b7d87d4690b4 100644
--- a/drivers/net/sunlance.c
+++ b/drivers/net/sunlance.c
@@ -69,9 +69,6 @@
69 69
70#undef DEBUG_DRIVER 70#undef DEBUG_DRIVER
71 71
72static char version[] =
73 "sunlance.c:v2.02 24/Aug/03 Miguel de Icaza (miguel@nuclecu.unam.mx)\n";
74
75static char lancestr[] = "LANCE"; 72static char lancestr[] = "LANCE";
76 73
77#include <linux/config.h> 74#include <linux/config.h>
@@ -108,6 +105,19 @@ static char lancestr[] = "LANCE";
108#include <asm/auxio.h> /* For tpe-link-test? setting */ 105#include <asm/auxio.h> /* For tpe-link-test? setting */
109#include <asm/irq.h> 106#include <asm/irq.h>
110 107
108#define DRV_NAME "sunlance"
109#define DRV_VERSION "2.02"
110#define DRV_RELDATE "8/24/03"
111#define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
112
113static char version[] =
114 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
115
116MODULE_VERSION(DRV_VERSION);
117MODULE_AUTHOR(DRV_AUTHOR);
118MODULE_DESCRIPTION("Sun Lance ethernet driver");
119MODULE_LICENSE("GPL");
120
111/* Define: 2^4 Tx buffers and 2^4 Rx buffers */ 121/* Define: 2^4 Tx buffers and 2^4 Rx buffers */
112#ifndef LANCE_LOG_TX_BUFFERS 122#ifndef LANCE_LOG_TX_BUFFERS
113#define LANCE_LOG_TX_BUFFERS 4 123#define LANCE_LOG_TX_BUFFERS 4
@@ -1611,4 +1621,3 @@ static void __exit sparc_lance_cleanup(void)
1611 1621
1612module_init(sparc_lance_probe); 1622module_init(sparc_lance_probe);
1613module_exit(sparc_lance_cleanup); 1623module_exit(sparc_lance_cleanup);
1614MODULE_LICENSE("GPL");
diff --git a/drivers/net/sunqe.c b/drivers/net/sunqe.c
index 37ef1b82a6cb..1f2323be60d4 100644
--- a/drivers/net/sunqe.c
+++ b/drivers/net/sunqe.c
@@ -7,9 +7,6 @@
7 * Copyright (C) 1996, 1999, 2003 David S. Miller (davem@redhat.com) 7 * Copyright (C) 1996, 1999, 2003 David S. Miller (davem@redhat.com)
8 */ 8 */
9 9
10static char version[] =
11 "sunqe.c:v3.0 8/24/03 David S. Miller (davem@redhat.com)\n";
12
13#include <linux/module.h> 10#include <linux/module.h>
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
@@ -43,6 +40,19 @@ static char version[] =
43 40
44#include "sunqe.h" 41#include "sunqe.h"
45 42
43#define DRV_NAME "sunqe"
44#define DRV_VERSION "3.0"
45#define DRV_RELDATE "8/24/03"
46#define DRV_AUTHOR "David S. Miller (davem@redhat.com)"
47
48static char version[] =
49 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
50
51MODULE_VERSION(DRV_VERSION);
52MODULE_AUTHOR(DRV_AUTHOR);
53MODULE_DESCRIPTION("Sun QuadEthernet 10baseT SBUS card driver");
54MODULE_LICENSE("GPL");
55
46static struct sunqec *root_qec_dev; 56static struct sunqec *root_qec_dev;
47 57
48static void qe_set_multicast(struct net_device *dev); 58static void qe_set_multicast(struct net_device *dev);
@@ -1040,4 +1050,3 @@ static void __exit qec_cleanup(void)
1040 1050
1041module_init(qec_probe); 1051module_init(qec_probe);
1042module_exit(qec_cleanup); 1052module_exit(qec_cleanup);
1043MODULE_LICENSE("GPL");
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 12de80884b1a..f79b02e80e75 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -61,8 +61,8 @@
61 61
62#define DRV_MODULE_NAME "tg3" 62#define DRV_MODULE_NAME "tg3"
63#define PFX DRV_MODULE_NAME ": " 63#define PFX DRV_MODULE_NAME ": "
64#define DRV_MODULE_VERSION "3.25" 64#define DRV_MODULE_VERSION "3.27"
65#define DRV_MODULE_RELDATE "March 24, 2005" 65#define DRV_MODULE_RELDATE "May 5, 2005"
66 66
67#define TG3_DEF_MAC_MODE 0 67#define TG3_DEF_MAC_MODE 0
68#define TG3_DEF_RX_MODE 0 68#define TG3_DEF_RX_MODE 0
@@ -85,8 +85,7 @@
85/* hardware minimum and maximum for a single frame's data payload */ 85/* hardware minimum and maximum for a single frame's data payload */
86#define TG3_MIN_MTU 60 86#define TG3_MIN_MTU 60
87#define TG3_MAX_MTU(tp) \ 87#define TG3_MAX_MTU(tp) \
88 ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && \ 88 (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ? 9000 : 1500)
89 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750) ? 9000 : 1500)
90 89
91/* These numbers seem to be hard coded in the NIC firmware somehow. 90/* These numbers seem to be hard coded in the NIC firmware somehow.
92 * You can't change the ring sizes, but you can change where you place 91 * You can't change the ring sizes, but you can change where you place
@@ -205,6 +204,8 @@ static struct pci_device_id tg3_pci_tbl[] = {
205 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 204 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
206 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751F, 205 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751F,
207 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 206 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
207 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5752,
208 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
208 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753, 209 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753,
209 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, 210 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL },
210 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753M, 211 { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753M,
@@ -425,9 +426,30 @@ static void tg3_enable_ints(struct tg3 *tp)
425 tg3_cond_int(tp); 426 tg3_cond_int(tp);
426} 427}
427 428
429static inline unsigned int tg3_has_work(struct tg3 *tp)
430{
431 struct tg3_hw_status *sblk = tp->hw_status;
432 unsigned int work_exists = 0;
433
434 /* check for phy events */
435 if (!(tp->tg3_flags &
436 (TG3_FLAG_USE_LINKCHG_REG |
437 TG3_FLAG_POLL_SERDES))) {
438 if (sblk->status & SD_STATUS_LINK_CHG)
439 work_exists = 1;
440 }
441 /* check for RX/TX work to do */
442 if (sblk->idx[0].tx_consumer != tp->tx_cons ||
443 sblk->idx[0].rx_producer != tp->rx_rcb_ptr)
444 work_exists = 1;
445
446 return work_exists;
447}
448
428/* tg3_restart_ints 449/* tg3_restart_ints
429 * similar to tg3_enable_ints, but it can return without flushing the 450 * similar to tg3_enable_ints, but it accurately determines whether there
430 * PIO write which reenables interrupts 451 * is new work pending and can return without flushing the PIO write
452 * which reenables interrupts
431 */ 453 */
432static void tg3_restart_ints(struct tg3 *tp) 454static void tg3_restart_ints(struct tg3 *tp)
433{ 455{
@@ -436,7 +458,9 @@ static void tg3_restart_ints(struct tg3 *tp)
436 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000000); 458 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000000);
437 mmiowb(); 459 mmiowb();
438 460
439 tg3_cond_int(tp); 461 if (tg3_has_work(tp))
462 tw32(HOSTCC_MODE, tp->coalesce_mode |
463 (HOSTCC_MODE_ENABLE | HOSTCC_MODE_NOW));
440} 464}
441 465
442static inline void tg3_netif_stop(struct tg3 *tp) 466static inline void tg3_netif_stop(struct tg3 *tp)
@@ -860,8 +884,7 @@ out:
860 if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { 884 if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
861 /* Cannot do read-modify-write on 5401 */ 885 /* Cannot do read-modify-write on 5401 */
862 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20); 886 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20);
863 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && 887 } else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
864 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750) {
865 u32 phy_reg; 888 u32 phy_reg;
866 889
867 /* Set bit 14 with read-modify-write to preserve other bits */ 890 /* Set bit 14 with read-modify-write to preserve other bits */
@@ -873,8 +896,7 @@ out:
873 /* Set phy register 0x10 bit 0 to high fifo elasticity to support 896 /* Set phy register 0x10 bit 0 to high fifo elasticity to support
874 * jumbo frames transmission. 897 * jumbo frames transmission.
875 */ 898 */
876 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && 899 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) {
877 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750) {
878 u32 phy_reg; 900 u32 phy_reg;
879 901
880 if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg)) 902 if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg))
@@ -1006,8 +1028,13 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1006 pci_write_config_word(tp->pdev, 1028 pci_write_config_word(tp->pdev,
1007 pm + PCI_PM_CTRL, 1029 pm + PCI_PM_CTRL,
1008 power_control); 1030 power_control);
1009 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 1031 udelay(100); /* Delay after power state change */
1010 udelay(100); 1032
1033 /* Switch out of Vaux if it is not a LOM */
1034 if (!(tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT)) {
1035 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
1036 udelay(100);
1037 }
1011 1038
1012 return 0; 1039 return 0;
1013 1040
@@ -1068,7 +1095,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1068 mac_mode = MAC_MODE_PORT_MODE_TBI; 1095 mac_mode = MAC_MODE_PORT_MODE_TBI;
1069 } 1096 }
1070 1097
1071 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750) 1098 if (!(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
1072 tw32(MAC_LED_CTRL, tp->led_ctrl); 1099 tw32(MAC_LED_CTRL, tp->led_ctrl);
1073 1100
1074 if (((power_caps & PCI_PM_CAP_PME_D3cold) && 1101 if (((power_caps & PCI_PM_CAP_PME_D3cold) &&
@@ -1095,7 +1122,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1095 CLOCK_CTRL_ALTCLK | 1122 CLOCK_CTRL_ALTCLK |
1096 CLOCK_CTRL_PWRDOWN_PLL133); 1123 CLOCK_CTRL_PWRDOWN_PLL133);
1097 udelay(40); 1124 udelay(40);
1098 } else if (!((GET_ASIC_REV(tp->pci_chip_rev_id) == 5750) && 1125 } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
1099 (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { 1126 (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) {
1100 u32 newbits1, newbits2; 1127 u32 newbits1, newbits2;
1101 1128
@@ -1152,6 +1179,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state)
1152 1179
1153 /* Finally, set the new power state. */ 1180 /* Finally, set the new power state. */
1154 pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control); 1181 pci_write_config_word(tp->pdev, pm + PCI_PM_CTRL, power_control);
1182 udelay(100); /* Delay after power state change */
1155 1183
1156 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN); 1184 tg3_write_sig_post_reset(tp, RESET_KIND_SHUTDOWN);
1157 1185
@@ -2681,8 +2709,8 @@ static int tg3_vlan_rx(struct tg3 *tp, struct sk_buff *skb, u16 vlan_tag)
2681static int tg3_rx(struct tg3 *tp, int budget) 2709static int tg3_rx(struct tg3 *tp, int budget)
2682{ 2710{
2683 u32 work_mask; 2711 u32 work_mask;
2684 u32 rx_rcb_ptr = tp->rx_rcb_ptr; 2712 u32 sw_idx = tp->rx_rcb_ptr;
2685 u16 hw_idx, sw_idx; 2713 u16 hw_idx;
2686 int received; 2714 int received;
2687 2715
2688 hw_idx = tp->hw_status->idx[0].rx_producer; 2716 hw_idx = tp->hw_status->idx[0].rx_producer;
@@ -2691,7 +2719,6 @@ static int tg3_rx(struct tg3 *tp, int budget)
2691 * the opaque cookie. 2719 * the opaque cookie.
2692 */ 2720 */
2693 rmb(); 2721 rmb();
2694 sw_idx = rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp);
2695 work_mask = 0; 2722 work_mask = 0;
2696 received = 0; 2723 received = 0;
2697 while (sw_idx != hw_idx && budget > 0) { 2724 while (sw_idx != hw_idx && budget > 0) {
@@ -2796,14 +2823,19 @@ static int tg3_rx(struct tg3 *tp, int budget)
2796next_pkt: 2823next_pkt:
2797 (*post_ptr)++; 2824 (*post_ptr)++;
2798next_pkt_nopost: 2825next_pkt_nopost:
2799 rx_rcb_ptr++; 2826 sw_idx++;
2800 sw_idx = rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp); 2827 sw_idx %= TG3_RX_RCB_RING_SIZE(tp);
2828
2829 /* Refresh hw_idx to see if there is new work */
2830 if (sw_idx == hw_idx) {
2831 hw_idx = tp->hw_status->idx[0].rx_producer;
2832 rmb();
2833 }
2801 } 2834 }
2802 2835
2803 /* ACK the status ring. */ 2836 /* ACK the status ring. */
2804 tp->rx_rcb_ptr = rx_rcb_ptr; 2837 tp->rx_rcb_ptr = sw_idx;
2805 tw32_rx_mbox(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW, 2838 tw32_rx_mbox(MAILBOX_RCVRET_CON_IDX_0 + TG3_64BIT_REG_LOW, sw_idx);
2806 (rx_rcb_ptr % TG3_RX_RCB_RING_SIZE(tp)));
2807 2839
2808 /* Refill RX ring(s). */ 2840 /* Refill RX ring(s). */
2809 if (work_mask & RXD_OPAQUE_RING_STD) { 2841 if (work_mask & RXD_OPAQUE_RING_STD) {
@@ -2882,24 +2914,41 @@ static int tg3_poll(struct net_device *netdev, int *budget)
2882 return (done ? 0 : 1); 2914 return (done ? 0 : 1);
2883} 2915}
2884 2916
2885static inline unsigned int tg3_has_work(struct net_device *dev, struct tg3 *tp) 2917/* MSI ISR - No need to check for interrupt sharing and no need to
2918 * flush status block and interrupt mailbox. PCI ordering rules
2919 * guarantee that MSI will arrive after the status block.
2920 */
2921static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs)
2886{ 2922{
2923 struct net_device *dev = dev_id;
2924 struct tg3 *tp = netdev_priv(dev);
2887 struct tg3_hw_status *sblk = tp->hw_status; 2925 struct tg3_hw_status *sblk = tp->hw_status;
2888 unsigned int work_exists = 0; 2926 unsigned long flags;
2889 2927
2890 /* check for phy events */ 2928 spin_lock_irqsave(&tp->lock, flags);
2891 if (!(tp->tg3_flags & 2929
2892 (TG3_FLAG_USE_LINKCHG_REG | 2930 /*
2893 TG3_FLAG_POLL_SERDES))) { 2931 * writing any value to intr-mbox-0 clears PCI INTA# and
2894 if (sblk->status & SD_STATUS_LINK_CHG) 2932 * chip-internal interrupt pending events.
2895 work_exists = 1; 2933 * writing non-zero to intr-mbox-0 additional tells the
2934 * NIC to stop sending us irqs, engaging "in-intr-handler"
2935 * event coalescing.
2936 */
2937 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001);
2938 sblk->status &= ~SD_STATUS_UPDATED;
2939
2940 if (likely(tg3_has_work(tp)))
2941 netif_rx_schedule(dev); /* schedule NAPI poll */
2942 else {
2943 /* no work, re-enable interrupts
2944 */
2945 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
2946 0x00000000);
2896 } 2947 }
2897 /* check for RX/TX work to do */
2898 if (sblk->idx[0].tx_consumer != tp->tx_cons ||
2899 sblk->idx[0].rx_producer != tp->rx_rcb_ptr)
2900 work_exists = 1;
2901 2948
2902 return work_exists; 2949 spin_unlock_irqrestore(&tp->lock, flags);
2950
2951 return IRQ_RETVAL(1);
2903} 2952}
2904 2953
2905static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs) 2954static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
@@ -2935,7 +2984,7 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2935 tr32(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW); 2984 tr32(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW);
2936 sblk->status &= ~SD_STATUS_UPDATED; 2985 sblk->status &= ~SD_STATUS_UPDATED;
2937 2986
2938 if (likely(tg3_has_work(dev, tp))) 2987 if (likely(tg3_has_work(tp)))
2939 netif_rx_schedule(dev); /* schedule NAPI poll */ 2988 netif_rx_schedule(dev); /* schedule NAPI poll */
2940 else { 2989 else {
2941 /* no work, shared interrupt perhaps? re-enable 2990 /* no work, shared interrupt perhaps? re-enable
@@ -2954,13 +3003,31 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2954 return IRQ_RETVAL(handled); 3003 return IRQ_RETVAL(handled);
2955} 3004}
2956 3005
3006/* ISR for interrupt test */
3007static irqreturn_t tg3_test_isr(int irq, void *dev_id,
3008 struct pt_regs *regs)
3009{
3010 struct net_device *dev = dev_id;
3011 struct tg3 *tp = netdev_priv(dev);
3012 struct tg3_hw_status *sblk = tp->hw_status;
3013
3014 if (sblk->status & SD_STATUS_UPDATED) {
3015 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
3016 0x00000001);
3017 return IRQ_RETVAL(1);
3018 }
3019 return IRQ_RETVAL(0);
3020}
3021
2957static int tg3_init_hw(struct tg3 *); 3022static int tg3_init_hw(struct tg3 *);
2958static int tg3_halt(struct tg3 *); 3023static int tg3_halt(struct tg3 *, int);
2959 3024
2960#ifdef CONFIG_NET_POLL_CONTROLLER 3025#ifdef CONFIG_NET_POLL_CONTROLLER
2961static void tg3_poll_controller(struct net_device *dev) 3026static void tg3_poll_controller(struct net_device *dev)
2962{ 3027{
2963 tg3_interrupt(dev->irq, dev, NULL); 3028 struct tg3 *tp = netdev_priv(dev);
3029
3030 tg3_interrupt(tp->pdev->irq, dev, NULL);
2964} 3031}
2965#endif 3032#endif
2966 3033
@@ -2977,7 +3044,7 @@ static void tg3_reset_task(void *_data)
2977 restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; 3044 restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER;
2978 tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; 3045 tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER;
2979 3046
2980 tg3_halt(tp); 3047 tg3_halt(tp, 0);
2981 tg3_init_hw(tp); 3048 tg3_init_hw(tp);
2982 3049
2983 tg3_netif_start(tp); 3050 tg3_netif_start(tp);
@@ -3323,7 +3390,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu)
3323 spin_lock_irq(&tp->lock); 3390 spin_lock_irq(&tp->lock);
3324 spin_lock(&tp->tx_lock); 3391 spin_lock(&tp->tx_lock);
3325 3392
3326 tg3_halt(tp); 3393 tg3_halt(tp, 1);
3327 3394
3328 tg3_set_mtu(dev, tp, new_mtu); 3395 tg3_set_mtu(dev, tp, new_mtu);
3329 3396
@@ -3590,7 +3657,7 @@ err_out:
3590/* To stop a block, clear the enable bit and poll till it 3657/* To stop a block, clear the enable bit and poll till it
3591 * clears. tp->lock is held. 3658 * clears. tp->lock is held.
3592 */ 3659 */
3593static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit) 3660static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit, int silent)
3594{ 3661{
3595 unsigned int i; 3662 unsigned int i;
3596 u32 val; 3663 u32 val;
@@ -3623,7 +3690,7 @@ static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit)
3623 break; 3690 break;
3624 } 3691 }
3625 3692
3626 if (i == MAX_WAIT_CNT) { 3693 if (i == MAX_WAIT_CNT && !silent) {
3627 printk(KERN_ERR PFX "tg3_stop_block timed out, " 3694 printk(KERN_ERR PFX "tg3_stop_block timed out, "
3628 "ofs=%lx enable_bit=%x\n", 3695 "ofs=%lx enable_bit=%x\n",
3629 ofs, enable_bit); 3696 ofs, enable_bit);
@@ -3634,7 +3701,7 @@ static int tg3_stop_block(struct tg3 *tp, unsigned long ofs, u32 enable_bit)
3634} 3701}
3635 3702
3636/* tp->lock is held. */ 3703/* tp->lock is held. */
3637static int tg3_abort_hw(struct tg3 *tp) 3704static int tg3_abort_hw(struct tg3 *tp, int silent)
3638{ 3705{
3639 int i, err; 3706 int i, err;
3640 3707
@@ -3644,22 +3711,20 @@ static int tg3_abort_hw(struct tg3 *tp)
3644 tw32_f(MAC_RX_MODE, tp->rx_mode); 3711 tw32_f(MAC_RX_MODE, tp->rx_mode);
3645 udelay(10); 3712 udelay(10);
3646 3713
3647 err = tg3_stop_block(tp, RCVBDI_MODE, RCVBDI_MODE_ENABLE); 3714 err = tg3_stop_block(tp, RCVBDI_MODE, RCVBDI_MODE_ENABLE, silent);
3648 err |= tg3_stop_block(tp, RCVLPC_MODE, RCVLPC_MODE_ENABLE); 3715 err |= tg3_stop_block(tp, RCVLPC_MODE, RCVLPC_MODE_ENABLE, silent);
3649 err |= tg3_stop_block(tp, RCVLSC_MODE, RCVLSC_MODE_ENABLE); 3716 err |= tg3_stop_block(tp, RCVLSC_MODE, RCVLSC_MODE_ENABLE, silent);
3650 err |= tg3_stop_block(tp, RCVDBDI_MODE, RCVDBDI_MODE_ENABLE); 3717 err |= tg3_stop_block(tp, RCVDBDI_MODE, RCVDBDI_MODE_ENABLE, silent);
3651 err |= tg3_stop_block(tp, RCVDCC_MODE, RCVDCC_MODE_ENABLE); 3718 err |= tg3_stop_block(tp, RCVDCC_MODE, RCVDCC_MODE_ENABLE, silent);
3652 err |= tg3_stop_block(tp, RCVCC_MODE, RCVCC_MODE_ENABLE); 3719 err |= tg3_stop_block(tp, RCVCC_MODE, RCVCC_MODE_ENABLE, silent);
3653 3720
3654 err |= tg3_stop_block(tp, SNDBDS_MODE, SNDBDS_MODE_ENABLE); 3721 err |= tg3_stop_block(tp, SNDBDS_MODE, SNDBDS_MODE_ENABLE, silent);
3655 err |= tg3_stop_block(tp, SNDBDI_MODE, SNDBDI_MODE_ENABLE); 3722 err |= tg3_stop_block(tp, SNDBDI_MODE, SNDBDI_MODE_ENABLE, silent);
3656 err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE); 3723 err |= tg3_stop_block(tp, SNDDATAI_MODE, SNDDATAI_MODE_ENABLE, silent);
3657 err |= tg3_stop_block(tp, RDMAC_MODE, RDMAC_MODE_ENABLE); 3724 err |= tg3_stop_block(tp, RDMAC_MODE, RDMAC_MODE_ENABLE, silent);
3658 err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE); 3725 err |= tg3_stop_block(tp, SNDDATAC_MODE, SNDDATAC_MODE_ENABLE, silent);
3659 err |= tg3_stop_block(tp, DMAC_MODE, DMAC_MODE_ENABLE); 3726 err |= tg3_stop_block(tp, DMAC_MODE, DMAC_MODE_ENABLE, silent);
3660 err |= tg3_stop_block(tp, SNDBDC_MODE, SNDBDC_MODE_ENABLE); 3727 err |= tg3_stop_block(tp, SNDBDC_MODE, SNDBDC_MODE_ENABLE, silent);
3661 if (err)
3662 goto out;
3663 3728
3664 tp->mac_mode &= ~MAC_MODE_TDE_ENABLE; 3729 tp->mac_mode &= ~MAC_MODE_TDE_ENABLE;
3665 tw32_f(MAC_MODE, tp->mac_mode); 3730 tw32_f(MAC_MODE, tp->mac_mode);
@@ -3677,27 +3742,24 @@ static int tg3_abort_hw(struct tg3 *tp)
3677 printk(KERN_ERR PFX "tg3_abort_hw timed out for %s, " 3742 printk(KERN_ERR PFX "tg3_abort_hw timed out for %s, "
3678 "TX_MODE_ENABLE will not clear MAC_TX_MODE=%08x\n", 3743 "TX_MODE_ENABLE will not clear MAC_TX_MODE=%08x\n",
3679 tp->dev->name, tr32(MAC_TX_MODE)); 3744 tp->dev->name, tr32(MAC_TX_MODE));
3680 return -ENODEV; 3745 err |= -ENODEV;
3681 } 3746 }
3682 3747
3683 err = tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE); 3748 err |= tg3_stop_block(tp, HOSTCC_MODE, HOSTCC_MODE_ENABLE, silent);
3684 err |= tg3_stop_block(tp, WDMAC_MODE, WDMAC_MODE_ENABLE); 3749 err |= tg3_stop_block(tp, WDMAC_MODE, WDMAC_MODE_ENABLE, silent);
3685 err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE); 3750 err |= tg3_stop_block(tp, MBFREE_MODE, MBFREE_MODE_ENABLE, silent);
3686 3751
3687 tw32(FTQ_RESET, 0xffffffff); 3752 tw32(FTQ_RESET, 0xffffffff);
3688 tw32(FTQ_RESET, 0x00000000); 3753 tw32(FTQ_RESET, 0x00000000);
3689 3754
3690 err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE); 3755 err |= tg3_stop_block(tp, BUFMGR_MODE, BUFMGR_MODE_ENABLE, silent);
3691 err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE); 3756 err |= tg3_stop_block(tp, MEMARB_MODE, MEMARB_MODE_ENABLE, silent);
3692 if (err)
3693 goto out;
3694 3757
3695 if (tp->hw_status) 3758 if (tp->hw_status)
3696 memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE); 3759 memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
3697 if (tp->hw_stats) 3760 if (tp->hw_stats)
3698 memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats)); 3761 memset(tp->hw_stats, 0, sizeof(struct tg3_hw_stats));
3699 3762
3700out:
3701 return err; 3763 return err;
3702} 3764}
3703 3765
@@ -3727,6 +3789,28 @@ static void tg3_nvram_unlock(struct tg3 *tp)
3727} 3789}
3728 3790
3729/* tp->lock is held. */ 3791/* tp->lock is held. */
3792static void tg3_enable_nvram_access(struct tg3 *tp)
3793{
3794 if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
3795 !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {
3796 u32 nvaccess = tr32(NVRAM_ACCESS);
3797
3798 tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
3799 }
3800}
3801
3802/* tp->lock is held. */
3803static void tg3_disable_nvram_access(struct tg3 *tp)
3804{
3805 if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
3806 !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM)) {
3807 u32 nvaccess = tr32(NVRAM_ACCESS);
3808
3809 tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
3810 }
3811}
3812
3813/* tp->lock is held. */
3730static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind) 3814static void tg3_write_sig_pre_reset(struct tg3 *tp, int kind)
3731{ 3815{
3732 if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X)) 3816 if (!(tp->tg3_flags2 & TG3_FLG2_SUN_570X))
@@ -3967,7 +4051,7 @@ static int tg3_chip_reset(struct tg3 *tp)
3967 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); 4051 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
3968 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { 4052 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
3969 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF; 4053 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
3970 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) 4054 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
3971 tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE; 4055 tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
3972 } 4056 }
3973 } 4057 }
@@ -3997,7 +4081,7 @@ static void tg3_stop_fw(struct tg3 *tp)
3997} 4081}
3998 4082
3999/* tp->lock is held. */ 4083/* tp->lock is held. */
4000static int tg3_halt(struct tg3 *tp) 4084static int tg3_halt(struct tg3 *tp, int silent)
4001{ 4085{
4002 int err; 4086 int err;
4003 4087
@@ -4005,7 +4089,7 @@ static int tg3_halt(struct tg3 *tp)
4005 4089
4006 tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN); 4090 tg3_write_sig_pre_reset(tp, RESET_KIND_SHUTDOWN);
4007 4091
4008 tg3_abort_hw(tp); 4092 tg3_abort_hw(tp, silent);
4009 err = tg3_chip_reset(tp); 4093 err = tg3_chip_reset(tp);
4010 4094
4011 tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN); 4095 tg3_write_sig_legacy(tp, RESET_KIND_SHUTDOWN);
@@ -4974,9 +5058,7 @@ static int tg3_reset_hw(struct tg3 *tp)
4974 tg3_write_sig_pre_reset(tp, RESET_KIND_INIT); 5058 tg3_write_sig_pre_reset(tp, RESET_KIND_INIT);
4975 5059
4976 if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) { 5060 if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) {
4977 err = tg3_abort_hw(tp); 5061 tg3_abort_hw(tp, 1);
4978 if (err)
4979 return err;
4980 } 5062 }
4981 5063
4982 err = tg3_chip_reset(tp); 5064 err = tg3_chip_reset(tp);
@@ -5041,7 +5123,7 @@ static int tg3_reset_hw(struct tg3 *tp)
5041 tw32(GRC_MISC_CFG, val); 5123 tw32(GRC_MISC_CFG, val);
5042 5124
5043 /* Initialize MBUF/DESC pool. */ 5125 /* Initialize MBUF/DESC pool. */
5044 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 5126 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
5045 /* Do nothing. */ 5127 /* Do nothing. */
5046 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) { 5128 } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705) {
5047 tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE); 5129 tw32(BUFMGR_MB_POOL_ADDR, NIC_SRAM_MBUF_POOL_BASE);
@@ -5238,6 +5320,8 @@ static int tg3_reset_hw(struct tg3 *tp)
5238 RDMAC_MODE_LNGREAD_ENAB); 5320 RDMAC_MODE_LNGREAD_ENAB);
5239 if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE) 5321 if (tp->tg3_flags & TG3_FLAG_SPLIT_MODE)
5240 rdmac_mode |= RDMAC_MODE_SPLIT_ENABLE; 5322 rdmac_mode |= RDMAC_MODE_SPLIT_ENABLE;
5323
5324 /* If statement applies to 5705 and 5750 PCI devices only */
5241 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && 5325 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
5242 tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) || 5326 tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) ||
5243 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)) { 5327 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)) {
@@ -5251,6 +5335,9 @@ static int tg3_reset_hw(struct tg3 *tp)
5251 } 5335 }
5252 } 5336 }
5253 5337
5338 if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)
5339 rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;
5340
5254#if TG3_TSO_SUPPORT != 0 5341#if TG3_TSO_SUPPORT != 0
5255 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) 5342 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
5256 rdmac_mode |= (1 << 27); 5343 rdmac_mode |= (1 << 27);
@@ -5332,10 +5419,28 @@ static int tg3_reset_hw(struct tg3 *tp)
5332 tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR); 5419 tw32_f(MAC_MODE, tp->mac_mode | MAC_MODE_RXSTAT_CLEAR | MAC_MODE_TXSTAT_CLEAR);
5333 udelay(40); 5420 udelay(40);
5334 5421
5335 tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM; 5422 /* tp->grc_local_ctrl is partially set up during tg3_get_invariants().
5336 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) 5423 * If TG3_FLAG_EEPROM_WRITE_PROT is set, we should read the
5424 * register to preserve the GPIO settings for LOMs. The GPIOs,
5425 * whether used as inputs or outputs, are set by boot code after
5426 * reset.
5427 */
5428 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
5429 u32 gpio_mask;
5430
5431 gpio_mask = GRC_LCLCTRL_GPIO_OE0 | GRC_LCLCTRL_GPIO_OE2 |
5432 GRC_LCLCTRL_GPIO_OUTPUT0 | GRC_LCLCTRL_GPIO_OUTPUT2;
5433
5434 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
5435 gpio_mask |= GRC_LCLCTRL_GPIO_OE3 |
5436 GRC_LCLCTRL_GPIO_OUTPUT3;
5437
5438 tp->grc_local_ctrl |= tr32(GRC_LOCAL_CTRL) & gpio_mask;
5439
5440 /* GPIO1 must be driven high for eeprom write protect */
5337 tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 | 5441 tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
5338 GRC_LCLCTRL_GPIO_OUTPUT1); 5442 GRC_LCLCTRL_GPIO_OUTPUT1);
5443 }
5339 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 5444 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
5340 udelay(100); 5445 udelay(100);
5341 5446
@@ -5353,6 +5458,7 @@ static int tg3_reset_hw(struct tg3 *tp)
5353 WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB | 5458 WDMAC_MODE_FIFOURUN_ENAB | WDMAC_MODE_FIFOOREAD_ENAB |
5354 WDMAC_MODE_LNGREAD_ENAB); 5459 WDMAC_MODE_LNGREAD_ENAB);
5355 5460
5461 /* If statement applies to 5705 and 5750 PCI devices only */
5356 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 && 5462 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 &&
5357 tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) || 5463 tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) ||
5358 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 5464 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) {
@@ -5706,6 +5812,118 @@ static void tg3_timer(unsigned long __opaque)
5706 add_timer(&tp->timer); 5812 add_timer(&tp->timer);
5707} 5813}
5708 5814
5815static int tg3_test_interrupt(struct tg3 *tp)
5816{
5817 struct net_device *dev = tp->dev;
5818 int err, i;
5819 u32 int_mbox = 0;
5820
5821 tg3_disable_ints(tp);
5822
5823 free_irq(tp->pdev->irq, dev);
5824
5825 err = request_irq(tp->pdev->irq, tg3_test_isr,
5826 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
5827 if (err)
5828 return err;
5829
5830 tg3_enable_ints(tp);
5831
5832 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
5833 HOSTCC_MODE_NOW);
5834
5835 for (i = 0; i < 5; i++) {
5836 int_mbox = tr32(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW);
5837 if (int_mbox != 0)
5838 break;
5839 msleep(10);
5840 }
5841
5842 tg3_disable_ints(tp);
5843
5844 free_irq(tp->pdev->irq, dev);
5845
5846 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI)
5847 err = request_irq(tp->pdev->irq, tg3_msi,
5848 SA_SAMPLE_RANDOM, dev->name, dev);
5849 else
5850 err = request_irq(tp->pdev->irq, tg3_interrupt,
5851 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
5852
5853 if (err)
5854 return err;
5855
5856 if (int_mbox != 0)
5857 return 0;
5858
5859 return -EIO;
5860}
5861
5862/* Returns 0 if MSI test succeeds or MSI test fails and INTx mode is
5863 * successfully restored
5864 */
5865static int tg3_test_msi(struct tg3 *tp)
5866{
5867 struct net_device *dev = tp->dev;
5868 int err;
5869 u16 pci_cmd;
5870
5871 if (!(tp->tg3_flags2 & TG3_FLG2_USING_MSI))
5872 return 0;
5873
5874 /* Turn off SERR reporting in case MSI terminates with Master
5875 * Abort.
5876 */
5877 pci_read_config_word(tp->pdev, PCI_COMMAND, &pci_cmd);
5878 pci_write_config_word(tp->pdev, PCI_COMMAND,
5879 pci_cmd & ~PCI_COMMAND_SERR);
5880
5881 err = tg3_test_interrupt(tp);
5882
5883 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
5884
5885 if (!err)
5886 return 0;
5887
5888 /* other failures */
5889 if (err != -EIO)
5890 return err;
5891
5892 /* MSI test failed, go back to INTx mode */
5893 printk(KERN_WARNING PFX "%s: No interrupt was generated using MSI, "
5894 "switching to INTx mode. Please report this failure to "
5895 "the PCI maintainer and include system chipset information.\n",
5896 tp->dev->name);
5897
5898 free_irq(tp->pdev->irq, dev);
5899 pci_disable_msi(tp->pdev);
5900
5901 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
5902
5903 err = request_irq(tp->pdev->irq, tg3_interrupt,
5904 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
5905
5906 if (err)
5907 return err;
5908
5909 /* Need to reset the chip because the MSI cycle may have terminated
5910 * with Master Abort.
5911 */
5912 spin_lock_irq(&tp->lock);
5913 spin_lock(&tp->tx_lock);
5914
5915 tg3_halt(tp, 1);
5916 err = tg3_init_hw(tp);
5917
5918 spin_unlock(&tp->tx_lock);
5919 spin_unlock_irq(&tp->lock);
5920
5921 if (err)
5922 free_irq(tp->pdev->irq, dev);
5923
5924 return err;
5925}
5926
5709static int tg3_open(struct net_device *dev) 5927static int tg3_open(struct net_device *dev)
5710{ 5928{
5711 struct tg3 *tp = netdev_priv(dev); 5929 struct tg3 *tp = netdev_priv(dev);
@@ -5727,10 +5945,29 @@ static int tg3_open(struct net_device *dev)
5727 if (err) 5945 if (err)
5728 return err; 5946 return err;
5729 5947
5730 err = request_irq(dev->irq, tg3_interrupt, 5948 if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
5731 SA_SHIRQ, dev->name, dev); 5949 (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_AX) &&
5950 (GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5750_BX)) {
5951 if (pci_enable_msi(tp->pdev) == 0) {
5952 u32 msi_mode;
5953
5954 msi_mode = tr32(MSGINT_MODE);
5955 tw32(MSGINT_MODE, msi_mode | MSGINT_MODE_ENABLE);
5956 tp->tg3_flags2 |= TG3_FLG2_USING_MSI;
5957 }
5958 }
5959 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI)
5960 err = request_irq(tp->pdev->irq, tg3_msi,
5961 SA_SAMPLE_RANDOM, dev->name, dev);
5962 else
5963 err = request_irq(tp->pdev->irq, tg3_interrupt,
5964 SA_SHIRQ | SA_SAMPLE_RANDOM, dev->name, dev);
5732 5965
5733 if (err) { 5966 if (err) {
5967 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
5968 pci_disable_msi(tp->pdev);
5969 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
5970 }
5734 tg3_free_consistent(tp); 5971 tg3_free_consistent(tp);
5735 return err; 5972 return err;
5736 } 5973 }
@@ -5740,7 +5977,7 @@ static int tg3_open(struct net_device *dev)
5740 5977
5741 err = tg3_init_hw(tp); 5978 err = tg3_init_hw(tp);
5742 if (err) { 5979 if (err) {
5743 tg3_halt(tp); 5980 tg3_halt(tp, 1);
5744 tg3_free_rings(tp); 5981 tg3_free_rings(tp);
5745 } else { 5982 } else {
5746 tp->timer_offset = HZ / 10; 5983 tp->timer_offset = HZ / 10;
@@ -5751,23 +5988,47 @@ static int tg3_open(struct net_device *dev)
5751 tp->timer.expires = jiffies + tp->timer_offset; 5988 tp->timer.expires = jiffies + tp->timer_offset;
5752 tp->timer.data = (unsigned long) tp; 5989 tp->timer.data = (unsigned long) tp;
5753 tp->timer.function = tg3_timer; 5990 tp->timer.function = tg3_timer;
5754 add_timer(&tp->timer);
5755
5756 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
5757 } 5991 }
5758 5992
5759 spin_unlock(&tp->tx_lock); 5993 spin_unlock(&tp->tx_lock);
5760 spin_unlock_irq(&tp->lock); 5994 spin_unlock_irq(&tp->lock);
5761 5995
5762 if (err) { 5996 if (err) {
5763 free_irq(dev->irq, dev); 5997 free_irq(tp->pdev->irq, dev);
5998 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
5999 pci_disable_msi(tp->pdev);
6000 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
6001 }
5764 tg3_free_consistent(tp); 6002 tg3_free_consistent(tp);
5765 return err; 6003 return err;
5766 } 6004 }
5767 6005
6006 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
6007 err = tg3_test_msi(tp);
6008 if (err) {
6009 spin_lock_irq(&tp->lock);
6010 spin_lock(&tp->tx_lock);
6011
6012 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
6013 pci_disable_msi(tp->pdev);
6014 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
6015 }
6016 tg3_halt(tp, 1);
6017 tg3_free_rings(tp);
6018 tg3_free_consistent(tp);
6019
6020 spin_unlock(&tp->tx_lock);
6021 spin_unlock_irq(&tp->lock);
6022
6023 return err;
6024 }
6025 }
6026
5768 spin_lock_irq(&tp->lock); 6027 spin_lock_irq(&tp->lock);
5769 spin_lock(&tp->tx_lock); 6028 spin_lock(&tp->tx_lock);
5770 6029
6030 add_timer(&tp->timer);
6031 tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE;
5771 tg3_enable_ints(tp); 6032 tg3_enable_ints(tp);
5772 6033
5773 spin_unlock(&tp->tx_lock); 6034 spin_unlock(&tp->tx_lock);
@@ -6025,7 +6286,7 @@ static int tg3_close(struct net_device *dev)
6025 6286
6026 tg3_disable_ints(tp); 6287 tg3_disable_ints(tp);
6027 6288
6028 tg3_halt(tp); 6289 tg3_halt(tp, 1);
6029 tg3_free_rings(tp); 6290 tg3_free_rings(tp);
6030 tp->tg3_flags &= 6291 tp->tg3_flags &=
6031 ~(TG3_FLAG_INIT_COMPLETE | 6292 ~(TG3_FLAG_INIT_COMPLETE |
@@ -6035,7 +6296,11 @@ static int tg3_close(struct net_device *dev)
6035 spin_unlock(&tp->tx_lock); 6296 spin_unlock(&tp->tx_lock);
6036 spin_unlock_irq(&tp->lock); 6297 spin_unlock_irq(&tp->lock);
6037 6298
6038 free_irq(dev->irq, dev); 6299 free_irq(tp->pdev->irq, dev);
6300 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
6301 pci_disable_msi(tp->pdev);
6302 tp->tg3_flags2 &= ~TG3_FLG2_USING_MSI;
6303 }
6039 6304
6040 memcpy(&tp->net_stats_prev, tg3_get_stats(tp->dev), 6305 memcpy(&tp->net_stats_prev, tg3_get_stats(tp->dev),
6041 sizeof(tp->net_stats_prev)); 6306 sizeof(tp->net_stats_prev));
@@ -6509,10 +6774,12 @@ static int tg3_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
6509 start = cpu_to_le32(start); 6774 start = cpu_to_le32(start);
6510 len += b_offset; 6775 len += b_offset;
6511 offset &= ~3; 6776 offset &= ~3;
6777 if (len < 4)
6778 len = 4;
6512 } 6779 }
6513 6780
6514 odd_len = 0; 6781 odd_len = 0;
6515 if ((len & 3) && ((len > 4) || (b_offset == 0))) { 6782 if (len & 3) {
6516 /* adjustments to end on required 4 byte boundary */ 6783 /* adjustments to end on required 4 byte boundary */
6517 odd_len = 1; 6784 odd_len = 1;
6518 len = (len + 3) & ~3; 6785 len = (len + 3) & ~3;
@@ -6739,7 +7006,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e
6739 tp->tx_pending = ering->tx_pending; 7006 tp->tx_pending = ering->tx_pending;
6740 7007
6741 if (netif_running(dev)) { 7008 if (netif_running(dev)) {
6742 tg3_halt(tp); 7009 tg3_halt(tp, 1);
6743 tg3_init_hw(tp); 7010 tg3_init_hw(tp);
6744 tg3_netif_start(tp); 7011 tg3_netif_start(tp);
6745 } 7012 }
@@ -6782,7 +7049,7 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam
6782 tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE; 7049 tp->tg3_flags &= ~TG3_FLAG_TX_PAUSE;
6783 7050
6784 if (netif_running(dev)) { 7051 if (netif_running(dev)) {
6785 tg3_halt(tp); 7052 tg3_halt(tp, 1);
6786 tg3_init_hw(tp); 7053 tg3_init_hw(tp);
6787 tg3_netif_start(tp); 7054 tg3_netif_start(tp);
6788 } 7055 }
@@ -7067,6 +7334,67 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
7067 } 7334 }
7068} 7335}
7069 7336
7337static void __devinit tg3_get_5752_nvram_info(struct tg3 *tp)
7338{
7339 u32 nvcfg1;
7340
7341 nvcfg1 = tr32(NVRAM_CFG1);
7342
7343 /* NVRAM protection for TPM */
7344 if (nvcfg1 & (1 << 27))
7345 tp->tg3_flags2 |= TG3_FLG2_PROTECTED_NVRAM;
7346
7347 switch (nvcfg1 & NVRAM_CFG1_5752VENDOR_MASK) {
7348 case FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ:
7349 case FLASH_5752VENDOR_ATMEL_EEPROM_376KHZ:
7350 tp->nvram_jedecnum = JEDEC_ATMEL;
7351 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
7352 break;
7353 case FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED:
7354 tp->nvram_jedecnum = JEDEC_ATMEL;
7355 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
7356 tp->tg3_flags2 |= TG3_FLG2_FLASH;
7357 break;
7358 case FLASH_5752VENDOR_ST_M45PE10:
7359 case FLASH_5752VENDOR_ST_M45PE20:
7360 case FLASH_5752VENDOR_ST_M45PE40:
7361 tp->nvram_jedecnum = JEDEC_ST;
7362 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
7363 tp->tg3_flags2 |= TG3_FLG2_FLASH;
7364 break;
7365 }
7366
7367 if (tp->tg3_flags2 & TG3_FLG2_FLASH) {
7368 switch (nvcfg1 & NVRAM_CFG1_5752PAGE_SIZE_MASK) {
7369 case FLASH_5752PAGE_SIZE_256:
7370 tp->nvram_pagesize = 256;
7371 break;
7372 case FLASH_5752PAGE_SIZE_512:
7373 tp->nvram_pagesize = 512;
7374 break;
7375 case FLASH_5752PAGE_SIZE_1K:
7376 tp->nvram_pagesize = 1024;
7377 break;
7378 case FLASH_5752PAGE_SIZE_2K:
7379 tp->nvram_pagesize = 2048;
7380 break;
7381 case FLASH_5752PAGE_SIZE_4K:
7382 tp->nvram_pagesize = 4096;
7383 break;
7384 case FLASH_5752PAGE_SIZE_264:
7385 tp->nvram_pagesize = 264;
7386 break;
7387 }
7388 }
7389 else {
7390 /* For eeprom, set pagesize to maximum eeprom size */
7391 tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE;
7392
7393 nvcfg1 &= ~NVRAM_CFG1_COMPAT_BYPASS;
7394 tw32(NVRAM_CFG1, nvcfg1);
7395 }
7396}
7397
7070/* Chips other than 5700/5701 use the NVRAM for fetching info. */ 7398/* Chips other than 5700/5701 use the NVRAM for fetching info. */
7071static void __devinit tg3_nvram_init(struct tg3 *tp) 7399static void __devinit tg3_nvram_init(struct tg3 *tp)
7072{ 7400{
@@ -7093,20 +7421,16 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
7093 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) { 7421 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5701) {
7094 tp->tg3_flags |= TG3_FLAG_NVRAM; 7422 tp->tg3_flags |= TG3_FLAG_NVRAM;
7095 7423
7096 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7424 tg3_enable_nvram_access(tp);
7097 u32 nvaccess = tr32(NVRAM_ACCESS);
7098 7425
7099 tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE); 7426 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
7100 } 7427 tg3_get_5752_nvram_info(tp);
7428 else
7429 tg3_get_nvram_info(tp);
7101 7430
7102 tg3_get_nvram_info(tp);
7103 tg3_get_nvram_size(tp); 7431 tg3_get_nvram_size(tp);
7104 7432
7105 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7433 tg3_disable_nvram_access(tp);
7106 u32 nvaccess = tr32(NVRAM_ACCESS);
7107
7108 tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
7109 }
7110 7434
7111 } else { 7435 } else {
7112 tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED); 7436 tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED);
@@ -7195,11 +7519,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
7195 7519
7196 tg3_nvram_lock(tp); 7520 tg3_nvram_lock(tp);
7197 7521
7198 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7522 tg3_enable_nvram_access(tp);
7199 u32 nvaccess = tr32(NVRAM_ACCESS);
7200
7201 tw32_f(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
7202 }
7203 7523
7204 tw32(NVRAM_ADDR, offset); 7524 tw32(NVRAM_ADDR, offset);
7205 ret = tg3_nvram_exec_cmd(tp, NVRAM_CMD_RD | NVRAM_CMD_GO | 7525 ret = tg3_nvram_exec_cmd(tp, NVRAM_CMD_RD | NVRAM_CMD_GO |
@@ -7210,11 +7530,7 @@ static int tg3_nvram_read(struct tg3 *tp, u32 offset, u32 *val)
7210 7530
7211 tg3_nvram_unlock(tp); 7531 tg3_nvram_unlock(tp);
7212 7532
7213 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7533 tg3_disable_nvram_access(tp);
7214 u32 nvaccess = tr32(NVRAM_ACCESS);
7215
7216 tw32_f(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
7217 }
7218 7534
7219 return ret; 7535 return ret;
7220} 7536}
@@ -7277,7 +7593,7 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len,
7277 7593
7278 while (len) { 7594 while (len) {
7279 int j; 7595 int j;
7280 u32 phy_addr, page_off, size, nvaccess; 7596 u32 phy_addr, page_off, size;
7281 7597
7282 phy_addr = offset & ~pagemask; 7598 phy_addr = offset & ~pagemask;
7283 7599
@@ -7300,8 +7616,7 @@ static int tg3_nvram_write_block_unbuffered(struct tg3 *tp, u32 offset, u32 len,
7300 7616
7301 offset = offset + (pagesize - page_off); 7617 offset = offset + (pagesize - page_off);
7302 7618
7303 nvaccess = tr32(NVRAM_ACCESS); 7619 tg3_enable_nvram_access(tp);
7304 tw32_f(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
7305 7620
7306 /* 7621 /*
7307 * Before we can erase the flash page, we need 7622 * Before we can erase the flash page, we need
@@ -7425,8 +7740,8 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
7425 } 7740 }
7426 7741
7427 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { 7742 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
7428 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | 7743 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl &
7429 GRC_LCLCTRL_GPIO_OE1); 7744 ~GRC_LCLCTRL_GPIO_OUTPUT1);
7430 udelay(40); 7745 udelay(40);
7431 } 7746 }
7432 7747
@@ -7438,13 +7753,10 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
7438 7753
7439 tg3_nvram_lock(tp); 7754 tg3_nvram_lock(tp);
7440 7755
7441 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7756 tg3_enable_nvram_access(tp);
7442 u32 nvaccess = tr32(NVRAM_ACCESS); 7757 if ((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) &&
7443 7758 !(tp->tg3_flags2 & TG3_FLG2_PROTECTED_NVRAM))
7444 tw32(NVRAM_ACCESS, nvaccess | ACCESS_ENABLE);
7445
7446 tw32(NVRAM_WRITE1, 0x406); 7759 tw32(NVRAM_WRITE1, 0x406);
7447 }
7448 7760
7449 grc_mode = tr32(GRC_MODE); 7761 grc_mode = tr32(GRC_MODE);
7450 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE); 7762 tw32(GRC_MODE, grc_mode | GRC_MODE_NVRAM_WR_ENABLE);
@@ -7463,17 +7775,12 @@ static int tg3_nvram_write_block(struct tg3 *tp, u32 offset, u32 len, u8 *buf)
7463 grc_mode = tr32(GRC_MODE); 7775 grc_mode = tr32(GRC_MODE);
7464 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE); 7776 tw32(GRC_MODE, grc_mode & ~GRC_MODE_NVRAM_WR_ENABLE);
7465 7777
7466 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7778 tg3_disable_nvram_access(tp);
7467 u32 nvaccess = tr32(NVRAM_ACCESS);
7468
7469 tw32(NVRAM_ACCESS, nvaccess & ~ACCESS_ENABLE);
7470 }
7471 tg3_nvram_unlock(tp); 7779 tg3_nvram_unlock(tp);
7472 } 7780 }
7473 7781
7474 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { 7782 if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) {
7475 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl | 7783 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
7476 GRC_LCLCTRL_GPIO_OE1 | GRC_LCLCTRL_GPIO_OUTPUT1);
7477 udelay(40); 7784 udelay(40);
7478 } 7785 }
7479 7786
@@ -7537,21 +7844,27 @@ static inline struct subsys_tbl_ent *lookup_by_subsys(struct tg3 *tp)
7537 return NULL; 7844 return NULL;
7538} 7845}
7539 7846
7540static int __devinit tg3_phy_probe(struct tg3 *tp) 7847/* Since this function may be called in D3-hot power state during
7848 * tg3_init_one(), only config cycles are allowed.
7849 */
7850static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
7541{ 7851{
7542 u32 eeprom_phy_id, hw_phy_id_1, hw_phy_id_2;
7543 u32 hw_phy_id, hw_phy_id_masked;
7544 u32 val; 7852 u32 val;
7545 int eeprom_signature_found, eeprom_phy_serdes, err; 7853
7854 /* Make sure register accesses (indirect or otherwise)
7855 * will function correctly.
7856 */
7857 pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
7858 tp->misc_host_ctrl);
7546 7859
7547 tp->phy_id = PHY_ID_INVALID; 7860 tp->phy_id = PHY_ID_INVALID;
7548 eeprom_phy_id = PHY_ID_INVALID; 7861 tp->led_ctrl = LED_CTRL_MODE_PHY_1;
7549 eeprom_phy_serdes = 0; 7862
7550 eeprom_signature_found = 0;
7551 tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); 7863 tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val);
7552 if (val == NIC_SRAM_DATA_SIG_MAGIC) { 7864 if (val == NIC_SRAM_DATA_SIG_MAGIC) {
7553 u32 nic_cfg, led_cfg; 7865 u32 nic_cfg, led_cfg;
7554 u32 nic_phy_id, ver, cfg2 = 0; 7866 u32 nic_phy_id, ver, cfg2 = 0, eeprom_phy_id;
7867 int eeprom_phy_serdes = 0;
7555 7868
7556 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg); 7869 tg3_read_mem(tp, NIC_SRAM_DATA_CFG, &nic_cfg);
7557 tp->nic_sram_data_cfg = nic_cfg; 7870 tp->nic_sram_data_cfg = nic_cfg;
@@ -7564,8 +7877,6 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
7564 (ver > 0) && (ver < 0x100)) 7877 (ver > 0) && (ver < 0x100))
7565 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2); 7878 tg3_read_mem(tp, NIC_SRAM_DATA_CFG_2, &cfg2);
7566 7879
7567 eeprom_signature_found = 1;
7568
7569 if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) == 7880 if ((nic_cfg & NIC_SRAM_DATA_CFG_PHY_TYPE_MASK) ==
7570 NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER) 7881 NIC_SRAM_DATA_CFG_PHY_TYPE_FIBER)
7571 eeprom_phy_serdes = 1; 7882 eeprom_phy_serdes = 1;
@@ -7581,10 +7892,14 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
7581 } else 7892 } else
7582 eeprom_phy_id = 0; 7893 eeprom_phy_id = 0;
7583 7894
7584 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 7895 tp->phy_id = eeprom_phy_id;
7896 if (eeprom_phy_serdes)
7897 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
7898
7899 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
7585 led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | 7900 led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK |
7586 SHASTA_EXT_LED_MODE_MASK); 7901 SHASTA_EXT_LED_MODE_MASK);
7587 } else 7902 else
7588 led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK; 7903 led_cfg = nic_cfg & NIC_SRAM_DATA_CFG_LED_MODE_MASK;
7589 7904
7590 switch (led_cfg) { 7905 switch (led_cfg) {
@@ -7634,7 +7949,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
7634 7949
7635 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) { 7950 if (nic_cfg & NIC_SRAM_DATA_CFG_ASF_ENABLE) {
7636 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF; 7951 tp->tg3_flags |= TG3_FLAG_ENABLE_ASF;
7637 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) 7952 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
7638 tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE; 7953 tp->tg3_flags2 |= TG3_FLG2_ASF_NEW_HANDSHAKE;
7639 } 7954 }
7640 if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL) 7955 if (nic_cfg & NIC_SRAM_DATA_CFG_FIBER_WOL)
@@ -7648,6 +7963,13 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
7648 if (cfg2 & (1 << 18)) 7963 if (cfg2 & (1 << 18))
7649 tp->tg3_flags2 |= TG3_FLG2_SERDES_PREEMPHASIS; 7964 tp->tg3_flags2 |= TG3_FLG2_SERDES_PREEMPHASIS;
7650 } 7965 }
7966}
7967
7968static int __devinit tg3_phy_probe(struct tg3 *tp)
7969{
7970 u32 hw_phy_id_1, hw_phy_id_2;
7971 u32 hw_phy_id, hw_phy_id_masked;
7972 int err;
7651 7973
7652 /* Reading the PHY ID register can conflict with ASF 7974 /* Reading the PHY ID register can conflict with ASF
7653 * firwmare access to the PHY hardware. 7975 * firwmare access to the PHY hardware.
@@ -7676,10 +7998,10 @@ static int __devinit tg3_phy_probe(struct tg3 *tp)
7676 if (hw_phy_id_masked == PHY_ID_BCM8002) 7998 if (hw_phy_id_masked == PHY_ID_BCM8002)
7677 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; 7999 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES;
7678 } else { 8000 } else {
7679 if (eeprom_signature_found) { 8001 if (tp->phy_id != PHY_ID_INVALID) {
7680 tp->phy_id = eeprom_phy_id; 8002 /* Do nothing, phy ID already set up in
7681 if (eeprom_phy_serdes) 8003 * tg3_get_eeprom_hw_cfg().
7682 tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; 8004 */
7683 } else { 8005 } else {
7684 struct subsys_tbl_ent *p; 8006 struct subsys_tbl_ent *p;
7685 8007
@@ -7750,9 +8072,6 @@ skip_phy_reset:
7750 err = tg3_init_5401phy_dsp(tp); 8072 err = tg3_init_5401phy_dsp(tp);
7751 } 8073 }
7752 8074
7753 if (!eeprom_signature_found)
7754 tp->led_ctrl = LED_CTRL_MODE_PHY_1;
7755
7756 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) 8075 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
7757 tp->link_config.advertising = 8076 tp->link_config.advertising =
7758 (ADVERTISED_1000baseT_Half | 8077 (ADVERTISED_1000baseT_Half |
@@ -7917,6 +8236,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
7917 tp->pci_chip_rev_id = (misc_ctrl_reg >> 8236 tp->pci_chip_rev_id = (misc_ctrl_reg >>
7918 MISC_HOST_CTRL_CHIPREV_SHIFT); 8237 MISC_HOST_CTRL_CHIPREV_SHIFT);
7919 8238
8239 /* Wrong chip ID in 5752 A0. This code can be removed later
8240 * as A0 is not in production.
8241 */
8242 if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
8243 tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
8244
7920 /* Initialize misc host control in PCI block. */ 8245 /* Initialize misc host control in PCI block. */
7921 tp->misc_host_ctrl |= (misc_ctrl_reg & 8246 tp->misc_host_ctrl |= (misc_ctrl_reg &
7922 MISC_HOST_CTRL_CHIPREV); 8247 MISC_HOST_CTRL_CHIPREV);
@@ -7931,11 +8256,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
7931 tp->pci_hdr_type = (cacheline_sz_reg >> 16) & 0xff; 8256 tp->pci_hdr_type = (cacheline_sz_reg >> 16) & 0xff;
7932 tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff; 8257 tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
7933 8258
8259 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
8260 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
8261 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
8262
7934 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) || 8263 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
7935 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)) 8264 (tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
7936 tp->tg3_flags2 |= TG3_FLG2_5705_PLUS; 8265 tp->tg3_flags2 |= TG3_FLG2_5705_PLUS;
7937 8266
7938 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) 8267 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
7939 tp->tg3_flags2 |= TG3_FLG2_HW_TSO; 8268 tp->tg3_flags2 |= TG3_FLG2_HW_TSO;
7940 8269
7941 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) 8270 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0)
@@ -8013,6 +8342,31 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
8013 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg); 8342 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, pci_state_reg);
8014 } 8343 }
8015 8344
8345 /* Get eeprom hw config before calling tg3_set_power_state().
8346 * In particular, the TG3_FLAG_EEPROM_WRITE_PROT flag must be
8347 * determined before calling tg3_set_power_state() so that
8348 * we know whether or not to switch out of Vaux power.
8349 * When the flag is set, it means that GPIO1 is used for eeprom
8350 * write protect and also implies that it is a LOM where GPIOs
8351 * are not used to switch power.
8352 */
8353 tg3_get_eeprom_hw_cfg(tp);
8354
8355 /* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
8356 * GPIO1 driven high will bring 5700's external PHY out of reset.
8357 * It is also used as eeprom write protect on LOMs.
8358 */
8359 tp->grc_local_ctrl = GRC_LCLCTRL_INT_ON_ATTN | GRC_LCLCTRL_AUTO_SEEPROM;
8360 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) ||
8361 (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT))
8362 tp->grc_local_ctrl |= (GRC_LCLCTRL_GPIO_OE1 |
8363 GRC_LCLCTRL_GPIO_OUTPUT1);
8364 /* Unused GPIO3 must be driven as output on 5752 because there
8365 * are no pull-up resistors on unused GPIO pins.
8366 */
8367 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
8368 tp->grc_local_ctrl |= GRC_LCLCTRL_GPIO_OE3;
8369
8016 /* Force the chip into D0. */ 8370 /* Force the chip into D0. */
8017 err = tg3_set_power_state(tp, 0); 8371 err = tg3_set_power_state(tp, 0);
8018 if (err) { 8372 if (err) {
@@ -8065,8 +8419,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
8065 if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0) 8419 if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0)
8066 tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG; 8420 tp->tg3_flags2 |= TG3_FLG2_PHY_5704_A0_BUG;
8067 8421
8068 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705 || 8422 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
8069 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750)
8070 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG; 8423 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
8071 8424
8072 /* Only 5701 and later support tagged irq status mode. 8425 /* Only 5701 and later support tagged irq status mode.
@@ -8628,6 +8981,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
8628 case PHY_ID_BCM5704: return "5704"; 8981 case PHY_ID_BCM5704: return "5704";
8629 case PHY_ID_BCM5705: return "5705"; 8982 case PHY_ID_BCM5705: return "5705";
8630 case PHY_ID_BCM5750: return "5750"; 8983 case PHY_ID_BCM5750: return "5750";
8984 case PHY_ID_BCM5752: return "5752";
8631 case PHY_ID_BCM8002: return "8002/serdes"; 8985 case PHY_ID_BCM8002: return "8002/serdes";
8632 case 0: return "serdes"; 8986 case 0: return "serdes";
8633 default: return "unknown"; 8987 default: return "unknown";
@@ -8878,7 +9232,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
8878 (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { 9232 (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {
8879 pci_save_state(tp->pdev); 9233 pci_save_state(tp->pdev);
8880 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); 9234 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
8881 tg3_halt(tp); 9235 tg3_halt(tp, 1);
8882 } 9236 }
8883 9237
8884 err = tg3_test_dma(tp); 9238 err = tg3_test_dma(tp);
@@ -9001,7 +9355,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state)
9001 9355
9002 spin_lock_irq(&tp->lock); 9356 spin_lock_irq(&tp->lock);
9003 spin_lock(&tp->tx_lock); 9357 spin_lock(&tp->tx_lock);
9004 tg3_halt(tp); 9358 tg3_halt(tp, 1);
9005 spin_unlock(&tp->tx_lock); 9359 spin_unlock(&tp->tx_lock);
9006 spin_unlock_irq(&tp->lock); 9360 spin_unlock_irq(&tp->lock);
9007 9361
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d48887d90325..8de6f21037ba 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -125,6 +125,9 @@
125#define CHIPREV_ID_5750_A0 0x4000 125#define CHIPREV_ID_5750_A0 0x4000
126#define CHIPREV_ID_5750_A1 0x4001 126#define CHIPREV_ID_5750_A1 0x4001
127#define CHIPREV_ID_5750_A3 0x4003 127#define CHIPREV_ID_5750_A3 0x4003
128#define CHIPREV_ID_5752_A0_HW 0x5000
129#define CHIPREV_ID_5752_A0 0x6000
130#define CHIPREV_ID_5752_A1 0x6001
128#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 131#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
129#define ASIC_REV_5700 0x07 132#define ASIC_REV_5700 0x07
130#define ASIC_REV_5701 0x00 133#define ASIC_REV_5701 0x00
@@ -132,6 +135,7 @@
132#define ASIC_REV_5704 0x02 135#define ASIC_REV_5704 0x02
133#define ASIC_REV_5705 0x03 136#define ASIC_REV_5705 0x03
134#define ASIC_REV_5750 0x04 137#define ASIC_REV_5750 0x04
138#define ASIC_REV_5752 0x06
135#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 139#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
136#define CHIPREV_5700_AX 0x70 140#define CHIPREV_5700_AX 0x70
137#define CHIPREV_5700_BX 0x71 141#define CHIPREV_5700_BX 0x71
@@ -1307,6 +1311,9 @@
1307#define GRC_LCLCTRL_CLEARINT 0x00000002 1311#define GRC_LCLCTRL_CLEARINT 0x00000002
1308#define GRC_LCLCTRL_SETINT 0x00000004 1312#define GRC_LCLCTRL_SETINT 0x00000004
1309#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008 1313#define GRC_LCLCTRL_INT_ON_ATTN 0x00000008
1314#define GRC_LCLCTRL_GPIO_INPUT3 0x00000020
1315#define GRC_LCLCTRL_GPIO_OE3 0x00000040
1316#define GRC_LCLCTRL_GPIO_OUTPUT3 0x00000080
1310#define GRC_LCLCTRL_GPIO_INPUT0 0x00000100 1317#define GRC_LCLCTRL_GPIO_INPUT0 0x00000100
1311#define GRC_LCLCTRL_GPIO_INPUT1 0x00000200 1318#define GRC_LCLCTRL_GPIO_INPUT1 0x00000200
1312#define GRC_LCLCTRL_GPIO_INPUT2 0x00000400 1319#define GRC_LCLCTRL_GPIO_INPUT2 0x00000400
@@ -1392,6 +1399,20 @@
1392#define FLASH_VENDOR_SAIFUN 0x01000003 1399#define FLASH_VENDOR_SAIFUN 0x01000003
1393#define FLASH_VENDOR_SST_SMALL 0x00000001 1400#define FLASH_VENDOR_SST_SMALL 0x00000001
1394#define FLASH_VENDOR_SST_LARGE 0x02000001 1401#define FLASH_VENDOR_SST_LARGE 0x02000001
1402#define NVRAM_CFG1_5752VENDOR_MASK 0x03c00003
1403#define FLASH_5752VENDOR_ATMEL_EEPROM_64KHZ 0x00000000
1404#define FLASH_5752VENDOR_ATMEL_EEPROM_376KHZ 0x02000000
1405#define FLASH_5752VENDOR_ATMEL_FLASH_BUFFERED 0x02000003
1406#define FLASH_5752VENDOR_ST_M45PE10 0x02400000
1407#define FLASH_5752VENDOR_ST_M45PE20 0x02400002
1408#define FLASH_5752VENDOR_ST_M45PE40 0x02400001
1409#define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000
1410#define FLASH_5752PAGE_SIZE_256 0x00000000
1411#define FLASH_5752PAGE_SIZE_512 0x10000000
1412#define FLASH_5752PAGE_SIZE_1K 0x20000000
1413#define FLASH_5752PAGE_SIZE_2K 0x30000000
1414#define FLASH_5752PAGE_SIZE_4K 0x40000000
1415#define FLASH_5752PAGE_SIZE_264 0x50000000
1395#define NVRAM_CFG2 0x00007018 1416#define NVRAM_CFG2 0x00007018
1396#define NVRAM_CFG3 0x0000701c 1417#define NVRAM_CFG3 0x0000701c
1397#define NVRAM_SWARB 0x00007020 1418#define NVRAM_SWARB 0x00007020
@@ -2100,6 +2121,9 @@ struct tg3 {
2100#define TG3_FLG2_HW_TSO 0x00010000 2121#define TG3_FLG2_HW_TSO 0x00010000
2101#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000 2122#define TG3_FLG2_SERDES_PREEMPHASIS 0x00020000
2102#define TG3_FLG2_5705_PLUS 0x00040000 2123#define TG3_FLG2_5705_PLUS 0x00040000
2124#define TG3_FLG2_5750_PLUS 0x00080000
2125#define TG3_FLG2_PROTECTED_NVRAM 0x00100000
2126#define TG3_FLG2_USING_MSI 0x00200000
2103 2127
2104 u32 split_mode_max_reqs; 2128 u32 split_mode_max_reqs;
2105#define SPLIT_MODE_5704_MAX_REQ 3 2129#define SPLIT_MODE_5704_MAX_REQ 3
@@ -2145,6 +2169,7 @@ struct tg3 {
2145#define PHY_ID_BCM5704 0x60008190 2169#define PHY_ID_BCM5704 0x60008190
2146#define PHY_ID_BCM5705 0x600081a0 2170#define PHY_ID_BCM5705 0x600081a0
2147#define PHY_ID_BCM5750 0x60008180 2171#define PHY_ID_BCM5750 0x60008180
2172#define PHY_ID_BCM5752 0x60008100
2148#define PHY_ID_BCM8002 0x60010140 2173#define PHY_ID_BCM8002 0x60010140
2149#define PHY_ID_INVALID 0xffffffff 2174#define PHY_ID_INVALID 0xffffffff
2150#define PHY_ID_REV_MASK 0x0000000f 2175#define PHY_ID_REV_MASK 0x0000000f
diff --git a/drivers/net/wan/Kconfig b/drivers/net/wan/Kconfig
index 35791934a602..66b94668ddd8 100644
--- a/drivers/net/wan/Kconfig
+++ b/drivers/net/wan/Kconfig
@@ -26,7 +26,7 @@ config WAN
26# There is no way to detect a comtrol sv11 - force it modular for now. 26# There is no way to detect a comtrol sv11 - force it modular for now.
27config HOSTESS_SV11 27config HOSTESS_SV11
28 tristate "Comtrol Hostess SV-11 support" 28 tristate "Comtrol Hostess SV-11 support"
29 depends on WAN && ISA && m 29 depends on WAN && ISA && m && ISA_DMA_API
30 help 30 help
31 Driver for Comtrol Hostess SV-11 network card which 31 Driver for Comtrol Hostess SV-11 network card which
32 operates on low speed synchronous serial links at up to 32 operates on low speed synchronous serial links at up to
@@ -38,7 +38,7 @@ config HOSTESS_SV11
38# The COSA/SRP driver has not been tested as non-modular yet. 38# The COSA/SRP driver has not been tested as non-modular yet.
39config COSA 39config COSA
40 tristate "COSA/SRP sync serial boards support" 40 tristate "COSA/SRP sync serial boards support"
41 depends on WAN && ISA && m 41 depends on WAN && ISA && m && ISA_DMA_API
42 ---help--- 42 ---help---
43 Driver for COSA and SRP synchronous serial boards. 43 Driver for COSA and SRP synchronous serial boards.
44 44
@@ -127,7 +127,7 @@ config LANMEDIA
127# There is no way to detect a Sealevel board. Force it modular 127# There is no way to detect a Sealevel board. Force it modular
128config SEALEVEL_4021 128config SEALEVEL_4021
129 tristate "Sealevel Systems 4021 support" 129 tristate "Sealevel Systems 4021 support"
130 depends on WAN && ISA && m 130 depends on WAN && ISA && m && ISA_DMA_API
131 help 131 help
132 This is a driver for the Sealevel Systems ACB 56 serial I/O adapter. 132 This is a driver for the Sealevel Systems ACB 56 serial I/O adapter.
133 133
diff --git a/drivers/net/wan/cycx_x25.c b/drivers/net/wan/cycx_x25.c
index 5b48cd8568f5..02d57c0b4243 100644
--- a/drivers/net/wan/cycx_x25.c
+++ b/drivers/net/wan/cycx_x25.c
@@ -436,9 +436,7 @@ static int cycx_wan_new_if(struct wan_device *wandev, struct net_device *dev,
436 } 436 }
437 437
438 if (err) { 438 if (err) {
439 if (chan->local_addr) 439 kfree(chan->local_addr);
440 kfree(chan->local_addr);
441
442 kfree(chan); 440 kfree(chan);
443 return err; 441 return err;
444 } 442 }
@@ -458,9 +456,7 @@ static int cycx_wan_del_if(struct wan_device *wandev, struct net_device *dev)
458 struct cycx_x25_channel *chan = dev->priv; 456 struct cycx_x25_channel *chan = dev->priv;
459 457
460 if (chan->svc) { 458 if (chan->svc) {
461 if (chan->local_addr) 459 kfree(chan->local_addr);
462 kfree(chan->local_addr);
463
464 if (chan->state == WAN_CONNECTED) 460 if (chan->state == WAN_CONNECTED)
465 del_timer(&chan->timer); 461 del_timer(&chan->timer);
466 } 462 }
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c
index d67be2587d4d..3e7753b10717 100644
--- a/drivers/net/wan/pc300_drv.c
+++ b/drivers/net/wan/pc300_drv.c
@@ -3427,7 +3427,7 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3427{ 3427{
3428 static int first_time = 1; 3428 static int first_time = 1;
3429 ucchar cpc_rev_id; 3429 ucchar cpc_rev_id;
3430 int err = 0, eeprom_outdated = 0; 3430 int err, eeprom_outdated = 0;
3431 ucshort device_id; 3431 ucshort device_id;
3432 pc300_t *card; 3432 pc300_t *card;
3433 3433
@@ -3439,15 +3439,21 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3439#endif 3439#endif
3440 } 3440 }
3441 3441
3442 if ((err = pci_enable_device(pdev)) < 0)
3443 return err;
3444
3442 card = (pc300_t *) kmalloc(sizeof(pc300_t), GFP_KERNEL); 3445 card = (pc300_t *) kmalloc(sizeof(pc300_t), GFP_KERNEL);
3443 if (card == NULL) { 3446 if (card == NULL) {
3444 printk("PC300 found at RAM 0x%08lx, " 3447 printk("PC300 found at RAM 0x%08lx, "
3445 "but could not allocate card structure.\n", 3448 "but could not allocate card structure.\n",
3446 pci_resource_start(pdev, 3)); 3449 pci_resource_start(pdev, 3));
3447 return -ENOMEM; 3450 err = -ENOMEM;
3451 goto err_disable_dev;
3448 } 3452 }
3449 memset(card, 0, sizeof(pc300_t)); 3453 memset(card, 0, sizeof(pc300_t));
3450 3454
3455 err = -ENODEV;
3456
3451 /* read PCI configuration area */ 3457 /* read PCI configuration area */
3452 device_id = ent->device; 3458 device_id = ent->device;
3453 card->hw.irq = pdev->irq; 3459 card->hw.irq = pdev->irq;
@@ -3507,7 +3513,6 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3507 printk("PC300 found at RAM 0x%08x, " 3513 printk("PC300 found at RAM 0x%08x, "
3508 "but could not allocate PLX mem region.\n", 3514 "but could not allocate PLX mem region.\n",
3509 card->hw.ramphys); 3515 card->hw.ramphys);
3510 err = -ENODEV;
3511 goto err_release_io; 3516 goto err_release_io;
3512 } 3517 }
3513 if (!request_mem_region(card->hw.ramphys, card->hw.alloc_ramsize, 3518 if (!request_mem_region(card->hw.ramphys, card->hw.alloc_ramsize,
@@ -3515,7 +3520,6 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3515 printk("PC300 found at RAM 0x%08x, " 3520 printk("PC300 found at RAM 0x%08x, "
3516 "but could not allocate RAM mem region.\n", 3521 "but could not allocate RAM mem region.\n",
3517 card->hw.ramphys); 3522 card->hw.ramphys);
3518 err = -ENODEV;
3519 goto err_release_plx; 3523 goto err_release_plx;
3520 } 3524 }
3521 if (!request_mem_region(card->hw.scaphys, card->hw.scasize, 3525 if (!request_mem_region(card->hw.scaphys, card->hw.scasize,
@@ -3523,13 +3527,9 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3523 printk("PC300 found at RAM 0x%08x, " 3527 printk("PC300 found at RAM 0x%08x, "
3524 "but could not allocate SCA mem region.\n", 3528 "but could not allocate SCA mem region.\n",
3525 card->hw.ramphys); 3529 card->hw.ramphys);
3526 err = -ENODEV;
3527 goto err_release_ram; 3530 goto err_release_ram;
3528 } 3531 }
3529 3532
3530 if ((err = pci_enable_device(pdev)) != 0)
3531 goto err_release_sca;
3532
3533 card->hw.plxbase = ioremap(card->hw.plxphys, card->hw.plxsize); 3533 card->hw.plxbase = ioremap(card->hw.plxphys, card->hw.plxsize);
3534 card->hw.rambase = ioremap(card->hw.ramphys, card->hw.alloc_ramsize); 3534 card->hw.rambase = ioremap(card->hw.ramphys, card->hw.alloc_ramsize);
3535 card->hw.scabase = ioremap(card->hw.scaphys, card->hw.scasize); 3535 card->hw.scabase = ioremap(card->hw.scaphys, card->hw.scasize);
@@ -3619,7 +3619,6 @@ err_io_unmap:
3619 iounmap(card->hw.falcbase); 3619 iounmap(card->hw.falcbase);
3620 release_mem_region(card->hw.falcphys, card->hw.falcsize); 3620 release_mem_region(card->hw.falcphys, card->hw.falcsize);
3621 } 3621 }
3622err_release_sca:
3623 release_mem_region(card->hw.scaphys, card->hw.scasize); 3622 release_mem_region(card->hw.scaphys, card->hw.scasize);
3624err_release_ram: 3623err_release_ram:
3625 release_mem_region(card->hw.ramphys, card->hw.alloc_ramsize); 3624 release_mem_region(card->hw.ramphys, card->hw.alloc_ramsize);
@@ -3628,7 +3627,9 @@ err_release_plx:
3628err_release_io: 3627err_release_io:
3629 release_region(card->hw.iophys, card->hw.iosize); 3628 release_region(card->hw.iophys, card->hw.iosize);
3630 kfree(card); 3629 kfree(card);
3631 return -ENODEV; 3630err_disable_dev:
3631 pci_disable_device(pdev);
3632 return err;
3632} 3633}
3633 3634
3634static void __devexit cpc_remove_one(struct pci_dev *pdev) 3635static void __devexit cpc_remove_one(struct pci_dev *pdev)
@@ -3662,6 +3663,7 @@ static void __devexit cpc_remove_one(struct pci_dev *pdev)
3662 if (card->hw.irq) 3663 if (card->hw.irq)
3663 free_irq(card->hw.irq, card); 3664 free_irq(card->hw.irq, card);
3664 kfree(card); 3665 kfree(card);
3666 pci_disable_device(pdev);
3665 } 3667 }
3666} 3668}
3667 3669
diff --git a/drivers/net/wan/pc300_tty.c b/drivers/net/wan/pc300_tty.c
index 29f84ad08730..8454bf6caaa7 100644
--- a/drivers/net/wan/pc300_tty.c
+++ b/drivers/net/wan/pc300_tty.c
@@ -400,10 +400,8 @@ static void cpc_tty_close(struct tty_struct *tty, struct file *flip)
400 cpc_tty->buf_rx.last = NULL; 400 cpc_tty->buf_rx.last = NULL;
401 } 401 }
402 402
403 if (cpc_tty->buf_tx) { 403 kfree(cpc_tty->buf_tx);
404 kfree(cpc_tty->buf_tx); 404 cpc_tty->buf_tx = NULL;
405 cpc_tty->buf_tx = NULL;
406 }
407 405
408 CPC_TTY_DBG("%s: TTY closed\n",cpc_tty->name); 406 CPC_TTY_DBG("%s: TTY closed\n",cpc_tty->name);
409 407
@@ -666,7 +664,7 @@ static void cpc_tty_rx_work(void * data)
666 unsigned long port; 664 unsigned long port;
667 int i, j; 665 int i, j;
668 st_cpc_tty_area *cpc_tty; 666 st_cpc_tty_area *cpc_tty;
669 volatile st_cpc_rx_buf * buf; 667 volatile st_cpc_rx_buf *buf;
670 char flags=0,flg_rx=1; 668 char flags=0,flg_rx=1;
671 struct tty_ldisc *ld; 669 struct tty_ldisc *ld;
672 670
@@ -680,9 +678,9 @@ static void cpc_tty_rx_work(void * data)
680 cpc_tty = &cpc_tty_area[port]; 678 cpc_tty = &cpc_tty_area[port];
681 679
682 if ((buf=cpc_tty->buf_rx.first) != 0) { 680 if ((buf=cpc_tty->buf_rx.first) != 0) {
683 if(cpc_tty->tty) { 681 if (cpc_tty->tty) {
684 ld = tty_ldisc_ref(cpc_tty->tty); 682 ld = tty_ldisc_ref(cpc_tty->tty);
685 if(ld) { 683 if (ld) {
686 if (ld->receive_buf) { 684 if (ld->receive_buf) {
687 CPC_TTY_DBG("%s: call line disc. receive_buf\n",cpc_tty->name); 685 CPC_TTY_DBG("%s: call line disc. receive_buf\n",cpc_tty->name);
688 ld->receive_buf(cpc_tty->tty, (char *)(buf->data), &flags, buf->size); 686 ld->receive_buf(cpc_tty->tty, (char *)(buf->data), &flags, buf->size);
@@ -691,7 +689,7 @@ static void cpc_tty_rx_work(void * data)
691 } 689 }
692 } 690 }
693 cpc_tty->buf_rx.first = cpc_tty->buf_rx.first->next; 691 cpc_tty->buf_rx.first = cpc_tty->buf_rx.first->next;
694 kfree((unsigned char *)buf); 692 kfree(buf);
695 buf = cpc_tty->buf_rx.first; 693 buf = cpc_tty->buf_rx.first;
696 flg_rx = 1; 694 flg_rx = 1;
697 } 695 }
@@ -733,7 +731,7 @@ static void cpc_tty_rx_disc_frame(pc300ch_t *pc300chan)
733 731
734void cpc_tty_receive(pc300dev_t *pc300dev) 732void cpc_tty_receive(pc300dev_t *pc300dev)
735{ 733{
736 st_cpc_tty_area *cpc_tty; 734 st_cpc_tty_area *cpc_tty;
737 pc300ch_t *pc300chan = (pc300ch_t *)pc300dev->chan; 735 pc300ch_t *pc300chan = (pc300ch_t *)pc300dev->chan;
738 pc300_t *card = (pc300_t *)pc300chan->card; 736 pc300_t *card = (pc300_t *)pc300chan->card;
739 int ch = pc300chan->channel; 737 int ch = pc300chan->channel;
@@ -742,7 +740,7 @@ void cpc_tty_receive(pc300dev_t *pc300dev)
742 int rx_len, rx_aux; 740 int rx_len, rx_aux;
743 volatile unsigned char status; 741 volatile unsigned char status;
744 unsigned short first_bd = pc300chan->rx_first_bd; 742 unsigned short first_bd = pc300chan->rx_first_bd;
745 st_cpc_rx_buf *new=NULL; 743 st_cpc_rx_buf *new = NULL;
746 unsigned char dsr_rx; 744 unsigned char dsr_rx;
747 745
748 if (pc300dev->cpc_tty == NULL) { 746 if (pc300dev->cpc_tty == NULL) {
@@ -762,7 +760,7 @@ void cpc_tty_receive(pc300dev_t *pc300dev)
762 if (status & DST_EOM) { 760 if (status & DST_EOM) {
763 break; 761 break;
764 } 762 }
765 ptdescr=(pcsca_bd_t __iomem *)(card->hw.rambase+cpc_readl(&ptdescr->next)); 763 ptdescr = (pcsca_bd_t __iomem *)(card->hw.rambase+cpc_readl(&ptdescr->next));
766 } 764 }
767 765
768 if (!rx_len) { 766 if (!rx_len) {
@@ -771,10 +769,7 @@ void cpc_tty_receive(pc300dev_t *pc300dev)
771 cpc_writel(card->hw.scabase + DRX_REG(EDAL, ch), 769 cpc_writel(card->hw.scabase + DRX_REG(EDAL, ch),
772 RX_BD_ADDR(ch, pc300chan->rx_last_bd)); 770 RX_BD_ADDR(ch, pc300chan->rx_last_bd));
773 } 771 }
774 if (new) { 772 kfree(new);
775 kfree(new);
776 new = NULL;
777 }
778 return; 773 return;
779 } 774 }
780 775
@@ -787,7 +782,7 @@ void cpc_tty_receive(pc300dev_t *pc300dev)
787 continue; 782 continue;
788 } 783 }
789 784
790 new = (st_cpc_rx_buf *) kmalloc(rx_len + sizeof(st_cpc_rx_buf), GFP_ATOMIC); 785 new = (st_cpc_rx_buf *)kmalloc(rx_len + sizeof(st_cpc_rx_buf), GFP_ATOMIC);
791 if (new == 0) { 786 if (new == 0) {
792 cpc_tty_rx_disc_frame(pc300chan); 787 cpc_tty_rx_disc_frame(pc300chan);
793 continue; 788 continue;
diff --git a/drivers/net/wan/sdla_chdlc.c b/drivers/net/wan/sdla_chdlc.c
index afbe0024e3e1..496d29237e92 100644
--- a/drivers/net/wan/sdla_chdlc.c
+++ b/drivers/net/wan/sdla_chdlc.c
@@ -3664,15 +3664,10 @@ static void wanpipe_tty_close(struct tty_struct *tty, struct file * filp)
3664 chdlc_disable_comm_shutdown(card); 3664 chdlc_disable_comm_shutdown(card);
3665 unlock_adapter_irq(&card->wandev.lock,&smp_flags); 3665 unlock_adapter_irq(&card->wandev.lock,&smp_flags);
3666 3666
3667 if (card->tty_buf){ 3667 kfree(card->tty_buf);
3668 kfree(card->tty_buf); 3668 card->tty_buf = NULL;
3669 card->tty_buf=NULL; 3669 kfree(card->tty_rx);
3670 } 3670 card->tty_rx = NULL;
3671
3672 if (card->tty_rx){
3673 kfree(card->tty_rx);
3674 card->tty_rx=NULL;
3675 }
3676 } 3671 }
3677 return; 3672 return;
3678} 3673}
diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c
index 8c5cfcb55826..1c540d825551 100644
--- a/drivers/net/wan/x25_asy.c
+++ b/drivers/net/wan/x25_asy.c
@@ -107,13 +107,9 @@ static struct x25_asy *x25_asy_alloc(void)
107static void x25_asy_free(struct x25_asy *sl) 107static void x25_asy_free(struct x25_asy *sl)
108{ 108{
109 /* Free all X.25 frame buffers. */ 109 /* Free all X.25 frame buffers. */
110 if (sl->rbuff) { 110 kfree(sl->rbuff);
111 kfree(sl->rbuff);
112 }
113 sl->rbuff = NULL; 111 sl->rbuff = NULL;
114 if (sl->xbuff) { 112 kfree(sl->xbuff);
115 kfree(sl->xbuff);
116 }
117 sl->xbuff = NULL; 113 sl->xbuff = NULL;
118 114
119 if (!test_and_clear_bit(SLF_INUSE, &sl->flags)) { 115 if (!test_and_clear_bit(SLF_INUSE, &sl->flags)) {
@@ -134,10 +130,8 @@ static int x25_asy_change_mtu(struct net_device *dev, int newmtu)
134 { 130 {
135 printk("%s: unable to grow X.25 buffers, MTU change cancelled.\n", 131 printk("%s: unable to grow X.25 buffers, MTU change cancelled.\n",
136 dev->name); 132 dev->name);
137 if (xbuff != NULL) 133 kfree(xbuff);
138 kfree(xbuff); 134 kfree(rbuff);
139 if (rbuff != NULL)
140 kfree(rbuff);
141 return -ENOMEM; 135 return -ENOMEM;
142 } 136 }
143 137
@@ -169,10 +163,8 @@ static int x25_asy_change_mtu(struct net_device *dev, int newmtu)
169 163
170 spin_unlock_bh(&sl->lock); 164 spin_unlock_bh(&sl->lock);
171 165
172 if (xbuff != NULL) 166 kfree(xbuff);
173 kfree(xbuff); 167 kfree(rbuff);
174 if (rbuff != NULL)
175 kfree(rbuff);
176 return 0; 168 return 0;
177} 169}
178 170
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-21 07:07:25 -0500