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-rw-r--r--drivers/net/Kconfig1
-rw-r--r--drivers/net/Makefile1
-rw-r--r--drivers/net/fec_8xx/Kconfig20
-rw-r--r--drivers/net/fec_8xx/Makefile12
-rw-r--r--drivers/net/fec_8xx/fec_8xx-netta.c151
-rw-r--r--drivers/net/fec_8xx/fec_8xx.h220
-rw-r--r--drivers/net/fec_8xx/fec_main.c1264
-rw-r--r--drivers/net/fec_8xx/fec_mii.c418
-rw-r--r--drivers/net/fs_enet/fs_enet-main.c2
-rw-r--r--drivers/net/fs_enet/mac-scc.c2
-rw-r--r--drivers/net/fs_enet/mii-fec.c2
-rw-r--r--drivers/net/ibm_newemac/core.c61
-rw-r--r--drivers/net/ibm_newemac/core.h85
-rw-r--r--drivers/net/ibm_newemac/debug.c52
-rw-r--r--drivers/net/ibm_newemac/emac.h101
-rw-r--r--drivers/net/ibm_newemac/rgmii.c6
-rw-r--r--drivers/net/netconsole.c10
-rw-r--r--drivers/net/ucc_geth.c2
-rw-r--r--drivers/net/ucc_geth_mii.c2
-rw-r--r--drivers/net/wireless/libertas/if_sdio.c20
20 files changed, 257 insertions, 2175 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 45a41b597da9..2683ee32fc11 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1884,7 +1884,6 @@ config NE_H8300
1884 Say Y here if you want to use the NE2000 compatible 1884 Say Y here if you want to use the NE2000 compatible
1885 controller on the Renesas H8/300 processor. 1885 controller on the Renesas H8/300 processor.
1886 1886
1887source "drivers/net/fec_8xx/Kconfig"
1888source "drivers/net/fs_enet/Kconfig" 1887source "drivers/net/fs_enet/Kconfig"
1889 1888
1890endif # NET_ETHERNET 1889endif # NET_ETHERNET
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index dcbfe8421154..9010e58da0f2 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -217,7 +217,6 @@ obj-$(CONFIG_SMC91X) += smc91x.o
217obj-$(CONFIG_SMC911X) += smc911x.o 217obj-$(CONFIG_SMC911X) += smc911x.o
218obj-$(CONFIG_BFIN_MAC) += bfin_mac.o 218obj-$(CONFIG_BFIN_MAC) += bfin_mac.o
219obj-$(CONFIG_DM9000) += dm9000.o 219obj-$(CONFIG_DM9000) += dm9000.o
220obj-$(CONFIG_FEC_8XX) += fec_8xx/
221obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o 220obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o
222pasemi_mac_driver-objs := pasemi_mac.o pasemi_mac_ethtool.o 221pasemi_mac_driver-objs := pasemi_mac.o pasemi_mac_ethtool.o
223obj-$(CONFIG_MLX4_CORE) += mlx4/ 222obj-$(CONFIG_MLX4_CORE) += mlx4/
diff --git a/drivers/net/fec_8xx/Kconfig b/drivers/net/fec_8xx/Kconfig
deleted file mode 100644
index afb34ded26ee..000000000000
--- a/drivers/net/fec_8xx/Kconfig
+++ /dev/null
@@ -1,20 +0,0 @@
1config FEC_8XX
2 tristate "Motorola 8xx FEC driver"
3 depends on 8XX
4 select MII
5
6config FEC_8XX_GENERIC_PHY
7 bool "Support any generic PHY"
8 depends on FEC_8XX
9 default y
10
11config FEC_8XX_DM9161_PHY
12 bool "Support DM9161 PHY"
13 depends on FEC_8XX
14 default n
15
16config FEC_8XX_LXT971_PHY
17 bool "Support LXT971/LXT972 PHY"
18 depends on FEC_8XX
19 default n
20
diff --git a/drivers/net/fec_8xx/Makefile b/drivers/net/fec_8xx/Makefile
deleted file mode 100644
index 70c54f8c48e5..000000000000
--- a/drivers/net/fec_8xx/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1#
2# Makefile for the Motorola 8xx FEC ethernet controller
3#
4
5obj-$(CONFIG_FEC_8XX) += fec_8xx.o
6
7fec_8xx-objs := fec_main.o fec_mii.o
8
9# the platform instantatiation objects
10ifeq ($(CONFIG_NETTA),y)
11fec_8xx-objs += fec_8xx-netta.o
12endif
diff --git a/drivers/net/fec_8xx/fec_8xx-netta.c b/drivers/net/fec_8xx/fec_8xx-netta.c
deleted file mode 100644
index 79deee222e28..000000000000
--- a/drivers/net/fec_8xx/fec_8xx-netta.c
+++ /dev/null
@@ -1,151 +0,0 @@
1/*
2 * FEC instantatiation file for NETTA
3 */
4
5#include <linux/kernel.h>
6#include <linux/types.h>
7#include <linux/string.h>
8#include <linux/ptrace.h>
9#include <linux/errno.h>
10#include <linux/ioport.h>
11#include <linux/slab.h>
12#include <linux/interrupt.h>
13#include <linux/pci.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/netdevice.h>
17#include <linux/etherdevice.h>
18#include <linux/skbuff.h>
19#include <linux/spinlock.h>
20#include <linux/mii.h>
21#include <linux/ethtool.h>
22#include <linux/bitops.h>
23
24#include <asm/8xx_immap.h>
25#include <asm/pgtable.h>
26#include <asm/mpc8xx.h>
27#include <asm/irq.h>
28#include <asm/uaccess.h>
29#include <asm/cpm1.h>
30
31#include "fec_8xx.h"
32
33/*************************************************/
34
35static struct fec_platform_info fec1_info = {
36 .fec_no = 0,
37 .use_mdio = 1,
38 .phy_addr = 8,
39 .fec_irq = SIU_LEVEL1,
40 .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC6,
41 .rx_ring = 128,
42 .tx_ring = 16,
43 .rx_copybreak = 240,
44 .use_napi = 1,
45 .napi_weight = 17,
46};
47
48static struct fec_platform_info fec2_info = {
49 .fec_no = 1,
50 .use_mdio = 1,
51 .phy_addr = 2,
52 .fec_irq = SIU_LEVEL3,
53 .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC7,
54 .rx_ring = 128,
55 .tx_ring = 16,
56 .rx_copybreak = 240,
57 .use_napi = 1,
58 .napi_weight = 17,
59};
60
61static struct net_device *fec1_dev;
62static struct net_device *fec2_dev;
63
64/* XXX custom u-boot & Linux startup needed */
65extern const char *__fw_getenv(const char *var);
66
67/* access ports */
68#define setbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) | (_v))
69#define clrbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) & ~(_v))
70
71#define setbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) | (_v))
72#define clrbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) & ~(_v))
73
74int fec_8xx_platform_init(void)
75{
76 immap_t *immap = (immap_t *)IMAP_ADDR;
77 bd_t *bd = (bd_t *) __res;
78 const char *s;
79 char *e;
80 int i;
81
82 /* use MDC for MII */
83 setbits16(immap->im_ioport.iop_pdpar, 0x0080);
84 clrbits16(immap->im_ioport.iop_pddir, 0x0080);
85
86 /* configure FEC1 pins */
87 setbits16(immap->im_ioport.iop_papar, 0xe810);
88 setbits16(immap->im_ioport.iop_padir, 0x0810);
89 clrbits16(immap->im_ioport.iop_padir, 0xe000);
90
91 setbits32(immap->im_cpm.cp_pbpar, 0x00000001);
92 clrbits32(immap->im_cpm.cp_pbdir, 0x00000001);
93
94 setbits32(immap->im_cpm.cp_cptr, 0x00000100);
95 clrbits32(immap->im_cpm.cp_cptr, 0x00000050);
96
97 clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
98 clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
99 clrbits16(immap->im_ioport.iop_pcso, 0x0200);
100 setbits16(immap->im_ioport.iop_pcint, 0x0200);
101
102 /* configure FEC2 pins */
103 setbits32(immap->im_cpm.cp_pepar, 0x00039620);
104 setbits32(immap->im_cpm.cp_pedir, 0x00039620);
105 setbits32(immap->im_cpm.cp_peso, 0x00031000);
106 clrbits32(immap->im_cpm.cp_peso, 0x00008620);
107
108 setbits32(immap->im_cpm.cp_cptr, 0x00000080);
109 clrbits32(immap->im_cpm.cp_cptr, 0x00000028);
110
111 clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
112 clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
113 clrbits16(immap->im_ioport.iop_pcso, 0x0200);
114 setbits16(immap->im_ioport.iop_pcint, 0x0200);
115
116 /* fill up */
117 fec1_info.sys_clk = bd->bi_intfreq;
118 fec2_info.sys_clk = bd->bi_intfreq;
119
120 s = __fw_getenv("ethaddr");
121 if (s != NULL) {
122 for (i = 0; i < 6; i++) {
123 fec1_info.macaddr[i] = simple_strtoul(s, &e, 16);
124 if (*e)
125 s = e + 1;
126 }
127 }
128
129 s = __fw_getenv("eth1addr");
130 if (s != NULL) {
131 for (i = 0; i < 6; i++) {
132 fec2_info.macaddr[i] = simple_strtoul(s, &e, 16);
133 if (*e)
134 s = e + 1;
135 }
136 }
137
138 fec_8xx_init_one(&fec1_info, &fec1_dev);
139 fec_8xx_init_one(&fec2_info, &fec2_dev);
140
141 return fec1_dev != NULL && fec2_dev != NULL ? 0 : -1;
142}
143
144void fec_8xx_platform_cleanup(void)
145{
146 if (fec2_dev != NULL)
147 fec_8xx_cleanup_one(fec2_dev);
148
149 if (fec1_dev != NULL)
150 fec_8xx_cleanup_one(fec1_dev);
151}
diff --git a/drivers/net/fec_8xx/fec_8xx.h b/drivers/net/fec_8xx/fec_8xx.h
deleted file mode 100644
index f3b1c6fbba8b..000000000000
--- a/drivers/net/fec_8xx/fec_8xx.h
+++ /dev/null
@@ -1,220 +0,0 @@
1#ifndef FEC_8XX_H
2#define FEC_8XX_H
3
4#include <linux/mii.h>
5#include <linux/netdevice.h>
6
7#include <linux/types.h>
8
9/* HW info */
10
11/* CRC polynomium used by the FEC for the multicast group filtering */
12#define FEC_CRC_POLY 0x04C11DB7
13
14#define MII_ADVERTISE_HALF (ADVERTISE_100HALF | \
15 ADVERTISE_10HALF | ADVERTISE_CSMA)
16#define MII_ADVERTISE_ALL (ADVERTISE_100FULL | \
17 ADVERTISE_10FULL | MII_ADVERTISE_HALF)
18
19/* Interrupt events/masks.
20*/
21#define FEC_ENET_HBERR 0x80000000U /* Heartbeat error */
22#define FEC_ENET_BABR 0x40000000U /* Babbling receiver */
23#define FEC_ENET_BABT 0x20000000U /* Babbling transmitter */
24#define FEC_ENET_GRA 0x10000000U /* Graceful stop complete */
25#define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */
26#define FEC_ENET_TXB 0x04000000U /* A buffer was transmitted */
27#define FEC_ENET_RXF 0x02000000U /* Full frame received */
28#define FEC_ENET_RXB 0x01000000U /* A buffer was received */
29#define FEC_ENET_MII 0x00800000U /* MII interrupt */
30#define FEC_ENET_EBERR 0x00400000U /* SDMA bus error */
31
32#define FEC_ECNTRL_PINMUX 0x00000004
33#define FEC_ECNTRL_ETHER_EN 0x00000002
34#define FEC_ECNTRL_RESET 0x00000001
35
36#define FEC_RCNTRL_BC_REJ 0x00000010
37#define FEC_RCNTRL_PROM 0x00000008
38#define FEC_RCNTRL_MII_MODE 0x00000004
39#define FEC_RCNTRL_DRT 0x00000002
40#define FEC_RCNTRL_LOOP 0x00000001
41
42#define FEC_TCNTRL_FDEN 0x00000004
43#define FEC_TCNTRL_HBC 0x00000002
44#define FEC_TCNTRL_GTS 0x00000001
45
46/* values for MII phy_status */
47
48#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
49#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
50#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
51#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
52#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
53#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
54#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
55
56#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
57#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
58#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
59#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
60#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
61#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
62#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
63#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
64
65typedef struct phy_info {
66 unsigned int id;
67 const char *name;
68 void (*startup) (struct net_device * dev);
69 void (*shutdown) (struct net_device * dev);
70 void (*ack_int) (struct net_device * dev);
71} phy_info_t;
72
73/* The FEC stores dest/src/type, data, and checksum for receive packets.
74 */
75#define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */
76#define MIN_MTU 46 /* this is data size */
77#define CRC_LEN 4
78
79#define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN)
80#define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN)
81
82/* Must be a multiple of 4 */
83#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE+3) & ~3)
84/* This is needed so that invalidate_xxx wont invalidate too much */
85#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
86
87/* platform interface */
88
89struct fec_platform_info {
90 int fec_no; /* FEC index */
91 int use_mdio; /* use external MII */
92 int phy_addr; /* the phy address */
93 int fec_irq, phy_irq; /* the irq for the controller */
94 int rx_ring, tx_ring; /* number of buffers on rx */
95 int sys_clk; /* system clock */
96 __u8 macaddr[6]; /* mac address */
97 int rx_copybreak; /* limit we copy small frames */
98 int use_napi; /* use NAPI */
99 int napi_weight; /* NAPI weight */
100};
101
102/* forward declaration */
103struct fec;
104
105struct fec_enet_private {
106 spinlock_t lock; /* during all ops except TX pckt processing */
107 spinlock_t tx_lock; /* during fec_start_xmit and fec_tx */
108 struct net_device *dev;
109 struct napi_struct napi;
110 int fecno;
111 struct fec *fecp;
112 const struct fec_platform_info *fpi;
113 int rx_ring, tx_ring;
114 dma_addr_t ring_mem_addr;
115 void *ring_base;
116 struct sk_buff **rx_skbuff;
117 struct sk_buff **tx_skbuff;
118 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
119 cbd_t *tx_bd_base;
120 cbd_t *dirty_tx; /* ring entries to be free()ed. */
121 cbd_t *cur_rx;
122 cbd_t *cur_tx;
123 int tx_free;
124 struct net_device_stats stats;
125 struct timer_list phy_timer_list;
126 const struct phy_info *phy;
127 unsigned int fec_phy_speed;
128 __u32 msg_enable;
129 struct mii_if_info mii_if;
130};
131
132/***************************************************************************/
133
134void fec_restart(struct net_device *dev, int duplex, int speed);
135void fec_stop(struct net_device *dev);
136
137/***************************************************************************/
138
139int fec_mii_read(struct net_device *dev, int phy_id, int location);
140void fec_mii_write(struct net_device *dev, int phy_id, int location, int value);
141
142int fec_mii_phy_id_detect(struct net_device *dev);
143void fec_mii_startup(struct net_device *dev);
144void fec_mii_shutdown(struct net_device *dev);
145void fec_mii_ack_int(struct net_device *dev);
146
147void fec_mii_link_status_change_check(struct net_device *dev, int init_media);
148
149/***************************************************************************/
150
151#define FEC1_NO 0x00
152#define FEC2_NO 0x01
153#define FEC3_NO 0x02
154
155int fec_8xx_init_one(const struct fec_platform_info *fpi,
156 struct net_device **devp);
157int fec_8xx_cleanup_one(struct net_device *dev);
158
159/***************************************************************************/
160
161#define DRV_MODULE_NAME "fec_8xx"
162#define PFX DRV_MODULE_NAME ": "
163#define DRV_MODULE_VERSION "0.1"
164#define DRV_MODULE_RELDATE "May 6, 2004"
165
166/***************************************************************************/
167
168int fec_8xx_platform_init(void);
169void fec_8xx_platform_cleanup(void);
170
171/***************************************************************************/
172
173/* FEC access macros */
174#if defined(CONFIG_8xx)
175/* for a 8xx __raw_xxx's are sufficient */
176#define __fec_out32(addr, x) __raw_writel(x, addr)
177#define __fec_out16(addr, x) __raw_writew(x, addr)
178#define __fec_in32(addr) __raw_readl(addr)
179#define __fec_in16(addr) __raw_readw(addr)
180#else
181/* for others play it safe */
182#define __fec_out32(addr, x) out_be32(addr, x)
183#define __fec_out16(addr, x) out_be16(addr, x)
184#define __fec_in32(addr) in_be32(addr)
185#define __fec_in16(addr) in_be16(addr)
186#endif
187
188/* write */
189#define FW(_fecp, _reg, _v) __fec_out32(&(_fecp)->fec_ ## _reg, (_v))
190
191/* read */
192#define FR(_fecp, _reg) __fec_in32(&(_fecp)->fec_ ## _reg)
193
194/* set bits */
195#define FS(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) | (_v))
196
197/* clear bits */
198#define FC(_fecp, _reg, _v) FW(_fecp, _reg, FR(_fecp, _reg) & ~(_v))
199
200/* buffer descriptor access macros */
201
202/* write */
203#define CBDW_SC(_cbd, _sc) __fec_out16(&(_cbd)->cbd_sc, (_sc))
204#define CBDW_DATLEN(_cbd, _datlen) __fec_out16(&(_cbd)->cbd_datlen, (_datlen))
205#define CBDW_BUFADDR(_cbd, _bufaddr) __fec_out32(&(_cbd)->cbd_bufaddr, (_bufaddr))
206
207/* read */
208#define CBDR_SC(_cbd) __fec_in16(&(_cbd)->cbd_sc)
209#define CBDR_DATLEN(_cbd) __fec_in16(&(_cbd)->cbd_datlen)
210#define CBDR_BUFADDR(_cbd) __fec_in32(&(_cbd)->cbd_bufaddr)
211
212/* set bits */
213#define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc))
214
215/* clear bits */
216#define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc))
217
218/***************************************************************************/
219
220#endif
diff --git a/drivers/net/fec_8xx/fec_main.c b/drivers/net/fec_8xx/fec_main.c
deleted file mode 100644
index ca8d2e83ab03..000000000000
--- a/drivers/net/fec_8xx/fec_main.c
+++ /dev/null
@@ -1,1264 +0,0 @@
1/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
8 * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
9 *
10 * Released under the GPL
11 */
12
13#include <linux/module.h>
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/string.h>
17#include <linux/ptrace.h>
18#include <linux/errno.h>
19#include <linux/ioport.h>
20#include <linux/slab.h>
21#include <linux/interrupt.h>
22#include <linux/init.h>
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
27#include <linux/spinlock.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/bitops.h>
31#include <linux/dma-mapping.h>
32
33#include <asm/8xx_immap.h>
34#include <asm/pgtable.h>
35#include <asm/mpc8xx.h>
36#include <asm/irq.h>
37#include <asm/uaccess.h>
38#include <asm/cpm1.h>
39
40#include "fec_8xx.h"
41
42/*************************************************/
43
44#define FEC_MAX_MULTICAST_ADDRS 64
45
46/*************************************************/
47
48static char version[] __devinitdata =
49 DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
50
51MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
52MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver");
53MODULE_LICENSE("GPL");
54
55int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */
56module_param(fec_8xx_debug, int, 0);
57MODULE_PARM_DESC(fec_8xx_debug,
58 "FEC 8xx bitmapped debugging message enable value");
59
60
61/*************************************************/
62
63/*
64 * Delay to wait for FEC reset command to complete (in us)
65 */
66#define FEC_RESET_DELAY 50
67
68/*****************************************************************************************/
69
70static void fec_whack_reset(fec_t * fecp)
71{
72 int i;
73
74 /*
75 * Whack a reset. We should wait for this.
76 */
77 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
78 for (i = 0;
79 (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
80 i++)
81 udelay(1);
82
83 if (i == FEC_RESET_DELAY)
84 printk(KERN_WARNING "FEC Reset timeout!\n");
85
86}
87
88/****************************************************************************/
89
90/*
91 * Transmitter timeout.
92 */
93#define TX_TIMEOUT (2*HZ)
94
95/****************************************************************************/
96
97/*
98 * Returns the CRC needed when filling in the hash table for
99 * multicast group filtering
100 * pAddr must point to a MAC address (6 bytes)
101 */
102static __u32 fec_mulicast_calc_crc(char *pAddr)
103{
104 u8 byte;
105 int byte_count;
106 int bit_count;
107 __u32 crc = 0xffffffff;
108 u8 msb;
109
110 for (byte_count = 0; byte_count < 6; byte_count++) {
111 byte = pAddr[byte_count];
112 for (bit_count = 0; bit_count < 8; bit_count++) {
113 msb = crc >> 31;
114 crc <<= 1;
115 if (msb ^ (byte & 0x1)) {
116 crc ^= FEC_CRC_POLY;
117 }
118 byte >>= 1;
119 }
120 }
121 return (crc);
122}
123
124/*
125 * Set or clear the multicast filter for this adaptor.
126 * Skeleton taken from sunlance driver.
127 * The CPM Ethernet implementation allows Multicast as well as individual
128 * MAC address filtering. Some of the drivers check to make sure it is
129 * a group multicast address, and discard those that are not. I guess I
130 * will do the same for now, but just remove the test if you want
131 * individual filtering as well (do the upper net layers want or support
132 * this kind of feature?).
133 */
134static void fec_set_multicast_list(struct net_device *dev)
135{
136 struct fec_enet_private *fep = netdev_priv(dev);
137 fec_t *fecp = fep->fecp;
138 struct dev_mc_list *pmc;
139 __u32 crc;
140 int temp;
141 __u32 csrVal;
142 int hash_index;
143 __u32 hthi, htlo;
144 unsigned long flags;
145
146
147 if ((dev->flags & IFF_PROMISC) != 0) {
148
149 spin_lock_irqsave(&fep->lock, flags);
150 FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
151 spin_unlock_irqrestore(&fep->lock, flags);
152
153 /*
154 * Log any net taps.
155 */
156 printk(KERN_WARNING DRV_MODULE_NAME
157 ": %s: Promiscuous mode enabled.\n", dev->name);
158 return;
159
160 }
161
162 if ((dev->flags & IFF_ALLMULTI) != 0 ||
163 dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
164 /*
165 * Catch all multicast addresses, set the filter to all 1's.
166 */
167 hthi = 0xffffffffU;
168 htlo = 0xffffffffU;
169 } else {
170 hthi = 0;
171 htlo = 0;
172
173 /*
174 * Now populate the hash table
175 */
176 for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) {
177 crc = fec_mulicast_calc_crc(pmc->dmi_addr);
178 temp = (crc & 0x3f) >> 1;
179 hash_index = ((temp & 0x01) << 4) |
180 ((temp & 0x02) << 2) |
181 ((temp & 0x04)) |
182 ((temp & 0x08) >> 2) |
183 ((temp & 0x10) >> 4);
184 csrVal = (1 << hash_index);
185 if (crc & 1)
186 hthi |= csrVal;
187 else
188 htlo |= csrVal;
189 }
190 }
191
192 spin_lock_irqsave(&fep->lock, flags);
193 FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
194 FW(fecp, hash_table_high, hthi);
195 FW(fecp, hash_table_low, htlo);
196 spin_unlock_irqrestore(&fep->lock, flags);
197}
198
199static int fec_set_mac_address(struct net_device *dev, void *addr)
200{
201 struct sockaddr *mac = addr;
202 struct fec_enet_private *fep = netdev_priv(dev);
203 struct fec *fecp = fep->fecp;
204 int i;
205 __u32 addrhi, addrlo;
206 unsigned long flags;
207
208 /* Get pointer to SCC area in parameter RAM. */
209 for (i = 0; i < 6; i++)
210 dev->dev_addr[i] = mac->sa_data[i];
211
212 /*
213 * Set station address.
214 */
215 addrhi = ((__u32) dev->dev_addr[0] << 24) |
216 ((__u32) dev->dev_addr[1] << 16) |
217 ((__u32) dev->dev_addr[2] << 8) |
218 (__u32) dev->dev_addr[3];
219 addrlo = ((__u32) dev->dev_addr[4] << 24) |
220 ((__u32) dev->dev_addr[5] << 16);
221
222 spin_lock_irqsave(&fep->lock, flags);
223 FW(fecp, addr_low, addrhi);
224 FW(fecp, addr_high, addrlo);
225 spin_unlock_irqrestore(&fep->lock, flags);
226
227 return 0;
228}
229
230/*
231 * This function is called to start or restart the FEC during a link
232 * change. This only happens when switching between half and full
233 * duplex.
234 */
235void fec_restart(struct net_device *dev, int duplex, int speed)
236{
237#ifdef CONFIG_DUET
238 immap_t *immap = (immap_t *) IMAP_ADDR;
239 __u32 cptr;
240#endif
241 struct fec_enet_private *fep = netdev_priv(dev);
242 struct fec *fecp = fep->fecp;
243 const struct fec_platform_info *fpi = fep->fpi;
244 cbd_t *bdp;
245 struct sk_buff *skb;
246 int i;
247 __u32 addrhi, addrlo;
248
249 fec_whack_reset(fep->fecp);
250
251 /*
252 * Set station address.
253 */
254 addrhi = ((__u32) dev->dev_addr[0] << 24) |
255 ((__u32) dev->dev_addr[1] << 16) |
256 ((__u32) dev->dev_addr[2] << 8) |
257 (__u32) dev->dev_addr[3];
258 addrlo = ((__u32) dev->dev_addr[4] << 24) |
259 ((__u32) dev->dev_addr[5] << 16);
260 FW(fecp, addr_low, addrhi);
261 FW(fecp, addr_high, addrlo);
262
263 /*
264 * Reset all multicast.
265 */
266 FW(fecp, hash_table_high, 0);
267 FW(fecp, hash_table_low, 0);
268
269 /*
270 * Set maximum receive buffer size.
271 */
272 FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
273 FW(fecp, r_hash, PKT_MAXBUF_SIZE);
274
275 /*
276 * Set receive and transmit descriptor base.
277 */
278 FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base)));
279 FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base)));
280
281 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
282 fep->tx_free = fep->tx_ring;
283 fep->cur_rx = fep->rx_bd_base;
284
285 /*
286 * Reset SKB receive buffers
287 */
288 for (i = 0; i < fep->rx_ring; i++) {
289 if ((skb = fep->rx_skbuff[i]) == NULL)
290 continue;
291 fep->rx_skbuff[i] = NULL;
292 dev_kfree_skb(skb);
293 }
294
295 /*
296 * Initialize the receive buffer descriptors.
297 */
298 for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
299 skb = dev_alloc_skb(ENET_RX_FRSIZE);
300 if (skb == NULL) {
301 printk(KERN_WARNING DRV_MODULE_NAME
302 ": %s Memory squeeze, unable to allocate skb\n",
303 dev->name);
304 fep->stats.rx_dropped++;
305 break;
306 }
307 fep->rx_skbuff[i] = skb;
308 skb->dev = dev;
309 CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
310 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
311 DMA_FROM_DEVICE));
312 CBDW_DATLEN(bdp, 0); /* zero */
313 CBDW_SC(bdp, BD_ENET_RX_EMPTY |
314 ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
315 }
316 /*
317 * if we failed, fillup remainder
318 */
319 for (; i < fep->rx_ring; i++, bdp++) {
320 fep->rx_skbuff[i] = NULL;
321 CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
322 }
323
324 /*
325 * Reset SKB transmit buffers.
326 */
327 for (i = 0; i < fep->tx_ring; i++) {
328 if ((skb = fep->tx_skbuff[i]) == NULL)
329 continue;
330 fep->tx_skbuff[i] = NULL;
331 dev_kfree_skb(skb);
332 }
333
334 /*
335 * ...and the same for transmit.
336 */
337 for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
338 fep->tx_skbuff[i] = NULL;
339 CBDW_BUFADDR(bdp, virt_to_bus(NULL));
340 CBDW_DATLEN(bdp, 0);
341 CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
342 }
343
344 /*
345 * Enable big endian and don't care about SDMA FC.
346 */
347 FW(fecp, fun_code, 0x78000000);
348
349 /*
350 * Set MII speed.
351 */
352 FW(fecp, mii_speed, fep->fec_phy_speed);
353
354 /*
355 * Clear any outstanding interrupt.
356 */
357 FW(fecp, ievent, 0xffc0);
358 FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
359
360 /*
361 * adjust to speed (only for DUET & RMII)
362 */
363#ifdef CONFIG_DUET
364 cptr = in_be32(&immap->im_cpm.cp_cptr);
365 switch (fpi->fec_no) {
366 case 0:
367 /*
368 * check if in RMII mode
369 */
370 if ((cptr & 0x100) == 0)
371 break;
372
373 if (speed == 10)
374 cptr |= 0x0000010;
375 else if (speed == 100)
376 cptr &= ~0x0000010;
377 break;
378 case 1:
379 /*
380 * check if in RMII mode
381 */
382 if ((cptr & 0x80) == 0)
383 break;
384
385 if (speed == 10)
386 cptr |= 0x0000008;
387 else if (speed == 100)
388 cptr &= ~0x0000008;
389 break;
390 default:
391 break;
392 }
393 out_be32(&immap->im_cpm.cp_cptr, cptr);
394#endif
395
396 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
397 /*
398 * adjust to duplex mode
399 */
400 if (duplex) {
401 FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
402 FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
403 } else {
404 FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
405 FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
406 }
407
408 /*
409 * Enable interrupts we wish to service.
410 */
411 FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
412 FEC_ENET_RXF | FEC_ENET_RXB);
413
414 /*
415 * And last, enable the transmit and receive processing.
416 */
417 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
418 FW(fecp, r_des_active, 0x01000000);
419}
420
421void fec_stop(struct net_device *dev)
422{
423 struct fec_enet_private *fep = netdev_priv(dev);
424 fec_t *fecp = fep->fecp;
425 struct sk_buff *skb;
426 int i;
427
428 if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
429 return; /* already down */
430
431 FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
432 for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
433 i < FEC_RESET_DELAY; i++)
434 udelay(1);
435
436 if (i == FEC_RESET_DELAY)
437 printk(KERN_WARNING DRV_MODULE_NAME
438 ": %s FEC timeout on graceful transmit stop\n",
439 dev->name);
440 /*
441 * Disable FEC. Let only MII interrupts.
442 */
443 FW(fecp, imask, 0);
444 FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN);
445
446 /*
447 * Reset SKB transmit buffers.
448 */
449 for (i = 0; i < fep->tx_ring; i++) {
450 if ((skb = fep->tx_skbuff[i]) == NULL)
451 continue;
452 fep->tx_skbuff[i] = NULL;
453 dev_kfree_skb(skb);
454 }
455
456 /*
457 * Reset SKB receive buffers
458 */
459 for (i = 0; i < fep->rx_ring; i++) {
460 if ((skb = fep->rx_skbuff[i]) == NULL)
461 continue;
462 fep->rx_skbuff[i] = NULL;
463 dev_kfree_skb(skb);
464 }
465}
466
467/* common receive function */
468static int fec_enet_rx_common(struct fec_enet_private *ep,
469 struct net_device *dev, int budget)
470{
471 fec_t *fecp = fep->fecp;
472 const struct fec_platform_info *fpi = fep->fpi;
473 cbd_t *bdp;
474 struct sk_buff *skb, *skbn, *skbt;
475 int received = 0;
476 __u16 pkt_len, sc;
477 int curidx;
478
479 /*
480 * First, grab all of the stats for the incoming packet.
481 * These get messed up if we get called due to a busy condition.
482 */
483 bdp = fep->cur_rx;
484
485 /* clear RX status bits for napi*/
486 if (fpi->use_napi)
487 FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB);
488
489 while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
490
491 curidx = bdp - fep->rx_bd_base;
492
493 /*
494 * Since we have allocated space to hold a complete frame,
495 * the last indicator should be set.
496 */
497 if ((sc & BD_ENET_RX_LAST) == 0)
498 printk(KERN_WARNING DRV_MODULE_NAME
499 ": %s rcv is not +last\n",
500 dev->name);
501
502 /*
503 * Check for errors.
504 */
505 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
506 BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
507 fep->stats.rx_errors++;
508 /* Frame too long or too short. */
509 if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
510 fep->stats.rx_length_errors++;
511 /* Frame alignment */
512 if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
513 fep->stats.rx_frame_errors++;
514 /* CRC Error */
515 if (sc & BD_ENET_RX_CR)
516 fep->stats.rx_crc_errors++;
517 /* FIFO overrun */
518 if (sc & BD_ENET_RX_OV)
519 fep->stats.rx_crc_errors++;
520
521 skbn = fep->rx_skbuff[curidx];
522 BUG_ON(skbn == NULL);
523
524 } else {
525 skb = fep->rx_skbuff[curidx];
526 BUG_ON(skb == NULL);
527
528 /*
529 * Process the incoming frame.
530 */
531 fep->stats.rx_packets++;
532 pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
533 fep->stats.rx_bytes += pkt_len + 4;
534
535 if (pkt_len <= fpi->rx_copybreak) {
536 /* +2 to make IP header L1 cache aligned */
537 skbn = dev_alloc_skb(pkt_len + 2);
538 if (skbn != NULL) {
539 skb_reserve(skbn, 2); /* align IP header */
540 skb_copy_from_linear_data(skb,
541 skbn->data,
542 pkt_len);
543 /* swap */
544 skbt = skb;
545 skb = skbn;
546 skbn = skbt;
547 }
548 } else
549 skbn = dev_alloc_skb(ENET_RX_FRSIZE);
550
551 if (skbn != NULL) {
552 skb_put(skb, pkt_len); /* Make room */
553 skb->protocol = eth_type_trans(skb, dev);
554 received++;
555 if (!fpi->use_napi)
556 netif_rx(skb);
557 else
558 netif_receive_skb(skb);
559 } else {
560 printk(KERN_WARNING DRV_MODULE_NAME
561 ": %s Memory squeeze, dropping packet.\n",
562 dev->name);
563 fep->stats.rx_dropped++;
564 skbn = skb;
565 }
566 }
567
568 fep->rx_skbuff[curidx] = skbn;
569 CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data,
570 L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
571 DMA_FROM_DEVICE));
572 CBDW_DATLEN(bdp, 0);
573 CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
574
575 /*
576 * Update BD pointer to next entry.
577 */
578 if ((sc & BD_ENET_RX_WRAP) == 0)
579 bdp++;
580 else
581 bdp = fep->rx_bd_base;
582
583 /*
584 * Doing this here will keep the FEC running while we process
585 * incoming frames. On a heavily loaded network, we should be
586 * able to keep up at the expense of system resources.
587 */
588 FW(fecp, r_des_active, 0x01000000);
589
590 if (received >= budget)
591 break;
592
593 }
594
595 fep->cur_rx = bdp;
596
597 if (fpi->use_napi) {
598 if (received < budget) {
599 netif_rx_complete(dev, &fep->napi);
600
601 /* enable RX interrupt bits */
602 FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
603 }
604 }
605
606 return received;
607}
608
609static void fec_enet_tx(struct net_device *dev)
610{
611 struct fec_enet_private *fep = netdev_priv(dev);
612 cbd_t *bdp;
613 struct sk_buff *skb;
614 int dirtyidx, do_wake;
615 __u16 sc;
616
617 spin_lock(&fep->lock);
618 bdp = fep->dirty_tx;
619
620 do_wake = 0;
621 while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
622
623 dirtyidx = bdp - fep->tx_bd_base;
624
625 if (fep->tx_free == fep->tx_ring)
626 break;
627
628 skb = fep->tx_skbuff[dirtyidx];
629
630 /*
631 * Check for errors.
632 */
633 if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
634 BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
635 fep->stats.tx_errors++;
636 if (sc & BD_ENET_TX_HB) /* No heartbeat */
637 fep->stats.tx_heartbeat_errors++;
638 if (sc & BD_ENET_TX_LC) /* Late collision */
639 fep->stats.tx_window_errors++;
640 if (sc & BD_ENET_TX_RL) /* Retrans limit */
641 fep->stats.tx_aborted_errors++;
642 if (sc & BD_ENET_TX_UN) /* Underrun */
643 fep->stats.tx_fifo_errors++;
644 if (sc & BD_ENET_TX_CSL) /* Carrier lost */
645 fep->stats.tx_carrier_errors++;
646 } else
647 fep->stats.tx_packets++;
648
649 if (sc & BD_ENET_TX_READY)
650 printk(KERN_WARNING DRV_MODULE_NAME
651 ": %s HEY! Enet xmit interrupt and TX_READY.\n",
652 dev->name);
653
654 /*
655 * Deferred means some collisions occurred during transmit,
656 * but we eventually sent the packet OK.
657 */
658 if (sc & BD_ENET_TX_DEF)
659 fep->stats.collisions++;
660
661 /*
662 * Free the sk buffer associated with this last transmit.
663 */
664 dev_kfree_skb_irq(skb);
665 fep->tx_skbuff[dirtyidx] = NULL;
666
667 /*
668 * Update pointer to next buffer descriptor to be transmitted.
669 */
670 if ((sc & BD_ENET_TX_WRAP) == 0)
671 bdp++;
672 else
673 bdp = fep->tx_bd_base;
674
675 /*
676 * Since we have freed up a buffer, the ring is no longer
677 * full.
678 */
679 if (!fep->tx_free++)
680 do_wake = 1;
681 }
682
683 fep->dirty_tx = bdp;
684
685 spin_unlock(&fep->lock);
686
687 if (do_wake && netif_queue_stopped(dev))
688 netif_wake_queue(dev);
689}
690
691/*
692 * The interrupt handler.
693 * This is called from the MPC core interrupt.
694 */
695static irqreturn_t
696fec_enet_interrupt(int irq, void *dev_id)
697{
698 struct net_device *dev = dev_id;
699 struct fec_enet_private *fep;
700 const struct fec_platform_info *fpi;
701 fec_t *fecp;
702 __u32 int_events;
703 __u32 int_events_napi;
704
705 if (unlikely(dev == NULL))
706 return IRQ_NONE;
707
708 fep = netdev_priv(dev);
709 fecp = fep->fecp;
710 fpi = fep->fpi;
711
712 /*
713 * Get the interrupt events that caused us to be here.
714 */
715 while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) {
716
717 if (!fpi->use_napi)
718 FW(fecp, ievent, int_events);
719 else {
720 int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB);
721 FW(fecp, ievent, int_events_napi);
722 }
723
724 if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
725 FEC_ENET_BABT | FEC_ENET_EBERR)) != 0)
726 printk(KERN_WARNING DRV_MODULE_NAME
727 ": %s FEC ERROR(s) 0x%x\n",
728 dev->name, int_events);
729
730 if ((int_events & FEC_ENET_RXF) != 0) {
731 if (!fpi->use_napi)
732 fec_enet_rx_common(fep, dev, ~0);
733 else {
734 if (netif_rx_schedule_prep(dev, &fep->napi)) {
735 /* disable rx interrupts */
736 FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
737 __netif_rx_schedule(dev, &fep->napi);
738 } else {
739 printk(KERN_ERR DRV_MODULE_NAME
740 ": %s driver bug! interrupt while in poll!\n",
741 dev->name);
742 FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
743 }
744 }
745 }
746
747 if ((int_events & FEC_ENET_TXF) != 0)
748 fec_enet_tx(dev);
749 }
750
751 return IRQ_HANDLED;
752}
753
754/* This interrupt occurs when the PHY detects a link change. */
755static irqreturn_t
756fec_mii_link_interrupt(int irq, void *dev_id)
757{
758 struct net_device *dev = dev_id;
759 struct fec_enet_private *fep;
760 const struct fec_platform_info *fpi;
761
762 if (unlikely(dev == NULL))
763 return IRQ_NONE;
764
765 fep = netdev_priv(dev);
766 fpi = fep->fpi;
767
768 if (!fpi->use_mdio)
769 return IRQ_NONE;
770
771 /*
772 * Acknowledge the interrupt if possible. If we have not
773 * found the PHY yet we can't process or acknowledge the
774 * interrupt now. Instead we ignore this interrupt for now,
775 * which we can do since it is edge triggered. It will be
776 * acknowledged later by fec_enet_open().
777 */
778 if (!fep->phy)
779 return IRQ_NONE;
780
781 fec_mii_ack_int(dev);
782 fec_mii_link_status_change_check(dev, 0);
783
784 return IRQ_HANDLED;
785}
786
787
788/**********************************************************************************/
789
790static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
791{
792 struct fec_enet_private *fep = netdev_priv(dev);
793 fec_t *fecp = fep->fecp;
794 cbd_t *bdp;
795 int curidx;
796 unsigned long flags;
797
798 spin_lock_irqsave(&fep->tx_lock, flags);
799
800 /*
801 * Fill in a Tx ring entry
802 */
803 bdp = fep->cur_tx;
804
805 if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
806 netif_stop_queue(dev);
807 spin_unlock_irqrestore(&fep->tx_lock, flags);
808
809 /*
810 * Ooops. All transmit buffers are full. Bail out.
811 * This should not happen, since the tx queue should be stopped.
812 */
813 printk(KERN_WARNING DRV_MODULE_NAME
814 ": %s tx queue full!.\n", dev->name);
815 return 1;
816 }
817
818 curidx = bdp - fep->tx_bd_base;
819 /*
820 * Clear all of the status flags.
821 */
822 CBDC_SC(bdp, BD_ENET_TX_STATS);
823
824 /*
825 * Save skb pointer.
826 */
827 fep->tx_skbuff[curidx] = skb;
828
829 fep->stats.tx_bytes += skb->len;
830
831 /*
832 * Push the data cache so the CPM does not get stale memory data.
833 */
834 CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
835 skb->len, DMA_TO_DEVICE));
836 CBDW_DATLEN(bdp, skb->len);
837
838 dev->trans_start = jiffies;
839
840 /*
841 * If this was the last BD in the ring, start at the beginning again.
842 */
843 if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
844 fep->cur_tx++;
845 else
846 fep->cur_tx = fep->tx_bd_base;
847
848 if (!--fep->tx_free)
849 netif_stop_queue(dev);
850
851 /*
852 * Trigger transmission start
853 */
854 CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR |
855 BD_ENET_TX_LAST | BD_ENET_TX_TC);
856 FW(fecp, x_des_active, 0x01000000);
857
858 spin_unlock_irqrestore(&fep->tx_lock, flags);
859
860 return 0;
861}
862
863static void fec_timeout(struct net_device *dev)
864{
865 struct fec_enet_private *fep = netdev_priv(dev);
866
867 fep->stats.tx_errors++;
868
869 if (fep->tx_free)
870 netif_wake_queue(dev);
871
872 /* check link status again */
873 fec_mii_link_status_change_check(dev, 0);
874}
875
876static int fec_enet_open(struct net_device *dev)
877{
878 struct fec_enet_private *fep = netdev_priv(dev);
879 const struct fec_platform_info *fpi = fep->fpi;
880 unsigned long flags;
881
882 napi_enable(&fep->napi);
883
884 /* Install our interrupt handler. */
885 if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) {
886 printk(KERN_ERR DRV_MODULE_NAME
887 ": %s Could not allocate FEC IRQ!", dev->name);
888 napi_disable(&fep->napi);
889 return -EINVAL;
890 }
891
892 /* Install our phy interrupt handler */
893 if (fpi->phy_irq != -1 &&
894 request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy",
895 dev) != 0) {
896 printk(KERN_ERR DRV_MODULE_NAME
897 ": %s Could not allocate PHY IRQ!", dev->name);
898 free_irq(fpi->fec_irq, dev);
899 napi_disable(&fep->napi);
900 return -EINVAL;
901 }
902
903 if (fpi->use_mdio) {
904 fec_mii_startup(dev);
905 netif_carrier_off(dev);
906 fec_mii_link_status_change_check(dev, 1);
907 } else {
908 spin_lock_irqsave(&fep->lock, flags);
909 fec_restart(dev, 1, 100); /* XXX this sucks */
910 spin_unlock_irqrestore(&fep->lock, flags);
911
912 netif_carrier_on(dev);
913 netif_start_queue(dev);
914 }
915 return 0;
916}
917
918static int fec_enet_close(struct net_device *dev)
919{
920 struct fec_enet_private *fep = netdev_priv(dev);
921 const struct fec_platform_info *fpi = fep->fpi;
922 unsigned long flags;
923
924 netif_stop_queue(dev);
925 napi_disable(&fep->napi);
926 netif_carrier_off(dev);
927
928 if (fpi->use_mdio)
929 fec_mii_shutdown(dev);
930
931 spin_lock_irqsave(&fep->lock, flags);
932 fec_stop(dev);
933 spin_unlock_irqrestore(&fep->lock, flags);
934
935 /* release any irqs */
936 if (fpi->phy_irq != -1)
937 free_irq(fpi->phy_irq, dev);
938 free_irq(fpi->fec_irq, dev);
939
940 return 0;
941}
942
943static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
944{
945 struct fec_enet_private *fep = netdev_priv(dev);
946 return &fep->stats;
947}
948
949static int fec_enet_poll(struct napi_struct *napi, int budget)
950{
951 struct fec_enet_private *fep = container_of(napi, struct fec_enet_private, napi);
952 struct net_device *dev = fep->dev;
953
954 return fec_enet_rx_common(fep, dev, budget);
955}
956
957/*************************************************************************/
958
959static void fec_get_drvinfo(struct net_device *dev,
960 struct ethtool_drvinfo *info)
961{
962 strcpy(info->driver, DRV_MODULE_NAME);
963 strcpy(info->version, DRV_MODULE_VERSION);
964}
965
966static int fec_get_regs_len(struct net_device *dev)
967{
968 return sizeof(fec_t);
969}
970
971static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs,
972 void *p)
973{
974 struct fec_enet_private *fep = netdev_priv(dev);
975 unsigned long flags;
976
977 if (regs->len < sizeof(fec_t))
978 return;
979
980 regs->version = 0;
981 spin_lock_irqsave(&fep->lock, flags);
982 memcpy_fromio(p, fep->fecp, sizeof(fec_t));
983 spin_unlock_irqrestore(&fep->lock, flags);
984}
985
986static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
987{
988 struct fec_enet_private *fep = netdev_priv(dev);
989 unsigned long flags;
990 int rc;
991
992 spin_lock_irqsave(&fep->lock, flags);
993 rc = mii_ethtool_gset(&fep->mii_if, cmd);
994 spin_unlock_irqrestore(&fep->lock, flags);
995
996 return rc;
997}
998
999static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1000{
1001 struct fec_enet_private *fep = netdev_priv(dev);
1002 unsigned long flags;
1003 int rc;
1004
1005 spin_lock_irqsave(&fep->lock, flags);
1006 rc = mii_ethtool_sset(&fep->mii_if, cmd);
1007 spin_unlock_irqrestore(&fep->lock, flags);
1008
1009 return rc;
1010}
1011
1012static int fec_nway_reset(struct net_device *dev)
1013{
1014 struct fec_enet_private *fep = netdev_priv(dev);
1015 return mii_nway_restart(&fep->mii_if);
1016}
1017
1018static __u32 fec_get_msglevel(struct net_device *dev)
1019{
1020 struct fec_enet_private *fep = netdev_priv(dev);
1021 return fep->msg_enable;
1022}
1023
1024static void fec_set_msglevel(struct net_device *dev, __u32 value)
1025{
1026 struct fec_enet_private *fep = netdev_priv(dev);
1027 fep->msg_enable = value;
1028}
1029
1030static const struct ethtool_ops fec_ethtool_ops = {
1031 .get_drvinfo = fec_get_drvinfo,
1032 .get_regs_len = fec_get_regs_len,
1033 .get_settings = fec_get_settings,
1034 .set_settings = fec_set_settings,
1035 .nway_reset = fec_nway_reset,
1036 .get_link = ethtool_op_get_link,
1037 .get_msglevel = fec_get_msglevel,
1038 .set_msglevel = fec_set_msglevel,
1039 .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
1040 .set_sg = ethtool_op_set_sg,
1041 .get_regs = fec_get_regs,
1042};
1043
1044static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1045{
1046 struct fec_enet_private *fep = netdev_priv(dev);
1047 struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
1048 unsigned long flags;
1049 int rc;
1050
1051 if (!netif_running(dev))
1052 return -EINVAL;
1053
1054 spin_lock_irqsave(&fep->lock, flags);
1055 rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
1056 spin_unlock_irqrestore(&fep->lock, flags);
1057 return rc;
1058}
1059
1060int fec_8xx_init_one(const struct fec_platform_info *fpi,
1061 struct net_device **devp)
1062{
1063 immap_t *immap = (immap_t *) IMAP_ADDR;
1064 static int fec_8xx_version_printed = 0;
1065 struct net_device *dev = NULL;
1066 struct fec_enet_private *fep = NULL;
1067 fec_t *fecp = NULL;
1068 int i;
1069 int err = 0;
1070 int registered = 0;
1071 __u32 siel;
1072
1073 *devp = NULL;
1074
1075 switch (fpi->fec_no) {
1076 case 0:
1077 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
1078 break;
1079#ifdef CONFIG_DUET
1080 case 1:
1081 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2;
1082 break;
1083#endif
1084 default:
1085 return -EINVAL;
1086 }
1087
1088 if (fec_8xx_version_printed++ == 0)
1089 printk(KERN_INFO "%s", version);
1090
1091 i = sizeof(*fep) + (sizeof(struct sk_buff **) *
1092 (fpi->rx_ring + fpi->tx_ring));
1093
1094 dev = alloc_etherdev(i);
1095 if (!dev) {
1096 err = -ENOMEM;
1097 goto err;
1098 }
1099
1100 fep = netdev_priv(dev);
1101 fep->dev = dev;
1102
1103 /* partial reset of FEC */
1104 fec_whack_reset(fecp);
1105
1106 /* point rx_skbuff, tx_skbuff */
1107 fep->rx_skbuff = (struct sk_buff **)&fep[1];
1108 fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
1109
1110 fep->fecp = fecp;
1111 fep->fpi = fpi;
1112
1113 /* init locks */
1114 spin_lock_init(&fep->lock);
1115 spin_lock_init(&fep->tx_lock);
1116
1117 /*
1118 * Set the Ethernet address.
1119 */
1120 for (i = 0; i < 6; i++)
1121 dev->dev_addr[i] = fpi->macaddr[i];
1122
1123 fep->ring_base = dma_alloc_coherent(NULL,
1124 (fpi->tx_ring + fpi->rx_ring) *
1125 sizeof(cbd_t), &fep->ring_mem_addr,
1126 GFP_KERNEL);
1127 if (fep->ring_base == NULL) {
1128 printk(KERN_ERR DRV_MODULE_NAME
1129 ": %s dma alloc failed.\n", dev->name);
1130 err = -ENOMEM;
1131 goto err;
1132 }
1133
1134 /*
1135 * Set receive and transmit descriptor base.
1136 */
1137 fep->rx_bd_base = fep->ring_base;
1138 fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
1139
1140 /* initialize ring size variables */
1141 fep->tx_ring = fpi->tx_ring;
1142 fep->rx_ring = fpi->rx_ring;
1143
1144 /* SIU interrupt */
1145 if (fpi->phy_irq != -1 &&
1146 (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) {
1147
1148 siel = in_be32(&immap->im_siu_conf.sc_siel);
1149 if ((fpi->phy_irq & 1) == 0)
1150 siel |= (0x80000000 >> fpi->phy_irq);
1151 else
1152 siel &= ~(0x80000000 >> (fpi->phy_irq & ~1));
1153 out_be32(&immap->im_siu_conf.sc_siel, siel);
1154 }
1155
1156 /*
1157 * The FEC Ethernet specific entries in the device structure.
1158 */
1159 dev->open = fec_enet_open;
1160 dev->hard_start_xmit = fec_enet_start_xmit;
1161 dev->tx_timeout = fec_timeout;
1162 dev->watchdog_timeo = TX_TIMEOUT;
1163 dev->stop = fec_enet_close;
1164 dev->get_stats = fec_enet_get_stats;
1165 dev->set_multicast_list = fec_set_multicast_list;
1166 dev->set_mac_address = fec_set_mac_address;
1167 netif_napi_add(dev, &fec->napi,
1168 fec_enet_poll, fpi->napi_weight);
1169
1170 dev->ethtool_ops = &fec_ethtool_ops;
1171 dev->do_ioctl = fec_ioctl;
1172
1173 fep->fec_phy_speed =
1174 ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
1175
1176 init_timer(&fep->phy_timer_list);
1177
1178 /* partial reset of FEC so that only MII works */
1179 FW(fecp, mii_speed, fep->fec_phy_speed);
1180 FW(fecp, ievent, 0xffc0);
1181 FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
1182 FW(fecp, imask, 0);
1183 FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
1184 FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
1185
1186 netif_carrier_off(dev);
1187
1188 err = register_netdev(dev);
1189 if (err != 0)
1190 goto err;
1191 registered = 1;
1192
1193 if (fpi->use_mdio) {
1194 fep->mii_if.dev = dev;
1195 fep->mii_if.mdio_read = fec_mii_read;
1196 fep->mii_if.mdio_write = fec_mii_write;
1197 fep->mii_if.phy_id_mask = 0x1f;
1198 fep->mii_if.reg_num_mask = 0x1f;
1199 fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
1200 }
1201
1202 *devp = dev;
1203
1204 return 0;
1205
1206 err:
1207 if (dev != NULL) {
1208 if (fecp != NULL)
1209 fec_whack_reset(fecp);
1210
1211 if (registered)
1212 unregister_netdev(dev);
1213
1214 if (fep != NULL) {
1215 if (fep->ring_base)
1216 dma_free_coherent(NULL,
1217 (fpi->tx_ring +
1218 fpi->rx_ring) *
1219 sizeof(cbd_t), fep->ring_base,
1220 fep->ring_mem_addr);
1221 }
1222 free_netdev(dev);
1223 }
1224 return err;
1225}
1226
1227int fec_8xx_cleanup_one(struct net_device *dev)
1228{
1229 struct fec_enet_private *fep = netdev_priv(dev);
1230 fec_t *fecp = fep->fecp;
1231 const struct fec_platform_info *fpi = fep->fpi;
1232
1233 fec_whack_reset(fecp);
1234
1235 unregister_netdev(dev);
1236
1237 dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
1238 fep->ring_base, fep->ring_mem_addr);
1239
1240 free_netdev(dev);
1241
1242 return 0;
1243}
1244
1245/**************************************************************************************/
1246/**************************************************************************************/
1247/**************************************************************************************/
1248
1249static int __init fec_8xx_init(void)
1250{
1251 return fec_8xx_platform_init();
1252}
1253
1254static void __exit fec_8xx_cleanup(void)
1255{
1256 fec_8xx_platform_cleanup();
1257}
1258
1259/**************************************************************************************/
1260/**************************************************************************************/
1261/**************************************************************************************/
1262
1263module_init(fec_8xx_init);
1264module_exit(fec_8xx_cleanup);
diff --git a/drivers/net/fec_8xx/fec_mii.c b/drivers/net/fec_8xx/fec_mii.c
deleted file mode 100644
index 3b6ca29d31f2..000000000000
--- a/drivers/net/fec_8xx/fec_mii.c
+++ /dev/null
@@ -1,418 +0,0 @@
1/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 *
4 * Copyright (c) 2003 Intracom S.A.
5 * by Pantelis Antoniou <panto@intracom.gr>
6 *
7 * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
8 * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
9 *
10 * Released under the GPL
11 */
12
13#include <linux/module.h>
14#include <linux/types.h>
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/ptrace.h>
18#include <linux/errno.h>
19#include <linux/ioport.h>
20#include <linux/slab.h>
21#include <linux/interrupt.h>
22#include <linux/init.h>
23#include <linux/delay.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/skbuff.h>
27#include <linux/spinlock.h>
28#include <linux/mii.h>
29#include <linux/ethtool.h>
30#include <linux/bitops.h>
31
32#include <asm/8xx_immap.h>
33#include <asm/pgtable.h>
34#include <asm/mpc8xx.h>
35#include <asm/irq.h>
36#include <asm/uaccess.h>
37#include <asm/cpm1.h>
38
39/*************************************************/
40
41#include "fec_8xx.h"
42
43/*************************************************/
44
45/* Make MII read/write commands for the FEC.
46*/
47#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
48#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | (VAL & 0xffff))
49#define mk_mii_end 0
50
51/*************************************************/
52
53/* XXX both FECs use the MII interface of FEC1 */
54static DEFINE_SPINLOCK(fec_mii_lock);
55
56#define FEC_MII_LOOPS 10000
57
58int fec_mii_read(struct net_device *dev, int phy_id, int location)
59{
60 struct fec_enet_private *fep = netdev_priv(dev);
61 fec_t *fecp;
62 int i, ret = -1;
63 unsigned long flags;
64
65 /* XXX MII interface is only connected to FEC1 */
66 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
67
68 spin_lock_irqsave(&fec_mii_lock, flags);
69
70 if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) {
71 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
72 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
73 FW(fecp, ievent, FEC_ENET_MII);
74 }
75
76 /* Add PHY address to register command. */
77 FW(fecp, mii_speed, fep->fec_phy_speed);
78 FW(fecp, mii_data, (phy_id << 23) | mk_mii_read(location));
79
80 for (i = 0; i < FEC_MII_LOOPS; i++)
81 if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
82 break;
83
84 if (i < FEC_MII_LOOPS) {
85 FW(fecp, ievent, FEC_ENET_MII);
86 ret = FR(fecp, mii_data) & 0xffff;
87 }
88
89 spin_unlock_irqrestore(&fec_mii_lock, flags);
90
91 return ret;
92}
93
94void fec_mii_write(struct net_device *dev, int phy_id, int location, int value)
95{
96 struct fec_enet_private *fep = netdev_priv(dev);
97 fec_t *fecp;
98 unsigned long flags;
99 int i;
100
101 /* XXX MII interface is only connected to FEC1 */
102 fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
103
104 spin_lock_irqsave(&fec_mii_lock, flags);
105
106 if ((FR(fecp, r_cntrl) & FEC_RCNTRL_MII_MODE) == 0) {
107 FS(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
108 FS(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
109 FW(fecp, ievent, FEC_ENET_MII);
110 }
111
112 /* Add PHY address to register command. */
113 FW(fecp, mii_speed, fep->fec_phy_speed); /* always adapt mii speed */
114 FW(fecp, mii_data, (phy_id << 23) | mk_mii_write(location, value));
115
116 for (i = 0; i < FEC_MII_LOOPS; i++)
117 if ((FR(fecp, ievent) & FEC_ENET_MII) != 0)
118 break;
119
120 if (i < FEC_MII_LOOPS)
121 FW(fecp, ievent, FEC_ENET_MII);
122
123 spin_unlock_irqrestore(&fec_mii_lock, flags);
124}
125
126/*************************************************/
127
128#ifdef CONFIG_FEC_8XX_GENERIC_PHY
129
130/*
131 * Generic PHY support.
132 * Should work for all PHYs, but link change is detected by polling
133 */
134
135static void generic_timer_callback(unsigned long data)
136{
137 struct net_device *dev = (struct net_device *)data;
138 struct fec_enet_private *fep = netdev_priv(dev);
139
140 fep->phy_timer_list.expires = jiffies + HZ / 2;
141
142 add_timer(&fep->phy_timer_list);
143
144 fec_mii_link_status_change_check(dev, 0);
145}
146
147static void generic_startup(struct net_device *dev)
148{
149 struct fec_enet_private *fep = netdev_priv(dev);
150
151 fep->phy_timer_list.expires = jiffies + HZ / 2; /* every 500ms */
152 fep->phy_timer_list.data = (unsigned long)dev;
153 fep->phy_timer_list.function = generic_timer_callback;
154 add_timer(&fep->phy_timer_list);
155}
156
157static void generic_shutdown(struct net_device *dev)
158{
159 struct fec_enet_private *fep = netdev_priv(dev);
160
161 del_timer_sync(&fep->phy_timer_list);
162}
163
164#endif
165
166#ifdef CONFIG_FEC_8XX_DM9161_PHY
167
168/* ------------------------------------------------------------------------- */
169/* The Davicom DM9161 is used on the NETTA board */
170
171/* register definitions */
172
173#define MII_DM9161_ACR 16 /* Aux. Config Register */
174#define MII_DM9161_ACSR 17 /* Aux. Config/Status Register */
175#define MII_DM9161_10TCSR 18 /* 10BaseT Config/Status Reg. */
176#define MII_DM9161_INTR 21 /* Interrupt Register */
177#define MII_DM9161_RECR 22 /* Receive Error Counter Reg. */
178#define MII_DM9161_DISCR 23 /* Disconnect Counter Register */
179
180static void dm9161_startup(struct net_device *dev)
181{
182 struct fec_enet_private *fep = netdev_priv(dev);
183
184 fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0000);
185}
186
187static void dm9161_ack_int(struct net_device *dev)
188{
189 struct fec_enet_private *fep = netdev_priv(dev);
190
191 fec_mii_read(dev, fep->mii_if.phy_id, MII_DM9161_INTR);
192}
193
194static void dm9161_shutdown(struct net_device *dev)
195{
196 struct fec_enet_private *fep = netdev_priv(dev);
197
198 fec_mii_write(dev, fep->mii_if.phy_id, MII_DM9161_INTR, 0x0f00);
199}
200
201#endif
202
203#ifdef CONFIG_FEC_8XX_LXT971_PHY
204
205/* Support for LXT971/972 PHY */
206
207#define MII_LXT971_PCR 16 /* Port Control Register */
208#define MII_LXT971_SR2 17 /* Status Register 2 */
209#define MII_LXT971_IER 18 /* Interrupt Enable Register */
210#define MII_LXT971_ISR 19 /* Interrupt Status Register */
211#define MII_LXT971_LCR 20 /* LED Control Register */
212#define MII_LXT971_TCR 30 /* Transmit Control Register */
213
214static void lxt971_startup(struct net_device *dev)
215{
216 struct fec_enet_private *fep = netdev_priv(dev);
217
218 fec_mii_write(dev, fep->mii_if.phy_id, MII_LXT971_IER, 0x00F2);
219}
220
221static void lxt971_ack_int(struct net_device *dev)
222{
223 struct fec_enet_private *fep = netdev_priv(dev);
224
225 fec_mii_read(dev, fep->mii_if.phy_id, MII_LXT971_ISR);
226}
227
228static void lxt971_shutdown(struct net_device *dev)
229{
230 struct fec_enet_private *fep = netdev_priv(dev);
231
232 fec_mii_write(dev, fep->mii_if.phy_id, MII_LXT971_IER, 0x0000);
233}
234#endif
235
236/**********************************************************************************/
237
238static const struct phy_info phy_info[] = {
239#ifdef CONFIG_FEC_8XX_DM9161_PHY
240 {
241 .id = 0x00181b88,
242 .name = "DM9161",
243 .startup = dm9161_startup,
244 .ack_int = dm9161_ack_int,
245 .shutdown = dm9161_shutdown,
246 },
247#endif
248#ifdef CONFIG_FEC_8XX_LXT971_PHY
249 {
250 .id = 0x0001378e,
251 .name = "LXT971/972",
252 .startup = lxt971_startup,
253 .ack_int = lxt971_ack_int,
254 .shutdown = lxt971_shutdown,
255 },
256#endif
257#ifdef CONFIG_FEC_8XX_GENERIC_PHY
258 {
259 .id = 0,
260 .name = "GENERIC",
261 .startup = generic_startup,
262 .shutdown = generic_shutdown,
263 },
264#endif
265};
266
267/**********************************************************************************/
268
269int fec_mii_phy_id_detect(struct net_device *dev)
270{
271 struct fec_enet_private *fep = netdev_priv(dev);
272 const struct fec_platform_info *fpi = fep->fpi;
273 int i, r, start, end, phytype, physubtype;
274 const struct phy_info *phy;
275 int phy_hwid, phy_id;
276
277 /* if no MDIO */
278 if (fpi->use_mdio == 0)
279 return -1;
280
281 phy_hwid = -1;
282 fep->phy = NULL;
283
284 /* auto-detect? */
285 if (fpi->phy_addr == -1) {
286 start = 0;
287 end = 32;
288 } else { /* direct */
289 start = fpi->phy_addr;
290 end = start + 1;
291 }
292
293 for (phy_id = start; phy_id < end; phy_id++) {
294 r = fec_mii_read(dev, phy_id, MII_PHYSID1);
295 if (r == -1 || (phytype = (r & 0xffff)) == 0xffff)
296 continue;
297 r = fec_mii_read(dev, phy_id, MII_PHYSID2);
298 if (r == -1 || (physubtype = (r & 0xffff)) == 0xffff)
299 continue;
300 phy_hwid = (phytype << 16) | physubtype;
301 if (phy_hwid != -1)
302 break;
303 }
304
305 if (phy_hwid == -1) {
306 printk(KERN_ERR DRV_MODULE_NAME
307 ": %s No PHY detected!\n", dev->name);
308 return -1;
309 }
310
311 for (i = 0, phy = phy_info; i < ARRAY_SIZE(phy_info); i++, phy++)
312 if (phy->id == (phy_hwid >> 4) || phy->id == 0)
313 break;
314
315 if (i >= ARRAY_SIZE(phy_info)) {
316 printk(KERN_ERR DRV_MODULE_NAME
317 ": %s PHY id 0x%08x is not supported!\n",
318 dev->name, phy_hwid);
319 return -1;
320 }
321
322 fep->phy = phy;
323
324 printk(KERN_INFO DRV_MODULE_NAME
325 ": %s Phy @ 0x%x, type %s (0x%08x)\n",
326 dev->name, phy_id, fep->phy->name, phy_hwid);
327
328 return phy_id;
329}
330
331void fec_mii_startup(struct net_device *dev)
332{
333 struct fec_enet_private *fep = netdev_priv(dev);
334 const struct fec_platform_info *fpi = fep->fpi;
335
336 if (!fpi->use_mdio || fep->phy == NULL)
337 return;
338
339 if (fep->phy->startup == NULL)
340 return;
341
342 (*fep->phy->startup) (dev);
343}
344
345void fec_mii_shutdown(struct net_device *dev)
346{
347 struct fec_enet_private *fep = netdev_priv(dev);
348 const struct fec_platform_info *fpi = fep->fpi;
349
350 if (!fpi->use_mdio || fep->phy == NULL)
351 return;
352
353 if (fep->phy->shutdown == NULL)
354 return;
355
356 (*fep->phy->shutdown) (dev);
357}
358
359void fec_mii_ack_int(struct net_device *dev)
360{
361 struct fec_enet_private *fep = netdev_priv(dev);
362 const struct fec_platform_info *fpi = fep->fpi;
363
364 if (!fpi->use_mdio || fep->phy == NULL)
365 return;
366
367 if (fep->phy->ack_int == NULL)
368 return;
369
370 (*fep->phy->ack_int) (dev);
371}
372
373/* helper function */
374static int mii_negotiated(struct mii_if_info *mii)
375{
376 int advert, lpa, val;
377
378 if (!mii_link_ok(mii))
379 return 0;
380
381 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR);
382 if ((val & BMSR_ANEGCOMPLETE) == 0)
383 return 0;
384
385 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE);
386 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA);
387
388 return mii_nway_result(advert & lpa);
389}
390
391void fec_mii_link_status_change_check(struct net_device *dev, int init_media)
392{
393 struct fec_enet_private *fep = netdev_priv(dev);
394 unsigned int media;
395 unsigned long flags;
396
397 if (mii_check_media(&fep->mii_if, netif_msg_link(fep), init_media) == 0)
398 return;
399
400 media = mii_negotiated(&fep->mii_if);
401
402 if (netif_carrier_ok(dev)) {
403 spin_lock_irqsave(&fep->lock, flags);
404 fec_restart(dev, !!(media & ADVERTISE_FULL),
405 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)) ?
406 100 : 10);
407 spin_unlock_irqrestore(&fep->lock, flags);
408
409 netif_start_queue(dev);
410 } else {
411 netif_stop_queue(dev);
412
413 spin_lock_irqsave(&fep->lock, flags);
414 fec_stop(dev);
415 spin_unlock_irqrestore(&fep->lock, flags);
416
417 }
418}
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index a5baaf59ff66..352574a3f056 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -43,7 +43,7 @@
43#include <asm/uaccess.h> 43#include <asm/uaccess.h>
44 44
45#ifdef CONFIG_PPC_CPM_NEW_BINDING 45#ifdef CONFIG_PPC_CPM_NEW_BINDING
46#include <asm/of_platform.h> 46#include <linux/of_platform.h>
47#endif 47#endif
48 48
49#include "fs_enet.h" 49#include "fs_enet.h"
diff --git a/drivers/net/fs_enet/mac-scc.c b/drivers/net/fs_enet/mac-scc.c
index d7ca31945c82..e3557eca7b6d 100644
--- a/drivers/net/fs_enet/mac-scc.c
+++ b/drivers/net/fs_enet/mac-scc.c
@@ -44,7 +44,7 @@
44#endif 44#endif
45 45
46#ifdef CONFIG_PPC_CPM_NEW_BINDING 46#ifdef CONFIG_PPC_CPM_NEW_BINDING
47#include <asm/of_platform.h> 47#include <linux/of_platform.h>
48#endif 48#endif
49 49
50#include "fs_enet.h" 50#include "fs_enet.h"
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index f0014cfbb275..8f6a43b0e0ff 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -37,7 +37,7 @@
37#include <asm/uaccess.h> 37#include <asm/uaccess.h>
38 38
39#ifdef CONFIG_PPC_CPM_NEW_BINDING 39#ifdef CONFIG_PPC_CPM_NEW_BINDING
40#include <asm/of_platform.h> 40#include <linux/of_platform.h>
41#endif 41#endif
42 42
43#include "fs_enet.h" 43#include "fs_enet.h"
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index babc79ad490b..61af02b4c9d8 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -363,25 +363,31 @@ static int emac_reset(struct emac_instance *dev)
363 363
364static void emac_hash_mc(struct emac_instance *dev) 364static void emac_hash_mc(struct emac_instance *dev)
365{ 365{
366 struct emac_regs __iomem *p = dev->emacp; 366 const int regs = EMAC_XAHT_REGS(dev);
367 u16 gaht[4] = { 0 }; 367 u32 *gaht_base = emac_gaht_base(dev);
368 u32 gaht_temp[regs];
368 struct dev_mc_list *dmi; 369 struct dev_mc_list *dmi;
370 int i;
369 371
370 DBG(dev, "hash_mc %d" NL, dev->ndev->mc_count); 372 DBG(dev, "hash_mc %d" NL, dev->ndev->mc_count);
371 373
374 memset(gaht_temp, 0, sizeof (gaht_temp));
375
372 for (dmi = dev->ndev->mc_list; dmi; dmi = dmi->next) { 376 for (dmi = dev->ndev->mc_list; dmi; dmi = dmi->next) {
373 int bit; 377 int slot, reg, mask;
374 DBG2(dev, "mc %02x:%02x:%02x:%02x:%02x:%02x" NL, 378 DBG2(dev, "mc %02x:%02x:%02x:%02x:%02x:%02x" NL,
375 dmi->dmi_addr[0], dmi->dmi_addr[1], dmi->dmi_addr[2], 379 dmi->dmi_addr[0], dmi->dmi_addr[1], dmi->dmi_addr[2],
376 dmi->dmi_addr[3], dmi->dmi_addr[4], dmi->dmi_addr[5]); 380 dmi->dmi_addr[3], dmi->dmi_addr[4], dmi->dmi_addr[5]);
377 381
378 bit = 63 - (ether_crc(ETH_ALEN, dmi->dmi_addr) >> 26); 382 slot = EMAC_XAHT_CRC_TO_SLOT(dev, ether_crc(ETH_ALEN, dmi->dmi_addr));
379 gaht[bit >> 4] |= 0x8000 >> (bit & 0x0f); 383 reg = EMAC_XAHT_SLOT_TO_REG(dev, slot);
384 mask = EMAC_XAHT_SLOT_TO_MASK(dev, slot);
385
386 gaht_temp[reg] |= mask;
380 } 387 }
381 out_be32(&p->gaht1, gaht[0]); 388
382 out_be32(&p->gaht2, gaht[1]); 389 for (i = 0; i < regs; i++)
383 out_be32(&p->gaht3, gaht[2]); 390 out_be32(gaht_base + i, gaht_temp[i]);
384 out_be32(&p->gaht4, gaht[3]);
385} 391}
386 392
387static inline u32 emac_iff2rmr(struct net_device *ndev) 393static inline u32 emac_iff2rmr(struct net_device *ndev)
@@ -398,7 +404,8 @@ static inline u32 emac_iff2rmr(struct net_device *ndev)
398 404
399 if (ndev->flags & IFF_PROMISC) 405 if (ndev->flags & IFF_PROMISC)
400 r |= EMAC_RMR_PME; 406 r |= EMAC_RMR_PME;
401 else if (ndev->flags & IFF_ALLMULTI || ndev->mc_count > 32) 407 else if (ndev->flags & IFF_ALLMULTI ||
408 (ndev->mc_count > EMAC_XAHT_SLOTS(dev)))
402 r |= EMAC_RMR_PMME; 409 r |= EMAC_RMR_PMME;
403 else if (ndev->mc_count > 0) 410 else if (ndev->mc_count > 0)
404 r |= EMAC_RMR_MAE; 411 r |= EMAC_RMR_MAE;
@@ -542,7 +549,7 @@ static int emac_configure(struct emac_instance *dev)
542 /* Put some arbitrary OUI, Manuf & Rev IDs so we can 549 /* Put some arbitrary OUI, Manuf & Rev IDs so we can
543 * identify this GPCS PHY later. 550 * identify this GPCS PHY later.
544 */ 551 */
545 out_be32(&p->ipcr, 0xdeadbeef); 552 out_be32(&p->u1.emac4.ipcr, 0xdeadbeef);
546 } else 553 } else
547 mr1 |= EMAC_MR1_MF_1000; 554 mr1 |= EMAC_MR1_MF_1000;
548 555
@@ -2021,10 +2028,10 @@ static int emac_get_regs_len(struct emac_instance *dev)
2021{ 2028{
2022 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) 2029 if (emac_has_feature(dev, EMAC_FTR_EMAC4))
2023 return sizeof(struct emac_ethtool_regs_subhdr) + 2030 return sizeof(struct emac_ethtool_regs_subhdr) +
2024 EMAC4_ETHTOOL_REGS_SIZE; 2031 EMAC4_ETHTOOL_REGS_SIZE(dev);
2025 else 2032 else
2026 return sizeof(struct emac_ethtool_regs_subhdr) + 2033 return sizeof(struct emac_ethtool_regs_subhdr) +
2027 EMAC_ETHTOOL_REGS_SIZE; 2034 EMAC_ETHTOOL_REGS_SIZE(dev);
2028} 2035}
2029 2036
2030static int emac_ethtool_get_regs_len(struct net_device *ndev) 2037static int emac_ethtool_get_regs_len(struct net_device *ndev)
@@ -2051,12 +2058,12 @@ static void *emac_dump_regs(struct emac_instance *dev, void *buf)
2051 hdr->index = dev->cell_index; 2058 hdr->index = dev->cell_index;
2052 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) { 2059 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) {
2053 hdr->version = EMAC4_ETHTOOL_REGS_VER; 2060 hdr->version = EMAC4_ETHTOOL_REGS_VER;
2054 memcpy_fromio(hdr + 1, dev->emacp, EMAC4_ETHTOOL_REGS_SIZE); 2061 memcpy_fromio(hdr + 1, dev->emacp, EMAC4_ETHTOOL_REGS_SIZE(dev));
2055 return ((void *)(hdr + 1) + EMAC4_ETHTOOL_REGS_SIZE); 2062 return ((void *)(hdr + 1) + EMAC4_ETHTOOL_REGS_SIZE(dev));
2056 } else { 2063 } else {
2057 hdr->version = EMAC_ETHTOOL_REGS_VER; 2064 hdr->version = EMAC_ETHTOOL_REGS_VER;
2058 memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE); 2065 memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE(dev));
2059 return ((void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE); 2066 return ((void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE(dev));
2060 } 2067 }
2061} 2068}
2062 2069
@@ -2546,7 +2553,9 @@ static int __devinit emac_init_config(struct emac_instance *dev)
2546 } 2553 }
2547 2554
2548 /* Check EMAC version */ 2555 /* Check EMAC version */
2549 if (of_device_is_compatible(np, "ibm,emac4")) { 2556 if (of_device_is_compatible(np, "ibm,emac4sync")) {
2557 dev->features |= (EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC);
2558 } else if (of_device_is_compatible(np, "ibm,emac4")) {
2550 dev->features |= EMAC_FTR_EMAC4; 2559 dev->features |= EMAC_FTR_EMAC4;
2551 if (of_device_is_compatible(np, "ibm,emac-440gx")) 2560 if (of_device_is_compatible(np, "ibm,emac-440gx"))
2552 dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX; 2561 dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
@@ -2607,6 +2616,15 @@ static int __devinit emac_init_config(struct emac_instance *dev)
2607 } 2616 }
2608 memcpy(dev->ndev->dev_addr, p, 6); 2617 memcpy(dev->ndev->dev_addr, p, 6);
2609 2618
2619 /* IAHT and GAHT filter parameterization */
2620 if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) {
2621 dev->xaht_slots_shift = EMAC4SYNC_XAHT_SLOTS_SHIFT;
2622 dev->xaht_width_shift = EMAC4SYNC_XAHT_WIDTH_SHIFT;
2623 } else {
2624 dev->xaht_slots_shift = EMAC4_XAHT_SLOTS_SHIFT;
2625 dev->xaht_width_shift = EMAC4_XAHT_WIDTH_SHIFT;
2626 }
2627
2610 DBG(dev, "features : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE); 2628 DBG(dev, "features : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE);
2611 DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige); 2629 DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige);
2612 DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige); 2630 DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige);
@@ -2678,7 +2696,8 @@ static int __devinit emac_probe(struct of_device *ofdev,
2678 goto err_irq_unmap; 2696 goto err_irq_unmap;
2679 } 2697 }
2680 // TODO : request_mem_region 2698 // TODO : request_mem_region
2681 dev->emacp = ioremap(dev->rsrc_regs.start, sizeof(struct emac_regs)); 2699 dev->emacp = ioremap(dev->rsrc_regs.start,
2700 dev->rsrc_regs.end - dev->rsrc_regs.start + 1);
2682 if (dev->emacp == NULL) { 2701 if (dev->emacp == NULL) {
2683 printk(KERN_ERR "%s: Can't map device registers!\n", 2702 printk(KERN_ERR "%s: Can't map device registers!\n",
2684 np->full_name); 2703 np->full_name);
@@ -2892,6 +2911,10 @@ static struct of_device_id emac_match[] =
2892 .type = "network", 2911 .type = "network",
2893 .compatible = "ibm,emac4", 2912 .compatible = "ibm,emac4",
2894 }, 2913 },
2914 {
2915 .type = "network",
2916 .compatible = "ibm,emac4sync",
2917 },
2895 {}, 2918 {},
2896}; 2919};
2897 2920
diff --git a/drivers/net/ibm_newemac/core.h b/drivers/net/ibm_newemac/core.h
index 1683db9870a4..6545e69d12c3 100644
--- a/drivers/net/ibm_newemac/core.h
+++ b/drivers/net/ibm_newemac/core.h
@@ -33,8 +33,8 @@
33#include <linux/netdevice.h> 33#include <linux/netdevice.h>
34#include <linux/dma-mapping.h> 34#include <linux/dma-mapping.h>
35#include <linux/spinlock.h> 35#include <linux/spinlock.h>
36#include <linux/of_platform.h>
36 37
37#include <asm/of_platform.h>
38#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/dcr.h> 39#include <asm/dcr.h>
40 40
@@ -235,6 +235,10 @@ struct emac_instance {
235 u32 fifo_entry_size; 235 u32 fifo_entry_size;
236 u32 mal_burst_size; /* move to MAL ? */ 236 u32 mal_burst_size; /* move to MAL ? */
237 237
238 /* IAHT and GAHT filter parameterization */
239 u32 xaht_slots_shift;
240 u32 xaht_width_shift;
241
238 /* Descriptor management 242 /* Descriptor management
239 */ 243 */
240 struct mal_descriptor *tx_desc; 244 struct mal_descriptor *tx_desc;
@@ -309,6 +313,10 @@ struct emac_instance {
309 * Set if we need phy clock workaround for 440ep or 440gr 313 * Set if we need phy clock workaround for 440ep or 440gr
310 */ 314 */
311#define EMAC_FTR_440EP_PHY_CLK_FIX 0x00000100 315#define EMAC_FTR_440EP_PHY_CLK_FIX 0x00000100
316/*
317 * The 405EX and 460EX contain the EMAC4SYNC core
318 */
319#define EMAC_FTR_EMAC4SYNC 0x00000200
312 320
313 321
314/* Right now, we don't quite handle the always/possible masks on the 322/* Right now, we don't quite handle the always/possible masks on the
@@ -320,7 +328,8 @@ enum {
320 328
321 EMAC_FTRS_POSSIBLE = 329 EMAC_FTRS_POSSIBLE =
322#ifdef CONFIG_IBM_NEW_EMAC_EMAC4 330#ifdef CONFIG_IBM_NEW_EMAC_EMAC4
323 EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR | 331 EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC |
332 EMAC_FTR_HAS_NEW_STACR |
324 EMAC_FTR_STACR_OC_INVERT | EMAC_FTR_440GX_PHY_CLK_FIX | 333 EMAC_FTR_STACR_OC_INVERT | EMAC_FTR_440GX_PHY_CLK_FIX |
325#endif 334#endif
326#ifdef CONFIG_IBM_NEW_EMAC_TAH 335#ifdef CONFIG_IBM_NEW_EMAC_TAH
@@ -342,6 +351,71 @@ static inline int emac_has_feature(struct emac_instance *dev,
342 (EMAC_FTRS_POSSIBLE & dev->features & feature); 351 (EMAC_FTRS_POSSIBLE & dev->features & feature);
343} 352}
344 353
354/*
355 * Various instances of the EMAC core have varying 1) number of
356 * address match slots, 2) width of the registers for handling address
357 * match slots, 3) number of registers for handling address match
358 * slots and 4) base offset for those registers.
359 *
360 * These macros and inlines handle these differences based on
361 * parameters supplied by the device structure which are, in turn,
362 * initialized based on the "compatible" entry in the device tree.
363 */
364
365#define EMAC4_XAHT_SLOTS_SHIFT 6
366#define EMAC4_XAHT_WIDTH_SHIFT 4
367
368#define EMAC4SYNC_XAHT_SLOTS_SHIFT 8
369#define EMAC4SYNC_XAHT_WIDTH_SHIFT 5
370
371#define EMAC_XAHT_SLOTS(dev) (1 << (dev)->xaht_slots_shift)
372#define EMAC_XAHT_WIDTH(dev) (1 << (dev)->xaht_width_shift)
373#define EMAC_XAHT_REGS(dev) (1 << ((dev)->xaht_slots_shift - \
374 (dev)->xaht_width_shift))
375
376#define EMAC_XAHT_CRC_TO_SLOT(dev, crc) \
377 ((EMAC_XAHT_SLOTS(dev) - 1) - \
378 ((crc) >> ((sizeof (u32) * BITS_PER_BYTE) - \
379 (dev)->xaht_slots_shift)))
380
381#define EMAC_XAHT_SLOT_TO_REG(dev, slot) \
382 ((slot) >> (dev)->xaht_width_shift)
383
384#define EMAC_XAHT_SLOT_TO_MASK(dev, slot) \
385 ((u32)(1 << (EMAC_XAHT_WIDTH(dev) - 1)) >> \
386 ((slot) & (u32)(EMAC_XAHT_WIDTH(dev) - 1)))
387
388static inline u32 *emac_xaht_base(struct emac_instance *dev)
389{
390 struct emac_regs __iomem *p = dev->emacp;
391 int offset;
392
393 /* The first IAHT entry always is the base of the block of
394 * IAHT and GAHT registers.
395 */
396 if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC))
397 offset = offsetof(struct emac_regs, u1.emac4sync.iaht1);
398 else
399 offset = offsetof(struct emac_regs, u0.emac4.iaht1);
400
401 return ((u32 *)((ptrdiff_t)p + offset));
402}
403
404static inline u32 *emac_gaht_base(struct emac_instance *dev)
405{
406 /* GAHT registers always come after an identical number of
407 * IAHT registers.
408 */
409 return (emac_xaht_base(dev) + EMAC_XAHT_REGS(dev));
410}
411
412static inline u32 *emac_iaht_base(struct emac_instance *dev)
413{
414 /* IAHT registers always come before an identical number of
415 * GAHT registers.
416 */
417 return (emac_xaht_base(dev));
418}
345 419
346/* Ethtool get_regs complex data. 420/* Ethtool get_regs complex data.
347 * We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH 421 * We want to get not just EMAC registers, but also MAL, ZMII, RGMII, TAH
@@ -366,4 +440,11 @@ struct emac_ethtool_regs_subhdr {
366 u32 index; 440 u32 index;
367}; 441};
368 442
443#define EMAC_ETHTOOL_REGS_VER 0
444#define EMAC_ETHTOOL_REGS_SIZE(dev) ((dev)->rsrc_regs.end - \
445 (dev)->rsrc_regs.start + 1)
446#define EMAC4_ETHTOOL_REGS_VER 1
447#define EMAC4_ETHTOOL_REGS_SIZE(dev) ((dev)->rsrc_regs.end - \
448 (dev)->rsrc_regs.start + 1)
449
369#endif /* __IBM_NEWEMAC_CORE_H */ 450#endif /* __IBM_NEWEMAC_CORE_H */
diff --git a/drivers/net/ibm_newemac/debug.c b/drivers/net/ibm_newemac/debug.c
index 86b756a30784..775c850a425a 100644
--- a/drivers/net/ibm_newemac/debug.c
+++ b/drivers/net/ibm_newemac/debug.c
@@ -67,29 +67,55 @@ static void emac_desc_dump(struct emac_instance *p)
67static void emac_mac_dump(struct emac_instance *dev) 67static void emac_mac_dump(struct emac_instance *dev)
68{ 68{
69 struct emac_regs __iomem *p = dev->emacp; 69 struct emac_regs __iomem *p = dev->emacp;
70 const int xaht_regs = EMAC_XAHT_REGS(dev);
71 u32 *gaht_base = emac_gaht_base(dev);
72 u32 *iaht_base = emac_iaht_base(dev);
73 int emac4sync = emac_has_feature(dev, EMAC_FTR_EMAC4SYNC);
74 int n;
70 75
71 printk("** EMAC %s registers **\n" 76 printk("** EMAC %s registers **\n"
72 "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n" 77 "MR0 = 0x%08x MR1 = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x\n"
73 "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n" 78 "RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x\n"
74 "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n" 79 "IAR = %04x%08x VTPID = 0x%04x VTCI = 0x%04x\n",
75 "IAHT: 0x%04x 0x%04x 0x%04x 0x%04x "
76 "GAHT: 0x%04x 0x%04x 0x%04x 0x%04x\n"
77 "LSA = %04x%08x IPGVR = 0x%04x\n"
78 "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
79 "OCTX = 0x%08x OCRX = 0x%08x IPCR = 0x%08x\n",
80 dev->ofdev->node->full_name, in_be32(&p->mr0), in_be32(&p->mr1), 80 dev->ofdev->node->full_name, in_be32(&p->mr0), in_be32(&p->mr1),
81 in_be32(&p->tmr0), in_be32(&p->tmr1), 81 in_be32(&p->tmr0), in_be32(&p->tmr1),
82 in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser), 82 in_be32(&p->rmr), in_be32(&p->isr), in_be32(&p->iser),
83 in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid), 83 in_be32(&p->iahr), in_be32(&p->ialr), in_be32(&p->vtpid),
84 in_be32(&p->vtci), 84 in_be32(&p->vtci)
85 in_be32(&p->iaht1), in_be32(&p->iaht2), in_be32(&p->iaht3), 85 );
86 in_be32(&p->iaht4), 86
87 in_be32(&p->gaht1), in_be32(&p->gaht2), in_be32(&p->gaht3), 87 if (emac4sync)
88 in_be32(&p->gaht4), 88 printk("MAR = %04x%08x MMAR = %04x%08x\n",
89 in_be32(&p->u0.emac4sync.mahr),
90 in_be32(&p->u0.emac4sync.malr),
91 in_be32(&p->u0.emac4sync.mmahr),
92 in_be32(&p->u0.emac4sync.mmalr)
93 );
94
95 for (n = 0; n < xaht_regs; n++)
96 printk("IAHT%02d = 0x%08x\n", n + 1, in_be32(iaht_base + n));
97
98 for (n = 0; n < xaht_regs; n++)
99 printk("GAHT%02d = 0x%08x\n", n + 1, in_be32(gaht_base + n));
100
101 printk("LSA = %04x%08x IPGVR = 0x%04x\n"
102 "STACR = 0x%08x TRTR = 0x%08x RWMR = 0x%08x\n"
103 "OCTX = 0x%08x OCRX = 0x%08x\n",
89 in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr), 104 in_be32(&p->lsah), in_be32(&p->lsal), in_be32(&p->ipgvr),
90 in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr), 105 in_be32(&p->stacr), in_be32(&p->trtr), in_be32(&p->rwmr),
91 in_be32(&p->octx), in_be32(&p->ocrx), in_be32(&p->ipcr) 106 in_be32(&p->octx), in_be32(&p->ocrx)
92 ); 107 );
108
109 if (!emac4sync) {
110 printk("IPCR = 0x%08x\n",
111 in_be32(&p->u1.emac4.ipcr)
112 );
113 } else {
114 printk("REVID = 0x%08x TPC = 0x%08x\n",
115 in_be32(&p->u1.emac4sync.revid),
116 in_be32(&p->u1.emac4sync.tpc)
117 );
118 }
93 119
94 emac_desc_dump(dev); 120 emac_desc_dump(dev);
95} 121}
diff --git a/drivers/net/ibm_newemac/emac.h b/drivers/net/ibm_newemac/emac.h
index 91cb096ab405..0afc2cf5c52b 100644
--- a/drivers/net/ibm_newemac/emac.h
+++ b/drivers/net/ibm_newemac/emac.h
@@ -27,37 +27,80 @@
27 27
28#include <linux/types.h> 28#include <linux/types.h>
29 29
30/* EMAC registers Write Access rules */ 30/* EMAC registers Write Access rules */
31struct emac_regs { 31struct emac_regs {
32 u32 mr0; /* special */ 32 /* Common registers across all EMAC implementations. */
33 u32 mr1; /* Reset */ 33 u32 mr0; /* Special */
34 u32 tmr0; /* special */ 34 u32 mr1; /* Reset */
35 u32 tmr1; /* special */ 35 u32 tmr0; /* Special */
36 u32 rmr; /* Reset */ 36 u32 tmr1; /* Special */
37 u32 isr; /* Always */ 37 u32 rmr; /* Reset */
38 u32 iser; /* Reset */ 38 u32 isr; /* Always */
39 u32 iahr; /* Reset, R, T */ 39 u32 iser; /* Reset */
40 u32 ialr; /* Reset, R, T */ 40 u32 iahr; /* Reset, R, T */
41 u32 vtpid; /* Reset, R, T */ 41 u32 ialr; /* Reset, R, T */
42 u32 vtci; /* Reset, R, T */ 42 u32 vtpid; /* Reset, R, T */
43 u32 ptr; /* Reset, T */ 43 u32 vtci; /* Reset, R, T */
44 u32 iaht1; /* Reset, R */ 44 u32 ptr; /* Reset, T */
45 u32 iaht2; /* Reset, R */ 45 union {
46 u32 iaht3; /* Reset, R */ 46 /* Registers unique to EMAC4 implementations */
47 u32 iaht4; /* Reset, R */ 47 struct {
48 u32 gaht1; /* Reset, R */ 48 u32 iaht1; /* Reset, R */
49 u32 gaht2; /* Reset, R */ 49 u32 iaht2; /* Reset, R */
50 u32 gaht3; /* Reset, R */ 50 u32 iaht3; /* Reset, R */
51 u32 gaht4; /* Reset, R */ 51 u32 iaht4; /* Reset, R */
52 u32 gaht1; /* Reset, R */
53 u32 gaht2; /* Reset, R */
54 u32 gaht3; /* Reset, R */
55 u32 gaht4; /* Reset, R */
56 } emac4;
57 /* Registers unique to EMAC4SYNC implementations */
58 struct {
59 u32 mahr; /* Reset, R, T */
60 u32 malr; /* Reset, R, T */
61 u32 mmahr; /* Reset, R, T */
62 u32 mmalr; /* Reset, R, T */
63 u32 rsvd0[4];
64 } emac4sync;
65 } u0;
66 /* Common registers across all EMAC implementations. */
52 u32 lsah; 67 u32 lsah;
53 u32 lsal; 68 u32 lsal;
54 u32 ipgvr; /* Reset, T */ 69 u32 ipgvr; /* Reset, T */
55 u32 stacr; /* special */ 70 u32 stacr; /* Special */
56 u32 trtr; /* special */ 71 u32 trtr; /* Special */
57 u32 rwmr; /* Reset */ 72 u32 rwmr; /* Reset */
58 u32 octx; 73 u32 octx;
59 u32 ocrx; 74 u32 ocrx;
60 u32 ipcr; 75 union {
76 /* Registers unique to EMAC4 implementations */
77 struct {
78 u32 ipcr;
79 } emac4;
80 /* Registers unique to EMAC4SYNC implementations */
81 struct {
82 u32 rsvd1;
83 u32 revid;
84 u32 rsvd2[2];
85 u32 iaht1; /* Reset, R */
86 u32 iaht2; /* Reset, R */
87 u32 iaht3; /* Reset, R */
88 u32 iaht4; /* Reset, R */
89 u32 iaht5; /* Reset, R */
90 u32 iaht6; /* Reset, R */
91 u32 iaht7; /* Reset, R */
92 u32 iaht8; /* Reset, R */
93 u32 gaht1; /* Reset, R */
94 u32 gaht2; /* Reset, R */
95 u32 gaht3; /* Reset, R */
96 u32 gaht4; /* Reset, R */
97 u32 gaht5; /* Reset, R */
98 u32 gaht6; /* Reset, R */
99 u32 gaht7; /* Reset, R */
100 u32 gaht8; /* Reset, R */
101 u32 tpc; /* Reset, T */
102 } emac4sync;
103 } u1;
61}; 104};
62 105
63/* 106/*
@@ -73,12 +116,6 @@ struct emac_regs {
73#define PHY_MODE_RTBI 7 116#define PHY_MODE_RTBI 7
74#define PHY_MODE_SGMII 8 117#define PHY_MODE_SGMII 8
75 118
76
77#define EMAC_ETHTOOL_REGS_VER 0
78#define EMAC_ETHTOOL_REGS_SIZE (sizeof(struct emac_regs) - sizeof(u32))
79#define EMAC4_ETHTOOL_REGS_VER 1
80#define EMAC4_ETHTOOL_REGS_SIZE sizeof(struct emac_regs)
81
82/* EMACx_MR0 */ 119/* EMACx_MR0 */
83#define EMAC_MR0_RXI 0x80000000 120#define EMAC_MR0_RXI 0x80000000
84#define EMAC_MR0_TXI 0x40000000 121#define EMAC_MR0_TXI 0x40000000
diff --git a/drivers/net/ibm_newemac/rgmii.c b/drivers/net/ibm_newemac/rgmii.c
index e32da3de2695..1d5379de6900 100644
--- a/drivers/net/ibm_newemac/rgmii.c
+++ b/drivers/net/ibm_newemac/rgmii.c
@@ -39,6 +39,7 @@
39#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4)) 39#define RGMII_FER_RGMII(idx) (0x5 << ((idx) * 4))
40#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4)) 40#define RGMII_FER_TBI(idx) (0x6 << ((idx) * 4))
41#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4)) 41#define RGMII_FER_GMII(idx) (0x7 << ((idx) * 4))
42#define RGMII_FER_MII(idx) RGMII_FER_GMII(idx)
42 43
43/* RGMIIx_SSR */ 44/* RGMIIx_SSR */
44#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8)) 45#define RGMII_SSR_MASK(idx) (0x7 << ((idx) * 8))
@@ -49,6 +50,7 @@
49static inline int rgmii_valid_mode(int phy_mode) 50static inline int rgmii_valid_mode(int phy_mode)
50{ 51{
51 return phy_mode == PHY_MODE_GMII || 52 return phy_mode == PHY_MODE_GMII ||
53 phy_mode == PHY_MODE_MII ||
52 phy_mode == PHY_MODE_RGMII || 54 phy_mode == PHY_MODE_RGMII ||
53 phy_mode == PHY_MODE_TBI || 55 phy_mode == PHY_MODE_TBI ||
54 phy_mode == PHY_MODE_RTBI; 56 phy_mode == PHY_MODE_RTBI;
@@ -63,6 +65,8 @@ static inline const char *rgmii_mode_name(int mode)
63 return "TBI"; 65 return "TBI";
64 case PHY_MODE_GMII: 66 case PHY_MODE_GMII:
65 return "GMII"; 67 return "GMII";
68 case PHY_MODE_MII:
69 return "MII";
66 case PHY_MODE_RTBI: 70 case PHY_MODE_RTBI:
67 return "RTBI"; 71 return "RTBI";
68 default: 72 default:
@@ -79,6 +83,8 @@ static inline u32 rgmii_mode_mask(int mode, int input)
79 return RGMII_FER_TBI(input); 83 return RGMII_FER_TBI(input);
80 case PHY_MODE_GMII: 84 case PHY_MODE_GMII:
81 return RGMII_FER_GMII(input); 85 return RGMII_FER_GMII(input);
86 case PHY_MODE_MII:
87 return RGMII_FER_MII(input);
82 case PHY_MODE_RTBI: 88 case PHY_MODE_RTBI:
83 return RGMII_FER_RTBI(input); 89 return RGMII_FER_RTBI(input);
84 default: 90 default:
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 665341e43055..387a13395015 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -585,8 +585,9 @@ static struct config_item_type netconsole_target_type = {
585 * Group operations and type for netconsole_subsys. 585 * Group operations and type for netconsole_subsys.
586 */ 586 */
587 587
588static struct config_item *make_netconsole_target(struct config_group *group, 588static int make_netconsole_target(struct config_group *group,
589 const char *name) 589 const char *name,
590 struct config_item **new_item)
590{ 591{
591 unsigned long flags; 592 unsigned long flags;
592 struct netconsole_target *nt; 593 struct netconsole_target *nt;
@@ -598,7 +599,7 @@ static struct config_item *make_netconsole_target(struct config_group *group,
598 nt = kzalloc(sizeof(*nt), GFP_KERNEL); 599 nt = kzalloc(sizeof(*nt), GFP_KERNEL);
599 if (!nt) { 600 if (!nt) {
600 printk(KERN_ERR "netconsole: failed to allocate memory\n"); 601 printk(KERN_ERR "netconsole: failed to allocate memory\n");
601 return NULL; 602 return -ENOMEM;
602 } 603 }
603 604
604 nt->np.name = "netconsole"; 605 nt->np.name = "netconsole";
@@ -615,7 +616,8 @@ static struct config_item *make_netconsole_target(struct config_group *group,
615 list_add(&nt->list, &target_list); 616 list_add(&nt->list, &target_list);
616 spin_unlock_irqrestore(&target_list_lock, flags); 617 spin_unlock_irqrestore(&target_list_lock, flags);
617 618
618 return &nt->item; 619 *new_item = &nt->item;
620 return 0;
619} 621}
620 622
621static void drop_netconsole_target(struct config_group *group, 623static void drop_netconsole_target(struct config_group *group,
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index fb0b918e5ccb..402e81020fb8 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -28,8 +28,8 @@
28#include <linux/mii.h> 28#include <linux/mii.h>
29#include <linux/phy.h> 29#include <linux/phy.h>
30#include <linux/workqueue.h> 30#include <linux/workqueue.h>
31#include <linux/of_platform.h>
31 32
32#include <asm/of_platform.h>
33#include <asm/uaccess.h> 33#include <asm/uaccess.h>
34#include <asm/irq.h> 34#include <asm/irq.h>
35#include <asm/io.h> 35#include <asm/io.h>
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index 940474736922..6d9e7ad9fda9 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -36,8 +36,8 @@
36#include <linux/mii.h> 36#include <linux/mii.h>
37#include <linux/phy.h> 37#include <linux/phy.h>
38#include <linux/fsl_devices.h> 38#include <linux/fsl_devices.h>
39#include <linux/of_platform.h>
39 40
40#include <asm/of_platform.h>
41#include <asm/io.h> 41#include <asm/io.h>
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/uaccess.h> 43#include <asm/uaccess.h>
diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c
index 3dd537be87d8..b54e2ea8346b 100644
--- a/drivers/net/wireless/libertas/if_sdio.c
+++ b/drivers/net/wireless/libertas/if_sdio.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * linux/drivers/net/wireless/libertas/if_sdio.c 2 * linux/drivers/net/wireless/libertas/if_sdio.c
3 * 3 *
4 * Copyright 2007 Pierre Ossman 4 * Copyright 2007-2008 Pierre Ossman
5 * 5 *
6 * Inspired by if_cs.c, Copyright 2007 Holger Schurig 6 * Inspired by if_cs.c, Copyright 2007 Holger Schurig
7 * 7 *
@@ -266,13 +266,10 @@ static int if_sdio_card_to_host(struct if_sdio_card *card)
266 266
267 /* 267 /*
268 * The transfer must be in one transaction or the firmware 268 * The transfer must be in one transaction or the firmware
269 * goes suicidal. 269 * goes suicidal. There's no way to guarantee that for all
270 * controllers, but we can at least try.
270 */ 271 */
271 chunk = size; 272 chunk = sdio_align_size(card->func, size);
272 if ((chunk > card->func->cur_blksize) || (chunk > 512)) {
273 chunk = (chunk + card->func->cur_blksize - 1) /
274 card->func->cur_blksize * card->func->cur_blksize;
275 }
276 273
277 ret = sdio_readsb(card->func, card->buffer, card->ioport, chunk); 274 ret = sdio_readsb(card->func, card->buffer, card->ioport, chunk);
278 if (ret) 275 if (ret)
@@ -696,13 +693,10 @@ static int if_sdio_host_to_card(struct lbs_private *priv,
696 693
697 /* 694 /*
698 * The transfer must be in one transaction or the firmware 695 * The transfer must be in one transaction or the firmware
699 * goes suicidal. 696 * goes suicidal. There's no way to guarantee that for all
697 * controllers, but we can at least try.
700 */ 698 */
701 size = nb + 4; 699 size = sdio_align_size(card->func, nb + 4);
702 if ((size > card->func->cur_blksize) || (size > 512)) {
703 size = (size + card->func->cur_blksize - 1) /
704 card->func->cur_blksize * card->func->cur_blksize;
705 }
706 700
707 packet = kzalloc(sizeof(struct if_sdio_packet) + size, 701 packet = kzalloc(sizeof(struct if_sdio_packet) + size,
708 GFP_ATOMIC); 702 GFP_ATOMIC);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-28 23:52:46 -0500