diff options
Diffstat (limited to 'drivers/net')
190 files changed, 13745 insertions, 9072 deletions
diff --git a/drivers/net/3c503.c b/drivers/net/3c503.c index 29dfd47f41d2..5c5eebdb6914 100644 --- a/drivers/net/3c503.c +++ b/drivers/net/3c503.c | |||
@@ -171,12 +171,7 @@ struct net_device * __init el2_probe(int unit) | |||
171 | err = do_el2_probe(dev); | 171 | err = do_el2_probe(dev); |
172 | if (err) | 172 | if (err) |
173 | goto out; | 173 | goto out; |
174 | err = register_netdev(dev); | ||
175 | if (err) | ||
176 | goto out1; | ||
177 | return dev; | 174 | return dev; |
178 | out1: | ||
179 | cleanup_card(dev); | ||
180 | out: | 175 | out: |
181 | free_netdev(dev); | 176 | free_netdev(dev); |
182 | return ERR_PTR(err); | 177 | return ERR_PTR(err); |
@@ -356,6 +351,10 @@ el2_probe1(struct net_device *dev, int ioaddr) | |||
356 | dev->poll_controller = ei_poll; | 351 | dev->poll_controller = ei_poll; |
357 | #endif | 352 | #endif |
358 | 353 | ||
354 | retval = register_netdev(dev); | ||
355 | if (retval) | ||
356 | goto out1; | ||
357 | |||
359 | if (dev->mem_start) | 358 | if (dev->mem_start) |
360 | printk("%s: %s - %dkB RAM, 8kB shared mem window at %#6lx-%#6lx.\n", | 359 | printk("%s: %s - %dkB RAM, 8kB shared mem window at %#6lx-%#6lx.\n", |
361 | dev->name, ei_status.name, (wordlength+1)<<3, | 360 | dev->name, ei_status.name, (wordlength+1)<<3, |
@@ -715,11 +714,8 @@ init_module(void) | |||
715 | dev->base_addr = io[this_dev]; | 714 | dev->base_addr = io[this_dev]; |
716 | dev->mem_end = xcvr[this_dev]; /* low 4bits = xcvr sel. */ | 715 | dev->mem_end = xcvr[this_dev]; /* low 4bits = xcvr sel. */ |
717 | if (do_el2_probe(dev) == 0) { | 716 | if (do_el2_probe(dev) == 0) { |
718 | if (register_netdev(dev) == 0) { | 717 | dev_el2[found++] = dev; |
719 | dev_el2[found++] = dev; | 718 | continue; |
720 | continue; | ||
721 | } | ||
722 | cleanup_card(dev); | ||
723 | } | 719 | } |
724 | free_netdev(dev); | 720 | free_netdev(dev); |
725 | printk(KERN_WARNING "3c503.c: No 3c503 card found (i/o = 0x%x).\n", io[this_dev]); | 721 | printk(KERN_WARNING "3c503.c: No 3c503 card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/3c505.c b/drivers/net/3c505.c index 76fa8cc24085..111601ca4ca3 100644 --- a/drivers/net/3c505.c +++ b/drivers/net/3c505.c | |||
@@ -272,7 +272,7 @@ static inline void set_hsf(struct net_device *dev, int hsf) | |||
272 | 272 | ||
273 | static int start_receive(struct net_device *, pcb_struct *); | 273 | static int start_receive(struct net_device *, pcb_struct *); |
274 | 274 | ||
275 | inline static void adapter_reset(struct net_device *dev) | 275 | static inline void adapter_reset(struct net_device *dev) |
276 | { | 276 | { |
277 | unsigned long timeout; | 277 | unsigned long timeout; |
278 | elp_device *adapter = dev->priv; | 278 | elp_device *adapter = dev->priv; |
@@ -1317,8 +1317,7 @@ static int __init elp_sense(struct net_device *dev) | |||
1317 | if (orig_HSR & DIR) { | 1317 | if (orig_HSR & DIR) { |
1318 | /* If HCR.DIR is up, we pull it down. HSR.DIR should follow. */ | 1318 | /* If HCR.DIR is up, we pull it down. HSR.DIR should follow. */ |
1319 | outb(0, dev->base_addr + PORT_CONTROL); | 1319 | outb(0, dev->base_addr + PORT_CONTROL); |
1320 | set_current_state(TASK_UNINTERRUPTIBLE); | 1320 | msleep(300); |
1321 | schedule_timeout(30*HZ/100); | ||
1322 | if (inb_status(addr) & DIR) { | 1321 | if (inb_status(addr) & DIR) { |
1323 | if (elp_debug > 0) | 1322 | if (elp_debug > 0) |
1324 | printk(notfound_msg, 2); | 1323 | printk(notfound_msg, 2); |
@@ -1327,8 +1326,7 @@ static int __init elp_sense(struct net_device *dev) | |||
1327 | } else { | 1326 | } else { |
1328 | /* If HCR.DIR is down, we pull it up. HSR.DIR should follow. */ | 1327 | /* If HCR.DIR is down, we pull it up. HSR.DIR should follow. */ |
1329 | outb(DIR, dev->base_addr + PORT_CONTROL); | 1328 | outb(DIR, dev->base_addr + PORT_CONTROL); |
1330 | set_current_state(TASK_UNINTERRUPTIBLE); | 1329 | msleep(300); |
1331 | schedule_timeout(30*HZ/100); | ||
1332 | if (!(inb_status(addr) & DIR)) { | 1330 | if (!(inb_status(addr) & DIR)) { |
1333 | if (elp_debug > 0) | 1331 | if (elp_debug > 0) |
1334 | printk(notfound_msg, 3); | 1332 | printk(notfound_msg, 3); |
diff --git a/drivers/net/3c509.c b/drivers/net/3c509.c index e843109d4f62..977935a3d898 100644 --- a/drivers/net/3c509.c +++ b/drivers/net/3c509.c | |||
@@ -217,6 +217,7 @@ static void el3_poll_controller(struct net_device *dev); | |||
217 | static struct eisa_device_id el3_eisa_ids[] = { | 217 | static struct eisa_device_id el3_eisa_ids[] = { |
218 | { "TCM5092" }, | 218 | { "TCM5092" }, |
219 | { "TCM5093" }, | 219 | { "TCM5093" }, |
220 | { "TCM5095" }, | ||
220 | { "" } | 221 | { "" } |
221 | }; | 222 | }; |
222 | 223 | ||
diff --git a/drivers/net/3c515.c b/drivers/net/3c515.c index c4cf4fcd1344..91d1c4c24d9b 100644 --- a/drivers/net/3c515.c +++ b/drivers/net/3c515.c | |||
@@ -365,7 +365,7 @@ static int nopnp; | |||
365 | #endif /* __ISAPNP__ */ | 365 | #endif /* __ISAPNP__ */ |
366 | 366 | ||
367 | static struct net_device *corkscrew_scan(int unit); | 367 | static struct net_device *corkscrew_scan(int unit); |
368 | static void corkscrew_setup(struct net_device *dev, int ioaddr, | 368 | static int corkscrew_setup(struct net_device *dev, int ioaddr, |
369 | struct pnp_dev *idev, int card_number); | 369 | struct pnp_dev *idev, int card_number); |
370 | static int corkscrew_open(struct net_device *dev); | 370 | static int corkscrew_open(struct net_device *dev); |
371 | static void corkscrew_timer(unsigned long arg); | 371 | static void corkscrew_timer(unsigned long arg); |
@@ -539,10 +539,9 @@ static struct net_device *corkscrew_scan(int unit) | |||
539 | printk(KERN_INFO "3c515 Resource configuration register %#4.4x, DCR %4.4x.\n", | 539 | printk(KERN_INFO "3c515 Resource configuration register %#4.4x, DCR %4.4x.\n", |
540 | inl(ioaddr + 0x2002), inw(ioaddr + 0x2000)); | 540 | inl(ioaddr + 0x2002), inw(ioaddr + 0x2000)); |
541 | /* irq = inw(ioaddr + 0x2002) & 15; */ /* Use the irq from isapnp */ | 541 | /* irq = inw(ioaddr + 0x2002) & 15; */ /* Use the irq from isapnp */ |
542 | corkscrew_setup(dev, ioaddr, idev, cards_found++); | ||
543 | SET_NETDEV_DEV(dev, &idev->dev); | 542 | SET_NETDEV_DEV(dev, &idev->dev); |
544 | pnp_cards++; | 543 | pnp_cards++; |
545 | err = register_netdev(dev); | 544 | err = corkscrew_setup(dev, ioaddr, idev, cards_found++); |
546 | if (!err) | 545 | if (!err) |
547 | return dev; | 546 | return dev; |
548 | cleanup_card(dev); | 547 | cleanup_card(dev); |
@@ -558,8 +557,7 @@ no_pnp: | |||
558 | 557 | ||
559 | printk(KERN_INFO "3c515 Resource configuration register %#4.4x, DCR %4.4x.\n", | 558 | printk(KERN_INFO "3c515 Resource configuration register %#4.4x, DCR %4.4x.\n", |
560 | inl(ioaddr + 0x2002), inw(ioaddr + 0x2000)); | 559 | inl(ioaddr + 0x2002), inw(ioaddr + 0x2000)); |
561 | corkscrew_setup(dev, ioaddr, NULL, cards_found++); | 560 | err = corkscrew_setup(dev, ioaddr, NULL, cards_found++); |
562 | err = register_netdev(dev); | ||
563 | if (!err) | 561 | if (!err) |
564 | return dev; | 562 | return dev; |
565 | cleanup_card(dev); | 563 | cleanup_card(dev); |
@@ -568,7 +566,7 @@ no_pnp: | |||
568 | return NULL; | 566 | return NULL; |
569 | } | 567 | } |
570 | 568 | ||
571 | static void corkscrew_setup(struct net_device *dev, int ioaddr, | 569 | static int corkscrew_setup(struct net_device *dev, int ioaddr, |
572 | struct pnp_dev *idev, int card_number) | 570 | struct pnp_dev *idev, int card_number) |
573 | { | 571 | { |
574 | struct corkscrew_private *vp = netdev_priv(dev); | 572 | struct corkscrew_private *vp = netdev_priv(dev); |
@@ -691,6 +689,8 @@ static void corkscrew_setup(struct net_device *dev, int ioaddr, | |||
691 | dev->get_stats = &corkscrew_get_stats; | 689 | dev->get_stats = &corkscrew_get_stats; |
692 | dev->set_multicast_list = &set_rx_mode; | 690 | dev->set_multicast_list = &set_rx_mode; |
693 | dev->ethtool_ops = &netdev_ethtool_ops; | 691 | dev->ethtool_ops = &netdev_ethtool_ops; |
692 | |||
693 | return register_netdev(dev); | ||
694 | } | 694 | } |
695 | 695 | ||
696 | 696 | ||
@@ -822,7 +822,7 @@ static int corkscrew_open(struct net_device *dev) | |||
822 | break; /* Bad news! */ | 822 | break; /* Bad news! */ |
823 | skb->dev = dev; /* Mark as being used by this device. */ | 823 | skb->dev = dev; /* Mark as being used by this device. */ |
824 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 824 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
825 | vp->rx_ring[i].addr = isa_virt_to_bus(skb->tail); | 825 | vp->rx_ring[i].addr = isa_virt_to_bus(skb->data); |
826 | } | 826 | } |
827 | vp->rx_ring[i - 1].next = isa_virt_to_bus(&vp->rx_ring[0]); /* Wrap the ring. */ | 827 | vp->rx_ring[i - 1].next = isa_virt_to_bus(&vp->rx_ring[0]); /* Wrap the ring. */ |
828 | outl(isa_virt_to_bus(&vp->rx_ring[0]), ioaddr + UpListPtr); | 828 | outl(isa_virt_to_bus(&vp->rx_ring[0]), ioaddr + UpListPtr); |
@@ -1406,7 +1406,7 @@ static int boomerang_rx(struct net_device *dev) | |||
1406 | break; /* Bad news! */ | 1406 | break; /* Bad news! */ |
1407 | skb->dev = dev; /* Mark as being used by this device. */ | 1407 | skb->dev = dev; /* Mark as being used by this device. */ |
1408 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1408 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1409 | vp->rx_ring[entry].addr = isa_virt_to_bus(skb->tail); | 1409 | vp->rx_ring[entry].addr = isa_virt_to_bus(skb->data); |
1410 | vp->rx_skbuff[entry] = skb; | 1410 | vp->rx_skbuff[entry] = skb; |
1411 | } | 1411 | } |
1412 | vp->rx_ring[entry].status = 0; /* Clear complete bit. */ | 1412 | vp->rx_ring[entry].status = 0; /* Clear complete bit. */ |
diff --git a/drivers/net/3c523.c b/drivers/net/3c523.c index 8f6b2fa13e28..9e1fe2e0478c 100644 --- a/drivers/net/3c523.c +++ b/drivers/net/3c523.c | |||
@@ -572,6 +572,10 @@ static int __init do_elmc_probe(struct net_device *dev) | |||
572 | dev->flags&=~IFF_MULTICAST; /* Multicast doesn't work */ | 572 | dev->flags&=~IFF_MULTICAST; /* Multicast doesn't work */ |
573 | #endif | 573 | #endif |
574 | 574 | ||
575 | retval = register_netdev(dev); | ||
576 | if (retval) | ||
577 | goto err_out; | ||
578 | |||
575 | return 0; | 579 | return 0; |
576 | err_out: | 580 | err_out: |
577 | mca_set_adapter_procfn(slot, NULL, NULL); | 581 | mca_set_adapter_procfn(slot, NULL, NULL); |
@@ -600,12 +604,7 @@ struct net_device * __init elmc_probe(int unit) | |||
600 | err = do_elmc_probe(dev); | 604 | err = do_elmc_probe(dev); |
601 | if (err) | 605 | if (err) |
602 | goto out; | 606 | goto out; |
603 | err = register_netdev(dev); | ||
604 | if (err) | ||
605 | goto out1; | ||
606 | return dev; | 607 | return dev; |
607 | out1: | ||
608 | cleanup_card(dev); | ||
609 | out: | 608 | out: |
610 | free_netdev(dev); | 609 | free_netdev(dev); |
611 | return ERR_PTR(err); | 610 | return ERR_PTR(err); |
@@ -1275,6 +1274,7 @@ module_param_array(irq, int, NULL, 0); | |||
1275 | module_param_array(io, int, NULL, 0); | 1274 | module_param_array(io, int, NULL, 0); |
1276 | MODULE_PARM_DESC(io, "EtherLink/MC I/O base address(es)"); | 1275 | MODULE_PARM_DESC(io, "EtherLink/MC I/O base address(es)"); |
1277 | MODULE_PARM_DESC(irq, "EtherLink/MC IRQ number(s)"); | 1276 | MODULE_PARM_DESC(irq, "EtherLink/MC IRQ number(s)"); |
1277 | MODULE_LICENSE("GPL"); | ||
1278 | 1278 | ||
1279 | int init_module(void) | 1279 | int init_module(void) |
1280 | { | 1280 | { |
@@ -1288,12 +1288,9 @@ int init_module(void) | |||
1288 | dev->irq=irq[this_dev]; | 1288 | dev->irq=irq[this_dev]; |
1289 | dev->base_addr=io[this_dev]; | 1289 | dev->base_addr=io[this_dev]; |
1290 | if (do_elmc_probe(dev) == 0) { | 1290 | if (do_elmc_probe(dev) == 0) { |
1291 | if (register_netdev(dev) == 0) { | 1291 | dev_elmc[this_dev] = dev; |
1292 | dev_elmc[this_dev] = dev; | 1292 | found++; |
1293 | found++; | 1293 | continue; |
1294 | continue; | ||
1295 | } | ||
1296 | cleanup_card(dev); | ||
1297 | } | 1294 | } |
1298 | free_netdev(dev); | 1295 | free_netdev(dev); |
1299 | if (io[this_dev]==0) | 1296 | if (io[this_dev]==0) |
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c index b5e076043431..07746b95fd83 100644 --- a/drivers/net/3c59x.c +++ b/drivers/net/3c59x.c | |||
@@ -1802,7 +1802,7 @@ vortex_open(struct net_device *dev) | |||
1802 | break; /* Bad news! */ | 1802 | break; /* Bad news! */ |
1803 | skb->dev = dev; /* Mark as being used by this device. */ | 1803 | skb->dev = dev; /* Mark as being used by this device. */ |
1804 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1804 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1805 | vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE)); | 1805 | vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE)); |
1806 | } | 1806 | } |
1807 | if (i != RX_RING_SIZE) { | 1807 | if (i != RX_RING_SIZE) { |
1808 | int j; | 1808 | int j; |
@@ -2202,9 +2202,8 @@ boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2202 | 2202 | ||
2203 | if (vortex_debug > 6) { | 2203 | if (vortex_debug > 6) { |
2204 | printk(KERN_DEBUG "boomerang_start_xmit()\n"); | 2204 | printk(KERN_DEBUG "boomerang_start_xmit()\n"); |
2205 | if (vortex_debug > 3) | 2205 | printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n", |
2206 | printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n", | 2206 | dev->name, vp->cur_tx); |
2207 | dev->name, vp->cur_tx); | ||
2208 | } | 2207 | } |
2209 | 2208 | ||
2210 | if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) { | 2209 | if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) { |
@@ -2633,7 +2632,7 @@ boomerang_rx(struct net_device *dev) | |||
2633 | pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE); | 2632 | pci_dma_sync_single_for_cpu(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE); |
2634 | /* 'skb_put()' points to the start of sk_buff data area. */ | 2633 | /* 'skb_put()' points to the start of sk_buff data area. */ |
2635 | memcpy(skb_put(skb, pkt_len), | 2634 | memcpy(skb_put(skb, pkt_len), |
2636 | vp->rx_skbuff[entry]->tail, | 2635 | vp->rx_skbuff[entry]->data, |
2637 | pkt_len); | 2636 | pkt_len); |
2638 | pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE); | 2637 | pci_dma_sync_single_for_device(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE); |
2639 | vp->rx_copy++; | 2638 | vp->rx_copy++; |
@@ -2679,7 +2678,7 @@ boomerang_rx(struct net_device *dev) | |||
2679 | } | 2678 | } |
2680 | skb->dev = dev; /* Mark as being used by this device. */ | 2679 | skb->dev = dev; /* Mark as being used by this device. */ |
2681 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 2680 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
2682 | vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE)); | 2681 | vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, PKT_BUF_SZ, PCI_DMA_FROMDEVICE)); |
2683 | vp->rx_skbuff[entry] = skb; | 2682 | vp->rx_skbuff[entry] = skb; |
2684 | } | 2683 | } |
2685 | vp->rx_ring[entry].status = 0; /* Clear complete bit. */ | 2684 | vp->rx_ring[entry].status = 0; /* Clear complete bit. */ |
diff --git a/drivers/net/8139cp.c b/drivers/net/8139cp.c index d639cb8dc461..7b293f01c9ed 100644 --- a/drivers/net/8139cp.c +++ b/drivers/net/8139cp.c | |||
@@ -54,12 +54,14 @@ | |||
54 | 54 | ||
55 | #include <linux/config.h> | 55 | #include <linux/config.h> |
56 | #include <linux/module.h> | 56 | #include <linux/module.h> |
57 | #include <linux/moduleparam.h> | ||
57 | #include <linux/kernel.h> | 58 | #include <linux/kernel.h> |
58 | #include <linux/compiler.h> | 59 | #include <linux/compiler.h> |
59 | #include <linux/netdevice.h> | 60 | #include <linux/netdevice.h> |
60 | #include <linux/etherdevice.h> | 61 | #include <linux/etherdevice.h> |
61 | #include <linux/init.h> | 62 | #include <linux/init.h> |
62 | #include <linux/pci.h> | 63 | #include <linux/pci.h> |
64 | #include <linux/dma-mapping.h> | ||
63 | #include <linux/delay.h> | 65 | #include <linux/delay.h> |
64 | #include <linux/ethtool.h> | 66 | #include <linux/ethtool.h> |
65 | #include <linux/mii.h> | 67 | #include <linux/mii.h> |
@@ -91,16 +93,17 @@ KERN_INFO DRV_NAME ": 10/100 PCI Ethernet driver v" DRV_VERSION " (" DRV_RELDATE | |||
91 | 93 | ||
92 | MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>"); | 94 | MODULE_AUTHOR("Jeff Garzik <jgarzik@pobox.com>"); |
93 | MODULE_DESCRIPTION("RealTek RTL-8139C+ series 10/100 PCI Ethernet driver"); | 95 | MODULE_DESCRIPTION("RealTek RTL-8139C+ series 10/100 PCI Ethernet driver"); |
96 | MODULE_VERSION(DRV_VERSION); | ||
94 | MODULE_LICENSE("GPL"); | 97 | MODULE_LICENSE("GPL"); |
95 | 98 | ||
96 | static int debug = -1; | 99 | static int debug = -1; |
97 | MODULE_PARM (debug, "i"); | 100 | module_param(debug, int, 0); |
98 | MODULE_PARM_DESC (debug, "8139cp: bitmapped message enable number"); | 101 | MODULE_PARM_DESC (debug, "8139cp: bitmapped message enable number"); |
99 | 102 | ||
100 | /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). | 103 | /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast). |
101 | The RTL chips use a 64 element hash table based on the Ethernet CRC. */ | 104 | The RTL chips use a 64 element hash table based on the Ethernet CRC. */ |
102 | static int multicast_filter_limit = 32; | 105 | static int multicast_filter_limit = 32; |
103 | MODULE_PARM (multicast_filter_limit, "i"); | 106 | module_param(multicast_filter_limit, int, 0); |
104 | MODULE_PARM_DESC (multicast_filter_limit, "8139cp: maximum number of filtered multicast addresses"); | 107 | MODULE_PARM_DESC (multicast_filter_limit, "8139cp: maximum number of filtered multicast addresses"); |
105 | 108 | ||
106 | #define PFX DRV_NAME ": " | 109 | #define PFX DRV_NAME ": " |
@@ -186,6 +189,9 @@ enum { | |||
186 | RingEnd = (1 << 30), /* End of descriptor ring */ | 189 | RingEnd = (1 << 30), /* End of descriptor ring */ |
187 | FirstFrag = (1 << 29), /* First segment of a packet */ | 190 | FirstFrag = (1 << 29), /* First segment of a packet */ |
188 | LastFrag = (1 << 28), /* Final segment of a packet */ | 191 | LastFrag = (1 << 28), /* Final segment of a packet */ |
192 | LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */ | ||
193 | MSSShift = 16, /* MSS value position */ | ||
194 | MSSMask = 0xfff, /* MSS value: 11 bits */ | ||
189 | TxError = (1 << 23), /* Tx error summary */ | 195 | TxError = (1 << 23), /* Tx error summary */ |
190 | RxError = (1 << 20), /* Rx error summary */ | 196 | RxError = (1 << 20), /* Rx error summary */ |
191 | IPCS = (1 << 18), /* Calculate IP checksum */ | 197 | IPCS = (1 << 18), /* Calculate IP checksum */ |
@@ -312,7 +318,7 @@ struct cp_desc { | |||
312 | struct ring_info { | 318 | struct ring_info { |
313 | struct sk_buff *skb; | 319 | struct sk_buff *skb; |
314 | dma_addr_t mapping; | 320 | dma_addr_t mapping; |
315 | unsigned frag; | 321 | u32 len; |
316 | }; | 322 | }; |
317 | 323 | ||
318 | struct cp_dma_stats { | 324 | struct cp_dma_stats { |
@@ -394,6 +400,9 @@ struct cp_private { | |||
394 | static void __cp_set_rx_mode (struct net_device *dev); | 400 | static void __cp_set_rx_mode (struct net_device *dev); |
395 | static void cp_tx (struct cp_private *cp); | 401 | static void cp_tx (struct cp_private *cp); |
396 | static void cp_clean_rings (struct cp_private *cp); | 402 | static void cp_clean_rings (struct cp_private *cp); |
403 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
404 | static void cp_poll_controller(struct net_device *dev); | ||
405 | #endif | ||
397 | 406 | ||
398 | static struct pci_device_id cp_pci_tbl[] = { | 407 | static struct pci_device_id cp_pci_tbl[] = { |
399 | { PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139, | 408 | { PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139, |
@@ -587,7 +596,7 @@ rx_status_loop: | |||
587 | 596 | ||
588 | mapping = | 597 | mapping = |
589 | cp->rx_skb[rx_tail].mapping = | 598 | cp->rx_skb[rx_tail].mapping = |
590 | pci_map_single(cp->pdev, new_skb->tail, | 599 | pci_map_single(cp->pdev, new_skb->data, |
591 | buflen, PCI_DMA_FROMDEVICE); | 600 | buflen, PCI_DMA_FROMDEVICE); |
592 | cp->rx_skb[rx_tail].skb = new_skb; | 601 | cp->rx_skb[rx_tail].skb = new_skb; |
593 | 602 | ||
@@ -688,6 +697,19 @@ cp_interrupt (int irq, void *dev_instance, struct pt_regs *regs) | |||
688 | return IRQ_HANDLED; | 697 | return IRQ_HANDLED; |
689 | } | 698 | } |
690 | 699 | ||
700 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
701 | /* | ||
702 | * Polling receive - used by netconsole and other diagnostic tools | ||
703 | * to allow network i/o with interrupts disabled. | ||
704 | */ | ||
705 | static void cp_poll_controller(struct net_device *dev) | ||
706 | { | ||
707 | disable_irq(dev->irq); | ||
708 | cp_interrupt(dev->irq, dev, NULL); | ||
709 | enable_irq(dev->irq); | ||
710 | } | ||
711 | #endif | ||
712 | |||
691 | static void cp_tx (struct cp_private *cp) | 713 | static void cp_tx (struct cp_private *cp) |
692 | { | 714 | { |
693 | unsigned tx_head = cp->tx_head; | 715 | unsigned tx_head = cp->tx_head; |
@@ -707,7 +729,7 @@ static void cp_tx (struct cp_private *cp) | |||
707 | BUG(); | 729 | BUG(); |
708 | 730 | ||
709 | pci_unmap_single(cp->pdev, cp->tx_skb[tx_tail].mapping, | 731 | pci_unmap_single(cp->pdev, cp->tx_skb[tx_tail].mapping, |
710 | skb->len, PCI_DMA_TODEVICE); | 732 | cp->tx_skb[tx_tail].len, PCI_DMA_TODEVICE); |
711 | 733 | ||
712 | if (status & LastFrag) { | 734 | if (status & LastFrag) { |
713 | if (status & (TxError | TxFIFOUnder)) { | 735 | if (status & (TxError | TxFIFOUnder)) { |
@@ -749,10 +771,11 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
749 | { | 771 | { |
750 | struct cp_private *cp = netdev_priv(dev); | 772 | struct cp_private *cp = netdev_priv(dev); |
751 | unsigned entry; | 773 | unsigned entry; |
752 | u32 eor; | 774 | u32 eor, flags; |
753 | #if CP_VLAN_TAG_USED | 775 | #if CP_VLAN_TAG_USED |
754 | u32 vlan_tag = 0; | 776 | u32 vlan_tag = 0; |
755 | #endif | 777 | #endif |
778 | int mss = 0; | ||
756 | 779 | ||
757 | spin_lock_irq(&cp->lock); | 780 | spin_lock_irq(&cp->lock); |
758 | 781 | ||
@@ -772,6 +795,9 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
772 | 795 | ||
773 | entry = cp->tx_head; | 796 | entry = cp->tx_head; |
774 | eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0; | 797 | eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0; |
798 | if (dev->features & NETIF_F_TSO) | ||
799 | mss = skb_shinfo(skb)->tso_size; | ||
800 | |||
775 | if (skb_shinfo(skb)->nr_frags == 0) { | 801 | if (skb_shinfo(skb)->nr_frags == 0) { |
776 | struct cp_desc *txd = &cp->tx_ring[entry]; | 802 | struct cp_desc *txd = &cp->tx_ring[entry]; |
777 | u32 len; | 803 | u32 len; |
@@ -783,26 +809,26 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
783 | txd->addr = cpu_to_le64(mapping); | 809 | txd->addr = cpu_to_le64(mapping); |
784 | wmb(); | 810 | wmb(); |
785 | 811 | ||
786 | if (skb->ip_summed == CHECKSUM_HW) { | 812 | flags = eor | len | DescOwn | FirstFrag | LastFrag; |
813 | |||
814 | if (mss) | ||
815 | flags |= LargeSend | ((mss & MSSMask) << MSSShift); | ||
816 | else if (skb->ip_summed == CHECKSUM_HW) { | ||
787 | const struct iphdr *ip = skb->nh.iph; | 817 | const struct iphdr *ip = skb->nh.iph; |
788 | if (ip->protocol == IPPROTO_TCP) | 818 | if (ip->protocol == IPPROTO_TCP) |
789 | txd->opts1 = cpu_to_le32(eor | len | DescOwn | | 819 | flags |= IPCS | TCPCS; |
790 | FirstFrag | LastFrag | | ||
791 | IPCS | TCPCS); | ||
792 | else if (ip->protocol == IPPROTO_UDP) | 820 | else if (ip->protocol == IPPROTO_UDP) |
793 | txd->opts1 = cpu_to_le32(eor | len | DescOwn | | 821 | flags |= IPCS | UDPCS; |
794 | FirstFrag | LastFrag | | ||
795 | IPCS | UDPCS); | ||
796 | else | 822 | else |
797 | BUG(); | 823 | WARN_ON(1); /* we need a WARN() */ |
798 | } else | 824 | } |
799 | txd->opts1 = cpu_to_le32(eor | len | DescOwn | | 825 | |
800 | FirstFrag | LastFrag); | 826 | txd->opts1 = cpu_to_le32(flags); |
801 | wmb(); | 827 | wmb(); |
802 | 828 | ||
803 | cp->tx_skb[entry].skb = skb; | 829 | cp->tx_skb[entry].skb = skb; |
804 | cp->tx_skb[entry].mapping = mapping; | 830 | cp->tx_skb[entry].mapping = mapping; |
805 | cp->tx_skb[entry].frag = 0; | 831 | cp->tx_skb[entry].len = len; |
806 | entry = NEXT_TX(entry); | 832 | entry = NEXT_TX(entry); |
807 | } else { | 833 | } else { |
808 | struct cp_desc *txd; | 834 | struct cp_desc *txd; |
@@ -820,7 +846,7 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
820 | first_len, PCI_DMA_TODEVICE); | 846 | first_len, PCI_DMA_TODEVICE); |
821 | cp->tx_skb[entry].skb = skb; | 847 | cp->tx_skb[entry].skb = skb; |
822 | cp->tx_skb[entry].mapping = first_mapping; | 848 | cp->tx_skb[entry].mapping = first_mapping; |
823 | cp->tx_skb[entry].frag = 1; | 849 | cp->tx_skb[entry].len = first_len; |
824 | entry = NEXT_TX(entry); | 850 | entry = NEXT_TX(entry); |
825 | 851 | ||
826 | for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { | 852 | for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) { |
@@ -836,16 +862,19 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
836 | len, PCI_DMA_TODEVICE); | 862 | len, PCI_DMA_TODEVICE); |
837 | eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0; | 863 | eor = (entry == (CP_TX_RING_SIZE - 1)) ? RingEnd : 0; |
838 | 864 | ||
839 | if (skb->ip_summed == CHECKSUM_HW) { | 865 | ctrl = eor | len | DescOwn; |
840 | ctrl = eor | len | DescOwn | IPCS; | 866 | |
867 | if (mss) | ||
868 | ctrl |= LargeSend | | ||
869 | ((mss & MSSMask) << MSSShift); | ||
870 | else if (skb->ip_summed == CHECKSUM_HW) { | ||
841 | if (ip->protocol == IPPROTO_TCP) | 871 | if (ip->protocol == IPPROTO_TCP) |
842 | ctrl |= TCPCS; | 872 | ctrl |= IPCS | TCPCS; |
843 | else if (ip->protocol == IPPROTO_UDP) | 873 | else if (ip->protocol == IPPROTO_UDP) |
844 | ctrl |= UDPCS; | 874 | ctrl |= IPCS | UDPCS; |
845 | else | 875 | else |
846 | BUG(); | 876 | BUG(); |
847 | } else | 877 | } |
848 | ctrl = eor | len | DescOwn; | ||
849 | 878 | ||
850 | if (frag == skb_shinfo(skb)->nr_frags - 1) | 879 | if (frag == skb_shinfo(skb)->nr_frags - 1) |
851 | ctrl |= LastFrag; | 880 | ctrl |= LastFrag; |
@@ -860,7 +889,7 @@ static int cp_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
860 | 889 | ||
861 | cp->tx_skb[entry].skb = skb; | 890 | cp->tx_skb[entry].skb = skb; |
862 | cp->tx_skb[entry].mapping = mapping; | 891 | cp->tx_skb[entry].mapping = mapping; |
863 | cp->tx_skb[entry].frag = frag + 2; | 892 | cp->tx_skb[entry].len = len; |
864 | entry = NEXT_TX(entry); | 893 | entry = NEXT_TX(entry); |
865 | } | 894 | } |
866 | 895 | ||
@@ -1072,9 +1101,8 @@ static int cp_refill_rx (struct cp_private *cp) | |||
1072 | skb_reserve(skb, RX_OFFSET); | 1101 | skb_reserve(skb, RX_OFFSET); |
1073 | 1102 | ||
1074 | cp->rx_skb[i].mapping = pci_map_single(cp->pdev, | 1103 | cp->rx_skb[i].mapping = pci_map_single(cp->pdev, |
1075 | skb->tail, cp->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1104 | skb->data, cp->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1076 | cp->rx_skb[i].skb = skb; | 1105 | cp->rx_skb[i].skb = skb; |
1077 | cp->rx_skb[i].frag = 0; | ||
1078 | 1106 | ||
1079 | cp->rx_ring[i].opts2 = 0; | 1107 | cp->rx_ring[i].opts2 = 0; |
1080 | cp->rx_ring[i].addr = cpu_to_le64(cp->rx_skb[i].mapping); | 1108 | cp->rx_ring[i].addr = cpu_to_le64(cp->rx_skb[i].mapping); |
@@ -1126,9 +1154,6 @@ static void cp_clean_rings (struct cp_private *cp) | |||
1126 | { | 1154 | { |
1127 | unsigned i; | 1155 | unsigned i; |
1128 | 1156 | ||
1129 | memset(cp->rx_ring, 0, sizeof(struct cp_desc) * CP_RX_RING_SIZE); | ||
1130 | memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE); | ||
1131 | |||
1132 | for (i = 0; i < CP_RX_RING_SIZE; i++) { | 1157 | for (i = 0; i < CP_RX_RING_SIZE; i++) { |
1133 | if (cp->rx_skb[i].skb) { | 1158 | if (cp->rx_skb[i].skb) { |
1134 | pci_unmap_single(cp->pdev, cp->rx_skb[i].mapping, | 1159 | pci_unmap_single(cp->pdev, cp->rx_skb[i].mapping, |
@@ -1140,13 +1165,18 @@ static void cp_clean_rings (struct cp_private *cp) | |||
1140 | for (i = 0; i < CP_TX_RING_SIZE; i++) { | 1165 | for (i = 0; i < CP_TX_RING_SIZE; i++) { |
1141 | if (cp->tx_skb[i].skb) { | 1166 | if (cp->tx_skb[i].skb) { |
1142 | struct sk_buff *skb = cp->tx_skb[i].skb; | 1167 | struct sk_buff *skb = cp->tx_skb[i].skb; |
1168 | |||
1143 | pci_unmap_single(cp->pdev, cp->tx_skb[i].mapping, | 1169 | pci_unmap_single(cp->pdev, cp->tx_skb[i].mapping, |
1144 | skb->len, PCI_DMA_TODEVICE); | 1170 | cp->tx_skb[i].len, PCI_DMA_TODEVICE); |
1145 | dev_kfree_skb(skb); | 1171 | if (le32_to_cpu(cp->tx_ring[i].opts1) & LastFrag) |
1172 | dev_kfree_skb(skb); | ||
1146 | cp->net_stats.tx_dropped++; | 1173 | cp->net_stats.tx_dropped++; |
1147 | } | 1174 | } |
1148 | } | 1175 | } |
1149 | 1176 | ||
1177 | memset(cp->rx_ring, 0, sizeof(struct cp_desc) * CP_RX_RING_SIZE); | ||
1178 | memset(cp->tx_ring, 0, sizeof(struct cp_desc) * CP_TX_RING_SIZE); | ||
1179 | |||
1150 | memset(&cp->rx_skb, 0, sizeof(struct ring_info) * CP_RX_RING_SIZE); | 1180 | memset(&cp->rx_skb, 0, sizeof(struct ring_info) * CP_RX_RING_SIZE); |
1151 | memset(&cp->tx_skb, 0, sizeof(struct ring_info) * CP_TX_RING_SIZE); | 1181 | memset(&cp->tx_skb, 0, sizeof(struct ring_info) * CP_TX_RING_SIZE); |
1152 | } | 1182 | } |
@@ -1486,22 +1516,22 @@ static void cp_get_ethtool_stats (struct net_device *dev, | |||
1486 | struct ethtool_stats *estats, u64 *tmp_stats) | 1516 | struct ethtool_stats *estats, u64 *tmp_stats) |
1487 | { | 1517 | { |
1488 | struct cp_private *cp = netdev_priv(dev); | 1518 | struct cp_private *cp = netdev_priv(dev); |
1489 | unsigned int work = 100; | ||
1490 | int i; | 1519 | int i; |
1491 | 1520 | ||
1521 | memset(cp->nic_stats, 0, sizeof(struct cp_dma_stats)); | ||
1522 | |||
1492 | /* begin NIC statistics dump */ | 1523 | /* begin NIC statistics dump */ |
1493 | cpw32(StatsAddr + 4, (cp->nic_stats_dma >> 16) >> 16); | 1524 | cpw32(StatsAddr + 4, (cp->nic_stats_dma >> 16) >> 16); |
1494 | cpw32(StatsAddr, (cp->nic_stats_dma & 0xffffffff) | DumpStats); | 1525 | cpw32(StatsAddr, (cp->nic_stats_dma & 0xffffffff) | DumpStats); |
1495 | cpr32(StatsAddr); | 1526 | cpr32(StatsAddr); |
1496 | 1527 | ||
1497 | while (work-- > 0) { | 1528 | for (i = 0; i < 1000; i++) { |
1498 | if ((cpr32(StatsAddr) & DumpStats) == 0) | 1529 | if ((cpr32(StatsAddr) & DumpStats) == 0) |
1499 | break; | 1530 | break; |
1500 | cpu_relax(); | 1531 | udelay(10); |
1501 | } | 1532 | } |
1502 | 1533 | cpw32(StatsAddr, 0); | |
1503 | if (cpr32(StatsAddr) & DumpStats) | 1534 | cpw32(StatsAddr + 4, 0); |
1504 | return /* -EIO */; | ||
1505 | 1535 | ||
1506 | i = 0; | 1536 | i = 0; |
1507 | tmp_stats[i++] = le64_to_cpu(cp->nic_stats->tx_ok); | 1537 | tmp_stats[i++] = le64_to_cpu(cp->nic_stats->tx_ok); |
@@ -1538,6 +1568,8 @@ static struct ethtool_ops cp_ethtool_ops = { | |||
1538 | .set_tx_csum = ethtool_op_set_tx_csum, /* local! */ | 1568 | .set_tx_csum = ethtool_op_set_tx_csum, /* local! */ |
1539 | .get_sg = ethtool_op_get_sg, | 1569 | .get_sg = ethtool_op_get_sg, |
1540 | .set_sg = ethtool_op_set_sg, | 1570 | .set_sg = ethtool_op_set_sg, |
1571 | .get_tso = ethtool_op_get_tso, | ||
1572 | .set_tso = ethtool_op_set_tso, | ||
1541 | .get_regs = cp_get_regs, | 1573 | .get_regs = cp_get_regs, |
1542 | .get_wol = cp_get_wol, | 1574 | .get_wol = cp_get_wol, |
1543 | .set_wol = cp_set_wol, | 1575 | .set_wol = cp_set_wol, |
@@ -1701,19 +1733,19 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1701 | 1733 | ||
1702 | /* Configure DMA attributes. */ | 1734 | /* Configure DMA attributes. */ |
1703 | if ((sizeof(dma_addr_t) > 4) && | 1735 | if ((sizeof(dma_addr_t) > 4) && |
1704 | !pci_set_consistent_dma_mask(pdev, 0xffffffffffffffffULL) && | 1736 | !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK) && |
1705 | !pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) { | 1737 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
1706 | pci_using_dac = 1; | 1738 | pci_using_dac = 1; |
1707 | } else { | 1739 | } else { |
1708 | pci_using_dac = 0; | 1740 | pci_using_dac = 0; |
1709 | 1741 | ||
1710 | rc = pci_set_dma_mask(pdev, 0xffffffffULL); | 1742 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
1711 | if (rc) { | 1743 | if (rc) { |
1712 | printk(KERN_ERR PFX "No usable DMA configuration, " | 1744 | printk(KERN_ERR PFX "No usable DMA configuration, " |
1713 | "aborting.\n"); | 1745 | "aborting.\n"); |
1714 | goto err_out_res; | 1746 | goto err_out_res; |
1715 | } | 1747 | } |
1716 | rc = pci_set_consistent_dma_mask(pdev, 0xffffffffULL); | 1748 | rc = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); |
1717 | if (rc) { | 1749 | if (rc) { |
1718 | printk(KERN_ERR PFX "No usable consistent DMA configuration, " | 1750 | printk(KERN_ERR PFX "No usable consistent DMA configuration, " |
1719 | "aborting.\n"); | 1751 | "aborting.\n"); |
@@ -1749,6 +1781,9 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1749 | dev->get_stats = cp_get_stats; | 1781 | dev->get_stats = cp_get_stats; |
1750 | dev->do_ioctl = cp_ioctl; | 1782 | dev->do_ioctl = cp_ioctl; |
1751 | dev->poll = cp_rx_poll; | 1783 | dev->poll = cp_rx_poll; |
1784 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
1785 | dev->poll_controller = cp_poll_controller; | ||
1786 | #endif | ||
1752 | dev->weight = 16; /* arbitrary? from NAPI_HOWTO.txt. */ | 1787 | dev->weight = 16; /* arbitrary? from NAPI_HOWTO.txt. */ |
1753 | #ifdef BROKEN | 1788 | #ifdef BROKEN |
1754 | dev->change_mtu = cp_change_mtu; | 1789 | dev->change_mtu = cp_change_mtu; |
@@ -1768,6 +1803,10 @@ static int cp_init_one (struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1768 | if (pci_using_dac) | 1803 | if (pci_using_dac) |
1769 | dev->features |= NETIF_F_HIGHDMA; | 1804 | dev->features |= NETIF_F_HIGHDMA; |
1770 | 1805 | ||
1806 | #if 0 /* disabled by default until verified */ | ||
1807 | dev->features |= NETIF_F_TSO; | ||
1808 | #endif | ||
1809 | |||
1771 | dev->irq = pdev->irq; | 1810 | dev->irq = pdev->irq; |
1772 | 1811 | ||
1773 | rc = register_netdev(dev); | 1812 | rc = register_netdev(dev); |
diff --git a/drivers/net/8139too.c b/drivers/net/8139too.c index d4bd20c21a1f..4c2cf7bbd252 100644 --- a/drivers/net/8139too.c +++ b/drivers/net/8139too.c | |||
@@ -126,14 +126,14 @@ | |||
126 | #define USE_IO_OPS 1 | 126 | #define USE_IO_OPS 1 |
127 | #endif | 127 | #endif |
128 | 128 | ||
129 | /* define to 1 to enable copious debugging info */ | 129 | /* define to 1, 2 or 3 to enable copious debugging info */ |
130 | #undef RTL8139_DEBUG | 130 | #define RTL8139_DEBUG 0 |
131 | 131 | ||
132 | /* define to 1 to disable lightweight runtime debugging checks */ | 132 | /* define to 1 to disable lightweight runtime debugging checks */ |
133 | #undef RTL8139_NDEBUG | 133 | #undef RTL8139_NDEBUG |
134 | 134 | ||
135 | 135 | ||
136 | #ifdef RTL8139_DEBUG | 136 | #if RTL8139_DEBUG |
137 | /* note: prints function name for you */ | 137 | /* note: prints function name for you */ |
138 | # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) | 138 | # define DPRINTK(fmt, args...) printk(KERN_DEBUG "%s: " fmt, __FUNCTION__ , ## args) |
139 | #else | 139 | #else |
@@ -569,7 +569,7 @@ struct rtl_extra_stats { | |||
569 | }; | 569 | }; |
570 | 570 | ||
571 | struct rtl8139_private { | 571 | struct rtl8139_private { |
572 | void *mmio_addr; | 572 | void __iomem *mmio_addr; |
573 | int drv_flags; | 573 | int drv_flags; |
574 | struct pci_dev *pci_dev; | 574 | struct pci_dev *pci_dev; |
575 | u32 msg_enable; | 575 | u32 msg_enable; |
@@ -614,7 +614,7 @@ MODULE_PARM_DESC (multicast_filter_limit, "8139too maximum number of filtered mu | |||
614 | MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); | 614 | MODULE_PARM_DESC (media, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps"); |
615 | MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); | 615 | MODULE_PARM_DESC (full_duplex, "8139too: Force full duplex for board(s) (1)"); |
616 | 616 | ||
617 | static int read_eeprom (void *ioaddr, int location, int addr_len); | 617 | static int read_eeprom (void __iomem *ioaddr, int location, int addr_len); |
618 | static int rtl8139_open (struct net_device *dev); | 618 | static int rtl8139_open (struct net_device *dev); |
619 | static int mdio_read (struct net_device *dev, int phy_id, int location); | 619 | static int mdio_read (struct net_device *dev, int phy_id, int location); |
620 | static void mdio_write (struct net_device *dev, int phy_id, int location, | 620 | static void mdio_write (struct net_device *dev, int phy_id, int location, |
@@ -638,46 +638,20 @@ static void __set_rx_mode (struct net_device *dev); | |||
638 | static void rtl8139_hw_start (struct net_device *dev); | 638 | static void rtl8139_hw_start (struct net_device *dev); |
639 | static struct ethtool_ops rtl8139_ethtool_ops; | 639 | static struct ethtool_ops rtl8139_ethtool_ops; |
640 | 640 | ||
641 | #ifdef USE_IO_OPS | ||
642 | |||
643 | #define RTL_R8(reg) inb (((unsigned long)ioaddr) + (reg)) | ||
644 | #define RTL_R16(reg) inw (((unsigned long)ioaddr) + (reg)) | ||
645 | #define RTL_R32(reg) ((unsigned long) inl (((unsigned long)ioaddr) + (reg))) | ||
646 | #define RTL_W8(reg, val8) outb ((val8), ((unsigned long)ioaddr) + (reg)) | ||
647 | #define RTL_W16(reg, val16) outw ((val16), ((unsigned long)ioaddr) + (reg)) | ||
648 | #define RTL_W32(reg, val32) outl ((val32), ((unsigned long)ioaddr) + (reg)) | ||
649 | #define RTL_W8_F RTL_W8 | ||
650 | #define RTL_W16_F RTL_W16 | ||
651 | #define RTL_W32_F RTL_W32 | ||
652 | #undef readb | ||
653 | #undef readw | ||
654 | #undef readl | ||
655 | #undef writeb | ||
656 | #undef writew | ||
657 | #undef writel | ||
658 | #define readb(addr) inb((unsigned long)(addr)) | ||
659 | #define readw(addr) inw((unsigned long)(addr)) | ||
660 | #define readl(addr) inl((unsigned long)(addr)) | ||
661 | #define writeb(val,addr) outb((val),(unsigned long)(addr)) | ||
662 | #define writew(val,addr) outw((val),(unsigned long)(addr)) | ||
663 | #define writel(val,addr) outl((val),(unsigned long)(addr)) | ||
664 | |||
665 | #else | ||
666 | |||
667 | /* write MMIO register, with flush */ | 641 | /* write MMIO register, with flush */ |
668 | /* Flush avoids rtl8139 bug w/ posted MMIO writes */ | 642 | /* Flush avoids rtl8139 bug w/ posted MMIO writes */ |
669 | #define RTL_W8_F(reg, val8) do { writeb ((val8), ioaddr + (reg)); readb (ioaddr + (reg)); } while (0) | 643 | #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0) |
670 | #define RTL_W16_F(reg, val16) do { writew ((val16), ioaddr + (reg)); readw (ioaddr + (reg)); } while (0) | 644 | #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0) |
671 | #define RTL_W32_F(reg, val32) do { writel ((val32), ioaddr + (reg)); readl (ioaddr + (reg)); } while (0) | 645 | #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0) |
672 | 646 | ||
673 | 647 | ||
674 | #define MMIO_FLUSH_AUDIT_COMPLETE 1 | 648 | #define MMIO_FLUSH_AUDIT_COMPLETE 1 |
675 | #if MMIO_FLUSH_AUDIT_COMPLETE | 649 | #if MMIO_FLUSH_AUDIT_COMPLETE |
676 | 650 | ||
677 | /* write MMIO register */ | 651 | /* write MMIO register */ |
678 | #define RTL_W8(reg, val8) writeb ((val8), ioaddr + (reg)) | 652 | #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg)) |
679 | #define RTL_W16(reg, val16) writew ((val16), ioaddr + (reg)) | 653 | #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg)) |
680 | #define RTL_W32(reg, val32) writel ((val32), ioaddr + (reg)) | 654 | #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg)) |
681 | 655 | ||
682 | #else | 656 | #else |
683 | 657 | ||
@@ -689,11 +663,9 @@ static struct ethtool_ops rtl8139_ethtool_ops; | |||
689 | #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ | 663 | #endif /* MMIO_FLUSH_AUDIT_COMPLETE */ |
690 | 664 | ||
691 | /* read MMIO register */ | 665 | /* read MMIO register */ |
692 | #define RTL_R8(reg) readb (ioaddr + (reg)) | 666 | #define RTL_R8(reg) ioread8 (ioaddr + (reg)) |
693 | #define RTL_R16(reg) readw (ioaddr + (reg)) | 667 | #define RTL_R16(reg) ioread16 (ioaddr + (reg)) |
694 | #define RTL_R32(reg) ((unsigned long) readl (ioaddr + (reg))) | 668 | #define RTL_R32(reg) ((unsigned long) ioread32 (ioaddr + (reg))) |
695 | |||
696 | #endif /* USE_IO_OPS */ | ||
697 | 669 | ||
698 | 670 | ||
699 | static const u16 rtl8139_intr_mask = | 671 | static const u16 rtl8139_intr_mask = |
@@ -740,10 +712,13 @@ static void __rtl8139_cleanup_dev (struct net_device *dev) | |||
740 | assert (tp->pci_dev != NULL); | 712 | assert (tp->pci_dev != NULL); |
741 | pdev = tp->pci_dev; | 713 | pdev = tp->pci_dev; |
742 | 714 | ||
743 | #ifndef USE_IO_OPS | 715 | #ifdef USE_IO_OPS |
716 | if (tp->mmio_addr) | ||
717 | ioport_unmap (tp->mmio_addr); | ||
718 | #else | ||
744 | if (tp->mmio_addr) | 719 | if (tp->mmio_addr) |
745 | iounmap (tp->mmio_addr); | 720 | pci_iounmap (pdev, tp->mmio_addr); |
746 | #endif /* !USE_IO_OPS */ | 721 | #endif /* USE_IO_OPS */ |
747 | 722 | ||
748 | /* it's ok to call this even if we have no regions to free */ | 723 | /* it's ok to call this even if we have no regions to free */ |
749 | pci_release_regions (pdev); | 724 | pci_release_regions (pdev); |
@@ -753,7 +728,7 @@ static void __rtl8139_cleanup_dev (struct net_device *dev) | |||
753 | } | 728 | } |
754 | 729 | ||
755 | 730 | ||
756 | static void rtl8139_chip_reset (void *ioaddr) | 731 | static void rtl8139_chip_reset (void __iomem *ioaddr) |
757 | { | 732 | { |
758 | int i; | 733 | int i; |
759 | 734 | ||
@@ -773,7 +748,7 @@ static void rtl8139_chip_reset (void *ioaddr) | |||
773 | static int __devinit rtl8139_init_board (struct pci_dev *pdev, | 748 | static int __devinit rtl8139_init_board (struct pci_dev *pdev, |
774 | struct net_device **dev_out) | 749 | struct net_device **dev_out) |
775 | { | 750 | { |
776 | void *ioaddr; | 751 | void __iomem *ioaddr; |
777 | struct net_device *dev; | 752 | struct net_device *dev; |
778 | struct rtl8139_private *tp; | 753 | struct rtl8139_private *tp; |
779 | u8 tmp8; | 754 | u8 tmp8; |
@@ -855,13 +830,18 @@ static int __devinit rtl8139_init_board (struct pci_dev *pdev, | |||
855 | pci_set_master (pdev); | 830 | pci_set_master (pdev); |
856 | 831 | ||
857 | #ifdef USE_IO_OPS | 832 | #ifdef USE_IO_OPS |
858 | ioaddr = (void *) pio_start; | 833 | ioaddr = ioport_map(pio_start, pio_len); |
834 | if (!ioaddr) { | ||
835 | printk (KERN_ERR PFX "%s: cannot map PIO, aborting\n", pci_name(pdev)); | ||
836 | rc = -EIO; | ||
837 | goto err_out; | ||
838 | } | ||
859 | dev->base_addr = pio_start; | 839 | dev->base_addr = pio_start; |
860 | tp->mmio_addr = ioaddr; | 840 | tp->mmio_addr = ioaddr; |
861 | tp->regs_len = pio_len; | 841 | tp->regs_len = pio_len; |
862 | #else | 842 | #else |
863 | /* ioremap MMIO region */ | 843 | /* ioremap MMIO region */ |
864 | ioaddr = ioremap (mmio_start, mmio_len); | 844 | ioaddr = pci_iomap(pdev, 1, 0); |
865 | if (ioaddr == NULL) { | 845 | if (ioaddr == NULL) { |
866 | printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev)); | 846 | printk (KERN_ERR PFX "%s: cannot remap MMIO, aborting\n", pci_name(pdev)); |
867 | rc = -EIO; | 847 | rc = -EIO; |
@@ -947,7 +927,7 @@ static int __devinit rtl8139_init_one (struct pci_dev *pdev, | |||
947 | struct net_device *dev = NULL; | 927 | struct net_device *dev = NULL; |
948 | struct rtl8139_private *tp; | 928 | struct rtl8139_private *tp; |
949 | int i, addr_len, option; | 929 | int i, addr_len, option; |
950 | void *ioaddr; | 930 | void __iomem *ioaddr; |
951 | static int board_idx = -1; | 931 | static int board_idx = -1; |
952 | u8 pci_rev; | 932 | u8 pci_rev; |
953 | 933 | ||
@@ -1147,47 +1127,46 @@ static void __devexit rtl8139_remove_one (struct pci_dev *pdev) | |||
1147 | No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. | 1127 | No extra delay is needed with 33Mhz PCI, but 66Mhz may change this. |
1148 | */ | 1128 | */ |
1149 | 1129 | ||
1150 | #define eeprom_delay() readl(ee_addr) | 1130 | #define eeprom_delay() RTL_R32(Cfg9346) |
1151 | 1131 | ||
1152 | /* The EEPROM commands include the alway-set leading bit. */ | 1132 | /* The EEPROM commands include the alway-set leading bit. */ |
1153 | #define EE_WRITE_CMD (5) | 1133 | #define EE_WRITE_CMD (5) |
1154 | #define EE_READ_CMD (6) | 1134 | #define EE_READ_CMD (6) |
1155 | #define EE_ERASE_CMD (7) | 1135 | #define EE_ERASE_CMD (7) |
1156 | 1136 | ||
1157 | static int __devinit read_eeprom (void *ioaddr, int location, int addr_len) | 1137 | static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_len) |
1158 | { | 1138 | { |
1159 | int i; | 1139 | int i; |
1160 | unsigned retval = 0; | 1140 | unsigned retval = 0; |
1161 | void *ee_addr = ioaddr + Cfg9346; | ||
1162 | int read_cmd = location | (EE_READ_CMD << addr_len); | 1141 | int read_cmd = location | (EE_READ_CMD << addr_len); |
1163 | 1142 | ||
1164 | writeb (EE_ENB & ~EE_CS, ee_addr); | 1143 | RTL_W8 (Cfg9346, EE_ENB & ~EE_CS); |
1165 | writeb (EE_ENB, ee_addr); | 1144 | RTL_W8 (Cfg9346, EE_ENB); |
1166 | eeprom_delay (); | 1145 | eeprom_delay (); |
1167 | 1146 | ||
1168 | /* Shift the read command bits out. */ | 1147 | /* Shift the read command bits out. */ |
1169 | for (i = 4 + addr_len; i >= 0; i--) { | 1148 | for (i = 4 + addr_len; i >= 0; i--) { |
1170 | int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; | 1149 | int dataval = (read_cmd & (1 << i)) ? EE_DATA_WRITE : 0; |
1171 | writeb (EE_ENB | dataval, ee_addr); | 1150 | RTL_W8 (Cfg9346, EE_ENB | dataval); |
1172 | eeprom_delay (); | 1151 | eeprom_delay (); |
1173 | writeb (EE_ENB | dataval | EE_SHIFT_CLK, ee_addr); | 1152 | RTL_W8 (Cfg9346, EE_ENB | dataval | EE_SHIFT_CLK); |
1174 | eeprom_delay (); | 1153 | eeprom_delay (); |
1175 | } | 1154 | } |
1176 | writeb (EE_ENB, ee_addr); | 1155 | RTL_W8 (Cfg9346, EE_ENB); |
1177 | eeprom_delay (); | 1156 | eeprom_delay (); |
1178 | 1157 | ||
1179 | for (i = 16; i > 0; i--) { | 1158 | for (i = 16; i > 0; i--) { |
1180 | writeb (EE_ENB | EE_SHIFT_CLK, ee_addr); | 1159 | RTL_W8 (Cfg9346, EE_ENB | EE_SHIFT_CLK); |
1181 | eeprom_delay (); | 1160 | eeprom_delay (); |
1182 | retval = | 1161 | retval = |
1183 | (retval << 1) | ((readb (ee_addr) & EE_DATA_READ) ? 1 : | 1162 | (retval << 1) | ((RTL_R8 (Cfg9346) & EE_DATA_READ) ? 1 : |
1184 | 0); | 1163 | 0); |
1185 | writeb (EE_ENB, ee_addr); | 1164 | RTL_W8 (Cfg9346, EE_ENB); |
1186 | eeprom_delay (); | 1165 | eeprom_delay (); |
1187 | } | 1166 | } |
1188 | 1167 | ||
1189 | /* Terminate the EEPROM access. */ | 1168 | /* Terminate the EEPROM access. */ |
1190 | writeb (~EE_CS, ee_addr); | 1169 | RTL_W8 (Cfg9346, ~EE_CS); |
1191 | eeprom_delay (); | 1170 | eeprom_delay (); |
1192 | 1171 | ||
1193 | return retval; | 1172 | return retval; |
@@ -1206,7 +1185,7 @@ static int __devinit read_eeprom (void *ioaddr, int location, int addr_len) | |||
1206 | #define MDIO_WRITE0 (MDIO_DIR) | 1185 | #define MDIO_WRITE0 (MDIO_DIR) |
1207 | #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) | 1186 | #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT) |
1208 | 1187 | ||
1209 | #define mdio_delay(mdio_addr) readb(mdio_addr) | 1188 | #define mdio_delay() RTL_R8(Config4) |
1210 | 1189 | ||
1211 | 1190 | ||
1212 | static char mii_2_8139_map[8] = { | 1191 | static char mii_2_8139_map[8] = { |
@@ -1223,15 +1202,15 @@ static char mii_2_8139_map[8] = { | |||
1223 | 1202 | ||
1224 | #ifdef CONFIG_8139TOO_8129 | 1203 | #ifdef CONFIG_8139TOO_8129 |
1225 | /* Syncronize the MII management interface by shifting 32 one bits out. */ | 1204 | /* Syncronize the MII management interface by shifting 32 one bits out. */ |
1226 | static void mdio_sync (void *mdio_addr) | 1205 | static void mdio_sync (void __iomem *ioaddr) |
1227 | { | 1206 | { |
1228 | int i; | 1207 | int i; |
1229 | 1208 | ||
1230 | for (i = 32; i >= 0; i--) { | 1209 | for (i = 32; i >= 0; i--) { |
1231 | writeb (MDIO_WRITE1, mdio_addr); | 1210 | RTL_W8 (Config4, MDIO_WRITE1); |
1232 | mdio_delay (mdio_addr); | 1211 | mdio_delay (); |
1233 | writeb (MDIO_WRITE1 | MDIO_CLK, mdio_addr); | 1212 | RTL_W8 (Config4, MDIO_WRITE1 | MDIO_CLK); |
1234 | mdio_delay (mdio_addr); | 1213 | mdio_delay (); |
1235 | } | 1214 | } |
1236 | } | 1215 | } |
1237 | #endif | 1216 | #endif |
@@ -1241,35 +1220,36 @@ static int mdio_read (struct net_device *dev, int phy_id, int location) | |||
1241 | struct rtl8139_private *tp = netdev_priv(dev); | 1220 | struct rtl8139_private *tp = netdev_priv(dev); |
1242 | int retval = 0; | 1221 | int retval = 0; |
1243 | #ifdef CONFIG_8139TOO_8129 | 1222 | #ifdef CONFIG_8139TOO_8129 |
1244 | void *mdio_addr = tp->mmio_addr + Config4; | 1223 | void __iomem *ioaddr = tp->mmio_addr; |
1245 | int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; | 1224 | int mii_cmd = (0xf6 << 10) | (phy_id << 5) | location; |
1246 | int i; | 1225 | int i; |
1247 | #endif | 1226 | #endif |
1248 | 1227 | ||
1249 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ | 1228 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
1229 | void __iomem *ioaddr = tp->mmio_addr; | ||
1250 | return location < 8 && mii_2_8139_map[location] ? | 1230 | return location < 8 && mii_2_8139_map[location] ? |
1251 | readw (tp->mmio_addr + mii_2_8139_map[location]) : 0; | 1231 | RTL_R16 (mii_2_8139_map[location]) : 0; |
1252 | } | 1232 | } |
1253 | 1233 | ||
1254 | #ifdef CONFIG_8139TOO_8129 | 1234 | #ifdef CONFIG_8139TOO_8129 |
1255 | mdio_sync (mdio_addr); | 1235 | mdio_sync (ioaddr); |
1256 | /* Shift the read command bits out. */ | 1236 | /* Shift the read command bits out. */ |
1257 | for (i = 15; i >= 0; i--) { | 1237 | for (i = 15; i >= 0; i--) { |
1258 | int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; | 1238 | int dataval = (mii_cmd & (1 << i)) ? MDIO_DATA_OUT : 0; |
1259 | 1239 | ||
1260 | writeb (MDIO_DIR | dataval, mdio_addr); | 1240 | RTL_W8 (Config4, MDIO_DIR | dataval); |
1261 | mdio_delay (mdio_addr); | 1241 | mdio_delay (); |
1262 | writeb (MDIO_DIR | dataval | MDIO_CLK, mdio_addr); | 1242 | RTL_W8 (Config4, MDIO_DIR | dataval | MDIO_CLK); |
1263 | mdio_delay (mdio_addr); | 1243 | mdio_delay (); |
1264 | } | 1244 | } |
1265 | 1245 | ||
1266 | /* Read the two transition, 16 data, and wire-idle bits. */ | 1246 | /* Read the two transition, 16 data, and wire-idle bits. */ |
1267 | for (i = 19; i > 0; i--) { | 1247 | for (i = 19; i > 0; i--) { |
1268 | writeb (0, mdio_addr); | 1248 | RTL_W8 (Config4, 0); |
1269 | mdio_delay (mdio_addr); | 1249 | mdio_delay (); |
1270 | retval = (retval << 1) | ((readb (mdio_addr) & MDIO_DATA_IN) ? 1 : 0); | 1250 | retval = (retval << 1) | ((RTL_R8 (Config4) & MDIO_DATA_IN) ? 1 : 0); |
1271 | writeb (MDIO_CLK, mdio_addr); | 1251 | RTL_W8 (Config4, MDIO_CLK); |
1272 | mdio_delay (mdio_addr); | 1252 | mdio_delay (); |
1273 | } | 1253 | } |
1274 | #endif | 1254 | #endif |
1275 | 1255 | ||
@@ -1282,13 +1262,13 @@ static void mdio_write (struct net_device *dev, int phy_id, int location, | |||
1282 | { | 1262 | { |
1283 | struct rtl8139_private *tp = netdev_priv(dev); | 1263 | struct rtl8139_private *tp = netdev_priv(dev); |
1284 | #ifdef CONFIG_8139TOO_8129 | 1264 | #ifdef CONFIG_8139TOO_8129 |
1285 | void *mdio_addr = tp->mmio_addr + Config4; | 1265 | void __iomem *ioaddr = tp->mmio_addr; |
1286 | int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; | 1266 | int mii_cmd = (0x5002 << 16) | (phy_id << 23) | (location << 18) | value; |
1287 | int i; | 1267 | int i; |
1288 | #endif | 1268 | #endif |
1289 | 1269 | ||
1290 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ | 1270 | if (phy_id > 31) { /* Really a 8139. Use internal registers. */ |
1291 | void *ioaddr = tp->mmio_addr; | 1271 | void __iomem *ioaddr = tp->mmio_addr; |
1292 | if (location == 0) { | 1272 | if (location == 0) { |
1293 | RTL_W8 (Cfg9346, Cfg9346_Unlock); | 1273 | RTL_W8 (Cfg9346, Cfg9346_Unlock); |
1294 | RTL_W16 (BasicModeCtrl, value); | 1274 | RTL_W16 (BasicModeCtrl, value); |
@@ -1299,23 +1279,23 @@ static void mdio_write (struct net_device *dev, int phy_id, int location, | |||
1299 | } | 1279 | } |
1300 | 1280 | ||
1301 | #ifdef CONFIG_8139TOO_8129 | 1281 | #ifdef CONFIG_8139TOO_8129 |
1302 | mdio_sync (mdio_addr); | 1282 | mdio_sync (ioaddr); |
1303 | 1283 | ||
1304 | /* Shift the command bits out. */ | 1284 | /* Shift the command bits out. */ |
1305 | for (i = 31; i >= 0; i--) { | 1285 | for (i = 31; i >= 0; i--) { |
1306 | int dataval = | 1286 | int dataval = |
1307 | (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; | 1287 | (mii_cmd & (1 << i)) ? MDIO_WRITE1 : MDIO_WRITE0; |
1308 | writeb (dataval, mdio_addr); | 1288 | RTL_W8 (Config4, dataval); |
1309 | mdio_delay (mdio_addr); | 1289 | mdio_delay (); |
1310 | writeb (dataval | MDIO_CLK, mdio_addr); | 1290 | RTL_W8 (Config4, dataval | MDIO_CLK); |
1311 | mdio_delay (mdio_addr); | 1291 | mdio_delay (); |
1312 | } | 1292 | } |
1313 | /* Clear out extra bits. */ | 1293 | /* Clear out extra bits. */ |
1314 | for (i = 2; i > 0; i--) { | 1294 | for (i = 2; i > 0; i--) { |
1315 | writeb (0, mdio_addr); | 1295 | RTL_W8 (Config4, 0); |
1316 | mdio_delay (mdio_addr); | 1296 | mdio_delay (); |
1317 | writeb (MDIO_CLK, mdio_addr); | 1297 | RTL_W8 (Config4, MDIO_CLK); |
1318 | mdio_delay (mdio_addr); | 1298 | mdio_delay (); |
1319 | } | 1299 | } |
1320 | #endif | 1300 | #endif |
1321 | } | 1301 | } |
@@ -1325,7 +1305,7 @@ static int rtl8139_open (struct net_device *dev) | |||
1325 | { | 1305 | { |
1326 | struct rtl8139_private *tp = netdev_priv(dev); | 1306 | struct rtl8139_private *tp = netdev_priv(dev); |
1327 | int retval; | 1307 | int retval; |
1328 | void *ioaddr = tp->mmio_addr; | 1308 | void __iomem *ioaddr = tp->mmio_addr; |
1329 | 1309 | ||
1330 | retval = request_irq (dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev); | 1310 | retval = request_irq (dev->irq, rtl8139_interrupt, SA_SHIRQ, dev->name, dev); |
1331 | if (retval) | 1311 | if (retval) |
@@ -1382,7 +1362,7 @@ static void rtl_check_media (struct net_device *dev, unsigned int init_media) | |||
1382 | static void rtl8139_hw_start (struct net_device *dev) | 1362 | static void rtl8139_hw_start (struct net_device *dev) |
1383 | { | 1363 | { |
1384 | struct rtl8139_private *tp = netdev_priv(dev); | 1364 | struct rtl8139_private *tp = netdev_priv(dev); |
1385 | void *ioaddr = tp->mmio_addr; | 1365 | void __iomem *ioaddr = tp->mmio_addr; |
1386 | u32 i; | 1366 | u32 i; |
1387 | u8 tmp; | 1367 | u8 tmp; |
1388 | 1368 | ||
@@ -1484,7 +1464,7 @@ static void rtl8139_tune_twister (struct net_device *dev, | |||
1484 | struct rtl8139_private *tp) | 1464 | struct rtl8139_private *tp) |
1485 | { | 1465 | { |
1486 | int linkcase; | 1466 | int linkcase; |
1487 | void *ioaddr = tp->mmio_addr; | 1467 | void __iomem *ioaddr = tp->mmio_addr; |
1488 | 1468 | ||
1489 | /* This is a complicated state machine to configure the "twister" for | 1469 | /* This is a complicated state machine to configure the "twister" for |
1490 | impedance/echos based on the cable length. | 1470 | impedance/echos based on the cable length. |
@@ -1568,7 +1548,7 @@ static void rtl8139_tune_twister (struct net_device *dev, | |||
1568 | 1548 | ||
1569 | static inline void rtl8139_thread_iter (struct net_device *dev, | 1549 | static inline void rtl8139_thread_iter (struct net_device *dev, |
1570 | struct rtl8139_private *tp, | 1550 | struct rtl8139_private *tp, |
1571 | void *ioaddr) | 1551 | void __iomem *ioaddr) |
1572 | { | 1552 | { |
1573 | int mii_lpa; | 1553 | int mii_lpa; |
1574 | 1554 | ||
@@ -1626,7 +1606,7 @@ static int rtl8139_thread (void *data) | |||
1626 | do { | 1606 | do { |
1627 | timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout); | 1607 | timeout = interruptible_sleep_on_timeout (&tp->thr_wait, timeout); |
1628 | /* make swsusp happy with our thread */ | 1608 | /* make swsusp happy with our thread */ |
1629 | try_to_freeze(PF_FREEZE); | 1609 | try_to_freeze(); |
1630 | } while (!signal_pending (current) && (timeout > 0)); | 1610 | } while (!signal_pending (current) && (timeout > 0)); |
1631 | 1611 | ||
1632 | if (signal_pending (current)) { | 1612 | if (signal_pending (current)) { |
@@ -1676,7 +1656,7 @@ static inline void rtl8139_tx_clear (struct rtl8139_private *tp) | |||
1676 | static void rtl8139_tx_timeout (struct net_device *dev) | 1656 | static void rtl8139_tx_timeout (struct net_device *dev) |
1677 | { | 1657 | { |
1678 | struct rtl8139_private *tp = netdev_priv(dev); | 1658 | struct rtl8139_private *tp = netdev_priv(dev); |
1679 | void *ioaddr = tp->mmio_addr; | 1659 | void __iomem *ioaddr = tp->mmio_addr; |
1680 | int i; | 1660 | int i; |
1681 | u8 tmp8; | 1661 | u8 tmp8; |
1682 | unsigned long flags; | 1662 | unsigned long flags; |
@@ -1721,7 +1701,7 @@ static void rtl8139_tx_timeout (struct net_device *dev) | |||
1721 | static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) | 1701 | static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) |
1722 | { | 1702 | { |
1723 | struct rtl8139_private *tp = netdev_priv(dev); | 1703 | struct rtl8139_private *tp = netdev_priv(dev); |
1724 | void *ioaddr = tp->mmio_addr; | 1704 | void __iomem *ioaddr = tp->mmio_addr; |
1725 | unsigned int entry; | 1705 | unsigned int entry; |
1726 | unsigned int len = skb->len; | 1706 | unsigned int len = skb->len; |
1727 | 1707 | ||
@@ -1763,7 +1743,7 @@ static int rtl8139_start_xmit (struct sk_buff *skb, struct net_device *dev) | |||
1763 | 1743 | ||
1764 | static void rtl8139_tx_interrupt (struct net_device *dev, | 1744 | static void rtl8139_tx_interrupt (struct net_device *dev, |
1765 | struct rtl8139_private *tp, | 1745 | struct rtl8139_private *tp, |
1766 | void *ioaddr) | 1746 | void __iomem *ioaddr) |
1767 | { | 1747 | { |
1768 | unsigned long dirty_tx, tx_left; | 1748 | unsigned long dirty_tx, tx_left; |
1769 | 1749 | ||
@@ -1833,7 +1813,7 @@ static void rtl8139_tx_interrupt (struct net_device *dev, | |||
1833 | 1813 | ||
1834 | /* TODO: clean this up! Rx reset need not be this intensive */ | 1814 | /* TODO: clean this up! Rx reset need not be this intensive */ |
1835 | static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, | 1815 | static void rtl8139_rx_err (u32 rx_status, struct net_device *dev, |
1836 | struct rtl8139_private *tp, void *ioaddr) | 1816 | struct rtl8139_private *tp, void __iomem *ioaddr) |
1837 | { | 1817 | { |
1838 | u8 tmp8; | 1818 | u8 tmp8; |
1839 | #ifdef CONFIG_8139_OLD_RX_RESET | 1819 | #ifdef CONFIG_8139_OLD_RX_RESET |
@@ -1930,7 +1910,7 @@ static __inline__ void wrap_copy(struct sk_buff *skb, const unsigned char *ring, | |||
1930 | 1910 | ||
1931 | static void rtl8139_isr_ack(struct rtl8139_private *tp) | 1911 | static void rtl8139_isr_ack(struct rtl8139_private *tp) |
1932 | { | 1912 | { |
1933 | void *ioaddr = tp->mmio_addr; | 1913 | void __iomem *ioaddr = tp->mmio_addr; |
1934 | u16 status; | 1914 | u16 status; |
1935 | 1915 | ||
1936 | status = RTL_R16 (IntrStatus) & RxAckBits; | 1916 | status = RTL_R16 (IntrStatus) & RxAckBits; |
@@ -1949,7 +1929,7 @@ static void rtl8139_isr_ack(struct rtl8139_private *tp) | |||
1949 | static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, | 1929 | static int rtl8139_rx(struct net_device *dev, struct rtl8139_private *tp, |
1950 | int budget) | 1930 | int budget) |
1951 | { | 1931 | { |
1952 | void *ioaddr = tp->mmio_addr; | 1932 | void __iomem *ioaddr = tp->mmio_addr; |
1953 | int received = 0; | 1933 | int received = 0; |
1954 | unsigned char *rx_ring = tp->rx_ring; | 1934 | unsigned char *rx_ring = tp->rx_ring; |
1955 | unsigned int cur_rx = tp->cur_rx; | 1935 | unsigned int cur_rx = tp->cur_rx; |
@@ -2087,7 +2067,7 @@ out: | |||
2087 | 2067 | ||
2088 | static void rtl8139_weird_interrupt (struct net_device *dev, | 2068 | static void rtl8139_weird_interrupt (struct net_device *dev, |
2089 | struct rtl8139_private *tp, | 2069 | struct rtl8139_private *tp, |
2090 | void *ioaddr, | 2070 | void __iomem *ioaddr, |
2091 | int status, int link_changed) | 2071 | int status, int link_changed) |
2092 | { | 2072 | { |
2093 | DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", | 2073 | DPRINTK ("%s: Abnormal interrupt, status %8.8x.\n", |
@@ -2127,7 +2107,7 @@ static void rtl8139_weird_interrupt (struct net_device *dev, | |||
2127 | static int rtl8139_poll(struct net_device *dev, int *budget) | 2107 | static int rtl8139_poll(struct net_device *dev, int *budget) |
2128 | { | 2108 | { |
2129 | struct rtl8139_private *tp = netdev_priv(dev); | 2109 | struct rtl8139_private *tp = netdev_priv(dev); |
2130 | void *ioaddr = tp->mmio_addr; | 2110 | void __iomem *ioaddr = tp->mmio_addr; |
2131 | int orig_budget = min(*budget, dev->quota); | 2111 | int orig_budget = min(*budget, dev->quota); |
2132 | int done = 1; | 2112 | int done = 1; |
2133 | 2113 | ||
@@ -2165,7 +2145,7 @@ static irqreturn_t rtl8139_interrupt (int irq, void *dev_instance, | |||
2165 | { | 2145 | { |
2166 | struct net_device *dev = (struct net_device *) dev_instance; | 2146 | struct net_device *dev = (struct net_device *) dev_instance; |
2167 | struct rtl8139_private *tp = netdev_priv(dev); | 2147 | struct rtl8139_private *tp = netdev_priv(dev); |
2168 | void *ioaddr = tp->mmio_addr; | 2148 | void __iomem *ioaddr = tp->mmio_addr; |
2169 | u16 status, ackstat; | 2149 | u16 status, ackstat; |
2170 | int link_changed = 0; /* avoid bogus "uninit" warning */ | 2150 | int link_changed = 0; /* avoid bogus "uninit" warning */ |
2171 | int handled = 0; | 2151 | int handled = 0; |
@@ -2241,7 +2221,7 @@ static void rtl8139_poll_controller(struct net_device *dev) | |||
2241 | static int rtl8139_close (struct net_device *dev) | 2221 | static int rtl8139_close (struct net_device *dev) |
2242 | { | 2222 | { |
2243 | struct rtl8139_private *tp = netdev_priv(dev); | 2223 | struct rtl8139_private *tp = netdev_priv(dev); |
2244 | void *ioaddr = tp->mmio_addr; | 2224 | void __iomem *ioaddr = tp->mmio_addr; |
2245 | int ret = 0; | 2225 | int ret = 0; |
2246 | unsigned long flags; | 2226 | unsigned long flags; |
2247 | 2227 | ||
@@ -2304,7 +2284,7 @@ static int rtl8139_close (struct net_device *dev) | |||
2304 | static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | 2284 | static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
2305 | { | 2285 | { |
2306 | struct rtl8139_private *np = netdev_priv(dev); | 2286 | struct rtl8139_private *np = netdev_priv(dev); |
2307 | void *ioaddr = np->mmio_addr; | 2287 | void __iomem *ioaddr = np->mmio_addr; |
2308 | 2288 | ||
2309 | spin_lock_irq(&np->lock); | 2289 | spin_lock_irq(&np->lock); |
2310 | if (rtl_chip_info[np->chipset].flags & HasLWake) { | 2290 | if (rtl_chip_info[np->chipset].flags & HasLWake) { |
@@ -2338,7 +2318,7 @@ static void rtl8139_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
2338 | static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | 2318 | static int rtl8139_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) |
2339 | { | 2319 | { |
2340 | struct rtl8139_private *np = netdev_priv(dev); | 2320 | struct rtl8139_private *np = netdev_priv(dev); |
2341 | void *ioaddr = np->mmio_addr; | 2321 | void __iomem *ioaddr = np->mmio_addr; |
2342 | u32 support; | 2322 | u32 support; |
2343 | u8 cfg3, cfg5; | 2323 | u8 cfg3, cfg5; |
2344 | 2324 | ||
@@ -2506,7 +2486,7 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
2506 | static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) | 2486 | static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) |
2507 | { | 2487 | { |
2508 | struct rtl8139_private *tp = netdev_priv(dev); | 2488 | struct rtl8139_private *tp = netdev_priv(dev); |
2509 | void *ioaddr = tp->mmio_addr; | 2489 | void __iomem *ioaddr = tp->mmio_addr; |
2510 | unsigned long flags; | 2490 | unsigned long flags; |
2511 | 2491 | ||
2512 | if (netif_running(dev)) { | 2492 | if (netif_running(dev)) { |
@@ -2525,7 +2505,7 @@ static struct net_device_stats *rtl8139_get_stats (struct net_device *dev) | |||
2525 | static void __set_rx_mode (struct net_device *dev) | 2505 | static void __set_rx_mode (struct net_device *dev) |
2526 | { | 2506 | { |
2527 | struct rtl8139_private *tp = netdev_priv(dev); | 2507 | struct rtl8139_private *tp = netdev_priv(dev); |
2528 | void *ioaddr = tp->mmio_addr; | 2508 | void __iomem *ioaddr = tp->mmio_addr; |
2529 | u32 mc_filter[2]; /* Multicast hash filter */ | 2509 | u32 mc_filter[2]; /* Multicast hash filter */ |
2530 | int i, rx_mode; | 2510 | int i, rx_mode; |
2531 | u32 tmp; | 2511 | u32 tmp; |
@@ -2586,7 +2566,7 @@ static int rtl8139_suspend (struct pci_dev *pdev, pm_message_t state) | |||
2586 | { | 2566 | { |
2587 | struct net_device *dev = pci_get_drvdata (pdev); | 2567 | struct net_device *dev = pci_get_drvdata (pdev); |
2588 | struct rtl8139_private *tp = netdev_priv(dev); | 2568 | struct rtl8139_private *tp = netdev_priv(dev); |
2589 | void *ioaddr = tp->mmio_addr; | 2569 | void __iomem *ioaddr = tp->mmio_addr; |
2590 | unsigned long flags; | 2570 | unsigned long flags; |
2591 | 2571 | ||
2592 | pci_save_state (pdev); | 2572 | pci_save_state (pdev); |
diff --git a/drivers/net/82596.c b/drivers/net/82596.c index 65f97b1dc581..13b745b39667 100644 --- a/drivers/net/82596.c +++ b/drivers/net/82596.c | |||
@@ -546,11 +546,11 @@ static inline void init_rx_bufs(struct net_device *dev) | |||
546 | rbd->b_next = WSWAPrbd(virt_to_bus(rbd+1)); | 546 | rbd->b_next = WSWAPrbd(virt_to_bus(rbd+1)); |
547 | rbd->b_addr = WSWAPrbd(virt_to_bus(rbd)); | 547 | rbd->b_addr = WSWAPrbd(virt_to_bus(rbd)); |
548 | rbd->skb = skb; | 548 | rbd->skb = skb; |
549 | rbd->v_data = skb->tail; | 549 | rbd->v_data = skb->data; |
550 | rbd->b_data = WSWAPchar(virt_to_bus(skb->tail)); | 550 | rbd->b_data = WSWAPchar(virt_to_bus(skb->data)); |
551 | rbd->size = PKT_BUF_SZ; | 551 | rbd->size = PKT_BUF_SZ; |
552 | #ifdef __mc68000__ | 552 | #ifdef __mc68000__ |
553 | cache_clear(virt_to_phys(skb->tail), PKT_BUF_SZ); | 553 | cache_clear(virt_to_phys(skb->data), PKT_BUF_SZ); |
554 | #endif | 554 | #endif |
555 | } | 555 | } |
556 | lp->rbd_head = lp->rbds; | 556 | lp->rbd_head = lp->rbds; |
@@ -816,10 +816,10 @@ static inline int i596_rx(struct net_device *dev) | |||
816 | rx_in_place = 1; | 816 | rx_in_place = 1; |
817 | rbd->skb = newskb; | 817 | rbd->skb = newskb; |
818 | newskb->dev = dev; | 818 | newskb->dev = dev; |
819 | rbd->v_data = newskb->tail; | 819 | rbd->v_data = newskb->data; |
820 | rbd->b_data = WSWAPchar(virt_to_bus(newskb->tail)); | 820 | rbd->b_data = WSWAPchar(virt_to_bus(newskb->data)); |
821 | #ifdef __mc68000__ | 821 | #ifdef __mc68000__ |
822 | cache_clear(virt_to_phys(newskb->tail), PKT_BUF_SZ); | 822 | cache_clear(virt_to_phys(newskb->data), PKT_BUF_SZ); |
823 | #endif | 823 | #endif |
824 | } | 824 | } |
825 | else | 825 | else |
@@ -840,7 +840,7 @@ memory_squeeze: | |||
840 | skb->protocol=eth_type_trans(skb,dev); | 840 | skb->protocol=eth_type_trans(skb,dev); |
841 | skb->len = pkt_len; | 841 | skb->len = pkt_len; |
842 | #ifdef __mc68000__ | 842 | #ifdef __mc68000__ |
843 | cache_clear(virt_to_phys(rbd->skb->tail), | 843 | cache_clear(virt_to_phys(rbd->skb->data), |
844 | pkt_len); | 844 | pkt_len); |
845 | #endif | 845 | #endif |
846 | netif_rx(skb); | 846 | netif_rx(skb); |
diff --git a/drivers/net/8390.c b/drivers/net/8390.c index bab16bcc9ae5..6d76f3a99b17 100644 --- a/drivers/net/8390.c +++ b/drivers/net/8390.c | |||
@@ -225,9 +225,9 @@ void ei_tx_timeout(struct net_device *dev) | |||
225 | unsigned long icucr; | 225 | unsigned long icucr; |
226 | 226 | ||
227 | local_irq_save(flags); | 227 | local_irq_save(flags); |
228 | icucr = inl(ICUCR1); | 228 | icucr = inl(M32R_ICU_CR1_PORTL); |
229 | icucr |= M32R_ICUCR_ISMOD11; | 229 | icucr |= M32R_ICUCR_ISMOD11; |
230 | outl(icucr, ICUCR1); | 230 | outl(icucr, M32R_ICU_CR1_PORTL); |
231 | local_irq_restore(flags); | 231 | local_irq_restore(flags); |
232 | #endif | 232 | #endif |
233 | ei_local->stat.tx_errors++; | 233 | ei_local->stat.tx_errors++; |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index f08e01b2fd19..8a835eb58808 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -3,6 +3,8 @@ | |||
3 | # Network device configuration | 3 | # Network device configuration |
4 | # | 4 | # |
5 | 5 | ||
6 | menu "Network device support" | ||
7 | |||
6 | config NETDEVICES | 8 | config NETDEVICES |
7 | depends on NET | 9 | depends on NET |
8 | bool "Network device support" | 10 | bool "Network device support" |
@@ -21,9 +23,12 @@ config NETDEVICES | |||
21 | 23 | ||
22 | If unsure, say Y. | 24 | If unsure, say Y. |
23 | 25 | ||
26 | # All the following symbols are dependent on NETDEVICES - do not repeat | ||
27 | # that for each of the symbols. | ||
28 | if NETDEVICES | ||
29 | |||
24 | config DUMMY | 30 | config DUMMY |
25 | tristate "Dummy net driver support" | 31 | tristate "Dummy net driver support" |
26 | depends on NETDEVICES | ||
27 | ---help--- | 32 | ---help--- |
28 | This is essentially a bit-bucket device (i.e. traffic you send to | 33 | This is essentially a bit-bucket device (i.e. traffic you send to |
29 | this device is consigned into oblivion) with a configurable IP | 34 | this device is consigned into oblivion) with a configurable IP |
@@ -43,7 +48,6 @@ config DUMMY | |||
43 | 48 | ||
44 | config BONDING | 49 | config BONDING |
45 | tristate "Bonding driver support" | 50 | tristate "Bonding driver support" |
46 | depends on NETDEVICES | ||
47 | depends on INET | 51 | depends on INET |
48 | ---help--- | 52 | ---help--- |
49 | Say 'Y' or 'M' if you wish to be able to 'bond' multiple Ethernet | 53 | Say 'Y' or 'M' if you wish to be able to 'bond' multiple Ethernet |
@@ -61,7 +65,6 @@ config BONDING | |||
61 | 65 | ||
62 | config EQUALIZER | 66 | config EQUALIZER |
63 | tristate "EQL (serial line load balancing) support" | 67 | tristate "EQL (serial line load balancing) support" |
64 | depends on NETDEVICES | ||
65 | ---help--- | 68 | ---help--- |
66 | If you have two serial connections to some other computer (this | 69 | If you have two serial connections to some other computer (this |
67 | usually requires two modems and two telephone lines) and you use | 70 | usually requires two modems and two telephone lines) and you use |
@@ -81,7 +84,6 @@ config EQUALIZER | |||
81 | 84 | ||
82 | config TUN | 85 | config TUN |
83 | tristate "Universal TUN/TAP device driver support" | 86 | tristate "Universal TUN/TAP device driver support" |
84 | depends on NETDEVICES | ||
85 | select CRC32 | 87 | select CRC32 |
86 | ---help--- | 88 | ---help--- |
87 | TUN/TAP provides packet reception and transmission for user space | 89 | TUN/TAP provides packet reception and transmission for user space |
@@ -105,7 +107,7 @@ config TUN | |||
105 | 107 | ||
106 | config NET_SB1000 | 108 | config NET_SB1000 |
107 | tristate "General Instruments Surfboard 1000" | 109 | tristate "General Instruments Surfboard 1000" |
108 | depends on NETDEVICES && PNP | 110 | depends on PNP |
109 | ---help--- | 111 | ---help--- |
110 | This is a driver for the General Instrument (also known as | 112 | This is a driver for the General Instrument (also known as |
111 | NextLevel) SURFboard 1000 internal | 113 | NextLevel) SURFboard 1000 internal |
@@ -127,16 +129,14 @@ config NET_SB1000 | |||
127 | 129 | ||
128 | If you don't have this card, of course say N. | 130 | If you don't have this card, of course say N. |
129 | 131 | ||
130 | if NETDEVICES | ||
131 | source "drivers/net/arcnet/Kconfig" | 132 | source "drivers/net/arcnet/Kconfig" |
132 | endif | ||
133 | 133 | ||
134 | # | 134 | # |
135 | # Ethernet | 135 | # Ethernet |
136 | # | 136 | # |
137 | 137 | ||
138 | menu "Ethernet (10 or 100Mbit)" | 138 | menu "Ethernet (10 or 100Mbit)" |
139 | depends on NETDEVICES && !UML | 139 | depends on !UML |
140 | 140 | ||
141 | config NET_ETHERNET | 141 | config NET_ETHERNET |
142 | bool "Ethernet (10 or 100Mbit)" | 142 | bool "Ethernet (10 or 100Mbit)" |
@@ -824,6 +824,18 @@ config SMC9194 | |||
824 | <file:Documentation/networking/net-modules.txt>. The module | 824 | <file:Documentation/networking/net-modules.txt>. The module |
825 | will be called smc9194. | 825 | will be called smc9194. |
826 | 826 | ||
827 | config DM9000 | ||
828 | tristate "DM9000 support" | ||
829 | depends on ARM && NET_ETHERNET | ||
830 | select CRC32 | ||
831 | select MII | ||
832 | ---help--- | ||
833 | Support for DM9000 chipset. | ||
834 | |||
835 | To compile this driver as a module, choose M here and read | ||
836 | <file:Documentation/networking/net-modules.txt>. The module will be | ||
837 | called dm9000. | ||
838 | |||
827 | config NET_VENDOR_RACAL | 839 | config NET_VENDOR_RACAL |
828 | bool "Racal-Interlan (Micom) NI cards" | 840 | bool "Racal-Interlan (Micom) NI cards" |
829 | depends on NET_ETHERNET && ISA | 841 | depends on NET_ETHERNET && ISA |
@@ -989,21 +1001,6 @@ config EEXPRESS_PRO | |||
989 | <file:Documentation/networking/net-modules.txt>. The module | 1001 | <file:Documentation/networking/net-modules.txt>. The module |
990 | will be called eepro. | 1002 | will be called eepro. |
991 | 1003 | ||
992 | config FMV18X | ||
993 | tristate "FMV-181/182/183/184 support (OBSOLETE)" | ||
994 | depends on NET_ISA && OBSOLETE | ||
995 | ---help--- | ||
996 | If you have a Fujitsu FMV-181/182/183/184 network (Ethernet) card, | ||
997 | say Y and read the Ethernet-HOWTO, available from | ||
998 | <http://www.tldp.org/docs.html#howto>. | ||
999 | |||
1000 | If you use an FMV-183 or FMV-184 and it is not working, you may need | ||
1001 | to disable Plug & Play mode of the card. | ||
1002 | |||
1003 | To compile this driver as a module, choose M here and read | ||
1004 | <file:Documentation/networking/net-modules.txt>. The module | ||
1005 | will be called fmv18x. | ||
1006 | |||
1007 | config HPLAN_PLUS | 1004 | config HPLAN_PLUS |
1008 | tristate "HP PCLAN+ (27247B and 27252A) support" | 1005 | tristate "HP PCLAN+ (27247B and 27252A) support" |
1009 | depends on NET_ISA | 1006 | depends on NET_ISA |
@@ -1092,14 +1089,6 @@ config SEEQ8005 | |||
1092 | <file:Documentation/networking/net-modules.txt>. The module | 1089 | <file:Documentation/networking/net-modules.txt>. The module |
1093 | will be called seeq8005. | 1090 | will be called seeq8005. |
1094 | 1091 | ||
1095 | config SK_G16 | ||
1096 | tristate "SK_G16 support (OBSOLETE)" | ||
1097 | depends on NET_ISA && OBSOLETE | ||
1098 | help | ||
1099 | If you have a network (Ethernet) card of this type, say Y and read | ||
1100 | the Ethernet-HOWTO, available from | ||
1101 | <http://www.tldp.org/docs.html#howto>. | ||
1102 | |||
1103 | config SKMC | 1092 | config SKMC |
1104 | tristate "SKnet MCA support" | 1093 | tristate "SKnet MCA support" |
1105 | depends on NET_ETHERNET && MCA && BROKEN | 1094 | depends on NET_ETHERNET && MCA && BROKEN |
@@ -1146,7 +1135,7 @@ config IBMLANA | |||
1146 | 1135 | ||
1147 | config IBMVETH | 1136 | config IBMVETH |
1148 | tristate "IBM LAN Virtual Ethernet support" | 1137 | tristate "IBM LAN Virtual Ethernet support" |
1149 | depends on NETDEVICES && NET_ETHERNET && PPC_PSERIES | 1138 | depends on NET_ETHERNET && PPC_PSERIES |
1150 | ---help--- | 1139 | ---help--- |
1151 | This driver supports virtual ethernet adapters on newer IBM iSeries | 1140 | This driver supports virtual ethernet adapters on newer IBM iSeries |
1152 | and pSeries systems. | 1141 | and pSeries systems. |
@@ -1331,7 +1320,7 @@ config FORCEDETH | |||
1331 | 1320 | ||
1332 | config CS89x0 | 1321 | config CS89x0 |
1333 | tristate "CS89x0 support" | 1322 | tristate "CS89x0 support" |
1334 | depends on NET_PCI && (ISA || ARCH_IXDP2X01) | 1323 | depends on (NET_PCI && (ISA || ARCH_IXDP2X01)) || ARCH_PNX0105 |
1335 | ---help--- | 1324 | ---help--- |
1336 | Support for CS89x0 chipset based Ethernet cards. If you have a | 1325 | Support for CS89x0 chipset based Ethernet cards. If you have a |
1337 | network (Ethernet) card of this type, say Y and read the | 1326 | network (Ethernet) card of this type, say Y and read the |
@@ -1499,14 +1488,14 @@ config 8139CP | |||
1499 | will be called 8139cp. This is recommended. | 1488 | will be called 8139cp. This is recommended. |
1500 | 1489 | ||
1501 | config 8139TOO | 1490 | config 8139TOO |
1502 | tristate "RealTek RTL-8139 PCI Fast Ethernet Adapter support" | 1491 | tristate "RealTek RTL-8129/8130/8139 PCI Fast Ethernet Adapter support" |
1503 | depends on NET_PCI && PCI | 1492 | depends on NET_PCI && PCI |
1504 | select CRC32 | 1493 | select CRC32 |
1505 | select MII | 1494 | select MII |
1506 | ---help--- | 1495 | ---help--- |
1507 | This is a driver for the Fast Ethernet PCI network cards based on | 1496 | This is a driver for the Fast Ethernet PCI network cards based on |
1508 | the RTL8139 chips. If you have one of those, say Y and read | 1497 | the RTL 8129/8130/8139 chips. If you have one of those, say Y and |
1509 | the Ethernet-HOWTO <http://www.tldp.org/docs.html#howto>. | 1498 | read the Ethernet-HOWTO <http://www.tldp.org/docs.html#howto>. |
1510 | 1499 | ||
1511 | To compile this driver as a module, choose M here: the module | 1500 | To compile this driver as a module, choose M here: the module |
1512 | will be called 8139too. This is recommended. | 1501 | will be called 8139too. This is recommended. |
@@ -1769,7 +1758,7 @@ endmenu | |||
1769 | # | 1758 | # |
1770 | 1759 | ||
1771 | menu "Ethernet (1000 Mbit)" | 1760 | menu "Ethernet (1000 Mbit)" |
1772 | depends on NETDEVICES && !UML | 1761 | depends on !UML |
1773 | 1762 | ||
1774 | config ACENIC | 1763 | config ACENIC |
1775 | tristate "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support" | 1764 | tristate "Alteon AceNIC/3Com 3C985/NetGear GA620 Gigabit support" |
@@ -1932,6 +1921,18 @@ config R8169_VLAN | |||
1932 | 1921 | ||
1933 | If in doubt, say Y. | 1922 | If in doubt, say Y. |
1934 | 1923 | ||
1924 | config SKGE | ||
1925 | tristate "New SysKonnect GigaEthernet support (EXPERIMENTAL)" | ||
1926 | depends on PCI && EXPERIMENTAL | ||
1927 | select CRC32 | ||
1928 | ---help--- | ||
1929 | This driver support the Marvell Yukon or SysKonnect SK-98xx/SK-95xx | ||
1930 | and related Gigabit Ethernet adapters. It is a new smaller driver | ||
1931 | driver with better performance and more complete ethtool support. | ||
1932 | |||
1933 | It does not support the link failover and network management | ||
1934 | features that "portable" vendor supplied sk98lin driver does. | ||
1935 | |||
1935 | config SK98LIN | 1936 | config SK98LIN |
1936 | tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support" | 1937 | tristate "Marvell Yukon Chipset / SysKonnect SK-98xx Support" |
1937 | depends on PCI | 1938 | depends on PCI |
@@ -2088,7 +2089,7 @@ endmenu | |||
2088 | # | 2089 | # |
2089 | 2090 | ||
2090 | menu "Ethernet (10000 Mbit)" | 2091 | menu "Ethernet (10000 Mbit)" |
2091 | depends on NETDEVICES && !UML | 2092 | depends on !UML |
2092 | 2093 | ||
2093 | config IXGB | 2094 | config IXGB |
2094 | tristate "Intel(R) PRO/10GbE support" | 2095 | tristate "Intel(R) PRO/10GbE support" |
@@ -2183,11 +2184,11 @@ source "drivers/s390/net/Kconfig" | |||
2183 | 2184 | ||
2184 | config ISERIES_VETH | 2185 | config ISERIES_VETH |
2185 | tristate "iSeries Virtual Ethernet driver support" | 2186 | tristate "iSeries Virtual Ethernet driver support" |
2186 | depends on NETDEVICES && PPC_ISERIES | 2187 | depends on PPC_ISERIES |
2187 | 2188 | ||
2188 | config FDDI | 2189 | config FDDI |
2189 | bool "FDDI driver support" | 2190 | bool "FDDI driver support" |
2190 | depends on NETDEVICES && (PCI || EISA) | 2191 | depends on (PCI || EISA) |
2191 | help | 2192 | help |
2192 | Fiber Distributed Data Interface is a high speed local area network | 2193 | Fiber Distributed Data Interface is a high speed local area network |
2193 | design; essentially a replacement for high speed Ethernet. FDDI can | 2194 | design; essentially a replacement for high speed Ethernet. FDDI can |
@@ -2236,7 +2237,7 @@ config SKFP | |||
2236 | 2237 | ||
2237 | config HIPPI | 2238 | config HIPPI |
2238 | bool "HIPPI driver support (EXPERIMENTAL)" | 2239 | bool "HIPPI driver support (EXPERIMENTAL)" |
2239 | depends on NETDEVICES && EXPERIMENTAL && INET && PCI | 2240 | depends on EXPERIMENTAL && INET && PCI |
2240 | help | 2241 | help |
2241 | HIgh Performance Parallel Interface (HIPPI) is a 800Mbit/sec and | 2242 | HIgh Performance Parallel Interface (HIPPI) is a 800Mbit/sec and |
2242 | 1600Mbit/sec dual-simplex switched or point-to-point network. HIPPI | 2243 | 1600Mbit/sec dual-simplex switched or point-to-point network. HIPPI |
@@ -2268,7 +2269,7 @@ config ROADRUNNER_LARGE_RINGS | |||
2268 | 2269 | ||
2269 | config PLIP | 2270 | config PLIP |
2270 | tristate "PLIP (parallel port) support" | 2271 | tristate "PLIP (parallel port) support" |
2271 | depends on NETDEVICES && PARPORT | 2272 | depends on PARPORT |
2272 | ---help--- | 2273 | ---help--- |
2273 | PLIP (Parallel Line Internet Protocol) is used to create a | 2274 | PLIP (Parallel Line Internet Protocol) is used to create a |
2274 | reasonably fast mini network consisting of two (or, rarely, more) | 2275 | reasonably fast mini network consisting of two (or, rarely, more) |
@@ -2304,7 +2305,6 @@ config PLIP | |||
2304 | 2305 | ||
2305 | config PPP | 2306 | config PPP |
2306 | tristate "PPP (point-to-point protocol) support" | 2307 | tristate "PPP (point-to-point protocol) support" |
2307 | depends on NETDEVICES | ||
2308 | ---help--- | 2308 | ---help--- |
2309 | PPP (Point to Point Protocol) is a newer and better SLIP. It serves | 2309 | PPP (Point to Point Protocol) is a newer and better SLIP. It serves |
2310 | the same purpose: sending Internet traffic over telephone (and other | 2310 | the same purpose: sending Internet traffic over telephone (and other |
@@ -2440,7 +2440,6 @@ config PPPOATM | |||
2440 | 2440 | ||
2441 | config SLIP | 2441 | config SLIP |
2442 | tristate "SLIP (serial line) support" | 2442 | tristate "SLIP (serial line) support" |
2443 | depends on NETDEVICES | ||
2444 | ---help--- | 2443 | ---help--- |
2445 | Say Y if you intend to use SLIP or CSLIP (compressed SLIP) to | 2444 | Say Y if you intend to use SLIP or CSLIP (compressed SLIP) to |
2446 | connect to your Internet service provider or to connect to some | 2445 | connect to your Internet service provider or to connect to some |
@@ -2507,7 +2506,7 @@ config SLIP_MODE_SLIP6 | |||
2507 | 2506 | ||
2508 | config NET_FC | 2507 | config NET_FC |
2509 | bool "Fibre Channel driver support" | 2508 | bool "Fibre Channel driver support" |
2510 | depends on NETDEVICES && SCSI && PCI | 2509 | depends on SCSI && PCI |
2511 | help | 2510 | help |
2512 | Fibre Channel is a high speed serial protocol mainly used to connect | 2511 | Fibre Channel is a high speed serial protocol mainly used to connect |
2513 | large storage devices to the computer; it is compatible with and | 2512 | large storage devices to the computer; it is compatible with and |
@@ -2520,7 +2519,7 @@ config NET_FC | |||
2520 | 2519 | ||
2521 | config SHAPER | 2520 | config SHAPER |
2522 | tristate "Traffic Shaper (EXPERIMENTAL)" | 2521 | tristate "Traffic Shaper (EXPERIMENTAL)" |
2523 | depends on NETDEVICES && EXPERIMENTAL | 2522 | depends on EXPERIMENTAL |
2524 | ---help--- | 2523 | ---help--- |
2525 | The traffic shaper is a virtual network device that allows you to | 2524 | The traffic shaper is a virtual network device that allows you to |
2526 | limit the rate of outgoing data flow over some other network device. | 2525 | limit the rate of outgoing data flow over some other network device. |
@@ -2541,8 +2540,27 @@ config SHAPER | |||
2541 | 2540 | ||
2542 | config NETCONSOLE | 2541 | config NETCONSOLE |
2543 | tristate "Network console logging support (EXPERIMENTAL)" | 2542 | tristate "Network console logging support (EXPERIMENTAL)" |
2544 | depends on NETDEVICES && EXPERIMENTAL | 2543 | depends on EXPERIMENTAL |
2545 | ---help--- | 2544 | ---help--- |
2546 | If you want to log kernel messages over the network, enable this. | 2545 | If you want to log kernel messages over the network, enable this. |
2547 | See <file:Documentation/networking/netconsole.txt> for details. | 2546 | See <file:Documentation/networking/netconsole.txt> for details. |
2548 | 2547 | ||
2548 | endif #NETDEVICES | ||
2549 | |||
2550 | config NETPOLL | ||
2551 | def_bool NETCONSOLE | ||
2552 | |||
2553 | config NETPOLL_RX | ||
2554 | bool "Netpoll support for trapping incoming packets" | ||
2555 | default n | ||
2556 | depends on NETPOLL | ||
2557 | |||
2558 | config NETPOLL_TRAP | ||
2559 | bool "Netpoll traffic trapping" | ||
2560 | default n | ||
2561 | depends on NETPOLL | ||
2562 | |||
2563 | config NET_POLL_CONTROLLER | ||
2564 | def_bool NETPOLL | ||
2565 | |||
2566 | endmenu | ||
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 30c7567001fe..63c6d1e6d4d9 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
@@ -53,6 +53,7 @@ obj-$(CONFIG_FEALNX) += fealnx.o | |||
53 | obj-$(CONFIG_TIGON3) += tg3.o | 53 | obj-$(CONFIG_TIGON3) += tg3.o |
54 | obj-$(CONFIG_BNX2) += bnx2.o | 54 | obj-$(CONFIG_BNX2) += bnx2.o |
55 | obj-$(CONFIG_TC35815) += tc35815.o | 55 | obj-$(CONFIG_TC35815) += tc35815.o |
56 | obj-$(CONFIG_SKGE) += skge.o | ||
56 | obj-$(CONFIG_SK98LIN) += sk98lin/ | 57 | obj-$(CONFIG_SK98LIN) += sk98lin/ |
57 | obj-$(CONFIG_SKFP) += skfp/ | 58 | obj-$(CONFIG_SKFP) += skfp/ |
58 | obj-$(CONFIG_VIA_RHINE) += via-rhine.o | 59 | obj-$(CONFIG_VIA_RHINE) += via-rhine.o |
@@ -74,7 +75,6 @@ obj-$(CONFIG_MAC8390) += mac8390.o 8390.o | |||
74 | obj-$(CONFIG_APNE) += apne.o 8390.o | 75 | obj-$(CONFIG_APNE) += apne.o 8390.o |
75 | obj-$(CONFIG_PCMCIA_PCNET) += 8390.o | 76 | obj-$(CONFIG_PCMCIA_PCNET) += 8390.o |
76 | obj-$(CONFIG_SHAPER) += shaper.o | 77 | obj-$(CONFIG_SHAPER) += shaper.o |
77 | obj-$(CONFIG_SK_G16) += sk_g16.o | ||
78 | obj-$(CONFIG_HP100) += hp100.o | 78 | obj-$(CONFIG_HP100) += hp100.o |
79 | obj-$(CONFIG_SMC9194) += smc9194.o | 79 | obj-$(CONFIG_SMC9194) += smc9194.o |
80 | obj-$(CONFIG_FEC) += fec.o | 80 | obj-$(CONFIG_FEC) += fec.o |
@@ -122,7 +122,6 @@ obj-$(CONFIG_DEFXX) += defxx.o | |||
122 | obj-$(CONFIG_SGISEEQ) += sgiseeq.o | 122 | obj-$(CONFIG_SGISEEQ) += sgiseeq.o |
123 | obj-$(CONFIG_SGI_O2MACE_ETH) += meth.o | 123 | obj-$(CONFIG_SGI_O2MACE_ETH) += meth.o |
124 | obj-$(CONFIG_AT1700) += at1700.o | 124 | obj-$(CONFIG_AT1700) += at1700.o |
125 | obj-$(CONFIG_FMV18X) += fmv18x.o | ||
126 | obj-$(CONFIG_EL1) += 3c501.o | 125 | obj-$(CONFIG_EL1) += 3c501.o |
127 | obj-$(CONFIG_EL16) += 3c507.o | 126 | obj-$(CONFIG_EL16) += 3c507.o |
128 | obj-$(CONFIG_ELMC) += 3c523.o | 127 | obj-$(CONFIG_ELMC) += 3c523.o |
@@ -180,6 +179,7 @@ obj-$(CONFIG_AMD8111_ETH) += amd8111e.o | |||
180 | obj-$(CONFIG_IBMVETH) += ibmveth.o | 179 | obj-$(CONFIG_IBMVETH) += ibmveth.o |
181 | obj-$(CONFIG_S2IO) += s2io.o | 180 | obj-$(CONFIG_S2IO) += s2io.o |
182 | obj-$(CONFIG_SMC91X) += smc91x.o | 181 | obj-$(CONFIG_SMC91X) += smc91x.o |
182 | obj-$(CONFIG_DM9000) += dm9000.o | ||
183 | obj-$(CONFIG_FEC_8XX) += fec_8xx/ | 183 | obj-$(CONFIG_FEC_8XX) += fec_8xx/ |
184 | 184 | ||
185 | obj-$(CONFIG_ARM) += arm/ | 185 | obj-$(CONFIG_ARM) += arm/ |
diff --git a/drivers/net/Space.c b/drivers/net/Space.c index fb433325aa27..3707df6b0cfa 100644 --- a/drivers/net/Space.c +++ b/drivers/net/Space.c | |||
@@ -210,9 +210,6 @@ static struct devprobe2 isa_probes[] __initdata = { | |||
210 | #ifdef CONFIG_AT1700 | 210 | #ifdef CONFIG_AT1700 |
211 | {at1700_probe, 0}, | 211 | {at1700_probe, 0}, |
212 | #endif | 212 | #endif |
213 | #ifdef CONFIG_FMV18X /* Fujitsu FMV-181/182 */ | ||
214 | {fmv18x_probe, 0}, | ||
215 | #endif | ||
216 | #ifdef CONFIG_ETH16I | 213 | #ifdef CONFIG_ETH16I |
217 | {eth16i_probe, 0}, /* ICL EtherTeam 16i/32 */ | 214 | {eth16i_probe, 0}, /* ICL EtherTeam 16i/32 */ |
218 | #endif | 215 | #endif |
@@ -243,9 +240,6 @@ static struct devprobe2 isa_probes[] __initdata = { | |||
243 | #ifdef CONFIG_ELPLUS /* 3c505 */ | 240 | #ifdef CONFIG_ELPLUS /* 3c505 */ |
244 | {elplus_probe, 0}, | 241 | {elplus_probe, 0}, |
245 | #endif | 242 | #endif |
246 | #ifdef CONFIG_SK_G16 | ||
247 | {SK_init, 0}, | ||
248 | #endif | ||
249 | #ifdef CONFIG_NI5010 | 243 | #ifdef CONFIG_NI5010 |
250 | {ni5010_probe, 0}, | 244 | {ni5010_probe, 0}, |
251 | #endif | 245 | #endif |
diff --git a/drivers/net/ac3200.c b/drivers/net/ac3200.c index 24fba36b5c1d..91791ba37769 100644 --- a/drivers/net/ac3200.c +++ b/drivers/net/ac3200.c | |||
@@ -146,12 +146,7 @@ struct net_device * __init ac3200_probe(int unit) | |||
146 | err = do_ac3200_probe(dev); | 146 | err = do_ac3200_probe(dev); |
147 | if (err) | 147 | if (err) |
148 | goto out; | 148 | goto out; |
149 | err = register_netdev(dev); | ||
150 | if (err) | ||
151 | goto out1; | ||
152 | return dev; | 149 | return dev; |
153 | out1: | ||
154 | cleanup_card(dev); | ||
155 | out: | 150 | out: |
156 | free_netdev(dev); | 151 | free_netdev(dev); |
157 | return ERR_PTR(err); | 152 | return ERR_PTR(err); |
@@ -273,7 +268,14 @@ static int __init ac_probe1(int ioaddr, struct net_device *dev) | |||
273 | dev->poll_controller = ei_poll; | 268 | dev->poll_controller = ei_poll; |
274 | #endif | 269 | #endif |
275 | NS8390_init(dev, 0); | 270 | NS8390_init(dev, 0); |
271 | |||
272 | retval = register_netdev(dev); | ||
273 | if (retval) | ||
274 | goto out2; | ||
276 | return 0; | 275 | return 0; |
276 | out2: | ||
277 | if (ei_status.reg0) | ||
278 | iounmap((void *)dev->mem_start); | ||
277 | out1: | 279 | out1: |
278 | free_irq(dev->irq, dev); | 280 | free_irq(dev->irq, dev); |
279 | out: | 281 | out: |
@@ -392,11 +394,8 @@ init_module(void) | |||
392 | dev->base_addr = io[this_dev]; | 394 | dev->base_addr = io[this_dev]; |
393 | dev->mem_start = mem[this_dev]; /* Currently ignored by driver */ | 395 | dev->mem_start = mem[this_dev]; /* Currently ignored by driver */ |
394 | if (do_ac3200_probe(dev) == 0) { | 396 | if (do_ac3200_probe(dev) == 0) { |
395 | if (register_netdev(dev) == 0) { | 397 | dev_ac32[found++] = dev; |
396 | dev_ac32[found++] = dev; | 398 | continue; |
397 | continue; | ||
398 | } | ||
399 | cleanup_card(dev); | ||
400 | } | 399 | } |
401 | free_netdev(dev); | 400 | free_netdev(dev); |
402 | printk(KERN_WARNING "ac3200.c: No ac3200 card found (i/o = 0x%x).\n", io[this_dev]); | 401 | printk(KERN_WARNING "ac3200.c: No ac3200 card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/acenic.c b/drivers/net/acenic.c index 6eea3a8accb7..dbecc6bf7851 100644 --- a/drivers/net/acenic.c +++ b/drivers/net/acenic.c | |||
@@ -58,6 +58,7 @@ | |||
58 | #include <linux/errno.h> | 58 | #include <linux/errno.h> |
59 | #include <linux/ioport.h> | 59 | #include <linux/ioport.h> |
60 | #include <linux/pci.h> | 60 | #include <linux/pci.h> |
61 | #include <linux/dma-mapping.h> | ||
61 | #include <linux/kernel.h> | 62 | #include <linux/kernel.h> |
62 | #include <linux/netdevice.h> | 63 | #include <linux/netdevice.h> |
63 | #include <linux/etherdevice.h> | 64 | #include <linux/etherdevice.h> |
@@ -1167,9 +1168,9 @@ static int __devinit ace_init(struct net_device *dev) | |||
1167 | /* | 1168 | /* |
1168 | * Configure DMA attributes. | 1169 | * Configure DMA attributes. |
1169 | */ | 1170 | */ |
1170 | if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) { | 1171 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
1171 | ap->pci_using_dac = 1; | 1172 | ap->pci_using_dac = 1; |
1172 | } else if (!pci_set_dma_mask(pdev, 0xffffffffULL)) { | 1173 | } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
1173 | ap->pci_using_dac = 0; | 1174 | ap->pci_using_dac = 0; |
1174 | } else { | 1175 | } else { |
1175 | ecode = -ENODEV; | 1176 | ecode = -ENODEV; |
diff --git a/drivers/net/amd8111e.c b/drivers/net/amd8111e.c index b7dd7260cafb..d9ba8be72af8 100755 --- a/drivers/net/amd8111e.c +++ b/drivers/net/amd8111e.c | |||
@@ -87,6 +87,7 @@ Revision History: | |||
87 | #include <linux/if_vlan.h> | 87 | #include <linux/if_vlan.h> |
88 | #include <linux/ctype.h> | 88 | #include <linux/ctype.h> |
89 | #include <linux/crc32.h> | 89 | #include <linux/crc32.h> |
90 | #include <linux/dma-mapping.h> | ||
90 | 91 | ||
91 | #include <asm/system.h> | 92 | #include <asm/system.h> |
92 | #include <asm/io.h> | 93 | #include <asm/io.h> |
@@ -1289,7 +1290,7 @@ static irqreturn_t amd8111e_interrupt(int irq, void *dev_id, struct pt_regs *reg | |||
1289 | writel(intr0, mmio + INT0); | 1290 | writel(intr0, mmio + INT0); |
1290 | 1291 | ||
1291 | /* Check if Receive Interrupt has occurred. */ | 1292 | /* Check if Receive Interrupt has occurred. */ |
1292 | #if CONFIG_AMD8111E_NAPI | 1293 | #ifdef CONFIG_AMD8111E_NAPI |
1293 | if(intr0 & RINT0){ | 1294 | if(intr0 & RINT0){ |
1294 | if(netif_rx_schedule_prep(dev)){ | 1295 | if(netif_rx_schedule_prep(dev)){ |
1295 | /* Disable receive interupts */ | 1296 | /* Disable receive interupts */ |
@@ -2006,12 +2007,11 @@ static int __devinit amd8111e_probe_one(struct pci_dev *pdev, | |||
2006 | } | 2007 | } |
2007 | 2008 | ||
2008 | /* Initialize DMA */ | 2009 | /* Initialize DMA */ |
2009 | if(!pci_dma_supported(pdev, 0xffffffff)){ | 2010 | if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) < 0) { |
2010 | printk(KERN_ERR "amd8111e: DMA not supported," | 2011 | printk(KERN_ERR "amd8111e: DMA not supported," |
2011 | "exiting.\n"); | 2012 | "exiting.\n"); |
2012 | goto err_free_reg; | 2013 | goto err_free_reg; |
2013 | } else | 2014 | } |
2014 | pdev->dma_mask = 0xffffffff; | ||
2015 | 2015 | ||
2016 | reg_addr = pci_resource_start(pdev, 0); | 2016 | reg_addr = pci_resource_start(pdev, 0); |
2017 | reg_len = pci_resource_len(pdev, 0); | 2017 | reg_len = pci_resource_len(pdev, 0); |
diff --git a/drivers/net/appletalk/Kconfig b/drivers/net/appletalk/Kconfig index 69c488d933a2..b14e89004c3a 100644 --- a/drivers/net/appletalk/Kconfig +++ b/drivers/net/appletalk/Kconfig | |||
@@ -1,6 +1,33 @@ | |||
1 | # | 1 | # |
2 | # Appletalk driver configuration | 2 | # Appletalk driver configuration |
3 | # | 3 | # |
4 | config ATALK | ||
5 | tristate "Appletalk protocol support" | ||
6 | select LLC | ||
7 | ---help--- | ||
8 | AppleTalk is the protocol that Apple computers can use to communicate | ||
9 | on a network. If your Linux box is connected to such a network and you | ||
10 | wish to connect to it, say Y. You will need to use the netatalk package | ||
11 | so that your Linux box can act as a print and file server for Macs as | ||
12 | well as access AppleTalk printers. Check out | ||
13 | <http://www.zettabyte.net/netatalk/> on the WWW for details. | ||
14 | EtherTalk is the name used for AppleTalk over Ethernet and the | ||
15 | cheaper and slower LocalTalk is AppleTalk over a proprietary Apple | ||
16 | network using serial links. EtherTalk and LocalTalk are fully | ||
17 | supported by Linux. | ||
18 | |||
19 | General information about how to connect Linux, Windows machines and | ||
20 | Macs is on the WWW at <http://www.eats.com/linux_mac_win.html>. The | ||
21 | NET-3-HOWTO, available from | ||
22 | <http://www.tldp.org/docs.html#howto>, contains valuable | ||
23 | information as well. | ||
24 | |||
25 | To compile this driver as a module, choose M here: the module will be | ||
26 | called appletalk. You almost certainly want to compile it as a | ||
27 | module so you can restart your AppleTalk stack without rebooting | ||
28 | your machine. I hear that the GNU boycott of Apple is over, so | ||
29 | even politically correct people are allowed to say Y here. | ||
30 | |||
4 | config DEV_APPLETALK | 31 | config DEV_APPLETALK |
5 | bool "Appletalk interfaces support" | 32 | bool "Appletalk interfaces support" |
6 | depends on ATALK | 33 | depends on ATALK |
diff --git a/drivers/net/appletalk/ltpc.c b/drivers/net/appletalk/ltpc.c index db4f369637b6..d5666c37cb0d 100644 --- a/drivers/net/appletalk/ltpc.c +++ b/drivers/net/appletalk/ltpc.c | |||
@@ -1109,8 +1109,7 @@ struct net_device * __init ltpc_probe(void) | |||
1109 | inb_p(io+1); | 1109 | inb_p(io+1); |
1110 | inb_p(io+3); | 1110 | inb_p(io+3); |
1111 | 1111 | ||
1112 | set_current_state(TASK_UNINTERRUPTIBLE); | 1112 | msleep(20); |
1113 | schedule_timeout(2*HZ/100); | ||
1114 | 1113 | ||
1115 | inb_p(io+0); | 1114 | inb_p(io+0); |
1116 | inb_p(io+2); | 1115 | inb_p(io+2); |
@@ -1120,8 +1119,7 @@ struct net_device * __init ltpc_probe(void) | |||
1120 | inb_p(io+5); /* enable dma */ | 1119 | inb_p(io+5); /* enable dma */ |
1121 | inb_p(io+6); /* tri-state interrupt line */ | 1120 | inb_p(io+6); /* tri-state interrupt line */ |
1122 | 1121 | ||
1123 | set_current_state(TASK_UNINTERRUPTIBLE); | 1122 | ssleep(1); |
1124 | schedule_timeout(HZ); | ||
1125 | 1123 | ||
1126 | /* now, figure out which dma channel we're using, unless it's | 1124 | /* now, figure out which dma channel we're using, unless it's |
1127 | already been specified */ | 1125 | already been specified */ |
diff --git a/drivers/net/at1700.c b/drivers/net/at1700.c index b8ab2b6355eb..e613cc289749 100644 --- a/drivers/net/at1700.c +++ b/drivers/net/at1700.c | |||
@@ -34,10 +34,6 @@ | |||
34 | only is it difficult to detect, it also moves around in I/O space in | 34 | only is it difficult to detect, it also moves around in I/O space in |
35 | response to inb()s from other device probes! | 35 | response to inb()s from other device probes! |
36 | */ | 36 | */ |
37 | /* | ||
38 | 99/03/03 Allied Telesis RE1000 Plus support by T.Hagawa | ||
39 | 99/12/30 port to 2.3.35 by K.Takai | ||
40 | */ | ||
41 | 37 | ||
42 | #include <linux/config.h> | 38 | #include <linux/config.h> |
43 | #include <linux/errno.h> | 39 | #include <linux/errno.h> |
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c index 5a2efd343db4..c82b9cd1c924 100644 --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c | |||
@@ -1681,10 +1681,6 @@ static int au1000_init(struct net_device *dev) | |||
1681 | control |= MAC_FULL_DUPLEX; | 1681 | control |= MAC_FULL_DUPLEX; |
1682 | } | 1682 | } |
1683 | 1683 | ||
1684 | /* fix for startup without cable */ | ||
1685 | if (!link) | ||
1686 | dev->flags &= ~IFF_RUNNING; | ||
1687 | |||
1688 | aup->mac->control = control; | 1684 | aup->mac->control = control; |
1689 | aup->mac->vlan1_tag = 0x8100; /* activate vlan support */ | 1685 | aup->mac->vlan1_tag = 0x8100; /* activate vlan support */ |
1690 | au_sync(); | 1686 | au_sync(); |
@@ -1709,16 +1705,14 @@ static void au1000_timer(unsigned long data) | |||
1709 | if_port = dev->if_port; | 1705 | if_port = dev->if_port; |
1710 | if (aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed) == 0) { | 1706 | if (aup->phy_ops->phy_status(dev, aup->phy_addr, &link, &speed) == 0) { |
1711 | if (link) { | 1707 | if (link) { |
1712 | if (!(dev->flags & IFF_RUNNING)) { | 1708 | if (!netif_carrier_ok(dev)) { |
1713 | netif_carrier_on(dev); | 1709 | netif_carrier_on(dev); |
1714 | dev->flags |= IFF_RUNNING; | ||
1715 | printk(KERN_INFO "%s: link up\n", dev->name); | 1710 | printk(KERN_INFO "%s: link up\n", dev->name); |
1716 | } | 1711 | } |
1717 | } | 1712 | } |
1718 | else { | 1713 | else { |
1719 | if (dev->flags & IFF_RUNNING) { | 1714 | if (netif_carrier_ok(dev)) { |
1720 | netif_carrier_off(dev); | 1715 | netif_carrier_off(dev); |
1721 | dev->flags &= ~IFF_RUNNING; | ||
1722 | dev->if_port = 0; | 1716 | dev->if_port = 0; |
1723 | printk(KERN_INFO "%s: link down\n", dev->name); | 1717 | printk(KERN_INFO "%s: link down\n", dev->name); |
1724 | } | 1718 | } |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index 38844d003e44..94939f570f78 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -1285,6 +1285,9 @@ static int b44_open(struct net_device *dev) | |||
1285 | b44_init_hw(bp); | 1285 | b44_init_hw(bp); |
1286 | bp->flags |= B44_FLAG_INIT_COMPLETE; | 1286 | bp->flags |= B44_FLAG_INIT_COMPLETE; |
1287 | 1287 | ||
1288 | netif_carrier_off(dev); | ||
1289 | b44_check_phy(bp); | ||
1290 | |||
1288 | spin_unlock_irq(&bp->lock); | 1291 | spin_unlock_irq(&bp->lock); |
1289 | 1292 | ||
1290 | init_timer(&bp->timer); | 1293 | init_timer(&bp->timer); |
diff --git a/drivers/net/bmac.c b/drivers/net/bmac.c index 734bd4ee3f9b..8dc657fc8afb 100644 --- a/drivers/net/bmac.c +++ b/drivers/net/bmac.c | |||
@@ -1261,7 +1261,7 @@ static void bmac_reset_and_enable(struct net_device *dev) | |||
1261 | spin_unlock_irqrestore(&bp->lock, flags); | 1261 | spin_unlock_irqrestore(&bp->lock, flags); |
1262 | } | 1262 | } |
1263 | 1263 | ||
1264 | static int __devinit bmac_probe(struct macio_dev *mdev, const struct of_match *match) | 1264 | static int __devinit bmac_probe(struct macio_dev *mdev, const struct of_device_id *match) |
1265 | { | 1265 | { |
1266 | int j, rev, ret; | 1266 | int j, rev, ret; |
1267 | struct bmac_data *bp; | 1267 | struct bmac_data *bp; |
@@ -1412,7 +1412,6 @@ static int bmac_open(struct net_device *dev) | |||
1412 | bp->opened = 1; | 1412 | bp->opened = 1; |
1413 | bmac_reset_and_enable(dev); | 1413 | bmac_reset_and_enable(dev); |
1414 | enable_irq(dev->irq); | 1414 | enable_irq(dev->irq); |
1415 | dev->flags |= IFF_RUNNING; | ||
1416 | return 0; | 1415 | return 0; |
1417 | } | 1416 | } |
1418 | 1417 | ||
@@ -1425,7 +1424,6 @@ static int bmac_close(struct net_device *dev) | |||
1425 | int i; | 1424 | int i; |
1426 | 1425 | ||
1427 | bp->sleeping = 1; | 1426 | bp->sleeping = 1; |
1428 | dev->flags &= ~(IFF_UP | IFF_RUNNING); | ||
1429 | 1427 | ||
1430 | /* disable rx and tx */ | 1428 | /* disable rx and tx */ |
1431 | config = bmread(dev, RXCFG); | 1429 | config = bmread(dev, RXCFG); |
@@ -1647,16 +1645,13 @@ static int __devexit bmac_remove(struct macio_dev *mdev) | |||
1647 | return 0; | 1645 | return 0; |
1648 | } | 1646 | } |
1649 | 1647 | ||
1650 | static struct of_match bmac_match[] = | 1648 | static struct of_device_id bmac_match[] = |
1651 | { | 1649 | { |
1652 | { | 1650 | { |
1653 | .name = "bmac", | 1651 | .name = "bmac", |
1654 | .type = OF_ANY_MATCH, | ||
1655 | .compatible = OF_ANY_MATCH, | ||
1656 | .data = (void *)0, | 1652 | .data = (void *)0, |
1657 | }, | 1653 | }, |
1658 | { | 1654 | { |
1659 | .name = OF_ANY_MATCH, | ||
1660 | .type = "network", | 1655 | .type = "network", |
1661 | .compatible = "bmac+", | 1656 | .compatible = "bmac+", |
1662 | .data = (void *)1, | 1657 | .data = (void *)1, |
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c index 6233c4ffb805..a2e8dda5afac 100644 --- a/drivers/net/bonding/bond_3ad.c +++ b/drivers/net/bonding/bond_3ad.c | |||
@@ -2346,7 +2346,6 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev) | |||
2346 | { | 2346 | { |
2347 | struct slave *slave, *start_at; | 2347 | struct slave *slave, *start_at; |
2348 | struct bonding *bond = dev->priv; | 2348 | struct bonding *bond = dev->priv; |
2349 | struct ethhdr *data = (struct ethhdr *)skb->data; | ||
2350 | int slave_agg_no; | 2349 | int slave_agg_no; |
2351 | int slaves_in_agg; | 2350 | int slaves_in_agg; |
2352 | int agg_id; | 2351 | int agg_id; |
@@ -2377,7 +2376,7 @@ int bond_3ad_xmit_xor(struct sk_buff *skb, struct net_device *dev) | |||
2377 | goto out; | 2376 | goto out; |
2378 | } | 2377 | } |
2379 | 2378 | ||
2380 | slave_agg_no = (data->h_dest[5]^bond->dev->dev_addr[5]) % slaves_in_agg; | 2379 | slave_agg_no = bond->xmit_hash_policy(skb, dev, slaves_in_agg); |
2381 | 2380 | ||
2382 | bond_for_each_slave(bond, slave, i) { | 2381 | bond_for_each_slave(bond, slave, i) { |
2383 | struct aggregator *agg = SLAVE_AD_INFO(slave).port.aggregator; | 2382 | struct aggregator *agg = SLAVE_AD_INFO(slave).port.aggregator; |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 269a5e407349..2c930da90a85 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -475,7 +475,18 @@ | |||
475 | * Solution is to move call to dev_remove_pack outside of the | 475 | * Solution is to move call to dev_remove_pack outside of the |
476 | * spinlock. | 476 | * spinlock. |
477 | * Set version to 2.6.1. | 477 | * Set version to 2.6.1. |
478 | * | 478 | * 2005/06/05 - Jay Vosburgh <fubar@us.ibm.com> |
479 | * - Support for generating gratuitous ARPs in active-backup mode. | ||
480 | * Includes support for VLAN tagging all bonding-generated ARPs | ||
481 | * as needed. Set version to 2.6.2. | ||
482 | * 2005/06/08 - Jason Gabler <jygabler at lbl dot gov> | ||
483 | * - alternate hashing policy support for mode 2 | ||
484 | * * Added kernel parameter "xmit_hash_policy" to allow the selection | ||
485 | * of different hashing policies for mode 2. The original mode 2 | ||
486 | * policy is the default, now found in xmit_hash_policy_layer2(). | ||
487 | * * Added xmit_hash_policy_layer34() | ||
488 | * - Modified by Jay Vosburgh <fubar@us.ibm.com> to also support mode 4. | ||
489 | * Set version to 2.6.3. | ||
479 | */ | 490 | */ |
480 | 491 | ||
481 | //#define BONDING_DEBUG 1 | 492 | //#define BONDING_DEBUG 1 |
@@ -490,7 +501,10 @@ | |||
490 | #include <linux/ptrace.h> | 501 | #include <linux/ptrace.h> |
491 | #include <linux/ioport.h> | 502 | #include <linux/ioport.h> |
492 | #include <linux/in.h> | 503 | #include <linux/in.h> |
504 | #include <net/ip.h> | ||
493 | #include <linux/ip.h> | 505 | #include <linux/ip.h> |
506 | #include <linux/tcp.h> | ||
507 | #include <linux/udp.h> | ||
494 | #include <linux/slab.h> | 508 | #include <linux/slab.h> |
495 | #include <linux/string.h> | 509 | #include <linux/string.h> |
496 | #include <linux/init.h> | 510 | #include <linux/init.h> |
@@ -519,6 +533,7 @@ | |||
519 | #include <linux/ethtool.h> | 533 | #include <linux/ethtool.h> |
520 | #include <linux/if_vlan.h> | 534 | #include <linux/if_vlan.h> |
521 | #include <linux/if_bonding.h> | 535 | #include <linux/if_bonding.h> |
536 | #include <net/route.h> | ||
522 | #include "bonding.h" | 537 | #include "bonding.h" |
523 | #include "bond_3ad.h" | 538 | #include "bond_3ad.h" |
524 | #include "bond_alb.h" | 539 | #include "bond_alb.h" |
@@ -537,6 +552,7 @@ static int use_carrier = 1; | |||
537 | static char *mode = NULL; | 552 | static char *mode = NULL; |
538 | static char *primary = NULL; | 553 | static char *primary = NULL; |
539 | static char *lacp_rate = NULL; | 554 | static char *lacp_rate = NULL; |
555 | static char *xmit_hash_policy = NULL; | ||
540 | static int arp_interval = BOND_LINK_ARP_INTERV; | 556 | static int arp_interval = BOND_LINK_ARP_INTERV; |
541 | static char *arp_ip_target[BOND_MAX_ARP_TARGETS] = { NULL, }; | 557 | static char *arp_ip_target[BOND_MAX_ARP_TARGETS] = { NULL, }; |
542 | 558 | ||
@@ -556,6 +572,8 @@ module_param(primary, charp, 0); | |||
556 | MODULE_PARM_DESC(primary, "Primary network device to use"); | 572 | MODULE_PARM_DESC(primary, "Primary network device to use"); |
557 | module_param(lacp_rate, charp, 0); | 573 | module_param(lacp_rate, charp, 0); |
558 | MODULE_PARM_DESC(lacp_rate, "LACPDU tx rate to request from 802.3ad partner (slow/fast)"); | 574 | MODULE_PARM_DESC(lacp_rate, "LACPDU tx rate to request from 802.3ad partner (slow/fast)"); |
575 | module_param(xmit_hash_policy, charp, 0); | ||
576 | MODULE_PARM_DESC(xmit_hash_policy, "XOR hashing method : 0 for layer 2 (default), 1 for layer 3+4"); | ||
559 | module_param(arp_interval, int, 0); | 577 | module_param(arp_interval, int, 0); |
560 | MODULE_PARM_DESC(arp_interval, "arp interval in milliseconds"); | 578 | MODULE_PARM_DESC(arp_interval, "arp interval in milliseconds"); |
561 | module_param_array(arp_ip_target, charp, NULL, 0); | 579 | module_param_array(arp_ip_target, charp, NULL, 0); |
@@ -574,8 +592,8 @@ static struct proc_dir_entry *bond_proc_dir = NULL; | |||
574 | 592 | ||
575 | static u32 arp_target[BOND_MAX_ARP_TARGETS] = { 0, } ; | 593 | static u32 arp_target[BOND_MAX_ARP_TARGETS] = { 0, } ; |
576 | static int arp_ip_count = 0; | 594 | static int arp_ip_count = 0; |
577 | static u32 my_ip = 0; | ||
578 | static int bond_mode = BOND_MODE_ROUNDROBIN; | 595 | static int bond_mode = BOND_MODE_ROUNDROBIN; |
596 | static int xmit_hashtype= BOND_XMIT_POLICY_LAYER2; | ||
579 | static int lacp_fast = 0; | 597 | static int lacp_fast = 0; |
580 | static int app_abi_ver = 0; | 598 | static int app_abi_ver = 0; |
581 | static int orig_app_abi_ver = -1; /* This is used to save the first ABI version | 599 | static int orig_app_abi_ver = -1; /* This is used to save the first ABI version |
@@ -585,7 +603,6 @@ static int orig_app_abi_ver = -1; /* This is used to save the first ABI version | |||
585 | * command comes from an application using | 603 | * command comes from an application using |
586 | * another ABI version. | 604 | * another ABI version. |
587 | */ | 605 | */ |
588 | |||
589 | struct bond_parm_tbl { | 606 | struct bond_parm_tbl { |
590 | char *modename; | 607 | char *modename; |
591 | int mode; | 608 | int mode; |
@@ -608,9 +625,16 @@ static struct bond_parm_tbl bond_mode_tbl[] = { | |||
608 | { NULL, -1}, | 625 | { NULL, -1}, |
609 | }; | 626 | }; |
610 | 627 | ||
628 | static struct bond_parm_tbl xmit_hashtype_tbl[] = { | ||
629 | { "layer2", BOND_XMIT_POLICY_LAYER2}, | ||
630 | { "layer3+4", BOND_XMIT_POLICY_LAYER34}, | ||
631 | { NULL, -1}, | ||
632 | }; | ||
633 | |||
611 | /*-------------------------- Forward declarations ---------------------------*/ | 634 | /*-------------------------- Forward declarations ---------------------------*/ |
612 | 635 | ||
613 | static inline void bond_set_mode_ops(struct net_device *bond_dev, int mode); | 636 | static inline void bond_set_mode_ops(struct bonding *bond, int mode); |
637 | static void bond_send_gratuitous_arp(struct bonding *bond); | ||
614 | 638 | ||
615 | /*---------------------------- General routines -----------------------------*/ | 639 | /*---------------------------- General routines -----------------------------*/ |
616 | 640 | ||
@@ -659,6 +683,7 @@ static int bond_add_vlan(struct bonding *bond, unsigned short vlan_id) | |||
659 | 683 | ||
660 | INIT_LIST_HEAD(&vlan->vlan_list); | 684 | INIT_LIST_HEAD(&vlan->vlan_list); |
661 | vlan->vlan_id = vlan_id; | 685 | vlan->vlan_id = vlan_id; |
686 | vlan->vlan_ip = 0; | ||
662 | 687 | ||
663 | write_lock_bh(&bond->lock); | 688 | write_lock_bh(&bond->lock); |
664 | 689 | ||
@@ -1468,16 +1493,6 @@ static void bond_change_active_slave(struct bonding *bond, struct slave *new_act | |||
1468 | } | 1493 | } |
1469 | } | 1494 | } |
1470 | 1495 | ||
1471 | if (bond->params.mode == BOND_MODE_ACTIVEBACKUP) { | ||
1472 | if (old_active) { | ||
1473 | bond_set_slave_inactive_flags(old_active); | ||
1474 | } | ||
1475 | |||
1476 | if (new_active) { | ||
1477 | bond_set_slave_active_flags(new_active); | ||
1478 | } | ||
1479 | } | ||
1480 | |||
1481 | if (USES_PRIMARY(bond->params.mode)) { | 1496 | if (USES_PRIMARY(bond->params.mode)) { |
1482 | bond_mc_swap(bond, new_active, old_active); | 1497 | bond_mc_swap(bond, new_active, old_active); |
1483 | } | 1498 | } |
@@ -1488,6 +1503,17 @@ static void bond_change_active_slave(struct bonding *bond, struct slave *new_act | |||
1488 | } else { | 1503 | } else { |
1489 | bond->curr_active_slave = new_active; | 1504 | bond->curr_active_slave = new_active; |
1490 | } | 1505 | } |
1506 | |||
1507 | if (bond->params.mode == BOND_MODE_ACTIVEBACKUP) { | ||
1508 | if (old_active) { | ||
1509 | bond_set_slave_inactive_flags(old_active); | ||
1510 | } | ||
1511 | |||
1512 | if (new_active) { | ||
1513 | bond_set_slave_active_flags(new_active); | ||
1514 | } | ||
1515 | bond_send_gratuitous_arp(bond); | ||
1516 | } | ||
1491 | } | 1517 | } |
1492 | 1518 | ||
1493 | /** | 1519 | /** |
@@ -2694,15 +2720,180 @@ out: | |||
2694 | read_unlock(&bond->lock); | 2720 | read_unlock(&bond->lock); |
2695 | } | 2721 | } |
2696 | 2722 | ||
2723 | |||
2724 | static u32 bond_glean_dev_ip(struct net_device *dev) | ||
2725 | { | ||
2726 | struct in_device *idev; | ||
2727 | struct in_ifaddr *ifa; | ||
2728 | u32 addr = 0; | ||
2729 | |||
2730 | if (!dev) | ||
2731 | return 0; | ||
2732 | |||
2733 | rcu_read_lock(); | ||
2734 | idev = __in_dev_get(dev); | ||
2735 | if (!idev) | ||
2736 | goto out; | ||
2737 | |||
2738 | ifa = idev->ifa_list; | ||
2739 | if (!ifa) | ||
2740 | goto out; | ||
2741 | |||
2742 | addr = ifa->ifa_local; | ||
2743 | out: | ||
2744 | rcu_read_unlock(); | ||
2745 | return addr; | ||
2746 | } | ||
2747 | |||
2748 | static int bond_has_ip(struct bonding *bond) | ||
2749 | { | ||
2750 | struct vlan_entry *vlan, *vlan_next; | ||
2751 | |||
2752 | if (bond->master_ip) | ||
2753 | return 1; | ||
2754 | |||
2755 | if (list_empty(&bond->vlan_list)) | ||
2756 | return 0; | ||
2757 | |||
2758 | list_for_each_entry_safe(vlan, vlan_next, &bond->vlan_list, | ||
2759 | vlan_list) { | ||
2760 | if (vlan->vlan_ip) | ||
2761 | return 1; | ||
2762 | } | ||
2763 | |||
2764 | return 0; | ||
2765 | } | ||
2766 | |||
2767 | /* | ||
2768 | * We go to the (large) trouble of VLAN tagging ARP frames because | ||
2769 | * switches in VLAN mode (especially if ports are configured as | ||
2770 | * "native" to a VLAN) might not pass non-tagged frames. | ||
2771 | */ | ||
2772 | static void bond_arp_send(struct net_device *slave_dev, int arp_op, u32 dest_ip, u32 src_ip, unsigned short vlan_id) | ||
2773 | { | ||
2774 | struct sk_buff *skb; | ||
2775 | |||
2776 | dprintk("arp %d on slave %s: dst %x src %x vid %d\n", arp_op, | ||
2777 | slave_dev->name, dest_ip, src_ip, vlan_id); | ||
2778 | |||
2779 | skb = arp_create(arp_op, ETH_P_ARP, dest_ip, slave_dev, src_ip, | ||
2780 | NULL, slave_dev->dev_addr, NULL); | ||
2781 | |||
2782 | if (!skb) { | ||
2783 | printk(KERN_ERR DRV_NAME ": ARP packet allocation failed\n"); | ||
2784 | return; | ||
2785 | } | ||
2786 | if (vlan_id) { | ||
2787 | skb = vlan_put_tag(skb, vlan_id); | ||
2788 | if (!skb) { | ||
2789 | printk(KERN_ERR DRV_NAME ": failed to insert VLAN tag\n"); | ||
2790 | return; | ||
2791 | } | ||
2792 | } | ||
2793 | arp_xmit(skb); | ||
2794 | } | ||
2795 | |||
2796 | |||
2697 | static void bond_arp_send_all(struct bonding *bond, struct slave *slave) | 2797 | static void bond_arp_send_all(struct bonding *bond, struct slave *slave) |
2698 | { | 2798 | { |
2699 | int i; | 2799 | int i, vlan_id, rv; |
2700 | u32 *targets = bond->params.arp_targets; | 2800 | u32 *targets = bond->params.arp_targets; |
2801 | struct vlan_entry *vlan, *vlan_next; | ||
2802 | struct net_device *vlan_dev; | ||
2803 | struct flowi fl; | ||
2804 | struct rtable *rt; | ||
2701 | 2805 | ||
2702 | for (i = 0; (i < BOND_MAX_ARP_TARGETS) && targets[i]; i++) { | 2806 | for (i = 0; (i < BOND_MAX_ARP_TARGETS) && targets[i]; i++) { |
2703 | arp_send(ARPOP_REQUEST, ETH_P_ARP, targets[i], slave->dev, | 2807 | dprintk("basa: target %x\n", targets[i]); |
2704 | my_ip, NULL, slave->dev->dev_addr, | 2808 | if (list_empty(&bond->vlan_list)) { |
2705 | NULL); | 2809 | dprintk("basa: empty vlan: arp_send\n"); |
2810 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], | ||
2811 | bond->master_ip, 0); | ||
2812 | continue; | ||
2813 | } | ||
2814 | |||
2815 | /* | ||
2816 | * If VLANs are configured, we do a route lookup to | ||
2817 | * determine which VLAN interface would be used, so we | ||
2818 | * can tag the ARP with the proper VLAN tag. | ||
2819 | */ | ||
2820 | memset(&fl, 0, sizeof(fl)); | ||
2821 | fl.fl4_dst = targets[i]; | ||
2822 | fl.fl4_tos = RTO_ONLINK; | ||
2823 | |||
2824 | rv = ip_route_output_key(&rt, &fl); | ||
2825 | if (rv) { | ||
2826 | if (net_ratelimit()) { | ||
2827 | printk(KERN_WARNING DRV_NAME | ||
2828 | ": %s: no route to arp_ip_target %u.%u.%u.%u\n", | ||
2829 | bond->dev->name, NIPQUAD(fl.fl4_dst)); | ||
2830 | } | ||
2831 | continue; | ||
2832 | } | ||
2833 | |||
2834 | /* | ||
2835 | * This target is not on a VLAN | ||
2836 | */ | ||
2837 | if (rt->u.dst.dev == bond->dev) { | ||
2838 | dprintk("basa: rtdev == bond->dev: arp_send\n"); | ||
2839 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], | ||
2840 | bond->master_ip, 0); | ||
2841 | continue; | ||
2842 | } | ||
2843 | |||
2844 | vlan_id = 0; | ||
2845 | list_for_each_entry_safe(vlan, vlan_next, &bond->vlan_list, | ||
2846 | vlan_list) { | ||
2847 | vlan_dev = bond->vlgrp->vlan_devices[vlan->vlan_id]; | ||
2848 | if (vlan_dev == rt->u.dst.dev) { | ||
2849 | vlan_id = vlan->vlan_id; | ||
2850 | dprintk("basa: vlan match on %s %d\n", | ||
2851 | vlan_dev->name, vlan_id); | ||
2852 | break; | ||
2853 | } | ||
2854 | } | ||
2855 | |||
2856 | if (vlan_id) { | ||
2857 | bond_arp_send(slave->dev, ARPOP_REQUEST, targets[i], | ||
2858 | vlan->vlan_ip, vlan_id); | ||
2859 | continue; | ||
2860 | } | ||
2861 | |||
2862 | if (net_ratelimit()) { | ||
2863 | printk(KERN_WARNING DRV_NAME | ||
2864 | ": %s: no path to arp_ip_target %u.%u.%u.%u via rt.dev %s\n", | ||
2865 | bond->dev->name, NIPQUAD(fl.fl4_dst), | ||
2866 | rt->u.dst.dev ? rt->u.dst.dev->name : "NULL"); | ||
2867 | } | ||
2868 | } | ||
2869 | } | ||
2870 | |||
2871 | /* | ||
2872 | * Kick out a gratuitous ARP for an IP on the bonding master plus one | ||
2873 | * for each VLAN above us. | ||
2874 | */ | ||
2875 | static void bond_send_gratuitous_arp(struct bonding *bond) | ||
2876 | { | ||
2877 | struct slave *slave = bond->curr_active_slave; | ||
2878 | struct vlan_entry *vlan; | ||
2879 | struct net_device *vlan_dev; | ||
2880 | |||
2881 | dprintk("bond_send_grat_arp: bond %s slave %s\n", bond->dev->name, | ||
2882 | slave ? slave->dev->name : "NULL"); | ||
2883 | if (!slave) | ||
2884 | return; | ||
2885 | |||
2886 | if (bond->master_ip) { | ||
2887 | bond_arp_send(slave->dev, ARPOP_REPLY, bond->master_ip, | ||
2888 | bond->master_ip, 0); | ||
2889 | } | ||
2890 | |||
2891 | list_for_each_entry(vlan, &bond->vlan_list, vlan_list) { | ||
2892 | vlan_dev = bond->vlgrp->vlan_devices[vlan->vlan_id]; | ||
2893 | if (vlan->vlan_ip) { | ||
2894 | bond_arp_send(slave->dev, ARPOP_REPLY, vlan->vlan_ip, | ||
2895 | vlan->vlan_ip, vlan->vlan_id); | ||
2896 | } | ||
2706 | } | 2897 | } |
2707 | } | 2898 | } |
2708 | 2899 | ||
@@ -2781,7 +2972,7 @@ static void bond_loadbalance_arp_mon(struct net_device *bond_dev) | |||
2781 | */ | 2972 | */ |
2782 | if (((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) || | 2973 | if (((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) || |
2783 | (((jiffies - slave->dev->last_rx) >= (2*delta_in_ticks)) && | 2974 | (((jiffies - slave->dev->last_rx) >= (2*delta_in_ticks)) && |
2784 | my_ip)) { | 2975 | bond_has_ip(bond))) { |
2785 | 2976 | ||
2786 | slave->link = BOND_LINK_DOWN; | 2977 | slave->link = BOND_LINK_DOWN; |
2787 | slave->state = BOND_STATE_BACKUP; | 2978 | slave->state = BOND_STATE_BACKUP; |
@@ -2920,7 +3111,7 @@ static void bond_activebackup_arp_mon(struct net_device *bond_dev) | |||
2920 | if ((slave != bond->curr_active_slave) && | 3111 | if ((slave != bond->curr_active_slave) && |
2921 | (!bond->current_arp_slave) && | 3112 | (!bond->current_arp_slave) && |
2922 | (((jiffies - slave->dev->last_rx) >= 3*delta_in_ticks) && | 3113 | (((jiffies - slave->dev->last_rx) >= 3*delta_in_ticks) && |
2923 | my_ip)) { | 3114 | bond_has_ip(bond))) { |
2924 | /* a backup slave has gone down; three times | 3115 | /* a backup slave has gone down; three times |
2925 | * the delta allows the current slave to be | 3116 | * the delta allows the current slave to be |
2926 | * taken out before the backup slave. | 3117 | * taken out before the backup slave. |
@@ -2966,8 +3157,8 @@ static void bond_activebackup_arp_mon(struct net_device *bond_dev) | |||
2966 | * if it is up and needs to take over as the curr_active_slave | 3157 | * if it is up and needs to take over as the curr_active_slave |
2967 | */ | 3158 | */ |
2968 | if ((((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) || | 3159 | if ((((jiffies - slave->dev->trans_start) >= (2*delta_in_ticks)) || |
2969 | (((jiffies - slave->dev->last_rx) >= (2*delta_in_ticks)) && | 3160 | (((jiffies - slave->dev->last_rx) >= (2*delta_in_ticks)) && |
2970 | my_ip)) && | 3161 | bond_has_ip(bond))) && |
2971 | ((jiffies - slave->jiffies) >= 2*delta_in_ticks)) { | 3162 | ((jiffies - slave->jiffies) >= 2*delta_in_ticks)) { |
2972 | 3163 | ||
2973 | slave->link = BOND_LINK_DOWN; | 3164 | slave->link = BOND_LINK_DOWN; |
@@ -3019,7 +3210,7 @@ static void bond_activebackup_arp_mon(struct net_device *bond_dev) | |||
3019 | /* the current slave must tx an arp to ensure backup slaves | 3210 | /* the current slave must tx an arp to ensure backup slaves |
3020 | * rx traffic | 3211 | * rx traffic |
3021 | */ | 3212 | */ |
3022 | if (slave && my_ip) { | 3213 | if (slave && bond_has_ip(bond)) { |
3023 | bond_arp_send_all(bond, slave); | 3214 | bond_arp_send_all(bond, slave); |
3024 | } | 3215 | } |
3025 | } | 3216 | } |
@@ -3471,10 +3662,67 @@ static int bond_netdev_event(struct notifier_block *this, unsigned long event, v | |||
3471 | return NOTIFY_DONE; | 3662 | return NOTIFY_DONE; |
3472 | } | 3663 | } |
3473 | 3664 | ||
3665 | /* | ||
3666 | * bond_inetaddr_event: handle inetaddr notifier chain events. | ||
3667 | * | ||
3668 | * We keep track of device IPs primarily to use as source addresses in | ||
3669 | * ARP monitor probes (rather than spewing out broadcasts all the time). | ||
3670 | * | ||
3671 | * We track one IP for the main device (if it has one), plus one per VLAN. | ||
3672 | */ | ||
3673 | static int bond_inetaddr_event(struct notifier_block *this, unsigned long event, void *ptr) | ||
3674 | { | ||
3675 | struct in_ifaddr *ifa = ptr; | ||
3676 | struct net_device *vlan_dev, *event_dev = ifa->ifa_dev->dev; | ||
3677 | struct bonding *bond, *bond_next; | ||
3678 | struct vlan_entry *vlan, *vlan_next; | ||
3679 | |||
3680 | list_for_each_entry_safe(bond, bond_next, &bond_dev_list, bond_list) { | ||
3681 | if (bond->dev == event_dev) { | ||
3682 | switch (event) { | ||
3683 | case NETDEV_UP: | ||
3684 | bond->master_ip = ifa->ifa_local; | ||
3685 | return NOTIFY_OK; | ||
3686 | case NETDEV_DOWN: | ||
3687 | bond->master_ip = bond_glean_dev_ip(bond->dev); | ||
3688 | return NOTIFY_OK; | ||
3689 | default: | ||
3690 | return NOTIFY_DONE; | ||
3691 | } | ||
3692 | } | ||
3693 | |||
3694 | if (list_empty(&bond->vlan_list)) | ||
3695 | continue; | ||
3696 | |||
3697 | list_for_each_entry_safe(vlan, vlan_next, &bond->vlan_list, | ||
3698 | vlan_list) { | ||
3699 | vlan_dev = bond->vlgrp->vlan_devices[vlan->vlan_id]; | ||
3700 | if (vlan_dev == event_dev) { | ||
3701 | switch (event) { | ||
3702 | case NETDEV_UP: | ||
3703 | vlan->vlan_ip = ifa->ifa_local; | ||
3704 | return NOTIFY_OK; | ||
3705 | case NETDEV_DOWN: | ||
3706 | vlan->vlan_ip = | ||
3707 | bond_glean_dev_ip(vlan_dev); | ||
3708 | return NOTIFY_OK; | ||
3709 | default: | ||
3710 | return NOTIFY_DONE; | ||
3711 | } | ||
3712 | } | ||
3713 | } | ||
3714 | } | ||
3715 | return NOTIFY_DONE; | ||
3716 | } | ||
3717 | |||
3474 | static struct notifier_block bond_netdev_notifier = { | 3718 | static struct notifier_block bond_netdev_notifier = { |
3475 | .notifier_call = bond_netdev_event, | 3719 | .notifier_call = bond_netdev_event, |
3476 | }; | 3720 | }; |
3477 | 3721 | ||
3722 | static struct notifier_block bond_inetaddr_notifier = { | ||
3723 | .notifier_call = bond_inetaddr_event, | ||
3724 | }; | ||
3725 | |||
3478 | /*-------------------------- Packet type handling ---------------------------*/ | 3726 | /*-------------------------- Packet type handling ---------------------------*/ |
3479 | 3727 | ||
3480 | /* register to receive lacpdus on a bond */ | 3728 | /* register to receive lacpdus on a bond */ |
@@ -3496,6 +3744,46 @@ static void bond_unregister_lacpdu(struct bonding *bond) | |||
3496 | dev_remove_pack(&(BOND_AD_INFO(bond).ad_pkt_type)); | 3744 | dev_remove_pack(&(BOND_AD_INFO(bond).ad_pkt_type)); |
3497 | } | 3745 | } |
3498 | 3746 | ||
3747 | /*---------------------------- Hashing Policies -----------------------------*/ | ||
3748 | |||
3749 | /* | ||
3750 | * Hash for the the output device based upon layer 3 and layer 4 data. If | ||
3751 | * the packet is a frag or not TCP or UDP, just use layer 3 data. If it is | ||
3752 | * altogether not IP, mimic bond_xmit_hash_policy_l2() | ||
3753 | */ | ||
3754 | static int bond_xmit_hash_policy_l34(struct sk_buff *skb, | ||
3755 | struct net_device *bond_dev, int count) | ||
3756 | { | ||
3757 | struct ethhdr *data = (struct ethhdr *)skb->data; | ||
3758 | struct iphdr *iph = skb->nh.iph; | ||
3759 | u16 *layer4hdr = (u16 *)((u32 *)iph + iph->ihl); | ||
3760 | int layer4_xor = 0; | ||
3761 | |||
3762 | if (skb->protocol == __constant_htons(ETH_P_IP)) { | ||
3763 | if (!(iph->frag_off & __constant_htons(IP_MF|IP_OFFSET)) && | ||
3764 | (iph->protocol == IPPROTO_TCP || | ||
3765 | iph->protocol == IPPROTO_UDP)) { | ||
3766 | layer4_xor = htons((*layer4hdr ^ *(layer4hdr + 1))); | ||
3767 | } | ||
3768 | return (layer4_xor ^ | ||
3769 | ((ntohl(iph->saddr ^ iph->daddr)) & 0xffff)) % count; | ||
3770 | |||
3771 | } | ||
3772 | |||
3773 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | ||
3774 | } | ||
3775 | |||
3776 | /* | ||
3777 | * Hash for the output device based upon layer 2 data | ||
3778 | */ | ||
3779 | static int bond_xmit_hash_policy_l2(struct sk_buff *skb, | ||
3780 | struct net_device *bond_dev, int count) | ||
3781 | { | ||
3782 | struct ethhdr *data = (struct ethhdr *)skb->data; | ||
3783 | |||
3784 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | ||
3785 | } | ||
3786 | |||
3499 | /*-------------------------- Device entry points ----------------------------*/ | 3787 | /*-------------------------- Device entry points ----------------------------*/ |
3500 | 3788 | ||
3501 | static int bond_open(struct net_device *bond_dev) | 3789 | static int bond_open(struct net_device *bond_dev) |
@@ -4060,17 +4348,6 @@ static int bond_xmit_activebackup(struct sk_buff *skb, struct net_device *bond_d | |||
4060 | struct bonding *bond = bond_dev->priv; | 4348 | struct bonding *bond = bond_dev->priv; |
4061 | int res = 1; | 4349 | int res = 1; |
4062 | 4350 | ||
4063 | /* if we are sending arp packets, try to at least | ||
4064 | identify our own ip address */ | ||
4065 | if (bond->params.arp_interval && !my_ip && | ||
4066 | (skb->protocol == __constant_htons(ETH_P_ARP))) { | ||
4067 | char *the_ip = (char *)skb->data + | ||
4068 | sizeof(struct ethhdr) + | ||
4069 | sizeof(struct arphdr) + | ||
4070 | ETH_ALEN; | ||
4071 | memcpy(&my_ip, the_ip, 4); | ||
4072 | } | ||
4073 | |||
4074 | read_lock(&bond->lock); | 4351 | read_lock(&bond->lock); |
4075 | read_lock(&bond->curr_slave_lock); | 4352 | read_lock(&bond->curr_slave_lock); |
4076 | 4353 | ||
@@ -4093,14 +4370,13 @@ out: | |||
4093 | } | 4370 | } |
4094 | 4371 | ||
4095 | /* | 4372 | /* |
4096 | * in XOR mode, we determine the output device by performing xor on | 4373 | * In bond_xmit_xor() , we determine the output device by using a pre- |
4097 | * the source and destination hw adresses. If this device is not | 4374 | * determined xmit_hash_policy(), If the selected device is not enabled, |
4098 | * enabled, find the next slave following this xor slave. | 4375 | * find the next active slave. |
4099 | */ | 4376 | */ |
4100 | static int bond_xmit_xor(struct sk_buff *skb, struct net_device *bond_dev) | 4377 | static int bond_xmit_xor(struct sk_buff *skb, struct net_device *bond_dev) |
4101 | { | 4378 | { |
4102 | struct bonding *bond = bond_dev->priv; | 4379 | struct bonding *bond = bond_dev->priv; |
4103 | struct ethhdr *data = (struct ethhdr *)skb->data; | ||
4104 | struct slave *slave, *start_at; | 4380 | struct slave *slave, *start_at; |
4105 | int slave_no; | 4381 | int slave_no; |
4106 | int i; | 4382 | int i; |
@@ -4112,7 +4388,7 @@ static int bond_xmit_xor(struct sk_buff *skb, struct net_device *bond_dev) | |||
4112 | goto out; | 4388 | goto out; |
4113 | } | 4389 | } |
4114 | 4390 | ||
4115 | slave_no = (data->h_dest[5]^bond_dev->dev_addr[5]) % bond->slave_cnt; | 4391 | slave_no = bond->xmit_hash_policy(skb, bond_dev, bond->slave_cnt); |
4116 | 4392 | ||
4117 | bond_for_each_slave(bond, slave, i) { | 4393 | bond_for_each_slave(bond, slave, i) { |
4118 | slave_no--; | 4394 | slave_no--; |
@@ -4208,8 +4484,10 @@ out: | |||
4208 | /* | 4484 | /* |
4209 | * set bond mode specific net device operations | 4485 | * set bond mode specific net device operations |
4210 | */ | 4486 | */ |
4211 | static inline void bond_set_mode_ops(struct net_device *bond_dev, int mode) | 4487 | static inline void bond_set_mode_ops(struct bonding *bond, int mode) |
4212 | { | 4488 | { |
4489 | struct net_device *bond_dev = bond->dev; | ||
4490 | |||
4213 | switch (mode) { | 4491 | switch (mode) { |
4214 | case BOND_MODE_ROUNDROBIN: | 4492 | case BOND_MODE_ROUNDROBIN: |
4215 | bond_dev->hard_start_xmit = bond_xmit_roundrobin; | 4493 | bond_dev->hard_start_xmit = bond_xmit_roundrobin; |
@@ -4219,12 +4497,20 @@ static inline void bond_set_mode_ops(struct net_device *bond_dev, int mode) | |||
4219 | break; | 4497 | break; |
4220 | case BOND_MODE_XOR: | 4498 | case BOND_MODE_XOR: |
4221 | bond_dev->hard_start_xmit = bond_xmit_xor; | 4499 | bond_dev->hard_start_xmit = bond_xmit_xor; |
4500 | if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34) | ||
4501 | bond->xmit_hash_policy = bond_xmit_hash_policy_l34; | ||
4502 | else | ||
4503 | bond->xmit_hash_policy = bond_xmit_hash_policy_l2; | ||
4222 | break; | 4504 | break; |
4223 | case BOND_MODE_BROADCAST: | 4505 | case BOND_MODE_BROADCAST: |
4224 | bond_dev->hard_start_xmit = bond_xmit_broadcast; | 4506 | bond_dev->hard_start_xmit = bond_xmit_broadcast; |
4225 | break; | 4507 | break; |
4226 | case BOND_MODE_8023AD: | 4508 | case BOND_MODE_8023AD: |
4227 | bond_dev->hard_start_xmit = bond_3ad_xmit_xor; | 4509 | bond_dev->hard_start_xmit = bond_3ad_xmit_xor; |
4510 | if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34) | ||
4511 | bond->xmit_hash_policy = bond_xmit_hash_policy_l34; | ||
4512 | else | ||
4513 | bond->xmit_hash_policy = bond_xmit_hash_policy_l2; | ||
4228 | break; | 4514 | break; |
4229 | case BOND_MODE_TLB: | 4515 | case BOND_MODE_TLB: |
4230 | case BOND_MODE_ALB: | 4516 | case BOND_MODE_ALB: |
@@ -4273,7 +4559,7 @@ static int __init bond_init(struct net_device *bond_dev, struct bond_params *par | |||
4273 | bond_dev->change_mtu = bond_change_mtu; | 4559 | bond_dev->change_mtu = bond_change_mtu; |
4274 | bond_dev->set_mac_address = bond_set_mac_address; | 4560 | bond_dev->set_mac_address = bond_set_mac_address; |
4275 | 4561 | ||
4276 | bond_set_mode_ops(bond_dev, bond->params.mode); | 4562 | bond_set_mode_ops(bond, bond->params.mode); |
4277 | 4563 | ||
4278 | bond_dev->destructor = free_netdev; | 4564 | bond_dev->destructor = free_netdev; |
4279 | 4565 | ||
@@ -4384,6 +4670,25 @@ static int bond_check_params(struct bond_params *params) | |||
4384 | } | 4670 | } |
4385 | } | 4671 | } |
4386 | 4672 | ||
4673 | if (xmit_hash_policy) { | ||
4674 | if ((bond_mode != BOND_MODE_XOR) && | ||
4675 | (bond_mode != BOND_MODE_8023AD)) { | ||
4676 | printk(KERN_INFO DRV_NAME | ||
4677 | ": xor_mode param is irrelevant in mode %s\n", | ||
4678 | bond_mode_name(bond_mode)); | ||
4679 | } else { | ||
4680 | xmit_hashtype = bond_parse_parm(xmit_hash_policy, | ||
4681 | xmit_hashtype_tbl); | ||
4682 | if (xmit_hashtype == -1) { | ||
4683 | printk(KERN_ERR DRV_NAME | ||
4684 | ": Error: Invalid xmit_hash_policy \"%s\"\n", | ||
4685 | xmit_hash_policy == NULL ? "NULL" : | ||
4686 | xmit_hash_policy); | ||
4687 | return -EINVAL; | ||
4688 | } | ||
4689 | } | ||
4690 | } | ||
4691 | |||
4387 | if (lacp_rate) { | 4692 | if (lacp_rate) { |
4388 | if (bond_mode != BOND_MODE_8023AD) { | 4693 | if (bond_mode != BOND_MODE_8023AD) { |
4389 | printk(KERN_INFO DRV_NAME | 4694 | printk(KERN_INFO DRV_NAME |
@@ -4595,6 +4900,7 @@ static int bond_check_params(struct bond_params *params) | |||
4595 | 4900 | ||
4596 | /* fill params struct with the proper values */ | 4901 | /* fill params struct with the proper values */ |
4597 | params->mode = bond_mode; | 4902 | params->mode = bond_mode; |
4903 | params->xmit_policy = xmit_hashtype; | ||
4598 | params->miimon = miimon; | 4904 | params->miimon = miimon; |
4599 | params->arp_interval = arp_interval; | 4905 | params->arp_interval = arp_interval; |
4600 | params->updelay = updelay; | 4906 | params->updelay = updelay; |
@@ -4669,6 +4975,7 @@ static int __init bonding_init(void) | |||
4669 | 4975 | ||
4670 | rtnl_unlock(); | 4976 | rtnl_unlock(); |
4671 | register_netdevice_notifier(&bond_netdev_notifier); | 4977 | register_netdevice_notifier(&bond_netdev_notifier); |
4978 | register_inetaddr_notifier(&bond_inetaddr_notifier); | ||
4672 | 4979 | ||
4673 | return 0; | 4980 | return 0; |
4674 | 4981 | ||
@@ -4684,6 +4991,7 @@ out_err: | |||
4684 | static void __exit bonding_exit(void) | 4991 | static void __exit bonding_exit(void) |
4685 | { | 4992 | { |
4686 | unregister_netdevice_notifier(&bond_netdev_notifier); | 4993 | unregister_netdevice_notifier(&bond_netdev_notifier); |
4994 | unregister_inetaddr_notifier(&bond_inetaddr_notifier); | ||
4687 | 4995 | ||
4688 | rtnl_lock(); | 4996 | rtnl_lock(); |
4689 | bond_free_all(); | 4997 | bond_free_all(); |
diff --git a/drivers/net/bonding/bonding.h b/drivers/net/bonding/bonding.h index 8c325308489d..d27f377b3eeb 100644 --- a/drivers/net/bonding/bonding.h +++ b/drivers/net/bonding/bonding.h | |||
@@ -25,6 +25,10 @@ | |||
25 | * | 25 | * |
26 | * 2003/12/01 - Shmulik Hen <shmulik.hen at intel dot com> | 26 | * 2003/12/01 - Shmulik Hen <shmulik.hen at intel dot com> |
27 | * - Code cleanup and style changes | 27 | * - Code cleanup and style changes |
28 | * | ||
29 | * 2005/05/05 - Jason Gabler <jygabler at lbl dot gov> | ||
30 | * - added "xmit_policy" kernel parameter for alternate hashing policy | ||
31 | * support for mode 2 | ||
28 | */ | 32 | */ |
29 | 33 | ||
30 | #ifndef _LINUX_BONDING_H | 34 | #ifndef _LINUX_BONDING_H |
@@ -36,8 +40,8 @@ | |||
36 | #include "bond_3ad.h" | 40 | #include "bond_3ad.h" |
37 | #include "bond_alb.h" | 41 | #include "bond_alb.h" |
38 | 42 | ||
39 | #define DRV_VERSION "2.6.1" | 43 | #define DRV_VERSION "2.6.3" |
40 | #define DRV_RELDATE "October 29, 2004" | 44 | #define DRV_RELDATE "June 8, 2005" |
41 | #define DRV_NAME "bonding" | 45 | #define DRV_NAME "bonding" |
42 | #define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" | 46 | #define DRV_DESCRIPTION "Ethernet Channel Bonding Driver" |
43 | 47 | ||
@@ -137,6 +141,7 @@ | |||
137 | 141 | ||
138 | struct bond_params { | 142 | struct bond_params { |
139 | int mode; | 143 | int mode; |
144 | int xmit_policy; | ||
140 | int miimon; | 145 | int miimon; |
141 | int arp_interval; | 146 | int arp_interval; |
142 | int use_carrier; | 147 | int use_carrier; |
@@ -149,6 +154,7 @@ struct bond_params { | |||
149 | 154 | ||
150 | struct vlan_entry { | 155 | struct vlan_entry { |
151 | struct list_head vlan_list; | 156 | struct list_head vlan_list; |
157 | u32 vlan_ip; | ||
152 | unsigned short vlan_id; | 158 | unsigned short vlan_id; |
153 | }; | 159 | }; |
154 | 160 | ||
@@ -197,6 +203,8 @@ struct bonding { | |||
197 | #endif /* CONFIG_PROC_FS */ | 203 | #endif /* CONFIG_PROC_FS */ |
198 | struct list_head bond_list; | 204 | struct list_head bond_list; |
199 | struct dev_mc_list *mc_list; | 205 | struct dev_mc_list *mc_list; |
206 | int (*xmit_hash_policy)(struct sk_buff *, struct net_device *, int); | ||
207 | u32 master_ip; | ||
200 | u16 flags; | 208 | u16 flags; |
201 | struct ad_bond_info ad_info; | 209 | struct ad_bond_info ad_info; |
202 | struct alb_bond_info alb_info; | 210 | struct alb_bond_info alb_info; |
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c index 5c5f540da26a..b96d6fb1929e 100644 --- a/drivers/net/cs89x0.c +++ b/drivers/net/cs89x0.c | |||
@@ -174,6 +174,13 @@ static unsigned int cs8900_irq_map[] = {1,0,0,0}; | |||
174 | #include <asm/irq.h> | 174 | #include <asm/irq.h> |
175 | static unsigned int netcard_portlist[] __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0}; | 175 | static unsigned int netcard_portlist[] __initdata = {IXDP2X01_CS8900_VIRT_BASE, 0}; |
176 | static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0}; | 176 | static unsigned int cs8900_irq_map[] = {IRQ_IXDP2X01_CS8900, 0, 0, 0}; |
177 | #elif defined(CONFIG_ARCH_PNX0105) | ||
178 | #include <asm/irq.h> | ||
179 | #include <asm/arch/gpio.h> | ||
180 | #define CIRRUS_DEFAULT_BASE IO_ADDRESS(EXT_STATIC2_s0_BASE + 0x200000) /* = Physical address 0x48200000 */ | ||
181 | #define CIRRUS_DEFAULT_IRQ VH_INTC_INT_NUM_CASCADED_INTERRUPT_1 /* Event inputs bank 1 - ID 35/bit 3 */ | ||
182 | static unsigned int netcard_portlist[] __initdata = {CIRRUS_DEFAULT_BASE, 0}; | ||
183 | static unsigned int cs8900_irq_map[] = {CIRRUS_DEFAULT_IRQ, 0, 0, 0}; | ||
177 | #else | 184 | #else |
178 | static unsigned int netcard_portlist[] __initdata = | 185 | static unsigned int netcard_portlist[] __initdata = |
179 | { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; | 186 | { 0x300, 0x320, 0x340, 0x360, 0x200, 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x2e0, 0}; |
@@ -319,13 +326,7 @@ struct net_device * __init cs89x0_probe(int unit) | |||
319 | } | 326 | } |
320 | if (err) | 327 | if (err) |
321 | goto out; | 328 | goto out; |
322 | err = register_netdev(dev); | ||
323 | if (err) | ||
324 | goto out1; | ||
325 | return dev; | 329 | return dev; |
326 | out1: | ||
327 | outw(PP_ChipID, dev->base_addr + ADD_PORT); | ||
328 | release_region(dev->base_addr, NETCARD_IO_EXTENT); | ||
329 | out: | 330 | out: |
330 | free_netdev(dev); | 331 | free_netdev(dev); |
331 | printk(KERN_WARNING "cs89x0: no cs8900 or cs8920 detected. Be sure to disable PnP with SETUP\n"); | 332 | printk(KERN_WARNING "cs89x0: no cs8900 or cs8920 detected. Be sure to disable PnP with SETUP\n"); |
@@ -437,6 +438,30 @@ cs89x0_probe1(struct net_device *dev, int ioaddr, int modular) | |||
437 | #endif | 438 | #endif |
438 | } | 439 | } |
439 | 440 | ||
441 | #ifdef CONFIG_ARCH_PNX0105 | ||
442 | initialize_ebi(); | ||
443 | |||
444 | /* Map GPIO registers for the pins connected to the CS8900a. */ | ||
445 | if (map_cirrus_gpio() < 0) | ||
446 | return -ENODEV; | ||
447 | |||
448 | reset_cirrus(); | ||
449 | |||
450 | /* Map event-router registers. */ | ||
451 | if (map_event_router() < 0) | ||
452 | return -ENODEV; | ||
453 | |||
454 | enable_cirrus_irq(); | ||
455 | |||
456 | unmap_cirrus_gpio(); | ||
457 | unmap_event_router(); | ||
458 | |||
459 | dev->base_addr = ioaddr; | ||
460 | |||
461 | for (i = 0 ; i < 3 ; i++) | ||
462 | readreg(dev, 0); | ||
463 | #endif | ||
464 | |||
440 | /* Grab the region so we can find another board if autoIRQ fails. */ | 465 | /* Grab the region so we can find another board if autoIRQ fails. */ |
441 | /* WTF is going on here? */ | 466 | /* WTF is going on here? */ |
442 | if (!request_region(ioaddr & ~3, NETCARD_IO_EXTENT, DRV_NAME)) { | 467 | if (!request_region(ioaddr & ~3, NETCARD_IO_EXTENT, DRV_NAME)) { |
@@ -678,7 +703,7 @@ printk("PP_addr=0x%x\n", inw(ioaddr + ADD_PORT)); | |||
678 | } else { | 703 | } else { |
679 | i = lp->isa_config & INT_NO_MASK; | 704 | i = lp->isa_config & INT_NO_MASK; |
680 | if (lp->chip_type == CS8900) { | 705 | if (lp->chip_type == CS8900) { |
681 | #ifdef CONFIG_ARCH_IXDP2X01 | 706 | #if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105) |
682 | i = cs8900_irq_map[0]; | 707 | i = cs8900_irq_map[0]; |
683 | #else | 708 | #else |
684 | /* Translate the IRQ using the IRQ mapping table. */ | 709 | /* Translate the IRQ using the IRQ mapping table. */ |
@@ -735,7 +760,13 @@ printk("PP_addr=0x%x\n", inw(ioaddr + ADD_PORT)); | |||
735 | printk("\n"); | 760 | printk("\n"); |
736 | if (net_debug) | 761 | if (net_debug) |
737 | printk("cs89x0_probe1() successful\n"); | 762 | printk("cs89x0_probe1() successful\n"); |
763 | |||
764 | retval = register_netdev(dev); | ||
765 | if (retval) | ||
766 | goto out3; | ||
738 | return 0; | 767 | return 0; |
768 | out3: | ||
769 | outw(PP_ChipID, dev->base_addr + ADD_PORT); | ||
739 | out2: | 770 | out2: |
740 | release_region(ioaddr & ~3, NETCARD_IO_EXTENT); | 771 | release_region(ioaddr & ~3, NETCARD_IO_EXTENT); |
741 | out1: | 772 | out1: |
@@ -1145,7 +1176,7 @@ net_open(struct net_device *dev) | |||
1145 | int i; | 1176 | int i; |
1146 | int ret; | 1177 | int ret; |
1147 | 1178 | ||
1148 | #ifndef CONFIG_SH_HICOSH4 /* uses irq#1, so this won't work */ | 1179 | #if !defined(CONFIG_SH_HICOSH4) && !defined(CONFIG_ARCH_PNX0105) /* uses irq#1, so this won't work */ |
1149 | if (dev->irq < 2) { | 1180 | if (dev->irq < 2) { |
1150 | /* Allow interrupts to be generated by the chip */ | 1181 | /* Allow interrupts to be generated by the chip */ |
1151 | /* Cirrus' release had this: */ | 1182 | /* Cirrus' release had this: */ |
@@ -1176,7 +1207,7 @@ net_open(struct net_device *dev) | |||
1176 | else | 1207 | else |
1177 | #endif | 1208 | #endif |
1178 | { | 1209 | { |
1179 | #ifndef CONFIG_ARCH_IXDP2X01 | 1210 | #if !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX0105) |
1180 | if (((1 << dev->irq) & lp->irq_map) == 0) { | 1211 | if (((1 << dev->irq) & lp->irq_map) == 0) { |
1181 | printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n", | 1212 | printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n", |
1182 | dev->name, dev->irq, lp->irq_map); | 1213 | dev->name, dev->irq, lp->irq_map); |
@@ -1261,6 +1292,9 @@ net_open(struct net_device *dev) | |||
1261 | case A_CNF_MEDIA_10B_2: result = lp->adapter_cnf & A_CNF_10B_2; break; | 1292 | case A_CNF_MEDIA_10B_2: result = lp->adapter_cnf & A_CNF_10B_2; break; |
1262 | default: result = lp->adapter_cnf & (A_CNF_10B_T | A_CNF_AUI | A_CNF_10B_2); | 1293 | default: result = lp->adapter_cnf & (A_CNF_10B_T | A_CNF_AUI | A_CNF_10B_2); |
1263 | } | 1294 | } |
1295 | #ifdef CONFIG_ARCH_PNX0105 | ||
1296 | result = A_CNF_10B_T; | ||
1297 | #endif | ||
1264 | if (!result) { | 1298 | if (!result) { |
1265 | printk(KERN_ERR "%s: EEPROM is configured for unavailable media\n", dev->name); | 1299 | printk(KERN_ERR "%s: EEPROM is configured for unavailable media\n", dev->name); |
1266 | release_irq: | 1300 | release_irq: |
@@ -1831,13 +1865,6 @@ init_module(void) | |||
1831 | if (ret) | 1865 | if (ret) |
1832 | goto out; | 1866 | goto out; |
1833 | 1867 | ||
1834 | if (register_netdev(dev) != 0) { | ||
1835 | printk(KERN_ERR "cs89x0.c: No card found at 0x%x\n", io); | ||
1836 | ret = -ENXIO; | ||
1837 | outw(PP_ChipID, dev->base_addr + ADD_PORT); | ||
1838 | release_region(dev->base_addr, NETCARD_IO_EXTENT); | ||
1839 | goto out; | ||
1840 | } | ||
1841 | dev_cs89x0 = dev; | 1868 | dev_cs89x0 = dev; |
1842 | return 0; | 1869 | return 0; |
1843 | out: | 1870 | out: |
diff --git a/drivers/net/cs89x0.h b/drivers/net/cs89x0.h index b0ef7ad2baad..bd3ad8e6cce9 100644 --- a/drivers/net/cs89x0.h +++ b/drivers/net/cs89x0.h | |||
@@ -16,7 +16,7 @@ | |||
16 | 16 | ||
17 | #include <linux/config.h> | 17 | #include <linux/config.h> |
18 | 18 | ||
19 | #ifdef CONFIG_ARCH_IXDP2X01 | 19 | #if defined(CONFIG_ARCH_IXDP2X01) || defined(CONFIG_ARCH_PNX0105) |
20 | /* IXDP2401/IXDP2801 uses dword-aligned register addressing */ | 20 | /* IXDP2401/IXDP2801 uses dword-aligned register addressing */ |
21 | #define CS89x0_PORT(reg) ((reg) * 2) | 21 | #define CS89x0_PORT(reg) ((reg) * 2) |
22 | #else | 22 | #else |
diff --git a/drivers/net/defxx.c b/drivers/net/defxx.c index a6aa56598f27..5acd35c312ac 100644 --- a/drivers/net/defxx.c +++ b/drivers/net/defxx.c | |||
@@ -191,6 +191,7 @@ | |||
191 | * Feb 2001 davej PCI enable cleanups. | 191 | * Feb 2001 davej PCI enable cleanups. |
192 | * 04 Aug 2003 macro Converted to the DMA API. | 192 | * 04 Aug 2003 macro Converted to the DMA API. |
193 | * 14 Aug 2004 macro Fix device names reported. | 193 | * 14 Aug 2004 macro Fix device names reported. |
194 | * 14 Jun 2005 macro Use irqreturn_t. | ||
194 | */ | 195 | */ |
195 | 196 | ||
196 | /* Include files */ | 197 | /* Include files */ |
@@ -217,8 +218,8 @@ | |||
217 | 218 | ||
218 | /* Version information string should be updated prior to each new release! */ | 219 | /* Version information string should be updated prior to each new release! */ |
219 | #define DRV_NAME "defxx" | 220 | #define DRV_NAME "defxx" |
220 | #define DRV_VERSION "v1.07" | 221 | #define DRV_VERSION "v1.08" |
221 | #define DRV_RELDATE "2004/08/14" | 222 | #define DRV_RELDATE "2005/06/14" |
222 | 223 | ||
223 | static char version[] __devinitdata = | 224 | static char version[] __devinitdata = |
224 | DRV_NAME ": " DRV_VERSION " " DRV_RELDATE | 225 | DRV_NAME ": " DRV_VERSION " " DRV_RELDATE |
@@ -247,7 +248,8 @@ static int dfx_close(struct net_device *dev); | |||
247 | static void dfx_int_pr_halt_id(DFX_board_t *bp); | 248 | static void dfx_int_pr_halt_id(DFX_board_t *bp); |
248 | static void dfx_int_type_0_process(DFX_board_t *bp); | 249 | static void dfx_int_type_0_process(DFX_board_t *bp); |
249 | static void dfx_int_common(struct net_device *dev); | 250 | static void dfx_int_common(struct net_device *dev); |
250 | static void dfx_interrupt(int irq, void *dev_id, struct pt_regs *regs); | 251 | static irqreturn_t dfx_interrupt(int irq, void *dev_id, |
252 | struct pt_regs *regs); | ||
251 | 253 | ||
252 | static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev); | 254 | static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev); |
253 | static void dfx_ctl_set_multicast_list(struct net_device *dev); | 255 | static void dfx_ctl_set_multicast_list(struct net_device *dev); |
@@ -437,7 +439,8 @@ static int __devinit dfx_init_one_pci_or_eisa(struct pci_dev *pdev, long ioaddr) | |||
437 | } | 439 | } |
438 | 440 | ||
439 | SET_MODULE_OWNER(dev); | 441 | SET_MODULE_OWNER(dev); |
440 | SET_NETDEV_DEV(dev, &pdev->dev); | 442 | if (pdev != NULL) |
443 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
441 | 444 | ||
442 | bp = dev->priv; | 445 | bp = dev->priv; |
443 | 446 | ||
@@ -1225,7 +1228,7 @@ static int dfx_open(struct net_device *dev) | |||
1225 | 1228 | ||
1226 | /* Register IRQ - support shared interrupts by passing device ptr */ | 1229 | /* Register IRQ - support shared interrupts by passing device ptr */ |
1227 | 1230 | ||
1228 | ret = request_irq(dev->irq, (void *)dfx_interrupt, SA_SHIRQ, dev->name, dev); | 1231 | ret = request_irq(dev->irq, dfx_interrupt, SA_SHIRQ, dev->name, dev); |
1229 | if (ret) { | 1232 | if (ret) { |
1230 | printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq); | 1233 | printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq); |
1231 | return ret; | 1234 | return ret; |
@@ -1680,13 +1683,13 @@ static void dfx_int_common(struct net_device *dev) | |||
1680 | * ================= | 1683 | * ================= |
1681 | * = dfx_interrupt = | 1684 | * = dfx_interrupt = |
1682 | * ================= | 1685 | * ================= |
1683 | * | 1686 | * |
1684 | * Overview: | 1687 | * Overview: |
1685 | * Interrupt processing routine | 1688 | * Interrupt processing routine |
1686 | * | 1689 | * |
1687 | * Returns: | 1690 | * Returns: |
1688 | * None | 1691 | * Whether a valid interrupt was seen. |
1689 | * | 1692 | * |
1690 | * Arguments: | 1693 | * Arguments: |
1691 | * irq - interrupt vector | 1694 | * irq - interrupt vector |
1692 | * dev_id - pointer to device information | 1695 | * dev_id - pointer to device information |
@@ -1699,7 +1702,8 @@ static void dfx_int_common(struct net_device *dev) | |||
1699 | * structure context. | 1702 | * structure context. |
1700 | * | 1703 | * |
1701 | * Return Codes: | 1704 | * Return Codes: |
1702 | * None | 1705 | * IRQ_HANDLED - an IRQ was handled. |
1706 | * IRQ_NONE - no IRQ was handled. | ||
1703 | * | 1707 | * |
1704 | * Assumptions: | 1708 | * Assumptions: |
1705 | * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC | 1709 | * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC |
@@ -1712,60 +1716,70 @@ static void dfx_int_common(struct net_device *dev) | |||
1712 | * Interrupts are disabled, then reenabled at the adapter. | 1716 | * Interrupts are disabled, then reenabled at the adapter. |
1713 | */ | 1717 | */ |
1714 | 1718 | ||
1715 | static void dfx_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 1719 | static irqreturn_t dfx_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
1716 | { | 1720 | { |
1717 | struct net_device *dev = dev_id; | 1721 | struct net_device *dev = dev_id; |
1718 | DFX_board_t *bp; /* private board structure pointer */ | 1722 | DFX_board_t *bp; /* private board structure pointer */ |
1719 | u8 tmp; /* used for disabling/enabling ints */ | ||
1720 | 1723 | ||
1721 | /* Get board pointer only if device structure is valid */ | 1724 | /* Get board pointer only if device structure is valid */ |
1722 | 1725 | ||
1723 | bp = dev->priv; | 1726 | bp = dev->priv; |
1724 | 1727 | ||
1725 | spin_lock(&bp->lock); | ||
1726 | |||
1727 | /* See if we're already servicing an interrupt */ | 1728 | /* See if we're already servicing an interrupt */ |
1728 | 1729 | ||
1729 | /* Service adapter interrupts */ | 1730 | /* Service adapter interrupts */ |
1730 | 1731 | ||
1731 | if (bp->bus_type == DFX_BUS_TYPE_PCI) | 1732 | if (bp->bus_type == DFX_BUS_TYPE_PCI) { |
1732 | { | 1733 | u32 status; |
1733 | /* Disable PDQ-PFI interrupts at PFI */ | ||
1734 | 1734 | ||
1735 | dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, PFI_MODE_M_DMA_ENB); | 1735 | dfx_port_read_long(bp, PFI_K_REG_STATUS, &status); |
1736 | if (!(status & PFI_STATUS_M_PDQ_INT)) | ||
1737 | return IRQ_NONE; | ||
1736 | 1738 | ||
1737 | /* Call interrupt service routine for this adapter */ | 1739 | spin_lock(&bp->lock); |
1740 | |||
1741 | /* Disable PDQ-PFI interrupts at PFI */ | ||
1742 | dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, | ||
1743 | PFI_MODE_M_DMA_ENB); | ||
1738 | 1744 | ||
1745 | /* Call interrupt service routine for this adapter */ | ||
1739 | dfx_int_common(dev); | 1746 | dfx_int_common(dev); |
1740 | 1747 | ||
1741 | /* Clear PDQ interrupt status bit and reenable interrupts */ | 1748 | /* Clear PDQ interrupt status bit and reenable interrupts */ |
1742 | 1749 | dfx_port_write_long(bp, PFI_K_REG_STATUS, | |
1743 | dfx_port_write_long(bp, PFI_K_REG_STATUS, PFI_STATUS_M_PDQ_INT); | 1750 | PFI_STATUS_M_PDQ_INT); |
1744 | dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, | 1751 | dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, |
1745 | (PFI_MODE_M_PDQ_INT_ENB + PFI_MODE_M_DMA_ENB)); | 1752 | (PFI_MODE_M_PDQ_INT_ENB | |
1746 | } | 1753 | PFI_MODE_M_DMA_ENB)); |
1747 | else | ||
1748 | { | ||
1749 | /* Disable interrupts at the ESIC */ | ||
1750 | 1754 | ||
1751 | dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &tmp); | 1755 | spin_unlock(&bp->lock); |
1752 | tmp &= ~PI_CONFIG_STAT_0_M_INT_ENB; | 1756 | } else { |
1753 | dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp); | 1757 | u8 status; |
1754 | 1758 | ||
1755 | /* Call interrupt service routine for this adapter */ | 1759 | dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &status); |
1760 | if (!(status & PI_CONFIG_STAT_0_M_PEND)) | ||
1761 | return IRQ_NONE; | ||
1756 | 1762 | ||
1763 | spin_lock(&bp->lock); | ||
1764 | |||
1765 | /* Disable interrupts at the ESIC */ | ||
1766 | status &= ~PI_CONFIG_STAT_0_M_INT_ENB; | ||
1767 | dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, status); | ||
1768 | |||
1769 | /* Call interrupt service routine for this adapter */ | ||
1757 | dfx_int_common(dev); | 1770 | dfx_int_common(dev); |
1758 | 1771 | ||
1759 | /* Reenable interrupts at the ESIC */ | 1772 | /* Reenable interrupts at the ESIC */ |
1773 | dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &status); | ||
1774 | status |= PI_CONFIG_STAT_0_M_INT_ENB; | ||
1775 | dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, status); | ||
1760 | 1776 | ||
1761 | dfx_port_read_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, &tmp); | 1777 | spin_unlock(&bp->lock); |
1762 | tmp |= PI_CONFIG_STAT_0_M_INT_ENB; | ||
1763 | dfx_port_write_byte(bp, PI_ESIC_K_IO_CONFIG_STAT_0, tmp); | ||
1764 | } | ||
1765 | |||
1766 | spin_unlock(&bp->lock); | ||
1767 | } | 1778 | } |
1768 | 1779 | ||
1780 | return IRQ_HANDLED; | ||
1781 | } | ||
1782 | |||
1769 | 1783 | ||
1770 | /* | 1784 | /* |
1771 | * ===================== | 1785 | * ===================== |
diff --git a/drivers/net/dl2k.c b/drivers/net/dl2k.c index aa42b7a27735..430c628279b3 100644 --- a/drivers/net/dl2k.c +++ b/drivers/net/dl2k.c | |||
@@ -547,7 +547,7 @@ rio_timer (unsigned long data) | |||
547 | skb_reserve (skb, 2); | 547 | skb_reserve (skb, 2); |
548 | np->rx_ring[entry].fraginfo = | 548 | np->rx_ring[entry].fraginfo = |
549 | cpu_to_le64 (pci_map_single | 549 | cpu_to_le64 (pci_map_single |
550 | (np->pdev, skb->tail, np->rx_buf_sz, | 550 | (np->pdev, skb->data, np->rx_buf_sz, |
551 | PCI_DMA_FROMDEVICE)); | 551 | PCI_DMA_FROMDEVICE)); |
552 | } | 552 | } |
553 | np->rx_ring[entry].fraginfo |= | 553 | np->rx_ring[entry].fraginfo |= |
@@ -618,7 +618,7 @@ alloc_list (struct net_device *dev) | |||
618 | /* Rubicon now supports 40 bits of addressing space. */ | 618 | /* Rubicon now supports 40 bits of addressing space. */ |
619 | np->rx_ring[i].fraginfo = | 619 | np->rx_ring[i].fraginfo = |
620 | cpu_to_le64 ( pci_map_single ( | 620 | cpu_to_le64 ( pci_map_single ( |
621 | np->pdev, skb->tail, np->rx_buf_sz, | 621 | np->pdev, skb->data, np->rx_buf_sz, |
622 | PCI_DMA_FROMDEVICE)); | 622 | PCI_DMA_FROMDEVICE)); |
623 | np->rx_ring[i].fraginfo |= cpu_to_le64 (np->rx_buf_sz) << 48; | 623 | np->rx_ring[i].fraginfo |= cpu_to_le64 (np->rx_buf_sz) << 48; |
624 | } | 624 | } |
@@ -906,7 +906,7 @@ receive_packet (struct net_device *dev) | |||
906 | /* 16 byte align the IP header */ | 906 | /* 16 byte align the IP header */ |
907 | skb_reserve (skb, 2); | 907 | skb_reserve (skb, 2); |
908 | eth_copy_and_sum (skb, | 908 | eth_copy_and_sum (skb, |
909 | np->rx_skbuff[entry]->tail, | 909 | np->rx_skbuff[entry]->data, |
910 | pkt_len, 0); | 910 | pkt_len, 0); |
911 | skb_put (skb, pkt_len); | 911 | skb_put (skb, pkt_len); |
912 | pci_dma_sync_single_for_device(np->pdev, | 912 | pci_dma_sync_single_for_device(np->pdev, |
@@ -950,7 +950,7 @@ receive_packet (struct net_device *dev) | |||
950 | skb_reserve (skb, 2); | 950 | skb_reserve (skb, 2); |
951 | np->rx_ring[entry].fraginfo = | 951 | np->rx_ring[entry].fraginfo = |
952 | cpu_to_le64 (pci_map_single | 952 | cpu_to_le64 (pci_map_single |
953 | (np->pdev, skb->tail, np->rx_buf_sz, | 953 | (np->pdev, skb->data, np->rx_buf_sz, |
954 | PCI_DMA_FROMDEVICE)); | 954 | PCI_DMA_FROMDEVICE)); |
955 | } | 955 | } |
956 | np->rx_ring[entry].fraginfo |= | 956 | np->rx_ring[entry].fraginfo |= |
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c new file mode 100644 index 000000000000..5fddc0ff8878 --- /dev/null +++ b/drivers/net/dm9000.c | |||
@@ -0,0 +1,1219 @@ | |||
1 | /* | ||
2 | * dm9000.c: Version 1.2 03/18/2003 | ||
3 | * | ||
4 | * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux. | ||
5 | * Copyright (C) 1997 Sten Wang | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version 2 | ||
10 | * of the License, or (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved. | ||
18 | * | ||
19 | * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match | ||
20 | * 06/22/2001 Support DM9801 progrmming | ||
21 | * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000 | ||
22 | * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200 | ||
23 | * R17 = (R17 & 0xfff0) | NF + 3 | ||
24 | * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200 | ||
25 | * R17 = (R17 & 0xfff0) | NF | ||
26 | * | ||
27 | * v1.00 modify by simon 2001.9.5 | ||
28 | * change for kernel 2.4.x | ||
29 | * | ||
30 | * v1.1 11/09/2001 fix force mode bug | ||
31 | * | ||
32 | * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>: | ||
33 | * Fixed phy reset. | ||
34 | * Added tx/rx 32 bit mode. | ||
35 | * Cleaned up for kernel merge. | ||
36 | * | ||
37 | * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de> | ||
38 | * Port to 2.6 kernel | ||
39 | * | ||
40 | * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk> | ||
41 | * Cleanup of code to remove ifdefs | ||
42 | * Allowed platform device data to influence access width | ||
43 | * Reformatting areas of code | ||
44 | * | ||
45 | * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de> | ||
46 | * * removed 2.4 style module parameters | ||
47 | * * removed removed unused stat counter and fixed | ||
48 | * net_device_stats | ||
49 | * * introduced tx_timeout function | ||
50 | * * reworked locking | ||
51 | */ | ||
52 | |||
53 | #include <linux/module.h> | ||
54 | #include <linux/ioport.h> | ||
55 | #include <linux/netdevice.h> | ||
56 | #include <linux/etherdevice.h> | ||
57 | #include <linux/init.h> | ||
58 | #include <linux/skbuff.h> | ||
59 | #include <linux/version.h> | ||
60 | #include <linux/spinlock.h> | ||
61 | #include <linux/crc32.h> | ||
62 | #include <linux/mii.h> | ||
63 | #include <linux/dm9000.h> | ||
64 | #include <linux/delay.h> | ||
65 | |||
66 | #include <asm/delay.h> | ||
67 | #include <asm/irq.h> | ||
68 | #include <asm/io.h> | ||
69 | |||
70 | #include "dm9000.h" | ||
71 | |||
72 | /* Board/System/Debug information/definition ---------------- */ | ||
73 | |||
74 | #define DM9000_PHY 0x40 /* PHY address 0x01 */ | ||
75 | |||
76 | #define TRUE 1 | ||
77 | #define FALSE 0 | ||
78 | |||
79 | #define CARDNAME "dm9000" | ||
80 | #define PFX CARDNAME ": " | ||
81 | |||
82 | #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */ | ||
83 | |||
84 | #define DM9000_DEBUG 0 | ||
85 | |||
86 | #if DM9000_DEBUG > 2 | ||
87 | #define PRINTK3(args...) printk(CARDNAME ": " args) | ||
88 | #else | ||
89 | #define PRINTK3(args...) do { } while(0) | ||
90 | #endif | ||
91 | |||
92 | #if DM9000_DEBUG > 1 | ||
93 | #define PRINTK2(args...) printk(CARDNAME ": " args) | ||
94 | #else | ||
95 | #define PRINTK2(args...) do { } while(0) | ||
96 | #endif | ||
97 | |||
98 | #if DM9000_DEBUG > 0 | ||
99 | #define PRINTK1(args...) printk(CARDNAME ": " args) | ||
100 | #define PRINTK(args...) printk(CARDNAME ": " args) | ||
101 | #else | ||
102 | #define PRINTK1(args...) do { } while(0) | ||
103 | #define PRINTK(args...) printk(KERN_DEBUG args) | ||
104 | #endif | ||
105 | |||
106 | /* | ||
107 | * Transmit timeout, default 5 seconds. | ||
108 | */ | ||
109 | static int watchdog = 5000; | ||
110 | module_param(watchdog, int, 0400); | ||
111 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | ||
112 | |||
113 | /* Structure/enum declaration ------------------------------- */ | ||
114 | typedef struct board_info { | ||
115 | |||
116 | void __iomem *io_addr; /* Register I/O base address */ | ||
117 | void __iomem *io_data; /* Data I/O address */ | ||
118 | u16 irq; /* IRQ */ | ||
119 | |||
120 | u16 tx_pkt_cnt; | ||
121 | u16 queue_pkt_len; | ||
122 | u16 queue_start_addr; | ||
123 | u16 dbug_cnt; | ||
124 | u8 io_mode; /* 0:word, 2:byte */ | ||
125 | u8 phy_addr; | ||
126 | |||
127 | void (*inblk)(void __iomem *port, void *data, int length); | ||
128 | void (*outblk)(void __iomem *port, void *data, int length); | ||
129 | void (*dumpblk)(void __iomem *port, int length); | ||
130 | |||
131 | struct resource *addr_res; /* resources found */ | ||
132 | struct resource *data_res; | ||
133 | struct resource *addr_req; /* resources requested */ | ||
134 | struct resource *data_req; | ||
135 | struct resource *irq_res; | ||
136 | |||
137 | struct timer_list timer; | ||
138 | struct net_device_stats stats; | ||
139 | unsigned char srom[128]; | ||
140 | spinlock_t lock; | ||
141 | |||
142 | struct mii_if_info mii; | ||
143 | u32 msg_enable; | ||
144 | } board_info_t; | ||
145 | |||
146 | /* function declaration ------------------------------------- */ | ||
147 | static int dm9000_probe(struct device *); | ||
148 | static int dm9000_open(struct net_device *); | ||
149 | static int dm9000_start_xmit(struct sk_buff *, struct net_device *); | ||
150 | static int dm9000_stop(struct net_device *); | ||
151 | static int dm9000_do_ioctl(struct net_device *, struct ifreq *, int); | ||
152 | |||
153 | |||
154 | static void dm9000_timer(unsigned long); | ||
155 | static void dm9000_init_dm9000(struct net_device *); | ||
156 | |||
157 | static struct net_device_stats *dm9000_get_stats(struct net_device *); | ||
158 | |||
159 | static irqreturn_t dm9000_interrupt(int, void *, struct pt_regs *); | ||
160 | |||
161 | static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg); | ||
162 | static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, | ||
163 | int value); | ||
164 | static u16 read_srom_word(board_info_t *, int); | ||
165 | static void dm9000_rx(struct net_device *); | ||
166 | static void dm9000_hash_table(struct net_device *); | ||
167 | |||
168 | //#define DM9000_PROGRAM_EEPROM | ||
169 | #ifdef DM9000_PROGRAM_EEPROM | ||
170 | static void program_eeprom(board_info_t * db); | ||
171 | #endif | ||
172 | /* DM9000 network board routine ---------------------------- */ | ||
173 | |||
174 | static void | ||
175 | dm9000_reset(board_info_t * db) | ||
176 | { | ||
177 | PRINTK1("dm9000x: resetting\n"); | ||
178 | /* RESET device */ | ||
179 | writeb(DM9000_NCR, db->io_addr); | ||
180 | udelay(200); | ||
181 | writeb(NCR_RST, db->io_data); | ||
182 | udelay(200); | ||
183 | } | ||
184 | |||
185 | /* | ||
186 | * Read a byte from I/O port | ||
187 | */ | ||
188 | static u8 | ||
189 | ior(board_info_t * db, int reg) | ||
190 | { | ||
191 | writeb(reg, db->io_addr); | ||
192 | return readb(db->io_data); | ||
193 | } | ||
194 | |||
195 | /* | ||
196 | * Write a byte to I/O port | ||
197 | */ | ||
198 | |||
199 | static void | ||
200 | iow(board_info_t * db, int reg, int value) | ||
201 | { | ||
202 | writeb(reg, db->io_addr); | ||
203 | writeb(value, db->io_data); | ||
204 | } | ||
205 | |||
206 | /* routines for sending block to chip */ | ||
207 | |||
208 | static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count) | ||
209 | { | ||
210 | writesb(reg, data, count); | ||
211 | } | ||
212 | |||
213 | static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count) | ||
214 | { | ||
215 | writesw(reg, data, (count+1) >> 1); | ||
216 | } | ||
217 | |||
218 | static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count) | ||
219 | { | ||
220 | writesl(reg, data, (count+3) >> 2); | ||
221 | } | ||
222 | |||
223 | /* input block from chip to memory */ | ||
224 | |||
225 | static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count) | ||
226 | { | ||
227 | readsb(reg, data, count); | ||
228 | } | ||
229 | |||
230 | |||
231 | static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count) | ||
232 | { | ||
233 | readsw(reg, data, (count+1) >> 1); | ||
234 | } | ||
235 | |||
236 | static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count) | ||
237 | { | ||
238 | readsl(reg, data, (count+3) >> 2); | ||
239 | } | ||
240 | |||
241 | /* dump block from chip to null */ | ||
242 | |||
243 | static void dm9000_dumpblk_8bit(void __iomem *reg, int count) | ||
244 | { | ||
245 | int i; | ||
246 | int tmp; | ||
247 | |||
248 | for (i = 0; i < count; i++) | ||
249 | tmp = readb(reg); | ||
250 | } | ||
251 | |||
252 | static void dm9000_dumpblk_16bit(void __iomem *reg, int count) | ||
253 | { | ||
254 | int i; | ||
255 | int tmp; | ||
256 | |||
257 | count = (count + 1) >> 1; | ||
258 | |||
259 | for (i = 0; i < count; i++) | ||
260 | tmp = readw(reg); | ||
261 | } | ||
262 | |||
263 | static void dm9000_dumpblk_32bit(void __iomem *reg, int count) | ||
264 | { | ||
265 | int i; | ||
266 | int tmp; | ||
267 | |||
268 | count = (count + 3) >> 2; | ||
269 | |||
270 | for (i = 0; i < count; i++) | ||
271 | tmp = readl(reg); | ||
272 | } | ||
273 | |||
274 | /* dm9000_set_io | ||
275 | * | ||
276 | * select the specified set of io routines to use with the | ||
277 | * device | ||
278 | */ | ||
279 | |||
280 | static void dm9000_set_io(struct board_info *db, int byte_width) | ||
281 | { | ||
282 | /* use the size of the data resource to work out what IO | ||
283 | * routines we want to use | ||
284 | */ | ||
285 | |||
286 | switch (byte_width) { | ||
287 | case 1: | ||
288 | db->dumpblk = dm9000_dumpblk_8bit; | ||
289 | db->outblk = dm9000_outblk_8bit; | ||
290 | db->inblk = dm9000_inblk_8bit; | ||
291 | break; | ||
292 | |||
293 | case 2: | ||
294 | db->dumpblk = dm9000_dumpblk_16bit; | ||
295 | db->outblk = dm9000_outblk_16bit; | ||
296 | db->inblk = dm9000_inblk_16bit; | ||
297 | break; | ||
298 | |||
299 | case 3: | ||
300 | printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n"); | ||
301 | db->dumpblk = dm9000_dumpblk_16bit; | ||
302 | db->outblk = dm9000_outblk_16bit; | ||
303 | db->inblk = dm9000_inblk_16bit; | ||
304 | break; | ||
305 | |||
306 | case 4: | ||
307 | default: | ||
308 | db->dumpblk = dm9000_dumpblk_32bit; | ||
309 | db->outblk = dm9000_outblk_32bit; | ||
310 | db->inblk = dm9000_inblk_32bit; | ||
311 | break; | ||
312 | } | ||
313 | } | ||
314 | |||
315 | |||
316 | /* Our watchdog timed out. Called by the networking layer */ | ||
317 | static void dm9000_timeout(struct net_device *dev) | ||
318 | { | ||
319 | board_info_t *db = (board_info_t *) dev->priv; | ||
320 | u8 reg_save; | ||
321 | unsigned long flags; | ||
322 | |||
323 | /* Save previous register address */ | ||
324 | reg_save = readb(db->io_addr); | ||
325 | spin_lock_irqsave(db->lock,flags); | ||
326 | |||
327 | netif_stop_queue(dev); | ||
328 | dm9000_reset(db); | ||
329 | dm9000_init_dm9000(dev); | ||
330 | /* We can accept TX packets again */ | ||
331 | dev->trans_start = jiffies; | ||
332 | netif_wake_queue(dev); | ||
333 | |||
334 | /* Restore previous register address */ | ||
335 | writeb(reg_save, db->io_addr); | ||
336 | spin_unlock_irqrestore(db->lock,flags); | ||
337 | } | ||
338 | |||
339 | |||
340 | /* dm9000_release_board | ||
341 | * | ||
342 | * release a board, and any mapped resources | ||
343 | */ | ||
344 | |||
345 | static void | ||
346 | dm9000_release_board(struct platform_device *pdev, struct board_info *db) | ||
347 | { | ||
348 | if (db->data_res == NULL) { | ||
349 | if (db->addr_res != NULL) | ||
350 | release_mem_region((unsigned long)db->io_addr, 4); | ||
351 | return; | ||
352 | } | ||
353 | |||
354 | /* unmap our resources */ | ||
355 | |||
356 | iounmap(db->io_addr); | ||
357 | iounmap(db->io_data); | ||
358 | |||
359 | /* release the resources */ | ||
360 | |||
361 | if (db->data_req != NULL) { | ||
362 | release_resource(db->data_req); | ||
363 | kfree(db->data_req); | ||
364 | } | ||
365 | |||
366 | if (db->addr_res != NULL) { | ||
367 | release_resource(db->addr_res); | ||
368 | kfree(db->addr_req); | ||
369 | } | ||
370 | } | ||
371 | |||
372 | #define res_size(_r) (((_r)->end - (_r)->start) + 1) | ||
373 | |||
374 | /* | ||
375 | * Search DM9000 board, allocate space and register it | ||
376 | */ | ||
377 | static int | ||
378 | dm9000_probe(struct device *dev) | ||
379 | { | ||
380 | struct platform_device *pdev = to_platform_device(dev); | ||
381 | struct dm9000_plat_data *pdata = pdev->dev.platform_data; | ||
382 | struct board_info *db; /* Point a board information structure */ | ||
383 | struct net_device *ndev; | ||
384 | unsigned long base; | ||
385 | int ret = 0; | ||
386 | int iosize; | ||
387 | int i; | ||
388 | u32 id_val; | ||
389 | |||
390 | printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME); | ||
391 | |||
392 | /* Init network device */ | ||
393 | ndev = alloc_etherdev(sizeof (struct board_info)); | ||
394 | if (!ndev) { | ||
395 | printk("%s: could not allocate device.\n", CARDNAME); | ||
396 | return -ENOMEM; | ||
397 | } | ||
398 | |||
399 | SET_MODULE_OWNER(ndev); | ||
400 | SET_NETDEV_DEV(ndev, dev); | ||
401 | |||
402 | PRINTK2("dm9000_probe()"); | ||
403 | |||
404 | /* setup board info structure */ | ||
405 | db = (struct board_info *) ndev->priv; | ||
406 | memset(db, 0, sizeof (*db)); | ||
407 | |||
408 | if (pdev->num_resources < 2) { | ||
409 | ret = -ENODEV; | ||
410 | goto out; | ||
411 | } | ||
412 | |||
413 | switch (pdev->num_resources) { | ||
414 | case 2: | ||
415 | base = pdev->resource[0].start; | ||
416 | |||
417 | if (!request_mem_region(base, 4, ndev->name)) { | ||
418 | ret = -EBUSY; | ||
419 | goto out; | ||
420 | } | ||
421 | |||
422 | ndev->base_addr = base; | ||
423 | ndev->irq = pdev->resource[1].start; | ||
424 | db->io_addr = (void *)base; | ||
425 | db->io_data = (void *)(base + 4); | ||
426 | |||
427 | break; | ||
428 | |||
429 | case 3: | ||
430 | db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
431 | db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
432 | db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
433 | |||
434 | if (db->addr_res == NULL || db->data_res == NULL) { | ||
435 | printk(KERN_ERR PFX "insufficient resources\n"); | ||
436 | ret = -ENOENT; | ||
437 | goto out; | ||
438 | } | ||
439 | |||
440 | i = res_size(db->addr_res); | ||
441 | db->addr_req = request_mem_region(db->addr_res->start, i, | ||
442 | pdev->name); | ||
443 | |||
444 | if (db->addr_req == NULL) { | ||
445 | printk(KERN_ERR PFX "cannot claim address reg area\n"); | ||
446 | ret = -EIO; | ||
447 | goto out; | ||
448 | } | ||
449 | |||
450 | db->io_addr = ioremap(db->addr_res->start, i); | ||
451 | |||
452 | if (db->io_addr == NULL) { | ||
453 | printk(KERN_ERR "failed to ioremap address reg\n"); | ||
454 | ret = -EINVAL; | ||
455 | goto out; | ||
456 | } | ||
457 | |||
458 | iosize = res_size(db->data_res); | ||
459 | db->data_req = request_mem_region(db->data_res->start, iosize, | ||
460 | pdev->name); | ||
461 | |||
462 | if (db->data_req == NULL) { | ||
463 | printk(KERN_ERR PFX "cannot claim data reg area\n"); | ||
464 | ret = -EIO; | ||
465 | goto out; | ||
466 | } | ||
467 | |||
468 | db->io_data = ioremap(db->data_res->start, iosize); | ||
469 | |||
470 | if (db->io_data == NULL) { | ||
471 | printk(KERN_ERR "failed to ioremap data reg\n"); | ||
472 | ret = -EINVAL; | ||
473 | goto out; | ||
474 | } | ||
475 | |||
476 | /* fill in parameters for net-dev structure */ | ||
477 | |||
478 | ndev->base_addr = (unsigned long)db->io_addr; | ||
479 | ndev->irq = db->irq_res->start; | ||
480 | |||
481 | /* ensure at least we have a default set of IO routines */ | ||
482 | dm9000_set_io(db, iosize); | ||
483 | |||
484 | } | ||
485 | |||
486 | /* check to see if anything is being over-ridden */ | ||
487 | if (pdata != NULL) { | ||
488 | /* check to see if the driver wants to over-ride the | ||
489 | * default IO width */ | ||
490 | |||
491 | if (pdata->flags & DM9000_PLATF_8BITONLY) | ||
492 | dm9000_set_io(db, 1); | ||
493 | |||
494 | if (pdata->flags & DM9000_PLATF_16BITONLY) | ||
495 | dm9000_set_io(db, 2); | ||
496 | |||
497 | if (pdata->flags & DM9000_PLATF_32BITONLY) | ||
498 | dm9000_set_io(db, 4); | ||
499 | |||
500 | /* check to see if there are any IO routine | ||
501 | * over-rides */ | ||
502 | |||
503 | if (pdata->inblk != NULL) | ||
504 | db->inblk = pdata->inblk; | ||
505 | |||
506 | if (pdata->outblk != NULL) | ||
507 | db->outblk = pdata->outblk; | ||
508 | |||
509 | if (pdata->dumpblk != NULL) | ||
510 | db->dumpblk = pdata->dumpblk; | ||
511 | } | ||
512 | |||
513 | dm9000_reset(db); | ||
514 | |||
515 | /* try two times, DM9000 sometimes gets the first read wrong */ | ||
516 | for (i = 0; i < 2; i++) { | ||
517 | id_val = ior(db, DM9000_VIDL); | ||
518 | id_val |= (u32)ior(db, DM9000_VIDH) << 8; | ||
519 | id_val |= (u32)ior(db, DM9000_PIDL) << 16; | ||
520 | id_val |= (u32)ior(db, DM9000_PIDH) << 24; | ||
521 | |||
522 | if (id_val == DM9000_ID) | ||
523 | break; | ||
524 | printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val); | ||
525 | } | ||
526 | |||
527 | if (id_val != DM9000_ID) { | ||
528 | printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val); | ||
529 | goto release; | ||
530 | } | ||
531 | |||
532 | /* from this point we assume that we have found a DM9000 */ | ||
533 | |||
534 | /* driver system function */ | ||
535 | ether_setup(ndev); | ||
536 | |||
537 | ndev->open = &dm9000_open; | ||
538 | ndev->hard_start_xmit = &dm9000_start_xmit; | ||
539 | ndev->tx_timeout = &dm9000_timeout; | ||
540 | ndev->watchdog_timeo = msecs_to_jiffies(watchdog); | ||
541 | ndev->stop = &dm9000_stop; | ||
542 | ndev->get_stats = &dm9000_get_stats; | ||
543 | ndev->set_multicast_list = &dm9000_hash_table; | ||
544 | ndev->do_ioctl = &dm9000_do_ioctl; | ||
545 | |||
546 | #ifdef DM9000_PROGRAM_EEPROM | ||
547 | program_eeprom(db); | ||
548 | #endif | ||
549 | db->msg_enable = NETIF_MSG_LINK; | ||
550 | db->mii.phy_id_mask = 0x1f; | ||
551 | db->mii.reg_num_mask = 0x1f; | ||
552 | db->mii.force_media = 0; | ||
553 | db->mii.full_duplex = 0; | ||
554 | db->mii.dev = ndev; | ||
555 | db->mii.mdio_read = dm9000_phy_read; | ||
556 | db->mii.mdio_write = dm9000_phy_write; | ||
557 | |||
558 | /* Read SROM content */ | ||
559 | for (i = 0; i < 64; i++) | ||
560 | ((u16 *) db->srom)[i] = read_srom_word(db, i); | ||
561 | |||
562 | /* Set Node Address */ | ||
563 | for (i = 0; i < 6; i++) | ||
564 | ndev->dev_addr[i] = db->srom[i]; | ||
565 | |||
566 | if (!is_valid_ether_addr(ndev->dev_addr)) | ||
567 | printk("%s: Invalid ethernet MAC address. Please " | ||
568 | "set using ifconfig\n", ndev->name); | ||
569 | |||
570 | dev_set_drvdata(dev, ndev); | ||
571 | ret = register_netdev(ndev); | ||
572 | |||
573 | if (ret == 0) { | ||
574 | printk("%s: dm9000 at %p,%p IRQ %d MAC: ", | ||
575 | ndev->name, db->io_addr, db->io_data, ndev->irq); | ||
576 | for (i = 0; i < 5; i++) | ||
577 | printk("%02x:", ndev->dev_addr[i]); | ||
578 | printk("%02x\n", ndev->dev_addr[5]); | ||
579 | } | ||
580 | return 0; | ||
581 | |||
582 | release: | ||
583 | out: | ||
584 | printk("%s: not found (%d).\n", CARDNAME, ret); | ||
585 | |||
586 | dm9000_release_board(pdev, db); | ||
587 | kfree(ndev); | ||
588 | |||
589 | return ret; | ||
590 | } | ||
591 | |||
592 | /* | ||
593 | * Open the interface. | ||
594 | * The interface is opened whenever "ifconfig" actives it. | ||
595 | */ | ||
596 | static int | ||
597 | dm9000_open(struct net_device *dev) | ||
598 | { | ||
599 | board_info_t *db = (board_info_t *) dev->priv; | ||
600 | |||
601 | PRINTK2("entering dm9000_open\n"); | ||
602 | |||
603 | if (request_irq(dev->irq, &dm9000_interrupt, SA_SHIRQ, dev->name, dev)) | ||
604 | return -EAGAIN; | ||
605 | |||
606 | /* Initialize DM9000 board */ | ||
607 | dm9000_reset(db); | ||
608 | dm9000_init_dm9000(dev); | ||
609 | |||
610 | /* Init driver variable */ | ||
611 | db->dbug_cnt = 0; | ||
612 | |||
613 | /* set and active a timer process */ | ||
614 | init_timer(&db->timer); | ||
615 | db->timer.expires = DM9000_TIMER_WUT * 2; | ||
616 | db->timer.data = (unsigned long) dev; | ||
617 | db->timer.function = &dm9000_timer; | ||
618 | add_timer(&db->timer); | ||
619 | |||
620 | mii_check_media(&db->mii, netif_msg_link(db), 1); | ||
621 | netif_start_queue(dev); | ||
622 | |||
623 | return 0; | ||
624 | } | ||
625 | |||
626 | /* | ||
627 | * Initilize dm9000 board | ||
628 | */ | ||
629 | static void | ||
630 | dm9000_init_dm9000(struct net_device *dev) | ||
631 | { | ||
632 | board_info_t *db = (board_info_t *) dev->priv; | ||
633 | |||
634 | PRINTK1("entering %s\n",__FUNCTION__); | ||
635 | |||
636 | /* I/O mode */ | ||
637 | db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */ | ||
638 | |||
639 | /* GPIO0 on pre-activate PHY */ | ||
640 | iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */ | ||
641 | iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */ | ||
642 | iow(db, DM9000_GPR, 0); /* Enable PHY */ | ||
643 | |||
644 | /* Program operating register */ | ||
645 | iow(db, DM9000_TCR, 0); /* TX Polling clear */ | ||
646 | iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */ | ||
647 | iow(db, DM9000_FCR, 0xff); /* Flow Control */ | ||
648 | iow(db, DM9000_SMCR, 0); /* Special Mode */ | ||
649 | /* clear TX status */ | ||
650 | iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END); | ||
651 | iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */ | ||
652 | |||
653 | /* Set address filter table */ | ||
654 | dm9000_hash_table(dev); | ||
655 | |||
656 | /* Activate DM9000 */ | ||
657 | iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN); | ||
658 | /* Enable TX/RX interrupt mask */ | ||
659 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | ||
660 | |||
661 | /* Init Driver variable */ | ||
662 | db->tx_pkt_cnt = 0; | ||
663 | db->queue_pkt_len = 0; | ||
664 | dev->trans_start = 0; | ||
665 | spin_lock_init(&db->lock); | ||
666 | } | ||
667 | |||
668 | /* | ||
669 | * Hardware start transmission. | ||
670 | * Send a packet to media from the upper layer. | ||
671 | */ | ||
672 | static int | ||
673 | dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
674 | { | ||
675 | board_info_t *db = (board_info_t *) dev->priv; | ||
676 | |||
677 | PRINTK3("dm9000_start_xmit\n"); | ||
678 | |||
679 | if (db->tx_pkt_cnt > 1) | ||
680 | return 1; | ||
681 | |||
682 | netif_stop_queue(dev); | ||
683 | |||
684 | /* Disable all interrupts */ | ||
685 | iow(db, DM9000_IMR, IMR_PAR); | ||
686 | |||
687 | /* Move data to DM9000 TX RAM */ | ||
688 | writeb(DM9000_MWCMD, db->io_addr); | ||
689 | |||
690 | (db->outblk)(db->io_data, skb->data, skb->len); | ||
691 | db->stats.tx_bytes += skb->len; | ||
692 | |||
693 | /* TX control: First packet immediately send, second packet queue */ | ||
694 | if (db->tx_pkt_cnt == 0) { | ||
695 | |||
696 | /* First Packet */ | ||
697 | db->tx_pkt_cnt++; | ||
698 | |||
699 | /* Set TX length to DM9000 */ | ||
700 | iow(db, DM9000_TXPLL, skb->len & 0xff); | ||
701 | iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff); | ||
702 | |||
703 | /* Issue TX polling command */ | ||
704 | iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */ | ||
705 | |||
706 | dev->trans_start = jiffies; /* save the time stamp */ | ||
707 | |||
708 | } else { | ||
709 | /* Second packet */ | ||
710 | db->tx_pkt_cnt++; | ||
711 | db->queue_pkt_len = skb->len; | ||
712 | } | ||
713 | |||
714 | /* free this SKB */ | ||
715 | dev_kfree_skb(skb); | ||
716 | |||
717 | /* Re-enable resource check */ | ||
718 | if (db->tx_pkt_cnt == 1) | ||
719 | netif_wake_queue(dev); | ||
720 | |||
721 | /* Re-enable interrupt */ | ||
722 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | ||
723 | |||
724 | return 0; | ||
725 | } | ||
726 | |||
727 | static void | ||
728 | dm9000_shutdown(struct net_device *dev) | ||
729 | { | ||
730 | board_info_t *db = (board_info_t *) dev->priv; | ||
731 | |||
732 | /* RESET device */ | ||
733 | dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */ | ||
734 | iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */ | ||
735 | iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */ | ||
736 | iow(db, DM9000_RCR, 0x00); /* Disable RX */ | ||
737 | } | ||
738 | |||
739 | /* | ||
740 | * Stop the interface. | ||
741 | * The interface is stopped when it is brought. | ||
742 | */ | ||
743 | static int | ||
744 | dm9000_stop(struct net_device *ndev) | ||
745 | { | ||
746 | board_info_t *db = (board_info_t *) ndev->priv; | ||
747 | |||
748 | PRINTK1("entering %s\n",__FUNCTION__); | ||
749 | |||
750 | /* deleted timer */ | ||
751 | del_timer(&db->timer); | ||
752 | |||
753 | netif_stop_queue(ndev); | ||
754 | netif_carrier_off(ndev); | ||
755 | |||
756 | /* free interrupt */ | ||
757 | free_irq(ndev->irq, ndev); | ||
758 | |||
759 | dm9000_shutdown(ndev); | ||
760 | |||
761 | return 0; | ||
762 | } | ||
763 | |||
764 | /* | ||
765 | * DM9000 interrupt handler | ||
766 | * receive the packet to upper layer, free the transmitted packet | ||
767 | */ | ||
768 | |||
769 | void | ||
770 | dm9000_tx_done(struct net_device *dev, board_info_t * db) | ||
771 | { | ||
772 | int tx_status = ior(db, DM9000_NSR); /* Got TX status */ | ||
773 | |||
774 | if (tx_status & (NSR_TX2END | NSR_TX1END)) { | ||
775 | /* One packet sent complete */ | ||
776 | db->tx_pkt_cnt--; | ||
777 | db->stats.tx_packets++; | ||
778 | |||
779 | /* Queue packet check & send */ | ||
780 | if (db->tx_pkt_cnt > 0) { | ||
781 | iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff); | ||
782 | iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff); | ||
783 | iow(db, DM9000_TCR, TCR_TXREQ); | ||
784 | dev->trans_start = jiffies; | ||
785 | } | ||
786 | netif_wake_queue(dev); | ||
787 | } | ||
788 | } | ||
789 | |||
790 | static irqreturn_t | ||
791 | dm9000_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
792 | { | ||
793 | struct net_device *dev = dev_id; | ||
794 | board_info_t *db; | ||
795 | int int_status; | ||
796 | u8 reg_save; | ||
797 | |||
798 | PRINTK3("entering %s\n",__FUNCTION__); | ||
799 | |||
800 | if (!dev) { | ||
801 | PRINTK1("dm9000_interrupt() without DEVICE arg\n"); | ||
802 | return IRQ_HANDLED; | ||
803 | } | ||
804 | |||
805 | /* A real interrupt coming */ | ||
806 | db = (board_info_t *) dev->priv; | ||
807 | spin_lock(&db->lock); | ||
808 | |||
809 | /* Save previous register address */ | ||
810 | reg_save = readb(db->io_addr); | ||
811 | |||
812 | /* Disable all interrupts */ | ||
813 | iow(db, DM9000_IMR, IMR_PAR); | ||
814 | |||
815 | /* Got DM9000 interrupt status */ | ||
816 | int_status = ior(db, DM9000_ISR); /* Got ISR */ | ||
817 | iow(db, DM9000_ISR, int_status); /* Clear ISR status */ | ||
818 | |||
819 | /* Received the coming packet */ | ||
820 | if (int_status & ISR_PRS) | ||
821 | dm9000_rx(dev); | ||
822 | |||
823 | /* Trnasmit Interrupt check */ | ||
824 | if (int_status & ISR_PTS) | ||
825 | dm9000_tx_done(dev, db); | ||
826 | |||
827 | /* Re-enable interrupt mask */ | ||
828 | iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM); | ||
829 | |||
830 | /* Restore previous register address */ | ||
831 | writeb(reg_save, db->io_addr); | ||
832 | |||
833 | spin_unlock(&db->lock); | ||
834 | |||
835 | return IRQ_HANDLED; | ||
836 | } | ||
837 | |||
838 | /* | ||
839 | * Get statistics from driver. | ||
840 | */ | ||
841 | static struct net_device_stats * | ||
842 | dm9000_get_stats(struct net_device *dev) | ||
843 | { | ||
844 | board_info_t *db = (board_info_t *) dev->priv; | ||
845 | return &db->stats; | ||
846 | } | ||
847 | |||
848 | /* | ||
849 | * Process the upper socket ioctl command | ||
850 | */ | ||
851 | static int | ||
852 | dm9000_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | ||
853 | { | ||
854 | PRINTK1("entering %s\n",__FUNCTION__); | ||
855 | return 0; | ||
856 | } | ||
857 | |||
858 | /* | ||
859 | * A periodic timer routine | ||
860 | * Dynamic media sense, allocated Rx buffer... | ||
861 | */ | ||
862 | static void | ||
863 | dm9000_timer(unsigned long data) | ||
864 | { | ||
865 | struct net_device *dev = (struct net_device *) data; | ||
866 | board_info_t *db = (board_info_t *) dev->priv; | ||
867 | u8 reg_save; | ||
868 | unsigned long flags; | ||
869 | |||
870 | PRINTK3("dm9000_timer()\n"); | ||
871 | |||
872 | spin_lock_irqsave(db->lock,flags); | ||
873 | /* Save previous register address */ | ||
874 | reg_save = readb(db->io_addr); | ||
875 | |||
876 | mii_check_media(&db->mii, netif_msg_link(db), 0); | ||
877 | |||
878 | /* Restore previous register address */ | ||
879 | writeb(reg_save, db->io_addr); | ||
880 | spin_unlock_irqrestore(db->lock,flags); | ||
881 | |||
882 | /* Set timer again */ | ||
883 | db->timer.expires = DM9000_TIMER_WUT; | ||
884 | add_timer(&db->timer); | ||
885 | } | ||
886 | |||
887 | struct dm9000_rxhdr { | ||
888 | u16 RxStatus; | ||
889 | u16 RxLen; | ||
890 | } __attribute__((__packed__)); | ||
891 | |||
892 | /* | ||
893 | * Received a packet and pass to upper layer | ||
894 | */ | ||
895 | static void | ||
896 | dm9000_rx(struct net_device *dev) | ||
897 | { | ||
898 | board_info_t *db = (board_info_t *) dev->priv; | ||
899 | struct dm9000_rxhdr rxhdr; | ||
900 | struct sk_buff *skb; | ||
901 | u8 rxbyte, *rdptr; | ||
902 | int GoodPacket; | ||
903 | int RxLen; | ||
904 | |||
905 | /* Check packet ready or not */ | ||
906 | do { | ||
907 | ior(db, DM9000_MRCMDX); /* Dummy read */ | ||
908 | |||
909 | /* Get most updated data */ | ||
910 | rxbyte = readb(db->io_data); | ||
911 | |||
912 | /* Status check: this byte must be 0 or 1 */ | ||
913 | if (rxbyte > DM9000_PKT_RDY) { | ||
914 | printk("status check failed: %d\n", rxbyte); | ||
915 | iow(db, DM9000_RCR, 0x00); /* Stop Device */ | ||
916 | iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */ | ||
917 | return; | ||
918 | } | ||
919 | |||
920 | if (rxbyte != DM9000_PKT_RDY) | ||
921 | return; | ||
922 | |||
923 | /* A packet ready now & Get status/length */ | ||
924 | GoodPacket = TRUE; | ||
925 | writeb(DM9000_MRCMD, db->io_addr); | ||
926 | |||
927 | (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr)); | ||
928 | |||
929 | RxLen = rxhdr.RxLen; | ||
930 | |||
931 | /* Packet Status check */ | ||
932 | if (RxLen < 0x40) { | ||
933 | GoodPacket = FALSE; | ||
934 | PRINTK1("Bad Packet received (runt)\n"); | ||
935 | } | ||
936 | |||
937 | if (RxLen > DM9000_PKT_MAX) { | ||
938 | PRINTK1("RST: RX Len:%x\n", RxLen); | ||
939 | } | ||
940 | |||
941 | if (rxhdr.RxStatus & 0xbf00) { | ||
942 | GoodPacket = FALSE; | ||
943 | if (rxhdr.RxStatus & 0x100) { | ||
944 | PRINTK1("fifo error\n"); | ||
945 | db->stats.rx_fifo_errors++; | ||
946 | } | ||
947 | if (rxhdr.RxStatus & 0x200) { | ||
948 | PRINTK1("crc error\n"); | ||
949 | db->stats.rx_crc_errors++; | ||
950 | } | ||
951 | if (rxhdr.RxStatus & 0x8000) { | ||
952 | PRINTK1("length error\n"); | ||
953 | db->stats.rx_length_errors++; | ||
954 | } | ||
955 | } | ||
956 | |||
957 | /* Move data from DM9000 */ | ||
958 | if (GoodPacket | ||
959 | && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) { | ||
960 | skb->dev = dev; | ||
961 | skb_reserve(skb, 2); | ||
962 | rdptr = (u8 *) skb_put(skb, RxLen - 4); | ||
963 | |||
964 | /* Read received packet from RX SRAM */ | ||
965 | |||
966 | (db->inblk)(db->io_data, rdptr, RxLen); | ||
967 | db->stats.rx_bytes += RxLen; | ||
968 | |||
969 | /* Pass to upper layer */ | ||
970 | skb->protocol = eth_type_trans(skb, dev); | ||
971 | netif_rx(skb); | ||
972 | db->stats.rx_packets++; | ||
973 | |||
974 | } else { | ||
975 | /* need to dump the packet's data */ | ||
976 | |||
977 | (db->dumpblk)(db->io_data, RxLen); | ||
978 | } | ||
979 | } while (rxbyte == DM9000_PKT_RDY); | ||
980 | } | ||
981 | |||
982 | /* | ||
983 | * Read a word data from SROM | ||
984 | */ | ||
985 | static u16 | ||
986 | read_srom_word(board_info_t * db, int offset) | ||
987 | { | ||
988 | iow(db, DM9000_EPAR, offset); | ||
989 | iow(db, DM9000_EPCR, EPCR_ERPRR); | ||
990 | mdelay(8); /* according to the datasheet 200us should be enough, | ||
991 | but it doesn't work */ | ||
992 | iow(db, DM9000_EPCR, 0x0); | ||
993 | return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8)); | ||
994 | } | ||
995 | |||
996 | #ifdef DM9000_PROGRAM_EEPROM | ||
997 | /* | ||
998 | * Write a word data to SROM | ||
999 | */ | ||
1000 | static void | ||
1001 | write_srom_word(board_info_t * db, int offset, u16 val) | ||
1002 | { | ||
1003 | iow(db, DM9000_EPAR, offset); | ||
1004 | iow(db, DM9000_EPDRH, ((val >> 8) & 0xff)); | ||
1005 | iow(db, DM9000_EPDRL, (val & 0xff)); | ||
1006 | iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW); | ||
1007 | mdelay(8); /* same shit */ | ||
1008 | iow(db, DM9000_EPCR, 0); | ||
1009 | } | ||
1010 | |||
1011 | /* | ||
1012 | * Only for development: | ||
1013 | * Here we write static data to the eeprom in case | ||
1014 | * we don't have valid content on a new board | ||
1015 | */ | ||
1016 | static void | ||
1017 | program_eeprom(board_info_t * db) | ||
1018 | { | ||
1019 | u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */ | ||
1020 | 0x0000, /* Autoload: accept nothing */ | ||
1021 | 0x0a46, 0x9000, /* Vendor / Product ID */ | ||
1022 | 0x0000, /* pin control */ | ||
1023 | 0x0000, | ||
1024 | }; /* Wake-up mode control */ | ||
1025 | int i; | ||
1026 | for (i = 0; i < 8; i++) | ||
1027 | write_srom_word(db, i, eeprom[i]); | ||
1028 | } | ||
1029 | #endif | ||
1030 | |||
1031 | |||
1032 | /* | ||
1033 | * Calculate the CRC valude of the Rx packet | ||
1034 | * flag = 1 : return the reverse CRC (for the received packet CRC) | ||
1035 | * 0 : return the normal CRC (for Hash Table index) | ||
1036 | */ | ||
1037 | |||
1038 | static unsigned long | ||
1039 | cal_CRC(unsigned char *Data, unsigned int Len, u8 flag) | ||
1040 | { | ||
1041 | |||
1042 | u32 crc = ether_crc_le(Len, Data); | ||
1043 | |||
1044 | if (flag) | ||
1045 | return ~crc; | ||
1046 | |||
1047 | return crc; | ||
1048 | } | ||
1049 | |||
1050 | /* | ||
1051 | * Set DM9000 multicast address | ||
1052 | */ | ||
1053 | static void | ||
1054 | dm9000_hash_table(struct net_device *dev) | ||
1055 | { | ||
1056 | board_info_t *db = (board_info_t *) dev->priv; | ||
1057 | struct dev_mc_list *mcptr = dev->mc_list; | ||
1058 | int mc_cnt = dev->mc_count; | ||
1059 | u32 hash_val; | ||
1060 | u16 i, oft, hash_table[4]; | ||
1061 | unsigned long flags; | ||
1062 | |||
1063 | PRINTK2("dm9000_hash_table()\n"); | ||
1064 | |||
1065 | spin_lock_irqsave(&db->lock,flags); | ||
1066 | |||
1067 | for (i = 0, oft = 0x10; i < 6; i++, oft++) | ||
1068 | iow(db, oft, dev->dev_addr[i]); | ||
1069 | |||
1070 | /* Clear Hash Table */ | ||
1071 | for (i = 0; i < 4; i++) | ||
1072 | hash_table[i] = 0x0; | ||
1073 | |||
1074 | /* broadcast address */ | ||
1075 | hash_table[3] = 0x8000; | ||
1076 | |||
1077 | /* the multicast address in Hash Table : 64 bits */ | ||
1078 | for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) { | ||
1079 | hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f; | ||
1080 | hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16); | ||
1081 | } | ||
1082 | |||
1083 | /* Write the hash table to MAC MD table */ | ||
1084 | for (i = 0, oft = 0x16; i < 4; i++) { | ||
1085 | iow(db, oft++, hash_table[i] & 0xff); | ||
1086 | iow(db, oft++, (hash_table[i] >> 8) & 0xff); | ||
1087 | } | ||
1088 | |||
1089 | spin_unlock_irqrestore(&db->lock,flags); | ||
1090 | } | ||
1091 | |||
1092 | |||
1093 | /* | ||
1094 | * Read a word from phyxcer | ||
1095 | */ | ||
1096 | static int | ||
1097 | dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg) | ||
1098 | { | ||
1099 | board_info_t *db = (board_info_t *) dev->priv; | ||
1100 | unsigned long flags; | ||
1101 | int ret; | ||
1102 | |||
1103 | spin_lock_irqsave(&db->lock,flags); | ||
1104 | /* Fill the phyxcer register into REG_0C */ | ||
1105 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | ||
1106 | |||
1107 | iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */ | ||
1108 | udelay(100); /* Wait read complete */ | ||
1109 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */ | ||
1110 | |||
1111 | /* The read data keeps on REG_0D & REG_0E */ | ||
1112 | ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL); | ||
1113 | |||
1114 | spin_unlock_irqrestore(&db->lock,flags); | ||
1115 | |||
1116 | return ret; | ||
1117 | } | ||
1118 | |||
1119 | /* | ||
1120 | * Write a word to phyxcer | ||
1121 | */ | ||
1122 | static void | ||
1123 | dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value) | ||
1124 | { | ||
1125 | board_info_t *db = (board_info_t *) dev->priv; | ||
1126 | unsigned long flags; | ||
1127 | |||
1128 | spin_lock_irqsave(&db->lock,flags); | ||
1129 | |||
1130 | /* Fill the phyxcer register into REG_0C */ | ||
1131 | iow(db, DM9000_EPAR, DM9000_PHY | reg); | ||
1132 | |||
1133 | /* Fill the written data into REG_0D & REG_0E */ | ||
1134 | iow(db, DM9000_EPDRL, (value & 0xff)); | ||
1135 | iow(db, DM9000_EPDRH, ((value >> 8) & 0xff)); | ||
1136 | |||
1137 | iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */ | ||
1138 | udelay(500); /* Wait write complete */ | ||
1139 | iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */ | ||
1140 | |||
1141 | spin_unlock_irqrestore(&db->lock,flags); | ||
1142 | } | ||
1143 | |||
1144 | static int | ||
1145 | dm9000_drv_suspend(struct device *dev, u32 state, u32 level) | ||
1146 | { | ||
1147 | struct net_device *ndev = dev_get_drvdata(dev); | ||
1148 | |||
1149 | if (ndev && level == SUSPEND_DISABLE) { | ||
1150 | if (netif_running(ndev)) { | ||
1151 | netif_device_detach(ndev); | ||
1152 | dm9000_shutdown(ndev); | ||
1153 | } | ||
1154 | } | ||
1155 | return 0; | ||
1156 | } | ||
1157 | |||
1158 | static int | ||
1159 | dm9000_drv_resume(struct device *dev, u32 level) | ||
1160 | { | ||
1161 | struct net_device *ndev = dev_get_drvdata(dev); | ||
1162 | board_info_t *db = (board_info_t *) ndev->priv; | ||
1163 | |||
1164 | if (ndev && level == RESUME_ENABLE) { | ||
1165 | |||
1166 | if (netif_running(ndev)) { | ||
1167 | dm9000_reset(db); | ||
1168 | dm9000_init_dm9000(ndev); | ||
1169 | |||
1170 | netif_device_attach(ndev); | ||
1171 | } | ||
1172 | } | ||
1173 | return 0; | ||
1174 | } | ||
1175 | |||
1176 | static int | ||
1177 | dm9000_drv_remove(struct device *dev) | ||
1178 | { | ||
1179 | struct platform_device *pdev = to_platform_device(dev); | ||
1180 | struct net_device *ndev = dev_get_drvdata(dev); | ||
1181 | |||
1182 | dev_set_drvdata(dev, NULL); | ||
1183 | |||
1184 | unregister_netdev(ndev); | ||
1185 | dm9000_release_board(pdev, (board_info_t *) ndev->priv); | ||
1186 | kfree(ndev); /* free device structure */ | ||
1187 | |||
1188 | PRINTK1("clean_module() exit\n"); | ||
1189 | |||
1190 | return 0; | ||
1191 | } | ||
1192 | |||
1193 | static struct device_driver dm9000_driver = { | ||
1194 | .name = "dm9000", | ||
1195 | .bus = &platform_bus_type, | ||
1196 | .probe = dm9000_probe, | ||
1197 | .remove = dm9000_drv_remove, | ||
1198 | .suspend = dm9000_drv_suspend, | ||
1199 | .resume = dm9000_drv_resume, | ||
1200 | }; | ||
1201 | |||
1202 | static int __init | ||
1203 | dm9000_init(void) | ||
1204 | { | ||
1205 | return driver_register(&dm9000_driver); /* search board and register */ | ||
1206 | } | ||
1207 | |||
1208 | static void __exit | ||
1209 | dm9000_cleanup(void) | ||
1210 | { | ||
1211 | driver_unregister(&dm9000_driver); | ||
1212 | } | ||
1213 | |||
1214 | module_init(dm9000_init); | ||
1215 | module_exit(dm9000_cleanup); | ||
1216 | |||
1217 | MODULE_AUTHOR("Sascha Hauer, Ben Dooks"); | ||
1218 | MODULE_DESCRIPTION("Davicom DM9000 network driver"); | ||
1219 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h new file mode 100644 index 000000000000..82cad360bafc --- /dev/null +++ b/drivers/net/dm9000.h | |||
@@ -0,0 +1,135 @@ | |||
1 | /* | ||
2 | * dm9000 Ethernet | ||
3 | */ | ||
4 | |||
5 | #ifndef _DM9000X_H_ | ||
6 | #define _DM9000X_H_ | ||
7 | |||
8 | #define DM9000_ID 0x90000A46 | ||
9 | |||
10 | /* although the registers are 16 bit, they are 32-bit aligned. | ||
11 | */ | ||
12 | |||
13 | #define DM9000_NCR 0x00 | ||
14 | #define DM9000_NSR 0x01 | ||
15 | #define DM9000_TCR 0x02 | ||
16 | #define DM9000_TSR1 0x03 | ||
17 | #define DM9000_TSR2 0x04 | ||
18 | #define DM9000_RCR 0x05 | ||
19 | #define DM9000_RSR 0x06 | ||
20 | #define DM9000_ROCR 0x07 | ||
21 | #define DM9000_BPTR 0x08 | ||
22 | #define DM9000_FCTR 0x09 | ||
23 | #define DM9000_FCR 0x0A | ||
24 | #define DM9000_EPCR 0x0B | ||
25 | #define DM9000_EPAR 0x0C | ||
26 | #define DM9000_EPDRL 0x0D | ||
27 | #define DM9000_EPDRH 0x0E | ||
28 | #define DM9000_WCR 0x0F | ||
29 | |||
30 | #define DM9000_PAR 0x10 | ||
31 | #define DM9000_MAR 0x16 | ||
32 | |||
33 | #define DM9000_GPCR 0x1e | ||
34 | #define DM9000_GPR 0x1f | ||
35 | #define DM9000_TRPAL 0x22 | ||
36 | #define DM9000_TRPAH 0x23 | ||
37 | #define DM9000_RWPAL 0x24 | ||
38 | #define DM9000_RWPAH 0x25 | ||
39 | |||
40 | #define DM9000_VIDL 0x28 | ||
41 | #define DM9000_VIDH 0x29 | ||
42 | #define DM9000_PIDL 0x2A | ||
43 | #define DM9000_PIDH 0x2B | ||
44 | |||
45 | #define DM9000_CHIPR 0x2C | ||
46 | #define DM9000_SMCR 0x2F | ||
47 | |||
48 | #define DM9000_MRCMDX 0xF0 | ||
49 | #define DM9000_MRCMD 0xF2 | ||
50 | #define DM9000_MRRL 0xF4 | ||
51 | #define DM9000_MRRH 0xF5 | ||
52 | #define DM9000_MWCMDX 0xF6 | ||
53 | #define DM9000_MWCMD 0xF8 | ||
54 | #define DM9000_MWRL 0xFA | ||
55 | #define DM9000_MWRH 0xFB | ||
56 | #define DM9000_TXPLL 0xFC | ||
57 | #define DM9000_TXPLH 0xFD | ||
58 | #define DM9000_ISR 0xFE | ||
59 | #define DM9000_IMR 0xFF | ||
60 | |||
61 | #define NCR_EXT_PHY (1<<7) | ||
62 | #define NCR_WAKEEN (1<<6) | ||
63 | #define NCR_FCOL (1<<4) | ||
64 | #define NCR_FDX (1<<3) | ||
65 | #define NCR_LBK (3<<1) | ||
66 | #define NCR_RST (1<<0) | ||
67 | |||
68 | #define NSR_SPEED (1<<7) | ||
69 | #define NSR_LINKST (1<<6) | ||
70 | #define NSR_WAKEST (1<<5) | ||
71 | #define NSR_TX2END (1<<3) | ||
72 | #define NSR_TX1END (1<<2) | ||
73 | #define NSR_RXOV (1<<1) | ||
74 | |||
75 | #define TCR_TJDIS (1<<6) | ||
76 | #define TCR_EXCECM (1<<5) | ||
77 | #define TCR_PAD_DIS2 (1<<4) | ||
78 | #define TCR_CRC_DIS2 (1<<3) | ||
79 | #define TCR_PAD_DIS1 (1<<2) | ||
80 | #define TCR_CRC_DIS1 (1<<1) | ||
81 | #define TCR_TXREQ (1<<0) | ||
82 | |||
83 | #define TSR_TJTO (1<<7) | ||
84 | #define TSR_LC (1<<6) | ||
85 | #define TSR_NC (1<<5) | ||
86 | #define TSR_LCOL (1<<4) | ||
87 | #define TSR_COL (1<<3) | ||
88 | #define TSR_EC (1<<2) | ||
89 | |||
90 | #define RCR_WTDIS (1<<6) | ||
91 | #define RCR_DIS_LONG (1<<5) | ||
92 | #define RCR_DIS_CRC (1<<4) | ||
93 | #define RCR_ALL (1<<3) | ||
94 | #define RCR_RUNT (1<<2) | ||
95 | #define RCR_PRMSC (1<<1) | ||
96 | #define RCR_RXEN (1<<0) | ||
97 | |||
98 | #define RSR_RF (1<<7) | ||
99 | #define RSR_MF (1<<6) | ||
100 | #define RSR_LCS (1<<5) | ||
101 | #define RSR_RWTO (1<<4) | ||
102 | #define RSR_PLE (1<<3) | ||
103 | #define RSR_AE (1<<2) | ||
104 | #define RSR_CE (1<<1) | ||
105 | #define RSR_FOE (1<<0) | ||
106 | |||
107 | #define FCTR_HWOT(ot) (( ot & 0xf ) << 4 ) | ||
108 | #define FCTR_LWOT(ot) ( ot & 0xf ) | ||
109 | |||
110 | #define IMR_PAR (1<<7) | ||
111 | #define IMR_ROOM (1<<3) | ||
112 | #define IMR_ROM (1<<2) | ||
113 | #define IMR_PTM (1<<1) | ||
114 | #define IMR_PRM (1<<0) | ||
115 | |||
116 | #define ISR_ROOS (1<<3) | ||
117 | #define ISR_ROS (1<<2) | ||
118 | #define ISR_PTS (1<<1) | ||
119 | #define ISR_PRS (1<<0) | ||
120 | #define ISR_CLR_STATUS (ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS) | ||
121 | |||
122 | #define EPCR_REEP (1<<5) | ||
123 | #define EPCR_WEP (1<<4) | ||
124 | #define EPCR_EPOS (1<<3) | ||
125 | #define EPCR_ERPRR (1<<2) | ||
126 | #define EPCR_ERPRW (1<<1) | ||
127 | #define EPCR_ERRE (1<<0) | ||
128 | |||
129 | #define GPCR_GEP_CNTL (1<<0) | ||
130 | |||
131 | #define DM9000_PKT_RDY 0x01 /* Packet ready to receive */ | ||
132 | #define DM9000_PKT_MAX 1536 /* Received packet max size */ | ||
133 | |||
134 | #endif /* _DM9000X_H_ */ | ||
135 | |||
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 4a47df5a9ff9..d0fa2448761d 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -143,6 +143,7 @@ | |||
143 | #include <linux/delay.h> | 143 | #include <linux/delay.h> |
144 | #include <linux/init.h> | 144 | #include <linux/init.h> |
145 | #include <linux/pci.h> | 145 | #include <linux/pci.h> |
146 | #include <linux/dma-mapping.h> | ||
146 | #include <linux/netdevice.h> | 147 | #include <linux/netdevice.h> |
147 | #include <linux/etherdevice.h> | 148 | #include <linux/etherdevice.h> |
148 | #include <linux/mii.h> | 149 | #include <linux/mii.h> |
@@ -1092,11 +1093,16 @@ static int e100_phy_init(struct nic *nic) | |||
1092 | } | 1093 | } |
1093 | 1094 | ||
1094 | if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) && | 1095 | if((nic->mac >= mac_82550_D102) || ((nic->flags & ich) && |
1095 | (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000) && | 1096 | (mdio_read(netdev, nic->mii.phy_id, MII_TPISTATUS) & 0x8000))) { |
1096 | (nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled))) | 1097 | /* enable/disable MDI/MDI-X auto-switching. |
1097 | /* enable/disable MDI/MDI-X auto-switching */ | 1098 | MDI/MDI-X auto-switching is disabled for 82551ER/QM chips */ |
1098 | mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, | 1099 | if((nic->mac == mac_82551_E) || (nic->mac == mac_82551_F) || |
1099 | nic->mii.force_media ? 0 : NCONFIG_AUTO_SWITCH); | 1100 | (nic->mac == mac_82551_10) || (nic->mii.force_media) || |
1101 | !(nic->eeprom[eeprom_cnfg_mdix] & eeprom_mdix_enabled)) | ||
1102 | mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, 0); | ||
1103 | else | ||
1104 | mdio_write(netdev, nic->mii.phy_id, MII_NCONFIG, NCONFIG_AUTO_SWITCH); | ||
1105 | } | ||
1100 | 1106 | ||
1101 | return 0; | 1107 | return 0; |
1102 | } | 1108 | } |
@@ -1665,8 +1671,10 @@ static irqreturn_t e100_intr(int irq, void *dev_id, struct pt_regs *regs) | |||
1665 | if(stat_ack & stat_ack_rnr) | 1671 | if(stat_ack & stat_ack_rnr) |
1666 | nic->ru_running = RU_SUSPENDED; | 1672 | nic->ru_running = RU_SUSPENDED; |
1667 | 1673 | ||
1668 | e100_disable_irq(nic); | 1674 | if(likely(netif_rx_schedule_prep(netdev))) { |
1669 | netif_rx_schedule(netdev); | 1675 | e100_disable_irq(nic); |
1676 | __netif_rx_schedule(netdev); | ||
1677 | } | ||
1670 | 1678 | ||
1671 | return IRQ_HANDLED; | 1679 | return IRQ_HANDLED; |
1672 | } | 1680 | } |
@@ -2286,7 +2294,7 @@ static int __devinit e100_probe(struct pci_dev *pdev, | |||
2286 | goto err_out_disable_pdev; | 2294 | goto err_out_disable_pdev; |
2287 | } | 2295 | } |
2288 | 2296 | ||
2289 | if((err = pci_set_dma_mask(pdev, 0xFFFFFFFFULL))) { | 2297 | if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { |
2290 | DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n"); | 2298 | DPRINTK(PROBE, ERR, "No usable DMA configuration, aborting.\n"); |
2291 | goto err_out_free_res; | 2299 | goto err_out_free_res; |
2292 | } | 2300 | } |
@@ -2334,11 +2342,11 @@ static int __devinit e100_probe(struct pci_dev *pdev, | |||
2334 | goto err_out_iounmap; | 2342 | goto err_out_iounmap; |
2335 | } | 2343 | } |
2336 | 2344 | ||
2337 | e100_phy_init(nic); | ||
2338 | |||
2339 | if((err = e100_eeprom_load(nic))) | 2345 | if((err = e100_eeprom_load(nic))) |
2340 | goto err_out_free; | 2346 | goto err_out_free; |
2341 | 2347 | ||
2348 | e100_phy_init(nic); | ||
2349 | |||
2342 | memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN); | 2350 | memcpy(netdev->dev_addr, nic->eeprom, ETH_ALEN); |
2343 | if(!is_valid_ether_addr(netdev->dev_addr)) { | 2351 | if(!is_valid_ether_addr(netdev->dev_addr)) { |
2344 | DPRINTK(PROBE, ERR, "Invalid MAC address from " | 2352 | DPRINTK(PROBE, ERR, "Invalid MAC address from " |
@@ -2439,9 +2447,8 @@ static int e100_resume(struct pci_dev *pdev) | |||
2439 | #endif | 2447 | #endif |
2440 | 2448 | ||
2441 | 2449 | ||
2442 | static void e100_shutdown(struct device *dev) | 2450 | static void e100_shutdown(struct pci_dev *pdev) |
2443 | { | 2451 | { |
2444 | struct pci_dev *pdev = container_of(dev, struct pci_dev, dev); | ||
2445 | struct net_device *netdev = pci_get_drvdata(pdev); | 2452 | struct net_device *netdev = pci_get_drvdata(pdev); |
2446 | struct nic *nic = netdev_priv(netdev); | 2453 | struct nic *nic = netdev_priv(netdev); |
2447 | 2454 | ||
@@ -2462,11 +2469,7 @@ static struct pci_driver e100_driver = { | |||
2462 | .suspend = e100_suspend, | 2469 | .suspend = e100_suspend, |
2463 | .resume = e100_resume, | 2470 | .resume = e100_resume, |
2464 | #endif | 2471 | #endif |
2465 | 2472 | .shutdown = e100_shutdown, | |
2466 | .driver = { | ||
2467 | .shutdown = e100_shutdown, | ||
2468 | } | ||
2469 | |||
2470 | }; | 2473 | }; |
2471 | 2474 | ||
2472 | static int __init e100_init_module(void) | 2475 | static int __init e100_init_module(void) |
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h index af1e82c5b808..092757bc721f 100644 --- a/drivers/net/e1000/e1000.h +++ b/drivers/net/e1000/e1000.h | |||
@@ -140,7 +140,7 @@ struct e1000_adapter; | |||
140 | #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ | 140 | #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */ |
141 | 141 | ||
142 | #define AUTO_ALL_MODES 0 | 142 | #define AUTO_ALL_MODES 0 |
143 | #define E1000_EEPROM_82544_APM 0x0400 | 143 | #define E1000_EEPROM_82544_APM 0x0004 |
144 | #define E1000_EEPROM_APME 0x0400 | 144 | #define E1000_EEPROM_APME 0x0400 |
145 | 145 | ||
146 | #ifndef E1000_MASTER_SLAVE | 146 | #ifndef E1000_MASTER_SLAVE |
@@ -159,7 +159,7 @@ struct e1000_adapter; | |||
159 | * so a DMA handle can be stored along with the buffer */ | 159 | * so a DMA handle can be stored along with the buffer */ |
160 | struct e1000_buffer { | 160 | struct e1000_buffer { |
161 | struct sk_buff *skb; | 161 | struct sk_buff *skb; |
162 | uint64_t dma; | 162 | dma_addr_t dma; |
163 | unsigned long time_stamp; | 163 | unsigned long time_stamp; |
164 | uint16_t length; | 164 | uint16_t length; |
165 | uint16_t next_to_watch; | 165 | uint16_t next_to_watch; |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index 237247f74df4..f133ff0b0b94 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -105,7 +105,7 @@ static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = { | |||
105 | static int | 105 | static int |
106 | e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | 106 | e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) |
107 | { | 107 | { |
108 | struct e1000_adapter *adapter = netdev->priv; | 108 | struct e1000_adapter *adapter = netdev_priv(netdev); |
109 | struct e1000_hw *hw = &adapter->hw; | 109 | struct e1000_hw *hw = &adapter->hw; |
110 | 110 | ||
111 | if(hw->media_type == e1000_media_type_copper) { | 111 | if(hw->media_type == e1000_media_type_copper) { |
@@ -141,9 +141,9 @@ e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
141 | SUPPORTED_FIBRE | | 141 | SUPPORTED_FIBRE | |
142 | SUPPORTED_Autoneg); | 142 | SUPPORTED_Autoneg); |
143 | 143 | ||
144 | ecmd->advertising = (SUPPORTED_1000baseT_Full | | 144 | ecmd->advertising = (ADVERTISED_1000baseT_Full | |
145 | SUPPORTED_FIBRE | | 145 | ADVERTISED_FIBRE | |
146 | SUPPORTED_Autoneg); | 146 | ADVERTISED_Autoneg); |
147 | 147 | ||
148 | ecmd->port = PORT_FIBRE; | 148 | ecmd->port = PORT_FIBRE; |
149 | 149 | ||
@@ -179,13 +179,24 @@ e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | |||
179 | static int | 179 | static int |
180 | e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) | 180 | e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd) |
181 | { | 181 | { |
182 | struct e1000_adapter *adapter = netdev->priv; | 182 | struct e1000_adapter *adapter = netdev_priv(netdev); |
183 | struct e1000_hw *hw = &adapter->hw; | 183 | struct e1000_hw *hw = &adapter->hw; |
184 | 184 | ||
185 | if(ecmd->autoneg == AUTONEG_ENABLE) { | 185 | if(ecmd->autoneg == AUTONEG_ENABLE) { |
186 | hw->autoneg = 1; | 186 | hw->autoneg = 1; |
187 | hw->autoneg_advertised = 0x002F; | 187 | if(hw->media_type == e1000_media_type_fiber) |
188 | ecmd->advertising = 0x002F; | 188 | hw->autoneg_advertised = ADVERTISED_1000baseT_Full | |
189 | ADVERTISED_FIBRE | | ||
190 | ADVERTISED_Autoneg; | ||
191 | else | ||
192 | hw->autoneg_advertised = ADVERTISED_10baseT_Half | | ||
193 | ADVERTISED_10baseT_Full | | ||
194 | ADVERTISED_100baseT_Half | | ||
195 | ADVERTISED_100baseT_Full | | ||
196 | ADVERTISED_1000baseT_Full| | ||
197 | ADVERTISED_Autoneg | | ||
198 | ADVERTISED_TP; | ||
199 | ecmd->advertising = hw->autoneg_advertised; | ||
189 | } else | 200 | } else |
190 | if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) | 201 | if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) |
191 | return -EINVAL; | 202 | return -EINVAL; |
@@ -206,7 +217,7 @@ static void | |||
206 | e1000_get_pauseparam(struct net_device *netdev, | 217 | e1000_get_pauseparam(struct net_device *netdev, |
207 | struct ethtool_pauseparam *pause) | 218 | struct ethtool_pauseparam *pause) |
208 | { | 219 | { |
209 | struct e1000_adapter *adapter = netdev->priv; | 220 | struct e1000_adapter *adapter = netdev_priv(netdev); |
210 | struct e1000_hw *hw = &adapter->hw; | 221 | struct e1000_hw *hw = &adapter->hw; |
211 | 222 | ||
212 | pause->autoneg = | 223 | pause->autoneg = |
@@ -226,7 +237,7 @@ static int | |||
226 | e1000_set_pauseparam(struct net_device *netdev, | 237 | e1000_set_pauseparam(struct net_device *netdev, |
227 | struct ethtool_pauseparam *pause) | 238 | struct ethtool_pauseparam *pause) |
228 | { | 239 | { |
229 | struct e1000_adapter *adapter = netdev->priv; | 240 | struct e1000_adapter *adapter = netdev_priv(netdev); |
230 | struct e1000_hw *hw = &adapter->hw; | 241 | struct e1000_hw *hw = &adapter->hw; |
231 | 242 | ||
232 | adapter->fc_autoneg = pause->autoneg; | 243 | adapter->fc_autoneg = pause->autoneg; |
@@ -259,14 +270,14 @@ e1000_set_pauseparam(struct net_device *netdev, | |||
259 | static uint32_t | 270 | static uint32_t |
260 | e1000_get_rx_csum(struct net_device *netdev) | 271 | e1000_get_rx_csum(struct net_device *netdev) |
261 | { | 272 | { |
262 | struct e1000_adapter *adapter = netdev->priv; | 273 | struct e1000_adapter *adapter = netdev_priv(netdev); |
263 | return adapter->rx_csum; | 274 | return adapter->rx_csum; |
264 | } | 275 | } |
265 | 276 | ||
266 | static int | 277 | static int |
267 | e1000_set_rx_csum(struct net_device *netdev, uint32_t data) | 278 | e1000_set_rx_csum(struct net_device *netdev, uint32_t data) |
268 | { | 279 | { |
269 | struct e1000_adapter *adapter = netdev->priv; | 280 | struct e1000_adapter *adapter = netdev_priv(netdev); |
270 | adapter->rx_csum = data; | 281 | adapter->rx_csum = data; |
271 | 282 | ||
272 | if(netif_running(netdev)) { | 283 | if(netif_running(netdev)) { |
@@ -286,7 +297,7 @@ e1000_get_tx_csum(struct net_device *netdev) | |||
286 | static int | 297 | static int |
287 | e1000_set_tx_csum(struct net_device *netdev, uint32_t data) | 298 | e1000_set_tx_csum(struct net_device *netdev, uint32_t data) |
288 | { | 299 | { |
289 | struct e1000_adapter *adapter = netdev->priv; | 300 | struct e1000_adapter *adapter = netdev_priv(netdev); |
290 | 301 | ||
291 | if(adapter->hw.mac_type < e1000_82543) { | 302 | if(adapter->hw.mac_type < e1000_82543) { |
292 | if (!data) | 303 | if (!data) |
@@ -306,8 +317,8 @@ e1000_set_tx_csum(struct net_device *netdev, uint32_t data) | |||
306 | static int | 317 | static int |
307 | e1000_set_tso(struct net_device *netdev, uint32_t data) | 318 | e1000_set_tso(struct net_device *netdev, uint32_t data) |
308 | { | 319 | { |
309 | struct e1000_adapter *adapter = netdev->priv; | 320 | struct e1000_adapter *adapter = netdev_priv(netdev); |
310 | if ((adapter->hw.mac_type < e1000_82544) || | 321 | if((adapter->hw.mac_type < e1000_82544) || |
311 | (adapter->hw.mac_type == e1000_82547)) | 322 | (adapter->hw.mac_type == e1000_82547)) |
312 | return data ? -EINVAL : 0; | 323 | return data ? -EINVAL : 0; |
313 | 324 | ||
@@ -322,14 +333,14 @@ e1000_set_tso(struct net_device *netdev, uint32_t data) | |||
322 | static uint32_t | 333 | static uint32_t |
323 | e1000_get_msglevel(struct net_device *netdev) | 334 | e1000_get_msglevel(struct net_device *netdev) |
324 | { | 335 | { |
325 | struct e1000_adapter *adapter = netdev->priv; | 336 | struct e1000_adapter *adapter = netdev_priv(netdev); |
326 | return adapter->msg_enable; | 337 | return adapter->msg_enable; |
327 | } | 338 | } |
328 | 339 | ||
329 | static void | 340 | static void |
330 | e1000_set_msglevel(struct net_device *netdev, uint32_t data) | 341 | e1000_set_msglevel(struct net_device *netdev, uint32_t data) |
331 | { | 342 | { |
332 | struct e1000_adapter *adapter = netdev->priv; | 343 | struct e1000_adapter *adapter = netdev_priv(netdev); |
333 | adapter->msg_enable = data; | 344 | adapter->msg_enable = data; |
334 | } | 345 | } |
335 | 346 | ||
@@ -344,7 +355,7 @@ static void | |||
344 | e1000_get_regs(struct net_device *netdev, | 355 | e1000_get_regs(struct net_device *netdev, |
345 | struct ethtool_regs *regs, void *p) | 356 | struct ethtool_regs *regs, void *p) |
346 | { | 357 | { |
347 | struct e1000_adapter *adapter = netdev->priv; | 358 | struct e1000_adapter *adapter = netdev_priv(netdev); |
348 | struct e1000_hw *hw = &adapter->hw; | 359 | struct e1000_hw *hw = &adapter->hw; |
349 | uint32_t *regs_buff = p; | 360 | uint32_t *regs_buff = p; |
350 | uint16_t phy_data; | 361 | uint16_t phy_data; |
@@ -432,7 +443,7 @@ e1000_get_regs(struct net_device *netdev, | |||
432 | static int | 443 | static int |
433 | e1000_get_eeprom_len(struct net_device *netdev) | 444 | e1000_get_eeprom_len(struct net_device *netdev) |
434 | { | 445 | { |
435 | struct e1000_adapter *adapter = netdev->priv; | 446 | struct e1000_adapter *adapter = netdev_priv(netdev); |
436 | return adapter->hw.eeprom.word_size * 2; | 447 | return adapter->hw.eeprom.word_size * 2; |
437 | } | 448 | } |
438 | 449 | ||
@@ -440,7 +451,7 @@ static int | |||
440 | e1000_get_eeprom(struct net_device *netdev, | 451 | e1000_get_eeprom(struct net_device *netdev, |
441 | struct ethtool_eeprom *eeprom, uint8_t *bytes) | 452 | struct ethtool_eeprom *eeprom, uint8_t *bytes) |
442 | { | 453 | { |
443 | struct e1000_adapter *adapter = netdev->priv; | 454 | struct e1000_adapter *adapter = netdev_priv(netdev); |
444 | struct e1000_hw *hw = &adapter->hw; | 455 | struct e1000_hw *hw = &adapter->hw; |
445 | uint16_t *eeprom_buff; | 456 | uint16_t *eeprom_buff; |
446 | int first_word, last_word; | 457 | int first_word, last_word; |
@@ -486,7 +497,7 @@ static int | |||
486 | e1000_set_eeprom(struct net_device *netdev, | 497 | e1000_set_eeprom(struct net_device *netdev, |
487 | struct ethtool_eeprom *eeprom, uint8_t *bytes) | 498 | struct ethtool_eeprom *eeprom, uint8_t *bytes) |
488 | { | 499 | { |
489 | struct e1000_adapter *adapter = netdev->priv; | 500 | struct e1000_adapter *adapter = netdev_priv(netdev); |
490 | struct e1000_hw *hw = &adapter->hw; | 501 | struct e1000_hw *hw = &adapter->hw; |
491 | uint16_t *eeprom_buff; | 502 | uint16_t *eeprom_buff; |
492 | void *ptr; | 503 | void *ptr; |
@@ -547,7 +558,7 @@ static void | |||
547 | e1000_get_drvinfo(struct net_device *netdev, | 558 | e1000_get_drvinfo(struct net_device *netdev, |
548 | struct ethtool_drvinfo *drvinfo) | 559 | struct ethtool_drvinfo *drvinfo) |
549 | { | 560 | { |
550 | struct e1000_adapter *adapter = netdev->priv; | 561 | struct e1000_adapter *adapter = netdev_priv(netdev); |
551 | 562 | ||
552 | strncpy(drvinfo->driver, e1000_driver_name, 32); | 563 | strncpy(drvinfo->driver, e1000_driver_name, 32); |
553 | strncpy(drvinfo->version, e1000_driver_version, 32); | 564 | strncpy(drvinfo->version, e1000_driver_version, 32); |
@@ -563,7 +574,7 @@ static void | |||
563 | e1000_get_ringparam(struct net_device *netdev, | 574 | e1000_get_ringparam(struct net_device *netdev, |
564 | struct ethtool_ringparam *ring) | 575 | struct ethtool_ringparam *ring) |
565 | { | 576 | { |
566 | struct e1000_adapter *adapter = netdev->priv; | 577 | struct e1000_adapter *adapter = netdev_priv(netdev); |
567 | e1000_mac_type mac_type = adapter->hw.mac_type; | 578 | e1000_mac_type mac_type = adapter->hw.mac_type; |
568 | struct e1000_desc_ring *txdr = &adapter->tx_ring; | 579 | struct e1000_desc_ring *txdr = &adapter->tx_ring; |
569 | struct e1000_desc_ring *rxdr = &adapter->rx_ring; | 580 | struct e1000_desc_ring *rxdr = &adapter->rx_ring; |
@@ -584,7 +595,7 @@ static int | |||
584 | e1000_set_ringparam(struct net_device *netdev, | 595 | e1000_set_ringparam(struct net_device *netdev, |
585 | struct ethtool_ringparam *ring) | 596 | struct ethtool_ringparam *ring) |
586 | { | 597 | { |
587 | struct e1000_adapter *adapter = netdev->priv; | 598 | struct e1000_adapter *adapter = netdev_priv(netdev); |
588 | e1000_mac_type mac_type = adapter->hw.mac_type; | 599 | e1000_mac_type mac_type = adapter->hw.mac_type; |
589 | struct e1000_desc_ring *txdr = &adapter->tx_ring; | 600 | struct e1000_desc_ring *txdr = &adapter->tx_ring; |
590 | struct e1000_desc_ring *rxdr = &adapter->rx_ring; | 601 | struct e1000_desc_ring *rxdr = &adapter->rx_ring; |
@@ -651,6 +662,9 @@ err_setup_rx: | |||
651 | E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \ | 662 | E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \ |
652 | value = E1000_READ_REG(&adapter->hw, R); \ | 663 | value = E1000_READ_REG(&adapter->hw, R); \ |
653 | if(value != (test[pat] & W & M)) { \ | 664 | if(value != (test[pat] & W & M)) { \ |
665 | DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \ | ||
666 | "0x%08X expected 0x%08X\n", \ | ||
667 | E1000_##R, value, (test[pat] & W & M)); \ | ||
654 | *data = (adapter->hw.mac_type < e1000_82543) ? \ | 668 | *data = (adapter->hw.mac_type < e1000_82543) ? \ |
655 | E1000_82542_##R : E1000_##R; \ | 669 | E1000_82542_##R : E1000_##R; \ |
656 | return 1; \ | 670 | return 1; \ |
@@ -663,7 +677,9 @@ err_setup_rx: | |||
663 | uint32_t value; \ | 677 | uint32_t value; \ |
664 | E1000_WRITE_REG(&adapter->hw, R, W & M); \ | 678 | E1000_WRITE_REG(&adapter->hw, R, W & M); \ |
665 | value = E1000_READ_REG(&adapter->hw, R); \ | 679 | value = E1000_READ_REG(&adapter->hw, R); \ |
666 | if ((W & M) != (value & M)) { \ | 680 | if((W & M) != (value & M)) { \ |
681 | DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\ | ||
682 | "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \ | ||
667 | *data = (adapter->hw.mac_type < e1000_82543) ? \ | 683 | *data = (adapter->hw.mac_type < e1000_82543) ? \ |
668 | E1000_82542_##R : E1000_##R; \ | 684 | E1000_82542_##R : E1000_##R; \ |
669 | return 1; \ | 685 | return 1; \ |
@@ -673,18 +689,33 @@ err_setup_rx: | |||
673 | static int | 689 | static int |
674 | e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data) | 690 | e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data) |
675 | { | 691 | { |
676 | uint32_t value; | 692 | uint32_t value, before, after; |
677 | uint32_t i; | 693 | uint32_t i, toggle; |
678 | 694 | ||
679 | /* The status register is Read Only, so a write should fail. | 695 | /* The status register is Read Only, so a write should fail. |
680 | * Some bits that get toggled are ignored. | 696 | * Some bits that get toggled are ignored. |
681 | */ | 697 | */ |
682 | value = (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833)); | 698 | switch (adapter->hw.mac_type) { |
683 | E1000_WRITE_REG(&adapter->hw, STATUS, (0xFFFFFFFF)); | 699 | case e1000_82573: |
684 | if(value != (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833))) { | 700 | toggle = 0x7FFFF033; |
701 | break; | ||
702 | default: | ||
703 | toggle = 0xFFFFF833; | ||
704 | break; | ||
705 | } | ||
706 | |||
707 | before = E1000_READ_REG(&adapter->hw, STATUS); | ||
708 | value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle); | ||
709 | E1000_WRITE_REG(&adapter->hw, STATUS, toggle); | ||
710 | after = E1000_READ_REG(&adapter->hw, STATUS) & toggle; | ||
711 | if(value != after) { | ||
712 | DPRINTK(DRV, ERR, "failed STATUS register test got: " | ||
713 | "0x%08X expected: 0x%08X\n", after, value); | ||
685 | *data = 1; | 714 | *data = 1; |
686 | return 1; | 715 | return 1; |
687 | } | 716 | } |
717 | /* restore previous status */ | ||
718 | E1000_WRITE_REG(&adapter->hw, STATUS, before); | ||
688 | 719 | ||
689 | REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); | 720 | REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF); |
690 | REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); | 721 | REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF); |
@@ -766,7 +797,7 @@ e1000_test_intr(int irq, | |||
766 | struct pt_regs *regs) | 797 | struct pt_regs *regs) |
767 | { | 798 | { |
768 | struct net_device *netdev = (struct net_device *) data; | 799 | struct net_device *netdev = (struct net_device *) data; |
769 | struct e1000_adapter *adapter = netdev->priv; | 800 | struct e1000_adapter *adapter = netdev_priv(netdev); |
770 | 801 | ||
771 | adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR); | 802 | adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR); |
772 | 803 | ||
@@ -1214,6 +1245,7 @@ e1000_set_phy_loopback(struct e1000_adapter *adapter) | |||
1214 | case e1000_82541_rev_2: | 1245 | case e1000_82541_rev_2: |
1215 | case e1000_82547: | 1246 | case e1000_82547: |
1216 | case e1000_82547_rev_2: | 1247 | case e1000_82547_rev_2: |
1248 | case e1000_82573: | ||
1217 | return e1000_integrated_phy_loopback(adapter); | 1249 | return e1000_integrated_phy_loopback(adapter); |
1218 | break; | 1250 | break; |
1219 | 1251 | ||
@@ -1422,7 +1454,7 @@ static void | |||
1422 | e1000_diag_test(struct net_device *netdev, | 1454 | e1000_diag_test(struct net_device *netdev, |
1423 | struct ethtool_test *eth_test, uint64_t *data) | 1455 | struct ethtool_test *eth_test, uint64_t *data) |
1424 | { | 1456 | { |
1425 | struct e1000_adapter *adapter = netdev->priv; | 1457 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1426 | boolean_t if_running = netif_running(netdev); | 1458 | boolean_t if_running = netif_running(netdev); |
1427 | 1459 | ||
1428 | if(eth_test->flags == ETH_TEST_FL_OFFLINE) { | 1460 | if(eth_test->flags == ETH_TEST_FL_OFFLINE) { |
@@ -1482,7 +1514,7 @@ e1000_diag_test(struct net_device *netdev, | |||
1482 | static void | 1514 | static void |
1483 | e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | 1515 | e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
1484 | { | 1516 | { |
1485 | struct e1000_adapter *adapter = netdev->priv; | 1517 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1486 | struct e1000_hw *hw = &adapter->hw; | 1518 | struct e1000_hw *hw = &adapter->hw; |
1487 | 1519 | ||
1488 | switch(adapter->hw.device_id) { | 1520 | switch(adapter->hw.device_id) { |
@@ -1527,7 +1559,7 @@ e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | |||
1527 | static int | 1559 | static int |
1528 | e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) | 1560 | e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
1529 | { | 1561 | { |
1530 | struct e1000_adapter *adapter = netdev->priv; | 1562 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1531 | struct e1000_hw *hw = &adapter->hw; | 1563 | struct e1000_hw *hw = &adapter->hw; |
1532 | 1564 | ||
1533 | switch(adapter->hw.device_id) { | 1565 | switch(adapter->hw.device_id) { |
@@ -1588,22 +1620,31 @@ e1000_led_blink_callback(unsigned long data) | |||
1588 | static int | 1620 | static int |
1589 | e1000_phys_id(struct net_device *netdev, uint32_t data) | 1621 | e1000_phys_id(struct net_device *netdev, uint32_t data) |
1590 | { | 1622 | { |
1591 | struct e1000_adapter *adapter = netdev->priv; | 1623 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1592 | 1624 | ||
1593 | if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ)) | 1625 | if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ)) |
1594 | data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ); | 1626 | data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ); |
1595 | 1627 | ||
1596 | if(!adapter->blink_timer.function) { | 1628 | if(adapter->hw.mac_type < e1000_82573) { |
1597 | init_timer(&adapter->blink_timer); | 1629 | if(!adapter->blink_timer.function) { |
1598 | adapter->blink_timer.function = e1000_led_blink_callback; | 1630 | init_timer(&adapter->blink_timer); |
1599 | adapter->blink_timer.data = (unsigned long) adapter; | 1631 | adapter->blink_timer.function = e1000_led_blink_callback; |
1632 | adapter->blink_timer.data = (unsigned long) adapter; | ||
1633 | } | ||
1634 | e1000_setup_led(&adapter->hw); | ||
1635 | mod_timer(&adapter->blink_timer, jiffies); | ||
1636 | msleep_interruptible(data * 1000); | ||
1637 | del_timer_sync(&adapter->blink_timer); | ||
1638 | } | ||
1639 | else { | ||
1640 | E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE | | ||
1641 | E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK | | ||
1642 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) | | ||
1643 | (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) | | ||
1644 | (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT))); | ||
1645 | msleep_interruptible(data * 1000); | ||
1600 | } | 1646 | } |
1601 | 1647 | ||
1602 | e1000_setup_led(&adapter->hw); | ||
1603 | mod_timer(&adapter->blink_timer, jiffies); | ||
1604 | |||
1605 | msleep_interruptible(data * 1000); | ||
1606 | del_timer_sync(&adapter->blink_timer); | ||
1607 | e1000_led_off(&adapter->hw); | 1648 | e1000_led_off(&adapter->hw); |
1608 | clear_bit(E1000_LED_ON, &adapter->led_status); | 1649 | clear_bit(E1000_LED_ON, &adapter->led_status); |
1609 | e1000_cleanup_led(&adapter->hw); | 1650 | e1000_cleanup_led(&adapter->hw); |
@@ -1614,7 +1655,7 @@ e1000_phys_id(struct net_device *netdev, uint32_t data) | |||
1614 | static int | 1655 | static int |
1615 | e1000_nway_reset(struct net_device *netdev) | 1656 | e1000_nway_reset(struct net_device *netdev) |
1616 | { | 1657 | { |
1617 | struct e1000_adapter *adapter = netdev->priv; | 1658 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1618 | if(netif_running(netdev)) { | 1659 | if(netif_running(netdev)) { |
1619 | e1000_down(adapter); | 1660 | e1000_down(adapter); |
1620 | e1000_up(adapter); | 1661 | e1000_up(adapter); |
@@ -1632,7 +1673,7 @@ static void | |||
1632 | e1000_get_ethtool_stats(struct net_device *netdev, | 1673 | e1000_get_ethtool_stats(struct net_device *netdev, |
1633 | struct ethtool_stats *stats, uint64_t *data) | 1674 | struct ethtool_stats *stats, uint64_t *data) |
1634 | { | 1675 | { |
1635 | struct e1000_adapter *adapter = netdev->priv; | 1676 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1636 | int i; | 1677 | int i; |
1637 | 1678 | ||
1638 | e1000_update_stats(adapter); | 1679 | e1000_update_stats(adapter); |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 723589b28be5..045f5426ab9a 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -354,18 +354,27 @@ e1000_set_media_type(struct e1000_hw *hw) | |||
354 | hw->media_type = e1000_media_type_internal_serdes; | 354 | hw->media_type = e1000_media_type_internal_serdes; |
355 | break; | 355 | break; |
356 | default: | 356 | default: |
357 | if(hw->mac_type >= e1000_82543) { | 357 | switch (hw->mac_type) { |
358 | case e1000_82542_rev2_0: | ||
359 | case e1000_82542_rev2_1: | ||
360 | hw->media_type = e1000_media_type_fiber; | ||
361 | break; | ||
362 | case e1000_82573: | ||
363 | /* The STATUS_TBIMODE bit is reserved or reused for the this | ||
364 | * device. | ||
365 | */ | ||
366 | hw->media_type = e1000_media_type_copper; | ||
367 | break; | ||
368 | default: | ||
358 | status = E1000_READ_REG(hw, STATUS); | 369 | status = E1000_READ_REG(hw, STATUS); |
359 | if(status & E1000_STATUS_TBIMODE) { | 370 | if (status & E1000_STATUS_TBIMODE) { |
360 | hw->media_type = e1000_media_type_fiber; | 371 | hw->media_type = e1000_media_type_fiber; |
361 | /* tbi_compatibility not valid on fiber */ | 372 | /* tbi_compatibility not valid on fiber */ |
362 | hw->tbi_compatibility_en = FALSE; | 373 | hw->tbi_compatibility_en = FALSE; |
363 | } else { | 374 | } else { |
364 | hw->media_type = e1000_media_type_copper; | 375 | hw->media_type = e1000_media_type_copper; |
365 | } | 376 | } |
366 | } else { | 377 | break; |
367 | /* This is an 82542 (fiber only) */ | ||
368 | hw->media_type = e1000_media_type_fiber; | ||
369 | } | 378 | } |
370 | } | 379 | } |
371 | } | 380 | } |
@@ -1189,9 +1198,9 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) | |||
1189 | ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data); | 1198 | ret_val = e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_data); |
1190 | if(ret_val) | 1199 | if(ret_val) |
1191 | return ret_val; | 1200 | return ret_val; |
1192 | } | 1201 | } |
1193 | 1202 | ||
1194 | return E1000_SUCCESS; | 1203 | return E1000_SUCCESS; |
1195 | } | 1204 | } |
1196 | 1205 | ||
1197 | 1206 | ||
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index a0263ee96c6b..93e9f8788751 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -66,6 +66,7 @@ typedef enum { | |||
66 | e1000_eeprom_spi, | 66 | e1000_eeprom_spi, |
67 | e1000_eeprom_microwire, | 67 | e1000_eeprom_microwire, |
68 | e1000_eeprom_flash, | 68 | e1000_eeprom_flash, |
69 | e1000_eeprom_none, /* No NVM support */ | ||
69 | e1000_num_eeprom_types | 70 | e1000_num_eeprom_types |
70 | } e1000_eeprom_type; | 71 | } e1000_eeprom_type; |
71 | 72 | ||
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 325495b8b60c..cb7f051a60ad 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -29,6 +29,8 @@ | |||
29 | #include "e1000.h" | 29 | #include "e1000.h" |
30 | 30 | ||
31 | /* Change Log | 31 | /* Change Log |
32 | * 6.0.58 4/20/05 | ||
33 | * o Accepted ethtool cleanup patch from Stephen Hemminger | ||
32 | * 6.0.44+ 2/15/05 | 34 | * 6.0.44+ 2/15/05 |
33 | * o applied Anton's patch to resolve tx hang in hardware | 35 | * o applied Anton's patch to resolve tx hang in hardware |
34 | * o Applied Andrew Mortons patch - e1000 stops working after resume | 36 | * o Applied Andrew Mortons patch - e1000 stops working after resume |
@@ -41,9 +43,9 @@ char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | |||
41 | #else | 43 | #else |
42 | #define DRIVERNAPI "-NAPI" | 44 | #define DRIVERNAPI "-NAPI" |
43 | #endif | 45 | #endif |
44 | #define DRV_VERSION "6.0.54-k2"DRIVERNAPI | 46 | #define DRV_VERSION "6.0.60-k2"DRIVERNAPI |
45 | char e1000_driver_version[] = DRV_VERSION; | 47 | char e1000_driver_version[] = DRV_VERSION; |
46 | char e1000_copyright[] = "Copyright (c) 1999-2004 Intel Corporation."; | 48 | char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; |
47 | 49 | ||
48 | /* e1000_pci_tbl - PCI Device ID Table | 50 | /* e1000_pci_tbl - PCI Device ID Table |
49 | * | 51 | * |
@@ -517,7 +519,7 @@ e1000_probe(struct pci_dev *pdev, | |||
517 | SET_NETDEV_DEV(netdev, &pdev->dev); | 519 | SET_NETDEV_DEV(netdev, &pdev->dev); |
518 | 520 | ||
519 | pci_set_drvdata(pdev, netdev); | 521 | pci_set_drvdata(pdev, netdev); |
520 | adapter = netdev->priv; | 522 | adapter = netdev_priv(netdev); |
521 | adapter->netdev = netdev; | 523 | adapter->netdev = netdev; |
522 | adapter->pdev = pdev; | 524 | adapter->pdev = pdev; |
523 | adapter->hw.back = adapter; | 525 | adapter->hw.back = adapter; |
@@ -738,7 +740,7 @@ static void __devexit | |||
738 | e1000_remove(struct pci_dev *pdev) | 740 | e1000_remove(struct pci_dev *pdev) |
739 | { | 741 | { |
740 | struct net_device *netdev = pci_get_drvdata(pdev); | 742 | struct net_device *netdev = pci_get_drvdata(pdev); |
741 | struct e1000_adapter *adapter = netdev->priv; | 743 | struct e1000_adapter *adapter = netdev_priv(netdev); |
742 | uint32_t manc, swsm; | 744 | uint32_t manc, swsm; |
743 | 745 | ||
744 | flush_scheduled_work(); | 746 | flush_scheduled_work(); |
@@ -871,7 +873,7 @@ e1000_sw_init(struct e1000_adapter *adapter) | |||
871 | static int | 873 | static int |
872 | e1000_open(struct net_device *netdev) | 874 | e1000_open(struct net_device *netdev) |
873 | { | 875 | { |
874 | struct e1000_adapter *adapter = netdev->priv; | 876 | struct e1000_adapter *adapter = netdev_priv(netdev); |
875 | int err; | 877 | int err; |
876 | 878 | ||
877 | /* allocate transmit descriptors */ | 879 | /* allocate transmit descriptors */ |
@@ -919,7 +921,7 @@ err_setup_tx: | |||
919 | static int | 921 | static int |
920 | e1000_close(struct net_device *netdev) | 922 | e1000_close(struct net_device *netdev) |
921 | { | 923 | { |
922 | struct e1000_adapter *adapter = netdev->priv; | 924 | struct e1000_adapter *adapter = netdev_priv(netdev); |
923 | 925 | ||
924 | e1000_down(adapter); | 926 | e1000_down(adapter); |
925 | 927 | ||
@@ -1599,7 +1601,7 @@ e1000_leave_82542_rst(struct e1000_adapter *adapter) | |||
1599 | static int | 1601 | static int |
1600 | e1000_set_mac(struct net_device *netdev, void *p) | 1602 | e1000_set_mac(struct net_device *netdev, void *p) |
1601 | { | 1603 | { |
1602 | struct e1000_adapter *adapter = netdev->priv; | 1604 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1603 | struct sockaddr *addr = p; | 1605 | struct sockaddr *addr = p; |
1604 | 1606 | ||
1605 | if(!is_valid_ether_addr(addr->sa_data)) | 1607 | if(!is_valid_ether_addr(addr->sa_data)) |
@@ -1634,7 +1636,7 @@ e1000_set_mac(struct net_device *netdev, void *p) | |||
1634 | static void | 1636 | static void |
1635 | e1000_set_multi(struct net_device *netdev) | 1637 | e1000_set_multi(struct net_device *netdev) |
1636 | { | 1638 | { |
1637 | struct e1000_adapter *adapter = netdev->priv; | 1639 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1638 | struct e1000_hw *hw = &adapter->hw; | 1640 | struct e1000_hw *hw = &adapter->hw; |
1639 | struct dev_mc_list *mc_ptr; | 1641 | struct dev_mc_list *mc_ptr; |
1640 | unsigned long flags; | 1642 | unsigned long flags; |
@@ -2213,7 +2215,7 @@ e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb) | |||
2213 | static int | 2215 | static int |
2214 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | 2216 | e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) |
2215 | { | 2217 | { |
2216 | struct e1000_adapter *adapter = netdev->priv; | 2218 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2217 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; | 2219 | unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD; |
2218 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; | 2220 | unsigned int max_txd_pwr = E1000_MAX_TXD_PWR; |
2219 | unsigned int tx_flags = 0; | 2221 | unsigned int tx_flags = 0; |
@@ -2307,6 +2309,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2307 | tso = e1000_tso(adapter, skb); | 2309 | tso = e1000_tso(adapter, skb); |
2308 | if (tso < 0) { | 2310 | if (tso < 0) { |
2309 | dev_kfree_skb_any(skb); | 2311 | dev_kfree_skb_any(skb); |
2312 | spin_unlock_irqrestore(&adapter->tx_lock, flags); | ||
2310 | return NETDEV_TX_OK; | 2313 | return NETDEV_TX_OK; |
2311 | } | 2314 | } |
2312 | 2315 | ||
@@ -2343,7 +2346,7 @@ e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |||
2343 | static void | 2346 | static void |
2344 | e1000_tx_timeout(struct net_device *netdev) | 2347 | e1000_tx_timeout(struct net_device *netdev) |
2345 | { | 2348 | { |
2346 | struct e1000_adapter *adapter = netdev->priv; | 2349 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2347 | 2350 | ||
2348 | /* Do the reset outside of interrupt context */ | 2351 | /* Do the reset outside of interrupt context */ |
2349 | schedule_work(&adapter->tx_timeout_task); | 2352 | schedule_work(&adapter->tx_timeout_task); |
@@ -2352,7 +2355,7 @@ e1000_tx_timeout(struct net_device *netdev) | |||
2352 | static void | 2355 | static void |
2353 | e1000_tx_timeout_task(struct net_device *netdev) | 2356 | e1000_tx_timeout_task(struct net_device *netdev) |
2354 | { | 2357 | { |
2355 | struct e1000_adapter *adapter = netdev->priv; | 2358 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2356 | 2359 | ||
2357 | e1000_down(adapter); | 2360 | e1000_down(adapter); |
2358 | e1000_up(adapter); | 2361 | e1000_up(adapter); |
@@ -2369,7 +2372,7 @@ e1000_tx_timeout_task(struct net_device *netdev) | |||
2369 | static struct net_device_stats * | 2372 | static struct net_device_stats * |
2370 | e1000_get_stats(struct net_device *netdev) | 2373 | e1000_get_stats(struct net_device *netdev) |
2371 | { | 2374 | { |
2372 | struct e1000_adapter *adapter = netdev->priv; | 2375 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2373 | 2376 | ||
2374 | e1000_update_stats(adapter); | 2377 | e1000_update_stats(adapter); |
2375 | return &adapter->net_stats; | 2378 | return &adapter->net_stats; |
@@ -2386,7 +2389,7 @@ e1000_get_stats(struct net_device *netdev) | |||
2386 | static int | 2389 | static int |
2387 | e1000_change_mtu(struct net_device *netdev, int new_mtu) | 2390 | e1000_change_mtu(struct net_device *netdev, int new_mtu) |
2388 | { | 2391 | { |
2389 | struct e1000_adapter *adapter = netdev->priv; | 2392 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2390 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; | 2393 | int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE; |
2391 | 2394 | ||
2392 | if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || | 2395 | if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) || |
@@ -2597,7 +2600,7 @@ static irqreturn_t | |||
2597 | e1000_intr(int irq, void *data, struct pt_regs *regs) | 2600 | e1000_intr(int irq, void *data, struct pt_regs *regs) |
2598 | { | 2601 | { |
2599 | struct net_device *netdev = data; | 2602 | struct net_device *netdev = data; |
2600 | struct e1000_adapter *adapter = netdev->priv; | 2603 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2601 | struct e1000_hw *hw = &adapter->hw; | 2604 | struct e1000_hw *hw = &adapter->hw; |
2602 | uint32_t icr = E1000_READ_REG(hw, ICR); | 2605 | uint32_t icr = E1000_READ_REG(hw, ICR); |
2603 | #ifndef CONFIG_E1000_NAPI | 2606 | #ifndef CONFIG_E1000_NAPI |
@@ -2660,7 +2663,7 @@ e1000_intr(int irq, void *data, struct pt_regs *regs) | |||
2660 | static int | 2663 | static int |
2661 | e1000_clean(struct net_device *netdev, int *budget) | 2664 | e1000_clean(struct net_device *netdev, int *budget) |
2662 | { | 2665 | { |
2663 | struct e1000_adapter *adapter = netdev->priv; | 2666 | struct e1000_adapter *adapter = netdev_priv(netdev); |
2664 | int work_to_do = min(*budget, netdev->quota); | 2667 | int work_to_do = min(*budget, netdev->quota); |
2665 | int tx_cleaned; | 2668 | int tx_cleaned; |
2666 | int work_done = 0; | 2669 | int work_done = 0; |
@@ -2671,8 +2674,8 @@ e1000_clean(struct net_device *netdev, int *budget) | |||
2671 | *budget -= work_done; | 2674 | *budget -= work_done; |
2672 | netdev->quota -= work_done; | 2675 | netdev->quota -= work_done; |
2673 | 2676 | ||
2674 | /* If no Tx and no Rx work done, exit the polling mode */ | ||
2675 | if ((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) { | 2677 | if ((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) { |
2678 | /* If no Tx and not enough Rx work done, exit the polling mode */ | ||
2676 | netif_rx_complete(netdev); | 2679 | netif_rx_complete(netdev); |
2677 | e1000_irq_enable(adapter); | 2680 | e1000_irq_enable(adapter); |
2678 | return 0; | 2681 | return 0; |
@@ -2768,13 +2771,13 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter) | |||
2768 | i = tx_ring->next_to_clean; | 2771 | i = tx_ring->next_to_clean; |
2769 | eop = tx_ring->buffer_info[i].next_to_watch; | 2772 | eop = tx_ring->buffer_info[i].next_to_watch; |
2770 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | 2773 | eop_desc = E1000_TX_DESC(*tx_ring, eop); |
2771 | DPRINTK(TX_ERR, ERR, "Detected Tx Unit Hang\n" | 2774 | DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n" |
2772 | " TDH <%x>\n" | 2775 | " TDH <%x>\n" |
2773 | " TDT <%x>\n" | 2776 | " TDT <%x>\n" |
2774 | " next_to_use <%x>\n" | 2777 | " next_to_use <%x>\n" |
2775 | " next_to_clean <%x>\n" | 2778 | " next_to_clean <%x>\n" |
2776 | "buffer_info[next_to_clean]\n" | 2779 | "buffer_info[next_to_clean]\n" |
2777 | " dma <%llx>\n" | 2780 | " dma <%zx>\n" |
2778 | " time_stamp <%lx>\n" | 2781 | " time_stamp <%lx>\n" |
2779 | " next_to_watch <%x>\n" | 2782 | " next_to_watch <%x>\n" |
2780 | " jiffies <%lx>\n" | 2783 | " jiffies <%lx>\n" |
@@ -2993,7 +2996,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter) | |||
2993 | 2996 | ||
2994 | i = rx_ring->next_to_clean; | 2997 | i = rx_ring->next_to_clean; |
2995 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | 2998 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
2996 | staterr = rx_desc->wb.middle.status_error; | 2999 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
2997 | 3000 | ||
2998 | while(staterr & E1000_RXD_STAT_DD) { | 3001 | while(staterr & E1000_RXD_STAT_DD) { |
2999 | buffer_info = &rx_ring->buffer_info[i]; | 3002 | buffer_info = &rx_ring->buffer_info[i]; |
@@ -3064,16 +3067,16 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter) | |||
3064 | #ifdef CONFIG_E1000_NAPI | 3067 | #ifdef CONFIG_E1000_NAPI |
3065 | if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { | 3068 | if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
3066 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, | 3069 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, |
3067 | le16_to_cpu(rx_desc->wb.middle.vlan & | 3070 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3068 | E1000_RXD_SPC_VLAN_MASK)); | 3071 | E1000_RXD_SPC_VLAN_MASK); |
3069 | } else { | 3072 | } else { |
3070 | netif_receive_skb(skb); | 3073 | netif_receive_skb(skb); |
3071 | } | 3074 | } |
3072 | #else /* CONFIG_E1000_NAPI */ | 3075 | #else /* CONFIG_E1000_NAPI */ |
3073 | if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { | 3076 | if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) { |
3074 | vlan_hwaccel_rx(skb, adapter->vlgrp, | 3077 | vlan_hwaccel_rx(skb, adapter->vlgrp, |
3075 | le16_to_cpu(rx_desc->wb.middle.vlan & | 3078 | le16_to_cpu(rx_desc->wb.middle.vlan) & |
3076 | E1000_RXD_SPC_VLAN_MASK)); | 3079 | E1000_RXD_SPC_VLAN_MASK); |
3077 | } else { | 3080 | } else { |
3078 | netif_rx(skb); | 3081 | netif_rx(skb); |
3079 | } | 3082 | } |
@@ -3086,7 +3089,7 @@ next_desc: | |||
3086 | if(unlikely(++i == rx_ring->count)) i = 0; | 3089 | if(unlikely(++i == rx_ring->count)) i = 0; |
3087 | 3090 | ||
3088 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); | 3091 | rx_desc = E1000_RX_DESC_PS(*rx_ring, i); |
3089 | staterr = rx_desc->wb.middle.status_error; | 3092 | staterr = le32_to_cpu(rx_desc->wb.middle.status_error); |
3090 | } | 3093 | } |
3091 | rx_ring->next_to_clean = i; | 3094 | rx_ring->next_to_clean = i; |
3092 | adapter->alloc_rx_buf(adapter); | 3095 | adapter->alloc_rx_buf(adapter); |
@@ -3370,11 +3373,12 @@ e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |||
3370 | static int | 3373 | static int |
3371 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | 3374 | e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) |
3372 | { | 3375 | { |
3373 | struct e1000_adapter *adapter = netdev->priv; | 3376 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3374 | struct mii_ioctl_data *data = if_mii(ifr); | 3377 | struct mii_ioctl_data *data = if_mii(ifr); |
3375 | int retval; | 3378 | int retval; |
3376 | uint16_t mii_reg; | 3379 | uint16_t mii_reg; |
3377 | uint16_t spddplx; | 3380 | uint16_t spddplx; |
3381 | unsigned long flags; | ||
3378 | 3382 | ||
3379 | if(adapter->hw.media_type != e1000_media_type_copper) | 3383 | if(adapter->hw.media_type != e1000_media_type_copper) |
3380 | return -EOPNOTSUPP; | 3384 | return -EOPNOTSUPP; |
@@ -3384,22 +3388,29 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |||
3384 | data->phy_id = adapter->hw.phy_addr; | 3388 | data->phy_id = adapter->hw.phy_addr; |
3385 | break; | 3389 | break; |
3386 | case SIOCGMIIREG: | 3390 | case SIOCGMIIREG: |
3387 | if (!capable(CAP_NET_ADMIN)) | 3391 | if(!capable(CAP_NET_ADMIN)) |
3388 | return -EPERM; | 3392 | return -EPERM; |
3389 | if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, | 3393 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3390 | &data->val_out)) | 3394 | if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F, |
3395 | &data->val_out)) { | ||
3396 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | ||
3391 | return -EIO; | 3397 | return -EIO; |
3398 | } | ||
3399 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | ||
3392 | break; | 3400 | break; |
3393 | case SIOCSMIIREG: | 3401 | case SIOCSMIIREG: |
3394 | if (!capable(CAP_NET_ADMIN)) | 3402 | if(!capable(CAP_NET_ADMIN)) |
3395 | return -EPERM; | 3403 | return -EPERM; |
3396 | if (data->reg_num & ~(0x1F)) | 3404 | if(data->reg_num & ~(0x1F)) |
3397 | return -EFAULT; | 3405 | return -EFAULT; |
3398 | mii_reg = data->val_in; | 3406 | mii_reg = data->val_in; |
3399 | if (e1000_write_phy_reg(&adapter->hw, data->reg_num, | 3407 | spin_lock_irqsave(&adapter->stats_lock, flags); |
3400 | mii_reg)) | 3408 | if(e1000_write_phy_reg(&adapter->hw, data->reg_num, |
3409 | mii_reg)) { | ||
3410 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | ||
3401 | return -EIO; | 3411 | return -EIO; |
3402 | if (adapter->hw.phy_type == e1000_phy_m88) { | 3412 | } |
3413 | if(adapter->hw.phy_type == e1000_phy_m88) { | ||
3403 | switch (data->reg_num) { | 3414 | switch (data->reg_num) { |
3404 | case PHY_CTRL: | 3415 | case PHY_CTRL: |
3405 | if(mii_reg & MII_CR_POWER_DOWN) | 3416 | if(mii_reg & MII_CR_POWER_DOWN) |
@@ -3419,8 +3430,12 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |||
3419 | HALF_DUPLEX; | 3430 | HALF_DUPLEX; |
3420 | retval = e1000_set_spd_dplx(adapter, | 3431 | retval = e1000_set_spd_dplx(adapter, |
3421 | spddplx); | 3432 | spddplx); |
3422 | if(retval) | 3433 | if(retval) { |
3434 | spin_unlock_irqrestore( | ||
3435 | &adapter->stats_lock, | ||
3436 | flags); | ||
3423 | return retval; | 3437 | return retval; |
3438 | } | ||
3424 | } | 3439 | } |
3425 | if(netif_running(adapter->netdev)) { | 3440 | if(netif_running(adapter->netdev)) { |
3426 | e1000_down(adapter); | 3441 | e1000_down(adapter); |
@@ -3430,8 +3445,11 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |||
3430 | break; | 3445 | break; |
3431 | case M88E1000_PHY_SPEC_CTRL: | 3446 | case M88E1000_PHY_SPEC_CTRL: |
3432 | case M88E1000_EXT_PHY_SPEC_CTRL: | 3447 | case M88E1000_EXT_PHY_SPEC_CTRL: |
3433 | if (e1000_phy_reset(&adapter->hw)) | 3448 | if(e1000_phy_reset(&adapter->hw)) { |
3449 | spin_unlock_irqrestore( | ||
3450 | &adapter->stats_lock, flags); | ||
3434 | return -EIO; | 3451 | return -EIO; |
3452 | } | ||
3435 | break; | 3453 | break; |
3436 | } | 3454 | } |
3437 | } else { | 3455 | } else { |
@@ -3447,6 +3465,7 @@ e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |||
3447 | break; | 3465 | break; |
3448 | } | 3466 | } |
3449 | } | 3467 | } |
3468 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | ||
3450 | break; | 3469 | break; |
3451 | default: | 3470 | default: |
3452 | return -EOPNOTSUPP; | 3471 | return -EOPNOTSUPP; |
@@ -3503,7 +3522,7 @@ e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value) | |||
3503 | static void | 3522 | static void |
3504 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | 3523 | e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) |
3505 | { | 3524 | { |
3506 | struct e1000_adapter *adapter = netdev->priv; | 3525 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3507 | uint32_t ctrl, rctl; | 3526 | uint32_t ctrl, rctl; |
3508 | 3527 | ||
3509 | e1000_irq_disable(adapter); | 3528 | e1000_irq_disable(adapter); |
@@ -3543,7 +3562,7 @@ e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |||
3543 | static void | 3562 | static void |
3544 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | 3563 | e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) |
3545 | { | 3564 | { |
3546 | struct e1000_adapter *adapter = netdev->priv; | 3565 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3547 | uint32_t vfta, index; | 3566 | uint32_t vfta, index; |
3548 | if((adapter->hw.mng_cookie.status & | 3567 | if((adapter->hw.mng_cookie.status & |
3549 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && | 3568 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) && |
@@ -3559,7 +3578,7 @@ e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid) | |||
3559 | static void | 3578 | static void |
3560 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) | 3579 | e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid) |
3561 | { | 3580 | { |
3562 | struct e1000_adapter *adapter = netdev->priv; | 3581 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3563 | uint32_t vfta, index; | 3582 | uint32_t vfta, index; |
3564 | 3583 | ||
3565 | e1000_irq_disable(adapter); | 3584 | e1000_irq_disable(adapter); |
@@ -3600,6 +3619,13 @@ e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx) | |||
3600 | { | 3619 | { |
3601 | adapter->hw.autoneg = 0; | 3620 | adapter->hw.autoneg = 0; |
3602 | 3621 | ||
3622 | /* Fiber NICs only allow 1000 gbps Full duplex */ | ||
3623 | if((adapter->hw.media_type == e1000_media_type_fiber) && | ||
3624 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { | ||
3625 | DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n"); | ||
3626 | return -EINVAL; | ||
3627 | } | ||
3628 | |||
3603 | switch(spddplx) { | 3629 | switch(spddplx) { |
3604 | case SPEED_10 + DUPLEX_HALF: | 3630 | case SPEED_10 + DUPLEX_HALF: |
3605 | adapter->hw.forced_speed_duplex = e1000_10_half; | 3631 | adapter->hw.forced_speed_duplex = e1000_10_half; |
@@ -3646,7 +3672,7 @@ static int | |||
3646 | e1000_suspend(struct pci_dev *pdev, uint32_t state) | 3672 | e1000_suspend(struct pci_dev *pdev, uint32_t state) |
3647 | { | 3673 | { |
3648 | struct net_device *netdev = pci_get_drvdata(pdev); | 3674 | struct net_device *netdev = pci_get_drvdata(pdev); |
3649 | struct e1000_adapter *adapter = netdev->priv; | 3675 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3650 | uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm; | 3676 | uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm; |
3651 | uint32_t wufc = adapter->wol; | 3677 | uint32_t wufc = adapter->wol; |
3652 | 3678 | ||
@@ -3739,12 +3765,12 @@ static int | |||
3739 | e1000_resume(struct pci_dev *pdev) | 3765 | e1000_resume(struct pci_dev *pdev) |
3740 | { | 3766 | { |
3741 | struct net_device *netdev = pci_get_drvdata(pdev); | 3767 | struct net_device *netdev = pci_get_drvdata(pdev); |
3742 | struct e1000_adapter *adapter = netdev->priv; | 3768 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3743 | uint32_t manc, ret, swsm; | 3769 | uint32_t manc, ret_val, swsm; |
3744 | 3770 | ||
3745 | pci_set_power_state(pdev, 0); | 3771 | pci_set_power_state(pdev, 0); |
3746 | pci_restore_state(pdev); | 3772 | pci_restore_state(pdev); |
3747 | ret = pci_enable_device(pdev); | 3773 | ret_val = pci_enable_device(pdev); |
3748 | pci_set_master(pdev); | 3774 | pci_set_master(pdev); |
3749 | 3775 | ||
3750 | pci_enable_wake(pdev, 3, 0); | 3776 | pci_enable_wake(pdev, 3, 0); |
@@ -3787,7 +3813,7 @@ e1000_resume(struct pci_dev *pdev) | |||
3787 | static void | 3813 | static void |
3788 | e1000_netpoll(struct net_device *netdev) | 3814 | e1000_netpoll(struct net_device *netdev) |
3789 | { | 3815 | { |
3790 | struct e1000_adapter *adapter = netdev->priv; | 3816 | struct e1000_adapter *adapter = netdev_priv(netdev); |
3791 | disable_irq(adapter->pdev->irq); | 3817 | disable_irq(adapter->pdev->irq); |
3792 | e1000_intr(adapter->pdev->irq, netdev, NULL); | 3818 | e1000_intr(adapter->pdev->irq, netdev, NULL); |
3793 | enable_irq(adapter->pdev->irq); | 3819 | enable_irq(adapter->pdev->irq); |
diff --git a/drivers/net/e2100.c b/drivers/net/e2100.c index 51c9fa260830..f5a4dd7d8564 100644 --- a/drivers/net/e2100.c +++ b/drivers/net/e2100.c | |||
@@ -162,12 +162,7 @@ struct net_device * __init e2100_probe(int unit) | |||
162 | err = do_e2100_probe(dev); | 162 | err = do_e2100_probe(dev); |
163 | if (err) | 163 | if (err) |
164 | goto out; | 164 | goto out; |
165 | err = register_netdev(dev); | ||
166 | if (err) | ||
167 | goto out1; | ||
168 | return dev; | 165 | return dev; |
169 | out1: | ||
170 | cleanup_card(dev); | ||
171 | out: | 166 | out: |
172 | free_netdev(dev); | 167 | free_netdev(dev); |
173 | return ERR_PTR(err); | 168 | return ERR_PTR(err); |
@@ -286,6 +281,9 @@ static int __init e21_probe1(struct net_device *dev, int ioaddr) | |||
286 | #endif | 281 | #endif |
287 | NS8390_init(dev, 0); | 282 | NS8390_init(dev, 0); |
288 | 283 | ||
284 | retval = register_netdev(dev); | ||
285 | if (retval) | ||
286 | goto out; | ||
289 | return 0; | 287 | return 0; |
290 | out: | 288 | out: |
291 | release_region(ioaddr, E21_IO_EXTENT); | 289 | release_region(ioaddr, E21_IO_EXTENT); |
@@ -453,11 +451,8 @@ init_module(void) | |||
453 | dev->mem_start = mem[this_dev]; | 451 | dev->mem_start = mem[this_dev]; |
454 | dev->mem_end = xcvr[this_dev]; /* low 4bits = xcvr sel. */ | 452 | dev->mem_end = xcvr[this_dev]; /* low 4bits = xcvr sel. */ |
455 | if (do_e2100_probe(dev) == 0) { | 453 | if (do_e2100_probe(dev) == 0) { |
456 | if (register_netdev(dev) == 0) { | 454 | dev_e21[found++] = dev; |
457 | dev_e21[found++] = dev; | 455 | continue; |
458 | continue; | ||
459 | } | ||
460 | cleanup_card(dev); | ||
461 | } | 456 | } |
462 | free_netdev(dev); | 457 | free_netdev(dev); |
463 | printk(KERN_WARNING "e2100.c: No E2100 card found (i/o = 0x%x).\n", io[this_dev]); | 458 | printk(KERN_WARNING "e2100.c: No E2100 card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/eepro.c b/drivers/net/eepro.c index cd2475683027..dcb3028bb60f 100644 --- a/drivers/net/eepro.c +++ b/drivers/net/eepro.c | |||
@@ -600,12 +600,7 @@ struct net_device * __init eepro_probe(int unit) | |||
600 | err = do_eepro_probe(dev); | 600 | err = do_eepro_probe(dev); |
601 | if (err) | 601 | if (err) |
602 | goto out; | 602 | goto out; |
603 | err = register_netdev(dev); | ||
604 | if (err) | ||
605 | goto out1; | ||
606 | return dev; | 603 | return dev; |
607 | out1: | ||
608 | release_region(dev->base_addr, EEPRO_IO_EXTENT); | ||
609 | out: | 604 | out: |
610 | free_netdev(dev); | 605 | free_netdev(dev); |
611 | return ERR_PTR(err); | 606 | return ERR_PTR(err); |
@@ -758,6 +753,7 @@ static int __init eepro_probe1(struct net_device *dev, int autoprobe) | |||
758 | int i; | 753 | int i; |
759 | struct eepro_local *lp; | 754 | struct eepro_local *lp; |
760 | int ioaddr = dev->base_addr; | 755 | int ioaddr = dev->base_addr; |
756 | int err; | ||
761 | 757 | ||
762 | /* Grab the region so we can find another board if autoIRQ fails. */ | 758 | /* Grab the region so we can find another board if autoIRQ fails. */ |
763 | if (!request_region(ioaddr, EEPRO_IO_EXTENT, DRV_NAME)) { | 759 | if (!request_region(ioaddr, EEPRO_IO_EXTENT, DRV_NAME)) { |
@@ -873,10 +869,16 @@ static int __init eepro_probe1(struct net_device *dev, int autoprobe) | |||
873 | 869 | ||
874 | /* reset 82595 */ | 870 | /* reset 82595 */ |
875 | eepro_reset(ioaddr); | 871 | eepro_reset(ioaddr); |
872 | |||
873 | err = register_netdev(dev); | ||
874 | if (err) | ||
875 | goto err; | ||
876 | return 0; | 876 | return 0; |
877 | exit: | 877 | exit: |
878 | err = -ENODEV; | ||
879 | err: | ||
878 | release_region(dev->base_addr, EEPRO_IO_EXTENT); | 880 | release_region(dev->base_addr, EEPRO_IO_EXTENT); |
879 | return -ENODEV; | 881 | return err; |
880 | } | 882 | } |
881 | 883 | ||
882 | /* Open/initialize the board. This is called (in the current kernel) | 884 | /* Open/initialize the board. This is called (in the current kernel) |
@@ -1834,11 +1836,8 @@ init_module(void) | |||
1834 | dev->irq = irq[i]; | 1836 | dev->irq = irq[i]; |
1835 | 1837 | ||
1836 | if (do_eepro_probe(dev) == 0) { | 1838 | if (do_eepro_probe(dev) == 0) { |
1837 | if (register_netdev(dev) == 0) { | 1839 | dev_eepro[n_eepro++] = dev; |
1838 | dev_eepro[n_eepro++] = dev; | 1840 | continue; |
1839 | continue; | ||
1840 | } | ||
1841 | release_region(dev->base_addr, EEPRO_IO_EXTENT); | ||
1842 | } | 1841 | } |
1843 | free_netdev(dev); | 1842 | free_netdev(dev); |
1844 | break; | 1843 | break; |
diff --git a/drivers/net/eepro100.c b/drivers/net/eepro100.c index 98b3a2fdce90..1795425f512e 100644 --- a/drivers/net/eepro100.c +++ b/drivers/net/eepro100.c | |||
@@ -1269,7 +1269,7 @@ speedo_init_rx_ring(struct net_device *dev) | |||
1269 | if (skb == NULL) | 1269 | if (skb == NULL) |
1270 | break; /* OK. Just initially short of Rx bufs. */ | 1270 | break; /* OK. Just initially short of Rx bufs. */ |
1271 | skb->dev = dev; /* Mark as being used by this device. */ | 1271 | skb->dev = dev; /* Mark as being used by this device. */ |
1272 | rxf = (struct RxFD *)skb->tail; | 1272 | rxf = (struct RxFD *)skb->data; |
1273 | sp->rx_ringp[i] = rxf; | 1273 | sp->rx_ringp[i] = rxf; |
1274 | sp->rx_ring_dma[i] = | 1274 | sp->rx_ring_dma[i] = |
1275 | pci_map_single(sp->pdev, rxf, | 1275 | pci_map_single(sp->pdev, rxf, |
@@ -1661,7 +1661,7 @@ static inline struct RxFD *speedo_rx_alloc(struct net_device *dev, int entry) | |||
1661 | sp->rx_ringp[entry] = NULL; | 1661 | sp->rx_ringp[entry] = NULL; |
1662 | return NULL; | 1662 | return NULL; |
1663 | } | 1663 | } |
1664 | rxf = sp->rx_ringp[entry] = (struct RxFD *)skb->tail; | 1664 | rxf = sp->rx_ringp[entry] = (struct RxFD *)skb->data; |
1665 | sp->rx_ring_dma[entry] = | 1665 | sp->rx_ring_dma[entry] = |
1666 | pci_map_single(sp->pdev, rxf, | 1666 | pci_map_single(sp->pdev, rxf, |
1667 | PKT_BUF_SZ + sizeof(struct RxFD), PCI_DMA_FROMDEVICE); | 1667 | PKT_BUF_SZ + sizeof(struct RxFD), PCI_DMA_FROMDEVICE); |
@@ -1808,10 +1808,10 @@ speedo_rx(struct net_device *dev) | |||
1808 | 1808 | ||
1809 | #if 1 || USE_IP_CSUM | 1809 | #if 1 || USE_IP_CSUM |
1810 | /* Packet is in one chunk -- we can copy + cksum. */ | 1810 | /* Packet is in one chunk -- we can copy + cksum. */ |
1811 | eth_copy_and_sum(skb, sp->rx_skbuff[entry]->tail, pkt_len, 0); | 1811 | eth_copy_and_sum(skb, sp->rx_skbuff[entry]->data, pkt_len, 0); |
1812 | skb_put(skb, pkt_len); | 1812 | skb_put(skb, pkt_len); |
1813 | #else | 1813 | #else |
1814 | memcpy(skb_put(skb, pkt_len), sp->rx_skbuff[entry]->tail, | 1814 | memcpy(skb_put(skb, pkt_len), sp->rx_skbuff[entry]->data, |
1815 | pkt_len); | 1815 | pkt_len); |
1816 | #endif | 1816 | #endif |
1817 | pci_dma_sync_single_for_device(sp->pdev, sp->rx_ring_dma[entry], | 1817 | pci_dma_sync_single_for_device(sp->pdev, sp->rx_ring_dma[entry], |
diff --git a/drivers/net/eexpress.c b/drivers/net/eexpress.c index fc8e7947b334..82bd356e4f3a 100644 --- a/drivers/net/eexpress.c +++ b/drivers/net/eexpress.c | |||
@@ -436,11 +436,8 @@ struct net_device * __init express_probe(int unit) | |||
436 | netdev_boot_setup_check(dev); | 436 | netdev_boot_setup_check(dev); |
437 | 437 | ||
438 | err = do_express_probe(dev); | 438 | err = do_express_probe(dev); |
439 | if (!err) { | 439 | if (!err) |
440 | err = register_netdev(dev); | 440 | return dev; |
441 | if (!err) | ||
442 | return dev; | ||
443 | } | ||
444 | free_netdev(dev); | 441 | free_netdev(dev); |
445 | return ERR_PTR(err); | 442 | return ERR_PTR(err); |
446 | } | 443 | } |
@@ -1205,7 +1202,8 @@ static int __init eexp_hw_probe(struct net_device *dev, unsigned short ioaddr) | |||
1205 | dev->set_multicast_list = &eexp_set_multicast; | 1202 | dev->set_multicast_list = &eexp_set_multicast; |
1206 | dev->tx_timeout = eexp_timeout; | 1203 | dev->tx_timeout = eexp_timeout; |
1207 | dev->watchdog_timeo = 2*HZ; | 1204 | dev->watchdog_timeo = 2*HZ; |
1208 | return 0; | 1205 | |
1206 | return register_netdev(dev); | ||
1209 | } | 1207 | } |
1210 | 1208 | ||
1211 | /* | 1209 | /* |
@@ -1716,7 +1714,7 @@ int init_module(void) | |||
1716 | break; | 1714 | break; |
1717 | printk(KERN_NOTICE "eexpress.c: Module autoprobe not recommended, give io=xx.\n"); | 1715 | printk(KERN_NOTICE "eexpress.c: Module autoprobe not recommended, give io=xx.\n"); |
1718 | } | 1716 | } |
1719 | if (do_express_probe(dev) == 0 && register_netdev(dev) == 0) { | 1717 | if (do_express_probe(dev) == 0) { |
1720 | dev_eexp[this_dev] = dev; | 1718 | dev_eexp[this_dev] = dev; |
1721 | found++; | 1719 | found++; |
1722 | continue; | 1720 | continue; |
diff --git a/drivers/net/epic100.c b/drivers/net/epic100.c index 81ebaedaa240..87f522738bfc 100644 --- a/drivers/net/epic100.c +++ b/drivers/net/epic100.c | |||
@@ -1003,7 +1003,7 @@ static void epic_init_ring(struct net_device *dev) | |||
1003 | skb->dev = dev; /* Mark as being used by this device. */ | 1003 | skb->dev = dev; /* Mark as being used by this device. */ |
1004 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ | 1004 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
1005 | ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev, | 1005 | ep->rx_ring[i].bufaddr = pci_map_single(ep->pci_dev, |
1006 | skb->tail, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1006 | skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1007 | ep->rx_ring[i].rxstatus = cpu_to_le32(DescOwn); | 1007 | ep->rx_ring[i].rxstatus = cpu_to_le32(DescOwn); |
1008 | } | 1008 | } |
1009 | ep->dirty_rx = (unsigned int)(i - RX_RING_SIZE); | 1009 | ep->dirty_rx = (unsigned int)(i - RX_RING_SIZE); |
@@ -1274,7 +1274,7 @@ static int epic_rx(struct net_device *dev, int budget) | |||
1274 | ep->rx_ring[entry].bufaddr, | 1274 | ep->rx_ring[entry].bufaddr, |
1275 | ep->rx_buf_sz, | 1275 | ep->rx_buf_sz, |
1276 | PCI_DMA_FROMDEVICE); | 1276 | PCI_DMA_FROMDEVICE); |
1277 | eth_copy_and_sum(skb, ep->rx_skbuff[entry]->tail, pkt_len, 0); | 1277 | eth_copy_and_sum(skb, ep->rx_skbuff[entry]->data, pkt_len, 0); |
1278 | skb_put(skb, pkt_len); | 1278 | skb_put(skb, pkt_len); |
1279 | pci_dma_sync_single_for_device(ep->pci_dev, | 1279 | pci_dma_sync_single_for_device(ep->pci_dev, |
1280 | ep->rx_ring[entry].bufaddr, | 1280 | ep->rx_ring[entry].bufaddr, |
@@ -1308,7 +1308,7 @@ static int epic_rx(struct net_device *dev, int budget) | |||
1308 | skb->dev = dev; /* Mark as being used by this device. */ | 1308 | skb->dev = dev; /* Mark as being used by this device. */ |
1309 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1309 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1310 | ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, | 1310 | ep->rx_ring[entry].bufaddr = pci_map_single(ep->pci_dev, |
1311 | skb->tail, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1311 | skb->data, ep->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1312 | work_done++; | 1312 | work_done++; |
1313 | } | 1313 | } |
1314 | ep->rx_ring[entry].rxstatus = cpu_to_le32(DescOwn); | 1314 | ep->rx_ring[entry].rxstatus = cpu_to_le32(DescOwn); |
diff --git a/drivers/net/eql.c b/drivers/net/eql.c index dd6865820372..aa1569182fd6 100644 --- a/drivers/net/eql.c +++ b/drivers/net/eql.c | |||
@@ -132,7 +132,7 @@ static struct net_device_stats *eql_get_stats(struct net_device *dev); | |||
132 | #define eql_is_slave(dev) ((dev->flags & IFF_SLAVE) == IFF_SLAVE) | 132 | #define eql_is_slave(dev) ((dev->flags & IFF_SLAVE) == IFF_SLAVE) |
133 | #define eql_is_master(dev) ((dev->flags & IFF_MASTER) == IFF_MASTER) | 133 | #define eql_is_master(dev) ((dev->flags & IFF_MASTER) == IFF_MASTER) |
134 | 134 | ||
135 | static void eql_kill_one_slave(slave_t *slave); | 135 | static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave); |
136 | 136 | ||
137 | static void eql_timer(unsigned long param) | 137 | static void eql_timer(unsigned long param) |
138 | { | 138 | { |
@@ -149,7 +149,7 @@ static void eql_timer(unsigned long param) | |||
149 | if (slave->bytes_queued < 0) | 149 | if (slave->bytes_queued < 0) |
150 | slave->bytes_queued = 0; | 150 | slave->bytes_queued = 0; |
151 | } else { | 151 | } else { |
152 | eql_kill_one_slave(slave); | 152 | eql_kill_one_slave(&eql->queue, slave); |
153 | } | 153 | } |
154 | 154 | ||
155 | } | 155 | } |
@@ -214,9 +214,10 @@ static int eql_open(struct net_device *dev) | |||
214 | return 0; | 214 | return 0; |
215 | } | 215 | } |
216 | 216 | ||
217 | static void eql_kill_one_slave(slave_t *slave) | 217 | static void eql_kill_one_slave(slave_queue_t *queue, slave_t *slave) |
218 | { | 218 | { |
219 | list_del(&slave->list); | 219 | list_del(&slave->list); |
220 | queue->num_slaves--; | ||
220 | slave->dev->flags &= ~IFF_SLAVE; | 221 | slave->dev->flags &= ~IFF_SLAVE; |
221 | dev_put(slave->dev); | 222 | dev_put(slave->dev); |
222 | kfree(slave); | 223 | kfree(slave); |
@@ -232,8 +233,7 @@ static void eql_kill_slave_queue(slave_queue_t *queue) | |||
232 | list_for_each_safe(this, tmp, head) { | 233 | list_for_each_safe(this, tmp, head) { |
233 | slave_t *s = list_entry(this, slave_t, list); | 234 | slave_t *s = list_entry(this, slave_t, list); |
234 | 235 | ||
235 | eql_kill_one_slave(s); | 236 | eql_kill_one_slave(queue, s); |
236 | queue->num_slaves--; | ||
237 | } | 237 | } |
238 | 238 | ||
239 | spin_unlock_bh(&queue->lock); | 239 | spin_unlock_bh(&queue->lock); |
@@ -318,7 +318,7 @@ static slave_t *__eql_schedule_slaves(slave_queue_t *queue) | |||
318 | } | 318 | } |
319 | } else { | 319 | } else { |
320 | /* We found a dead slave, kill it. */ | 320 | /* We found a dead slave, kill it. */ |
321 | eql_kill_one_slave(slave); | 321 | eql_kill_one_slave(queue, slave); |
322 | } | 322 | } |
323 | } | 323 | } |
324 | return best_slave; | 324 | return best_slave; |
@@ -393,7 +393,7 @@ static int __eql_insert_slave(slave_queue_t *queue, slave_t *slave) | |||
393 | 393 | ||
394 | duplicate_slave = __eql_find_slave_dev(queue, slave->dev); | 394 | duplicate_slave = __eql_find_slave_dev(queue, slave->dev); |
395 | if (duplicate_slave != 0) | 395 | if (duplicate_slave != 0) |
396 | eql_kill_one_slave(duplicate_slave); | 396 | eql_kill_one_slave(queue, duplicate_slave); |
397 | 397 | ||
398 | list_add(&slave->list, &queue->all_slaves); | 398 | list_add(&slave->list, &queue->all_slaves); |
399 | queue->num_slaves++; | 399 | queue->num_slaves++; |
@@ -471,7 +471,7 @@ static int eql_emancipate(struct net_device *master_dev, slaving_request_t __use | |||
471 | slave_dev); | 471 | slave_dev); |
472 | 472 | ||
473 | if (slave) { | 473 | if (slave) { |
474 | eql_kill_one_slave(slave); | 474 | eql_kill_one_slave(&eql->queue, slave); |
475 | ret = 0; | 475 | ret = 0; |
476 | } | 476 | } |
477 | } | 477 | } |
diff --git a/drivers/net/es3210.c b/drivers/net/es3210.c index f1e8150ed2a0..50f8e23bb9e5 100644 --- a/drivers/net/es3210.c +++ b/drivers/net/es3210.c | |||
@@ -177,12 +177,7 @@ struct net_device * __init es_probe(int unit) | |||
177 | err = do_es_probe(dev); | 177 | err = do_es_probe(dev); |
178 | if (err) | 178 | if (err) |
179 | goto out; | 179 | goto out; |
180 | err = register_netdev(dev); | ||
181 | if (err) | ||
182 | goto out1; | ||
183 | return dev; | 180 | return dev; |
184 | out1: | ||
185 | cleanup_card(dev); | ||
186 | out: | 181 | out: |
187 | free_netdev(dev); | 182 | free_netdev(dev); |
188 | return ERR_PTR(err); | 183 | return ERR_PTR(err); |
@@ -310,6 +305,10 @@ static int __init es_probe1(struct net_device *dev, int ioaddr) | |||
310 | dev->poll_controller = ei_poll; | 305 | dev->poll_controller = ei_poll; |
311 | #endif | 306 | #endif |
312 | NS8390_init(dev, 0); | 307 | NS8390_init(dev, 0); |
308 | |||
309 | retval = register_netdev(dev); | ||
310 | if (retval) | ||
311 | goto out1; | ||
313 | return 0; | 312 | return 0; |
314 | out1: | 313 | out1: |
315 | free_irq(dev->irq, dev); | 314 | free_irq(dev->irq, dev); |
@@ -445,11 +444,8 @@ init_module(void) | |||
445 | dev->base_addr = io[this_dev]; | 444 | dev->base_addr = io[this_dev]; |
446 | dev->mem_start = mem[this_dev]; | 445 | dev->mem_start = mem[this_dev]; |
447 | if (do_es_probe(dev) == 0) { | 446 | if (do_es_probe(dev) == 0) { |
448 | if (register_netdev(dev) == 0) { | 447 | dev_es3210[found++] = dev; |
449 | dev_es3210[found++] = dev; | 448 | continue; |
450 | continue; | ||
451 | } | ||
452 | cleanup_card(dev); | ||
453 | } | 449 | } |
454 | free_netdev(dev); | 450 | free_netdev(dev); |
455 | printk(KERN_WARNING "es3210.c: No es3210 card found (i/o = 0x%x).\n", io[this_dev]); | 451 | printk(KERN_WARNING "es3210.c: No es3210 card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/eth16i.c b/drivers/net/eth16i.c index ccae6ba5f7c5..f32a6b3acb2a 100644 --- a/drivers/net/eth16i.c +++ b/drivers/net/eth16i.c | |||
@@ -473,13 +473,7 @@ struct net_device * __init eth16i_probe(int unit) | |||
473 | err = do_eth16i_probe(dev); | 473 | err = do_eth16i_probe(dev); |
474 | if (err) | 474 | if (err) |
475 | goto out; | 475 | goto out; |
476 | err = register_netdev(dev); | ||
477 | if (err) | ||
478 | goto out1; | ||
479 | return dev; | 476 | return dev; |
480 | out1: | ||
481 | free_irq(dev->irq, dev); | ||
482 | release_region(dev->base_addr, ETH16I_IO_EXTENT); | ||
483 | out: | 477 | out: |
484 | free_netdev(dev); | 478 | free_netdev(dev); |
485 | return ERR_PTR(err); | 479 | return ERR_PTR(err); |
@@ -569,7 +563,13 @@ static int __init eth16i_probe1(struct net_device *dev, int ioaddr) | |||
569 | dev->tx_timeout = eth16i_timeout; | 563 | dev->tx_timeout = eth16i_timeout; |
570 | dev->watchdog_timeo = TX_TIMEOUT; | 564 | dev->watchdog_timeo = TX_TIMEOUT; |
571 | spin_lock_init(&lp->lock); | 565 | spin_lock_init(&lp->lock); |
566 | |||
567 | retval = register_netdev(dev); | ||
568 | if (retval) | ||
569 | goto out1; | ||
572 | return 0; | 570 | return 0; |
571 | out1: | ||
572 | free_irq(dev->irq, dev); | ||
573 | out: | 573 | out: |
574 | release_region(ioaddr, ETH16I_IO_EXTENT); | 574 | release_region(ioaddr, ETH16I_IO_EXTENT); |
575 | return retval; | 575 | return retval; |
@@ -1462,12 +1462,8 @@ int init_module(void) | |||
1462 | } | 1462 | } |
1463 | 1463 | ||
1464 | if (do_eth16i_probe(dev) == 0) { | 1464 | if (do_eth16i_probe(dev) == 0) { |
1465 | if (register_netdev(dev) == 0) { | 1465 | dev_eth16i[found++] = dev; |
1466 | dev_eth16i[found++] = dev; | 1466 | continue; |
1467 | continue; | ||
1468 | } | ||
1469 | free_irq(dev->irq, dev); | ||
1470 | release_region(dev->base_addr, ETH16I_IO_EXTENT); | ||
1471 | } | 1467 | } |
1472 | printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n", | 1468 | printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n", |
1473 | io[this_dev]); | 1469 | io[this_dev]); |
diff --git a/drivers/net/ewrk3.c b/drivers/net/ewrk3.c index dcf969b20be9..b987f9474730 100644 --- a/drivers/net/ewrk3.c +++ b/drivers/net/ewrk3.c | |||
@@ -1308,15 +1308,9 @@ static int __init eisa_probe(struct net_device *dev, u_long ioaddr) | |||
1308 | if (ioaddr < 0x1000) | 1308 | if (ioaddr < 0x1000) |
1309 | goto out; | 1309 | goto out; |
1310 | 1310 | ||
1311 | if (ioaddr == 0) { /* Autoprobing */ | 1311 | iobase = ioaddr; |
1312 | iobase = EISA_SLOT_INC; /* Get the first slot address */ | 1312 | i = (ioaddr >> 12); |
1313 | i = 1; | 1313 | maxSlots = i + 1; |
1314 | maxSlots = MAX_EISA_SLOTS; | ||
1315 | } else { /* Probe a specific location */ | ||
1316 | iobase = ioaddr; | ||
1317 | i = (ioaddr >> 12); | ||
1318 | maxSlots = i + 1; | ||
1319 | } | ||
1320 | 1314 | ||
1321 | for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) { | 1315 | for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) { |
1322 | if (EISA_signature(name, EISA_ID) == 0) { | 1316 | if (EISA_signature(name, EISA_ID) == 0) { |
diff --git a/drivers/net/fealnx.c b/drivers/net/fealnx.c index d05e9dd1e140..55dbe9a3fd56 100644 --- a/drivers/net/fealnx.c +++ b/drivers/net/fealnx.c | |||
@@ -1107,7 +1107,7 @@ static void allocate_rx_buffers(struct net_device *dev) | |||
1107 | 1107 | ||
1108 | skb->dev = dev; /* Mark as being used by this device. */ | 1108 | skb->dev = dev; /* Mark as being used by this device. */ |
1109 | np->lack_rxbuf->skbuff = skb; | 1109 | np->lack_rxbuf->skbuff = skb; |
1110 | np->lack_rxbuf->buffer = pci_map_single(np->pci_dev, skb->tail, | 1110 | np->lack_rxbuf->buffer = pci_map_single(np->pci_dev, skb->data, |
1111 | np->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1111 | np->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1112 | np->lack_rxbuf->status = RXOWN; | 1112 | np->lack_rxbuf->status = RXOWN; |
1113 | ++np->really_rx_count; | 1113 | ++np->really_rx_count; |
@@ -1300,7 +1300,7 @@ static void init_ring(struct net_device *dev) | |||
1300 | ++np->really_rx_count; | 1300 | ++np->really_rx_count; |
1301 | np->rx_ring[i].skbuff = skb; | 1301 | np->rx_ring[i].skbuff = skb; |
1302 | skb->dev = dev; /* Mark as being used by this device. */ | 1302 | skb->dev = dev; /* Mark as being used by this device. */ |
1303 | np->rx_ring[i].buffer = pci_map_single(np->pci_dev, skb->tail, | 1303 | np->rx_ring[i].buffer = pci_map_single(np->pci_dev, skb->data, |
1304 | np->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1304 | np->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1305 | np->rx_ring[i].status = RXOWN; | 1305 | np->rx_ring[i].status = RXOWN; |
1306 | np->rx_ring[i].control |= RXIC; | 1306 | np->rx_ring[i].control |= RXIC; |
@@ -1423,8 +1423,7 @@ static void reset_tx_descriptors(struct net_device *dev) | |||
1423 | if (cur->skbuff) { | 1423 | if (cur->skbuff) { |
1424 | pci_unmap_single(np->pci_dev, cur->buffer, | 1424 | pci_unmap_single(np->pci_dev, cur->buffer, |
1425 | cur->skbuff->len, PCI_DMA_TODEVICE); | 1425 | cur->skbuff->len, PCI_DMA_TODEVICE); |
1426 | dev_kfree_skb(cur->skbuff); | 1426 | dev_kfree_skb_any(cur->skbuff); |
1427 | /* or dev_kfree_skb_irq(cur->skbuff); ? */ | ||
1428 | cur->skbuff = NULL; | 1427 | cur->skbuff = NULL; |
1429 | } | 1428 | } |
1430 | cur->status = 0; | 1429 | cur->status = 0; |
@@ -1738,11 +1737,11 @@ static int netdev_rx(struct net_device *dev) | |||
1738 | 1737 | ||
1739 | #if ! defined(__alpha__) | 1738 | #if ! defined(__alpha__) |
1740 | eth_copy_and_sum(skb, | 1739 | eth_copy_and_sum(skb, |
1741 | np->cur_rx->skbuff->tail, pkt_len, 0); | 1740 | np->cur_rx->skbuff->data, pkt_len, 0); |
1742 | skb_put(skb, pkt_len); | 1741 | skb_put(skb, pkt_len); |
1743 | #else | 1742 | #else |
1744 | memcpy(skb_put(skb, pkt_len), | 1743 | memcpy(skb_put(skb, pkt_len), |
1745 | np->cur_rx->skbuff->tail, pkt_len); | 1744 | np->cur_rx->skbuff->data, pkt_len); |
1746 | #endif | 1745 | #endif |
1747 | pci_dma_sync_single_for_device(np->pci_dev, | 1746 | pci_dma_sync_single_for_device(np->pci_dev, |
1748 | np->cur_rx->buffer, | 1747 | np->cur_rx->buffer, |
diff --git a/drivers/net/fmv18x.c b/drivers/net/fmv18x.c deleted file mode 100644 index 04c748523471..000000000000 --- a/drivers/net/fmv18x.c +++ /dev/null | |||
@@ -1,689 +0,0 @@ | |||
1 | /* fmv18x.c: A network device driver for the Fujitsu FMV-181/182/183/184. | ||
2 | |||
3 | Original: at1700.c (1993-94 by Donald Becker). | ||
4 | Copyright 1993 United States Government as represented by the | ||
5 | Director, National Security Agency. | ||
6 | The author may be reached as becker@scyld.com, or C/O | ||
7 | Scyld Computing Corporation | ||
8 | 410 Severn Ave., Suite 210 | ||
9 | Annapolis MD 21403 | ||
10 | |||
11 | Modified by Yutaka TAMIYA (tamy@flab.fujitsu.co.jp) | ||
12 | Copyright 1994 Fujitsu Laboratories Ltd. | ||
13 | Special thanks to: | ||
14 | Masayoshi UTAKA (utaka@ace.yk.fujitsu.co.jp) | ||
15 | for testing this driver. | ||
16 | H. NEGISHI (agy, negishi@sun45.psd.cs.fujitsu.co.jp) | ||
17 | for suggestion of some program modification. | ||
18 | Masahiro SEKIGUCHI <seki@sysrap.cs.fujitsu.co.jp> | ||
19 | for suggestion of some program modification. | ||
20 | Kazutoshi MORIOKA (morioka@aurora.oaks.cs.fujitsu.co.jp) | ||
21 | for testing this driver. | ||
22 | |||
23 | This software may be used and distributed according to the terms | ||
24 | of the GNU General Public License, incorporated herein by reference. | ||
25 | |||
26 | This is a device driver for the Fujitsu FMV-181/182/183/184, which | ||
27 | is a straight-forward Fujitsu MB86965 implementation. | ||
28 | |||
29 | Sources: | ||
30 | at1700.c | ||
31 | The Fujitsu MB86965 datasheet. | ||
32 | The Fujitsu FMV-181/182 user's guide | ||
33 | */ | ||
34 | |||
35 | static const char version[] = | ||
36 | "fmv18x.c:v2.2.0 09/24/98 Yutaka TAMIYA (tamy@flab.fujitsu.co.jp)\n"; | ||
37 | |||
38 | #include <linux/module.h> | ||
39 | #include <linux/kernel.h> | ||
40 | #include <linux/types.h> | ||
41 | #include <linux/fcntl.h> | ||
42 | #include <linux/interrupt.h> | ||
43 | #include <linux/ioport.h> | ||
44 | #include <linux/in.h> | ||
45 | #include <linux/slab.h> | ||
46 | #include <linux/string.h> | ||
47 | #include <linux/init.h> | ||
48 | #include <linux/errno.h> | ||
49 | #include <linux/spinlock.h> | ||
50 | #include <linux/netdevice.h> | ||
51 | #include <linux/etherdevice.h> | ||
52 | #include <linux/skbuff.h> | ||
53 | #include <linux/delay.h> | ||
54 | #include <linux/bitops.h> | ||
55 | |||
56 | #include <asm/system.h> | ||
57 | #include <asm/io.h> | ||
58 | #include <asm/dma.h> | ||
59 | |||
60 | #define DRV_NAME "fmv18x" | ||
61 | |||
62 | static unsigned fmv18x_probe_list[] __initdata = { | ||
63 | 0x220, 0x240, 0x260, 0x280, 0x2a0, 0x2c0, 0x300, 0x340, 0 | ||
64 | }; | ||
65 | |||
66 | /* use 0 for production, 1 for verification, >2 for debug */ | ||
67 | #ifndef NET_DEBUG | ||
68 | #define NET_DEBUG 1 | ||
69 | #endif | ||
70 | static unsigned int net_debug = NET_DEBUG; | ||
71 | |||
72 | typedef unsigned char uchar; | ||
73 | |||
74 | /* Information that need to be kept for each board. */ | ||
75 | struct net_local { | ||
76 | struct net_device_stats stats; | ||
77 | long open_time; /* Useless example local info. */ | ||
78 | uint tx_started:1; /* Number of packet on the Tx queue. */ | ||
79 | uint tx_queue_ready:1; /* Tx queue is ready to be sent. */ | ||
80 | uint rx_started:1; /* Packets are Rxing. */ | ||
81 | uchar tx_queue; /* Number of packet on the Tx queue. */ | ||
82 | ushort tx_queue_len; /* Current length of the Tx queue. */ | ||
83 | spinlock_t lock; | ||
84 | }; | ||
85 | |||
86 | |||
87 | /* Offsets from the base address. */ | ||
88 | #define STATUS 0 | ||
89 | #define TX_STATUS 0 | ||
90 | #define RX_STATUS 1 | ||
91 | #define TX_INTR 2 /* Bit-mapped interrupt enable registers. */ | ||
92 | #define RX_INTR 3 | ||
93 | #define TX_MODE 4 | ||
94 | #define RX_MODE 5 | ||
95 | #define CONFIG_0 6 /* Misc. configuration settings. */ | ||
96 | #define CONFIG_1 7 | ||
97 | /* Run-time register bank 2 definitions. */ | ||
98 | #define DATAPORT 8 /* Word-wide DMA or programmed-I/O dataport. */ | ||
99 | #define TX_START 10 | ||
100 | #define COL16CNTL 11 /* Controll Reg for 16 collisions */ | ||
101 | #define MODE13 13 | ||
102 | /* Fujitsu FMV-18x Card Configuration */ | ||
103 | #define FJ_STATUS0 0x10 | ||
104 | #define FJ_STATUS1 0x11 | ||
105 | #define FJ_CONFIG0 0x12 | ||
106 | #define FJ_CONFIG1 0x13 | ||
107 | #define FJ_MACADDR 0x14 /* 0x14 - 0x19 */ | ||
108 | #define FJ_BUFCNTL 0x1A | ||
109 | #define FJ_BUFDATA 0x1C | ||
110 | #define FMV18X_IO_EXTENT 32 | ||
111 | |||
112 | /* Index to functions, as function prototypes. */ | ||
113 | |||
114 | static int fmv18x_probe1(struct net_device *dev, short ioaddr); | ||
115 | static int net_open(struct net_device *dev); | ||
116 | static int net_send_packet(struct sk_buff *skb, struct net_device *dev); | ||
117 | static irqreturn_t net_interrupt(int irq, void *dev_id, struct pt_regs *regs); | ||
118 | static void net_rx(struct net_device *dev); | ||
119 | static void net_timeout(struct net_device *dev); | ||
120 | static int net_close(struct net_device *dev); | ||
121 | static struct net_device_stats *net_get_stats(struct net_device *dev); | ||
122 | static void set_multicast_list(struct net_device *dev); | ||
123 | |||
124 | |||
125 | /* Check for a network adaptor of this type, and return '0' iff one exists. | ||
126 | If dev->base_addr == 0, probe all likely locations. | ||
127 | If dev->base_addr == 1, always return failure. | ||
128 | If dev->base_addr == 2, allocate space for the device and return success | ||
129 | (detachable devices only). | ||
130 | */ | ||
131 | |||
132 | static int io = 0x220; | ||
133 | static int irq; | ||
134 | |||
135 | struct net_device * __init fmv18x_probe(int unit) | ||
136 | { | ||
137 | struct net_device *dev = alloc_etherdev(sizeof(struct net_local)); | ||
138 | unsigned *port; | ||
139 | int err = 0; | ||
140 | |||
141 | if (!dev) | ||
142 | return ERR_PTR(-ENODEV); | ||
143 | |||
144 | if (unit >= 0) { | ||
145 | sprintf(dev->name, "eth%d", unit); | ||
146 | netdev_boot_setup_check(dev); | ||
147 | io = dev->base_addr; | ||
148 | irq = dev->irq; | ||
149 | } | ||
150 | |||
151 | SET_MODULE_OWNER(dev); | ||
152 | |||
153 | if (io > 0x1ff) { /* Check a single specified location. */ | ||
154 | err = fmv18x_probe1(dev, io); | ||
155 | } else if (io != 0) { /* Don't probe at all. */ | ||
156 | err = -ENXIO; | ||
157 | } else { | ||
158 | for (port = fmv18x_probe_list; *port; port++) | ||
159 | if (fmv18x_probe1(dev, *port) == 0) | ||
160 | break; | ||
161 | if (!*port) | ||
162 | err = -ENODEV; | ||
163 | } | ||
164 | if (err) | ||
165 | goto out; | ||
166 | err = register_netdev(dev); | ||
167 | if (err) | ||
168 | goto out1; | ||
169 | return dev; | ||
170 | out1: | ||
171 | free_irq(dev->irq, dev); | ||
172 | release_region(dev->base_addr, FMV18X_IO_EXTENT); | ||
173 | out: | ||
174 | free_netdev(dev); | ||
175 | return ERR_PTR(err); | ||
176 | } | ||
177 | |||
178 | /* The Fujitsu datasheet suggests that the NIC be probed for by checking its | ||
179 | "signature", the default bit pattern after a reset. This *doesn't* work -- | ||
180 | there is no way to reset the bus interface without a complete power-cycle! | ||
181 | |||
182 | It turns out that ATI came to the same conclusion I did: the only thing | ||
183 | that can be done is checking a few bits and then diving right into MAC | ||
184 | address check. */ | ||
185 | |||
186 | static int __init fmv18x_probe1(struct net_device *dev, short ioaddr) | ||
187 | { | ||
188 | char irqmap[4] = {3, 7, 10, 15}; | ||
189 | char irqmap_pnp[8] = {3, 4, 5, 7, 9, 10, 11, 15}; | ||
190 | unsigned int i, retval; | ||
191 | struct net_local *lp; | ||
192 | |||
193 | /* Resetting the chip doesn't reset the ISA interface, so don't bother. | ||
194 | That means we have to be careful with the register values we probe for. | ||
195 | */ | ||
196 | |||
197 | if (!request_region(ioaddr, FMV18X_IO_EXTENT, DRV_NAME)) | ||
198 | return -EBUSY; | ||
199 | |||
200 | dev->irq = irq; | ||
201 | dev->base_addr = ioaddr; | ||
202 | |||
203 | /* Check I/O address configuration and Fujitsu vendor code */ | ||
204 | if (inb(ioaddr+FJ_MACADDR ) != 0x00 | ||
205 | || inb(ioaddr+FJ_MACADDR+1) != 0x00 | ||
206 | || inb(ioaddr+FJ_MACADDR+2) != 0x0e) { | ||
207 | retval = -ENODEV; | ||
208 | goto out; | ||
209 | } | ||
210 | |||
211 | /* Check PnP mode for FMV-183/184/183A/184A. */ | ||
212 | /* This PnP routine is very poor. IO and IRQ should be known. */ | ||
213 | if (inb(ioaddr + FJ_STATUS1) & 0x20) { | ||
214 | for (i = 0; i < 8; i++) { | ||
215 | if (dev->irq == irqmap_pnp[i]) | ||
216 | break; | ||
217 | } | ||
218 | if (i == 8) { | ||
219 | retval = -ENODEV; | ||
220 | goto out; | ||
221 | } | ||
222 | } else { | ||
223 | if (fmv18x_probe_list[inb(ioaddr + FJ_CONFIG0) & 0x07] != ioaddr) | ||
224 | return -ENODEV; | ||
225 | dev->irq = irqmap[(inb(ioaddr + FJ_CONFIG0)>>6) & 0x03]; | ||
226 | } | ||
227 | |||
228 | /* Snarf the interrupt vector now. */ | ||
229 | retval = request_irq(dev->irq, &net_interrupt, 0, DRV_NAME, dev); | ||
230 | if (retval) { | ||
231 | printk ("FMV-18x found at %#3x, but it's unusable due to a conflict on" | ||
232 | "IRQ %d.\n", ioaddr, dev->irq); | ||
233 | goto out; | ||
234 | } | ||
235 | |||
236 | printk("%s: FMV-18x found at %#3x, IRQ %d, address ", dev->name, | ||
237 | ioaddr, dev->irq); | ||
238 | |||
239 | for(i = 0; i < 6; i++) { | ||
240 | unsigned char val = inb(ioaddr + FJ_MACADDR + i); | ||
241 | printk("%02x", val); | ||
242 | dev->dev_addr[i] = val; | ||
243 | } | ||
244 | |||
245 | /* "FJ_STATUS0" 12 bit 0x0400 means use regular 100 ohm 10baseT signals, | ||
246 | rather than 150 ohm shielded twisted pair compensation. | ||
247 | 0x0000 == auto-sense the interface | ||
248 | 0x0800 == use TP interface | ||
249 | 0x1800 == use coax interface | ||
250 | */ | ||
251 | { | ||
252 | const char *porttype[] = {"auto-sense", "10baseT", "auto-sense", "10base2/5"}; | ||
253 | ushort setup_value = inb(ioaddr + FJ_STATUS0); | ||
254 | |||
255 | switch( setup_value & 0x07 ){ | ||
256 | case 0x01 /* 10base5 */: | ||
257 | case 0x02 /* 10base2 */: dev->if_port = 0x18; break; | ||
258 | case 0x04 /* 10baseT */: dev->if_port = 0x08; break; | ||
259 | default /* auto-sense*/: dev->if_port = 0x00; break; | ||
260 | } | ||
261 | printk(" %s interface.\n", porttype[(dev->if_port>>3) & 3]); | ||
262 | } | ||
263 | |||
264 | /* Initialize LAN Controller and LAN Card */ | ||
265 | outb(0xda, ioaddr + CONFIG_0); /* Initialize LAN Controller */ | ||
266 | outb(0x00, ioaddr + CONFIG_1); /* Stand by mode */ | ||
267 | outb(0x00, ioaddr + FJ_CONFIG1); /* Disable IRQ of LAN Card */ | ||
268 | outb(0x00, ioaddr + FJ_BUFCNTL); /* Reset ? I'm not sure (TAMIYA) */ | ||
269 | |||
270 | /* wait for a while */ | ||
271 | udelay(200); | ||
272 | |||
273 | /* Set the station address in bank zero. */ | ||
274 | outb(0x00, ioaddr + CONFIG_1); | ||
275 | for (i = 0; i < 6; i++) | ||
276 | outb(dev->dev_addr[i], ioaddr + 8 + i); | ||
277 | |||
278 | /* Switch to bank 1 and set the multicast table to accept none. */ | ||
279 | outb(0x04, ioaddr + CONFIG_1); | ||
280 | for (i = 0; i < 8; i++) | ||
281 | outb(0x00, ioaddr + 8 + i); | ||
282 | |||
283 | /* Switch to bank 2 and lock our I/O address. */ | ||
284 | outb(0x08, ioaddr + CONFIG_1); | ||
285 | outb(dev->if_port, ioaddr + MODE13); | ||
286 | outb(0x00, ioaddr + COL16CNTL); | ||
287 | |||
288 | if (net_debug) | ||
289 | printk(version); | ||
290 | |||
291 | /* Initialize the device structure. */ | ||
292 | dev->priv = kmalloc(sizeof(struct net_local), GFP_KERNEL); | ||
293 | if (!dev->priv) { | ||
294 | retval = -ENOMEM; | ||
295 | goto out_irq; | ||
296 | } | ||
297 | memset(dev->priv, 0, sizeof(struct net_local)); | ||
298 | lp = dev->priv; | ||
299 | spin_lock_init(&lp->lock); | ||
300 | |||
301 | dev->open = net_open; | ||
302 | dev->stop = net_close; | ||
303 | dev->hard_start_xmit = net_send_packet; | ||
304 | dev->tx_timeout = net_timeout; | ||
305 | dev->watchdog_timeo = HZ/10; | ||
306 | dev->get_stats = net_get_stats; | ||
307 | dev->set_multicast_list = set_multicast_list; | ||
308 | return 0; | ||
309 | |||
310 | out_irq: | ||
311 | free_irq(dev->irq, dev); | ||
312 | out: | ||
313 | release_region(ioaddr, FMV18X_IO_EXTENT); | ||
314 | return retval; | ||
315 | } | ||
316 | |||
317 | |||
318 | static int net_open(struct net_device *dev) | ||
319 | { | ||
320 | struct net_local *lp = dev->priv; | ||
321 | int ioaddr = dev->base_addr; | ||
322 | |||
323 | /* Set the configuration register 0 to 32K 100ns. byte-wide memory, | ||
324 | 16 bit bus access, and two 4K Tx, enable the Rx and Tx. */ | ||
325 | outb(0x5a, ioaddr + CONFIG_0); | ||
326 | |||
327 | /* Powerup and switch to register bank 2 for the run-time registers. */ | ||
328 | outb(0xe8, ioaddr + CONFIG_1); | ||
329 | |||
330 | lp->tx_started = 0; | ||
331 | lp->tx_queue_ready = 1; | ||
332 | lp->rx_started = 0; | ||
333 | lp->tx_queue = 0; | ||
334 | lp->tx_queue_len = 0; | ||
335 | |||
336 | /* Clear Tx and Rx Status */ | ||
337 | outb(0xff, ioaddr + TX_STATUS); | ||
338 | outb(0xff, ioaddr + RX_STATUS); | ||
339 | lp->open_time = jiffies; | ||
340 | |||
341 | netif_start_queue(dev); | ||
342 | |||
343 | /* Enable the IRQ of the LAN Card */ | ||
344 | outb(0x80, ioaddr + FJ_CONFIG1); | ||
345 | |||
346 | /* Enable both Tx and Rx interrupts */ | ||
347 | outw(0x8182, ioaddr+TX_INTR); | ||
348 | |||
349 | return 0; | ||
350 | } | ||
351 | |||
352 | static void net_timeout(struct net_device *dev) | ||
353 | { | ||
354 | struct net_local *lp = dev->priv; | ||
355 | int ioaddr = dev->base_addr; | ||
356 | unsigned long flags; | ||
357 | |||
358 | |||
359 | printk(KERN_WARNING "%s: transmit timed out with status %04x, %s?\n", dev->name, | ||
360 | htons(inw(ioaddr + TX_STATUS)), | ||
361 | inb(ioaddr + TX_STATUS) & 0x80 | ||
362 | ? "IRQ conflict" : "network cable problem"); | ||
363 | printk(KERN_WARNING "%s: timeout registers: %04x %04x %04x %04x %04x %04x %04x %04x.\n", | ||
364 | dev->name, htons(inw(ioaddr + 0)), | ||
365 | htons(inw(ioaddr + 2)), htons(inw(ioaddr + 4)), | ||
366 | htons(inw(ioaddr + 6)), htons(inw(ioaddr + 8)), | ||
367 | htons(inw(ioaddr +10)), htons(inw(ioaddr +12)), | ||
368 | htons(inw(ioaddr +14))); | ||
369 | printk(KERN_WARNING "eth card: %04x %04x\n", | ||
370 | htons(inw(ioaddr+FJ_STATUS0)), | ||
371 | htons(inw(ioaddr+FJ_CONFIG0))); | ||
372 | lp->stats.tx_errors++; | ||
373 | /* ToDo: We should try to restart the adaptor... */ | ||
374 | spin_lock_irqsave(&lp->lock, flags); | ||
375 | |||
376 | /* Initialize LAN Controller and LAN Card */ | ||
377 | outb(0xda, ioaddr + CONFIG_0); /* Initialize LAN Controller */ | ||
378 | outb(0x00, ioaddr + CONFIG_1); /* Stand by mode */ | ||
379 | outb(0x00, ioaddr + FJ_CONFIG1); /* Disable IRQ of LAN Card */ | ||
380 | outb(0x00, ioaddr + FJ_BUFCNTL); /* Reset ? I'm not sure */ | ||
381 | net_open(dev); | ||
382 | spin_unlock_irqrestore(&lp->lock, flags); | ||
383 | |||
384 | netif_wake_queue(dev); | ||
385 | } | ||
386 | |||
387 | static int net_send_packet(struct sk_buff *skb, struct net_device *dev) | ||
388 | { | ||
389 | struct net_local *lp = dev->priv; | ||
390 | int ioaddr = dev->base_addr; | ||
391 | short length = skb->len; | ||
392 | unsigned char *buf; | ||
393 | unsigned long flags; | ||
394 | |||
395 | /* Block a transmit from overlapping. */ | ||
396 | |||
397 | if (length > ETH_FRAME_LEN) { | ||
398 | if (net_debug) | ||
399 | printk("%s: Attempting to send a large packet (%d bytes).\n", | ||
400 | dev->name, length); | ||
401 | return 1; | ||
402 | } | ||
403 | |||
404 | if (length < ETH_ZLEN) { | ||
405 | skb = skb_padto(skb, ETH_ZLEN); | ||
406 | if (skb == NULL) | ||
407 | return 0; | ||
408 | length = ETH_ZLEN; | ||
409 | } | ||
410 | buf = skb->data; | ||
411 | |||
412 | if (net_debug > 4) | ||
413 | printk("%s: Transmitting a packet of length %lu.\n", dev->name, | ||
414 | (unsigned long)skb->len); | ||
415 | /* We may not start transmitting unless we finish transferring | ||
416 | a packet into the Tx queue. During executing the following | ||
417 | codes we possibly catch a Tx interrupt. Thus we flag off | ||
418 | tx_queue_ready, so that we prevent the interrupt routine | ||
419 | (net_interrupt) to start transmitting. */ | ||
420 | spin_lock_irqsave(&lp->lock, flags); | ||
421 | lp->tx_queue_ready = 0; | ||
422 | { | ||
423 | outw(length, ioaddr + DATAPORT); | ||
424 | outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1); | ||
425 | lp->tx_queue++; | ||
426 | lp->tx_queue_len += length + 2; | ||
427 | } | ||
428 | lp->tx_queue_ready = 1; | ||
429 | spin_unlock_irqrestore(&lp->lock, flags); | ||
430 | |||
431 | if (lp->tx_started == 0) { | ||
432 | /* If the Tx is idle, always trigger a transmit. */ | ||
433 | outb(0x80 | lp->tx_queue, ioaddr + TX_START); | ||
434 | lp->tx_queue = 0; | ||
435 | lp->tx_queue_len = 0; | ||
436 | dev->trans_start = jiffies; | ||
437 | lp->tx_started = 1; | ||
438 | } else if (lp->tx_queue_len >= 4096 - 1502) /* No room for a packet */ | ||
439 | netif_stop_queue(dev); | ||
440 | |||
441 | dev_kfree_skb(skb); | ||
442 | return 0; | ||
443 | } | ||
444 | |||
445 | /* The typical workload of the driver: | ||
446 | Handle the network interface interrupts. */ | ||
447 | static irqreturn_t | ||
448 | net_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
449 | { | ||
450 | struct net_device *dev = dev_id; | ||
451 | struct net_local *lp; | ||
452 | int ioaddr, status; | ||
453 | |||
454 | ioaddr = dev->base_addr; | ||
455 | lp = dev->priv; | ||
456 | status = inw(ioaddr + TX_STATUS); | ||
457 | outw(status, ioaddr + TX_STATUS); | ||
458 | |||
459 | if (net_debug > 4) | ||
460 | printk("%s: Interrupt with status %04x.\n", dev->name, status); | ||
461 | if (lp->rx_started == 0 && | ||
462 | (status & 0xff00 || (inb(ioaddr + RX_MODE) & 0x40) == 0)) { | ||
463 | /* Got a packet(s). | ||
464 | We cannot execute net_rx more than once at the same time for | ||
465 | the same device. During executing net_rx, we possibly catch a | ||
466 | Tx interrupt. Thus we flag on rx_started, so that we prevent | ||
467 | the interrupt routine (net_interrupt) to dive into net_rx | ||
468 | again. */ | ||
469 | lp->rx_started = 1; | ||
470 | outb(0x00, ioaddr + RX_INTR); /* Disable RX intr. */ | ||
471 | net_rx(dev); | ||
472 | outb(0x81, ioaddr + RX_INTR); /* Enable RX intr. */ | ||
473 | lp->rx_started = 0; | ||
474 | } | ||
475 | if (status & 0x00ff) { | ||
476 | if (status & 0x02) { | ||
477 | /* More than 16 collisions occurred */ | ||
478 | if (net_debug > 4) | ||
479 | printk("%s: 16 Collision occur during Txing.\n", dev->name); | ||
480 | /* Cancel sending a packet. */ | ||
481 | outb(0x03, ioaddr + COL16CNTL); | ||
482 | lp->stats.collisions++; | ||
483 | } | ||
484 | if (status & 0x82) { | ||
485 | spin_lock(&lp->lock); | ||
486 | lp->stats.tx_packets++; | ||
487 | if (lp->tx_queue && lp->tx_queue_ready) { | ||
488 | outb(0x80 | lp->tx_queue, ioaddr + TX_START); | ||
489 | lp->tx_queue = 0; | ||
490 | lp->tx_queue_len = 0; | ||
491 | dev->trans_start = jiffies; | ||
492 | netif_wake_queue(dev); /* Inform upper layers. */ | ||
493 | } else { | ||
494 | lp->tx_started = 0; | ||
495 | netif_wake_queue(dev); /* Inform upper layers. */ | ||
496 | } | ||
497 | spin_unlock(&lp->lock); | ||
498 | } | ||
499 | } | ||
500 | return IRQ_RETVAL(status); | ||
501 | } | ||
502 | |||
503 | /* We have a good packet(s), get it/them out of the buffers. */ | ||
504 | static void net_rx(struct net_device *dev) | ||
505 | { | ||
506 | struct net_local *lp = dev->priv; | ||
507 | int ioaddr = dev->base_addr; | ||
508 | int boguscount = 5; | ||
509 | |||
510 | while ((inb(ioaddr + RX_MODE) & 0x40) == 0) { | ||
511 | /* Clear PKT_RDY bit: by agy 19940922 */ | ||
512 | /* outb(0x80, ioaddr + RX_STATUS); */ | ||
513 | ushort status = inw(ioaddr + DATAPORT); | ||
514 | |||
515 | if (net_debug > 4) | ||
516 | printk("%s: Rxing packet mode %02x status %04x.\n", | ||
517 | dev->name, inb(ioaddr + RX_MODE), status); | ||
518 | #ifndef final_version | ||
519 | if (status == 0) { | ||
520 | outb(0x05, ioaddr + 14); | ||
521 | break; | ||
522 | } | ||
523 | #endif | ||
524 | |||
525 | if ((status & 0xF0) != 0x20) { /* There was an error. */ | ||
526 | lp->stats.rx_errors++; | ||
527 | if (status & 0x08) lp->stats.rx_length_errors++; | ||
528 | if (status & 0x04) lp->stats.rx_frame_errors++; | ||
529 | if (status & 0x02) lp->stats.rx_crc_errors++; | ||
530 | if (status & 0x01) lp->stats.rx_over_errors++; | ||
531 | } else { | ||
532 | ushort pkt_len = inw(ioaddr + DATAPORT); | ||
533 | /* Malloc up new buffer. */ | ||
534 | struct sk_buff *skb; | ||
535 | |||
536 | if (pkt_len > 1550) { | ||
537 | printk("%s: The FMV-18x claimed a very large packet, size %d.\n", | ||
538 | dev->name, pkt_len); | ||
539 | outb(0x05, ioaddr + 14); | ||
540 | lp->stats.rx_errors++; | ||
541 | break; | ||
542 | } | ||
543 | skb = dev_alloc_skb(pkt_len+3); | ||
544 | if (skb == NULL) { | ||
545 | printk("%s: Memory squeeze, dropping packet (len %d).\n", | ||
546 | dev->name, pkt_len); | ||
547 | outb(0x05, ioaddr + 14); | ||
548 | lp->stats.rx_dropped++; | ||
549 | break; | ||
550 | } | ||
551 | skb->dev = dev; | ||
552 | skb_reserve(skb,2); | ||
553 | |||
554 | insw(ioaddr + DATAPORT, skb_put(skb,pkt_len), (pkt_len + 1) >> 1); | ||
555 | |||
556 | if (net_debug > 5) { | ||
557 | int i; | ||
558 | printk("%s: Rxed packet of length %d: ", dev->name, pkt_len); | ||
559 | for (i = 0; i < 14; i++) | ||
560 | printk(" %02x", skb->data[i]); | ||
561 | printk(".\n"); | ||
562 | } | ||
563 | |||
564 | skb->protocol=eth_type_trans(skb, dev); | ||
565 | netif_rx(skb); | ||
566 | dev->last_rx = jiffies; | ||
567 | lp->stats.rx_packets++; | ||
568 | lp->stats.rx_bytes += pkt_len; | ||
569 | } | ||
570 | if (--boguscount <= 0) | ||
571 | break; | ||
572 | } | ||
573 | |||
574 | /* If any worth-while packets have been received, dev_rint() | ||
575 | has done a mark_bh(NET_BH) for us and will work on them | ||
576 | when we get to the bottom-half routine. */ | ||
577 | { | ||
578 | int i; | ||
579 | for (i = 0; i < 20; i++) { | ||
580 | if ((inb(ioaddr + RX_MODE) & 0x40) == 0x40) | ||
581 | break; | ||
582 | (void)inw(ioaddr + DATAPORT); /* dummy status read */ | ||
583 | outb(0x05, ioaddr + 14); | ||
584 | } | ||
585 | |||
586 | if (net_debug > 5 && i > 0) | ||
587 | printk("%s: Exint Rx packet with mode %02x after %d ticks.\n", | ||
588 | dev->name, inb(ioaddr + RX_MODE), i); | ||
589 | } | ||
590 | |||
591 | return; | ||
592 | } | ||
593 | |||
594 | /* The inverse routine to net_open(). */ | ||
595 | static int net_close(struct net_device *dev) | ||
596 | { | ||
597 | int ioaddr = dev->base_addr; | ||
598 | |||
599 | ((struct net_local *)dev->priv)->open_time = 0; | ||
600 | |||
601 | netif_stop_queue(dev); | ||
602 | |||
603 | /* Set configuration register 0 to disable Tx and Rx. */ | ||
604 | outb(0xda, ioaddr + CONFIG_0); | ||
605 | |||
606 | /* Update the statistics -- ToDo. */ | ||
607 | |||
608 | /* Power-down the chip. Green, green, green! */ | ||
609 | outb(0x00, ioaddr + CONFIG_1); | ||
610 | |||
611 | /* Set the ethernet adaptor disable IRQ */ | ||
612 | outb(0x00, ioaddr + FJ_CONFIG1); | ||
613 | |||
614 | return 0; | ||
615 | } | ||
616 | |||
617 | /* Get the current statistics. This may be called with the card open or | ||
618 | closed. */ | ||
619 | static struct net_device_stats *net_get_stats(struct net_device *dev) | ||
620 | { | ||
621 | struct net_local *lp = dev->priv; | ||
622 | return &lp->stats; | ||
623 | } | ||
624 | |||
625 | /* Set or clear the multicast filter for this adaptor. | ||
626 | num_addrs == -1 Promiscuous mode, receive all packets | ||
627 | num_addrs == 0 Normal mode, clear multicast list | ||
628 | num_addrs > 0 Multicast mode, receive normal and MC packets, and do | ||
629 | best-effort filtering. | ||
630 | */ | ||
631 | |||
632 | static void set_multicast_list(struct net_device *dev) | ||
633 | { | ||
634 | short ioaddr = dev->base_addr; | ||
635 | if (dev->mc_count || dev->flags&(IFF_PROMISC|IFF_ALLMULTI)) | ||
636 | { | ||
637 | /* | ||
638 | * We must make the kernel realise we had to move | ||
639 | * into promisc mode or we start all out war on | ||
640 | * the cable. - AC | ||
641 | */ | ||
642 | dev->flags|=IFF_PROMISC; | ||
643 | |||
644 | outb(3, ioaddr + RX_MODE); /* Enable promiscuous mode */ | ||
645 | } | ||
646 | else | ||
647 | outb(2, ioaddr + RX_MODE); /* Disable promiscuous, use normal mode */ | ||
648 | } | ||
649 | |||
650 | #ifdef MODULE | ||
651 | static struct net_device *dev_fmv18x; | ||
652 | |||
653 | MODULE_PARM(io, "i"); | ||
654 | MODULE_PARM(irq, "i"); | ||
655 | MODULE_PARM(net_debug, "i"); | ||
656 | MODULE_PARM_DESC(io, "FMV-18X I/O address"); | ||
657 | MODULE_PARM_DESC(irq, "FMV-18X IRQ number"); | ||
658 | MODULE_PARM_DESC(net_debug, "FMV-18X debug level (0-1,5-6)"); | ||
659 | MODULE_LICENSE("GPL"); | ||
660 | |||
661 | int init_module(void) | ||
662 | { | ||
663 | if (io == 0) | ||
664 | printk("fmv18x: You should not use auto-probing with insmod!\n"); | ||
665 | dev_fmv18x = fmv18x_probe(-1); | ||
666 | if (IS_ERR(dev_fmv18x)) | ||
667 | return PTR_ERR(dev_fmv18x); | ||
668 | return 0; | ||
669 | } | ||
670 | |||
671 | void | ||
672 | cleanup_module(void) | ||
673 | { | ||
674 | unregister_netdev(dev_fmv18x); | ||
675 | free_irq(dev_fmv18x->irq, dev_fmv18x); | ||
676 | release_region(dev_fmv18x->base_addr, FMV18X_IO_EXTENT); | ||
677 | free_netdev(dev_fmv18x); | ||
678 | } | ||
679 | #endif /* MODULE */ | ||
680 | |||
681 | /* | ||
682 | * Local variables: | ||
683 | * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/net/inet -Wall -Wstrict-prototypes -O6 -m486 -c fmv18x.c" | ||
684 | * version-control: t | ||
685 | * kept-new-versions: 5 | ||
686 | * tab-width: 4 | ||
687 | * c-indent-level: 4 | ||
688 | * End: | ||
689 | */ | ||
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 4ebcd052e150..64f0f697c958 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -82,6 +82,9 @@ | |||
82 | * 0.31: 14 Nov 2004: ethtool support for getting/setting link | 82 | * 0.31: 14 Nov 2004: ethtool support for getting/setting link |
83 | * capabilities. | 83 | * capabilities. |
84 | * 0.32: 16 Apr 2005: RX_ERROR4 handling added. | 84 | * 0.32: 16 Apr 2005: RX_ERROR4 handling added. |
85 | * 0.33: 16 May 2005: Support for MCP51 added. | ||
86 | * 0.34: 18 Jun 2005: Add DEV_NEED_LINKTIMER to all nForce nics. | ||
87 | * 0.35: 26 Jun 2005: Support for MCP55 added. | ||
85 | * | 88 | * |
86 | * Known bugs: | 89 | * Known bugs: |
87 | * We suspect that on some hardware no TX done interrupts are generated. | 90 | * We suspect that on some hardware no TX done interrupts are generated. |
@@ -93,7 +96,7 @@ | |||
93 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few | 96 | * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few |
94 | * superfluous timer interrupts from the nic. | 97 | * superfluous timer interrupts from the nic. |
95 | */ | 98 | */ |
96 | #define FORCEDETH_VERSION "0.32" | 99 | #define FORCEDETH_VERSION "0.35" |
97 | #define DRV_NAME "forcedeth" | 100 | #define DRV_NAME "forcedeth" |
98 | 101 | ||
99 | #include <linux/module.h> | 102 | #include <linux/module.h> |
@@ -2005,7 +2008,9 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
2005 | /* handle different descriptor versions */ | 2008 | /* handle different descriptor versions */ |
2006 | if (pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_1 || | 2009 | if (pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_1 || |
2007 | pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_2 || | 2010 | pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_2 || |
2008 | pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_3) | 2011 | pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_3 || |
2012 | pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 || | ||
2013 | pci_dev->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) | ||
2009 | np->desc_ver = DESC_VER_1; | 2014 | np->desc_ver = DESC_VER_1; |
2010 | else | 2015 | else |
2011 | np->desc_ver = DESC_VER_2; | 2016 | np->desc_ver = DESC_VER_2; |
@@ -2215,56 +2220,84 @@ static struct pci_device_id pci_tbl[] = { | |||
2215 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_4, | 2220 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_4, |
2216 | .subvendor = PCI_ANY_ID, | 2221 | .subvendor = PCI_ANY_ID, |
2217 | .subdevice = PCI_ANY_ID, | 2222 | .subdevice = PCI_ANY_ID, |
2218 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2223 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2219 | }, | 2224 | }, |
2220 | { /* nForce3 Ethernet Controller */ | 2225 | { /* nForce3 Ethernet Controller */ |
2221 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2226 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2222 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_5, | 2227 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_5, |
2223 | .subvendor = PCI_ANY_ID, | 2228 | .subvendor = PCI_ANY_ID, |
2224 | .subdevice = PCI_ANY_ID, | 2229 | .subdevice = PCI_ANY_ID, |
2225 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2230 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2226 | }, | 2231 | }, |
2227 | { /* nForce3 Ethernet Controller */ | 2232 | { /* nForce3 Ethernet Controller */ |
2228 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2233 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2229 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_6, | 2234 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_6, |
2230 | .subvendor = PCI_ANY_ID, | 2235 | .subvendor = PCI_ANY_ID, |
2231 | .subdevice = PCI_ANY_ID, | 2236 | .subdevice = PCI_ANY_ID, |
2232 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2237 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2233 | }, | 2238 | }, |
2234 | { /* nForce3 Ethernet Controller */ | 2239 | { /* nForce3 Ethernet Controller */ |
2235 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2240 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2236 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_7, | 2241 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_7, |
2237 | .subvendor = PCI_ANY_ID, | 2242 | .subvendor = PCI_ANY_ID, |
2238 | .subdevice = PCI_ANY_ID, | 2243 | .subdevice = PCI_ANY_ID, |
2239 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2244 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2240 | }, | 2245 | }, |
2241 | { /* CK804 Ethernet Controller */ | 2246 | { /* CK804 Ethernet Controller */ |
2242 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2247 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2243 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_8, | 2248 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_8, |
2244 | .subvendor = PCI_ANY_ID, | 2249 | .subvendor = PCI_ANY_ID, |
2245 | .subdevice = PCI_ANY_ID, | 2250 | .subdevice = PCI_ANY_ID, |
2246 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2251 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2247 | }, | 2252 | }, |
2248 | { /* CK804 Ethernet Controller */ | 2253 | { /* CK804 Ethernet Controller */ |
2249 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2254 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2250 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_9, | 2255 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_9, |
2251 | .subvendor = PCI_ANY_ID, | 2256 | .subvendor = PCI_ANY_ID, |
2252 | .subdevice = PCI_ANY_ID, | 2257 | .subdevice = PCI_ANY_ID, |
2253 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2258 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2254 | }, | 2259 | }, |
2255 | { /* MCP04 Ethernet Controller */ | 2260 | { /* MCP04 Ethernet Controller */ |
2256 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2261 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2257 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_10, | 2262 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_10, |
2258 | .subvendor = PCI_ANY_ID, | 2263 | .subvendor = PCI_ANY_ID, |
2259 | .subdevice = PCI_ANY_ID, | 2264 | .subdevice = PCI_ANY_ID, |
2260 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2265 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2261 | }, | 2266 | }, |
2262 | { /* MCP04 Ethernet Controller */ | 2267 | { /* MCP04 Ethernet Controller */ |
2263 | .vendor = PCI_VENDOR_ID_NVIDIA, | 2268 | .vendor = PCI_VENDOR_ID_NVIDIA, |
2264 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_11, | 2269 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_11, |
2265 | .subvendor = PCI_ANY_ID, | 2270 | .subvendor = PCI_ANY_ID, |
2266 | .subdevice = PCI_ANY_ID, | 2271 | .subdevice = PCI_ANY_ID, |
2267 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ, | 2272 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, |
2273 | }, | ||
2274 | { /* MCP51 Ethernet Controller */ | ||
2275 | .vendor = PCI_VENDOR_ID_NVIDIA, | ||
2276 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_12, | ||
2277 | .subvendor = PCI_ANY_ID, | ||
2278 | .subdevice = PCI_ANY_ID, | ||
2279 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, | ||
2280 | }, | ||
2281 | { /* MCP51 Ethernet Controller */ | ||
2282 | .vendor = PCI_VENDOR_ID_NVIDIA, | ||
2283 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_13, | ||
2284 | .subvendor = PCI_ANY_ID, | ||
2285 | .subdevice = PCI_ANY_ID, | ||
2286 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, | ||
2287 | }, | ||
2288 | { /* MCP55 Ethernet Controller */ | ||
2289 | .vendor = PCI_VENDOR_ID_NVIDIA, | ||
2290 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_14, | ||
2291 | .subvendor = PCI_ANY_ID, | ||
2292 | .subdevice = PCI_ANY_ID, | ||
2293 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, | ||
2294 | }, | ||
2295 | { /* MCP55 Ethernet Controller */ | ||
2296 | .vendor = PCI_VENDOR_ID_NVIDIA, | ||
2297 | .device = PCI_DEVICE_ID_NVIDIA_NVENET_15, | ||
2298 | .subvendor = PCI_ANY_ID, | ||
2299 | .subdevice = PCI_ANY_ID, | ||
2300 | .driver_data = DEV_NEED_LASTPACKET1|DEV_IRQMASK_2|DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER, | ||
2268 | }, | 2301 | }, |
2269 | {0,}, | 2302 | {0,}, |
2270 | }; | 2303 | }; |
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index b43b2b11aacd..6518334b9280 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c | |||
@@ -1,4 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/net/gianfar.c | 2 | * drivers/net/gianfar.c |
3 | * | 3 | * |
4 | * Gianfar Ethernet Driver | 4 | * Gianfar Ethernet Driver |
@@ -22,10 +22,9 @@ | |||
22 | * B-V +1.62 | 22 | * B-V +1.62 |
23 | * | 23 | * |
24 | * Theory of operation | 24 | * Theory of operation |
25 | * This driver is designed for the Triple-speed Ethernet | 25 | * This driver is designed for the non-CPM ethernet controllers |
26 | * controllers on the Freescale 8540/8560 integrated processors, | 26 | * on the 85xx and 83xx family of integrated processors |
27 | * as well as the Fast Ethernet Controller on the 8540. | 27 | * |
28 | * | ||
29 | * The driver is initialized through platform_device. Structures which | 28 | * The driver is initialized through platform_device. Structures which |
30 | * define the configuration needed by the board are defined in a | 29 | * define the configuration needed by the board are defined in a |
31 | * board structure in arch/ppc/platforms (though I do not | 30 | * board structure in arch/ppc/platforms (though I do not |
@@ -39,12 +38,12 @@ | |||
39 | * | 38 | * |
40 | * The Gianfar Ethernet Controller uses a ring of buffer | 39 | * The Gianfar Ethernet Controller uses a ring of buffer |
41 | * descriptors. The beginning is indicated by a register | 40 | * descriptors. The beginning is indicated by a register |
42 | * pointing to the physical address of the start of the ring. | 41 | * pointing to the physical address of the start of the ring. |
43 | * The end is determined by a "wrap" bit being set in the | 42 | * The end is determined by a "wrap" bit being set in the |
44 | * last descriptor of the ring. | 43 | * last descriptor of the ring. |
45 | * | 44 | * |
46 | * When a packet is received, the RXF bit in the | 45 | * When a packet is received, the RXF bit in the |
47 | * IEVENT register is set, triggering an interrupt when the | 46 | * IEVENT register is set, triggering an interrupt when the |
48 | * corresponding bit in the IMASK register is also set (if | 47 | * corresponding bit in the IMASK register is also set (if |
49 | * interrupt coalescing is active, then the interrupt may not | 48 | * interrupt coalescing is active, then the interrupt may not |
50 | * happen immediately, but will wait until either a set number | 49 | * happen immediately, but will wait until either a set number |
@@ -52,7 +51,7 @@ | |||
52 | * interrupt handler will signal there is work to be done, and | 51 | * interrupt handler will signal there is work to be done, and |
53 | * exit. Without NAPI, the packet(s) will be handled | 52 | * exit. Without NAPI, the packet(s) will be handled |
54 | * immediately. Both methods will start at the last known empty | 53 | * immediately. Both methods will start at the last known empty |
55 | * descriptor, and process every subsequent descriptor until there | 54 | * descriptor, and process every subsequent descriptor until there |
56 | * are none left with data (NAPI will stop after a set number of | 55 | * are none left with data (NAPI will stop after a set number of |
57 | * packets to give time to other tasks, but will eventually | 56 | * packets to give time to other tasks, but will eventually |
58 | * process all the packets). The data arrives inside a | 57 | * process all the packets). The data arrives inside a |
@@ -83,9 +82,13 @@ | |||
83 | #include <linux/netdevice.h> | 82 | #include <linux/netdevice.h> |
84 | #include <linux/etherdevice.h> | 83 | #include <linux/etherdevice.h> |
85 | #include <linux/skbuff.h> | 84 | #include <linux/skbuff.h> |
85 | #include <linux/if_vlan.h> | ||
86 | #include <linux/spinlock.h> | 86 | #include <linux/spinlock.h> |
87 | #include <linux/mm.h> | 87 | #include <linux/mm.h> |
88 | #include <linux/device.h> | 88 | #include <linux/device.h> |
89 | #include <linux/ip.h> | ||
90 | #include <linux/tcp.h> | ||
91 | #include <linux/udp.h> | ||
89 | 92 | ||
90 | #include <asm/io.h> | 93 | #include <asm/io.h> |
91 | #include <asm/irq.h> | 94 | #include <asm/irq.h> |
@@ -123,7 +126,7 @@ static int gfar_set_mac_address(struct net_device *dev); | |||
123 | static int gfar_change_mtu(struct net_device *dev, int new_mtu); | 126 | static int gfar_change_mtu(struct net_device *dev, int new_mtu); |
124 | static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs); | 127 | static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs); |
125 | static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs); | 128 | static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs); |
126 | irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs); | 129 | static irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs); |
127 | static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs); | 130 | static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs); |
128 | static irqreturn_t phy_interrupt(int irq, void *dev_id, struct pt_regs *regs); | 131 | static irqreturn_t phy_interrupt(int irq, void *dev_id, struct pt_regs *regs); |
129 | static void gfar_phy_change(void *data); | 132 | static void gfar_phy_change(void *data); |
@@ -139,9 +142,12 @@ static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr); | |||
139 | #ifdef CONFIG_GFAR_NAPI | 142 | #ifdef CONFIG_GFAR_NAPI |
140 | static int gfar_poll(struct net_device *dev, int *budget); | 143 | static int gfar_poll(struct net_device *dev, int *budget); |
141 | #endif | 144 | #endif |
142 | static int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); | 145 | int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); |
143 | static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length); | 146 | static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length); |
144 | static void gfar_phy_startup_timer(unsigned long data); | 147 | static void gfar_phy_startup_timer(unsigned long data); |
148 | static void gfar_vlan_rx_register(struct net_device *netdev, | ||
149 | struct vlan_group *grp); | ||
150 | static void gfar_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid); | ||
145 | 151 | ||
146 | extern struct ethtool_ops gfar_ethtool_ops; | 152 | extern struct ethtool_ops gfar_ethtool_ops; |
147 | 153 | ||
@@ -149,6 +155,13 @@ MODULE_AUTHOR("Freescale Semiconductor, Inc"); | |||
149 | MODULE_DESCRIPTION("Gianfar Ethernet Driver"); | 155 | MODULE_DESCRIPTION("Gianfar Ethernet Driver"); |
150 | MODULE_LICENSE("GPL"); | 156 | MODULE_LICENSE("GPL"); |
151 | 157 | ||
158 | int gfar_uses_fcb(struct gfar_private *priv) | ||
159 | { | ||
160 | if (priv->vlan_enable || priv->rx_csum_enable) | ||
161 | return 1; | ||
162 | else | ||
163 | return 0; | ||
164 | } | ||
152 | static int gfar_probe(struct device *device) | 165 | static int gfar_probe(struct device *device) |
153 | { | 166 | { |
154 | u32 tempval; | 167 | u32 tempval; |
@@ -159,7 +172,6 @@ static int gfar_probe(struct device *device) | |||
159 | struct resource *r; | 172 | struct resource *r; |
160 | int idx; | 173 | int idx; |
161 | int err = 0; | 174 | int err = 0; |
162 | int dev_ethtool_ops = 0; | ||
163 | 175 | ||
164 | einfo = (struct gianfar_platform_data *) pdev->dev.platform_data; | 176 | einfo = (struct gianfar_platform_data *) pdev->dev.platform_data; |
165 | 177 | ||
@@ -265,15 +277,69 @@ static int gfar_probe(struct device *device) | |||
265 | dev->mtu = 1500; | 277 | dev->mtu = 1500; |
266 | dev->set_multicast_list = gfar_set_multi; | 278 | dev->set_multicast_list = gfar_set_multi; |
267 | 279 | ||
268 | /* Index into the array of possible ethtool | 280 | dev->ethtool_ops = &gfar_ethtool_ops; |
269 | * ops to catch all 4 possibilities */ | 281 | |
270 | if((priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) == 0) | 282 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) { |
271 | dev_ethtool_ops += 1; | 283 | priv->rx_csum_enable = 1; |
284 | dev->features |= NETIF_F_IP_CSUM; | ||
285 | } else | ||
286 | priv->rx_csum_enable = 0; | ||
287 | |||
288 | priv->vlgrp = NULL; | ||
272 | 289 | ||
273 | if((priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE) == 0) | 290 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) { |
274 | dev_ethtool_ops += 2; | 291 | dev->vlan_rx_register = gfar_vlan_rx_register; |
292 | dev->vlan_rx_kill_vid = gfar_vlan_rx_kill_vid; | ||
275 | 293 | ||
276 | dev->ethtool_ops = gfar_op_array[dev_ethtool_ops]; | 294 | dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; |
295 | |||
296 | priv->vlan_enable = 1; | ||
297 | } | ||
298 | |||
299 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) { | ||
300 | priv->extended_hash = 1; | ||
301 | priv->hash_width = 9; | ||
302 | |||
303 | priv->hash_regs[0] = &priv->regs->igaddr0; | ||
304 | priv->hash_regs[1] = &priv->regs->igaddr1; | ||
305 | priv->hash_regs[2] = &priv->regs->igaddr2; | ||
306 | priv->hash_regs[3] = &priv->regs->igaddr3; | ||
307 | priv->hash_regs[4] = &priv->regs->igaddr4; | ||
308 | priv->hash_regs[5] = &priv->regs->igaddr5; | ||
309 | priv->hash_regs[6] = &priv->regs->igaddr6; | ||
310 | priv->hash_regs[7] = &priv->regs->igaddr7; | ||
311 | priv->hash_regs[8] = &priv->regs->gaddr0; | ||
312 | priv->hash_regs[9] = &priv->regs->gaddr1; | ||
313 | priv->hash_regs[10] = &priv->regs->gaddr2; | ||
314 | priv->hash_regs[11] = &priv->regs->gaddr3; | ||
315 | priv->hash_regs[12] = &priv->regs->gaddr4; | ||
316 | priv->hash_regs[13] = &priv->regs->gaddr5; | ||
317 | priv->hash_regs[14] = &priv->regs->gaddr6; | ||
318 | priv->hash_regs[15] = &priv->regs->gaddr7; | ||
319 | |||
320 | } else { | ||
321 | priv->extended_hash = 0; | ||
322 | priv->hash_width = 8; | ||
323 | |||
324 | priv->hash_regs[0] = &priv->regs->gaddr0; | ||
325 | priv->hash_regs[1] = &priv->regs->gaddr1; | ||
326 | priv->hash_regs[2] = &priv->regs->gaddr2; | ||
327 | priv->hash_regs[3] = &priv->regs->gaddr3; | ||
328 | priv->hash_regs[4] = &priv->regs->gaddr4; | ||
329 | priv->hash_regs[5] = &priv->regs->gaddr5; | ||
330 | priv->hash_regs[6] = &priv->regs->gaddr6; | ||
331 | priv->hash_regs[7] = &priv->regs->gaddr7; | ||
332 | } | ||
333 | |||
334 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_PADDING) | ||
335 | priv->padding = DEFAULT_PADDING; | ||
336 | else | ||
337 | priv->padding = 0; | ||
338 | |||
339 | dev->hard_header_len += priv->padding; | ||
340 | |||
341 | if (dev->features & NETIF_F_IP_CSUM) | ||
342 | dev->hard_header_len += GMAC_FCB_LEN; | ||
277 | 343 | ||
278 | priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE; | 344 | priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE; |
279 | #ifdef CONFIG_GFAR_BUFSTASH | 345 | #ifdef CONFIG_GFAR_BUFSTASH |
@@ -289,6 +355,9 @@ static int gfar_probe(struct device *device) | |||
289 | priv->rxcount = DEFAULT_RXCOUNT; | 355 | priv->rxcount = DEFAULT_RXCOUNT; |
290 | priv->rxtime = DEFAULT_RXTIME; | 356 | priv->rxtime = DEFAULT_RXTIME; |
291 | 357 | ||
358 | /* Enable most messages by default */ | ||
359 | priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1; | ||
360 | |||
292 | err = register_netdev(dev); | 361 | err = register_netdev(dev); |
293 | 362 | ||
294 | if (err) { | 363 | if (err) { |
@@ -360,8 +429,9 @@ static int init_phy(struct net_device *dev) | |||
360 | GFP_KERNEL); | 429 | GFP_KERNEL); |
361 | 430 | ||
362 | if(NULL == mii_info) { | 431 | if(NULL == mii_info) { |
363 | printk(KERN_ERR "%s: Could not allocate mii_info\n", | 432 | if (netif_msg_ifup(priv)) |
364 | dev->name); | 433 | printk(KERN_ERR "%s: Could not allocate mii_info\n", |
434 | dev->name); | ||
365 | return -ENOMEM; | 435 | return -ENOMEM; |
366 | } | 436 | } |
367 | 437 | ||
@@ -410,7 +480,8 @@ static int init_phy(struct net_device *dev) | |||
410 | curphy = get_phy_info(priv->mii_info); | 480 | curphy = get_phy_info(priv->mii_info); |
411 | 481 | ||
412 | if (curphy == NULL) { | 482 | if (curphy == NULL) { |
413 | printk(KERN_ERR "%s: No PHY found\n", dev->name); | 483 | if (netif_msg_ifup(priv)) |
484 | printk(KERN_ERR "%s: No PHY found\n", dev->name); | ||
414 | err = -1; | 485 | err = -1; |
415 | goto no_phy; | 486 | goto no_phy; |
416 | } | 487 | } |
@@ -421,7 +492,7 @@ static int init_phy(struct net_device *dev) | |||
421 | if(curphy->init) { | 492 | if(curphy->init) { |
422 | err = curphy->init(priv->mii_info); | 493 | err = curphy->init(priv->mii_info); |
423 | 494 | ||
424 | if (err) | 495 | if (err) |
425 | goto phy_init_fail; | 496 | goto phy_init_fail; |
426 | } | 497 | } |
427 | 498 | ||
@@ -446,14 +517,14 @@ static void init_registers(struct net_device *dev) | |||
446 | gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR); | 517 | gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR); |
447 | 518 | ||
448 | /* Init hash registers to zero */ | 519 | /* Init hash registers to zero */ |
449 | gfar_write(&priv->regs->iaddr0, 0); | 520 | gfar_write(&priv->regs->igaddr0, 0); |
450 | gfar_write(&priv->regs->iaddr1, 0); | 521 | gfar_write(&priv->regs->igaddr1, 0); |
451 | gfar_write(&priv->regs->iaddr2, 0); | 522 | gfar_write(&priv->regs->igaddr2, 0); |
452 | gfar_write(&priv->regs->iaddr3, 0); | 523 | gfar_write(&priv->regs->igaddr3, 0); |
453 | gfar_write(&priv->regs->iaddr4, 0); | 524 | gfar_write(&priv->regs->igaddr4, 0); |
454 | gfar_write(&priv->regs->iaddr5, 0); | 525 | gfar_write(&priv->regs->igaddr5, 0); |
455 | gfar_write(&priv->regs->iaddr6, 0); | 526 | gfar_write(&priv->regs->igaddr6, 0); |
456 | gfar_write(&priv->regs->iaddr7, 0); | 527 | gfar_write(&priv->regs->igaddr7, 0); |
457 | 528 | ||
458 | gfar_write(&priv->regs->gaddr0, 0); | 529 | gfar_write(&priv->regs->gaddr0, 0); |
459 | gfar_write(&priv->regs->gaddr1, 0); | 530 | gfar_write(&priv->regs->gaddr1, 0); |
@@ -464,9 +535,6 @@ static void init_registers(struct net_device *dev) | |||
464 | gfar_write(&priv->regs->gaddr6, 0); | 535 | gfar_write(&priv->regs->gaddr6, 0); |
465 | gfar_write(&priv->regs->gaddr7, 0); | 536 | gfar_write(&priv->regs->gaddr7, 0); |
466 | 537 | ||
467 | /* Zero out rctrl */ | ||
468 | gfar_write(&priv->regs->rctrl, 0x00000000); | ||
469 | |||
470 | /* Zero out the rmon mib registers if it has them */ | 538 | /* Zero out the rmon mib registers if it has them */ |
471 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { | 539 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { |
472 | memset((void *) &(priv->regs->rmon), 0, | 540 | memset((void *) &(priv->regs->rmon), 0, |
@@ -497,20 +565,14 @@ static void init_registers(struct net_device *dev) | |||
497 | gfar_write(&priv->regs->tbipa, TBIPA_VALUE); | 565 | gfar_write(&priv->regs->tbipa, TBIPA_VALUE); |
498 | } | 566 | } |
499 | 567 | ||
500 | void stop_gfar(struct net_device *dev) | 568 | |
569 | /* Halt the receive and transmit queues */ | ||
570 | void gfar_halt(struct net_device *dev) | ||
501 | { | 571 | { |
502 | struct gfar_private *priv = netdev_priv(dev); | 572 | struct gfar_private *priv = netdev_priv(dev); |
503 | struct gfar *regs = priv->regs; | 573 | struct gfar *regs = priv->regs; |
504 | unsigned long flags; | ||
505 | u32 tempval; | 574 | u32 tempval; |
506 | 575 | ||
507 | /* Lock it down */ | ||
508 | spin_lock_irqsave(&priv->lock, flags); | ||
509 | |||
510 | /* Tell the kernel the link is down */ | ||
511 | priv->mii_info->link = 0; | ||
512 | adjust_link(dev); | ||
513 | |||
514 | /* Mask all interrupts */ | 576 | /* Mask all interrupts */ |
515 | gfar_write(®s->imask, IMASK_INIT_CLEAR); | 577 | gfar_write(®s->imask, IMASK_INIT_CLEAR); |
516 | 578 | ||
@@ -533,13 +595,29 @@ void stop_gfar(struct net_device *dev) | |||
533 | tempval = gfar_read(®s->maccfg1); | 595 | tempval = gfar_read(®s->maccfg1); |
534 | tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN); | 596 | tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN); |
535 | gfar_write(®s->maccfg1, tempval); | 597 | gfar_write(®s->maccfg1, tempval); |
598 | } | ||
599 | |||
600 | void stop_gfar(struct net_device *dev) | ||
601 | { | ||
602 | struct gfar_private *priv = netdev_priv(dev); | ||
603 | struct gfar *regs = priv->regs; | ||
604 | unsigned long flags; | ||
605 | |||
606 | /* Lock it down */ | ||
607 | spin_lock_irqsave(&priv->lock, flags); | ||
608 | |||
609 | /* Tell the kernel the link is down */ | ||
610 | priv->mii_info->link = 0; | ||
611 | adjust_link(dev); | ||
612 | |||
613 | gfar_halt(dev); | ||
536 | 614 | ||
537 | if (priv->einfo->board_flags & FSL_GIANFAR_BRD_HAS_PHY_INTR) { | 615 | if (priv->einfo->board_flags & FSL_GIANFAR_BRD_HAS_PHY_INTR) { |
538 | /* Clear any pending interrupts */ | 616 | /* Clear any pending interrupts */ |
539 | mii_clear_phy_interrupt(priv->mii_info); | 617 | mii_clear_phy_interrupt(priv->mii_info); |
540 | 618 | ||
541 | /* Disable PHY Interrupts */ | 619 | /* Disable PHY Interrupts */ |
542 | mii_configure_phy_interrupt(priv->mii_info, | 620 | mii_configure_phy_interrupt(priv->mii_info, |
543 | MII_INTERRUPT_DISABLED); | 621 | MII_INTERRUPT_DISABLED); |
544 | } | 622 | } |
545 | 623 | ||
@@ -566,7 +644,7 @@ void stop_gfar(struct net_device *dev) | |||
566 | sizeof(struct txbd8)*priv->tx_ring_size | 644 | sizeof(struct txbd8)*priv->tx_ring_size |
567 | + sizeof(struct rxbd8)*priv->rx_ring_size, | 645 | + sizeof(struct rxbd8)*priv->rx_ring_size, |
568 | priv->tx_bd_base, | 646 | priv->tx_bd_base, |
569 | gfar_read(®s->tbase)); | 647 | gfar_read(®s->tbase0)); |
570 | } | 648 | } |
571 | 649 | ||
572 | /* If there are any tx skbs or rx skbs still around, free them. | 650 | /* If there are any tx skbs or rx skbs still around, free them. |
@@ -620,6 +698,34 @@ void free_skb_resources(struct gfar_private *priv) | |||
620 | } | 698 | } |
621 | } | 699 | } |
622 | 700 | ||
701 | void gfar_start(struct net_device *dev) | ||
702 | { | ||
703 | struct gfar_private *priv = netdev_priv(dev); | ||
704 | struct gfar *regs = priv->regs; | ||
705 | u32 tempval; | ||
706 | |||
707 | /* Enable Rx and Tx in MACCFG1 */ | ||
708 | tempval = gfar_read(®s->maccfg1); | ||
709 | tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN); | ||
710 | gfar_write(®s->maccfg1, tempval); | ||
711 | |||
712 | /* Initialize DMACTRL to have WWR and WOP */ | ||
713 | tempval = gfar_read(&priv->regs->dmactrl); | ||
714 | tempval |= DMACTRL_INIT_SETTINGS; | ||
715 | gfar_write(&priv->regs->dmactrl, tempval); | ||
716 | |||
717 | /* Clear THLT, so that the DMA starts polling now */ | ||
718 | gfar_write(®s->tstat, TSTAT_CLEAR_THALT); | ||
719 | |||
720 | /* Make sure we aren't stopped */ | ||
721 | tempval = gfar_read(&priv->regs->dmactrl); | ||
722 | tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); | ||
723 | gfar_write(&priv->regs->dmactrl, tempval); | ||
724 | |||
725 | /* Unmask the interrupts we look for */ | ||
726 | gfar_write(®s->imask, IMASK_DEFAULT); | ||
727 | } | ||
728 | |||
623 | /* Bring the controller up and running */ | 729 | /* Bring the controller up and running */ |
624 | int startup_gfar(struct net_device *dev) | 730 | int startup_gfar(struct net_device *dev) |
625 | { | 731 | { |
@@ -630,33 +736,34 @@ int startup_gfar(struct net_device *dev) | |||
630 | int i; | 736 | int i; |
631 | struct gfar_private *priv = netdev_priv(dev); | 737 | struct gfar_private *priv = netdev_priv(dev); |
632 | struct gfar *regs = priv->regs; | 738 | struct gfar *regs = priv->regs; |
633 | u32 tempval; | ||
634 | int err = 0; | 739 | int err = 0; |
740 | u32 rctrl = 0; | ||
635 | 741 | ||
636 | gfar_write(®s->imask, IMASK_INIT_CLEAR); | 742 | gfar_write(®s->imask, IMASK_INIT_CLEAR); |
637 | 743 | ||
638 | /* Allocate memory for the buffer descriptors */ | 744 | /* Allocate memory for the buffer descriptors */ |
639 | vaddr = (unsigned long) dma_alloc_coherent(NULL, | 745 | vaddr = (unsigned long) dma_alloc_coherent(NULL, |
640 | sizeof (struct txbd8) * priv->tx_ring_size + | 746 | sizeof (struct txbd8) * priv->tx_ring_size + |
641 | sizeof (struct rxbd8) * priv->rx_ring_size, | 747 | sizeof (struct rxbd8) * priv->rx_ring_size, |
642 | &addr, GFP_KERNEL); | 748 | &addr, GFP_KERNEL); |
643 | 749 | ||
644 | if (vaddr == 0) { | 750 | if (vaddr == 0) { |
645 | printk(KERN_ERR "%s: Could not allocate buffer descriptors!\n", | 751 | if (netif_msg_ifup(priv)) |
646 | dev->name); | 752 | printk(KERN_ERR "%s: Could not allocate buffer descriptors!\n", |
753 | dev->name); | ||
647 | return -ENOMEM; | 754 | return -ENOMEM; |
648 | } | 755 | } |
649 | 756 | ||
650 | priv->tx_bd_base = (struct txbd8 *) vaddr; | 757 | priv->tx_bd_base = (struct txbd8 *) vaddr; |
651 | 758 | ||
652 | /* enet DMA only understands physical addresses */ | 759 | /* enet DMA only understands physical addresses */ |
653 | gfar_write(®s->tbase, addr); | 760 | gfar_write(®s->tbase0, addr); |
654 | 761 | ||
655 | /* Start the rx descriptor ring where the tx ring leaves off */ | 762 | /* Start the rx descriptor ring where the tx ring leaves off */ |
656 | addr = addr + sizeof (struct txbd8) * priv->tx_ring_size; | 763 | addr = addr + sizeof (struct txbd8) * priv->tx_ring_size; |
657 | vaddr = vaddr + sizeof (struct txbd8) * priv->tx_ring_size; | 764 | vaddr = vaddr + sizeof (struct txbd8) * priv->tx_ring_size; |
658 | priv->rx_bd_base = (struct rxbd8 *) vaddr; | 765 | priv->rx_bd_base = (struct rxbd8 *) vaddr; |
659 | gfar_write(®s->rbase, addr); | 766 | gfar_write(®s->rbase0, addr); |
660 | 767 | ||
661 | /* Setup the skbuff rings */ | 768 | /* Setup the skbuff rings */ |
662 | priv->tx_skbuff = | 769 | priv->tx_skbuff = |
@@ -664,8 +771,9 @@ int startup_gfar(struct net_device *dev) | |||
664 | priv->tx_ring_size, GFP_KERNEL); | 771 | priv->tx_ring_size, GFP_KERNEL); |
665 | 772 | ||
666 | if (priv->tx_skbuff == NULL) { | 773 | if (priv->tx_skbuff == NULL) { |
667 | printk(KERN_ERR "%s: Could not allocate tx_skbuff\n", | 774 | if (netif_msg_ifup(priv)) |
668 | dev->name); | 775 | printk(KERN_ERR "%s: Could not allocate tx_skbuff\n", |
776 | dev->name); | ||
669 | err = -ENOMEM; | 777 | err = -ENOMEM; |
670 | goto tx_skb_fail; | 778 | goto tx_skb_fail; |
671 | } | 779 | } |
@@ -678,8 +786,9 @@ int startup_gfar(struct net_device *dev) | |||
678 | priv->rx_ring_size, GFP_KERNEL); | 786 | priv->rx_ring_size, GFP_KERNEL); |
679 | 787 | ||
680 | if (priv->rx_skbuff == NULL) { | 788 | if (priv->rx_skbuff == NULL) { |
681 | printk(KERN_ERR "%s: Could not allocate rx_skbuff\n", | 789 | if (netif_msg_ifup(priv)) |
682 | dev->name); | 790 | printk(KERN_ERR "%s: Could not allocate rx_skbuff\n", |
791 | dev->name); | ||
683 | err = -ENOMEM; | 792 | err = -ENOMEM; |
684 | goto rx_skb_fail; | 793 | goto rx_skb_fail; |
685 | } | 794 | } |
@@ -726,12 +835,13 @@ int startup_gfar(struct net_device *dev) | |||
726 | /* If the device has multiple interrupts, register for | 835 | /* If the device has multiple interrupts, register for |
727 | * them. Otherwise, only register for the one */ | 836 | * them. Otherwise, only register for the one */ |
728 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { | 837 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { |
729 | /* Install our interrupt handlers for Error, | 838 | /* Install our interrupt handlers for Error, |
730 | * Transmit, and Receive */ | 839 | * Transmit, and Receive */ |
731 | if (request_irq(priv->interruptError, gfar_error, | 840 | if (request_irq(priv->interruptError, gfar_error, |
732 | 0, "enet_error", dev) < 0) { | 841 | 0, "enet_error", dev) < 0) { |
733 | printk(KERN_ERR "%s: Can't get IRQ %d\n", | 842 | if (netif_msg_intr(priv)) |
734 | dev->name, priv->interruptError); | 843 | printk(KERN_ERR "%s: Can't get IRQ %d\n", |
844 | dev->name, priv->interruptError); | ||
735 | 845 | ||
736 | err = -1; | 846 | err = -1; |
737 | goto err_irq_fail; | 847 | goto err_irq_fail; |
@@ -739,8 +849,9 @@ int startup_gfar(struct net_device *dev) | |||
739 | 849 | ||
740 | if (request_irq(priv->interruptTransmit, gfar_transmit, | 850 | if (request_irq(priv->interruptTransmit, gfar_transmit, |
741 | 0, "enet_tx", dev) < 0) { | 851 | 0, "enet_tx", dev) < 0) { |
742 | printk(KERN_ERR "%s: Can't get IRQ %d\n", | 852 | if (netif_msg_intr(priv)) |
743 | dev->name, priv->interruptTransmit); | 853 | printk(KERN_ERR "%s: Can't get IRQ %d\n", |
854 | dev->name, priv->interruptTransmit); | ||
744 | 855 | ||
745 | err = -1; | 856 | err = -1; |
746 | 857 | ||
@@ -749,8 +860,9 @@ int startup_gfar(struct net_device *dev) | |||
749 | 860 | ||
750 | if (request_irq(priv->interruptReceive, gfar_receive, | 861 | if (request_irq(priv->interruptReceive, gfar_receive, |
751 | 0, "enet_rx", dev) < 0) { | 862 | 0, "enet_rx", dev) < 0) { |
752 | printk(KERN_ERR "%s: Can't get IRQ %d (receive0)\n", | 863 | if (netif_msg_intr(priv)) |
753 | dev->name, priv->interruptReceive); | 864 | printk(KERN_ERR "%s: Can't get IRQ %d (receive0)\n", |
865 | dev->name, priv->interruptReceive); | ||
754 | 866 | ||
755 | err = -1; | 867 | err = -1; |
756 | goto rx_irq_fail; | 868 | goto rx_irq_fail; |
@@ -758,8 +870,9 @@ int startup_gfar(struct net_device *dev) | |||
758 | } else { | 870 | } else { |
759 | if (request_irq(priv->interruptTransmit, gfar_interrupt, | 871 | if (request_irq(priv->interruptTransmit, gfar_interrupt, |
760 | 0, "gfar_interrupt", dev) < 0) { | 872 | 0, "gfar_interrupt", dev) < 0) { |
761 | printk(KERN_ERR "%s: Can't get IRQ %d\n", | 873 | if (netif_msg_intr(priv)) |
762 | dev->name, priv->interruptError); | 874 | printk(KERN_ERR "%s: Can't get IRQ %d\n", |
875 | dev->name, priv->interruptError); | ||
763 | 876 | ||
764 | err = -1; | 877 | err = -1; |
765 | goto err_irq_fail; | 878 | goto err_irq_fail; |
@@ -787,28 +900,22 @@ int startup_gfar(struct net_device *dev) | |||
787 | else | 900 | else |
788 | gfar_write(®s->rxic, 0); | 901 | gfar_write(®s->rxic, 0); |
789 | 902 | ||
790 | init_waitqueue_head(&priv->rxcleanupq); | 903 | if (priv->rx_csum_enable) |
904 | rctrl |= RCTRL_CHECKSUMMING; | ||
791 | 905 | ||
792 | /* Enable Rx and Tx in MACCFG1 */ | 906 | if (priv->extended_hash) |
793 | tempval = gfar_read(®s->maccfg1); | 907 | rctrl |= RCTRL_EXTHASH; |
794 | tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN); | ||
795 | gfar_write(®s->maccfg1, tempval); | ||
796 | 908 | ||
797 | /* Initialize DMACTRL to have WWR and WOP */ | 909 | if (priv->vlan_enable) |
798 | tempval = gfar_read(&priv->regs->dmactrl); | 910 | rctrl |= RCTRL_VLAN; |
799 | tempval |= DMACTRL_INIT_SETTINGS; | ||
800 | gfar_write(&priv->regs->dmactrl, tempval); | ||
801 | 911 | ||
802 | /* Clear THLT, so that the DMA starts polling now */ | 912 | /* Init rctrl based on our settings */ |
803 | gfar_write(®s->tstat, TSTAT_CLEAR_THALT); | 913 | gfar_write(&priv->regs->rctrl, rctrl); |
804 | 914 | ||
805 | /* Make sure we aren't stopped */ | 915 | if (dev->features & NETIF_F_IP_CSUM) |
806 | tempval = gfar_read(&priv->regs->dmactrl); | 916 | gfar_write(&priv->regs->tctrl, TCTRL_INIT_CSUM); |
807 | tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); | ||
808 | gfar_write(&priv->regs->dmactrl, tempval); | ||
809 | 917 | ||
810 | /* Unmask the interrupts we look for */ | 918 | gfar_start(dev); |
811 | gfar_write(®s->imask, IMASK_DEFAULT); | ||
812 | 919 | ||
813 | return 0; | 920 | return 0; |
814 | 921 | ||
@@ -824,7 +931,7 @@ tx_skb_fail: | |||
824 | sizeof(struct txbd8)*priv->tx_ring_size | 931 | sizeof(struct txbd8)*priv->tx_ring_size |
825 | + sizeof(struct rxbd8)*priv->rx_ring_size, | 932 | + sizeof(struct rxbd8)*priv->rx_ring_size, |
826 | priv->tx_bd_base, | 933 | priv->tx_bd_base, |
827 | gfar_read(®s->tbase)); | 934 | gfar_read(®s->tbase0)); |
828 | 935 | ||
829 | if (priv->mii_info->phyinfo->close) | 936 | if (priv->mii_info->phyinfo->close) |
830 | priv->mii_info->phyinfo->close(priv->mii_info); | 937 | priv->mii_info->phyinfo->close(priv->mii_info); |
@@ -857,11 +964,62 @@ static int gfar_enet_open(struct net_device *dev) | |||
857 | return err; | 964 | return err; |
858 | } | 965 | } |
859 | 966 | ||
967 | static struct txfcb *gfar_add_fcb(struct sk_buff *skb, struct txbd8 *bdp) | ||
968 | { | ||
969 | struct txfcb *fcb = (struct txfcb *)skb_push (skb, GMAC_FCB_LEN); | ||
970 | |||
971 | memset(fcb, 0, GMAC_FCB_LEN); | ||
972 | |||
973 | /* Flag the bd so the controller looks for the FCB */ | ||
974 | bdp->status |= TXBD_TOE; | ||
975 | |||
976 | return fcb; | ||
977 | } | ||
978 | |||
979 | static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb) | ||
980 | { | ||
981 | int len; | ||
982 | |||
983 | /* If we're here, it's a IP packet with a TCP or UDP | ||
984 | * payload. We set it to checksum, using a pseudo-header | ||
985 | * we provide | ||
986 | */ | ||
987 | fcb->ip = 1; | ||
988 | fcb->tup = 1; | ||
989 | fcb->ctu = 1; | ||
990 | fcb->nph = 1; | ||
991 | |||
992 | /* Notify the controller what the protocol is */ | ||
993 | if (skb->nh.iph->protocol == IPPROTO_UDP) | ||
994 | fcb->udp = 1; | ||
995 | |||
996 | /* l3os is the distance between the start of the | ||
997 | * frame (skb->data) and the start of the IP hdr. | ||
998 | * l4os is the distance between the start of the | ||
999 | * l3 hdr and the l4 hdr */ | ||
1000 | fcb->l3os = (u16)(skb->nh.raw - skb->data - GMAC_FCB_LEN); | ||
1001 | fcb->l4os = (u16)(skb->h.raw - skb->nh.raw); | ||
1002 | |||
1003 | len = skb->nh.iph->tot_len - fcb->l4os; | ||
1004 | |||
1005 | /* Provide the pseudoheader csum */ | ||
1006 | fcb->phcs = ~csum_tcpudp_magic(skb->nh.iph->saddr, | ||
1007 | skb->nh.iph->daddr, len, | ||
1008 | skb->nh.iph->protocol, 0); | ||
1009 | } | ||
1010 | |||
1011 | void gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb) | ||
1012 | { | ||
1013 | fcb->vln = 1; | ||
1014 | fcb->vlctl = vlan_tx_tag_get(skb); | ||
1015 | } | ||
1016 | |||
860 | /* This is called by the kernel when a frame is ready for transmission. */ | 1017 | /* This is called by the kernel when a frame is ready for transmission. */ |
861 | /* It is pointed to by the dev->hard_start_xmit function pointer */ | 1018 | /* It is pointed to by the dev->hard_start_xmit function pointer */ |
862 | static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) | 1019 | static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) |
863 | { | 1020 | { |
864 | struct gfar_private *priv = netdev_priv(dev); | 1021 | struct gfar_private *priv = netdev_priv(dev); |
1022 | struct txfcb *fcb = NULL; | ||
865 | struct txbd8 *txbdp; | 1023 | struct txbd8 *txbdp; |
866 | 1024 | ||
867 | /* Update transmit stats */ | 1025 | /* Update transmit stats */ |
@@ -876,9 +1034,24 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
876 | /* Clear all but the WRAP status flags */ | 1034 | /* Clear all but the WRAP status flags */ |
877 | txbdp->status &= TXBD_WRAP; | 1035 | txbdp->status &= TXBD_WRAP; |
878 | 1036 | ||
1037 | /* Set up checksumming */ | ||
1038 | if ((dev->features & NETIF_F_IP_CSUM) | ||
1039 | && (CHECKSUM_HW == skb->ip_summed)) { | ||
1040 | fcb = gfar_add_fcb(skb, txbdp); | ||
1041 | gfar_tx_checksum(skb, fcb); | ||
1042 | } | ||
1043 | |||
1044 | if (priv->vlan_enable && | ||
1045 | unlikely(priv->vlgrp && vlan_tx_tag_present(skb))) { | ||
1046 | if (NULL == fcb) | ||
1047 | fcb = gfar_add_fcb(skb, txbdp); | ||
1048 | |||
1049 | gfar_tx_vlan(skb, fcb); | ||
1050 | } | ||
1051 | |||
879 | /* Set buffer length and pointer */ | 1052 | /* Set buffer length and pointer */ |
880 | txbdp->length = skb->len; | 1053 | txbdp->length = skb->len; |
881 | txbdp->bufPtr = dma_map_single(NULL, skb->data, | 1054 | txbdp->bufPtr = dma_map_single(NULL, skb->data, |
882 | skb->len, DMA_TO_DEVICE); | 1055 | skb->len, DMA_TO_DEVICE); |
883 | 1056 | ||
884 | /* Save the skb pointer so we can free it later */ | 1057 | /* Save the skb pointer so we can free it later */ |
@@ -972,15 +1145,78 @@ int gfar_set_mac_address(struct net_device *dev) | |||
972 | } | 1145 | } |
973 | 1146 | ||
974 | 1147 | ||
1148 | /* Enables and disables VLAN insertion/extraction */ | ||
1149 | static void gfar_vlan_rx_register(struct net_device *dev, | ||
1150 | struct vlan_group *grp) | ||
1151 | { | ||
1152 | struct gfar_private *priv = netdev_priv(dev); | ||
1153 | unsigned long flags; | ||
1154 | u32 tempval; | ||
1155 | |||
1156 | spin_lock_irqsave(&priv->lock, flags); | ||
1157 | |||
1158 | priv->vlgrp = grp; | ||
1159 | |||
1160 | if (grp) { | ||
1161 | /* Enable VLAN tag insertion */ | ||
1162 | tempval = gfar_read(&priv->regs->tctrl); | ||
1163 | tempval |= TCTRL_VLINS; | ||
1164 | |||
1165 | gfar_write(&priv->regs->tctrl, tempval); | ||
1166 | |||
1167 | /* Enable VLAN tag extraction */ | ||
1168 | tempval = gfar_read(&priv->regs->rctrl); | ||
1169 | tempval |= RCTRL_VLEX; | ||
1170 | gfar_write(&priv->regs->rctrl, tempval); | ||
1171 | } else { | ||
1172 | /* Disable VLAN tag insertion */ | ||
1173 | tempval = gfar_read(&priv->regs->tctrl); | ||
1174 | tempval &= ~TCTRL_VLINS; | ||
1175 | gfar_write(&priv->regs->tctrl, tempval); | ||
1176 | |||
1177 | /* Disable VLAN tag extraction */ | ||
1178 | tempval = gfar_read(&priv->regs->rctrl); | ||
1179 | tempval &= ~RCTRL_VLEX; | ||
1180 | gfar_write(&priv->regs->rctrl, tempval); | ||
1181 | } | ||
1182 | |||
1183 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1184 | } | ||
1185 | |||
1186 | |||
1187 | static void gfar_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid) | ||
1188 | { | ||
1189 | struct gfar_private *priv = netdev_priv(dev); | ||
1190 | unsigned long flags; | ||
1191 | |||
1192 | spin_lock_irqsave(&priv->lock, flags); | ||
1193 | |||
1194 | if (priv->vlgrp) | ||
1195 | priv->vlgrp->vlan_devices[vid] = NULL; | ||
1196 | |||
1197 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1198 | } | ||
1199 | |||
1200 | |||
975 | static int gfar_change_mtu(struct net_device *dev, int new_mtu) | 1201 | static int gfar_change_mtu(struct net_device *dev, int new_mtu) |
976 | { | 1202 | { |
977 | int tempsize, tempval; | 1203 | int tempsize, tempval; |
978 | struct gfar_private *priv = netdev_priv(dev); | 1204 | struct gfar_private *priv = netdev_priv(dev); |
979 | int oldsize = priv->rx_buffer_size; | 1205 | int oldsize = priv->rx_buffer_size; |
980 | int frame_size = new_mtu + 18; | 1206 | int frame_size = new_mtu + ETH_HLEN; |
1207 | |||
1208 | if (priv->vlan_enable) | ||
1209 | frame_size += VLAN_ETH_HLEN; | ||
1210 | |||
1211 | if (gfar_uses_fcb(priv)) | ||
1212 | frame_size += GMAC_FCB_LEN; | ||
1213 | |||
1214 | frame_size += priv->padding; | ||
981 | 1215 | ||
982 | if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) { | 1216 | if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) { |
983 | printk(KERN_ERR "%s: Invalid MTU setting\n", dev->name); | 1217 | if (netif_msg_drv(priv)) |
1218 | printk(KERN_ERR "%s: Invalid MTU setting\n", | ||
1219 | dev->name); | ||
984 | return -EINVAL; | 1220 | return -EINVAL; |
985 | } | 1221 | } |
986 | 1222 | ||
@@ -1120,7 +1356,7 @@ struct sk_buff * gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp) | |||
1120 | skb->dev = dev; | 1356 | skb->dev = dev; |
1121 | 1357 | ||
1122 | bdp->bufPtr = dma_map_single(NULL, skb->data, | 1358 | bdp->bufPtr = dma_map_single(NULL, skb->data, |
1123 | priv->rx_buffer_size + RXBUF_ALIGNMENT, | 1359 | priv->rx_buffer_size + RXBUF_ALIGNMENT, |
1124 | DMA_FROM_DEVICE); | 1360 | DMA_FROM_DEVICE); |
1125 | 1361 | ||
1126 | bdp->length = 0; | 1362 | bdp->length = 0; |
@@ -1190,11 +1426,10 @@ irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs) | |||
1190 | 1426 | ||
1191 | __netif_rx_schedule(dev); | 1427 | __netif_rx_schedule(dev); |
1192 | } else { | 1428 | } else { |
1193 | #ifdef VERBOSE_GFAR_ERRORS | 1429 | if (netif_msg_rx_err(priv)) |
1194 | printk(KERN_DEBUG "%s: receive called twice (%x)[%x]\n", | 1430 | printk(KERN_DEBUG "%s: receive called twice (%x)[%x]\n", |
1195 | dev->name, gfar_read(&priv->regs->ievent), | 1431 | dev->name, gfar_read(&priv->regs->ievent), |
1196 | gfar_read(&priv->regs->imask)); | 1432 | gfar_read(&priv->regs->imask)); |
1197 | #endif | ||
1198 | } | 1433 | } |
1199 | #else | 1434 | #else |
1200 | 1435 | ||
@@ -1209,15 +1444,43 @@ irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs) | |||
1209 | else | 1444 | else |
1210 | gfar_write(&priv->regs->rxic, 0); | 1445 | gfar_write(&priv->regs->rxic, 0); |
1211 | 1446 | ||
1212 | /* Just in case we need to wake the ring param changer */ | ||
1213 | priv->rxclean = 1; | ||
1214 | |||
1215 | spin_unlock(&priv->lock); | 1447 | spin_unlock(&priv->lock); |
1216 | #endif | 1448 | #endif |
1217 | 1449 | ||
1218 | return IRQ_HANDLED; | 1450 | return IRQ_HANDLED; |
1219 | } | 1451 | } |
1220 | 1452 | ||
1453 | static inline int gfar_rx_vlan(struct sk_buff *skb, | ||
1454 | struct vlan_group *vlgrp, unsigned short vlctl) | ||
1455 | { | ||
1456 | #ifdef CONFIG_GFAR_NAPI | ||
1457 | return vlan_hwaccel_receive_skb(skb, vlgrp, vlctl); | ||
1458 | #else | ||
1459 | return vlan_hwaccel_rx(skb, vlgrp, vlctl); | ||
1460 | #endif | ||
1461 | } | ||
1462 | |||
1463 | static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb) | ||
1464 | { | ||
1465 | /* If valid headers were found, and valid sums | ||
1466 | * were verified, then we tell the kernel that no | ||
1467 | * checksumming is necessary. Otherwise, it is */ | ||
1468 | if (fcb->cip && !fcb->eip && fcb->ctu && !fcb->etu) | ||
1469 | skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
1470 | else | ||
1471 | skb->ip_summed = CHECKSUM_NONE; | ||
1472 | } | ||
1473 | |||
1474 | |||
1475 | static inline struct rxfcb *gfar_get_fcb(struct sk_buff *skb) | ||
1476 | { | ||
1477 | struct rxfcb *fcb = (struct rxfcb *)skb->data; | ||
1478 | |||
1479 | /* Remove the FCB from the skb */ | ||
1480 | skb_pull(skb, GMAC_FCB_LEN); | ||
1481 | |||
1482 | return fcb; | ||
1483 | } | ||
1221 | 1484 | ||
1222 | /* gfar_process_frame() -- handle one incoming packet if skb | 1485 | /* gfar_process_frame() -- handle one incoming packet if skb |
1223 | * isn't NULL. */ | 1486 | * isn't NULL. */ |
@@ -1225,35 +1488,51 @@ static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, | |||
1225 | int length) | 1488 | int length) |
1226 | { | 1489 | { |
1227 | struct gfar_private *priv = netdev_priv(dev); | 1490 | struct gfar_private *priv = netdev_priv(dev); |
1491 | struct rxfcb *fcb = NULL; | ||
1228 | 1492 | ||
1229 | if (skb == NULL) { | 1493 | if (skb == NULL) { |
1230 | #ifdef BRIEF_GFAR_ERRORS | 1494 | if (netif_msg_rx_err(priv)) |
1231 | printk(KERN_WARNING "%s: Missing skb!!.\n", | 1495 | printk(KERN_WARNING "%s: Missing skb!!.\n", dev->name); |
1232 | dev->name); | ||
1233 | #endif | ||
1234 | priv->stats.rx_dropped++; | 1496 | priv->stats.rx_dropped++; |
1235 | priv->extra_stats.rx_skbmissing++; | 1497 | priv->extra_stats.rx_skbmissing++; |
1236 | } else { | 1498 | } else { |
1499 | int ret; | ||
1500 | |||
1237 | /* Prep the skb for the packet */ | 1501 | /* Prep the skb for the packet */ |
1238 | skb_put(skb, length); | 1502 | skb_put(skb, length); |
1239 | 1503 | ||
1504 | /* Grab the FCB if there is one */ | ||
1505 | if (gfar_uses_fcb(priv)) | ||
1506 | fcb = gfar_get_fcb(skb); | ||
1507 | |||
1508 | /* Remove the padded bytes, if there are any */ | ||
1509 | if (priv->padding) | ||
1510 | skb_pull(skb, priv->padding); | ||
1511 | |||
1512 | if (priv->rx_csum_enable) | ||
1513 | gfar_rx_checksum(skb, fcb); | ||
1514 | |||
1240 | /* Tell the skb what kind of packet this is */ | 1515 | /* Tell the skb what kind of packet this is */ |
1241 | skb->protocol = eth_type_trans(skb, dev); | 1516 | skb->protocol = eth_type_trans(skb, dev); |
1242 | 1517 | ||
1243 | /* Send the packet up the stack */ | 1518 | /* Send the packet up the stack */ |
1244 | if (RECEIVE(skb) == NET_RX_DROP) { | 1519 | if (unlikely(priv->vlgrp && fcb->vln)) |
1520 | ret = gfar_rx_vlan(skb, priv->vlgrp, fcb->vlctl); | ||
1521 | else | ||
1522 | ret = RECEIVE(skb); | ||
1523 | |||
1524 | if (NET_RX_DROP == ret) | ||
1245 | priv->extra_stats.kernel_dropped++; | 1525 | priv->extra_stats.kernel_dropped++; |
1246 | } | ||
1247 | } | 1526 | } |
1248 | 1527 | ||
1249 | return 0; | 1528 | return 0; |
1250 | } | 1529 | } |
1251 | 1530 | ||
1252 | /* gfar_clean_rx_ring() -- Processes each frame in the rx ring | 1531 | /* gfar_clean_rx_ring() -- Processes each frame in the rx ring |
1253 | * until the budget/quota has been reached. Returns the number | 1532 | * until the budget/quota has been reached. Returns the number |
1254 | * of frames handled | 1533 | * of frames handled |
1255 | */ | 1534 | */ |
1256 | static int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit) | 1535 | int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit) |
1257 | { | 1536 | { |
1258 | struct rxbd8 *bdp; | 1537 | struct rxbd8 *bdp; |
1259 | struct sk_buff *skb; | 1538 | struct sk_buff *skb; |
@@ -1355,9 +1634,6 @@ static int gfar_poll(struct net_device *dev, int *budget) | |||
1355 | mk_ic_value(priv->rxcount, priv->rxtime)); | 1634 | mk_ic_value(priv->rxcount, priv->rxtime)); |
1356 | else | 1635 | else |
1357 | gfar_write(&priv->regs->rxic, 0); | 1636 | gfar_write(&priv->regs->rxic, 0); |
1358 | |||
1359 | /* Signal to the ring size changer that it's safe to go */ | ||
1360 | priv->rxclean = 1; | ||
1361 | } | 1637 | } |
1362 | 1638 | ||
1363 | return (rx_work_limit < 0) ? 1 : 0; | 1639 | return (rx_work_limit < 0) ? 1 : 0; |
@@ -1393,10 +1669,8 @@ static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1393 | if (events & IEVENT_CRL) | 1669 | if (events & IEVENT_CRL) |
1394 | priv->stats.tx_aborted_errors++; | 1670 | priv->stats.tx_aborted_errors++; |
1395 | if (events & IEVENT_XFUN) { | 1671 | if (events & IEVENT_XFUN) { |
1396 | #ifdef VERBOSE_GFAR_ERRORS | 1672 | if (netif_msg_tx_err(priv)) |
1397 | printk(KERN_WARNING "%s: tx underrun. dropped packet\n", | 1673 | printk(KERN_WARNING "%s: tx underrun. dropped packet\n", dev->name); |
1398 | dev->name); | ||
1399 | #endif | ||
1400 | priv->stats.tx_dropped++; | 1674 | priv->stats.tx_dropped++; |
1401 | priv->extra_stats.tx_underrun++; | 1675 | priv->extra_stats.tx_underrun++; |
1402 | 1676 | ||
@@ -1415,36 +1689,30 @@ static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1415 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); | 1689 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); |
1416 | #endif | 1690 | #endif |
1417 | 1691 | ||
1418 | #ifdef VERBOSE_GFAR_ERRORS | 1692 | if (netif_msg_rx_err(priv)) |
1419 | printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n", dev->name, | 1693 | printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n", |
1420 | gfar_read(&priv->regs->rstat)); | 1694 | dev->name, |
1421 | #endif | 1695 | gfar_read(&priv->regs->rstat)); |
1422 | } | 1696 | } |
1423 | if (events & IEVENT_BABR) { | 1697 | if (events & IEVENT_BABR) { |
1424 | priv->stats.rx_errors++; | 1698 | priv->stats.rx_errors++; |
1425 | priv->extra_stats.rx_babr++; | 1699 | priv->extra_stats.rx_babr++; |
1426 | 1700 | ||
1427 | #ifdef VERBOSE_GFAR_ERRORS | 1701 | if (netif_msg_rx_err(priv)) |
1428 | printk(KERN_DEBUG "%s: babbling error\n", dev->name); | 1702 | printk(KERN_DEBUG "%s: babbling error\n", dev->name); |
1429 | #endif | ||
1430 | } | 1703 | } |
1431 | if (events & IEVENT_EBERR) { | 1704 | if (events & IEVENT_EBERR) { |
1432 | priv->extra_stats.eberr++; | 1705 | priv->extra_stats.eberr++; |
1433 | #ifdef VERBOSE_GFAR_ERRORS | 1706 | if (netif_msg_rx_err(priv)) |
1434 | printk(KERN_DEBUG "%s: EBERR\n", dev->name); | 1707 | printk(KERN_DEBUG "%s: EBERR\n", dev->name); |
1435 | #endif | ||
1436 | } | ||
1437 | if (events & IEVENT_RXC) { | ||
1438 | #ifdef VERBOSE_GFAR_ERRORS | ||
1439 | printk(KERN_DEBUG "%s: control frame\n", dev->name); | ||
1440 | #endif | ||
1441 | } | 1708 | } |
1709 | if ((events & IEVENT_RXC) && (netif_msg_rx_err(priv))) | ||
1710 | printk(KERN_DEBUG "%s: control frame\n", dev->name); | ||
1442 | 1711 | ||
1443 | if (events & IEVENT_BABT) { | 1712 | if (events & IEVENT_BABT) { |
1444 | priv->extra_stats.tx_babt++; | 1713 | priv->extra_stats.tx_babt++; |
1445 | #ifdef VERBOSE_GFAR_ERRORS | 1714 | if (netif_msg_rx_err(priv)) |
1446 | printk(KERN_DEBUG "%s: babt error\n", dev->name); | 1715 | printk(KERN_DEBUG "%s: babt error\n", dev->name); |
1447 | #endif | ||
1448 | } | 1716 | } |
1449 | 1717 | ||
1450 | return IRQ_HANDLED; | 1718 | return IRQ_HANDLED; |
@@ -1510,7 +1778,7 @@ static void gfar_phy_timer(unsigned long data) | |||
1510 | * If, after GFAR_AN_TIMEOUT seconds, it has not | 1778 | * If, after GFAR_AN_TIMEOUT seconds, it has not |
1511 | * finished, we switch to forced. | 1779 | * finished, we switch to forced. |
1512 | * Either way, once the process has completed, we either | 1780 | * Either way, once the process has completed, we either |
1513 | * request the interrupt, or switch the timer over to | 1781 | * request the interrupt, or switch the timer over to |
1514 | * using gfar_phy_timer to check status */ | 1782 | * using gfar_phy_timer to check status */ |
1515 | static void gfar_phy_startup_timer(unsigned long data) | 1783 | static void gfar_phy_startup_timer(unsigned long data) |
1516 | { | 1784 | { |
@@ -1535,8 +1803,9 @@ static void gfar_phy_startup_timer(unsigned long data) | |||
1535 | 1803 | ||
1536 | /* Forcing failed! Give up */ | 1804 | /* Forcing failed! Give up */ |
1537 | if(result) { | 1805 | if(result) { |
1538 | printk(KERN_ERR "%s: Forcing failed!\n", | 1806 | if (netif_msg_link(priv)) |
1539 | mii_info->dev->name); | 1807 | printk(KERN_ERR "%s: Forcing failed!\n", |
1808 | mii_info->dev->name); | ||
1540 | return; | 1809 | return; |
1541 | } | 1810 | } |
1542 | } | 1811 | } |
@@ -1546,16 +1815,17 @@ static void gfar_phy_startup_timer(unsigned long data) | |||
1546 | 1815 | ||
1547 | /* Grab the PHY interrupt, if necessary/possible */ | 1816 | /* Grab the PHY interrupt, if necessary/possible */ |
1548 | if (priv->einfo->board_flags & FSL_GIANFAR_BRD_HAS_PHY_INTR) { | 1817 | if (priv->einfo->board_flags & FSL_GIANFAR_BRD_HAS_PHY_INTR) { |
1549 | if (request_irq(priv->einfo->interruptPHY, | 1818 | if (request_irq(priv->einfo->interruptPHY, |
1550 | phy_interrupt, | 1819 | phy_interrupt, |
1551 | SA_SHIRQ, | 1820 | SA_SHIRQ, |
1552 | "phy_interrupt", | 1821 | "phy_interrupt", |
1553 | mii_info->dev) < 0) { | 1822 | mii_info->dev) < 0) { |
1554 | printk(KERN_ERR "%s: Can't get IRQ %d (PHY)\n", | 1823 | if (netif_msg_intr(priv)) |
1555 | mii_info->dev->name, | 1824 | printk(KERN_ERR "%s: Can't get IRQ %d (PHY)\n", |
1825 | mii_info->dev->name, | ||
1556 | priv->einfo->interruptPHY); | 1826 | priv->einfo->interruptPHY); |
1557 | } else { | 1827 | } else { |
1558 | mii_configure_phy_interrupt(priv->mii_info, | 1828 | mii_configure_phy_interrupt(priv->mii_info, |
1559 | MII_INTERRUPT_ENABLED); | 1829 | MII_INTERRUPT_ENABLED); |
1560 | return; | 1830 | return; |
1561 | } | 1831 | } |
@@ -1592,15 +1862,17 @@ static void adjust_link(struct net_device *dev) | |||
1592 | tempval &= ~(MACCFG2_FULL_DUPLEX); | 1862 | tempval &= ~(MACCFG2_FULL_DUPLEX); |
1593 | gfar_write(®s->maccfg2, tempval); | 1863 | gfar_write(®s->maccfg2, tempval); |
1594 | 1864 | ||
1595 | printk(KERN_INFO "%s: Half Duplex\n", | 1865 | if (netif_msg_link(priv)) |
1596 | dev->name); | 1866 | printk(KERN_INFO "%s: Half Duplex\n", |
1867 | dev->name); | ||
1597 | } else { | 1868 | } else { |
1598 | tempval = gfar_read(®s->maccfg2); | 1869 | tempval = gfar_read(®s->maccfg2); |
1599 | tempval |= MACCFG2_FULL_DUPLEX; | 1870 | tempval |= MACCFG2_FULL_DUPLEX; |
1600 | gfar_write(®s->maccfg2, tempval); | 1871 | gfar_write(®s->maccfg2, tempval); |
1601 | 1872 | ||
1602 | printk(KERN_INFO "%s: Full Duplex\n", | 1873 | if (netif_msg_link(priv)) |
1603 | dev->name); | 1874 | printk(KERN_INFO "%s: Full Duplex\n", |
1875 | dev->name); | ||
1604 | } | 1876 | } |
1605 | 1877 | ||
1606 | priv->oldduplex = mii_info->duplex; | 1878 | priv->oldduplex = mii_info->duplex; |
@@ -1622,27 +1894,32 @@ static void adjust_link(struct net_device *dev) | |||
1622 | gfar_write(®s->maccfg2, tempval); | 1894 | gfar_write(®s->maccfg2, tempval); |
1623 | break; | 1895 | break; |
1624 | default: | 1896 | default: |
1625 | printk(KERN_WARNING | 1897 | if (netif_msg_link(priv)) |
1626 | "%s: Ack! Speed (%d) is not 10/100/1000!\n", | 1898 | printk(KERN_WARNING |
1627 | dev->name, mii_info->speed); | 1899 | "%s: Ack! Speed (%d) is not 10/100/1000!\n", |
1900 | dev->name, mii_info->speed); | ||
1628 | break; | 1901 | break; |
1629 | } | 1902 | } |
1630 | 1903 | ||
1631 | printk(KERN_INFO "%s: Speed %dBT\n", dev->name, | 1904 | if (netif_msg_link(priv)) |
1632 | mii_info->speed); | 1905 | printk(KERN_INFO "%s: Speed %dBT\n", dev->name, |
1906 | mii_info->speed); | ||
1633 | 1907 | ||
1634 | priv->oldspeed = mii_info->speed; | 1908 | priv->oldspeed = mii_info->speed; |
1635 | } | 1909 | } |
1636 | 1910 | ||
1637 | if (!priv->oldlink) { | 1911 | if (!priv->oldlink) { |
1638 | printk(KERN_INFO "%s: Link is up\n", dev->name); | 1912 | if (netif_msg_link(priv)) |
1913 | printk(KERN_INFO "%s: Link is up\n", dev->name); | ||
1639 | priv->oldlink = 1; | 1914 | priv->oldlink = 1; |
1640 | netif_carrier_on(dev); | 1915 | netif_carrier_on(dev); |
1641 | netif_schedule(dev); | 1916 | netif_schedule(dev); |
1642 | } | 1917 | } |
1643 | } else { | 1918 | } else { |
1644 | if (priv->oldlink) { | 1919 | if (priv->oldlink) { |
1645 | printk(KERN_INFO "%s: Link is down\n", dev->name); | 1920 | if (netif_msg_link(priv)) |
1921 | printk(KERN_INFO "%s: Link is down\n", | ||
1922 | dev->name); | ||
1646 | priv->oldlink = 0; | 1923 | priv->oldlink = 0; |
1647 | priv->oldspeed = 0; | 1924 | priv->oldspeed = 0; |
1648 | priv->oldduplex = -1; | 1925 | priv->oldduplex = -1; |
@@ -1664,8 +1941,9 @@ static void gfar_set_multi(struct net_device *dev) | |||
1664 | u32 tempval; | 1941 | u32 tempval; |
1665 | 1942 | ||
1666 | if(dev->flags & IFF_PROMISC) { | 1943 | if(dev->flags & IFF_PROMISC) { |
1667 | printk(KERN_INFO "%s: Entering promiscuous mode.\n", | 1944 | if (netif_msg_drv(priv)) |
1668 | dev->name); | 1945 | printk(KERN_INFO "%s: Entering promiscuous mode.\n", |
1946 | dev->name); | ||
1669 | /* Set RCTRL to PROM */ | 1947 | /* Set RCTRL to PROM */ |
1670 | tempval = gfar_read(®s->rctrl); | 1948 | tempval = gfar_read(®s->rctrl); |
1671 | tempval |= RCTRL_PROM; | 1949 | tempval |= RCTRL_PROM; |
@@ -1679,6 +1957,14 @@ static void gfar_set_multi(struct net_device *dev) | |||
1679 | 1957 | ||
1680 | if(dev->flags & IFF_ALLMULTI) { | 1958 | if(dev->flags & IFF_ALLMULTI) { |
1681 | /* Set the hash to rx all multicast frames */ | 1959 | /* Set the hash to rx all multicast frames */ |
1960 | gfar_write(®s->igaddr0, 0xffffffff); | ||
1961 | gfar_write(®s->igaddr1, 0xffffffff); | ||
1962 | gfar_write(®s->igaddr2, 0xffffffff); | ||
1963 | gfar_write(®s->igaddr3, 0xffffffff); | ||
1964 | gfar_write(®s->igaddr4, 0xffffffff); | ||
1965 | gfar_write(®s->igaddr5, 0xffffffff); | ||
1966 | gfar_write(®s->igaddr6, 0xffffffff); | ||
1967 | gfar_write(®s->igaddr7, 0xffffffff); | ||
1682 | gfar_write(®s->gaddr0, 0xffffffff); | 1968 | gfar_write(®s->gaddr0, 0xffffffff); |
1683 | gfar_write(®s->gaddr1, 0xffffffff); | 1969 | gfar_write(®s->gaddr1, 0xffffffff); |
1684 | gfar_write(®s->gaddr2, 0xffffffff); | 1970 | gfar_write(®s->gaddr2, 0xffffffff); |
@@ -1689,6 +1975,14 @@ static void gfar_set_multi(struct net_device *dev) | |||
1689 | gfar_write(®s->gaddr7, 0xffffffff); | 1975 | gfar_write(®s->gaddr7, 0xffffffff); |
1690 | } else { | 1976 | } else { |
1691 | /* zero out the hash */ | 1977 | /* zero out the hash */ |
1978 | gfar_write(®s->igaddr0, 0x0); | ||
1979 | gfar_write(®s->igaddr1, 0x0); | ||
1980 | gfar_write(®s->igaddr2, 0x0); | ||
1981 | gfar_write(®s->igaddr3, 0x0); | ||
1982 | gfar_write(®s->igaddr4, 0x0); | ||
1983 | gfar_write(®s->igaddr5, 0x0); | ||
1984 | gfar_write(®s->igaddr6, 0x0); | ||
1985 | gfar_write(®s->igaddr7, 0x0); | ||
1692 | gfar_write(®s->gaddr0, 0x0); | 1986 | gfar_write(®s->gaddr0, 0x0); |
1693 | gfar_write(®s->gaddr1, 0x0); | 1987 | gfar_write(®s->gaddr1, 0x0); |
1694 | gfar_write(®s->gaddr2, 0x0); | 1988 | gfar_write(®s->gaddr2, 0x0); |
@@ -1727,16 +2021,15 @@ static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr) | |||
1727 | { | 2021 | { |
1728 | u32 tempval; | 2022 | u32 tempval; |
1729 | struct gfar_private *priv = netdev_priv(dev); | 2023 | struct gfar_private *priv = netdev_priv(dev); |
1730 | struct gfar *regs = priv->regs; | ||
1731 | u32 *hash = ®s->gaddr0; | ||
1732 | u32 result = ether_crc(MAC_ADDR_LEN, addr); | 2024 | u32 result = ether_crc(MAC_ADDR_LEN, addr); |
1733 | u8 whichreg = ((result >> 29) & 0x7); | 2025 | int width = priv->hash_width; |
1734 | u8 whichbit = ((result >> 24) & 0x1f); | 2026 | u8 whichbit = (result >> (32 - width)) & 0x1f; |
2027 | u8 whichreg = result >> (32 - width + 5); | ||
1735 | u32 value = (1 << (31-whichbit)); | 2028 | u32 value = (1 << (31-whichbit)); |
1736 | 2029 | ||
1737 | tempval = gfar_read(&hash[whichreg]); | 2030 | tempval = gfar_read(priv->hash_regs[whichreg]); |
1738 | tempval |= value; | 2031 | tempval |= value; |
1739 | gfar_write(&hash[whichreg], tempval); | 2032 | gfar_write(priv->hash_regs[whichreg], tempval); |
1740 | 2033 | ||
1741 | return; | 2034 | return; |
1742 | } | 2035 | } |
@@ -1754,10 +2047,9 @@ static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs) | |||
1754 | gfar_write(&priv->regs->ievent, IEVENT_ERR_MASK); | 2047 | gfar_write(&priv->regs->ievent, IEVENT_ERR_MASK); |
1755 | 2048 | ||
1756 | /* Hmm... */ | 2049 | /* Hmm... */ |
1757 | #if defined (BRIEF_GFAR_ERRORS) || defined (VERBOSE_GFAR_ERRORS) | 2050 | if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv)) |
1758 | printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n", | 2051 | printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n", |
1759 | dev->name, events, gfar_read(&priv->regs->imask)); | 2052 | dev->name, events, gfar_read(&priv->regs->imask)); |
1760 | #endif | ||
1761 | 2053 | ||
1762 | /* Update the error counters */ | 2054 | /* Update the error counters */ |
1763 | if (events & IEVENT_TXE) { | 2055 | if (events & IEVENT_TXE) { |
@@ -1768,19 +2060,17 @@ static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs) | |||
1768 | if (events & IEVENT_CRL) | 2060 | if (events & IEVENT_CRL) |
1769 | priv->stats.tx_aborted_errors++; | 2061 | priv->stats.tx_aborted_errors++; |
1770 | if (events & IEVENT_XFUN) { | 2062 | if (events & IEVENT_XFUN) { |
1771 | #ifdef VERBOSE_GFAR_ERRORS | 2063 | if (netif_msg_tx_err(priv)) |
1772 | printk(KERN_DEBUG "%s: underrun. packet dropped.\n", | 2064 | printk(KERN_DEBUG "%s: underrun. packet dropped.\n", |
1773 | dev->name); | 2065 | dev->name); |
1774 | #endif | ||
1775 | priv->stats.tx_dropped++; | 2066 | priv->stats.tx_dropped++; |
1776 | priv->extra_stats.tx_underrun++; | 2067 | priv->extra_stats.tx_underrun++; |
1777 | 2068 | ||
1778 | /* Reactivate the Tx Queues */ | 2069 | /* Reactivate the Tx Queues */ |
1779 | gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); | 2070 | gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); |
1780 | } | 2071 | } |
1781 | #ifdef VERBOSE_GFAR_ERRORS | 2072 | if (netif_msg_tx_err(priv)) |
1782 | printk(KERN_DEBUG "%s: Transmit Error\n", dev->name); | 2073 | printk(KERN_DEBUG "%s: Transmit Error\n", dev->name); |
1783 | #endif | ||
1784 | } | 2074 | } |
1785 | if (events & IEVENT_BSY) { | 2075 | if (events & IEVENT_BSY) { |
1786 | priv->stats.rx_errors++; | 2076 | priv->stats.rx_errors++; |
@@ -1793,35 +2083,31 @@ static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs) | |||
1793 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); | 2083 | gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); |
1794 | #endif | 2084 | #endif |
1795 | 2085 | ||
1796 | #ifdef VERBOSE_GFAR_ERRORS | 2086 | if (netif_msg_rx_err(priv)) |
1797 | printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n", dev->name, | 2087 | printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n", |
1798 | gfar_read(&priv->regs->rstat)); | 2088 | dev->name, |
1799 | #endif | 2089 | gfar_read(&priv->regs->rstat)); |
1800 | } | 2090 | } |
1801 | if (events & IEVENT_BABR) { | 2091 | if (events & IEVENT_BABR) { |
1802 | priv->stats.rx_errors++; | 2092 | priv->stats.rx_errors++; |
1803 | priv->extra_stats.rx_babr++; | 2093 | priv->extra_stats.rx_babr++; |
1804 | 2094 | ||
1805 | #ifdef VERBOSE_GFAR_ERRORS | 2095 | if (netif_msg_rx_err(priv)) |
1806 | printk(KERN_DEBUG "%s: babbling error\n", dev->name); | 2096 | printk(KERN_DEBUG "%s: babbling error\n", dev->name); |
1807 | #endif | ||
1808 | } | 2097 | } |
1809 | if (events & IEVENT_EBERR) { | 2098 | if (events & IEVENT_EBERR) { |
1810 | priv->extra_stats.eberr++; | 2099 | priv->extra_stats.eberr++; |
1811 | #ifdef VERBOSE_GFAR_ERRORS | 2100 | if (netif_msg_rx_err(priv)) |
1812 | printk(KERN_DEBUG "%s: EBERR\n", dev->name); | 2101 | printk(KERN_DEBUG "%s: EBERR\n", dev->name); |
1813 | #endif | ||
1814 | } | 2102 | } |
1815 | if (events & IEVENT_RXC) | 2103 | if ((events & IEVENT_RXC) && netif_msg_rx_status(priv)) |
1816 | #ifdef VERBOSE_GFAR_ERRORS | 2104 | if (netif_msg_rx_status(priv)) |
1817 | printk(KERN_DEBUG "%s: control frame\n", dev->name); | 2105 | printk(KERN_DEBUG "%s: control frame\n", dev->name); |
1818 | #endif | ||
1819 | 2106 | ||
1820 | if (events & IEVENT_BABT) { | 2107 | if (events & IEVENT_BABT) { |
1821 | priv->extra_stats.tx_babt++; | 2108 | priv->extra_stats.tx_babt++; |
1822 | #ifdef VERBOSE_GFAR_ERRORS | 2109 | if (netif_msg_tx_err(priv)) |
1823 | printk(KERN_DEBUG "%s: babt error\n", dev->name); | 2110 | printk(KERN_DEBUG "%s: babt error\n", dev->name); |
1824 | #endif | ||
1825 | } | 2111 | } |
1826 | return IRQ_HANDLED; | 2112 | return IRQ_HANDLED; |
1827 | } | 2113 | } |
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h index c2f783a6a9fa..28af087d9fbb 100644 --- a/drivers/net/gianfar.h +++ b/drivers/net/gianfar.h | |||
@@ -1,4 +1,4 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/net/gianfar.h | 2 | * drivers/net/gianfar.h |
3 | * | 3 | * |
4 | * Gianfar Ethernet Driver | 4 | * Gianfar Ethernet Driver |
@@ -53,6 +53,12 @@ | |||
53 | /* The maximum number of packets to be handled in one call of gfar_poll */ | 53 | /* The maximum number of packets to be handled in one call of gfar_poll */ |
54 | #define GFAR_DEV_WEIGHT 64 | 54 | #define GFAR_DEV_WEIGHT 64 |
55 | 55 | ||
56 | /* Length for FCB */ | ||
57 | #define GMAC_FCB_LEN 8 | ||
58 | |||
59 | /* Default padding amount */ | ||
60 | #define DEFAULT_PADDING 2 | ||
61 | |||
56 | /* Number of bytes to align the rx bufs to */ | 62 | /* Number of bytes to align the rx bufs to */ |
57 | #define RXBUF_ALIGNMENT 64 | 63 | #define RXBUF_ALIGNMENT 64 |
58 | 64 | ||
@@ -91,7 +97,7 @@ extern const char gfar_driver_version[]; | |||
91 | #define JUMBO_FRAME_SIZE 9600 | 97 | #define JUMBO_FRAME_SIZE 9600 |
92 | 98 | ||
93 | /* Latency of interface clock in nanoseconds */ | 99 | /* Latency of interface clock in nanoseconds */ |
94 | /* Interface clock latency , in this case, means the | 100 | /* Interface clock latency , in this case, means the |
95 | * time described by a value of 1 in the interrupt | 101 | * time described by a value of 1 in the interrupt |
96 | * coalescing registers' time fields. Since those fields | 102 | * coalescing registers' time fields. Since those fields |
97 | * refer to the time it takes for 64 clocks to pass, the | 103 | * refer to the time it takes for 64 clocks to pass, the |
@@ -166,9 +172,28 @@ extern const char gfar_driver_version[]; | |||
166 | mk_ic_icft(count) | \ | 172 | mk_ic_icft(count) | \ |
167 | mk_ic_ictt(time)) | 173 | mk_ic_ictt(time)) |
168 | 174 | ||
175 | #define RCTRL_PAL_MASK 0x001f0000 | ||
176 | #define RCTRL_VLEX 0x00002000 | ||
177 | #define RCTRL_FILREN 0x00001000 | ||
178 | #define RCTRL_GHTX 0x00000400 | ||
179 | #define RCTRL_IPCSEN 0x00000200 | ||
180 | #define RCTRL_TUCSEN 0x00000100 | ||
181 | #define RCTRL_PRSDEP_MASK 0x000000c0 | ||
182 | #define RCTRL_PRSDEP_INIT 0x000000c0 | ||
169 | #define RCTRL_PROM 0x00000008 | 183 | #define RCTRL_PROM 0x00000008 |
184 | #define RCTRL_CHECKSUMMING (RCTRL_IPCSEN \ | ||
185 | | RCTRL_TUCSEN | RCTRL_PRSDEP_INIT) | ||
186 | #define RCTRL_EXTHASH (RCTRL_GHTX) | ||
187 | #define RCTRL_VLAN (RCTRL_PRSDEP_INIT) | ||
188 | |||
189 | |||
170 | #define RSTAT_CLEAR_RHALT 0x00800000 | 190 | #define RSTAT_CLEAR_RHALT 0x00800000 |
171 | 191 | ||
192 | #define TCTRL_IPCSEN 0x00004000 | ||
193 | #define TCTRL_TUCSEN 0x00002000 | ||
194 | #define TCTRL_VLINS 0x00001000 | ||
195 | #define TCTRL_INIT_CSUM (TCTRL_TUCSEN | TCTRL_IPCSEN) | ||
196 | |||
172 | #define IEVENT_INIT_CLEAR 0xffffffff | 197 | #define IEVENT_INIT_CLEAR 0xffffffff |
173 | #define IEVENT_BABR 0x80000000 | 198 | #define IEVENT_BABR 0x80000000 |
174 | #define IEVENT_RXC 0x40000000 | 199 | #define IEVENT_RXC 0x40000000 |
@@ -187,12 +212,16 @@ extern const char gfar_driver_version[]; | |||
187 | #define IEVENT_RXB0 0x00008000 | 212 | #define IEVENT_RXB0 0x00008000 |
188 | #define IEVENT_GRSC 0x00000100 | 213 | #define IEVENT_GRSC 0x00000100 |
189 | #define IEVENT_RXF0 0x00000080 | 214 | #define IEVENT_RXF0 0x00000080 |
215 | #define IEVENT_FIR 0x00000008 | ||
216 | #define IEVENT_FIQ 0x00000004 | ||
217 | #define IEVENT_DPE 0x00000002 | ||
218 | #define IEVENT_PERR 0x00000001 | ||
190 | #define IEVENT_RX_MASK (IEVENT_RXB0 | IEVENT_RXF0) | 219 | #define IEVENT_RX_MASK (IEVENT_RXB0 | IEVENT_RXF0) |
191 | #define IEVENT_TX_MASK (IEVENT_TXB | IEVENT_TXF) | 220 | #define IEVENT_TX_MASK (IEVENT_TXB | IEVENT_TXF) |
192 | #define IEVENT_ERR_MASK \ | 221 | #define IEVENT_ERR_MASK \ |
193 | (IEVENT_RXC | IEVENT_BSY | IEVENT_EBERR | IEVENT_MSRO | \ | 222 | (IEVENT_RXC | IEVENT_BSY | IEVENT_EBERR | IEVENT_MSRO | \ |
194 | IEVENT_BABT | IEVENT_TXC | IEVENT_TXE | IEVENT_LC \ | 223 | IEVENT_BABT | IEVENT_TXC | IEVENT_TXE | IEVENT_LC \ |
195 | | IEVENT_CRL | IEVENT_XFUN) | 224 | | IEVENT_CRL | IEVENT_XFUN | IEVENT_DPE | IEVENT_PERR) |
196 | 225 | ||
197 | #define IMASK_INIT_CLEAR 0x00000000 | 226 | #define IMASK_INIT_CLEAR 0x00000000 |
198 | #define IMASK_BABR 0x80000000 | 227 | #define IMASK_BABR 0x80000000 |
@@ -212,10 +241,15 @@ extern const char gfar_driver_version[]; | |||
212 | #define IMASK_RXB0 0x00008000 | 241 | #define IMASK_RXB0 0x00008000 |
213 | #define IMASK_GTSC 0x00000100 | 242 | #define IMASK_GTSC 0x00000100 |
214 | #define IMASK_RXFEN0 0x00000080 | 243 | #define IMASK_RXFEN0 0x00000080 |
244 | #define IMASK_FIR 0x00000008 | ||
245 | #define IMASK_FIQ 0x00000004 | ||
246 | #define IMASK_DPE 0x00000002 | ||
247 | #define IMASK_PERR 0x00000001 | ||
215 | #define IMASK_RX_DISABLED ~(IMASK_RXFEN0 | IMASK_BSY) | 248 | #define IMASK_RX_DISABLED ~(IMASK_RXFEN0 | IMASK_BSY) |
216 | #define IMASK_DEFAULT (IMASK_TXEEN | IMASK_TXFEN | IMASK_TXBEN | \ | 249 | #define IMASK_DEFAULT (IMASK_TXEEN | IMASK_TXFEN | IMASK_TXBEN | \ |
217 | IMASK_RXFEN0 | IMASK_BSY | IMASK_EBERR | IMASK_BABR | \ | 250 | IMASK_RXFEN0 | IMASK_BSY | IMASK_EBERR | IMASK_BABR | \ |
218 | IMASK_XFUN | IMASK_RXC | IMASK_BABT) | 251 | IMASK_XFUN | IMASK_RXC | IMASK_BABT | IMASK_DPE \ |
252 | | IMASK_PERR) | ||
219 | 253 | ||
220 | 254 | ||
221 | /* Attribute fields */ | 255 | /* Attribute fields */ |
@@ -254,6 +288,18 @@ extern const char gfar_driver_version[]; | |||
254 | #define TXBD_RETRYLIMIT 0x0040 | 288 | #define TXBD_RETRYLIMIT 0x0040 |
255 | #define TXBD_RETRYCOUNTMASK 0x003c | 289 | #define TXBD_RETRYCOUNTMASK 0x003c |
256 | #define TXBD_UNDERRUN 0x0002 | 290 | #define TXBD_UNDERRUN 0x0002 |
291 | #define TXBD_TOE 0x0002 | ||
292 | |||
293 | /* Tx FCB param bits */ | ||
294 | #define TXFCB_VLN 0x80 | ||
295 | #define TXFCB_IP 0x40 | ||
296 | #define TXFCB_IP6 0x20 | ||
297 | #define TXFCB_TUP 0x10 | ||
298 | #define TXFCB_UDP 0x08 | ||
299 | #define TXFCB_CIP 0x04 | ||
300 | #define TXFCB_CTU 0x02 | ||
301 | #define TXFCB_NPH 0x01 | ||
302 | #define TXFCB_DEFAULT (TXFCB_IP|TXFCB_TUP|TXFCB_CTU|TXFCB_NPH) | ||
257 | 303 | ||
258 | /* RxBD status field bits */ | 304 | /* RxBD status field bits */ |
259 | #define RXBD_EMPTY 0x8000 | 305 | #define RXBD_EMPTY 0x8000 |
@@ -273,6 +319,18 @@ extern const char gfar_driver_version[]; | |||
273 | #define RXBD_TRUNCATED 0x0001 | 319 | #define RXBD_TRUNCATED 0x0001 |
274 | #define RXBD_STATS 0x01ff | 320 | #define RXBD_STATS 0x01ff |
275 | 321 | ||
322 | /* Rx FCB status field bits */ | ||
323 | #define RXFCB_VLN 0x8000 | ||
324 | #define RXFCB_IP 0x4000 | ||
325 | #define RXFCB_IP6 0x2000 | ||
326 | #define RXFCB_TUP 0x1000 | ||
327 | #define RXFCB_CIP 0x0800 | ||
328 | #define RXFCB_CTU 0x0400 | ||
329 | #define RXFCB_EIP 0x0200 | ||
330 | #define RXFCB_ETU 0x0100 | ||
331 | #define RXFCB_PERR_MASK 0x000c | ||
332 | #define RXFCB_PERR_BADL3 0x0008 | ||
333 | |||
276 | struct txbd8 | 334 | struct txbd8 |
277 | { | 335 | { |
278 | u16 status; /* Status Fields */ | 336 | u16 status; /* Status Fields */ |
@@ -280,6 +338,22 @@ struct txbd8 | |||
280 | u32 bufPtr; /* Buffer Pointer */ | 338 | u32 bufPtr; /* Buffer Pointer */ |
281 | }; | 339 | }; |
282 | 340 | ||
341 | struct txfcb { | ||
342 | u8 vln:1, | ||
343 | ip:1, | ||
344 | ip6:1, | ||
345 | tup:1, | ||
346 | udp:1, | ||
347 | cip:1, | ||
348 | ctu:1, | ||
349 | nph:1; | ||
350 | u8 reserved; | ||
351 | u8 l4os; /* Level 4 Header Offset */ | ||
352 | u8 l3os; /* Level 3 Header Offset */ | ||
353 | u16 phcs; /* Pseudo-header Checksum */ | ||
354 | u16 vlctl; /* VLAN control word */ | ||
355 | }; | ||
356 | |||
283 | struct rxbd8 | 357 | struct rxbd8 |
284 | { | 358 | { |
285 | u16 status; /* Status Fields */ | 359 | u16 status; /* Status Fields */ |
@@ -287,6 +361,21 @@ struct rxbd8 | |||
287 | u32 bufPtr; /* Buffer Pointer */ | 361 | u32 bufPtr; /* Buffer Pointer */ |
288 | }; | 362 | }; |
289 | 363 | ||
364 | struct rxfcb { | ||
365 | u16 vln:1, | ||
366 | ip:1, | ||
367 | ip6:1, | ||
368 | tup:1, | ||
369 | cip:1, | ||
370 | ctu:1, | ||
371 | eip:1, | ||
372 | etu:1; | ||
373 | u8 rq; /* Receive Queue index */ | ||
374 | u8 pro; /* Layer 4 Protocol */ | ||
375 | u16 reserved; | ||
376 | u16 vlctl; /* VLAN control word */ | ||
377 | }; | ||
378 | |||
290 | struct rmon_mib | 379 | struct rmon_mib |
291 | { | 380 | { |
292 | u32 tr64; /* 0x.680 - Transmit and Receive 64-byte Frame Counter */ | 381 | u32 tr64; /* 0x.680 - Transmit and Receive 64-byte Frame Counter */ |
@@ -371,90 +460,191 @@ struct gfar_stats { | |||
371 | 460 | ||
372 | 461 | ||
373 | struct gfar { | 462 | struct gfar { |
374 | u8 res1[16]; | 463 | u32 tsec_id; /* 0x.000 - Controller ID register */ |
375 | u32 ievent; /* 0x.010 - Interrupt Event Register */ | 464 | u8 res1[12]; |
376 | u32 imask; /* 0x.014 - Interrupt Mask Register */ | 465 | u32 ievent; /* 0x.010 - Interrupt Event Register */ |
377 | u32 edis; /* 0x.018 - Error Disabled Register */ | 466 | u32 imask; /* 0x.014 - Interrupt Mask Register */ |
467 | u32 edis; /* 0x.018 - Error Disabled Register */ | ||
378 | u8 res2[4]; | 468 | u8 res2[4]; |
379 | u32 ecntrl; /* 0x.020 - Ethernet Control Register */ | 469 | u32 ecntrl; /* 0x.020 - Ethernet Control Register */ |
380 | u32 minflr; /* 0x.024 - Minimum Frame Length Register */ | 470 | u32 minflr; /* 0x.024 - Minimum Frame Length Register */ |
381 | u32 ptv; /* 0x.028 - Pause Time Value Register */ | 471 | u32 ptv; /* 0x.028 - Pause Time Value Register */ |
382 | u32 dmactrl; /* 0x.02c - DMA Control Register */ | 472 | u32 dmactrl; /* 0x.02c - DMA Control Register */ |
383 | u32 tbipa; /* 0x.030 - TBI PHY Address Register */ | 473 | u32 tbipa; /* 0x.030 - TBI PHY Address Register */ |
384 | u8 res3[88]; | 474 | u8 res3[88]; |
385 | u32 fifo_tx_thr; /* 0x.08c - FIFO transmit threshold register */ | 475 | u32 fifo_tx_thr; /* 0x.08c - FIFO transmit threshold register */ |
386 | u8 res4[8]; | 476 | u8 res4[8]; |
387 | u32 fifo_tx_starve; /* 0x.098 - FIFO transmit starve register */ | 477 | u32 fifo_tx_starve; /* 0x.098 - FIFO transmit starve register */ |
388 | u32 fifo_tx_starve_shutoff; /* 0x.09c - FIFO transmit starve shutoff register */ | 478 | u32 fifo_tx_starve_shutoff; /* 0x.09c - FIFO transmit starve shutoff register */ |
389 | u8 res5[96]; | 479 | u8 res5[4]; |
390 | u32 tctrl; /* 0x.100 - Transmit Control Register */ | 480 | u32 fifo_rx_pause; /* 0x.0a4 - FIFO receive pause threshold register */ |
391 | u32 tstat; /* 0x.104 - Transmit Status Register */ | 481 | u32 fifo_rx_alarm; /* 0x.0a8 - FIFO receive alarm threshold register */ |
392 | u8 res6[4]; | 482 | u8 res6[84]; |
393 | u32 tbdlen; /* 0x.10c - Transmit Buffer Descriptor Data Length Register */ | 483 | u32 tctrl; /* 0x.100 - Transmit Control Register */ |
394 | u32 txic; /* 0x.110 - Transmit Interrupt Coalescing Configuration Register */ | 484 | u32 tstat; /* 0x.104 - Transmit Status Register */ |
395 | u8 res7[16]; | 485 | u32 dfvlan; /* 0x.108 - Default VLAN Control word */ |
396 | u32 ctbptr; /* 0x.124 - Current Transmit Buffer Descriptor Pointer Register */ | 486 | u32 tbdlen; /* 0x.10c - Transmit Buffer Descriptor Data Length Register */ |
397 | u8 res8[92]; | 487 | u32 txic; /* 0x.110 - Transmit Interrupt Coalescing Configuration Register */ |
398 | u32 tbptr; /* 0x.184 - Transmit Buffer Descriptor Pointer Low Register */ | 488 | u32 tqueue; /* 0x.114 - Transmit queue control register */ |
399 | u8 res9[124]; | 489 | u8 res7[40]; |
400 | u32 tbase; /* 0x.204 - Transmit Descriptor Base Address Register */ | 490 | u32 tr03wt; /* 0x.140 - TxBD Rings 0-3 round-robin weightings */ |
401 | u8 res10[168]; | 491 | u32 tr47wt; /* 0x.144 - TxBD Rings 4-7 round-robin weightings */ |
402 | u32 ostbd; /* 0x.2b0 - Out-of-Sequence Transmit Buffer Descriptor Register */ | 492 | u8 res8[52]; |
403 | u32 ostbdp; /* 0x.2b4 - Out-of-Sequence Transmit Data Buffer Pointer Register */ | 493 | u32 tbdbph; /* 0x.17c - Tx data buffer pointer high */ |
404 | u8 res11[72]; | 494 | u8 res9a[4]; |
405 | u32 rctrl; /* 0x.300 - Receive Control Register */ | 495 | u32 tbptr0; /* 0x.184 - TxBD Pointer for ring 0 */ |
406 | u32 rstat; /* 0x.304 - Receive Status Register */ | 496 | u8 res9b[4]; |
407 | u8 res12[4]; | 497 | u32 tbptr1; /* 0x.18c - TxBD Pointer for ring 1 */ |
408 | u32 rbdlen; /* 0x.30c - RxBD Data Length Register */ | 498 | u8 res9c[4]; |
409 | u32 rxic; /* 0x.310 - Receive Interrupt Coalescing Configuration Register */ | 499 | u32 tbptr2; /* 0x.194 - TxBD Pointer for ring 2 */ |
410 | u8 res13[16]; | 500 | u8 res9d[4]; |
411 | u32 crbptr; /* 0x.324 - Current Receive Buffer Descriptor Pointer */ | 501 | u32 tbptr3; /* 0x.19c - TxBD Pointer for ring 3 */ |
412 | u8 res14[24]; | 502 | u8 res9e[4]; |
413 | u32 mrblr; /* 0x.340 - Maximum Receive Buffer Length Register */ | 503 | u32 tbptr4; /* 0x.1a4 - TxBD Pointer for ring 4 */ |
414 | u8 res15[64]; | 504 | u8 res9f[4]; |
415 | u32 rbptr; /* 0x.384 - Receive Buffer Descriptor Pointer */ | 505 | u32 tbptr5; /* 0x.1ac - TxBD Pointer for ring 5 */ |
416 | u8 res16[124]; | 506 | u8 res9g[4]; |
417 | u32 rbase; /* 0x.404 - Receive Descriptor Base Address */ | 507 | u32 tbptr6; /* 0x.1b4 - TxBD Pointer for ring 6 */ |
418 | u8 res17[248]; | 508 | u8 res9h[4]; |
419 | u32 maccfg1; /* 0x.500 - MAC Configuration 1 Register */ | 509 | u32 tbptr7; /* 0x.1bc - TxBD Pointer for ring 7 */ |
420 | u32 maccfg2; /* 0x.504 - MAC Configuration 2 Register */ | 510 | u8 res9[64]; |
421 | u32 ipgifg; /* 0x.508 - Inter Packet Gap/Inter Frame Gap Register */ | 511 | u32 tbaseh; /* 0x.200 - TxBD base address high */ |
422 | u32 hafdup; /* 0x.50c - Half Duplex Register */ | 512 | u32 tbase0; /* 0x.204 - TxBD Base Address of ring 0 */ |
423 | u32 maxfrm; /* 0x.510 - Maximum Frame Length Register */ | 513 | u8 res10a[4]; |
514 | u32 tbase1; /* 0x.20c - TxBD Base Address of ring 1 */ | ||
515 | u8 res10b[4]; | ||
516 | u32 tbase2; /* 0x.214 - TxBD Base Address of ring 2 */ | ||
517 | u8 res10c[4]; | ||
518 | u32 tbase3; /* 0x.21c - TxBD Base Address of ring 3 */ | ||
519 | u8 res10d[4]; | ||
520 | u32 tbase4; /* 0x.224 - TxBD Base Address of ring 4 */ | ||
521 | u8 res10e[4]; | ||
522 | u32 tbase5; /* 0x.22c - TxBD Base Address of ring 5 */ | ||
523 | u8 res10f[4]; | ||
524 | u32 tbase6; /* 0x.234 - TxBD Base Address of ring 6 */ | ||
525 | u8 res10g[4]; | ||
526 | u32 tbase7; /* 0x.23c - TxBD Base Address of ring 7 */ | ||
527 | u8 res10[192]; | ||
528 | u32 rctrl; /* 0x.300 - Receive Control Register */ | ||
529 | u32 rstat; /* 0x.304 - Receive Status Register */ | ||
530 | u8 res12[8]; | ||
531 | u32 rxic; /* 0x.310 - Receive Interrupt Coalescing Configuration Register */ | ||
532 | u32 rqueue; /* 0x.314 - Receive queue control register */ | ||
533 | u8 res13[24]; | ||
534 | u32 rbifx; /* 0x.330 - Receive bit field extract control register */ | ||
535 | u32 rqfar; /* 0x.334 - Receive queue filing table address register */ | ||
536 | u32 rqfcr; /* 0x.338 - Receive queue filing table control register */ | ||
537 | u32 rqfpr; /* 0x.33c - Receive queue filing table property register */ | ||
538 | u32 mrblr; /* 0x.340 - Maximum Receive Buffer Length Register */ | ||
539 | u8 res14[56]; | ||
540 | u32 rbdbph; /* 0x.37c - Rx data buffer pointer high */ | ||
541 | u8 res15a[4]; | ||
542 | u32 rbptr0; /* 0x.384 - RxBD pointer for ring 0 */ | ||
543 | u8 res15b[4]; | ||
544 | u32 rbptr1; /* 0x.38c - RxBD pointer for ring 1 */ | ||
545 | u8 res15c[4]; | ||
546 | u32 rbptr2; /* 0x.394 - RxBD pointer for ring 2 */ | ||
547 | u8 res15d[4]; | ||
548 | u32 rbptr3; /* 0x.39c - RxBD pointer for ring 3 */ | ||
549 | u8 res15e[4]; | ||
550 | u32 rbptr4; /* 0x.3a4 - RxBD pointer for ring 4 */ | ||
551 | u8 res15f[4]; | ||
552 | u32 rbptr5; /* 0x.3ac - RxBD pointer for ring 5 */ | ||
553 | u8 res15g[4]; | ||
554 | u32 rbptr6; /* 0x.3b4 - RxBD pointer for ring 6 */ | ||
555 | u8 res15h[4]; | ||
556 | u32 rbptr7; /* 0x.3bc - RxBD pointer for ring 7 */ | ||
557 | u8 res16[64]; | ||
558 | u32 rbaseh; /* 0x.400 - RxBD base address high */ | ||
559 | u32 rbase0; /* 0x.404 - RxBD base address of ring 0 */ | ||
560 | u8 res17a[4]; | ||
561 | u32 rbase1; /* 0x.40c - RxBD base address of ring 1 */ | ||
562 | u8 res17b[4]; | ||
563 | u32 rbase2; /* 0x.414 - RxBD base address of ring 2 */ | ||
564 | u8 res17c[4]; | ||
565 | u32 rbase3; /* 0x.41c - RxBD base address of ring 3 */ | ||
566 | u8 res17d[4]; | ||
567 | u32 rbase4; /* 0x.424 - RxBD base address of ring 4 */ | ||
568 | u8 res17e[4]; | ||
569 | u32 rbase5; /* 0x.42c - RxBD base address of ring 5 */ | ||
570 | u8 res17f[4]; | ||
571 | u32 rbase6; /* 0x.434 - RxBD base address of ring 6 */ | ||
572 | u8 res17g[4]; | ||
573 | u32 rbase7; /* 0x.43c - RxBD base address of ring 7 */ | ||
574 | u8 res17[192]; | ||
575 | u32 maccfg1; /* 0x.500 - MAC Configuration 1 Register */ | ||
576 | u32 maccfg2; /* 0x.504 - MAC Configuration 2 Register */ | ||
577 | u32 ipgifg; /* 0x.508 - Inter Packet Gap/Inter Frame Gap Register */ | ||
578 | u32 hafdup; /* 0x.50c - Half Duplex Register */ | ||
579 | u32 maxfrm; /* 0x.510 - Maximum Frame Length Register */ | ||
424 | u8 res18[12]; | 580 | u8 res18[12]; |
425 | u32 miimcfg; /* 0x.520 - MII Management Configuration Register */ | 581 | u32 miimcfg; /* 0x.520 - MII Management Configuration Register */ |
426 | u32 miimcom; /* 0x.524 - MII Management Command Register */ | 582 | u32 miimcom; /* 0x.524 - MII Management Command Register */ |
427 | u32 miimadd; /* 0x.528 - MII Management Address Register */ | 583 | u32 miimadd; /* 0x.528 - MII Management Address Register */ |
428 | u32 miimcon; /* 0x.52c - MII Management Control Register */ | 584 | u32 miimcon; /* 0x.52c - MII Management Control Register */ |
429 | u32 miimstat; /* 0x.530 - MII Management Status Register */ | 585 | u32 miimstat; /* 0x.530 - MII Management Status Register */ |
430 | u32 miimind; /* 0x.534 - MII Management Indicator Register */ | 586 | u32 miimind; /* 0x.534 - MII Management Indicator Register */ |
431 | u8 res19[4]; | 587 | u8 res19[4]; |
432 | u32 ifstat; /* 0x.53c - Interface Status Register */ | 588 | u32 ifstat; /* 0x.53c - Interface Status Register */ |
433 | u32 macstnaddr1; /* 0x.540 - Station Address Part 1 Register */ | 589 | u32 macstnaddr1; /* 0x.540 - Station Address Part 1 Register */ |
434 | u32 macstnaddr2; /* 0x.544 - Station Address Part 2 Register */ | 590 | u32 macstnaddr2; /* 0x.544 - Station Address Part 2 Register */ |
435 | u8 res20[312]; | 591 | u32 mac01addr1; /* 0x.548 - MAC exact match address 1, part 1 */ |
436 | struct rmon_mib rmon; | 592 | u32 mac01addr2; /* 0x.54c - MAC exact match address 1, part 2 */ |
437 | u8 res21[192]; | 593 | u32 mac02addr1; /* 0x.550 - MAC exact match address 2, part 1 */ |
438 | u32 iaddr0; /* 0x.800 - Indivdual address register 0 */ | 594 | u32 mac02addr2; /* 0x.554 - MAC exact match address 2, part 2 */ |
439 | u32 iaddr1; /* 0x.804 - Indivdual address register 1 */ | 595 | u32 mac03addr1; /* 0x.558 - MAC exact match address 3, part 1 */ |
440 | u32 iaddr2; /* 0x.808 - Indivdual address register 2 */ | 596 | u32 mac03addr2; /* 0x.55c - MAC exact match address 3, part 2 */ |
441 | u32 iaddr3; /* 0x.80c - Indivdual address register 3 */ | 597 | u32 mac04addr1; /* 0x.560 - MAC exact match address 4, part 1 */ |
442 | u32 iaddr4; /* 0x.810 - Indivdual address register 4 */ | 598 | u32 mac04addr2; /* 0x.564 - MAC exact match address 4, part 2 */ |
443 | u32 iaddr5; /* 0x.814 - Indivdual address register 5 */ | 599 | u32 mac05addr1; /* 0x.568 - MAC exact match address 5, part 1 */ |
444 | u32 iaddr6; /* 0x.818 - Indivdual address register 6 */ | 600 | u32 mac05addr2; /* 0x.56c - MAC exact match address 5, part 2 */ |
445 | u32 iaddr7; /* 0x.81c - Indivdual address register 7 */ | 601 | u32 mac06addr1; /* 0x.570 - MAC exact match address 6, part 1 */ |
602 | u32 mac06addr2; /* 0x.574 - MAC exact match address 6, part 2 */ | ||
603 | u32 mac07addr1; /* 0x.578 - MAC exact match address 7, part 1 */ | ||
604 | u32 mac07addr2; /* 0x.57c - MAC exact match address 7, part 2 */ | ||
605 | u32 mac08addr1; /* 0x.580 - MAC exact match address 8, part 1 */ | ||
606 | u32 mac08addr2; /* 0x.584 - MAC exact match address 8, part 2 */ | ||
607 | u32 mac09addr1; /* 0x.588 - MAC exact match address 9, part 1 */ | ||
608 | u32 mac09addr2; /* 0x.58c - MAC exact match address 9, part 2 */ | ||
609 | u32 mac10addr1; /* 0x.590 - MAC exact match address 10, part 1*/ | ||
610 | u32 mac10addr2; /* 0x.594 - MAC exact match address 10, part 2*/ | ||
611 | u32 mac11addr1; /* 0x.598 - MAC exact match address 11, part 1*/ | ||
612 | u32 mac11addr2; /* 0x.59c - MAC exact match address 11, part 2*/ | ||
613 | u32 mac12addr1; /* 0x.5a0 - MAC exact match address 12, part 1*/ | ||
614 | u32 mac12addr2; /* 0x.5a4 - MAC exact match address 12, part 2*/ | ||
615 | u32 mac13addr1; /* 0x.5a8 - MAC exact match address 13, part 1*/ | ||
616 | u32 mac13addr2; /* 0x.5ac - MAC exact match address 13, part 2*/ | ||
617 | u32 mac14addr1; /* 0x.5b0 - MAC exact match address 14, part 1*/ | ||
618 | u32 mac14addr2; /* 0x.5b4 - MAC exact match address 14, part 2*/ | ||
619 | u32 mac15addr1; /* 0x.5b8 - MAC exact match address 15, part 1*/ | ||
620 | u32 mac15addr2; /* 0x.5bc - MAC exact match address 15, part 2*/ | ||
621 | u8 res20[192]; | ||
622 | struct rmon_mib rmon; /* 0x.680-0x.73c */ | ||
623 | u32 rrej; /* 0x.740 - Receive filer rejected packet counter */ | ||
624 | u8 res21[188]; | ||
625 | u32 igaddr0; /* 0x.800 - Indivdual/Group address register 0*/ | ||
626 | u32 igaddr1; /* 0x.804 - Indivdual/Group address register 1*/ | ||
627 | u32 igaddr2; /* 0x.808 - Indivdual/Group address register 2*/ | ||
628 | u32 igaddr3; /* 0x.80c - Indivdual/Group address register 3*/ | ||
629 | u32 igaddr4; /* 0x.810 - Indivdual/Group address register 4*/ | ||
630 | u32 igaddr5; /* 0x.814 - Indivdual/Group address register 5*/ | ||
631 | u32 igaddr6; /* 0x.818 - Indivdual/Group address register 6*/ | ||
632 | u32 igaddr7; /* 0x.81c - Indivdual/Group address register 7*/ | ||
446 | u8 res22[96]; | 633 | u8 res22[96]; |
447 | u32 gaddr0; /* 0x.880 - Global address register 0 */ | 634 | u32 gaddr0; /* 0x.880 - Group address register 0 */ |
448 | u32 gaddr1; /* 0x.884 - Global address register 1 */ | 635 | u32 gaddr1; /* 0x.884 - Group address register 1 */ |
449 | u32 gaddr2; /* 0x.888 - Global address register 2 */ | 636 | u32 gaddr2; /* 0x.888 - Group address register 2 */ |
450 | u32 gaddr3; /* 0x.88c - Global address register 3 */ | 637 | u32 gaddr3; /* 0x.88c - Group address register 3 */ |
451 | u32 gaddr4; /* 0x.890 - Global address register 4 */ | 638 | u32 gaddr4; /* 0x.890 - Group address register 4 */ |
452 | u32 gaddr5; /* 0x.894 - Global address register 5 */ | 639 | u32 gaddr5; /* 0x.894 - Group address register 5 */ |
453 | u32 gaddr6; /* 0x.898 - Global address register 6 */ | 640 | u32 gaddr6; /* 0x.898 - Group address register 6 */ |
454 | u32 gaddr7; /* 0x.89c - Global address register 7 */ | 641 | u32 gaddr7; /* 0x.89c - Group address register 7 */ |
455 | u8 res23[856]; | 642 | u8 res23a[352]; |
456 | u32 attr; /* 0x.bf8 - Attributes Register */ | 643 | u32 fifocfg; /* 0x.a00 - FIFO interface config register */ |
457 | u32 attreli; /* 0x.bfc - Attributes Extract Length and Extract Index Register */ | 644 | u8 res23b[252]; |
645 | u8 res23c[248]; | ||
646 | u32 attr; /* 0x.bf8 - Attributes Register */ | ||
647 | u32 attreli; /* 0x.bfc - Attributes Extract Length and Extract Index Register */ | ||
458 | u8 res24[1024]; | 648 | u8 res24[1024]; |
459 | 649 | ||
460 | }; | 650 | }; |
@@ -496,6 +686,8 @@ struct gfar_private { | |||
496 | struct txbd8 *cur_tx; /* Next free ring entry */ | 686 | struct txbd8 *cur_tx; /* Next free ring entry */ |
497 | struct txbd8 *dirty_tx; /* The Ring entry to be freed. */ | 687 | struct txbd8 *dirty_tx; /* The Ring entry to be freed. */ |
498 | struct gfar *regs; /* Pointer to the GFAR memory mapped Registers */ | 688 | struct gfar *regs; /* Pointer to the GFAR memory mapped Registers */ |
689 | u32 *hash_regs[16]; | ||
690 | int hash_width; | ||
499 | struct gfar *phyregs; | 691 | struct gfar *phyregs; |
500 | struct work_struct tq; | 692 | struct work_struct tq; |
501 | struct timer_list phy_info_timer; | 693 | struct timer_list phy_info_timer; |
@@ -506,9 +698,12 @@ struct gfar_private { | |||
506 | unsigned int rx_stash_size; | 698 | unsigned int rx_stash_size; |
507 | unsigned int tx_ring_size; | 699 | unsigned int tx_ring_size; |
508 | unsigned int rx_ring_size; | 700 | unsigned int rx_ring_size; |
509 | wait_queue_head_t rxcleanupq; | ||
510 | unsigned int rxclean; | ||
511 | 701 | ||
702 | unsigned char vlan_enable:1, | ||
703 | rx_csum_enable:1, | ||
704 | extended_hash:1; | ||
705 | unsigned short padding; | ||
706 | struct vlan_group *vlgrp; | ||
512 | /* Info structure initialized by board setup code */ | 707 | /* Info structure initialized by board setup code */ |
513 | unsigned int interruptTransmit; | 708 | unsigned int interruptTransmit; |
514 | unsigned int interruptReceive; | 709 | unsigned int interruptReceive; |
@@ -519,6 +714,8 @@ struct gfar_private { | |||
519 | int oldspeed; | 714 | int oldspeed; |
520 | int oldduplex; | 715 | int oldduplex; |
521 | int oldlink; | 716 | int oldlink; |
717 | |||
718 | uint32_t msg_enable; | ||
522 | }; | 719 | }; |
523 | 720 | ||
524 | extern inline u32 gfar_read(volatile unsigned *addr) | 721 | extern inline u32 gfar_read(volatile unsigned *addr) |
diff --git a/drivers/net/gianfar_ethtool.c b/drivers/net/gianfar_ethtool.c index 28046e9e88ba..a451de629197 100644 --- a/drivers/net/gianfar_ethtool.c +++ b/drivers/net/gianfar_ethtool.c | |||
@@ -46,16 +46,18 @@ | |||
46 | 46 | ||
47 | extern int startup_gfar(struct net_device *dev); | 47 | extern int startup_gfar(struct net_device *dev); |
48 | extern void stop_gfar(struct net_device *dev); | 48 | extern void stop_gfar(struct net_device *dev); |
49 | extern void gfar_receive(int irq, void *dev_id, struct pt_regs *regs); | 49 | extern void gfar_halt(struct net_device *dev); |
50 | extern void gfar_start(struct net_device *dev); | ||
51 | extern int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit); | ||
50 | 52 | ||
51 | void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, | 53 | static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, |
52 | u64 * buf); | 54 | u64 * buf); |
53 | void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf); | 55 | static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf); |
54 | int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals); | 56 | static int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals); |
55 | int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals); | 57 | static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals); |
56 | void gfar_gringparam(struct net_device *dev, struct ethtool_ringparam *rvals); | 58 | static void gfar_gringparam(struct net_device *dev, struct ethtool_ringparam *rvals); |
57 | int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rvals); | 59 | static int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rvals); |
58 | void gfar_gdrvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo); | 60 | static void gfar_gdrvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo); |
59 | 61 | ||
60 | static char stat_gstrings[][ETH_GSTRING_LEN] = { | 62 | static char stat_gstrings[][ETH_GSTRING_LEN] = { |
61 | "rx-dropped-by-kernel", | 63 | "rx-dropped-by-kernel", |
@@ -118,57 +120,56 @@ static char stat_gstrings[][ETH_GSTRING_LEN] = { | |||
118 | "tx-fragmented-frames", | 120 | "tx-fragmented-frames", |
119 | }; | 121 | }; |
120 | 122 | ||
123 | /* Fill in a buffer with the strings which correspond to the | ||
124 | * stats */ | ||
125 | static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf) | ||
126 | { | ||
127 | struct gfar_private *priv = netdev_priv(dev); | ||
128 | |||
129 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) | ||
130 | memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN); | ||
131 | else | ||
132 | memcpy(buf, stat_gstrings, | ||
133 | GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN); | ||
134 | } | ||
135 | |||
121 | /* Fill in an array of 64-bit statistics from various sources. | 136 | /* Fill in an array of 64-bit statistics from various sources. |
122 | * This array will be appended to the end of the ethtool_stats | 137 | * This array will be appended to the end of the ethtool_stats |
123 | * structure, and returned to user space | 138 | * structure, and returned to user space |
124 | */ | 139 | */ |
125 | void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, u64 * buf) | 140 | static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy, u64 * buf) |
126 | { | 141 | { |
127 | int i; | 142 | int i; |
128 | struct gfar_private *priv = netdev_priv(dev); | 143 | struct gfar_private *priv = netdev_priv(dev); |
129 | u32 *rmon = (u32 *) & priv->regs->rmon; | ||
130 | u64 *extra = (u64 *) & priv->extra_stats; | 144 | u64 *extra = (u64 *) & priv->extra_stats; |
131 | struct gfar_stats *stats = (struct gfar_stats *) buf; | ||
132 | 145 | ||
133 | for (i = 0; i < GFAR_RMON_LEN; i++) { | 146 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { |
134 | stats->rmon[i] = (u64) (rmon[i]); | 147 | u32 *rmon = (u32 *) & priv->regs->rmon; |
135 | } | 148 | struct gfar_stats *stats = (struct gfar_stats *) buf; |
136 | |||
137 | for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++) { | ||
138 | stats->extra[i] = extra[i]; | ||
139 | } | ||
140 | } | ||
141 | 149 | ||
142 | /* Returns the number of stats (and their corresponding strings) */ | 150 | for (i = 0; i < GFAR_RMON_LEN; i++) |
143 | int gfar_stats_count(struct net_device *dev) | 151 | stats->rmon[i] = (u64) (rmon[i]); |
144 | { | ||
145 | return GFAR_STATS_LEN; | ||
146 | } | ||
147 | 152 | ||
148 | void gfar_gstrings_normon(struct net_device *dev, u32 stringset, u8 * buf) | 153 | for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++) |
149 | { | 154 | stats->extra[i] = extra[i]; |
150 | memcpy(buf, stat_gstrings, GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN); | 155 | } else |
156 | for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++) | ||
157 | buf[i] = extra[i]; | ||
151 | } | 158 | } |
152 | 159 | ||
153 | void gfar_fill_stats_normon(struct net_device *dev, | 160 | /* Returns the number of stats (and their corresponding strings) */ |
154 | struct ethtool_stats *dummy, u64 * buf) | 161 | static int gfar_stats_count(struct net_device *dev) |
155 | { | 162 | { |
156 | int i; | ||
157 | struct gfar_private *priv = netdev_priv(dev); | 163 | struct gfar_private *priv = netdev_priv(dev); |
158 | u64 *extra = (u64 *) & priv->extra_stats; | ||
159 | 164 | ||
160 | for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++) { | 165 | if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) |
161 | buf[i] = extra[i]; | 166 | return GFAR_STATS_LEN; |
162 | } | 167 | else |
168 | return GFAR_EXTRA_STATS_LEN; | ||
163 | } | 169 | } |
164 | 170 | ||
165 | |||
166 | int gfar_stats_count_normon(struct net_device *dev) | ||
167 | { | ||
168 | return GFAR_EXTRA_STATS_LEN; | ||
169 | } | ||
170 | /* Fills in the drvinfo structure with some basic info */ | 171 | /* Fills in the drvinfo structure with some basic info */ |
171 | void gfar_gdrvinfo(struct net_device *dev, struct | 172 | static void gfar_gdrvinfo(struct net_device *dev, struct |
172 | ethtool_drvinfo *drvinfo) | 173 | ethtool_drvinfo *drvinfo) |
173 | { | 174 | { |
174 | strncpy(drvinfo->driver, DRV_NAME, GFAR_INFOSTR_LEN); | 175 | strncpy(drvinfo->driver, DRV_NAME, GFAR_INFOSTR_LEN); |
@@ -182,7 +183,7 @@ void gfar_gdrvinfo(struct net_device *dev, struct | |||
182 | } | 183 | } |
183 | 184 | ||
184 | /* Return the current settings in the ethtool_cmd structure */ | 185 | /* Return the current settings in the ethtool_cmd structure */ |
185 | int gfar_gsettings(struct net_device *dev, struct ethtool_cmd *cmd) | 186 | static int gfar_gsettings(struct net_device *dev, struct ethtool_cmd *cmd) |
186 | { | 187 | { |
187 | struct gfar_private *priv = netdev_priv(dev); | 188 | struct gfar_private *priv = netdev_priv(dev); |
188 | uint gigabit_support = | 189 | uint gigabit_support = |
@@ -216,13 +217,13 @@ int gfar_gsettings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
216 | } | 217 | } |
217 | 218 | ||
218 | /* Return the length of the register structure */ | 219 | /* Return the length of the register structure */ |
219 | int gfar_reglen(struct net_device *dev) | 220 | static int gfar_reglen(struct net_device *dev) |
220 | { | 221 | { |
221 | return sizeof (struct gfar); | 222 | return sizeof (struct gfar); |
222 | } | 223 | } |
223 | 224 | ||
224 | /* Return a dump of the GFAR register space */ | 225 | /* Return a dump of the GFAR register space */ |
225 | void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) | 226 | static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regbuf) |
226 | { | 227 | { |
227 | int i; | 228 | int i; |
228 | struct gfar_private *priv = netdev_priv(dev); | 229 | struct gfar_private *priv = netdev_priv(dev); |
@@ -233,13 +234,6 @@ void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *regb | |||
233 | buf[i] = theregs[i]; | 234 | buf[i] = theregs[i]; |
234 | } | 235 | } |
235 | 236 | ||
236 | /* Fill in a buffer with the strings which correspond to the | ||
237 | * stats */ | ||
238 | void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf) | ||
239 | { | ||
240 | memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN); | ||
241 | } | ||
242 | |||
243 | /* Convert microseconds to ethernet clock ticks, which changes | 237 | /* Convert microseconds to ethernet clock ticks, which changes |
244 | * depending on what speed the controller is running at */ | 238 | * depending on what speed the controller is running at */ |
245 | static unsigned int gfar_usecs2ticks(struct gfar_private *priv, unsigned int usecs) | 239 | static unsigned int gfar_usecs2ticks(struct gfar_private *priv, unsigned int usecs) |
@@ -291,9 +285,12 @@ static unsigned int gfar_ticks2usecs(struct gfar_private *priv, unsigned int tic | |||
291 | 285 | ||
292 | /* Get the coalescing parameters, and put them in the cvals | 286 | /* Get the coalescing parameters, and put them in the cvals |
293 | * structure. */ | 287 | * structure. */ |
294 | int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) | 288 | static int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) |
295 | { | 289 | { |
296 | struct gfar_private *priv = netdev_priv(dev); | 290 | struct gfar_private *priv = netdev_priv(dev); |
291 | |||
292 | if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE)) | ||
293 | return -EOPNOTSUPP; | ||
297 | 294 | ||
298 | cvals->rx_coalesce_usecs = gfar_ticks2usecs(priv, priv->rxtime); | 295 | cvals->rx_coalesce_usecs = gfar_ticks2usecs(priv, priv->rxtime); |
299 | cvals->rx_max_coalesced_frames = priv->rxcount; | 296 | cvals->rx_max_coalesced_frames = priv->rxcount; |
@@ -337,10 +334,13 @@ int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) | |||
337 | * Both cvals->*_usecs and cvals->*_frames have to be > 0 | 334 | * Both cvals->*_usecs and cvals->*_frames have to be > 0 |
338 | * in order for coalescing to be active | 335 | * in order for coalescing to be active |
339 | */ | 336 | */ |
340 | int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) | 337 | static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) |
341 | { | 338 | { |
342 | struct gfar_private *priv = netdev_priv(dev); | 339 | struct gfar_private *priv = netdev_priv(dev); |
343 | 340 | ||
341 | if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE)) | ||
342 | return -EOPNOTSUPP; | ||
343 | |||
344 | /* Set up rx coalescing */ | 344 | /* Set up rx coalescing */ |
345 | if ((cvals->rx_coalesce_usecs == 0) || | 345 | if ((cvals->rx_coalesce_usecs == 0) || |
346 | (cvals->rx_max_coalesced_frames == 0)) | 346 | (cvals->rx_max_coalesced_frames == 0)) |
@@ -379,7 +379,7 @@ int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) | |||
379 | /* Fills in rvals with the current ring parameters. Currently, | 379 | /* Fills in rvals with the current ring parameters. Currently, |
380 | * rx, rx_mini, and rx_jumbo rings are the same size, as mini and | 380 | * rx, rx_mini, and rx_jumbo rings are the same size, as mini and |
381 | * jumbo are ignored by the driver */ | 381 | * jumbo are ignored by the driver */ |
382 | void gfar_gringparam(struct net_device *dev, struct ethtool_ringparam *rvals) | 382 | static void gfar_gringparam(struct net_device *dev, struct ethtool_ringparam *rvals) |
383 | { | 383 | { |
384 | struct gfar_private *priv = netdev_priv(dev); | 384 | struct gfar_private *priv = netdev_priv(dev); |
385 | 385 | ||
@@ -401,9 +401,8 @@ void gfar_gringparam(struct net_device *dev, struct ethtool_ringparam *rvals) | |||
401 | * necessary so that we don't mess things up while we're in | 401 | * necessary so that we don't mess things up while we're in |
402 | * motion. We wait for the ring to be clean before reallocating | 402 | * motion. We wait for the ring to be clean before reallocating |
403 | * the rings. */ | 403 | * the rings. */ |
404 | int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rvals) | 404 | static int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rvals) |
405 | { | 405 | { |
406 | u32 tempval; | ||
407 | struct gfar_private *priv = netdev_priv(dev); | 406 | struct gfar_private *priv = netdev_priv(dev); |
408 | int err = 0; | 407 | int err = 0; |
409 | 408 | ||
@@ -425,37 +424,54 @@ int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rvals) | |||
425 | return -EINVAL; | 424 | return -EINVAL; |
426 | } | 425 | } |
427 | 426 | ||
428 | /* Stop the controller so we don't rx any more frames */ | 427 | if (dev->flags & IFF_UP) { |
429 | /* But first, make sure we clear the bits */ | 428 | unsigned long flags; |
430 | tempval = gfar_read(&priv->regs->dmactrl); | ||
431 | tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); | ||
432 | gfar_write(&priv->regs->dmactrl, tempval); | ||
433 | 429 | ||
434 | tempval = gfar_read(&priv->regs->dmactrl); | 430 | /* Halt TX and RX, and process the frames which |
435 | tempval |= (DMACTRL_GRS | DMACTRL_GTS); | 431 | * have already been received */ |
436 | gfar_write(&priv->regs->dmactrl, tempval); | 432 | spin_lock_irqsave(&priv->lock, flags); |
433 | gfar_halt(dev); | ||
434 | gfar_clean_rx_ring(dev, priv->rx_ring_size); | ||
435 | spin_unlock_irqrestore(&priv->lock, flags); | ||
437 | 436 | ||
438 | while (!(gfar_read(&priv->regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC))) | 437 | /* Now we take down the rings to rebuild them */ |
439 | cpu_relax(); | 438 | stop_gfar(dev); |
439 | } | ||
440 | 440 | ||
441 | /* Note that rx is not clean right now */ | 441 | /* Change the size */ |
442 | priv->rxclean = 0; | 442 | priv->rx_ring_size = rvals->rx_pending; |
443 | priv->tx_ring_size = rvals->tx_pending; | ||
443 | 444 | ||
444 | if (dev->flags & IFF_UP) { | 445 | /* Rebuild the rings with the new size */ |
445 | /* Tell the driver to process the rest of the frames */ | 446 | if (dev->flags & IFF_UP) |
446 | gfar_receive(0, (void *) dev, NULL); | 447 | err = startup_gfar(dev); |
447 | 448 | ||
448 | /* Now wait for it to be done */ | 449 | return err; |
449 | wait_event_interruptible(priv->rxcleanupq, priv->rxclean); | 450 | } |
450 | 451 | ||
451 | /* Ok, all packets have been handled. Now we bring it down, | 452 | static int gfar_set_rx_csum(struct net_device *dev, uint32_t data) |
452 | * change the ring size, and bring it up */ | 453 | { |
454 | struct gfar_private *priv = netdev_priv(dev); | ||
455 | int err = 0; | ||
453 | 456 | ||
457 | if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM)) | ||
458 | return -EOPNOTSUPP; | ||
459 | |||
460 | if (dev->flags & IFF_UP) { | ||
461 | unsigned long flags; | ||
462 | |||
463 | /* Halt TX and RX, and process the frames which | ||
464 | * have already been received */ | ||
465 | spin_lock_irqsave(&priv->lock, flags); | ||
466 | gfar_halt(dev); | ||
467 | gfar_clean_rx_ring(dev, priv->rx_ring_size); | ||
468 | spin_unlock_irqrestore(&priv->lock, flags); | ||
469 | |||
470 | /* Now we take down the rings to rebuild them */ | ||
454 | stop_gfar(dev); | 471 | stop_gfar(dev); |
455 | } | 472 | } |
456 | 473 | ||
457 | priv->rx_ring_size = rvals->rx_pending; | 474 | priv->rx_csum_enable = data; |
458 | priv->tx_ring_size = rvals->tx_pending; | ||
459 | 475 | ||
460 | if (dev->flags & IFF_UP) | 476 | if (dev->flags & IFF_UP) |
461 | err = startup_gfar(dev); | 477 | err = startup_gfar(dev); |
@@ -463,6 +479,61 @@ int gfar_sringparam(struct net_device *dev, struct ethtool_ringparam *rvals) | |||
463 | return err; | 479 | return err; |
464 | } | 480 | } |
465 | 481 | ||
482 | static uint32_t gfar_get_rx_csum(struct net_device *dev) | ||
483 | { | ||
484 | struct gfar_private *priv = netdev_priv(dev); | ||
485 | |||
486 | if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM)) | ||
487 | return 0; | ||
488 | |||
489 | return priv->rx_csum_enable; | ||
490 | } | ||
491 | |||
492 | static int gfar_set_tx_csum(struct net_device *dev, uint32_t data) | ||
493 | { | ||
494 | unsigned long flags; | ||
495 | struct gfar_private *priv = netdev_priv(dev); | ||
496 | |||
497 | if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM)) | ||
498 | return -EOPNOTSUPP; | ||
499 | |||
500 | spin_lock_irqsave(&priv->lock, flags); | ||
501 | gfar_halt(dev); | ||
502 | |||
503 | if (data) | ||
504 | dev->features |= NETIF_F_IP_CSUM; | ||
505 | else | ||
506 | dev->features &= ~NETIF_F_IP_CSUM; | ||
507 | |||
508 | gfar_start(dev); | ||
509 | spin_unlock_irqrestore(&priv->lock, flags); | ||
510 | |||
511 | return 0; | ||
512 | } | ||
513 | |||
514 | static uint32_t gfar_get_tx_csum(struct net_device *dev) | ||
515 | { | ||
516 | struct gfar_private *priv = netdev_priv(dev); | ||
517 | |||
518 | if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM)) | ||
519 | return 0; | ||
520 | |||
521 | return (dev->features & NETIF_F_IP_CSUM) != 0; | ||
522 | } | ||
523 | |||
524 | static uint32_t gfar_get_msglevel(struct net_device *dev) | ||
525 | { | ||
526 | struct gfar_private *priv = netdev_priv(dev); | ||
527 | return priv->msg_enable; | ||
528 | } | ||
529 | |||
530 | static void gfar_set_msglevel(struct net_device *dev, uint32_t data) | ||
531 | { | ||
532 | struct gfar_private *priv = netdev_priv(dev); | ||
533 | priv->msg_enable = data; | ||
534 | } | ||
535 | |||
536 | |||
466 | struct ethtool_ops gfar_ethtool_ops = { | 537 | struct ethtool_ops gfar_ethtool_ops = { |
467 | .get_settings = gfar_gsettings, | 538 | .get_settings = gfar_gsettings, |
468 | .get_drvinfo = gfar_gdrvinfo, | 539 | .get_drvinfo = gfar_gdrvinfo, |
@@ -476,52 +547,10 @@ struct ethtool_ops gfar_ethtool_ops = { | |||
476 | .get_strings = gfar_gstrings, | 547 | .get_strings = gfar_gstrings, |
477 | .get_stats_count = gfar_stats_count, | 548 | .get_stats_count = gfar_stats_count, |
478 | .get_ethtool_stats = gfar_fill_stats, | 549 | .get_ethtool_stats = gfar_fill_stats, |
479 | }; | 550 | .get_rx_csum = gfar_get_rx_csum, |
480 | 551 | .get_tx_csum = gfar_get_tx_csum, | |
481 | struct ethtool_ops gfar_normon_nocoalesce_ethtool_ops = { | 552 | .set_rx_csum = gfar_set_rx_csum, |
482 | .get_settings = gfar_gsettings, | 553 | .set_tx_csum = gfar_set_tx_csum, |
483 | .get_drvinfo = gfar_gdrvinfo, | 554 | .get_msglevel = gfar_get_msglevel, |
484 | .get_regs_len = gfar_reglen, | 555 | .set_msglevel = gfar_set_msglevel, |
485 | .get_regs = gfar_get_regs, | ||
486 | .get_link = ethtool_op_get_link, | ||
487 | .get_ringparam = gfar_gringparam, | ||
488 | .set_ringparam = gfar_sringparam, | ||
489 | .get_strings = gfar_gstrings_normon, | ||
490 | .get_stats_count = gfar_stats_count_normon, | ||
491 | .get_ethtool_stats = gfar_fill_stats_normon, | ||
492 | }; | ||
493 | |||
494 | struct ethtool_ops gfar_nocoalesce_ethtool_ops = { | ||
495 | .get_settings = gfar_gsettings, | ||
496 | .get_drvinfo = gfar_gdrvinfo, | ||
497 | .get_regs_len = gfar_reglen, | ||
498 | .get_regs = gfar_get_regs, | ||
499 | .get_link = ethtool_op_get_link, | ||
500 | .get_ringparam = gfar_gringparam, | ||
501 | .set_ringparam = gfar_sringparam, | ||
502 | .get_strings = gfar_gstrings, | ||
503 | .get_stats_count = gfar_stats_count, | ||
504 | .get_ethtool_stats = gfar_fill_stats, | ||
505 | }; | ||
506 | |||
507 | struct ethtool_ops gfar_normon_ethtool_ops = { | ||
508 | .get_settings = gfar_gsettings, | ||
509 | .get_drvinfo = gfar_gdrvinfo, | ||
510 | .get_regs_len = gfar_reglen, | ||
511 | .get_regs = gfar_get_regs, | ||
512 | .get_link = ethtool_op_get_link, | ||
513 | .get_coalesce = gfar_gcoalesce, | ||
514 | .set_coalesce = gfar_scoalesce, | ||
515 | .get_ringparam = gfar_gringparam, | ||
516 | .set_ringparam = gfar_sringparam, | ||
517 | .get_strings = gfar_gstrings_normon, | ||
518 | .get_stats_count = gfar_stats_count_normon, | ||
519 | .get_ethtool_stats = gfar_fill_stats_normon, | ||
520 | }; | ||
521 | |||
522 | struct ethtool_ops *gfar_op_array[] = { | ||
523 | &gfar_ethtool_ops, | ||
524 | &gfar_normon_ethtool_ops, | ||
525 | &gfar_nocoalesce_ethtool_ops, | ||
526 | &gfar_normon_nocoalesce_ethtool_ops | ||
527 | }; | 556 | }; |
diff --git a/drivers/net/gianfar_phy.c b/drivers/net/gianfar_phy.c index 02b16abc89bd..7c965f268a82 100644 --- a/drivers/net/gianfar_phy.c +++ b/drivers/net/gianfar_phy.c | |||
@@ -572,7 +572,7 @@ static struct phy_info phy_info_dm9161 = { | |||
572 | static struct phy_info phy_info_marvell = { | 572 | static struct phy_info phy_info_marvell = { |
573 | .phy_id = 0x01410c00, | 573 | .phy_id = 0x01410c00, |
574 | .phy_id_mask = 0xffffff00, | 574 | .phy_id_mask = 0xffffff00, |
575 | .name = "Marvell 88E1101", | 575 | .name = "Marvell 88E1101/88E1111", |
576 | .features = MII_GBIT_FEATURES, | 576 | .features = MII_GBIT_FEATURES, |
577 | .config_aneg = &marvell_config_aneg, | 577 | .config_aneg = &marvell_config_aneg, |
578 | .read_status = &marvell_read_status, | 578 | .read_status = &marvell_read_status, |
diff --git a/drivers/net/hamachi.c b/drivers/net/hamachi.c index 3d96714ed3cf..d9df1d9a5739 100644 --- a/drivers/net/hamachi.c +++ b/drivers/net/hamachi.c | |||
@@ -1149,7 +1149,7 @@ static void hamachi_tx_timeout(struct net_device *dev) | |||
1149 | skb->dev = dev; /* Mark as being used by this device. */ | 1149 | skb->dev = dev; /* Mark as being used by this device. */ |
1150 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ | 1150 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
1151 | hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, | 1151 | hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
1152 | skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); | 1152 | skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1153 | hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | | 1153 | hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | |
1154 | DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2)); | 1154 | DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2)); |
1155 | } | 1155 | } |
@@ -1210,7 +1210,7 @@ static void hamachi_init_ring(struct net_device *dev) | |||
1210 | skb->dev = dev; /* Mark as being used by this device. */ | 1210 | skb->dev = dev; /* Mark as being used by this device. */ |
1211 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ | 1211 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
1212 | hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, | 1212 | hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
1213 | skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); | 1213 | skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1214 | /* -2 because it doesn't REALLY have that first 2 bytes -KDU */ | 1214 | /* -2 because it doesn't REALLY have that first 2 bytes -KDU */ |
1215 | hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | | 1215 | hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | |
1216 | DescEndPacket | DescIntr | (hmp->rx_buf_sz -2)); | 1216 | DescEndPacket | DescIntr | (hmp->rx_buf_sz -2)); |
@@ -1509,7 +1509,7 @@ static int hamachi_rx(struct net_device *dev) | |||
1509 | desc->addr, | 1509 | desc->addr, |
1510 | hmp->rx_buf_sz, | 1510 | hmp->rx_buf_sz, |
1511 | PCI_DMA_FROMDEVICE); | 1511 | PCI_DMA_FROMDEVICE); |
1512 | buf_addr = (u8 *) hmp->rx_skbuff[entry]->tail; | 1512 | buf_addr = (u8 *) hmp->rx_skbuff[entry]->data; |
1513 | frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12]))); | 1513 | frame_status = le32_to_cpu(get_unaligned((s32*)&(buf_addr[data_size - 12]))); |
1514 | if (hamachi_debug > 4) | 1514 | if (hamachi_debug > 4) |
1515 | printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n", | 1515 | printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n", |
@@ -1678,7 +1678,7 @@ static int hamachi_rx(struct net_device *dev) | |||
1678 | skb->dev = dev; /* Mark as being used by this device. */ | 1678 | skb->dev = dev; /* Mark as being used by this device. */ |
1679 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1679 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1680 | desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, | 1680 | desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, |
1681 | skb->tail, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); | 1681 | skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1682 | } | 1682 | } |
1683 | desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz); | 1683 | desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz); |
1684 | if (entry >= RX_RING_SIZE-1) | 1684 | if (entry >= RX_RING_SIZE-1) |
@@ -1772,9 +1772,9 @@ static int hamachi_close(struct net_device *dev) | |||
1772 | readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ', | 1772 | readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ', |
1773 | i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr); | 1773 | i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr); |
1774 | if (hamachi_debug > 6) { | 1774 | if (hamachi_debug > 6) { |
1775 | if (*(u8*)hmp->rx_skbuff[i]->tail != 0x69) { | 1775 | if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) { |
1776 | u16 *addr = (u16 *) | 1776 | u16 *addr = (u16 *) |
1777 | hmp->rx_skbuff[i]->tail; | 1777 | hmp->rx_skbuff[i]->data; |
1778 | int j; | 1778 | int j; |
1779 | 1779 | ||
1780 | for (j = 0; j < 0x50; j++) | 1780 | for (j = 0; j < 0x50; j++) |
diff --git a/drivers/net/hamradio/6pack.c b/drivers/net/hamradio/6pack.c index 89454915b857..e44f8e9055ef 100644 --- a/drivers/net/hamradio/6pack.c +++ b/drivers/net/hamradio/6pack.c | |||
@@ -848,7 +848,7 @@ static void __exit sixpack_exit_driver(void) | |||
848 | { | 848 | { |
849 | int ret; | 849 | int ret; |
850 | 850 | ||
851 | if ((ret = tty_register_ldisc(N_6PACK, NULL))) | 851 | if ((ret = tty_unregister_ldisc(N_6PACK))) |
852 | printk(msg_unregfail, ret); | 852 | printk(msg_unregfail, ret); |
853 | } | 853 | } |
854 | 854 | ||
diff --git a/drivers/net/hamradio/mkiss.c b/drivers/net/hamradio/mkiss.c index 62790511098f..3035422f5ad8 100644 --- a/drivers/net/hamradio/mkiss.c +++ b/drivers/net/hamradio/mkiss.c | |||
@@ -934,7 +934,7 @@ static void __exit mkiss_exit_driver(void) | |||
934 | kfree(ax25_ctrls); | 934 | kfree(ax25_ctrls); |
935 | ax25_ctrls = NULL; | 935 | ax25_ctrls = NULL; |
936 | 936 | ||
937 | if ((i = tty_register_ldisc(N_AX25, NULL))) | 937 | if ((i = tty_unregister_ldisc(N_AX25))) |
938 | printk(KERN_ERR "mkiss: can't unregister line discipline (err = %d)\n", i); | 938 | printk(KERN_ERR "mkiss: can't unregister line discipline (err = %d)\n", i); |
939 | } | 939 | } |
940 | 940 | ||
diff --git a/drivers/net/hamradio/scc.c b/drivers/net/hamradio/scc.c index ece1b1a13186..c27e417f32bf 100644 --- a/drivers/net/hamradio/scc.c +++ b/drivers/net/hamradio/scc.c | |||
@@ -304,7 +304,7 @@ static inline void scc_discard_buffers(struct scc_channel *scc) | |||
304 | scc->tx_buff = NULL; | 304 | scc->tx_buff = NULL; |
305 | } | 305 | } |
306 | 306 | ||
307 | while (skb_queue_len(&scc->tx_queue)) | 307 | while (!skb_queue_empty(&scc->tx_queue)) |
308 | dev_kfree_skb(skb_dequeue(&scc->tx_queue)); | 308 | dev_kfree_skb(skb_dequeue(&scc->tx_queue)); |
309 | 309 | ||
310 | spin_unlock_irqrestore(&scc->lock, flags); | 310 | spin_unlock_irqrestore(&scc->lock, flags); |
@@ -1126,8 +1126,7 @@ static void t_dwait(unsigned long channel) | |||
1126 | 1126 | ||
1127 | if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ | 1127 | if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ |
1128 | { | 1128 | { |
1129 | if (skb_queue_len(&scc->tx_queue) == 0) /* nothing to send */ | 1129 | if (skb_queue_empty(&scc->tx_queue)) { /* nothing to send */ |
1130 | { | ||
1131 | scc->stat.tx_state = TXS_IDLE; | 1130 | scc->stat.tx_state = TXS_IDLE; |
1132 | netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */ | 1131 | netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */ |
1133 | return; | 1132 | return; |
diff --git a/drivers/net/hp-plus.c b/drivers/net/hp-plus.c index 4834314b676d..0abf5dd08b4c 100644 --- a/drivers/net/hp-plus.c +++ b/drivers/net/hp-plus.c | |||
@@ -159,12 +159,7 @@ struct net_device * __init hp_plus_probe(int unit) | |||
159 | err = do_hpp_probe(dev); | 159 | err = do_hpp_probe(dev); |
160 | if (err) | 160 | if (err) |
161 | goto out; | 161 | goto out; |
162 | err = register_netdev(dev); | ||
163 | if (err) | ||
164 | goto out1; | ||
165 | return dev; | 162 | return dev; |
166 | out1: | ||
167 | cleanup_card(dev); | ||
168 | out: | 163 | out: |
169 | free_netdev(dev); | 164 | free_netdev(dev); |
170 | return ERR_PTR(err); | 165 | return ERR_PTR(err); |
@@ -271,6 +266,9 @@ static int __init hpp_probe1(struct net_device *dev, int ioaddr) | |||
271 | /* Leave the 8390 and HP chip reset. */ | 266 | /* Leave the 8390 and HP chip reset. */ |
272 | outw(inw(ioaddr + HPP_OPTION) & ~EnableIRQ, ioaddr + HPP_OPTION); | 267 | outw(inw(ioaddr + HPP_OPTION) & ~EnableIRQ, ioaddr + HPP_OPTION); |
273 | 268 | ||
269 | retval = register_netdev(dev); | ||
270 | if (retval) | ||
271 | goto out; | ||
274 | return 0; | 272 | return 0; |
275 | out: | 273 | out: |
276 | release_region(ioaddr, HP_IO_EXTENT); | 274 | release_region(ioaddr, HP_IO_EXTENT); |
@@ -463,11 +461,8 @@ init_module(void) | |||
463 | dev->irq = irq[this_dev]; | 461 | dev->irq = irq[this_dev]; |
464 | dev->base_addr = io[this_dev]; | 462 | dev->base_addr = io[this_dev]; |
465 | if (do_hpp_probe(dev) == 0) { | 463 | if (do_hpp_probe(dev) == 0) { |
466 | if (register_netdev(dev) == 0) { | 464 | dev_hpp[found++] = dev; |
467 | dev_hpp[found++] = dev; | 465 | continue; |
468 | continue; | ||
469 | } | ||
470 | cleanup_card(dev); | ||
471 | } | 466 | } |
472 | free_netdev(dev); | 467 | free_netdev(dev); |
473 | printk(KERN_WARNING "hp-plus.c: No HP-Plus card found (i/o = 0x%x).\n", io[this_dev]); | 468 | printk(KERN_WARNING "hp-plus.c: No HP-Plus card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/hp.c b/drivers/net/hp.c index 026888611d6f..59cf841b14ab 100644 --- a/drivers/net/hp.c +++ b/drivers/net/hp.c | |||
@@ -123,12 +123,7 @@ struct net_device * __init hp_probe(int unit) | |||
123 | err = do_hp_probe(dev); | 123 | err = do_hp_probe(dev); |
124 | if (err) | 124 | if (err) |
125 | goto out; | 125 | goto out; |
126 | err = register_netdev(dev); | ||
127 | if (err) | ||
128 | goto out1; | ||
129 | return dev; | 126 | return dev; |
130 | out1: | ||
131 | cleanup_card(dev); | ||
132 | out: | 127 | out: |
133 | free_netdev(dev); | 128 | free_netdev(dev); |
134 | return ERR_PTR(err); | 129 | return ERR_PTR(err); |
@@ -227,7 +222,12 @@ static int __init hp_probe1(struct net_device *dev, int ioaddr) | |||
227 | ei_status.block_output = &hp_block_output; | 222 | ei_status.block_output = &hp_block_output; |
228 | hp_init_card(dev); | 223 | hp_init_card(dev); |
229 | 224 | ||
225 | retval = register_netdev(dev); | ||
226 | if (retval) | ||
227 | goto out1; | ||
230 | return 0; | 228 | return 0; |
229 | out1: | ||
230 | free_irq(dev->irq, dev); | ||
231 | out: | 231 | out: |
232 | release_region(ioaddr, HP_IO_EXTENT); | 232 | release_region(ioaddr, HP_IO_EXTENT); |
233 | return retval; | 233 | return retval; |
@@ -432,11 +432,8 @@ init_module(void) | |||
432 | dev->irq = irq[this_dev]; | 432 | dev->irq = irq[this_dev]; |
433 | dev->base_addr = io[this_dev]; | 433 | dev->base_addr = io[this_dev]; |
434 | if (do_hp_probe(dev) == 0) { | 434 | if (do_hp_probe(dev) == 0) { |
435 | if (register_netdev(dev) == 0) { | 435 | dev_hp[found++] = dev; |
436 | dev_hp[found++] = dev; | 436 | continue; |
437 | continue; | ||
438 | } | ||
439 | cleanup_card(dev); | ||
440 | } | 437 | } |
441 | free_netdev(dev); | 438 | free_netdev(dev); |
442 | printk(KERN_WARNING "hp.c: No HP card found (i/o = 0x%x).\n", io[this_dev]); | 439 | printk(KERN_WARNING "hp.c: No HP card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/hp100.c b/drivers/net/hp100.c index b3a898c5a585..cf0ac6fda1a1 100644 --- a/drivers/net/hp100.c +++ b/drivers/net/hp100.c | |||
@@ -106,6 +106,7 @@ | |||
106 | #include <linux/interrupt.h> | 106 | #include <linux/interrupt.h> |
107 | #include <linux/eisa.h> | 107 | #include <linux/eisa.h> |
108 | #include <linux/pci.h> | 108 | #include <linux/pci.h> |
109 | #include <linux/dma-mapping.h> | ||
109 | #include <linux/spinlock.h> | 110 | #include <linux/spinlock.h> |
110 | #include <linux/netdevice.h> | 111 | #include <linux/netdevice.h> |
111 | #include <linux/etherdevice.h> | 112 | #include <linux/etherdevice.h> |
@@ -417,12 +418,7 @@ struct net_device * __init hp100_probe(int unit) | |||
417 | if (err) | 418 | if (err) |
418 | goto out; | 419 | goto out; |
419 | 420 | ||
420 | err = register_netdev(dev); | ||
421 | if (err) | ||
422 | goto out1; | ||
423 | return dev; | 421 | return dev; |
424 | out1: | ||
425 | release_region(dev->base_addr, HP100_REGION_SIZE); | ||
426 | out: | 422 | out: |
427 | free_netdev(dev); | 423 | free_netdev(dev); |
428 | return ERR_PTR(err); | 424 | return ERR_PTR(err); |
@@ -562,7 +558,7 @@ static int __devinit hp100_probe1(struct net_device *dev, int ioaddr, | |||
562 | * Also, we can have EISA Busmaster cards (not tested), | 558 | * Also, we can have EISA Busmaster cards (not tested), |
563 | * so beware !!! - Jean II */ | 559 | * so beware !!! - Jean II */ |
564 | if((bus == HP100_BUS_PCI) && | 560 | if((bus == HP100_BUS_PCI) && |
565 | (pci_set_dma_mask(pci_dev, 0xffffffff))) { | 561 | (pci_set_dma_mask(pci_dev, DMA_32BIT_MASK))) { |
566 | /* Gracefully fallback to shared memory */ | 562 | /* Gracefully fallback to shared memory */ |
567 | goto busmasterfail; | 563 | goto busmasterfail; |
568 | } | 564 | } |
@@ -776,11 +772,22 @@ static int __devinit hp100_probe1(struct net_device *dev, int ioaddr, | |||
776 | printk("Warning! Link down.\n"); | 772 | printk("Warning! Link down.\n"); |
777 | } | 773 | } |
778 | 774 | ||
775 | err = register_netdev(dev); | ||
776 | if (err) | ||
777 | goto out3; | ||
778 | |||
779 | return 0; | 779 | return 0; |
780 | out3: | ||
781 | if (local_mode == 1) | ||
782 | pci_free_consistent(lp->pci_dev, MAX_RINGSIZE + 0x0f, | ||
783 | lp->page_vaddr_algn, | ||
784 | virt_to_whatever(dev, lp->page_vaddr_algn)); | ||
785 | if (mem_ptr_virt) | ||
786 | iounmap(mem_ptr_virt); | ||
780 | out2: | 787 | out2: |
781 | release_region(ioaddr, HP100_REGION_SIZE); | 788 | release_region(ioaddr, HP100_REGION_SIZE); |
782 | out1: | 789 | out1: |
783 | return -ENODEV; | 790 | return err; |
784 | } | 791 | } |
785 | 792 | ||
786 | /* This procedure puts the card into a stable init state */ | 793 | /* This procedure puts the card into a stable init state */ |
@@ -2875,18 +2882,12 @@ static int __init hp100_eisa_probe (struct device *gendev) | |||
2875 | if (err) | 2882 | if (err) |
2876 | goto out1; | 2883 | goto out1; |
2877 | 2884 | ||
2878 | err = register_netdev(dev); | ||
2879 | if (err) | ||
2880 | goto out2; | ||
2881 | |||
2882 | #ifdef HP100_DEBUG | 2885 | #ifdef HP100_DEBUG |
2883 | printk("hp100: %s: EISA adapter found at 0x%x\n", dev->name, | 2886 | printk("hp100: %s: EISA adapter found at 0x%x\n", dev->name, |
2884 | dev->base_addr); | 2887 | dev->base_addr); |
2885 | #endif | 2888 | #endif |
2886 | gendev->driver_data = dev; | 2889 | gendev->driver_data = dev; |
2887 | return 0; | 2890 | return 0; |
2888 | out2: | ||
2889 | release_region(dev->base_addr, HP100_REGION_SIZE); | ||
2890 | out1: | 2891 | out1: |
2891 | free_netdev(dev); | 2892 | free_netdev(dev); |
2892 | return err; | 2893 | return err; |
@@ -2951,17 +2952,12 @@ static int __devinit hp100_pci_probe (struct pci_dev *pdev, | |||
2951 | err = hp100_probe1(dev, ioaddr, HP100_BUS_PCI, pdev); | 2952 | err = hp100_probe1(dev, ioaddr, HP100_BUS_PCI, pdev); |
2952 | if (err) | 2953 | if (err) |
2953 | goto out1; | 2954 | goto out1; |
2954 | err = register_netdev(dev); | ||
2955 | if (err) | ||
2956 | goto out2; | ||
2957 | 2955 | ||
2958 | #ifdef HP100_DEBUG | 2956 | #ifdef HP100_DEBUG |
2959 | printk("hp100: %s: PCI adapter found at 0x%x\n", dev->name, ioaddr); | 2957 | printk("hp100: %s: PCI adapter found at 0x%x\n", dev->name, ioaddr); |
2960 | #endif | 2958 | #endif |
2961 | pci_set_drvdata(pdev, dev); | 2959 | pci_set_drvdata(pdev, dev); |
2962 | return 0; | 2960 | return 0; |
2963 | out2: | ||
2964 | release_region(dev->base_addr, HP100_REGION_SIZE); | ||
2965 | out1: | 2961 | out1: |
2966 | free_netdev(dev); | 2962 | free_netdev(dev); |
2967 | out0: | 2963 | out0: |
@@ -3032,15 +3028,9 @@ static int __init hp100_isa_init(void) | |||
3032 | SET_MODULE_OWNER(dev); | 3028 | SET_MODULE_OWNER(dev); |
3033 | 3029 | ||
3034 | err = hp100_isa_probe(dev, hp100_port[i]); | 3030 | err = hp100_isa_probe(dev, hp100_port[i]); |
3035 | if (!err) { | 3031 | if (!err) |
3036 | err = register_netdev(dev); | 3032 | hp100_devlist[cards++] = dev; |
3037 | if (!err) | 3033 | else |
3038 | hp100_devlist[cards++] = dev; | ||
3039 | else | ||
3040 | release_region(dev->base_addr, HP100_REGION_SIZE); | ||
3041 | } | ||
3042 | |||
3043 | if (err) | ||
3044 | free_netdev(dev); | 3034 | free_netdev(dev); |
3045 | } | 3035 | } |
3046 | 3036 | ||
diff --git a/drivers/net/irda/irtty-sir.c b/drivers/net/irda/irtty-sir.c index 7d23aa375908..b8d112348ba4 100644 --- a/drivers/net/irda/irtty-sir.c +++ b/drivers/net/irda/irtty-sir.c | |||
@@ -626,7 +626,7 @@ static void __exit irtty_sir_cleanup(void) | |||
626 | { | 626 | { |
627 | int err; | 627 | int err; |
628 | 628 | ||
629 | if ((err = tty_register_ldisc(N_IRDA, NULL))) { | 629 | if ((err = tty_unregister_ldisc(N_IRDA))) { |
630 | IRDA_ERROR("%s(), can't unregister line discipline (err = %d)\n", | 630 | IRDA_ERROR("%s(), can't unregister line discipline (err = %d)\n", |
631 | __FUNCTION__, err); | 631 | __FUNCTION__, err); |
632 | } | 632 | } |
diff --git a/drivers/net/irda/sir_kthread.c b/drivers/net/irda/sir_kthread.c index 18cea1099530..c65054364bca 100644 --- a/drivers/net/irda/sir_kthread.c +++ b/drivers/net/irda/sir_kthread.c | |||
@@ -135,8 +135,7 @@ static int irda_thread(void *startup) | |||
135 | remove_wait_queue(&irda_rq_queue.kick, &wait); | 135 | remove_wait_queue(&irda_rq_queue.kick, &wait); |
136 | 136 | ||
137 | /* make swsusp happy with our thread */ | 137 | /* make swsusp happy with our thread */ |
138 | if (current->flags & PF_FREEZE) | 138 | try_to_freeze(); |
139 | refrigerator(PF_FREEZE); | ||
140 | 139 | ||
141 | run_irda_queue(); | 140 | run_irda_queue(); |
142 | } | 141 | } |
diff --git a/drivers/net/irda/stir4200.c b/drivers/net/irda/stir4200.c index 66f488c13717..15f207323d97 100644 --- a/drivers/net/irda/stir4200.c +++ b/drivers/net/irda/stir4200.c | |||
@@ -763,7 +763,7 @@ static int stir_transmit_thread(void *arg) | |||
763 | { | 763 | { |
764 | #ifdef CONFIG_PM | 764 | #ifdef CONFIG_PM |
765 | /* if suspending, then power off and wait */ | 765 | /* if suspending, then power off and wait */ |
766 | if (unlikely(current->flags & PF_FREEZE)) { | 766 | if (unlikely(freezing(current))) { |
767 | if (stir->receiving) | 767 | if (stir->receiving) |
768 | receive_stop(stir); | 768 | receive_stop(stir); |
769 | else | 769 | else |
@@ -771,7 +771,7 @@ static int stir_transmit_thread(void *arg) | |||
771 | 771 | ||
772 | write_reg(stir, REG_CTRL1, CTRL1_TXPWD|CTRL1_RXPWD); | 772 | write_reg(stir, REG_CTRL1, CTRL1_TXPWD|CTRL1_RXPWD); |
773 | 773 | ||
774 | refrigerator(PF_FREEZE); | 774 | refrigerator(); |
775 | 775 | ||
776 | if (change_speed(stir, stir->speed)) | 776 | if (change_speed(stir, stir->speed)) |
777 | break; | 777 | break; |
diff --git a/drivers/net/isa-skeleton.c b/drivers/net/isa-skeleton.c index 50bebb55e9ee..88ae8a04fabc 100644 --- a/drivers/net/isa-skeleton.c +++ b/drivers/net/isa-skeleton.c | |||
@@ -176,12 +176,7 @@ struct net_device * __init netcard_probe(int unit) | |||
176 | err = do_netcard_probe(dev); | 176 | err = do_netcard_probe(dev); |
177 | if (err) | 177 | if (err) |
178 | goto out; | 178 | goto out; |
179 | err = register_netdev(dev); | ||
180 | if (err) | ||
181 | goto out1; | ||
182 | return dev; | 179 | return dev; |
183 | out1: | ||
184 | cleanup_card(dev); | ||
185 | out: | 180 | out: |
186 | free_netdev(dev); | 181 | free_netdev(dev); |
187 | return ERR_PTR(err); | 182 | return ERR_PTR(err); |
@@ -316,7 +311,15 @@ static int __init netcard_probe1(struct net_device *dev, int ioaddr) | |||
316 | 311 | ||
317 | dev->tx_timeout = &net_tx_timeout; | 312 | dev->tx_timeout = &net_tx_timeout; |
318 | dev->watchdog_timeo = MY_TX_TIMEOUT; | 313 | dev->watchdog_timeo = MY_TX_TIMEOUT; |
314 | |||
315 | err = register_netdev(dev); | ||
316 | if (err) | ||
317 | goto out2; | ||
319 | return 0; | 318 | return 0; |
319 | out2: | ||
320 | #ifdef jumpered_dma | ||
321 | free_dma(dev->dma); | ||
322 | #endif | ||
320 | out1: | 323 | out1: |
321 | #ifdef jumpered_interrupts | 324 | #ifdef jumpered_interrupts |
322 | free_irq(dev->irq, dev); | 325 | free_irq(dev->irq, dev); |
@@ -691,11 +694,8 @@ int init_module(void) | |||
691 | dev->dma = dma; | 694 | dev->dma = dma; |
692 | dev->mem_start = mem; | 695 | dev->mem_start = mem; |
693 | if (do_netcard_probe(dev) == 0) { | 696 | if (do_netcard_probe(dev) == 0) { |
694 | if (register_netdev(dev) == 0) | 697 | this_device = dev; |
695 | this_device = dev; | 698 | return 0; |
696 | return 0; | ||
697 | } | ||
698 | cleanup_card(dev); | ||
699 | } | 699 | } |
700 | free_netdev(dev); | 700 | free_netdev(dev); |
701 | return -ENXIO; | 701 | return -ENXIO; |
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c index 35f6a7c271a2..097b90ccf575 100644 --- a/drivers/net/ixgb/ixgb_main.c +++ b/drivers/net/ixgb/ixgb_main.c | |||
@@ -47,7 +47,9 @@ char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver"; | |||
47 | #else | 47 | #else |
48 | #define DRIVERNAPI "-NAPI" | 48 | #define DRIVERNAPI "-NAPI" |
49 | #endif | 49 | #endif |
50 | char ixgb_driver_version[] = "1.0.95-k2"DRIVERNAPI; | 50 | |
51 | #define DRV_VERSION "1.0.95-k2"DRIVERNAPI | ||
52 | char ixgb_driver_version[] = DRV_VERSION; | ||
51 | char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; | 53 | char ixgb_copyright[] = "Copyright (c) 1999-2005 Intel Corporation."; |
52 | 54 | ||
53 | /* ixgb_pci_tbl - PCI Device ID Table | 55 | /* ixgb_pci_tbl - PCI Device ID Table |
@@ -140,6 +142,7 @@ static struct pci_driver ixgb_driver = { | |||
140 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); | 142 | MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>"); |
141 | MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver"); | 143 | MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver"); |
142 | MODULE_LICENSE("GPL"); | 144 | MODULE_LICENSE("GPL"); |
145 | MODULE_VERSION(DRV_VERSION); | ||
143 | 146 | ||
144 | /* some defines for controlling descriptor fetches in h/w */ | 147 | /* some defines for controlling descriptor fetches in h/w */ |
145 | #define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */ | 148 | #define RXDCTL_PTHRESH_DEFAULT 128 /* chip considers prefech below this */ |
diff --git a/drivers/net/lance.c b/drivers/net/lance.c index dec557fb6a99..b4929beb33b2 100644 --- a/drivers/net/lance.c +++ b/drivers/net/lance.c | |||
@@ -356,11 +356,8 @@ int init_module(void) | |||
356 | dev->base_addr = io[this_dev]; | 356 | dev->base_addr = io[this_dev]; |
357 | dev->dma = dma[this_dev]; | 357 | dev->dma = dma[this_dev]; |
358 | if (do_lance_probe(dev) == 0) { | 358 | if (do_lance_probe(dev) == 0) { |
359 | if (register_netdev(dev) == 0) { | 359 | dev_lance[found++] = dev; |
360 | dev_lance[found++] = dev; | 360 | continue; |
361 | continue; | ||
362 | } | ||
363 | cleanup_card(dev); | ||
364 | } | 361 | } |
365 | free_netdev(dev); | 362 | free_netdev(dev); |
366 | break; | 363 | break; |
@@ -448,12 +445,7 @@ struct net_device * __init lance_probe(int unit) | |||
448 | err = do_lance_probe(dev); | 445 | err = do_lance_probe(dev); |
449 | if (err) | 446 | if (err) |
450 | goto out; | 447 | goto out; |
451 | err = register_netdev(dev); | ||
452 | if (err) | ||
453 | goto out1; | ||
454 | return dev; | 448 | return dev; |
455 | out1: | ||
456 | cleanup_card(dev); | ||
457 | out: | 449 | out: |
458 | free_netdev(dev); | 450 | free_netdev(dev); |
459 | return ERR_PTR(err); | 451 | return ERR_PTR(err); |
@@ -724,6 +716,9 @@ static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int | |||
724 | dev->tx_timeout = lance_tx_timeout; | 716 | dev->tx_timeout = lance_tx_timeout; |
725 | dev->watchdog_timeo = TX_TIMEOUT; | 717 | dev->watchdog_timeo = TX_TIMEOUT; |
726 | 718 | ||
719 | err = register_netdev(dev); | ||
720 | if (err) | ||
721 | goto out_dma; | ||
727 | return 0; | 722 | return 0; |
728 | out_dma: | 723 | out_dma: |
729 | if (dev->dma != 4) | 724 | if (dev->dma != 4) |
@@ -867,7 +862,7 @@ lance_init_ring(struct net_device *dev, int gfp) | |||
867 | lp->rx_skbuff[i] = skb; | 862 | lp->rx_skbuff[i] = skb; |
868 | if (skb) { | 863 | if (skb) { |
869 | skb->dev = dev; | 864 | skb->dev = dev; |
870 | rx_buff = skb->tail; | 865 | rx_buff = skb->data; |
871 | } else | 866 | } else |
872 | rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp); | 867 | rx_buff = kmalloc(PKT_BUF_SZ, GFP_DMA | gfp); |
873 | if (rx_buff == NULL) | 868 | if (rx_buff == NULL) |
diff --git a/drivers/net/lasi_82596.c b/drivers/net/lasi_82596.c index 5e263fcba669..41bad07ac1ac 100644 --- a/drivers/net/lasi_82596.c +++ b/drivers/net/lasi_82596.c | |||
@@ -553,14 +553,14 @@ static inline void init_rx_bufs(struct net_device *dev) | |||
553 | if (skb == NULL) | 553 | if (skb == NULL) |
554 | panic("%s: alloc_skb() failed", __FILE__); | 554 | panic("%s: alloc_skb() failed", __FILE__); |
555 | skb_reserve(skb, 2); | 555 | skb_reserve(skb, 2); |
556 | dma_addr = dma_map_single(lp->dev, skb->tail,PKT_BUF_SZ, | 556 | dma_addr = dma_map_single(lp->dev, skb->data,PKT_BUF_SZ, |
557 | DMA_FROM_DEVICE); | 557 | DMA_FROM_DEVICE); |
558 | skb->dev = dev; | 558 | skb->dev = dev; |
559 | rbd->v_next = rbd+1; | 559 | rbd->v_next = rbd+1; |
560 | rbd->b_next = WSWAPrbd(virt_to_dma(lp,rbd+1)); | 560 | rbd->b_next = WSWAPrbd(virt_to_dma(lp,rbd+1)); |
561 | rbd->b_addr = WSWAPrbd(virt_to_dma(lp,rbd)); | 561 | rbd->b_addr = WSWAPrbd(virt_to_dma(lp,rbd)); |
562 | rbd->skb = skb; | 562 | rbd->skb = skb; |
563 | rbd->v_data = skb->tail; | 563 | rbd->v_data = skb->data; |
564 | rbd->b_data = WSWAPchar(dma_addr); | 564 | rbd->b_data = WSWAPchar(dma_addr); |
565 | rbd->size = PKT_BUF_SZ; | 565 | rbd->size = PKT_BUF_SZ; |
566 | } | 566 | } |
@@ -783,8 +783,8 @@ static inline int i596_rx(struct net_device *dev) | |||
783 | rx_in_place = 1; | 783 | rx_in_place = 1; |
784 | rbd->skb = newskb; | 784 | rbd->skb = newskb; |
785 | newskb->dev = dev; | 785 | newskb->dev = dev; |
786 | dma_addr = dma_map_single(lp->dev, newskb->tail, PKT_BUF_SZ, DMA_FROM_DEVICE); | 786 | dma_addr = dma_map_single(lp->dev, newskb->data, PKT_BUF_SZ, DMA_FROM_DEVICE); |
787 | rbd->v_data = newskb->tail; | 787 | rbd->v_data = newskb->data; |
788 | rbd->b_data = WSWAPchar(dma_addr); | 788 | rbd->b_data = WSWAPchar(dma_addr); |
789 | CHECK_WBACK_INV(rbd, sizeof(struct i596_rbd)); | 789 | CHECK_WBACK_INV(rbd, sizeof(struct i596_rbd)); |
790 | } | 790 | } |
diff --git a/drivers/net/lne390.c b/drivers/net/lne390.c index 179a97c0af69..27f0d8ac4c40 100644 --- a/drivers/net/lne390.c +++ b/drivers/net/lne390.c | |||
@@ -167,12 +167,7 @@ struct net_device * __init lne390_probe(int unit) | |||
167 | err = do_lne390_probe(dev); | 167 | err = do_lne390_probe(dev); |
168 | if (err) | 168 | if (err) |
169 | goto out; | 169 | goto out; |
170 | err = register_netdev(dev); | ||
171 | if (err) | ||
172 | goto out1; | ||
173 | return dev; | 170 | return dev; |
174 | out1: | ||
175 | cleanup_card(dev); | ||
176 | out: | 171 | out: |
177 | free_netdev(dev); | 172 | free_netdev(dev); |
178 | return ERR_PTR(err); | 173 | return ERR_PTR(err); |
@@ -296,7 +291,14 @@ static int __init lne390_probe1(struct net_device *dev, int ioaddr) | |||
296 | dev->poll_controller = ei_poll; | 291 | dev->poll_controller = ei_poll; |
297 | #endif | 292 | #endif |
298 | NS8390_init(dev, 0); | 293 | NS8390_init(dev, 0); |
294 | |||
295 | ret = register_netdev(dev); | ||
296 | if (ret) | ||
297 | goto unmap; | ||
299 | return 0; | 298 | return 0; |
299 | unmap: | ||
300 | if (ei_status.reg0) | ||
301 | iounmap((void *)dev->mem_start); | ||
300 | cleanup: | 302 | cleanup: |
301 | free_irq(dev->irq, dev); | 303 | free_irq(dev->irq, dev); |
302 | return ret; | 304 | return ret; |
@@ -426,11 +428,8 @@ int init_module(void) | |||
426 | dev->base_addr = io[this_dev]; | 428 | dev->base_addr = io[this_dev]; |
427 | dev->mem_start = mem[this_dev]; | 429 | dev->mem_start = mem[this_dev]; |
428 | if (do_lne390_probe(dev) == 0) { | 430 | if (do_lne390_probe(dev) == 0) { |
429 | if (register_netdev(dev) == 0) { | 431 | dev_lne[found++] = dev; |
430 | dev_lne[found++] = dev; | 432 | continue; |
431 | continue; | ||
432 | } | ||
433 | cleanup_card(dev); | ||
434 | } | 433 | } |
435 | free_netdev(dev); | 434 | free_netdev(dev); |
436 | printk(KERN_WARNING "lne390.c: No LNE390 card found (i/o = 0x%x).\n", io[this_dev]); | 435 | printk(KERN_WARNING "lne390.c: No LNE390 card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/mace.c b/drivers/net/mace.c index 6ed2d7dbd44c..81d0a26e4f41 100644 --- a/drivers/net/mace.c +++ b/drivers/net/mace.c | |||
@@ -109,7 +109,7 @@ bitrev(int b) | |||
109 | } | 109 | } |
110 | 110 | ||
111 | 111 | ||
112 | static int __devinit mace_probe(struct macio_dev *mdev, const struct of_match *match) | 112 | static int __devinit mace_probe(struct macio_dev *mdev, const struct of_device_id *match) |
113 | { | 113 | { |
114 | struct device_node *mace = macio_get_of_node(mdev); | 114 | struct device_node *mace = macio_get_of_node(mdev); |
115 | struct net_device *dev; | 115 | struct net_device *dev; |
@@ -1009,12 +1009,10 @@ static irqreturn_t mace_rxdma_intr(int irq, void *dev_id, struct pt_regs *regs) | |||
1009 | return IRQ_HANDLED; | 1009 | return IRQ_HANDLED; |
1010 | } | 1010 | } |
1011 | 1011 | ||
1012 | static struct of_match mace_match[] = | 1012 | static struct of_device_id mace_match[] = |
1013 | { | 1013 | { |
1014 | { | 1014 | { |
1015 | .name = "mace", | 1015 | .name = "mace", |
1016 | .type = OF_ANY_MATCH, | ||
1017 | .compatible = OF_ANY_MATCH | ||
1018 | }, | 1016 | }, |
1019 | {}, | 1017 | {}, |
1020 | }; | 1018 | }; |
diff --git a/drivers/net/myri_code.h b/drivers/net/myri_code.h index 851eba8a3e00..e9c6e569d1f4 100644 --- a/drivers/net/myri_code.h +++ b/drivers/net/myri_code.h | |||
@@ -4775,1288 +4775,7 @@ static unsigned char lanai4_code[76256] __initdata = { | |||
4775 | /* This is the LANai data */ | 4775 | /* This is the LANai data */ |
4776 | 4776 | ||
4777 | static unsigned int lanai4_data_off = 0x94F0; /* half-word offset */ | 4777 | static unsigned int lanai4_data_off = 0x94F0; /* half-word offset */ |
4778 | static unsigned char lanai4_data[20472] __initdata = { | 4778 | static unsigned char lanai4_data[20472] __initdata; |
4779 | 0x00,0x00, | ||
4780 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4781 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4782 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4783 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4784 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4785 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4786 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4787 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4788 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4789 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4790 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4791 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4792 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4793 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4794 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4795 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4796 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4797 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4798 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4799 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4800 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4801 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4802 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4803 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4804 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4805 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4806 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4807 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4808 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4809 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4810 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4811 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4812 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4813 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4814 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4815 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4816 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4817 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4818 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4819 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4820 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4821 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4822 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4823 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4824 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4825 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4826 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4827 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4828 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4829 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4830 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4831 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4832 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4833 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4834 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4835 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4836 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4837 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4838 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4839 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4840 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4841 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4842 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4843 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4844 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4845 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4846 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4847 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4848 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4849 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4850 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4851 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4852 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4853 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4854 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4855 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4856 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4857 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4858 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4859 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4860 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4861 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4862 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4863 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4864 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4865 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4866 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4867 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4868 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4869 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4870 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4871 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4872 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4873 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4874 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4875 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4876 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4877 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4878 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4879 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4880 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4881 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4882 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4883 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4884 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4885 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4886 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4887 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4888 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4889 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4890 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4891 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4892 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4893 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4894 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4895 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4896 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4897 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4898 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4899 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4900 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4901 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4902 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4903 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4904 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4905 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4906 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4907 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4908 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4909 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4910 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4911 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4912 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4913 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4914 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4915 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4916 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4917 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4918 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4919 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4920 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4921 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4922 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4923 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4924 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4925 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4926 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4927 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4928 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4929 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4930 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4931 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4932 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4933 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4934 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4935 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4936 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4937 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4938 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4939 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4940 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4941 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4942 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4943 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4944 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4945 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4946 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4947 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4948 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4949 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4950 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4951 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4952 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4953 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4954 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4955 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4956 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4957 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4958 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4959 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4960 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4961 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4962 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4963 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4964 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4965 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4966 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4967 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4968 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4969 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4970 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4971 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4972 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4973 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4974 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4975 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4976 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4977 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4978 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4979 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4980 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4981 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4982 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4983 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4984 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4985 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4986 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4987 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4988 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4989 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4990 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4991 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4992 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4993 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4994 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4995 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4996 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4997 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4998 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
4999 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5000 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5001 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5002 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5003 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5004 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5005 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5006 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5007 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5008 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5009 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5010 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5011 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5012 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5013 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5014 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5015 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5016 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5017 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5018 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5019 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5020 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5021 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5022 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5023 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5024 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5025 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5026 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5027 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5028 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5029 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5030 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5031 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5032 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5033 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5034 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5035 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5036 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5037 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5038 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5039 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5040 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5041 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5042 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5043 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5044 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5045 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5046 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5047 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5048 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5049 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5050 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5051 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5052 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5053 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5054 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5055 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5056 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5057 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5058 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5059 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5060 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5061 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5062 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5063 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5064 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5065 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5066 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5067 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5068 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5069 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5070 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5071 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5072 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5073 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5074 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5075 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5076 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5077 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5078 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5079 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5080 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5081 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5082 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5083 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5084 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5085 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5086 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5087 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5088 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5089 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5090 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5091 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5092 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5093 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5094 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5095 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5096 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5097 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5098 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5099 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5100 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5101 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5102 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5103 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5104 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5105 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5106 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5107 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5108 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5109 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5110 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5111 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5112 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5113 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5114 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5115 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5116 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5117 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5118 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5119 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5120 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5121 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5122 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5123 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5124 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5125 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5126 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5127 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5128 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5129 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5130 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5131 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5132 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5133 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5134 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5135 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5136 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5137 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5138 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5139 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5140 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5141 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5142 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5143 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5144 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5145 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5146 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5147 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5148 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5149 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5150 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5151 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5152 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5153 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5154 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5155 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5156 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5157 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5158 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5159 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5160 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5161 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5162 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5163 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5164 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5165 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5166 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5167 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5168 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5169 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5170 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5171 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5172 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5173 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5174 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5175 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5176 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5177 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5178 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5179 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5180 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5181 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5182 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5183 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5184 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5185 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5186 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5187 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5188 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5189 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5190 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5191 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5192 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5193 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5194 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5195 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5196 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5197 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5198 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5199 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5200 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5201 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5202 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5203 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5204 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5205 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5206 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5207 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5208 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5209 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5210 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5211 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5212 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5213 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5214 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5215 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5216 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5217 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5218 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5219 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5220 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5221 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5222 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5223 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5224 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5225 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5226 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5227 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5228 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5229 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5230 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5231 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5232 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5233 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5234 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5235 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5236 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5237 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5238 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5239 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5240 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5241 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5242 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5243 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5244 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5245 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5246 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5247 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5248 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5249 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5250 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5251 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5252 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5253 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5254 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5255 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5256 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5257 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5258 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5259 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5260 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5261 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5262 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5263 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5264 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5265 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5266 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5267 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5268 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5269 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5270 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5271 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5272 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5273 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5274 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5275 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5276 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5277 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5278 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5279 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5280 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5281 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5282 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5283 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5284 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5285 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5286 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5287 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5288 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5289 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5290 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5291 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5292 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5293 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5294 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5295 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5296 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5297 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5298 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5299 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5300 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5301 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5302 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5303 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5304 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5305 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5306 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5307 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5308 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5309 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5310 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5311 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5312 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5313 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5314 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5315 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5316 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5317 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5318 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5319 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5320 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5321 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5322 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5323 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5324 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5325 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5326 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5327 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5328 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5329 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5330 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5331 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5332 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5333 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5334 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5335 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5336 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5337 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5338 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5339 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5340 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5341 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5342 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5343 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5344 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5345 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5346 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5347 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5348 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5349 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5350 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5351 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5352 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5353 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5354 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5355 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5356 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5357 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5358 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5359 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5360 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5361 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5362 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5363 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5364 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5365 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5366 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5367 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5368 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5369 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5370 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5371 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5372 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5373 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5374 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5375 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5376 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5377 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5378 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5379 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5380 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5381 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5382 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5383 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5384 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5385 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5386 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5387 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5388 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5389 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5390 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5391 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5392 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5393 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5394 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5395 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5396 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5397 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5398 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5399 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5400 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5401 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5402 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5403 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5404 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5405 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5406 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5407 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5408 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5409 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5410 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5411 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5412 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5413 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5414 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5415 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5416 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5417 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5418 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5419 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5420 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5421 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5422 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5423 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5424 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5425 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5426 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5427 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5428 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5429 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5430 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5431 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5432 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5433 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5434 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5435 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5436 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5437 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5438 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5439 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5440 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5441 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5442 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5443 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5444 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5445 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5446 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5447 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5448 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5449 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5450 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5451 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5452 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5453 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5454 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5455 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5456 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5457 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5458 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5459 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5460 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5461 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5462 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5463 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5464 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5465 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5466 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5467 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5468 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5469 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5470 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5471 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5472 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5473 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5474 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5475 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5476 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5477 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5478 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5479 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5480 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5481 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5482 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5483 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5484 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5485 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5486 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5487 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5488 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5489 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5490 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5491 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5492 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5493 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5494 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5495 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5496 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5497 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5498 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5499 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5500 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5501 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5502 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5503 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5504 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5505 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5506 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5507 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5508 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5509 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5510 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5511 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5512 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5513 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5514 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5515 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5516 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5517 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5518 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5519 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5520 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5521 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5522 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5523 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5524 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5525 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5526 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5527 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5528 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5529 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5530 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5531 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5532 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5533 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5534 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5535 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5536 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5537 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5538 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5539 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5540 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5541 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5542 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5543 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5544 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5545 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5546 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5547 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5548 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5549 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5550 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5551 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5552 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5553 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5554 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5555 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5556 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5557 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5558 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5559 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5560 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5561 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5562 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5563 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5564 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5565 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5566 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5567 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5568 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5569 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5570 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5571 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5572 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5573 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5574 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5575 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5576 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5577 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5578 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5579 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5580 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5581 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5582 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5583 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5584 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5585 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5586 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5587 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5588 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5589 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5590 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5591 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5592 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5593 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5594 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5595 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5596 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5597 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5598 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5599 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5600 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5601 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5602 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5603 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5604 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5605 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5606 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5607 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5608 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5609 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5610 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5611 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5612 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5613 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5614 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5615 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5616 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5617 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5618 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5619 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5620 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5621 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5622 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5623 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5624 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5625 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5626 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5627 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5628 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5629 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5630 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5631 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5632 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5633 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5634 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5635 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5636 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5637 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5638 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5639 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5640 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5641 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5642 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5643 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5644 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5645 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5646 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5647 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5648 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5649 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5650 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5651 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5652 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5653 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5654 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5655 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5656 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5657 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5658 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5659 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5660 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5661 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5662 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5663 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5664 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5665 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5666 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5667 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5668 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5669 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5670 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5671 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5672 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5673 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5674 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5675 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5676 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5677 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5678 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5679 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5680 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5681 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5682 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5683 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5684 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5685 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5686 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5687 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5688 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5689 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5690 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5691 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5692 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5693 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5694 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5695 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5696 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5697 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5698 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5699 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5700 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5701 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5702 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5703 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5704 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5705 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5706 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5707 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5708 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5709 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5710 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5711 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5712 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5713 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5714 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5715 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5716 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5717 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5718 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5719 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5720 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5721 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5722 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5723 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5724 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5725 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5726 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5727 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5728 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5729 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5730 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5731 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5732 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5733 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5734 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5735 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5736 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5737 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5738 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5739 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5740 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5741 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5742 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5743 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5744 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5745 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5746 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5747 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5748 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5749 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5750 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5751 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5752 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5753 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5754 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5755 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5756 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5757 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5758 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5759 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5760 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5761 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5762 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5763 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5764 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5765 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5766 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5767 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5768 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5769 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5770 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5771 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5772 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5773 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5774 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5775 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5776 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5777 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5778 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5779 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5780 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5781 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5782 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5783 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5784 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5785 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5786 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5787 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5788 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5789 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5790 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5791 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5792 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5793 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5794 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5795 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5796 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5797 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5798 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5799 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5800 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5801 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5802 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5803 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5804 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5805 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5806 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5807 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5808 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5809 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5810 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5811 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5812 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5813 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5814 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5815 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5816 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5817 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5818 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5819 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5820 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5821 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5822 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5823 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5824 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5825 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5826 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5827 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5828 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5829 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5830 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5831 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5832 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5833 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5834 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5835 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5836 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5837 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5838 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5839 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5840 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5841 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5842 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5843 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5844 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5845 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5846 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5847 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5848 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5849 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5850 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5851 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5852 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5853 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5854 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5855 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5856 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5857 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5858 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5859 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5860 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5861 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5862 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5863 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5864 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5865 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5866 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5867 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5868 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5869 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5870 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5871 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5872 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5873 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5874 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5875 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5876 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5877 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5878 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5879 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5880 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5881 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5882 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5883 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5884 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5885 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5886 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5887 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5888 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5889 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x01, | ||
5890 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5891 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5892 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5893 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5894 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5895 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5896 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5897 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5898 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5899 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5900 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5901 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5902 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5903 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5904 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5905 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5906 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5907 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5908 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5909 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5910 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5911 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5912 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5913 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5914 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5915 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5916 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5917 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5918 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5919 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5920 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5921 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5922 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5923 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5924 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5925 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5926 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5927 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5928 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5929 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5930 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5931 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5932 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5933 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5934 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5935 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5936 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5937 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5938 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5939 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5940 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5941 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5942 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5943 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5944 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5945 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5946 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5947 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5948 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5949 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5950 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5951 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5952 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5953 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5954 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5955 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5956 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5957 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5958 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5959 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5960 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5961 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5962 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5963 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5964 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5965 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5966 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5967 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5968 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5969 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5970 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5971 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5972 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5973 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5974 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5975 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5976 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5977 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5978 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5979 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5980 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5981 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5982 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5983 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5984 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5985 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5986 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5987 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5988 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5989 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5990 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5991 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5992 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5993 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5994 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5995 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5996 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5997 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5998 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
5999 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6000 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6001 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6002 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6003 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6004 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6005 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6006 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6007 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6008 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6009 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6010 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6011 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6012 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6013 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6014 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6015 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6016 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6017 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6018 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6019 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6020 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6021 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6022 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6023 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6024 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6025 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6026 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6027 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6028 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6029 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6030 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6031 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6032 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6033 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6034 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6035 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6036 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6037 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6038 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6039 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6040 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6041 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6042 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6043 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6044 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6045 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6046 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6047 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6048 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6049 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6050 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6051 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6052 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6053 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6054 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6055 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6056 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6057 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6058 | 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, 0x00,0x00, | ||
6059 | 0x00,0x00, 0x00,0x00, 0x00,0x00, } ; | ||
6060 | 4779 | ||
6061 | 4780 | ||
6062 | #ifdef SYMBOL_DEFINES_COMPILED | 4781 | #ifdef SYMBOL_DEFINES_COMPILED |
diff --git a/drivers/net/myri_sbus.c b/drivers/net/myri_sbus.c index aad5494c83cf..f0996ce5c268 100644 --- a/drivers/net/myri_sbus.c +++ b/drivers/net/myri_sbus.c | |||
@@ -369,7 +369,7 @@ static void myri_tx(struct myri_eth *mp, struct net_device *dev) | |||
369 | * assume 802.3 if the type field is short enough to be a length. | 369 | * assume 802.3 if the type field is short enough to be a length. |
370 | * This is normal practice and works for any 'now in use' protocol. | 370 | * This is normal practice and works for any 'now in use' protocol. |
371 | */ | 371 | */ |
372 | static unsigned short myri_type_trans(struct sk_buff *skb, struct net_device *dev) | 372 | static __be16 myri_type_trans(struct sk_buff *skb, struct net_device *dev) |
373 | { | 373 | { |
374 | struct ethhdr *eth; | 374 | struct ethhdr *eth; |
375 | unsigned char *rawp; | 375 | unsigned char *rawp; |
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c index babb59e146ea..9d6d2548c2d3 100644 --- a/drivers/net/natsemi.c +++ b/drivers/net/natsemi.c | |||
@@ -1926,7 +1926,7 @@ static void refill_rx(struct net_device *dev) | |||
1926 | break; /* Better luck next round. */ | 1926 | break; /* Better luck next round. */ |
1927 | skb->dev = dev; /* Mark as being used by this device. */ | 1927 | skb->dev = dev; /* Mark as being used by this device. */ |
1928 | np->rx_dma[entry] = pci_map_single(np->pci_dev, | 1928 | np->rx_dma[entry] = pci_map_single(np->pci_dev, |
1929 | skb->tail, buflen, PCI_DMA_FROMDEVICE); | 1929 | skb->data, buflen, PCI_DMA_FROMDEVICE); |
1930 | np->rx_ring[entry].addr = cpu_to_le32(np->rx_dma[entry]); | 1930 | np->rx_ring[entry].addr = cpu_to_le32(np->rx_dma[entry]); |
1931 | } | 1931 | } |
1932 | np->rx_ring[entry].cmd_status = cpu_to_le32(np->rx_buf_sz); | 1932 | np->rx_ring[entry].cmd_status = cpu_to_le32(np->rx_buf_sz); |
@@ -2280,7 +2280,7 @@ static void netdev_rx(struct net_device *dev) | |||
2280 | buflen, | 2280 | buflen, |
2281 | PCI_DMA_FROMDEVICE); | 2281 | PCI_DMA_FROMDEVICE); |
2282 | eth_copy_and_sum(skb, | 2282 | eth_copy_and_sum(skb, |
2283 | np->rx_skbuff[entry]->tail, pkt_len, 0); | 2283 | np->rx_skbuff[entry]->data, pkt_len, 0); |
2284 | skb_put(skb, pkt_len); | 2284 | skb_put(skb, pkt_len); |
2285 | pci_dma_sync_single_for_device(np->pci_dev, | 2285 | pci_dma_sync_single_for_device(np->pci_dev, |
2286 | np->rx_dma[entry], | 2286 | np->rx_dma[entry], |
diff --git a/drivers/net/ne-h8300.c b/drivers/net/ne-h8300.c index 84e291e24935..8f40368cf2e9 100644 --- a/drivers/net/ne-h8300.c +++ b/drivers/net/ne-h8300.c | |||
@@ -180,12 +180,7 @@ struct net_device * __init ne_probe(int unit) | |||
180 | err = do_ne_probe(dev); | 180 | err = do_ne_probe(dev); |
181 | if (err) | 181 | if (err) |
182 | goto out; | 182 | goto out; |
183 | err = register_netdev(dev); | ||
184 | if (err) | ||
185 | goto out1; | ||
186 | return dev; | 183 | return dev; |
187 | out1: | ||
188 | cleanup_card(dev); | ||
189 | out: | 184 | out: |
190 | free_netdev(dev); | 185 | free_netdev(dev); |
191 | return ERR_PTR(err); | 186 | return ERR_PTR(err); |
@@ -325,8 +320,13 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr) | |||
325 | dev->poll_controller = ei_poll; | 320 | dev->poll_controller = ei_poll; |
326 | #endif | 321 | #endif |
327 | NS8390_init(dev, 0); | 322 | NS8390_init(dev, 0); |
328 | return 0; | ||
329 | 323 | ||
324 | ret = register_netdev(dev); | ||
325 | if (ret) | ||
326 | goto out_irq; | ||
327 | return 0; | ||
328 | out_irq: | ||
329 | free_irq(dev->irq, dev); | ||
330 | err_out: | 330 | err_out: |
331 | release_region(ioaddr, NE_IO_EXTENT); | 331 | release_region(ioaddr, NE_IO_EXTENT); |
332 | return ret; | 332 | return ret; |
@@ -633,11 +633,8 @@ int init_module(void) | |||
633 | err = init_reg_offset(dev, dev->base_addr); | 633 | err = init_reg_offset(dev, dev->base_addr); |
634 | if (!err) { | 634 | if (!err) { |
635 | if (do_ne_probe(dev) == 0) { | 635 | if (do_ne_probe(dev) == 0) { |
636 | if (register_netdev(dev) == 0) { | 636 | dev_ne[found++] = dev; |
637 | dev_ne[found++] = dev; | 637 | continue; |
638 | continue; | ||
639 | } | ||
640 | cleanup_card(dev); | ||
641 | } | 638 | } |
642 | } | 639 | } |
643 | free_netdev(dev); | 640 | free_netdev(dev); |
diff --git a/drivers/net/ne.c b/drivers/net/ne.c index 496433902ade..d209a1556b2e 100644 --- a/drivers/net/ne.c +++ b/drivers/net/ne.c | |||
@@ -129,9 +129,9 @@ bad_clone_list[] __initdata = { | |||
129 | #define NESM_START_PG 0x40 /* First page of TX buffer */ | 129 | #define NESM_START_PG 0x40 /* First page of TX buffer */ |
130 | #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */ | 130 | #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */ |
131 | 131 | ||
132 | #ifdef CONFIG_PLAT_MAPPI | 132 | #if defined(CONFIG_PLAT_MAPPI) |
133 | # define DCR_VAL 0x4b | 133 | # define DCR_VAL 0x4b |
134 | #elif CONFIG_PLAT_OAKS32R | 134 | #elif defined(CONFIG_PLAT_OAKS32R) |
135 | # define DCR_VAL 0x48 | 135 | # define DCR_VAL 0x48 |
136 | #else | 136 | #else |
137 | # define DCR_VAL 0x49 | 137 | # define DCR_VAL 0x49 |
@@ -229,12 +229,7 @@ struct net_device * __init ne_probe(int unit) | |||
229 | err = do_ne_probe(dev); | 229 | err = do_ne_probe(dev); |
230 | if (err) | 230 | if (err) |
231 | goto out; | 231 | goto out; |
232 | err = register_netdev(dev); | ||
233 | if (err) | ||
234 | goto out1; | ||
235 | return dev; | 232 | return dev; |
236 | out1: | ||
237 | cleanup_card(dev); | ||
238 | out: | 233 | out: |
239 | free_netdev(dev); | 234 | free_netdev(dev); |
240 | return ERR_PTR(err); | 235 | return ERR_PTR(err); |
@@ -534,8 +529,14 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr) | |||
534 | dev->poll_controller = ei_poll; | 529 | dev->poll_controller = ei_poll; |
535 | #endif | 530 | #endif |
536 | NS8390_init(dev, 0); | 531 | NS8390_init(dev, 0); |
532 | |||
533 | ret = register_netdev(dev); | ||
534 | if (ret) | ||
535 | goto out_irq; | ||
537 | return 0; | 536 | return 0; |
538 | 537 | ||
538 | out_irq: | ||
539 | free_irq(dev->irq, dev); | ||
539 | err_out: | 540 | err_out: |
540 | release_region(ioaddr, NE_IO_EXTENT); | 541 | release_region(ioaddr, NE_IO_EXTENT); |
541 | return ret; | 542 | return ret; |
@@ -826,11 +827,8 @@ int init_module(void) | |||
826 | dev->mem_end = bad[this_dev]; | 827 | dev->mem_end = bad[this_dev]; |
827 | dev->base_addr = io[this_dev]; | 828 | dev->base_addr = io[this_dev]; |
828 | if (do_ne_probe(dev) == 0) { | 829 | if (do_ne_probe(dev) == 0) { |
829 | if (register_netdev(dev) == 0) { | 830 | dev_ne[found++] = dev; |
830 | dev_ne[found++] = dev; | 831 | continue; |
831 | continue; | ||
832 | } | ||
833 | cleanup_card(dev); | ||
834 | } | 832 | } |
835 | free_netdev(dev); | 833 | free_netdev(dev); |
836 | if (found) | 834 | if (found) |
diff --git a/drivers/net/ne2.c b/drivers/net/ne2.c index 6ebef27dbfae..6d62ada85de6 100644 --- a/drivers/net/ne2.c +++ b/drivers/net/ne2.c | |||
@@ -301,12 +301,7 @@ struct net_device * __init ne2_probe(int unit) | |||
301 | err = do_ne2_probe(dev); | 301 | err = do_ne2_probe(dev); |
302 | if (err) | 302 | if (err) |
303 | goto out; | 303 | goto out; |
304 | err = register_netdev(dev); | ||
305 | if (err) | ||
306 | goto out1; | ||
307 | return dev; | 304 | return dev; |
308 | out1: | ||
309 | cleanup_card(dev); | ||
310 | out: | 305 | out: |
311 | free_netdev(dev); | 306 | free_netdev(dev); |
312 | return ERR_PTR(err); | 307 | return ERR_PTR(err); |
@@ -517,7 +512,14 @@ static int __init ne2_probe1(struct net_device *dev, int slot) | |||
517 | dev->poll_controller = ei_poll; | 512 | dev->poll_controller = ei_poll; |
518 | #endif | 513 | #endif |
519 | NS8390_init(dev, 0); | 514 | NS8390_init(dev, 0); |
515 | |||
516 | retval = register_netdev(dev); | ||
517 | if (retval) | ||
518 | goto out1; | ||
520 | return 0; | 519 | return 0; |
520 | out1: | ||
521 | mca_set_adapter_procfn( ei_status.priv, NULL, NULL); | ||
522 | free_irq(dev->irq, dev); | ||
521 | out: | 523 | out: |
522 | release_region(base_addr, NE_IO_EXTENT); | 524 | release_region(base_addr, NE_IO_EXTENT); |
523 | return retval; | 525 | return retval; |
@@ -798,11 +800,8 @@ int init_module(void) | |||
798 | dev->mem_end = bad[this_dev]; | 800 | dev->mem_end = bad[this_dev]; |
799 | dev->base_addr = io[this_dev]; | 801 | dev->base_addr = io[this_dev]; |
800 | if (do_ne2_probe(dev) == 0) { | 802 | if (do_ne2_probe(dev) == 0) { |
801 | if (register_netdev(dev) == 0) { | 803 | dev_ne[found++] = dev; |
802 | dev_ne[found++] = dev; | 804 | continue; |
803 | continue; | ||
804 | } | ||
805 | cleanup_card(dev); | ||
806 | } | 805 | } |
807 | free_netdev(dev); | 806 | free_netdev(dev); |
808 | break; | 807 | break; |
diff --git a/drivers/net/ns83820.c b/drivers/net/ns83820.c index c336b46bd332..e64df4d0800b 100644 --- a/drivers/net/ns83820.c +++ b/drivers/net/ns83820.c | |||
@@ -101,6 +101,7 @@ | |||
101 | #include <linux/moduleparam.h> | 101 | #include <linux/moduleparam.h> |
102 | #include <linux/types.h> | 102 | #include <linux/types.h> |
103 | #include <linux/pci.h> | 103 | #include <linux/pci.h> |
104 | #include <linux/dma-mapping.h> | ||
104 | #include <linux/netdevice.h> | 105 | #include <linux/netdevice.h> |
105 | #include <linux/etherdevice.h> | 106 | #include <linux/etherdevice.h> |
106 | #include <linux/delay.h> | 107 | #include <linux/delay.h> |
@@ -573,7 +574,7 @@ static inline int ns83820_add_rx_skb(struct ns83820 *dev, struct sk_buff *skb) | |||
573 | 574 | ||
574 | dev->rx_info.next_empty = (next_empty + 1) % NR_RX_DESC; | 575 | dev->rx_info.next_empty = (next_empty + 1) % NR_RX_DESC; |
575 | cmdsts = REAL_RX_BUF_SIZE | CMDSTS_INTR; | 576 | cmdsts = REAL_RX_BUF_SIZE | CMDSTS_INTR; |
576 | buf = pci_map_single(dev->pci_dev, skb->tail, | 577 | buf = pci_map_single(dev->pci_dev, skb->data, |
577 | REAL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 578 | REAL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
578 | build_rx_desc(dev, sg, 0, buf, cmdsts, 0); | 579 | build_rx_desc(dev, sg, 0, buf, cmdsts, 0); |
579 | /* update link of previous rx */ | 580 | /* update link of previous rx */ |
@@ -603,7 +604,7 @@ static inline int rx_refill(struct net_device *ndev, int gfp) | |||
603 | if (unlikely(!skb)) | 604 | if (unlikely(!skb)) |
604 | break; | 605 | break; |
605 | 606 | ||
606 | res = (long)skb->tail & 0xf; | 607 | res = (long)skb->data & 0xf; |
607 | res = 0x10 - res; | 608 | res = 0x10 - res; |
608 | res &= 0xf; | 609 | res &= 0xf; |
609 | skb_reserve(skb, res); | 610 | skb_reserve(skb, res); |
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c index c6e8b25f9685..71fd41122c91 100644 --- a/drivers/net/pcmcia/3c574_cs.c +++ b/drivers/net/pcmcia/3c574_cs.c | |||
@@ -86,7 +86,6 @@ earlier 3Com products. | |||
86 | #include <linux/ethtool.h> | 86 | #include <linux/ethtool.h> |
87 | #include <linux/bitops.h> | 87 | #include <linux/bitops.h> |
88 | 88 | ||
89 | #include <pcmcia/version.h> | ||
90 | #include <pcmcia/cs_types.h> | 89 | #include <pcmcia/cs_types.h> |
91 | #include <pcmcia/cs.h> | 90 | #include <pcmcia/cs.h> |
92 | #include <pcmcia/cistpl.h> | 91 | #include <pcmcia/cistpl.h> |
@@ -312,11 +311,6 @@ static dev_link_t *tc574_attach(void) | |||
312 | link->next = dev_list; | 311 | link->next = dev_list; |
313 | dev_list = link; | 312 | dev_list = link; |
314 | client_reg.dev_info = &dev_info; | 313 | client_reg.dev_info = &dev_info; |
315 | client_reg.EventMask = | ||
316 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
317 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
318 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
319 | client_reg.event_handler = &tc574_event; | ||
320 | client_reg.Version = 0x0210; | 314 | client_reg.Version = 0x0210; |
321 | client_reg.event_callback_args.client_data = link; | 315 | client_reg.event_callback_args.client_data = link; |
322 | ret = pcmcia_register_client(&link->handle, &client_reg); | 316 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -1286,13 +1280,22 @@ static int el3_close(struct net_device *dev) | |||
1286 | return 0; | 1280 | return 0; |
1287 | } | 1281 | } |
1288 | 1282 | ||
1283 | static struct pcmcia_device_id tc574_ids[] = { | ||
1284 | PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0574), | ||
1285 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x0556, "3CCFEM556.cis"), | ||
1286 | PCMCIA_DEVICE_NULL, | ||
1287 | }; | ||
1288 | MODULE_DEVICE_TABLE(pcmcia, tc574_ids); | ||
1289 | |||
1289 | static struct pcmcia_driver tc574_driver = { | 1290 | static struct pcmcia_driver tc574_driver = { |
1290 | .owner = THIS_MODULE, | 1291 | .owner = THIS_MODULE, |
1291 | .drv = { | 1292 | .drv = { |
1292 | .name = "3c574_cs", | 1293 | .name = "3c574_cs", |
1293 | }, | 1294 | }, |
1294 | .attach = tc574_attach, | 1295 | .attach = tc574_attach, |
1296 | .event = tc574_event, | ||
1295 | .detach = tc574_detach, | 1297 | .detach = tc574_detach, |
1298 | .id_table = tc574_ids, | ||
1296 | }; | 1299 | }; |
1297 | 1300 | ||
1298 | static int __init init_tc574(void) | 1301 | static int __init init_tc574(void) |
diff --git a/drivers/net/pcmcia/3c589_cs.c b/drivers/net/pcmcia/3c589_cs.c index 89abdda1d343..d83fdd8c1943 100644 --- a/drivers/net/pcmcia/3c589_cs.c +++ b/drivers/net/pcmcia/3c589_cs.c | |||
@@ -40,7 +40,6 @@ | |||
40 | #include <linux/ioport.h> | 40 | #include <linux/ioport.h> |
41 | #include <linux/bitops.h> | 41 | #include <linux/bitops.h> |
42 | 42 | ||
43 | #include <pcmcia/version.h> | ||
44 | #include <pcmcia/cs_types.h> | 43 | #include <pcmcia/cs_types.h> |
45 | #include <pcmcia/cs.h> | 44 | #include <pcmcia/cs.h> |
46 | #include <pcmcia/cistpl.h> | 45 | #include <pcmcia/cistpl.h> |
@@ -226,11 +225,6 @@ static dev_link_t *tc589_attach(void) | |||
226 | link->next = dev_list; | 225 | link->next = dev_list; |
227 | dev_list = link; | 226 | dev_list = link; |
228 | client_reg.dev_info = &dev_info; | 227 | client_reg.dev_info = &dev_info; |
229 | client_reg.EventMask = | ||
230 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
231 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
232 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
233 | client_reg.event_handler = &tc589_event; | ||
234 | client_reg.Version = 0x0210; | 228 | client_reg.Version = 0x0210; |
235 | client_reg.event_callback_args.client_data = link; | 229 | client_reg.event_callback_args.client_data = link; |
236 | ret = pcmcia_register_client(&link->handle, &client_reg); | 230 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -1057,13 +1051,26 @@ static int el3_close(struct net_device *dev) | |||
1057 | return 0; | 1051 | return 0; |
1058 | } | 1052 | } |
1059 | 1053 | ||
1054 | static struct pcmcia_device_id tc589_ids[] = { | ||
1055 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x0101, 0x0562), | ||
1056 | PCMCIA_MFC_DEVICE_PROD_ID1(0, "Motorola MARQUIS", 0xf03e4e77), | ||
1057 | PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0589), | ||
1058 | PCMCIA_DEVICE_PROD_ID12("Farallon", "ENet", 0x58d93fc4, 0x992c2202), | ||
1059 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x0035, "3CXEM556.cis"), | ||
1060 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0101, 0x003d, "3CXEM556.cis"), | ||
1061 | PCMCIA_DEVICE_NULL, | ||
1062 | }; | ||
1063 | MODULE_DEVICE_TABLE(pcmcia, tc589_ids); | ||
1064 | |||
1060 | static struct pcmcia_driver tc589_driver = { | 1065 | static struct pcmcia_driver tc589_driver = { |
1061 | .owner = THIS_MODULE, | 1066 | .owner = THIS_MODULE, |
1062 | .drv = { | 1067 | .drv = { |
1063 | .name = "3c589_cs", | 1068 | .name = "3c589_cs", |
1064 | }, | 1069 | }, |
1065 | .attach = tc589_attach, | 1070 | .attach = tc589_attach, |
1071 | .event = tc589_event, | ||
1066 | .detach = tc589_detach, | 1072 | .detach = tc589_detach, |
1073 | .id_table = tc589_ids, | ||
1067 | }; | 1074 | }; |
1068 | 1075 | ||
1069 | static int __init init_tc589(void) | 1076 | static int __init init_tc589(void) |
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c index 853b586e481a..8bb4e85689ea 100644 --- a/drivers/net/pcmcia/axnet_cs.c +++ b/drivers/net/pcmcia/axnet_cs.c | |||
@@ -37,7 +37,6 @@ | |||
37 | #include <linux/netdevice.h> | 37 | #include <linux/netdevice.h> |
38 | #include "../8390.h" | 38 | #include "../8390.h" |
39 | 39 | ||
40 | #include <pcmcia/version.h> | ||
41 | #include <pcmcia/cs_types.h> | 40 | #include <pcmcia/cs_types.h> |
42 | #include <pcmcia/cs.h> | 41 | #include <pcmcia/cs.h> |
43 | #include <pcmcia/cistpl.h> | 42 | #include <pcmcia/cistpl.h> |
@@ -181,11 +180,6 @@ static dev_link_t *axnet_attach(void) | |||
181 | link->next = dev_list; | 180 | link->next = dev_list; |
182 | dev_list = link; | 181 | dev_list = link; |
183 | client_reg.dev_info = &dev_info; | 182 | client_reg.dev_info = &dev_info; |
184 | client_reg.EventMask = | ||
185 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
186 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
187 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
188 | client_reg.event_handler = &axnet_event; | ||
189 | client_reg.Version = 0x0210; | 183 | client_reg.Version = 0x0210; |
190 | client_reg.event_callback_args.client_data = link; | 184 | client_reg.event_callback_args.client_data = link; |
191 | ret = pcmcia_register_client(&link->handle, &client_reg); | 185 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -850,13 +844,43 @@ static void block_output(struct net_device *dev, int count, | |||
850 | outsw(nic_base + AXNET_DATAPORT, buf, count>>1); | 844 | outsw(nic_base + AXNET_DATAPORT, buf, count>>1); |
851 | } | 845 | } |
852 | 846 | ||
847 | static struct pcmcia_device_id axnet_ids[] = { | ||
848 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x016c, 0x0081), | ||
849 | PCMCIA_DEVICE_MANF_CARD(0x018a, 0x0301), | ||
850 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0301), | ||
851 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0303), | ||
852 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0309), | ||
853 | PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1106), | ||
854 | PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), | ||
855 | PCMCIA_DEVICE_PROD_ID124("Fast Ethernet", "16-bit PC Card", "AX88190", 0xb4be14e3, 0x9a12eb6a, 0xab9be5ef), | ||
856 | PCMCIA_DEVICE_PROD_ID12("ASIX", "AX88190", 0x0959823b, 0xab9be5ef), | ||
857 | PCMCIA_DEVICE_PROD_ID12("Billionton", "LNA-100B", 0x552ab682, 0xbc3b87e1), | ||
858 | PCMCIA_DEVICE_PROD_ID12("CHEETAH ETHERCARD", "EN2228", 0x00fa7bc8, 0x00e990cc), | ||
859 | PCMCIA_DEVICE_PROD_ID12("CNet", "CNF301", 0xbc477dde, 0x78c5f40b), | ||
860 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FEther PCC-TXD", 0x5261440f, 0x436768c5), | ||
861 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FEtherII PCC-TXD", 0x5261440f, 0x730df72e), | ||
862 | PCMCIA_DEVICE_PROD_ID12("Dynalink", "L100C16", 0x55632fd5, 0x66bc2a90), | ||
863 | PCMCIA_DEVICE_PROD_ID12("Linksys", "EtherFast 10/100 PC Card (PCMPC100 V3)", 0x0733cc81, 0x232019a8), | ||
864 | PCMCIA_DEVICE_PROD_ID12("MELCO", "LPC3-TX", 0x481e0094, 0xf91af609), | ||
865 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "100BASE", 0x281f1c5d, 0x7c2add04), | ||
866 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "FastEtherCard", 0x281f1c5d, 0x7ef26116), | ||
867 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "FEP501", 0x281f1c5d, 0x2e272058), | ||
868 | PCMCIA_DEVICE_PROD_ID14("Network Everywhere", "AX88190", 0x820a67b6, 0xab9be5ef), | ||
869 | /* this is not specific enough */ | ||
870 | /* PCMCIA_DEVICE_MANF_CARD(0x021b, 0x0202), */ | ||
871 | PCMCIA_DEVICE_NULL, | ||
872 | }; | ||
873 | MODULE_DEVICE_TABLE(pcmcia, axnet_ids); | ||
874 | |||
853 | static struct pcmcia_driver axnet_cs_driver = { | 875 | static struct pcmcia_driver axnet_cs_driver = { |
854 | .owner = THIS_MODULE, | 876 | .owner = THIS_MODULE, |
855 | .drv = { | 877 | .drv = { |
856 | .name = "axnet_cs", | 878 | .name = "axnet_cs", |
857 | }, | 879 | }, |
858 | .attach = axnet_attach, | 880 | .attach = axnet_attach, |
881 | .event = axnet_event, | ||
859 | .detach = axnet_detach, | 882 | .detach = axnet_detach, |
883 | .id_table = axnet_ids, | ||
860 | }; | 884 | }; |
861 | 885 | ||
862 | static int __init init_axnet_cs(void) | 886 | static int __init init_axnet_cs(void) |
diff --git a/drivers/net/pcmcia/com20020_cs.c b/drivers/net/pcmcia/com20020_cs.c index 4294e1e3f156..b9355d9498a3 100644 --- a/drivers/net/pcmcia/com20020_cs.c +++ b/drivers/net/pcmcia/com20020_cs.c | |||
@@ -43,7 +43,6 @@ | |||
43 | #include <linux/arcdevice.h> | 43 | #include <linux/arcdevice.h> |
44 | #include <linux/com20020.h> | 44 | #include <linux/com20020.h> |
45 | 45 | ||
46 | #include <pcmcia/version.h> | ||
47 | #include <pcmcia/cs_types.h> | 46 | #include <pcmcia/cs_types.h> |
48 | #include <pcmcia/cs.h> | 47 | #include <pcmcia/cs.h> |
49 | #include <pcmcia/cistpl.h> | 48 | #include <pcmcia/cistpl.h> |
@@ -200,11 +199,6 @@ static dev_link_t *com20020_attach(void) | |||
200 | link->next = dev_list; | 199 | link->next = dev_list; |
201 | dev_list = link; | 200 | dev_list = link; |
202 | client_reg.dev_info = &dev_info; | 201 | client_reg.dev_info = &dev_info; |
203 | client_reg.EventMask = | ||
204 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
205 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
206 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
207 | client_reg.event_handler = &com20020_event; | ||
208 | client_reg.Version = 0x0210; | 202 | client_reg.Version = 0x0210; |
209 | client_reg.event_callback_args.client_data = link; | 203 | client_reg.event_callback_args.client_data = link; |
210 | ret = pcmcia_register_client(&link->handle, &client_reg); | 204 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -483,7 +477,11 @@ static int com20020_event(event_t event, int priority, | |||
483 | return 0; | 477 | return 0; |
484 | } /* com20020_event */ | 478 | } /* com20020_event */ |
485 | 479 | ||
486 | 480 | static struct pcmcia_device_id com20020_ids[] = { | |
481 | PCMCIA_DEVICE_PROD_ID12("Contemporary Control Systems, Inc.", "PCM20 Arcnet Adapter", 0x59991666, 0x95dfffaf), | ||
482 | PCMCIA_DEVICE_NULL | ||
483 | }; | ||
484 | MODULE_DEVICE_TABLE(pcmcia, com20020_ids); | ||
487 | 485 | ||
488 | static struct pcmcia_driver com20020_cs_driver = { | 486 | static struct pcmcia_driver com20020_cs_driver = { |
489 | .owner = THIS_MODULE, | 487 | .owner = THIS_MODULE, |
@@ -491,7 +489,9 @@ static struct pcmcia_driver com20020_cs_driver = { | |||
491 | .name = "com20020_cs", | 489 | .name = "com20020_cs", |
492 | }, | 490 | }, |
493 | .attach = com20020_attach, | 491 | .attach = com20020_attach, |
492 | .event = com20020_event, | ||
494 | .detach = com20020_detach, | 493 | .detach = com20020_detach, |
494 | .id_table = com20020_ids, | ||
495 | }; | 495 | }; |
496 | 496 | ||
497 | static int __init init_com20020_cs(void) | 497 | static int __init init_com20020_cs(void) |
diff --git a/drivers/net/pcmcia/fmvj18x_cs.c b/drivers/net/pcmcia/fmvj18x_cs.c index 0424865e8094..9d8197bb293a 100644 --- a/drivers/net/pcmcia/fmvj18x_cs.c +++ b/drivers/net/pcmcia/fmvj18x_cs.c | |||
@@ -49,7 +49,6 @@ | |||
49 | #include <linux/ioport.h> | 49 | #include <linux/ioport.h> |
50 | #include <linux/crc32.h> | 50 | #include <linux/crc32.h> |
51 | 51 | ||
52 | #include <pcmcia/version.h> | ||
53 | #include <pcmcia/cs_types.h> | 52 | #include <pcmcia/cs_types.h> |
54 | #include <pcmcia/cs.h> | 53 | #include <pcmcia/cs.h> |
55 | #include <pcmcia/cistpl.h> | 54 | #include <pcmcia/cistpl.h> |
@@ -288,11 +287,6 @@ static dev_link_t *fmvj18x_attach(void) | |||
288 | link->next = dev_list; | 287 | link->next = dev_list; |
289 | dev_list = link; | 288 | dev_list = link; |
290 | client_reg.dev_info = &dev_info; | 289 | client_reg.dev_info = &dev_info; |
291 | client_reg.EventMask = | ||
292 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
293 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
294 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
295 | client_reg.event_handler = &fmvj18x_event; | ||
296 | client_reg.Version = 0x0210; | 290 | client_reg.Version = 0x0210; |
297 | client_reg.event_callback_args.client_data = link; | 291 | client_reg.event_callback_args.client_data = link; |
298 | ret = pcmcia_register_client(&link->handle, &client_reg); | 292 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -435,7 +429,9 @@ static void fmvj18x_config(dev_link_t *link) | |||
435 | pcmcia_get_status(handle, &status); | 429 | pcmcia_get_status(handle, &status); |
436 | if (status.CardState & CS_EVENT_3VCARD) | 430 | if (status.CardState & CS_EVENT_3VCARD) |
437 | link->conf.Vcc = 33; /* inserted in 3.3V slot */ | 431 | link->conf.Vcc = 33; /* inserted in 3.3V slot */ |
438 | } else if (le16_to_cpu(buf[1]) == PRODID_TDK_GN3410) { | 432 | } else if (le16_to_cpu(buf[1]) == PRODID_TDK_GN3410 |
433 | || le16_to_cpu(buf[1]) == PRODID_TDK_NP9610 | ||
434 | || le16_to_cpu(buf[1]) == PRODID_TDK_MN3200) { | ||
439 | /* MultiFunction Card */ | 435 | /* MultiFunction Card */ |
440 | link->conf.ConfigBase = 0x800; | 436 | link->conf.ConfigBase = 0x800; |
441 | link->conf.ConfigIndex = 0x47; | 437 | link->conf.ConfigIndex = 0x47; |
@@ -764,13 +760,40 @@ static int fmvj18x_event(event_t event, int priority, | |||
764 | return 0; | 760 | return 0; |
765 | } /* fmvj18x_event */ | 761 | } /* fmvj18x_event */ |
766 | 762 | ||
763 | static struct pcmcia_device_id fmvj18x_ids[] = { | ||
764 | PCMCIA_DEVICE_MANF_CARD(0x0004, 0x0004), | ||
765 | PCMCIA_DEVICE_PROD_ID12("EAGLE Technology", "NE200 ETHERNET LAN MBH10302 04", 0x528c88c4, 0x74f91e59), | ||
766 | PCMCIA_DEVICE_PROD_ID12("Eiger Labs,Inc", "EPX-10BT PC Card Ethernet 10BT", 0x53af556e, 0x877f9922), | ||
767 | PCMCIA_DEVICE_PROD_ID12("Eiger labs,Inc.", "EPX-10BT PC Card Ethernet 10BT", 0xf47e6c66, 0x877f9922), | ||
768 | PCMCIA_DEVICE_PROD_ID12("FUJITSU", "LAN Card(FMV-J182)", 0x6ee5a3d8, 0x5baf31db), | ||
769 | PCMCIA_DEVICE_PROD_ID12("FUJITSU", "MBH10308", 0x6ee5a3d8, 0x3f04875e), | ||
770 | PCMCIA_DEVICE_PROD_ID12("FUJITSU TOWA", "LA501", 0xb8451188, 0x12939ba2), | ||
771 | PCMCIA_DEVICE_PROD_ID12("HITACHI", "HT-4840-11", 0xf4f43949, 0x773910f4), | ||
772 | PCMCIA_DEVICE_PROD_ID12("NextComK.K.", "NC5310B Ver1.0 ", 0x8cef4d3a, 0x075fc7b6), | ||
773 | PCMCIA_DEVICE_PROD_ID12("NextComK.K.", "NC5310 Ver1.0 ", 0x8cef4d3a, 0xbccf43e6), | ||
774 | PCMCIA_DEVICE_PROD_ID12("RATOC System Inc.", "10BASE_T CARD R280", 0x85c10e17, 0xd9413666), | ||
775 | PCMCIA_DEVICE_PROD_ID12("TDK", "LAC-CD02x", 0x1eae9475, 0x8fa0ee70), | ||
776 | PCMCIA_DEVICE_PROD_ID12("TDK", "LAC-CF010", 0x1eae9475, 0x7683bc9a), | ||
777 | PCMCIA_DEVICE_PROD_ID1("CONTEC Co.,Ltd.", 0x58d8fee2), | ||
778 | PCMCIA_DEVICE_PROD_ID1("PCMCIA LAN MBH10304 ES", 0x2599f454), | ||
779 | PCMCIA_DEVICE_PROD_ID1("PCMCIA MBH10302", 0x8f4005da), | ||
780 | PCMCIA_DEVICE_PROD_ID1("UBKK,V2.0", 0x90888080), | ||
781 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "TDK", "GlobalNetworker 3410/3412", 0x1eae9475, 0xd9a93bed), | ||
782 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0d0a), | ||
783 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0x0e0a), | ||
784 | PCMCIA_DEVICE_NULL, | ||
785 | }; | ||
786 | MODULE_DEVICE_TABLE(pcmcia, fmvj18x_ids); | ||
787 | |||
767 | static struct pcmcia_driver fmvj18x_cs_driver = { | 788 | static struct pcmcia_driver fmvj18x_cs_driver = { |
768 | .owner = THIS_MODULE, | 789 | .owner = THIS_MODULE, |
769 | .drv = { | 790 | .drv = { |
770 | .name = "fmvj18x_cs", | 791 | .name = "fmvj18x_cs", |
771 | }, | 792 | }, |
772 | .attach = fmvj18x_attach, | 793 | .attach = fmvj18x_attach, |
794 | .event = fmvj18x_event, | ||
773 | .detach = fmvj18x_detach, | 795 | .detach = fmvj18x_detach, |
796 | .id_table = fmvj18x_ids, | ||
774 | }; | 797 | }; |
775 | 798 | ||
776 | static int __init init_fmvj18x_cs(void) | 799 | static int __init init_fmvj18x_cs(void) |
diff --git a/drivers/net/pcmcia/ibmtr_cs.c b/drivers/net/pcmcia/ibmtr_cs.c index 3107ccfe8f3d..b6c140eb9799 100644 --- a/drivers/net/pcmcia/ibmtr_cs.c +++ b/drivers/net/pcmcia/ibmtr_cs.c | |||
@@ -57,7 +57,6 @@ | |||
57 | #include <linux/trdevice.h> | 57 | #include <linux/trdevice.h> |
58 | #include <linux/ibmtr.h> | 58 | #include <linux/ibmtr.h> |
59 | 59 | ||
60 | #include <pcmcia/version.h> | ||
61 | #include <pcmcia/cs_types.h> | 60 | #include <pcmcia/cs_types.h> |
62 | #include <pcmcia/cs.h> | 61 | #include <pcmcia/cs.h> |
63 | #include <pcmcia/cistpl.h> | 62 | #include <pcmcia/cistpl.h> |
@@ -119,9 +118,6 @@ static void ibmtr_detach(dev_link_t *); | |||
119 | 118 | ||
120 | static dev_link_t *dev_list; | 119 | static dev_link_t *dev_list; |
121 | 120 | ||
122 | extern int ibmtr_probe_card(struct net_device *dev); | ||
123 | extern irqreturn_t tok_interrupt (int irq, void *dev_id, struct pt_regs *regs); | ||
124 | |||
125 | /*====================================================================*/ | 121 | /*====================================================================*/ |
126 | 122 | ||
127 | typedef struct ibmtr_dev_t { | 123 | typedef struct ibmtr_dev_t { |
@@ -193,11 +189,6 @@ static dev_link_t *ibmtr_attach(void) | |||
193 | link->next = dev_list; | 189 | link->next = dev_list; |
194 | dev_list = link; | 190 | dev_list = link; |
195 | client_reg.dev_info = &dev_info; | 191 | client_reg.dev_info = &dev_info; |
196 | client_reg.EventMask = | ||
197 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
198 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
199 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
200 | client_reg.event_handler = &ibmtr_event; | ||
201 | client_reg.Version = 0x0210; | 192 | client_reg.Version = 0x0210; |
202 | client_reg.event_callback_args.client_data = link; | 193 | client_reg.event_callback_args.client_data = link; |
203 | ret = pcmcia_register_client(&link->handle, &client_reg); | 194 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -511,13 +502,22 @@ static void ibmtr_hw_setup(struct net_device *dev, u_int mmiobase) | |||
511 | return; | 502 | return; |
512 | } | 503 | } |
513 | 504 | ||
505 | static struct pcmcia_device_id ibmtr_ids[] = { | ||
506 | PCMCIA_DEVICE_PROD_ID12("3Com", "TokenLink Velocity PC Card", 0x41240e5b, 0x82c3734e), | ||
507 | PCMCIA_DEVICE_PROD_ID12("IBM", "TOKEN RING", 0xb569a6e5, 0xbf8eed47), | ||
508 | PCMCIA_DEVICE_NULL, | ||
509 | }; | ||
510 | MODULE_DEVICE_TABLE(pcmcia, ibmtr_ids); | ||
511 | |||
514 | static struct pcmcia_driver ibmtr_cs_driver = { | 512 | static struct pcmcia_driver ibmtr_cs_driver = { |
515 | .owner = THIS_MODULE, | 513 | .owner = THIS_MODULE, |
516 | .drv = { | 514 | .drv = { |
517 | .name = "ibmtr_cs", | 515 | .name = "ibmtr_cs", |
518 | }, | 516 | }, |
519 | .attach = ibmtr_attach, | 517 | .attach = ibmtr_attach, |
518 | .event = ibmtr_event, | ||
520 | .detach = ibmtr_detach, | 519 | .detach = ibmtr_detach, |
520 | .id_table = ibmtr_ids, | ||
521 | }; | 521 | }; |
522 | 522 | ||
523 | static int __init init_ibmtr_cs(void) | 523 | static int __init init_ibmtr_cs(void) |
diff --git a/drivers/net/pcmcia/nmclan_cs.c b/drivers/net/pcmcia/nmclan_cs.c index 4603807fcafb..dbb941004ae9 100644 --- a/drivers/net/pcmcia/nmclan_cs.c +++ b/drivers/net/pcmcia/nmclan_cs.c | |||
@@ -146,7 +146,6 @@ Include Files | |||
146 | #include <linux/ioport.h> | 146 | #include <linux/ioport.h> |
147 | #include <linux/bitops.h> | 147 | #include <linux/bitops.h> |
148 | 148 | ||
149 | #include <pcmcia/version.h> | ||
150 | #include <pcmcia/cs_types.h> | 149 | #include <pcmcia/cs_types.h> |
151 | #include <pcmcia/cs.h> | 150 | #include <pcmcia/cs.h> |
152 | #include <pcmcia/cisreg.h> | 151 | #include <pcmcia/cisreg.h> |
@@ -502,11 +501,6 @@ static dev_link_t *nmclan_attach(void) | |||
502 | link->next = dev_list; | 501 | link->next = dev_list; |
503 | dev_list = link; | 502 | dev_list = link; |
504 | client_reg.dev_info = &dev_info; | 503 | client_reg.dev_info = &dev_info; |
505 | client_reg.EventMask = | ||
506 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
507 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
508 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
509 | client_reg.event_handler = &nmclan_event; | ||
510 | client_reg.Version = 0x0210; | 504 | client_reg.Version = 0x0210; |
511 | client_reg.event_callback_args.client_data = link; | 505 | client_reg.event_callback_args.client_data = link; |
512 | ret = pcmcia_register_client(&link->handle, &client_reg); | 506 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -1675,13 +1669,22 @@ static void set_multicast_list(struct net_device *dev) | |||
1675 | 1669 | ||
1676 | } /* set_multicast_list */ | 1670 | } /* set_multicast_list */ |
1677 | 1671 | ||
1672 | static struct pcmcia_device_id nmclan_ids[] = { | ||
1673 | PCMCIA_DEVICE_PROD_ID12("New Media Corporation", "Ethernet", 0x085a850b, 0x00b2e941), | ||
1674 | PCMCIA_DEVICE_PROD_ID12("Portable Add-ons", "Ethernet", 0x0ebf1d60, 0x00b2e941), | ||
1675 | PCMCIA_DEVICE_NULL, | ||
1676 | }; | ||
1677 | MODULE_DEVICE_TABLE(pcmcia, nmclan_ids); | ||
1678 | |||
1678 | static struct pcmcia_driver nmclan_cs_driver = { | 1679 | static struct pcmcia_driver nmclan_cs_driver = { |
1679 | .owner = THIS_MODULE, | 1680 | .owner = THIS_MODULE, |
1680 | .drv = { | 1681 | .drv = { |
1681 | .name = "nmclan_cs", | 1682 | .name = "nmclan_cs", |
1682 | }, | 1683 | }, |
1683 | .attach = nmclan_attach, | 1684 | .attach = nmclan_attach, |
1685 | .event = nmclan_event, | ||
1684 | .detach = nmclan_detach, | 1686 | .detach = nmclan_detach, |
1687 | .id_table = nmclan_ids, | ||
1685 | }; | 1688 | }; |
1686 | 1689 | ||
1687 | static int __init init_nmclan_cs(void) | 1690 | static int __init init_nmclan_cs(void) |
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index b0126304ca08..e1664aef3dfd 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -40,7 +40,6 @@ | |||
40 | #include <linux/netdevice.h> | 40 | #include <linux/netdevice.h> |
41 | #include <../drivers/net/8390.h> | 41 | #include <../drivers/net/8390.h> |
42 | 42 | ||
43 | #include <pcmcia/version.h> | ||
44 | #include <pcmcia/cs_types.h> | 43 | #include <pcmcia/cs_types.h> |
45 | #include <pcmcia/cs.h> | 44 | #include <pcmcia/cs.h> |
46 | #include <pcmcia/cistpl.h> | 45 | #include <pcmcia/cistpl.h> |
@@ -276,11 +275,6 @@ static dev_link_t *pcnet_attach(void) | |||
276 | link->next = dev_list; | 275 | link->next = dev_list; |
277 | dev_list = link; | 276 | dev_list = link; |
278 | client_reg.dev_info = &dev_info; | 277 | client_reg.dev_info = &dev_info; |
279 | client_reg.EventMask = | ||
280 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
281 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
282 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
283 | client_reg.event_handler = &pcnet_event; | ||
284 | client_reg.Version = 0x0210; | 278 | client_reg.Version = 0x0210; |
285 | client_reg.event_callback_args.client_data = link; | 279 | client_reg.event_callback_args.client_data = link; |
286 | ret = pcmcia_register_client(&link->handle, &client_reg); | 280 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -1155,11 +1149,13 @@ static int set_config(struct net_device *dev, struct ifmap *map) | |||
1155 | static irqreturn_t ei_irq_wrapper(int irq, void *dev_id, struct pt_regs *regs) | 1149 | static irqreturn_t ei_irq_wrapper(int irq, void *dev_id, struct pt_regs *regs) |
1156 | { | 1150 | { |
1157 | struct net_device *dev = dev_id; | 1151 | struct net_device *dev = dev_id; |
1158 | pcnet_dev_t *info = PRIV(dev); | 1152 | pcnet_dev_t *info; |
1159 | irqreturn_t ret = ei_interrupt(irq, dev_id, regs); | 1153 | irqreturn_t ret = ei_interrupt(irq, dev_id, regs); |
1160 | 1154 | ||
1161 | if (ret == IRQ_HANDLED) | 1155 | if (ret == IRQ_HANDLED) { |
1156 | info = PRIV(dev); | ||
1162 | info->stale = 0; | 1157 | info->stale = 0; |
1158 | } | ||
1163 | return ret; | 1159 | return ret; |
1164 | } | 1160 | } |
1165 | 1161 | ||
@@ -1350,7 +1346,7 @@ static void dma_block_input(struct net_device *dev, int count, | |||
1350 | if (count & 0x01) | 1346 | if (count & 0x01) |
1351 | buf[count-1] = inb(nic_base + PCNET_DATAPORT), xfer_count++; | 1347 | buf[count-1] = inb(nic_base + PCNET_DATAPORT), xfer_count++; |
1352 | 1348 | ||
1353 | /* This was for the ALPHA version only, but enough people have | 1349 | /* This was for the ALPHA version only, but enough people have been |
1354 | encountering problems that it is still here. */ | 1350 | encountering problems that it is still here. */ |
1355 | #ifdef PCMCIA_DEBUG | 1351 | #ifdef PCMCIA_DEBUG |
1356 | if (ei_debug > 4) { /* DMA termination address check... */ | 1352 | if (ei_debug > 4) { /* DMA termination address check... */ |
@@ -1424,7 +1420,7 @@ static void dma_block_output(struct net_device *dev, int count, | |||
1424 | dma_start = jiffies; | 1420 | dma_start = jiffies; |
1425 | 1421 | ||
1426 | #ifdef PCMCIA_DEBUG | 1422 | #ifdef PCMCIA_DEBUG |
1427 | /* This was for the ALPHA version only, but enough people have | 1423 | /* This was for the ALPHA version only, but enough people have been |
1428 | encountering problems that it is still here. */ | 1424 | encountering problems that it is still here. */ |
1429 | if (ei_debug > 4) { /* DMA termination address check... */ | 1425 | if (ei_debug > 4) { /* DMA termination address check... */ |
1430 | int addr, tries = 20; | 1426 | int addr, tries = 20; |
@@ -1537,20 +1533,20 @@ static void shmem_get_8390_hdr(struct net_device *dev, | |||
1537 | static void shmem_block_input(struct net_device *dev, int count, | 1533 | static void shmem_block_input(struct net_device *dev, int count, |
1538 | struct sk_buff *skb, int ring_offset) | 1534 | struct sk_buff *skb, int ring_offset) |
1539 | { | 1535 | { |
1540 | void __iomem *xfer_start = ei_status.mem + (TX_PAGES<<8) | 1536 | void __iomem *base = ei_status.mem; |
1541 | + ring_offset | 1537 | unsigned long offset = (TX_PAGES<<8) + ring_offset |
1542 | - (ei_status.rx_start_page << 8); | 1538 | - (ei_status.rx_start_page << 8); |
1543 | char *buf = skb->data; | 1539 | char *buf = skb->data; |
1544 | 1540 | ||
1545 | if (xfer_start + count > (void __iomem *)ei_status.rmem_end) { | 1541 | if (offset + count > ei_status.priv) { |
1546 | /* We must wrap the input move. */ | 1542 | /* We must wrap the input move. */ |
1547 | int semi_count = (void __iomem *)ei_status.rmem_end - xfer_start; | 1543 | int semi_count = ei_status.priv - offset; |
1548 | copyin(buf, xfer_start, semi_count); | 1544 | copyin(buf, base + offset, semi_count); |
1549 | buf += semi_count; | 1545 | buf += semi_count; |
1550 | xfer_start = ei_status.mem + (TX_PAGES<<8); | 1546 | offset = TX_PAGES<<8; |
1551 | count -= semi_count; | 1547 | count -= semi_count; |
1552 | } | 1548 | } |
1553 | copyin(buf, xfer_start, count); | 1549 | copyin(buf, base + offset, count); |
1554 | } | 1550 | } |
1555 | 1551 | ||
1556 | /*====================================================================*/ | 1552 | /*====================================================================*/ |
@@ -1611,8 +1607,9 @@ static int setup_shmem_window(dev_link_t *link, int start_pg, | |||
1611 | } | 1607 | } |
1612 | 1608 | ||
1613 | ei_status.mem = info->base + offset; | 1609 | ei_status.mem = info->base + offset; |
1610 | ei_status.priv = req.Size; | ||
1614 | dev->mem_start = (u_long)ei_status.mem; | 1611 | dev->mem_start = (u_long)ei_status.mem; |
1615 | dev->mem_end = ei_status.rmem_end = (u_long)info->base + req.Size; | 1612 | dev->mem_end = dev->mem_start + req.Size; |
1616 | 1613 | ||
1617 | ei_status.tx_start_page = start_pg; | 1614 | ei_status.tx_start_page = start_pg; |
1618 | ei_status.rx_start_page = start_pg + TX_PAGES; | 1615 | ei_status.rx_start_page = start_pg + TX_PAGES; |
@@ -1634,13 +1631,217 @@ failed: | |||
1634 | 1631 | ||
1635 | /*====================================================================*/ | 1632 | /*====================================================================*/ |
1636 | 1633 | ||
1634 | static struct pcmcia_device_id pcnet_ids[] = { | ||
1635 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0057, 0x0021), | ||
1636 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0104, 0x000a), | ||
1637 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0105, 0xea15), | ||
1638 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0143, 0x3341), | ||
1639 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0143, 0xc0ab), | ||
1640 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x021b, 0x0101), | ||
1641 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x08a1, 0xc0ab), | ||
1642 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "AnyCom", "Fast Ethernet ", 0x578ba6e7, 0x02d92d1e), | ||
1643 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "D-Link", "DME336T", 0x1a424a1c, 0xb23897ff), | ||
1644 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Grey Cell", "GCS3000", 0x2a151fac, 0x48b932ae), | ||
1645 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Linksys", "EtherFast 10&100 + 56K PC Card (PCMLM56)", 0x0733cc81, 0xb3765033), | ||
1646 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "LINKSYS", "PCMLM336", 0xf7cb0b07, 0x7a821b58), | ||
1647 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "PCMCIAs", "ComboCard", 0xdcfe12d3, 0xcd8906cc), | ||
1648 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "PCMCIAs", "LanModem", 0xdcfe12d3, 0xc67c648f), | ||
1649 | PCMCIA_MFC_DEVICE_PROD_ID12(0, "IBM", "Home and Away 28.8 PC Card ", 0xb569a6e5, 0x5bd4ff2c), | ||
1650 | PCMCIA_MFC_DEVICE_PROD_ID12(0, "IBM", "Home and Away Credit Card Adapter", 0xb569a6e5, 0x4bdf15c3), | ||
1651 | PCMCIA_MFC_DEVICE_PROD_ID12(0, "IBM", "w95 Home and Away Credit Card ", 0xb569a6e5, 0xae911c15), | ||
1652 | PCMCIA_MFC_DEVICE_PROD_ID123(0, "APEX DATA", "MULTICARD", "ETHERNET-MODEM", 0x11c2da09, 0x7289dc5d, 0xaad95e1f), | ||
1653 | PCMCIA_MFC_DEVICE_PROD_ID2(0, "FAX/Modem/Ethernet Combo Card ", 0x1ed59302), | ||
1654 | PCMCIA_DEVICE_MANF_CARD(0x0057, 0x1004), | ||
1655 | PCMCIA_DEVICE_MANF_CARD(0x0104, 0x000d), | ||
1656 | PCMCIA_DEVICE_MANF_CARD(0x0104, 0x0075), | ||
1657 | PCMCIA_DEVICE_MANF_CARD(0x0104, 0x0145), | ||
1658 | PCMCIA_DEVICE_MANF_CARD(0x0149, 0x0230), | ||
1659 | PCMCIA_DEVICE_MANF_CARD(0x0149, 0x4530), | ||
1660 | /* PCMCIA_DEVICE_MANF_CARD(0x0149, 0xc1ab), conflict with axnet_cs */ | ||
1661 | PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0110), | ||
1662 | PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x2328), | ||
1663 | PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x8041), | ||
1664 | PCMCIA_DEVICE_MANF_CARD(0x0213, 0x2452), | ||
1665 | /* PCMCIA_DEVICE_MANF_CARD(0x021b, 0x0202), conflict with axnet_cs */ | ||
1666 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0300), | ||
1667 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0307), | ||
1668 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x030a), | ||
1669 | PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1103), | ||
1670 | PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1121), | ||
1671 | PCMCIA_DEVICE_PROD_ID12("2408LAN", "Ethernet", 0x352fff7f, 0x00b2e941), | ||
1672 | PCMCIA_DEVICE_PROD_ID123("Cardwell", "PCMCIA", "ETHERNET", 0x9533672e, 0x281f1c5d, 0x3ff7175b), | ||
1673 | PCMCIA_DEVICE_PROD_ID123("CNet ", "CN30BC", "ETHERNET", 0x9fe55d3d, 0x85601198, 0x3ff7175b), | ||
1674 | PCMCIA_DEVICE_PROD_ID123("Digital", "Ethernet", "Adapter", 0x9999ab35, 0x00b2e941, 0x4b0d829e), | ||
1675 | PCMCIA_DEVICE_PROD_ID123("Edimax Technology Inc.", "PCMCIA", "Ethernet Card", 0x738a0019, 0x281f1c5d, 0x5e9d92c0), | ||
1676 | PCMCIA_DEVICE_PROD_ID123("EFA ", "EFA207", "ETHERNET", 0x3d294be4, 0xeb9aab6c, 0x3ff7175b), | ||
1677 | PCMCIA_DEVICE_PROD_ID123("I-O DATA", "PCLA", "ETHERNET", 0x1d55d7ec, 0xe4c64d34, 0x3ff7175b), | ||
1678 | PCMCIA_DEVICE_PROD_ID123("IO DATA", "PCLATE", "ETHERNET", 0x547e66dc, 0x6b260753, 0x3ff7175b), | ||
1679 | PCMCIA_DEVICE_PROD_ID123("KingMax Technology Inc.", "EN10-T2", "PCMCIA Ethernet Card", 0x932b7189, 0x699e4436, 0x6f6652e0), | ||
1680 | PCMCIA_DEVICE_PROD_ID123("PCMCIA", "PCMCIA-ETHERNET-CARD", "UE2216", 0x281f1c5d, 0xd4cd2f20, 0xb87add82), | ||
1681 | PCMCIA_DEVICE_PROD_ID123("PCMCIA", "PCMCIA-ETHERNET-CARD", "UE2620", 0x281f1c5d, 0xd4cd2f20, 0x7d3d83a8), | ||
1682 | PCMCIA_DEVICE_PROD_ID1("2412LAN", 0x67f236ab), | ||
1683 | PCMCIA_DEVICE_PROD_ID12("ACCTON", "EN2212", 0xdfc6b5b2, 0xcb112a11), | ||
1684 | PCMCIA_DEVICE_PROD_ID12("ACCTON", "EN2216-PCMCIA-ETHERNET", 0xdfc6b5b2, 0x5542bfff), | ||
1685 | PCMCIA_DEVICE_PROD_ID12("Allied Telesis, K.K.", "CentreCOM LA100-PCM-T V2 100/10M LAN PC Card", 0xbb7fbdd7, 0xcd91cc68), | ||
1686 | PCMCIA_DEVICE_PROD_ID12("Allied Telesis, K.K.", "CentreCOM LA-PCM", 0xbb7fbdd7, 0x5ba10d49), | ||
1687 | PCMCIA_DEVICE_PROD_ID12("Allied Telesis K.K.", "LA100-PCM V2", 0x36634a66, 0xc6d05997), | ||
1688 | PCMCIA_DEVICE_PROD_ID12("Allied Telesis, K.K.", "CentreCOM LA-PCM_V2", 0xbb7fBdd7, 0x28e299f8), | ||
1689 | PCMCIA_DEVICE_PROD_ID12("Allied Telesis K.K.", "LA-PCM V3", 0x36634a66, 0x62241d96), | ||
1690 | PCMCIA_DEVICE_PROD_ID12("AmbiCom", "AMB8010", 0x5070a7f9, 0x82f96e96), | ||
1691 | PCMCIA_DEVICE_PROD_ID12("AmbiCom", "AMB8610", 0x5070a7f9, 0x86741224), | ||
1692 | PCMCIA_DEVICE_PROD_ID12("AmbiCom Inc", "AMB8002", 0x93b15570, 0x75ec3efb), | ||
1693 | PCMCIA_DEVICE_PROD_ID12("AmbiCom Inc", "AMB8002T", 0x93b15570, 0x461c5247), | ||
1694 | PCMCIA_DEVICE_PROD_ID12("AmbiCom Inc", "AMB8010", 0x93b15570, 0x82f96e96), | ||
1695 | PCMCIA_DEVICE_PROD_ID12("AnyCom", "ECO Ethernet", 0x578ba6e7, 0x0a9888c1), | ||
1696 | PCMCIA_DEVICE_PROD_ID12("AnyCom", "ECO Ethernet 10/100", 0x578ba6e7, 0x939fedbd), | ||
1697 | PCMCIA_DEVICE_PROD_ID12("AROWANA", "PCMCIA Ethernet LAN Card", 0x313adbc8, 0x08d9f190), | ||
1698 | PCMCIA_DEVICE_PROD_ID12("ASANTE", "FriendlyNet PC Card", 0x3a7ade0f, 0x41c64504), | ||
1699 | PCMCIA_DEVICE_PROD_ID12("Billionton", "LNT-10TB", 0x552ab682, 0xeeb1ba6a), | ||
1700 | PCMCIA_DEVICE_PROD_ID12("CF", "10Base-Ethernet", 0x44ebf863, 0x93ae4d79), | ||
1701 | PCMCIA_DEVICE_PROD_ID12("CNet", "CN40BC Ethernet", 0xbc477dde, 0xfba775a7), | ||
1702 | PCMCIA_DEVICE_PROD_ID12("COMPU-SHACK", "BASEline PCMCIA 10 MBit Ethernetadapter", 0xfa2e424d, 0xe9190d8a), | ||
1703 | PCMCIA_DEVICE_PROD_ID12("COMPU-SHACK", "FASTline PCMCIA 10/100 Fast-Ethernet", 0xfa2e424d, 0x3953d9b9), | ||
1704 | PCMCIA_DEVICE_PROD_ID12("CONTEC", "C-NET(PC)C-10L", 0x21cab552, 0xf6f90722), | ||
1705 | PCMCIA_DEVICE_PROD_ID12("corega", "FEther PCC-TXF", 0x0a21501a, 0xa51564a2), | ||
1706 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-T", 0x5261440f, 0xfa9d85bd), | ||
1707 | PCMCIA_DEVICE_PROD_ID12("Corega K.K.", "corega EtherII PCC-TD", 0xd4fdcbd8, 0xc49bd73d), | ||
1708 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega Ether PCC-T", 0x5261440f, 0x6705fcaa), | ||
1709 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FastEther PCC-TX", 0x5261440f, 0x485e85d9), | ||
1710 | PCMCIA_DEVICE_PROD_ID12("Corega,K.K.", "Ethernet LAN Card", 0x110d26d9, 0x9fd2f0a2), | ||
1711 | PCMCIA_DEVICE_PROD_ID12("corega,K.K.", "Ethernet LAN Card", 0x9791a90e, 0x9fd2f0a2), | ||
1712 | PCMCIA_DEVICE_PROD_ID12("CouplerlessPCMCIA", "100BASE", 0xee5af0ad, 0x7c2add04), | ||
1713 | PCMCIA_DEVICE_PROD_ID12("CyQ've", "ELA-010", 0x77008979, 0x9d8d445d), | ||
1714 | PCMCIA_DEVICE_PROD_ID12("CyQ've", "ELA-110E 10/100M LAN Card", 0x77008979, 0xfd184814), | ||
1715 | PCMCIA_DEVICE_PROD_ID12("DataTrek.", "NetCard ", 0x5cd66d9d, 0x84697ce0), | ||
1716 | PCMCIA_DEVICE_PROD_ID12("Dayna Communications, Inc.", "CommuniCard E", 0x0c629325, 0xb4e7dbaf), | ||
1717 | PCMCIA_DEVICE_PROD_ID12("Digicom", "Palladio LAN 10/100", 0x697403d8, 0xe160b995), | ||
1718 | PCMCIA_DEVICE_PROD_ID12("Digicom", "Palladio LAN 10/100 Dongless", 0x697403d8, 0xa6d3b233), | ||
1719 | PCMCIA_DEVICE_PROD_ID12("DIGITAL", "DEPCM-XX", 0x69616cb3, 0xe600e76e), | ||
1720 | PCMCIA_DEVICE_PROD_ID12("D-Link", "DE-650", 0x1a424a1c, 0xf28c8398), | ||
1721 | PCMCIA_DEVICE_PROD_ID12("D-Link", "DE-660", 0x1a424a1c, 0xd9a1d05b), | ||
1722 | PCMCIA_DEVICE_PROD_ID12("D-Link", "DFE-650", 0x1a424a1c, 0x0f0073f9), | ||
1723 | PCMCIA_DEVICE_PROD_ID12("Dual Speed", "10/100 PC Card", 0x725b842d, 0xf1efee84), | ||
1724 | PCMCIA_DEVICE_PROD_ID12("Dual Speed", "10/100 Port Attached PC Card", 0x725b842d, 0x2db1f8e9), | ||
1725 | PCMCIA_DEVICE_PROD_ID12("Dynalink", "L10BC", 0x55632fd5, 0xdc65f2b1), | ||
1726 | PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L10BC", 0x6a26d1cf, 0xdc65f2b1), | ||
1727 | PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L10C", 0x6a26d1cf, 0xc4f84efb), | ||
1728 | PCMCIA_DEVICE_PROD_ID12("E-CARD", "E-CARD", 0x6701da11, 0x6701da11), | ||
1729 | PCMCIA_DEVICE_PROD_ID12("EIGER Labs Inc.", "Ethernet 10BaseT card", 0x53c864c6, 0xedd059f6), | ||
1730 | PCMCIA_DEVICE_PROD_ID12("EIGER Labs Inc.", "Ethernet Combo card", 0x53c864c6, 0x929c486c), | ||
1731 | PCMCIA_DEVICE_PROD_ID12("Ethernet", "Adapter", 0x00b2e941, 0x4b0d829e), | ||
1732 | PCMCIA_DEVICE_PROD_ID12("Ethernet Adapter", "E2000 PCMCIA Ethernet", 0x96767301, 0x71fbbc61), | ||
1733 | PCMCIA_DEVICE_PROD_ID12("Ethernet PCMCIA adapter", "EP-210", 0x8dd86181, 0xf2b52517), | ||
1734 | PCMCIA_DEVICE_PROD_ID12("Fast Ethernet", "Adapter", 0xb4be14e3, 0x4b0d829e), | ||
1735 | PCMCIA_DEVICE_PROD_ID12("Grey Cell", "GCS2000", 0x2a151fac, 0xf00555cb), | ||
1736 | PCMCIA_DEVICE_PROD_ID12("Grey Cell", "GCS2220", 0x2a151fac, 0xc1b7e327), | ||
1737 | PCMCIA_DEVICE_PROD_ID12("GVC", "NIC-2000p", 0x76e171bd, 0x6eb1c947), | ||
1738 | PCMCIA_DEVICE_PROD_ID12("IBM Corp.", "Ethernet", 0xe3736c88, 0x00b2e941), | ||
1739 | PCMCIA_DEVICE_PROD_ID12("IC-CARD", "IC-CARD", 0x60cb09a6, 0x60cb09a6), | ||
1740 | PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCETTX", 0x547e66dc, 0x6fc5459b), | ||
1741 | PCMCIA_DEVICE_PROD_ID12("iPort", "10/100 Ethernet Card", 0x56c538d2, 0x11b0ffc0), | ||
1742 | PCMCIA_DEVICE_PROD_ID12("KANSAI ELECTRIC CO.,LTD", "KLA-PCM/T", 0xb18dc3b4, 0xcc51a956), | ||
1743 | PCMCIA_DEVICE_PROD_ID12("KCI", "PE520 PCMCIA Ethernet Adapter", 0xa89b87d3, 0x1eb88e64), | ||
1744 | PCMCIA_DEVICE_PROD_ID12("KINGMAX", "EN10T2T", 0x7bcb459a, 0xa5c81fa5), | ||
1745 | PCMCIA_DEVICE_PROD_ID12("Kingston", "KNE-PC2", 0x1128e633, 0xce2a89b3), | ||
1746 | PCMCIA_DEVICE_PROD_ID12("Kingston Technology Corp.", "EtheRx PC Card Ethernet Adapter", 0x313c7be3, 0x0afb54a2), | ||
1747 | PCMCIA_DEVICE_PROD_ID12("Laneed", "LD-10/100CD", 0x1b7827b2, 0xcda71d1c), | ||
1748 | PCMCIA_DEVICE_PROD_ID12("Laneed", "LD-CDF", 0x1b7827b2, 0xfec71e40), | ||
1749 | PCMCIA_DEVICE_PROD_ID12("Laneed", "LD-CDL/T", 0x1b7827b2, 0x79fba4f7), | ||
1750 | PCMCIA_DEVICE_PROD_ID12("Laneed", "LD-CDS", 0x1b7827b2, 0x931afaab), | ||
1751 | PCMCIA_DEVICE_PROD_ID12("Linksys", "Combo PCMCIA EthernetCard (EC2T)", 0x0733cc81, 0x32ee8c78), | ||
1752 | PCMCIA_DEVICE_PROD_ID12("LINKSYS", "E-CARD", 0xf7cb0b07, 0x6701da11), | ||
1753 | PCMCIA_DEVICE_PROD_ID12("Linksys", "EtherFast 10/100 Integrated PC Card (PCM100)", 0x0733cc81, 0x453c3f9d), | ||
1754 | PCMCIA_DEVICE_PROD_ID12("Linksys", "EtherFast 10/100 PC Card (PCMPC100)", 0x0733cc81, 0x66c5a389), | ||
1755 | PCMCIA_DEVICE_PROD_ID12("Linksys", "EtherFast 10/100 PC Card (PCMPC100 V2)", 0x0733cc81, 0x3a3b28e9), | ||
1756 | PCMCIA_DEVICE_PROD_ID12("Linksys", "HomeLink Phoneline ", 0x0733cc81, 0x5e07cfa0), | ||
1757 | PCMCIA_DEVICE_PROD_ID12("Logitec", "LPM-LN100TX", 0x88fcdeda, 0x6d772737), | ||
1758 | PCMCIA_DEVICE_PROD_ID12("Logitec", "LPM-LN20T", 0x88fcdeda, 0x81090922), | ||
1759 | PCMCIA_DEVICE_PROD_ID12("LONGSHINE", "PCMCIA Ethernet Card", 0xf866b0b0, 0x6f6652e0), | ||
1760 | PCMCIA_DEVICE_PROD_ID12("MACNICA", "ME1-JEIDA", 0x20841b68, 0xaf8a3578), | ||
1761 | PCMCIA_DEVICE_PROD_ID12("Macsense", "MPC-10", 0xd830297f, 0xd265c307), | ||
1762 | PCMCIA_DEVICE_PROD_ID12("Matsushita Electric Industrial Co.,LTD.", "CF-VEL211", 0x44445376, 0x8ded41d4), | ||
1763 | PCMCIA_DEVICE_PROD_ID12("MAXTECH", "PCN2000", 0x78d64bc0, 0xca0ca4b8), | ||
1764 | PCMCIA_DEVICE_PROD_ID12("MELCO", "LPC2-T", 0x481e0094, 0xa2eb0cf3), | ||
1765 | PCMCIA_DEVICE_PROD_ID12("MELCO", "LPC2-TX", 0x481e0094, 0x41a6916c), | ||
1766 | PCMCIA_DEVICE_PROD_ID12("Microcom C.E.", "Travel Card LAN 10/100", 0x4b91cec7, 0xe70220d6), | ||
1767 | PCMCIA_DEVICE_PROD_ID12("Microdyne", "NE4200", 0x2e6da59b, 0x0478e472), | ||
1768 | PCMCIA_DEVICE_PROD_ID12("MIDORI ELEC.", "LT-PCMT", 0x648d55c1, 0xbde526c7), | ||
1769 | PCMCIA_DEVICE_PROD_ID12("National Semiconductor", "InfoMover 4100", 0x36e1191f, 0x60c229b9), | ||
1770 | PCMCIA_DEVICE_PROD_ID12("National Semiconductor", "InfoMover NE4100", 0x36e1191f, 0xa6617ec8), | ||
1771 | PCMCIA_DEVICE_PROD_ID12("NEC", "PC-9801N-J12", 0x18df0ba0, 0xbc912d76), | ||
1772 | PCMCIA_DEVICE_PROD_ID12("NETGEAR", "FA410TX", 0x9aa79dc3, 0x60e5bc0e), | ||
1773 | PCMCIA_DEVICE_PROD_ID12("NETGEAR", "FA411", 0x9aa79dc3, 0x40fad875), | ||
1774 | PCMCIA_DEVICE_PROD_ID12("Network Everywhere", "Fast Ethernet 10/100 PC Card", 0x820a67b6, 0x31ed1a5f), | ||
1775 | PCMCIA_DEVICE_PROD_ID12("NextCom K.K.", "Next Hawk", 0xaedaec74, 0xad050ef1), | ||
1776 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "10/100Mbps Ethernet Card", 0x281f1c5d, 0x6e41773b), | ||
1777 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Ethernet", 0x281f1c5d, 0x00b2e941), | ||
1778 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "ETHERNET", 0x281f1c5d, 0x3ff7175b), | ||
1779 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Ethernet 10BaseT Card", 0x281f1c5d, 0x4de2f6c8), | ||
1780 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Ethernet Card", 0x281f1c5d, 0x5e9d92c0), | ||
1781 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Ethernet Combo card", 0x281f1c5d, 0x929c486c), | ||
1782 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "ETHERNET V1.0", 0x281f1c5d, 0x4d8817c8), | ||
1783 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "FastEthernet", 0x281f1c5d, 0xfe871eeb), | ||
1784 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast-Ethernet", 0x281f1c5d, 0x45f1f3b4), | ||
1785 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "FAST ETHERNET CARD", 0x281f1c5d, 0xec5dbca7), | ||
1786 | PCMCIA_DEVICE_PROD_ID12("PCMCIA LAN", "Ethernet", 0x7500e246, 0x00b2e941), | ||
1787 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "LNT-10TN", 0x281f1c5d, 0xe707f641), | ||
1788 | PCMCIA_DEVICE_PROD_ID12("PCMCIAs", "ComboCard", 0xdcfe12d3, 0xcd8906cc), | ||
1789 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "UE2212", 0x281f1c5d, 0xbf17199b), | ||
1790 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", " Ethernet NE2000 Compatible", 0x281f1c5d, 0x42d5d7e1), | ||
1791 | PCMCIA_DEVICE_PROD_ID12("PRETEC", "Ethernet CompactLAN 10baseT 3.3V", 0xebf91155, 0x30074c80), | ||
1792 | PCMCIA_DEVICE_PROD_ID12("PRETEC", "Ethernet CompactLAN 10BaseT 3.3V", 0xebf91155, 0x7f5a4f50), | ||
1793 | PCMCIA_DEVICE_PROD_ID12("Psion Dacom", "Gold Card Ethernet", 0xf5f025c2, 0x3a30e110), | ||
1794 | PCMCIA_DEVICE_PROD_ID12("=RELIA==", "Ethernet", 0xcdd0644a, 0x00b2e941), | ||
1795 | PCMCIA_DEVICE_PROD_ID12("RP", "1625B Ethernet NE2000 Compatible", 0xe3e66e22, 0xb96150df), | ||
1796 | PCMCIA_DEVICE_PROD_ID12("RPTI", "EP400 Ethernet NE2000 Compatible", 0xdc6f88fd, 0x4a7e2ae0), | ||
1797 | PCMCIA_DEVICE_PROD_ID12("RPTI", "EP401 Ethernet NE2000 Compatible", 0xdc6f88fd, 0x4bcbd7fd), | ||
1798 | PCMCIA_DEVICE_PROD_ID12("RPTI LTD.", "EP400", 0xc53ac515, 0x81e39388), | ||
1799 | PCMCIA_DEVICE_PROD_ID12("SCM", "Ethernet Combo card", 0xbdc3b102, 0x929c486c), | ||
1800 | PCMCIA_DEVICE_PROD_ID12("Seiko Epson Corp.", "Ethernet", 0x09928730, 0x00b2e941), | ||
1801 | PCMCIA_DEVICE_PROD_ID12("SMC", "EZCard-10-PCMCIA", 0xc4f8b18b, 0xfb21d265), | ||
1802 | PCMCIA_DEVICE_PROD_ID12("Socket Communications Inc", "Socket EA PCMCIA LAN Adapter Revision D", 0xc70a4760, 0x2ade483e), | ||
1803 | PCMCIA_DEVICE_PROD_ID12("Socket Communications Inc", "Socket EA PCMCIA LAN Adapter Revision E", 0xc70a4760, 0x5dd978a8), | ||
1804 | PCMCIA_DEVICE_PROD_ID12("TDK", "LAK-CD031 for PCMCIA", 0x1eae9475, 0x0ed386fa), | ||
1805 | PCMCIA_DEVICE_PROD_ID12("Telecom Device K.K.", "SuperSocket RE450T", 0x466b05f0, 0x8b74bc4f), | ||
1806 | PCMCIA_DEVICE_PROD_ID12("Telecom Device K.K.", "SuperSocket RE550T", 0x466b05f0, 0x33c8db2a), | ||
1807 | PCMCIA_DEVICE_PROD_ID13("Hypertec", "EP401", 0x8787bec7, 0xf6e4a31e), | ||
1808 | PCMCIA_DEVICE_PROD_ID13("KingMax Technology Inc.", "Ethernet Card", 0x932b7189, 0x5e9d92c0), | ||
1809 | PCMCIA_DEVICE_PROD_ID13("LONGSHINE", "EP401", 0xf866b0b0, 0xf6e4a31e), | ||
1810 | PCMCIA_DEVICE_PROD_ID13("Xircom", "CFE-10", 0x2e3ee845, 0x22a49f89), | ||
1811 | PCMCIA_DEVICE_PROD_ID1("CyQ've 10 Base-T LAN CARD", 0x94faf360), | ||
1812 | PCMCIA_DEVICE_PROD_ID1("EP-210 PCMCIA LAN CARD.", 0x8850b4de), | ||
1813 | PCMCIA_DEVICE_PROD_ID1("ETHER-C16", 0x06a8514f), | ||
1814 | PCMCIA_DEVICE_PROD_ID1("IC-CARD", 0x60cb09a6), | ||
1815 | PCMCIA_DEVICE_PROD_ID1("NE2000 Compatible", 0x75b8ad5a), | ||
1816 | PCMCIA_DEVICE_PROD_ID2("EN-6200P2", 0xa996d078), | ||
1817 | /* too generic! */ | ||
1818 | /* PCMCIA_DEVICE_PROD_ID12("PCMCIA", "10/100 Ethernet Card", 0x281f1c5d, 0x11b0ffc0), */ | ||
1819 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "PCMCIA", "EN2218-LAN/MODEM", 0x281f1c5d, 0x570f348e, "PCMLM28.cis"), | ||
1820 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "PCMCIA", "UE2218-LAN/MODEM", 0x281f1c5d, 0x6fdcacee, "PCMLM28.cis"), | ||
1821 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "Psion Dacom", "Gold Card V34 Ethernet", 0xf5f025c2, 0x338e8155, "PCMLM28.cis"), | ||
1822 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "Psion Dacom", "Gold Card V34 Ethernet GSM", 0xf5f025c2, 0x4ae85d35, "PCMLM28.cis"), | ||
1823 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "LINKSYS", "PCMLM28", 0xf7cb0b07, 0x66881874, "PCMLM28.cis"), | ||
1824 | PCMCIA_MFC_DEVICE_CIS_PROD_ID12(0, "DAYNA COMMUNICATIONS", "LAN AND MODEM MULTIFUNCTION", 0x8fdf8f89, 0xdd5ed9e8, "DP83903.cis"), | ||
1825 | PCMCIA_MFC_DEVICE_CIS_PROD_ID4(0, "NSC MF LAN/Modem", 0x58fc6056, "DP83903.cis"), | ||
1826 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0175, 0x0000, "DP83903.cis"), | ||
1827 | PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "LA-PCM.cis"), | ||
1828 | PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), | ||
1829 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "NE2K.cis"), | ||
1830 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "PE-200.cis"), | ||
1831 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "tamarack.cis"), | ||
1832 | PCMCIA_DEVICE_NULL | ||
1833 | }; | ||
1834 | MODULE_DEVICE_TABLE(pcmcia, pcnet_ids); | ||
1835 | |||
1637 | static struct pcmcia_driver pcnet_driver = { | 1836 | static struct pcmcia_driver pcnet_driver = { |
1638 | .drv = { | 1837 | .drv = { |
1639 | .name = "pcnet_cs", | 1838 | .name = "pcnet_cs", |
1640 | }, | 1839 | }, |
1641 | .attach = pcnet_attach, | 1840 | .attach = pcnet_attach, |
1841 | .event = pcnet_event, | ||
1642 | .detach = pcnet_detach, | 1842 | .detach = pcnet_detach, |
1643 | .owner = THIS_MODULE, | 1843 | .owner = THIS_MODULE, |
1844 | .id_table = pcnet_ids, | ||
1644 | }; | 1845 | }; |
1645 | 1846 | ||
1646 | static int __init init_pcnet_cs(void) | 1847 | static int __init init_pcnet_cs(void) |
diff --git a/drivers/net/pcmcia/smc91c92_cs.c b/drivers/net/pcmcia/smc91c92_cs.c index 85a152173148..0d8bb4cccbb7 100644 --- a/drivers/net/pcmcia/smc91c92_cs.c +++ b/drivers/net/pcmcia/smc91c92_cs.c | |||
@@ -41,8 +41,8 @@ | |||
41 | #include <linux/ioport.h> | 41 | #include <linux/ioport.h> |
42 | #include <linux/ethtool.h> | 42 | #include <linux/ethtool.h> |
43 | #include <linux/mii.h> | 43 | #include <linux/mii.h> |
44 | #include <linux/jiffies.h> | ||
44 | 45 | ||
45 | #include <pcmcia/version.h> | ||
46 | #include <pcmcia/cs_types.h> | 46 | #include <pcmcia/cs_types.h> |
47 | #include <pcmcia/cs.h> | 47 | #include <pcmcia/cs.h> |
48 | #include <pcmcia/cistpl.h> | 48 | #include <pcmcia/cistpl.h> |
@@ -127,6 +127,12 @@ struct smc_private { | |||
127 | int rx_ovrn; | 127 | int rx_ovrn; |
128 | }; | 128 | }; |
129 | 129 | ||
130 | struct smc_cfg_mem { | ||
131 | tuple_t tuple; | ||
132 | cisparse_t parse; | ||
133 | u_char buf[255]; | ||
134 | }; | ||
135 | |||
130 | /* Special definitions for Megahertz multifunction cards */ | 136 | /* Special definitions for Megahertz multifunction cards */ |
131 | #define MEGAHERTZ_ISR 0x0380 | 137 | #define MEGAHERTZ_ISR 0x0380 |
132 | 138 | ||
@@ -364,10 +370,6 @@ static dev_link_t *smc91c92_attach(void) | |||
364 | link->next = dev_list; | 370 | link->next = dev_list; |
365 | dev_list = link; | 371 | dev_list = link; |
366 | client_reg.dev_info = &dev_info; | 372 | client_reg.dev_info = &dev_info; |
367 | client_reg.EventMask = CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
368 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
369 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
370 | client_reg.event_handler = &smc91c92_event; | ||
371 | client_reg.Version = 0x0210; | 373 | client_reg.Version = 0x0210; |
372 | client_reg.event_callback_args.client_data = link; | 374 | client_reg.event_callback_args.client_data = link; |
373 | ret = pcmcia_register_client(&link->handle, &client_reg); | 375 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -498,14 +500,24 @@ static int mhz_mfc_config(dev_link_t *link) | |||
498 | { | 500 | { |
499 | struct net_device *dev = link->priv; | 501 | struct net_device *dev = link->priv; |
500 | struct smc_private *smc = netdev_priv(dev); | 502 | struct smc_private *smc = netdev_priv(dev); |
501 | tuple_t tuple; | 503 | struct smc_cfg_mem *cfg_mem; |
502 | cisparse_t parse; | 504 | tuple_t *tuple; |
503 | u_char buf[255]; | 505 | cisparse_t *parse; |
504 | cistpl_cftable_entry_t *cf = &parse.cftable_entry; | 506 | cistpl_cftable_entry_t *cf; |
507 | u_char *buf; | ||
505 | win_req_t req; | 508 | win_req_t req; |
506 | memreq_t mem; | 509 | memreq_t mem; |
507 | int i, k; | 510 | int i, k; |
508 | 511 | ||
512 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | ||
513 | if (!cfg_mem) | ||
514 | return CS_OUT_OF_RESOURCE; | ||
515 | |||
516 | tuple = &cfg_mem->tuple; | ||
517 | parse = &cfg_mem->parse; | ||
518 | cf = &parse->cftable_entry; | ||
519 | buf = cfg_mem->buf; | ||
520 | |||
509 | link->conf.Attributes |= CONF_ENABLE_SPKR; | 521 | link->conf.Attributes |= CONF_ENABLE_SPKR; |
510 | link->conf.Status = CCSR_AUDIO_ENA; | 522 | link->conf.Status = CCSR_AUDIO_ENA; |
511 | link->irq.Attributes = | 523 | link->irq.Attributes = |
@@ -514,12 +526,12 @@ static int mhz_mfc_config(dev_link_t *link) | |||
514 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; | 526 | link->io.Attributes2 = IO_DATA_PATH_WIDTH_8; |
515 | link->io.NumPorts2 = 8; | 527 | link->io.NumPorts2 = 8; |
516 | 528 | ||
517 | tuple.Attributes = tuple.TupleOffset = 0; | 529 | tuple->Attributes = tuple->TupleOffset = 0; |
518 | tuple.TupleData = (cisdata_t *)buf; | 530 | tuple->TupleData = (cisdata_t *)buf; |
519 | tuple.TupleDataMax = sizeof(buf); | 531 | tuple->TupleDataMax = 255; |
520 | tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY; | 532 | tuple->DesiredTuple = CISTPL_CFTABLE_ENTRY; |
521 | 533 | ||
522 | i = first_tuple(link->handle, &tuple, &parse); | 534 | i = first_tuple(link->handle, tuple, parse); |
523 | /* The Megahertz combo cards have modem-like CIS entries, so | 535 | /* The Megahertz combo cards have modem-like CIS entries, so |
524 | we have to explicitly try a bunch of port combinations. */ | 536 | we have to explicitly try a bunch of port combinations. */ |
525 | while (i == CS_SUCCESS) { | 537 | while (i == CS_SUCCESS) { |
@@ -532,10 +544,10 @@ static int mhz_mfc_config(dev_link_t *link) | |||
532 | if (i == CS_SUCCESS) break; | 544 | if (i == CS_SUCCESS) break; |
533 | } | 545 | } |
534 | if (i == CS_SUCCESS) break; | 546 | if (i == CS_SUCCESS) break; |
535 | i = next_tuple(link->handle, &tuple, &parse); | 547 | i = next_tuple(link->handle, tuple, parse); |
536 | } | 548 | } |
537 | if (i != CS_SUCCESS) | 549 | if (i != CS_SUCCESS) |
538 | return i; | 550 | goto free_cfg_mem; |
539 | dev->base_addr = link->io.BasePort1; | 551 | dev->base_addr = link->io.BasePort1; |
540 | 552 | ||
541 | /* Allocate a memory window, for accessing the ISR */ | 553 | /* Allocate a memory window, for accessing the ISR */ |
@@ -544,7 +556,7 @@ static int mhz_mfc_config(dev_link_t *link) | |||
544 | req.AccessSpeed = 0; | 556 | req.AccessSpeed = 0; |
545 | i = pcmcia_request_window(&link->handle, &req, &link->win); | 557 | i = pcmcia_request_window(&link->handle, &req, &link->win); |
546 | if (i != CS_SUCCESS) | 558 | if (i != CS_SUCCESS) |
547 | return i; | 559 | goto free_cfg_mem; |
548 | smc->base = ioremap(req.Base, req.Size); | 560 | smc->base = ioremap(req.Base, req.Size); |
549 | mem.CardOffset = mem.Page = 0; | 561 | mem.CardOffset = mem.Page = 0; |
550 | if (smc->manfid == MANFID_MOTOROLA) | 562 | if (smc->manfid == MANFID_MOTOROLA) |
@@ -556,6 +568,8 @@ static int mhz_mfc_config(dev_link_t *link) | |||
556 | && (smc->cardid == PRODID_MEGAHERTZ_EM3288)) | 568 | && (smc->cardid == PRODID_MEGAHERTZ_EM3288)) |
557 | mhz_3288_power(link); | 569 | mhz_3288_power(link); |
558 | 570 | ||
571 | free_cfg_mem: | ||
572 | kfree(cfg_mem); | ||
559 | return i; | 573 | return i; |
560 | } | 574 | } |
561 | 575 | ||
@@ -563,39 +577,61 @@ static int mhz_setup(dev_link_t *link) | |||
563 | { | 577 | { |
564 | client_handle_t handle = link->handle; | 578 | client_handle_t handle = link->handle; |
565 | struct net_device *dev = link->priv; | 579 | struct net_device *dev = link->priv; |
566 | tuple_t tuple; | 580 | struct smc_cfg_mem *cfg_mem; |
567 | cisparse_t parse; | 581 | tuple_t *tuple; |
568 | u_char buf[255], *station_addr; | 582 | cisparse_t *parse; |
583 | u_char *buf, *station_addr; | ||
584 | int rc; | ||
585 | |||
586 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | ||
587 | if (!cfg_mem) | ||
588 | return -1; | ||
589 | |||
590 | tuple = &cfg_mem->tuple; | ||
591 | parse = &cfg_mem->parse; | ||
592 | buf = cfg_mem->buf; | ||
569 | 593 | ||
570 | tuple.Attributes = tuple.TupleOffset = 0; | 594 | tuple->Attributes = tuple->TupleOffset = 0; |
571 | tuple.TupleData = buf; | 595 | tuple->TupleData = (cisdata_t *)buf; |
572 | tuple.TupleDataMax = sizeof(buf); | 596 | tuple->TupleDataMax = 255; |
573 | 597 | ||
574 | /* Read the station address from the CIS. It is stored as the last | 598 | /* Read the station address from the CIS. It is stored as the last |
575 | (fourth) string in the Version 1 Version/ID tuple. */ | 599 | (fourth) string in the Version 1 Version/ID tuple. */ |
576 | tuple.DesiredTuple = CISTPL_VERS_1; | 600 | tuple->DesiredTuple = CISTPL_VERS_1; |
577 | if (first_tuple(handle, &tuple, &parse) != CS_SUCCESS) | 601 | if (first_tuple(handle, tuple, parse) != CS_SUCCESS) { |
578 | return -1; | 602 | rc = -1; |
603 | goto free_cfg_mem; | ||
604 | } | ||
579 | /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */ | 605 | /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */ |
580 | if (next_tuple(handle, &tuple, &parse) != CS_SUCCESS) | 606 | if (next_tuple(handle, tuple, parse) != CS_SUCCESS) |
581 | first_tuple(handle, &tuple, &parse); | 607 | first_tuple(handle, tuple, parse); |
582 | if (parse.version_1.ns > 3) { | 608 | if (parse->version_1.ns > 3) { |
583 | station_addr = parse.version_1.str + parse.version_1.ofs[3]; | 609 | station_addr = parse->version_1.str + parse->version_1.ofs[3]; |
584 | if (cvt_ascii_address(dev, station_addr) == 0) | 610 | if (cvt_ascii_address(dev, station_addr) == 0) { |
585 | return 0; | 611 | rc = 0; |
612 | goto free_cfg_mem; | ||
613 | } | ||
586 | } | 614 | } |
587 | 615 | ||
588 | /* Another possibility: for the EM3288, in a special tuple */ | 616 | /* Another possibility: for the EM3288, in a special tuple */ |
589 | tuple.DesiredTuple = 0x81; | 617 | tuple->DesiredTuple = 0x81; |
590 | if (pcmcia_get_first_tuple(handle, &tuple) != CS_SUCCESS) | 618 | if (pcmcia_get_first_tuple(handle, tuple) != CS_SUCCESS) { |
591 | return -1; | 619 | rc = -1; |
592 | if (pcmcia_get_tuple_data(handle, &tuple) != CS_SUCCESS) | 620 | goto free_cfg_mem; |
593 | return -1; | 621 | } |
622 | if (pcmcia_get_tuple_data(handle, tuple) != CS_SUCCESS) { | ||
623 | rc = -1; | ||
624 | goto free_cfg_mem; | ||
625 | } | ||
594 | buf[12] = '\0'; | 626 | buf[12] = '\0'; |
595 | if (cvt_ascii_address(dev, buf) == 0) | 627 | if (cvt_ascii_address(dev, buf) == 0) { |
596 | return 0; | 628 | rc = 0; |
597 | 629 | goto free_cfg_mem; | |
598 | return -1; | 630 | } |
631 | rc = -1; | ||
632 | free_cfg_mem: | ||
633 | kfree(cfg_mem); | ||
634 | return rc; | ||
599 | } | 635 | } |
600 | 636 | ||
601 | /*====================================================================== | 637 | /*====================================================================== |
@@ -665,19 +701,29 @@ static int mot_setup(dev_link_t *link) | |||
665 | static int smc_config(dev_link_t *link) | 701 | static int smc_config(dev_link_t *link) |
666 | { | 702 | { |
667 | struct net_device *dev = link->priv; | 703 | struct net_device *dev = link->priv; |
668 | tuple_t tuple; | 704 | struct smc_cfg_mem *cfg_mem; |
669 | cisparse_t parse; | 705 | tuple_t *tuple; |
670 | u_char buf[255]; | 706 | cisparse_t *parse; |
671 | cistpl_cftable_entry_t *cf = &parse.cftable_entry; | 707 | cistpl_cftable_entry_t *cf; |
708 | u_char *buf; | ||
672 | int i; | 709 | int i; |
673 | 710 | ||
674 | tuple.Attributes = tuple.TupleOffset = 0; | 711 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); |
675 | tuple.TupleData = (cisdata_t *)buf; | 712 | if (!cfg_mem) |
676 | tuple.TupleDataMax = sizeof(buf); | 713 | return CS_OUT_OF_RESOURCE; |
677 | tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY; | 714 | |
715 | tuple = &cfg_mem->tuple; | ||
716 | parse = &cfg_mem->parse; | ||
717 | cf = &parse->cftable_entry; | ||
718 | buf = cfg_mem->buf; | ||
719 | |||
720 | tuple->Attributes = tuple->TupleOffset = 0; | ||
721 | tuple->TupleData = (cisdata_t *)buf; | ||
722 | tuple->TupleDataMax = 255; | ||
723 | tuple->DesiredTuple = CISTPL_CFTABLE_ENTRY; | ||
678 | 724 | ||
679 | link->io.NumPorts1 = 16; | 725 | link->io.NumPorts1 = 16; |
680 | i = first_tuple(link->handle, &tuple, &parse); | 726 | i = first_tuple(link->handle, tuple, parse); |
681 | while (i != CS_NO_MORE_ITEMS) { | 727 | while (i != CS_NO_MORE_ITEMS) { |
682 | if (i == CS_SUCCESS) { | 728 | if (i == CS_SUCCESS) { |
683 | link->conf.ConfigIndex = cf->index; | 729 | link->conf.ConfigIndex = cf->index; |
@@ -686,10 +732,12 @@ static int smc_config(dev_link_t *link) | |||
686 | i = pcmcia_request_io(link->handle, &link->io); | 732 | i = pcmcia_request_io(link->handle, &link->io); |
687 | if (i == CS_SUCCESS) break; | 733 | if (i == CS_SUCCESS) break; |
688 | } | 734 | } |
689 | i = next_tuple(link->handle, &tuple, &parse); | 735 | i = next_tuple(link->handle, tuple, parse); |
690 | } | 736 | } |
691 | if (i == CS_SUCCESS) | 737 | if (i == CS_SUCCESS) |
692 | dev->base_addr = link->io.BasePort1; | 738 | dev->base_addr = link->io.BasePort1; |
739 | |||
740 | kfree(cfg_mem); | ||
693 | return i; | 741 | return i; |
694 | } | 742 | } |
695 | 743 | ||
@@ -697,41 +745,58 @@ static int smc_setup(dev_link_t *link) | |||
697 | { | 745 | { |
698 | client_handle_t handle = link->handle; | 746 | client_handle_t handle = link->handle; |
699 | struct net_device *dev = link->priv; | 747 | struct net_device *dev = link->priv; |
700 | tuple_t tuple; | 748 | struct smc_cfg_mem *cfg_mem; |
701 | cisparse_t parse; | 749 | tuple_t *tuple; |
750 | cisparse_t *parse; | ||
702 | cistpl_lan_node_id_t *node_id; | 751 | cistpl_lan_node_id_t *node_id; |
703 | u_char buf[255], *station_addr; | 752 | u_char *buf, *station_addr; |
704 | int i; | 753 | int i, rc; |
754 | |||
755 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | ||
756 | if (!cfg_mem) | ||
757 | return CS_OUT_OF_RESOURCE; | ||
705 | 758 | ||
706 | tuple.Attributes = tuple.TupleOffset = 0; | 759 | tuple = &cfg_mem->tuple; |
707 | tuple.TupleData = buf; | 760 | parse = &cfg_mem->parse; |
708 | tuple.TupleDataMax = sizeof(buf); | 761 | buf = cfg_mem->buf; |
762 | |||
763 | tuple->Attributes = tuple->TupleOffset = 0; | ||
764 | tuple->TupleData = (cisdata_t *)buf; | ||
765 | tuple->TupleDataMax = 255; | ||
709 | 766 | ||
710 | /* Check for a LAN function extension tuple */ | 767 | /* Check for a LAN function extension tuple */ |
711 | tuple.DesiredTuple = CISTPL_FUNCE; | 768 | tuple->DesiredTuple = CISTPL_FUNCE; |
712 | i = first_tuple(handle, &tuple, &parse); | 769 | i = first_tuple(handle, tuple, parse); |
713 | while (i == CS_SUCCESS) { | 770 | while (i == CS_SUCCESS) { |
714 | if (parse.funce.type == CISTPL_FUNCE_LAN_NODE_ID) | 771 | if (parse->funce.type == CISTPL_FUNCE_LAN_NODE_ID) |
715 | break; | 772 | break; |
716 | i = next_tuple(handle, &tuple, &parse); | 773 | i = next_tuple(handle, tuple, parse); |
717 | } | 774 | } |
718 | if (i == CS_SUCCESS) { | 775 | if (i == CS_SUCCESS) { |
719 | node_id = (cistpl_lan_node_id_t *)parse.funce.data; | 776 | node_id = (cistpl_lan_node_id_t *)parse->funce.data; |
720 | if (node_id->nb == 6) { | 777 | if (node_id->nb == 6) { |
721 | for (i = 0; i < 6; i++) | 778 | for (i = 0; i < 6; i++) |
722 | dev->dev_addr[i] = node_id->id[i]; | 779 | dev->dev_addr[i] = node_id->id[i]; |
723 | return 0; | 780 | rc = 0; |
781 | goto free_cfg_mem; | ||
724 | } | 782 | } |
725 | } | 783 | } |
726 | /* Try the third string in the Version 1 Version/ID tuple. */ | 784 | /* Try the third string in the Version 1 Version/ID tuple. */ |
727 | tuple.DesiredTuple = CISTPL_VERS_1; | 785 | tuple->DesiredTuple = CISTPL_VERS_1; |
728 | if (first_tuple(handle, &tuple, &parse) != CS_SUCCESS) | 786 | if (first_tuple(handle, tuple, parse) != CS_SUCCESS) { |
729 | return -1; | 787 | rc = -1; |
730 | station_addr = parse.version_1.str + parse.version_1.ofs[2]; | 788 | goto free_cfg_mem; |
731 | if (cvt_ascii_address(dev, station_addr) == 0) | 789 | } |
732 | return 0; | 790 | station_addr = parse->version_1.str + parse->version_1.ofs[2]; |
791 | if (cvt_ascii_address(dev, station_addr) == 0) { | ||
792 | rc = 0; | ||
793 | goto free_cfg_mem; | ||
794 | } | ||
733 | 795 | ||
734 | return -1; | 796 | rc = -1; |
797 | free_cfg_mem: | ||
798 | kfree(cfg_mem); | ||
799 | return rc; | ||
735 | } | 800 | } |
736 | 801 | ||
737 | /*====================================================================*/ | 802 | /*====================================================================*/ |
@@ -773,26 +838,36 @@ static int osi_setup(dev_link_t *link, u_short manfid, u_short cardid) | |||
773 | { | 838 | { |
774 | client_handle_t handle = link->handle; | 839 | client_handle_t handle = link->handle; |
775 | struct net_device *dev = link->priv; | 840 | struct net_device *dev = link->priv; |
776 | tuple_t tuple; | 841 | struct smc_cfg_mem *cfg_mem; |
777 | u_char buf[255]; | 842 | tuple_t *tuple; |
778 | int i; | 843 | u_char *buf; |
844 | int i, rc; | ||
845 | |||
846 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); | ||
847 | if (!cfg_mem) | ||
848 | return -1; | ||
849 | |||
850 | tuple = &cfg_mem->tuple; | ||
851 | buf = cfg_mem->buf; | ||
779 | 852 | ||
780 | tuple.Attributes = TUPLE_RETURN_COMMON; | 853 | tuple->Attributes = TUPLE_RETURN_COMMON; |
781 | tuple.TupleData = buf; | 854 | tuple->TupleData = (cisdata_t *)buf; |
782 | tuple.TupleDataMax = sizeof(buf); | 855 | tuple->TupleDataMax = 255; |
783 | tuple.TupleOffset = 0; | 856 | tuple->TupleOffset = 0; |
784 | 857 | ||
785 | /* Read the station address from tuple 0x90, subtuple 0x04 */ | 858 | /* Read the station address from tuple 0x90, subtuple 0x04 */ |
786 | tuple.DesiredTuple = 0x90; | 859 | tuple->DesiredTuple = 0x90; |
787 | i = pcmcia_get_first_tuple(handle, &tuple); | 860 | i = pcmcia_get_first_tuple(handle, tuple); |
788 | while (i == CS_SUCCESS) { | 861 | while (i == CS_SUCCESS) { |
789 | i = pcmcia_get_tuple_data(handle, &tuple); | 862 | i = pcmcia_get_tuple_data(handle, tuple); |
790 | if ((i != CS_SUCCESS) || (buf[0] == 0x04)) | 863 | if ((i != CS_SUCCESS) || (buf[0] == 0x04)) |
791 | break; | 864 | break; |
792 | i = pcmcia_get_next_tuple(handle, &tuple); | 865 | i = pcmcia_get_next_tuple(handle, tuple); |
866 | } | ||
867 | if (i != CS_SUCCESS) { | ||
868 | rc = -1; | ||
869 | goto free_cfg_mem; | ||
793 | } | 870 | } |
794 | if (i != CS_SUCCESS) | ||
795 | return -1; | ||
796 | for (i = 0; i < 6; i++) | 871 | for (i = 0; i < 6; i++) |
797 | dev->dev_addr[i] = buf[i+2]; | 872 | dev->dev_addr[i] = buf[i+2]; |
798 | 873 | ||
@@ -814,8 +889,10 @@ static int osi_setup(dev_link_t *link, u_short manfid, u_short cardid) | |||
814 | inw(link->io.BasePort1 + OSITECH_AUI_PWR), | 889 | inw(link->io.BasePort1 + OSITECH_AUI_PWR), |
815 | inw(link->io.BasePort1 + OSITECH_RESET_ISR)); | 890 | inw(link->io.BasePort1 + OSITECH_RESET_ISR)); |
816 | } | 891 | } |
817 | 892 | rc = 0; | |
818 | return 0; | 893 | free_cfg_mem: |
894 | kfree(cfg_mem); | ||
895 | return rc; | ||
819 | } | 896 | } |
820 | 897 | ||
821 | /*====================================================================== | 898 | /*====================================================================== |
@@ -887,9 +964,10 @@ static void smc91c92_config(dev_link_t *link) | |||
887 | client_handle_t handle = link->handle; | 964 | client_handle_t handle = link->handle; |
888 | struct net_device *dev = link->priv; | 965 | struct net_device *dev = link->priv; |
889 | struct smc_private *smc = netdev_priv(dev); | 966 | struct smc_private *smc = netdev_priv(dev); |
890 | tuple_t tuple; | 967 | struct smc_cfg_mem *cfg_mem; |
891 | cisparse_t parse; | 968 | tuple_t *tuple; |
892 | u_short buf[32]; | 969 | cisparse_t *parse; |
970 | u_char *buf; | ||
893 | char *name; | 971 | char *name; |
894 | int i, j, rev; | 972 | int i, j, rev; |
895 | kio_addr_t ioaddr; | 973 | kio_addr_t ioaddr; |
@@ -897,21 +975,29 @@ static void smc91c92_config(dev_link_t *link) | |||
897 | 975 | ||
898 | DEBUG(0, "smc91c92_config(0x%p)\n", link); | 976 | DEBUG(0, "smc91c92_config(0x%p)\n", link); |
899 | 977 | ||
900 | tuple.Attributes = tuple.TupleOffset = 0; | 978 | cfg_mem = kmalloc(sizeof(struct smc_cfg_mem), GFP_KERNEL); |
901 | tuple.TupleData = (cisdata_t *)buf; | 979 | if (!cfg_mem) |
902 | tuple.TupleDataMax = sizeof(buf); | 980 | goto config_failed; |
903 | 981 | ||
904 | tuple.DesiredTuple = CISTPL_CONFIG; | 982 | tuple = &cfg_mem->tuple; |
905 | i = first_tuple(handle, &tuple, &parse); | 983 | parse = &cfg_mem->parse; |
906 | CS_EXIT_TEST(i, ParseTuple, config_failed); | 984 | buf = cfg_mem->buf; |
907 | link->conf.ConfigBase = parse.config.base; | ||
908 | link->conf.Present = parse.config.rmask[0]; | ||
909 | 985 | ||
910 | tuple.DesiredTuple = CISTPL_MANFID; | 986 | tuple->Attributes = tuple->TupleOffset = 0; |
911 | tuple.Attributes = TUPLE_RETURN_COMMON; | 987 | tuple->TupleData = (cisdata_t *)buf; |
912 | if (first_tuple(handle, &tuple, &parse) == CS_SUCCESS) { | 988 | tuple->TupleDataMax = 64; |
913 | smc->manfid = parse.manfid.manf; | 989 | |
914 | smc->cardid = parse.manfid.card; | 990 | tuple->DesiredTuple = CISTPL_CONFIG; |
991 | i = first_tuple(handle, tuple, parse); | ||
992 | CS_EXIT_TEST(i, ParseTuple, config_failed); | ||
993 | link->conf.ConfigBase = parse->config.base; | ||
994 | link->conf.Present = parse->config.rmask[0]; | ||
995 | |||
996 | tuple->DesiredTuple = CISTPL_MANFID; | ||
997 | tuple->Attributes = TUPLE_RETURN_COMMON; | ||
998 | if (first_tuple(handle, tuple, parse) == CS_SUCCESS) { | ||
999 | smc->manfid = parse->manfid.manf; | ||
1000 | smc->cardid = parse->manfid.card; | ||
915 | } | 1001 | } |
916 | 1002 | ||
917 | /* Configure card */ | 1003 | /* Configure card */ |
@@ -1046,7 +1132,7 @@ static void smc91c92_config(dev_link_t *link) | |||
1046 | printk(KERN_NOTICE " No MII transceivers found!\n"); | 1132 | printk(KERN_NOTICE " No MII transceivers found!\n"); |
1047 | } | 1133 | } |
1048 | } | 1134 | } |
1049 | 1135 | kfree(cfg_mem); | |
1050 | return; | 1136 | return; |
1051 | 1137 | ||
1052 | config_undo: | 1138 | config_undo: |
@@ -1054,6 +1140,7 @@ config_undo: | |||
1054 | config_failed: /* CS_EXIT_TEST() calls jump to here... */ | 1140 | config_failed: /* CS_EXIT_TEST() calls jump to here... */ |
1055 | smc91c92_release(link); | 1141 | smc91c92_release(link); |
1056 | link->state &= ~DEV_CONFIG_PENDING; | 1142 | link->state &= ~DEV_CONFIG_PENDING; |
1143 | kfree(cfg_mem); | ||
1057 | 1144 | ||
1058 | } /* smc91c92_config */ | 1145 | } /* smc91c92_config */ |
1059 | 1146 | ||
@@ -2006,7 +2093,7 @@ static void media_check(u_long arg) | |||
2006 | } | 2093 | } |
2007 | 2094 | ||
2008 | /* Ignore collisions unless we've had no rx's recently */ | 2095 | /* Ignore collisions unless we've had no rx's recently */ |
2009 | if (jiffies - dev->last_rx > HZ) { | 2096 | if (time_after(jiffies, dev->last_rx + HZ)) { |
2010 | if (smc->tx_err || (smc->media_status & EPH_16COL)) | 2097 | if (smc->tx_err || (smc->media_status & EPH_16COL)) |
2011 | media |= EPH_16COL; | 2098 | media |= EPH_16COL; |
2012 | } | 2099 | } |
@@ -2236,13 +2323,47 @@ static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd) | |||
2236 | return rc; | 2323 | return rc; |
2237 | } | 2324 | } |
2238 | 2325 | ||
2326 | static struct pcmcia_device_id smc91c92_ids[] = { | ||
2327 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501), | ||
2328 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a), | ||
2329 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63), | ||
2330 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63), | ||
2331 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef), | ||
2332 | PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef), | ||
2333 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c), | ||
2334 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e), | ||
2335 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard", 0x0c2f80cd, 0x0573c29f), | ||
2336 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard", 0x0c2f80cd, 0x0573c29f), | ||
2337 | PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020), | ||
2338 | PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023), | ||
2339 | PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb), | ||
2340 | PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc), | ||
2341 | PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1), | ||
2342 | PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5), | ||
2343 | PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9), | ||
2344 | PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953), | ||
2345 | PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a), | ||
2346 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard", 0x0c2f80cd, 0x0573c29f), | ||
2347 | PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard", 0x0c2f80cd, 0x0573c29f), | ||
2348 | PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc), | ||
2349 | PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9), | ||
2350 | PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d), | ||
2351 | /* These conflict with other cards! */ | ||
2352 | /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */ | ||
2353 | /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */ | ||
2354 | PCMCIA_DEVICE_NULL, | ||
2355 | }; | ||
2356 | MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids); | ||
2357 | |||
2239 | static struct pcmcia_driver smc91c92_cs_driver = { | 2358 | static struct pcmcia_driver smc91c92_cs_driver = { |
2240 | .owner = THIS_MODULE, | 2359 | .owner = THIS_MODULE, |
2241 | .drv = { | 2360 | .drv = { |
2242 | .name = "smc91c92_cs", | 2361 | .name = "smc91c92_cs", |
2243 | }, | 2362 | }, |
2244 | .attach = smc91c92_attach, | 2363 | .attach = smc91c92_attach, |
2364 | .event = smc91c92_event, | ||
2245 | .detach = smc91c92_detach, | 2365 | .detach = smc91c92_detach, |
2366 | .id_table = smc91c92_ids, | ||
2246 | }; | 2367 | }; |
2247 | 2368 | ||
2248 | static int __init init_smc91c92_cs(void) | 2369 | static int __init init_smc91c92_cs(void) |
diff --git a/drivers/net/pcmcia/xirc2ps_cs.c b/drivers/net/pcmcia/xirc2ps_cs.c index 58177d67ea12..9f33bad174e9 100644 --- a/drivers/net/pcmcia/xirc2ps_cs.c +++ b/drivers/net/pcmcia/xirc2ps_cs.c | |||
@@ -81,7 +81,6 @@ | |||
81 | #include <linux/ioport.h> | 81 | #include <linux/ioport.h> |
82 | #include <linux/bitops.h> | 82 | #include <linux/bitops.h> |
83 | 83 | ||
84 | #include <pcmcia/version.h> | ||
85 | #include <pcmcia/cs_types.h> | 84 | #include <pcmcia/cs_types.h> |
86 | #include <pcmcia/cs.h> | 85 | #include <pcmcia/cs.h> |
87 | #include <pcmcia/cistpl.h> | 86 | #include <pcmcia/cistpl.h> |
@@ -619,11 +618,6 @@ xirc2ps_attach(void) | |||
619 | link->next = dev_list; | 618 | link->next = dev_list; |
620 | dev_list = link; | 619 | dev_list = link; |
621 | client_reg.dev_info = &dev_info; | 620 | client_reg.dev_info = &dev_info; |
622 | client_reg.EventMask = | ||
623 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
624 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
625 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
626 | client_reg.event_handler = &xirc2ps_event; | ||
627 | client_reg.Version = 0x0210; | 621 | client_reg.Version = 0x0210; |
628 | client_reg.event_callback_args.client_data = link; | 622 | client_reg.event_callback_args.client_data = link; |
629 | if ((err = pcmcia_register_client(&link->handle, &client_reg))) { | 623 | if ((err = pcmcia_register_client(&link->handle, &client_reg))) { |
@@ -1983,13 +1977,42 @@ do_stop(struct net_device *dev) | |||
1983 | return 0; | 1977 | return 0; |
1984 | } | 1978 | } |
1985 | 1979 | ||
1980 | static struct pcmcia_device_id xirc2ps_ids[] = { | ||
1981 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0089, 0x110a), | ||
1982 | PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0138, 0x110a), | ||
1983 | PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM28", 0x2e3ee845, 0x0ea978ea), | ||
1984 | PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM33", 0x2e3ee845, 0x80609023), | ||
1985 | PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "CEM56", 0x2e3ee845, 0xa650c32a), | ||
1986 | PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "REM10", 0x2e3ee845, 0x76df1d29), | ||
1987 | PCMCIA_PFC_DEVICE_PROD_ID13(0, "Xircom", "XEM5600", 0x2e3ee845, 0xf1403719), | ||
1988 | PCMCIA_PFC_DEVICE_PROD_ID12(0, "Xircom", "CreditCard Ethernet", 0x2e3ee845, 0xc0e778c2), | ||
1989 | PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x010a), | ||
1990 | PCMCIA_DEVICE_PROD_ID13("Toshiba Information Systems", "TPCENET", 0x1b3b94fe, 0xf381c1a2), | ||
1991 | PCMCIA_DEVICE_PROD_ID13("Xircom", "CE3-10/100", 0x2e3ee845, 0x0ec0ac37), | ||
1992 | PCMCIA_DEVICE_PROD_ID13("Xircom", "PS-CE2-10", 0x2e3ee845, 0x947d9073), | ||
1993 | PCMCIA_DEVICE_PROD_ID13("Xircom", "R2E-100BTX", 0x2e3ee845, 0x2464a6e3), | ||
1994 | PCMCIA_DEVICE_PROD_ID13("Xircom", "RE-10", 0x2e3ee845, 0x3e08d609), | ||
1995 | PCMCIA_DEVICE_PROD_ID13("Xircom", "XE2000", 0x2e3ee845, 0xf7188e46), | ||
1996 | PCMCIA_DEVICE_PROD_ID12("Compaq", "Ethernet LAN Card", 0x54f7c49c, 0x9fd2f0a2), | ||
1997 | PCMCIA_DEVICE_PROD_ID12("Compaq", "Netelligent 10/100 PC Card", 0x54f7c49c, 0xefe96769), | ||
1998 | PCMCIA_DEVICE_PROD_ID12("Intel", "EtherExpress(TM) PRO/100 PC Card Mobile Adapter16", 0x816cc815, 0x174397db), | ||
1999 | PCMCIA_DEVICE_PROD_ID12("Toshiba", "10/100 Ethernet PC Card", 0x44a09d9c, 0xb44deecf), | ||
2000 | /* also matches CFE-10 cards! */ | ||
2001 | /* PCMCIA_DEVICE_MANF_CARD(0x0105, 0x010a), */ | ||
2002 | PCMCIA_DEVICE_NULL, | ||
2003 | }; | ||
2004 | MODULE_DEVICE_TABLE(pcmcia, xirc2ps_ids); | ||
2005 | |||
2006 | |||
1986 | static struct pcmcia_driver xirc2ps_cs_driver = { | 2007 | static struct pcmcia_driver xirc2ps_cs_driver = { |
1987 | .owner = THIS_MODULE, | 2008 | .owner = THIS_MODULE, |
1988 | .drv = { | 2009 | .drv = { |
1989 | .name = "xirc2ps_cs", | 2010 | .name = "xirc2ps_cs", |
1990 | }, | 2011 | }, |
1991 | .attach = xirc2ps_attach, | 2012 | .attach = xirc2ps_attach, |
2013 | .event = xirc2ps_event, | ||
1992 | .detach = xirc2ps_detach, | 2014 | .detach = xirc2ps_detach, |
2015 | .id_table = xirc2ps_ids, | ||
1993 | }; | 2016 | }; |
1994 | 2017 | ||
1995 | static int __init | 2018 | static int __init |
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c index 13f114876965..113b68099216 100644 --- a/drivers/net/pcnet32.c +++ b/drivers/net/pcnet32.c | |||
@@ -850,7 +850,7 @@ static int pcnet32_phys_id(struct net_device *dev, u32 data) | |||
850 | if ((!data) || (data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))) | 850 | if ((!data) || (data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))) |
851 | data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); | 851 | data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); |
852 | 852 | ||
853 | schedule_timeout(data * HZ); | 853 | msleep_interruptible(data * 1000); |
854 | del_timer_sync(&lp->blink_timer); | 854 | del_timer_sync(&lp->blink_timer); |
855 | 855 | ||
856 | /* Restore the original value of the bcrs */ | 856 | /* Restore the original value of the bcrs */ |
@@ -1602,7 +1602,7 @@ pcnet32_init_ring(struct net_device *dev) | |||
1602 | 1602 | ||
1603 | rmb(); | 1603 | rmb(); |
1604 | if (lp->rx_dma_addr[i] == 0) | 1604 | if (lp->rx_dma_addr[i] == 0) |
1605 | lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->tail, | 1605 | lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->data, |
1606 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); | 1606 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); |
1607 | lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]); | 1607 | lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]); |
1608 | lp->rx_ring[i].buf_length = le16_to_cpu(2-PKT_BUF_SZ); | 1608 | lp->rx_ring[i].buf_length = le16_to_cpu(2-PKT_BUF_SZ); |
@@ -1983,7 +1983,7 @@ pcnet32_rx(struct net_device *dev) | |||
1983 | lp->rx_skbuff[entry] = newskb; | 1983 | lp->rx_skbuff[entry] = newskb; |
1984 | newskb->dev = dev; | 1984 | newskb->dev = dev; |
1985 | lp->rx_dma_addr[entry] = | 1985 | lp->rx_dma_addr[entry] = |
1986 | pci_map_single(lp->pci_dev, newskb->tail, | 1986 | pci_map_single(lp->pci_dev, newskb->data, |
1987 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); | 1987 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); |
1988 | lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]); | 1988 | lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]); |
1989 | rx_in_place = 1; | 1989 | rx_in_place = 1; |
@@ -2020,7 +2020,7 @@ pcnet32_rx(struct net_device *dev) | |||
2020 | PKT_BUF_SZ-2, | 2020 | PKT_BUF_SZ-2, |
2021 | PCI_DMA_FROMDEVICE); | 2021 | PCI_DMA_FROMDEVICE); |
2022 | eth_copy_and_sum(skb, | 2022 | eth_copy_and_sum(skb, |
2023 | (unsigned char *)(lp->rx_skbuff[entry]->tail), | 2023 | (unsigned char *)(lp->rx_skbuff[entry]->data), |
2024 | pkt_len,0); | 2024 | pkt_len,0); |
2025 | pci_dma_sync_single_for_device(lp->pci_dev, | 2025 | pci_dma_sync_single_for_device(lp->pci_dev, |
2026 | lp->rx_dma_addr[entry], | 2026 | lp->rx_dma_addr[entry], |
diff --git a/drivers/net/plip.c b/drivers/net/plip.c index f4b62405d2e5..1bd22cd40c75 100644 --- a/drivers/net/plip.c +++ b/drivers/net/plip.c | |||
@@ -160,7 +160,7 @@ static struct net_device_stats *plip_get_stats(struct net_device *dev); | |||
160 | static int plip_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); | 160 | static int plip_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); |
161 | static int plip_preempt(void *handle); | 161 | static int plip_preempt(void *handle); |
162 | static void plip_wakeup(void *handle); | 162 | static void plip_wakeup(void *handle); |
163 | 163 | ||
164 | enum plip_connection_state { | 164 | enum plip_connection_state { |
165 | PLIP_CN_NONE=0, | 165 | PLIP_CN_NONE=0, |
166 | PLIP_CN_RECEIVE, | 166 | PLIP_CN_RECEIVE, |
@@ -231,8 +231,8 @@ struct net_local { | |||
231 | atomic_t kill_timer; | 231 | atomic_t kill_timer; |
232 | struct semaphore killed_timer_sem; | 232 | struct semaphore killed_timer_sem; |
233 | }; | 233 | }; |
234 | 234 | ||
235 | inline static void enable_parport_interrupts (struct net_device *dev) | 235 | static inline void enable_parport_interrupts (struct net_device *dev) |
236 | { | 236 | { |
237 | if (dev->irq != -1) | 237 | if (dev->irq != -1) |
238 | { | 238 | { |
@@ -242,7 +242,7 @@ inline static void enable_parport_interrupts (struct net_device *dev) | |||
242 | } | 242 | } |
243 | } | 243 | } |
244 | 244 | ||
245 | inline static void disable_parport_interrupts (struct net_device *dev) | 245 | static inline void disable_parport_interrupts (struct net_device *dev) |
246 | { | 246 | { |
247 | if (dev->irq != -1) | 247 | if (dev->irq != -1) |
248 | { | 248 | { |
@@ -252,7 +252,7 @@ inline static void disable_parport_interrupts (struct net_device *dev) | |||
252 | } | 252 | } |
253 | } | 253 | } |
254 | 254 | ||
255 | inline static void write_data (struct net_device *dev, unsigned char data) | 255 | static inline void write_data (struct net_device *dev, unsigned char data) |
256 | { | 256 | { |
257 | struct parport *port = | 257 | struct parport *port = |
258 | ((struct net_local *)dev->priv)->pardev->port; | 258 | ((struct net_local *)dev->priv)->pardev->port; |
@@ -260,14 +260,14 @@ inline static void write_data (struct net_device *dev, unsigned char data) | |||
260 | port->ops->write_data (port, data); | 260 | port->ops->write_data (port, data); |
261 | } | 261 | } |
262 | 262 | ||
263 | inline static unsigned char read_status (struct net_device *dev) | 263 | static inline unsigned char read_status (struct net_device *dev) |
264 | { | 264 | { |
265 | struct parport *port = | 265 | struct parport *port = |
266 | ((struct net_local *)dev->priv)->pardev->port; | 266 | ((struct net_local *)dev->priv)->pardev->port; |
267 | 267 | ||
268 | return port->ops->read_status (port); | 268 | return port->ops->read_status (port); |
269 | } | 269 | } |
270 | 270 | ||
271 | /* Entry point of PLIP driver. | 271 | /* Entry point of PLIP driver. |
272 | Probe the hardware, and register/initialize the driver. | 272 | Probe the hardware, and register/initialize the driver. |
273 | 273 | ||
@@ -316,7 +316,7 @@ plip_init_netdev(struct net_device *dev) | |||
316 | 316 | ||
317 | spin_lock_init(&nl->lock); | 317 | spin_lock_init(&nl->lock); |
318 | } | 318 | } |
319 | 319 | ||
320 | /* Bottom half handler for the delayed request. | 320 | /* Bottom half handler for the delayed request. |
321 | This routine is kicked by do_timer(). | 321 | This routine is kicked by do_timer(). |
322 | Request `plip_bh' to be invoked. */ | 322 | Request `plip_bh' to be invoked. */ |
@@ -471,7 +471,7 @@ plip_bh_timeout_error(struct net_device *dev, struct net_local *nl, | |||
471 | 471 | ||
472 | return TIMEOUT; | 472 | return TIMEOUT; |
473 | } | 473 | } |
474 | 474 | ||
475 | static int | 475 | static int |
476 | plip_none(struct net_device *dev, struct net_local *nl, | 476 | plip_none(struct net_device *dev, struct net_local *nl, |
477 | struct plip_local *snd, struct plip_local *rcv) | 477 | struct plip_local *snd, struct plip_local *rcv) |
@@ -481,7 +481,7 @@ plip_none(struct net_device *dev, struct net_local *nl, | |||
481 | 481 | ||
482 | /* PLIP_RECEIVE --- receive a byte(two nibbles) | 482 | /* PLIP_RECEIVE --- receive a byte(two nibbles) |
483 | Returns OK on success, TIMEOUT on timeout */ | 483 | Returns OK on success, TIMEOUT on timeout */ |
484 | inline static int | 484 | static inline int |
485 | plip_receive(unsigned short nibble_timeout, struct net_device *dev, | 485 | plip_receive(unsigned short nibble_timeout, struct net_device *dev, |
486 | enum plip_nibble_state *ns_p, unsigned char *data_p) | 486 | enum plip_nibble_state *ns_p, unsigned char *data_p) |
487 | { | 487 | { |
@@ -540,7 +540,7 @@ plip_receive(unsigned short nibble_timeout, struct net_device *dev, | |||
540 | * in far too many old systems not all even running Linux. | 540 | * in far too many old systems not all even running Linux. |
541 | */ | 541 | */ |
542 | 542 | ||
543 | static unsigned short plip_type_trans(struct sk_buff *skb, struct net_device *dev) | 543 | static __be16 plip_type_trans(struct sk_buff *skb, struct net_device *dev) |
544 | { | 544 | { |
545 | struct ethhdr *eth; | 545 | struct ethhdr *eth; |
546 | unsigned char *rawp; | 546 | unsigned char *rawp; |
@@ -582,7 +582,6 @@ static unsigned short plip_type_trans(struct sk_buff *skb, struct net_device *de | |||
582 | return htons(ETH_P_802_2); | 582 | return htons(ETH_P_802_2); |
583 | } | 583 | } |
584 | 584 | ||
585 | |||
586 | /* PLIP_RECEIVE_PACKET --- receive a packet */ | 585 | /* PLIP_RECEIVE_PACKET --- receive a packet */ |
587 | static int | 586 | static int |
588 | plip_receive_packet(struct net_device *dev, struct net_local *nl, | 587 | plip_receive_packet(struct net_device *dev, struct net_local *nl, |
@@ -702,7 +701,7 @@ plip_receive_packet(struct net_device *dev, struct net_local *nl, | |||
702 | 701 | ||
703 | /* PLIP_SEND --- send a byte (two nibbles) | 702 | /* PLIP_SEND --- send a byte (two nibbles) |
704 | Returns OK on success, TIMEOUT when timeout */ | 703 | Returns OK on success, TIMEOUT when timeout */ |
705 | inline static int | 704 | static inline int |
706 | plip_send(unsigned short nibble_timeout, struct net_device *dev, | 705 | plip_send(unsigned short nibble_timeout, struct net_device *dev, |
707 | enum plip_nibble_state *ns_p, unsigned char data) | 706 | enum plip_nibble_state *ns_p, unsigned char data) |
708 | { | 707 | { |
@@ -902,7 +901,7 @@ plip_error(struct net_device *dev, struct net_local *nl, | |||
902 | 901 | ||
903 | return OK; | 902 | return OK; |
904 | } | 903 | } |
905 | 904 | ||
906 | /* Handle the parallel port interrupts. */ | 905 | /* Handle the parallel port interrupts. */ |
907 | static void | 906 | static void |
908 | plip_interrupt(int irq, void *dev_id, struct pt_regs * regs) | 907 | plip_interrupt(int irq, void *dev_id, struct pt_regs * regs) |
@@ -957,7 +956,7 @@ plip_interrupt(int irq, void *dev_id, struct pt_regs * regs) | |||
957 | 956 | ||
958 | spin_unlock_irq(&nl->lock); | 957 | spin_unlock_irq(&nl->lock); |
959 | } | 958 | } |
960 | 959 | ||
961 | static int | 960 | static int |
962 | plip_tx_packet(struct sk_buff *skb, struct net_device *dev) | 961 | plip_tx_packet(struct sk_buff *skb, struct net_device *dev) |
963 | { | 962 | { |
@@ -1238,7 +1237,7 @@ plip_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |||
1238 | } | 1237 | } |
1239 | return 0; | 1238 | return 0; |
1240 | } | 1239 | } |
1241 | 1240 | ||
1242 | static int parport[PLIP_MAX] = { [0 ... PLIP_MAX-1] = -1 }; | 1241 | static int parport[PLIP_MAX] = { [0 ... PLIP_MAX-1] = -1 }; |
1243 | static int timid; | 1242 | static int timid; |
1244 | 1243 | ||
diff --git a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c index 33b9d79b1aad..59e8183c639e 100644 --- a/drivers/net/ppp_async.c +++ b/drivers/net/ppp_async.c | |||
@@ -364,7 +364,7 @@ ppp_asynctty_receive(struct tty_struct *tty, const unsigned char *buf, | |||
364 | spin_lock_irqsave(&ap->recv_lock, flags); | 364 | spin_lock_irqsave(&ap->recv_lock, flags); |
365 | ppp_async_input(ap, buf, cflags, count); | 365 | ppp_async_input(ap, buf, cflags, count); |
366 | spin_unlock_irqrestore(&ap->recv_lock, flags); | 366 | spin_unlock_irqrestore(&ap->recv_lock, flags); |
367 | if (skb_queue_len(&ap->rqueue)) | 367 | if (!skb_queue_empty(&ap->rqueue)) |
368 | tasklet_schedule(&ap->tsk); | 368 | tasklet_schedule(&ap->tsk); |
369 | ap_put(ap); | 369 | ap_put(ap); |
370 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) | 370 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) |
@@ -1025,7 +1025,7 @@ static void async_lcp_peek(struct asyncppp *ap, unsigned char *data, | |||
1025 | 1025 | ||
1026 | static void __exit ppp_async_cleanup(void) | 1026 | static void __exit ppp_async_cleanup(void) |
1027 | { | 1027 | { |
1028 | if (tty_register_ldisc(N_PPP, NULL) != 0) | 1028 | if (tty_unregister_ldisc(N_PPP) != 0) |
1029 | printk(KERN_ERR "failed to unregister PPP line discipline\n"); | 1029 | printk(KERN_ERR "failed to unregister PPP line discipline\n"); |
1030 | } | 1030 | } |
1031 | 1031 | ||
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index 3b377f6cd4a0..a32668e88e09 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -273,7 +273,7 @@ static int ppp_connect_channel(struct channel *pch, int unit); | |||
273 | static int ppp_disconnect_channel(struct channel *pch); | 273 | static int ppp_disconnect_channel(struct channel *pch); |
274 | static void ppp_destroy_channel(struct channel *pch); | 274 | static void ppp_destroy_channel(struct channel *pch); |
275 | 275 | ||
276 | static struct class_simple *ppp_class; | 276 | static struct class *ppp_class; |
277 | 277 | ||
278 | /* Translates a PPP protocol number to a NP index (NP == network protocol) */ | 278 | /* Translates a PPP protocol number to a NP index (NP == network protocol) */ |
279 | static inline int proto_to_npindex(int proto) | 279 | static inline int proto_to_npindex(int proto) |
@@ -858,12 +858,12 @@ static int __init ppp_init(void) | |||
858 | printk(KERN_INFO "PPP generic driver version " PPP_VERSION "\n"); | 858 | printk(KERN_INFO "PPP generic driver version " PPP_VERSION "\n"); |
859 | err = register_chrdev(PPP_MAJOR, "ppp", &ppp_device_fops); | 859 | err = register_chrdev(PPP_MAJOR, "ppp", &ppp_device_fops); |
860 | if (!err) { | 860 | if (!err) { |
861 | ppp_class = class_simple_create(THIS_MODULE, "ppp"); | 861 | ppp_class = class_create(THIS_MODULE, "ppp"); |
862 | if (IS_ERR(ppp_class)) { | 862 | if (IS_ERR(ppp_class)) { |
863 | err = PTR_ERR(ppp_class); | 863 | err = PTR_ERR(ppp_class); |
864 | goto out_chrdev; | 864 | goto out_chrdev; |
865 | } | 865 | } |
866 | class_simple_device_add(ppp_class, MKDEV(PPP_MAJOR, 0), NULL, "ppp"); | 866 | class_device_create(ppp_class, MKDEV(PPP_MAJOR, 0), NULL, "ppp"); |
867 | err = devfs_mk_cdev(MKDEV(PPP_MAJOR, 0), | 867 | err = devfs_mk_cdev(MKDEV(PPP_MAJOR, 0), |
868 | S_IFCHR|S_IRUSR|S_IWUSR, "ppp"); | 868 | S_IFCHR|S_IRUSR|S_IWUSR, "ppp"); |
869 | if (err) | 869 | if (err) |
@@ -876,8 +876,8 @@ out: | |||
876 | return err; | 876 | return err; |
877 | 877 | ||
878 | out_class: | 878 | out_class: |
879 | class_simple_device_remove(MKDEV(PPP_MAJOR,0)); | 879 | class_device_destroy(ppp_class, MKDEV(PPP_MAJOR,0)); |
880 | class_simple_destroy(ppp_class); | 880 | class_destroy(ppp_class); |
881 | out_chrdev: | 881 | out_chrdev: |
882 | unregister_chrdev(PPP_MAJOR, "ppp"); | 882 | unregister_chrdev(PPP_MAJOR, "ppp"); |
883 | goto out; | 883 | goto out; |
@@ -1217,36 +1217,43 @@ ppp_push(struct ppp *ppp) | |||
1217 | */ | 1217 | */ |
1218 | static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) | 1218 | static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) |
1219 | { | 1219 | { |
1220 | int nch, len, fragsize; | 1220 | int len, fragsize; |
1221 | int i, bits, hdrlen, mtu; | 1221 | int i, bits, hdrlen, mtu; |
1222 | int flen, fnb; | 1222 | int flen; |
1223 | int navail, nfree; | ||
1224 | int nbigger; | ||
1223 | unsigned char *p, *q; | 1225 | unsigned char *p, *q; |
1224 | struct list_head *list; | 1226 | struct list_head *list; |
1225 | struct channel *pch; | 1227 | struct channel *pch; |
1226 | struct sk_buff *frag; | 1228 | struct sk_buff *frag; |
1227 | struct ppp_channel *chan; | 1229 | struct ppp_channel *chan; |
1228 | 1230 | ||
1229 | nch = 0; | 1231 | nfree = 0; /* # channels which have no packet already queued */ |
1232 | navail = 0; /* total # of usable channels (not deregistered) */ | ||
1230 | hdrlen = (ppp->flags & SC_MP_XSHORTSEQ)? MPHDRLEN_SSN: MPHDRLEN; | 1233 | hdrlen = (ppp->flags & SC_MP_XSHORTSEQ)? MPHDRLEN_SSN: MPHDRLEN; |
1234 | i = 0; | ||
1231 | list = &ppp->channels; | 1235 | list = &ppp->channels; |
1232 | while ((list = list->next) != &ppp->channels) { | 1236 | while ((list = list->next) != &ppp->channels) { |
1233 | pch = list_entry(list, struct channel, clist); | 1237 | pch = list_entry(list, struct channel, clist); |
1234 | nch += pch->avail = (skb_queue_len(&pch->file.xq) == 0); | 1238 | navail += pch->avail = (pch->chan != NULL); |
1235 | /* | 1239 | if (pch->avail) { |
1236 | * If a channel hasn't had a fragment yet, it has to get | 1240 | if (skb_queue_empty(&pch->file.xq) || |
1237 | * one before we send any fragments on later channels. | 1241 | !pch->had_frag) { |
1238 | * If it can't take a fragment now, don't give any | 1242 | pch->avail = 2; |
1239 | * to subsequent channels. | 1243 | ++nfree; |
1240 | */ | ||
1241 | if (!pch->had_frag && !pch->avail) { | ||
1242 | while ((list = list->next) != &ppp->channels) { | ||
1243 | pch = list_entry(list, struct channel, clist); | ||
1244 | pch->avail = 0; | ||
1245 | } | 1244 | } |
1246 | break; | 1245 | if (!pch->had_frag && i < ppp->nxchan) |
1246 | ppp->nxchan = i; | ||
1247 | } | 1247 | } |
1248 | ++i; | ||
1248 | } | 1249 | } |
1249 | if (nch == 0) | 1250 | |
1251 | /* | ||
1252 | * Don't start sending this packet unless at least half of | ||
1253 | * the channels are free. This gives much better TCP | ||
1254 | * performance if we have a lot of channels. | ||
1255 | */ | ||
1256 | if (nfree == 0 || nfree < navail / 2) | ||
1250 | return 0; /* can't take now, leave it in xmit_pending */ | 1257 | return 0; /* can't take now, leave it in xmit_pending */ |
1251 | 1258 | ||
1252 | /* Do protocol field compression (XXX this should be optional) */ | 1259 | /* Do protocol field compression (XXX this should be optional) */ |
@@ -1257,14 +1264,19 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) | |||
1257 | --len; | 1264 | --len; |
1258 | } | 1265 | } |
1259 | 1266 | ||
1260 | /* decide on fragment size */ | 1267 | /* |
1268 | * Decide on fragment size. | ||
1269 | * We create a fragment for each free channel regardless of | ||
1270 | * how small they are (i.e. even 0 length) in order to minimize | ||
1271 | * the time that it will take to detect when a channel drops | ||
1272 | * a fragment. | ||
1273 | */ | ||
1261 | fragsize = len; | 1274 | fragsize = len; |
1262 | if (nch > 1) { | 1275 | if (nfree > 1) |
1263 | int maxch = ROUNDUP(len, MIN_FRAG_SIZE); | 1276 | fragsize = ROUNDUP(fragsize, nfree); |
1264 | if (nch > maxch) | 1277 | /* nbigger channels get fragsize bytes, the rest get fragsize-1, |
1265 | nch = maxch; | 1278 | except if nbigger==0, then they all get fragsize. */ |
1266 | fragsize = ROUNDUP(fragsize, nch); | 1279 | nbigger = len % nfree; |
1267 | } | ||
1268 | 1280 | ||
1269 | /* skip to the channel after the one we last used | 1281 | /* skip to the channel after the one we last used |
1270 | and start at that one */ | 1282 | and start at that one */ |
@@ -1278,7 +1290,7 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) | |||
1278 | 1290 | ||
1279 | /* create a fragment for each channel */ | 1291 | /* create a fragment for each channel */ |
1280 | bits = B; | 1292 | bits = B; |
1281 | do { | 1293 | while (nfree > 0 || len > 0) { |
1282 | list = list->next; | 1294 | list = list->next; |
1283 | if (list == &ppp->channels) { | 1295 | if (list == &ppp->channels) { |
1284 | i = 0; | 1296 | i = 0; |
@@ -1289,61 +1301,92 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb) | |||
1289 | if (!pch->avail) | 1301 | if (!pch->avail) |
1290 | continue; | 1302 | continue; |
1291 | 1303 | ||
1304 | /* | ||
1305 | * Skip this channel if it has a fragment pending already and | ||
1306 | * we haven't given a fragment to all of the free channels. | ||
1307 | */ | ||
1308 | if (pch->avail == 1) { | ||
1309 | if (nfree > 0) | ||
1310 | continue; | ||
1311 | } else { | ||
1312 | --nfree; | ||
1313 | pch->avail = 1; | ||
1314 | } | ||
1315 | |||
1292 | /* check the channel's mtu and whether it is still attached. */ | 1316 | /* check the channel's mtu and whether it is still attached. */ |
1293 | spin_lock_bh(&pch->downl); | 1317 | spin_lock_bh(&pch->downl); |
1294 | if (pch->chan == 0 || (mtu = pch->chan->mtu) < hdrlen) { | 1318 | if (pch->chan == NULL) { |
1295 | /* can't use this channel */ | 1319 | /* can't use this channel, it's being deregistered */ |
1296 | spin_unlock_bh(&pch->downl); | 1320 | spin_unlock_bh(&pch->downl); |
1297 | pch->avail = 0; | 1321 | pch->avail = 0; |
1298 | if (--nch == 0) | 1322 | if (--navail == 0) |
1299 | break; | 1323 | break; |
1300 | continue; | 1324 | continue; |
1301 | } | 1325 | } |
1302 | 1326 | ||
1303 | /* | 1327 | /* |
1304 | * We have to create multiple fragments for this channel | 1328 | * Create a fragment for this channel of |
1305 | * if fragsize is greater than the channel's mtu. | 1329 | * min(max(mtu+2-hdrlen, 4), fragsize, len) bytes. |
1330 | * If mtu+2-hdrlen < 4, that is a ridiculously small | ||
1331 | * MTU, so we use mtu = 2 + hdrlen. | ||
1306 | */ | 1332 | */ |
1307 | if (fragsize > len) | 1333 | if (fragsize > len) |
1308 | fragsize = len; | 1334 | fragsize = len; |
1309 | for (flen = fragsize; flen > 0; flen -= fnb) { | 1335 | flen = fragsize; |
1310 | fnb = flen; | 1336 | mtu = pch->chan->mtu + 2 - hdrlen; |
1311 | if (fnb > mtu + 2 - hdrlen) | 1337 | if (mtu < 4) |
1312 | fnb = mtu + 2 - hdrlen; | 1338 | mtu = 4; |
1313 | if (fnb >= len) | 1339 | if (flen > mtu) |
1314 | bits |= E; | 1340 | flen = mtu; |
1315 | frag = alloc_skb(fnb + hdrlen, GFP_ATOMIC); | 1341 | if (flen == len && nfree == 0) |
1316 | if (frag == 0) | 1342 | bits |= E; |
1317 | goto noskb; | 1343 | frag = alloc_skb(flen + hdrlen + (flen == 0), GFP_ATOMIC); |
1318 | q = skb_put(frag, fnb + hdrlen); | 1344 | if (frag == 0) |
1319 | /* make the MP header */ | 1345 | goto noskb; |
1320 | q[0] = PPP_MP >> 8; | 1346 | q = skb_put(frag, flen + hdrlen); |
1321 | q[1] = PPP_MP; | 1347 | |
1322 | if (ppp->flags & SC_MP_XSHORTSEQ) { | 1348 | /* make the MP header */ |
1323 | q[2] = bits + ((ppp->nxseq >> 8) & 0xf); | 1349 | q[0] = PPP_MP >> 8; |
1324 | q[3] = ppp->nxseq; | 1350 | q[1] = PPP_MP; |
1325 | } else { | 1351 | if (ppp->flags & SC_MP_XSHORTSEQ) { |
1326 | q[2] = bits; | 1352 | q[2] = bits + ((ppp->nxseq >> 8) & 0xf); |
1327 | q[3] = ppp->nxseq >> 16; | 1353 | q[3] = ppp->nxseq; |
1328 | q[4] = ppp->nxseq >> 8; | 1354 | } else { |
1329 | q[5] = ppp->nxseq; | 1355 | q[2] = bits; |
1330 | } | 1356 | q[3] = ppp->nxseq >> 16; |
1331 | 1357 | q[4] = ppp->nxseq >> 8; | |
1332 | /* copy the data in */ | 1358 | q[5] = ppp->nxseq; |
1333 | memcpy(q + hdrlen, p, fnb); | ||
1334 | |||
1335 | /* try to send it down the channel */ | ||
1336 | chan = pch->chan; | ||
1337 | if (!chan->ops->start_xmit(chan, frag)) | ||
1338 | skb_queue_tail(&pch->file.xq, frag); | ||
1339 | pch->had_frag = 1; | ||
1340 | p += fnb; | ||
1341 | len -= fnb; | ||
1342 | ++ppp->nxseq; | ||
1343 | bits = 0; | ||
1344 | } | 1359 | } |
1360 | |||
1361 | /* | ||
1362 | * Copy the data in. | ||
1363 | * Unfortunately there is a bug in older versions of | ||
1364 | * the Linux PPP multilink reconstruction code where it | ||
1365 | * drops 0-length fragments. Therefore we make sure the | ||
1366 | * fragment has at least one byte of data. Any bytes | ||
1367 | * we add in this situation will end up as padding on the | ||
1368 | * end of the reconstructed packet. | ||
1369 | */ | ||
1370 | if (flen == 0) | ||
1371 | *skb_put(frag, 1) = 0; | ||
1372 | else | ||
1373 | memcpy(q + hdrlen, p, flen); | ||
1374 | |||
1375 | /* try to send it down the channel */ | ||
1376 | chan = pch->chan; | ||
1377 | if (!skb_queue_empty(&pch->file.xq) || | ||
1378 | !chan->ops->start_xmit(chan, frag)) | ||
1379 | skb_queue_tail(&pch->file.xq, frag); | ||
1380 | pch->had_frag = 1; | ||
1381 | p += flen; | ||
1382 | len -= flen; | ||
1383 | ++ppp->nxseq; | ||
1384 | bits = 0; | ||
1345 | spin_unlock_bh(&pch->downl); | 1385 | spin_unlock_bh(&pch->downl); |
1346 | } while (len > 0); | 1386 | |
1387 | if (--nbigger == 0 && fragsize > 0) | ||
1388 | --fragsize; | ||
1389 | } | ||
1347 | ppp->nxchan = i; | 1390 | ppp->nxchan = i; |
1348 | 1391 | ||
1349 | return 1; | 1392 | return 1; |
@@ -1369,7 +1412,7 @@ ppp_channel_push(struct channel *pch) | |||
1369 | 1412 | ||
1370 | spin_lock_bh(&pch->downl); | 1413 | spin_lock_bh(&pch->downl); |
1371 | if (pch->chan != 0) { | 1414 | if (pch->chan != 0) { |
1372 | while (skb_queue_len(&pch->file.xq) > 0) { | 1415 | while (!skb_queue_empty(&pch->file.xq)) { |
1373 | skb = skb_dequeue(&pch->file.xq); | 1416 | skb = skb_dequeue(&pch->file.xq); |
1374 | if (!pch->chan->ops->start_xmit(pch->chan, skb)) { | 1417 | if (!pch->chan->ops->start_xmit(pch->chan, skb)) { |
1375 | /* put the packet back and try again later */ | 1418 | /* put the packet back and try again later */ |
@@ -1383,7 +1426,7 @@ ppp_channel_push(struct channel *pch) | |||
1383 | } | 1426 | } |
1384 | spin_unlock_bh(&pch->downl); | 1427 | spin_unlock_bh(&pch->downl); |
1385 | /* see if there is anything from the attached unit to be sent */ | 1428 | /* see if there is anything from the attached unit to be sent */ |
1386 | if (skb_queue_len(&pch->file.xq) == 0) { | 1429 | if (skb_queue_empty(&pch->file.xq)) { |
1387 | read_lock_bh(&pch->upl); | 1430 | read_lock_bh(&pch->upl); |
1388 | ppp = pch->ppp; | 1431 | ppp = pch->ppp; |
1389 | if (ppp != 0) | 1432 | if (ppp != 0) |
@@ -1422,7 +1465,7 @@ ppp_input(struct ppp_channel *chan, struct sk_buff *skb) | |||
1422 | kfree_skb(skb); | 1465 | kfree_skb(skb); |
1423 | return; | 1466 | return; |
1424 | } | 1467 | } |
1425 | 1468 | ||
1426 | proto = PPP_PROTO(skb); | 1469 | proto = PPP_PROTO(skb); |
1427 | read_lock_bh(&pch->upl); | 1470 | read_lock_bh(&pch->upl); |
1428 | if (pch->ppp == 0 || proto >= 0xc000 || proto == PPP_CCPFRAG) { | 1471 | if (pch->ppp == 0 || proto >= 0xc000 || proto == PPP_CCPFRAG) { |
@@ -1691,7 +1734,7 @@ ppp_receive_mp_frame(struct ppp *ppp, struct sk_buff *skb, struct channel *pch) | |||
1691 | struct list_head *l; | 1734 | struct list_head *l; |
1692 | int mphdrlen = (ppp->flags & SC_MP_SHORTSEQ)? MPHDRLEN_SSN: MPHDRLEN; | 1735 | int mphdrlen = (ppp->flags & SC_MP_SHORTSEQ)? MPHDRLEN_SSN: MPHDRLEN; |
1693 | 1736 | ||
1694 | if (!pskb_may_pull(skb, mphdrlen + 1) || ppp->mrru == 0) | 1737 | if (!pskb_may_pull(skb, mphdrlen) || ppp->mrru == 0) |
1695 | goto err; /* no good, throw it away */ | 1738 | goto err; /* no good, throw it away */ |
1696 | 1739 | ||
1697 | /* Decode sequence number and begin/end bits */ | 1740 | /* Decode sequence number and begin/end bits */ |
@@ -2611,8 +2654,8 @@ static void __exit ppp_cleanup(void) | |||
2611 | if (unregister_chrdev(PPP_MAJOR, "ppp") != 0) | 2654 | if (unregister_chrdev(PPP_MAJOR, "ppp") != 0) |
2612 | printk(KERN_ERR "PPP: failed to unregister PPP device\n"); | 2655 | printk(KERN_ERR "PPP: failed to unregister PPP device\n"); |
2613 | devfs_remove("ppp"); | 2656 | devfs_remove("ppp"); |
2614 | class_simple_device_remove(MKDEV(PPP_MAJOR, 0)); | 2657 | class_device_destroy(ppp_class, MKDEV(PPP_MAJOR, 0)); |
2615 | class_simple_destroy(ppp_class); | 2658 | class_destroy(ppp_class); |
2616 | } | 2659 | } |
2617 | 2660 | ||
2618 | /* | 2661 | /* |
diff --git a/drivers/net/ppp_synctty.c b/drivers/net/ppp_synctty.c index 7d0150b4c629..4d51c0c8023d 100644 --- a/drivers/net/ppp_synctty.c +++ b/drivers/net/ppp_synctty.c | |||
@@ -406,7 +406,7 @@ ppp_sync_receive(struct tty_struct *tty, const unsigned char *buf, | |||
406 | spin_lock_irqsave(&ap->recv_lock, flags); | 406 | spin_lock_irqsave(&ap->recv_lock, flags); |
407 | ppp_sync_input(ap, buf, cflags, count); | 407 | ppp_sync_input(ap, buf, cflags, count); |
408 | spin_unlock_irqrestore(&ap->recv_lock, flags); | 408 | spin_unlock_irqrestore(&ap->recv_lock, flags); |
409 | if (skb_queue_len(&ap->rqueue)) | 409 | if (!skb_queue_empty(&ap->rqueue)) |
410 | tasklet_schedule(&ap->tsk); | 410 | tasklet_schedule(&ap->tsk); |
411 | sp_put(ap); | 411 | sp_put(ap); |
412 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) | 412 | if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) |
@@ -793,7 +793,7 @@ err: | |||
793 | static void __exit | 793 | static void __exit |
794 | ppp_sync_cleanup(void) | 794 | ppp_sync_cleanup(void) |
795 | { | 795 | { |
796 | if (tty_register_ldisc(N_SYNC_PPP, NULL) != 0) | 796 | if (tty_unregister_ldisc(N_SYNC_PPP) != 0) |
797 | printk(KERN_ERR "failed to unregister Sync PPP line discipline\n"); | 797 | printk(KERN_ERR "failed to unregister Sync PPP line discipline\n"); |
798 | } | 798 | } |
799 | 799 | ||
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index d6d0e43dab65..d5afe05cd826 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -69,7 +69,13 @@ VERSION 2.2LK <2005/01/25> | |||
69 | #include <asm/io.h> | 69 | #include <asm/io.h> |
70 | #include <asm/irq.h> | 70 | #include <asm/irq.h> |
71 | 71 | ||
72 | #define RTL8169_VERSION "2.2LK" | 72 | #ifdef CONFIG_R8169_NAPI |
73 | #define NAPI_SUFFIX "-NAPI" | ||
74 | #else | ||
75 | #define NAPI_SUFFIX "" | ||
76 | #endif | ||
77 | |||
78 | #define RTL8169_VERSION "2.2LK" NAPI_SUFFIX | ||
73 | #define MODULENAME "r8169" | 79 | #define MODULENAME "r8169" |
74 | #define PFX MODULENAME ": " | 80 | #define PFX MODULENAME ": " |
75 | 81 | ||
@@ -85,6 +91,10 @@ VERSION 2.2LK <2005/01/25> | |||
85 | #define dprintk(fmt, args...) do {} while (0) | 91 | #define dprintk(fmt, args...) do {} while (0) |
86 | #endif /* RTL8169_DEBUG */ | 92 | #endif /* RTL8169_DEBUG */ |
87 | 93 | ||
94 | #define R8169_MSG_DEFAULT \ | ||
95 | (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK | NETIF_MSG_IFUP | \ | ||
96 | NETIF_MSG_IFDOWN) | ||
97 | |||
88 | #define TX_BUFFS_AVAIL(tp) \ | 98 | #define TX_BUFFS_AVAIL(tp) \ |
89 | (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) | 99 | (tp->dirty_tx + NUM_TX_DESC - tp->cur_tx - 1) |
90 | 100 | ||
@@ -174,8 +184,9 @@ const static struct { | |||
174 | #undef _R | 184 | #undef _R |
175 | 185 | ||
176 | static struct pci_device_id rtl8169_pci_tbl[] = { | 186 | static struct pci_device_id rtl8169_pci_tbl[] = { |
177 | {0x10ec, 0x8169, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 187 | { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), }, |
178 | {0x1186, 0x4300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, | 188 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4300), }, |
189 | { PCI_DEVICE(0x16ec, 0x0116), }, | ||
179 | {0,}, | 190 | {0,}, |
180 | }; | 191 | }; |
181 | 192 | ||
@@ -183,10 +194,15 @@ MODULE_DEVICE_TABLE(pci, rtl8169_pci_tbl); | |||
183 | 194 | ||
184 | static int rx_copybreak = 200; | 195 | static int rx_copybreak = 200; |
185 | static int use_dac; | 196 | static int use_dac; |
197 | static struct { | ||
198 | u32 msg_enable; | ||
199 | } debug = { -1 }; | ||
186 | 200 | ||
187 | enum RTL8169_registers { | 201 | enum RTL8169_registers { |
188 | MAC0 = 0, /* Ethernet hardware address. */ | 202 | MAC0 = 0, /* Ethernet hardware address. */ |
189 | MAR0 = 8, /* Multicast filter. */ | 203 | MAR0 = 8, /* Multicast filter. */ |
204 | CounterAddrLow = 0x10, | ||
205 | CounterAddrHigh = 0x14, | ||
190 | TxDescStartAddrLow = 0x20, | 206 | TxDescStartAddrLow = 0x20, |
191 | TxDescStartAddrHigh = 0x24, | 207 | TxDescStartAddrHigh = 0x24, |
192 | TxHDescStartAddrLow = 0x28, | 208 | TxHDescStartAddrLow = 0x28, |
@@ -328,6 +344,9 @@ enum RTL8169_register_content { | |||
328 | 344 | ||
329 | /* _TBICSRBit */ | 345 | /* _TBICSRBit */ |
330 | TBILinkOK = 0x02000000, | 346 | TBILinkOK = 0x02000000, |
347 | |||
348 | /* DumpCounterCommand */ | ||
349 | CounterDump = 0x8, | ||
331 | }; | 350 | }; |
332 | 351 | ||
333 | enum _DescStatusBit { | 352 | enum _DescStatusBit { |
@@ -385,6 +404,7 @@ struct rtl8169_private { | |||
385 | struct pci_dev *pci_dev; /* Index of PCI device */ | 404 | struct pci_dev *pci_dev; /* Index of PCI device */ |
386 | struct net_device_stats stats; /* statistics of net device */ | 405 | struct net_device_stats stats; /* statistics of net device */ |
387 | spinlock_t lock; /* spin lock flag */ | 406 | spinlock_t lock; /* spin lock flag */ |
407 | u32 msg_enable; | ||
388 | int chipset; | 408 | int chipset; |
389 | int mac_version; | 409 | int mac_version; |
390 | int phy_version; | 410 | int phy_version; |
@@ -418,9 +438,13 @@ struct rtl8169_private { | |||
418 | MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>"); | 438 | MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>"); |
419 | MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver"); | 439 | MODULE_DESCRIPTION("RealTek RTL-8169 Gigabit Ethernet driver"); |
420 | module_param_array(media, int, &num_media, 0); | 440 | module_param_array(media, int, &num_media, 0); |
441 | MODULE_PARM_DESC(media, "force phy operation. Deprecated by ethtool (8)."); | ||
421 | module_param(rx_copybreak, int, 0); | 442 | module_param(rx_copybreak, int, 0); |
443 | MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames"); | ||
422 | module_param(use_dac, int, 0); | 444 | module_param(use_dac, int, 0); |
423 | MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot."); | 445 | MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot."); |
446 | module_param_named(debug, debug.msg_enable, int, 0); | ||
447 | MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); | ||
424 | MODULE_LICENSE("GPL"); | 448 | MODULE_LICENSE("GPL"); |
425 | MODULE_VERSION(RTL8169_VERSION); | 449 | MODULE_VERSION(RTL8169_VERSION); |
426 | 450 | ||
@@ -433,10 +457,10 @@ static void rtl8169_hw_start(struct net_device *dev); | |||
433 | static int rtl8169_close(struct net_device *dev); | 457 | static int rtl8169_close(struct net_device *dev); |
434 | static void rtl8169_set_rx_mode(struct net_device *dev); | 458 | static void rtl8169_set_rx_mode(struct net_device *dev); |
435 | static void rtl8169_tx_timeout(struct net_device *dev); | 459 | static void rtl8169_tx_timeout(struct net_device *dev); |
436 | static struct net_device_stats *rtl8169_get_stats(struct net_device *netdev); | 460 | static struct net_device_stats *rtl8169_get_stats(struct net_device *dev); |
437 | static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *, | 461 | static int rtl8169_rx_interrupt(struct net_device *, struct rtl8169_private *, |
438 | void __iomem *); | 462 | void __iomem *); |
439 | static int rtl8169_change_mtu(struct net_device *netdev, int new_mtu); | 463 | static int rtl8169_change_mtu(struct net_device *dev, int new_mtu); |
440 | static void rtl8169_down(struct net_device *dev); | 464 | static void rtl8169_down(struct net_device *dev); |
441 | 465 | ||
442 | #ifdef CONFIG_R8169_NAPI | 466 | #ifdef CONFIG_R8169_NAPI |
@@ -543,9 +567,13 @@ static void rtl8169_check_link_status(struct net_device *dev, | |||
543 | spin_lock_irqsave(&tp->lock, flags); | 567 | spin_lock_irqsave(&tp->lock, flags); |
544 | if (tp->link_ok(ioaddr)) { | 568 | if (tp->link_ok(ioaddr)) { |
545 | netif_carrier_on(dev); | 569 | netif_carrier_on(dev); |
546 | printk(KERN_INFO PFX "%s: link up\n", dev->name); | 570 | if (netif_msg_ifup(tp)) |
547 | } else | 571 | printk(KERN_INFO PFX "%s: link up\n", dev->name); |
572 | } else { | ||
573 | if (netif_msg_ifdown(tp)) | ||
574 | printk(KERN_INFO PFX "%s: link down\n", dev->name); | ||
548 | netif_carrier_off(dev); | 575 | netif_carrier_off(dev); |
576 | } | ||
549 | spin_unlock_irqrestore(&tp->lock, flags); | 577 | spin_unlock_irqrestore(&tp->lock, flags); |
550 | } | 578 | } |
551 | 579 | ||
@@ -569,7 +597,7 @@ static void rtl8169_link_option(int idx, u8 *autoneg, u16 *speed, u8 *duplex) | |||
569 | 597 | ||
570 | option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff; | 598 | option = ((idx < MAX_UNITS) && (idx >= 0)) ? media[idx] : 0xff; |
571 | 599 | ||
572 | if ((option != 0xff) && !idx) | 600 | if ((option != 0xff) && !idx && netif_msg_drv(&debug)) |
573 | printk(KERN_WARNING PFX "media option is deprecated.\n"); | 601 | printk(KERN_WARNING PFX "media option is deprecated.\n"); |
574 | 602 | ||
575 | for (p = link_settings; p->media != 0xff; p++) { | 603 | for (p = link_settings; p->media != 0xff; p++) { |
@@ -611,9 +639,11 @@ static int rtl8169_set_speed_tbi(struct net_device *dev, | |||
611 | } else if (autoneg == AUTONEG_ENABLE) | 639 | } else if (autoneg == AUTONEG_ENABLE) |
612 | RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart); | 640 | RTL_W32(TBICSR, reg | TBINwEnable | TBINwRestart); |
613 | else { | 641 | else { |
614 | printk(KERN_WARNING PFX | 642 | if (netif_msg_link(tp)) { |
615 | "%s: incorrect speed setting refused in TBI mode\n", | 643 | printk(KERN_WARNING "%s: " |
616 | dev->name); | 644 | "incorrect speed setting refused in TBI mode\n", |
645 | dev->name); | ||
646 | } | ||
617 | ret = -EOPNOTSUPP; | 647 | ret = -EOPNOTSUPP; |
618 | } | 648 | } |
619 | 649 | ||
@@ -871,12 +901,120 @@ static void rtl8169_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
871 | spin_unlock_irqrestore(&tp->lock, flags); | 901 | spin_unlock_irqrestore(&tp->lock, flags); |
872 | } | 902 | } |
873 | 903 | ||
904 | static u32 rtl8169_get_msglevel(struct net_device *dev) | ||
905 | { | ||
906 | struct rtl8169_private *tp = netdev_priv(dev); | ||
907 | |||
908 | return tp->msg_enable; | ||
909 | } | ||
910 | |||
911 | static void rtl8169_set_msglevel(struct net_device *dev, u32 value) | ||
912 | { | ||
913 | struct rtl8169_private *tp = netdev_priv(dev); | ||
914 | |||
915 | tp->msg_enable = value; | ||
916 | } | ||
917 | |||
918 | static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = { | ||
919 | "tx_packets", | ||
920 | "rx_packets", | ||
921 | "tx_errors", | ||
922 | "rx_errors", | ||
923 | "rx_missed", | ||
924 | "align_errors", | ||
925 | "tx_single_collisions", | ||
926 | "tx_multi_collisions", | ||
927 | "unicast", | ||
928 | "broadcast", | ||
929 | "multicast", | ||
930 | "tx_aborted", | ||
931 | "tx_underrun", | ||
932 | }; | ||
933 | |||
934 | struct rtl8169_counters { | ||
935 | u64 tx_packets; | ||
936 | u64 rx_packets; | ||
937 | u64 tx_errors; | ||
938 | u32 rx_errors; | ||
939 | u16 rx_missed; | ||
940 | u16 align_errors; | ||
941 | u32 tx_one_collision; | ||
942 | u32 tx_multi_collision; | ||
943 | u64 rx_unicast; | ||
944 | u64 rx_broadcast; | ||
945 | u32 rx_multicast; | ||
946 | u16 tx_aborted; | ||
947 | u16 tx_underun; | ||
948 | }; | ||
949 | |||
950 | static int rtl8169_get_stats_count(struct net_device *dev) | ||
951 | { | ||
952 | return ARRAY_SIZE(rtl8169_gstrings); | ||
953 | } | ||
954 | |||
955 | static void rtl8169_get_ethtool_stats(struct net_device *dev, | ||
956 | struct ethtool_stats *stats, u64 *data) | ||
957 | { | ||
958 | struct rtl8169_private *tp = netdev_priv(dev); | ||
959 | void __iomem *ioaddr = tp->mmio_addr; | ||
960 | struct rtl8169_counters *counters; | ||
961 | dma_addr_t paddr; | ||
962 | u32 cmd; | ||
963 | |||
964 | ASSERT_RTNL(); | ||
965 | |||
966 | counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr); | ||
967 | if (!counters) | ||
968 | return; | ||
969 | |||
970 | RTL_W32(CounterAddrHigh, (u64)paddr >> 32); | ||
971 | cmd = (u64)paddr & DMA_32BIT_MASK; | ||
972 | RTL_W32(CounterAddrLow, cmd); | ||
973 | RTL_W32(CounterAddrLow, cmd | CounterDump); | ||
974 | |||
975 | while (RTL_R32(CounterAddrLow) & CounterDump) { | ||
976 | if (msleep_interruptible(1)) | ||
977 | break; | ||
978 | } | ||
979 | |||
980 | RTL_W32(CounterAddrLow, 0); | ||
981 | RTL_W32(CounterAddrHigh, 0); | ||
982 | |||
983 | data[0] = le64_to_cpu(counters->tx_packets); | ||
984 | data[1] = le64_to_cpu(counters->rx_packets); | ||
985 | data[2] = le64_to_cpu(counters->tx_errors); | ||
986 | data[3] = le32_to_cpu(counters->rx_errors); | ||
987 | data[4] = le16_to_cpu(counters->rx_missed); | ||
988 | data[5] = le16_to_cpu(counters->align_errors); | ||
989 | data[6] = le32_to_cpu(counters->tx_one_collision); | ||
990 | data[7] = le32_to_cpu(counters->tx_multi_collision); | ||
991 | data[8] = le64_to_cpu(counters->rx_unicast); | ||
992 | data[9] = le64_to_cpu(counters->rx_broadcast); | ||
993 | data[10] = le32_to_cpu(counters->rx_multicast); | ||
994 | data[11] = le16_to_cpu(counters->tx_aborted); | ||
995 | data[12] = le16_to_cpu(counters->tx_underun); | ||
996 | |||
997 | pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr); | ||
998 | } | ||
999 | |||
1000 | static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data) | ||
1001 | { | ||
1002 | switch(stringset) { | ||
1003 | case ETH_SS_STATS: | ||
1004 | memcpy(data, *rtl8169_gstrings, sizeof(rtl8169_gstrings)); | ||
1005 | break; | ||
1006 | } | ||
1007 | } | ||
1008 | |||
1009 | |||
874 | static struct ethtool_ops rtl8169_ethtool_ops = { | 1010 | static struct ethtool_ops rtl8169_ethtool_ops = { |
875 | .get_drvinfo = rtl8169_get_drvinfo, | 1011 | .get_drvinfo = rtl8169_get_drvinfo, |
876 | .get_regs_len = rtl8169_get_regs_len, | 1012 | .get_regs_len = rtl8169_get_regs_len, |
877 | .get_link = ethtool_op_get_link, | 1013 | .get_link = ethtool_op_get_link, |
878 | .get_settings = rtl8169_get_settings, | 1014 | .get_settings = rtl8169_get_settings, |
879 | .set_settings = rtl8169_set_settings, | 1015 | .set_settings = rtl8169_set_settings, |
1016 | .get_msglevel = rtl8169_get_msglevel, | ||
1017 | .set_msglevel = rtl8169_set_msglevel, | ||
880 | .get_rx_csum = rtl8169_get_rx_csum, | 1018 | .get_rx_csum = rtl8169_get_rx_csum, |
881 | .set_rx_csum = rtl8169_set_rx_csum, | 1019 | .set_rx_csum = rtl8169_set_rx_csum, |
882 | .get_tx_csum = ethtool_op_get_tx_csum, | 1020 | .get_tx_csum = ethtool_op_get_tx_csum, |
@@ -886,6 +1024,9 @@ static struct ethtool_ops rtl8169_ethtool_ops = { | |||
886 | .get_tso = ethtool_op_get_tso, | 1024 | .get_tso = ethtool_op_get_tso, |
887 | .set_tso = ethtool_op_set_tso, | 1025 | .set_tso = ethtool_op_set_tso, |
888 | .get_regs = rtl8169_get_regs, | 1026 | .get_regs = rtl8169_get_regs, |
1027 | .get_strings = rtl8169_get_strings, | ||
1028 | .get_stats_count = rtl8169_get_stats_count, | ||
1029 | .get_ethtool_stats = rtl8169_get_ethtool_stats, | ||
889 | }; | 1030 | }; |
890 | 1031 | ||
891 | static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum, | 1032 | static void rtl8169_write_gmii_reg_bit(void __iomem *ioaddr, int reg, int bitnum, |
@@ -1091,7 +1232,8 @@ static void rtl8169_phy_timer(unsigned long __opaque) | |||
1091 | if (tp->link_ok(ioaddr)) | 1232 | if (tp->link_ok(ioaddr)) |
1092 | goto out_unlock; | 1233 | goto out_unlock; |
1093 | 1234 | ||
1094 | printk(KERN_WARNING PFX "%s: PHY reset until link up\n", dev->name); | 1235 | if (netif_msg_link(tp)) |
1236 | printk(KERN_WARNING "%s: PHY reset until link up\n", dev->name); | ||
1095 | 1237 | ||
1096 | tp->phy_reset_enable(ioaddr); | 1238 | tp->phy_reset_enable(ioaddr); |
1097 | 1239 | ||
@@ -1169,18 +1311,23 @@ rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out, | |||
1169 | /* dev zeroed in alloc_etherdev */ | 1311 | /* dev zeroed in alloc_etherdev */ |
1170 | dev = alloc_etherdev(sizeof (*tp)); | 1312 | dev = alloc_etherdev(sizeof (*tp)); |
1171 | if (dev == NULL) { | 1313 | if (dev == NULL) { |
1172 | printk(KERN_ERR PFX "unable to alloc new ethernet\n"); | 1314 | if (netif_msg_drv(&debug)) |
1315 | printk(KERN_ERR PFX "unable to alloc new ethernet\n"); | ||
1173 | goto err_out; | 1316 | goto err_out; |
1174 | } | 1317 | } |
1175 | 1318 | ||
1176 | SET_MODULE_OWNER(dev); | 1319 | SET_MODULE_OWNER(dev); |
1177 | SET_NETDEV_DEV(dev, &pdev->dev); | 1320 | SET_NETDEV_DEV(dev, &pdev->dev); |
1178 | tp = netdev_priv(dev); | 1321 | tp = netdev_priv(dev); |
1322 | tp->msg_enable = netif_msg_init(debug.msg_enable, R8169_MSG_DEFAULT); | ||
1179 | 1323 | ||
1180 | /* enable device (incl. PCI PM wakeup and hotplug setup) */ | 1324 | /* enable device (incl. PCI PM wakeup and hotplug setup) */ |
1181 | rc = pci_enable_device(pdev); | 1325 | rc = pci_enable_device(pdev); |
1182 | if (rc) { | 1326 | if (rc < 0) { |
1183 | printk(KERN_ERR PFX "%s: enable failure\n", pci_name(pdev)); | 1327 | if (netif_msg_probe(tp)) { |
1328 | printk(KERN_ERR PFX "%s: enable failure\n", | ||
1329 | pci_name(pdev)); | ||
1330 | } | ||
1184 | goto err_out_free_dev; | 1331 | goto err_out_free_dev; |
1185 | } | 1332 | } |
1186 | 1333 | ||
@@ -1196,29 +1343,39 @@ rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out, | |||
1196 | pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command); | 1343 | pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command); |
1197 | acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK; | 1344 | acpi_idle_state = pwr_command & PCI_PM_CTRL_STATE_MASK; |
1198 | } else { | 1345 | } else { |
1199 | printk(KERN_ERR PFX | 1346 | if (netif_msg_probe(tp)) { |
1200 | "Cannot find PowerManagement capability, aborting.\n"); | 1347 | printk(KERN_ERR PFX |
1348 | "Cannot find PowerManagement capability. " | ||
1349 | "Aborting.\n"); | ||
1350 | } | ||
1201 | goto err_out_mwi; | 1351 | goto err_out_mwi; |
1202 | } | 1352 | } |
1203 | 1353 | ||
1204 | /* make sure PCI base addr 1 is MMIO */ | 1354 | /* make sure PCI base addr 1 is MMIO */ |
1205 | if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { | 1355 | if (!(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) { |
1206 | printk(KERN_ERR PFX | 1356 | if (netif_msg_probe(tp)) { |
1207 | "region #1 not an MMIO resource, aborting\n"); | 1357 | printk(KERN_ERR PFX |
1358 | "region #1 not an MMIO resource, aborting\n"); | ||
1359 | } | ||
1208 | rc = -ENODEV; | 1360 | rc = -ENODEV; |
1209 | goto err_out_mwi; | 1361 | goto err_out_mwi; |
1210 | } | 1362 | } |
1211 | /* check for weird/broken PCI region reporting */ | 1363 | /* check for weird/broken PCI region reporting */ |
1212 | if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) { | 1364 | if (pci_resource_len(pdev, 1) < R8169_REGS_SIZE) { |
1213 | printk(KERN_ERR PFX "Invalid PCI region size(s), aborting\n"); | 1365 | if (netif_msg_probe(tp)) { |
1366 | printk(KERN_ERR PFX | ||
1367 | "Invalid PCI region size(s), aborting\n"); | ||
1368 | } | ||
1214 | rc = -ENODEV; | 1369 | rc = -ENODEV; |
1215 | goto err_out_mwi; | 1370 | goto err_out_mwi; |
1216 | } | 1371 | } |
1217 | 1372 | ||
1218 | rc = pci_request_regions(pdev, MODULENAME); | 1373 | rc = pci_request_regions(pdev, MODULENAME); |
1219 | if (rc) { | 1374 | if (rc < 0) { |
1220 | printk(KERN_ERR PFX "%s: could not request regions.\n", | 1375 | if (netif_msg_probe(tp)) { |
1221 | pci_name(pdev)); | 1376 | printk(KERN_ERR PFX "%s: could not request regions.\n", |
1377 | pci_name(pdev)); | ||
1378 | } | ||
1222 | goto err_out_mwi; | 1379 | goto err_out_mwi; |
1223 | } | 1380 | } |
1224 | 1381 | ||
@@ -1231,7 +1388,10 @@ rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out, | |||
1231 | } else { | 1388 | } else { |
1232 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | 1389 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
1233 | if (rc < 0) { | 1390 | if (rc < 0) { |
1234 | printk(KERN_ERR PFX "DMA configuration failed.\n"); | 1391 | if (netif_msg_probe(tp)) { |
1392 | printk(KERN_ERR PFX | ||
1393 | "DMA configuration failed.\n"); | ||
1394 | } | ||
1235 | goto err_out_free_res; | 1395 | goto err_out_free_res; |
1236 | } | 1396 | } |
1237 | } | 1397 | } |
@@ -1241,7 +1401,8 @@ rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out, | |||
1241 | /* ioremap MMIO region */ | 1401 | /* ioremap MMIO region */ |
1242 | ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE); | 1402 | ioaddr = ioremap(pci_resource_start(pdev, 1), R8169_REGS_SIZE); |
1243 | if (ioaddr == NULL) { | 1403 | if (ioaddr == NULL) { |
1244 | printk(KERN_ERR PFX "cannot remap MMIO, aborting\n"); | 1404 | if (netif_msg_probe(tp)) |
1405 | printk(KERN_ERR PFX "cannot remap MMIO, aborting\n"); | ||
1245 | rc = -EIO; | 1406 | rc = -EIO; |
1246 | goto err_out_free_res; | 1407 | goto err_out_free_res; |
1247 | } | 1408 | } |
@@ -1272,9 +1433,11 @@ rtl8169_init_board(struct pci_dev *pdev, struct net_device **dev_out, | |||
1272 | } | 1433 | } |
1273 | if (i < 0) { | 1434 | if (i < 0) { |
1274 | /* Unknown chip: assume array element #0, original RTL-8169 */ | 1435 | /* Unknown chip: assume array element #0, original RTL-8169 */ |
1275 | printk(KERN_DEBUG PFX | 1436 | if (netif_msg_probe(tp)) { |
1276 | "PCI device %s: unknown chip version, assuming %s\n", | 1437 | printk(KERN_DEBUG PFX "PCI device %s: " |
1277 | pci_name(pdev), rtl_chip_info[0].name); | 1438 | "unknown chip version, assuming %s\n", |
1439 | pci_name(pdev), rtl_chip_info[0].name); | ||
1440 | } | ||
1278 | i++; | 1441 | i++; |
1279 | } | 1442 | } |
1280 | tp->chipset = i; | 1443 | tp->chipset = i; |
@@ -1308,7 +1471,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1308 | struct rtl8169_private *tp; | 1471 | struct rtl8169_private *tp; |
1309 | void __iomem *ioaddr = NULL; | 1472 | void __iomem *ioaddr = NULL; |
1310 | static int board_idx = -1; | 1473 | static int board_idx = -1; |
1311 | static int printed_version = 0; | ||
1312 | u8 autoneg, duplex; | 1474 | u8 autoneg, duplex; |
1313 | u16 speed; | 1475 | u16 speed; |
1314 | int i, rc; | 1476 | int i, rc; |
@@ -1318,10 +1480,9 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1318 | 1480 | ||
1319 | board_idx++; | 1481 | board_idx++; |
1320 | 1482 | ||
1321 | if (!printed_version) { | 1483 | if (netif_msg_drv(&debug)) { |
1322 | printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n", | 1484 | printk(KERN_INFO "%s Gigabit Ethernet driver %s loaded\n", |
1323 | MODULENAME, RTL8169_VERSION); | 1485 | MODULENAME, RTL8169_VERSION); |
1324 | printed_version = 1; | ||
1325 | } | 1486 | } |
1326 | 1487 | ||
1327 | rc = rtl8169_init_board(pdev, &dev, &ioaddr); | 1488 | rc = rtl8169_init_board(pdev, &dev, &ioaddr); |
@@ -1366,7 +1527,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1366 | #ifdef CONFIG_R8169_NAPI | 1527 | #ifdef CONFIG_R8169_NAPI |
1367 | dev->poll = rtl8169_poll; | 1528 | dev->poll = rtl8169_poll; |
1368 | dev->weight = R8169_NAPI_WEIGHT; | 1529 | dev->weight = R8169_NAPI_WEIGHT; |
1369 | printk(KERN_INFO PFX "NAPI enabled\n"); | ||
1370 | #endif | 1530 | #endif |
1371 | 1531 | ||
1372 | #ifdef CONFIG_R8169_VLAN | 1532 | #ifdef CONFIG_R8169_VLAN |
@@ -1391,20 +1551,24 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1391 | return rc; | 1551 | return rc; |
1392 | } | 1552 | } |
1393 | 1553 | ||
1394 | printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", dev->name, | 1554 | if (netif_msg_probe(tp)) { |
1395 | rtl_chip_info[tp->chipset].name); | 1555 | printk(KERN_DEBUG "%s: Identified chip type is '%s'.\n", |
1556 | dev->name, rtl_chip_info[tp->chipset].name); | ||
1557 | } | ||
1396 | 1558 | ||
1397 | pci_set_drvdata(pdev, dev); | 1559 | pci_set_drvdata(pdev, dev); |
1398 | 1560 | ||
1399 | printk(KERN_INFO "%s: %s at 0x%lx, " | 1561 | if (netif_msg_probe(tp)) { |
1400 | "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " | 1562 | printk(KERN_INFO "%s: %s at 0x%lx, " |
1401 | "IRQ %d\n", | 1563 | "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " |
1402 | dev->name, | 1564 | "IRQ %d\n", |
1403 | rtl_chip_info[ent->driver_data].name, | 1565 | dev->name, |
1404 | dev->base_addr, | 1566 | rtl_chip_info[ent->driver_data].name, |
1405 | dev->dev_addr[0], dev->dev_addr[1], | 1567 | dev->base_addr, |
1406 | dev->dev_addr[2], dev->dev_addr[3], | 1568 | dev->dev_addr[0], dev->dev_addr[1], |
1407 | dev->dev_addr[4], dev->dev_addr[5], dev->irq); | 1569 | dev->dev_addr[2], dev->dev_addr[3], |
1570 | dev->dev_addr[4], dev->dev_addr[5], dev->irq); | ||
1571 | } | ||
1408 | 1572 | ||
1409 | rtl8169_hw_phy_config(dev); | 1573 | rtl8169_hw_phy_config(dev); |
1410 | 1574 | ||
@@ -1427,7 +1591,7 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1427 | 1591 | ||
1428 | rtl8169_set_speed(dev, autoneg, speed, duplex); | 1592 | rtl8169_set_speed(dev, autoneg, speed, duplex); |
1429 | 1593 | ||
1430 | if (RTL_R8(PHYstatus) & TBI_Enable) | 1594 | if ((RTL_R8(PHYstatus) & TBI_Enable) && netif_msg_link(tp)) |
1431 | printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name); | 1595 | printk(KERN_INFO PFX "%s: TBI auto-negotiating\n", dev->name); |
1432 | 1596 | ||
1433 | return 0; | 1597 | return 0; |
@@ -1712,7 +1876,7 @@ static int rtl8169_alloc_rx_skb(struct pci_dev *pdev, struct sk_buff **sk_buff, | |||
1712 | skb_reserve(skb, NET_IP_ALIGN); | 1876 | skb_reserve(skb, NET_IP_ALIGN); |
1713 | *sk_buff = skb; | 1877 | *sk_buff = skb; |
1714 | 1878 | ||
1715 | mapping = pci_map_single(pdev, skb->tail, rx_buf_sz, | 1879 | mapping = pci_map_single(pdev, skb->data, rx_buf_sz, |
1716 | PCI_DMA_FROMDEVICE); | 1880 | PCI_DMA_FROMDEVICE); |
1717 | 1881 | ||
1718 | rtl8169_map_to_asic(desc, mapping, rx_buf_sz); | 1882 | rtl8169_map_to_asic(desc, mapping, rx_buf_sz); |
@@ -1860,8 +2024,13 @@ static void rtl8169_reinit_task(void *_data) | |||
1860 | ret = rtl8169_open(dev); | 2024 | ret = rtl8169_open(dev); |
1861 | if (unlikely(ret < 0)) { | 2025 | if (unlikely(ret < 0)) { |
1862 | if (net_ratelimit()) { | 2026 | if (net_ratelimit()) { |
1863 | printk(PFX KERN_ERR "%s: reinit failure (status = %d)." | 2027 | struct rtl8169_private *tp = netdev_priv(dev); |
1864 | " Rescheduling.\n", dev->name, ret); | 2028 | |
2029 | if (netif_msg_drv(tp)) { | ||
2030 | printk(PFX KERN_ERR | ||
2031 | "%s: reinit failure (status = %d)." | ||
2032 | " Rescheduling.\n", dev->name, ret); | ||
2033 | } | ||
1865 | } | 2034 | } |
1866 | rtl8169_schedule_work(dev, rtl8169_reinit_task); | 2035 | rtl8169_schedule_work(dev, rtl8169_reinit_task); |
1867 | } | 2036 | } |
@@ -1886,8 +2055,12 @@ static void rtl8169_reset_task(void *_data) | |||
1886 | netif_wake_queue(dev); | 2055 | netif_wake_queue(dev); |
1887 | } else { | 2056 | } else { |
1888 | if (net_ratelimit()) { | 2057 | if (net_ratelimit()) { |
1889 | printk(PFX KERN_EMERG "%s: Rx buffers shortage\n", | 2058 | struct rtl8169_private *tp = netdev_priv(dev); |
1890 | dev->name); | 2059 | |
2060 | if (netif_msg_intr(tp)) { | ||
2061 | printk(PFX KERN_EMERG | ||
2062 | "%s: Rx buffers shortage\n", dev->name); | ||
2063 | } | ||
1891 | } | 2064 | } |
1892 | rtl8169_schedule_work(dev, rtl8169_reset_task); | 2065 | rtl8169_schedule_work(dev, rtl8169_reset_task); |
1893 | } | 2066 | } |
@@ -1973,8 +2146,11 @@ static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1973 | int ret = 0; | 2146 | int ret = 0; |
1974 | 2147 | ||
1975 | if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) { | 2148 | if (unlikely(TX_BUFFS_AVAIL(tp) < skb_shinfo(skb)->nr_frags)) { |
1976 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n", | 2149 | if (netif_msg_drv(tp)) { |
1977 | dev->name); | 2150 | printk(KERN_ERR |
2151 | "%s: BUG! Tx Ring full when queue awake!\n", | ||
2152 | dev->name); | ||
2153 | } | ||
1978 | goto err_stop; | 2154 | goto err_stop; |
1979 | } | 2155 | } |
1980 | 2156 | ||
@@ -2049,8 +2225,11 @@ static void rtl8169_pcierr_interrupt(struct net_device *dev) | |||
2049 | pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd); | 2225 | pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd); |
2050 | pci_read_config_word(pdev, PCI_STATUS, &pci_status); | 2226 | pci_read_config_word(pdev, PCI_STATUS, &pci_status); |
2051 | 2227 | ||
2052 | printk(KERN_ERR PFX "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n", | 2228 | if (netif_msg_intr(tp)) { |
2053 | dev->name, pci_cmd, pci_status); | 2229 | printk(KERN_ERR |
2230 | "%s: PCI error (cmd = 0x%04x, status = 0x%04x).\n", | ||
2231 | dev->name, pci_cmd, pci_status); | ||
2232 | } | ||
2054 | 2233 | ||
2055 | /* | 2234 | /* |
2056 | * The recovery sequence below admits a very elaborated explanation: | 2235 | * The recovery sequence below admits a very elaborated explanation: |
@@ -2069,7 +2248,8 @@ static void rtl8169_pcierr_interrupt(struct net_device *dev) | |||
2069 | 2248 | ||
2070 | /* The infamous DAC f*ckup only happens at boot time */ | 2249 | /* The infamous DAC f*ckup only happens at boot time */ |
2071 | if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) { | 2250 | if ((tp->cp_cmd & PCIDAC) && !tp->dirty_rx && !tp->cur_rx) { |
2072 | printk(KERN_INFO PFX "%s: disabling PCI DAC.\n", dev->name); | 2251 | if (netif_msg_intr(tp)) |
2252 | printk(KERN_INFO "%s: disabling PCI DAC.\n", dev->name); | ||
2073 | tp->cp_cmd &= ~PCIDAC; | 2253 | tp->cp_cmd &= ~PCIDAC; |
2074 | RTL_W16(CPlusCmd, tp->cp_cmd); | 2254 | RTL_W16(CPlusCmd, tp->cp_cmd); |
2075 | dev->features &= ~NETIF_F_HIGHDMA; | 2255 | dev->features &= ~NETIF_F_HIGHDMA; |
@@ -2156,7 +2336,7 @@ static inline int rtl8169_try_rx_copy(struct sk_buff **sk_buff, int pkt_size, | |||
2156 | skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN); | 2336 | skb = dev_alloc_skb(pkt_size + NET_IP_ALIGN); |
2157 | if (skb) { | 2337 | if (skb) { |
2158 | skb_reserve(skb, NET_IP_ALIGN); | 2338 | skb_reserve(skb, NET_IP_ALIGN); |
2159 | eth_copy_and_sum(skb, sk_buff[0]->tail, pkt_size, 0); | 2339 | eth_copy_and_sum(skb, sk_buff[0]->data, pkt_size, 0); |
2160 | *sk_buff = skb; | 2340 | *sk_buff = skb; |
2161 | rtl8169_mark_to_asic(desc, rx_buf_sz); | 2341 | rtl8169_mark_to_asic(desc, rx_buf_sz); |
2162 | ret = 0; | 2342 | ret = 0; |
@@ -2180,7 +2360,7 @@ rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp, | |||
2180 | rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx; | 2360 | rx_left = NUM_RX_DESC + tp->dirty_rx - cur_rx; |
2181 | rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota); | 2361 | rx_left = rtl8169_rx_quota(rx_left, (u32) dev->quota); |
2182 | 2362 | ||
2183 | while (rx_left > 0) { | 2363 | for (; rx_left > 0; rx_left--, cur_rx++) { |
2184 | unsigned int entry = cur_rx % NUM_RX_DESC; | 2364 | unsigned int entry = cur_rx % NUM_RX_DESC; |
2185 | struct RxDesc *desc = tp->RxDescArray + entry; | 2365 | struct RxDesc *desc = tp->RxDescArray + entry; |
2186 | u32 status; | 2366 | u32 status; |
@@ -2190,9 +2370,12 @@ rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp, | |||
2190 | 2370 | ||
2191 | if (status & DescOwn) | 2371 | if (status & DescOwn) |
2192 | break; | 2372 | break; |
2193 | if (status & RxRES) { | 2373 | if (unlikely(status & RxRES)) { |
2194 | printk(KERN_INFO "%s: Rx ERROR. status = %08x\n", | 2374 | if (netif_msg_rx_err(tp)) { |
2195 | dev->name, status); | 2375 | printk(KERN_INFO |
2376 | "%s: Rx ERROR. status = %08x\n", | ||
2377 | dev->name, status); | ||
2378 | } | ||
2196 | tp->stats.rx_errors++; | 2379 | tp->stats.rx_errors++; |
2197 | if (status & (RxRWT | RxRUNT)) | 2380 | if (status & (RxRWT | RxRUNT)) |
2198 | tp->stats.rx_length_errors++; | 2381 | tp->stats.rx_length_errors++; |
@@ -2214,7 +2397,7 @@ rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp, | |||
2214 | tp->stats.rx_dropped++; | 2397 | tp->stats.rx_dropped++; |
2215 | tp->stats.rx_length_errors++; | 2398 | tp->stats.rx_length_errors++; |
2216 | rtl8169_mark_to_asic(desc, tp->rx_buf_sz); | 2399 | rtl8169_mark_to_asic(desc, tp->rx_buf_sz); |
2217 | goto move_on; | 2400 | continue; |
2218 | } | 2401 | } |
2219 | 2402 | ||
2220 | rtl8169_rx_csum(skb, desc); | 2403 | rtl8169_rx_csum(skb, desc); |
@@ -2243,16 +2426,13 @@ rtl8169_rx_interrupt(struct net_device *dev, struct rtl8169_private *tp, | |||
2243 | tp->stats.rx_bytes += pkt_size; | 2426 | tp->stats.rx_bytes += pkt_size; |
2244 | tp->stats.rx_packets++; | 2427 | tp->stats.rx_packets++; |
2245 | } | 2428 | } |
2246 | move_on: | ||
2247 | cur_rx++; | ||
2248 | rx_left--; | ||
2249 | } | 2429 | } |
2250 | 2430 | ||
2251 | count = cur_rx - tp->cur_rx; | 2431 | count = cur_rx - tp->cur_rx; |
2252 | tp->cur_rx = cur_rx; | 2432 | tp->cur_rx = cur_rx; |
2253 | 2433 | ||
2254 | delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx); | 2434 | delta = rtl8169_rx_fill(tp, dev, tp->dirty_rx, tp->cur_rx); |
2255 | if (!delta && count) | 2435 | if (!delta && count && netif_msg_intr(tp)) |
2256 | printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name); | 2436 | printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name); |
2257 | tp->dirty_rx += delta; | 2437 | tp->dirty_rx += delta; |
2258 | 2438 | ||
@@ -2263,7 +2443,7 @@ move_on: | |||
2263 | * after refill ? | 2443 | * after refill ? |
2264 | * - how do others driver handle this condition (Uh oh...). | 2444 | * - how do others driver handle this condition (Uh oh...). |
2265 | */ | 2445 | */ |
2266 | if (tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) | 2446 | if ((tp->dirty_rx + NUM_RX_DESC == tp->cur_rx) && netif_msg_intr(tp)) |
2267 | printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name); | 2447 | printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name); |
2268 | 2448 | ||
2269 | return count; | 2449 | return count; |
@@ -2315,7 +2495,7 @@ rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | |||
2315 | 2495 | ||
2316 | if (likely(netif_rx_schedule_prep(dev))) | 2496 | if (likely(netif_rx_schedule_prep(dev))) |
2317 | __netif_rx_schedule(dev); | 2497 | __netif_rx_schedule(dev); |
2318 | else { | 2498 | else if (netif_msg_intr(tp)) { |
2319 | printk(KERN_INFO "%s: interrupt %04x taken in poll\n", | 2499 | printk(KERN_INFO "%s: interrupt %04x taken in poll\n", |
2320 | dev->name, status); | 2500 | dev->name, status); |
2321 | } | 2501 | } |
@@ -2334,8 +2514,10 @@ rtl8169_interrupt(int irq, void *dev_instance, struct pt_regs *regs) | |||
2334 | } while (boguscnt > 0); | 2514 | } while (boguscnt > 0); |
2335 | 2515 | ||
2336 | if (boguscnt <= 0) { | 2516 | if (boguscnt <= 0) { |
2337 | printk(KERN_WARNING "%s: Too much work at interrupt!\n", | 2517 | if (net_ratelimit() && netif_msg_intr(tp)) { |
2338 | dev->name); | 2518 | printk(KERN_WARNING |
2519 | "%s: Too much work at interrupt!\n", dev->name); | ||
2520 | } | ||
2339 | /* Clear all interrupt sources. */ | 2521 | /* Clear all interrupt sources. */ |
2340 | RTL_W16(IntrStatus, 0xffff); | 2522 | RTL_W16(IntrStatus, 0xffff); |
2341 | } | 2523 | } |
@@ -2458,8 +2640,10 @@ rtl8169_set_rx_mode(struct net_device *dev) | |||
2458 | 2640 | ||
2459 | if (dev->flags & IFF_PROMISC) { | 2641 | if (dev->flags & IFF_PROMISC) { |
2460 | /* Unconditionally log net taps. */ | 2642 | /* Unconditionally log net taps. */ |
2461 | printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", | 2643 | if (netif_msg_link(tp)) { |
2462 | dev->name); | 2644 | printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", |
2645 | dev->name); | ||
2646 | } | ||
2463 | rx_mode = | 2647 | rx_mode = |
2464 | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | | 2648 | AcceptBroadcast | AcceptMulticast | AcceptMyPhys | |
2465 | AcceptAllPhys; | 2649 | AcceptAllPhys; |
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index 9c224eba057d..ea638b162d3f 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/errno.h> | 42 | #include <linux/errno.h> |
43 | #include <linux/ioport.h> | 43 | #include <linux/ioport.h> |
44 | #include <linux/pci.h> | 44 | #include <linux/pci.h> |
45 | #include <linux/dma-mapping.h> | ||
45 | #include <linux/kernel.h> | 46 | #include <linux/kernel.h> |
46 | #include <linux/netdevice.h> | 47 | #include <linux/netdevice.h> |
47 | #include <linux/etherdevice.h> | 48 | #include <linux/etherdevice.h> |
@@ -1698,11 +1699,9 @@ static int fill_rx_buffers(struct s2io_nic *nic, int ring_no) | |||
1698 | #else | 1699 | #else |
1699 | ba = &nic->ba[ring_no][block_no][off]; | 1700 | ba = &nic->ba[ring_no][block_no][off]; |
1700 | skb_reserve(skb, BUF0_LEN); | 1701 | skb_reserve(skb, BUF0_LEN); |
1701 | tmp = (unsigned long) skb->data; | 1702 | tmp = ((unsigned long) skb->data & ALIGN_SIZE); |
1702 | tmp += ALIGN_SIZE; | 1703 | if (tmp) |
1703 | tmp &= ~ALIGN_SIZE; | 1704 | skb_reserve(skb, (ALIGN_SIZE + 1) - tmp); |
1704 | skb->data = (void *) tmp; | ||
1705 | skb->tail = (void *) tmp; | ||
1706 | 1705 | ||
1707 | memset(rxdp, 0, sizeof(RxD_t)); | 1706 | memset(rxdp, 0, sizeof(RxD_t)); |
1708 | rxdp->Buffer2_ptr = pci_map_single | 1707 | rxdp->Buffer2_ptr = pci_map_single |
@@ -4593,19 +4592,19 @@ s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre) | |||
4593 | return ret; | 4592 | return ret; |
4594 | } | 4593 | } |
4595 | 4594 | ||
4596 | if (!pci_set_dma_mask(pdev, 0xffffffffffffffffULL)) { | 4595 | if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
4597 | DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n"); | 4596 | DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n"); |
4598 | dma_flag = TRUE; | 4597 | dma_flag = TRUE; |
4599 | 4598 | ||
4600 | if (pci_set_consistent_dma_mask | 4599 | if (pci_set_consistent_dma_mask |
4601 | (pdev, 0xffffffffffffffffULL)) { | 4600 | (pdev, DMA_64BIT_MASK)) { |
4602 | DBG_PRINT(ERR_DBG, | 4601 | DBG_PRINT(ERR_DBG, |
4603 | "Unable to obtain 64bit DMA for \ | 4602 | "Unable to obtain 64bit DMA for \ |
4604 | consistent allocations\n"); | 4603 | consistent allocations\n"); |
4605 | pci_disable_device(pdev); | 4604 | pci_disable_device(pdev); |
4606 | return -ENOMEM; | 4605 | return -ENOMEM; |
4607 | } | 4606 | } |
4608 | } else if (!pci_set_dma_mask(pdev, 0xffffffffUL)) { | 4607 | } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
4609 | DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n"); | 4608 | DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n"); |
4610 | } else { | 4609 | } else { |
4611 | pci_disable_device(pdev); | 4610 | pci_disable_device(pdev); |
diff --git a/drivers/net/sb1000.c b/drivers/net/sb1000.c index e15369c8d165..d6388e1533f0 100644 --- a/drivers/net/sb1000.c +++ b/drivers/net/sb1000.c | |||
@@ -90,7 +90,6 @@ static int sb1000_close(struct net_device *dev); | |||
90 | 90 | ||
91 | 91 | ||
92 | /* SB1000 hardware routines to be used during open/configuration phases */ | 92 | /* SB1000 hardware routines to be used during open/configuration phases */ |
93 | static inline void nicedelay(unsigned long usecs); | ||
94 | static inline int card_wait_for_busy_clear(const int ioaddr[], | 93 | static inline int card_wait_for_busy_clear(const int ioaddr[], |
95 | const char* name); | 94 | const char* name); |
96 | static inline int card_wait_for_ready(const int ioaddr[], const char* name, | 95 | static inline int card_wait_for_ready(const int ioaddr[], const char* name, |
@@ -254,13 +253,6 @@ static struct pnp_driver sb1000_driver = { | |||
254 | 253 | ||
255 | static const int TimeOutJiffies = (875 * HZ) / 100; | 254 | static const int TimeOutJiffies = (875 * HZ) / 100; |
256 | 255 | ||
257 | static inline void nicedelay(unsigned long usecs) | ||
258 | { | ||
259 | current->state = TASK_INTERRUPTIBLE; | ||
260 | schedule_timeout(HZ); | ||
261 | return; | ||
262 | } | ||
263 | |||
264 | /* Card Wait For Busy Clear (cannot be used during an interrupt) */ | 256 | /* Card Wait For Busy Clear (cannot be used during an interrupt) */ |
265 | static inline int | 257 | static inline int |
266 | card_wait_for_busy_clear(const int ioaddr[], const char* name) | 258 | card_wait_for_busy_clear(const int ioaddr[], const char* name) |
@@ -475,7 +467,7 @@ sb1000_reset(const int ioaddr[], const char* name) | |||
475 | udelay(1000); | 467 | udelay(1000); |
476 | outb(0x0, port); | 468 | outb(0x0, port); |
477 | inb(port); | 469 | inb(port); |
478 | nicedelay(60000); | 470 | ssleep(1); |
479 | outb(0x4, port); | 471 | outb(0x4, port); |
480 | inb(port); | 472 | inb(port); |
481 | udelay(1000); | 473 | udelay(1000); |
@@ -537,7 +529,7 @@ sb1000_activate(const int ioaddr[], const char* name) | |||
537 | const unsigned char Command0[6] = {0x80, 0x11, 0x00, 0x00, 0x00, 0x00}; | 529 | const unsigned char Command0[6] = {0x80, 0x11, 0x00, 0x00, 0x00, 0x00}; |
538 | const unsigned char Command1[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00}; | 530 | const unsigned char Command1[6] = {0x80, 0x16, 0x00, 0x00, 0x00, 0x00}; |
539 | 531 | ||
540 | nicedelay(50000); | 532 | ssleep(1); |
541 | if ((status = card_send_command(ioaddr, name, Command0, st))) | 533 | if ((status = card_send_command(ioaddr, name, Command0, st))) |
542 | return status; | 534 | return status; |
543 | if ((status = card_send_command(ioaddr, name, Command1, st))) | 535 | if ((status = card_send_command(ioaddr, name, Command1, st))) |
@@ -944,7 +936,7 @@ sb1000_open(struct net_device *dev) | |||
944 | /* initialize sb1000 */ | 936 | /* initialize sb1000 */ |
945 | if ((status = sb1000_reset(ioaddr, name))) | 937 | if ((status = sb1000_reset(ioaddr, name))) |
946 | return status; | 938 | return status; |
947 | nicedelay(200000); | 939 | ssleep(1); |
948 | if ((status = sb1000_check_CRC(ioaddr, name))) | 940 | if ((status = sb1000_check_CRC(ioaddr, name))) |
949 | return status; | 941 | return status; |
950 | 942 | ||
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c index fd2e7c374906..7abd55a4fb21 100644 --- a/drivers/net/sb1250-mac.c +++ b/drivers/net/sb1250-mac.c | |||
@@ -963,11 +963,11 @@ static int sbdma_add_rcvbuffer(sbmacdma_t *d,struct sk_buff *sb) | |||
963 | /* | 963 | /* |
964 | * Do not interrupt per DMA transfer. | 964 | * Do not interrupt per DMA transfer. |
965 | */ | 965 | */ |
966 | dsc->dscr_a = virt_to_phys(sb_new->tail) | | 966 | dsc->dscr_a = virt_to_phys(sb_new->data) | |
967 | V_DMA_DSCRA_A_SIZE(NUMCACHEBLKS(pktsize+ETHER_ALIGN)) | | 967 | V_DMA_DSCRA_A_SIZE(NUMCACHEBLKS(pktsize+ETHER_ALIGN)) | |
968 | 0; | 968 | 0; |
969 | #else | 969 | #else |
970 | dsc->dscr_a = virt_to_phys(sb_new->tail) | | 970 | dsc->dscr_a = virt_to_phys(sb_new->data) | |
971 | V_DMA_DSCRA_A_SIZE(NUMCACHEBLKS(pktsize+ETHER_ALIGN)) | | 971 | V_DMA_DSCRA_A_SIZE(NUMCACHEBLKS(pktsize+ETHER_ALIGN)) | |
972 | M_DMA_DSCRA_INTERRUPT; | 972 | M_DMA_DSCRA_INTERRUPT; |
973 | #endif | 973 | #endif |
diff --git a/drivers/net/shaper.c b/drivers/net/shaper.c index 20edeb345792..3ad0b6751f6f 100644 --- a/drivers/net/shaper.c +++ b/drivers/net/shaper.c | |||
@@ -135,10 +135,8 @@ static int shaper_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
135 | { | 135 | { |
136 | struct shaper *shaper = dev->priv; | 136 | struct shaper *shaper = dev->priv; |
137 | struct sk_buff *ptr; | 137 | struct sk_buff *ptr; |
138 | 138 | ||
139 | if (down_trylock(&shaper->sem)) | 139 | spin_lock(&shaper->lock); |
140 | return -1; | ||
141 | |||
142 | ptr=shaper->sendq.prev; | 140 | ptr=shaper->sendq.prev; |
143 | 141 | ||
144 | /* | 142 | /* |
@@ -232,7 +230,7 @@ static int shaper_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
232 | shaper->stats.collisions++; | 230 | shaper->stats.collisions++; |
233 | } | 231 | } |
234 | shaper_kick(shaper); | 232 | shaper_kick(shaper); |
235 | up(&shaper->sem); | 233 | spin_unlock(&shaper->lock); |
236 | return 0; | 234 | return 0; |
237 | } | 235 | } |
238 | 236 | ||
@@ -271,11 +269,9 @@ static void shaper_timer(unsigned long data) | |||
271 | { | 269 | { |
272 | struct shaper *shaper = (struct shaper *)data; | 270 | struct shaper *shaper = (struct shaper *)data; |
273 | 271 | ||
274 | if (!down_trylock(&shaper->sem)) { | 272 | spin_lock(&shaper->lock); |
275 | shaper_kick(shaper); | 273 | shaper_kick(shaper); |
276 | up(&shaper->sem); | 274 | spin_unlock(&shaper->lock); |
277 | } else | ||
278 | mod_timer(&shaper->timer, jiffies); | ||
279 | } | 275 | } |
280 | 276 | ||
281 | /* | 277 | /* |
@@ -332,21 +328,6 @@ static void shaper_kick(struct shaper *shaper) | |||
332 | 328 | ||
333 | 329 | ||
334 | /* | 330 | /* |
335 | * Flush the shaper queues on a closedown | ||
336 | */ | ||
337 | |||
338 | static void shaper_flush(struct shaper *shaper) | ||
339 | { | ||
340 | struct sk_buff *skb; | ||
341 | |||
342 | down(&shaper->sem); | ||
343 | while((skb=skb_dequeue(&shaper->sendq))!=NULL) | ||
344 | dev_kfree_skb(skb); | ||
345 | shaper_kick(shaper); | ||
346 | up(&shaper->sem); | ||
347 | } | ||
348 | |||
349 | /* | ||
350 | * Bring the interface up. We just disallow this until a | 331 | * Bring the interface up. We just disallow this until a |
351 | * bind. | 332 | * bind. |
352 | */ | 333 | */ |
@@ -375,7 +356,15 @@ static int shaper_open(struct net_device *dev) | |||
375 | static int shaper_close(struct net_device *dev) | 356 | static int shaper_close(struct net_device *dev) |
376 | { | 357 | { |
377 | struct shaper *shaper=dev->priv; | 358 | struct shaper *shaper=dev->priv; |
378 | shaper_flush(shaper); | 359 | struct sk_buff *skb; |
360 | |||
361 | while ((skb = skb_dequeue(&shaper->sendq)) != NULL) | ||
362 | dev_kfree_skb(skb); | ||
363 | |||
364 | spin_lock_bh(&shaper->lock); | ||
365 | shaper_kick(shaper); | ||
366 | spin_unlock_bh(&shaper->lock); | ||
367 | |||
379 | del_timer_sync(&shaper->timer); | 368 | del_timer_sync(&shaper->timer); |
380 | return 0; | 369 | return 0; |
381 | } | 370 | } |
@@ -576,6 +565,7 @@ static void shaper_init_priv(struct net_device *dev) | |||
576 | init_timer(&sh->timer); | 565 | init_timer(&sh->timer); |
577 | sh->timer.function=shaper_timer; | 566 | sh->timer.function=shaper_timer; |
578 | sh->timer.data=(unsigned long)sh; | 567 | sh->timer.data=(unsigned long)sh; |
568 | spin_lock_init(&sh->lock); | ||
579 | } | 569 | } |
580 | 570 | ||
581 | /* | 571 | /* |
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c index 3107aed0fb51..23b713c700b3 100644 --- a/drivers/net/sis900.c +++ b/drivers/net/sis900.c | |||
@@ -66,6 +66,7 @@ | |||
66 | #include <linux/ethtool.h> | 66 | #include <linux/ethtool.h> |
67 | #include <linux/crc32.h> | 67 | #include <linux/crc32.h> |
68 | #include <linux/bitops.h> | 68 | #include <linux/bitops.h> |
69 | #include <linux/dma-mapping.h> | ||
69 | 70 | ||
70 | #include <asm/processor.h> /* Processor type for cache alignment. */ | 71 | #include <asm/processor.h> /* Processor type for cache alignment. */ |
71 | #include <asm/io.h> | 72 | #include <asm/io.h> |
@@ -93,8 +94,6 @@ static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */ | |||
93 | 94 | ||
94 | /* Time in jiffies before concluding the transmitter is hung. */ | 95 | /* Time in jiffies before concluding the transmitter is hung. */ |
95 | #define TX_TIMEOUT (4*HZ) | 96 | #define TX_TIMEOUT (4*HZ) |
96 | /* SiS 900 is capable of 32 bits BM DMA */ | ||
97 | #define SIS900_DMA_MASK 0xffffffff | ||
98 | 97 | ||
99 | enum { | 98 | enum { |
100 | SIS_900 = 0, | 99 | SIS_900 = 0, |
@@ -414,7 +413,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev, | |||
414 | ret = pci_enable_device(pci_dev); | 413 | ret = pci_enable_device(pci_dev); |
415 | if(ret) return ret; | 414 | if(ret) return ret; |
416 | 415 | ||
417 | i = pci_set_dma_mask(pci_dev, SIS900_DMA_MASK); | 416 | i = pci_set_dma_mask(pci_dev, DMA_32BIT_MASK); |
418 | if(i){ | 417 | if(i){ |
419 | printk(KERN_ERR "sis900.c: architecture does not support" | 418 | printk(KERN_ERR "sis900.c: architecture does not support" |
420 | "32bit PCI busmaster DMA\n"); | 419 | "32bit PCI busmaster DMA\n"); |
@@ -1155,7 +1154,7 @@ sis900_init_rx_ring(struct net_device *net_dev) | |||
1155 | sis_priv->rx_skbuff[i] = skb; | 1154 | sis_priv->rx_skbuff[i] = skb; |
1156 | sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; | 1155 | sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE; |
1157 | sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, | 1156 | sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev, |
1158 | skb->tail, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 1157 | skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1159 | } | 1158 | } |
1160 | sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); | 1159 | sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC); |
1161 | 1160 | ||
@@ -1777,7 +1776,7 @@ static int sis900_rx(struct net_device *net_dev) | |||
1777 | sis_priv->rx_skbuff[entry] = skb; | 1776 | sis_priv->rx_skbuff[entry] = skb; |
1778 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; | 1777 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; |
1779 | sis_priv->rx_ring[entry].bufptr = | 1778 | sis_priv->rx_ring[entry].bufptr = |
1780 | pci_map_single(sis_priv->pci_dev, skb->tail, | 1779 | pci_map_single(sis_priv->pci_dev, skb->data, |
1781 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 1780 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1782 | sis_priv->dirty_rx++; | 1781 | sis_priv->dirty_rx++; |
1783 | } | 1782 | } |
@@ -1810,7 +1809,7 @@ static int sis900_rx(struct net_device *net_dev) | |||
1810 | sis_priv->rx_skbuff[entry] = skb; | 1809 | sis_priv->rx_skbuff[entry] = skb; |
1811 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; | 1810 | sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE; |
1812 | sis_priv->rx_ring[entry].bufptr = | 1811 | sis_priv->rx_ring[entry].bufptr = |
1813 | pci_map_single(sis_priv->pci_dev, skb->tail, | 1812 | pci_map_single(sis_priv->pci_dev, skb->data, |
1814 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 1813 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
1815 | } | 1814 | } |
1816 | } | 1815 | } |
diff --git a/drivers/net/sk98lin/skge.c b/drivers/net/sk98lin/skge.c index 7bfaef9305b2..074521a36341 100644 --- a/drivers/net/sk98lin/skge.c +++ b/drivers/net/sk98lin/skge.c | |||
@@ -112,6 +112,7 @@ | |||
112 | #include <linux/moduleparam.h> | 112 | #include <linux/moduleparam.h> |
113 | #include <linux/init.h> | 113 | #include <linux/init.h> |
114 | #include <linux/proc_fs.h> | 114 | #include <linux/proc_fs.h> |
115 | #include <linux/dma-mapping.h> | ||
115 | 116 | ||
116 | #include "h/skdrv1st.h" | 117 | #include "h/skdrv1st.h" |
117 | #include "h/skdrv2nd.h" | 118 | #include "h/skdrv2nd.h" |
@@ -4212,7 +4213,7 @@ SK_BOOL DualNet; | |||
4212 | Flags); | 4213 | Flags); |
4213 | 4214 | ||
4214 | SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST); | 4215 | SkGeStopPort(pAC, IoC, FromPort, SK_STOP_ALL, SK_HARD_RST); |
4215 | pAC->dev[Param.Para32[0]]->flags &= ~IFF_RUNNING; | 4216 | netif_carrier_off(pAC->dev[Param.Para32[0]]); |
4216 | spin_unlock_irqrestore( | 4217 | spin_unlock_irqrestore( |
4217 | &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock, | 4218 | &pAC->TxPort[FromPort][TX_PRIO_LOW].TxDesRingLock, |
4218 | Flags); | 4219 | Flags); |
@@ -4355,7 +4356,7 @@ SK_BOOL DualNet; | |||
4355 | } | 4356 | } |
4356 | 4357 | ||
4357 | /* Inform the world that link protocol is up. */ | 4358 | /* Inform the world that link protocol is up. */ |
4358 | pAC->dev[Param.Para32[0]]->flags |= IFF_RUNNING; | 4359 | netif_carrier_on(pAC->dev[Param.Para32[0]]); |
4359 | 4360 | ||
4360 | break; | 4361 | break; |
4361 | case SK_DRV_NET_DOWN: /* SK_U32 Reason */ | 4362 | case SK_DRV_NET_DOWN: /* SK_U32 Reason */ |
@@ -4368,7 +4369,7 @@ SK_BOOL DualNet; | |||
4368 | } else { | 4369 | } else { |
4369 | DoPrintInterfaceChange = SK_TRUE; | 4370 | DoPrintInterfaceChange = SK_TRUE; |
4370 | } | 4371 | } |
4371 | pAC->dev[Param.Para32[1]]->flags &= ~IFF_RUNNING; | 4372 | netif_carrier_off(pAC->dev[Param.Para32[1]]); |
4372 | break; | 4373 | break; |
4373 | case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */ | 4374 | case SK_DRV_SWITCH_HARD: /* SK_U32 FromPortIdx SK_U32 ToPortIdx */ |
4374 | SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT, | 4375 | SK_DBG_MSG(NULL, SK_DBGMOD_DRV, SK_DBGCAT_DRV_EVENT, |
@@ -4912,8 +4913,8 @@ static int __devinit skge_probe_one(struct pci_dev *pdev, | |||
4912 | goto out; | 4913 | goto out; |
4913 | 4914 | ||
4914 | /* Configure DMA attributes. */ | 4915 | /* Configure DMA attributes. */ |
4915 | if (pci_set_dma_mask(pdev, (u64) 0xffffffffffffffffULL) && | 4916 | if (pci_set_dma_mask(pdev, DMA_64BIT_MASK) && |
4916 | pci_set_dma_mask(pdev, (u64) 0xffffffff)) | 4917 | pci_set_dma_mask(pdev, DMA_32BIT_MASK)) |
4917 | goto out_disable_device; | 4918 | goto out_disable_device; |
4918 | 4919 | ||
4919 | 4920 | ||
@@ -4961,7 +4962,6 @@ static int __devinit skge_probe_one(struct pci_dev *pdev, | |||
4961 | #ifdef CONFIG_NET_POLL_CONTROLLER | 4962 | #ifdef CONFIG_NET_POLL_CONTROLLER |
4962 | dev->poll_controller = &SkGePollController; | 4963 | dev->poll_controller = &SkGePollController; |
4963 | #endif | 4964 | #endif |
4964 | dev->flags &= ~IFF_RUNNING; | ||
4965 | SET_NETDEV_DEV(dev, &pdev->dev); | 4965 | SET_NETDEV_DEV(dev, &pdev->dev); |
4966 | SET_ETHTOOL_OPS(dev, &SkGeEthtoolOps); | 4966 | SET_ETHTOOL_OPS(dev, &SkGeEthtoolOps); |
4967 | 4967 | ||
@@ -5035,7 +5035,6 @@ static int __devinit skge_probe_one(struct pci_dev *pdev, | |||
5035 | dev->set_mac_address = &SkGeSetMacAddr; | 5035 | dev->set_mac_address = &SkGeSetMacAddr; |
5036 | dev->do_ioctl = &SkGeIoctl; | 5036 | dev->do_ioctl = &SkGeIoctl; |
5037 | dev->change_mtu = &SkGeChangeMtu; | 5037 | dev->change_mtu = &SkGeChangeMtu; |
5038 | dev->flags &= ~IFF_RUNNING; | ||
5039 | SET_NETDEV_DEV(dev, &pdev->dev); | 5038 | SET_NETDEV_DEV(dev, &pdev->dev); |
5040 | SET_ETHTOOL_OPS(dev, &SkGeEthtoolOps); | 5039 | SET_ETHTOOL_OPS(dev, &SkGeEthtoolOps); |
5041 | 5040 | ||
diff --git a/drivers/net/sk_g16.c b/drivers/net/sk_g16.c deleted file mode 100644 index 134ae0e6495b..000000000000 --- a/drivers/net/sk_g16.c +++ /dev/null | |||
@@ -1,2066 +0,0 @@ | |||
1 | /*- | ||
2 | * Copyright (C) 1994 by PJD Weichmann & SWS Bern, Switzerland | ||
3 | * | ||
4 | * This software may be used and distributed according to the terms | ||
5 | * of the GNU General Public License, incorporated herein by reference. | ||
6 | * | ||
7 | * Module : sk_g16.c | ||
8 | * | ||
9 | * Version : $Revision: 1.1 $ | ||
10 | * | ||
11 | * Author : Patrick J.D. Weichmann | ||
12 | * | ||
13 | * Date Created : 94/05/26 | ||
14 | * Last Updated : $Date: 1994/06/30 16:25:15 $ | ||
15 | * | ||
16 | * Description : Schneider & Koch G16 Ethernet Device Driver for | ||
17 | * Linux Kernel >= 1.1.22 | ||
18 | * Update History : | ||
19 | * Paul Gortmaker, 03/97: Fix for v2.1.x to use read{b,w} | ||
20 | * write{b,w} and memcpy -> memcpy_{to,from}io | ||
21 | * | ||
22 | * Jeff Garzik, 06/2000, Modularize | ||
23 | * | ||
24 | -*/ | ||
25 | |||
26 | static const char rcsid[] = "$Id: sk_g16.c,v 1.1 1994/06/30 16:25:15 root Exp $"; | ||
27 | |||
28 | /* | ||
29 | * The Schneider & Koch (SK) G16 Network device driver is based | ||
30 | * on the 'ni6510' driver from Michael Hipp which can be found at | ||
31 | * ftp://sunsite.unc.edu/pub/Linux/system/Network/drivers/nidrivers.tar.gz | ||
32 | * | ||
33 | * Sources: 1) ni6510.c by M. Hipp | ||
34 | * 2) depca.c by D.C. Davies | ||
35 | * 3) skeleton.c by D. Becker | ||
36 | * 4) Am7990 Local Area Network Controller for Ethernet (LANCE), | ||
37 | * AMD, Pub. #05698, June 1989 | ||
38 | * | ||
39 | * Many Thanks for helping me to get things working to: | ||
40 | * | ||
41 | * A. Cox (A.Cox@swansea.ac.uk) | ||
42 | * M. Hipp (mhipp@student.uni-tuebingen.de) | ||
43 | * R. Bolz (Schneider & Koch, Germany) | ||
44 | * | ||
45 | * To Do: | ||
46 | * - Support of SK_G8 and other SK Network Cards. | ||
47 | * - Autoset memory mapped RAM. Check for free memory and then | ||
48 | * configure RAM correctly. | ||
49 | * - SK_close should really set card in to initial state. | ||
50 | * - Test if IRQ 3 is not switched off. Use autoirq() functionality. | ||
51 | * (as in /drivers/net/skeleton.c) | ||
52 | * - Implement Multicast addressing. At minimum something like | ||
53 | * in depca.c. | ||
54 | * - Redo the statistics part. | ||
55 | * - Try to find out if the board is in 8 Bit or 16 Bit slot. | ||
56 | * If in 8 Bit mode don't use IRQ 11. | ||
57 | * - (Try to make it slightly faster.) | ||
58 | * - Power management support | ||
59 | */ | ||
60 | |||
61 | #include <linux/module.h> | ||
62 | #include <linux/kernel.h> | ||
63 | #include <linux/fcntl.h> | ||
64 | #include <linux/ioport.h> | ||
65 | #include <linux/interrupt.h> | ||
66 | #include <linux/slab.h> | ||
67 | #include <linux/string.h> | ||
68 | #include <linux/delay.h> | ||
69 | #include <linux/errno.h> | ||
70 | #include <linux/init.h> | ||
71 | #include <linux/spinlock.h> | ||
72 | #include <linux/netdevice.h> | ||
73 | #include <linux/etherdevice.h> | ||
74 | #include <linux/skbuff.h> | ||
75 | #include <linux/bitops.h> | ||
76 | |||
77 | #include <asm/system.h> | ||
78 | #include <asm/io.h> | ||
79 | |||
80 | #include "sk_g16.h" | ||
81 | |||
82 | /* | ||
83 | * Schneider & Koch Card Definitions | ||
84 | * ================================= | ||
85 | */ | ||
86 | |||
87 | #define SK_NAME "SK_G16" | ||
88 | |||
89 | /* | ||
90 | * SK_G16 Configuration | ||
91 | * -------------------- | ||
92 | */ | ||
93 | |||
94 | /* | ||
95 | * Abbreviations | ||
96 | * ------------- | ||
97 | * | ||
98 | * RAM - used for the 16KB shared memory | ||
99 | * Boot_ROM, ROM - are used for referencing the BootEPROM | ||
100 | * | ||
101 | * SK_BOOT_ROM and SK_ADDR are symbolic constants used to configure | ||
102 | * the behaviour of the driver and the SK_G16. | ||
103 | * | ||
104 | * ! See sk_g16.install on how to install and configure the driver ! | ||
105 | * | ||
106 | * SK_BOOT_ROM defines if the Boot_ROM should be switched off or not. | ||
107 | * | ||
108 | * SK_ADDR defines the address where the RAM will be mapped into the real | ||
109 | * host memory. | ||
110 | * valid addresses are from 0xa0000 to 0xfc000 in 16Kbyte steps. | ||
111 | */ | ||
112 | |||
113 | #define SK_BOOT_ROM 1 /* 1=BootROM on 0=off */ | ||
114 | |||
115 | #define SK_ADDR 0xcc000 | ||
116 | |||
117 | /* | ||
118 | * In POS3 are bits A14-A19 of the address bus. These bits can be set | ||
119 | * to choose the RAM address. That's why we only can choose the RAM address | ||
120 | * in 16KB steps. | ||
121 | */ | ||
122 | |||
123 | #define POS_ADDR (rom_addr>>14) /* Do not change this line */ | ||
124 | |||
125 | /* | ||
126 | * SK_G16 I/O PORT's + IRQ's + Boot_ROM locations | ||
127 | * ---------------------------------------------- | ||
128 | */ | ||
129 | |||
130 | /* | ||
131 | * As nearly every card has also SK_G16 a specified I/O Port region and | ||
132 | * only a few possible IRQ's. | ||
133 | * In the Installation Guide from Schneider & Koch is listed a possible | ||
134 | * Interrupt IRQ2. IRQ2 is always IRQ9 in boards with two cascaded interrupt | ||
135 | * controllers. So we use in SK_IRQS IRQ9. | ||
136 | */ | ||
137 | |||
138 | /* Don't touch any of the following #defines. */ | ||
139 | |||
140 | #define SK_IO_PORTS { 0x100, 0x180, 0x208, 0x220, 0x288, 0x320, 0x328, 0x390, 0 } | ||
141 | |||
142 | #define SK_IRQS { 3, 5, 9, 11, 0 } | ||
143 | |||
144 | #define SK_BOOT_ROM_LOCATIONS { 0xc0000, 0xc4000, 0xc8000, 0xcc000, 0xd0000, 0xd4000, 0xd8000, 0xdc000, 0 } | ||
145 | |||
146 | #define SK_BOOT_ROM_ID { 0x55, 0xaa, 0x10, 0x50, 0x06, 0x33 } | ||
147 | |||
148 | /* | ||
149 | * SK_G16 POS REGISTERS | ||
150 | * -------------------- | ||
151 | */ | ||
152 | |||
153 | /* | ||
154 | * SK_G16 has a Programmable Option Select (POS) Register. | ||
155 | * The POS is composed of 8 separate registers (POS0-7) which | ||
156 | * are I/O mapped on an address set by the W1 switch. | ||
157 | * | ||
158 | */ | ||
159 | |||
160 | #define SK_POS_SIZE 8 /* 8 I/O Ports are used by SK_G16 */ | ||
161 | |||
162 | #define SK_POS0 ioaddr /* Card-ID Low (R) */ | ||
163 | #define SK_POS1 ioaddr+1 /* Card-ID High (R) */ | ||
164 | #define SK_POS2 ioaddr+2 /* Card-Enable, Boot-ROM Disable (RW) */ | ||
165 | #define SK_POS3 ioaddr+3 /* Base address of RAM */ | ||
166 | #define SK_POS4 ioaddr+4 /* IRQ */ | ||
167 | |||
168 | /* POS5 - POS7 are unused */ | ||
169 | |||
170 | /* | ||
171 | * SK_G16 MAC PREFIX | ||
172 | * ----------------- | ||
173 | */ | ||
174 | |||
175 | /* | ||
176 | * Scheider & Koch manufacturer code (00:00:a5). | ||
177 | * This must be checked, that we are sure it is a SK card. | ||
178 | */ | ||
179 | |||
180 | #define SK_MAC0 0x00 | ||
181 | #define SK_MAC1 0x00 | ||
182 | #define SK_MAC2 0x5a | ||
183 | |||
184 | /* | ||
185 | * SK_G16 ID | ||
186 | * --------- | ||
187 | */ | ||
188 | |||
189 | /* | ||
190 | * If POS0,POS1 contain the following ID, then we know | ||
191 | * at which I/O Port Address we are. | ||
192 | */ | ||
193 | |||
194 | #define SK_IDLOW 0xfd | ||
195 | #define SK_IDHIGH 0x6a | ||
196 | |||
197 | |||
198 | /* | ||
199 | * LANCE POS Bit definitions | ||
200 | * ------------------------- | ||
201 | */ | ||
202 | |||
203 | #define SK_ROM_RAM_ON (POS2_CARD) | ||
204 | #define SK_ROM_RAM_OFF (POS2_EPROM) | ||
205 | #define SK_ROM_ON (inb(SK_POS2) & POS2_CARD) | ||
206 | #define SK_ROM_OFF (inb(SK_POS2) | POS2_EPROM) | ||
207 | #define SK_RAM_ON (inb(SK_POS2) | POS2_CARD) | ||
208 | #define SK_RAM_OFF (inb(SK_POS2) & POS2_EPROM) | ||
209 | |||
210 | #define POS2_CARD 0x0001 /* 1 = SK_G16 on 0 = off */ | ||
211 | #define POS2_EPROM 0x0002 /* 1 = Boot EPROM off 0 = on */ | ||
212 | |||
213 | /* | ||
214 | * SK_G16 Memory mapped Registers | ||
215 | * ------------------------------ | ||
216 | * | ||
217 | */ | ||
218 | |||
219 | #define SK_IOREG (&board->ioreg) /* LANCE data registers. */ | ||
220 | #define SK_PORT (&board->port) /* Control, Status register */ | ||
221 | #define SK_IOCOM (&board->iocom) /* I/O Command */ | ||
222 | |||
223 | /* | ||
224 | * SK_G16 Status/Control Register bits | ||
225 | * ----------------------------------- | ||
226 | * | ||
227 | * (C) Controlreg (S) Statusreg | ||
228 | */ | ||
229 | |||
230 | /* | ||
231 | * Register transfer: 0 = no transfer | ||
232 | * 1 = transferring data between LANCE and I/O reg | ||
233 | */ | ||
234 | #define SK_IORUN 0x20 | ||
235 | |||
236 | /* | ||
237 | * LANCE interrupt: 0 = LANCE interrupt occurred | ||
238 | * 1 = no LANCE interrupt occurred | ||
239 | */ | ||
240 | #define SK_IRQ 0x10 | ||
241 | |||
242 | #define SK_RESET 0x08 /* Reset SK_CARD: 0 = RESET 1 = normal */ | ||
243 | #define SK_RW 0x02 /* 0 = write to 1 = read from */ | ||
244 | #define SK_ADR 0x01 /* 0 = REG DataPort 1 = RAP Reg addr port */ | ||
245 | |||
246 | |||
247 | #define SK_RREG SK_RW /* Transferdirection to read from lance */ | ||
248 | #define SK_WREG 0 /* Transferdirection to write to lance */ | ||
249 | #define SK_RAP SK_ADR /* Destination Register RAP */ | ||
250 | #define SK_RDATA 0 /* Destination Register REG DataPort */ | ||
251 | |||
252 | /* | ||
253 | * SK_G16 I/O Command | ||
254 | * ------------------ | ||
255 | */ | ||
256 | |||
257 | /* | ||
258 | * Any bitcombination sets the internal I/O bit (transfer will start) | ||
259 | * when written to I/O Command | ||
260 | */ | ||
261 | |||
262 | #define SK_DOIO 0x80 /* Do Transfer */ | ||
263 | |||
264 | /* | ||
265 | * LANCE RAP (Register Address Port). | ||
266 | * --------------------------------- | ||
267 | */ | ||
268 | |||
269 | /* | ||
270 | * The LANCE internal registers are selected through the RAP. | ||
271 | * The Registers are: | ||
272 | * | ||
273 | * CSR0 - Status and Control flags | ||
274 | * CSR1 - Low order bits of initialize block (bits 15:00) | ||
275 | * CSR2 - High order bits of initialize block (bits 07:00, 15:08 are reserved) | ||
276 | * CSR3 - Allows redefinition of the Bus Master Interface. | ||
277 | * This register must be set to 0x0002, which means BSWAP = 0, | ||
278 | * ACON = 1, BCON = 0; | ||
279 | * | ||
280 | */ | ||
281 | |||
282 | #define CSR0 0x00 | ||
283 | #define CSR1 0x01 | ||
284 | #define CSR2 0x02 | ||
285 | #define CSR3 0x03 | ||
286 | |||
287 | /* | ||
288 | * General Definitions | ||
289 | * =================== | ||
290 | */ | ||
291 | |||
292 | /* | ||
293 | * Set the number of Tx and Rx buffers, using Log_2(# buffers). | ||
294 | * We have 16KB RAM which can be accessed by the LANCE. In the | ||
295 | * memory are not only the buffers but also the ring descriptors and | ||
296 | * the initialize block. | ||
297 | * Don't change anything unless you really know what you do. | ||
298 | */ | ||
299 | |||
300 | #define LC_LOG_TX_BUFFERS 1 /* (2 == 2^^1) 2 Transmit buffers */ | ||
301 | #define LC_LOG_RX_BUFFERS 3 /* (8 == 2^^3) 8 Receive buffers */ | ||
302 | |||
303 | /* Descriptor ring sizes */ | ||
304 | |||
305 | #define TMDNUM (1 << (LC_LOG_TX_BUFFERS)) /* 2 Transmit descriptor rings */ | ||
306 | #define RMDNUM (1 << (LC_LOG_RX_BUFFERS)) /* 8 Receive Buffers */ | ||
307 | |||
308 | /* Define Mask for setting RMD, TMD length in the LANCE init_block */ | ||
309 | |||
310 | #define TMDNUMMASK (LC_LOG_TX_BUFFERS << 29) | ||
311 | #define RMDNUMMASK (LC_LOG_RX_BUFFERS << 29) | ||
312 | |||
313 | /* | ||
314 | * Data Buffer size is set to maximum packet length. | ||
315 | */ | ||
316 | |||
317 | #define PKT_BUF_SZ 1518 | ||
318 | |||
319 | /* | ||
320 | * The number of low I/O ports used by the ethercard. | ||
321 | */ | ||
322 | |||
323 | #define ETHERCARD_TOTAL_SIZE SK_POS_SIZE | ||
324 | |||
325 | /* | ||
326 | * SK_DEBUG | ||
327 | * | ||
328 | * Here you can choose what level of debugging wanted. | ||
329 | * | ||
330 | * If SK_DEBUG and SK_DEBUG2 are undefined, then only the | ||
331 | * necessary messages will be printed. | ||
332 | * | ||
333 | * If SK_DEBUG is defined, there will be many debugging prints | ||
334 | * which can help to find some mistakes in configuration or even | ||
335 | * in the driver code. | ||
336 | * | ||
337 | * If SK_DEBUG2 is defined, many many messages will be printed | ||
338 | * which normally you don't need. I used this to check the interrupt | ||
339 | * routine. | ||
340 | * | ||
341 | * (If you define only SK_DEBUG2 then only the messages for | ||
342 | * checking interrupts will be printed!) | ||
343 | * | ||
344 | * Normal way of live is: | ||
345 | * | ||
346 | * For the whole thing get going let both symbolic constants | ||
347 | * undefined. If you face any problems and you know what's going | ||
348 | * on (you know something about the card and you can interpret some | ||
349 | * hex LANCE register output) then define SK_DEBUG | ||
350 | * | ||
351 | */ | ||
352 | |||
353 | #undef SK_DEBUG /* debugging */ | ||
354 | #undef SK_DEBUG2 /* debugging with more verbose report */ | ||
355 | |||
356 | #ifdef SK_DEBUG | ||
357 | #define PRINTK(x) printk x | ||
358 | #else | ||
359 | #define PRINTK(x) /**/ | ||
360 | #endif | ||
361 | |||
362 | #ifdef SK_DEBUG2 | ||
363 | #define PRINTK2(x) printk x | ||
364 | #else | ||
365 | #define PRINTK2(x) /**/ | ||
366 | #endif | ||
367 | |||
368 | /* | ||
369 | * SK_G16 RAM | ||
370 | * | ||
371 | * The components are memory mapped and can be set in a region from | ||
372 | * 0x00000 through 0xfc000 in 16KB steps. | ||
373 | * | ||
374 | * The Network components are: dual ported RAM, Prom, I/O Reg, Status-, | ||
375 | * Controlregister and I/O Command. | ||
376 | * | ||
377 | * dual ported RAM: This is the only memory region which the LANCE chip | ||
378 | * has access to. From the Lance it is addressed from 0x0000 to | ||
379 | * 0x3fbf. The host accesses it normally. | ||
380 | * | ||
381 | * PROM: The PROM obtains the ETHERNET-MAC-Address. It is realised as a | ||
382 | * 8-Bit PROM, this means only the 16 even addresses are used of the | ||
383 | * 32 Byte Address region. Access to an odd address results in invalid | ||
384 | * data. | ||
385 | * | ||
386 | * LANCE I/O Reg: The I/O Reg is build of 4 single Registers, Low-Byte Write, | ||
387 | * Hi-Byte Write, Low-Byte Read, Hi-Byte Read. | ||
388 | * Transfer from or to the LANCE is always in 16Bit so Low and High | ||
389 | * registers are always relevant. | ||
390 | * | ||
391 | * The Data from the Readregister is not the data in the Writeregister!! | ||
392 | * | ||
393 | * Port: Status- and Controlregister. | ||
394 | * Two different registers which share the same address, Status is | ||
395 | * read-only, Control is write-only. | ||
396 | * | ||
397 | * I/O Command: | ||
398 | * Any bitcombination written in here starts the transmission between | ||
399 | * Host and LANCE. | ||
400 | */ | ||
401 | |||
402 | typedef struct | ||
403 | { | ||
404 | unsigned char ram[0x3fc0]; /* 16KB dual ported ram */ | ||
405 | unsigned char rom[0x0020]; /* 32Byte PROM containing 6Byte MAC */ | ||
406 | unsigned char res1[0x0010]; /* reserved */ | ||
407 | unsigned volatile short ioreg;/* LANCE I/O Register */ | ||
408 | unsigned volatile char port; /* Statusregister and Controlregister */ | ||
409 | unsigned char iocom; /* I/O Command Register */ | ||
410 | } SK_RAM; | ||
411 | |||
412 | /* struct */ | ||
413 | |||
414 | /* | ||
415 | * This is the structure for the dual ported ram. We | ||
416 | * have exactly 16 320 Bytes. In here there must be: | ||
417 | * | ||
418 | * - Initialize Block (starting at a word boundary) | ||
419 | * - Receive and Transmit Descriptor Rings (quadword boundary) | ||
420 | * - Data Buffers (arbitrary boundary) | ||
421 | * | ||
422 | * This is because LANCE has on SK_G16 only access to the dual ported | ||
423 | * RAM and nowhere else. | ||
424 | */ | ||
425 | |||
426 | struct SK_ram | ||
427 | { | ||
428 | struct init_block ib; | ||
429 | struct tmd tmde[TMDNUM]; | ||
430 | struct rmd rmde[RMDNUM]; | ||
431 | char tmdbuf[TMDNUM][PKT_BUF_SZ]; | ||
432 | char rmdbuf[RMDNUM][PKT_BUF_SZ]; | ||
433 | }; | ||
434 | |||
435 | /* | ||
436 | * Structure where all necessary information is for ring buffer | ||
437 | * management and statistics. | ||
438 | */ | ||
439 | |||
440 | struct priv | ||
441 | { | ||
442 | struct SK_ram *ram; /* dual ported ram structure */ | ||
443 | struct rmd *rmdhead; /* start of receive ring descriptors */ | ||
444 | struct tmd *tmdhead; /* start of transmit ring descriptors */ | ||
445 | int rmdnum; /* actual used ring descriptor */ | ||
446 | int tmdnum; /* actual transmit descriptor for transmitting data */ | ||
447 | int tmdlast; /* last sent descriptor used for error handling, etc */ | ||
448 | void *rmdbufs[RMDNUM]; /* pointer to the receive buffers */ | ||
449 | void *tmdbufs[TMDNUM]; /* pointer to the transmit buffers */ | ||
450 | struct net_device_stats stats; /* Device driver statistics */ | ||
451 | }; | ||
452 | |||
453 | /* global variable declaration */ | ||
454 | |||
455 | /* IRQ map used to reserve a IRQ (see SK_open()) */ | ||
456 | |||
457 | /* static variables */ | ||
458 | |||
459 | static SK_RAM *board; /* pointer to our memory mapped board components */ | ||
460 | static DEFINE_SPINLOCK(SK_lock); | ||
461 | |||
462 | /* Macros */ | ||
463 | |||
464 | |||
465 | /* Function Prototypes */ | ||
466 | |||
467 | /* | ||
468 | * Device Driver functions | ||
469 | * ----------------------- | ||
470 | * See for short explanation of each function its definitions header. | ||
471 | */ | ||
472 | |||
473 | static int SK_probe(struct net_device *dev, short ioaddr); | ||
474 | |||
475 | static void SK_timeout(struct net_device *dev); | ||
476 | static int SK_open(struct net_device *dev); | ||
477 | static int SK_send_packet(struct sk_buff *skb, struct net_device *dev); | ||
478 | static irqreturn_t SK_interrupt(int irq, void *dev_id, struct pt_regs * regs); | ||
479 | static void SK_rxintr(struct net_device *dev); | ||
480 | static void SK_txintr(struct net_device *dev); | ||
481 | static int SK_close(struct net_device *dev); | ||
482 | |||
483 | static struct net_device_stats *SK_get_stats(struct net_device *dev); | ||
484 | |||
485 | unsigned int SK_rom_addr(void); | ||
486 | |||
487 | static void set_multicast_list(struct net_device *dev); | ||
488 | |||
489 | /* | ||
490 | * LANCE Functions | ||
491 | * --------------- | ||
492 | */ | ||
493 | |||
494 | static int SK_lance_init(struct net_device *dev, unsigned short mode); | ||
495 | void SK_reset_board(void); | ||
496 | void SK_set_RAP(int reg_number); | ||
497 | int SK_read_reg(int reg_number); | ||
498 | int SK_rread_reg(void); | ||
499 | void SK_write_reg(int reg_number, int value); | ||
500 | |||
501 | /* | ||
502 | * Debugging functions | ||
503 | * ------------------- | ||
504 | */ | ||
505 | |||
506 | void SK_print_pos(struct net_device *dev, char *text); | ||
507 | void SK_print_dev(struct net_device *dev, char *text); | ||
508 | void SK_print_ram(struct net_device *dev); | ||
509 | |||
510 | |||
511 | /*- | ||
512 | * Function : SK_init | ||
513 | * Author : Patrick J.D. Weichmann | ||
514 | * Date Created : 94/05/26 | ||
515 | * | ||
516 | * Description : Check for a SK_G16 network adaptor and initialize it. | ||
517 | * This function gets called by dev_init which initializes | ||
518 | * all Network devices. | ||
519 | * | ||
520 | * Parameters : I : struct net_device *dev - structure preconfigured | ||
521 | * from Space.c | ||
522 | * Return Value : 0 = Driver Found and initialized | ||
523 | * Errors : ENODEV - no device found | ||
524 | * ENXIO - not probed | ||
525 | * Globals : None | ||
526 | * Update History : | ||
527 | * YY/MM/DD uid Description | ||
528 | -*/ | ||
529 | |||
530 | static int io; /* 0 == probe */ | ||
531 | |||
532 | /* | ||
533 | * Check for a network adaptor of this type, and return '0' if one exists. | ||
534 | * If dev->base_addr == 0, probe all likely locations. | ||
535 | * If dev->base_addr == 1, always return failure. | ||
536 | */ | ||
537 | |||
538 | struct net_device * __init SK_init(int unit) | ||
539 | { | ||
540 | int *port, ports[] = SK_IO_PORTS; /* SK_G16 supported ports */ | ||
541 | static unsigned version_printed; | ||
542 | struct net_device *dev = alloc_etherdev(sizeof(struct priv)); | ||
543 | int err = -ENODEV; | ||
544 | |||
545 | if (!dev) | ||
546 | return ERR_PTR(-ENOMEM); | ||
547 | |||
548 | if (unit >= 0) { | ||
549 | sprintf(dev->name, "eth%d", unit); | ||
550 | netdev_boot_setup_check(dev); | ||
551 | io = dev->base_addr; | ||
552 | } | ||
553 | |||
554 | if (version_printed++ == 0) | ||
555 | PRINTK(("%s: %s", SK_NAME, rcsid)); | ||
556 | |||
557 | if (io > 0xff) { /* Check a single specified address */ | ||
558 | err = -EBUSY; | ||
559 | /* Check if on specified address is a SK_G16 */ | ||
560 | if (request_region(io, ETHERCARD_TOTAL_SIZE, "sk_g16")) { | ||
561 | err = SK_probe(dev, io); | ||
562 | if (!err) | ||
563 | goto got_it; | ||
564 | release_region(io, ETHERCARD_TOTAL_SIZE); | ||
565 | } | ||
566 | } else if (io > 0) { /* Don't probe at all */ | ||
567 | err = -ENXIO; | ||
568 | } else { | ||
569 | /* Autoprobe base_addr */ | ||
570 | for (port = &ports[0]; *port; port++) { | ||
571 | io = *port; | ||
572 | |||
573 | /* Check if I/O Port region is used by another board */ | ||
574 | if (!request_region(io, ETHERCARD_TOTAL_SIZE, "sk_g16")) | ||
575 | continue; /* Try next Port address */ | ||
576 | |||
577 | /* Check if at ioaddr is a SK_G16 */ | ||
578 | if (SK_probe(dev, io) == 0) | ||
579 | goto got_it; | ||
580 | |||
581 | release_region(io, ETHERCARD_TOTAL_SIZE); | ||
582 | } | ||
583 | } | ||
584 | err_out: | ||
585 | free_netdev(dev); | ||
586 | return ERR_PTR(err); | ||
587 | |||
588 | got_it: | ||
589 | err = register_netdev(dev); | ||
590 | if (err) { | ||
591 | release_region(dev->base_addr, ETHERCARD_TOTAL_SIZE); | ||
592 | goto err_out; | ||
593 | } | ||
594 | return dev; | ||
595 | |||
596 | } /* End of SK_init */ | ||
597 | |||
598 | |||
599 | MODULE_AUTHOR("Patrick J.D. Weichmann"); | ||
600 | MODULE_DESCRIPTION("Schneider & Koch G16 Ethernet Device Driver"); | ||
601 | MODULE_LICENSE("GPL"); | ||
602 | MODULE_PARM(io, "i"); | ||
603 | MODULE_PARM_DESC(io, "0 to probe common ports (unsafe), or the I/O base of the board"); | ||
604 | |||
605 | |||
606 | #ifdef MODULE | ||
607 | |||
608 | static struct net_device *SK_dev; | ||
609 | |||
610 | static int __init SK_init_module (void) | ||
611 | { | ||
612 | SK_dev = SK_init(-1); | ||
613 | return IS_ERR(SK_dev) ? PTR_ERR(SK_dev) : 0; | ||
614 | } | ||
615 | |||
616 | static void __exit SK_cleanup_module (void) | ||
617 | { | ||
618 | unregister_netdev(SK_dev); | ||
619 | release_region(SK_dev->base_addr, ETHERCARD_TOTAL_SIZE); | ||
620 | free_netdev(SK_dev); | ||
621 | } | ||
622 | |||
623 | module_init(SK_init_module); | ||
624 | module_exit(SK_cleanup_module); | ||
625 | #endif | ||
626 | |||
627 | |||
628 | /*- | ||
629 | * Function : SK_probe | ||
630 | * Author : Patrick J.D. Weichmann | ||
631 | * Date Created : 94/05/26 | ||
632 | * | ||
633 | * Description : This function is called by SK_init and | ||
634 | * does the main part of initialization. | ||
635 | * | ||
636 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
637 | * I : short ioaddr - I/O Port address where POS is. | ||
638 | * Return Value : 0 = Initialization done | ||
639 | * Errors : ENODEV - No SK_G16 found | ||
640 | * -1 - Configuration problem | ||
641 | * Globals : board - pointer to SK_RAM | ||
642 | * Update History : | ||
643 | * YY/MM/DD uid Description | ||
644 | * 94/06/30 pwe SK_ADDR now checked and at the correct place | ||
645 | -*/ | ||
646 | |||
647 | int __init SK_probe(struct net_device *dev, short ioaddr) | ||
648 | { | ||
649 | int i,j; /* Counters */ | ||
650 | int sk_addr_flag = 0; /* SK ADDR correct? 1 - no, 0 - yes */ | ||
651 | unsigned int rom_addr; /* used to store RAM address used for POS_ADDR */ | ||
652 | |||
653 | struct priv *p = netdev_priv(dev); /* SK_G16 private structure */ | ||
654 | |||
655 | if (inb(SK_POS0) != SK_IDLOW || inb(SK_POS1) != SK_IDHIGH) | ||
656 | return -ENODEV; | ||
657 | dev->base_addr = ioaddr; | ||
658 | |||
659 | if (SK_ADDR & 0x3fff || SK_ADDR < 0xa0000) | ||
660 | { | ||
661 | |||
662 | sk_addr_flag = 1; | ||
663 | |||
664 | /* | ||
665 | * Now here we could use a routine which searches for a free | ||
666 | * place in the ram and set SK_ADDR if found. TODO. | ||
667 | */ | ||
668 | } | ||
669 | |||
670 | if (SK_BOOT_ROM) /* Shall we keep Boot_ROM on ? */ | ||
671 | { | ||
672 | PRINTK(("## %s: SK_BOOT_ROM is set.\n", SK_NAME)); | ||
673 | |||
674 | rom_addr = SK_rom_addr(); | ||
675 | |||
676 | if (rom_addr == 0) /* No Boot_ROM found */ | ||
677 | { | ||
678 | if (sk_addr_flag) /* No or Invalid SK_ADDR is defined */ | ||
679 | { | ||
680 | printk("%s: SK_ADDR %#08x is not valid. Check configuration.\n", | ||
681 | dev->name, SK_ADDR); | ||
682 | return -1; | ||
683 | } | ||
684 | |||
685 | rom_addr = SK_ADDR; /* assign predefined address */ | ||
686 | |||
687 | PRINTK(("## %s: NO Bootrom found \n", SK_NAME)); | ||
688 | |||
689 | outb(SK_ROM_RAM_OFF, SK_POS2); /* Boot_ROM + RAM off */ | ||
690 | outb(POS_ADDR, SK_POS3); /* Set RAM address */ | ||
691 | outb(SK_RAM_ON, SK_POS2); /* enable RAM */ | ||
692 | } | ||
693 | else if (rom_addr == SK_ADDR) | ||
694 | { | ||
695 | printk("%s: RAM + ROM are set to the same address %#08x\n" | ||
696 | " Check configuration. Now switching off Boot_ROM\n", | ||
697 | SK_NAME, rom_addr); | ||
698 | |||
699 | outb(SK_ROM_RAM_OFF, SK_POS2); /* Boot_ROM + RAM off*/ | ||
700 | outb(POS_ADDR, SK_POS3); /* Set RAM address */ | ||
701 | outb(SK_RAM_ON, SK_POS2); /* enable RAM */ | ||
702 | } | ||
703 | else | ||
704 | { | ||
705 | PRINTK(("## %s: Found ROM at %#08x\n", SK_NAME, rom_addr)); | ||
706 | PRINTK(("## %s: Keeping Boot_ROM on\n", SK_NAME)); | ||
707 | |||
708 | if (sk_addr_flag) /* No or Invalid SK_ADDR is defined */ | ||
709 | { | ||
710 | printk("%s: SK_ADDR %#08x is not valid. Check configuration.\n", | ||
711 | dev->name, SK_ADDR); | ||
712 | return -1; | ||
713 | } | ||
714 | |||
715 | rom_addr = SK_ADDR; | ||
716 | |||
717 | outb(SK_ROM_RAM_OFF, SK_POS2); /* Boot_ROM + RAM off */ | ||
718 | outb(POS_ADDR, SK_POS3); /* Set RAM address */ | ||
719 | outb(SK_ROM_RAM_ON, SK_POS2); /* RAM on, BOOT_ROM on */ | ||
720 | } | ||
721 | } | ||
722 | else /* Don't keep Boot_ROM */ | ||
723 | { | ||
724 | PRINTK(("## %s: SK_BOOT_ROM is not set.\n", SK_NAME)); | ||
725 | |||
726 | if (sk_addr_flag) /* No or Invalid SK_ADDR is defined */ | ||
727 | { | ||
728 | printk("%s: SK_ADDR %#08x is not valid. Check configuration.\n", | ||
729 | dev->name, SK_ADDR); | ||
730 | return -1; | ||
731 | } | ||
732 | |||
733 | rom_addr = SK_rom_addr(); /* Try to find a Boot_ROM */ | ||
734 | |||
735 | /* IF we find a Boot_ROM disable it */ | ||
736 | |||
737 | outb(SK_ROM_RAM_OFF, SK_POS2); /* Boot_ROM + RAM off */ | ||
738 | |||
739 | /* We found a Boot_ROM and it's gone. Set RAM address on | ||
740 | * Boot_ROM address. | ||
741 | */ | ||
742 | |||
743 | if (rom_addr) | ||
744 | { | ||
745 | printk("%s: We found Boot_ROM at %#08x. Now setting RAM on" | ||
746 | "that address\n", SK_NAME, rom_addr); | ||
747 | |||
748 | outb(POS_ADDR, SK_POS3); /* Set RAM on Boot_ROM address */ | ||
749 | } | ||
750 | else /* We did not find a Boot_ROM, use predefined SK_ADDR for ram */ | ||
751 | { | ||
752 | if (sk_addr_flag) /* No or Invalid SK_ADDR is defined */ | ||
753 | { | ||
754 | printk("%s: SK_ADDR %#08x is not valid. Check configuration.\n", | ||
755 | dev->name, SK_ADDR); | ||
756 | return -1; | ||
757 | } | ||
758 | |||
759 | rom_addr = SK_ADDR; | ||
760 | |||
761 | outb(POS_ADDR, SK_POS3); /* Set RAM address */ | ||
762 | } | ||
763 | outb(SK_RAM_ON, SK_POS2); /* enable RAM */ | ||
764 | } | ||
765 | |||
766 | #ifdef SK_DEBUG | ||
767 | SK_print_pos(dev, "POS registers after ROM, RAM config"); | ||
768 | #endif | ||
769 | |||
770 | board = (SK_RAM *) isa_bus_to_virt(rom_addr); | ||
771 | |||
772 | /* Read in station address */ | ||
773 | for (i = 0, j = 0; i < ETH_ALEN; i++, j+=2) | ||
774 | { | ||
775 | dev->dev_addr[i] = readb(board->rom+j); | ||
776 | } | ||
777 | |||
778 | /* Check for manufacturer code */ | ||
779 | if (!(dev->dev_addr[0] == SK_MAC0 && | ||
780 | dev->dev_addr[1] == SK_MAC1 && | ||
781 | dev->dev_addr[2] == SK_MAC2) ) | ||
782 | { | ||
783 | PRINTK(("## %s: We did not find SK_G16 at RAM location.\n", | ||
784 | SK_NAME)); | ||
785 | return -ENODEV; /* NO SK_G16 found */ | ||
786 | } | ||
787 | |||
788 | printk("%s: %s found at %#3x, HW addr: %#04x:%02x:%02x:%02x:%02x:%02x\n", | ||
789 | dev->name, | ||
790 | "Schneider & Koch Netcard", | ||
791 | (unsigned int) dev->base_addr, | ||
792 | dev->dev_addr[0], | ||
793 | dev->dev_addr[1], | ||
794 | dev->dev_addr[2], | ||
795 | dev->dev_addr[3], | ||
796 | dev->dev_addr[4], | ||
797 | dev->dev_addr[5]); | ||
798 | |||
799 | memset((char *) dev->priv, 0, sizeof(struct priv)); /* clear memory */ | ||
800 | |||
801 | /* Assign our Device Driver functions */ | ||
802 | |||
803 | dev->open = SK_open; | ||
804 | dev->stop = SK_close; | ||
805 | dev->hard_start_xmit = SK_send_packet; | ||
806 | dev->get_stats = SK_get_stats; | ||
807 | dev->set_multicast_list = set_multicast_list; | ||
808 | dev->tx_timeout = SK_timeout; | ||
809 | dev->watchdog_timeo = HZ/7; | ||
810 | |||
811 | |||
812 | dev->flags &= ~IFF_MULTICAST; | ||
813 | |||
814 | /* Initialize private structure */ | ||
815 | |||
816 | p->ram = (struct SK_ram *) rom_addr; /* Set dual ported RAM addr */ | ||
817 | p->tmdhead = &(p->ram)->tmde[0]; /* Set TMD head */ | ||
818 | p->rmdhead = &(p->ram)->rmde[0]; /* Set RMD head */ | ||
819 | |||
820 | /* Initialize buffer pointers */ | ||
821 | |||
822 | for (i = 0; i < TMDNUM; i++) | ||
823 | { | ||
824 | p->tmdbufs[i] = &(p->ram)->tmdbuf[i]; | ||
825 | } | ||
826 | |||
827 | for (i = 0; i < RMDNUM; i++) | ||
828 | { | ||
829 | p->rmdbufs[i] = &(p->ram)->rmdbuf[i]; | ||
830 | } | ||
831 | |||
832 | #ifdef SK_DEBUG | ||
833 | SK_print_pos(dev, "End of SK_probe"); | ||
834 | SK_print_ram(dev); | ||
835 | #endif | ||
836 | return 0; /* Initialization done */ | ||
837 | } /* End of SK_probe() */ | ||
838 | |||
839 | |||
840 | /*- | ||
841 | * Function : SK_open | ||
842 | * Author : Patrick J.D. Weichmann | ||
843 | * Date Created : 94/05/26 | ||
844 | * | ||
845 | * Description : This function is called sometimes after booting | ||
846 | * when ifconfig program is run. | ||
847 | * | ||
848 | * This function requests an IRQ, sets the correct | ||
849 | * IRQ in the card. Then calls SK_lance_init() to | ||
850 | * init and start the LANCE chip. Then if everything is | ||
851 | * ok returns with 0 (OK), which means SK_G16 is now | ||
852 | * opened and operational. | ||
853 | * | ||
854 | * (Called by dev_open() /net/inet/dev.c) | ||
855 | * | ||
856 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
857 | * Return Value : 0 - Device opened | ||
858 | * Errors : -EAGAIN - Open failed | ||
859 | * Side Effects : None | ||
860 | * Update History : | ||
861 | * YY/MM/DD uid Description | ||
862 | -*/ | ||
863 | |||
864 | static int SK_open(struct net_device *dev) | ||
865 | { | ||
866 | int i = 0; | ||
867 | int irqval = 0; | ||
868 | int ioaddr = dev->base_addr; | ||
869 | |||
870 | int irqtab[] = SK_IRQS; | ||
871 | |||
872 | struct priv *p = netdev_priv(dev); | ||
873 | |||
874 | PRINTK(("## %s: At beginning of SK_open(). CSR0: %#06x\n", | ||
875 | SK_NAME, SK_read_reg(CSR0))); | ||
876 | |||
877 | if (dev->irq == 0) /* Autoirq */ | ||
878 | { | ||
879 | i = 0; | ||
880 | |||
881 | /* | ||
882 | * Check if one IRQ out of SK_IRQS is free and install | ||
883 | * interrupt handler. | ||
884 | * Most done by request_irq(). | ||
885 | * irqval: 0 - interrupt handler installed for IRQ irqtab[i] | ||
886 | * -EBUSY - interrupt busy | ||
887 | * -EINVAL - irq > 15 or handler = NULL | ||
888 | */ | ||
889 | |||
890 | do | ||
891 | { | ||
892 | irqval = request_irq(irqtab[i], &SK_interrupt, 0, "sk_g16", dev); | ||
893 | i++; | ||
894 | } while (irqval && irqtab[i]); | ||
895 | |||
896 | if (irqval) /* We tried every possible IRQ but no success */ | ||
897 | { | ||
898 | printk("%s: unable to get an IRQ\n", dev->name); | ||
899 | return -EAGAIN; | ||
900 | } | ||
901 | |||
902 | dev->irq = irqtab[--i]; | ||
903 | |||
904 | outb(i<<2, SK_POS4); /* Set Card on probed IRQ */ | ||
905 | |||
906 | } | ||
907 | else if (dev->irq == 2) /* IRQ2 is always IRQ9 */ | ||
908 | { | ||
909 | if (request_irq(9, &SK_interrupt, 0, "sk_g16", dev)) | ||
910 | { | ||
911 | printk("%s: unable to get IRQ 9\n", dev->name); | ||
912 | return -EAGAIN; | ||
913 | } | ||
914 | dev->irq = 9; | ||
915 | |||
916 | /* | ||
917 | * Now we set card on IRQ2. | ||
918 | * This can be confusing, but remember that IRQ2 on the network | ||
919 | * card is in reality IRQ9 | ||
920 | */ | ||
921 | outb(0x08, SK_POS4); /* set card to IRQ2 */ | ||
922 | |||
923 | } | ||
924 | else /* Check IRQ as defined in Space.c */ | ||
925 | { | ||
926 | int i = 0; | ||
927 | |||
928 | /* check if IRQ free and valid. Then install Interrupt handler */ | ||
929 | |||
930 | if (request_irq(dev->irq, &SK_interrupt, 0, "sk_g16", dev)) | ||
931 | { | ||
932 | printk("%s: unable to get selected IRQ\n", dev->name); | ||
933 | return -EAGAIN; | ||
934 | } | ||
935 | |||
936 | switch(dev->irq) | ||
937 | { | ||
938 | case 3: i = 0; | ||
939 | break; | ||
940 | case 5: i = 1; | ||
941 | break; | ||
942 | case 2: i = 2; | ||
943 | break; | ||
944 | case 11:i = 3; | ||
945 | break; | ||
946 | default: | ||
947 | printk("%s: Preselected IRQ %d is invalid for %s boards", | ||
948 | dev->name, | ||
949 | dev->irq, | ||
950 | SK_NAME); | ||
951 | return -EAGAIN; | ||
952 | } | ||
953 | |||
954 | outb(i<<2, SK_POS4); /* Set IRQ on card */ | ||
955 | } | ||
956 | |||
957 | printk("%s: Schneider & Koch G16 at %#3x, IRQ %d, shared mem at %#08x\n", | ||
958 | dev->name, (unsigned int)dev->base_addr, | ||
959 | (int) dev->irq, (unsigned int) p->ram); | ||
960 | |||
961 | if (!(i = SK_lance_init(dev, 0))) /* LANCE init OK? */ | ||
962 | { | ||
963 | netif_start_queue(dev); | ||
964 | |||
965 | #ifdef SK_DEBUG | ||
966 | |||
967 | /* | ||
968 | * This debug block tries to stop LANCE, | ||
969 | * reinit LANCE with transmitter and receiver disabled, | ||
970 | * then stop again and reinit with NORMAL_MODE | ||
971 | */ | ||
972 | |||
973 | printk("## %s: After lance init. CSR0: %#06x\n", | ||
974 | SK_NAME, SK_read_reg(CSR0)); | ||
975 | SK_write_reg(CSR0, CSR0_STOP); | ||
976 | printk("## %s: LANCE stopped. CSR0: %#06x\n", | ||
977 | SK_NAME, SK_read_reg(CSR0)); | ||
978 | SK_lance_init(dev, MODE_DTX | MODE_DRX); | ||
979 | printk("## %s: Reinit with DTX + DRX off. CSR0: %#06x\n", | ||
980 | SK_NAME, SK_read_reg(CSR0)); | ||
981 | SK_write_reg(CSR0, CSR0_STOP); | ||
982 | printk("## %s: LANCE stopped. CSR0: %#06x\n", | ||
983 | SK_NAME, SK_read_reg(CSR0)); | ||
984 | SK_lance_init(dev, MODE_NORMAL); | ||
985 | printk("## %s: LANCE back to normal mode. CSR0: %#06x\n", | ||
986 | SK_NAME, SK_read_reg(CSR0)); | ||
987 | SK_print_pos(dev, "POS regs before returning OK"); | ||
988 | |||
989 | #endif /* SK_DEBUG */ | ||
990 | |||
991 | return 0; /* SK_open() is successful */ | ||
992 | } | ||
993 | else /* LANCE init failed */ | ||
994 | { | ||
995 | |||
996 | PRINTK(("## %s: LANCE init failed: CSR0: %#06x\n", | ||
997 | SK_NAME, SK_read_reg(CSR0))); | ||
998 | |||
999 | return -EAGAIN; | ||
1000 | } | ||
1001 | |||
1002 | } /* End of SK_open() */ | ||
1003 | |||
1004 | |||
1005 | /*- | ||
1006 | * Function : SK_lance_init | ||
1007 | * Author : Patrick J.D. Weichmann | ||
1008 | * Date Created : 94/05/26 | ||
1009 | * | ||
1010 | * Description : Reset LANCE chip, fill RMD, TMD structures with | ||
1011 | * start values and Start LANCE. | ||
1012 | * | ||
1013 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
1014 | * I : int mode - put LANCE into "mode" see data-sheet for | ||
1015 | * more info. | ||
1016 | * Return Value : 0 - Init done | ||
1017 | * Errors : -1 - Init failed | ||
1018 | * Update History : | ||
1019 | * YY/MM/DD uid Description | ||
1020 | -*/ | ||
1021 | |||
1022 | static int SK_lance_init(struct net_device *dev, unsigned short mode) | ||
1023 | { | ||
1024 | int i; | ||
1025 | unsigned long flags; | ||
1026 | struct priv *p = netdev_priv(dev); | ||
1027 | struct tmd *tmdp; | ||
1028 | struct rmd *rmdp; | ||
1029 | |||
1030 | PRINTK(("## %s: At beginning of LANCE init. CSR0: %#06x\n", | ||
1031 | SK_NAME, SK_read_reg(CSR0))); | ||
1032 | |||
1033 | /* Reset LANCE */ | ||
1034 | SK_reset_board(); | ||
1035 | |||
1036 | /* Initialize TMD's with start values */ | ||
1037 | p->tmdnum = 0; /* First descriptor for transmitting */ | ||
1038 | p->tmdlast = 0; /* First descriptor for reading stats */ | ||
1039 | |||
1040 | for (i = 0; i < TMDNUM; i++) /* Init all TMD's */ | ||
1041 | { | ||
1042 | tmdp = p->tmdhead + i; | ||
1043 | |||
1044 | writel((unsigned long) p->tmdbufs[i], tmdp->u.buffer); /* assign buffer */ | ||
1045 | |||
1046 | /* Mark TMD as start and end of packet */ | ||
1047 | writeb(TX_STP | TX_ENP, &tmdp->u.s.status); | ||
1048 | } | ||
1049 | |||
1050 | |||
1051 | /* Initialize RMD's with start values */ | ||
1052 | |||
1053 | p->rmdnum = 0; /* First RMD which will be used */ | ||
1054 | |||
1055 | for (i = 0; i < RMDNUM; i++) /* Init all RMD's */ | ||
1056 | { | ||
1057 | rmdp = p->rmdhead + i; | ||
1058 | |||
1059 | |||
1060 | writel((unsigned long) p->rmdbufs[i], rmdp->u.buffer); /* assign buffer */ | ||
1061 | |||
1062 | /* | ||
1063 | * LANCE must be owner at beginning so that he can fill in | ||
1064 | * receiving packets, set status and release RMD | ||
1065 | */ | ||
1066 | |||
1067 | writeb(RX_OWN, &rmdp->u.s.status); | ||
1068 | |||
1069 | writew(-PKT_BUF_SZ, &rmdp->blen); /* Buffer Size (two's complement) */ | ||
1070 | |||
1071 | writeb(0, &rmdp->mlen); /* init message length */ | ||
1072 | |||
1073 | } | ||
1074 | |||
1075 | /* Fill LANCE Initialize Block */ | ||
1076 | |||
1077 | writew(mode, (&((p->ram)->ib.mode))); /* Set operation mode */ | ||
1078 | |||
1079 | for (i = 0; i < ETH_ALEN; i++) /* Set physical address */ | ||
1080 | { | ||
1081 | writeb(dev->dev_addr[i], (&((p->ram)->ib.paddr[i]))); | ||
1082 | } | ||
1083 | |||
1084 | for (i = 0; i < 8; i++) /* Set multicast, logical address */ | ||
1085 | { | ||
1086 | writeb(0, (&((p->ram)->ib.laddr[i]))); /* We do not use logical addressing */ | ||
1087 | } | ||
1088 | |||
1089 | /* Set ring descriptor pointers and set number of descriptors */ | ||
1090 | |||
1091 | writel((int)p->rmdhead | RMDNUMMASK, (&((p->ram)->ib.rdrp))); | ||
1092 | writel((int)p->tmdhead | TMDNUMMASK, (&((p->ram)->ib.tdrp))); | ||
1093 | |||
1094 | /* Prepare LANCE Control and Status Registers */ | ||
1095 | |||
1096 | spin_lock_irqsave(&SK_lock, flags); | ||
1097 | |||
1098 | SK_write_reg(CSR3, CSR3_ACON); /* Ale Control !!!THIS MUST BE SET!!!! */ | ||
1099 | |||
1100 | /* | ||
1101 | * LANCE addresses the RAM from 0x0000 to 0x3fbf and has no access to | ||
1102 | * PC Memory locations. | ||
1103 | * | ||
1104 | * In structure SK_ram is defined that the first thing in ram | ||
1105 | * is the initialization block. So his address is for LANCE always | ||
1106 | * 0x0000 | ||
1107 | * | ||
1108 | * CSR1 contains low order bits 15:0 of initialization block address | ||
1109 | * CSR2 is built of: | ||
1110 | * 7:0 High order bits 23:16 of initialization block address | ||
1111 | * 15:8 reserved, must be 0 | ||
1112 | */ | ||
1113 | |||
1114 | /* Set initialization block address (must be on word boundary) */ | ||
1115 | SK_write_reg(CSR1, 0); /* Set low order bits 15:0 */ | ||
1116 | SK_write_reg(CSR2, 0); /* Set high order bits 23:16 */ | ||
1117 | |||
1118 | |||
1119 | PRINTK(("## %s: After setting CSR1-3. CSR0: %#06x\n", | ||
1120 | SK_NAME, SK_read_reg(CSR0))); | ||
1121 | |||
1122 | /* Initialize LANCE */ | ||
1123 | |||
1124 | /* | ||
1125 | * INIT = Initialize, when set, causes the LANCE to begin the | ||
1126 | * initialization procedure and access the Init Block. | ||
1127 | */ | ||
1128 | |||
1129 | SK_write_reg(CSR0, CSR0_INIT); | ||
1130 | |||
1131 | spin_unlock_irqrestore(&SK_lock, flags); | ||
1132 | |||
1133 | /* Wait until LANCE finished initialization */ | ||
1134 | |||
1135 | SK_set_RAP(CSR0); /* Register Address Pointer to CSR0 */ | ||
1136 | |||
1137 | for (i = 0; (i < 100) && !(SK_rread_reg() & CSR0_IDON); i++) | ||
1138 | ; /* Wait until init done or go ahead if problems (i>=100) */ | ||
1139 | |||
1140 | if (i >= 100) /* Something is wrong ! */ | ||
1141 | { | ||
1142 | printk("%s: can't init am7990, status: %04x " | ||
1143 | "init_block: %#08x\n", | ||
1144 | dev->name, (int) SK_read_reg(CSR0), | ||
1145 | (unsigned int) &(p->ram)->ib); | ||
1146 | |||
1147 | #ifdef SK_DEBUG | ||
1148 | SK_print_pos(dev, "LANCE INIT failed"); | ||
1149 | SK_print_dev(dev,"Device Structure:"); | ||
1150 | #endif | ||
1151 | |||
1152 | return -1; /* LANCE init failed */ | ||
1153 | } | ||
1154 | |||
1155 | PRINTK(("## %s: init done after %d ticks\n", SK_NAME, i)); | ||
1156 | |||
1157 | /* Clear Initialize done, enable Interrupts, start LANCE */ | ||
1158 | |||
1159 | SK_write_reg(CSR0, CSR0_IDON | CSR0_INEA | CSR0_STRT); | ||
1160 | |||
1161 | PRINTK(("## %s: LANCE started. CSR0: %#06x\n", SK_NAME, | ||
1162 | SK_read_reg(CSR0))); | ||
1163 | |||
1164 | return 0; /* LANCE is up and running */ | ||
1165 | |||
1166 | } /* End of SK_lance_init() */ | ||
1167 | |||
1168 | |||
1169 | |||
1170 | /*- | ||
1171 | * Function : SK_send_packet | ||
1172 | * Author : Patrick J.D. Weichmann | ||
1173 | * Date Created : 94/05/27 | ||
1174 | * | ||
1175 | * Description : Writes an socket buffer into a transmit descriptor | ||
1176 | * and starts transmission. | ||
1177 | * | ||
1178 | * Parameters : I : struct sk_buff *skb - packet to transfer | ||
1179 | * I : struct net_device *dev - SK_G16 device structure | ||
1180 | * Return Value : 0 - OK | ||
1181 | * 1 - Could not transmit (dev_queue_xmit will queue it) | ||
1182 | * and try to sent it later | ||
1183 | * Globals : None | ||
1184 | * Side Effects : None | ||
1185 | * Update History : | ||
1186 | * YY/MM/DD uid Description | ||
1187 | -*/ | ||
1188 | |||
1189 | static void SK_timeout(struct net_device *dev) | ||
1190 | { | ||
1191 | printk(KERN_WARNING "%s: xmitter timed out, try to restart!\n", dev->name); | ||
1192 | SK_lance_init(dev, MODE_NORMAL); /* Reinit LANCE */ | ||
1193 | netif_wake_queue(dev); /* Clear Transmitter flag */ | ||
1194 | dev->trans_start = jiffies; /* Mark Start of transmission */ | ||
1195 | } | ||
1196 | |||
1197 | static int SK_send_packet(struct sk_buff *skb, struct net_device *dev) | ||
1198 | { | ||
1199 | struct priv *p = netdev_priv(dev); | ||
1200 | struct tmd *tmdp; | ||
1201 | static char pad[64]; | ||
1202 | |||
1203 | PRINTK2(("## %s: SK_send_packet() called, CSR0 %#04x.\n", | ||
1204 | SK_NAME, SK_read_reg(CSR0))); | ||
1205 | |||
1206 | |||
1207 | /* | ||
1208 | * Block a timer-based transmit from overlapping. | ||
1209 | * This means check if we are already in. | ||
1210 | */ | ||
1211 | |||
1212 | netif_stop_queue (dev); | ||
1213 | |||
1214 | { | ||
1215 | |||
1216 | /* Evaluate Packet length */ | ||
1217 | short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN; | ||
1218 | |||
1219 | tmdp = p->tmdhead + p->tmdnum; /* Which descriptor for transmitting */ | ||
1220 | |||
1221 | /* Fill in Transmit Message Descriptor */ | ||
1222 | |||
1223 | /* Copy data into dual ported ram */ | ||
1224 | |||
1225 | memcpy_toio((tmdp->u.buffer & 0x00ffffff), skb->data, skb->len); | ||
1226 | if (len != skb->len) | ||
1227 | memcpy_toio((tmdp->u.buffer & 0x00ffffff) + skb->len, pad, len-skb->len); | ||
1228 | |||
1229 | writew(-len, &tmdp->blen); /* set length to transmit */ | ||
1230 | |||
1231 | /* | ||
1232 | * Packet start and end is always set because we use the maximum | ||
1233 | * packet length as buffer length. | ||
1234 | * Relinquish ownership to LANCE | ||
1235 | */ | ||
1236 | |||
1237 | writeb(TX_OWN | TX_STP | TX_ENP, &tmdp->u.s.status); | ||
1238 | |||
1239 | /* Start Demand Transmission */ | ||
1240 | SK_write_reg(CSR0, CSR0_TDMD | CSR0_INEA); | ||
1241 | |||
1242 | dev->trans_start = jiffies; /* Mark start of transmission */ | ||
1243 | |||
1244 | /* Set pointer to next transmit buffer */ | ||
1245 | p->tmdnum++; | ||
1246 | p->tmdnum &= TMDNUM-1; | ||
1247 | |||
1248 | /* Do we own the next transmit buffer ? */ | ||
1249 | if (! (readb(&((p->tmdhead + p->tmdnum)->u.s.status)) & TX_OWN) ) | ||
1250 | { | ||
1251 | /* | ||
1252 | * We own next buffer and are ready to transmit, so | ||
1253 | * clear busy flag | ||
1254 | */ | ||
1255 | netif_start_queue(dev); | ||
1256 | } | ||
1257 | |||
1258 | p->stats.tx_bytes += skb->len; | ||
1259 | |||
1260 | } | ||
1261 | |||
1262 | dev_kfree_skb(skb); | ||
1263 | return 0; | ||
1264 | } /* End of SK_send_packet */ | ||
1265 | |||
1266 | |||
1267 | /*- | ||
1268 | * Function : SK_interrupt | ||
1269 | * Author : Patrick J.D. Weichmann | ||
1270 | * Date Created : 94/05/27 | ||
1271 | * | ||
1272 | * Description : SK_G16 interrupt handler which checks for LANCE | ||
1273 | * Errors, handles transmit and receive interrupts | ||
1274 | * | ||
1275 | * Parameters : I : int irq, void *dev_id, struct pt_regs * regs - | ||
1276 | * Return Value : None | ||
1277 | * Errors : None | ||
1278 | * Globals : None | ||
1279 | * Side Effects : None | ||
1280 | * Update History : | ||
1281 | * YY/MM/DD uid Description | ||
1282 | -*/ | ||
1283 | |||
1284 | static irqreturn_t SK_interrupt(int irq, void *dev_id, struct pt_regs * regs) | ||
1285 | { | ||
1286 | int csr0; | ||
1287 | struct net_device *dev = dev_id; | ||
1288 | struct priv *p = netdev_priv(dev); | ||
1289 | |||
1290 | |||
1291 | PRINTK2(("## %s: SK_interrupt(). status: %#06x\n", | ||
1292 | SK_NAME, SK_read_reg(CSR0))); | ||
1293 | |||
1294 | if (dev == NULL) | ||
1295 | { | ||
1296 | printk("SK_interrupt(): IRQ %d for unknown device.\n", irq); | ||
1297 | } | ||
1298 | |||
1299 | spin_lock (&SK_lock); | ||
1300 | |||
1301 | csr0 = SK_read_reg(CSR0); /* store register for checking */ | ||
1302 | |||
1303 | /* | ||
1304 | * Acknowledge all of the current interrupt sources, disable | ||
1305 | * Interrupts (INEA = 0) | ||
1306 | */ | ||
1307 | |||
1308 | SK_write_reg(CSR0, csr0 & CSR0_CLRALL); | ||
1309 | |||
1310 | if (csr0 & CSR0_ERR) /* LANCE Error */ | ||
1311 | { | ||
1312 | printk("%s: error: %04x\n", dev->name, csr0); | ||
1313 | |||
1314 | if (csr0 & CSR0_MISS) /* No place to store packet ? */ | ||
1315 | { | ||
1316 | p->stats.rx_dropped++; | ||
1317 | } | ||
1318 | } | ||
1319 | |||
1320 | if (csr0 & CSR0_RINT) /* Receive Interrupt (packet arrived) */ | ||
1321 | { | ||
1322 | SK_rxintr(dev); | ||
1323 | } | ||
1324 | |||
1325 | if (csr0 & CSR0_TINT) /* Transmit interrupt (packet sent) */ | ||
1326 | { | ||
1327 | SK_txintr(dev); | ||
1328 | } | ||
1329 | |||
1330 | SK_write_reg(CSR0, CSR0_INEA); /* Enable Interrupts */ | ||
1331 | |||
1332 | spin_unlock (&SK_lock); | ||
1333 | return IRQ_HANDLED; | ||
1334 | } /* End of SK_interrupt() */ | ||
1335 | |||
1336 | |||
1337 | /*- | ||
1338 | * Function : SK_txintr | ||
1339 | * Author : Patrick J.D. Weichmann | ||
1340 | * Date Created : 94/05/27 | ||
1341 | * | ||
1342 | * Description : After sending a packet we check status, update | ||
1343 | * statistics and relinquish ownership of transmit | ||
1344 | * descriptor ring. | ||
1345 | * | ||
1346 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
1347 | * Return Value : None | ||
1348 | * Errors : None | ||
1349 | * Globals : None | ||
1350 | * Update History : | ||
1351 | * YY/MM/DD uid Description | ||
1352 | -*/ | ||
1353 | |||
1354 | static void SK_txintr(struct net_device *dev) | ||
1355 | { | ||
1356 | int tmdstat; | ||
1357 | struct tmd *tmdp; | ||
1358 | struct priv *p = netdev_priv(dev); | ||
1359 | |||
1360 | |||
1361 | PRINTK2(("## %s: SK_txintr() status: %#06x\n", | ||
1362 | SK_NAME, SK_read_reg(CSR0))); | ||
1363 | |||
1364 | tmdp = p->tmdhead + p->tmdlast; /* Which buffer we sent at last ? */ | ||
1365 | |||
1366 | /* Set next buffer */ | ||
1367 | p->tmdlast++; | ||
1368 | p->tmdlast &= TMDNUM-1; | ||
1369 | |||
1370 | tmdstat = readb(&tmdp->u.s.status); | ||
1371 | |||
1372 | /* | ||
1373 | * We check status of transmitted packet. | ||
1374 | * see LANCE data-sheet for error explanation | ||
1375 | */ | ||
1376 | if (tmdstat & TX_ERR) /* Error occurred */ | ||
1377 | { | ||
1378 | int stat2 = readw(&tmdp->status2); | ||
1379 | |||
1380 | printk("%s: TX error: %04x %04x\n", dev->name, tmdstat, stat2); | ||
1381 | |||
1382 | if (stat2 & TX_TDR) /* TDR problems? */ | ||
1383 | { | ||
1384 | printk("%s: tdr-problems \n", dev->name); | ||
1385 | } | ||
1386 | |||
1387 | if (stat2 & TX_RTRY) /* Failed in 16 attempts to transmit ? */ | ||
1388 | p->stats.tx_aborted_errors++; | ||
1389 | if (stat2 & TX_LCOL) /* Late collision ? */ | ||
1390 | p->stats.tx_window_errors++; | ||
1391 | if (stat2 & TX_LCAR) /* Loss of Carrier ? */ | ||
1392 | p->stats.tx_carrier_errors++; | ||
1393 | if (stat2 & TX_UFLO) /* Underflow error ? */ | ||
1394 | { | ||
1395 | p->stats.tx_fifo_errors++; | ||
1396 | |||
1397 | /* | ||
1398 | * If UFLO error occurs it will turn transmitter of. | ||
1399 | * So we must reinit LANCE | ||
1400 | */ | ||
1401 | |||
1402 | SK_lance_init(dev, MODE_NORMAL); | ||
1403 | } | ||
1404 | |||
1405 | p->stats.tx_errors++; | ||
1406 | |||
1407 | writew(0, &tmdp->status2); /* Clear error flags */ | ||
1408 | } | ||
1409 | else if (tmdstat & TX_MORE) /* Collisions occurred ? */ | ||
1410 | { | ||
1411 | /* | ||
1412 | * Here I have a problem. | ||
1413 | * I only know that there must be one or up to 15 collisions. | ||
1414 | * That's why TX_MORE is set, because after 16 attempts TX_RTRY | ||
1415 | * will be set which means couldn't send packet aborted transfer. | ||
1416 | * | ||
1417 | * First I did not have this in but then I thought at minimum | ||
1418 | * we see that something was not ok. | ||
1419 | * If anyone knows something better than this to handle this | ||
1420 | * please report it. | ||
1421 | */ | ||
1422 | |||
1423 | p->stats.collisions++; | ||
1424 | } | ||
1425 | else /* Packet sent without any problems */ | ||
1426 | { | ||
1427 | p->stats.tx_packets++; | ||
1428 | } | ||
1429 | |||
1430 | /* | ||
1431 | * We mark transmitter not busy anymore, because now we have a free | ||
1432 | * transmit descriptor which can be filled by SK_send_packet and | ||
1433 | * afterwards sent by the LANCE | ||
1434 | * | ||
1435 | * The function which do handle slow IRQ parts is do_bottom_half() | ||
1436 | * which runs at normal kernel priority, that means all interrupt are | ||
1437 | * enabled. (see kernel/irq.c) | ||
1438 | * | ||
1439 | * net_bh does something like this: | ||
1440 | * - check if already in net_bh | ||
1441 | * - try to transmit something from the send queue | ||
1442 | * - if something is in the receive queue send it up to higher | ||
1443 | * levels if it is a known protocol | ||
1444 | * - try to transmit something from the send queue | ||
1445 | */ | ||
1446 | |||
1447 | netif_wake_queue(dev); | ||
1448 | |||
1449 | } /* End of SK_txintr() */ | ||
1450 | |||
1451 | |||
1452 | /*- | ||
1453 | * Function : SK_rxintr | ||
1454 | * Author : Patrick J.D. Weichmann | ||
1455 | * Date Created : 94/05/27 | ||
1456 | * | ||
1457 | * Description : Buffer sent, check for errors, relinquish ownership | ||
1458 | * of the receive message descriptor. | ||
1459 | * | ||
1460 | * Parameters : I : SK_G16 device structure | ||
1461 | * Return Value : None | ||
1462 | * Globals : None | ||
1463 | * Update History : | ||
1464 | * YY/MM/DD uid Description | ||
1465 | -*/ | ||
1466 | |||
1467 | static void SK_rxintr(struct net_device *dev) | ||
1468 | { | ||
1469 | |||
1470 | struct rmd *rmdp; | ||
1471 | int rmdstat; | ||
1472 | struct priv *p = netdev_priv(dev); | ||
1473 | |||
1474 | PRINTK2(("## %s: SK_rxintr(). CSR0: %#06x\n", | ||
1475 | SK_NAME, SK_read_reg(CSR0))); | ||
1476 | |||
1477 | rmdp = p->rmdhead + p->rmdnum; | ||
1478 | |||
1479 | /* As long as we own the next entry, check status and send | ||
1480 | * it up to higher layer | ||
1481 | */ | ||
1482 | |||
1483 | while (!( (rmdstat = readb(&rmdp->u.s.status)) & RX_OWN)) | ||
1484 | { | ||
1485 | /* | ||
1486 | * Start and end of packet must be set, because we use | ||
1487 | * the ethernet maximum packet length (1518) as buffer size. | ||
1488 | * | ||
1489 | * Because our buffers are at maximum OFLO and BUFF errors are | ||
1490 | * not to be concerned (see Data sheet) | ||
1491 | */ | ||
1492 | |||
1493 | if ((rmdstat & (RX_STP | RX_ENP)) != (RX_STP | RX_ENP)) | ||
1494 | { | ||
1495 | /* Start of a frame > 1518 Bytes ? */ | ||
1496 | |||
1497 | if (rmdstat & RX_STP) | ||
1498 | { | ||
1499 | p->stats.rx_errors++; /* bad packet received */ | ||
1500 | p->stats.rx_length_errors++; /* packet too long */ | ||
1501 | |||
1502 | printk("%s: packet too long\n", dev->name); | ||
1503 | } | ||
1504 | |||
1505 | /* | ||
1506 | * All other packets will be ignored until a new frame with | ||
1507 | * start (RX_STP) set follows. | ||
1508 | * | ||
1509 | * What we do is just give descriptor free for new incoming | ||
1510 | * packets. | ||
1511 | */ | ||
1512 | |||
1513 | writeb(RX_OWN, &rmdp->u.s.status); /* Relinquish ownership to LANCE */ | ||
1514 | |||
1515 | } | ||
1516 | else if (rmdstat & RX_ERR) /* Receive Error ? */ | ||
1517 | { | ||
1518 | printk("%s: RX error: %04x\n", dev->name, (int) rmdstat); | ||
1519 | |||
1520 | p->stats.rx_errors++; | ||
1521 | |||
1522 | if (rmdstat & RX_FRAM) p->stats.rx_frame_errors++; | ||
1523 | if (rmdstat & RX_CRC) p->stats.rx_crc_errors++; | ||
1524 | |||
1525 | writeb(RX_OWN, &rmdp->u.s.status); /* Relinquish ownership to LANCE */ | ||
1526 | |||
1527 | } | ||
1528 | else /* We have a packet which can be queued for the upper layers */ | ||
1529 | { | ||
1530 | |||
1531 | int len = readw(&rmdp->mlen) & 0x0fff; /* extract message length from receive buffer */ | ||
1532 | struct sk_buff *skb; | ||
1533 | |||
1534 | skb = dev_alloc_skb(len+2); /* allocate socket buffer */ | ||
1535 | |||
1536 | if (skb == NULL) /* Could not get mem ? */ | ||
1537 | { | ||
1538 | |||
1539 | /* | ||
1540 | * Couldn't allocate sk_buffer so we give descriptor back | ||
1541 | * to Lance, update statistics and go ahead. | ||
1542 | */ | ||
1543 | |||
1544 | writeb(RX_OWN, &rmdp->u.s.status); /* Relinquish ownership to LANCE */ | ||
1545 | printk("%s: Couldn't allocate sk_buff, deferring packet.\n", | ||
1546 | dev->name); | ||
1547 | p->stats.rx_dropped++; | ||
1548 | |||
1549 | break; /* Jump out */ | ||
1550 | } | ||
1551 | |||
1552 | /* Prepare sk_buff to queue for upper layers */ | ||
1553 | |||
1554 | skb->dev = dev; | ||
1555 | skb_reserve(skb,2); /* Align IP header on 16 byte boundary */ | ||
1556 | |||
1557 | /* | ||
1558 | * Copy data out of our receive descriptor into sk_buff. | ||
1559 | * | ||
1560 | * (rmdp->u.buffer & 0x00ffffff) -> get address of buffer and | ||
1561 | * ignore status fields) | ||
1562 | */ | ||
1563 | |||
1564 | memcpy_fromio(skb_put(skb,len), (rmdp->u.buffer & 0x00ffffff), len); | ||
1565 | |||
1566 | |||
1567 | /* | ||
1568 | * Notify the upper protocol layers that there is another packet | ||
1569 | * to handle | ||
1570 | * | ||
1571 | * netif_rx() always succeeds. see /net/inet/dev.c for more. | ||
1572 | */ | ||
1573 | |||
1574 | skb->protocol=eth_type_trans(skb,dev); | ||
1575 | netif_rx(skb); /* queue packet and mark it for processing */ | ||
1576 | |||
1577 | /* | ||
1578 | * Packet is queued and marked for processing so we | ||
1579 | * free our descriptor and update statistics | ||
1580 | */ | ||
1581 | |||
1582 | writeb(RX_OWN, &rmdp->u.s.status); | ||
1583 | dev->last_rx = jiffies; | ||
1584 | p->stats.rx_packets++; | ||
1585 | p->stats.rx_bytes += len; | ||
1586 | |||
1587 | |||
1588 | p->rmdnum++; | ||
1589 | p->rmdnum %= RMDNUM; | ||
1590 | |||
1591 | rmdp = p->rmdhead + p->rmdnum; | ||
1592 | } | ||
1593 | } | ||
1594 | } /* End of SK_rxintr() */ | ||
1595 | |||
1596 | |||
1597 | /*- | ||
1598 | * Function : SK_close | ||
1599 | * Author : Patrick J.D. Weichmann | ||
1600 | * Date Created : 94/05/26 | ||
1601 | * | ||
1602 | * Description : close gets called from dev_close() and should | ||
1603 | * deinstall the card (free_irq, mem etc). | ||
1604 | * | ||
1605 | * Parameters : I : struct net_device *dev - our device structure | ||
1606 | * Return Value : 0 - closed device driver | ||
1607 | * Errors : None | ||
1608 | * Globals : None | ||
1609 | * Update History : | ||
1610 | * YY/MM/DD uid Description | ||
1611 | -*/ | ||
1612 | |||
1613 | /* I have tried to set BOOT_ROM on and RAM off but then, after a 'ifconfig | ||
1614 | * down' the system stops. So I don't shut set card to init state. | ||
1615 | */ | ||
1616 | |||
1617 | static int SK_close(struct net_device *dev) | ||
1618 | { | ||
1619 | |||
1620 | PRINTK(("## %s: SK_close(). CSR0: %#06x\n", | ||
1621 | SK_NAME, SK_read_reg(CSR0))); | ||
1622 | |||
1623 | netif_stop_queue(dev); /* Transmitter busy */ | ||
1624 | |||
1625 | printk("%s: Shutting %s down CSR0 %#06x\n", dev->name, SK_NAME, | ||
1626 | (int) SK_read_reg(CSR0)); | ||
1627 | |||
1628 | SK_write_reg(CSR0, CSR0_STOP); /* STOP the LANCE */ | ||
1629 | |||
1630 | free_irq(dev->irq, dev); /* Free IRQ */ | ||
1631 | |||
1632 | return 0; /* always succeed */ | ||
1633 | |||
1634 | } /* End of SK_close() */ | ||
1635 | |||
1636 | |||
1637 | /*- | ||
1638 | * Function : SK_get_stats | ||
1639 | * Author : Patrick J.D. Weichmann | ||
1640 | * Date Created : 94/05/26 | ||
1641 | * | ||
1642 | * Description : Return current status structure to upper layers. | ||
1643 | * It is called by sprintf_stats (dev.c). | ||
1644 | * | ||
1645 | * Parameters : I : struct net_device *dev - our device structure | ||
1646 | * Return Value : struct net_device_stats * - our current statistics | ||
1647 | * Errors : None | ||
1648 | * Side Effects : None | ||
1649 | * Update History : | ||
1650 | * YY/MM/DD uid Description | ||
1651 | -*/ | ||
1652 | |||
1653 | static struct net_device_stats *SK_get_stats(struct net_device *dev) | ||
1654 | { | ||
1655 | |||
1656 | struct priv *p = netdev_priv(dev); | ||
1657 | |||
1658 | PRINTK(("## %s: SK_get_stats(). CSR0: %#06x\n", | ||
1659 | SK_NAME, SK_read_reg(CSR0))); | ||
1660 | |||
1661 | return &p->stats; /* Return Device status */ | ||
1662 | |||
1663 | } /* End of SK_get_stats() */ | ||
1664 | |||
1665 | |||
1666 | /*- | ||
1667 | * Function : set_multicast_list | ||
1668 | * Author : Patrick J.D. Weichmann | ||
1669 | * Date Created : 94/05/26 | ||
1670 | * | ||
1671 | * Description : This function gets called when a program performs | ||
1672 | * a SIOCSIFFLAGS call. Ifconfig does this if you call | ||
1673 | * 'ifconfig [-]allmulti' which enables or disables the | ||
1674 | * Promiscuous mode. | ||
1675 | * Promiscuous mode is when the Network card accepts all | ||
1676 | * packets, not only the packets which match our MAC | ||
1677 | * Address. It is useful for writing a network monitor, | ||
1678 | * but it is also a security problem. You have to remember | ||
1679 | * that all information on the net is not encrypted. | ||
1680 | * | ||
1681 | * Parameters : I : struct net_device *dev - SK_G16 device Structure | ||
1682 | * Return Value : None | ||
1683 | * Errors : None | ||
1684 | * Globals : None | ||
1685 | * Update History : | ||
1686 | * YY/MM/DD uid Description | ||
1687 | * 95/10/18 ACox New multicast calling scheme | ||
1688 | -*/ | ||
1689 | |||
1690 | |||
1691 | /* Set or clear the multicast filter for SK_G16. | ||
1692 | */ | ||
1693 | |||
1694 | static void set_multicast_list(struct net_device *dev) | ||
1695 | { | ||
1696 | |||
1697 | if (dev->flags&IFF_PROMISC) | ||
1698 | { | ||
1699 | /* Reinitialize LANCE with MODE_PROM set */ | ||
1700 | SK_lance_init(dev, MODE_PROM); | ||
1701 | } | ||
1702 | else if (dev->mc_count==0 && !(dev->flags&IFF_ALLMULTI)) | ||
1703 | { | ||
1704 | /* Reinitialize LANCE without MODE_PROM */ | ||
1705 | SK_lance_init(dev, MODE_NORMAL); | ||
1706 | } | ||
1707 | else | ||
1708 | { | ||
1709 | /* Multicast with logical address filter on */ | ||
1710 | /* Reinitialize LANCE without MODE_PROM */ | ||
1711 | SK_lance_init(dev, MODE_NORMAL); | ||
1712 | |||
1713 | /* Not implemented yet. */ | ||
1714 | } | ||
1715 | } /* End of set_multicast_list() */ | ||
1716 | |||
1717 | |||
1718 | |||
1719 | /*- | ||
1720 | * Function : SK_rom_addr | ||
1721 | * Author : Patrick J.D. Weichmann | ||
1722 | * Date Created : 94/06/01 | ||
1723 | * | ||
1724 | * Description : Try to find a Boot_ROM at all possible locations | ||
1725 | * | ||
1726 | * Parameters : None | ||
1727 | * Return Value : Address where Boot_ROM is | ||
1728 | * Errors : 0 - Did not find Boot_ROM | ||
1729 | * Globals : None | ||
1730 | * Update History : | ||
1731 | * YY/MM/DD uid Description | ||
1732 | -*/ | ||
1733 | |||
1734 | unsigned int __init SK_rom_addr(void) | ||
1735 | { | ||
1736 | int i,j; | ||
1737 | int rom_found = 0; | ||
1738 | unsigned int rom_location[] = SK_BOOT_ROM_LOCATIONS; | ||
1739 | unsigned char rom_id[] = SK_BOOT_ROM_ID; | ||
1740 | unsigned char test_byte; | ||
1741 | |||
1742 | /* Autodetect Boot_ROM */ | ||
1743 | PRINTK(("## %s: Autodetection of Boot_ROM\n", SK_NAME)); | ||
1744 | |||
1745 | for (i = 0; (rom_location[i] != 0) && (rom_found == 0); i++) | ||
1746 | { | ||
1747 | |||
1748 | PRINTK(("## Trying ROM location %#08x", rom_location[i])); | ||
1749 | |||
1750 | rom_found = 1; | ||
1751 | for (j = 0; j < 6; j++) | ||
1752 | { | ||
1753 | test_byte = readb(rom_location[i]+j); | ||
1754 | PRINTK((" %02x ", *test_byte)); | ||
1755 | |||
1756 | if(test_byte != rom_id[j]) | ||
1757 | { | ||
1758 | rom_found = 0; | ||
1759 | } | ||
1760 | } | ||
1761 | PRINTK(("\n")); | ||
1762 | } | ||
1763 | |||
1764 | if (rom_found == 1) | ||
1765 | { | ||
1766 | PRINTK(("## %s: Boot_ROM found at %#08x\n", | ||
1767 | SK_NAME, rom_location[(i-1)])); | ||
1768 | |||
1769 | return (rom_location[--i]); | ||
1770 | } | ||
1771 | else | ||
1772 | { | ||
1773 | PRINTK(("%s: No Boot_ROM found\n", SK_NAME)); | ||
1774 | return 0; | ||
1775 | } | ||
1776 | } /* End of SK_rom_addr() */ | ||
1777 | |||
1778 | |||
1779 | |||
1780 | /* LANCE access functions | ||
1781 | * | ||
1782 | * ! CSR1-3 can only be accessed when in CSR0 the STOP bit is set ! | ||
1783 | */ | ||
1784 | |||
1785 | |||
1786 | /*- | ||
1787 | * Function : SK_reset_board | ||
1788 | * | ||
1789 | * Author : Patrick J.D. Weichmann | ||
1790 | * | ||
1791 | * Date Created : 94/05/25 | ||
1792 | * | ||
1793 | * Description : This function resets SK_G16 and all components, but | ||
1794 | * POS registers are not changed | ||
1795 | * | ||
1796 | * Parameters : None | ||
1797 | * Return Value : None | ||
1798 | * Errors : None | ||
1799 | * Globals : SK_RAM *board - SK_RAM structure pointer | ||
1800 | * | ||
1801 | * Update History : | ||
1802 | * YY/MM/DD uid Description | ||
1803 | -*/ | ||
1804 | |||
1805 | void SK_reset_board(void) | ||
1806 | { | ||
1807 | writeb(0x00, SK_PORT); /* Reset active */ | ||
1808 | mdelay(5); /* Delay min 5ms */ | ||
1809 | writeb(SK_RESET, SK_PORT); /* Set back to normal operation */ | ||
1810 | |||
1811 | } /* End of SK_reset_board() */ | ||
1812 | |||
1813 | |||
1814 | /*- | ||
1815 | * Function : SK_set_RAP | ||
1816 | * Author : Patrick J.D. Weichmann | ||
1817 | * Date Created : 94/05/25 | ||
1818 | * | ||
1819 | * Description : Set LANCE Register Address Port to register | ||
1820 | * for later data transfer. | ||
1821 | * | ||
1822 | * Parameters : I : reg_number - which CSR to read/write from/to | ||
1823 | * Return Value : None | ||
1824 | * Errors : None | ||
1825 | * Globals : SK_RAM *board - SK_RAM structure pointer | ||
1826 | * Update History : | ||
1827 | * YY/MM/DD uid Description | ||
1828 | -*/ | ||
1829 | |||
1830 | void SK_set_RAP(int reg_number) | ||
1831 | { | ||
1832 | writew(reg_number, SK_IOREG); | ||
1833 | writeb(SK_RESET | SK_RAP | SK_WREG, SK_PORT); | ||
1834 | writeb(SK_DOIO, SK_IOCOM); | ||
1835 | |||
1836 | while (readb(SK_PORT) & SK_IORUN) | ||
1837 | barrier(); | ||
1838 | } /* End of SK_set_RAP() */ | ||
1839 | |||
1840 | |||
1841 | /*- | ||
1842 | * Function : SK_read_reg | ||
1843 | * Author : Patrick J.D. Weichmann | ||
1844 | * Date Created : 94/05/25 | ||
1845 | * | ||
1846 | * Description : Set RAP and read data from a LANCE CSR register | ||
1847 | * | ||
1848 | * Parameters : I : reg_number - which CSR to read from | ||
1849 | * Return Value : Register contents | ||
1850 | * Errors : None | ||
1851 | * Globals : SK_RAM *board - SK_RAM structure pointer | ||
1852 | * Update History : | ||
1853 | * YY/MM/DD uid Description | ||
1854 | -*/ | ||
1855 | |||
1856 | int SK_read_reg(int reg_number) | ||
1857 | { | ||
1858 | SK_set_RAP(reg_number); | ||
1859 | |||
1860 | writeb(SK_RESET | SK_RDATA | SK_RREG, SK_PORT); | ||
1861 | writeb(SK_DOIO, SK_IOCOM); | ||
1862 | |||
1863 | while (readb(SK_PORT) & SK_IORUN) | ||
1864 | barrier(); | ||
1865 | return (readw(SK_IOREG)); | ||
1866 | |||
1867 | } /* End of SK_read_reg() */ | ||
1868 | |||
1869 | |||
1870 | /*- | ||
1871 | * Function : SK_rread_reg | ||
1872 | * Author : Patrick J.D. Weichmann | ||
1873 | * Date Created : 94/05/28 | ||
1874 | * | ||
1875 | * Description : Read data from preseted register. | ||
1876 | * This function requires that you know which | ||
1877 | * Register is actually set. Be aware that CSR1-3 | ||
1878 | * can only be accessed when in CSR0 STOP is set. | ||
1879 | * | ||
1880 | * Return Value : Register contents | ||
1881 | * Errors : None | ||
1882 | * Globals : SK_RAM *board - SK_RAM structure pointer | ||
1883 | * Update History : | ||
1884 | * YY/MM/DD uid Description | ||
1885 | -*/ | ||
1886 | |||
1887 | int SK_rread_reg(void) | ||
1888 | { | ||
1889 | writeb(SK_RESET | SK_RDATA | SK_RREG, SK_PORT); | ||
1890 | |||
1891 | writeb(SK_DOIO, SK_IOCOM); | ||
1892 | |||
1893 | while (readb(SK_PORT) & SK_IORUN) | ||
1894 | barrier(); | ||
1895 | return (readw(SK_IOREG)); | ||
1896 | |||
1897 | } /* End of SK_rread_reg() */ | ||
1898 | |||
1899 | |||
1900 | /*- | ||
1901 | * Function : SK_write_reg | ||
1902 | * Author : Patrick J.D. Weichmann | ||
1903 | * Date Created : 94/05/25 | ||
1904 | * | ||
1905 | * Description : This function sets the RAP then fills in the | ||
1906 | * LANCE I/O Reg and starts Transfer to LANCE. | ||
1907 | * It waits until transfer has ended which is max. 7 ms | ||
1908 | * and then it returns. | ||
1909 | * | ||
1910 | * Parameters : I : reg_number - which CSR to write to | ||
1911 | * I : value - what value to fill into register | ||
1912 | * Return Value : None | ||
1913 | * Errors : None | ||
1914 | * Globals : SK_RAM *board - SK_RAM structure pointer | ||
1915 | * Update History : | ||
1916 | * YY/MM/DD uid Description | ||
1917 | -*/ | ||
1918 | |||
1919 | void SK_write_reg(int reg_number, int value) | ||
1920 | { | ||
1921 | SK_set_RAP(reg_number); | ||
1922 | |||
1923 | writew(value, SK_IOREG); | ||
1924 | writeb(SK_RESET | SK_RDATA | SK_WREG, SK_PORT); | ||
1925 | writeb(SK_DOIO, SK_IOCOM); | ||
1926 | |||
1927 | while (readb(SK_PORT) & SK_IORUN) | ||
1928 | barrier(); | ||
1929 | } /* End of SK_write_reg */ | ||
1930 | |||
1931 | |||
1932 | |||
1933 | /* | ||
1934 | * Debugging functions | ||
1935 | * ------------------- | ||
1936 | */ | ||
1937 | |||
1938 | /*- | ||
1939 | * Function : SK_print_pos | ||
1940 | * Author : Patrick J.D. Weichmann | ||
1941 | * Date Created : 94/05/25 | ||
1942 | * | ||
1943 | * Description : This function prints out the 4 POS (Programmable | ||
1944 | * Option Select) Registers. Used mainly to debug operation. | ||
1945 | * | ||
1946 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
1947 | * I : char * - Text which will be printed as title | ||
1948 | * Return Value : None | ||
1949 | * Errors : None | ||
1950 | * Update History : | ||
1951 | * YY/MM/DD uid Description | ||
1952 | -*/ | ||
1953 | |||
1954 | void SK_print_pos(struct net_device *dev, char *text) | ||
1955 | { | ||
1956 | int ioaddr = dev->base_addr; | ||
1957 | |||
1958 | unsigned char pos0 = inb(SK_POS0), | ||
1959 | pos1 = inb(SK_POS1), | ||
1960 | pos2 = inb(SK_POS2), | ||
1961 | pos3 = inb(SK_POS3), | ||
1962 | pos4 = inb(SK_POS4); | ||
1963 | |||
1964 | |||
1965 | printk("## %s: %s.\n" | ||
1966 | "## pos0=%#4x pos1=%#4x pos2=%#04x pos3=%#08x pos4=%#04x\n", | ||
1967 | SK_NAME, text, pos0, pos1, pos2, (pos3<<14), pos4); | ||
1968 | |||
1969 | } /* End of SK_print_pos() */ | ||
1970 | |||
1971 | |||
1972 | |||
1973 | /*- | ||
1974 | * Function : SK_print_dev | ||
1975 | * Author : Patrick J.D. Weichmann | ||
1976 | * Date Created : 94/05/25 | ||
1977 | * | ||
1978 | * Description : This function simply prints out the important fields | ||
1979 | * of the device structure. | ||
1980 | * | ||
1981 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
1982 | * I : char *text - Title for printing | ||
1983 | * Return Value : None | ||
1984 | * Errors : None | ||
1985 | * Update History : | ||
1986 | * YY/MM/DD uid Description | ||
1987 | -*/ | ||
1988 | |||
1989 | void SK_print_dev(struct net_device *dev, char *text) | ||
1990 | { | ||
1991 | if (dev == NULL) | ||
1992 | { | ||
1993 | printk("## %s: Device Structure. %s\n", SK_NAME, text); | ||
1994 | printk("## DEVICE == NULL\n"); | ||
1995 | } | ||
1996 | else | ||
1997 | { | ||
1998 | printk("## %s: Device Structure. %s\n", SK_NAME, text); | ||
1999 | printk("## Device Name: %s Base Address: %#06lx IRQ: %d\n", | ||
2000 | dev->name, dev->base_addr, dev->irq); | ||
2001 | |||
2002 | printk("## next device: %#08x init function: %#08x\n", | ||
2003 | (int) dev->next, (int) dev->init); | ||
2004 | } | ||
2005 | |||
2006 | } /* End of SK_print_dev() */ | ||
2007 | |||
2008 | |||
2009 | |||
2010 | /*- | ||
2011 | * Function : SK_print_ram | ||
2012 | * Author : Patrick J.D. Weichmann | ||
2013 | * Date Created : 94/06/02 | ||
2014 | * | ||
2015 | * Description : This function is used to check how are things set up | ||
2016 | * in the 16KB RAM. Also the pointers to the receive and | ||
2017 | * transmit descriptor rings and rx and tx buffers locations. | ||
2018 | * It contains a minor bug in printing, but has no effect to the values | ||
2019 | * only newlines are not correct. | ||
2020 | * | ||
2021 | * Parameters : I : struct net_device *dev - SK_G16 device structure | ||
2022 | * Return Value : None | ||
2023 | * Errors : None | ||
2024 | * Globals : None | ||
2025 | * Update History : | ||
2026 | * YY/MM/DD uid Description | ||
2027 | -*/ | ||
2028 | |||
2029 | void __init SK_print_ram(struct net_device *dev) | ||
2030 | { | ||
2031 | |||
2032 | int i; | ||
2033 | struct priv *p = netdev_priv(dev); | ||
2034 | |||
2035 | printk("## %s: RAM Details.\n" | ||
2036 | "## RAM at %#08x tmdhead: %#08x rmdhead: %#08x initblock: %#08x\n", | ||
2037 | SK_NAME, | ||
2038 | (unsigned int) p->ram, | ||
2039 | (unsigned int) p->tmdhead, | ||
2040 | (unsigned int) p->rmdhead, | ||
2041 | (unsigned int) &(p->ram)->ib); | ||
2042 | |||
2043 | printk("## "); | ||
2044 | |||
2045 | for(i = 0; i < TMDNUM; i++) | ||
2046 | { | ||
2047 | if (!(i % 3)) /* Every third line do a newline */ | ||
2048 | { | ||
2049 | printk("\n## "); | ||
2050 | } | ||
2051 | printk("tmdbufs%d: %#08x ", (i+1), (int) p->tmdbufs[i]); | ||
2052 | } | ||
2053 | printk("## "); | ||
2054 | |||
2055 | for(i = 0; i < RMDNUM; i++) | ||
2056 | { | ||
2057 | if (!(i % 3)) /* Every third line do a newline */ | ||
2058 | { | ||
2059 | printk("\n## "); | ||
2060 | } | ||
2061 | printk("rmdbufs%d: %#08x ", (i+1), (int) p->rmdbufs[i]); | ||
2062 | } | ||
2063 | printk("\n"); | ||
2064 | |||
2065 | } /* End of SK_print_ram() */ | ||
2066 | |||
diff --git a/drivers/net/sk_g16.h b/drivers/net/sk_g16.h deleted file mode 100644 index 0a5dc0908a04..000000000000 --- a/drivers/net/sk_g16.h +++ /dev/null | |||
@@ -1,165 +0,0 @@ | |||
1 | /*- | ||
2 | * | ||
3 | * This software may be used and distributed according to the terms | ||
4 | * of the GNU General Public License, incorporated herein by reference. | ||
5 | * | ||
6 | * Module : sk_g16.h | ||
7 | * Version : $Revision$ | ||
8 | * | ||
9 | * Author : M.Hipp (mhipp@student.uni-tuebingen.de) | ||
10 | * changes by : Patrick J.D. Weichmann | ||
11 | * | ||
12 | * Date Created : 94/05/25 | ||
13 | * | ||
14 | * Description : In here are all necessary definitions of | ||
15 | * the am7990 (LANCE) chip used for writing a | ||
16 | * network device driver which uses this chip | ||
17 | * | ||
18 | * $Log$ | ||
19 | -*/ | ||
20 | |||
21 | #ifndef SK_G16_H | ||
22 | |||
23 | #define SK_G16_H | ||
24 | |||
25 | |||
26 | /* | ||
27 | * Control and Status Register 0 (CSR0) bit definitions | ||
28 | * | ||
29 | * (R=Readable) (W=Writeable) (S=Set on write) (C-Clear on write) | ||
30 | * | ||
31 | */ | ||
32 | |||
33 | #define CSR0_ERR 0x8000 /* Error summary (R) */ | ||
34 | #define CSR0_BABL 0x4000 /* Babble transmitter timeout error (RC) */ | ||
35 | #define CSR0_CERR 0x2000 /* Collision Error (RC) */ | ||
36 | #define CSR0_MISS 0x1000 /* Missed packet (RC) */ | ||
37 | #define CSR0_MERR 0x0800 /* Memory Error (RC) */ | ||
38 | #define CSR0_RINT 0x0400 /* Receiver Interrupt (RC) */ | ||
39 | #define CSR0_TINT 0x0200 /* Transmit Interrupt (RC) */ | ||
40 | #define CSR0_IDON 0x0100 /* Initialization Done (RC) */ | ||
41 | #define CSR0_INTR 0x0080 /* Interrupt Flag (R) */ | ||
42 | #define CSR0_INEA 0x0040 /* Interrupt Enable (RW) */ | ||
43 | #define CSR0_RXON 0x0020 /* Receiver on (R) */ | ||
44 | #define CSR0_TXON 0x0010 /* Transmitter on (R) */ | ||
45 | #define CSR0_TDMD 0x0008 /* Transmit Demand (RS) */ | ||
46 | #define CSR0_STOP 0x0004 /* Stop (RS) */ | ||
47 | #define CSR0_STRT 0x0002 /* Start (RS) */ | ||
48 | #define CSR0_INIT 0x0001 /* Initialize (RS) */ | ||
49 | |||
50 | #define CSR0_CLRALL 0x7f00 /* mask for all clearable bits */ | ||
51 | |||
52 | /* | ||
53 | * Control and Status Register 3 (CSR3) bit definitions | ||
54 | * | ||
55 | */ | ||
56 | |||
57 | #define CSR3_BSWAP 0x0004 /* Byte Swap (RW) */ | ||
58 | #define CSR3_ACON 0x0002 /* ALE Control (RW) */ | ||
59 | #define CSR3_BCON 0x0001 /* Byte Control (RW) */ | ||
60 | |||
61 | /* | ||
62 | * Initialization Block Mode operation Bit Definitions. | ||
63 | */ | ||
64 | |||
65 | #define MODE_PROM 0x8000 /* Promiscuous Mode */ | ||
66 | #define MODE_INTL 0x0040 /* Internal Loopback */ | ||
67 | #define MODE_DRTY 0x0020 /* Disable Retry */ | ||
68 | #define MODE_COLL 0x0010 /* Force Collision */ | ||
69 | #define MODE_DTCR 0x0008 /* Disable Transmit CRC) */ | ||
70 | #define MODE_LOOP 0x0004 /* Loopback */ | ||
71 | #define MODE_DTX 0x0002 /* Disable the Transmitter */ | ||
72 | #define MODE_DRX 0x0001 /* Disable the Receiver */ | ||
73 | |||
74 | #define MODE_NORMAL 0x0000 /* Normal operation mode */ | ||
75 | |||
76 | /* | ||
77 | * Receive message descriptor status bit definitions. | ||
78 | */ | ||
79 | |||
80 | #define RX_OWN 0x80 /* Owner bit 0 = host, 1 = lance */ | ||
81 | #define RX_ERR 0x40 /* Error Summary */ | ||
82 | #define RX_FRAM 0x20 /* Framing Error */ | ||
83 | #define RX_OFLO 0x10 /* Overflow Error */ | ||
84 | #define RX_CRC 0x08 /* CRC Error */ | ||
85 | #define RX_BUFF 0x04 /* Buffer Error */ | ||
86 | #define RX_STP 0x02 /* Start of Packet */ | ||
87 | #define RX_ENP 0x01 /* End of Packet */ | ||
88 | |||
89 | |||
90 | /* | ||
91 | * Transmit message descriptor status bit definitions. | ||
92 | */ | ||
93 | |||
94 | #define TX_OWN 0x80 /* Owner bit 0 = host, 1 = lance */ | ||
95 | #define TX_ERR 0x40 /* Error Summary */ | ||
96 | #define TX_MORE 0x10 /* More the 1 retry needed to Xmit */ | ||
97 | #define TX_ONE 0x08 /* One retry needed to Xmit */ | ||
98 | #define TX_DEF 0x04 /* Deferred */ | ||
99 | #define TX_STP 0x02 /* Start of Packet */ | ||
100 | #define TX_ENP 0x01 /* End of Packet */ | ||
101 | |||
102 | /* | ||
103 | * Transmit status (2) (valid if TX_ERR == 1) | ||
104 | */ | ||
105 | |||
106 | #define TX_BUFF 0x8000 /* Buffering error (no ENP) */ | ||
107 | #define TX_UFLO 0x4000 /* Underflow (late memory) */ | ||
108 | #define TX_LCOL 0x1000 /* Late collision */ | ||
109 | #define TX_LCAR 0x0400 /* Loss of Carrier */ | ||
110 | #define TX_RTRY 0x0200 /* Failed after 16 retransmissions */ | ||
111 | #define TX_TDR 0x003f /* Time-domain-reflectometer-value */ | ||
112 | |||
113 | |||
114 | /* | ||
115 | * Structures used for Communication with the LANCE | ||
116 | */ | ||
117 | |||
118 | /* LANCE Initialize Block */ | ||
119 | |||
120 | struct init_block | ||
121 | { | ||
122 | unsigned short mode; /* Mode Register */ | ||
123 | unsigned char paddr[6]; /* Physical Address (MAC) */ | ||
124 | unsigned char laddr[8]; /* Logical Filter Address (not used) */ | ||
125 | unsigned int rdrp; /* Receive Descriptor Ring pointer */ | ||
126 | unsigned int tdrp; /* Transmit Descriptor Ring pointer */ | ||
127 | }; | ||
128 | |||
129 | |||
130 | /* Receive Message Descriptor Entry */ | ||
131 | |||
132 | struct rmd | ||
133 | { | ||
134 | union | ||
135 | { | ||
136 | unsigned long buffer; /* Address of buffer */ | ||
137 | struct | ||
138 | { | ||
139 | unsigned char unused[3]; | ||
140 | unsigned volatile char status; /* Status Bits */ | ||
141 | } s; | ||
142 | } u; | ||
143 | volatile short blen; /* Buffer Length (two's complement) */ | ||
144 | unsigned short mlen; /* Message Byte Count */ | ||
145 | }; | ||
146 | |||
147 | |||
148 | /* Transmit Message Descriptor Entry */ | ||
149 | |||
150 | struct tmd | ||
151 | { | ||
152 | union | ||
153 | { | ||
154 | unsigned long buffer; /* Address of buffer */ | ||
155 | struct | ||
156 | { | ||
157 | unsigned char unused[3]; | ||
158 | unsigned volatile char status; /* Status Bits */ | ||
159 | } s; | ||
160 | } u; | ||
161 | unsigned short blen; /* Buffer Length (two's complement) */ | ||
162 | unsigned volatile short status2; /* Error Status Bits */ | ||
163 | }; | ||
164 | |||
165 | #endif /* End of SK_G16_H */ | ||
diff --git a/drivers/net/skfp/Makefile b/drivers/net/skfp/Makefile index 6cfccfb7889f..cb23580fcffa 100644 --- a/drivers/net/skfp/Makefile +++ b/drivers/net/skfp/Makefile | |||
@@ -6,8 +6,8 @@ obj-$(CONFIG_SKFP) += skfp.o | |||
6 | 6 | ||
7 | skfp-objs := skfddi.o hwmtm.o fplustm.o smt.o cfm.o \ | 7 | skfp-objs := skfddi.o hwmtm.o fplustm.o smt.o cfm.o \ |
8 | ecm.o pcmplc.o pmf.o queue.o rmt.o \ | 8 | ecm.o pcmplc.o pmf.o queue.o rmt.o \ |
9 | smtdef.o smtinit.o smttimer.o srf.o lnkstat.o \ | 9 | smtdef.o smtinit.o smttimer.o srf.o hwt.o \ |
10 | smtparse.o hwt.o drvfbi.o ess.o | 10 | drvfbi.o ess.o |
11 | 11 | ||
12 | # NOTE: | 12 | # NOTE: |
13 | # Compiling this driver produces some warnings (and some more are | 13 | # Compiling this driver produces some warnings (and some more are |
diff --git a/drivers/net/skfp/drvfbi.c b/drivers/net/skfp/drvfbi.c index 052e841ba187..5b475833f645 100644 --- a/drivers/net/skfp/drvfbi.c +++ b/drivers/net/skfp/drvfbi.c | |||
@@ -105,8 +105,8 @@ extern int AIX_vpdReadByte() ; | |||
105 | #endif | 105 | #endif |
106 | 106 | ||
107 | 107 | ||
108 | /* Prototypes of local functions. */ | 108 | /* Prototype of a local function. */ |
109 | void smt_stop_watchdog(struct s_smc *smc); | 109 | static void smt_stop_watchdog(struct s_smc *smc); |
110 | 110 | ||
111 | #ifdef MCA | 111 | #ifdef MCA |
112 | static int read_card_id() ; | 112 | static int read_card_id() ; |
@@ -631,7 +631,7 @@ void plc_clear_irq(struct s_smc *smc, int p) | |||
631 | * LED_Y_OFF just switch yellow LED off | 631 | * LED_Y_OFF just switch yellow LED off |
632 | * LED_Y_ON just switch yello LED on | 632 | * LED_Y_ON just switch yello LED on |
633 | */ | 633 | */ |
634 | void led_indication(struct s_smc *smc, int led_event) | 634 | static void led_indication(struct s_smc *smc, int led_event) |
635 | { | 635 | { |
636 | /* use smc->hw.mac_ring_is_up == TRUE | 636 | /* use smc->hw.mac_ring_is_up == TRUE |
637 | * as indication for Ring Operational | 637 | * as indication for Ring Operational |
@@ -764,122 +764,6 @@ void llc_recover_tx(struct s_smc *smc) | |||
764 | #endif | 764 | #endif |
765 | } | 765 | } |
766 | 766 | ||
767 | /*--------------------------- DMA init ----------------------------*/ | ||
768 | #ifdef ISA | ||
769 | |||
770 | /* | ||
771 | * init DMA | ||
772 | */ | ||
773 | void init_dma(struct s_smc *smc, int dma) | ||
774 | { | ||
775 | SK_UNUSED(smc) ; | ||
776 | |||
777 | /* | ||
778 | * set cascade mode, | ||
779 | * clear mask bit (enable DMA cannal) | ||
780 | */ | ||
781 | if (dma > 3) { | ||
782 | outp(0xd6,(dma & 0x03) | 0xc0) ; | ||
783 | outp(0xd4, dma & 0x03) ; | ||
784 | } | ||
785 | else { | ||
786 | outp(0x0b,(dma & 0x03) | 0xc0) ; | ||
787 | outp(0x0a,dma & 0x03) ; | ||
788 | } | ||
789 | } | ||
790 | |||
791 | /* | ||
792 | * disable DMA | ||
793 | */ | ||
794 | void dis_dma(struct s_smc *smc, int dma) | ||
795 | { | ||
796 | SK_UNUSED(smc) ; | ||
797 | |||
798 | /* | ||
799 | * set mask bit (disable DMA cannal) | ||
800 | */ | ||
801 | if (dma > 3) { | ||
802 | outp(0xd4,(dma & 0x03) | 0x04) ; | ||
803 | } | ||
804 | else { | ||
805 | outp(0x0a,(dma & 0x03) | 0x04) ; | ||
806 | } | ||
807 | } | ||
808 | |||
809 | #endif /* ISA */ | ||
810 | |||
811 | #ifdef EISA | ||
812 | |||
813 | /*arrays with io addresses of dma controller length and address registers*/ | ||
814 | static const int cntr[8] = { 0x001,0x003,0x005,0x007,0,0x0c6,0x0ca,0x0ce } ; | ||
815 | static const int base[8] = { 0x000,0x002,0x004,0x006,0,0x0c4,0x0c8,0x0cc } ; | ||
816 | static const int page[8] = { 0x087,0x083,0x081,0x082,0,0x08b,0x089,0x08a } ; | ||
817 | |||
818 | void init_dma(struct s_smc *smc, int dma) | ||
819 | { | ||
820 | /* | ||
821 | * extended mode register | ||
822 | * 32 bit IO | ||
823 | * type c | ||
824 | * TC output | ||
825 | * disable stop | ||
826 | */ | ||
827 | |||
828 | /* mode read (write) demand */ | ||
829 | smc->hw.dma_rmode = (dma & 3) | 0x08 | 0x0 ; | ||
830 | smc->hw.dma_wmode = (dma & 3) | 0x04 | 0x0 ; | ||
831 | |||
832 | /* 32 bit IO's, burst DMA mode (type "C") */ | ||
833 | smc->hw.dma_emode = (dma & 3) | 0x08 | 0x30 ; | ||
834 | |||
835 | outp((dma < 4) ? 0x40b : 0x4d6,smc->hw.dma_emode) ; | ||
836 | |||
837 | /* disable chaining */ | ||
838 | outp((dma < 4) ? 0x40a : 0x4d4,(dma&3)) ; | ||
839 | |||
840 | /*load dma controller addresses for fast access during set dma*/ | ||
841 | smc->hw.dma_base_word_count = cntr[smc->hw.dma]; | ||
842 | smc->hw.dma_base_address = base[smc->hw.dma]; | ||
843 | smc->hw.dma_base_address_page = page[smc->hw.dma]; | ||
844 | |||
845 | } | ||
846 | |||
847 | void dis_dma(struct s_smc *smc, int dma) | ||
848 | { | ||
849 | SK_UNUSED(smc) ; | ||
850 | |||
851 | outp((dma < 4) ? 0x0a : 0xd4,(dma&3)|4) ;/* mask bit */ | ||
852 | } | ||
853 | #endif /* EISA */ | ||
854 | |||
855 | #ifdef MCA | ||
856 | void init_dma(struct s_smc *smc, int dma) | ||
857 | { | ||
858 | SK_UNUSED(smc) ; | ||
859 | SK_UNUSED(dma) ; | ||
860 | } | ||
861 | |||
862 | void dis_dma(struct s_smc *smc, int dma) | ||
863 | { | ||
864 | SK_UNUSED(smc) ; | ||
865 | SK_UNUSED(dma) ; | ||
866 | } | ||
867 | #endif | ||
868 | |||
869 | #ifdef PCI | ||
870 | void init_dma(struct s_smc *smc, int dma) | ||
871 | { | ||
872 | SK_UNUSED(smc) ; | ||
873 | SK_UNUSED(dma) ; | ||
874 | } | ||
875 | |||
876 | void dis_dma(struct s_smc *smc, int dma) | ||
877 | { | ||
878 | SK_UNUSED(smc) ; | ||
879 | SK_UNUSED(dma) ; | ||
880 | } | ||
881 | #endif | ||
882 | |||
883 | #ifdef MULT_OEM | 767 | #ifdef MULT_OEM |
884 | static int is_equal_num(char comp1[], char comp2[], int num) | 768 | static int is_equal_num(char comp1[], char comp2[], int num) |
885 | { | 769 | { |
@@ -1407,7 +1291,7 @@ void smt_start_watchdog(struct s_smc *smc) | |||
1407 | #endif /* DEBUG */ | 1291 | #endif /* DEBUG */ |
1408 | } | 1292 | } |
1409 | 1293 | ||
1410 | void smt_stop_watchdog(struct s_smc *smc) | 1294 | static void smt_stop_watchdog(struct s_smc *smc) |
1411 | { | 1295 | { |
1412 | SK_UNUSED(smc) ; /* Make LINT happy. */ | 1296 | SK_UNUSED(smc) ; /* Make LINT happy. */ |
1413 | #ifndef DEBUG | 1297 | #ifndef DEBUG |
@@ -1422,104 +1306,6 @@ void smt_stop_watchdog(struct s_smc *smc) | |||
1422 | } | 1306 | } |
1423 | 1307 | ||
1424 | #ifdef PCI | 1308 | #ifdef PCI |
1425 | static char get_rom_byte(struct s_smc *smc, u_short addr) | ||
1426 | { | ||
1427 | GET_PAGE(addr) ; | ||
1428 | return (READ_PROM(ADDR(B2_FDP))) ; | ||
1429 | } | ||
1430 | |||
1431 | /* | ||
1432 | * ROM image defines | ||
1433 | */ | ||
1434 | #define ROM_SIG_1 0 | ||
1435 | #define ROM_SIG_2 1 | ||
1436 | #define PCI_DATA_1 0x18 | ||
1437 | #define PCI_DATA_2 0x19 | ||
1438 | |||
1439 | /* | ||
1440 | * PCI data structure defines | ||
1441 | */ | ||
1442 | #define VPD_DATA_1 0x08 | ||
1443 | #define VPD_DATA_2 0x09 | ||
1444 | #define IMAGE_LEN_1 0x10 | ||
1445 | #define IMAGE_LEN_2 0x11 | ||
1446 | #define CODE_TYPE 0x14 | ||
1447 | #define INDICATOR 0x15 | ||
1448 | |||
1449 | /* | ||
1450 | * BEGIN_MANUAL_ENTRY(mac_drv_vpd_read) | ||
1451 | * mac_drv_vpd_read(smc,buf,size,image) | ||
1452 | * | ||
1453 | * function DOWNCALL (FDDIWARE) | ||
1454 | * reads the VPD data of the FPROM and writes it into the | ||
1455 | * buffer | ||
1456 | * | ||
1457 | * para buf points to the buffer for the VPD data | ||
1458 | * size size of the VPD data buffer | ||
1459 | * image boot image; code type of the boot image | ||
1460 | * image = 0 Intel x86, PC-AT compatible | ||
1461 | * 1 OPENBOOT standard for PCI | ||
1462 | * 2-FF reserved | ||
1463 | * | ||
1464 | * returns len number of VPD data bytes read form the FPROM | ||
1465 | * <0 number of read bytes | ||
1466 | * >0 error: data invalid | ||
1467 | * | ||
1468 | * END_MANUAL_ENTRY | ||
1469 | */ | ||
1470 | int mac_drv_vpd_read(struct s_smc *smc, char *buf, int size, char image) | ||
1471 | { | ||
1472 | u_short ibase ; | ||
1473 | u_short pci_base ; | ||
1474 | u_short vpd ; | ||
1475 | int len ; | ||
1476 | |||
1477 | len = 0 ; | ||
1478 | ibase = 0 ; | ||
1479 | /* | ||
1480 | * as long images defined | ||
1481 | */ | ||
1482 | while (get_rom_byte(smc,ibase+ROM_SIG_1) == 0x55 && | ||
1483 | (u_char) get_rom_byte(smc,ibase+ROM_SIG_2) == 0xaa) { | ||
1484 | /* | ||
1485 | * get the pointer to the PCI data structure | ||
1486 | */ | ||
1487 | pci_base = ibase + get_rom_byte(smc,ibase+PCI_DATA_1) + | ||
1488 | (get_rom_byte(smc,ibase+PCI_DATA_2) << 8) ; | ||
1489 | |||
1490 | if (image == get_rom_byte(smc,pci_base+CODE_TYPE)) { | ||
1491 | /* | ||
1492 | * we have the right image, read the VPD data | ||
1493 | */ | ||
1494 | vpd = ibase + get_rom_byte(smc,pci_base+VPD_DATA_1) + | ||
1495 | (get_rom_byte(smc,pci_base+VPD_DATA_2) << 8) ; | ||
1496 | if (vpd == ibase) { | ||
1497 | break ; /* no VPD data */ | ||
1498 | } | ||
1499 | for (len = 0; len < size; len++,buf++,vpd++) { | ||
1500 | *buf = get_rom_byte(smc,vpd) ; | ||
1501 | } | ||
1502 | break ; | ||
1503 | } | ||
1504 | else { | ||
1505 | /* | ||
1506 | * try the next image | ||
1507 | */ | ||
1508 | if (get_rom_byte(smc,pci_base+INDICATOR) & 0x80) { | ||
1509 | break ; /* this was the last image */ | ||
1510 | } | ||
1511 | ibase = ibase + get_rom_byte(smc,ibase+IMAGE_LEN_1) + | ||
1512 | (get_rom_byte(smc,ibase+IMAGE_LEN_2) << 8) ; | ||
1513 | } | ||
1514 | } | ||
1515 | |||
1516 | return(len) ; | ||
1517 | } | ||
1518 | |||
1519 | void mac_drv_pci_fix(struct s_smc *smc, u_long fix_value) | ||
1520 | { | ||
1521 | smc->hw.pci_fix_value = fix_value ; | ||
1522 | } | ||
1523 | 1309 | ||
1524 | void mac_do_pci_fix(struct s_smc *smc) | 1310 | void mac_do_pci_fix(struct s_smc *smc) |
1525 | { | 1311 | { |
diff --git a/drivers/net/skfp/ess.c b/drivers/net/skfp/ess.c index fd39b4b2ef7d..62b01328c496 100644 --- a/drivers/net/skfp/ess.c +++ b/drivers/net/skfp/ess.c | |||
@@ -102,7 +102,7 @@ void ess_timer_poll(struct s_smc *smc); | |||
102 | void ess_para_change(struct s_smc *smc); | 102 | void ess_para_change(struct s_smc *smc); |
103 | int ess_raf_received_pack(struct s_smc *smc, SMbuf *mb, struct smt_header *sm, | 103 | int ess_raf_received_pack(struct s_smc *smc, SMbuf *mb, struct smt_header *sm, |
104 | int fs); | 104 | int fs); |
105 | int process_bw_alloc(struct s_smc *smc, long int payload, long int overhead); | 105 | static int process_bw_alloc(struct s_smc *smc, long int payload, long int overhead); |
106 | 106 | ||
107 | 107 | ||
108 | /* | 108 | /* |
@@ -375,7 +375,7 @@ int ess_raf_received_pack(struct s_smc *smc, SMbuf *mb, struct smt_header *sm, | |||
375 | * determines the synchronous bandwidth, set the TSYNC register and the | 375 | * determines the synchronous bandwidth, set the TSYNC register and the |
376 | * mib variables SBAPayload, SBAOverhead and fddiMACT-NEG. | 376 | * mib variables SBAPayload, SBAOverhead and fddiMACT-NEG. |
377 | */ | 377 | */ |
378 | int process_bw_alloc(struct s_smc *smc, long int payload, long int overhead) | 378 | static int process_bw_alloc(struct s_smc *smc, long int payload, long int overhead) |
379 | { | 379 | { |
380 | /* | 380 | /* |
381 | * determine the synchronous bandwidth (sync_bw) in bytes per T-NEG, | 381 | * determine the synchronous bandwidth (sync_bw) in bytes per T-NEG, |
diff --git a/drivers/net/skfp/fplustm.c b/drivers/net/skfp/fplustm.c index 76e78442fc24..a2ed47f1cc70 100644 --- a/drivers/net/skfp/fplustm.c +++ b/drivers/net/skfp/fplustm.c | |||
@@ -1117,30 +1117,6 @@ void mac_clear_multicast(struct s_smc *smc) | |||
1117 | /* | 1117 | /* |
1118 | BEGIN_MANUAL_ENTRY(if,func;others;2) | 1118 | BEGIN_MANUAL_ENTRY(if,func;others;2) |
1119 | 1119 | ||
1120 | int mac_set_func_addr(smc,f_addr) | ||
1121 | struct s_smc *smc ; | ||
1122 | u_long f_addr ; | ||
1123 | |||
1124 | Function DOWNCALL (SMT, fplustm.c) | ||
1125 | Set a Token-Ring functional address, the address will | ||
1126 | be activated after calling mac_update_multicast() | ||
1127 | |||
1128 | Para f_addr functional bits in non-canonical format | ||
1129 | |||
1130 | Returns 0: always success | ||
1131 | |||
1132 | END_MANUAL_ENTRY() | ||
1133 | */ | ||
1134 | int mac_set_func_addr(struct s_smc *smc, u_long f_addr) | ||
1135 | { | ||
1136 | smc->hw.fp.func_addr = f_addr ; | ||
1137 | return(0) ; | ||
1138 | } | ||
1139 | |||
1140 | |||
1141 | /* | ||
1142 | BEGIN_MANUAL_ENTRY(if,func;others;2) | ||
1143 | |||
1144 | int mac_add_multicast(smc,addr,can) | 1120 | int mac_add_multicast(smc,addr,can) |
1145 | struct s_smc *smc ; | 1121 | struct s_smc *smc ; |
1146 | struct fddi_addr *addr ; | 1122 | struct fddi_addr *addr ; |
@@ -1203,52 +1179,6 @@ int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can) | |||
1203 | } | 1179 | } |
1204 | 1180 | ||
1205 | /* | 1181 | /* |
1206 | BEGIN_MANUAL_ENTRY(if,func;others;2) | ||
1207 | |||
1208 | void mac_del_multicast(smc,addr,can) | ||
1209 | struct s_smc *smc ; | ||
1210 | struct fddi_addr *addr ; | ||
1211 | int can ; | ||
1212 | |||
1213 | Function DOWNCALL (SMT, fplustm.c) | ||
1214 | Delete an entry from the multicast table | ||
1215 | |||
1216 | Para addr pointer to a multicast address | ||
1217 | can = 0: the multicast address has the physical format | ||
1218 | = 1: the multicast address has the canonical format | ||
1219 | | 0x80 permanent | ||
1220 | |||
1221 | END_MANUAL_ENTRY() | ||
1222 | */ | ||
1223 | void mac_del_multicast(struct s_smc *smc, struct fddi_addr *addr, int can) | ||
1224 | { | ||
1225 | SK_LOC_DECL(struct fddi_addr,own) ; | ||
1226 | struct s_fpmc *tb ; | ||
1227 | |||
1228 | if (!(tb = mac_get_mc_table(smc,addr,&own,1,can & ~0x80))) | ||
1229 | return ; | ||
1230 | /* | ||
1231 | * permanent addresses must be deleted with perm bit | ||
1232 | * and vice versa | ||
1233 | */ | ||
1234 | if (( tb->perm && (can & 0x80)) || | ||
1235 | (!tb->perm && !(can & 0x80))) { | ||
1236 | /* | ||
1237 | * delete it | ||
1238 | */ | ||
1239 | if (tb->n) { | ||
1240 | tb->n-- ; | ||
1241 | if (tb->perm) { | ||
1242 | smc->hw.fp.smt_slots_used-- ; | ||
1243 | } | ||
1244 | else { | ||
1245 | smc->hw.fp.os_slots_used-- ; | ||
1246 | } | ||
1247 | } | ||
1248 | } | ||
1249 | } | ||
1250 | |||
1251 | /* | ||
1252 | * mode | 1182 | * mode |
1253 | */ | 1183 | */ |
1254 | 1184 | ||
diff --git a/drivers/net/skfp/h/cmtdef.h b/drivers/net/skfp/h/cmtdef.h index 603982debc71..f2f771d8be76 100644 --- a/drivers/net/skfp/h/cmtdef.h +++ b/drivers/net/skfp/h/cmtdef.h | |||
@@ -507,7 +507,6 @@ void pcm_status_state(struct s_smc *smc, int np, int *type, int *state, | |||
507 | int *remote, int *mac); | 507 | int *remote, int *mac); |
508 | void plc_config_mux(struct s_smc *smc, int mux); | 508 | void plc_config_mux(struct s_smc *smc, int mux); |
509 | void sm_lem_evaluate(struct s_smc *smc); | 509 | void sm_lem_evaluate(struct s_smc *smc); |
510 | void smt_clear_una_dna(struct s_smc *smc); | ||
511 | void mac_update_counter(struct s_smc *smc); | 510 | void mac_update_counter(struct s_smc *smc); |
512 | void sm_pm_ls_latch(struct s_smc *smc, int phy, int on_off); | 511 | void sm_pm_ls_latch(struct s_smc *smc, int phy, int on_off); |
513 | void sm_ma_control(struct s_smc *smc, int mode); | 512 | void sm_ma_control(struct s_smc *smc, int mode); |
@@ -541,11 +540,9 @@ void smt_timer_poll(struct s_smc *smc); | |||
541 | u_long smt_get_time(void); | 540 | u_long smt_get_time(void); |
542 | u_long smt_get_tid(struct s_smc *smc); | 541 | u_long smt_get_tid(struct s_smc *smc); |
543 | void smt_timer_done(struct s_smc *smc); | 542 | void smt_timer_done(struct s_smc *smc); |
544 | void smt_set_defaults(struct s_smc *smc); | ||
545 | void smt_fixup_mib(struct s_smc *smc); | 543 | void smt_fixup_mib(struct s_smc *smc); |
546 | void smt_reset_defaults(struct s_smc *smc, int level); | 544 | void smt_reset_defaults(struct s_smc *smc, int level); |
547 | void smt_agent_task(struct s_smc *smc); | 545 | void smt_agent_task(struct s_smc *smc); |
548 | void smt_please_reconnect(struct s_smc *smc, int reconn_time); | ||
549 | int smt_check_para(struct s_smc *smc, struct smt_header *sm, | 546 | int smt_check_para(struct s_smc *smc, struct smt_header *sm, |
550 | const u_short list[]); | 547 | const u_short list[]); |
551 | void driver_get_bia(struct s_smc *smc, struct fddi_addr *bia_addr); | 548 | void driver_get_bia(struct s_smc *smc, struct fddi_addr *bia_addr); |
@@ -568,7 +565,6 @@ int pcm_get_s_port(struct s_smc *smc); | |||
568 | int pcm_rooted_station(struct s_smc *smc); | 565 | int pcm_rooted_station(struct s_smc *smc); |
569 | int cfm_get_mac_input(struct s_smc *smc); | 566 | int cfm_get_mac_input(struct s_smc *smc); |
570 | int cfm_get_mac_output(struct s_smc *smc); | 567 | int cfm_get_mac_output(struct s_smc *smc); |
571 | int port_to_mib(struct s_smc *smc, int p); | ||
572 | int cem_build_path(struct s_smc *smc, char *to, int path_index); | 568 | int cem_build_path(struct s_smc *smc, char *to, int path_index); |
573 | int sm_mac_get_tx_state(struct s_smc *smc); | 569 | int sm_mac_get_tx_state(struct s_smc *smc); |
574 | char *get_pcmstate(struct s_smc *smc, int np); | 570 | char *get_pcmstate(struct s_smc *smc, int np); |
@@ -580,8 +576,6 @@ void smt_send_frame(struct s_smc *smc, SMbuf *mb, int fc, int local); | |||
580 | void smt_set_timestamp(struct s_smc *smc, u_char *p); | 576 | void smt_set_timestamp(struct s_smc *smc, u_char *p); |
581 | void mac_set_rx_mode(struct s_smc *smc, int mode); | 577 | void mac_set_rx_mode(struct s_smc *smc, int mode); |
582 | int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can); | 578 | int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can); |
583 | int mac_set_func_addr(struct s_smc *smc, u_long f_addr); | ||
584 | void mac_del_multicast(struct s_smc *smc, struct fddi_addr *addr, int can); | ||
585 | void mac_update_multicast(struct s_smc *smc); | 579 | void mac_update_multicast(struct s_smc *smc); |
586 | void mac_clear_multicast(struct s_smc *smc); | 580 | void mac_clear_multicast(struct s_smc *smc); |
587 | void set_formac_tsync(struct s_smc *smc, long sync_bw); | 581 | void set_formac_tsync(struct s_smc *smc, long sync_bw); |
@@ -599,7 +593,6 @@ void plc_irq(struct s_smc *smc, int np, unsigned int cmd); | |||
599 | int smt_set_mac_opvalues(struct s_smc *smc); | 593 | int smt_set_mac_opvalues(struct s_smc *smc); |
600 | 594 | ||
601 | #ifdef TAG_MODE | 595 | #ifdef TAG_MODE |
602 | void mac_drv_pci_fix(struct s_smc *smc, u_long fix_value); | ||
603 | void mac_do_pci_fix(struct s_smc *smc); | 596 | void mac_do_pci_fix(struct s_smc *smc); |
604 | void mac_drv_clear_tx_queue(struct s_smc *smc); | 597 | void mac_drv_clear_tx_queue(struct s_smc *smc); |
605 | void mac_drv_repair_descr(struct s_smc *smc); | 598 | void mac_drv_repair_descr(struct s_smc *smc); |
diff --git a/drivers/net/skfp/h/hwmtm.h b/drivers/net/skfp/h/hwmtm.h index 4e360af07d77..1a606d4bfe5e 100644 --- a/drivers/net/skfp/h/hwmtm.h +++ b/drivers/net/skfp/h/hwmtm.h | |||
@@ -262,31 +262,6 @@ struct os_debug { | |||
262 | (smc)->hw.fp.tx_q[queue].tx_curr_put | 262 | (smc)->hw.fp.tx_q[queue].tx_curr_put |
263 | 263 | ||
264 | /* | 264 | /* |
265 | * BEGIN_MANUAL_ENTRY(HWM_TX_CHECK) | ||
266 | * void HWM_TX_CHECK(smc,frame_status,low_water) | ||
267 | * | ||
268 | * function MACRO (hardware module, hwmtm.h) | ||
269 | * This macro is invoked by the OS-specific before it left it's | ||
270 | * driver_send function. This macro calls mac_drv_clear_txd | ||
271 | * if the free TxDs of the current transmit queue is equal or | ||
272 | * lower than the given low water mark. | ||
273 | * | ||
274 | * para frame_status status of the frame, see design description | ||
275 | * low_water low water mark of free TxD's | ||
276 | * | ||
277 | * END_MANUAL_ENTRY | ||
278 | */ | ||
279 | #ifndef HWM_NO_FLOW_CTL | ||
280 | #define HWM_TX_CHECK(smc,frame_status,low_water) {\ | ||
281 | if ((low_water)>=(smc)->hw.fp.tx_q[(frame_status)&QUEUE_A0].tx_free) {\ | ||
282 | mac_drv_clear_txd(smc) ;\ | ||
283 | }\ | ||
284 | } | ||
285 | #else | ||
286 | #define HWM_TX_CHECK(smc,frame_status,low_water) mac_drv_clear_txd(smc) | ||
287 | #endif | ||
288 | |||
289 | /* | ||
290 | * BEGIN_MANUAL_ENTRY(HWM_GET_RX_FRAG_LEN) | 265 | * BEGIN_MANUAL_ENTRY(HWM_GET_RX_FRAG_LEN) |
291 | * int HWM_GET_RX_FRAG_LEN(rxd) | 266 | * int HWM_GET_RX_FRAG_LEN(rxd) |
292 | * | 267 | * |
diff --git a/drivers/net/skfp/h/osdef1st.h b/drivers/net/skfp/h/osdef1st.h index 5359eb53008d..763ca18cbea8 100644 --- a/drivers/net/skfp/h/osdef1st.h +++ b/drivers/net/skfp/h/osdef1st.h | |||
@@ -20,6 +20,8 @@ | |||
20 | // HWM (HardWare Module) Definitions | 20 | // HWM (HardWare Module) Definitions |
21 | // ----------------------- | 21 | // ----------------------- |
22 | 22 | ||
23 | #include <asm/byteorder.h> | ||
24 | |||
23 | #ifdef __LITTLE_ENDIAN | 25 | #ifdef __LITTLE_ENDIAN |
24 | #define LITTLE_ENDIAN | 26 | #define LITTLE_ENDIAN |
25 | #else | 27 | #else |
diff --git a/drivers/net/skfp/hwmtm.c b/drivers/net/skfp/hwmtm.c index 18d429021edb..438f424e6361 100644 --- a/drivers/net/skfp/hwmtm.c +++ b/drivers/net/skfp/hwmtm.c | |||
@@ -86,6 +86,7 @@ static u_long repair_txd_ring(struct s_smc *smc, struct s_smt_tx_queue *queue); | |||
86 | static u_long repair_rxd_ring(struct s_smc *smc, struct s_smt_rx_queue *queue); | 86 | static u_long repair_rxd_ring(struct s_smc *smc, struct s_smt_rx_queue *queue); |
87 | static SMbuf* get_llc_rx(struct s_smc *smc); | 87 | static SMbuf* get_llc_rx(struct s_smc *smc); |
88 | static SMbuf* get_txd_mb(struct s_smc *smc); | 88 | static SMbuf* get_txd_mb(struct s_smc *smc); |
89 | static void mac_drv_clear_txd(struct s_smc *smc); | ||
89 | 90 | ||
90 | /* | 91 | /* |
91 | ------------------------------------------------------------- | 92 | ------------------------------------------------------------- |
@@ -146,7 +147,6 @@ extern int mac_drv_rx_init(struct s_smc *smc, int len, int fc, char *look_ahead, | |||
146 | */ | 147 | */ |
147 | void process_receive(struct s_smc *smc); | 148 | void process_receive(struct s_smc *smc); |
148 | void fddi_isr(struct s_smc *smc); | 149 | void fddi_isr(struct s_smc *smc); |
149 | void mac_drv_clear_txd(struct s_smc *smc); | ||
150 | void smt_free_mbuf(struct s_smc *smc, SMbuf *mb); | 150 | void smt_free_mbuf(struct s_smc *smc, SMbuf *mb); |
151 | void init_driver_fplus(struct s_smc *smc); | 151 | void init_driver_fplus(struct s_smc *smc); |
152 | void mac_drv_rx_mode(struct s_smc *smc, int mode); | 152 | void mac_drv_rx_mode(struct s_smc *smc, int mode); |
@@ -158,7 +158,6 @@ void hwm_tx_frag(struct s_smc *smc, char far *virt, u_long phys, int len, | |||
158 | void hwm_rx_frag(struct s_smc *smc, char far *virt, u_long phys, int len, | 158 | void hwm_rx_frag(struct s_smc *smc, char far *virt, u_long phys, int len, |
159 | int frame_status); | 159 | int frame_status); |
160 | 160 | ||
161 | int mac_drv_rx_frag(struct s_smc *smc, void far *virt, int len); | ||
162 | int mac_drv_init(struct s_smc *smc); | 161 | int mac_drv_init(struct s_smc *smc); |
163 | int hwm_tx_init(struct s_smc *smc, u_char fc, int frag_count, int frame_len, | 162 | int hwm_tx_init(struct s_smc *smc, u_char fc, int frag_count, int frame_len, |
164 | int frame_status); | 163 | int frame_status); |
@@ -1448,35 +1447,6 @@ void hwm_rx_frag(struct s_smc *smc, char far *virt, u_long phys, int len, | |||
1448 | NDD_TRACE("RHfE",r,AIX_REVERSE(r->rxd_rbadr),0) ; | 1447 | NDD_TRACE("RHfE",r,AIX_REVERSE(r->rxd_rbadr),0) ; |
1449 | } | 1448 | } |
1450 | 1449 | ||
1451 | #ifndef NDIS_OS2 | ||
1452 | /* | ||
1453 | * BEGIN_MANUAL_ENTRY(mac_drv_rx_frag) | ||
1454 | * int mac_drv_rx_frag(smc,virt,len) | ||
1455 | * | ||
1456 | * function DOWNCALL (hwmtm.c) | ||
1457 | * mac_drv_rx_frag fills the fragment with a part of the frame. | ||
1458 | * | ||
1459 | * para virt the virtual address of the fragment | ||
1460 | * len the length in bytes of the fragment | ||
1461 | * | ||
1462 | * return 0: success code, no errors possible | ||
1463 | * | ||
1464 | * END_MANUAL_ENTRY | ||
1465 | */ | ||
1466 | int mac_drv_rx_frag(struct s_smc *smc, void far *virt, int len) | ||
1467 | { | ||
1468 | NDD_TRACE("RHSB",virt,len,smc->os.hwm.r.mb_pos) ; | ||
1469 | |||
1470 | DB_RX("receive from queue: len/virt: = %d/%x",len,virt,4) ; | ||
1471 | memcpy((char far *)virt,smc->os.hwm.r.mb_pos,len) ; | ||
1472 | smc->os.hwm.r.mb_pos += len ; | ||
1473 | |||
1474 | NDD_TRACE("RHSE",smc->os.hwm.r.mb_pos,0,0) ; | ||
1475 | return(0) ; | ||
1476 | } | ||
1477 | #endif | ||
1478 | |||
1479 | |||
1480 | /* | 1450 | /* |
1481 | * BEGINN_MANUAL_ENTRY(mac_drv_clear_rx_queue) | 1451 | * BEGINN_MANUAL_ENTRY(mac_drv_clear_rx_queue) |
1482 | * | 1452 | * |
@@ -1978,7 +1948,7 @@ void smt_send_mbuf(struct s_smc *smc, SMbuf *mb, int fc) | |||
1978 | * | 1948 | * |
1979 | * END_MANUAL_ENTRY | 1949 | * END_MANUAL_ENTRY |
1980 | */ | 1950 | */ |
1981 | void mac_drv_clear_txd(struct s_smc *smc) | 1951 | static void mac_drv_clear_txd(struct s_smc *smc) |
1982 | { | 1952 | { |
1983 | struct s_smt_tx_queue *queue ; | 1953 | struct s_smt_tx_queue *queue ; |
1984 | struct s_smt_fp_txd volatile *t1 ; | 1954 | struct s_smt_fp_txd volatile *t1 ; |
diff --git a/drivers/net/skfp/lnkstat.c b/drivers/net/skfp/lnkstat.c deleted file mode 100644 index 00a248044f86..000000000000 --- a/drivers/net/skfp/lnkstat.c +++ /dev/null | |||
@@ -1,204 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * (C)Copyright 1998,1999 SysKonnect, | ||
4 | * a business unit of Schneider & Koch & Co. Datensysteme GmbH. | ||
5 | * | ||
6 | * See the file "skfddi.c" for further information. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * The information in this file is provided "AS IS" without warranty. | ||
14 | * | ||
15 | ******************************************************************************/ | ||
16 | |||
17 | /* | ||
18 | IBM FDDI read error log function | ||
19 | */ | ||
20 | |||
21 | #include "h/types.h" | ||
22 | #include "h/fddi.h" | ||
23 | #include "h/smc.h" | ||
24 | #include "h/lnkstat.h" | ||
25 | |||
26 | #ifndef lint | ||
27 | static const char ID_sccs[] = "@(#)lnkstat.c 1.8 97/04/11 (C) SK " ; | ||
28 | #endif | ||
29 | |||
30 | #ifdef sun | ||
31 | #define _far | ||
32 | #endif | ||
33 | |||
34 | #define EL_IS_OK(x,l) ((((int)&(((struct s_error_log *)0)->x)) + \ | ||
35 | sizeof(er->x)) <= l) | ||
36 | |||
37 | /* | ||
38 | BEGIN_MANUAL_ENTRY(if,func;others;11) | ||
39 | |||
40 | u_long smt_get_error_word(smc) | ||
41 | struct s_smc *smc ; | ||
42 | |||
43 | Function DOWNCALL (SMT, lnkstat.c) | ||
44 | This functions returns the SMT error work for AIX events. | ||
45 | |||
46 | Return smt_error_word These bits are supported: | ||
47 | |||
48 | SMT_ERL_ALC == [PS/PA].fddiPORTLerFlag | ||
49 | SMT_ERL_BLC == [PB].fddiPORTLerFlag | ||
50 | SMT_ERL_NCC == fddiMACNotCopiedFlag | ||
51 | SMT_ERL_FEC == fddiMACFrameErrorFlag | ||
52 | |||
53 | END_MANUAL_ENTRY() | ||
54 | */ | ||
55 | u_long smt_get_error_word(struct s_smc *smc) | ||
56 | { | ||
57 | u_long st; | ||
58 | |||
59 | /* | ||
60 | * smt error word low | ||
61 | */ | ||
62 | st = 0 ; | ||
63 | if (smc->s.sas == SMT_SAS) { | ||
64 | if (smc->mib.p[PS].fddiPORTLerFlag) | ||
65 | st |= SMT_ERL_ALC ; | ||
66 | } | ||
67 | else { | ||
68 | if (smc->mib.p[PA].fddiPORTLerFlag) | ||
69 | st |= SMT_ERL_ALC ; | ||
70 | if (smc->mib.p[PB].fddiPORTLerFlag) | ||
71 | st |= SMT_ERL_BLC ; | ||
72 | } | ||
73 | if (smc->mib.m[MAC0].fddiMACNotCopiedFlag) | ||
74 | st |= SMT_ERL_NCC ; /* not copied condition */ | ||
75 | if (smc->mib.m[MAC0].fddiMACFrameErrorFlag) | ||
76 | st |= SMT_ERL_FEC ; /* frame error condition */ | ||
77 | |||
78 | return st; | ||
79 | } | ||
80 | |||
81 | /* | ||
82 | BEGIN_MANUAL_ENTRY(if,func;others;11) | ||
83 | |||
84 | u_long smt_get_event_word(smc) | ||
85 | struct s_smc *smc ; | ||
86 | |||
87 | Function DOWNCALL (SMT, lnkstat.c) | ||
88 | This functions returns the SMT event work for AIX events. | ||
89 | |||
90 | Return smt_event_word always 0 | ||
91 | |||
92 | END_MANUAL_ENTRY() | ||
93 | */ | ||
94 | u_long smt_get_event_word(struct s_smc *smc) | ||
95 | { | ||
96 | return (u_long) 0; | ||
97 | } | ||
98 | |||
99 | /* | ||
100 | BEGIN_MANUAL_ENTRY(if,func;others;11) | ||
101 | |||
102 | u_long smt_get_port_event_word(smc) | ||
103 | struct s_smc *smc ; | ||
104 | |||
105 | Function DOWNCALL (SMT, lnkstat.c) | ||
106 | This functions returns the SMT port event work for AIX events. | ||
107 | |||
108 | Return smt_port_event_word always 0 | ||
109 | |||
110 | END_MANUAL_ENTRY() | ||
111 | */ | ||
112 | u_long smt_get_port_event_word(struct s_smc *smc) | ||
113 | { | ||
114 | return (u_long) 0; | ||
115 | } | ||
116 | |||
117 | /* | ||
118 | BEGIN_MANUAL_ENTRY(if,func;others;11) | ||
119 | |||
120 | u_long smt_read_errorlog(smc,p,len) | ||
121 | struct s_smc *smc ; | ||
122 | char _far *p ; | ||
123 | int len ; | ||
124 | |||
125 | Function DOWNCALL (SMT, lnkstat.c) | ||
126 | This functions returns the SMT error log field for AIX events. | ||
127 | |||
128 | Para p pointer to the error log field | ||
129 | len len of the error log field | ||
130 | |||
131 | Return len used len of the error log field | ||
132 | |||
133 | END_MANUAL_ENTRY() | ||
134 | */ | ||
135 | int smt_read_errorlog(struct s_smc *smc, char _far *p, int len) | ||
136 | { | ||
137 | int i ; | ||
138 | int st ; | ||
139 | struct s_error_log _far *er ; | ||
140 | |||
141 | er = (struct s_error_log _far *) p ; | ||
142 | if (len > sizeof(struct s_error_log)) | ||
143 | len = sizeof(struct s_error_log) ; | ||
144 | for (i = 0 ; i < len ; i++) | ||
145 | *p++ = 0 ; | ||
146 | /* | ||
147 | * set count | ||
148 | */ | ||
149 | if (EL_IS_OK(set_count_high,len)) { | ||
150 | er->set_count_low = (u_short)smc->mib.fddiSMTSetCount.count ; | ||
151 | er->set_count_high = | ||
152 | (u_short)(smc->mib.fddiSMTSetCount.count >> 16L) ; | ||
153 | } | ||
154 | /* | ||
155 | * aci | ||
156 | */ | ||
157 | if (EL_IS_OK(aci_id_code,len)) { | ||
158 | er->aci_id_code = 0 ; | ||
159 | } | ||
160 | /* | ||
161 | * purge counter is missed frames; 16 bits only | ||
162 | */ | ||
163 | if (EL_IS_OK(purge_frame_counter,len)) { | ||
164 | if (smc->mib.m[MAC0].fddiMACCopied_Ct > 0xffff) | ||
165 | er->purge_frame_counter = 0xffff ; | ||
166 | else | ||
167 | er->purge_frame_counter = | ||
168 | (u_short)smc->mib.m[MAC0].fddiMACCopied_Ct ; | ||
169 | } | ||
170 | /* | ||
171 | * CMT and RMT state machines | ||
172 | */ | ||
173 | if (EL_IS_OK(ecm_state,len)) | ||
174 | er->ecm_state = smc->mib.fddiSMTECMState ; | ||
175 | |||
176 | if (EL_IS_OK(pcm_b_state,len)) { | ||
177 | if (smc->s.sas == SMT_SAS) { | ||
178 | er->pcm_a_state = smc->y[PS].mib->fddiPORTPCMState ; | ||
179 | er->pcm_b_state = 0 ; | ||
180 | } | ||
181 | else { | ||
182 | er->pcm_a_state = smc->y[PA].mib->fddiPORTPCMState ; | ||
183 | er->pcm_b_state = smc->y[PB].mib->fddiPORTPCMState ; | ||
184 | } | ||
185 | } | ||
186 | if (EL_IS_OK(cfm_state,len)) | ||
187 | er->cfm_state = smc->mib.fddiSMTCF_State ; | ||
188 | if (EL_IS_OK(rmt_state,len)) | ||
189 | er->rmt_state = smc->mib.m[MAC0].fddiMACRMTState ; | ||
190 | |||
191 | /* | ||
192 | * smt error word low (we only need the low order 16 bits.) | ||
193 | */ | ||
194 | |||
195 | st = smt_get_error_word(smc) & 0xffff ; | ||
196 | |||
197 | if (EL_IS_OK(smt_error_low,len)) | ||
198 | er->smt_error_low = st ; | ||
199 | |||
200 | if (EL_IS_OK(ucode_version_level,len)) | ||
201 | er->ucode_version_level = 0x0101 ; | ||
202 | return(len) ; | ||
203 | } | ||
204 | |||
diff --git a/drivers/net/skfp/pcmplc.c b/drivers/net/skfp/pcmplc.c index 571f055c096b..cd0aa4c151b0 100644 --- a/drivers/net/skfp/pcmplc.c +++ b/drivers/net/skfp/pcmplc.c | |||
@@ -1861,13 +1861,6 @@ void plc_irq(struct s_smc *smc, int np, unsigned int cmd) | |||
1861 | #endif | 1861 | #endif |
1862 | } | 1862 | } |
1863 | 1863 | ||
1864 | void pcm_set_lct_short(struct s_smc *smc, int n) | ||
1865 | { | ||
1866 | if (n <= 0 || n > 1000) | ||
1867 | return ; | ||
1868 | smc->s.lct_short = n ; | ||
1869 | } | ||
1870 | |||
1871 | #ifdef DEBUG | 1864 | #ifdef DEBUG |
1872 | /* | 1865 | /* |
1873 | * fill state struct | 1866 | * fill state struct |
diff --git a/drivers/net/skfp/pmf.c b/drivers/net/skfp/pmf.c index f2b446d8b0bf..efc639c013fd 100644 --- a/drivers/net/skfp/pmf.c +++ b/drivers/net/skfp/pmf.c | |||
@@ -36,12 +36,13 @@ static int smt_authorize(struct s_smc *smc, struct smt_header *sm); | |||
36 | static int smt_check_set_count(struct s_smc *smc, struct smt_header *sm); | 36 | static int smt_check_set_count(struct s_smc *smc, struct smt_header *sm); |
37 | static const struct s_p_tab* smt_get_ptab(u_short para); | 37 | static const struct s_p_tab* smt_get_ptab(u_short para); |
38 | static int smt_mib_phys(struct s_smc *smc); | 38 | static int smt_mib_phys(struct s_smc *smc); |
39 | int smt_set_para(struct s_smc *smc, struct smt_para *pa, int index, int local, | 39 | static int smt_set_para(struct s_smc *smc, struct smt_para *pa, int index, |
40 | int set); | 40 | int local, int set); |
41 | void smt_add_para(struct s_smc *smc, struct s_pcon *pcon, u_short para, | 41 | void smt_add_para(struct s_smc *smc, struct s_pcon *pcon, u_short para, |
42 | int index, int local); | 42 | int index, int local); |
43 | static SMbuf *smt_build_pmf_response(struct s_smc *smc, struct smt_header *req, | 43 | static SMbuf *smt_build_pmf_response(struct s_smc *smc, struct smt_header *req, |
44 | int set, int local); | 44 | int set, int local); |
45 | static int port_to_mib(struct s_smc *smc, int p); | ||
45 | 46 | ||
46 | #define MOFFSS(e) ((int)&(((struct fddi_mib *)0)->e)) | 47 | #define MOFFSS(e) ((int)&(((struct fddi_mib *)0)->e)) |
47 | #define MOFFSA(e) ((int) (((struct fddi_mib *)0)->e)) | 48 | #define MOFFSA(e) ((int) (((struct fddi_mib *)0)->e)) |
@@ -1078,8 +1079,8 @@ wrong_error: | |||
1078 | /* | 1079 | /* |
1079 | * set parameter | 1080 | * set parameter |
1080 | */ | 1081 | */ |
1081 | int smt_set_para(struct s_smc *smc, struct smt_para *pa, int index, int local, | 1082 | static int smt_set_para(struct s_smc *smc, struct smt_para *pa, int index, |
1082 | int set) | 1083 | int local, int set) |
1083 | { | 1084 | { |
1084 | #define IFSET(x) if (set) (x) | 1085 | #define IFSET(x) if (set) (x) |
1085 | 1086 | ||
@@ -1549,7 +1550,7 @@ static int smt_mib_phys(struct s_smc *smc) | |||
1549 | #endif | 1550 | #endif |
1550 | } | 1551 | } |
1551 | 1552 | ||
1552 | int port_to_mib(struct s_smc *smc, int p) | 1553 | static int port_to_mib(struct s_smc *smc, int p) |
1553 | { | 1554 | { |
1554 | #ifdef CONCENTRATOR | 1555 | #ifdef CONCENTRATOR |
1555 | SK_UNUSED(smc) ; | 1556 | SK_UNUSED(smc) ; |
diff --git a/drivers/net/skfp/skfddi.c b/drivers/net/skfp/skfddi.c index c88aad6edd74..4b5ed2c63177 100644 --- a/drivers/net/skfp/skfddi.c +++ b/drivers/net/skfp/skfddi.c | |||
@@ -149,7 +149,6 @@ extern void hwm_rx_frag(struct s_smc *smc, char far * virt, u_long phys, | |||
149 | extern void mac_drv_rx_mode(struct s_smc *smc, int mode); | 149 | extern void mac_drv_rx_mode(struct s_smc *smc, int mode); |
150 | extern void mac_drv_clear_rx_queue(struct s_smc *smc); | 150 | extern void mac_drv_clear_rx_queue(struct s_smc *smc); |
151 | extern void enable_tx_irq(struct s_smc *smc, u_short queue); | 151 | extern void enable_tx_irq(struct s_smc *smc, u_short queue); |
152 | extern void mac_drv_clear_txd(struct s_smc *smc); | ||
153 | 152 | ||
154 | static struct pci_device_id skfddi_pci_tbl[] = { | 153 | static struct pci_device_id skfddi_pci_tbl[] = { |
155 | { PCI_VENDOR_ID_SK, PCI_DEVICE_ID_SK_FP, PCI_ANY_ID, PCI_ANY_ID, }, | 154 | { PCI_VENDOR_ID_SK, PCI_DEVICE_ID_SK_FP, PCI_ANY_ID, PCI_ANY_ID, }, |
diff --git a/drivers/net/skfp/smt.c b/drivers/net/skfp/smt.c index 71935eaf9d4e..f17c05cbe44b 100644 --- a/drivers/net/skfp/smt.c +++ b/drivers/net/skfp/smt.c | |||
@@ -86,7 +86,7 @@ static void smt_send_sif_config(struct s_smc *smc, struct fddi_addr *dest, | |||
86 | static void smt_send_sif_operation(struct s_smc *smc, struct fddi_addr *dest, | 86 | static void smt_send_sif_operation(struct s_smc *smc, struct fddi_addr *dest, |
87 | u_long tid, int local); | 87 | u_long tid, int local); |
88 | #ifdef LITTLE_ENDIAN | 88 | #ifdef LITTLE_ENDIAN |
89 | static void smt_string_swap(void); | 89 | static void smt_string_swap(char *data, const char *format, int len); |
90 | #endif | 90 | #endif |
91 | static void smt_add_frame_len(SMbuf *mb, int len); | 91 | static void smt_add_frame_len(SMbuf *mb, int len); |
92 | static void smt_fill_una(struct s_smc *smc, struct smt_p_una *una); | 92 | static void smt_fill_una(struct s_smc *smc, struct smt_p_una *una); |
@@ -110,7 +110,7 @@ static void smt_fill_setcount(struct s_smc *smc, struct smt_p_setcount *setcount | |||
110 | static void smt_fill_echo(struct s_smc *smc, struct smt_p_echo *echo, u_long seed, | 110 | static void smt_fill_echo(struct s_smc *smc, struct smt_p_echo *echo, u_long seed, |
111 | int len); | 111 | int len); |
112 | 112 | ||
113 | void smt_clear_una_dna(struct s_smc *smc); | 113 | static void smt_clear_una_dna(struct s_smc *smc); |
114 | static void smt_clear_old_una_dna(struct s_smc *smc); | 114 | static void smt_clear_old_una_dna(struct s_smc *smc); |
115 | #ifdef CONCENTRATOR | 115 | #ifdef CONCENTRATOR |
116 | static int entity_to_index(void); | 116 | static int entity_to_index(void); |
@@ -118,7 +118,7 @@ static int entity_to_index(void); | |||
118 | static void update_dac(struct s_smc *smc, int report); | 118 | static void update_dac(struct s_smc *smc, int report); |
119 | static int div_ratio(u_long upper, u_long lower); | 119 | static int div_ratio(u_long upper, u_long lower); |
120 | #ifdef USE_CAN_ADDR | 120 | #ifdef USE_CAN_ADDR |
121 | void hwm_conv_can(struct s_smc *smc, char *data, int len); | 121 | static void hwm_conv_can(struct s_smc *smc, char *data, int len); |
122 | #else | 122 | #else |
123 | #define hwm_conv_can(smc,data,len) | 123 | #define hwm_conv_can(smc,data,len) |
124 | #endif | 124 | #endif |
@@ -216,24 +216,6 @@ void smt_agent_task(struct s_smc *smc) | |||
216 | DB_SMT("SMT agent task\n",0,0) ; | 216 | DB_SMT("SMT agent task\n",0,0) ; |
217 | } | 217 | } |
218 | 218 | ||
219 | void smt_please_reconnect(struct s_smc *smc, int reconn_time) | ||
220 | /* struct s_smc *smc; Pointer to SMT context */ | ||
221 | /* int reconn_time; Wait for reconnect time in seconds */ | ||
222 | { | ||
223 | /* | ||
224 | * The please reconnect variable is used as a timer. | ||
225 | * It is decremented each time smt_event is called. | ||
226 | * This happens every second or when smt_force_irq is called. | ||
227 | * Note: smt_force_irq () is called on some packet receives and | ||
228 | * when a multicast address is changed. Since nothing | ||
229 | * is received during the disconnect and the multicast | ||
230 | * address changes can be viewed as not very often and | ||
231 | * the timer runs out close to its given value | ||
232 | * (reconn_time). | ||
233 | */ | ||
234 | smc->sm.please_reconnect = reconn_time ; | ||
235 | } | ||
236 | |||
237 | #ifndef SMT_REAL_TOKEN_CT | 219 | #ifndef SMT_REAL_TOKEN_CT |
238 | void smt_emulate_token_ct(struct s_smc *smc, int mac_index) | 220 | void smt_emulate_token_ct(struct s_smc *smc, int mac_index) |
239 | { | 221 | { |
@@ -1574,7 +1556,7 @@ static void smt_fill_echo(struct s_smc *smc, struct smt_p_echo *echo, u_long see | |||
1574 | * clear DNA and UNA | 1556 | * clear DNA and UNA |
1575 | * called from CFM if configuration changes | 1557 | * called from CFM if configuration changes |
1576 | */ | 1558 | */ |
1577 | void smt_clear_una_dna(struct s_smc *smc) | 1559 | static void smt_clear_una_dna(struct s_smc *smc) |
1578 | { | 1560 | { |
1579 | smc->mib.m[MAC0].fddiMACUpstreamNbr = SMT_Unknown ; | 1561 | smc->mib.m[MAC0].fddiMACUpstreamNbr = SMT_Unknown ; |
1580 | smc->mib.m[MAC0].fddiMACDownstreamNbr = SMT_Unknown ; | 1562 | smc->mib.m[MAC0].fddiMACDownstreamNbr = SMT_Unknown ; |
@@ -2058,30 +2040,10 @@ int smt_action(struct s_smc *smc, int class, int code, int index) | |||
2058 | } | 2040 | } |
2059 | 2041 | ||
2060 | /* | 2042 | /* |
2061 | * change tneg | ||
2062 | * set T_Req in MIB (Path Attribute) | ||
2063 | * calculate new values for MAC | ||
2064 | * if change required | ||
2065 | * disconnect | ||
2066 | * set reconnect | ||
2067 | * end | ||
2068 | */ | ||
2069 | void smt_change_t_neg(struct s_smc *smc, u_long tneg) | ||
2070 | { | ||
2071 | smc->mib.a[PATH0].fddiPATHMaxT_Req = tneg ; | ||
2072 | |||
2073 | if (smt_set_mac_opvalues(smc)) { | ||
2074 | RS_SET(smc,RS_EVENT) ; | ||
2075 | smc->sm.please_reconnect = 1 ; | ||
2076 | queue_event(smc,EVENT_ECM,EC_DISCONNECT) ; | ||
2077 | } | ||
2078 | } | ||
2079 | |||
2080 | /* | ||
2081 | * canonical conversion of <len> bytes beginning form *data | 2043 | * canonical conversion of <len> bytes beginning form *data |
2082 | */ | 2044 | */ |
2083 | #ifdef USE_CAN_ADDR | 2045 | #ifdef USE_CAN_ADDR |
2084 | void hwm_conv_can(struct s_smc *smc, char *data, int len) | 2046 | static void hwm_conv_can(struct s_smc *smc, char *data, int len) |
2085 | { | 2047 | { |
2086 | int i ; | 2048 | int i ; |
2087 | 2049 | ||
diff --git a/drivers/net/skfp/smtdef.c b/drivers/net/skfp/smtdef.c index 5a0c8db816d8..4e07ff7073f1 100644 --- a/drivers/net/skfp/smtdef.c +++ b/drivers/net/skfp/smtdef.c | |||
@@ -76,11 +76,6 @@ void smt_reset_defaults(struct s_smc *smc, int level); | |||
76 | static void smt_init_mib(struct s_smc *smc, int level); | 76 | static void smt_init_mib(struct s_smc *smc, int level); |
77 | static int set_min_max(int maxflag, u_long mib, u_long limit, u_long *oper); | 77 | static int set_min_max(int maxflag, u_long mib, u_long limit, u_long *oper); |
78 | 78 | ||
79 | void smt_set_defaults(struct s_smc *smc) | ||
80 | { | ||
81 | smt_reset_defaults(smc,0) ; | ||
82 | } | ||
83 | |||
84 | #define MS2BCLK(x) ((x)*12500L) | 79 | #define MS2BCLK(x) ((x)*12500L) |
85 | #define US2BCLK(x) ((x)*1250L) | 80 | #define US2BCLK(x) ((x)*1250L) |
86 | 81 | ||
diff --git a/drivers/net/skfp/smtparse.c b/drivers/net/skfp/smtparse.c deleted file mode 100644 index d5779e414dbe..000000000000 --- a/drivers/net/skfp/smtparse.c +++ /dev/null | |||
@@ -1,467 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * (C)Copyright 1998,1999 SysKonnect, | ||
4 | * a business unit of Schneider & Koch & Co. Datensysteme GmbH. | ||
5 | * | ||
6 | * See the file "skfddi.c" for further information. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * The information in this file is provided "AS IS" without warranty. | ||
14 | * | ||
15 | ******************************************************************************/ | ||
16 | |||
17 | |||
18 | /* | ||
19 | parser for SMT parameters | ||
20 | */ | ||
21 | |||
22 | #include "h/types.h" | ||
23 | #include "h/fddi.h" | ||
24 | #include "h/smc.h" | ||
25 | #include "h/smt_p.h" | ||
26 | |||
27 | #define KERNEL | ||
28 | #include "h/smtstate.h" | ||
29 | |||
30 | #ifndef lint | ||
31 | static const char ID_sccs[] = "@(#)smtparse.c 1.12 98/10/06 (C) SK " ; | ||
32 | #endif | ||
33 | |||
34 | #ifdef sun | ||
35 | #define _far | ||
36 | #endif | ||
37 | |||
38 | /* | ||
39 | * convert to BCLK units | ||
40 | */ | ||
41 | #define MS2BCLK(x) ((x)*12500L) | ||
42 | #define US2BCLK(x) ((x/10)*125L) | ||
43 | |||
44 | /* | ||
45 | * parameter table | ||
46 | */ | ||
47 | static struct s_ptab { | ||
48 | char *pt_name ; | ||
49 | u_short pt_num ; | ||
50 | u_short pt_type ; | ||
51 | u_long pt_min ; | ||
52 | u_long pt_max ; | ||
53 | } ptab[] = { | ||
54 | { "PMFPASSWD",0, 0 } , | ||
55 | { "USERDATA",1, 0 } , | ||
56 | { "LERCUTOFFA",2, 1, 4, 15 } , | ||
57 | { "LERCUTOFFB",3, 1, 4, 15 } , | ||
58 | { "LERALARMA",4, 1, 4, 15 } , | ||
59 | { "LERALARMB",5, 1, 4, 15 } , | ||
60 | { "TMAX",6, 1, 5, 165 } , | ||
61 | { "TMIN",7, 1, 5, 165 } , | ||
62 | { "TREQ",8, 1, 5, 165 } , | ||
63 | { "TVX",9, 1, 2500, 10000 } , | ||
64 | #ifdef ESS | ||
65 | { "SBAPAYLOAD",10, 1, 0, 1562 } , | ||
66 | { "SBAOVERHEAD",11, 1, 50, 5000 } , | ||
67 | { "MAXTNEG",12, 1, 5, 165 } , | ||
68 | { "MINSEGMENTSIZE",13, 1, 0, 4478 } , | ||
69 | { "SBACATEGORY",14, 1, 0, 0xffff } , | ||
70 | { "SYNCHTXMODE",15, 0 } , | ||
71 | #endif | ||
72 | #ifdef SBA | ||
73 | { "SBACOMMAND",16, 0 } , | ||
74 | { "SBAAVAILABLE",17, 1, 0, 100 } , | ||
75 | #endif | ||
76 | { NULL } | ||
77 | } ; | ||
78 | |||
79 | /* Define maximum string size for values and keybuffer */ | ||
80 | #define MAX_VAL 40 | ||
81 | |||
82 | /* | ||
83 | * local function declarations | ||
84 | */ | ||
85 | static u_long parse_num(int type, char _far *value, char *v, u_long mn, | ||
86 | u_long mx, int scale); | ||
87 | static int parse_word(char *buf, char _far *text); | ||
88 | |||
89 | #ifdef SIM | ||
90 | #define DB_MAIN(a,b,c) printf(a,b,c) | ||
91 | #else | ||
92 | #define DB_MAIN(a,b,c) | ||
93 | #endif | ||
94 | |||
95 | /* | ||
96 | * BEGIN_MANUAL_ENTRY() | ||
97 | * | ||
98 | * int smt_parse_arg(struct s_smc *,char _far *keyword,int type, | ||
99 | char _far *value) | ||
100 | * | ||
101 | * parse SMT parameter | ||
102 | * *keyword | ||
103 | * pointer to keyword, must be \0, \n or \r terminated | ||
104 | * *value pointer to value, either char * or u_long * | ||
105 | * if char * | ||
106 | * pointer to value, must be \0, \n or \r terminated | ||
107 | * if u_long * | ||
108 | * contains binary value | ||
109 | * | ||
110 | * type 0: integer | ||
111 | * 1: string | ||
112 | * return | ||
113 | * 0 parameter parsed ok | ||
114 | * != 0 error | ||
115 | * NOTE: | ||
116 | * function can be called with DS != SS | ||
117 | * | ||
118 | * | ||
119 | * END_MANUAL_ENTRY() | ||
120 | */ | ||
121 | int smt_parse_arg(struct s_smc *smc, char _far *keyword, int type, | ||
122 | char _far *value) | ||
123 | { | ||
124 | char keybuf[MAX_VAL+1]; | ||
125 | char valbuf[MAX_VAL+1]; | ||
126 | char c ; | ||
127 | char *p ; | ||
128 | char *v ; | ||
129 | char *d ; | ||
130 | u_long val = 0 ; | ||
131 | struct s_ptab *pt ; | ||
132 | int st ; | ||
133 | int i ; | ||
134 | |||
135 | /* | ||
136 | * parse keyword | ||
137 | */ | ||
138 | if ((st = parse_word(keybuf,keyword))) | ||
139 | return(st) ; | ||
140 | /* | ||
141 | * parse value if given as string | ||
142 | */ | ||
143 | if (type == 1) { | ||
144 | if ((st = parse_word(valbuf,value))) | ||
145 | return(st) ; | ||
146 | } | ||
147 | /* | ||
148 | * search in table | ||
149 | */ | ||
150 | st = 0 ; | ||
151 | for (pt = ptab ; (v = pt->pt_name) ; pt++) { | ||
152 | for (p = keybuf ; (c = *p) ; p++,v++) { | ||
153 | if (c != *v) | ||
154 | break ; | ||
155 | } | ||
156 | if (!c && !*v) | ||
157 | break ; | ||
158 | } | ||
159 | if (!v) | ||
160 | return(-1) ; | ||
161 | #if 0 | ||
162 | printf("=>%s<==>%s<=\n",pt->pt_name,valbuf) ; | ||
163 | #endif | ||
164 | /* | ||
165 | * set value in MIB | ||
166 | */ | ||
167 | if (pt->pt_type) | ||
168 | val = parse_num(type,value,valbuf,pt->pt_min,pt->pt_max,1) ; | ||
169 | switch (pt->pt_num) { | ||
170 | case 0 : | ||
171 | v = valbuf ; | ||
172 | d = (char *) smc->mib.fddiPRPMFPasswd ; | ||
173 | for (i = 0 ; i < (signed)sizeof(smc->mib.fddiPRPMFPasswd) ; i++) | ||
174 | *d++ = *v++ ; | ||
175 | DB_MAIN("SET %s = %s\n",pt->pt_name,smc->mib.fddiPRPMFPasswd) ; | ||
176 | break ; | ||
177 | case 1 : | ||
178 | v = valbuf ; | ||
179 | d = (char *) smc->mib.fddiSMTUserData ; | ||
180 | for (i = 0 ; i < (signed)sizeof(smc->mib.fddiSMTUserData) ; i++) | ||
181 | *d++ = *v++ ; | ||
182 | DB_MAIN("SET %s = %s\n",pt->pt_name,smc->mib.fddiSMTUserData) ; | ||
183 | break ; | ||
184 | case 2 : | ||
185 | smc->mib.p[PA].fddiPORTLer_Cutoff = (u_char) val ; | ||
186 | DB_MAIN("SET %s = %d\n", | ||
187 | pt->pt_name,smc->mib.p[PA].fddiPORTLer_Cutoff) ; | ||
188 | break ; | ||
189 | case 3 : | ||
190 | smc->mib.p[PB].fddiPORTLer_Cutoff = (u_char) val ; | ||
191 | DB_MAIN("SET %s = %d\n", | ||
192 | pt->pt_name,smc->mib.p[PB].fddiPORTLer_Cutoff) ; | ||
193 | break ; | ||
194 | case 4 : | ||
195 | smc->mib.p[PA].fddiPORTLer_Alarm = (u_char) val ; | ||
196 | DB_MAIN("SET %s = %d\n", | ||
197 | pt->pt_name,smc->mib.p[PA].fddiPORTLer_Alarm) ; | ||
198 | break ; | ||
199 | case 5 : | ||
200 | smc->mib.p[PB].fddiPORTLer_Alarm = (u_char) val ; | ||
201 | DB_MAIN("SET %s = %d\n", | ||
202 | pt->pt_name,smc->mib.p[PB].fddiPORTLer_Alarm) ; | ||
203 | break ; | ||
204 | case 6 : /* TMAX */ | ||
205 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
206 | smc->mib.a[PATH0].fddiPATHT_MaxLowerBound = | ||
207 | (u_long) -MS2BCLK((long)val) ; | ||
208 | break ; | ||
209 | case 7 : /* TMIN */ | ||
210 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
211 | smc->mib.m[MAC0].fddiMACT_Min = | ||
212 | (u_long) -MS2BCLK((long)val) ; | ||
213 | break ; | ||
214 | case 8 : /* TREQ */ | ||
215 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
216 | smc->mib.a[PATH0].fddiPATHMaxT_Req = | ||
217 | (u_long) -MS2BCLK((long)val) ; | ||
218 | break ; | ||
219 | case 9 : /* TVX */ | ||
220 | DB_MAIN("SET %s = %d \n",pt->pt_name,val) ; | ||
221 | smc->mib.a[PATH0].fddiPATHTVXLowerBound = | ||
222 | (u_long) -US2BCLK((long)val) ; | ||
223 | break ; | ||
224 | #ifdef ESS | ||
225 | case 10 : /* SBAPAYLOAD */ | ||
226 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
227 | if (smc->mib.fddiESSPayload != val) { | ||
228 | smc->ess.raf_act_timer_poll = TRUE ; | ||
229 | smc->mib.fddiESSPayload = val ; | ||
230 | } | ||
231 | break ; | ||
232 | case 11 : /* SBAOVERHEAD */ | ||
233 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
234 | smc->mib.fddiESSOverhead = val ; | ||
235 | break ; | ||
236 | case 12 : /* MAXTNEG */ | ||
237 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
238 | smc->mib.fddiESSMaxTNeg = (u_long) -MS2BCLK((long)val) ; | ||
239 | break ; | ||
240 | case 13 : /* MINSEGMENTSIZE */ | ||
241 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
242 | smc->mib.fddiESSMinSegmentSize = val ; | ||
243 | break ; | ||
244 | case 14 : /* SBACATEGORY */ | ||
245 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
246 | smc->mib.fddiESSCategory = | ||
247 | (smc->mib.fddiESSCategory & 0xffff) | | ||
248 | ((u_long)(val << 16)) ; | ||
249 | break ; | ||
250 | case 15 : /* SYNCHTXMODE */ | ||
251 | /* do not use memcmp(valbuf,"ALL",3) because DS != SS */ | ||
252 | if (valbuf[0] == 'A' && valbuf[1] == 'L' && valbuf[2] == 'L') { | ||
253 | smc->mib.fddiESSSynchTxMode = TRUE ; | ||
254 | DB_MAIN("SET %s = %s\n",pt->pt_name,valbuf) ; | ||
255 | } | ||
256 | /* if (!memcmp(valbuf,"SPLIT",5)) { */ | ||
257 | if (valbuf[0] == 'S' && valbuf[1] == 'P' && valbuf[2] == 'L' && | ||
258 | valbuf[3] == 'I' && valbuf[4] == 'T') { | ||
259 | DB_MAIN("SET %s = %s\n",pt->pt_name,valbuf) ; | ||
260 | smc->mib.fddiESSSynchTxMode = FALSE ; | ||
261 | } | ||
262 | break ; | ||
263 | #endif | ||
264 | #ifdef SBA | ||
265 | case 16 : /* SBACOMMAND */ | ||
266 | /* if (!memcmp(valbuf,"START",5)) { */ | ||
267 | if (valbuf[0] == 'S' && valbuf[1] == 'T' && valbuf[2] == 'A' && | ||
268 | valbuf[3] == 'R' && valbuf[4] == 'T') { | ||
269 | DB_MAIN("SET %s = %s\n",pt->pt_name,valbuf) ; | ||
270 | smc->mib.fddiSBACommand = SB_START ; | ||
271 | } | ||
272 | /* if (!memcmp(valbuf,"STOP",4)) { */ | ||
273 | if (valbuf[0] == 'S' && valbuf[1] == 'T' && valbuf[2] == 'O' && | ||
274 | valbuf[3] == 'P') { | ||
275 | DB_MAIN("SET %s = %s\n",pt->pt_name,valbuf) ; | ||
276 | smc->mib.fddiSBACommand = SB_STOP ; | ||
277 | } | ||
278 | break ; | ||
279 | case 17 : /* SBAAVAILABLE */ | ||
280 | DB_MAIN("SET %s = %d\n",pt->pt_name,val) ; | ||
281 | smc->mib.fddiSBAAvailable = (u_char) val ; | ||
282 | break ; | ||
283 | #endif | ||
284 | } | ||
285 | return(0) ; | ||
286 | } | ||
287 | |||
288 | static int parse_word(char *buf, char _far *text) | ||
289 | { | ||
290 | char c ; | ||
291 | char *p ; | ||
292 | int p_len ; | ||
293 | int quote ; | ||
294 | int i ; | ||
295 | int ok ; | ||
296 | |||
297 | /* | ||
298 | * skip leading white space | ||
299 | */ | ||
300 | p = buf ; | ||
301 | for (i = 0 ; i < MAX_VAL ; i++) | ||
302 | *p++ = 0 ; | ||
303 | p = buf ; | ||
304 | p_len = 0 ; | ||
305 | ok = 0 ; | ||
306 | while ( (c = *text++) && (c != '\n') && (c != '\r')) { | ||
307 | if ((c != ' ') && (c != '\t')) { | ||
308 | ok = 1 ; | ||
309 | break ; | ||
310 | } | ||
311 | } | ||
312 | if (!ok) | ||
313 | return(-1) ; | ||
314 | if (c == '"') { | ||
315 | quote = 1 ; | ||
316 | } | ||
317 | else { | ||
318 | quote = 0 ; | ||
319 | text-- ; | ||
320 | } | ||
321 | /* | ||
322 | * parse valbuf | ||
323 | */ | ||
324 | ok = 0 ; | ||
325 | while (!ok && p_len < MAX_VAL-1 && (c = *text++) && (c != '\n') | ||
326 | && (c != '\r')) { | ||
327 | switch (quote) { | ||
328 | case 0 : | ||
329 | if ((c == ' ') || (c == '\t') || (c == '=')) { | ||
330 | ok = 1 ; | ||
331 | break ; | ||
332 | } | ||
333 | *p++ = c ; | ||
334 | p_len++ ; | ||
335 | break ; | ||
336 | case 2 : | ||
337 | *p++ = c ; | ||
338 | p_len++ ; | ||
339 | quote = 1 ; | ||
340 | break ; | ||
341 | case 1 : | ||
342 | switch (c) { | ||
343 | case '"' : | ||
344 | ok = 1 ; | ||
345 | break ; | ||
346 | case '\\' : | ||
347 | quote = 2 ; | ||
348 | break ; | ||
349 | default : | ||
350 | *p++ = c ; | ||
351 | p_len++ ; | ||
352 | } | ||
353 | } | ||
354 | } | ||
355 | *p++ = 0 ; | ||
356 | for (p = buf ; (c = *p) ; p++) { | ||
357 | if (c >= 'a' && c <= 'z') | ||
358 | *p = c + 'A' - 'a' ; | ||
359 | } | ||
360 | return(0) ; | ||
361 | } | ||
362 | |||
363 | static u_long parse_num(int type, char _far *value, char *v, u_long mn, | ||
364 | u_long mx, int scale) | ||
365 | { | ||
366 | u_long x = 0 ; | ||
367 | char c ; | ||
368 | |||
369 | if (type == 0) { /* integer */ | ||
370 | u_long _far *l ; | ||
371 | u_long u1 ; | ||
372 | |||
373 | l = (u_long _far *) value ; | ||
374 | u1 = *l ; | ||
375 | /* | ||
376 | * if the value is negative take the lower limit | ||
377 | */ | ||
378 | if ((long)u1 < 0) { | ||
379 | if (- ((long)u1) > (long) mx) { | ||
380 | u1 = 0 ; | ||
381 | } | ||
382 | else { | ||
383 | u1 = (u_long) - ((long)u1) ; | ||
384 | } | ||
385 | } | ||
386 | x = u1 ; | ||
387 | } | ||
388 | else { /* string */ | ||
389 | int sign = 0 ; | ||
390 | |||
391 | if (*v == '-') { | ||
392 | sign = 1 ; | ||
393 | } | ||
394 | while ((c = *v++) && (c >= '0') && (c <= '9')) { | ||
395 | x = x * 10 + c - '0' ; | ||
396 | } | ||
397 | if (scale == 10) { | ||
398 | x *= 10 ; | ||
399 | if (c == '.') { | ||
400 | if ((c = *v++) && (c >= '0') && (c <= '9')) { | ||
401 | x += c - '0' ; | ||
402 | } | ||
403 | } | ||
404 | } | ||
405 | if (sign) | ||
406 | x = (u_long) - ((long)x) ; | ||
407 | } | ||
408 | /* | ||
409 | * if the value is negative | ||
410 | * and the absolute value is outside the limits | ||
411 | * take the lower limit | ||
412 | * else | ||
413 | * take the absoute value | ||
414 | */ | ||
415 | if ((long)x < 0) { | ||
416 | if (- ((long)x) > (long) mx) { | ||
417 | x = 0 ; | ||
418 | } | ||
419 | else { | ||
420 | x = (u_long) - ((long)x) ; | ||
421 | } | ||
422 | } | ||
423 | if (x < mn) | ||
424 | return(mn) ; | ||
425 | else if (x > mx) | ||
426 | return(mx) ; | ||
427 | return(x) ; | ||
428 | } | ||
429 | |||
430 | #if 0 | ||
431 | struct s_smc SMC ; | ||
432 | main() | ||
433 | { | ||
434 | char *p ; | ||
435 | char *v ; | ||
436 | char buf[100] ; | ||
437 | int toggle = 0 ; | ||
438 | |||
439 | while (gets(buf)) { | ||
440 | p = buf ; | ||
441 | while (*p && ((*p == ' ') || (*p == '\t'))) | ||
442 | p++ ; | ||
443 | |||
444 | while (*p && ((*p != ' ') && (*p != '\t'))) | ||
445 | p++ ; | ||
446 | |||
447 | v = p ; | ||
448 | while (*v && ((*v == ' ') || (*v == '\t'))) | ||
449 | v++ ; | ||
450 | if ((*v >= '0') && (*v <= '9')) { | ||
451 | toggle = !toggle ; | ||
452 | if (toggle) { | ||
453 | u_long l ; | ||
454 | l = atol(v) ; | ||
455 | smt_parse_arg(&SMC,buf,0,(char _far *)&l) ; | ||
456 | } | ||
457 | else | ||
458 | smt_parse_arg(&SMC,buf,1,(char _far *)p) ; | ||
459 | } | ||
460 | else { | ||
461 | smt_parse_arg(&SMC,buf,1,(char _far *)p) ; | ||
462 | } | ||
463 | } | ||
464 | exit(0) ; | ||
465 | } | ||
466 | #endif | ||
467 | |||
diff --git a/drivers/net/skge.c b/drivers/net/skge.c new file mode 100644 index 000000000000..5cacc7ad9e79 --- /dev/null +++ b/drivers/net/skge.c | |||
@@ -0,0 +1,3334 @@ | |||
1 | /* | ||
2 | * New driver for Marvell Yukon chipset and SysKonnect Gigabit | ||
3 | * Ethernet adapters. Based on earlier sk98lin, e100 and | ||
4 | * FreeBSD if_sk drivers. | ||
5 | * | ||
6 | * This driver intentionally does not support all the features | ||
7 | * of the original driver such as link fail-over and link management because | ||
8 | * those should be done at higher levels. | ||
9 | * | ||
10 | * Copyright (C) 2004, 2005 Stephen Hemminger <shemminger@osdl.org> | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify | ||
13 | * it under the terms of the GNU General Public License as published by | ||
14 | * the Free Software Foundation; either version 2 of the License, or | ||
15 | * (at your option) any later version. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | * | ||
22 | * You should have received a copy of the GNU General Public License | ||
23 | * along with this program; if not, write to the Free Software | ||
24 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
25 | */ | ||
26 | |||
27 | #include <linux/config.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/moduleparam.h> | ||
31 | #include <linux/netdevice.h> | ||
32 | #include <linux/etherdevice.h> | ||
33 | #include <linux/ethtool.h> | ||
34 | #include <linux/pci.h> | ||
35 | #include <linux/if_vlan.h> | ||
36 | #include <linux/ip.h> | ||
37 | #include <linux/delay.h> | ||
38 | #include <linux/crc32.h> | ||
39 | #include <linux/dma-mapping.h> | ||
40 | #include <asm/irq.h> | ||
41 | |||
42 | #include "skge.h" | ||
43 | |||
44 | #define DRV_NAME "skge" | ||
45 | #define DRV_VERSION "0.7" | ||
46 | #define PFX DRV_NAME " " | ||
47 | |||
48 | #define DEFAULT_TX_RING_SIZE 128 | ||
49 | #define DEFAULT_RX_RING_SIZE 512 | ||
50 | #define MAX_TX_RING_SIZE 1024 | ||
51 | #define MAX_RX_RING_SIZE 4096 | ||
52 | #define RX_COPY_THRESHOLD 128 | ||
53 | #define RX_BUF_SIZE 1536 | ||
54 | #define PHY_RETRIES 1000 | ||
55 | #define ETH_JUMBO_MTU 9000 | ||
56 | #define TX_WATCHDOG (5 * HZ) | ||
57 | #define NAPI_WEIGHT 64 | ||
58 | #define BLINK_HZ (HZ/4) | ||
59 | |||
60 | MODULE_DESCRIPTION("SysKonnect Gigabit Ethernet driver"); | ||
61 | MODULE_AUTHOR("Stephen Hemminger <shemminger@osdl.org>"); | ||
62 | MODULE_LICENSE("GPL"); | ||
63 | MODULE_VERSION(DRV_VERSION); | ||
64 | |||
65 | static const u32 default_msg | ||
66 | = NETIF_MSG_DRV| NETIF_MSG_PROBE| NETIF_MSG_LINK | ||
67 | | NETIF_MSG_IFUP| NETIF_MSG_IFDOWN; | ||
68 | |||
69 | static int debug = -1; /* defaults above */ | ||
70 | module_param(debug, int, 0); | ||
71 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | ||
72 | |||
73 | static const struct pci_device_id skge_id_table[] = { | ||
74 | { PCI_DEVICE(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C940) }, | ||
75 | { PCI_DEVICE(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C940B) }, | ||
76 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_GE) }, | ||
77 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_YU) }, | ||
78 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */ | ||
79 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, PCI_DEVICE_ID_DLINK_DGE510T), }, | ||
80 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4320) }, | ||
81 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x5005) }, /* Belkin */ | ||
82 | { PCI_DEVICE(PCI_VENDOR_ID_CNET, PCI_DEVICE_ID_CNET_GIGACARD) }, | ||
83 | { PCI_DEVICE(PCI_VENDOR_ID_LINKSYS, PCI_DEVICE_ID_LINKSYS_EG1032) }, | ||
84 | { PCI_DEVICE(PCI_VENDOR_ID_LINKSYS, PCI_DEVICE_ID_LINKSYS_EG1064) }, | ||
85 | { 0 } | ||
86 | }; | ||
87 | MODULE_DEVICE_TABLE(pci, skge_id_table); | ||
88 | |||
89 | static int skge_up(struct net_device *dev); | ||
90 | static int skge_down(struct net_device *dev); | ||
91 | static void skge_tx_clean(struct skge_port *skge); | ||
92 | static void xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val); | ||
93 | static void gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val); | ||
94 | static void genesis_get_stats(struct skge_port *skge, u64 *data); | ||
95 | static void yukon_get_stats(struct skge_port *skge, u64 *data); | ||
96 | static void yukon_init(struct skge_hw *hw, int port); | ||
97 | static void yukon_reset(struct skge_hw *hw, int port); | ||
98 | static void genesis_mac_init(struct skge_hw *hw, int port); | ||
99 | static void genesis_reset(struct skge_hw *hw, int port); | ||
100 | static void genesis_link_up(struct skge_port *skge); | ||
101 | |||
102 | /* Avoid conditionals by using array */ | ||
103 | static const int txqaddr[] = { Q_XA1, Q_XA2 }; | ||
104 | static const int rxqaddr[] = { Q_R1, Q_R2 }; | ||
105 | static const u32 rxirqmask[] = { IS_R1_F, IS_R2_F }; | ||
106 | static const u32 txirqmask[] = { IS_XA1_F, IS_XA2_F }; | ||
107 | static const u32 portirqmask[] = { IS_PORT_1, IS_PORT_2 }; | ||
108 | |||
109 | /* Don't need to look at whole 16K. | ||
110 | * last interesting register is descriptor poll timer. | ||
111 | */ | ||
112 | #define SKGE_REGS_LEN (29*128) | ||
113 | |||
114 | static int skge_get_regs_len(struct net_device *dev) | ||
115 | { | ||
116 | return SKGE_REGS_LEN; | ||
117 | } | ||
118 | |||
119 | /* | ||
120 | * Returns copy of control register region | ||
121 | * I/O region is divided into banks and certain regions are unreadable | ||
122 | */ | ||
123 | static void skge_get_regs(struct net_device *dev, struct ethtool_regs *regs, | ||
124 | void *p) | ||
125 | { | ||
126 | const struct skge_port *skge = netdev_priv(dev); | ||
127 | unsigned long offs; | ||
128 | const void __iomem *io = skge->hw->regs; | ||
129 | static const unsigned long bankmap | ||
130 | = (1<<0) | (1<<2) | (1<<8) | (1<<9) | ||
131 | | (1<<12) | (1<<13) | (1<<14) | (1<<15) | (1<<16) | ||
132 | | (1<<17) | (1<<20) | (1<<21) | (1<<22) | (1<<23) | ||
133 | | (1<<24) | (1<<25) | (1<<26) | (1<<27) | (1<<28); | ||
134 | |||
135 | regs->version = 1; | ||
136 | for (offs = 0; offs < regs->len; offs += 128) { | ||
137 | u32 len = min_t(u32, 128, regs->len - offs); | ||
138 | |||
139 | if (bankmap & (1<<(offs/128))) | ||
140 | memcpy_fromio(p + offs, io + offs, len); | ||
141 | else | ||
142 | memset(p + offs, 0, len); | ||
143 | } | ||
144 | } | ||
145 | |||
146 | /* Wake on Lan only supported on Yukon chps with rev 1 or above */ | ||
147 | static int wol_supported(const struct skge_hw *hw) | ||
148 | { | ||
149 | return !((hw->chip_id == CHIP_ID_GENESIS || | ||
150 | (hw->chip_id == CHIP_ID_YUKON && hw->chip_rev == 0))); | ||
151 | } | ||
152 | |||
153 | static void skge_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | ||
154 | { | ||
155 | struct skge_port *skge = netdev_priv(dev); | ||
156 | |||
157 | wol->supported = wol_supported(skge->hw) ? WAKE_MAGIC : 0; | ||
158 | wol->wolopts = skge->wol ? WAKE_MAGIC : 0; | ||
159 | } | ||
160 | |||
161 | static int skge_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | ||
162 | { | ||
163 | struct skge_port *skge = netdev_priv(dev); | ||
164 | struct skge_hw *hw = skge->hw; | ||
165 | |||
166 | if (wol->wolopts != WAKE_MAGIC && wol->wolopts != 0) | ||
167 | return -EOPNOTSUPP; | ||
168 | |||
169 | if (wol->wolopts == WAKE_MAGIC && !wol_supported(hw)) | ||
170 | return -EOPNOTSUPP; | ||
171 | |||
172 | skge->wol = wol->wolopts == WAKE_MAGIC; | ||
173 | |||
174 | if (skge->wol) { | ||
175 | memcpy_toio(hw->regs + WOL_MAC_ADDR, dev->dev_addr, ETH_ALEN); | ||
176 | |||
177 | skge_write16(hw, WOL_CTRL_STAT, | ||
178 | WOL_CTL_ENA_PME_ON_MAGIC_PKT | | ||
179 | WOL_CTL_ENA_MAGIC_PKT_UNIT); | ||
180 | } else | ||
181 | skge_write16(hw, WOL_CTRL_STAT, WOL_CTL_DEFAULT); | ||
182 | |||
183 | return 0; | ||
184 | } | ||
185 | |||
186 | /* Determine supported/adverised modes based on hardware. | ||
187 | * Note: ethtoool ADVERTISED_xxx == SUPPORTED_xxx | ||
188 | */ | ||
189 | static u32 skge_supported_modes(const struct skge_hw *hw) | ||
190 | { | ||
191 | u32 supported; | ||
192 | |||
193 | if (iscopper(hw)) { | ||
194 | supported = SUPPORTED_10baseT_Half | ||
195 | | SUPPORTED_10baseT_Full | ||
196 | | SUPPORTED_100baseT_Half | ||
197 | | SUPPORTED_100baseT_Full | ||
198 | | SUPPORTED_1000baseT_Half | ||
199 | | SUPPORTED_1000baseT_Full | ||
200 | | SUPPORTED_Autoneg| SUPPORTED_TP; | ||
201 | |||
202 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
203 | supported &= ~(SUPPORTED_10baseT_Half | ||
204 | | SUPPORTED_10baseT_Full | ||
205 | | SUPPORTED_100baseT_Half | ||
206 | | SUPPORTED_100baseT_Full); | ||
207 | |||
208 | else if (hw->chip_id == CHIP_ID_YUKON) | ||
209 | supported &= ~SUPPORTED_1000baseT_Half; | ||
210 | } else | ||
211 | supported = SUPPORTED_1000baseT_Full | SUPPORTED_FIBRE | ||
212 | | SUPPORTED_Autoneg; | ||
213 | |||
214 | return supported; | ||
215 | } | ||
216 | |||
217 | static int skge_get_settings(struct net_device *dev, | ||
218 | struct ethtool_cmd *ecmd) | ||
219 | { | ||
220 | struct skge_port *skge = netdev_priv(dev); | ||
221 | struct skge_hw *hw = skge->hw; | ||
222 | |||
223 | ecmd->transceiver = XCVR_INTERNAL; | ||
224 | ecmd->supported = skge_supported_modes(hw); | ||
225 | |||
226 | if (iscopper(hw)) { | ||
227 | ecmd->port = PORT_TP; | ||
228 | ecmd->phy_address = hw->phy_addr; | ||
229 | } else | ||
230 | ecmd->port = PORT_FIBRE; | ||
231 | |||
232 | ecmd->advertising = skge->advertising; | ||
233 | ecmd->autoneg = skge->autoneg; | ||
234 | ecmd->speed = skge->speed; | ||
235 | ecmd->duplex = skge->duplex; | ||
236 | return 0; | ||
237 | } | ||
238 | |||
239 | static int skge_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | ||
240 | { | ||
241 | struct skge_port *skge = netdev_priv(dev); | ||
242 | const struct skge_hw *hw = skge->hw; | ||
243 | u32 supported = skge_supported_modes(hw); | ||
244 | |||
245 | if (ecmd->autoneg == AUTONEG_ENABLE) { | ||
246 | ecmd->advertising = supported; | ||
247 | skge->duplex = -1; | ||
248 | skge->speed = -1; | ||
249 | } else { | ||
250 | u32 setting; | ||
251 | |||
252 | switch(ecmd->speed) { | ||
253 | case SPEED_1000: | ||
254 | if (ecmd->duplex == DUPLEX_FULL) | ||
255 | setting = SUPPORTED_1000baseT_Full; | ||
256 | else if (ecmd->duplex == DUPLEX_HALF) | ||
257 | setting = SUPPORTED_1000baseT_Half; | ||
258 | else | ||
259 | return -EINVAL; | ||
260 | break; | ||
261 | case SPEED_100: | ||
262 | if (ecmd->duplex == DUPLEX_FULL) | ||
263 | setting = SUPPORTED_100baseT_Full; | ||
264 | else if (ecmd->duplex == DUPLEX_HALF) | ||
265 | setting = SUPPORTED_100baseT_Half; | ||
266 | else | ||
267 | return -EINVAL; | ||
268 | break; | ||
269 | |||
270 | case SPEED_10: | ||
271 | if (ecmd->duplex == DUPLEX_FULL) | ||
272 | setting = SUPPORTED_10baseT_Full; | ||
273 | else if (ecmd->duplex == DUPLEX_HALF) | ||
274 | setting = SUPPORTED_10baseT_Half; | ||
275 | else | ||
276 | return -EINVAL; | ||
277 | break; | ||
278 | default: | ||
279 | return -EINVAL; | ||
280 | } | ||
281 | |||
282 | if ((setting & supported) == 0) | ||
283 | return -EINVAL; | ||
284 | |||
285 | skge->speed = ecmd->speed; | ||
286 | skge->duplex = ecmd->duplex; | ||
287 | } | ||
288 | |||
289 | skge->autoneg = ecmd->autoneg; | ||
290 | skge->advertising = ecmd->advertising; | ||
291 | |||
292 | if (netif_running(dev)) { | ||
293 | skge_down(dev); | ||
294 | skge_up(dev); | ||
295 | } | ||
296 | return (0); | ||
297 | } | ||
298 | |||
299 | static void skge_get_drvinfo(struct net_device *dev, | ||
300 | struct ethtool_drvinfo *info) | ||
301 | { | ||
302 | struct skge_port *skge = netdev_priv(dev); | ||
303 | |||
304 | strcpy(info->driver, DRV_NAME); | ||
305 | strcpy(info->version, DRV_VERSION); | ||
306 | strcpy(info->fw_version, "N/A"); | ||
307 | strcpy(info->bus_info, pci_name(skge->hw->pdev)); | ||
308 | } | ||
309 | |||
310 | static const struct skge_stat { | ||
311 | char name[ETH_GSTRING_LEN]; | ||
312 | u16 xmac_offset; | ||
313 | u16 gma_offset; | ||
314 | } skge_stats[] = { | ||
315 | { "tx_bytes", XM_TXO_OK_HI, GM_TXO_OK_HI }, | ||
316 | { "rx_bytes", XM_RXO_OK_HI, GM_RXO_OK_HI }, | ||
317 | |||
318 | { "tx_broadcast", XM_TXF_BC_OK, GM_TXF_BC_OK }, | ||
319 | { "rx_broadcast", XM_RXF_BC_OK, GM_RXF_BC_OK }, | ||
320 | { "tx_multicast", XM_TXF_MC_OK, GM_TXF_MC_OK }, | ||
321 | { "rx_multicast", XM_RXF_MC_OK, GM_RXF_MC_OK }, | ||
322 | { "tx_unicast", XM_TXF_UC_OK, GM_TXF_UC_OK }, | ||
323 | { "rx_unicast", XM_RXF_UC_OK, GM_RXF_UC_OK }, | ||
324 | { "tx_mac_pause", XM_TXF_MPAUSE, GM_TXF_MPAUSE }, | ||
325 | { "rx_mac_pause", XM_RXF_MPAUSE, GM_RXF_MPAUSE }, | ||
326 | |||
327 | { "collisions", XM_TXF_SNG_COL, GM_TXF_SNG_COL }, | ||
328 | { "multi_collisions", XM_TXF_MUL_COL, GM_TXF_MUL_COL }, | ||
329 | { "aborted", XM_TXF_ABO_COL, GM_TXF_ABO_COL }, | ||
330 | { "late_collision", XM_TXF_LAT_COL, GM_TXF_LAT_COL }, | ||
331 | { "fifo_underrun", XM_TXE_FIFO_UR, GM_TXE_FIFO_UR }, | ||
332 | { "fifo_overflow", XM_RXE_FIFO_OV, GM_RXE_FIFO_OV }, | ||
333 | |||
334 | { "rx_toolong", XM_RXF_LNG_ERR, GM_RXF_LNG_ERR }, | ||
335 | { "rx_jabber", XM_RXF_JAB_PKT, GM_RXF_JAB_PKT }, | ||
336 | { "rx_runt", XM_RXE_RUNT, GM_RXE_FRAG }, | ||
337 | { "rx_too_long", XM_RXF_LNG_ERR, GM_RXF_LNG_ERR }, | ||
338 | { "rx_fcs_error", XM_RXF_FCS_ERR, GM_RXF_FCS_ERR }, | ||
339 | }; | ||
340 | |||
341 | static int skge_get_stats_count(struct net_device *dev) | ||
342 | { | ||
343 | return ARRAY_SIZE(skge_stats); | ||
344 | } | ||
345 | |||
346 | static void skge_get_ethtool_stats(struct net_device *dev, | ||
347 | struct ethtool_stats *stats, u64 *data) | ||
348 | { | ||
349 | struct skge_port *skge = netdev_priv(dev); | ||
350 | |||
351 | if (skge->hw->chip_id == CHIP_ID_GENESIS) | ||
352 | genesis_get_stats(skge, data); | ||
353 | else | ||
354 | yukon_get_stats(skge, data); | ||
355 | } | ||
356 | |||
357 | /* Use hardware MIB variables for critical path statistics and | ||
358 | * transmit feedback not reported at interrupt. | ||
359 | * Other errors are accounted for in interrupt handler. | ||
360 | */ | ||
361 | static struct net_device_stats *skge_get_stats(struct net_device *dev) | ||
362 | { | ||
363 | struct skge_port *skge = netdev_priv(dev); | ||
364 | u64 data[ARRAY_SIZE(skge_stats)]; | ||
365 | |||
366 | if (skge->hw->chip_id == CHIP_ID_GENESIS) | ||
367 | genesis_get_stats(skge, data); | ||
368 | else | ||
369 | yukon_get_stats(skge, data); | ||
370 | |||
371 | skge->net_stats.tx_bytes = data[0]; | ||
372 | skge->net_stats.rx_bytes = data[1]; | ||
373 | skge->net_stats.tx_packets = data[2] + data[4] + data[6]; | ||
374 | skge->net_stats.rx_packets = data[3] + data[5] + data[7]; | ||
375 | skge->net_stats.multicast = data[5] + data[7]; | ||
376 | skge->net_stats.collisions = data[10]; | ||
377 | skge->net_stats.tx_aborted_errors = data[12]; | ||
378 | |||
379 | return &skge->net_stats; | ||
380 | } | ||
381 | |||
382 | static void skge_get_strings(struct net_device *dev, u32 stringset, u8 *data) | ||
383 | { | ||
384 | int i; | ||
385 | |||
386 | switch (stringset) { | ||
387 | case ETH_SS_STATS: | ||
388 | for (i = 0; i < ARRAY_SIZE(skge_stats); i++) | ||
389 | memcpy(data + i * ETH_GSTRING_LEN, | ||
390 | skge_stats[i].name, ETH_GSTRING_LEN); | ||
391 | break; | ||
392 | } | ||
393 | } | ||
394 | |||
395 | static void skge_get_ring_param(struct net_device *dev, | ||
396 | struct ethtool_ringparam *p) | ||
397 | { | ||
398 | struct skge_port *skge = netdev_priv(dev); | ||
399 | |||
400 | p->rx_max_pending = MAX_RX_RING_SIZE; | ||
401 | p->tx_max_pending = MAX_TX_RING_SIZE; | ||
402 | p->rx_mini_max_pending = 0; | ||
403 | p->rx_jumbo_max_pending = 0; | ||
404 | |||
405 | p->rx_pending = skge->rx_ring.count; | ||
406 | p->tx_pending = skge->tx_ring.count; | ||
407 | p->rx_mini_pending = 0; | ||
408 | p->rx_jumbo_pending = 0; | ||
409 | } | ||
410 | |||
411 | static int skge_set_ring_param(struct net_device *dev, | ||
412 | struct ethtool_ringparam *p) | ||
413 | { | ||
414 | struct skge_port *skge = netdev_priv(dev); | ||
415 | |||
416 | if (p->rx_pending == 0 || p->rx_pending > MAX_RX_RING_SIZE || | ||
417 | p->tx_pending == 0 || p->tx_pending > MAX_TX_RING_SIZE) | ||
418 | return -EINVAL; | ||
419 | |||
420 | skge->rx_ring.count = p->rx_pending; | ||
421 | skge->tx_ring.count = p->tx_pending; | ||
422 | |||
423 | if (netif_running(dev)) { | ||
424 | skge_down(dev); | ||
425 | skge_up(dev); | ||
426 | } | ||
427 | |||
428 | return 0; | ||
429 | } | ||
430 | |||
431 | static u32 skge_get_msglevel(struct net_device *netdev) | ||
432 | { | ||
433 | struct skge_port *skge = netdev_priv(netdev); | ||
434 | return skge->msg_enable; | ||
435 | } | ||
436 | |||
437 | static void skge_set_msglevel(struct net_device *netdev, u32 value) | ||
438 | { | ||
439 | struct skge_port *skge = netdev_priv(netdev); | ||
440 | skge->msg_enable = value; | ||
441 | } | ||
442 | |||
443 | static int skge_nway_reset(struct net_device *dev) | ||
444 | { | ||
445 | struct skge_port *skge = netdev_priv(dev); | ||
446 | struct skge_hw *hw = skge->hw; | ||
447 | int port = skge->port; | ||
448 | |||
449 | if (skge->autoneg != AUTONEG_ENABLE || !netif_running(dev)) | ||
450 | return -EINVAL; | ||
451 | |||
452 | spin_lock_bh(&hw->phy_lock); | ||
453 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
454 | genesis_reset(hw, port); | ||
455 | genesis_mac_init(hw, port); | ||
456 | } else { | ||
457 | yukon_reset(hw, port); | ||
458 | yukon_init(hw, port); | ||
459 | } | ||
460 | spin_unlock_bh(&hw->phy_lock); | ||
461 | return 0; | ||
462 | } | ||
463 | |||
464 | static int skge_set_sg(struct net_device *dev, u32 data) | ||
465 | { | ||
466 | struct skge_port *skge = netdev_priv(dev); | ||
467 | struct skge_hw *hw = skge->hw; | ||
468 | |||
469 | if (hw->chip_id == CHIP_ID_GENESIS && data) | ||
470 | return -EOPNOTSUPP; | ||
471 | return ethtool_op_set_sg(dev, data); | ||
472 | } | ||
473 | |||
474 | static int skge_set_tx_csum(struct net_device *dev, u32 data) | ||
475 | { | ||
476 | struct skge_port *skge = netdev_priv(dev); | ||
477 | struct skge_hw *hw = skge->hw; | ||
478 | |||
479 | if (hw->chip_id == CHIP_ID_GENESIS && data) | ||
480 | return -EOPNOTSUPP; | ||
481 | |||
482 | return ethtool_op_set_tx_csum(dev, data); | ||
483 | } | ||
484 | |||
485 | static u32 skge_get_rx_csum(struct net_device *dev) | ||
486 | { | ||
487 | struct skge_port *skge = netdev_priv(dev); | ||
488 | |||
489 | return skge->rx_csum; | ||
490 | } | ||
491 | |||
492 | /* Only Yukon supports checksum offload. */ | ||
493 | static int skge_set_rx_csum(struct net_device *dev, u32 data) | ||
494 | { | ||
495 | struct skge_port *skge = netdev_priv(dev); | ||
496 | |||
497 | if (skge->hw->chip_id == CHIP_ID_GENESIS && data) | ||
498 | return -EOPNOTSUPP; | ||
499 | |||
500 | skge->rx_csum = data; | ||
501 | return 0; | ||
502 | } | ||
503 | |||
504 | static void skge_get_pauseparam(struct net_device *dev, | ||
505 | struct ethtool_pauseparam *ecmd) | ||
506 | { | ||
507 | struct skge_port *skge = netdev_priv(dev); | ||
508 | |||
509 | ecmd->tx_pause = (skge->flow_control == FLOW_MODE_LOC_SEND) | ||
510 | || (skge->flow_control == FLOW_MODE_SYMMETRIC); | ||
511 | ecmd->rx_pause = (skge->flow_control == FLOW_MODE_REM_SEND) | ||
512 | || (skge->flow_control == FLOW_MODE_SYMMETRIC); | ||
513 | |||
514 | ecmd->autoneg = skge->autoneg; | ||
515 | } | ||
516 | |||
517 | static int skge_set_pauseparam(struct net_device *dev, | ||
518 | struct ethtool_pauseparam *ecmd) | ||
519 | { | ||
520 | struct skge_port *skge = netdev_priv(dev); | ||
521 | |||
522 | skge->autoneg = ecmd->autoneg; | ||
523 | if (ecmd->rx_pause && ecmd->tx_pause) | ||
524 | skge->flow_control = FLOW_MODE_SYMMETRIC; | ||
525 | else if (ecmd->rx_pause && !ecmd->tx_pause) | ||
526 | skge->flow_control = FLOW_MODE_REM_SEND; | ||
527 | else if (!ecmd->rx_pause && ecmd->tx_pause) | ||
528 | skge->flow_control = FLOW_MODE_LOC_SEND; | ||
529 | else | ||
530 | skge->flow_control = FLOW_MODE_NONE; | ||
531 | |||
532 | if (netif_running(dev)) { | ||
533 | skge_down(dev); | ||
534 | skge_up(dev); | ||
535 | } | ||
536 | return 0; | ||
537 | } | ||
538 | |||
539 | /* Chip internal frequency for clock calculations */ | ||
540 | static inline u32 hwkhz(const struct skge_hw *hw) | ||
541 | { | ||
542 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
543 | return 53215; /* or: 53.125 MHz */ | ||
544 | else | ||
545 | return 78215; /* or: 78.125 MHz */ | ||
546 | } | ||
547 | |||
548 | /* Chip hz to microseconds */ | ||
549 | static inline u32 skge_clk2usec(const struct skge_hw *hw, u32 ticks) | ||
550 | { | ||
551 | return (ticks * 1000) / hwkhz(hw); | ||
552 | } | ||
553 | |||
554 | /* Microseconds to chip hz */ | ||
555 | static inline u32 skge_usecs2clk(const struct skge_hw *hw, u32 usec) | ||
556 | { | ||
557 | return hwkhz(hw) * usec / 1000; | ||
558 | } | ||
559 | |||
560 | static int skge_get_coalesce(struct net_device *dev, | ||
561 | struct ethtool_coalesce *ecmd) | ||
562 | { | ||
563 | struct skge_port *skge = netdev_priv(dev); | ||
564 | struct skge_hw *hw = skge->hw; | ||
565 | int port = skge->port; | ||
566 | |||
567 | ecmd->rx_coalesce_usecs = 0; | ||
568 | ecmd->tx_coalesce_usecs = 0; | ||
569 | |||
570 | if (skge_read32(hw, B2_IRQM_CTRL) & TIM_START) { | ||
571 | u32 delay = skge_clk2usec(hw, skge_read32(hw, B2_IRQM_INI)); | ||
572 | u32 msk = skge_read32(hw, B2_IRQM_MSK); | ||
573 | |||
574 | if (msk & rxirqmask[port]) | ||
575 | ecmd->rx_coalesce_usecs = delay; | ||
576 | if (msk & txirqmask[port]) | ||
577 | ecmd->tx_coalesce_usecs = delay; | ||
578 | } | ||
579 | |||
580 | return 0; | ||
581 | } | ||
582 | |||
583 | /* Note: interrupt timer is per board, but can turn on/off per port */ | ||
584 | static int skge_set_coalesce(struct net_device *dev, | ||
585 | struct ethtool_coalesce *ecmd) | ||
586 | { | ||
587 | struct skge_port *skge = netdev_priv(dev); | ||
588 | struct skge_hw *hw = skge->hw; | ||
589 | int port = skge->port; | ||
590 | u32 msk = skge_read32(hw, B2_IRQM_MSK); | ||
591 | u32 delay = 25; | ||
592 | |||
593 | if (ecmd->rx_coalesce_usecs == 0) | ||
594 | msk &= ~rxirqmask[port]; | ||
595 | else if (ecmd->rx_coalesce_usecs < 25 || | ||
596 | ecmd->rx_coalesce_usecs > 33333) | ||
597 | return -EINVAL; | ||
598 | else { | ||
599 | msk |= rxirqmask[port]; | ||
600 | delay = ecmd->rx_coalesce_usecs; | ||
601 | } | ||
602 | |||
603 | if (ecmd->tx_coalesce_usecs == 0) | ||
604 | msk &= ~txirqmask[port]; | ||
605 | else if (ecmd->tx_coalesce_usecs < 25 || | ||
606 | ecmd->tx_coalesce_usecs > 33333) | ||
607 | return -EINVAL; | ||
608 | else { | ||
609 | msk |= txirqmask[port]; | ||
610 | delay = min(delay, ecmd->rx_coalesce_usecs); | ||
611 | } | ||
612 | |||
613 | skge_write32(hw, B2_IRQM_MSK, msk); | ||
614 | if (msk == 0) | ||
615 | skge_write32(hw, B2_IRQM_CTRL, TIM_STOP); | ||
616 | else { | ||
617 | skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, delay)); | ||
618 | skge_write32(hw, B2_IRQM_CTRL, TIM_START); | ||
619 | } | ||
620 | return 0; | ||
621 | } | ||
622 | |||
623 | static void skge_led_on(struct skge_hw *hw, int port) | ||
624 | { | ||
625 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
626 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); | ||
627 | skge_write8(hw, B0_LED, LED_STAT_ON); | ||
628 | |||
629 | skge_write8(hw, SK_REG(port, RX_LED_TST), LED_T_ON); | ||
630 | skge_write32(hw, SK_REG(port, RX_LED_VAL), 100); | ||
631 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); | ||
632 | |||
633 | /* For Broadcom Phy only */ | ||
634 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_ON); | ||
635 | } else { | ||
636 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); | ||
637 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | ||
638 | PHY_M_LED_MO_DUP(MO_LED_ON) | | ||
639 | PHY_M_LED_MO_10(MO_LED_ON) | | ||
640 | PHY_M_LED_MO_100(MO_LED_ON) | | ||
641 | PHY_M_LED_MO_1000(MO_LED_ON) | | ||
642 | PHY_M_LED_MO_RX(MO_LED_ON)); | ||
643 | } | ||
644 | } | ||
645 | |||
646 | static void skge_led_off(struct skge_hw *hw, int port) | ||
647 | { | ||
648 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
649 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); | ||
650 | skge_write8(hw, B0_LED, LED_STAT_OFF); | ||
651 | |||
652 | skge_write32(hw, SK_REG(port, RX_LED_VAL), 0); | ||
653 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_T_OFF); | ||
654 | |||
655 | /* Broadcom only */ | ||
656 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, PHY_B_PEC_LED_OFF); | ||
657 | } else { | ||
658 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, 0); | ||
659 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, | ||
660 | PHY_M_LED_MO_DUP(MO_LED_OFF) | | ||
661 | PHY_M_LED_MO_10(MO_LED_OFF) | | ||
662 | PHY_M_LED_MO_100(MO_LED_OFF) | | ||
663 | PHY_M_LED_MO_1000(MO_LED_OFF) | | ||
664 | PHY_M_LED_MO_RX(MO_LED_OFF)); | ||
665 | } | ||
666 | } | ||
667 | |||
668 | static void skge_blink_timer(unsigned long data) | ||
669 | { | ||
670 | struct skge_port *skge = (struct skge_port *) data; | ||
671 | struct skge_hw *hw = skge->hw; | ||
672 | unsigned long flags; | ||
673 | |||
674 | spin_lock_irqsave(&hw->phy_lock, flags); | ||
675 | if (skge->blink_on) | ||
676 | skge_led_on(hw, skge->port); | ||
677 | else | ||
678 | skge_led_off(hw, skge->port); | ||
679 | spin_unlock_irqrestore(&hw->phy_lock, flags); | ||
680 | |||
681 | skge->blink_on = !skge->blink_on; | ||
682 | mod_timer(&skge->led_blink, jiffies + BLINK_HZ); | ||
683 | } | ||
684 | |||
685 | /* blink LED's for finding board */ | ||
686 | static int skge_phys_id(struct net_device *dev, u32 data) | ||
687 | { | ||
688 | struct skge_port *skge = netdev_priv(dev); | ||
689 | |||
690 | if (!data || data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ)) | ||
691 | data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); | ||
692 | |||
693 | /* start blinking */ | ||
694 | skge->blink_on = 1; | ||
695 | mod_timer(&skge->led_blink, jiffies+1); | ||
696 | |||
697 | msleep_interruptible(data * 1000); | ||
698 | del_timer_sync(&skge->led_blink); | ||
699 | |||
700 | skge_led_off(skge->hw, skge->port); | ||
701 | |||
702 | return 0; | ||
703 | } | ||
704 | |||
705 | static struct ethtool_ops skge_ethtool_ops = { | ||
706 | .get_settings = skge_get_settings, | ||
707 | .set_settings = skge_set_settings, | ||
708 | .get_drvinfo = skge_get_drvinfo, | ||
709 | .get_regs_len = skge_get_regs_len, | ||
710 | .get_regs = skge_get_regs, | ||
711 | .get_wol = skge_get_wol, | ||
712 | .set_wol = skge_set_wol, | ||
713 | .get_msglevel = skge_get_msglevel, | ||
714 | .set_msglevel = skge_set_msglevel, | ||
715 | .nway_reset = skge_nway_reset, | ||
716 | .get_link = ethtool_op_get_link, | ||
717 | .get_ringparam = skge_get_ring_param, | ||
718 | .set_ringparam = skge_set_ring_param, | ||
719 | .get_pauseparam = skge_get_pauseparam, | ||
720 | .set_pauseparam = skge_set_pauseparam, | ||
721 | .get_coalesce = skge_get_coalesce, | ||
722 | .set_coalesce = skge_set_coalesce, | ||
723 | .get_sg = ethtool_op_get_sg, | ||
724 | .set_sg = skge_set_sg, | ||
725 | .get_tx_csum = ethtool_op_get_tx_csum, | ||
726 | .set_tx_csum = skge_set_tx_csum, | ||
727 | .get_rx_csum = skge_get_rx_csum, | ||
728 | .set_rx_csum = skge_set_rx_csum, | ||
729 | .get_strings = skge_get_strings, | ||
730 | .phys_id = skge_phys_id, | ||
731 | .get_stats_count = skge_get_stats_count, | ||
732 | .get_ethtool_stats = skge_get_ethtool_stats, | ||
733 | }; | ||
734 | |||
735 | /* | ||
736 | * Allocate ring elements and chain them together | ||
737 | * One-to-one association of board descriptors with ring elements | ||
738 | */ | ||
739 | static int skge_ring_alloc(struct skge_ring *ring, void *vaddr, u64 base) | ||
740 | { | ||
741 | struct skge_tx_desc *d; | ||
742 | struct skge_element *e; | ||
743 | int i; | ||
744 | |||
745 | ring->start = kmalloc(sizeof(*e)*ring->count, GFP_KERNEL); | ||
746 | if (!ring->start) | ||
747 | return -ENOMEM; | ||
748 | |||
749 | for (i = 0, e = ring->start, d = vaddr; i < ring->count; i++, e++, d++) { | ||
750 | e->desc = d; | ||
751 | e->skb = NULL; | ||
752 | if (i == ring->count - 1) { | ||
753 | e->next = ring->start; | ||
754 | d->next_offset = base; | ||
755 | } else { | ||
756 | e->next = e + 1; | ||
757 | d->next_offset = base + (i+1) * sizeof(*d); | ||
758 | } | ||
759 | } | ||
760 | ring->to_use = ring->to_clean = ring->start; | ||
761 | |||
762 | return 0; | ||
763 | } | ||
764 | |||
765 | static struct sk_buff *skge_rx_alloc(struct net_device *dev, unsigned int size) | ||
766 | { | ||
767 | struct sk_buff *skb = dev_alloc_skb(size); | ||
768 | |||
769 | if (likely(skb)) { | ||
770 | skb->dev = dev; | ||
771 | skb_reserve(skb, NET_IP_ALIGN); | ||
772 | } | ||
773 | return skb; | ||
774 | } | ||
775 | |||
776 | /* Allocate and setup a new buffer for receiving */ | ||
777 | static void skge_rx_setup(struct skge_port *skge, struct skge_element *e, | ||
778 | struct sk_buff *skb, unsigned int bufsize) | ||
779 | { | ||
780 | struct skge_rx_desc *rd = e->desc; | ||
781 | u64 map; | ||
782 | |||
783 | map = pci_map_single(skge->hw->pdev, skb->data, bufsize, | ||
784 | PCI_DMA_FROMDEVICE); | ||
785 | |||
786 | rd->dma_lo = map; | ||
787 | rd->dma_hi = map >> 32; | ||
788 | e->skb = skb; | ||
789 | rd->csum1_start = ETH_HLEN; | ||
790 | rd->csum2_start = ETH_HLEN; | ||
791 | rd->csum1 = 0; | ||
792 | rd->csum2 = 0; | ||
793 | |||
794 | wmb(); | ||
795 | |||
796 | rd->control = BMU_OWN | BMU_STF | BMU_IRQ_EOF | BMU_TCP_CHECK | bufsize; | ||
797 | pci_unmap_addr_set(e, mapaddr, map); | ||
798 | pci_unmap_len_set(e, maplen, bufsize); | ||
799 | } | ||
800 | |||
801 | /* Resume receiving using existing skb, | ||
802 | * Note: DMA address is not changed by chip. | ||
803 | * MTU not changed while receiver active. | ||
804 | */ | ||
805 | static void skge_rx_reuse(struct skge_element *e, unsigned int size) | ||
806 | { | ||
807 | struct skge_rx_desc *rd = e->desc; | ||
808 | |||
809 | rd->csum2 = 0; | ||
810 | rd->csum2_start = ETH_HLEN; | ||
811 | |||
812 | wmb(); | ||
813 | |||
814 | rd->control = BMU_OWN | BMU_STF | BMU_IRQ_EOF | BMU_TCP_CHECK | size; | ||
815 | } | ||
816 | |||
817 | |||
818 | /* Free all buffers in receive ring, assumes receiver stopped */ | ||
819 | static void skge_rx_clean(struct skge_port *skge) | ||
820 | { | ||
821 | struct skge_hw *hw = skge->hw; | ||
822 | struct skge_ring *ring = &skge->rx_ring; | ||
823 | struct skge_element *e; | ||
824 | |||
825 | e = ring->start; | ||
826 | do { | ||
827 | struct skge_rx_desc *rd = e->desc; | ||
828 | rd->control = 0; | ||
829 | if (e->skb) { | ||
830 | pci_unmap_single(hw->pdev, | ||
831 | pci_unmap_addr(e, mapaddr), | ||
832 | pci_unmap_len(e, maplen), | ||
833 | PCI_DMA_FROMDEVICE); | ||
834 | dev_kfree_skb(e->skb); | ||
835 | e->skb = NULL; | ||
836 | } | ||
837 | } while ((e = e->next) != ring->start); | ||
838 | } | ||
839 | |||
840 | |||
841 | /* Allocate buffers for receive ring | ||
842 | * For receive: to_clean is next received frame. | ||
843 | */ | ||
844 | static int skge_rx_fill(struct skge_port *skge) | ||
845 | { | ||
846 | struct skge_ring *ring = &skge->rx_ring; | ||
847 | struct skge_element *e; | ||
848 | unsigned int bufsize = skge->rx_buf_size; | ||
849 | |||
850 | e = ring->start; | ||
851 | do { | ||
852 | struct sk_buff *skb = skge_rx_alloc(skge->netdev, bufsize); | ||
853 | |||
854 | if (!skb) | ||
855 | return -ENOMEM; | ||
856 | |||
857 | skge_rx_setup(skge, e, skb, bufsize); | ||
858 | } while ( (e = e->next) != ring->start); | ||
859 | |||
860 | ring->to_clean = ring->start; | ||
861 | return 0; | ||
862 | } | ||
863 | |||
864 | static void skge_link_up(struct skge_port *skge) | ||
865 | { | ||
866 | netif_carrier_on(skge->netdev); | ||
867 | if (skge->tx_avail > MAX_SKB_FRAGS + 1) | ||
868 | netif_wake_queue(skge->netdev); | ||
869 | |||
870 | if (netif_msg_link(skge)) | ||
871 | printk(KERN_INFO PFX | ||
872 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", | ||
873 | skge->netdev->name, skge->speed, | ||
874 | skge->duplex == DUPLEX_FULL ? "full" : "half", | ||
875 | (skge->flow_control == FLOW_MODE_NONE) ? "none" : | ||
876 | (skge->flow_control == FLOW_MODE_LOC_SEND) ? "tx only" : | ||
877 | (skge->flow_control == FLOW_MODE_REM_SEND) ? "rx only" : | ||
878 | (skge->flow_control == FLOW_MODE_SYMMETRIC) ? "tx and rx" : | ||
879 | "unknown"); | ||
880 | } | ||
881 | |||
882 | static void skge_link_down(struct skge_port *skge) | ||
883 | { | ||
884 | netif_carrier_off(skge->netdev); | ||
885 | netif_stop_queue(skge->netdev); | ||
886 | |||
887 | if (netif_msg_link(skge)) | ||
888 | printk(KERN_INFO PFX "%s: Link is down.\n", skge->netdev->name); | ||
889 | } | ||
890 | |||
891 | static u16 xm_phy_read(struct skge_hw *hw, int port, u16 reg) | ||
892 | { | ||
893 | int i; | ||
894 | u16 v; | ||
895 | |||
896 | xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr); | ||
897 | v = xm_read16(hw, port, XM_PHY_DATA); | ||
898 | |||
899 | /* Need to wait for external PHY */ | ||
900 | for (i = 0; i < PHY_RETRIES; i++) { | ||
901 | udelay(1); | ||
902 | if (xm_read16(hw, port, XM_MMU_CMD) | ||
903 | & XM_MMU_PHY_RDY) | ||
904 | goto ready; | ||
905 | } | ||
906 | |||
907 | printk(KERN_WARNING PFX "%s: phy read timed out\n", | ||
908 | hw->dev[port]->name); | ||
909 | return 0; | ||
910 | ready: | ||
911 | v = xm_read16(hw, port, XM_PHY_DATA); | ||
912 | |||
913 | return v; | ||
914 | } | ||
915 | |||
916 | static void xm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val) | ||
917 | { | ||
918 | int i; | ||
919 | |||
920 | xm_write16(hw, port, XM_PHY_ADDR, reg | hw->phy_addr); | ||
921 | for (i = 0; i < PHY_RETRIES; i++) { | ||
922 | if (!(xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_BUSY)) | ||
923 | goto ready; | ||
924 | udelay(1); | ||
925 | } | ||
926 | printk(KERN_WARNING PFX "%s: phy write failed to come ready\n", | ||
927 | hw->dev[port]->name); | ||
928 | |||
929 | |||
930 | ready: | ||
931 | xm_write16(hw, port, XM_PHY_DATA, val); | ||
932 | for (i = 0; i < PHY_RETRIES; i++) { | ||
933 | udelay(1); | ||
934 | if (!(xm_read16(hw, port, XM_MMU_CMD) & XM_MMU_PHY_BUSY)) | ||
935 | return; | ||
936 | } | ||
937 | printk(KERN_WARNING PFX "%s: phy write timed out\n", | ||
938 | hw->dev[port]->name); | ||
939 | } | ||
940 | |||
941 | static void genesis_init(struct skge_hw *hw) | ||
942 | { | ||
943 | /* set blink source counter */ | ||
944 | skge_write32(hw, B2_BSC_INI, (SK_BLK_DUR * SK_FACT_53) / 100); | ||
945 | skge_write8(hw, B2_BSC_CTRL, BSC_START); | ||
946 | |||
947 | /* configure mac arbiter */ | ||
948 | skge_write16(hw, B3_MA_TO_CTRL, MA_RST_CLR); | ||
949 | |||
950 | /* configure mac arbiter timeout values */ | ||
951 | skge_write8(hw, B3_MA_TOINI_RX1, SK_MAC_TO_53); | ||
952 | skge_write8(hw, B3_MA_TOINI_RX2, SK_MAC_TO_53); | ||
953 | skge_write8(hw, B3_MA_TOINI_TX1, SK_MAC_TO_53); | ||
954 | skge_write8(hw, B3_MA_TOINI_TX2, SK_MAC_TO_53); | ||
955 | |||
956 | skge_write8(hw, B3_MA_RCINI_RX1, 0); | ||
957 | skge_write8(hw, B3_MA_RCINI_RX2, 0); | ||
958 | skge_write8(hw, B3_MA_RCINI_TX1, 0); | ||
959 | skge_write8(hw, B3_MA_RCINI_TX2, 0); | ||
960 | |||
961 | /* configure packet arbiter timeout */ | ||
962 | skge_write16(hw, B3_PA_CTRL, PA_RST_CLR); | ||
963 | skge_write16(hw, B3_PA_TOINI_RX1, SK_PKT_TO_MAX); | ||
964 | skge_write16(hw, B3_PA_TOINI_TX1, SK_PKT_TO_MAX); | ||
965 | skge_write16(hw, B3_PA_TOINI_RX2, SK_PKT_TO_MAX); | ||
966 | skge_write16(hw, B3_PA_TOINI_TX2, SK_PKT_TO_MAX); | ||
967 | } | ||
968 | |||
969 | static void genesis_reset(struct skge_hw *hw, int port) | ||
970 | { | ||
971 | const u8 zero[8] = { 0 }; | ||
972 | |||
973 | /* reset the statistics module */ | ||
974 | xm_write32(hw, port, XM_GP_PORT, XM_GP_RES_STAT); | ||
975 | xm_write16(hw, port, XM_IMSK, 0xffff); /* disable XMAC IRQs */ | ||
976 | xm_write32(hw, port, XM_MODE, 0); /* clear Mode Reg */ | ||
977 | xm_write16(hw, port, XM_TX_CMD, 0); /* reset TX CMD Reg */ | ||
978 | xm_write16(hw, port, XM_RX_CMD, 0); /* reset RX CMD Reg */ | ||
979 | |||
980 | /* disable Broadcom PHY IRQ */ | ||
981 | xm_write16(hw, port, PHY_BCOM_INT_MASK, 0xffff); | ||
982 | |||
983 | xm_outhash(hw, port, XM_HSM, zero); | ||
984 | } | ||
985 | |||
986 | |||
987 | /* Convert mode to MII values */ | ||
988 | static const u16 phy_pause_map[] = { | ||
989 | [FLOW_MODE_NONE] = 0, | ||
990 | [FLOW_MODE_LOC_SEND] = PHY_AN_PAUSE_ASYM, | ||
991 | [FLOW_MODE_SYMMETRIC] = PHY_AN_PAUSE_CAP, | ||
992 | [FLOW_MODE_REM_SEND] = PHY_AN_PAUSE_CAP | PHY_AN_PAUSE_ASYM, | ||
993 | }; | ||
994 | |||
995 | |||
996 | /* Check status of Broadcom phy link */ | ||
997 | static void bcom_check_link(struct skge_hw *hw, int port) | ||
998 | { | ||
999 | struct net_device *dev = hw->dev[port]; | ||
1000 | struct skge_port *skge = netdev_priv(dev); | ||
1001 | u16 status; | ||
1002 | |||
1003 | /* read twice because of latch */ | ||
1004 | (void) xm_phy_read(hw, port, PHY_BCOM_STAT); | ||
1005 | status = xm_phy_read(hw, port, PHY_BCOM_STAT); | ||
1006 | |||
1007 | pr_debug("bcom_check_link status=0x%x\n", status); | ||
1008 | |||
1009 | if ((status & PHY_ST_LSYNC) == 0) { | ||
1010 | u16 cmd = xm_read16(hw, port, XM_MMU_CMD); | ||
1011 | cmd &= ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
1012 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
1013 | /* dummy read to ensure writing */ | ||
1014 | (void) xm_read16(hw, port, XM_MMU_CMD); | ||
1015 | |||
1016 | if (netif_carrier_ok(dev)) | ||
1017 | skge_link_down(skge); | ||
1018 | } else { | ||
1019 | if (skge->autoneg == AUTONEG_ENABLE && | ||
1020 | (status & PHY_ST_AN_OVER)) { | ||
1021 | u16 lpa = xm_phy_read(hw, port, PHY_BCOM_AUNE_LP); | ||
1022 | u16 aux = xm_phy_read(hw, port, PHY_BCOM_AUX_STAT); | ||
1023 | |||
1024 | if (lpa & PHY_B_AN_RF) { | ||
1025 | printk(KERN_NOTICE PFX "%s: remote fault\n", | ||
1026 | dev->name); | ||
1027 | return; | ||
1028 | } | ||
1029 | |||
1030 | /* Check Duplex mismatch */ | ||
1031 | switch(aux & PHY_B_AS_AN_RES_MSK) { | ||
1032 | case PHY_B_RES_1000FD: | ||
1033 | skge->duplex = DUPLEX_FULL; | ||
1034 | break; | ||
1035 | case PHY_B_RES_1000HD: | ||
1036 | skge->duplex = DUPLEX_HALF; | ||
1037 | break; | ||
1038 | default: | ||
1039 | printk(KERN_NOTICE PFX "%s: duplex mismatch\n", | ||
1040 | dev->name); | ||
1041 | return; | ||
1042 | } | ||
1043 | |||
1044 | |||
1045 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ | ||
1046 | switch (aux & PHY_B_AS_PAUSE_MSK) { | ||
1047 | case PHY_B_AS_PAUSE_MSK: | ||
1048 | skge->flow_control = FLOW_MODE_SYMMETRIC; | ||
1049 | break; | ||
1050 | case PHY_B_AS_PRR: | ||
1051 | skge->flow_control = FLOW_MODE_REM_SEND; | ||
1052 | break; | ||
1053 | case PHY_B_AS_PRT: | ||
1054 | skge->flow_control = FLOW_MODE_LOC_SEND; | ||
1055 | break; | ||
1056 | default: | ||
1057 | skge->flow_control = FLOW_MODE_NONE; | ||
1058 | } | ||
1059 | |||
1060 | skge->speed = SPEED_1000; | ||
1061 | } | ||
1062 | |||
1063 | if (!netif_carrier_ok(dev)) | ||
1064 | genesis_link_up(skge); | ||
1065 | } | ||
1066 | } | ||
1067 | |||
1068 | /* Broadcom 5400 only supports giagabit! SysKonnect did not put an additional | ||
1069 | * Phy on for 100 or 10Mbit operation | ||
1070 | */ | ||
1071 | static void bcom_phy_init(struct skge_port *skge, int jumbo) | ||
1072 | { | ||
1073 | struct skge_hw *hw = skge->hw; | ||
1074 | int port = skge->port; | ||
1075 | int i; | ||
1076 | u16 id1, r, ext, ctl; | ||
1077 | |||
1078 | /* magic workaround patterns for Broadcom */ | ||
1079 | static const struct { | ||
1080 | u16 reg; | ||
1081 | u16 val; | ||
1082 | } A1hack[] = { | ||
1083 | { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, | ||
1084 | { 0x17, 0x0013 }, { 0x15, 0x0404 }, { 0x17, 0x8006 }, | ||
1085 | { 0x15, 0x0132 }, { 0x17, 0x8006 }, { 0x15, 0x0232 }, | ||
1086 | { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 }, | ||
1087 | }, C0hack[] = { | ||
1088 | { 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, | ||
1089 | { 0x17, 0x0013 }, { 0x15, 0x0A04 }, { 0x18, 0x0420 }, | ||
1090 | }; | ||
1091 | |||
1092 | pr_debug("bcom_phy_init\n"); | ||
1093 | |||
1094 | /* read Id from external PHY (all have the same address) */ | ||
1095 | id1 = xm_phy_read(hw, port, PHY_XMAC_ID1); | ||
1096 | |||
1097 | /* Optimize MDIO transfer by suppressing preamble. */ | ||
1098 | r = xm_read16(hw, port, XM_MMU_CMD); | ||
1099 | r |= XM_MMU_NO_PRE; | ||
1100 | xm_write16(hw, port, XM_MMU_CMD,r); | ||
1101 | |||
1102 | switch(id1) { | ||
1103 | case PHY_BCOM_ID1_C0: | ||
1104 | /* | ||
1105 | * Workaround BCOM Errata for the C0 type. | ||
1106 | * Write magic patterns to reserved registers. | ||
1107 | */ | ||
1108 | for (i = 0; i < ARRAY_SIZE(C0hack); i++) | ||
1109 | xm_phy_write(hw, port, | ||
1110 | C0hack[i].reg, C0hack[i].val); | ||
1111 | |||
1112 | break; | ||
1113 | case PHY_BCOM_ID1_A1: | ||
1114 | /* | ||
1115 | * Workaround BCOM Errata for the A1 type. | ||
1116 | * Write magic patterns to reserved registers. | ||
1117 | */ | ||
1118 | for (i = 0; i < ARRAY_SIZE(A1hack); i++) | ||
1119 | xm_phy_write(hw, port, | ||
1120 | A1hack[i].reg, A1hack[i].val); | ||
1121 | break; | ||
1122 | } | ||
1123 | |||
1124 | /* | ||
1125 | * Workaround BCOM Errata (#10523) for all BCom PHYs. | ||
1126 | * Disable Power Management after reset. | ||
1127 | */ | ||
1128 | r = xm_phy_read(hw, port, PHY_BCOM_AUX_CTRL); | ||
1129 | r |= PHY_B_AC_DIS_PM; | ||
1130 | xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL, r); | ||
1131 | |||
1132 | /* Dummy read */ | ||
1133 | xm_read16(hw, port, XM_ISRC); | ||
1134 | |||
1135 | ext = PHY_B_PEC_EN_LTR; /* enable tx led */ | ||
1136 | ctl = PHY_CT_SP1000; /* always 1000mbit */ | ||
1137 | |||
1138 | if (skge->autoneg == AUTONEG_ENABLE) { | ||
1139 | /* | ||
1140 | * Workaround BCOM Errata #1 for the C5 type. | ||
1141 | * 1000Base-T Link Acquisition Failure in Slave Mode | ||
1142 | * Set Repeater/DTE bit 10 of the 1000Base-T Control Register | ||
1143 | */ | ||
1144 | u16 adv = PHY_B_1000C_RD; | ||
1145 | if (skge->advertising & ADVERTISED_1000baseT_Half) | ||
1146 | adv |= PHY_B_1000C_AHD; | ||
1147 | if (skge->advertising & ADVERTISED_1000baseT_Full) | ||
1148 | adv |= PHY_B_1000C_AFD; | ||
1149 | xm_phy_write(hw, port, PHY_BCOM_1000T_CTRL, adv); | ||
1150 | |||
1151 | ctl |= PHY_CT_ANE | PHY_CT_RE_CFG; | ||
1152 | } else { | ||
1153 | if (skge->duplex == DUPLEX_FULL) | ||
1154 | ctl |= PHY_CT_DUP_MD; | ||
1155 | /* Force to slave */ | ||
1156 | xm_phy_write(hw, port, PHY_BCOM_1000T_CTRL, PHY_B_1000C_MSE); | ||
1157 | } | ||
1158 | |||
1159 | /* Set autonegotiation pause parameters */ | ||
1160 | xm_phy_write(hw, port, PHY_BCOM_AUNE_ADV, | ||
1161 | phy_pause_map[skge->flow_control] | PHY_AN_CSMA); | ||
1162 | |||
1163 | /* Handle Jumbo frames */ | ||
1164 | if (jumbo) { | ||
1165 | xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL, | ||
1166 | PHY_B_AC_TX_TST | PHY_B_AC_LONG_PACK); | ||
1167 | |||
1168 | ext |= PHY_B_PEC_HIGH_LA; | ||
1169 | |||
1170 | } | ||
1171 | |||
1172 | xm_phy_write(hw, port, PHY_BCOM_P_EXT_CTRL, ext); | ||
1173 | xm_phy_write(hw, port, PHY_BCOM_CTRL, ctl); | ||
1174 | |||
1175 | /* Use link status change interrrupt */ | ||
1176 | xm_phy_write(hw, port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK); | ||
1177 | |||
1178 | bcom_check_link(hw, port); | ||
1179 | } | ||
1180 | |||
1181 | static void genesis_mac_init(struct skge_hw *hw, int port) | ||
1182 | { | ||
1183 | struct net_device *dev = hw->dev[port]; | ||
1184 | struct skge_port *skge = netdev_priv(dev); | ||
1185 | int jumbo = hw->dev[port]->mtu > ETH_DATA_LEN; | ||
1186 | int i; | ||
1187 | u32 r; | ||
1188 | const u8 zero[6] = { 0 }; | ||
1189 | |||
1190 | /* Clear MIB counters */ | ||
1191 | xm_write16(hw, port, XM_STAT_CMD, | ||
1192 | XM_SC_CLR_RXC | XM_SC_CLR_TXC); | ||
1193 | /* Clear two times according to Errata #3 */ | ||
1194 | xm_write16(hw, port, XM_STAT_CMD, | ||
1195 | XM_SC_CLR_RXC | XM_SC_CLR_TXC); | ||
1196 | |||
1197 | /* initialize Rx, Tx and Link LED */ | ||
1198 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_ON); | ||
1199 | skge_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_LINKSYNC_ON); | ||
1200 | |||
1201 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_START); | ||
1202 | skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_START); | ||
1203 | |||
1204 | /* Unreset the XMAC. */ | ||
1205 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_CLR_MAC_RST); | ||
1206 | |||
1207 | /* | ||
1208 | * Perform additional initialization for external PHYs, | ||
1209 | * namely for the 1000baseTX cards that use the XMAC's | ||
1210 | * GMII mode. | ||
1211 | */ | ||
1212 | spin_lock_bh(&hw->phy_lock); | ||
1213 | /* Take external Phy out of reset */ | ||
1214 | r = skge_read32(hw, B2_GP_IO); | ||
1215 | if (port == 0) | ||
1216 | r |= GP_DIR_0|GP_IO_0; | ||
1217 | else | ||
1218 | r |= GP_DIR_2|GP_IO_2; | ||
1219 | |||
1220 | skge_write32(hw, B2_GP_IO, r); | ||
1221 | skge_read32(hw, B2_GP_IO); | ||
1222 | spin_unlock_bh(&hw->phy_lock); | ||
1223 | |||
1224 | /* Enable GMII interfac */ | ||
1225 | xm_write16(hw, port, XM_HW_CFG, XM_HW_GMII_MD); | ||
1226 | |||
1227 | bcom_phy_init(skge, jumbo); | ||
1228 | |||
1229 | /* Set Station Address */ | ||
1230 | xm_outaddr(hw, port, XM_SA, dev->dev_addr); | ||
1231 | |||
1232 | /* We don't use match addresses so clear */ | ||
1233 | for (i = 1; i < 16; i++) | ||
1234 | xm_outaddr(hw, port, XM_EXM(i), zero); | ||
1235 | |||
1236 | /* configure Rx High Water Mark (XM_RX_HI_WM) */ | ||
1237 | xm_write16(hw, port, XM_RX_HI_WM, 1450); | ||
1238 | |||
1239 | /* We don't need the FCS appended to the packet. */ | ||
1240 | r = XM_RX_LENERR_OK | XM_RX_STRIP_FCS; | ||
1241 | if (jumbo) | ||
1242 | r |= XM_RX_BIG_PK_OK; | ||
1243 | |||
1244 | if (skge->duplex == DUPLEX_HALF) { | ||
1245 | /* | ||
1246 | * If in manual half duplex mode the other side might be in | ||
1247 | * full duplex mode, so ignore if a carrier extension is not seen | ||
1248 | * on frames received | ||
1249 | */ | ||
1250 | r |= XM_RX_DIS_CEXT; | ||
1251 | } | ||
1252 | xm_write16(hw, port, XM_RX_CMD, r); | ||
1253 | |||
1254 | |||
1255 | /* We want short frames padded to 60 bytes. */ | ||
1256 | xm_write16(hw, port, XM_TX_CMD, XM_TX_AUTO_PAD); | ||
1257 | |||
1258 | /* | ||
1259 | * Bump up the transmit threshold. This helps hold off transmit | ||
1260 | * underruns when we're blasting traffic from both ports at once. | ||
1261 | */ | ||
1262 | xm_write16(hw, port, XM_TX_THR, 512); | ||
1263 | |||
1264 | /* | ||
1265 | * Enable the reception of all error frames. This is is | ||
1266 | * a necessary evil due to the design of the XMAC. The | ||
1267 | * XMAC's receive FIFO is only 8K in size, however jumbo | ||
1268 | * frames can be up to 9000 bytes in length. When bad | ||
1269 | * frame filtering is enabled, the XMAC's RX FIFO operates | ||
1270 | * in 'store and forward' mode. For this to work, the | ||
1271 | * entire frame has to fit into the FIFO, but that means | ||
1272 | * that jumbo frames larger than 8192 bytes will be | ||
1273 | * truncated. Disabling all bad frame filtering causes | ||
1274 | * the RX FIFO to operate in streaming mode, in which | ||
1275 | * case the XMAC will start transfering frames out of the | ||
1276 | * RX FIFO as soon as the FIFO threshold is reached. | ||
1277 | */ | ||
1278 | xm_write32(hw, port, XM_MODE, XM_DEF_MODE); | ||
1279 | |||
1280 | |||
1281 | /* | ||
1282 | * Initialize the Receive Counter Event Mask (XM_RX_EV_MSK) | ||
1283 | * - Enable all bits excepting 'Octets Rx OK Low CntOv' | ||
1284 | * and 'Octets Rx OK Hi Cnt Ov'. | ||
1285 | */ | ||
1286 | xm_write32(hw, port, XM_RX_EV_MSK, XMR_DEF_MSK); | ||
1287 | |||
1288 | /* | ||
1289 | * Initialize the Transmit Counter Event Mask (XM_TX_EV_MSK) | ||
1290 | * - Enable all bits excepting 'Octets Tx OK Low CntOv' | ||
1291 | * and 'Octets Tx OK Hi Cnt Ov'. | ||
1292 | */ | ||
1293 | xm_write32(hw, port, XM_TX_EV_MSK, XMT_DEF_MSK); | ||
1294 | |||
1295 | /* Configure MAC arbiter */ | ||
1296 | skge_write16(hw, B3_MA_TO_CTRL, MA_RST_CLR); | ||
1297 | |||
1298 | /* configure timeout values */ | ||
1299 | skge_write8(hw, B3_MA_TOINI_RX1, 72); | ||
1300 | skge_write8(hw, B3_MA_TOINI_RX2, 72); | ||
1301 | skge_write8(hw, B3_MA_TOINI_TX1, 72); | ||
1302 | skge_write8(hw, B3_MA_TOINI_TX2, 72); | ||
1303 | |||
1304 | skge_write8(hw, B3_MA_RCINI_RX1, 0); | ||
1305 | skge_write8(hw, B3_MA_RCINI_RX2, 0); | ||
1306 | skge_write8(hw, B3_MA_RCINI_TX1, 0); | ||
1307 | skge_write8(hw, B3_MA_RCINI_TX2, 0); | ||
1308 | |||
1309 | /* Configure Rx MAC FIFO */ | ||
1310 | skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_CLR); | ||
1311 | skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_ENA_TIM_PAT); | ||
1312 | skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_ENA_OP_MD); | ||
1313 | |||
1314 | /* Configure Tx MAC FIFO */ | ||
1315 | skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_CLR); | ||
1316 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_TX_CTRL_DEF); | ||
1317 | skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_ENA_OP_MD); | ||
1318 | |||
1319 | if (jumbo) { | ||
1320 | /* Enable frame flushing if jumbo frames used */ | ||
1321 | skge_write16(hw, SK_REG(port,RX_MFF_CTRL1), MFF_ENA_FLUSH); | ||
1322 | } else { | ||
1323 | /* enable timeout timers if normal frames */ | ||
1324 | skge_write16(hw, B3_PA_CTRL, | ||
1325 | (port == 0) ? PA_ENA_TO_TX1 : PA_ENA_TO_TX2); | ||
1326 | } | ||
1327 | } | ||
1328 | |||
1329 | static void genesis_stop(struct skge_port *skge) | ||
1330 | { | ||
1331 | struct skge_hw *hw = skge->hw; | ||
1332 | int port = skge->port; | ||
1333 | u32 reg; | ||
1334 | |||
1335 | /* Clear Tx packet arbiter timeout IRQ */ | ||
1336 | skge_write16(hw, B3_PA_CTRL, | ||
1337 | port == 0 ? PA_CLR_TO_TX1 : PA_CLR_TO_TX2); | ||
1338 | |||
1339 | /* | ||
1340 | * If the transfer stucks at the MAC the STOP command will not | ||
1341 | * terminate if we don't flush the XMAC's transmit FIFO ! | ||
1342 | */ | ||
1343 | xm_write32(hw, port, XM_MODE, | ||
1344 | xm_read32(hw, port, XM_MODE)|XM_MD_FTF); | ||
1345 | |||
1346 | |||
1347 | /* Reset the MAC */ | ||
1348 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), MFF_SET_MAC_RST); | ||
1349 | |||
1350 | /* For external PHYs there must be special handling */ | ||
1351 | reg = skge_read32(hw, B2_GP_IO); | ||
1352 | if (port == 0) { | ||
1353 | reg |= GP_DIR_0; | ||
1354 | reg &= ~GP_IO_0; | ||
1355 | } else { | ||
1356 | reg |= GP_DIR_2; | ||
1357 | reg &= ~GP_IO_2; | ||
1358 | } | ||
1359 | skge_write32(hw, B2_GP_IO, reg); | ||
1360 | skge_read32(hw, B2_GP_IO); | ||
1361 | |||
1362 | xm_write16(hw, port, XM_MMU_CMD, | ||
1363 | xm_read16(hw, port, XM_MMU_CMD) | ||
1364 | & ~(XM_MMU_ENA_RX | XM_MMU_ENA_TX)); | ||
1365 | |||
1366 | xm_read16(hw, port, XM_MMU_CMD); | ||
1367 | } | ||
1368 | |||
1369 | |||
1370 | static void genesis_get_stats(struct skge_port *skge, u64 *data) | ||
1371 | { | ||
1372 | struct skge_hw *hw = skge->hw; | ||
1373 | int port = skge->port; | ||
1374 | int i; | ||
1375 | unsigned long timeout = jiffies + HZ; | ||
1376 | |||
1377 | xm_write16(hw, port, | ||
1378 | XM_STAT_CMD, XM_SC_SNP_TXC | XM_SC_SNP_RXC); | ||
1379 | |||
1380 | /* wait for update to complete */ | ||
1381 | while (xm_read16(hw, port, XM_STAT_CMD) | ||
1382 | & (XM_SC_SNP_TXC | XM_SC_SNP_RXC)) { | ||
1383 | if (time_after(jiffies, timeout)) | ||
1384 | break; | ||
1385 | udelay(10); | ||
1386 | } | ||
1387 | |||
1388 | /* special case for 64 bit octet counter */ | ||
1389 | data[0] = (u64) xm_read32(hw, port, XM_TXO_OK_HI) << 32 | ||
1390 | | xm_read32(hw, port, XM_TXO_OK_LO); | ||
1391 | data[1] = (u64) xm_read32(hw, port, XM_RXO_OK_HI) << 32 | ||
1392 | | xm_read32(hw, port, XM_RXO_OK_LO); | ||
1393 | |||
1394 | for (i = 2; i < ARRAY_SIZE(skge_stats); i++) | ||
1395 | data[i] = xm_read32(hw, port, skge_stats[i].xmac_offset); | ||
1396 | } | ||
1397 | |||
1398 | static void genesis_mac_intr(struct skge_hw *hw, int port) | ||
1399 | { | ||
1400 | struct skge_port *skge = netdev_priv(hw->dev[port]); | ||
1401 | u16 status = xm_read16(hw, port, XM_ISRC); | ||
1402 | |||
1403 | if (netif_msg_intr(skge)) | ||
1404 | printk(KERN_DEBUG PFX "%s: mac interrupt status 0x%x\n", | ||
1405 | skge->netdev->name, status); | ||
1406 | |||
1407 | if (status & XM_IS_TXF_UR) { | ||
1408 | xm_write32(hw, port, XM_MODE, XM_MD_FTF); | ||
1409 | ++skge->net_stats.tx_fifo_errors; | ||
1410 | } | ||
1411 | if (status & XM_IS_RXF_OV) { | ||
1412 | xm_write32(hw, port, XM_MODE, XM_MD_FRF); | ||
1413 | ++skge->net_stats.rx_fifo_errors; | ||
1414 | } | ||
1415 | } | ||
1416 | |||
1417 | static void gm_phy_write(struct skge_hw *hw, int port, u16 reg, u16 val) | ||
1418 | { | ||
1419 | int i; | ||
1420 | |||
1421 | gma_write16(hw, port, GM_SMI_DATA, val); | ||
1422 | gma_write16(hw, port, GM_SMI_CTRL, | ||
1423 | GM_SMI_CT_PHY_AD(hw->phy_addr) | GM_SMI_CT_REG_AD(reg)); | ||
1424 | for (i = 0; i < PHY_RETRIES; i++) { | ||
1425 | udelay(1); | ||
1426 | |||
1427 | if (!(gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_BUSY)) | ||
1428 | break; | ||
1429 | } | ||
1430 | } | ||
1431 | |||
1432 | static u16 gm_phy_read(struct skge_hw *hw, int port, u16 reg) | ||
1433 | { | ||
1434 | int i; | ||
1435 | |||
1436 | gma_write16(hw, port, GM_SMI_CTRL, | ||
1437 | GM_SMI_CT_PHY_AD(hw->phy_addr) | ||
1438 | | GM_SMI_CT_REG_AD(reg) | GM_SMI_CT_OP_RD); | ||
1439 | |||
1440 | for (i = 0; i < PHY_RETRIES; i++) { | ||
1441 | udelay(1); | ||
1442 | if (gma_read16(hw, port, GM_SMI_CTRL) & GM_SMI_CT_RD_VAL) | ||
1443 | goto ready; | ||
1444 | } | ||
1445 | |||
1446 | printk(KERN_WARNING PFX "%s: phy read timeout\n", | ||
1447 | hw->dev[port]->name); | ||
1448 | return 0; | ||
1449 | ready: | ||
1450 | return gma_read16(hw, port, GM_SMI_DATA); | ||
1451 | } | ||
1452 | |||
1453 | static void genesis_link_up(struct skge_port *skge) | ||
1454 | { | ||
1455 | struct skge_hw *hw = skge->hw; | ||
1456 | int port = skge->port; | ||
1457 | u16 cmd; | ||
1458 | u32 mode, msk; | ||
1459 | |||
1460 | pr_debug("genesis_link_up\n"); | ||
1461 | cmd = xm_read16(hw, port, XM_MMU_CMD); | ||
1462 | |||
1463 | /* | ||
1464 | * enabling pause frame reception is required for 1000BT | ||
1465 | * because the XMAC is not reset if the link is going down | ||
1466 | */ | ||
1467 | if (skge->flow_control == FLOW_MODE_NONE || | ||
1468 | skge->flow_control == FLOW_MODE_LOC_SEND) | ||
1469 | /* Disable Pause Frame Reception */ | ||
1470 | cmd |= XM_MMU_IGN_PF; | ||
1471 | else | ||
1472 | /* Enable Pause Frame Reception */ | ||
1473 | cmd &= ~XM_MMU_IGN_PF; | ||
1474 | |||
1475 | xm_write16(hw, port, XM_MMU_CMD, cmd); | ||
1476 | |||
1477 | mode = xm_read32(hw, port, XM_MODE); | ||
1478 | if (skge->flow_control == FLOW_MODE_SYMMETRIC || | ||
1479 | skge->flow_control == FLOW_MODE_LOC_SEND) { | ||
1480 | /* | ||
1481 | * Configure Pause Frame Generation | ||
1482 | * Use internal and external Pause Frame Generation. | ||
1483 | * Sending pause frames is edge triggered. | ||
1484 | * Send a Pause frame with the maximum pause time if | ||
1485 | * internal oder external FIFO full condition occurs. | ||
1486 | * Send a zero pause time frame to re-start transmission. | ||
1487 | */ | ||
1488 | /* XM_PAUSE_DA = '010000C28001' (default) */ | ||
1489 | /* XM_MAC_PTIME = 0xffff (maximum) */ | ||
1490 | /* remember this value is defined in big endian (!) */ | ||
1491 | xm_write16(hw, port, XM_MAC_PTIME, 0xffff); | ||
1492 | |||
1493 | mode |= XM_PAUSE_MODE; | ||
1494 | skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_ENA_PAUSE); | ||
1495 | } else { | ||
1496 | /* | ||
1497 | * disable pause frame generation is required for 1000BT | ||
1498 | * because the XMAC is not reset if the link is going down | ||
1499 | */ | ||
1500 | /* Disable Pause Mode in Mode Register */ | ||
1501 | mode &= ~XM_PAUSE_MODE; | ||
1502 | |||
1503 | skge_write16(hw, SK_REG(port, RX_MFF_CTRL1), MFF_DIS_PAUSE); | ||
1504 | } | ||
1505 | |||
1506 | xm_write32(hw, port, XM_MODE, mode); | ||
1507 | |||
1508 | msk = XM_DEF_MSK; | ||
1509 | /* disable GP0 interrupt bit for external Phy */ | ||
1510 | msk |= XM_IS_INP_ASS; | ||
1511 | |||
1512 | xm_write16(hw, port, XM_IMSK, msk); | ||
1513 | xm_read16(hw, port, XM_ISRC); | ||
1514 | |||
1515 | /* get MMU Command Reg. */ | ||
1516 | cmd = xm_read16(hw, port, XM_MMU_CMD); | ||
1517 | if (skge->duplex == DUPLEX_FULL) | ||
1518 | cmd |= XM_MMU_GMII_FD; | ||
1519 | |||
1520 | /* | ||
1521 | * Workaround BCOM Errata (#10523) for all BCom Phys | ||
1522 | * Enable Power Management after link up | ||
1523 | */ | ||
1524 | xm_phy_write(hw, port, PHY_BCOM_AUX_CTRL, | ||
1525 | xm_phy_read(hw, port, PHY_BCOM_AUX_CTRL) | ||
1526 | & ~PHY_B_AC_DIS_PM); | ||
1527 | xm_phy_write(hw, port, PHY_BCOM_INT_MASK, PHY_B_DEF_MSK); | ||
1528 | |||
1529 | /* enable Rx/Tx */ | ||
1530 | xm_write16(hw, port, XM_MMU_CMD, | ||
1531 | cmd | XM_MMU_ENA_RX | XM_MMU_ENA_TX); | ||
1532 | skge_link_up(skge); | ||
1533 | } | ||
1534 | |||
1535 | |||
1536 | static inline void bcom_phy_intr(struct skge_port *skge) | ||
1537 | { | ||
1538 | struct skge_hw *hw = skge->hw; | ||
1539 | int port = skge->port; | ||
1540 | u16 isrc; | ||
1541 | |||
1542 | isrc = xm_phy_read(hw, port, PHY_BCOM_INT_STAT); | ||
1543 | if (netif_msg_intr(skge)) | ||
1544 | printk(KERN_DEBUG PFX "%s: phy interrupt status 0x%x\n", | ||
1545 | skge->netdev->name, isrc); | ||
1546 | |||
1547 | if (isrc & PHY_B_IS_PSE) | ||
1548 | printk(KERN_ERR PFX "%s: uncorrectable pair swap error\n", | ||
1549 | hw->dev[port]->name); | ||
1550 | |||
1551 | /* Workaround BCom Errata: | ||
1552 | * enable and disable loopback mode if "NO HCD" occurs. | ||
1553 | */ | ||
1554 | if (isrc & PHY_B_IS_NO_HDCL) { | ||
1555 | u16 ctrl = xm_phy_read(hw, port, PHY_BCOM_CTRL); | ||
1556 | xm_phy_write(hw, port, PHY_BCOM_CTRL, | ||
1557 | ctrl | PHY_CT_LOOP); | ||
1558 | xm_phy_write(hw, port, PHY_BCOM_CTRL, | ||
1559 | ctrl & ~PHY_CT_LOOP); | ||
1560 | } | ||
1561 | |||
1562 | if (isrc & (PHY_B_IS_AN_PR | PHY_B_IS_LST_CHANGE)) | ||
1563 | bcom_check_link(hw, port); | ||
1564 | |||
1565 | } | ||
1566 | |||
1567 | /* Marvell Phy Initailization */ | ||
1568 | static void yukon_init(struct skge_hw *hw, int port) | ||
1569 | { | ||
1570 | struct skge_port *skge = netdev_priv(hw->dev[port]); | ||
1571 | u16 ctrl, ct1000, adv; | ||
1572 | u16 ledctrl, ledover; | ||
1573 | |||
1574 | pr_debug("yukon_init\n"); | ||
1575 | if (skge->autoneg == AUTONEG_ENABLE) { | ||
1576 | u16 ectrl = gm_phy_read(hw, port, PHY_MARV_EXT_CTRL); | ||
1577 | |||
1578 | ectrl &= ~(PHY_M_EC_M_DSC_MSK | PHY_M_EC_S_DSC_MSK | | ||
1579 | PHY_M_EC_MAC_S_MSK); | ||
1580 | ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ); | ||
1581 | |||
1582 | ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1); | ||
1583 | |||
1584 | gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); | ||
1585 | } | ||
1586 | |||
1587 | ctrl = gm_phy_read(hw, port, PHY_MARV_CTRL); | ||
1588 | if (skge->autoneg == AUTONEG_DISABLE) | ||
1589 | ctrl &= ~PHY_CT_ANE; | ||
1590 | |||
1591 | ctrl |= PHY_CT_RESET; | ||
1592 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); | ||
1593 | |||
1594 | ctrl = 0; | ||
1595 | ct1000 = 0; | ||
1596 | adv = PHY_AN_CSMA; | ||
1597 | |||
1598 | if (skge->autoneg == AUTONEG_ENABLE) { | ||
1599 | if (iscopper(hw)) { | ||
1600 | if (skge->advertising & ADVERTISED_1000baseT_Full) | ||
1601 | ct1000 |= PHY_M_1000C_AFD; | ||
1602 | if (skge->advertising & ADVERTISED_1000baseT_Half) | ||
1603 | ct1000 |= PHY_M_1000C_AHD; | ||
1604 | if (skge->advertising & ADVERTISED_100baseT_Full) | ||
1605 | adv |= PHY_M_AN_100_FD; | ||
1606 | if (skge->advertising & ADVERTISED_100baseT_Half) | ||
1607 | adv |= PHY_M_AN_100_HD; | ||
1608 | if (skge->advertising & ADVERTISED_10baseT_Full) | ||
1609 | adv |= PHY_M_AN_10_FD; | ||
1610 | if (skge->advertising & ADVERTISED_10baseT_Half) | ||
1611 | adv |= PHY_M_AN_10_HD; | ||
1612 | } else /* special defines for FIBER (88E1011S only) */ | ||
1613 | adv |= PHY_M_AN_1000X_AHD | PHY_M_AN_1000X_AFD; | ||
1614 | |||
1615 | /* Set Flow-control capabilities */ | ||
1616 | adv |= phy_pause_map[skge->flow_control]; | ||
1617 | |||
1618 | /* Restart Auto-negotiation */ | ||
1619 | ctrl |= PHY_CT_ANE | PHY_CT_RE_CFG; | ||
1620 | } else { | ||
1621 | /* forced speed/duplex settings */ | ||
1622 | ct1000 = PHY_M_1000C_MSE; | ||
1623 | |||
1624 | if (skge->duplex == DUPLEX_FULL) | ||
1625 | ctrl |= PHY_CT_DUP_MD; | ||
1626 | |||
1627 | switch (skge->speed) { | ||
1628 | case SPEED_1000: | ||
1629 | ctrl |= PHY_CT_SP1000; | ||
1630 | break; | ||
1631 | case SPEED_100: | ||
1632 | ctrl |= PHY_CT_SP100; | ||
1633 | break; | ||
1634 | } | ||
1635 | |||
1636 | ctrl |= PHY_CT_RESET; | ||
1637 | } | ||
1638 | |||
1639 | gm_phy_write(hw, port, PHY_MARV_1000T_CTRL, ct1000); | ||
1640 | |||
1641 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, adv); | ||
1642 | gm_phy_write(hw, port, PHY_MARV_CTRL, ctrl); | ||
1643 | |||
1644 | /* Setup Phy LED's */ | ||
1645 | ledctrl = PHY_M_LED_PULS_DUR(PULS_170MS); | ||
1646 | ledover = 0; | ||
1647 | |||
1648 | ledctrl |= PHY_M_LED_BLINK_RT(BLINK_84MS) | PHY_M_LEDC_TX_CTRL; | ||
1649 | |||
1650 | /* turn off the Rx LED (LED_RX) */ | ||
1651 | ledover |= PHY_M_LED_MO_RX(MO_LED_OFF); | ||
1652 | |||
1653 | /* disable blink mode (LED_DUPLEX) on collisions */ | ||
1654 | ctrl |= PHY_M_LEDC_DP_CTRL; | ||
1655 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); | ||
1656 | |||
1657 | if (skge->autoneg == AUTONEG_DISABLE || skge->speed == SPEED_100) { | ||
1658 | /* turn on 100 Mbps LED (LED_LINK100) */ | ||
1659 | ledover |= PHY_M_LED_MO_100(MO_LED_ON); | ||
1660 | } | ||
1661 | |||
1662 | if (ledover) | ||
1663 | gm_phy_write(hw, port, PHY_MARV_LED_OVER, ledover); | ||
1664 | |||
1665 | /* Enable phy interrupt on autonegotiation complete (or link up) */ | ||
1666 | if (skge->autoneg == AUTONEG_ENABLE) | ||
1667 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_IS_AN_COMPL); | ||
1668 | else | ||
1669 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); | ||
1670 | } | ||
1671 | |||
1672 | static void yukon_reset(struct skge_hw *hw, int port) | ||
1673 | { | ||
1674 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0);/* disable PHY IRQs */ | ||
1675 | gma_write16(hw, port, GM_MC_ADDR_H1, 0); /* clear MC hash */ | ||
1676 | gma_write16(hw, port, GM_MC_ADDR_H2, 0); | ||
1677 | gma_write16(hw, port, GM_MC_ADDR_H3, 0); | ||
1678 | gma_write16(hw, port, GM_MC_ADDR_H4, 0); | ||
1679 | |||
1680 | gma_write16(hw, port, GM_RX_CTRL, | ||
1681 | gma_read16(hw, port, GM_RX_CTRL) | ||
1682 | | GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); | ||
1683 | } | ||
1684 | |||
1685 | static void yukon_mac_init(struct skge_hw *hw, int port) | ||
1686 | { | ||
1687 | struct skge_port *skge = netdev_priv(hw->dev[port]); | ||
1688 | int i; | ||
1689 | u32 reg; | ||
1690 | const u8 *addr = hw->dev[port]->dev_addr; | ||
1691 | |||
1692 | /* WA code for COMA mode -- set PHY reset */ | ||
1693 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | ||
1694 | hw->chip_rev == CHIP_REV_YU_LITE_A3) | ||
1695 | skge_write32(hw, B2_GP_IO, | ||
1696 | (skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9)); | ||
1697 | |||
1698 | /* hard reset */ | ||
1699 | skge_write32(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); | ||
1700 | skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); | ||
1701 | |||
1702 | /* WA code for COMA mode -- clear PHY reset */ | ||
1703 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | ||
1704 | hw->chip_rev == CHIP_REV_YU_LITE_A3) | ||
1705 | skge_write32(hw, B2_GP_IO, | ||
1706 | (skge_read32(hw, B2_GP_IO) | GP_DIR_9) | ||
1707 | & ~GP_IO_9); | ||
1708 | |||
1709 | /* Set hardware config mode */ | ||
1710 | reg = GPC_INT_POL_HI | GPC_DIS_FC | GPC_DIS_SLEEP | | ||
1711 | GPC_ENA_XC | GPC_ANEG_ADV_ALL_M | GPC_ENA_PAUSE; | ||
1712 | reg |= iscopper(hw) ? GPC_HWCFG_GMII_COP : GPC_HWCFG_GMII_FIB; | ||
1713 | |||
1714 | /* Clear GMC reset */ | ||
1715 | skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_SET); | ||
1716 | skge_write32(hw, SK_REG(port, GPHY_CTRL), reg | GPC_RST_CLR); | ||
1717 | skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON | GMC_RST_CLR); | ||
1718 | if (skge->autoneg == AUTONEG_DISABLE) { | ||
1719 | reg = GM_GPCR_AU_ALL_DIS; | ||
1720 | gma_write16(hw, port, GM_GP_CTRL, | ||
1721 | gma_read16(hw, port, GM_GP_CTRL) | reg); | ||
1722 | |||
1723 | switch (skge->speed) { | ||
1724 | case SPEED_1000: | ||
1725 | reg |= GM_GPCR_SPEED_1000; | ||
1726 | /* fallthru */ | ||
1727 | case SPEED_100: | ||
1728 | reg |= GM_GPCR_SPEED_100; | ||
1729 | } | ||
1730 | |||
1731 | if (skge->duplex == DUPLEX_FULL) | ||
1732 | reg |= GM_GPCR_DUP_FULL; | ||
1733 | } else | ||
1734 | reg = GM_GPCR_SPEED_1000 | GM_GPCR_SPEED_100 | GM_GPCR_DUP_FULL; | ||
1735 | switch (skge->flow_control) { | ||
1736 | case FLOW_MODE_NONE: | ||
1737 | skge_write32(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); | ||
1738 | reg |= GM_GPCR_FC_TX_DIS | GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; | ||
1739 | break; | ||
1740 | case FLOW_MODE_LOC_SEND: | ||
1741 | /* disable Rx flow-control */ | ||
1742 | reg |= GM_GPCR_FC_RX_DIS | GM_GPCR_AU_FCT_DIS; | ||
1743 | } | ||
1744 | |||
1745 | gma_write16(hw, port, GM_GP_CTRL, reg); | ||
1746 | skge_read16(hw, GMAC_IRQ_SRC); | ||
1747 | |||
1748 | spin_lock_bh(&hw->phy_lock); | ||
1749 | yukon_init(hw, port); | ||
1750 | spin_unlock_bh(&hw->phy_lock); | ||
1751 | |||
1752 | /* MIB clear */ | ||
1753 | reg = gma_read16(hw, port, GM_PHY_ADDR); | ||
1754 | gma_write16(hw, port, GM_PHY_ADDR, reg | GM_PAR_MIB_CLR); | ||
1755 | |||
1756 | for (i = 0; i < GM_MIB_CNT_SIZE; i++) | ||
1757 | gma_read16(hw, port, GM_MIB_CNT_BASE + 8*i); | ||
1758 | gma_write16(hw, port, GM_PHY_ADDR, reg); | ||
1759 | |||
1760 | /* transmit control */ | ||
1761 | gma_write16(hw, port, GM_TX_CTRL, TX_COL_THR(TX_COL_DEF)); | ||
1762 | |||
1763 | /* receive control reg: unicast + multicast + no FCS */ | ||
1764 | gma_write16(hw, port, GM_RX_CTRL, | ||
1765 | GM_RXCR_UCF_ENA | GM_RXCR_CRC_DIS | GM_RXCR_MCF_ENA); | ||
1766 | |||
1767 | /* transmit flow control */ | ||
1768 | gma_write16(hw, port, GM_TX_FLOW_CTRL, 0xffff); | ||
1769 | |||
1770 | /* transmit parameter */ | ||
1771 | gma_write16(hw, port, GM_TX_PARAM, | ||
1772 | TX_JAM_LEN_VAL(TX_JAM_LEN_DEF) | | ||
1773 | TX_JAM_IPG_VAL(TX_JAM_IPG_DEF) | | ||
1774 | TX_IPG_JAM_DATA(TX_IPG_JAM_DEF)); | ||
1775 | |||
1776 | /* serial mode register */ | ||
1777 | reg = GM_SMOD_VLAN_ENA | IPG_DATA_VAL(IPG_DATA_DEF); | ||
1778 | if (hw->dev[port]->mtu > 1500) | ||
1779 | reg |= GM_SMOD_JUMBO_ENA; | ||
1780 | |||
1781 | gma_write16(hw, port, GM_SERIAL_MODE, reg); | ||
1782 | |||
1783 | /* physical address: used for pause frames */ | ||
1784 | gma_set_addr(hw, port, GM_SRC_ADDR_1L, addr); | ||
1785 | /* virtual address for data */ | ||
1786 | gma_set_addr(hw, port, GM_SRC_ADDR_2L, addr); | ||
1787 | |||
1788 | /* enable interrupt mask for counter overflows */ | ||
1789 | gma_write16(hw, port, GM_TX_IRQ_MSK, 0); | ||
1790 | gma_write16(hw, port, GM_RX_IRQ_MSK, 0); | ||
1791 | gma_write16(hw, port, GM_TR_IRQ_MSK, 0); | ||
1792 | |||
1793 | /* Initialize Mac Fifo */ | ||
1794 | |||
1795 | /* Configure Rx MAC FIFO */ | ||
1796 | skge_write16(hw, SK_REG(port, RX_GMF_FL_MSK), RX_FF_FL_DEF_MSK); | ||
1797 | reg = GMF_OPER_ON | GMF_RX_F_FL_ON; | ||
1798 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | ||
1799 | hw->chip_rev == CHIP_REV_YU_LITE_A3) | ||
1800 | reg &= ~GMF_RX_F_FL_ON; | ||
1801 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_CLR); | ||
1802 | skge_write16(hw, SK_REG(port, RX_GMF_CTRL_T), reg); | ||
1803 | skge_write16(hw, SK_REG(port, RX_GMF_FL_THR), RX_GMF_FL_THR_DEF); | ||
1804 | |||
1805 | /* Configure Tx MAC FIFO */ | ||
1806 | skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); | ||
1807 | skge_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); | ||
1808 | } | ||
1809 | |||
1810 | static void yukon_stop(struct skge_port *skge) | ||
1811 | { | ||
1812 | struct skge_hw *hw = skge->hw; | ||
1813 | int port = skge->port; | ||
1814 | |||
1815 | if (hw->chip_id == CHIP_ID_YUKON_LITE && | ||
1816 | hw->chip_rev == CHIP_REV_YU_LITE_A3) { | ||
1817 | skge_write32(hw, B2_GP_IO, | ||
1818 | skge_read32(hw, B2_GP_IO) | GP_DIR_9 | GP_IO_9); | ||
1819 | } | ||
1820 | |||
1821 | gma_write16(hw, port, GM_GP_CTRL, | ||
1822 | gma_read16(hw, port, GM_GP_CTRL) | ||
1823 | & ~(GM_GPCR_RX_ENA|GM_GPCR_RX_ENA)); | ||
1824 | gma_read16(hw, port, GM_GP_CTRL); | ||
1825 | |||
1826 | /* set GPHY Control reset */ | ||
1827 | gma_write32(hw, port, GPHY_CTRL, GPC_RST_SET); | ||
1828 | gma_write32(hw, port, GMAC_CTRL, GMC_RST_SET); | ||
1829 | } | ||
1830 | |||
1831 | static void yukon_get_stats(struct skge_port *skge, u64 *data) | ||
1832 | { | ||
1833 | struct skge_hw *hw = skge->hw; | ||
1834 | int port = skge->port; | ||
1835 | int i; | ||
1836 | |||
1837 | data[0] = (u64) gma_read32(hw, port, GM_TXO_OK_HI) << 32 | ||
1838 | | gma_read32(hw, port, GM_TXO_OK_LO); | ||
1839 | data[1] = (u64) gma_read32(hw, port, GM_RXO_OK_HI) << 32 | ||
1840 | | gma_read32(hw, port, GM_RXO_OK_LO); | ||
1841 | |||
1842 | for (i = 2; i < ARRAY_SIZE(skge_stats); i++) | ||
1843 | data[i] = gma_read32(hw, port, | ||
1844 | skge_stats[i].gma_offset); | ||
1845 | } | ||
1846 | |||
1847 | static void yukon_mac_intr(struct skge_hw *hw, int port) | ||
1848 | { | ||
1849 | struct net_device *dev = hw->dev[port]; | ||
1850 | struct skge_port *skge = netdev_priv(dev); | ||
1851 | u8 status = skge_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); | ||
1852 | |||
1853 | if (netif_msg_intr(skge)) | ||
1854 | printk(KERN_DEBUG PFX "%s: mac interrupt status 0x%x\n", | ||
1855 | dev->name, status); | ||
1856 | |||
1857 | if (status & GM_IS_RX_FF_OR) { | ||
1858 | ++skge->net_stats.rx_fifo_errors; | ||
1859 | gma_write8(hw, port, RX_GMF_CTRL_T, GMF_CLI_RX_FO); | ||
1860 | } | ||
1861 | if (status & GM_IS_TX_FF_UR) { | ||
1862 | ++skge->net_stats.tx_fifo_errors; | ||
1863 | gma_write8(hw, port, TX_GMF_CTRL_T, GMF_CLI_TX_FU); | ||
1864 | } | ||
1865 | |||
1866 | } | ||
1867 | |||
1868 | static u16 yukon_speed(const struct skge_hw *hw, u16 aux) | ||
1869 | { | ||
1870 | switch (aux & PHY_M_PS_SPEED_MSK) { | ||
1871 | case PHY_M_PS_SPEED_1000: | ||
1872 | return SPEED_1000; | ||
1873 | case PHY_M_PS_SPEED_100: | ||
1874 | return SPEED_100; | ||
1875 | default: | ||
1876 | return SPEED_10; | ||
1877 | } | ||
1878 | } | ||
1879 | |||
1880 | static void yukon_link_up(struct skge_port *skge) | ||
1881 | { | ||
1882 | struct skge_hw *hw = skge->hw; | ||
1883 | int port = skge->port; | ||
1884 | u16 reg; | ||
1885 | |||
1886 | pr_debug("yukon_link_up\n"); | ||
1887 | |||
1888 | /* Enable Transmit FIFO Underrun */ | ||
1889 | skge_write8(hw, GMAC_IRQ_MSK, GMAC_DEF_MSK); | ||
1890 | |||
1891 | reg = gma_read16(hw, port, GM_GP_CTRL); | ||
1892 | if (skge->duplex == DUPLEX_FULL || skge->autoneg == AUTONEG_ENABLE) | ||
1893 | reg |= GM_GPCR_DUP_FULL; | ||
1894 | |||
1895 | /* enable Rx/Tx */ | ||
1896 | reg |= GM_GPCR_RX_ENA | GM_GPCR_TX_ENA; | ||
1897 | gma_write16(hw, port, GM_GP_CTRL, reg); | ||
1898 | |||
1899 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, PHY_M_DEF_MSK); | ||
1900 | skge_link_up(skge); | ||
1901 | } | ||
1902 | |||
1903 | static void yukon_link_down(struct skge_port *skge) | ||
1904 | { | ||
1905 | struct skge_hw *hw = skge->hw; | ||
1906 | int port = skge->port; | ||
1907 | |||
1908 | pr_debug("yukon_link_down\n"); | ||
1909 | gm_phy_write(hw, port, PHY_MARV_INT_MASK, 0); | ||
1910 | gm_phy_write(hw, port, GM_GP_CTRL, | ||
1911 | gm_phy_read(hw, port, GM_GP_CTRL) | ||
1912 | & ~(GM_GPCR_RX_ENA | GM_GPCR_TX_ENA)); | ||
1913 | |||
1914 | if (skge->flow_control == FLOW_MODE_REM_SEND) { | ||
1915 | /* restore Asymmetric Pause bit */ | ||
1916 | gm_phy_write(hw, port, PHY_MARV_AUNE_ADV, | ||
1917 | gm_phy_read(hw, port, | ||
1918 | PHY_MARV_AUNE_ADV) | ||
1919 | | PHY_M_AN_ASP); | ||
1920 | |||
1921 | } | ||
1922 | |||
1923 | yukon_reset(hw, port); | ||
1924 | skge_link_down(skge); | ||
1925 | |||
1926 | yukon_init(hw, port); | ||
1927 | } | ||
1928 | |||
1929 | static void yukon_phy_intr(struct skge_port *skge) | ||
1930 | { | ||
1931 | struct skge_hw *hw = skge->hw; | ||
1932 | int port = skge->port; | ||
1933 | const char *reason = NULL; | ||
1934 | u16 istatus, phystat; | ||
1935 | |||
1936 | istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); | ||
1937 | phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); | ||
1938 | |||
1939 | if (netif_msg_intr(skge)) | ||
1940 | printk(KERN_DEBUG PFX "%s: phy interrupt status 0x%x 0x%x\n", | ||
1941 | skge->netdev->name, istatus, phystat); | ||
1942 | |||
1943 | if (istatus & PHY_M_IS_AN_COMPL) { | ||
1944 | if (gm_phy_read(hw, port, PHY_MARV_AUNE_LP) | ||
1945 | & PHY_M_AN_RF) { | ||
1946 | reason = "remote fault"; | ||
1947 | goto failed; | ||
1948 | } | ||
1949 | |||
1950 | if (gm_phy_read(hw, port, PHY_MARV_1000T_STAT) & PHY_B_1000S_MSF) { | ||
1951 | reason = "master/slave fault"; | ||
1952 | goto failed; | ||
1953 | } | ||
1954 | |||
1955 | if (!(phystat & PHY_M_PS_SPDUP_RES)) { | ||
1956 | reason = "speed/duplex"; | ||
1957 | goto failed; | ||
1958 | } | ||
1959 | |||
1960 | skge->duplex = (phystat & PHY_M_PS_FULL_DUP) | ||
1961 | ? DUPLEX_FULL : DUPLEX_HALF; | ||
1962 | skge->speed = yukon_speed(hw, phystat); | ||
1963 | |||
1964 | /* We are using IEEE 802.3z/D5.0 Table 37-4 */ | ||
1965 | switch (phystat & PHY_M_PS_PAUSE_MSK) { | ||
1966 | case PHY_M_PS_PAUSE_MSK: | ||
1967 | skge->flow_control = FLOW_MODE_SYMMETRIC; | ||
1968 | break; | ||
1969 | case PHY_M_PS_RX_P_EN: | ||
1970 | skge->flow_control = FLOW_MODE_REM_SEND; | ||
1971 | break; | ||
1972 | case PHY_M_PS_TX_P_EN: | ||
1973 | skge->flow_control = FLOW_MODE_LOC_SEND; | ||
1974 | break; | ||
1975 | default: | ||
1976 | skge->flow_control = FLOW_MODE_NONE; | ||
1977 | } | ||
1978 | |||
1979 | if (skge->flow_control == FLOW_MODE_NONE || | ||
1980 | (skge->speed < SPEED_1000 && skge->duplex == DUPLEX_HALF)) | ||
1981 | skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); | ||
1982 | else | ||
1983 | skge_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_ON); | ||
1984 | yukon_link_up(skge); | ||
1985 | return; | ||
1986 | } | ||
1987 | |||
1988 | if (istatus & PHY_M_IS_LSP_CHANGE) | ||
1989 | skge->speed = yukon_speed(hw, phystat); | ||
1990 | |||
1991 | if (istatus & PHY_M_IS_DUP_CHANGE) | ||
1992 | skge->duplex = (phystat & PHY_M_PS_FULL_DUP) ? DUPLEX_FULL : DUPLEX_HALF; | ||
1993 | if (istatus & PHY_M_IS_LST_CHANGE) { | ||
1994 | if (phystat & PHY_M_PS_LINK_UP) | ||
1995 | yukon_link_up(skge); | ||
1996 | else | ||
1997 | yukon_link_down(skge); | ||
1998 | } | ||
1999 | return; | ||
2000 | failed: | ||
2001 | printk(KERN_ERR PFX "%s: autonegotiation failed (%s)\n", | ||
2002 | skge->netdev->name, reason); | ||
2003 | |||
2004 | /* XXX restart autonegotiation? */ | ||
2005 | } | ||
2006 | |||
2007 | static void skge_ramset(struct skge_hw *hw, u16 q, u32 start, size_t len) | ||
2008 | { | ||
2009 | u32 end; | ||
2010 | |||
2011 | start /= 8; | ||
2012 | len /= 8; | ||
2013 | end = start + len - 1; | ||
2014 | |||
2015 | skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_RST_CLR); | ||
2016 | skge_write32(hw, RB_ADDR(q, RB_START), start); | ||
2017 | skge_write32(hw, RB_ADDR(q, RB_WP), start); | ||
2018 | skge_write32(hw, RB_ADDR(q, RB_RP), start); | ||
2019 | skge_write32(hw, RB_ADDR(q, RB_END), end); | ||
2020 | |||
2021 | if (q == Q_R1 || q == Q_R2) { | ||
2022 | /* Set thresholds on receive queue's */ | ||
2023 | skge_write32(hw, RB_ADDR(q, RB_RX_UTPP), | ||
2024 | start + (2*len)/3); | ||
2025 | skge_write32(hw, RB_ADDR(q, RB_RX_LTPP), | ||
2026 | start + (len/3)); | ||
2027 | } else { | ||
2028 | /* Enable store & forward on Tx queue's because | ||
2029 | * Tx FIFO is only 4K on Genesis and 1K on Yukon | ||
2030 | */ | ||
2031 | skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_STFWD); | ||
2032 | } | ||
2033 | |||
2034 | skge_write8(hw, RB_ADDR(q, RB_CTRL), RB_ENA_OP_MD); | ||
2035 | } | ||
2036 | |||
2037 | /* Setup Bus Memory Interface */ | ||
2038 | static void skge_qset(struct skge_port *skge, u16 q, | ||
2039 | const struct skge_element *e) | ||
2040 | { | ||
2041 | struct skge_hw *hw = skge->hw; | ||
2042 | u32 watermark = 0x600; | ||
2043 | u64 base = skge->dma + (e->desc - skge->mem); | ||
2044 | |||
2045 | /* optimization to reduce window on 32bit/33mhz */ | ||
2046 | if ((skge_read16(hw, B0_CTST) & (CS_BUS_CLOCK | CS_BUS_SLOT_SZ)) == 0) | ||
2047 | watermark /= 2; | ||
2048 | |||
2049 | skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); | ||
2050 | skge_write32(hw, Q_ADDR(q, Q_F), watermark); | ||
2051 | skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); | ||
2052 | skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); | ||
2053 | } | ||
2054 | |||
2055 | static int skge_up(struct net_device *dev) | ||
2056 | { | ||
2057 | struct skge_port *skge = netdev_priv(dev); | ||
2058 | struct skge_hw *hw = skge->hw; | ||
2059 | int port = skge->port; | ||
2060 | u32 chunk, ram_addr; | ||
2061 | size_t rx_size, tx_size; | ||
2062 | int err; | ||
2063 | |||
2064 | if (netif_msg_ifup(skge)) | ||
2065 | printk(KERN_INFO PFX "%s: enabling interface\n", dev->name); | ||
2066 | |||
2067 | if (dev->mtu > RX_BUF_SIZE) | ||
2068 | skge->rx_buf_size = dev->mtu + ETH_HLEN + NET_IP_ALIGN; | ||
2069 | else | ||
2070 | skge->rx_buf_size = RX_BUF_SIZE; | ||
2071 | |||
2072 | |||
2073 | rx_size = skge->rx_ring.count * sizeof(struct skge_rx_desc); | ||
2074 | tx_size = skge->tx_ring.count * sizeof(struct skge_tx_desc); | ||
2075 | skge->mem_size = tx_size + rx_size; | ||
2076 | skge->mem = pci_alloc_consistent(hw->pdev, skge->mem_size, &skge->dma); | ||
2077 | if (!skge->mem) | ||
2078 | return -ENOMEM; | ||
2079 | |||
2080 | memset(skge->mem, 0, skge->mem_size); | ||
2081 | |||
2082 | if ((err = skge_ring_alloc(&skge->rx_ring, skge->mem, skge->dma))) | ||
2083 | goto free_pci_mem; | ||
2084 | |||
2085 | err = skge_rx_fill(skge); | ||
2086 | if (err) | ||
2087 | goto free_rx_ring; | ||
2088 | |||
2089 | if ((err = skge_ring_alloc(&skge->tx_ring, skge->mem + rx_size, | ||
2090 | skge->dma + rx_size))) | ||
2091 | goto free_rx_ring; | ||
2092 | |||
2093 | skge->tx_avail = skge->tx_ring.count - 1; | ||
2094 | |||
2095 | /* Enable IRQ from port */ | ||
2096 | hw->intr_mask |= portirqmask[port]; | ||
2097 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2098 | |||
2099 | /* Initialze MAC */ | ||
2100 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
2101 | genesis_mac_init(hw, port); | ||
2102 | else | ||
2103 | yukon_mac_init(hw, port); | ||
2104 | |||
2105 | /* Configure RAMbuffers */ | ||
2106 | chunk = hw->ram_size / ((hw->ports + 1)*2); | ||
2107 | ram_addr = hw->ram_offset + 2 * chunk * port; | ||
2108 | |||
2109 | skge_ramset(hw, rxqaddr[port], ram_addr, chunk); | ||
2110 | skge_qset(skge, rxqaddr[port], skge->rx_ring.to_clean); | ||
2111 | |||
2112 | BUG_ON(skge->tx_ring.to_use != skge->tx_ring.to_clean); | ||
2113 | skge_ramset(hw, txqaddr[port], ram_addr+chunk, chunk); | ||
2114 | skge_qset(skge, txqaddr[port], skge->tx_ring.to_use); | ||
2115 | |||
2116 | /* Start receiver BMU */ | ||
2117 | wmb(); | ||
2118 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_START | CSR_IRQ_CL_F); | ||
2119 | |||
2120 | pr_debug("skge_up completed\n"); | ||
2121 | return 0; | ||
2122 | |||
2123 | free_rx_ring: | ||
2124 | skge_rx_clean(skge); | ||
2125 | kfree(skge->rx_ring.start); | ||
2126 | free_pci_mem: | ||
2127 | pci_free_consistent(hw->pdev, skge->mem_size, skge->mem, skge->dma); | ||
2128 | |||
2129 | return err; | ||
2130 | } | ||
2131 | |||
2132 | static int skge_down(struct net_device *dev) | ||
2133 | { | ||
2134 | struct skge_port *skge = netdev_priv(dev); | ||
2135 | struct skge_hw *hw = skge->hw; | ||
2136 | int port = skge->port; | ||
2137 | |||
2138 | if (netif_msg_ifdown(skge)) | ||
2139 | printk(KERN_INFO PFX "%s: disabling interface\n", dev->name); | ||
2140 | |||
2141 | netif_stop_queue(dev); | ||
2142 | |||
2143 | del_timer_sync(&skge->led_blink); | ||
2144 | |||
2145 | /* Stop transmitter */ | ||
2146 | skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); | ||
2147 | skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), | ||
2148 | RB_RST_SET|RB_DIS_OP_MD); | ||
2149 | |||
2150 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
2151 | genesis_stop(skge); | ||
2152 | else | ||
2153 | yukon_stop(skge); | ||
2154 | |||
2155 | /* Disable Force Sync bit and Enable Alloc bit */ | ||
2156 | skge_write8(hw, SK_REG(port, TXA_CTRL), | ||
2157 | TXA_DIS_FSYNC | TXA_DIS_ALLOC | TXA_STOP_RC); | ||
2158 | |||
2159 | /* Stop Interval Timer and Limit Counter of Tx Arbiter */ | ||
2160 | skge_write32(hw, SK_REG(port, TXA_ITI_INI), 0L); | ||
2161 | skge_write32(hw, SK_REG(port, TXA_LIM_INI), 0L); | ||
2162 | |||
2163 | /* Reset PCI FIFO */ | ||
2164 | skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); | ||
2165 | skge_write32(hw, RB_ADDR(txqaddr[port], RB_CTRL), RB_RST_SET); | ||
2166 | |||
2167 | /* Reset the RAM Buffer async Tx queue */ | ||
2168 | skge_write8(hw, RB_ADDR(port == 0 ? Q_XA1 : Q_XA2, RB_CTRL), RB_RST_SET); | ||
2169 | /* stop receiver */ | ||
2170 | skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); | ||
2171 | skge_write32(hw, RB_ADDR(port ? Q_R2 : Q_R1, RB_CTRL), | ||
2172 | RB_RST_SET|RB_DIS_OP_MD); | ||
2173 | skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); | ||
2174 | |||
2175 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
2176 | skge_write8(hw, SK_REG(port, TX_MFF_CTRL2), MFF_RST_SET); | ||
2177 | skge_write8(hw, SK_REG(port, RX_MFF_CTRL2), MFF_RST_SET); | ||
2178 | skge_write8(hw, SK_REG(port, TX_LED_CTRL), LED_STOP); | ||
2179 | skge_write8(hw, SK_REG(port, RX_LED_CTRL), LED_STOP); | ||
2180 | } else { | ||
2181 | skge_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); | ||
2182 | skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); | ||
2183 | } | ||
2184 | |||
2185 | /* turn off led's */ | ||
2186 | skge_write16(hw, B0_LED, LED_STAT_OFF); | ||
2187 | |||
2188 | skge_tx_clean(skge); | ||
2189 | skge_rx_clean(skge); | ||
2190 | |||
2191 | kfree(skge->rx_ring.start); | ||
2192 | kfree(skge->tx_ring.start); | ||
2193 | pci_free_consistent(hw->pdev, skge->mem_size, skge->mem, skge->dma); | ||
2194 | return 0; | ||
2195 | } | ||
2196 | |||
2197 | static int skge_xmit_frame(struct sk_buff *skb, struct net_device *dev) | ||
2198 | { | ||
2199 | struct skge_port *skge = netdev_priv(dev); | ||
2200 | struct skge_hw *hw = skge->hw; | ||
2201 | struct skge_ring *ring = &skge->tx_ring; | ||
2202 | struct skge_element *e; | ||
2203 | struct skge_tx_desc *td; | ||
2204 | int i; | ||
2205 | u32 control, len; | ||
2206 | u64 map; | ||
2207 | unsigned long flags; | ||
2208 | |||
2209 | skb = skb_padto(skb, ETH_ZLEN); | ||
2210 | if (!skb) | ||
2211 | return NETDEV_TX_OK; | ||
2212 | |||
2213 | local_irq_save(flags); | ||
2214 | if (!spin_trylock(&skge->tx_lock)) { | ||
2215 | /* Collision - tell upper layer to requeue */ | ||
2216 | local_irq_restore(flags); | ||
2217 | return NETDEV_TX_LOCKED; | ||
2218 | } | ||
2219 | |||
2220 | if (unlikely(skge->tx_avail < skb_shinfo(skb)->nr_frags +1)) { | ||
2221 | netif_stop_queue(dev); | ||
2222 | spin_unlock_irqrestore(&skge->tx_lock, flags); | ||
2223 | |||
2224 | printk(KERN_WARNING PFX "%s: ring full when queue awake!\n", | ||
2225 | dev->name); | ||
2226 | return NETDEV_TX_BUSY; | ||
2227 | } | ||
2228 | |||
2229 | e = ring->to_use; | ||
2230 | td = e->desc; | ||
2231 | e->skb = skb; | ||
2232 | len = skb_headlen(skb); | ||
2233 | map = pci_map_single(hw->pdev, skb->data, len, PCI_DMA_TODEVICE); | ||
2234 | pci_unmap_addr_set(e, mapaddr, map); | ||
2235 | pci_unmap_len_set(e, maplen, len); | ||
2236 | |||
2237 | td->dma_lo = map; | ||
2238 | td->dma_hi = map >> 32; | ||
2239 | |||
2240 | if (skb->ip_summed == CHECKSUM_HW) { | ||
2241 | const struct iphdr *ip | ||
2242 | = (const struct iphdr *) (skb->data + ETH_HLEN); | ||
2243 | int offset = skb->h.raw - skb->data; | ||
2244 | |||
2245 | /* This seems backwards, but it is what the sk98lin | ||
2246 | * does. Looks like hardware is wrong? | ||
2247 | */ | ||
2248 | if (ip->protocol == IPPROTO_UDP | ||
2249 | && hw->chip_rev == 0 && hw->chip_id == CHIP_ID_YUKON) | ||
2250 | control = BMU_TCP_CHECK; | ||
2251 | else | ||
2252 | control = BMU_UDP_CHECK; | ||
2253 | |||
2254 | td->csum_offs = 0; | ||
2255 | td->csum_start = offset; | ||
2256 | td->csum_write = offset + skb->csum; | ||
2257 | } else | ||
2258 | control = BMU_CHECK; | ||
2259 | |||
2260 | if (!skb_shinfo(skb)->nr_frags) /* single buffer i.e. no fragments */ | ||
2261 | control |= BMU_EOF| BMU_IRQ_EOF; | ||
2262 | else { | ||
2263 | struct skge_tx_desc *tf = td; | ||
2264 | |||
2265 | control |= BMU_STFWD; | ||
2266 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | ||
2267 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; | ||
2268 | |||
2269 | map = pci_map_page(hw->pdev, frag->page, frag->page_offset, | ||
2270 | frag->size, PCI_DMA_TODEVICE); | ||
2271 | |||
2272 | e = e->next; | ||
2273 | e->skb = NULL; | ||
2274 | tf = e->desc; | ||
2275 | tf->dma_lo = map; | ||
2276 | tf->dma_hi = (u64) map >> 32; | ||
2277 | pci_unmap_addr_set(e, mapaddr, map); | ||
2278 | pci_unmap_len_set(e, maplen, frag->size); | ||
2279 | |||
2280 | tf->control = BMU_OWN | BMU_SW | control | frag->size; | ||
2281 | } | ||
2282 | tf->control |= BMU_EOF | BMU_IRQ_EOF; | ||
2283 | } | ||
2284 | /* Make sure all the descriptors written */ | ||
2285 | wmb(); | ||
2286 | td->control = BMU_OWN | BMU_SW | BMU_STF | control | len; | ||
2287 | wmb(); | ||
2288 | |||
2289 | skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); | ||
2290 | |||
2291 | if (netif_msg_tx_queued(skge)) | ||
2292 | printk(KERN_DEBUG "%s: tx queued, slot %td, len %d\n", | ||
2293 | dev->name, e - ring->start, skb->len); | ||
2294 | |||
2295 | ring->to_use = e->next; | ||
2296 | skge->tx_avail -= skb_shinfo(skb)->nr_frags + 1; | ||
2297 | if (skge->tx_avail <= MAX_SKB_FRAGS + 1) { | ||
2298 | pr_debug("%s: transmit queue full\n", dev->name); | ||
2299 | netif_stop_queue(dev); | ||
2300 | } | ||
2301 | |||
2302 | dev->trans_start = jiffies; | ||
2303 | spin_unlock_irqrestore(&skge->tx_lock, flags); | ||
2304 | |||
2305 | return NETDEV_TX_OK; | ||
2306 | } | ||
2307 | |||
2308 | static inline void skge_tx_free(struct skge_hw *hw, struct skge_element *e) | ||
2309 | { | ||
2310 | /* This ring element can be skb or fragment */ | ||
2311 | if (e->skb) { | ||
2312 | pci_unmap_single(hw->pdev, | ||
2313 | pci_unmap_addr(e, mapaddr), | ||
2314 | pci_unmap_len(e, maplen), | ||
2315 | PCI_DMA_TODEVICE); | ||
2316 | dev_kfree_skb_any(e->skb); | ||
2317 | e->skb = NULL; | ||
2318 | } else { | ||
2319 | pci_unmap_page(hw->pdev, | ||
2320 | pci_unmap_addr(e, mapaddr), | ||
2321 | pci_unmap_len(e, maplen), | ||
2322 | PCI_DMA_TODEVICE); | ||
2323 | } | ||
2324 | } | ||
2325 | |||
2326 | static void skge_tx_clean(struct skge_port *skge) | ||
2327 | { | ||
2328 | struct skge_ring *ring = &skge->tx_ring; | ||
2329 | struct skge_element *e; | ||
2330 | unsigned long flags; | ||
2331 | |||
2332 | spin_lock_irqsave(&skge->tx_lock, flags); | ||
2333 | for (e = ring->to_clean; e != ring->to_use; e = e->next) { | ||
2334 | ++skge->tx_avail; | ||
2335 | skge_tx_free(skge->hw, e); | ||
2336 | } | ||
2337 | ring->to_clean = e; | ||
2338 | spin_unlock_irqrestore(&skge->tx_lock, flags); | ||
2339 | } | ||
2340 | |||
2341 | static void skge_tx_timeout(struct net_device *dev) | ||
2342 | { | ||
2343 | struct skge_port *skge = netdev_priv(dev); | ||
2344 | |||
2345 | if (netif_msg_timer(skge)) | ||
2346 | printk(KERN_DEBUG PFX "%s: tx timeout\n", dev->name); | ||
2347 | |||
2348 | skge_write8(skge->hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_STOP); | ||
2349 | skge_tx_clean(skge); | ||
2350 | } | ||
2351 | |||
2352 | static int skge_change_mtu(struct net_device *dev, int new_mtu) | ||
2353 | { | ||
2354 | int err = 0; | ||
2355 | int running = netif_running(dev); | ||
2356 | |||
2357 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) | ||
2358 | return -EINVAL; | ||
2359 | |||
2360 | |||
2361 | if (running) | ||
2362 | skge_down(dev); | ||
2363 | dev->mtu = new_mtu; | ||
2364 | if (running) | ||
2365 | skge_up(dev); | ||
2366 | |||
2367 | return err; | ||
2368 | } | ||
2369 | |||
2370 | static void genesis_set_multicast(struct net_device *dev) | ||
2371 | { | ||
2372 | struct skge_port *skge = netdev_priv(dev); | ||
2373 | struct skge_hw *hw = skge->hw; | ||
2374 | int port = skge->port; | ||
2375 | int i, count = dev->mc_count; | ||
2376 | struct dev_mc_list *list = dev->mc_list; | ||
2377 | u32 mode; | ||
2378 | u8 filter[8]; | ||
2379 | |||
2380 | pr_debug("genesis_set_multicast flags=%x count=%d\n", dev->flags, dev->mc_count); | ||
2381 | |||
2382 | mode = xm_read32(hw, port, XM_MODE); | ||
2383 | mode |= XM_MD_ENA_HASH; | ||
2384 | if (dev->flags & IFF_PROMISC) | ||
2385 | mode |= XM_MD_ENA_PROM; | ||
2386 | else | ||
2387 | mode &= ~XM_MD_ENA_PROM; | ||
2388 | |||
2389 | if (dev->flags & IFF_ALLMULTI) | ||
2390 | memset(filter, 0xff, sizeof(filter)); | ||
2391 | else { | ||
2392 | memset(filter, 0, sizeof(filter)); | ||
2393 | for (i = 0; list && i < count; i++, list = list->next) { | ||
2394 | u32 crc, bit; | ||
2395 | crc = ether_crc_le(ETH_ALEN, list->dmi_addr); | ||
2396 | bit = ~crc & 0x3f; | ||
2397 | filter[bit/8] |= 1 << (bit%8); | ||
2398 | } | ||
2399 | } | ||
2400 | |||
2401 | xm_write32(hw, port, XM_MODE, mode); | ||
2402 | xm_outhash(hw, port, XM_HSM, filter); | ||
2403 | } | ||
2404 | |||
2405 | static void yukon_set_multicast(struct net_device *dev) | ||
2406 | { | ||
2407 | struct skge_port *skge = netdev_priv(dev); | ||
2408 | struct skge_hw *hw = skge->hw; | ||
2409 | int port = skge->port; | ||
2410 | struct dev_mc_list *list = dev->mc_list; | ||
2411 | u16 reg; | ||
2412 | u8 filter[8]; | ||
2413 | |||
2414 | memset(filter, 0, sizeof(filter)); | ||
2415 | |||
2416 | reg = gma_read16(hw, port, GM_RX_CTRL); | ||
2417 | reg |= GM_RXCR_UCF_ENA; | ||
2418 | |||
2419 | if (dev->flags & IFF_PROMISC) /* promiscious */ | ||
2420 | reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); | ||
2421 | else if (dev->flags & IFF_ALLMULTI) /* all multicast */ | ||
2422 | memset(filter, 0xff, sizeof(filter)); | ||
2423 | else if (dev->mc_count == 0) /* no multicast */ | ||
2424 | reg &= ~GM_RXCR_MCF_ENA; | ||
2425 | else { | ||
2426 | int i; | ||
2427 | reg |= GM_RXCR_MCF_ENA; | ||
2428 | |||
2429 | for (i = 0; list && i < dev->mc_count; i++, list = list->next) { | ||
2430 | u32 bit = ether_crc(ETH_ALEN, list->dmi_addr) & 0x3f; | ||
2431 | filter[bit/8] |= 1 << (bit%8); | ||
2432 | } | ||
2433 | } | ||
2434 | |||
2435 | |||
2436 | gma_write16(hw, port, GM_MC_ADDR_H1, | ||
2437 | (u16)filter[0] | ((u16)filter[1] << 8)); | ||
2438 | gma_write16(hw, port, GM_MC_ADDR_H2, | ||
2439 | (u16)filter[2] | ((u16)filter[3] << 8)); | ||
2440 | gma_write16(hw, port, GM_MC_ADDR_H3, | ||
2441 | (u16)filter[4] | ((u16)filter[5] << 8)); | ||
2442 | gma_write16(hw, port, GM_MC_ADDR_H4, | ||
2443 | (u16)filter[6] | ((u16)filter[7] << 8)); | ||
2444 | |||
2445 | gma_write16(hw, port, GM_RX_CTRL, reg); | ||
2446 | } | ||
2447 | |||
2448 | static inline int bad_phy_status(const struct skge_hw *hw, u32 status) | ||
2449 | { | ||
2450 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
2451 | return (status & (XMR_FS_ERR | XMR_FS_2L_VLAN)) != 0; | ||
2452 | else | ||
2453 | return (status & GMR_FS_ANY_ERR) || | ||
2454 | (status & GMR_FS_RX_OK) == 0; | ||
2455 | } | ||
2456 | |||
2457 | static void skge_rx_error(struct skge_port *skge, int slot, | ||
2458 | u32 control, u32 status) | ||
2459 | { | ||
2460 | if (netif_msg_rx_err(skge)) | ||
2461 | printk(KERN_DEBUG PFX "%s: rx err, slot %d control 0x%x status 0x%x\n", | ||
2462 | skge->netdev->name, slot, control, status); | ||
2463 | |||
2464 | if ((control & (BMU_EOF|BMU_STF)) != (BMU_STF|BMU_EOF)) | ||
2465 | skge->net_stats.rx_length_errors++; | ||
2466 | else if (skge->hw->chip_id == CHIP_ID_GENESIS) { | ||
2467 | if (status & (XMR_FS_RUNT|XMR_FS_LNG_ERR)) | ||
2468 | skge->net_stats.rx_length_errors++; | ||
2469 | if (status & XMR_FS_FRA_ERR) | ||
2470 | skge->net_stats.rx_frame_errors++; | ||
2471 | if (status & XMR_FS_FCS_ERR) | ||
2472 | skge->net_stats.rx_crc_errors++; | ||
2473 | } else { | ||
2474 | if (status & (GMR_FS_LONG_ERR|GMR_FS_UN_SIZE)) | ||
2475 | skge->net_stats.rx_length_errors++; | ||
2476 | if (status & GMR_FS_FRAGMENT) | ||
2477 | skge->net_stats.rx_frame_errors++; | ||
2478 | if (status & GMR_FS_CRC_ERR) | ||
2479 | skge->net_stats.rx_crc_errors++; | ||
2480 | } | ||
2481 | } | ||
2482 | |||
2483 | /* Get receive buffer from descriptor. | ||
2484 | * Handles copy of small buffers and reallocation failures | ||
2485 | */ | ||
2486 | static inline struct sk_buff *skge_rx_get(struct skge_port *skge, | ||
2487 | struct skge_element *e, | ||
2488 | unsigned int len) | ||
2489 | { | ||
2490 | struct sk_buff *nskb, *skb; | ||
2491 | |||
2492 | if (len < RX_COPY_THRESHOLD) { | ||
2493 | nskb = skge_rx_alloc(skge->netdev, len + NET_IP_ALIGN); | ||
2494 | if (unlikely(!nskb)) | ||
2495 | return NULL; | ||
2496 | |||
2497 | pci_dma_sync_single_for_cpu(skge->hw->pdev, | ||
2498 | pci_unmap_addr(e, mapaddr), | ||
2499 | len, PCI_DMA_FROMDEVICE); | ||
2500 | memcpy(nskb->data, e->skb->data, len); | ||
2501 | pci_dma_sync_single_for_device(skge->hw->pdev, | ||
2502 | pci_unmap_addr(e, mapaddr), | ||
2503 | len, PCI_DMA_FROMDEVICE); | ||
2504 | |||
2505 | if (skge->rx_csum) { | ||
2506 | struct skge_rx_desc *rd = e->desc; | ||
2507 | nskb->csum = le16_to_cpu(rd->csum2); | ||
2508 | nskb->ip_summed = CHECKSUM_HW; | ||
2509 | } | ||
2510 | skge_rx_reuse(e, skge->rx_buf_size); | ||
2511 | return nskb; | ||
2512 | } else { | ||
2513 | nskb = skge_rx_alloc(skge->netdev, skge->rx_buf_size); | ||
2514 | if (unlikely(!nskb)) | ||
2515 | return NULL; | ||
2516 | |||
2517 | pci_unmap_single(skge->hw->pdev, | ||
2518 | pci_unmap_addr(e, mapaddr), | ||
2519 | pci_unmap_len(e, maplen), | ||
2520 | PCI_DMA_FROMDEVICE); | ||
2521 | skb = e->skb; | ||
2522 | if (skge->rx_csum) { | ||
2523 | struct skge_rx_desc *rd = e->desc; | ||
2524 | skb->csum = le16_to_cpu(rd->csum2); | ||
2525 | skb->ip_summed = CHECKSUM_HW; | ||
2526 | } | ||
2527 | |||
2528 | skge_rx_setup(skge, e, nskb, skge->rx_buf_size); | ||
2529 | return skb; | ||
2530 | } | ||
2531 | } | ||
2532 | |||
2533 | |||
2534 | static int skge_poll(struct net_device *dev, int *budget) | ||
2535 | { | ||
2536 | struct skge_port *skge = netdev_priv(dev); | ||
2537 | struct skge_hw *hw = skge->hw; | ||
2538 | struct skge_ring *ring = &skge->rx_ring; | ||
2539 | struct skge_element *e; | ||
2540 | unsigned int to_do = min(dev->quota, *budget); | ||
2541 | unsigned int work_done = 0; | ||
2542 | |||
2543 | pr_debug("skge_poll\n"); | ||
2544 | |||
2545 | for (e = ring->to_clean; work_done < to_do; e = e->next) { | ||
2546 | struct skge_rx_desc *rd = e->desc; | ||
2547 | struct sk_buff *skb; | ||
2548 | u32 control, len, status; | ||
2549 | |||
2550 | rmb(); | ||
2551 | control = rd->control; | ||
2552 | if (control & BMU_OWN) | ||
2553 | break; | ||
2554 | |||
2555 | len = control & BMU_BBC; | ||
2556 | status = rd->status; | ||
2557 | |||
2558 | if (unlikely((control & (BMU_EOF|BMU_STF)) != (BMU_STF|BMU_EOF) | ||
2559 | || bad_phy_status(hw, status))) { | ||
2560 | skge_rx_error(skge, e - ring->start, control, status); | ||
2561 | skge_rx_reuse(e, skge->rx_buf_size); | ||
2562 | continue; | ||
2563 | } | ||
2564 | |||
2565 | if (netif_msg_rx_status(skge)) | ||
2566 | printk(KERN_DEBUG PFX "%s: rx slot %td status 0x%x len %d\n", | ||
2567 | dev->name, e - ring->start, rd->status, len); | ||
2568 | |||
2569 | skb = skge_rx_get(skge, e, len); | ||
2570 | if (likely(skb)) { | ||
2571 | skb_put(skb, len); | ||
2572 | skb->protocol = eth_type_trans(skb, dev); | ||
2573 | |||
2574 | dev->last_rx = jiffies; | ||
2575 | netif_receive_skb(skb); | ||
2576 | |||
2577 | ++work_done; | ||
2578 | } else | ||
2579 | skge_rx_reuse(e, skge->rx_buf_size); | ||
2580 | } | ||
2581 | ring->to_clean = e; | ||
2582 | |||
2583 | /* restart receiver */ | ||
2584 | wmb(); | ||
2585 | skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), | ||
2586 | CSR_START | CSR_IRQ_CL_F); | ||
2587 | |||
2588 | *budget -= work_done; | ||
2589 | dev->quota -= work_done; | ||
2590 | |||
2591 | if (work_done >= to_do) | ||
2592 | return 1; /* not done */ | ||
2593 | |||
2594 | local_irq_disable(); | ||
2595 | __netif_rx_complete(dev); | ||
2596 | hw->intr_mask |= portirqmask[skge->port]; | ||
2597 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2598 | local_irq_enable(); | ||
2599 | return 0; | ||
2600 | } | ||
2601 | |||
2602 | static inline void skge_tx_intr(struct net_device *dev) | ||
2603 | { | ||
2604 | struct skge_port *skge = netdev_priv(dev); | ||
2605 | struct skge_hw *hw = skge->hw; | ||
2606 | struct skge_ring *ring = &skge->tx_ring; | ||
2607 | struct skge_element *e; | ||
2608 | |||
2609 | spin_lock(&skge->tx_lock); | ||
2610 | for (e = ring->to_clean; e != ring->to_use; e = e->next) { | ||
2611 | struct skge_tx_desc *td = e->desc; | ||
2612 | u32 control; | ||
2613 | |||
2614 | rmb(); | ||
2615 | control = td->control; | ||
2616 | if (control & BMU_OWN) | ||
2617 | break; | ||
2618 | |||
2619 | if (unlikely(netif_msg_tx_done(skge))) | ||
2620 | printk(KERN_DEBUG PFX "%s: tx done slot %td status 0x%x\n", | ||
2621 | dev->name, e - ring->start, td->status); | ||
2622 | |||
2623 | skge_tx_free(hw, e); | ||
2624 | e->skb = NULL; | ||
2625 | ++skge->tx_avail; | ||
2626 | } | ||
2627 | ring->to_clean = e; | ||
2628 | skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); | ||
2629 | |||
2630 | if (skge->tx_avail > MAX_SKB_FRAGS + 1) | ||
2631 | netif_wake_queue(dev); | ||
2632 | |||
2633 | spin_unlock(&skge->tx_lock); | ||
2634 | } | ||
2635 | |||
2636 | static void skge_mac_parity(struct skge_hw *hw, int port) | ||
2637 | { | ||
2638 | printk(KERN_ERR PFX "%s: mac data parity error\n", | ||
2639 | hw->dev[port] ? hw->dev[port]->name | ||
2640 | : (port == 0 ? "(port A)": "(port B")); | ||
2641 | |||
2642 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
2643 | skge_write16(hw, SK_REG(port, TX_MFF_CTRL1), | ||
2644 | MFF_CLR_PERR); | ||
2645 | else | ||
2646 | /* HW-Bug #8: cleared by GMF_CLI_TX_FC instead of GMF_CLI_TX_PE */ | ||
2647 | skge_write8(hw, SK_REG(port, TX_GMF_CTRL_T), | ||
2648 | (hw->chip_id == CHIP_ID_YUKON && hw->chip_rev == 0) | ||
2649 | ? GMF_CLI_TX_FC : GMF_CLI_TX_PE); | ||
2650 | } | ||
2651 | |||
2652 | static void skge_pci_clear(struct skge_hw *hw) | ||
2653 | { | ||
2654 | u16 status; | ||
2655 | |||
2656 | pci_read_config_word(hw->pdev, PCI_STATUS, &status); | ||
2657 | skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2658 | pci_write_config_word(hw->pdev, PCI_STATUS, | ||
2659 | status | PCI_STATUS_ERROR_BITS); | ||
2660 | skge_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2661 | } | ||
2662 | |||
2663 | static void skge_mac_intr(struct skge_hw *hw, int port) | ||
2664 | { | ||
2665 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
2666 | genesis_mac_intr(hw, port); | ||
2667 | else | ||
2668 | yukon_mac_intr(hw, port); | ||
2669 | } | ||
2670 | |||
2671 | /* Handle device specific framing and timeout interrupts */ | ||
2672 | static void skge_error_irq(struct skge_hw *hw) | ||
2673 | { | ||
2674 | u32 hwstatus = skge_read32(hw, B0_HWE_ISRC); | ||
2675 | |||
2676 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
2677 | /* clear xmac errors */ | ||
2678 | if (hwstatus & (IS_NO_STAT_M1|IS_NO_TIST_M1)) | ||
2679 | skge_write16(hw, SK_REG(0, RX_MFF_CTRL1), MFF_CLR_INSTAT); | ||
2680 | if (hwstatus & (IS_NO_STAT_M2|IS_NO_TIST_M2)) | ||
2681 | skge_write16(hw, SK_REG(0, RX_MFF_CTRL2), MFF_CLR_INSTAT); | ||
2682 | } else { | ||
2683 | /* Timestamp (unused) overflow */ | ||
2684 | if (hwstatus & IS_IRQ_TIST_OV) | ||
2685 | skge_write8(hw, GMAC_TI_ST_CTRL, GMT_ST_CLR_IRQ); | ||
2686 | |||
2687 | if (hwstatus & IS_IRQ_SENSOR) { | ||
2688 | /* no sensors on 32-bit Yukon */ | ||
2689 | if (!(skge_read16(hw, B0_CTST) & CS_BUS_SLOT_SZ)) { | ||
2690 | printk(KERN_ERR PFX "ignoring bogus sensor interrups\n"); | ||
2691 | skge_write32(hw, B0_HWE_IMSK, | ||
2692 | IS_ERR_MSK & ~IS_IRQ_SENSOR); | ||
2693 | } else | ||
2694 | printk(KERN_WARNING PFX "sensor interrupt\n"); | ||
2695 | } | ||
2696 | |||
2697 | |||
2698 | } | ||
2699 | |||
2700 | if (hwstatus & IS_RAM_RD_PAR) { | ||
2701 | printk(KERN_ERR PFX "Ram read data parity error\n"); | ||
2702 | skge_write16(hw, B3_RI_CTRL, RI_CLR_RD_PERR); | ||
2703 | } | ||
2704 | |||
2705 | if (hwstatus & IS_RAM_WR_PAR) { | ||
2706 | printk(KERN_ERR PFX "Ram write data parity error\n"); | ||
2707 | skge_write16(hw, B3_RI_CTRL, RI_CLR_WR_PERR); | ||
2708 | } | ||
2709 | |||
2710 | if (hwstatus & IS_M1_PAR_ERR) | ||
2711 | skge_mac_parity(hw, 0); | ||
2712 | |||
2713 | if (hwstatus & IS_M2_PAR_ERR) | ||
2714 | skge_mac_parity(hw, 1); | ||
2715 | |||
2716 | if (hwstatus & IS_R1_PAR_ERR) | ||
2717 | skge_write32(hw, B0_R1_CSR, CSR_IRQ_CL_P); | ||
2718 | |||
2719 | if (hwstatus & IS_R2_PAR_ERR) | ||
2720 | skge_write32(hw, B0_R2_CSR, CSR_IRQ_CL_P); | ||
2721 | |||
2722 | if (hwstatus & (IS_IRQ_MST_ERR|IS_IRQ_STAT)) { | ||
2723 | printk(KERN_ERR PFX "hardware error detected (status 0x%x)\n", | ||
2724 | hwstatus); | ||
2725 | |||
2726 | skge_pci_clear(hw); | ||
2727 | |||
2728 | hwstatus = skge_read32(hw, B0_HWE_ISRC); | ||
2729 | if (hwstatus & IS_IRQ_STAT) { | ||
2730 | printk(KERN_WARNING PFX "IRQ status %x: still set ignoring hardware errors\n", | ||
2731 | hwstatus); | ||
2732 | hw->intr_mask &= ~IS_HW_ERR; | ||
2733 | } | ||
2734 | } | ||
2735 | } | ||
2736 | |||
2737 | /* | ||
2738 | * Interrrupt from PHY are handled in tasklet (soft irq) | ||
2739 | * because accessing phy registers requires spin wait which might | ||
2740 | * cause excess interrupt latency. | ||
2741 | */ | ||
2742 | static void skge_extirq(unsigned long data) | ||
2743 | { | ||
2744 | struct skge_hw *hw = (struct skge_hw *) data; | ||
2745 | int port; | ||
2746 | |||
2747 | spin_lock(&hw->phy_lock); | ||
2748 | for (port = 0; port < 2; port++) { | ||
2749 | struct net_device *dev = hw->dev[port]; | ||
2750 | |||
2751 | if (dev && netif_running(dev)) { | ||
2752 | struct skge_port *skge = netdev_priv(dev); | ||
2753 | |||
2754 | if (hw->chip_id != CHIP_ID_GENESIS) | ||
2755 | yukon_phy_intr(skge); | ||
2756 | else | ||
2757 | bcom_phy_intr(skge); | ||
2758 | } | ||
2759 | } | ||
2760 | spin_unlock(&hw->phy_lock); | ||
2761 | |||
2762 | local_irq_disable(); | ||
2763 | hw->intr_mask |= IS_EXT_REG; | ||
2764 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2765 | local_irq_enable(); | ||
2766 | } | ||
2767 | |||
2768 | static irqreturn_t skge_intr(int irq, void *dev_id, struct pt_regs *regs) | ||
2769 | { | ||
2770 | struct skge_hw *hw = dev_id; | ||
2771 | u32 status = skge_read32(hw, B0_SP_ISRC); | ||
2772 | |||
2773 | if (status == 0 || status == ~0) /* hotplug or shared irq */ | ||
2774 | return IRQ_NONE; | ||
2775 | |||
2776 | status &= hw->intr_mask; | ||
2777 | if (status & IS_R1_F) { | ||
2778 | hw->intr_mask &= ~IS_R1_F; | ||
2779 | netif_rx_schedule(hw->dev[0]); | ||
2780 | } | ||
2781 | |||
2782 | if (status & IS_R2_F) { | ||
2783 | hw->intr_mask &= ~IS_R2_F; | ||
2784 | netif_rx_schedule(hw->dev[1]); | ||
2785 | } | ||
2786 | |||
2787 | if (status & IS_XA1_F) | ||
2788 | skge_tx_intr(hw->dev[0]); | ||
2789 | |||
2790 | if (status & IS_XA2_F) | ||
2791 | skge_tx_intr(hw->dev[1]); | ||
2792 | |||
2793 | if (status & IS_PA_TO_RX1) { | ||
2794 | struct skge_port *skge = netdev_priv(hw->dev[0]); | ||
2795 | ++skge->net_stats.rx_over_errors; | ||
2796 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX1); | ||
2797 | } | ||
2798 | |||
2799 | if (status & IS_PA_TO_RX2) { | ||
2800 | struct skge_port *skge = netdev_priv(hw->dev[1]); | ||
2801 | ++skge->net_stats.rx_over_errors; | ||
2802 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_RX2); | ||
2803 | } | ||
2804 | |||
2805 | if (status & IS_PA_TO_TX1) | ||
2806 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX1); | ||
2807 | |||
2808 | if (status & IS_PA_TO_TX2) | ||
2809 | skge_write16(hw, B3_PA_CTRL, PA_CLR_TO_TX2); | ||
2810 | |||
2811 | if (status & IS_MAC1) | ||
2812 | skge_mac_intr(hw, 0); | ||
2813 | |||
2814 | if (status & IS_MAC2) | ||
2815 | skge_mac_intr(hw, 1); | ||
2816 | |||
2817 | if (status & IS_HW_ERR) | ||
2818 | skge_error_irq(hw); | ||
2819 | |||
2820 | if (status & IS_EXT_REG) { | ||
2821 | hw->intr_mask &= ~IS_EXT_REG; | ||
2822 | tasklet_schedule(&hw->ext_tasklet); | ||
2823 | } | ||
2824 | |||
2825 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
2826 | |||
2827 | return IRQ_HANDLED; | ||
2828 | } | ||
2829 | |||
2830 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
2831 | static void skge_netpoll(struct net_device *dev) | ||
2832 | { | ||
2833 | struct skge_port *skge = netdev_priv(dev); | ||
2834 | |||
2835 | disable_irq(dev->irq); | ||
2836 | skge_intr(dev->irq, skge->hw, NULL); | ||
2837 | enable_irq(dev->irq); | ||
2838 | } | ||
2839 | #endif | ||
2840 | |||
2841 | static int skge_set_mac_address(struct net_device *dev, void *p) | ||
2842 | { | ||
2843 | struct skge_port *skge = netdev_priv(dev); | ||
2844 | struct sockaddr *addr = p; | ||
2845 | int err = 0; | ||
2846 | |||
2847 | if (!is_valid_ether_addr(addr->sa_data)) | ||
2848 | return -EADDRNOTAVAIL; | ||
2849 | |||
2850 | skge_down(dev); | ||
2851 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | ||
2852 | memcpy_toio(skge->hw->regs + B2_MAC_1 + skge->port*8, | ||
2853 | dev->dev_addr, ETH_ALEN); | ||
2854 | memcpy_toio(skge->hw->regs + B2_MAC_2 + skge->port*8, | ||
2855 | dev->dev_addr, ETH_ALEN); | ||
2856 | if (dev->flags & IFF_UP) | ||
2857 | err = skge_up(dev); | ||
2858 | return err; | ||
2859 | } | ||
2860 | |||
2861 | static const struct { | ||
2862 | u8 id; | ||
2863 | const char *name; | ||
2864 | } skge_chips[] = { | ||
2865 | { CHIP_ID_GENESIS, "Genesis" }, | ||
2866 | { CHIP_ID_YUKON, "Yukon" }, | ||
2867 | { CHIP_ID_YUKON_LITE, "Yukon-Lite"}, | ||
2868 | { CHIP_ID_YUKON_LP, "Yukon-LP"}, | ||
2869 | }; | ||
2870 | |||
2871 | static const char *skge_board_name(const struct skge_hw *hw) | ||
2872 | { | ||
2873 | int i; | ||
2874 | static char buf[16]; | ||
2875 | |||
2876 | for (i = 0; i < ARRAY_SIZE(skge_chips); i++) | ||
2877 | if (skge_chips[i].id == hw->chip_id) | ||
2878 | return skge_chips[i].name; | ||
2879 | |||
2880 | snprintf(buf, sizeof buf, "chipid 0x%x", hw->chip_id); | ||
2881 | return buf; | ||
2882 | } | ||
2883 | |||
2884 | |||
2885 | /* | ||
2886 | * Setup the board data structure, but don't bring up | ||
2887 | * the port(s) | ||
2888 | */ | ||
2889 | static int skge_reset(struct skge_hw *hw) | ||
2890 | { | ||
2891 | u16 ctst; | ||
2892 | u8 t8, mac_cfg; | ||
2893 | int i; | ||
2894 | |||
2895 | ctst = skge_read16(hw, B0_CTST); | ||
2896 | |||
2897 | /* do a SW reset */ | ||
2898 | skge_write8(hw, B0_CTST, CS_RST_SET); | ||
2899 | skge_write8(hw, B0_CTST, CS_RST_CLR); | ||
2900 | |||
2901 | /* clear PCI errors, if any */ | ||
2902 | skge_pci_clear(hw); | ||
2903 | |||
2904 | skge_write8(hw, B0_CTST, CS_MRST_CLR); | ||
2905 | |||
2906 | /* restore CLK_RUN bits (for Yukon-Lite) */ | ||
2907 | skge_write16(hw, B0_CTST, | ||
2908 | ctst & (CS_CLK_RUN_HOT|CS_CLK_RUN_RST|CS_CLK_RUN_ENA)); | ||
2909 | |||
2910 | hw->chip_id = skge_read8(hw, B2_CHIP_ID); | ||
2911 | hw->phy_type = skge_read8(hw, B2_E_1) & 0xf; | ||
2912 | hw->pmd_type = skge_read8(hw, B2_PMD_TYP); | ||
2913 | |||
2914 | switch (hw->chip_id) { | ||
2915 | case CHIP_ID_GENESIS: | ||
2916 | switch (hw->phy_type) { | ||
2917 | case SK_PHY_BCOM: | ||
2918 | hw->phy_addr = PHY_ADDR_BCOM; | ||
2919 | break; | ||
2920 | default: | ||
2921 | printk(KERN_ERR PFX "%s: unsupported phy type 0x%x\n", | ||
2922 | pci_name(hw->pdev), hw->phy_type); | ||
2923 | return -EOPNOTSUPP; | ||
2924 | } | ||
2925 | break; | ||
2926 | |||
2927 | case CHIP_ID_YUKON: | ||
2928 | case CHIP_ID_YUKON_LITE: | ||
2929 | case CHIP_ID_YUKON_LP: | ||
2930 | if (hw->phy_type < SK_PHY_MARV_COPPER && hw->pmd_type != 'S') | ||
2931 | hw->phy_type = SK_PHY_MARV_COPPER; | ||
2932 | |||
2933 | hw->phy_addr = PHY_ADDR_MARV; | ||
2934 | if (!iscopper(hw)) | ||
2935 | hw->phy_type = SK_PHY_MARV_FIBER; | ||
2936 | |||
2937 | break; | ||
2938 | |||
2939 | default: | ||
2940 | printk(KERN_ERR PFX "%s: unsupported chip type 0x%x\n", | ||
2941 | pci_name(hw->pdev), hw->chip_id); | ||
2942 | return -EOPNOTSUPP; | ||
2943 | } | ||
2944 | |||
2945 | mac_cfg = skge_read8(hw, B2_MAC_CFG); | ||
2946 | hw->ports = (mac_cfg & CFG_SNG_MAC) ? 1 : 2; | ||
2947 | hw->chip_rev = (mac_cfg & CFG_CHIP_R_MSK) >> 4; | ||
2948 | |||
2949 | /* read the adapters RAM size */ | ||
2950 | t8 = skge_read8(hw, B2_E_0); | ||
2951 | if (hw->chip_id == CHIP_ID_GENESIS) { | ||
2952 | if (t8 == 3) { | ||
2953 | /* special case: 4 x 64k x 36, offset = 0x80000 */ | ||
2954 | hw->ram_size = 0x100000; | ||
2955 | hw->ram_offset = 0x80000; | ||
2956 | } else | ||
2957 | hw->ram_size = t8 * 512; | ||
2958 | } | ||
2959 | else if (t8 == 0) | ||
2960 | hw->ram_size = 0x20000; | ||
2961 | else | ||
2962 | hw->ram_size = t8 * 4096; | ||
2963 | |||
2964 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
2965 | genesis_init(hw); | ||
2966 | else { | ||
2967 | /* switch power to VCC (WA for VAUX problem) */ | ||
2968 | skge_write8(hw, B0_POWER_CTRL, | ||
2969 | PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_OFF | PC_VCC_ON); | ||
2970 | for (i = 0; i < hw->ports; i++) { | ||
2971 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_SET); | ||
2972 | skge_write16(hw, SK_REG(i, GMAC_LINK_CTRL), GMLC_RST_CLR); | ||
2973 | } | ||
2974 | } | ||
2975 | |||
2976 | /* turn off hardware timer (unused) */ | ||
2977 | skge_write8(hw, B2_TI_CTRL, TIM_STOP); | ||
2978 | skge_write8(hw, B2_TI_CTRL, TIM_CLR_IRQ); | ||
2979 | skge_write8(hw, B0_LED, LED_STAT_ON); | ||
2980 | |||
2981 | /* enable the Tx Arbiters */ | ||
2982 | for (i = 0; i < hw->ports; i++) | ||
2983 | skge_write8(hw, SK_REG(i, TXA_CTRL), TXA_ENA_ARB); | ||
2984 | |||
2985 | /* Initialize ram interface */ | ||
2986 | skge_write16(hw, B3_RI_CTRL, RI_RST_CLR); | ||
2987 | |||
2988 | skge_write8(hw, B3_RI_WTO_R1, SK_RI_TO_53); | ||
2989 | skge_write8(hw, B3_RI_WTO_XA1, SK_RI_TO_53); | ||
2990 | skge_write8(hw, B3_RI_WTO_XS1, SK_RI_TO_53); | ||
2991 | skge_write8(hw, B3_RI_RTO_R1, SK_RI_TO_53); | ||
2992 | skge_write8(hw, B3_RI_RTO_XA1, SK_RI_TO_53); | ||
2993 | skge_write8(hw, B3_RI_RTO_XS1, SK_RI_TO_53); | ||
2994 | skge_write8(hw, B3_RI_WTO_R2, SK_RI_TO_53); | ||
2995 | skge_write8(hw, B3_RI_WTO_XA2, SK_RI_TO_53); | ||
2996 | skge_write8(hw, B3_RI_WTO_XS2, SK_RI_TO_53); | ||
2997 | skge_write8(hw, B3_RI_RTO_R2, SK_RI_TO_53); | ||
2998 | skge_write8(hw, B3_RI_RTO_XA2, SK_RI_TO_53); | ||
2999 | skge_write8(hw, B3_RI_RTO_XS2, SK_RI_TO_53); | ||
3000 | |||
3001 | skge_write32(hw, B0_HWE_IMSK, IS_ERR_MSK); | ||
3002 | |||
3003 | /* Set interrupt moderation for Transmit only | ||
3004 | * Receive interrupts avoided by NAPI | ||
3005 | */ | ||
3006 | skge_write32(hw, B2_IRQM_MSK, IS_XA1_F|IS_XA2_F); | ||
3007 | skge_write32(hw, B2_IRQM_INI, skge_usecs2clk(hw, 100)); | ||
3008 | skge_write32(hw, B2_IRQM_CTRL, TIM_START); | ||
3009 | |||
3010 | hw->intr_mask = IS_HW_ERR | IS_EXT_REG; | ||
3011 | skge_write32(hw, B0_IMSK, hw->intr_mask); | ||
3012 | |||
3013 | if (hw->chip_id != CHIP_ID_GENESIS) | ||
3014 | skge_write8(hw, GMAC_IRQ_MSK, 0); | ||
3015 | |||
3016 | spin_lock_bh(&hw->phy_lock); | ||
3017 | for (i = 0; i < hw->ports; i++) { | ||
3018 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
3019 | genesis_reset(hw, i); | ||
3020 | else | ||
3021 | yukon_reset(hw, i); | ||
3022 | } | ||
3023 | spin_unlock_bh(&hw->phy_lock); | ||
3024 | |||
3025 | return 0; | ||
3026 | } | ||
3027 | |||
3028 | /* Initialize network device */ | ||
3029 | static struct net_device *skge_devinit(struct skge_hw *hw, int port, | ||
3030 | int highmem) | ||
3031 | { | ||
3032 | struct skge_port *skge; | ||
3033 | struct net_device *dev = alloc_etherdev(sizeof(*skge)); | ||
3034 | |||
3035 | if (!dev) { | ||
3036 | printk(KERN_ERR "skge etherdev alloc failed"); | ||
3037 | return NULL; | ||
3038 | } | ||
3039 | |||
3040 | SET_MODULE_OWNER(dev); | ||
3041 | SET_NETDEV_DEV(dev, &hw->pdev->dev); | ||
3042 | dev->open = skge_up; | ||
3043 | dev->stop = skge_down; | ||
3044 | dev->hard_start_xmit = skge_xmit_frame; | ||
3045 | dev->get_stats = skge_get_stats; | ||
3046 | if (hw->chip_id == CHIP_ID_GENESIS) | ||
3047 | dev->set_multicast_list = genesis_set_multicast; | ||
3048 | else | ||
3049 | dev->set_multicast_list = yukon_set_multicast; | ||
3050 | |||
3051 | dev->set_mac_address = skge_set_mac_address; | ||
3052 | dev->change_mtu = skge_change_mtu; | ||
3053 | SET_ETHTOOL_OPS(dev, &skge_ethtool_ops); | ||
3054 | dev->tx_timeout = skge_tx_timeout; | ||
3055 | dev->watchdog_timeo = TX_WATCHDOG; | ||
3056 | dev->poll = skge_poll; | ||
3057 | dev->weight = NAPI_WEIGHT; | ||
3058 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
3059 | dev->poll_controller = skge_netpoll; | ||
3060 | #endif | ||
3061 | dev->irq = hw->pdev->irq; | ||
3062 | dev->features = NETIF_F_LLTX; | ||
3063 | if (highmem) | ||
3064 | dev->features |= NETIF_F_HIGHDMA; | ||
3065 | |||
3066 | skge = netdev_priv(dev); | ||
3067 | skge->netdev = dev; | ||
3068 | skge->hw = hw; | ||
3069 | skge->msg_enable = netif_msg_init(debug, default_msg); | ||
3070 | skge->tx_ring.count = DEFAULT_TX_RING_SIZE; | ||
3071 | skge->rx_ring.count = DEFAULT_RX_RING_SIZE; | ||
3072 | |||
3073 | /* Auto speed and flow control */ | ||
3074 | skge->autoneg = AUTONEG_ENABLE; | ||
3075 | skge->flow_control = FLOW_MODE_SYMMETRIC; | ||
3076 | skge->duplex = -1; | ||
3077 | skge->speed = -1; | ||
3078 | skge->advertising = skge_supported_modes(hw); | ||
3079 | |||
3080 | hw->dev[port] = dev; | ||
3081 | |||
3082 | skge->port = port; | ||
3083 | |||
3084 | spin_lock_init(&skge->tx_lock); | ||
3085 | |||
3086 | init_timer(&skge->led_blink); | ||
3087 | skge->led_blink.function = skge_blink_timer; | ||
3088 | skge->led_blink.data = (unsigned long) skge; | ||
3089 | |||
3090 | if (hw->chip_id != CHIP_ID_GENESIS) { | ||
3091 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; | ||
3092 | skge->rx_csum = 1; | ||
3093 | } | ||
3094 | |||
3095 | /* read the mac address */ | ||
3096 | memcpy_fromio(dev->dev_addr, hw->regs + B2_MAC_1 + port*8, ETH_ALEN); | ||
3097 | |||
3098 | /* device is off until link detection */ | ||
3099 | netif_carrier_off(dev); | ||
3100 | netif_stop_queue(dev); | ||
3101 | |||
3102 | return dev; | ||
3103 | } | ||
3104 | |||
3105 | static void __devinit skge_show_addr(struct net_device *dev) | ||
3106 | { | ||
3107 | const struct skge_port *skge = netdev_priv(dev); | ||
3108 | |||
3109 | if (netif_msg_probe(skge)) | ||
3110 | printk(KERN_INFO PFX "%s: addr %02x:%02x:%02x:%02x:%02x:%02x\n", | ||
3111 | dev->name, | ||
3112 | dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], | ||
3113 | dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); | ||
3114 | } | ||
3115 | |||
3116 | static int __devinit skge_probe(struct pci_dev *pdev, | ||
3117 | const struct pci_device_id *ent) | ||
3118 | { | ||
3119 | struct net_device *dev, *dev1; | ||
3120 | struct skge_hw *hw; | ||
3121 | int err, using_dac = 0; | ||
3122 | |||
3123 | if ((err = pci_enable_device(pdev))) { | ||
3124 | printk(KERN_ERR PFX "%s cannot enable PCI device\n", | ||
3125 | pci_name(pdev)); | ||
3126 | goto err_out; | ||
3127 | } | ||
3128 | |||
3129 | if ((err = pci_request_regions(pdev, DRV_NAME))) { | ||
3130 | printk(KERN_ERR PFX "%s cannot obtain PCI resources\n", | ||
3131 | pci_name(pdev)); | ||
3132 | goto err_out_disable_pdev; | ||
3133 | } | ||
3134 | |||
3135 | pci_set_master(pdev); | ||
3136 | |||
3137 | if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) | ||
3138 | using_dac = 1; | ||
3139 | else if (!(err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) { | ||
3140 | printk(KERN_ERR PFX "%s no usable DMA configuration\n", | ||
3141 | pci_name(pdev)); | ||
3142 | goto err_out_free_regions; | ||
3143 | } | ||
3144 | |||
3145 | #ifdef __BIG_ENDIAN | ||
3146 | /* byte swap decriptors in hardware */ | ||
3147 | { | ||
3148 | u32 reg; | ||
3149 | |||
3150 | pci_read_config_dword(pdev, PCI_DEV_REG2, ®); | ||
3151 | reg |= PCI_REV_DESC; | ||
3152 | pci_write_config_dword(pdev, PCI_DEV_REG2, reg); | ||
3153 | } | ||
3154 | #endif | ||
3155 | |||
3156 | err = -ENOMEM; | ||
3157 | hw = kmalloc(sizeof(*hw), GFP_KERNEL); | ||
3158 | if (!hw) { | ||
3159 | printk(KERN_ERR PFX "%s: cannot allocate hardware struct\n", | ||
3160 | pci_name(pdev)); | ||
3161 | goto err_out_free_regions; | ||
3162 | } | ||
3163 | |||
3164 | memset(hw, 0, sizeof(*hw)); | ||
3165 | hw->pdev = pdev; | ||
3166 | spin_lock_init(&hw->phy_lock); | ||
3167 | tasklet_init(&hw->ext_tasklet, skge_extirq, (unsigned long) hw); | ||
3168 | |||
3169 | hw->regs = ioremap_nocache(pci_resource_start(pdev, 0), 0x4000); | ||
3170 | if (!hw->regs) { | ||
3171 | printk(KERN_ERR PFX "%s: cannot map device registers\n", | ||
3172 | pci_name(pdev)); | ||
3173 | goto err_out_free_hw; | ||
3174 | } | ||
3175 | |||
3176 | if ((err = request_irq(pdev->irq, skge_intr, SA_SHIRQ, DRV_NAME, hw))) { | ||
3177 | printk(KERN_ERR PFX "%s: cannot assign irq %d\n", | ||
3178 | pci_name(pdev), pdev->irq); | ||
3179 | goto err_out_iounmap; | ||
3180 | } | ||
3181 | pci_set_drvdata(pdev, hw); | ||
3182 | |||
3183 | err = skge_reset(hw); | ||
3184 | if (err) | ||
3185 | goto err_out_free_irq; | ||
3186 | |||
3187 | printk(KERN_INFO PFX "addr 0x%lx irq %d chip %s rev %d\n", | ||
3188 | pci_resource_start(pdev, 0), pdev->irq, | ||
3189 | skge_board_name(hw), hw->chip_rev); | ||
3190 | |||
3191 | if ((dev = skge_devinit(hw, 0, using_dac)) == NULL) | ||
3192 | goto err_out_led_off; | ||
3193 | |||
3194 | if ((err = register_netdev(dev))) { | ||
3195 | printk(KERN_ERR PFX "%s: cannot register net device\n", | ||
3196 | pci_name(pdev)); | ||
3197 | goto err_out_free_netdev; | ||
3198 | } | ||
3199 | |||
3200 | skge_show_addr(dev); | ||
3201 | |||
3202 | if (hw->ports > 1 && (dev1 = skge_devinit(hw, 1, using_dac))) { | ||
3203 | if (register_netdev(dev1) == 0) | ||
3204 | skge_show_addr(dev1); | ||
3205 | else { | ||
3206 | /* Failure to register second port need not be fatal */ | ||
3207 | printk(KERN_WARNING PFX "register of second port failed\n"); | ||
3208 | hw->dev[1] = NULL; | ||
3209 | free_netdev(dev1); | ||
3210 | } | ||
3211 | } | ||
3212 | |||
3213 | return 0; | ||
3214 | |||
3215 | err_out_free_netdev: | ||
3216 | free_netdev(dev); | ||
3217 | err_out_led_off: | ||
3218 | skge_write16(hw, B0_LED, LED_STAT_OFF); | ||
3219 | err_out_free_irq: | ||
3220 | free_irq(pdev->irq, hw); | ||
3221 | err_out_iounmap: | ||
3222 | iounmap(hw->regs); | ||
3223 | err_out_free_hw: | ||
3224 | kfree(hw); | ||
3225 | err_out_free_regions: | ||
3226 | pci_release_regions(pdev); | ||
3227 | err_out_disable_pdev: | ||
3228 | pci_disable_device(pdev); | ||
3229 | pci_set_drvdata(pdev, NULL); | ||
3230 | err_out: | ||
3231 | return err; | ||
3232 | } | ||
3233 | |||
3234 | static void __devexit skge_remove(struct pci_dev *pdev) | ||
3235 | { | ||
3236 | struct skge_hw *hw = pci_get_drvdata(pdev); | ||
3237 | struct net_device *dev0, *dev1; | ||
3238 | |||
3239 | if (!hw) | ||
3240 | return; | ||
3241 | |||
3242 | if ((dev1 = hw->dev[1])) | ||
3243 | unregister_netdev(dev1); | ||
3244 | dev0 = hw->dev[0]; | ||
3245 | unregister_netdev(dev0); | ||
3246 | |||
3247 | tasklet_kill(&hw->ext_tasklet); | ||
3248 | |||
3249 | free_irq(pdev->irq, hw); | ||
3250 | pci_release_regions(pdev); | ||
3251 | pci_disable_device(pdev); | ||
3252 | if (dev1) | ||
3253 | free_netdev(dev1); | ||
3254 | free_netdev(dev0); | ||
3255 | skge_write16(hw, B0_LED, LED_STAT_OFF); | ||
3256 | iounmap(hw->regs); | ||
3257 | kfree(hw); | ||
3258 | pci_set_drvdata(pdev, NULL); | ||
3259 | } | ||
3260 | |||
3261 | #ifdef CONFIG_PM | ||
3262 | static int skge_suspend(struct pci_dev *pdev, pm_message_t state) | ||
3263 | { | ||
3264 | struct skge_hw *hw = pci_get_drvdata(pdev); | ||
3265 | int i, wol = 0; | ||
3266 | |||
3267 | for (i = 0; i < 2; i++) { | ||
3268 | struct net_device *dev = hw->dev[i]; | ||
3269 | |||
3270 | if (dev) { | ||
3271 | struct skge_port *skge = netdev_priv(dev); | ||
3272 | if (netif_running(dev)) { | ||
3273 | netif_carrier_off(dev); | ||
3274 | skge_down(dev); | ||
3275 | } | ||
3276 | netif_device_detach(dev); | ||
3277 | wol |= skge->wol; | ||
3278 | } | ||
3279 | } | ||
3280 | |||
3281 | pci_save_state(pdev); | ||
3282 | pci_enable_wake(pdev, pci_choose_state(pdev, state), wol); | ||
3283 | pci_disable_device(pdev); | ||
3284 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
3285 | |||
3286 | return 0; | ||
3287 | } | ||
3288 | |||
3289 | static int skge_resume(struct pci_dev *pdev) | ||
3290 | { | ||
3291 | struct skge_hw *hw = pci_get_drvdata(pdev); | ||
3292 | int i; | ||
3293 | |||
3294 | pci_set_power_state(pdev, PCI_D0); | ||
3295 | pci_restore_state(pdev); | ||
3296 | pci_enable_wake(pdev, PCI_D0, 0); | ||
3297 | |||
3298 | skge_reset(hw); | ||
3299 | |||
3300 | for (i = 0; i < 2; i++) { | ||
3301 | struct net_device *dev = hw->dev[i]; | ||
3302 | if (dev) { | ||
3303 | netif_device_attach(dev); | ||
3304 | if (netif_running(dev)) | ||
3305 | skge_up(dev); | ||
3306 | } | ||
3307 | } | ||
3308 | return 0; | ||
3309 | } | ||
3310 | #endif | ||
3311 | |||
3312 | static struct pci_driver skge_driver = { | ||
3313 | .name = DRV_NAME, | ||
3314 | .id_table = skge_id_table, | ||
3315 | .probe = skge_probe, | ||
3316 | .remove = __devexit_p(skge_remove), | ||
3317 | #ifdef CONFIG_PM | ||
3318 | .suspend = skge_suspend, | ||
3319 | .resume = skge_resume, | ||
3320 | #endif | ||
3321 | }; | ||
3322 | |||
3323 | static int __init skge_init_module(void) | ||
3324 | { | ||
3325 | return pci_module_init(&skge_driver); | ||
3326 | } | ||
3327 | |||
3328 | static void __exit skge_cleanup_module(void) | ||
3329 | { | ||
3330 | pci_unregister_driver(&skge_driver); | ||
3331 | } | ||
3332 | |||
3333 | module_init(skge_init_module); | ||
3334 | module_exit(skge_cleanup_module); | ||
diff --git a/drivers/net/skge.h b/drivers/net/skge.h new file mode 100644 index 000000000000..fced3d2bc072 --- /dev/null +++ b/drivers/net/skge.h | |||
@@ -0,0 +1,2628 @@ | |||
1 | /* | ||
2 | * Definitions for the new Marvell Yukon / SysKonenct driver. | ||
3 | */ | ||
4 | #ifndef _SKGE_H | ||
5 | #define _SKGE_H | ||
6 | |||
7 | /* PCI config registers */ | ||
8 | #define PCI_DEV_REG1 0x40 | ||
9 | #define PCI_DEV_REG2 0x44 | ||
10 | #define PCI_REV_DESC 0x4 | ||
11 | |||
12 | #define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \ | ||
13 | PCI_STATUS_SIG_SYSTEM_ERROR | \ | ||
14 | PCI_STATUS_REC_MASTER_ABORT | \ | ||
15 | PCI_STATUS_REC_TARGET_ABORT | \ | ||
16 | PCI_STATUS_PARITY) | ||
17 | |||
18 | enum csr_regs { | ||
19 | B0_RAP = 0x0000, | ||
20 | B0_CTST = 0x0004, | ||
21 | B0_LED = 0x0006, | ||
22 | B0_POWER_CTRL = 0x0007, | ||
23 | B0_ISRC = 0x0008, | ||
24 | B0_IMSK = 0x000c, | ||
25 | B0_HWE_ISRC = 0x0010, | ||
26 | B0_HWE_IMSK = 0x0014, | ||
27 | B0_SP_ISRC = 0x0018, | ||
28 | B0_XM1_IMSK = 0x0020, | ||
29 | B0_XM1_ISRC = 0x0028, | ||
30 | B0_XM1_PHY_ADDR = 0x0030, | ||
31 | B0_XM1_PHY_DATA = 0x0034, | ||
32 | B0_XM2_IMSK = 0x0040, | ||
33 | B0_XM2_ISRC = 0x0048, | ||
34 | B0_XM2_PHY_ADDR = 0x0050, | ||
35 | B0_XM2_PHY_DATA = 0x0054, | ||
36 | B0_R1_CSR = 0x0060, | ||
37 | B0_R2_CSR = 0x0064, | ||
38 | B0_XS1_CSR = 0x0068, | ||
39 | B0_XA1_CSR = 0x006c, | ||
40 | B0_XS2_CSR = 0x0070, | ||
41 | B0_XA2_CSR = 0x0074, | ||
42 | |||
43 | B2_MAC_1 = 0x0100, | ||
44 | B2_MAC_2 = 0x0108, | ||
45 | B2_MAC_3 = 0x0110, | ||
46 | B2_CONN_TYP = 0x0118, | ||
47 | B2_PMD_TYP = 0x0119, | ||
48 | B2_MAC_CFG = 0x011a, | ||
49 | B2_CHIP_ID = 0x011b, | ||
50 | B2_E_0 = 0x011c, | ||
51 | B2_E_1 = 0x011d, | ||
52 | B2_E_2 = 0x011e, | ||
53 | B2_E_3 = 0x011f, | ||
54 | B2_FAR = 0x0120, | ||
55 | B2_FDP = 0x0124, | ||
56 | B2_LD_CTRL = 0x0128, | ||
57 | B2_LD_TEST = 0x0129, | ||
58 | B2_TI_INI = 0x0130, | ||
59 | B2_TI_VAL = 0x0134, | ||
60 | B2_TI_CTRL = 0x0138, | ||
61 | B2_TI_TEST = 0x0139, | ||
62 | B2_IRQM_INI = 0x0140, | ||
63 | B2_IRQM_VAL = 0x0144, | ||
64 | B2_IRQM_CTRL = 0x0148, | ||
65 | B2_IRQM_TEST = 0x0149, | ||
66 | B2_IRQM_MSK = 0x014c, | ||
67 | B2_IRQM_HWE_MSK = 0x0150, | ||
68 | B2_TST_CTRL1 = 0x0158, | ||
69 | B2_TST_CTRL2 = 0x0159, | ||
70 | B2_GP_IO = 0x015c, | ||
71 | B2_I2C_CTRL = 0x0160, | ||
72 | B2_I2C_DATA = 0x0164, | ||
73 | B2_I2C_IRQ = 0x0168, | ||
74 | B2_I2C_SW = 0x016c, | ||
75 | B2_BSC_INI = 0x0170, | ||
76 | B2_BSC_VAL = 0x0174, | ||
77 | B2_BSC_CTRL = 0x0178, | ||
78 | B2_BSC_STAT = 0x0179, | ||
79 | B2_BSC_TST = 0x017a, | ||
80 | |||
81 | B3_RAM_ADDR = 0x0180, | ||
82 | B3_RAM_DATA_LO = 0x0184, | ||
83 | B3_RAM_DATA_HI = 0x0188, | ||
84 | B3_RI_WTO_R1 = 0x0190, | ||
85 | B3_RI_WTO_XA1 = 0x0191, | ||
86 | B3_RI_WTO_XS1 = 0x0192, | ||
87 | B3_RI_RTO_R1 = 0x0193, | ||
88 | B3_RI_RTO_XA1 = 0x0194, | ||
89 | B3_RI_RTO_XS1 = 0x0195, | ||
90 | B3_RI_WTO_R2 = 0x0196, | ||
91 | B3_RI_WTO_XA2 = 0x0197, | ||
92 | B3_RI_WTO_XS2 = 0x0198, | ||
93 | B3_RI_RTO_R2 = 0x0199, | ||
94 | B3_RI_RTO_XA2 = 0x019a, | ||
95 | B3_RI_RTO_XS2 = 0x019b, | ||
96 | B3_RI_TO_VAL = 0x019c, | ||
97 | B3_RI_CTRL = 0x01a0, | ||
98 | B3_RI_TEST = 0x01a2, | ||
99 | B3_MA_TOINI_RX1 = 0x01b0, | ||
100 | B3_MA_TOINI_RX2 = 0x01b1, | ||
101 | B3_MA_TOINI_TX1 = 0x01b2, | ||
102 | B3_MA_TOINI_TX2 = 0x01b3, | ||
103 | B3_MA_TOVAL_RX1 = 0x01b4, | ||
104 | B3_MA_TOVAL_RX2 = 0x01b5, | ||
105 | B3_MA_TOVAL_TX1 = 0x01b6, | ||
106 | B3_MA_TOVAL_TX2 = 0x01b7, | ||
107 | B3_MA_TO_CTRL = 0x01b8, | ||
108 | B3_MA_TO_TEST = 0x01ba, | ||
109 | B3_MA_RCINI_RX1 = 0x01c0, | ||
110 | B3_MA_RCINI_RX2 = 0x01c1, | ||
111 | B3_MA_RCINI_TX1 = 0x01c2, | ||
112 | B3_MA_RCINI_TX2 = 0x01c3, | ||
113 | B3_MA_RCVAL_RX1 = 0x01c4, | ||
114 | B3_MA_RCVAL_RX2 = 0x01c5, | ||
115 | B3_MA_RCVAL_TX1 = 0x01c6, | ||
116 | B3_MA_RCVAL_TX2 = 0x01c7, | ||
117 | B3_MA_RC_CTRL = 0x01c8, | ||
118 | B3_MA_RC_TEST = 0x01ca, | ||
119 | B3_PA_TOINI_RX1 = 0x01d0, | ||
120 | B3_PA_TOINI_RX2 = 0x01d4, | ||
121 | B3_PA_TOINI_TX1 = 0x01d8, | ||
122 | B3_PA_TOINI_TX2 = 0x01dc, | ||
123 | B3_PA_TOVAL_RX1 = 0x01e0, | ||
124 | B3_PA_TOVAL_RX2 = 0x01e4, | ||
125 | B3_PA_TOVAL_TX1 = 0x01e8, | ||
126 | B3_PA_TOVAL_TX2 = 0x01ec, | ||
127 | B3_PA_CTRL = 0x01f0, | ||
128 | B3_PA_TEST = 0x01f2, | ||
129 | }; | ||
130 | |||
131 | /* B0_CTST 16 bit Control/Status register */ | ||
132 | enum { | ||
133 | CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */ | ||
134 | CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */ | ||
135 | CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */ | ||
136 | CS_VAUX_AVAIL = 1<<10,/* VAUX available (YUKON only) */ | ||
137 | CS_BUS_CLOCK = 1<<9, /* Bus Clock 0/1 = 33/66 MHz */ | ||
138 | CS_BUS_SLOT_SZ = 1<<8, /* Slot Size 0/1 = 32/64 bit slot */ | ||
139 | CS_ST_SW_IRQ = 1<<7, /* Set IRQ SW Request */ | ||
140 | CS_CL_SW_IRQ = 1<<6, /* Clear IRQ SW Request */ | ||
141 | CS_STOP_DONE = 1<<5, /* Stop Master is finished */ | ||
142 | CS_STOP_MAST = 1<<4, /* Command Bit to stop the master */ | ||
143 | CS_MRST_CLR = 1<<3, /* Clear Master reset */ | ||
144 | CS_MRST_SET = 1<<2, /* Set Master reset */ | ||
145 | CS_RST_CLR = 1<<1, /* Clear Software reset */ | ||
146 | CS_RST_SET = 1, /* Set Software reset */ | ||
147 | |||
148 | /* B0_LED 8 Bit LED register */ | ||
149 | /* Bit 7.. 2: reserved */ | ||
150 | LED_STAT_ON = 1<<1, /* Status LED on */ | ||
151 | LED_STAT_OFF = 1, /* Status LED off */ | ||
152 | |||
153 | /* B0_POWER_CTRL 8 Bit Power Control reg (YUKON only) */ | ||
154 | PC_VAUX_ENA = 1<<7, /* Switch VAUX Enable */ | ||
155 | PC_VAUX_DIS = 1<<6, /* Switch VAUX Disable */ | ||
156 | PC_VCC_ENA = 1<<5, /* Switch VCC Enable */ | ||
157 | PC_VCC_DIS = 1<<4, /* Switch VCC Disable */ | ||
158 | PC_VAUX_ON = 1<<3, /* Switch VAUX On */ | ||
159 | PC_VAUX_OFF = 1<<2, /* Switch VAUX Off */ | ||
160 | PC_VCC_ON = 1<<1, /* Switch VCC On */ | ||
161 | PC_VCC_OFF = 1<<0, /* Switch VCC Off */ | ||
162 | }; | ||
163 | |||
164 | /* B2_IRQM_MSK 32 bit IRQ Moderation Mask */ | ||
165 | enum { | ||
166 | IS_ALL_MSK = 0xbffffffful, /* All Interrupt bits */ | ||
167 | IS_HW_ERR = 1<<31, /* Interrupt HW Error */ | ||
168 | /* Bit 30: reserved */ | ||
169 | IS_PA_TO_RX1 = 1<<29, /* Packet Arb Timeout Rx1 */ | ||
170 | IS_PA_TO_RX2 = 1<<28, /* Packet Arb Timeout Rx2 */ | ||
171 | IS_PA_TO_TX1 = 1<<27, /* Packet Arb Timeout Tx1 */ | ||
172 | IS_PA_TO_TX2 = 1<<26, /* Packet Arb Timeout Tx2 */ | ||
173 | IS_I2C_READY = 1<<25, /* IRQ on end of I2C Tx */ | ||
174 | IS_IRQ_SW = 1<<24, /* SW forced IRQ */ | ||
175 | IS_EXT_REG = 1<<23, /* IRQ from LM80 or PHY (GENESIS only) */ | ||
176 | /* IRQ from PHY (YUKON only) */ | ||
177 | IS_TIMINT = 1<<22, /* IRQ from Timer */ | ||
178 | IS_MAC1 = 1<<21, /* IRQ from MAC 1 */ | ||
179 | IS_LNK_SYNC_M1 = 1<<20, /* Link Sync Cnt wrap MAC 1 */ | ||
180 | IS_MAC2 = 1<<19, /* IRQ from MAC 2 */ | ||
181 | IS_LNK_SYNC_M2 = 1<<18, /* Link Sync Cnt wrap MAC 2 */ | ||
182 | /* Receive Queue 1 */ | ||
183 | IS_R1_B = 1<<17, /* Q_R1 End of Buffer */ | ||
184 | IS_R1_F = 1<<16, /* Q_R1 End of Frame */ | ||
185 | IS_R1_C = 1<<15, /* Q_R1 Encoding Error */ | ||
186 | /* Receive Queue 2 */ | ||
187 | IS_R2_B = 1<<14, /* Q_R2 End of Buffer */ | ||
188 | IS_R2_F = 1<<13, /* Q_R2 End of Frame */ | ||
189 | IS_R2_C = 1<<12, /* Q_R2 Encoding Error */ | ||
190 | /* Synchronous Transmit Queue 1 */ | ||
191 | IS_XS1_B = 1<<11, /* Q_XS1 End of Buffer */ | ||
192 | IS_XS1_F = 1<<10, /* Q_XS1 End of Frame */ | ||
193 | IS_XS1_C = 1<<9, /* Q_XS1 Encoding Error */ | ||
194 | /* Asynchronous Transmit Queue 1 */ | ||
195 | IS_XA1_B = 1<<8, /* Q_XA1 End of Buffer */ | ||
196 | IS_XA1_F = 1<<7, /* Q_XA1 End of Frame */ | ||
197 | IS_XA1_C = 1<<6, /* Q_XA1 Encoding Error */ | ||
198 | /* Synchronous Transmit Queue 2 */ | ||
199 | IS_XS2_B = 1<<5, /* Q_XS2 End of Buffer */ | ||
200 | IS_XS2_F = 1<<4, /* Q_XS2 End of Frame */ | ||
201 | IS_XS2_C = 1<<3, /* Q_XS2 Encoding Error */ | ||
202 | /* Asynchronous Transmit Queue 2 */ | ||
203 | IS_XA2_B = 1<<2, /* Q_XA2 End of Buffer */ | ||
204 | IS_XA2_F = 1<<1, /* Q_XA2 End of Frame */ | ||
205 | IS_XA2_C = 1<<0, /* Q_XA2 Encoding Error */ | ||
206 | |||
207 | IS_TO_PORT1 = IS_PA_TO_RX1 | IS_PA_TO_TX1, | ||
208 | IS_TO_PORT2 = IS_PA_TO_RX2 | IS_PA_TO_TX2, | ||
209 | |||
210 | IS_PORT_1 = IS_XA1_F| IS_R1_F | IS_TO_PORT1 | IS_MAC1, | ||
211 | IS_PORT_2 = IS_XA2_F| IS_R2_F | IS_TO_PORT2 | IS_MAC2, | ||
212 | }; | ||
213 | |||
214 | |||
215 | /* B2_IRQM_HWE_MSK 32 bit IRQ Moderation HW Error Mask */ | ||
216 | enum { | ||
217 | IS_ERR_MSK = 0x00003fff,/* All Error bits */ | ||
218 | |||
219 | IS_IRQ_TIST_OV = 1<<13, /* Time Stamp Timer Overflow (YUKON only) */ | ||
220 | IS_IRQ_SENSOR = 1<<12, /* IRQ from Sensor (YUKON only) */ | ||
221 | IS_IRQ_MST_ERR = 1<<11, /* IRQ master error detected */ | ||
222 | IS_IRQ_STAT = 1<<10, /* IRQ status exception */ | ||
223 | IS_NO_STAT_M1 = 1<<9, /* No Rx Status from MAC 1 */ | ||
224 | IS_NO_STAT_M2 = 1<<8, /* No Rx Status from MAC 2 */ | ||
225 | IS_NO_TIST_M1 = 1<<7, /* No Time Stamp from MAC 1 */ | ||
226 | IS_NO_TIST_M2 = 1<<6, /* No Time Stamp from MAC 2 */ | ||
227 | IS_RAM_RD_PAR = 1<<5, /* RAM Read Parity Error */ | ||
228 | IS_RAM_WR_PAR = 1<<4, /* RAM Write Parity Error */ | ||
229 | IS_M1_PAR_ERR = 1<<3, /* MAC 1 Parity Error */ | ||
230 | IS_M2_PAR_ERR = 1<<2, /* MAC 2 Parity Error */ | ||
231 | IS_R1_PAR_ERR = 1<<1, /* Queue R1 Parity Error */ | ||
232 | IS_R2_PAR_ERR = 1<<0, /* Queue R2 Parity Error */ | ||
233 | }; | ||
234 | |||
235 | /* B2_TST_CTRL1 8 bit Test Control Register 1 */ | ||
236 | enum { | ||
237 | TST_FRC_DPERR_MR = 1<<7, /* force DATAPERR on MST RD */ | ||
238 | TST_FRC_DPERR_MW = 1<<6, /* force DATAPERR on MST WR */ | ||
239 | TST_FRC_DPERR_TR = 1<<5, /* force DATAPERR on TRG RD */ | ||
240 | TST_FRC_DPERR_TW = 1<<4, /* force DATAPERR on TRG WR */ | ||
241 | TST_FRC_APERR_M = 1<<3, /* force ADDRPERR on MST */ | ||
242 | TST_FRC_APERR_T = 1<<2, /* force ADDRPERR on TRG */ | ||
243 | TST_CFG_WRITE_ON = 1<<1, /* Enable Config Reg WR */ | ||
244 | TST_CFG_WRITE_OFF= 1<<0, /* Disable Config Reg WR */ | ||
245 | }; | ||
246 | |||
247 | /* B2_MAC_CFG 8 bit MAC Configuration / Chip Revision */ | ||
248 | enum { | ||
249 | CFG_CHIP_R_MSK = 0xf<<4, /* Bit 7.. 4: Chip Revision */ | ||
250 | /* Bit 3.. 2: reserved */ | ||
251 | CFG_DIS_M2_CLK = 1<<1, /* Disable Clock for 2nd MAC */ | ||
252 | CFG_SNG_MAC = 1<<0, /* MAC Config: 0=2 MACs / 1=1 MAC*/ | ||
253 | }; | ||
254 | |||
255 | /* B2_CHIP_ID 8 bit Chip Identification Number */ | ||
256 | enum { | ||
257 | CHIP_ID_GENESIS = 0x0a, /* Chip ID for GENESIS */ | ||
258 | CHIP_ID_YUKON = 0xb0, /* Chip ID for YUKON */ | ||
259 | CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */ | ||
260 | CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */ | ||
261 | CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */ | ||
262 | CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */ | ||
263 | CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */ | ||
264 | |||
265 | CHIP_REV_YU_LITE_A1 = 3, /* Chip Rev. for YUKON-Lite A1,A2 */ | ||
266 | CHIP_REV_YU_LITE_A3 = 7, /* Chip Rev. for YUKON-Lite A3 */ | ||
267 | }; | ||
268 | |||
269 | /* B2_TI_CTRL 8 bit Timer control */ | ||
270 | /* B2_IRQM_CTRL 8 bit IRQ Moderation Timer Control */ | ||
271 | enum { | ||
272 | TIM_START = 1<<2, /* Start Timer */ | ||
273 | TIM_STOP = 1<<1, /* Stop Timer */ | ||
274 | TIM_CLR_IRQ = 1<<0, /* Clear Timer IRQ (!IRQM) */ | ||
275 | }; | ||
276 | |||
277 | /* B2_TI_TEST 8 Bit Timer Test */ | ||
278 | /* B2_IRQM_TEST 8 bit IRQ Moderation Timer Test */ | ||
279 | /* B28_DPT_TST 8 bit Descriptor Poll Timer Test Reg */ | ||
280 | enum { | ||
281 | TIM_T_ON = 1<<2, /* Test mode on */ | ||
282 | TIM_T_OFF = 1<<1, /* Test mode off */ | ||
283 | TIM_T_STEP = 1<<0, /* Test step */ | ||
284 | }; | ||
285 | |||
286 | /* B2_GP_IO 32 bit General Purpose I/O Register */ | ||
287 | enum { | ||
288 | GP_DIR_9 = 1<<25, /* IO_9 direct, 0=In/1=Out */ | ||
289 | GP_DIR_8 = 1<<24, /* IO_8 direct, 0=In/1=Out */ | ||
290 | GP_DIR_7 = 1<<23, /* IO_7 direct, 0=In/1=Out */ | ||
291 | GP_DIR_6 = 1<<22, /* IO_6 direct, 0=In/1=Out */ | ||
292 | GP_DIR_5 = 1<<21, /* IO_5 direct, 0=In/1=Out */ | ||
293 | GP_DIR_4 = 1<<20, /* IO_4 direct, 0=In/1=Out */ | ||
294 | GP_DIR_3 = 1<<19, /* IO_3 direct, 0=In/1=Out */ | ||
295 | GP_DIR_2 = 1<<18, /* IO_2 direct, 0=In/1=Out */ | ||
296 | GP_DIR_1 = 1<<17, /* IO_1 direct, 0=In/1=Out */ | ||
297 | GP_DIR_0 = 1<<16, /* IO_0 direct, 0=In/1=Out */ | ||
298 | |||
299 | GP_IO_9 = 1<<9, /* IO_9 pin */ | ||
300 | GP_IO_8 = 1<<8, /* IO_8 pin */ | ||
301 | GP_IO_7 = 1<<7, /* IO_7 pin */ | ||
302 | GP_IO_6 = 1<<6, /* IO_6 pin */ | ||
303 | GP_IO_5 = 1<<5, /* IO_5 pin */ | ||
304 | GP_IO_4 = 1<<4, /* IO_4 pin */ | ||
305 | GP_IO_3 = 1<<3, /* IO_3 pin */ | ||
306 | GP_IO_2 = 1<<2, /* IO_2 pin */ | ||
307 | GP_IO_1 = 1<<1, /* IO_1 pin */ | ||
308 | GP_IO_0 = 1<<0, /* IO_0 pin */ | ||
309 | }; | ||
310 | |||
311 | /* Descriptor Bit Definition */ | ||
312 | /* TxCtrl Transmit Buffer Control Field */ | ||
313 | /* RxCtrl Receive Buffer Control Field */ | ||
314 | enum { | ||
315 | BMU_OWN = 1<<31, /* OWN bit: 0=host/1=BMU */ | ||
316 | BMU_STF = 1<<30, /* Start of Frame */ | ||
317 | BMU_EOF = 1<<29, /* End of Frame */ | ||
318 | BMU_IRQ_EOB = 1<<28, /* Req "End of Buffer" IRQ */ | ||
319 | BMU_IRQ_EOF = 1<<27, /* Req "End of Frame" IRQ */ | ||
320 | /* TxCtrl specific bits */ | ||
321 | BMU_STFWD = 1<<26, /* (Tx) Store & Forward Frame */ | ||
322 | BMU_NO_FCS = 1<<25, /* (Tx) Disable MAC FCS (CRC) generation */ | ||
323 | BMU_SW = 1<<24, /* (Tx) 1 bit res. for SW use */ | ||
324 | /* RxCtrl specific bits */ | ||
325 | BMU_DEV_0 = 1<<26, /* (Rx) Transfer data to Dev0 */ | ||
326 | BMU_STAT_VAL = 1<<25, /* (Rx) Rx Status Valid */ | ||
327 | BMU_TIST_VAL = 1<<24, /* (Rx) Rx TimeStamp Valid */ | ||
328 | /* Bit 23..16: BMU Check Opcodes */ | ||
329 | BMU_CHECK = 0x55<<16, /* Default BMU check */ | ||
330 | BMU_TCP_CHECK = 0x56<<16, /* Descr with TCP ext */ | ||
331 | BMU_UDP_CHECK = 0x57<<16, /* Descr with UDP ext (YUKON only) */ | ||
332 | BMU_BBC = 0xffffL, /* Bit 15.. 0: Buffer Byte Counter */ | ||
333 | }; | ||
334 | |||
335 | /* B2_BSC_CTRL 8 bit Blink Source Counter Control */ | ||
336 | enum { | ||
337 | BSC_START = 1<<1, /* Start Blink Source Counter */ | ||
338 | BSC_STOP = 1<<0, /* Stop Blink Source Counter */ | ||
339 | }; | ||
340 | |||
341 | /* B2_BSC_STAT 8 bit Blink Source Counter Status */ | ||
342 | enum { | ||
343 | BSC_SRC = 1<<0, /* Blink Source, 0=Off / 1=On */ | ||
344 | }; | ||
345 | |||
346 | /* B2_BSC_TST 16 bit Blink Source Counter Test Reg */ | ||
347 | enum { | ||
348 | BSC_T_ON = 1<<2, /* Test mode on */ | ||
349 | BSC_T_OFF = 1<<1, /* Test mode off */ | ||
350 | BSC_T_STEP = 1<<0, /* Test step */ | ||
351 | }; | ||
352 | |||
353 | /* B3_RAM_ADDR 32 bit RAM Address, to read or write */ | ||
354 | /* Bit 31..19: reserved */ | ||
355 | #define RAM_ADR_RAN 0x0007ffffL /* Bit 18.. 0: RAM Address Range */ | ||
356 | /* RAM Interface Registers */ | ||
357 | |||
358 | /* B3_RI_CTRL 16 bit RAM Iface Control Register */ | ||
359 | enum { | ||
360 | RI_CLR_RD_PERR = 1<<9, /* Clear IRQ RAM Read Parity Err */ | ||
361 | RI_CLR_WR_PERR = 1<<8, /* Clear IRQ RAM Write Parity Err*/ | ||
362 | |||
363 | RI_RST_CLR = 1<<1, /* Clear RAM Interface Reset */ | ||
364 | RI_RST_SET = 1<<0, /* Set RAM Interface Reset */ | ||
365 | }; | ||
366 | |||
367 | /* MAC Arbiter Registers */ | ||
368 | /* B3_MA_TO_CTRL 16 bit MAC Arbiter Timeout Ctrl Reg */ | ||
369 | enum { | ||
370 | MA_FOE_ON = 1<<3, /* XMAC Fast Output Enable ON */ | ||
371 | MA_FOE_OFF = 1<<2, /* XMAC Fast Output Enable OFF */ | ||
372 | MA_RST_CLR = 1<<1, /* Clear MAC Arbiter Reset */ | ||
373 | MA_RST_SET = 1<<0, /* Set MAC Arbiter Reset */ | ||
374 | |||
375 | }; | ||
376 | |||
377 | /* Timeout values */ | ||
378 | #define SK_MAC_TO_53 72 /* MAC arbiter timeout */ | ||
379 | #define SK_PKT_TO_53 0x2000 /* Packet arbiter timeout */ | ||
380 | #define SK_PKT_TO_MAX 0xffff /* Maximum value */ | ||
381 | #define SK_RI_TO_53 36 /* RAM interface timeout */ | ||
382 | |||
383 | /* Packet Arbiter Registers */ | ||
384 | /* B3_PA_CTRL 16 bit Packet Arbiter Ctrl Register */ | ||
385 | enum { | ||
386 | PA_CLR_TO_TX2 = 1<<13, /* Clear IRQ Packet Timeout TX2 */ | ||
387 | PA_CLR_TO_TX1 = 1<<12, /* Clear IRQ Packet Timeout TX1 */ | ||
388 | PA_CLR_TO_RX2 = 1<<11, /* Clear IRQ Packet Timeout RX2 */ | ||
389 | PA_CLR_TO_RX1 = 1<<10, /* Clear IRQ Packet Timeout RX1 */ | ||
390 | PA_ENA_TO_TX2 = 1<<9, /* Enable Timeout Timer TX2 */ | ||
391 | PA_DIS_TO_TX2 = 1<<8, /* Disable Timeout Timer TX2 */ | ||
392 | PA_ENA_TO_TX1 = 1<<7, /* Enable Timeout Timer TX1 */ | ||
393 | PA_DIS_TO_TX1 = 1<<6, /* Disable Timeout Timer TX1 */ | ||
394 | PA_ENA_TO_RX2 = 1<<5, /* Enable Timeout Timer RX2 */ | ||
395 | PA_DIS_TO_RX2 = 1<<4, /* Disable Timeout Timer RX2 */ | ||
396 | PA_ENA_TO_RX1 = 1<<3, /* Enable Timeout Timer RX1 */ | ||
397 | PA_DIS_TO_RX1 = 1<<2, /* Disable Timeout Timer RX1 */ | ||
398 | PA_RST_CLR = 1<<1, /* Clear MAC Arbiter Reset */ | ||
399 | PA_RST_SET = 1<<0, /* Set MAC Arbiter Reset */ | ||
400 | }; | ||
401 | |||
402 | #define PA_ENA_TO_ALL (PA_ENA_TO_RX1 | PA_ENA_TO_RX2 |\ | ||
403 | PA_ENA_TO_TX1 | PA_ENA_TO_TX2) | ||
404 | |||
405 | |||
406 | /* Transmit Arbiter Registers MAC 1 and 2, use SK_REG() to access */ | ||
407 | /* TXA_ITI_INI 32 bit Tx Arb Interval Timer Init Val */ | ||
408 | /* TXA_ITI_VAL 32 bit Tx Arb Interval Timer Value */ | ||
409 | /* TXA_LIM_INI 32 bit Tx Arb Limit Counter Init Val */ | ||
410 | /* TXA_LIM_VAL 32 bit Tx Arb Limit Counter Value */ | ||
411 | |||
412 | #define TXA_MAX_VAL 0x00ffffffUL /* Bit 23.. 0: Max TXA Timer/Cnt Val */ | ||
413 | |||
414 | /* TXA_CTRL 8 bit Tx Arbiter Control Register */ | ||
415 | enum { | ||
416 | TXA_ENA_FSYNC = 1<<7, /* Enable force of sync Tx queue */ | ||
417 | TXA_DIS_FSYNC = 1<<6, /* Disable force of sync Tx queue */ | ||
418 | TXA_ENA_ALLOC = 1<<5, /* Enable alloc of free bandwidth */ | ||
419 | TXA_DIS_ALLOC = 1<<4, /* Disable alloc of free bandwidth */ | ||
420 | TXA_START_RC = 1<<3, /* Start sync Rate Control */ | ||
421 | TXA_STOP_RC = 1<<2, /* Stop sync Rate Control */ | ||
422 | TXA_ENA_ARB = 1<<1, /* Enable Tx Arbiter */ | ||
423 | TXA_DIS_ARB = 1<<0, /* Disable Tx Arbiter */ | ||
424 | }; | ||
425 | |||
426 | /* | ||
427 | * Bank 4 - 5 | ||
428 | */ | ||
429 | /* Transmit Arbiter Registers MAC 1 and 2, use SK_REG() to access */ | ||
430 | enum { | ||
431 | TXA_ITI_INI = 0x0200,/* 32 bit Tx Arb Interval Timer Init Val*/ | ||
432 | TXA_ITI_VAL = 0x0204,/* 32 bit Tx Arb Interval Timer Value */ | ||
433 | TXA_LIM_INI = 0x0208,/* 32 bit Tx Arb Limit Counter Init Val */ | ||
434 | TXA_LIM_VAL = 0x020c,/* 32 bit Tx Arb Limit Counter Value */ | ||
435 | TXA_CTRL = 0x0210,/* 8 bit Tx Arbiter Control Register */ | ||
436 | TXA_TEST = 0x0211,/* 8 bit Tx Arbiter Test Register */ | ||
437 | TXA_STAT = 0x0212,/* 8 bit Tx Arbiter Status Register */ | ||
438 | }; | ||
439 | |||
440 | |||
441 | enum { | ||
442 | B6_EXT_REG = 0x0300,/* External registers (GENESIS only) */ | ||
443 | B7_CFG_SPC = 0x0380,/* copy of the Configuration register */ | ||
444 | B8_RQ1_REGS = 0x0400,/* Receive Queue 1 */ | ||
445 | B8_RQ2_REGS = 0x0480,/* Receive Queue 2 */ | ||
446 | B8_TS1_REGS = 0x0600,/* Transmit sync queue 1 */ | ||
447 | B8_TA1_REGS = 0x0680,/* Transmit async queue 1 */ | ||
448 | B8_TS2_REGS = 0x0700,/* Transmit sync queue 2 */ | ||
449 | B8_TA2_REGS = 0x0780,/* Transmit sync queue 2 */ | ||
450 | B16_RAM_REGS = 0x0800,/* RAM Buffer Registers */ | ||
451 | }; | ||
452 | |||
453 | /* Queue Register Offsets, use Q_ADDR() to access */ | ||
454 | enum { | ||
455 | B8_Q_REGS = 0x0400, /* base of Queue registers */ | ||
456 | Q_D = 0x00, /* 8*32 bit Current Descriptor */ | ||
457 | Q_DA_L = 0x20, /* 32 bit Current Descriptor Address Low dWord */ | ||
458 | Q_DA_H = 0x24, /* 32 bit Current Descriptor Address High dWord */ | ||
459 | Q_AC_L = 0x28, /* 32 bit Current Address Counter Low dWord */ | ||
460 | Q_AC_H = 0x2c, /* 32 bit Current Address Counter High dWord */ | ||
461 | Q_BC = 0x30, /* 32 bit Current Byte Counter */ | ||
462 | Q_CSR = 0x34, /* 32 bit BMU Control/Status Register */ | ||
463 | Q_F = 0x38, /* 32 bit Flag Register */ | ||
464 | Q_T1 = 0x3c, /* 32 bit Test Register 1 */ | ||
465 | Q_T1_TR = 0x3c, /* 8 bit Test Register 1 Transfer SM */ | ||
466 | Q_T1_WR = 0x3d, /* 8 bit Test Register 1 Write Descriptor SM */ | ||
467 | Q_T1_RD = 0x3e, /* 8 bit Test Register 1 Read Descriptor SM */ | ||
468 | Q_T1_SV = 0x3f, /* 8 bit Test Register 1 Supervisor SM */ | ||
469 | Q_T2 = 0x40, /* 32 bit Test Register 2 */ | ||
470 | Q_T3 = 0x44, /* 32 bit Test Register 3 */ | ||
471 | |||
472 | /* Yukon-2 */ | ||
473 | Q_DONE = 0x24, /* 16 bit Done Index (Yukon-2 only) */ | ||
474 | Q_WM = 0x40, /* 16 bit FIFO Watermark */ | ||
475 | Q_AL = 0x42, /* 8 bit FIFO Alignment */ | ||
476 | Q_RSP = 0x44, /* 16 bit FIFO Read Shadow Pointer */ | ||
477 | Q_RSL = 0x46, /* 8 bit FIFO Read Shadow Level */ | ||
478 | Q_RP = 0x48, /* 8 bit FIFO Read Pointer */ | ||
479 | Q_RL = 0x4a, /* 8 bit FIFO Read Level */ | ||
480 | Q_WP = 0x4c, /* 8 bit FIFO Write Pointer */ | ||
481 | Q_WSP = 0x4d, /* 8 bit FIFO Write Shadow Pointer */ | ||
482 | Q_WL = 0x4e, /* 8 bit FIFO Write Level */ | ||
483 | Q_WSL = 0x4f, /* 8 bit FIFO Write Shadow Level */ | ||
484 | }; | ||
485 | #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) | ||
486 | |||
487 | /* RAM Buffer Register Offsets */ | ||
488 | enum { | ||
489 | |||
490 | RB_START = 0x00,/* 32 bit RAM Buffer Start Address */ | ||
491 | RB_END = 0x04,/* 32 bit RAM Buffer End Address */ | ||
492 | RB_WP = 0x08,/* 32 bit RAM Buffer Write Pointer */ | ||
493 | RB_RP = 0x0c,/* 32 bit RAM Buffer Read Pointer */ | ||
494 | RB_RX_UTPP = 0x10,/* 32 bit Rx Upper Threshold, Pause Packet */ | ||
495 | RB_RX_LTPP = 0x14,/* 32 bit Rx Lower Threshold, Pause Packet */ | ||
496 | RB_RX_UTHP = 0x18,/* 32 bit Rx Upper Threshold, High Prio */ | ||
497 | RB_RX_LTHP = 0x1c,/* 32 bit Rx Lower Threshold, High Prio */ | ||
498 | /* 0x10 - 0x1f: reserved at Tx RAM Buffer Registers */ | ||
499 | RB_PC = 0x20,/* 32 bit RAM Buffer Packet Counter */ | ||
500 | RB_LEV = 0x24,/* 32 bit RAM Buffer Level Register */ | ||
501 | RB_CTRL = 0x28,/* 32 bit RAM Buffer Control Register */ | ||
502 | RB_TST1 = 0x29,/* 8 bit RAM Buffer Test Register 1 */ | ||
503 | RB_TST2 = 0x2a,/* 8 bit RAM Buffer Test Register 2 */ | ||
504 | }; | ||
505 | |||
506 | /* Receive and Transmit Queues */ | ||
507 | enum { | ||
508 | Q_R1 = 0x0000, /* Receive Queue 1 */ | ||
509 | Q_R2 = 0x0080, /* Receive Queue 2 */ | ||
510 | Q_XS1 = 0x0200, /* Synchronous Transmit Queue 1 */ | ||
511 | Q_XA1 = 0x0280, /* Asynchronous Transmit Queue 1 */ | ||
512 | Q_XS2 = 0x0300, /* Synchronous Transmit Queue 2 */ | ||
513 | Q_XA2 = 0x0380, /* Asynchronous Transmit Queue 2 */ | ||
514 | }; | ||
515 | |||
516 | /* Different MAC Types */ | ||
517 | enum { | ||
518 | SK_MAC_XMAC = 0, /* Xaqti XMAC II */ | ||
519 | SK_MAC_GMAC = 1, /* Marvell GMAC */ | ||
520 | }; | ||
521 | |||
522 | /* Different PHY Types */ | ||
523 | enum { | ||
524 | SK_PHY_XMAC = 0,/* integrated in XMAC II */ | ||
525 | SK_PHY_BCOM = 1,/* Broadcom BCM5400 */ | ||
526 | SK_PHY_LONE = 2,/* Level One LXT1000 [not supported]*/ | ||
527 | SK_PHY_NAT = 3,/* National DP83891 [not supported] */ | ||
528 | SK_PHY_MARV_COPPER= 4,/* Marvell 88E1011S */ | ||
529 | SK_PHY_MARV_FIBER = 5,/* Marvell 88E1011S working on fiber */ | ||
530 | }; | ||
531 | |||
532 | /* PHY addresses (bits 12..8 of PHY address reg) */ | ||
533 | enum { | ||
534 | PHY_ADDR_XMAC = 0<<8, | ||
535 | PHY_ADDR_BCOM = 1<<8, | ||
536 | |||
537 | /* GPHY address (bits 15..11 of SMI control reg) */ | ||
538 | PHY_ADDR_MARV = 0, | ||
539 | }; | ||
540 | |||
541 | #define RB_ADDR(offs, queue) (B16_RAM_REGS + (queue) + (offs)) | ||
542 | |||
543 | /* Receive MAC FIFO, Receive LED, and Link_Sync regs (GENESIS only) */ | ||
544 | enum { | ||
545 | RX_MFF_EA = 0x0c00,/* 32 bit Receive MAC FIFO End Address */ | ||
546 | RX_MFF_WP = 0x0c04,/* 32 bit Receive MAC FIFO Write Pointer */ | ||
547 | |||
548 | RX_MFF_RP = 0x0c0c,/* 32 bit Receive MAC FIFO Read Pointer */ | ||
549 | RX_MFF_PC = 0x0c10,/* 32 bit Receive MAC FIFO Packet Cnt */ | ||
550 | RX_MFF_LEV = 0x0c14,/* 32 bit Receive MAC FIFO Level */ | ||
551 | RX_MFF_CTRL1 = 0x0c18,/* 16 bit Receive MAC FIFO Control Reg 1*/ | ||
552 | RX_MFF_STAT_TO = 0x0c1a,/* 8 bit Receive MAC Status Timeout */ | ||
553 | RX_MFF_TIST_TO = 0x0c1b,/* 8 bit Receive MAC Time Stamp Timeout */ | ||
554 | RX_MFF_CTRL2 = 0x0c1c,/* 8 bit Receive MAC FIFO Control Reg 2*/ | ||
555 | RX_MFF_TST1 = 0x0c1d,/* 8 bit Receive MAC FIFO Test Reg 1 */ | ||
556 | RX_MFF_TST2 = 0x0c1e,/* 8 bit Receive MAC FIFO Test Reg 2 */ | ||
557 | |||
558 | RX_LED_INI = 0x0c20,/* 32 bit Receive LED Cnt Init Value */ | ||
559 | RX_LED_VAL = 0x0c24,/* 32 bit Receive LED Cnt Current Value */ | ||
560 | RX_LED_CTRL = 0x0c28,/* 8 bit Receive LED Cnt Control Reg */ | ||
561 | RX_LED_TST = 0x0c29,/* 8 bit Receive LED Cnt Test Register */ | ||
562 | |||
563 | LNK_SYNC_INI = 0x0c30,/* 32 bit Link Sync Cnt Init Value */ | ||
564 | LNK_SYNC_VAL = 0x0c34,/* 32 bit Link Sync Cnt Current Value */ | ||
565 | LNK_SYNC_CTRL = 0x0c38,/* 8 bit Link Sync Cnt Control Register */ | ||
566 | LNK_SYNC_TST = 0x0c39,/* 8 bit Link Sync Cnt Test Register */ | ||
567 | LNK_LED_REG = 0x0c3c,/* 8 bit Link LED Register */ | ||
568 | }; | ||
569 | |||
570 | /* Receive and Transmit MAC FIFO Registers (GENESIS only) */ | ||
571 | /* RX_MFF_CTRL1 16 bit Receive MAC FIFO Control Reg 1 */ | ||
572 | enum { | ||
573 | MFF_ENA_RDY_PAT = 1<<13, /* Enable Ready Patch */ | ||
574 | MFF_DIS_RDY_PAT = 1<<12, /* Disable Ready Patch */ | ||
575 | MFF_ENA_TIM_PAT = 1<<11, /* Enable Timing Patch */ | ||
576 | MFF_DIS_TIM_PAT = 1<<10, /* Disable Timing Patch */ | ||
577 | MFF_ENA_ALM_FUL = 1<<9, /* Enable AlmostFull Sign */ | ||
578 | MFF_DIS_ALM_FUL = 1<<8, /* Disable AlmostFull Sign */ | ||
579 | MFF_ENA_PAUSE = 1<<7, /* Enable Pause Signaling */ | ||
580 | MFF_DIS_PAUSE = 1<<6, /* Disable Pause Signaling */ | ||
581 | MFF_ENA_FLUSH = 1<<5, /* Enable Frame Flushing */ | ||
582 | MFF_DIS_FLUSH = 1<<4, /* Disable Frame Flushing */ | ||
583 | MFF_ENA_TIST = 1<<3, /* Enable Time Stamp Gener */ | ||
584 | MFF_DIS_TIST = 1<<2, /* Disable Time Stamp Gener */ | ||
585 | MFF_CLR_INTIST = 1<<1, /* Clear IRQ No Time Stamp */ | ||
586 | MFF_CLR_INSTAT = 1<<0, /* Clear IRQ No Status */ | ||
587 | #define MFF_RX_CTRL_DEF MFF_ENA_TIM_PAT | ||
588 | }; | ||
589 | |||
590 | /* TX_MFF_CTRL1 16 bit Transmit MAC FIFO Control Reg 1 */ | ||
591 | enum { | ||
592 | MFF_CLR_PERR = 1<<15, /* Clear Parity Error IRQ */ | ||
593 | /* Bit 14: reserved */ | ||
594 | MFF_ENA_PKT_REC = 1<<13, /* Enable Packet Recovery */ | ||
595 | MFF_DIS_PKT_REC = 1<<12, /* Disable Packet Recovery */ | ||
596 | |||
597 | MFF_ENA_W4E = 1<<7, /* Enable Wait for Empty */ | ||
598 | MFF_DIS_W4E = 1<<6, /* Disable Wait for Empty */ | ||
599 | |||
600 | MFF_ENA_LOOPB = 1<<3, /* Enable Loopback */ | ||
601 | MFF_DIS_LOOPB = 1<<2, /* Disable Loopback */ | ||
602 | MFF_CLR_MAC_RST = 1<<1, /* Clear XMAC Reset */ | ||
603 | MFF_SET_MAC_RST = 1<<0, /* Set XMAC Reset */ | ||
604 | }; | ||
605 | |||
606 | #define MFF_TX_CTRL_DEF (MFF_ENA_PKT_REC | MFF_ENA_TIM_PAT | MFF_ENA_FLUSH) | ||
607 | |||
608 | /* RX_MFF_TST2 8 bit Receive MAC FIFO Test Register 2 */ | ||
609 | /* TX_MFF_TST2 8 bit Transmit MAC FIFO Test Register 2 */ | ||
610 | enum { | ||
611 | MFF_WSP_T_ON = 1<<6, /* Tx: Write Shadow Ptr TestOn */ | ||
612 | MFF_WSP_T_OFF = 1<<5, /* Tx: Write Shadow Ptr TstOff */ | ||
613 | MFF_WSP_INC = 1<<4, /* Tx: Write Shadow Ptr Increment */ | ||
614 | MFF_PC_DEC = 1<<3, /* Packet Counter Decrement */ | ||
615 | MFF_PC_T_ON = 1<<2, /* Packet Counter Test On */ | ||
616 | MFF_PC_T_OFF = 1<<1, /* Packet Counter Test Off */ | ||
617 | MFF_PC_INC = 1<<0, /* Packet Counter Increment */ | ||
618 | }; | ||
619 | |||
620 | /* RX_MFF_TST1 8 bit Receive MAC FIFO Test Register 1 */ | ||
621 | /* TX_MFF_TST1 8 bit Transmit MAC FIFO Test Register 1 */ | ||
622 | enum { | ||
623 | MFF_WP_T_ON = 1<<6, /* Write Pointer Test On */ | ||
624 | MFF_WP_T_OFF = 1<<5, /* Write Pointer Test Off */ | ||
625 | MFF_WP_INC = 1<<4, /* Write Pointer Increm */ | ||
626 | |||
627 | MFF_RP_T_ON = 1<<2, /* Read Pointer Test On */ | ||
628 | MFF_RP_T_OFF = 1<<1, /* Read Pointer Test Off */ | ||
629 | MFF_RP_DEC = 1<<0, /* Read Pointer Decrement */ | ||
630 | }; | ||
631 | |||
632 | /* RX_MFF_CTRL2 8 bit Receive MAC FIFO Control Reg 2 */ | ||
633 | /* TX_MFF_CTRL2 8 bit Transmit MAC FIFO Control Reg 2 */ | ||
634 | enum { | ||
635 | MFF_ENA_OP_MD = 1<<3, /* Enable Operation Mode */ | ||
636 | MFF_DIS_OP_MD = 1<<2, /* Disable Operation Mode */ | ||
637 | MFF_RST_CLR = 1<<1, /* Clear MAC FIFO Reset */ | ||
638 | MFF_RST_SET = 1<<0, /* Set MAC FIFO Reset */ | ||
639 | }; | ||
640 | |||
641 | |||
642 | /* Link LED Counter Registers (GENESIS only) */ | ||
643 | |||
644 | /* RX_LED_CTRL 8 bit Receive LED Cnt Control Reg */ | ||
645 | /* TX_LED_CTRL 8 bit Transmit LED Cnt Control Reg */ | ||
646 | /* LNK_SYNC_CTRL 8 bit Link Sync Cnt Control Register */ | ||
647 | enum { | ||
648 | LED_START = 1<<2, /* Start Timer */ | ||
649 | LED_STOP = 1<<1, /* Stop Timer */ | ||
650 | LED_STATE = 1<<0, /* Rx/Tx: LED State, 1=LED on */ | ||
651 | }; | ||
652 | |||
653 | /* RX_LED_TST 8 bit Receive LED Cnt Test Register */ | ||
654 | /* TX_LED_TST 8 bit Transmit LED Cnt Test Register */ | ||
655 | /* LNK_SYNC_TST 8 bit Link Sync Cnt Test Register */ | ||
656 | enum { | ||
657 | LED_T_ON = 1<<2, /* LED Counter Test mode On */ | ||
658 | LED_T_OFF = 1<<1, /* LED Counter Test mode Off */ | ||
659 | LED_T_STEP = 1<<0, /* LED Counter Step */ | ||
660 | }; | ||
661 | |||
662 | /* LNK_LED_REG 8 bit Link LED Register */ | ||
663 | enum { | ||
664 | LED_BLK_ON = 1<<5, /* Link LED Blinking On */ | ||
665 | LED_BLK_OFF = 1<<4, /* Link LED Blinking Off */ | ||
666 | LED_SYNC_ON = 1<<3, /* Use Sync Wire to switch LED */ | ||
667 | LED_SYNC_OFF = 1<<2, /* Disable Sync Wire Input */ | ||
668 | LED_ON = 1<<1, /* switch LED on */ | ||
669 | LED_OFF = 1<<0, /* switch LED off */ | ||
670 | }; | ||
671 | |||
672 | /* Receive GMAC FIFO (YUKON and Yukon-2) */ | ||
673 | enum { | ||
674 | RX_GMF_EA = 0x0c40,/* 32 bit Rx GMAC FIFO End Address */ | ||
675 | RX_GMF_AF_THR = 0x0c44,/* 32 bit Rx GMAC FIFO Almost Full Thresh. */ | ||
676 | RX_GMF_CTRL_T = 0x0c48,/* 32 bit Rx GMAC FIFO Control/Test */ | ||
677 | RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */ | ||
678 | RX_GMF_FL_THR = 0x0c50,/* 32 bit Rx GMAC FIFO Flush Threshold */ | ||
679 | RX_GMF_TR_THR = 0x0c54,/* 32 bit Rx Truncation Threshold (Yukon-2) */ | ||
680 | |||
681 | RX_GMF_VLAN = 0x0c5c,/* 32 bit Rx VLAN Type Register (Yukon-2) */ | ||
682 | RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */ | ||
683 | |||
684 | RX_GMF_WLEV = 0x0c68,/* 32 bit Rx GMAC FIFO Write Level */ | ||
685 | |||
686 | RX_GMF_RP = 0x0c70,/* 32 bit Rx GMAC FIFO Read Pointer */ | ||
687 | |||
688 | RX_GMF_RLEV = 0x0c78,/* 32 bit Rx GMAC FIFO Read Level */ | ||
689 | }; | ||
690 | |||
691 | |||
692 | /* TXA_TEST 8 bit Tx Arbiter Test Register */ | ||
693 | enum { | ||
694 | TXA_INT_T_ON = 1<<5, /* Tx Arb Interval Timer Test On */ | ||
695 | TXA_INT_T_OFF = 1<<4, /* Tx Arb Interval Timer Test Off */ | ||
696 | TXA_INT_T_STEP = 1<<3, /* Tx Arb Interval Timer Step */ | ||
697 | TXA_LIM_T_ON = 1<<2, /* Tx Arb Limit Timer Test On */ | ||
698 | TXA_LIM_T_OFF = 1<<1, /* Tx Arb Limit Timer Test Off */ | ||
699 | TXA_LIM_T_STEP = 1<<0, /* Tx Arb Limit Timer Step */ | ||
700 | }; | ||
701 | |||
702 | /* TXA_STAT 8 bit Tx Arbiter Status Register */ | ||
703 | enum { | ||
704 | TXA_PRIO_XS = 1<<0, /* sync queue has prio to send */ | ||
705 | }; | ||
706 | |||
707 | |||
708 | /* Q_BC 32 bit Current Byte Counter */ | ||
709 | |||
710 | /* BMU Control Status Registers */ | ||
711 | /* B0_R1_CSR 32 bit BMU Ctrl/Stat Rx Queue 1 */ | ||
712 | /* B0_R2_CSR 32 bit BMU Ctrl/Stat Rx Queue 2 */ | ||
713 | /* B0_XA1_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 1 */ | ||
714 | /* B0_XS1_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 1 */ | ||
715 | /* B0_XA2_CSR 32 bit BMU Ctrl/Stat Sync Tx Queue 2 */ | ||
716 | /* B0_XS2_CSR 32 bit BMU Ctrl/Stat Async Tx Queue 2 */ | ||
717 | /* Q_CSR 32 bit BMU Control/Status Register */ | ||
718 | |||
719 | enum { | ||
720 | CSR_SV_IDLE = 1<<24, /* BMU SM Idle */ | ||
721 | |||
722 | CSR_DESC_CLR = 1<<21, /* Clear Reset for Descr */ | ||
723 | CSR_DESC_SET = 1<<20, /* Set Reset for Descr */ | ||
724 | CSR_FIFO_CLR = 1<<19, /* Clear Reset for FIFO */ | ||
725 | CSR_FIFO_SET = 1<<18, /* Set Reset for FIFO */ | ||
726 | CSR_HPI_RUN = 1<<17, /* Release HPI SM */ | ||
727 | CSR_HPI_RST = 1<<16, /* Reset HPI SM to Idle */ | ||
728 | CSR_SV_RUN = 1<<15, /* Release Supervisor SM */ | ||
729 | CSR_SV_RST = 1<<14, /* Reset Supervisor SM */ | ||
730 | CSR_DREAD_RUN = 1<<13, /* Release Descr Read SM */ | ||
731 | CSR_DREAD_RST = 1<<12, /* Reset Descr Read SM */ | ||
732 | CSR_DWRITE_RUN = 1<<11, /* Release Descr Write SM */ | ||
733 | CSR_DWRITE_RST = 1<<10, /* Reset Descr Write SM */ | ||
734 | CSR_TRANS_RUN = 1<<9, /* Release Transfer SM */ | ||
735 | CSR_TRANS_RST = 1<<8, /* Reset Transfer SM */ | ||
736 | CSR_ENA_POL = 1<<7, /* Enable Descr Polling */ | ||
737 | CSR_DIS_POL = 1<<6, /* Disable Descr Polling */ | ||
738 | CSR_STOP = 1<<5, /* Stop Rx/Tx Queue */ | ||
739 | CSR_START = 1<<4, /* Start Rx/Tx Queue */ | ||
740 | CSR_IRQ_CL_P = 1<<3, /* (Rx) Clear Parity IRQ */ | ||
741 | CSR_IRQ_CL_B = 1<<2, /* Clear EOB IRQ */ | ||
742 | CSR_IRQ_CL_F = 1<<1, /* Clear EOF IRQ */ | ||
743 | CSR_IRQ_CL_C = 1<<0, /* Clear ERR IRQ */ | ||
744 | }; | ||
745 | |||
746 | #define CSR_SET_RESET (CSR_DESC_SET | CSR_FIFO_SET | CSR_HPI_RST |\ | ||
747 | CSR_SV_RST | CSR_DREAD_RST | CSR_DWRITE_RST |\ | ||
748 | CSR_TRANS_RST) | ||
749 | #define CSR_CLR_RESET (CSR_DESC_CLR | CSR_FIFO_CLR | CSR_HPI_RUN |\ | ||
750 | CSR_SV_RUN | CSR_DREAD_RUN | CSR_DWRITE_RUN |\ | ||
751 | CSR_TRANS_RUN) | ||
752 | |||
753 | /* Q_F 32 bit Flag Register */ | ||
754 | enum { | ||
755 | F_ALM_FULL = 1<<27, /* Rx FIFO: almost full */ | ||
756 | F_EMPTY = 1<<27, /* Tx FIFO: empty flag */ | ||
757 | F_FIFO_EOF = 1<<26, /* Tag (EOF Flag) bit in FIFO */ | ||
758 | F_WM_REACHED = 1<<25, /* Watermark reached */ | ||
759 | |||
760 | F_FIFO_LEVEL = 0x1fL<<16, /* Bit 23..16: # of Qwords in FIFO */ | ||
761 | F_WATER_MARK = 0x0007ffL, /* Bit 10.. 0: Watermark */ | ||
762 | }; | ||
763 | |||
764 | /* RAM Buffer Register Offsets, use RB_ADDR(Queue, Offs) to access */ | ||
765 | /* RB_START 32 bit RAM Buffer Start Address */ | ||
766 | /* RB_END 32 bit RAM Buffer End Address */ | ||
767 | /* RB_WP 32 bit RAM Buffer Write Pointer */ | ||
768 | /* RB_RP 32 bit RAM Buffer Read Pointer */ | ||
769 | /* RB_RX_UTPP 32 bit Rx Upper Threshold, Pause Pack */ | ||
770 | /* RB_RX_LTPP 32 bit Rx Lower Threshold, Pause Pack */ | ||
771 | /* RB_RX_UTHP 32 bit Rx Upper Threshold, High Prio */ | ||
772 | /* RB_RX_LTHP 32 bit Rx Lower Threshold, High Prio */ | ||
773 | /* RB_PC 32 bit RAM Buffer Packet Counter */ | ||
774 | /* RB_LEV 32 bit RAM Buffer Level Register */ | ||
775 | |||
776 | #define RB_MSK 0x0007ffff /* Bit 18.. 0: RAM Buffer Pointer Bits */ | ||
777 | /* RB_TST2 8 bit RAM Buffer Test Register 2 */ | ||
778 | /* RB_TST1 8 bit RAM Buffer Test Register 1 */ | ||
779 | |||
780 | /* RB_CTRL 8 bit RAM Buffer Control Register */ | ||
781 | enum { | ||
782 | RB_ENA_STFWD = 1<<5, /* Enable Store & Forward */ | ||
783 | RB_DIS_STFWD = 1<<4, /* Disable Store & Forward */ | ||
784 | RB_ENA_OP_MD = 1<<3, /* Enable Operation Mode */ | ||
785 | RB_DIS_OP_MD = 1<<2, /* Disable Operation Mode */ | ||
786 | RB_RST_CLR = 1<<1, /* Clear RAM Buf STM Reset */ | ||
787 | RB_RST_SET = 1<<0, /* Set RAM Buf STM Reset */ | ||
788 | }; | ||
789 | |||
790 | /* Transmit MAC FIFO and Transmit LED Registers (GENESIS only), */ | ||
791 | enum { | ||
792 | TX_MFF_EA = 0x0d00,/* 32 bit Transmit MAC FIFO End Address */ | ||
793 | TX_MFF_WP = 0x0d04,/* 32 bit Transmit MAC FIFO WR Pointer */ | ||
794 | TX_MFF_WSP = 0x0d08,/* 32 bit Transmit MAC FIFO WR Shadow Ptr */ | ||
795 | TX_MFF_RP = 0x0d0c,/* 32 bit Transmit MAC FIFO RD Pointer */ | ||
796 | TX_MFF_PC = 0x0d10,/* 32 bit Transmit MAC FIFO Packet Cnt */ | ||
797 | TX_MFF_LEV = 0x0d14,/* 32 bit Transmit MAC FIFO Level */ | ||
798 | TX_MFF_CTRL1 = 0x0d18,/* 16 bit Transmit MAC FIFO Ctrl Reg 1 */ | ||
799 | TX_MFF_WAF = 0x0d1a,/* 8 bit Transmit MAC Wait after flush */ | ||
800 | |||
801 | TX_MFF_CTRL2 = 0x0d1c,/* 8 bit Transmit MAC FIFO Ctrl Reg 2 */ | ||
802 | TX_MFF_TST1 = 0x0d1d,/* 8 bit Transmit MAC FIFO Test Reg 1 */ | ||
803 | TX_MFF_TST2 = 0x0d1e,/* 8 bit Transmit MAC FIFO Test Reg 2 */ | ||
804 | |||
805 | TX_LED_INI = 0x0d20,/* 32 bit Transmit LED Cnt Init Value */ | ||
806 | TX_LED_VAL = 0x0d24,/* 32 bit Transmit LED Cnt Current Val */ | ||
807 | TX_LED_CTRL = 0x0d28,/* 8 bit Transmit LED Cnt Control Reg */ | ||
808 | TX_LED_TST = 0x0d29,/* 8 bit Transmit LED Cnt Test Reg */ | ||
809 | }; | ||
810 | |||
811 | /* Counter and Timer constants, for a host clock of 62.5 MHz */ | ||
812 | #define SK_XMIT_DUR 0x002faf08UL /* 50 ms */ | ||
813 | #define SK_BLK_DUR 0x01dcd650UL /* 500 ms */ | ||
814 | |||
815 | #define SK_DPOLL_DEF 0x00ee6b28UL /* 250 ms at 62.5 MHz */ | ||
816 | |||
817 | #define SK_DPOLL_MAX 0x00ffffffUL /* 268 ms at 62.5 MHz */ | ||
818 | /* 215 ms at 78.12 MHz */ | ||
819 | |||
820 | #define SK_FACT_62 100 /* is given in percent */ | ||
821 | #define SK_FACT_53 85 /* on GENESIS: 53.12 MHz */ | ||
822 | #define SK_FACT_78 125 /* on YUKON: 78.12 MHz */ | ||
823 | |||
824 | |||
825 | /* Transmit GMAC FIFO (YUKON only) */ | ||
826 | enum { | ||
827 | TX_GMF_EA = 0x0d40,/* 32 bit Tx GMAC FIFO End Address */ | ||
828 | TX_GMF_AE_THR = 0x0d44,/* 32 bit Tx GMAC FIFO Almost Empty Thresh.*/ | ||
829 | TX_GMF_CTRL_T = 0x0d48,/* 32 bit Tx GMAC FIFO Control/Test */ | ||
830 | |||
831 | TX_GMF_WP = 0x0d60,/* 32 bit Tx GMAC FIFO Write Pointer */ | ||
832 | TX_GMF_WSP = 0x0d64,/* 32 bit Tx GMAC FIFO Write Shadow Ptr. */ | ||
833 | TX_GMF_WLEV = 0x0d68,/* 32 bit Tx GMAC FIFO Write Level */ | ||
834 | |||
835 | TX_GMF_RP = 0x0d70,/* 32 bit Tx GMAC FIFO Read Pointer */ | ||
836 | TX_GMF_RSTP = 0x0d74,/* 32 bit Tx GMAC FIFO Restart Pointer */ | ||
837 | TX_GMF_RLEV = 0x0d78,/* 32 bit Tx GMAC FIFO Read Level */ | ||
838 | |||
839 | /* Descriptor Poll Timer Registers */ | ||
840 | B28_DPT_INI = 0x0e00,/* 24 bit Descriptor Poll Timer Init Val */ | ||
841 | B28_DPT_VAL = 0x0e04,/* 24 bit Descriptor Poll Timer Curr Val */ | ||
842 | B28_DPT_CTRL = 0x0e08,/* 8 bit Descriptor Poll Timer Ctrl Reg */ | ||
843 | |||
844 | B28_DPT_TST = 0x0e0a,/* 8 bit Descriptor Poll Timer Test Reg */ | ||
845 | |||
846 | /* Time Stamp Timer Registers (YUKON only) */ | ||
847 | GMAC_TI_ST_VAL = 0x0e14,/* 32 bit Time Stamp Timer Curr Val */ | ||
848 | GMAC_TI_ST_CTRL = 0x0e18,/* 8 bit Time Stamp Timer Ctrl Reg */ | ||
849 | GMAC_TI_ST_TST = 0x0e1a,/* 8 bit Time Stamp Timer Test Reg */ | ||
850 | }; | ||
851 | |||
852 | /* Status BMU Registers (Yukon-2 only)*/ | ||
853 | enum { | ||
854 | STAT_CTRL = 0x0e80,/* 32 bit Status BMU Control Reg */ | ||
855 | STAT_LAST_IDX = 0x0e84,/* 16 bit Status BMU Last Index */ | ||
856 | /* 0x0e85 - 0x0e86: reserved */ | ||
857 | STAT_LIST_ADDR_LO = 0x0e88,/* 32 bit Status List Start Addr (low) */ | ||
858 | STAT_LIST_ADDR_HI = 0x0e8c,/* 32 bit Status List Start Addr (high) */ | ||
859 | STAT_TXA1_RIDX = 0x0e90,/* 16 bit Status TxA1 Report Index Reg */ | ||
860 | STAT_TXS1_RIDX = 0x0e92,/* 16 bit Status TxS1 Report Index Reg */ | ||
861 | STAT_TXA2_RIDX = 0x0e94,/* 16 bit Status TxA2 Report Index Reg */ | ||
862 | STAT_TXS2_RIDX = 0x0e96,/* 16 bit Status TxS2 Report Index Reg */ | ||
863 | STAT_TX_IDX_TH = 0x0e98,/* 16 bit Status Tx Index Threshold Reg */ | ||
864 | STAT_PUT_IDX = 0x0e9c,/* 16 bit Status Put Index Reg */ | ||
865 | |||
866 | /* FIFO Control/Status Registers (Yukon-2 only)*/ | ||
867 | STAT_FIFO_WP = 0x0ea0,/* 8 bit Status FIFO Write Pointer Reg */ | ||
868 | STAT_FIFO_RP = 0x0ea4,/* 8 bit Status FIFO Read Pointer Reg */ | ||
869 | STAT_FIFO_RSP = 0x0ea6,/* 8 bit Status FIFO Read Shadow Ptr */ | ||
870 | STAT_FIFO_LEVEL = 0x0ea8,/* 8 bit Status FIFO Level Reg */ | ||
871 | STAT_FIFO_SHLVL = 0x0eaa,/* 8 bit Status FIFO Shadow Level Reg */ | ||
872 | STAT_FIFO_WM = 0x0eac,/* 8 bit Status FIFO Watermark Reg */ | ||
873 | STAT_FIFO_ISR_WM = 0x0ead,/* 8 bit Status FIFO ISR Watermark Reg */ | ||
874 | |||
875 | /* Level and ISR Timer Registers (Yukon-2 only)*/ | ||
876 | STAT_LEV_TIMER_INI = 0x0eb0,/* 32 bit Level Timer Init. Value Reg */ | ||
877 | STAT_LEV_TIMER_CNT = 0x0eb4,/* 32 bit Level Timer Counter Reg */ | ||
878 | STAT_LEV_TIMER_CTRL = 0x0eb8,/* 8 bit Level Timer Control Reg */ | ||
879 | STAT_LEV_TIMER_TEST = 0x0eb9,/* 8 bit Level Timer Test Reg */ | ||
880 | STAT_TX_TIMER_INI = 0x0ec0,/* 32 bit Tx Timer Init. Value Reg */ | ||
881 | STAT_TX_TIMER_CNT = 0x0ec4,/* 32 bit Tx Timer Counter Reg */ | ||
882 | STAT_TX_TIMER_CTRL = 0x0ec8,/* 8 bit Tx Timer Control Reg */ | ||
883 | STAT_TX_TIMER_TEST = 0x0ec9,/* 8 bit Tx Timer Test Reg */ | ||
884 | STAT_ISR_TIMER_INI = 0x0ed0,/* 32 bit ISR Timer Init. Value Reg */ | ||
885 | STAT_ISR_TIMER_CNT = 0x0ed4,/* 32 bit ISR Timer Counter Reg */ | ||
886 | STAT_ISR_TIMER_CTRL = 0x0ed8,/* 8 bit ISR Timer Control Reg */ | ||
887 | STAT_ISR_TIMER_TEST = 0x0ed9,/* 8 bit ISR Timer Test Reg */ | ||
888 | |||
889 | ST_LAST_IDX_MASK = 0x007f,/* Last Index Mask */ | ||
890 | ST_TXRP_IDX_MASK = 0x0fff,/* Tx Report Index Mask */ | ||
891 | ST_TXTH_IDX_MASK = 0x0fff,/* Tx Threshold Index Mask */ | ||
892 | ST_WM_IDX_MASK = 0x3f,/* FIFO Watermark Index Mask */ | ||
893 | }; | ||
894 | |||
895 | enum { | ||
896 | LINKLED_OFF = 0x01, | ||
897 | LINKLED_ON = 0x02, | ||
898 | LINKLED_LINKSYNC_OFF = 0x04, | ||
899 | LINKLED_LINKSYNC_ON = 0x08, | ||
900 | LINKLED_BLINK_OFF = 0x10, | ||
901 | LINKLED_BLINK_ON = 0x20, | ||
902 | }; | ||
903 | |||
904 | /* GMAC and GPHY Control Registers (YUKON only) */ | ||
905 | enum { | ||
906 | GMAC_CTRL = 0x0f00,/* 32 bit GMAC Control Reg */ | ||
907 | GPHY_CTRL = 0x0f04,/* 32 bit GPHY Control Reg */ | ||
908 | GMAC_IRQ_SRC = 0x0f08,/* 8 bit GMAC Interrupt Source Reg */ | ||
909 | GMAC_IRQ_MSK = 0x0f0c,/* 8 bit GMAC Interrupt Mask Reg */ | ||
910 | GMAC_LINK_CTRL = 0x0f10,/* 16 bit Link Control Reg */ | ||
911 | |||
912 | /* Wake-up Frame Pattern Match Control Registers (YUKON only) */ | ||
913 | |||
914 | WOL_REG_OFFS = 0x20,/* HW-Bug: Address is + 0x20 against spec. */ | ||
915 | |||
916 | WOL_CTRL_STAT = 0x0f20,/* 16 bit WOL Control/Status Reg */ | ||
917 | WOL_MATCH_CTL = 0x0f22,/* 8 bit WOL Match Control Reg */ | ||
918 | WOL_MATCH_RES = 0x0f23,/* 8 bit WOL Match Result Reg */ | ||
919 | WOL_MAC_ADDR = 0x0f24,/* 32 bit WOL MAC Address */ | ||
920 | WOL_PATT_PME = 0x0f2a,/* 8 bit WOL PME Match Enable (Yukon-2) */ | ||
921 | WOL_PATT_ASFM = 0x0f2b,/* 8 bit WOL ASF Match Enable (Yukon-2) */ | ||
922 | WOL_PATT_RPTR = 0x0f2c,/* 8 bit WOL Pattern Read Pointer */ | ||
923 | |||
924 | /* WOL Pattern Length Registers (YUKON only) */ | ||
925 | |||
926 | WOL_PATT_LEN_LO = 0x0f30,/* 32 bit WOL Pattern Length 3..0 */ | ||
927 | WOL_PATT_LEN_HI = 0x0f34,/* 24 bit WOL Pattern Length 6..4 */ | ||
928 | |||
929 | /* WOL Pattern Counter Registers (YUKON only) */ | ||
930 | |||
931 | WOL_PATT_CNT_0 = 0x0f38,/* 32 bit WOL Pattern Counter 3..0 */ | ||
932 | WOL_PATT_CNT_4 = 0x0f3c,/* 24 bit WOL Pattern Counter 6..4 */ | ||
933 | }; | ||
934 | |||
935 | enum { | ||
936 | WOL_PATT_RAM_1 = 0x1000,/* WOL Pattern RAM Link 1 */ | ||
937 | WOL_PATT_RAM_2 = 0x1400,/* WOL Pattern RAM Link 2 */ | ||
938 | }; | ||
939 | |||
940 | enum { | ||
941 | BASE_XMAC_1 = 0x2000,/* XMAC 1 registers */ | ||
942 | BASE_GMAC_1 = 0x2800,/* GMAC 1 registers */ | ||
943 | BASE_XMAC_2 = 0x3000,/* XMAC 2 registers */ | ||
944 | BASE_GMAC_2 = 0x3800,/* GMAC 2 registers */ | ||
945 | }; | ||
946 | |||
947 | /* | ||
948 | * Receive Frame Status Encoding | ||
949 | */ | ||
950 | enum { | ||
951 | XMR_FS_LEN = 0x3fff<<18, /* Bit 31..18: Rx Frame Length */ | ||
952 | XMR_FS_2L_VLAN = 1<<17, /* Bit 17: tagged wh 2Lev VLAN ID*/ | ||
953 | XMR_FS_1_VLAN = 1<<16, /* Bit 16: tagged wh 1ev VLAN ID*/ | ||
954 | XMR_FS_BC = 1<<15, /* Bit 15: Broadcast Frame */ | ||
955 | XMR_FS_MC = 1<<14, /* Bit 14: Multicast Frame */ | ||
956 | XMR_FS_UC = 1<<13, /* Bit 13: Unicast Frame */ | ||
957 | |||
958 | XMR_FS_BURST = 1<<11, /* Bit 11: Burst Mode */ | ||
959 | XMR_FS_CEX_ERR = 1<<10, /* Bit 10: Carrier Ext. Error */ | ||
960 | XMR_FS_802_3 = 1<<9, /* Bit 9: 802.3 Frame */ | ||
961 | XMR_FS_COL_ERR = 1<<8, /* Bit 8: Collision Error */ | ||
962 | XMR_FS_CAR_ERR = 1<<7, /* Bit 7: Carrier Event Error */ | ||
963 | XMR_FS_LEN_ERR = 1<<6, /* Bit 6: In-Range Length Error */ | ||
964 | XMR_FS_FRA_ERR = 1<<5, /* Bit 5: Framing Error */ | ||
965 | XMR_FS_RUNT = 1<<4, /* Bit 4: Runt Frame */ | ||
966 | XMR_FS_LNG_ERR = 1<<3, /* Bit 3: Giant (Jumbo) Frame */ | ||
967 | XMR_FS_FCS_ERR = 1<<2, /* Bit 2: Frame Check Sequ Err */ | ||
968 | XMR_FS_ERR = 1<<1, /* Bit 1: Frame Error */ | ||
969 | XMR_FS_MCTRL = 1<<0, /* Bit 0: MAC Control Packet */ | ||
970 | |||
971 | /* | ||
972 | * XMR_FS_ERR will be set if | ||
973 | * XMR_FS_FCS_ERR, XMR_FS_LNG_ERR, XMR_FS_RUNT, | ||
974 | * XMR_FS_FRA_ERR, XMR_FS_LEN_ERR, or XMR_FS_CEX_ERR | ||
975 | * is set. XMR_FS_LNG_ERR and XMR_FS_LEN_ERR will issue | ||
976 | * XMR_FS_ERR unless the corresponding bit in the Receive Command | ||
977 | * Register is set. | ||
978 | */ | ||
979 | }; | ||
980 | |||
981 | /* | ||
982 | ,* XMAC-PHY Registers, indirect addressed over the XMAC | ||
983 | */ | ||
984 | enum { | ||
985 | PHY_XMAC_CTRL = 0x00,/* 16 bit r/w PHY Control Register */ | ||
986 | PHY_XMAC_STAT = 0x01,/* 16 bit r/w PHY Status Register */ | ||
987 | PHY_XMAC_ID0 = 0x02,/* 16 bit r/o PHY ID0 Register */ | ||
988 | PHY_XMAC_ID1 = 0x03,/* 16 bit r/o PHY ID1 Register */ | ||
989 | PHY_XMAC_AUNE_ADV = 0x04,/* 16 bit r/w Auto-Neg. Advertisement */ | ||
990 | PHY_XMAC_AUNE_LP = 0x05,/* 16 bit r/o Link Partner Abi Reg */ | ||
991 | PHY_XMAC_AUNE_EXP = 0x06,/* 16 bit r/o Auto-Neg. Expansion Reg */ | ||
992 | PHY_XMAC_NEPG = 0x07,/* 16 bit r/w Next Page Register */ | ||
993 | PHY_XMAC_NEPG_LP = 0x08,/* 16 bit r/o Next Page Link Partner */ | ||
994 | |||
995 | PHY_XMAC_EXT_STAT = 0x0f,/* 16 bit r/o Ext Status Register */ | ||
996 | PHY_XMAC_RES_ABI = 0x10,/* 16 bit r/o PHY Resolved Ability */ | ||
997 | }; | ||
998 | /* | ||
999 | * Broadcom-PHY Registers, indirect addressed over XMAC | ||
1000 | */ | ||
1001 | enum { | ||
1002 | PHY_BCOM_CTRL = 0x00,/* 16 bit r/w PHY Control Register */ | ||
1003 | PHY_BCOM_STAT = 0x01,/* 16 bit r/o PHY Status Register */ | ||
1004 | PHY_BCOM_ID0 = 0x02,/* 16 bit r/o PHY ID0 Register */ | ||
1005 | PHY_BCOM_ID1 = 0x03,/* 16 bit r/o PHY ID1 Register */ | ||
1006 | PHY_BCOM_AUNE_ADV = 0x04,/* 16 bit r/w Auto-Neg. Advertisement */ | ||
1007 | PHY_BCOM_AUNE_LP = 0x05,/* 16 bit r/o Link Part Ability Reg */ | ||
1008 | PHY_BCOM_AUNE_EXP = 0x06,/* 16 bit r/o Auto-Neg. Expansion Reg */ | ||
1009 | PHY_BCOM_NEPG = 0x07,/* 16 bit r/w Next Page Register */ | ||
1010 | PHY_BCOM_NEPG_LP = 0x08,/* 16 bit r/o Next Page Link Partner */ | ||
1011 | /* Broadcom-specific registers */ | ||
1012 | PHY_BCOM_1000T_CTRL = 0x09,/* 16 bit r/w 1000Base-T Control Reg */ | ||
1013 | PHY_BCOM_1000T_STAT = 0x0a,/* 16 bit r/o 1000Base-T Status Reg */ | ||
1014 | PHY_BCOM_EXT_STAT = 0x0f,/* 16 bit r/o Extended Status Reg */ | ||
1015 | PHY_BCOM_P_EXT_CTRL = 0x10,/* 16 bit r/w PHY Extended Ctrl Reg */ | ||
1016 | PHY_BCOM_P_EXT_STAT = 0x11,/* 16 bit r/o PHY Extended Stat Reg */ | ||
1017 | PHY_BCOM_RE_CTR = 0x12,/* 16 bit r/w Receive Error Counter */ | ||
1018 | PHY_BCOM_FC_CTR = 0x13,/* 16 bit r/w False Carrier Sense Cnt */ | ||
1019 | PHY_BCOM_RNO_CTR = 0x14,/* 16 bit r/w Receiver NOT_OK Cnt */ | ||
1020 | |||
1021 | PHY_BCOM_AUX_CTRL = 0x18,/* 16 bit r/w Auxiliary Control Reg */ | ||
1022 | PHY_BCOM_AUX_STAT = 0x19,/* 16 bit r/o Auxiliary Stat Summary */ | ||
1023 | PHY_BCOM_INT_STAT = 0x1a,/* 16 bit r/o Interrupt Status Reg */ | ||
1024 | PHY_BCOM_INT_MASK = 0x1b,/* 16 bit r/w Interrupt Mask Reg */ | ||
1025 | }; | ||
1026 | |||
1027 | /* | ||
1028 | * Marvel-PHY Registers, indirect addressed over GMAC | ||
1029 | */ | ||
1030 | enum { | ||
1031 | PHY_MARV_CTRL = 0x00,/* 16 bit r/w PHY Control Register */ | ||
1032 | PHY_MARV_STAT = 0x01,/* 16 bit r/o PHY Status Register */ | ||
1033 | PHY_MARV_ID0 = 0x02,/* 16 bit r/o PHY ID0 Register */ | ||
1034 | PHY_MARV_ID1 = 0x03,/* 16 bit r/o PHY ID1 Register */ | ||
1035 | PHY_MARV_AUNE_ADV = 0x04,/* 16 bit r/w Auto-Neg. Advertisement */ | ||
1036 | PHY_MARV_AUNE_LP = 0x05,/* 16 bit r/o Link Part Ability Reg */ | ||
1037 | PHY_MARV_AUNE_EXP = 0x06,/* 16 bit r/o Auto-Neg. Expansion Reg */ | ||
1038 | PHY_MARV_NEPG = 0x07,/* 16 bit r/w Next Page Register */ | ||
1039 | PHY_MARV_NEPG_LP = 0x08,/* 16 bit r/o Next Page Link Partner */ | ||
1040 | /* Marvel-specific registers */ | ||
1041 | PHY_MARV_1000T_CTRL = 0x09,/* 16 bit r/w 1000Base-T Control Reg */ | ||
1042 | PHY_MARV_1000T_STAT = 0x0a,/* 16 bit r/o 1000Base-T Status Reg */ | ||
1043 | PHY_MARV_EXT_STAT = 0x0f,/* 16 bit r/o Extended Status Reg */ | ||
1044 | PHY_MARV_PHY_CTRL = 0x10,/* 16 bit r/w PHY Specific Ctrl Reg */ | ||
1045 | PHY_MARV_PHY_STAT = 0x11,/* 16 bit r/o PHY Specific Stat Reg */ | ||
1046 | PHY_MARV_INT_MASK = 0x12,/* 16 bit r/w Interrupt Mask Reg */ | ||
1047 | PHY_MARV_INT_STAT = 0x13,/* 16 bit r/o Interrupt Status Reg */ | ||
1048 | PHY_MARV_EXT_CTRL = 0x14,/* 16 bit r/w Ext. PHY Specific Ctrl */ | ||
1049 | PHY_MARV_RXE_CNT = 0x15,/* 16 bit r/w Receive Error Counter */ | ||
1050 | PHY_MARV_EXT_ADR = 0x16,/* 16 bit r/w Ext. Ad. for Cable Diag. */ | ||
1051 | PHY_MARV_PORT_IRQ = 0x17,/* 16 bit r/o Port 0 IRQ (88E1111 only) */ | ||
1052 | PHY_MARV_LED_CTRL = 0x18,/* 16 bit r/w LED Control Reg */ | ||
1053 | PHY_MARV_LED_OVER = 0x19,/* 16 bit r/w Manual LED Override Reg */ | ||
1054 | PHY_MARV_EXT_CTRL_2 = 0x1a,/* 16 bit r/w Ext. PHY Specific Ctrl 2 */ | ||
1055 | PHY_MARV_EXT_P_STAT = 0x1b,/* 16 bit r/w Ext. PHY Spec. Stat Reg */ | ||
1056 | PHY_MARV_CABLE_DIAG = 0x1c,/* 16 bit r/o Cable Diagnostic Reg */ | ||
1057 | PHY_MARV_PAGE_ADDR = 0x1d,/* 16 bit r/w Extended Page Address Reg */ | ||
1058 | PHY_MARV_PAGE_DATA = 0x1e,/* 16 bit r/w Extended Page Data Reg */ | ||
1059 | |||
1060 | /* for 10/100 Fast Ethernet PHY (88E3082 only) */ | ||
1061 | PHY_MARV_FE_LED_PAR = 0x16,/* 16 bit r/w LED Parallel Select Reg. */ | ||
1062 | PHY_MARV_FE_LED_SER = 0x17,/* 16 bit r/w LED Stream Select S. LED */ | ||
1063 | PHY_MARV_FE_VCT_TX = 0x1a,/* 16 bit r/w VCT Reg. for TXP/N Pins */ | ||
1064 | PHY_MARV_FE_VCT_RX = 0x1b,/* 16 bit r/o VCT Reg. for RXP/N Pins */ | ||
1065 | PHY_MARV_FE_SPEC_2 = 0x1c,/* 16 bit r/w Specific Control Reg. 2 */ | ||
1066 | }; | ||
1067 | |||
1068 | enum { | ||
1069 | PHY_CT_RESET = 1<<15, /* Bit 15: (sc) clear all PHY related regs */ | ||
1070 | PHY_CT_LOOP = 1<<14, /* Bit 14: enable Loopback over PHY */ | ||
1071 | PHY_CT_SPS_LSB = 1<<13, /* Bit 13: Speed select, lower bit */ | ||
1072 | PHY_CT_ANE = 1<<12, /* Bit 12: Auto-Negotiation Enabled */ | ||
1073 | PHY_CT_PDOWN = 1<<11, /* Bit 11: Power Down Mode */ | ||
1074 | PHY_CT_ISOL = 1<<10, /* Bit 10: Isolate Mode */ | ||
1075 | PHY_CT_RE_CFG = 1<<9, /* Bit 9: (sc) Restart Auto-Negotiation */ | ||
1076 | PHY_CT_DUP_MD = 1<<8, /* Bit 8: Duplex Mode */ | ||
1077 | PHY_CT_COL_TST = 1<<7, /* Bit 7: Collision Test enabled */ | ||
1078 | PHY_CT_SPS_MSB = 1<<6, /* Bit 6: Speed select, upper bit */ | ||
1079 | }; | ||
1080 | |||
1081 | enum { | ||
1082 | PHY_CT_SP1000 = PHY_CT_SPS_MSB, /* enable speed of 1000 Mbps */ | ||
1083 | PHY_CT_SP100 = PHY_CT_SPS_LSB, /* enable speed of 100 Mbps */ | ||
1084 | PHY_CT_SP10 = 0, /* enable speed of 10 Mbps */ | ||
1085 | }; | ||
1086 | |||
1087 | enum { | ||
1088 | PHY_ST_EXT_ST = 1<<8, /* Bit 8: Extended Status Present */ | ||
1089 | |||
1090 | PHY_ST_PRE_SUP = 1<<6, /* Bit 6: Preamble Suppression */ | ||
1091 | PHY_ST_AN_OVER = 1<<5, /* Bit 5: Auto-Negotiation Over */ | ||
1092 | PHY_ST_REM_FLT = 1<<4, /* Bit 4: Remote Fault Condition Occured */ | ||
1093 | PHY_ST_AN_CAP = 1<<3, /* Bit 3: Auto-Negotiation Capability */ | ||
1094 | PHY_ST_LSYNC = 1<<2, /* Bit 2: Link Synchronized */ | ||
1095 | PHY_ST_JAB_DET = 1<<1, /* Bit 1: Jabber Detected */ | ||
1096 | PHY_ST_EXT_REG = 1<<0, /* Bit 0: Extended Register available */ | ||
1097 | }; | ||
1098 | |||
1099 | enum { | ||
1100 | PHY_I1_OUI_MSK = 0x3f<<10, /* Bit 15..10: Organization Unique ID */ | ||
1101 | PHY_I1_MOD_NUM = 0x3f<<4, /* Bit 9.. 4: Model Number */ | ||
1102 | PHY_I1_REV_MSK = 0xf, /* Bit 3.. 0: Revision Number */ | ||
1103 | }; | ||
1104 | |||
1105 | /* different Broadcom PHY Ids */ | ||
1106 | enum { | ||
1107 | PHY_BCOM_ID1_A1 = 0x6041, | ||
1108 | PHY_BCOM_ID1_B2 = 0x6043, | ||
1109 | PHY_BCOM_ID1_C0 = 0x6044, | ||
1110 | PHY_BCOM_ID1_C5 = 0x6047, | ||
1111 | }; | ||
1112 | |||
1113 | /* different Marvell PHY Ids */ | ||
1114 | enum { | ||
1115 | PHY_MARV_ID0_VAL= 0x0141, /* Marvell Unique Identifier */ | ||
1116 | PHY_MARV_ID1_B0 = 0x0C23, /* Yukon (PHY 88E1011) */ | ||
1117 | PHY_MARV_ID1_B2 = 0x0C25, /* Yukon-Plus (PHY 88E1011) */ | ||
1118 | PHY_MARV_ID1_C2 = 0x0CC2, /* Yukon-EC (PHY 88E1111) */ | ||
1119 | PHY_MARV_ID1_Y2 = 0x0C91, /* Yukon-2 (PHY 88E1112) */ | ||
1120 | }; | ||
1121 | |||
1122 | /* Advertisement register bits */ | ||
1123 | enum { | ||
1124 | PHY_AN_NXT_PG = 1<<15, /* Bit 15: Request Next Page */ | ||
1125 | PHY_AN_ACK = 1<<14, /* Bit 14: (ro) Acknowledge Received */ | ||
1126 | PHY_AN_RF = 1<<13, /* Bit 13: Remote Fault Bits */ | ||
1127 | |||
1128 | PHY_AN_PAUSE_ASYM = 1<<11,/* Bit 11: Try for asymmetric */ | ||
1129 | PHY_AN_PAUSE_CAP = 1<<10, /* Bit 10: Try for pause */ | ||
1130 | PHY_AN_100BASE4 = 1<<9, /* Bit 9: Try for 100mbps 4k packets */ | ||
1131 | PHY_AN_100FULL = 1<<8, /* Bit 8: Try for 100mbps full-duplex */ | ||
1132 | PHY_AN_100HALF = 1<<7, /* Bit 7: Try for 100mbps half-duplex */ | ||
1133 | PHY_AN_10FULL = 1<<6, /* Bit 6: Try for 10mbps full-duplex */ | ||
1134 | PHY_AN_10HALF = 1<<5, /* Bit 5: Try for 10mbps half-duplex */ | ||
1135 | PHY_AN_CSMA = 1<<0, /* Bit 0: Only selector supported */ | ||
1136 | PHY_AN_SEL = 0x1f, /* Bit 4..0: Selector Field, 00001=Ethernet*/ | ||
1137 | PHY_AN_FULL = PHY_AN_100FULL | PHY_AN_10FULL | PHY_AN_CSMA, | ||
1138 | PHY_AN_ALL = PHY_AN_10HALF | PHY_AN_10FULL | | ||
1139 | PHY_AN_100HALF | PHY_AN_100FULL, | ||
1140 | }; | ||
1141 | |||
1142 | /* Xmac Specific */ | ||
1143 | enum { | ||
1144 | PHY_X_AN_NXT_PG = 1<<15, /* Bit 15: Request Next Page */ | ||
1145 | PHY_X_AN_ACK = 1<<14, /* Bit 14: (ro) Acknowledge Received */ | ||
1146 | PHY_X_AN_RFB = 3<<12,/* Bit 13..12: Remote Fault Bits */ | ||
1147 | |||
1148 | PHY_X_AN_PAUSE = 3<<7,/* Bit 8.. 7: Pause Bits */ | ||
1149 | PHY_X_AN_HD = 1<<6, /* Bit 6: Half Duplex */ | ||
1150 | PHY_X_AN_FD = 1<<5, /* Bit 5: Full Duplex */ | ||
1151 | }; | ||
1152 | |||
1153 | /* Pause Bits (PHY_X_AN_PAUSE and PHY_X_RS_PAUSE) encoding */ | ||
1154 | enum { | ||
1155 | PHY_X_P_NO_PAUSE = 0<<7,/* Bit 8..7: no Pause Mode */ | ||
1156 | PHY_X_P_SYM_MD = 1<<7, /* Bit 8..7: symmetric Pause Mode */ | ||
1157 | PHY_X_P_ASYM_MD = 2<<7,/* Bit 8..7: asymmetric Pause Mode */ | ||
1158 | PHY_X_P_BOTH_MD = 3<<7,/* Bit 8..7: both Pause Mode */ | ||
1159 | }; | ||
1160 | |||
1161 | |||
1162 | /* Broadcom-Specific */ | ||
1163 | /***** PHY_BCOM_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/ | ||
1164 | enum { | ||
1165 | PHY_B_1000C_TEST = 7<<13,/* Bit 15..13: Test Modes */ | ||
1166 | PHY_B_1000C_MSE = 1<<12, /* Bit 12: Master/Slave Enable */ | ||
1167 | PHY_B_1000C_MSC = 1<<11, /* Bit 11: M/S Configuration */ | ||
1168 | PHY_B_1000C_RD = 1<<10, /* Bit 10: Repeater/DTE */ | ||
1169 | PHY_B_1000C_AFD = 1<<9, /* Bit 9: Advertise Full Duplex */ | ||
1170 | PHY_B_1000C_AHD = 1<<8, /* Bit 8: Advertise Half Duplex */ | ||
1171 | }; | ||
1172 | |||
1173 | /***** PHY_BCOM_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/ | ||
1174 | /***** PHY_MARV_1000T_STAT 16 bit r/o 1000Base-T Status Reg *****/ | ||
1175 | enum { | ||
1176 | PHY_B_1000S_MSF = 1<<15, /* Bit 15: Master/Slave Fault */ | ||
1177 | PHY_B_1000S_MSR = 1<<14, /* Bit 14: Master/Slave Result */ | ||
1178 | PHY_B_1000S_LRS = 1<<13, /* Bit 13: Local Receiver Status */ | ||
1179 | PHY_B_1000S_RRS = 1<<12, /* Bit 12: Remote Receiver Status */ | ||
1180 | PHY_B_1000S_LP_FD = 1<<11, /* Bit 11: Link Partner can FD */ | ||
1181 | PHY_B_1000S_LP_HD = 1<<10, /* Bit 10: Link Partner can HD */ | ||
1182 | /* Bit 9..8: reserved */ | ||
1183 | PHY_B_1000S_IEC = 0xff, /* Bit 7..0: Idle Error Count */ | ||
1184 | }; | ||
1185 | |||
1186 | /***** PHY_BCOM_EXT_STAT 16 bit r/o Extended Status Register *****/ | ||
1187 | enum { | ||
1188 | PHY_B_ES_X_FD_CAP = 1<<15, /* Bit 15: 1000Base-X FD capable */ | ||
1189 | PHY_B_ES_X_HD_CAP = 1<<14, /* Bit 14: 1000Base-X HD capable */ | ||
1190 | PHY_B_ES_T_FD_CAP = 1<<13, /* Bit 13: 1000Base-T FD capable */ | ||
1191 | PHY_B_ES_T_HD_CAP = 1<<12, /* Bit 12: 1000Base-T HD capable */ | ||
1192 | }; | ||
1193 | |||
1194 | /***** PHY_BCOM_P_EXT_CTRL 16 bit r/w PHY Extended Control Reg *****/ | ||
1195 | enum { | ||
1196 | PHY_B_PEC_MAC_PHY = 1<<15, /* Bit 15: 10BIT/GMI-Interface */ | ||
1197 | PHY_B_PEC_DIS_CROSS = 1<<14, /* Bit 14: Disable MDI Crossover */ | ||
1198 | PHY_B_PEC_TX_DIS = 1<<13, /* Bit 13: Tx output Disabled */ | ||
1199 | PHY_B_PEC_INT_DIS = 1<<12, /* Bit 12: Interrupts Disabled */ | ||
1200 | PHY_B_PEC_F_INT = 1<<11, /* Bit 11: Force Interrupt */ | ||
1201 | PHY_B_PEC_BY_45 = 1<<10, /* Bit 10: Bypass 4B5B-Decoder */ | ||
1202 | PHY_B_PEC_BY_SCR = 1<<9, /* Bit 9: Bypass Scrambler */ | ||
1203 | PHY_B_PEC_BY_MLT3 = 1<<8, /* Bit 8: Bypass MLT3 Encoder */ | ||
1204 | PHY_B_PEC_BY_RXA = 1<<7, /* Bit 7: Bypass Rx Alignm. */ | ||
1205 | PHY_B_PEC_RES_SCR = 1<<6, /* Bit 6: Reset Scrambler */ | ||
1206 | PHY_B_PEC_EN_LTR = 1<<5, /* Bit 5: Ena LED Traffic Mode */ | ||
1207 | PHY_B_PEC_LED_ON = 1<<4, /* Bit 4: Force LED's on */ | ||
1208 | PHY_B_PEC_LED_OFF = 1<<3, /* Bit 3: Force LED's off */ | ||
1209 | PHY_B_PEC_EX_IPG = 1<<2, /* Bit 2: Extend Tx IPG Mode */ | ||
1210 | PHY_B_PEC_3_LED = 1<<1, /* Bit 1: Three Link LED mode */ | ||
1211 | PHY_B_PEC_HIGH_LA = 1<<0, /* Bit 0: GMII FIFO Elasticy */ | ||
1212 | }; | ||
1213 | |||
1214 | /***** PHY_BCOM_P_EXT_STAT 16 bit r/o PHY Extended Status Reg *****/ | ||
1215 | enum { | ||
1216 | PHY_B_PES_CROSS_STAT = 1<<13, /* Bit 13: MDI Crossover Status */ | ||
1217 | PHY_B_PES_INT_STAT = 1<<12, /* Bit 12: Interrupt Status */ | ||
1218 | PHY_B_PES_RRS = 1<<11, /* Bit 11: Remote Receiver Stat. */ | ||
1219 | PHY_B_PES_LRS = 1<<10, /* Bit 10: Local Receiver Stat. */ | ||
1220 | PHY_B_PES_LOCKED = 1<<9, /* Bit 9: Locked */ | ||
1221 | PHY_B_PES_LS = 1<<8, /* Bit 8: Link Status */ | ||
1222 | PHY_B_PES_RF = 1<<7, /* Bit 7: Remote Fault */ | ||
1223 | PHY_B_PES_CE_ER = 1<<6, /* Bit 6: Carrier Ext Error */ | ||
1224 | PHY_B_PES_BAD_SSD = 1<<5, /* Bit 5: Bad SSD */ | ||
1225 | PHY_B_PES_BAD_ESD = 1<<4, /* Bit 4: Bad ESD */ | ||
1226 | PHY_B_PES_RX_ER = 1<<3, /* Bit 3: Receive Error */ | ||
1227 | PHY_B_PES_TX_ER = 1<<2, /* Bit 2: Transmit Error */ | ||
1228 | PHY_B_PES_LOCK_ER = 1<<1, /* Bit 1: Lock Error */ | ||
1229 | PHY_B_PES_MLT3_ER = 1<<0, /* Bit 0: MLT3 code Error */ | ||
1230 | }; | ||
1231 | |||
1232 | /* PHY_BCOM_AUNE_ADV 16 bit r/w Auto-Negotiation Advertisement *****/ | ||
1233 | /* PHY_BCOM_AUNE_LP 16 bit r/o Link Partner Ability Reg *****/ | ||
1234 | enum { | ||
1235 | PHY_B_AN_RF = 1<<13, /* Bit 13: Remote Fault */ | ||
1236 | |||
1237 | PHY_B_AN_ASP = 1<<11, /* Bit 11: Asymmetric Pause */ | ||
1238 | PHY_B_AN_PC = 1<<10, /* Bit 10: Pause Capable */ | ||
1239 | }; | ||
1240 | |||
1241 | |||
1242 | /***** PHY_BCOM_FC_CTR 16 bit r/w False Carrier Counter *****/ | ||
1243 | enum { | ||
1244 | PHY_B_FC_CTR = 0xff, /* Bit 7..0: False Carrier Counter */ | ||
1245 | |||
1246 | /***** PHY_BCOM_RNO_CTR 16 bit r/w Receive NOT_OK Counter *****/ | ||
1247 | PHY_B_RC_LOC_MSK = 0xff00, /* Bit 15..8: Local Rx NOT_OK cnt */ | ||
1248 | PHY_B_RC_REM_MSK = 0x00ff, /* Bit 7..0: Remote Rx NOT_OK cnt */ | ||
1249 | |||
1250 | /***** PHY_BCOM_AUX_CTRL 16 bit r/w Auxiliary Control Reg *****/ | ||
1251 | PHY_B_AC_L_SQE = 1<<15, /* Bit 15: Low Squelch */ | ||
1252 | PHY_B_AC_LONG_PACK = 1<<14, /* Bit 14: Rx Long Packets */ | ||
1253 | PHY_B_AC_ER_CTRL = 3<<12,/* Bit 13..12: Edgerate Control */ | ||
1254 | /* Bit 11: reserved */ | ||
1255 | PHY_B_AC_TX_TST = 1<<10, /* Bit 10: Tx test bit, always 1 */ | ||
1256 | /* Bit 9.. 8: reserved */ | ||
1257 | PHY_B_AC_DIS_PRF = 1<<7, /* Bit 7: dis part resp filter */ | ||
1258 | /* Bit 6: reserved */ | ||
1259 | PHY_B_AC_DIS_PM = 1<<5, /* Bit 5: dis power management */ | ||
1260 | /* Bit 4: reserved */ | ||
1261 | PHY_B_AC_DIAG = 1<<3, /* Bit 3: Diagnostic Mode */ | ||
1262 | }; | ||
1263 | |||
1264 | /***** PHY_BCOM_AUX_STAT 16 bit r/o Auxiliary Status Reg *****/ | ||
1265 | enum { | ||
1266 | PHY_B_AS_AN_C = 1<<15, /* Bit 15: AutoNeg complete */ | ||
1267 | PHY_B_AS_AN_CA = 1<<14, /* Bit 14: AN Complete Ack */ | ||
1268 | PHY_B_AS_ANACK_D = 1<<13, /* Bit 13: AN Ack Detect */ | ||
1269 | PHY_B_AS_ANAB_D = 1<<12, /* Bit 12: AN Ability Detect */ | ||
1270 | PHY_B_AS_NPW = 1<<11, /* Bit 11: AN Next Page Wait */ | ||
1271 | PHY_B_AS_AN_RES_MSK = 7<<8,/* Bit 10..8: AN HDC */ | ||
1272 | PHY_B_AS_PDF = 1<<7, /* Bit 7: Parallel Detect. Fault */ | ||
1273 | PHY_B_AS_RF = 1<<6, /* Bit 6: Remote Fault */ | ||
1274 | PHY_B_AS_ANP_R = 1<<5, /* Bit 5: AN Page Received */ | ||
1275 | PHY_B_AS_LP_ANAB = 1<<4, /* Bit 4: LP AN Ability */ | ||
1276 | PHY_B_AS_LP_NPAB = 1<<3, /* Bit 3: LP Next Page Ability */ | ||
1277 | PHY_B_AS_LS = 1<<2, /* Bit 2: Link Status */ | ||
1278 | PHY_B_AS_PRR = 1<<1, /* Bit 1: Pause Resolution-Rx */ | ||
1279 | PHY_B_AS_PRT = 1<<0, /* Bit 0: Pause Resolution-Tx */ | ||
1280 | }; | ||
1281 | #define PHY_B_AS_PAUSE_MSK (PHY_B_AS_PRR | PHY_B_AS_PRT) | ||
1282 | |||
1283 | /***** PHY_BCOM_INT_STAT 16 bit r/o Interrupt Status Reg *****/ | ||
1284 | /***** PHY_BCOM_INT_MASK 16 bit r/w Interrupt Mask Reg *****/ | ||
1285 | enum { | ||
1286 | PHY_B_IS_PSE = 1<<14, /* Bit 14: Pair Swap Error */ | ||
1287 | PHY_B_IS_MDXI_SC = 1<<13, /* Bit 13: MDIX Status Change */ | ||
1288 | PHY_B_IS_HCT = 1<<12, /* Bit 12: counter above 32k */ | ||
1289 | PHY_B_IS_LCT = 1<<11, /* Bit 11: counter above 128 */ | ||
1290 | PHY_B_IS_AN_PR = 1<<10, /* Bit 10: Page Received */ | ||
1291 | PHY_B_IS_NO_HDCL = 1<<9, /* Bit 9: No HCD Link */ | ||
1292 | PHY_B_IS_NO_HDC = 1<<8, /* Bit 8: No HCD */ | ||
1293 | PHY_B_IS_NEG_USHDC = 1<<7, /* Bit 7: Negotiated Unsup. HCD */ | ||
1294 | PHY_B_IS_SCR_S_ER = 1<<6, /* Bit 6: Scrambler Sync Error */ | ||
1295 | PHY_B_IS_RRS_CHANGE = 1<<5, /* Bit 5: Remote Rx Stat Change */ | ||
1296 | PHY_B_IS_LRS_CHANGE = 1<<4, /* Bit 4: Local Rx Stat Change */ | ||
1297 | PHY_B_IS_DUP_CHANGE = 1<<3, /* Bit 3: Duplex Mode Change */ | ||
1298 | PHY_B_IS_LSP_CHANGE = 1<<2, /* Bit 2: Link Speed Change */ | ||
1299 | PHY_B_IS_LST_CHANGE = 1<<1, /* Bit 1: Link Status Changed */ | ||
1300 | PHY_B_IS_CRC_ER = 1<<0, /* Bit 0: CRC Error */ | ||
1301 | }; | ||
1302 | #define PHY_B_DEF_MSK \ | ||
1303 | (~(PHY_B_IS_PSE | PHY_B_IS_AN_PR | PHY_B_IS_DUP_CHANGE | \ | ||
1304 | PHY_B_IS_LSP_CHANGE | PHY_B_IS_LST_CHANGE)) | ||
1305 | |||
1306 | /* Pause Bits (PHY_B_AN_ASP and PHY_B_AN_PC) encoding */ | ||
1307 | enum { | ||
1308 | PHY_B_P_NO_PAUSE = 0<<10,/* Bit 11..10: no Pause Mode */ | ||
1309 | PHY_B_P_SYM_MD = 1<<10, /* Bit 11..10: symmetric Pause Mode */ | ||
1310 | PHY_B_P_ASYM_MD = 2<<10,/* Bit 11..10: asymmetric Pause Mode */ | ||
1311 | PHY_B_P_BOTH_MD = 3<<10,/* Bit 11..10: both Pause Mode */ | ||
1312 | }; | ||
1313 | /* | ||
1314 | * Resolved Duplex mode and Capabilities (Aux Status Summary Reg) | ||
1315 | */ | ||
1316 | enum { | ||
1317 | PHY_B_RES_1000FD = 7<<8,/* Bit 10..8: 1000Base-T Full Dup. */ | ||
1318 | PHY_B_RES_1000HD = 6<<8,/* Bit 10..8: 1000Base-T Half Dup. */ | ||
1319 | }; | ||
1320 | |||
1321 | /** Marvell-Specific */ | ||
1322 | enum { | ||
1323 | PHY_M_AN_NXT_PG = 1<<15, /* Request Next Page */ | ||
1324 | PHY_M_AN_ACK = 1<<14, /* (ro) Acknowledge Received */ | ||
1325 | PHY_M_AN_RF = 1<<13, /* Remote Fault */ | ||
1326 | |||
1327 | PHY_M_AN_ASP = 1<<11, /* Asymmetric Pause */ | ||
1328 | PHY_M_AN_PC = 1<<10, /* MAC Pause implemented */ | ||
1329 | PHY_M_AN_100_T4 = 1<<9, /* Not cap. 100Base-T4 (always 0) */ | ||
1330 | PHY_M_AN_100_FD = 1<<8, /* Advertise 100Base-TX Full Duplex */ | ||
1331 | PHY_M_AN_100_HD = 1<<7, /* Advertise 100Base-TX Half Duplex */ | ||
1332 | PHY_M_AN_10_FD = 1<<6, /* Advertise 10Base-TX Full Duplex */ | ||
1333 | PHY_M_AN_10_HD = 1<<5, /* Advertise 10Base-TX Half Duplex */ | ||
1334 | PHY_M_AN_SEL_MSK =0x1f<<4, /* Bit 4.. 0: Selector Field Mask */ | ||
1335 | }; | ||
1336 | |||
1337 | /* special defines for FIBER (88E1011S only) */ | ||
1338 | enum { | ||
1339 | PHY_M_AN_ASP_X = 1<<8, /* Asymmetric Pause */ | ||
1340 | PHY_M_AN_PC_X = 1<<7, /* MAC Pause implemented */ | ||
1341 | PHY_M_AN_1000X_AHD = 1<<6, /* Advertise 10000Base-X Half Duplex */ | ||
1342 | PHY_M_AN_1000X_AFD = 1<<5, /* Advertise 10000Base-X Full Duplex */ | ||
1343 | }; | ||
1344 | |||
1345 | /* Pause Bits (PHY_M_AN_ASP_X and PHY_M_AN_PC_X) encoding */ | ||
1346 | enum { | ||
1347 | PHY_M_P_NO_PAUSE_X = 0<<7,/* Bit 8.. 7: no Pause Mode */ | ||
1348 | PHY_M_P_SYM_MD_X = 1<<7, /* Bit 8.. 7: symmetric Pause Mode */ | ||
1349 | PHY_M_P_ASYM_MD_X = 2<<7,/* Bit 8.. 7: asymmetric Pause Mode */ | ||
1350 | PHY_M_P_BOTH_MD_X = 3<<7,/* Bit 8.. 7: both Pause Mode */ | ||
1351 | }; | ||
1352 | |||
1353 | /***** PHY_MARV_1000T_CTRL 16 bit r/w 1000Base-T Control Reg *****/ | ||
1354 | enum { | ||
1355 | PHY_M_1000C_TEST = 7<<13,/* Bit 15..13: Test Modes */ | ||
1356 | PHY_M_1000C_MSE = 1<<12, /* Manual Master/Slave Enable */ | ||
1357 | PHY_M_1000C_MSC = 1<<11, /* M/S Configuration (1=Master) */ | ||
1358 | PHY_M_1000C_MPD = 1<<10, /* Multi-Port Device */ | ||
1359 | PHY_M_1000C_AFD = 1<<9, /* Advertise Full Duplex */ | ||
1360 | PHY_M_1000C_AHD = 1<<8, /* Advertise Half Duplex */ | ||
1361 | }; | ||
1362 | |||
1363 | /***** PHY_MARV_PHY_CTRL 16 bit r/w PHY Specific Ctrl Reg *****/ | ||
1364 | enum { | ||
1365 | PHY_M_PC_TX_FFD_MSK = 3<<14,/* Bit 15..14: Tx FIFO Depth Mask */ | ||
1366 | PHY_M_PC_RX_FFD_MSK = 3<<12,/* Bit 13..12: Rx FIFO Depth Mask */ | ||
1367 | PHY_M_PC_ASS_CRS_TX = 1<<11, /* Assert CRS on Transmit */ | ||
1368 | PHY_M_PC_FL_GOOD = 1<<10, /* Force Link Good */ | ||
1369 | PHY_M_PC_EN_DET_MSK = 3<<8,/* Bit 9.. 8: Energy Detect Mask */ | ||
1370 | PHY_M_PC_ENA_EXT_D = 1<<7, /* Enable Ext. Distance (10BT) */ | ||
1371 | PHY_M_PC_MDIX_MSK = 3<<5,/* Bit 6.. 5: MDI/MDIX Config. Mask */ | ||
1372 | PHY_M_PC_DIS_125CLK = 1<<4, /* Disable 125 CLK */ | ||
1373 | PHY_M_PC_MAC_POW_UP = 1<<3, /* MAC Power up */ | ||
1374 | PHY_M_PC_SQE_T_ENA = 1<<2, /* SQE Test Enabled */ | ||
1375 | PHY_M_PC_POL_R_DIS = 1<<1, /* Polarity Reversal Disabled */ | ||
1376 | PHY_M_PC_DIS_JABBER = 1<<0, /* Disable Jabber */ | ||
1377 | }; | ||
1378 | |||
1379 | enum { | ||
1380 | PHY_M_PC_EN_DET = 2<<8, /* Energy Detect (Mode 1) */ | ||
1381 | PHY_M_PC_EN_DET_PLUS = 3<<8, /* Energy Detect Plus (Mode 2) */ | ||
1382 | }; | ||
1383 | |||
1384 | #define PHY_M_PC_MDI_XMODE(x) (((x)<<5) & PHY_M_PC_MDIX_MSK) | ||
1385 | |||
1386 | enum { | ||
1387 | PHY_M_PC_MAN_MDI = 0, /* 00 = Manual MDI configuration */ | ||
1388 | PHY_M_PC_MAN_MDIX = 1, /* 01 = Manual MDIX configuration */ | ||
1389 | PHY_M_PC_ENA_AUTO = 3, /* 11 = Enable Automatic Crossover */ | ||
1390 | }; | ||
1391 | |||
1392 | /* for 10/100 Fast Ethernet PHY (88E3082 only) */ | ||
1393 | enum { | ||
1394 | PHY_M_PC_ENA_DTE_DT = 1<<15, /* Enable Data Terminal Equ. (DTE) Detect */ | ||
1395 | PHY_M_PC_ENA_ENE_DT = 1<<14, /* Enable Energy Detect (sense & pulse) */ | ||
1396 | PHY_M_PC_DIS_NLP_CK = 1<<13, /* Disable Normal Link Puls (NLP) Check */ | ||
1397 | PHY_M_PC_ENA_LIP_NP = 1<<12, /* Enable Link Partner Next Page Reg. */ | ||
1398 | PHY_M_PC_DIS_NLP_GN = 1<<11, /* Disable Normal Link Puls Generation */ | ||
1399 | |||
1400 | PHY_M_PC_DIS_SCRAMB = 1<<9, /* Disable Scrambler */ | ||
1401 | PHY_M_PC_DIS_FEFI = 1<<8, /* Disable Far End Fault Indic. (FEFI) */ | ||
1402 | |||
1403 | PHY_M_PC_SH_TP_SEL = 1<<6, /* Shielded Twisted Pair Select */ | ||
1404 | PHY_M_PC_RX_FD_MSK = 3<<2,/* Bit 3.. 2: Rx FIFO Depth Mask */ | ||
1405 | }; | ||
1406 | |||
1407 | /***** PHY_MARV_PHY_STAT 16 bit r/o PHY Specific Status Reg *****/ | ||
1408 | enum { | ||
1409 | PHY_M_PS_SPEED_MSK = 3<<14, /* Bit 15..14: Speed Mask */ | ||
1410 | PHY_M_PS_SPEED_1000 = 1<<15, /* 10 = 1000 Mbps */ | ||
1411 | PHY_M_PS_SPEED_100 = 1<<14, /* 01 = 100 Mbps */ | ||
1412 | PHY_M_PS_SPEED_10 = 0, /* 00 = 10 Mbps */ | ||
1413 | PHY_M_PS_FULL_DUP = 1<<13, /* Full Duplex */ | ||
1414 | PHY_M_PS_PAGE_REC = 1<<12, /* Page Received */ | ||
1415 | PHY_M_PS_SPDUP_RES = 1<<11, /* Speed & Duplex Resolved */ | ||
1416 | PHY_M_PS_LINK_UP = 1<<10, /* Link Up */ | ||
1417 | PHY_M_PS_CABLE_MSK = 7<<7, /* Bit 9.. 7: Cable Length Mask */ | ||
1418 | PHY_M_PS_MDI_X_STAT = 1<<6, /* MDI Crossover Stat (1=MDIX) */ | ||
1419 | PHY_M_PS_DOWNS_STAT = 1<<5, /* Downshift Status (1=downsh.) */ | ||
1420 | PHY_M_PS_ENDET_STAT = 1<<4, /* Energy Detect Status (1=act) */ | ||
1421 | PHY_M_PS_TX_P_EN = 1<<3, /* Tx Pause Enabled */ | ||
1422 | PHY_M_PS_RX_P_EN = 1<<2, /* Rx Pause Enabled */ | ||
1423 | PHY_M_PS_POL_REV = 1<<1, /* Polarity Reversed */ | ||
1424 | PHY_M_PS_JABBER = 1<<0, /* Jabber */ | ||
1425 | }; | ||
1426 | |||
1427 | #define PHY_M_PS_PAUSE_MSK (PHY_M_PS_TX_P_EN | PHY_M_PS_RX_P_EN) | ||
1428 | |||
1429 | /* for 10/100 Fast Ethernet PHY (88E3082 only) */ | ||
1430 | enum { | ||
1431 | PHY_M_PS_DTE_DETECT = 1<<15, /* Data Terminal Equipment (DTE) Detected */ | ||
1432 | PHY_M_PS_RES_SPEED = 1<<14, /* Resolved Speed (1=100 Mbps, 0=10 Mbps */ | ||
1433 | }; | ||
1434 | |||
1435 | enum { | ||
1436 | PHY_M_IS_AN_ERROR = 1<<15, /* Auto-Negotiation Error */ | ||
1437 | PHY_M_IS_LSP_CHANGE = 1<<14, /* Link Speed Changed */ | ||
1438 | PHY_M_IS_DUP_CHANGE = 1<<13, /* Duplex Mode Changed */ | ||
1439 | PHY_M_IS_AN_PR = 1<<12, /* Page Received */ | ||
1440 | PHY_M_IS_AN_COMPL = 1<<11, /* Auto-Negotiation Completed */ | ||
1441 | PHY_M_IS_LST_CHANGE = 1<<10, /* Link Status Changed */ | ||
1442 | PHY_M_IS_SYMB_ERROR = 1<<9, /* Symbol Error */ | ||
1443 | PHY_M_IS_FALSE_CARR = 1<<8, /* False Carrier */ | ||
1444 | PHY_M_IS_FIFO_ERROR = 1<<7, /* FIFO Overflow/Underrun Error */ | ||
1445 | PHY_M_IS_MDI_CHANGE = 1<<6, /* MDI Crossover Changed */ | ||
1446 | PHY_M_IS_DOWNSH_DET = 1<<5, /* Downshift Detected */ | ||
1447 | PHY_M_IS_END_CHANGE = 1<<4, /* Energy Detect Changed */ | ||
1448 | |||
1449 | PHY_M_IS_DTE_CHANGE = 1<<2, /* DTE Power Det. Status Changed */ | ||
1450 | PHY_M_IS_POL_CHANGE = 1<<1, /* Polarity Changed */ | ||
1451 | PHY_M_IS_JABBER = 1<<0, /* Jabber */ | ||
1452 | }; | ||
1453 | |||
1454 | #define PHY_M_DEF_MSK ( PHY_M_IS_AN_ERROR | PHY_M_IS_LSP_CHANGE | \ | ||
1455 | PHY_M_IS_LST_CHANGE | PHY_M_IS_FIFO_ERROR) | ||
1456 | |||
1457 | /***** PHY_MARV_EXT_CTRL 16 bit r/w Ext. PHY Specific Ctrl *****/ | ||
1458 | enum { | ||
1459 | PHY_M_EC_ENA_BC_EXT = 1<<15, /* Enable Block Carr. Ext. (88E1111 only) */ | ||
1460 | PHY_M_EC_ENA_LIN_LB = 1<<14, /* Enable Line Loopback (88E1111 only) */ | ||
1461 | |||
1462 | PHY_M_EC_DIS_LINK_P = 1<<12, /* Disable Link Pulses (88E1111 only) */ | ||
1463 | PHY_M_EC_M_DSC_MSK = 3<<10, /* Bit 11..10: Master Downshift Counter */ | ||
1464 | /* (88E1011 only) */ | ||
1465 | PHY_M_EC_S_DSC_MSK = 3<<8,/* Bit 9.. 8: Slave Downshift Counter */ | ||
1466 | /* (88E1011 only) */ | ||
1467 | PHY_M_EC_M_DSC_MSK2 = 7<<9,/* Bit 11.. 9: Master Downshift Counter */ | ||
1468 | /* (88E1111 only) */ | ||
1469 | PHY_M_EC_DOWN_S_ENA = 1<<8, /* Downshift Enable (88E1111 only) */ | ||
1470 | /* !!! Errata in spec. (1 = disable) */ | ||
1471 | PHY_M_EC_RX_TIM_CT = 1<<7, /* RGMII Rx Timing Control*/ | ||
1472 | PHY_M_EC_MAC_S_MSK = 7<<4,/* Bit 6.. 4: Def. MAC interface speed */ | ||
1473 | PHY_M_EC_FIB_AN_ENA = 1<<3, /* Fiber Auto-Neg. Enable (88E1011S only) */ | ||
1474 | PHY_M_EC_DTE_D_ENA = 1<<2, /* DTE Detect Enable (88E1111 only) */ | ||
1475 | PHY_M_EC_TX_TIM_CT = 1<<1, /* RGMII Tx Timing Control */ | ||
1476 | PHY_M_EC_TRANS_DIS = 1<<0, /* Transmitter Disable (88E1111 only) */}; | ||
1477 | |||
1478 | #define PHY_M_EC_M_DSC(x) ((x)<<10) /* 00=1x; 01=2x; 10=3x; 11=4x */ | ||
1479 | #define PHY_M_EC_S_DSC(x) ((x)<<8) /* 00=dis; 01=1x; 10=2x; 11=3x */ | ||
1480 | #define PHY_M_EC_MAC_S(x) ((x)<<4) /* 01X=0; 110=2.5; 111=25 (MHz) */ | ||
1481 | |||
1482 | #define PHY_M_EC_M_DSC_2(x) ((x)<<9) /* 000=1x; 001=2x; 010=3x; 011=4x */ | ||
1483 | /* 100=5x; 101=6x; 110=7x; 111=8x */ | ||
1484 | enum { | ||
1485 | MAC_TX_CLK_0_MHZ = 2, | ||
1486 | MAC_TX_CLK_2_5_MHZ = 6, | ||
1487 | MAC_TX_CLK_25_MHZ = 7, | ||
1488 | }; | ||
1489 | |||
1490 | /***** PHY_MARV_LED_CTRL 16 bit r/w LED Control Reg *****/ | ||
1491 | enum { | ||
1492 | PHY_M_LEDC_DIS_LED = 1<<15, /* Disable LED */ | ||
1493 | PHY_M_LEDC_PULS_MSK = 7<<12,/* Bit 14..12: Pulse Stretch Mask */ | ||
1494 | PHY_M_LEDC_F_INT = 1<<11, /* Force Interrupt */ | ||
1495 | PHY_M_LEDC_BL_R_MSK = 7<<8,/* Bit 10.. 8: Blink Rate Mask */ | ||
1496 | PHY_M_LEDC_DP_C_LSB = 1<<7, /* Duplex Control (LSB, 88E1111 only) */ | ||
1497 | PHY_M_LEDC_TX_C_LSB = 1<<6, /* Tx Control (LSB, 88E1111 only) */ | ||
1498 | PHY_M_LEDC_LK_C_MSK = 7<<3,/* Bit 5.. 3: Link Control Mask */ | ||
1499 | /* (88E1111 only) */ | ||
1500 | }; | ||
1501 | |||
1502 | enum { | ||
1503 | PHY_M_LEDC_LINK_MSK = 3<<3,/* Bit 4.. 3: Link Control Mask */ | ||
1504 | /* (88E1011 only) */ | ||
1505 | PHY_M_LEDC_DP_CTRL = 1<<2, /* Duplex Control */ | ||
1506 | PHY_M_LEDC_DP_C_MSB = 1<<2, /* Duplex Control (MSB, 88E1111 only) */ | ||
1507 | PHY_M_LEDC_RX_CTRL = 1<<1, /* Rx Activity / Link */ | ||
1508 | PHY_M_LEDC_TX_CTRL = 1<<0, /* Tx Activity / Link */ | ||
1509 | PHY_M_LEDC_TX_C_MSB = 1<<0, /* Tx Control (MSB, 88E1111 only) */ | ||
1510 | }; | ||
1511 | |||
1512 | #define PHY_M_LED_PULS_DUR(x) ( ((x)<<12) & PHY_M_LEDC_PULS_MSK) | ||
1513 | |||
1514 | enum { | ||
1515 | PULS_NO_STR = 0,/* no pulse stretching */ | ||
1516 | PULS_21MS = 1,/* 21 ms to 42 ms */ | ||
1517 | PULS_42MS = 2,/* 42 ms to 84 ms */ | ||
1518 | PULS_84MS = 3,/* 84 ms to 170 ms */ | ||
1519 | PULS_170MS = 4,/* 170 ms to 340 ms */ | ||
1520 | PULS_340MS = 5,/* 340 ms to 670 ms */ | ||
1521 | PULS_670MS = 6,/* 670 ms to 1.3 s */ | ||
1522 | PULS_1300MS = 7,/* 1.3 s to 2.7 s */ | ||
1523 | }; | ||
1524 | |||
1525 | #define PHY_M_LED_BLINK_RT(x) ( ((x)<<8) & PHY_M_LEDC_BL_R_MSK) | ||
1526 | |||
1527 | enum { | ||
1528 | BLINK_42MS = 0,/* 42 ms */ | ||
1529 | BLINK_84MS = 1,/* 84 ms */ | ||
1530 | BLINK_170MS = 2,/* 170 ms */ | ||
1531 | BLINK_340MS = 3,/* 340 ms */ | ||
1532 | BLINK_670MS = 4,/* 670 ms */ | ||
1533 | }; | ||
1534 | |||
1535 | /***** PHY_MARV_LED_OVER 16 bit r/w Manual LED Override Reg *****/ | ||
1536 | #define PHY_M_LED_MO_SGMII(x) ((x)<<14) /* Bit 15..14: SGMII AN Timer */ | ||
1537 | /* Bit 13..12: reserved */ | ||
1538 | #define PHY_M_LED_MO_DUP(x) ((x)<<10) /* Bit 11..10: Duplex */ | ||
1539 | #define PHY_M_LED_MO_10(x) ((x)<<8) /* Bit 9.. 8: Link 10 */ | ||
1540 | #define PHY_M_LED_MO_100(x) ((x)<<6) /* Bit 7.. 6: Link 100 */ | ||
1541 | #define PHY_M_LED_MO_1000(x) ((x)<<4) /* Bit 5.. 4: Link 1000 */ | ||
1542 | #define PHY_M_LED_MO_RX(x) ((x)<<2) /* Bit 3.. 2: Rx */ | ||
1543 | #define PHY_M_LED_MO_TX(x) ((x)<<0) /* Bit 1.. 0: Tx */ | ||
1544 | |||
1545 | enum { | ||
1546 | MO_LED_NORM = 0, | ||
1547 | MO_LED_BLINK = 1, | ||
1548 | MO_LED_OFF = 2, | ||
1549 | MO_LED_ON = 3, | ||
1550 | }; | ||
1551 | |||
1552 | /***** PHY_MARV_EXT_CTRL_2 16 bit r/w Ext. PHY Specific Ctrl 2 *****/ | ||
1553 | enum { | ||
1554 | PHY_M_EC2_FI_IMPED = 1<<6, /* Fiber Input Impedance */ | ||
1555 | PHY_M_EC2_FO_IMPED = 1<<5, /* Fiber Output Impedance */ | ||
1556 | PHY_M_EC2_FO_M_CLK = 1<<4, /* Fiber Mode Clock Enable */ | ||
1557 | PHY_M_EC2_FO_BOOST = 1<<3, /* Fiber Output Boost */ | ||
1558 | PHY_M_EC2_FO_AM_MSK = 7,/* Bit 2.. 0: Fiber Output Amplitude */ | ||
1559 | }; | ||
1560 | |||
1561 | /***** PHY_MARV_EXT_P_STAT 16 bit r/w Ext. PHY Specific Status *****/ | ||
1562 | enum { | ||
1563 | PHY_M_FC_AUTO_SEL = 1<<15, /* Fiber/Copper Auto Sel. Dis. */ | ||
1564 | PHY_M_FC_AN_REG_ACC = 1<<14, /* Fiber/Copper AN Reg. Access */ | ||
1565 | PHY_M_FC_RESOLUTION = 1<<13, /* Fiber/Copper Resolution */ | ||
1566 | PHY_M_SER_IF_AN_BP = 1<<12, /* Ser. IF AN Bypass Enable */ | ||
1567 | PHY_M_SER_IF_BP_ST = 1<<11, /* Ser. IF AN Bypass Status */ | ||
1568 | PHY_M_IRQ_POLARITY = 1<<10, /* IRQ polarity */ | ||
1569 | PHY_M_DIS_AUT_MED = 1<<9, /* Disable Aut. Medium Reg. Selection */ | ||
1570 | /* (88E1111 only) */ | ||
1571 | /* Bit 9.. 4: reserved (88E1011 only) */ | ||
1572 | PHY_M_UNDOC1 = 1<<7, /* undocumented bit !! */ | ||
1573 | PHY_M_DTE_POW_STAT = 1<<4, /* DTE Power Status (88E1111 only) */ | ||
1574 | PHY_M_MODE_MASK = 0xf, /* Bit 3.. 0: copy of HWCFG MODE[3:0] */ | ||
1575 | }; | ||
1576 | |||
1577 | /***** PHY_MARV_CABLE_DIAG 16 bit r/o Cable Diagnostic Reg *****/ | ||
1578 | enum { | ||
1579 | PHY_M_CABD_ENA_TEST = 1<<15, /* Enable Test (Page 0) */ | ||
1580 | PHY_M_CABD_DIS_WAIT = 1<<15, /* Disable Waiting Period (Page 1) */ | ||
1581 | /* (88E1111 only) */ | ||
1582 | PHY_M_CABD_STAT_MSK = 3<<13, /* Bit 14..13: Status Mask */ | ||
1583 | PHY_M_CABD_AMPL_MSK = 0x1f<<8,/* Bit 12.. 8: Amplitude Mask */ | ||
1584 | /* (88E1111 only) */ | ||
1585 | PHY_M_CABD_DIST_MSK = 0xff, /* Bit 7.. 0: Distance Mask */ | ||
1586 | }; | ||
1587 | |||
1588 | /* values for Cable Diagnostic Status (11=fail; 00=OK; 10=open; 01=short) */ | ||
1589 | enum { | ||
1590 | CABD_STAT_NORMAL= 0, | ||
1591 | CABD_STAT_SHORT = 1, | ||
1592 | CABD_STAT_OPEN = 2, | ||
1593 | CABD_STAT_FAIL = 3, | ||
1594 | }; | ||
1595 | |||
1596 | /* for 10/100 Fast Ethernet PHY (88E3082 only) */ | ||
1597 | /***** PHY_MARV_FE_LED_PAR 16 bit r/w LED Parallel Select Reg. *****/ | ||
1598 | /* Bit 15..12: reserved (used internally) */ | ||
1599 | enum { | ||
1600 | PHY_M_FELP_LED2_MSK = 0xf<<8, /* Bit 11.. 8: LED2 Mask (LINK) */ | ||
1601 | PHY_M_FELP_LED1_MSK = 0xf<<4, /* Bit 7.. 4: LED1 Mask (ACT) */ | ||
1602 | PHY_M_FELP_LED0_MSK = 0xf, /* Bit 3.. 0: LED0 Mask (SPEED) */ | ||
1603 | }; | ||
1604 | |||
1605 | #define PHY_M_FELP_LED2_CTRL(x) ( ((x)<<8) & PHY_M_FELP_LED2_MSK) | ||
1606 | #define PHY_M_FELP_LED1_CTRL(x) ( ((x)<<4) & PHY_M_FELP_LED1_MSK) | ||
1607 | #define PHY_M_FELP_LED0_CTRL(x) ( ((x)<<0) & PHY_M_FELP_LED0_MSK) | ||
1608 | |||
1609 | enum { | ||
1610 | LED_PAR_CTRL_COLX = 0x00, | ||
1611 | LED_PAR_CTRL_ERROR = 0x01, | ||
1612 | LED_PAR_CTRL_DUPLEX = 0x02, | ||
1613 | LED_PAR_CTRL_DP_COL = 0x03, | ||
1614 | LED_PAR_CTRL_SPEED = 0x04, | ||
1615 | LED_PAR_CTRL_LINK = 0x05, | ||
1616 | LED_PAR_CTRL_TX = 0x06, | ||
1617 | LED_PAR_CTRL_RX = 0x07, | ||
1618 | LED_PAR_CTRL_ACT = 0x08, | ||
1619 | LED_PAR_CTRL_LNK_RX = 0x09, | ||
1620 | LED_PAR_CTRL_LNK_AC = 0x0a, | ||
1621 | LED_PAR_CTRL_ACT_BL = 0x0b, | ||
1622 | LED_PAR_CTRL_TX_BL = 0x0c, | ||
1623 | LED_PAR_CTRL_RX_BL = 0x0d, | ||
1624 | LED_PAR_CTRL_COL_BL = 0x0e, | ||
1625 | LED_PAR_CTRL_INACT = 0x0f | ||
1626 | }; | ||
1627 | |||
1628 | /*****,PHY_MARV_FE_SPEC_2 16 bit r/w Specific Control Reg. 2 *****/ | ||
1629 | enum { | ||
1630 | PHY_M_FESC_DIS_WAIT = 1<<2, /* Disable TDR Waiting Period */ | ||
1631 | PHY_M_FESC_ENA_MCLK = 1<<1, /* Enable MAC Rx Clock in sleep mode */ | ||
1632 | PHY_M_FESC_SEL_CL_A = 1<<0, /* Select Class A driver (100B-TX) */ | ||
1633 | }; | ||
1634 | |||
1635 | /* for Yukon-2 Gigabit Ethernet PHY (88E1112 only) */ | ||
1636 | /***** PHY_MARV_PHY_CTRL (page 2) 16 bit r/w MAC Specific Ctrl *****/ | ||
1637 | enum { | ||
1638 | PHY_M_MAC_MD_MSK = 7<<7, /* Bit 9.. 7: Mode Select Mask */ | ||
1639 | PHY_M_MAC_MD_AUTO = 3,/* Auto Copper/1000Base-X */ | ||
1640 | PHY_M_MAC_MD_COPPER = 5,/* Copper only */ | ||
1641 | PHY_M_MAC_MD_1000BX = 7,/* 1000Base-X only */ | ||
1642 | }; | ||
1643 | #define PHY_M_MAC_MODE_SEL(x) ( ((x)<<7) & PHY_M_MAC_MD_MSK) | ||
1644 | |||
1645 | /***** PHY_MARV_PHY_CTRL (page 3) 16 bit r/w LED Control Reg. *****/ | ||
1646 | enum { | ||
1647 | PHY_M_LEDC_LOS_MSK = 0xf<<12,/* Bit 15..12: LOS LED Ctrl. Mask */ | ||
1648 | PHY_M_LEDC_INIT_MSK = 0xf<<8, /* Bit 11.. 8: INIT LED Ctrl. Mask */ | ||
1649 | PHY_M_LEDC_STA1_MSK = 0xf<<4,/* Bit 7.. 4: STAT1 LED Ctrl. Mask */ | ||
1650 | PHY_M_LEDC_STA0_MSK = 0xf, /* Bit 3.. 0: STAT0 LED Ctrl. Mask */ | ||
1651 | }; | ||
1652 | |||
1653 | #define PHY_M_LEDC_LOS_CTRL(x) ( ((x)<<12) & PHY_M_LEDC_LOS_MSK) | ||
1654 | #define PHY_M_LEDC_INIT_CTRL(x) ( ((x)<<8) & PHY_M_LEDC_INIT_MSK) | ||
1655 | #define PHY_M_LEDC_STA1_CTRL(x) ( ((x)<<4) & PHY_M_LEDC_STA1_MSK) | ||
1656 | #define PHY_M_LEDC_STA0_CTRL(x) ( ((x)<<0) & PHY_M_LEDC_STA0_MSK) | ||
1657 | |||
1658 | /* GMAC registers */ | ||
1659 | /* Port Registers */ | ||
1660 | enum { | ||
1661 | GM_GP_STAT = 0x0000, /* 16 bit r/o General Purpose Status */ | ||
1662 | GM_GP_CTRL = 0x0004, /* 16 bit r/w General Purpose Control */ | ||
1663 | GM_TX_CTRL = 0x0008, /* 16 bit r/w Transmit Control Reg. */ | ||
1664 | GM_RX_CTRL = 0x000c, /* 16 bit r/w Receive Control Reg. */ | ||
1665 | GM_TX_FLOW_CTRL = 0x0010, /* 16 bit r/w Transmit Flow-Control */ | ||
1666 | GM_TX_PARAM = 0x0014, /* 16 bit r/w Transmit Parameter Reg. */ | ||
1667 | GM_SERIAL_MODE = 0x0018, /* 16 bit r/w Serial Mode Register */ | ||
1668 | /* Source Address Registers */ | ||
1669 | GM_SRC_ADDR_1L = 0x001c, /* 16 bit r/w Source Address 1 (low) */ | ||
1670 | GM_SRC_ADDR_1M = 0x0020, /* 16 bit r/w Source Address 1 (middle) */ | ||
1671 | GM_SRC_ADDR_1H = 0x0024, /* 16 bit r/w Source Address 1 (high) */ | ||
1672 | GM_SRC_ADDR_2L = 0x0028, /* 16 bit r/w Source Address 2 (low) */ | ||
1673 | GM_SRC_ADDR_2M = 0x002c, /* 16 bit r/w Source Address 2 (middle) */ | ||
1674 | GM_SRC_ADDR_2H = 0x0030, /* 16 bit r/w Source Address 2 (high) */ | ||
1675 | |||
1676 | /* Multicast Address Hash Registers */ | ||
1677 | GM_MC_ADDR_H1 = 0x0034, /* 16 bit r/w Multicast Address Hash 1 */ | ||
1678 | GM_MC_ADDR_H2 = 0x0038, /* 16 bit r/w Multicast Address Hash 2 */ | ||
1679 | GM_MC_ADDR_H3 = 0x003c, /* 16 bit r/w Multicast Address Hash 3 */ | ||
1680 | GM_MC_ADDR_H4 = 0x0040, /* 16 bit r/w Multicast Address Hash 4 */ | ||
1681 | |||
1682 | /* Interrupt Source Registers */ | ||
1683 | GM_TX_IRQ_SRC = 0x0044, /* 16 bit r/o Tx Overflow IRQ Source */ | ||
1684 | GM_RX_IRQ_SRC = 0x0048, /* 16 bit r/o Rx Overflow IRQ Source */ | ||
1685 | GM_TR_IRQ_SRC = 0x004c, /* 16 bit r/o Tx/Rx Over. IRQ Source */ | ||
1686 | |||
1687 | /* Interrupt Mask Registers */ | ||
1688 | GM_TX_IRQ_MSK = 0x0050, /* 16 bit r/w Tx Overflow IRQ Mask */ | ||
1689 | GM_RX_IRQ_MSK = 0x0054, /* 16 bit r/w Rx Overflow IRQ Mask */ | ||
1690 | GM_TR_IRQ_MSK = 0x0058, /* 16 bit r/w Tx/Rx Over. IRQ Mask */ | ||
1691 | |||
1692 | /* Serial Management Interface (SMI) Registers */ | ||
1693 | GM_SMI_CTRL = 0x0080, /* 16 bit r/w SMI Control Register */ | ||
1694 | GM_SMI_DATA = 0x0084, /* 16 bit r/w SMI Data Register */ | ||
1695 | GM_PHY_ADDR = 0x0088, /* 16 bit r/w GPHY Address Register */ | ||
1696 | }; | ||
1697 | |||
1698 | /* MIB Counters */ | ||
1699 | #define GM_MIB_CNT_BASE 0x0100 /* Base Address of MIB Counters */ | ||
1700 | #define GM_MIB_CNT_SIZE 44 /* Number of MIB Counters */ | ||
1701 | |||
1702 | /* | ||
1703 | * MIB Counters base address definitions (low word) - | ||
1704 | * use offset 4 for access to high word (32 bit r/o) | ||
1705 | */ | ||
1706 | enum { | ||
1707 | GM_RXF_UC_OK = GM_MIB_CNT_BASE + 0, /* Unicast Frames Received OK */ | ||
1708 | GM_RXF_BC_OK = GM_MIB_CNT_BASE + 8, /* Broadcast Frames Received OK */ | ||
1709 | GM_RXF_MPAUSE = GM_MIB_CNT_BASE + 16, /* Pause MAC Ctrl Frames Received */ | ||
1710 | GM_RXF_MC_OK = GM_MIB_CNT_BASE + 24, /* Multicast Frames Received OK */ | ||
1711 | GM_RXF_FCS_ERR = GM_MIB_CNT_BASE + 32, /* Rx Frame Check Seq. Error */ | ||
1712 | /* GM_MIB_CNT_BASE + 40: reserved */ | ||
1713 | GM_RXO_OK_LO = GM_MIB_CNT_BASE + 48, /* Octets Received OK Low */ | ||
1714 | GM_RXO_OK_HI = GM_MIB_CNT_BASE + 56, /* Octets Received OK High */ | ||
1715 | GM_RXO_ERR_LO = GM_MIB_CNT_BASE + 64, /* Octets Received Invalid Low */ | ||
1716 | GM_RXO_ERR_HI = GM_MIB_CNT_BASE + 72, /* Octets Received Invalid High */ | ||
1717 | GM_RXF_SHT = GM_MIB_CNT_BASE + 80, /* Frames <64 Byte Received OK */ | ||
1718 | GM_RXE_FRAG = GM_MIB_CNT_BASE + 88, /* Frames <64 Byte Received with FCS Err */ | ||
1719 | GM_RXF_64B = GM_MIB_CNT_BASE + 96, /* 64 Byte Rx Frame */ | ||
1720 | GM_RXF_127B = GM_MIB_CNT_BASE + 104, /* 65-127 Byte Rx Frame */ | ||
1721 | GM_RXF_255B = GM_MIB_CNT_BASE + 112, /* 128-255 Byte Rx Frame */ | ||
1722 | GM_RXF_511B = GM_MIB_CNT_BASE + 120, /* 256-511 Byte Rx Frame */ | ||
1723 | GM_RXF_1023B = GM_MIB_CNT_BASE + 128, /* 512-1023 Byte Rx Frame */ | ||
1724 | GM_RXF_1518B = GM_MIB_CNT_BASE + 136, /* 1024-1518 Byte Rx Frame */ | ||
1725 | GM_RXF_MAX_SZ = GM_MIB_CNT_BASE + 144, /* 1519-MaxSize Byte Rx Frame */ | ||
1726 | GM_RXF_LNG_ERR = GM_MIB_CNT_BASE + 152, /* Rx Frame too Long Error */ | ||
1727 | GM_RXF_JAB_PKT = GM_MIB_CNT_BASE + 160, /* Rx Jabber Packet Frame */ | ||
1728 | /* GM_MIB_CNT_BASE + 168: reserved */ | ||
1729 | GM_RXE_FIFO_OV = GM_MIB_CNT_BASE + 176, /* Rx FIFO overflow Event */ | ||
1730 | /* GM_MIB_CNT_BASE + 184: reserved */ | ||
1731 | GM_TXF_UC_OK = GM_MIB_CNT_BASE + 192, /* Unicast Frames Xmitted OK */ | ||
1732 | GM_TXF_BC_OK = GM_MIB_CNT_BASE + 200, /* Broadcast Frames Xmitted OK */ | ||
1733 | GM_TXF_MPAUSE = GM_MIB_CNT_BASE + 208, /* Pause MAC Ctrl Frames Xmitted */ | ||
1734 | GM_TXF_MC_OK = GM_MIB_CNT_BASE + 216, /* Multicast Frames Xmitted OK */ | ||
1735 | GM_TXO_OK_LO = GM_MIB_CNT_BASE + 224, /* Octets Transmitted OK Low */ | ||
1736 | GM_TXO_OK_HI = GM_MIB_CNT_BASE + 232, /* Octets Transmitted OK High */ | ||
1737 | GM_TXF_64B = GM_MIB_CNT_BASE + 240, /* 64 Byte Tx Frame */ | ||
1738 | GM_TXF_127B = GM_MIB_CNT_BASE + 248, /* 65-127 Byte Tx Frame */ | ||
1739 | GM_TXF_255B = GM_MIB_CNT_BASE + 256, /* 128-255 Byte Tx Frame */ | ||
1740 | GM_TXF_511B = GM_MIB_CNT_BASE + 264, /* 256-511 Byte Tx Frame */ | ||
1741 | GM_TXF_1023B = GM_MIB_CNT_BASE + 272, /* 512-1023 Byte Tx Frame */ | ||
1742 | GM_TXF_1518B = GM_MIB_CNT_BASE + 280, /* 1024-1518 Byte Tx Frame */ | ||
1743 | GM_TXF_MAX_SZ = GM_MIB_CNT_BASE + 288, /* 1519-MaxSize Byte Tx Frame */ | ||
1744 | |||
1745 | GM_TXF_COL = GM_MIB_CNT_BASE + 304, /* Tx Collision */ | ||
1746 | GM_TXF_LAT_COL = GM_MIB_CNT_BASE + 312, /* Tx Late Collision */ | ||
1747 | GM_TXF_ABO_COL = GM_MIB_CNT_BASE + 320, /* Tx aborted due to Exces. Col. */ | ||
1748 | GM_TXF_MUL_COL = GM_MIB_CNT_BASE + 328, /* Tx Multiple Collision */ | ||
1749 | GM_TXF_SNG_COL = GM_MIB_CNT_BASE + 336, /* Tx Single Collision */ | ||
1750 | GM_TXE_FIFO_UR = GM_MIB_CNT_BASE + 344, /* Tx FIFO Underrun Event */ | ||
1751 | }; | ||
1752 | |||
1753 | /* GMAC Bit Definitions */ | ||
1754 | /* GM_GP_STAT 16 bit r/o General Purpose Status Register */ | ||
1755 | enum { | ||
1756 | GM_GPSR_SPEED = 1<<15, /* Bit 15: Port Speed (1 = 100 Mbps) */ | ||
1757 | GM_GPSR_DUPLEX = 1<<14, /* Bit 14: Duplex Mode (1 = Full) */ | ||
1758 | GM_GPSR_FC_TX_DIS = 1<<13, /* Bit 13: Tx Flow-Control Mode Disabled */ | ||
1759 | GM_GPSR_LINK_UP = 1<<12, /* Bit 12: Link Up Status */ | ||
1760 | GM_GPSR_PAUSE = 1<<11, /* Bit 11: Pause State */ | ||
1761 | GM_GPSR_TX_ACTIVE = 1<<10, /* Bit 10: Tx in Progress */ | ||
1762 | GM_GPSR_EXC_COL = 1<<9, /* Bit 9: Excessive Collisions Occured */ | ||
1763 | GM_GPSR_LAT_COL = 1<<8, /* Bit 8: Late Collisions Occured */ | ||
1764 | |||
1765 | GM_GPSR_PHY_ST_CH = 1<<5, /* Bit 5: PHY Status Change */ | ||
1766 | GM_GPSR_GIG_SPEED = 1<<4, /* Bit 4: Gigabit Speed (1 = 1000 Mbps) */ | ||
1767 | GM_GPSR_PART_MODE = 1<<3, /* Bit 3: Partition mode */ | ||
1768 | GM_GPSR_FC_RX_DIS = 1<<2, /* Bit 2: Rx Flow-Control Mode Disabled */ | ||
1769 | GM_GPSR_PROM_EN = 1<<1, /* Bit 1: Promiscuous Mode Enabled */ | ||
1770 | }; | ||
1771 | |||
1772 | /* GM_GP_CTRL 16 bit r/w General Purpose Control Register */ | ||
1773 | enum { | ||
1774 | GM_GPCR_PROM_ENA = 1<<14, /* Bit 14: Enable Promiscuous Mode */ | ||
1775 | GM_GPCR_FC_TX_DIS = 1<<13, /* Bit 13: Disable Tx Flow-Control Mode */ | ||
1776 | GM_GPCR_TX_ENA = 1<<12, /* Bit 12: Enable Transmit */ | ||
1777 | GM_GPCR_RX_ENA = 1<<11, /* Bit 11: Enable Receive */ | ||
1778 | GM_GPCR_BURST_ENA = 1<<10, /* Bit 10: Enable Burst Mode */ | ||
1779 | GM_GPCR_LOOP_ENA = 1<<9, /* Bit 9: Enable MAC Loopback Mode */ | ||
1780 | GM_GPCR_PART_ENA = 1<<8, /* Bit 8: Enable Partition Mode */ | ||
1781 | GM_GPCR_GIGS_ENA = 1<<7, /* Bit 7: Gigabit Speed (1000 Mbps) */ | ||
1782 | GM_GPCR_FL_PASS = 1<<6, /* Bit 6: Force Link Pass */ | ||
1783 | GM_GPCR_DUP_FULL = 1<<5, /* Bit 5: Full Duplex Mode */ | ||
1784 | GM_GPCR_FC_RX_DIS = 1<<4, /* Bit 4: Disable Rx Flow-Control Mode */ | ||
1785 | GM_GPCR_SPEED_100 = 1<<3, /* Bit 3: Port Speed 100 Mbps */ | ||
1786 | GM_GPCR_AU_DUP_DIS = 1<<2, /* Bit 2: Disable Auto-Update Duplex */ | ||
1787 | GM_GPCR_AU_FCT_DIS = 1<<1, /* Bit 1: Disable Auto-Update Flow-C. */ | ||
1788 | GM_GPCR_AU_SPD_DIS = 1<<0, /* Bit 0: Disable Auto-Update Speed */ | ||
1789 | }; | ||
1790 | |||
1791 | #define GM_GPCR_SPEED_1000 (GM_GPCR_GIGS_ENA | GM_GPCR_SPEED_100) | ||
1792 | #define GM_GPCR_AU_ALL_DIS (GM_GPCR_AU_DUP_DIS | GM_GPCR_AU_FCT_DIS|GM_GPCR_AU_SPD_DIS) | ||
1793 | |||
1794 | /* GM_TX_CTRL 16 bit r/w Transmit Control Register */ | ||
1795 | enum { | ||
1796 | GM_TXCR_FORCE_JAM = 1<<15, /* Bit 15: Force Jam / Flow-Control */ | ||
1797 | GM_TXCR_CRC_DIS = 1<<14, /* Bit 14: Disable insertion of CRC */ | ||
1798 | GM_TXCR_PAD_DIS = 1<<13, /* Bit 13: Disable padding of packets */ | ||
1799 | GM_TXCR_COL_THR_MSK = 1<<10, /* Bit 12..10: Collision Threshold */ | ||
1800 | }; | ||
1801 | |||
1802 | #define TX_COL_THR(x) (((x)<<10) & GM_TXCR_COL_THR_MSK) | ||
1803 | #define TX_COL_DEF 0x04 | ||
1804 | |||
1805 | /* GM_RX_CTRL 16 bit r/w Receive Control Register */ | ||
1806 | enum { | ||
1807 | GM_RXCR_UCF_ENA = 1<<15, /* Bit 15: Enable Unicast filtering */ | ||
1808 | GM_RXCR_MCF_ENA = 1<<14, /* Bit 14: Enable Multicast filtering */ | ||
1809 | GM_RXCR_CRC_DIS = 1<<13, /* Bit 13: Remove 4-byte CRC */ | ||
1810 | GM_RXCR_PASS_FC = 1<<12, /* Bit 12: Pass FC packets to FIFO */ | ||
1811 | }; | ||
1812 | |||
1813 | /* GM_TX_PARAM 16 bit r/w Transmit Parameter Register */ | ||
1814 | enum { | ||
1815 | GM_TXPA_JAMLEN_MSK = 0x03<<14, /* Bit 15..14: Jam Length */ | ||
1816 | GM_TXPA_JAMIPG_MSK = 0x1f<<9, /* Bit 13..9: Jam IPG */ | ||
1817 | GM_TXPA_JAMDAT_MSK = 0x1f<<4, /* Bit 8..4: IPG Jam to Data */ | ||
1818 | |||
1819 | TX_JAM_LEN_DEF = 0x03, | ||
1820 | TX_JAM_IPG_DEF = 0x0b, | ||
1821 | TX_IPG_JAM_DEF = 0x1c, | ||
1822 | }; | ||
1823 | |||
1824 | #define TX_JAM_LEN_VAL(x) (((x)<<14) & GM_TXPA_JAMLEN_MSK) | ||
1825 | #define TX_JAM_IPG_VAL(x) (((x)<<9) & GM_TXPA_JAMIPG_MSK) | ||
1826 | #define TX_IPG_JAM_DATA(x) (((x)<<4) & GM_TXPA_JAMDAT_MSK) | ||
1827 | |||
1828 | |||
1829 | /* GM_SERIAL_MODE 16 bit r/w Serial Mode Register */ | ||
1830 | enum { | ||
1831 | GM_SMOD_DATABL_MSK = 0x1f<<11, /* Bit 15..11: Data Blinder (r/o) */ | ||
1832 | GM_SMOD_LIMIT_4 = 1<<10, /* Bit 10: 4 consecutive Tx trials */ | ||
1833 | GM_SMOD_VLAN_ENA = 1<<9, /* Bit 9: Enable VLAN (Max. Frame Len) */ | ||
1834 | GM_SMOD_JUMBO_ENA = 1<<8, /* Bit 8: Enable Jumbo (Max. Frame Len) */ | ||
1835 | GM_SMOD_IPG_MSK = 0x1f /* Bit 4..0: Inter-Packet Gap (IPG) */ | ||
1836 | }; | ||
1837 | |||
1838 | #define DATA_BLIND_VAL(x) (((x)<<11) & GM_SMOD_DATABL_MSK) | ||
1839 | #define DATA_BLIND_DEF 0x04 | ||
1840 | |||
1841 | #define IPG_DATA_VAL(x) (x & GM_SMOD_IPG_MSK) | ||
1842 | #define IPG_DATA_DEF 0x1e | ||
1843 | |||
1844 | /* GM_SMI_CTRL 16 bit r/w SMI Control Register */ | ||
1845 | enum { | ||
1846 | GM_SMI_CT_PHY_A_MSK = 0x1f<<11,/* Bit 15..11: PHY Device Address */ | ||
1847 | GM_SMI_CT_REG_A_MSK = 0x1f<<6,/* Bit 10.. 6: PHY Register Address */ | ||
1848 | GM_SMI_CT_OP_RD = 1<<5, /* Bit 5: OpCode Read (0=Write)*/ | ||
1849 | GM_SMI_CT_RD_VAL = 1<<4, /* Bit 4: Read Valid (Read completed) */ | ||
1850 | GM_SMI_CT_BUSY = 1<<3, /* Bit 3: Busy (Operation in progress) */ | ||
1851 | }; | ||
1852 | |||
1853 | #define GM_SMI_CT_PHY_AD(x) (((x)<<11) & GM_SMI_CT_PHY_A_MSK) | ||
1854 | #define GM_SMI_CT_REG_AD(x) (((x)<<6) & GM_SMI_CT_REG_A_MSK) | ||
1855 | |||
1856 | /* GM_PHY_ADDR 16 bit r/w GPHY Address Register */ | ||
1857 | enum { | ||
1858 | GM_PAR_MIB_CLR = 1<<5, /* Bit 5: Set MIB Clear Counter Mode */ | ||
1859 | GM_PAR_MIB_TST = 1<<4, /* Bit 4: MIB Load Counter (Test Mode) */ | ||
1860 | }; | ||
1861 | |||
1862 | /* Receive Frame Status Encoding */ | ||
1863 | enum { | ||
1864 | GMR_FS_LEN = 0xffff<<16, /* Bit 31..16: Rx Frame Length */ | ||
1865 | GMR_FS_VLAN = 1<<13, /* Bit 13: VLAN Packet */ | ||
1866 | GMR_FS_JABBER = 1<<12, /* Bit 12: Jabber Packet */ | ||
1867 | GMR_FS_UN_SIZE = 1<<11, /* Bit 11: Undersize Packet */ | ||
1868 | GMR_FS_MC = 1<<10, /* Bit 10: Multicast Packet */ | ||
1869 | GMR_FS_BC = 1<<9, /* Bit 9: Broadcast Packet */ | ||
1870 | GMR_FS_RX_OK = 1<<8, /* Bit 8: Receive OK (Good Packet) */ | ||
1871 | GMR_FS_GOOD_FC = 1<<7, /* Bit 7: Good Flow-Control Packet */ | ||
1872 | GMR_FS_BAD_FC = 1<<6, /* Bit 6: Bad Flow-Control Packet */ | ||
1873 | GMR_FS_MII_ERR = 1<<5, /* Bit 5: MII Error */ | ||
1874 | GMR_FS_LONG_ERR = 1<<4, /* Bit 4: Too Long Packet */ | ||
1875 | GMR_FS_FRAGMENT = 1<<3, /* Bit 3: Fragment */ | ||
1876 | |||
1877 | GMR_FS_CRC_ERR = 1<<1, /* Bit 1: CRC Error */ | ||
1878 | GMR_FS_RX_FF_OV = 1<<0, /* Bit 0: Rx FIFO Overflow */ | ||
1879 | |||
1880 | /* | ||
1881 | * GMR_FS_ANY_ERR (analogous to XMR_FS_ANY_ERR) | ||
1882 | */ | ||
1883 | GMR_FS_ANY_ERR = GMR_FS_CRC_ERR | GMR_FS_LONG_ERR | | ||
1884 | GMR_FS_MII_ERR | GMR_FS_BAD_FC | GMR_FS_GOOD_FC | | ||
1885 | GMR_FS_JABBER, | ||
1886 | /* Rx GMAC FIFO Flush Mask (default) */ | ||
1887 | RX_FF_FL_DEF_MSK = GMR_FS_CRC_ERR | GMR_FS_RX_FF_OV |GMR_FS_MII_ERR | | ||
1888 | GMR_FS_BAD_FC | GMR_FS_GOOD_FC | GMR_FS_UN_SIZE | | ||
1889 | GMR_FS_JABBER, | ||
1890 | }; | ||
1891 | |||
1892 | /* RX_GMF_CTRL_T 32 bit Rx GMAC FIFO Control/Test */ | ||
1893 | enum { | ||
1894 | GMF_WP_TST_ON = 1<<14, /* Write Pointer Test On */ | ||
1895 | GMF_WP_TST_OFF = 1<<13, /* Write Pointer Test Off */ | ||
1896 | GMF_WP_STEP = 1<<12, /* Write Pointer Step/Increment */ | ||
1897 | |||
1898 | GMF_RP_TST_ON = 1<<10, /* Read Pointer Test On */ | ||
1899 | GMF_RP_TST_OFF = 1<<9, /* Read Pointer Test Off */ | ||
1900 | GMF_RP_STEP = 1<<8, /* Read Pointer Step/Increment */ | ||
1901 | GMF_RX_F_FL_ON = 1<<7, /* Rx FIFO Flush Mode On */ | ||
1902 | GMF_RX_F_FL_OFF = 1<<6, /* Rx FIFO Flush Mode Off */ | ||
1903 | GMF_CLI_RX_FO = 1<<5, /* Clear IRQ Rx FIFO Overrun */ | ||
1904 | GMF_CLI_RX_FC = 1<<4, /* Clear IRQ Rx Frame Complete */ | ||
1905 | GMF_OPER_ON = 1<<3, /* Operational Mode On */ | ||
1906 | GMF_OPER_OFF = 1<<2, /* Operational Mode Off */ | ||
1907 | GMF_RST_CLR = 1<<1, /* Clear GMAC FIFO Reset */ | ||
1908 | GMF_RST_SET = 1<<0, /* Set GMAC FIFO Reset */ | ||
1909 | |||
1910 | RX_GMF_FL_THR_DEF = 0xa, /* flush threshold (default) */ | ||
1911 | }; | ||
1912 | |||
1913 | |||
1914 | /* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */ | ||
1915 | enum { | ||
1916 | GMF_WSP_TST_ON = 1<<18,/* Write Shadow Pointer Test On */ | ||
1917 | GMF_WSP_TST_OFF = 1<<17,/* Write Shadow Pointer Test Off */ | ||
1918 | GMF_WSP_STEP = 1<<16,/* Write Shadow Pointer Step/Increment */ | ||
1919 | |||
1920 | GMF_CLI_TX_FU = 1<<6, /* Clear IRQ Tx FIFO Underrun */ | ||
1921 | GMF_CLI_TX_FC = 1<<5, /* Clear IRQ Tx Frame Complete */ | ||
1922 | GMF_CLI_TX_PE = 1<<4, /* Clear IRQ Tx Parity Error */ | ||
1923 | }; | ||
1924 | |||
1925 | /* GMAC_TI_ST_CTRL 8 bit Time Stamp Timer Ctrl Reg (YUKON only) */ | ||
1926 | enum { | ||
1927 | GMT_ST_START = 1<<2, /* Start Time Stamp Timer */ | ||
1928 | GMT_ST_STOP = 1<<1, /* Stop Time Stamp Timer */ | ||
1929 | GMT_ST_CLR_IRQ = 1<<0, /* Clear Time Stamp Timer IRQ */ | ||
1930 | }; | ||
1931 | |||
1932 | /* GMAC_CTRL 32 bit GMAC Control Reg (YUKON only) */ | ||
1933 | enum { | ||
1934 | GMC_H_BURST_ON = 1<<7, /* Half Duplex Burst Mode On */ | ||
1935 | GMC_H_BURST_OFF = 1<<6, /* Half Duplex Burst Mode Off */ | ||
1936 | GMC_F_LOOPB_ON = 1<<5, /* FIFO Loopback On */ | ||
1937 | GMC_F_LOOPB_OFF = 1<<4, /* FIFO Loopback Off */ | ||
1938 | GMC_PAUSE_ON = 1<<3, /* Pause On */ | ||
1939 | GMC_PAUSE_OFF = 1<<2, /* Pause Off */ | ||
1940 | GMC_RST_CLR = 1<<1, /* Clear GMAC Reset */ | ||
1941 | GMC_RST_SET = 1<<0, /* Set GMAC Reset */ | ||
1942 | }; | ||
1943 | |||
1944 | /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */ | ||
1945 | enum { | ||
1946 | GPC_SEL_BDT = 1<<28, /* Select Bi-Dir. Transfer for MDC/MDIO */ | ||
1947 | GPC_INT_POL_HI = 1<<27, /* IRQ Polarity is Active HIGH */ | ||
1948 | GPC_75_OHM = 1<<26, /* Use 75 Ohm Termination instead of 50 */ | ||
1949 | GPC_DIS_FC = 1<<25, /* Disable Automatic Fiber/Copper Detection */ | ||
1950 | GPC_DIS_SLEEP = 1<<24, /* Disable Energy Detect */ | ||
1951 | GPC_HWCFG_M_3 = 1<<23, /* HWCFG_MODE[3] */ | ||
1952 | GPC_HWCFG_M_2 = 1<<22, /* HWCFG_MODE[2] */ | ||
1953 | GPC_HWCFG_M_1 = 1<<21, /* HWCFG_MODE[1] */ | ||
1954 | GPC_HWCFG_M_0 = 1<<20, /* HWCFG_MODE[0] */ | ||
1955 | GPC_ANEG_0 = 1<<19, /* ANEG[0] */ | ||
1956 | GPC_ENA_XC = 1<<18, /* Enable MDI crossover */ | ||
1957 | GPC_DIS_125 = 1<<17, /* Disable 125 MHz clock */ | ||
1958 | GPC_ANEG_3 = 1<<16, /* ANEG[3] */ | ||
1959 | GPC_ANEG_2 = 1<<15, /* ANEG[2] */ | ||
1960 | GPC_ANEG_1 = 1<<14, /* ANEG[1] */ | ||
1961 | GPC_ENA_PAUSE = 1<<13, /* Enable Pause (SYM_OR_REM) */ | ||
1962 | GPC_PHYADDR_4 = 1<<12, /* Bit 4 of Phy Addr */ | ||
1963 | GPC_PHYADDR_3 = 1<<11, /* Bit 3 of Phy Addr */ | ||
1964 | GPC_PHYADDR_2 = 1<<10, /* Bit 2 of Phy Addr */ | ||
1965 | GPC_PHYADDR_1 = 1<<9, /* Bit 1 of Phy Addr */ | ||
1966 | GPC_PHYADDR_0 = 1<<8, /* Bit 0 of Phy Addr */ | ||
1967 | /* Bits 7..2: reserved */ | ||
1968 | GPC_RST_CLR = 1<<1, /* Clear GPHY Reset */ | ||
1969 | GPC_RST_SET = 1<<0, /* Set GPHY Reset */ | ||
1970 | }; | ||
1971 | |||
1972 | #define GPC_HWCFG_GMII_COP (GPC_HWCFG_M_3|GPC_HWCFG_M_2 | GPC_HWCFG_M_1 | GPC_HWCFG_M_0) | ||
1973 | #define GPC_HWCFG_GMII_FIB (GPC_HWCFG_M_2 | GPC_HWCFG_M_1 | GPC_HWCFG_M_0) | ||
1974 | #define GPC_ANEG_ADV_ALL_M (GPC_ANEG_3 | GPC_ANEG_2 | GPC_ANEG_1 | GPC_ANEG_0) | ||
1975 | |||
1976 | /* forced speed and duplex mode (don't mix with other ANEG bits) */ | ||
1977 | #define GPC_FRC10MBIT_HALF 0 | ||
1978 | #define GPC_FRC10MBIT_FULL GPC_ANEG_0 | ||
1979 | #define GPC_FRC100MBIT_HALF GPC_ANEG_1 | ||
1980 | #define GPC_FRC100MBIT_FULL (GPC_ANEG_0 | GPC_ANEG_1) | ||
1981 | |||
1982 | /* auto-negotiation with limited advertised speeds */ | ||
1983 | /* mix only with master/slave settings (for copper) */ | ||
1984 | #define GPC_ADV_1000_HALF GPC_ANEG_2 | ||
1985 | #define GPC_ADV_1000_FULL GPC_ANEG_3 | ||
1986 | #define GPC_ADV_ALL (GPC_ANEG_2 | GPC_ANEG_3) | ||
1987 | |||
1988 | /* master/slave settings */ | ||
1989 | /* only for copper with 1000 Mbps */ | ||
1990 | #define GPC_FORCE_MASTER 0 | ||
1991 | #define GPC_FORCE_SLAVE GPC_ANEG_0 | ||
1992 | #define GPC_PREF_MASTER GPC_ANEG_1 | ||
1993 | #define GPC_PREF_SLAVE (GPC_ANEG_1 | GPC_ANEG_0) | ||
1994 | |||
1995 | /* GMAC_IRQ_SRC 8 bit GMAC Interrupt Source Reg (YUKON only) */ | ||
1996 | /* GMAC_IRQ_MSK 8 bit GMAC Interrupt Mask Reg (YUKON only) */ | ||
1997 | enum { | ||
1998 | GM_IS_TX_CO_OV = 1<<5, /* Transmit Counter Overflow IRQ */ | ||
1999 | GM_IS_RX_CO_OV = 1<<4, /* Receive Counter Overflow IRQ */ | ||
2000 | GM_IS_TX_FF_UR = 1<<3, /* Transmit FIFO Underrun */ | ||
2001 | GM_IS_TX_COMPL = 1<<2, /* Frame Transmission Complete */ | ||
2002 | GM_IS_RX_FF_OR = 1<<1, /* Receive FIFO Overrun */ | ||
2003 | GM_IS_RX_COMPL = 1<<0, /* Frame Reception Complete */ | ||
2004 | |||
2005 | #define GMAC_DEF_MSK (GM_IS_TX_CO_OV | GM_IS_RX_CO_OV | GM_IS_TX_FF_UR) | ||
2006 | |||
2007 | /* GMAC_LINK_CTRL 16 bit GMAC Link Control Reg (YUKON only) */ | ||
2008 | /* Bits 15.. 2: reserved */ | ||
2009 | GMLC_RST_CLR = 1<<1, /* Clear GMAC Link Reset */ | ||
2010 | GMLC_RST_SET = 1<<0, /* Set GMAC Link Reset */ | ||
2011 | |||
2012 | |||
2013 | /* WOL_CTRL_STAT 16 bit WOL Control/Status Reg */ | ||
2014 | WOL_CTL_LINK_CHG_OCC = 1<<15, | ||
2015 | WOL_CTL_MAGIC_PKT_OCC = 1<<14, | ||
2016 | WOL_CTL_PATTERN_OCC = 1<<13, | ||
2017 | WOL_CTL_CLEAR_RESULT = 1<<12, | ||
2018 | WOL_CTL_ENA_PME_ON_LINK_CHG = 1<<11, | ||
2019 | WOL_CTL_DIS_PME_ON_LINK_CHG = 1<<10, | ||
2020 | WOL_CTL_ENA_PME_ON_MAGIC_PKT = 1<<9, | ||
2021 | WOL_CTL_DIS_PME_ON_MAGIC_PKT = 1<<8, | ||
2022 | WOL_CTL_ENA_PME_ON_PATTERN = 1<<7, | ||
2023 | WOL_CTL_DIS_PME_ON_PATTERN = 1<<6, | ||
2024 | WOL_CTL_ENA_LINK_CHG_UNIT = 1<<5, | ||
2025 | WOL_CTL_DIS_LINK_CHG_UNIT = 1<<4, | ||
2026 | WOL_CTL_ENA_MAGIC_PKT_UNIT = 1<<3, | ||
2027 | WOL_CTL_DIS_MAGIC_PKT_UNIT = 1<<2, | ||
2028 | WOL_CTL_ENA_PATTERN_UNIT = 1<<1, | ||
2029 | WOL_CTL_DIS_PATTERN_UNIT = 1<<0, | ||
2030 | }; | ||
2031 | |||
2032 | #define WOL_CTL_DEFAULT \ | ||
2033 | (WOL_CTL_DIS_PME_ON_LINK_CHG | \ | ||
2034 | WOL_CTL_DIS_PME_ON_PATTERN | \ | ||
2035 | WOL_CTL_DIS_PME_ON_MAGIC_PKT | \ | ||
2036 | WOL_CTL_DIS_LINK_CHG_UNIT | \ | ||
2037 | WOL_CTL_DIS_PATTERN_UNIT | \ | ||
2038 | WOL_CTL_DIS_MAGIC_PKT_UNIT) | ||
2039 | |||
2040 | /* WOL_MATCH_CTL 8 bit WOL Match Control Reg */ | ||
2041 | #define WOL_CTL_PATT_ENA(x) (1 << (x)) | ||
2042 | |||
2043 | |||
2044 | /* XMAC II registers */ | ||
2045 | enum { | ||
2046 | XM_MMU_CMD = 0x0000, /* 16 bit r/w MMU Command Register */ | ||
2047 | XM_POFF = 0x0008, /* 32 bit r/w Packet Offset Register */ | ||
2048 | XM_BURST = 0x000c, /* 32 bit r/w Burst Register for half duplex*/ | ||
2049 | XM_1L_VLAN_TAG = 0x0010, /* 16 bit r/w One Level VLAN Tag ID */ | ||
2050 | XM_2L_VLAN_TAG = 0x0014, /* 16 bit r/w Two Level VLAN Tag ID */ | ||
2051 | XM_TX_CMD = 0x0020, /* 16 bit r/w Transmit Command Register */ | ||
2052 | XM_TX_RT_LIM = 0x0024, /* 16 bit r/w Transmit Retry Limit Register */ | ||
2053 | XM_TX_STIME = 0x0028, /* 16 bit r/w Transmit Slottime Register */ | ||
2054 | XM_TX_IPG = 0x002c, /* 16 bit r/w Transmit Inter Packet Gap */ | ||
2055 | XM_RX_CMD = 0x0030, /* 16 bit r/w Receive Command Register */ | ||
2056 | XM_PHY_ADDR = 0x0034, /* 16 bit r/w PHY Address Register */ | ||
2057 | XM_PHY_DATA = 0x0038, /* 16 bit r/w PHY Data Register */ | ||
2058 | XM_GP_PORT = 0x0040, /* 32 bit r/w General Purpose Port Register */ | ||
2059 | XM_IMSK = 0x0044, /* 16 bit r/w Interrupt Mask Register */ | ||
2060 | XM_ISRC = 0x0048, /* 16 bit r/o Interrupt Status Register */ | ||
2061 | XM_HW_CFG = 0x004c, /* 16 bit r/w Hardware Config Register */ | ||
2062 | XM_TX_LO_WM = 0x0060, /* 16 bit r/w Tx FIFO Low Water Mark */ | ||
2063 | XM_TX_HI_WM = 0x0062, /* 16 bit r/w Tx FIFO High Water Mark */ | ||
2064 | XM_TX_THR = 0x0064, /* 16 bit r/w Tx Request Threshold */ | ||
2065 | XM_HT_THR = 0x0066, /* 16 bit r/w Host Request Threshold */ | ||
2066 | XM_PAUSE_DA = 0x0068, /* NA reg r/w Pause Destination Address */ | ||
2067 | XM_CTL_PARA = 0x0070, /* 32 bit r/w Control Parameter Register */ | ||
2068 | XM_MAC_OPCODE = 0x0074, /* 16 bit r/w Opcode for MAC control frames */ | ||
2069 | XM_MAC_PTIME = 0x0076, /* 16 bit r/w Pause time for MAC ctrl frames*/ | ||
2070 | XM_TX_STAT = 0x0078, /* 32 bit r/o Tx Status LIFO Register */ | ||
2071 | |||
2072 | XM_EXM_START = 0x0080, /* r/w Start Address of the EXM Regs */ | ||
2073 | #define XM_EXM(reg) (XM_EXM_START + ((reg) << 3)) | ||
2074 | }; | ||
2075 | |||
2076 | enum { | ||
2077 | XM_SRC_CHK = 0x0100, /* NA reg r/w Source Check Address Register */ | ||
2078 | XM_SA = 0x0108, /* NA reg r/w Station Address Register */ | ||
2079 | XM_HSM = 0x0110, /* 64 bit r/w Hash Match Address Registers */ | ||
2080 | XM_RX_LO_WM = 0x0118, /* 16 bit r/w Receive Low Water Mark */ | ||
2081 | XM_RX_HI_WM = 0x011a, /* 16 bit r/w Receive High Water Mark */ | ||
2082 | XM_RX_THR = 0x011c, /* 32 bit r/w Receive Request Threshold */ | ||
2083 | XM_DEV_ID = 0x0120, /* 32 bit r/o Device ID Register */ | ||
2084 | XM_MODE = 0x0124, /* 32 bit r/w Mode Register */ | ||
2085 | XM_LSA = 0x0128, /* NA reg r/o Last Source Register */ | ||
2086 | XM_TS_READ = 0x0130, /* 32 bit r/o Time Stamp Read Register */ | ||
2087 | XM_TS_LOAD = 0x0134, /* 32 bit r/o Time Stamp Load Value */ | ||
2088 | XM_STAT_CMD = 0x0200, /* 16 bit r/w Statistics Command Register */ | ||
2089 | XM_RX_CNT_EV = 0x0204, /* 32 bit r/o Rx Counter Event Register */ | ||
2090 | XM_TX_CNT_EV = 0x0208, /* 32 bit r/o Tx Counter Event Register */ | ||
2091 | XM_RX_EV_MSK = 0x020c, /* 32 bit r/w Rx Counter Event Mask */ | ||
2092 | XM_TX_EV_MSK = 0x0210, /* 32 bit r/w Tx Counter Event Mask */ | ||
2093 | XM_TXF_OK = 0x0280, /* 32 bit r/o Frames Transmitted OK Conuter */ | ||
2094 | XM_TXO_OK_HI = 0x0284, /* 32 bit r/o Octets Transmitted OK High Cnt*/ | ||
2095 | XM_TXO_OK_LO = 0x0288, /* 32 bit r/o Octets Transmitted OK Low Cnt */ | ||
2096 | XM_TXF_BC_OK = 0x028c, /* 32 bit r/o Broadcast Frames Xmitted OK */ | ||
2097 | XM_TXF_MC_OK = 0x0290, /* 32 bit r/o Multicast Frames Xmitted OK */ | ||
2098 | XM_TXF_UC_OK = 0x0294, /* 32 bit r/o Unicast Frames Xmitted OK */ | ||
2099 | XM_TXF_LONG = 0x0298, /* 32 bit r/o Tx Long Frame Counter */ | ||
2100 | XM_TXE_BURST = 0x029c, /* 32 bit r/o Tx Burst Event Counter */ | ||
2101 | XM_TXF_MPAUSE = 0x02a0, /* 32 bit r/o Tx Pause MAC Ctrl Frame Cnt */ | ||
2102 | XM_TXF_MCTRL = 0x02a4, /* 32 bit r/o Tx MAC Ctrl Frame Counter */ | ||
2103 | XM_TXF_SNG_COL = 0x02a8, /* 32 bit r/o Tx Single Collision Counter */ | ||
2104 | XM_TXF_MUL_COL = 0x02ac, /* 32 bit r/o Tx Multiple Collision Counter */ | ||
2105 | XM_TXF_ABO_COL = 0x02b0, /* 32 bit r/o Tx aborted due to Exces. Col. */ | ||
2106 | XM_TXF_LAT_COL = 0x02b4, /* 32 bit r/o Tx Late Collision Counter */ | ||
2107 | XM_TXF_DEF = 0x02b8, /* 32 bit r/o Tx Deferred Frame Counter */ | ||
2108 | XM_TXF_EX_DEF = 0x02bc, /* 32 bit r/o Tx Excessive Deferall Counter */ | ||
2109 | XM_TXE_FIFO_UR = 0x02c0, /* 32 bit r/o Tx FIFO Underrun Event Cnt */ | ||
2110 | XM_TXE_CS_ERR = 0x02c4, /* 32 bit r/o Tx Carrier Sense Error Cnt */ | ||
2111 | XM_TXP_UTIL = 0x02c8, /* 32 bit r/o Tx Utilization in % */ | ||
2112 | XM_TXF_64B = 0x02d0, /* 32 bit r/o 64 Byte Tx Frame Counter */ | ||
2113 | XM_TXF_127B = 0x02d4, /* 32 bit r/o 65-127 Byte Tx Frame Counter */ | ||
2114 | XM_TXF_255B = 0x02d8, /* 32 bit r/o 128-255 Byte Tx Frame Counter */ | ||
2115 | XM_TXF_511B = 0x02dc, /* 32 bit r/o 256-511 Byte Tx Frame Counter */ | ||
2116 | XM_TXF_1023B = 0x02e0, /* 32 bit r/o 512-1023 Byte Tx Frame Counter*/ | ||
2117 | XM_TXF_MAX_SZ = 0x02e4, /* 32 bit r/o 1024-MaxSize Byte Tx Frame Cnt*/ | ||
2118 | XM_RXF_OK = 0x0300, /* 32 bit r/o Frames Received OK */ | ||
2119 | XM_RXO_OK_HI = 0x0304, /* 32 bit r/o Octets Received OK High Cnt */ | ||
2120 | XM_RXO_OK_LO = 0x0308, /* 32 bit r/o Octets Received OK Low Counter*/ | ||
2121 | XM_RXF_BC_OK = 0x030c, /* 32 bit r/o Broadcast Frames Received OK */ | ||
2122 | XM_RXF_MC_OK = 0x0310, /* 32 bit r/o Multicast Frames Received OK */ | ||
2123 | XM_RXF_UC_OK = 0x0314, /* 32 bit r/o Unicast Frames Received OK */ | ||
2124 | XM_RXF_MPAUSE = 0x0318, /* 32 bit r/o Rx Pause MAC Ctrl Frame Cnt */ | ||
2125 | XM_RXF_MCTRL = 0x031c, /* 32 bit r/o Rx MAC Ctrl Frame Counter */ | ||
2126 | XM_RXF_INV_MP = 0x0320, /* 32 bit r/o Rx invalid Pause Frame Cnt */ | ||
2127 | XM_RXF_INV_MOC = 0x0324, /* 32 bit r/o Rx Frames with inv. MAC Opcode*/ | ||
2128 | XM_RXE_BURST = 0x0328, /* 32 bit r/o Rx Burst Event Counter */ | ||
2129 | XM_RXE_FMISS = 0x032c, /* 32 bit r/o Rx Missed Frames Event Cnt */ | ||
2130 | XM_RXF_FRA_ERR = 0x0330, /* 32 bit r/o Rx Framing Error Counter */ | ||
2131 | XM_RXE_FIFO_OV = 0x0334, /* 32 bit r/o Rx FIFO overflow Event Cnt */ | ||
2132 | XM_RXF_JAB_PKT = 0x0338, /* 32 bit r/o Rx Jabber Packet Frame Cnt */ | ||
2133 | XM_RXE_CAR_ERR = 0x033c, /* 32 bit r/o Rx Carrier Event Error Cnt */ | ||
2134 | XM_RXF_LEN_ERR = 0x0340, /* 32 bit r/o Rx in Range Length Error */ | ||
2135 | XM_RXE_SYM_ERR = 0x0344, /* 32 bit r/o Rx Symbol Error Counter */ | ||
2136 | XM_RXE_SHT_ERR = 0x0348, /* 32 bit r/o Rx Short Event Error Cnt */ | ||
2137 | XM_RXE_RUNT = 0x034c, /* 32 bit r/o Rx Runt Event Counter */ | ||
2138 | XM_RXF_LNG_ERR = 0x0350, /* 32 bit r/o Rx Frame too Long Error Cnt */ | ||
2139 | XM_RXF_FCS_ERR = 0x0354, /* 32 bit r/o Rx Frame Check Seq. Error Cnt */ | ||
2140 | XM_RXF_CEX_ERR = 0x035c, /* 32 bit r/o Rx Carrier Ext Error Frame Cnt*/ | ||
2141 | XM_RXP_UTIL = 0x0360, /* 32 bit r/o Rx Utilization in % */ | ||
2142 | XM_RXF_64B = 0x0368, /* 32 bit r/o 64 Byte Rx Frame Counter */ | ||
2143 | XM_RXF_127B = 0x036c, /* 32 bit r/o 65-127 Byte Rx Frame Counter */ | ||
2144 | XM_RXF_255B = 0x0370, /* 32 bit r/o 128-255 Byte Rx Frame Counter */ | ||
2145 | XM_RXF_511B = 0x0374, /* 32 bit r/o 256-511 Byte Rx Frame Counter */ | ||
2146 | XM_RXF_1023B = 0x0378, /* 32 bit r/o 512-1023 Byte Rx Frame Counter*/ | ||
2147 | XM_RXF_MAX_SZ = 0x037c, /* 32 bit r/o 1024-MaxSize Byte Rx Frame Cnt*/ | ||
2148 | }; | ||
2149 | |||
2150 | /* XM_MMU_CMD 16 bit r/w MMU Command Register */ | ||
2151 | enum { | ||
2152 | XM_MMU_PHY_RDY = 1<<12,/* Bit 12: PHY Read Ready */ | ||
2153 | XM_MMU_PHY_BUSY = 1<<11,/* Bit 11: PHY Busy */ | ||
2154 | XM_MMU_IGN_PF = 1<<10,/* Bit 10: Ignore Pause Frame */ | ||
2155 | XM_MMU_MAC_LB = 1<<9, /* Bit 9: Enable MAC Loopback */ | ||
2156 | XM_MMU_FRC_COL = 1<<7, /* Bit 7: Force Collision */ | ||
2157 | XM_MMU_SIM_COL = 1<<6, /* Bit 6: Simulate Collision */ | ||
2158 | XM_MMU_NO_PRE = 1<<5, /* Bit 5: No MDIO Preamble */ | ||
2159 | XM_MMU_GMII_FD = 1<<4, /* Bit 4: GMII uses Full Duplex */ | ||
2160 | XM_MMU_RAT_CTRL = 1<<3, /* Bit 3: Enable Rate Control */ | ||
2161 | XM_MMU_GMII_LOOP= 1<<2, /* Bit 2: PHY is in Loopback Mode */ | ||
2162 | XM_MMU_ENA_RX = 1<<1, /* Bit 1: Enable Receiver */ | ||
2163 | XM_MMU_ENA_TX = 1<<0, /* Bit 0: Enable Transmitter */ | ||
2164 | }; | ||
2165 | |||
2166 | |||
2167 | /* XM_TX_CMD 16 bit r/w Transmit Command Register */ | ||
2168 | enum { | ||
2169 | XM_TX_BK2BK = 1<<6, /* Bit 6: Ignor Carrier Sense (Tx Bk2Bk)*/ | ||
2170 | XM_TX_ENC_BYP = 1<<5, /* Bit 5: Set Encoder in Bypass Mode */ | ||
2171 | XM_TX_SAM_LINE = 1<<4, /* Bit 4: (sc) Start utilization calculation */ | ||
2172 | XM_TX_NO_GIG_MD = 1<<3, /* Bit 3: Disable Carrier Extension */ | ||
2173 | XM_TX_NO_PRE = 1<<2, /* Bit 2: Disable Preamble Generation */ | ||
2174 | XM_TX_NO_CRC = 1<<1, /* Bit 1: Disable CRC Generation */ | ||
2175 | XM_TX_AUTO_PAD = 1<<0, /* Bit 0: Enable Automatic Padding */ | ||
2176 | }; | ||
2177 | |||
2178 | /* XM_TX_RT_LIM 16 bit r/w Transmit Retry Limit Register */ | ||
2179 | #define XM_RT_LIM_MSK 0x1f /* Bit 4..0: Tx Retry Limit */ | ||
2180 | |||
2181 | |||
2182 | /* XM_TX_STIME 16 bit r/w Transmit Slottime Register */ | ||
2183 | #define XM_STIME_MSK 0x7f /* Bit 6..0: Tx Slottime bits */ | ||
2184 | |||
2185 | |||
2186 | /* XM_TX_IPG 16 bit r/w Transmit Inter Packet Gap */ | ||
2187 | #define XM_IPG_MSK 0xff /* Bit 7..0: IPG value bits */ | ||
2188 | |||
2189 | |||
2190 | /* XM_RX_CMD 16 bit r/w Receive Command Register */ | ||
2191 | enum { | ||
2192 | XM_RX_LENERR_OK = 1<<8, /* Bit 8 don't set Rx Err bit for */ | ||
2193 | /* inrange error packets */ | ||
2194 | XM_RX_BIG_PK_OK = 1<<7, /* Bit 7 don't set Rx Err bit for */ | ||
2195 | /* jumbo packets */ | ||
2196 | XM_RX_IPG_CAP = 1<<6, /* Bit 6 repl. type field with IPG */ | ||
2197 | XM_RX_TP_MD = 1<<5, /* Bit 5: Enable transparent Mode */ | ||
2198 | XM_RX_STRIP_FCS = 1<<4, /* Bit 4: Enable FCS Stripping */ | ||
2199 | XM_RX_SELF_RX = 1<<3, /* Bit 3: Enable Rx of own packets */ | ||
2200 | XM_RX_SAM_LINE = 1<<2, /* Bit 2: (sc) Start utilization calculation */ | ||
2201 | XM_RX_STRIP_PAD = 1<<1, /* Bit 1: Strip pad bytes of Rx frames */ | ||
2202 | XM_RX_DIS_CEXT = 1<<0, /* Bit 0: Disable carrier ext. check */ | ||
2203 | }; | ||
2204 | |||
2205 | |||
2206 | /* XM_GP_PORT 32 bit r/w General Purpose Port Register */ | ||
2207 | enum { | ||
2208 | XM_GP_ANIP = 1<<6, /* Bit 6: (ro) Auto-Neg. in progress */ | ||
2209 | XM_GP_FRC_INT = 1<<5, /* Bit 5: (sc) Force Interrupt */ | ||
2210 | XM_GP_RES_MAC = 1<<3, /* Bit 3: (sc) Reset MAC and FIFOs */ | ||
2211 | XM_GP_RES_STAT = 1<<2, /* Bit 2: (sc) Reset the statistics module */ | ||
2212 | XM_GP_INP_ASS = 1<<0, /* Bit 0: (ro) GP Input Pin asserted */ | ||
2213 | }; | ||
2214 | |||
2215 | |||
2216 | /* XM_IMSK 16 bit r/w Interrupt Mask Register */ | ||
2217 | /* XM_ISRC 16 bit r/o Interrupt Status Register */ | ||
2218 | enum { | ||
2219 | XM_IS_LNK_AE = 1<<14, /* Bit 14: Link Asynchronous Event */ | ||
2220 | XM_IS_TX_ABORT = 1<<13, /* Bit 13: Transmit Abort, late Col. etc */ | ||
2221 | XM_IS_FRC_INT = 1<<12, /* Bit 12: Force INT bit set in GP */ | ||
2222 | XM_IS_INP_ASS = 1<<11, /* Bit 11: Input Asserted, GP bit 0 set */ | ||
2223 | XM_IS_LIPA_RC = 1<<10, /* Bit 10: Link Partner requests config */ | ||
2224 | XM_IS_RX_PAGE = 1<<9, /* Bit 9: Page Received */ | ||
2225 | XM_IS_TX_PAGE = 1<<8, /* Bit 8: Next Page Loaded for Transmit */ | ||
2226 | XM_IS_AND = 1<<7, /* Bit 7: Auto-Negotiation Done */ | ||
2227 | XM_IS_TSC_OV = 1<<6, /* Bit 6: Time Stamp Counter Overflow */ | ||
2228 | XM_IS_RXC_OV = 1<<5, /* Bit 5: Rx Counter Event Overflow */ | ||
2229 | XM_IS_TXC_OV = 1<<4, /* Bit 4: Tx Counter Event Overflow */ | ||
2230 | XM_IS_RXF_OV = 1<<3, /* Bit 3: Receive FIFO Overflow */ | ||
2231 | XM_IS_TXF_UR = 1<<2, /* Bit 2: Transmit FIFO Underrun */ | ||
2232 | XM_IS_TX_COMP = 1<<1, /* Bit 1: Frame Tx Complete */ | ||
2233 | XM_IS_RX_COMP = 1<<0, /* Bit 0: Frame Rx Complete */ | ||
2234 | }; | ||
2235 | |||
2236 | #define XM_DEF_MSK (~(XM_IS_INP_ASS | XM_IS_LIPA_RC | XM_IS_RX_PAGE | \ | ||
2237 | XM_IS_AND | XM_IS_RXC_OV | XM_IS_TXC_OV | \ | ||
2238 | XM_IS_RXF_OV | XM_IS_TXF_UR)) | ||
2239 | |||
2240 | |||
2241 | /* XM_HW_CFG 16 bit r/w Hardware Config Register */ | ||
2242 | enum { | ||
2243 | XM_HW_GEN_EOP = 1<<3, /* Bit 3: generate End of Packet pulse */ | ||
2244 | XM_HW_COM4SIG = 1<<2, /* Bit 2: use Comma Detect for Sig. Det.*/ | ||
2245 | XM_HW_GMII_MD = 1<<0, /* Bit 0: GMII Interface selected */ | ||
2246 | }; | ||
2247 | |||
2248 | |||
2249 | /* XM_TX_LO_WM 16 bit r/w Tx FIFO Low Water Mark */ | ||
2250 | /* XM_TX_HI_WM 16 bit r/w Tx FIFO High Water Mark */ | ||
2251 | #define XM_TX_WM_MSK 0x01ff /* Bit 9.. 0 Tx FIFO Watermark bits */ | ||
2252 | |||
2253 | /* XM_TX_THR 16 bit r/w Tx Request Threshold */ | ||
2254 | /* XM_HT_THR 16 bit r/w Host Request Threshold */ | ||
2255 | /* XM_RX_THR 16 bit r/w Rx Request Threshold */ | ||
2256 | #define XM_THR_MSK 0x03ff /* Bit 10.. 0 Rx/Tx Request Threshold bits */ | ||
2257 | |||
2258 | |||
2259 | /* XM_TX_STAT 32 bit r/o Tx Status LIFO Register */ | ||
2260 | enum { | ||
2261 | XM_ST_VALID = (1UL<<31), /* Bit 31: Status Valid */ | ||
2262 | XM_ST_BYTE_CNT = (0x3fffL<<17), /* Bit 30..17: Tx frame Length */ | ||
2263 | XM_ST_RETRY_CNT = (0x1fL<<12), /* Bit 16..12: Retry Count */ | ||
2264 | XM_ST_EX_COL = 1<<11, /* Bit 11: Excessive Collisions */ | ||
2265 | XM_ST_EX_DEF = 1<<10, /* Bit 10: Excessive Deferral */ | ||
2266 | XM_ST_BURST = 1<<9, /* Bit 9: p. xmitted in burst md*/ | ||
2267 | XM_ST_DEFER = 1<<8, /* Bit 8: packet was defered */ | ||
2268 | XM_ST_BC = 1<<7, /* Bit 7: Broadcast packet */ | ||
2269 | XM_ST_MC = 1<<6, /* Bit 6: Multicast packet */ | ||
2270 | XM_ST_UC = 1<<5, /* Bit 5: Unicast packet */ | ||
2271 | XM_ST_TX_UR = 1<<4, /* Bit 4: FIFO Underrun occured */ | ||
2272 | XM_ST_CS_ERR = 1<<3, /* Bit 3: Carrier Sense Error */ | ||
2273 | XM_ST_LAT_COL = 1<<2, /* Bit 2: Late Collision Error */ | ||
2274 | XM_ST_MUL_COL = 1<<1, /* Bit 1: Multiple Collisions */ | ||
2275 | XM_ST_SGN_COL = 1<<0, /* Bit 0: Single Collision */ | ||
2276 | }; | ||
2277 | |||
2278 | /* XM_RX_LO_WM 16 bit r/w Receive Low Water Mark */ | ||
2279 | /* XM_RX_HI_WM 16 bit r/w Receive High Water Mark */ | ||
2280 | #define XM_RX_WM_MSK 0x03ff /* Bit 11.. 0: Rx FIFO Watermark bits */ | ||
2281 | |||
2282 | |||
2283 | /* XM_DEV_ID 32 bit r/o Device ID Register */ | ||
2284 | #define XM_DEV_OUI (0x00ffffffUL<<8) /* Bit 31..8: Device OUI */ | ||
2285 | #define XM_DEV_REV (0x07L << 5) /* Bit 7..5: Chip Rev Num */ | ||
2286 | |||
2287 | |||
2288 | /* XM_MODE 32 bit r/w Mode Register */ | ||
2289 | enum { | ||
2290 | XM_MD_ENA_REJ = 1<<26, /* Bit 26: Enable Frame Reject */ | ||
2291 | XM_MD_SPOE_E = 1<<25, /* Bit 25: Send Pause on Edge */ | ||
2292 | /* extern generated */ | ||
2293 | XM_MD_TX_REP = 1<<24, /* Bit 24: Transmit Repeater Mode */ | ||
2294 | XM_MD_SPOFF_I = 1<<23, /* Bit 23: Send Pause on FIFO full */ | ||
2295 | /* intern generated */ | ||
2296 | XM_MD_LE_STW = 1<<22, /* Bit 22: Rx Stat Word in Little Endian */ | ||
2297 | XM_MD_TX_CONT = 1<<21, /* Bit 21: Send Continuous */ | ||
2298 | XM_MD_TX_PAUSE = 1<<20, /* Bit 20: (sc) Send Pause Frame */ | ||
2299 | XM_MD_ATS = 1<<19, /* Bit 19: Append Time Stamp */ | ||
2300 | XM_MD_SPOL_I = 1<<18, /* Bit 18: Send Pause on Low */ | ||
2301 | /* intern generated */ | ||
2302 | XM_MD_SPOH_I = 1<<17, /* Bit 17: Send Pause on High */ | ||
2303 | /* intern generated */ | ||
2304 | XM_MD_CAP = 1<<16, /* Bit 16: Check Address Pair */ | ||
2305 | XM_MD_ENA_HASH = 1<<15, /* Bit 15: Enable Hashing */ | ||
2306 | XM_MD_CSA = 1<<14, /* Bit 14: Check Station Address */ | ||
2307 | XM_MD_CAA = 1<<13, /* Bit 13: Check Address Array */ | ||
2308 | XM_MD_RX_MCTRL = 1<<12, /* Bit 12: Rx MAC Control Frame */ | ||
2309 | XM_MD_RX_RUNT = 1<<11, /* Bit 11: Rx Runt Frames */ | ||
2310 | XM_MD_RX_IRLE = 1<<10, /* Bit 10: Rx in Range Len Err Frame */ | ||
2311 | XM_MD_RX_LONG = 1<<9, /* Bit 9: Rx Long Frame */ | ||
2312 | XM_MD_RX_CRCE = 1<<8, /* Bit 8: Rx CRC Error Frame */ | ||
2313 | XM_MD_RX_ERR = 1<<7, /* Bit 7: Rx Error Frame */ | ||
2314 | XM_MD_DIS_UC = 1<<6, /* Bit 6: Disable Rx Unicast */ | ||
2315 | XM_MD_DIS_MC = 1<<5, /* Bit 5: Disable Rx Multicast */ | ||
2316 | XM_MD_DIS_BC = 1<<4, /* Bit 4: Disable Rx Broadcast */ | ||
2317 | XM_MD_ENA_PROM = 1<<3, /* Bit 3: Enable Promiscuous */ | ||
2318 | XM_MD_ENA_BE = 1<<2, /* Bit 2: Enable Big Endian */ | ||
2319 | XM_MD_FTF = 1<<1, /* Bit 1: (sc) Flush Tx FIFO */ | ||
2320 | XM_MD_FRF = 1<<0, /* Bit 0: (sc) Flush Rx FIFO */ | ||
2321 | }; | ||
2322 | |||
2323 | #define XM_PAUSE_MODE (XM_MD_SPOE_E | XM_MD_SPOL_I | XM_MD_SPOH_I) | ||
2324 | #define XM_DEF_MODE (XM_MD_RX_RUNT | XM_MD_RX_IRLE | XM_MD_RX_LONG |\ | ||
2325 | XM_MD_RX_CRCE | XM_MD_RX_ERR | XM_MD_CSA) | ||
2326 | |||
2327 | /* XM_STAT_CMD 16 bit r/w Statistics Command Register */ | ||
2328 | enum { | ||
2329 | XM_SC_SNP_RXC = 1<<5, /* Bit 5: (sc) Snap Rx Counters */ | ||
2330 | XM_SC_SNP_TXC = 1<<4, /* Bit 4: (sc) Snap Tx Counters */ | ||
2331 | XM_SC_CP_RXC = 1<<3, /* Bit 3: Copy Rx Counters Continuously */ | ||
2332 | XM_SC_CP_TXC = 1<<2, /* Bit 2: Copy Tx Counters Continuously */ | ||
2333 | XM_SC_CLR_RXC = 1<<1, /* Bit 1: (sc) Clear Rx Counters */ | ||
2334 | XM_SC_CLR_TXC = 1<<0, /* Bit 0: (sc) Clear Tx Counters */ | ||
2335 | }; | ||
2336 | |||
2337 | |||
2338 | /* XM_RX_CNT_EV 32 bit r/o Rx Counter Event Register */ | ||
2339 | /* XM_RX_EV_MSK 32 bit r/w Rx Counter Event Mask */ | ||
2340 | enum { | ||
2341 | XMR_MAX_SZ_OV = 1<<31, /* Bit 31: 1024-MaxSize Rx Cnt Ov*/ | ||
2342 | XMR_1023B_OV = 1<<30, /* Bit 30: 512-1023Byte Rx Cnt Ov*/ | ||
2343 | XMR_511B_OV = 1<<29, /* Bit 29: 256-511 Byte Rx Cnt Ov*/ | ||
2344 | XMR_255B_OV = 1<<28, /* Bit 28: 128-255 Byte Rx Cnt Ov*/ | ||
2345 | XMR_127B_OV = 1<<27, /* Bit 27: 65-127 Byte Rx Cnt Ov */ | ||
2346 | XMR_64B_OV = 1<<26, /* Bit 26: 64 Byte Rx Cnt Ov */ | ||
2347 | XMR_UTIL_OV = 1<<25, /* Bit 25: Rx Util Cnt Overflow */ | ||
2348 | XMR_UTIL_UR = 1<<24, /* Bit 24: Rx Util Cnt Underrun */ | ||
2349 | XMR_CEX_ERR_OV = 1<<23, /* Bit 23: CEXT Err Cnt Ov */ | ||
2350 | XMR_FCS_ERR_OV = 1<<21, /* Bit 21: Rx FCS Error Cnt Ov */ | ||
2351 | XMR_LNG_ERR_OV = 1<<20, /* Bit 20: Rx too Long Err Cnt Ov*/ | ||
2352 | XMR_RUNT_OV = 1<<19, /* Bit 19: Runt Event Cnt Ov */ | ||
2353 | XMR_SHT_ERR_OV = 1<<18, /* Bit 18: Rx Short Ev Err Cnt Ov*/ | ||
2354 | XMR_SYM_ERR_OV = 1<<17, /* Bit 17: Rx Sym Err Cnt Ov */ | ||
2355 | XMR_CAR_ERR_OV = 1<<15, /* Bit 15: Rx Carr Ev Err Cnt Ov */ | ||
2356 | XMR_JAB_PKT_OV = 1<<14, /* Bit 14: Rx Jabb Packet Cnt Ov */ | ||
2357 | XMR_FIFO_OV = 1<<13, /* Bit 13: Rx FIFO Ov Ev Cnt Ov */ | ||
2358 | XMR_FRA_ERR_OV = 1<<12, /* Bit 12: Rx Framing Err Cnt Ov */ | ||
2359 | XMR_FMISS_OV = 1<<11, /* Bit 11: Rx Missed Ev Cnt Ov */ | ||
2360 | XMR_BURST = 1<<10, /* Bit 10: Rx Burst Event Cnt Ov */ | ||
2361 | XMR_INV_MOC = 1<<9, /* Bit 9: Rx with inv. MAC OC Ov*/ | ||
2362 | XMR_INV_MP = 1<<8, /* Bit 8: Rx inv Pause Frame Ov */ | ||
2363 | XMR_MCTRL_OV = 1<<7, /* Bit 7: Rx MAC Ctrl-F Cnt Ov */ | ||
2364 | XMR_MPAUSE_OV = 1<<6, /* Bit 6: Rx Pause MAC Ctrl-F Ov*/ | ||
2365 | XMR_UC_OK_OV = 1<<5, /* Bit 5: Rx Unicast Frame CntOv*/ | ||
2366 | XMR_MC_OK_OV = 1<<4, /* Bit 4: Rx Multicast Cnt Ov */ | ||
2367 | XMR_BC_OK_OV = 1<<3, /* Bit 3: Rx Broadcast Cnt Ov */ | ||
2368 | XMR_OK_LO_OV = 1<<2, /* Bit 2: Octets Rx OK Low CntOv*/ | ||
2369 | XMR_OK_HI_OV = 1<<1, /* Bit 1: Octets Rx OK Hi Cnt Ov*/ | ||
2370 | XMR_OK_OV = 1<<0, /* Bit 0: Frames Received Ok Ov */ | ||
2371 | }; | ||
2372 | |||
2373 | #define XMR_DEF_MSK (XMR_OK_LO_OV | XMR_OK_HI_OV) | ||
2374 | |||
2375 | /* XM_TX_CNT_EV 32 bit r/o Tx Counter Event Register */ | ||
2376 | /* XM_TX_EV_MSK 32 bit r/w Tx Counter Event Mask */ | ||
2377 | enum { | ||
2378 | XMT_MAX_SZ_OV = 1<<25, /* Bit 25: 1024-MaxSize Tx Cnt Ov*/ | ||
2379 | XMT_1023B_OV = 1<<24, /* Bit 24: 512-1023Byte Tx Cnt Ov*/ | ||
2380 | XMT_511B_OV = 1<<23, /* Bit 23: 256-511 Byte Tx Cnt Ov*/ | ||
2381 | XMT_255B_OV = 1<<22, /* Bit 22: 128-255 Byte Tx Cnt Ov*/ | ||
2382 | XMT_127B_OV = 1<<21, /* Bit 21: 65-127 Byte Tx Cnt Ov */ | ||
2383 | XMT_64B_OV = 1<<20, /* Bit 20: 64 Byte Tx Cnt Ov */ | ||
2384 | XMT_UTIL_OV = 1<<19, /* Bit 19: Tx Util Cnt Overflow */ | ||
2385 | XMT_UTIL_UR = 1<<18, /* Bit 18: Tx Util Cnt Underrun */ | ||
2386 | XMT_CS_ERR_OV = 1<<17, /* Bit 17: Tx Carr Sen Err Cnt Ov*/ | ||
2387 | XMT_FIFO_UR_OV = 1<<16, /* Bit 16: Tx FIFO Ur Ev Cnt Ov */ | ||
2388 | XMT_EX_DEF_OV = 1<<15, /* Bit 15: Tx Ex Deferall Cnt Ov */ | ||
2389 | XMT_DEF = 1<<14, /* Bit 14: Tx Deferred Cnt Ov */ | ||
2390 | XMT_LAT_COL_OV = 1<<13, /* Bit 13: Tx Late Col Cnt Ov */ | ||
2391 | XMT_ABO_COL_OV = 1<<12, /* Bit 12: Tx abo dueto Ex Col Ov*/ | ||
2392 | XMT_MUL_COL_OV = 1<<11, /* Bit 11: Tx Mult Col Cnt Ov */ | ||
2393 | XMT_SNG_COL = 1<<10, /* Bit 10: Tx Single Col Cnt Ov */ | ||
2394 | XMT_MCTRL_OV = 1<<9, /* Bit 9: Tx MAC Ctrl Counter Ov*/ | ||
2395 | XMT_MPAUSE = 1<<8, /* Bit 8: Tx Pause MAC Ctrl-F Ov*/ | ||
2396 | XMT_BURST = 1<<7, /* Bit 7: Tx Burst Event Cnt Ov */ | ||
2397 | XMT_LONG = 1<<6, /* Bit 6: Tx Long Frame Cnt Ov */ | ||
2398 | XMT_UC_OK_OV = 1<<5, /* Bit 5: Tx Unicast Cnt Ov */ | ||
2399 | XMT_MC_OK_OV = 1<<4, /* Bit 4: Tx Multicast Cnt Ov */ | ||
2400 | XMT_BC_OK_OV = 1<<3, /* Bit 3: Tx Broadcast Cnt Ov */ | ||
2401 | XMT_OK_LO_OV = 1<<2, /* Bit 2: Octets Tx OK Low CntOv*/ | ||
2402 | XMT_OK_HI_OV = 1<<1, /* Bit 1: Octets Tx OK Hi Cnt Ov*/ | ||
2403 | XMT_OK_OV = 1<<0, /* Bit 0: Frames Tx Ok Ov */ | ||
2404 | }; | ||
2405 | |||
2406 | #define XMT_DEF_MSK (XMT_OK_LO_OV | XMT_OK_HI_OV) | ||
2407 | |||
2408 | struct skge_rx_desc { | ||
2409 | u32 control; | ||
2410 | u32 next_offset; | ||
2411 | u32 dma_lo; | ||
2412 | u32 dma_hi; | ||
2413 | u32 status; | ||
2414 | u32 timestamp; | ||
2415 | u16 csum2; | ||
2416 | u16 csum1; | ||
2417 | u16 csum2_start; | ||
2418 | u16 csum1_start; | ||
2419 | }; | ||
2420 | |||
2421 | struct skge_tx_desc { | ||
2422 | u32 control; | ||
2423 | u32 next_offset; | ||
2424 | u32 dma_lo; | ||
2425 | u32 dma_hi; | ||
2426 | u32 status; | ||
2427 | u32 csum_offs; | ||
2428 | u16 csum_write; | ||
2429 | u16 csum_start; | ||
2430 | u32 rsvd; | ||
2431 | }; | ||
2432 | |||
2433 | struct skge_element { | ||
2434 | struct skge_element *next; | ||
2435 | void *desc; | ||
2436 | struct sk_buff *skb; | ||
2437 | DECLARE_PCI_UNMAP_ADDR(mapaddr); | ||
2438 | DECLARE_PCI_UNMAP_LEN(maplen); | ||
2439 | }; | ||
2440 | |||
2441 | struct skge_ring { | ||
2442 | struct skge_element *to_clean; | ||
2443 | struct skge_element *to_use; | ||
2444 | struct skge_element *start; | ||
2445 | unsigned long count; | ||
2446 | }; | ||
2447 | |||
2448 | |||
2449 | struct skge_hw { | ||
2450 | void __iomem *regs; | ||
2451 | struct pci_dev *pdev; | ||
2452 | u32 intr_mask; | ||
2453 | struct net_device *dev[2]; | ||
2454 | |||
2455 | u8 chip_id; | ||
2456 | u8 chip_rev; | ||
2457 | u8 phy_type; | ||
2458 | u8 pmd_type; | ||
2459 | u16 phy_addr; | ||
2460 | u8 ports; | ||
2461 | |||
2462 | u32 ram_size; | ||
2463 | u32 ram_offset; | ||
2464 | |||
2465 | struct tasklet_struct ext_tasklet; | ||
2466 | spinlock_t phy_lock; | ||
2467 | }; | ||
2468 | |||
2469 | |||
2470 | static inline int iscopper(const struct skge_hw *hw) | ||
2471 | { | ||
2472 | return (hw->pmd_type == 'T'); | ||
2473 | } | ||
2474 | |||
2475 | enum { | ||
2476 | FLOW_MODE_NONE = 0, /* No Flow-Control */ | ||
2477 | FLOW_MODE_LOC_SEND = 1, /* Local station sends PAUSE */ | ||
2478 | FLOW_MODE_REM_SEND = 2, /* Symmetric or just remote */ | ||
2479 | FLOW_MODE_SYMMETRIC = 3, /* Both stations may send PAUSE */ | ||
2480 | }; | ||
2481 | |||
2482 | struct skge_port { | ||
2483 | u32 msg_enable; | ||
2484 | struct skge_hw *hw; | ||
2485 | struct net_device *netdev; | ||
2486 | int port; | ||
2487 | |||
2488 | spinlock_t tx_lock; | ||
2489 | u32 tx_avail; | ||
2490 | struct skge_ring tx_ring; | ||
2491 | struct skge_ring rx_ring; | ||
2492 | |||
2493 | struct net_device_stats net_stats; | ||
2494 | |||
2495 | u8 rx_csum; | ||
2496 | u8 blink_on; | ||
2497 | u8 flow_control; | ||
2498 | u8 wol; | ||
2499 | u8 autoneg; /* AUTONEG_ENABLE, AUTONEG_DISABLE */ | ||
2500 | u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */ | ||
2501 | u16 speed; /* SPEED_1000, SPEED_100, ... */ | ||
2502 | u32 advertising; | ||
2503 | |||
2504 | void *mem; /* PCI memory for rings */ | ||
2505 | dma_addr_t dma; | ||
2506 | unsigned long mem_size; | ||
2507 | unsigned int rx_buf_size; | ||
2508 | |||
2509 | struct timer_list led_blink; | ||
2510 | }; | ||
2511 | |||
2512 | |||
2513 | /* Register accessor for memory mapped device */ | ||
2514 | static inline u32 skge_read32(const struct skge_hw *hw, int reg) | ||
2515 | { | ||
2516 | return readl(hw->regs + reg); | ||
2517 | } | ||
2518 | |||
2519 | static inline u16 skge_read16(const struct skge_hw *hw, int reg) | ||
2520 | { | ||
2521 | return readw(hw->regs + reg); | ||
2522 | } | ||
2523 | |||
2524 | static inline u8 skge_read8(const struct skge_hw *hw, int reg) | ||
2525 | { | ||
2526 | return readb(hw->regs + reg); | ||
2527 | } | ||
2528 | |||
2529 | static inline void skge_write32(const struct skge_hw *hw, int reg, u32 val) | ||
2530 | { | ||
2531 | writel(val, hw->regs + reg); | ||
2532 | } | ||
2533 | |||
2534 | static inline void skge_write16(const struct skge_hw *hw, int reg, u16 val) | ||
2535 | { | ||
2536 | writew(val, hw->regs + reg); | ||
2537 | } | ||
2538 | |||
2539 | static inline void skge_write8(const struct skge_hw *hw, int reg, u8 val) | ||
2540 | { | ||
2541 | writeb(val, hw->regs + reg); | ||
2542 | } | ||
2543 | |||
2544 | /* MAC Related Registers inside the device. */ | ||
2545 | #define SK_REG(port,reg) (((port)<<7)+(reg)) | ||
2546 | #define SK_XMAC_REG(port, reg) \ | ||
2547 | ((BASE_XMAC_1 + (port) * (BASE_XMAC_2 - BASE_XMAC_1)) | (reg) << 1) | ||
2548 | |||
2549 | static inline u32 xm_read32(const struct skge_hw *hw, int port, int reg) | ||
2550 | { | ||
2551 | u32 v; | ||
2552 | v = skge_read16(hw, SK_XMAC_REG(port, reg)); | ||
2553 | v |= (u32)skge_read16(hw, SK_XMAC_REG(port, reg+2)) << 16; | ||
2554 | return v; | ||
2555 | } | ||
2556 | |||
2557 | static inline u16 xm_read16(const struct skge_hw *hw, int port, int reg) | ||
2558 | { | ||
2559 | return skge_read16(hw, SK_XMAC_REG(port,reg)); | ||
2560 | } | ||
2561 | |||
2562 | static inline void xm_write32(const struct skge_hw *hw, int port, int r, u32 v) | ||
2563 | { | ||
2564 | skge_write16(hw, SK_XMAC_REG(port,r), v & 0xffff); | ||
2565 | skge_write16(hw, SK_XMAC_REG(port,r+2), v >> 16); | ||
2566 | } | ||
2567 | |||
2568 | static inline void xm_write16(const struct skge_hw *hw, int port, int r, u16 v) | ||
2569 | { | ||
2570 | skge_write16(hw, SK_XMAC_REG(port,r), v); | ||
2571 | } | ||
2572 | |||
2573 | static inline void xm_outhash(const struct skge_hw *hw, int port, int reg, | ||
2574 | const u8 *hash) | ||
2575 | { | ||
2576 | xm_write16(hw, port, reg, (u16)hash[0] | ((u16)hash[1] << 8)); | ||
2577 | xm_write16(hw, port, reg+2, (u16)hash[2] | ((u16)hash[3] << 8)); | ||
2578 | xm_write16(hw, port, reg+4, (u16)hash[4] | ((u16)hash[5] << 8)); | ||
2579 | xm_write16(hw, port, reg+6, (u16)hash[6] | ((u16)hash[7] << 8)); | ||
2580 | } | ||
2581 | |||
2582 | static inline void xm_outaddr(const struct skge_hw *hw, int port, int reg, | ||
2583 | const u8 *addr) | ||
2584 | { | ||
2585 | xm_write16(hw, port, reg, (u16)addr[0] | ((u16)addr[1] << 8)); | ||
2586 | xm_write16(hw, port, reg+2, (u16)addr[2] | ((u16)addr[3] << 8)); | ||
2587 | xm_write16(hw, port, reg+4, (u16)addr[4] | ((u16)addr[5] << 8)); | ||
2588 | } | ||
2589 | |||
2590 | #define SK_GMAC_REG(port,reg) \ | ||
2591 | (BASE_GMAC_1 + (port) * (BASE_GMAC_2-BASE_GMAC_1) + (reg)) | ||
2592 | |||
2593 | static inline u16 gma_read16(const struct skge_hw *hw, int port, int reg) | ||
2594 | { | ||
2595 | return skge_read16(hw, SK_GMAC_REG(port,reg)); | ||
2596 | } | ||
2597 | |||
2598 | static inline u32 gma_read32(const struct skge_hw *hw, int port, int reg) | ||
2599 | { | ||
2600 | return (u32) skge_read16(hw, SK_GMAC_REG(port,reg)) | ||
2601 | | ((u32)skge_read16(hw, SK_GMAC_REG(port,reg+4)) << 16); | ||
2602 | } | ||
2603 | |||
2604 | static inline void gma_write16(const struct skge_hw *hw, int port, int r, u16 v) | ||
2605 | { | ||
2606 | skge_write16(hw, SK_GMAC_REG(port,r), v); | ||
2607 | } | ||
2608 | |||
2609 | static inline void gma_write32(const struct skge_hw *hw, int port, int r, u32 v) | ||
2610 | { | ||
2611 | skge_write16(hw, SK_GMAC_REG(port, r), (u16) v); | ||
2612 | skge_write32(hw, SK_GMAC_REG(port, r+4), (u16)(v >> 16)); | ||
2613 | } | ||
2614 | |||
2615 | static inline void gma_write8(const struct skge_hw *hw, int port, int r, u8 v) | ||
2616 | { | ||
2617 | skge_write8(hw, SK_GMAC_REG(port,r), v); | ||
2618 | } | ||
2619 | |||
2620 | static inline void gma_set_addr(struct skge_hw *hw, int port, int reg, | ||
2621 | const u8 *addr) | ||
2622 | { | ||
2623 | gma_write16(hw, port, reg, (u16) addr[0] | ((u16) addr[1] << 8)); | ||
2624 | gma_write16(hw, port, reg+4,(u16) addr[2] | ((u16) addr[3] << 8)); | ||
2625 | gma_write16(hw, port, reg+8,(u16) addr[4] | ((u16) addr[5] << 8)); | ||
2626 | } | ||
2627 | |||
2628 | #endif | ||
diff --git a/drivers/net/slip.c b/drivers/net/slip.c index 8f7841c0374d..404ea4297e32 100644 --- a/drivers/net/slip.c +++ b/drivers/net/slip.c | |||
@@ -74,6 +74,7 @@ | |||
74 | #include <linux/rtnetlink.h> | 74 | #include <linux/rtnetlink.h> |
75 | #include <linux/if_arp.h> | 75 | #include <linux/if_arp.h> |
76 | #include <linux/if_slip.h> | 76 | #include <linux/if_slip.h> |
77 | #include <linux/delay.h> | ||
77 | #include <linux/init.h> | 78 | #include <linux/init.h> |
78 | #include "slip.h" | 79 | #include "slip.h" |
79 | #ifdef CONFIG_INET | 80 | #ifdef CONFIG_INET |
@@ -198,18 +199,12 @@ err_exit: | |||
198 | static void | 199 | static void |
199 | sl_free_bufs(struct slip *sl) | 200 | sl_free_bufs(struct slip *sl) |
200 | { | 201 | { |
201 | void * tmp; | ||
202 | |||
203 | /* Free all SLIP frame buffers. */ | 202 | /* Free all SLIP frame buffers. */ |
204 | tmp = xchg(&sl->rbuff, NULL); | 203 | kfree(xchg(&sl->rbuff, NULL)); |
205 | kfree(tmp); | 204 | kfree(xchg(&sl->xbuff, NULL)); |
206 | tmp = xchg(&sl->xbuff, NULL); | ||
207 | kfree(tmp); | ||
208 | #ifdef SL_INCLUDE_CSLIP | 205 | #ifdef SL_INCLUDE_CSLIP |
209 | tmp = xchg(&sl->cbuff, NULL); | 206 | kfree(xchg(&sl->cbuff, NULL)); |
210 | kfree(tmp); | 207 | slhc_free(xchg(&sl->slcomp, NULL)); |
211 | if ((tmp = xchg(&sl->slcomp, NULL)) != NULL) | ||
212 | slhc_free(tmp); | ||
213 | #endif | 208 | #endif |
214 | } | 209 | } |
215 | 210 | ||
@@ -1389,10 +1384,8 @@ static void __exit slip_exit(void) | |||
1389 | /* First of all: check for active disciplines and hangup them. | 1384 | /* First of all: check for active disciplines and hangup them. |
1390 | */ | 1385 | */ |
1391 | do { | 1386 | do { |
1392 | if (busy) { | 1387 | if (busy) |
1393 | set_current_state(TASK_INTERRUPTIBLE); | 1388 | msleep_interruptible(100); |
1394 | schedule_timeout(HZ / 10); | ||
1395 | } | ||
1396 | 1389 | ||
1397 | busy = 0; | 1390 | busy = 0; |
1398 | for (i = 0; i < slip_maxdev; i++) { | 1391 | for (i = 0; i < slip_maxdev; i++) { |
@@ -1430,7 +1423,7 @@ static void __exit slip_exit(void) | |||
1430 | kfree(slip_devs); | 1423 | kfree(slip_devs); |
1431 | slip_devs = NULL; | 1424 | slip_devs = NULL; |
1432 | 1425 | ||
1433 | if ((i = tty_register_ldisc(N_SLIP, NULL))) | 1426 | if ((i = tty_unregister_ldisc(N_SLIP))) |
1434 | { | 1427 | { |
1435 | printk(KERN_ERR "SLIP: can't unregister line discipline (err = %d)\n", i); | 1428 | printk(KERN_ERR "SLIP: can't unregister line discipline (err = %d)\n", i); |
1436 | } | 1429 | } |
diff --git a/drivers/net/smc-mca.c b/drivers/net/smc-mca.c index 990201f42ba0..f00c476064f0 100644 --- a/drivers/net/smc-mca.c +++ b/drivers/net/smc-mca.c | |||
@@ -49,7 +49,6 @@ | |||
49 | #include <asm/system.h> | 49 | #include <asm/system.h> |
50 | 50 | ||
51 | #include "8390.h" | 51 | #include "8390.h" |
52 | #include "smc-mca.h" | ||
53 | 52 | ||
54 | #define DRV_NAME "smc-mca" | 53 | #define DRV_NAME "smc-mca" |
55 | 54 | ||
@@ -100,6 +99,63 @@ module_param_array(ultra_irq, int, NULL, 0); | |||
100 | MODULE_PARM_DESC(ultra_io, "SMC Ultra/EtherEZ MCA I/O base address(es)"); | 99 | MODULE_PARM_DESC(ultra_io, "SMC Ultra/EtherEZ MCA I/O base address(es)"); |
101 | MODULE_PARM_DESC(ultra_irq, "SMC Ultra/EtherEZ MCA IRQ number(s)"); | 100 | MODULE_PARM_DESC(ultra_irq, "SMC Ultra/EtherEZ MCA IRQ number(s)"); |
102 | 101 | ||
102 | static const struct { | ||
103 | unsigned int base_addr; | ||
104 | } addr_table[] = { | ||
105 | { 0x0800 }, | ||
106 | { 0x1800 }, | ||
107 | { 0x2800 }, | ||
108 | { 0x3800 }, | ||
109 | { 0x4800 }, | ||
110 | { 0x5800 }, | ||
111 | { 0x6800 }, | ||
112 | { 0x7800 }, | ||
113 | { 0x8800 }, | ||
114 | { 0x9800 }, | ||
115 | { 0xa800 }, | ||
116 | { 0xb800 }, | ||
117 | { 0xc800 }, | ||
118 | { 0xd800 }, | ||
119 | { 0xe800 }, | ||
120 | { 0xf800 } | ||
121 | }; | ||
122 | |||
123 | #define MEM_MASK 64 | ||
124 | |||
125 | static const struct { | ||
126 | unsigned char mem_index; | ||
127 | unsigned long mem_start; | ||
128 | unsigned char num_pages; | ||
129 | } mem_table[] = { | ||
130 | { 16, 0x0c0000, 40 }, | ||
131 | { 18, 0x0c4000, 40 }, | ||
132 | { 20, 0x0c8000, 40 }, | ||
133 | { 22, 0x0cc000, 40 }, | ||
134 | { 24, 0x0d0000, 40 }, | ||
135 | { 26, 0x0d4000, 40 }, | ||
136 | { 28, 0x0d8000, 40 }, | ||
137 | { 30, 0x0dc000, 40 }, | ||
138 | {144, 0xfc0000, 40 }, | ||
139 | {148, 0xfc8000, 40 }, | ||
140 | {154, 0xfd0000, 40 }, | ||
141 | {156, 0xfd8000, 40 }, | ||
142 | { 0, 0x0c0000, 20 }, | ||
143 | { 1, 0x0c2000, 20 }, | ||
144 | { 2, 0x0c4000, 20 }, | ||
145 | { 3, 0x0c6000, 20 } | ||
146 | }; | ||
147 | |||
148 | #define IRQ_MASK 243 | ||
149 | static const struct { | ||
150 | unsigned char new_irq; | ||
151 | unsigned char old_irq; | ||
152 | } irq_table[] = { | ||
153 | { 3, 3 }, | ||
154 | { 4, 4 }, | ||
155 | { 10, 10 }, | ||
156 | { 14, 15 } | ||
157 | }; | ||
158 | |||
103 | static short smc_mca_adapter_ids[] __initdata = { | 159 | static short smc_mca_adapter_ids[] __initdata = { |
104 | 0x61c8, | 160 | 0x61c8, |
105 | 0x61c9, | 161 | 0x61c9, |
@@ -126,7 +182,7 @@ static char *smc_mca_adapter_names[] __initdata = { | |||
126 | 182 | ||
127 | static int ultra_found = 0; | 183 | static int ultra_found = 0; |
128 | 184 | ||
129 | int __init ultramca_probe(struct device *gen_dev) | 185 | static int __init ultramca_probe(struct device *gen_dev) |
130 | { | 186 | { |
131 | unsigned short ioaddr; | 187 | unsigned short ioaddr; |
132 | struct net_device *dev; | 188 | struct net_device *dev; |
diff --git a/drivers/net/smc-mca.h b/drivers/net/smc-mca.h deleted file mode 100644 index ac50117a7e84..000000000000 --- a/drivers/net/smc-mca.h +++ /dev/null | |||
@@ -1,61 +0,0 @@ | |||
1 | /* | ||
2 | * djweis weisd3458@uni.edu | ||
3 | * most of this file was taken from ps2esdi.h | ||
4 | */ | ||
5 | |||
6 | struct { | ||
7 | unsigned int base_addr; | ||
8 | } addr_table[] = { | ||
9 | { 0x0800 }, | ||
10 | { 0x1800 }, | ||
11 | { 0x2800 }, | ||
12 | { 0x3800 }, | ||
13 | { 0x4800 }, | ||
14 | { 0x5800 }, | ||
15 | { 0x6800 }, | ||
16 | { 0x7800 }, | ||
17 | { 0x8800 }, | ||
18 | { 0x9800 }, | ||
19 | { 0xa800 }, | ||
20 | { 0xb800 }, | ||
21 | { 0xc800 }, | ||
22 | { 0xd800 }, | ||
23 | { 0xe800 }, | ||
24 | { 0xf800 } | ||
25 | }; | ||
26 | |||
27 | #define MEM_MASK 64 | ||
28 | |||
29 | struct { | ||
30 | unsigned char mem_index; | ||
31 | unsigned long mem_start; | ||
32 | unsigned char num_pages; | ||
33 | } mem_table[] = { | ||
34 | { 16, 0x0c0000, 40 }, | ||
35 | { 18, 0x0c4000, 40 }, | ||
36 | { 20, 0x0c8000, 40 }, | ||
37 | { 22, 0x0cc000, 40 }, | ||
38 | { 24, 0x0d0000, 40 }, | ||
39 | { 26, 0x0d4000, 40 }, | ||
40 | { 28, 0x0d8000, 40 }, | ||
41 | { 30, 0x0dc000, 40 }, | ||
42 | {144, 0xfc0000, 40 }, | ||
43 | {148, 0xfc8000, 40 }, | ||
44 | {154, 0xfd0000, 40 }, | ||
45 | {156, 0xfd8000, 40 }, | ||
46 | { 0, 0x0c0000, 20 }, | ||
47 | { 1, 0x0c2000, 20 }, | ||
48 | { 2, 0x0c4000, 20 }, | ||
49 | { 3, 0x0c6000, 20 } | ||
50 | }; | ||
51 | |||
52 | #define IRQ_MASK 243 | ||
53 | struct { | ||
54 | unsigned char new_irq; | ||
55 | unsigned char old_irq; | ||
56 | } irq_table[] = { | ||
57 | { 3, 3 }, | ||
58 | { 4, 4 }, | ||
59 | { 10, 10 }, | ||
60 | { 14, 15 } | ||
61 | }; | ||
diff --git a/drivers/net/smc-ultra.c b/drivers/net/smc-ultra.c index b564c677c6d2..6d9dae60a697 100644 --- a/drivers/net/smc-ultra.c +++ b/drivers/net/smc-ultra.c | |||
@@ -194,12 +194,7 @@ struct net_device * __init ultra_probe(int unit) | |||
194 | err = do_ultra_probe(dev); | 194 | err = do_ultra_probe(dev); |
195 | if (err) | 195 | if (err) |
196 | goto out; | 196 | goto out; |
197 | err = register_netdev(dev); | ||
198 | if (err) | ||
199 | goto out1; | ||
200 | return dev; | 197 | return dev; |
201 | out1: | ||
202 | cleanup_card(dev); | ||
203 | out: | 198 | out: |
204 | free_netdev(dev); | 199 | free_netdev(dev); |
205 | return ERR_PTR(err); | 200 | return ERR_PTR(err); |
@@ -325,6 +320,9 @@ static int __init ultra_probe1(struct net_device *dev, int ioaddr) | |||
325 | #endif | 320 | #endif |
326 | NS8390_init(dev, 0); | 321 | NS8390_init(dev, 0); |
327 | 322 | ||
323 | retval = register_netdev(dev); | ||
324 | if (retval) | ||
325 | goto out; | ||
328 | return 0; | 326 | return 0; |
329 | out: | 327 | out: |
330 | release_region(ioaddr, ULTRA_IO_EXTENT); | 328 | release_region(ioaddr, ULTRA_IO_EXTENT); |
@@ -583,11 +581,8 @@ init_module(void) | |||
583 | dev->irq = irq[this_dev]; | 581 | dev->irq = irq[this_dev]; |
584 | dev->base_addr = io[this_dev]; | 582 | dev->base_addr = io[this_dev]; |
585 | if (do_ultra_probe(dev) == 0) { | 583 | if (do_ultra_probe(dev) == 0) { |
586 | if (register_netdev(dev) == 0) { | 584 | dev_ultra[found++] = dev; |
587 | dev_ultra[found++] = dev; | 585 | continue; |
588 | continue; | ||
589 | } | ||
590 | cleanup_card(dev); | ||
591 | } | 586 | } |
592 | free_netdev(dev); | 587 | free_netdev(dev); |
593 | printk(KERN_WARNING "smc-ultra.c: No SMC Ultra card found (i/o = 0x%x).\n", io[this_dev]); | 588 | printk(KERN_WARNING "smc-ultra.c: No SMC Ultra card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c index 5e561ba44333..1438fdd20826 100644 --- a/drivers/net/smc91x.c +++ b/drivers/net/smc91x.c | |||
@@ -129,7 +129,7 @@ MODULE_PARM_DESC(nowait, "set to 1 for no wait state"); | |||
129 | /* | 129 | /* |
130 | * Transmit timeout, default 5 seconds. | 130 | * Transmit timeout, default 5 seconds. |
131 | */ | 131 | */ |
132 | static int watchdog = 5000; | 132 | static int watchdog = 1000; |
133 | module_param(watchdog, int, 0400); | 133 | module_param(watchdog, int, 0400); |
134 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | 134 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); |
135 | 135 | ||
@@ -315,15 +315,25 @@ static void smc_reset(struct net_device *dev) | |||
315 | struct smc_local *lp = netdev_priv(dev); | 315 | struct smc_local *lp = netdev_priv(dev); |
316 | void __iomem *ioaddr = lp->base; | 316 | void __iomem *ioaddr = lp->base; |
317 | unsigned int ctl, cfg; | 317 | unsigned int ctl, cfg; |
318 | struct sk_buff *pending_skb; | ||
318 | 319 | ||
319 | DBG(2, "%s: %s\n", dev->name, __FUNCTION__); | 320 | DBG(2, "%s: %s\n", dev->name, __FUNCTION__); |
320 | 321 | ||
321 | /* Disable all interrupts */ | 322 | /* Disable all interrupts, block TX tasklet */ |
322 | spin_lock(&lp->lock); | 323 | spin_lock(&lp->lock); |
323 | SMC_SELECT_BANK(2); | 324 | SMC_SELECT_BANK(2); |
324 | SMC_SET_INT_MASK(0); | 325 | SMC_SET_INT_MASK(0); |
326 | pending_skb = lp->pending_tx_skb; | ||
327 | lp->pending_tx_skb = NULL; | ||
325 | spin_unlock(&lp->lock); | 328 | spin_unlock(&lp->lock); |
326 | 329 | ||
330 | /* free any pending tx skb */ | ||
331 | if (pending_skb) { | ||
332 | dev_kfree_skb(pending_skb); | ||
333 | lp->stats.tx_errors++; | ||
334 | lp->stats.tx_aborted_errors++; | ||
335 | } | ||
336 | |||
327 | /* | 337 | /* |
328 | * This resets the registers mostly to defaults, but doesn't | 338 | * This resets the registers mostly to defaults, but doesn't |
329 | * affect EEPROM. That seems unnecessary | 339 | * affect EEPROM. That seems unnecessary |
@@ -389,14 +399,6 @@ static void smc_reset(struct net_device *dev) | |||
389 | SMC_SELECT_BANK(2); | 399 | SMC_SELECT_BANK(2); |
390 | SMC_SET_MMU_CMD(MC_RESET); | 400 | SMC_SET_MMU_CMD(MC_RESET); |
391 | SMC_WAIT_MMU_BUSY(); | 401 | SMC_WAIT_MMU_BUSY(); |
392 | |||
393 | /* clear anything saved */ | ||
394 | if (lp->pending_tx_skb != NULL) { | ||
395 | dev_kfree_skb (lp->pending_tx_skb); | ||
396 | lp->pending_tx_skb = NULL; | ||
397 | lp->stats.tx_errors++; | ||
398 | lp->stats.tx_aborted_errors++; | ||
399 | } | ||
400 | } | 402 | } |
401 | 403 | ||
402 | /* | 404 | /* |
@@ -440,6 +442,7 @@ static void smc_shutdown(struct net_device *dev) | |||
440 | { | 442 | { |
441 | struct smc_local *lp = netdev_priv(dev); | 443 | struct smc_local *lp = netdev_priv(dev); |
442 | void __iomem *ioaddr = lp->base; | 444 | void __iomem *ioaddr = lp->base; |
445 | struct sk_buff *pending_skb; | ||
443 | 446 | ||
444 | DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__); | 447 | DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__); |
445 | 448 | ||
@@ -447,7 +450,11 @@ static void smc_shutdown(struct net_device *dev) | |||
447 | spin_lock(&lp->lock); | 450 | spin_lock(&lp->lock); |
448 | SMC_SELECT_BANK(2); | 451 | SMC_SELECT_BANK(2); |
449 | SMC_SET_INT_MASK(0); | 452 | SMC_SET_INT_MASK(0); |
453 | pending_skb = lp->pending_tx_skb; | ||
454 | lp->pending_tx_skb = NULL; | ||
450 | spin_unlock(&lp->lock); | 455 | spin_unlock(&lp->lock); |
456 | if (pending_skb) | ||
457 | dev_kfree_skb(pending_skb); | ||
451 | 458 | ||
452 | /* and tell the card to stay away from that nasty outside world */ | 459 | /* and tell the card to stay away from that nasty outside world */ |
453 | SMC_SELECT_BANK(0); | 460 | SMC_SELECT_BANK(0); |
@@ -627,7 +634,12 @@ static void smc_hardware_send_pkt(unsigned long data) | |||
627 | } | 634 | } |
628 | 635 | ||
629 | skb = lp->pending_tx_skb; | 636 | skb = lp->pending_tx_skb; |
637 | if (unlikely(!skb)) { | ||
638 | smc_special_unlock(&lp->lock); | ||
639 | return; | ||
640 | } | ||
630 | lp->pending_tx_skb = NULL; | 641 | lp->pending_tx_skb = NULL; |
642 | |||
631 | packet_no = SMC_GET_AR(); | 643 | packet_no = SMC_GET_AR(); |
632 | if (unlikely(packet_no & AR_FAILED)) { | 644 | if (unlikely(packet_no & AR_FAILED)) { |
633 | printk("%s: Memory allocation failed.\n", dev->name); | 645 | printk("%s: Memory allocation failed.\n", dev->name); |
@@ -660,15 +672,14 @@ static void smc_hardware_send_pkt(unsigned long data) | |||
660 | SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG); | 672 | SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG); |
661 | 673 | ||
662 | /* | 674 | /* |
663 | * If THROTTLE_TX_PKTS is set, we look at the TX_EMPTY flag | 675 | * If THROTTLE_TX_PKTS is set, we stop the queue here. This will |
664 | * before queueing this packet for TX, and if it's clear then | 676 | * have the effect of having at most one packet queued for TX |
665 | * we stop the queue here. This will have the effect of | 677 | * in the chip's memory at all time. |
666 | * having at most 2 packets queued for TX in the chip's memory | 678 | * |
667 | * at all time. If THROTTLE_TX_PKTS is not set then the queue | 679 | * If THROTTLE_TX_PKTS is not set then the queue is stopped only |
668 | * is stopped only when memory allocation (MC_ALLOC) does not | 680 | * when memory allocation (MC_ALLOC) does not succeed right away. |
669 | * succeed right away. | ||
670 | */ | 681 | */ |
671 | if (THROTTLE_TX_PKTS && !(SMC_GET_INT() & IM_TX_EMPTY_INT)) | 682 | if (THROTTLE_TX_PKTS) |
672 | netif_stop_queue(dev); | 683 | netif_stop_queue(dev); |
673 | 684 | ||
674 | /* queue the packet for TX */ | 685 | /* queue the packet for TX */ |
@@ -703,7 +714,6 @@ static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
703 | DBG(3, "%s: %s\n", dev->name, __FUNCTION__); | 714 | DBG(3, "%s: %s\n", dev->name, __FUNCTION__); |
704 | 715 | ||
705 | BUG_ON(lp->pending_tx_skb != NULL); | 716 | BUG_ON(lp->pending_tx_skb != NULL); |
706 | lp->pending_tx_skb = skb; | ||
707 | 717 | ||
708 | /* | 718 | /* |
709 | * The MMU wants the number of pages to be the number of 256 bytes | 719 | * The MMU wants the number of pages to be the number of 256 bytes |
@@ -719,7 +729,6 @@ static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
719 | numPages = ((skb->len & ~1) + (6 - 1)) >> 8; | 729 | numPages = ((skb->len & ~1) + (6 - 1)) >> 8; |
720 | if (unlikely(numPages > 7)) { | 730 | if (unlikely(numPages > 7)) { |
721 | printk("%s: Far too big packet error.\n", dev->name); | 731 | printk("%s: Far too big packet error.\n", dev->name); |
722 | lp->pending_tx_skb = NULL; | ||
723 | lp->stats.tx_errors++; | 732 | lp->stats.tx_errors++; |
724 | lp->stats.tx_dropped++; | 733 | lp->stats.tx_dropped++; |
725 | dev_kfree_skb(skb); | 734 | dev_kfree_skb(skb); |
@@ -746,6 +755,7 @@ static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
746 | 755 | ||
747 | smc_special_unlock(&lp->lock); | 756 | smc_special_unlock(&lp->lock); |
748 | 757 | ||
758 | lp->pending_tx_skb = skb; | ||
749 | if (!poll_count) { | 759 | if (!poll_count) { |
750 | /* oh well, wait until the chip finds memory later */ | 760 | /* oh well, wait until the chip finds memory later */ |
751 | netif_stop_queue(dev); | 761 | netif_stop_queue(dev); |
@@ -792,17 +802,20 @@ static void smc_tx(struct net_device *dev) | |||
792 | DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n", | 802 | DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n", |
793 | dev->name, tx_status, packet_no); | 803 | dev->name, tx_status, packet_no); |
794 | 804 | ||
795 | if (!(tx_status & TS_SUCCESS)) | 805 | if (!(tx_status & ES_TX_SUC)) |
796 | lp->stats.tx_errors++; | 806 | lp->stats.tx_errors++; |
797 | if (tx_status & TS_LOSTCAR) | 807 | |
808 | if (tx_status & ES_LOSTCARR) | ||
798 | lp->stats.tx_carrier_errors++; | 809 | lp->stats.tx_carrier_errors++; |
799 | 810 | ||
800 | if (tx_status & TS_LATCOL) { | 811 | if (tx_status & (ES_LATCOL | ES_16COL)) { |
801 | PRINTK("%s: late collision occurred on last xmit\n", dev->name); | 812 | PRINTK("%s: %s occurred on last xmit\n", dev->name, |
813 | (tx_status & ES_LATCOL) ? | ||
814 | "late collision" : "too many collisions"); | ||
802 | lp->stats.tx_window_errors++; | 815 | lp->stats.tx_window_errors++; |
803 | if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) { | 816 | if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) { |
804 | printk(KERN_INFO "%s: unexpectedly large numbers of " | 817 | printk(KERN_INFO "%s: unexpectedly large number of " |
805 | "late collisions. Please check duplex " | 818 | "bad collisions. Please check duplex " |
806 | "setting.\n", dev->name); | 819 | "setting.\n", dev->name); |
807 | } | 820 | } |
808 | } | 821 | } |
@@ -1060,7 +1073,7 @@ static void smc_phy_powerdown(struct net_device *dev) | |||
1060 | above). linkwatch_event() also wants the netlink semaphore. | 1073 | above). linkwatch_event() also wants the netlink semaphore. |
1061 | */ | 1074 | */ |
1062 | while(lp->work_pending) | 1075 | while(lp->work_pending) |
1063 | schedule(); | 1076 | yield(); |
1064 | 1077 | ||
1065 | bmcr = smc_phy_read(dev, phy, MII_BMCR); | 1078 | bmcr = smc_phy_read(dev, phy, MII_BMCR); |
1066 | smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN); | 1079 | smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN); |
@@ -1236,7 +1249,7 @@ static void smc_10bt_check_media(struct net_device *dev, int init) | |||
1236 | old_carrier = netif_carrier_ok(dev) ? 1 : 0; | 1249 | old_carrier = netif_carrier_ok(dev) ? 1 : 0; |
1237 | 1250 | ||
1238 | SMC_SELECT_BANK(0); | 1251 | SMC_SELECT_BANK(0); |
1239 | new_carrier = SMC_inw(ioaddr, EPH_STATUS_REG) & ES_LINK_OK ? 1 : 0; | 1252 | new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0; |
1240 | SMC_SELECT_BANK(2); | 1253 | SMC_SELECT_BANK(2); |
1241 | 1254 | ||
1242 | if (init || (old_carrier != new_carrier)) { | 1255 | if (init || (old_carrier != new_carrier)) { |
@@ -1308,15 +1321,16 @@ static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1308 | if (!status) | 1321 | if (!status) |
1309 | break; | 1322 | break; |
1310 | 1323 | ||
1311 | if (status & IM_RCV_INT) { | 1324 | if (status & IM_TX_INT) { |
1312 | DBG(3, "%s: RX irq\n", dev->name); | 1325 | /* do this before RX as it will free memory quickly */ |
1313 | smc_rcv(dev); | ||
1314 | } else if (status & IM_TX_INT) { | ||
1315 | DBG(3, "%s: TX int\n", dev->name); | 1326 | DBG(3, "%s: TX int\n", dev->name); |
1316 | smc_tx(dev); | 1327 | smc_tx(dev); |
1317 | SMC_ACK_INT(IM_TX_INT); | 1328 | SMC_ACK_INT(IM_TX_INT); |
1318 | if (THROTTLE_TX_PKTS) | 1329 | if (THROTTLE_TX_PKTS) |
1319 | netif_wake_queue(dev); | 1330 | netif_wake_queue(dev); |
1331 | } else if (status & IM_RCV_INT) { | ||
1332 | DBG(3, "%s: RX irq\n", dev->name); | ||
1333 | smc_rcv(dev); | ||
1320 | } else if (status & IM_ALLOC_INT) { | 1334 | } else if (status & IM_ALLOC_INT) { |
1321 | DBG(3, "%s: Allocation irq\n", dev->name); | 1335 | DBG(3, "%s: Allocation irq\n", dev->name); |
1322 | tasklet_hi_schedule(&lp->tx_task); | 1336 | tasklet_hi_schedule(&lp->tx_task); |
@@ -1337,7 +1351,10 @@ static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1337 | /* multiple collisions */ | 1351 | /* multiple collisions */ |
1338 | lp->stats.collisions += card_stats & 0xF; | 1352 | lp->stats.collisions += card_stats & 0xF; |
1339 | } else if (status & IM_RX_OVRN_INT) { | 1353 | } else if (status & IM_RX_OVRN_INT) { |
1340 | DBG(1, "%s: RX overrun\n", dev->name); | 1354 | DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name, |
1355 | ({ int eph_st; SMC_SELECT_BANK(0); | ||
1356 | eph_st = SMC_GET_EPH_STATUS(); | ||
1357 | SMC_SELECT_BANK(2); eph_st; }) ); | ||
1341 | SMC_ACK_INT(IM_RX_OVRN_INT); | 1358 | SMC_ACK_INT(IM_RX_OVRN_INT); |
1342 | lp->stats.rx_errors++; | 1359 | lp->stats.rx_errors++; |
1343 | lp->stats.rx_fifo_errors++; | 1360 | lp->stats.rx_fifo_errors++; |
@@ -1389,7 +1406,7 @@ static void smc_timeout(struct net_device *dev) | |||
1389 | { | 1406 | { |
1390 | struct smc_local *lp = netdev_priv(dev); | 1407 | struct smc_local *lp = netdev_priv(dev); |
1391 | void __iomem *ioaddr = lp->base; | 1408 | void __iomem *ioaddr = lp->base; |
1392 | int status, mask, meminfo, fifo; | 1409 | int status, mask, eph_st, meminfo, fifo; |
1393 | 1410 | ||
1394 | DBG(2, "%s: %s\n", dev->name, __FUNCTION__); | 1411 | DBG(2, "%s: %s\n", dev->name, __FUNCTION__); |
1395 | 1412 | ||
@@ -1398,11 +1415,13 @@ static void smc_timeout(struct net_device *dev) | |||
1398 | mask = SMC_GET_INT_MASK(); | 1415 | mask = SMC_GET_INT_MASK(); |
1399 | fifo = SMC_GET_FIFO(); | 1416 | fifo = SMC_GET_FIFO(); |
1400 | SMC_SELECT_BANK(0); | 1417 | SMC_SELECT_BANK(0); |
1418 | eph_st = SMC_GET_EPH_STATUS(); | ||
1401 | meminfo = SMC_GET_MIR(); | 1419 | meminfo = SMC_GET_MIR(); |
1402 | SMC_SELECT_BANK(2); | 1420 | SMC_SELECT_BANK(2); |
1403 | spin_unlock_irq(&lp->lock); | 1421 | spin_unlock_irq(&lp->lock); |
1404 | PRINTK( "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n", | 1422 | PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x " |
1405 | dev->name, status, mask, meminfo, fifo ); | 1423 | "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n", |
1424 | dev->name, status, mask, meminfo, fifo, eph_st ); | ||
1406 | 1425 | ||
1407 | smc_reset(dev); | 1426 | smc_reset(dev); |
1408 | smc_enable(dev); | 1427 | smc_enable(dev); |
@@ -1598,14 +1617,8 @@ static int smc_close(struct net_device *dev) | |||
1598 | 1617 | ||
1599 | /* clear everything */ | 1618 | /* clear everything */ |
1600 | smc_shutdown(dev); | 1619 | smc_shutdown(dev); |
1601 | 1620 | tasklet_kill(&lp->tx_task); | |
1602 | smc_phy_powerdown(dev); | 1621 | smc_phy_powerdown(dev); |
1603 | |||
1604 | if (lp->pending_tx_skb) { | ||
1605 | dev_kfree_skb(lp->pending_tx_skb); | ||
1606 | lp->pending_tx_skb = NULL; | ||
1607 | } | ||
1608 | |||
1609 | return 0; | 1622 | return 0; |
1610 | } | 1623 | } |
1611 | 1624 | ||
@@ -1863,7 +1876,7 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr) | |||
1863 | SMC_SELECT_BANK(1); | 1876 | SMC_SELECT_BANK(1); |
1864 | val = SMC_GET_BASE(); | 1877 | val = SMC_GET_BASE(); |
1865 | val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT; | 1878 | val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT; |
1866 | if (((unsigned long)ioaddr & ((PAGE_SIZE-1)<<SMC_IO_SHIFT)) != val) { /*XXX: WTF? */ | 1879 | if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) { |
1867 | printk("%s: IOADDR %p doesn't match configuration (%x).\n", | 1880 | printk("%s: IOADDR %p doesn't match configuration (%x).\n", |
1868 | CARDNAME, ioaddr, val); | 1881 | CARDNAME, ioaddr, val); |
1869 | } | 1882 | } |
@@ -1985,7 +1998,7 @@ static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr) | |||
1985 | if (retval) | 1998 | if (retval) |
1986 | goto err_out; | 1999 | goto err_out; |
1987 | 2000 | ||
1988 | set_irq_type(dev->irq, IRQT_RISING); | 2001 | set_irq_type(dev->irq, SMC_IRQ_TRIGGER_TYPE); |
1989 | 2002 | ||
1990 | #ifdef SMC_USE_PXA_DMA | 2003 | #ifdef SMC_USE_PXA_DMA |
1991 | { | 2004 | { |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index ddd2688e7d33..7089d86e857a 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -151,7 +151,7 @@ | |||
151 | 151 | ||
152 | /* We actually can't write halfwords properly if not word aligned */ | 152 | /* We actually can't write halfwords properly if not word aligned */ |
153 | static inline void | 153 | static inline void |
154 | SMC_outw(u16 val, unsigned long ioaddr, int reg) | 154 | SMC_outw(u16 val, void __iomem *ioaddr, int reg) |
155 | { | 155 | { |
156 | if (reg & 2) { | 156 | if (reg & 2) { |
157 | unsigned int v = val << 16; | 157 | unsigned int v = val << 16; |
@@ -182,6 +182,16 @@ SMC_outw(u16 val, unsigned long ioaddr, int reg) | |||
182 | #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) | 182 | #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) |
183 | #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) | 183 | #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) |
184 | 184 | ||
185 | #include <asm/mach-types.h> | ||
186 | #include <asm/arch/cpu.h> | ||
187 | |||
188 | #define SMC_IRQ_TRIGGER_TYPE (( \ | ||
189 | machine_is_omap_h2() \ | ||
190 | || machine_is_omap_h3() \ | ||
191 | || (machine_is_omap_innovator() && !cpu_is_omap150()) \ | ||
192 | ) ? IRQT_FALLING : IRQT_RISING) | ||
193 | |||
194 | |||
185 | #elif defined(CONFIG_SH_SH4202_MICRODEV) | 195 | #elif defined(CONFIG_SH_SH4202_MICRODEV) |
186 | 196 | ||
187 | #define SMC_CAN_USE_8BIT 0 | 197 | #define SMC_CAN_USE_8BIT 0 |
@@ -300,6 +310,9 @@ static inline void SMC_outsw (unsigned long a, int r, unsigned char* p, int l) | |||
300 | 310 | ||
301 | #endif | 311 | #endif |
302 | 312 | ||
313 | #ifndef SMC_IRQ_TRIGGER_TYPE | ||
314 | #define SMC_IRQ_TRIGGER_TYPE IRQT_RISING | ||
315 | #endif | ||
303 | 316 | ||
304 | #ifdef SMC_USE_PXA_DMA | 317 | #ifdef SMC_USE_PXA_DMA |
305 | /* | 318 | /* |
@@ -317,7 +330,7 @@ static inline void SMC_outsw (unsigned long a, int r, unsigned char* p, int l) | |||
317 | #define SMC_insl(a, r, p, l) \ | 330 | #define SMC_insl(a, r, p, l) \ |
318 | smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l) | 331 | smc_pxa_dma_insl(a, lp->physaddr, r, dev->dma, p, l) |
319 | static inline void | 332 | static inline void |
320 | smc_pxa_dma_insl(u_long ioaddr, u_long physaddr, int reg, int dma, | 333 | smc_pxa_dma_insl(void __iomem *ioaddr, u_long physaddr, int reg, int dma, |
321 | u_char *buf, int len) | 334 | u_char *buf, int len) |
322 | { | 335 | { |
323 | dma_addr_t dmabuf; | 336 | dma_addr_t dmabuf; |
@@ -355,7 +368,7 @@ smc_pxa_dma_insl(u_long ioaddr, u_long physaddr, int reg, int dma, | |||
355 | #define SMC_insw(a, r, p, l) \ | 368 | #define SMC_insw(a, r, p, l) \ |
356 | smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l) | 369 | smc_pxa_dma_insw(a, lp->physaddr, r, dev->dma, p, l) |
357 | static inline void | 370 | static inline void |
358 | smc_pxa_dma_insw(u_long ioaddr, u_long physaddr, int reg, int dma, | 371 | smc_pxa_dma_insw(void __iomem *ioaddr, u_long physaddr, int reg, int dma, |
359 | u_char *buf, int len) | 372 | u_char *buf, int len) |
360 | { | 373 | { |
361 | dma_addr_t dmabuf; | 374 | dma_addr_t dmabuf; |
@@ -681,14 +694,6 @@ static const char * chip_ids[ 16 ] = { | |||
681 | 694 | ||
682 | 695 | ||
683 | /* | 696 | /* |
684 | . Transmit status bits | ||
685 | */ | ||
686 | #define TS_SUCCESS 0x0001 | ||
687 | #define TS_LOSTCAR 0x0400 | ||
688 | #define TS_LATCOL 0x0200 | ||
689 | #define TS_16COL 0x0010 | ||
690 | |||
691 | /* | ||
692 | . Receive status bits | 697 | . Receive status bits |
693 | */ | 698 | */ |
694 | #define RS_ALGNERR 0x8000 | 699 | #define RS_ALGNERR 0x8000 |
@@ -845,6 +850,7 @@ static const char * chip_ids[ 16 ] = { | |||
845 | #define SMC_GET_FIFO() SMC_inw( ioaddr, FIFO_REG ) | 850 | #define SMC_GET_FIFO() SMC_inw( ioaddr, FIFO_REG ) |
846 | #define SMC_GET_PTR() SMC_inw( ioaddr, PTR_REG ) | 851 | #define SMC_GET_PTR() SMC_inw( ioaddr, PTR_REG ) |
847 | #define SMC_SET_PTR(x) SMC_outw( x, ioaddr, PTR_REG ) | 852 | #define SMC_SET_PTR(x) SMC_outw( x, ioaddr, PTR_REG ) |
853 | #define SMC_GET_EPH_STATUS() SMC_inw( ioaddr, EPH_STATUS_REG ) | ||
848 | #define SMC_GET_RCR() SMC_inw( ioaddr, RCR_REG ) | 854 | #define SMC_GET_RCR() SMC_inw( ioaddr, RCR_REG ) |
849 | #define SMC_SET_RCR(x) SMC_outw( x, ioaddr, RCR_REG ) | 855 | #define SMC_SET_RCR(x) SMC_outw( x, ioaddr, RCR_REG ) |
850 | #define SMC_GET_REV() SMC_inw( ioaddr, REV_REG ) | 856 | #define SMC_GET_REV() SMC_inw( ioaddr, REV_REG ) |
diff --git a/drivers/net/starfire.c b/drivers/net/starfire.c index 236bdd3f6ba0..88b89dc95c77 100644 --- a/drivers/net/starfire.c +++ b/drivers/net/starfire.c | |||
@@ -2,7 +2,7 @@ | |||
2 | /* | 2 | /* |
3 | Written 1998-2000 by Donald Becker. | 3 | Written 1998-2000 by Donald Becker. |
4 | 4 | ||
5 | Current maintainer is Ion Badulescu <ionut@cs.columbia.edu>. Please | 5 | Current maintainer is Ion Badulescu <ionut ta badula tod org>. Please |
6 | send all bug reports to me, and not to Donald Becker, as this code | 6 | send all bug reports to me, and not to Donald Becker, as this code |
7 | has been heavily modified from Donald's original version. | 7 | has been heavily modified from Donald's original version. |
8 | 8 | ||
@@ -129,12 +129,18 @@ | |||
129 | - put the chip to a D3 slumber on driver unload | 129 | - put the chip to a D3 slumber on driver unload |
130 | - added config option to enable/disable NAPI | 130 | - added config option to enable/disable NAPI |
131 | 131 | ||
132 | TODO: bugfixes (no bugs known as of right now) | 132 | LK1.4.2 (Ion Badulescu) |
133 | - finally added firmware (GPL'ed by Adaptec) | ||
134 | - removed compatibility code for 2.2.x | ||
135 | |||
136 | TODO: - fix forced speed/duplexing code (broken a long time ago, when | ||
137 | somebody converted the driver to use the generic MII code) | ||
138 | - fix VLAN support | ||
133 | */ | 139 | */ |
134 | 140 | ||
135 | #define DRV_NAME "starfire" | 141 | #define DRV_NAME "starfire" |
136 | #define DRV_VERSION "1.03+LK1.4.1" | 142 | #define DRV_VERSION "1.03+LK1.4.2" |
137 | #define DRV_RELDATE "February 10, 2002" | 143 | #define DRV_RELDATE "January 19, 2005" |
138 | 144 | ||
139 | #include <linux/config.h> | 145 | #include <linux/config.h> |
140 | #include <linux/version.h> | 146 | #include <linux/version.h> |
@@ -145,25 +151,15 @@ TODO: bugfixes (no bugs known as of right now) | |||
145 | #include <linux/etherdevice.h> | 151 | #include <linux/etherdevice.h> |
146 | #include <linux/init.h> | 152 | #include <linux/init.h> |
147 | #include <linux/delay.h> | 153 | #include <linux/delay.h> |
154 | #include <linux/crc32.h> | ||
155 | #include <linux/ethtool.h> | ||
156 | #include <linux/mii.h> | ||
157 | #include <linux/if_vlan.h> | ||
148 | #include <asm/processor.h> /* Processor type for cache alignment. */ | 158 | #include <asm/processor.h> /* Processor type for cache alignment. */ |
149 | #include <asm/uaccess.h> | 159 | #include <asm/uaccess.h> |
150 | #include <asm/io.h> | 160 | #include <asm/io.h> |
151 | 161 | ||
152 | /* | 162 | #include "starfire_firmware.h" |
153 | * Adaptec's license for their drivers (which is where I got the | ||
154 | * firmware files) does not allow one to redistribute them. Thus, we can't | ||
155 | * include the firmware with this driver. | ||
156 | * | ||
157 | * However, should a legal-to-distribute firmware become available, | ||
158 | * the driver developer would need only to obtain the firmware in the | ||
159 | * form of a C header file. | ||
160 | * Once that's done, the #undef below must be changed into a #define | ||
161 | * for this driver to really use the firmware. Note that Rx/Tx | ||
162 | * hardware TCP checksumming is not possible without the firmware. | ||
163 | * | ||
164 | * WANTED: legal firmware to include with this GPL'd driver. | ||
165 | */ | ||
166 | #undef HAS_FIRMWARE | ||
167 | /* | 163 | /* |
168 | * The current frame processor firmware fails to checksum a fragment | 164 | * The current frame processor firmware fails to checksum a fragment |
169 | * of length 1. If and when this is fixed, the #define below can be removed. | 165 | * of length 1. If and when this is fixed, the #define below can be removed. |
@@ -172,13 +168,7 @@ TODO: bugfixes (no bugs known as of right now) | |||
172 | /* | 168 | /* |
173 | * Define this if using the driver with the zero-copy patch | 169 | * Define this if using the driver with the zero-copy patch |
174 | */ | 170 | */ |
175 | #if defined(HAS_FIRMWARE) && defined(MAX_SKB_FRAGS) | ||
176 | #define ZEROCOPY | 171 | #define ZEROCOPY |
177 | #endif | ||
178 | |||
179 | #ifdef HAS_FIRMWARE | ||
180 | #include "starfire_firmware.h" | ||
181 | #endif /* HAS_FIRMWARE */ | ||
182 | 172 | ||
183 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | 173 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) |
184 | #define VLAN_SUPPORT | 174 | #define VLAN_SUPPORT |
@@ -202,11 +192,7 @@ static int mtu; | |||
202 | The Starfire has a 512 element hash table based on the Ethernet CRC. */ | 192 | The Starfire has a 512 element hash table based on the Ethernet CRC. */ |
203 | static int multicast_filter_limit = 512; | 193 | static int multicast_filter_limit = 512; |
204 | /* Whether to do TCP/UDP checksums in hardware */ | 194 | /* Whether to do TCP/UDP checksums in hardware */ |
205 | #ifdef HAS_FIRMWARE | ||
206 | static int enable_hw_cksum = 1; | 195 | static int enable_hw_cksum = 1; |
207 | #else | ||
208 | static int enable_hw_cksum = 0; | ||
209 | #endif | ||
210 | 196 | ||
211 | #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/ | 197 | #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/ |
212 | /* | 198 | /* |
@@ -291,43 +277,15 @@ static int full_duplex[MAX_UNITS] = {0, }; | |||
291 | #define RX_DESC_ADDR_SIZE RxDescAddr32bit | 277 | #define RX_DESC_ADDR_SIZE RxDescAddr32bit |
292 | #endif | 278 | #endif |
293 | 279 | ||
294 | #ifdef MAX_SKB_FRAGS | ||
295 | #define skb_first_frag_len(skb) skb_headlen(skb) | 280 | #define skb_first_frag_len(skb) skb_headlen(skb) |
296 | #define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1) | 281 | #define skb_num_frags(skb) (skb_shinfo(skb)->nr_frags + 1) |
297 | #else /* not MAX_SKB_FRAGS */ | ||
298 | #define skb_first_frag_len(skb) (skb->len) | ||
299 | #define skb_num_frags(skb) 1 | ||
300 | #endif /* not MAX_SKB_FRAGS */ | ||
301 | |||
302 | /* 2.2.x compatibility code */ | ||
303 | #if LINUX_VERSION_CODE < 0x20300 | ||
304 | |||
305 | #include "starfire-kcomp22.h" | ||
306 | |||
307 | #else /* LINUX_VERSION_CODE > 0x20300 */ | ||
308 | |||
309 | #include <linux/crc32.h> | ||
310 | #include <linux/ethtool.h> | ||
311 | #include <linux/mii.h> | ||
312 | |||
313 | #include <linux/if_vlan.h> | ||
314 | |||
315 | #define init_tx_timer(dev, func, timeout) \ | ||
316 | dev->tx_timeout = func; \ | ||
317 | dev->watchdog_timeo = timeout; | ||
318 | #define kick_tx_timer(dev, func, timeout) | ||
319 | |||
320 | #define netif_start_if(dev) | ||
321 | #define netif_stop_if(dev) | ||
322 | |||
323 | #define PCI_SLOT_NAME(pci_dev) pci_name(pci_dev) | ||
324 | |||
325 | #endif /* LINUX_VERSION_CODE > 0x20300 */ | ||
326 | 282 | ||
327 | #ifdef HAVE_NETDEV_POLL | 283 | #ifdef HAVE_NETDEV_POLL |
328 | #define init_poll(dev) \ | 284 | #define init_poll(dev) \ |
285 | do { \ | ||
329 | dev->poll = &netdev_poll; \ | 286 | dev->poll = &netdev_poll; \ |
330 | dev->weight = max_interrupt_work; | 287 | dev->weight = max_interrupt_work; \ |
288 | } while (0) | ||
331 | #define netdev_rx(dev, ioaddr) \ | 289 | #define netdev_rx(dev, ioaddr) \ |
332 | do { \ | 290 | do { \ |
333 | u32 intr_enable; \ | 291 | u32 intr_enable; \ |
@@ -341,7 +299,7 @@ do { \ | |||
341 | /* Paranoia check */ \ | 299 | /* Paranoia check */ \ |
342 | intr_enable = readl(ioaddr + IntrEnable); \ | 300 | intr_enable = readl(ioaddr + IntrEnable); \ |
343 | if (intr_enable & (IntrRxDone | IntrRxEmpty)) { \ | 301 | if (intr_enable & (IntrRxDone | IntrRxEmpty)) { \ |
344 | printk("%s: interrupt while in polling mode!\n", dev->name); \ | 302 | printk(KERN_INFO "%s: interrupt while in polling mode!\n", dev->name); \ |
345 | intr_enable &= ~(IntrRxDone | IntrRxEmpty); \ | 303 | intr_enable &= ~(IntrRxDone | IntrRxEmpty); \ |
346 | writel(intr_enable, ioaddr + IntrEnable); \ | 304 | writel(intr_enable, ioaddr + IntrEnable); \ |
347 | } \ | 305 | } \ |
@@ -371,6 +329,7 @@ KERN_INFO " (unofficial 2.2/2.4 kernel port, version " DRV_VERSION ", " DRV_RELD | |||
371 | MODULE_AUTHOR("Donald Becker <becker@scyld.com>"); | 329 | MODULE_AUTHOR("Donald Becker <becker@scyld.com>"); |
372 | MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver"); | 330 | MODULE_DESCRIPTION("Adaptec Starfire Ethernet driver"); |
373 | MODULE_LICENSE("GPL"); | 331 | MODULE_LICENSE("GPL"); |
332 | MODULE_VERSION(DRV_VERSION); | ||
374 | 333 | ||
375 | module_param(max_interrupt_work, int, 0); | 334 | module_param(max_interrupt_work, int, 0); |
376 | module_param(mtu, int, 0); | 335 | module_param(mtu, int, 0); |
@@ -425,7 +384,7 @@ on the 32/64 bitness of the architecture), and relies on automatic | |||
425 | minimum-length padding. It does not use the completion queue | 384 | minimum-length padding. It does not use the completion queue |
426 | consumer index, but instead checks for non-zero status entries. | 385 | consumer index, but instead checks for non-zero status entries. |
427 | 386 | ||
428 | For receive this driver uses type 0/1/2/3 receive descriptors. The driver | 387 | For receive this driver uses type 2/3 receive descriptors. The driver |
429 | allocates full frame size skbuffs for the Rx ring buffers, so all frames | 388 | allocates full frame size skbuffs for the Rx ring buffers, so all frames |
430 | should fit in a single descriptor. The driver does not use the completion | 389 | should fit in a single descriptor. The driver does not use the completion |
431 | queue consumer index, but instead checks for non-zero status entries. | 390 | queue consumer index, but instead checks for non-zero status entries. |
@@ -476,7 +435,7 @@ IVc. Errata | |||
476 | 435 | ||
477 | */ | 436 | */ |
478 | 437 | ||
479 | 438 | ||
480 | 439 | ||
481 | enum chip_capability_flags {CanHaveMII=1, }; | 440 | enum chip_capability_flags {CanHaveMII=1, }; |
482 | 441 | ||
@@ -670,7 +629,6 @@ struct full_rx_done_desc { | |||
670 | u32 timestamp; | 629 | u32 timestamp; |
671 | }; | 630 | }; |
672 | /* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */ | 631 | /* XXX: this is ugly and I'm not sure it's worth the trouble -Ion */ |
673 | #ifdef HAS_FIRMWARE | ||
674 | #ifdef VLAN_SUPPORT | 632 | #ifdef VLAN_SUPPORT |
675 | typedef struct full_rx_done_desc rx_done_desc; | 633 | typedef struct full_rx_done_desc rx_done_desc; |
676 | #define RxComplType RxComplType3 | 634 | #define RxComplType RxComplType3 |
@@ -678,15 +636,6 @@ typedef struct full_rx_done_desc rx_done_desc; | |||
678 | typedef struct csum_rx_done_desc rx_done_desc; | 636 | typedef struct csum_rx_done_desc rx_done_desc; |
679 | #define RxComplType RxComplType2 | 637 | #define RxComplType RxComplType2 |
680 | #endif /* not VLAN_SUPPORT */ | 638 | #endif /* not VLAN_SUPPORT */ |
681 | #else /* not HAS_FIRMWARE */ | ||
682 | #ifdef VLAN_SUPPORT | ||
683 | typedef struct basic_rx_done_desc rx_done_desc; | ||
684 | #define RxComplType RxComplType1 | ||
685 | #else /* not VLAN_SUPPORT */ | ||
686 | typedef struct short_rx_done_desc rx_done_desc; | ||
687 | #define RxComplType RxComplType0 | ||
688 | #endif /* not VLAN_SUPPORT */ | ||
689 | #endif /* not HAS_FIRMWARE */ | ||
690 | 639 | ||
691 | enum rx_done_bits { | 640 | enum rx_done_bits { |
692 | RxOK=0x20000000, RxFIFOErr=0x10000000, RxBufQ2=0x08000000, | 641 | RxOK=0x20000000, RxFIFOErr=0x10000000, RxBufQ2=0x08000000, |
@@ -898,13 +847,10 @@ static int __devinit starfire_init_one(struct pci_dev *pdev, | |||
898 | /* enable MWI -- it vastly improves Rx performance on sparc64 */ | 847 | /* enable MWI -- it vastly improves Rx performance on sparc64 */ |
899 | pci_set_mwi(pdev); | 848 | pci_set_mwi(pdev); |
900 | 849 | ||
901 | #ifdef MAX_SKB_FRAGS | ||
902 | dev->features |= NETIF_F_SG; | ||
903 | #endif /* MAX_SKB_FRAGS */ | ||
904 | #ifdef ZEROCOPY | 850 | #ifdef ZEROCOPY |
905 | /* Starfire can do TCP/UDP checksumming */ | 851 | /* Starfire can do TCP/UDP checksumming */ |
906 | if (enable_hw_cksum) | 852 | if (enable_hw_cksum) |
907 | dev->features |= NETIF_F_IP_CSUM; | 853 | dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; |
908 | #endif /* ZEROCOPY */ | 854 | #endif /* ZEROCOPY */ |
909 | #ifdef VLAN_SUPPORT | 855 | #ifdef VLAN_SUPPORT |
910 | dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; | 856 | dev->features |= NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER; |
@@ -1008,7 +954,8 @@ static int __devinit starfire_init_one(struct pci_dev *pdev, | |||
1008 | /* The chip-specific entries in the device structure. */ | 954 | /* The chip-specific entries in the device structure. */ |
1009 | dev->open = &netdev_open; | 955 | dev->open = &netdev_open; |
1010 | dev->hard_start_xmit = &start_tx; | 956 | dev->hard_start_xmit = &start_tx; |
1011 | init_tx_timer(dev, tx_timeout, TX_TIMEOUT); | 957 | dev->tx_timeout = tx_timeout; |
958 | dev->watchdog_timeo = TX_TIMEOUT; | ||
1012 | init_poll(dev); | 959 | init_poll(dev); |
1013 | dev->stop = &netdev_close; | 960 | dev->stop = &netdev_close; |
1014 | dev->get_stats = &get_stats; | 961 | dev->get_stats = &get_stats; |
@@ -1039,7 +986,7 @@ static int __devinit starfire_init_one(struct pci_dev *pdev, | |||
1039 | if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0) | 986 | if ((mdio_read(dev, phy, MII_BMCR) & BMCR_RESET) == 0) |
1040 | break; | 987 | break; |
1041 | if (boguscnt == 0) { | 988 | if (boguscnt == 0) { |
1042 | printk("%s: PHY reset never completed!\n", dev->name); | 989 | printk("%s: PHY#%d reset never completed!\n", dev->name, phy); |
1043 | continue; | 990 | continue; |
1044 | } | 991 | } |
1045 | mii_status = mdio_read(dev, phy, MII_BMSR); | 992 | mii_status = mdio_read(dev, phy, MII_BMSR); |
@@ -1110,6 +1057,7 @@ static int netdev_open(struct net_device *dev) | |||
1110 | size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size; | 1057 | size_t tx_done_q_size, rx_done_q_size, tx_ring_size, rx_ring_size; |
1111 | 1058 | ||
1112 | /* Do we ever need to reset the chip??? */ | 1059 | /* Do we ever need to reset the chip??? */ |
1060 | |||
1113 | retval = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev); | 1061 | retval = request_irq(dev->irq, &intr_handler, SA_SHIRQ, dev->name, dev); |
1114 | if (retval) | 1062 | if (retval) |
1115 | return retval; | 1063 | return retval; |
@@ -1211,7 +1159,6 @@ static int netdev_open(struct net_device *dev) | |||
1211 | 1159 | ||
1212 | writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl); | 1160 | writel(np->intr_timer_ctrl, ioaddr + IntrTimerCtrl); |
1213 | 1161 | ||
1214 | netif_start_if(dev); | ||
1215 | netif_start_queue(dev); | 1162 | netif_start_queue(dev); |
1216 | 1163 | ||
1217 | if (debug > 1) | 1164 | if (debug > 1) |
@@ -1238,13 +1185,11 @@ static int netdev_open(struct net_device *dev) | |||
1238 | writel(ETH_P_8021Q, ioaddr + VlanType); | 1185 | writel(ETH_P_8021Q, ioaddr + VlanType); |
1239 | #endif /* VLAN_SUPPORT */ | 1186 | #endif /* VLAN_SUPPORT */ |
1240 | 1187 | ||
1241 | #ifdef HAS_FIRMWARE | ||
1242 | /* Load Rx/Tx firmware into the frame processors */ | 1188 | /* Load Rx/Tx firmware into the frame processors */ |
1243 | for (i = 0; i < FIRMWARE_RX_SIZE * 2; i++) | 1189 | for (i = 0; i < FIRMWARE_RX_SIZE * 2; i++) |
1244 | writel(firmware_rx[i], ioaddr + RxGfpMem + i * 4); | 1190 | writel(firmware_rx[i], ioaddr + RxGfpMem + i * 4); |
1245 | for (i = 0; i < FIRMWARE_TX_SIZE * 2; i++) | 1191 | for (i = 0; i < FIRMWARE_TX_SIZE * 2; i++) |
1246 | writel(firmware_tx[i], ioaddr + TxGfpMem + i * 4); | 1192 | writel(firmware_tx[i], ioaddr + TxGfpMem + i * 4); |
1247 | #endif /* HAS_FIRMWARE */ | ||
1248 | if (enable_hw_cksum) | 1193 | if (enable_hw_cksum) |
1249 | /* Enable the Rx and Tx units, and the Rx/Tx frame processors. */ | 1194 | /* Enable the Rx and Tx units, and the Rx/Tx frame processors. */ |
1250 | writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl); | 1195 | writel(TxEnable|TxGFPEnable|RxEnable|RxGFPEnable, ioaddr + GenCtrl); |
@@ -1341,7 +1286,7 @@ static void init_ring(struct net_device *dev) | |||
1341 | np->rx_info[i].skb = skb; | 1286 | np->rx_info[i].skb = skb; |
1342 | if (skb == NULL) | 1287 | if (skb == NULL) |
1343 | break; | 1288 | break; |
1344 | np->rx_info[i].mapping = pci_map_single(np->pci_dev, skb->tail, np->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1289 | np->rx_info[i].mapping = pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1345 | skb->dev = dev; /* Mark as being used by this device. */ | 1290 | skb->dev = dev; /* Mark as being used by this device. */ |
1346 | /* Grrr, we cannot offset to correctly align the IP header. */ | 1291 | /* Grrr, we cannot offset to correctly align the IP header. */ |
1347 | np->rx_ring[i].rxaddr = cpu_to_dma(np->rx_info[i].mapping | RxDescValid); | 1292 | np->rx_ring[i].rxaddr = cpu_to_dma(np->rx_info[i].mapping | RxDescValid); |
@@ -1378,8 +1323,6 @@ static int start_tx(struct sk_buff *skb, struct net_device *dev) | |||
1378 | u32 status; | 1323 | u32 status; |
1379 | int i; | 1324 | int i; |
1380 | 1325 | ||
1381 | kick_tx_timer(dev, tx_timeout, TX_TIMEOUT); | ||
1382 | |||
1383 | /* | 1326 | /* |
1384 | * be cautious here, wrapping the queue has weird semantics | 1327 | * be cautious here, wrapping the queue has weird semantics |
1385 | * and we may not have enough slots even when it seems we do. | 1328 | * and we may not have enough slots even when it seems we do. |
@@ -1404,7 +1347,7 @@ static int start_tx(struct sk_buff *skb, struct net_device *dev) | |||
1404 | } | 1347 | } |
1405 | 1348 | ||
1406 | if (has_bad_length) | 1349 | if (has_bad_length) |
1407 | skb_checksum_help(skb); | 1350 | skb_checksum_help(skb, 0); |
1408 | } | 1351 | } |
1409 | #endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */ | 1352 | #endif /* ZEROCOPY && HAS_BROKEN_FIRMWARE */ |
1410 | 1353 | ||
@@ -1433,12 +1376,10 @@ static int start_tx(struct sk_buff *skb, struct net_device *dev) | |||
1433 | np->tx_info[entry].mapping = | 1376 | np->tx_info[entry].mapping = |
1434 | pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE); | 1377 | pci_map_single(np->pci_dev, skb->data, skb_first_frag_len(skb), PCI_DMA_TODEVICE); |
1435 | } else { | 1378 | } else { |
1436 | #ifdef MAX_SKB_FRAGS | ||
1437 | skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1]; | 1379 | skb_frag_t *this_frag = &skb_shinfo(skb)->frags[i - 1]; |
1438 | status |= this_frag->size; | 1380 | status |= this_frag->size; |
1439 | np->tx_info[entry].mapping = | 1381 | np->tx_info[entry].mapping = |
1440 | pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE); | 1382 | pci_map_single(np->pci_dev, page_address(this_frag->page) + this_frag->page_offset, this_frag->size, PCI_DMA_TODEVICE); |
1441 | #endif /* MAX_SKB_FRAGS */ | ||
1442 | } | 1383 | } |
1443 | 1384 | ||
1444 | np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping); | 1385 | np->tx_ring[entry].addr = cpu_to_dma(np->tx_info[entry].mapping); |
@@ -1531,7 +1472,6 @@ static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs | |||
1531 | np->tx_info[entry].mapping = 0; | 1472 | np->tx_info[entry].mapping = 0; |
1532 | np->dirty_tx += np->tx_info[entry].used_slots; | 1473 | np->dirty_tx += np->tx_info[entry].used_slots; |
1533 | entry = (entry + np->tx_info[entry].used_slots) % TX_RING_SIZE; | 1474 | entry = (entry + np->tx_info[entry].used_slots) % TX_RING_SIZE; |
1534 | #ifdef MAX_SKB_FRAGS | ||
1535 | { | 1475 | { |
1536 | int i; | 1476 | int i; |
1537 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { | 1477 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
@@ -1543,7 +1483,7 @@ static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs | |||
1543 | entry++; | 1483 | entry++; |
1544 | } | 1484 | } |
1545 | } | 1485 | } |
1546 | #endif /* MAX_SKB_FRAGS */ | 1486 | |
1547 | dev_kfree_skb_irq(skb); | 1487 | dev_kfree_skb_irq(skb); |
1548 | } | 1488 | } |
1549 | np->tx_done_q[np->tx_done].status = 0; | 1489 | np->tx_done_q[np->tx_done].status = 0; |
@@ -1603,7 +1543,7 @@ static int __netdev_rx(struct net_device *dev, int *quota) | |||
1603 | if (debug > 4) | 1543 | if (debug > 4) |
1604 | printk(KERN_DEBUG " netdev_rx() status of %d was %#8.8x.\n", np->rx_done, desc_status); | 1544 | printk(KERN_DEBUG " netdev_rx() status of %d was %#8.8x.\n", np->rx_done, desc_status); |
1605 | if (!(desc_status & RxOK)) { | 1545 | if (!(desc_status & RxOK)) { |
1606 | /* There was a error. */ | 1546 | /* There was an error. */ |
1607 | if (debug > 2) | 1547 | if (debug > 2) |
1608 | printk(KERN_DEBUG " netdev_rx() Rx error was %#8.8x.\n", desc_status); | 1548 | printk(KERN_DEBUG " netdev_rx() Rx error was %#8.8x.\n", desc_status); |
1609 | np->stats.rx_errors++; | 1549 | np->stats.rx_errors++; |
@@ -1632,7 +1572,7 @@ static int __netdev_rx(struct net_device *dev, int *quota) | |||
1632 | pci_dma_sync_single_for_cpu(np->pci_dev, | 1572 | pci_dma_sync_single_for_cpu(np->pci_dev, |
1633 | np->rx_info[entry].mapping, | 1573 | np->rx_info[entry].mapping, |
1634 | pkt_len, PCI_DMA_FROMDEVICE); | 1574 | pkt_len, PCI_DMA_FROMDEVICE); |
1635 | eth_copy_and_sum(skb, np->rx_info[entry].skb->tail, pkt_len, 0); | 1575 | eth_copy_and_sum(skb, np->rx_info[entry].skb->data, pkt_len, 0); |
1636 | pci_dma_sync_single_for_device(np->pci_dev, | 1576 | pci_dma_sync_single_for_device(np->pci_dev, |
1637 | np->rx_info[entry].mapping, | 1577 | np->rx_info[entry].mapping, |
1638 | pkt_len, PCI_DMA_FROMDEVICE); | 1578 | pkt_len, PCI_DMA_FROMDEVICE); |
@@ -1656,11 +1596,10 @@ static int __netdev_rx(struct net_device *dev, int *quota) | |||
1656 | #endif | 1596 | #endif |
1657 | 1597 | ||
1658 | skb->protocol = eth_type_trans(skb, dev); | 1598 | skb->protocol = eth_type_trans(skb, dev); |
1659 | #if defined(HAS_FIRMWARE) || defined(VLAN_SUPPORT) | 1599 | #ifdef VLAN_SUPPORT |
1660 | if (debug > 4) | 1600 | if (debug > 4) |
1661 | printk(KERN_DEBUG " netdev_rx() status2 of %d was %#4.4x.\n", np->rx_done, le16_to_cpu(desc->status2)); | 1601 | printk(KERN_DEBUG " netdev_rx() status2 of %d was %#4.4x.\n", np->rx_done, le16_to_cpu(desc->status2)); |
1662 | #endif | 1602 | #endif |
1663 | #ifdef HAS_FIRMWARE | ||
1664 | if (le16_to_cpu(desc->status2) & 0x0100) { | 1603 | if (le16_to_cpu(desc->status2) & 0x0100) { |
1665 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 1604 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
1666 | np->stats.rx_compressed++; | 1605 | np->stats.rx_compressed++; |
@@ -1679,7 +1618,6 @@ static int __netdev_rx(struct net_device *dev, int *quota) | |||
1679 | skb->csum = le16_to_cpu(desc->csum); | 1618 | skb->csum = le16_to_cpu(desc->csum); |
1680 | printk(KERN_DEBUG "%s: checksum_hw, status2 = %#x\n", dev->name, le16_to_cpu(desc->status2)); | 1619 | printk(KERN_DEBUG "%s: checksum_hw, status2 = %#x\n", dev->name, le16_to_cpu(desc->status2)); |
1681 | } | 1620 | } |
1682 | #endif /* HAS_FIRMWARE */ | ||
1683 | #ifdef VLAN_SUPPORT | 1621 | #ifdef VLAN_SUPPORT |
1684 | if (np->vlgrp && le16_to_cpu(desc->status2) & 0x0200) { | 1622 | if (np->vlgrp && le16_to_cpu(desc->status2) & 0x0200) { |
1685 | if (debug > 4) | 1623 | if (debug > 4) |
@@ -1758,7 +1696,7 @@ static void refill_rx_ring(struct net_device *dev) | |||
1758 | if (skb == NULL) | 1696 | if (skb == NULL) |
1759 | break; /* Better luck next round. */ | 1697 | break; /* Better luck next round. */ |
1760 | np->rx_info[entry].mapping = | 1698 | np->rx_info[entry].mapping = |
1761 | pci_map_single(np->pci_dev, skb->tail, np->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1699 | pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1762 | skb->dev = dev; /* Mark as being used by this device. */ | 1700 | skb->dev = dev; /* Mark as being used by this device. */ |
1763 | np->rx_ring[entry].rxaddr = | 1701 | np->rx_ring[entry].rxaddr = |
1764 | cpu_to_dma(np->rx_info[entry].mapping | RxDescValid); | 1702 | cpu_to_dma(np->rx_info[entry].mapping | RxDescValid); |
@@ -1900,9 +1838,6 @@ static struct net_device_stats *get_stats(struct net_device *dev) | |||
1900 | } | 1838 | } |
1901 | 1839 | ||
1902 | 1840 | ||
1903 | /* Chips may use the upper or lower CRC bits, and may reverse and/or invert | ||
1904 | them. Select the endian-ness that results in minimal calculations. | ||
1905 | */ | ||
1906 | static void set_rx_mode(struct net_device *dev) | 1841 | static void set_rx_mode(struct net_device *dev) |
1907 | { | 1842 | { |
1908 | struct netdev_private *np = netdev_priv(dev); | 1843 | struct netdev_private *np = netdev_priv(dev); |
@@ -1969,6 +1904,8 @@ static void set_rx_mode(struct net_device *dev) | |||
1969 | memset(mc_filter, 0, sizeof(mc_filter)); | 1904 | memset(mc_filter, 0, sizeof(mc_filter)); |
1970 | for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; | 1905 | for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; |
1971 | i++, mclist = mclist->next) { | 1906 | i++, mclist = mclist->next) { |
1907 | /* The chip uses the upper 9 CRC bits | ||
1908 | as index into the hash table */ | ||
1972 | int bit_nr = ether_crc_le(ETH_ALEN, mclist->dmi_addr) >> 23; | 1909 | int bit_nr = ether_crc_le(ETH_ALEN, mclist->dmi_addr) >> 23; |
1973 | __u32 *fptr = (__u32 *) &mc_filter[(bit_nr >> 4) & ~1]; | 1910 | __u32 *fptr = (__u32 *) &mc_filter[(bit_nr >> 4) & ~1]; |
1974 | 1911 | ||
@@ -2001,7 +1938,7 @@ static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |||
2001 | struct netdev_private *np = netdev_priv(dev); | 1938 | struct netdev_private *np = netdev_priv(dev); |
2002 | strcpy(info->driver, DRV_NAME); | 1939 | strcpy(info->driver, DRV_NAME); |
2003 | strcpy(info->version, DRV_VERSION); | 1940 | strcpy(info->version, DRV_VERSION); |
2004 | strcpy(info->bus_info, PCI_SLOT_NAME(np->pci_dev)); | 1941 | strcpy(info->bus_info, pci_name(np->pci_dev)); |
2005 | } | 1942 | } |
2006 | 1943 | ||
2007 | static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) | 1944 | static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) |
@@ -2083,7 +2020,6 @@ static int netdev_close(struct net_device *dev) | |||
2083 | int i; | 2020 | int i; |
2084 | 2021 | ||
2085 | netif_stop_queue(dev); | 2022 | netif_stop_queue(dev); |
2086 | netif_stop_if(dev); | ||
2087 | 2023 | ||
2088 | if (debug > 1) { | 2024 | if (debug > 1) { |
2089 | printk(KERN_DEBUG "%s: Shutting down ethercard, Intr status %#8.8x.\n", | 2025 | printk(KERN_DEBUG "%s: Shutting down ethercard, Intr status %#8.8x.\n", |
@@ -2184,7 +2120,13 @@ static int __init starfire_init (void) | |||
2184 | /* when a module, this is printed whether or not devices are found in probe */ | 2120 | /* when a module, this is printed whether or not devices are found in probe */ |
2185 | #ifdef MODULE | 2121 | #ifdef MODULE |
2186 | printk(version); | 2122 | printk(version); |
2123 | #ifdef HAVE_NETDEV_POLL | ||
2124 | printk(KERN_INFO DRV_NAME ": polling (NAPI) enabled\n"); | ||
2125 | #else | ||
2126 | printk(KERN_INFO DRV_NAME ": polling (NAPI) disabled\n"); | ||
2187 | #endif | 2127 | #endif |
2128 | #endif | ||
2129 | |||
2188 | #ifndef ADDR_64BITS | 2130 | #ifndef ADDR_64BITS |
2189 | /* we can do this test only at run-time... sigh */ | 2131 | /* we can do this test only at run-time... sigh */ |
2190 | if (sizeof(dma_addr_t) == sizeof(u64)) { | 2132 | if (sizeof(dma_addr_t) == sizeof(u64)) { |
@@ -2192,10 +2134,6 @@ static int __init starfire_init (void) | |||
2192 | return -ENODEV; | 2134 | return -ENODEV; |
2193 | } | 2135 | } |
2194 | #endif /* not ADDR_64BITS */ | 2136 | #endif /* not ADDR_64BITS */ |
2195 | #ifndef HAS_FIRMWARE | ||
2196 | /* unconditionally disable hw cksums if firmware is not present */ | ||
2197 | enable_hw_cksum = 0; | ||
2198 | #endif /* not HAS_FIRMWARE */ | ||
2199 | return pci_module_init (&starfire_driver); | 2137 | return pci_module_init (&starfire_driver); |
2200 | } | 2138 | } |
2201 | 2139 | ||
diff --git a/drivers/net/starfire_firmware.h b/drivers/net/starfire_firmware.h new file mode 100644 index 000000000000..0a668528955d --- /dev/null +++ b/drivers/net/starfire_firmware.h | |||
@@ -0,0 +1,346 @@ | |||
1 | /* | ||
2 | * Copyright 2003 Adaptec, Inc. | ||
3 | * | ||
4 | * Please read the following license before using the Adaptec Software | ||
5 | * ("Program"). If you do not agree to the license terms, do not use the | ||
6 | * Program: | ||
7 | * | ||
8 | * You agree to be bound by version 2 of the General Public License ("GPL") | ||
9 | * dated June 1991, which can be found at http://www.fsf.org/licenses/gpl.html. | ||
10 | * If the link is broken, write to Free Software Foundation, 59 Temple Place, | ||
11 | * Boston, Massachusetts 02111-1307. | ||
12 | * | ||
13 | * BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE IT IS LICENSED "AS IS" AND | ||
14 | * THERE IS NO WARRANTY FOR THE PROGRAM, INCLUDING BUT NOT LIMITED TO THE | ||
15 | * IMPLIED WARRANTIES OF MERCHANTIBILITY OR FITNESS FOR A PARTICULAR PURPOSE | ||
16 | * (TO THE EXTENT PERMITTED BY APPLICABLE LAW). USE OF THE PROGRAM IS AT YOUR | ||
17 | * OWN RISK. IN NO EVENT WILL ADAPTEC OR ITS LICENSORS BE LIABLE TO YOU FOR | ||
18 | * DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES | ||
19 | * ARISING OUT OF THE USE OR INABILITY TO USE THE PROGRAM. | ||
20 | * | ||
21 | */ | ||
22 | |||
23 | static const u32 firmware_rx[] = { | ||
24 | 0x010003dc, 0x00000000, | ||
25 | 0x04000421, 0x00000086, | ||
26 | 0x80000015, 0x0000180e, | ||
27 | 0x81000015, 0x00006664, | ||
28 | 0x1a0040ab, 0x00000b06, | ||
29 | 0x14200011, 0x00000000, | ||
30 | 0x14204022, 0x0000aaaa, | ||
31 | 0x14204022, 0x00000300, | ||
32 | 0x14204022, 0x00000000, | ||
33 | 0x1a0040ab, 0x00000b14, | ||
34 | 0x14200011, 0x00000000, | ||
35 | 0x83000015, 0x00000002, | ||
36 | 0x04000021, 0x00000000, | ||
37 | 0x00000010, 0x00000000, | ||
38 | 0x04000421, 0x00000087, | ||
39 | 0x00000010, 0x00000000, | ||
40 | 0x00000010, 0x00000000, | ||
41 | 0x00008015, 0x00000000, | ||
42 | 0x0000003e, 0x00000000, | ||
43 | 0x00000010, 0x00000000, | ||
44 | 0x82000015, 0x00004000, | ||
45 | 0x009e8050, 0x00000000, | ||
46 | 0x03008015, 0x00000000, | ||
47 | 0x86008015, 0x00000000, | ||
48 | 0x82000015, 0x00008000, | ||
49 | 0x0100001c, 0x00000000, | ||
50 | 0x000050a0, 0x0000010c, | ||
51 | 0x4e20d011, 0x00006008, | ||
52 | 0x1420d012, 0x00004008, | ||
53 | 0x0000f090, 0x00007000, | ||
54 | 0x0000c8b0, 0x00003000, | ||
55 | 0x00004040, 0x00000000, | ||
56 | 0x00108015, 0x00000000, | ||
57 | 0x00a2c150, 0x00004000, | ||
58 | 0x00a400b0, 0x00000014, | ||
59 | 0x00000020, 0x00000000, | ||
60 | 0x2500400d, 0x00002525, | ||
61 | 0x00047220, 0x00003100, | ||
62 | 0x00934070, 0x00000000, | ||
63 | 0x00000020, 0x00000000, | ||
64 | 0x00924460, 0x00000184, | ||
65 | 0x2b20c011, 0x00000000, | ||
66 | 0x0000c420, 0x00000540, | ||
67 | 0x36014018, 0x0000422d, | ||
68 | 0x14200011, 0x00000000, | ||
69 | 0x00924460, 0x00000183, | ||
70 | 0x3200001f, 0x00000034, | ||
71 | 0x02ac0015, 0x00000002, | ||
72 | 0x00a60110, 0x00000008, | ||
73 | 0x42200011, 0x00000000, | ||
74 | 0x00924060, 0x00000103, | ||
75 | 0x0000001e, 0x00000000, | ||
76 | 0x00000020, 0x00000100, | ||
77 | 0x0000001e, 0x00000000, | ||
78 | 0x00924460, 0x00000086, | ||
79 | 0x00004080, 0x00000000, | ||
80 | 0x0092c070, 0x00000000, | ||
81 | 0x00924060, 0x00000100, | ||
82 | 0x0000c890, 0x00005000, | ||
83 | 0x00a6c110, 0x00000000, | ||
84 | 0x00b0c090, 0x00000012, | ||
85 | 0x021c0015, 0x00000000, | ||
86 | 0x3200001f, 0x00000034, | ||
87 | 0x00924460, 0x00000510, | ||
88 | 0x44210011, 0x00000000, | ||
89 | 0x42000011, 0x00000000, | ||
90 | 0x83000015, 0x00000040, | ||
91 | 0x00924460, 0x00000508, | ||
92 | 0x45014018, 0x00004545, | ||
93 | 0x00808050, 0x00000000, | ||
94 | 0x62208012, 0x00000000, | ||
95 | 0x82000015, 0x00000800, | ||
96 | 0x15200011, 0x00000000, | ||
97 | 0x00000010, 0x00000000, | ||
98 | 0x00000010, 0x00000000, | ||
99 | 0x00000010, 0x00000000, | ||
100 | 0x00000010, 0x00000000, | ||
101 | 0x00000010, 0x00000000, | ||
102 | 0x80000015, 0x0000eea4, | ||
103 | 0x81000015, 0x0000005f, | ||
104 | 0x00000060, 0x00000000, | ||
105 | 0x00004120, 0x00000000, | ||
106 | 0x00004a00, 0x00004000, | ||
107 | 0x00924460, 0x00000190, | ||
108 | 0x5601401a, 0x00005956, | ||
109 | 0x14000011, 0x00000000, | ||
110 | 0x00934050, 0x00000018, | ||
111 | 0x00930050, 0x00000018, | ||
112 | 0x3601403a, 0x0000002d, | ||
113 | 0x000643a9, 0x00000000, | ||
114 | 0x0000c420, 0x00000140, | ||
115 | 0x5601401a, 0x00005956, | ||
116 | 0x14000011, 0x00000000, | ||
117 | 0x00000010, 0x00000000, | ||
118 | 0x00000010, 0x00000000, | ||
119 | 0x000642a9, 0x00000000, | ||
120 | 0x00024420, 0x00000183, | ||
121 | 0x5601401a, 0x00005956, | ||
122 | 0x82000015, 0x00002000, | ||
123 | 0x15200011, 0x00000000, | ||
124 | 0x82000015, 0x00000010, | ||
125 | 0x15200011, 0x00000000, | ||
126 | 0x82000015, 0x00000010, | ||
127 | 0x15200011, 0x00000000, | ||
128 | }; /* 104 Rx instructions */ | ||
129 | #define FIRMWARE_RX_SIZE 104 | ||
130 | |||
131 | static const u32 firmware_tx[] = { | ||
132 | 0x010003dc, 0x00000000, | ||
133 | 0x04000421, 0x00000086, | ||
134 | 0x80000015, 0x0000180e, | ||
135 | 0x81000015, 0x00006664, | ||
136 | 0x1a0040ab, 0x00000b06, | ||
137 | 0x14200011, 0x00000000, | ||
138 | 0x14204022, 0x0000aaaa, | ||
139 | 0x14204022, 0x00000300, | ||
140 | 0x14204022, 0x00000000, | ||
141 | 0x1a0040ab, 0x00000b14, | ||
142 | 0x14200011, 0x00000000, | ||
143 | 0x83000015, 0x00000002, | ||
144 | 0x04000021, 0x00000000, | ||
145 | 0x00000010, 0x00000000, | ||
146 | 0x04000421, 0x00000087, | ||
147 | 0x00000010, 0x00000000, | ||
148 | 0x00000010, 0x00000000, | ||
149 | 0x00008015, 0x00000000, | ||
150 | 0x0000003e, 0x00000000, | ||
151 | 0x00000010, 0x00000000, | ||
152 | 0x82000015, 0x00004000, | ||
153 | 0x009e8050, 0x00000000, | ||
154 | 0x03008015, 0x00000000, | ||
155 | 0x86008015, 0x00000000, | ||
156 | 0x82000015, 0x00008000, | ||
157 | 0x0100001c, 0x00000000, | ||
158 | 0x000050a0, 0x0000010c, | ||
159 | 0x4e20d011, 0x00006008, | ||
160 | 0x1420d012, 0x00004008, | ||
161 | 0x0000f090, 0x00007000, | ||
162 | 0x0000c8b0, 0x00003000, | ||
163 | 0x00004040, 0x00000000, | ||
164 | 0x00108015, 0x00000000, | ||
165 | 0x00a2c150, 0x00004000, | ||
166 | 0x00a400b0, 0x00000014, | ||
167 | 0x00000020, 0x00000000, | ||
168 | 0x2500400d, 0x00002525, | ||
169 | 0x00047220, 0x00003100, | ||
170 | 0x00934070, 0x00000000, | ||
171 | 0x00000020, 0x00000000, | ||
172 | 0x00924460, 0x00000184, | ||
173 | 0x2b20c011, 0x00000000, | ||
174 | 0x0000c420, 0x00000540, | ||
175 | 0x36014018, 0x0000422d, | ||
176 | 0x14200011, 0x00000000, | ||
177 | 0x00924460, 0x00000183, | ||
178 | 0x3200001f, 0x00000034, | ||
179 | 0x02ac0015, 0x00000002, | ||
180 | 0x00a60110, 0x00000008, | ||
181 | 0x42200011, 0x00000000, | ||
182 | 0x00924060, 0x00000103, | ||
183 | 0x0000001e, 0x00000000, | ||
184 | 0x00000020, 0x00000100, | ||
185 | 0x0000001e, 0x00000000, | ||
186 | 0x00924460, 0x00000086, | ||
187 | 0x00004080, 0x00000000, | ||
188 | 0x0092c070, 0x00000000, | ||
189 | 0x00924060, 0x00000100, | ||
190 | 0x0000c890, 0x00005000, | ||
191 | 0x00a6c110, 0x00000000, | ||
192 | 0x00b0c090, 0x00000012, | ||
193 | 0x021c0015, 0x00000000, | ||
194 | 0x3200001f, 0x00000034, | ||
195 | 0x00924460, 0x00000510, | ||
196 | 0x44210011, 0x00000000, | ||
197 | 0x42000011, 0x00000000, | ||
198 | 0x83000015, 0x00000040, | ||
199 | 0x00924460, 0x00000508, | ||
200 | 0x45014018, 0x00004545, | ||
201 | 0x00808050, 0x00000000, | ||
202 | 0x62208012, 0x00000000, | ||
203 | 0x82000015, 0x00000800, | ||
204 | 0x15200011, 0x00000000, | ||
205 | 0x00000010, 0x00000000, | ||
206 | 0x00000010, 0x00000000, | ||
207 | 0x00000010, 0x00000000, | ||
208 | 0x00000010, 0x00000000, | ||
209 | 0x00000010, 0x00000000, | ||
210 | 0x80000015, 0x0000eea4, | ||
211 | 0x81000015, 0x0000005f, | ||
212 | 0x00000060, 0x00000000, | ||
213 | 0x00004120, 0x00000000, | ||
214 | 0x00004a00, 0x00004000, | ||
215 | 0x00924460, 0x00000190, | ||
216 | 0x5601401a, 0x00005956, | ||
217 | 0x14000011, 0x00000000, | ||
218 | 0x00934050, 0x00000018, | ||
219 | 0x00930050, 0x00000018, | ||
220 | 0x3601403a, 0x0000002d, | ||
221 | 0x000643a9, 0x00000000, | ||
222 | 0x0000c420, 0x00000140, | ||
223 | 0x5601401a, 0x00005956, | ||
224 | 0x14000011, 0x00000000, | ||
225 | 0x00000010, 0x00000000, | ||
226 | 0x00000010, 0x00000000, | ||
227 | 0x000642a9, 0x00000000, | ||
228 | 0x00024420, 0x00000183, | ||
229 | 0x5601401a, 0x00005956, | ||
230 | 0x82000015, 0x00002000, | ||
231 | 0x15200011, 0x00000000, | ||
232 | 0x82000015, 0x00000010, | ||
233 | 0x15200011, 0x00000000, | ||
234 | 0x82000015, 0x00000010, | ||
235 | 0x15200011, 0x00000000, | ||
236 | }; /* 104 Tx instructions */ | ||
237 | #define FIRMWARE_TX_SIZE 104 | ||
238 | #if 0 | ||
239 | static const u32 firmware_wol[] = { | ||
240 | 0x010003dc, 0x00000000, | ||
241 | 0x19000421, 0x00000087, | ||
242 | 0x80000015, 0x00001a1a, | ||
243 | 0x81000015, 0x00001a1a, | ||
244 | 0x1a0040ab, 0x00000b06, | ||
245 | 0x15200011, 0x00000000, | ||
246 | 0x15204022, 0x0000aaaa, | ||
247 | 0x15204022, 0x00000300, | ||
248 | 0x15204022, 0x00000000, | ||
249 | 0x1a0040ab, 0x00000b15, | ||
250 | 0x15200011, 0x00000000, | ||
251 | 0x83000015, 0x00000002, | ||
252 | 0x04000021, 0x00000000, | ||
253 | 0x00000010, 0x00000000, | ||
254 | 0x04000421, 0x00000087, | ||
255 | 0x00000010, 0x00000000, | ||
256 | 0x00000010, 0x00000000, | ||
257 | 0x00008015, 0x00000000, | ||
258 | 0x0000003e, 0x00000000, | ||
259 | 0x00000010, 0x00000000, | ||
260 | 0x00000010, 0x00000000, | ||
261 | 0x82000015, 0x00004000, | ||
262 | 0x82000015, 0x00008000, | ||
263 | 0x0000000c, 0x00000000, | ||
264 | 0x00000010, 0x00000000, | ||
265 | 0x00004080, 0x00000100, | ||
266 | 0x1f20c011, 0x00001122, | ||
267 | 0x2720f011, 0x00003011, | ||
268 | 0x19200071, 0x00000000, | ||
269 | 0x1a200051, 0x00000000, | ||
270 | 0x00000010, 0x00000000, | ||
271 | 0x00000010, 0x00000000, | ||
272 | 0x1d2040a4, 0x00003344, | ||
273 | 0x1d2040a2, 0x00005566, | ||
274 | 0x000040a0, 0x00000100, | ||
275 | 0x00108050, 0x00000001, | ||
276 | 0x1a208012, 0x00000006, | ||
277 | 0x82000015, 0x00008080, | ||
278 | 0x010003dc, 0x00000000, | ||
279 | 0x1d2040a4, 0x00002233, | ||
280 | 0x1d2040a4, 0x00004455, | ||
281 | 0x2d208011, 0x00000005, | ||
282 | 0x1d2040a4, 0x00006611, | ||
283 | 0x00108050, 0x00000001, | ||
284 | 0x27200011, 0x00000000, | ||
285 | 0x1d2050a4, 0x00006600, | ||
286 | 0x82000015, 0x00008080, | ||
287 | 0x010003dc, 0x00000000, | ||
288 | 0x00000050, 0x00000000, | ||
289 | 0x1b200031, 0x00000000, | ||
290 | 0x0000001e, 0x00000000, | ||
291 | 0x0000001e, 0x00000000, | ||
292 | 0x0000001e, 0x00000000, | ||
293 | 0x0000001e, 0x00000000, | ||
294 | 0x00924460, 0x00000086, | ||
295 | 0x00004080, 0x00000000, | ||
296 | 0x0092c070, 0x00000000, | ||
297 | 0x00924060, 0x00000100, | ||
298 | 0x0000c890, 0x00005000, | ||
299 | 0x00a6c110, 0x00000000, | ||
300 | 0x00b0c090, 0x00000012, | ||
301 | 0x021c0015, 0x00000000, | ||
302 | 0x3200001f, 0x00000034, | ||
303 | 0x00924460, 0x00000510, | ||
304 | 0x44210011, 0x00000000, | ||
305 | 0x42000011, 0x00000000, | ||
306 | 0x83000015, 0x00000040, | ||
307 | 0x00924460, 0x00000508, | ||
308 | 0x476a0012, 0x00000100, | ||
309 | 0x83000015, 0x00000008, | ||
310 | 0x16200011, 0x00000000, | ||
311 | 0x001e8050, 0x00000000, | ||
312 | 0x001e8050, 0x00000000, | ||
313 | 0x00808050, 0x00000000, | ||
314 | 0x03008015, 0x00000000, | ||
315 | 0x62208012, 0x00000000, | ||
316 | 0x82000015, 0x00000800, | ||
317 | 0x16200011, 0x00000000, | ||
318 | 0x80000015, 0x0000eea4, | ||
319 | 0x81000015, 0x0000005f, | ||
320 | 0x00000020, 0x00000000, | ||
321 | 0x00004120, 0x00000000, | ||
322 | 0x00004a00, 0x00004000, | ||
323 | 0x00924460, 0x00000190, | ||
324 | 0x5c01401a, 0x0000595c, | ||
325 | 0x15000011, 0x00000000, | ||
326 | 0x00934050, 0x00000018, | ||
327 | 0x00930050, 0x00000018, | ||
328 | 0x3601403a, 0x0000002d, | ||
329 | 0x00064029, 0x00000000, | ||
330 | 0x0000c420, 0x00000140, | ||
331 | 0x5c01401a, 0x0000595c, | ||
332 | 0x15000011, 0x00000000, | ||
333 | 0x00000010, 0x00000000, | ||
334 | 0x00000010, 0x00000000, | ||
335 | 0x00064029, 0x00000000, | ||
336 | 0x00024420, 0x00000183, | ||
337 | 0x5c01401a, 0x0000595c, | ||
338 | 0x82000015, 0x00002000, | ||
339 | 0x16200011, 0x00000000, | ||
340 | 0x82000015, 0x00000010, | ||
341 | 0x16200011, 0x00000000, | ||
342 | 0x82000015, 0x00000010, | ||
343 | 0x16200011, 0x00000000, | ||
344 | }; /* 104 WoL instructions */ | ||
345 | #define FIRMWARE_WOL_SIZE 104 | ||
346 | #endif | ||
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c index 08cb7177a175..d500a5771dbc 100644 --- a/drivers/net/sundance.c +++ b/drivers/net/sundance.c | |||
@@ -1028,7 +1028,7 @@ static void init_ring(struct net_device *dev) | |||
1028 | skb->dev = dev; /* Mark as being used by this device. */ | 1028 | skb->dev = dev; /* Mark as being used by this device. */ |
1029 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ | 1029 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
1030 | np->rx_ring[i].frag[0].addr = cpu_to_le32( | 1030 | np->rx_ring[i].frag[0].addr = cpu_to_le32( |
1031 | pci_map_single(np->pci_dev, skb->tail, np->rx_buf_sz, | 1031 | pci_map_single(np->pci_dev, skb->data, np->rx_buf_sz, |
1032 | PCI_DMA_FROMDEVICE)); | 1032 | PCI_DMA_FROMDEVICE)); |
1033 | np->rx_ring[i].frag[0].length = cpu_to_le32(np->rx_buf_sz | LastFrag); | 1033 | np->rx_ring[i].frag[0].length = cpu_to_le32(np->rx_buf_sz | LastFrag); |
1034 | } | 1034 | } |
@@ -1341,7 +1341,7 @@ static void rx_poll(unsigned long data) | |||
1341 | np->rx_buf_sz, | 1341 | np->rx_buf_sz, |
1342 | PCI_DMA_FROMDEVICE); | 1342 | PCI_DMA_FROMDEVICE); |
1343 | 1343 | ||
1344 | eth_copy_and_sum(skb, np->rx_skbuff[entry]->tail, pkt_len, 0); | 1344 | eth_copy_and_sum(skb, np->rx_skbuff[entry]->data, pkt_len, 0); |
1345 | pci_dma_sync_single_for_device(np->pci_dev, | 1345 | pci_dma_sync_single_for_device(np->pci_dev, |
1346 | desc->frag[0].addr, | 1346 | desc->frag[0].addr, |
1347 | np->rx_buf_sz, | 1347 | np->rx_buf_sz, |
@@ -1400,7 +1400,7 @@ static void refill_rx (struct net_device *dev) | |||
1400 | skb->dev = dev; /* Mark as being used by this device. */ | 1400 | skb->dev = dev; /* Mark as being used by this device. */ |
1401 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1401 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1402 | np->rx_ring[entry].frag[0].addr = cpu_to_le32( | 1402 | np->rx_ring[entry].frag[0].addr = cpu_to_le32( |
1403 | pci_map_single(np->pci_dev, skb->tail, | 1403 | pci_map_single(np->pci_dev, skb->data, |
1404 | np->rx_buf_sz, PCI_DMA_FROMDEVICE)); | 1404 | np->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1405 | } | 1405 | } |
1406 | /* Perhaps we need not reset this field. */ | 1406 | /* Perhaps we need not reset this field. */ |
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c index 5cd50fd53c12..2608e7a3d214 100644 --- a/drivers/net/sungem.c +++ b/drivers/net/sungem.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <linux/init.h> | 44 | #include <linux/init.h> |
45 | #include <linux/errno.h> | 45 | #include <linux/errno.h> |
46 | #include <linux/pci.h> | 46 | #include <linux/pci.h> |
47 | #include <linux/dma-mapping.h> | ||
47 | #include <linux/netdevice.h> | 48 | #include <linux/netdevice.h> |
48 | #include <linux/etherdevice.h> | 49 | #include <linux/etherdevice.h> |
49 | #include <linux/skbuff.h> | 50 | #include <linux/skbuff.h> |
@@ -2989,10 +2990,10 @@ static int __devinit gem_init_one(struct pci_dev *pdev, | |||
2989 | */ | 2990 | */ |
2990 | if (pdev->vendor == PCI_VENDOR_ID_SUN && | 2991 | if (pdev->vendor == PCI_VENDOR_ID_SUN && |
2991 | pdev->device == PCI_DEVICE_ID_SUN_GEM && | 2992 | pdev->device == PCI_DEVICE_ID_SUN_GEM && |
2992 | !pci_set_dma_mask(pdev, (u64) 0xffffffffffffffffULL)) { | 2993 | !pci_set_dma_mask(pdev, DMA_64BIT_MASK)) { |
2993 | pci_using_dac = 1; | 2994 | pci_using_dac = 1; |
2994 | } else { | 2995 | } else { |
2995 | err = pci_set_dma_mask(pdev, (u64) 0xffffffff); | 2996 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
2996 | if (err) { | 2997 | if (err) { |
2997 | printk(KERN_ERR PFX "No usable DMA configuration, " | 2998 | printk(KERN_ERR PFX "No usable DMA configuration, " |
2998 | "aborting.\n"); | 2999 | "aborting.\n"); |
@@ -3078,7 +3079,9 @@ static int __devinit gem_init_one(struct pci_dev *pdev, | |||
3078 | gp->phy_mii.dev = dev; | 3079 | gp->phy_mii.dev = dev; |
3079 | gp->phy_mii.mdio_read = _phy_read; | 3080 | gp->phy_mii.mdio_read = _phy_read; |
3080 | gp->phy_mii.mdio_write = _phy_write; | 3081 | gp->phy_mii.mdio_write = _phy_write; |
3081 | 3082 | #ifdef CONFIG_PPC_PMAC | |
3083 | gp->phy_mii.platform_data = gp->of_node; | ||
3084 | #endif | ||
3082 | /* By default, we start with autoneg */ | 3085 | /* By default, we start with autoneg */ |
3083 | gp->want_autoneg = 1; | 3086 | gp->want_autoneg = 1; |
3084 | 3087 | ||
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c index 0fca414d3657..d3ddb41d6e5c 100644 --- a/drivers/net/sungem_phy.c +++ b/drivers/net/sungem_phy.c | |||
@@ -32,6 +32,10 @@ | |||
32 | #include <linux/ethtool.h> | 32 | #include <linux/ethtool.h> |
33 | #include <linux/delay.h> | 33 | #include <linux/delay.h> |
34 | 34 | ||
35 | #ifdef CONFIG_PPC_PMAC | ||
36 | #include <asm/prom.h> | ||
37 | #endif | ||
38 | |||
35 | #include "sungem_phy.h" | 39 | #include "sungem_phy.h" |
36 | 40 | ||
37 | /* Link modes of the BCM5400 PHY */ | 41 | /* Link modes of the BCM5400 PHY */ |
@@ -281,10 +285,12 @@ static int bcm5411_suspend(struct mii_phy* phy) | |||
281 | static int bcm5421_init(struct mii_phy* phy) | 285 | static int bcm5421_init(struct mii_phy* phy) |
282 | { | 286 | { |
283 | u16 data; | 287 | u16 data; |
284 | int rev; | 288 | unsigned int id; |
285 | 289 | ||
286 | rev = phy_read(phy, MII_PHYSID2) & 0x000f; | 290 | id = (phy_read(phy, MII_PHYSID1) << 16 | phy_read(phy, MII_PHYSID2)); |
287 | if (rev == 0) { | 291 | |
292 | /* Revision 0 of 5421 needs some fixups */ | ||
293 | if (id == 0x002060e0) { | ||
288 | /* This is borrowed from MacOS | 294 | /* This is borrowed from MacOS |
289 | */ | 295 | */ |
290 | phy_write(phy, 0x18, 0x1007); | 296 | phy_write(phy, 0x18, 0x1007); |
@@ -297,21 +303,28 @@ static int bcm5421_init(struct mii_phy* phy) | |||
297 | data = phy_read(phy, 0x15); | 303 | data = phy_read(phy, 0x15); |
298 | phy_write(phy, 0x15, data | 0x0200); | 304 | phy_write(phy, 0x15, data | 0x0200); |
299 | } | 305 | } |
300 | #if 0 | ||
301 | /* This has to be verified before I enable it */ | ||
302 | /* Enable automatic low-power */ | ||
303 | phy_write(phy, 0x1c, 0x9002); | ||
304 | phy_write(phy, 0x1c, 0xa821); | ||
305 | phy_write(phy, 0x1c, 0x941d); | ||
306 | #endif | ||
307 | return 0; | ||
308 | } | ||
309 | 306 | ||
310 | static int bcm5421k2_init(struct mii_phy* phy) | 307 | /* Pick up some init code from OF for K2 version */ |
311 | { | 308 | if ((id & 0xfffffff0) == 0x002062e0) { |
312 | /* Init code borrowed from OF */ | 309 | phy_write(phy, 4, 0x01e1); |
313 | phy_write(phy, 4, 0x01e1); | 310 | phy_write(phy, 9, 0x0300); |
314 | phy_write(phy, 9, 0x0300); | 311 | } |
312 | |||
313 | /* Check if we can enable automatic low power */ | ||
314 | #ifdef CONFIG_PPC_PMAC | ||
315 | if (phy->platform_data) { | ||
316 | struct device_node *np = of_get_parent(phy->platform_data); | ||
317 | int can_low_power = 1; | ||
318 | if (np == NULL || get_property(np, "no-autolowpower", NULL)) | ||
319 | can_low_power = 0; | ||
320 | if (can_low_power) { | ||
321 | /* Enable automatic low-power */ | ||
322 | phy_write(phy, 0x1c, 0x9002); | ||
323 | phy_write(phy, 0x1c, 0xa821); | ||
324 | phy_write(phy, 0x1c, 0x941d); | ||
325 | } | ||
326 | } | ||
327 | #endif /* CONFIG_PPC_PMAC */ | ||
315 | 328 | ||
316 | return 0; | 329 | return 0; |
317 | } | 330 | } |
@@ -762,7 +775,7 @@ static struct mii_phy_def bcm5421_phy_def = { | |||
762 | 775 | ||
763 | /* Broadcom BCM 5421 built-in K2 */ | 776 | /* Broadcom BCM 5421 built-in K2 */ |
764 | static struct mii_phy_ops bcm5421k2_phy_ops = { | 777 | static struct mii_phy_ops bcm5421k2_phy_ops = { |
765 | .init = bcm5421k2_init, | 778 | .init = bcm5421_init, |
766 | .suspend = bcm5411_suspend, | 779 | .suspend = bcm5411_suspend, |
767 | .setup_aneg = bcm54xx_setup_aneg, | 780 | .setup_aneg = bcm54xx_setup_aneg, |
768 | .setup_forced = bcm54xx_setup_forced, | 781 | .setup_forced = bcm54xx_setup_forced, |
@@ -779,6 +792,25 @@ static struct mii_phy_def bcm5421k2_phy_def = { | |||
779 | .ops = &bcm5421k2_phy_ops | 792 | .ops = &bcm5421k2_phy_ops |
780 | }; | 793 | }; |
781 | 794 | ||
795 | /* Broadcom BCM 5462 built-in Vesta */ | ||
796 | static struct mii_phy_ops bcm5462V_phy_ops = { | ||
797 | .init = bcm5421_init, | ||
798 | .suspend = bcm5411_suspend, | ||
799 | .setup_aneg = bcm54xx_setup_aneg, | ||
800 | .setup_forced = bcm54xx_setup_forced, | ||
801 | .poll_link = genmii_poll_link, | ||
802 | .read_link = bcm54xx_read_link, | ||
803 | }; | ||
804 | |||
805 | static struct mii_phy_def bcm5462V_phy_def = { | ||
806 | .phy_id = 0x002060d0, | ||
807 | .phy_id_mask = 0xfffffff0, | ||
808 | .name = "BCM5462-Vesta", | ||
809 | .features = MII_GBIT_FEATURES, | ||
810 | .magic_aneg = 1, | ||
811 | .ops = &bcm5462V_phy_ops | ||
812 | }; | ||
813 | |||
782 | /* Marvell 88E1101 (Apple seem to deal with 2 different revs, | 814 | /* Marvell 88E1101 (Apple seem to deal with 2 different revs, |
783 | * I masked out the 8 last bits to get both, but some specs | 815 | * I masked out the 8 last bits to get both, but some specs |
784 | * would be useful here) --BenH. | 816 | * would be useful here) --BenH. |
@@ -824,6 +856,7 @@ static struct mii_phy_def* mii_phy_table[] = { | |||
824 | &bcm5411_phy_def, | 856 | &bcm5411_phy_def, |
825 | &bcm5421_phy_def, | 857 | &bcm5421_phy_def, |
826 | &bcm5421k2_phy_def, | 858 | &bcm5421k2_phy_def, |
859 | &bcm5462V_phy_def, | ||
827 | &marvell_phy_def, | 860 | &marvell_phy_def, |
828 | &genmii_phy_def, | 861 | &genmii_phy_def, |
829 | NULL | 862 | NULL |
diff --git a/drivers/net/sungem_phy.h b/drivers/net/sungem_phy.h index 822cb58174ea..430544496c52 100644 --- a/drivers/net/sungem_phy.h +++ b/drivers/net/sungem_phy.h | |||
@@ -43,9 +43,10 @@ struct mii_phy | |||
43 | int pause; | 43 | int pause; |
44 | 44 | ||
45 | /* Provided by host chip */ | 45 | /* Provided by host chip */ |
46 | struct net_device* dev; | 46 | struct net_device *dev; |
47 | int (*mdio_read) (struct net_device *dev, int mii_id, int reg); | 47 | int (*mdio_read) (struct net_device *dev, int mii_id, int reg); |
48 | void (*mdio_write) (struct net_device *dev, int mii_id, int reg, int val); | 48 | void (*mdio_write) (struct net_device *dev, int mii_id, int reg, int val); |
49 | void *platform_data; | ||
49 | }; | 50 | }; |
50 | 51 | ||
51 | /* Pass in a struct mii_phy with dev, mdio_read and mdio_write | 52 | /* Pass in a struct mii_phy with dev, mdio_read and mdio_write |
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index a0b8848049c9..201a550f0bcc 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -66,8 +66,8 @@ | |||
66 | 66 | ||
67 | #define DRV_MODULE_NAME "tg3" | 67 | #define DRV_MODULE_NAME "tg3" |
68 | #define PFX DRV_MODULE_NAME ": " | 68 | #define PFX DRV_MODULE_NAME ": " |
69 | #define DRV_MODULE_VERSION "3.31" | 69 | #define DRV_MODULE_VERSION "3.34" |
70 | #define DRV_MODULE_RELDATE "June 8, 2005" | 70 | #define DRV_MODULE_RELDATE "July 25, 2005" |
71 | 71 | ||
72 | #define TG3_DEF_MAC_MODE 0 | 72 | #define TG3_DEF_MAC_MODE 0 |
73 | #define TG3_DEF_RX_MODE 0 | 73 | #define TG3_DEF_RX_MODE 0 |
@@ -90,7 +90,7 @@ | |||
90 | /* hardware minimum and maximum for a single frame's data payload */ | 90 | /* hardware minimum and maximum for a single frame's data payload */ |
91 | #define TG3_MIN_MTU 60 | 91 | #define TG3_MIN_MTU 60 |
92 | #define TG3_MAX_MTU(tp) \ | 92 | #define TG3_MAX_MTU(tp) \ |
93 | (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ? 9000 : 1500) | 93 | ((tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) ? 9000 : 1500) |
94 | 94 | ||
95 | /* These numbers seem to be hard coded in the NIC firmware somehow. | 95 | /* These numbers seem to be hard coded in the NIC firmware somehow. |
96 | * You can't change the ring sizes, but you can change where you place | 96 | * You can't change the ring sizes, but you can change where you place |
@@ -221,6 +221,10 @@ static struct pci_device_id tg3_pci_tbl[] = { | |||
221 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 221 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
222 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F, | 222 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5753F, |
223 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 223 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
224 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780, | ||
225 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | ||
226 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S, | ||
227 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | ||
224 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781, | 228 | { PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781, |
225 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, | 229 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0UL }, |
226 | { PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX, | 230 | { PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX, |
@@ -337,12 +341,10 @@ static struct { | |||
337 | static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) | 341 | static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) |
338 | { | 342 | { |
339 | if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) { | 343 | if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) { |
340 | unsigned long flags; | 344 | spin_lock_bh(&tp->indirect_lock); |
341 | |||
342 | spin_lock_irqsave(&tp->indirect_lock, flags); | ||
343 | pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off); | 345 | pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off); |
344 | pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val); | 346 | pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val); |
345 | spin_unlock_irqrestore(&tp->indirect_lock, flags); | 347 | spin_unlock_bh(&tp->indirect_lock); |
346 | } else { | 348 | } else { |
347 | writel(val, tp->regs + off); | 349 | writel(val, tp->regs + off); |
348 | if ((tp->tg3_flags & TG3_FLAG_5701_REG_WRITE_BUG) != 0) | 350 | if ((tp->tg3_flags & TG3_FLAG_5701_REG_WRITE_BUG) != 0) |
@@ -353,12 +355,10 @@ static void tg3_write_indirect_reg32(struct tg3 *tp, u32 off, u32 val) | |||
353 | static void _tw32_flush(struct tg3 *tp, u32 off, u32 val) | 355 | static void _tw32_flush(struct tg3 *tp, u32 off, u32 val) |
354 | { | 356 | { |
355 | if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) { | 357 | if ((tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) != 0) { |
356 | unsigned long flags; | 358 | spin_lock_bh(&tp->indirect_lock); |
357 | |||
358 | spin_lock_irqsave(&tp->indirect_lock, flags); | ||
359 | pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off); | 359 | pci_write_config_dword(tp->pdev, TG3PCI_REG_BASE_ADDR, off); |
360 | pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val); | 360 | pci_write_config_dword(tp->pdev, TG3PCI_REG_DATA, val); |
361 | spin_unlock_irqrestore(&tp->indirect_lock, flags); | 361 | spin_unlock_bh(&tp->indirect_lock); |
362 | } else { | 362 | } else { |
363 | void __iomem *dest = tp->regs + off; | 363 | void __iomem *dest = tp->regs + off; |
364 | writel(val, dest); | 364 | writel(val, dest); |
@@ -398,28 +398,24 @@ static inline void _tw32_tx_mbox(struct tg3 *tp, u32 off, u32 val) | |||
398 | 398 | ||
399 | static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val) | 399 | static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val) |
400 | { | 400 | { |
401 | unsigned long flags; | 401 | spin_lock_bh(&tp->indirect_lock); |
402 | |||
403 | spin_lock_irqsave(&tp->indirect_lock, flags); | ||
404 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); | 402 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); |
405 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); | 403 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); |
406 | 404 | ||
407 | /* Always leave this as zero. */ | 405 | /* Always leave this as zero. */ |
408 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); | 406 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); |
409 | spin_unlock_irqrestore(&tp->indirect_lock, flags); | 407 | spin_unlock_bh(&tp->indirect_lock); |
410 | } | 408 | } |
411 | 409 | ||
412 | static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val) | 410 | static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val) |
413 | { | 411 | { |
414 | unsigned long flags; | 412 | spin_lock_bh(&tp->indirect_lock); |
415 | |||
416 | spin_lock_irqsave(&tp->indirect_lock, flags); | ||
417 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); | 413 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); |
418 | pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); | 414 | pci_read_config_dword(tp->pdev, TG3PCI_MEM_WIN_DATA, val); |
419 | 415 | ||
420 | /* Always leave this as zero. */ | 416 | /* Always leave this as zero. */ |
421 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); | 417 | pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, 0); |
422 | spin_unlock_irqrestore(&tp->indirect_lock, flags); | 418 | spin_unlock_bh(&tp->indirect_lock); |
423 | } | 419 | } |
424 | 420 | ||
425 | static void tg3_disable_ints(struct tg3 *tp) | 421 | static void tg3_disable_ints(struct tg3 *tp) |
@@ -438,12 +434,14 @@ static inline void tg3_cond_int(struct tg3 *tp) | |||
438 | 434 | ||
439 | static void tg3_enable_ints(struct tg3 *tp) | 435 | static void tg3_enable_ints(struct tg3 *tp) |
440 | { | 436 | { |
437 | tp->irq_sync = 0; | ||
438 | wmb(); | ||
439 | |||
441 | tw32(TG3PCI_MISC_HOST_CTRL, | 440 | tw32(TG3PCI_MISC_HOST_CTRL, |
442 | (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT)); | 441 | (tp->misc_host_ctrl & ~MISC_HOST_CTRL_MASK_PCI_INT)); |
443 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | 442 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, |
444 | (tp->last_tag << 24)); | 443 | (tp->last_tag << 24)); |
445 | tr32(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW); | 444 | tr32(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW); |
446 | |||
447 | tg3_cond_int(tp); | 445 | tg3_cond_int(tp); |
448 | } | 446 | } |
449 | 447 | ||
@@ -492,6 +490,7 @@ static void tg3_restart_ints(struct tg3 *tp) | |||
492 | 490 | ||
493 | static inline void tg3_netif_stop(struct tg3 *tp) | 491 | static inline void tg3_netif_stop(struct tg3 *tp) |
494 | { | 492 | { |
493 | tp->dev->trans_start = jiffies; /* prevent tx timeout */ | ||
495 | netif_poll_disable(tp->dev); | 494 | netif_poll_disable(tp->dev); |
496 | netif_tx_disable(tp->dev); | 495 | netif_tx_disable(tp->dev); |
497 | } | 496 | } |
@@ -504,7 +503,8 @@ static inline void tg3_netif_start(struct tg3 *tp) | |||
504 | * (such as after tg3_init_hw) | 503 | * (such as after tg3_init_hw) |
505 | */ | 504 | */ |
506 | netif_poll_enable(tp->dev); | 505 | netif_poll_enable(tp->dev); |
507 | tg3_cond_int(tp); | 506 | tp->hw_status->status |= SD_STATUS_UPDATED; |
507 | tg3_enable_ints(tp); | ||
508 | } | 508 | } |
509 | 509 | ||
510 | static void tg3_switch_clocks(struct tg3 *tp) | 510 | static void tg3_switch_clocks(struct tg3 *tp) |
@@ -512,6 +512,9 @@ static void tg3_switch_clocks(struct tg3 *tp) | |||
512 | u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); | 512 | u32 clock_ctrl = tr32(TG3PCI_CLOCK_CTRL); |
513 | u32 orig_clock_ctrl; | 513 | u32 orig_clock_ctrl; |
514 | 514 | ||
515 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) | ||
516 | return; | ||
517 | |||
515 | orig_clock_ctrl = clock_ctrl; | 518 | orig_clock_ctrl = clock_ctrl; |
516 | clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN | | 519 | clock_ctrl &= (CLOCK_CTRL_FORCE_CLKRUN | |
517 | CLOCK_CTRL_CLKRUN_OENABLE | | 520 | CLOCK_CTRL_CLKRUN_OENABLE | |
@@ -911,7 +914,7 @@ out: | |||
911 | if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { | 914 | if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { |
912 | /* Cannot do read-modify-write on 5401 */ | 915 | /* Cannot do read-modify-write on 5401 */ |
913 | tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20); | 916 | tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x4c20); |
914 | } else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { | 917 | } else if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) { |
915 | u32 phy_reg; | 918 | u32 phy_reg; |
916 | 919 | ||
917 | /* Set bit 14 with read-modify-write to preserve other bits */ | 920 | /* Set bit 14 with read-modify-write to preserve other bits */ |
@@ -923,7 +926,7 @@ out: | |||
923 | /* Set phy register 0x10 bit 0 to high fifo elasticity to support | 926 | /* Set phy register 0x10 bit 0 to high fifo elasticity to support |
924 | * jumbo frames transmission. | 927 | * jumbo frames transmission. |
925 | */ | 928 | */ |
926 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { | 929 | if (tp->tg3_flags2 & TG3_FLG2_JUMBO_CAPABLE) { |
927 | u32 phy_reg; | 930 | u32 phy_reg; |
928 | 931 | ||
929 | if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg)) | 932 | if (!tg3_readphy(tp, MII_TG3_EXT_CTRL, &phy_reg)) |
@@ -1097,7 +1100,7 @@ static int tg3_set_power_state(struct tg3 *tp, int state) | |||
1097 | tp->link_config.orig_autoneg = tp->link_config.autoneg; | 1100 | tp->link_config.orig_autoneg = tp->link_config.autoneg; |
1098 | } | 1101 | } |
1099 | 1102 | ||
1100 | if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) { | 1103 | if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) { |
1101 | tp->link_config.speed = SPEED_10; | 1104 | tp->link_config.speed = SPEED_10; |
1102 | tp->link_config.duplex = DUPLEX_HALF; | 1105 | tp->link_config.duplex = DUPLEX_HALF; |
1103 | tp->link_config.autoneg = AUTONEG_ENABLE; | 1106 | tp->link_config.autoneg = AUTONEG_ENABLE; |
@@ -1149,6 +1152,8 @@ static int tg3_set_power_state(struct tg3 *tp, int state) | |||
1149 | CLOCK_CTRL_ALTCLK | | 1152 | CLOCK_CTRL_ALTCLK | |
1150 | CLOCK_CTRL_PWRDOWN_PLL133); | 1153 | CLOCK_CTRL_PWRDOWN_PLL133); |
1151 | udelay(40); | 1154 | udelay(40); |
1155 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { | ||
1156 | /* do nothing */ | ||
1152 | } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && | 1157 | } else if (!((tp->tg3_flags2 & TG3_FLG2_5750_PLUS) && |
1153 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { | 1158 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF))) { |
1154 | u32 newbits1, newbits2; | 1159 | u32 newbits1, newbits2; |
@@ -1242,6 +1247,25 @@ static void tg3_setup_flow_control(struct tg3 *tp, u32 local_adv, u32 remote_adv | |||
1242 | u32 old_tx_mode = tp->tx_mode; | 1247 | u32 old_tx_mode = tp->tx_mode; |
1243 | 1248 | ||
1244 | if (tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG) { | 1249 | if (tp->tg3_flags & TG3_FLAG_PAUSE_AUTONEG) { |
1250 | |||
1251 | /* Convert 1000BaseX flow control bits to 1000BaseT | ||
1252 | * bits before resolving flow control. | ||
1253 | */ | ||
1254 | if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) { | ||
1255 | local_adv &= ~(ADVERTISE_PAUSE_CAP | | ||
1256 | ADVERTISE_PAUSE_ASYM); | ||
1257 | remote_adv &= ~(LPA_PAUSE_CAP | LPA_PAUSE_ASYM); | ||
1258 | |||
1259 | if (local_adv & ADVERTISE_1000XPAUSE) | ||
1260 | local_adv |= ADVERTISE_PAUSE_CAP; | ||
1261 | if (local_adv & ADVERTISE_1000XPSE_ASYM) | ||
1262 | local_adv |= ADVERTISE_PAUSE_ASYM; | ||
1263 | if (remote_adv & LPA_1000XPAUSE) | ||
1264 | remote_adv |= LPA_PAUSE_CAP; | ||
1265 | if (remote_adv & LPA_1000XPAUSE_ASYM) | ||
1266 | remote_adv |= LPA_PAUSE_ASYM; | ||
1267 | } | ||
1268 | |||
1245 | if (local_adv & ADVERTISE_PAUSE_CAP) { | 1269 | if (local_adv & ADVERTISE_PAUSE_CAP) { |
1246 | if (local_adv & ADVERTISE_PAUSE_ASYM) { | 1270 | if (local_adv & ADVERTISE_PAUSE_ASYM) { |
1247 | if (remote_adv & LPA_PAUSE_CAP) | 1271 | if (remote_adv & LPA_PAUSE_CAP) |
@@ -2502,12 +2526,226 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset) | |||
2502 | return 0; | 2526 | return 0; |
2503 | } | 2527 | } |
2504 | 2528 | ||
2529 | static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset) | ||
2530 | { | ||
2531 | int current_link_up, err = 0; | ||
2532 | u32 bmsr, bmcr; | ||
2533 | u16 current_speed; | ||
2534 | u8 current_duplex; | ||
2535 | |||
2536 | tp->mac_mode |= MAC_MODE_PORT_MODE_GMII; | ||
2537 | tw32_f(MAC_MODE, tp->mac_mode); | ||
2538 | udelay(40); | ||
2539 | |||
2540 | tw32(MAC_EVENT, 0); | ||
2541 | |||
2542 | tw32_f(MAC_STATUS, | ||
2543 | (MAC_STATUS_SYNC_CHANGED | | ||
2544 | MAC_STATUS_CFG_CHANGED | | ||
2545 | MAC_STATUS_MI_COMPLETION | | ||
2546 | MAC_STATUS_LNKSTATE_CHANGED)); | ||
2547 | udelay(40); | ||
2548 | |||
2549 | if (force_reset) | ||
2550 | tg3_phy_reset(tp); | ||
2551 | |||
2552 | current_link_up = 0; | ||
2553 | current_speed = SPEED_INVALID; | ||
2554 | current_duplex = DUPLEX_INVALID; | ||
2555 | |||
2556 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | ||
2557 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | ||
2558 | |||
2559 | err |= tg3_readphy(tp, MII_BMCR, &bmcr); | ||
2560 | |||
2561 | if ((tp->link_config.autoneg == AUTONEG_ENABLE) && !force_reset && | ||
2562 | (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) { | ||
2563 | /* do nothing, just check for link up at the end */ | ||
2564 | } else if (tp->link_config.autoneg == AUTONEG_ENABLE) { | ||
2565 | u32 adv, new_adv; | ||
2566 | |||
2567 | err |= tg3_readphy(tp, MII_ADVERTISE, &adv); | ||
2568 | new_adv = adv & ~(ADVERTISE_1000XFULL | ADVERTISE_1000XHALF | | ||
2569 | ADVERTISE_1000XPAUSE | | ||
2570 | ADVERTISE_1000XPSE_ASYM | | ||
2571 | ADVERTISE_SLCT); | ||
2572 | |||
2573 | /* Always advertise symmetric PAUSE just like copper */ | ||
2574 | new_adv |= ADVERTISE_1000XPAUSE; | ||
2575 | |||
2576 | if (tp->link_config.advertising & ADVERTISED_1000baseT_Half) | ||
2577 | new_adv |= ADVERTISE_1000XHALF; | ||
2578 | if (tp->link_config.advertising & ADVERTISED_1000baseT_Full) | ||
2579 | new_adv |= ADVERTISE_1000XFULL; | ||
2580 | |||
2581 | if ((new_adv != adv) || !(bmcr & BMCR_ANENABLE)) { | ||
2582 | tg3_writephy(tp, MII_ADVERTISE, new_adv); | ||
2583 | bmcr |= BMCR_ANENABLE | BMCR_ANRESTART; | ||
2584 | tg3_writephy(tp, MII_BMCR, bmcr); | ||
2585 | |||
2586 | tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); | ||
2587 | tp->tg3_flags2 |= TG3_FLG2_PHY_JUST_INITTED; | ||
2588 | tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; | ||
2589 | |||
2590 | return err; | ||
2591 | } | ||
2592 | } else { | ||
2593 | u32 new_bmcr; | ||
2594 | |||
2595 | bmcr &= ~BMCR_SPEED1000; | ||
2596 | new_bmcr = bmcr & ~(BMCR_ANENABLE | BMCR_FULLDPLX); | ||
2597 | |||
2598 | if (tp->link_config.duplex == DUPLEX_FULL) | ||
2599 | new_bmcr |= BMCR_FULLDPLX; | ||
2600 | |||
2601 | if (new_bmcr != bmcr) { | ||
2602 | /* BMCR_SPEED1000 is a reserved bit that needs | ||
2603 | * to be set on write. | ||
2604 | */ | ||
2605 | new_bmcr |= BMCR_SPEED1000; | ||
2606 | |||
2607 | /* Force a linkdown */ | ||
2608 | if (netif_carrier_ok(tp->dev)) { | ||
2609 | u32 adv; | ||
2610 | |||
2611 | err |= tg3_readphy(tp, MII_ADVERTISE, &adv); | ||
2612 | adv &= ~(ADVERTISE_1000XFULL | | ||
2613 | ADVERTISE_1000XHALF | | ||
2614 | ADVERTISE_SLCT); | ||
2615 | tg3_writephy(tp, MII_ADVERTISE, adv); | ||
2616 | tg3_writephy(tp, MII_BMCR, bmcr | | ||
2617 | BMCR_ANRESTART | | ||
2618 | BMCR_ANENABLE); | ||
2619 | udelay(10); | ||
2620 | netif_carrier_off(tp->dev); | ||
2621 | } | ||
2622 | tg3_writephy(tp, MII_BMCR, new_bmcr); | ||
2623 | bmcr = new_bmcr; | ||
2624 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | ||
2625 | err |= tg3_readphy(tp, MII_BMSR, &bmsr); | ||
2626 | tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; | ||
2627 | } | ||
2628 | } | ||
2629 | |||
2630 | if (bmsr & BMSR_LSTATUS) { | ||
2631 | current_speed = SPEED_1000; | ||
2632 | current_link_up = 1; | ||
2633 | if (bmcr & BMCR_FULLDPLX) | ||
2634 | current_duplex = DUPLEX_FULL; | ||
2635 | else | ||
2636 | current_duplex = DUPLEX_HALF; | ||
2637 | |||
2638 | if (bmcr & BMCR_ANENABLE) { | ||
2639 | u32 local_adv, remote_adv, common; | ||
2640 | |||
2641 | err |= tg3_readphy(tp, MII_ADVERTISE, &local_adv); | ||
2642 | err |= tg3_readphy(tp, MII_LPA, &remote_adv); | ||
2643 | common = local_adv & remote_adv; | ||
2644 | if (common & (ADVERTISE_1000XHALF | | ||
2645 | ADVERTISE_1000XFULL)) { | ||
2646 | if (common & ADVERTISE_1000XFULL) | ||
2647 | current_duplex = DUPLEX_FULL; | ||
2648 | else | ||
2649 | current_duplex = DUPLEX_HALF; | ||
2650 | |||
2651 | tg3_setup_flow_control(tp, local_adv, | ||
2652 | remote_adv); | ||
2653 | } | ||
2654 | else | ||
2655 | current_link_up = 0; | ||
2656 | } | ||
2657 | } | ||
2658 | |||
2659 | tp->mac_mode &= ~MAC_MODE_HALF_DUPLEX; | ||
2660 | if (tp->link_config.active_duplex == DUPLEX_HALF) | ||
2661 | tp->mac_mode |= MAC_MODE_HALF_DUPLEX; | ||
2662 | |||
2663 | tw32_f(MAC_MODE, tp->mac_mode); | ||
2664 | udelay(40); | ||
2665 | |||
2666 | tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); | ||
2667 | |||
2668 | tp->link_config.active_speed = current_speed; | ||
2669 | tp->link_config.active_duplex = current_duplex; | ||
2670 | |||
2671 | if (current_link_up != netif_carrier_ok(tp->dev)) { | ||
2672 | if (current_link_up) | ||
2673 | netif_carrier_on(tp->dev); | ||
2674 | else { | ||
2675 | netif_carrier_off(tp->dev); | ||
2676 | tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; | ||
2677 | } | ||
2678 | tg3_link_report(tp); | ||
2679 | } | ||
2680 | return err; | ||
2681 | } | ||
2682 | |||
2683 | static void tg3_serdes_parallel_detect(struct tg3 *tp) | ||
2684 | { | ||
2685 | if (tp->tg3_flags2 & TG3_FLG2_PHY_JUST_INITTED) { | ||
2686 | /* Give autoneg time to complete. */ | ||
2687 | tp->tg3_flags2 &= ~TG3_FLG2_PHY_JUST_INITTED; | ||
2688 | return; | ||
2689 | } | ||
2690 | if (!netif_carrier_ok(tp->dev) && | ||
2691 | (tp->link_config.autoneg == AUTONEG_ENABLE)) { | ||
2692 | u32 bmcr; | ||
2693 | |||
2694 | tg3_readphy(tp, MII_BMCR, &bmcr); | ||
2695 | if (bmcr & BMCR_ANENABLE) { | ||
2696 | u32 phy1, phy2; | ||
2697 | |||
2698 | /* Select shadow register 0x1f */ | ||
2699 | tg3_writephy(tp, 0x1c, 0x7c00); | ||
2700 | tg3_readphy(tp, 0x1c, &phy1); | ||
2701 | |||
2702 | /* Select expansion interrupt status register */ | ||
2703 | tg3_writephy(tp, 0x17, 0x0f01); | ||
2704 | tg3_readphy(tp, 0x15, &phy2); | ||
2705 | tg3_readphy(tp, 0x15, &phy2); | ||
2706 | |||
2707 | if ((phy1 & 0x10) && !(phy2 & 0x20)) { | ||
2708 | /* We have signal detect and not receiving | ||
2709 | * config code words, link is up by parallel | ||
2710 | * detection. | ||
2711 | */ | ||
2712 | |||
2713 | bmcr &= ~BMCR_ANENABLE; | ||
2714 | bmcr |= BMCR_SPEED1000 | BMCR_FULLDPLX; | ||
2715 | tg3_writephy(tp, MII_BMCR, bmcr); | ||
2716 | tp->tg3_flags2 |= TG3_FLG2_PARALLEL_DETECT; | ||
2717 | } | ||
2718 | } | ||
2719 | } | ||
2720 | else if (netif_carrier_ok(tp->dev) && | ||
2721 | (tp->link_config.autoneg == AUTONEG_ENABLE) && | ||
2722 | (tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT)) { | ||
2723 | u32 phy2; | ||
2724 | |||
2725 | /* Select expansion interrupt status register */ | ||
2726 | tg3_writephy(tp, 0x17, 0x0f01); | ||
2727 | tg3_readphy(tp, 0x15, &phy2); | ||
2728 | if (phy2 & 0x20) { | ||
2729 | u32 bmcr; | ||
2730 | |||
2731 | /* Config code words received, turn on autoneg. */ | ||
2732 | tg3_readphy(tp, MII_BMCR, &bmcr); | ||
2733 | tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANENABLE); | ||
2734 | |||
2735 | tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; | ||
2736 | |||
2737 | } | ||
2738 | } | ||
2739 | } | ||
2740 | |||
2505 | static int tg3_setup_phy(struct tg3 *tp, int force_reset) | 2741 | static int tg3_setup_phy(struct tg3 *tp, int force_reset) |
2506 | { | 2742 | { |
2507 | int err; | 2743 | int err; |
2508 | 2744 | ||
2509 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { | 2745 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { |
2510 | err = tg3_setup_fiber_phy(tp, force_reset); | 2746 | err = tg3_setup_fiber_phy(tp, force_reset); |
2747 | } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) { | ||
2748 | err = tg3_setup_fiber_mii_phy(tp, force_reset); | ||
2511 | } else { | 2749 | } else { |
2512 | err = tg3_setup_copper_phy(tp, force_reset); | 2750 | err = tg3_setup_copper_phy(tp, force_reset); |
2513 | } | 2751 | } |
@@ -2578,7 +2816,7 @@ static void tg3_tx(struct tg3 *tp) | |||
2578 | sw_idx = NEXT_TX(sw_idx); | 2816 | sw_idx = NEXT_TX(sw_idx); |
2579 | } | 2817 | } |
2580 | 2818 | ||
2581 | dev_kfree_skb_irq(skb); | 2819 | dev_kfree_skb(skb); |
2582 | } | 2820 | } |
2583 | 2821 | ||
2584 | tp->tx_cons = sw_idx; | 2822 | tp->tx_cons = sw_idx; |
@@ -2616,7 +2854,7 @@ static int tg3_alloc_rx_skb(struct tg3 *tp, u32 opaque_key, | |||
2616 | map = &tp->rx_std_buffers[dest_idx]; | 2854 | map = &tp->rx_std_buffers[dest_idx]; |
2617 | if (src_idx >= 0) | 2855 | if (src_idx >= 0) |
2618 | src_map = &tp->rx_std_buffers[src_idx]; | 2856 | src_map = &tp->rx_std_buffers[src_idx]; |
2619 | skb_size = RX_PKT_BUF_SZ; | 2857 | skb_size = tp->rx_pkt_buf_sz; |
2620 | break; | 2858 | break; |
2621 | 2859 | ||
2622 | case RXD_OPAQUE_RING_JUMBO: | 2860 | case RXD_OPAQUE_RING_JUMBO: |
@@ -2884,11 +3122,8 @@ static int tg3_poll(struct net_device *netdev, int *budget) | |||
2884 | { | 3122 | { |
2885 | struct tg3 *tp = netdev_priv(netdev); | 3123 | struct tg3 *tp = netdev_priv(netdev); |
2886 | struct tg3_hw_status *sblk = tp->hw_status; | 3124 | struct tg3_hw_status *sblk = tp->hw_status; |
2887 | unsigned long flags; | ||
2888 | int done; | 3125 | int done; |
2889 | 3126 | ||
2890 | spin_lock_irqsave(&tp->lock, flags); | ||
2891 | |||
2892 | /* handle link change and other phy events */ | 3127 | /* handle link change and other phy events */ |
2893 | if (!(tp->tg3_flags & | 3128 | if (!(tp->tg3_flags & |
2894 | (TG3_FLAG_USE_LINKCHG_REG | | 3129 | (TG3_FLAG_USE_LINKCHG_REG | |
@@ -2896,7 +3131,9 @@ static int tg3_poll(struct net_device *netdev, int *budget) | |||
2896 | if (sblk->status & SD_STATUS_LINK_CHG) { | 3131 | if (sblk->status & SD_STATUS_LINK_CHG) { |
2897 | sblk->status = SD_STATUS_UPDATED | | 3132 | sblk->status = SD_STATUS_UPDATED | |
2898 | (sblk->status & ~SD_STATUS_LINK_CHG); | 3133 | (sblk->status & ~SD_STATUS_LINK_CHG); |
3134 | spin_lock(&tp->lock); | ||
2899 | tg3_setup_phy(tp, 0); | 3135 | tg3_setup_phy(tp, 0); |
3136 | spin_unlock(&tp->lock); | ||
2900 | } | 3137 | } |
2901 | } | 3138 | } |
2902 | 3139 | ||
@@ -2907,8 +3144,6 @@ static int tg3_poll(struct net_device *netdev, int *budget) | |||
2907 | spin_unlock(&tp->tx_lock); | 3144 | spin_unlock(&tp->tx_lock); |
2908 | } | 3145 | } |
2909 | 3146 | ||
2910 | spin_unlock_irqrestore(&tp->lock, flags); | ||
2911 | |||
2912 | /* run RX thread, within the bounds set by NAPI. | 3147 | /* run RX thread, within the bounds set by NAPI. |
2913 | * All RX "locking" is done by ensuring outside | 3148 | * All RX "locking" is done by ensuring outside |
2914 | * code synchronizes with dev->poll() | 3149 | * code synchronizes with dev->poll() |
@@ -2929,19 +3164,54 @@ static int tg3_poll(struct net_device *netdev, int *budget) | |||
2929 | if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) | 3164 | if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) |
2930 | tp->last_tag = sblk->status_tag; | 3165 | tp->last_tag = sblk->status_tag; |
2931 | rmb(); | 3166 | rmb(); |
3167 | sblk->status &= ~SD_STATUS_UPDATED; | ||
2932 | 3168 | ||
2933 | /* if no more work, tell net stack and NIC we're done */ | 3169 | /* if no more work, tell net stack and NIC we're done */ |
2934 | done = !tg3_has_work(tp); | 3170 | done = !tg3_has_work(tp); |
2935 | if (done) { | 3171 | if (done) { |
2936 | spin_lock_irqsave(&tp->lock, flags); | 3172 | spin_lock(&tp->lock); |
2937 | __netif_rx_complete(netdev); | 3173 | netif_rx_complete(netdev); |
2938 | tg3_restart_ints(tp); | 3174 | tg3_restart_ints(tp); |
2939 | spin_unlock_irqrestore(&tp->lock, flags); | 3175 | spin_unlock(&tp->lock); |
2940 | } | 3176 | } |
2941 | 3177 | ||
2942 | return (done ? 0 : 1); | 3178 | return (done ? 0 : 1); |
2943 | } | 3179 | } |
2944 | 3180 | ||
3181 | static void tg3_irq_quiesce(struct tg3 *tp) | ||
3182 | { | ||
3183 | BUG_ON(tp->irq_sync); | ||
3184 | |||
3185 | tp->irq_sync = 1; | ||
3186 | smp_mb(); | ||
3187 | |||
3188 | synchronize_irq(tp->pdev->irq); | ||
3189 | } | ||
3190 | |||
3191 | static inline int tg3_irq_sync(struct tg3 *tp) | ||
3192 | { | ||
3193 | return tp->irq_sync; | ||
3194 | } | ||
3195 | |||
3196 | /* Fully shutdown all tg3 driver activity elsewhere in the system. | ||
3197 | * If irq_sync is non-zero, then the IRQ handler must be synchronized | ||
3198 | * with as well. Most of the time, this is not necessary except when | ||
3199 | * shutting down the device. | ||
3200 | */ | ||
3201 | static inline void tg3_full_lock(struct tg3 *tp, int irq_sync) | ||
3202 | { | ||
3203 | if (irq_sync) | ||
3204 | tg3_irq_quiesce(tp); | ||
3205 | spin_lock_bh(&tp->lock); | ||
3206 | spin_lock(&tp->tx_lock); | ||
3207 | } | ||
3208 | |||
3209 | static inline void tg3_full_unlock(struct tg3 *tp) | ||
3210 | { | ||
3211 | spin_unlock(&tp->tx_lock); | ||
3212 | spin_unlock_bh(&tp->lock); | ||
3213 | } | ||
3214 | |||
2945 | /* MSI ISR - No need to check for interrupt sharing and no need to | 3215 | /* MSI ISR - No need to check for interrupt sharing and no need to |
2946 | * flush status block and interrupt mailbox. PCI ordering rules | 3216 | * flush status block and interrupt mailbox. PCI ordering rules |
2947 | * guarantee that MSI will arrive after the status block. | 3217 | * guarantee that MSI will arrive after the status block. |
@@ -2951,9 +3221,6 @@ static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs) | |||
2951 | struct net_device *dev = dev_id; | 3221 | struct net_device *dev = dev_id; |
2952 | struct tg3 *tp = netdev_priv(dev); | 3222 | struct tg3 *tp = netdev_priv(dev); |
2953 | struct tg3_hw_status *sblk = tp->hw_status; | 3223 | struct tg3_hw_status *sblk = tp->hw_status; |
2954 | unsigned long flags; | ||
2955 | |||
2956 | spin_lock_irqsave(&tp->lock, flags); | ||
2957 | 3224 | ||
2958 | /* | 3225 | /* |
2959 | * Writing any value to intr-mbox-0 clears PCI INTA# and | 3226 | * Writing any value to intr-mbox-0 clears PCI INTA# and |
@@ -2964,6 +3231,9 @@ static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs) | |||
2964 | */ | 3231 | */ |
2965 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); | 3232 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); |
2966 | tp->last_tag = sblk->status_tag; | 3233 | tp->last_tag = sblk->status_tag; |
3234 | rmb(); | ||
3235 | if (tg3_irq_sync(tp)) | ||
3236 | goto out; | ||
2967 | sblk->status &= ~SD_STATUS_UPDATED; | 3237 | sblk->status &= ~SD_STATUS_UPDATED; |
2968 | if (likely(tg3_has_work(tp))) | 3238 | if (likely(tg3_has_work(tp))) |
2969 | netif_rx_schedule(dev); /* schedule NAPI poll */ | 3239 | netif_rx_schedule(dev); /* schedule NAPI poll */ |
@@ -2972,9 +3242,7 @@ static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs) | |||
2972 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | 3242 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, |
2973 | tp->last_tag << 24); | 3243 | tp->last_tag << 24); |
2974 | } | 3244 | } |
2975 | 3245 | out: | |
2976 | spin_unlock_irqrestore(&tp->lock, flags); | ||
2977 | |||
2978 | return IRQ_RETVAL(1); | 3246 | return IRQ_RETVAL(1); |
2979 | } | 3247 | } |
2980 | 3248 | ||
@@ -2983,11 +3251,8 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
2983 | struct net_device *dev = dev_id; | 3251 | struct net_device *dev = dev_id; |
2984 | struct tg3 *tp = netdev_priv(dev); | 3252 | struct tg3 *tp = netdev_priv(dev); |
2985 | struct tg3_hw_status *sblk = tp->hw_status; | 3253 | struct tg3_hw_status *sblk = tp->hw_status; |
2986 | unsigned long flags; | ||
2987 | unsigned int handled = 1; | 3254 | unsigned int handled = 1; |
2988 | 3255 | ||
2989 | spin_lock_irqsave(&tp->lock, flags); | ||
2990 | |||
2991 | /* In INTx mode, it is possible for the interrupt to arrive at | 3256 | /* In INTx mode, it is possible for the interrupt to arrive at |
2992 | * the CPU before the status block posted prior to the interrupt. | 3257 | * the CPU before the status block posted prior to the interrupt. |
2993 | * Reading the PCI State register will confirm whether the | 3258 | * Reading the PCI State register will confirm whether the |
@@ -3004,6 +3269,8 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
3004 | */ | 3269 | */ |
3005 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | 3270 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, |
3006 | 0x00000001); | 3271 | 0x00000001); |
3272 | if (tg3_irq_sync(tp)) | ||
3273 | goto out; | ||
3007 | sblk->status &= ~SD_STATUS_UPDATED; | 3274 | sblk->status &= ~SD_STATUS_UPDATED; |
3008 | if (likely(tg3_has_work(tp))) | 3275 | if (likely(tg3_has_work(tp))) |
3009 | netif_rx_schedule(dev); /* schedule NAPI poll */ | 3276 | netif_rx_schedule(dev); /* schedule NAPI poll */ |
@@ -3018,9 +3285,7 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
3018 | } else { /* shared interrupt */ | 3285 | } else { /* shared interrupt */ |
3019 | handled = 0; | 3286 | handled = 0; |
3020 | } | 3287 | } |
3021 | 3288 | out: | |
3022 | spin_unlock_irqrestore(&tp->lock, flags); | ||
3023 | |||
3024 | return IRQ_RETVAL(handled); | 3289 | return IRQ_RETVAL(handled); |
3025 | } | 3290 | } |
3026 | 3291 | ||
@@ -3029,11 +3294,8 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id, struct pt_regs *r | |||
3029 | struct net_device *dev = dev_id; | 3294 | struct net_device *dev = dev_id; |
3030 | struct tg3 *tp = netdev_priv(dev); | 3295 | struct tg3 *tp = netdev_priv(dev); |
3031 | struct tg3_hw_status *sblk = tp->hw_status; | 3296 | struct tg3_hw_status *sblk = tp->hw_status; |
3032 | unsigned long flags; | ||
3033 | unsigned int handled = 1; | 3297 | unsigned int handled = 1; |
3034 | 3298 | ||
3035 | spin_lock_irqsave(&tp->lock, flags); | ||
3036 | |||
3037 | /* In INTx mode, it is possible for the interrupt to arrive at | 3299 | /* In INTx mode, it is possible for the interrupt to arrive at |
3038 | * the CPU before the status block posted prior to the interrupt. | 3300 | * the CPU before the status block posted prior to the interrupt. |
3039 | * Reading the PCI State register will confirm whether the | 3301 | * Reading the PCI State register will confirm whether the |
@@ -3051,6 +3313,9 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id, struct pt_regs *r | |||
3051 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, | 3313 | tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, |
3052 | 0x00000001); | 3314 | 0x00000001); |
3053 | tp->last_tag = sblk->status_tag; | 3315 | tp->last_tag = sblk->status_tag; |
3316 | rmb(); | ||
3317 | if (tg3_irq_sync(tp)) | ||
3318 | goto out; | ||
3054 | sblk->status &= ~SD_STATUS_UPDATED; | 3319 | sblk->status &= ~SD_STATUS_UPDATED; |
3055 | if (likely(tg3_has_work(tp))) | 3320 | if (likely(tg3_has_work(tp))) |
3056 | netif_rx_schedule(dev); /* schedule NAPI poll */ | 3321 | netif_rx_schedule(dev); /* schedule NAPI poll */ |
@@ -3065,9 +3330,7 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id, struct pt_regs *r | |||
3065 | } else { /* shared interrupt */ | 3330 | } else { /* shared interrupt */ |
3066 | handled = 0; | 3331 | handled = 0; |
3067 | } | 3332 | } |
3068 | 3333 | out: | |
3069 | spin_unlock_irqrestore(&tp->lock, flags); | ||
3070 | |||
3071 | return IRQ_RETVAL(handled); | 3334 | return IRQ_RETVAL(handled); |
3072 | } | 3335 | } |
3073 | 3336 | ||
@@ -3106,8 +3369,7 @@ static void tg3_reset_task(void *_data) | |||
3106 | 3369 | ||
3107 | tg3_netif_stop(tp); | 3370 | tg3_netif_stop(tp); |
3108 | 3371 | ||
3109 | spin_lock_irq(&tp->lock); | 3372 | tg3_full_lock(tp, 1); |
3110 | spin_lock(&tp->tx_lock); | ||
3111 | 3373 | ||
3112 | restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; | 3374 | restart_timer = tp->tg3_flags2 & TG3_FLG2_RESTART_TIMER; |
3113 | tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; | 3375 | tp->tg3_flags2 &= ~TG3_FLG2_RESTART_TIMER; |
@@ -3117,8 +3379,7 @@ static void tg3_reset_task(void *_data) | |||
3117 | 3379 | ||
3118 | tg3_netif_start(tp); | 3380 | tg3_netif_start(tp); |
3119 | 3381 | ||
3120 | spin_unlock(&tp->tx_lock); | 3382 | tg3_full_unlock(tp); |
3121 | spin_unlock_irq(&tp->lock); | ||
3122 | 3383 | ||
3123 | if (restart_timer) | 3384 | if (restart_timer) |
3124 | mod_timer(&tp->timer, jiffies + 1); | 3385 | mod_timer(&tp->timer, jiffies + 1); |
@@ -3224,39 +3485,21 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3224 | unsigned int i; | 3485 | unsigned int i; |
3225 | u32 len, entry, base_flags, mss; | 3486 | u32 len, entry, base_flags, mss; |
3226 | int would_hit_hwbug; | 3487 | int would_hit_hwbug; |
3227 | unsigned long flags; | ||
3228 | 3488 | ||
3229 | len = skb_headlen(skb); | 3489 | len = skb_headlen(skb); |
3230 | 3490 | ||
3231 | /* No BH disabling for tx_lock here. We are running in BH disabled | 3491 | /* No BH disabling for tx_lock here. We are running in BH disabled |
3232 | * context and TX reclaim runs via tp->poll inside of a software | 3492 | * context and TX reclaim runs via tp->poll inside of a software |
3233 | * interrupt. Rejoice! | 3493 | * interrupt. Furthermore, IRQ processing runs lockless so we have |
3234 | * | 3494 | * no IRQ context deadlocks to worry about either. Rejoice! |
3235 | * Actually, things are not so simple. If we are to take a hw | ||
3236 | * IRQ here, we can deadlock, consider: | ||
3237 | * | ||
3238 | * CPU1 CPU2 | ||
3239 | * tg3_start_xmit | ||
3240 | * take tp->tx_lock | ||
3241 | * tg3_timer | ||
3242 | * take tp->lock | ||
3243 | * tg3_interrupt | ||
3244 | * spin on tp->lock | ||
3245 | * spin on tp->tx_lock | ||
3246 | * | ||
3247 | * So we really do need to disable interrupts when taking | ||
3248 | * tx_lock here. | ||
3249 | */ | 3495 | */ |
3250 | local_irq_save(flags); | 3496 | if (!spin_trylock(&tp->tx_lock)) |
3251 | if (!spin_trylock(&tp->tx_lock)) { | ||
3252 | local_irq_restore(flags); | ||
3253 | return NETDEV_TX_LOCKED; | 3497 | return NETDEV_TX_LOCKED; |
3254 | } | ||
3255 | 3498 | ||
3256 | /* This is a hard error, log it. */ | 3499 | /* This is a hard error, log it. */ |
3257 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) { | 3500 | if (unlikely(TX_BUFFS_AVAIL(tp) <= (skb_shinfo(skb)->nr_frags + 1))) { |
3258 | netif_stop_queue(dev); | 3501 | netif_stop_queue(dev); |
3259 | spin_unlock_irqrestore(&tp->tx_lock, flags); | 3502 | spin_unlock(&tp->tx_lock); |
3260 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n", | 3503 | printk(KERN_ERR PFX "%s: BUG! Tx Ring full when queue awake!\n", |
3261 | dev->name); | 3504 | dev->name); |
3262 | return NETDEV_TX_BUSY; | 3505 | return NETDEV_TX_BUSY; |
@@ -3421,7 +3664,7 @@ static int tg3_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
3421 | 3664 | ||
3422 | out_unlock: | 3665 | out_unlock: |
3423 | mmiowb(); | 3666 | mmiowb(); |
3424 | spin_unlock_irqrestore(&tp->tx_lock, flags); | 3667 | spin_unlock(&tp->tx_lock); |
3425 | 3668 | ||
3426 | dev->trans_start = jiffies; | 3669 | dev->trans_start = jiffies; |
3427 | 3670 | ||
@@ -3433,10 +3676,18 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, | |||
3433 | { | 3676 | { |
3434 | dev->mtu = new_mtu; | 3677 | dev->mtu = new_mtu; |
3435 | 3678 | ||
3436 | if (new_mtu > ETH_DATA_LEN) | 3679 | if (new_mtu > ETH_DATA_LEN) { |
3437 | tp->tg3_flags |= TG3_FLAG_JUMBO_ENABLE; | 3680 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { |
3438 | else | 3681 | tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; |
3439 | tp->tg3_flags &= ~TG3_FLAG_JUMBO_ENABLE; | 3682 | ethtool_op_set_tso(dev, 0); |
3683 | } | ||
3684 | else | ||
3685 | tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE; | ||
3686 | } else { | ||
3687 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) | ||
3688 | tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; | ||
3689 | tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE; | ||
3690 | } | ||
3440 | } | 3691 | } |
3441 | 3692 | ||
3442 | static int tg3_change_mtu(struct net_device *dev, int new_mtu) | 3693 | static int tg3_change_mtu(struct net_device *dev, int new_mtu) |
@@ -3455,8 +3706,8 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu) | |||
3455 | } | 3706 | } |
3456 | 3707 | ||
3457 | tg3_netif_stop(tp); | 3708 | tg3_netif_stop(tp); |
3458 | spin_lock_irq(&tp->lock); | 3709 | |
3459 | spin_lock(&tp->tx_lock); | 3710 | tg3_full_lock(tp, 1); |
3460 | 3711 | ||
3461 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); | 3712 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
3462 | 3713 | ||
@@ -3466,8 +3717,7 @@ static int tg3_change_mtu(struct net_device *dev, int new_mtu) | |||
3466 | 3717 | ||
3467 | tg3_netif_start(tp); | 3718 | tg3_netif_start(tp); |
3468 | 3719 | ||
3469 | spin_unlock(&tp->tx_lock); | 3720 | tg3_full_unlock(tp); |
3470 | spin_unlock_irq(&tp->lock); | ||
3471 | 3721 | ||
3472 | return 0; | 3722 | return 0; |
3473 | } | 3723 | } |
@@ -3491,7 +3741,7 @@ static void tg3_free_rings(struct tg3 *tp) | |||
3491 | continue; | 3741 | continue; |
3492 | pci_unmap_single(tp->pdev, | 3742 | pci_unmap_single(tp->pdev, |
3493 | pci_unmap_addr(rxp, mapping), | 3743 | pci_unmap_addr(rxp, mapping), |
3494 | RX_PKT_BUF_SZ - tp->rx_offset, | 3744 | tp->rx_pkt_buf_sz - tp->rx_offset, |
3495 | PCI_DMA_FROMDEVICE); | 3745 | PCI_DMA_FROMDEVICE); |
3496 | dev_kfree_skb_any(rxp->skb); | 3746 | dev_kfree_skb_any(rxp->skb); |
3497 | rxp->skb = NULL; | 3747 | rxp->skb = NULL; |
@@ -3564,6 +3814,11 @@ static void tg3_init_rings(struct tg3 *tp) | |||
3564 | memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp)); | 3814 | memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp)); |
3565 | memset(tp->tx_ring, 0, TG3_TX_RING_BYTES); | 3815 | memset(tp->tx_ring, 0, TG3_TX_RING_BYTES); |
3566 | 3816 | ||
3817 | tp->rx_pkt_buf_sz = RX_PKT_BUF_SZ; | ||
3818 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) && | ||
3819 | (tp->dev->mtu > ETH_DATA_LEN)) | ||
3820 | tp->rx_pkt_buf_sz = RX_JUMBO_PKT_BUF_SZ; | ||
3821 | |||
3567 | /* Initialize invariants of the rings, we only set this | 3822 | /* Initialize invariants of the rings, we only set this |
3568 | * stuff once. This works because the card does not | 3823 | * stuff once. This works because the card does not |
3569 | * write into the rx buffer posting rings. | 3824 | * write into the rx buffer posting rings. |
@@ -3572,14 +3827,14 @@ static void tg3_init_rings(struct tg3 *tp) | |||
3572 | struct tg3_rx_buffer_desc *rxd; | 3827 | struct tg3_rx_buffer_desc *rxd; |
3573 | 3828 | ||
3574 | rxd = &tp->rx_std[i]; | 3829 | rxd = &tp->rx_std[i]; |
3575 | rxd->idx_len = (RX_PKT_BUF_SZ - tp->rx_offset - 64) | 3830 | rxd->idx_len = (tp->rx_pkt_buf_sz - tp->rx_offset - 64) |
3576 | << RXD_LEN_SHIFT; | 3831 | << RXD_LEN_SHIFT; |
3577 | rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT); | 3832 | rxd->type_flags = (RXD_FLAG_END << RXD_FLAGS_SHIFT); |
3578 | rxd->opaque = (RXD_OPAQUE_RING_STD | | 3833 | rxd->opaque = (RXD_OPAQUE_RING_STD | |
3579 | (i << RXD_OPAQUE_INDEX_SHIFT)); | 3834 | (i << RXD_OPAQUE_INDEX_SHIFT)); |
3580 | } | 3835 | } |
3581 | 3836 | ||
3582 | if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) { | 3837 | if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) { |
3583 | for (i = 0; i < TG3_RX_JUMBO_RING_SIZE; i++) { | 3838 | for (i = 0; i < TG3_RX_JUMBO_RING_SIZE; i++) { |
3584 | struct tg3_rx_buffer_desc *rxd; | 3839 | struct tg3_rx_buffer_desc *rxd; |
3585 | 3840 | ||
@@ -3600,7 +3855,7 @@ static void tg3_init_rings(struct tg3 *tp) | |||
3600 | break; | 3855 | break; |
3601 | } | 3856 | } |
3602 | 3857 | ||
3603 | if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) { | 3858 | if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) { |
3604 | for (i = 0; i < tp->rx_jumbo_pending; i++) { | 3859 | for (i = 0; i < tp->rx_jumbo_pending; i++) { |
3605 | if (tg3_alloc_rx_skb(tp, RXD_OPAQUE_RING_JUMBO, | 3860 | if (tg3_alloc_rx_skb(tp, RXD_OPAQUE_RING_JUMBO, |
3606 | -1, i) < 0) | 3861 | -1, i) < 0) |
@@ -4056,7 +4311,30 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4056 | val &= ~PCIX_CAPS_RELAXED_ORDERING; | 4311 | val &= ~PCIX_CAPS_RELAXED_ORDERING; |
4057 | pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val); | 4312 | pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val); |
4058 | 4313 | ||
4059 | tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); | 4314 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { |
4315 | u32 val; | ||
4316 | |||
4317 | /* Chip reset on 5780 will reset MSI enable bit, | ||
4318 | * so need to restore it. | ||
4319 | */ | ||
4320 | if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { | ||
4321 | u16 ctrl; | ||
4322 | |||
4323 | pci_read_config_word(tp->pdev, | ||
4324 | tp->msi_cap + PCI_MSI_FLAGS, | ||
4325 | &ctrl); | ||
4326 | pci_write_config_word(tp->pdev, | ||
4327 | tp->msi_cap + PCI_MSI_FLAGS, | ||
4328 | ctrl | PCI_MSI_FLAGS_ENABLE); | ||
4329 | val = tr32(MSGINT_MODE); | ||
4330 | tw32(MSGINT_MODE, val | MSGINT_MODE_ENABLE); | ||
4331 | } | ||
4332 | |||
4333 | val = tr32(MEMARB_MODE); | ||
4334 | tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE); | ||
4335 | |||
4336 | } else | ||
4337 | tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); | ||
4060 | 4338 | ||
4061 | if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) { | 4339 | if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) { |
4062 | tg3_stop_fw(tp); | 4340 | tg3_stop_fw(tp); |
@@ -4082,6 +4360,9 @@ static int tg3_chip_reset(struct tg3 *tp) | |||
4082 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { | 4360 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { |
4083 | tp->mac_mode = MAC_MODE_PORT_MODE_TBI; | 4361 | tp->mac_mode = MAC_MODE_PORT_MODE_TBI; |
4084 | tw32_f(MAC_MODE, tp->mac_mode); | 4362 | tw32_f(MAC_MODE, tp->mac_mode); |
4363 | } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) { | ||
4364 | tp->mac_mode = MAC_MODE_PORT_MODE_GMII; | ||
4365 | tw32_f(MAC_MODE, tp->mac_mode); | ||
4085 | } else | 4366 | } else |
4086 | tw32_f(MAC_MODE, 0); | 4367 | tw32_f(MAC_MODE, 0); |
4087 | udelay(40); | 4368 | udelay(40); |
@@ -5088,9 +5369,9 @@ static int tg3_set_mac_addr(struct net_device *dev, void *p) | |||
5088 | 5369 | ||
5089 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | 5370 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); |
5090 | 5371 | ||
5091 | spin_lock_irq(&tp->lock); | 5372 | spin_lock_bh(&tp->lock); |
5092 | __tg3_set_mac_addr(tp); | 5373 | __tg3_set_mac_addr(tp); |
5093 | spin_unlock_irq(&tp->lock); | 5374 | spin_unlock_bh(&tp->lock); |
5094 | 5375 | ||
5095 | return 0; | 5376 | return 0; |
5096 | } | 5377 | } |
@@ -5117,7 +5398,7 @@ static void tg3_set_bdinfo(struct tg3 *tp, u32 bdinfo_addr, | |||
5117 | } | 5398 | } |
5118 | 5399 | ||
5119 | static void __tg3_set_rx_mode(struct net_device *); | 5400 | static void __tg3_set_rx_mode(struct net_device *); |
5120 | static void tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec) | 5401 | static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec) |
5121 | { | 5402 | { |
5122 | tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs); | 5403 | tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs); |
5123 | tw32(HOSTCC_TXCOL_TICKS, ec->tx_coalesce_usecs); | 5404 | tw32(HOSTCC_TXCOL_TICKS, ec->tx_coalesce_usecs); |
@@ -5245,7 +5526,7 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5245 | } | 5526 | } |
5246 | #endif | 5527 | #endif |
5247 | 5528 | ||
5248 | if (!(tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE)) { | 5529 | if (tp->dev->mtu <= ETH_DATA_LEN) { |
5249 | tw32(BUFMGR_MB_RDMA_LOW_WATER, | 5530 | tw32(BUFMGR_MB_RDMA_LOW_WATER, |
5250 | tp->bufmgr_config.mbuf_read_dma_low_water); | 5531 | tp->bufmgr_config.mbuf_read_dma_low_water); |
5251 | tw32(BUFMGR_MB_MACRX_LOW_WATER, | 5532 | tw32(BUFMGR_MB_MACRX_LOW_WATER, |
@@ -5320,7 +5601,7 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5320 | /* Setup replenish threshold. */ | 5601 | /* Setup replenish threshold. */ |
5321 | tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8); | 5602 | tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8); |
5322 | 5603 | ||
5323 | if (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) { | 5604 | if (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) { |
5324 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH, | 5605 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH, |
5325 | ((u64) tp->rx_jumbo_mapping >> 32)); | 5606 | ((u64) tp->rx_jumbo_mapping >> 32)); |
5326 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, | 5607 | tw32(RCVDBDI_JUMBO_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW, |
@@ -5381,7 +5662,7 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5381 | tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW, | 5662 | tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW, |
5382 | tp->rx_std_ptr); | 5663 | tp->rx_std_ptr); |
5383 | 5664 | ||
5384 | tp->rx_jumbo_ptr = (tp->tg3_flags & TG3_FLAG_JUMBO_ENABLE) ? | 5665 | tp->rx_jumbo_ptr = (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) ? |
5385 | tp->rx_jumbo_pending : 0; | 5666 | tp->rx_jumbo_pending : 0; |
5386 | tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW, | 5667 | tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW, |
5387 | tp->rx_jumbo_ptr); | 5668 | tp->rx_jumbo_ptr); |
@@ -5460,7 +5741,7 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5460 | udelay(10); | 5741 | udelay(10); |
5461 | } | 5742 | } |
5462 | 5743 | ||
5463 | tg3_set_coalesce(tp, &tp->coal); | 5744 | __tg3_set_coalesce(tp, &tp->coal); |
5464 | 5745 | ||
5465 | /* set status block DMA address */ | 5746 | /* set status block DMA address */ |
5466 | tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, | 5747 | tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH, |
@@ -5683,7 +5964,8 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5683 | tw32(MAC_RCV_RULE_1, 0x86000004 & RCV_RULE_DISABLE_MASK); | 5964 | tw32(MAC_RCV_RULE_1, 0x86000004 & RCV_RULE_DISABLE_MASK); |
5684 | tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK); | 5965 | tw32(MAC_RCV_VALUE_1, 0xffffffff & RCV_RULE_DISABLE_MASK); |
5685 | 5966 | ||
5686 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) | 5967 | if ((tp->tg3_flags2 & TG3_FLG2_5705_PLUS) && |
5968 | (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780)) | ||
5687 | limit = 8; | 5969 | limit = 8; |
5688 | else | 5970 | else |
5689 | limit = 16; | 5971 | limit = 16; |
@@ -5727,9 +6009,6 @@ static int tg3_reset_hw(struct tg3 *tp) | |||
5727 | 6009 | ||
5728 | tg3_write_sig_post_reset(tp, RESET_KIND_INIT); | 6010 | tg3_write_sig_post_reset(tp, RESET_KIND_INIT); |
5729 | 6011 | ||
5730 | if (tp->tg3_flags & TG3_FLAG_INIT_COMPLETE) | ||
5731 | tg3_enable_ints(tp); | ||
5732 | |||
5733 | return 0; | 6012 | return 0; |
5734 | } | 6013 | } |
5735 | 6014 | ||
@@ -5802,10 +6081,8 @@ static void tg3_periodic_fetch_stats(struct tg3 *tp) | |||
5802 | static void tg3_timer(unsigned long __opaque) | 6081 | static void tg3_timer(unsigned long __opaque) |
5803 | { | 6082 | { |
5804 | struct tg3 *tp = (struct tg3 *) __opaque; | 6083 | struct tg3 *tp = (struct tg3 *) __opaque; |
5805 | unsigned long flags; | ||
5806 | 6084 | ||
5807 | spin_lock_irqsave(&tp->lock, flags); | 6085 | spin_lock(&tp->lock); |
5808 | spin_lock(&tp->tx_lock); | ||
5809 | 6086 | ||
5810 | if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) { | 6087 | if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) { |
5811 | /* All of this garbage is because when using non-tagged | 6088 | /* All of this garbage is because when using non-tagged |
@@ -5822,8 +6099,7 @@ static void tg3_timer(unsigned long __opaque) | |||
5822 | 6099 | ||
5823 | if (!(tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { | 6100 | if (!(tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { |
5824 | tp->tg3_flags2 |= TG3_FLG2_RESTART_TIMER; | 6101 | tp->tg3_flags2 |= TG3_FLG2_RESTART_TIMER; |
5825 | spin_unlock(&tp->tx_lock); | 6102 | spin_unlock(&tp->lock); |
5826 | spin_unlock_irqrestore(&tp->lock, flags); | ||
5827 | schedule_work(&tp->reset_task); | 6103 | schedule_work(&tp->reset_task); |
5828 | return; | 6104 | return; |
5829 | } | 6105 | } |
@@ -5871,7 +6147,8 @@ static void tg3_timer(unsigned long __opaque) | |||
5871 | udelay(40); | 6147 | udelay(40); |
5872 | tg3_setup_phy(tp, 0); | 6148 | tg3_setup_phy(tp, 0); |
5873 | } | 6149 | } |
5874 | } | 6150 | } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) |
6151 | tg3_serdes_parallel_detect(tp); | ||
5875 | 6152 | ||
5876 | tp->timer_counter = tp->timer_multiplier; | 6153 | tp->timer_counter = tp->timer_multiplier; |
5877 | } | 6154 | } |
@@ -5891,8 +6168,7 @@ static void tg3_timer(unsigned long __opaque) | |||
5891 | tp->asf_counter = tp->asf_multiplier; | 6168 | tp->asf_counter = tp->asf_multiplier; |
5892 | } | 6169 | } |
5893 | 6170 | ||
5894 | spin_unlock(&tp->tx_lock); | 6171 | spin_unlock(&tp->lock); |
5895 | spin_unlock_irqrestore(&tp->lock, flags); | ||
5896 | 6172 | ||
5897 | tp->timer.expires = jiffies + tp->timer_offset; | 6173 | tp->timer.expires = jiffies + tp->timer_offset; |
5898 | add_timer(&tp->timer); | 6174 | add_timer(&tp->timer); |
@@ -6007,14 +6283,12 @@ static int tg3_test_msi(struct tg3 *tp) | |||
6007 | /* Need to reset the chip because the MSI cycle may have terminated | 6283 | /* Need to reset the chip because the MSI cycle may have terminated |
6008 | * with Master Abort. | 6284 | * with Master Abort. |
6009 | */ | 6285 | */ |
6010 | spin_lock_irq(&tp->lock); | 6286 | tg3_full_lock(tp, 1); |
6011 | spin_lock(&tp->tx_lock); | ||
6012 | 6287 | ||
6013 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); | 6288 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
6014 | err = tg3_init_hw(tp); | 6289 | err = tg3_init_hw(tp); |
6015 | 6290 | ||
6016 | spin_unlock(&tp->tx_lock); | 6291 | tg3_full_unlock(tp); |
6017 | spin_unlock_irq(&tp->lock); | ||
6018 | 6292 | ||
6019 | if (err) | 6293 | if (err) |
6020 | free_irq(tp->pdev->irq, dev); | 6294 | free_irq(tp->pdev->irq, dev); |
@@ -6027,14 +6301,12 @@ static int tg3_open(struct net_device *dev) | |||
6027 | struct tg3 *tp = netdev_priv(dev); | 6301 | struct tg3 *tp = netdev_priv(dev); |
6028 | int err; | 6302 | int err; |
6029 | 6303 | ||
6030 | spin_lock_irq(&tp->lock); | 6304 | tg3_full_lock(tp, 0); |
6031 | spin_lock(&tp->tx_lock); | ||
6032 | 6305 | ||
6033 | tg3_disable_ints(tp); | 6306 | tg3_disable_ints(tp); |
6034 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | 6307 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; |
6035 | 6308 | ||
6036 | spin_unlock(&tp->tx_lock); | 6309 | tg3_full_unlock(tp); |
6037 | spin_unlock_irq(&tp->lock); | ||
6038 | 6310 | ||
6039 | /* The placement of this call is tied | 6311 | /* The placement of this call is tied |
6040 | * to the setup and use of Host TX descriptors. | 6312 | * to the setup and use of Host TX descriptors. |
@@ -6081,8 +6353,7 @@ static int tg3_open(struct net_device *dev) | |||
6081 | return err; | 6353 | return err; |
6082 | } | 6354 | } |
6083 | 6355 | ||
6084 | spin_lock_irq(&tp->lock); | 6356 | tg3_full_lock(tp, 0); |
6085 | spin_lock(&tp->tx_lock); | ||
6086 | 6357 | ||
6087 | err = tg3_init_hw(tp); | 6358 | err = tg3_init_hw(tp); |
6088 | if (err) { | 6359 | if (err) { |
@@ -6106,8 +6377,7 @@ static int tg3_open(struct net_device *dev) | |||
6106 | tp->timer.function = tg3_timer; | 6377 | tp->timer.function = tg3_timer; |
6107 | } | 6378 | } |
6108 | 6379 | ||
6109 | spin_unlock(&tp->tx_lock); | 6380 | tg3_full_unlock(tp); |
6110 | spin_unlock_irq(&tp->lock); | ||
6111 | 6381 | ||
6112 | if (err) { | 6382 | if (err) { |
6113 | free_irq(tp->pdev->irq, dev); | 6383 | free_irq(tp->pdev->irq, dev); |
@@ -6123,8 +6393,7 @@ static int tg3_open(struct net_device *dev) | |||
6123 | err = tg3_test_msi(tp); | 6393 | err = tg3_test_msi(tp); |
6124 | 6394 | ||
6125 | if (err) { | 6395 | if (err) { |
6126 | spin_lock_irq(&tp->lock); | 6396 | tg3_full_lock(tp, 0); |
6127 | spin_lock(&tp->tx_lock); | ||
6128 | 6397 | ||
6129 | if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { | 6398 | if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { |
6130 | pci_disable_msi(tp->pdev); | 6399 | pci_disable_msi(tp->pdev); |
@@ -6134,22 +6403,19 @@ static int tg3_open(struct net_device *dev) | |||
6134 | tg3_free_rings(tp); | 6403 | tg3_free_rings(tp); |
6135 | tg3_free_consistent(tp); | 6404 | tg3_free_consistent(tp); |
6136 | 6405 | ||
6137 | spin_unlock(&tp->tx_lock); | 6406 | tg3_full_unlock(tp); |
6138 | spin_unlock_irq(&tp->lock); | ||
6139 | 6407 | ||
6140 | return err; | 6408 | return err; |
6141 | } | 6409 | } |
6142 | } | 6410 | } |
6143 | 6411 | ||
6144 | spin_lock_irq(&tp->lock); | 6412 | tg3_full_lock(tp, 0); |
6145 | spin_lock(&tp->tx_lock); | ||
6146 | 6413 | ||
6147 | add_timer(&tp->timer); | 6414 | add_timer(&tp->timer); |
6148 | tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; | 6415 | tp->tg3_flags |= TG3_FLAG_INIT_COMPLETE; |
6149 | tg3_enable_ints(tp); | 6416 | tg3_enable_ints(tp); |
6150 | 6417 | ||
6151 | spin_unlock(&tp->tx_lock); | 6418 | tg3_full_unlock(tp); |
6152 | spin_unlock_irq(&tp->lock); | ||
6153 | 6419 | ||
6154 | netif_start_queue(dev); | 6420 | netif_start_queue(dev); |
6155 | 6421 | ||
@@ -6395,8 +6661,7 @@ static int tg3_close(struct net_device *dev) | |||
6395 | 6661 | ||
6396 | del_timer_sync(&tp->timer); | 6662 | del_timer_sync(&tp->timer); |
6397 | 6663 | ||
6398 | spin_lock_irq(&tp->lock); | 6664 | tg3_full_lock(tp, 1); |
6399 | spin_lock(&tp->tx_lock); | ||
6400 | #if 0 | 6665 | #if 0 |
6401 | tg3_dump_state(tp); | 6666 | tg3_dump_state(tp); |
6402 | #endif | 6667 | #endif |
@@ -6410,8 +6675,7 @@ static int tg3_close(struct net_device *dev) | |||
6410 | TG3_FLAG_GOT_SERDES_FLOWCTL); | 6675 | TG3_FLAG_GOT_SERDES_FLOWCTL); |
6411 | netif_carrier_off(tp->dev); | 6676 | netif_carrier_off(tp->dev); |
6412 | 6677 | ||
6413 | spin_unlock(&tp->tx_lock); | 6678 | tg3_full_unlock(tp); |
6414 | spin_unlock_irq(&tp->lock); | ||
6415 | 6679 | ||
6416 | free_irq(tp->pdev->irq, dev); | 6680 | free_irq(tp->pdev->irq, dev); |
6417 | if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { | 6681 | if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { |
@@ -6448,16 +6712,15 @@ static unsigned long calc_crc_errors(struct tg3 *tp) | |||
6448 | if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) && | 6712 | if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) && |
6449 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || | 6713 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || |
6450 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)) { | 6714 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701)) { |
6451 | unsigned long flags; | ||
6452 | u32 val; | 6715 | u32 val; |
6453 | 6716 | ||
6454 | spin_lock_irqsave(&tp->lock, flags); | 6717 | spin_lock_bh(&tp->lock); |
6455 | if (!tg3_readphy(tp, 0x1e, &val)) { | 6718 | if (!tg3_readphy(tp, 0x1e, &val)) { |
6456 | tg3_writephy(tp, 0x1e, val | 0x8000); | 6719 | tg3_writephy(tp, 0x1e, val | 0x8000); |
6457 | tg3_readphy(tp, 0x14, &val); | 6720 | tg3_readphy(tp, 0x14, &val); |
6458 | } else | 6721 | } else |
6459 | val = 0; | 6722 | val = 0; |
6460 | spin_unlock_irqrestore(&tp->lock, flags); | 6723 | spin_unlock_bh(&tp->lock); |
6461 | 6724 | ||
6462 | tp->phy_crc_errors += val; | 6725 | tp->phy_crc_errors += val; |
6463 | 6726 | ||
@@ -6719,11 +6982,9 @@ static void tg3_set_rx_mode(struct net_device *dev) | |||
6719 | { | 6982 | { |
6720 | struct tg3 *tp = netdev_priv(dev); | 6983 | struct tg3 *tp = netdev_priv(dev); |
6721 | 6984 | ||
6722 | spin_lock_irq(&tp->lock); | 6985 | tg3_full_lock(tp, 0); |
6723 | spin_lock(&tp->tx_lock); | ||
6724 | __tg3_set_rx_mode(dev); | 6986 | __tg3_set_rx_mode(dev); |
6725 | spin_unlock(&tp->tx_lock); | 6987 | tg3_full_unlock(tp); |
6726 | spin_unlock_irq(&tp->lock); | ||
6727 | } | 6988 | } |
6728 | 6989 | ||
6729 | #define TG3_REGDUMP_LEN (32 * 1024) | 6990 | #define TG3_REGDUMP_LEN (32 * 1024) |
@@ -6745,8 +7006,7 @@ static void tg3_get_regs(struct net_device *dev, | |||
6745 | 7006 | ||
6746 | memset(p, 0, TG3_REGDUMP_LEN); | 7007 | memset(p, 0, TG3_REGDUMP_LEN); |
6747 | 7008 | ||
6748 | spin_lock_irq(&tp->lock); | 7009 | tg3_full_lock(tp, 0); |
6749 | spin_lock(&tp->tx_lock); | ||
6750 | 7010 | ||
6751 | #define __GET_REG32(reg) (*(p)++ = tr32(reg)) | 7011 | #define __GET_REG32(reg) (*(p)++ = tr32(reg)) |
6752 | #define GET_REG32_LOOP(base,len) \ | 7012 | #define GET_REG32_LOOP(base,len) \ |
@@ -6796,8 +7056,7 @@ do { p = (u32 *)(orig_p + (reg)); \ | |||
6796 | #undef GET_REG32_LOOP | 7056 | #undef GET_REG32_LOOP |
6797 | #undef GET_REG32_1 | 7057 | #undef GET_REG32_1 |
6798 | 7058 | ||
6799 | spin_unlock(&tp->tx_lock); | 7059 | tg3_full_unlock(tp); |
6800 | spin_unlock_irq(&tp->lock); | ||
6801 | } | 7060 | } |
6802 | 7061 | ||
6803 | static int tg3_get_eeprom_len(struct net_device *dev) | 7062 | static int tg3_get_eeprom_len(struct net_device *dev) |
@@ -6973,8 +7232,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
6973 | return -EINVAL; | 7232 | return -EINVAL; |
6974 | } | 7233 | } |
6975 | 7234 | ||
6976 | spin_lock_irq(&tp->lock); | 7235 | tg3_full_lock(tp, 0); |
6977 | spin_lock(&tp->tx_lock); | ||
6978 | 7236 | ||
6979 | tp->link_config.autoneg = cmd->autoneg; | 7237 | tp->link_config.autoneg = cmd->autoneg; |
6980 | if (cmd->autoneg == AUTONEG_ENABLE) { | 7238 | if (cmd->autoneg == AUTONEG_ENABLE) { |
@@ -6990,8 +7248,7 @@ static int tg3_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |||
6990 | if (netif_running(dev)) | 7248 | if (netif_running(dev)) |
6991 | tg3_setup_phy(tp, 1); | 7249 | tg3_setup_phy(tp, 1); |
6992 | 7250 | ||
6993 | spin_unlock(&tp->tx_lock); | 7251 | tg3_full_unlock(tp); |
6994 | spin_unlock_irq(&tp->lock); | ||
6995 | 7252 | ||
6996 | return 0; | 7253 | return 0; |
6997 | } | 7254 | } |
@@ -7027,12 +7284,12 @@ static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
7027 | !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP)) | 7284 | !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP)) |
7028 | return -EINVAL; | 7285 | return -EINVAL; |
7029 | 7286 | ||
7030 | spin_lock_irq(&tp->lock); | 7287 | spin_lock_bh(&tp->lock); |
7031 | if (wol->wolopts & WAKE_MAGIC) | 7288 | if (wol->wolopts & WAKE_MAGIC) |
7032 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; | 7289 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; |
7033 | else | 7290 | else |
7034 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; | 7291 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; |
7035 | spin_unlock_irq(&tp->lock); | 7292 | spin_unlock_bh(&tp->lock); |
7036 | 7293 | ||
7037 | return 0; | 7294 | return 0; |
7038 | } | 7295 | } |
@@ -7072,7 +7329,7 @@ static int tg3_nway_reset(struct net_device *dev) | |||
7072 | if (!netif_running(dev)) | 7329 | if (!netif_running(dev)) |
7073 | return -EAGAIN; | 7330 | return -EAGAIN; |
7074 | 7331 | ||
7075 | spin_lock_irq(&tp->lock); | 7332 | spin_lock_bh(&tp->lock); |
7076 | r = -EINVAL; | 7333 | r = -EINVAL; |
7077 | tg3_readphy(tp, MII_BMCR, &bmcr); | 7334 | tg3_readphy(tp, MII_BMCR, &bmcr); |
7078 | if (!tg3_readphy(tp, MII_BMCR, &bmcr) && | 7335 | if (!tg3_readphy(tp, MII_BMCR, &bmcr) && |
@@ -7080,7 +7337,7 @@ static int tg3_nway_reset(struct net_device *dev) | |||
7080 | tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANRESTART); | 7337 | tg3_writephy(tp, MII_BMCR, bmcr | BMCR_ANRESTART); |
7081 | r = 0; | 7338 | r = 0; |
7082 | } | 7339 | } |
7083 | spin_unlock_irq(&tp->lock); | 7340 | spin_unlock_bh(&tp->lock); |
7084 | 7341 | ||
7085 | return r; | 7342 | return r; |
7086 | } | 7343 | } |
@@ -7102,17 +7359,19 @@ static void tg3_get_ringparam(struct net_device *dev, struct ethtool_ringparam * | |||
7102 | static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) | 7359 | static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) |
7103 | { | 7360 | { |
7104 | struct tg3 *tp = netdev_priv(dev); | 7361 | struct tg3 *tp = netdev_priv(dev); |
7362 | int irq_sync = 0; | ||
7105 | 7363 | ||
7106 | if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) || | 7364 | if ((ering->rx_pending > TG3_RX_RING_SIZE - 1) || |
7107 | (ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) || | 7365 | (ering->rx_jumbo_pending > TG3_RX_JUMBO_RING_SIZE - 1) || |
7108 | (ering->tx_pending > TG3_TX_RING_SIZE - 1)) | 7366 | (ering->tx_pending > TG3_TX_RING_SIZE - 1)) |
7109 | return -EINVAL; | 7367 | return -EINVAL; |
7110 | 7368 | ||
7111 | if (netif_running(dev)) | 7369 | if (netif_running(dev)) { |
7112 | tg3_netif_stop(tp); | 7370 | tg3_netif_stop(tp); |
7371 | irq_sync = 1; | ||
7372 | } | ||
7113 | 7373 | ||
7114 | spin_lock_irq(&tp->lock); | 7374 | tg3_full_lock(tp, irq_sync); |
7115 | spin_lock(&tp->tx_lock); | ||
7116 | 7375 | ||
7117 | tp->rx_pending = ering->rx_pending; | 7376 | tp->rx_pending = ering->rx_pending; |
7118 | 7377 | ||
@@ -7128,8 +7387,7 @@ static int tg3_set_ringparam(struct net_device *dev, struct ethtool_ringparam *e | |||
7128 | tg3_netif_start(tp); | 7387 | tg3_netif_start(tp); |
7129 | } | 7388 | } |
7130 | 7389 | ||
7131 | spin_unlock(&tp->tx_lock); | 7390 | tg3_full_unlock(tp); |
7132 | spin_unlock_irq(&tp->lock); | ||
7133 | 7391 | ||
7134 | return 0; | 7392 | return 0; |
7135 | } | 7393 | } |
@@ -7146,12 +7404,15 @@ static void tg3_get_pauseparam(struct net_device *dev, struct ethtool_pauseparam | |||
7146 | static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) | 7404 | static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam *epause) |
7147 | { | 7405 | { |
7148 | struct tg3 *tp = netdev_priv(dev); | 7406 | struct tg3 *tp = netdev_priv(dev); |
7407 | int irq_sync = 0; | ||
7149 | 7408 | ||
7150 | if (netif_running(dev)) | 7409 | if (netif_running(dev)) { |
7151 | tg3_netif_stop(tp); | 7410 | tg3_netif_stop(tp); |
7411 | irq_sync = 1; | ||
7412 | } | ||
7413 | |||
7414 | tg3_full_lock(tp, irq_sync); | ||
7152 | 7415 | ||
7153 | spin_lock_irq(&tp->lock); | ||
7154 | spin_lock(&tp->tx_lock); | ||
7155 | if (epause->autoneg) | 7416 | if (epause->autoneg) |
7156 | tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG; | 7417 | tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG; |
7157 | else | 7418 | else |
@@ -7170,8 +7431,8 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam | |||
7170 | tg3_init_hw(tp); | 7431 | tg3_init_hw(tp); |
7171 | tg3_netif_start(tp); | 7432 | tg3_netif_start(tp); |
7172 | } | 7433 | } |
7173 | spin_unlock(&tp->tx_lock); | 7434 | |
7174 | spin_unlock_irq(&tp->lock); | 7435 | tg3_full_unlock(tp); |
7175 | 7436 | ||
7176 | return 0; | 7437 | return 0; |
7177 | } | 7438 | } |
@@ -7192,12 +7453,12 @@ static int tg3_set_rx_csum(struct net_device *dev, u32 data) | |||
7192 | return 0; | 7453 | return 0; |
7193 | } | 7454 | } |
7194 | 7455 | ||
7195 | spin_lock_irq(&tp->lock); | 7456 | spin_lock_bh(&tp->lock); |
7196 | if (data) | 7457 | if (data) |
7197 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; | 7458 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; |
7198 | else | 7459 | else |
7199 | tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; | 7460 | tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; |
7200 | spin_unlock_irq(&tp->lock); | 7461 | spin_unlock_bh(&tp->lock); |
7201 | 7462 | ||
7202 | return 0; | 7463 | return 0; |
7203 | } | 7464 | } |
@@ -7606,8 +7867,6 @@ static int tg3_test_loopback(struct tg3 *tp) | |||
7606 | 7867 | ||
7607 | tg3_abort_hw(tp, 1); | 7868 | tg3_abort_hw(tp, 1); |
7608 | 7869 | ||
7609 | /* Clearing this flag to keep interrupts disabled */ | ||
7610 | tp->tg3_flags &= ~TG3_FLAG_INIT_COMPLETE; | ||
7611 | tg3_reset_hw(tp); | 7870 | tg3_reset_hw(tp); |
7612 | 7871 | ||
7613 | mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) | | 7872 | mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) | |
@@ -7716,11 +7975,14 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, | |||
7716 | data[1] = 1; | 7975 | data[1] = 1; |
7717 | } | 7976 | } |
7718 | if (etest->flags & ETH_TEST_FL_OFFLINE) { | 7977 | if (etest->flags & ETH_TEST_FL_OFFLINE) { |
7719 | if (netif_running(dev)) | 7978 | int irq_sync = 0; |
7979 | |||
7980 | if (netif_running(dev)) { | ||
7720 | tg3_netif_stop(tp); | 7981 | tg3_netif_stop(tp); |
7982 | irq_sync = 1; | ||
7983 | } | ||
7721 | 7984 | ||
7722 | spin_lock_irq(&tp->lock); | 7985 | tg3_full_lock(tp, irq_sync); |
7723 | spin_lock(&tp->tx_lock); | ||
7724 | 7986 | ||
7725 | tg3_halt(tp, RESET_KIND_SUSPEND, 1); | 7987 | tg3_halt(tp, RESET_KIND_SUSPEND, 1); |
7726 | tg3_nvram_lock(tp); | 7988 | tg3_nvram_lock(tp); |
@@ -7742,14 +8004,14 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, | |||
7742 | data[4] = 1; | 8004 | data[4] = 1; |
7743 | } | 8005 | } |
7744 | 8006 | ||
7745 | spin_unlock(&tp->tx_lock); | 8007 | tg3_full_unlock(tp); |
7746 | spin_unlock_irq(&tp->lock); | 8008 | |
7747 | if (tg3_test_interrupt(tp) != 0) { | 8009 | if (tg3_test_interrupt(tp) != 0) { |
7748 | etest->flags |= ETH_TEST_FL_FAILED; | 8010 | etest->flags |= ETH_TEST_FL_FAILED; |
7749 | data[5] = 1; | 8011 | data[5] = 1; |
7750 | } | 8012 | } |
7751 | spin_lock_irq(&tp->lock); | 8013 | |
7752 | spin_lock(&tp->tx_lock); | 8014 | tg3_full_lock(tp, 0); |
7753 | 8015 | ||
7754 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); | 8016 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
7755 | if (netif_running(dev)) { | 8017 | if (netif_running(dev)) { |
@@ -7757,8 +8019,8 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, | |||
7757 | tg3_init_hw(tp); | 8019 | tg3_init_hw(tp); |
7758 | tg3_netif_start(tp); | 8020 | tg3_netif_start(tp); |
7759 | } | 8021 | } |
7760 | spin_unlock(&tp->tx_lock); | 8022 | |
7761 | spin_unlock_irq(&tp->lock); | 8023 | tg3_full_unlock(tp); |
7762 | } | 8024 | } |
7763 | } | 8025 | } |
7764 | 8026 | ||
@@ -7779,9 +8041,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
7779 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) | 8041 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) |
7780 | break; /* We have no PHY */ | 8042 | break; /* We have no PHY */ |
7781 | 8043 | ||
7782 | spin_lock_irq(&tp->lock); | 8044 | spin_lock_bh(&tp->lock); |
7783 | err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval); | 8045 | err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval); |
7784 | spin_unlock_irq(&tp->lock); | 8046 | spin_unlock_bh(&tp->lock); |
7785 | 8047 | ||
7786 | data->val_out = mii_regval; | 8048 | data->val_out = mii_regval; |
7787 | 8049 | ||
@@ -7795,9 +8057,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
7795 | if (!capable(CAP_NET_ADMIN)) | 8057 | if (!capable(CAP_NET_ADMIN)) |
7796 | return -EPERM; | 8058 | return -EPERM; |
7797 | 8059 | ||
7798 | spin_lock_irq(&tp->lock); | 8060 | spin_lock_bh(&tp->lock); |
7799 | err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in); | 8061 | err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in); |
7800 | spin_unlock_irq(&tp->lock); | 8062 | spin_unlock_bh(&tp->lock); |
7801 | 8063 | ||
7802 | return err; | 8064 | return err; |
7803 | 8065 | ||
@@ -7813,28 +8075,24 @@ static void tg3_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) | |||
7813 | { | 8075 | { |
7814 | struct tg3 *tp = netdev_priv(dev); | 8076 | struct tg3 *tp = netdev_priv(dev); |
7815 | 8077 | ||
7816 | spin_lock_irq(&tp->lock); | 8078 | tg3_full_lock(tp, 0); |
7817 | spin_lock(&tp->tx_lock); | ||
7818 | 8079 | ||
7819 | tp->vlgrp = grp; | 8080 | tp->vlgrp = grp; |
7820 | 8081 | ||
7821 | /* Update RX_MODE_KEEP_VLAN_TAG bit in RX_MODE register. */ | 8082 | /* Update RX_MODE_KEEP_VLAN_TAG bit in RX_MODE register. */ |
7822 | __tg3_set_rx_mode(dev); | 8083 | __tg3_set_rx_mode(dev); |
7823 | 8084 | ||
7824 | spin_unlock(&tp->tx_lock); | 8085 | tg3_full_unlock(tp); |
7825 | spin_unlock_irq(&tp->lock); | ||
7826 | } | 8086 | } |
7827 | 8087 | ||
7828 | static void tg3_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) | 8088 | static void tg3_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid) |
7829 | { | 8089 | { |
7830 | struct tg3 *tp = netdev_priv(dev); | 8090 | struct tg3 *tp = netdev_priv(dev); |
7831 | 8091 | ||
7832 | spin_lock_irq(&tp->lock); | 8092 | tg3_full_lock(tp, 0); |
7833 | spin_lock(&tp->tx_lock); | ||
7834 | if (tp->vlgrp) | 8093 | if (tp->vlgrp) |
7835 | tp->vlgrp->vlan_devices[vid] = NULL; | 8094 | tp->vlgrp->vlan_devices[vid] = NULL; |
7836 | spin_unlock(&tp->tx_lock); | 8095 | tg3_full_unlock(tp); |
7837 | spin_unlock_irq(&tp->lock); | ||
7838 | } | 8096 | } |
7839 | #endif | 8097 | #endif |
7840 | 8098 | ||
@@ -7846,6 +8104,60 @@ static int tg3_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) | |||
7846 | return 0; | 8104 | return 0; |
7847 | } | 8105 | } |
7848 | 8106 | ||
8107 | static int tg3_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) | ||
8108 | { | ||
8109 | struct tg3 *tp = netdev_priv(dev); | ||
8110 | u32 max_rxcoal_tick_int = 0, max_txcoal_tick_int = 0; | ||
8111 | u32 max_stat_coal_ticks = 0, min_stat_coal_ticks = 0; | ||
8112 | |||
8113 | if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) { | ||
8114 | max_rxcoal_tick_int = MAX_RXCOAL_TICK_INT; | ||
8115 | max_txcoal_tick_int = MAX_TXCOAL_TICK_INT; | ||
8116 | max_stat_coal_ticks = MAX_STAT_COAL_TICKS; | ||
8117 | min_stat_coal_ticks = MIN_STAT_COAL_TICKS; | ||
8118 | } | ||
8119 | |||
8120 | if ((ec->rx_coalesce_usecs > MAX_RXCOL_TICKS) || | ||
8121 | (ec->tx_coalesce_usecs > MAX_TXCOL_TICKS) || | ||
8122 | (ec->rx_max_coalesced_frames > MAX_RXMAX_FRAMES) || | ||
8123 | (ec->tx_max_coalesced_frames > MAX_TXMAX_FRAMES) || | ||
8124 | (ec->rx_coalesce_usecs_irq > max_rxcoal_tick_int) || | ||
8125 | (ec->tx_coalesce_usecs_irq > max_txcoal_tick_int) || | ||
8126 | (ec->rx_max_coalesced_frames_irq > MAX_RXCOAL_MAXF_INT) || | ||
8127 | (ec->tx_max_coalesced_frames_irq > MAX_TXCOAL_MAXF_INT) || | ||
8128 | (ec->stats_block_coalesce_usecs > max_stat_coal_ticks) || | ||
8129 | (ec->stats_block_coalesce_usecs < min_stat_coal_ticks)) | ||
8130 | return -EINVAL; | ||
8131 | |||
8132 | /* No rx interrupts will be generated if both are zero */ | ||
8133 | if ((ec->rx_coalesce_usecs == 0) && | ||
8134 | (ec->rx_max_coalesced_frames == 0)) | ||
8135 | return -EINVAL; | ||
8136 | |||
8137 | /* No tx interrupts will be generated if both are zero */ | ||
8138 | if ((ec->tx_coalesce_usecs == 0) && | ||
8139 | (ec->tx_max_coalesced_frames == 0)) | ||
8140 | return -EINVAL; | ||
8141 | |||
8142 | /* Only copy relevant parameters, ignore all others. */ | ||
8143 | tp->coal.rx_coalesce_usecs = ec->rx_coalesce_usecs; | ||
8144 | tp->coal.tx_coalesce_usecs = ec->tx_coalesce_usecs; | ||
8145 | tp->coal.rx_max_coalesced_frames = ec->rx_max_coalesced_frames; | ||
8146 | tp->coal.tx_max_coalesced_frames = ec->tx_max_coalesced_frames; | ||
8147 | tp->coal.rx_coalesce_usecs_irq = ec->rx_coalesce_usecs_irq; | ||
8148 | tp->coal.tx_coalesce_usecs_irq = ec->tx_coalesce_usecs_irq; | ||
8149 | tp->coal.rx_max_coalesced_frames_irq = ec->rx_max_coalesced_frames_irq; | ||
8150 | tp->coal.tx_max_coalesced_frames_irq = ec->tx_max_coalesced_frames_irq; | ||
8151 | tp->coal.stats_block_coalesce_usecs = ec->stats_block_coalesce_usecs; | ||
8152 | |||
8153 | if (netif_running(dev)) { | ||
8154 | tg3_full_lock(tp, 0); | ||
8155 | __tg3_set_coalesce(tp, &tp->coal); | ||
8156 | tg3_full_unlock(tp); | ||
8157 | } | ||
8158 | return 0; | ||
8159 | } | ||
8160 | |||
7849 | static struct ethtool_ops tg3_ethtool_ops = { | 8161 | static struct ethtool_ops tg3_ethtool_ops = { |
7850 | .get_settings = tg3_get_settings, | 8162 | .get_settings = tg3_get_settings, |
7851 | .set_settings = tg3_set_settings, | 8163 | .set_settings = tg3_set_settings, |
@@ -7881,6 +8193,7 @@ static struct ethtool_ops tg3_ethtool_ops = { | |||
7881 | .get_stats_count = tg3_get_stats_count, | 8193 | .get_stats_count = tg3_get_stats_count, |
7882 | .get_ethtool_stats = tg3_get_ethtool_stats, | 8194 | .get_ethtool_stats = tg3_get_ethtool_stats, |
7883 | .get_coalesce = tg3_get_coalesce, | 8195 | .get_coalesce = tg3_get_coalesce, |
8196 | .set_coalesce = tg3_set_coalesce, | ||
7884 | }; | 8197 | }; |
7885 | 8198 | ||
7886 | static void __devinit tg3_get_eeprom_size(struct tg3 *tp) | 8199 | static void __devinit tg3_get_eeprom_size(struct tg3 *tp) |
@@ -8539,8 +8852,12 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp) | |||
8539 | eeprom_phy_id = 0; | 8852 | eeprom_phy_id = 0; |
8540 | 8853 | ||
8541 | tp->phy_id = eeprom_phy_id; | 8854 | tp->phy_id = eeprom_phy_id; |
8542 | if (eeprom_phy_serdes) | 8855 | if (eeprom_phy_serdes) { |
8543 | tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; | 8856 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) |
8857 | tp->tg3_flags2 |= TG3_FLG2_MII_SERDES; | ||
8858 | else | ||
8859 | tp->tg3_flags2 |= TG3_FLG2_PHY_SERDES; | ||
8860 | } | ||
8544 | 8861 | ||
8545 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) | 8862 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) |
8546 | led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | | 8863 | led_cfg = cfg2 & (NIC_SRAM_DATA_CFG_LED_MODE_MASK | |
@@ -8675,7 +8992,7 @@ static int __devinit tg3_phy_probe(struct tg3 *tp) | |||
8675 | } | 8992 | } |
8676 | } | 8993 | } |
8677 | 8994 | ||
8678 | if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) && | 8995 | if (!(tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) && |
8679 | !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) { | 8996 | !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) { |
8680 | u32 bmsr, adv_reg, tg3_ctrl; | 8997 | u32 bmsr, adv_reg, tg3_ctrl; |
8681 | 8998 | ||
@@ -8728,7 +9045,7 @@ skip_phy_reset: | |||
8728 | err = tg3_init_5401phy_dsp(tp); | 9045 | err = tg3_init_5401phy_dsp(tp); |
8729 | } | 9046 | } |
8730 | 9047 | ||
8731 | if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) | 9048 | if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) |
8732 | tp->link_config.advertising = | 9049 | tp->link_config.advertising = |
8733 | (ADVERTISED_1000baseT_Half | | 9050 | (ADVERTISED_1000baseT_Half | |
8734 | ADVERTISED_1000baseT_Full | | 9051 | ADVERTISED_1000baseT_Full | |
@@ -8898,6 +9215,10 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
8898 | if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW) | 9215 | if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW) |
8899 | tp->pci_chip_rev_id = CHIPREV_ID_5752_A0; | 9216 | tp->pci_chip_rev_id = CHIPREV_ID_5752_A0; |
8900 | 9217 | ||
9218 | /* Find msi capability. */ | ||
9219 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) | ||
9220 | tp->msi_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_MSI); | ||
9221 | |||
8901 | /* Initialize misc host control in PCI block. */ | 9222 | /* Initialize misc host control in PCI block. */ |
8902 | tp->misc_host_ctrl |= (misc_ctrl_reg & | 9223 | tp->misc_host_ctrl |= (misc_ctrl_reg & |
8903 | MISC_HOST_CTRL_CHIPREV); | 9224 | MISC_HOST_CTRL_CHIPREV); |
@@ -8913,7 +9234,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
8913 | tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff; | 9234 | tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff; |
8914 | 9235 | ||
8915 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || | 9236 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || |
8916 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752) | 9237 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || |
9238 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) | ||
8917 | tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; | 9239 | tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; |
8918 | 9240 | ||
8919 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) || | 9241 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) || |
@@ -8923,6 +9245,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
8923 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) | 9245 | if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) |
8924 | tp->tg3_flags2 |= TG3_FLG2_HW_TSO; | 9246 | tp->tg3_flags2 |= TG3_FLG2_HW_TSO; |
8925 | 9247 | ||
9248 | if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5705 && | ||
9249 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 && | ||
9250 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) | ||
9251 | tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; | ||
9252 | |||
8926 | if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) | 9253 | if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) |
8927 | tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; | 9254 | tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; |
8928 | 9255 | ||
@@ -9049,8 +9376,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
9049 | /* Derive initial jumbo mode from MTU assigned in | 9376 | /* Derive initial jumbo mode from MTU assigned in |
9050 | * ether_setup() via the alloc_etherdev() call | 9377 | * ether_setup() via the alloc_etherdev() call |
9051 | */ | 9378 | */ |
9052 | if (tp->dev->mtu > ETH_DATA_LEN) | 9379 | if (tp->dev->mtu > ETH_DATA_LEN && |
9053 | tp->tg3_flags |= TG3_FLAG_JUMBO_ENABLE; | 9380 | GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5780) |
9381 | tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE; | ||
9054 | 9382 | ||
9055 | /* Determine WakeOnLan speed to use. */ | 9383 | /* Determine WakeOnLan speed to use. */ |
9056 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || | 9384 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || |
@@ -9066,7 +9394,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
9066 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) || | 9394 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700) || |
9067 | ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) && | 9395 | ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) && |
9068 | (tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) && | 9396 | (tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) && |
9069 | (tp->pci_chip_rev_id != CHIPREV_ID_5705_A1))) | 9397 | (tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) || |
9398 | (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) | ||
9070 | tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED; | 9399 | tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED; |
9071 | 9400 | ||
9072 | if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5703_AX || | 9401 | if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5703_AX || |
@@ -9275,8 +9604,9 @@ static int __devinit tg3_get_device_address(struct tg3 *tp) | |||
9275 | #endif | 9604 | #endif |
9276 | 9605 | ||
9277 | mac_offset = 0x7c; | 9606 | mac_offset = 0x7c; |
9278 | if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 && | 9607 | if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 && |
9279 | !(tp->tg3_flags & TG3_FLG2_SUN_570X)) { | 9608 | !(tp->tg3_flags & TG3_FLG2_SUN_570X)) || |
9609 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { | ||
9280 | if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) | 9610 | if (tr32(TG3PCI_DUAL_MAC_CTRL) & DUAL_MAC_CTRL_ID) |
9281 | mac_offset = 0xcc; | 9611 | mac_offset = 0xcc; |
9282 | if (tg3_nvram_lock(tp)) | 9612 | if (tg3_nvram_lock(tp)) |
@@ -9590,6 +9920,9 @@ static int __devinit tg3_test_dma(struct tg3 *tp) | |||
9590 | 9920 | ||
9591 | /* Set bit 23 to enable PCIX hw bug fix */ | 9921 | /* Set bit 23 to enable PCIX hw bug fix */ |
9592 | tp->dma_rwctrl |= 0x009f0000; | 9922 | tp->dma_rwctrl |= 0x009f0000; |
9923 | } else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) { | ||
9924 | /* 5780 always in PCIX mode */ | ||
9925 | tp->dma_rwctrl |= 0x00144000; | ||
9593 | } else { | 9926 | } else { |
9594 | tp->dma_rwctrl |= 0x001b000f; | 9927 | tp->dma_rwctrl |= 0x001b000f; |
9595 | } | 9928 | } |
@@ -9743,19 +10076,35 @@ static void __devinit tg3_init_link_config(struct tg3 *tp) | |||
9743 | 10076 | ||
9744 | static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) | 10077 | static void __devinit tg3_init_bufmgr_config(struct tg3 *tp) |
9745 | { | 10078 | { |
9746 | tp->bufmgr_config.mbuf_read_dma_low_water = | 10079 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { |
9747 | DEFAULT_MB_RDMA_LOW_WATER; | 10080 | tp->bufmgr_config.mbuf_read_dma_low_water = |
9748 | tp->bufmgr_config.mbuf_mac_rx_low_water = | 10081 | DEFAULT_MB_RDMA_LOW_WATER_5705; |
9749 | DEFAULT_MB_MACRX_LOW_WATER; | 10082 | tp->bufmgr_config.mbuf_mac_rx_low_water = |
9750 | tp->bufmgr_config.mbuf_high_water = | 10083 | DEFAULT_MB_MACRX_LOW_WATER_5705; |
9751 | DEFAULT_MB_HIGH_WATER; | 10084 | tp->bufmgr_config.mbuf_high_water = |
10085 | DEFAULT_MB_HIGH_WATER_5705; | ||
10086 | |||
10087 | tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = | ||
10088 | DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780; | ||
10089 | tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo = | ||
10090 | DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780; | ||
10091 | tp->bufmgr_config.mbuf_high_water_jumbo = | ||
10092 | DEFAULT_MB_HIGH_WATER_JUMBO_5780; | ||
10093 | } else { | ||
10094 | tp->bufmgr_config.mbuf_read_dma_low_water = | ||
10095 | DEFAULT_MB_RDMA_LOW_WATER; | ||
10096 | tp->bufmgr_config.mbuf_mac_rx_low_water = | ||
10097 | DEFAULT_MB_MACRX_LOW_WATER; | ||
10098 | tp->bufmgr_config.mbuf_high_water = | ||
10099 | DEFAULT_MB_HIGH_WATER; | ||
9752 | 10100 | ||
9753 | tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = | 10101 | tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = |
9754 | DEFAULT_MB_RDMA_LOW_WATER_JUMBO; | 10102 | DEFAULT_MB_RDMA_LOW_WATER_JUMBO; |
9755 | tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo = | 10103 | tp->bufmgr_config.mbuf_mac_rx_low_water_jumbo = |
9756 | DEFAULT_MB_MACRX_LOW_WATER_JUMBO; | 10104 | DEFAULT_MB_MACRX_LOW_WATER_JUMBO; |
9757 | tp->bufmgr_config.mbuf_high_water_jumbo = | 10105 | tp->bufmgr_config.mbuf_high_water_jumbo = |
9758 | DEFAULT_MB_HIGH_WATER_JUMBO; | 10106 | DEFAULT_MB_HIGH_WATER_JUMBO; |
10107 | } | ||
9759 | 10108 | ||
9760 | tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER; | 10109 | tp->bufmgr_config.dma_low_water = DEFAULT_DMA_LOW_WATER; |
9761 | tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER; | 10110 | tp->bufmgr_config.dma_high_water = DEFAULT_DMA_HIGH_WATER; |
@@ -9773,6 +10122,7 @@ static char * __devinit tg3_phy_string(struct tg3 *tp) | |||
9773 | case PHY_ID_BCM5705: return "5705"; | 10122 | case PHY_ID_BCM5705: return "5705"; |
9774 | case PHY_ID_BCM5750: return "5750"; | 10123 | case PHY_ID_BCM5750: return "5750"; |
9775 | case PHY_ID_BCM5752: return "5752"; | 10124 | case PHY_ID_BCM5752: return "5752"; |
10125 | case PHY_ID_BCM5780: return "5780"; | ||
9776 | case PHY_ID_BCM8002: return "8002/serdes"; | 10126 | case PHY_ID_BCM8002: return "8002/serdes"; |
9777 | case 0: return "serdes"; | 10127 | case 0: return "serdes"; |
9778 | default: return "unknown"; | 10128 | default: return "unknown"; |
@@ -9825,6 +10175,12 @@ static void __devinit tg3_init_coal(struct tg3 *tp) | |||
9825 | ec->tx_coalesce_usecs = LOW_TXCOL_TICKS_CLRTCKS; | 10175 | ec->tx_coalesce_usecs = LOW_TXCOL_TICKS_CLRTCKS; |
9826 | ec->tx_coalesce_usecs_irq = DEFAULT_TXCOAL_TICK_INT_CLRTCKS; | 10176 | ec->tx_coalesce_usecs_irq = DEFAULT_TXCOAL_TICK_INT_CLRTCKS; |
9827 | } | 10177 | } |
10178 | |||
10179 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { | ||
10180 | ec->rx_coalesce_usecs_irq = 0; | ||
10181 | ec->tx_coalesce_usecs_irq = 0; | ||
10182 | ec->stats_block_coalesce_usecs = 0; | ||
10183 | } | ||
9828 | } | 10184 | } |
9829 | 10185 | ||
9830 | static int __devinit tg3_init_one(struct pci_dev *pdev, | 10186 | static int __devinit tg3_init_one(struct pci_dev *pdev, |
@@ -9962,8 +10318,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
9962 | 10318 | ||
9963 | tg3_init_link_config(tp); | 10319 | tg3_init_link_config(tp); |
9964 | 10320 | ||
9965 | tg3_init_bufmgr_config(tp); | ||
9966 | |||
9967 | tp->rx_pending = TG3_DEF_RX_RING_PENDING; | 10321 | tp->rx_pending = TG3_DEF_RX_RING_PENDING; |
9968 | tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; | 10322 | tp->rx_jumbo_pending = TG3_DEF_RX_JUMBO_RING_PENDING; |
9969 | tp->tx_pending = TG3_DEF_TX_RING_PENDING; | 10323 | tp->tx_pending = TG3_DEF_TX_RING_PENDING; |
@@ -9992,14 +10346,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
9992 | goto err_out_iounmap; | 10346 | goto err_out_iounmap; |
9993 | } | 10347 | } |
9994 | 10348 | ||
9995 | if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) { | 10349 | tg3_init_bufmgr_config(tp); |
9996 | tp->bufmgr_config.mbuf_read_dma_low_water = | ||
9997 | DEFAULT_MB_RDMA_LOW_WATER_5705; | ||
9998 | tp->bufmgr_config.mbuf_mac_rx_low_water = | ||
9999 | DEFAULT_MB_MACRX_LOW_WATER_5705; | ||
10000 | tp->bufmgr_config.mbuf_high_water = | ||
10001 | DEFAULT_MB_HIGH_WATER_5705; | ||
10002 | } | ||
10003 | 10350 | ||
10004 | #if TG3_TSO_SUPPORT != 0 | 10351 | #if TG3_TSO_SUPPORT != 0 |
10005 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { | 10352 | if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { |
@@ -10165,24 +10512,19 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) | |||
10165 | 10512 | ||
10166 | del_timer_sync(&tp->timer); | 10513 | del_timer_sync(&tp->timer); |
10167 | 10514 | ||
10168 | spin_lock_irq(&tp->lock); | 10515 | tg3_full_lock(tp, 1); |
10169 | spin_lock(&tp->tx_lock); | ||
10170 | tg3_disable_ints(tp); | 10516 | tg3_disable_ints(tp); |
10171 | spin_unlock(&tp->tx_lock); | 10517 | tg3_full_unlock(tp); |
10172 | spin_unlock_irq(&tp->lock); | ||
10173 | 10518 | ||
10174 | netif_device_detach(dev); | 10519 | netif_device_detach(dev); |
10175 | 10520 | ||
10176 | spin_lock_irq(&tp->lock); | 10521 | tg3_full_lock(tp, 0); |
10177 | spin_lock(&tp->tx_lock); | ||
10178 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); | 10522 | tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); |
10179 | spin_unlock(&tp->tx_lock); | 10523 | tg3_full_unlock(tp); |
10180 | spin_unlock_irq(&tp->lock); | ||
10181 | 10524 | ||
10182 | err = tg3_set_power_state(tp, pci_choose_state(pdev, state)); | 10525 | err = tg3_set_power_state(tp, pci_choose_state(pdev, state)); |
10183 | if (err) { | 10526 | if (err) { |
10184 | spin_lock_irq(&tp->lock); | 10527 | tg3_full_lock(tp, 0); |
10185 | spin_lock(&tp->tx_lock); | ||
10186 | 10528 | ||
10187 | tg3_init_hw(tp); | 10529 | tg3_init_hw(tp); |
10188 | 10530 | ||
@@ -10192,8 +10534,7 @@ static int tg3_suspend(struct pci_dev *pdev, pm_message_t state) | |||
10192 | netif_device_attach(dev); | 10534 | netif_device_attach(dev); |
10193 | tg3_netif_start(tp); | 10535 | tg3_netif_start(tp); |
10194 | 10536 | ||
10195 | spin_unlock(&tp->tx_lock); | 10537 | tg3_full_unlock(tp); |
10196 | spin_unlock_irq(&tp->lock); | ||
10197 | } | 10538 | } |
10198 | 10539 | ||
10199 | return err; | 10540 | return err; |
@@ -10216,20 +10557,16 @@ static int tg3_resume(struct pci_dev *pdev) | |||
10216 | 10557 | ||
10217 | netif_device_attach(dev); | 10558 | netif_device_attach(dev); |
10218 | 10559 | ||
10219 | spin_lock_irq(&tp->lock); | 10560 | tg3_full_lock(tp, 0); |
10220 | spin_lock(&tp->tx_lock); | ||
10221 | 10561 | ||
10222 | tg3_init_hw(tp); | 10562 | tg3_init_hw(tp); |
10223 | 10563 | ||
10224 | tp->timer.expires = jiffies + tp->timer_offset; | 10564 | tp->timer.expires = jiffies + tp->timer_offset; |
10225 | add_timer(&tp->timer); | 10565 | add_timer(&tp->timer); |
10226 | 10566 | ||
10227 | tg3_enable_ints(tp); | ||
10228 | |||
10229 | tg3_netif_start(tp); | 10567 | tg3_netif_start(tp); |
10230 | 10568 | ||
10231 | spin_unlock(&tp->tx_lock); | 10569 | tg3_full_unlock(tp); |
10232 | spin_unlock_irq(&tp->lock); | ||
10233 | 10570 | ||
10234 | return 0; | 10571 | return 0; |
10235 | } | 10572 | } |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 993f84c93dc4..5c4433c147fa 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -136,6 +136,7 @@ | |||
136 | #define ASIC_REV_5705 0x03 | 136 | #define ASIC_REV_5705 0x03 |
137 | #define ASIC_REV_5750 0x04 | 137 | #define ASIC_REV_5750 0x04 |
138 | #define ASIC_REV_5752 0x06 | 138 | #define ASIC_REV_5752 0x06 |
139 | #define ASIC_REV_5780 0x08 | ||
139 | #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) | 140 | #define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) |
140 | #define CHIPREV_5700_AX 0x70 | 141 | #define CHIPREV_5700_AX 0x70 |
141 | #define CHIPREV_5700_BX 0x71 | 142 | #define CHIPREV_5700_BX 0x71 |
@@ -879,31 +880,41 @@ | |||
879 | #define LOW_RXCOL_TICKS_CLRTCKS 0x00000014 | 880 | #define LOW_RXCOL_TICKS_CLRTCKS 0x00000014 |
880 | #define DEFAULT_RXCOL_TICKS 0x00000048 | 881 | #define DEFAULT_RXCOL_TICKS 0x00000048 |
881 | #define HIGH_RXCOL_TICKS 0x00000096 | 882 | #define HIGH_RXCOL_TICKS 0x00000096 |
883 | #define MAX_RXCOL_TICKS 0x000003ff | ||
882 | #define HOSTCC_TXCOL_TICKS 0x00003c0c | 884 | #define HOSTCC_TXCOL_TICKS 0x00003c0c |
883 | #define LOW_TXCOL_TICKS 0x00000096 | 885 | #define LOW_TXCOL_TICKS 0x00000096 |
884 | #define LOW_TXCOL_TICKS_CLRTCKS 0x00000048 | 886 | #define LOW_TXCOL_TICKS_CLRTCKS 0x00000048 |
885 | #define DEFAULT_TXCOL_TICKS 0x0000012c | 887 | #define DEFAULT_TXCOL_TICKS 0x0000012c |
886 | #define HIGH_TXCOL_TICKS 0x00000145 | 888 | #define HIGH_TXCOL_TICKS 0x00000145 |
889 | #define MAX_TXCOL_TICKS 0x000003ff | ||
887 | #define HOSTCC_RXMAX_FRAMES 0x00003c10 | 890 | #define HOSTCC_RXMAX_FRAMES 0x00003c10 |
888 | #define LOW_RXMAX_FRAMES 0x00000005 | 891 | #define LOW_RXMAX_FRAMES 0x00000005 |
889 | #define DEFAULT_RXMAX_FRAMES 0x00000008 | 892 | #define DEFAULT_RXMAX_FRAMES 0x00000008 |
890 | #define HIGH_RXMAX_FRAMES 0x00000012 | 893 | #define HIGH_RXMAX_FRAMES 0x00000012 |
894 | #define MAX_RXMAX_FRAMES 0x000000ff | ||
891 | #define HOSTCC_TXMAX_FRAMES 0x00003c14 | 895 | #define HOSTCC_TXMAX_FRAMES 0x00003c14 |
892 | #define LOW_TXMAX_FRAMES 0x00000035 | 896 | #define LOW_TXMAX_FRAMES 0x00000035 |
893 | #define DEFAULT_TXMAX_FRAMES 0x0000004b | 897 | #define DEFAULT_TXMAX_FRAMES 0x0000004b |
894 | #define HIGH_TXMAX_FRAMES 0x00000052 | 898 | #define HIGH_TXMAX_FRAMES 0x00000052 |
899 | #define MAX_TXMAX_FRAMES 0x000000ff | ||
895 | #define HOSTCC_RXCOAL_TICK_INT 0x00003c18 | 900 | #define HOSTCC_RXCOAL_TICK_INT 0x00003c18 |
896 | #define DEFAULT_RXCOAL_TICK_INT 0x00000019 | 901 | #define DEFAULT_RXCOAL_TICK_INT 0x00000019 |
897 | #define DEFAULT_RXCOAL_TICK_INT_CLRTCKS 0x00000014 | 902 | #define DEFAULT_RXCOAL_TICK_INT_CLRTCKS 0x00000014 |
903 | #define MAX_RXCOAL_TICK_INT 0x000003ff | ||
898 | #define HOSTCC_TXCOAL_TICK_INT 0x00003c1c | 904 | #define HOSTCC_TXCOAL_TICK_INT 0x00003c1c |
899 | #define DEFAULT_TXCOAL_TICK_INT 0x00000019 | 905 | #define DEFAULT_TXCOAL_TICK_INT 0x00000019 |
900 | #define DEFAULT_TXCOAL_TICK_INT_CLRTCKS 0x00000014 | 906 | #define DEFAULT_TXCOAL_TICK_INT_CLRTCKS 0x00000014 |
907 | #define MAX_TXCOAL_TICK_INT 0x000003ff | ||
901 | #define HOSTCC_RXCOAL_MAXF_INT 0x00003c20 | 908 | #define HOSTCC_RXCOAL_MAXF_INT 0x00003c20 |
902 | #define DEFAULT_RXCOAL_MAXF_INT 0x00000005 | 909 | #define DEFAULT_RXCOAL_MAXF_INT 0x00000005 |
910 | #define MAX_RXCOAL_MAXF_INT 0x000000ff | ||
903 | #define HOSTCC_TXCOAL_MAXF_INT 0x00003c24 | 911 | #define HOSTCC_TXCOAL_MAXF_INT 0x00003c24 |
904 | #define DEFAULT_TXCOAL_MAXF_INT 0x00000005 | 912 | #define DEFAULT_TXCOAL_MAXF_INT 0x00000005 |
913 | #define MAX_TXCOAL_MAXF_INT 0x000000ff | ||
905 | #define HOSTCC_STAT_COAL_TICKS 0x00003c28 | 914 | #define HOSTCC_STAT_COAL_TICKS 0x00003c28 |
906 | #define DEFAULT_STAT_COAL_TICKS 0x000f4240 | 915 | #define DEFAULT_STAT_COAL_TICKS 0x000f4240 |
916 | #define MAX_STAT_COAL_TICKS 0xd693d400 | ||
917 | #define MIN_STAT_COAL_TICKS 0x00000064 | ||
907 | /* 0x3c2c --> 0x3c30 unused */ | 918 | /* 0x3c2c --> 0x3c30 unused */ |
908 | #define HOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 /* 64-bit */ | 919 | #define HOSTCC_STATS_BLK_HOST_ADDR 0x00003c30 /* 64-bit */ |
909 | #define HOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 /* 64-bit */ | 920 | #define HOSTCC_STATUS_BLK_HOST_ADDR 0x00003c38 /* 64-bit */ |
@@ -974,14 +985,17 @@ | |||
974 | #define DEFAULT_MB_RDMA_LOW_WATER 0x00000050 | 985 | #define DEFAULT_MB_RDMA_LOW_WATER 0x00000050 |
975 | #define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000 | 986 | #define DEFAULT_MB_RDMA_LOW_WATER_5705 0x00000000 |
976 | #define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130 | 987 | #define DEFAULT_MB_RDMA_LOW_WATER_JUMBO 0x00000130 |
988 | #define DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780 0x00000000 | ||
977 | #define BUFMGR_MB_MACRX_LOW_WATER 0x00004414 | 989 | #define BUFMGR_MB_MACRX_LOW_WATER 0x00004414 |
978 | #define DEFAULT_MB_MACRX_LOW_WATER 0x00000020 | 990 | #define DEFAULT_MB_MACRX_LOW_WATER 0x00000020 |
979 | #define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 | 991 | #define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 |
980 | #define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098 | 992 | #define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098 |
993 | #define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b | ||
981 | #define BUFMGR_MB_HIGH_WATER 0x00004418 | 994 | #define BUFMGR_MB_HIGH_WATER 0x00004418 |
982 | #define DEFAULT_MB_HIGH_WATER 0x00000060 | 995 | #define DEFAULT_MB_HIGH_WATER 0x00000060 |
983 | #define DEFAULT_MB_HIGH_WATER_5705 0x00000060 | 996 | #define DEFAULT_MB_HIGH_WATER_5705 0x00000060 |
984 | #define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c | 997 | #define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c |
998 | #define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096 | ||
985 | #define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c | 999 | #define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c |
986 | #define BUFMGR_MB_ALLOC_BIT 0x10000000 | 1000 | #define BUFMGR_MB_ALLOC_BIT 0x10000000 |
987 | #define BUFMGR_RX_MB_ALLOC_RESP 0x00004420 | 1001 | #define BUFMGR_RX_MB_ALLOC_RESP 0x00004420 |
@@ -2006,17 +2020,31 @@ struct tg3_ethtool_stats { | |||
2006 | struct tg3 { | 2020 | struct tg3 { |
2007 | /* begin "general, frequently-used members" cacheline section */ | 2021 | /* begin "general, frequently-used members" cacheline section */ |
2008 | 2022 | ||
2023 | /* If the IRQ handler (which runs lockless) needs to be | ||
2024 | * quiesced, the following bitmask state is used. The | ||
2025 | * SYNC flag is set by non-IRQ context code to initiate | ||
2026 | * the quiescence. | ||
2027 | * | ||
2028 | * When the IRQ handler notices that SYNC is set, it | ||
2029 | * disables interrupts and returns. | ||
2030 | * | ||
2031 | * When all outstanding IRQ handlers have returned after | ||
2032 | * the SYNC flag has been set, the setter can be assured | ||
2033 | * that interrupts will no longer get run. | ||
2034 | * | ||
2035 | * In this way all SMP driver locks are never acquired | ||
2036 | * in hw IRQ context, only sw IRQ context or lower. | ||
2037 | */ | ||
2038 | unsigned int irq_sync; | ||
2039 | |||
2009 | /* SMP locking strategy: | 2040 | /* SMP locking strategy: |
2010 | * | 2041 | * |
2011 | * lock: Held during all operations except TX packet | 2042 | * lock: Held during all operations except TX packet |
2012 | * processing. | 2043 | * processing. |
2013 | * | 2044 | * |
2014 | * tx_lock: Held during tg3_start_xmit{,_4gbug} and tg3_tx | 2045 | * tx_lock: Held during tg3_start_xmit and tg3_tx |
2015 | * | 2046 | * |
2016 | * If you want to shut up all asynchronous processing you must | 2047 | * Both of these locks are to be held with BH safety. |
2017 | * acquire both locks, 'lock' taken before 'tx_lock'. IRQs must | ||
2018 | * be disabled to take 'lock' but only softirq disabling is | ||
2019 | * necessary for acquisition of 'tx_lock'. | ||
2020 | */ | 2048 | */ |
2021 | spinlock_t lock; | 2049 | spinlock_t lock; |
2022 | spinlock_t indirect_lock; | 2050 | spinlock_t indirect_lock; |
@@ -2063,6 +2091,8 @@ struct tg3 { | |||
2063 | struct tg3_rx_buffer_desc *rx_rcb; | 2091 | struct tg3_rx_buffer_desc *rx_rcb; |
2064 | dma_addr_t rx_rcb_mapping; | 2092 | dma_addr_t rx_rcb_mapping; |
2065 | 2093 | ||
2094 | u32 rx_pkt_buf_sz; | ||
2095 | |||
2066 | /* begin "everything else" cacheline(s) section */ | 2096 | /* begin "everything else" cacheline(s) section */ |
2067 | struct net_device_stats net_stats; | 2097 | struct net_device_stats net_stats; |
2068 | struct net_device_stats net_stats_prev; | 2098 | struct net_device_stats net_stats_prev; |
@@ -2100,7 +2130,7 @@ struct tg3 { | |||
2100 | #define TG3_FLAG_NO_TX_PSEUDO_CSUM 0x00100000 | 2130 | #define TG3_FLAG_NO_TX_PSEUDO_CSUM 0x00100000 |
2101 | #define TG3_FLAG_NO_RX_PSEUDO_CSUM 0x00200000 | 2131 | #define TG3_FLAG_NO_RX_PSEUDO_CSUM 0x00200000 |
2102 | #define TG3_FLAG_SERDES_WOL_CAP 0x00400000 | 2132 | #define TG3_FLAG_SERDES_WOL_CAP 0x00400000 |
2103 | #define TG3_FLAG_JUMBO_ENABLE 0x00800000 | 2133 | #define TG3_FLAG_JUMBO_RING_ENABLE 0x00800000 |
2104 | #define TG3_FLAG_10_100_ONLY 0x01000000 | 2134 | #define TG3_FLAG_10_100_ONLY 0x01000000 |
2105 | #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 | 2135 | #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 |
2106 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 | 2136 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 |
@@ -2130,6 +2160,11 @@ struct tg3 { | |||
2130 | #define TG3_FLG2_5750_PLUS 0x00080000 | 2160 | #define TG3_FLG2_5750_PLUS 0x00080000 |
2131 | #define TG3_FLG2_PROTECTED_NVRAM 0x00100000 | 2161 | #define TG3_FLG2_PROTECTED_NVRAM 0x00100000 |
2132 | #define TG3_FLG2_USING_MSI 0x00200000 | 2162 | #define TG3_FLG2_USING_MSI 0x00200000 |
2163 | #define TG3_FLG2_JUMBO_CAPABLE 0x00400000 | ||
2164 | #define TG3_FLG2_MII_SERDES 0x00800000 | ||
2165 | #define TG3_FLG2_ANY_SERDES (TG3_FLG2_PHY_SERDES | \ | ||
2166 | TG3_FLG2_MII_SERDES) | ||
2167 | #define TG3_FLG2_PARALLEL_DETECT 0x01000000 | ||
2133 | 2168 | ||
2134 | u32 split_mode_max_reqs; | 2169 | u32 split_mode_max_reqs; |
2135 | #define SPLIT_MODE_5704_MAX_REQ 3 | 2170 | #define SPLIT_MODE_5704_MAX_REQ 3 |
@@ -2163,6 +2198,7 @@ struct tg3 { | |||
2163 | u8 pci_bist; | 2198 | u8 pci_bist; |
2164 | 2199 | ||
2165 | int pm_cap; | 2200 | int pm_cap; |
2201 | int msi_cap; | ||
2166 | 2202 | ||
2167 | /* PHY info */ | 2203 | /* PHY info */ |
2168 | u32 phy_id; | 2204 | u32 phy_id; |
@@ -2176,6 +2212,7 @@ struct tg3 { | |||
2176 | #define PHY_ID_BCM5705 0x600081a0 | 2212 | #define PHY_ID_BCM5705 0x600081a0 |
2177 | #define PHY_ID_BCM5750 0x60008180 | 2213 | #define PHY_ID_BCM5750 0x60008180 |
2178 | #define PHY_ID_BCM5752 0x60008100 | 2214 | #define PHY_ID_BCM5752 0x60008100 |
2215 | #define PHY_ID_BCM5780 0x60008350 | ||
2179 | #define PHY_ID_BCM8002 0x60010140 | 2216 | #define PHY_ID_BCM8002 0x60010140 |
2180 | #define PHY_ID_INVALID 0xffffffff | 2217 | #define PHY_ID_INVALID 0xffffffff |
2181 | #define PHY_ID_REV_MASK 0x0000000f | 2218 | #define PHY_ID_REV_MASK 0x0000000f |
diff --git a/drivers/net/tlan.c b/drivers/net/tlan.c index 9680a308c62b..942fae0f2130 100644 --- a/drivers/net/tlan.c +++ b/drivers/net/tlan.c | |||
@@ -171,6 +171,7 @@ | |||
171 | #include <linux/ioport.h> | 171 | #include <linux/ioport.h> |
172 | #include <linux/eisa.h> | 172 | #include <linux/eisa.h> |
173 | #include <linux/pci.h> | 173 | #include <linux/pci.h> |
174 | #include <linux/dma-mapping.h> | ||
174 | #include <linux/netdevice.h> | 175 | #include <linux/netdevice.h> |
175 | #include <linux/etherdevice.h> | 176 | #include <linux/etherdevice.h> |
176 | #include <linux/delay.h> | 177 | #include <linux/delay.h> |
@@ -566,7 +567,7 @@ static int __devinit TLan_probe1(struct pci_dev *pdev, | |||
566 | 567 | ||
567 | priv->adapter = &board_info[ent->driver_data]; | 568 | priv->adapter = &board_info[ent->driver_data]; |
568 | 569 | ||
569 | rc = pci_set_dma_mask(pdev, 0xFFFFFFFF); | 570 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
570 | if (rc) { | 571 | if (rc) { |
571 | printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n"); | 572 | printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n"); |
572 | goto err_out_free_dev; | 573 | goto err_out_free_dev; |
@@ -2819,7 +2820,7 @@ void TLan_PhyMonitor( struct net_device *dev ) | |||
2819 | if (priv->link) { | 2820 | if (priv->link) { |
2820 | priv->link = 0; | 2821 | priv->link = 0; |
2821 | printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name); | 2822 | printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name); |
2822 | dev->flags &= ~IFF_RUNNING; | 2823 | netif_carrier_off(dev); |
2823 | TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT ); | 2824 | TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT ); |
2824 | return; | 2825 | return; |
2825 | } | 2826 | } |
@@ -2829,7 +2830,7 @@ void TLan_PhyMonitor( struct net_device *dev ) | |||
2829 | if ((phy_status & MII_GS_LINK) && !priv->link) { | 2830 | if ((phy_status & MII_GS_LINK) && !priv->link) { |
2830 | priv->link = 1; | 2831 | priv->link = 1; |
2831 | printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name); | 2832 | printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name); |
2832 | dev->flags |= IFF_RUNNING; | 2833 | netif_carrier_on(dev); |
2833 | } | 2834 | } |
2834 | 2835 | ||
2835 | /* Setup a new monitor */ | 2836 | /* Setup a new monitor */ |
diff --git a/drivers/net/tokenring/3c359.c b/drivers/net/tokenring/3c359.c index 0d1dcf421771..41e0cd8f4786 100644 --- a/drivers/net/tokenring/3c359.c +++ b/drivers/net/tokenring/3c359.c | |||
@@ -276,7 +276,8 @@ static void xl_ee_write(struct net_device *dev, int ee_addr, u16 ee_value) | |||
276 | return ; | 276 | return ; |
277 | } | 277 | } |
278 | 278 | ||
279 | int __devinit xl_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 279 | static int __devinit xl_probe(struct pci_dev *pdev, |
280 | const struct pci_device_id *ent) | ||
280 | { | 281 | { |
281 | struct net_device *dev ; | 282 | struct net_device *dev ; |
282 | struct xl_private *xl_priv ; | 283 | struct xl_private *xl_priv ; |
diff --git a/drivers/net/tokenring/3c359_microcode.h b/drivers/net/tokenring/3c359_microcode.h index 81354afa3d34..0400c029c077 100644 --- a/drivers/net/tokenring/3c359_microcode.h +++ b/drivers/net/tokenring/3c359_microcode.h | |||
@@ -22,7 +22,7 @@ | |||
22 | 22 | ||
23 | static int mc_size = 24880 ; | 23 | static int mc_size = 24880 ; |
24 | 24 | ||
25 | u8 microcode[] = { | 25 | static const u8 microcode[] = { |
26 | 0xfe,0x3a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 | 26 | 0xfe,0x3a,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 |
27 | ,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 | 27 | ,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 |
28 | ,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 | 28 | ,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 |
diff --git a/drivers/net/tokenring/abyss.c b/drivers/net/tokenring/abyss.c index bd4a2bccf867..87103c400999 100644 --- a/drivers/net/tokenring/abyss.c +++ b/drivers/net/tokenring/abyss.c | |||
@@ -468,14 +468,3 @@ static void __exit abyss_rmmod (void) | |||
468 | module_init(abyss_init); | 468 | module_init(abyss_init); |
469 | module_exit(abyss_rmmod); | 469 | module_exit(abyss_rmmod); |
470 | 470 | ||
471 | |||
472 | /* | ||
473 | * Local variables: | ||
474 | * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c abyss.c" | ||
475 | * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c abyss.c" | ||
476 | * c-set-style "K&R" | ||
477 | * c-indent-level: 8 | ||
478 | * c-basic-offset: 8 | ||
479 | * tab-width: 8 | ||
480 | * End: | ||
481 | */ | ||
diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c index c098863bdd9d..e7b001017b9a 100644 --- a/drivers/net/tokenring/ibmtr.c +++ b/drivers/net/tokenring/ibmtr.c | |||
@@ -151,7 +151,7 @@ static char version[] __initdata = | |||
151 | 151 | ||
152 | /* this allows displaying full adapter information */ | 152 | /* this allows displaying full adapter information */ |
153 | 153 | ||
154 | char *channel_def[] __devinitdata = { "ISA", "MCA", "ISA P&P" }; | 154 | static char *channel_def[] __devinitdata = { "ISA", "MCA", "ISA P&P" }; |
155 | 155 | ||
156 | static char pcchannelid[] __devinitdata = { | 156 | static char pcchannelid[] __devinitdata = { |
157 | 0x05, 0x00, 0x04, 0x09, | 157 | 0x05, 0x00, 0x04, 0x09, |
@@ -171,7 +171,7 @@ static char mcchannelid[] __devinitdata = { | |||
171 | 0x03, 0x08, 0x02, 0x00 | 171 | 0x03, 0x08, 0x02, 0x00 |
172 | }; | 172 | }; |
173 | 173 | ||
174 | char __devinit *adapter_def(char type) | 174 | static char __devinit *adapter_def(char type) |
175 | { | 175 | { |
176 | switch (type) { | 176 | switch (type) { |
177 | case 0xF: return "PC Adapter | PC Adapter II | Adapter/A"; | 177 | case 0xF: return "PC Adapter | PC Adapter II | Adapter/A"; |
@@ -184,7 +184,7 @@ char __devinit *adapter_def(char type) | |||
184 | 184 | ||
185 | #define TRC_INIT 0x01 /* Trace initialization & PROBEs */ | 185 | #define TRC_INIT 0x01 /* Trace initialization & PROBEs */ |
186 | #define TRC_INITV 0x02 /* verbose init trace points */ | 186 | #define TRC_INITV 0x02 /* verbose init trace points */ |
187 | unsigned char ibmtr_debug_trace = 0; | 187 | static unsigned char ibmtr_debug_trace = 0; |
188 | 188 | ||
189 | static int ibmtr_probe(struct net_device *dev); | 189 | static int ibmtr_probe(struct net_device *dev); |
190 | static int ibmtr_probe1(struct net_device *dev, int ioaddr); | 190 | static int ibmtr_probe1(struct net_device *dev, int ioaddr); |
@@ -192,20 +192,20 @@ static unsigned char get_sram_size(struct tok_info *adapt_info); | |||
192 | static int trdev_init(struct net_device *dev); | 192 | static int trdev_init(struct net_device *dev); |
193 | static int tok_open(struct net_device *dev); | 193 | static int tok_open(struct net_device *dev); |
194 | static int tok_init_card(struct net_device *dev); | 194 | static int tok_init_card(struct net_device *dev); |
195 | void tok_open_adapter(unsigned long dev_addr); | 195 | static void tok_open_adapter(unsigned long dev_addr); |
196 | static void open_sap(unsigned char type, struct net_device *dev); | 196 | static void open_sap(unsigned char type, struct net_device *dev); |
197 | static void tok_set_multicast_list(struct net_device *dev); | 197 | static void tok_set_multicast_list(struct net_device *dev); |
198 | static int tok_send_packet(struct sk_buff *skb, struct net_device *dev); | 198 | static int tok_send_packet(struct sk_buff *skb, struct net_device *dev); |
199 | static int tok_close(struct net_device *dev); | 199 | static int tok_close(struct net_device *dev); |
200 | irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs); | 200 | static irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs); |
201 | static void initial_tok_int(struct net_device *dev); | 201 | static void initial_tok_int(struct net_device *dev); |
202 | static void tr_tx(struct net_device *dev); | 202 | static void tr_tx(struct net_device *dev); |
203 | static void tr_rx(struct net_device *dev); | 203 | static void tr_rx(struct net_device *dev); |
204 | void ibmtr_reset_timer(struct timer_list*tmr,struct net_device *dev); | 204 | static void ibmtr_reset_timer(struct timer_list*tmr,struct net_device *dev); |
205 | static void tok_rerun(unsigned long dev_addr); | 205 | static void tok_rerun(unsigned long dev_addr); |
206 | void ibmtr_readlog(struct net_device *dev); | 206 | static void ibmtr_readlog(struct net_device *dev); |
207 | static struct net_device_stats *tok_get_stats(struct net_device *dev); | 207 | static struct net_device_stats *tok_get_stats(struct net_device *dev); |
208 | int ibmtr_change_mtu(struct net_device *dev, int mtu); | 208 | static int ibmtr_change_mtu(struct net_device *dev, int mtu); |
209 | static void find_turbo_adapters(int *iolist); | 209 | static void find_turbo_adapters(int *iolist); |
210 | 210 | ||
211 | static int ibmtr_portlist[IBMTR_MAX_ADAPTERS+1] __devinitdata = { | 211 | static int ibmtr_portlist[IBMTR_MAX_ADAPTERS+1] __devinitdata = { |
@@ -888,11 +888,6 @@ static int tok_open(struct net_device *dev) | |||
888 | ti->sap_status = CLOSED; /* CLOSED or OPEN */ | 888 | ti->sap_status = CLOSED; /* CLOSED or OPEN */ |
889 | ti->open_failure = NO; /* NO or YES */ | 889 | ti->open_failure = NO; /* NO or YES */ |
890 | ti->open_mode = MANUAL; /* MANUAL or AUTOMATIC */ | 890 | ti->open_mode = MANUAL; /* MANUAL or AUTOMATIC */ |
891 | /* 12/2000 not typical Linux, but we can use RUNNING to let us know when | ||
892 | the network has crapped out or cables are disconnected. Useful because | ||
893 | the IFF_UP flag stays up the whole time, until ifconfig tr0 down. | ||
894 | */ | ||
895 | dev->flags &= ~IFF_RUNNING; | ||
896 | 891 | ||
897 | ti->sram_phys &= ~1; /* to reverse what we do in tok_close */ | 892 | ti->sram_phys &= ~1; /* to reverse what we do in tok_close */ |
898 | /* init the spinlock */ | 893 | /* init the spinlock */ |
@@ -933,7 +928,7 @@ static int tok_open(struct net_device *dev) | |||
933 | #define DLC_MAX_SAP_OFST 32 | 928 | #define DLC_MAX_SAP_OFST 32 |
934 | #define DLC_MAX_STA_OFST 33 | 929 | #define DLC_MAX_STA_OFST 33 |
935 | 930 | ||
936 | void tok_open_adapter(unsigned long dev_addr) | 931 | static void tok_open_adapter(unsigned long dev_addr) |
937 | { | 932 | { |
938 | struct net_device *dev = (struct net_device *) dev_addr; | 933 | struct net_device *dev = (struct net_device *) dev_addr; |
939 | struct tok_info *ti; | 934 | struct tok_info *ti; |
@@ -1104,7 +1099,7 @@ static void __iomem *map_address(struct tok_info *ti, unsigned index, __u8 *page | |||
1104 | return ti->sram_virt + index; | 1099 | return ti->sram_virt + index; |
1105 | } | 1100 | } |
1106 | 1101 | ||
1107 | void dir_open_adapter (struct net_device *dev) | 1102 | static void dir_open_adapter (struct net_device *dev) |
1108 | { | 1103 | { |
1109 | struct tok_info *ti = (struct tok_info *) dev->priv; | 1104 | struct tok_info *ti = (struct tok_info *) dev->priv; |
1110 | unsigned char ret_code; | 1105 | unsigned char ret_code; |
@@ -1177,7 +1172,7 @@ void dir_open_adapter (struct net_device *dev) | |||
1177 | 1172 | ||
1178 | /******************************************************************************/ | 1173 | /******************************************************************************/ |
1179 | 1174 | ||
1180 | irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs) | 1175 | static irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs) |
1181 | { | 1176 | { |
1182 | unsigned char status; | 1177 | unsigned char status; |
1183 | /* unsigned char status_even ; */ | 1178 | /* unsigned char status_even ; */ |
@@ -1242,7 +1237,7 @@ irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1242 | ti->open_status = CLOSED; | 1237 | ti->open_status = CLOSED; |
1243 | ti->sap_status = CLOSED; | 1238 | ti->sap_status = CLOSED; |
1244 | ti->open_mode = AUTOMATIC; | 1239 | ti->open_mode = AUTOMATIC; |
1245 | dev->flags &= ~IFF_RUNNING; | 1240 | netif_carrier_off(dev); |
1246 | netif_stop_queue(dev); | 1241 | netif_stop_queue(dev); |
1247 | ti->open_action = RESTART; | 1242 | ti->open_action = RESTART; |
1248 | outb(0, dev->base_addr + ADAPTRESET); | 1243 | outb(0, dev->base_addr + ADAPTRESET); |
@@ -1323,7 +1318,7 @@ irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1323 | break; | 1318 | break; |
1324 | } | 1319 | } |
1325 | netif_wake_queue(dev); | 1320 | netif_wake_queue(dev); |
1326 | dev->flags |= IFF_RUNNING;/*BMS 12/2000*/ | 1321 | netif_carrier_on(dev); |
1327 | break; | 1322 | break; |
1328 | case DIR_INTERRUPT: | 1323 | case DIR_INTERRUPT: |
1329 | case DIR_MOD_OPEN_PARAMS: | 1324 | case DIR_MOD_OPEN_PARAMS: |
@@ -1427,7 +1422,7 @@ irqreturn_t tok_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
1427 | ring_status); | 1422 | ring_status); |
1428 | if(ring_status& (REMOVE_RECV|AUTO_REMOVAL|LOBE_FAULT)){ | 1423 | if(ring_status& (REMOVE_RECV|AUTO_REMOVAL|LOBE_FAULT)){ |
1429 | netif_stop_queue(dev); | 1424 | netif_stop_queue(dev); |
1430 | dev->flags &= ~IFF_RUNNING;/*not typical Linux*/ | 1425 | netif_carrier_off(dev); |
1431 | DPRINTK("Remove received, or Auto-removal error" | 1426 | DPRINTK("Remove received, or Auto-removal error" |
1432 | ", or Lobe fault\n"); | 1427 | ", or Lobe fault\n"); |
1433 | DPRINTK("We'll try to reopen the closed adapter" | 1428 | DPRINTK("We'll try to reopen the closed adapter" |
@@ -1845,7 +1840,7 @@ static void tr_rx(struct net_device *dev) | |||
1845 | 1840 | ||
1846 | /*****************************************************************************/ | 1841 | /*****************************************************************************/ |
1847 | 1842 | ||
1848 | void ibmtr_reset_timer(struct timer_list *tmr, struct net_device *dev) | 1843 | static void ibmtr_reset_timer(struct timer_list *tmr, struct net_device *dev) |
1849 | { | 1844 | { |
1850 | tmr->expires = jiffies + TR_RETRY_INTERVAL; | 1845 | tmr->expires = jiffies + TR_RETRY_INTERVAL; |
1851 | tmr->data = (unsigned long) dev; | 1846 | tmr->data = (unsigned long) dev; |
@@ -1877,7 +1872,7 @@ void tok_rerun(unsigned long dev_addr){ | |||
1877 | 1872 | ||
1878 | /*****************************************************************************/ | 1873 | /*****************************************************************************/ |
1879 | 1874 | ||
1880 | void ibmtr_readlog(struct net_device *dev) | 1875 | static void ibmtr_readlog(struct net_device *dev) |
1881 | { | 1876 | { |
1882 | struct tok_info *ti; | 1877 | struct tok_info *ti; |
1883 | 1878 | ||
@@ -1910,7 +1905,7 @@ static struct net_device_stats *tok_get_stats(struct net_device *dev) | |||
1910 | 1905 | ||
1911 | /*****************************************************************************/ | 1906 | /*****************************************************************************/ |
1912 | 1907 | ||
1913 | int ibmtr_change_mtu(struct net_device *dev, int mtu) | 1908 | static int ibmtr_change_mtu(struct net_device *dev, int mtu) |
1914 | { | 1909 | { |
1915 | struct tok_info *ti = (struct tok_info *) dev->priv; | 1910 | struct tok_info *ti = (struct tok_info *) dev->priv; |
1916 | 1911 | ||
diff --git a/drivers/net/tokenring/lanstreamer.c b/drivers/net/tokenring/lanstreamer.c index 99e0b03b69a8..97712c3c4e07 100644 --- a/drivers/net/tokenring/lanstreamer.c +++ b/drivers/net/tokenring/lanstreamer.c | |||
@@ -118,6 +118,7 @@ | |||
118 | #include <linux/stddef.h> | 118 | #include <linux/stddef.h> |
119 | #include <linux/init.h> | 119 | #include <linux/init.h> |
120 | #include <linux/pci.h> | 120 | #include <linux/pci.h> |
121 | #include <linux/dma-mapping.h> | ||
121 | #include <linux/spinlock.h> | 122 | #include <linux/spinlock.h> |
122 | #include <linux/version.h> | 123 | #include <linux/version.h> |
123 | #include <linux/bitops.h> | 124 | #include <linux/bitops.h> |
@@ -257,7 +258,7 @@ static int __devinit streamer_init_one(struct pci_dev *pdev, | |||
257 | #endif | 258 | #endif |
258 | #endif | 259 | #endif |
259 | 260 | ||
260 | rc = pci_set_dma_mask(pdev, 0xFFFFFFFFULL); | 261 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
261 | if (rc) { | 262 | if (rc) { |
262 | printk(KERN_ERR "%s: No suitable PCI mapping available.\n", | 263 | printk(KERN_ERR "%s: No suitable PCI mapping available.\n", |
263 | dev->name); | 264 | dev->name); |
@@ -454,8 +455,7 @@ static int streamer_reset(struct net_device *dev) | |||
454 | writew(readw(streamer_mmio + BCTL) | BCTL_SOFTRESET, streamer_mmio + BCTL); | 455 | writew(readw(streamer_mmio + BCTL) | BCTL_SOFTRESET, streamer_mmio + BCTL); |
455 | t = jiffies; | 456 | t = jiffies; |
456 | /* Hold soft reset bit for a while */ | 457 | /* Hold soft reset bit for a while */ |
457 | current->state = TASK_UNINTERRUPTIBLE; | 458 | ssleep(1); |
458 | schedule_timeout(HZ); | ||
459 | 459 | ||
460 | writew(readw(streamer_mmio + BCTL) & ~BCTL_SOFTRESET, | 460 | writew(readw(streamer_mmio + BCTL) & ~BCTL_SOFTRESET, |
461 | streamer_mmio + BCTL); | 461 | streamer_mmio + BCTL); |
@@ -511,8 +511,7 @@ static int streamer_reset(struct net_device *dev) | |||
511 | writew(SISR_MI, streamer_mmio + SISR_MASK_SUM); | 511 | writew(SISR_MI, streamer_mmio + SISR_MASK_SUM); |
512 | 512 | ||
513 | while (!((readw(streamer_mmio + SISR)) & SISR_SRB_REPLY)) { | 513 | while (!((readw(streamer_mmio + SISR)) & SISR_SRB_REPLY)) { |
514 | current->state = TASK_INTERRUPTIBLE; | 514 | msleep_interruptible(100); |
515 | schedule_timeout(HZ/10); | ||
516 | if (jiffies - t > 40 * HZ) { | 515 | if (jiffies - t > 40 * HZ) { |
517 | printk(KERN_ERR | 516 | printk(KERN_ERR |
518 | "IBM PCI tokenring card not responding\n"); | 517 | "IBM PCI tokenring card not responding\n"); |
diff --git a/drivers/net/tokenring/madgemc.c b/drivers/net/tokenring/madgemc.c index cfae2bbf2167..659cbdbef7f3 100644 --- a/drivers/net/tokenring/madgemc.c +++ b/drivers/net/tokenring/madgemc.c | |||
@@ -625,7 +625,7 @@ static int madgemc_chipset_init(struct net_device *dev) | |||
625 | /* | 625 | /* |
626 | * Disable the board, and put back into power-up state. | 626 | * Disable the board, and put back into power-up state. |
627 | */ | 627 | */ |
628 | void madgemc_chipset_close(struct net_device *dev) | 628 | static void madgemc_chipset_close(struct net_device *dev) |
629 | { | 629 | { |
630 | /* disable interrupts */ | 630 | /* disable interrupts */ |
631 | madgemc_setint(dev, 0); | 631 | madgemc_setint(dev, 0); |
@@ -786,15 +786,3 @@ module_exit(madgemc_exit); | |||
786 | 786 | ||
787 | MODULE_LICENSE("GPL"); | 787 | MODULE_LICENSE("GPL"); |
788 | 788 | ||
789 | |||
790 | /* | ||
791 | * Local variables: | ||
792 | * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c" | ||
793 | * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c madgemc.c" | ||
794 | * c-set-style "K&R" | ||
795 | * c-indent-level: 8 | ||
796 | * c-basic-offset: 8 | ||
797 | * tab-width: 8 | ||
798 | * End: | ||
799 | */ | ||
800 | |||
diff --git a/drivers/net/tokenring/proteon.c b/drivers/net/tokenring/proteon.c index 675b063508e3..40ad0fde28af 100644 --- a/drivers/net/tokenring/proteon.c +++ b/drivers/net/tokenring/proteon.c | |||
@@ -419,14 +419,3 @@ void cleanup_module(void) | |||
419 | } | 419 | } |
420 | #endif /* MODULE */ | 420 | #endif /* MODULE */ |
421 | 421 | ||
422 | |||
423 | /* | ||
424 | * Local variables: | ||
425 | * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c proteon.c" | ||
426 | * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c proteon.c" | ||
427 | * c-set-style "K&R" | ||
428 | * c-indent-level: 8 | ||
429 | * c-basic-offset: 8 | ||
430 | * tab-width: 8 | ||
431 | * End: | ||
432 | */ | ||
diff --git a/drivers/net/tokenring/skisa.c b/drivers/net/tokenring/skisa.c index 3fab54a26466..f26796e2d0e5 100644 --- a/drivers/net/tokenring/skisa.c +++ b/drivers/net/tokenring/skisa.c | |||
@@ -429,14 +429,3 @@ void cleanup_module(void) | |||
429 | } | 429 | } |
430 | #endif /* MODULE */ | 430 | #endif /* MODULE */ |
431 | 431 | ||
432 | |||
433 | /* | ||
434 | * Local variables: | ||
435 | * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c skisa.c" | ||
436 | * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c skisa.c" | ||
437 | * c-set-style "K&R" | ||
438 | * c-indent-level: 8 | ||
439 | * c-basic-offset: 8 | ||
440 | * tab-width: 8 | ||
441 | * End: | ||
442 | */ | ||
diff --git a/drivers/net/tokenring/smctr.c b/drivers/net/tokenring/smctr.c index 5c8aeacb8318..67d2b596ce22 100644 --- a/drivers/net/tokenring/smctr.c +++ b/drivers/net/tokenring/smctr.c | |||
@@ -77,7 +77,7 @@ static int ringspeed; | |||
77 | 77 | ||
78 | /* SMC Name of the Adapter. */ | 78 | /* SMC Name of the Adapter. */ |
79 | static char smctr_name[] = "SMC TokenCard"; | 79 | static char smctr_name[] = "SMC TokenCard"; |
80 | char *smctr_model = "Unknown"; | 80 | static char *smctr_model = "Unknown"; |
81 | 81 | ||
82 | /* Use 0 for production, 1 for verification, 2 for debug, and | 82 | /* Use 0 for production, 1 for verification, 2 for debug, and |
83 | * 3 for very verbose debug. | 83 | * 3 for very verbose debug. |
diff --git a/drivers/net/tokenring/smctr_firmware.h b/drivers/net/tokenring/smctr_firmware.h index 53f2cbc817c9..48994b043b7c 100644 --- a/drivers/net/tokenring/smctr_firmware.h +++ b/drivers/net/tokenring/smctr_firmware.h | |||
@@ -21,7 +21,7 @@ | |||
21 | 21 | ||
22 | #if defined(CONFIG_SMCTR) || defined(CONFIG_SMCTR_MODULE) | 22 | #if defined(CONFIG_SMCTR) || defined(CONFIG_SMCTR_MODULE) |
23 | 23 | ||
24 | unsigned char smctr_code[] = { | 24 | static const unsigned char smctr_code[] = { |
25 | 0x0BC, 0x01D, 0x012, 0x03B, 0x063, 0x0B4, 0x0E9, 0x000, | 25 | 0x0BC, 0x01D, 0x012, 0x03B, 0x063, 0x0B4, 0x0E9, 0x000, |
26 | 0x000, 0x01F, 0x000, 0x001, 0x001, 0x000, 0x002, 0x005, | 26 | 0x000, 0x01F, 0x000, 0x001, 0x001, 0x000, 0x002, 0x005, |
27 | 0x001, 0x000, 0x006, 0x003, 0x001, 0x000, 0x004, 0x009, | 27 | 0x001, 0x000, 0x006, 0x003, 0x001, 0x000, 0x004, 0x009, |
diff --git a/drivers/net/tokenring/tms380tr.c b/drivers/net/tokenring/tms380tr.c index df43b449e429..5e0b0ce98ed7 100644 --- a/drivers/net/tokenring/tms380tr.c +++ b/drivers/net/tokenring/tms380tr.c | |||
@@ -2379,7 +2379,7 @@ EXPORT_SYMBOL(tmsdev_init); | |||
2379 | EXPORT_SYMBOL(tmsdev_term); | 2379 | EXPORT_SYMBOL(tmsdev_term); |
2380 | EXPORT_SYMBOL(tms380tr_wait); | 2380 | EXPORT_SYMBOL(tms380tr_wait); |
2381 | 2381 | ||
2382 | struct module *TMS380_module = NULL; | 2382 | static struct module *TMS380_module = NULL; |
2383 | 2383 | ||
2384 | int init_module(void) | 2384 | int init_module(void) |
2385 | { | 2385 | { |
@@ -2397,14 +2397,3 @@ void cleanup_module(void) | |||
2397 | 2397 | ||
2398 | MODULE_LICENSE("GPL"); | 2398 | MODULE_LICENSE("GPL"); |
2399 | 2399 | ||
2400 | |||
2401 | /* | ||
2402 | * Local variables: | ||
2403 | * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c tms380tr.c" | ||
2404 | * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c tms380tr.c" | ||
2405 | * c-set-style "K&R" | ||
2406 | * c-indent-level: 8 | ||
2407 | * c-basic-offset: 8 | ||
2408 | * tab-width: 8 | ||
2409 | * End: | ||
2410 | */ | ||
diff --git a/drivers/net/tokenring/tmspci.c b/drivers/net/tokenring/tmspci.c index 37ddb5c2bec3..2e18c0a46482 100644 --- a/drivers/net/tokenring/tmspci.c +++ b/drivers/net/tokenring/tmspci.c | |||
@@ -254,14 +254,3 @@ static void __exit tms_pci_rmmod (void) | |||
254 | module_init(tms_pci_init); | 254 | module_init(tms_pci_init); |
255 | module_exit(tms_pci_rmmod); | 255 | module_exit(tms_pci_rmmod); |
256 | 256 | ||
257 | |||
258 | /* | ||
259 | * Local variables: | ||
260 | * compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c tmspci.c" | ||
261 | * alt-compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -fomit-frame-pointer -I/usr/src/linux/drivers/net/tokenring/ -c tmspci.c" | ||
262 | * c-set-style "K&R" | ||
263 | * c-indent-level: 8 | ||
264 | * c-basic-offset: 8 | ||
265 | * tab-width: 8 | ||
266 | * End: | ||
267 | */ | ||
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index dd357dd8c370..fc353e348f9a 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -446,13 +446,13 @@ static void de_rx (struct de_private *de) | |||
446 | 446 | ||
447 | mapping = | 447 | mapping = |
448 | de->rx_skb[rx_tail].mapping = | 448 | de->rx_skb[rx_tail].mapping = |
449 | pci_map_single(de->pdev, copy_skb->tail, | 449 | pci_map_single(de->pdev, copy_skb->data, |
450 | buflen, PCI_DMA_FROMDEVICE); | 450 | buflen, PCI_DMA_FROMDEVICE); |
451 | de->rx_skb[rx_tail].skb = copy_skb; | 451 | de->rx_skb[rx_tail].skb = copy_skb; |
452 | } else { | 452 | } else { |
453 | pci_dma_sync_single_for_cpu(de->pdev, mapping, len, PCI_DMA_FROMDEVICE); | 453 | pci_dma_sync_single_for_cpu(de->pdev, mapping, len, PCI_DMA_FROMDEVICE); |
454 | skb_reserve(copy_skb, RX_OFFSET); | 454 | skb_reserve(copy_skb, RX_OFFSET); |
455 | memcpy(skb_put(copy_skb, len), skb->tail, len); | 455 | memcpy(skb_put(copy_skb, len), skb->data, len); |
456 | 456 | ||
457 | pci_dma_sync_single_for_device(de->pdev, mapping, len, PCI_DMA_FROMDEVICE); | 457 | pci_dma_sync_single_for_device(de->pdev, mapping, len, PCI_DMA_FROMDEVICE); |
458 | 458 | ||
@@ -1269,7 +1269,7 @@ static int de_refill_rx (struct de_private *de) | |||
1269 | skb->dev = de->dev; | 1269 | skb->dev = de->dev; |
1270 | 1270 | ||
1271 | de->rx_skb[i].mapping = pci_map_single(de->pdev, | 1271 | de->rx_skb[i].mapping = pci_map_single(de->pdev, |
1272 | skb->tail, de->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1272 | skb->data, de->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1273 | de->rx_skb[i].skb = skb; | 1273 | de->rx_skb[i].skb = skb; |
1274 | 1274 | ||
1275 | de->rx_ring[i].opts1 = cpu_to_le32(DescOwn); | 1275 | de->rx_ring[i].opts1 = cpu_to_le32(DescOwn); |
diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c index e25f33df223e..74e9075d9c48 100644 --- a/drivers/net/tulip/dmfe.c +++ b/drivers/net/tulip/dmfe.c | |||
@@ -78,6 +78,7 @@ | |||
78 | #include <linux/slab.h> | 78 | #include <linux/slab.h> |
79 | #include <linux/interrupt.h> | 79 | #include <linux/interrupt.h> |
80 | #include <linux/pci.h> | 80 | #include <linux/pci.h> |
81 | #include <linux/dma-mapping.h> | ||
81 | #include <linux/init.h> | 82 | #include <linux/init.h> |
82 | #include <linux/netdevice.h> | 83 | #include <linux/netdevice.h> |
83 | #include <linux/etherdevice.h> | 84 | #include <linux/etherdevice.h> |
@@ -354,7 +355,7 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev, | |||
354 | SET_MODULE_OWNER(dev); | 355 | SET_MODULE_OWNER(dev); |
355 | SET_NETDEV_DEV(dev, &pdev->dev); | 356 | SET_NETDEV_DEV(dev, &pdev->dev); |
356 | 357 | ||
357 | if (pci_set_dma_mask(pdev, 0xffffffff)) { | 358 | if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
358 | printk(KERN_WARNING DRV_NAME ": 32-bit PCI DMA not available.\n"); | 359 | printk(KERN_WARNING DRV_NAME ": 32-bit PCI DMA not available.\n"); |
359 | err = -ENODEV; | 360 | err = -ENODEV; |
360 | goto err_out_free; | 361 | goto err_out_free; |
@@ -743,11 +744,6 @@ static irqreturn_t dmfe_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
743 | 744 | ||
744 | DMFE_DBUG(0, "dmfe_interrupt()", 0); | 745 | DMFE_DBUG(0, "dmfe_interrupt()", 0); |
745 | 746 | ||
746 | if (!dev) { | ||
747 | DMFE_DBUG(1, "dmfe_interrupt() without DEVICE arg", 0); | ||
748 | return IRQ_NONE; | ||
749 | } | ||
750 | |||
751 | spin_lock_irqsave(&db->lock, flags); | 747 | spin_lock_irqsave(&db->lock, flags); |
752 | 748 | ||
753 | /* Got DM910X status */ | 749 | /* Got DM910X status */ |
@@ -949,8 +945,8 @@ static void dmfe_rx_packet(struct DEVICE *dev, struct dmfe_board_info * db) | |||
949 | 945 | ||
950 | /* Received Packet CRC check need or not */ | 946 | /* Received Packet CRC check need or not */ |
951 | if ( (db->dm910x_chk_mode & 1) && | 947 | if ( (db->dm910x_chk_mode & 1) && |
952 | (cal_CRC(skb->tail, rxlen, 1) != | 948 | (cal_CRC(skb->data, rxlen, 1) != |
953 | (*(u32 *) (skb->tail+rxlen) ))) { /* FIXME (?) */ | 949 | (*(u32 *) (skb->data+rxlen) ))) { /* FIXME (?) */ |
954 | /* Found a error received packet */ | 950 | /* Found a error received packet */ |
955 | dmfe_reuse_skb(db, rxptr->rx_skb_ptr); | 951 | dmfe_reuse_skb(db, rxptr->rx_skb_ptr); |
956 | db->dm910x_chk_mode = 3; | 952 | db->dm910x_chk_mode = 3; |
@@ -963,7 +959,7 @@ static void dmfe_rx_packet(struct DEVICE *dev, struct dmfe_board_info * db) | |||
963 | /* size less than COPY_SIZE, allocate a rxlen SKB */ | 959 | /* size less than COPY_SIZE, allocate a rxlen SKB */ |
964 | skb->dev = dev; | 960 | skb->dev = dev; |
965 | skb_reserve(skb, 2); /* 16byte align */ | 961 | skb_reserve(skb, 2); /* 16byte align */ |
966 | memcpy(skb_put(skb, rxlen), rxptr->rx_skb_ptr->tail, rxlen); | 962 | memcpy(skb_put(skb, rxlen), rxptr->rx_skb_ptr->data, rxlen); |
967 | dmfe_reuse_skb(db, rxptr->rx_skb_ptr); | 963 | dmfe_reuse_skb(db, rxptr->rx_skb_ptr); |
968 | } else { | 964 | } else { |
969 | skb->dev = dev; | 965 | skb->dev = dev; |
@@ -1256,7 +1252,7 @@ static void dmfe_reuse_skb(struct dmfe_board_info *db, struct sk_buff * skb) | |||
1256 | 1252 | ||
1257 | if (!(rxptr->rdes0 & cpu_to_le32(0x80000000))) { | 1253 | if (!(rxptr->rdes0 & cpu_to_le32(0x80000000))) { |
1258 | rxptr->rx_skb_ptr = skb; | 1254 | rxptr->rx_skb_ptr = skb; |
1259 | rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->tail, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) ); | 1255 | rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) ); |
1260 | wmb(); | 1256 | wmb(); |
1261 | rxptr->rdes0 = cpu_to_le32(0x80000000); | 1257 | rxptr->rdes0 = cpu_to_le32(0x80000000); |
1262 | db->rx_avail_cnt++; | 1258 | db->rx_avail_cnt++; |
@@ -1467,7 +1463,7 @@ static void allocate_rx_buffer(struct dmfe_board_info *db) | |||
1467 | if ( ( skb = dev_alloc_skb(RX_ALLOC_SIZE) ) == NULL ) | 1463 | if ( ( skb = dev_alloc_skb(RX_ALLOC_SIZE) ) == NULL ) |
1468 | break; | 1464 | break; |
1469 | rxptr->rx_skb_ptr = skb; /* FIXME (?) */ | 1465 | rxptr->rx_skb_ptr = skb; /* FIXME (?) */ |
1470 | rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->tail, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) ); | 1466 | rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) ); |
1471 | wmb(); | 1467 | wmb(); |
1472 | rxptr->rdes0 = cpu_to_le32(0x80000000); | 1468 | rxptr->rdes0 = cpu_to_le32(0x80000000); |
1473 | rxptr = rxptr->next_rx_desc; | 1469 | rxptr = rxptr->next_rx_desc; |
@@ -1806,7 +1802,7 @@ static void dmfe_parse_srom(struct dmfe_board_info * db) | |||
1806 | if ( ( (int) srom[18] & 0xff) == SROM_V41_CODE) { | 1802 | if ( ( (int) srom[18] & 0xff) == SROM_V41_CODE) { |
1807 | /* SROM V4.01 */ | 1803 | /* SROM V4.01 */ |
1808 | /* Get NIC support media mode */ | 1804 | /* Get NIC support media mode */ |
1809 | db->NIC_capability = le16_to_cpup(srom + 34); | 1805 | db->NIC_capability = le16_to_cpup((__le16 *)srom + 34/2); |
1810 | db->PHY_reg4 = 0; | 1806 | db->PHY_reg4 = 0; |
1811 | for (tmp_reg = 1; tmp_reg < 0x10; tmp_reg <<= 1) { | 1807 | for (tmp_reg = 1; tmp_reg < 0x10; tmp_reg <<= 1) { |
1812 | switch( db->NIC_capability & tmp_reg ) { | 1808 | switch( db->NIC_capability & tmp_reg ) { |
@@ -1818,7 +1814,8 @@ static void dmfe_parse_srom(struct dmfe_board_info * db) | |||
1818 | } | 1814 | } |
1819 | 1815 | ||
1820 | /* Media Mode Force or not check */ | 1816 | /* Media Mode Force or not check */ |
1821 | dmfe_mode = le32_to_cpup(srom + 34) & le32_to_cpup(srom + 36); | 1817 | dmfe_mode = le32_to_cpup((__le32 *)srom + 34/4) & |
1818 | le32_to_cpup((__le32 *)srom + 36/4); | ||
1822 | switch(dmfe_mode) { | 1819 | switch(dmfe_mode) { |
1823 | case 0x4: dmfe_media_mode = DMFE_100MHF; break; /* 100MHF */ | 1820 | case 0x4: dmfe_media_mode = DMFE_100MHF; break; /* 100MHF */ |
1824 | case 0x2: dmfe_media_mode = DMFE_10MFD; break; /* 10MFD */ | 1821 | case 0x2: dmfe_media_mode = DMFE_10MFD; break; /* 10MFD */ |
diff --git a/drivers/net/tulip/eeprom.c b/drivers/net/tulip/eeprom.c index ac5bf49ff60f..fbd9ab60b052 100644 --- a/drivers/net/tulip/eeprom.c +++ b/drivers/net/tulip/eeprom.c | |||
@@ -63,6 +63,22 @@ static struct eeprom_fixup eeprom_fixups[] __devinitdata = { | |||
63 | */ | 63 | */ |
64 | { 0x1e00, 0x0000, 0x000b, 0x8f01, 0x0103, 0x0300, 0x0821, 0x000, 0x0001, 0x0000, 0x01e1 } | 64 | { 0x1e00, 0x0000, 0x000b, 0x8f01, 0x0103, 0x0300, 0x0821, 0x000, 0x0001, 0x0000, 0x01e1 } |
65 | }, | 65 | }, |
66 | {"Cobalt Microserver", 0, 0x10, 0xE0, {0x1e00, /* 0 == controller #, 1e == offset */ | ||
67 | 0x0000, /* 0 == high offset, 0 == gap */ | ||
68 | 0x0800, /* Default Autoselect */ | ||
69 | 0x8001, /* 1 leaf, extended type, bogus len */ | ||
70 | 0x0003, /* Type 3 (MII), PHY #0 */ | ||
71 | 0x0400, /* 0 init instr, 4 reset instr */ | ||
72 | 0x0801, /* Set control mode, GP0 output */ | ||
73 | 0x0000, /* Drive GP0 Low (RST is active low) */ | ||
74 | 0x0800, /* control mode, GP0 input (undriven) */ | ||
75 | 0x0000, /* clear control mode */ | ||
76 | 0x7800, /* 100TX FDX + HDX, 10bT FDX + HDX */ | ||
77 | 0x01e0, /* Advertise all above */ | ||
78 | 0x5000, /* FDX all above */ | ||
79 | 0x1800, /* Set fast TTM in 100bt modes */ | ||
80 | 0x0000, /* PHY cannot be unplugged */ | ||
81 | }}, | ||
66 | {NULL}}; | 82 | {NULL}}; |
67 | 83 | ||
68 | 84 | ||
diff --git a/drivers/net/tulip/interrupt.c b/drivers/net/tulip/interrupt.c index afb5cda9d8e1..bb3558164a5b 100644 --- a/drivers/net/tulip/interrupt.c +++ b/drivers/net/tulip/interrupt.c | |||
@@ -78,7 +78,7 @@ int tulip_refill_rx(struct net_device *dev) | |||
78 | if (skb == NULL) | 78 | if (skb == NULL) |
79 | break; | 79 | break; |
80 | 80 | ||
81 | mapping = pci_map_single(tp->pdev, skb->tail, PKT_BUF_SZ, | 81 | mapping = pci_map_single(tp->pdev, skb->data, PKT_BUF_SZ, |
82 | PCI_DMA_FROMDEVICE); | 82 | PCI_DMA_FROMDEVICE); |
83 | tp->rx_buffers[entry].mapping = mapping; | 83 | tp->rx_buffers[entry].mapping = mapping; |
84 | 84 | ||
@@ -199,12 +199,12 @@ int tulip_poll(struct net_device *dev, int *budget) | |||
199 | tp->rx_buffers[entry].mapping, | 199 | tp->rx_buffers[entry].mapping, |
200 | pkt_len, PCI_DMA_FROMDEVICE); | 200 | pkt_len, PCI_DMA_FROMDEVICE); |
201 | #if ! defined(__alpha__) | 201 | #if ! defined(__alpha__) |
202 | eth_copy_and_sum(skb, tp->rx_buffers[entry].skb->tail, | 202 | eth_copy_and_sum(skb, tp->rx_buffers[entry].skb->data, |
203 | pkt_len, 0); | 203 | pkt_len, 0); |
204 | skb_put(skb, pkt_len); | 204 | skb_put(skb, pkt_len); |
205 | #else | 205 | #else |
206 | memcpy(skb_put(skb, pkt_len), | 206 | memcpy(skb_put(skb, pkt_len), |
207 | tp->rx_buffers[entry].skb->tail, | 207 | tp->rx_buffers[entry].skb->data, |
208 | pkt_len); | 208 | pkt_len); |
209 | #endif | 209 | #endif |
210 | pci_dma_sync_single_for_device(tp->pdev, | 210 | pci_dma_sync_single_for_device(tp->pdev, |
@@ -423,12 +423,12 @@ static int tulip_rx(struct net_device *dev) | |||
423 | tp->rx_buffers[entry].mapping, | 423 | tp->rx_buffers[entry].mapping, |
424 | pkt_len, PCI_DMA_FROMDEVICE); | 424 | pkt_len, PCI_DMA_FROMDEVICE); |
425 | #if ! defined(__alpha__) | 425 | #if ! defined(__alpha__) |
426 | eth_copy_and_sum(skb, tp->rx_buffers[entry].skb->tail, | 426 | eth_copy_and_sum(skb, tp->rx_buffers[entry].skb->data, |
427 | pkt_len, 0); | 427 | pkt_len, 0); |
428 | skb_put(skb, pkt_len); | 428 | skb_put(skb, pkt_len); |
429 | #else | 429 | #else |
430 | memcpy(skb_put(skb, pkt_len), | 430 | memcpy(skb_put(skb, pkt_len), |
431 | tp->rx_buffers[entry].skb->tail, | 431 | tp->rx_buffers[entry].skb->data, |
432 | pkt_len); | 432 | pkt_len); |
433 | #endif | 433 | #endif |
434 | pci_dma_sync_single_for_device(tp->pdev, | 434 | pci_dma_sync_single_for_device(tp->pdev, |
diff --git a/drivers/net/tulip/media.c b/drivers/net/tulip/media.c index 919c40cd635c..e26c31f944bf 100644 --- a/drivers/net/tulip/media.c +++ b/drivers/net/tulip/media.c | |||
@@ -400,6 +400,9 @@ void tulip_select_media(struct net_device *dev, int startup) | |||
400 | } | 400 | } |
401 | 401 | ||
402 | tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0); | 402 | tp->csr6 = new_csr6 | (tp->csr6 & 0xfdff) | (tp->full_duplex ? 0x0200 : 0); |
403 | |||
404 | mdelay(1); | ||
405 | |||
403 | return; | 406 | return; |
404 | } | 407 | } |
405 | 408 | ||
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c index e0ae3ed6e578..d45d8f56e5b4 100644 --- a/drivers/net/tulip/tulip_core.c +++ b/drivers/net/tulip/tulip_core.c | |||
@@ -242,6 +242,7 @@ static struct pci_device_id tulip_pci_tbl[] = { | |||
242 | { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */ | 242 | { 0x10b9, 0x5261, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */ |
243 | { 0x10b9, 0x5263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */ | 243 | { 0x10b9, 0x5263, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ULI526X }, /* ALi 1563 integrated ethernet */ |
244 | { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */ | 244 | { 0x10b7, 0x9300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* 3Com 3CSOHO100B-TX */ |
245 | { 0x14ea, 0xab08, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET }, /* Planex FNW-3602-TX */ | ||
245 | { } /* terminate list */ | 246 | { } /* terminate list */ |
246 | }; | 247 | }; |
247 | MODULE_DEVICE_TABLE(pci, tulip_pci_tbl); | 248 | MODULE_DEVICE_TABLE(pci, tulip_pci_tbl); |
@@ -624,7 +625,7 @@ static void tulip_init_ring(struct net_device *dev) | |||
624 | tp->rx_buffers[i].skb = skb; | 625 | tp->rx_buffers[i].skb = skb; |
625 | if (skb == NULL) | 626 | if (skb == NULL) |
626 | break; | 627 | break; |
627 | mapping = pci_map_single(tp->pdev, skb->tail, | 628 | mapping = pci_map_single(tp->pdev, skb->data, |
628 | PKT_BUF_SZ, PCI_DMA_FROMDEVICE); | 629 | PKT_BUF_SZ, PCI_DMA_FROMDEVICE); |
629 | tp->rx_buffers[i].mapping = mapping; | 630 | tp->rx_buffers[i].mapping = mapping; |
630 | skb->dev = dev; /* Mark as being used by this device. */ | 631 | skb->dev = dev; /* Mark as being used by this device. */ |
@@ -1514,8 +1515,8 @@ static int __devinit tulip_init_one (struct pci_dev *pdev, | |||
1514 | (PCI_SLOT(pdev->devfn) == 12))) { | 1515 | (PCI_SLOT(pdev->devfn) == 12))) { |
1515 | /* Cobalt MAC address in first EEPROM locations. */ | 1516 | /* Cobalt MAC address in first EEPROM locations. */ |
1516 | sa_offset = 0; | 1517 | sa_offset = 0; |
1517 | /* No media table either */ | 1518 | /* Ensure our media table fixup get's applied */ |
1518 | tp->flags &= ~HAS_MEDIA_TABLE; | 1519 | memcpy(ee_data + 16, ee_data, 8); |
1519 | } | 1520 | } |
1520 | #endif | 1521 | #endif |
1521 | #ifdef CONFIG_GSC | 1522 | #ifdef CONFIG_GSC |
@@ -1756,11 +1757,19 @@ static int tulip_suspend (struct pci_dev *pdev, pm_message_t state) | |||
1756 | { | 1757 | { |
1757 | struct net_device *dev = pci_get_drvdata(pdev); | 1758 | struct net_device *dev = pci_get_drvdata(pdev); |
1758 | 1759 | ||
1759 | if (dev && netif_running (dev) && netif_device_present (dev)) { | 1760 | if (!dev) |
1760 | netif_device_detach (dev); | 1761 | return -EINVAL; |
1761 | tulip_down (dev); | 1762 | |
1762 | /* pci_power_off(pdev, -1); */ | 1763 | if (netif_running(dev)) |
1763 | } | 1764 | tulip_down(dev); |
1765 | |||
1766 | netif_device_detach(dev); | ||
1767 | free_irq(dev->irq, dev); | ||
1768 | |||
1769 | pci_save_state(pdev); | ||
1770 | pci_disable_device(pdev); | ||
1771 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
1772 | |||
1764 | return 0; | 1773 | return 0; |
1765 | } | 1774 | } |
1766 | 1775 | ||
@@ -1768,15 +1777,26 @@ static int tulip_suspend (struct pci_dev *pdev, pm_message_t state) | |||
1768 | static int tulip_resume(struct pci_dev *pdev) | 1777 | static int tulip_resume(struct pci_dev *pdev) |
1769 | { | 1778 | { |
1770 | struct net_device *dev = pci_get_drvdata(pdev); | 1779 | struct net_device *dev = pci_get_drvdata(pdev); |
1780 | int retval; | ||
1771 | 1781 | ||
1772 | if (dev && netif_running (dev) && !netif_device_present (dev)) { | 1782 | if (!dev) |
1773 | #if 1 | 1783 | return -EINVAL; |
1774 | pci_enable_device (pdev); | 1784 | |
1775 | #endif | 1785 | pci_set_power_state(pdev, PCI_D0); |
1776 | /* pci_power_on(pdev); */ | 1786 | pci_restore_state(pdev); |
1777 | tulip_up (dev); | 1787 | |
1778 | netif_device_attach (dev); | 1788 | pci_enable_device(pdev); |
1789 | |||
1790 | if ((retval = request_irq(dev->irq, &tulip_interrupt, SA_SHIRQ, dev->name, dev))) { | ||
1791 | printk (KERN_ERR "tulip: request_irq failed in resume\n"); | ||
1792 | return retval; | ||
1779 | } | 1793 | } |
1794 | |||
1795 | netif_device_attach(dev); | ||
1796 | |||
1797 | if (netif_running(dev)) | ||
1798 | tulip_up(dev); | ||
1799 | |||
1780 | return 0; | 1800 | return 0; |
1781 | } | 1801 | } |
1782 | 1802 | ||
diff --git a/drivers/net/tulip/winbond-840.c b/drivers/net/tulip/winbond-840.c index caff2f590165..5b1af3986abf 100644 --- a/drivers/net/tulip/winbond-840.c +++ b/drivers/net/tulip/winbond-840.c | |||
@@ -121,6 +121,7 @@ static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; | |||
121 | #include <linux/slab.h> | 121 | #include <linux/slab.h> |
122 | #include <linux/interrupt.h> | 122 | #include <linux/interrupt.h> |
123 | #include <linux/pci.h> | 123 | #include <linux/pci.h> |
124 | #include <linux/dma-mapping.h> | ||
124 | #include <linux/netdevice.h> | 125 | #include <linux/netdevice.h> |
125 | #include <linux/etherdevice.h> | 126 | #include <linux/etherdevice.h> |
126 | #include <linux/skbuff.h> | 127 | #include <linux/skbuff.h> |
@@ -394,7 +395,7 @@ static int __devinit w840_probe1 (struct pci_dev *pdev, | |||
394 | 395 | ||
395 | irq = pdev->irq; | 396 | irq = pdev->irq; |
396 | 397 | ||
397 | if (pci_set_dma_mask(pdev,0xFFFFffff)) { | 398 | if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
398 | printk(KERN_WARNING "Winbond-840: Device %s disabled due to DMA limitations.\n", | 399 | printk(KERN_WARNING "Winbond-840: Device %s disabled due to DMA limitations.\n", |
399 | pci_name(pdev)); | 400 | pci_name(pdev)); |
400 | return -EIO; | 401 | return -EIO; |
@@ -848,7 +849,7 @@ static void init_rxtx_rings(struct net_device *dev) | |||
848 | if (skb == NULL) | 849 | if (skb == NULL) |
849 | break; | 850 | break; |
850 | skb->dev = dev; /* Mark as being used by this device. */ | 851 | skb->dev = dev; /* Mark as being used by this device. */ |
851 | np->rx_addr[i] = pci_map_single(np->pci_dev,skb->tail, | 852 | np->rx_addr[i] = pci_map_single(np->pci_dev,skb->data, |
852 | skb->len,PCI_DMA_FROMDEVICE); | 853 | skb->len,PCI_DMA_FROMDEVICE); |
853 | 854 | ||
854 | np->rx_ring[i].buffer1 = np->rx_addr[i]; | 855 | np->rx_ring[i].buffer1 = np->rx_addr[i]; |
@@ -1268,7 +1269,7 @@ static int netdev_rx(struct net_device *dev) | |||
1268 | pci_dma_sync_single_for_cpu(np->pci_dev,np->rx_addr[entry], | 1269 | pci_dma_sync_single_for_cpu(np->pci_dev,np->rx_addr[entry], |
1269 | np->rx_skbuff[entry]->len, | 1270 | np->rx_skbuff[entry]->len, |
1270 | PCI_DMA_FROMDEVICE); | 1271 | PCI_DMA_FROMDEVICE); |
1271 | eth_copy_and_sum(skb, np->rx_skbuff[entry]->tail, pkt_len, 0); | 1272 | eth_copy_and_sum(skb, np->rx_skbuff[entry]->data, pkt_len, 0); |
1272 | skb_put(skb, pkt_len); | 1273 | skb_put(skb, pkt_len); |
1273 | pci_dma_sync_single_for_device(np->pci_dev,np->rx_addr[entry], | 1274 | pci_dma_sync_single_for_device(np->pci_dev,np->rx_addr[entry], |
1274 | np->rx_skbuff[entry]->len, | 1275 | np->rx_skbuff[entry]->len, |
@@ -1314,7 +1315,7 @@ static int netdev_rx(struct net_device *dev) | |||
1314 | break; /* Better luck next round. */ | 1315 | break; /* Better luck next round. */ |
1315 | skb->dev = dev; /* Mark as being used by this device. */ | 1316 | skb->dev = dev; /* Mark as being used by this device. */ |
1316 | np->rx_addr[entry] = pci_map_single(np->pci_dev, | 1317 | np->rx_addr[entry] = pci_map_single(np->pci_dev, |
1317 | skb->tail, | 1318 | skb->data, |
1318 | skb->len, PCI_DMA_FROMDEVICE); | 1319 | skb->len, PCI_DMA_FROMDEVICE); |
1319 | np->rx_ring[entry].buffer1 = np->rx_addr[entry]; | 1320 | np->rx_ring[entry].buffer1 = np->rx_addr[entry]; |
1320 | } | 1321 | } |
diff --git a/drivers/net/tulip/xircom_tulip_cb.c b/drivers/net/tulip/xircom_tulip_cb.c index b8a9b395c5ea..887d7245fe7b 100644 --- a/drivers/net/tulip/xircom_tulip_cb.c +++ b/drivers/net/tulip/xircom_tulip_cb.c | |||
@@ -899,7 +899,7 @@ static void xircom_init_ring(struct net_device *dev) | |||
899 | break; | 899 | break; |
900 | skb->dev = dev; /* Mark as being used by this device. */ | 900 | skb->dev = dev; /* Mark as being used by this device. */ |
901 | tp->rx_ring[i].status = Rx0DescOwned; /* Owned by Xircom chip */ | 901 | tp->rx_ring[i].status = Rx0DescOwned; /* Owned by Xircom chip */ |
902 | tp->rx_ring[i].buffer1 = virt_to_bus(skb->tail); | 902 | tp->rx_ring[i].buffer1 = virt_to_bus(skb->data); |
903 | } | 903 | } |
904 | tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); | 904 | tp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); |
905 | 905 | ||
@@ -1291,7 +1291,7 @@ xircom_rx(struct net_device *dev) | |||
1291 | if (skb == NULL) | 1291 | if (skb == NULL) |
1292 | break; | 1292 | break; |
1293 | skb->dev = dev; /* Mark as being used by this device. */ | 1293 | skb->dev = dev; /* Mark as being used by this device. */ |
1294 | tp->rx_ring[entry].buffer1 = virt_to_bus(skb->tail); | 1294 | tp->rx_ring[entry].buffer1 = virt_to_bus(skb->data); |
1295 | work_done++; | 1295 | work_done++; |
1296 | } | 1296 | } |
1297 | tp->rx_ring[entry].status = Rx0DescOwned; | 1297 | tp->rx_ring[entry].status = Rx0DescOwned; |
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 7bfee366297b..effab0b9adca 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
@@ -215,7 +215,7 @@ static unsigned int tun_chr_poll(struct file *file, poll_table * wait) | |||
215 | 215 | ||
216 | poll_wait(file, &tun->read_wait, wait); | 216 | poll_wait(file, &tun->read_wait, wait); |
217 | 217 | ||
218 | if (skb_queue_len(&tun->readq)) | 218 | if (!skb_queue_empty(&tun->readq)) |
219 | mask |= POLLIN | POLLRDNORM; | 219 | mask |= POLLIN | POLLRDNORM; |
220 | 220 | ||
221 | return mask; | 221 | return mask; |
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c index 8f3392989a06..ecfa6f8805ce 100644 --- a/drivers/net/typhoon.c +++ b/drivers/net/typhoon.c | |||
@@ -1661,7 +1661,7 @@ typhoon_alloc_rx_skb(struct typhoon *tp, u32 idx) | |||
1661 | #endif | 1661 | #endif |
1662 | 1662 | ||
1663 | skb->dev = tp->dev; | 1663 | skb->dev = tp->dev; |
1664 | dma_addr = pci_map_single(tp->pdev, skb->tail, | 1664 | dma_addr = pci_map_single(tp->pdev, skb->data, |
1665 | PKT_BUF_SZ, PCI_DMA_FROMDEVICE); | 1665 | PKT_BUF_SZ, PCI_DMA_FROMDEVICE); |
1666 | 1666 | ||
1667 | /* Since no card does 64 bit DAC, the high bits will never | 1667 | /* Since no card does 64 bit DAC, the high bits will never |
@@ -1721,7 +1721,7 @@ typhoon_rx(struct typhoon *tp, struct basic_ring *rxRing, volatile u32 * ready, | |||
1721 | pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, | 1721 | pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, |
1722 | PKT_BUF_SZ, | 1722 | PKT_BUF_SZ, |
1723 | PCI_DMA_FROMDEVICE); | 1723 | PCI_DMA_FROMDEVICE); |
1724 | eth_copy_and_sum(new_skb, skb->tail, pkt_len, 0); | 1724 | eth_copy_and_sum(new_skb, skb->data, pkt_len, 0); |
1725 | pci_dma_sync_single_for_device(tp->pdev, dma_addr, | 1725 | pci_dma_sync_single_for_device(tp->pdev, dma_addr, |
1726 | PKT_BUF_SZ, | 1726 | PKT_BUF_SZ, |
1727 | PCI_DMA_FROMDEVICE); | 1727 | PCI_DMA_FROMDEVICE); |
@@ -1906,9 +1906,9 @@ typhoon_sleep(struct typhoon *tp, pci_power_t state, u16 events) | |||
1906 | */ | 1906 | */ |
1907 | netif_carrier_off(tp->dev); | 1907 | netif_carrier_off(tp->dev); |
1908 | 1908 | ||
1909 | pci_enable_wake(tp->pdev, pci_choose_state(pdev, state), 1); | 1909 | pci_enable_wake(tp->pdev, state, 1); |
1910 | pci_disable_device(pdev); | 1910 | pci_disable_device(pdev); |
1911 | return pci_set_power_state(pdev, pci_choose_state(pdev, state)); | 1911 | return pci_set_power_state(pdev, state); |
1912 | } | 1912 | } |
1913 | 1913 | ||
1914 | static int | 1914 | static int |
@@ -2274,7 +2274,7 @@ typhoon_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2274 | goto need_resume; | 2274 | goto need_resume; |
2275 | } | 2275 | } |
2276 | 2276 | ||
2277 | if(typhoon_sleep(tp, state, tp->wol_events) < 0) { | 2277 | if(typhoon_sleep(tp, pci_choose_state(pdev, state), tp->wol_events) < 0) { |
2278 | printk(KERN_ERR "%s: unable to put card to sleep\n", dev->name); | 2278 | printk(KERN_ERR "%s: unable to put card to sleep\n", dev->name); |
2279 | goto need_resume; | 2279 | goto need_resume; |
2280 | } | 2280 | } |
diff --git a/drivers/net/via-rhine.c b/drivers/net/via-rhine.c index 7b57d552094a..fc7738ffbfff 100644 --- a/drivers/net/via-rhine.c +++ b/drivers/net/via-rhine.c | |||
@@ -186,6 +186,7 @@ static const int multicast_filter_limit = 32; | |||
186 | #include <linux/slab.h> | 186 | #include <linux/slab.h> |
187 | #include <linux/interrupt.h> | 187 | #include <linux/interrupt.h> |
188 | #include <linux/pci.h> | 188 | #include <linux/pci.h> |
189 | #include <linux/dma-mapping.h> | ||
189 | #include <linux/netdevice.h> | 190 | #include <linux/netdevice.h> |
190 | #include <linux/etherdevice.h> | 191 | #include <linux/etherdevice.h> |
191 | #include <linux/skbuff.h> | 192 | #include <linux/skbuff.h> |
@@ -506,7 +507,7 @@ static struct net_device_stats *rhine_get_stats(struct net_device *dev); | |||
506 | static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | 507 | static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
507 | static struct ethtool_ops netdev_ethtool_ops; | 508 | static struct ethtool_ops netdev_ethtool_ops; |
508 | static int rhine_close(struct net_device *dev); | 509 | static int rhine_close(struct net_device *dev); |
509 | static void rhine_shutdown (struct device *gdev); | 510 | static void rhine_shutdown (struct pci_dev *pdev); |
510 | 511 | ||
511 | #define RHINE_WAIT_FOR(condition) do { \ | 512 | #define RHINE_WAIT_FOR(condition) do { \ |
512 | int i=1024; \ | 513 | int i=1024; \ |
@@ -740,7 +741,7 @@ static int __devinit rhine_init_one(struct pci_dev *pdev, | |||
740 | goto err_out; | 741 | goto err_out; |
741 | 742 | ||
742 | /* this should always be supported */ | 743 | /* this should always be supported */ |
743 | rc = pci_set_dma_mask(pdev, 0xffffffff); | 744 | rc = pci_set_dma_mask(pdev, DMA_32BIT_MASK); |
744 | if (rc) { | 745 | if (rc) { |
745 | printk(KERN_ERR "32-bit PCI DMA addresses not supported by " | 746 | printk(KERN_ERR "32-bit PCI DMA addresses not supported by " |
746 | "the card!?\n"); | 747 | "the card!?\n"); |
@@ -989,7 +990,7 @@ static void alloc_rbufs(struct net_device *dev) | |||
989 | skb->dev = dev; /* Mark as being used by this device. */ | 990 | skb->dev = dev; /* Mark as being used by this device. */ |
990 | 991 | ||
991 | rp->rx_skbuff_dma[i] = | 992 | rp->rx_skbuff_dma[i] = |
992 | pci_map_single(rp->pdev, skb->tail, rp->rx_buf_sz, | 993 | pci_map_single(rp->pdev, skb->data, rp->rx_buf_sz, |
993 | PCI_DMA_FROMDEVICE); | 994 | PCI_DMA_FROMDEVICE); |
994 | 995 | ||
995 | rp->rx_ring[i].addr = cpu_to_le32(rp->rx_skbuff_dma[i]); | 996 | rp->rx_ring[i].addr = cpu_to_le32(rp->rx_skbuff_dma[i]); |
@@ -1397,7 +1398,7 @@ static void rhine_tx(struct net_device *dev) | |||
1397 | while (rp->dirty_tx != rp->cur_tx) { | 1398 | while (rp->dirty_tx != rp->cur_tx) { |
1398 | txstatus = le32_to_cpu(rp->tx_ring[entry].tx_status); | 1399 | txstatus = le32_to_cpu(rp->tx_ring[entry].tx_status); |
1399 | if (debug > 6) | 1400 | if (debug > 6) |
1400 | printk(KERN_DEBUG " Tx scavenge %d status %8.8x.\n", | 1401 | printk(KERN_DEBUG "Tx scavenge %d status %8.8x.\n", |
1401 | entry, txstatus); | 1402 | entry, txstatus); |
1402 | if (txstatus & DescOwn) | 1403 | if (txstatus & DescOwn) |
1403 | break; | 1404 | break; |
@@ -1468,7 +1469,7 @@ static void rhine_rx(struct net_device *dev) | |||
1468 | int data_size = desc_status >> 16; | 1469 | int data_size = desc_status >> 16; |
1469 | 1470 | ||
1470 | if (debug > 4) | 1471 | if (debug > 4) |
1471 | printk(KERN_DEBUG " rhine_rx() status is %8.8x.\n", | 1472 | printk(KERN_DEBUG "rhine_rx() status is %8.8x.\n", |
1472 | desc_status); | 1473 | desc_status); |
1473 | if (--boguscnt < 0) | 1474 | if (--boguscnt < 0) |
1474 | break; | 1475 | break; |
@@ -1486,7 +1487,7 @@ static void rhine_rx(struct net_device *dev) | |||
1486 | } else if (desc_status & RxErr) { | 1487 | } else if (desc_status & RxErr) { |
1487 | /* There was a error. */ | 1488 | /* There was a error. */ |
1488 | if (debug > 2) | 1489 | if (debug > 2) |
1489 | printk(KERN_DEBUG " rhine_rx() Rx " | 1490 | printk(KERN_DEBUG "rhine_rx() Rx " |
1490 | "error was %8.8x.\n", | 1491 | "error was %8.8x.\n", |
1491 | desc_status); | 1492 | desc_status); |
1492 | rp->stats.rx_errors++; | 1493 | rp->stats.rx_errors++; |
@@ -1517,7 +1518,7 @@ static void rhine_rx(struct net_device *dev) | |||
1517 | PCI_DMA_FROMDEVICE); | 1518 | PCI_DMA_FROMDEVICE); |
1518 | 1519 | ||
1519 | eth_copy_and_sum(skb, | 1520 | eth_copy_and_sum(skb, |
1520 | rp->rx_skbuff[entry]->tail, | 1521 | rp->rx_skbuff[entry]->data, |
1521 | pkt_len, 0); | 1522 | pkt_len, 0); |
1522 | skb_put(skb, pkt_len); | 1523 | skb_put(skb, pkt_len); |
1523 | pci_dma_sync_single_for_device(rp->pdev, | 1524 | pci_dma_sync_single_for_device(rp->pdev, |
@@ -1560,7 +1561,7 @@ static void rhine_rx(struct net_device *dev) | |||
1560 | break; /* Better luck next round. */ | 1561 | break; /* Better luck next round. */ |
1561 | skb->dev = dev; /* Mark as being used by this device. */ | 1562 | skb->dev = dev; /* Mark as being used by this device. */ |
1562 | rp->rx_skbuff_dma[entry] = | 1563 | rp->rx_skbuff_dma[entry] = |
1563 | pci_map_single(rp->pdev, skb->tail, | 1564 | pci_map_single(rp->pdev, skb->data, |
1564 | rp->rx_buf_sz, | 1565 | rp->rx_buf_sz, |
1565 | PCI_DMA_FROMDEVICE); | 1566 | PCI_DMA_FROMDEVICE); |
1566 | rp->rx_ring[entry].addr = cpu_to_le32(rp->rx_skbuff_dma[entry]); | 1567 | rp->rx_ring[entry].addr = cpu_to_le32(rp->rx_skbuff_dma[entry]); |
@@ -1894,9 +1895,8 @@ static void __devexit rhine_remove_one(struct pci_dev *pdev) | |||
1894 | pci_set_drvdata(pdev, NULL); | 1895 | pci_set_drvdata(pdev, NULL); |
1895 | } | 1896 | } |
1896 | 1897 | ||
1897 | static void rhine_shutdown (struct device *gendev) | 1898 | static void rhine_shutdown (struct pci_dev *pdev) |
1898 | { | 1899 | { |
1899 | struct pci_dev *pdev = to_pci_dev(gendev); | ||
1900 | struct net_device *dev = pci_get_drvdata(pdev); | 1900 | struct net_device *dev = pci_get_drvdata(pdev); |
1901 | struct rhine_private *rp = netdev_priv(dev); | 1901 | struct rhine_private *rp = netdev_priv(dev); |
1902 | void __iomem *ioaddr = rp->base; | 1902 | void __iomem *ioaddr = rp->base; |
@@ -1955,7 +1955,7 @@ static int rhine_suspend(struct pci_dev *pdev, pm_message_t state) | |||
1955 | pci_save_state(pdev); | 1955 | pci_save_state(pdev); |
1956 | 1956 | ||
1957 | spin_lock_irqsave(&rp->lock, flags); | 1957 | spin_lock_irqsave(&rp->lock, flags); |
1958 | rhine_shutdown(&pdev->dev); | 1958 | rhine_shutdown(pdev); |
1959 | spin_unlock_irqrestore(&rp->lock, flags); | 1959 | spin_unlock_irqrestore(&rp->lock, flags); |
1960 | 1960 | ||
1961 | free_irq(dev->irq, dev); | 1961 | free_irq(dev->irq, dev); |
@@ -2009,9 +2009,7 @@ static struct pci_driver rhine_driver = { | |||
2009 | .suspend = rhine_suspend, | 2009 | .suspend = rhine_suspend, |
2010 | .resume = rhine_resume, | 2010 | .resume = rhine_resume, |
2011 | #endif /* CONFIG_PM */ | 2011 | #endif /* CONFIG_PM */ |
2012 | .driver = { | 2012 | .shutdown = rhine_shutdown, |
2013 | .shutdown = rhine_shutdown, | ||
2014 | } | ||
2015 | }; | 2013 | }; |
2016 | 2014 | ||
2017 | 2015 | ||
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c index 15e710283493..abc5cee6eedc 100644 --- a/drivers/net/via-velocity.c +++ b/drivers/net/via-velocity.c | |||
@@ -1335,7 +1335,7 @@ static inline int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size, | |||
1335 | if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) | 1335 | if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) |
1336 | skb_reserve(new_skb, 2); | 1336 | skb_reserve(new_skb, 2); |
1337 | 1337 | ||
1338 | memcpy(new_skb->data, rx_skb[0]->tail, pkt_size); | 1338 | memcpy(new_skb->data, rx_skb[0]->data, pkt_size); |
1339 | *rx_skb = new_skb; | 1339 | *rx_skb = new_skb; |
1340 | ret = 0; | 1340 | ret = 0; |
1341 | } | 1341 | } |
@@ -1456,9 +1456,9 @@ static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx) | |||
1456 | * Do the gymnastics to get the buffer head for data at | 1456 | * Do the gymnastics to get the buffer head for data at |
1457 | * 64byte alignment. | 1457 | * 64byte alignment. |
1458 | */ | 1458 | */ |
1459 | skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->tail & 63); | 1459 | skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63); |
1460 | rd_info->skb->dev = vptr->dev; | 1460 | rd_info->skb->dev = vptr->dev; |
1461 | rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->tail, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1461 | rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data, vptr->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1462 | 1462 | ||
1463 | /* | 1463 | /* |
1464 | * Fill in the descriptor to match | 1464 | * Fill in the descriptor to match |
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h index 1b70b7c97580..d9a774b91ddc 100644 --- a/drivers/net/via-velocity.h +++ b/drivers/net/via-velocity.h | |||
@@ -1414,7 +1414,7 @@ static inline void mac_get_cam(struct mac_regs __iomem * regs, int idx, u8 *addr | |||
1414 | * the rest of the logic from the result of sleep/wakeup | 1414 | * the rest of the logic from the result of sleep/wakeup |
1415 | */ | 1415 | */ |
1416 | 1416 | ||
1417 | inline static void mac_wol_reset(struct mac_regs __iomem * regs) | 1417 | static inline void mac_wol_reset(struct mac_regs __iomem * regs) |
1418 | { | 1418 | { |
1419 | 1419 | ||
1420 | /* Turn off SWPTAG right after leaving power mode */ | 1420 | /* Turn off SWPTAG right after leaving power mode */ |
@@ -1811,7 +1811,7 @@ struct velocity_info { | |||
1811 | * CHECK ME: locking | 1811 | * CHECK ME: locking |
1812 | */ | 1812 | */ |
1813 | 1813 | ||
1814 | inline static int velocity_get_ip(struct velocity_info *vptr) | 1814 | static inline int velocity_get_ip(struct velocity_info *vptr) |
1815 | { | 1815 | { |
1816 | struct in_device *in_dev = (struct in_device *) vptr->dev->ip_ptr; | 1816 | struct in_device *in_dev = (struct in_device *) vptr->dev->ip_ptr; |
1817 | struct in_ifaddr *ifa; | 1817 | struct in_ifaddr *ifa; |
diff --git a/drivers/net/wan/Kconfig b/drivers/net/wan/Kconfig index 66b94668ddd8..18c27e1e7884 100644 --- a/drivers/net/wan/Kconfig +++ b/drivers/net/wan/Kconfig | |||
@@ -435,7 +435,7 @@ config VENDOR_SANGOMA | |||
435 | the driver to support. | 435 | the driver to support. |
436 | 436 | ||
437 | If you have one or more of these cards, say M to this option; | 437 | If you have one or more of these cards, say M to this option; |
438 | and read <file:Documentation/networking/wanpipe.txt>. | 438 | and read <file:Documentation/networking/wan-router.txt>. |
439 | 439 | ||
440 | To compile this driver as a module, choose M here: the | 440 | To compile this driver as a module, choose M here: the |
441 | module will be called wanpipe. | 441 | module will be called wanpipe. |
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c index 921a573372e9..7ff814fd65d0 100644 --- a/drivers/net/wan/cosa.c +++ b/drivers/net/wan/cosa.c | |||
@@ -235,7 +235,7 @@ static int dma[MAX_CARDS+1]; | |||
235 | static int irq[MAX_CARDS+1] = { -1, -1, -1, -1, -1, -1, 0, }; | 235 | static int irq[MAX_CARDS+1] = { -1, -1, -1, -1, -1, -1, 0, }; |
236 | 236 | ||
237 | /* for class stuff*/ | 237 | /* for class stuff*/ |
238 | static struct class_simple *cosa_class; | 238 | static struct class *cosa_class; |
239 | 239 | ||
240 | #ifdef MODULE | 240 | #ifdef MODULE |
241 | module_param_array(io, int, NULL, 0); | 241 | module_param_array(io, int, NULL, 0); |
@@ -394,19 +394,19 @@ static int __init cosa_init(void) | |||
394 | goto out; | 394 | goto out; |
395 | } | 395 | } |
396 | devfs_mk_dir("cosa"); | 396 | devfs_mk_dir("cosa"); |
397 | cosa_class = class_simple_create(THIS_MODULE, "cosa"); | 397 | cosa_class = class_create(THIS_MODULE, "cosa"); |
398 | if (IS_ERR(cosa_class)) { | 398 | if (IS_ERR(cosa_class)) { |
399 | err = PTR_ERR(cosa_class); | 399 | err = PTR_ERR(cosa_class); |
400 | goto out_chrdev; | 400 | goto out_chrdev; |
401 | } | 401 | } |
402 | for (i=0; i<nr_cards; i++) { | 402 | for (i=0; i<nr_cards; i++) { |
403 | class_simple_device_add(cosa_class, MKDEV(cosa_major, i), | 403 | class_device_create(cosa_class, MKDEV(cosa_major, i), |
404 | NULL, "cosa%d", i); | 404 | NULL, "cosa%d", i); |
405 | err = devfs_mk_cdev(MKDEV(cosa_major, i), | 405 | err = devfs_mk_cdev(MKDEV(cosa_major, i), |
406 | S_IFCHR|S_IRUSR|S_IWUSR, | 406 | S_IFCHR|S_IRUSR|S_IWUSR, |
407 | "cosa/%d", i); | 407 | "cosa/%d", i); |
408 | if (err) { | 408 | if (err) { |
409 | class_simple_device_remove(MKDEV(cosa_major, i)); | 409 | class_device_destroy(cosa_class, MKDEV(cosa_major, i)); |
410 | goto out_chrdev; | 410 | goto out_chrdev; |
411 | } | 411 | } |
412 | } | 412 | } |
@@ -427,10 +427,10 @@ static void __exit cosa_exit(void) | |||
427 | printk(KERN_INFO "Unloading the cosa module\n"); | 427 | printk(KERN_INFO "Unloading the cosa module\n"); |
428 | 428 | ||
429 | for (i=0; i<nr_cards; i++) { | 429 | for (i=0; i<nr_cards; i++) { |
430 | class_simple_device_remove(MKDEV(cosa_major, i)); | 430 | class_device_destroy(cosa_class, MKDEV(cosa_major, i)); |
431 | devfs_remove("cosa/%d", i); | 431 | devfs_remove("cosa/%d", i); |
432 | } | 432 | } |
433 | class_simple_destroy(cosa_class); | 433 | class_destroy(cosa_class); |
434 | devfs_remove("cosa"); | 434 | devfs_remove("cosa"); |
435 | for (cosa=cosa_cards; nr_cards--; cosa++) { | 435 | for (cosa=cosa_cards; nr_cards--; cosa++) { |
436 | /* Clean up the per-channel data */ | 436 | /* Clean up the per-channel data */ |
diff --git a/drivers/net/wan/farsync.c b/drivers/net/wan/farsync.c index 7575b799ce53..2c83cca34b86 100644 --- a/drivers/net/wan/farsync.c +++ b/drivers/net/wan/farsync.c | |||
@@ -861,8 +861,7 @@ fst_tx_dma_complete(struct fst_card_info *card, struct fst_port_info *port, | |||
861 | /* | 861 | /* |
862 | * Mark it for our own raw sockets interface | 862 | * Mark it for our own raw sockets interface |
863 | */ | 863 | */ |
864 | static unsigned short farsync_type_trans(struct sk_buff *skb, | 864 | static __be16 farsync_type_trans(struct sk_buff *skb, struct net_device *dev) |
865 | struct net_device *dev) | ||
866 | { | 865 | { |
867 | skb->dev = dev; | 866 | skb->dev = dev; |
868 | skb->mac.raw = skb->data; | 867 | skb->mac.raw = skb->data; |
@@ -981,6 +980,7 @@ fst_issue_cmd(struct fst_port_info *port, unsigned short cmd) | |||
981 | /* Wait for any previous command to complete */ | 980 | /* Wait for any previous command to complete */ |
982 | while (mbval > NAK) { | 981 | while (mbval > NAK) { |
983 | spin_unlock_irqrestore(&card->card_lock, flags); | 982 | spin_unlock_irqrestore(&card->card_lock, flags); |
983 | set_current_state(TASK_UNINTERRUPTIBLE); | ||
984 | schedule_timeout(1); | 984 | schedule_timeout(1); |
985 | spin_lock_irqsave(&card->card_lock, flags); | 985 | spin_lock_irqsave(&card->card_lock, flags); |
986 | 986 | ||
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c index c1b6896d7007..48c03c11cd9a 100644 --- a/drivers/net/wan/hdlc_cisco.c +++ b/drivers/net/wan/hdlc_cisco.c | |||
@@ -72,7 +72,7 @@ static void cisco_keepalive_send(struct net_device *dev, u32 type, | |||
72 | } | 72 | } |
73 | skb_reserve(skb, 4); | 73 | skb_reserve(skb, 4); |
74 | cisco_hard_header(skb, dev, CISCO_KEEPALIVE, NULL, NULL, 0); | 74 | cisco_hard_header(skb, dev, CISCO_KEEPALIVE, NULL, NULL, 0); |
75 | data = (cisco_packet*)skb->tail; | 75 | data = (cisco_packet*)skb->data; |
76 | 76 | ||
77 | data->type = htonl(type); | 77 | data->type = htonl(type); |
78 | data->par1 = htonl(par1); | 78 | data->par1 = htonl(par1); |
@@ -91,8 +91,7 @@ static void cisco_keepalive_send(struct net_device *dev, u32 type, | |||
91 | 91 | ||
92 | 92 | ||
93 | 93 | ||
94 | static unsigned short cisco_type_trans(struct sk_buff *skb, | 94 | static __be16 cisco_type_trans(struct sk_buff *skb, struct net_device *dev) |
95 | struct net_device *dev) | ||
96 | { | 95 | { |
97 | hdlc_header *data = (hdlc_header*)skb->data; | 96 | hdlc_header *data = (hdlc_header*)skb->data; |
98 | 97 | ||
diff --git a/drivers/net/wan/hdlc_fr.c b/drivers/net/wan/hdlc_fr.c index 7f450b51a6cb..a5d6891c9d4c 100644 --- a/drivers/net/wan/hdlc_fr.c +++ b/drivers/net/wan/hdlc_fr.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Generic HDLC support routines for Linux | 2 | * Generic HDLC support routines for Linux |
3 | * Frame Relay support | 3 | * Frame Relay support |
4 | * | 4 | * |
5 | * Copyright (C) 1999 - 2003 Krzysztof Halasa <khc@pm.waw.pl> | 5 | * Copyright (C) 1999 - 2005 Krzysztof Halasa <khc@pm.waw.pl> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
8 | * under the terms of version 2 of the GNU General Public License | 8 | * under the terms of version 2 of the GNU General Public License |
@@ -27,6 +27,10 @@ | |||
27 | active = open and "link reliable" | 27 | active = open and "link reliable" |
28 | exist = new = not used | 28 | exist = new = not used |
29 | 29 | ||
30 | CCITT LMI: ITU-T Q.933 Annex A | ||
31 | ANSI LMI: ANSI T1.617 Annex D | ||
32 | CISCO LMI: the original, aka "Gang of Four" LMI | ||
33 | |||
30 | */ | 34 | */ |
31 | 35 | ||
32 | #include <linux/module.h> | 36 | #include <linux/module.h> |
@@ -49,45 +53,41 @@ | |||
49 | #undef DEBUG_ECN | 53 | #undef DEBUG_ECN |
50 | #undef DEBUG_LINK | 54 | #undef DEBUG_LINK |
51 | 55 | ||
52 | #define MAXLEN_LMISTAT 20 /* max size of status enquiry frame */ | 56 | #define FR_UI 0x03 |
53 | 57 | #define FR_PAD 0x00 | |
54 | #define PVC_STATE_NEW 0x01 | 58 | |
55 | #define PVC_STATE_ACTIVE 0x02 | 59 | #define NLPID_IP 0xCC |
56 | #define PVC_STATE_FECN 0x08 /* FECN condition */ | 60 | #define NLPID_IPV6 0x8E |
57 | #define PVC_STATE_BECN 0x10 /* BECN condition */ | 61 | #define NLPID_SNAP 0x80 |
58 | 62 | #define NLPID_PAD 0x00 | |
59 | 63 | #define NLPID_CCITT_ANSI_LMI 0x08 | |
60 | #define FR_UI 0x03 | 64 | #define NLPID_CISCO_LMI 0x09 |
61 | #define FR_PAD 0x00 | 65 | |
62 | 66 | ||
63 | #define NLPID_IP 0xCC | 67 | #define LMI_CCITT_ANSI_DLCI 0 /* LMI DLCI */ |
64 | #define NLPID_IPV6 0x8E | 68 | #define LMI_CISCO_DLCI 1023 |
65 | #define NLPID_SNAP 0x80 | 69 | |
66 | #define NLPID_PAD 0x00 | 70 | #define LMI_CALLREF 0x00 /* Call Reference */ |
67 | #define NLPID_Q933 0x08 | 71 | #define LMI_ANSI_LOCKSHIFT 0x95 /* ANSI locking shift */ |
68 | 72 | #define LMI_ANSI_CISCO_REPTYPE 0x01 /* report type */ | |
69 | 73 | #define LMI_CCITT_REPTYPE 0x51 | |
70 | #define LMI_DLCI 0 /* LMI DLCI */ | 74 | #define LMI_ANSI_CISCO_ALIVE 0x03 /* keep alive */ |
71 | #define LMI_PROTO 0x08 | 75 | #define LMI_CCITT_ALIVE 0x53 |
72 | #define LMI_CALLREF 0x00 /* Call Reference */ | 76 | #define LMI_ANSI_CISCO_PVCSTAT 0x07 /* PVC status */ |
73 | #define LMI_ANSI_LOCKSHIFT 0x95 /* ANSI lockshift */ | 77 | #define LMI_CCITT_PVCSTAT 0x57 |
74 | #define LMI_REPTYPE 1 /* report type */ | 78 | |
75 | #define LMI_CCITT_REPTYPE 0x51 | 79 | #define LMI_FULLREP 0x00 /* full report */ |
76 | #define LMI_ALIVE 3 /* keep alive */ | 80 | #define LMI_INTEGRITY 0x01 /* link integrity report */ |
77 | #define LMI_CCITT_ALIVE 0x53 | 81 | #define LMI_SINGLE 0x02 /* single PVC report */ |
78 | #define LMI_PVCSTAT 7 /* pvc status */ | 82 | |
79 | #define LMI_CCITT_PVCSTAT 0x57 | ||
80 | #define LMI_FULLREP 0 /* full report */ | ||
81 | #define LMI_INTEGRITY 1 /* link integrity report */ | ||
82 | #define LMI_SINGLE 2 /* single pvc report */ | ||
83 | #define LMI_STATUS_ENQUIRY 0x75 | 83 | #define LMI_STATUS_ENQUIRY 0x75 |
84 | #define LMI_STATUS 0x7D /* reply */ | 84 | #define LMI_STATUS 0x7D /* reply */ |
85 | 85 | ||
86 | #define LMI_REPT_LEN 1 /* report type element length */ | 86 | #define LMI_REPT_LEN 1 /* report type element length */ |
87 | #define LMI_INTEG_LEN 2 /* link integrity element length */ | 87 | #define LMI_INTEG_LEN 2 /* link integrity element length */ |
88 | 88 | ||
89 | #define LMI_LENGTH 13 /* standard LMI frame length */ | 89 | #define LMI_CCITT_CISCO_LENGTH 13 /* LMI frame lengths */ |
90 | #define LMI_ANSI_LENGTH 14 | 90 | #define LMI_ANSI_LENGTH 14 |
91 | 91 | ||
92 | 92 | ||
93 | typedef struct { | 93 | typedef struct { |
@@ -223,51 +223,34 @@ static inline struct net_device** get_dev_p(pvc_device *pvc, int type) | |||
223 | } | 223 | } |
224 | 224 | ||
225 | 225 | ||
226 | static inline u16 status_to_dlci(u8 *status, int *active, int *new) | ||
227 | { | ||
228 | *new = (status[2] & 0x08) ? 1 : 0; | ||
229 | *active = (status[2] & 0x02) ? 1 : 0; | ||
230 | |||
231 | return ((status[0] & 0x3F) << 4) | ((status[1] & 0x78) >> 3); | ||
232 | } | ||
233 | |||
234 | |||
235 | static inline void dlci_to_status(u16 dlci, u8 *status, int active, int new) | ||
236 | { | ||
237 | status[0] = (dlci >> 4) & 0x3F; | ||
238 | status[1] = ((dlci << 3) & 0x78) | 0x80; | ||
239 | status[2] = 0x80; | ||
240 | |||
241 | if (new) | ||
242 | status[2] |= 0x08; | ||
243 | else if (active) | ||
244 | status[2] |= 0x02; | ||
245 | } | ||
246 | |||
247 | |||
248 | |||
249 | static int fr_hard_header(struct sk_buff **skb_p, u16 dlci) | 226 | static int fr_hard_header(struct sk_buff **skb_p, u16 dlci) |
250 | { | 227 | { |
251 | u16 head_len; | 228 | u16 head_len; |
252 | struct sk_buff *skb = *skb_p; | 229 | struct sk_buff *skb = *skb_p; |
253 | 230 | ||
254 | switch (skb->protocol) { | 231 | switch (skb->protocol) { |
255 | case __constant_ntohs(ETH_P_IP): | 232 | case __constant_ntohs(NLPID_CCITT_ANSI_LMI): |
256 | head_len = 4; | 233 | head_len = 4; |
257 | skb_push(skb, head_len); | 234 | skb_push(skb, head_len); |
258 | skb->data[3] = NLPID_IP; | 235 | skb->data[3] = NLPID_CCITT_ANSI_LMI; |
259 | break; | 236 | break; |
260 | 237 | ||
261 | case __constant_ntohs(ETH_P_IPV6): | 238 | case __constant_ntohs(NLPID_CISCO_LMI): |
262 | head_len = 4; | 239 | head_len = 4; |
263 | skb_push(skb, head_len); | 240 | skb_push(skb, head_len); |
264 | skb->data[3] = NLPID_IPV6; | 241 | skb->data[3] = NLPID_CISCO_LMI; |
265 | break; | 242 | break; |
266 | 243 | ||
267 | case __constant_ntohs(LMI_PROTO): | 244 | case __constant_ntohs(ETH_P_IP): |
245 | head_len = 4; | ||
246 | skb_push(skb, head_len); | ||
247 | skb->data[3] = NLPID_IP; | ||
248 | break; | ||
249 | |||
250 | case __constant_ntohs(ETH_P_IPV6): | ||
268 | head_len = 4; | 251 | head_len = 4; |
269 | skb_push(skb, head_len); | 252 | skb_push(skb, head_len); |
270 | skb->data[3] = LMI_PROTO; | 253 | skb->data[3] = NLPID_IPV6; |
271 | break; | 254 | break; |
272 | 255 | ||
273 | case __constant_ntohs(ETH_P_802_3): | 256 | case __constant_ntohs(ETH_P_802_3): |
@@ -461,13 +444,14 @@ static void fr_lmi_send(struct net_device *dev, int fullrep) | |||
461 | hdlc_device *hdlc = dev_to_hdlc(dev); | 444 | hdlc_device *hdlc = dev_to_hdlc(dev); |
462 | struct sk_buff *skb; | 445 | struct sk_buff *skb; |
463 | pvc_device *pvc = hdlc->state.fr.first_pvc; | 446 | pvc_device *pvc = hdlc->state.fr.first_pvc; |
464 | int len = (hdlc->state.fr.settings.lmi == LMI_ANSI) ? LMI_ANSI_LENGTH | 447 | int lmi = hdlc->state.fr.settings.lmi; |
465 | : LMI_LENGTH; | 448 | int dce = hdlc->state.fr.settings.dce; |
466 | int stat_len = 3; | 449 | int len = lmi == LMI_ANSI ? LMI_ANSI_LENGTH : LMI_CCITT_CISCO_LENGTH; |
450 | int stat_len = (lmi == LMI_CISCO) ? 6 : 3; | ||
467 | u8 *data; | 451 | u8 *data; |
468 | int i = 0; | 452 | int i = 0; |
469 | 453 | ||
470 | if (hdlc->state.fr.settings.dce && fullrep) { | 454 | if (dce && fullrep) { |
471 | len += hdlc->state.fr.dce_pvc_count * (2 + stat_len); | 455 | len += hdlc->state.fr.dce_pvc_count * (2 + stat_len); |
472 | if (len > HDLC_MAX_MRU) { | 456 | if (len > HDLC_MAX_MRU) { |
473 | printk(KERN_WARNING "%s: Too many PVCs while sending " | 457 | printk(KERN_WARNING "%s: Too many PVCs while sending " |
@@ -484,29 +468,31 @@ static void fr_lmi_send(struct net_device *dev, int fullrep) | |||
484 | } | 468 | } |
485 | memset(skb->data, 0, len); | 469 | memset(skb->data, 0, len); |
486 | skb_reserve(skb, 4); | 470 | skb_reserve(skb, 4); |
487 | skb->protocol = __constant_htons(LMI_PROTO); | 471 | if (lmi == LMI_CISCO) { |
488 | fr_hard_header(&skb, LMI_DLCI); | 472 | skb->protocol = __constant_htons(NLPID_CISCO_LMI); |
473 | fr_hard_header(&skb, LMI_CISCO_DLCI); | ||
474 | } else { | ||
475 | skb->protocol = __constant_htons(NLPID_CCITT_ANSI_LMI); | ||
476 | fr_hard_header(&skb, LMI_CCITT_ANSI_DLCI); | ||
477 | } | ||
489 | data = skb->tail; | 478 | data = skb->tail; |
490 | data[i++] = LMI_CALLREF; | 479 | data[i++] = LMI_CALLREF; |
491 | data[i++] = hdlc->state.fr.settings.dce | 480 | data[i++] = dce ? LMI_STATUS : LMI_STATUS_ENQUIRY; |
492 | ? LMI_STATUS : LMI_STATUS_ENQUIRY; | 481 | if (lmi == LMI_ANSI) |
493 | if (hdlc->state.fr.settings.lmi == LMI_ANSI) | ||
494 | data[i++] = LMI_ANSI_LOCKSHIFT; | 482 | data[i++] = LMI_ANSI_LOCKSHIFT; |
495 | data[i++] = (hdlc->state.fr.settings.lmi == LMI_CCITT) | 483 | data[i++] = lmi == LMI_CCITT ? LMI_CCITT_REPTYPE : |
496 | ? LMI_CCITT_REPTYPE : LMI_REPTYPE; | 484 | LMI_ANSI_CISCO_REPTYPE; |
497 | data[i++] = LMI_REPT_LEN; | 485 | data[i++] = LMI_REPT_LEN; |
498 | data[i++] = fullrep ? LMI_FULLREP : LMI_INTEGRITY; | 486 | data[i++] = fullrep ? LMI_FULLREP : LMI_INTEGRITY; |
499 | 487 | data[i++] = lmi == LMI_CCITT ? LMI_CCITT_ALIVE : LMI_ANSI_CISCO_ALIVE; | |
500 | data[i++] = (hdlc->state.fr.settings.lmi == LMI_CCITT) | ||
501 | ? LMI_CCITT_ALIVE : LMI_ALIVE; | ||
502 | data[i++] = LMI_INTEG_LEN; | 488 | data[i++] = LMI_INTEG_LEN; |
503 | data[i++] = hdlc->state.fr.txseq =fr_lmi_nextseq(hdlc->state.fr.txseq); | 489 | data[i++] = hdlc->state.fr.txseq =fr_lmi_nextseq(hdlc->state.fr.txseq); |
504 | data[i++] = hdlc->state.fr.rxseq; | 490 | data[i++] = hdlc->state.fr.rxseq; |
505 | 491 | ||
506 | if (hdlc->state.fr.settings.dce && fullrep) { | 492 | if (dce && fullrep) { |
507 | while (pvc) { | 493 | while (pvc) { |
508 | data[i++] = (hdlc->state.fr.settings.lmi == LMI_CCITT) | 494 | data[i++] = lmi == LMI_CCITT ? LMI_CCITT_PVCSTAT : |
509 | ? LMI_CCITT_PVCSTAT : LMI_PVCSTAT; | 495 | LMI_ANSI_CISCO_PVCSTAT; |
510 | data[i++] = stat_len; | 496 | data[i++] = stat_len; |
511 | 497 | ||
512 | /* LMI start/restart */ | 498 | /* LMI start/restart */ |
@@ -523,8 +509,20 @@ static void fr_lmi_send(struct net_device *dev, int fullrep) | |||
523 | fr_log_dlci_active(pvc); | 509 | fr_log_dlci_active(pvc); |
524 | } | 510 | } |
525 | 511 | ||
526 | dlci_to_status(pvc->dlci, data + i, | 512 | if (lmi == LMI_CISCO) { |
527 | pvc->state.active, pvc->state.new); | 513 | data[i] = pvc->dlci >> 8; |
514 | data[i + 1] = pvc->dlci & 0xFF; | ||
515 | } else { | ||
516 | data[i] = (pvc->dlci >> 4) & 0x3F; | ||
517 | data[i + 1] = ((pvc->dlci << 3) & 0x78) | 0x80; | ||
518 | data[i + 2] = 0x80; | ||
519 | } | ||
520 | |||
521 | if (pvc->state.new) | ||
522 | data[i + 2] |= 0x08; | ||
523 | else if (pvc->state.active) | ||
524 | data[i + 2] |= 0x02; | ||
525 | |||
528 | i += stat_len; | 526 | i += stat_len; |
529 | pvc = pvc->next; | 527 | pvc = pvc->next; |
530 | } | 528 | } |
@@ -569,6 +567,8 @@ static void fr_set_link_state(int reliable, struct net_device *dev) | |||
569 | pvc_carrier(0, pvc); | 567 | pvc_carrier(0, pvc); |
570 | pvc->state.exist = pvc->state.active = 0; | 568 | pvc->state.exist = pvc->state.active = 0; |
571 | pvc->state.new = 0; | 569 | pvc->state.new = 0; |
570 | if (!hdlc->state.fr.settings.dce) | ||
571 | pvc->state.bandwidth = 0; | ||
572 | pvc = pvc->next; | 572 | pvc = pvc->next; |
573 | } | 573 | } |
574 | } | 574 | } |
@@ -583,11 +583,12 @@ static void fr_timer(unsigned long arg) | |||
583 | int i, cnt = 0, reliable; | 583 | int i, cnt = 0, reliable; |
584 | u32 list; | 584 | u32 list; |
585 | 585 | ||
586 | if (hdlc->state.fr.settings.dce) | 586 | if (hdlc->state.fr.settings.dce) { |
587 | reliable = hdlc->state.fr.request && | 587 | reliable = hdlc->state.fr.request && |
588 | time_before(jiffies, hdlc->state.fr.last_poll + | 588 | time_before(jiffies, hdlc->state.fr.last_poll + |
589 | hdlc->state.fr.settings.t392 * HZ); | 589 | hdlc->state.fr.settings.t392 * HZ); |
590 | else { | 590 | hdlc->state.fr.request = 0; |
591 | } else { | ||
591 | hdlc->state.fr.last_errors <<= 1; /* Shift the list */ | 592 | hdlc->state.fr.last_errors <<= 1; /* Shift the list */ |
592 | if (hdlc->state.fr.request) { | 593 | if (hdlc->state.fr.request) { |
593 | if (hdlc->state.fr.reliable) | 594 | if (hdlc->state.fr.reliable) |
@@ -634,65 +635,88 @@ static void fr_timer(unsigned long arg) | |||
634 | static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | 635 | static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) |
635 | { | 636 | { |
636 | hdlc_device *hdlc = dev_to_hdlc(dev); | 637 | hdlc_device *hdlc = dev_to_hdlc(dev); |
637 | int stat_len; | ||
638 | pvc_device *pvc; | 638 | pvc_device *pvc; |
639 | int reptype = -1, error, no_ram; | ||
640 | u8 rxseq, txseq; | 639 | u8 rxseq, txseq; |
641 | int i; | 640 | int lmi = hdlc->state.fr.settings.lmi; |
641 | int dce = hdlc->state.fr.settings.dce; | ||
642 | int stat_len = (lmi == LMI_CISCO) ? 6 : 3, reptype, error, no_ram, i; | ||
642 | 643 | ||
643 | if (skb->len < ((hdlc->state.fr.settings.lmi == LMI_ANSI) | 644 | if (skb->len < (lmi == LMI_ANSI ? LMI_ANSI_LENGTH : |
644 | ? LMI_ANSI_LENGTH : LMI_LENGTH)) { | 645 | LMI_CCITT_CISCO_LENGTH)) { |
645 | printk(KERN_INFO "%s: Short LMI frame\n", dev->name); | 646 | printk(KERN_INFO "%s: Short LMI frame\n", dev->name); |
646 | return 1; | 647 | return 1; |
647 | } | 648 | } |
648 | 649 | ||
649 | if (skb->data[5] != (!hdlc->state.fr.settings.dce ? | 650 | if (skb->data[3] != (lmi == LMI_CISCO ? NLPID_CISCO_LMI : |
650 | LMI_STATUS : LMI_STATUS_ENQUIRY)) { | 651 | NLPID_CCITT_ANSI_LMI)) { |
651 | printk(KERN_INFO "%s: LMI msgtype=%x, Not LMI status %s\n", | 652 | printk(KERN_INFO "%s: Received non-LMI frame with LMI" |
652 | dev->name, skb->data[2], | 653 | " DLCI\n", dev->name); |
653 | hdlc->state.fr.settings.dce ? "enquiry" : "reply"); | 654 | return 1; |
655 | } | ||
656 | |||
657 | if (skb->data[4] != LMI_CALLREF) { | ||
658 | printk(KERN_INFO "%s: Invalid LMI Call reference (0x%02X)\n", | ||
659 | dev->name, skb->data[4]); | ||
660 | return 1; | ||
661 | } | ||
662 | |||
663 | if (skb->data[5] != (dce ? LMI_STATUS_ENQUIRY : LMI_STATUS)) { | ||
664 | printk(KERN_INFO "%s: Invalid LMI Message type (0x%02X)\n", | ||
665 | dev->name, skb->data[5]); | ||
654 | return 1; | 666 | return 1; |
655 | } | 667 | } |
656 | 668 | ||
657 | i = (hdlc->state.fr.settings.lmi == LMI_ANSI) ? 7 : 6; | 669 | if (lmi == LMI_ANSI) { |
670 | if (skb->data[6] != LMI_ANSI_LOCKSHIFT) { | ||
671 | printk(KERN_INFO "%s: Not ANSI locking shift in LMI" | ||
672 | " message (0x%02X)\n", dev->name, skb->data[6]); | ||
673 | return 1; | ||
674 | } | ||
675 | i = 7; | ||
676 | } else | ||
677 | i = 6; | ||
658 | 678 | ||
659 | if (skb->data[i] != | 679 | if (skb->data[i] != (lmi == LMI_CCITT ? LMI_CCITT_REPTYPE : |
660 | ((hdlc->state.fr.settings.lmi == LMI_CCITT) | 680 | LMI_ANSI_CISCO_REPTYPE)) { |
661 | ? LMI_CCITT_REPTYPE : LMI_REPTYPE)) { | 681 | printk(KERN_INFO "%s: Not an LMI Report type IE (0x%02X)\n", |
662 | printk(KERN_INFO "%s: Not a report type=%x\n", | ||
663 | dev->name, skb->data[i]); | 682 | dev->name, skb->data[i]); |
664 | return 1; | 683 | return 1; |
665 | } | 684 | } |
666 | i++; | ||
667 | 685 | ||
668 | i++; /* Skip length field */ | 686 | if (skb->data[++i] != LMI_REPT_LEN) { |
687 | printk(KERN_INFO "%s: Invalid LMI Report type IE length" | ||
688 | " (%u)\n", dev->name, skb->data[i]); | ||
689 | return 1; | ||
690 | } | ||
669 | 691 | ||
670 | reptype = skb->data[i++]; | 692 | reptype = skb->data[++i]; |
693 | if (reptype != LMI_INTEGRITY && reptype != LMI_FULLREP) { | ||
694 | printk(KERN_INFO "%s: Unsupported LMI Report type (0x%02X)\n", | ||
695 | dev->name, reptype); | ||
696 | return 1; | ||
697 | } | ||
671 | 698 | ||
672 | if (skb->data[i]!= | 699 | if (skb->data[++i] != (lmi == LMI_CCITT ? LMI_CCITT_ALIVE : |
673 | ((hdlc->state.fr.settings.lmi == LMI_CCITT) | 700 | LMI_ANSI_CISCO_ALIVE)) { |
674 | ? LMI_CCITT_ALIVE : LMI_ALIVE)) { | 701 | printk(KERN_INFO "%s: Not an LMI Link integrity verification" |
675 | printk(KERN_INFO "%s: Unsupported status element=%x\n", | 702 | " IE (0x%02X)\n", dev->name, skb->data[i]); |
676 | dev->name, skb->data[i]); | ||
677 | return 1; | 703 | return 1; |
678 | } | 704 | } |
679 | i++; | ||
680 | 705 | ||
681 | i++; /* Skip length field */ | 706 | if (skb->data[++i] != LMI_INTEG_LEN) { |
707 | printk(KERN_INFO "%s: Invalid LMI Link integrity verification" | ||
708 | " IE length (%u)\n", dev->name, skb->data[i]); | ||
709 | return 1; | ||
710 | } | ||
711 | i++; | ||
682 | 712 | ||
683 | hdlc->state.fr.rxseq = skb->data[i++]; /* TX sequence from peer */ | 713 | hdlc->state.fr.rxseq = skb->data[i++]; /* TX sequence from peer */ |
684 | rxseq = skb->data[i++]; /* Should confirm our sequence */ | 714 | rxseq = skb->data[i++]; /* Should confirm our sequence */ |
685 | 715 | ||
686 | txseq = hdlc->state.fr.txseq; | 716 | txseq = hdlc->state.fr.txseq; |
687 | 717 | ||
688 | if (hdlc->state.fr.settings.dce) { | 718 | if (dce) |
689 | if (reptype != LMI_FULLREP && reptype != LMI_INTEGRITY) { | ||
690 | printk(KERN_INFO "%s: Unsupported report type=%x\n", | ||
691 | dev->name, reptype); | ||
692 | return 1; | ||
693 | } | ||
694 | hdlc->state.fr.last_poll = jiffies; | 719 | hdlc->state.fr.last_poll = jiffies; |
695 | } | ||
696 | 720 | ||
697 | error = 0; | 721 | error = 0; |
698 | if (!hdlc->state.fr.reliable) | 722 | if (!hdlc->state.fr.reliable) |
@@ -703,7 +727,7 @@ static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | |||
703 | error = 1; | 727 | error = 1; |
704 | } | 728 | } |
705 | 729 | ||
706 | if (hdlc->state.fr.settings.dce) { | 730 | if (dce) { |
707 | if (hdlc->state.fr.fullrep_sent && !error) { | 731 | if (hdlc->state.fr.fullrep_sent && !error) { |
708 | /* Stop sending full report - the last one has been confirmed by DTE */ | 732 | /* Stop sending full report - the last one has been confirmed by DTE */ |
709 | hdlc->state.fr.fullrep_sent = 0; | 733 | hdlc->state.fr.fullrep_sent = 0; |
@@ -725,6 +749,7 @@ static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | |||
725 | hdlc->state.fr.dce_changed = 0; | 749 | hdlc->state.fr.dce_changed = 0; |
726 | } | 750 | } |
727 | 751 | ||
752 | hdlc->state.fr.request = 1; /* got request */ | ||
728 | fr_lmi_send(dev, reptype == LMI_FULLREP ? 1 : 0); | 753 | fr_lmi_send(dev, reptype == LMI_FULLREP ? 1 : 0); |
729 | return 0; | 754 | return 0; |
730 | } | 755 | } |
@@ -739,7 +764,6 @@ static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | |||
739 | if (reptype != LMI_FULLREP) | 764 | if (reptype != LMI_FULLREP) |
740 | return 0; | 765 | return 0; |
741 | 766 | ||
742 | stat_len = 3; | ||
743 | pvc = hdlc->state.fr.first_pvc; | 767 | pvc = hdlc->state.fr.first_pvc; |
744 | 768 | ||
745 | while (pvc) { | 769 | while (pvc) { |
@@ -750,24 +774,35 @@ static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | |||
750 | no_ram = 0; | 774 | no_ram = 0; |
751 | while (skb->len >= i + 2 + stat_len) { | 775 | while (skb->len >= i + 2 + stat_len) { |
752 | u16 dlci; | 776 | u16 dlci; |
777 | u32 bw; | ||
753 | unsigned int active, new; | 778 | unsigned int active, new; |
754 | 779 | ||
755 | if (skb->data[i] != ((hdlc->state.fr.settings.lmi == LMI_CCITT) | 780 | if (skb->data[i] != (lmi == LMI_CCITT ? LMI_CCITT_PVCSTAT : |
756 | ? LMI_CCITT_PVCSTAT : LMI_PVCSTAT)) { | 781 | LMI_ANSI_CISCO_PVCSTAT)) { |
757 | printk(KERN_WARNING "%s: Invalid PVCSTAT ID: %x\n", | 782 | printk(KERN_INFO "%s: Not an LMI PVC status IE" |
758 | dev->name, skb->data[i]); | 783 | " (0x%02X)\n", dev->name, skb->data[i]); |
759 | return 1; | 784 | return 1; |
760 | } | 785 | } |
761 | i++; | ||
762 | 786 | ||
763 | if (skb->data[i] != stat_len) { | 787 | if (skb->data[++i] != stat_len) { |
764 | printk(KERN_WARNING "%s: Invalid PVCSTAT length: %x\n", | 788 | printk(KERN_INFO "%s: Invalid LMI PVC status IE length" |
765 | dev->name, skb->data[i]); | 789 | " (%u)\n", dev->name, skb->data[i]); |
766 | return 1; | 790 | return 1; |
767 | } | 791 | } |
768 | i++; | 792 | i++; |
769 | 793 | ||
770 | dlci = status_to_dlci(skb->data + i, &active, &new); | 794 | new = !! (skb->data[i + 2] & 0x08); |
795 | active = !! (skb->data[i + 2] & 0x02); | ||
796 | if (lmi == LMI_CISCO) { | ||
797 | dlci = (skb->data[i] << 8) | skb->data[i + 1]; | ||
798 | bw = (skb->data[i + 3] << 16) | | ||
799 | (skb->data[i + 4] << 8) | | ||
800 | (skb->data[i + 5]); | ||
801 | } else { | ||
802 | dlci = ((skb->data[i] & 0x3F) << 4) | | ||
803 | ((skb->data[i + 1] & 0x78) >> 3); | ||
804 | bw = 0; | ||
805 | } | ||
771 | 806 | ||
772 | pvc = add_pvc(dev, dlci); | 807 | pvc = add_pvc(dev, dlci); |
773 | 808 | ||
@@ -783,9 +818,11 @@ static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | |||
783 | pvc->state.deleted = 0; | 818 | pvc->state.deleted = 0; |
784 | if (active != pvc->state.active || | 819 | if (active != pvc->state.active || |
785 | new != pvc->state.new || | 820 | new != pvc->state.new || |
821 | bw != pvc->state.bandwidth || | ||
786 | !pvc->state.exist) { | 822 | !pvc->state.exist) { |
787 | pvc->state.new = new; | 823 | pvc->state.new = new; |
788 | pvc->state.active = active; | 824 | pvc->state.active = active; |
825 | pvc->state.bandwidth = bw; | ||
789 | pvc_carrier(active, pvc); | 826 | pvc_carrier(active, pvc); |
790 | fr_log_dlci_active(pvc); | 827 | fr_log_dlci_active(pvc); |
791 | } | 828 | } |
@@ -801,6 +838,7 @@ static int fr_lmi_recv(struct net_device *dev, struct sk_buff *skb) | |||
801 | pvc_carrier(0, pvc); | 838 | pvc_carrier(0, pvc); |
802 | pvc->state.active = pvc->state.new = 0; | 839 | pvc->state.active = pvc->state.new = 0; |
803 | pvc->state.exist = 0; | 840 | pvc->state.exist = 0; |
841 | pvc->state.bandwidth = 0; | ||
804 | fr_log_dlci_active(pvc); | 842 | fr_log_dlci_active(pvc); |
805 | } | 843 | } |
806 | pvc = pvc->next; | 844 | pvc = pvc->next; |
@@ -829,22 +867,15 @@ static int fr_rx(struct sk_buff *skb) | |||
829 | 867 | ||
830 | dlci = q922_to_dlci(skb->data); | 868 | dlci = q922_to_dlci(skb->data); |
831 | 869 | ||
832 | if (dlci == LMI_DLCI) { | 870 | if ((dlci == LMI_CCITT_ANSI_DLCI && |
833 | if (hdlc->state.fr.settings.lmi == LMI_NONE) | 871 | (hdlc->state.fr.settings.lmi == LMI_ANSI || |
834 | goto rx_error; /* LMI packet with no LMI? */ | 872 | hdlc->state.fr.settings.lmi == LMI_CCITT)) || |
835 | 873 | (dlci == LMI_CISCO_DLCI && | |
836 | if (data[3] == LMI_PROTO) { | 874 | hdlc->state.fr.settings.lmi == LMI_CISCO)) { |
837 | if (fr_lmi_recv(ndev, skb)) | 875 | if (fr_lmi_recv(ndev, skb)) |
838 | goto rx_error; | 876 | goto rx_error; |
839 | else { | 877 | dev_kfree_skb_any(skb); |
840 | dev_kfree_skb_any(skb); | 878 | return NET_RX_SUCCESS; |
841 | return NET_RX_SUCCESS; | ||
842 | } | ||
843 | } | ||
844 | |||
845 | printk(KERN_INFO "%s: Received non-LMI frame with LMI DLCI\n", | ||
846 | ndev->name); | ||
847 | goto rx_error; | ||
848 | } | 879 | } |
849 | 880 | ||
850 | pvc = find_pvc(hdlc, dlci); | 881 | pvc = find_pvc(hdlc, dlci); |
@@ -1170,7 +1201,8 @@ int hdlc_fr_ioctl(struct net_device *dev, struct ifreq *ifr) | |||
1170 | 1201 | ||
1171 | if ((new_settings.lmi != LMI_NONE && | 1202 | if ((new_settings.lmi != LMI_NONE && |
1172 | new_settings.lmi != LMI_ANSI && | 1203 | new_settings.lmi != LMI_ANSI && |
1173 | new_settings.lmi != LMI_CCITT) || | 1204 | new_settings.lmi != LMI_CCITT && |
1205 | new_settings.lmi != LMI_CISCO) || | ||
1174 | new_settings.t391 < 1 || | 1206 | new_settings.t391 < 1 || |
1175 | new_settings.t392 < 2 || | 1207 | new_settings.t392 < 2 || |
1176 | new_settings.n391 < 1 || | 1208 | new_settings.n391 < 1 || |
diff --git a/drivers/net/wan/hdlc_generic.c b/drivers/net/wan/hdlc_generic.c index 6ed064cb4469..a63f6a2cc4f7 100644 --- a/drivers/net/wan/hdlc_generic.c +++ b/drivers/net/wan/hdlc_generic.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Generic HDLC support routines for Linux | 2 | * Generic HDLC support routines for Linux |
3 | * | 3 | * |
4 | * Copyright (C) 1999 - 2003 Krzysztof Halasa <khc@pm.waw.pl> | 4 | * Copyright (C) 1999 - 2005 Krzysztof Halasa <khc@pm.waw.pl> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 6 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of version 2 of the GNU General Public License | 7 | * under the terms of version 2 of the GNU General Public License |
@@ -38,7 +38,7 @@ | |||
38 | #include <linux/hdlc.h> | 38 | #include <linux/hdlc.h> |
39 | 39 | ||
40 | 40 | ||
41 | static const char* version = "HDLC support module revision 1.17"; | 41 | static const char* version = "HDLC support module revision 1.18"; |
42 | 42 | ||
43 | #undef DEBUG_LINK | 43 | #undef DEBUG_LINK |
44 | 44 | ||
@@ -126,10 +126,13 @@ void hdlc_set_carrier(int on, struct net_device *dev) | |||
126 | if (!hdlc->open) | 126 | if (!hdlc->open) |
127 | goto carrier_exit; | 127 | goto carrier_exit; |
128 | 128 | ||
129 | if (hdlc->carrier) | 129 | if (hdlc->carrier) { |
130 | printk(KERN_INFO "%s: Carrier detected\n", dev->name); | ||
130 | __hdlc_set_carrier_on(dev); | 131 | __hdlc_set_carrier_on(dev); |
131 | else | 132 | } else { |
133 | printk(KERN_INFO "%s: Carrier lost\n", dev->name); | ||
132 | __hdlc_set_carrier_off(dev); | 134 | __hdlc_set_carrier_off(dev); |
135 | } | ||
133 | 136 | ||
134 | carrier_exit: | 137 | carrier_exit: |
135 | spin_unlock_irqrestore(&hdlc->state_lock, flags); | 138 | spin_unlock_irqrestore(&hdlc->state_lock, flags); |
@@ -157,8 +160,11 @@ int hdlc_open(struct net_device *dev) | |||
157 | 160 | ||
158 | spin_lock_irq(&hdlc->state_lock); | 161 | spin_lock_irq(&hdlc->state_lock); |
159 | 162 | ||
160 | if (hdlc->carrier) | 163 | if (hdlc->carrier) { |
164 | printk(KERN_INFO "%s: Carrier detected\n", dev->name); | ||
161 | __hdlc_set_carrier_on(dev); | 165 | __hdlc_set_carrier_on(dev); |
166 | } else | ||
167 | printk(KERN_INFO "%s: No carrier\n", dev->name); | ||
162 | 168 | ||
163 | hdlc->open = 1; | 169 | hdlc->open = 1; |
164 | 170 | ||
diff --git a/drivers/net/wan/hdlc_ppp.c b/drivers/net/wan/hdlc_ppp.c index 7cd6195a2e46..b81263eaede0 100644 --- a/drivers/net/wan/hdlc_ppp.c +++ b/drivers/net/wan/hdlc_ppp.c | |||
@@ -66,8 +66,7 @@ static void ppp_close(struct net_device *dev) | |||
66 | 66 | ||
67 | 67 | ||
68 | 68 | ||
69 | static unsigned short ppp_type_trans(struct sk_buff *skb, | 69 | static __be16 ppp_type_trans(struct sk_buff *skb, struct net_device *dev) |
70 | struct net_device *dev) | ||
71 | { | 70 | { |
72 | return __constant_htons(ETH_P_WAN_PPP); | 71 | return __constant_htons(ETH_P_WAN_PPP); |
73 | } | 72 | } |
diff --git a/drivers/net/wan/hdlc_raw.c b/drivers/net/wan/hdlc_raw.c index c41fb70b6929..9456d31cb1c1 100644 --- a/drivers/net/wan/hdlc_raw.c +++ b/drivers/net/wan/hdlc_raw.c | |||
@@ -24,8 +24,7 @@ | |||
24 | #include <linux/hdlc.h> | 24 | #include <linux/hdlc.h> |
25 | 25 | ||
26 | 26 | ||
27 | static unsigned short raw_type_trans(struct sk_buff *skb, | 27 | static __be16 raw_type_trans(struct sk_buff *skb, struct net_device *dev) |
28 | struct net_device *dev) | ||
29 | { | 28 | { |
30 | return __constant_htons(ETH_P_IP); | 29 | return __constant_htons(ETH_P_IP); |
31 | } | 30 | } |
diff --git a/drivers/net/wan/lmc/lmc_main.c b/drivers/net/wan/lmc/lmc_main.c index 15e545f66cd7..2b948ea397d5 100644 --- a/drivers/net/wan/lmc/lmc_main.c +++ b/drivers/net/wan/lmc/lmc_main.c | |||
@@ -723,7 +723,7 @@ static void lmc_watchdog (unsigned long data) /*fold00*/ | |||
723 | /* lmc_reset (sc); Why reset??? The link can go down ok */ | 723 | /* lmc_reset (sc); Why reset??? The link can go down ok */ |
724 | 724 | ||
725 | /* Inform the world that link has been lost */ | 725 | /* Inform the world that link has been lost */ |
726 | dev->flags &= ~IFF_RUNNING; | 726 | netif_carrier_off(dev); |
727 | } | 727 | } |
728 | 728 | ||
729 | /* | 729 | /* |
@@ -736,7 +736,7 @@ static void lmc_watchdog (unsigned long data) /*fold00*/ | |||
736 | /* lmc_reset (sc); Again why reset??? */ | 736 | /* lmc_reset (sc); Again why reset??? */ |
737 | 737 | ||
738 | /* Inform the world that link protocol is back up. */ | 738 | /* Inform the world that link protocol is back up. */ |
739 | dev->flags |= IFF_RUNNING; | 739 | netif_carrier_on(dev); |
740 | 740 | ||
741 | /* Now we have to tell the syncppp that we had an outage | 741 | /* Now we have to tell the syncppp that we had an outage |
742 | * and that it should deal. Calling sppp_reopen here | 742 | * and that it should deal. Calling sppp_reopen here |
@@ -1168,8 +1168,6 @@ static void lmc_running_reset (struct net_device *dev) /*fold00*/ | |||
1168 | sc->lmc_media->set_link_status (sc, 1); | 1168 | sc->lmc_media->set_link_status (sc, 1); |
1169 | sc->lmc_media->set_status (sc, NULL); | 1169 | sc->lmc_media->set_status (sc, NULL); |
1170 | 1170 | ||
1171 | //dev->flags |= IFF_RUNNING; | ||
1172 | |||
1173 | netif_wake_queue(dev); | 1171 | netif_wake_queue(dev); |
1174 | 1172 | ||
1175 | sc->lmc_txfull = 0; | 1173 | sc->lmc_txfull = 0; |
@@ -1233,8 +1231,6 @@ static int lmc_ifdown (struct net_device *dev) /*fold00*/ | |||
1233 | csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */ | 1231 | csr6 &= ~LMC_DEC_SR; /* Turn off the Receive bit */ |
1234 | LMC_CSR_WRITE (sc, csr_command, csr6); | 1232 | LMC_CSR_WRITE (sc, csr_command, csr6); |
1235 | 1233 | ||
1236 | dev->flags &= ~IFF_RUNNING; | ||
1237 | |||
1238 | sc->stats.rx_missed_errors += | 1234 | sc->stats.rx_missed_errors += |
1239 | LMC_CSR_READ (sc, csr_missed_frames) & 0xffff; | 1235 | LMC_CSR_READ (sc, csr_missed_frames) & 0xffff; |
1240 | 1236 | ||
diff --git a/drivers/net/wan/sdla_fr.c b/drivers/net/wan/sdla_fr.c index 2efccb0554c0..c5f5e62aab8b 100644 --- a/drivers/net/wan/sdla_fr.c +++ b/drivers/net/wan/sdla_fr.c | |||
@@ -152,6 +152,7 @@ | |||
152 | #include <asm/io.h> /* for inb(), outb(), etc. */ | 152 | #include <asm/io.h> /* for inb(), outb(), etc. */ |
153 | #include <linux/time.h> /* for do_gettimeofday */ | 153 | #include <linux/time.h> /* for do_gettimeofday */ |
154 | #include <linux/in.h> /* sockaddr_in */ | 154 | #include <linux/in.h> /* sockaddr_in */ |
155 | #include <linux/jiffies.h> /* time_after() macro */ | ||
155 | #include <asm/errno.h> | 156 | #include <asm/errno.h> |
156 | 157 | ||
157 | #include <linux/ip.h> | 158 | #include <linux/ip.h> |
@@ -773,7 +774,7 @@ static int update(struct wan_device* wandev) | |||
773 | for(;;) { | 774 | for(;;) { |
774 | if(card->u.f.update_comms_stats == 0) | 775 | if(card->u.f.update_comms_stats == 0) |
775 | break; | 776 | break; |
776 | if ((jiffies - timeout) > (1 * HZ)){ | 777 | if (time_after(jiffies, timeout + 1 * HZ)){ |
777 | card->u.f.update_comms_stats = 0; | 778 | card->u.f.update_comms_stats = 0; |
778 | return -EAGAIN; | 779 | return -EAGAIN; |
779 | } | 780 | } |
@@ -4799,7 +4800,7 @@ static void trigger_unconfig_fr(struct net_device *dev) | |||
4799 | { | 4800 | { |
4800 | fr_channel_t *chan = dev->priv; | 4801 | fr_channel_t *chan = dev->priv; |
4801 | volatile sdla_t *card = chan->card; | 4802 | volatile sdla_t *card = chan->card; |
4802 | u32 timeout; | 4803 | unsigned long timeout; |
4803 | fr508_flags_t* flags = card->flags; | 4804 | fr508_flags_t* flags = card->flags; |
4804 | int reset_critical=0; | 4805 | int reset_critical=0; |
4805 | 4806 | ||
@@ -4821,7 +4822,7 @@ static void trigger_unconfig_fr(struct net_device *dev) | |||
4821 | if(!(card->u.f.timer_int_enabled & TMR_INT_ENABLED_UNCONFIG)) | 4822 | if(!(card->u.f.timer_int_enabled & TMR_INT_ENABLED_UNCONFIG)) |
4822 | break; | 4823 | break; |
4823 | 4824 | ||
4824 | if ((jiffies - timeout) > (1 * HZ)){ | 4825 | if (time_after(jiffies, timeout + 1 * HZ)){ |
4825 | card->u.f.timer_int_enabled &= ~TMR_INT_ENABLED_UNCONFIG; | 4826 | card->u.f.timer_int_enabled &= ~TMR_INT_ENABLED_UNCONFIG; |
4826 | printk(KERN_INFO "%s: Failed to delete DLCI %i\n", | 4827 | printk(KERN_INFO "%s: Failed to delete DLCI %i\n", |
4827 | card->devname,chan->dlci); | 4828 | card->devname,chan->dlci); |
diff --git a/drivers/net/wan/sdla_ft1.c b/drivers/net/wan/sdla_ft1.c index 5e3124856eb0..9d6528a50f7b 100644 --- a/drivers/net/wan/sdla_ft1.c +++ b/drivers/net/wan/sdla_ft1.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/wanrouter.h> /* WAN router definitions */ | 29 | #include <linux/wanrouter.h> /* WAN router definitions */ |
30 | #include <linux/wanpipe.h> /* WANPIPE common user API definitions */ | 30 | #include <linux/wanpipe.h> /* WANPIPE common user API definitions */ |
31 | #include <linux/if_arp.h> /* ARPHRD_* defines */ | 31 | #include <linux/if_arp.h> /* ARPHRD_* defines */ |
32 | #include <linux/jiffies.h> /* time_after() macro */ | ||
32 | 33 | ||
33 | #include <linux/inetdevice.h> | 34 | #include <linux/inetdevice.h> |
34 | #include <asm/uaccess.h> | 35 | #include <asm/uaccess.h> |
@@ -164,7 +165,7 @@ int wpft1_init (sdla_t* card, wandev_conf_t* conf) | |||
164 | 165 | ||
165 | timeout = jiffies; | 166 | timeout = jiffies; |
166 | while (mb->return_code != 'I') /* Wait 1s for board to initialize */ | 167 | while (mb->return_code != 'I') /* Wait 1s for board to initialize */ |
167 | if ((jiffies - timeout) > 1*HZ) break; | 168 | if (time_after(jiffies, timeout + 1*HZ)) break; |
168 | 169 | ||
169 | if (mb->return_code != 'I') { | 170 | if (mb->return_code != 'I') { |
170 | printk(KERN_INFO | 171 | printk(KERN_INFO |
diff --git a/drivers/net/wan/sdla_ppp.c b/drivers/net/wan/sdla_ppp.c index 1761cb68ab48..a4b489cccbbf 100644 --- a/drivers/net/wan/sdla_ppp.c +++ b/drivers/net/wan/sdla_ppp.c | |||
@@ -101,6 +101,7 @@ | |||
101 | #include <linux/if_arp.h> /* ARPHRD_* defines */ | 101 | #include <linux/if_arp.h> /* ARPHRD_* defines */ |
102 | #include <asm/byteorder.h> /* htons(), etc. */ | 102 | #include <asm/byteorder.h> /* htons(), etc. */ |
103 | #include <linux/in.h> /* sockaddr_in */ | 103 | #include <linux/in.h> /* sockaddr_in */ |
104 | #include <linux/jiffies.h> /* time_after() macro */ | ||
104 | 105 | ||
105 | 106 | ||
106 | #include <asm/uaccess.h> | 107 | #include <asm/uaccess.h> |
@@ -482,7 +483,7 @@ static int update(struct wan_device *wandev) | |||
482 | if(ppp_priv_area->update_comms_stats == 0){ | 483 | if(ppp_priv_area->update_comms_stats == 0){ |
483 | break; | 484 | break; |
484 | } | 485 | } |
485 | if ((jiffies - timeout) > (1 * HZ)){ | 486 | if (time_after(jiffies, timeout + 1 * HZ)){ |
486 | ppp_priv_area->update_comms_stats = 0; | 487 | ppp_priv_area->update_comms_stats = 0; |
487 | ppp_priv_area->timer_int_enabled &= | 488 | ppp_priv_area->timer_int_enabled &= |
488 | ~TMR_INT_ENABLED_UPDATE; | 489 | ~TMR_INT_ENABLED_UPDATE; |
diff --git a/drivers/net/wan/sdla_x25.c b/drivers/net/wan/sdla_x25.c index 3a93d2fd4fbf..8a95d61a2f8f 100644 --- a/drivers/net/wan/sdla_x25.c +++ b/drivers/net/wan/sdla_x25.c | |||
@@ -91,6 +91,7 @@ | |||
91 | #include <linux/wanrouter.h> /* WAN router definitions */ | 91 | #include <linux/wanrouter.h> /* WAN router definitions */ |
92 | #include <linux/wanpipe.h> /* WANPIPE common user API definitions */ | 92 | #include <linux/wanpipe.h> /* WANPIPE common user API definitions */ |
93 | #include <linux/workqueue.h> | 93 | #include <linux/workqueue.h> |
94 | #include <linux/jiffies.h> /* time_after() macro */ | ||
94 | #include <asm/byteorder.h> /* htons(), etc. */ | 95 | #include <asm/byteorder.h> /* htons(), etc. */ |
95 | #include <asm/atomic.h> | 96 | #include <asm/atomic.h> |
96 | #include <linux/delay.h> /* Experimental delay */ | 97 | #include <linux/delay.h> /* Experimental delay */ |
@@ -867,7 +868,7 @@ static int update(struct wan_device* wandev) | |||
867 | if (!(card->u.x.timer_int_enabled & TMR_INT_ENABLED_UPDATE)){ | 868 | if (!(card->u.x.timer_int_enabled & TMR_INT_ENABLED_UPDATE)){ |
868 | break; | 869 | break; |
869 | } | 870 | } |
870 | if ((jiffies-timeout) > 1*HZ){ | 871 | if (time_after(jiffies, timeout + 1*HZ)){ |
871 | card->u.x.timer_int_enabled &= ~TMR_INT_ENABLED_UPDATE; | 872 | card->u.x.timer_int_enabled &= ~TMR_INT_ENABLED_UPDATE; |
872 | return -EAGAIN; | 873 | return -EAGAIN; |
873 | } | 874 | } |
diff --git a/drivers/net/wan/wanpipe_multppp.c b/drivers/net/wan/wanpipe_multppp.c index 6aa6987d96cb..812a1183c502 100644 --- a/drivers/net/wan/wanpipe_multppp.c +++ b/drivers/net/wan/wanpipe_multppp.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/wanrouter.h> /* WAN router definitions */ | 26 | #include <linux/wanrouter.h> /* WAN router definitions */ |
27 | #include <linux/wanpipe.h> /* WANPIPE common user API definitions */ | 27 | #include <linux/wanpipe.h> /* WANPIPE common user API definitions */ |
28 | #include <linux/if_arp.h> /* ARPHRD_* defines */ | 28 | #include <linux/if_arp.h> /* ARPHRD_* defines */ |
29 | #include <linux/jiffies.h> /* time_after() macro */ | ||
29 | 30 | ||
30 | #include <linux/in.h> /* sockaddr_in */ | 31 | #include <linux/in.h> /* sockaddr_in */ |
31 | #include <linux/inet.h> | 32 | #include <linux/inet.h> |
@@ -270,9 +271,9 @@ int wsppp_init (sdla_t* card, wandev_conf_t* conf) | |||
270 | ready to accept commands. We expect this to be completed in less | 271 | ready to accept commands. We expect this to be completed in less |
271 | than 1 second. */ | 272 | than 1 second. */ |
272 | 273 | ||
273 | timeout = jiffies; | 274 | timeout = jiffies + 1 * HZ; |
274 | while (mb->return_code != 'I') /* Wait 1s for board to initialize */ | 275 | while (mb->return_code != 'I') /* Wait 1s for board to initialize */ |
275 | if ((jiffies - timeout) > 1*HZ) break; | 276 | if (time_after(jiffies, timeout)) break; |
276 | 277 | ||
277 | if (mb->return_code != 'I') { | 278 | if (mb->return_code != 'I') { |
278 | printk(KERN_INFO | 279 | printk(KERN_INFO |
@@ -493,11 +494,11 @@ static int update(struct wan_device* wandev) | |||
493 | chdlc_priv_area->timer_int_enabled = TMR_INT_ENABLED_UPDATE; | 494 | chdlc_priv_area->timer_int_enabled = TMR_INT_ENABLED_UPDATE; |
494 | 495 | ||
495 | /* wait a maximum of 1 second for the statistics to be updated */ | 496 | /* wait a maximum of 1 second for the statistics to be updated */ |
496 | timeout = jiffies; | 497 | timeout = jiffies + 1 * HZ; |
497 | for(;;) { | 498 | for(;;) { |
498 | if(chdlc_priv_area->update_comms_stats == 0) | 499 | if(chdlc_priv_area->update_comms_stats == 0) |
499 | break; | 500 | break; |
500 | if ((jiffies - timeout) > (1 * HZ)){ | 501 | if (time_after(jiffies, timeout)){ |
501 | chdlc_priv_area->update_comms_stats = 0; | 502 | chdlc_priv_area->update_comms_stats = 0; |
502 | chdlc_priv_area->timer_int_enabled &= | 503 | chdlc_priv_area->timer_int_enabled &= |
503 | ~TMR_INT_ENABLED_UPDATE; | 504 | ~TMR_INT_ENABLED_UPDATE; |
diff --git a/drivers/net/wan/wanxl.c b/drivers/net/wan/wanxl.c index 1e7b47704ad9..9c1e10602f2b 100644 --- a/drivers/net/wan/wanxl.c +++ b/drivers/net/wan/wanxl.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/netdevice.h> | 26 | #include <linux/netdevice.h> |
27 | #include <linux/hdlc.h> | 27 | #include <linux/hdlc.h> |
28 | #include <linux/pci.h> | 28 | #include <linux/pci.h> |
29 | #include <linux/dma-mapping.h> | ||
29 | #include <asm/io.h> | 30 | #include <asm/io.h> |
30 | #include <asm/delay.h> | 31 | #include <asm/delay.h> |
31 | 32 | ||
@@ -624,8 +625,8 @@ static int __devinit wanxl_pci_init_one(struct pci_dev *pdev, | |||
624 | /* FIXME when PCI/DMA subsystems are fixed. | 625 | /* FIXME when PCI/DMA subsystems are fixed. |
625 | We set both dma_mask and consistent_dma_mask back to 32 bits | 626 | We set both dma_mask and consistent_dma_mask back to 32 bits |
626 | to indicate the card can do 32-bit DMA addressing */ | 627 | to indicate the card can do 32-bit DMA addressing */ |
627 | if (pci_set_consistent_dma_mask(pdev, 0xFFFFFFFF) || | 628 | if (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) || |
628 | pci_set_dma_mask(pdev, 0xFFFFFFFF)) { | 629 | pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { |
629 | printk(KERN_ERR "wanXL: No usable DMA configuration\n"); | 630 | printk(KERN_ERR "wanXL: No usable DMA configuration\n"); |
630 | wanxl_pci_remove_one(pdev); | 631 | wanxl_pci_remove_one(pdev); |
631 | return -EIO; | 632 | return -EIO; |
diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c index 1c540d825551..bdf672c48182 100644 --- a/drivers/net/wan/x25_asy.c +++ b/drivers/net/wan/x25_asy.c | |||
@@ -829,7 +829,7 @@ static void __exit exit_x25_asy(void) | |||
829 | } | 829 | } |
830 | 830 | ||
831 | kfree(x25_asy_devs); | 831 | kfree(x25_asy_devs); |
832 | tty_register_ldisc(N_X25, NULL); | 832 | tty_unregister_ldisc(N_X25); |
833 | } | 833 | } |
834 | 834 | ||
835 | module_init(init_x25_asy); | 835 | module_init(init_x25_asy); |
diff --git a/drivers/net/wd.c b/drivers/net/wd.c index 1f05d9bd05e4..b03feae459fc 100644 --- a/drivers/net/wd.c +++ b/drivers/net/wd.c | |||
@@ -149,12 +149,7 @@ struct net_device * __init wd_probe(int unit) | |||
149 | err = do_wd_probe(dev); | 149 | err = do_wd_probe(dev); |
150 | if (err) | 150 | if (err) |
151 | goto out; | 151 | goto out; |
152 | err = register_netdev(dev); | ||
153 | if (err) | ||
154 | goto out1; | ||
155 | return dev; | 152 | return dev; |
156 | out1: | ||
157 | cleanup_card(dev); | ||
158 | out: | 153 | out: |
159 | free_netdev(dev); | 154 | free_netdev(dev); |
160 | return ERR_PTR(err); | 155 | return ERR_PTR(err); |
@@ -164,6 +159,7 @@ out: | |||
164 | static int __init wd_probe1(struct net_device *dev, int ioaddr) | 159 | static int __init wd_probe1(struct net_device *dev, int ioaddr) |
165 | { | 160 | { |
166 | int i; | 161 | int i; |
162 | int err; | ||
167 | int checksum = 0; | 163 | int checksum = 0; |
168 | int ancient = 0; /* An old card without config registers. */ | 164 | int ancient = 0; /* An old card without config registers. */ |
169 | int word16 = 0; /* 0 = 8 bit, 1 = 16 bit */ | 165 | int word16 = 0; /* 0 = 8 bit, 1 = 16 bit */ |
@@ -356,7 +352,10 @@ static int __init wd_probe1(struct net_device *dev, int ioaddr) | |||
356 | outb(inb(ioaddr+4)|0x80, ioaddr+4); | 352 | outb(inb(ioaddr+4)|0x80, ioaddr+4); |
357 | #endif | 353 | #endif |
358 | 354 | ||
359 | return 0; | 355 | err = register_netdev(dev); |
356 | if (err) | ||
357 | free_irq(dev->irq, dev); | ||
358 | return err; | ||
360 | } | 359 | } |
361 | 360 | ||
362 | static int | 361 | static int |
@@ -527,11 +526,8 @@ init_module(void) | |||
527 | dev->mem_start = mem[this_dev]; | 526 | dev->mem_start = mem[this_dev]; |
528 | dev->mem_end = mem_end[this_dev]; | 527 | dev->mem_end = mem_end[this_dev]; |
529 | if (do_wd_probe(dev) == 0) { | 528 | if (do_wd_probe(dev) == 0) { |
530 | if (register_netdev(dev) == 0) { | 529 | dev_wd[found++] = dev; |
531 | dev_wd[found++] = dev; | 530 | continue; |
532 | continue; | ||
533 | } | ||
534 | cleanup_card(dev); | ||
535 | } | 531 | } |
536 | free_netdev(dev); | 532 | free_netdev(dev); |
537 | printk(KERN_WARNING "wd.c: No wd80x3 card found (i/o = 0x%x).\n", io[this_dev]); | 533 | printk(KERN_WARNING "wd.c: No wd80x3 card found (i/o = 0x%x).\n", io[this_dev]); |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index fb10a2db63ad..df20adcd0730 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -900,7 +900,7 @@ typedef struct aironet_ioctl { | |||
900 | unsigned char __user *data; // d-data | 900 | unsigned char __user *data; // d-data |
901 | } aironet_ioctl; | 901 | } aironet_ioctl; |
902 | 902 | ||
903 | static char *swversion = "2.1"; | 903 | static char swversion[] = "2.1"; |
904 | #endif /* CISCO_EXT */ | 904 | #endif /* CISCO_EXT */ |
905 | 905 | ||
906 | #define NUM_MODULES 2 | 906 | #define NUM_MODULES 2 |
@@ -1209,7 +1209,7 @@ struct airo_info { | |||
1209 | unsigned char __iomem *pciaux; | 1209 | unsigned char __iomem *pciaux; |
1210 | unsigned char *shared; | 1210 | unsigned char *shared; |
1211 | dma_addr_t shared_dma; | 1211 | dma_addr_t shared_dma; |
1212 | int power; | 1212 | pm_message_t power; |
1213 | SsidRid *SSID; | 1213 | SsidRid *SSID; |
1214 | APListRid *APList; | 1214 | APListRid *APList; |
1215 | #define PCI_SHARED_LEN 2*MPI_MAX_FIDS*PKTSIZE+RIDSIZE | 1215 | #define PCI_SHARED_LEN 2*MPI_MAX_FIDS*PKTSIZE+RIDSIZE |
@@ -2374,7 +2374,7 @@ void stop_airo_card( struct net_device *dev, int freeres ) | |||
2374 | /* | 2374 | /* |
2375 | * Clean out tx queue | 2375 | * Clean out tx queue |
2376 | */ | 2376 | */ |
2377 | if (test_bit(FLAG_MPI, &ai->flags) && skb_queue_len (&ai->txq) > 0) { | 2377 | if (test_bit(FLAG_MPI, &ai->flags) && !skb_queue_empty(&ai->txq)) { |
2378 | struct sk_buff *skb = NULL; | 2378 | struct sk_buff *skb = NULL; |
2379 | for (;(skb = skb_dequeue(&ai->txq));) | 2379 | for (;(skb = skb_dequeue(&ai->txq));) |
2380 | dev_kfree_skb(skb); | 2380 | dev_kfree_skb(skb); |
@@ -2918,7 +2918,7 @@ static int airo_thread(void *data) { | |||
2918 | flush_signals(current); | 2918 | flush_signals(current); |
2919 | 2919 | ||
2920 | /* make swsusp happy with our thread */ | 2920 | /* make swsusp happy with our thread */ |
2921 | try_to_freeze(PF_FREEZE); | 2921 | try_to_freeze(); |
2922 | 2922 | ||
2923 | if (test_bit(JOB_DIE, &ai->flags)) | 2923 | if (test_bit(JOB_DIE, &ai->flags)) |
2924 | break; | 2924 | break; |
@@ -3287,7 +3287,7 @@ exitrx: | |||
3287 | if (status & EV_TXEXC) | 3287 | if (status & EV_TXEXC) |
3288 | get_tx_error(apriv, -1); | 3288 | get_tx_error(apriv, -1); |
3289 | spin_lock_irqsave(&apriv->aux_lock, flags); | 3289 | spin_lock_irqsave(&apriv->aux_lock, flags); |
3290 | if (skb_queue_len (&apriv->txq)) { | 3290 | if (!skb_queue_empty(&apriv->txq)) { |
3291 | spin_unlock_irqrestore(&apriv->aux_lock,flags); | 3291 | spin_unlock_irqrestore(&apriv->aux_lock,flags); |
3292 | mpi_send_packet (dev); | 3292 | mpi_send_packet (dev); |
3293 | } else { | 3293 | } else { |
@@ -5013,7 +5013,7 @@ static void proc_SSID_on_close( struct inode *inode, struct file *file ) { | |||
5013 | enable_MAC(ai, &rsp, 1); | 5013 | enable_MAC(ai, &rsp, 1); |
5014 | } | 5014 | } |
5015 | 5015 | ||
5016 | inline static u8 hexVal(char c) { | 5016 | static inline u8 hexVal(char c) { |
5017 | if (c>='0' && c<='9') return c -= '0'; | 5017 | if (c>='0' && c<='9') return c -= '0'; |
5018 | if (c>='a' && c<='f') return c -= 'a'-10; | 5018 | if (c>='a' && c<='f') return c -= 'a'-10; |
5019 | if (c>='A' && c<='F') return c -= 'A'-10; | 5019 | if (c>='A' && c<='F') return c -= 'A'-10; |
@@ -5499,9 +5499,9 @@ static int airo_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
5499 | cmd.cmd=HOSTSLEEP; | 5499 | cmd.cmd=HOSTSLEEP; |
5500 | issuecommand(ai, &cmd, &rsp); | 5500 | issuecommand(ai, &cmd, &rsp); |
5501 | 5501 | ||
5502 | pci_enable_wake(pdev, state, 1); | 5502 | pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); |
5503 | pci_save_state(pdev); | 5503 | pci_save_state(pdev); |
5504 | return pci_set_power_state(pdev, state); | 5504 | return pci_set_power_state(pdev, pci_choose_state(pdev, state)); |
5505 | } | 5505 | } |
5506 | 5506 | ||
5507 | static int airo_pci_resume(struct pci_dev *pdev) | 5507 | static int airo_pci_resume(struct pci_dev *pdev) |
@@ -5512,7 +5512,7 @@ static int airo_pci_resume(struct pci_dev *pdev) | |||
5512 | 5512 | ||
5513 | pci_set_power_state(pdev, 0); | 5513 | pci_set_power_state(pdev, 0); |
5514 | pci_restore_state(pdev); | 5514 | pci_restore_state(pdev); |
5515 | pci_enable_wake(pdev, ai->power, 0); | 5515 | pci_enable_wake(pdev, pci_choose_state(pdev, ai->power), 0); |
5516 | 5516 | ||
5517 | if (ai->power > 1) { | 5517 | if (ai->power > 1) { |
5518 | reset_card(dev, 0); | 5518 | reset_card(dev, 0); |
@@ -5541,7 +5541,7 @@ static int airo_pci_resume(struct pci_dev *pdev) | |||
5541 | } | 5541 | } |
5542 | writeConfigRid(ai, 0); | 5542 | writeConfigRid(ai, 0); |
5543 | enable_MAC(ai, &rsp, 0); | 5543 | enable_MAC(ai, &rsp, 0); |
5544 | ai->power = 0; | 5544 | ai->power = PMSG_ON; |
5545 | netif_device_attach(dev); | 5545 | netif_device_attach(dev); |
5546 | netif_wake_queue(dev); | 5546 | netif_wake_queue(dev); |
5547 | enable_interrupts(ai); | 5547 | enable_interrupts(ai); |
diff --git a/drivers/net/wireless/airo_cs.c b/drivers/net/wireless/airo_cs.c index fbf53af6cda4..bf25584d68d3 100644 --- a/drivers/net/wireless/airo_cs.c +++ b/drivers/net/wireless/airo_cs.c | |||
@@ -33,7 +33,6 @@ | |||
33 | #include <linux/timer.h> | 33 | #include <linux/timer.h> |
34 | #include <linux/netdevice.h> | 34 | #include <linux/netdevice.h> |
35 | 35 | ||
36 | #include <pcmcia/version.h> | ||
37 | #include <pcmcia/cs_types.h> | 36 | #include <pcmcia/cs_types.h> |
38 | #include <pcmcia/cs.h> | 37 | #include <pcmcia/cs.h> |
39 | #include <pcmcia/cistpl.h> | 38 | #include <pcmcia/cistpl.h> |
@@ -210,11 +209,6 @@ static dev_link_t *airo_attach(void) | |||
210 | link->next = dev_list; | 209 | link->next = dev_list; |
211 | dev_list = link; | 210 | dev_list = link; |
212 | client_reg.dev_info = &dev_info; | 211 | client_reg.dev_info = &dev_info; |
213 | client_reg.EventMask = | ||
214 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
215 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
216 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
217 | client_reg.event_handler = &airo_event; | ||
218 | client_reg.Version = 0x0210; | 212 | client_reg.Version = 0x0210; |
219 | client_reg.event_callback_args.client_data = link; | 213 | client_reg.event_callback_args.client_data = link; |
220 | ret = pcmcia_register_client(&link->handle, &client_reg); | 214 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -559,13 +553,24 @@ static int airo_event(event_t event, int priority, | |||
559 | return 0; | 553 | return 0; |
560 | } /* airo_event */ | 554 | } /* airo_event */ |
561 | 555 | ||
556 | static struct pcmcia_device_id airo_ids[] = { | ||
557 | PCMCIA_DEVICE_MANF_CARD(0x015f, 0x000a), | ||
558 | PCMCIA_DEVICE_MANF_CARD(0x015f, 0x0005), | ||
559 | PCMCIA_DEVICE_MANF_CARD(0x015f, 0x0007), | ||
560 | PCMCIA_DEVICE_MANF_CARD(0x0105, 0x0007), | ||
561 | PCMCIA_DEVICE_NULL, | ||
562 | }; | ||
563 | MODULE_DEVICE_TABLE(pcmcia, airo_ids); | ||
564 | |||
562 | static struct pcmcia_driver airo_driver = { | 565 | static struct pcmcia_driver airo_driver = { |
563 | .owner = THIS_MODULE, | 566 | .owner = THIS_MODULE, |
564 | .drv = { | 567 | .drv = { |
565 | .name = "airo_cs", | 568 | .name = "airo_cs", |
566 | }, | 569 | }, |
567 | .attach = airo_attach, | 570 | .attach = airo_attach, |
571 | .event = airo_event, | ||
568 | .detach = airo_detach, | 572 | .detach = airo_detach, |
573 | .id_table = airo_ids, | ||
569 | }; | 574 | }; |
570 | 575 | ||
571 | static int airo_cs_init(void) | 576 | static int airo_cs_init(void) |
diff --git a/drivers/net/wireless/airport.c b/drivers/net/wireless/airport.c index b4f4bd7956a2..9d496703c465 100644 --- a/drivers/net/wireless/airport.c +++ b/drivers/net/wireless/airport.c | |||
@@ -184,7 +184,7 @@ static int airport_hard_reset(struct orinoco_private *priv) | |||
184 | } | 184 | } |
185 | 185 | ||
186 | static int | 186 | static int |
187 | airport_attach(struct macio_dev *mdev, const struct of_match *match) | 187 | airport_attach(struct macio_dev *mdev, const struct of_device_id *match) |
188 | { | 188 | { |
189 | struct orinoco_private *priv; | 189 | struct orinoco_private *priv; |
190 | struct net_device *dev; | 190 | struct net_device *dev; |
@@ -266,16 +266,16 @@ MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>"); | |||
266 | MODULE_DESCRIPTION("Driver for the Apple Airport wireless card."); | 266 | MODULE_DESCRIPTION("Driver for the Apple Airport wireless card."); |
267 | MODULE_LICENSE("Dual MPL/GPL"); | 267 | MODULE_LICENSE("Dual MPL/GPL"); |
268 | 268 | ||
269 | static struct of_match airport_match[] = | 269 | static struct of_device_id airport_match[] = |
270 | { | 270 | { |
271 | { | 271 | { |
272 | .name = "radio", | 272 | .name = "radio", |
273 | .type = OF_ANY_MATCH, | ||
274 | .compatible = OF_ANY_MATCH | ||
275 | }, | 273 | }, |
276 | {}, | 274 | {}, |
277 | }; | 275 | }; |
278 | 276 | ||
277 | MODULE_DEVICE_TABLE (of, airport_match); | ||
278 | |||
279 | static struct macio_driver airport_driver = | 279 | static struct macio_driver airport_driver = |
280 | { | 280 | { |
281 | .name = DRIVER_NAME, | 281 | .name = DRIVER_NAME, |
diff --git a/drivers/net/wireless/arlan-main.c b/drivers/net/wireless/arlan-main.c index 4f304c6e693a..0e1ac338cac1 100644 --- a/drivers/net/wireless/arlan-main.c +++ b/drivers/net/wireless/arlan-main.c | |||
@@ -33,8 +33,6 @@ static int arlan_EEPROM_bad; | |||
33 | 33 | ||
34 | #ifdef ARLAN_DEBUGGING | 34 | #ifdef ARLAN_DEBUGGING |
35 | 35 | ||
36 | static int arlan_entry_debug; | ||
37 | static int arlan_exit_debug; | ||
38 | static int testMemory = testMemoryUNKNOWN; | 36 | static int testMemory = testMemoryUNKNOWN; |
39 | static int irq = irqUNKNOWN; | 37 | static int irq = irqUNKNOWN; |
40 | static int txScrambled = 1; | 38 | static int txScrambled = 1; |
@@ -43,15 +41,13 @@ static int mdebug; | |||
43 | module_param(irq, int, 0); | 41 | module_param(irq, int, 0); |
44 | module_param(mdebug, int, 0); | 42 | module_param(mdebug, int, 0); |
45 | module_param(testMemory, int, 0); | 43 | module_param(testMemory, int, 0); |
46 | module_param(arlan_entry_debug, int, 0); | ||
47 | module_param(arlan_exit_debug, int, 0); | ||
48 | module_param(txScrambled, int, 0); | 44 | module_param(txScrambled, int, 0); |
49 | MODULE_PARM_DESC(irq, "(unused)"); | 45 | MODULE_PARM_DESC(irq, "(unused)"); |
50 | MODULE_PARM_DESC(testMemory, "(unused)"); | 46 | MODULE_PARM_DESC(testMemory, "(unused)"); |
51 | MODULE_PARM_DESC(mdebug, "Arlan multicast debugging (0-1)"); | 47 | MODULE_PARM_DESC(mdebug, "Arlan multicast debugging (0-1)"); |
52 | #endif | 48 | #endif |
53 | 49 | ||
54 | module_param(arlan_debug, int, 0); | 50 | module_param_named(debug, arlan_debug, int, 0); |
55 | module_param(spreadingCode, int, 0); | 51 | module_param(spreadingCode, int, 0); |
56 | module_param(channelNumber, int, 0); | 52 | module_param(channelNumber, int, 0); |
57 | module_param(channelSet, int, 0); | 53 | module_param(channelSet, int, 0); |
@@ -63,17 +59,19 @@ module_param(keyStart, int, 0); | |||
63 | module_param(tx_delay_ms, int, 0); | 59 | module_param(tx_delay_ms, int, 0); |
64 | module_param(retries, int, 0); | 60 | module_param(retries, int, 0); |
65 | module_param(tx_queue_len, int, 0); | 61 | module_param(tx_queue_len, int, 0); |
66 | module_param(arlan_EEPROM_bad, int, 0); | 62 | module_param_named(EEPROM_bad, arlan_EEPROM_bad, int, 0); |
67 | MODULE_PARM_DESC(arlan_debug, "Arlan debug enable (0-1)"); | 63 | MODULE_PARM_DESC(debug, "Arlan debug enable (0-1)"); |
68 | MODULE_PARM_DESC(retries, "Arlan maximum packet retransmisions"); | 64 | MODULE_PARM_DESC(retries, "Arlan maximum packet retransmisions"); |
69 | #ifdef ARLAN_ENTRY_EXIT_DEBUGGING | 65 | #ifdef ARLAN_ENTRY_EXIT_DEBUGGING |
70 | MODULE_PARM_DESC(arlan_entry_debug, "Arlan driver function entry debugging"); | 66 | static int arlan_entry_debug; |
71 | MODULE_PARM_DESC(arlan_exit_debug, "Arlan driver function exit debugging"); | 67 | static int arlan_exit_debug; |
72 | MODULE_PARM_DESC(arlan_entry_and_exit_debug, "Arlan driver function entry and exit debugging"); | 68 | static int arlan_entry_and_exit_debug; |
73 | #else | 69 | module_param_named(entry_debug, arlan_entry_debug, int, 0); |
74 | MODULE_PARM_DESC(arlan_entry_debug, "(ignored)"); | 70 | module_param_named(exit_debug, arlan_exit_debug, int, 0); |
75 | MODULE_PARM_DESC(arlan_exit_debug, "(ignored)"); | 71 | module_param_named(entry_and_exit_debug, arlan_entry_and_exit_debug, int, 0); |
76 | MODULE_PARM_DESC(arlan_entry_and_exit_debug, "(ignored)"); | 72 | MODULE_PARM_DESC(entry_debug, "Arlan driver function entry debugging"); |
73 | MODULE_PARM_DESC(exit_debug, "Arlan driver function exit debugging"); | ||
74 | MODULE_PARM_DESC(entry_and_exit_debug, "Arlan driver function entry and exit debugging"); | ||
77 | #endif | 75 | #endif |
78 | 76 | ||
79 | struct arlan_conf_stru arlan_conf[MAX_ARLANS]; | 77 | struct arlan_conf_stru arlan_conf[MAX_ARLANS]; |
diff --git a/drivers/net/wireless/atmel_cs.c b/drivers/net/wireless/atmel_cs.c index a4ed28d9c783..ff031a3985b3 100644 --- a/drivers/net/wireless/atmel_cs.c +++ b/drivers/net/wireless/atmel_cs.c | |||
@@ -43,7 +43,6 @@ | |||
43 | #include <linux/moduleparam.h> | 43 | #include <linux/moduleparam.h> |
44 | #include <linux/device.h> | 44 | #include <linux/device.h> |
45 | 45 | ||
46 | #include <pcmcia/version.h> | ||
47 | #include <pcmcia/cs_types.h> | 46 | #include <pcmcia/cs_types.h> |
48 | #include <pcmcia/cs.h> | 47 | #include <pcmcia/cs.h> |
49 | #include <pcmcia/cistpl.h> | 48 | #include <pcmcia/cistpl.h> |
@@ -218,11 +217,6 @@ static dev_link_t *atmel_attach(void) | |||
218 | link->next = dev_list; | 217 | link->next = dev_list; |
219 | dev_list = link; | 218 | dev_list = link; |
220 | client_reg.dev_info = &dev_info; | 219 | client_reg.dev_info = &dev_info; |
221 | client_reg.EventMask = | ||
222 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
223 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
224 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
225 | client_reg.event_handler = &atmel_event; | ||
226 | client_reg.Version = 0x0210; | 220 | client_reg.Version = 0x0210; |
227 | client_reg.event_callback_args.client_data = link; | 221 | client_reg.event_callback_args.client_data = link; |
228 | ret = pcmcia_register_client(&link->handle, &client_reg); | 222 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -646,13 +640,36 @@ static int atmel_event(event_t event, int priority, | |||
646 | } /* atmel_event */ | 640 | } /* atmel_event */ |
647 | 641 | ||
648 | /*====================================================================*/ | 642 | /*====================================================================*/ |
643 | static struct pcmcia_device_id atmel_ids[] = { | ||
644 | PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0620), | ||
645 | PCMCIA_DEVICE_MANF_CARD(0x0101, 0x0696), | ||
646 | PCMCIA_DEVICE_MANF_CARD(0x01bf, 0x3302), | ||
647 | PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0007), | ||
648 | PCMCIA_DEVICE_PROD_ID12("11WAVE", "11WP611AL-E", 0x9eb2da1f, 0xc9a0d3f9), | ||
649 | PCMCIA_DEVICE_PROD_ID12("ATMEL", "AT76C502AR", 0xabda4164, 0x41b37e1f), | ||
650 | PCMCIA_DEVICE_PROD_ID12("ATMEL", "AT76C504", 0xabda4164, 0x5040670a), | ||
651 | PCMCIA_DEVICE_PROD_ID12("ATMEL", "AT76C504A", 0xabda4164, 0xe15ed87f), | ||
652 | PCMCIA_DEVICE_PROD_ID12("BT", "Voyager 1020 Laptop Adapter", 0xae49b86a, 0x1e957cd5), | ||
653 | PCMCIA_DEVICE_PROD_ID12("CNet", "CNWLC 11Mbps Wireless PC Card V-5", 0xbc477dde, 0x502fae6b), | ||
654 | PCMCIA_DEVICE_PROD_ID12("IEEE 802.11b", "Wireless LAN PC Card", 0x5b878724, 0x122f1df6), | ||
655 | PCMCIA_DEVICE_PROD_ID12("OEM", "11Mbps Wireless LAN PC Card V-3", 0xfea54c90, 0x1c5b0f68), | ||
656 | PCMCIA_DEVICE_PROD_ID12("SMC", "2632W", 0xc4f8b18b, 0x30f38774), | ||
657 | PCMCIA_DEVICE_PROD_ID12("SMC", "2632W-V2", 0xc4f8b18b, 0x172d1377), | ||
658 | PCMCIA_DEVICE_PROD_ID12("Wireless", "PC", 0xa407ecdd, 0x556e4d7e), | ||
659 | PCMCIA_DEVICE_PROD_ID12("WLAN", "802.11b PC CARD", 0x575c516c, 0xb1f6dbc4), | ||
660 | PCMCIA_DEVICE_NULL | ||
661 | }; | ||
662 | MODULE_DEVICE_TABLE(pcmcia, atmel_ids); | ||
663 | |||
649 | static struct pcmcia_driver atmel_driver = { | 664 | static struct pcmcia_driver atmel_driver = { |
650 | .owner = THIS_MODULE, | 665 | .owner = THIS_MODULE, |
651 | .drv = { | 666 | .drv = { |
652 | .name = "atmel_cs", | 667 | .name = "atmel_cs", |
653 | }, | 668 | }, |
654 | .attach = atmel_attach, | 669 | .attach = atmel_attach, |
655 | .detach = atmel_detach, | 670 | .event = atmel_event, |
671 | .detach = atmel_detach, | ||
672 | .id_table = atmel_ids, | ||
656 | }; | 673 | }; |
657 | 674 | ||
658 | static int atmel_cs_init(void) | 675 | static int atmel_cs_init(void) |
diff --git a/drivers/net/wireless/netwave_cs.c b/drivers/net/wireless/netwave_cs.c index 382241e7edbb..5f507c49907b 100644 --- a/drivers/net/wireless/netwave_cs.c +++ b/drivers/net/wireless/netwave_cs.c | |||
@@ -62,7 +62,6 @@ | |||
62 | #endif /* WIRELESS_EXT > 12 */ | 62 | #endif /* WIRELESS_EXT > 12 */ |
63 | #endif | 63 | #endif |
64 | 64 | ||
65 | #include <pcmcia/version.h> | ||
66 | #include <pcmcia/cs_types.h> | 65 | #include <pcmcia/cs_types.h> |
67 | #include <pcmcia/cs.h> | 66 | #include <pcmcia/cs.h> |
68 | #include <pcmcia/cistpl.h> | 67 | #include <pcmcia/cistpl.h> |
@@ -491,11 +490,6 @@ static dev_link_t *netwave_attach(void) | |||
491 | link->next = dev_list; | 490 | link->next = dev_list; |
492 | dev_list = link; | 491 | dev_list = link; |
493 | client_reg.dev_info = &dev_info; | 492 | client_reg.dev_info = &dev_info; |
494 | client_reg.EventMask = | ||
495 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
496 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
497 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
498 | client_reg.event_handler = &netwave_event; | ||
499 | client_reg.Version = 0x0210; | 493 | client_reg.Version = 0x0210; |
500 | client_reg.event_callback_args.client_data = link; | 494 | client_reg.event_callback_args.client_data = link; |
501 | ret = pcmcia_register_client(&link->handle, &client_reg); | 495 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -1668,13 +1662,21 @@ static int netwave_close(struct net_device *dev) { | |||
1668 | return 0; | 1662 | return 0; |
1669 | } | 1663 | } |
1670 | 1664 | ||
1665 | static struct pcmcia_device_id netwave_ids[] = { | ||
1666 | PCMCIA_DEVICE_PROD_ID12("Xircom", "CreditCard Netwave", 0x2e3ee845, 0x54e28a28), | ||
1667 | PCMCIA_DEVICE_NULL, | ||
1668 | }; | ||
1669 | MODULE_DEVICE_TABLE(pcmcia, netwave_ids); | ||
1670 | |||
1671 | static struct pcmcia_driver netwave_driver = { | 1671 | static struct pcmcia_driver netwave_driver = { |
1672 | .owner = THIS_MODULE, | 1672 | .owner = THIS_MODULE, |
1673 | .drv = { | 1673 | .drv = { |
1674 | .name = "netwave_cs", | 1674 | .name = "netwave_cs", |
1675 | }, | 1675 | }, |
1676 | .attach = netwave_attach, | 1676 | .attach = netwave_attach, |
1677 | .event = netwave_event, | ||
1677 | .detach = netwave_detach, | 1678 | .detach = netwave_detach, |
1679 | .id_table = netwave_ids, | ||
1678 | }; | 1680 | }; |
1679 | 1681 | ||
1680 | static int __init init_netwave_cs(void) | 1682 | static int __init init_netwave_cs(void) |
diff --git a/drivers/net/wireless/orinoco.c b/drivers/net/wireless/orinoco.c index a3a32430ae9d..aabcdc2be05e 100644 --- a/drivers/net/wireless/orinoco.c +++ b/drivers/net/wireless/orinoco.c | |||
@@ -46,382 +46,9 @@ | |||
46 | * under either the MPL or the GPL. */ | 46 | * under either the MPL or the GPL. */ |
47 | 47 | ||
48 | /* | 48 | /* |
49 | * v0.01 -> v0.02 - 21/3/2001 - Jean II | ||
50 | * o Allow to use regular ethX device name instead of dldwdX | ||
51 | * o Warning on IBSS with ESSID=any for firmware 6.06 | ||
52 | * o Put proper range.throughput values (optimistic) | ||
53 | * o IWSPY support (IOCTL and stat gather in Rx path) | ||
54 | * o Allow setting frequency in Ad-Hoc mode | ||
55 | * o Disable WEP setting if !has_wep to work on old firmware | ||
56 | * o Fix txpower range | ||
57 | * o Start adding support for Samsung/Compaq firmware | ||
58 | * | ||
59 | * v0.02 -> v0.03 - 23/3/2001 - Jean II | ||
60 | * o Start adding Symbol support - need to check all that | ||
61 | * o Fix Prism2/Symbol WEP to accept 128 bits keys | ||
62 | * o Add Symbol WEP (add authentication type) | ||
63 | * o Add Prism2/Symbol rate | ||
64 | * o Add PM timeout (holdover duration) | ||
65 | * o Enable "iwconfig eth0 key off" and friends (toggle flags) | ||
66 | * o Enable "iwconfig eth0 power unicast/all" (toggle flags) | ||
67 | * o Try with an Intel card. It report firmware 1.01, behave like | ||
68 | * an antiquated firmware, however on windows it says 2.00. Yuck ! | ||
69 | * o Workaround firmware bug in allocate buffer (Intel 1.01) | ||
70 | * o Finish external renaming to orinoco... | ||
71 | * o Testing with various Wavelan firmwares | ||
72 | * | ||
73 | * v0.03 -> v0.04 - 30/3/2001 - Jean II | ||
74 | * o Update to Wireless 11 -> add retry limit/lifetime support | ||
75 | * o Tested with a D-Link DWL 650 card, fill in firmware support | ||
76 | * o Warning on Vcc mismatch (D-Link 3.3v card in Lucent 5v only slot) | ||
77 | * o Fixed the Prism2 WEP bugs that I introduced in v0.03 :-( | ||
78 | * It works on D-Link *only* after a tcpdump. Weird... | ||
79 | * And still doesn't work on Intel card. Grrrr... | ||
80 | * o Update the mode after a setport3 | ||
81 | * o Add preamble setting for Symbol cards (not yet enabled) | ||
82 | * o Don't complain as much about Symbol cards... | ||
83 | * | ||
84 | * v0.04 -> v0.04b - 22/4/2001 - David Gibson | ||
85 | * o Removed the 'eth' parameter - always use ethXX as the | ||
86 | * interface name instead of dldwdXX. The other was racy | ||
87 | * anyway. | ||
88 | * o Clean up RID definitions in hermes.h, other cleanups | ||
89 | * | ||
90 | * v0.04b -> v0.04c - 24/4/2001 - Jean II | ||
91 | * o Tim Hurley <timster AT seiki.bliztech.com> reported a D-Link card | ||
92 | * with vendor 02 and firmware 0.08. Added in the capabilities... | ||
93 | * o Tested Lucent firmware 7.28, everything works... | ||
94 | * | ||
95 | * v0.04c -> v0.05 - 3/5/2001 - Benjamin Herrenschmidt | ||
96 | * o Spin-off Pcmcia code. This file is renamed orinoco.c, | ||
97 | * and orinoco_cs.c now contains only the Pcmcia specific stuff | ||
98 | * o Add Airport driver support on top of orinoco.c (see airport.c) | ||
99 | * | ||
100 | * v0.05 -> v0.05a - 4/5/2001 - Jean II | ||
101 | * o Revert to old Pcmcia code to fix breakage of Ben's changes... | ||
102 | * | ||
103 | * v0.05a -> v0.05b - 4/5/2001 - Jean II | ||
104 | * o add module parameter 'ignore_cis_vcc' for D-Link @ 5V | ||
105 | * o D-Link firmware doesn't support multicast. We just print a few | ||
106 | * error messages, but otherwise everything works... | ||
107 | * o For David : set/getport3 works fine, just upgrade iwpriv... | ||
108 | * | ||
109 | * v0.05b -> v0.05c - 5/5/2001 - Benjamin Herrenschmidt | ||
110 | * o Adapt airport.c to latest changes in orinoco.c | ||
111 | * o Remove deferred power enabling code | ||
112 | * | ||
113 | * v0.05c -> v0.05d - 5/5/2001 - Jean II | ||
114 | * o Workaround to SNAP decapsulate frame from Linksys AP | ||
115 | * original patch from : Dong Liu <dliu AT research.bell-labs.com> | ||
116 | * (note : the memcmp bug was mine - fixed) | ||
117 | * o Remove set_retry stuff, no firmware support it (bloat--). | ||
118 | * | ||
119 | * v0.05d -> v0.06 - 25/5/2001 - Jean II | ||
120 | * Original patch from "Hong Lin" <alin AT redhat.com>, | ||
121 | * "Ian Kinner" <ikinner AT redhat.com> | ||
122 | * and "David Smith" <dsmith AT redhat.com> | ||
123 | * o Init of priv->tx_rate_ctrl in firmware specific section. | ||
124 | * o Prism2/Symbol rate, upto should be 0xF and not 0x15. Doh ! | ||
125 | * o Spectrum card always need cor_reset (for every reset) | ||
126 | * o Fix cor_reset to not lose bit 7 in the register | ||
127 | * o flush_stale_links to remove zombie Pcmcia instances | ||
128 | * o Ack previous hermes event before reset | ||
129 | * Me (with my little hands) | ||
130 | * o Allow orinoco.c to call cor_reset via priv->card_reset_handler | ||
131 | * o Add priv->need_card_reset to toggle this feature | ||
132 | * o Fix various buglets when setting WEP in Symbol firmware | ||
133 | * Now, encryption is fully functional on Symbol cards. Youpi ! | ||
134 | * | ||
135 | * v0.06 -> v0.06b - 25/5/2001 - Jean II | ||
136 | * o IBSS on Symbol use port_mode = 4. Please don't ask... | ||
137 | * | ||
138 | * v0.06b -> v0.06c - 29/5/2001 - Jean II | ||
139 | * o Show first spy address in /proc/net/wireless for IBSS mode as well | ||
140 | * | ||
141 | * v0.06c -> v0.06d - 6/7/2001 - David Gibson | ||
142 | * o Change a bunch of KERN_INFO messages to KERN_DEBUG, as per Linus' | ||
143 | * wishes to reduce the number of unnecessary messages. | ||
144 | * o Removed bogus message on CRC error. | ||
145 | * o Merged fixes for v0.08 Prism 2 firmware from William Waghorn | ||
146 | * <willwaghorn AT yahoo.co.uk> | ||
147 | * o Slight cleanup/re-arrangement of firmware detection code. | ||
148 | * | ||
149 | * v0.06d -> v0.06e - 1/8/2001 - David Gibson | ||
150 | * o Removed some redundant global initializers (orinoco_cs.c). | ||
151 | * o Added some module metadata | ||
152 | * | ||
153 | * v0.06e -> v0.06f - 14/8/2001 - David Gibson | ||
154 | * o Wording fix to license | ||
155 | * o Added a 'use_alternate_encaps' module parameter for APs which need an | ||
156 | * oui of 00:00:00. We really need a better way of handling this, but | ||
157 | * the module flag is better than nothing for now. | ||
158 | * | ||
159 | * v0.06f -> v0.07 - 20/8/2001 - David Gibson | ||
160 | * o Removed BAP error retries from hermes_bap_seek(). For Tx we now | ||
161 | * let the upper layers handle the retry, we retry explicitly in the | ||
162 | * Rx path, but don't make as much noise about it. | ||
163 | * o Firmware detection cleanups. | ||
164 | * | ||
165 | * v0.07 -> v0.07a - 1/10/3001 - Jean II | ||
166 | * o Add code to read Symbol firmware revision, inspired by latest code | ||
167 | * in Spectrum24 by Lee John Keyser-Allen - Thanks Lee ! | ||
168 | * o Thanks to Jared Valentine <hidden AT xmission.com> for "providing" me | ||
169 | * a 3Com card with a recent firmware, fill out Symbol firmware | ||
170 | * capabilities of latest rev (2.20), as well as older Symbol cards. | ||
171 | * o Disable Power Management in newer Symbol firmware, the API | ||
172 | * has changed (documentation needed). | ||
173 | * | ||
174 | * v0.07a -> v0.08 - 3/10/2001 - David Gibson | ||
175 | * o Fixed a possible buffer overrun found by the Stanford checker (in | ||
176 | * dldwd_ioctl_setiwencode()). Can only be called by root anyway, so not | ||
177 | * a big problem. | ||
178 | * o Turned has_big_wep on for Intersil cards. That's not true for all of | ||
179 | * them but we should at least let the capable ones try. | ||
180 | * o Wait for BUSY to clear at the beginning of hermes_bap_seek(). I | ||
181 | * realized that my assumption that the driver's serialization | ||
182 | * would prevent the BAP being busy on entry was possibly false, because | ||
183 | * things other than seeks may make the BAP busy. | ||
184 | * o Use "alternate" (oui 00:00:00) encapsulation by default. | ||
185 | * Setting use_old_encaps will mimic the old behaviour, but I think we | ||
186 | * will be able to eliminate this. | ||
187 | * o Don't try to make __initdata const (the version string). This can't | ||
188 | * work because of the way the __initdata sectioning works. | ||
189 | * o Added MODULE_LICENSE tags. | ||
190 | * o Support for PLX (transparent PCMCIA->PCI bridge) cards. | ||
191 | * o Changed to using the new type-fascist min/max. | ||
192 | * | ||
193 | * v0.08 -> v0.08a - 9/10/2001 - David Gibson | ||
194 | * o Inserted some missing acknowledgements/info into the Changelog. | ||
195 | * o Fixed some bugs in the normalization of signal level reporting. | ||
196 | * o Fixed bad bug in WEP key handling on Intersil and Symbol firmware, | ||
197 | * which led to an instant crash on big-endian machines. | ||
198 | * | ||
199 | * v0.08a -> v0.08b - 20/11/2001 - David Gibson | ||
200 | * o Lots of cleanup and bugfixes in orinoco_plx.c | ||
201 | * o Cleanup to handling of Tx rate setting. | ||
202 | * o Removed support for old encapsulation method. | ||
203 | * o Removed old "dldwd" names. | ||
204 | * o Split RID constants into a new file hermes_rid.h | ||
205 | * o Renamed RID constants to match linux-wlan-ng and prism2.o | ||
206 | * o Bugfixes in hermes.c | ||
207 | * o Poke the PLX's INTCSR register, so it actually starts | ||
208 | * generating interrupts. These cards might actually work now. | ||
209 | * o Update to wireless extensions v12 (Jean II) | ||
210 | * o Support for tallies and inquire command (Jean II) | ||
211 | * o Airport updates for newer PPC kernels (BenH) | ||
212 | * | ||
213 | * v0.08b -> v0.09 - 21/12/2001 - David Gibson | ||
214 | * o Some new PCI IDs for PLX cards. | ||
215 | * o Removed broken attempt to do ALLMULTI reception. Just use | ||
216 | * promiscuous mode instead | ||
217 | * o Preliminary work for list-AP (Jean II) | ||
218 | * o Airport updates from (BenH) | ||
219 | * o Eliminated racy hw_ready stuff | ||
220 | * o Fixed generation of fake events in irq handler. This should | ||
221 | * finally kill the EIO problems (Jean II & dgibson) | ||
222 | * o Fixed breakage of bitrate set/get on Agere firmware (Jean II) | ||
223 | * | ||
224 | * v0.09 -> v0.09a - 2/1/2002 - David Gibson | ||
225 | * o Fixed stupid mistake in multicast list handling, triggering | ||
226 | * a BUG() | ||
227 | * | ||
228 | * v0.09a -> v0.09b - 16/1/2002 - David Gibson | ||
229 | * o Fixed even stupider mistake in new interrupt handling, which | ||
230 | * seriously broke things on big-endian machines. | ||
231 | * o Removed a bunch of redundant includes and exports. | ||
232 | * o Removed a redundant MOD_{INC,DEC}_USE_COUNT pair in airport.c | ||
233 | * o Don't attempt to do hardware level multicast reception on | ||
234 | * Intersil firmware, just go promisc instead. | ||
235 | * o Typo fixed in hermes_issue_cmd() | ||
236 | * o Eliminated WIRELESS_SPY #ifdefs | ||
237 | * o Status code reported on Tx exceptions | ||
238 | * o Moved netif_wake_queue() from ALLOC interrupts to TX and TXEXC | ||
239 | * interrupts, which should fix the timeouts we're seeing. | ||
240 | * | ||
241 | * v0.09b -> v0.10 - 25 Feb 2002 - David Gibson | ||
242 | * o Removed nested structures used for header parsing, so the | ||
243 | * driver should now work without hackery on ARM | ||
244 | * o Fix for WEP handling on Intersil (Hawk Newton) | ||
245 | * o Eliminated the /proc/hermes/ethXX/regs debugging file. It | ||
246 | * was never very useful. | ||
247 | * o Make Rx errors less noisy. | ||
248 | * | ||
249 | * v0.10 -> v0.11 - 5 Apr 2002 - David Gibson | ||
250 | * o Laid the groundwork in hermes.[ch] for devices which map | ||
251 | * into PCI memory space rather than IO space. | ||
252 | * o Fixed bug in multicast handling (cleared multicast list when | ||
253 | * leaving promiscuous mode). | ||
254 | * o Relegated Tx error messages to debug. | ||
255 | * o Cleaned up / corrected handling of allocation lengths. | ||
256 | * o Set OWNSSID in IBSS mode for WinXP interoperability (jimc). | ||
257 | * o Change to using alloc_etherdev() for structure allocations. | ||
258 | * o Check for and drop undersized packets. | ||
259 | * o Fixed a race in stopping/waking the queue. This should fix | ||
260 | * the timeout problems (Pavel Roskin) | ||
261 | * o Reverted to netif_wake_queue() on the ALLOC event. | ||
262 | * o Fixes for recent Symbol firmwares which lack AP density | ||
263 | * (Pavel Roskin). | ||
264 | * | ||
265 | * v0.11 -> v0.11a - 29 Apr 2002 - David Gibson | ||
266 | * o Handle different register spacing, necessary for Prism 2.5 | ||
267 | * PCI adaptors (Steve Hill). | ||
268 | * o Cleaned up initialization of card structures in orinoco_cs | ||
269 | * and airport. Removed card->priv field. | ||
270 | * o Make response structure optional for hermes_docmd_wait() | ||
271 | * Pavel Roskin) | ||
272 | * o Added PCI id for Nortel emobility to orinoco_plx.c. | ||
273 | * o Cleanup to handling of Symbol's allocation bug. (Pavel Roskin) | ||
274 | * o Cleanups to firmware capability detection. | ||
275 | * o Arrange for orinoco_pci.c to override firmware detection. | ||
276 | * We should be able to support the PCI Intersil cards now. | ||
277 | * o Cleanup handling of reset_cor and hard_reset (Pavel Roskin). | ||
278 | * o Remove erroneous use of USER_BAP in the TxExc handler (Jouni | ||
279 | * Malinen). | ||
280 | * o Makefile changes for better integration into David Hinds | ||
281 | * pcmcia-cs package. | ||
282 | * | ||
283 | * v0.11a -> v0.11b - 1 May 2002 - David Gibson | ||
284 | * o Better error reporting in orinoco_plx_init_one() | ||
285 | * o Fixed multiple bad kfree() bugs introduced by the | ||
286 | * alloc_orinocodev() changes. | ||
287 | * | ||
288 | * v0.11b -> v0.12 - 19 Jun 2002 - David Gibson | ||
289 | * o Support changing the MAC address. | ||
290 | * o Correct display of Intersil firmware revision numbers. | ||
291 | * o Entirely revised locking scheme. Should be both simpler and | ||
292 | * better. | ||
293 | * o Merged some common code in orinoco_plx, orinoco_pci and | ||
294 | * airport by creating orinoco_default_{open,stop,reset}() | ||
295 | * which are used as the dev->open, dev->stop, priv->reset | ||
296 | * callbacks if none are specified when alloc_orinocodev() is | ||
297 | * called. | ||
298 | * o Removed orinoco_plx_interrupt() and orinoco_pci_interrupt(). | ||
299 | * They didn't do anything. | ||
300 | * | ||
301 | * v0.12 -> v0.12a - 4 Jul 2002 - David Gibson | ||
302 | * o Some rearrangement of code. | ||
303 | * o Numerous fixups to locking and rest handling, particularly | ||
304 | * for PCMCIA. | ||
305 | * o This allows open and stop net_device methods to be in | ||
306 | * orinoco.c now, rather than in the init modules. | ||
307 | * o In orinoco_cs.c link->priv now points to the struct | ||
308 | * net_device not to the struct orinoco_private. | ||
309 | * o Added a check for undersized SNAP frames, which could cause | ||
310 | * crashes. | ||
311 | * | ||
312 | * v0.12a -> v0.12b - 11 Jul 2002 - David Gibson | ||
313 | * o Fix hw->num_init testing code, so num_init is actually | ||
314 | * incremented. | ||
315 | * o Fix very stupid bug in orinoco_cs which broke compile with | ||
316 | * CONFIG_SMP. | ||
317 | * o Squashed a warning. | ||
318 | * | ||
319 | * v0.12b -> v0.12c - 26 Jul 2002 - David Gibson | ||
320 | * o Change to C9X style designated initializers. | ||
321 | * o Add support for 3Com AirConnect PCI. | ||
322 | * o No longer ignore the hard_reset argument to | ||
323 | * alloc_orinocodev(). Oops. | ||
324 | * | ||
325 | * v0.12c -> v0.13beta1 - 13 Sep 2002 - David Gibson | ||
326 | * o Revert the broken 0.12* locking scheme and go to a new yet | ||
327 | * simpler scheme. | ||
328 | * o Do firmware resets only in orinoco_init() and when waking | ||
329 | * the card from hard sleep. | ||
330 | * | ||
331 | * v0.13beta1 -> v0.13 - 27 Sep 2002 - David Gibson | ||
332 | * o Re-introduced full resets (via schedule_task()) on Tx | ||
333 | * timeout. | ||
334 | * | ||
335 | * v0.13 -> v0.13a - 30 Sep 2002 - David Gibson | ||
336 | * o Minor cleanups to info frame handling. Add basic support | ||
337 | * for linkstatus info frames. | ||
338 | * o Include required kernel headers in orinoco.h, to avoid | ||
339 | * compile problems. | ||
340 | * | ||
341 | * v0.13a -> v0.13b - 10 Feb 2003 - David Gibson | ||
342 | * o Implemented hard reset for Airport cards | ||
343 | * o Experimental suspend/resume implementation for orinoco_pci | ||
344 | * o Abolished /proc debugging support, replaced with a debugging | ||
345 | * iwpriv. Now it's ugly and simple instead of ugly and complex. | ||
346 | * o Bugfix in hermes.c if the firmware returned a record length | ||
347 | * of 0, we could go clobbering memory. | ||
348 | * o Bugfix in orinoco_stop() - it used to fail if hw_unavailable | ||
349 | * was set, which was usually true on PCMCIA hot removes. | ||
350 | * o Track LINKSTATUS messages, silently drop Tx packets before | ||
351 | * we are connected (avoids confusing the firmware), and only | ||
352 | * give LINKSTATUS printk()s if the status has changed. | ||
353 | * | ||
354 | * v0.13b -> v0.13c - 11 Mar 2003 - David Gibson | ||
355 | * o Cleanup: use dev instead of priv in various places. | ||
356 | * o Bug fix: Don't ReleaseConfiguration on RESET_PHYSICAL event | ||
357 | * if we're in the middle of a (driver initiated) hard reset. | ||
358 | * o Bug fix: ETH_ZLEN is supposed to include the header | ||
359 | * (Dionysus Blazakis & Manish Karir) | ||
360 | * o Convert to using workqueues instead of taskqueues (and | ||
361 | * backwards compatibility macros for pre 2.5.41 kernels). | ||
362 | * o Drop redundant (I think...) MOD_{INC,DEC}_USE_COUNT in | ||
363 | * airport.c | ||
364 | * o New orinoco_tmd.c init module from Joerg Dorchain for | ||
365 | * TMD7160 based PCI to PCMCIA bridges (similar to | ||
366 | * orinoco_plx.c). | ||
367 | * | ||
368 | * v0.13c -> v0.13d - 22 Apr 2003 - David Gibson | ||
369 | * o Make hw_unavailable a counter, rather than just a flag, this | ||
370 | * is necessary to avoid some races (such as a card being | ||
371 | * removed in the middle of orinoco_reset(). | ||
372 | * o Restore Release/RequestConfiguration in the PCMCIA event handler | ||
373 | * when dealing with a driver initiated hard reset. This is | ||
374 | * necessary to prevent hangs due to a spurious interrupt while | ||
375 | * the reset is in progress. | ||
376 | * o Clear the 802.11 header when transmitting, even though we | ||
377 | * don't use it. This fixes a long standing bug on some | ||
378 | * firmwares, which seem to get confused if that isn't done. | ||
379 | * o Be less eager to de-encapsulate SNAP frames, only do so if | ||
380 | * the OUI is 00:00:00 or 00:00:f8, leave others alone. The old | ||
381 | * behaviour broke CDP (Cisco Discovery Protocol). | ||
382 | * o Use dev instead of priv for free_irq() as well as | ||
383 | * request_irq() (oops). | ||
384 | * o Attempt to reset rather than giving up if we get too many | ||
385 | * IRQs. | ||
386 | * o Changed semantics of __orinoco_down() so it can be called | ||
387 | * safely with hw_unavailable set. It also now clears the | ||
388 | * linkstatus (since we're going to have to reassociate). | ||
389 | * | ||
390 | * v0.13d -> v0.13e - 12 May 2003 - David Gibson | ||
391 | * o Support for post-2.5.68 return values from irq handler. | ||
392 | * o Fixed bug where underlength packets would be double counted | ||
393 | * in the rx_dropped statistics. | ||
394 | * o Provided a module parameter to suppress linkstatus messages. | ||
395 | * | ||
396 | * v0.13e -> v0.14alpha1 - 30 Sep 2003 - David Gibson | ||
397 | * o Replaced priv->connected logic with netif_carrier_on/off() | ||
398 | * calls. | ||
399 | * o Remove has_ibss_any and never set the CREATEIBSS RID when | ||
400 | * the ESSID is empty. Too many firmwares break if we do. | ||
401 | * o 2.6 merges: Replace pdev->slot_name with pci_name(), remove | ||
402 | * __devinitdata from PCI ID tables, use free_netdev(). | ||
403 | * o Enabled shared-key authentication for Agere firmware (from | ||
404 | * Robert J. Moore <Robert.J.Moore AT allanbank.com> | ||
405 | * o Move netif_wake_queue() (back) to the Tx completion from the | ||
406 | * ALLOC event. This seems to prevent/mitigate the rolling | ||
407 | * error -110 problems at least on some Intersil firmwares. | ||
408 | * Theoretically reduces performance, but I can't measure it. | ||
409 | * Patch from Andrew Tridgell <tridge AT samba.org> | ||
410 | * | ||
411 | * v0.14alpha1 -> v0.14alpha2 - 20 Oct 2003 - David Gibson | ||
412 | * o Correctly turn off shared-key authentication when requested | ||
413 | * (bugfix from Robert J. Moore). | ||
414 | * o Correct airport sleep interfaces for current 2.6 kernels. | ||
415 | * o Add code for key change without disabling/enabling the MAC | ||
416 | * port. This is supposed to allow 802.1x to work sanely, but | ||
417 | * doesn't seem to yet. | ||
418 | * | ||
419 | * TODO | 49 | * TODO |
420 | * o New wireless extensions API (patch from Moustafa | ||
421 | * Youssef, updated by Jim Carter and Pavel Roskin). | ||
422 | * o Handle de-encapsulation within network layer, provide 802.11 | 50 | * o Handle de-encapsulation within network layer, provide 802.11 |
423 | * headers (patch from Thomas 'Dent' Mirlacher) | 51 | * headers (patch from Thomas 'Dent' Mirlacher) |
424 | * o RF monitor mode support | ||
425 | * o Fix possible races in SPY handling. | 52 | * o Fix possible races in SPY handling. |
426 | * o Disconnect wireless extensions from fundamental configuration. | 53 | * o Disconnect wireless extensions from fundamental configuration. |
427 | * o (maybe) Software WEP support (patch from Stano Meduna). | 54 | * o (maybe) Software WEP support (patch from Stano Meduna). |
@@ -462,7 +89,10 @@ | |||
462 | #include <linux/netdevice.h> | 89 | #include <linux/netdevice.h> |
463 | #include <linux/if_arp.h> | 90 | #include <linux/if_arp.h> |
464 | #include <linux/etherdevice.h> | 91 | #include <linux/etherdevice.h> |
92 | #include <linux/ethtool.h> | ||
465 | #include <linux/wireless.h> | 93 | #include <linux/wireless.h> |
94 | #include <net/iw_handler.h> | ||
95 | #include <net/ieee80211.h> | ||
466 | 96 | ||
467 | #include <asm/uaccess.h> | 97 | #include <asm/uaccess.h> |
468 | #include <asm/io.h> | 98 | #include <asm/io.h> |
@@ -492,6 +122,13 @@ EXPORT_SYMBOL(orinoco_debug); | |||
492 | static int suppress_linkstatus; /* = 0 */ | 122 | static int suppress_linkstatus; /* = 0 */ |
493 | module_param(suppress_linkstatus, bool, 0644); | 123 | module_param(suppress_linkstatus, bool, 0644); |
494 | MODULE_PARM_DESC(suppress_linkstatus, "Don't log link status changes"); | 124 | MODULE_PARM_DESC(suppress_linkstatus, "Don't log link status changes"); |
125 | static int ignore_disconnect; /* = 0 */ | ||
126 | module_param(ignore_disconnect, int, 0644); | ||
127 | MODULE_PARM_DESC(ignore_disconnect, "Don't report lost link to the network layer"); | ||
128 | |||
129 | static int force_monitor; /* = 0 */ | ||
130 | module_param(force_monitor, int, 0644); | ||
131 | MODULE_PARM_DESC(force_monitor, "Allow monitor mode for all firmware versions"); | ||
495 | 132 | ||
496 | /********************************************************************/ | 133 | /********************************************************************/ |
497 | /* Compile time configuration and compatibility stuff */ | 134 | /* Compile time configuration and compatibility stuff */ |
@@ -508,6 +145,10 @@ MODULE_PARM_DESC(suppress_linkstatus, "Don't log link status changes"); | |||
508 | /* Internal constants */ | 145 | /* Internal constants */ |
509 | /********************************************************************/ | 146 | /********************************************************************/ |
510 | 147 | ||
148 | /* 802.2 LLC/SNAP header used for Ethernet encapsulation over 802.11 */ | ||
149 | static const u8 encaps_hdr[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00}; | ||
150 | #define ENCAPS_OVERHEAD (sizeof(encaps_hdr) + 2) | ||
151 | |||
511 | #define ORINOCO_MIN_MTU 256 | 152 | #define ORINOCO_MIN_MTU 256 |
512 | #define ORINOCO_MAX_MTU (IEEE802_11_DATA_LEN - ENCAPS_OVERHEAD) | 153 | #define ORINOCO_MAX_MTU (IEEE802_11_DATA_LEN - ENCAPS_OVERHEAD) |
513 | 154 | ||
@@ -534,6 +175,11 @@ MODULE_PARM_DESC(suppress_linkstatus, "Don't log link status changes"); | |||
534 | | HERMES_EV_WTERR | HERMES_EV_INFO \ | 175 | | HERMES_EV_WTERR | HERMES_EV_INFO \ |
535 | | HERMES_EV_INFDROP ) | 176 | | HERMES_EV_INFDROP ) |
536 | 177 | ||
178 | #define MAX_RID_LEN 1024 | ||
179 | |||
180 | static const struct iw_handler_def orinoco_handler_def; | ||
181 | static struct ethtool_ops orinoco_ethtool_ops; | ||
182 | |||
537 | /********************************************************************/ | 183 | /********************************************************************/ |
538 | /* Data tables */ | 184 | /* Data tables */ |
539 | /********************************************************************/ | 185 | /********************************************************************/ |
@@ -568,26 +214,45 @@ static struct { | |||
568 | /* Data types */ | 214 | /* Data types */ |
569 | /********************************************************************/ | 215 | /********************************************************************/ |
570 | 216 | ||
571 | struct header_struct { | 217 | /* Used in Event handling. |
572 | /* 802.3 */ | 218 | * We avoid nested structres as they break on ARM -- Moustafa */ |
573 | u8 dest[ETH_ALEN]; | 219 | struct hermes_tx_descriptor_802_11 { |
574 | u8 src[ETH_ALEN]; | 220 | /* hermes_tx_descriptor */ |
575 | u16 len; | 221 | u16 status; |
576 | /* 802.2 */ | 222 | u16 reserved1; |
223 | u16 reserved2; | ||
224 | u32 sw_support; | ||
225 | u8 retry_count; | ||
226 | u8 tx_rate; | ||
227 | u16 tx_control; | ||
228 | |||
229 | /* ieee802_11_hdr */ | ||
230 | u16 frame_ctl; | ||
231 | u16 duration_id; | ||
232 | u8 addr1[ETH_ALEN]; | ||
233 | u8 addr2[ETH_ALEN]; | ||
234 | u8 addr3[ETH_ALEN]; | ||
235 | u16 seq_ctl; | ||
236 | u8 addr4[ETH_ALEN]; | ||
237 | u16 data_len; | ||
238 | |||
239 | /* ethhdr */ | ||
240 | unsigned char h_dest[ETH_ALEN]; /* destination eth addr */ | ||
241 | unsigned char h_source[ETH_ALEN]; /* source ether addr */ | ||
242 | unsigned short h_proto; /* packet type ID field */ | ||
243 | |||
244 | /* p8022_hdr */ | ||
577 | u8 dsap; | 245 | u8 dsap; |
578 | u8 ssap; | 246 | u8 ssap; |
579 | u8 ctrl; | 247 | u8 ctrl; |
580 | /* SNAP */ | ||
581 | u8 oui[3]; | 248 | u8 oui[3]; |
249 | |||
582 | u16 ethertype; | 250 | u16 ethertype; |
583 | } __attribute__ ((packed)); | 251 | } __attribute__ ((packed)); |
584 | 252 | ||
585 | /* 802.2 LLC/SNAP header used for Ethernet encapsulation over 802.11 */ | 253 | /* Rx frame header except compatibility 802.3 header */ |
586 | u8 encaps_hdr[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00}; | ||
587 | |||
588 | #define ENCAPS_OVERHEAD (sizeof(encaps_hdr) + 2) | ||
589 | |||
590 | struct hermes_rx_descriptor { | 254 | struct hermes_rx_descriptor { |
255 | /* Control */ | ||
591 | u16 status; | 256 | u16 status; |
592 | u32 time; | 257 | u32 time; |
593 | u8 silence; | 258 | u8 silence; |
@@ -595,16 +260,26 @@ struct hermes_rx_descriptor { | |||
595 | u8 rate; | 260 | u8 rate; |
596 | u8 rxflow; | 261 | u8 rxflow; |
597 | u32 reserved; | 262 | u32 reserved; |
263 | |||
264 | /* 802.11 header */ | ||
265 | u16 frame_ctl; | ||
266 | u16 duration_id; | ||
267 | u8 addr1[ETH_ALEN]; | ||
268 | u8 addr2[ETH_ALEN]; | ||
269 | u8 addr3[ETH_ALEN]; | ||
270 | u16 seq_ctl; | ||
271 | u8 addr4[ETH_ALEN]; | ||
272 | |||
273 | /* Data length */ | ||
274 | u16 data_len; | ||
598 | } __attribute__ ((packed)); | 275 | } __attribute__ ((packed)); |
599 | 276 | ||
600 | /********************************************************************/ | 277 | /********************************************************************/ |
601 | /* Function prototypes */ | 278 | /* Function prototypes */ |
602 | /********************************************************************/ | 279 | /********************************************************************/ |
603 | 280 | ||
604 | static int orinoco_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | ||
605 | static int __orinoco_program_rids(struct net_device *dev); | 281 | static int __orinoco_program_rids(struct net_device *dev); |
606 | static void __orinoco_set_multicast_list(struct net_device *dev); | 282 | static void __orinoco_set_multicast_list(struct net_device *dev); |
607 | static int orinoco_debug_dump_recs(struct net_device *dev); | ||
608 | 283 | ||
609 | /********************************************************************/ | 284 | /********************************************************************/ |
610 | /* Internal helper functions */ | 285 | /* Internal helper functions */ |
@@ -626,6 +301,10 @@ static inline void set_port_type(struct orinoco_private *priv) | |||
626 | priv->createibss = 1; | 301 | priv->createibss = 1; |
627 | } | 302 | } |
628 | break; | 303 | break; |
304 | case IW_MODE_MONITOR: | ||
305 | priv->port_type = 3; | ||
306 | priv->createibss = 0; | ||
307 | break; | ||
629 | default: | 308 | default: |
630 | printk(KERN_ERR "%s: Invalid priv->iw_mode in set_port_type()\n", | 309 | printk(KERN_ERR "%s: Invalid priv->iw_mode in set_port_type()\n", |
631 | priv->ndev->name); | 310 | priv->ndev->name); |
@@ -655,7 +334,7 @@ static int orinoco_open(struct net_device *dev) | |||
655 | return err; | 334 | return err; |
656 | } | 335 | } |
657 | 336 | ||
658 | int orinoco_stop(struct net_device *dev) | 337 | static int orinoco_stop(struct net_device *dev) |
659 | { | 338 | { |
660 | struct orinoco_private *priv = netdev_priv(dev); | 339 | struct orinoco_private *priv = netdev_priv(dev); |
661 | int err = 0; | 340 | int err = 0; |
@@ -686,7 +365,7 @@ static struct iw_statistics *orinoco_get_wireless_stats(struct net_device *dev) | |||
686 | struct orinoco_private *priv = netdev_priv(dev); | 365 | struct orinoco_private *priv = netdev_priv(dev); |
687 | hermes_t *hw = &priv->hw; | 366 | hermes_t *hw = &priv->hw; |
688 | struct iw_statistics *wstats = &priv->wstats; | 367 | struct iw_statistics *wstats = &priv->wstats; |
689 | int err = 0; | 368 | int err; |
690 | unsigned long flags; | 369 | unsigned long flags; |
691 | 370 | ||
692 | if (! netif_device_present(dev)) { | 371 | if (! netif_device_present(dev)) { |
@@ -695,9 +374,21 @@ static struct iw_statistics *orinoco_get_wireless_stats(struct net_device *dev) | |||
695 | return NULL; /* FIXME: Can we do better than this? */ | 374 | return NULL; /* FIXME: Can we do better than this? */ |
696 | } | 375 | } |
697 | 376 | ||
377 | /* If busy, return the old stats. Returning NULL may cause | ||
378 | * the interface to disappear from /proc/net/wireless */ | ||
698 | if (orinoco_lock(priv, &flags) != 0) | 379 | if (orinoco_lock(priv, &flags) != 0) |
699 | return NULL; /* FIXME: Erg, we've been signalled, how | 380 | return wstats; |
700 | * do we propagate this back up? */ | 381 | |
382 | /* We can't really wait for the tallies inquiry command to | ||
383 | * complete, so we just use the previous results and trigger | ||
384 | * a new tallies inquiry command for next time - Jean II */ | ||
385 | /* FIXME: Really we should wait for the inquiry to come back - | ||
386 | * as it is the stats we give don't make a whole lot of sense. | ||
387 | * Unfortunately, it's not clear how to do that within the | ||
388 | * wireless extensions framework: I think we're in user | ||
389 | * context, but a lock seems to be held by the time we get in | ||
390 | * here so we're not safe to sleep here. */ | ||
391 | hermes_inquire(hw, HERMES_INQ_TALLIES); | ||
701 | 392 | ||
702 | if (priv->iw_mode == IW_MODE_ADHOC) { | 393 | if (priv->iw_mode == IW_MODE_ADHOC) { |
703 | memset(&wstats->qual, 0, sizeof(wstats->qual)); | 394 | memset(&wstats->qual, 0, sizeof(wstats->qual)); |
@@ -716,25 +407,16 @@ static struct iw_statistics *orinoco_get_wireless_stats(struct net_device *dev) | |||
716 | 407 | ||
717 | err = HERMES_READ_RECORD(hw, USER_BAP, | 408 | err = HERMES_READ_RECORD(hw, USER_BAP, |
718 | HERMES_RID_COMMSQUALITY, &cq); | 409 | HERMES_RID_COMMSQUALITY, &cq); |
719 | 410 | ||
720 | wstats->qual.qual = (int)le16_to_cpu(cq.qual); | 411 | if (!err) { |
721 | wstats->qual.level = (int)le16_to_cpu(cq.signal) - 0x95; | 412 | wstats->qual.qual = (int)le16_to_cpu(cq.qual); |
722 | wstats->qual.noise = (int)le16_to_cpu(cq.noise) - 0x95; | 413 | wstats->qual.level = (int)le16_to_cpu(cq.signal) - 0x95; |
723 | wstats->qual.updated = 7; | 414 | wstats->qual.noise = (int)le16_to_cpu(cq.noise) - 0x95; |
415 | wstats->qual.updated = 7; | ||
416 | } | ||
724 | } | 417 | } |
725 | 418 | ||
726 | /* We can't really wait for the tallies inquiry command to | ||
727 | * complete, so we just use the previous results and trigger | ||
728 | * a new tallies inquiry command for next time - Jean II */ | ||
729 | /* FIXME: We're in user context (I think?), so we should just | ||
730 | wait for the tallies to come through */ | ||
731 | err = hermes_inquire(hw, HERMES_INQ_TALLIES); | ||
732 | |||
733 | orinoco_unlock(priv, &flags); | 419 | orinoco_unlock(priv, &flags); |
734 | |||
735 | if (err) | ||
736 | return NULL; | ||
737 | |||
738 | return wstats; | 420 | return wstats; |
739 | } | 421 | } |
740 | 422 | ||
@@ -809,7 +491,7 @@ static int orinoco_xmit(struct sk_buff *skb, struct net_device *dev) | |||
809 | return 1; | 491 | return 1; |
810 | } | 492 | } |
811 | 493 | ||
812 | if (! netif_carrier_ok(dev)) { | 494 | if (! netif_carrier_ok(dev) || (priv->iw_mode == IW_MODE_MONITOR)) { |
813 | /* Oops, the firmware hasn't established a connection, | 495 | /* Oops, the firmware hasn't established a connection, |
814 | silently drop the packet (this seems to be the | 496 | silently drop the packet (this seems to be the |
815 | safest approach). */ | 497 | safest approach). */ |
@@ -946,26 +628,55 @@ static void __orinoco_ev_txexc(struct net_device *dev, hermes_t *hw) | |||
946 | struct orinoco_private *priv = netdev_priv(dev); | 628 | struct orinoco_private *priv = netdev_priv(dev); |
947 | struct net_device_stats *stats = &priv->stats; | 629 | struct net_device_stats *stats = &priv->stats; |
948 | u16 fid = hermes_read_regn(hw, TXCOMPLFID); | 630 | u16 fid = hermes_read_regn(hw, TXCOMPLFID); |
949 | struct hermes_tx_descriptor desc; | 631 | struct hermes_tx_descriptor_802_11 hdr; |
950 | int err = 0; | 632 | int err = 0; |
951 | 633 | ||
952 | if (fid == DUMMY_FID) | 634 | if (fid == DUMMY_FID) |
953 | return; /* Nothing's really happened */ | 635 | return; /* Nothing's really happened */ |
954 | 636 | ||
955 | err = hermes_bap_pread(hw, IRQ_BAP, &desc, sizeof(desc), fid, 0); | 637 | /* Read the frame header */ |
638 | err = hermes_bap_pread(hw, IRQ_BAP, &hdr, | ||
639 | sizeof(struct hermes_tx_descriptor) + | ||
640 | sizeof(struct ieee80211_hdr), | ||
641 | fid, 0); | ||
642 | |||
643 | hermes_write_regn(hw, TXCOMPLFID, DUMMY_FID); | ||
644 | stats->tx_errors++; | ||
645 | |||
956 | if (err) { | 646 | if (err) { |
957 | printk(KERN_WARNING "%s: Unable to read descriptor on Tx error " | 647 | printk(KERN_WARNING "%s: Unable to read descriptor on Tx error " |
958 | "(FID=%04X error %d)\n", | 648 | "(FID=%04X error %d)\n", |
959 | dev->name, fid, err); | 649 | dev->name, fid, err); |
960 | } else { | 650 | return; |
961 | DEBUG(1, "%s: Tx error, status %d\n", | ||
962 | dev->name, le16_to_cpu(desc.status)); | ||
963 | } | 651 | } |
964 | 652 | ||
965 | stats->tx_errors++; | 653 | DEBUG(1, "%s: Tx error, err %d (FID=%04X)\n", dev->name, |
654 | err, fid); | ||
655 | |||
656 | /* We produce a TXDROP event only for retry or lifetime | ||
657 | * exceeded, because that's the only status that really mean | ||
658 | * that this particular node went away. | ||
659 | * Other errors means that *we* screwed up. - Jean II */ | ||
660 | hdr.status = le16_to_cpu(hdr.status); | ||
661 | if (hdr.status & (HERMES_TXSTAT_RETRYERR | HERMES_TXSTAT_AGEDERR)) { | ||
662 | union iwreq_data wrqu; | ||
663 | |||
664 | /* Copy 802.11 dest address. | ||
665 | * We use the 802.11 header because the frame may | ||
666 | * not be 802.3 or may be mangled... | ||
667 | * In Ad-Hoc mode, it will be the node address. | ||
668 | * In managed mode, it will be most likely the AP addr | ||
669 | * User space will figure out how to convert it to | ||
670 | * whatever it needs (IP address or else). | ||
671 | * - Jean II */ | ||
672 | memcpy(wrqu.addr.sa_data, hdr.addr1, ETH_ALEN); | ||
673 | wrqu.addr.sa_family = ARPHRD_ETHER; | ||
674 | |||
675 | /* Send event to user space */ | ||
676 | wireless_send_event(dev, IWEVTXDROP, &wrqu, NULL); | ||
677 | } | ||
966 | 678 | ||
967 | netif_wake_queue(dev); | 679 | netif_wake_queue(dev); |
968 | hermes_write_regn(hw, TXCOMPLFID, DUMMY_FID); | ||
969 | } | 680 | } |
970 | 681 | ||
971 | static void orinoco_tx_timeout(struct net_device *dev) | 682 | static void orinoco_tx_timeout(struct net_device *dev) |
@@ -1042,18 +753,127 @@ static void orinoco_stat_gather(struct net_device *dev, | |||
1042 | } | 753 | } |
1043 | } | 754 | } |
1044 | 755 | ||
756 | /* | ||
757 | * orinoco_rx_monitor - handle received monitor frames. | ||
758 | * | ||
759 | * Arguments: | ||
760 | * dev network device | ||
761 | * rxfid received FID | ||
762 | * desc rx descriptor of the frame | ||
763 | * | ||
764 | * Call context: interrupt | ||
765 | */ | ||
766 | static void orinoco_rx_monitor(struct net_device *dev, u16 rxfid, | ||
767 | struct hermes_rx_descriptor *desc) | ||
768 | { | ||
769 | u32 hdrlen = 30; /* return full header by default */ | ||
770 | u32 datalen = 0; | ||
771 | u16 fc; | ||
772 | int err; | ||
773 | int len; | ||
774 | struct sk_buff *skb; | ||
775 | struct orinoco_private *priv = netdev_priv(dev); | ||
776 | struct net_device_stats *stats = &priv->stats; | ||
777 | hermes_t *hw = &priv->hw; | ||
778 | |||
779 | len = le16_to_cpu(desc->data_len); | ||
780 | |||
781 | /* Determine the size of the header and the data */ | ||
782 | fc = le16_to_cpu(desc->frame_ctl); | ||
783 | switch (fc & IEEE80211_FCTL_FTYPE) { | ||
784 | case IEEE80211_FTYPE_DATA: | ||
785 | if ((fc & IEEE80211_FCTL_TODS) | ||
786 | && (fc & IEEE80211_FCTL_FROMDS)) | ||
787 | hdrlen = 30; | ||
788 | else | ||
789 | hdrlen = 24; | ||
790 | datalen = len; | ||
791 | break; | ||
792 | case IEEE80211_FTYPE_MGMT: | ||
793 | hdrlen = 24; | ||
794 | datalen = len; | ||
795 | break; | ||
796 | case IEEE80211_FTYPE_CTL: | ||
797 | switch (fc & IEEE80211_FCTL_STYPE) { | ||
798 | case IEEE80211_STYPE_PSPOLL: | ||
799 | case IEEE80211_STYPE_RTS: | ||
800 | case IEEE80211_STYPE_CFEND: | ||
801 | case IEEE80211_STYPE_CFENDACK: | ||
802 | hdrlen = 16; | ||
803 | break; | ||
804 | case IEEE80211_STYPE_CTS: | ||
805 | case IEEE80211_STYPE_ACK: | ||
806 | hdrlen = 10; | ||
807 | break; | ||
808 | } | ||
809 | break; | ||
810 | default: | ||
811 | /* Unknown frame type */ | ||
812 | break; | ||
813 | } | ||
814 | |||
815 | /* sanity check the length */ | ||
816 | if (datalen > IEEE80211_DATA_LEN + 12) { | ||
817 | printk(KERN_DEBUG "%s: oversized monitor frame, " | ||
818 | "data length = %d\n", dev->name, datalen); | ||
819 | err = -EIO; | ||
820 | stats->rx_length_errors++; | ||
821 | goto update_stats; | ||
822 | } | ||
823 | |||
824 | skb = dev_alloc_skb(hdrlen + datalen); | ||
825 | if (!skb) { | ||
826 | printk(KERN_WARNING "%s: Cannot allocate skb for monitor frame\n", | ||
827 | dev->name); | ||
828 | err = -ENOMEM; | ||
829 | goto drop; | ||
830 | } | ||
831 | |||
832 | /* Copy the 802.11 header to the skb */ | ||
833 | memcpy(skb_put(skb, hdrlen), &(desc->frame_ctl), hdrlen); | ||
834 | skb->mac.raw = skb->data; | ||
835 | |||
836 | /* If any, copy the data from the card to the skb */ | ||
837 | if (datalen > 0) { | ||
838 | err = hermes_bap_pread(hw, IRQ_BAP, skb_put(skb, datalen), | ||
839 | ALIGN(datalen, 2), rxfid, | ||
840 | HERMES_802_2_OFFSET); | ||
841 | if (err) { | ||
842 | printk(KERN_ERR "%s: error %d reading monitor frame\n", | ||
843 | dev->name, err); | ||
844 | goto drop; | ||
845 | } | ||
846 | } | ||
847 | |||
848 | skb->dev = dev; | ||
849 | skb->ip_summed = CHECKSUM_NONE; | ||
850 | skb->pkt_type = PACKET_OTHERHOST; | ||
851 | skb->protocol = __constant_htons(ETH_P_802_2); | ||
852 | |||
853 | dev->last_rx = jiffies; | ||
854 | stats->rx_packets++; | ||
855 | stats->rx_bytes += skb->len; | ||
856 | |||
857 | netif_rx(skb); | ||
858 | return; | ||
859 | |||
860 | drop: | ||
861 | dev_kfree_skb_irq(skb); | ||
862 | update_stats: | ||
863 | stats->rx_errors++; | ||
864 | stats->rx_dropped++; | ||
865 | } | ||
866 | |||
1045 | static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) | 867 | static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) |
1046 | { | 868 | { |
1047 | struct orinoco_private *priv = netdev_priv(dev); | 869 | struct orinoco_private *priv = netdev_priv(dev); |
1048 | struct net_device_stats *stats = &priv->stats; | 870 | struct net_device_stats *stats = &priv->stats; |
1049 | struct iw_statistics *wstats = &priv->wstats; | 871 | struct iw_statistics *wstats = &priv->wstats; |
1050 | struct sk_buff *skb = NULL; | 872 | struct sk_buff *skb = NULL; |
1051 | u16 rxfid, status; | 873 | u16 rxfid, status, fc; |
1052 | int length, data_len, data_off; | 874 | int length; |
1053 | char *p; | ||
1054 | struct hermes_rx_descriptor desc; | 875 | struct hermes_rx_descriptor desc; |
1055 | struct header_struct hdr; | 876 | struct ethhdr *hdr; |
1056 | struct ethhdr *eh; | ||
1057 | int err; | 877 | int err; |
1058 | 878 | ||
1059 | rxfid = hermes_read_regn(hw, RXFID); | 879 | rxfid = hermes_read_regn(hw, RXFID); |
@@ -1063,53 +883,46 @@ static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) | |||
1063 | if (err) { | 883 | if (err) { |
1064 | printk(KERN_ERR "%s: error %d reading Rx descriptor. " | 884 | printk(KERN_ERR "%s: error %d reading Rx descriptor. " |
1065 | "Frame dropped.\n", dev->name, err); | 885 | "Frame dropped.\n", dev->name, err); |
1066 | stats->rx_errors++; | 886 | goto update_stats; |
1067 | goto drop; | ||
1068 | } | 887 | } |
1069 | 888 | ||
1070 | status = le16_to_cpu(desc.status); | 889 | status = le16_to_cpu(desc.status); |
1071 | 890 | ||
1072 | if (status & HERMES_RXSTAT_ERR) { | 891 | if (status & HERMES_RXSTAT_BADCRC) { |
1073 | if (status & HERMES_RXSTAT_UNDECRYPTABLE) { | 892 | DEBUG(1, "%s: Bad CRC on Rx. Frame dropped.\n", |
1074 | wstats->discard.code++; | 893 | dev->name); |
1075 | DEBUG(1, "%s: Undecryptable frame on Rx. Frame dropped.\n", | 894 | stats->rx_crc_errors++; |
1076 | dev->name); | 895 | goto update_stats; |
1077 | } else { | ||
1078 | stats->rx_crc_errors++; | ||
1079 | DEBUG(1, "%s: Bad CRC on Rx. Frame dropped.\n", dev->name); | ||
1080 | } | ||
1081 | stats->rx_errors++; | ||
1082 | goto drop; | ||
1083 | } | 896 | } |
1084 | 897 | ||
1085 | /* For now we ignore the 802.11 header completely, assuming | 898 | /* Handle frames in monitor mode */ |
1086 | that the card's firmware has handled anything vital */ | 899 | if (priv->iw_mode == IW_MODE_MONITOR) { |
900 | orinoco_rx_monitor(dev, rxfid, &desc); | ||
901 | return; | ||
902 | } | ||
1087 | 903 | ||
1088 | err = hermes_bap_pread(hw, IRQ_BAP, &hdr, sizeof(hdr), | 904 | if (status & HERMES_RXSTAT_UNDECRYPTABLE) { |
1089 | rxfid, HERMES_802_3_OFFSET); | 905 | DEBUG(1, "%s: Undecryptable frame on Rx. Frame dropped.\n", |
1090 | if (err) { | 906 | dev->name); |
1091 | printk(KERN_ERR "%s: error %d reading frame header. " | 907 | wstats->discard.code++; |
1092 | "Frame dropped.\n", dev->name, err); | 908 | goto update_stats; |
1093 | stats->rx_errors++; | ||
1094 | goto drop; | ||
1095 | } | 909 | } |
1096 | 910 | ||
1097 | length = ntohs(hdr.len); | 911 | length = le16_to_cpu(desc.data_len); |
1098 | 912 | fc = le16_to_cpu(desc.frame_ctl); | |
913 | |||
1099 | /* Sanity checks */ | 914 | /* Sanity checks */ |
1100 | if (length < 3) { /* No for even an 802.2 LLC header */ | 915 | if (length < 3) { /* No for even an 802.2 LLC header */ |
1101 | /* At least on Symbol firmware with PCF we get quite a | 916 | /* At least on Symbol firmware with PCF we get quite a |
1102 | lot of these legitimately - Poll frames with no | 917 | lot of these legitimately - Poll frames with no |
1103 | data. */ | 918 | data. */ |
1104 | stats->rx_dropped++; | 919 | return; |
1105 | goto drop; | ||
1106 | } | 920 | } |
1107 | if (length > IEEE802_11_DATA_LEN) { | 921 | if (length > IEEE802_11_DATA_LEN) { |
1108 | printk(KERN_WARNING "%s: Oversized frame received (%d bytes)\n", | 922 | printk(KERN_WARNING "%s: Oversized frame received (%d bytes)\n", |
1109 | dev->name, length); | 923 | dev->name, length); |
1110 | stats->rx_length_errors++; | 924 | stats->rx_length_errors++; |
1111 | stats->rx_errors++; | 925 | goto update_stats; |
1112 | goto drop; | ||
1113 | } | 926 | } |
1114 | 927 | ||
1115 | /* We need space for the packet data itself, plus an ethernet | 928 | /* We need space for the packet data itself, plus an ethernet |
@@ -1121,60 +934,53 @@ static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) | |||
1121 | if (!skb) { | 934 | if (!skb) { |
1122 | printk(KERN_WARNING "%s: Can't allocate skb for Rx\n", | 935 | printk(KERN_WARNING "%s: Can't allocate skb for Rx\n", |
1123 | dev->name); | 936 | dev->name); |
1124 | goto drop; | 937 | goto update_stats; |
1125 | } | 938 | } |
1126 | 939 | ||
1127 | skb_reserve(skb, 2); /* This way the IP header is aligned */ | 940 | /* We'll prepend the header, so reserve space for it. The worst |
941 | case is no decapsulation, when 802.3 header is prepended and | ||
942 | nothing is removed. 2 is for aligning the IP header. */ | ||
943 | skb_reserve(skb, ETH_HLEN + 2); | ||
944 | |||
945 | err = hermes_bap_pread(hw, IRQ_BAP, skb_put(skb, length), | ||
946 | ALIGN(length, 2), rxfid, | ||
947 | HERMES_802_2_OFFSET); | ||
948 | if (err) { | ||
949 | printk(KERN_ERR "%s: error %d reading frame. " | ||
950 | "Frame dropped.\n", dev->name, err); | ||
951 | goto drop; | ||
952 | } | ||
1128 | 953 | ||
1129 | /* Handle decapsulation | 954 | /* Handle decapsulation |
1130 | * In most cases, the firmware tell us about SNAP frames. | 955 | * In most cases, the firmware tell us about SNAP frames. |
1131 | * For some reason, the SNAP frames sent by LinkSys APs | 956 | * For some reason, the SNAP frames sent by LinkSys APs |
1132 | * are not properly recognised by most firmwares. | 957 | * are not properly recognised by most firmwares. |
1133 | * So, check ourselves */ | 958 | * So, check ourselves */ |
1134 | if (((status & HERMES_RXSTAT_MSGTYPE) == HERMES_RXSTAT_1042) || | 959 | if (length >= ENCAPS_OVERHEAD && |
1135 | ((status & HERMES_RXSTAT_MSGTYPE) == HERMES_RXSTAT_TUNNEL) || | 960 | (((status & HERMES_RXSTAT_MSGTYPE) == HERMES_RXSTAT_1042) || |
1136 | is_ethersnap(&hdr)) { | 961 | ((status & HERMES_RXSTAT_MSGTYPE) == HERMES_RXSTAT_TUNNEL) || |
962 | is_ethersnap(skb->data))) { | ||
1137 | /* These indicate a SNAP within 802.2 LLC within | 963 | /* These indicate a SNAP within 802.2 LLC within |
1138 | 802.11 frame which we'll need to de-encapsulate to | 964 | 802.11 frame which we'll need to de-encapsulate to |
1139 | the original EthernetII frame. */ | 965 | the original EthernetII frame. */ |
1140 | 966 | hdr = (struct ethhdr *)skb_push(skb, ETH_HLEN - ENCAPS_OVERHEAD); | |
1141 | if (length < ENCAPS_OVERHEAD) { /* No room for full LLC+SNAP */ | ||
1142 | stats->rx_length_errors++; | ||
1143 | goto drop; | ||
1144 | } | ||
1145 | |||
1146 | /* Remove SNAP header, reconstruct EthernetII frame */ | ||
1147 | data_len = length - ENCAPS_OVERHEAD; | ||
1148 | data_off = HERMES_802_3_OFFSET + sizeof(hdr); | ||
1149 | |||
1150 | eh = (struct ethhdr *)skb_put(skb, ETH_HLEN); | ||
1151 | |||
1152 | memcpy(eh, &hdr, 2 * ETH_ALEN); | ||
1153 | eh->h_proto = hdr.ethertype; | ||
1154 | } else { | 967 | } else { |
1155 | /* All other cases indicate a genuine 802.3 frame. No | 968 | /* 802.3 frame - prepend 802.3 header as is */ |
1156 | decapsulation needed. We just throw the whole | 969 | hdr = (struct ethhdr *)skb_push(skb, ETH_HLEN); |
1157 | thing in, and hope the protocol layer can deal with | 970 | hdr->h_proto = htons(length); |
1158 | it as 802.3 */ | ||
1159 | data_len = length; | ||
1160 | data_off = HERMES_802_3_OFFSET; | ||
1161 | /* FIXME: we re-read from the card data we already read here */ | ||
1162 | } | ||
1163 | |||
1164 | p = skb_put(skb, data_len); | ||
1165 | err = hermes_bap_pread(hw, IRQ_BAP, p, ALIGN(data_len, 2), | ||
1166 | rxfid, data_off); | ||
1167 | if (err) { | ||
1168 | printk(KERN_ERR "%s: error %d reading frame. " | ||
1169 | "Frame dropped.\n", dev->name, err); | ||
1170 | stats->rx_errors++; | ||
1171 | goto drop; | ||
1172 | } | 971 | } |
972 | memcpy(hdr->h_dest, desc.addr1, ETH_ALEN); | ||
973 | if (fc & IEEE80211_FCTL_FROMDS) | ||
974 | memcpy(hdr->h_source, desc.addr3, ETH_ALEN); | ||
975 | else | ||
976 | memcpy(hdr->h_source, desc.addr2, ETH_ALEN); | ||
1173 | 977 | ||
1174 | dev->last_rx = jiffies; | 978 | dev->last_rx = jiffies; |
1175 | skb->dev = dev; | 979 | skb->dev = dev; |
1176 | skb->protocol = eth_type_trans(skb, dev); | 980 | skb->protocol = eth_type_trans(skb, dev); |
1177 | skb->ip_summed = CHECKSUM_NONE; | 981 | skb->ip_summed = CHECKSUM_NONE; |
982 | if (fc & IEEE80211_FCTL_TODS) | ||
983 | skb->pkt_type = PACKET_OTHERHOST; | ||
1178 | 984 | ||
1179 | /* Process the wireless stats if needed */ | 985 | /* Process the wireless stats if needed */ |
1180 | orinoco_stat_gather(dev, skb, &desc); | 986 | orinoco_stat_gather(dev, skb, &desc); |
@@ -1187,11 +993,10 @@ static void __orinoco_ev_rx(struct net_device *dev, hermes_t *hw) | |||
1187 | return; | 993 | return; |
1188 | 994 | ||
1189 | drop: | 995 | drop: |
996 | dev_kfree_skb_irq(skb); | ||
997 | update_stats: | ||
998 | stats->rx_errors++; | ||
1190 | stats->rx_dropped++; | 999 | stats->rx_dropped++; |
1191 | |||
1192 | if (skb) | ||
1193 | dev_kfree_skb_irq(skb); | ||
1194 | return; | ||
1195 | } | 1000 | } |
1196 | 1001 | ||
1197 | /********************************************************************/ | 1002 | /********************************************************************/ |
@@ -1235,6 +1040,99 @@ static void print_linkstatus(struct net_device *dev, u16 status) | |||
1235 | dev->name, s, status); | 1040 | dev->name, s, status); |
1236 | } | 1041 | } |
1237 | 1042 | ||
1043 | /* Search scan results for requested BSSID, join it if found */ | ||
1044 | static void orinoco_join_ap(struct net_device *dev) | ||
1045 | { | ||
1046 | struct orinoco_private *priv = netdev_priv(dev); | ||
1047 | struct hermes *hw = &priv->hw; | ||
1048 | int err; | ||
1049 | unsigned long flags; | ||
1050 | struct join_req { | ||
1051 | u8 bssid[ETH_ALEN]; | ||
1052 | u16 channel; | ||
1053 | } __attribute__ ((packed)) req; | ||
1054 | const int atom_len = offsetof(struct prism2_scan_apinfo, atim); | ||
1055 | struct prism2_scan_apinfo *atom; | ||
1056 | int offset = 4; | ||
1057 | u8 *buf; | ||
1058 | u16 len; | ||
1059 | |||
1060 | /* Allocate buffer for scan results */ | ||
1061 | buf = kmalloc(MAX_SCAN_LEN, GFP_KERNEL); | ||
1062 | if (! buf) | ||
1063 | return; | ||
1064 | |||
1065 | if (orinoco_lock(priv, &flags) != 0) | ||
1066 | goto out; | ||
1067 | |||
1068 | /* Sanity checks in case user changed something in the meantime */ | ||
1069 | if (! priv->bssid_fixed) | ||
1070 | goto out; | ||
1071 | |||
1072 | if (strlen(priv->desired_essid) == 0) | ||
1073 | goto out; | ||
1074 | |||
1075 | /* Read scan results from the firmware */ | ||
1076 | err = hermes_read_ltv(hw, USER_BAP, | ||
1077 | HERMES_RID_SCANRESULTSTABLE, | ||
1078 | MAX_SCAN_LEN, &len, buf); | ||
1079 | if (err) { | ||
1080 | printk(KERN_ERR "%s: Cannot read scan results\n", | ||
1081 | dev->name); | ||
1082 | goto out; | ||
1083 | } | ||
1084 | |||
1085 | len = HERMES_RECLEN_TO_BYTES(len); | ||
1086 | |||
1087 | /* Go through the scan results looking for the channel of the AP | ||
1088 | * we were requested to join */ | ||
1089 | for (; offset + atom_len <= len; offset += atom_len) { | ||
1090 | atom = (struct prism2_scan_apinfo *) (buf + offset); | ||
1091 | if (memcmp(&atom->bssid, priv->desired_bssid, ETH_ALEN) == 0) | ||
1092 | goto found; | ||
1093 | } | ||
1094 | |||
1095 | DEBUG(1, "%s: Requested AP not found in scan results\n", | ||
1096 | dev->name); | ||
1097 | goto out; | ||
1098 | |||
1099 | found: | ||
1100 | memcpy(req.bssid, priv->desired_bssid, ETH_ALEN); | ||
1101 | req.channel = atom->channel; /* both are little-endian */ | ||
1102 | err = HERMES_WRITE_RECORD(hw, USER_BAP, HERMES_RID_CNFJOINREQUEST, | ||
1103 | &req); | ||
1104 | if (err) | ||
1105 | printk(KERN_ERR "%s: Error issuing join request\n", dev->name); | ||
1106 | |||
1107 | out: | ||
1108 | kfree(buf); | ||
1109 | orinoco_unlock(priv, &flags); | ||
1110 | } | ||
1111 | |||
1112 | /* Send new BSSID to userspace */ | ||
1113 | static void orinoco_send_wevents(struct net_device *dev) | ||
1114 | { | ||
1115 | struct orinoco_private *priv = netdev_priv(dev); | ||
1116 | struct hermes *hw = &priv->hw; | ||
1117 | union iwreq_data wrqu; | ||
1118 | int err; | ||
1119 | unsigned long flags; | ||
1120 | |||
1121 | if (orinoco_lock(priv, &flags) != 0) | ||
1122 | return; | ||
1123 | |||
1124 | err = hermes_read_ltv(hw, IRQ_BAP, HERMES_RID_CURRENTBSSID, | ||
1125 | ETH_ALEN, NULL, wrqu.ap_addr.sa_data); | ||
1126 | if (err != 0) | ||
1127 | return; | ||
1128 | |||
1129 | wrqu.ap_addr.sa_family = ARPHRD_ETHER; | ||
1130 | |||
1131 | /* Send event to user space */ | ||
1132 | wireless_send_event(dev, SIOCGIWAP, &wrqu, NULL); | ||
1133 | orinoco_unlock(priv, &flags); | ||
1134 | } | ||
1135 | |||
1238 | static void __orinoco_ev_info(struct net_device *dev, hermes_t *hw) | 1136 | static void __orinoco_ev_info(struct net_device *dev, hermes_t *hw) |
1239 | { | 1137 | { |
1240 | struct orinoco_private *priv = netdev_priv(dev); | 1138 | struct orinoco_private *priv = netdev_priv(dev); |
@@ -1275,9 +1173,10 @@ static void __orinoco_ev_info(struct net_device *dev, hermes_t *hw) | |||
1275 | len = sizeof(tallies); | 1173 | len = sizeof(tallies); |
1276 | } | 1174 | } |
1277 | 1175 | ||
1278 | /* Read directly the data (no seek) */ | 1176 | err = hermes_bap_pread(hw, IRQ_BAP, &tallies, len, |
1279 | hermes_read_words(hw, HERMES_DATA1, (void *) &tallies, | 1177 | infofid, sizeof(info)); |
1280 | len / 2); /* FIXME: blech! */ | 1178 | if (err) |
1179 | break; | ||
1281 | 1180 | ||
1282 | /* Increment our various counters */ | 1181 | /* Increment our various counters */ |
1283 | /* wstats->discard.nwid - no wrong BSSID stuff */ | 1182 | /* wstats->discard.nwid - no wrong BSSID stuff */ |
@@ -1301,31 +1200,122 @@ static void __orinoco_ev_info(struct net_device *dev, hermes_t *hw) | |||
1301 | u16 newstatus; | 1200 | u16 newstatus; |
1302 | int connected; | 1201 | int connected; |
1303 | 1202 | ||
1203 | if (priv->iw_mode == IW_MODE_MONITOR) | ||
1204 | break; | ||
1205 | |||
1304 | if (len != sizeof(linkstatus)) { | 1206 | if (len != sizeof(linkstatus)) { |
1305 | printk(KERN_WARNING "%s: Unexpected size for linkstatus frame (%d bytes)\n", | 1207 | printk(KERN_WARNING "%s: Unexpected size for linkstatus frame (%d bytes)\n", |
1306 | dev->name, len); | 1208 | dev->name, len); |
1307 | break; | 1209 | break; |
1308 | } | 1210 | } |
1309 | 1211 | ||
1310 | hermes_read_words(hw, HERMES_DATA1, (void *) &linkstatus, | 1212 | err = hermes_bap_pread(hw, IRQ_BAP, &linkstatus, len, |
1311 | len / 2); | 1213 | infofid, sizeof(info)); |
1214 | if (err) | ||
1215 | break; | ||
1312 | newstatus = le16_to_cpu(linkstatus.linkstatus); | 1216 | newstatus = le16_to_cpu(linkstatus.linkstatus); |
1313 | 1217 | ||
1218 | /* Symbol firmware uses "out of range" to signal that | ||
1219 | * the hostscan frame can be requested. */ | ||
1220 | if (newstatus == HERMES_LINKSTATUS_AP_OUT_OF_RANGE && | ||
1221 | priv->firmware_type == FIRMWARE_TYPE_SYMBOL && | ||
1222 | priv->has_hostscan && priv->scan_inprogress) { | ||
1223 | hermes_inquire(hw, HERMES_INQ_HOSTSCAN_SYMBOL); | ||
1224 | break; | ||
1225 | } | ||
1226 | |||
1314 | connected = (newstatus == HERMES_LINKSTATUS_CONNECTED) | 1227 | connected = (newstatus == HERMES_LINKSTATUS_CONNECTED) |
1315 | || (newstatus == HERMES_LINKSTATUS_AP_CHANGE) | 1228 | || (newstatus == HERMES_LINKSTATUS_AP_CHANGE) |
1316 | || (newstatus == HERMES_LINKSTATUS_AP_IN_RANGE); | 1229 | || (newstatus == HERMES_LINKSTATUS_AP_IN_RANGE); |
1317 | 1230 | ||
1318 | if (connected) | 1231 | if (connected) |
1319 | netif_carrier_on(dev); | 1232 | netif_carrier_on(dev); |
1320 | else | 1233 | else if (!ignore_disconnect) |
1321 | netif_carrier_off(dev); | 1234 | netif_carrier_off(dev); |
1322 | 1235 | ||
1323 | if (newstatus != priv->last_linkstatus) | 1236 | if (newstatus != priv->last_linkstatus) { |
1237 | priv->last_linkstatus = newstatus; | ||
1324 | print_linkstatus(dev, newstatus); | 1238 | print_linkstatus(dev, newstatus); |
1239 | /* The info frame contains only one word which is the | ||
1240 | * status (see hermes.h). The status is pretty boring | ||
1241 | * in itself, that's why we export the new BSSID... | ||
1242 | * Jean II */ | ||
1243 | schedule_work(&priv->wevent_work); | ||
1244 | } | ||
1245 | } | ||
1246 | break; | ||
1247 | case HERMES_INQ_SCAN: | ||
1248 | if (!priv->scan_inprogress && priv->bssid_fixed && | ||
1249 | priv->firmware_type == FIRMWARE_TYPE_INTERSIL) { | ||
1250 | schedule_work(&priv->join_work); | ||
1251 | break; | ||
1252 | } | ||
1253 | /* fall through */ | ||
1254 | case HERMES_INQ_HOSTSCAN: | ||
1255 | case HERMES_INQ_HOSTSCAN_SYMBOL: { | ||
1256 | /* Result of a scanning. Contains information about | ||
1257 | * cells in the vicinity - Jean II */ | ||
1258 | union iwreq_data wrqu; | ||
1259 | unsigned char *buf; | ||
1260 | |||
1261 | /* Sanity check */ | ||
1262 | if (len > 4096) { | ||
1263 | printk(KERN_WARNING "%s: Scan results too large (%d bytes)\n", | ||
1264 | dev->name, len); | ||
1265 | break; | ||
1266 | } | ||
1267 | |||
1268 | /* We are a strict producer. If the previous scan results | ||
1269 | * have not been consumed, we just have to drop this | ||
1270 | * frame. We can't remove the previous results ourselves, | ||
1271 | * that would be *very* racy... Jean II */ | ||
1272 | if (priv->scan_result != NULL) { | ||
1273 | printk(KERN_WARNING "%s: Previous scan results not consumed, dropping info frame.\n", dev->name); | ||
1274 | break; | ||
1275 | } | ||
1276 | |||
1277 | /* Allocate buffer for results */ | ||
1278 | buf = kmalloc(len, GFP_ATOMIC); | ||
1279 | if (buf == NULL) | ||
1280 | /* No memory, so can't printk()... */ | ||
1281 | break; | ||
1282 | |||
1283 | /* Read scan data */ | ||
1284 | err = hermes_bap_pread(hw, IRQ_BAP, (void *) buf, len, | ||
1285 | infofid, sizeof(info)); | ||
1286 | if (err) | ||
1287 | break; | ||
1325 | 1288 | ||
1326 | priv->last_linkstatus = newstatus; | 1289 | #ifdef ORINOCO_DEBUG |
1290 | { | ||
1291 | int i; | ||
1292 | printk(KERN_DEBUG "Scan result [%02X", buf[0]); | ||
1293 | for(i = 1; i < (len * 2); i++) | ||
1294 | printk(":%02X", buf[i]); | ||
1295 | printk("]\n"); | ||
1296 | } | ||
1297 | #endif /* ORINOCO_DEBUG */ | ||
1298 | |||
1299 | /* Allow the clients to access the results */ | ||
1300 | priv->scan_len = len; | ||
1301 | priv->scan_result = buf; | ||
1302 | |||
1303 | /* Send an empty event to user space. | ||
1304 | * We don't send the received data on the event because | ||
1305 | * it would require us to do complex transcoding, and | ||
1306 | * we want to minimise the work done in the irq handler | ||
1307 | * Use a request to extract the data - Jean II */ | ||
1308 | wrqu.data.length = 0; | ||
1309 | wrqu.data.flags = 0; | ||
1310 | wireless_send_event(dev, SIOCGIWSCAN, &wrqu, NULL); | ||
1327 | } | 1311 | } |
1328 | break; | 1312 | break; |
1313 | case HERMES_INQ_SEC_STAT_AGERE: | ||
1314 | /* Security status (Agere specific) */ | ||
1315 | /* Ignore this frame for now */ | ||
1316 | if (priv->firmware_type == FIRMWARE_TYPE_AGERE) | ||
1317 | break; | ||
1318 | /* fall through */ | ||
1329 | default: | 1319 | default: |
1330 | printk(KERN_DEBUG "%s: Unknown information frame received: " | 1320 | printk(KERN_DEBUG "%s: Unknown information frame received: " |
1331 | "type 0x%04x, length %d\n", dev->name, type, len); | 1321 | "type 0x%04x, length %d\n", dev->name, type, len); |
@@ -1350,6 +1340,8 @@ int __orinoco_up(struct net_device *dev) | |||
1350 | struct hermes *hw = &priv->hw; | 1340 | struct hermes *hw = &priv->hw; |
1351 | int err; | 1341 | int err; |
1352 | 1342 | ||
1343 | netif_carrier_off(dev); /* just to make sure */ | ||
1344 | |||
1353 | err = __orinoco_program_rids(dev); | 1345 | err = __orinoco_program_rids(dev); |
1354 | if (err) { | 1346 | if (err) { |
1355 | printk(KERN_ERR "%s: Error %d configuring card\n", | 1347 | printk(KERN_ERR "%s: Error %d configuring card\n", |
@@ -1413,7 +1405,7 @@ int orinoco_reinit_firmware(struct net_device *dev) | |||
1413 | return err; | 1405 | return err; |
1414 | 1406 | ||
1415 | err = hermes_allocate(hw, priv->nicbuf_size, &priv->txfid); | 1407 | err = hermes_allocate(hw, priv->nicbuf_size, &priv->txfid); |
1416 | if (err == -EIO) { | 1408 | if (err == -EIO && priv->nicbuf_size > TX_NICBUF_SIZE_BUG) { |
1417 | /* Try workaround for old Symbol firmware bug */ | 1409 | /* Try workaround for old Symbol firmware bug */ |
1418 | printk(KERN_WARNING "%s: firmware ALLOC bug detected " | 1410 | printk(KERN_WARNING "%s: firmware ALLOC bug detected " |
1419 | "(old Symbol firmware?). Trying to work around... ", | 1411 | "(old Symbol firmware?). Trying to work around... ", |
@@ -1460,6 +1452,36 @@ static int __orinoco_hw_set_bitrate(struct orinoco_private *priv) | |||
1460 | return err; | 1452 | return err; |
1461 | } | 1453 | } |
1462 | 1454 | ||
1455 | /* Set fixed AP address */ | ||
1456 | static int __orinoco_hw_set_wap(struct orinoco_private *priv) | ||
1457 | { | ||
1458 | int roaming_flag; | ||
1459 | int err = 0; | ||
1460 | hermes_t *hw = &priv->hw; | ||
1461 | |||
1462 | switch (priv->firmware_type) { | ||
1463 | case FIRMWARE_TYPE_AGERE: | ||
1464 | /* not supported */ | ||
1465 | break; | ||
1466 | case FIRMWARE_TYPE_INTERSIL: | ||
1467 | if (priv->bssid_fixed) | ||
1468 | roaming_flag = 2; | ||
1469 | else | ||
1470 | roaming_flag = 1; | ||
1471 | |||
1472 | err = hermes_write_wordrec(hw, USER_BAP, | ||
1473 | HERMES_RID_CNFROAMINGMODE, | ||
1474 | roaming_flag); | ||
1475 | break; | ||
1476 | case FIRMWARE_TYPE_SYMBOL: | ||
1477 | err = HERMES_WRITE_RECORD(hw, USER_BAP, | ||
1478 | HERMES_RID_CNFMANDATORYBSSID_SYMBOL, | ||
1479 | &priv->desired_bssid); | ||
1480 | break; | ||
1481 | } | ||
1482 | return err; | ||
1483 | } | ||
1484 | |||
1463 | /* Change the WEP keys and/or the current keys. Can be called | 1485 | /* Change the WEP keys and/or the current keys. Can be called |
1464 | * either from __orinoco_hw_setup_wep() or directly from | 1486 | * either from __orinoco_hw_setup_wep() or directly from |
1465 | * orinoco_ioctl_setiwencode(). In the later case the association | 1487 | * orinoco_ioctl_setiwencode(). In the later case the association |
@@ -1610,17 +1632,15 @@ static int __orinoco_program_rids(struct net_device *dev) | |||
1610 | return err; | 1632 | return err; |
1611 | } | 1633 | } |
1612 | /* Set the channel/frequency */ | 1634 | /* Set the channel/frequency */ |
1613 | if (priv->channel == 0) { | 1635 | if (priv->channel != 0 && priv->iw_mode != IW_MODE_INFRA) { |
1614 | printk(KERN_DEBUG "%s: Channel is 0 in __orinoco_program_rids()\n", dev->name); | 1636 | err = hermes_write_wordrec(hw, USER_BAP, |
1615 | if (priv->createibss) | 1637 | HERMES_RID_CNFOWNCHANNEL, |
1616 | priv->channel = 10; | 1638 | priv->channel); |
1617 | } | 1639 | if (err) { |
1618 | err = hermes_write_wordrec(hw, USER_BAP, HERMES_RID_CNFOWNCHANNEL, | 1640 | printk(KERN_ERR "%s: Error %d setting channel %d\n", |
1619 | priv->channel); | 1641 | dev->name, err, priv->channel); |
1620 | if (err) { | 1642 | return err; |
1621 | printk(KERN_ERR "%s: Error %d setting channel\n", | 1643 | } |
1622 | dev->name, err); | ||
1623 | return err; | ||
1624 | } | 1644 | } |
1625 | 1645 | ||
1626 | if (priv->has_ibss) { | 1646 | if (priv->has_ibss) { |
@@ -1647,6 +1667,13 @@ static int __orinoco_program_rids(struct net_device *dev) | |||
1647 | } | 1667 | } |
1648 | } | 1668 | } |
1649 | 1669 | ||
1670 | /* Set the desired BSSID */ | ||
1671 | err = __orinoco_hw_set_wap(priv); | ||
1672 | if (err) { | ||
1673 | printk(KERN_ERR "%s: Error %d setting AP address\n", | ||
1674 | dev->name, err); | ||
1675 | return err; | ||
1676 | } | ||
1650 | /* Set the desired ESSID */ | 1677 | /* Set the desired ESSID */ |
1651 | idbuf.len = cpu_to_le16(strlen(priv->desired_essid)); | 1678 | idbuf.len = cpu_to_le16(strlen(priv->desired_essid)); |
1652 | memcpy(&idbuf.val, priv->desired_essid, sizeof(idbuf.val)); | 1679 | memcpy(&idbuf.val, priv->desired_essid, sizeof(idbuf.val)); |
@@ -1785,6 +1812,20 @@ static int __orinoco_program_rids(struct net_device *dev) | |||
1785 | } | 1812 | } |
1786 | } | 1813 | } |
1787 | 1814 | ||
1815 | if (priv->iw_mode == IW_MODE_MONITOR) { | ||
1816 | /* Enable monitor mode */ | ||
1817 | dev->type = ARPHRD_IEEE80211; | ||
1818 | err = hermes_docmd_wait(hw, HERMES_CMD_TEST | | ||
1819 | HERMES_TEST_MONITOR, 0, NULL); | ||
1820 | } else { | ||
1821 | /* Disable monitor mode */ | ||
1822 | dev->type = ARPHRD_ETHER; | ||
1823 | err = hermes_docmd_wait(hw, HERMES_CMD_TEST | | ||
1824 | HERMES_TEST_STOP, 0, NULL); | ||
1825 | } | ||
1826 | if (err) | ||
1827 | return err; | ||
1828 | |||
1788 | /* Set promiscuity / multicast*/ | 1829 | /* Set promiscuity / multicast*/ |
1789 | priv->promiscuous = 0; | 1830 | priv->promiscuous = 0; |
1790 | priv->mc_count = 0; | 1831 | priv->mc_count = 0; |
@@ -1861,62 +1902,13 @@ __orinoco_set_multicast_list(struct net_device *dev) | |||
1861 | dev->flags &= ~IFF_PROMISC; | 1902 | dev->flags &= ~IFF_PROMISC; |
1862 | } | 1903 | } |
1863 | 1904 | ||
1864 | static int orinoco_reconfigure(struct net_device *dev) | ||
1865 | { | ||
1866 | struct orinoco_private *priv = netdev_priv(dev); | ||
1867 | struct hermes *hw = &priv->hw; | ||
1868 | unsigned long flags; | ||
1869 | int err = 0; | ||
1870 | |||
1871 | if (priv->broken_disableport) { | ||
1872 | schedule_work(&priv->reset_work); | ||
1873 | return 0; | ||
1874 | } | ||
1875 | |||
1876 | if (orinoco_lock(priv, &flags) != 0) | ||
1877 | return -EBUSY; | ||
1878 | |||
1879 | err = hermes_disable_port(hw, 0); | ||
1880 | if (err) { | ||
1881 | printk(KERN_WARNING "%s: Unable to disable port while reconfiguring card\n", | ||
1882 | dev->name); | ||
1883 | priv->broken_disableport = 1; | ||
1884 | goto out; | ||
1885 | } | ||
1886 | |||
1887 | err = __orinoco_program_rids(dev); | ||
1888 | if (err) { | ||
1889 | printk(KERN_WARNING "%s: Unable to reconfigure card\n", | ||
1890 | dev->name); | ||
1891 | goto out; | ||
1892 | } | ||
1893 | |||
1894 | err = hermes_enable_port(hw, 0); | ||
1895 | if (err) { | ||
1896 | printk(KERN_WARNING "%s: Unable to enable port while reconfiguring card\n", | ||
1897 | dev->name); | ||
1898 | goto out; | ||
1899 | } | ||
1900 | |||
1901 | out: | ||
1902 | if (err) { | ||
1903 | printk(KERN_WARNING "%s: Resetting instead...\n", dev->name); | ||
1904 | schedule_work(&priv->reset_work); | ||
1905 | err = 0; | ||
1906 | } | ||
1907 | |||
1908 | orinoco_unlock(priv, &flags); | ||
1909 | return err; | ||
1910 | |||
1911 | } | ||
1912 | |||
1913 | /* This must be called from user context, without locks held - use | 1905 | /* This must be called from user context, without locks held - use |
1914 | * schedule_work() */ | 1906 | * schedule_work() */ |
1915 | static void orinoco_reset(struct net_device *dev) | 1907 | static void orinoco_reset(struct net_device *dev) |
1916 | { | 1908 | { |
1917 | struct orinoco_private *priv = netdev_priv(dev); | 1909 | struct orinoco_private *priv = netdev_priv(dev); |
1918 | struct hermes *hw = &priv->hw; | 1910 | struct hermes *hw = &priv->hw; |
1919 | int err = 0; | 1911 | int err; |
1920 | unsigned long flags; | 1912 | unsigned long flags; |
1921 | 1913 | ||
1922 | if (orinoco_lock(priv, &flags) != 0) | 1914 | if (orinoco_lock(priv, &flags) != 0) |
@@ -1938,20 +1930,25 @@ static void orinoco_reset(struct net_device *dev) | |||
1938 | 1930 | ||
1939 | orinoco_unlock(priv, &flags); | 1931 | orinoco_unlock(priv, &flags); |
1940 | 1932 | ||
1941 | if (priv->hard_reset) | 1933 | /* Scanning support: Cleanup of driver struct */ |
1934 | kfree(priv->scan_result); | ||
1935 | priv->scan_result = NULL; | ||
1936 | priv->scan_inprogress = 0; | ||
1937 | |||
1938 | if (priv->hard_reset) { | ||
1942 | err = (*priv->hard_reset)(priv); | 1939 | err = (*priv->hard_reset)(priv); |
1943 | if (err) { | 1940 | if (err) { |
1944 | printk(KERN_ERR "%s: orinoco_reset: Error %d " | 1941 | printk(KERN_ERR "%s: orinoco_reset: Error %d " |
1945 | "performing hard reset\n", dev->name, err); | 1942 | "performing hard reset\n", dev->name, err); |
1946 | /* FIXME: shutdown of some sort */ | 1943 | goto disable; |
1947 | return; | 1944 | } |
1948 | } | 1945 | } |
1949 | 1946 | ||
1950 | err = orinoco_reinit_firmware(dev); | 1947 | err = orinoco_reinit_firmware(dev); |
1951 | if (err) { | 1948 | if (err) { |
1952 | printk(KERN_ERR "%s: orinoco_reset: Error %d re-initializing firmware\n", | 1949 | printk(KERN_ERR "%s: orinoco_reset: Error %d re-initializing firmware\n", |
1953 | dev->name, err); | 1950 | dev->name, err); |
1954 | return; | 1951 | goto disable; |
1955 | } | 1952 | } |
1956 | 1953 | ||
1957 | spin_lock_irq(&priv->lock); /* This has to be called from user context */ | 1954 | spin_lock_irq(&priv->lock); /* This has to be called from user context */ |
@@ -1972,6 +1969,10 @@ static void orinoco_reset(struct net_device *dev) | |||
1972 | spin_unlock_irq(&priv->lock); | 1969 | spin_unlock_irq(&priv->lock); |
1973 | 1970 | ||
1974 | return; | 1971 | return; |
1972 | disable: | ||
1973 | hermes_set_irqmask(hw, 0); | ||
1974 | netif_device_detach(dev); | ||
1975 | printk(KERN_ERR "%s: Device has been disabled!\n", dev->name); | ||
1975 | } | 1976 | } |
1976 | 1977 | ||
1977 | /********************************************************************/ | 1978 | /********************************************************************/ |
@@ -2056,7 +2057,7 @@ irqreturn_t orinoco_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |||
2056 | if (events & HERMES_EV_ALLOC) | 2057 | if (events & HERMES_EV_ALLOC) |
2057 | __orinoco_ev_alloc(dev, hw); | 2058 | __orinoco_ev_alloc(dev, hw); |
2058 | 2059 | ||
2059 | hermes_write_regn(hw, EVACK, events); | 2060 | hermes_write_regn(hw, EVACK, evstat); |
2060 | 2061 | ||
2061 | evstat = hermes_read_regn(hw, EVSTAT); | 2062 | evstat = hermes_read_regn(hw, EVSTAT); |
2062 | events = evstat & hw->inten; | 2063 | events = evstat & hw->inten; |
@@ -2172,6 +2173,8 @@ static int determine_firmware(struct net_device *dev) | |||
2172 | priv->has_mwo = (firmver >= 0x60000); | 2173 | priv->has_mwo = (firmver >= 0x60000); |
2173 | priv->has_pm = (firmver >= 0x40020); /* Don't work in 7.52 ? */ | 2174 | priv->has_pm = (firmver >= 0x40020); /* Don't work in 7.52 ? */ |
2174 | priv->ibss_port = 1; | 2175 | priv->ibss_port = 1; |
2176 | priv->has_hostscan = (firmver >= 0x8000a); | ||
2177 | priv->broken_monitor = (firmver >= 0x80000); | ||
2175 | 2178 | ||
2176 | /* Tested with Agere firmware : | 2179 | /* Tested with Agere firmware : |
2177 | * 1.16 ; 4.08 ; 4.52 ; 6.04 ; 6.16 ; 7.28 => Jean II | 2180 | * 1.16 ; 4.08 ; 4.52 ; 6.04 ; 6.16 ; 7.28 => Jean II |
@@ -2215,6 +2218,10 @@ static int determine_firmware(struct net_device *dev) | |||
2215 | firmver >= 0x31000; | 2218 | firmver >= 0x31000; |
2216 | priv->has_preamble = (firmver >= 0x20000); | 2219 | priv->has_preamble = (firmver >= 0x20000); |
2217 | priv->ibss_port = 4; | 2220 | priv->ibss_port = 4; |
2221 | priv->broken_disableport = (firmver == 0x25013) || | ||
2222 | (firmver >= 0x30000 && firmver <= 0x31000); | ||
2223 | priv->has_hostscan = (firmver >= 0x31001) || | ||
2224 | (firmver >= 0x29057 && firmver < 0x30000); | ||
2218 | /* Tested with Intel firmware : 0x20015 => Jean II */ | 2225 | /* Tested with Intel firmware : 0x20015 => Jean II */ |
2219 | /* Tested with 3Com firmware : 0x15012 & 0x22001 => Jean II */ | 2226 | /* Tested with 3Com firmware : 0x15012 & 0x22001 => Jean II */ |
2220 | break; | 2227 | break; |
@@ -2234,6 +2241,7 @@ static int determine_firmware(struct net_device *dev) | |||
2234 | priv->has_ibss = (firmver >= 0x000700); /* FIXME */ | 2241 | priv->has_ibss = (firmver >= 0x000700); /* FIXME */ |
2235 | priv->has_big_wep = priv->has_wep = (firmver >= 0x000800); | 2242 | priv->has_big_wep = priv->has_wep = (firmver >= 0x000800); |
2236 | priv->has_pm = (firmver >= 0x000700); | 2243 | priv->has_pm = (firmver >= 0x000700); |
2244 | priv->has_hostscan = (firmver >= 0x010301); | ||
2237 | 2245 | ||
2238 | if (firmver >= 0x000800) | 2246 | if (firmver >= 0x000800) |
2239 | priv->ibss_port = 0; | 2247 | priv->ibss_port = 0; |
@@ -2267,7 +2275,7 @@ static int orinoco_init(struct net_device *dev) | |||
2267 | priv->nicbuf_size = IEEE802_11_FRAME_LEN + ETH_HLEN; | 2275 | priv->nicbuf_size = IEEE802_11_FRAME_LEN + ETH_HLEN; |
2268 | 2276 | ||
2269 | /* Initialize the firmware */ | 2277 | /* Initialize the firmware */ |
2270 | err = hermes_init(hw); | 2278 | err = orinoco_reinit_firmware(dev); |
2271 | if (err != 0) { | 2279 | if (err != 0) { |
2272 | printk(KERN_ERR "%s: failed to initialize firmware (err = %d)\n", | 2280 | printk(KERN_ERR "%s: failed to initialize firmware (err = %d)\n", |
2273 | dev->name, err); | 2281 | dev->name, err); |
@@ -2400,31 +2408,12 @@ static int orinoco_init(struct net_device *dev) | |||
2400 | /* By default use IEEE/IBSS ad-hoc mode if we have it */ | 2408 | /* By default use IEEE/IBSS ad-hoc mode if we have it */ |
2401 | priv->prefer_port3 = priv->has_port3 && (! priv->has_ibss); | 2409 | priv->prefer_port3 = priv->has_port3 && (! priv->has_ibss); |
2402 | set_port_type(priv); | 2410 | set_port_type(priv); |
2403 | priv->channel = 10; /* default channel, more-or-less arbitrary */ | 2411 | priv->channel = 0; /* use firmware default */ |
2404 | 2412 | ||
2405 | priv->promiscuous = 0; | 2413 | priv->promiscuous = 0; |
2406 | priv->wep_on = 0; | 2414 | priv->wep_on = 0; |
2407 | priv->tx_key = 0; | 2415 | priv->tx_key = 0; |
2408 | 2416 | ||
2409 | err = hermes_allocate(hw, priv->nicbuf_size, &priv->txfid); | ||
2410 | if (err == -EIO) { | ||
2411 | /* Try workaround for old Symbol firmware bug */ | ||
2412 | printk(KERN_WARNING "%s: firmware ALLOC bug detected " | ||
2413 | "(old Symbol firmware?). Trying to work around... ", | ||
2414 | dev->name); | ||
2415 | |||
2416 | priv->nicbuf_size = TX_NICBUF_SIZE_BUG; | ||
2417 | err = hermes_allocate(hw, priv->nicbuf_size, &priv->txfid); | ||
2418 | if (err) | ||
2419 | printk("failed!\n"); | ||
2420 | else | ||
2421 | printk("ok.\n"); | ||
2422 | } | ||
2423 | if (err) { | ||
2424 | printk("%s: Error %d allocating Tx buffer\n", dev->name, err); | ||
2425 | goto out; | ||
2426 | } | ||
2427 | |||
2428 | /* Make the hardware available, as long as it hasn't been | 2417 | /* Make the hardware available, as long as it hasn't been |
2429 | * removed elsewhere (e.g. by PCMCIA hot unplug) */ | 2418 | * removed elsewhere (e.g. by PCMCIA hot unplug) */ |
2430 | spin_lock_irq(&priv->lock); | 2419 | spin_lock_irq(&priv->lock); |
@@ -2450,7 +2439,7 @@ struct net_device *alloc_orinocodev(int sizeof_card, | |||
2450 | priv = netdev_priv(dev); | 2439 | priv = netdev_priv(dev); |
2451 | priv->ndev = dev; | 2440 | priv->ndev = dev; |
2452 | if (sizeof_card) | 2441 | if (sizeof_card) |
2453 | priv->card = (void *)((unsigned long)netdev_priv(dev) | 2442 | priv->card = (void *)((unsigned long)priv |
2454 | + sizeof(struct orinoco_private)); | 2443 | + sizeof(struct orinoco_private)); |
2455 | else | 2444 | else |
2456 | priv->card = NULL; | 2445 | priv->card = NULL; |
@@ -2461,8 +2450,9 @@ struct net_device *alloc_orinocodev(int sizeof_card, | |||
2461 | dev->tx_timeout = orinoco_tx_timeout; | 2450 | dev->tx_timeout = orinoco_tx_timeout; |
2462 | dev->watchdog_timeo = HZ; /* 1 second timeout */ | 2451 | dev->watchdog_timeo = HZ; /* 1 second timeout */ |
2463 | dev->get_stats = orinoco_get_stats; | 2452 | dev->get_stats = orinoco_get_stats; |
2453 | dev->ethtool_ops = &orinoco_ethtool_ops; | ||
2464 | dev->get_wireless_stats = orinoco_get_wireless_stats; | 2454 | dev->get_wireless_stats = orinoco_get_wireless_stats; |
2465 | dev->do_ioctl = orinoco_ioctl; | 2455 | dev->wireless_handlers = (struct iw_handler_def *)&orinoco_handler_def; |
2466 | dev->change_mtu = orinoco_change_mtu; | 2456 | dev->change_mtu = orinoco_change_mtu; |
2467 | dev->set_multicast_list = orinoco_set_multicast_list; | 2457 | dev->set_multicast_list = orinoco_set_multicast_list; |
2468 | /* we use the default eth_mac_addr for setting the MAC addr */ | 2458 | /* we use the default eth_mac_addr for setting the MAC addr */ |
@@ -2478,6 +2468,8 @@ struct net_device *alloc_orinocodev(int sizeof_card, | |||
2478 | * before anything else touches the | 2468 | * before anything else touches the |
2479 | * hardware */ | 2469 | * hardware */ |
2480 | INIT_WORK(&priv->reset_work, (void (*)(void *))orinoco_reset, dev); | 2470 | INIT_WORK(&priv->reset_work, (void (*)(void *))orinoco_reset, dev); |
2471 | INIT_WORK(&priv->join_work, (void (*)(void *))orinoco_join_ap, dev); | ||
2472 | INIT_WORK(&priv->wevent_work, (void (*)(void *))orinoco_send_wevents, dev); | ||
2481 | 2473 | ||
2482 | netif_carrier_off(dev); | 2474 | netif_carrier_off(dev); |
2483 | priv->last_linkstatus = 0xffff; | 2475 | priv->last_linkstatus = 0xffff; |
@@ -2488,6 +2480,9 @@ struct net_device *alloc_orinocodev(int sizeof_card, | |||
2488 | 2480 | ||
2489 | void free_orinocodev(struct net_device *dev) | 2481 | void free_orinocodev(struct net_device *dev) |
2490 | { | 2482 | { |
2483 | struct orinoco_private *priv = netdev_priv(dev); | ||
2484 | |||
2485 | kfree(priv->scan_result); | ||
2491 | free_netdev(dev); | 2486 | free_netdev(dev); |
2492 | } | 2487 | } |
2493 | 2488 | ||
@@ -2495,24 +2490,6 @@ void free_orinocodev(struct net_device *dev) | |||
2495 | /* Wireless extensions */ | 2490 | /* Wireless extensions */ |
2496 | /********************************************************************/ | 2491 | /********************************************************************/ |
2497 | 2492 | ||
2498 | static int orinoco_hw_get_bssid(struct orinoco_private *priv, | ||
2499 | char buf[ETH_ALEN]) | ||
2500 | { | ||
2501 | hermes_t *hw = &priv->hw; | ||
2502 | int err = 0; | ||
2503 | unsigned long flags; | ||
2504 | |||
2505 | if (orinoco_lock(priv, &flags) != 0) | ||
2506 | return -EBUSY; | ||
2507 | |||
2508 | err = hermes_read_ltv(hw, USER_BAP, HERMES_RID_CURRENTBSSID, | ||
2509 | ETH_ALEN, NULL, buf); | ||
2510 | |||
2511 | orinoco_unlock(priv, &flags); | ||
2512 | |||
2513 | return err; | ||
2514 | } | ||
2515 | |||
2516 | static int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, | 2493 | static int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, |
2517 | char buf[IW_ESSID_MAX_SIZE+1]) | 2494 | char buf[IW_ESSID_MAX_SIZE+1]) |
2518 | { | 2495 | { |
@@ -2555,6 +2532,7 @@ static int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, | |||
2555 | } | 2532 | } |
2556 | 2533 | ||
2557 | len = le16_to_cpu(essidbuf.len); | 2534 | len = le16_to_cpu(essidbuf.len); |
2535 | BUG_ON(len > IW_ESSID_MAX_SIZE); | ||
2558 | 2536 | ||
2559 | memset(buf, 0, IW_ESSID_MAX_SIZE+1); | 2537 | memset(buf, 0, IW_ESSID_MAX_SIZE+1); |
2560 | memcpy(buf, p, len); | 2538 | memcpy(buf, p, len); |
@@ -2637,140 +2615,271 @@ static int orinoco_hw_get_bitratelist(struct orinoco_private *priv, | |||
2637 | return 0; | 2615 | return 0; |
2638 | } | 2616 | } |
2639 | 2617 | ||
2640 | static int orinoco_ioctl_getiwrange(struct net_device *dev, struct iw_point *rrq) | 2618 | static int orinoco_ioctl_getname(struct net_device *dev, |
2619 | struct iw_request_info *info, | ||
2620 | char *name, | ||
2621 | char *extra) | ||
2641 | { | 2622 | { |
2642 | struct orinoco_private *priv = netdev_priv(dev); | 2623 | struct orinoco_private *priv = netdev_priv(dev); |
2643 | int err = 0; | ||
2644 | int mode; | ||
2645 | struct iw_range range; | ||
2646 | int numrates; | 2624 | int numrates; |
2647 | int i, k; | 2625 | int err; |
2626 | |||
2627 | err = orinoco_hw_get_bitratelist(priv, &numrates, NULL, 0); | ||
2628 | |||
2629 | if (!err && (numrates > 2)) | ||
2630 | strcpy(name, "IEEE 802.11b"); | ||
2631 | else | ||
2632 | strcpy(name, "IEEE 802.11-DS"); | ||
2633 | |||
2634 | return 0; | ||
2635 | } | ||
2636 | |||
2637 | static int orinoco_ioctl_setwap(struct net_device *dev, | ||
2638 | struct iw_request_info *info, | ||
2639 | struct sockaddr *ap_addr, | ||
2640 | char *extra) | ||
2641 | { | ||
2642 | struct orinoco_private *priv = netdev_priv(dev); | ||
2643 | int err = -EINPROGRESS; /* Call commit handler */ | ||
2648 | unsigned long flags; | 2644 | unsigned long flags; |
2645 | static const u8 off_addr[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; | ||
2646 | static const u8 any_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; | ||
2649 | 2647 | ||
2650 | TRACE_ENTER(dev->name); | 2648 | if (orinoco_lock(priv, &flags) != 0) |
2649 | return -EBUSY; | ||
2650 | |||
2651 | /* Enable automatic roaming - no sanity checks are needed */ | ||
2652 | if (memcmp(&ap_addr->sa_data, off_addr, ETH_ALEN) == 0 || | ||
2653 | memcmp(&ap_addr->sa_data, any_addr, ETH_ALEN) == 0) { | ||
2654 | priv->bssid_fixed = 0; | ||
2655 | memset(priv->desired_bssid, 0, ETH_ALEN); | ||
2656 | |||
2657 | /* "off" means keep existing connection */ | ||
2658 | if (ap_addr->sa_data[0] == 0) { | ||
2659 | __orinoco_hw_set_wap(priv); | ||
2660 | err = 0; | ||
2661 | } | ||
2662 | goto out; | ||
2663 | } | ||
2664 | |||
2665 | if (priv->firmware_type == FIRMWARE_TYPE_AGERE) { | ||
2666 | printk(KERN_WARNING "%s: Lucent/Agere firmware doesn't " | ||
2667 | "support manual roaming\n", | ||
2668 | dev->name); | ||
2669 | err = -EOPNOTSUPP; | ||
2670 | goto out; | ||
2671 | } | ||
2672 | |||
2673 | if (priv->iw_mode != IW_MODE_INFRA) { | ||
2674 | printk(KERN_WARNING "%s: Manual roaming supported only in " | ||
2675 | "managed mode\n", dev->name); | ||
2676 | err = -EOPNOTSUPP; | ||
2677 | goto out; | ||
2678 | } | ||
2679 | |||
2680 | /* Intersil firmware hangs without Desired ESSID */ | ||
2681 | if (priv->firmware_type == FIRMWARE_TYPE_INTERSIL && | ||
2682 | strlen(priv->desired_essid) == 0) { | ||
2683 | printk(KERN_WARNING "%s: Desired ESSID must be set for " | ||
2684 | "manual roaming\n", dev->name); | ||
2685 | err = -EOPNOTSUPP; | ||
2686 | goto out; | ||
2687 | } | ||
2688 | |||
2689 | /* Finally, enable manual roaming */ | ||
2690 | priv->bssid_fixed = 1; | ||
2691 | memcpy(priv->desired_bssid, &ap_addr->sa_data, ETH_ALEN); | ||
2692 | |||
2693 | out: | ||
2694 | orinoco_unlock(priv, &flags); | ||
2695 | return err; | ||
2696 | } | ||
2651 | 2697 | ||
2652 | if (!access_ok(VERIFY_WRITE, rrq->pointer, sizeof(range))) | 2698 | static int orinoco_ioctl_getwap(struct net_device *dev, |
2653 | return -EFAULT; | 2699 | struct iw_request_info *info, |
2700 | struct sockaddr *ap_addr, | ||
2701 | char *extra) | ||
2702 | { | ||
2703 | struct orinoco_private *priv = netdev_priv(dev); | ||
2654 | 2704 | ||
2655 | rrq->length = sizeof(range); | 2705 | hermes_t *hw = &priv->hw; |
2706 | int err = 0; | ||
2707 | unsigned long flags; | ||
2656 | 2708 | ||
2657 | if (orinoco_lock(priv, &flags) != 0) | 2709 | if (orinoco_lock(priv, &flags) != 0) |
2658 | return -EBUSY; | 2710 | return -EBUSY; |
2659 | 2711 | ||
2660 | mode = priv->iw_mode; | 2712 | ap_addr->sa_family = ARPHRD_ETHER; |
2713 | err = hermes_read_ltv(hw, USER_BAP, HERMES_RID_CURRENTBSSID, | ||
2714 | ETH_ALEN, NULL, ap_addr->sa_data); | ||
2715 | |||
2661 | orinoco_unlock(priv, &flags); | 2716 | orinoco_unlock(priv, &flags); |
2662 | 2717 | ||
2663 | memset(&range, 0, sizeof(range)); | 2718 | return err; |
2719 | } | ||
2664 | 2720 | ||
2665 | /* Much of this shamelessly taken from wvlan_cs.c. No idea | 2721 | static int orinoco_ioctl_setmode(struct net_device *dev, |
2666 | * what it all means -dgibson */ | 2722 | struct iw_request_info *info, |
2667 | range.we_version_compiled = WIRELESS_EXT; | 2723 | u32 *mode, |
2668 | range.we_version_source = 11; | 2724 | char *extra) |
2725 | { | ||
2726 | struct orinoco_private *priv = netdev_priv(dev); | ||
2727 | int err = -EINPROGRESS; /* Call commit handler */ | ||
2728 | unsigned long flags; | ||
2669 | 2729 | ||
2670 | range.min_nwid = range.max_nwid = 0; /* We don't use nwids */ | 2730 | if (priv->iw_mode == *mode) |
2731 | return 0; | ||
2732 | |||
2733 | if (orinoco_lock(priv, &flags) != 0) | ||
2734 | return -EBUSY; | ||
2735 | |||
2736 | switch (*mode) { | ||
2737 | case IW_MODE_ADHOC: | ||
2738 | if (!priv->has_ibss && !priv->has_port3) | ||
2739 | err = -EOPNOTSUPP; | ||
2740 | break; | ||
2741 | |||
2742 | case IW_MODE_INFRA: | ||
2743 | break; | ||
2744 | |||
2745 | case IW_MODE_MONITOR: | ||
2746 | if (priv->broken_monitor && !force_monitor) { | ||
2747 | printk(KERN_WARNING "%s: Monitor mode support is " | ||
2748 | "buggy in this firmware, not enabling\n", | ||
2749 | dev->name); | ||
2750 | err = -EOPNOTSUPP; | ||
2751 | } | ||
2752 | break; | ||
2753 | |||
2754 | default: | ||
2755 | err = -EOPNOTSUPP; | ||
2756 | break; | ||
2757 | } | ||
2758 | |||
2759 | if (err == -EINPROGRESS) { | ||
2760 | priv->iw_mode = *mode; | ||
2761 | set_port_type(priv); | ||
2762 | } | ||
2763 | |||
2764 | orinoco_unlock(priv, &flags); | ||
2765 | |||
2766 | return err; | ||
2767 | } | ||
2768 | |||
2769 | static int orinoco_ioctl_getmode(struct net_device *dev, | ||
2770 | struct iw_request_info *info, | ||
2771 | u32 *mode, | ||
2772 | char *extra) | ||
2773 | { | ||
2774 | struct orinoco_private *priv = netdev_priv(dev); | ||
2775 | |||
2776 | *mode = priv->iw_mode; | ||
2777 | return 0; | ||
2778 | } | ||
2779 | |||
2780 | static int orinoco_ioctl_getiwrange(struct net_device *dev, | ||
2781 | struct iw_request_info *info, | ||
2782 | struct iw_point *rrq, | ||
2783 | char *extra) | ||
2784 | { | ||
2785 | struct orinoco_private *priv = netdev_priv(dev); | ||
2786 | int err = 0; | ||
2787 | struct iw_range *range = (struct iw_range *) extra; | ||
2788 | int numrates; | ||
2789 | int i, k; | ||
2790 | |||
2791 | TRACE_ENTER(dev->name); | ||
2792 | |||
2793 | rrq->length = sizeof(struct iw_range); | ||
2794 | memset(range, 0, sizeof(struct iw_range)); | ||
2795 | |||
2796 | range->we_version_compiled = WIRELESS_EXT; | ||
2797 | range->we_version_source = 14; | ||
2671 | 2798 | ||
2672 | /* Set available channels/frequencies */ | 2799 | /* Set available channels/frequencies */ |
2673 | range.num_channels = NUM_CHANNELS; | 2800 | range->num_channels = NUM_CHANNELS; |
2674 | k = 0; | 2801 | k = 0; |
2675 | for (i = 0; i < NUM_CHANNELS; i++) { | 2802 | for (i = 0; i < NUM_CHANNELS; i++) { |
2676 | if (priv->channel_mask & (1 << i)) { | 2803 | if (priv->channel_mask & (1 << i)) { |
2677 | range.freq[k].i = i + 1; | 2804 | range->freq[k].i = i + 1; |
2678 | range.freq[k].m = channel_frequency[i] * 100000; | 2805 | range->freq[k].m = channel_frequency[i] * 100000; |
2679 | range.freq[k].e = 1; | 2806 | range->freq[k].e = 1; |
2680 | k++; | 2807 | k++; |
2681 | } | 2808 | } |
2682 | 2809 | ||
2683 | if (k >= IW_MAX_FREQUENCIES) | 2810 | if (k >= IW_MAX_FREQUENCIES) |
2684 | break; | 2811 | break; |
2685 | } | 2812 | } |
2686 | range.num_frequency = k; | 2813 | range->num_frequency = k; |
2814 | range->sensitivity = 3; | ||
2687 | 2815 | ||
2688 | range.sensitivity = 3; | 2816 | if (priv->has_wep) { |
2817 | range->max_encoding_tokens = ORINOCO_MAX_KEYS; | ||
2818 | range->encoding_size[0] = SMALL_KEY_SIZE; | ||
2819 | range->num_encoding_sizes = 1; | ||
2820 | |||
2821 | if (priv->has_big_wep) { | ||
2822 | range->encoding_size[1] = LARGE_KEY_SIZE; | ||
2823 | range->num_encoding_sizes = 2; | ||
2824 | } | ||
2825 | } | ||
2689 | 2826 | ||
2690 | if ((mode == IW_MODE_ADHOC) && (priv->spy_number == 0)){ | 2827 | if ((priv->iw_mode == IW_MODE_ADHOC) && (priv->spy_number == 0)){ |
2691 | /* Quality stats meaningless in ad-hoc mode */ | 2828 | /* Quality stats meaningless in ad-hoc mode */ |
2692 | range.max_qual.qual = 0; | ||
2693 | range.max_qual.level = 0; | ||
2694 | range.max_qual.noise = 0; | ||
2695 | range.avg_qual.qual = 0; | ||
2696 | range.avg_qual.level = 0; | ||
2697 | range.avg_qual.noise = 0; | ||
2698 | } else { | 2829 | } else { |
2699 | range.max_qual.qual = 0x8b - 0x2f; | 2830 | range->max_qual.qual = 0x8b - 0x2f; |
2700 | range.max_qual.level = 0x2f - 0x95 - 1; | 2831 | range->max_qual.level = 0x2f - 0x95 - 1; |
2701 | range.max_qual.noise = 0x2f - 0x95 - 1; | 2832 | range->max_qual.noise = 0x2f - 0x95 - 1; |
2702 | /* Need to get better values */ | 2833 | /* Need to get better values */ |
2703 | range.avg_qual.qual = 0x24; | 2834 | range->avg_qual.qual = 0x24; |
2704 | range.avg_qual.level = 0xC2; | 2835 | range->avg_qual.level = 0xC2; |
2705 | range.avg_qual.noise = 0x9E; | 2836 | range->avg_qual.noise = 0x9E; |
2706 | } | 2837 | } |
2707 | 2838 | ||
2708 | err = orinoco_hw_get_bitratelist(priv, &numrates, | 2839 | err = orinoco_hw_get_bitratelist(priv, &numrates, |
2709 | range.bitrate, IW_MAX_BITRATES); | 2840 | range->bitrate, IW_MAX_BITRATES); |
2710 | if (err) | 2841 | if (err) |
2711 | return err; | 2842 | return err; |
2712 | range.num_bitrates = numrates; | 2843 | range->num_bitrates = numrates; |
2713 | 2844 | ||
2714 | /* Set an indication of the max TCP throughput in bit/s that we can | 2845 | /* Set an indication of the max TCP throughput in bit/s that we can |
2715 | * expect using this interface. May be use for QoS stuff... | 2846 | * expect using this interface. May be use for QoS stuff... |
2716 | * Jean II */ | 2847 | * Jean II */ |
2717 | if(numrates > 2) | 2848 | if (numrates > 2) |
2718 | range.throughput = 5 * 1000 * 1000; /* ~5 Mb/s */ | 2849 | range->throughput = 5 * 1000 * 1000; /* ~5 Mb/s */ |
2719 | else | 2850 | else |
2720 | range.throughput = 1.5 * 1000 * 1000; /* ~1.5 Mb/s */ | 2851 | range->throughput = 1.5 * 1000 * 1000; /* ~1.5 Mb/s */ |
2721 | 2852 | ||
2722 | range.min_rts = 0; | 2853 | range->min_rts = 0; |
2723 | range.max_rts = 2347; | 2854 | range->max_rts = 2347; |
2724 | range.min_frag = 256; | 2855 | range->min_frag = 256; |
2725 | range.max_frag = 2346; | 2856 | range->max_frag = 2346; |
2726 | 2857 | ||
2727 | if (orinoco_lock(priv, &flags) != 0) | 2858 | range->min_pmp = 0; |
2728 | return -EBUSY; | 2859 | range->max_pmp = 65535000; |
2729 | if (priv->has_wep) { | 2860 | range->min_pmt = 0; |
2730 | range.max_encoding_tokens = ORINOCO_MAX_KEYS; | 2861 | range->max_pmt = 65535 * 1000; /* ??? */ |
2731 | 2862 | range->pmp_flags = IW_POWER_PERIOD; | |
2732 | range.encoding_size[0] = SMALL_KEY_SIZE; | 2863 | range->pmt_flags = IW_POWER_TIMEOUT; |
2733 | range.num_encoding_sizes = 1; | 2864 | range->pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_UNICAST_R; |
2734 | 2865 | ||
2735 | if (priv->has_big_wep) { | 2866 | range->retry_capa = IW_RETRY_LIMIT | IW_RETRY_LIFETIME; |
2736 | range.encoding_size[1] = LARGE_KEY_SIZE; | 2867 | range->retry_flags = IW_RETRY_LIMIT; |
2737 | range.num_encoding_sizes = 2; | 2868 | range->r_time_flags = IW_RETRY_LIFETIME; |
2738 | } | 2869 | range->min_retry = 0; |
2739 | } else { | 2870 | range->max_retry = 65535; /* ??? */ |
2740 | range.num_encoding_sizes = 0; | 2871 | range->min_r_time = 0; |
2741 | range.max_encoding_tokens = 0; | 2872 | range->max_r_time = 65535 * 1000; /* ??? */ |
2742 | } | ||
2743 | orinoco_unlock(priv, &flags); | ||
2744 | |||
2745 | range.min_pmp = 0; | ||
2746 | range.max_pmp = 65535000; | ||
2747 | range.min_pmt = 0; | ||
2748 | range.max_pmt = 65535 * 1000; /* ??? */ | ||
2749 | range.pmp_flags = IW_POWER_PERIOD; | ||
2750 | range.pmt_flags = IW_POWER_TIMEOUT; | ||
2751 | range.pm_capa = IW_POWER_PERIOD | IW_POWER_TIMEOUT | IW_POWER_UNICAST_R; | ||
2752 | |||
2753 | range.num_txpower = 1; | ||
2754 | range.txpower[0] = 15; /* 15dBm */ | ||
2755 | range.txpower_capa = IW_TXPOW_DBM; | ||
2756 | |||
2757 | range.retry_capa = IW_RETRY_LIMIT | IW_RETRY_LIFETIME; | ||
2758 | range.retry_flags = IW_RETRY_LIMIT; | ||
2759 | range.r_time_flags = IW_RETRY_LIFETIME; | ||
2760 | range.min_retry = 0; | ||
2761 | range.max_retry = 65535; /* ??? */ | ||
2762 | range.min_r_time = 0; | ||
2763 | range.max_r_time = 65535 * 1000; /* ??? */ | ||
2764 | |||
2765 | if (copy_to_user(rrq->pointer, &range, sizeof(range))) | ||
2766 | return -EFAULT; | ||
2767 | 2873 | ||
2768 | TRACE_EXIT(dev->name); | 2874 | TRACE_EXIT(dev->name); |
2769 | 2875 | ||
2770 | return 0; | 2876 | return 0; |
2771 | } | 2877 | } |
2772 | 2878 | ||
2773 | static int orinoco_ioctl_setiwencode(struct net_device *dev, struct iw_point *erq) | 2879 | static int orinoco_ioctl_setiwencode(struct net_device *dev, |
2880 | struct iw_request_info *info, | ||
2881 | struct iw_point *erq, | ||
2882 | char *keybuf) | ||
2774 | { | 2883 | { |
2775 | struct orinoco_private *priv = netdev_priv(dev); | 2884 | struct orinoco_private *priv = netdev_priv(dev); |
2776 | int index = (erq->flags & IW_ENCODE_INDEX) - 1; | 2885 | int index = (erq->flags & IW_ENCODE_INDEX) - 1; |
@@ -2778,8 +2887,7 @@ static int orinoco_ioctl_setiwencode(struct net_device *dev, struct iw_point *er | |||
2778 | int enable = priv->wep_on; | 2887 | int enable = priv->wep_on; |
2779 | int restricted = priv->wep_restrict; | 2888 | int restricted = priv->wep_restrict; |
2780 | u16 xlen = 0; | 2889 | u16 xlen = 0; |
2781 | int err = 0; | 2890 | int err = -EINPROGRESS; /* Call commit handler */ |
2782 | char keybuf[ORINOCO_MAX_KEY_SIZE]; | ||
2783 | unsigned long flags; | 2891 | unsigned long flags; |
2784 | 2892 | ||
2785 | if (! priv->has_wep) | 2893 | if (! priv->has_wep) |
@@ -2792,9 +2900,6 @@ static int orinoco_ioctl_setiwencode(struct net_device *dev, struct iw_point *er | |||
2792 | 2900 | ||
2793 | if ( (erq->length > SMALL_KEY_SIZE) && !priv->has_big_wep ) | 2901 | if ( (erq->length > SMALL_KEY_SIZE) && !priv->has_big_wep ) |
2794 | return -E2BIG; | 2902 | return -E2BIG; |
2795 | |||
2796 | if (copy_from_user(keybuf, erq->pointer, erq->length)) | ||
2797 | return -EFAULT; | ||
2798 | } | 2903 | } |
2799 | 2904 | ||
2800 | if (orinoco_lock(priv, &flags) != 0) | 2905 | if (orinoco_lock(priv, &flags) != 0) |
@@ -2868,12 +2973,14 @@ static int orinoco_ioctl_setiwencode(struct net_device *dev, struct iw_point *er | |||
2868 | return err; | 2973 | return err; |
2869 | } | 2974 | } |
2870 | 2975 | ||
2871 | static int orinoco_ioctl_getiwencode(struct net_device *dev, struct iw_point *erq) | 2976 | static int orinoco_ioctl_getiwencode(struct net_device *dev, |
2977 | struct iw_request_info *info, | ||
2978 | struct iw_point *erq, | ||
2979 | char *keybuf) | ||
2872 | { | 2980 | { |
2873 | struct orinoco_private *priv = netdev_priv(dev); | 2981 | struct orinoco_private *priv = netdev_priv(dev); |
2874 | int index = (erq->flags & IW_ENCODE_INDEX) - 1; | 2982 | int index = (erq->flags & IW_ENCODE_INDEX) - 1; |
2875 | u16 xlen = 0; | 2983 | u16 xlen = 0; |
2876 | char keybuf[ORINOCO_MAX_KEY_SIZE]; | ||
2877 | unsigned long flags; | 2984 | unsigned long flags; |
2878 | 2985 | ||
2879 | if (! priv->has_wep) | 2986 | if (! priv->has_wep) |
@@ -2902,50 +3009,47 @@ static int orinoco_ioctl_getiwencode(struct net_device *dev, struct iw_point *er | |||
2902 | memcpy(keybuf, priv->keys[index].data, ORINOCO_MAX_KEY_SIZE); | 3009 | memcpy(keybuf, priv->keys[index].data, ORINOCO_MAX_KEY_SIZE); |
2903 | 3010 | ||
2904 | orinoco_unlock(priv, &flags); | 3011 | orinoco_unlock(priv, &flags); |
2905 | |||
2906 | if (erq->pointer) { | ||
2907 | if (copy_to_user(erq->pointer, keybuf, xlen)) | ||
2908 | return -EFAULT; | ||
2909 | } | ||
2910 | |||
2911 | return 0; | 3012 | return 0; |
2912 | } | 3013 | } |
2913 | 3014 | ||
2914 | static int orinoco_ioctl_setessid(struct net_device *dev, struct iw_point *erq) | 3015 | static int orinoco_ioctl_setessid(struct net_device *dev, |
3016 | struct iw_request_info *info, | ||
3017 | struct iw_point *erq, | ||
3018 | char *essidbuf) | ||
2915 | { | 3019 | { |
2916 | struct orinoco_private *priv = netdev_priv(dev); | 3020 | struct orinoco_private *priv = netdev_priv(dev); |
2917 | char essidbuf[IW_ESSID_MAX_SIZE+1]; | ||
2918 | unsigned long flags; | 3021 | unsigned long flags; |
2919 | 3022 | ||
2920 | /* Note : ESSID is ignored in Ad-Hoc demo mode, but we can set it | 3023 | /* Note : ESSID is ignored in Ad-Hoc demo mode, but we can set it |
2921 | * anyway... - Jean II */ | 3024 | * anyway... - Jean II */ |
2922 | 3025 | ||
2923 | memset(&essidbuf, 0, sizeof(essidbuf)); | 3026 | /* Hum... Should not use Wireless Extension constant (may change), |
2924 | 3027 | * should use our own... - Jean II */ | |
2925 | if (erq->flags) { | 3028 | if (erq->length > IW_ESSID_MAX_SIZE) |
2926 | if (erq->length > IW_ESSID_MAX_SIZE) | 3029 | return -E2BIG; |
2927 | return -E2BIG; | ||
2928 | |||
2929 | if (copy_from_user(&essidbuf, erq->pointer, erq->length)) | ||
2930 | return -EFAULT; | ||
2931 | |||
2932 | essidbuf[erq->length] = '\0'; | ||
2933 | } | ||
2934 | 3030 | ||
2935 | if (orinoco_lock(priv, &flags) != 0) | 3031 | if (orinoco_lock(priv, &flags) != 0) |
2936 | return -EBUSY; | 3032 | return -EBUSY; |
2937 | 3033 | ||
2938 | memcpy(priv->desired_essid, essidbuf, sizeof(priv->desired_essid)); | 3034 | /* NULL the string (for NULL termination & ESSID = ANY) - Jean II */ |
3035 | memset(priv->desired_essid, 0, sizeof(priv->desired_essid)); | ||
3036 | |||
3037 | /* If not ANY, get the new ESSID */ | ||
3038 | if (erq->flags) { | ||
3039 | memcpy(priv->desired_essid, essidbuf, erq->length); | ||
3040 | } | ||
2939 | 3041 | ||
2940 | orinoco_unlock(priv, &flags); | 3042 | orinoco_unlock(priv, &flags); |
2941 | 3043 | ||
2942 | return 0; | 3044 | return -EINPROGRESS; /* Call commit handler */ |
2943 | } | 3045 | } |
2944 | 3046 | ||
2945 | static int orinoco_ioctl_getessid(struct net_device *dev, struct iw_point *erq) | 3047 | static int orinoco_ioctl_getessid(struct net_device *dev, |
3048 | struct iw_request_info *info, | ||
3049 | struct iw_point *erq, | ||
3050 | char *essidbuf) | ||
2946 | { | 3051 | { |
2947 | struct orinoco_private *priv = netdev_priv(dev); | 3052 | struct orinoco_private *priv = netdev_priv(dev); |
2948 | char essidbuf[IW_ESSID_MAX_SIZE+1]; | ||
2949 | int active; | 3053 | int active; |
2950 | int err = 0; | 3054 | int err = 0; |
2951 | unsigned long flags; | 3055 | unsigned long flags; |
@@ -2959,51 +3063,46 @@ static int orinoco_ioctl_getessid(struct net_device *dev, struct iw_point *erq) | |||
2959 | } else { | 3063 | } else { |
2960 | if (orinoco_lock(priv, &flags) != 0) | 3064 | if (orinoco_lock(priv, &flags) != 0) |
2961 | return -EBUSY; | 3065 | return -EBUSY; |
2962 | memcpy(essidbuf, priv->desired_essid, sizeof(essidbuf)); | 3066 | memcpy(essidbuf, priv->desired_essid, IW_ESSID_MAX_SIZE + 1); |
2963 | orinoco_unlock(priv, &flags); | 3067 | orinoco_unlock(priv, &flags); |
2964 | } | 3068 | } |
2965 | 3069 | ||
2966 | erq->flags = 1; | 3070 | erq->flags = 1; |
2967 | erq->length = strlen(essidbuf) + 1; | 3071 | erq->length = strlen(essidbuf) + 1; |
2968 | if (erq->pointer) | ||
2969 | if (copy_to_user(erq->pointer, essidbuf, erq->length)) | ||
2970 | return -EFAULT; | ||
2971 | 3072 | ||
2972 | TRACE_EXIT(dev->name); | 3073 | TRACE_EXIT(dev->name); |
2973 | 3074 | ||
2974 | return 0; | 3075 | return 0; |
2975 | } | 3076 | } |
2976 | 3077 | ||
2977 | static int orinoco_ioctl_setnick(struct net_device *dev, struct iw_point *nrq) | 3078 | static int orinoco_ioctl_setnick(struct net_device *dev, |
3079 | struct iw_request_info *info, | ||
3080 | struct iw_point *nrq, | ||
3081 | char *nickbuf) | ||
2978 | { | 3082 | { |
2979 | struct orinoco_private *priv = netdev_priv(dev); | 3083 | struct orinoco_private *priv = netdev_priv(dev); |
2980 | char nickbuf[IW_ESSID_MAX_SIZE+1]; | ||
2981 | unsigned long flags; | 3084 | unsigned long flags; |
2982 | 3085 | ||
2983 | if (nrq->length > IW_ESSID_MAX_SIZE) | 3086 | if (nrq->length > IW_ESSID_MAX_SIZE) |
2984 | return -E2BIG; | 3087 | return -E2BIG; |
2985 | 3088 | ||
2986 | memset(nickbuf, 0, sizeof(nickbuf)); | ||
2987 | |||
2988 | if (copy_from_user(nickbuf, nrq->pointer, nrq->length)) | ||
2989 | return -EFAULT; | ||
2990 | |||
2991 | nickbuf[nrq->length] = '\0'; | ||
2992 | |||
2993 | if (orinoco_lock(priv, &flags) != 0) | 3089 | if (orinoco_lock(priv, &flags) != 0) |
2994 | return -EBUSY; | 3090 | return -EBUSY; |
2995 | 3091 | ||
2996 | memcpy(priv->nick, nickbuf, sizeof(priv->nick)); | 3092 | memset(priv->nick, 0, sizeof(priv->nick)); |
3093 | memcpy(priv->nick, nickbuf, nrq->length); | ||
2997 | 3094 | ||
2998 | orinoco_unlock(priv, &flags); | 3095 | orinoco_unlock(priv, &flags); |
2999 | 3096 | ||
3000 | return 0; | 3097 | return -EINPROGRESS; /* Call commit handler */ |
3001 | } | 3098 | } |
3002 | 3099 | ||
3003 | static int orinoco_ioctl_getnick(struct net_device *dev, struct iw_point *nrq) | 3100 | static int orinoco_ioctl_getnick(struct net_device *dev, |
3101 | struct iw_request_info *info, | ||
3102 | struct iw_point *nrq, | ||
3103 | char *nickbuf) | ||
3004 | { | 3104 | { |
3005 | struct orinoco_private *priv = netdev_priv(dev); | 3105 | struct orinoco_private *priv = netdev_priv(dev); |
3006 | char nickbuf[IW_ESSID_MAX_SIZE+1]; | ||
3007 | unsigned long flags; | 3106 | unsigned long flags; |
3008 | 3107 | ||
3009 | if (orinoco_lock(priv, &flags) != 0) | 3108 | if (orinoco_lock(priv, &flags) != 0) |
@@ -3014,23 +3113,22 @@ static int orinoco_ioctl_getnick(struct net_device *dev, struct iw_point *nrq) | |||
3014 | 3113 | ||
3015 | nrq->length = strlen(nickbuf)+1; | 3114 | nrq->length = strlen(nickbuf)+1; |
3016 | 3115 | ||
3017 | if (copy_to_user(nrq->pointer, nickbuf, sizeof(nickbuf))) | ||
3018 | return -EFAULT; | ||
3019 | |||
3020 | return 0; | 3116 | return 0; |
3021 | } | 3117 | } |
3022 | 3118 | ||
3023 | static int orinoco_ioctl_setfreq(struct net_device *dev, struct iw_freq *frq) | 3119 | static int orinoco_ioctl_setfreq(struct net_device *dev, |
3120 | struct iw_request_info *info, | ||
3121 | struct iw_freq *frq, | ||
3122 | char *extra) | ||
3024 | { | 3123 | { |
3025 | struct orinoco_private *priv = netdev_priv(dev); | 3124 | struct orinoco_private *priv = netdev_priv(dev); |
3026 | int chan = -1; | 3125 | int chan = -1; |
3027 | unsigned long flags; | 3126 | unsigned long flags; |
3127 | int err = -EINPROGRESS; /* Call commit handler */ | ||
3028 | 3128 | ||
3029 | /* We can only use this in Ad-Hoc demo mode to set the operating | 3129 | /* In infrastructure mode the AP sets the channel */ |
3030 | * frequency, or in IBSS mode to set the frequency where the IBSS | 3130 | if (priv->iw_mode == IW_MODE_INFRA) |
3031 | * will be created - Jean II */ | 3131 | return -EBUSY; |
3032 | if (priv->iw_mode != IW_MODE_ADHOC) | ||
3033 | return -EOPNOTSUPP; | ||
3034 | 3132 | ||
3035 | if ( (frq->e == 0) && (frq->m <= 1000) ) { | 3133 | if ( (frq->e == 0) && (frq->m <= 1000) ) { |
3036 | /* Setting by channel number */ | 3134 | /* Setting by channel number */ |
@@ -3054,13 +3152,44 @@ static int orinoco_ioctl_setfreq(struct net_device *dev, struct iw_freq *frq) | |||
3054 | 3152 | ||
3055 | if (orinoco_lock(priv, &flags) != 0) | 3153 | if (orinoco_lock(priv, &flags) != 0) |
3056 | return -EBUSY; | 3154 | return -EBUSY; |
3155 | |||
3057 | priv->channel = chan; | 3156 | priv->channel = chan; |
3157 | if (priv->iw_mode == IW_MODE_MONITOR) { | ||
3158 | /* Fast channel change - no commit if successful */ | ||
3159 | hermes_t *hw = &priv->hw; | ||
3160 | err = hermes_docmd_wait(hw, HERMES_CMD_TEST | | ||
3161 | HERMES_TEST_SET_CHANNEL, | ||
3162 | chan, NULL); | ||
3163 | } | ||
3058 | orinoco_unlock(priv, &flags); | 3164 | orinoco_unlock(priv, &flags); |
3059 | 3165 | ||
3166 | return err; | ||
3167 | } | ||
3168 | |||
3169 | static int orinoco_ioctl_getfreq(struct net_device *dev, | ||
3170 | struct iw_request_info *info, | ||
3171 | struct iw_freq *frq, | ||
3172 | char *extra) | ||
3173 | { | ||
3174 | struct orinoco_private *priv = netdev_priv(dev); | ||
3175 | int tmp; | ||
3176 | |||
3177 | /* Locking done in there */ | ||
3178 | tmp = orinoco_hw_get_freq(priv); | ||
3179 | if (tmp < 0) { | ||
3180 | return tmp; | ||
3181 | } | ||
3182 | |||
3183 | frq->m = tmp; | ||
3184 | frq->e = 1; | ||
3185 | |||
3060 | return 0; | 3186 | return 0; |
3061 | } | 3187 | } |
3062 | 3188 | ||
3063 | static int orinoco_ioctl_getsens(struct net_device *dev, struct iw_param *srq) | 3189 | static int orinoco_ioctl_getsens(struct net_device *dev, |
3190 | struct iw_request_info *info, | ||
3191 | struct iw_param *srq, | ||
3192 | char *extra) | ||
3064 | { | 3193 | { |
3065 | struct orinoco_private *priv = netdev_priv(dev); | 3194 | struct orinoco_private *priv = netdev_priv(dev); |
3066 | hermes_t *hw = &priv->hw; | 3195 | hermes_t *hw = &priv->hw; |
@@ -3086,7 +3215,10 @@ static int orinoco_ioctl_getsens(struct net_device *dev, struct iw_param *srq) | |||
3086 | return 0; | 3215 | return 0; |
3087 | } | 3216 | } |
3088 | 3217 | ||
3089 | static int orinoco_ioctl_setsens(struct net_device *dev, struct iw_param *srq) | 3218 | static int orinoco_ioctl_setsens(struct net_device *dev, |
3219 | struct iw_request_info *info, | ||
3220 | struct iw_param *srq, | ||
3221 | char *extra) | ||
3090 | { | 3222 | { |
3091 | struct orinoco_private *priv = netdev_priv(dev); | 3223 | struct orinoco_private *priv = netdev_priv(dev); |
3092 | int val = srq->value; | 3224 | int val = srq->value; |
@@ -3103,10 +3235,13 @@ static int orinoco_ioctl_setsens(struct net_device *dev, struct iw_param *srq) | |||
3103 | priv->ap_density = val; | 3235 | priv->ap_density = val; |
3104 | orinoco_unlock(priv, &flags); | 3236 | orinoco_unlock(priv, &flags); |
3105 | 3237 | ||
3106 | return 0; | 3238 | return -EINPROGRESS; /* Call commit handler */ |
3107 | } | 3239 | } |
3108 | 3240 | ||
3109 | static int orinoco_ioctl_setrts(struct net_device *dev, struct iw_param *rrq) | 3241 | static int orinoco_ioctl_setrts(struct net_device *dev, |
3242 | struct iw_request_info *info, | ||
3243 | struct iw_param *rrq, | ||
3244 | char *extra) | ||
3110 | { | 3245 | { |
3111 | struct orinoco_private *priv = netdev_priv(dev); | 3246 | struct orinoco_private *priv = netdev_priv(dev); |
3112 | int val = rrq->value; | 3247 | int val = rrq->value; |
@@ -3124,13 +3259,30 @@ static int orinoco_ioctl_setrts(struct net_device *dev, struct iw_param *rrq) | |||
3124 | priv->rts_thresh = val; | 3259 | priv->rts_thresh = val; |
3125 | orinoco_unlock(priv, &flags); | 3260 | orinoco_unlock(priv, &flags); |
3126 | 3261 | ||
3262 | return -EINPROGRESS; /* Call commit handler */ | ||
3263 | } | ||
3264 | |||
3265 | static int orinoco_ioctl_getrts(struct net_device *dev, | ||
3266 | struct iw_request_info *info, | ||
3267 | struct iw_param *rrq, | ||
3268 | char *extra) | ||
3269 | { | ||
3270 | struct orinoco_private *priv = netdev_priv(dev); | ||
3271 | |||
3272 | rrq->value = priv->rts_thresh; | ||
3273 | rrq->disabled = (rrq->value == 2347); | ||
3274 | rrq->fixed = 1; | ||
3275 | |||
3127 | return 0; | 3276 | return 0; |
3128 | } | 3277 | } |
3129 | 3278 | ||
3130 | static int orinoco_ioctl_setfrag(struct net_device *dev, struct iw_param *frq) | 3279 | static int orinoco_ioctl_setfrag(struct net_device *dev, |
3280 | struct iw_request_info *info, | ||
3281 | struct iw_param *frq, | ||
3282 | char *extra) | ||
3131 | { | 3283 | { |
3132 | struct orinoco_private *priv = netdev_priv(dev); | 3284 | struct orinoco_private *priv = netdev_priv(dev); |
3133 | int err = 0; | 3285 | int err = -EINPROGRESS; /* Call commit handler */ |
3134 | unsigned long flags; | 3286 | unsigned long flags; |
3135 | 3287 | ||
3136 | if (orinoco_lock(priv, &flags) != 0) | 3288 | if (orinoco_lock(priv, &flags) != 0) |
@@ -3162,11 +3314,14 @@ static int orinoco_ioctl_setfrag(struct net_device *dev, struct iw_param *frq) | |||
3162 | return err; | 3314 | return err; |
3163 | } | 3315 | } |
3164 | 3316 | ||
3165 | static int orinoco_ioctl_getfrag(struct net_device *dev, struct iw_param *frq) | 3317 | static int orinoco_ioctl_getfrag(struct net_device *dev, |
3318 | struct iw_request_info *info, | ||
3319 | struct iw_param *frq, | ||
3320 | char *extra) | ||
3166 | { | 3321 | { |
3167 | struct orinoco_private *priv = netdev_priv(dev); | 3322 | struct orinoco_private *priv = netdev_priv(dev); |
3168 | hermes_t *hw = &priv->hw; | 3323 | hermes_t *hw = &priv->hw; |
3169 | int err = 0; | 3324 | int err; |
3170 | u16 val; | 3325 | u16 val; |
3171 | unsigned long flags; | 3326 | unsigned long flags; |
3172 | 3327 | ||
@@ -3199,10 +3354,12 @@ static int orinoco_ioctl_getfrag(struct net_device *dev, struct iw_param *frq) | |||
3199 | return err; | 3354 | return err; |
3200 | } | 3355 | } |
3201 | 3356 | ||
3202 | static int orinoco_ioctl_setrate(struct net_device *dev, struct iw_param *rrq) | 3357 | static int orinoco_ioctl_setrate(struct net_device *dev, |
3358 | struct iw_request_info *info, | ||
3359 | struct iw_param *rrq, | ||
3360 | char *extra) | ||
3203 | { | 3361 | { |
3204 | struct orinoco_private *priv = netdev_priv(dev); | 3362 | struct orinoco_private *priv = netdev_priv(dev); |
3205 | int err = 0; | ||
3206 | int ratemode = -1; | 3363 | int ratemode = -1; |
3207 | int bitrate; /* 100s of kilobits */ | 3364 | int bitrate; /* 100s of kilobits */ |
3208 | int i; | 3365 | int i; |
@@ -3238,10 +3395,13 @@ static int orinoco_ioctl_setrate(struct net_device *dev, struct iw_param *rrq) | |||
3238 | priv->bitratemode = ratemode; | 3395 | priv->bitratemode = ratemode; |
3239 | orinoco_unlock(priv, &flags); | 3396 | orinoco_unlock(priv, &flags); |
3240 | 3397 | ||
3241 | return err; | 3398 | return -EINPROGRESS; |
3242 | } | 3399 | } |
3243 | 3400 | ||
3244 | static int orinoco_ioctl_getrate(struct net_device *dev, struct iw_param *rrq) | 3401 | static int orinoco_ioctl_getrate(struct net_device *dev, |
3402 | struct iw_request_info *info, | ||
3403 | struct iw_param *rrq, | ||
3404 | char *extra) | ||
3245 | { | 3405 | { |
3246 | struct orinoco_private *priv = netdev_priv(dev); | 3406 | struct orinoco_private *priv = netdev_priv(dev); |
3247 | hermes_t *hw = &priv->hw; | 3407 | hermes_t *hw = &priv->hw; |
@@ -3306,10 +3466,13 @@ static int orinoco_ioctl_getrate(struct net_device *dev, struct iw_param *rrq) | |||
3306 | return err; | 3466 | return err; |
3307 | } | 3467 | } |
3308 | 3468 | ||
3309 | static int orinoco_ioctl_setpower(struct net_device *dev, struct iw_param *prq) | 3469 | static int orinoco_ioctl_setpower(struct net_device *dev, |
3470 | struct iw_request_info *info, | ||
3471 | struct iw_param *prq, | ||
3472 | char *extra) | ||
3310 | { | 3473 | { |
3311 | struct orinoco_private *priv = netdev_priv(dev); | 3474 | struct orinoco_private *priv = netdev_priv(dev); |
3312 | int err = 0; | 3475 | int err = -EINPROGRESS; /* Call commit handler */ |
3313 | unsigned long flags; | 3476 | unsigned long flags; |
3314 | 3477 | ||
3315 | if (orinoco_lock(priv, &flags) != 0) | 3478 | if (orinoco_lock(priv, &flags) != 0) |
@@ -3358,7 +3521,10 @@ static int orinoco_ioctl_setpower(struct net_device *dev, struct iw_param *prq) | |||
3358 | return err; | 3521 | return err; |
3359 | } | 3522 | } |
3360 | 3523 | ||
3361 | static int orinoco_ioctl_getpower(struct net_device *dev, struct iw_param *prq) | 3524 | static int orinoco_ioctl_getpower(struct net_device *dev, |
3525 | struct iw_request_info *info, | ||
3526 | struct iw_param *prq, | ||
3527 | char *extra) | ||
3362 | { | 3528 | { |
3363 | struct orinoco_private *priv = netdev_priv(dev); | 3529 | struct orinoco_private *priv = netdev_priv(dev); |
3364 | hermes_t *hw = &priv->hw; | 3530 | hermes_t *hw = &priv->hw; |
@@ -3406,7 +3572,10 @@ static int orinoco_ioctl_getpower(struct net_device *dev, struct iw_param *prq) | |||
3406 | return err; | 3572 | return err; |
3407 | } | 3573 | } |
3408 | 3574 | ||
3409 | static int orinoco_ioctl_getretry(struct net_device *dev, struct iw_param *rrq) | 3575 | static int orinoco_ioctl_getretry(struct net_device *dev, |
3576 | struct iw_request_info *info, | ||
3577 | struct iw_param *rrq, | ||
3578 | char *extra) | ||
3410 | { | 3579 | { |
3411 | struct orinoco_private *priv = netdev_priv(dev); | 3580 | struct orinoco_private *priv = netdev_priv(dev); |
3412 | hermes_t *hw = &priv->hw; | 3581 | hermes_t *hw = &priv->hw; |
@@ -3457,10 +3626,38 @@ static int orinoco_ioctl_getretry(struct net_device *dev, struct iw_param *rrq) | |||
3457 | return err; | 3626 | return err; |
3458 | } | 3627 | } |
3459 | 3628 | ||
3460 | static int orinoco_ioctl_setibssport(struct net_device *dev, struct iwreq *wrq) | 3629 | static int orinoco_ioctl_reset(struct net_device *dev, |
3630 | struct iw_request_info *info, | ||
3631 | void *wrqu, | ||
3632 | char *extra) | ||
3633 | { | ||
3634 | struct orinoco_private *priv = netdev_priv(dev); | ||
3635 | |||
3636 | if (! capable(CAP_NET_ADMIN)) | ||
3637 | return -EPERM; | ||
3638 | |||
3639 | if (info->cmd == (SIOCIWFIRSTPRIV + 0x1)) { | ||
3640 | printk(KERN_DEBUG "%s: Forcing reset!\n", dev->name); | ||
3641 | |||
3642 | /* Firmware reset */ | ||
3643 | orinoco_reset(dev); | ||
3644 | } else { | ||
3645 | printk(KERN_DEBUG "%s: Force scheduling reset!\n", dev->name); | ||
3646 | |||
3647 | schedule_work(&priv->reset_work); | ||
3648 | } | ||
3649 | |||
3650 | return 0; | ||
3651 | } | ||
3652 | |||
3653 | static int orinoco_ioctl_setibssport(struct net_device *dev, | ||
3654 | struct iw_request_info *info, | ||
3655 | void *wrqu, | ||
3656 | char *extra) | ||
3657 | |||
3461 | { | 3658 | { |
3462 | struct orinoco_private *priv = netdev_priv(dev); | 3659 | struct orinoco_private *priv = netdev_priv(dev); |
3463 | int val = *( (int *) wrq->u.name ); | 3660 | int val = *( (int *) extra ); |
3464 | unsigned long flags; | 3661 | unsigned long flags; |
3465 | 3662 | ||
3466 | if (orinoco_lock(priv, &flags) != 0) | 3663 | if (orinoco_lock(priv, &flags) != 0) |
@@ -3472,28 +3669,28 @@ static int orinoco_ioctl_setibssport(struct net_device *dev, struct iwreq *wrq) | |||
3472 | set_port_type(priv); | 3669 | set_port_type(priv); |
3473 | 3670 | ||
3474 | orinoco_unlock(priv, &flags); | 3671 | orinoco_unlock(priv, &flags); |
3475 | return 0; | 3672 | return -EINPROGRESS; /* Call commit handler */ |
3476 | } | 3673 | } |
3477 | 3674 | ||
3478 | static int orinoco_ioctl_getibssport(struct net_device *dev, struct iwreq *wrq) | 3675 | static int orinoco_ioctl_getibssport(struct net_device *dev, |
3676 | struct iw_request_info *info, | ||
3677 | void *wrqu, | ||
3678 | char *extra) | ||
3479 | { | 3679 | { |
3480 | struct orinoco_private *priv = netdev_priv(dev); | 3680 | struct orinoco_private *priv = netdev_priv(dev); |
3481 | int *val = (int *)wrq->u.name; | 3681 | int *val = (int *) extra; |
3482 | unsigned long flags; | ||
3483 | |||
3484 | if (orinoco_lock(priv, &flags) != 0) | ||
3485 | return -EBUSY; | ||
3486 | 3682 | ||
3487 | *val = priv->ibss_port; | 3683 | *val = priv->ibss_port; |
3488 | orinoco_unlock(priv, &flags); | ||
3489 | |||
3490 | return 0; | 3684 | return 0; |
3491 | } | 3685 | } |
3492 | 3686 | ||
3493 | static int orinoco_ioctl_setport3(struct net_device *dev, struct iwreq *wrq) | 3687 | static int orinoco_ioctl_setport3(struct net_device *dev, |
3688 | struct iw_request_info *info, | ||
3689 | void *wrqu, | ||
3690 | char *extra) | ||
3494 | { | 3691 | { |
3495 | struct orinoco_private *priv = netdev_priv(dev); | 3692 | struct orinoco_private *priv = netdev_priv(dev); |
3496 | int val = *( (int *) wrq->u.name ); | 3693 | int val = *( (int *) extra ); |
3497 | int err = 0; | 3694 | int err = 0; |
3498 | unsigned long flags; | 3695 | unsigned long flags; |
3499 | 3696 | ||
@@ -3522,51 +3719,131 @@ static int orinoco_ioctl_setport3(struct net_device *dev, struct iwreq *wrq) | |||
3522 | err = -EINVAL; | 3719 | err = -EINVAL; |
3523 | } | 3720 | } |
3524 | 3721 | ||
3525 | if (! err) | 3722 | if (! err) { |
3526 | /* Actually update the mode we are using */ | 3723 | /* Actually update the mode we are using */ |
3527 | set_port_type(priv); | 3724 | set_port_type(priv); |
3725 | err = -EINPROGRESS; | ||
3726 | } | ||
3528 | 3727 | ||
3529 | orinoco_unlock(priv, &flags); | 3728 | orinoco_unlock(priv, &flags); |
3530 | 3729 | ||
3531 | return err; | 3730 | return err; |
3532 | } | 3731 | } |
3533 | 3732 | ||
3534 | static int orinoco_ioctl_getport3(struct net_device *dev, struct iwreq *wrq) | 3733 | static int orinoco_ioctl_getport3(struct net_device *dev, |
3734 | struct iw_request_info *info, | ||
3735 | void *wrqu, | ||
3736 | char *extra) | ||
3737 | { | ||
3738 | struct orinoco_private *priv = netdev_priv(dev); | ||
3739 | int *val = (int *) extra; | ||
3740 | |||
3741 | *val = priv->prefer_port3; | ||
3742 | return 0; | ||
3743 | } | ||
3744 | |||
3745 | static int orinoco_ioctl_setpreamble(struct net_device *dev, | ||
3746 | struct iw_request_info *info, | ||
3747 | void *wrqu, | ||
3748 | char *extra) | ||
3535 | { | 3749 | { |
3536 | struct orinoco_private *priv = netdev_priv(dev); | 3750 | struct orinoco_private *priv = netdev_priv(dev); |
3537 | int *val = (int *)wrq->u.name; | ||
3538 | unsigned long flags; | 3751 | unsigned long flags; |
3752 | int val; | ||
3753 | |||
3754 | if (! priv->has_preamble) | ||
3755 | return -EOPNOTSUPP; | ||
3756 | |||
3757 | /* 802.11b has recently defined some short preamble. | ||
3758 | * Basically, the Phy header has been reduced in size. | ||
3759 | * This increase performance, especially at high rates | ||
3760 | * (the preamble is transmitted at 1Mb/s), unfortunately | ||
3761 | * this give compatibility troubles... - Jean II */ | ||
3762 | val = *( (int *) extra ); | ||
3539 | 3763 | ||
3540 | if (orinoco_lock(priv, &flags) != 0) | 3764 | if (orinoco_lock(priv, &flags) != 0) |
3541 | return -EBUSY; | 3765 | return -EBUSY; |
3542 | 3766 | ||
3543 | *val = priv->prefer_port3; | 3767 | if (val) |
3768 | priv->preamble = 1; | ||
3769 | else | ||
3770 | priv->preamble = 0; | ||
3771 | |||
3544 | orinoco_unlock(priv, &flags); | 3772 | orinoco_unlock(priv, &flags); |
3773 | |||
3774 | return -EINPROGRESS; /* Call commit handler */ | ||
3775 | } | ||
3776 | |||
3777 | static int orinoco_ioctl_getpreamble(struct net_device *dev, | ||
3778 | struct iw_request_info *info, | ||
3779 | void *wrqu, | ||
3780 | char *extra) | ||
3781 | { | ||
3782 | struct orinoco_private *priv = netdev_priv(dev); | ||
3783 | int *val = (int *) extra; | ||
3784 | |||
3785 | if (! priv->has_preamble) | ||
3786 | return -EOPNOTSUPP; | ||
3787 | |||
3788 | *val = priv->preamble; | ||
3545 | return 0; | 3789 | return 0; |
3546 | } | 3790 | } |
3547 | 3791 | ||
3792 | /* ioctl interface to hermes_read_ltv() | ||
3793 | * To use with iwpriv, pass the RID as the token argument, e.g. | ||
3794 | * iwpriv get_rid [0xfc00] | ||
3795 | * At least Wireless Tools 25 is required to use iwpriv. | ||
3796 | * For Wireless Tools 25 and 26 append "dummy" are the end. */ | ||
3797 | static int orinoco_ioctl_getrid(struct net_device *dev, | ||
3798 | struct iw_request_info *info, | ||
3799 | struct iw_point *data, | ||
3800 | char *extra) | ||
3801 | { | ||
3802 | struct orinoco_private *priv = netdev_priv(dev); | ||
3803 | hermes_t *hw = &priv->hw; | ||
3804 | int rid = data->flags; | ||
3805 | u16 length; | ||
3806 | int err; | ||
3807 | unsigned long flags; | ||
3808 | |||
3809 | /* It's a "get" function, but we don't want users to access the | ||
3810 | * WEP key and other raw firmware data */ | ||
3811 | if (! capable(CAP_NET_ADMIN)) | ||
3812 | return -EPERM; | ||
3813 | |||
3814 | if (rid < 0xfc00 || rid > 0xffff) | ||
3815 | return -EINVAL; | ||
3816 | |||
3817 | if (orinoco_lock(priv, &flags) != 0) | ||
3818 | return -EBUSY; | ||
3819 | |||
3820 | err = hermes_read_ltv(hw, USER_BAP, rid, MAX_RID_LEN, &length, | ||
3821 | extra); | ||
3822 | if (err) | ||
3823 | goto out; | ||
3824 | |||
3825 | data->length = min_t(u16, HERMES_RECLEN_TO_BYTES(length), | ||
3826 | MAX_RID_LEN); | ||
3827 | |||
3828 | out: | ||
3829 | orinoco_unlock(priv, &flags); | ||
3830 | return err; | ||
3831 | } | ||
3832 | |||
3548 | /* Spy is used for link quality/strength measurements in Ad-Hoc mode | 3833 | /* Spy is used for link quality/strength measurements in Ad-Hoc mode |
3549 | * Jean II */ | 3834 | * Jean II */ |
3550 | static int orinoco_ioctl_setspy(struct net_device *dev, struct iw_point *srq) | 3835 | static int orinoco_ioctl_setspy(struct net_device *dev, |
3836 | struct iw_request_info *info, | ||
3837 | struct iw_point *srq, | ||
3838 | char *extra) | ||
3839 | |||
3551 | { | 3840 | { |
3552 | struct orinoco_private *priv = netdev_priv(dev); | 3841 | struct orinoco_private *priv = netdev_priv(dev); |
3553 | struct sockaddr address[IW_MAX_SPY]; | 3842 | struct sockaddr *address = (struct sockaddr *) extra; |
3554 | int number = srq->length; | 3843 | int number = srq->length; |
3555 | int i; | 3844 | int i; |
3556 | int err = 0; | ||
3557 | unsigned long flags; | 3845 | unsigned long flags; |
3558 | 3846 | ||
3559 | /* Check the number of addresses */ | ||
3560 | if (number > IW_MAX_SPY) | ||
3561 | return -E2BIG; | ||
3562 | |||
3563 | /* Get the data in the driver */ | ||
3564 | if (srq->pointer) { | ||
3565 | if (copy_from_user(address, srq->pointer, | ||
3566 | sizeof(struct sockaddr) * number)) | ||
3567 | return -EFAULT; | ||
3568 | } | ||
3569 | |||
3570 | /* Make sure nobody mess with the structure while we do */ | 3847 | /* Make sure nobody mess with the structure while we do */ |
3571 | if (orinoco_lock(priv, &flags) != 0) | 3848 | if (orinoco_lock(priv, &flags) != 0) |
3572 | return -EBUSY; | 3849 | return -EBUSY; |
@@ -3590,14 +3867,17 @@ static int orinoco_ioctl_setspy(struct net_device *dev, struct iw_point *srq) | |||
3590 | /* Now, let the others play */ | 3867 | /* Now, let the others play */ |
3591 | orinoco_unlock(priv, &flags); | 3868 | orinoco_unlock(priv, &flags); |
3592 | 3869 | ||
3593 | return err; | 3870 | /* Do NOT call commit handler */ |
3871 | return 0; | ||
3594 | } | 3872 | } |
3595 | 3873 | ||
3596 | static int orinoco_ioctl_getspy(struct net_device *dev, struct iw_point *srq) | 3874 | static int orinoco_ioctl_getspy(struct net_device *dev, |
3875 | struct iw_request_info *info, | ||
3876 | struct iw_point *srq, | ||
3877 | char *extra) | ||
3597 | { | 3878 | { |
3598 | struct orinoco_private *priv = netdev_priv(dev); | 3879 | struct orinoco_private *priv = netdev_priv(dev); |
3599 | struct sockaddr address[IW_MAX_SPY]; | 3880 | struct sockaddr *address = (struct sockaddr *) extra; |
3600 | struct iw_quality spy_stat[IW_MAX_SPY]; | ||
3601 | int number; | 3881 | int number; |
3602 | int i; | 3882 | int i; |
3603 | unsigned long flags; | 3883 | unsigned long flags; |
@@ -3606,7 +3886,12 @@ static int orinoco_ioctl_getspy(struct net_device *dev, struct iw_point *srq) | |||
3606 | return -EBUSY; | 3886 | return -EBUSY; |
3607 | 3887 | ||
3608 | number = priv->spy_number; | 3888 | number = priv->spy_number; |
3609 | if ((number > 0) && (srq->pointer)) { | 3889 | /* Create address struct */ |
3890 | for (i = 0; i < number; i++) { | ||
3891 | memcpy(address[i].sa_data, priv->spy_address[i], ETH_ALEN); | ||
3892 | address[i].sa_family = AF_UNIX; | ||
3893 | } | ||
3894 | if (number > 0) { | ||
3610 | /* Create address struct */ | 3895 | /* Create address struct */ |
3611 | for (i = 0; i < number; i++) { | 3896 | for (i = 0; i < number; i++) { |
3612 | memcpy(address[i].sa_data, priv->spy_address[i], | 3897 | memcpy(address[i].sa_data, priv->spy_address[i], |
@@ -3617,535 +3902,504 @@ static int orinoco_ioctl_getspy(struct net_device *dev, struct iw_point *srq) | |||
3617 | /* In theory, we should disable irqs while copying the stats | 3902 | /* In theory, we should disable irqs while copying the stats |
3618 | * because the rx path might update it in the middle... | 3903 | * because the rx path might update it in the middle... |
3619 | * Bah, who care ? - Jean II */ | 3904 | * Bah, who care ? - Jean II */ |
3620 | memcpy(&spy_stat, priv->spy_stat, | 3905 | memcpy(extra + (sizeof(struct sockaddr) * number), |
3621 | sizeof(struct iw_quality) * IW_MAX_SPY); | 3906 | priv->spy_stat, sizeof(struct iw_quality) * number); |
3622 | for (i=0; i < number; i++) | ||
3623 | priv->spy_stat[i].updated = 0; | ||
3624 | } | 3907 | } |
3908 | /* Reset updated flags. */ | ||
3909 | for (i = 0; i < number; i++) | ||
3910 | priv->spy_stat[i].updated = 0; | ||
3625 | 3911 | ||
3626 | orinoco_unlock(priv, &flags); | 3912 | orinoco_unlock(priv, &flags); |
3627 | 3913 | ||
3628 | /* Push stuff to user space */ | ||
3629 | srq->length = number; | 3914 | srq->length = number; |
3630 | if(copy_to_user(srq->pointer, address, | ||
3631 | sizeof(struct sockaddr) * number)) | ||
3632 | return -EFAULT; | ||
3633 | if(copy_to_user(srq->pointer + (sizeof(struct sockaddr)*number), | ||
3634 | &spy_stat, sizeof(struct iw_quality) * number)) | ||
3635 | return -EFAULT; | ||
3636 | 3915 | ||
3637 | return 0; | 3916 | return 0; |
3638 | } | 3917 | } |
3639 | 3918 | ||
3640 | static int | 3919 | /* Trigger a scan (look for other cells in the vicinity */ |
3641 | orinoco_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | 3920 | static int orinoco_ioctl_setscan(struct net_device *dev, |
3921 | struct iw_request_info *info, | ||
3922 | struct iw_param *srq, | ||
3923 | char *extra) | ||
3642 | { | 3924 | { |
3643 | struct orinoco_private *priv = netdev_priv(dev); | 3925 | struct orinoco_private *priv = netdev_priv(dev); |
3644 | struct iwreq *wrq = (struct iwreq *)rq; | 3926 | hermes_t *hw = &priv->hw; |
3645 | int err = 0; | 3927 | int err = 0; |
3646 | int tmp; | ||
3647 | int changed = 0; | ||
3648 | unsigned long flags; | 3928 | unsigned long flags; |
3649 | 3929 | ||
3650 | TRACE_ENTER(dev->name); | 3930 | /* Note : you may have realised that, as this is a SET operation, |
3651 | 3931 | * this is priviledged and therefore a normal user can't | |
3652 | /* In theory, we could allow most of the the SET stuff to be | 3932 | * perform scanning. |
3653 | * done. In practice, the lapse of time at startup when the | 3933 | * This is not an error, while the device perform scanning, |
3654 | * card is not ready is very short, so why bother... Note | 3934 | * traffic doesn't flow, so it's a perfect DoS... |
3655 | * that netif_device_present is different from up/down | 3935 | * Jean II */ |
3656 | * (ifconfig), when the device is not yet up, it is usually | ||
3657 | * already ready... Jean II */ | ||
3658 | if (! netif_device_present(dev)) | ||
3659 | return -ENODEV; | ||
3660 | 3936 | ||
3661 | switch (cmd) { | 3937 | if (orinoco_lock(priv, &flags) != 0) |
3662 | case SIOCGIWNAME: | 3938 | return -EBUSY; |
3663 | strcpy(wrq->u.name, "IEEE 802.11-DS"); | ||
3664 | break; | ||
3665 | |||
3666 | case SIOCGIWAP: | ||
3667 | wrq->u.ap_addr.sa_family = ARPHRD_ETHER; | ||
3668 | err = orinoco_hw_get_bssid(priv, wrq->u.ap_addr.sa_data); | ||
3669 | break; | ||
3670 | 3939 | ||
3671 | case SIOCGIWRANGE: | 3940 | /* Scanning with port 0 disabled would fail */ |
3672 | err = orinoco_ioctl_getiwrange(dev, &wrq->u.data); | 3941 | if (!netif_running(dev)) { |
3673 | break; | 3942 | err = -ENETDOWN; |
3943 | goto out; | ||
3944 | } | ||
3674 | 3945 | ||
3675 | case SIOCSIWMODE: | 3946 | /* In monitor mode, the scan results are always empty. |
3676 | if (orinoco_lock(priv, &flags) != 0) | 3947 | * Probe responses are passed to the driver as received |
3677 | return -EBUSY; | 3948 | * frames and could be processed in software. */ |
3678 | switch (wrq->u.mode) { | 3949 | if (priv->iw_mode == IW_MODE_MONITOR) { |
3679 | case IW_MODE_ADHOC: | 3950 | err = -EOPNOTSUPP; |
3680 | if (! (priv->has_ibss || priv->has_port3) ) | 3951 | goto out; |
3681 | err = -EINVAL; | 3952 | } |
3682 | else { | ||
3683 | priv->iw_mode = IW_MODE_ADHOC; | ||
3684 | changed = 1; | ||
3685 | } | ||
3686 | break; | ||
3687 | 3953 | ||
3688 | case IW_MODE_INFRA: | 3954 | /* Note : because we don't lock out the irq handler, the way |
3689 | priv->iw_mode = IW_MODE_INFRA; | 3955 | * we access scan variables in priv is critical. |
3690 | changed = 1; | 3956 | * o scan_inprogress : not touched by irq handler |
3691 | break; | 3957 | * o scan_mode : not touched by irq handler |
3958 | * o scan_result : irq is strict producer, non-irq is strict | ||
3959 | * consumer. | ||
3960 | * o scan_len : synchronised with scan_result | ||
3961 | * Before modifying anything on those variables, please think hard ! | ||
3962 | * Jean II */ | ||
3692 | 3963 | ||
3693 | default: | 3964 | /* If there is still some left-over scan results, get rid of it */ |
3694 | err = -EINVAL; | 3965 | if (priv->scan_result != NULL) { |
3695 | break; | 3966 | /* What's likely is that a client did crash or was killed |
3696 | } | 3967 | * between triggering the scan request and reading the |
3697 | set_port_type(priv); | 3968 | * results, so we need to reset everything. |
3698 | orinoco_unlock(priv, &flags); | 3969 | * Some clients that are too slow may suffer from that... |
3699 | break; | 3970 | * Jean II */ |
3971 | kfree(priv->scan_result); | ||
3972 | priv->scan_result = NULL; | ||
3973 | } | ||
3700 | 3974 | ||
3701 | case SIOCGIWMODE: | 3975 | /* Save flags */ |
3702 | if (orinoco_lock(priv, &flags) != 0) | 3976 | priv->scan_mode = srq->flags; |
3703 | return -EBUSY; | ||
3704 | wrq->u.mode = priv->iw_mode; | ||
3705 | orinoco_unlock(priv, &flags); | ||
3706 | break; | ||
3707 | 3977 | ||
3708 | case SIOCSIWENCODE: | 3978 | /* Always trigger scanning, even if it's in progress. |
3709 | err = orinoco_ioctl_setiwencode(dev, &wrq->u.encoding); | 3979 | * This way, if the info frame get lost, we will recover somewhat |
3710 | if (! err) | 3980 | * gracefully - Jean II */ |
3711 | changed = 1; | ||
3712 | break; | ||
3713 | 3981 | ||
3714 | case SIOCGIWENCODE: | 3982 | if (priv->has_hostscan) { |
3715 | if (! capable(CAP_NET_ADMIN)) { | 3983 | switch (priv->firmware_type) { |
3716 | err = -EPERM; | 3984 | case FIRMWARE_TYPE_SYMBOL: |
3985 | err = hermes_write_wordrec(hw, USER_BAP, | ||
3986 | HERMES_RID_CNFHOSTSCAN_SYMBOL, | ||
3987 | HERMES_HOSTSCAN_SYMBOL_ONCE | | ||
3988 | HERMES_HOSTSCAN_SYMBOL_BCAST); | ||
3717 | break; | 3989 | break; |
3990 | case FIRMWARE_TYPE_INTERSIL: { | ||
3991 | u16 req[3]; | ||
3992 | |||
3993 | req[0] = cpu_to_le16(0x3fff); /* All channels */ | ||
3994 | req[1] = cpu_to_le16(0x0001); /* rate 1 Mbps */ | ||
3995 | req[2] = 0; /* Any ESSID */ | ||
3996 | err = HERMES_WRITE_RECORD(hw, USER_BAP, | ||
3997 | HERMES_RID_CNFHOSTSCAN, &req); | ||
3718 | } | 3998 | } |
3719 | |||
3720 | err = orinoco_ioctl_getiwencode(dev, &wrq->u.encoding); | ||
3721 | break; | ||
3722 | |||
3723 | case SIOCSIWESSID: | ||
3724 | err = orinoco_ioctl_setessid(dev, &wrq->u.essid); | ||
3725 | if (! err) | ||
3726 | changed = 1; | ||
3727 | break; | ||
3728 | |||
3729 | case SIOCGIWESSID: | ||
3730 | err = orinoco_ioctl_getessid(dev, &wrq->u.essid); | ||
3731 | break; | ||
3732 | |||
3733 | case SIOCSIWNICKN: | ||
3734 | err = orinoco_ioctl_setnick(dev, &wrq->u.data); | ||
3735 | if (! err) | ||
3736 | changed = 1; | ||
3737 | break; | ||
3738 | |||
3739 | case SIOCGIWNICKN: | ||
3740 | err = orinoco_ioctl_getnick(dev, &wrq->u.data); | ||
3741 | break; | 3999 | break; |
4000 | case FIRMWARE_TYPE_AGERE: | ||
4001 | err = hermes_write_wordrec(hw, USER_BAP, | ||
4002 | HERMES_RID_CNFSCANSSID_AGERE, | ||
4003 | 0); /* Any ESSID */ | ||
4004 | if (err) | ||
4005 | break; | ||
3742 | 4006 | ||
3743 | case SIOCGIWFREQ: | 4007 | err = hermes_inquire(hw, HERMES_INQ_SCAN); |
3744 | tmp = orinoco_hw_get_freq(priv); | 4008 | break; |
3745 | if (tmp < 0) { | ||
3746 | err = tmp; | ||
3747 | } else { | ||
3748 | wrq->u.freq.m = tmp; | ||
3749 | wrq->u.freq.e = 1; | ||
3750 | } | 4009 | } |
3751 | break; | 4010 | } else |
3752 | 4011 | err = hermes_inquire(hw, HERMES_INQ_SCAN); | |
3753 | case SIOCSIWFREQ: | ||
3754 | err = orinoco_ioctl_setfreq(dev, &wrq->u.freq); | ||
3755 | if (! err) | ||
3756 | changed = 1; | ||
3757 | break; | ||
3758 | |||
3759 | case SIOCGIWSENS: | ||
3760 | err = orinoco_ioctl_getsens(dev, &wrq->u.sens); | ||
3761 | break; | ||
3762 | |||
3763 | case SIOCSIWSENS: | ||
3764 | err = orinoco_ioctl_setsens(dev, &wrq->u.sens); | ||
3765 | if (! err) | ||
3766 | changed = 1; | ||
3767 | break; | ||
3768 | |||
3769 | case SIOCGIWRTS: | ||
3770 | wrq->u.rts.value = priv->rts_thresh; | ||
3771 | wrq->u.rts.disabled = (wrq->u.rts.value == 2347); | ||
3772 | wrq->u.rts.fixed = 1; | ||
3773 | break; | ||
3774 | |||
3775 | case SIOCSIWRTS: | ||
3776 | err = orinoco_ioctl_setrts(dev, &wrq->u.rts); | ||
3777 | if (! err) | ||
3778 | changed = 1; | ||
3779 | break; | ||
3780 | |||
3781 | case SIOCSIWFRAG: | ||
3782 | err = orinoco_ioctl_setfrag(dev, &wrq->u.frag); | ||
3783 | if (! err) | ||
3784 | changed = 1; | ||
3785 | break; | ||
3786 | |||
3787 | case SIOCGIWFRAG: | ||
3788 | err = orinoco_ioctl_getfrag(dev, &wrq->u.frag); | ||
3789 | break; | ||
3790 | 4012 | ||
3791 | case SIOCSIWRATE: | 4013 | /* One more client */ |
3792 | err = orinoco_ioctl_setrate(dev, &wrq->u.bitrate); | 4014 | if (! err) |
3793 | if (! err) | 4015 | priv->scan_inprogress = 1; |
3794 | changed = 1; | ||
3795 | break; | ||
3796 | |||
3797 | case SIOCGIWRATE: | ||
3798 | err = orinoco_ioctl_getrate(dev, &wrq->u.bitrate); | ||
3799 | break; | ||
3800 | |||
3801 | case SIOCSIWPOWER: | ||
3802 | err = orinoco_ioctl_setpower(dev, &wrq->u.power); | ||
3803 | if (! err) | ||
3804 | changed = 1; | ||
3805 | break; | ||
3806 | 4016 | ||
3807 | case SIOCGIWPOWER: | 4017 | out: |
3808 | err = orinoco_ioctl_getpower(dev, &wrq->u.power); | 4018 | orinoco_unlock(priv, &flags); |
3809 | break; | 4019 | return err; |
4020 | } | ||
3810 | 4021 | ||
3811 | case SIOCGIWTXPOW: | 4022 | /* Translate scan data returned from the card to a card independant |
3812 | /* The card only supports one tx power, so this is easy */ | 4023 | * format that the Wireless Tools will understand - Jean II */ |
3813 | wrq->u.txpower.value = 15; /* dBm */ | 4024 | static inline int orinoco_translate_scan(struct net_device *dev, |
3814 | wrq->u.txpower.fixed = 1; | 4025 | char *buffer, |
3815 | wrq->u.txpower.disabled = 0; | 4026 | char *scan, |
3816 | wrq->u.txpower.flags = IW_TXPOW_DBM; | 4027 | int scan_len) |
3817 | break; | 4028 | { |
4029 | struct orinoco_private *priv = netdev_priv(dev); | ||
4030 | int offset; /* In the scan data */ | ||
4031 | union hermes_scan_info *atom; | ||
4032 | int atom_len; | ||
4033 | u16 capabilities; | ||
4034 | u16 channel; | ||
4035 | struct iw_event iwe; /* Temporary buffer */ | ||
4036 | char * current_ev = buffer; | ||
4037 | char * end_buf = buffer + IW_SCAN_MAX_DATA; | ||
3818 | 4038 | ||
3819 | case SIOCSIWRETRY: | 4039 | switch (priv->firmware_type) { |
3820 | err = -EOPNOTSUPP; | 4040 | case FIRMWARE_TYPE_AGERE: |
4041 | atom_len = sizeof(struct agere_scan_apinfo); | ||
4042 | offset = 0; | ||
3821 | break; | 4043 | break; |
3822 | 4044 | case FIRMWARE_TYPE_SYMBOL: | |
3823 | case SIOCGIWRETRY: | 4045 | /* Lack of documentation necessitates this hack. |
3824 | err = orinoco_ioctl_getretry(dev, &wrq->u.retry); | 4046 | * Different firmwares have 68 or 76 byte long atoms. |
4047 | * We try modulo first. If the length divides by both, | ||
4048 | * we check what would be the channel in the second | ||
4049 | * frame for a 68-byte atom. 76-byte atoms have 0 there. | ||
4050 | * Valid channel cannot be 0. */ | ||
4051 | if (scan_len % 76) | ||
4052 | atom_len = 68; | ||
4053 | else if (scan_len % 68) | ||
4054 | atom_len = 76; | ||
4055 | else if (scan_len >= 1292 && scan[68] == 0) | ||
4056 | atom_len = 76; | ||
4057 | else | ||
4058 | atom_len = 68; | ||
4059 | offset = 0; | ||
3825 | break; | 4060 | break; |
3826 | 4061 | case FIRMWARE_TYPE_INTERSIL: | |
3827 | case SIOCSIWSPY: | 4062 | offset = 4; |
3828 | err = orinoco_ioctl_setspy(dev, &wrq->u.data); | 4063 | if (priv->has_hostscan) |
4064 | atom_len = scan[0] + (scan[1] << 8); | ||
4065 | else | ||
4066 | atom_len = offsetof(struct prism2_scan_apinfo, atim); | ||
3829 | break; | 4067 | break; |
4068 | default: | ||
4069 | return 0; | ||
4070 | } | ||
3830 | 4071 | ||
3831 | case SIOCGIWSPY: | 4072 | /* Check that we got an whole number of atoms */ |
3832 | err = orinoco_ioctl_getspy(dev, &wrq->u.data); | 4073 | if ((scan_len - offset) % atom_len) { |
3833 | break; | 4074 | printk(KERN_ERR "%s: Unexpected scan data length %d, " |
4075 | "atom_len %d, offset %d\n", dev->name, scan_len, | ||
4076 | atom_len, offset); | ||
4077 | return 0; | ||
4078 | } | ||
3834 | 4079 | ||
3835 | case SIOCGIWPRIV: | 4080 | /* Read the entries one by one */ |
3836 | if (wrq->u.data.pointer) { | 4081 | for (; offset + atom_len <= scan_len; offset += atom_len) { |
3837 | struct iw_priv_args privtab[] = { | 4082 | /* Get next atom */ |
3838 | { SIOCIWFIRSTPRIV + 0x0, 0, 0, "force_reset" }, | 4083 | atom = (union hermes_scan_info *) (scan + offset); |
3839 | { SIOCIWFIRSTPRIV + 0x1, 0, 0, "card_reset" }, | 4084 | |
3840 | { SIOCIWFIRSTPRIV + 0x2, | 4085 | /* First entry *MUST* be the AP MAC address */ |
3841 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | 4086 | iwe.cmd = SIOCGIWAP; |
3842 | 0, "set_port3" }, | 4087 | iwe.u.ap_addr.sa_family = ARPHRD_ETHER; |
3843 | { SIOCIWFIRSTPRIV + 0x3, 0, | 4088 | memcpy(iwe.u.ap_addr.sa_data, atom->a.bssid, ETH_ALEN); |
3844 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | 4089 | current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, IW_EV_ADDR_LEN); |
3845 | "get_port3" }, | 4090 | |
3846 | { SIOCIWFIRSTPRIV + 0x4, | 4091 | /* Other entries will be displayed in the order we give them */ |
3847 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | 4092 | |
3848 | 0, "set_preamble" }, | 4093 | /* Add the ESSID */ |
3849 | { SIOCIWFIRSTPRIV + 0x5, 0, | 4094 | iwe.u.data.length = le16_to_cpu(atom->a.essid_len); |
3850 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | 4095 | if (iwe.u.data.length > 32) |
3851 | "get_preamble" }, | 4096 | iwe.u.data.length = 32; |
3852 | { SIOCIWFIRSTPRIV + 0x6, | 4097 | iwe.cmd = SIOCGIWESSID; |
3853 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | 4098 | iwe.u.data.flags = 1; |
3854 | 0, "set_ibssport" }, | 4099 | current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, atom->a.essid); |
3855 | { SIOCIWFIRSTPRIV + 0x7, 0, | 4100 | |
3856 | IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, | 4101 | /* Add mode */ |
3857 | "get_ibssport" }, | 4102 | iwe.cmd = SIOCGIWMODE; |
3858 | { SIOCIWLASTPRIV, 0, 0, "dump_recs" }, | 4103 | capabilities = le16_to_cpu(atom->a.capabilities); |
3859 | }; | 4104 | if (capabilities & 0x3) { |
3860 | 4105 | if (capabilities & 0x1) | |
3861 | wrq->u.data.length = sizeof(privtab) / sizeof(privtab[0]); | 4106 | iwe.u.mode = IW_MODE_MASTER; |
3862 | if (copy_to_user(wrq->u.data.pointer, privtab, sizeof(privtab))) | 4107 | else |
3863 | err = -EFAULT; | 4108 | iwe.u.mode = IW_MODE_ADHOC; |
4109 | current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, IW_EV_UINT_LEN); | ||
3864 | } | 4110 | } |
3865 | break; | 4111 | |
3866 | 4112 | channel = atom->s.channel; | |
3867 | case SIOCIWFIRSTPRIV + 0x0: /* force_reset */ | 4113 | if ( (channel >= 1) && (channel <= NUM_CHANNELS) ) { |
3868 | case SIOCIWFIRSTPRIV + 0x1: /* card_reset */ | 4114 | /* Add frequency */ |
3869 | if (! capable(CAP_NET_ADMIN)) { | 4115 | iwe.cmd = SIOCGIWFREQ; |
3870 | err = -EPERM; | 4116 | iwe.u.freq.m = channel_frequency[channel-1] * 100000; |
3871 | break; | 4117 | iwe.u.freq.e = 1; |
4118 | current_ev = iwe_stream_add_event(current_ev, end_buf, | ||
4119 | &iwe, IW_EV_FREQ_LEN); | ||
3872 | } | 4120 | } |
3873 | |||
3874 | printk(KERN_DEBUG "%s: Force scheduling reset!\n", dev->name); | ||
3875 | 4121 | ||
3876 | schedule_work(&priv->reset_work); | 4122 | /* Add quality statistics */ |
3877 | break; | 4123 | iwe.cmd = IWEVQUAL; |
4124 | iwe.u.qual.updated = 0x10; /* no link quality */ | ||
4125 | iwe.u.qual.level = (__u8) le16_to_cpu(atom->a.level) - 0x95; | ||
4126 | iwe.u.qual.noise = (__u8) le16_to_cpu(atom->a.noise) - 0x95; | ||
4127 | /* Wireless tools prior to 27.pre22 will show link quality | ||
4128 | * anyway, so we provide a reasonable value. */ | ||
4129 | if (iwe.u.qual.level > iwe.u.qual.noise) | ||
4130 | iwe.u.qual.qual = iwe.u.qual.level - iwe.u.qual.noise; | ||
4131 | else | ||
4132 | iwe.u.qual.qual = 0; | ||
4133 | current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, IW_EV_QUAL_LEN); | ||
3878 | 4134 | ||
3879 | case SIOCIWFIRSTPRIV + 0x2: /* set_port3 */ | 4135 | /* Add encryption capability */ |
3880 | if (! capable(CAP_NET_ADMIN)) { | 4136 | iwe.cmd = SIOCGIWENCODE; |
3881 | err = -EPERM; | 4137 | if (capabilities & 0x10) |
3882 | break; | 4138 | iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY; |
4139 | else | ||
4140 | iwe.u.data.flags = IW_ENCODE_DISABLED; | ||
4141 | iwe.u.data.length = 0; | ||
4142 | current_ev = iwe_stream_add_point(current_ev, end_buf, &iwe, atom->a.essid); | ||
4143 | |||
4144 | /* Bit rate is not available in Lucent/Agere firmwares */ | ||
4145 | if (priv->firmware_type != FIRMWARE_TYPE_AGERE) { | ||
4146 | char * current_val = current_ev + IW_EV_LCP_LEN; | ||
4147 | int i; | ||
4148 | int step; | ||
4149 | |||
4150 | if (priv->firmware_type == FIRMWARE_TYPE_SYMBOL) | ||
4151 | step = 2; | ||
4152 | else | ||
4153 | step = 1; | ||
4154 | |||
4155 | iwe.cmd = SIOCGIWRATE; | ||
4156 | /* Those two flags are ignored... */ | ||
4157 | iwe.u.bitrate.fixed = iwe.u.bitrate.disabled = 0; | ||
4158 | /* Max 10 values */ | ||
4159 | for (i = 0; i < 10; i += step) { | ||
4160 | /* NULL terminated */ | ||
4161 | if (atom->p.rates[i] == 0x0) | ||
4162 | break; | ||
4163 | /* Bit rate given in 500 kb/s units (+ 0x80) */ | ||
4164 | iwe.u.bitrate.value = ((atom->p.rates[i] & 0x7f) * 500000); | ||
4165 | current_val = iwe_stream_add_value(current_ev, current_val, | ||
4166 | end_buf, &iwe, | ||
4167 | IW_EV_PARAM_LEN); | ||
4168 | } | ||
4169 | /* Check if we added any event */ | ||
4170 | if ((current_val - current_ev) > IW_EV_LCP_LEN) | ||
4171 | current_ev = current_val; | ||
3883 | } | 4172 | } |
3884 | 4173 | ||
3885 | err = orinoco_ioctl_setport3(dev, wrq); | 4174 | /* The other data in the scan result are not really |
3886 | if (! err) | 4175 | * interesting, so for now drop it - Jean II */ |
3887 | changed = 1; | 4176 | } |
3888 | break; | 4177 | return current_ev - buffer; |
4178 | } | ||
3889 | 4179 | ||
3890 | case SIOCIWFIRSTPRIV + 0x3: /* get_port3 */ | 4180 | /* Return results of a scan */ |
3891 | err = orinoco_ioctl_getport3(dev, wrq); | 4181 | static int orinoco_ioctl_getscan(struct net_device *dev, |
3892 | break; | 4182 | struct iw_request_info *info, |
4183 | struct iw_point *srq, | ||
4184 | char *extra) | ||
4185 | { | ||
4186 | struct orinoco_private *priv = netdev_priv(dev); | ||
4187 | int err = 0; | ||
4188 | unsigned long flags; | ||
3893 | 4189 | ||
3894 | case SIOCIWFIRSTPRIV + 0x4: /* set_preamble */ | 4190 | if (orinoco_lock(priv, &flags) != 0) |
3895 | if (! capable(CAP_NET_ADMIN)) { | 4191 | return -EBUSY; |
3896 | err = -EPERM; | ||
3897 | break; | ||
3898 | } | ||
3899 | 4192 | ||
3900 | /* 802.11b has recently defined some short preamble. | 4193 | /* If no results yet, ask to try again later */ |
3901 | * Basically, the Phy header has been reduced in size. | 4194 | if (priv->scan_result == NULL) { |
3902 | * This increase performance, especially at high rates | 4195 | if (priv->scan_inprogress) |
3903 | * (the preamble is transmitted at 1Mb/s), unfortunately | 4196 | /* Important note : we don't want to block the caller |
3904 | * this give compatibility troubles... - Jean II */ | 4197 | * until results are ready for various reasons. |
3905 | if(priv->has_preamble) { | 4198 | * First, managing wait queues is complex and racy. |
3906 | int val = *( (int *) wrq->u.name ); | 4199 | * Second, we grab some rtnetlink lock before comming |
3907 | 4200 | * here (in dev_ioctl()). | |
3908 | if (orinoco_lock(priv, &flags) != 0) | 4201 | * Third, we generate an Wireless Event, so the |
3909 | return -EBUSY; | 4202 | * caller can wait itself on that - Jean II */ |
3910 | if (val) | 4203 | err = -EAGAIN; |
3911 | priv->preamble = 1; | 4204 | else |
3912 | else | 4205 | /* Client error, no scan results... |
3913 | priv->preamble = 0; | 4206 | * The caller need to restart the scan. */ |
3914 | orinoco_unlock(priv, &flags); | 4207 | err = -ENODATA; |
3915 | changed = 1; | 4208 | } else { |
3916 | } else | 4209 | /* We have some results to push back to user space */ |
3917 | err = -EOPNOTSUPP; | 4210 | |
3918 | break; | 4211 | /* Translate to WE format */ |
4212 | srq->length = orinoco_translate_scan(dev, extra, | ||
4213 | priv->scan_result, | ||
4214 | priv->scan_len); | ||
4215 | |||
4216 | /* Return flags */ | ||
4217 | srq->flags = (__u16) priv->scan_mode; | ||
4218 | |||
4219 | /* Results are here, so scan no longer in progress */ | ||
4220 | priv->scan_inprogress = 0; | ||
4221 | |||
4222 | /* In any case, Scan results will be cleaned up in the | ||
4223 | * reset function and when exiting the driver. | ||
4224 | * The person triggering the scanning may never come to | ||
4225 | * pick the results, so we need to do it in those places. | ||
4226 | * Jean II */ | ||
4227 | |||
4228 | #ifdef SCAN_SINGLE_READ | ||
4229 | /* If you enable this option, only one client (the first | ||
4230 | * one) will be able to read the result (and only one | ||
4231 | * time). If there is multiple concurent clients that | ||
4232 | * want to read scan results, this behavior is not | ||
4233 | * advisable - Jean II */ | ||
4234 | kfree(priv->scan_result); | ||
4235 | priv->scan_result = NULL; | ||
4236 | #endif /* SCAN_SINGLE_READ */ | ||
4237 | /* Here, if too much time has elapsed since last scan, | ||
4238 | * we may want to clean up scan results... - Jean II */ | ||
4239 | } | ||
4240 | |||
4241 | orinoco_unlock(priv, &flags); | ||
4242 | return err; | ||
4243 | } | ||
3919 | 4244 | ||
3920 | case SIOCIWFIRSTPRIV + 0x5: /* get_preamble */ | 4245 | /* Commit handler, called after set operations */ |
3921 | if(priv->has_preamble) { | 4246 | static int orinoco_ioctl_commit(struct net_device *dev, |
3922 | int *val = (int *)wrq->u.name; | 4247 | struct iw_request_info *info, |
4248 | void *wrqu, | ||
4249 | char *extra) | ||
4250 | { | ||
4251 | struct orinoco_private *priv = netdev_priv(dev); | ||
4252 | struct hermes *hw = &priv->hw; | ||
4253 | unsigned long flags; | ||
4254 | int err = 0; | ||
3923 | 4255 | ||
3924 | if (orinoco_lock(priv, &flags) != 0) | 4256 | if (!priv->open) |
3925 | return -EBUSY; | 4257 | return 0; |
3926 | *val = priv->preamble; | ||
3927 | orinoco_unlock(priv, &flags); | ||
3928 | } else | ||
3929 | err = -EOPNOTSUPP; | ||
3930 | break; | ||
3931 | case SIOCIWFIRSTPRIV + 0x6: /* set_ibssport */ | ||
3932 | if (! capable(CAP_NET_ADMIN)) { | ||
3933 | err = -EPERM; | ||
3934 | break; | ||
3935 | } | ||
3936 | 4258 | ||
3937 | err = orinoco_ioctl_setibssport(dev, wrq); | 4259 | if (priv->broken_disableport) { |
3938 | if (! err) | 4260 | orinoco_reset(dev); |
3939 | changed = 1; | 4261 | return 0; |
3940 | break; | 4262 | } |
3941 | 4263 | ||
3942 | case SIOCIWFIRSTPRIV + 0x7: /* get_ibssport */ | 4264 | if (orinoco_lock(priv, &flags) != 0) |
3943 | err = orinoco_ioctl_getibssport(dev, wrq); | 4265 | return err; |
3944 | break; | ||
3945 | 4266 | ||
3946 | case SIOCIWLASTPRIV: | 4267 | err = hermes_disable_port(hw, 0); |
3947 | err = orinoco_debug_dump_recs(dev); | 4268 | if (err) { |
3948 | if (err) | 4269 | printk(KERN_WARNING "%s: Unable to disable port " |
3949 | printk(KERN_ERR "%s: Unable to dump records (%d)\n", | 4270 | "while reconfiguring card\n", dev->name); |
3950 | dev->name, err); | 4271 | priv->broken_disableport = 1; |
3951 | break; | 4272 | goto out; |
4273 | } | ||
3952 | 4274 | ||
4275 | err = __orinoco_program_rids(dev); | ||
4276 | if (err) { | ||
4277 | printk(KERN_WARNING "%s: Unable to reconfigure card\n", | ||
4278 | dev->name); | ||
4279 | goto out; | ||
4280 | } | ||
3953 | 4281 | ||
3954 | default: | 4282 | err = hermes_enable_port(hw, 0); |
3955 | err = -EOPNOTSUPP; | 4283 | if (err) { |
4284 | printk(KERN_WARNING "%s: Unable to enable port while reconfiguring card\n", | ||
4285 | dev->name); | ||
4286 | goto out; | ||
3956 | } | 4287 | } |
3957 | |||
3958 | if (! err && changed && netif_running(dev)) { | ||
3959 | err = orinoco_reconfigure(dev); | ||
3960 | } | ||
3961 | 4288 | ||
3962 | TRACE_EXIT(dev->name); | 4289 | out: |
4290 | if (err) { | ||
4291 | printk(KERN_WARNING "%s: Resetting instead...\n", dev->name); | ||
4292 | schedule_work(&priv->reset_work); | ||
4293 | err = 0; | ||
4294 | } | ||
3963 | 4295 | ||
4296 | orinoco_unlock(priv, &flags); | ||
3964 | return err; | 4297 | return err; |
3965 | } | 4298 | } |
3966 | 4299 | ||
3967 | struct { | 4300 | static const struct iw_priv_args orinoco_privtab[] = { |
3968 | u16 rid; | 4301 | { SIOCIWFIRSTPRIV + 0x0, 0, 0, "force_reset" }, |
3969 | char *name; | 4302 | { SIOCIWFIRSTPRIV + 0x1, 0, 0, "card_reset" }, |
3970 | int displaytype; | 4303 | { SIOCIWFIRSTPRIV + 0x2, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, |
3971 | #define DISPLAY_WORDS 0 | 4304 | 0, "set_port3" }, |
3972 | #define DISPLAY_BYTES 1 | 4305 | { SIOCIWFIRSTPRIV + 0x3, 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, |
3973 | #define DISPLAY_STRING 2 | 4306 | "get_port3" }, |
3974 | #define DISPLAY_XSTRING 3 | 4307 | { SIOCIWFIRSTPRIV + 0x4, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, |
3975 | } record_table[] = { | 4308 | 0, "set_preamble" }, |
3976 | #define DEBUG_REC(name,type) { HERMES_RID_##name, #name, DISPLAY_##type } | 4309 | { SIOCIWFIRSTPRIV + 0x5, 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, |
3977 | DEBUG_REC(CNFPORTTYPE,WORDS), | 4310 | "get_preamble" }, |
3978 | DEBUG_REC(CNFOWNMACADDR,BYTES), | 4311 | { SIOCIWFIRSTPRIV + 0x6, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, |
3979 | DEBUG_REC(CNFDESIREDSSID,STRING), | 4312 | 0, "set_ibssport" }, |
3980 | DEBUG_REC(CNFOWNCHANNEL,WORDS), | 4313 | { SIOCIWFIRSTPRIV + 0x7, 0, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, |
3981 | DEBUG_REC(CNFOWNSSID,STRING), | 4314 | "get_ibssport" }, |
3982 | DEBUG_REC(CNFOWNATIMWINDOW,WORDS), | 4315 | { SIOCIWFIRSTPRIV + 0x9, 0, IW_PRIV_TYPE_BYTE | MAX_RID_LEN, |
3983 | DEBUG_REC(CNFSYSTEMSCALE,WORDS), | 4316 | "get_rid" }, |
3984 | DEBUG_REC(CNFMAXDATALEN,WORDS), | ||
3985 | DEBUG_REC(CNFPMENABLED,WORDS), | ||
3986 | DEBUG_REC(CNFPMEPS,WORDS), | ||
3987 | DEBUG_REC(CNFMULTICASTRECEIVE,WORDS), | ||
3988 | DEBUG_REC(CNFMAXSLEEPDURATION,WORDS), | ||
3989 | DEBUG_REC(CNFPMHOLDOVERDURATION,WORDS), | ||
3990 | DEBUG_REC(CNFOWNNAME,STRING), | ||
3991 | DEBUG_REC(CNFOWNDTIMPERIOD,WORDS), | ||
3992 | DEBUG_REC(CNFMULTICASTPMBUFFERING,WORDS), | ||
3993 | DEBUG_REC(CNFWEPENABLED_AGERE,WORDS), | ||
3994 | DEBUG_REC(CNFMANDATORYBSSID_SYMBOL,WORDS), | ||
3995 | DEBUG_REC(CNFWEPDEFAULTKEYID,WORDS), | ||
3996 | DEBUG_REC(CNFDEFAULTKEY0,BYTES), | ||
3997 | DEBUG_REC(CNFDEFAULTKEY1,BYTES), | ||
3998 | DEBUG_REC(CNFMWOROBUST_AGERE,WORDS), | ||
3999 | DEBUG_REC(CNFDEFAULTKEY2,BYTES), | ||
4000 | DEBUG_REC(CNFDEFAULTKEY3,BYTES), | ||
4001 | DEBUG_REC(CNFWEPFLAGS_INTERSIL,WORDS), | ||
4002 | DEBUG_REC(CNFWEPKEYMAPPINGTABLE,WORDS), | ||
4003 | DEBUG_REC(CNFAUTHENTICATION,WORDS), | ||
4004 | DEBUG_REC(CNFMAXASSOCSTA,WORDS), | ||
4005 | DEBUG_REC(CNFKEYLENGTH_SYMBOL,WORDS), | ||
4006 | DEBUG_REC(CNFTXCONTROL,WORDS), | ||
4007 | DEBUG_REC(CNFROAMINGMODE,WORDS), | ||
4008 | DEBUG_REC(CNFHOSTAUTHENTICATION,WORDS), | ||
4009 | DEBUG_REC(CNFRCVCRCERROR,WORDS), | ||
4010 | DEBUG_REC(CNFMMLIFE,WORDS), | ||
4011 | DEBUG_REC(CNFALTRETRYCOUNT,WORDS), | ||
4012 | DEBUG_REC(CNFBEACONINT,WORDS), | ||
4013 | DEBUG_REC(CNFAPPCFINFO,WORDS), | ||
4014 | DEBUG_REC(CNFSTAPCFINFO,WORDS), | ||
4015 | DEBUG_REC(CNFPRIORITYQUSAGE,WORDS), | ||
4016 | DEBUG_REC(CNFTIMCTRL,WORDS), | ||
4017 | DEBUG_REC(CNFTHIRTY2TALLY,WORDS), | ||
4018 | DEBUG_REC(CNFENHSECURITY,WORDS), | ||
4019 | DEBUG_REC(CNFGROUPADDRESSES,BYTES), | ||
4020 | DEBUG_REC(CNFCREATEIBSS,WORDS), | ||
4021 | DEBUG_REC(CNFFRAGMENTATIONTHRESHOLD,WORDS), | ||
4022 | DEBUG_REC(CNFRTSTHRESHOLD,WORDS), | ||
4023 | DEBUG_REC(CNFTXRATECONTROL,WORDS), | ||
4024 | DEBUG_REC(CNFPROMISCUOUSMODE,WORDS), | ||
4025 | DEBUG_REC(CNFBASICRATES_SYMBOL,WORDS), | ||
4026 | DEBUG_REC(CNFPREAMBLE_SYMBOL,WORDS), | ||
4027 | DEBUG_REC(CNFSHORTPREAMBLE,WORDS), | ||
4028 | DEBUG_REC(CNFWEPKEYS_AGERE,BYTES), | ||
4029 | DEBUG_REC(CNFEXCLUDELONGPREAMBLE,WORDS), | ||
4030 | DEBUG_REC(CNFTXKEY_AGERE,WORDS), | ||
4031 | DEBUG_REC(CNFAUTHENTICATIONRSPTO,WORDS), | ||
4032 | DEBUG_REC(CNFBASICRATES,WORDS), | ||
4033 | DEBUG_REC(CNFSUPPORTEDRATES,WORDS), | ||
4034 | DEBUG_REC(CNFTICKTIME,WORDS), | ||
4035 | DEBUG_REC(CNFSCANREQUEST,WORDS), | ||
4036 | DEBUG_REC(CNFJOINREQUEST,WORDS), | ||
4037 | DEBUG_REC(CNFAUTHENTICATESTATION,WORDS), | ||
4038 | DEBUG_REC(CNFCHANNELINFOREQUEST,WORDS), | ||
4039 | DEBUG_REC(MAXLOADTIME,WORDS), | ||
4040 | DEBUG_REC(DOWNLOADBUFFER,WORDS), | ||
4041 | DEBUG_REC(PRIID,WORDS), | ||
4042 | DEBUG_REC(PRISUPRANGE,WORDS), | ||
4043 | DEBUG_REC(CFIACTRANGES,WORDS), | ||
4044 | DEBUG_REC(NICSERNUM,XSTRING), | ||
4045 | DEBUG_REC(NICID,WORDS), | ||
4046 | DEBUG_REC(MFISUPRANGE,WORDS), | ||
4047 | DEBUG_REC(CFISUPRANGE,WORDS), | ||
4048 | DEBUG_REC(CHANNELLIST,WORDS), | ||
4049 | DEBUG_REC(REGULATORYDOMAINS,WORDS), | ||
4050 | DEBUG_REC(TEMPTYPE,WORDS), | ||
4051 | /* DEBUG_REC(CIS,BYTES), */ | ||
4052 | DEBUG_REC(STAID,WORDS), | ||
4053 | DEBUG_REC(CURRENTSSID,STRING), | ||
4054 | DEBUG_REC(CURRENTBSSID,BYTES), | ||
4055 | DEBUG_REC(COMMSQUALITY,WORDS), | ||
4056 | DEBUG_REC(CURRENTTXRATE,WORDS), | ||
4057 | DEBUG_REC(CURRENTBEACONINTERVAL,WORDS), | ||
4058 | DEBUG_REC(CURRENTSCALETHRESHOLDS,WORDS), | ||
4059 | DEBUG_REC(PROTOCOLRSPTIME,WORDS), | ||
4060 | DEBUG_REC(SHORTRETRYLIMIT,WORDS), | ||
4061 | DEBUG_REC(LONGRETRYLIMIT,WORDS), | ||
4062 | DEBUG_REC(MAXTRANSMITLIFETIME,WORDS), | ||
4063 | DEBUG_REC(MAXRECEIVELIFETIME,WORDS), | ||
4064 | DEBUG_REC(CFPOLLABLE,WORDS), | ||
4065 | DEBUG_REC(AUTHENTICATIONALGORITHMS,WORDS), | ||
4066 | DEBUG_REC(PRIVACYOPTIONIMPLEMENTED,WORDS), | ||
4067 | DEBUG_REC(OWNMACADDR,BYTES), | ||
4068 | DEBUG_REC(SCANRESULTSTABLE,WORDS), | ||
4069 | DEBUG_REC(PHYTYPE,WORDS), | ||
4070 | DEBUG_REC(CURRENTCHANNEL,WORDS), | ||
4071 | DEBUG_REC(CURRENTPOWERSTATE,WORDS), | ||
4072 | DEBUG_REC(CCAMODE,WORDS), | ||
4073 | DEBUG_REC(SUPPORTEDDATARATES,WORDS), | ||
4074 | DEBUG_REC(BUILDSEQ,BYTES), | ||
4075 | DEBUG_REC(FWID,XSTRING) | ||
4076 | #undef DEBUG_REC | ||
4077 | }; | 4317 | }; |
4078 | 4318 | ||
4079 | #define DEBUG_LTV_SIZE 128 | ||
4080 | |||
4081 | static int orinoco_debug_dump_recs(struct net_device *dev) | ||
4082 | { | ||
4083 | struct orinoco_private *priv = netdev_priv(dev); | ||
4084 | hermes_t *hw = &priv->hw; | ||
4085 | u8 *val8; | ||
4086 | u16 *val16; | ||
4087 | int i,j; | ||
4088 | u16 length; | ||
4089 | int err; | ||
4090 | |||
4091 | /* I'm not sure: we might have a lock here, so we'd better go | ||
4092 | atomic, just in case. */ | ||
4093 | val8 = kmalloc(DEBUG_LTV_SIZE + 2, GFP_ATOMIC); | ||
4094 | if (! val8) | ||
4095 | return -ENOMEM; | ||
4096 | val16 = (u16 *)val8; | ||
4097 | |||
4098 | for (i = 0; i < ARRAY_SIZE(record_table); i++) { | ||
4099 | u16 rid = record_table[i].rid; | ||
4100 | int len; | ||
4101 | 4319 | ||
4102 | memset(val8, 0, DEBUG_LTV_SIZE + 2); | 4320 | /* |
4103 | 4321 | * Structures to export the Wireless Handlers | |
4104 | err = hermes_read_ltv(hw, USER_BAP, rid, DEBUG_LTV_SIZE, | 4322 | */ |
4105 | &length, val8); | ||
4106 | if (err) { | ||
4107 | DEBUG(0, "Error %d reading RID 0x%04x\n", err, rid); | ||
4108 | continue; | ||
4109 | } | ||
4110 | val16 = (u16 *)val8; | ||
4111 | if (length == 0) | ||
4112 | continue; | ||
4113 | |||
4114 | printk(KERN_DEBUG "%-15s (0x%04x): length=%d (%d bytes)\tvalue=", | ||
4115 | record_table[i].name, | ||
4116 | rid, length, (length-1)*2); | ||
4117 | len = min(((int)length-1)*2, DEBUG_LTV_SIZE); | ||
4118 | |||
4119 | switch (record_table[i].displaytype) { | ||
4120 | case DISPLAY_WORDS: | ||
4121 | for (j = 0; j < len / 2; j++) | ||
4122 | printk("%04X-", le16_to_cpu(val16[j])); | ||
4123 | break; | ||
4124 | 4323 | ||
4125 | case DISPLAY_BYTES: | 4324 | static const iw_handler orinoco_handler[] = { |
4126 | default: | 4325 | [SIOCSIWCOMMIT-SIOCIWFIRST] (iw_handler) orinoco_ioctl_commit, |
4127 | for (j = 0; j < len; j++) | 4326 | [SIOCGIWNAME -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getname, |
4128 | printk("%02X:", val8[j]); | 4327 | [SIOCSIWFREQ -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setfreq, |
4129 | break; | 4328 | [SIOCGIWFREQ -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getfreq, |
4329 | [SIOCSIWMODE -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setmode, | ||
4330 | [SIOCGIWMODE -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getmode, | ||
4331 | [SIOCSIWSENS -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setsens, | ||
4332 | [SIOCGIWSENS -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getsens, | ||
4333 | [SIOCGIWRANGE -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getiwrange, | ||
4334 | [SIOCSIWSPY -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setspy, | ||
4335 | [SIOCGIWSPY -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getspy, | ||
4336 | [SIOCSIWAP -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setwap, | ||
4337 | [SIOCGIWAP -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getwap, | ||
4338 | [SIOCSIWSCAN -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setscan, | ||
4339 | [SIOCGIWSCAN -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getscan, | ||
4340 | [SIOCSIWESSID -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setessid, | ||
4341 | [SIOCGIWESSID -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getessid, | ||
4342 | [SIOCSIWNICKN -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setnick, | ||
4343 | [SIOCGIWNICKN -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getnick, | ||
4344 | [SIOCSIWRATE -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setrate, | ||
4345 | [SIOCGIWRATE -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getrate, | ||
4346 | [SIOCSIWRTS -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setrts, | ||
4347 | [SIOCGIWRTS -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getrts, | ||
4348 | [SIOCSIWFRAG -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setfrag, | ||
4349 | [SIOCGIWFRAG -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getfrag, | ||
4350 | [SIOCGIWRETRY -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getretry, | ||
4351 | [SIOCSIWENCODE-SIOCIWFIRST] (iw_handler) orinoco_ioctl_setiwencode, | ||
4352 | [SIOCGIWENCODE-SIOCIWFIRST] (iw_handler) orinoco_ioctl_getiwencode, | ||
4353 | [SIOCSIWPOWER -SIOCIWFIRST] (iw_handler) orinoco_ioctl_setpower, | ||
4354 | [SIOCGIWPOWER -SIOCIWFIRST] (iw_handler) orinoco_ioctl_getpower, | ||
4355 | }; | ||
4130 | 4356 | ||
4131 | case DISPLAY_STRING: | ||
4132 | len = min(len, le16_to_cpu(val16[0])+2); | ||
4133 | val8[len] = '\0'; | ||
4134 | printk("\"%s\"", (char *)&val16[1]); | ||
4135 | break; | ||
4136 | 4357 | ||
4137 | case DISPLAY_XSTRING: | 4358 | /* |
4138 | printk("'%s'", (char *)val8); | 4359 | Added typecasting since we no longer use iwreq_data -- Moustafa |
4139 | } | 4360 | */ |
4361 | static const iw_handler orinoco_private_handler[] = { | ||
4362 | [0] (iw_handler) orinoco_ioctl_reset, | ||
4363 | [1] (iw_handler) orinoco_ioctl_reset, | ||
4364 | [2] (iw_handler) orinoco_ioctl_setport3, | ||
4365 | [3] (iw_handler) orinoco_ioctl_getport3, | ||
4366 | [4] (iw_handler) orinoco_ioctl_setpreamble, | ||
4367 | [5] (iw_handler) orinoco_ioctl_getpreamble, | ||
4368 | [6] (iw_handler) orinoco_ioctl_setibssport, | ||
4369 | [7] (iw_handler) orinoco_ioctl_getibssport, | ||
4370 | [9] (iw_handler) orinoco_ioctl_getrid, | ||
4371 | }; | ||
4140 | 4372 | ||
4141 | printk("\n"); | 4373 | static const struct iw_handler_def orinoco_handler_def = { |
4142 | } | 4374 | .num_standard = ARRAY_SIZE(orinoco_handler), |
4375 | .num_private = ARRAY_SIZE(orinoco_private_handler), | ||
4376 | .num_private_args = ARRAY_SIZE(orinoco_privtab), | ||
4377 | .standard = orinoco_handler, | ||
4378 | .private = orinoco_private_handler, | ||
4379 | .private_args = orinoco_privtab, | ||
4380 | }; | ||
4143 | 4381 | ||
4144 | kfree(val8); | 4382 | static void orinoco_get_drvinfo(struct net_device *dev, |
4383 | struct ethtool_drvinfo *info) | ||
4384 | { | ||
4385 | struct orinoco_private *priv = netdev_priv(dev); | ||
4145 | 4386 | ||
4146 | return 0; | 4387 | strncpy(info->driver, DRIVER_NAME, sizeof(info->driver) - 1); |
4388 | strncpy(info->version, DRIVER_VERSION, sizeof(info->version) - 1); | ||
4389 | strncpy(info->fw_version, priv->fw_name, sizeof(info->fw_version) - 1); | ||
4390 | if (dev->class_dev.dev) | ||
4391 | strncpy(info->bus_info, dev->class_dev.dev->bus_id, | ||
4392 | sizeof(info->bus_info) - 1); | ||
4393 | else | ||
4394 | snprintf(info->bus_info, sizeof(info->bus_info) - 1, | ||
4395 | "PCMCIA %p", priv->hw.iobase); | ||
4147 | } | 4396 | } |
4148 | 4397 | ||
4398 | static struct ethtool_ops orinoco_ethtool_ops = { | ||
4399 | .get_drvinfo = orinoco_get_drvinfo, | ||
4400 | .get_link = ethtool_op_get_link, | ||
4401 | }; | ||
4402 | |||
4149 | /********************************************************************/ | 4403 | /********************************************************************/ |
4150 | /* Debugging */ | 4404 | /* Debugging */ |
4151 | /********************************************************************/ | 4405 | /********************************************************************/ |
@@ -4218,7 +4472,6 @@ EXPORT_SYMBOL(free_orinocodev); | |||
4218 | 4472 | ||
4219 | EXPORT_SYMBOL(__orinoco_up); | 4473 | EXPORT_SYMBOL(__orinoco_up); |
4220 | EXPORT_SYMBOL(__orinoco_down); | 4474 | EXPORT_SYMBOL(__orinoco_down); |
4221 | EXPORT_SYMBOL(orinoco_stop); | ||
4222 | EXPORT_SYMBOL(orinoco_reinit_firmware); | 4475 | EXPORT_SYMBOL(orinoco_reinit_firmware); |
4223 | 4476 | ||
4224 | EXPORT_SYMBOL(orinoco_interrupt); | 4477 | EXPORT_SYMBOL(orinoco_interrupt); |
diff --git a/drivers/net/wireless/orinoco.h b/drivers/net/wireless/orinoco.h index 13e42c2afb27..2f213a7103fe 100644 --- a/drivers/net/wireless/orinoco.h +++ b/drivers/net/wireless/orinoco.h | |||
@@ -7,7 +7,7 @@ | |||
7 | #ifndef _ORINOCO_H | 7 | #ifndef _ORINOCO_H |
8 | #define _ORINOCO_H | 8 | #define _ORINOCO_H |
9 | 9 | ||
10 | #define DRIVER_VERSION "0.14alpha2" | 10 | #define DRIVER_VERSION "0.15rc2" |
11 | 11 | ||
12 | #include <linux/types.h> | 12 | #include <linux/types.h> |
13 | #include <linux/spinlock.h> | 13 | #include <linux/spinlock.h> |
@@ -22,6 +22,8 @@ | |||
22 | 22 | ||
23 | #define WIRELESS_SPY // enable iwspy support | 23 | #define WIRELESS_SPY // enable iwspy support |
24 | 24 | ||
25 | #define MAX_SCAN_LEN 4096 | ||
26 | |||
25 | #define ORINOCO_MAX_KEY_SIZE 14 | 27 | #define ORINOCO_MAX_KEY_SIZE 14 |
26 | #define ORINOCO_MAX_KEYS 4 | 28 | #define ORINOCO_MAX_KEYS 4 |
27 | 29 | ||
@@ -30,6 +32,20 @@ struct orinoco_key { | |||
30 | char data[ORINOCO_MAX_KEY_SIZE]; | 32 | char data[ORINOCO_MAX_KEY_SIZE]; |
31 | } __attribute__ ((packed)); | 33 | } __attribute__ ((packed)); |
32 | 34 | ||
35 | struct header_struct { | ||
36 | /* 802.3 */ | ||
37 | u8 dest[ETH_ALEN]; | ||
38 | u8 src[ETH_ALEN]; | ||
39 | u16 len; | ||
40 | /* 802.2 */ | ||
41 | u8 dsap; | ||
42 | u8 ssap; | ||
43 | u8 ctrl; | ||
44 | /* SNAP */ | ||
45 | u8 oui[3]; | ||
46 | u16 ethertype; | ||
47 | } __attribute__ ((packed)); | ||
48 | |||
33 | typedef enum { | 49 | typedef enum { |
34 | FIRMWARE_TYPE_AGERE, | 50 | FIRMWARE_TYPE_AGERE, |
35 | FIRMWARE_TYPE_INTERSIL, | 51 | FIRMWARE_TYPE_INTERSIL, |
@@ -48,6 +64,8 @@ struct orinoco_private { | |||
48 | /* driver state */ | 64 | /* driver state */ |
49 | int open; | 65 | int open; |
50 | u16 last_linkstatus; | 66 | u16 last_linkstatus; |
67 | struct work_struct join_work; | ||
68 | struct work_struct wevent_work; | ||
51 | 69 | ||
52 | /* Net device stuff */ | 70 | /* Net device stuff */ |
53 | struct net_device *ndev; | 71 | struct net_device *ndev; |
@@ -74,7 +92,9 @@ struct orinoco_private { | |||
74 | unsigned int has_pm:1; | 92 | unsigned int has_pm:1; |
75 | unsigned int has_preamble:1; | 93 | unsigned int has_preamble:1; |
76 | unsigned int has_sensitivity:1; | 94 | unsigned int has_sensitivity:1; |
95 | unsigned int has_hostscan:1; | ||
77 | unsigned int broken_disableport:1; | 96 | unsigned int broken_disableport:1; |
97 | unsigned int broken_monitor:1; | ||
78 | 98 | ||
79 | /* Configuration paramaters */ | 99 | /* Configuration paramaters */ |
80 | u32 iw_mode; | 100 | u32 iw_mode; |
@@ -84,6 +104,8 @@ struct orinoco_private { | |||
84 | int bitratemode; | 104 | int bitratemode; |
85 | char nick[IW_ESSID_MAX_SIZE+1]; | 105 | char nick[IW_ESSID_MAX_SIZE+1]; |
86 | char desired_essid[IW_ESSID_MAX_SIZE+1]; | 106 | char desired_essid[IW_ESSID_MAX_SIZE+1]; |
107 | char desired_bssid[ETH_ALEN]; | ||
108 | int bssid_fixed; | ||
87 | u16 frag_thresh, mwo_robust; | 109 | u16 frag_thresh, mwo_robust; |
88 | u16 channel; | 110 | u16 channel; |
89 | u16 ap_density, rts_thresh; | 111 | u16 ap_density, rts_thresh; |
@@ -98,6 +120,12 @@ struct orinoco_private { | |||
98 | /* Configuration dependent variables */ | 120 | /* Configuration dependent variables */ |
99 | int port_type, createibss; | 121 | int port_type, createibss; |
100 | int promiscuous, mc_count; | 122 | int promiscuous, mc_count; |
123 | |||
124 | /* Scanning support */ | ||
125 | int scan_inprogress; /* Scan pending... */ | ||
126 | u32 scan_mode; /* Type of scan done */ | ||
127 | char * scan_result; /* Result of previous scan */ | ||
128 | int scan_len; /* Lenght of result */ | ||
101 | }; | 129 | }; |
102 | 130 | ||
103 | #ifdef ORINOCO_DEBUG | 131 | #ifdef ORINOCO_DEBUG |
@@ -119,7 +147,6 @@ extern struct net_device *alloc_orinocodev(int sizeof_card, | |||
119 | extern void free_orinocodev(struct net_device *dev); | 147 | extern void free_orinocodev(struct net_device *dev); |
120 | extern int __orinoco_up(struct net_device *dev); | 148 | extern int __orinoco_up(struct net_device *dev); |
121 | extern int __orinoco_down(struct net_device *dev); | 149 | extern int __orinoco_down(struct net_device *dev); |
122 | extern int orinoco_stop(struct net_device *dev); | ||
123 | extern int orinoco_reinit_firmware(struct net_device *dev); | 150 | extern int orinoco_reinit_firmware(struct net_device *dev); |
124 | extern irqreturn_t orinoco_interrupt(int irq, void * dev_id, struct pt_regs *regs); | 151 | extern irqreturn_t orinoco_interrupt(int irq, void * dev_id, struct pt_regs *regs); |
125 | 152 | ||
diff --git a/drivers/net/wireless/orinoco_cs.c b/drivers/net/wireless/orinoco_cs.c index 74a8227256aa..368d2f962f67 100644 --- a/drivers/net/wireless/orinoco_cs.c +++ b/drivers/net/wireless/orinoco_cs.c | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/etherdevice.h> | 31 | #include <linux/etherdevice.h> |
32 | #include <linux/wireless.h> | 32 | #include <linux/wireless.h> |
33 | 33 | ||
34 | #include <pcmcia/version.h> | ||
35 | #include <pcmcia/cs_types.h> | 34 | #include <pcmcia/cs_types.h> |
36 | #include <pcmcia/cs.h> | 35 | #include <pcmcia/cs.h> |
37 | #include <pcmcia/cistpl.h> | 36 | #include <pcmcia/cistpl.h> |
@@ -186,11 +185,6 @@ orinoco_cs_attach(void) | |||
186 | dev_list = link; | 185 | dev_list = link; |
187 | 186 | ||
188 | client_reg.dev_info = &dev_info; | 187 | client_reg.dev_info = &dev_info; |
189 | client_reg.EventMask = | ||
190 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
191 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
192 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
193 | client_reg.event_handler = &orinoco_cs_event; | ||
194 | client_reg.Version = 0x0210; /* FIXME: what does this mean? */ | 188 | client_reg.Version = 0x0210; /* FIXME: what does this mean? */ |
195 | client_reg.event_callback_args.client_data = link; | 189 | client_reg.event_callback_args.client_data = link; |
196 | 190 | ||
@@ -608,13 +602,65 @@ static char version[] __initdata = DRIVER_NAME " " DRIVER_VERSION | |||
608 | " (David Gibson <hermes@gibson.dropbear.id.au>, " | 602 | " (David Gibson <hermes@gibson.dropbear.id.au>, " |
609 | "Pavel Roskin <proski@gnu.org>, et al)"; | 603 | "Pavel Roskin <proski@gnu.org>, et al)"; |
610 | 604 | ||
605 | static struct pcmcia_device_id orinoco_cs_ids[] = { | ||
606 | PCMCIA_DEVICE_MANF_CARD(0x000b, 0x7300), | ||
607 | PCMCIA_DEVICE_MANF_CARD(0x0089, 0x0001), | ||
608 | PCMCIA_DEVICE_MANF_CARD(0x0138, 0x0002), | ||
609 | PCMCIA_DEVICE_MANF_CARD(0x0156, 0x0002), | ||
610 | PCMCIA_DEVICE_MANF_CARD(0x01eb, 0x080a), | ||
611 | PCMCIA_DEVICE_MANF_CARD(0x0261, 0x0002), | ||
612 | PCMCIA_DEVICE_MANF_CARD(0x0268, 0x0001), | ||
613 | PCMCIA_DEVICE_MANF_CARD(0x026f, 0x0305), | ||
614 | PCMCIA_DEVICE_MANF_CARD(0x0274, 0x1613), | ||
615 | PCMCIA_DEVICE_MANF_CARD(0x028a, 0x0002), | ||
616 | PCMCIA_DEVICE_MANF_CARD(0x028a, 0x0673), | ||
617 | PCMCIA_DEVICE_MANF_CARD(0x02aa, 0x0002), | ||
618 | PCMCIA_DEVICE_MANF_CARD(0x02ac, 0x0002), | ||
619 | PCMCIA_DEVICE_MANF_CARD(0x14ea, 0xb001), | ||
620 | PCMCIA_DEVICE_MANF_CARD(0x50c2, 0x7300), | ||
621 | PCMCIA_DEVICE_MANF_CARD(0x9005, 0x0021), | ||
622 | PCMCIA_DEVICE_MANF_CARD(0xc250, 0x0002), | ||
623 | PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0002), | ||
624 | PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0002), | ||
625 | PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0005), | ||
626 | PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0005), | ||
627 | PCMCIA_DEVICE_PROD_ID12("3Com", "3CRWE737A AirConnect Wireless LAN PC Card", 0x41240e5b, 0x56010af3), | ||
628 | PCMCIA_DEVICE_PROD_ID123("Instant Wireless ", " Network PC CARD", "Version 01.02", 0x11d901af, 0x6e9bd926, 0x4b74baa0), | ||
629 | PCMCIA_DEVICE_PROD_ID12("ACTIONTEC", "PRISM Wireless LAN PC Card", 0x393089da, 0xa71e69d5), | ||
630 | PCMCIA_DEVICE_PROD_ID12("Avaya Communication", "Avaya Wireless PC Card", 0xd8a43b78, 0x0d341169), | ||
631 | PCMCIA_DEVICE_PROD_ID12("BUFFALO", "WLI-PCM-L11G", 0x2decece3, 0xf57ca4b3), | ||
632 | PCMCIA_DEVICE_PROD_ID12("Cabletron", "RoamAbout 802.11 DS", 0x32d445f5, 0xedeffd90), | ||
633 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "Wireless LAN PCC-11", 0x5261440f, 0xa6405584), | ||
634 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "Wireless LAN PCCA-11", 0x5261440f, 0xdf6115f9), | ||
635 | PCMCIA_DEVICE_PROD_ID12("D", "Link DRC-650 11Mbps WLAN Card", 0x71b18589, 0xf144e3ac), | ||
636 | PCMCIA_DEVICE_PROD_ID12("D", "Link DWL-650 11Mbps WLAN Card", 0x71b18589, 0xb6f1b0ab), | ||
637 | PCMCIA_DEVICE_PROD_ID12("ELSA", "AirLancer MC-11", 0x4507a33a, 0xef54f0e3), | ||
638 | PCMCIA_DEVICE_PROD_ID12("HyperLink", "Wireless PC Card 11Mbps", 0x56cc3f1a, 0x0bcf220c), | ||
639 | PCMCIA_DEVICE_PROD_ID12("INTERSIL", "HFA384x/IEEE", 0x74c5e40d, 0xdb472a18), | ||
640 | PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/IEEE", 0x23eb9949, 0xc562e72a), | ||
641 | PCMCIA_DEVICE_PROD_ID12("MELCO", "WLI-PCM-L11", 0x481e0094, 0x7360e410), | ||
642 | PCMCIA_DEVICE_PROD_ID12("MELCO", "WLI-PCM-L11G", 0x481e0094, 0xf57ca4b3), | ||
643 | PCMCIA_DEVICE_PROD_ID12("Microsoft", "Wireless Notebook Adapter MN-520", 0x5961bf85, 0x6eec8c01), | ||
644 | PCMCIA_DEVICE_PROD_ID12("NCR", "WaveLAN/IEEE", 0x24358cd4, 0xc562e72a), | ||
645 | PCMCIA_DEVICE_PROD_ID12("NETGEAR MA401RA Wireless PC", "Card", 0x0306467f, 0x9762e8f1), | ||
646 | PCMCIA_DEVICE_PROD_ID12("PLANEX", "GeoWave/GW-CF110", 0x209f40ab, 0xd9715264), | ||
647 | PCMCIA_DEVICE_PROD_ID12("PROXIM", "LAN PC CARD HARMONY 80211B", 0xc6536a5e, 0x090c3cd9), | ||
648 | PCMCIA_DEVICE_PROD_ID12("PROXIM", "LAN PCI CARD HARMONY 80211B", 0xc6536a5e, 0x9f494e26), | ||
649 | PCMCIA_DEVICE_PROD_ID12("SAMSUNG", "11Mbps WLAN Card", 0x43d74cb4, 0x579bd91b), | ||
650 | PCMCIA_DEVICE_PROD_ID1("Symbol Technologies", 0x3f02b4d6), | ||
651 | PCMCIA_DEVICE_NULL, | ||
652 | }; | ||
653 | MODULE_DEVICE_TABLE(pcmcia, orinoco_cs_ids); | ||
654 | |||
611 | static struct pcmcia_driver orinoco_driver = { | 655 | static struct pcmcia_driver orinoco_driver = { |
612 | .owner = THIS_MODULE, | 656 | .owner = THIS_MODULE, |
613 | .drv = { | 657 | .drv = { |
614 | .name = DRIVER_NAME, | 658 | .name = DRIVER_NAME, |
615 | }, | 659 | }, |
616 | .attach = orinoco_cs_attach, | 660 | .attach = orinoco_cs_attach, |
661 | .event = orinoco_cs_event, | ||
617 | .detach = orinoco_cs_detach, | 662 | .detach = orinoco_cs_detach, |
663 | .id_table = orinoco_cs_ids, | ||
618 | }; | 664 | }; |
619 | 665 | ||
620 | static int __init | 666 | static int __init |
diff --git a/drivers/net/wireless/prism54/isl_38xx.c b/drivers/net/wireless/prism54/isl_38xx.c index 4481ec18c5a0..adc7499136dc 100644 --- a/drivers/net/wireless/prism54/isl_38xx.c +++ b/drivers/net/wireless/prism54/isl_38xx.c | |||
@@ -112,10 +112,10 @@ isl38xx_handle_wakeup(isl38xx_control_block *control_block, | |||
112 | void | 112 | void |
113 | isl38xx_trigger_device(int asleep, void __iomem *device_base) | 113 | isl38xx_trigger_device(int asleep, void __iomem *device_base) |
114 | { | 114 | { |
115 | struct timeval current_time; | ||
116 | u32 reg, counter = 0; | 115 | u32 reg, counter = 0; |
117 | 116 | ||
118 | #if VERBOSE > SHOW_ERROR_MESSAGES | 117 | #if VERBOSE > SHOW_ERROR_MESSAGES |
118 | struct timeval current_time; | ||
119 | DEBUG(SHOW_FUNCTION_CALLS, "isl38xx trigger device\n"); | 119 | DEBUG(SHOW_FUNCTION_CALLS, "isl38xx trigger device\n"); |
120 | #endif | 120 | #endif |
121 | 121 | ||
@@ -126,11 +126,11 @@ isl38xx_trigger_device(int asleep, void __iomem *device_base) | |||
126 | do_gettimeofday(¤t_time); | 126 | do_gettimeofday(¤t_time); |
127 | DEBUG(SHOW_TRACING, "%08li.%08li Device wakeup triggered\n", | 127 | DEBUG(SHOW_TRACING, "%08li.%08li Device wakeup triggered\n", |
128 | current_time.tv_sec, (long)current_time.tv_usec); | 128 | current_time.tv_sec, (long)current_time.tv_usec); |
129 | #endif | ||
130 | 129 | ||
131 | DEBUG(SHOW_TRACING, "%08li.%08li Device register read %08x\n", | 130 | DEBUG(SHOW_TRACING, "%08li.%08li Device register read %08x\n", |
132 | current_time.tv_sec, (long)current_time.tv_usec, | 131 | current_time.tv_sec, (long)current_time.tv_usec, |
133 | readl(device_base + ISL38XX_CTRL_STAT_REG)); | 132 | readl(device_base + ISL38XX_CTRL_STAT_REG)); |
133 | #endif | ||
134 | udelay(ISL38XX_WRITEIO_DELAY); | 134 | udelay(ISL38XX_WRITEIO_DELAY); |
135 | 135 | ||
136 | reg = readl(device_base + ISL38XX_INT_IDENT_REG); | 136 | reg = readl(device_base + ISL38XX_INT_IDENT_REG); |
@@ -148,10 +148,12 @@ isl38xx_trigger_device(int asleep, void __iomem *device_base) | |||
148 | counter++; | 148 | counter++; |
149 | } | 149 | } |
150 | 150 | ||
151 | #if VERBOSE > SHOW_ERROR_MESSAGES | ||
151 | DEBUG(SHOW_TRACING, | 152 | DEBUG(SHOW_TRACING, |
152 | "%08li.%08li Device register read %08x\n", | 153 | "%08li.%08li Device register read %08x\n", |
153 | current_time.tv_sec, (long)current_time.tv_usec, | 154 | current_time.tv_sec, (long)current_time.tv_usec, |
154 | readl(device_base + ISL38XX_CTRL_STAT_REG)); | 155 | readl(device_base + ISL38XX_CTRL_STAT_REG)); |
156 | #endif | ||
155 | udelay(ISL38XX_WRITEIO_DELAY); | 157 | udelay(ISL38XX_WRITEIO_DELAY); |
156 | 158 | ||
157 | #if VERBOSE > SHOW_ERROR_MESSAGES | 159 | #if VERBOSE > SHOW_ERROR_MESSAGES |
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c index 6e5bda56b8f8..0e0ba614259a 100644 --- a/drivers/net/wireless/ray_cs.c +++ b/drivers/net/wireless/ray_cs.c | |||
@@ -46,7 +46,6 @@ | |||
46 | #include <linux/skbuff.h> | 46 | #include <linux/skbuff.h> |
47 | #include <linux/ethtool.h> | 47 | #include <linux/ethtool.h> |
48 | 48 | ||
49 | #include <pcmcia/version.h> | ||
50 | #include <pcmcia/cs_types.h> | 49 | #include <pcmcia/cs_types.h> |
51 | #include <pcmcia/cs.h> | 50 | #include <pcmcia/cs.h> |
52 | #include <pcmcia/cistpl.h> | 51 | #include <pcmcia/cistpl.h> |
@@ -393,11 +392,6 @@ static dev_link_t *ray_attach(void) | |||
393 | link->next = dev_list; | 392 | link->next = dev_list; |
394 | dev_list = link; | 393 | dev_list = link; |
395 | client_reg.dev_info = &dev_info; | 394 | client_reg.dev_info = &dev_info; |
396 | client_reg.EventMask = | ||
397 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
398 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
399 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
400 | client_reg.event_handler = &ray_event; | ||
401 | client_reg.Version = 0x0210; | 395 | client_reg.Version = 0x0210; |
402 | client_reg.event_callback_args.client_data = link; | 396 | client_reg.event_callback_args.client_data = link; |
403 | 397 | ||
@@ -2904,13 +2898,21 @@ static int write_int(struct file *file, const char __user *buffer, unsigned long | |||
2904 | } | 2898 | } |
2905 | #endif | 2899 | #endif |
2906 | 2900 | ||
2901 | static struct pcmcia_device_id ray_ids[] = { | ||
2902 | PCMCIA_DEVICE_MANF_CARD(0x01a6, 0x0000), | ||
2903 | PCMCIA_DEVICE_NULL, | ||
2904 | }; | ||
2905 | MODULE_DEVICE_TABLE(pcmcia, ray_ids); | ||
2906 | |||
2907 | static struct pcmcia_driver ray_driver = { | 2907 | static struct pcmcia_driver ray_driver = { |
2908 | .owner = THIS_MODULE, | 2908 | .owner = THIS_MODULE, |
2909 | .drv = { | 2909 | .drv = { |
2910 | .name = "ray_cs", | 2910 | .name = "ray_cs", |
2911 | }, | 2911 | }, |
2912 | .attach = ray_attach, | 2912 | .attach = ray_attach, |
2913 | .event = ray_event, | ||
2913 | .detach = ray_detach, | 2914 | .detach = ray_detach, |
2915 | .id_table = ray_ids, | ||
2914 | }; | 2916 | }; |
2915 | 2917 | ||
2916 | static int __init init_ray_cs(void) | 2918 | static int __init init_ray_cs(void) |
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c index ec8cf29ffced..6c42b573a95a 100644 --- a/drivers/net/wireless/strip.c +++ b/drivers/net/wireless/strip.c | |||
@@ -2828,7 +2828,7 @@ static void __exit strip_exit_driver(void) | |||
2828 | /* Unregister with the /proc/net file here. */ | 2828 | /* Unregister with the /proc/net file here. */ |
2829 | proc_net_remove("strip"); | 2829 | proc_net_remove("strip"); |
2830 | 2830 | ||
2831 | if ((i = tty_register_ldisc(N_STRIP, NULL))) | 2831 | if ((i = tty_unregister_ldisc(N_STRIP))) |
2832 | printk(KERN_ERR "STRIP: can't unregister line discipline (err = %d)\n", i); | 2832 | printk(KERN_ERR "STRIP: can't unregister line discipline (err = %d)\n", i); |
2833 | 2833 | ||
2834 | printk(signoff); | 2834 | printk(signoff); |
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c index ec8329788e49..f6130a53b796 100644 --- a/drivers/net/wireless/wavelan_cs.c +++ b/drivers/net/wireless/wavelan_cs.c | |||
@@ -4684,12 +4684,6 @@ wavelan_attach(void) | |||
4684 | 4684 | ||
4685 | /* Register with Card Services */ | 4685 | /* Register with Card Services */ |
4686 | client_reg.dev_info = &dev_info; | 4686 | client_reg.dev_info = &dev_info; |
4687 | client_reg.EventMask = | ||
4688 | CS_EVENT_REGISTRATION_COMPLETE | | ||
4689 | CS_EVENT_CARD_INSERTION | CS_EVENT_CARD_REMOVAL | | ||
4690 | CS_EVENT_RESET_PHYSICAL | CS_EVENT_CARD_RESET | | ||
4691 | CS_EVENT_PM_SUSPEND | CS_EVENT_PM_RESUME; | ||
4692 | client_reg.event_handler = &wavelan_event; | ||
4693 | client_reg.Version = 0x0210; | 4687 | client_reg.Version = 0x0210; |
4694 | client_reg.event_callback_args.client_data = link; | 4688 | client_reg.event_callback_args.client_data = link; |
4695 | 4689 | ||
@@ -4889,13 +4883,24 @@ wavelan_event(event_t event, /* The event received */ | |||
4889 | return 0; | 4883 | return 0; |
4890 | } | 4884 | } |
4891 | 4885 | ||
4886 | static struct pcmcia_device_id wavelan_ids[] = { | ||
4887 | PCMCIA_DEVICE_PROD_ID12("AT&T","WaveLAN/PCMCIA", 0xe7c5affd, 0x1bc50975), | ||
4888 | PCMCIA_DEVICE_PROD_ID12("Digital", "RoamAbout/DS", 0x9999ab35, 0x00d05e06), | ||
4889 | PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/PCMCIA", 0x23eb9949, 0x1bc50975), | ||
4890 | PCMCIA_DEVICE_PROD_ID12("NCR", "WaveLAN/PCMCIA", 0x24358cd4, 0x1bc50975), | ||
4891 | PCMCIA_DEVICE_NULL, | ||
4892 | }; | ||
4893 | MODULE_DEVICE_TABLE(pcmcia, wavelan_ids); | ||
4894 | |||
4892 | static struct pcmcia_driver wavelan_driver = { | 4895 | static struct pcmcia_driver wavelan_driver = { |
4893 | .owner = THIS_MODULE, | 4896 | .owner = THIS_MODULE, |
4894 | .drv = { | 4897 | .drv = { |
4895 | .name = "wavelan_cs", | 4898 | .name = "wavelan_cs", |
4896 | }, | 4899 | }, |
4897 | .attach = wavelan_attach, | 4900 | .attach = wavelan_attach, |
4901 | .event = wavelan_event, | ||
4898 | .detach = wavelan_detach, | 4902 | .detach = wavelan_detach, |
4903 | .id_table = wavelan_ids, | ||
4899 | }; | 4904 | }; |
4900 | 4905 | ||
4901 | static int __init | 4906 | static int __init |
diff --git a/drivers/net/wireless/wavelan_cs.p.h b/drivers/net/wireless/wavelan_cs.p.h index ea2ef8dddb92..677ff71883cb 100644 --- a/drivers/net/wireless/wavelan_cs.p.h +++ b/drivers/net/wireless/wavelan_cs.p.h | |||
@@ -452,7 +452,6 @@ | |||
452 | #include <pcmcia/cistpl.h> | 452 | #include <pcmcia/cistpl.h> |
453 | #include <pcmcia/cisreg.h> | 453 | #include <pcmcia/cisreg.h> |
454 | #include <pcmcia/ds.h> | 454 | #include <pcmcia/ds.h> |
455 | #include <pcmcia/version.h> | ||
456 | 455 | ||
457 | /* Wavelan declarations */ | 456 | /* Wavelan declarations */ |
458 | #include "i82593.h" /* Definitions for the Intel chip */ | 457 | #include "i82593.h" /* Definitions for the Intel chip */ |
diff --git a/drivers/net/wireless/wl3501_cs.c b/drivers/net/wireless/wl3501_cs.c index 1433e5aaf1b4..dd902126d018 100644 --- a/drivers/net/wireless/wl3501_cs.c +++ b/drivers/net/wireless/wl3501_cs.c | |||
@@ -49,7 +49,6 @@ | |||
49 | 49 | ||
50 | #include <net/iw_handler.h> | 50 | #include <net/iw_handler.h> |
51 | 51 | ||
52 | #include <pcmcia/version.h> | ||
53 | #include <pcmcia/cs_types.h> | 52 | #include <pcmcia/cs_types.h> |
54 | #include <pcmcia/cs.h> | 53 | #include <pcmcia/cs.h> |
55 | #include <pcmcia/cistpl.h> | 54 | #include <pcmcia/cistpl.h> |
@@ -2005,13 +2004,6 @@ static dev_link_t *wl3501_attach(void) | |||
2005 | link->next = wl3501_dev_list; | 2004 | link->next = wl3501_dev_list; |
2006 | wl3501_dev_list = link; | 2005 | wl3501_dev_list = link; |
2007 | client_reg.dev_info = &wl3501_dev_info; | 2006 | client_reg.dev_info = &wl3501_dev_info; |
2008 | client_reg.EventMask = CS_EVENT_CARD_INSERTION | | ||
2009 | CS_EVENT_RESET_PHYSICAL | | ||
2010 | CS_EVENT_CARD_RESET | | ||
2011 | CS_EVENT_CARD_REMOVAL | | ||
2012 | CS_EVENT_PM_SUSPEND | | ||
2013 | CS_EVENT_PM_RESUME; | ||
2014 | client_reg.event_handler = wl3501_event; | ||
2015 | client_reg.Version = 0x0210; | 2007 | client_reg.Version = 0x0210; |
2016 | client_reg.event_callback_args.client_data = link; | 2008 | client_reg.event_callback_args.client_data = link; |
2017 | ret = pcmcia_register_client(&link->handle, &client_reg); | 2009 | ret = pcmcia_register_client(&link->handle, &client_reg); |
@@ -2239,13 +2231,21 @@ static int wl3501_event(event_t event, int pri, event_callback_args_t *args) | |||
2239 | return 0; | 2231 | return 0; |
2240 | } | 2232 | } |
2241 | 2233 | ||
2234 | static struct pcmcia_device_id wl3501_ids[] = { | ||
2235 | PCMCIA_DEVICE_MANF_CARD(0xd601, 0x0001), | ||
2236 | PCMCIA_DEVICE_NULL | ||
2237 | }; | ||
2238 | MODULE_DEVICE_TABLE(pcmcia, wl3501_ids); | ||
2239 | |||
2242 | static struct pcmcia_driver wl3501_driver = { | 2240 | static struct pcmcia_driver wl3501_driver = { |
2243 | .owner = THIS_MODULE, | 2241 | .owner = THIS_MODULE, |
2244 | .drv = { | 2242 | .drv = { |
2245 | .name = "wl3501_cs", | 2243 | .name = "wl3501_cs", |
2246 | }, | 2244 | }, |
2247 | .attach = wl3501_attach, | 2245 | .attach = wl3501_attach, |
2248 | .detach = wl3501_detach, | 2246 | .event = wl3501_event, |
2247 | .detach = wl3501_detach, | ||
2248 | .id_table = wl3501_ids, | ||
2249 | }; | 2249 | }; |
2250 | 2250 | ||
2251 | static int __init wl3501_init_module(void) | 2251 | static int __init wl3501_init_module(void) |
diff --git a/drivers/net/yellowfin.c b/drivers/net/yellowfin.c index 9da925430109..1c2506535f7e 100644 --- a/drivers/net/yellowfin.c +++ b/drivers/net/yellowfin.c | |||
@@ -786,7 +786,7 @@ static void yellowfin_init_ring(struct net_device *dev) | |||
786 | skb->dev = dev; /* Mark as being used by this device. */ | 786 | skb->dev = dev; /* Mark as being used by this device. */ |
787 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ | 787 | skb_reserve(skb, 2); /* 16 byte align the IP header. */ |
788 | yp->rx_ring[i].addr = cpu_to_le32(pci_map_single(yp->pci_dev, | 788 | yp->rx_ring[i].addr = cpu_to_le32(pci_map_single(yp->pci_dev, |
789 | skb->tail, yp->rx_buf_sz, PCI_DMA_FROMDEVICE)); | 789 | skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
790 | } | 790 | } |
791 | yp->rx_ring[i-1].dbdma_cmd = cpu_to_le32(CMD_STOP); | 791 | yp->rx_ring[i-1].dbdma_cmd = cpu_to_le32(CMD_STOP); |
792 | yp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); | 792 | yp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); |
@@ -1111,7 +1111,7 @@ static int yellowfin_rx(struct net_device *dev) | |||
1111 | pci_dma_sync_single_for_cpu(yp->pci_dev, desc->addr, | 1111 | pci_dma_sync_single_for_cpu(yp->pci_dev, desc->addr, |
1112 | yp->rx_buf_sz, PCI_DMA_FROMDEVICE); | 1112 | yp->rx_buf_sz, PCI_DMA_FROMDEVICE); |
1113 | desc_status = le32_to_cpu(desc->result_status) >> 16; | 1113 | desc_status = le32_to_cpu(desc->result_status) >> 16; |
1114 | buf_addr = rx_skb->tail; | 1114 | buf_addr = rx_skb->data; |
1115 | data_size = (le32_to_cpu(desc->dbdma_cmd) - | 1115 | data_size = (le32_to_cpu(desc->dbdma_cmd) - |
1116 | le32_to_cpu(desc->result_status)) & 0xffff; | 1116 | le32_to_cpu(desc->result_status)) & 0xffff; |
1117 | frame_status = le16_to_cpu(get_unaligned((s16*)&(buf_addr[data_size - 2]))); | 1117 | frame_status = le16_to_cpu(get_unaligned((s16*)&(buf_addr[data_size - 2]))); |
@@ -1185,7 +1185,7 @@ static int yellowfin_rx(struct net_device *dev) | |||
1185 | break; | 1185 | break; |
1186 | skb->dev = dev; | 1186 | skb->dev = dev; |
1187 | skb_reserve(skb, 2); /* 16 byte align the IP header */ | 1187 | skb_reserve(skb, 2); /* 16 byte align the IP header */ |
1188 | eth_copy_and_sum(skb, rx_skb->tail, pkt_len, 0); | 1188 | eth_copy_and_sum(skb, rx_skb->data, pkt_len, 0); |
1189 | skb_put(skb, pkt_len); | 1189 | skb_put(skb, pkt_len); |
1190 | pci_dma_sync_single_for_device(yp->pci_dev, desc->addr, | 1190 | pci_dma_sync_single_for_device(yp->pci_dev, desc->addr, |
1191 | yp->rx_buf_sz, | 1191 | yp->rx_buf_sz, |
@@ -1211,7 +1211,7 @@ static int yellowfin_rx(struct net_device *dev) | |||
1211 | skb->dev = dev; /* Mark as being used by this device. */ | 1211 | skb->dev = dev; /* Mark as being used by this device. */ |
1212 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ | 1212 | skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ |
1213 | yp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev, | 1213 | yp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(yp->pci_dev, |
1214 | skb->tail, yp->rx_buf_sz, PCI_DMA_FROMDEVICE)); | 1214 | skb->data, yp->rx_buf_sz, PCI_DMA_FROMDEVICE)); |
1215 | } | 1215 | } |
1216 | yp->rx_ring[entry].dbdma_cmd = cpu_to_le32(CMD_STOP); | 1216 | yp->rx_ring[entry].dbdma_cmd = cpu_to_le32(CMD_STOP); |
1217 | yp->rx_ring[entry].result_status = 0; /* Clear complete bit. */ | 1217 | yp->rx_ring[entry].result_status = 0; /* Clear complete bit. */ |