diff options
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/wireless/bcm43xx/bcm43xx.h | 101 | ||||
-rw-r--r-- | drivers/net/wireless/bcm43xx/bcm43xx_main.c | 35 |
2 files changed, 6 insertions, 130 deletions
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx.h b/drivers/net/wireless/bcm43xx/bcm43xx.h index 5f8c63fab836..29c95b07122a 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx.h +++ b/drivers/net/wireless/bcm43xx/bcm43xx.h | |||
@@ -718,8 +718,6 @@ struct bcm43xx_private { | |||
718 | /* Debugging stuff follows. */ | 718 | /* Debugging stuff follows. */ |
719 | #ifdef CONFIG_BCM43XX_DEBUG | 719 | #ifdef CONFIG_BCM43XX_DEBUG |
720 | struct bcm43xx_dfsentry *dfsentry; | 720 | struct bcm43xx_dfsentry *dfsentry; |
721 | atomic_t mmio_print_cnt; | ||
722 | atomic_t pcicfg_print_cnt; | ||
723 | #endif | 721 | #endif |
724 | }; | 722 | }; |
725 | 723 | ||
@@ -805,141 +803,54 @@ struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy, | |||
805 | } | 803 | } |
806 | 804 | ||
807 | 805 | ||
808 | /* MMIO read/write functions. Debug and non-debug variants. */ | ||
809 | #ifdef CONFIG_BCM43XX_DEBUG | ||
810 | |||
811 | static inline | 806 | static inline |
812 | u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset) | 807 | u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset) |
813 | { | 808 | { |
814 | u16 value; | 809 | return ioread16(bcm->mmio_addr + core_offset(bcm) + offset); |
815 | |||
816 | value = ioread16(bcm->mmio_addr + core_offset(bcm) + offset); | ||
817 | if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) { | ||
818 | printk(KERN_INFO PFX "ioread16 offset: 0x%04x, value: 0x%04x\n", | ||
819 | offset, value); | ||
820 | } | ||
821 | |||
822 | return value; | ||
823 | } | 810 | } |
824 | 811 | ||
825 | static inline | 812 | static inline |
826 | void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value) | 813 | void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value) |
827 | { | 814 | { |
828 | iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset); | 815 | iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset); |
829 | if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) { | ||
830 | printk(KERN_INFO PFX "iowrite16 offset: 0x%04x, value: 0x%04x\n", | ||
831 | offset, value); | ||
832 | } | ||
833 | } | 816 | } |
834 | 817 | ||
835 | static inline | 818 | static inline |
836 | u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset) | 819 | u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset) |
837 | { | 820 | { |
838 | u32 value; | 821 | return ioread32(bcm->mmio_addr + core_offset(bcm) + offset); |
839 | |||
840 | value = ioread32(bcm->mmio_addr + core_offset(bcm) + offset); | ||
841 | if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) { | ||
842 | printk(KERN_INFO PFX "ioread32 offset: 0x%04x, value: 0x%08x\n", | ||
843 | offset, value); | ||
844 | } | ||
845 | |||
846 | return value; | ||
847 | } | 822 | } |
848 | 823 | ||
849 | static inline | 824 | static inline |
850 | void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value) | 825 | void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value) |
851 | { | 826 | { |
852 | iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset); | 827 | iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset); |
853 | if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) { | ||
854 | printk(KERN_INFO PFX "iowrite32 offset: 0x%04x, value: 0x%08x\n", | ||
855 | offset, value); | ||
856 | } | ||
857 | } | 828 | } |
858 | 829 | ||
859 | static inline | 830 | static inline |
860 | int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value) | 831 | int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value) |
861 | { | 832 | { |
862 | int err; | 833 | return pci_read_config_word(bcm->pci_dev, offset, value); |
863 | |||
864 | err = pci_read_config_word(bcm->pci_dev, offset, value); | ||
865 | if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) { | ||
866 | printk(KERN_INFO PFX "pciread16 offset: 0x%08x, value: 0x%04x, err: %d\n", | ||
867 | offset, *value, err); | ||
868 | } | ||
869 | |||
870 | return err; | ||
871 | } | 834 | } |
872 | 835 | ||
873 | static inline | 836 | static inline |
874 | int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value) | 837 | int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value) |
875 | { | 838 | { |
876 | int err; | 839 | return pci_read_config_dword(bcm->pci_dev, offset, value); |
877 | |||
878 | err = pci_read_config_dword(bcm->pci_dev, offset, value); | ||
879 | if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) { | ||
880 | printk(KERN_INFO PFX "pciread32 offset: 0x%08x, value: 0x%08x, err: %d\n", | ||
881 | offset, *value, err); | ||
882 | } | ||
883 | |||
884 | return err; | ||
885 | } | 840 | } |
886 | 841 | ||
887 | static inline | 842 | static inline |
888 | int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value) | 843 | int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value) |
889 | { | 844 | { |
890 | int err; | 845 | return pci_write_config_word(bcm->pci_dev, offset, value); |
891 | |||
892 | err = pci_write_config_word(bcm->pci_dev, offset, value); | ||
893 | if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) { | ||
894 | printk(KERN_INFO PFX "pciwrite16 offset: 0x%08x, value: 0x%04x, err: %d\n", | ||
895 | offset, value, err); | ||
896 | } | ||
897 | |||
898 | return err; | ||
899 | } | 846 | } |
900 | 847 | ||
901 | static inline | 848 | static inline |
902 | int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value) | 849 | int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value) |
903 | { | 850 | { |
904 | int err; | 851 | return pci_write_config_dword(bcm->pci_dev, offset, value); |
905 | |||
906 | err = pci_write_config_dword(bcm->pci_dev, offset, value); | ||
907 | if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) { | ||
908 | printk(KERN_INFO PFX "pciwrite32 offset: 0x%08x, value: 0x%08x, err: %d\n", | ||
909 | offset, value, err); | ||
910 | } | ||
911 | |||
912 | return err; | ||
913 | } | 852 | } |
914 | 853 | ||
915 | #define bcm43xx_mmioprint_initial(bcm, value) atomic_set(&(bcm)->mmio_print_cnt, (value)) | ||
916 | #define bcm43xx_mmioprint_enable(bcm) atomic_inc(&(bcm)->mmio_print_cnt) | ||
917 | #define bcm43xx_mmioprint_disable(bcm) atomic_dec(&(bcm)->mmio_print_cnt) | ||
918 | #define bcm43xx_pciprint_initial(bcm, value) atomic_set(&(bcm)->pcicfg_print_cnt, (value)) | ||
919 | #define bcm43xx_pciprint_enable(bcm) atomic_inc(&(bcm)->pcicfg_print_cnt) | ||
920 | #define bcm43xx_pciprint_disable(bcm) atomic_dec(&(bcm)->pcicfg_print_cnt) | ||
921 | |||
922 | #else /* CONFIG_BCM43XX_DEBUG*/ | ||
923 | |||
924 | #define bcm43xx_read16(bcm, offset) ioread16((bcm)->mmio_addr + core_offset(bcm) + (offset)) | ||
925 | #define bcm43xx_write16(bcm, offset, value) iowrite16((value), (bcm)->mmio_addr + core_offset(bcm) + (offset)) | ||
926 | #define bcm43xx_read32(bcm, offset) ioread32((bcm)->mmio_addr + core_offset(bcm) + (offset)) | ||
927 | #define bcm43xx_write32(bcm, offset, value) iowrite32((value), (bcm)->mmio_addr + core_offset(bcm) + (offset)) | ||
928 | #define bcm43xx_pci_read_config16(bcm, o, v) pci_read_config_word((bcm)->pci_dev, (o), (v)) | ||
929 | #define bcm43xx_pci_read_config32(bcm, o, v) pci_read_config_dword((bcm)->pci_dev, (o), (v)) | ||
930 | #define bcm43xx_pci_write_config16(bcm, o, v) pci_write_config_word((bcm)->pci_dev, (o), (v)) | ||
931 | #define bcm43xx_pci_write_config32(bcm, o, v) pci_write_config_dword((bcm)->pci_dev, (o), (v)) | ||
932 | |||
933 | #define bcm43xx_mmioprint_initial(x, y) do { /* nothing */ } while (0) | ||
934 | #define bcm43xx_mmioprint_enable(x) do { /* nothing */ } while (0) | ||
935 | #define bcm43xx_mmioprint_disable(x) do { /* nothing */ } while (0) | ||
936 | #define bcm43xx_pciprint_initial(bcm, value) do { /* nothing */ } while (0) | ||
937 | #define bcm43xx_pciprint_enable(bcm) do { /* nothing */ } while (0) | ||
938 | #define bcm43xx_pciprint_disable(bcm) do { /* nothing */ } while (0) | ||
939 | |||
940 | #endif /* CONFIG_BCM43XX_DEBUG*/ | ||
941 | |||
942 | |||
943 | /** Limit a value between two limits */ | 854 | /** Limit a value between two limits */ |
944 | #ifdef limit_value | 855 | #ifdef limit_value |
945 | # undef limit_value | 856 | # undef limit_value |
diff --git a/drivers/net/wireless/bcm43xx/bcm43xx_main.c b/drivers/net/wireless/bcm43xx/bcm43xx_main.c index b7192559833c..f3cef345c8f9 100644 --- a/drivers/net/wireless/bcm43xx/bcm43xx_main.c +++ b/drivers/net/wireless/bcm43xx/bcm43xx_main.c | |||
@@ -2018,12 +2018,6 @@ static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm) | |||
2018 | const u32 *data; | 2018 | const u32 *data; |
2019 | unsigned int i, len; | 2019 | unsigned int i, len; |
2020 | 2020 | ||
2021 | #ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT | ||
2022 | bcm43xx_mmioprint_enable(bcm); | ||
2023 | #else | ||
2024 | bcm43xx_mmioprint_disable(bcm); | ||
2025 | #endif | ||
2026 | |||
2027 | /* Upload Microcode. */ | 2021 | /* Upload Microcode. */ |
2028 | data = (u32 *)(bcm->ucode->data); | 2022 | data = (u32 *)(bcm->ucode->data); |
2029 | len = bcm->ucode->size / sizeof(u32); | 2023 | len = bcm->ucode->size / sizeof(u32); |
@@ -2045,12 +2039,6 @@ static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm) | |||
2045 | be32_to_cpu(data[i])); | 2039 | be32_to_cpu(data[i])); |
2046 | udelay(10); | 2040 | udelay(10); |
2047 | } | 2041 | } |
2048 | |||
2049 | #ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT | ||
2050 | bcm43xx_mmioprint_disable(bcm); | ||
2051 | #else | ||
2052 | bcm43xx_mmioprint_enable(bcm); | ||
2053 | #endif | ||
2054 | } | 2042 | } |
2055 | 2043 | ||
2056 | static int bcm43xx_write_initvals(struct bcm43xx_private *bcm, | 2044 | static int bcm43xx_write_initvals(struct bcm43xx_private *bcm, |
@@ -2090,12 +2078,6 @@ static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm) | |||
2090 | { | 2078 | { |
2091 | int err; | 2079 | int err; |
2092 | 2080 | ||
2093 | #ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT | ||
2094 | bcm43xx_mmioprint_enable(bcm); | ||
2095 | #else | ||
2096 | bcm43xx_mmioprint_disable(bcm); | ||
2097 | #endif | ||
2098 | |||
2099 | err = bcm43xx_write_initvals(bcm, (struct bcm43xx_initval *)bcm->initvals0->data, | 2081 | err = bcm43xx_write_initvals(bcm, (struct bcm43xx_initval *)bcm->initvals0->data, |
2100 | bcm->initvals0->size / sizeof(struct bcm43xx_initval)); | 2082 | bcm->initvals0->size / sizeof(struct bcm43xx_initval)); |
2101 | if (err) | 2083 | if (err) |
@@ -2106,13 +2088,7 @@ static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm) | |||
2106 | if (err) | 2088 | if (err) |
2107 | goto out; | 2089 | goto out; |
2108 | } | 2090 | } |
2109 | |||
2110 | out: | 2091 | out: |
2111 | #ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT | ||
2112 | bcm43xx_mmioprint_disable(bcm); | ||
2113 | #else | ||
2114 | bcm43xx_mmioprint_enable(bcm); | ||
2115 | #endif | ||
2116 | return err; | 2092 | return err; |
2117 | } | 2093 | } |
2118 | 2094 | ||
@@ -3728,17 +3704,6 @@ static int bcm43xx_init_private(struct bcm43xx_private *bcm, | |||
3728 | bcm->softmac = ieee80211_priv(net_dev); | 3704 | bcm->softmac = ieee80211_priv(net_dev); |
3729 | bcm->softmac->set_channel = bcm43xx_ieee80211_set_chan; | 3705 | bcm->softmac->set_channel = bcm43xx_ieee80211_set_chan; |
3730 | 3706 | ||
3731 | #ifdef DEBUG_ENABLE_MMIO_PRINT | ||
3732 | bcm43xx_mmioprint_initial(bcm, 1); | ||
3733 | #else | ||
3734 | bcm43xx_mmioprint_initial(bcm, 0); | ||
3735 | #endif | ||
3736 | #ifdef DEBUG_ENABLE_PCILOG | ||
3737 | bcm43xx_pciprint_initial(bcm, 1); | ||
3738 | #else | ||
3739 | bcm43xx_pciprint_initial(bcm, 0); | ||
3740 | #endif | ||
3741 | |||
3742 | bcm->irq_savedstate = BCM43xx_IRQ_INITIAL; | 3707 | bcm->irq_savedstate = BCM43xx_IRQ_INITIAL; |
3743 | bcm->pci_dev = pci_dev; | 3708 | bcm->pci_dev = pci_dev; |
3744 | bcm->net_dev = net_dev; | 3709 | bcm->net_dev = net_dev; |