19 files changed, 379 insertions, 151 deletions

diff --git a/drivers/net/Space.c b/drivers/net/Space.c
index 602ed31a5dd9..9305eb9b1b98 100644
--- a/drivers/net/Space.c
+++ b/drivers/net/Space.c
@@ -349,22 +349,11 @@ static void __init trif_probe2(int unit)
 #endif
 
 
-/*
- *      The loopback device is global so it can be directly referenced
- *      by the network code. Also, it must be first on device list.
- */
-extern int loopback_init(void);
-
 /*  Statically configured drivers -- order matters here. */
 static int __init net_olddevs_init(void)
 {
         int num;
 
-        if (loopback_init()) {
-                printk(KERN_ERR "Network loopback device setup failed\n");
-        }
-
-
 #ifdef CONFIG_SBNI
         for (num = 0; num < 8; ++num)
                 sbni_probe(num);
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index ada5e9b9988c..ca5acc4736df 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -57,8 +57,8 @@
 
 #define DRV_MODULE_NAME         "bnx2"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "1.5.2"
-#define DRV_MODULE_RELDATE      "December 13, 2006"
+#define DRV_MODULE_VERSION      "1.5.3"
+#define DRV_MODULE_RELDATE      "January 8, 2007"
 
 #define RUN_AT(x) (jiffies + (x))
 
@@ -1345,8 +1345,6 @@ bnx2_init_copper_phy(struct bnx2 *bp)
 {
         u32 val;
 
-        bp->phy_flags |= PHY_CRC_FIX_FLAG;
-
         if (bp->phy_flags & PHY_CRC_FIX_FLAG) {
                 bnx2_write_phy(bp, 0x18, 0x0c00);
                 bnx2_write_phy(bp, 0x17, 0x000a);
@@ -3085,7 +3083,7 @@ bnx2_nvram_write(struct bnx2 *bp, u32 offset, u8 *data_buf,
                 int buf_size)
 {
         u32 written, offset32, len32;
-        u8 *buf, start[4], end[4], *flash_buffer = NULL;
+        u8 *buf, start[4], end[4], *align_buf = NULL, *flash_buffer = NULL;
         int rc = 0;
         int align_start, align_end;
 
@@ -3113,16 +3111,17 @@ bnx2_nvram_write(struct bnx2 *bp, u32 offset, u8 *data_buf,
         }
 
         if (align_start || align_end) {
-                buf = kmalloc(len32, GFP_KERNEL);
-                if (buf == NULL)
+                align_buf = kmalloc(len32, GFP_KERNEL);
+                if (align_buf == NULL)
                         return -ENOMEM;
                 if (align_start) {
-                        memcpy(buf, start, 4);
+                        memcpy(align_buf, start, 4);
                 }
                 if (align_end) {
-                        memcpy(buf + len32 - 4, end, 4);
+                        memcpy(align_buf + len32 - 4, end, 4);
                 }
-                memcpy(buf + align_start, data_buf, buf_size);
+                memcpy(align_buf + align_start, data_buf, buf_size);
+                buf = align_buf;
         }
 
         if (bp->flash_info->buffered == 0) {
@@ -3256,11 +3255,8 @@ bnx2_nvram_write(struct bnx2 *bp, u32 offset, u8 *data_buf,
         }
 
 nvram_write_end:
-        if (bp->flash_info->buffered == 0)
-                kfree(flash_buffer);
-
-        if (align_start || align_end)
-                kfree(buf);
+        kfree(flash_buffer);
+        kfree(align_buf);
         return rc;
 }
 
@@ -5645,6 +5641,44 @@ poll_bnx2(struct net_device *dev)
 }
 #endif
 
+static void __devinit
+bnx2_get_5709_media(struct bnx2 *bp)
+{
+        u32 val = REG_RD(bp, BNX2_MISC_DUAL_MEDIA_CTRL);
+        u32 bond_id = val & BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID;
+        u32 strap;
+
+        if (bond_id == BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_C)
+                return;
+        else if (bond_id == BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_S) {
+                bp->phy_flags |= PHY_SERDES_FLAG;
+                return;
+        }
+
+        if (val & BNX2_MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE)
+                strap = (val & BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL) >> 21;
+        else
+                strap = (val & BNX2_MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP) >> 8;
+
+        if (PCI_FUNC(bp->pdev->devfn) == 0) {
+                switch (strap) {
+                case 0x4:
+                case 0x5:
+                case 0x6:
+                        bp->phy_flags |= PHY_SERDES_FLAG;
+                        return;
+                }
+        } else {
+                switch (strap) {
+                case 0x1:
+                case 0x2:
+                case 0x4:
+                        bp->phy_flags |= PHY_SERDES_FLAG;
+                        return;
+                }
+        }
+}
+
 static int __devinit
 bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
 {
@@ -5865,10 +5899,9 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
         bp->phy_addr = 1;
 
         /* Disable WOL support if we are running on a SERDES chip. */
-        if (CHIP_NUM(bp) == CHIP_NUM_5709) {
-                if (CHIP_BOND_ID(bp) != BNX2_MISC_DUAL_MEDIA_CTRL_BOND_ID_C)
-                        bp->phy_flags |= PHY_SERDES_FLAG;
-        } else if (CHIP_BOND_ID(bp) & CHIP_BOND_ID_SERDES_BIT)
+        if (CHIP_NUM(bp) == CHIP_NUM_5709)
+                bnx2_get_5709_media(bp);
+        else if (CHIP_BOND_ID(bp) & CHIP_BOND_ID_SERDES_BIT)
                 bp->phy_flags |= PHY_SERDES_FLAG;
 
         if (bp->phy_flags & PHY_SERDES_FLAG) {
@@ -5880,7 +5913,9 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
                         if (reg & BNX2_SHARED_HW_CFG_PHY_2_5G)
                                 bp->phy_flags |= PHY_2_5G_CAPABLE_FLAG;
                 }
-        }
+        } else if (CHIP_NUM(bp) == CHIP_NUM_5706 ||
+                   CHIP_NUM(bp) == CHIP_NUM_5708)
+                bp->phy_flags |= PHY_CRC_FIX_FLAG;
 
         if ((CHIP_ID(bp) == CHIP_ID_5708_A0) ||
             (CHIP_ID(bp) == CHIP_ID_5708_B0) ||
diff --git a/drivers/net/chelsio/my3126.c b/drivers/net/chelsio/my3126.c
index c7731b6f9de3..82fed1dd5005 100644
--- a/drivers/net/chelsio/my3126.c
+++ b/drivers/net/chelsio/my3126.c
@@ -170,9 +170,10 @@ static struct cphy *my3126_phy_create(adapter_t *adapter,
 {
         struct cphy *cphy = kzalloc(sizeof (*cphy), GFP_KERNEL);
 
-        if (cphy)
-                cphy_init(cphy, adapter, phy_addr, &my3126_ops, mdio_ops);
+        if (!cphy)
+                return NULL;
 
+        cphy_init(cphy, adapter, phy_addr, &my3126_ops, mdio_ops);
         INIT_DELAYED_WORK(&cphy->phy_update, my3216_poll);
         cphy->bmsr = 0;
 
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 4c1ff752048c..c6259c7127f6 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -995,12 +995,6 @@ e1000_probe(struct pci_dev *pdev,
            (adapter->hw.mac_type != e1000_82547))
                 netdev->features |= NETIF_F_TSO;
 
-#ifdef CONFIG_DEBUG_SLAB
-        /* 82544's work arounds do not play nicely with DEBUG SLAB */
-        if (adapter->hw.mac_type == e1000_82544)
-                netdev->features &= ~NETIF_F_TSO;
-#endif
-
 #ifdef NETIF_F_TSO6
         if (adapter->hw.mac_type > e1000_82547_rev_2)
                 netdev->features |= NETIF_F_TSO6;
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 2f48fe9a29a7..93f2b7a22160 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -234,6 +234,7 @@ enum {
 #define NVREG_XMITCTL_HOST_SEMA_MASK    0x0000f000
 #define NVREG_XMITCTL_HOST_SEMA_ACQ     0x0000f000
 #define NVREG_XMITCTL_HOST_LOADED       0x00004000
+#define NVREG_XMITCTL_TX_PATH_EN        0x01000000
         NvRegTransmitterStatus = 0x088,
 #define NVREG_XMITSTAT_BUSY     0x01
 
@@ -249,6 +250,7 @@ enum {
 #define NVREG_OFFLOAD_NORMAL    RX_NIC_BUFSIZE
         NvRegReceiverControl = 0x094,
 #define NVREG_RCVCTL_START      0x01
+#define NVREG_RCVCTL_RX_PATH_EN 0x01000000
         NvRegReceiverStatus = 0x98,
 #define NVREG_RCVSTAT_BUSY      0x01
 
@@ -1169,16 +1171,21 @@ static void nv_start_rx(struct net_device *dev)
 {
         struct fe_priv *np = netdev_priv(dev);
         u8 __iomem *base = get_hwbase(dev);
+        u32 rx_ctrl = readl(base + NvRegReceiverControl);
 
         dprintk(KERN_DEBUG "%s: nv_start_rx\n", dev->name);
         /* Already running? Stop it. */
-        if (readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) {
-                writel(0, base + NvRegReceiverControl);
+        if ((readl(base + NvRegReceiverControl) & NVREG_RCVCTL_START) && !np->mac_in_use) {
+                rx_ctrl &= ~NVREG_RCVCTL_START;
+                writel(rx_ctrl, base + NvRegReceiverControl);
                 pci_push(base);
         }
         writel(np->linkspeed, base + NvRegLinkSpeed);
         pci_push(base);
-        writel(NVREG_RCVCTL_START, base + NvRegReceiverControl);
+        rx_ctrl |= NVREG_RCVCTL_START;
+        if (np->mac_in_use)
+                rx_ctrl &= ~NVREG_RCVCTL_RX_PATH_EN;
+        writel(rx_ctrl, base + NvRegReceiverControl);
         dprintk(KERN_DEBUG "%s: nv_start_rx to duplex %d, speed 0x%08x.\n",
                                 dev->name, np->duplex, np->linkspeed);
         pci_push(base);
@@ -1186,39 +1193,59 @@ static void nv_start_rx(struct net_device *dev)
 
 static void nv_stop_rx(struct net_device *dev)
 {
+        struct fe_priv *np = netdev_priv(dev);
         u8 __iomem *base = get_hwbase(dev);
+        u32 rx_ctrl = readl(base + NvRegReceiverControl);
 
         dprintk(KERN_DEBUG "%s: nv_stop_rx\n", dev->name);
-        writel(0, base + NvRegReceiverControl);
+        if (!np->mac_in_use)
+                rx_ctrl &= ~NVREG_RCVCTL_START;
+        else
+                rx_ctrl |= NVREG_RCVCTL_RX_PATH_EN;
+        writel(rx_ctrl, base + NvRegReceiverControl);
         reg_delay(dev, NvRegReceiverStatus, NVREG_RCVSTAT_BUSY, 0,
                         NV_RXSTOP_DELAY1, NV_RXSTOP_DELAY1MAX,
                         KERN_INFO "nv_stop_rx: ReceiverStatus remained busy");
 
         udelay(NV_RXSTOP_DELAY2);
-        writel(0, base + NvRegLinkSpeed);
+        if (!np->mac_in_use)
+                writel(0, base + NvRegLinkSpeed);
 }
 
 static void nv_start_tx(struct net_device *dev)
 {
+        struct fe_priv *np = netdev_priv(dev);
         u8 __iomem *base = get_hwbase(dev);
+        u32 tx_ctrl = readl(base + NvRegTransmitterControl);
 
         dprintk(KERN_DEBUG "%s: nv_start_tx\n", dev->name);
-        writel(NVREG_XMITCTL_START, base + NvRegTransmitterControl);
+        tx_ctrl |= NVREG_XMITCTL_START;
+        if (np->mac_in_use)
+                tx_ctrl &= ~NVREG_XMITCTL_TX_PATH_EN;
+        writel(tx_ctrl, base + NvRegTransmitterControl);
         pci_push(base);
 }
 
 static void nv_stop_tx(struct net_device *dev)
 {
+        struct fe_priv *np = netdev_priv(dev);
         u8 __iomem *base = get_hwbase(dev);
+        u32 tx_ctrl = readl(base + NvRegTransmitterControl);
 
         dprintk(KERN_DEBUG "%s: nv_stop_tx\n", dev->name);
-        writel(0, base + NvRegTransmitterControl);
+        if (!np->mac_in_use)
+                tx_ctrl &= ~NVREG_XMITCTL_START;
+        else
+                tx_ctrl |= NVREG_XMITCTL_TX_PATH_EN;
+        writel(tx_ctrl, base + NvRegTransmitterControl);
         reg_delay(dev, NvRegTransmitterStatus, NVREG_XMITSTAT_BUSY, 0,
                         NV_TXSTOP_DELAY1, NV_TXSTOP_DELAY1MAX,
                         KERN_INFO "nv_stop_tx: TransmitterStatus remained busy");
 
         udelay(NV_TXSTOP_DELAY2);
-        writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV, base + NvRegTransmitPoll);
+        if (!np->mac_in_use)
+                writel(readl(base + NvRegTransmitPoll) & NVREG_TRANSMITPOLL_MAC_ADDR_REV,
+                       base + NvRegTransmitPoll);
 }
 
 static void nv_txrx_reset(struct net_device *dev)
@@ -4148,20 +4175,6 @@ static int nv_mgmt_acquire_sema(struct net_device *dev)
         return 0;
 }
 
-/* Indicate to mgmt unit whether driver is loaded or not */
-static void nv_mgmt_driver_loaded(struct net_device *dev, int loaded)
-{
-        u8 __iomem *base = get_hwbase(dev);
-        u32 tx_ctrl;
-
-        tx_ctrl = readl(base + NvRegTransmitterControl);
-        if (loaded)
-                tx_ctrl |= NVREG_XMITCTL_HOST_LOADED;
-        else
-                tx_ctrl &= ~NVREG_XMITCTL_HOST_LOADED;
-        writel(tx_ctrl, base + NvRegTransmitterControl);
-}
-
 static int nv_open(struct net_device *dev)
 {
         struct fe_priv *np = netdev_priv(dev);
@@ -4659,33 +4672,24 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
         writel(NVREG_MIISTAT_MASK, base + NvRegMIIStatus);
 
         if (id->driver_data & DEV_HAS_MGMT_UNIT) {
-                writel(0x1, base + 0x204); pci_push(base);
-                msleep(500);
                 /* management unit running on the mac? */
-                np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST;
-                if (np->mac_in_use) {
-                        u32 mgmt_sync;
-                        /* management unit setup the phy already? */
-                        mgmt_sync = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK;
-                        if (mgmt_sync == NVREG_XMITCTL_SYNC_NOT_READY) {
-                                if (!nv_mgmt_acquire_sema(dev)) {
-                                        for (i = 0; i < 5000; i++) {
-                                                msleep(1);
-                                                mgmt_sync = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK;
-                                                if (mgmt_sync == NVREG_XMITCTL_SYNC_NOT_READY)
-                                                        continue;
-                                                if (mgmt_sync == NVREG_XMITCTL_SYNC_PHY_INIT)
-                                                        phyinitialized = 1;
-                                                break;
+                if (readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_PHY_INIT) {
+                        np->mac_in_use = readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_MGMT_ST;
+                        dprintk(KERN_INFO "%s: mgmt unit is running. mac in use %x.\n", pci_name(pci_dev), np->mac_in_use);
+                        for (i = 0; i < 5000; i++) {
+                                msleep(1);
+                                if (nv_mgmt_acquire_sema(dev)) {
+                                        /* management unit setup the phy already? */
+                                        if ((readl(base + NvRegTransmitterControl) & NVREG_XMITCTL_SYNC_MASK) ==
+                                            NVREG_XMITCTL_SYNC_PHY_INIT) {
+                                                /* phy is inited by mgmt unit */
+                                                phyinitialized = 1;
+                                                dprintk(KERN_INFO "%s: Phy already initialized by mgmt unit.\n", pci_name(pci_dev));
+                                        } else {
+                                                /* we need to init the phy */
                                         }
-                                } else {
-                                        /* we need to init the phy */
+                                        break;
                                 }
-                        } else if (mgmt_sync == NVREG_XMITCTL_SYNC_PHY_INIT) {
-                                /* phy is inited by SMU */
-                                phyinitialized = 1;
-                        } else {
-                                /* we need to init the phy */
                         }
                 }
         }
@@ -4724,10 +4728,12 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
         if (!phyinitialized) {
                 /* reset it */
                 phy_init(dev);
-        }
-
-        if (id->driver_data & DEV_HAS_MGMT_UNIT) {
-                nv_mgmt_driver_loaded(dev, 1);
+        } else {
+                /* see if it is a gigabit phy */
+                u32 mii_status = mii_rw(dev, np->phyaddr, MII_BMSR, MII_READ);
+                if (mii_status & PHY_GIGABIT) {
+                        np->gigabit = PHY_GIGABIT;
+                }
         }
 
         /* set default link speed settings */
@@ -4749,8 +4755,6 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
 out_error:
         if (phystate_orig)
                 writel(phystate|NVREG_ADAPTCTL_RUNNING, base + NvRegAdapterControl);
-        if (np->mac_in_use)
-                nv_mgmt_driver_loaded(dev, 0);
         pci_set_drvdata(pci_dev, NULL);
 out_freering:
         free_rings(dev);
@@ -4780,9 +4784,6 @@ static void __devexit nv_remove(struct pci_dev *pci_dev)
         writel(np->orig_mac[0], base + NvRegMacAddrA);
         writel(np->orig_mac[1], base + NvRegMacAddrB);
 
-        if (np->mac_in_use)
-                nv_mgmt_driver_loaded(dev, 0);
-
         /* free all structures */
         free_rings(dev);
         iounmap(get_hwbase(dev));
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c
index c26a4b8e552a..ca2b21f9d444 100644
--- a/drivers/net/ifb.c
+++ b/drivers/net/ifb.c
@@ -154,8 +154,8 @@ static int ifb_xmit(struct sk_buff *skb, struct net_device *dev)
         int ret = 0;
         u32 from = G_TC_FROM(skb->tc_verd);
 
-        stats->tx_packets++;
-        stats->tx_bytes+=skb->len;
+        stats->rx_packets++;
+        stats->rx_bytes+=skb->len;
 
         if (!from || !skb->input_dev) {
 dropped:
diff --git a/drivers/net/ixgb/ixgb.h b/drivers/net/ixgb/ixgb.h
index 50ffe90488ff..f4aba4355b19 100644
--- a/drivers/net/ixgb/ixgb.h
+++ b/drivers/net/ixgb/ixgb.h
@@ -171,6 +171,7 @@ struct ixgb_adapter {
 
         /* TX */
         struct ixgb_desc_ring tx_ring ____cacheline_aligned_in_smp;
+        unsigned int restart_queue;
         unsigned long timeo_start;
         uint32_t tx_cmd_type;
         uint64_t hw_csum_tx_good;
diff --git a/drivers/net/ixgb/ixgb_ethtool.c b/drivers/net/ixgb/ixgb_ethtool.c
index cd22523fb035..82c044d6e08a 100644
--- a/drivers/net/ixgb/ixgb_ethtool.c
+++ b/drivers/net/ixgb/ixgb_ethtool.c
@@ -79,6 +79,7 @@ static struct ixgb_stats ixgb_gstrings_stats[] = {
         {"tx_window_errors", IXGB_STAT(net_stats.tx_window_errors)},
         {"tx_deferred_ok", IXGB_STAT(stats.dc)},
         {"tx_timeout_count", IXGB_STAT(tx_timeout_count) },
+        {"tx_restart_queue", IXGB_STAT(restart_queue) },
         {"rx_long_length_errors", IXGB_STAT(stats.roc)},
         {"rx_short_length_errors", IXGB_STAT(stats.ruc)},
 #ifdef NETIF_F_TSO
diff --git a/drivers/net/ixgb/ixgb_hw.c b/drivers/net/ixgb/ixgb_hw.c
index 02089b64e42c..ecbf45861c68 100644
--- a/drivers/net/ixgb/ixgb_hw.c
+++ b/drivers/net/ixgb/ixgb_hw.c
@@ -399,8 +399,9 @@ ixgb_init_rx_addrs(struct ixgb_hw *hw)
         /* Zero out the other 15 receive addresses. */
         DEBUGOUT("Clearing RAR[1-15]\n");
         for(i = 1; i < IXGB_RAR_ENTRIES; i++) {
-                IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
+                /* Write high reg first to disable the AV bit first */
                 IXGB_WRITE_REG_ARRAY(hw, RA, ((i << 1) + 1), 0);
+                IXGB_WRITE_REG_ARRAY(hw, RA, (i << 1), 0);
         }
 
         return;
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c
index e628126c9c49..a083a9189230 100644
--- a/drivers/net/ixgb/ixgb_main.c
+++ b/drivers/net/ixgb/ixgb_main.c
@@ -36,7 +36,7 @@ static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
 #else
 #define DRIVERNAPI "-NAPI"
 #endif
-#define DRV_VERSION             "1.0.117-k2"DRIVERNAPI
+#define DRV_VERSION             "1.0.126-k2"DRIVERNAPI
 char ixgb_driver_version[] = DRV_VERSION;
 static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
 
@@ -1287,6 +1287,7 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
         struct ixgb_buffer *buffer_info;
         int len = skb->len;
         unsigned int offset = 0, size, count = 0, i;
+        unsigned int mss = skb_shinfo(skb)->gso_size;
 
         unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
         unsigned int f;
@@ -1298,6 +1299,11 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
         while(len) {
                 buffer_info = &tx_ring->buffer_info[i];
                 size = min(len, IXGB_MAX_DATA_PER_TXD);
+                /* Workaround for premature desc write-backs
+                 * in TSO mode.  Append 4-byte sentinel desc */
+                if (unlikely(mss && !nr_frags && size == len && size > 8))
+                        size -= 4;
+
                 buffer_info->length = size;
                 WARN_ON(buffer_info->dma != 0);
                 buffer_info->dma =
@@ -1324,6 +1330,13 @@ ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
                 while(len) {
                         buffer_info = &tx_ring->buffer_info[i];
                         size = min(len, IXGB_MAX_DATA_PER_TXD);
+
+                        /* Workaround for premature desc write-backs
+                         * in TSO mode.  Append 4-byte sentinel desc */
+                        if (unlikely(mss && !nr_frags && size == len
+                                     && size > 8))
+                                size -= 4;
+
                         buffer_info->length = size;
                         buffer_info->dma =
                                 pci_map_page(adapter->pdev,
@@ -1398,11 +1411,43 @@ ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
         IXGB_WRITE_REG(&adapter->hw, TDT, i);
 }
 
+static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
+{
+        struct ixgb_adapter *adapter = netdev_priv(netdev);
+        struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
+
+        netif_stop_queue(netdev);
+        /* Herbert's original patch had:
+         *  smp_mb__after_netif_stop_queue();
+         * but since that doesn't exist yet, just open code it. */
+        smp_mb();
+
+        /* We need to check again in a case another CPU has just
+         * made room available. */
+        if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
+                return -EBUSY;
+
+        /* A reprieve! */
+        netif_start_queue(netdev);
+        ++adapter->restart_queue;
+        return 0;
+}
+
+static int ixgb_maybe_stop_tx(struct net_device *netdev,
+                              struct ixgb_desc_ring *tx_ring, int size)
+{
+        if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
+                return 0;
+        return __ixgb_maybe_stop_tx(netdev, size);
+}
+
+
 /* Tx Descriptors needed, worst case */
 #define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
                          (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
-#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
-        MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
+#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
+        MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
+        + 1 /* one more needed for sentinel TSO workaround */
 
 static int
 ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
@@ -1430,7 +1475,8 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
         spin_lock_irqsave(&adapter->tx_lock, flags);
 #endif
 
-        if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
+        if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
+                     DESC_NEEDED))) {
                 netif_stop_queue(netdev);
                 spin_unlock_irqrestore(&adapter->tx_lock, flags);
                 return NETDEV_TX_BUSY;
@@ -1468,8 +1514,7 @@ ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
 
 #ifdef NETIF_F_LLTX
         /* Make sure there is space in the ring for the next send. */
-        if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
-                netif_stop_queue(netdev);
+        ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
 
         spin_unlock_irqrestore(&adapter->tx_lock, flags);
 
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index 82c10dec1b5a..2b739fd584f1 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -229,9 +229,11 @@ struct net_device loopback_dev = {
 };
 
 /* Setup and register the loopback device. */
-int __init loopback_init(void)
+static int __init loopback_init(void)
 {
         return register_netdev(&loopback_dev);
 };
 
+module_init(loopback_init);
+
 EXPORT_SYMBOL(loopback_dev);
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index 2b1238e2dbdb..d88e9b2e93cf 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -1617,6 +1617,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
         PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega FastEther PCC-TX", 0x5261440f, 0x485e85d9),
         PCMCIA_DEVICE_PROD_ID12("Corega,K.K.", "Ethernet LAN Card", 0x110d26d9, 0x9fd2f0a2),
         PCMCIA_DEVICE_PROD_ID12("corega,K.K.", "Ethernet LAN Card", 0x9791a90e, 0x9fd2f0a2),
+        PCMCIA_DEVICE_PROD_ID12("corega K.K.", "(CG-LAPCCTXD)", 0x5261440f, 0x73ec0d88),
         PCMCIA_DEVICE_PROD_ID12("CouplerlessPCMCIA", "100BASE", 0xee5af0ad, 0x7c2add04),
         PCMCIA_DEVICE_PROD_ID12("CyQ've", "ELA-010", 0x77008979, 0x9d8d445d),
         PCMCIA_DEVICE_PROD_ID12("CyQ've", "ELA-110E 10/100M LAN Card", 0x77008979, 0xfd184814),
@@ -1667,6 +1668,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
         PCMCIA_DEVICE_PROD_ID12("Logitec", "LPM-LN100TX", 0x88fcdeda, 0x6d772737),
         PCMCIA_DEVICE_PROD_ID12("Logitec", "LPM-LN100TE", 0x88fcdeda, 0x0e714bee),
         PCMCIA_DEVICE_PROD_ID12("Logitec", "LPM-LN20T", 0x88fcdeda, 0x81090922),
+        PCMCIA_DEVICE_PROD_ID12("Logitec", "LPM-LN10TE", 0x88fcdeda, 0xc1e2521c),
         PCMCIA_DEVICE_PROD_ID12("LONGSHINE", "PCMCIA Ethernet Card", 0xf866b0b0, 0x6f6652e0),
         PCMCIA_DEVICE_PROD_ID12("MACNICA", "ME1-JEIDA", 0x20841b68, 0xaf8a3578),
         PCMCIA_DEVICE_PROD_ID12("Macsense", "MPC-10", 0xd830297f, 0xd265c307),
diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c
index d79d141a601d..8844c20eac2d 100644
--- a/drivers/net/qla3xxx.c
+++ b/drivers/net/qla3xxx.c
@@ -208,6 +208,15 @@ static void ql_write_common_reg(struct ql3_adapter *qdev,
         return;
 }
 
+static void ql_write_nvram_reg(struct ql3_adapter *qdev,
+                                u32 __iomem *reg, u32 value)
+{
+        writel(value, reg);
+        readl(reg);
+        udelay(1);
+        return;
+}
+
 static void ql_write_page0_reg(struct ql3_adapter *qdev,
                                u32 __iomem *reg, u32 value)
 {
@@ -336,9 +345,9 @@ static void fm93c56a_select(struct ql3_adapter *qdev)
                         qdev->mem_map_registers;
 
         qdev->eeprom_cmd_data = AUBURN_EEPROM_CS_1;
-        ql_write_common_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
+        ql_write_nvram_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
                             ISP_NVRAM_MASK | qdev->eeprom_cmd_data);
-        ql_write_common_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
+        ql_write_nvram_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
                             ((ISP_NVRAM_MASK << 16) | qdev->eeprom_cmd_data));
 }
 
@@ -355,14 +364,14 @@ static void fm93c56a_cmd(struct ql3_adapter *qdev, u32 cmd, u32 eepromAddr)
                         qdev->mem_map_registers;
 
         /* Clock in a zero, then do the start bit */
-        ql_write_common_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
+        ql_write_nvram_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
                             ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
                             AUBURN_EEPROM_DO_1);
-        ql_write_common_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
+        ql_write_nvram_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
                             ISP_NVRAM_MASK | qdev->
                             eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
                             AUBURN_EEPROM_CLK_RISE);
-        ql_write_common_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
+        ql_write_nvram_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
                             ISP_NVRAM_MASK | qdev->
                             eeprom_cmd_data | AUBURN_EEPROM_DO_1 |
                             AUBURN_EEPROM_CLK_FALL);
@@ -378,20 +387,20 @@ static void fm93c56a_cmd(struct ql3_adapter *qdev, u32 cmd, u32 eepromAddr)
                          * If the bit changed, then change the DO state to
                          * match
                          */
-                        ql_write_common_reg(qdev,
+                        ql_write_nvram_reg(qdev,
                                             &port_regs->CommonRegs.
                                             serialPortInterfaceReg,
                                             ISP_NVRAM_MASK | qdev->
                                             eeprom_cmd_data | dataBit);
                         previousBit = dataBit;
                 }
-                ql_write_common_reg(qdev,
+                ql_write_nvram_reg(qdev,
                                     &port_regs->CommonRegs.
                                     serialPortInterfaceReg,
                                     ISP_NVRAM_MASK | qdev->
                                     eeprom_cmd_data | dataBit |
                                     AUBURN_EEPROM_CLK_RISE);
-                ql_write_common_reg(qdev,
+                ql_write_nvram_reg(qdev,
                                     &port_regs->CommonRegs.
                                     serialPortInterfaceReg,
                                     ISP_NVRAM_MASK | qdev->
@@ -412,20 +421,20 @@ static void fm93c56a_cmd(struct ql3_adapter *qdev, u32 cmd, u32 eepromAddr)
                          * If the bit changed, then change the DO state to
                          * match
                          */
-                        ql_write_common_reg(qdev,
+                        ql_write_nvram_reg(qdev,
                                             &port_regs->CommonRegs.
                                             serialPortInterfaceReg,
                                             ISP_NVRAM_MASK | qdev->
                                             eeprom_cmd_data | dataBit);
                         previousBit = dataBit;
                 }
-                ql_write_common_reg(qdev,
+                ql_write_nvram_reg(qdev,
                                     &port_regs->CommonRegs.
                                     serialPortInterfaceReg,
                                     ISP_NVRAM_MASK | qdev->
                                     eeprom_cmd_data | dataBit |
                                     AUBURN_EEPROM_CLK_RISE);
-                ql_write_common_reg(qdev,
+                ql_write_nvram_reg(qdev,
                                     &port_regs->CommonRegs.
                                     serialPortInterfaceReg,
                                     ISP_NVRAM_MASK | qdev->
@@ -443,7 +452,7 @@ static void fm93c56a_deselect(struct ql3_adapter *qdev)
         struct ql3xxx_port_registers __iomem *port_regs =
                         qdev->mem_map_registers;
         qdev->eeprom_cmd_data = AUBURN_EEPROM_CS_0;
-        ql_write_common_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
+        ql_write_nvram_reg(qdev, &port_regs->CommonRegs.serialPortInterfaceReg,
                             ISP_NVRAM_MASK | qdev->eeprom_cmd_data);
 }
 
@@ -461,12 +470,12 @@ static void fm93c56a_datain(struct ql3_adapter *qdev, unsigned short *value)
         /* Read the data bits */
         /* The first bit is a dummy.  Clock right over it. */
         for (i = 0; i < dataBits; i++) {
-                ql_write_common_reg(qdev,
+                ql_write_nvram_reg(qdev,
                                     &port_regs->CommonRegs.
                                     serialPortInterfaceReg,
                                     ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
                                     AUBURN_EEPROM_CLK_RISE);
-                ql_write_common_reg(qdev,
+                ql_write_nvram_reg(qdev,
                                     &port_regs->CommonRegs.
                                     serialPortInterfaceReg,
                                     ISP_NVRAM_MASK | qdev->eeprom_cmd_data |
@@ -3370,7 +3379,6 @@ static int __devinit ql3xxx_probe(struct pci_dev *pdev,
         SET_MODULE_OWNER(ndev);
         SET_NETDEV_DEV(ndev, &pdev->dev);
 
-        ndev->features = NETIF_F_LLTX;
         if (pci_using_dac)
                 ndev->features |= NETIF_F_HIGHDMA;
 
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 785e4a535f9e..616be8d0fa85 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -90,7 +90,8 @@
 
 #define ADVERTISE_MASK  (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \
                          SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
-                         SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)
+                         SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full | \
+                         SUPPORTED_Pause | SUPPORTED_Autoneg)
 
 #define DRV_NAME        "sungem"
 #define DRV_VERSION     "0.98"
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c
index 49800b25907d..d21991ee88c4 100644
--- a/drivers/net/sungem_phy.c
+++ b/drivers/net/sungem_phy.c
@@ -3,10 +3,9 @@
  *
  * This file could be shared with other drivers.
  *
- * (c) 2002, Benjamin Herrenscmidt (benh@kernel.crashing.org)
+ * (c) 2002-2007, Benjamin Herrenscmidt (benh@kernel.crashing.org)
  *
  * TODO:
- *  - Implement WOL
  *  - Add support for PHYs that provide an IRQ line
  *  - Eventually moved the entire polling state machine in
  *    there (out of the eth driver), so that it can easily be
@@ -152,6 +151,44 @@ static int bcm5221_suspend(struct mii_phy* phy)
         return 0;
 }
 
+static int bcm5241_init(struct mii_phy* phy)
+{
+        u16 data;
+
+        data = phy_read(phy, MII_BCM5221_TEST);
+        phy_write(phy, MII_BCM5221_TEST,
+                data | MII_BCM5221_TEST_ENABLE_SHADOWS);
+
+        data = phy_read(phy, MII_BCM5221_SHDOW_AUX_STAT2);
+        phy_write(phy, MII_BCM5221_SHDOW_AUX_STAT2,
+                data | MII_BCM5221_SHDOW_AUX_STAT2_APD);
+
+        data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
+        phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
+                data & ~MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR);
+
+        data = phy_read(phy, MII_BCM5221_TEST);
+        phy_write(phy, MII_BCM5221_TEST,
+                data & ~MII_BCM5221_TEST_ENABLE_SHADOWS);
+
+        return 0;
+}
+
+static int bcm5241_suspend(struct mii_phy* phy)
+{
+        u16 data;
+
+        data = phy_read(phy, MII_BCM5221_TEST);
+        phy_write(phy, MII_BCM5221_TEST,
+                data | MII_BCM5221_TEST_ENABLE_SHADOWS);
+
+        data = phy_read(phy, MII_BCM5221_SHDOW_AUX_MODE4);
+        phy_write(phy, MII_BCM5221_SHDOW_AUX_MODE4,
+                  data | MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR);
+
+        return 0;
+}
+
 static int bcm5400_init(struct mii_phy* phy)
 {
         u16 data;
@@ -373,6 +410,10 @@ static int bcm54xx_setup_aneg(struct mii_phy *phy, u32 advertise)
                 adv |= ADVERTISE_100HALF;
         if (advertise & ADVERTISED_100baseT_Full)
                 adv |= ADVERTISE_100FULL;
+        if (advertise & ADVERTISED_Pause)
+                adv |= ADVERTISE_PAUSE_CAP;
+        if (advertise & ADVERTISED_Asym_Pause)
+                adv |= ADVERTISE_PAUSE_ASYM;
         phy_write(phy, MII_ADVERTISE, adv);
 
         /* Setup 1000BT advertise */
@@ -436,12 +477,15 @@ static int bcm54xx_read_link(struct mii_phy *phy)
                 val = phy_read(phy, MII_BCM5400_AUXSTATUS);
                 link_mode = ((val & MII_BCM5400_AUXSTATUS_LINKMODE_MASK) >>
                              MII_BCM5400_AUXSTATUS_LINKMODE_SHIFT);
-                phy->duplex = phy_BCM5400_link_table[link_mode][0] ? DUPLEX_FULL : DUPLEX_HALF;
+                phy->duplex = phy_BCM5400_link_table[link_mode][0] ?
+                        DUPLEX_FULL : DUPLEX_HALF;
                 phy->speed = phy_BCM5400_link_table[link_mode][2] ?
                                 SPEED_1000 :
-                                (phy_BCM5400_link_table[link_mode][1] ? SPEED_100 : SPEED_10);
+                                (phy_BCM5400_link_table[link_mode][1] ?
+                                 SPEED_100 : SPEED_10);
                 val = phy_read(phy, MII_LPA);
-                phy->pause = ((val & LPA_PAUSE) != 0);
+                phy->pause = (phy->duplex == DUPLEX_FULL) &&
+                        ((val & LPA_PAUSE) != 0);
         }
         /* On non-aneg, we assume what we put in BMCR is the speed,
          * though magic-aneg shouldn't prevent this case from occurring
@@ -450,6 +494,28 @@ static int bcm54xx_read_link(struct mii_phy *phy)
         return 0;
 }
 
+static int marvell88e1111_init(struct mii_phy* phy)
+{
+        u16 rev;
+
+        /* magic init sequence for rev 0 */
+        rev = phy_read(phy, MII_PHYSID2) & 0x000f;
+        if (rev == 0) {
+                phy_write(phy, 0x1d, 0x000a);
+                phy_write(phy, 0x1e, 0x0821);
+
+                phy_write(phy, 0x1d, 0x0006);
+                phy_write(phy, 0x1e, 0x8600);
+
+                phy_write(phy, 0x1d, 0x000b);
+                phy_write(phy, 0x1e, 0x0100);
+
+                phy_write(phy, 0x1d, 0x0004);
+                phy_write(phy, 0x1e, 0x4850);
+        }
+        return 0;
+}
+
 static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise)
 {
         u16 ctl, adv;
@@ -471,6 +537,10 @@ static int marvell_setup_aneg(struct mii_phy *phy, u32 advertise)
                 adv |= ADVERTISE_100HALF;
         if (advertise & ADVERTISED_100baseT_Full)
                 adv |= ADVERTISE_100FULL;
+        if (advertise & ADVERTISED_Pause)
+                adv |= ADVERTISE_PAUSE_CAP;
+        if (advertise & ADVERTISED_Asym_Pause)
+                adv |= ADVERTISE_PAUSE_ASYM;
         phy_write(phy, MII_ADVERTISE, adv);
 
         /* Setup 1000BT advertise & enable crossover detect
@@ -549,7 +619,7 @@ static int marvell_setup_forced(struct mii_phy *phy, int speed, int fd)
 
 static int marvell_read_link(struct mii_phy *phy)
 {
-        u16 status;
+        u16 status, pmask;
 
         if (phy->autoneg) {
                 status = phy_read(phy, MII_M1011_PHY_SPEC_STATUS);
@@ -565,7 +635,9 @@ static int marvell_read_link(struct mii_phy *phy)
                         phy->duplex = DUPLEX_FULL;
                 else
                         phy->duplex = DUPLEX_HALF;
-                phy->pause = 0; /* XXX Check against spec ! */
+                pmask = MII_M1011_PHY_SPEC_STATUS_TX_PAUSE |
+                        MII_M1011_PHY_SPEC_STATUS_RX_PAUSE;
+                phy->pause = (status & pmask) == pmask;
         }
         /* On non-aneg, we assume what we put in BMCR is the speed,
          * though magic-aneg shouldn't prevent this case from occurring
@@ -595,6 +667,10 @@ static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
                 adv |= ADVERTISE_100HALF;
         if (advertise & ADVERTISED_100baseT_Full)
                 adv |= ADVERTISE_100FULL;
+        if (advertise & ADVERTISED_Pause)
+                adv |= ADVERTISE_PAUSE_CAP;
+        if (advertise & ADVERTISED_Asym_Pause)
+                adv |= ADVERTISE_PAUSE_ASYM;
         phy_write(phy, MII_ADVERTISE, adv);
 
         /* Start/Restart aneg */
@@ -666,7 +742,8 @@ static int genmii_read_link(struct mii_phy *phy)
                         phy->speed = SPEED_100;
                 else
                         phy->speed = SPEED_10;
-                phy->pause = 0;
+                phy->pause = (phy->duplex == DUPLEX_FULL) &&
+                        ((lpa & LPA_PAUSE) != 0);
         }
         /* On non-aneg, we assume what we put in BMCR is the speed,
          * though magic-aneg shouldn't prevent this case from occurring
@@ -676,11 +753,19 @@ static int genmii_read_link(struct mii_phy *phy)
 }
 
 
-#define MII_BASIC_FEATURES      (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full | \
-                                 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full | \
-                                 SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII)
-#define MII_GBIT_FEATURES       (MII_BASIC_FEATURES | \
-                                 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)
+#define MII_BASIC_FEATURES \
+        (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |      \
+         SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |    \
+         SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |     \
+         SUPPORTED_Pause)
+
+/* On gigabit capable PHYs, we advertise Pause support but not asym pause
+ * support for now as I'm not sure it's supported and Darwin doesn't do
+ * it neither. --BenH.
+ */
+#define MII_GBIT_FEATURES \
+        (MII_BASIC_FEATURES |   \
+         SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full)
 
 /* Broadcom BCM 5201 */
 static struct mii_phy_ops bcm5201_phy_ops = {
@@ -720,6 +805,24 @@ static struct mii_phy_def bcm5221_phy_def = {
         .ops            = &bcm5221_phy_ops
 };
 
+/* Broadcom BCM 5241 */
+static struct mii_phy_ops bcm5241_phy_ops = {
+        .suspend        = bcm5241_suspend,
+        .init           = bcm5241_init,
+        .setup_aneg     = genmii_setup_aneg,
+        .setup_forced   = genmii_setup_forced,
+        .poll_link      = genmii_poll_link,
+        .read_link      = genmii_read_link,
+};
+static struct mii_phy_def bcm5241_phy_def = {
+        .phy_id         = 0x0143bc30,
+        .phy_id_mask    = 0xfffffff0,
+        .name           = "BCM5241",
+        .features       = MII_BASIC_FEATURES,
+        .magic_aneg     = 1,
+        .ops            = &bcm5241_phy_ops
+};
+
 /* Broadcom BCM 5400 */
 static struct mii_phy_ops bcm5400_phy_ops = {
         .init           = bcm5400_init,
@@ -854,11 +957,8 @@ static struct mii_phy_def bcm5462V_phy_def = {
         .ops            = &bcm5462V_phy_ops
 };
 
-/* Marvell 88E1101 (Apple seem to deal with 2 different revs,
- * I masked out the 8 last bits to get both, but some specs
- * would be useful here) --BenH.
- */
-static struct mii_phy_ops marvell_phy_ops = {
+/* Marvell 88E1101 amd 88E1111 */
+static struct mii_phy_ops marvell88e1101_phy_ops = {
         .suspend        = generic_suspend,
         .setup_aneg     = marvell_setup_aneg,
         .setup_forced   = marvell_setup_forced,
@@ -866,13 +966,41 @@ static struct mii_phy_ops marvell_phy_ops = {
         .read_link      = marvell_read_link
 };
 
-static struct mii_phy_def marvell_phy_def = {
-        .phy_id         = 0x01410c00,
-        .phy_id_mask    = 0xffffff00,
-        .name           = "Marvell 88E1101",
+static struct mii_phy_ops marvell88e1111_phy_ops = {
+        .init           = marvell88e1111_init,
+        .suspend        = generic_suspend,
+        .setup_aneg     = marvell_setup_aneg,
+        .setup_forced   = marvell_setup_forced,
+        .poll_link      = genmii_poll_link,
+        .read_link      = marvell_read_link
+};
+
+/* two revs in darwin for the 88e1101 ... I could use a datasheet
+ * to get the proper names...
+ */
+static struct mii_phy_def marvell88e1101v1_phy_def = {
+        .phy_id         = 0x01410c20,
+        .phy_id_mask    = 0xfffffff0,
+        .name           = "Marvell 88E1101v1",
+        .features       = MII_GBIT_FEATURES,
+        .magic_aneg     = 1,
+        .ops            = &marvell88e1101_phy_ops
+};
+static struct mii_phy_def marvell88e1101v2_phy_def = {
+        .phy_id         = 0x01410c60,
+        .phy_id_mask    = 0xfffffff0,
+        .name           = "Marvell 88E1101v2",
+        .features       = MII_GBIT_FEATURES,
+        .magic_aneg     = 1,
+        .ops            = &marvell88e1101_phy_ops
+};
+static struct mii_phy_def marvell88e1111_phy_def = {
+        .phy_id         = 0x01410cc0,
+        .phy_id_mask    = 0xfffffff0,
+        .name           = "Marvell 88E1111",
         .features       = MII_GBIT_FEATURES,
         .magic_aneg     = 1,
-        .ops            = &marvell_phy_ops
+        .ops            = &marvell88e1111_phy_ops
 };
 
 /* Generic implementation for most 10/100 PHYs */
@@ -895,6 +1023,7 @@ static struct mii_phy_def genmii_phy_def = {
 static struct mii_phy_def* mii_phy_table[] = {
         &bcm5201_phy_def,
         &bcm5221_phy_def,
+        &bcm5241_phy_def,
         &bcm5400_phy_def,
         &bcm5401_phy_def,
         &bcm5411_phy_def,
@@ -902,7 +1031,9 @@ static struct mii_phy_def* mii_phy_table[] = {
         &bcm5421k2_phy_def,
         &bcm5461_phy_def,
         &bcm5462V_phy_def,
-        &marvell_phy_def,
+        &marvell88e1101v1_phy_def,
+        &marvell88e1101v2_phy_def,
+        &marvell88e1111_phy_def,
         &genmii_phy_def,
         NULL
 };
diff --git a/drivers/net/sungem_phy.h b/drivers/net/sungem_phy.h
index 8ee1ca0471cf..1d70ba6f9f10 100644
--- a/drivers/net/sungem_phy.h
+++ b/drivers/net/sungem_phy.h
@@ -30,7 +30,7 @@ struct mii_phy_def
 struct mii_phy
 {
         struct mii_phy_def*     def;
-        int                     advertising;
+        u32                     advertising;
         int                     mii_id;
 
         /* 1: autoneg enabled, 0: disabled */
@@ -85,6 +85,9 @@ extern int mii_phy_probe(struct mii_phy *phy, int mii_id);
 #define MII_BCM5221_SHDOW_AUX_MODE4_IDDQMODE    0x0001
 #define MII_BCM5221_SHDOW_AUX_MODE4_CLKLOPWR    0x0004
 
+/* MII BCM5241 Additional registers */
+#define MII_BCM5241_SHDOW_AUX_MODE4_STANDBYPWR  0x0008
+
 /* MII BCM5400 1000-BASET Control register */
 #define MII_BCM5400_GB_CONTROL                  0x09
 #define MII_BCM5400_GB_CONTROL_FULLDUPLEXCAP    0x0200
@@ -115,5 +118,7 @@ extern int mii_phy_probe(struct mii_phy *phy, int mii_id);
 #define MII_M1011_PHY_SPEC_STATUS_SPD_MASK      0xc000
 #define MII_M1011_PHY_SPEC_STATUS_FULLDUPLEX    0x2000
 #define MII_M1011_PHY_SPEC_STATUS_RESOLVED      0x0800
+#define MII_M1011_PHY_SPEC_STATUS_TX_PAUSE      0x0008
+#define MII_M1011_PHY_SPEC_STATUS_RX_PAUSE      0x0004
 
 #endif /* __SUNGEM_PHY_H__ */
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 4056ba1ff3c7..f4bf62c2a7a5 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -68,8 +68,8 @@
 
 #define DRV_MODULE_NAME         "tg3"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "3.71"
-#define DRV_MODULE_RELDATE      "December 15, 2006"
+#define DRV_MODULE_VERSION      "3.72"
+#define DRV_MODULE_RELDATE      "January 8, 2007"
 
 #define TG3_DEF_MAC_MODE        0
 #define TG3_DEF_RX_MODE         0
@@ -1015,7 +1015,12 @@ out:
         else if (tp->tg3_flags2 & TG3_FLG2_PHY_JITTER_BUG) {
                 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0c00);
                 tg3_writephy(tp, MII_TG3_DSP_ADDRESS, 0x000a);
-                tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b);
+                if (tp->tg3_flags2 & TG3_FLG2_PHY_ADJUST_TRIM) {
+                        tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x110b);
+                        tg3_writephy(tp, MII_TG3_TEST1,
+                                     MII_TG3_TEST1_TRIM_EN | 0x4);
+                } else
+                        tg3_writephy(tp, MII_TG3_DSP_RW_PORT, 0x010b);
                 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x0400);
         }
         /* Set Extended packet length bit (bit 14) on all chips that */
@@ -10803,9 +10808,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
 
         if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
                 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
-                    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
+                    GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) {
                         tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG;
-                else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
+                        if (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5755M)
+                                tp->tg3_flags2 |= TG3_FLG2_PHY_ADJUST_TRIM;
+                } else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
                         tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
         }
 
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index cf78a7e5997b..80f59ac7ec58 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1658,6 +1658,9 @@
 #define MII_TG3_EPHY_TEST               0x1f /* 5906 PHY register */
 #define MII_TG3_EPHY_SHADOW_EN          0x80
 
+#define MII_TG3_TEST1                   0x1e
+#define MII_TG3_TEST1_TRIM_EN           0x0010
+
 /* There are two ways to manage the TX descriptors on the tigon3.
  * Either the descriptors are in host DMA'able memory, or they
  * exist only in the cards on-chip SRAM.  All 16 send bds are under
@@ -2256,6 +2259,7 @@ struct tg3 {
 #define TG3_FLG2_1SHOT_MSI              0x10000000
 #define TG3_FLG2_PHY_JITTER_BUG         0x20000000
 #define TG3_FLG2_NO_FWARE_REPORTED      0x40000000
+#define TG3_FLG2_PHY_ADJUST_TRIM        0x80000000
 
         u32                             split_mode_max_reqs;
 #define SPLIT_MODE_5704_MAX_REQ         3
diff --git a/drivers/net/wireless/ipw2100.c b/drivers/net/wireless/ipw2100.c
index 0e94fbbf7a94..b85857a84870 100644
--- a/drivers/net/wireless/ipw2100.c
+++ b/drivers/net/wireless/ipw2100.c
@@ -2664,7 +2664,7 @@ static void __ipw2100_rx_process(struct ipw2100_priv *priv)
                                 break;
                         }
 #endif
-                        if (stats.len < sizeof(u->rx_data.header))
+                        if (stats.len < sizeof(struct ieee80211_hdr_3addr))
                                 break;
                         switch (WLAN_FC_GET_TYPE(u->rx_data.header.frame_ctl)) {
                         case IEEE80211_FTYPE_MGMT: