diff options
Diffstat (limited to 'drivers/net')
156 files changed, 7041 insertions, 1852 deletions
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c index e1da258bbfb7..0a92436f0538 100644 --- a/drivers/net/3c59x.c +++ b/drivers/net/3c59x.c | |||
@@ -699,7 +699,8 @@ DEFINE_WINDOW_IO(32) | |||
699 | #define DEVICE_PCI(dev) NULL | 699 | #define DEVICE_PCI(dev) NULL |
700 | #endif | 700 | #endif |
701 | 701 | ||
702 | #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL) | 702 | #define VORTEX_PCI(vp) \ |
703 | ((struct pci_dev *) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)) | ||
703 | 704 | ||
704 | #ifdef CONFIG_EISA | 705 | #ifdef CONFIG_EISA |
705 | #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL) | 706 | #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL) |
@@ -707,7 +708,8 @@ DEFINE_WINDOW_IO(32) | |||
707 | #define DEVICE_EISA(dev) NULL | 708 | #define DEVICE_EISA(dev) NULL |
708 | #endif | 709 | #endif |
709 | 710 | ||
710 | #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL) | 711 | #define VORTEX_EISA(vp) \ |
712 | ((struct eisa_device *) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)) | ||
711 | 713 | ||
712 | /* The action to take with a media selection timer tick. | 714 | /* The action to take with a media selection timer tick. |
713 | Note that we deviate from the 3Com order by checking 10base2 before AUI. | 715 | Note that we deviate from the 3Com order by checking 10base2 before AUI. |
diff --git a/drivers/net/8139cp.c b/drivers/net/8139cp.c index ac422cd332ea..dd16e83933a2 100644 --- a/drivers/net/8139cp.c +++ b/drivers/net/8139cp.c | |||
@@ -490,13 +490,11 @@ static inline unsigned int cp_rx_csum_ok (u32 status) | |||
490 | { | 490 | { |
491 | unsigned int protocol = (status >> 16) & 0x3; | 491 | unsigned int protocol = (status >> 16) & 0x3; |
492 | 492 | ||
493 | if (likely((protocol == RxProtoTCP) && (!(status & TCPFail)))) | 493 | if (((protocol == RxProtoTCP) && !(status & TCPFail)) || |
494 | ((protocol == RxProtoUDP) && !(status & UDPFail))) | ||
494 | return 1; | 495 | return 1; |
495 | else if ((protocol == RxProtoUDP) && (!(status & UDPFail))) | 496 | else |
496 | return 1; | 497 | return 0; |
497 | else if ((protocol == RxProtoIP) && (!(status & IPFail))) | ||
498 | return 1; | ||
499 | return 0; | ||
500 | } | 498 | } |
501 | 499 | ||
502 | static int cp_rx_poll(struct napi_struct *napi, int budget) | 500 | static int cp_rx_poll(struct napi_struct *napi, int budget) |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 86fe67fd49ba..4f1755bddf6b 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -1041,7 +1041,7 @@ config SMC911X | |||
1041 | tristate "SMSC LAN911[5678] support" | 1041 | tristate "SMSC LAN911[5678] support" |
1042 | select CRC32 | 1042 | select CRC32 |
1043 | select MII | 1043 | select MII |
1044 | depends on ARM || SUPERH | 1044 | depends on ARM || SUPERH || MN10300 |
1045 | help | 1045 | help |
1046 | This is a driver for SMSC's LAN911x series of Ethernet chipsets | 1046 | This is a driver for SMSC's LAN911x series of Ethernet chipsets |
1047 | including the new LAN9115, LAN9116, LAN9117, and LAN9118. | 1047 | including the new LAN9115, LAN9116, LAN9117, and LAN9118. |
@@ -1055,7 +1055,7 @@ config SMC911X | |||
1055 | 1055 | ||
1056 | config SMSC911X | 1056 | config SMSC911X |
1057 | tristate "SMSC LAN911x/LAN921x families embedded ethernet support" | 1057 | tristate "SMSC LAN911x/LAN921x families embedded ethernet support" |
1058 | depends on ARM || SUPERH || BLACKFIN || MIPS | 1058 | depends on ARM || SUPERH || BLACKFIN || MIPS || MN10300 |
1059 | select CRC32 | 1059 | select CRC32 |
1060 | select MII | 1060 | select MII |
1061 | select PHYLIB | 1061 | select PHYLIB |
@@ -1067,6 +1067,14 @@ config SMSC911X | |||
1067 | <file:Documentation/networking/net-modules.txt>. The module | 1067 | <file:Documentation/networking/net-modules.txt>. The module |
1068 | will be called smsc911x. | 1068 | will be called smsc911x. |
1069 | 1069 | ||
1070 | config SMSC911X_ARCH_HOOKS | ||
1071 | def_bool n | ||
1072 | depends on SMSC911X | ||
1073 | help | ||
1074 | If the arch enables this, it allows the arch to implement various | ||
1075 | hooks for more comprehensive interrupt control and also to override | ||
1076 | the source of the MAC address. | ||
1077 | |||
1070 | config NET_VENDOR_RACAL | 1078 | config NET_VENDOR_RACAL |
1071 | bool "Racal-Interlan (Micom) NI cards" | 1079 | bool "Racal-Interlan (Micom) NI cards" |
1072 | depends on ISA | 1080 | depends on ISA |
@@ -2533,11 +2541,12 @@ source "drivers/net/stmmac/Kconfig" | |||
2533 | config PCH_GBE | 2541 | config PCH_GBE |
2534 | tristate "PCH Gigabit Ethernet" | 2542 | tristate "PCH Gigabit Ethernet" |
2535 | depends on PCI | 2543 | depends on PCI |
2544 | select MII | ||
2536 | ---help--- | 2545 | ---help--- |
2537 | This is a gigabit ethernet driver for Topcliff PCH. | 2546 | This is a gigabit ethernet driver for EG20T PCH. |
2538 | Topcliff PCH is the platform controller hub that is used in Intel's | 2547 | EG20T PCH is the platform controller hub that is used in Intel's |
2539 | general embedded platform. | 2548 | general embedded platform. |
2540 | Topcliff PCH has Gigabit Ethernet interface. | 2549 | EG20T PCH has Gigabit Ethernet interface. |
2541 | Using this interface, it is able to access system devices connected | 2550 | Using this interface, it is able to access system devices connected |
2542 | to Gigabit Ethernet. | 2551 | to Gigabit Ethernet. |
2543 | This driver enables Gigabit Ethernet function. | 2552 | This driver enables Gigabit Ethernet function. |
@@ -2936,6 +2945,18 @@ source "drivers/s390/net/Kconfig" | |||
2936 | 2945 | ||
2937 | source "drivers/net/caif/Kconfig" | 2946 | source "drivers/net/caif/Kconfig" |
2938 | 2947 | ||
2948 | config TILE_NET | ||
2949 | tristate "Tilera GBE/XGBE network driver support" | ||
2950 | depends on TILE | ||
2951 | default y | ||
2952 | select CRC32 | ||
2953 | help | ||
2954 | This is a standard Linux network device driver for the | ||
2955 | on-chip Tilera Gigabit Ethernet and XAUI interfaces. | ||
2956 | |||
2957 | To compile this driver as a module, choose M here: the module | ||
2958 | will be called tile_net. | ||
2959 | |||
2939 | config XEN_NETDEV_FRONTEND | 2960 | config XEN_NETDEV_FRONTEND |
2940 | tristate "Xen network device frontend driver" | 2961 | tristate "Xen network device frontend driver" |
2941 | depends on XEN | 2962 | depends on XEN |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 652fc6b98039..b90738d13994 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
@@ -301,3 +301,4 @@ obj-$(CONFIG_CAIF) += caif/ | |||
301 | 301 | ||
302 | obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/ | 302 | obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/ |
303 | obj-$(CONFIG_PCH_GBE) += pch_gbe/ | 303 | obj-$(CONFIG_PCH_GBE) += pch_gbe/ |
304 | obj-$(CONFIG_TILE_NET) += tile/ | ||
diff --git a/drivers/net/atarilance.c b/drivers/net/atarilance.c index 3134e5326231..8cb27cb7bca1 100644 --- a/drivers/net/atarilance.c +++ b/drivers/net/atarilance.c | |||
@@ -407,7 +407,7 @@ static noinline int __init addr_accessible(volatile void *regp, int wordflag, | |||
407 | int writeflag) | 407 | int writeflag) |
408 | { | 408 | { |
409 | int ret; | 409 | int ret; |
410 | long flags; | 410 | unsigned long flags; |
411 | long *vbr, save_berr; | 411 | long *vbr, save_berr; |
412 | 412 | ||
413 | local_irq_save(flags); | 413 | local_irq_save(flags); |
diff --git a/drivers/net/atl1c/atl1c.h b/drivers/net/atl1c/atl1c.h index ef4115b897bf..9ab58097fa2e 100644 --- a/drivers/net/atl1c/atl1c.h +++ b/drivers/net/atl1c/atl1c.h | |||
@@ -631,8 +631,6 @@ struct atl1c_adapter { | |||
631 | extern char atl1c_driver_name[]; | 631 | extern char atl1c_driver_name[]; |
632 | extern char atl1c_driver_version[]; | 632 | extern char atl1c_driver_version[]; |
633 | 633 | ||
634 | extern int atl1c_up(struct atl1c_adapter *adapter); | ||
635 | extern void atl1c_down(struct atl1c_adapter *adapter); | ||
636 | extern void atl1c_reinit_locked(struct atl1c_adapter *adapter); | 634 | extern void atl1c_reinit_locked(struct atl1c_adapter *adapter); |
637 | extern s32 atl1c_reset_hw(struct atl1c_hw *hw); | 635 | extern s32 atl1c_reset_hw(struct atl1c_hw *hw); |
638 | extern void atl1c_set_ethtool_ops(struct net_device *netdev); | 636 | extern void atl1c_set_ethtool_ops(struct net_device *netdev); |
diff --git a/drivers/net/atl1c/atl1c_hw.c b/drivers/net/atl1c/atl1c_hw.c index 919080b2c3a5..1bf672009948 100644 --- a/drivers/net/atl1c/atl1c_hw.c +++ b/drivers/net/atl1c/atl1c_hw.c | |||
@@ -82,7 +82,7 @@ static int atl1c_get_permanent_address(struct atl1c_hw *hw) | |||
82 | addr[0] = addr[1] = 0; | 82 | addr[0] = addr[1] = 0; |
83 | AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data); | 83 | AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data); |
84 | if (atl1c_check_eeprom_exist(hw)) { | 84 | if (atl1c_check_eeprom_exist(hw)) { |
85 | if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c_b) { | 85 | if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) { |
86 | /* Enable OTP CLK */ | 86 | /* Enable OTP CLK */ |
87 | if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) { | 87 | if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) { |
88 | otp_ctrl_data |= OTP_CTRL_CLK_EN; | 88 | otp_ctrl_data |= OTP_CTRL_CLK_EN; |
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c index 99ffcf667d1f..09b099bfab2b 100644 --- a/drivers/net/atl1c/atl1c_main.c +++ b/drivers/net/atl1c/atl1c_main.c | |||
@@ -66,6 +66,8 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup); | |||
66 | static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter); | 66 | static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter); |
67 | static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, | 67 | static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que, |
68 | int *work_done, int work_to_do); | 68 | int *work_done, int work_to_do); |
69 | static int atl1c_up(struct atl1c_adapter *adapter); | ||
70 | static void atl1c_down(struct atl1c_adapter *adapter); | ||
69 | 71 | ||
70 | static const u16 atl1c_pay_load_size[] = { | 72 | static const u16 atl1c_pay_load_size[] = { |
71 | 128, 256, 512, 1024, 2048, 4096, | 73 | 128, 256, 512, 1024, 2048, 4096, |
@@ -2309,7 +2311,7 @@ static int atl1c_request_irq(struct atl1c_adapter *adapter) | |||
2309 | return err; | 2311 | return err; |
2310 | } | 2312 | } |
2311 | 2313 | ||
2312 | int atl1c_up(struct atl1c_adapter *adapter) | 2314 | static int atl1c_up(struct atl1c_adapter *adapter) |
2313 | { | 2315 | { |
2314 | struct net_device *netdev = adapter->netdev; | 2316 | struct net_device *netdev = adapter->netdev; |
2315 | int num; | 2317 | int num; |
@@ -2351,7 +2353,7 @@ err_alloc_rx: | |||
2351 | return err; | 2353 | return err; |
2352 | } | 2354 | } |
2353 | 2355 | ||
2354 | void atl1c_down(struct atl1c_adapter *adapter) | 2356 | static void atl1c_down(struct atl1c_adapter *adapter) |
2355 | { | 2357 | { |
2356 | struct net_device *netdev = adapter->netdev; | 2358 | struct net_device *netdev = adapter->netdev; |
2357 | 2359 | ||
diff --git a/drivers/net/atlx/atl1.c b/drivers/net/atlx/atl1.c index dbd27b8e66bd..53363108994e 100644 --- a/drivers/net/atlx/atl1.c +++ b/drivers/net/atlx/atl1.c | |||
@@ -91,6 +91,8 @@ MODULE_VERSION(ATLX_DRIVER_VERSION); | |||
91 | /* Temporary hack for merging atl1 and atl2 */ | 91 | /* Temporary hack for merging atl1 and atl2 */ |
92 | #include "atlx.c" | 92 | #include "atlx.c" |
93 | 93 | ||
94 | static const struct ethtool_ops atl1_ethtool_ops; | ||
95 | |||
94 | /* | 96 | /* |
95 | * This is the only thing that needs to be changed to adjust the | 97 | * This is the only thing that needs to be changed to adjust the |
96 | * maximum number of ports that the driver can manage. | 98 | * maximum number of ports that the driver can manage. |
@@ -353,7 +355,7 @@ static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value) | |||
353 | * hw - Struct containing variables accessed by shared code | 355 | * hw - Struct containing variables accessed by shared code |
354 | * reg_addr - address of the PHY register to read | 356 | * reg_addr - address of the PHY register to read |
355 | */ | 357 | */ |
356 | s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data) | 358 | static s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data) |
357 | { | 359 | { |
358 | u32 val; | 360 | u32 val; |
359 | int i; | 361 | int i; |
@@ -553,7 +555,7 @@ static s32 atl1_read_mac_addr(struct atl1_hw *hw) | |||
553 | * 1. calcu 32bit CRC for multicast address | 555 | * 1. calcu 32bit CRC for multicast address |
554 | * 2. reverse crc with MSB to LSB | 556 | * 2. reverse crc with MSB to LSB |
555 | */ | 557 | */ |
556 | u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr) | 558 | static u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr) |
557 | { | 559 | { |
558 | u32 crc32, value = 0; | 560 | u32 crc32, value = 0; |
559 | int i; | 561 | int i; |
@@ -570,7 +572,7 @@ u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr) | |||
570 | * hw - Struct containing variables accessed by shared code | 572 | * hw - Struct containing variables accessed by shared code |
571 | * hash_value - Multicast address hash value | 573 | * hash_value - Multicast address hash value |
572 | */ | 574 | */ |
573 | void atl1_hash_set(struct atl1_hw *hw, u32 hash_value) | 575 | static void atl1_hash_set(struct atl1_hw *hw, u32 hash_value) |
574 | { | 576 | { |
575 | u32 hash_bit, hash_reg; | 577 | u32 hash_bit, hash_reg; |
576 | u32 mta; | 578 | u32 mta; |
@@ -914,7 +916,7 @@ static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex | |||
914 | return 0; | 916 | return 0; |
915 | } | 917 | } |
916 | 918 | ||
917 | void atl1_set_mac_addr(struct atl1_hw *hw) | 919 | static void atl1_set_mac_addr(struct atl1_hw *hw) |
918 | { | 920 | { |
919 | u32 value; | 921 | u32 value; |
920 | /* | 922 | /* |
@@ -3041,7 +3043,6 @@ static int __devinit atl1_probe(struct pci_dev *pdev, | |||
3041 | atl1_pcie_patch(adapter); | 3043 | atl1_pcie_patch(adapter); |
3042 | /* assume we have no link for now */ | 3044 | /* assume we have no link for now */ |
3043 | netif_carrier_off(netdev); | 3045 | netif_carrier_off(netdev); |
3044 | netif_stop_queue(netdev); | ||
3045 | 3046 | ||
3046 | setup_timer(&adapter->phy_config_timer, atl1_phy_config, | 3047 | setup_timer(&adapter->phy_config_timer, atl1_phy_config, |
3047 | (unsigned long)adapter); | 3048 | (unsigned long)adapter); |
@@ -3658,7 +3659,7 @@ static int atl1_nway_reset(struct net_device *netdev) | |||
3658 | return 0; | 3659 | return 0; |
3659 | } | 3660 | } |
3660 | 3661 | ||
3661 | const struct ethtool_ops atl1_ethtool_ops = { | 3662 | static const struct ethtool_ops atl1_ethtool_ops = { |
3662 | .get_settings = atl1_get_settings, | 3663 | .get_settings = atl1_get_settings, |
3663 | .set_settings = atl1_set_settings, | 3664 | .set_settings = atl1_set_settings, |
3664 | .get_drvinfo = atl1_get_drvinfo, | 3665 | .get_drvinfo = atl1_get_drvinfo, |
diff --git a/drivers/net/atlx/atl1.h b/drivers/net/atlx/atl1.h index 9c0ddb273ac8..68de8cbfb3ec 100644 --- a/drivers/net/atlx/atl1.h +++ b/drivers/net/atlx/atl1.h | |||
@@ -56,16 +56,13 @@ struct atl1_adapter; | |||
56 | struct atl1_hw; | 56 | struct atl1_hw; |
57 | 57 | ||
58 | /* function prototypes needed by multiple files */ | 58 | /* function prototypes needed by multiple files */ |
59 | u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr); | 59 | static u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr); |
60 | void atl1_hash_set(struct atl1_hw *hw, u32 hash_value); | 60 | static void atl1_hash_set(struct atl1_hw *hw, u32 hash_value); |
61 | s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data); | 61 | static void atl1_set_mac_addr(struct atl1_hw *hw); |
62 | void atl1_set_mac_addr(struct atl1_hw *hw); | ||
63 | static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, | 62 | static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, |
64 | int cmd); | 63 | int cmd); |
65 | static u32 atl1_check_link(struct atl1_adapter *adapter); | 64 | static u32 atl1_check_link(struct atl1_adapter *adapter); |
66 | 65 | ||
67 | extern const struct ethtool_ops atl1_ethtool_ops; | ||
68 | |||
69 | /* hardware definitions specific to L1 */ | 66 | /* hardware definitions specific to L1 */ |
70 | 67 | ||
71 | /* Block IDLE Status Register */ | 68 | /* Block IDLE Status Register */ |
diff --git a/drivers/net/atlx/atlx.c b/drivers/net/atlx/atlx.c index f979ea2d6d3c..afb7f7dd1bb1 100644 --- a/drivers/net/atlx/atlx.c +++ b/drivers/net/atlx/atlx.c | |||
@@ -41,6 +41,10 @@ | |||
41 | 41 | ||
42 | #include "atlx.h" | 42 | #include "atlx.h" |
43 | 43 | ||
44 | static s32 atlx_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data); | ||
45 | static u32 atlx_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr); | ||
46 | static void atlx_set_mac_addr(struct atl1_hw *hw); | ||
47 | |||
44 | static struct atlx_spi_flash_dev flash_table[] = { | 48 | static struct atlx_spi_flash_dev flash_table[] = { |
45 | /* MFR_NAME WRSR READ PRGM WREN WRDI RDSR RDID SEC_ERS CHIP_ERS */ | 49 | /* MFR_NAME WRSR READ PRGM WREN WRDI RDSR RDID SEC_ERS CHIP_ERS */ |
46 | {"Atmel", 0x00, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62}, | 50 | {"Atmel", 0x00, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62}, |
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c index 43489f89c142..53eff9ba6e95 100644 --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c | |||
@@ -155,10 +155,10 @@ static void au1000_enable_mac(struct net_device *dev, int force_reset) | |||
155 | spin_lock_irqsave(&aup->lock, flags); | 155 | spin_lock_irqsave(&aup->lock, flags); |
156 | 156 | ||
157 | if (force_reset || (!aup->mac_enabled)) { | 157 | if (force_reset || (!aup->mac_enabled)) { |
158 | writel(MAC_EN_CLOCK_ENABLE, &aup->enable); | 158 | writel(MAC_EN_CLOCK_ENABLE, aup->enable); |
159 | au_sync_delay(2); | 159 | au_sync_delay(2); |
160 | writel((MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2 | 160 | writel((MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2 |
161 | | MAC_EN_CLOCK_ENABLE), &aup->enable); | 161 | | MAC_EN_CLOCK_ENABLE), aup->enable); |
162 | au_sync_delay(2); | 162 | au_sync_delay(2); |
163 | 163 | ||
164 | aup->mac_enabled = 1; | 164 | aup->mac_enabled = 1; |
@@ -503,9 +503,9 @@ static void au1000_reset_mac_unlocked(struct net_device *dev) | |||
503 | 503 | ||
504 | au1000_hard_stop(dev); | 504 | au1000_hard_stop(dev); |
505 | 505 | ||
506 | writel(MAC_EN_CLOCK_ENABLE, &aup->enable); | 506 | writel(MAC_EN_CLOCK_ENABLE, aup->enable); |
507 | au_sync_delay(2); | 507 | au_sync_delay(2); |
508 | writel(0, &aup->enable); | 508 | writel(0, aup->enable); |
509 | au_sync_delay(2); | 509 | au_sync_delay(2); |
510 | 510 | ||
511 | aup->tx_full = 0; | 511 | aup->tx_full = 0; |
@@ -1119,7 +1119,7 @@ static int __devinit au1000_probe(struct platform_device *pdev) | |||
1119 | /* set a random MAC now in case platform_data doesn't provide one */ | 1119 | /* set a random MAC now in case platform_data doesn't provide one */ |
1120 | random_ether_addr(dev->dev_addr); | 1120 | random_ether_addr(dev->dev_addr); |
1121 | 1121 | ||
1122 | writel(0, &aup->enable); | 1122 | writel(0, aup->enable); |
1123 | aup->mac_enabled = 0; | 1123 | aup->mac_enabled = 0; |
1124 | 1124 | ||
1125 | pd = pdev->dev.platform_data; | 1125 | pd = pdev->dev.platform_data; |
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c index 1e7f305ed00b..36eca1ce75d4 100644 --- a/drivers/net/benet/be_cmds.c +++ b/drivers/net/benet/be_cmds.c | |||
@@ -1471,42 +1471,6 @@ err: | |||
1471 | return status; | 1471 | return status; |
1472 | } | 1472 | } |
1473 | 1473 | ||
1474 | /* Uses sync mcc */ | ||
1475 | int be_cmd_read_port_type(struct be_adapter *adapter, u32 port, | ||
1476 | u8 *connector) | ||
1477 | { | ||
1478 | struct be_mcc_wrb *wrb; | ||
1479 | struct be_cmd_req_port_type *req; | ||
1480 | int status; | ||
1481 | |||
1482 | spin_lock_bh(&adapter->mcc_lock); | ||
1483 | |||
1484 | wrb = wrb_from_mccq(adapter); | ||
1485 | if (!wrb) { | ||
1486 | status = -EBUSY; | ||
1487 | goto err; | ||
1488 | } | ||
1489 | req = embedded_payload(wrb); | ||
1490 | |||
1491 | be_wrb_hdr_prepare(wrb, sizeof(struct be_cmd_resp_port_type), true, 0, | ||
1492 | OPCODE_COMMON_READ_TRANSRECV_DATA); | ||
1493 | |||
1494 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | ||
1495 | OPCODE_COMMON_READ_TRANSRECV_DATA, sizeof(*req)); | ||
1496 | |||
1497 | req->port = cpu_to_le32(port); | ||
1498 | req->page_num = cpu_to_le32(TR_PAGE_A0); | ||
1499 | status = be_mcc_notify_wait(adapter); | ||
1500 | if (!status) { | ||
1501 | struct be_cmd_resp_port_type *resp = embedded_payload(wrb); | ||
1502 | *connector = resp->data.connector; | ||
1503 | } | ||
1504 | |||
1505 | err: | ||
1506 | spin_unlock_bh(&adapter->mcc_lock); | ||
1507 | return status; | ||
1508 | } | ||
1509 | |||
1510 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, | 1474 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, |
1511 | u32 flash_type, u32 flash_opcode, u32 buf_size) | 1475 | u32 flash_type, u32 flash_opcode, u32 buf_size) |
1512 | { | 1476 | { |
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h index c7f6cdfe1c73..8469ff061f30 100644 --- a/drivers/net/benet/be_cmds.h +++ b/drivers/net/benet/be_cmds.h | |||
@@ -1022,8 +1022,6 @@ extern int be_cmd_set_beacon_state(struct be_adapter *adapter, | |||
1022 | u8 port_num, u8 beacon, u8 status, u8 state); | 1022 | u8 port_num, u8 beacon, u8 status, u8 state); |
1023 | extern int be_cmd_get_beacon_state(struct be_adapter *adapter, | 1023 | extern int be_cmd_get_beacon_state(struct be_adapter *adapter, |
1024 | u8 port_num, u32 *state); | 1024 | u8 port_num, u32 *state); |
1025 | extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port, | ||
1026 | u8 *connector); | ||
1027 | extern int be_cmd_write_flashrom(struct be_adapter *adapter, | 1025 | extern int be_cmd_write_flashrom(struct be_adapter *adapter, |
1028 | struct be_dma_mem *cmd, u32 flash_oper, | 1026 | struct be_dma_mem *cmd, u32 flash_oper, |
1029 | u32 flash_opcode, u32 buf_size); | 1027 | u32 flash_opcode, u32 buf_size); |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index 45b1f6635282..93354eee2cfd 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -849,20 +849,16 @@ static void be_rx_stats_update(struct be_rx_obj *rxo, | |||
849 | stats->rx_mcast_pkts++; | 849 | stats->rx_mcast_pkts++; |
850 | } | 850 | } |
851 | 851 | ||
852 | static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso) | 852 | static inline bool csum_passed(struct be_eth_rx_compl *rxcp) |
853 | { | 853 | { |
854 | u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk; | 854 | u8 l4_cksm, ipv6, ipcksm; |
855 | 855 | ||
856 | l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp); | 856 | l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp); |
857 | ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp); | 857 | ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp); |
858 | ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp); | 858 | ipv6 = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp); |
859 | if (ip_version) { | ||
860 | tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp); | ||
861 | udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp); | ||
862 | } | ||
863 | ipv6_chk = (ip_version && (tcpf || udpf)); | ||
864 | 859 | ||
865 | return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true; | 860 | /* Ignore ipcksm for ipv6 pkts */ |
861 | return l4_cksm && (ipcksm || ipv6); | ||
866 | } | 862 | } |
867 | 863 | ||
868 | static struct be_rx_page_info * | 864 | static struct be_rx_page_info * |
@@ -1017,10 +1013,10 @@ static void be_rx_compl_process(struct be_adapter *adapter, | |||
1017 | 1013 | ||
1018 | skb_fill_rx_data(adapter, rxo, skb, rxcp, num_rcvd); | 1014 | skb_fill_rx_data(adapter, rxo, skb, rxcp, num_rcvd); |
1019 | 1015 | ||
1020 | if (do_pkt_csum(rxcp, adapter->rx_csum)) | 1016 | if (likely(adapter->rx_csum && csum_passed(rxcp))) |
1021 | skb_checksum_none_assert(skb); | ||
1022 | else | ||
1023 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 1017 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
1018 | else | ||
1019 | skb_checksum_none_assert(skb); | ||
1024 | 1020 | ||
1025 | skb->truesize = skb->len + sizeof(struct sk_buff); | 1021 | skb->truesize = skb->len + sizeof(struct sk_buff); |
1026 | skb->protocol = eth_type_trans(skb, adapter->netdev); | 1022 | skb->protocol = eth_type_trans(skb, adapter->netdev); |
@@ -1674,7 +1670,7 @@ static inline bool do_gro(struct be_adapter *adapter, struct be_rx_obj *rxo, | |||
1674 | return (tcp_frame && !err) ? true : false; | 1670 | return (tcp_frame && !err) ? true : false; |
1675 | } | 1671 | } |
1676 | 1672 | ||
1677 | int be_poll_rx(struct napi_struct *napi, int budget) | 1673 | static int be_poll_rx(struct napi_struct *napi, int budget) |
1678 | { | 1674 | { |
1679 | struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi); | 1675 | struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi); |
1680 | struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq); | 1676 | struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq); |
@@ -1806,6 +1802,20 @@ static void be_worker(struct work_struct *work) | |||
1806 | struct be_rx_obj *rxo; | 1802 | struct be_rx_obj *rxo; |
1807 | int i; | 1803 | int i; |
1808 | 1804 | ||
1805 | /* when interrupts are not yet enabled, just reap any pending | ||
1806 | * mcc completions */ | ||
1807 | if (!netif_running(adapter->netdev)) { | ||
1808 | int mcc_compl, status = 0; | ||
1809 | |||
1810 | mcc_compl = be_process_mcc(adapter, &status); | ||
1811 | |||
1812 | if (mcc_compl) { | ||
1813 | struct be_mcc_obj *mcc_obj = &adapter->mcc_obj; | ||
1814 | be_cq_notify(adapter, mcc_obj->cq.id, false, mcc_compl); | ||
1815 | } | ||
1816 | goto reschedule; | ||
1817 | } | ||
1818 | |||
1809 | if (!adapter->stats_ioctl_sent) | 1819 | if (!adapter->stats_ioctl_sent) |
1810 | be_cmd_get_stats(adapter, &adapter->stats_cmd); | 1820 | be_cmd_get_stats(adapter, &adapter->stats_cmd); |
1811 | 1821 | ||
@@ -1824,6 +1834,7 @@ static void be_worker(struct work_struct *work) | |||
1824 | if (!adapter->ue_detected) | 1834 | if (!adapter->ue_detected) |
1825 | be_detect_dump_ue(adapter); | 1835 | be_detect_dump_ue(adapter); |
1826 | 1836 | ||
1837 | reschedule: | ||
1827 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); | 1838 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000)); |
1828 | } | 1839 | } |
1829 | 1840 | ||
@@ -2019,8 +2030,6 @@ static int be_close(struct net_device *netdev) | |||
2019 | struct be_eq_obj *tx_eq = &adapter->tx_eq; | 2030 | struct be_eq_obj *tx_eq = &adapter->tx_eq; |
2020 | int vec, i; | 2031 | int vec, i; |
2021 | 2032 | ||
2022 | cancel_delayed_work_sync(&adapter->work); | ||
2023 | |||
2024 | be_async_mcc_disable(adapter); | 2033 | be_async_mcc_disable(adapter); |
2025 | 2034 | ||
2026 | netif_stop_queue(netdev); | 2035 | netif_stop_queue(netdev); |
@@ -2085,8 +2094,6 @@ static int be_open(struct net_device *netdev) | |||
2085 | /* Now that interrupts are on we can process async mcc */ | 2094 | /* Now that interrupts are on we can process async mcc */ |
2086 | be_async_mcc_enable(adapter); | 2095 | be_async_mcc_enable(adapter); |
2087 | 2096 | ||
2088 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); | ||
2089 | |||
2090 | status = be_cmd_link_status_query(adapter, &link_up, &mac_speed, | 2097 | status = be_cmd_link_status_query(adapter, &link_up, &mac_speed, |
2091 | &link_speed); | 2098 | &link_speed); |
2092 | if (status) | 2099 | if (status) |
@@ -2299,9 +2306,6 @@ static int be_clear(struct be_adapter *adapter) | |||
2299 | 2306 | ||
2300 | 2307 | ||
2301 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " | 2308 | #define FW_FILE_HDR_SIGN "ServerEngines Corp. " |
2302 | char flash_cookie[2][16] = {"*** SE FLAS", | ||
2303 | "H DIRECTORY *** "}; | ||
2304 | |||
2305 | static bool be_flash_redboot(struct be_adapter *adapter, | 2309 | static bool be_flash_redboot(struct be_adapter *adapter, |
2306 | const u8 *p, u32 img_start, int image_size, | 2310 | const u8 *p, u32 img_start, int image_size, |
2307 | int hdr_size) | 2311 | int hdr_size) |
@@ -2454,6 +2458,12 @@ int be_load_fw(struct be_adapter *adapter, u8 *func) | |||
2454 | int status, i = 0, num_imgs = 0; | 2458 | int status, i = 0, num_imgs = 0; |
2455 | const u8 *p; | 2459 | const u8 *p; |
2456 | 2460 | ||
2461 | if (!netif_running(adapter->netdev)) { | ||
2462 | dev_err(&adapter->pdev->dev, | ||
2463 | "Firmware load not allowed (interface is down)\n"); | ||
2464 | return -EPERM; | ||
2465 | } | ||
2466 | |||
2457 | strcpy(fw_file, func); | 2467 | strcpy(fw_file, func); |
2458 | 2468 | ||
2459 | status = request_firmware(&fw, fw_file, &adapter->pdev->dev); | 2469 | status = request_firmware(&fw, fw_file, &adapter->pdev->dev); |
@@ -2559,7 +2569,6 @@ static void be_netdev_init(struct net_device *netdev) | |||
2559 | netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc, | 2569 | netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc, |
2560 | BE_NAPI_WEIGHT); | 2570 | BE_NAPI_WEIGHT); |
2561 | 2571 | ||
2562 | netif_carrier_off(netdev); | ||
2563 | netif_stop_queue(netdev); | 2572 | netif_stop_queue(netdev); |
2564 | } | 2573 | } |
2565 | 2574 | ||
@@ -2715,6 +2724,8 @@ static void __devexit be_remove(struct pci_dev *pdev) | |||
2715 | if (!adapter) | 2724 | if (!adapter) |
2716 | return; | 2725 | return; |
2717 | 2726 | ||
2727 | cancel_delayed_work_sync(&adapter->work); | ||
2728 | |||
2718 | unregister_netdev(adapter->netdev); | 2729 | unregister_netdev(adapter->netdev); |
2719 | 2730 | ||
2720 | be_clear(adapter); | 2731 | be_clear(adapter); |
@@ -2868,8 +2879,10 @@ static int __devinit be_probe(struct pci_dev *pdev, | |||
2868 | status = register_netdev(netdev); | 2879 | status = register_netdev(netdev); |
2869 | if (status != 0) | 2880 | if (status != 0) |
2870 | goto unsetup; | 2881 | goto unsetup; |
2882 | netif_carrier_off(netdev); | ||
2871 | 2883 | ||
2872 | dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num); | 2884 | dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num); |
2885 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); | ||
2873 | return 0; | 2886 | return 0; |
2874 | 2887 | ||
2875 | unsetup: | 2888 | unsetup: |
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 9571ecf48f35..863e73a85fbe 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -20,8 +20,8 @@ | |||
20 | * (you will need to reboot afterwards) */ | 20 | * (you will need to reboot afterwards) */ |
21 | /* #define BNX2X_STOP_ON_ERROR */ | 21 | /* #define BNX2X_STOP_ON_ERROR */ |
22 | 22 | ||
23 | #define DRV_MODULE_VERSION "1.60.00-3" | 23 | #define DRV_MODULE_VERSION "1.60.00-4" |
24 | #define DRV_MODULE_RELDATE "2010/10/19" | 24 | #define DRV_MODULE_RELDATE "2010/11/01" |
25 | #define BNX2X_BC_VER 0x040200 | 25 | #define BNX2X_BC_VER 0x040200 |
26 | 26 | ||
27 | #define BNX2X_MULTI_QUEUE | 27 | #define BNX2X_MULTI_QUEUE |
@@ -1288,15 +1288,11 @@ struct bnx2x_func_init_params { | |||
1288 | 1288 | ||
1289 | #define WAIT_RAMROD_POLL 0x01 | 1289 | #define WAIT_RAMROD_POLL 0x01 |
1290 | #define WAIT_RAMROD_COMMON 0x02 | 1290 | #define WAIT_RAMROD_COMMON 0x02 |
1291 | int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, | ||
1292 | int *state_p, int flags); | ||
1293 | 1291 | ||
1294 | /* dmae */ | 1292 | /* dmae */ |
1295 | void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); | 1293 | void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32); |
1296 | void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, | 1294 | void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr, |
1297 | u32 len32); | 1295 | u32 len32); |
1298 | void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, | ||
1299 | u32 addr, u32 len); | ||
1300 | void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx); | 1296 | void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx); |
1301 | u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type); | 1297 | u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type); |
1302 | u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode); | 1298 | u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode); |
@@ -1307,7 +1303,6 @@ int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port); | |||
1307 | int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); | 1303 | int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); |
1308 | int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); | 1304 | int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port); |
1309 | u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); | 1305 | u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param); |
1310 | void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); | ||
1311 | 1306 | ||
1312 | void bnx2x_calc_fc_adv(struct bnx2x *bp); | 1307 | void bnx2x_calc_fc_adv(struct bnx2x *bp); |
1313 | int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, | 1308 | int bnx2x_sp_post(struct bnx2x *bp, int command, int cid, |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.c b/drivers/net/bnx2x/bnx2x_cmn.c index bc5837514074..94d5f59d5a6f 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.c +++ b/drivers/net/bnx2x/bnx2x_cmn.c | |||
@@ -25,6 +25,7 @@ | |||
25 | 25 | ||
26 | #include "bnx2x_init.h" | 26 | #include "bnx2x_init.h" |
27 | 27 | ||
28 | static int bnx2x_setup_irqs(struct bnx2x *bp); | ||
28 | 29 | ||
29 | /* free skb in the packet ring at pos idx | 30 | /* free skb in the packet ring at pos idx |
30 | * return idx of last bd freed | 31 | * return idx of last bd freed |
@@ -1679,7 +1680,7 @@ static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb) | |||
1679 | rc = XMIT_PLAIN; | 1680 | rc = XMIT_PLAIN; |
1680 | 1681 | ||
1681 | else { | 1682 | else { |
1682 | if (skb->protocol == htons(ETH_P_IPV6)) { | 1683 | if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) { |
1683 | rc = XMIT_CSUM_V6; | 1684 | rc = XMIT_CSUM_V6; |
1684 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) | 1685 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) |
1685 | rc |= XMIT_CSUM_TCP; | 1686 | rc |= XMIT_CSUM_TCP; |
@@ -2187,7 +2188,7 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p) | |||
2187 | } | 2188 | } |
2188 | 2189 | ||
2189 | 2190 | ||
2190 | int bnx2x_setup_irqs(struct bnx2x *bp) | 2191 | static int bnx2x_setup_irqs(struct bnx2x *bp) |
2191 | { | 2192 | { |
2192 | int rc = 0; | 2193 | int rc = 0; |
2193 | if (bp->flags & USING_MSIX_FLAG) { | 2194 | if (bp->flags & USING_MSIX_FLAG) { |
diff --git a/drivers/net/bnx2x/bnx2x_cmn.h b/drivers/net/bnx2x/bnx2x_cmn.h index 5bfe0ab1d2d4..6b28739c5302 100644 --- a/drivers/net/bnx2x/bnx2x_cmn.h +++ b/drivers/net/bnx2x/bnx2x_cmn.h | |||
@@ -117,13 +117,6 @@ void bnx2x_setup_cnic_irq_info(struct bnx2x *bp); | |||
117 | void bnx2x_int_enable(struct bnx2x *bp); | 117 | void bnx2x_int_enable(struct bnx2x *bp); |
118 | 118 | ||
119 | /** | 119 | /** |
120 | * Disable HW interrupts. | ||
121 | * | ||
122 | * @param bp | ||
123 | */ | ||
124 | void bnx2x_int_disable(struct bnx2x *bp); | ||
125 | |||
126 | /** | ||
127 | * Disable interrupts. This function ensures that there are no | 120 | * Disable interrupts. This function ensures that there are no |
128 | * ISRs or SP DPCs (sp_task) are running after it returns. | 121 | * ISRs or SP DPCs (sp_task) are running after it returns. |
129 | * | 122 | * |
@@ -192,17 +185,6 @@ int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
192 | int is_leading); | 185 | int is_leading); |
193 | 186 | ||
194 | /** | 187 | /** |
195 | * Bring down an eth client. | ||
196 | * | ||
197 | * @param bp | ||
198 | * @param p | ||
199 | * | ||
200 | * @return int | ||
201 | */ | ||
202 | int bnx2x_stop_fw_client(struct bnx2x *bp, | ||
203 | struct bnx2x_client_ramrod_params *p); | ||
204 | |||
205 | /** | ||
206 | * Set number of queues according to mode | 188 | * Set number of queues according to mode |
207 | * | 189 | * |
208 | * @param bp | 190 | * @param bp |
@@ -250,34 +232,6 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource); | |||
250 | */ | 232 | */ |
251 | void bnx2x_set_eth_mac(struct bnx2x *bp, int set); | 233 | void bnx2x_set_eth_mac(struct bnx2x *bp, int set); |
252 | 234 | ||
253 | #ifdef BCM_CNIC | ||
254 | /** | ||
255 | * Set iSCSI MAC(s) at the next enties in the CAM after the ETH | ||
256 | * MAC(s). The function will wait until the ramrod completion | ||
257 | * returns. | ||
258 | * | ||
259 | * @param bp driver handle | ||
260 | * @param set set or clear the CAM entry | ||
261 | * | ||
262 | * @return 0 if cussess, -ENODEV if ramrod doesn't return. | ||
263 | */ | ||
264 | int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set); | ||
265 | #endif | ||
266 | |||
267 | /** | ||
268 | * Initialize status block in FW and HW | ||
269 | * | ||
270 | * @param bp driver handle | ||
271 | * @param dma_addr_t mapping | ||
272 | * @param int sb_id | ||
273 | * @param int vfid | ||
274 | * @param u8 vf_valid | ||
275 | * @param int fw_sb_id | ||
276 | * @param int igu_sb_id | ||
277 | */ | ||
278 | void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, | ||
279 | u8 vf_valid, int fw_sb_id, int igu_sb_id); | ||
280 | |||
281 | /** | 235 | /** |
282 | * Set MAC filtering configurations. | 236 | * Set MAC filtering configurations. |
283 | * | 237 | * |
@@ -326,7 +280,6 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe); | |||
326 | * @return int | 280 | * @return int |
327 | */ | 281 | */ |
328 | int bnx2x_func_start(struct bnx2x *bp); | 282 | int bnx2x_func_start(struct bnx2x *bp); |
329 | int bnx2x_func_stop(struct bnx2x *bp); | ||
330 | 283 | ||
331 | /** | 284 | /** |
332 | * Prepare ILT configurations according to current driver | 285 | * Prepare ILT configurations according to current driver |
@@ -396,14 +349,6 @@ int bnx2x_enable_msix(struct bnx2x *bp); | |||
396 | int bnx2x_enable_msi(struct bnx2x *bp); | 349 | int bnx2x_enable_msi(struct bnx2x *bp); |
397 | 350 | ||
398 | /** | 351 | /** |
399 | * Request IRQ vectors from OS. | ||
400 | * | ||
401 | * @param bp | ||
402 | * | ||
403 | * @return int | ||
404 | */ | ||
405 | int bnx2x_setup_irqs(struct bnx2x *bp); | ||
406 | /** | ||
407 | * NAPI callback | 352 | * NAPI callback |
408 | * | 353 | * |
409 | * @param napi | 354 | * @param napi |
diff --git a/drivers/net/bnx2x/bnx2x_hsi.h b/drivers/net/bnx2x/bnx2x_hsi.h index 18c8e23a0e82..4cfd4e9b5586 100644 --- a/drivers/net/bnx2x/bnx2x_hsi.h +++ b/drivers/net/bnx2x/bnx2x_hsi.h | |||
@@ -244,7 +244,14 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */ | |||
244 | 244 | ||
245 | u16 xgxs_config_tx[4]; /* 0x1A0 */ | 245 | u16 xgxs_config_tx[4]; /* 0x1A0 */ |
246 | 246 | ||
247 | u32 Reserved1[57]; /* 0x1A8 */ | 247 | u32 Reserved1[56]; /* 0x1A8 */ |
248 | u32 default_cfg; /* 0x288 */ | ||
249 | /* Enable BAM on KR */ | ||
250 | #define PORT_HW_CFG_ENABLE_BAM_ON_KR_MASK 0x00100000 | ||
251 | #define PORT_HW_CFG_ENABLE_BAM_ON_KR_SHIFT 20 | ||
252 | #define PORT_HW_CFG_ENABLE_BAM_ON_KR_DISABLED 0x00000000 | ||
253 | #define PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED 0x00100000 | ||
254 | |||
248 | u32 speed_capability_mask2; /* 0x28C */ | 255 | u32 speed_capability_mask2; /* 0x28C */ |
249 | #define PORT_HW_CFG_SPEED_CAPABILITY2_D3_MASK 0x0000FFFF | 256 | #define PORT_HW_CFG_SPEED_CAPABILITY2_D3_MASK 0x0000FFFF |
250 | #define PORT_HW_CFG_SPEED_CAPABILITY2_D3_SHIFT 0 | 257 | #define PORT_HW_CFG_SPEED_CAPABILITY2_D3_SHIFT 0 |
diff --git a/drivers/net/bnx2x/bnx2x_init_ops.h b/drivers/net/bnx2x/bnx2x_init_ops.h index e65de784182c..a306b0e46b61 100644 --- a/drivers/net/bnx2x/bnx2x_init_ops.h +++ b/drivers/net/bnx2x/bnx2x_init_ops.h | |||
@@ -16,7 +16,9 @@ | |||
16 | #define BNX2X_INIT_OPS_H | 16 | #define BNX2X_INIT_OPS_H |
17 | 17 | ||
18 | static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len); | 18 | static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len); |
19 | 19 | static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val); | |
20 | static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, | ||
21 | u32 addr, u32 len); | ||
20 | 22 | ||
21 | static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data, | 23 | static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data, |
22 | u32 len) | 24 | u32 len) |
@@ -589,7 +591,7 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop) | |||
589 | return rc; | 591 | return rc; |
590 | } | 592 | } |
591 | 593 | ||
592 | int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) | 594 | static int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop) |
593 | { | 595 | { |
594 | int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop); | 596 | int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop); |
595 | if (!rc) | 597 | if (!rc) |
@@ -635,7 +637,7 @@ static void bnx2x_ilt_line_init_op(struct bnx2x *bp, struct bnx2x_ilt *ilt, | |||
635 | } | 637 | } |
636 | } | 638 | } |
637 | 639 | ||
638 | void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, | 640 | static void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, |
639 | struct ilt_client_info *ilt_cli, | 641 | struct ilt_client_info *ilt_cli, |
640 | u32 ilt_start, u8 initop) | 642 | u32 ilt_start, u8 initop) |
641 | { | 643 | { |
@@ -688,8 +690,10 @@ void bnx2x_ilt_boundry_init_op(struct bnx2x *bp, | |||
688 | } | 690 | } |
689 | } | 691 | } |
690 | 692 | ||
691 | void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, | 693 | static void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, |
692 | struct ilt_client_info *ilt_cli, u8 initop) | 694 | struct bnx2x_ilt *ilt, |
695 | struct ilt_client_info *ilt_cli, | ||
696 | u8 initop) | ||
693 | { | 697 | { |
694 | int i; | 698 | int i; |
695 | 699 | ||
@@ -703,8 +707,8 @@ void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt, | |||
703 | bnx2x_ilt_boundry_init_op(bp, ilt_cli, ilt->start_line, initop); | 707 | bnx2x_ilt_boundry_init_op(bp, ilt_cli, ilt->start_line, initop); |
704 | } | 708 | } |
705 | 709 | ||
706 | void bnx2x_ilt_client_init_op(struct bnx2x *bp, | 710 | static void bnx2x_ilt_client_init_op(struct bnx2x *bp, |
707 | struct ilt_client_info *ilt_cli, u8 initop) | 711 | struct ilt_client_info *ilt_cli, u8 initop) |
708 | { | 712 | { |
709 | struct bnx2x_ilt *ilt = BP_ILT(bp); | 713 | struct bnx2x_ilt *ilt = BP_ILT(bp); |
710 | 714 | ||
@@ -720,7 +724,7 @@ static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp, | |||
720 | bnx2x_ilt_client_init_op(bp, ilt_cli, initop); | 724 | bnx2x_ilt_client_init_op(bp, ilt_cli, initop); |
721 | } | 725 | } |
722 | 726 | ||
723 | void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) | 727 | static void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop) |
724 | { | 728 | { |
725 | bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_CDU, initop); | 729 | bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_CDU, initop); |
726 | bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_QM, initop); | 730 | bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_QM, initop); |
@@ -752,7 +756,7 @@ static void bnx2x_ilt_init_client_psz(struct bnx2x *bp, int cli_num, | |||
752 | * called during init common stage, ilt clients should be initialized | 756 | * called during init common stage, ilt clients should be initialized |
753 | * prioir to calling this function | 757 | * prioir to calling this function |
754 | */ | 758 | */ |
755 | void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) | 759 | static void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) |
756 | { | 760 | { |
757 | bnx2x_ilt_init_client_psz(bp, ILT_CLIENT_CDU, | 761 | bnx2x_ilt_init_client_psz(bp, ILT_CLIENT_CDU, |
758 | PXP2_REG_RQ_CDU_P_SIZE, initop); | 762 | PXP2_REG_RQ_CDU_P_SIZE, initop); |
@@ -772,8 +776,8 @@ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop) | |||
772 | #define QM_INIT(cid_cnt) (cid_cnt > QM_INIT_MIN_CID_COUNT) | 776 | #define QM_INIT(cid_cnt) (cid_cnt > QM_INIT_MIN_CID_COUNT) |
773 | 777 | ||
774 | /* called during init port stage */ | 778 | /* called during init port stage */ |
775 | void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, | 779 | static void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count, |
776 | u8 initop) | 780 | u8 initop) |
777 | { | 781 | { |
778 | int port = BP_PORT(bp); | 782 | int port = BP_PORT(bp); |
779 | 783 | ||
@@ -814,8 +818,8 @@ static void bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count) | |||
814 | } | 818 | } |
815 | 819 | ||
816 | /* called during init common stage */ | 820 | /* called during init common stage */ |
817 | void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, | 821 | static void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, |
818 | u8 initop) | 822 | u8 initop) |
819 | { | 823 | { |
820 | if (!QM_INIT(qm_cid_count)) | 824 | if (!QM_INIT(qm_cid_count)) |
821 | return; | 825 | return; |
@@ -836,8 +840,8 @@ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count, | |||
836 | ****************************************************************************/ | 840 | ****************************************************************************/ |
837 | 841 | ||
838 | /* called during init func stage */ | 842 | /* called during init func stage */ |
839 | void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, | 843 | static void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2, |
840 | dma_addr_t t2_mapping, int src_cid_count) | 844 | dma_addr_t t2_mapping, int src_cid_count) |
841 | { | 845 | { |
842 | int i; | 846 | int i; |
843 | int port = BP_PORT(bp); | 847 | int port = BP_PORT(bp); |
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c index 3e99bf9c42b9..580919619252 100644 --- a/drivers/net/bnx2x/bnx2x_link.c +++ b/drivers/net/bnx2x/bnx2x_link.c | |||
@@ -181,6 +181,12 @@ | |||
181 | (_bank + (_addr & 0xf)), \ | 181 | (_bank + (_addr & 0xf)), \ |
182 | _val) | 182 | _val) |
183 | 183 | ||
184 | static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, | ||
185 | u8 devad, u16 reg, u16 *ret_val); | ||
186 | |||
187 | static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, | ||
188 | u8 devad, u16 reg, u16 val); | ||
189 | |||
184 | static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits) | 190 | static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits) |
185 | { | 191 | { |
186 | u32 val = REG_RD(bp, reg); | 192 | u32 val = REG_RD(bp, reg); |
@@ -594,7 +600,7 @@ static u8 bnx2x_bmac2_enable(struct link_params *params, | |||
594 | return 0; | 600 | return 0; |
595 | } | 601 | } |
596 | 602 | ||
597 | u8 bnx2x_bmac_enable(struct link_params *params, | 603 | static u8 bnx2x_bmac_enable(struct link_params *params, |
598 | struct link_vars *vars, | 604 | struct link_vars *vars, |
599 | u8 is_lb) | 605 | u8 is_lb) |
600 | { | 606 | { |
@@ -604,7 +610,7 @@ u8 bnx2x_bmac_enable(struct link_params *params, | |||
604 | /* reset and unreset the BigMac */ | 610 | /* reset and unreset the BigMac */ |
605 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, | 611 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, |
606 | (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); | 612 | (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); |
607 | udelay(10); | 613 | msleep(1); |
608 | 614 | ||
609 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, | 615 | REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, |
610 | (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); | 616 | (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); |
@@ -2537,122 +2543,6 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy, | |||
2537 | } | 2543 | } |
2538 | } | 2544 | } |
2539 | 2545 | ||
2540 | /* | ||
2541 | *------------------------------------------------------------------------ | ||
2542 | * bnx2x_override_led_value - | ||
2543 | * | ||
2544 | * Override the led value of the requested led | ||
2545 | * | ||
2546 | *------------------------------------------------------------------------ | ||
2547 | */ | ||
2548 | u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, | ||
2549 | u32 led_idx, u32 value) | ||
2550 | { | ||
2551 | u32 reg_val; | ||
2552 | |||
2553 | /* If port 0 then use EMAC0, else use EMAC1*/ | ||
2554 | u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0; | ||
2555 | |||
2556 | DP(NETIF_MSG_LINK, | ||
2557 | "bnx2x_override_led_value() port %x led_idx %d value %d\n", | ||
2558 | port, led_idx, value); | ||
2559 | |||
2560 | switch (led_idx) { | ||
2561 | case 0: /* 10MB led */ | ||
2562 | /* Read the current value of the LED register in | ||
2563 | the EMAC block */ | ||
2564 | reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); | ||
2565 | /* Set the OVERRIDE bit to 1 */ | ||
2566 | reg_val |= EMAC_LED_OVERRIDE; | ||
2567 | /* If value is 1, set the 10M_OVERRIDE bit, | ||
2568 | otherwise reset it.*/ | ||
2569 | reg_val = (value == 1) ? (reg_val | EMAC_LED_10MB_OVERRIDE) : | ||
2570 | (reg_val & ~EMAC_LED_10MB_OVERRIDE); | ||
2571 | REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); | ||
2572 | break; | ||
2573 | case 1: /*100MB led */ | ||
2574 | /*Read the current value of the LED register in | ||
2575 | the EMAC block */ | ||
2576 | reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); | ||
2577 | /* Set the OVERRIDE bit to 1 */ | ||
2578 | reg_val |= EMAC_LED_OVERRIDE; | ||
2579 | /* If value is 1, set the 100M_OVERRIDE bit, | ||
2580 | otherwise reset it.*/ | ||
2581 | reg_val = (value == 1) ? (reg_val | EMAC_LED_100MB_OVERRIDE) : | ||
2582 | (reg_val & ~EMAC_LED_100MB_OVERRIDE); | ||
2583 | REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); | ||
2584 | break; | ||
2585 | case 2: /* 1000MB led */ | ||
2586 | /* Read the current value of the LED register in the | ||
2587 | EMAC block */ | ||
2588 | reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); | ||
2589 | /* Set the OVERRIDE bit to 1 */ | ||
2590 | reg_val |= EMAC_LED_OVERRIDE; | ||
2591 | /* If value is 1, set the 1000M_OVERRIDE bit, otherwise | ||
2592 | reset it. */ | ||
2593 | reg_val = (value == 1) ? (reg_val | EMAC_LED_1000MB_OVERRIDE) : | ||
2594 | (reg_val & ~EMAC_LED_1000MB_OVERRIDE); | ||
2595 | REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); | ||
2596 | break; | ||
2597 | case 3: /* 2500MB led */ | ||
2598 | /* Read the current value of the LED register in the | ||
2599 | EMAC block*/ | ||
2600 | reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED); | ||
2601 | /* Set the OVERRIDE bit to 1 */ | ||
2602 | reg_val |= EMAC_LED_OVERRIDE; | ||
2603 | /* If value is 1, set the 2500M_OVERRIDE bit, otherwise | ||
2604 | reset it.*/ | ||
2605 | reg_val = (value == 1) ? (reg_val | EMAC_LED_2500MB_OVERRIDE) : | ||
2606 | (reg_val & ~EMAC_LED_2500MB_OVERRIDE); | ||
2607 | REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); | ||
2608 | break; | ||
2609 | case 4: /*10G led */ | ||
2610 | if (port == 0) { | ||
2611 | REG_WR(bp, NIG_REG_LED_10G_P0, | ||
2612 | value); | ||
2613 | } else { | ||
2614 | REG_WR(bp, NIG_REG_LED_10G_P1, | ||
2615 | value); | ||
2616 | } | ||
2617 | break; | ||
2618 | case 5: /* TRAFFIC led */ | ||
2619 | /* Find if the traffic control is via BMAC or EMAC */ | ||
2620 | if (port == 0) | ||
2621 | reg_val = REG_RD(bp, NIG_REG_NIG_EMAC0_EN); | ||
2622 | else | ||
2623 | reg_val = REG_RD(bp, NIG_REG_NIG_EMAC1_EN); | ||
2624 | |||
2625 | /* Override the traffic led in the EMAC:*/ | ||
2626 | if (reg_val == 1) { | ||
2627 | /* Read the current value of the LED register in | ||
2628 | the EMAC block */ | ||
2629 | reg_val = REG_RD(bp, emac_base + | ||
2630 | EMAC_REG_EMAC_LED); | ||
2631 | /* Set the TRAFFIC_OVERRIDE bit to 1 */ | ||
2632 | reg_val |= EMAC_LED_OVERRIDE; | ||
2633 | /* If value is 1, set the TRAFFIC bit, otherwise | ||
2634 | reset it.*/ | ||
2635 | reg_val = (value == 1) ? (reg_val | EMAC_LED_TRAFFIC) : | ||
2636 | (reg_val & ~EMAC_LED_TRAFFIC); | ||
2637 | REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val); | ||
2638 | } else { /* Override the traffic led in the BMAC: */ | ||
2639 | REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 | ||
2640 | + port*4, 1); | ||
2641 | REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + port*4, | ||
2642 | value); | ||
2643 | } | ||
2644 | break; | ||
2645 | default: | ||
2646 | DP(NETIF_MSG_LINK, | ||
2647 | "bnx2x_override_led_value() unknown led index %d " | ||
2648 | "(should be 0-5)\n", led_idx); | ||
2649 | return -EINVAL; | ||
2650 | } | ||
2651 | |||
2652 | return 0; | ||
2653 | } | ||
2654 | |||
2655 | |||
2656 | u8 bnx2x_set_led(struct link_params *params, | 2546 | u8 bnx2x_set_led(struct link_params *params, |
2657 | struct link_vars *vars, u8 mode, u32 speed) | 2547 | struct link_vars *vars, u8 mode, u32 speed) |
2658 | { | 2548 | { |
@@ -3635,13 +3525,19 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, | |||
3635 | DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1); | 3525 | DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1); |
3636 | 3526 | ||
3637 | /* Enable CL37 BAM */ | 3527 | /* Enable CL37 BAM */ |
3638 | bnx2x_cl45_read(bp, phy, | 3528 | if (REG_RD(bp, params->shmem_base + |
3639 | MDIO_AN_DEVAD, | 3529 | offsetof(struct shmem_region, dev_info. |
3640 | MDIO_AN_REG_8073_BAM, &val); | 3530 | port_hw_config[params->port].default_cfg)) & |
3641 | bnx2x_cl45_write(bp, phy, | 3531 | PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED) { |
3642 | MDIO_AN_DEVAD, | ||
3643 | MDIO_AN_REG_8073_BAM, val | 1); | ||
3644 | 3532 | ||
3533 | bnx2x_cl45_read(bp, phy, | ||
3534 | MDIO_AN_DEVAD, | ||
3535 | MDIO_AN_REG_8073_BAM, &val); | ||
3536 | bnx2x_cl45_write(bp, phy, | ||
3537 | MDIO_AN_DEVAD, | ||
3538 | MDIO_AN_REG_8073_BAM, val | 1); | ||
3539 | DP(NETIF_MSG_LINK, "Enable CL37 BAM on KR\n"); | ||
3540 | } | ||
3645 | if (params->loopback_mode == LOOPBACK_EXT) { | 3541 | if (params->loopback_mode == LOOPBACK_EXT) { |
3646 | bnx2x_807x_force_10G(bp, phy); | 3542 | bnx2x_807x_force_10G(bp, phy); |
3647 | DP(NETIF_MSG_LINK, "Forced speed 10G on 807X\n"); | 3543 | DP(NETIF_MSG_LINK, "Forced speed 10G on 807X\n"); |
@@ -4099,9 +3995,9 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
4099 | return -EINVAL; | 3995 | return -EINVAL; |
4100 | } | 3996 | } |
4101 | 3997 | ||
4102 | u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, | 3998 | static u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, |
4103 | struct link_params *params, u16 addr, | 3999 | struct link_params *params, u16 addr, |
4104 | u8 byte_cnt, u8 *o_buf) | 4000 | u8 byte_cnt, u8 *o_buf) |
4105 | { | 4001 | { |
4106 | if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) | 4002 | if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) |
4107 | return bnx2x_8726_read_sfp_module_eeprom(phy, params, addr, | 4003 | return bnx2x_8726_read_sfp_module_eeprom(phy, params, addr, |
@@ -5412,7 +5308,7 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy, | |||
5412 | { | 5308 | { |
5413 | struct bnx2x *bp = params->bp; | 5309 | struct bnx2x *bp = params->bp; |
5414 | u16 autoneg_val, an_1000_val, an_10_100_val; | 5310 | u16 autoneg_val, an_1000_val, an_10_100_val; |
5415 | bnx2x_wait_reset_complete(bp, phy); | 5311 | |
5416 | bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4, | 5312 | bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4, |
5417 | 1 << NIG_LATCH_BC_ENABLE_MI_INT); | 5313 | 1 << NIG_LATCH_BC_ENABLE_MI_INT); |
5418 | 5314 | ||
@@ -5541,6 +5437,7 @@ static u8 bnx2x_8481_config_init(struct bnx2x_phy *phy, | |||
5541 | 5437 | ||
5542 | /* HW reset */ | 5438 | /* HW reset */ |
5543 | bnx2x_ext_phy_hw_reset(bp, params->port); | 5439 | bnx2x_ext_phy_hw_reset(bp, params->port); |
5440 | bnx2x_wait_reset_complete(bp, phy); | ||
5544 | 5441 | ||
5545 | bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); | 5442 | bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); |
5546 | return bnx2x_848xx_cmn_config_init(phy, params, vars); | 5443 | return bnx2x_848xx_cmn_config_init(phy, params, vars); |
@@ -5551,7 +5448,7 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy, | |||
5551 | struct link_vars *vars) | 5448 | struct link_vars *vars) |
5552 | { | 5449 | { |
5553 | struct bnx2x *bp = params->bp; | 5450 | struct bnx2x *bp = params->bp; |
5554 | u8 port = params->port, initialize = 1; | 5451 | u8 port, initialize = 1; |
5555 | u16 val; | 5452 | u16 val; |
5556 | u16 temp; | 5453 | u16 temp; |
5557 | u32 actual_phy_selection; | 5454 | u32 actual_phy_selection; |
@@ -5560,11 +5457,16 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy, | |||
5560 | /* This is just for MDIO_CTL_REG_84823_MEDIA register. */ | 5457 | /* This is just for MDIO_CTL_REG_84823_MEDIA register. */ |
5561 | 5458 | ||
5562 | msleep(1); | 5459 | msleep(1); |
5460 | if (CHIP_IS_E2(bp)) | ||
5461 | port = BP_PATH(bp); | ||
5462 | else | ||
5463 | port = params->port; | ||
5563 | bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, | 5464 | bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, |
5564 | MISC_REGISTERS_GPIO_OUTPUT_HIGH, | 5465 | MISC_REGISTERS_GPIO_OUTPUT_HIGH, |
5565 | port); | 5466 | port); |
5566 | msleep(200); /* 100 is not enough */ | 5467 | bnx2x_wait_reset_complete(bp, phy); |
5567 | 5468 | /* Wait for GPHY to come out of reset */ | |
5469 | msleep(50); | ||
5568 | /* BCM84823 requires that XGXS links up first @ 10G for normal | 5470 | /* BCM84823 requires that XGXS links up first @ 10G for normal |
5569 | behavior */ | 5471 | behavior */ |
5570 | temp = vars->line_speed; | 5472 | temp = vars->line_speed; |
@@ -5735,7 +5637,11 @@ static void bnx2x_848x3_link_reset(struct bnx2x_phy *phy, | |||
5735 | struct link_params *params) | 5637 | struct link_params *params) |
5736 | { | 5638 | { |
5737 | struct bnx2x *bp = params->bp; | 5639 | struct bnx2x *bp = params->bp; |
5738 | u8 port = params->port; | 5640 | u8 port; |
5641 | if (CHIP_IS_E2(bp)) | ||
5642 | port = BP_PATH(bp); | ||
5643 | else | ||
5644 | port = params->port; | ||
5739 | bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, | 5645 | bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, |
5740 | MISC_REGISTERS_GPIO_OUTPUT_LOW, | 5646 | MISC_REGISTERS_GPIO_OUTPUT_LOW, |
5741 | port); | 5647 | port); |
@@ -6819,13 +6725,6 @@ u8 bnx2x_phy_probe(struct link_params *params) | |||
6819 | return 0; | 6725 | return 0; |
6820 | } | 6726 | } |
6821 | 6727 | ||
6822 | u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx) | ||
6823 | { | ||
6824 | if (phy_idx < params->num_phys) | ||
6825 | return params->phy[phy_idx].supported; | ||
6826 | return 0; | ||
6827 | } | ||
6828 | |||
6829 | static void set_phy_vars(struct link_params *params) | 6728 | static void set_phy_vars(struct link_params *params) |
6830 | { | 6729 | { |
6831 | struct bnx2x *bp = params->bp; | 6730 | struct bnx2x *bp = params->bp; |
@@ -7045,7 +6944,7 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, | |||
7045 | u8 reset_ext_phy) | 6944 | u8 reset_ext_phy) |
7046 | { | 6945 | { |
7047 | struct bnx2x *bp = params->bp; | 6946 | struct bnx2x *bp = params->bp; |
7048 | u8 phy_index, port = params->port; | 6947 | u8 phy_index, port = params->port, clear_latch_ind = 0; |
7049 | DP(NETIF_MSG_LINK, "Resetting the link of port %d\n", port); | 6948 | DP(NETIF_MSG_LINK, "Resetting the link of port %d\n", port); |
7050 | /* disable attentions */ | 6949 | /* disable attentions */ |
7051 | vars->link_status = 0; | 6950 | vars->link_status = 0; |
@@ -7083,9 +6982,18 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, | |||
7083 | params->phy[phy_index].link_reset( | 6982 | params->phy[phy_index].link_reset( |
7084 | ¶ms->phy[phy_index], | 6983 | ¶ms->phy[phy_index], |
7085 | params); | 6984 | params); |
6985 | if (params->phy[phy_index].flags & | ||
6986 | FLAGS_REARM_LATCH_SIGNAL) | ||
6987 | clear_latch_ind = 1; | ||
7086 | } | 6988 | } |
7087 | } | 6989 | } |
7088 | 6990 | ||
6991 | if (clear_latch_ind) { | ||
6992 | /* Clear latching indication */ | ||
6993 | bnx2x_rearm_latch_signal(bp, port, 0); | ||
6994 | bnx2x_bits_dis(bp, NIG_REG_LATCH_BC_0 + port*4, | ||
6995 | 1 << NIG_LATCH_BC_ENABLE_MI_INT); | ||
6996 | } | ||
7089 | if (params->phy[INT_PHY].link_reset) | 6997 | if (params->phy[INT_PHY].link_reset) |
7090 | params->phy[INT_PHY].link_reset( | 6998 | params->phy[INT_PHY].link_reset( |
7091 | ¶ms->phy[INT_PHY], params); | 6999 | ¶ms->phy[INT_PHY], params); |
@@ -7116,6 +7024,7 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, | |||
7116 | s8 port; | 7024 | s8 port; |
7117 | s8 port_of_path = 0; | 7025 | s8 port_of_path = 0; |
7118 | 7026 | ||
7027 | bnx2x_ext_phy_hw_reset(bp, 0); | ||
7119 | /* PART1 - Reset both phys */ | 7028 | /* PART1 - Reset both phys */ |
7120 | for (port = PORT_MAX - 1; port >= PORT_0; port--) { | 7029 | for (port = PORT_MAX - 1; port >= PORT_0; port--) { |
7121 | u32 shmem_base, shmem2_base; | 7030 | u32 shmem_base, shmem2_base; |
@@ -7138,7 +7047,8 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, | |||
7138 | return -EINVAL; | 7047 | return -EINVAL; |
7139 | } | 7048 | } |
7140 | /* disable attentions */ | 7049 | /* disable attentions */ |
7141 | bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, | 7050 | bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + |
7051 | port_of_path*4, | ||
7142 | (NIG_MASK_XGXS0_LINK_STATUS | | 7052 | (NIG_MASK_XGXS0_LINK_STATUS | |
7143 | NIG_MASK_XGXS0_LINK10G | | 7053 | NIG_MASK_XGXS0_LINK10G | |
7144 | NIG_MASK_SERDES0_LINK_STATUS | | 7054 | NIG_MASK_SERDES0_LINK_STATUS | |
@@ -7249,7 +7159,7 @@ static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp, | |||
7249 | (1<<(MISC_REGISTERS_GPIO_3 + MISC_REGISTERS_GPIO_PORT_SHIFT))); | 7159 | (1<<(MISC_REGISTERS_GPIO_3 + MISC_REGISTERS_GPIO_PORT_SHIFT))); |
7250 | REG_WR(bp, MISC_REG_GPIO_EVENT_EN, val); | 7160 | REG_WR(bp, MISC_REG_GPIO_EVENT_EN, val); |
7251 | 7161 | ||
7252 | bnx2x_ext_phy_hw_reset(bp, 1); | 7162 | bnx2x_ext_phy_hw_reset(bp, 0); |
7253 | msleep(5); | 7163 | msleep(5); |
7254 | for (port = 0; port < PORT_MAX; port++) { | 7164 | for (port = 0; port < PORT_MAX; port++) { |
7255 | u32 shmem_base, shmem2_base; | 7165 | u32 shmem_base, shmem2_base; |
diff --git a/drivers/net/bnx2x/bnx2x_link.h b/drivers/net/bnx2x/bnx2x_link.h index 58a4c7199276..171abf8097ee 100644 --- a/drivers/net/bnx2x/bnx2x_link.h +++ b/drivers/net/bnx2x/bnx2x_link.h | |||
@@ -279,12 +279,6 @@ u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr, | |||
279 | 279 | ||
280 | u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr, | 280 | u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr, |
281 | u8 devad, u16 reg, u16 val); | 281 | u8 devad, u16 reg, u16 val); |
282 | |||
283 | u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, | ||
284 | u8 devad, u16 reg, u16 *ret_val); | ||
285 | |||
286 | u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, | ||
287 | u8 devad, u16 reg, u16 val); | ||
288 | /* Reads the link_status from the shmem, | 282 | /* Reads the link_status from the shmem, |
289 | and update the link vars accordingly */ | 283 | and update the link vars accordingly */ |
290 | void bnx2x_link_status_update(struct link_params *input, | 284 | void bnx2x_link_status_update(struct link_params *input, |
@@ -304,8 +298,6 @@ u8 bnx2x_set_led(struct link_params *params, struct link_vars *vars, | |||
304 | #define LED_MODE_OPER 2 | 298 | #define LED_MODE_OPER 2 |
305 | #define LED_MODE_FRONT_PANEL_OFF 3 | 299 | #define LED_MODE_FRONT_PANEL_OFF 3 |
306 | 300 | ||
307 | u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value); | ||
308 | |||
309 | /* bnx2x_handle_module_detect_int should be called upon module detection | 301 | /* bnx2x_handle_module_detect_int should be called upon module detection |
310 | interrupt */ | 302 | interrupt */ |
311 | void bnx2x_handle_module_detect_int(struct link_params *params); | 303 | void bnx2x_handle_module_detect_int(struct link_params *params); |
@@ -325,19 +317,12 @@ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port); | |||
325 | /* Reset the external of SFX7101 */ | 317 | /* Reset the external of SFX7101 */ |
326 | void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy); | 318 | void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy); |
327 | 319 | ||
328 | u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, | ||
329 | struct link_params *params, u16 addr, | ||
330 | u8 byte_cnt, u8 *o_buf); | ||
331 | |||
332 | void bnx2x_hw_reset_phy(struct link_params *params); | 320 | void bnx2x_hw_reset_phy(struct link_params *params); |
333 | 321 | ||
334 | /* Checks if HW lock is required for this phy/board type */ | 322 | /* Checks if HW lock is required for this phy/board type */ |
335 | u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base, | 323 | u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base, |
336 | u32 shmem2_base); | 324 | u32 shmem2_base); |
337 | 325 | ||
338 | /* Returns the aggregative supported attributes of the phys on board */ | ||
339 | u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx); | ||
340 | |||
341 | /* Check swap bit and adjust PHY order */ | 326 | /* Check swap bit and adjust PHY order */ |
342 | u32 bnx2x_phy_selection(struct link_params *params); | 327 | u32 bnx2x_phy_selection(struct link_params *params); |
343 | 328 | ||
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index ff99a2fc0426..9709b8569666 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -403,7 +403,7 @@ static inline void storm_memset_hc_disable(struct bnx2x *bp, u8 port, | |||
403 | /* used only at init | 403 | /* used only at init |
404 | * locking is done by mcp | 404 | * locking is done by mcp |
405 | */ | 405 | */ |
406 | void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val) | 406 | static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val) |
407 | { | 407 | { |
408 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, addr); | 408 | pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, addr); |
409 | pci_write_config_dword(bp->pdev, PCICFG_GRC_DATA, val); | 409 | pci_write_config_dword(bp->pdev, PCICFG_GRC_DATA, val); |
@@ -429,7 +429,8 @@ static u32 bnx2x_reg_rd_ind(struct bnx2x *bp, u32 addr) | |||
429 | #define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" | 429 | #define DMAE_DP_DST_PCI "pci dst_addr [%x:%08x]" |
430 | #define DMAE_DP_DST_NONE "dst_addr [none]" | 430 | #define DMAE_DP_DST_NONE "dst_addr [none]" |
431 | 431 | ||
432 | void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, int msglvl) | 432 | static void bnx2x_dp_dmae(struct bnx2x *bp, struct dmae_command *dmae, |
433 | int msglvl) | ||
433 | { | 434 | { |
434 | u32 src_type = dmae->opcode & DMAE_COMMAND_SRC; | 435 | u32 src_type = dmae->opcode & DMAE_COMMAND_SRC; |
435 | 436 | ||
@@ -551,8 +552,9 @@ u32 bnx2x_dmae_opcode(struct bnx2x *bp, u8 src_type, u8 dst_type, | |||
551 | return opcode; | 552 | return opcode; |
552 | } | 553 | } |
553 | 554 | ||
554 | void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, | 555 | static void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, |
555 | u8 src_type, u8 dst_type) | 556 | struct dmae_command *dmae, |
557 | u8 src_type, u8 dst_type) | ||
556 | { | 558 | { |
557 | memset(dmae, 0, sizeof(struct dmae_command)); | 559 | memset(dmae, 0, sizeof(struct dmae_command)); |
558 | 560 | ||
@@ -567,7 +569,8 @@ void bnx2x_prep_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae, | |||
567 | } | 569 | } |
568 | 570 | ||
569 | /* issue a dmae command over the init-channel and wailt for completion */ | 571 | /* issue a dmae command over the init-channel and wailt for completion */ |
570 | int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, struct dmae_command *dmae) | 572 | static int bnx2x_issue_dmae_with_comp(struct bnx2x *bp, |
573 | struct dmae_command *dmae) | ||
571 | { | 574 | { |
572 | u32 *wb_comp = bnx2x_sp(bp, wb_comp); | 575 | u32 *wb_comp = bnx2x_sp(bp, wb_comp); |
573 | int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 40; | 576 | int cnt = CHIP_REV_IS_SLOW(bp) ? (400000) : 40; |
@@ -674,8 +677,8 @@ void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32) | |||
674 | bnx2x_issue_dmae_with_comp(bp, &dmae); | 677 | bnx2x_issue_dmae_with_comp(bp, &dmae); |
675 | } | 678 | } |
676 | 679 | ||
677 | void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, | 680 | static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr, |
678 | u32 addr, u32 len) | 681 | u32 addr, u32 len) |
679 | { | 682 | { |
680 | int dmae_wr_max = DMAE_LEN32_WR_MAX(bp); | 683 | int dmae_wr_max = DMAE_LEN32_WR_MAX(bp); |
681 | int offset = 0; | 684 | int offset = 0; |
@@ -1267,7 +1270,7 @@ static void bnx2x_igu_int_disable(struct bnx2x *bp) | |||
1267 | BNX2X_ERR("BUG! proper val not read from IGU!\n"); | 1270 | BNX2X_ERR("BUG! proper val not read from IGU!\n"); |
1268 | } | 1271 | } |
1269 | 1272 | ||
1270 | void bnx2x_int_disable(struct bnx2x *bp) | 1273 | static void bnx2x_int_disable(struct bnx2x *bp) |
1271 | { | 1274 | { |
1272 | if (bp->common.int_block == INT_BLOCK_HC) | 1275 | if (bp->common.int_block == INT_BLOCK_HC) |
1273 | bnx2x_hc_int_disable(bp); | 1276 | bnx2x_hc_int_disable(bp); |
@@ -2236,7 +2239,7 @@ u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param) | |||
2236 | } | 2239 | } |
2237 | 2240 | ||
2238 | /* must be called under rtnl_lock */ | 2241 | /* must be called under rtnl_lock */ |
2239 | void bnx2x_rxq_set_mac_filters(struct bnx2x *bp, u16 cl_id, u32 filters) | 2242 | static void bnx2x_rxq_set_mac_filters(struct bnx2x *bp, u16 cl_id, u32 filters) |
2240 | { | 2243 | { |
2241 | u32 mask = (1 << cl_id); | 2244 | u32 mask = (1 << cl_id); |
2242 | 2245 | ||
@@ -2303,7 +2306,7 @@ void bnx2x_rxq_set_mac_filters(struct bnx2x *bp, u16 cl_id, u32 filters) | |||
2303 | bp->mac_filters.unmatched_unicast & ~mask; | 2306 | bp->mac_filters.unmatched_unicast & ~mask; |
2304 | } | 2307 | } |
2305 | 2308 | ||
2306 | void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) | 2309 | static void bnx2x_func_init(struct bnx2x *bp, struct bnx2x_func_init_params *p) |
2307 | { | 2310 | { |
2308 | struct tstorm_eth_function_common_config tcfg = {0}; | 2311 | struct tstorm_eth_function_common_config tcfg = {0}; |
2309 | u16 rss_flgs; | 2312 | u16 rss_flgs; |
@@ -2460,7 +2463,7 @@ static void bnx2x_pf_tx_cl_prep(struct bnx2x *bp, | |||
2460 | txq_init->hc_rate = bp->tx_ticks ? (1000000 / bp->tx_ticks) : 0; | 2463 | txq_init->hc_rate = bp->tx_ticks ? (1000000 / bp->tx_ticks) : 0; |
2461 | } | 2464 | } |
2462 | 2465 | ||
2463 | void bnx2x_pf_init(struct bnx2x *bp) | 2466 | static void bnx2x_pf_init(struct bnx2x *bp) |
2464 | { | 2467 | { |
2465 | struct bnx2x_func_init_params func_init = {0}; | 2468 | struct bnx2x_func_init_params func_init = {0}; |
2466 | struct bnx2x_rss_params rss = {0}; | 2469 | struct bnx2x_rss_params rss = {0}; |
@@ -3928,7 +3931,7 @@ void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, | |||
3928 | hc_sm->time_to_expire = 0xFFFFFFFF; | 3931 | hc_sm->time_to_expire = 0xFFFFFFFF; |
3929 | } | 3932 | } |
3930 | 3933 | ||
3931 | void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, | 3934 | static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, |
3932 | u8 vf_valid, int fw_sb_id, int igu_sb_id) | 3935 | u8 vf_valid, int fw_sb_id, int igu_sb_id) |
3933 | { | 3936 | { |
3934 | int igu_seg_id; | 3937 | int igu_seg_id; |
@@ -6021,6 +6024,9 @@ alloc_mem_err: | |||
6021 | /* | 6024 | /* |
6022 | * Init service functions | 6025 | * Init service functions |
6023 | */ | 6026 | */ |
6027 | static int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, | ||
6028 | int *state_p, int flags); | ||
6029 | |||
6024 | int bnx2x_func_start(struct bnx2x *bp) | 6030 | int bnx2x_func_start(struct bnx2x *bp) |
6025 | { | 6031 | { |
6026 | bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_START, 0, 0, 0, 1); | 6032 | bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_START, 0, 0, 0, 1); |
@@ -6030,7 +6036,7 @@ int bnx2x_func_start(struct bnx2x *bp) | |||
6030 | WAIT_RAMROD_COMMON); | 6036 | WAIT_RAMROD_COMMON); |
6031 | } | 6037 | } |
6032 | 6038 | ||
6033 | int bnx2x_func_stop(struct bnx2x *bp) | 6039 | static int bnx2x_func_stop(struct bnx2x *bp) |
6034 | { | 6040 | { |
6035 | bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_STOP, 0, 0, 0, 1); | 6041 | bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_FUNCTION_STOP, 0, 0, 0, 1); |
6036 | 6042 | ||
@@ -6103,8 +6109,8 @@ static void bnx2x_set_mac_addr_gen(struct bnx2x *bp, int set, u8 *mac, | |||
6103 | bnx2x_wait_ramrod(bp, 0, 0, &bp->set_mac_pending, ramrod_flags); | 6109 | bnx2x_wait_ramrod(bp, 0, 0, &bp->set_mac_pending, ramrod_flags); |
6104 | } | 6110 | } |
6105 | 6111 | ||
6106 | int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, | 6112 | static int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, |
6107 | int *state_p, int flags) | 6113 | int *state_p, int flags) |
6108 | { | 6114 | { |
6109 | /* can take a while if any port is running */ | 6115 | /* can take a while if any port is running */ |
6110 | int cnt = 5000; | 6116 | int cnt = 5000; |
@@ -6154,7 +6160,7 @@ int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx, | |||
6154 | return -EBUSY; | 6160 | return -EBUSY; |
6155 | } | 6161 | } |
6156 | 6162 | ||
6157 | u8 bnx2x_e1h_cam_offset(struct bnx2x *bp, u8 rel_offset) | 6163 | static u8 bnx2x_e1h_cam_offset(struct bnx2x *bp, u8 rel_offset) |
6158 | { | 6164 | { |
6159 | if (CHIP_IS_E1H(bp)) | 6165 | if (CHIP_IS_E1H(bp)) |
6160 | return E1H_FUNC_MAX * rel_offset + BP_FUNC(bp); | 6166 | return E1H_FUNC_MAX * rel_offset + BP_FUNC(bp); |
@@ -6273,7 +6279,7 @@ static void bnx2x_invlidate_e1_mc_list(struct bnx2x *bp) | |||
6273 | * | 6279 | * |
6274 | * @return 0 if cussess, -ENODEV if ramrod doesn't return. | 6280 | * @return 0 if cussess, -ENODEV if ramrod doesn't return. |
6275 | */ | 6281 | */ |
6276 | int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set) | 6282 | static int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set) |
6277 | { | 6283 | { |
6278 | u8 cam_offset = (CHIP_IS_E1(bp) ? ((BP_PORT(bp) ? 32 : 0) + 2) : | 6284 | u8 cam_offset = (CHIP_IS_E1(bp) ? ((BP_PORT(bp) ? 32 : 0) + 2) : |
6279 | bnx2x_e1h_cam_offset(bp, CAM_ISCSI_ETH_LINE)); | 6285 | bnx2x_e1h_cam_offset(bp, CAM_ISCSI_ETH_LINE)); |
@@ -6383,11 +6389,11 @@ static inline void bnx2x_set_ctx_validation(struct eth_context *cxt, u32 cid) | |||
6383 | ETH_CONNECTION_TYPE); | 6389 | ETH_CONNECTION_TYPE); |
6384 | } | 6390 | } |
6385 | 6391 | ||
6386 | int bnx2x_setup_fw_client(struct bnx2x *bp, | 6392 | static int bnx2x_setup_fw_client(struct bnx2x *bp, |
6387 | struct bnx2x_client_init_params *params, | 6393 | struct bnx2x_client_init_params *params, |
6388 | u8 activate, | 6394 | u8 activate, |
6389 | struct client_init_ramrod_data *data, | 6395 | struct client_init_ramrod_data *data, |
6390 | dma_addr_t data_mapping) | 6396 | dma_addr_t data_mapping) |
6391 | { | 6397 | { |
6392 | u16 hc_usec; | 6398 | u16 hc_usec; |
6393 | int ramrod = RAMROD_CMD_ID_ETH_CLIENT_SETUP; | 6399 | int ramrod = RAMROD_CMD_ID_ETH_CLIENT_SETUP; |
@@ -6633,7 +6639,8 @@ int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp, | |||
6633 | return rc; | 6639 | return rc; |
6634 | } | 6640 | } |
6635 | 6641 | ||
6636 | int bnx2x_stop_fw_client(struct bnx2x *bp, struct bnx2x_client_ramrod_params *p) | 6642 | static int bnx2x_stop_fw_client(struct bnx2x *bp, |
6643 | struct bnx2x_client_ramrod_params *p) | ||
6637 | { | 6644 | { |
6638 | int rc; | 6645 | int rc; |
6639 | 6646 | ||
@@ -7440,7 +7447,7 @@ reset_task_exit: | |||
7440 | * Init service functions | 7447 | * Init service functions |
7441 | */ | 7448 | */ |
7442 | 7449 | ||
7443 | u32 bnx2x_get_pretend_reg(struct bnx2x *bp) | 7450 | static u32 bnx2x_get_pretend_reg(struct bnx2x *bp) |
7444 | { | 7451 | { |
7445 | u32 base = PXP2_REG_PGL_PRETEND_FUNC_F0; | 7452 | u32 base = PXP2_REG_PGL_PRETEND_FUNC_F0; |
7446 | u32 stride = PXP2_REG_PGL_PRETEND_FUNC_F1 - base; | 7453 | u32 stride = PXP2_REG_PGL_PRETEND_FUNC_F1 - base; |
@@ -9057,7 +9064,7 @@ static int __devinit bnx2x_init_one(struct pci_dev *pdev, | |||
9057 | default: | 9064 | default: |
9058 | pr_err("Unknown board_type (%ld), aborting\n", | 9065 | pr_err("Unknown board_type (%ld), aborting\n", |
9059 | ent->driver_data); | 9066 | ent->driver_data); |
9060 | return ENODEV; | 9067 | return -ENODEV; |
9061 | } | 9068 | } |
9062 | 9069 | ||
9063 | cid_count += CNIC_CONTEXT_USE; | 9070 | cid_count += CNIC_CONTEXT_USE; |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index beb3b7cecd52..71a169740d05 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -493,9 +493,9 @@ static void bond_vlan_rx_register(struct net_device *bond_dev, | |||
493 | struct slave *slave; | 493 | struct slave *slave; |
494 | int i; | 494 | int i; |
495 | 495 | ||
496 | write_lock(&bond->lock); | 496 | write_lock_bh(&bond->lock); |
497 | bond->vlgrp = grp; | 497 | bond->vlgrp = grp; |
498 | write_unlock(&bond->lock); | 498 | write_unlock_bh(&bond->lock); |
499 | 499 | ||
500 | bond_for_each_slave(bond, slave, i) { | 500 | bond_for_each_slave(bond, slave, i) { |
501 | struct net_device *slave_dev = slave->dev; | 501 | struct net_device *slave_dev = slave->dev; |
@@ -878,8 +878,10 @@ static void __bond_resend_igmp_join_requests(struct net_device *dev) | |||
878 | rcu_read_lock(); | 878 | rcu_read_lock(); |
879 | in_dev = __in_dev_get_rcu(dev); | 879 | in_dev = __in_dev_get_rcu(dev); |
880 | if (in_dev) { | 880 | if (in_dev) { |
881 | read_lock(&in_dev->mc_list_lock); | ||
881 | for (im = in_dev->mc_list; im; im = im->next) | 882 | for (im = in_dev->mc_list; im; im = im->next) |
882 | ip_mc_rejoin_group(im); | 883 | ip_mc_rejoin_group(im); |
884 | read_unlock(&in_dev->mc_list_lock); | ||
883 | } | 885 | } |
884 | 886 | ||
885 | rcu_read_unlock(); | 887 | rcu_read_unlock(); |
diff --git a/drivers/net/caif/Kconfig b/drivers/net/caif/Kconfig index 75bfc3a9d95f..09ed3f42d673 100644 --- a/drivers/net/caif/Kconfig +++ b/drivers/net/caif/Kconfig | |||
@@ -31,3 +31,10 @@ config CAIF_SPI_SYNC | |||
31 | Putting the next command and length in the start of the frame can | 31 | Putting the next command and length in the start of the frame can |
32 | help to synchronize to the next transfer in case of over or under-runs. | 32 | help to synchronize to the next transfer in case of over or under-runs. |
33 | This option also needs to be enabled on the modem. | 33 | This option also needs to be enabled on the modem. |
34 | |||
35 | config CAIF_SHM | ||
36 | tristate "CAIF shared memory protocol driver" | ||
37 | depends on CAIF && U5500_MBOX | ||
38 | default n | ||
39 | ---help--- | ||
40 | The CAIF shared memory protocol driver for the STE UX5500 platform. | ||
diff --git a/drivers/net/caif/Makefile b/drivers/net/caif/Makefile index 3a11d619452b..b38d987da67d 100644 --- a/drivers/net/caif/Makefile +++ b/drivers/net/caif/Makefile | |||
@@ -8,3 +8,7 @@ obj-$(CONFIG_CAIF_TTY) += caif_serial.o | |||
8 | # SPI slave physical interfaces module | 8 | # SPI slave physical interfaces module |
9 | cfspi_slave-objs := caif_spi.o caif_spi_slave.o | 9 | cfspi_slave-objs := caif_spi.o caif_spi_slave.o |
10 | obj-$(CONFIG_CAIF_SPI_SLAVE) += cfspi_slave.o | 10 | obj-$(CONFIG_CAIF_SPI_SLAVE) += cfspi_slave.o |
11 | |||
12 | # Shared memory | ||
13 | caif_shm-objs := caif_shmcore.o caif_shm_u5500.o | ||
14 | obj-$(CONFIG_CAIF_SHM) += caif_shm.o | ||
diff --git a/drivers/net/caif/caif_shm_u5500.c b/drivers/net/caif/caif_shm_u5500.c new file mode 100644 index 000000000000..1cd90da86f13 --- /dev/null +++ b/drivers/net/caif/caif_shm_u5500.c | |||
@@ -0,0 +1,129 @@ | |||
1 | /* | ||
2 | * Copyright (C) ST-Ericsson AB 2010 | ||
3 | * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com | ||
4 | * Author: Amarnath Revanna / amarnath.bangalore.revanna@stericsson.com | ||
5 | * License terms: GNU General Public License (GPL) version 2 | ||
6 | */ | ||
7 | |||
8 | #define pr_fmt(fmt) KBUILD_MODNAME ":" __func__ "():" fmt | ||
9 | |||
10 | #include <linux/version.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/netdevice.h> | ||
14 | #include <mach/mbox.h> | ||
15 | #include <net/caif/caif_shm.h> | ||
16 | |||
17 | MODULE_LICENSE("GPL"); | ||
18 | MODULE_DESCRIPTION("CAIF Shared Memory protocol driver"); | ||
19 | |||
20 | #define MAX_SHM_INSTANCES 1 | ||
21 | |||
22 | enum { | ||
23 | MBX_ACC0, | ||
24 | MBX_ACC1, | ||
25 | MBX_DSP | ||
26 | }; | ||
27 | |||
28 | static struct shmdev_layer shmdev_lyr[MAX_SHM_INSTANCES]; | ||
29 | |||
30 | static unsigned int shm_start; | ||
31 | static unsigned int shm_size; | ||
32 | |||
33 | module_param(shm_size, uint , 0440); | ||
34 | MODULE_PARM_DESC(shm_total_size, "Start of SHM shared memory"); | ||
35 | |||
36 | module_param(shm_start, uint , 0440); | ||
37 | MODULE_PARM_DESC(shm_total_start, "Total Size of SHM shared memory"); | ||
38 | |||
39 | static int shmdev_send_msg(u32 dev_id, u32 mbx_msg) | ||
40 | { | ||
41 | /* Always block until msg is written successfully */ | ||
42 | mbox_send(shmdev_lyr[dev_id].hmbx, mbx_msg, true); | ||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | static int shmdev_mbx_setup(void *pshmdrv_cb, struct shmdev_layer *pshm_dev, | ||
47 | void *pshm_drv) | ||
48 | { | ||
49 | /* | ||
50 | * For UX5500, we have only 1 SHM instance which uses MBX0 | ||
51 | * for communication with the peer modem | ||
52 | */ | ||
53 | pshm_dev->hmbx = mbox_setup(MBX_ACC0, pshmdrv_cb, pshm_drv); | ||
54 | |||
55 | if (!pshm_dev->hmbx) | ||
56 | return -ENODEV; | ||
57 | else | ||
58 | return 0; | ||
59 | } | ||
60 | |||
61 | static int __init caif_shmdev_init(void) | ||
62 | { | ||
63 | int i, result; | ||
64 | |||
65 | /* Loop is currently overkill, there is only one instance */ | ||
66 | for (i = 0; i < MAX_SHM_INSTANCES; i++) { | ||
67 | |||
68 | shmdev_lyr[i].shm_base_addr = shm_start; | ||
69 | shmdev_lyr[i].shm_total_sz = shm_size; | ||
70 | |||
71 | if (((char *)shmdev_lyr[i].shm_base_addr == NULL) | ||
72 | || (shmdev_lyr[i].shm_total_sz <= 0)) { | ||
73 | pr_warn("ERROR," | ||
74 | "Shared memory Address and/or Size incorrect" | ||
75 | ", Bailing out ...\n"); | ||
76 | result = -EINVAL; | ||
77 | goto clean; | ||
78 | } | ||
79 | |||
80 | pr_info("SHM AREA (instance %d) STARTS" | ||
81 | " AT %p\n", i, (char *)shmdev_lyr[i].shm_base_addr); | ||
82 | |||
83 | shmdev_lyr[i].shm_id = i; | ||
84 | shmdev_lyr[i].pshmdev_mbxsend = shmdev_send_msg; | ||
85 | shmdev_lyr[i].pshmdev_mbxsetup = shmdev_mbx_setup; | ||
86 | |||
87 | /* | ||
88 | * Finally, CAIF core module is called with details in place: | ||
89 | * 1. SHM base address | ||
90 | * 2. SHM size | ||
91 | * 3. MBX handle | ||
92 | */ | ||
93 | result = caif_shmcore_probe(&shmdev_lyr[i]); | ||
94 | if (result) { | ||
95 | pr_warn("ERROR[%d]," | ||
96 | "Could not probe SHM core (instance %d)" | ||
97 | " Bailing out ...\n", result, i); | ||
98 | goto clean; | ||
99 | } | ||
100 | } | ||
101 | |||
102 | return 0; | ||
103 | |||
104 | clean: | ||
105 | /* | ||
106 | * For now, we assume that even if one instance of SHM fails, we bail | ||
107 | * out of the driver support completely. For this, we need to release | ||
108 | * any memory allocated and unregister any instance of SHM net device. | ||
109 | */ | ||
110 | for (i = 0; i < MAX_SHM_INSTANCES; i++) { | ||
111 | if (shmdev_lyr[i].pshm_netdev) | ||
112 | unregister_netdev(shmdev_lyr[i].pshm_netdev); | ||
113 | } | ||
114 | return result; | ||
115 | } | ||
116 | |||
117 | static void __exit caif_shmdev_exit(void) | ||
118 | { | ||
119 | int i; | ||
120 | |||
121 | for (i = 0; i < MAX_SHM_INSTANCES; i++) { | ||
122 | caif_shmcore_remove(shmdev_lyr[i].pshm_netdev); | ||
123 | kfree((void *)shmdev_lyr[i].shm_base_addr); | ||
124 | } | ||
125 | |||
126 | } | ||
127 | |||
128 | module_init(caif_shmdev_init); | ||
129 | module_exit(caif_shmdev_exit); | ||
diff --git a/drivers/net/caif/caif_shmcore.c b/drivers/net/caif/caif_shmcore.c new file mode 100644 index 000000000000..19f9c0656667 --- /dev/null +++ b/drivers/net/caif/caif_shmcore.c | |||
@@ -0,0 +1,744 @@ | |||
1 | /* | ||
2 | * Copyright (C) ST-Ericsson AB 2010 | ||
3 | * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com | ||
4 | * Authors: Amarnath Revanna / amarnath.bangalore.revanna@stericsson.com, | ||
5 | * Daniel Martensson / daniel.martensson@stericsson.com | ||
6 | * License terms: GNU General Public License (GPL) version 2 | ||
7 | */ | ||
8 | |||
9 | #define pr_fmt(fmt) KBUILD_MODNAME ":" __func__ "():" fmt | ||
10 | |||
11 | #include <linux/spinlock.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/list.h> | ||
14 | #include <linux/netdevice.h> | ||
15 | #include <linux/if_arp.h> | ||
16 | |||
17 | #include <net/caif/caif_device.h> | ||
18 | #include <net/caif/caif_shm.h> | ||
19 | |||
20 | #define NR_TX_BUF 6 | ||
21 | #define NR_RX_BUF 6 | ||
22 | #define TX_BUF_SZ 0x2000 | ||
23 | #define RX_BUF_SZ 0x2000 | ||
24 | |||
25 | #define CAIF_NEEDED_HEADROOM 32 | ||
26 | |||
27 | #define CAIF_FLOW_ON 1 | ||
28 | #define CAIF_FLOW_OFF 0 | ||
29 | |||
30 | #define LOW_WATERMARK 3 | ||
31 | #define HIGH_WATERMARK 4 | ||
32 | |||
33 | /* Maximum number of CAIF buffers per shared memory buffer. */ | ||
34 | #define SHM_MAX_FRMS_PER_BUF 10 | ||
35 | |||
36 | /* | ||
37 | * Size in bytes of the descriptor area | ||
38 | * (With end of descriptor signalling) | ||
39 | */ | ||
40 | #define SHM_CAIF_DESC_SIZE ((SHM_MAX_FRMS_PER_BUF + 1) * \ | ||
41 | sizeof(struct shm_pck_desc)) | ||
42 | |||
43 | /* | ||
44 | * Offset to the first CAIF frame within a shared memory buffer. | ||
45 | * Aligned on 32 bytes. | ||
46 | */ | ||
47 | #define SHM_CAIF_FRM_OFS (SHM_CAIF_DESC_SIZE + (SHM_CAIF_DESC_SIZE % 32)) | ||
48 | |||
49 | /* Number of bytes for CAIF shared memory header. */ | ||
50 | #define SHM_HDR_LEN 1 | ||
51 | |||
52 | /* Number of padding bytes for the complete CAIF frame. */ | ||
53 | #define SHM_FRM_PAD_LEN 4 | ||
54 | |||
55 | #define CAIF_MAX_MTU 4096 | ||
56 | |||
57 | #define SHM_SET_FULL(x) (((x+1) & 0x0F) << 0) | ||
58 | #define SHM_GET_FULL(x) (((x >> 0) & 0x0F) - 1) | ||
59 | |||
60 | #define SHM_SET_EMPTY(x) (((x+1) & 0x0F) << 4) | ||
61 | #define SHM_GET_EMPTY(x) (((x >> 4) & 0x0F) - 1) | ||
62 | |||
63 | #define SHM_FULL_MASK (0x0F << 0) | ||
64 | #define SHM_EMPTY_MASK (0x0F << 4) | ||
65 | |||
66 | struct shm_pck_desc { | ||
67 | /* | ||
68 | * Offset from start of shared memory area to start of | ||
69 | * shared memory CAIF frame. | ||
70 | */ | ||
71 | u32 frm_ofs; | ||
72 | u32 frm_len; | ||
73 | }; | ||
74 | |||
75 | struct buf_list { | ||
76 | unsigned char *desc_vptr; | ||
77 | u32 phy_addr; | ||
78 | u32 index; | ||
79 | u32 len; | ||
80 | u32 frames; | ||
81 | u32 frm_ofs; | ||
82 | struct list_head list; | ||
83 | }; | ||
84 | |||
85 | struct shm_caif_frm { | ||
86 | /* Number of bytes of padding before the CAIF frame. */ | ||
87 | u8 hdr_ofs; | ||
88 | }; | ||
89 | |||
90 | struct shmdrv_layer { | ||
91 | /* caif_dev_common must always be first in the structure*/ | ||
92 | struct caif_dev_common cfdev; | ||
93 | |||
94 | u32 shm_tx_addr; | ||
95 | u32 shm_rx_addr; | ||
96 | u32 shm_base_addr; | ||
97 | u32 tx_empty_available; | ||
98 | spinlock_t lock; | ||
99 | |||
100 | struct list_head tx_empty_list; | ||
101 | struct list_head tx_pend_list; | ||
102 | struct list_head tx_full_list; | ||
103 | struct list_head rx_empty_list; | ||
104 | struct list_head rx_pend_list; | ||
105 | struct list_head rx_full_list; | ||
106 | |||
107 | struct workqueue_struct *pshm_tx_workqueue; | ||
108 | struct workqueue_struct *pshm_rx_workqueue; | ||
109 | |||
110 | struct work_struct shm_tx_work; | ||
111 | struct work_struct shm_rx_work; | ||
112 | |||
113 | struct sk_buff_head sk_qhead; | ||
114 | struct shmdev_layer *pshm_dev; | ||
115 | }; | ||
116 | |||
117 | static int shm_netdev_open(struct net_device *shm_netdev) | ||
118 | { | ||
119 | netif_wake_queue(shm_netdev); | ||
120 | return 0; | ||
121 | } | ||
122 | |||
123 | static int shm_netdev_close(struct net_device *shm_netdev) | ||
124 | { | ||
125 | netif_stop_queue(shm_netdev); | ||
126 | return 0; | ||
127 | } | ||
128 | |||
129 | int caif_shmdrv_rx_cb(u32 mbx_msg, void *priv) | ||
130 | { | ||
131 | struct buf_list *pbuf; | ||
132 | struct shmdrv_layer *pshm_drv; | ||
133 | struct list_head *pos; | ||
134 | u32 avail_emptybuff = 0; | ||
135 | unsigned long flags = 0; | ||
136 | |||
137 | pshm_drv = (struct shmdrv_layer *)priv; | ||
138 | |||
139 | /* Check for received buffers. */ | ||
140 | if (mbx_msg & SHM_FULL_MASK) { | ||
141 | int idx; | ||
142 | |||
143 | spin_lock_irqsave(&pshm_drv->lock, flags); | ||
144 | |||
145 | /* Check whether we have any outstanding buffers. */ | ||
146 | if (list_empty(&pshm_drv->rx_empty_list)) { | ||
147 | |||
148 | /* Release spin lock. */ | ||
149 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
150 | |||
151 | /* We print even in IRQ context... */ | ||
152 | pr_warn("No empty Rx buffers to fill: " | ||
153 | "mbx_msg:%x\n", mbx_msg); | ||
154 | |||
155 | /* Bail out. */ | ||
156 | goto err_sync; | ||
157 | } | ||
158 | |||
159 | pbuf = | ||
160 | list_entry(pshm_drv->rx_empty_list.next, | ||
161 | struct buf_list, list); | ||
162 | idx = pbuf->index; | ||
163 | |||
164 | /* Check buffer synchronization. */ | ||
165 | if (idx != SHM_GET_FULL(mbx_msg)) { | ||
166 | |||
167 | /* We print even in IRQ context... */ | ||
168 | pr_warn( | ||
169 | "phyif_shm_mbx_msg_cb: RX full out of sync:" | ||
170 | " idx:%d, msg:%x SHM_GET_FULL(mbx_msg):%x\n", | ||
171 | idx, mbx_msg, SHM_GET_FULL(mbx_msg)); | ||
172 | |||
173 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
174 | |||
175 | /* Bail out. */ | ||
176 | goto err_sync; | ||
177 | } | ||
178 | |||
179 | list_del_init(&pbuf->list); | ||
180 | list_add_tail(&pbuf->list, &pshm_drv->rx_full_list); | ||
181 | |||
182 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
183 | |||
184 | /* Schedule RX work queue. */ | ||
185 | if (!work_pending(&pshm_drv->shm_rx_work)) | ||
186 | queue_work(pshm_drv->pshm_rx_workqueue, | ||
187 | &pshm_drv->shm_rx_work); | ||
188 | } | ||
189 | |||
190 | /* Check for emptied buffers. */ | ||
191 | if (mbx_msg & SHM_EMPTY_MASK) { | ||
192 | int idx; | ||
193 | |||
194 | spin_lock_irqsave(&pshm_drv->lock, flags); | ||
195 | |||
196 | /* Check whether we have any outstanding buffers. */ | ||
197 | if (list_empty(&pshm_drv->tx_full_list)) { | ||
198 | |||
199 | /* We print even in IRQ context... */ | ||
200 | pr_warn("No TX to empty: msg:%x\n", mbx_msg); | ||
201 | |||
202 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
203 | |||
204 | /* Bail out. */ | ||
205 | goto err_sync; | ||
206 | } | ||
207 | |||
208 | pbuf = | ||
209 | list_entry(pshm_drv->tx_full_list.next, | ||
210 | struct buf_list, list); | ||
211 | idx = pbuf->index; | ||
212 | |||
213 | /* Check buffer synchronization. */ | ||
214 | if (idx != SHM_GET_EMPTY(mbx_msg)) { | ||
215 | |||
216 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
217 | |||
218 | /* We print even in IRQ context... */ | ||
219 | pr_warn("TX empty " | ||
220 | "out of sync:idx:%d, msg:%x\n", idx, mbx_msg); | ||
221 | |||
222 | /* Bail out. */ | ||
223 | goto err_sync; | ||
224 | } | ||
225 | list_del_init(&pbuf->list); | ||
226 | |||
227 | /* Reset buffer parameters. */ | ||
228 | pbuf->frames = 0; | ||
229 | pbuf->frm_ofs = SHM_CAIF_FRM_OFS; | ||
230 | |||
231 | list_add_tail(&pbuf->list, &pshm_drv->tx_empty_list); | ||
232 | |||
233 | /* Check the available no. of buffers in the empty list */ | ||
234 | list_for_each(pos, &pshm_drv->tx_empty_list) | ||
235 | avail_emptybuff++; | ||
236 | |||
237 | /* Check whether we have to wake up the transmitter. */ | ||
238 | if ((avail_emptybuff > HIGH_WATERMARK) && | ||
239 | (!pshm_drv->tx_empty_available)) { | ||
240 | pshm_drv->tx_empty_available = 1; | ||
241 | pshm_drv->cfdev.flowctrl | ||
242 | (pshm_drv->pshm_dev->pshm_netdev, | ||
243 | CAIF_FLOW_ON); | ||
244 | |||
245 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
246 | |||
247 | /* Schedule the work queue. if required */ | ||
248 | if (!work_pending(&pshm_drv->shm_tx_work)) | ||
249 | queue_work(pshm_drv->pshm_tx_workqueue, | ||
250 | &pshm_drv->shm_tx_work); | ||
251 | } else | ||
252 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
253 | } | ||
254 | |||
255 | return 0; | ||
256 | |||
257 | err_sync: | ||
258 | return -EIO; | ||
259 | } | ||
260 | |||
261 | static void shm_rx_work_func(struct work_struct *rx_work) | ||
262 | { | ||
263 | struct shmdrv_layer *pshm_drv; | ||
264 | struct buf_list *pbuf; | ||
265 | unsigned long flags = 0; | ||
266 | struct sk_buff *skb; | ||
267 | char *p; | ||
268 | int ret; | ||
269 | |||
270 | pshm_drv = container_of(rx_work, struct shmdrv_layer, shm_rx_work); | ||
271 | |||
272 | while (1) { | ||
273 | |||
274 | struct shm_pck_desc *pck_desc; | ||
275 | |||
276 | spin_lock_irqsave(&pshm_drv->lock, flags); | ||
277 | |||
278 | /* Check for received buffers. */ | ||
279 | if (list_empty(&pshm_drv->rx_full_list)) { | ||
280 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
281 | break; | ||
282 | } | ||
283 | |||
284 | pbuf = | ||
285 | list_entry(pshm_drv->rx_full_list.next, struct buf_list, | ||
286 | list); | ||
287 | list_del_init(&pbuf->list); | ||
288 | |||
289 | /* Retrieve pointer to start of the packet descriptor area. */ | ||
290 | pck_desc = (struct shm_pck_desc *) pbuf->desc_vptr; | ||
291 | |||
292 | /* | ||
293 | * Check whether descriptor contains a CAIF shared memory | ||
294 | * frame. | ||
295 | */ | ||
296 | while (pck_desc->frm_ofs) { | ||
297 | unsigned int frm_buf_ofs; | ||
298 | unsigned int frm_pck_ofs; | ||
299 | unsigned int frm_pck_len; | ||
300 | /* | ||
301 | * Check whether offset is within buffer limits | ||
302 | * (lower). | ||
303 | */ | ||
304 | if (pck_desc->frm_ofs < | ||
305 | (pbuf->phy_addr - pshm_drv->shm_base_addr)) | ||
306 | break; | ||
307 | /* | ||
308 | * Check whether offset is within buffer limits | ||
309 | * (higher). | ||
310 | */ | ||
311 | if (pck_desc->frm_ofs > | ||
312 | ((pbuf->phy_addr - pshm_drv->shm_base_addr) + | ||
313 | pbuf->len)) | ||
314 | break; | ||
315 | |||
316 | /* Calculate offset from start of buffer. */ | ||
317 | frm_buf_ofs = | ||
318 | pck_desc->frm_ofs - (pbuf->phy_addr - | ||
319 | pshm_drv->shm_base_addr); | ||
320 | |||
321 | /* | ||
322 | * Calculate offset and length of CAIF packet while | ||
323 | * taking care of the shared memory header. | ||
324 | */ | ||
325 | frm_pck_ofs = | ||
326 | frm_buf_ofs + SHM_HDR_LEN + | ||
327 | (*(pbuf->desc_vptr + frm_buf_ofs)); | ||
328 | frm_pck_len = | ||
329 | (pck_desc->frm_len - SHM_HDR_LEN - | ||
330 | (*(pbuf->desc_vptr + frm_buf_ofs))); | ||
331 | |||
332 | /* Check whether CAIF packet is within buffer limits */ | ||
333 | if ((frm_pck_ofs + pck_desc->frm_len) > pbuf->len) | ||
334 | break; | ||
335 | |||
336 | /* Get a suitable CAIF packet and copy in data. */ | ||
337 | skb = netdev_alloc_skb(pshm_drv->pshm_dev->pshm_netdev, | ||
338 | frm_pck_len + 1); | ||
339 | BUG_ON(skb == NULL); | ||
340 | |||
341 | p = skb_put(skb, frm_pck_len); | ||
342 | memcpy(p, pbuf->desc_vptr + frm_pck_ofs, frm_pck_len); | ||
343 | |||
344 | skb->protocol = htons(ETH_P_CAIF); | ||
345 | skb_reset_mac_header(skb); | ||
346 | skb->dev = pshm_drv->pshm_dev->pshm_netdev; | ||
347 | |||
348 | /* Push received packet up the stack. */ | ||
349 | ret = netif_rx_ni(skb); | ||
350 | |||
351 | if (!ret) { | ||
352 | pshm_drv->pshm_dev->pshm_netdev->stats. | ||
353 | rx_packets++; | ||
354 | pshm_drv->pshm_dev->pshm_netdev->stats. | ||
355 | rx_bytes += pck_desc->frm_len; | ||
356 | } else | ||
357 | ++pshm_drv->pshm_dev->pshm_netdev->stats. | ||
358 | rx_dropped; | ||
359 | /* Move to next packet descriptor. */ | ||
360 | pck_desc++; | ||
361 | } | ||
362 | |||
363 | list_add_tail(&pbuf->list, &pshm_drv->rx_pend_list); | ||
364 | |||
365 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
366 | |||
367 | } | ||
368 | |||
369 | /* Schedule the work queue. if required */ | ||
370 | if (!work_pending(&pshm_drv->shm_tx_work)) | ||
371 | queue_work(pshm_drv->pshm_tx_workqueue, &pshm_drv->shm_tx_work); | ||
372 | |||
373 | } | ||
374 | |||
375 | static void shm_tx_work_func(struct work_struct *tx_work) | ||
376 | { | ||
377 | u32 mbox_msg; | ||
378 | unsigned int frmlen, avail_emptybuff, append = 0; | ||
379 | unsigned long flags = 0; | ||
380 | struct buf_list *pbuf = NULL; | ||
381 | struct shmdrv_layer *pshm_drv; | ||
382 | struct shm_caif_frm *frm; | ||
383 | struct sk_buff *skb; | ||
384 | struct shm_pck_desc *pck_desc; | ||
385 | struct list_head *pos; | ||
386 | |||
387 | pshm_drv = container_of(tx_work, struct shmdrv_layer, shm_tx_work); | ||
388 | |||
389 | do { | ||
390 | /* Initialize mailbox message. */ | ||
391 | mbox_msg = 0x00; | ||
392 | avail_emptybuff = 0; | ||
393 | |||
394 | spin_lock_irqsave(&pshm_drv->lock, flags); | ||
395 | |||
396 | /* Check for pending receive buffers. */ | ||
397 | if (!list_empty(&pshm_drv->rx_pend_list)) { | ||
398 | |||
399 | pbuf = list_entry(pshm_drv->rx_pend_list.next, | ||
400 | struct buf_list, list); | ||
401 | |||
402 | list_del_init(&pbuf->list); | ||
403 | list_add_tail(&pbuf->list, &pshm_drv->rx_empty_list); | ||
404 | /* | ||
405 | * Value index is never changed, | ||
406 | * so read access should be safe. | ||
407 | */ | ||
408 | mbox_msg |= SHM_SET_EMPTY(pbuf->index); | ||
409 | } | ||
410 | |||
411 | skb = skb_peek(&pshm_drv->sk_qhead); | ||
412 | |||
413 | if (skb == NULL) | ||
414 | goto send_msg; | ||
415 | |||
416 | /* Check the available no. of buffers in the empty list */ | ||
417 | list_for_each(pos, &pshm_drv->tx_empty_list) | ||
418 | avail_emptybuff++; | ||
419 | |||
420 | if ((avail_emptybuff < LOW_WATERMARK) && | ||
421 | pshm_drv->tx_empty_available) { | ||
422 | /* Update blocking condition. */ | ||
423 | pshm_drv->tx_empty_available = 0; | ||
424 | pshm_drv->cfdev.flowctrl | ||
425 | (pshm_drv->pshm_dev->pshm_netdev, | ||
426 | CAIF_FLOW_OFF); | ||
427 | } | ||
428 | /* | ||
429 | * We simply return back to the caller if we do not have space | ||
430 | * either in Tx pending list or Tx empty list. In this case, | ||
431 | * we hold the received skb in the skb list, waiting to | ||
432 | * be transmitted once Tx buffers become available | ||
433 | */ | ||
434 | if (list_empty(&pshm_drv->tx_empty_list)) | ||
435 | goto send_msg; | ||
436 | |||
437 | /* Get the first free Tx buffer. */ | ||
438 | pbuf = list_entry(pshm_drv->tx_empty_list.next, | ||
439 | struct buf_list, list); | ||
440 | do { | ||
441 | if (append) { | ||
442 | skb = skb_peek(&pshm_drv->sk_qhead); | ||
443 | if (skb == NULL) | ||
444 | break; | ||
445 | } | ||
446 | |||
447 | frm = (struct shm_caif_frm *) | ||
448 | (pbuf->desc_vptr + pbuf->frm_ofs); | ||
449 | |||
450 | frm->hdr_ofs = 0; | ||
451 | frmlen = 0; | ||
452 | frmlen += SHM_HDR_LEN + frm->hdr_ofs + skb->len; | ||
453 | |||
454 | /* Add tail padding if needed. */ | ||
455 | if (frmlen % SHM_FRM_PAD_LEN) | ||
456 | frmlen += SHM_FRM_PAD_LEN - | ||
457 | (frmlen % SHM_FRM_PAD_LEN); | ||
458 | |||
459 | /* | ||
460 | * Verify that packet, header and additional padding | ||
461 | * can fit within the buffer frame area. | ||
462 | */ | ||
463 | if (frmlen >= (pbuf->len - pbuf->frm_ofs)) | ||
464 | break; | ||
465 | |||
466 | if (!append) { | ||
467 | list_del_init(&pbuf->list); | ||
468 | append = 1; | ||
469 | } | ||
470 | |||
471 | skb = skb_dequeue(&pshm_drv->sk_qhead); | ||
472 | /* Copy in CAIF frame. */ | ||
473 | skb_copy_bits(skb, 0, pbuf->desc_vptr + | ||
474 | pbuf->frm_ofs + SHM_HDR_LEN + | ||
475 | frm->hdr_ofs, skb->len); | ||
476 | |||
477 | pshm_drv->pshm_dev->pshm_netdev->stats.tx_packets++; | ||
478 | pshm_drv->pshm_dev->pshm_netdev->stats.tx_bytes += | ||
479 | frmlen; | ||
480 | dev_kfree_skb(skb); | ||
481 | |||
482 | /* Fill in the shared memory packet descriptor area. */ | ||
483 | pck_desc = (struct shm_pck_desc *) (pbuf->desc_vptr); | ||
484 | /* Forward to current frame. */ | ||
485 | pck_desc += pbuf->frames; | ||
486 | pck_desc->frm_ofs = (pbuf->phy_addr - | ||
487 | pshm_drv->shm_base_addr) + | ||
488 | pbuf->frm_ofs; | ||
489 | pck_desc->frm_len = frmlen; | ||
490 | /* Terminate packet descriptor area. */ | ||
491 | pck_desc++; | ||
492 | pck_desc->frm_ofs = 0; | ||
493 | /* Update buffer parameters. */ | ||
494 | pbuf->frames++; | ||
495 | pbuf->frm_ofs += frmlen + (frmlen % 32); | ||
496 | |||
497 | } while (pbuf->frames < SHM_MAX_FRMS_PER_BUF); | ||
498 | |||
499 | /* Assign buffer as full. */ | ||
500 | list_add_tail(&pbuf->list, &pshm_drv->tx_full_list); | ||
501 | append = 0; | ||
502 | mbox_msg |= SHM_SET_FULL(pbuf->index); | ||
503 | send_msg: | ||
504 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
505 | |||
506 | if (mbox_msg) | ||
507 | pshm_drv->pshm_dev->pshmdev_mbxsend | ||
508 | (pshm_drv->pshm_dev->shm_id, mbox_msg); | ||
509 | } while (mbox_msg); | ||
510 | } | ||
511 | |||
512 | static int shm_netdev_tx(struct sk_buff *skb, struct net_device *shm_netdev) | ||
513 | { | ||
514 | struct shmdrv_layer *pshm_drv; | ||
515 | unsigned long flags = 0; | ||
516 | |||
517 | pshm_drv = netdev_priv(shm_netdev); | ||
518 | |||
519 | spin_lock_irqsave(&pshm_drv->lock, flags); | ||
520 | |||
521 | skb_queue_tail(&pshm_drv->sk_qhead, skb); | ||
522 | |||
523 | spin_unlock_irqrestore(&pshm_drv->lock, flags); | ||
524 | |||
525 | /* Schedule Tx work queue. for deferred processing of skbs*/ | ||
526 | if (!work_pending(&pshm_drv->shm_tx_work)) | ||
527 | queue_work(pshm_drv->pshm_tx_workqueue, &pshm_drv->shm_tx_work); | ||
528 | |||
529 | return 0; | ||
530 | } | ||
531 | |||
532 | static const struct net_device_ops netdev_ops = { | ||
533 | .ndo_open = shm_netdev_open, | ||
534 | .ndo_stop = shm_netdev_close, | ||
535 | .ndo_start_xmit = shm_netdev_tx, | ||
536 | }; | ||
537 | |||
538 | static void shm_netdev_setup(struct net_device *pshm_netdev) | ||
539 | { | ||
540 | struct shmdrv_layer *pshm_drv; | ||
541 | pshm_netdev->netdev_ops = &netdev_ops; | ||
542 | |||
543 | pshm_netdev->mtu = CAIF_MAX_MTU; | ||
544 | pshm_netdev->type = ARPHRD_CAIF; | ||
545 | pshm_netdev->hard_header_len = CAIF_NEEDED_HEADROOM; | ||
546 | pshm_netdev->tx_queue_len = 0; | ||
547 | pshm_netdev->destructor = free_netdev; | ||
548 | |||
549 | pshm_drv = netdev_priv(pshm_netdev); | ||
550 | |||
551 | /* Initialize structures in a clean state. */ | ||
552 | memset(pshm_drv, 0, sizeof(struct shmdrv_layer)); | ||
553 | |||
554 | pshm_drv->cfdev.link_select = CAIF_LINK_LOW_LATENCY; | ||
555 | } | ||
556 | |||
557 | int caif_shmcore_probe(struct shmdev_layer *pshm_dev) | ||
558 | { | ||
559 | int result, j; | ||
560 | struct shmdrv_layer *pshm_drv = NULL; | ||
561 | |||
562 | pshm_dev->pshm_netdev = alloc_netdev(sizeof(struct shmdrv_layer), | ||
563 | "cfshm%d", shm_netdev_setup); | ||
564 | if (!pshm_dev->pshm_netdev) | ||
565 | return -ENOMEM; | ||
566 | |||
567 | pshm_drv = netdev_priv(pshm_dev->pshm_netdev); | ||
568 | pshm_drv->pshm_dev = pshm_dev; | ||
569 | |||
570 | /* | ||
571 | * Initialization starts with the verification of the | ||
572 | * availability of MBX driver by calling its setup function. | ||
573 | * MBX driver must be available by this time for proper | ||
574 | * functioning of SHM driver. | ||
575 | */ | ||
576 | if ((pshm_dev->pshmdev_mbxsetup | ||
577 | (caif_shmdrv_rx_cb, pshm_dev, pshm_drv)) != 0) { | ||
578 | pr_warn("Could not config. SHM Mailbox," | ||
579 | " Bailing out.....\n"); | ||
580 | free_netdev(pshm_dev->pshm_netdev); | ||
581 | return -ENODEV; | ||
582 | } | ||
583 | |||
584 | skb_queue_head_init(&pshm_drv->sk_qhead); | ||
585 | |||
586 | pr_info("SHM DEVICE[%d] PROBED BY DRIVER, NEW SHM DRIVER" | ||
587 | " INSTANCE AT pshm_drv =0x%p\n", | ||
588 | pshm_drv->pshm_dev->shm_id, pshm_drv); | ||
589 | |||
590 | if (pshm_dev->shm_total_sz < | ||
591 | (NR_TX_BUF * TX_BUF_SZ + NR_RX_BUF * RX_BUF_SZ)) { | ||
592 | |||
593 | pr_warn("ERROR, Amount of available" | ||
594 | " Phys. SHM cannot accomodate current SHM " | ||
595 | "driver configuration, Bailing out ...\n"); | ||
596 | free_netdev(pshm_dev->pshm_netdev); | ||
597 | return -ENOMEM; | ||
598 | } | ||
599 | |||
600 | pshm_drv->shm_base_addr = pshm_dev->shm_base_addr; | ||
601 | pshm_drv->shm_tx_addr = pshm_drv->shm_base_addr; | ||
602 | |||
603 | if (pshm_dev->shm_loopback) | ||
604 | pshm_drv->shm_rx_addr = pshm_drv->shm_tx_addr; | ||
605 | else | ||
606 | pshm_drv->shm_rx_addr = pshm_dev->shm_base_addr + | ||
607 | (NR_TX_BUF * TX_BUF_SZ); | ||
608 | |||
609 | INIT_LIST_HEAD(&pshm_drv->tx_empty_list); | ||
610 | INIT_LIST_HEAD(&pshm_drv->tx_pend_list); | ||
611 | INIT_LIST_HEAD(&pshm_drv->tx_full_list); | ||
612 | |||
613 | INIT_LIST_HEAD(&pshm_drv->rx_empty_list); | ||
614 | INIT_LIST_HEAD(&pshm_drv->rx_pend_list); | ||
615 | INIT_LIST_HEAD(&pshm_drv->rx_full_list); | ||
616 | |||
617 | INIT_WORK(&pshm_drv->shm_tx_work, shm_tx_work_func); | ||
618 | INIT_WORK(&pshm_drv->shm_rx_work, shm_rx_work_func); | ||
619 | |||
620 | pshm_drv->pshm_tx_workqueue = | ||
621 | create_singlethread_workqueue("shm_tx_work"); | ||
622 | pshm_drv->pshm_rx_workqueue = | ||
623 | create_singlethread_workqueue("shm_rx_work"); | ||
624 | |||
625 | for (j = 0; j < NR_TX_BUF; j++) { | ||
626 | struct buf_list *tx_buf = | ||
627 | kmalloc(sizeof(struct buf_list), GFP_KERNEL); | ||
628 | |||
629 | if (tx_buf == NULL) { | ||
630 | pr_warn("ERROR, Could not" | ||
631 | " allocate dynamic mem. for tx_buf," | ||
632 | " Bailing out ...\n"); | ||
633 | free_netdev(pshm_dev->pshm_netdev); | ||
634 | return -ENOMEM; | ||
635 | } | ||
636 | tx_buf->index = j; | ||
637 | tx_buf->phy_addr = pshm_drv->shm_tx_addr + (TX_BUF_SZ * j); | ||
638 | tx_buf->len = TX_BUF_SZ; | ||
639 | tx_buf->frames = 0; | ||
640 | tx_buf->frm_ofs = SHM_CAIF_FRM_OFS; | ||
641 | |||
642 | if (pshm_dev->shm_loopback) | ||
643 | tx_buf->desc_vptr = (char *)tx_buf->phy_addr; | ||
644 | else | ||
645 | tx_buf->desc_vptr = | ||
646 | ioremap(tx_buf->phy_addr, TX_BUF_SZ); | ||
647 | |||
648 | list_add_tail(&tx_buf->list, &pshm_drv->tx_empty_list); | ||
649 | } | ||
650 | |||
651 | for (j = 0; j < NR_RX_BUF; j++) { | ||
652 | struct buf_list *rx_buf = | ||
653 | kmalloc(sizeof(struct buf_list), GFP_KERNEL); | ||
654 | |||
655 | if (rx_buf == NULL) { | ||
656 | pr_warn("ERROR, Could not" | ||
657 | " allocate dynamic mem.for rx_buf," | ||
658 | " Bailing out ...\n"); | ||
659 | free_netdev(pshm_dev->pshm_netdev); | ||
660 | return -ENOMEM; | ||
661 | } | ||
662 | rx_buf->index = j; | ||
663 | rx_buf->phy_addr = pshm_drv->shm_rx_addr + (RX_BUF_SZ * j); | ||
664 | rx_buf->len = RX_BUF_SZ; | ||
665 | |||
666 | if (pshm_dev->shm_loopback) | ||
667 | rx_buf->desc_vptr = (char *)rx_buf->phy_addr; | ||
668 | else | ||
669 | rx_buf->desc_vptr = | ||
670 | ioremap(rx_buf->phy_addr, RX_BUF_SZ); | ||
671 | list_add_tail(&rx_buf->list, &pshm_drv->rx_empty_list); | ||
672 | } | ||
673 | |||
674 | pshm_drv->tx_empty_available = 1; | ||
675 | result = register_netdev(pshm_dev->pshm_netdev); | ||
676 | if (result) | ||
677 | pr_warn("ERROR[%d], SHM could not, " | ||
678 | "register with NW FRMWK Bailing out ...\n", result); | ||
679 | |||
680 | return result; | ||
681 | } | ||
682 | |||
683 | void caif_shmcore_remove(struct net_device *pshm_netdev) | ||
684 | { | ||
685 | struct buf_list *pbuf; | ||
686 | struct shmdrv_layer *pshm_drv = NULL; | ||
687 | |||
688 | pshm_drv = netdev_priv(pshm_netdev); | ||
689 | |||
690 | while (!(list_empty(&pshm_drv->tx_pend_list))) { | ||
691 | pbuf = | ||
692 | list_entry(pshm_drv->tx_pend_list.next, | ||
693 | struct buf_list, list); | ||
694 | |||
695 | list_del(&pbuf->list); | ||
696 | kfree(pbuf); | ||
697 | } | ||
698 | |||
699 | while (!(list_empty(&pshm_drv->tx_full_list))) { | ||
700 | pbuf = | ||
701 | list_entry(pshm_drv->tx_full_list.next, | ||
702 | struct buf_list, list); | ||
703 | list_del(&pbuf->list); | ||
704 | kfree(pbuf); | ||
705 | } | ||
706 | |||
707 | while (!(list_empty(&pshm_drv->tx_empty_list))) { | ||
708 | pbuf = | ||
709 | list_entry(pshm_drv->tx_empty_list.next, | ||
710 | struct buf_list, list); | ||
711 | list_del(&pbuf->list); | ||
712 | kfree(pbuf); | ||
713 | } | ||
714 | |||
715 | while (!(list_empty(&pshm_drv->rx_full_list))) { | ||
716 | pbuf = | ||
717 | list_entry(pshm_drv->tx_full_list.next, | ||
718 | struct buf_list, list); | ||
719 | list_del(&pbuf->list); | ||
720 | kfree(pbuf); | ||
721 | } | ||
722 | |||
723 | while (!(list_empty(&pshm_drv->rx_pend_list))) { | ||
724 | pbuf = | ||
725 | list_entry(pshm_drv->tx_pend_list.next, | ||
726 | struct buf_list, list); | ||
727 | list_del(&pbuf->list); | ||
728 | kfree(pbuf); | ||
729 | } | ||
730 | |||
731 | while (!(list_empty(&pshm_drv->rx_empty_list))) { | ||
732 | pbuf = | ||
733 | list_entry(pshm_drv->rx_empty_list.next, | ||
734 | struct buf_list, list); | ||
735 | list_del(&pbuf->list); | ||
736 | kfree(pbuf); | ||
737 | } | ||
738 | |||
739 | /* Destroy work queues. */ | ||
740 | destroy_workqueue(pshm_drv->pshm_tx_workqueue); | ||
741 | destroy_workqueue(pshm_drv->pshm_rx_workqueue); | ||
742 | |||
743 | unregister_netdev(pshm_netdev); | ||
744 | } | ||
diff --git a/drivers/net/caif/caif_spi.c b/drivers/net/caif/caif_spi.c index 8427533fe313..20da1996d354 100644 --- a/drivers/net/caif/caif_spi.c +++ b/drivers/net/caif/caif_spi.c | |||
@@ -33,6 +33,9 @@ MODULE_LICENSE("GPL"); | |||
33 | MODULE_AUTHOR("Daniel Martensson<daniel.martensson@stericsson.com>"); | 33 | MODULE_AUTHOR("Daniel Martensson<daniel.martensson@stericsson.com>"); |
34 | MODULE_DESCRIPTION("CAIF SPI driver"); | 34 | MODULE_DESCRIPTION("CAIF SPI driver"); |
35 | 35 | ||
36 | /* Returns the number of padding bytes for alignment. */ | ||
37 | #define PAD_POW2(x, pow) ((((x)&((pow)-1))==0) ? 0 : (((pow)-((x)&((pow)-1))))) | ||
38 | |||
36 | static int spi_loop; | 39 | static int spi_loop; |
37 | module_param(spi_loop, bool, S_IRUGO); | 40 | module_param(spi_loop, bool, S_IRUGO); |
38 | MODULE_PARM_DESC(spi_loop, "SPI running in loopback mode."); | 41 | MODULE_PARM_DESC(spi_loop, "SPI running in loopback mode."); |
@@ -41,7 +44,10 @@ MODULE_PARM_DESC(spi_loop, "SPI running in loopback mode."); | |||
41 | module_param(spi_frm_align, int, S_IRUGO); | 44 | module_param(spi_frm_align, int, S_IRUGO); |
42 | MODULE_PARM_DESC(spi_frm_align, "SPI frame alignment."); | 45 | MODULE_PARM_DESC(spi_frm_align, "SPI frame alignment."); |
43 | 46 | ||
44 | /* SPI padding options. */ | 47 | /* |
48 | * SPI padding options. | ||
49 | * Warning: must be a base of 2 (& operation used) and can not be zero ! | ||
50 | */ | ||
45 | module_param(spi_up_head_align, int, S_IRUGO); | 51 | module_param(spi_up_head_align, int, S_IRUGO); |
46 | MODULE_PARM_DESC(spi_up_head_align, "SPI uplink head alignment."); | 52 | MODULE_PARM_DESC(spi_up_head_align, "SPI uplink head alignment."); |
47 | 53 | ||
@@ -240,15 +246,13 @@ static ssize_t dbgfs_frame(struct file *file, char __user *user_buf, | |||
240 | static const struct file_operations dbgfs_state_fops = { | 246 | static const struct file_operations dbgfs_state_fops = { |
241 | .open = dbgfs_open, | 247 | .open = dbgfs_open, |
242 | .read = dbgfs_state, | 248 | .read = dbgfs_state, |
243 | .owner = THIS_MODULE, | 249 | .owner = THIS_MODULE |
244 | .llseek = default_llseek, | ||
245 | }; | 250 | }; |
246 | 251 | ||
247 | static const struct file_operations dbgfs_frame_fops = { | 252 | static const struct file_operations dbgfs_frame_fops = { |
248 | .open = dbgfs_open, | 253 | .open = dbgfs_open, |
249 | .read = dbgfs_frame, | 254 | .read = dbgfs_frame, |
250 | .owner = THIS_MODULE, | 255 | .owner = THIS_MODULE |
251 | .llseek = default_llseek, | ||
252 | }; | 256 | }; |
253 | 257 | ||
254 | static inline void dev_debugfs_add(struct cfspi *cfspi) | 258 | static inline void dev_debugfs_add(struct cfspi *cfspi) |
@@ -337,6 +341,9 @@ int cfspi_xmitfrm(struct cfspi *cfspi, u8 *buf, size_t len) | |||
337 | u8 *dst = buf; | 341 | u8 *dst = buf; |
338 | caif_assert(buf); | 342 | caif_assert(buf); |
339 | 343 | ||
344 | if (cfspi->slave && !cfspi->slave_talked) | ||
345 | cfspi->slave_talked = true; | ||
346 | |||
340 | do { | 347 | do { |
341 | struct sk_buff *skb; | 348 | struct sk_buff *skb; |
342 | struct caif_payload_info *info; | 349 | struct caif_payload_info *info; |
@@ -357,8 +364,8 @@ int cfspi_xmitfrm(struct cfspi *cfspi, u8 *buf, size_t len) | |||
357 | * Compute head offset i.e. number of bytes to add to | 364 | * Compute head offset i.e. number of bytes to add to |
358 | * get the start of the payload aligned. | 365 | * get the start of the payload aligned. |
359 | */ | 366 | */ |
360 | if (spi_up_head_align) { | 367 | if (spi_up_head_align > 1) { |
361 | spad = 1 + ((info->hdr_len + 1) & spi_up_head_align); | 368 | spad = 1 + PAD_POW2((info->hdr_len + 1), spi_up_head_align); |
362 | *dst = (u8)(spad - 1); | 369 | *dst = (u8)(spad - 1); |
363 | dst += spad; | 370 | dst += spad; |
364 | } | 371 | } |
@@ -373,7 +380,7 @@ int cfspi_xmitfrm(struct cfspi *cfspi, u8 *buf, size_t len) | |||
373 | * Compute tail offset i.e. number of bytes to add to | 380 | * Compute tail offset i.e. number of bytes to add to |
374 | * get the complete CAIF frame aligned. | 381 | * get the complete CAIF frame aligned. |
375 | */ | 382 | */ |
376 | epad = (skb->len + spad) & spi_up_tail_align; | 383 | epad = PAD_POW2((skb->len + spad), spi_up_tail_align); |
377 | dst += epad; | 384 | dst += epad; |
378 | 385 | ||
379 | dev_kfree_skb(skb); | 386 | dev_kfree_skb(skb); |
@@ -417,14 +424,14 @@ int cfspi_xmitlen(struct cfspi *cfspi) | |||
417 | * Compute head offset i.e. number of bytes to add to | 424 | * Compute head offset i.e. number of bytes to add to |
418 | * get the start of the payload aligned. | 425 | * get the start of the payload aligned. |
419 | */ | 426 | */ |
420 | if (spi_up_head_align) | 427 | if (spi_up_head_align > 1) |
421 | spad = 1 + ((info->hdr_len + 1) & spi_up_head_align); | 428 | spad = 1 + PAD_POW2((info->hdr_len + 1), spi_up_head_align); |
422 | 429 | ||
423 | /* | 430 | /* |
424 | * Compute tail offset i.e. number of bytes to add to | 431 | * Compute tail offset i.e. number of bytes to add to |
425 | * get the complete CAIF frame aligned. | 432 | * get the complete CAIF frame aligned. |
426 | */ | 433 | */ |
427 | epad = (skb->len + spad) & spi_up_tail_align; | 434 | epad = PAD_POW2((skb->len + spad), spi_up_tail_align); |
428 | 435 | ||
429 | if ((skb->len + spad + epad + frm_len) <= CAIF_MAX_SPI_FRAME) { | 436 | if ((skb->len + spad + epad + frm_len) <= CAIF_MAX_SPI_FRAME) { |
430 | skb_queue_tail(&cfspi->chead, skb); | 437 | skb_queue_tail(&cfspi->chead, skb); |
@@ -433,6 +440,7 @@ int cfspi_xmitlen(struct cfspi *cfspi) | |||
433 | } else { | 440 | } else { |
434 | /* Put back packet. */ | 441 | /* Put back packet. */ |
435 | skb_queue_head(&cfspi->qhead, skb); | 442 | skb_queue_head(&cfspi->qhead, skb); |
443 | break; | ||
436 | } | 444 | } |
437 | } while (pkts <= CAIF_MAX_SPI_PKTS); | 445 | } while (pkts <= CAIF_MAX_SPI_PKTS); |
438 | 446 | ||
@@ -453,6 +461,15 @@ static void cfspi_ss_cb(bool assert, struct cfspi_ifc *ifc) | |||
453 | { | 461 | { |
454 | struct cfspi *cfspi = (struct cfspi *)ifc->priv; | 462 | struct cfspi *cfspi = (struct cfspi *)ifc->priv; |
455 | 463 | ||
464 | /* | ||
465 | * The slave device is the master on the link. Interrupts before the | ||
466 | * slave has transmitted are considered spurious. | ||
467 | */ | ||
468 | if (cfspi->slave && !cfspi->slave_talked) { | ||
469 | printk(KERN_WARNING "CFSPI: Spurious SS interrupt.\n"); | ||
470 | return; | ||
471 | } | ||
472 | |||
456 | if (!in_interrupt()) | 473 | if (!in_interrupt()) |
457 | spin_lock(&cfspi->lock); | 474 | spin_lock(&cfspi->lock); |
458 | if (assert) { | 475 | if (assert) { |
@@ -465,7 +482,8 @@ static void cfspi_ss_cb(bool assert, struct cfspi_ifc *ifc) | |||
465 | spin_unlock(&cfspi->lock); | 482 | spin_unlock(&cfspi->lock); |
466 | 483 | ||
467 | /* Wake up the xfer thread. */ | 484 | /* Wake up the xfer thread. */ |
468 | wake_up_interruptible(&cfspi->wait); | 485 | if (assert) |
486 | wake_up_interruptible(&cfspi->wait); | ||
469 | } | 487 | } |
470 | 488 | ||
471 | static void cfspi_xfer_done_cb(struct cfspi_ifc *ifc) | 489 | static void cfspi_xfer_done_cb(struct cfspi_ifc *ifc) |
@@ -523,7 +541,7 @@ int cfspi_rxfrm(struct cfspi *cfspi, u8 *buf, size_t len) | |||
523 | * Compute head offset i.e. number of bytes added to | 541 | * Compute head offset i.e. number of bytes added to |
524 | * get the start of the payload aligned. | 542 | * get the start of the payload aligned. |
525 | */ | 543 | */ |
526 | if (spi_down_head_align) { | 544 | if (spi_down_head_align > 1) { |
527 | spad = 1 + *src; | 545 | spad = 1 + *src; |
528 | src += spad; | 546 | src += spad; |
529 | } | 547 | } |
@@ -564,7 +582,7 @@ int cfspi_rxfrm(struct cfspi *cfspi, u8 *buf, size_t len) | |||
564 | * Compute tail offset i.e. number of bytes added to | 582 | * Compute tail offset i.e. number of bytes added to |
565 | * get the complete CAIF frame aligned. | 583 | * get the complete CAIF frame aligned. |
566 | */ | 584 | */ |
567 | epad = (pkt_len + spad) & spi_down_tail_align; | 585 | epad = PAD_POW2((pkt_len + spad), spi_down_tail_align); |
568 | src += epad; | 586 | src += epad; |
569 | } while ((src - buf) < len); | 587 | } while ((src - buf) < len); |
570 | 588 | ||
@@ -617,19 +635,28 @@ int cfspi_spi_probe(struct platform_device *pdev) | |||
617 | 635 | ||
618 | ndev = alloc_netdev(sizeof(struct cfspi), | 636 | ndev = alloc_netdev(sizeof(struct cfspi), |
619 | "cfspi%d", cfspi_setup); | 637 | "cfspi%d", cfspi_setup); |
620 | if (!dev) | 638 | if (!ndev) |
621 | return -ENODEV; | 639 | return -ENOMEM; |
622 | 640 | ||
623 | cfspi = netdev_priv(ndev); | 641 | cfspi = netdev_priv(ndev); |
624 | netif_stop_queue(ndev); | 642 | netif_stop_queue(ndev); |
625 | cfspi->ndev = ndev; | 643 | cfspi->ndev = ndev; |
626 | cfspi->pdev = pdev; | 644 | cfspi->pdev = pdev; |
627 | 645 | ||
628 | /* Set flow info */ | 646 | /* Set flow info. */ |
629 | cfspi->flow_off_sent = 0; | 647 | cfspi->flow_off_sent = 0; |
630 | cfspi->qd_low_mark = LOW_WATER_MARK; | 648 | cfspi->qd_low_mark = LOW_WATER_MARK; |
631 | cfspi->qd_high_mark = HIGH_WATER_MARK; | 649 | cfspi->qd_high_mark = HIGH_WATER_MARK; |
632 | 650 | ||
651 | /* Set slave info. */ | ||
652 | if (!strncmp(cfspi_spi_driver.driver.name, "cfspi_sspi", 10)) { | ||
653 | cfspi->slave = true; | ||
654 | cfspi->slave_talked = false; | ||
655 | } else { | ||
656 | cfspi->slave = false; | ||
657 | cfspi->slave_talked = false; | ||
658 | } | ||
659 | |||
633 | /* Assign the SPI device. */ | 660 | /* Assign the SPI device. */ |
634 | cfspi->dev = dev; | 661 | cfspi->dev = dev; |
635 | /* Assign the device ifc to this SPI interface. */ | 662 | /* Assign the device ifc to this SPI interface. */ |
diff --git a/drivers/net/caif/caif_spi_slave.c b/drivers/net/caif/caif_spi_slave.c index 2111dbfea6fe..1b9943a4edab 100644 --- a/drivers/net/caif/caif_spi_slave.c +++ b/drivers/net/caif/caif_spi_slave.c | |||
@@ -36,10 +36,15 @@ static inline int forward_to_spi_cmd(struct cfspi *cfspi) | |||
36 | #endif | 36 | #endif |
37 | 37 | ||
38 | int spi_frm_align = 2; | 38 | int spi_frm_align = 2; |
39 | int spi_up_head_align = 1; | 39 | |
40 | int spi_up_tail_align; | 40 | /* |
41 | int spi_down_head_align = 3; | 41 | * SPI padding options. |
42 | int spi_down_tail_align = 1; | 42 | * Warning: must be a base of 2 (& operation used) and can not be zero ! |
43 | */ | ||
44 | int spi_up_head_align = 1 << 1; | ||
45 | int spi_up_tail_align = 1 << 0; | ||
46 | int spi_down_head_align = 1 << 2; | ||
47 | int spi_down_tail_align = 1 << 1; | ||
43 | 48 | ||
44 | #ifdef CONFIG_DEBUG_FS | 49 | #ifdef CONFIG_DEBUG_FS |
45 | static inline void debugfs_store_prev(struct cfspi *cfspi) | 50 | static inline void debugfs_store_prev(struct cfspi *cfspi) |
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig index 9d9e45394433..080574b0fff0 100644 --- a/drivers/net/can/Kconfig +++ b/drivers/net/can/Kconfig | |||
@@ -82,6 +82,14 @@ config CAN_FLEXCAN | |||
82 | ---help--- | 82 | ---help--- |
83 | Say Y here if you want to support for Freescale FlexCAN. | 83 | Say Y here if you want to support for Freescale FlexCAN. |
84 | 84 | ||
85 | config PCH_CAN | ||
86 | tristate "PCH CAN" | ||
87 | depends on CAN_DEV && PCI | ||
88 | ---help--- | ||
89 | This driver is for PCH CAN of Topcliff which is an IOH for x86 | ||
90 | embedded processor. | ||
91 | This driver can access CAN bus. | ||
92 | |||
85 | source "drivers/net/can/mscan/Kconfig" | 93 | source "drivers/net/can/mscan/Kconfig" |
86 | 94 | ||
87 | source "drivers/net/can/sja1000/Kconfig" | 95 | source "drivers/net/can/sja1000/Kconfig" |
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile index 00575373bbd0..90af15a4f106 100644 --- a/drivers/net/can/Makefile +++ b/drivers/net/can/Makefile | |||
@@ -17,5 +17,6 @@ obj-$(CONFIG_CAN_MCP251X) += mcp251x.o | |||
17 | obj-$(CONFIG_CAN_BFIN) += bfin_can.o | 17 | obj-$(CONFIG_CAN_BFIN) += bfin_can.o |
18 | obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o | 18 | obj-$(CONFIG_CAN_JANZ_ICAN3) += janz-ican3.o |
19 | obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o | 19 | obj-$(CONFIG_CAN_FLEXCAN) += flexcan.o |
20 | obj-$(CONFIG_PCH_CAN) += pch_can.o | ||
20 | 21 | ||
21 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG | 22 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG |
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c index 2d8bd86bc5e2..7ef83d06f7ed 100644 --- a/drivers/net/can/at91_can.c +++ b/drivers/net/can/at91_can.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * at91_can.c - CAN network driver for AT91 SoC CAN controller | 2 | * at91_can.c - CAN network driver for AT91 SoC CAN controller |
3 | * | 3 | * |
4 | * (C) 2007 by Hans J. Koch <hjk@linutronix.de> | 4 | * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de> |
5 | * (C) 2008, 2009 by Marc Kleine-Budde <kernel@pengutronix.de> | 5 | * (C) 2008, 2009, 2010 by Marc Kleine-Budde <kernel@pengutronix.de> |
6 | * | 6 | * |
7 | * This software may be distributed under the terms of the GNU General | 7 | * This software may be distributed under the terms of the GNU General |
8 | * Public License ("GPL") version 2 as distributed in the 'COPYING' | 8 | * Public License ("GPL") version 2 as distributed in the 'COPYING' |
@@ -40,7 +40,6 @@ | |||
40 | 40 | ||
41 | #include <mach/board.h> | 41 | #include <mach/board.h> |
42 | 42 | ||
43 | #define DRV_NAME "at91_can" | ||
44 | #define AT91_NAPI_WEIGHT 12 | 43 | #define AT91_NAPI_WEIGHT 12 |
45 | 44 | ||
46 | /* | 45 | /* |
@@ -172,6 +171,7 @@ struct at91_priv { | |||
172 | }; | 171 | }; |
173 | 172 | ||
174 | static struct can_bittiming_const at91_bittiming_const = { | 173 | static struct can_bittiming_const at91_bittiming_const = { |
174 | .name = KBUILD_MODNAME, | ||
175 | .tseg1_min = 4, | 175 | .tseg1_min = 4, |
176 | .tseg1_max = 16, | 176 | .tseg1_max = 16, |
177 | .tseg2_min = 2, | 177 | .tseg2_min = 2, |
@@ -199,13 +199,13 @@ static inline int get_tx_echo_mb(const struct at91_priv *priv) | |||
199 | 199 | ||
200 | static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg) | 200 | static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg) |
201 | { | 201 | { |
202 | return readl(priv->reg_base + reg); | 202 | return __raw_readl(priv->reg_base + reg); |
203 | } | 203 | } |
204 | 204 | ||
205 | static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg, | 205 | static inline void at91_write(const struct at91_priv *priv, enum at91_reg reg, |
206 | u32 value) | 206 | u32 value) |
207 | { | 207 | { |
208 | writel(value, priv->reg_base + reg); | 208 | __raw_writel(value, priv->reg_base + reg); |
209 | } | 209 | } |
210 | 210 | ||
211 | static inline void set_mb_mode_prio(const struct at91_priv *priv, | 211 | static inline void set_mb_mode_prio(const struct at91_priv *priv, |
@@ -243,6 +243,12 @@ static void at91_setup_mailboxes(struct net_device *dev) | |||
243 | set_mb_mode(priv, i, AT91_MB_MODE_RX); | 243 | set_mb_mode(priv, i, AT91_MB_MODE_RX); |
244 | set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR); | 244 | set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR); |
245 | 245 | ||
246 | /* reset acceptance mask and id register */ | ||
247 | for (i = AT91_MB_RX_FIRST; i <= AT91_MB_RX_LAST; i++) { | ||
248 | at91_write(priv, AT91_MAM(i), 0x0 ); | ||
249 | at91_write(priv, AT91_MID(i), AT91_MID_MIDE); | ||
250 | } | ||
251 | |||
246 | /* The last 4 mailboxes are used for transmitting. */ | 252 | /* The last 4 mailboxes are used for transmitting. */ |
247 | for (i = AT91_MB_TX_FIRST; i <= AT91_MB_TX_LAST; i++) | 253 | for (i = AT91_MB_TX_FIRST; i <= AT91_MB_TX_LAST; i++) |
248 | set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0); | 254 | set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0); |
@@ -257,18 +263,30 @@ static int at91_set_bittiming(struct net_device *dev) | |||
257 | const struct can_bittiming *bt = &priv->can.bittiming; | 263 | const struct can_bittiming *bt = &priv->can.bittiming; |
258 | u32 reg_br; | 264 | u32 reg_br; |
259 | 265 | ||
260 | reg_br = ((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) << 24) | | 266 | reg_br = ((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 << 24 : 0) | |
261 | ((bt->brp - 1) << 16) | ((bt->sjw - 1) << 12) | | 267 | ((bt->brp - 1) << 16) | ((bt->sjw - 1) << 12) | |
262 | ((bt->prop_seg - 1) << 8) | ((bt->phase_seg1 - 1) << 4) | | 268 | ((bt->prop_seg - 1) << 8) | ((bt->phase_seg1 - 1) << 4) | |
263 | ((bt->phase_seg2 - 1) << 0); | 269 | ((bt->phase_seg2 - 1) << 0); |
264 | 270 | ||
265 | dev_info(dev->dev.parent, "writing AT91_BR: 0x%08x\n", reg_br); | 271 | netdev_info(dev, "writing AT91_BR: 0x%08x\n", reg_br); |
266 | 272 | ||
267 | at91_write(priv, AT91_BR, reg_br); | 273 | at91_write(priv, AT91_BR, reg_br); |
268 | 274 | ||
269 | return 0; | 275 | return 0; |
270 | } | 276 | } |
271 | 277 | ||
278 | static int at91_get_berr_counter(const struct net_device *dev, | ||
279 | struct can_berr_counter *bec) | ||
280 | { | ||
281 | const struct at91_priv *priv = netdev_priv(dev); | ||
282 | u32 reg_ecr = at91_read(priv, AT91_ECR); | ||
283 | |||
284 | bec->rxerr = reg_ecr & 0xff; | ||
285 | bec->txerr = reg_ecr >> 16; | ||
286 | |||
287 | return 0; | ||
288 | } | ||
289 | |||
272 | static void at91_chip_start(struct net_device *dev) | 290 | static void at91_chip_start(struct net_device *dev) |
273 | { | 291 | { |
274 | struct at91_priv *priv = netdev_priv(dev); | 292 | struct at91_priv *priv = netdev_priv(dev); |
@@ -281,6 +299,7 @@ static void at91_chip_start(struct net_device *dev) | |||
281 | reg_mr = at91_read(priv, AT91_MR); | 299 | reg_mr = at91_read(priv, AT91_MR); |
282 | at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN); | 300 | at91_write(priv, AT91_MR, reg_mr & ~AT91_MR_CANEN); |
283 | 301 | ||
302 | at91_set_bittiming(dev); | ||
284 | at91_setup_mailboxes(dev); | 303 | at91_setup_mailboxes(dev); |
285 | at91_transceiver_switch(priv, 1); | 304 | at91_transceiver_switch(priv, 1); |
286 | 305 | ||
@@ -350,8 +369,7 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
350 | if (unlikely(!(at91_read(priv, AT91_MSR(mb)) & AT91_MSR_MRDY))) { | 369 | if (unlikely(!(at91_read(priv, AT91_MSR(mb)) & AT91_MSR_MRDY))) { |
351 | netif_stop_queue(dev); | 370 | netif_stop_queue(dev); |
352 | 371 | ||
353 | dev_err(dev->dev.parent, | 372 | netdev_err(dev, "BUG! TX buffer full when queue awake!\n"); |
354 | "BUG! TX buffer full when queue awake!\n"); | ||
355 | return NETDEV_TX_BUSY; | 373 | return NETDEV_TX_BUSY; |
356 | } | 374 | } |
357 | 375 | ||
@@ -435,7 +453,7 @@ static void at91_rx_overflow_err(struct net_device *dev) | |||
435 | struct sk_buff *skb; | 453 | struct sk_buff *skb; |
436 | struct can_frame *cf; | 454 | struct can_frame *cf; |
437 | 455 | ||
438 | dev_dbg(dev->dev.parent, "RX buffer overflow\n"); | 456 | netdev_dbg(dev, "RX buffer overflow\n"); |
439 | stats->rx_over_errors++; | 457 | stats->rx_over_errors++; |
440 | stats->rx_errors++; | 458 | stats->rx_errors++; |
441 | 459 | ||
@@ -480,6 +498,9 @@ static void at91_read_mb(struct net_device *dev, unsigned int mb, | |||
480 | *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb)); | 498 | *(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb)); |
481 | *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb)); | 499 | *(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb)); |
482 | 500 | ||
501 | /* allow RX of extended frames */ | ||
502 | at91_write(priv, AT91_MID(mb), AT91_MID_MIDE); | ||
503 | |||
483 | if (unlikely(mb == AT91_MB_RX_LAST && reg_msr & AT91_MSR_MMI)) | 504 | if (unlikely(mb == AT91_MB_RX_LAST && reg_msr & AT91_MSR_MMI)) |
484 | at91_rx_overflow_err(dev); | 505 | at91_rx_overflow_err(dev); |
485 | } | 506 | } |
@@ -565,8 +586,8 @@ static int at91_poll_rx(struct net_device *dev, int quota) | |||
565 | 586 | ||
566 | if (priv->rx_next > AT91_MB_RX_LOW_LAST && | 587 | if (priv->rx_next > AT91_MB_RX_LOW_LAST && |
567 | reg_sr & AT91_MB_RX_LOW_MASK) | 588 | reg_sr & AT91_MB_RX_LOW_MASK) |
568 | dev_info(dev->dev.parent, | 589 | netdev_info(dev, |
569 | "order of incoming frames cannot be guaranteed\n"); | 590 | "order of incoming frames cannot be guaranteed\n"); |
570 | 591 | ||
571 | again: | 592 | again: |
572 | for (mb = find_next_bit(addr, AT91_MB_RX_NUM, priv->rx_next); | 593 | for (mb = find_next_bit(addr, AT91_MB_RX_NUM, priv->rx_next); |
@@ -604,7 +625,7 @@ static void at91_poll_err_frame(struct net_device *dev, | |||
604 | 625 | ||
605 | /* CRC error */ | 626 | /* CRC error */ |
606 | if (reg_sr & AT91_IRQ_CERR) { | 627 | if (reg_sr & AT91_IRQ_CERR) { |
607 | dev_dbg(dev->dev.parent, "CERR irq\n"); | 628 | netdev_dbg(dev, "CERR irq\n"); |
608 | dev->stats.rx_errors++; | 629 | dev->stats.rx_errors++; |
609 | priv->can.can_stats.bus_error++; | 630 | priv->can.can_stats.bus_error++; |
610 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | 631 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; |
@@ -612,7 +633,7 @@ static void at91_poll_err_frame(struct net_device *dev, | |||
612 | 633 | ||
613 | /* Stuffing Error */ | 634 | /* Stuffing Error */ |
614 | if (reg_sr & AT91_IRQ_SERR) { | 635 | if (reg_sr & AT91_IRQ_SERR) { |
615 | dev_dbg(dev->dev.parent, "SERR irq\n"); | 636 | netdev_dbg(dev, "SERR irq\n"); |
616 | dev->stats.rx_errors++; | 637 | dev->stats.rx_errors++; |
617 | priv->can.can_stats.bus_error++; | 638 | priv->can.can_stats.bus_error++; |
618 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | 639 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; |
@@ -621,14 +642,14 @@ static void at91_poll_err_frame(struct net_device *dev, | |||
621 | 642 | ||
622 | /* Acknowledgement Error */ | 643 | /* Acknowledgement Error */ |
623 | if (reg_sr & AT91_IRQ_AERR) { | 644 | if (reg_sr & AT91_IRQ_AERR) { |
624 | dev_dbg(dev->dev.parent, "AERR irq\n"); | 645 | netdev_dbg(dev, "AERR irq\n"); |
625 | dev->stats.tx_errors++; | 646 | dev->stats.tx_errors++; |
626 | cf->can_id |= CAN_ERR_ACK; | 647 | cf->can_id |= CAN_ERR_ACK; |
627 | } | 648 | } |
628 | 649 | ||
629 | /* Form error */ | 650 | /* Form error */ |
630 | if (reg_sr & AT91_IRQ_FERR) { | 651 | if (reg_sr & AT91_IRQ_FERR) { |
631 | dev_dbg(dev->dev.parent, "FERR irq\n"); | 652 | netdev_dbg(dev, "FERR irq\n"); |
632 | dev->stats.rx_errors++; | 653 | dev->stats.rx_errors++; |
633 | priv->can.can_stats.bus_error++; | 654 | priv->can.can_stats.bus_error++; |
634 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | 655 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; |
@@ -637,7 +658,7 @@ static void at91_poll_err_frame(struct net_device *dev, | |||
637 | 658 | ||
638 | /* Bit Error */ | 659 | /* Bit Error */ |
639 | if (reg_sr & AT91_IRQ_BERR) { | 660 | if (reg_sr & AT91_IRQ_BERR) { |
640 | dev_dbg(dev->dev.parent, "BERR irq\n"); | 661 | netdev_dbg(dev, "BERR irq\n"); |
641 | dev->stats.tx_errors++; | 662 | dev->stats.tx_errors++; |
642 | priv->can.can_stats.bus_error++; | 663 | priv->can.can_stats.bus_error++; |
643 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; | 664 | cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; |
@@ -755,12 +776,10 @@ static void at91_irq_err_state(struct net_device *dev, | |||
755 | struct can_frame *cf, enum can_state new_state) | 776 | struct can_frame *cf, enum can_state new_state) |
756 | { | 777 | { |
757 | struct at91_priv *priv = netdev_priv(dev); | 778 | struct at91_priv *priv = netdev_priv(dev); |
758 | u32 reg_idr, reg_ier, reg_ecr; | 779 | u32 reg_idr = 0, reg_ier = 0; |
759 | u8 tec, rec; | 780 | struct can_berr_counter bec; |
760 | 781 | ||
761 | reg_ecr = at91_read(priv, AT91_ECR); | 782 | at91_get_berr_counter(dev, &bec); |
762 | rec = reg_ecr & 0xff; | ||
763 | tec = reg_ecr >> 16; | ||
764 | 783 | ||
765 | switch (priv->can.state) { | 784 | switch (priv->can.state) { |
766 | case CAN_STATE_ERROR_ACTIVE: | 785 | case CAN_STATE_ERROR_ACTIVE: |
@@ -771,11 +790,11 @@ static void at91_irq_err_state(struct net_device *dev, | |||
771 | */ | 790 | */ |
772 | if (new_state >= CAN_STATE_ERROR_WARNING && | 791 | if (new_state >= CAN_STATE_ERROR_WARNING && |
773 | new_state <= CAN_STATE_BUS_OFF) { | 792 | new_state <= CAN_STATE_BUS_OFF) { |
774 | dev_dbg(dev->dev.parent, "Error Warning IRQ\n"); | 793 | netdev_dbg(dev, "Error Warning IRQ\n"); |
775 | priv->can.can_stats.error_warning++; | 794 | priv->can.can_stats.error_warning++; |
776 | 795 | ||
777 | cf->can_id |= CAN_ERR_CRTL; | 796 | cf->can_id |= CAN_ERR_CRTL; |
778 | cf->data[1] = (tec > rec) ? | 797 | cf->data[1] = (bec.txerr > bec.rxerr) ? |
779 | CAN_ERR_CRTL_TX_WARNING : | 798 | CAN_ERR_CRTL_TX_WARNING : |
780 | CAN_ERR_CRTL_RX_WARNING; | 799 | CAN_ERR_CRTL_RX_WARNING; |
781 | } | 800 | } |
@@ -787,11 +806,11 @@ static void at91_irq_err_state(struct net_device *dev, | |||
787 | */ | 806 | */ |
788 | if (new_state >= CAN_STATE_ERROR_PASSIVE && | 807 | if (new_state >= CAN_STATE_ERROR_PASSIVE && |
789 | new_state <= CAN_STATE_BUS_OFF) { | 808 | new_state <= CAN_STATE_BUS_OFF) { |
790 | dev_dbg(dev->dev.parent, "Error Passive IRQ\n"); | 809 | netdev_dbg(dev, "Error Passive IRQ\n"); |
791 | priv->can.can_stats.error_passive++; | 810 | priv->can.can_stats.error_passive++; |
792 | 811 | ||
793 | cf->can_id |= CAN_ERR_CRTL; | 812 | cf->can_id |= CAN_ERR_CRTL; |
794 | cf->data[1] = (tec > rec) ? | 813 | cf->data[1] = (bec.txerr > bec.rxerr) ? |
795 | CAN_ERR_CRTL_TX_PASSIVE : | 814 | CAN_ERR_CRTL_TX_PASSIVE : |
796 | CAN_ERR_CRTL_RX_PASSIVE; | 815 | CAN_ERR_CRTL_RX_PASSIVE; |
797 | } | 816 | } |
@@ -804,7 +823,7 @@ static void at91_irq_err_state(struct net_device *dev, | |||
804 | if (new_state <= CAN_STATE_ERROR_PASSIVE) { | 823 | if (new_state <= CAN_STATE_ERROR_PASSIVE) { |
805 | cf->can_id |= CAN_ERR_RESTARTED; | 824 | cf->can_id |= CAN_ERR_RESTARTED; |
806 | 825 | ||
807 | dev_dbg(dev->dev.parent, "restarted\n"); | 826 | netdev_dbg(dev, "restarted\n"); |
808 | priv->can.can_stats.restarts++; | 827 | priv->can.can_stats.restarts++; |
809 | 828 | ||
810 | netif_carrier_on(dev); | 829 | netif_carrier_on(dev); |
@@ -825,7 +844,7 @@ static void at91_irq_err_state(struct net_device *dev, | |||
825 | * circumstances. so just enable AT91_IRQ_ERRP, thus | 844 | * circumstances. so just enable AT91_IRQ_ERRP, thus |
826 | * the "fallthrough" | 845 | * the "fallthrough" |
827 | */ | 846 | */ |
828 | dev_dbg(dev->dev.parent, "Error Active\n"); | 847 | netdev_dbg(dev, "Error Active\n"); |
829 | cf->can_id |= CAN_ERR_PROT; | 848 | cf->can_id |= CAN_ERR_PROT; |
830 | cf->data[2] = CAN_ERR_PROT_ACTIVE; | 849 | cf->data[2] = CAN_ERR_PROT_ACTIVE; |
831 | case CAN_STATE_ERROR_WARNING: /* fallthrough */ | 850 | case CAN_STATE_ERROR_WARNING: /* fallthrough */ |
@@ -843,7 +862,7 @@ static void at91_irq_err_state(struct net_device *dev, | |||
843 | 862 | ||
844 | cf->can_id |= CAN_ERR_BUSOFF; | 863 | cf->can_id |= CAN_ERR_BUSOFF; |
845 | 864 | ||
846 | dev_dbg(dev->dev.parent, "bus-off\n"); | 865 | netdev_dbg(dev, "bus-off\n"); |
847 | netif_carrier_off(dev); | 866 | netif_carrier_off(dev); |
848 | priv->can.can_stats.bus_off++; | 867 | priv->can.can_stats.bus_off++; |
849 | 868 | ||
@@ -881,7 +900,7 @@ static void at91_irq_err(struct net_device *dev) | |||
881 | else if (likely(reg_sr & AT91_IRQ_ERRA)) | 900 | else if (likely(reg_sr & AT91_IRQ_ERRA)) |
882 | new_state = CAN_STATE_ERROR_ACTIVE; | 901 | new_state = CAN_STATE_ERROR_ACTIVE; |
883 | else { | 902 | else { |
884 | dev_err(dev->dev.parent, "BUG! hardware in undefined state\n"); | 903 | netdev_err(dev, "BUG! hardware in undefined state\n"); |
885 | return; | 904 | return; |
886 | } | 905 | } |
887 | 906 | ||
@@ -1018,7 +1037,7 @@ static const struct net_device_ops at91_netdev_ops = { | |||
1018 | .ndo_start_xmit = at91_start_xmit, | 1037 | .ndo_start_xmit = at91_start_xmit, |
1019 | }; | 1038 | }; |
1020 | 1039 | ||
1021 | static int __init at91_can_probe(struct platform_device *pdev) | 1040 | static int __devinit at91_can_probe(struct platform_device *pdev) |
1022 | { | 1041 | { |
1023 | struct net_device *dev; | 1042 | struct net_device *dev; |
1024 | struct at91_priv *priv; | 1043 | struct at91_priv *priv; |
@@ -1067,8 +1086,8 @@ static int __init at91_can_probe(struct platform_device *pdev) | |||
1067 | priv = netdev_priv(dev); | 1086 | priv = netdev_priv(dev); |
1068 | priv->can.clock.freq = clk_get_rate(clk); | 1087 | priv->can.clock.freq = clk_get_rate(clk); |
1069 | priv->can.bittiming_const = &at91_bittiming_const; | 1088 | priv->can.bittiming_const = &at91_bittiming_const; |
1070 | priv->can.do_set_bittiming = at91_set_bittiming; | ||
1071 | priv->can.do_set_mode = at91_set_mode; | 1089 | priv->can.do_set_mode = at91_set_mode; |
1090 | priv->can.do_get_berr_counter = at91_get_berr_counter; | ||
1072 | priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES; | 1091 | priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES; |
1073 | priv->reg_base = addr; | 1092 | priv->reg_base = addr; |
1074 | priv->dev = dev; | 1093 | priv->dev = dev; |
@@ -1092,7 +1111,7 @@ static int __init at91_can_probe(struct platform_device *pdev) | |||
1092 | return 0; | 1111 | return 0; |
1093 | 1112 | ||
1094 | exit_free: | 1113 | exit_free: |
1095 | free_netdev(dev); | 1114 | free_candev(dev); |
1096 | exit_iounmap: | 1115 | exit_iounmap: |
1097 | iounmap(addr); | 1116 | iounmap(addr); |
1098 | exit_release: | 1117 | exit_release: |
@@ -1113,8 +1132,6 @@ static int __devexit at91_can_remove(struct platform_device *pdev) | |||
1113 | 1132 | ||
1114 | platform_set_drvdata(pdev, NULL); | 1133 | platform_set_drvdata(pdev, NULL); |
1115 | 1134 | ||
1116 | free_netdev(dev); | ||
1117 | |||
1118 | iounmap(priv->reg_base); | 1135 | iounmap(priv->reg_base); |
1119 | 1136 | ||
1120 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1137 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -1122,6 +1139,8 @@ static int __devexit at91_can_remove(struct platform_device *pdev) | |||
1122 | 1139 | ||
1123 | clk_put(priv->clk); | 1140 | clk_put(priv->clk); |
1124 | 1141 | ||
1142 | free_candev(dev); | ||
1143 | |||
1125 | return 0; | 1144 | return 0; |
1126 | } | 1145 | } |
1127 | 1146 | ||
@@ -1129,21 +1148,19 @@ static struct platform_driver at91_can_driver = { | |||
1129 | .probe = at91_can_probe, | 1148 | .probe = at91_can_probe, |
1130 | .remove = __devexit_p(at91_can_remove), | 1149 | .remove = __devexit_p(at91_can_remove), |
1131 | .driver = { | 1150 | .driver = { |
1132 | .name = DRV_NAME, | 1151 | .name = KBUILD_MODNAME, |
1133 | .owner = THIS_MODULE, | 1152 | .owner = THIS_MODULE, |
1134 | }, | 1153 | }, |
1135 | }; | 1154 | }; |
1136 | 1155 | ||
1137 | static int __init at91_can_module_init(void) | 1156 | static int __init at91_can_module_init(void) |
1138 | { | 1157 | { |
1139 | printk(KERN_INFO "%s netdevice driver\n", DRV_NAME); | ||
1140 | return platform_driver_register(&at91_can_driver); | 1158 | return platform_driver_register(&at91_can_driver); |
1141 | } | 1159 | } |
1142 | 1160 | ||
1143 | static void __exit at91_can_module_exit(void) | 1161 | static void __exit at91_can_module_exit(void) |
1144 | { | 1162 | { |
1145 | platform_driver_unregister(&at91_can_driver); | 1163 | platform_driver_unregister(&at91_can_driver); |
1146 | printk(KERN_INFO "%s: driver removed\n", DRV_NAME); | ||
1147 | } | 1164 | } |
1148 | 1165 | ||
1149 | module_init(at91_can_module_init); | 1166 | module_init(at91_can_module_init); |
@@ -1151,4 +1168,4 @@ module_exit(at91_can_module_exit); | |||
1151 | 1168 | ||
1152 | MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>"); | 1169 | MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>"); |
1153 | MODULE_LICENSE("GPL v2"); | 1170 | MODULE_LICENSE("GPL v2"); |
1154 | MODULE_DESCRIPTION(DRV_NAME " CAN netdevice driver"); | 1171 | MODULE_DESCRIPTION(KBUILD_MODNAME " CAN netdevice driver"); |
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index ef443a090ba7..d4990568baee 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c | |||
@@ -992,7 +992,6 @@ static int __devexit flexcan_remove(struct platform_device *pdev) | |||
992 | 992 | ||
993 | unregister_flexcandev(dev); | 993 | unregister_flexcandev(dev); |
994 | platform_set_drvdata(pdev, NULL); | 994 | platform_set_drvdata(pdev, NULL); |
995 | free_candev(dev); | ||
996 | iounmap(priv->base); | 995 | iounmap(priv->base); |
997 | 996 | ||
998 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 997 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -1000,6 +999,8 @@ static int __devexit flexcan_remove(struct platform_device *pdev) | |||
1000 | 999 | ||
1001 | clk_put(priv->clk); | 1000 | clk_put(priv->clk); |
1002 | 1001 | ||
1002 | free_candev(dev); | ||
1003 | |||
1003 | return 0; | 1004 | return 0; |
1004 | } | 1005 | } |
1005 | 1006 | ||
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c index 6aadc3e32bd5..7ab534aee452 100644 --- a/drivers/net/can/mcp251x.c +++ b/drivers/net/can/mcp251x.c | |||
@@ -169,6 +169,7 @@ | |||
169 | # define RXBSIDH_SHIFT 3 | 169 | # define RXBSIDH_SHIFT 3 |
170 | #define RXBSIDL(n) (((n) * 0x10) + 0x60 + RXBSIDL_OFF) | 170 | #define RXBSIDL(n) (((n) * 0x10) + 0x60 + RXBSIDL_OFF) |
171 | # define RXBSIDL_IDE 0x08 | 171 | # define RXBSIDL_IDE 0x08 |
172 | # define RXBSIDL_SRR 0x10 | ||
172 | # define RXBSIDL_EID 3 | 173 | # define RXBSIDL_EID 3 |
173 | # define RXBSIDL_SHIFT 5 | 174 | # define RXBSIDL_SHIFT 5 |
174 | #define RXBEID8(n) (((n) * 0x10) + 0x60 + RXBEID8_OFF) | 175 | #define RXBEID8(n) (((n) * 0x10) + 0x60 + RXBEID8_OFF) |
@@ -475,6 +476,8 @@ static void mcp251x_hw_rx(struct spi_device *spi, int buf_idx) | |||
475 | frame->can_id = | 476 | frame->can_id = |
476 | (buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) | | 477 | (buf[RXBSIDH_OFF] << RXBSIDH_SHIFT) | |
477 | (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT); | 478 | (buf[RXBSIDL_OFF] >> RXBSIDL_SHIFT); |
479 | if (buf[RXBSIDL_OFF] & RXBSIDL_SRR) | ||
480 | frame->can_id |= CAN_RTR_FLAG; | ||
478 | } | 481 | } |
479 | /* Data length */ | 482 | /* Data length */ |
480 | frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK); | 483 | frame->can_dlc = get_can_dlc(buf[RXBDLC_OFF] & RXBDLC_LEN_MASK); |
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c new file mode 100644 index 000000000000..672718261c68 --- /dev/null +++ b/drivers/net/can/pch_can.c | |||
@@ -0,0 +1,1463 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 - 2010 Intel Corporation. | ||
3 | * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; version 2 of the License. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. | ||
17 | */ | ||
18 | |||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/pci.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/types.h> | ||
28 | #include <linux/errno.h> | ||
29 | #include <linux/netdevice.h> | ||
30 | #include <linux/skbuff.h> | ||
31 | #include <linux/can.h> | ||
32 | #include <linux/can/dev.h> | ||
33 | #include <linux/can/error.h> | ||
34 | |||
35 | #define MAX_MSG_OBJ 32 | ||
36 | #define MSG_OBJ_RX 0 /* The receive message object flag. */ | ||
37 | #define MSG_OBJ_TX 1 /* The transmit message object flag. */ | ||
38 | |||
39 | #define ENABLE 1 /* The enable flag */ | ||
40 | #define DISABLE 0 /* The disable flag */ | ||
41 | #define CAN_CTRL_INIT 0x0001 /* The INIT bit of CANCONT register. */ | ||
42 | #define CAN_CTRL_IE 0x0002 /* The IE bit of CAN control register */ | ||
43 | #define CAN_CTRL_IE_SIE_EIE 0x000e | ||
44 | #define CAN_CTRL_CCE 0x0040 | ||
45 | #define CAN_CTRL_OPT 0x0080 /* The OPT bit of CANCONT register. */ | ||
46 | #define CAN_OPT_SILENT 0x0008 /* The Silent bit of CANOPT reg. */ | ||
47 | #define CAN_OPT_LBACK 0x0010 /* The LoopBack bit of CANOPT reg. */ | ||
48 | #define CAN_CMASK_RX_TX_SET 0x00f3 | ||
49 | #define CAN_CMASK_RX_TX_GET 0x0073 | ||
50 | #define CAN_CMASK_ALL 0xff | ||
51 | #define CAN_CMASK_RDWR 0x80 | ||
52 | #define CAN_CMASK_ARB 0x20 | ||
53 | #define CAN_CMASK_CTRL 0x10 | ||
54 | #define CAN_CMASK_MASK 0x40 | ||
55 | #define CAN_CMASK_NEWDAT 0x04 | ||
56 | #define CAN_CMASK_CLRINTPND 0x08 | ||
57 | |||
58 | #define CAN_IF_MCONT_NEWDAT 0x8000 | ||
59 | #define CAN_IF_MCONT_INTPND 0x2000 | ||
60 | #define CAN_IF_MCONT_UMASK 0x1000 | ||
61 | #define CAN_IF_MCONT_TXIE 0x0800 | ||
62 | #define CAN_IF_MCONT_RXIE 0x0400 | ||
63 | #define CAN_IF_MCONT_RMTEN 0x0200 | ||
64 | #define CAN_IF_MCONT_TXRQXT 0x0100 | ||
65 | #define CAN_IF_MCONT_EOB 0x0080 | ||
66 | #define CAN_IF_MCONT_DLC 0x000f | ||
67 | #define CAN_IF_MCONT_MSGLOST 0x4000 | ||
68 | #define CAN_MASK2_MDIR_MXTD 0xc000 | ||
69 | #define CAN_ID2_DIR 0x2000 | ||
70 | #define CAN_ID_MSGVAL 0x8000 | ||
71 | |||
72 | #define CAN_STATUS_INT 0x8000 | ||
73 | #define CAN_IF_CREQ_BUSY 0x8000 | ||
74 | #define CAN_ID2_XTD 0x4000 | ||
75 | |||
76 | #define CAN_REC 0x00007f00 | ||
77 | #define CAN_TEC 0x000000ff | ||
78 | |||
79 | #define PCH_RX_OK 0x00000010 | ||
80 | #define PCH_TX_OK 0x00000008 | ||
81 | #define PCH_BUS_OFF 0x00000080 | ||
82 | #define PCH_EWARN 0x00000040 | ||
83 | #define PCH_EPASSIV 0x00000020 | ||
84 | #define PCH_LEC0 0x00000001 | ||
85 | #define PCH_LEC1 0x00000002 | ||
86 | #define PCH_LEC2 0x00000004 | ||
87 | #define PCH_LEC_ALL (PCH_LEC0 | PCH_LEC1 | PCH_LEC2) | ||
88 | #define PCH_STUF_ERR PCH_LEC0 | ||
89 | #define PCH_FORM_ERR PCH_LEC1 | ||
90 | #define PCH_ACK_ERR (PCH_LEC0 | PCH_LEC1) | ||
91 | #define PCH_BIT1_ERR PCH_LEC2 | ||
92 | #define PCH_BIT0_ERR (PCH_LEC0 | PCH_LEC2) | ||
93 | #define PCH_CRC_ERR (PCH_LEC1 | PCH_LEC2) | ||
94 | |||
95 | /* bit position of certain controller bits. */ | ||
96 | #define BIT_BITT_BRP 0 | ||
97 | #define BIT_BITT_SJW 6 | ||
98 | #define BIT_BITT_TSEG1 8 | ||
99 | #define BIT_BITT_TSEG2 12 | ||
100 | #define BIT_IF1_MCONT_RXIE 10 | ||
101 | #define BIT_IF2_MCONT_TXIE 11 | ||
102 | #define BIT_BRPE_BRPE 6 | ||
103 | #define BIT_ES_TXERRCNT 0 | ||
104 | #define BIT_ES_RXERRCNT 8 | ||
105 | #define MSK_BITT_BRP 0x3f | ||
106 | #define MSK_BITT_SJW 0xc0 | ||
107 | #define MSK_BITT_TSEG1 0xf00 | ||
108 | #define MSK_BITT_TSEG2 0x7000 | ||
109 | #define MSK_BRPE_BRPE 0x3c0 | ||
110 | #define MSK_BRPE_GET 0x0f | ||
111 | #define MSK_CTRL_IE_SIE_EIE 0x07 | ||
112 | #define MSK_MCONT_TXIE 0x08 | ||
113 | #define MSK_MCONT_RXIE 0x10 | ||
114 | #define PCH_CAN_NO_TX_BUFF 1 | ||
115 | #define COUNTER_LIMIT 10 | ||
116 | |||
117 | #define PCH_CAN_CLK 50000000 /* 50MHz */ | ||
118 | |||
119 | /* Define the number of message object. | ||
120 | * PCH CAN communications are done via Message RAM. | ||
121 | * The Message RAM consists of 32 message objects. */ | ||
122 | #define PCH_RX_OBJ_NUM 26 /* 1~ PCH_RX_OBJ_NUM is Rx*/ | ||
123 | #define PCH_TX_OBJ_NUM 6 /* PCH_RX_OBJ_NUM is RX ~ Tx*/ | ||
124 | #define PCH_OBJ_NUM (PCH_TX_OBJ_NUM + PCH_RX_OBJ_NUM) | ||
125 | |||
126 | #define PCH_FIFO_THRESH 16 | ||
127 | |||
128 | enum pch_can_mode { | ||
129 | PCH_CAN_ENABLE, | ||
130 | PCH_CAN_DISABLE, | ||
131 | PCH_CAN_ALL, | ||
132 | PCH_CAN_NONE, | ||
133 | PCH_CAN_STOP, | ||
134 | PCH_CAN_RUN | ||
135 | }; | ||
136 | |||
137 | struct pch_can_regs { | ||
138 | u32 cont; | ||
139 | u32 stat; | ||
140 | u32 errc; | ||
141 | u32 bitt; | ||
142 | u32 intr; | ||
143 | u32 opt; | ||
144 | u32 brpe; | ||
145 | u32 reserve1; | ||
146 | u32 if1_creq; | ||
147 | u32 if1_cmask; | ||
148 | u32 if1_mask1; | ||
149 | u32 if1_mask2; | ||
150 | u32 if1_id1; | ||
151 | u32 if1_id2; | ||
152 | u32 if1_mcont; | ||
153 | u32 if1_dataa1; | ||
154 | u32 if1_dataa2; | ||
155 | u32 if1_datab1; | ||
156 | u32 if1_datab2; | ||
157 | u32 reserve2; | ||
158 | u32 reserve3[12]; | ||
159 | u32 if2_creq; | ||
160 | u32 if2_cmask; | ||
161 | u32 if2_mask1; | ||
162 | u32 if2_mask2; | ||
163 | u32 if2_id1; | ||
164 | u32 if2_id2; | ||
165 | u32 if2_mcont; | ||
166 | u32 if2_dataa1; | ||
167 | u32 if2_dataa2; | ||
168 | u32 if2_datab1; | ||
169 | u32 if2_datab2; | ||
170 | u32 reserve4; | ||
171 | u32 reserve5[20]; | ||
172 | u32 treq1; | ||
173 | u32 treq2; | ||
174 | u32 reserve6[2]; | ||
175 | u32 reserve7[56]; | ||
176 | u32 reserve8[3]; | ||
177 | u32 srst; | ||
178 | }; | ||
179 | |||
180 | struct pch_can_priv { | ||
181 | struct can_priv can; | ||
182 | unsigned int can_num; | ||
183 | struct pci_dev *dev; | ||
184 | unsigned int tx_enable[MAX_MSG_OBJ]; | ||
185 | unsigned int rx_enable[MAX_MSG_OBJ]; | ||
186 | unsigned int rx_link[MAX_MSG_OBJ]; | ||
187 | unsigned int int_enables; | ||
188 | unsigned int int_stat; | ||
189 | struct net_device *ndev; | ||
190 | spinlock_t msgif_reg_lock; /* Message Interface Registers Access Lock*/ | ||
191 | unsigned int msg_obj[MAX_MSG_OBJ]; | ||
192 | struct pch_can_regs __iomem *regs; | ||
193 | struct napi_struct napi; | ||
194 | unsigned int tx_obj; /* Point next Tx Obj index */ | ||
195 | unsigned int use_msi; | ||
196 | }; | ||
197 | |||
198 | static struct can_bittiming_const pch_can_bittiming_const = { | ||
199 | .name = KBUILD_MODNAME, | ||
200 | .tseg1_min = 1, | ||
201 | .tseg1_max = 16, | ||
202 | .tseg2_min = 1, | ||
203 | .tseg2_max = 8, | ||
204 | .sjw_max = 4, | ||
205 | .brp_min = 1, | ||
206 | .brp_max = 1024, /* 6bit + extended 4bit */ | ||
207 | .brp_inc = 1, | ||
208 | }; | ||
209 | |||
210 | static DEFINE_PCI_DEVICE_TABLE(pch_pci_tbl) = { | ||
211 | {PCI_VENDOR_ID_INTEL, 0x8818, PCI_ANY_ID, PCI_ANY_ID,}, | ||
212 | {0,} | ||
213 | }; | ||
214 | MODULE_DEVICE_TABLE(pci, pch_pci_tbl); | ||
215 | |||
216 | static inline void pch_can_bit_set(void __iomem *addr, u32 mask) | ||
217 | { | ||
218 | iowrite32(ioread32(addr) | mask, addr); | ||
219 | } | ||
220 | |||
221 | static inline void pch_can_bit_clear(void __iomem *addr, u32 mask) | ||
222 | { | ||
223 | iowrite32(ioread32(addr) & ~mask, addr); | ||
224 | } | ||
225 | |||
226 | static void pch_can_set_run_mode(struct pch_can_priv *priv, | ||
227 | enum pch_can_mode mode) | ||
228 | { | ||
229 | switch (mode) { | ||
230 | case PCH_CAN_RUN: | ||
231 | pch_can_bit_clear(&priv->regs->cont, CAN_CTRL_INIT); | ||
232 | break; | ||
233 | |||
234 | case PCH_CAN_STOP: | ||
235 | pch_can_bit_set(&priv->regs->cont, CAN_CTRL_INIT); | ||
236 | break; | ||
237 | |||
238 | default: | ||
239 | dev_err(&priv->ndev->dev, "%s -> Invalid Mode.\n", __func__); | ||
240 | break; | ||
241 | } | ||
242 | } | ||
243 | |||
244 | static void pch_can_set_optmode(struct pch_can_priv *priv) | ||
245 | { | ||
246 | u32 reg_val = ioread32(&priv->regs->opt); | ||
247 | |||
248 | if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) | ||
249 | reg_val |= CAN_OPT_SILENT; | ||
250 | |||
251 | if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) | ||
252 | reg_val |= CAN_OPT_LBACK; | ||
253 | |||
254 | pch_can_bit_set(&priv->regs->cont, CAN_CTRL_OPT); | ||
255 | iowrite32(reg_val, &priv->regs->opt); | ||
256 | } | ||
257 | |||
258 | static void pch_can_set_int_custom(struct pch_can_priv *priv) | ||
259 | { | ||
260 | /* Clearing the IE, SIE and EIE bits of Can control register. */ | ||
261 | pch_can_bit_clear(&priv->regs->cont, CAN_CTRL_IE_SIE_EIE); | ||
262 | |||
263 | /* Appropriately setting them. */ | ||
264 | pch_can_bit_set(&priv->regs->cont, | ||
265 | ((priv->int_enables & MSK_CTRL_IE_SIE_EIE) << 1)); | ||
266 | } | ||
267 | |||
268 | /* This function retrieves interrupt enabled for the CAN device. */ | ||
269 | static void pch_can_get_int_enables(struct pch_can_priv *priv, u32 *enables) | ||
270 | { | ||
271 | /* Obtaining the status of IE, SIE and EIE interrupt bits. */ | ||
272 | *enables = ((ioread32(&priv->regs->cont) & CAN_CTRL_IE_SIE_EIE) >> 1); | ||
273 | } | ||
274 | |||
275 | static void pch_can_set_int_enables(struct pch_can_priv *priv, | ||
276 | enum pch_can_mode interrupt_no) | ||
277 | { | ||
278 | switch (interrupt_no) { | ||
279 | case PCH_CAN_ENABLE: | ||
280 | pch_can_bit_set(&priv->regs->cont, CAN_CTRL_IE); | ||
281 | break; | ||
282 | |||
283 | case PCH_CAN_DISABLE: | ||
284 | pch_can_bit_clear(&priv->regs->cont, CAN_CTRL_IE); | ||
285 | break; | ||
286 | |||
287 | case PCH_CAN_ALL: | ||
288 | pch_can_bit_set(&priv->regs->cont, CAN_CTRL_IE_SIE_EIE); | ||
289 | break; | ||
290 | |||
291 | case PCH_CAN_NONE: | ||
292 | pch_can_bit_clear(&priv->regs->cont, CAN_CTRL_IE_SIE_EIE); | ||
293 | break; | ||
294 | |||
295 | default: | ||
296 | dev_err(&priv->ndev->dev, "Invalid interrupt number.\n"); | ||
297 | break; | ||
298 | } | ||
299 | } | ||
300 | |||
301 | static void pch_can_check_if_busy(u32 __iomem *creq_addr, u32 num) | ||
302 | { | ||
303 | u32 counter = COUNTER_LIMIT; | ||
304 | u32 ifx_creq; | ||
305 | |||
306 | iowrite32(num, creq_addr); | ||
307 | while (counter) { | ||
308 | ifx_creq = ioread32(creq_addr) & CAN_IF_CREQ_BUSY; | ||
309 | if (!ifx_creq) | ||
310 | break; | ||
311 | counter--; | ||
312 | udelay(1); | ||
313 | } | ||
314 | if (!counter) | ||
315 | pr_err("%s:IF1 BUSY Flag is set forever.\n", __func__); | ||
316 | } | ||
317 | |||
318 | static void pch_can_set_rx_enable(struct pch_can_priv *priv, u32 buff_num, | ||
319 | u32 set) | ||
320 | { | ||
321 | unsigned long flags; | ||
322 | |||
323 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
324 | /* Reading the receive buffer data from RAM to Interface1 registers */ | ||
325 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if1_cmask); | ||
326 | pch_can_check_if_busy(&priv->regs->if1_creq, buff_num); | ||
327 | |||
328 | /* Setting the IF1MASK1 register to access MsgVal and RxIE bits */ | ||
329 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_ARB | CAN_CMASK_CTRL, | ||
330 | &priv->regs->if1_cmask); | ||
331 | |||
332 | if (set == ENABLE) { | ||
333 | /* Setting the MsgVal and RxIE bits */ | ||
334 | pch_can_bit_set(&priv->regs->if1_mcont, CAN_IF_MCONT_RXIE); | ||
335 | pch_can_bit_set(&priv->regs->if1_id2, CAN_ID_MSGVAL); | ||
336 | |||
337 | } else if (set == DISABLE) { | ||
338 | /* Resetting the MsgVal and RxIE bits */ | ||
339 | pch_can_bit_clear(&priv->regs->if1_mcont, CAN_IF_MCONT_RXIE); | ||
340 | pch_can_bit_clear(&priv->regs->if1_id2, CAN_ID_MSGVAL); | ||
341 | } | ||
342 | |||
343 | pch_can_check_if_busy(&priv->regs->if1_creq, buff_num); | ||
344 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
345 | } | ||
346 | |||
347 | static void pch_can_rx_enable_all(struct pch_can_priv *priv) | ||
348 | { | ||
349 | int i; | ||
350 | |||
351 | /* Traversing to obtain the object configured as receivers. */ | ||
352 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
353 | if (priv->msg_obj[i] == MSG_OBJ_RX) | ||
354 | pch_can_set_rx_enable(priv, i + 1, ENABLE); | ||
355 | } | ||
356 | } | ||
357 | |||
358 | static void pch_can_rx_disable_all(struct pch_can_priv *priv) | ||
359 | { | ||
360 | int i; | ||
361 | |||
362 | /* Traversing to obtain the object configured as receivers. */ | ||
363 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
364 | if (priv->msg_obj[i] == MSG_OBJ_RX) | ||
365 | pch_can_set_rx_enable(priv, i + 1, DISABLE); | ||
366 | } | ||
367 | } | ||
368 | |||
369 | static void pch_can_set_tx_enable(struct pch_can_priv *priv, u32 buff_num, | ||
370 | u32 set) | ||
371 | { | ||
372 | unsigned long flags; | ||
373 | |||
374 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
375 | /* Reading the Msg buffer from Message RAM to Interface2 registers. */ | ||
376 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if2_cmask); | ||
377 | pch_can_check_if_busy(&priv->regs->if2_creq, buff_num); | ||
378 | |||
379 | /* Setting the IF2CMASK register for accessing the | ||
380 | MsgVal and TxIE bits */ | ||
381 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_ARB | CAN_CMASK_CTRL, | ||
382 | &priv->regs->if2_cmask); | ||
383 | |||
384 | if (set == ENABLE) { | ||
385 | /* Setting the MsgVal and TxIE bits */ | ||
386 | pch_can_bit_set(&priv->regs->if2_mcont, CAN_IF_MCONT_TXIE); | ||
387 | pch_can_bit_set(&priv->regs->if2_id2, CAN_ID_MSGVAL); | ||
388 | } else if (set == DISABLE) { | ||
389 | /* Resetting the MsgVal and TxIE bits. */ | ||
390 | pch_can_bit_clear(&priv->regs->if2_mcont, CAN_IF_MCONT_TXIE); | ||
391 | pch_can_bit_clear(&priv->regs->if2_id2, CAN_ID_MSGVAL); | ||
392 | } | ||
393 | |||
394 | pch_can_check_if_busy(&priv->regs->if2_creq, buff_num); | ||
395 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
396 | } | ||
397 | |||
398 | static void pch_can_tx_enable_all(struct pch_can_priv *priv) | ||
399 | { | ||
400 | int i; | ||
401 | |||
402 | /* Traversing to obtain the object configured as transmit object. */ | ||
403 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
404 | if (priv->msg_obj[i] == MSG_OBJ_TX) | ||
405 | pch_can_set_tx_enable(priv, i + 1, ENABLE); | ||
406 | } | ||
407 | } | ||
408 | |||
409 | static void pch_can_tx_disable_all(struct pch_can_priv *priv) | ||
410 | { | ||
411 | int i; | ||
412 | |||
413 | /* Traversing to obtain the object configured as transmit object. */ | ||
414 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
415 | if (priv->msg_obj[i] == MSG_OBJ_TX) | ||
416 | pch_can_set_tx_enable(priv, i + 1, DISABLE); | ||
417 | } | ||
418 | } | ||
419 | |||
420 | static void pch_can_get_rx_enable(struct pch_can_priv *priv, u32 buff_num, | ||
421 | u32 *enable) | ||
422 | { | ||
423 | unsigned long flags; | ||
424 | |||
425 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
426 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if1_cmask); | ||
427 | pch_can_check_if_busy(&priv->regs->if1_creq, buff_num); | ||
428 | |||
429 | if (((ioread32(&priv->regs->if1_id2)) & CAN_ID_MSGVAL) && | ||
430 | ((ioread32(&priv->regs->if1_mcont)) & | ||
431 | CAN_IF_MCONT_RXIE)) | ||
432 | *enable = ENABLE; | ||
433 | else | ||
434 | *enable = DISABLE; | ||
435 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
436 | } | ||
437 | |||
438 | static void pch_can_get_tx_enable(struct pch_can_priv *priv, u32 buff_num, | ||
439 | u32 *enable) | ||
440 | { | ||
441 | unsigned long flags; | ||
442 | |||
443 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
444 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if2_cmask); | ||
445 | pch_can_check_if_busy(&priv->regs->if2_creq, buff_num); | ||
446 | |||
447 | if (((ioread32(&priv->regs->if2_id2)) & CAN_ID_MSGVAL) && | ||
448 | ((ioread32(&priv->regs->if2_mcont)) & | ||
449 | CAN_IF_MCONT_TXIE)) { | ||
450 | *enable = ENABLE; | ||
451 | } else { | ||
452 | *enable = DISABLE; | ||
453 | } | ||
454 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
455 | } | ||
456 | |||
457 | static int pch_can_int_pending(struct pch_can_priv *priv) | ||
458 | { | ||
459 | return ioread32(&priv->regs->intr) & 0xffff; | ||
460 | } | ||
461 | |||
462 | static void pch_can_set_rx_buffer_link(struct pch_can_priv *priv, | ||
463 | u32 buffer_num, u32 set) | ||
464 | { | ||
465 | unsigned long flags; | ||
466 | |||
467 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
468 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if1_cmask); | ||
469 | pch_can_check_if_busy(&priv->regs->if1_creq, buffer_num); | ||
470 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_CTRL, &priv->regs->if1_cmask); | ||
471 | if (set == ENABLE) | ||
472 | pch_can_bit_clear(&priv->regs->if1_mcont, CAN_IF_MCONT_EOB); | ||
473 | else | ||
474 | pch_can_bit_set(&priv->regs->if1_mcont, CAN_IF_MCONT_EOB); | ||
475 | |||
476 | pch_can_check_if_busy(&priv->regs->if1_creq, buffer_num); | ||
477 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
478 | } | ||
479 | |||
480 | static void pch_can_get_rx_buffer_link(struct pch_can_priv *priv, | ||
481 | u32 buffer_num, u32 *link) | ||
482 | { | ||
483 | unsigned long flags; | ||
484 | |||
485 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
486 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if1_cmask); | ||
487 | pch_can_check_if_busy(&priv->regs->if1_creq, buffer_num); | ||
488 | |||
489 | if (ioread32(&priv->regs->if1_mcont) & CAN_IF_MCONT_EOB) | ||
490 | *link = DISABLE; | ||
491 | else | ||
492 | *link = ENABLE; | ||
493 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
494 | } | ||
495 | |||
496 | static void pch_can_clear_buffers(struct pch_can_priv *priv) | ||
497 | { | ||
498 | int i; | ||
499 | |||
500 | for (i = 0; i < PCH_RX_OBJ_NUM; i++) { | ||
501 | iowrite32(CAN_CMASK_RX_TX_SET, &priv->regs->if1_cmask); | ||
502 | iowrite32(0xffff, &priv->regs->if1_mask1); | ||
503 | iowrite32(0xffff, &priv->regs->if1_mask2); | ||
504 | iowrite32(0x0, &priv->regs->if1_id1); | ||
505 | iowrite32(0x0, &priv->regs->if1_id2); | ||
506 | iowrite32(0x0, &priv->regs->if1_mcont); | ||
507 | iowrite32(0x0, &priv->regs->if1_dataa1); | ||
508 | iowrite32(0x0, &priv->regs->if1_dataa2); | ||
509 | iowrite32(0x0, &priv->regs->if1_datab1); | ||
510 | iowrite32(0x0, &priv->regs->if1_datab2); | ||
511 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_MASK | | ||
512 | CAN_CMASK_ARB | CAN_CMASK_CTRL, | ||
513 | &priv->regs->if1_cmask); | ||
514 | pch_can_check_if_busy(&priv->regs->if1_creq, i+1); | ||
515 | } | ||
516 | |||
517 | for (i = i; i < PCH_OBJ_NUM; i++) { | ||
518 | iowrite32(CAN_CMASK_RX_TX_SET, &priv->regs->if2_cmask); | ||
519 | iowrite32(0xffff, &priv->regs->if2_mask1); | ||
520 | iowrite32(0xffff, &priv->regs->if2_mask2); | ||
521 | iowrite32(0x0, &priv->regs->if2_id1); | ||
522 | iowrite32(0x0, &priv->regs->if2_id2); | ||
523 | iowrite32(0x0, &priv->regs->if2_mcont); | ||
524 | iowrite32(0x0, &priv->regs->if2_dataa1); | ||
525 | iowrite32(0x0, &priv->regs->if2_dataa2); | ||
526 | iowrite32(0x0, &priv->regs->if2_datab1); | ||
527 | iowrite32(0x0, &priv->regs->if2_datab2); | ||
528 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_MASK | | ||
529 | CAN_CMASK_ARB | CAN_CMASK_CTRL, | ||
530 | &priv->regs->if2_cmask); | ||
531 | pch_can_check_if_busy(&priv->regs->if2_creq, i+1); | ||
532 | } | ||
533 | } | ||
534 | |||
535 | static void pch_can_config_rx_tx_buffers(struct pch_can_priv *priv) | ||
536 | { | ||
537 | int i; | ||
538 | unsigned long flags; | ||
539 | |||
540 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
541 | |||
542 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
543 | if (priv->msg_obj[i] == MSG_OBJ_RX) { | ||
544 | iowrite32(CAN_CMASK_RX_TX_GET, | ||
545 | &priv->regs->if1_cmask); | ||
546 | pch_can_check_if_busy(&priv->regs->if1_creq, i+1); | ||
547 | |||
548 | iowrite32(0x0, &priv->regs->if1_id1); | ||
549 | iowrite32(0x0, &priv->regs->if1_id2); | ||
550 | |||
551 | pch_can_bit_set(&priv->regs->if1_mcont, | ||
552 | CAN_IF_MCONT_UMASK); | ||
553 | |||
554 | /* Set FIFO mode set to 0 except last Rx Obj*/ | ||
555 | pch_can_bit_clear(&priv->regs->if1_mcont, | ||
556 | CAN_IF_MCONT_EOB); | ||
557 | /* In case FIFO mode, Last EoB of Rx Obj must be 1 */ | ||
558 | if (i == (PCH_RX_OBJ_NUM - 1)) | ||
559 | pch_can_bit_set(&priv->regs->if1_mcont, | ||
560 | CAN_IF_MCONT_EOB); | ||
561 | |||
562 | iowrite32(0, &priv->regs->if1_mask1); | ||
563 | pch_can_bit_clear(&priv->regs->if1_mask2, | ||
564 | 0x1fff | CAN_MASK2_MDIR_MXTD); | ||
565 | |||
566 | /* Setting CMASK for writing */ | ||
567 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_MASK | | ||
568 | CAN_CMASK_ARB | CAN_CMASK_CTRL, | ||
569 | &priv->regs->if1_cmask); | ||
570 | |||
571 | pch_can_check_if_busy(&priv->regs->if1_creq, i+1); | ||
572 | } else if (priv->msg_obj[i] == MSG_OBJ_TX) { | ||
573 | iowrite32(CAN_CMASK_RX_TX_GET, | ||
574 | &priv->regs->if2_cmask); | ||
575 | pch_can_check_if_busy(&priv->regs->if2_creq, i+1); | ||
576 | |||
577 | /* Resetting DIR bit for reception */ | ||
578 | iowrite32(0x0, &priv->regs->if2_id1); | ||
579 | iowrite32(0x0, &priv->regs->if2_id2); | ||
580 | pch_can_bit_set(&priv->regs->if2_id2, CAN_ID2_DIR); | ||
581 | |||
582 | /* Setting EOB bit for transmitter */ | ||
583 | iowrite32(CAN_IF_MCONT_EOB, &priv->regs->if2_mcont); | ||
584 | |||
585 | pch_can_bit_set(&priv->regs->if2_mcont, | ||
586 | CAN_IF_MCONT_UMASK); | ||
587 | |||
588 | iowrite32(0, &priv->regs->if2_mask1); | ||
589 | pch_can_bit_clear(&priv->regs->if2_mask2, 0x1fff); | ||
590 | |||
591 | /* Setting CMASK for writing */ | ||
592 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_MASK | | ||
593 | CAN_CMASK_ARB | CAN_CMASK_CTRL, | ||
594 | &priv->regs->if2_cmask); | ||
595 | |||
596 | pch_can_check_if_busy(&priv->regs->if2_creq, i+1); | ||
597 | } | ||
598 | } | ||
599 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
600 | } | ||
601 | |||
602 | static void pch_can_init(struct pch_can_priv *priv) | ||
603 | { | ||
604 | /* Stopping the Can device. */ | ||
605 | pch_can_set_run_mode(priv, PCH_CAN_STOP); | ||
606 | |||
607 | /* Clearing all the message object buffers. */ | ||
608 | pch_can_clear_buffers(priv); | ||
609 | |||
610 | /* Configuring the respective message object as either rx/tx object. */ | ||
611 | pch_can_config_rx_tx_buffers(priv); | ||
612 | |||
613 | /* Enabling the interrupts. */ | ||
614 | pch_can_set_int_enables(priv, PCH_CAN_ALL); | ||
615 | } | ||
616 | |||
617 | static void pch_can_release(struct pch_can_priv *priv) | ||
618 | { | ||
619 | /* Stooping the CAN device. */ | ||
620 | pch_can_set_run_mode(priv, PCH_CAN_STOP); | ||
621 | |||
622 | /* Disabling the interrupts. */ | ||
623 | pch_can_set_int_enables(priv, PCH_CAN_NONE); | ||
624 | |||
625 | /* Disabling all the receive object. */ | ||
626 | pch_can_rx_disable_all(priv); | ||
627 | |||
628 | /* Disabling all the transmit object. */ | ||
629 | pch_can_tx_disable_all(priv); | ||
630 | } | ||
631 | |||
632 | /* This function clears interrupt(s) from the CAN device. */ | ||
633 | static void pch_can_int_clr(struct pch_can_priv *priv, u32 mask) | ||
634 | { | ||
635 | if (mask == CAN_STATUS_INT) { | ||
636 | ioread32(&priv->regs->stat); | ||
637 | return; | ||
638 | } | ||
639 | |||
640 | /* Clear interrupt for transmit object */ | ||
641 | if (priv->msg_obj[mask - 1] == MSG_OBJ_TX) { | ||
642 | /* Setting CMASK for clearing interrupts for | ||
643 | frame transmission. */ | ||
644 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_CTRL | CAN_CMASK_ARB, | ||
645 | &priv->regs->if2_cmask); | ||
646 | |||
647 | /* Resetting the ID registers. */ | ||
648 | pch_can_bit_set(&priv->regs->if2_id2, | ||
649 | CAN_ID2_DIR | (0x7ff << 2)); | ||
650 | iowrite32(0x0, &priv->regs->if2_id1); | ||
651 | |||
652 | /* Claring NewDat, TxRqst & IntPnd */ | ||
653 | pch_can_bit_clear(&priv->regs->if2_mcont, | ||
654 | CAN_IF_MCONT_NEWDAT | CAN_IF_MCONT_INTPND | | ||
655 | CAN_IF_MCONT_TXRQXT); | ||
656 | pch_can_check_if_busy(&priv->regs->if2_creq, mask); | ||
657 | } else if (priv->msg_obj[mask - 1] == MSG_OBJ_RX) { | ||
658 | /* Setting CMASK for clearing the reception interrupts. */ | ||
659 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_CTRL | CAN_CMASK_ARB, | ||
660 | &priv->regs->if1_cmask); | ||
661 | |||
662 | /* Clearing the Dir bit. */ | ||
663 | pch_can_bit_clear(&priv->regs->if1_id2, CAN_ID2_DIR); | ||
664 | |||
665 | /* Clearing NewDat & IntPnd */ | ||
666 | pch_can_bit_clear(&priv->regs->if1_mcont, | ||
667 | CAN_IF_MCONT_NEWDAT | CAN_IF_MCONT_INTPND); | ||
668 | |||
669 | pch_can_check_if_busy(&priv->regs->if1_creq, mask); | ||
670 | } | ||
671 | } | ||
672 | |||
673 | static int pch_can_get_buffer_status(struct pch_can_priv *priv) | ||
674 | { | ||
675 | return (ioread32(&priv->regs->treq1) & 0xffff) | | ||
676 | ((ioread32(&priv->regs->treq2) & 0xffff) << 16); | ||
677 | } | ||
678 | |||
679 | static void pch_can_reset(struct pch_can_priv *priv) | ||
680 | { | ||
681 | /* write to sw reset register */ | ||
682 | iowrite32(1, &priv->regs->srst); | ||
683 | iowrite32(0, &priv->regs->srst); | ||
684 | } | ||
685 | |||
686 | static void pch_can_error(struct net_device *ndev, u32 status) | ||
687 | { | ||
688 | struct sk_buff *skb; | ||
689 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
690 | struct can_frame *cf; | ||
691 | u32 errc; | ||
692 | struct net_device_stats *stats = &(priv->ndev->stats); | ||
693 | enum can_state state = priv->can.state; | ||
694 | |||
695 | skb = alloc_can_err_skb(ndev, &cf); | ||
696 | if (!skb) | ||
697 | return; | ||
698 | |||
699 | if (status & PCH_BUS_OFF) { | ||
700 | pch_can_tx_disable_all(priv); | ||
701 | pch_can_rx_disable_all(priv); | ||
702 | state = CAN_STATE_BUS_OFF; | ||
703 | cf->can_id |= CAN_ERR_BUSOFF; | ||
704 | can_bus_off(ndev); | ||
705 | pch_can_set_run_mode(priv, PCH_CAN_RUN); | ||
706 | dev_err(&ndev->dev, "%s -> Bus Off occurres.\n", __func__); | ||
707 | } | ||
708 | |||
709 | /* Warning interrupt. */ | ||
710 | if (status & PCH_EWARN) { | ||
711 | state = CAN_STATE_ERROR_WARNING; | ||
712 | priv->can.can_stats.error_warning++; | ||
713 | cf->can_id |= CAN_ERR_CRTL; | ||
714 | errc = ioread32(&priv->regs->errc); | ||
715 | if (((errc & CAN_REC) >> 8) > 96) | ||
716 | cf->data[1] |= CAN_ERR_CRTL_RX_WARNING; | ||
717 | if ((errc & CAN_TEC) > 96) | ||
718 | cf->data[1] |= CAN_ERR_CRTL_TX_WARNING; | ||
719 | dev_warn(&ndev->dev, | ||
720 | "%s -> Error Counter is more than 96.\n", __func__); | ||
721 | } | ||
722 | /* Error passive interrupt. */ | ||
723 | if (status & PCH_EPASSIV) { | ||
724 | priv->can.can_stats.error_passive++; | ||
725 | state = CAN_STATE_ERROR_PASSIVE; | ||
726 | cf->can_id |= CAN_ERR_CRTL; | ||
727 | errc = ioread32(&priv->regs->errc); | ||
728 | if (((errc & CAN_REC) >> 8) > 127) | ||
729 | cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE; | ||
730 | if ((errc & CAN_TEC) > 127) | ||
731 | cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE; | ||
732 | dev_err(&ndev->dev, | ||
733 | "%s -> CAN controller is ERROR PASSIVE .\n", __func__); | ||
734 | } | ||
735 | |||
736 | if (status & PCH_LEC_ALL) { | ||
737 | priv->can.can_stats.bus_error++; | ||
738 | stats->rx_errors++; | ||
739 | switch (status & PCH_LEC_ALL) { | ||
740 | case PCH_STUF_ERR: | ||
741 | cf->data[2] |= CAN_ERR_PROT_STUFF; | ||
742 | break; | ||
743 | case PCH_FORM_ERR: | ||
744 | cf->data[2] |= CAN_ERR_PROT_FORM; | ||
745 | break; | ||
746 | case PCH_ACK_ERR: | ||
747 | cf->data[2] |= CAN_ERR_PROT_LOC_ACK | | ||
748 | CAN_ERR_PROT_LOC_ACK_DEL; | ||
749 | break; | ||
750 | case PCH_BIT1_ERR: | ||
751 | case PCH_BIT0_ERR: | ||
752 | cf->data[2] |= CAN_ERR_PROT_BIT; | ||
753 | break; | ||
754 | case PCH_CRC_ERR: | ||
755 | cf->data[2] |= CAN_ERR_PROT_LOC_CRC_SEQ | | ||
756 | CAN_ERR_PROT_LOC_CRC_DEL; | ||
757 | break; | ||
758 | default: | ||
759 | iowrite32(status | PCH_LEC_ALL, &priv->regs->stat); | ||
760 | break; | ||
761 | } | ||
762 | |||
763 | } | ||
764 | |||
765 | priv->can.state = state; | ||
766 | netif_rx(skb); | ||
767 | |||
768 | stats->rx_packets++; | ||
769 | stats->rx_bytes += cf->can_dlc; | ||
770 | } | ||
771 | |||
772 | static irqreturn_t pch_can_interrupt(int irq, void *dev_id) | ||
773 | { | ||
774 | struct net_device *ndev = (struct net_device *)dev_id; | ||
775 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
776 | |||
777 | pch_can_set_int_enables(priv, PCH_CAN_NONE); | ||
778 | |||
779 | napi_schedule(&priv->napi); | ||
780 | |||
781 | return IRQ_HANDLED; | ||
782 | } | ||
783 | |||
784 | static int pch_can_rx_normal(struct net_device *ndev, u32 int_stat) | ||
785 | { | ||
786 | u32 reg; | ||
787 | canid_t id; | ||
788 | u32 ide; | ||
789 | u32 rtr; | ||
790 | int i, j, k; | ||
791 | int rcv_pkts = 0; | ||
792 | struct sk_buff *skb; | ||
793 | struct can_frame *cf; | ||
794 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
795 | struct net_device_stats *stats = &(priv->ndev->stats); | ||
796 | |||
797 | /* Reading the messsage object from the Message RAM */ | ||
798 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if1_cmask); | ||
799 | pch_can_check_if_busy(&priv->regs->if1_creq, int_stat); | ||
800 | |||
801 | /* Reading the MCONT register. */ | ||
802 | reg = ioread32(&priv->regs->if1_mcont); | ||
803 | reg &= 0xffff; | ||
804 | |||
805 | for (k = int_stat; !(reg & CAN_IF_MCONT_EOB); k++) { | ||
806 | /* If MsgLost bit set. */ | ||
807 | if (reg & CAN_IF_MCONT_MSGLOST) { | ||
808 | dev_err(&priv->ndev->dev, "Msg Obj is overwritten.\n"); | ||
809 | pch_can_bit_clear(&priv->regs->if1_mcont, | ||
810 | CAN_IF_MCONT_MSGLOST); | ||
811 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_CTRL, | ||
812 | &priv->regs->if1_cmask); | ||
813 | pch_can_check_if_busy(&priv->regs->if1_creq, k); | ||
814 | |||
815 | skb = alloc_can_err_skb(ndev, &cf); | ||
816 | if (!skb) | ||
817 | return -ENOMEM; | ||
818 | |||
819 | priv->can.can_stats.error_passive++; | ||
820 | priv->can.state = CAN_STATE_ERROR_PASSIVE; | ||
821 | cf->can_id |= CAN_ERR_CRTL; | ||
822 | cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW; | ||
823 | cf->data[2] |= CAN_ERR_PROT_OVERLOAD; | ||
824 | stats->rx_packets++; | ||
825 | stats->rx_bytes += cf->can_dlc; | ||
826 | |||
827 | netif_receive_skb(skb); | ||
828 | rcv_pkts++; | ||
829 | goto RX_NEXT; | ||
830 | } | ||
831 | if (!(reg & CAN_IF_MCONT_NEWDAT)) | ||
832 | goto RX_NEXT; | ||
833 | |||
834 | skb = alloc_can_skb(priv->ndev, &cf); | ||
835 | if (!skb) | ||
836 | return -ENOMEM; | ||
837 | |||
838 | /* Get Received data */ | ||
839 | ide = ((ioread32(&priv->regs->if1_id2)) & CAN_ID2_XTD) >> 14; | ||
840 | if (ide) { | ||
841 | id = (ioread32(&priv->regs->if1_id1) & 0xffff); | ||
842 | id |= (((ioread32(&priv->regs->if1_id2)) & | ||
843 | 0x1fff) << 16); | ||
844 | cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG; | ||
845 | } else { | ||
846 | id = (((ioread32(&priv->regs->if1_id2)) & | ||
847 | (CAN_SFF_MASK << 2)) >> 2); | ||
848 | cf->can_id = (id & CAN_SFF_MASK); | ||
849 | } | ||
850 | |||
851 | rtr = (ioread32(&priv->regs->if1_id2) & CAN_ID2_DIR); | ||
852 | if (rtr) { | ||
853 | cf->can_dlc = 0; | ||
854 | cf->can_id |= CAN_RTR_FLAG; | ||
855 | } else { | ||
856 | cf->can_dlc = ((ioread32(&priv->regs->if1_mcont)) & | ||
857 | 0x0f); | ||
858 | } | ||
859 | |||
860 | for (i = 0, j = 0; i < cf->can_dlc; j++) { | ||
861 | reg = ioread32(&priv->regs->if1_dataa1 + j*4); | ||
862 | cf->data[i++] = cpu_to_le32(reg & 0xff); | ||
863 | if (i == cf->can_dlc) | ||
864 | break; | ||
865 | cf->data[i++] = cpu_to_le32((reg >> 8) & 0xff); | ||
866 | } | ||
867 | |||
868 | netif_receive_skb(skb); | ||
869 | rcv_pkts++; | ||
870 | stats->rx_packets++; | ||
871 | stats->rx_bytes += cf->can_dlc; | ||
872 | |||
873 | if (k < PCH_FIFO_THRESH) { | ||
874 | iowrite32(CAN_CMASK_RDWR | CAN_CMASK_CTRL | | ||
875 | CAN_CMASK_ARB, &priv->regs->if1_cmask); | ||
876 | |||
877 | /* Clearing the Dir bit. */ | ||
878 | pch_can_bit_clear(&priv->regs->if1_id2, CAN_ID2_DIR); | ||
879 | |||
880 | /* Clearing NewDat & IntPnd */ | ||
881 | pch_can_bit_clear(&priv->regs->if1_mcont, | ||
882 | CAN_IF_MCONT_INTPND); | ||
883 | pch_can_check_if_busy(&priv->regs->if1_creq, k); | ||
884 | } else if (k > PCH_FIFO_THRESH) { | ||
885 | pch_can_int_clr(priv, k); | ||
886 | } else if (k == PCH_FIFO_THRESH) { | ||
887 | int cnt; | ||
888 | for (cnt = 0; cnt < PCH_FIFO_THRESH; cnt++) | ||
889 | pch_can_int_clr(priv, cnt+1); | ||
890 | } | ||
891 | RX_NEXT: | ||
892 | /* Reading the messsage object from the Message RAM */ | ||
893 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if1_cmask); | ||
894 | pch_can_check_if_busy(&priv->regs->if1_creq, k + 1); | ||
895 | reg = ioread32(&priv->regs->if1_mcont); | ||
896 | } | ||
897 | |||
898 | return rcv_pkts; | ||
899 | } | ||
900 | static int pch_can_rx_poll(struct napi_struct *napi, int quota) | ||
901 | { | ||
902 | struct net_device *ndev = napi->dev; | ||
903 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
904 | struct net_device_stats *stats = &(priv->ndev->stats); | ||
905 | u32 dlc; | ||
906 | u32 int_stat; | ||
907 | int rcv_pkts = 0; | ||
908 | u32 reg_stat; | ||
909 | unsigned long flags; | ||
910 | |||
911 | int_stat = pch_can_int_pending(priv); | ||
912 | if (!int_stat) | ||
913 | return 0; | ||
914 | |||
915 | INT_STAT: | ||
916 | if (int_stat == CAN_STATUS_INT) { | ||
917 | reg_stat = ioread32(&priv->regs->stat); | ||
918 | if (reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) { | ||
919 | if ((reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL) | ||
920 | pch_can_error(ndev, reg_stat); | ||
921 | } | ||
922 | |||
923 | if (reg_stat & PCH_TX_OK) { | ||
924 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
925 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if2_cmask); | ||
926 | pch_can_check_if_busy(&priv->regs->if2_creq, | ||
927 | ioread32(&priv->regs->intr)); | ||
928 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
929 | pch_can_bit_clear(&priv->regs->stat, PCH_TX_OK); | ||
930 | } | ||
931 | |||
932 | if (reg_stat & PCH_RX_OK) | ||
933 | pch_can_bit_clear(&priv->regs->stat, PCH_RX_OK); | ||
934 | |||
935 | int_stat = pch_can_int_pending(priv); | ||
936 | if (int_stat == CAN_STATUS_INT) | ||
937 | goto INT_STAT; | ||
938 | } | ||
939 | |||
940 | MSG_OBJ: | ||
941 | if ((int_stat >= 1) && (int_stat <= PCH_RX_OBJ_NUM)) { | ||
942 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
943 | rcv_pkts = pch_can_rx_normal(ndev, int_stat); | ||
944 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
945 | if (rcv_pkts < 0) | ||
946 | return 0; | ||
947 | } else if ((int_stat > PCH_RX_OBJ_NUM) && (int_stat <= PCH_OBJ_NUM)) { | ||
948 | if (priv->msg_obj[int_stat - 1] == MSG_OBJ_TX) { | ||
949 | /* Handle transmission interrupt */ | ||
950 | can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_NUM - 1); | ||
951 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
952 | iowrite32(CAN_CMASK_RX_TX_GET | CAN_CMASK_CLRINTPND, | ||
953 | &priv->regs->if2_cmask); | ||
954 | dlc = ioread32(&priv->regs->if2_mcont) & | ||
955 | CAN_IF_MCONT_DLC; | ||
956 | pch_can_check_if_busy(&priv->regs->if2_creq, int_stat); | ||
957 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
958 | if (dlc > 8) | ||
959 | dlc = 8; | ||
960 | stats->tx_bytes += dlc; | ||
961 | stats->tx_packets++; | ||
962 | } | ||
963 | } | ||
964 | |||
965 | int_stat = pch_can_int_pending(priv); | ||
966 | if (int_stat == CAN_STATUS_INT) | ||
967 | goto INT_STAT; | ||
968 | else if (int_stat >= 1 && int_stat <= 32) | ||
969 | goto MSG_OBJ; | ||
970 | |||
971 | napi_complete(napi); | ||
972 | pch_can_set_int_enables(priv, PCH_CAN_ALL); | ||
973 | |||
974 | return rcv_pkts; | ||
975 | } | ||
976 | |||
977 | static int pch_set_bittiming(struct net_device *ndev) | ||
978 | { | ||
979 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
980 | const struct can_bittiming *bt = &priv->can.bittiming; | ||
981 | u32 canbit; | ||
982 | u32 bepe; | ||
983 | u32 brp; | ||
984 | |||
985 | /* Setting the CCE bit for accessing the Can Timing register. */ | ||
986 | pch_can_bit_set(&priv->regs->cont, CAN_CTRL_CCE); | ||
987 | |||
988 | brp = (bt->tq) / (1000000000/PCH_CAN_CLK) - 1; | ||
989 | canbit = brp & MSK_BITT_BRP; | ||
990 | canbit |= (bt->sjw - 1) << BIT_BITT_SJW; | ||
991 | canbit |= (bt->phase_seg1 + bt->prop_seg - 1) << BIT_BITT_TSEG1; | ||
992 | canbit |= (bt->phase_seg2 - 1) << BIT_BITT_TSEG2; | ||
993 | bepe = (brp & MSK_BRPE_BRPE) >> BIT_BRPE_BRPE; | ||
994 | iowrite32(canbit, &priv->regs->bitt); | ||
995 | iowrite32(bepe, &priv->regs->brpe); | ||
996 | pch_can_bit_clear(&priv->regs->cont, CAN_CTRL_CCE); | ||
997 | |||
998 | return 0; | ||
999 | } | ||
1000 | |||
1001 | static void pch_can_start(struct net_device *ndev) | ||
1002 | { | ||
1003 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
1004 | |||
1005 | if (priv->can.state != CAN_STATE_STOPPED) | ||
1006 | pch_can_reset(priv); | ||
1007 | |||
1008 | pch_set_bittiming(ndev); | ||
1009 | pch_can_set_optmode(priv); | ||
1010 | |||
1011 | pch_can_tx_enable_all(priv); | ||
1012 | pch_can_rx_enable_all(priv); | ||
1013 | |||
1014 | /* Setting the CAN to run mode. */ | ||
1015 | pch_can_set_run_mode(priv, PCH_CAN_RUN); | ||
1016 | |||
1017 | priv->can.state = CAN_STATE_ERROR_ACTIVE; | ||
1018 | |||
1019 | return; | ||
1020 | } | ||
1021 | |||
1022 | static int pch_can_do_set_mode(struct net_device *ndev, enum can_mode mode) | ||
1023 | { | ||
1024 | int ret = 0; | ||
1025 | |||
1026 | switch (mode) { | ||
1027 | case CAN_MODE_START: | ||
1028 | pch_can_start(ndev); | ||
1029 | netif_wake_queue(ndev); | ||
1030 | break; | ||
1031 | default: | ||
1032 | ret = -EOPNOTSUPP; | ||
1033 | break; | ||
1034 | } | ||
1035 | |||
1036 | return ret; | ||
1037 | } | ||
1038 | |||
1039 | static int pch_can_open(struct net_device *ndev) | ||
1040 | { | ||
1041 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
1042 | int retval; | ||
1043 | |||
1044 | retval = pci_enable_msi(priv->dev); | ||
1045 | if (retval) { | ||
1046 | dev_info(&ndev->dev, "PCH CAN opened without MSI\n"); | ||
1047 | priv->use_msi = 0; | ||
1048 | } else { | ||
1049 | dev_info(&ndev->dev, "PCH CAN opened with MSI\n"); | ||
1050 | priv->use_msi = 1; | ||
1051 | } | ||
1052 | |||
1053 | /* Regsitering the interrupt. */ | ||
1054 | retval = request_irq(priv->dev->irq, pch_can_interrupt, IRQF_SHARED, | ||
1055 | ndev->name, ndev); | ||
1056 | if (retval) { | ||
1057 | dev_err(&ndev->dev, "request_irq failed.\n"); | ||
1058 | goto req_irq_err; | ||
1059 | } | ||
1060 | |||
1061 | /* Open common can device */ | ||
1062 | retval = open_candev(ndev); | ||
1063 | if (retval) { | ||
1064 | dev_err(ndev->dev.parent, "open_candev() failed %d\n", retval); | ||
1065 | goto err_open_candev; | ||
1066 | } | ||
1067 | |||
1068 | pch_can_init(priv); | ||
1069 | pch_can_start(ndev); | ||
1070 | napi_enable(&priv->napi); | ||
1071 | netif_start_queue(ndev); | ||
1072 | |||
1073 | return 0; | ||
1074 | |||
1075 | err_open_candev: | ||
1076 | free_irq(priv->dev->irq, ndev); | ||
1077 | req_irq_err: | ||
1078 | if (priv->use_msi) | ||
1079 | pci_disable_msi(priv->dev); | ||
1080 | |||
1081 | pch_can_release(priv); | ||
1082 | |||
1083 | return retval; | ||
1084 | } | ||
1085 | |||
1086 | static int pch_close(struct net_device *ndev) | ||
1087 | { | ||
1088 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
1089 | |||
1090 | netif_stop_queue(ndev); | ||
1091 | napi_disable(&priv->napi); | ||
1092 | pch_can_release(priv); | ||
1093 | free_irq(priv->dev->irq, ndev); | ||
1094 | if (priv->use_msi) | ||
1095 | pci_disable_msi(priv->dev); | ||
1096 | close_candev(ndev); | ||
1097 | priv->can.state = CAN_STATE_STOPPED; | ||
1098 | return 0; | ||
1099 | } | ||
1100 | |||
1101 | static int pch_get_msg_obj_sts(struct net_device *ndev, u32 obj_id) | ||
1102 | { | ||
1103 | u32 buffer_status = 0; | ||
1104 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
1105 | |||
1106 | /* Getting the message object status. */ | ||
1107 | buffer_status = (u32) pch_can_get_buffer_status(priv); | ||
1108 | |||
1109 | return buffer_status & obj_id; | ||
1110 | } | ||
1111 | |||
1112 | |||
1113 | static netdev_tx_t pch_xmit(struct sk_buff *skb, struct net_device *ndev) | ||
1114 | { | ||
1115 | int i, j; | ||
1116 | unsigned long flags; | ||
1117 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
1118 | struct can_frame *cf = (struct can_frame *)skb->data; | ||
1119 | int tx_buffer_avail = 0; | ||
1120 | |||
1121 | if (can_dropped_invalid_skb(ndev, skb)) | ||
1122 | return NETDEV_TX_OK; | ||
1123 | |||
1124 | if (priv->tx_obj == (PCH_OBJ_NUM + 1)) { /* Point tail Obj */ | ||
1125 | while (pch_get_msg_obj_sts(ndev, (((1 << PCH_TX_OBJ_NUM)-1) << | ||
1126 | PCH_RX_OBJ_NUM))) | ||
1127 | udelay(500); | ||
1128 | |||
1129 | priv->tx_obj = PCH_RX_OBJ_NUM + 1; /* Point head of Tx Obj ID */ | ||
1130 | tx_buffer_avail = priv->tx_obj; /* Point Tail of Tx Obj */ | ||
1131 | } else { | ||
1132 | tx_buffer_avail = priv->tx_obj; | ||
1133 | } | ||
1134 | priv->tx_obj++; | ||
1135 | |||
1136 | /* Attaining the lock. */ | ||
1137 | spin_lock_irqsave(&priv->msgif_reg_lock, flags); | ||
1138 | |||
1139 | /* Reading the Msg Obj from the Msg RAM to the Interface register. */ | ||
1140 | iowrite32(CAN_CMASK_RX_TX_GET, &priv->regs->if2_cmask); | ||
1141 | pch_can_check_if_busy(&priv->regs->if2_creq, tx_buffer_avail); | ||
1142 | |||
1143 | /* Setting the CMASK register. */ | ||
1144 | pch_can_bit_set(&priv->regs->if2_cmask, CAN_CMASK_ALL); | ||
1145 | |||
1146 | /* If ID extended is set. */ | ||
1147 | pch_can_bit_clear(&priv->regs->if2_id1, 0xffff); | ||
1148 | pch_can_bit_clear(&priv->regs->if2_id2, 0x1fff | CAN_ID2_XTD); | ||
1149 | if (cf->can_id & CAN_EFF_FLAG) { | ||
1150 | pch_can_bit_set(&priv->regs->if2_id1, cf->can_id & 0xffff); | ||
1151 | pch_can_bit_set(&priv->regs->if2_id2, | ||
1152 | ((cf->can_id >> 16) & 0x1fff) | CAN_ID2_XTD); | ||
1153 | } else { | ||
1154 | pch_can_bit_set(&priv->regs->if2_id1, 0); | ||
1155 | pch_can_bit_set(&priv->regs->if2_id2, | ||
1156 | (cf->can_id & CAN_SFF_MASK) << 2); | ||
1157 | } | ||
1158 | |||
1159 | /* If remote frame has to be transmitted.. */ | ||
1160 | if (cf->can_id & CAN_RTR_FLAG) | ||
1161 | pch_can_bit_clear(&priv->regs->if2_id2, CAN_ID2_DIR); | ||
1162 | |||
1163 | for (i = 0, j = 0; i < cf->can_dlc; j++) { | ||
1164 | iowrite32(le32_to_cpu(cf->data[i++]), | ||
1165 | (&priv->regs->if2_dataa1) + j*4); | ||
1166 | if (i == cf->can_dlc) | ||
1167 | break; | ||
1168 | iowrite32(le32_to_cpu(cf->data[i++] << 8), | ||
1169 | (&priv->regs->if2_dataa1) + j*4); | ||
1170 | } | ||
1171 | |||
1172 | can_put_echo_skb(skb, ndev, tx_buffer_avail - PCH_RX_OBJ_NUM - 1); | ||
1173 | |||
1174 | /* Updating the size of the data. */ | ||
1175 | pch_can_bit_clear(&priv->regs->if2_mcont, 0x0f); | ||
1176 | pch_can_bit_set(&priv->regs->if2_mcont, cf->can_dlc); | ||
1177 | |||
1178 | /* Clearing IntPend, NewDat & TxRqst */ | ||
1179 | pch_can_bit_clear(&priv->regs->if2_mcont, | ||
1180 | CAN_IF_MCONT_NEWDAT | CAN_IF_MCONT_INTPND | | ||
1181 | CAN_IF_MCONT_TXRQXT); | ||
1182 | |||
1183 | /* Setting NewDat, TxRqst bits */ | ||
1184 | pch_can_bit_set(&priv->regs->if2_mcont, | ||
1185 | CAN_IF_MCONT_NEWDAT | CAN_IF_MCONT_TXRQXT); | ||
1186 | |||
1187 | pch_can_check_if_busy(&priv->regs->if2_creq, tx_buffer_avail); | ||
1188 | |||
1189 | spin_unlock_irqrestore(&priv->msgif_reg_lock, flags); | ||
1190 | |||
1191 | return NETDEV_TX_OK; | ||
1192 | } | ||
1193 | |||
1194 | static const struct net_device_ops pch_can_netdev_ops = { | ||
1195 | .ndo_open = pch_can_open, | ||
1196 | .ndo_stop = pch_close, | ||
1197 | .ndo_start_xmit = pch_xmit, | ||
1198 | }; | ||
1199 | |||
1200 | static void __devexit pch_can_remove(struct pci_dev *pdev) | ||
1201 | { | ||
1202 | struct net_device *ndev = pci_get_drvdata(pdev); | ||
1203 | struct pch_can_priv *priv = netdev_priv(ndev); | ||
1204 | |||
1205 | unregister_candev(priv->ndev); | ||
1206 | free_candev(priv->ndev); | ||
1207 | pci_iounmap(pdev, priv->regs); | ||
1208 | pci_release_regions(pdev); | ||
1209 | pci_disable_device(pdev); | ||
1210 | pci_set_drvdata(pdev, NULL); | ||
1211 | pch_can_reset(priv); | ||
1212 | } | ||
1213 | |||
1214 | #ifdef CONFIG_PM | ||
1215 | static int pch_can_suspend(struct pci_dev *pdev, pm_message_t state) | ||
1216 | { | ||
1217 | int i; /* Counter variable. */ | ||
1218 | int retval; /* Return value. */ | ||
1219 | u32 buf_stat; /* Variable for reading the transmit buffer status. */ | ||
1220 | u32 counter = 0xFFFFFF; | ||
1221 | |||
1222 | struct net_device *dev = pci_get_drvdata(pdev); | ||
1223 | struct pch_can_priv *priv = netdev_priv(dev); | ||
1224 | |||
1225 | /* Stop the CAN controller */ | ||
1226 | pch_can_set_run_mode(priv, PCH_CAN_STOP); | ||
1227 | |||
1228 | /* Indicate that we are aboutto/in suspend */ | ||
1229 | priv->can.state = CAN_STATE_SLEEPING; | ||
1230 | |||
1231 | /* Waiting for all transmission to complete. */ | ||
1232 | while (counter) { | ||
1233 | buf_stat = pch_can_get_buffer_status(priv); | ||
1234 | if (!buf_stat) | ||
1235 | break; | ||
1236 | counter--; | ||
1237 | udelay(1); | ||
1238 | } | ||
1239 | if (!counter) | ||
1240 | dev_err(&pdev->dev, "%s -> Transmission time out.\n", __func__); | ||
1241 | |||
1242 | /* Save interrupt configuration and then disable them */ | ||
1243 | pch_can_get_int_enables(priv, &(priv->int_enables)); | ||
1244 | pch_can_set_int_enables(priv, PCH_CAN_DISABLE); | ||
1245 | |||
1246 | /* Save Tx buffer enable state */ | ||
1247 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
1248 | if (priv->msg_obj[i] == MSG_OBJ_TX) | ||
1249 | pch_can_get_tx_enable(priv, i + 1, | ||
1250 | &(priv->tx_enable[i])); | ||
1251 | } | ||
1252 | |||
1253 | /* Disable all Transmit buffers */ | ||
1254 | pch_can_tx_disable_all(priv); | ||
1255 | |||
1256 | /* Save Rx buffer enable state */ | ||
1257 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
1258 | if (priv->msg_obj[i] == MSG_OBJ_RX) { | ||
1259 | pch_can_get_rx_enable(priv, i + 1, | ||
1260 | &(priv->rx_enable[i])); | ||
1261 | pch_can_get_rx_buffer_link(priv, i + 1, | ||
1262 | &(priv->rx_link[i])); | ||
1263 | } | ||
1264 | } | ||
1265 | |||
1266 | /* Disable all Receive buffers */ | ||
1267 | pch_can_rx_disable_all(priv); | ||
1268 | retval = pci_save_state(pdev); | ||
1269 | if (retval) { | ||
1270 | dev_err(&pdev->dev, "pci_save_state failed.\n"); | ||
1271 | } else { | ||
1272 | pci_enable_wake(pdev, PCI_D3hot, 0); | ||
1273 | pci_disable_device(pdev); | ||
1274 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
1275 | } | ||
1276 | |||
1277 | return retval; | ||
1278 | } | ||
1279 | |||
1280 | static int pch_can_resume(struct pci_dev *pdev) | ||
1281 | { | ||
1282 | int i; /* Counter variable. */ | ||
1283 | int retval; /* Return variable. */ | ||
1284 | struct net_device *dev = pci_get_drvdata(pdev); | ||
1285 | struct pch_can_priv *priv = netdev_priv(dev); | ||
1286 | |||
1287 | pci_set_power_state(pdev, PCI_D0); | ||
1288 | pci_restore_state(pdev); | ||
1289 | retval = pci_enable_device(pdev); | ||
1290 | if (retval) { | ||
1291 | dev_err(&pdev->dev, "pci_enable_device failed.\n"); | ||
1292 | return retval; | ||
1293 | } | ||
1294 | |||
1295 | pci_enable_wake(pdev, PCI_D3hot, 0); | ||
1296 | |||
1297 | priv->can.state = CAN_STATE_ERROR_ACTIVE; | ||
1298 | |||
1299 | /* Disabling all interrupts. */ | ||
1300 | pch_can_set_int_enables(priv, PCH_CAN_DISABLE); | ||
1301 | |||
1302 | /* Setting the CAN device in Stop Mode. */ | ||
1303 | pch_can_set_run_mode(priv, PCH_CAN_STOP); | ||
1304 | |||
1305 | /* Configuring the transmit and receive buffers. */ | ||
1306 | pch_can_config_rx_tx_buffers(priv); | ||
1307 | |||
1308 | /* Restore the CAN state */ | ||
1309 | pch_set_bittiming(dev); | ||
1310 | |||
1311 | /* Listen/Active */ | ||
1312 | pch_can_set_optmode(priv); | ||
1313 | |||
1314 | /* Enabling the transmit buffer. */ | ||
1315 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
1316 | if (priv->msg_obj[i] == MSG_OBJ_TX) { | ||
1317 | pch_can_set_tx_enable(priv, i + 1, | ||
1318 | priv->tx_enable[i]); | ||
1319 | } | ||
1320 | } | ||
1321 | |||
1322 | /* Configuring the receive buffer and enabling them. */ | ||
1323 | for (i = 0; i < PCH_OBJ_NUM; i++) { | ||
1324 | if (priv->msg_obj[i] == MSG_OBJ_RX) { | ||
1325 | /* Restore buffer link */ | ||
1326 | pch_can_set_rx_buffer_link(priv, i + 1, | ||
1327 | priv->rx_link[i]); | ||
1328 | |||
1329 | /* Restore buffer enables */ | ||
1330 | pch_can_set_rx_enable(priv, i + 1, priv->rx_enable[i]); | ||
1331 | } | ||
1332 | } | ||
1333 | |||
1334 | /* Enable CAN Interrupts */ | ||
1335 | pch_can_set_int_custom(priv); | ||
1336 | |||
1337 | /* Restore Run Mode */ | ||
1338 | pch_can_set_run_mode(priv, PCH_CAN_RUN); | ||
1339 | |||
1340 | return retval; | ||
1341 | } | ||
1342 | #else | ||
1343 | #define pch_can_suspend NULL | ||
1344 | #define pch_can_resume NULL | ||
1345 | #endif | ||
1346 | |||
1347 | static int pch_can_get_berr_counter(const struct net_device *dev, | ||
1348 | struct can_berr_counter *bec) | ||
1349 | { | ||
1350 | struct pch_can_priv *priv = netdev_priv(dev); | ||
1351 | |||
1352 | bec->txerr = ioread32(&priv->regs->errc) & CAN_TEC; | ||
1353 | bec->rxerr = (ioread32(&priv->regs->errc) & CAN_REC) >> 8; | ||
1354 | |||
1355 | return 0; | ||
1356 | } | ||
1357 | |||
1358 | static int __devinit pch_can_probe(struct pci_dev *pdev, | ||
1359 | const struct pci_device_id *id) | ||
1360 | { | ||
1361 | struct net_device *ndev; | ||
1362 | struct pch_can_priv *priv; | ||
1363 | int rc; | ||
1364 | int index; | ||
1365 | void __iomem *addr; | ||
1366 | |||
1367 | rc = pci_enable_device(pdev); | ||
1368 | if (rc) { | ||
1369 | dev_err(&pdev->dev, "Failed pci_enable_device %d\n", rc); | ||
1370 | goto probe_exit_endev; | ||
1371 | } | ||
1372 | |||
1373 | rc = pci_request_regions(pdev, KBUILD_MODNAME); | ||
1374 | if (rc) { | ||
1375 | dev_err(&pdev->dev, "Failed pci_request_regions %d\n", rc); | ||
1376 | goto probe_exit_pcireq; | ||
1377 | } | ||
1378 | |||
1379 | addr = pci_iomap(pdev, 1, 0); | ||
1380 | if (!addr) { | ||
1381 | rc = -EIO; | ||
1382 | dev_err(&pdev->dev, "Failed pci_iomap\n"); | ||
1383 | goto probe_exit_ipmap; | ||
1384 | } | ||
1385 | |||
1386 | ndev = alloc_candev(sizeof(struct pch_can_priv), PCH_TX_OBJ_NUM); | ||
1387 | if (!ndev) { | ||
1388 | rc = -ENOMEM; | ||
1389 | dev_err(&pdev->dev, "Failed alloc_candev\n"); | ||
1390 | goto probe_exit_alloc_candev; | ||
1391 | } | ||
1392 | |||
1393 | priv = netdev_priv(ndev); | ||
1394 | priv->ndev = ndev; | ||
1395 | priv->regs = addr; | ||
1396 | priv->dev = pdev; | ||
1397 | priv->can.bittiming_const = &pch_can_bittiming_const; | ||
1398 | priv->can.do_set_mode = pch_can_do_set_mode; | ||
1399 | priv->can.do_get_berr_counter = pch_can_get_berr_counter; | ||
1400 | priv->can.ctrlmode_supported = CAN_CTRLMODE_LISTENONLY | | ||
1401 | CAN_CTRLMODE_LOOPBACK; | ||
1402 | priv->tx_obj = PCH_RX_OBJ_NUM + 1; /* Point head of Tx Obj */ | ||
1403 | |||
1404 | ndev->irq = pdev->irq; | ||
1405 | ndev->flags |= IFF_ECHO; | ||
1406 | |||
1407 | pci_set_drvdata(pdev, ndev); | ||
1408 | SET_NETDEV_DEV(ndev, &pdev->dev); | ||
1409 | ndev->netdev_ops = &pch_can_netdev_ops; | ||
1410 | |||
1411 | priv->can.clock.freq = PCH_CAN_CLK; /* Hz */ | ||
1412 | for (index = 0; index < PCH_RX_OBJ_NUM;) | ||
1413 | priv->msg_obj[index++] = MSG_OBJ_RX; | ||
1414 | |||
1415 | for (index = index; index < PCH_OBJ_NUM;) | ||
1416 | priv->msg_obj[index++] = MSG_OBJ_TX; | ||
1417 | |||
1418 | netif_napi_add(ndev, &priv->napi, pch_can_rx_poll, PCH_RX_OBJ_NUM); | ||
1419 | |||
1420 | rc = register_candev(ndev); | ||
1421 | if (rc) { | ||
1422 | dev_err(&pdev->dev, "Failed register_candev %d\n", rc); | ||
1423 | goto probe_exit_reg_candev; | ||
1424 | } | ||
1425 | |||
1426 | return 0; | ||
1427 | |||
1428 | probe_exit_reg_candev: | ||
1429 | free_candev(ndev); | ||
1430 | probe_exit_alloc_candev: | ||
1431 | pci_iounmap(pdev, addr); | ||
1432 | probe_exit_ipmap: | ||
1433 | pci_release_regions(pdev); | ||
1434 | probe_exit_pcireq: | ||
1435 | pci_disable_device(pdev); | ||
1436 | probe_exit_endev: | ||
1437 | return rc; | ||
1438 | } | ||
1439 | |||
1440 | static struct pci_driver pch_can_pci_driver = { | ||
1441 | .name = "pch_can", | ||
1442 | .id_table = pch_pci_tbl, | ||
1443 | .probe = pch_can_probe, | ||
1444 | .remove = __devexit_p(pch_can_remove), | ||
1445 | .suspend = pch_can_suspend, | ||
1446 | .resume = pch_can_resume, | ||
1447 | }; | ||
1448 | |||
1449 | static int __init pch_can_pci_init(void) | ||
1450 | { | ||
1451 | return pci_register_driver(&pch_can_pci_driver); | ||
1452 | } | ||
1453 | module_init(pch_can_pci_init); | ||
1454 | |||
1455 | static void __exit pch_can_pci_exit(void) | ||
1456 | { | ||
1457 | pci_unregister_driver(&pch_can_pci_driver); | ||
1458 | } | ||
1459 | module_exit(pch_can_pci_exit); | ||
1460 | |||
1461 | MODULE_DESCRIPTION("Controller Area Network Driver"); | ||
1462 | MODULE_LICENSE("GPL v2"); | ||
1463 | MODULE_VERSION("0.94"); | ||
diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig index ae3505afd682..6fdc031daaae 100644 --- a/drivers/net/can/sja1000/Kconfig +++ b/drivers/net/can/sja1000/Kconfig | |||
@@ -58,4 +58,16 @@ config CAN_PLX_PCI | |||
58 | - esd CAN-PCIe/2000 | 58 | - esd CAN-PCIe/2000 |
59 | - Marathon CAN-bus-PCI card (http://www.marathon.ru/) | 59 | - Marathon CAN-bus-PCI card (http://www.marathon.ru/) |
60 | - TEWS TECHNOLOGIES TPMC810 card (http://www.tews.com/) | 60 | - TEWS TECHNOLOGIES TPMC810 card (http://www.tews.com/) |
61 | |||
62 | config CAN_TSCAN1 | ||
63 | tristate "TS-CAN1 PC104 boards" | ||
64 | depends on ISA | ||
65 | help | ||
66 | This driver is for Technologic Systems' TSCAN-1 PC104 boards. | ||
67 | http://www.embeddedarm.com/products/board-detail.php?product=TS-CAN1 | ||
68 | The driver supports multiple boards and automatically configures them: | ||
69 | PLD IO base addresses are read from jumpers JP1 and JP2, | ||
70 | IRQ numbers are read from jumpers JP4 and JP5, | ||
71 | SJA1000 IO base addresses are chosen heuristically (first that works). | ||
72 | |||
61 | endif | 73 | endif |
diff --git a/drivers/net/can/sja1000/Makefile b/drivers/net/can/sja1000/Makefile index ce924553995d..2c591eb321c7 100644 --- a/drivers/net/can/sja1000/Makefile +++ b/drivers/net/can/sja1000/Makefile | |||
@@ -9,5 +9,6 @@ obj-$(CONFIG_CAN_SJA1000_OF_PLATFORM) += sja1000_of_platform.o | |||
9 | obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o | 9 | obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o |
10 | obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o | 10 | obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o |
11 | obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o | 11 | obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o |
12 | obj-$(CONFIG_CAN_TSCAN1) += tscan1.o | ||
12 | 13 | ||
13 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG | 14 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG |
diff --git a/drivers/net/can/sja1000/tscan1.c b/drivers/net/can/sja1000/tscan1.c new file mode 100644 index 000000000000..9756099a883a --- /dev/null +++ b/drivers/net/can/sja1000/tscan1.c | |||
@@ -0,0 +1,216 @@ | |||
1 | /* | ||
2 | * tscan1.c: driver for Technologic Systems TS-CAN1 PC104 boards | ||
3 | * | ||
4 | * Copyright 2010 Andre B. Oliveira | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or | ||
7 | * modify it under the terms of the GNU General Public License | ||
8 | * as published by the Free Software Foundation; either version 2 | ||
9 | * of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
18 | */ | ||
19 | |||
20 | /* | ||
21 | * References: | ||
22 | * - Getting started with TS-CAN1, Technologic Systems, Jun 2009 | ||
23 | * http://www.embeddedarm.com/documentation/ts-can1-manual.pdf | ||
24 | */ | ||
25 | |||
26 | #include <linux/init.h> | ||
27 | #include <linux/io.h> | ||
28 | #include <linux/ioport.h> | ||
29 | #include <linux/isa.h> | ||
30 | #include <linux/module.h> | ||
31 | #include <linux/netdevice.h> | ||
32 | #include "sja1000.h" | ||
33 | |||
34 | MODULE_DESCRIPTION("Driver for Technologic Systems TS-CAN1 PC104 boards"); | ||
35 | MODULE_AUTHOR("Andre B. Oliveira <anbadeol@gmail.com>"); | ||
36 | MODULE_LICENSE("GPL"); | ||
37 | |||
38 | /* Maximum number of boards (one in each JP1:JP2 setting of IO address) */ | ||
39 | #define TSCAN1_MAXDEV 4 | ||
40 | |||
41 | /* PLD registers address offsets */ | ||
42 | #define TSCAN1_ID1 0 | ||
43 | #define TSCAN1_ID2 1 | ||
44 | #define TSCAN1_VERSION 2 | ||
45 | #define TSCAN1_LED 3 | ||
46 | #define TSCAN1_PAGE 4 | ||
47 | #define TSCAN1_MODE 5 | ||
48 | #define TSCAN1_JUMPERS 6 | ||
49 | |||
50 | /* PLD board identifier registers magic values */ | ||
51 | #define TSCAN1_ID1_VALUE 0xf6 | ||
52 | #define TSCAN1_ID2_VALUE 0xb9 | ||
53 | |||
54 | /* PLD mode register SJA1000 IO enable bit */ | ||
55 | #define TSCAN1_MODE_ENABLE 0x40 | ||
56 | |||
57 | /* PLD jumpers register bits */ | ||
58 | #define TSCAN1_JP4 0x10 | ||
59 | #define TSCAN1_JP5 0x20 | ||
60 | |||
61 | /* PLD IO base addresses start */ | ||
62 | #define TSCAN1_PLD_ADDRESS 0x150 | ||
63 | |||
64 | /* PLD register space size */ | ||
65 | #define TSCAN1_PLD_SIZE 8 | ||
66 | |||
67 | /* SJA1000 register space size */ | ||
68 | #define TSCAN1_SJA1000_SIZE 32 | ||
69 | |||
70 | /* SJA1000 crystal frequency (16MHz) */ | ||
71 | #define TSCAN1_SJA1000_XTAL 16000000 | ||
72 | |||
73 | /* SJA1000 IO base addresses */ | ||
74 | static const unsigned short tscan1_sja1000_addresses[] __devinitconst = { | ||
75 | 0x100, 0x120, 0x180, 0x1a0, 0x200, 0x240, 0x280, 0x320 | ||
76 | }; | ||
77 | |||
78 | /* Read SJA1000 register */ | ||
79 | static u8 tscan1_read(const struct sja1000_priv *priv, int reg) | ||
80 | { | ||
81 | return inb((unsigned long)priv->reg_base + reg); | ||
82 | } | ||
83 | |||
84 | /* Write SJA1000 register */ | ||
85 | static void tscan1_write(const struct sja1000_priv *priv, int reg, u8 val) | ||
86 | { | ||
87 | outb(val, (unsigned long)priv->reg_base + reg); | ||
88 | } | ||
89 | |||
90 | /* Probe for a TS-CAN1 board with JP2:JP1 jumper setting ID */ | ||
91 | static int __devinit tscan1_probe(struct device *dev, unsigned id) | ||
92 | { | ||
93 | struct net_device *netdev; | ||
94 | struct sja1000_priv *priv; | ||
95 | unsigned long pld_base, sja1000_base; | ||
96 | int irq, i; | ||
97 | |||
98 | pld_base = TSCAN1_PLD_ADDRESS + id * TSCAN1_PLD_SIZE; | ||
99 | if (!request_region(pld_base, TSCAN1_PLD_SIZE, dev_name(dev))) | ||
100 | return -EBUSY; | ||
101 | |||
102 | if (inb(pld_base + TSCAN1_ID1) != TSCAN1_ID1_VALUE || | ||
103 | inb(pld_base + TSCAN1_ID2) != TSCAN1_ID2_VALUE) { | ||
104 | release_region(pld_base, TSCAN1_PLD_SIZE); | ||
105 | return -ENODEV; | ||
106 | } | ||
107 | |||
108 | switch (inb(pld_base + TSCAN1_JUMPERS) & (TSCAN1_JP4 | TSCAN1_JP5)) { | ||
109 | case TSCAN1_JP4: | ||
110 | irq = 6; | ||
111 | break; | ||
112 | case TSCAN1_JP5: | ||
113 | irq = 7; | ||
114 | break; | ||
115 | case TSCAN1_JP4 | TSCAN1_JP5: | ||
116 | irq = 5; | ||
117 | break; | ||
118 | default: | ||
119 | dev_err(dev, "invalid JP4:JP5 setting (no IRQ)\n"); | ||
120 | release_region(pld_base, TSCAN1_PLD_SIZE); | ||
121 | return -EINVAL; | ||
122 | } | ||
123 | |||
124 | netdev = alloc_sja1000dev(0); | ||
125 | if (!netdev) { | ||
126 | release_region(pld_base, TSCAN1_PLD_SIZE); | ||
127 | return -ENOMEM; | ||
128 | } | ||
129 | |||
130 | dev_set_drvdata(dev, netdev); | ||
131 | SET_NETDEV_DEV(netdev, dev); | ||
132 | |||
133 | netdev->base_addr = pld_base; | ||
134 | netdev->irq = irq; | ||
135 | |||
136 | priv = netdev_priv(netdev); | ||
137 | priv->read_reg = tscan1_read; | ||
138 | priv->write_reg = tscan1_write; | ||
139 | priv->can.clock.freq = TSCAN1_SJA1000_XTAL / 2; | ||
140 | priv->cdr = CDR_CBP | CDR_CLK_OFF; | ||
141 | priv->ocr = OCR_TX0_PUSHPULL; | ||
142 | |||
143 | /* Select the first SJA1000 IO address that is free and that works */ | ||
144 | for (i = 0; i < ARRAY_SIZE(tscan1_sja1000_addresses); i++) { | ||
145 | sja1000_base = tscan1_sja1000_addresses[i]; | ||
146 | if (!request_region(sja1000_base, TSCAN1_SJA1000_SIZE, | ||
147 | dev_name(dev))) | ||
148 | continue; | ||
149 | |||
150 | /* Set SJA1000 IO base address and enable it */ | ||
151 | outb(TSCAN1_MODE_ENABLE | i, pld_base + TSCAN1_MODE); | ||
152 | |||
153 | priv->reg_base = (void __iomem *)sja1000_base; | ||
154 | if (!register_sja1000dev(netdev)) { | ||
155 | /* SJA1000 probe succeeded; turn LED off and return */ | ||
156 | outb(0, pld_base + TSCAN1_LED); | ||
157 | netdev_info(netdev, "TS-CAN1 at 0x%lx 0x%lx irq %d\n", | ||
158 | pld_base, sja1000_base, irq); | ||
159 | return 0; | ||
160 | } | ||
161 | |||
162 | /* SJA1000 probe failed; release and try next address */ | ||
163 | outb(0, pld_base + TSCAN1_MODE); | ||
164 | release_region(sja1000_base, TSCAN1_SJA1000_SIZE); | ||
165 | } | ||
166 | |||
167 | dev_err(dev, "failed to assign SJA1000 IO address\n"); | ||
168 | dev_set_drvdata(dev, NULL); | ||
169 | free_sja1000dev(netdev); | ||
170 | release_region(pld_base, TSCAN1_PLD_SIZE); | ||
171 | return -ENXIO; | ||
172 | } | ||
173 | |||
174 | static int __devexit tscan1_remove(struct device *dev, unsigned id /*unused*/) | ||
175 | { | ||
176 | struct net_device *netdev; | ||
177 | struct sja1000_priv *priv; | ||
178 | unsigned long pld_base, sja1000_base; | ||
179 | |||
180 | netdev = dev_get_drvdata(dev); | ||
181 | unregister_sja1000dev(netdev); | ||
182 | dev_set_drvdata(dev, NULL); | ||
183 | |||
184 | priv = netdev_priv(netdev); | ||
185 | pld_base = netdev->base_addr; | ||
186 | sja1000_base = (unsigned long)priv->reg_base; | ||
187 | |||
188 | outb(0, pld_base + TSCAN1_MODE); /* disable SJA1000 IO space */ | ||
189 | |||
190 | release_region(sja1000_base, TSCAN1_SJA1000_SIZE); | ||
191 | release_region(pld_base, TSCAN1_PLD_SIZE); | ||
192 | |||
193 | free_sja1000dev(netdev); | ||
194 | |||
195 | return 0; | ||
196 | } | ||
197 | |||
198 | static struct isa_driver tscan1_isa_driver = { | ||
199 | .probe = tscan1_probe, | ||
200 | .remove = __devexit_p(tscan1_remove), | ||
201 | .driver = { | ||
202 | .name = "tscan1", | ||
203 | }, | ||
204 | }; | ||
205 | |||
206 | static int __init tscan1_init(void) | ||
207 | { | ||
208 | return isa_register_driver(&tscan1_isa_driver, TSCAN1_MAXDEV); | ||
209 | } | ||
210 | module_init(tscan1_init); | ||
211 | |||
212 | static void __exit tscan1_exit(void) | ||
213 | { | ||
214 | isa_unregister_driver(&tscan1_isa_driver); | ||
215 | } | ||
216 | module_exit(tscan1_exit); | ||
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index a04ce6a5f637..046d846c652d 100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c | |||
@@ -1266,11 +1266,13 @@ static int cxgb_up(struct adapter *adap) | |||
1266 | } | 1266 | } |
1267 | 1267 | ||
1268 | if (!(adap->flags & QUEUES_BOUND)) { | 1268 | if (!(adap->flags & QUEUES_BOUND)) { |
1269 | err = bind_qsets(adap); | 1269 | int ret = bind_qsets(adap); |
1270 | if (err) { | 1270 | |
1271 | CH_ERR(adap, "failed to bind qsets, err %d\n", err); | 1271 | if (ret < 0) { |
1272 | CH_ERR(adap, "failed to bind qsets, err %d\n", ret); | ||
1272 | t3_intr_disable(adap); | 1273 | t3_intr_disable(adap); |
1273 | free_irq_resources(adap); | 1274 | free_irq_resources(adap); |
1275 | err = ret; | ||
1274 | goto out; | 1276 | goto out; |
1275 | } | 1277 | } |
1276 | adap->flags |= QUEUES_BOUND; | 1278 | adap->flags |= QUEUES_BOUND; |
@@ -3299,7 +3301,6 @@ static int __devinit init_one(struct pci_dev *pdev, | |||
3299 | pi->rx_offload = T3_RX_CSUM | T3_LRO; | 3301 | pi->rx_offload = T3_RX_CSUM | T3_LRO; |
3300 | pi->port_id = i; | 3302 | pi->port_id = i; |
3301 | netif_carrier_off(netdev); | 3303 | netif_carrier_off(netdev); |
3302 | netif_tx_stop_all_queues(netdev); | ||
3303 | netdev->irq = pdev->irq; | 3304 | netdev->irq = pdev->irq; |
3304 | netdev->mem_start = mmio_start; | 3305 | netdev->mem_start = mmio_start; |
3305 | netdev->mem_end = mmio_start + mmio_len - 1; | 3306 | netdev->mem_end = mmio_start + mmio_len - 1; |
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c index 5d72bda54389..f9f6645b2e61 100644 --- a/drivers/net/cxgb3/sge.c +++ b/drivers/net/cxgb3/sge.c | |||
@@ -296,8 +296,10 @@ static void free_tx_desc(struct adapter *adapter, struct sge_txq *q, | |||
296 | if (d->skb) { /* an SGL is present */ | 296 | if (d->skb) { /* an SGL is present */ |
297 | if (need_unmap) | 297 | if (need_unmap) |
298 | unmap_skb(d->skb, q, cidx, pdev); | 298 | unmap_skb(d->skb, q, cidx, pdev); |
299 | if (d->eop) | 299 | if (d->eop) { |
300 | kfree_skb(d->skb); | 300 | kfree_skb(d->skb); |
301 | d->skb = NULL; | ||
302 | } | ||
301 | } | 303 | } |
302 | ++d; | 304 | ++d; |
303 | if (++cidx == q->size) { | 305 | if (++cidx == q->size) { |
diff --git a/drivers/net/cxgb4/cxgb4.h b/drivers/net/cxgb4/cxgb4.h index eaa49e4119f1..3d4253d311eb 100644 --- a/drivers/net/cxgb4/cxgb4.h +++ b/drivers/net/cxgb4/cxgb4.h | |||
@@ -281,7 +281,6 @@ struct sge_rspq; | |||
281 | 281 | ||
282 | struct port_info { | 282 | struct port_info { |
283 | struct adapter *adapter; | 283 | struct adapter *adapter; |
284 | struct vlan_group *vlan_grp; | ||
285 | u16 viid; | 284 | u16 viid; |
286 | s16 xact_addr_filt; /* index of exact MAC address filter */ | 285 | s16 xact_addr_filt; /* index of exact MAC address filter */ |
287 | u16 rss_size; /* size of VI's RSS table slice */ | 286 | u16 rss_size; /* size of VI's RSS table slice */ |
diff --git a/drivers/net/cxgb4/cxgb4_main.c b/drivers/net/cxgb4/cxgb4_main.c index 87054e0a5746..f50bc98310f8 100644 --- a/drivers/net/cxgb4/cxgb4_main.c +++ b/drivers/net/cxgb4/cxgb4_main.c | |||
@@ -403,7 +403,7 @@ static int link_start(struct net_device *dev) | |||
403 | * that step explicitly. | 403 | * that step explicitly. |
404 | */ | 404 | */ |
405 | ret = t4_set_rxmode(pi->adapter, mb, pi->viid, dev->mtu, -1, -1, -1, | 405 | ret = t4_set_rxmode(pi->adapter, mb, pi->viid, dev->mtu, -1, -1, -1, |
406 | pi->vlan_grp != NULL, true); | 406 | !!(dev->features & NETIF_F_HW_VLAN_RX), true); |
407 | if (ret == 0) { | 407 | if (ret == 0) { |
408 | ret = t4_change_mac(pi->adapter, mb, pi->viid, | 408 | ret = t4_change_mac(pi->adapter, mb, pi->viid, |
409 | pi->xact_addr_filt, dev->dev_addr, true, | 409 | pi->xact_addr_filt, dev->dev_addr, true, |
@@ -1881,7 +1881,24 @@ static int set_tso(struct net_device *dev, u32 value) | |||
1881 | 1881 | ||
1882 | static int set_flags(struct net_device *dev, u32 flags) | 1882 | static int set_flags(struct net_device *dev, u32 flags) |
1883 | { | 1883 | { |
1884 | return ethtool_op_set_flags(dev, flags, ETH_FLAG_RXHASH); | 1884 | int err; |
1885 | unsigned long old_feat = dev->features; | ||
1886 | |||
1887 | err = ethtool_op_set_flags(dev, flags, ETH_FLAG_RXHASH | | ||
1888 | ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN); | ||
1889 | if (err) | ||
1890 | return err; | ||
1891 | |||
1892 | if ((old_feat ^ dev->features) & NETIF_F_HW_VLAN_RX) { | ||
1893 | const struct port_info *pi = netdev_priv(dev); | ||
1894 | |||
1895 | err = t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, -1, | ||
1896 | -1, -1, -1, !!(flags & ETH_FLAG_RXVLAN), | ||
1897 | true); | ||
1898 | if (err) | ||
1899 | dev->features = old_feat; | ||
1900 | } | ||
1901 | return err; | ||
1885 | } | 1902 | } |
1886 | 1903 | ||
1887 | static int get_rss_table(struct net_device *dev, struct ethtool_rxfh_indir *p) | 1904 | static int get_rss_table(struct net_device *dev, struct ethtool_rxfh_indir *p) |
@@ -2842,15 +2859,6 @@ static int cxgb_set_mac_addr(struct net_device *dev, void *p) | |||
2842 | return 0; | 2859 | return 0; |
2843 | } | 2860 | } |
2844 | 2861 | ||
2845 | static void vlan_rx_register(struct net_device *dev, struct vlan_group *grp) | ||
2846 | { | ||
2847 | struct port_info *pi = netdev_priv(dev); | ||
2848 | |||
2849 | pi->vlan_grp = grp; | ||
2850 | t4_set_rxmode(pi->adapter, pi->adapter->fn, pi->viid, -1, -1, -1, -1, | ||
2851 | grp != NULL, true); | ||
2852 | } | ||
2853 | |||
2854 | #ifdef CONFIG_NET_POLL_CONTROLLER | 2862 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2855 | static void cxgb_netpoll(struct net_device *dev) | 2863 | static void cxgb_netpoll(struct net_device *dev) |
2856 | { | 2864 | { |
@@ -2878,7 +2886,6 @@ static const struct net_device_ops cxgb4_netdev_ops = { | |||
2878 | .ndo_validate_addr = eth_validate_addr, | 2886 | .ndo_validate_addr = eth_validate_addr, |
2879 | .ndo_do_ioctl = cxgb_ioctl, | 2887 | .ndo_do_ioctl = cxgb_ioctl, |
2880 | .ndo_change_mtu = cxgb_change_mtu, | 2888 | .ndo_change_mtu = cxgb_change_mtu, |
2881 | .ndo_vlan_rx_register = vlan_rx_register, | ||
2882 | #ifdef CONFIG_NET_POLL_CONTROLLER | 2889 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2883 | .ndo_poll_controller = cxgb_netpoll, | 2890 | .ndo_poll_controller = cxgb_netpoll, |
2884 | #endif | 2891 | #endif |
@@ -3658,7 +3665,6 @@ static int __devinit init_one(struct pci_dev *pdev, | |||
3658 | pi->rx_offload = RX_CSO; | 3665 | pi->rx_offload = RX_CSO; |
3659 | pi->port_id = i; | 3666 | pi->port_id = i; |
3660 | netif_carrier_off(netdev); | 3667 | netif_carrier_off(netdev); |
3661 | netif_tx_stop_all_queues(netdev); | ||
3662 | netdev->irq = pdev->irq; | 3668 | netdev->irq = pdev->irq; |
3663 | 3669 | ||
3664 | netdev->features |= NETIF_F_SG | TSO_FLAGS; | 3670 | netdev->features |= NETIF_F_SG | TSO_FLAGS; |
diff --git a/drivers/net/cxgb4/sge.c b/drivers/net/cxgb4/sge.c index 9967f3debce7..17022258ed68 100644 --- a/drivers/net/cxgb4/sge.c +++ b/drivers/net/cxgb4/sge.c | |||
@@ -1530,18 +1530,11 @@ static void do_gro(struct sge_eth_rxq *rxq, const struct pkt_gl *gl, | |||
1530 | skb->rxhash = (__force u32)pkt->rsshdr.hash_val; | 1530 | skb->rxhash = (__force u32)pkt->rsshdr.hash_val; |
1531 | 1531 | ||
1532 | if (unlikely(pkt->vlan_ex)) { | 1532 | if (unlikely(pkt->vlan_ex)) { |
1533 | struct port_info *pi = netdev_priv(rxq->rspq.netdev); | 1533 | __vlan_hwaccel_put_tag(skb, ntohs(pkt->vlan)); |
1534 | struct vlan_group *grp = pi->vlan_grp; | ||
1535 | |||
1536 | rxq->stats.vlan_ex++; | 1534 | rxq->stats.vlan_ex++; |
1537 | if (likely(grp)) { | ||
1538 | ret = vlan_gro_frags(&rxq->rspq.napi, grp, | ||
1539 | ntohs(pkt->vlan)); | ||
1540 | goto stats; | ||
1541 | } | ||
1542 | } | 1535 | } |
1543 | ret = napi_gro_frags(&rxq->rspq.napi); | 1536 | ret = napi_gro_frags(&rxq->rspq.napi); |
1544 | stats: if (ret == GRO_HELD) | 1537 | if (ret == GRO_HELD) |
1545 | rxq->stats.lro_pkts++; | 1538 | rxq->stats.lro_pkts++; |
1546 | else if (ret == GRO_MERGED || ret == GRO_MERGED_FREE) | 1539 | else if (ret == GRO_MERGED || ret == GRO_MERGED_FREE) |
1547 | rxq->stats.lro_merged++; | 1540 | rxq->stats.lro_merged++; |
@@ -1608,16 +1601,10 @@ int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp, | |||
1608 | skb_checksum_none_assert(skb); | 1601 | skb_checksum_none_assert(skb); |
1609 | 1602 | ||
1610 | if (unlikely(pkt->vlan_ex)) { | 1603 | if (unlikely(pkt->vlan_ex)) { |
1611 | struct vlan_group *grp = pi->vlan_grp; | 1604 | __vlan_hwaccel_put_tag(skb, ntohs(pkt->vlan)); |
1612 | |||
1613 | rxq->stats.vlan_ex++; | 1605 | rxq->stats.vlan_ex++; |
1614 | if (likely(grp)) | 1606 | } |
1615 | vlan_hwaccel_receive_skb(skb, grp, ntohs(pkt->vlan)); | 1607 | netif_receive_skb(skb); |
1616 | else | ||
1617 | dev_kfree_skb_any(skb); | ||
1618 | } else | ||
1619 | netif_receive_skb(skb); | ||
1620 | |||
1621 | return 0; | 1608 | return 0; |
1622 | } | 1609 | } |
1623 | 1610 | ||
diff --git a/drivers/net/cxgb4vf/cxgb4vf_main.c b/drivers/net/cxgb4vf/cxgb4vf_main.c index 555ecc5a2e93..d887a76cd39d 100644 --- a/drivers/net/cxgb4vf/cxgb4vf_main.c +++ b/drivers/net/cxgb4vf/cxgb4vf_main.c | |||
@@ -753,7 +753,9 @@ static int cxgb4vf_open(struct net_device *dev) | |||
753 | if (err) | 753 | if (err) |
754 | return err; | 754 | return err; |
755 | set_bit(pi->port_id, &adapter->open_device_map); | 755 | set_bit(pi->port_id, &adapter->open_device_map); |
756 | link_start(dev); | 756 | err = link_start(dev); |
757 | if (err) | ||
758 | return err; | ||
757 | netif_tx_start_all_queues(dev); | 759 | netif_tx_start_all_queues(dev); |
758 | return 0; | 760 | return 0; |
759 | } | 761 | } |
@@ -814,40 +816,48 @@ static struct net_device_stats *cxgb4vf_get_stats(struct net_device *dev) | |||
814 | } | 816 | } |
815 | 817 | ||
816 | /* | 818 | /* |
817 | * Collect up to maxaddrs worth of a netdevice's unicast addresses into an | 819 | * Collect up to maxaddrs worth of a netdevice's unicast addresses, starting |
818 | * array of addrss pointers and return the number collected. | 820 | * at a specified offset within the list, into an array of addrss pointers and |
821 | * return the number collected. | ||
819 | */ | 822 | */ |
820 | static inline int collect_netdev_uc_list_addrs(const struct net_device *dev, | 823 | static inline unsigned int collect_netdev_uc_list_addrs(const struct net_device *dev, |
821 | const u8 **addr, | 824 | const u8 **addr, |
822 | unsigned int maxaddrs) | 825 | unsigned int offset, |
826 | unsigned int maxaddrs) | ||
823 | { | 827 | { |
828 | unsigned int index = 0; | ||
824 | unsigned int naddr = 0; | 829 | unsigned int naddr = 0; |
825 | const struct netdev_hw_addr *ha; | 830 | const struct netdev_hw_addr *ha; |
826 | 831 | ||
827 | for_each_dev_addr(dev, ha) { | 832 | for_each_dev_addr(dev, ha) |
828 | addr[naddr++] = ha->addr; | 833 | if (index++ >= offset) { |
829 | if (naddr >= maxaddrs) | 834 | addr[naddr++] = ha->addr; |
830 | break; | 835 | if (naddr >= maxaddrs) |
831 | } | 836 | break; |
837 | } | ||
832 | return naddr; | 838 | return naddr; |
833 | } | 839 | } |
834 | 840 | ||
835 | /* | 841 | /* |
836 | * Collect up to maxaddrs worth of a netdevice's multicast addresses into an | 842 | * Collect up to maxaddrs worth of a netdevice's multicast addresses, starting |
837 | * array of addrss pointers and return the number collected. | 843 | * at a specified offset within the list, into an array of addrss pointers and |
844 | * return the number collected. | ||
838 | */ | 845 | */ |
839 | static inline int collect_netdev_mc_list_addrs(const struct net_device *dev, | 846 | static inline unsigned int collect_netdev_mc_list_addrs(const struct net_device *dev, |
840 | const u8 **addr, | 847 | const u8 **addr, |
841 | unsigned int maxaddrs) | 848 | unsigned int offset, |
849 | unsigned int maxaddrs) | ||
842 | { | 850 | { |
851 | unsigned int index = 0; | ||
843 | unsigned int naddr = 0; | 852 | unsigned int naddr = 0; |
844 | const struct netdev_hw_addr *ha; | 853 | const struct netdev_hw_addr *ha; |
845 | 854 | ||
846 | netdev_for_each_mc_addr(ha, dev) { | 855 | netdev_for_each_mc_addr(ha, dev) |
847 | addr[naddr++] = ha->addr; | 856 | if (index++ >= offset) { |
848 | if (naddr >= maxaddrs) | 857 | addr[naddr++] = ha->addr; |
849 | break; | 858 | if (naddr >= maxaddrs) |
850 | } | 859 | break; |
860 | } | ||
851 | return naddr; | 861 | return naddr; |
852 | } | 862 | } |
853 | 863 | ||
@@ -860,16 +870,20 @@ static int set_addr_filters(const struct net_device *dev, bool sleep) | |||
860 | u64 mhash = 0; | 870 | u64 mhash = 0; |
861 | u64 uhash = 0; | 871 | u64 uhash = 0; |
862 | bool free = true; | 872 | bool free = true; |
863 | u16 filt_idx[7]; | 873 | unsigned int offset, naddr; |
864 | const u8 *addr[7]; | 874 | const u8 *addr[7]; |
865 | int ret, naddr = 0; | 875 | int ret; |
866 | const struct port_info *pi = netdev_priv(dev); | 876 | const struct port_info *pi = netdev_priv(dev); |
867 | 877 | ||
868 | /* first do the secondary unicast addresses */ | 878 | /* first do the secondary unicast addresses */ |
869 | naddr = collect_netdev_uc_list_addrs(dev, addr, ARRAY_SIZE(addr)); | 879 | for (offset = 0; ; offset += naddr) { |
870 | if (naddr > 0) { | 880 | naddr = collect_netdev_uc_list_addrs(dev, addr, offset, |
881 | ARRAY_SIZE(addr)); | ||
882 | if (naddr == 0) | ||
883 | break; | ||
884 | |||
871 | ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free, | 885 | ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free, |
872 | naddr, addr, filt_idx, &uhash, sleep); | 886 | naddr, addr, NULL, &uhash, sleep); |
873 | if (ret < 0) | 887 | if (ret < 0) |
874 | return ret; | 888 | return ret; |
875 | 889 | ||
@@ -877,12 +891,17 @@ static int set_addr_filters(const struct net_device *dev, bool sleep) | |||
877 | } | 891 | } |
878 | 892 | ||
879 | /* next set up the multicast addresses */ | 893 | /* next set up the multicast addresses */ |
880 | naddr = collect_netdev_mc_list_addrs(dev, addr, ARRAY_SIZE(addr)); | 894 | for (offset = 0; ; offset += naddr) { |
881 | if (naddr > 0) { | 895 | naddr = collect_netdev_mc_list_addrs(dev, addr, offset, |
896 | ARRAY_SIZE(addr)); | ||
897 | if (naddr == 0) | ||
898 | break; | ||
899 | |||
882 | ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free, | 900 | ret = t4vf_alloc_mac_filt(pi->adapter, pi->viid, free, |
883 | naddr, addr, filt_idx, &mhash, sleep); | 901 | naddr, addr, NULL, &mhash, sleep); |
884 | if (ret < 0) | 902 | if (ret < 0) |
885 | return ret; | 903 | return ret; |
904 | free = false; | ||
886 | } | 905 | } |
887 | 906 | ||
888 | return t4vf_set_addr_hash(pi->adapter, pi->viid, uhash != 0, | 907 | return t4vf_set_addr_hash(pi->adapter, pi->viid, uhash != 0, |
@@ -1103,18 +1122,6 @@ static int cxgb4vf_set_mac_addr(struct net_device *dev, void *_addr) | |||
1103 | return 0; | 1122 | return 0; |
1104 | } | 1123 | } |
1105 | 1124 | ||
1106 | /* | ||
1107 | * Return a TX Queue on which to send the specified skb. | ||
1108 | */ | ||
1109 | static u16 cxgb4vf_select_queue(struct net_device *dev, struct sk_buff *skb) | ||
1110 | { | ||
1111 | /* | ||
1112 | * XXX For now just use the default hash but we probably want to | ||
1113 | * XXX look at other possibilities ... | ||
1114 | */ | ||
1115 | return skb_tx_hash(dev, skb); | ||
1116 | } | ||
1117 | |||
1118 | #ifdef CONFIG_NET_POLL_CONTROLLER | 1125 | #ifdef CONFIG_NET_POLL_CONTROLLER |
1119 | /* | 1126 | /* |
1120 | * Poll all of our receive queues. This is called outside of normal interrupt | 1127 | * Poll all of our receive queues. This is called outside of normal interrupt |
@@ -2075,6 +2082,22 @@ static int adap_init0(struct adapter *adapter) | |||
2075 | } | 2082 | } |
2076 | 2083 | ||
2077 | /* | 2084 | /* |
2085 | * Some environments do not properly handle PCIE FLRs -- e.g. in Linux | ||
2086 | * 2.6.31 and later we can't call pci_reset_function() in order to | ||
2087 | * issue an FLR because of a self- deadlock on the device semaphore. | ||
2088 | * Meanwhile, the OS infrastructure doesn't issue FLRs in all the | ||
2089 | * cases where they're needed -- for instance, some versions of KVM | ||
2090 | * fail to reset "Assigned Devices" when the VM reboots. Therefore we | ||
2091 | * use the firmware based reset in order to reset any per function | ||
2092 | * state. | ||
2093 | */ | ||
2094 | err = t4vf_fw_reset(adapter); | ||
2095 | if (err < 0) { | ||
2096 | dev_err(adapter->pdev_dev, "FW reset failed: err=%d\n", err); | ||
2097 | return err; | ||
2098 | } | ||
2099 | |||
2100 | /* | ||
2078 | * Grab basic operational parameters. These will predominantly have | 2101 | * Grab basic operational parameters. These will predominantly have |
2079 | * been set up by the Physical Function Driver or will be hard coded | 2102 | * been set up by the Physical Function Driver or will be hard coded |
2080 | * into the adapter. We just have to live with them ... Note that | 2103 | * into the adapter. We just have to live with them ... Note that |
@@ -2417,7 +2440,6 @@ static const struct net_device_ops cxgb4vf_netdev_ops = { | |||
2417 | .ndo_get_stats = cxgb4vf_get_stats, | 2440 | .ndo_get_stats = cxgb4vf_get_stats, |
2418 | .ndo_set_rx_mode = cxgb4vf_set_rxmode, | 2441 | .ndo_set_rx_mode = cxgb4vf_set_rxmode, |
2419 | .ndo_set_mac_address = cxgb4vf_set_mac_addr, | 2442 | .ndo_set_mac_address = cxgb4vf_set_mac_addr, |
2420 | .ndo_select_queue = cxgb4vf_select_queue, | ||
2421 | .ndo_validate_addr = eth_validate_addr, | 2443 | .ndo_validate_addr = eth_validate_addr, |
2422 | .ndo_do_ioctl = cxgb4vf_do_ioctl, | 2444 | .ndo_do_ioctl = cxgb4vf_do_ioctl, |
2423 | .ndo_change_mtu = cxgb4vf_change_mtu, | 2445 | .ndo_change_mtu = cxgb4vf_change_mtu, |
@@ -2600,7 +2622,6 @@ static int __devinit cxgb4vf_pci_probe(struct pci_dev *pdev, | |||
2600 | pi->xact_addr_filt = -1; | 2622 | pi->xact_addr_filt = -1; |
2601 | pi->rx_offload = RX_CSO; | 2623 | pi->rx_offload = RX_CSO; |
2602 | netif_carrier_off(netdev); | 2624 | netif_carrier_off(netdev); |
2603 | netif_tx_stop_all_queues(netdev); | ||
2604 | netdev->irq = pdev->irq; | 2625 | netdev->irq = pdev->irq; |
2605 | 2626 | ||
2606 | netdev->features = (NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | | 2627 | netdev->features = (NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | |
@@ -2625,7 +2646,6 @@ static int __devinit cxgb4vf_pci_probe(struct pci_dev *pdev, | |||
2625 | netdev->do_ioctl = cxgb4vf_do_ioctl; | 2646 | netdev->do_ioctl = cxgb4vf_do_ioctl; |
2626 | netdev->change_mtu = cxgb4vf_change_mtu; | 2647 | netdev->change_mtu = cxgb4vf_change_mtu; |
2627 | netdev->set_mac_address = cxgb4vf_set_mac_addr; | 2648 | netdev->set_mac_address = cxgb4vf_set_mac_addr; |
2628 | netdev->select_queue = cxgb4vf_select_queue; | ||
2629 | #ifdef CONFIG_NET_POLL_CONTROLLER | 2649 | #ifdef CONFIG_NET_POLL_CONTROLLER |
2630 | netdev->poll_controller = cxgb4vf_poll_controller; | 2650 | netdev->poll_controller = cxgb4vf_poll_controller; |
2631 | #endif | 2651 | #endif |
@@ -2844,6 +2864,14 @@ static struct pci_device_id cxgb4vf_pci_tbl[] = { | |||
2844 | CH_DEVICE(0x4800, 0), /* T440-dbg */ | 2864 | CH_DEVICE(0x4800, 0), /* T440-dbg */ |
2845 | CH_DEVICE(0x4801, 0), /* T420-cr */ | 2865 | CH_DEVICE(0x4801, 0), /* T420-cr */ |
2846 | CH_DEVICE(0x4802, 0), /* T422-cr */ | 2866 | CH_DEVICE(0x4802, 0), /* T422-cr */ |
2867 | CH_DEVICE(0x4803, 0), /* T440-cr */ | ||
2868 | CH_DEVICE(0x4804, 0), /* T420-bch */ | ||
2869 | CH_DEVICE(0x4805, 0), /* T440-bch */ | ||
2870 | CH_DEVICE(0x4806, 0), /* T460-ch */ | ||
2871 | CH_DEVICE(0x4807, 0), /* T420-so */ | ||
2872 | CH_DEVICE(0x4808, 0), /* T420-cx */ | ||
2873 | CH_DEVICE(0x4809, 0), /* T420-bt */ | ||
2874 | CH_DEVICE(0x480a, 0), /* T404-bt */ | ||
2847 | { 0, } | 2875 | { 0, } |
2848 | }; | 2876 | }; |
2849 | 2877 | ||
diff --git a/drivers/net/cxgb4vf/sge.c b/drivers/net/cxgb4vf/sge.c index f10864ddafbe..ecf0770bf0ff 100644 --- a/drivers/net/cxgb4vf/sge.c +++ b/drivers/net/cxgb4vf/sge.c | |||
@@ -154,13 +154,14 @@ enum { | |||
154 | */ | 154 | */ |
155 | RX_COPY_THRES = 256, | 155 | RX_COPY_THRES = 256, |
156 | RX_PULL_LEN = 128, | 156 | RX_PULL_LEN = 128, |
157 | }; | ||
158 | 157 | ||
159 | /* | 158 | /* |
160 | * Can't define this in the above enum because PKTSHIFT isn't a constant in | 159 | * Main body length for sk_buffs used for RX Ethernet packets with |
161 | * the VF Driver ... | 160 | * fragments. Should be >= RX_PULL_LEN but possibly bigger to give |
162 | */ | 161 | * pskb_may_pull() some room. |
163 | #define RX_PKT_PULL_LEN (RX_PULL_LEN + PKTSHIFT) | 162 | */ |
163 | RX_SKB_LEN = 512, | ||
164 | }; | ||
164 | 165 | ||
165 | /* | 166 | /* |
166 | * Software state per TX descriptor. | 167 | * Software state per TX descriptor. |
@@ -1355,6 +1356,67 @@ out_free: | |||
1355 | } | 1356 | } |
1356 | 1357 | ||
1357 | /** | 1358 | /** |
1359 | * t4vf_pktgl_to_skb - build an sk_buff from a packet gather list | ||
1360 | * @gl: the gather list | ||
1361 | * @skb_len: size of sk_buff main body if it carries fragments | ||
1362 | * @pull_len: amount of data to move to the sk_buff's main body | ||
1363 | * | ||
1364 | * Builds an sk_buff from the given packet gather list. Returns the | ||
1365 | * sk_buff or %NULL if sk_buff allocation failed. | ||
1366 | */ | ||
1367 | struct sk_buff *t4vf_pktgl_to_skb(const struct pkt_gl *gl, | ||
1368 | unsigned int skb_len, unsigned int pull_len) | ||
1369 | { | ||
1370 | struct sk_buff *skb; | ||
1371 | struct skb_shared_info *ssi; | ||
1372 | |||
1373 | /* | ||
1374 | * If the ingress packet is small enough, allocate an skb large enough | ||
1375 | * for all of the data and copy it inline. Otherwise, allocate an skb | ||
1376 | * with enough room to pull in the header and reference the rest of | ||
1377 | * the data via the skb fragment list. | ||
1378 | * | ||
1379 | * Below we rely on RX_COPY_THRES being less than the smallest Rx | ||
1380 | * buff! size, which is expected since buffers are at least | ||
1381 | * PAGE_SIZEd. In this case packets up to RX_COPY_THRES have only one | ||
1382 | * fragment. | ||
1383 | */ | ||
1384 | if (gl->tot_len <= RX_COPY_THRES) { | ||
1385 | /* small packets have only one fragment */ | ||
1386 | skb = alloc_skb(gl->tot_len, GFP_ATOMIC); | ||
1387 | if (unlikely(!skb)) | ||
1388 | goto out; | ||
1389 | __skb_put(skb, gl->tot_len); | ||
1390 | skb_copy_to_linear_data(skb, gl->va, gl->tot_len); | ||
1391 | } else { | ||
1392 | skb = alloc_skb(skb_len, GFP_ATOMIC); | ||
1393 | if (unlikely(!skb)) | ||
1394 | goto out; | ||
1395 | __skb_put(skb, pull_len); | ||
1396 | skb_copy_to_linear_data(skb, gl->va, pull_len); | ||
1397 | |||
1398 | ssi = skb_shinfo(skb); | ||
1399 | ssi->frags[0].page = gl->frags[0].page; | ||
1400 | ssi->frags[0].page_offset = gl->frags[0].page_offset + pull_len; | ||
1401 | ssi->frags[0].size = gl->frags[0].size - pull_len; | ||
1402 | if (gl->nfrags > 1) | ||
1403 | memcpy(&ssi->frags[1], &gl->frags[1], | ||
1404 | (gl->nfrags-1) * sizeof(skb_frag_t)); | ||
1405 | ssi->nr_frags = gl->nfrags; | ||
1406 | |||
1407 | skb->len = gl->tot_len; | ||
1408 | skb->data_len = skb->len - pull_len; | ||
1409 | skb->truesize += skb->data_len; | ||
1410 | |||
1411 | /* Get a reference for the last page, we don't own it */ | ||
1412 | get_page(gl->frags[gl->nfrags - 1].page); | ||
1413 | } | ||
1414 | |||
1415 | out: | ||
1416 | return skb; | ||
1417 | } | ||
1418 | |||
1419 | /** | ||
1358 | * t4vf_pktgl_free - free a packet gather list | 1420 | * t4vf_pktgl_free - free a packet gather list |
1359 | * @gl: the gather list | 1421 | * @gl: the gather list |
1360 | * | 1422 | * |
@@ -1463,10 +1525,8 @@ int t4vf_ethrx_handler(struct sge_rspq *rspq, const __be64 *rsp, | |||
1463 | { | 1525 | { |
1464 | struct sk_buff *skb; | 1526 | struct sk_buff *skb; |
1465 | struct port_info *pi; | 1527 | struct port_info *pi; |
1466 | struct skb_shared_info *ssi; | ||
1467 | const struct cpl_rx_pkt *pkt = (void *)&rsp[1]; | 1528 | const struct cpl_rx_pkt *pkt = (void *)&rsp[1]; |
1468 | bool csum_ok = pkt->csum_calc && !pkt->err_vec; | 1529 | bool csum_ok = pkt->csum_calc && !pkt->err_vec; |
1469 | unsigned int len = be16_to_cpu(pkt->len); | ||
1470 | struct sge_eth_rxq *rxq = container_of(rspq, struct sge_eth_rxq, rspq); | 1530 | struct sge_eth_rxq *rxq = container_of(rspq, struct sge_eth_rxq, rspq); |
1471 | 1531 | ||
1472 | /* | 1532 | /* |
@@ -1481,42 +1541,14 @@ int t4vf_ethrx_handler(struct sge_rspq *rspq, const __be64 *rsp, | |||
1481 | } | 1541 | } |
1482 | 1542 | ||
1483 | /* | 1543 | /* |
1484 | * If the ingress packet is small enough, allocate an skb large enough | 1544 | * Convert the Packet Gather List into an skb. |
1485 | * for all of the data and copy it inline. Otherwise, allocate an skb | ||
1486 | * with enough room to pull in the header and reference the rest of | ||
1487 | * the data via the skb fragment list. | ||
1488 | */ | 1545 | */ |
1489 | if (len <= RX_COPY_THRES) { | 1546 | skb = t4vf_pktgl_to_skb(gl, RX_SKB_LEN, RX_PULL_LEN); |
1490 | /* small packets have only one fragment */ | 1547 | if (unlikely(!skb)) { |
1491 | skb = alloc_skb(gl->frags[0].size, GFP_ATOMIC); | 1548 | t4vf_pktgl_free(gl); |
1492 | if (!skb) | 1549 | rxq->stats.rx_drops++; |
1493 | goto nomem; | 1550 | return 0; |
1494 | __skb_put(skb, gl->frags[0].size); | ||
1495 | skb_copy_to_linear_data(skb, gl->va, gl->frags[0].size); | ||
1496 | } else { | ||
1497 | skb = alloc_skb(RX_PKT_PULL_LEN, GFP_ATOMIC); | ||
1498 | if (!skb) | ||
1499 | goto nomem; | ||
1500 | __skb_put(skb, RX_PKT_PULL_LEN); | ||
1501 | skb_copy_to_linear_data(skb, gl->va, RX_PKT_PULL_LEN); | ||
1502 | |||
1503 | ssi = skb_shinfo(skb); | ||
1504 | ssi->frags[0].page = gl->frags[0].page; | ||
1505 | ssi->frags[0].page_offset = (gl->frags[0].page_offset + | ||
1506 | RX_PKT_PULL_LEN); | ||
1507 | ssi->frags[0].size = gl->frags[0].size - RX_PKT_PULL_LEN; | ||
1508 | if (gl->nfrags > 1) | ||
1509 | memcpy(&ssi->frags[1], &gl->frags[1], | ||
1510 | (gl->nfrags-1) * sizeof(skb_frag_t)); | ||
1511 | ssi->nr_frags = gl->nfrags; | ||
1512 | skb->len = len + PKTSHIFT; | ||
1513 | skb->data_len = skb->len - RX_PKT_PULL_LEN; | ||
1514 | skb->truesize += skb->data_len; | ||
1515 | |||
1516 | /* Get a reference for the last page, we don't own it */ | ||
1517 | get_page(gl->frags[gl->nfrags - 1].page); | ||
1518 | } | 1551 | } |
1519 | |||
1520 | __skb_pull(skb, PKTSHIFT); | 1552 | __skb_pull(skb, PKTSHIFT); |
1521 | skb->protocol = eth_type_trans(skb, rspq->netdev); | 1553 | skb->protocol = eth_type_trans(skb, rspq->netdev); |
1522 | skb_record_rx_queue(skb, rspq->idx); | 1554 | skb_record_rx_queue(skb, rspq->idx); |
@@ -1549,11 +1581,6 @@ int t4vf_ethrx_handler(struct sge_rspq *rspq, const __be64 *rsp, | |||
1549 | netif_receive_skb(skb); | 1581 | netif_receive_skb(skb); |
1550 | 1582 | ||
1551 | return 0; | 1583 | return 0; |
1552 | |||
1553 | nomem: | ||
1554 | t4vf_pktgl_free(gl); | ||
1555 | rxq->stats.rx_drops++; | ||
1556 | return 0; | ||
1557 | } | 1584 | } |
1558 | 1585 | ||
1559 | /** | 1586 | /** |
@@ -1679,6 +1706,7 @@ int process_responses(struct sge_rspq *rspq, int budget) | |||
1679 | } | 1706 | } |
1680 | len = RSPD_LEN(len); | 1707 | len = RSPD_LEN(len); |
1681 | } | 1708 | } |
1709 | gl.tot_len = len; | ||
1682 | 1710 | ||
1683 | /* | 1711 | /* |
1684 | * Gather packet fragments. | 1712 | * Gather packet fragments. |
diff --git a/drivers/net/cxgb4vf/t4vf_common.h b/drivers/net/cxgb4vf/t4vf_common.h index 873cb7d86c57..a65c80aed1f2 100644 --- a/drivers/net/cxgb4vf/t4vf_common.h +++ b/drivers/net/cxgb4vf/t4vf_common.h | |||
@@ -235,6 +235,7 @@ static inline int t4vf_wr_mbox_ns(struct adapter *adapter, const void *cmd, | |||
235 | int __devinit t4vf_wait_dev_ready(struct adapter *); | 235 | int __devinit t4vf_wait_dev_ready(struct adapter *); |
236 | int __devinit t4vf_port_init(struct adapter *, int); | 236 | int __devinit t4vf_port_init(struct adapter *, int); |
237 | 237 | ||
238 | int t4vf_fw_reset(struct adapter *); | ||
238 | int t4vf_query_params(struct adapter *, unsigned int, const u32 *, u32 *); | 239 | int t4vf_query_params(struct adapter *, unsigned int, const u32 *, u32 *); |
239 | int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *); | 240 | int t4vf_set_params(struct adapter *, unsigned int, const u32 *, const u32 *); |
240 | 241 | ||
diff --git a/drivers/net/cxgb4vf/t4vf_hw.c b/drivers/net/cxgb4vf/t4vf_hw.c index ea1c123f0cb4..19520afe1a12 100644 --- a/drivers/net/cxgb4vf/t4vf_hw.c +++ b/drivers/net/cxgb4vf/t4vf_hw.c | |||
@@ -326,6 +326,25 @@ int __devinit t4vf_port_init(struct adapter *adapter, int pidx) | |||
326 | } | 326 | } |
327 | 327 | ||
328 | /** | 328 | /** |
329 | * t4vf_fw_reset - issue a reset to FW | ||
330 | * @adapter: the adapter | ||
331 | * | ||
332 | * Issues a reset command to FW. For a Physical Function this would | ||
333 | * result in the Firmware reseting all of its state. For a Virtual | ||
334 | * Function this just resets the state associated with the VF. | ||
335 | */ | ||
336 | int t4vf_fw_reset(struct adapter *adapter) | ||
337 | { | ||
338 | struct fw_reset_cmd cmd; | ||
339 | |||
340 | memset(&cmd, 0, sizeof(cmd)); | ||
341 | cmd.op_to_write = cpu_to_be32(FW_CMD_OP(FW_RESET_CMD) | | ||
342 | FW_CMD_WRITE); | ||
343 | cmd.retval_len16 = cpu_to_be32(FW_LEN16(cmd)); | ||
344 | return t4vf_wr_mbox(adapter, &cmd, sizeof(cmd), NULL); | ||
345 | } | ||
346 | |||
347 | /** | ||
329 | * t4vf_query_params - query FW or device parameters | 348 | * t4vf_query_params - query FW or device parameters |
330 | * @adapter: the adapter | 349 | * @adapter: the adapter |
331 | * @nparams: the number of parameters | 350 | * @nparams: the number of parameters |
@@ -995,48 +1014,72 @@ int t4vf_alloc_mac_filt(struct adapter *adapter, unsigned int viid, bool free, | |||
995 | unsigned int naddr, const u8 **addr, u16 *idx, | 1014 | unsigned int naddr, const u8 **addr, u16 *idx, |
996 | u64 *hash, bool sleep_ok) | 1015 | u64 *hash, bool sleep_ok) |
997 | { | 1016 | { |
998 | int i, ret; | 1017 | int offset, ret = 0; |
1018 | unsigned nfilters = 0; | ||
1019 | unsigned int rem = naddr; | ||
999 | struct fw_vi_mac_cmd cmd, rpl; | 1020 | struct fw_vi_mac_cmd cmd, rpl; |
1000 | struct fw_vi_mac_exact *p; | ||
1001 | size_t len16; | ||
1002 | 1021 | ||
1003 | if (naddr > ARRAY_SIZE(cmd.u.exact)) | 1022 | if (naddr > FW_CLS_TCAM_NUM_ENTRIES) |
1004 | return -EINVAL; | 1023 | return -EINVAL; |
1005 | len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, | ||
1006 | u.exact[naddr]), 16); | ||
1007 | 1024 | ||
1008 | memset(&cmd, 0, sizeof(cmd)); | 1025 | for (offset = 0; offset < naddr; /**/) { |
1009 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_MAC_CMD) | | 1026 | unsigned int fw_naddr = (rem < ARRAY_SIZE(cmd.u.exact) |
1010 | FW_CMD_REQUEST | | 1027 | ? rem |
1011 | FW_CMD_WRITE | | 1028 | : ARRAY_SIZE(cmd.u.exact)); |
1012 | (free ? FW_CMD_EXEC : 0) | | 1029 | size_t len16 = DIV_ROUND_UP(offsetof(struct fw_vi_mac_cmd, |
1013 | FW_VI_MAC_CMD_VIID(viid)); | 1030 | u.exact[fw_naddr]), 16); |
1014 | cmd.freemacs_to_len16 = cpu_to_be32(FW_VI_MAC_CMD_FREEMACS(free) | | 1031 | struct fw_vi_mac_exact *p; |
1015 | FW_CMD_LEN16(len16)); | 1032 | int i; |
1033 | |||
1034 | memset(&cmd, 0, sizeof(cmd)); | ||
1035 | cmd.op_to_viid = cpu_to_be32(FW_CMD_OP(FW_VI_MAC_CMD) | | ||
1036 | FW_CMD_REQUEST | | ||
1037 | FW_CMD_WRITE | | ||
1038 | (free ? FW_CMD_EXEC : 0) | | ||
1039 | FW_VI_MAC_CMD_VIID(viid)); | ||
1040 | cmd.freemacs_to_len16 = | ||
1041 | cpu_to_be32(FW_VI_MAC_CMD_FREEMACS(free) | | ||
1042 | FW_CMD_LEN16(len16)); | ||
1043 | |||
1044 | for (i = 0, p = cmd.u.exact; i < fw_naddr; i++, p++) { | ||
1045 | p->valid_to_idx = cpu_to_be16( | ||
1046 | FW_VI_MAC_CMD_VALID | | ||
1047 | FW_VI_MAC_CMD_IDX(FW_VI_MAC_ADD_MAC)); | ||
1048 | memcpy(p->macaddr, addr[offset+i], sizeof(p->macaddr)); | ||
1049 | } | ||
1016 | 1050 | ||
1017 | for (i = 0, p = cmd.u.exact; i < naddr; i++, p++) { | ||
1018 | p->valid_to_idx = | ||
1019 | cpu_to_be16(FW_VI_MAC_CMD_VALID | | ||
1020 | FW_VI_MAC_CMD_IDX(FW_VI_MAC_ADD_MAC)); | ||
1021 | memcpy(p->macaddr, addr[i], sizeof(p->macaddr)); | ||
1022 | } | ||
1023 | 1051 | ||
1024 | ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, sleep_ok); | 1052 | ret = t4vf_wr_mbox_core(adapter, &cmd, sizeof(cmd), &rpl, |
1025 | if (ret) | 1053 | sleep_ok); |
1026 | return ret; | 1054 | if (ret && ret != -ENOMEM) |
1027 | 1055 | break; | |
1028 | for (i = 0, p = rpl.u.exact; i < naddr; i++, p++) { | 1056 | |
1029 | u16 index = FW_VI_MAC_CMD_IDX_GET(be16_to_cpu(p->valid_to_idx)); | 1057 | for (i = 0, p = rpl.u.exact; i < fw_naddr; i++, p++) { |
1030 | 1058 | u16 index = FW_VI_MAC_CMD_IDX_GET( | |
1031 | if (idx) | 1059 | be16_to_cpu(p->valid_to_idx)); |
1032 | idx[i] = (index >= FW_CLS_TCAM_NUM_ENTRIES | 1060 | |
1033 | ? 0xffff | 1061 | if (idx) |
1034 | : index); | 1062 | idx[offset+i] = |
1035 | if (index < FW_CLS_TCAM_NUM_ENTRIES) | 1063 | (index >= FW_CLS_TCAM_NUM_ENTRIES |
1036 | ret++; | 1064 | ? 0xffff |
1037 | else if (hash) | 1065 | : index); |
1038 | *hash |= (1 << hash_mac_addr(addr[i])); | 1066 | if (index < FW_CLS_TCAM_NUM_ENTRIES) |
1067 | nfilters++; | ||
1068 | else if (hash) | ||
1069 | *hash |= (1ULL << hash_mac_addr(addr[offset+i])); | ||
1070 | } | ||
1071 | |||
1072 | free = false; | ||
1073 | offset += fw_naddr; | ||
1074 | rem -= fw_naddr; | ||
1039 | } | 1075 | } |
1076 | |||
1077 | /* | ||
1078 | * If there were no errors or we merely ran out of room in our MAC | ||
1079 | * address arena, return the number of filters actually written. | ||
1080 | */ | ||
1081 | if (ret == 0 || ret == -ENOMEM) | ||
1082 | ret = nfilters; | ||
1040 | return ret; | 1083 | return ret; |
1041 | } | 1084 | } |
1042 | 1085 | ||
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index a117f2a0252e..4d62f7bfa036 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -31,7 +31,7 @@ | |||
31 | 31 | ||
32 | char e1000_driver_name[] = "e1000"; | 32 | char e1000_driver_name[] = "e1000"; |
33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; | 33 | static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver"; |
34 | #define DRV_VERSION "7.3.21-k6-NAPI" | 34 | #define DRV_VERSION "7.3.21-k8-NAPI" |
35 | const char e1000_driver_version[] = DRV_VERSION; | 35 | const char e1000_driver_version[] = DRV_VERSION; |
36 | static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; | 36 | static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation."; |
37 | 37 | ||
@@ -485,9 +485,6 @@ void e1000_down(struct e1000_adapter *adapter) | |||
485 | struct net_device *netdev = adapter->netdev; | 485 | struct net_device *netdev = adapter->netdev; |
486 | u32 rctl, tctl; | 486 | u32 rctl, tctl; |
487 | 487 | ||
488 | /* signal that we're down so the interrupt handler does not | ||
489 | * reschedule our watchdog timer */ | ||
490 | set_bit(__E1000_DOWN, &adapter->flags); | ||
491 | 488 | ||
492 | /* disable receives in the hardware */ | 489 | /* disable receives in the hardware */ |
493 | rctl = er32(RCTL); | 490 | rctl = er32(RCTL); |
@@ -508,6 +505,13 @@ void e1000_down(struct e1000_adapter *adapter) | |||
508 | 505 | ||
509 | e1000_irq_disable(adapter); | 506 | e1000_irq_disable(adapter); |
510 | 507 | ||
508 | /* | ||
509 | * Setting DOWN must be after irq_disable to prevent | ||
510 | * a screaming interrupt. Setting DOWN also prevents | ||
511 | * timers and tasks from rescheduling. | ||
512 | */ | ||
513 | set_bit(__E1000_DOWN, &adapter->flags); | ||
514 | |||
511 | del_timer_sync(&adapter->tx_fifo_stall_timer); | 515 | del_timer_sync(&adapter->tx_fifo_stall_timer); |
512 | del_timer_sync(&adapter->watchdog_timer); | 516 | del_timer_sync(&adapter->watchdog_timer); |
513 | del_timer_sync(&adapter->phy_info_timer); | 517 | del_timer_sync(&adapter->phy_info_timer); |
@@ -521,7 +525,7 @@ void e1000_down(struct e1000_adapter *adapter) | |||
521 | e1000_clean_all_rx_rings(adapter); | 525 | e1000_clean_all_rx_rings(adapter); |
522 | } | 526 | } |
523 | 527 | ||
524 | void e1000_reinit_safe(struct e1000_adapter *adapter) | 528 | static void e1000_reinit_safe(struct e1000_adapter *adapter) |
525 | { | 529 | { |
526 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) | 530 | while (test_and_set_bit(__E1000_RESETTING, &adapter->flags)) |
527 | msleep(1); | 531 | msleep(1); |
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c index ca663f19d7df..7236f1a53ba0 100644 --- a/drivers/net/e1000e/82571.c +++ b/drivers/net/e1000e/82571.c | |||
@@ -52,6 +52,10 @@ | |||
52 | (ID_LED_DEF1_DEF2)) | 52 | (ID_LED_DEF1_DEF2)) |
53 | 53 | ||
54 | #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 | 54 | #define E1000_GCR_L1_ACT_WITHOUT_L0S_RX 0x08000000 |
55 | #define E1000_BASE1000T_STATUS 10 | ||
56 | #define E1000_IDLE_ERROR_COUNT_MASK 0xFF | ||
57 | #define E1000_RECEIVE_ERROR_COUNTER 21 | ||
58 | #define E1000_RECEIVE_ERROR_MAX 0xFFFF | ||
55 | 59 | ||
56 | #define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */ | 60 | #define E1000_NVM_INIT_CTRL2_MNGM 0x6000 /* Manageability Operation Mode mask */ |
57 | 61 | ||
@@ -1243,6 +1247,39 @@ static s32 e1000_led_on_82574(struct e1000_hw *hw) | |||
1243 | } | 1247 | } |
1244 | 1248 | ||
1245 | /** | 1249 | /** |
1250 | * e1000_check_phy_82574 - check 82574 phy hung state | ||
1251 | * @hw: pointer to the HW structure | ||
1252 | * | ||
1253 | * Returns whether phy is hung or not | ||
1254 | **/ | ||
1255 | bool e1000_check_phy_82574(struct e1000_hw *hw) | ||
1256 | { | ||
1257 | u16 status_1kbt = 0; | ||
1258 | u16 receive_errors = 0; | ||
1259 | bool phy_hung = false; | ||
1260 | s32 ret_val = 0; | ||
1261 | |||
1262 | /* | ||
1263 | * Read PHY Receive Error counter first, if its is max - all F's then | ||
1264 | * read the Base1000T status register If both are max then PHY is hung. | ||
1265 | */ | ||
1266 | ret_val = e1e_rphy(hw, E1000_RECEIVE_ERROR_COUNTER, &receive_errors); | ||
1267 | |||
1268 | if (ret_val) | ||
1269 | goto out; | ||
1270 | if (receive_errors == E1000_RECEIVE_ERROR_MAX) { | ||
1271 | ret_val = e1e_rphy(hw, E1000_BASE1000T_STATUS, &status_1kbt); | ||
1272 | if (ret_val) | ||
1273 | goto out; | ||
1274 | if ((status_1kbt & E1000_IDLE_ERROR_COUNT_MASK) == | ||
1275 | E1000_IDLE_ERROR_COUNT_MASK) | ||
1276 | phy_hung = true; | ||
1277 | } | ||
1278 | out: | ||
1279 | return phy_hung; | ||
1280 | } | ||
1281 | |||
1282 | /** | ||
1246 | * e1000_setup_link_82571 - Setup flow control and link settings | 1283 | * e1000_setup_link_82571 - Setup flow control and link settings |
1247 | * @hw: pointer to the HW structure | 1284 | * @hw: pointer to the HW structure |
1248 | * | 1285 | * |
@@ -1859,6 +1896,7 @@ struct e1000_info e1000_82574_info = { | |||
1859 | | FLAG_HAS_SMART_POWER_DOWN | 1896 | | FLAG_HAS_SMART_POWER_DOWN |
1860 | | FLAG_HAS_AMT | 1897 | | FLAG_HAS_AMT |
1861 | | FLAG_HAS_CTRLEXT_ON_LOAD, | 1898 | | FLAG_HAS_CTRLEXT_ON_LOAD, |
1899 | .flags2 = FLAG2_CHECK_PHY_HANG, | ||
1862 | .pba = 36, | 1900 | .pba = 36, |
1863 | .max_hw_frame_size = DEFAULT_JUMBO, | 1901 | .max_hw_frame_size = DEFAULT_JUMBO, |
1864 | .get_variants = e1000_get_variants_82571, | 1902 | .get_variants = e1000_get_variants_82571, |
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index cee882dd67bf..fdc67fead4ea 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h | |||
@@ -397,6 +397,7 @@ struct e1000_adapter { | |||
397 | struct work_struct print_hang_task; | 397 | struct work_struct print_hang_task; |
398 | 398 | ||
399 | bool idle_check; | 399 | bool idle_check; |
400 | int phy_hang_count; | ||
400 | }; | 401 | }; |
401 | 402 | ||
402 | struct e1000_info { | 403 | struct e1000_info { |
@@ -454,6 +455,7 @@ struct e1000_info { | |||
454 | #define FLAG2_HAS_EEE (1 << 5) | 455 | #define FLAG2_HAS_EEE (1 << 5) |
455 | #define FLAG2_DMA_BURST (1 << 6) | 456 | #define FLAG2_DMA_BURST (1 << 6) |
456 | #define FLAG2_DISABLE_AIM (1 << 8) | 457 | #define FLAG2_DISABLE_AIM (1 << 8) |
458 | #define FLAG2_CHECK_PHY_HANG (1 << 9) | ||
457 | 459 | ||
458 | #define E1000_RX_DESC_PS(R, i) \ | 460 | #define E1000_RX_DESC_PS(R, i) \ |
459 | (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) | 461 | (&(((union e1000_rx_desc_packet_split *)((R).desc))[i])) |
@@ -631,6 +633,7 @@ extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw); | |||
631 | extern s32 e1000_check_polarity_ife(struct e1000_hw *hw); | 633 | extern s32 e1000_check_polarity_ife(struct e1000_hw *hw); |
632 | extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); | 634 | extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw); |
633 | extern s32 e1000_check_polarity_igp(struct e1000_hw *hw); | 635 | extern s32 e1000_check_polarity_igp(struct e1000_hw *hw); |
636 | extern bool e1000_check_phy_82574(struct e1000_hw *hw); | ||
634 | 637 | ||
635 | static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) | 638 | static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw) |
636 | { | 639 | { |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index ec8cf3f51423..c4ca1629f532 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -4098,6 +4098,25 @@ static void e1000e_enable_receives(struct e1000_adapter *adapter) | |||
4098 | } | 4098 | } |
4099 | } | 4099 | } |
4100 | 4100 | ||
4101 | static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter) | ||
4102 | { | ||
4103 | struct e1000_hw *hw = &adapter->hw; | ||
4104 | |||
4105 | /* | ||
4106 | * With 82574 controllers, PHY needs to be checked periodically | ||
4107 | * for hung state and reset, if two calls return true | ||
4108 | */ | ||
4109 | if (e1000_check_phy_82574(hw)) | ||
4110 | adapter->phy_hang_count++; | ||
4111 | else | ||
4112 | adapter->phy_hang_count = 0; | ||
4113 | |||
4114 | if (adapter->phy_hang_count > 1) { | ||
4115 | adapter->phy_hang_count = 0; | ||
4116 | schedule_work(&adapter->reset_task); | ||
4117 | } | ||
4118 | } | ||
4119 | |||
4101 | /** | 4120 | /** |
4102 | * e1000_watchdog - Timer Call-back | 4121 | * e1000_watchdog - Timer Call-back |
4103 | * @data: pointer to adapter cast into an unsigned long | 4122 | * @data: pointer to adapter cast into an unsigned long |
@@ -4333,6 +4352,9 @@ link_up: | |||
4333 | if (e1000e_get_laa_state_82571(hw)) | 4352 | if (e1000e_get_laa_state_82571(hw)) |
4334 | e1000e_rar_set(hw, adapter->hw.mac.addr, 0); | 4353 | e1000e_rar_set(hw, adapter->hw.mac.addr, 0); |
4335 | 4354 | ||
4355 | if (adapter->flags2 & FLAG2_CHECK_PHY_HANG) | ||
4356 | e1000e_check_82574_phy_workaround(adapter); | ||
4357 | |||
4336 | /* Reset the timer */ | 4358 | /* Reset the timer */ |
4337 | if (!test_bit(__E1000_DOWN, &adapter->state)) | 4359 | if (!test_bit(__E1000_DOWN, &adapter->state)) |
4338 | mod_timer(&adapter->watchdog_timer, | 4360 | mod_timer(&adapter->watchdog_timer, |
@@ -4860,8 +4882,11 @@ static void e1000_reset_task(struct work_struct *work) | |||
4860 | struct e1000_adapter *adapter; | 4882 | struct e1000_adapter *adapter; |
4861 | adapter = container_of(work, struct e1000_adapter, reset_task); | 4883 | adapter = container_of(work, struct e1000_adapter, reset_task); |
4862 | 4884 | ||
4863 | e1000e_dump(adapter); | 4885 | if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) && |
4864 | e_err("Reset adapter\n"); | 4886 | (adapter->flags & FLAG_RX_RESTART_NOW))) { |
4887 | e1000e_dump(adapter); | ||
4888 | e_err("Reset adapter\n"); | ||
4889 | } | ||
4865 | e1000e_reinit_locked(adapter); | 4890 | e1000e_reinit_locked(adapter); |
4866 | } | 4891 | } |
4867 | 4892 | ||
diff --git a/drivers/net/ehea/ehea.h b/drivers/net/ehea/ehea.h index 1321cb6401cf..8e745e74828d 100644 --- a/drivers/net/ehea/ehea.h +++ b/drivers/net/ehea/ehea.h | |||
@@ -396,7 +396,9 @@ struct ehea_port_res { | |||
396 | int swqe_ll_count; | 396 | int swqe_ll_count; |
397 | u32 swqe_id_counter; | 397 | u32 swqe_id_counter; |
398 | u64 tx_packets; | 398 | u64 tx_packets; |
399 | u64 tx_bytes; | ||
399 | u64 rx_packets; | 400 | u64 rx_packets; |
401 | u64 rx_bytes; | ||
400 | u32 poll_counter; | 402 | u32 poll_counter; |
401 | struct net_lro_mgr lro_mgr; | 403 | struct net_lro_mgr lro_mgr; |
402 | struct net_lro_desc lro_desc[MAX_LRO_DESCRIPTORS]; | 404 | struct net_lro_desc lro_desc[MAX_LRO_DESCRIPTORS]; |
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c index bb7d306fb446..3d0af08483a1 100644 --- a/drivers/net/ehea/ehea_main.c +++ b/drivers/net/ehea/ehea_main.c | |||
@@ -330,7 +330,7 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev) | |||
330 | struct ehea_port *port = netdev_priv(dev); | 330 | struct ehea_port *port = netdev_priv(dev); |
331 | struct net_device_stats *stats = &port->stats; | 331 | struct net_device_stats *stats = &port->stats; |
332 | struct hcp_ehea_port_cb2 *cb2; | 332 | struct hcp_ehea_port_cb2 *cb2; |
333 | u64 hret, rx_packets, tx_packets; | 333 | u64 hret, rx_packets, tx_packets, rx_bytes = 0, tx_bytes = 0; |
334 | int i; | 334 | int i; |
335 | 335 | ||
336 | memset(stats, 0, sizeof(*stats)); | 336 | memset(stats, 0, sizeof(*stats)); |
@@ -353,18 +353,22 @@ static struct net_device_stats *ehea_get_stats(struct net_device *dev) | |||
353 | ehea_dump(cb2, sizeof(*cb2), "net_device_stats"); | 353 | ehea_dump(cb2, sizeof(*cb2), "net_device_stats"); |
354 | 354 | ||
355 | rx_packets = 0; | 355 | rx_packets = 0; |
356 | for (i = 0; i < port->num_def_qps; i++) | 356 | for (i = 0; i < port->num_def_qps; i++) { |
357 | rx_packets += port->port_res[i].rx_packets; | 357 | rx_packets += port->port_res[i].rx_packets; |
358 | rx_bytes += port->port_res[i].rx_bytes; | ||
359 | } | ||
358 | 360 | ||
359 | tx_packets = 0; | 361 | tx_packets = 0; |
360 | for (i = 0; i < port->num_def_qps + port->num_add_tx_qps; i++) | 362 | for (i = 0; i < port->num_def_qps + port->num_add_tx_qps; i++) { |
361 | tx_packets += port->port_res[i].tx_packets; | 363 | tx_packets += port->port_res[i].tx_packets; |
364 | tx_bytes += port->port_res[i].tx_bytes; | ||
365 | } | ||
362 | 366 | ||
363 | stats->tx_packets = tx_packets; | 367 | stats->tx_packets = tx_packets; |
364 | stats->multicast = cb2->rxmcp; | 368 | stats->multicast = cb2->rxmcp; |
365 | stats->rx_errors = cb2->rxuerr; | 369 | stats->rx_errors = cb2->rxuerr; |
366 | stats->rx_bytes = cb2->rxo; | 370 | stats->rx_bytes = rx_bytes; |
367 | stats->tx_bytes = cb2->txo; | 371 | stats->tx_bytes = tx_bytes; |
368 | stats->rx_packets = rx_packets; | 372 | stats->rx_packets = rx_packets; |
369 | 373 | ||
370 | out_herr: | 374 | out_herr: |
@@ -396,6 +400,7 @@ static void ehea_refill_rq1(struct ehea_port_res *pr, int index, int nr_of_wqes) | |||
396 | skb_arr_rq1[index] = netdev_alloc_skb(dev, | 400 | skb_arr_rq1[index] = netdev_alloc_skb(dev, |
397 | EHEA_L_PKT_SIZE); | 401 | EHEA_L_PKT_SIZE); |
398 | if (!skb_arr_rq1[index]) { | 402 | if (!skb_arr_rq1[index]) { |
403 | ehea_info("Unable to allocate enough skb in the array\n"); | ||
399 | pr->rq1_skba.os_skbs = fill_wqes - i; | 404 | pr->rq1_skba.os_skbs = fill_wqes - i; |
400 | break; | 405 | break; |
401 | } | 406 | } |
@@ -418,13 +423,20 @@ static void ehea_init_fill_rq1(struct ehea_port_res *pr, int nr_rq1a) | |||
418 | struct net_device *dev = pr->port->netdev; | 423 | struct net_device *dev = pr->port->netdev; |
419 | int i; | 424 | int i; |
420 | 425 | ||
421 | for (i = 0; i < pr->rq1_skba.len; i++) { | 426 | if (nr_rq1a > pr->rq1_skba.len) { |
427 | ehea_error("NR_RQ1A bigger than skb array len\n"); | ||
428 | return; | ||
429 | } | ||
430 | |||
431 | for (i = 0; i < nr_rq1a; i++) { | ||
422 | skb_arr_rq1[i] = netdev_alloc_skb(dev, EHEA_L_PKT_SIZE); | 432 | skb_arr_rq1[i] = netdev_alloc_skb(dev, EHEA_L_PKT_SIZE); |
423 | if (!skb_arr_rq1[i]) | 433 | if (!skb_arr_rq1[i]) { |
434 | ehea_info("No enough memory to allocate skb array\n"); | ||
424 | break; | 435 | break; |
436 | } | ||
425 | } | 437 | } |
426 | /* Ring doorbell */ | 438 | /* Ring doorbell */ |
427 | ehea_update_rq1a(pr->qp, nr_rq1a); | 439 | ehea_update_rq1a(pr->qp, i); |
428 | } | 440 | } |
429 | 441 | ||
430 | static int ehea_refill_rq_def(struct ehea_port_res *pr, | 442 | static int ehea_refill_rq_def(struct ehea_port_res *pr, |
@@ -703,6 +715,7 @@ static int ehea_proc_rwqes(struct net_device *dev, | |||
703 | int skb_arr_rq2_len = pr->rq2_skba.len; | 715 | int skb_arr_rq2_len = pr->rq2_skba.len; |
704 | int skb_arr_rq3_len = pr->rq3_skba.len; | 716 | int skb_arr_rq3_len = pr->rq3_skba.len; |
705 | int processed, processed_rq1, processed_rq2, processed_rq3; | 717 | int processed, processed_rq1, processed_rq2, processed_rq3; |
718 | u64 processed_bytes = 0; | ||
706 | int wqe_index, last_wqe_index, rq, port_reset; | 719 | int wqe_index, last_wqe_index, rq, port_reset; |
707 | 720 | ||
708 | processed = processed_rq1 = processed_rq2 = processed_rq3 = 0; | 721 | processed = processed_rq1 = processed_rq2 = processed_rq3 = 0; |
@@ -730,8 +743,10 @@ static int ehea_proc_rwqes(struct net_device *dev, | |||
730 | 743 | ||
731 | skb = netdev_alloc_skb(dev, | 744 | skb = netdev_alloc_skb(dev, |
732 | EHEA_L_PKT_SIZE); | 745 | EHEA_L_PKT_SIZE); |
733 | if (!skb) | 746 | if (!skb) { |
747 | ehea_info("Not enough memory to allocate skb\n"); | ||
734 | break; | 748 | break; |
749 | } | ||
735 | } | 750 | } |
736 | skb_copy_to_linear_data(skb, ((char *)cqe) + 64, | 751 | skb_copy_to_linear_data(skb, ((char *)cqe) + 64, |
737 | cqe->num_bytes_transfered - 4); | 752 | cqe->num_bytes_transfered - 4); |
@@ -760,6 +775,7 @@ static int ehea_proc_rwqes(struct net_device *dev, | |||
760 | processed_rq3++; | 775 | processed_rq3++; |
761 | } | 776 | } |
762 | 777 | ||
778 | processed_bytes += skb->len; | ||
763 | ehea_proc_skb(pr, cqe, skb); | 779 | ehea_proc_skb(pr, cqe, skb); |
764 | } else { | 780 | } else { |
765 | pr->p_stats.poll_receive_errors++; | 781 | pr->p_stats.poll_receive_errors++; |
@@ -775,6 +791,7 @@ static int ehea_proc_rwqes(struct net_device *dev, | |||
775 | lro_flush_all(&pr->lro_mgr); | 791 | lro_flush_all(&pr->lro_mgr); |
776 | 792 | ||
777 | pr->rx_packets += processed; | 793 | pr->rx_packets += processed; |
794 | pr->rx_bytes += processed_bytes; | ||
778 | 795 | ||
779 | ehea_refill_rq1(pr, last_wqe_index, processed_rq1); | 796 | ehea_refill_rq1(pr, last_wqe_index, processed_rq1); |
780 | ehea_refill_rq2(pr, processed_rq2); | 797 | ehea_refill_rq2(pr, processed_rq2); |
@@ -1509,9 +1526,20 @@ static int ehea_init_port_res(struct ehea_port *port, struct ehea_port_res *pr, | |||
1509 | enum ehea_eq_type eq_type = EHEA_EQ; | 1526 | enum ehea_eq_type eq_type = EHEA_EQ; |
1510 | struct ehea_qp_init_attr *init_attr = NULL; | 1527 | struct ehea_qp_init_attr *init_attr = NULL; |
1511 | int ret = -EIO; | 1528 | int ret = -EIO; |
1529 | u64 tx_bytes, rx_bytes, tx_packets, rx_packets; | ||
1530 | |||
1531 | tx_bytes = pr->tx_bytes; | ||
1532 | tx_packets = pr->tx_packets; | ||
1533 | rx_bytes = pr->rx_bytes; | ||
1534 | rx_packets = pr->rx_packets; | ||
1512 | 1535 | ||
1513 | memset(pr, 0, sizeof(struct ehea_port_res)); | 1536 | memset(pr, 0, sizeof(struct ehea_port_res)); |
1514 | 1537 | ||
1538 | pr->tx_bytes = rx_bytes; | ||
1539 | pr->tx_packets = tx_packets; | ||
1540 | pr->rx_bytes = rx_bytes; | ||
1541 | pr->rx_packets = rx_packets; | ||
1542 | |||
1515 | pr->port = port; | 1543 | pr->port = port; |
1516 | spin_lock_init(&pr->xmit_lock); | 1544 | spin_lock_init(&pr->xmit_lock); |
1517 | spin_lock_init(&pr->netif_queue); | 1545 | spin_lock_init(&pr->netif_queue); |
@@ -2249,6 +2277,14 @@ static int ehea_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2249 | memset(swqe, 0, SWQE_HEADER_SIZE); | 2277 | memset(swqe, 0, SWQE_HEADER_SIZE); |
2250 | atomic_dec(&pr->swqe_avail); | 2278 | atomic_dec(&pr->swqe_avail); |
2251 | 2279 | ||
2280 | if (vlan_tx_tag_present(skb)) { | ||
2281 | swqe->tx_control |= EHEA_SWQE_VLAN_INSERT; | ||
2282 | swqe->vlan_tag = vlan_tx_tag_get(skb); | ||
2283 | } | ||
2284 | |||
2285 | pr->tx_packets++; | ||
2286 | pr->tx_bytes += skb->len; | ||
2287 | |||
2252 | if (skb->len <= SWQE3_MAX_IMM) { | 2288 | if (skb->len <= SWQE3_MAX_IMM) { |
2253 | u32 sig_iv = port->sig_comp_iv; | 2289 | u32 sig_iv = port->sig_comp_iv; |
2254 | u32 swqe_num = pr->swqe_id_counter; | 2290 | u32 swqe_num = pr->swqe_id_counter; |
@@ -2279,11 +2315,6 @@ static int ehea_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2279 | } | 2315 | } |
2280 | pr->swqe_id_counter += 1; | 2316 | pr->swqe_id_counter += 1; |
2281 | 2317 | ||
2282 | if (vlan_tx_tag_present(skb)) { | ||
2283 | swqe->tx_control |= EHEA_SWQE_VLAN_INSERT; | ||
2284 | swqe->vlan_tag = vlan_tx_tag_get(skb); | ||
2285 | } | ||
2286 | |||
2287 | if (netif_msg_tx_queued(port)) { | 2318 | if (netif_msg_tx_queued(port)) { |
2288 | ehea_info("post swqe on QP %d", pr->qp->init_attr.qp_nr); | 2319 | ehea_info("post swqe on QP %d", pr->qp->init_attr.qp_nr); |
2289 | ehea_dump(swqe, 512, "swqe"); | 2320 | ehea_dump(swqe, 512, "swqe"); |
@@ -2295,7 +2326,6 @@ static int ehea_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
2295 | } | 2326 | } |
2296 | 2327 | ||
2297 | ehea_post_swqe(pr->qp, swqe); | 2328 | ehea_post_swqe(pr->qp, swqe); |
2298 | pr->tx_packets++; | ||
2299 | 2329 | ||
2300 | if (unlikely(atomic_read(&pr->swqe_avail) <= 1)) { | 2330 | if (unlikely(atomic_read(&pr->swqe_avail) <= 1)) { |
2301 | spin_lock_irqsave(&pr->netif_queue, flags); | 2331 | spin_lock_irqsave(&pr->netif_queue, flags); |
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c index 4c4cc80ec0a1..d1bec6269173 100644 --- a/drivers/net/gianfar.c +++ b/drivers/net/gianfar.c | |||
@@ -577,11 +577,10 @@ static int gfar_parse_group(struct device_node *np, | |||
577 | irq_of_parse_and_map(np, 1); | 577 | irq_of_parse_and_map(np, 1); |
578 | priv->gfargrp[priv->num_grps].interruptError = | 578 | priv->gfargrp[priv->num_grps].interruptError = |
579 | irq_of_parse_and_map(np,2); | 579 | irq_of_parse_and_map(np,2); |
580 | if (priv->gfargrp[priv->num_grps].interruptTransmit < 0 || | 580 | if (priv->gfargrp[priv->num_grps].interruptTransmit == NO_IRQ || |
581 | priv->gfargrp[priv->num_grps].interruptReceive < 0 || | 581 | priv->gfargrp[priv->num_grps].interruptReceive == NO_IRQ || |
582 | priv->gfargrp[priv->num_grps].interruptError < 0) { | 582 | priv->gfargrp[priv->num_grps].interruptError == NO_IRQ) |
583 | return -EINVAL; | 583 | return -EINVAL; |
584 | } | ||
585 | } | 584 | } |
586 | 585 | ||
587 | priv->gfargrp[priv->num_grps].grp_id = priv->num_grps; | 586 | priv->gfargrp[priv->num_grps].grp_id = priv->num_grps; |
@@ -2511,7 +2510,7 @@ static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue) | |||
2511 | skb_recycle_check(skb, priv->rx_buffer_size + | 2510 | skb_recycle_check(skb, priv->rx_buffer_size + |
2512 | RXBUF_ALIGNMENT)) { | 2511 | RXBUF_ALIGNMENT)) { |
2513 | gfar_align_skb(skb); | 2512 | gfar_align_skb(skb); |
2514 | __skb_queue_head(&priv->rx_recycle, skb); | 2513 | skb_queue_head(&priv->rx_recycle, skb); |
2515 | } else | 2514 | } else |
2516 | dev_kfree_skb_any(skb); | 2515 | dev_kfree_skb_any(skb); |
2517 | 2516 | ||
@@ -2594,7 +2593,7 @@ struct sk_buff * gfar_new_skb(struct net_device *dev) | |||
2594 | struct gfar_private *priv = netdev_priv(dev); | 2593 | struct gfar_private *priv = netdev_priv(dev); |
2595 | struct sk_buff *skb = NULL; | 2594 | struct sk_buff *skb = NULL; |
2596 | 2595 | ||
2597 | skb = __skb_dequeue(&priv->rx_recycle); | 2596 | skb = skb_dequeue(&priv->rx_recycle); |
2598 | if (!skb) | 2597 | if (!skb) |
2599 | skb = gfar_alloc_skb(dev); | 2598 | skb = gfar_alloc_skb(dev); |
2600 | 2599 | ||
@@ -2750,7 +2749,7 @@ int gfar_clean_rx_ring(struct gfar_priv_rx_q *rx_queue, int rx_work_limit) | |||
2750 | if (unlikely(!newskb)) | 2749 | if (unlikely(!newskb)) |
2751 | newskb = skb; | 2750 | newskb = skb; |
2752 | else if (skb) | 2751 | else if (skb) |
2753 | __skb_queue_head(&priv->rx_recycle, skb); | 2752 | skb_queue_head(&priv->rx_recycle, skb); |
2754 | } else { | 2753 | } else { |
2755 | /* Increment the number of packets */ | 2754 | /* Increment the number of packets */ |
2756 | rx_queue->stats.rx_packets++; | 2755 | rx_queue->stats.rx_packets++; |
diff --git a/drivers/net/gianfar_ethtool.c b/drivers/net/gianfar_ethtool.c index 5c566ebc54b8..3bc8e276ba4d 100644 --- a/drivers/net/gianfar_ethtool.c +++ b/drivers/net/gianfar_ethtool.c | |||
@@ -635,9 +635,10 @@ static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
635 | if (wol->wolopts & ~WAKE_MAGIC) | 635 | if (wol->wolopts & ~WAKE_MAGIC) |
636 | return -EINVAL; | 636 | return -EINVAL; |
637 | 637 | ||
638 | device_set_wakeup_enable(&dev->dev, wol->wolopts & WAKE_MAGIC); | ||
639 | |||
638 | spin_lock_irqsave(&priv->bflock, flags); | 640 | spin_lock_irqsave(&priv->bflock, flags); |
639 | priv->wol_en = wol->wolopts & WAKE_MAGIC ? 1 : 0; | 641 | priv->wol_en = !!device_may_wakeup(&dev->dev); |
640 | device_set_wakeup_enable(&dev->dev, priv->wol_en); | ||
641 | spin_unlock_irqrestore(&priv->bflock, flags); | 642 | spin_unlock_irqrestore(&priv->bflock, flags); |
642 | 643 | ||
643 | return 0; | 644 | return 0; |
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c index 385dc3204cb7..06bb9b799458 100644 --- a/drivers/net/ibm_newemac/core.c +++ b/drivers/net/ibm_newemac/core.c | |||
@@ -2871,7 +2871,6 @@ static int __devinit emac_probe(struct platform_device *ofdev, | |||
2871 | SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops); | 2871 | SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops); |
2872 | 2872 | ||
2873 | netif_carrier_off(ndev); | 2873 | netif_carrier_off(ndev); |
2874 | netif_stop_queue(ndev); | ||
2875 | 2874 | ||
2876 | err = register_netdev(ndev); | 2875 | err = register_netdev(ndev); |
2877 | if (err) { | 2876 | if (err) { |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index 14db09e2fa8b..892d196f17ac 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -4107,7 +4107,6 @@ static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, int size) | |||
4107 | netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb, | 4107 | netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *skb, |
4108 | struct igb_ring *tx_ring) | 4108 | struct igb_ring *tx_ring) |
4109 | { | 4109 | { |
4110 | struct igb_adapter *adapter = netdev_priv(tx_ring->netdev); | ||
4111 | int tso = 0, count; | 4110 | int tso = 0, count; |
4112 | u32 tx_flags = 0; | 4111 | u32 tx_flags = 0; |
4113 | u16 first; | 4112 | u16 first; |
diff --git a/drivers/net/igbvf/netdev.c b/drivers/net/igbvf/netdev.c index ebfaa68ee630..28af019c97bb 100644 --- a/drivers/net/igbvf/netdev.c +++ b/drivers/net/igbvf/netdev.c | |||
@@ -2783,15 +2783,15 @@ static int __devinit igbvf_probe(struct pci_dev *pdev, | |||
2783 | /* reset the hardware with the new settings */ | 2783 | /* reset the hardware with the new settings */ |
2784 | igbvf_reset(adapter); | 2784 | igbvf_reset(adapter); |
2785 | 2785 | ||
2786 | /* tell the stack to leave us alone until igbvf_open() is called */ | ||
2787 | netif_carrier_off(netdev); | ||
2788 | netif_stop_queue(netdev); | ||
2789 | |||
2790 | strcpy(netdev->name, "eth%d"); | 2786 | strcpy(netdev->name, "eth%d"); |
2791 | err = register_netdev(netdev); | 2787 | err = register_netdev(netdev); |
2792 | if (err) | 2788 | if (err) |
2793 | goto err_hw_init; | 2789 | goto err_hw_init; |
2794 | 2790 | ||
2791 | /* tell the stack to leave us alone until igbvf_open() is called */ | ||
2792 | netif_carrier_off(netdev); | ||
2793 | netif_stop_queue(netdev); | ||
2794 | |||
2795 | igbvf_print_device_info(adapter); | 2795 | igbvf_print_device_info(adapter); |
2796 | 2796 | ||
2797 | igbvf_initialize_last_counter_stats(adapter); | 2797 | igbvf_initialize_last_counter_stats(adapter); |
diff --git a/drivers/net/ipg.c b/drivers/net/ipg.c index dc0198092343..aa93655c3aa7 100644 --- a/drivers/net/ipg.c +++ b/drivers/net/ipg.c | |||
@@ -88,16 +88,14 @@ static const char *ipg_brand_name[] = { | |||
88 | "IC PLUS IP1000 1000/100/10 based NIC", | 88 | "IC PLUS IP1000 1000/100/10 based NIC", |
89 | "Sundance Technology ST2021 based NIC", | 89 | "Sundance Technology ST2021 based NIC", |
90 | "Tamarack Microelectronics TC9020/9021 based NIC", | 90 | "Tamarack Microelectronics TC9020/9021 based NIC", |
91 | "Tamarack Microelectronics TC9020/9021 based NIC", | ||
92 | "D-Link NIC IP1000A" | 91 | "D-Link NIC IP1000A" |
93 | }; | 92 | }; |
94 | 93 | ||
95 | static DEFINE_PCI_DEVICE_TABLE(ipg_pci_tbl) = { | 94 | static DEFINE_PCI_DEVICE_TABLE(ipg_pci_tbl) = { |
96 | { PCI_VDEVICE(SUNDANCE, 0x1023), 0 }, | 95 | { PCI_VDEVICE(SUNDANCE, 0x1023), 0 }, |
97 | { PCI_VDEVICE(SUNDANCE, 0x2021), 1 }, | 96 | { PCI_VDEVICE(SUNDANCE, 0x2021), 1 }, |
98 | { PCI_VDEVICE(SUNDANCE, 0x1021), 2 }, | 97 | { PCI_VDEVICE(DLINK, 0x9021), 2 }, |
99 | { PCI_VDEVICE(DLINK, 0x9021), 3 }, | 98 | { PCI_VDEVICE(DLINK, 0x4020), 3 }, |
100 | { PCI_VDEVICE(DLINK, 0x4020), 4 }, | ||
101 | { 0, } | 99 | { 0, } |
102 | }; | 100 | }; |
103 | 101 | ||
diff --git a/drivers/net/irda/sh_sir.c b/drivers/net/irda/sh_sir.c index 00b38bccd6d0..52a7c86af663 100644 --- a/drivers/net/irda/sh_sir.c +++ b/drivers/net/irda/sh_sir.c | |||
@@ -258,7 +258,7 @@ static int sh_sir_set_baudrate(struct sh_sir_self *self, u32 baudrate) | |||
258 | 258 | ||
259 | /* Baud Rate Error Correction x 10000 */ | 259 | /* Baud Rate Error Correction x 10000 */ |
260 | u32 rate_err_array[] = { | 260 | u32 rate_err_array[] = { |
261 | 0000, 0625, 1250, 1875, | 261 | 0, 625, 1250, 1875, |
262 | 2500, 3125, 3750, 4375, | 262 | 2500, 3125, 3750, 4375, |
263 | 5000, 5625, 6250, 6875, | 263 | 5000, 5625, 6250, 6875, |
264 | 7500, 8125, 8750, 9375, | 264 | 7500, 8125, 8750, 9375, |
diff --git a/drivers/net/ixgb/ixgb_main.c b/drivers/net/ixgb/ixgb_main.c index 666207a9c039..caa8192fff2a 100644 --- a/drivers/net/ixgb/ixgb_main.c +++ b/drivers/net/ixgb/ixgb_main.c | |||
@@ -533,6 +533,7 @@ ixgb_remove(struct pci_dev *pdev) | |||
533 | pci_release_regions(pdev); | 533 | pci_release_regions(pdev); |
534 | 534 | ||
535 | free_netdev(netdev); | 535 | free_netdev(netdev); |
536 | pci_disable_device(pdev); | ||
536 | } | 537 | } |
537 | 538 | ||
538 | /** | 539 | /** |
diff --git a/drivers/net/ixgbe/ixgbe_dcb.c b/drivers/net/ixgbe/ixgbe_dcb.c index 8bb9ddb6dffe..0d44c6470ca3 100644 --- a/drivers/net/ixgbe/ixgbe_dcb.c +++ b/drivers/net/ixgbe/ixgbe_dcb.c | |||
@@ -43,9 +43,12 @@ | |||
43 | * ixgbe_dcb_check_config(). | 43 | * ixgbe_dcb_check_config(). |
44 | */ | 44 | */ |
45 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | 45 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, |
46 | u8 direction) | 46 | int max_frame, u8 direction) |
47 | { | 47 | { |
48 | struct tc_bw_alloc *p; | 48 | struct tc_bw_alloc *p; |
49 | int min_credit; | ||
50 | int min_multiplier; | ||
51 | int min_percent = 100; | ||
49 | s32 ret_val = 0; | 52 | s32 ret_val = 0; |
50 | /* Initialization values default for Tx settings */ | 53 | /* Initialization values default for Tx settings */ |
51 | u32 credit_refill = 0; | 54 | u32 credit_refill = 0; |
@@ -59,6 +62,31 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
59 | goto out; | 62 | goto out; |
60 | } | 63 | } |
61 | 64 | ||
65 | min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) / | ||
66 | DCB_CREDIT_QUANTUM; | ||
67 | |||
68 | /* Find smallest link percentage */ | ||
69 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | ||
70 | p = &dcb_config->tc_config[i].path[direction]; | ||
71 | bw_percent = dcb_config->bw_percentage[direction][p->bwg_id]; | ||
72 | link_percentage = p->bwg_percent; | ||
73 | |||
74 | link_percentage = (link_percentage * bw_percent) / 100; | ||
75 | |||
76 | if (link_percentage && link_percentage < min_percent) | ||
77 | min_percent = link_percentage; | ||
78 | } | ||
79 | |||
80 | /* | ||
81 | * The ratio between traffic classes will control the bandwidth | ||
82 | * percentages seen on the wire. To calculate this ratio we use | ||
83 | * a multiplier. It is required that the refill credits must be | ||
84 | * larger than the max frame size so here we find the smallest | ||
85 | * multiplier that will allow all bandwidth percentages to be | ||
86 | * greater than the max frame size. | ||
87 | */ | ||
88 | min_multiplier = (min_credit / min_percent) + 1; | ||
89 | |||
62 | /* Find out the link percentage for each TC first */ | 90 | /* Find out the link percentage for each TC first */ |
63 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { | 91 | for (i = 0; i < MAX_TRAFFIC_CLASS; i++) { |
64 | p = &dcb_config->tc_config[i].path[direction]; | 92 | p = &dcb_config->tc_config[i].path[direction]; |
@@ -73,8 +101,9 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
73 | /* Save link_percentage for reference */ | 101 | /* Save link_percentage for reference */ |
74 | p->link_percent = (u8)link_percentage; | 102 | p->link_percent = (u8)link_percentage; |
75 | 103 | ||
76 | /* Calculate credit refill and save it */ | 104 | /* Calculate credit refill ratio using multiplier */ |
77 | credit_refill = link_percentage * MINIMUM_CREDIT_REFILL; | 105 | credit_refill = min(link_percentage * min_multiplier, |
106 | MAX_CREDIT_REFILL); | ||
78 | p->data_credits_refill = (u16)credit_refill; | 107 | p->data_credits_refill = (u16)credit_refill; |
79 | 108 | ||
80 | /* Calculate maximum credit for the TC */ | 109 | /* Calculate maximum credit for the TC */ |
@@ -85,8 +114,8 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config, | |||
85 | * of a TC is too small, the maximum credit may not be | 114 | * of a TC is too small, the maximum credit may not be |
86 | * enough to send out a jumbo frame in data plane arbitration. | 115 | * enough to send out a jumbo frame in data plane arbitration. |
87 | */ | 116 | */ |
88 | if (credit_max && (credit_max < MINIMUM_CREDIT_FOR_JUMBO)) | 117 | if (credit_max && (credit_max < min_credit)) |
89 | credit_max = MINIMUM_CREDIT_FOR_JUMBO; | 118 | credit_max = min_credit; |
90 | 119 | ||
91 | if (direction == DCB_TX_CONFIG) { | 120 | if (direction == DCB_TX_CONFIG) { |
92 | /* | 121 | /* |
diff --git a/drivers/net/ixgbe/ixgbe_dcb.h b/drivers/net/ixgbe/ixgbe_dcb.h index eb1059f09da0..0208a87b129e 100644 --- a/drivers/net/ixgbe/ixgbe_dcb.h +++ b/drivers/net/ixgbe/ixgbe_dcb.h | |||
@@ -150,15 +150,14 @@ struct ixgbe_dcb_config { | |||
150 | /* DCB driver APIs */ | 150 | /* DCB driver APIs */ |
151 | 151 | ||
152 | /* DCB credits calculation */ | 152 | /* DCB credits calculation */ |
153 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *, u8); | 153 | s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *, int, u8); |
154 | 154 | ||
155 | /* DCB hw initialization */ | 155 | /* DCB hw initialization */ |
156 | s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *); | 156 | s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *); |
157 | 157 | ||
158 | /* DCB definitions for credit calculation */ | 158 | /* DCB definitions for credit calculation */ |
159 | #define DCB_CREDIT_QUANTUM 64 /* DCB Quantum */ | ||
159 | #define MAX_CREDIT_REFILL 511 /* 0x1FF * 64B = 32704B */ | 160 | #define MAX_CREDIT_REFILL 511 /* 0x1FF * 64B = 32704B */ |
160 | #define MINIMUM_CREDIT_REFILL 5 /* 5*64B = 320B */ | ||
161 | #define MINIMUM_CREDIT_FOR_JUMBO 145 /* 145= UpperBound((9*1024+54)/64B) for 9KB jumbo frame */ | ||
162 | #define DCB_MAX_TSO_SIZE (32*1024) /* MAX TSO packet size supported in DCB mode */ | 161 | #define DCB_MAX_TSO_SIZE (32*1024) /* MAX TSO packet size supported in DCB mode */ |
163 | #define MINIMUM_CREDIT_FOR_TSO (DCB_MAX_TSO_SIZE/64 + 1) /* 513 for 32KB TSO packet */ | 162 | #define MINIMUM_CREDIT_FOR_TSO (DCB_MAX_TSO_SIZE/64 + 1) /* 513 for 32KB TSO packet */ |
164 | #define MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1204 / 64B */ | 163 | #define MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1204 / 64B */ |
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.c b/drivers/net/ixgbe/ixgbe_dcb_82599.c index 67c219f86c3a..05f224715073 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_82599.c +++ b/drivers/net/ixgbe/ixgbe_dcb_82599.c | |||
@@ -397,6 +397,11 @@ static s32 ixgbe_dcb_config_82599(struct ixgbe_hw *hw) | |||
397 | reg &= ~IXGBE_RTTDCS_ARBDIS; | 397 | reg &= ~IXGBE_RTTDCS_ARBDIS; |
398 | IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); | 398 | IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); |
399 | 399 | ||
400 | /* Enable Security TX Buffer IFG for DCB */ | ||
401 | reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG); | ||
402 | reg |= IXGBE_SECTX_DCB; | ||
403 | IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg); | ||
404 | |||
400 | return 0; | 405 | return 0; |
401 | } | 406 | } |
402 | 407 | ||
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.h b/drivers/net/ixgbe/ixgbe_dcb_82599.h index 18d7fbf6c292..3841649fb954 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_82599.h +++ b/drivers/net/ixgbe/ixgbe_dcb_82599.h | |||
@@ -95,6 +95,9 @@ | |||
95 | 95 | ||
96 | #define IXGBE_TXPBTHRESH_DCB 0xA /* THRESH value for DCB mode */ | 96 | #define IXGBE_TXPBTHRESH_DCB 0xA /* THRESH value for DCB mode */ |
97 | 97 | ||
98 | /* SECTXMINIFG DCB */ | ||
99 | #define IXGBE_SECTX_DCB 0x00001F00 /* DCB TX Buffer IFG */ | ||
100 | |||
98 | 101 | ||
99 | /* DCB hardware-specific driver APIs */ | 102 | /* DCB hardware-specific driver APIs */ |
100 | 103 | ||
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index f85631263af8..fbad4d819608 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -764,8 +764,9 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector, | |||
764 | #ifdef IXGBE_FCOE | 764 | #ifdef IXGBE_FCOE |
765 | /* adjust for FCoE Sequence Offload */ | 765 | /* adjust for FCoE Sequence Offload */ |
766 | if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) | 766 | if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) |
767 | && (skb->protocol == htons(ETH_P_FCOE)) && | 767 | && skb_is_gso(skb) |
768 | skb_is_gso(skb)) { | 768 | && vlan_get_protocol(skb) == |
769 | htons(ETH_P_FCOE)) { | ||
769 | hlen = skb_transport_offset(skb) + | 770 | hlen = skb_transport_offset(skb) + |
770 | sizeof(struct fc_frame_header) + | 771 | sizeof(struct fc_frame_header) + |
771 | sizeof(struct fcoe_crc_eof); | 772 | sizeof(struct fcoe_crc_eof); |
@@ -3347,6 +3348,7 @@ static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter) | |||
3347 | static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) | 3348 | static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) |
3348 | { | 3349 | { |
3349 | struct ixgbe_hw *hw = &adapter->hw; | 3350 | struct ixgbe_hw *hw = &adapter->hw; |
3351 | int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN; | ||
3350 | u32 txdctl; | 3352 | u32 txdctl; |
3351 | int i, j; | 3353 | int i, j; |
3352 | 3354 | ||
@@ -3359,8 +3361,15 @@ static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter) | |||
3359 | if (hw->mac.type == ixgbe_mac_82598EB) | 3361 | if (hw->mac.type == ixgbe_mac_82598EB) |
3360 | netif_set_gso_max_size(adapter->netdev, 32768); | 3362 | netif_set_gso_max_size(adapter->netdev, 32768); |
3361 | 3363 | ||
3362 | ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG); | 3364 | #ifdef CONFIG_FCOE |
3363 | ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG); | 3365 | if (adapter->netdev->features & NETIF_F_FCOE_MTU) |
3366 | max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE); | ||
3367 | #endif | ||
3368 | |||
3369 | ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, max_frame, | ||
3370 | DCB_TX_CONFIG); | ||
3371 | ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, max_frame, | ||
3372 | DCB_RX_CONFIG); | ||
3364 | 3373 | ||
3365 | /* reconfigure the hardware */ | 3374 | /* reconfigure the hardware */ |
3366 | ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg); | 3375 | ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg); |
@@ -5815,7 +5824,7 @@ static void ixgbe_watchdog_task(struct work_struct *work) | |||
5815 | 5824 | ||
5816 | static int ixgbe_tso(struct ixgbe_adapter *adapter, | 5825 | static int ixgbe_tso(struct ixgbe_adapter *adapter, |
5817 | struct ixgbe_ring *tx_ring, struct sk_buff *skb, | 5826 | struct ixgbe_ring *tx_ring, struct sk_buff *skb, |
5818 | u32 tx_flags, u8 *hdr_len) | 5827 | u32 tx_flags, u8 *hdr_len, __be16 protocol) |
5819 | { | 5828 | { |
5820 | struct ixgbe_adv_tx_context_desc *context_desc; | 5829 | struct ixgbe_adv_tx_context_desc *context_desc; |
5821 | unsigned int i; | 5830 | unsigned int i; |
@@ -5833,7 +5842,7 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter, | |||
5833 | l4len = tcp_hdrlen(skb); | 5842 | l4len = tcp_hdrlen(skb); |
5834 | *hdr_len += l4len; | 5843 | *hdr_len += l4len; |
5835 | 5844 | ||
5836 | if (skb->protocol == htons(ETH_P_IP)) { | 5845 | if (protocol == htons(ETH_P_IP)) { |
5837 | struct iphdr *iph = ip_hdr(skb); | 5846 | struct iphdr *iph = ip_hdr(skb); |
5838 | iph->tot_len = 0; | 5847 | iph->tot_len = 0; |
5839 | iph->check = 0; | 5848 | iph->check = 0; |
@@ -5872,7 +5881,7 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter, | |||
5872 | type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT | | 5881 | type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT | |
5873 | IXGBE_ADVTXD_DTYP_CTXT); | 5882 | IXGBE_ADVTXD_DTYP_CTXT); |
5874 | 5883 | ||
5875 | if (skb->protocol == htons(ETH_P_IP)) | 5884 | if (protocol == htons(ETH_P_IP)) |
5876 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; | 5885 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4; |
5877 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP; | 5886 | type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP; |
5878 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); | 5887 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); |
@@ -5898,16 +5907,10 @@ static int ixgbe_tso(struct ixgbe_adapter *adapter, | |||
5898 | return false; | 5907 | return false; |
5899 | } | 5908 | } |
5900 | 5909 | ||
5901 | static u32 ixgbe_psum(struct ixgbe_adapter *adapter, struct sk_buff *skb) | 5910 | static u32 ixgbe_psum(struct ixgbe_adapter *adapter, struct sk_buff *skb, |
5911 | __be16 protocol) | ||
5902 | { | 5912 | { |
5903 | u32 rtn = 0; | 5913 | u32 rtn = 0; |
5904 | __be16 protocol; | ||
5905 | |||
5906 | if (skb->protocol == cpu_to_be16(ETH_P_8021Q)) | ||
5907 | protocol = ((const struct vlan_ethhdr *)skb->data)-> | ||
5908 | h_vlan_encapsulated_proto; | ||
5909 | else | ||
5910 | protocol = skb->protocol; | ||
5911 | 5914 | ||
5912 | switch (protocol) { | 5915 | switch (protocol) { |
5913 | case cpu_to_be16(ETH_P_IP): | 5916 | case cpu_to_be16(ETH_P_IP): |
@@ -5935,7 +5938,7 @@ static u32 ixgbe_psum(struct ixgbe_adapter *adapter, struct sk_buff *skb) | |||
5935 | default: | 5938 | default: |
5936 | if (unlikely(net_ratelimit())) | 5939 | if (unlikely(net_ratelimit())) |
5937 | e_warn(probe, "partial checksum but proto=%x!\n", | 5940 | e_warn(probe, "partial checksum but proto=%x!\n", |
5938 | skb->protocol); | 5941 | protocol); |
5939 | break; | 5942 | break; |
5940 | } | 5943 | } |
5941 | 5944 | ||
@@ -5944,7 +5947,8 @@ static u32 ixgbe_psum(struct ixgbe_adapter *adapter, struct sk_buff *skb) | |||
5944 | 5947 | ||
5945 | static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter, | 5948 | static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter, |
5946 | struct ixgbe_ring *tx_ring, | 5949 | struct ixgbe_ring *tx_ring, |
5947 | struct sk_buff *skb, u32 tx_flags) | 5950 | struct sk_buff *skb, u32 tx_flags, |
5951 | __be16 protocol) | ||
5948 | { | 5952 | { |
5949 | struct ixgbe_adv_tx_context_desc *context_desc; | 5953 | struct ixgbe_adv_tx_context_desc *context_desc; |
5950 | unsigned int i; | 5954 | unsigned int i; |
@@ -5973,7 +5977,7 @@ static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter, | |||
5973 | IXGBE_ADVTXD_DTYP_CTXT); | 5977 | IXGBE_ADVTXD_DTYP_CTXT); |
5974 | 5978 | ||
5975 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 5979 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
5976 | type_tucmd_mlhl |= ixgbe_psum(adapter, skb); | 5980 | type_tucmd_mlhl |= ixgbe_psum(adapter, skb, protocol); |
5977 | 5981 | ||
5978 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); | 5982 | context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl); |
5979 | /* use index zero for tx checksum offload */ | 5983 | /* use index zero for tx checksum offload */ |
@@ -6171,7 +6175,7 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter, | |||
6171 | } | 6175 | } |
6172 | 6176 | ||
6173 | static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb, | 6177 | static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb, |
6174 | int queue, u32 tx_flags) | 6178 | int queue, u32 tx_flags, __be16 protocol) |
6175 | { | 6179 | { |
6176 | struct ixgbe_atr_input atr_input; | 6180 | struct ixgbe_atr_input atr_input; |
6177 | struct tcphdr *th; | 6181 | struct tcphdr *th; |
@@ -6182,7 +6186,7 @@ static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb, | |||
6182 | u8 l4type = 0; | 6186 | u8 l4type = 0; |
6183 | 6187 | ||
6184 | /* Right now, we support IPv4 only */ | 6188 | /* Right now, we support IPv4 only */ |
6185 | if (skb->protocol != htons(ETH_P_IP)) | 6189 | if (protocol != htons(ETH_P_IP)) |
6186 | return; | 6190 | return; |
6187 | /* check if we're UDP or TCP */ | 6191 | /* check if we're UDP or TCP */ |
6188 | if (iph->protocol == IPPROTO_TCP) { | 6192 | if (iph->protocol == IPPROTO_TCP) { |
@@ -6249,10 +6253,13 @@ static u16 ixgbe_select_queue(struct net_device *dev, struct sk_buff *skb) | |||
6249 | { | 6253 | { |
6250 | struct ixgbe_adapter *adapter = netdev_priv(dev); | 6254 | struct ixgbe_adapter *adapter = netdev_priv(dev); |
6251 | int txq = smp_processor_id(); | 6255 | int txq = smp_processor_id(); |
6252 | |||
6253 | #ifdef IXGBE_FCOE | 6256 | #ifdef IXGBE_FCOE |
6254 | if ((skb->protocol == htons(ETH_P_FCOE)) || | 6257 | __be16 protocol; |
6255 | (skb->protocol == htons(ETH_P_FIP))) { | 6258 | |
6259 | protocol = vlan_get_protocol(skb); | ||
6260 | |||
6261 | if ((protocol == htons(ETH_P_FCOE)) || | ||
6262 | (protocol == htons(ETH_P_FIP))) { | ||
6256 | if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { | 6263 | if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { |
6257 | txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1); | 6264 | txq &= (adapter->ring_feature[RING_F_FCOE].indices - 1); |
6258 | txq += adapter->ring_feature[RING_F_FCOE].mask; | 6265 | txq += adapter->ring_feature[RING_F_FCOE].mask; |
@@ -6295,6 +6302,9 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev | |||
6295 | int tso; | 6302 | int tso; |
6296 | int count = 0; | 6303 | int count = 0; |
6297 | unsigned int f; | 6304 | unsigned int f; |
6305 | __be16 protocol; | ||
6306 | |||
6307 | protocol = vlan_get_protocol(skb); | ||
6298 | 6308 | ||
6299 | if (vlan_tx_tag_present(skb)) { | 6309 | if (vlan_tx_tag_present(skb)) { |
6300 | tx_flags |= vlan_tx_tag_get(skb); | 6310 | tx_flags |= vlan_tx_tag_get(skb); |
@@ -6315,8 +6325,8 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev | |||
6315 | /* for FCoE with DCB, we force the priority to what | 6325 | /* for FCoE with DCB, we force the priority to what |
6316 | * was specified by the switch */ | 6326 | * was specified by the switch */ |
6317 | if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED && | 6327 | if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED && |
6318 | (skb->protocol == htons(ETH_P_FCOE) || | 6328 | (protocol == htons(ETH_P_FCOE) || |
6319 | skb->protocol == htons(ETH_P_FIP))) { | 6329 | protocol == htons(ETH_P_FIP))) { |
6320 | #ifdef CONFIG_IXGBE_DCB | 6330 | #ifdef CONFIG_IXGBE_DCB |
6321 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 6331 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { |
6322 | tx_flags &= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK | 6332 | tx_flags &= ~(IXGBE_TX_FLAGS_VLAN_PRIO_MASK |
@@ -6326,7 +6336,7 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev | |||
6326 | } | 6336 | } |
6327 | #endif | 6337 | #endif |
6328 | /* flag for FCoE offloads */ | 6338 | /* flag for FCoE offloads */ |
6329 | if (skb->protocol == htons(ETH_P_FCOE)) | 6339 | if (protocol == htons(ETH_P_FCOE)) |
6330 | tx_flags |= IXGBE_TX_FLAGS_FCOE; | 6340 | tx_flags |= IXGBE_TX_FLAGS_FCOE; |
6331 | } | 6341 | } |
6332 | #endif | 6342 | #endif |
@@ -6360,9 +6370,10 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev | |||
6360 | tx_flags |= IXGBE_TX_FLAGS_FSO; | 6370 | tx_flags |= IXGBE_TX_FLAGS_FSO; |
6361 | #endif /* IXGBE_FCOE */ | 6371 | #endif /* IXGBE_FCOE */ |
6362 | } else { | 6372 | } else { |
6363 | if (skb->protocol == htons(ETH_P_IP)) | 6373 | if (protocol == htons(ETH_P_IP)) |
6364 | tx_flags |= IXGBE_TX_FLAGS_IPV4; | 6374 | tx_flags |= IXGBE_TX_FLAGS_IPV4; |
6365 | tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len); | 6375 | tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len, |
6376 | protocol); | ||
6366 | if (tso < 0) { | 6377 | if (tso < 0) { |
6367 | dev_kfree_skb_any(skb); | 6378 | dev_kfree_skb_any(skb); |
6368 | return NETDEV_TX_OK; | 6379 | return NETDEV_TX_OK; |
@@ -6370,7 +6381,8 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev | |||
6370 | 6381 | ||
6371 | if (tso) | 6382 | if (tso) |
6372 | tx_flags |= IXGBE_TX_FLAGS_TSO; | 6383 | tx_flags |= IXGBE_TX_FLAGS_TSO; |
6373 | else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) && | 6384 | else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags, |
6385 | protocol) && | ||
6374 | (skb->ip_summed == CHECKSUM_PARTIAL)) | 6386 | (skb->ip_summed == CHECKSUM_PARTIAL)) |
6375 | tx_flags |= IXGBE_TX_FLAGS_CSUM; | 6387 | tx_flags |= IXGBE_TX_FLAGS_CSUM; |
6376 | } | 6388 | } |
@@ -6384,7 +6396,7 @@ netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb, struct net_device *netdev | |||
6384 | test_bit(__IXGBE_FDIR_INIT_DONE, | 6396 | test_bit(__IXGBE_FDIR_INIT_DONE, |
6385 | &tx_ring->reinit_state)) { | 6397 | &tx_ring->reinit_state)) { |
6386 | ixgbe_atr(adapter, skb, tx_ring->queue_index, | 6398 | ixgbe_atr(adapter, skb, tx_ring->queue_index, |
6387 | tx_flags); | 6399 | tx_flags, protocol); |
6388 | tx_ring->atr_count = 0; | 6400 | tx_ring->atr_count = 0; |
6389 | } | 6401 | } |
6390 | } | 6402 | } |
diff --git a/drivers/net/jme.c b/drivers/net/jme.c index d7a975ee2add..c57d9a43ceca 100644 --- a/drivers/net/jme.c +++ b/drivers/net/jme.c | |||
@@ -1623,12 +1623,12 @@ err_out: | |||
1623 | return rc; | 1623 | return rc; |
1624 | } | 1624 | } |
1625 | 1625 | ||
1626 | #ifdef CONFIG_PM | ||
1627 | static void | 1626 | static void |
1628 | jme_set_100m_half(struct jme_adapter *jme) | 1627 | jme_set_100m_half(struct jme_adapter *jme) |
1629 | { | 1628 | { |
1630 | u32 bmcr, tmp; | 1629 | u32 bmcr, tmp; |
1631 | 1630 | ||
1631 | jme_phy_on(jme); | ||
1632 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | 1632 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1633 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | 1633 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | |
1634 | BMCR_SPEED1000 | BMCR_FULLDPLX); | 1634 | BMCR_SPEED1000 | BMCR_FULLDPLX); |
@@ -1656,7 +1656,6 @@ jme_wait_link(struct jme_adapter *jme) | |||
1656 | phylink = jme_linkstat_from_phy(jme); | 1656 | phylink = jme_linkstat_from_phy(jme); |
1657 | } | 1657 | } |
1658 | } | 1658 | } |
1659 | #endif | ||
1660 | 1659 | ||
1661 | static inline void | 1660 | static inline void |
1662 | jme_phy_off(struct jme_adapter *jme) | 1661 | jme_phy_off(struct jme_adapter *jme) |
@@ -1664,6 +1663,21 @@ jme_phy_off(struct jme_adapter *jme) | |||
1664 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); | 1663 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, BMCR_PDOWN); |
1665 | } | 1664 | } |
1666 | 1665 | ||
1666 | static void | ||
1667 | jme_powersave_phy(struct jme_adapter *jme) | ||
1668 | { | ||
1669 | if (jme->reg_pmcs) { | ||
1670 | jme_set_100m_half(jme); | ||
1671 | |||
1672 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | ||
1673 | jme_wait_link(jme); | ||
1674 | |||
1675 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | ||
1676 | } else { | ||
1677 | jme_phy_off(jme); | ||
1678 | } | ||
1679 | } | ||
1680 | |||
1667 | static int | 1681 | static int |
1668 | jme_close(struct net_device *netdev) | 1682 | jme_close(struct net_device *netdev) |
1669 | { | 1683 | { |
@@ -2941,11 +2955,7 @@ jme_init_one(struct pci_dev *pdev, | |||
2941 | * Tell stack that we are not ready to work until open() | 2955 | * Tell stack that we are not ready to work until open() |
2942 | */ | 2956 | */ |
2943 | netif_carrier_off(netdev); | 2957 | netif_carrier_off(netdev); |
2944 | netif_stop_queue(netdev); | ||
2945 | 2958 | ||
2946 | /* | ||
2947 | * Register netdev | ||
2948 | */ | ||
2949 | rc = register_netdev(netdev); | 2959 | rc = register_netdev(netdev); |
2950 | if (rc) { | 2960 | if (rc) { |
2951 | pr_err("Cannot register net device\n"); | 2961 | pr_err("Cannot register net device\n"); |
@@ -2991,6 +3001,16 @@ jme_remove_one(struct pci_dev *pdev) | |||
2991 | 3001 | ||
2992 | } | 3002 | } |
2993 | 3003 | ||
3004 | static void | ||
3005 | jme_shutdown(struct pci_dev *pdev) | ||
3006 | { | ||
3007 | struct net_device *netdev = pci_get_drvdata(pdev); | ||
3008 | struct jme_adapter *jme = netdev_priv(netdev); | ||
3009 | |||
3010 | jme_powersave_phy(jme); | ||
3011 | pci_pme_active(pdev, true); | ||
3012 | } | ||
3013 | |||
2994 | #ifdef CONFIG_PM | 3014 | #ifdef CONFIG_PM |
2995 | static int | 3015 | static int |
2996 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | 3016 | jme_suspend(struct pci_dev *pdev, pm_message_t state) |
@@ -3028,19 +3048,9 @@ jme_suspend(struct pci_dev *pdev, pm_message_t state) | |||
3028 | tasklet_hi_enable(&jme->rxempty_task); | 3048 | tasklet_hi_enable(&jme->rxempty_task); |
3029 | 3049 | ||
3030 | pci_save_state(pdev); | 3050 | pci_save_state(pdev); |
3031 | if (jme->reg_pmcs) { | 3051 | jme_powersave_phy(jme); |
3032 | jme_set_100m_half(jme); | 3052 | pci_enable_wake(jme->pdev, PCI_D3hot, true); |
3033 | 3053 | pci_set_power_state(pdev, PCI_D3hot); | |
3034 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | ||
3035 | jme_wait_link(jme); | ||
3036 | |||
3037 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | ||
3038 | |||
3039 | pci_enable_wake(pdev, PCI_D3cold, true); | ||
3040 | } else { | ||
3041 | jme_phy_off(jme); | ||
3042 | } | ||
3043 | pci_set_power_state(pdev, PCI_D3cold); | ||
3044 | 3054 | ||
3045 | return 0; | 3055 | return 0; |
3046 | } | 3056 | } |
@@ -3087,6 +3097,7 @@ static struct pci_driver jme_driver = { | |||
3087 | .suspend = jme_suspend, | 3097 | .suspend = jme_suspend, |
3088 | .resume = jme_resume, | 3098 | .resume = jme_resume, |
3089 | #endif /* CONFIG_PM */ | 3099 | #endif /* CONFIG_PM */ |
3100 | .shutdown = jme_shutdown, | ||
3090 | }; | 3101 | }; |
3091 | 3102 | ||
3092 | static int __init | 3103 | static int __init |
diff --git a/drivers/net/lib8390.c b/drivers/net/lib8390.c index 316bb70775b1..e7030ceb178b 100644 --- a/drivers/net/lib8390.c +++ b/drivers/net/lib8390.c | |||
@@ -1077,7 +1077,6 @@ static void __NS8390_init(struct net_device *dev, int startp) | |||
1077 | ei_outb_p(ei_local->rx_start_page, e8390_base + EN1_CURPAG); | 1077 | ei_outb_p(ei_local->rx_start_page, e8390_base + EN1_CURPAG); |
1078 | ei_outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); | 1078 | ei_outb_p(E8390_NODMA+E8390_PAGE0+E8390_STOP, e8390_base+E8390_CMD); |
1079 | 1079 | ||
1080 | netif_start_queue(dev); | ||
1081 | ei_local->tx1 = ei_local->tx2 = 0; | 1080 | ei_local->tx1 = ei_local->tx2 = 0; |
1082 | ei_local->txing = 0; | 1081 | ei_local->txing = 0; |
1083 | 1082 | ||
diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 4297f6e8c4bc..f69e73e2191e 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c | |||
@@ -515,14 +515,15 @@ static int macb_poll(struct napi_struct *napi, int budget) | |||
515 | (unsigned long)status, budget); | 515 | (unsigned long)status, budget); |
516 | 516 | ||
517 | work_done = macb_rx(bp, budget); | 517 | work_done = macb_rx(bp, budget); |
518 | if (work_done < budget) | 518 | if (work_done < budget) { |
519 | napi_complete(napi); | 519 | napi_complete(napi); |
520 | 520 | ||
521 | /* | 521 | /* |
522 | * We've done what we can to clean the buffers. Make sure we | 522 | * We've done what we can to clean the buffers. Make sure we |
523 | * get notified when new packets arrive. | 523 | * get notified when new packets arrive. |
524 | */ | 524 | */ |
525 | macb_writel(bp, IER, MACB_RX_INT_FLAGS); | 525 | macb_writel(bp, IER, MACB_RX_INT_FLAGS); |
526 | } | ||
526 | 527 | ||
527 | /* TODO: Handle errors */ | 528 | /* TODO: Handle errors */ |
528 | 529 | ||
@@ -550,12 +551,16 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) | |||
550 | } | 551 | } |
551 | 552 | ||
552 | if (status & MACB_RX_INT_FLAGS) { | 553 | if (status & MACB_RX_INT_FLAGS) { |
554 | /* | ||
555 | * There's no point taking any more interrupts | ||
556 | * until we have processed the buffers. The | ||
557 | * scheduling call may fail if the poll routine | ||
558 | * is already scheduled, so disable interrupts | ||
559 | * now. | ||
560 | */ | ||
561 | macb_writel(bp, IDR, MACB_RX_INT_FLAGS); | ||
562 | |||
553 | if (napi_schedule_prep(&bp->napi)) { | 563 | if (napi_schedule_prep(&bp->napi)) { |
554 | /* | ||
555 | * There's no point taking any more interrupts | ||
556 | * until we have processed the buffers | ||
557 | */ | ||
558 | macb_writel(bp, IDR, MACB_RX_INT_FLAGS); | ||
559 | dev_dbg(&bp->pdev->dev, | 564 | dev_dbg(&bp->pdev->dev, |
560 | "scheduling RX softirq\n"); | 565 | "scheduling RX softirq\n"); |
561 | __napi_schedule(&bp->napi); | 566 | __napi_schedule(&bp->napi); |
diff --git a/drivers/net/mlx4/icm.c b/drivers/net/mlx4/icm.c index b07e4dee80aa..02393fdf44c1 100644 --- a/drivers/net/mlx4/icm.c +++ b/drivers/net/mlx4/icm.c | |||
@@ -210,38 +210,12 @@ static int mlx4_MAP_ICM(struct mlx4_dev *dev, struct mlx4_icm *icm, u64 virt) | |||
210 | return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt); | 210 | return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM, icm, virt); |
211 | } | 211 | } |
212 | 212 | ||
213 | int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count) | 213 | static int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count) |
214 | { | 214 | { |
215 | return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM, | 215 | return mlx4_cmd(dev, virt, page_count, 0, MLX4_CMD_UNMAP_ICM, |
216 | MLX4_CMD_TIME_CLASS_B); | 216 | MLX4_CMD_TIME_CLASS_B); |
217 | } | 217 | } |
218 | 218 | ||
219 | int mlx4_MAP_ICM_page(struct mlx4_dev *dev, u64 dma_addr, u64 virt) | ||
220 | { | ||
221 | struct mlx4_cmd_mailbox *mailbox; | ||
222 | __be64 *inbox; | ||
223 | int err; | ||
224 | |||
225 | mailbox = mlx4_alloc_cmd_mailbox(dev); | ||
226 | if (IS_ERR(mailbox)) | ||
227 | return PTR_ERR(mailbox); | ||
228 | inbox = mailbox->buf; | ||
229 | |||
230 | inbox[0] = cpu_to_be64(virt); | ||
231 | inbox[1] = cpu_to_be64(dma_addr); | ||
232 | |||
233 | err = mlx4_cmd(dev, mailbox->dma, 1, 0, MLX4_CMD_MAP_ICM, | ||
234 | MLX4_CMD_TIME_CLASS_B); | ||
235 | |||
236 | mlx4_free_cmd_mailbox(dev, mailbox); | ||
237 | |||
238 | if (!err) | ||
239 | mlx4_dbg(dev, "Mapped page at %llx to %llx for ICM.\n", | ||
240 | (unsigned long long) dma_addr, (unsigned long long) virt); | ||
241 | |||
242 | return err; | ||
243 | } | ||
244 | |||
245 | int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm) | 219 | int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm) |
246 | { | 220 | { |
247 | return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1); | 221 | return mlx4_map_cmd(dev, MLX4_CMD_MAP_ICM_AUX, icm, -1); |
diff --git a/drivers/net/mlx4/icm.h b/drivers/net/mlx4/icm.h index ab56a2f89b65..b10c07a1dc1a 100644 --- a/drivers/net/mlx4/icm.h +++ b/drivers/net/mlx4/icm.h | |||
@@ -128,8 +128,6 @@ static inline unsigned long mlx4_icm_size(struct mlx4_icm_iter *iter) | |||
128 | return sg_dma_len(&iter->chunk->mem[iter->page_idx]); | 128 | return sg_dma_len(&iter->chunk->mem[iter->page_idx]); |
129 | } | 129 | } |
130 | 130 | ||
131 | int mlx4_UNMAP_ICM(struct mlx4_dev *dev, u64 virt, u32 page_count); | ||
132 | int mlx4_MAP_ICM_page(struct mlx4_dev *dev, u64 dma_addr, u64 virt); | ||
133 | int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm); | 131 | int mlx4_MAP_ICM_AUX(struct mlx4_dev *dev, struct mlx4_icm *icm); |
134 | int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev); | 132 | int mlx4_UNMAP_ICM_AUX(struct mlx4_dev *dev); |
135 | 133 | ||
diff --git a/drivers/net/mlx4/port.c b/drivers/net/mlx4/port.c index 56371ef328ef..451339559bdc 100644 --- a/drivers/net/mlx4/port.c +++ b/drivers/net/mlx4/port.c | |||
@@ -111,6 +111,12 @@ int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *index) | |||
111 | goto out; | 111 | goto out; |
112 | } | 112 | } |
113 | } | 113 | } |
114 | |||
115 | if (free < 0) { | ||
116 | err = -ENOMEM; | ||
117 | goto out; | ||
118 | } | ||
119 | |||
114 | mlx4_dbg(dev, "Free MAC index is %d\n", free); | 120 | mlx4_dbg(dev, "Free MAC index is %d\n", free); |
115 | 121 | ||
116 | if (table->total == table->max) { | 122 | if (table->total == table->max) { |
@@ -224,6 +230,11 @@ int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) | |||
224 | } | 230 | } |
225 | } | 231 | } |
226 | 232 | ||
233 | if (free < 0) { | ||
234 | err = -ENOMEM; | ||
235 | goto out; | ||
236 | } | ||
237 | |||
227 | if (table->total == table->max) { | 238 | if (table->total == table->max) { |
228 | /* No free vlan entries */ | 239 | /* No free vlan entries */ |
229 | err = -ENOSPC; | 240 | err = -ENOSPC; |
diff --git a/drivers/net/netxen/netxen_nic_ctx.c b/drivers/net/netxen/netxen_nic_ctx.c index 12612127a087..f7d06cbc70ae 100644 --- a/drivers/net/netxen/netxen_nic_ctx.c +++ b/drivers/net/netxen/netxen_nic_ctx.c | |||
@@ -255,19 +255,6 @@ out_free_rq: | |||
255 | } | 255 | } |
256 | 256 | ||
257 | static void | 257 | static void |
258 | nx_fw_cmd_reset_ctx(struct netxen_adapter *adapter) | ||
259 | { | ||
260 | |||
261 | netxen_issue_cmd(adapter, adapter->ahw.pci_func, NXHAL_VERSION, | ||
262 | adapter->ahw.pci_func, NX_DESTROY_CTX_RESET, 0, | ||
263 | NX_CDRP_CMD_DESTROY_RX_CTX); | ||
264 | |||
265 | netxen_issue_cmd(adapter, adapter->ahw.pci_func, NXHAL_VERSION, | ||
266 | adapter->ahw.pci_func, NX_DESTROY_CTX_RESET, 0, | ||
267 | NX_CDRP_CMD_DESTROY_TX_CTX); | ||
268 | } | ||
269 | |||
270 | static void | ||
271 | nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter) | 258 | nx_fw_cmd_destroy_rx_ctx(struct netxen_adapter *adapter) |
272 | { | 259 | { |
273 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | 260 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; |
@@ -698,8 +685,6 @@ int netxen_alloc_hw_resources(struct netxen_adapter *adapter) | |||
698 | if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) { | 685 | if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) { |
699 | if (test_and_set_bit(__NX_FW_ATTACHED, &adapter->state)) | 686 | if (test_and_set_bit(__NX_FW_ATTACHED, &adapter->state)) |
700 | goto done; | 687 | goto done; |
701 | if (reset_devices) | ||
702 | nx_fw_cmd_reset_ctx(adapter); | ||
703 | err = nx_fw_cmd_create_rx_ctx(adapter); | 688 | err = nx_fw_cmd_create_rx_ctx(adapter); |
704 | if (err) | 689 | if (err) |
705 | goto err_out_free; | 690 | goto err_out_free; |
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c index 50820beac3aa..e1d30d7f2071 100644 --- a/drivers/net/netxen/netxen_nic_main.c +++ b/drivers/net/netxen/netxen_nic_main.c | |||
@@ -41,9 +41,6 @@ | |||
41 | MODULE_DESCRIPTION("QLogic/NetXen (1/10) GbE Converged Ethernet Driver"); | 41 | MODULE_DESCRIPTION("QLogic/NetXen (1/10) GbE Converged Ethernet Driver"); |
42 | MODULE_LICENSE("GPL"); | 42 | MODULE_LICENSE("GPL"); |
43 | MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID); | 43 | MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID); |
44 | MODULE_FIRMWARE(NX_P2_MN_ROMIMAGE_NAME); | ||
45 | MODULE_FIRMWARE(NX_P3_CT_ROMIMAGE_NAME); | ||
46 | MODULE_FIRMWARE(NX_P3_MN_ROMIMAGE_NAME); | ||
47 | MODULE_FIRMWARE(NX_UNIFIED_ROMIMAGE_NAME); | 44 | MODULE_FIRMWARE(NX_UNIFIED_ROMIMAGE_NAME); |
48 | 45 | ||
49 | char netxen_nic_driver_name[] = "netxen_nic"; | 46 | char netxen_nic_driver_name[] = "netxen_nic"; |
@@ -1240,7 +1237,6 @@ netxen_setup_netdev(struct netxen_adapter *adapter, | |||
1240 | dev_warn(&pdev->dev, "failed to read mac addr\n"); | 1237 | dev_warn(&pdev->dev, "failed to read mac addr\n"); |
1241 | 1238 | ||
1242 | netif_carrier_off(netdev); | 1239 | netif_carrier_off(netdev); |
1243 | netif_stop_queue(netdev); | ||
1244 | 1240 | ||
1245 | err = register_netdev(netdev); | 1241 | err = register_netdev(netdev); |
1246 | if (err) { | 1242 | if (err) { |
@@ -1356,6 +1352,13 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
1356 | break; | 1352 | break; |
1357 | } | 1353 | } |
1358 | 1354 | ||
1355 | if (reset_devices) { | ||
1356 | if (adapter->portnum == 0) { | ||
1357 | NXWR32(adapter, NX_CRB_DEV_REF_COUNT, 0); | ||
1358 | adapter->need_fw_reset = 1; | ||
1359 | } | ||
1360 | } | ||
1361 | |||
1359 | err = netxen_start_firmware(adapter); | 1362 | err = netxen_start_firmware(adapter); |
1360 | if (err) | 1363 | if (err) |
1361 | goto err_out_decr_ref; | 1364 | goto err_out_decr_ref; |
diff --git a/drivers/net/pch_gbe/pch_gbe_main.c b/drivers/net/pch_gbe/pch_gbe_main.c index 472056b47440..03a1d280105f 100644 --- a/drivers/net/pch_gbe/pch_gbe_main.c +++ b/drivers/net/pch_gbe/pch_gbe_main.c | |||
@@ -1,6 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 1999 - 2010 Intel Corporation. | 2 | * Copyright (C) 1999 - 2010 Intel Corporation. |
3 | * Copyright (C) 2010 OKI SEMICONDUCTOR Co., LTD. | 3 | * Copyright (C) 2010 OKI SEMICONDUCTOR CO., LTD. |
4 | * | 4 | * |
5 | * This code was derived from the Intel e1000e Linux driver. | 5 | * This code was derived from the Intel e1000e Linux driver. |
6 | * | 6 | * |
@@ -2464,8 +2464,8 @@ static void __exit pch_gbe_exit_module(void) | |||
2464 | module_init(pch_gbe_init_module); | 2464 | module_init(pch_gbe_init_module); |
2465 | module_exit(pch_gbe_exit_module); | 2465 | module_exit(pch_gbe_exit_module); |
2466 | 2466 | ||
2467 | MODULE_DESCRIPTION("OKI semiconductor PCH Gigabit ethernet Driver"); | 2467 | MODULE_DESCRIPTION("EG20T PCH Gigabit ethernet Driver"); |
2468 | MODULE_AUTHOR("OKI semiconductor, <masa-korg@dsn.okisemi.com>"); | 2468 | MODULE_AUTHOR("OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com>"); |
2469 | MODULE_LICENSE("GPL"); | 2469 | MODULE_LICENSE("GPL"); |
2470 | MODULE_VERSION(DRV_VERSION); | 2470 | MODULE_VERSION(DRV_VERSION); |
2471 | MODULE_DEVICE_TABLE(pci, pch_gbe_pcidev_id); | 2471 | MODULE_DEVICE_TABLE(pci, pch_gbe_pcidev_id); |
diff --git a/drivers/net/pch_gbe/pch_gbe_param.c b/drivers/net/pch_gbe/pch_gbe_param.c index 2510146fc560..ef0996a0eaaa 100644 --- a/drivers/net/pch_gbe/pch_gbe_param.c +++ b/drivers/net/pch_gbe/pch_gbe_param.c | |||
@@ -434,8 +434,8 @@ void pch_gbe_check_options(struct pch_gbe_adapter *adapter) | |||
434 | .err = "using default of " | 434 | .err = "using default of " |
435 | __MODULE_STRING(PCH_GBE_DEFAULT_TXD), | 435 | __MODULE_STRING(PCH_GBE_DEFAULT_TXD), |
436 | .def = PCH_GBE_DEFAULT_TXD, | 436 | .def = PCH_GBE_DEFAULT_TXD, |
437 | .arg = { .r = { .min = PCH_GBE_MIN_TXD } }, | 437 | .arg = { .r = { .min = PCH_GBE_MIN_TXD, |
438 | .arg = { .r = { .max = PCH_GBE_MAX_TXD } } | 438 | .max = PCH_GBE_MAX_TXD } } |
439 | }; | 439 | }; |
440 | struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; | 440 | struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; |
441 | tx_ring->count = TxDescriptors; | 441 | tx_ring->count = TxDescriptors; |
@@ -450,8 +450,8 @@ void pch_gbe_check_options(struct pch_gbe_adapter *adapter) | |||
450 | .err = "using default of " | 450 | .err = "using default of " |
451 | __MODULE_STRING(PCH_GBE_DEFAULT_RXD), | 451 | __MODULE_STRING(PCH_GBE_DEFAULT_RXD), |
452 | .def = PCH_GBE_DEFAULT_RXD, | 452 | .def = PCH_GBE_DEFAULT_RXD, |
453 | .arg = { .r = { .min = PCH_GBE_MIN_RXD } }, | 453 | .arg = { .r = { .min = PCH_GBE_MIN_RXD, |
454 | .arg = { .r = { .max = PCH_GBE_MAX_RXD } } | 454 | .max = PCH_GBE_MAX_RXD } } |
455 | }; | 455 | }; |
456 | struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; | 456 | struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; |
457 | rx_ring->count = RxDescriptors; | 457 | rx_ring->count = RxDescriptors; |
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c index d2e166e29dda..8a4d19e5de06 100644 --- a/drivers/net/pcmcia/axnet_cs.c +++ b/drivers/net/pcmcia/axnet_cs.c | |||
@@ -111,13 +111,14 @@ static irqreturn_t ax_interrupt(int irq, void *dev_id); | |||
111 | 111 | ||
112 | typedef struct axnet_dev_t { | 112 | typedef struct axnet_dev_t { |
113 | struct pcmcia_device *p_dev; | 113 | struct pcmcia_device *p_dev; |
114 | caddr_t base; | 114 | caddr_t base; |
115 | struct timer_list watchdog; | 115 | struct timer_list watchdog; |
116 | int stale, fast_poll; | 116 | int stale, fast_poll; |
117 | u_short link_status; | 117 | u_short link_status; |
118 | u_char duplex_flag; | 118 | u_char duplex_flag; |
119 | int phy_id; | 119 | int phy_id; |
120 | int flags; | 120 | int flags; |
121 | int active_low; | ||
121 | } axnet_dev_t; | 122 | } axnet_dev_t; |
122 | 123 | ||
123 | static inline axnet_dev_t *PRIV(struct net_device *dev) | 124 | static inline axnet_dev_t *PRIV(struct net_device *dev) |
@@ -322,6 +323,8 @@ static int axnet_config(struct pcmcia_device *link) | |||
322 | if (info->flags & IS_AX88790) | 323 | if (info->flags & IS_AX88790) |
323 | outb(0x10, dev->base_addr + AXNET_GPIO); /* select Internal PHY */ | 324 | outb(0x10, dev->base_addr + AXNET_GPIO); /* select Internal PHY */ |
324 | 325 | ||
326 | info->active_low = 0; | ||
327 | |||
325 | for (i = 0; i < 32; i++) { | 328 | for (i = 0; i < 32; i++) { |
326 | j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); | 329 | j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); |
327 | j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); | 330 | j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); |
@@ -329,15 +332,18 @@ static int axnet_config(struct pcmcia_device *link) | |||
329 | if ((j != 0) && (j != 0xffff)) break; | 332 | if ((j != 0) && (j != 0xffff)) break; |
330 | } | 333 | } |
331 | 334 | ||
332 | /* Maybe PHY is in power down mode. (PPD_SET = 1) | ||
333 | Bit 2 of CCSR is active low. */ | ||
334 | if (i == 32) { | 335 | if (i == 32) { |
336 | /* Maybe PHY is in power down mode. (PPD_SET = 1) | ||
337 | Bit 2 of CCSR is active low. */ | ||
335 | pcmcia_write_config_byte(link, CISREG_CCSR, 0x04); | 338 | pcmcia_write_config_byte(link, CISREG_CCSR, 0x04); |
336 | for (i = 0; i < 32; i++) { | 339 | for (i = 0; i < 32; i++) { |
337 | j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); | 340 | j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); |
338 | j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); | 341 | j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); |
339 | if (j == j2) continue; | 342 | if (j == j2) continue; |
340 | if ((j != 0) && (j != 0xffff)) break; | 343 | if ((j != 0) && (j != 0xffff)) { |
344 | info->active_low = 1; | ||
345 | break; | ||
346 | } | ||
341 | } | 347 | } |
342 | } | 348 | } |
343 | 349 | ||
@@ -383,8 +389,12 @@ static int axnet_suspend(struct pcmcia_device *link) | |||
383 | static int axnet_resume(struct pcmcia_device *link) | 389 | static int axnet_resume(struct pcmcia_device *link) |
384 | { | 390 | { |
385 | struct net_device *dev = link->priv; | 391 | struct net_device *dev = link->priv; |
392 | axnet_dev_t *info = PRIV(dev); | ||
386 | 393 | ||
387 | if (link->open) { | 394 | if (link->open) { |
395 | if (info->active_low == 1) | ||
396 | pcmcia_write_config_byte(link, CISREG_CCSR, 0x04); | ||
397 | |||
388 | axnet_reset_8390(dev); | 398 | axnet_reset_8390(dev); |
389 | AX88190_init(dev, 1); | 399 | AX88190_init(dev, 1); |
390 | netif_device_attach(dev); | 400 | netif_device_attach(dev); |
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index 03096c80103d..d05c44692f08 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -1536,6 +1536,7 @@ static struct pcmcia_device_id pcnet_ids[] = { | |||
1536 | PCMCIA_DEVICE_PROD_ID12("COMPU-SHACK", "FASTline PCMCIA 10/100 Fast-Ethernet", 0xfa2e424d, 0x3953d9b9), | 1536 | PCMCIA_DEVICE_PROD_ID12("COMPU-SHACK", "FASTline PCMCIA 10/100 Fast-Ethernet", 0xfa2e424d, 0x3953d9b9), |
1537 | PCMCIA_DEVICE_PROD_ID12("CONTEC", "C-NET(PC)C-10L", 0x21cab552, 0xf6f90722), | 1537 | PCMCIA_DEVICE_PROD_ID12("CONTEC", "C-NET(PC)C-10L", 0x21cab552, 0xf6f90722), |
1538 | PCMCIA_DEVICE_PROD_ID12("corega", "FEther PCC-TXF", 0x0a21501a, 0xa51564a2), | 1538 | PCMCIA_DEVICE_PROD_ID12("corega", "FEther PCC-TXF", 0x0a21501a, 0xa51564a2), |
1539 | PCMCIA_DEVICE_PROD_ID12("corega", "Ether CF-TD", 0x0a21501a, 0x6589340a), | ||
1539 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-T", 0x5261440f, 0xfa9d85bd), | 1540 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-T", 0x5261440f, 0xfa9d85bd), |
1540 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-TD", 0x5261440f, 0xc49bd73d), | 1541 | PCMCIA_DEVICE_PROD_ID12("corega K.K.", "corega EtherII PCC-TD", 0x5261440f, 0xc49bd73d), |
1541 | PCMCIA_DEVICE_PROD_ID12("Corega K.K.", "corega EtherII PCC-TD", 0xd4fdcbd8, 0xc49bd73d), | 1542 | PCMCIA_DEVICE_PROD_ID12("Corega K.K.", "corega EtherII PCC-TD", 0xd4fdcbd8, 0xc49bd73d), |
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index e2afdce0a437..e8b9c53c304b 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c | |||
@@ -30,11 +30,14 @@ | |||
30 | #include <linux/ethtool.h> | 30 | #include <linux/ethtool.h> |
31 | #include <linux/phy.h> | 31 | #include <linux/phy.h> |
32 | #include <linux/marvell_phy.h> | 32 | #include <linux/marvell_phy.h> |
33 | #include <linux/of.h> | ||
33 | 34 | ||
34 | #include <asm/io.h> | 35 | #include <asm/io.h> |
35 | #include <asm/irq.h> | 36 | #include <asm/irq.h> |
36 | #include <asm/uaccess.h> | 37 | #include <asm/uaccess.h> |
37 | 38 | ||
39 | #define MII_MARVELL_PHY_PAGE 22 | ||
40 | |||
38 | #define MII_M1011_IEVENT 0x13 | 41 | #define MII_M1011_IEVENT 0x13 |
39 | #define MII_M1011_IEVENT_CLEAR 0x0000 | 42 | #define MII_M1011_IEVENT_CLEAR 0x0000 |
40 | 43 | ||
@@ -74,13 +77,12 @@ | |||
74 | #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) | 77 | #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4) |
75 | #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4)) | 78 | #define MII_88E1121_PHY_MSCR_DELAY_MASK (~(0x3 << 4)) |
76 | 79 | ||
77 | #define MII_88EC048_PHY_MSCR1_REG 16 | 80 | #define MII_88E1318S_PHY_MSCR1_REG 16 |
78 | #define MII_88EC048_PHY_MSCR1_PAD_ODD BIT(6) | 81 | #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) |
79 | 82 | ||
80 | #define MII_88E1121_PHY_LED_CTRL 16 | 83 | #define MII_88E1121_PHY_LED_CTRL 16 |
81 | #define MII_88E1121_PHY_LED_PAGE 3 | 84 | #define MII_88E1121_PHY_LED_PAGE 3 |
82 | #define MII_88E1121_PHY_LED_DEF 0x0030 | 85 | #define MII_88E1121_PHY_LED_DEF 0x0030 |
83 | #define MII_88E1121_PHY_PAGE 22 | ||
84 | 86 | ||
85 | #define MII_M1011_PHY_STATUS 0x11 | 87 | #define MII_M1011_PHY_STATUS 0x11 |
86 | #define MII_M1011_PHY_STATUS_1000 0x8000 | 88 | #define MII_M1011_PHY_STATUS_1000 0x8000 |
@@ -186,13 +188,94 @@ static int marvell_config_aneg(struct phy_device *phydev) | |||
186 | return 0; | 188 | return 0; |
187 | } | 189 | } |
188 | 190 | ||
191 | #ifdef CONFIG_OF_MDIO | ||
192 | /* | ||
193 | * Set and/or override some configuration registers based on the | ||
194 | * marvell,reg-init property stored in the of_node for the phydev. | ||
195 | * | ||
196 | * marvell,reg-init = <reg-page reg mask value>,...; | ||
197 | * | ||
198 | * There may be one or more sets of <reg-page reg mask value>: | ||
199 | * | ||
200 | * reg-page: which register bank to use. | ||
201 | * reg: the register. | ||
202 | * mask: if non-zero, ANDed with existing register value. | ||
203 | * value: ORed with the masked value and written to the regiser. | ||
204 | * | ||
205 | */ | ||
206 | static int marvell_of_reg_init(struct phy_device *phydev) | ||
207 | { | ||
208 | const __be32 *paddr; | ||
209 | int len, i, saved_page, current_page, page_changed, ret; | ||
210 | |||
211 | if (!phydev->dev.of_node) | ||
212 | return 0; | ||
213 | |||
214 | paddr = of_get_property(phydev->dev.of_node, "marvell,reg-init", &len); | ||
215 | if (!paddr || len < (4 * sizeof(*paddr))) | ||
216 | return 0; | ||
217 | |||
218 | saved_page = phy_read(phydev, MII_MARVELL_PHY_PAGE); | ||
219 | if (saved_page < 0) | ||
220 | return saved_page; | ||
221 | page_changed = 0; | ||
222 | current_page = saved_page; | ||
223 | |||
224 | ret = 0; | ||
225 | len /= sizeof(*paddr); | ||
226 | for (i = 0; i < len - 3; i += 4) { | ||
227 | u16 reg_page = be32_to_cpup(paddr + i); | ||
228 | u16 reg = be32_to_cpup(paddr + i + 1); | ||
229 | u16 mask = be32_to_cpup(paddr + i + 2); | ||
230 | u16 val_bits = be32_to_cpup(paddr + i + 3); | ||
231 | int val; | ||
232 | |||
233 | if (reg_page != current_page) { | ||
234 | current_page = reg_page; | ||
235 | page_changed = 1; | ||
236 | ret = phy_write(phydev, MII_MARVELL_PHY_PAGE, reg_page); | ||
237 | if (ret < 0) | ||
238 | goto err; | ||
239 | } | ||
240 | |||
241 | val = 0; | ||
242 | if (mask) { | ||
243 | val = phy_read(phydev, reg); | ||
244 | if (val < 0) { | ||
245 | ret = val; | ||
246 | goto err; | ||
247 | } | ||
248 | val &= mask; | ||
249 | } | ||
250 | val |= val_bits; | ||
251 | |||
252 | ret = phy_write(phydev, reg, val); | ||
253 | if (ret < 0) | ||
254 | goto err; | ||
255 | |||
256 | } | ||
257 | err: | ||
258 | if (page_changed) { | ||
259 | i = phy_write(phydev, MII_MARVELL_PHY_PAGE, saved_page); | ||
260 | if (ret == 0) | ||
261 | ret = i; | ||
262 | } | ||
263 | return ret; | ||
264 | } | ||
265 | #else | ||
266 | static int marvell_of_reg_init(struct phy_device *phydev) | ||
267 | { | ||
268 | return 0; | ||
269 | } | ||
270 | #endif /* CONFIG_OF_MDIO */ | ||
271 | |||
189 | static int m88e1121_config_aneg(struct phy_device *phydev) | 272 | static int m88e1121_config_aneg(struct phy_device *phydev) |
190 | { | 273 | { |
191 | int err, oldpage, mscr; | 274 | int err, oldpage, mscr; |
192 | 275 | ||
193 | oldpage = phy_read(phydev, MII_88E1121_PHY_PAGE); | 276 | oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE); |
194 | 277 | ||
195 | err = phy_write(phydev, MII_88E1121_PHY_PAGE, | 278 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, |
196 | MII_88E1121_PHY_MSCR_PAGE); | 279 | MII_88E1121_PHY_MSCR_PAGE); |
197 | if (err < 0) | 280 | if (err < 0) |
198 | return err; | 281 | return err; |
@@ -218,7 +301,7 @@ static int m88e1121_config_aneg(struct phy_device *phydev) | |||
218 | return err; | 301 | return err; |
219 | } | 302 | } |
220 | 303 | ||
221 | phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage); | 304 | phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage); |
222 | 305 | ||
223 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | 306 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); |
224 | if (err < 0) | 307 | if (err < 0) |
@@ -229,36 +312,36 @@ static int m88e1121_config_aneg(struct phy_device *phydev) | |||
229 | if (err < 0) | 312 | if (err < 0) |
230 | return err; | 313 | return err; |
231 | 314 | ||
232 | oldpage = phy_read(phydev, MII_88E1121_PHY_PAGE); | 315 | oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE); |
233 | 316 | ||
234 | phy_write(phydev, MII_88E1121_PHY_PAGE, MII_88E1121_PHY_LED_PAGE); | 317 | phy_write(phydev, MII_MARVELL_PHY_PAGE, MII_88E1121_PHY_LED_PAGE); |
235 | phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF); | 318 | phy_write(phydev, MII_88E1121_PHY_LED_CTRL, MII_88E1121_PHY_LED_DEF); |
236 | phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage); | 319 | phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage); |
237 | 320 | ||
238 | err = genphy_config_aneg(phydev); | 321 | err = genphy_config_aneg(phydev); |
239 | 322 | ||
240 | return err; | 323 | return err; |
241 | } | 324 | } |
242 | 325 | ||
243 | static int m88ec048_config_aneg(struct phy_device *phydev) | 326 | static int m88e1318_config_aneg(struct phy_device *phydev) |
244 | { | 327 | { |
245 | int err, oldpage, mscr; | 328 | int err, oldpage, mscr; |
246 | 329 | ||
247 | oldpage = phy_read(phydev, MII_88E1121_PHY_PAGE); | 330 | oldpage = phy_read(phydev, MII_MARVELL_PHY_PAGE); |
248 | 331 | ||
249 | err = phy_write(phydev, MII_88E1121_PHY_PAGE, | 332 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, |
250 | MII_88E1121_PHY_MSCR_PAGE); | 333 | MII_88E1121_PHY_MSCR_PAGE); |
251 | if (err < 0) | 334 | if (err < 0) |
252 | return err; | 335 | return err; |
253 | 336 | ||
254 | mscr = phy_read(phydev, MII_88EC048_PHY_MSCR1_REG); | 337 | mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG); |
255 | mscr |= MII_88EC048_PHY_MSCR1_PAD_ODD; | 338 | mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD; |
256 | 339 | ||
257 | err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr); | 340 | err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr); |
258 | if (err < 0) | 341 | if (err < 0) |
259 | return err; | 342 | return err; |
260 | 343 | ||
261 | err = phy_write(phydev, MII_88E1121_PHY_PAGE, oldpage); | 344 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, oldpage); |
262 | if (err < 0) | 345 | if (err < 0) |
263 | return err; | 346 | return err; |
264 | 347 | ||
@@ -368,6 +451,9 @@ static int m88e1111_config_init(struct phy_device *phydev) | |||
368 | return err; | 451 | return err; |
369 | } | 452 | } |
370 | 453 | ||
454 | err = marvell_of_reg_init(phydev); | ||
455 | if (err < 0) | ||
456 | return err; | ||
371 | 457 | ||
372 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | 458 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); |
373 | if (err < 0) | 459 | if (err < 0) |
@@ -398,7 +484,7 @@ static int m88e1118_config_init(struct phy_device *phydev) | |||
398 | int err; | 484 | int err; |
399 | 485 | ||
400 | /* Change address */ | 486 | /* Change address */ |
401 | err = phy_write(phydev, 0x16, 0x0002); | 487 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0002); |
402 | if (err < 0) | 488 | if (err < 0) |
403 | return err; | 489 | return err; |
404 | 490 | ||
@@ -408,7 +494,7 @@ static int m88e1118_config_init(struct phy_device *phydev) | |||
408 | return err; | 494 | return err; |
409 | 495 | ||
410 | /* Change address */ | 496 | /* Change address */ |
411 | err = phy_write(phydev, 0x16, 0x0003); | 497 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0003); |
412 | if (err < 0) | 498 | if (err < 0) |
413 | return err; | 499 | return err; |
414 | 500 | ||
@@ -420,8 +506,42 @@ static int m88e1118_config_init(struct phy_device *phydev) | |||
420 | if (err < 0) | 506 | if (err < 0) |
421 | return err; | 507 | return err; |
422 | 508 | ||
509 | err = marvell_of_reg_init(phydev); | ||
510 | if (err < 0) | ||
511 | return err; | ||
512 | |||
423 | /* Reset address */ | 513 | /* Reset address */ |
424 | err = phy_write(phydev, 0x16, 0x0); | 514 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0); |
515 | if (err < 0) | ||
516 | return err; | ||
517 | |||
518 | err = phy_write(phydev, MII_BMCR, BMCR_RESET); | ||
519 | if (err < 0) | ||
520 | return err; | ||
521 | |||
522 | return 0; | ||
523 | } | ||
524 | |||
525 | static int m88e1149_config_init(struct phy_device *phydev) | ||
526 | { | ||
527 | int err; | ||
528 | |||
529 | /* Change address */ | ||
530 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0002); | ||
531 | if (err < 0) | ||
532 | return err; | ||
533 | |||
534 | /* Enable 1000 Mbit */ | ||
535 | err = phy_write(phydev, 0x15, 0x1048); | ||
536 | if (err < 0) | ||
537 | return err; | ||
538 | |||
539 | err = marvell_of_reg_init(phydev); | ||
540 | if (err < 0) | ||
541 | return err; | ||
542 | |||
543 | /* Reset address */ | ||
544 | err = phy_write(phydev, MII_MARVELL_PHY_PAGE, 0x0); | ||
425 | if (err < 0) | 545 | if (err < 0) |
426 | return err; | 546 | return err; |
427 | 547 | ||
@@ -491,6 +611,10 @@ static int m88e1145_config_init(struct phy_device *phydev) | |||
491 | } | 611 | } |
492 | } | 612 | } |
493 | 613 | ||
614 | err = marvell_of_reg_init(phydev); | ||
615 | if (err < 0) | ||
616 | return err; | ||
617 | |||
494 | return 0; | 618 | return 0; |
495 | } | 619 | } |
496 | 620 | ||
@@ -659,12 +783,12 @@ static struct phy_driver marvell_drivers[] = { | |||
659 | .driver = { .owner = THIS_MODULE }, | 783 | .driver = { .owner = THIS_MODULE }, |
660 | }, | 784 | }, |
661 | { | 785 | { |
662 | .phy_id = MARVELL_PHY_ID_88EC048, | 786 | .phy_id = MARVELL_PHY_ID_88E1318S, |
663 | .phy_id_mask = MARVELL_PHY_ID_MASK, | 787 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
664 | .name = "Marvell 88EC048", | 788 | .name = "Marvell 88E1318S", |
665 | .features = PHY_GBIT_FEATURES, | 789 | .features = PHY_GBIT_FEATURES, |
666 | .flags = PHY_HAS_INTERRUPT, | 790 | .flags = PHY_HAS_INTERRUPT, |
667 | .config_aneg = &m88ec048_config_aneg, | 791 | .config_aneg = &m88e1318_config_aneg, |
668 | .read_status = &marvell_read_status, | 792 | .read_status = &marvell_read_status, |
669 | .ack_interrupt = &marvell_ack_interrupt, | 793 | .ack_interrupt = &marvell_ack_interrupt, |
670 | .config_intr = &marvell_config_intr, | 794 | .config_intr = &marvell_config_intr, |
@@ -685,6 +809,19 @@ static struct phy_driver marvell_drivers[] = { | |||
685 | .driver = { .owner = THIS_MODULE }, | 809 | .driver = { .owner = THIS_MODULE }, |
686 | }, | 810 | }, |
687 | { | 811 | { |
812 | .phy_id = MARVELL_PHY_ID_88E1149R, | ||
813 | .phy_id_mask = MARVELL_PHY_ID_MASK, | ||
814 | .name = "Marvell 88E1149R", | ||
815 | .features = PHY_GBIT_FEATURES, | ||
816 | .flags = PHY_HAS_INTERRUPT, | ||
817 | .config_init = &m88e1149_config_init, | ||
818 | .config_aneg = &m88e1118_config_aneg, | ||
819 | .read_status = &genphy_read_status, | ||
820 | .ack_interrupt = &marvell_ack_interrupt, | ||
821 | .config_intr = &marvell_config_intr, | ||
822 | .driver = { .owner = THIS_MODULE }, | ||
823 | }, | ||
824 | { | ||
688 | .phy_id = MARVELL_PHY_ID_88E1240, | 825 | .phy_id = MARVELL_PHY_ID_88E1240, |
689 | .phy_id_mask = MARVELL_PHY_ID_MASK, | 826 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
690 | .name = "Marvell 88E1240", | 827 | .name = "Marvell 88E1240", |
@@ -735,6 +872,7 @@ static struct mdio_device_id __maybe_unused marvell_tbl[] = { | |||
735 | { 0x01410e10, 0xfffffff0 }, | 872 | { 0x01410e10, 0xfffffff0 }, |
736 | { 0x01410cb0, 0xfffffff0 }, | 873 | { 0x01410cb0, 0xfffffff0 }, |
737 | { 0x01410cd0, 0xfffffff0 }, | 874 | { 0x01410cd0, 0xfffffff0 }, |
875 | { 0x01410e50, 0xfffffff0 }, | ||
738 | { 0x01410e30, 0xfffffff0 }, | 876 | { 0x01410e30, 0xfffffff0 }, |
739 | { 0x01410e90, 0xfffffff0 }, | 877 | { 0x01410e90, 0xfffffff0 }, |
740 | { } | 878 | { } |
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 1bb16cb79433..7670aac0e93f 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c | |||
@@ -65,7 +65,7 @@ EXPORT_SYMBOL(phy_print_status); | |||
65 | * | 65 | * |
66 | * Returns 0 on success on < 0 on error. | 66 | * Returns 0 on success on < 0 on error. |
67 | */ | 67 | */ |
68 | int phy_clear_interrupt(struct phy_device *phydev) | 68 | static int phy_clear_interrupt(struct phy_device *phydev) |
69 | { | 69 | { |
70 | int err = 0; | 70 | int err = 0; |
71 | 71 | ||
@@ -82,7 +82,7 @@ int phy_clear_interrupt(struct phy_device *phydev) | |||
82 | * | 82 | * |
83 | * Returns 0 on success on < 0 on error. | 83 | * Returns 0 on success on < 0 on error. |
84 | */ | 84 | */ |
85 | int phy_config_interrupt(struct phy_device *phydev, u32 interrupts) | 85 | static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts) |
86 | { | 86 | { |
87 | int err = 0; | 87 | int err = 0; |
88 | 88 | ||
@@ -208,7 +208,7 @@ static inline int phy_find_valid(int idx, u32 features) | |||
208 | * duplexes. Drop down by one in this order: 1000/FULL, | 208 | * duplexes. Drop down by one in this order: 1000/FULL, |
209 | * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF. | 209 | * 1000/HALF, 100/FULL, 100/HALF, 10/FULL, 10/HALF. |
210 | */ | 210 | */ |
211 | void phy_sanitize_settings(struct phy_device *phydev) | 211 | static void phy_sanitize_settings(struct phy_device *phydev) |
212 | { | 212 | { |
213 | u32 features = phydev->supported; | 213 | u32 features = phydev->supported; |
214 | int idx; | 214 | int idx; |
@@ -223,7 +223,6 @@ void phy_sanitize_settings(struct phy_device *phydev) | |||
223 | phydev->speed = settings[idx].speed; | 223 | phydev->speed = settings[idx].speed; |
224 | phydev->duplex = settings[idx].duplex; | 224 | phydev->duplex = settings[idx].duplex; |
225 | } | 225 | } |
226 | EXPORT_SYMBOL(phy_sanitize_settings); | ||
227 | 226 | ||
228 | /** | 227 | /** |
229 | * phy_ethtool_sset - generic ethtool sset function, handles all the details | 228 | * phy_ethtool_sset - generic ethtool sset function, handles all the details |
@@ -532,7 +531,7 @@ static irqreturn_t phy_interrupt(int irq, void *phy_dat) | |||
532 | * phy_enable_interrupts - Enable the interrupts from the PHY side | 531 | * phy_enable_interrupts - Enable the interrupts from the PHY side |
533 | * @phydev: target phy_device struct | 532 | * @phydev: target phy_device struct |
534 | */ | 533 | */ |
535 | int phy_enable_interrupts(struct phy_device *phydev) | 534 | static int phy_enable_interrupts(struct phy_device *phydev) |
536 | { | 535 | { |
537 | int err; | 536 | int err; |
538 | 537 | ||
@@ -545,13 +544,12 @@ int phy_enable_interrupts(struct phy_device *phydev) | |||
545 | 544 | ||
546 | return err; | 545 | return err; |
547 | } | 546 | } |
548 | EXPORT_SYMBOL(phy_enable_interrupts); | ||
549 | 547 | ||
550 | /** | 548 | /** |
551 | * phy_disable_interrupts - Disable the PHY interrupts from the PHY side | 549 | * phy_disable_interrupts - Disable the PHY interrupts from the PHY side |
552 | * @phydev: target phy_device struct | 550 | * @phydev: target phy_device struct |
553 | */ | 551 | */ |
554 | int phy_disable_interrupts(struct phy_device *phydev) | 552 | static int phy_disable_interrupts(struct phy_device *phydev) |
555 | { | 553 | { |
556 | int err; | 554 | int err; |
557 | 555 | ||
@@ -574,7 +572,6 @@ phy_err: | |||
574 | 572 | ||
575 | return err; | 573 | return err; |
576 | } | 574 | } |
577 | EXPORT_SYMBOL(phy_disable_interrupts); | ||
578 | 575 | ||
579 | /** | 576 | /** |
580 | * phy_start_interrupts - request and enable interrupts for a PHY device | 577 | * phy_start_interrupts - request and enable interrupts for a PHY device |
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c index 16ddc77313cb..993c52c82aeb 100644 --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c | |||
@@ -57,6 +57,9 @@ extern void mdio_bus_exit(void); | |||
57 | static LIST_HEAD(phy_fixup_list); | 57 | static LIST_HEAD(phy_fixup_list); |
58 | static DEFINE_MUTEX(phy_fixup_lock); | 58 | static DEFINE_MUTEX(phy_fixup_lock); |
59 | 59 | ||
60 | static int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, | ||
61 | u32 flags, phy_interface_t interface); | ||
62 | |||
60 | /* | 63 | /* |
61 | * Creates a new phy_fixup and adds it to the list | 64 | * Creates a new phy_fixup and adds it to the list |
62 | * @bus_id: A string which matches phydev->dev.bus_id (or PHY_ANY_ID) | 65 | * @bus_id: A string which matches phydev->dev.bus_id (or PHY_ANY_ID) |
@@ -146,7 +149,8 @@ int phy_scan_fixups(struct phy_device *phydev) | |||
146 | } | 149 | } |
147 | EXPORT_SYMBOL(phy_scan_fixups); | 150 | EXPORT_SYMBOL(phy_scan_fixups); |
148 | 151 | ||
149 | struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) | 152 | static struct phy_device* phy_device_create(struct mii_bus *bus, |
153 | int addr, int phy_id) | ||
150 | { | 154 | { |
151 | struct phy_device *dev; | 155 | struct phy_device *dev; |
152 | 156 | ||
@@ -193,7 +197,6 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id) | |||
193 | 197 | ||
194 | return dev; | 198 | return dev; |
195 | } | 199 | } |
196 | EXPORT_SYMBOL(phy_device_create); | ||
197 | 200 | ||
198 | /** | 201 | /** |
199 | * get_phy_id - reads the specified addr for its ID. | 202 | * get_phy_id - reads the specified addr for its ID. |
@@ -316,7 +319,7 @@ EXPORT_SYMBOL(phy_find_first); | |||
316 | * If you want to monitor your own link state, don't call | 319 | * If you want to monitor your own link state, don't call |
317 | * this function. | 320 | * this function. |
318 | */ | 321 | */ |
319 | void phy_prepare_link(struct phy_device *phydev, | 322 | static void phy_prepare_link(struct phy_device *phydev, |
320 | void (*handler)(struct net_device *)) | 323 | void (*handler)(struct net_device *)) |
321 | { | 324 | { |
322 | phydev->adjust_link = handler; | 325 | phydev->adjust_link = handler; |
@@ -435,8 +438,8 @@ int phy_init_hw(struct phy_device *phydev) | |||
435 | * the attaching device, and given a callback for link status | 438 | * the attaching device, and given a callback for link status |
436 | * change. The phy_device is returned to the attaching driver. | 439 | * change. The phy_device is returned to the attaching driver. |
437 | */ | 440 | */ |
438 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, | 441 | static int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
439 | u32 flags, phy_interface_t interface) | 442 | u32 flags, phy_interface_t interface) |
440 | { | 443 | { |
441 | struct device *d = &phydev->dev; | 444 | struct device *d = &phydev->dev; |
442 | 445 | ||
@@ -473,7 +476,6 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, | |||
473 | * (dev_flags and interface) */ | 476 | * (dev_flags and interface) */ |
474 | return phy_init_hw(phydev); | 477 | return phy_init_hw(phydev); |
475 | } | 478 | } |
476 | EXPORT_SYMBOL(phy_attach_direct); | ||
477 | 479 | ||
478 | /** | 480 | /** |
479 | * phy_attach - attach a network device to a particular PHY device | 481 | * phy_attach - attach a network device to a particular PHY device |
@@ -540,7 +542,7 @@ EXPORT_SYMBOL(phy_detach); | |||
540 | * what is supported. Returns < 0 on error, 0 if the PHY's advertisement | 542 | * what is supported. Returns < 0 on error, 0 if the PHY's advertisement |
541 | * hasn't changed, and > 0 if it has changed. | 543 | * hasn't changed, and > 0 if it has changed. |
542 | */ | 544 | */ |
543 | int genphy_config_advert(struct phy_device *phydev) | 545 | static int genphy_config_advert(struct phy_device *phydev) |
544 | { | 546 | { |
545 | u32 advertise; | 547 | u32 advertise; |
546 | int oldadv, adv; | 548 | int oldadv, adv; |
@@ -605,7 +607,6 @@ int genphy_config_advert(struct phy_device *phydev) | |||
605 | 607 | ||
606 | return changed; | 608 | return changed; |
607 | } | 609 | } |
608 | EXPORT_SYMBOL(genphy_config_advert); | ||
609 | 610 | ||
610 | /** | 611 | /** |
611 | * genphy_setup_forced - configures/forces speed/duplex from @phydev | 612 | * genphy_setup_forced - configures/forces speed/duplex from @phydev |
@@ -615,7 +616,7 @@ EXPORT_SYMBOL(genphy_config_advert); | |||
615 | * to the values in phydev. Assumes that the values are valid. | 616 | * to the values in phydev. Assumes that the values are valid. |
616 | * Please see phy_sanitize_settings(). | 617 | * Please see phy_sanitize_settings(). |
617 | */ | 618 | */ |
618 | int genphy_setup_forced(struct phy_device *phydev) | 619 | static int genphy_setup_forced(struct phy_device *phydev) |
619 | { | 620 | { |
620 | int err; | 621 | int err; |
621 | int ctl = 0; | 622 | int ctl = 0; |
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index 09cf56d0416a..39659976a1ac 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -2584,16 +2584,16 @@ ppp_create_interface(struct net *net, int unit, int *retp) | |||
2584 | */ | 2584 | */ |
2585 | dev_net_set(dev, net); | 2585 | dev_net_set(dev, net); |
2586 | 2586 | ||
2587 | ret = -EEXIST; | ||
2588 | mutex_lock(&pn->all_ppp_mutex); | 2587 | mutex_lock(&pn->all_ppp_mutex); |
2589 | 2588 | ||
2590 | if (unit < 0) { | 2589 | if (unit < 0) { |
2591 | unit = unit_get(&pn->units_idr, ppp); | 2590 | unit = unit_get(&pn->units_idr, ppp); |
2592 | if (unit < 0) { | 2591 | if (unit < 0) { |
2593 | *retp = unit; | 2592 | ret = unit; |
2594 | goto out2; | 2593 | goto out2; |
2595 | } | 2594 | } |
2596 | } else { | 2595 | } else { |
2596 | ret = -EEXIST; | ||
2597 | if (unit_find(&pn->units_idr, unit)) | 2597 | if (unit_find(&pn->units_idr, unit)) |
2598 | goto out2; /* unit already exists */ | 2598 | goto out2; /* unit already exists */ |
2599 | /* | 2599 | /* |
@@ -2668,10 +2668,10 @@ static void ppp_shutdown_interface(struct ppp *ppp) | |||
2668 | ppp->closing = 1; | 2668 | ppp->closing = 1; |
2669 | ppp_unlock(ppp); | 2669 | ppp_unlock(ppp); |
2670 | unregister_netdev(ppp->dev); | 2670 | unregister_netdev(ppp->dev); |
2671 | unit_put(&pn->units_idr, ppp->file.index); | ||
2671 | } else | 2672 | } else |
2672 | ppp_unlock(ppp); | 2673 | ppp_unlock(ppp); |
2673 | 2674 | ||
2674 | unit_put(&pn->units_idr, ppp->file.index); | ||
2675 | ppp->file.dead = 1; | 2675 | ppp->file.dead = 1; |
2676 | ppp->owner = NULL; | 2676 | ppp->owner = NULL; |
2677 | wake_up_interruptible(&ppp->file.rwait); | 2677 | wake_up_interruptible(&ppp->file.rwait); |
@@ -2859,8 +2859,7 @@ static void __exit ppp_cleanup(void) | |||
2859 | * by holding all_ppp_mutex | 2859 | * by holding all_ppp_mutex |
2860 | */ | 2860 | */ |
2861 | 2861 | ||
2862 | /* associate pointer with specified number */ | 2862 | static int __unit_alloc(struct idr *p, void *ptr, int n) |
2863 | static int unit_set(struct idr *p, void *ptr, int n) | ||
2864 | { | 2863 | { |
2865 | int unit, err; | 2864 | int unit, err; |
2866 | 2865 | ||
@@ -2871,10 +2870,24 @@ again: | |||
2871 | } | 2870 | } |
2872 | 2871 | ||
2873 | err = idr_get_new_above(p, ptr, n, &unit); | 2872 | err = idr_get_new_above(p, ptr, n, &unit); |
2874 | if (err == -EAGAIN) | 2873 | if (err < 0) { |
2875 | goto again; | 2874 | if (err == -EAGAIN) |
2875 | goto again; | ||
2876 | return err; | ||
2877 | } | ||
2878 | |||
2879 | return unit; | ||
2880 | } | ||
2881 | |||
2882 | /* associate pointer with specified number */ | ||
2883 | static int unit_set(struct idr *p, void *ptr, int n) | ||
2884 | { | ||
2885 | int unit; | ||
2876 | 2886 | ||
2877 | if (unit != n) { | 2887 | unit = __unit_alloc(p, ptr, n); |
2888 | if (unit < 0) | ||
2889 | return unit; | ||
2890 | else if (unit != n) { | ||
2878 | idr_remove(p, unit); | 2891 | idr_remove(p, unit); |
2879 | return -EINVAL; | 2892 | return -EINVAL; |
2880 | } | 2893 | } |
@@ -2885,19 +2898,7 @@ again: | |||
2885 | /* get new free unit number and associate pointer with it */ | 2898 | /* get new free unit number and associate pointer with it */ |
2886 | static int unit_get(struct idr *p, void *ptr) | 2899 | static int unit_get(struct idr *p, void *ptr) |
2887 | { | 2900 | { |
2888 | int unit, err; | 2901 | return __unit_alloc(p, ptr, 0); |
2889 | |||
2890 | again: | ||
2891 | if (!idr_pre_get(p, GFP_KERNEL)) { | ||
2892 | printk(KERN_ERR "PPP: No free memory for idr\n"); | ||
2893 | return -ENOMEM; | ||
2894 | } | ||
2895 | |||
2896 | err = idr_get_new_above(p, ptr, 0, &unit); | ||
2897 | if (err == -EAGAIN) | ||
2898 | goto again; | ||
2899 | |||
2900 | return unit; | ||
2901 | } | 2902 | } |
2902 | 2903 | ||
2903 | /* put unit number back to a pool */ | 2904 | /* put unit number back to a pool */ |
diff --git a/drivers/net/qlcnic/qlcnic.h b/drivers/net/qlcnic/qlcnic.h index 26c37d3a5868..8ecc170c9b74 100644 --- a/drivers/net/qlcnic/qlcnic.h +++ b/drivers/net/qlcnic/qlcnic.h | |||
@@ -146,11 +146,13 @@ | |||
146 | #define MAX_CMD_DESCRIPTORS 1024 | 146 | #define MAX_CMD_DESCRIPTORS 1024 |
147 | #define MAX_RCV_DESCRIPTORS_1G 4096 | 147 | #define MAX_RCV_DESCRIPTORS_1G 4096 |
148 | #define MAX_RCV_DESCRIPTORS_10G 8192 | 148 | #define MAX_RCV_DESCRIPTORS_10G 8192 |
149 | #define MAX_RCV_DESCRIPTORS_VF 2048 | ||
149 | #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512 | 150 | #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512 |
150 | #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024 | 151 | #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024 |
151 | 152 | ||
152 | #define DEFAULT_RCV_DESCRIPTORS_1G 2048 | 153 | #define DEFAULT_RCV_DESCRIPTORS_1G 2048 |
153 | #define DEFAULT_RCV_DESCRIPTORS_10G 4096 | 154 | #define DEFAULT_RCV_DESCRIPTORS_10G 4096 |
155 | #define DEFAULT_RCV_DESCRIPTORS_VF 1024 | ||
154 | #define MAX_RDS_RINGS 2 | 156 | #define MAX_RDS_RINGS 2 |
155 | 157 | ||
156 | #define get_next_index(index, length) \ | 158 | #define get_next_index(index, length) \ |
@@ -942,6 +944,7 @@ struct qlcnic_ipaddr { | |||
942 | #define QLCNIC_LOOPBACK_TEST 2 | 944 | #define QLCNIC_LOOPBACK_TEST 2 |
943 | 945 | ||
944 | #define QLCNIC_FILTER_AGE 80 | 946 | #define QLCNIC_FILTER_AGE 80 |
947 | #define QLCNIC_READD_AGE 20 | ||
945 | #define QLCNIC_LB_MAX_FILTERS 64 | 948 | #define QLCNIC_LB_MAX_FILTERS 64 |
946 | 949 | ||
947 | struct qlcnic_filter { | 950 | struct qlcnic_filter { |
@@ -970,6 +973,8 @@ struct qlcnic_adapter { | |||
970 | u16 num_txd; | 973 | u16 num_txd; |
971 | u16 num_rxd; | 974 | u16 num_rxd; |
972 | u16 num_jumbo_rxd; | 975 | u16 num_jumbo_rxd; |
976 | u16 max_rxd; | ||
977 | u16 max_jumbo_rxd; | ||
973 | 978 | ||
974 | u8 max_rds_rings; | 979 | u8 max_rds_rings; |
975 | u8 max_sds_rings; | 980 | u8 max_sds_rings; |
@@ -1129,7 +1134,7 @@ struct qlcnic_eswitch { | |||
1129 | #define MAX_RX_QUEUES 4 | 1134 | #define MAX_RX_QUEUES 4 |
1130 | #define DEFAULT_MAC_LEARN 1 | 1135 | #define DEFAULT_MAC_LEARN 1 |
1131 | 1136 | ||
1132 | #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan <= MAX_VLAN_ID) | 1137 | #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID) |
1133 | #define IS_VALID_BW(bw) (bw >= MIN_BW && bw <= MAX_BW) | 1138 | #define IS_VALID_BW(bw) (bw >= MIN_BW && bw <= MAX_BW) |
1134 | #define IS_VALID_TX_QUEUES(que) (que > 0 && que <= MAX_TX_QUEUES) | 1139 | #define IS_VALID_TX_QUEUES(que) (que > 0 && que <= MAX_TX_QUEUES) |
1135 | #define IS_VALID_RX_QUEUES(que) (que > 0 && que <= MAX_RX_QUEUES) | 1140 | #define IS_VALID_RX_QUEUES(que) (que > 0 && que <= MAX_RX_QUEUES) |
diff --git a/drivers/net/qlcnic/qlcnic_ethtool.c b/drivers/net/qlcnic/qlcnic_ethtool.c index 25e93a53fca0..ec21d24015c4 100644 --- a/drivers/net/qlcnic/qlcnic_ethtool.c +++ b/drivers/net/qlcnic/qlcnic_ethtool.c | |||
@@ -437,14 +437,8 @@ qlcnic_get_ringparam(struct net_device *dev, | |||
437 | ring->rx_jumbo_pending = adapter->num_jumbo_rxd; | 437 | ring->rx_jumbo_pending = adapter->num_jumbo_rxd; |
438 | ring->tx_pending = adapter->num_txd; | 438 | ring->tx_pending = adapter->num_txd; |
439 | 439 | ||
440 | if (adapter->ahw.port_type == QLCNIC_GBE) { | 440 | ring->rx_max_pending = adapter->max_rxd; |
441 | ring->rx_max_pending = MAX_RCV_DESCRIPTORS_1G; | 441 | ring->rx_jumbo_max_pending = adapter->max_jumbo_rxd; |
442 | ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_1G; | ||
443 | } else { | ||
444 | ring->rx_max_pending = MAX_RCV_DESCRIPTORS_10G; | ||
445 | ring->rx_jumbo_max_pending = MAX_JUMBO_RCV_DESCRIPTORS_10G; | ||
446 | } | ||
447 | |||
448 | ring->tx_max_pending = MAX_CMD_DESCRIPTORS; | 442 | ring->tx_max_pending = MAX_CMD_DESCRIPTORS; |
449 | 443 | ||
450 | ring->rx_mini_max_pending = 0; | 444 | ring->rx_mini_max_pending = 0; |
@@ -472,24 +466,17 @@ qlcnic_set_ringparam(struct net_device *dev, | |||
472 | struct ethtool_ringparam *ring) | 466 | struct ethtool_ringparam *ring) |
473 | { | 467 | { |
474 | struct qlcnic_adapter *adapter = netdev_priv(dev); | 468 | struct qlcnic_adapter *adapter = netdev_priv(dev); |
475 | u16 max_rcv_desc = MAX_RCV_DESCRIPTORS_10G; | ||
476 | u16 max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G; | ||
477 | u16 num_rxd, num_jumbo_rxd, num_txd; | 469 | u16 num_rxd, num_jumbo_rxd, num_txd; |
478 | 470 | ||
479 | |||
480 | if (ring->rx_mini_pending) | 471 | if (ring->rx_mini_pending) |
481 | return -EOPNOTSUPP; | 472 | return -EOPNOTSUPP; |
482 | 473 | ||
483 | if (adapter->ahw.port_type == QLCNIC_GBE) { | ||
484 | max_rcv_desc = MAX_RCV_DESCRIPTORS_1G; | ||
485 | max_jumbo_desc = MAX_JUMBO_RCV_DESCRIPTORS_10G; | ||
486 | } | ||
487 | |||
488 | num_rxd = qlcnic_validate_ringparam(ring->rx_pending, | 474 | num_rxd = qlcnic_validate_ringparam(ring->rx_pending, |
489 | MIN_RCV_DESCRIPTORS, max_rcv_desc, "rx"); | 475 | MIN_RCV_DESCRIPTORS, adapter->max_rxd, "rx"); |
490 | 476 | ||
491 | num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending, | 477 | num_jumbo_rxd = qlcnic_validate_ringparam(ring->rx_jumbo_pending, |
492 | MIN_JUMBO_DESCRIPTORS, max_jumbo_desc, "rx jumbo"); | 478 | MIN_JUMBO_DESCRIPTORS, adapter->max_jumbo_rxd, |
479 | "rx jumbo"); | ||
493 | 480 | ||
494 | num_txd = qlcnic_validate_ringparam(ring->tx_pending, | 481 | num_txd = qlcnic_validate_ringparam(ring->tx_pending, |
495 | MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx"); | 482 | MIN_CMD_DESCRIPTORS, MAX_CMD_DESCRIPTORS, "tx"); |
diff --git a/drivers/net/qlcnic/qlcnic_main.c b/drivers/net/qlcnic/qlcnic_main.c index f047c7c48314..a3dcd04be22f 100644 --- a/drivers/net/qlcnic/qlcnic_main.c +++ b/drivers/net/qlcnic/qlcnic_main.c | |||
@@ -656,13 +656,23 @@ qlcnic_check_options(struct qlcnic_adapter *adapter) | |||
656 | 656 | ||
657 | dev_info(&pdev->dev, "firmware v%d.%d.%d\n", | 657 | dev_info(&pdev->dev, "firmware v%d.%d.%d\n", |
658 | fw_major, fw_minor, fw_build); | 658 | fw_major, fw_minor, fw_build); |
659 | |||
660 | if (adapter->ahw.port_type == QLCNIC_XGBE) { | 659 | if (adapter->ahw.port_type == QLCNIC_XGBE) { |
661 | adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_10G; | 660 | if (adapter->flags & QLCNIC_ESWITCH_ENABLED) { |
661 | adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_VF; | ||
662 | adapter->max_rxd = MAX_RCV_DESCRIPTORS_VF; | ||
663 | } else { | ||
664 | adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_10G; | ||
665 | adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G; | ||
666 | } | ||
667 | |||
662 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G; | 668 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G; |
669 | adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G; | ||
670 | |||
663 | } else if (adapter->ahw.port_type == QLCNIC_GBE) { | 671 | } else if (adapter->ahw.port_type == QLCNIC_GBE) { |
664 | adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_1G; | 672 | adapter->num_rxd = DEFAULT_RCV_DESCRIPTORS_1G; |
665 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G; | 673 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G; |
674 | adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_1G; | ||
675 | adapter->max_rxd = MAX_RCV_DESCRIPTORS_1G; | ||
666 | } | 676 | } |
667 | 677 | ||
668 | adapter->msix_supported = !!use_msi_x; | 678 | adapter->msix_supported = !!use_msi_x; |
@@ -1440,7 +1450,6 @@ qlcnic_setup_netdev(struct qlcnic_adapter *adapter, | |||
1440 | netdev->irq = adapter->msix_entries[0].vector; | 1450 | netdev->irq = adapter->msix_entries[0].vector; |
1441 | 1451 | ||
1442 | netif_carrier_off(netdev); | 1452 | netif_carrier_off(netdev); |
1443 | netif_stop_queue(netdev); | ||
1444 | 1453 | ||
1445 | err = register_netdev(netdev); | 1454 | err = register_netdev(netdev); |
1446 | if (err) { | 1455 | if (err) { |
@@ -1860,6 +1869,11 @@ qlcnic_send_filter(struct qlcnic_adapter *adapter, | |||
1860 | hlist_for_each_entry_safe(tmp_fil, tmp_hnode, n, head, fnode) { | 1869 | hlist_for_each_entry_safe(tmp_fil, tmp_hnode, n, head, fnode) { |
1861 | if (!memcmp(tmp_fil->faddr, &src_addr, ETH_ALEN) && | 1870 | if (!memcmp(tmp_fil->faddr, &src_addr, ETH_ALEN) && |
1862 | tmp_fil->vlan_id == vlan_id) { | 1871 | tmp_fil->vlan_id == vlan_id) { |
1872 | |||
1873 | if (jiffies > | ||
1874 | (QLCNIC_READD_AGE * HZ + tmp_fil->ftime)) | ||
1875 | qlcnic_change_filter(adapter, src_addr, vlan_id, | ||
1876 | tx_ring); | ||
1863 | tmp_fil->ftime = jiffies; | 1877 | tmp_fil->ftime = jiffies; |
1864 | return; | 1878 | return; |
1865 | } | 1879 | } |
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h index a478786840a6..22821398fc63 100644 --- a/drivers/net/qlge/qlge.h +++ b/drivers/net/qlge/qlge.h | |||
@@ -2226,7 +2226,6 @@ int ql_dump_risc_ram_area(struct ql_adapter *qdev, void *buf, | |||
2226 | int ql_core_dump(struct ql_adapter *qdev, | 2226 | int ql_core_dump(struct ql_adapter *qdev, |
2227 | struct ql_mpi_coredump *mpi_coredump); | 2227 | struct ql_mpi_coredump *mpi_coredump); |
2228 | int ql_mb_about_fw(struct ql_adapter *qdev); | 2228 | int ql_mb_about_fw(struct ql_adapter *qdev); |
2229 | int ql_wol(struct ql_adapter *qdev); | ||
2230 | int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol); | 2229 | int ql_mb_wol_set_magic(struct ql_adapter *qdev, u32 enable_wol); |
2231 | int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol); | 2230 | int ql_mb_wol_mode(struct ql_adapter *qdev, u32 wol); |
2232 | int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config); | 2231 | int ql_mb_set_led_cfg(struct ql_adapter *qdev, u32 led_config); |
@@ -2243,16 +2242,13 @@ netdev_tx_t ql_lb_send(struct sk_buff *skb, struct net_device *ndev); | |||
2243 | void ql_check_lb_frame(struct ql_adapter *, struct sk_buff *); | 2242 | void ql_check_lb_frame(struct ql_adapter *, struct sk_buff *); |
2244 | int ql_own_firmware(struct ql_adapter *qdev); | 2243 | int ql_own_firmware(struct ql_adapter *qdev); |
2245 | int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget); | 2244 | int ql_clean_lb_rx_ring(struct rx_ring *rx_ring, int budget); |
2246 | void qlge_set_multicast_list(struct net_device *ndev); | ||
2247 | 2245 | ||
2248 | #if 1 | 2246 | /* #define QL_ALL_DUMP */ |
2249 | #define QL_ALL_DUMP | 2247 | /* #define QL_REG_DUMP */ |
2250 | #define QL_REG_DUMP | 2248 | /* #define QL_DEV_DUMP */ |
2251 | #define QL_DEV_DUMP | 2249 | /* #define QL_CB_DUMP */ |
2252 | #define QL_CB_DUMP | ||
2253 | /* #define QL_IB_DUMP */ | 2250 | /* #define QL_IB_DUMP */ |
2254 | /* #define QL_OB_DUMP */ | 2251 | /* #define QL_OB_DUMP */ |
2255 | #endif | ||
2256 | 2252 | ||
2257 | #ifdef QL_REG_DUMP | 2253 | #ifdef QL_REG_DUMP |
2258 | extern void ql_dump_xgmac_control_regs(struct ql_adapter *qdev); | 2254 | extern void ql_dump_xgmac_control_regs(struct ql_adapter *qdev); |
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c index ba0053d8515e..528eaef5308f 100644 --- a/drivers/net/qlge/qlge_main.c +++ b/drivers/net/qlge/qlge_main.c | |||
@@ -62,15 +62,15 @@ static const u32 default_msg = | |||
62 | /* NETIF_MSG_PKTDATA | */ | 62 | /* NETIF_MSG_PKTDATA | */ |
63 | NETIF_MSG_HW | NETIF_MSG_WOL | 0; | 63 | NETIF_MSG_HW | NETIF_MSG_WOL | 0; |
64 | 64 | ||
65 | static int debug = 0x00007fff; /* defaults above */ | 65 | static int debug = -1; /* defaults above */ |
66 | module_param(debug, int, 0); | 66 | module_param(debug, int, 0664); |
67 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); | 67 | MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)"); |
68 | 68 | ||
69 | #define MSIX_IRQ 0 | 69 | #define MSIX_IRQ 0 |
70 | #define MSI_IRQ 1 | 70 | #define MSI_IRQ 1 |
71 | #define LEG_IRQ 2 | 71 | #define LEG_IRQ 2 |
72 | static int qlge_irq_type = MSIX_IRQ; | 72 | static int qlge_irq_type = MSIX_IRQ; |
73 | module_param(qlge_irq_type, int, MSIX_IRQ); | 73 | module_param(qlge_irq_type, int, 0664); |
74 | MODULE_PARM_DESC(qlge_irq_type, "0 = MSI-X, 1 = MSI, 2 = Legacy."); | 74 | MODULE_PARM_DESC(qlge_irq_type, "0 = MSI-X, 1 = MSI, 2 = Legacy."); |
75 | 75 | ||
76 | static int qlge_mpi_coredump; | 76 | static int qlge_mpi_coredump; |
@@ -94,6 +94,9 @@ static DEFINE_PCI_DEVICE_TABLE(qlge_pci_tbl) = { | |||
94 | 94 | ||
95 | MODULE_DEVICE_TABLE(pci, qlge_pci_tbl); | 95 | MODULE_DEVICE_TABLE(pci, qlge_pci_tbl); |
96 | 96 | ||
97 | static int ql_wol(struct ql_adapter *qdev); | ||
98 | static void qlge_set_multicast_list(struct net_device *ndev); | ||
99 | |||
97 | /* This hardware semaphore causes exclusive access to | 100 | /* This hardware semaphore causes exclusive access to |
98 | * resources shared between the NIC driver, MPI firmware, | 101 | * resources shared between the NIC driver, MPI firmware, |
99 | * FCOE firmware and the FC driver. | 102 | * FCOE firmware and the FC driver. |
@@ -2382,6 +2385,20 @@ static void qlge_vlan_rx_kill_vid(struct net_device *ndev, u16 vid) | |||
2382 | 2385 | ||
2383 | } | 2386 | } |
2384 | 2387 | ||
2388 | static void qlge_restore_vlan(struct ql_adapter *qdev) | ||
2389 | { | ||
2390 | qlge_vlan_rx_register(qdev->ndev, qdev->vlgrp); | ||
2391 | |||
2392 | if (qdev->vlgrp) { | ||
2393 | u16 vid; | ||
2394 | for (vid = 0; vid < VLAN_N_VID; vid++) { | ||
2395 | if (!vlan_group_get_device(qdev->vlgrp, vid)) | ||
2396 | continue; | ||
2397 | qlge_vlan_rx_add_vid(qdev->ndev, vid); | ||
2398 | } | ||
2399 | } | ||
2400 | } | ||
2401 | |||
2385 | /* MSI-X Multiple Vector Interrupt Handler for inbound completions. */ | 2402 | /* MSI-X Multiple Vector Interrupt Handler for inbound completions. */ |
2386 | static irqreturn_t qlge_msix_rx_isr(int irq, void *dev_id) | 2403 | static irqreturn_t qlge_msix_rx_isr(int irq, void *dev_id) |
2387 | { | 2404 | { |
@@ -3842,7 +3859,7 @@ static void ql_display_dev_info(struct net_device *ndev) | |||
3842 | "MAC address %pM\n", ndev->dev_addr); | 3859 | "MAC address %pM\n", ndev->dev_addr); |
3843 | } | 3860 | } |
3844 | 3861 | ||
3845 | int ql_wol(struct ql_adapter *qdev) | 3862 | static int ql_wol(struct ql_adapter *qdev) |
3846 | { | 3863 | { |
3847 | int status = 0; | 3864 | int status = 0; |
3848 | u32 wol = MB_WOL_DISABLE; | 3865 | u32 wol = MB_WOL_DISABLE; |
@@ -3957,6 +3974,9 @@ static int ql_adapter_up(struct ql_adapter *qdev) | |||
3957 | clear_bit(QL_PROMISCUOUS, &qdev->flags); | 3974 | clear_bit(QL_PROMISCUOUS, &qdev->flags); |
3958 | qlge_set_multicast_list(qdev->ndev); | 3975 | qlge_set_multicast_list(qdev->ndev); |
3959 | 3976 | ||
3977 | /* Restore vlan setting. */ | ||
3978 | qlge_restore_vlan(qdev); | ||
3979 | |||
3960 | ql_enable_interrupts(qdev); | 3980 | ql_enable_interrupts(qdev); |
3961 | ql_enable_all_completion_interrupts(qdev); | 3981 | ql_enable_all_completion_interrupts(qdev); |
3962 | netif_tx_start_all_queues(qdev->ndev); | 3982 | netif_tx_start_all_queues(qdev->ndev); |
@@ -4242,7 +4262,7 @@ static struct net_device_stats *qlge_get_stats(struct net_device | |||
4242 | return &ndev->stats; | 4262 | return &ndev->stats; |
4243 | } | 4263 | } |
4244 | 4264 | ||
4245 | void qlge_set_multicast_list(struct net_device *ndev) | 4265 | static void qlge_set_multicast_list(struct net_device *ndev) |
4246 | { | 4266 | { |
4247 | struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev); | 4267 | struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev); |
4248 | struct netdev_hw_addr *ha; | 4268 | struct netdev_hw_addr *ha; |
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c index f84e8570c7cb..0e7c7c7ee164 100644 --- a/drivers/net/qlge/qlge_mpi.c +++ b/drivers/net/qlge/qlge_mpi.c | |||
@@ -87,7 +87,7 @@ exit: | |||
87 | return status; | 87 | return status; |
88 | } | 88 | } |
89 | 89 | ||
90 | int ql_soft_reset_mpi_risc(struct ql_adapter *qdev) | 90 | static int ql_soft_reset_mpi_risc(struct ql_adapter *qdev) |
91 | { | 91 | { |
92 | int status; | 92 | int status; |
93 | status = ql_write_mpi_reg(qdev, 0x00001010, 1); | 93 | status = ql_write_mpi_reg(qdev, 0x00001010, 1); |
@@ -681,7 +681,7 @@ int ql_mb_get_fw_state(struct ql_adapter *qdev) | |||
681 | /* Send and ACK mailbox command to the firmware to | 681 | /* Send and ACK mailbox command to the firmware to |
682 | * let it continue with the change. | 682 | * let it continue with the change. |
683 | */ | 683 | */ |
684 | int ql_mb_idc_ack(struct ql_adapter *qdev) | 684 | static int ql_mb_idc_ack(struct ql_adapter *qdev) |
685 | { | 685 | { |
686 | struct mbox_params mbc; | 686 | struct mbox_params mbc; |
687 | struct mbox_params *mbcp = &mbc; | 687 | struct mbox_params *mbcp = &mbc; |
@@ -744,7 +744,7 @@ int ql_mb_set_port_cfg(struct ql_adapter *qdev) | |||
744 | return status; | 744 | return status; |
745 | } | 745 | } |
746 | 746 | ||
747 | int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr, | 747 | static int ql_mb_dump_ram(struct ql_adapter *qdev, u64 req_dma, u32 addr, |
748 | u32 size) | 748 | u32 size) |
749 | { | 749 | { |
750 | int status = 0; | 750 | int status = 0; |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index d88ce9fb1cbd..7d33ef4bcb4a 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -846,10 +846,10 @@ static int rtl8169_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
846 | else | 846 | else |
847 | tp->features &= ~RTL_FEATURE_WOL; | 847 | tp->features &= ~RTL_FEATURE_WOL; |
848 | __rtl8169_set_wol(tp, wol->wolopts); | 848 | __rtl8169_set_wol(tp, wol->wolopts); |
849 | device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts); | ||
850 | |||
851 | spin_unlock_irq(&tp->lock); | 849 | spin_unlock_irq(&tp->lock); |
852 | 850 | ||
851 | device_set_wakeup_enable(&tp->pci_dev->dev, wol->wolopts); | ||
852 | |||
853 | return 0; | 853 | return 0; |
854 | } | 854 | } |
855 | 855 | ||
@@ -2931,7 +2931,7 @@ static const struct rtl_cfg_info { | |||
2931 | .hw_start = rtl_hw_start_8168, | 2931 | .hw_start = rtl_hw_start_8168, |
2932 | .region = 2, | 2932 | .region = 2, |
2933 | .align = 8, | 2933 | .align = 8, |
2934 | .intr_event = SYSErr | RxFIFOOver | LinkChg | RxOverflow | | 2934 | .intr_event = SYSErr | LinkChg | RxOverflow | |
2935 | TxErr | TxOK | RxOK | RxErr, | 2935 | TxErr | TxOK | RxOK | RxErr, |
2936 | .napi_event = TxErr | TxOK | RxOK | RxOverflow, | 2936 | .napi_event = TxErr | TxOK | RxOK | RxOverflow, |
2937 | .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI, | 2937 | .features = RTL_FEATURE_GMII | RTL_FEATURE_MSI, |
@@ -4440,8 +4440,7 @@ static inline void rtl8169_rx_csum(struct sk_buff *skb, u32 opts1) | |||
4440 | u32 status = opts1 & RxProtoMask; | 4440 | u32 status = opts1 & RxProtoMask; |
4441 | 4441 | ||
4442 | if (((status == RxProtoTCP) && !(opts1 & TCPFail)) || | 4442 | if (((status == RxProtoTCP) && !(opts1 & TCPFail)) || |
4443 | ((status == RxProtoUDP) && !(opts1 & UDPFail)) || | 4443 | ((status == RxProtoUDP) && !(opts1 & UDPFail))) |
4444 | ((status == RxProtoIP) && !(opts1 & IPFail))) | ||
4445 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 4444 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
4446 | else | 4445 | else |
4447 | skb_checksum_none_assert(skb); | 4446 | skb_checksum_none_assert(skb); |
@@ -4588,7 +4587,8 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) | |||
4588 | } | 4587 | } |
4589 | 4588 | ||
4590 | /* Work around for rx fifo overflow */ | 4589 | /* Work around for rx fifo overflow */ |
4591 | if (unlikely(status & RxFIFOOver)) { | 4590 | if (unlikely(status & RxFIFOOver) && |
4591 | (tp->mac_version == RTL_GIGA_MAC_VER_11)) { | ||
4592 | netif_stop_queue(dev); | 4592 | netif_stop_queue(dev); |
4593 | rtl8169_tx_timeout(dev); | 4593 | rtl8169_tx_timeout(dev); |
4594 | break; | 4594 | break; |
diff --git a/drivers/net/sb1000.c b/drivers/net/sb1000.c index a9ae505e1baf..66c2f1a01963 100644 --- a/drivers/net/sb1000.c +++ b/drivers/net/sb1000.c | |||
@@ -961,9 +961,9 @@ sb1000_open(struct net_device *dev) | |||
961 | lp->rx_error_count = 0; | 961 | lp->rx_error_count = 0; |
962 | lp->rx_error_dpc_count = 0; | 962 | lp->rx_error_dpc_count = 0; |
963 | lp->rx_session_id[0] = 0x50; | 963 | lp->rx_session_id[0] = 0x50; |
964 | lp->rx_session_id[0] = 0x48; | 964 | lp->rx_session_id[1] = 0x48; |
965 | lp->rx_session_id[0] = 0x44; | 965 | lp->rx_session_id[2] = 0x44; |
966 | lp->rx_session_id[0] = 0x42; | 966 | lp->rx_session_id[3] = 0x42; |
967 | lp->rx_frame_id[0] = 0; | 967 | lp->rx_frame_id[0] = 0; |
968 | lp->rx_frame_id[1] = 0; | 968 | lp->rx_frame_id[1] = 0; |
969 | lp->rx_frame_id[2] = 0; | 969 | lp->rx_frame_id[2] = 0; |
diff --git a/drivers/net/sgiseeq.c b/drivers/net/sgiseeq.c index 9265315baa0b..3a0cc63428ee 100644 --- a/drivers/net/sgiseeq.c +++ b/drivers/net/sgiseeq.c | |||
@@ -531,7 +531,7 @@ static int sgiseeq_open(struct net_device *dev) | |||
531 | 531 | ||
532 | if (request_irq(irq, sgiseeq_interrupt, 0, sgiseeqstr, dev)) { | 532 | if (request_irq(irq, sgiseeq_interrupt, 0, sgiseeqstr, dev)) { |
533 | printk(KERN_ERR "Seeq8003: Can't get irq %d\n", dev->irq); | 533 | printk(KERN_ERR "Seeq8003: Can't get irq %d\n", dev->irq); |
534 | err = -EAGAIN; | 534 | return -EAGAIN; |
535 | } | 535 | } |
536 | 536 | ||
537 | err = init_seeq(dev, sp, sregs); | 537 | err = init_seeq(dev, sp, sregs); |
diff --git a/drivers/net/skge.c b/drivers/net/skge.c index bfec2e0f5275..220e0398f1d5 100644 --- a/drivers/net/skge.c +++ b/drivers/net/skge.c | |||
@@ -3858,7 +3858,6 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port, | |||
3858 | 3858 | ||
3859 | /* device is off until link detection */ | 3859 | /* device is off until link detection */ |
3860 | netif_carrier_off(dev); | 3860 | netif_carrier_off(dev); |
3861 | netif_stop_queue(dev); | ||
3862 | 3861 | ||
3863 | return dev; | 3862 | return dev; |
3864 | } | 3863 | } |
diff --git a/drivers/net/slhc.c b/drivers/net/slhc.c index ac279fad9d45..ab9e3b785b5b 100644 --- a/drivers/net/slhc.c +++ b/drivers/net/slhc.c | |||
@@ -688,18 +688,8 @@ slhc_toss(struct slcompress *comp) | |||
688 | return 0; | 688 | return 0; |
689 | } | 689 | } |
690 | 690 | ||
691 | |||
692 | /* VJ header compression */ | ||
693 | EXPORT_SYMBOL(slhc_init); | ||
694 | EXPORT_SYMBOL(slhc_free); | ||
695 | EXPORT_SYMBOL(slhc_remember); | ||
696 | EXPORT_SYMBOL(slhc_compress); | ||
697 | EXPORT_SYMBOL(slhc_uncompress); | ||
698 | EXPORT_SYMBOL(slhc_toss); | ||
699 | |||
700 | #else /* CONFIG_INET */ | 691 | #else /* CONFIG_INET */ |
701 | 692 | ||
702 | |||
703 | int | 693 | int |
704 | slhc_toss(struct slcompress *comp) | 694 | slhc_toss(struct slcompress *comp) |
705 | { | 695 | { |
@@ -738,6 +728,10 @@ slhc_init(int rslots, int tslots) | |||
738 | printk(KERN_DEBUG "Called IP function on non IP-system: slhc_init"); | 728 | printk(KERN_DEBUG "Called IP function on non IP-system: slhc_init"); |
739 | return NULL; | 729 | return NULL; |
740 | } | 730 | } |
731 | |||
732 | #endif /* CONFIG_INET */ | ||
733 | |||
734 | /* VJ header compression */ | ||
741 | EXPORT_SYMBOL(slhc_init); | 735 | EXPORT_SYMBOL(slhc_init); |
742 | EXPORT_SYMBOL(slhc_free); | 736 | EXPORT_SYMBOL(slhc_free); |
743 | EXPORT_SYMBOL(slhc_remember); | 737 | EXPORT_SYMBOL(slhc_remember); |
@@ -745,5 +739,4 @@ EXPORT_SYMBOL(slhc_compress); | |||
745 | EXPORT_SYMBOL(slhc_uncompress); | 739 | EXPORT_SYMBOL(slhc_uncompress); |
746 | EXPORT_SYMBOL(slhc_toss); | 740 | EXPORT_SYMBOL(slhc_toss); |
747 | 741 | ||
748 | #endif /* CONFIG_INET */ | ||
749 | MODULE_LICENSE("Dual BSD/GPL"); | 742 | MODULE_LICENSE("Dual BSD/GPL"); |
diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c index a8e5856ce882..64bfdae5956f 100644 --- a/drivers/net/smsc911x.c +++ b/drivers/net/smsc911x.c | |||
@@ -2075,7 +2075,7 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev) | |||
2075 | } else { | 2075 | } else { |
2076 | /* Try reading mac address from device. if EEPROM is present | 2076 | /* Try reading mac address from device. if EEPROM is present |
2077 | * it will already have been set */ | 2077 | * it will already have been set */ |
2078 | smsc911x_read_mac_address(dev); | 2078 | smsc_get_mac(dev); |
2079 | 2079 | ||
2080 | if (is_valid_ether_addr(dev->dev_addr)) { | 2080 | if (is_valid_ether_addr(dev->dev_addr)) { |
2081 | /* eeprom values are valid so use them */ | 2081 | /* eeprom values are valid so use them */ |
@@ -2176,6 +2176,7 @@ static struct platform_driver smsc911x_driver = { | |||
2176 | /* Entry point for loading the module */ | 2176 | /* Entry point for loading the module */ |
2177 | static int __init smsc911x_init_module(void) | 2177 | static int __init smsc911x_init_module(void) |
2178 | { | 2178 | { |
2179 | SMSC_INITIALIZE(); | ||
2179 | return platform_driver_register(&smsc911x_driver); | 2180 | return platform_driver_register(&smsc911x_driver); |
2180 | } | 2181 | } |
2181 | 2182 | ||
diff --git a/drivers/net/smsc911x.h b/drivers/net/smsc911x.h index 016360c65ce2..50f712e99e96 100644 --- a/drivers/net/smsc911x.h +++ b/drivers/net/smsc911x.h | |||
@@ -22,7 +22,7 @@ | |||
22 | #define __SMSC911X_H__ | 22 | #define __SMSC911X_H__ |
23 | 23 | ||
24 | #define TX_FIFO_LOW_THRESHOLD ((u32)1600) | 24 | #define TX_FIFO_LOW_THRESHOLD ((u32)1600) |
25 | #define SMSC911X_EEPROM_SIZE ((u32)7) | 25 | #define SMSC911X_EEPROM_SIZE ((u32)128) |
26 | #define USE_DEBUG 0 | 26 | #define USE_DEBUG 0 |
27 | 27 | ||
28 | /* This is the maximum number of packets to be received every | 28 | /* This is the maximum number of packets to be received every |
@@ -394,4 +394,15 @@ | |||
394 | #define LPA_PAUSE_ALL (LPA_PAUSE_CAP | \ | 394 | #define LPA_PAUSE_ALL (LPA_PAUSE_CAP | \ |
395 | LPA_PAUSE_ASYM) | 395 | LPA_PAUSE_ASYM) |
396 | 396 | ||
397 | /* | ||
398 | * Provide hooks to let the arch add to the initialisation procedure | ||
399 | * and to override the source of the MAC address. | ||
400 | */ | ||
401 | #define SMSC_INITIALIZE() do {} while (0) | ||
402 | #define smsc_get_mac(dev) smsc911x_read_mac_address((dev)) | ||
403 | |||
404 | #ifdef CONFIG_SMSC911X_ARCH_HOOKS | ||
405 | #include <asm/smsc911x.h> | ||
406 | #endif | ||
407 | |||
397 | #endif /* __SMSC911X_H__ */ | 408 | #endif /* __SMSC911X_H__ */ |
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c index 823b9e6431d5..06bc6034ce81 100644 --- a/drivers/net/stmmac/stmmac_main.c +++ b/drivers/net/stmmac/stmmac_main.c | |||
@@ -337,33 +337,19 @@ static int stmmac_init_phy(struct net_device *dev) | |||
337 | return 0; | 337 | return 0; |
338 | } | 338 | } |
339 | 339 | ||
340 | static inline void stmmac_mac_enable_rx(void __iomem *ioaddr) | 340 | static inline void stmmac_enable_mac(void __iomem *ioaddr) |
341 | { | 341 | { |
342 | u32 value = readl(ioaddr + MAC_CTRL_REG); | 342 | u32 value = readl(ioaddr + MAC_CTRL_REG); |
343 | value |= MAC_RNABLE_RX; | ||
344 | /* Set the RE (receive enable bit into the MAC CTRL register). */ | ||
345 | writel(value, ioaddr + MAC_CTRL_REG); | ||
346 | } | ||
347 | 343 | ||
348 | static inline void stmmac_mac_enable_tx(void __iomem *ioaddr) | 344 | value |= MAC_RNABLE_RX | MAC_ENABLE_TX; |
349 | { | ||
350 | u32 value = readl(ioaddr + MAC_CTRL_REG); | ||
351 | value |= MAC_ENABLE_TX; | ||
352 | /* Set the TE (transmit enable bit into the MAC CTRL register). */ | ||
353 | writel(value, ioaddr + MAC_CTRL_REG); | 345 | writel(value, ioaddr + MAC_CTRL_REG); |
354 | } | 346 | } |
355 | 347 | ||
356 | static inline void stmmac_mac_disable_rx(void __iomem *ioaddr) | 348 | static inline void stmmac_disable_mac(void __iomem *ioaddr) |
357 | { | 349 | { |
358 | u32 value = readl(ioaddr + MAC_CTRL_REG); | 350 | u32 value = readl(ioaddr + MAC_CTRL_REG); |
359 | value &= ~MAC_RNABLE_RX; | ||
360 | writel(value, ioaddr + MAC_CTRL_REG); | ||
361 | } | ||
362 | 351 | ||
363 | static inline void stmmac_mac_disable_tx(void __iomem *ioaddr) | 352 | value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX); |
364 | { | ||
365 | u32 value = readl(ioaddr + MAC_CTRL_REG); | ||
366 | value &= ~MAC_ENABLE_TX; | ||
367 | writel(value, ioaddr + MAC_CTRL_REG); | 353 | writel(value, ioaddr + MAC_CTRL_REG); |
368 | } | 354 | } |
369 | 355 | ||
@@ -857,8 +843,7 @@ static int stmmac_open(struct net_device *dev) | |||
857 | writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK); | 843 | writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK); |
858 | 844 | ||
859 | /* Enable the MAC Rx/Tx */ | 845 | /* Enable the MAC Rx/Tx */ |
860 | stmmac_mac_enable_rx(priv->ioaddr); | 846 | stmmac_enable_mac(priv->ioaddr); |
861 | stmmac_mac_enable_tx(priv->ioaddr); | ||
862 | 847 | ||
863 | /* Set the HW DMA mode and the COE */ | 848 | /* Set the HW DMA mode and the COE */ |
864 | stmmac_dma_operation_mode(priv); | 849 | stmmac_dma_operation_mode(priv); |
@@ -928,9 +913,8 @@ static int stmmac_release(struct net_device *dev) | |||
928 | /* Release and free the Rx/Tx resources */ | 913 | /* Release and free the Rx/Tx resources */ |
929 | free_dma_desc_resources(priv); | 914 | free_dma_desc_resources(priv); |
930 | 915 | ||
931 | /* Disable the MAC core */ | 916 | /* Disable the MAC Rx/Tx */ |
932 | stmmac_mac_disable_tx(priv->ioaddr); | 917 | stmmac_disable_mac(priv->ioaddr); |
933 | stmmac_mac_disable_rx(priv->ioaddr); | ||
934 | 918 | ||
935 | netif_carrier_off(dev); | 919 | netif_carrier_off(dev); |
936 | 920 | ||
@@ -1787,8 +1771,7 @@ static int stmmac_dvr_remove(struct platform_device *pdev) | |||
1787 | priv->hw->dma->stop_rx(priv->ioaddr); | 1771 | priv->hw->dma->stop_rx(priv->ioaddr); |
1788 | priv->hw->dma->stop_tx(priv->ioaddr); | 1772 | priv->hw->dma->stop_tx(priv->ioaddr); |
1789 | 1773 | ||
1790 | stmmac_mac_disable_rx(priv->ioaddr); | 1774 | stmmac_disable_mac(priv->ioaddr); |
1791 | stmmac_mac_disable_tx(priv->ioaddr); | ||
1792 | 1775 | ||
1793 | netif_carrier_off(ndev); | 1776 | netif_carrier_off(ndev); |
1794 | 1777 | ||
@@ -1839,13 +1822,11 @@ static int stmmac_suspend(struct platform_device *pdev, pm_message_t state) | |||
1839 | dis_ic); | 1822 | dis_ic); |
1840 | priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size); | 1823 | priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size); |
1841 | 1824 | ||
1842 | stmmac_mac_disable_tx(priv->ioaddr); | ||
1843 | |||
1844 | /* Enable Power down mode by programming the PMT regs */ | 1825 | /* Enable Power down mode by programming the PMT regs */ |
1845 | if (device_can_wakeup(priv->device)) | 1826 | if (device_can_wakeup(priv->device)) |
1846 | priv->hw->mac->pmt(priv->ioaddr, priv->wolopts); | 1827 | priv->hw->mac->pmt(priv->ioaddr, priv->wolopts); |
1847 | else | 1828 | else |
1848 | stmmac_mac_disable_rx(priv->ioaddr); | 1829 | stmmac_disable_mac(priv->ioaddr); |
1849 | } else { | 1830 | } else { |
1850 | priv->shutdown = 1; | 1831 | priv->shutdown = 1; |
1851 | /* Although this can appear slightly redundant it actually | 1832 | /* Although this can appear slightly redundant it actually |
@@ -1886,8 +1867,7 @@ static int stmmac_resume(struct platform_device *pdev) | |||
1886 | netif_device_attach(dev); | 1867 | netif_device_attach(dev); |
1887 | 1868 | ||
1888 | /* Enable the MAC and DMA */ | 1869 | /* Enable the MAC and DMA */ |
1889 | stmmac_mac_enable_rx(priv->ioaddr); | 1870 | stmmac_enable_mac(priv->ioaddr); |
1890 | stmmac_mac_enable_tx(priv->ioaddr); | ||
1891 | priv->hw->dma->start_tx(priv->ioaddr); | 1871 | priv->hw->dma->start_tx(priv->ioaddr); |
1892 | priv->hw->dma->start_rx(priv->ioaddr); | 1872 | priv->hw->dma->start_rx(priv->ioaddr); |
1893 | 1873 | ||
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index 852e917778f8..30ccbb6d097a 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -9948,16 +9948,16 @@ static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
9948 | !((tp->tg3_flags & TG3_FLAG_WOL_CAP) && device_can_wakeup(dp))) | 9948 | !((tp->tg3_flags & TG3_FLAG_WOL_CAP) && device_can_wakeup(dp))) |
9949 | return -EINVAL; | 9949 | return -EINVAL; |
9950 | 9950 | ||
9951 | device_set_wakeup_enable(dp, wol->wolopts & WAKE_MAGIC); | ||
9952 | |||
9951 | spin_lock_bh(&tp->lock); | 9953 | spin_lock_bh(&tp->lock); |
9952 | if (wol->wolopts & WAKE_MAGIC) { | 9954 | if (device_may_wakeup(dp)) |
9953 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; | 9955 | tp->tg3_flags |= TG3_FLAG_WOL_ENABLE; |
9954 | device_set_wakeup_enable(dp, true); | 9956 | else |
9955 | } else { | ||
9956 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; | 9957 | tp->tg3_flags &= ~TG3_FLAG_WOL_ENABLE; |
9957 | device_set_wakeup_enable(dp, false); | ||
9958 | } | ||
9959 | spin_unlock_bh(&tp->lock); | 9958 | spin_unlock_bh(&tp->lock); |
9960 | 9959 | ||
9960 | |||
9961 | return 0; | 9961 | return 0; |
9962 | } | 9962 | } |
9963 | 9963 | ||
diff --git a/drivers/net/tile/Makefile b/drivers/net/tile/Makefile new file mode 100644 index 000000000000..f634f142cab4 --- /dev/null +++ b/drivers/net/tile/Makefile | |||
@@ -0,0 +1,10 @@ | |||
1 | # | ||
2 | # Makefile for the TILE on-chip networking support. | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_TILE_NET) += tile_net.o | ||
6 | ifdef CONFIG_TILEGX | ||
7 | tile_net-objs := tilegx.o mpipe.o iorpc_mpipe.o dma_queue.o | ||
8 | else | ||
9 | tile_net-objs := tilepro.o | ||
10 | endif | ||
diff --git a/drivers/net/tile/tilepro.c b/drivers/net/tile/tilepro.c new file mode 100644 index 000000000000..0e6bac5ec65b --- /dev/null +++ b/drivers/net/tile/tilepro.c | |||
@@ -0,0 +1,2406 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Tilera Corporation. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation, version 2. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, but | ||
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
11 | * NON INFRINGEMENT. See the GNU General Public License for | ||
12 | * more details. | ||
13 | */ | ||
14 | |||
15 | #include <linux/module.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/moduleparam.h> | ||
18 | #include <linux/sched.h> | ||
19 | #include <linux/kernel.h> /* printk() */ | ||
20 | #include <linux/slab.h> /* kmalloc() */ | ||
21 | #include <linux/errno.h> /* error codes */ | ||
22 | #include <linux/types.h> /* size_t */ | ||
23 | #include <linux/interrupt.h> | ||
24 | #include <linux/in.h> | ||
25 | #include <linux/netdevice.h> /* struct device, and other headers */ | ||
26 | #include <linux/etherdevice.h> /* eth_type_trans */ | ||
27 | #include <linux/skbuff.h> | ||
28 | #include <linux/ioctl.h> | ||
29 | #include <linux/cdev.h> | ||
30 | #include <linux/hugetlb.h> | ||
31 | #include <linux/in6.h> | ||
32 | #include <linux/timer.h> | ||
33 | #include <linux/io.h> | ||
34 | #include <asm/checksum.h> | ||
35 | #include <asm/homecache.h> | ||
36 | |||
37 | #include <hv/drv_xgbe_intf.h> | ||
38 | #include <hv/drv_xgbe_impl.h> | ||
39 | #include <hv/hypervisor.h> | ||
40 | #include <hv/netio_intf.h> | ||
41 | |||
42 | /* For TSO */ | ||
43 | #include <linux/ip.h> | ||
44 | #include <linux/tcp.h> | ||
45 | |||
46 | |||
47 | /* There is no singlethread_cpu, so schedule work on the current cpu. */ | ||
48 | #define singlethread_cpu -1 | ||
49 | |||
50 | |||
51 | /* | ||
52 | * First, "tile_net_init_module()" initializes all four "devices" which | ||
53 | * can be used by linux. | ||
54 | * | ||
55 | * Then, "ifconfig DEVICE up" calls "tile_net_open()", which analyzes | ||
56 | * the network cpus, then uses "tile_net_open_aux()" to initialize | ||
57 | * LIPP/LEPP, and then uses "tile_net_open_inner()" to register all | ||
58 | * the tiles, provide buffers to LIPP, allow ingress to start, and | ||
59 | * turn on hypervisor interrupt handling (and NAPI) on all tiles. | ||
60 | * | ||
61 | * If registration fails due to the link being down, then "retry_work" | ||
62 | * is used to keep calling "tile_net_open_inner()" until it succeeds. | ||
63 | * | ||
64 | * If "ifconfig DEVICE down" is called, it uses "tile_net_stop()" to | ||
65 | * stop egress, drain the LIPP buffers, unregister all the tiles, stop | ||
66 | * LIPP/LEPP, and wipe the LEPP queue. | ||
67 | * | ||
68 | * We start out with the ingress interrupt enabled on each CPU. When | ||
69 | * this interrupt fires, we disable it, and call "napi_schedule()". | ||
70 | * This will cause "tile_net_poll()" to be called, which will pull | ||
71 | * packets from the netio queue, filtering them out, or passing them | ||
72 | * to "netif_receive_skb()". If our budget is exhausted, we will | ||
73 | * return, knowing we will be called again later. Otherwise, we | ||
74 | * reenable the ingress interrupt, and call "napi_complete()". | ||
75 | * | ||
76 | * | ||
77 | * NOTE: The use of "native_driver" ensures that EPP exists, and that | ||
78 | * "epp_sendv" is legal, and that "LIPP" is being used. | ||
79 | * | ||
80 | * NOTE: Failing to free completions for an arbitrarily long time | ||
81 | * (which is defined to be illegal) does in fact cause bizarre | ||
82 | * problems. The "egress_timer" helps prevent this from happening. | ||
83 | * | ||
84 | * NOTE: The egress code can be interrupted by the interrupt handler. | ||
85 | */ | ||
86 | |||
87 | |||
88 | /* HACK: Allow use of "jumbo" packets. */ | ||
89 | /* This should be 1500 if "jumbo" is not set in LIPP. */ | ||
90 | /* This should be at most 10226 (10240 - 14) if "jumbo" is set in LIPP. */ | ||
91 | /* ISSUE: This has not been thoroughly tested (except at 1500). */ | ||
92 | #define TILE_NET_MTU 1500 | ||
93 | |||
94 | /* HACK: Define to support GSO. */ | ||
95 | /* ISSUE: This may actually hurt performance of the TCP blaster. */ | ||
96 | /* #define TILE_NET_GSO */ | ||
97 | |||
98 | /* Define this to collapse "duplicate" acks. */ | ||
99 | /* #define IGNORE_DUP_ACKS */ | ||
100 | |||
101 | /* HACK: Define this to verify incoming packets. */ | ||
102 | /* #define TILE_NET_VERIFY_INGRESS */ | ||
103 | |||
104 | /* Use 3000 to enable the Linux Traffic Control (QoS) layer, else 0. */ | ||
105 | #define TILE_NET_TX_QUEUE_LEN 0 | ||
106 | |||
107 | /* Define to dump packets (prints out the whole packet on tx and rx). */ | ||
108 | /* #define TILE_NET_DUMP_PACKETS */ | ||
109 | |||
110 | /* Define to enable debug spew (all PDEBUG's are enabled). */ | ||
111 | /* #define TILE_NET_DEBUG */ | ||
112 | |||
113 | |||
114 | /* Define to activate paranoia checks. */ | ||
115 | /* #define TILE_NET_PARANOIA */ | ||
116 | |||
117 | /* Default transmit lockup timeout period, in jiffies. */ | ||
118 | #define TILE_NET_TIMEOUT (5 * HZ) | ||
119 | |||
120 | /* Default retry interval for bringing up the NetIO interface, in jiffies. */ | ||
121 | #define TILE_NET_RETRY_INTERVAL (5 * HZ) | ||
122 | |||
123 | /* Number of ports (xgbe0, xgbe1, gbe0, gbe1). */ | ||
124 | #define TILE_NET_DEVS 4 | ||
125 | |||
126 | |||
127 | |||
128 | /* Paranoia. */ | ||
129 | #if NET_IP_ALIGN != LIPP_PACKET_PADDING | ||
130 | #error "NET_IP_ALIGN must match LIPP_PACKET_PADDING." | ||
131 | #endif | ||
132 | |||
133 | |||
134 | /* Debug print. */ | ||
135 | #ifdef TILE_NET_DEBUG | ||
136 | #define PDEBUG(fmt, args...) net_printk(fmt, ## args) | ||
137 | #else | ||
138 | #define PDEBUG(fmt, args...) | ||
139 | #endif | ||
140 | |||
141 | |||
142 | MODULE_AUTHOR("Tilera"); | ||
143 | MODULE_LICENSE("GPL"); | ||
144 | |||
145 | |||
146 | #define IS_MULTICAST(mac_addr) \ | ||
147 | (((u8 *)(mac_addr))[0] & 0x01) | ||
148 | |||
149 | #define IS_BROADCAST(mac_addr) \ | ||
150 | (((u16 *)(mac_addr))[0] == 0xffff) | ||
151 | |||
152 | |||
153 | /* | ||
154 | * Queue of incoming packets for a specific cpu and device. | ||
155 | * | ||
156 | * Includes a pointer to the "system" data, and the actual "user" data. | ||
157 | */ | ||
158 | struct tile_netio_queue { | ||
159 | netio_queue_impl_t *__system_part; | ||
160 | netio_queue_user_impl_t __user_part; | ||
161 | |||
162 | }; | ||
163 | |||
164 | |||
165 | /* | ||
166 | * Statistics counters for a specific cpu and device. | ||
167 | */ | ||
168 | struct tile_net_stats_t { | ||
169 | u32 rx_packets; | ||
170 | u32 rx_bytes; | ||
171 | u32 tx_packets; | ||
172 | u32 tx_bytes; | ||
173 | }; | ||
174 | |||
175 | |||
176 | /* | ||
177 | * Info for a specific cpu and device. | ||
178 | * | ||
179 | * ISSUE: There is a "dev" pointer in "napi" as well. | ||
180 | */ | ||
181 | struct tile_net_cpu { | ||
182 | /* The NAPI struct. */ | ||
183 | struct napi_struct napi; | ||
184 | /* Packet queue. */ | ||
185 | struct tile_netio_queue queue; | ||
186 | /* Statistics. */ | ||
187 | struct tile_net_stats_t stats; | ||
188 | /* ISSUE: Is this needed? */ | ||
189 | bool napi_enabled; | ||
190 | /* True if this tile has succcessfully registered with the IPP. */ | ||
191 | bool registered; | ||
192 | /* True if the link was down last time we tried to register. */ | ||
193 | bool link_down; | ||
194 | /* True if "egress_timer" is scheduled. */ | ||
195 | bool egress_timer_scheduled; | ||
196 | /* Number of small sk_buffs which must still be provided. */ | ||
197 | unsigned int num_needed_small_buffers; | ||
198 | /* Number of large sk_buffs which must still be provided. */ | ||
199 | unsigned int num_needed_large_buffers; | ||
200 | /* A timer for handling egress completions. */ | ||
201 | struct timer_list egress_timer; | ||
202 | }; | ||
203 | |||
204 | |||
205 | /* | ||
206 | * Info for a specific device. | ||
207 | */ | ||
208 | struct tile_net_priv { | ||
209 | /* Our network device. */ | ||
210 | struct net_device *dev; | ||
211 | /* The actual egress queue. */ | ||
212 | lepp_queue_t *epp_queue; | ||
213 | /* Protects "epp_queue->cmd_tail" and "epp_queue->comp_tail" */ | ||
214 | spinlock_t cmd_lock; | ||
215 | /* Protects "epp_queue->comp_head". */ | ||
216 | spinlock_t comp_lock; | ||
217 | /* The hypervisor handle for this interface. */ | ||
218 | int hv_devhdl; | ||
219 | /* The intr bit mask that IDs this device. */ | ||
220 | u32 intr_id; | ||
221 | /* True iff "tile_net_open_aux()" has succeeded. */ | ||
222 | int partly_opened; | ||
223 | /* True iff "tile_net_open_inner()" has succeeded. */ | ||
224 | int fully_opened; | ||
225 | /* Effective network cpus. */ | ||
226 | struct cpumask network_cpus_map; | ||
227 | /* Number of network cpus. */ | ||
228 | int network_cpus_count; | ||
229 | /* Credits per network cpu. */ | ||
230 | int network_cpus_credits; | ||
231 | /* Network stats. */ | ||
232 | struct net_device_stats stats; | ||
233 | /* For NetIO bringup retries. */ | ||
234 | struct delayed_work retry_work; | ||
235 | /* Quick access to per cpu data. */ | ||
236 | struct tile_net_cpu *cpu[NR_CPUS]; | ||
237 | }; | ||
238 | |||
239 | |||
240 | /* | ||
241 | * The actual devices (xgbe0, xgbe1, gbe0, gbe1). | ||
242 | */ | ||
243 | static struct net_device *tile_net_devs[TILE_NET_DEVS]; | ||
244 | |||
245 | /* | ||
246 | * The "tile_net_cpu" structures for each device. | ||
247 | */ | ||
248 | static DEFINE_PER_CPU(struct tile_net_cpu, hv_xgbe0); | ||
249 | static DEFINE_PER_CPU(struct tile_net_cpu, hv_xgbe1); | ||
250 | static DEFINE_PER_CPU(struct tile_net_cpu, hv_gbe0); | ||
251 | static DEFINE_PER_CPU(struct tile_net_cpu, hv_gbe1); | ||
252 | |||
253 | |||
254 | /* | ||
255 | * True if "network_cpus" was specified. | ||
256 | */ | ||
257 | static bool network_cpus_used; | ||
258 | |||
259 | /* | ||
260 | * The actual cpus in "network_cpus". | ||
261 | */ | ||
262 | static struct cpumask network_cpus_map; | ||
263 | |||
264 | |||
265 | |||
266 | #ifdef TILE_NET_DEBUG | ||
267 | /* | ||
268 | * printk with extra stuff. | ||
269 | * | ||
270 | * We print the CPU we're running in brackets. | ||
271 | */ | ||
272 | static void net_printk(char *fmt, ...) | ||
273 | { | ||
274 | int i; | ||
275 | int len; | ||
276 | va_list args; | ||
277 | static char buf[256]; | ||
278 | |||
279 | len = sprintf(buf, "tile_net[%2.2d]: ", smp_processor_id()); | ||
280 | va_start(args, fmt); | ||
281 | i = vscnprintf(buf + len, sizeof(buf) - len - 1, fmt, args); | ||
282 | va_end(args); | ||
283 | buf[255] = '\0'; | ||
284 | pr_notice(buf); | ||
285 | } | ||
286 | #endif | ||
287 | |||
288 | |||
289 | #ifdef TILE_NET_DUMP_PACKETS | ||
290 | /* | ||
291 | * Dump a packet. | ||
292 | */ | ||
293 | static void dump_packet(unsigned char *data, unsigned long length, char *s) | ||
294 | { | ||
295 | unsigned long i; | ||
296 | static unsigned int count; | ||
297 | |||
298 | pr_info("dump_packet(data %p, length 0x%lx s %s count 0x%x)\n", | ||
299 | data, length, s, count++); | ||
300 | |||
301 | pr_info("\n"); | ||
302 | |||
303 | for (i = 0; i < length; i++) { | ||
304 | if ((i & 0xf) == 0) | ||
305 | sprintf(buf, "%8.8lx:", i); | ||
306 | sprintf(buf + strlen(buf), " %2.2x", data[i]); | ||
307 | if ((i & 0xf) == 0xf || i == length - 1) | ||
308 | pr_info("%s\n", buf); | ||
309 | } | ||
310 | } | ||
311 | #endif | ||
312 | |||
313 | |||
314 | /* | ||
315 | * Provide support for the __netio_fastio1() swint | ||
316 | * (see <hv/drv_xgbe_intf.h> for how it is used). | ||
317 | * | ||
318 | * The fastio swint2 call may clobber all the caller-saved registers. | ||
319 | * It rarely clobbers memory, but we allow for the possibility in | ||
320 | * the signature just to be on the safe side. | ||
321 | * | ||
322 | * Also, gcc doesn't seem to allow an input operand to be | ||
323 | * clobbered, so we fake it with dummy outputs. | ||
324 | * | ||
325 | * This function can't be static because of the way it is declared | ||
326 | * in the netio header. | ||
327 | */ | ||
328 | inline int __netio_fastio1(u32 fastio_index, u32 arg0) | ||
329 | { | ||
330 | long result, clobber_r1, clobber_r10; | ||
331 | asm volatile("swint2" | ||
332 | : "=R00" (result), | ||
333 | "=R01" (clobber_r1), "=R10" (clobber_r10) | ||
334 | : "R10" (fastio_index), "R01" (arg0) | ||
335 | : "memory", "r2", "r3", "r4", | ||
336 | "r5", "r6", "r7", "r8", "r9", | ||
337 | "r11", "r12", "r13", "r14", | ||
338 | "r15", "r16", "r17", "r18", "r19", | ||
339 | "r20", "r21", "r22", "r23", "r24", | ||
340 | "r25", "r26", "r27", "r28", "r29"); | ||
341 | return result; | ||
342 | } | ||
343 | |||
344 | |||
345 | /* | ||
346 | * Provide a linux buffer to LIPP. | ||
347 | */ | ||
348 | static void tile_net_provide_linux_buffer(struct tile_net_cpu *info, | ||
349 | void *va, bool small) | ||
350 | { | ||
351 | struct tile_netio_queue *queue = &info->queue; | ||
352 | |||
353 | /* Convert "va" and "small" to "linux_buffer_t". */ | ||
354 | unsigned int buffer = ((unsigned int)(__pa(va) >> 7) << 1) + small; | ||
355 | |||
356 | __netio_fastio_free_buffer(queue->__user_part.__fastio_index, buffer); | ||
357 | } | ||
358 | |||
359 | |||
360 | /* | ||
361 | * Provide a linux buffer for LIPP. | ||
362 | */ | ||
363 | static bool tile_net_provide_needed_buffer(struct tile_net_cpu *info, | ||
364 | bool small) | ||
365 | { | ||
366 | /* ISSUE: What should we use here? */ | ||
367 | unsigned int large_size = NET_IP_ALIGN + TILE_NET_MTU + 100; | ||
368 | |||
369 | /* Round up to ensure to avoid "false sharing" with last cache line. */ | ||
370 | unsigned int buffer_size = | ||
371 | (((small ? LIPP_SMALL_PACKET_SIZE : large_size) + | ||
372 | CHIP_L2_LINE_SIZE() - 1) & -CHIP_L2_LINE_SIZE()); | ||
373 | |||
374 | /* | ||
375 | * ISSUE: Since CPAs are 38 bits, and we can only encode the | ||
376 | * high 31 bits in a "linux_buffer_t", the low 7 bits must be | ||
377 | * zero, and thus, we must align the actual "va" mod 128. | ||
378 | */ | ||
379 | const unsigned long align = 128; | ||
380 | |||
381 | struct sk_buff *skb; | ||
382 | void *va; | ||
383 | |||
384 | struct sk_buff **skb_ptr; | ||
385 | |||
386 | /* Note that "dev_alloc_skb()" adds NET_SKB_PAD more bytes, */ | ||
387 | /* and also "reserves" that many bytes. */ | ||
388 | /* ISSUE: Can we "share" the NET_SKB_PAD bytes with "skb_ptr"? */ | ||
389 | int len = sizeof(*skb_ptr) + align + buffer_size; | ||
390 | |||
391 | while (1) { | ||
392 | |||
393 | /* Allocate (or fail). */ | ||
394 | skb = dev_alloc_skb(len); | ||
395 | if (skb == NULL) | ||
396 | return false; | ||
397 | |||
398 | /* Make room for a back-pointer to 'skb'. */ | ||
399 | skb_reserve(skb, sizeof(*skb_ptr)); | ||
400 | |||
401 | /* Make sure we are aligned. */ | ||
402 | skb_reserve(skb, -(long)skb->data & (align - 1)); | ||
403 | |||
404 | /* This address is given to IPP. */ | ||
405 | va = skb->data; | ||
406 | |||
407 | if (small) | ||
408 | break; | ||
409 | |||
410 | /* ISSUE: This has never been observed! */ | ||
411 | /* Large buffers must not span a huge page. */ | ||
412 | if (((((long)va & ~HPAGE_MASK) + 1535) & HPAGE_MASK) == 0) | ||
413 | break; | ||
414 | pr_err("Leaking unaligned linux buffer at %p.\n", va); | ||
415 | } | ||
416 | |||
417 | /* Skip two bytes to satisfy LIPP assumptions. */ | ||
418 | /* Note that this aligns IP on a 16 byte boundary. */ | ||
419 | /* ISSUE: Do this when the packet arrives? */ | ||
420 | skb_reserve(skb, NET_IP_ALIGN); | ||
421 | |||
422 | /* Save a back-pointer to 'skb'. */ | ||
423 | skb_ptr = va - sizeof(*skb_ptr); | ||
424 | *skb_ptr = skb; | ||
425 | |||
426 | /* Invalidate the packet buffer. */ | ||
427 | if (!hash_default) | ||
428 | __inv_buffer(skb->data, buffer_size); | ||
429 | |||
430 | /* Make sure "skb_ptr" has been flushed. */ | ||
431 | __insn_mf(); | ||
432 | |||
433 | #ifdef TILE_NET_PARANOIA | ||
434 | #if CHIP_HAS_CBOX_HOME_MAP() | ||
435 | if (hash_default) { | ||
436 | HV_PTE pte = *virt_to_pte(current->mm, (unsigned long)va); | ||
437 | if (hv_pte_get_mode(pte) != HV_PTE_MODE_CACHE_HASH_L3) | ||
438 | panic("Non-coherent ingress buffer!"); | ||
439 | } | ||
440 | #endif | ||
441 | #endif | ||
442 | |||
443 | /* Provide the new buffer. */ | ||
444 | tile_net_provide_linux_buffer(info, va, small); | ||
445 | |||
446 | return true; | ||
447 | } | ||
448 | |||
449 | |||
450 | /* | ||
451 | * Provide linux buffers for LIPP. | ||
452 | */ | ||
453 | static void tile_net_provide_needed_buffers(struct tile_net_cpu *info) | ||
454 | { | ||
455 | while (info->num_needed_small_buffers != 0) { | ||
456 | if (!tile_net_provide_needed_buffer(info, true)) | ||
457 | goto oops; | ||
458 | info->num_needed_small_buffers--; | ||
459 | } | ||
460 | |||
461 | while (info->num_needed_large_buffers != 0) { | ||
462 | if (!tile_net_provide_needed_buffer(info, false)) | ||
463 | goto oops; | ||
464 | info->num_needed_large_buffers--; | ||
465 | } | ||
466 | |||
467 | return; | ||
468 | |||
469 | oops: | ||
470 | |||
471 | /* Add a description to the page allocation failure dump. */ | ||
472 | pr_notice("Could not provide a linux buffer to LIPP.\n"); | ||
473 | } | ||
474 | |||
475 | |||
476 | /* | ||
477 | * Grab some LEPP completions, and store them in "comps", of size | ||
478 | * "comps_size", and return the number of completions which were | ||
479 | * stored, so the caller can free them. | ||
480 | * | ||
481 | * If "pending" is not NULL, it will be set to true if there might | ||
482 | * still be some pending completions caused by this tile, else false. | ||
483 | */ | ||
484 | static unsigned int tile_net_lepp_grab_comps(struct net_device *dev, | ||
485 | struct sk_buff *comps[], | ||
486 | unsigned int comps_size, | ||
487 | bool *pending) | ||
488 | { | ||
489 | struct tile_net_priv *priv = netdev_priv(dev); | ||
490 | |||
491 | lepp_queue_t *eq = priv->epp_queue; | ||
492 | |||
493 | unsigned int n = 0; | ||
494 | |||
495 | unsigned int comp_head; | ||
496 | unsigned int comp_busy; | ||
497 | unsigned int comp_tail; | ||
498 | |||
499 | spin_lock(&priv->comp_lock); | ||
500 | |||
501 | comp_head = eq->comp_head; | ||
502 | comp_busy = eq->comp_busy; | ||
503 | comp_tail = eq->comp_tail; | ||
504 | |||
505 | while (comp_head != comp_busy && n < comps_size) { | ||
506 | comps[n++] = eq->comps[comp_head]; | ||
507 | LEPP_QINC(comp_head); | ||
508 | } | ||
509 | |||
510 | if (pending != NULL) | ||
511 | *pending = (comp_head != comp_tail); | ||
512 | |||
513 | eq->comp_head = comp_head; | ||
514 | |||
515 | spin_unlock(&priv->comp_lock); | ||
516 | |||
517 | return n; | ||
518 | } | ||
519 | |||
520 | |||
521 | /* | ||
522 | * Make sure the egress timer is scheduled. | ||
523 | * | ||
524 | * Note that we use "schedule if not scheduled" logic instead of the more | ||
525 | * obvious "reschedule" logic, because "reschedule" is fairly expensive. | ||
526 | */ | ||
527 | static void tile_net_schedule_egress_timer(struct tile_net_cpu *info) | ||
528 | { | ||
529 | if (!info->egress_timer_scheduled) { | ||
530 | mod_timer_pinned(&info->egress_timer, jiffies + 1); | ||
531 | info->egress_timer_scheduled = true; | ||
532 | } | ||
533 | } | ||
534 | |||
535 | |||
536 | /* | ||
537 | * The "function" for "info->egress_timer". | ||
538 | * | ||
539 | * This timer will reschedule itself as long as there are any pending | ||
540 | * completions expected (on behalf of any tile). | ||
541 | * | ||
542 | * ISSUE: Realistically, will the timer ever stop scheduling itself? | ||
543 | * | ||
544 | * ISSUE: This timer is almost never actually needed, so just use a global | ||
545 | * timer that can run on any tile. | ||
546 | * | ||
547 | * ISSUE: Maybe instead track number of expected completions, and free | ||
548 | * only that many, resetting to zero if "pending" is ever false. | ||
549 | */ | ||
550 | static void tile_net_handle_egress_timer(unsigned long arg) | ||
551 | { | ||
552 | struct tile_net_cpu *info = (struct tile_net_cpu *)arg; | ||
553 | struct net_device *dev = info->napi.dev; | ||
554 | |||
555 | struct sk_buff *olds[32]; | ||
556 | unsigned int wanted = 32; | ||
557 | unsigned int i, nolds = 0; | ||
558 | bool pending; | ||
559 | |||
560 | /* The timer is no longer scheduled. */ | ||
561 | info->egress_timer_scheduled = false; | ||
562 | |||
563 | nolds = tile_net_lepp_grab_comps(dev, olds, wanted, &pending); | ||
564 | |||
565 | for (i = 0; i < nolds; i++) | ||
566 | kfree_skb(olds[i]); | ||
567 | |||
568 | /* Reschedule timer if needed. */ | ||
569 | if (pending) | ||
570 | tile_net_schedule_egress_timer(info); | ||
571 | } | ||
572 | |||
573 | |||
574 | #ifdef IGNORE_DUP_ACKS | ||
575 | |||
576 | /* | ||
577 | * Help detect "duplicate" ACKs. These are sequential packets (for a | ||
578 | * given flow) which are exactly 66 bytes long, sharing everything but | ||
579 | * ID=2@0x12, Hsum=2@0x18, Ack=4@0x2a, WinSize=2@0x30, Csum=2@0x32, | ||
580 | * Tstamps=10@0x38. The ID's are +1, the Hsum's are -1, the Ack's are | ||
581 | * +N, and the Tstamps are usually identical. | ||
582 | * | ||
583 | * NOTE: Apparently truly duplicate acks (with identical "ack" values), | ||
584 | * should not be collapsed, as they are used for some kind of flow control. | ||
585 | */ | ||
586 | static bool is_dup_ack(char *s1, char *s2, unsigned int len) | ||
587 | { | ||
588 | int i; | ||
589 | |||
590 | unsigned long long ignorable = 0; | ||
591 | |||
592 | /* Identification. */ | ||
593 | ignorable |= (1ULL << 0x12); | ||
594 | ignorable |= (1ULL << 0x13); | ||
595 | |||
596 | /* Header checksum. */ | ||
597 | ignorable |= (1ULL << 0x18); | ||
598 | ignorable |= (1ULL << 0x19); | ||
599 | |||
600 | /* ACK. */ | ||
601 | ignorable |= (1ULL << 0x2a); | ||
602 | ignorable |= (1ULL << 0x2b); | ||
603 | ignorable |= (1ULL << 0x2c); | ||
604 | ignorable |= (1ULL << 0x2d); | ||
605 | |||
606 | /* WinSize. */ | ||
607 | ignorable |= (1ULL << 0x30); | ||
608 | ignorable |= (1ULL << 0x31); | ||
609 | |||
610 | /* Checksum. */ | ||
611 | ignorable |= (1ULL << 0x32); | ||
612 | ignorable |= (1ULL << 0x33); | ||
613 | |||
614 | for (i = 0; i < len; i++, ignorable >>= 1) { | ||
615 | |||
616 | if ((ignorable & 1) || (s1[i] == s2[i])) | ||
617 | continue; | ||
618 | |||
619 | #ifdef TILE_NET_DEBUG | ||
620 | /* HACK: Mention non-timestamp diffs. */ | ||
621 | if (i < 0x38 && i != 0x2f && | ||
622 | net_ratelimit()) | ||
623 | pr_info("Diff at 0x%x\n", i); | ||
624 | #endif | ||
625 | |||
626 | return false; | ||
627 | } | ||
628 | |||
629 | #ifdef TILE_NET_NO_SUPPRESS_DUP_ACKS | ||
630 | /* HACK: Do not suppress truly duplicate ACKs. */ | ||
631 | /* ISSUE: Is this actually necessary or helpful? */ | ||
632 | if (s1[0x2a] == s2[0x2a] && | ||
633 | s1[0x2b] == s2[0x2b] && | ||
634 | s1[0x2c] == s2[0x2c] && | ||
635 | s1[0x2d] == s2[0x2d]) { | ||
636 | return false; | ||
637 | } | ||
638 | #endif | ||
639 | |||
640 | return true; | ||
641 | } | ||
642 | |||
643 | #endif | ||
644 | |||
645 | |||
646 | |||
647 | /* | ||
648 | * Like "tile_net_handle_packets()", but just discard packets. | ||
649 | */ | ||
650 | static void tile_net_discard_packets(struct net_device *dev) | ||
651 | { | ||
652 | struct tile_net_priv *priv = netdev_priv(dev); | ||
653 | int my_cpu = smp_processor_id(); | ||
654 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
655 | struct tile_netio_queue *queue = &info->queue; | ||
656 | netio_queue_impl_t *qsp = queue->__system_part; | ||
657 | netio_queue_user_impl_t *qup = &queue->__user_part; | ||
658 | |||
659 | while (qup->__packet_receive_read != | ||
660 | qsp->__packet_receive_queue.__packet_write) { | ||
661 | |||
662 | int index = qup->__packet_receive_read; | ||
663 | |||
664 | int index2_aux = index + sizeof(netio_pkt_t); | ||
665 | int index2 = | ||
666 | ((index2_aux == | ||
667 | qsp->__packet_receive_queue.__last_packet_plus_one) ? | ||
668 | 0 : index2_aux); | ||
669 | |||
670 | netio_pkt_t *pkt = (netio_pkt_t *) | ||
671 | ((unsigned long) &qsp[1] + index); | ||
672 | |||
673 | /* Extract the "linux_buffer_t". */ | ||
674 | unsigned int buffer = pkt->__packet.word; | ||
675 | |||
676 | /* Convert "linux_buffer_t" to "va". */ | ||
677 | void *va = __va((phys_addr_t)(buffer >> 1) << 7); | ||
678 | |||
679 | /* Acquire the associated "skb". */ | ||
680 | struct sk_buff **skb_ptr = va - sizeof(*skb_ptr); | ||
681 | struct sk_buff *skb = *skb_ptr; | ||
682 | |||
683 | kfree_skb(skb); | ||
684 | |||
685 | /* Consume this packet. */ | ||
686 | qup->__packet_receive_read = index2; | ||
687 | } | ||
688 | } | ||
689 | |||
690 | |||
691 | /* | ||
692 | * Handle the next packet. Return true if "processed", false if "filtered". | ||
693 | */ | ||
694 | static bool tile_net_poll_aux(struct tile_net_cpu *info, int index) | ||
695 | { | ||
696 | struct net_device *dev = info->napi.dev; | ||
697 | |||
698 | struct tile_netio_queue *queue = &info->queue; | ||
699 | netio_queue_impl_t *qsp = queue->__system_part; | ||
700 | netio_queue_user_impl_t *qup = &queue->__user_part; | ||
701 | struct tile_net_stats_t *stats = &info->stats; | ||
702 | |||
703 | int filter; | ||
704 | |||
705 | int index2_aux = index + sizeof(netio_pkt_t); | ||
706 | int index2 = | ||
707 | ((index2_aux == | ||
708 | qsp->__packet_receive_queue.__last_packet_plus_one) ? | ||
709 | 0 : index2_aux); | ||
710 | |||
711 | netio_pkt_t *pkt = (netio_pkt_t *)((unsigned long) &qsp[1] + index); | ||
712 | |||
713 | netio_pkt_metadata_t *metadata = NETIO_PKT_METADATA(pkt); | ||
714 | |||
715 | /* Extract the packet size. */ | ||
716 | unsigned long len = | ||
717 | (NETIO_PKT_CUSTOM_LENGTH(pkt) + | ||
718 | NET_IP_ALIGN - NETIO_PACKET_PADDING); | ||
719 | |||
720 | /* Extract the "linux_buffer_t". */ | ||
721 | unsigned int buffer = pkt->__packet.word; | ||
722 | |||
723 | /* Extract "small" (vs "large"). */ | ||
724 | bool small = ((buffer & 1) != 0); | ||
725 | |||
726 | /* Convert "linux_buffer_t" to "va". */ | ||
727 | void *va = __va((phys_addr_t)(buffer >> 1) << 7); | ||
728 | |||
729 | /* Extract the packet data pointer. */ | ||
730 | /* Compare to "NETIO_PKT_CUSTOM_DATA(pkt)". */ | ||
731 | unsigned char *buf = va + NET_IP_ALIGN; | ||
732 | |||
733 | #ifdef IGNORE_DUP_ACKS | ||
734 | |||
735 | static int other; | ||
736 | static int final; | ||
737 | static int keep; | ||
738 | static int skip; | ||
739 | |||
740 | #endif | ||
741 | |||
742 | /* Invalidate the packet buffer. */ | ||
743 | if (!hash_default) | ||
744 | __inv_buffer(buf, len); | ||
745 | |||
746 | /* ISSUE: Is this needed? */ | ||
747 | dev->last_rx = jiffies; | ||
748 | |||
749 | #ifdef TILE_NET_DUMP_PACKETS | ||
750 | dump_packet(buf, len, "rx"); | ||
751 | #endif /* TILE_NET_DUMP_PACKETS */ | ||
752 | |||
753 | #ifdef TILE_NET_VERIFY_INGRESS | ||
754 | if (!NETIO_PKT_L4_CSUM_CORRECT_M(metadata, pkt) && | ||
755 | NETIO_PKT_L4_CSUM_CALCULATED_M(metadata, pkt)) { | ||
756 | /* | ||
757 | * FIXME: This complains about UDP packets | ||
758 | * with a "zero" checksum (bug 6624). | ||
759 | */ | ||
760 | #ifdef TILE_NET_PANIC_ON_BAD | ||
761 | dump_packet(buf, len, "rx"); | ||
762 | panic("Bad L4 checksum."); | ||
763 | #else | ||
764 | pr_warning("Bad L4 checksum on %d byte packet.\n", len); | ||
765 | #endif | ||
766 | } | ||
767 | if (!NETIO_PKT_L3_CSUM_CORRECT_M(metadata, pkt) && | ||
768 | NETIO_PKT_L3_CSUM_CALCULATED_M(metadata, pkt)) { | ||
769 | dump_packet(buf, len, "rx"); | ||
770 | panic("Bad L3 checksum."); | ||
771 | } | ||
772 | switch (NETIO_PKT_STATUS_M(metadata, pkt)) { | ||
773 | case NETIO_PKT_STATUS_OVERSIZE: | ||
774 | if (len >= 64) { | ||
775 | dump_packet(buf, len, "rx"); | ||
776 | panic("Unexpected OVERSIZE."); | ||
777 | } | ||
778 | break; | ||
779 | case NETIO_PKT_STATUS_BAD: | ||
780 | #ifdef TILE_NET_PANIC_ON_BAD | ||
781 | dump_packet(buf, len, "rx"); | ||
782 | panic("Unexpected BAD packet."); | ||
783 | #else | ||
784 | pr_warning("Unexpected BAD %d byte packet.\n", len); | ||
785 | #endif | ||
786 | } | ||
787 | #endif | ||
788 | |||
789 | filter = 0; | ||
790 | |||
791 | if (!(dev->flags & IFF_UP)) { | ||
792 | /* Filter packets received before we're up. */ | ||
793 | filter = 1; | ||
794 | } else if (!(dev->flags & IFF_PROMISC)) { | ||
795 | /* | ||
796 | * FIXME: Implement HW multicast filter. | ||
797 | */ | ||
798 | if (!IS_MULTICAST(buf) && !IS_BROADCAST(buf)) { | ||
799 | /* Filter packets not for our address. */ | ||
800 | const u8 *mine = dev->dev_addr; | ||
801 | filter = compare_ether_addr(mine, buf); | ||
802 | } | ||
803 | } | ||
804 | |||
805 | #ifdef IGNORE_DUP_ACKS | ||
806 | |||
807 | if (len != 66) { | ||
808 | /* FIXME: Must check "is_tcp_ack(buf, len)" somehow. */ | ||
809 | |||
810 | other++; | ||
811 | |||
812 | } else if (index2 == | ||
813 | qsp->__packet_receive_queue.__packet_write) { | ||
814 | |||
815 | final++; | ||
816 | |||
817 | } else { | ||
818 | |||
819 | netio_pkt_t *pkt2 = (netio_pkt_t *) | ||
820 | ((unsigned long) &qsp[1] + index2); | ||
821 | |||
822 | netio_pkt_metadata_t *metadata2 = | ||
823 | NETIO_PKT_METADATA(pkt2); | ||
824 | |||
825 | /* Extract the packet size. */ | ||
826 | unsigned long len2 = | ||
827 | (NETIO_PKT_CUSTOM_LENGTH(pkt2) + | ||
828 | NET_IP_ALIGN - NETIO_PACKET_PADDING); | ||
829 | |||
830 | if (len2 == 66 && | ||
831 | NETIO_PKT_FLOW_HASH_M(metadata, pkt) == | ||
832 | NETIO_PKT_FLOW_HASH_M(metadata2, pkt2)) { | ||
833 | |||
834 | /* Extract the "linux_buffer_t". */ | ||
835 | unsigned int buffer2 = pkt2->__packet.word; | ||
836 | |||
837 | /* Convert "linux_buffer_t" to "va". */ | ||
838 | void *va2 = | ||
839 | __va((phys_addr_t)(buffer2 >> 1) << 7); | ||
840 | |||
841 | /* Extract the packet data pointer. */ | ||
842 | /* Compare to "NETIO_PKT_CUSTOM_DATA(pkt)". */ | ||
843 | unsigned char *buf2 = va2 + NET_IP_ALIGN; | ||
844 | |||
845 | /* Invalidate the packet buffer. */ | ||
846 | if (!hash_default) | ||
847 | __inv_buffer(buf2, len2); | ||
848 | |||
849 | if (is_dup_ack(buf, buf2, len)) { | ||
850 | skip++; | ||
851 | filter = 1; | ||
852 | } else { | ||
853 | keep++; | ||
854 | } | ||
855 | } | ||
856 | } | ||
857 | |||
858 | if (net_ratelimit()) | ||
859 | pr_info("Other %d Final %d Keep %d Skip %d.\n", | ||
860 | other, final, keep, skip); | ||
861 | |||
862 | #endif | ||
863 | |||
864 | if (filter) { | ||
865 | |||
866 | /* ISSUE: Update "drop" statistics? */ | ||
867 | |||
868 | tile_net_provide_linux_buffer(info, va, small); | ||
869 | |||
870 | } else { | ||
871 | |||
872 | /* Acquire the associated "skb". */ | ||
873 | struct sk_buff **skb_ptr = va - sizeof(*skb_ptr); | ||
874 | struct sk_buff *skb = *skb_ptr; | ||
875 | |||
876 | /* Paranoia. */ | ||
877 | if (skb->data != buf) | ||
878 | panic("Corrupt linux buffer from LIPP! " | ||
879 | "VA=%p, skb=%p, skb->data=%p\n", | ||
880 | va, skb, skb->data); | ||
881 | |||
882 | /* Encode the actual packet length. */ | ||
883 | skb_put(skb, len); | ||
884 | |||
885 | /* NOTE: This call also sets "skb->dev = dev". */ | ||
886 | skb->protocol = eth_type_trans(skb, dev); | ||
887 | |||
888 | /* ISSUE: Discard corrupt packets? */ | ||
889 | /* ISSUE: Discard packets with bad checksums? */ | ||
890 | |||
891 | /* Avoid recomputing TCP/UDP checksums. */ | ||
892 | if (NETIO_PKT_L4_CSUM_CORRECT_M(metadata, pkt)) | ||
893 | skb->ip_summed = CHECKSUM_UNNECESSARY; | ||
894 | |||
895 | netif_receive_skb(skb); | ||
896 | |||
897 | stats->rx_packets++; | ||
898 | stats->rx_bytes += len; | ||
899 | |||
900 | if (small) | ||
901 | info->num_needed_small_buffers++; | ||
902 | else | ||
903 | info->num_needed_large_buffers++; | ||
904 | } | ||
905 | |||
906 | /* Return four credits after every fourth packet. */ | ||
907 | if (--qup->__receive_credit_remaining == 0) { | ||
908 | u32 interval = qup->__receive_credit_interval; | ||
909 | qup->__receive_credit_remaining = interval; | ||
910 | __netio_fastio_return_credits(qup->__fastio_index, interval); | ||
911 | } | ||
912 | |||
913 | /* Consume this packet. */ | ||
914 | qup->__packet_receive_read = index2; | ||
915 | |||
916 | return !filter; | ||
917 | } | ||
918 | |||
919 | |||
920 | /* | ||
921 | * Handle some packets for the given device on the current CPU. | ||
922 | * | ||
923 | * ISSUE: The "rotting packet" race condition occurs if a packet | ||
924 | * arrives after the queue appears to be empty, and before the | ||
925 | * hypervisor interrupt is re-enabled. | ||
926 | */ | ||
927 | static int tile_net_poll(struct napi_struct *napi, int budget) | ||
928 | { | ||
929 | struct net_device *dev = napi->dev; | ||
930 | struct tile_net_priv *priv = netdev_priv(dev); | ||
931 | int my_cpu = smp_processor_id(); | ||
932 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
933 | struct tile_netio_queue *queue = &info->queue; | ||
934 | netio_queue_impl_t *qsp = queue->__system_part; | ||
935 | netio_queue_user_impl_t *qup = &queue->__user_part; | ||
936 | |||
937 | unsigned int work = 0; | ||
938 | |||
939 | while (1) { | ||
940 | int index = qup->__packet_receive_read; | ||
941 | if (index == qsp->__packet_receive_queue.__packet_write) | ||
942 | break; | ||
943 | |||
944 | if (tile_net_poll_aux(info, index)) { | ||
945 | if (++work >= budget) | ||
946 | goto done; | ||
947 | } | ||
948 | } | ||
949 | |||
950 | napi_complete(&info->napi); | ||
951 | |||
952 | /* Re-enable hypervisor interrupts. */ | ||
953 | enable_percpu_irq(priv->intr_id); | ||
954 | |||
955 | /* HACK: Avoid the "rotting packet" problem. */ | ||
956 | if (qup->__packet_receive_read != | ||
957 | qsp->__packet_receive_queue.__packet_write) | ||
958 | napi_schedule(&info->napi); | ||
959 | |||
960 | /* ISSUE: Handle completions? */ | ||
961 | |||
962 | done: | ||
963 | |||
964 | tile_net_provide_needed_buffers(info); | ||
965 | |||
966 | return work; | ||
967 | } | ||
968 | |||
969 | |||
970 | /* | ||
971 | * Handle an ingress interrupt for the given device on the current cpu. | ||
972 | */ | ||
973 | static irqreturn_t tile_net_handle_ingress_interrupt(int irq, void *dev_ptr) | ||
974 | { | ||
975 | struct net_device *dev = (struct net_device *)dev_ptr; | ||
976 | struct tile_net_priv *priv = netdev_priv(dev); | ||
977 | int my_cpu = smp_processor_id(); | ||
978 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
979 | |||
980 | /* Disable hypervisor interrupt. */ | ||
981 | disable_percpu_irq(priv->intr_id); | ||
982 | |||
983 | napi_schedule(&info->napi); | ||
984 | |||
985 | return IRQ_HANDLED; | ||
986 | } | ||
987 | |||
988 | |||
989 | /* | ||
990 | * One time initialization per interface. | ||
991 | */ | ||
992 | static int tile_net_open_aux(struct net_device *dev) | ||
993 | { | ||
994 | struct tile_net_priv *priv = netdev_priv(dev); | ||
995 | |||
996 | int ret; | ||
997 | int dummy; | ||
998 | unsigned int epp_lotar; | ||
999 | |||
1000 | /* | ||
1001 | * Find out where EPP memory should be homed. | ||
1002 | */ | ||
1003 | ret = hv_dev_pread(priv->hv_devhdl, 0, | ||
1004 | (HV_VirtAddr)&epp_lotar, sizeof(epp_lotar), | ||
1005 | NETIO_EPP_SHM_OFF); | ||
1006 | if (ret < 0) { | ||
1007 | pr_err("could not read epp_shm_queue lotar.\n"); | ||
1008 | return -EIO; | ||
1009 | } | ||
1010 | |||
1011 | /* | ||
1012 | * Home the page on the EPP. | ||
1013 | */ | ||
1014 | { | ||
1015 | int epp_home = hv_lotar_to_cpu(epp_lotar); | ||
1016 | struct page *page = virt_to_page(priv->epp_queue); | ||
1017 | homecache_change_page_home(page, 0, epp_home); | ||
1018 | } | ||
1019 | |||
1020 | /* | ||
1021 | * Register the EPP shared memory queue. | ||
1022 | */ | ||
1023 | { | ||
1024 | netio_ipp_address_t ea = { | ||
1025 | .va = 0, | ||
1026 | .pa = __pa(priv->epp_queue), | ||
1027 | .pte = hv_pte(0), | ||
1028 | .size = PAGE_SIZE, | ||
1029 | }; | ||
1030 | ea.pte = hv_pte_set_lotar(ea.pte, epp_lotar); | ||
1031 | ea.pte = hv_pte_set_mode(ea.pte, HV_PTE_MODE_CACHE_TILE_L3); | ||
1032 | ret = hv_dev_pwrite(priv->hv_devhdl, 0, | ||
1033 | (HV_VirtAddr)&ea, | ||
1034 | sizeof(ea), | ||
1035 | NETIO_EPP_SHM_OFF); | ||
1036 | if (ret < 0) | ||
1037 | return -EIO; | ||
1038 | } | ||
1039 | |||
1040 | /* | ||
1041 | * Start LIPP/LEPP. | ||
1042 | */ | ||
1043 | if (hv_dev_pwrite(priv->hv_devhdl, 0, (HV_VirtAddr)&dummy, | ||
1044 | sizeof(dummy), NETIO_IPP_START_SHIM_OFF) < 0) { | ||
1045 | pr_warning("Failed to start LIPP/LEPP.\n"); | ||
1046 | return -EIO; | ||
1047 | } | ||
1048 | |||
1049 | return 0; | ||
1050 | } | ||
1051 | |||
1052 | |||
1053 | /* | ||
1054 | * Register with hypervisor on each CPU. | ||
1055 | * | ||
1056 | * Strangely, this function does important things even if it "fails", | ||
1057 | * which is especially common if the link is not up yet. Hopefully | ||
1058 | * these things are all "harmless" if done twice! | ||
1059 | */ | ||
1060 | static void tile_net_register(void *dev_ptr) | ||
1061 | { | ||
1062 | struct net_device *dev = (struct net_device *)dev_ptr; | ||
1063 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1064 | int my_cpu = smp_processor_id(); | ||
1065 | struct tile_net_cpu *info; | ||
1066 | |||
1067 | struct tile_netio_queue *queue; | ||
1068 | |||
1069 | /* Only network cpus can receive packets. */ | ||
1070 | int queue_id = | ||
1071 | cpumask_test_cpu(my_cpu, &priv->network_cpus_map) ? 0 : 255; | ||
1072 | |||
1073 | netio_input_config_t config = { | ||
1074 | .flags = 0, | ||
1075 | .num_receive_packets = priv->network_cpus_credits, | ||
1076 | .queue_id = queue_id | ||
1077 | }; | ||
1078 | |||
1079 | int ret = 0; | ||
1080 | netio_queue_impl_t *queuep; | ||
1081 | |||
1082 | PDEBUG("tile_net_register(queue_id %d)\n", queue_id); | ||
1083 | |||
1084 | if (!strcmp(dev->name, "xgbe0")) | ||
1085 | info = &__get_cpu_var(hv_xgbe0); | ||
1086 | else if (!strcmp(dev->name, "xgbe1")) | ||
1087 | info = &__get_cpu_var(hv_xgbe1); | ||
1088 | else if (!strcmp(dev->name, "gbe0")) | ||
1089 | info = &__get_cpu_var(hv_gbe0); | ||
1090 | else if (!strcmp(dev->name, "gbe1")) | ||
1091 | info = &__get_cpu_var(hv_gbe1); | ||
1092 | else | ||
1093 | BUG(); | ||
1094 | |||
1095 | /* Initialize the egress timer. */ | ||
1096 | init_timer(&info->egress_timer); | ||
1097 | info->egress_timer.data = (long)info; | ||
1098 | info->egress_timer.function = tile_net_handle_egress_timer; | ||
1099 | |||
1100 | priv->cpu[my_cpu] = info; | ||
1101 | |||
1102 | /* | ||
1103 | * Register ourselves with the IPP. | ||
1104 | */ | ||
1105 | ret = hv_dev_pwrite(priv->hv_devhdl, 0, | ||
1106 | (HV_VirtAddr)&config, | ||
1107 | sizeof(netio_input_config_t), | ||
1108 | NETIO_IPP_INPUT_REGISTER_OFF); | ||
1109 | PDEBUG("hv_dev_pwrite(NETIO_IPP_INPUT_REGISTER_OFF) returned %d\n", | ||
1110 | ret); | ||
1111 | if (ret < 0) { | ||
1112 | printk(KERN_DEBUG "hv_dev_pwrite NETIO_IPP_INPUT_REGISTER_OFF" | ||
1113 | " failure %d\n", ret); | ||
1114 | info->link_down = (ret == NETIO_LINK_DOWN); | ||
1115 | return; | ||
1116 | } | ||
1117 | |||
1118 | /* | ||
1119 | * Get the pointer to our queue's system part. | ||
1120 | */ | ||
1121 | |||
1122 | ret = hv_dev_pread(priv->hv_devhdl, 0, | ||
1123 | (HV_VirtAddr)&queuep, | ||
1124 | sizeof(netio_queue_impl_t *), | ||
1125 | NETIO_IPP_INPUT_REGISTER_OFF); | ||
1126 | PDEBUG("hv_dev_pread(NETIO_IPP_INPUT_REGISTER_OFF) returned %d\n", | ||
1127 | ret); | ||
1128 | PDEBUG("queuep %p\n", queuep); | ||
1129 | if (ret <= 0) { | ||
1130 | /* ISSUE: Shouldn't this be a fatal error? */ | ||
1131 | pr_err("hv_dev_pread NETIO_IPP_INPUT_REGISTER_OFF failure\n"); | ||
1132 | return; | ||
1133 | } | ||
1134 | |||
1135 | queue = &info->queue; | ||
1136 | |||
1137 | queue->__system_part = queuep; | ||
1138 | |||
1139 | memset(&queue->__user_part, 0, sizeof(netio_queue_user_impl_t)); | ||
1140 | |||
1141 | /* This is traditionally "config.num_receive_packets / 2". */ | ||
1142 | queue->__user_part.__receive_credit_interval = 4; | ||
1143 | queue->__user_part.__receive_credit_remaining = | ||
1144 | queue->__user_part.__receive_credit_interval; | ||
1145 | |||
1146 | /* | ||
1147 | * Get a fastio index from the hypervisor. | ||
1148 | * ISSUE: Shouldn't this check the result? | ||
1149 | */ | ||
1150 | ret = hv_dev_pread(priv->hv_devhdl, 0, | ||
1151 | (HV_VirtAddr)&queue->__user_part.__fastio_index, | ||
1152 | sizeof(queue->__user_part.__fastio_index), | ||
1153 | NETIO_IPP_GET_FASTIO_OFF); | ||
1154 | PDEBUG("hv_dev_pread(NETIO_IPP_GET_FASTIO_OFF) returned %d\n", ret); | ||
1155 | |||
1156 | netif_napi_add(dev, &info->napi, tile_net_poll, 64); | ||
1157 | |||
1158 | /* Now we are registered. */ | ||
1159 | info->registered = true; | ||
1160 | } | ||
1161 | |||
1162 | |||
1163 | /* | ||
1164 | * Unregister with hypervisor on each CPU. | ||
1165 | */ | ||
1166 | static void tile_net_unregister(void *dev_ptr) | ||
1167 | { | ||
1168 | struct net_device *dev = (struct net_device *)dev_ptr; | ||
1169 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1170 | int my_cpu = smp_processor_id(); | ||
1171 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
1172 | |||
1173 | int ret = 0; | ||
1174 | int dummy = 0; | ||
1175 | |||
1176 | /* Do nothing if never registered. */ | ||
1177 | if (info == NULL) | ||
1178 | return; | ||
1179 | |||
1180 | /* Do nothing if already unregistered. */ | ||
1181 | if (!info->registered) | ||
1182 | return; | ||
1183 | |||
1184 | /* | ||
1185 | * Unregister ourselves with LIPP. | ||
1186 | */ | ||
1187 | ret = hv_dev_pwrite(priv->hv_devhdl, 0, (HV_VirtAddr)&dummy, | ||
1188 | sizeof(dummy), NETIO_IPP_INPUT_UNREGISTER_OFF); | ||
1189 | PDEBUG("hv_dev_pwrite(NETIO_IPP_INPUT_UNREGISTER_OFF) returned %d\n", | ||
1190 | ret); | ||
1191 | if (ret < 0) { | ||
1192 | /* FIXME: Just panic? */ | ||
1193 | pr_err("hv_dev_pwrite NETIO_IPP_INPUT_UNREGISTER_OFF" | ||
1194 | " failure %d\n", ret); | ||
1195 | } | ||
1196 | |||
1197 | /* | ||
1198 | * Discard all packets still in our NetIO queue. Hopefully, | ||
1199 | * once the unregister call is complete, there will be no | ||
1200 | * packets still in flight on the IDN. | ||
1201 | */ | ||
1202 | tile_net_discard_packets(dev); | ||
1203 | |||
1204 | /* Reset state. */ | ||
1205 | info->num_needed_small_buffers = 0; | ||
1206 | info->num_needed_large_buffers = 0; | ||
1207 | |||
1208 | /* Cancel egress timer. */ | ||
1209 | del_timer(&info->egress_timer); | ||
1210 | info->egress_timer_scheduled = false; | ||
1211 | |||
1212 | netif_napi_del(&info->napi); | ||
1213 | |||
1214 | /* Now we are unregistered. */ | ||
1215 | info->registered = false; | ||
1216 | } | ||
1217 | |||
1218 | |||
1219 | /* | ||
1220 | * Helper function for "tile_net_stop()". | ||
1221 | * | ||
1222 | * Also used to handle registration failure in "tile_net_open_inner()", | ||
1223 | * when "fully_opened" is known to be false, and the various extra | ||
1224 | * steps in "tile_net_stop()" are not necessary. ISSUE: It might be | ||
1225 | * simpler if we could just call "tile_net_stop()" anyway. | ||
1226 | */ | ||
1227 | static void tile_net_stop_aux(struct net_device *dev) | ||
1228 | { | ||
1229 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1230 | |||
1231 | int dummy = 0; | ||
1232 | |||
1233 | /* Unregister all tiles, so LIPP will stop delivering packets. */ | ||
1234 | on_each_cpu(tile_net_unregister, (void *)dev, 1); | ||
1235 | |||
1236 | /* Stop LIPP/LEPP. */ | ||
1237 | if (hv_dev_pwrite(priv->hv_devhdl, 0, (HV_VirtAddr)&dummy, | ||
1238 | sizeof(dummy), NETIO_IPP_STOP_SHIM_OFF) < 0) | ||
1239 | panic("Failed to stop LIPP/LEPP!\n"); | ||
1240 | |||
1241 | priv->partly_opened = 0; | ||
1242 | } | ||
1243 | |||
1244 | |||
1245 | /* | ||
1246 | * Disable ingress interrupts for the given device on the current cpu. | ||
1247 | */ | ||
1248 | static void tile_net_disable_intr(void *dev_ptr) | ||
1249 | { | ||
1250 | struct net_device *dev = (struct net_device *)dev_ptr; | ||
1251 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1252 | int my_cpu = smp_processor_id(); | ||
1253 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
1254 | |||
1255 | /* Disable hypervisor interrupt. */ | ||
1256 | disable_percpu_irq(priv->intr_id); | ||
1257 | |||
1258 | /* Disable NAPI if needed. */ | ||
1259 | if (info != NULL && info->napi_enabled) { | ||
1260 | napi_disable(&info->napi); | ||
1261 | info->napi_enabled = false; | ||
1262 | } | ||
1263 | } | ||
1264 | |||
1265 | |||
1266 | /* | ||
1267 | * Enable ingress interrupts for the given device on the current cpu. | ||
1268 | */ | ||
1269 | static void tile_net_enable_intr(void *dev_ptr) | ||
1270 | { | ||
1271 | struct net_device *dev = (struct net_device *)dev_ptr; | ||
1272 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1273 | int my_cpu = smp_processor_id(); | ||
1274 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
1275 | |||
1276 | /* Enable hypervisor interrupt. */ | ||
1277 | enable_percpu_irq(priv->intr_id); | ||
1278 | |||
1279 | /* Enable NAPI. */ | ||
1280 | napi_enable(&info->napi); | ||
1281 | info->napi_enabled = true; | ||
1282 | } | ||
1283 | |||
1284 | |||
1285 | /* | ||
1286 | * tile_net_open_inner does most of the work of bringing up the interface. | ||
1287 | * It's called from tile_net_open(), and also from tile_net_retry_open(). | ||
1288 | * The return value is 0 if the interface was brought up, < 0 if | ||
1289 | * tile_net_open() should return the return value as an error, and > 0 if | ||
1290 | * tile_net_open() should return success and schedule a work item to | ||
1291 | * periodically retry the bringup. | ||
1292 | */ | ||
1293 | static int tile_net_open_inner(struct net_device *dev) | ||
1294 | { | ||
1295 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1296 | int my_cpu = smp_processor_id(); | ||
1297 | struct tile_net_cpu *info; | ||
1298 | struct tile_netio_queue *queue; | ||
1299 | unsigned int irq; | ||
1300 | int i; | ||
1301 | |||
1302 | /* | ||
1303 | * First try to register just on the local CPU, and handle any | ||
1304 | * semi-expected "link down" failure specially. Note that we | ||
1305 | * do NOT call "tile_net_stop_aux()", unlike below. | ||
1306 | */ | ||
1307 | tile_net_register(dev); | ||
1308 | info = priv->cpu[my_cpu]; | ||
1309 | if (!info->registered) { | ||
1310 | if (info->link_down) | ||
1311 | return 1; | ||
1312 | return -EAGAIN; | ||
1313 | } | ||
1314 | |||
1315 | /* | ||
1316 | * Now register everywhere else. If any registration fails, | ||
1317 | * even for "link down" (which might not be possible), we | ||
1318 | * clean up using "tile_net_stop_aux()". | ||
1319 | */ | ||
1320 | smp_call_function(tile_net_register, (void *)dev, 1); | ||
1321 | for_each_online_cpu(i) { | ||
1322 | if (!priv->cpu[i]->registered) { | ||
1323 | tile_net_stop_aux(dev); | ||
1324 | return -EAGAIN; | ||
1325 | } | ||
1326 | } | ||
1327 | |||
1328 | queue = &info->queue; | ||
1329 | |||
1330 | /* | ||
1331 | * Set the device intr bit mask. | ||
1332 | * The tile_net_register above sets per tile __intr_id. | ||
1333 | */ | ||
1334 | priv->intr_id = queue->__system_part->__intr_id; | ||
1335 | BUG_ON(!priv->intr_id); | ||
1336 | |||
1337 | /* | ||
1338 | * Register the device interrupt handler. | ||
1339 | * The __ffs() function returns the index into the interrupt handler | ||
1340 | * table from the interrupt bit mask which should have one bit | ||
1341 | * and one bit only set. | ||
1342 | */ | ||
1343 | irq = __ffs(priv->intr_id); | ||
1344 | tile_irq_activate(irq, TILE_IRQ_PERCPU); | ||
1345 | BUG_ON(request_irq(irq, tile_net_handle_ingress_interrupt, | ||
1346 | 0, dev->name, (void *)dev) != 0); | ||
1347 | |||
1348 | /* ISSUE: How could "priv->fully_opened" ever be "true" here? */ | ||
1349 | |||
1350 | if (!priv->fully_opened) { | ||
1351 | |||
1352 | int dummy = 0; | ||
1353 | |||
1354 | /* Allocate initial buffers. */ | ||
1355 | |||
1356 | int max_buffers = | ||
1357 | priv->network_cpus_count * priv->network_cpus_credits; | ||
1358 | |||
1359 | info->num_needed_small_buffers = | ||
1360 | min(LIPP_SMALL_BUFFERS, max_buffers); | ||
1361 | |||
1362 | info->num_needed_large_buffers = | ||
1363 | min(LIPP_LARGE_BUFFERS, max_buffers); | ||
1364 | |||
1365 | tile_net_provide_needed_buffers(info); | ||
1366 | |||
1367 | if (info->num_needed_small_buffers != 0 || | ||
1368 | info->num_needed_large_buffers != 0) | ||
1369 | panic("Insufficient memory for buffer stack!"); | ||
1370 | |||
1371 | /* Start LIPP/LEPP and activate "ingress" at the shim. */ | ||
1372 | if (hv_dev_pwrite(priv->hv_devhdl, 0, (HV_VirtAddr)&dummy, | ||
1373 | sizeof(dummy), NETIO_IPP_INPUT_INIT_OFF) < 0) | ||
1374 | panic("Failed to activate the LIPP Shim!\n"); | ||
1375 | |||
1376 | priv->fully_opened = 1; | ||
1377 | } | ||
1378 | |||
1379 | /* On each tile, enable the hypervisor to trigger interrupts. */ | ||
1380 | /* ISSUE: Do this before starting LIPP/LEPP? */ | ||
1381 | on_each_cpu(tile_net_enable_intr, (void *)dev, 1); | ||
1382 | |||
1383 | /* Start our transmit queue. */ | ||
1384 | netif_start_queue(dev); | ||
1385 | |||
1386 | return 0; | ||
1387 | } | ||
1388 | |||
1389 | |||
1390 | /* | ||
1391 | * Called periodically to retry bringing up the NetIO interface, | ||
1392 | * if it doesn't come up cleanly during tile_net_open(). | ||
1393 | */ | ||
1394 | static void tile_net_open_retry(struct work_struct *w) | ||
1395 | { | ||
1396 | struct delayed_work *dw = | ||
1397 | container_of(w, struct delayed_work, work); | ||
1398 | |||
1399 | struct tile_net_priv *priv = | ||
1400 | container_of(dw, struct tile_net_priv, retry_work); | ||
1401 | |||
1402 | /* | ||
1403 | * Try to bring the NetIO interface up. If it fails, reschedule | ||
1404 | * ourselves to try again later; otherwise, tell Linux we now have | ||
1405 | * a working link. ISSUE: What if the return value is negative? | ||
1406 | */ | ||
1407 | if (tile_net_open_inner(priv->dev)) | ||
1408 | schedule_delayed_work_on(singlethread_cpu, &priv->retry_work, | ||
1409 | TILE_NET_RETRY_INTERVAL); | ||
1410 | else | ||
1411 | netif_carrier_on(priv->dev); | ||
1412 | } | ||
1413 | |||
1414 | |||
1415 | /* | ||
1416 | * Called when a network interface is made active. | ||
1417 | * | ||
1418 | * Returns 0 on success, negative value on failure. | ||
1419 | * | ||
1420 | * The open entry point is called when a network interface is made | ||
1421 | * active by the system (IFF_UP). At this point all resources needed | ||
1422 | * for transmit and receive operations are allocated, the interrupt | ||
1423 | * handler is registered with the OS, the watchdog timer is started, | ||
1424 | * and the stack is notified that the interface is ready. | ||
1425 | * | ||
1426 | * If the actual link is not available yet, then we tell Linux that | ||
1427 | * we have no carrier, and we keep checking until the link comes up. | ||
1428 | */ | ||
1429 | static int tile_net_open(struct net_device *dev) | ||
1430 | { | ||
1431 | int ret = 0; | ||
1432 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1433 | |||
1434 | /* | ||
1435 | * We rely on priv->partly_opened to tell us if this is the | ||
1436 | * first time this interface is being brought up. If it is | ||
1437 | * set, the IPP was already initialized and should not be | ||
1438 | * initialized again. | ||
1439 | */ | ||
1440 | if (!priv->partly_opened) { | ||
1441 | |||
1442 | int count; | ||
1443 | int credits; | ||
1444 | |||
1445 | /* Initialize LIPP/LEPP, and start the Shim. */ | ||
1446 | ret = tile_net_open_aux(dev); | ||
1447 | if (ret < 0) { | ||
1448 | pr_err("tile_net_open_aux failed: %d\n", ret); | ||
1449 | return ret; | ||
1450 | } | ||
1451 | |||
1452 | /* Analyze the network cpus. */ | ||
1453 | |||
1454 | if (network_cpus_used) | ||
1455 | cpumask_copy(&priv->network_cpus_map, | ||
1456 | &network_cpus_map); | ||
1457 | else | ||
1458 | cpumask_copy(&priv->network_cpus_map, cpu_online_mask); | ||
1459 | |||
1460 | |||
1461 | count = cpumask_weight(&priv->network_cpus_map); | ||
1462 | |||
1463 | /* Limit credits to available buffers, and apply min. */ | ||
1464 | credits = max(16, (LIPP_LARGE_BUFFERS / count) & ~1); | ||
1465 | |||
1466 | /* Apply "GBE" max limit. */ | ||
1467 | /* ISSUE: Use higher limit for XGBE? */ | ||
1468 | credits = min(NETIO_MAX_RECEIVE_PKTS, credits); | ||
1469 | |||
1470 | priv->network_cpus_count = count; | ||
1471 | priv->network_cpus_credits = credits; | ||
1472 | |||
1473 | #ifdef TILE_NET_DEBUG | ||
1474 | pr_info("Using %d network cpus, with %d credits each\n", | ||
1475 | priv->network_cpus_count, priv->network_cpus_credits); | ||
1476 | #endif | ||
1477 | |||
1478 | priv->partly_opened = 1; | ||
1479 | } | ||
1480 | |||
1481 | /* | ||
1482 | * Attempt to bring up the link. | ||
1483 | */ | ||
1484 | ret = tile_net_open_inner(dev); | ||
1485 | if (ret <= 0) { | ||
1486 | if (ret == 0) | ||
1487 | netif_carrier_on(dev); | ||
1488 | return ret; | ||
1489 | } | ||
1490 | |||
1491 | /* | ||
1492 | * We were unable to bring up the NetIO interface, but we want to | ||
1493 | * try again in a little bit. Tell Linux that we have no carrier | ||
1494 | * so it doesn't try to use the interface before the link comes up | ||
1495 | * and then remember to try again later. | ||
1496 | */ | ||
1497 | netif_carrier_off(dev); | ||
1498 | schedule_delayed_work_on(singlethread_cpu, &priv->retry_work, | ||
1499 | TILE_NET_RETRY_INTERVAL); | ||
1500 | |||
1501 | return 0; | ||
1502 | } | ||
1503 | |||
1504 | |||
1505 | /* | ||
1506 | * Disables a network interface. | ||
1507 | * | ||
1508 | * Returns 0, this is not allowed to fail. | ||
1509 | * | ||
1510 | * The close entry point is called when an interface is de-activated | ||
1511 | * by the OS. The hardware is still under the drivers control, but | ||
1512 | * needs to be disabled. A global MAC reset is issued to stop the | ||
1513 | * hardware, and all transmit and receive resources are freed. | ||
1514 | * | ||
1515 | * ISSUE: Can this can be called while "tile_net_poll()" is running? | ||
1516 | */ | ||
1517 | static int tile_net_stop(struct net_device *dev) | ||
1518 | { | ||
1519 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1520 | |||
1521 | bool pending = true; | ||
1522 | |||
1523 | PDEBUG("tile_net_stop()\n"); | ||
1524 | |||
1525 | /* ISSUE: Only needed if not yet fully open. */ | ||
1526 | cancel_delayed_work_sync(&priv->retry_work); | ||
1527 | |||
1528 | /* Can't transmit any more. */ | ||
1529 | netif_stop_queue(dev); | ||
1530 | |||
1531 | /* | ||
1532 | * Disable hypervisor interrupts on each tile. | ||
1533 | */ | ||
1534 | on_each_cpu(tile_net_disable_intr, (void *)dev, 1); | ||
1535 | |||
1536 | /* | ||
1537 | * Unregister the interrupt handler. | ||
1538 | * The __ffs() function returns the index into the interrupt handler | ||
1539 | * table from the interrupt bit mask which should have one bit | ||
1540 | * and one bit only set. | ||
1541 | */ | ||
1542 | if (priv->intr_id) | ||
1543 | free_irq(__ffs(priv->intr_id), dev); | ||
1544 | |||
1545 | /* | ||
1546 | * Drain all the LIPP buffers. | ||
1547 | */ | ||
1548 | |||
1549 | while (true) { | ||
1550 | int buffer; | ||
1551 | |||
1552 | /* NOTE: This should never fail. */ | ||
1553 | if (hv_dev_pread(priv->hv_devhdl, 0, (HV_VirtAddr)&buffer, | ||
1554 | sizeof(buffer), NETIO_IPP_DRAIN_OFF) < 0) | ||
1555 | break; | ||
1556 | |||
1557 | /* Stop when done. */ | ||
1558 | if (buffer == 0) | ||
1559 | break; | ||
1560 | |||
1561 | { | ||
1562 | /* Convert "linux_buffer_t" to "va". */ | ||
1563 | void *va = __va((phys_addr_t)(buffer >> 1) << 7); | ||
1564 | |||
1565 | /* Acquire the associated "skb". */ | ||
1566 | struct sk_buff **skb_ptr = va - sizeof(*skb_ptr); | ||
1567 | struct sk_buff *skb = *skb_ptr; | ||
1568 | |||
1569 | kfree_skb(skb); | ||
1570 | } | ||
1571 | } | ||
1572 | |||
1573 | /* Stop LIPP/LEPP. */ | ||
1574 | tile_net_stop_aux(dev); | ||
1575 | |||
1576 | |||
1577 | priv->fully_opened = 0; | ||
1578 | |||
1579 | |||
1580 | /* | ||
1581 | * XXX: ISSUE: It appears that, in practice anyway, by the | ||
1582 | * time we get here, there are no pending completions. | ||
1583 | */ | ||
1584 | while (pending) { | ||
1585 | |||
1586 | struct sk_buff *olds[32]; | ||
1587 | unsigned int wanted = 32; | ||
1588 | unsigned int i, nolds = 0; | ||
1589 | |||
1590 | nolds = tile_net_lepp_grab_comps(dev, olds, | ||
1591 | wanted, &pending); | ||
1592 | |||
1593 | /* ISSUE: We have never actually seen this debug spew. */ | ||
1594 | if (nolds != 0) | ||
1595 | pr_info("During tile_net_stop(), grabbed %d comps.\n", | ||
1596 | nolds); | ||
1597 | |||
1598 | for (i = 0; i < nolds; i++) | ||
1599 | kfree_skb(olds[i]); | ||
1600 | } | ||
1601 | |||
1602 | |||
1603 | /* Wipe the EPP queue. */ | ||
1604 | memset(priv->epp_queue, 0, sizeof(lepp_queue_t)); | ||
1605 | |||
1606 | /* Evict the EPP queue. */ | ||
1607 | finv_buffer(priv->epp_queue, PAGE_SIZE); | ||
1608 | |||
1609 | return 0; | ||
1610 | } | ||
1611 | |||
1612 | |||
1613 | /* | ||
1614 | * Prepare the "frags" info for the resulting LEPP command. | ||
1615 | * | ||
1616 | * If needed, flush the memory used by the frags. | ||
1617 | */ | ||
1618 | static unsigned int tile_net_tx_frags(lepp_frag_t *frags, | ||
1619 | struct sk_buff *skb, | ||
1620 | void *b_data, unsigned int b_len) | ||
1621 | { | ||
1622 | unsigned int i, n = 0; | ||
1623 | |||
1624 | struct skb_shared_info *sh = skb_shinfo(skb); | ||
1625 | |||
1626 | phys_addr_t cpa; | ||
1627 | |||
1628 | if (b_len != 0) { | ||
1629 | |||
1630 | if (!hash_default) | ||
1631 | finv_buffer_remote(b_data, b_len); | ||
1632 | |||
1633 | cpa = __pa(b_data); | ||
1634 | frags[n].cpa_lo = cpa; | ||
1635 | frags[n].cpa_hi = cpa >> 32; | ||
1636 | frags[n].length = b_len; | ||
1637 | frags[n].hash_for_home = hash_default; | ||
1638 | n++; | ||
1639 | } | ||
1640 | |||
1641 | for (i = 0; i < sh->nr_frags; i++) { | ||
1642 | |||
1643 | skb_frag_t *f = &sh->frags[i]; | ||
1644 | unsigned long pfn = page_to_pfn(f->page); | ||
1645 | |||
1646 | /* FIXME: Compute "hash_for_home" properly. */ | ||
1647 | /* ISSUE: The hypervisor checks CHIP_HAS_REV1_DMA_PACKETS(). */ | ||
1648 | int hash_for_home = hash_default; | ||
1649 | |||
1650 | /* FIXME: Hmmm. */ | ||
1651 | if (!hash_default) { | ||
1652 | void *va = pfn_to_kaddr(pfn) + f->page_offset; | ||
1653 | BUG_ON(PageHighMem(f->page)); | ||
1654 | finv_buffer_remote(va, f->size); | ||
1655 | } | ||
1656 | |||
1657 | cpa = ((phys_addr_t)pfn << PAGE_SHIFT) + f->page_offset; | ||
1658 | frags[n].cpa_lo = cpa; | ||
1659 | frags[n].cpa_hi = cpa >> 32; | ||
1660 | frags[n].length = f->size; | ||
1661 | frags[n].hash_for_home = hash_for_home; | ||
1662 | n++; | ||
1663 | } | ||
1664 | |||
1665 | return n; | ||
1666 | } | ||
1667 | |||
1668 | |||
1669 | /* | ||
1670 | * This function takes "skb", consisting of a header template and a | ||
1671 | * payload, and hands it to LEPP, to emit as one or more segments, | ||
1672 | * each consisting of a possibly modified header, plus a piece of the | ||
1673 | * payload, via a process known as "tcp segmentation offload". | ||
1674 | * | ||
1675 | * Usually, "data" will contain the header template, of size "sh_len", | ||
1676 | * and "sh->frags" will contain "skb->data_len" bytes of payload, and | ||
1677 | * there will be "sh->gso_segs" segments. | ||
1678 | * | ||
1679 | * Sometimes, if "sendfile()" requires copying, we will be called with | ||
1680 | * "data" containing the header and payload, with "frags" being empty. | ||
1681 | * | ||
1682 | * In theory, "sh->nr_frags" could be 3, but in practice, it seems | ||
1683 | * that this will never actually happen. | ||
1684 | * | ||
1685 | * See "emulate_large_send_offload()" for some reference code, which | ||
1686 | * does not handle checksumming. | ||
1687 | * | ||
1688 | * ISSUE: How do we make sure that high memory DMA does not migrate? | ||
1689 | */ | ||
1690 | static int tile_net_tx_tso(struct sk_buff *skb, struct net_device *dev) | ||
1691 | { | ||
1692 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1693 | int my_cpu = smp_processor_id(); | ||
1694 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
1695 | struct tile_net_stats_t *stats = &info->stats; | ||
1696 | |||
1697 | struct skb_shared_info *sh = skb_shinfo(skb); | ||
1698 | |||
1699 | unsigned char *data = skb->data; | ||
1700 | |||
1701 | /* The ip header follows the ethernet header. */ | ||
1702 | struct iphdr *ih = ip_hdr(skb); | ||
1703 | unsigned int ih_len = ih->ihl * 4; | ||
1704 | |||
1705 | /* Note that "nh == ih", by definition. */ | ||
1706 | unsigned char *nh = skb_network_header(skb); | ||
1707 | unsigned int eh_len = nh - data; | ||
1708 | |||
1709 | /* The tcp header follows the ip header. */ | ||
1710 | struct tcphdr *th = (struct tcphdr *)(nh + ih_len); | ||
1711 | unsigned int th_len = th->doff * 4; | ||
1712 | |||
1713 | /* The total number of header bytes. */ | ||
1714 | /* NOTE: This may be less than skb_headlen(skb). */ | ||
1715 | unsigned int sh_len = eh_len + ih_len + th_len; | ||
1716 | |||
1717 | /* The number of payload bytes at "skb->data + sh_len". */ | ||
1718 | /* This is non-zero for sendfile() without HIGHDMA. */ | ||
1719 | unsigned int b_len = skb_headlen(skb) - sh_len; | ||
1720 | |||
1721 | /* The total number of payload bytes. */ | ||
1722 | unsigned int d_len = b_len + skb->data_len; | ||
1723 | |||
1724 | /* The maximum payload size. */ | ||
1725 | unsigned int p_len = sh->gso_size; | ||
1726 | |||
1727 | /* The total number of segments. */ | ||
1728 | unsigned int num_segs = sh->gso_segs; | ||
1729 | |||
1730 | /* The temporary copy of the command. */ | ||
1731 | u32 cmd_body[(LEPP_MAX_CMD_SIZE + 3) / 4]; | ||
1732 | lepp_tso_cmd_t *cmd = (lepp_tso_cmd_t *)cmd_body; | ||
1733 | |||
1734 | /* Analyze the "frags". */ | ||
1735 | unsigned int num_frags = | ||
1736 | tile_net_tx_frags(cmd->frags, skb, data + sh_len, b_len); | ||
1737 | |||
1738 | /* The size of the command, including frags and header. */ | ||
1739 | size_t cmd_size = LEPP_TSO_CMD_SIZE(num_frags, sh_len); | ||
1740 | |||
1741 | /* The command header. */ | ||
1742 | lepp_tso_cmd_t cmd_init = { | ||
1743 | .tso = true, | ||
1744 | .header_size = sh_len, | ||
1745 | .ip_offset = eh_len, | ||
1746 | .tcp_offset = eh_len + ih_len, | ||
1747 | .payload_size = p_len, | ||
1748 | .num_frags = num_frags, | ||
1749 | }; | ||
1750 | |||
1751 | unsigned long irqflags; | ||
1752 | |||
1753 | lepp_queue_t *eq = priv->epp_queue; | ||
1754 | |||
1755 | struct sk_buff *olds[4]; | ||
1756 | unsigned int wanted = 4; | ||
1757 | unsigned int i, nolds = 0; | ||
1758 | |||
1759 | unsigned int cmd_head, cmd_tail, cmd_next; | ||
1760 | unsigned int comp_tail; | ||
1761 | |||
1762 | unsigned int free_slots; | ||
1763 | |||
1764 | |||
1765 | /* Paranoia. */ | ||
1766 | BUG_ON(skb->protocol != htons(ETH_P_IP)); | ||
1767 | BUG_ON(ih->protocol != IPPROTO_TCP); | ||
1768 | BUG_ON(skb->ip_summed != CHECKSUM_PARTIAL); | ||
1769 | BUG_ON(num_frags > LEPP_MAX_FRAGS); | ||
1770 | /*--BUG_ON(num_segs != (d_len + (p_len - 1)) / p_len); */ | ||
1771 | BUG_ON(num_segs <= 1); | ||
1772 | |||
1773 | |||
1774 | /* Finish preparing the command. */ | ||
1775 | |||
1776 | /* Copy the command header. */ | ||
1777 | *cmd = cmd_init; | ||
1778 | |||
1779 | /* Copy the "header". */ | ||
1780 | memcpy(&cmd->frags[num_frags], data, sh_len); | ||
1781 | |||
1782 | |||
1783 | /* Prefetch and wait, to minimize time spent holding the spinlock. */ | ||
1784 | prefetch_L1(&eq->comp_tail); | ||
1785 | prefetch_L1(&eq->cmd_tail); | ||
1786 | mb(); | ||
1787 | |||
1788 | |||
1789 | /* Enqueue the command. */ | ||
1790 | |||
1791 | spin_lock_irqsave(&priv->cmd_lock, irqflags); | ||
1792 | |||
1793 | /* | ||
1794 | * Handle completions if needed to make room. | ||
1795 | * HACK: Spin until there is sufficient room. | ||
1796 | */ | ||
1797 | free_slots = lepp_num_free_comp_slots(eq); | ||
1798 | if (free_slots < 1) { | ||
1799 | spin: | ||
1800 | nolds += tile_net_lepp_grab_comps(dev, olds + nolds, | ||
1801 | wanted - nolds, NULL); | ||
1802 | if (lepp_num_free_comp_slots(eq) < 1) | ||
1803 | goto spin; | ||
1804 | } | ||
1805 | |||
1806 | cmd_head = eq->cmd_head; | ||
1807 | cmd_tail = eq->cmd_tail; | ||
1808 | |||
1809 | /* NOTE: The "gotos" below are untested. */ | ||
1810 | |||
1811 | /* Prepare to advance, detecting full queue. */ | ||
1812 | cmd_next = cmd_tail + cmd_size; | ||
1813 | if (cmd_tail < cmd_head && cmd_next >= cmd_head) | ||
1814 | goto spin; | ||
1815 | if (cmd_next > LEPP_CMD_LIMIT) { | ||
1816 | cmd_next = 0; | ||
1817 | if (cmd_next == cmd_head) | ||
1818 | goto spin; | ||
1819 | } | ||
1820 | |||
1821 | /* Copy the command. */ | ||
1822 | memcpy(&eq->cmds[cmd_tail], cmd, cmd_size); | ||
1823 | |||
1824 | /* Advance. */ | ||
1825 | cmd_tail = cmd_next; | ||
1826 | |||
1827 | /* Record "skb" for eventual freeing. */ | ||
1828 | comp_tail = eq->comp_tail; | ||
1829 | eq->comps[comp_tail] = skb; | ||
1830 | LEPP_QINC(comp_tail); | ||
1831 | eq->comp_tail = comp_tail; | ||
1832 | |||
1833 | /* Flush before allowing LEPP to handle the command. */ | ||
1834 | __insn_mf(); | ||
1835 | |||
1836 | eq->cmd_tail = cmd_tail; | ||
1837 | |||
1838 | spin_unlock_irqrestore(&priv->cmd_lock, irqflags); | ||
1839 | |||
1840 | if (nolds == 0) | ||
1841 | nolds = tile_net_lepp_grab_comps(dev, olds, wanted, NULL); | ||
1842 | |||
1843 | /* Handle completions. */ | ||
1844 | for (i = 0; i < nolds; i++) | ||
1845 | kfree_skb(olds[i]); | ||
1846 | |||
1847 | /* Update stats. */ | ||
1848 | stats->tx_packets += num_segs; | ||
1849 | stats->tx_bytes += (num_segs * sh_len) + d_len; | ||
1850 | |||
1851 | /* Make sure the egress timer is scheduled. */ | ||
1852 | tile_net_schedule_egress_timer(info); | ||
1853 | |||
1854 | return NETDEV_TX_OK; | ||
1855 | } | ||
1856 | |||
1857 | |||
1858 | /* | ||
1859 | * Transmit a packet (called by the kernel via "hard_start_xmit" hook). | ||
1860 | */ | ||
1861 | static int tile_net_tx(struct sk_buff *skb, struct net_device *dev) | ||
1862 | { | ||
1863 | struct tile_net_priv *priv = netdev_priv(dev); | ||
1864 | int my_cpu = smp_processor_id(); | ||
1865 | struct tile_net_cpu *info = priv->cpu[my_cpu]; | ||
1866 | struct tile_net_stats_t *stats = &info->stats; | ||
1867 | |||
1868 | unsigned long irqflags; | ||
1869 | |||
1870 | struct skb_shared_info *sh = skb_shinfo(skb); | ||
1871 | |||
1872 | unsigned int len = skb->len; | ||
1873 | unsigned char *data = skb->data; | ||
1874 | |||
1875 | unsigned int csum_start = skb->csum_start - skb_headroom(skb); | ||
1876 | |||
1877 | lepp_frag_t frags[LEPP_MAX_FRAGS]; | ||
1878 | |||
1879 | unsigned int num_frags; | ||
1880 | |||
1881 | lepp_queue_t *eq = priv->epp_queue; | ||
1882 | |||
1883 | struct sk_buff *olds[4]; | ||
1884 | unsigned int wanted = 4; | ||
1885 | unsigned int i, nolds = 0; | ||
1886 | |||
1887 | unsigned int cmd_size = sizeof(lepp_cmd_t); | ||
1888 | |||
1889 | unsigned int cmd_head, cmd_tail, cmd_next; | ||
1890 | unsigned int comp_tail; | ||
1891 | |||
1892 | lepp_cmd_t cmds[LEPP_MAX_FRAGS]; | ||
1893 | |||
1894 | unsigned int free_slots; | ||
1895 | |||
1896 | |||
1897 | /* | ||
1898 | * This is paranoia, since we think that if the link doesn't come | ||
1899 | * up, telling Linux we have no carrier will keep it from trying | ||
1900 | * to transmit. If it does, though, we can't execute this routine, | ||
1901 | * since data structures we depend on aren't set up yet. | ||
1902 | */ | ||
1903 | if (!info->registered) | ||
1904 | return NETDEV_TX_BUSY; | ||
1905 | |||
1906 | |||
1907 | /* Save the timestamp. */ | ||
1908 | dev->trans_start = jiffies; | ||
1909 | |||
1910 | |||
1911 | #ifdef TILE_NET_PARANOIA | ||
1912 | #if CHIP_HAS_CBOX_HOME_MAP() | ||
1913 | if (hash_default) { | ||
1914 | HV_PTE pte = *virt_to_pte(current->mm, (unsigned long)data); | ||
1915 | if (hv_pte_get_mode(pte) != HV_PTE_MODE_CACHE_HASH_L3) | ||
1916 | panic("Non-coherent egress buffer!"); | ||
1917 | } | ||
1918 | #endif | ||
1919 | #endif | ||
1920 | |||
1921 | |||
1922 | #ifdef TILE_NET_DUMP_PACKETS | ||
1923 | /* ISSUE: Does not dump the "frags". */ | ||
1924 | dump_packet(data, skb_headlen(skb), "tx"); | ||
1925 | #endif /* TILE_NET_DUMP_PACKETS */ | ||
1926 | |||
1927 | |||
1928 | if (sh->gso_size != 0) | ||
1929 | return tile_net_tx_tso(skb, dev); | ||
1930 | |||
1931 | |||
1932 | /* Prepare the commands. */ | ||
1933 | |||
1934 | num_frags = tile_net_tx_frags(frags, skb, data, skb_headlen(skb)); | ||
1935 | |||
1936 | for (i = 0; i < num_frags; i++) { | ||
1937 | |||
1938 | bool final = (i == num_frags - 1); | ||
1939 | |||
1940 | lepp_cmd_t cmd = { | ||
1941 | .cpa_lo = frags[i].cpa_lo, | ||
1942 | .cpa_hi = frags[i].cpa_hi, | ||
1943 | .length = frags[i].length, | ||
1944 | .hash_for_home = frags[i].hash_for_home, | ||
1945 | .send_completion = final, | ||
1946 | .end_of_packet = final | ||
1947 | }; | ||
1948 | |||
1949 | if (i == 0 && skb->ip_summed == CHECKSUM_PARTIAL) { | ||
1950 | cmd.compute_checksum = 1; | ||
1951 | cmd.checksum_data.bits.start_byte = csum_start; | ||
1952 | cmd.checksum_data.bits.count = len - csum_start; | ||
1953 | cmd.checksum_data.bits.destination_byte = | ||
1954 | csum_start + skb->csum_offset; | ||
1955 | } | ||
1956 | |||
1957 | cmds[i] = cmd; | ||
1958 | } | ||
1959 | |||
1960 | |||
1961 | /* Prefetch and wait, to minimize time spent holding the spinlock. */ | ||
1962 | prefetch_L1(&eq->comp_tail); | ||
1963 | prefetch_L1(&eq->cmd_tail); | ||
1964 | mb(); | ||
1965 | |||
1966 | |||
1967 | /* Enqueue the commands. */ | ||
1968 | |||
1969 | spin_lock_irqsave(&priv->cmd_lock, irqflags); | ||
1970 | |||
1971 | /* | ||
1972 | * Handle completions if needed to make room. | ||
1973 | * HACK: Spin until there is sufficient room. | ||
1974 | */ | ||
1975 | free_slots = lepp_num_free_comp_slots(eq); | ||
1976 | if (free_slots < 1) { | ||
1977 | spin: | ||
1978 | nolds += tile_net_lepp_grab_comps(dev, olds + nolds, | ||
1979 | wanted - nolds, NULL); | ||
1980 | if (lepp_num_free_comp_slots(eq) < 1) | ||
1981 | goto spin; | ||
1982 | } | ||
1983 | |||
1984 | cmd_head = eq->cmd_head; | ||
1985 | cmd_tail = eq->cmd_tail; | ||
1986 | |||
1987 | /* NOTE: The "gotos" below are untested. */ | ||
1988 | |||
1989 | /* Copy the commands, or fail. */ | ||
1990 | for (i = 0; i < num_frags; i++) { | ||
1991 | |||
1992 | /* Prepare to advance, detecting full queue. */ | ||
1993 | cmd_next = cmd_tail + cmd_size; | ||
1994 | if (cmd_tail < cmd_head && cmd_next >= cmd_head) | ||
1995 | goto spin; | ||
1996 | if (cmd_next > LEPP_CMD_LIMIT) { | ||
1997 | cmd_next = 0; | ||
1998 | if (cmd_next == cmd_head) | ||
1999 | goto spin; | ||
2000 | } | ||
2001 | |||
2002 | /* Copy the command. */ | ||
2003 | *(lepp_cmd_t *)&eq->cmds[cmd_tail] = cmds[i]; | ||
2004 | |||
2005 | /* Advance. */ | ||
2006 | cmd_tail = cmd_next; | ||
2007 | } | ||
2008 | |||
2009 | /* Record "skb" for eventual freeing. */ | ||
2010 | comp_tail = eq->comp_tail; | ||
2011 | eq->comps[comp_tail] = skb; | ||
2012 | LEPP_QINC(comp_tail); | ||
2013 | eq->comp_tail = comp_tail; | ||
2014 | |||
2015 | /* Flush before allowing LEPP to handle the command. */ | ||
2016 | __insn_mf(); | ||
2017 | |||
2018 | eq->cmd_tail = cmd_tail; | ||
2019 | |||
2020 | spin_unlock_irqrestore(&priv->cmd_lock, irqflags); | ||
2021 | |||
2022 | if (nolds == 0) | ||
2023 | nolds = tile_net_lepp_grab_comps(dev, olds, wanted, NULL); | ||
2024 | |||
2025 | /* Handle completions. */ | ||
2026 | for (i = 0; i < nolds; i++) | ||
2027 | kfree_skb(olds[i]); | ||
2028 | |||
2029 | /* HACK: Track "expanded" size for short packets (e.g. 42 < 60). */ | ||
2030 | stats->tx_packets++; | ||
2031 | stats->tx_bytes += ((len >= ETH_ZLEN) ? len : ETH_ZLEN); | ||
2032 | |||
2033 | /* Make sure the egress timer is scheduled. */ | ||
2034 | tile_net_schedule_egress_timer(info); | ||
2035 | |||
2036 | return NETDEV_TX_OK; | ||
2037 | } | ||
2038 | |||
2039 | |||
2040 | /* | ||
2041 | * Deal with a transmit timeout. | ||
2042 | */ | ||
2043 | static void tile_net_tx_timeout(struct net_device *dev) | ||
2044 | { | ||
2045 | PDEBUG("tile_net_tx_timeout()\n"); | ||
2046 | PDEBUG("Transmit timeout at %ld, latency %ld\n", jiffies, | ||
2047 | jiffies - dev->trans_start); | ||
2048 | |||
2049 | /* XXX: ISSUE: This doesn't seem useful for us. */ | ||
2050 | netif_wake_queue(dev); | ||
2051 | } | ||
2052 | |||
2053 | |||
2054 | /* | ||
2055 | * Ioctl commands. | ||
2056 | */ | ||
2057 | static int tile_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | ||
2058 | { | ||
2059 | return -EOPNOTSUPP; | ||
2060 | } | ||
2061 | |||
2062 | |||
2063 | /* | ||
2064 | * Get System Network Statistics. | ||
2065 | * | ||
2066 | * Returns the address of the device statistics structure. | ||
2067 | */ | ||
2068 | static struct net_device_stats *tile_net_get_stats(struct net_device *dev) | ||
2069 | { | ||
2070 | struct tile_net_priv *priv = netdev_priv(dev); | ||
2071 | u32 rx_packets = 0; | ||
2072 | u32 tx_packets = 0; | ||
2073 | u32 rx_bytes = 0; | ||
2074 | u32 tx_bytes = 0; | ||
2075 | int i; | ||
2076 | |||
2077 | for_each_online_cpu(i) { | ||
2078 | if (priv->cpu[i]) { | ||
2079 | rx_packets += priv->cpu[i]->stats.rx_packets; | ||
2080 | rx_bytes += priv->cpu[i]->stats.rx_bytes; | ||
2081 | tx_packets += priv->cpu[i]->stats.tx_packets; | ||
2082 | tx_bytes += priv->cpu[i]->stats.tx_bytes; | ||
2083 | } | ||
2084 | } | ||
2085 | |||
2086 | priv->stats.rx_packets = rx_packets; | ||
2087 | priv->stats.rx_bytes = rx_bytes; | ||
2088 | priv->stats.tx_packets = tx_packets; | ||
2089 | priv->stats.tx_bytes = tx_bytes; | ||
2090 | |||
2091 | return &priv->stats; | ||
2092 | } | ||
2093 | |||
2094 | |||
2095 | /* | ||
2096 | * Change the "mtu". | ||
2097 | * | ||
2098 | * The "change_mtu" method is usually not needed. | ||
2099 | * If you need it, it must be like this. | ||
2100 | */ | ||
2101 | static int tile_net_change_mtu(struct net_device *dev, int new_mtu) | ||
2102 | { | ||
2103 | PDEBUG("tile_net_change_mtu()\n"); | ||
2104 | |||
2105 | /* Check ranges. */ | ||
2106 | if ((new_mtu < 68) || (new_mtu > 1500)) | ||
2107 | return -EINVAL; | ||
2108 | |||
2109 | /* Accept the value. */ | ||
2110 | dev->mtu = new_mtu; | ||
2111 | |||
2112 | return 0; | ||
2113 | } | ||
2114 | |||
2115 | |||
2116 | /* | ||
2117 | * Change the Ethernet Address of the NIC. | ||
2118 | * | ||
2119 | * The hypervisor driver does not support changing MAC address. However, | ||
2120 | * the IPP does not do anything with the MAC address, so the address which | ||
2121 | * gets used on outgoing packets, and which is accepted on incoming packets, | ||
2122 | * is completely up to the NetIO program or kernel driver which is actually | ||
2123 | * handling them. | ||
2124 | * | ||
2125 | * Returns 0 on success, negative on failure. | ||
2126 | */ | ||
2127 | static int tile_net_set_mac_address(struct net_device *dev, void *p) | ||
2128 | { | ||
2129 | struct sockaddr *addr = p; | ||
2130 | |||
2131 | if (!is_valid_ether_addr(addr->sa_data)) | ||
2132 | return -EINVAL; | ||
2133 | |||
2134 | /* ISSUE: Note that "dev_addr" is now a pointer. */ | ||
2135 | memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); | ||
2136 | |||
2137 | return 0; | ||
2138 | } | ||
2139 | |||
2140 | |||
2141 | /* | ||
2142 | * Obtain the MAC address from the hypervisor. | ||
2143 | * This must be done before opening the device. | ||
2144 | */ | ||
2145 | static int tile_net_get_mac(struct net_device *dev) | ||
2146 | { | ||
2147 | struct tile_net_priv *priv = netdev_priv(dev); | ||
2148 | |||
2149 | char hv_dev_name[32]; | ||
2150 | int len; | ||
2151 | |||
2152 | __netio_getset_offset_t offset = { .word = NETIO_IPP_PARAM_OFF }; | ||
2153 | |||
2154 | int ret; | ||
2155 | |||
2156 | /* For example, "xgbe0". */ | ||
2157 | strcpy(hv_dev_name, dev->name); | ||
2158 | len = strlen(hv_dev_name); | ||
2159 | |||
2160 | /* For example, "xgbe/0". */ | ||
2161 | hv_dev_name[len] = hv_dev_name[len - 1]; | ||
2162 | hv_dev_name[len - 1] = '/'; | ||
2163 | len++; | ||
2164 | |||
2165 | /* For example, "xgbe/0/native_hash". */ | ||
2166 | strcpy(hv_dev_name + len, hash_default ? "/native_hash" : "/native"); | ||
2167 | |||
2168 | /* Get the hypervisor handle for this device. */ | ||
2169 | priv->hv_devhdl = hv_dev_open((HV_VirtAddr)hv_dev_name, 0); | ||
2170 | PDEBUG("hv_dev_open(%s) returned %d %p\n", | ||
2171 | hv_dev_name, priv->hv_devhdl, &priv->hv_devhdl); | ||
2172 | if (priv->hv_devhdl < 0) { | ||
2173 | if (priv->hv_devhdl == HV_ENODEV) | ||
2174 | printk(KERN_DEBUG "Ignoring unconfigured device %s\n", | ||
2175 | hv_dev_name); | ||
2176 | else | ||
2177 | printk(KERN_DEBUG "hv_dev_open(%s) returned %d\n", | ||
2178 | hv_dev_name, priv->hv_devhdl); | ||
2179 | return -1; | ||
2180 | } | ||
2181 | |||
2182 | /* | ||
2183 | * Read the hardware address from the hypervisor. | ||
2184 | * ISSUE: Note that "dev_addr" is now a pointer. | ||
2185 | */ | ||
2186 | offset.bits.class = NETIO_PARAM; | ||
2187 | offset.bits.addr = NETIO_PARAM_MAC; | ||
2188 | ret = hv_dev_pread(priv->hv_devhdl, 0, | ||
2189 | (HV_VirtAddr)dev->dev_addr, dev->addr_len, | ||
2190 | offset.word); | ||
2191 | PDEBUG("hv_dev_pread(NETIO_PARAM_MAC) returned %d\n", ret); | ||
2192 | if (ret <= 0) { | ||
2193 | printk(KERN_DEBUG "hv_dev_pread(NETIO_PARAM_MAC) %s failed\n", | ||
2194 | dev->name); | ||
2195 | /* | ||
2196 | * Since the device is configured by the hypervisor but we | ||
2197 | * can't get its MAC address, we are most likely running | ||
2198 | * the simulator, so let's generate a random MAC address. | ||
2199 | */ | ||
2200 | random_ether_addr(dev->dev_addr); | ||
2201 | } | ||
2202 | |||
2203 | return 0; | ||
2204 | } | ||
2205 | |||
2206 | |||
2207 | static struct net_device_ops tile_net_ops = { | ||
2208 | .ndo_open = tile_net_open, | ||
2209 | .ndo_stop = tile_net_stop, | ||
2210 | .ndo_start_xmit = tile_net_tx, | ||
2211 | .ndo_do_ioctl = tile_net_ioctl, | ||
2212 | .ndo_get_stats = tile_net_get_stats, | ||
2213 | .ndo_change_mtu = tile_net_change_mtu, | ||
2214 | .ndo_tx_timeout = tile_net_tx_timeout, | ||
2215 | .ndo_set_mac_address = tile_net_set_mac_address | ||
2216 | }; | ||
2217 | |||
2218 | |||
2219 | /* | ||
2220 | * The setup function. | ||
2221 | * | ||
2222 | * This uses ether_setup() to assign various fields in dev, including | ||
2223 | * setting IFF_BROADCAST and IFF_MULTICAST, then sets some extra fields. | ||
2224 | */ | ||
2225 | static void tile_net_setup(struct net_device *dev) | ||
2226 | { | ||
2227 | PDEBUG("tile_net_setup()\n"); | ||
2228 | |||
2229 | ether_setup(dev); | ||
2230 | |||
2231 | dev->netdev_ops = &tile_net_ops; | ||
2232 | |||
2233 | dev->watchdog_timeo = TILE_NET_TIMEOUT; | ||
2234 | |||
2235 | /* We want lockless xmit. */ | ||
2236 | dev->features |= NETIF_F_LLTX; | ||
2237 | |||
2238 | /* We support hardware tx checksums. */ | ||
2239 | dev->features |= NETIF_F_HW_CSUM; | ||
2240 | |||
2241 | /* We support scatter/gather. */ | ||
2242 | dev->features |= NETIF_F_SG; | ||
2243 | |||
2244 | /* We support TSO. */ | ||
2245 | dev->features |= NETIF_F_TSO; | ||
2246 | |||
2247 | #ifdef TILE_NET_GSO | ||
2248 | /* We support GSO. */ | ||
2249 | dev->features |= NETIF_F_GSO; | ||
2250 | #endif | ||
2251 | |||
2252 | if (hash_default) | ||
2253 | dev->features |= NETIF_F_HIGHDMA; | ||
2254 | |||
2255 | /* ISSUE: We should support NETIF_F_UFO. */ | ||
2256 | |||
2257 | dev->tx_queue_len = TILE_NET_TX_QUEUE_LEN; | ||
2258 | |||
2259 | dev->mtu = TILE_NET_MTU; | ||
2260 | } | ||
2261 | |||
2262 | |||
2263 | /* | ||
2264 | * Allocate the device structure, register the device, and obtain the | ||
2265 | * MAC address from the hypervisor. | ||
2266 | */ | ||
2267 | static struct net_device *tile_net_dev_init(const char *name) | ||
2268 | { | ||
2269 | int ret; | ||
2270 | struct net_device *dev; | ||
2271 | struct tile_net_priv *priv; | ||
2272 | struct page *page; | ||
2273 | |||
2274 | /* | ||
2275 | * Allocate the device structure. This allocates "priv", calls | ||
2276 | * tile_net_setup(), and saves "name". Normally, "name" is a | ||
2277 | * template, instantiated by register_netdev(), but not for us. | ||
2278 | */ | ||
2279 | dev = alloc_netdev(sizeof(*priv), name, tile_net_setup); | ||
2280 | if (!dev) { | ||
2281 | pr_err("alloc_netdev(%s) failed\n", name); | ||
2282 | return NULL; | ||
2283 | } | ||
2284 | |||
2285 | priv = netdev_priv(dev); | ||
2286 | |||
2287 | /* Initialize "priv". */ | ||
2288 | |||
2289 | memset(priv, 0, sizeof(*priv)); | ||
2290 | |||
2291 | /* Save "dev" for "tile_net_open_retry()". */ | ||
2292 | priv->dev = dev; | ||
2293 | |||
2294 | INIT_DELAYED_WORK(&priv->retry_work, tile_net_open_retry); | ||
2295 | |||
2296 | spin_lock_init(&priv->cmd_lock); | ||
2297 | spin_lock_init(&priv->comp_lock); | ||
2298 | |||
2299 | /* Allocate "epp_queue". */ | ||
2300 | BUG_ON(get_order(sizeof(lepp_queue_t)) != 0); | ||
2301 | page = alloc_pages(GFP_KERNEL | __GFP_ZERO, 0); | ||
2302 | if (!page) { | ||
2303 | free_netdev(dev); | ||
2304 | return NULL; | ||
2305 | } | ||
2306 | priv->epp_queue = page_address(page); | ||
2307 | |||
2308 | /* Register the network device. */ | ||
2309 | ret = register_netdev(dev); | ||
2310 | if (ret) { | ||
2311 | pr_err("register_netdev %s failed %d\n", dev->name, ret); | ||
2312 | free_page((unsigned long)priv->epp_queue); | ||
2313 | free_netdev(dev); | ||
2314 | return NULL; | ||
2315 | } | ||
2316 | |||
2317 | /* Get the MAC address. */ | ||
2318 | ret = tile_net_get_mac(dev); | ||
2319 | if (ret < 0) { | ||
2320 | unregister_netdev(dev); | ||
2321 | free_page((unsigned long)priv->epp_queue); | ||
2322 | free_netdev(dev); | ||
2323 | return NULL; | ||
2324 | } | ||
2325 | |||
2326 | return dev; | ||
2327 | } | ||
2328 | |||
2329 | |||
2330 | /* | ||
2331 | * Module cleanup. | ||
2332 | */ | ||
2333 | static void tile_net_cleanup(void) | ||
2334 | { | ||
2335 | int i; | ||
2336 | |||
2337 | for (i = 0; i < TILE_NET_DEVS; i++) { | ||
2338 | if (tile_net_devs[i]) { | ||
2339 | struct net_device *dev = tile_net_devs[i]; | ||
2340 | struct tile_net_priv *priv = netdev_priv(dev); | ||
2341 | unregister_netdev(dev); | ||
2342 | finv_buffer(priv->epp_queue, PAGE_SIZE); | ||
2343 | free_page((unsigned long)priv->epp_queue); | ||
2344 | free_netdev(dev); | ||
2345 | } | ||
2346 | } | ||
2347 | } | ||
2348 | |||
2349 | |||
2350 | /* | ||
2351 | * Module initialization. | ||
2352 | */ | ||
2353 | static int tile_net_init_module(void) | ||
2354 | { | ||
2355 | pr_info("Tilera IPP Net Driver\n"); | ||
2356 | |||
2357 | tile_net_devs[0] = tile_net_dev_init("xgbe0"); | ||
2358 | tile_net_devs[1] = tile_net_dev_init("xgbe1"); | ||
2359 | tile_net_devs[2] = tile_net_dev_init("gbe0"); | ||
2360 | tile_net_devs[3] = tile_net_dev_init("gbe1"); | ||
2361 | |||
2362 | return 0; | ||
2363 | } | ||
2364 | |||
2365 | |||
2366 | #ifndef MODULE | ||
2367 | /* | ||
2368 | * The "network_cpus" boot argument specifies the cpus that are dedicated | ||
2369 | * to handle ingress packets. | ||
2370 | * | ||
2371 | * The parameter should be in the form "network_cpus=m-n[,x-y]", where | ||
2372 | * m, n, x, y are integer numbers that represent the cpus that can be | ||
2373 | * neither a dedicated cpu nor a dataplane cpu. | ||
2374 | */ | ||
2375 | static int __init network_cpus_setup(char *str) | ||
2376 | { | ||
2377 | int rc = cpulist_parse_crop(str, &network_cpus_map); | ||
2378 | if (rc != 0) { | ||
2379 | pr_warning("network_cpus=%s: malformed cpu list\n", | ||
2380 | str); | ||
2381 | } else { | ||
2382 | |||
2383 | /* Remove dedicated cpus. */ | ||
2384 | cpumask_and(&network_cpus_map, &network_cpus_map, | ||
2385 | cpu_possible_mask); | ||
2386 | |||
2387 | |||
2388 | if (cpumask_empty(&network_cpus_map)) { | ||
2389 | pr_warning("Ignoring network_cpus='%s'.\n", | ||
2390 | str); | ||
2391 | } else { | ||
2392 | char buf[1024]; | ||
2393 | cpulist_scnprintf(buf, sizeof(buf), &network_cpus_map); | ||
2394 | pr_info("Linux network CPUs: %s\n", buf); | ||
2395 | network_cpus_used = true; | ||
2396 | } | ||
2397 | } | ||
2398 | |||
2399 | return 0; | ||
2400 | } | ||
2401 | __setup("network_cpus=", network_cpus_setup); | ||
2402 | #endif | ||
2403 | |||
2404 | |||
2405 | module_init(tile_net_init_module); | ||
2406 | module_exit(tile_net_cleanup); | ||
diff --git a/drivers/net/tokenring/tms380tr.c b/drivers/net/tokenring/tms380tr.c index 663b8860a531..793020347e54 100644 --- a/drivers/net/tokenring/tms380tr.c +++ b/drivers/net/tokenring/tms380tr.c | |||
@@ -1220,7 +1220,7 @@ void tms380tr_wait(unsigned long time) | |||
1220 | tmp = schedule_timeout_interruptible(tmp); | 1220 | tmp = schedule_timeout_interruptible(tmp); |
1221 | } while(time_after(tmp, jiffies)); | 1221 | } while(time_after(tmp, jiffies)); |
1222 | #else | 1222 | #else |
1223 | udelay(time); | 1223 | mdelay(time / 1000); |
1224 | #endif | 1224 | #endif |
1225 | } | 1225 | } |
1226 | 1226 | ||
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c index 28e1ffb13db9..c78a50586c1d 100644 --- a/drivers/net/tulip/de2104x.c +++ b/drivers/net/tulip/de2104x.c | |||
@@ -2021,7 +2021,6 @@ static int __devinit de_init_one (struct pci_dev *pdev, | |||
2021 | de->media_timer.data = (unsigned long) de; | 2021 | de->media_timer.data = (unsigned long) de; |
2022 | 2022 | ||
2023 | netif_carrier_off(dev); | 2023 | netif_carrier_off(dev); |
2024 | netif_stop_queue(dev); | ||
2025 | 2024 | ||
2026 | /* wake up device, assign resources */ | 2025 | /* wake up device, assign resources */ |
2027 | rc = pci_enable_device(pdev); | 2026 | rc = pci_enable_device(pdev); |
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c index 1cc67138adbf..5b83c3f35f47 100644 --- a/drivers/net/typhoon.c +++ b/drivers/net/typhoon.c | |||
@@ -24,10 +24,6 @@ | |||
24 | 3XP Processor. It has been tested on x86 and sparc64. | 24 | 3XP Processor. It has been tested on x86 and sparc64. |
25 | 25 | ||
26 | KNOWN ISSUES: | 26 | KNOWN ISSUES: |
27 | *) The current firmware always strips the VLAN tag off, even if | ||
28 | we tell it not to. You should filter VLANs at the switch | ||
29 | as a workaround (good practice in any event) until we can | ||
30 | get this fixed. | ||
31 | *) Cannot DMA Rx packets to a 2 byte aligned address. Also firmware | 27 | *) Cannot DMA Rx packets to a 2 byte aligned address. Also firmware |
32 | issue. Hopefully 3Com will fix it. | 28 | issue. Hopefully 3Com will fix it. |
33 | *) Waiting for a command response takes 8ms due to non-preemptable | 29 | *) Waiting for a command response takes 8ms due to non-preemptable |
@@ -280,8 +276,6 @@ struct typhoon { | |||
280 | struct pci_dev * pdev; | 276 | struct pci_dev * pdev; |
281 | struct net_device * dev; | 277 | struct net_device * dev; |
282 | struct napi_struct napi; | 278 | struct napi_struct napi; |
283 | spinlock_t state_lock; | ||
284 | struct vlan_group * vlgrp; | ||
285 | struct basic_ring rxHiRing; | 279 | struct basic_ring rxHiRing; |
286 | struct basic_ring rxBuffRing; | 280 | struct basic_ring rxBuffRing; |
287 | struct rxbuff_ent rxbuffers[RXENT_ENTRIES]; | 281 | struct rxbuff_ent rxbuffers[RXENT_ENTRIES]; |
@@ -695,44 +689,6 @@ out: | |||
695 | return err; | 689 | return err; |
696 | } | 690 | } |
697 | 691 | ||
698 | static void | ||
699 | typhoon_vlan_rx_register(struct net_device *dev, struct vlan_group *grp) | ||
700 | { | ||
701 | struct typhoon *tp = netdev_priv(dev); | ||
702 | struct cmd_desc xp_cmd; | ||
703 | int err; | ||
704 | |||
705 | spin_lock_bh(&tp->state_lock); | ||
706 | if(!tp->vlgrp != !grp) { | ||
707 | /* We've either been turned on for the first time, or we've | ||
708 | * been turned off. Update the 3XP. | ||
709 | */ | ||
710 | if(grp) | ||
711 | tp->offload |= TYPHOON_OFFLOAD_VLAN; | ||
712 | else | ||
713 | tp->offload &= ~TYPHOON_OFFLOAD_VLAN; | ||
714 | |||
715 | /* If the interface is up, the runtime is running -- and we | ||
716 | * must be up for the vlan core to call us. | ||
717 | * | ||
718 | * Do the command outside of the spin lock, as it is slow. | ||
719 | */ | ||
720 | INIT_COMMAND_WITH_RESPONSE(&xp_cmd, | ||
721 | TYPHOON_CMD_SET_OFFLOAD_TASKS); | ||
722 | xp_cmd.parm2 = tp->offload; | ||
723 | xp_cmd.parm3 = tp->offload; | ||
724 | spin_unlock_bh(&tp->state_lock); | ||
725 | err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); | ||
726 | if(err < 0) | ||
727 | netdev_err(tp->dev, "vlan offload error %d\n", -err); | ||
728 | spin_lock_bh(&tp->state_lock); | ||
729 | } | ||
730 | |||
731 | /* now make the change visible */ | ||
732 | tp->vlgrp = grp; | ||
733 | spin_unlock_bh(&tp->state_lock); | ||
734 | } | ||
735 | |||
736 | static inline void | 692 | static inline void |
737 | typhoon_tso_fill(struct sk_buff *skb, struct transmit_ring *txRing, | 693 | typhoon_tso_fill(struct sk_buff *skb, struct transmit_ring *txRing, |
738 | u32 ring_dma) | 694 | u32 ring_dma) |
@@ -818,7 +774,7 @@ typhoon_start_tx(struct sk_buff *skb, struct net_device *dev) | |||
818 | first_txd->processFlags |= | 774 | first_txd->processFlags |= |
819 | TYPHOON_TX_PF_INSERT_VLAN | TYPHOON_TX_PF_VLAN_PRIORITY; | 775 | TYPHOON_TX_PF_INSERT_VLAN | TYPHOON_TX_PF_VLAN_PRIORITY; |
820 | first_txd->processFlags |= | 776 | first_txd->processFlags |= |
821 | cpu_to_le32(ntohs(vlan_tx_tag_get(skb)) << | 777 | cpu_to_le32(htons(vlan_tx_tag_get(skb)) << |
822 | TYPHOON_TX_PF_VLAN_TAG_SHIFT); | 778 | TYPHOON_TX_PF_VLAN_TAG_SHIFT); |
823 | } | 779 | } |
824 | 780 | ||
@@ -936,7 +892,7 @@ typhoon_set_rx_mode(struct net_device *dev) | |||
936 | filter |= TYPHOON_RX_FILTER_MCAST_HASH; | 892 | filter |= TYPHOON_RX_FILTER_MCAST_HASH; |
937 | } | 893 | } |
938 | 894 | ||
939 | INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_RX_FILTER); | 895 | INIT_COMMAND_WITH_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_RX_FILTER); |
940 | xp_cmd.parm1 = filter; | 896 | xp_cmd.parm1 = filter; |
941 | typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); | 897 | typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); |
942 | } | 898 | } |
@@ -1198,6 +1154,20 @@ typhoon_get_rx_csum(struct net_device *dev) | |||
1198 | return 1; | 1154 | return 1; |
1199 | } | 1155 | } |
1200 | 1156 | ||
1157 | static int | ||
1158 | typhoon_set_flags(struct net_device *dev, u32 data) | ||
1159 | { | ||
1160 | /* There's no way to turn off the RX VLAN offloading and stripping | ||
1161 | * on the current 3XP firmware -- it does not respect the offload | ||
1162 | * settings -- so we only allow the user to toggle the TX processing. | ||
1163 | */ | ||
1164 | if (!(data & ETH_FLAG_RXVLAN)) | ||
1165 | return -EINVAL; | ||
1166 | |||
1167 | return ethtool_op_set_flags(dev, data, | ||
1168 | ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN); | ||
1169 | } | ||
1170 | |||
1201 | static void | 1171 | static void |
1202 | typhoon_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) | 1172 | typhoon_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) |
1203 | { | 1173 | { |
@@ -1224,6 +1194,8 @@ static const struct ethtool_ops typhoon_ethtool_ops = { | |||
1224 | .set_sg = ethtool_op_set_sg, | 1194 | .set_sg = ethtool_op_set_sg, |
1225 | .set_tso = ethtool_op_set_tso, | 1195 | .set_tso = ethtool_op_set_tso, |
1226 | .get_ringparam = typhoon_get_ringparam, | 1196 | .get_ringparam = typhoon_get_ringparam, |
1197 | .set_flags = typhoon_set_flags, | ||
1198 | .get_flags = ethtool_op_get_flags, | ||
1227 | }; | 1199 | }; |
1228 | 1200 | ||
1229 | static int | 1201 | static int |
@@ -1309,9 +1281,9 @@ typhoon_init_interface(struct typhoon *tp) | |||
1309 | 1281 | ||
1310 | tp->offload = TYPHOON_OFFLOAD_IP_CHKSUM | TYPHOON_OFFLOAD_TCP_CHKSUM; | 1282 | tp->offload = TYPHOON_OFFLOAD_IP_CHKSUM | TYPHOON_OFFLOAD_TCP_CHKSUM; |
1311 | tp->offload |= TYPHOON_OFFLOAD_UDP_CHKSUM | TSO_OFFLOAD_ON; | 1283 | tp->offload |= TYPHOON_OFFLOAD_UDP_CHKSUM | TSO_OFFLOAD_ON; |
1284 | tp->offload |= TYPHOON_OFFLOAD_VLAN; | ||
1312 | 1285 | ||
1313 | spin_lock_init(&tp->command_lock); | 1286 | spin_lock_init(&tp->command_lock); |
1314 | spin_lock_init(&tp->state_lock); | ||
1315 | 1287 | ||
1316 | /* Force the writes to the shared memory area out before continuing. */ | 1288 | /* Force the writes to the shared memory area out before continuing. */ |
1317 | wmb(); | 1289 | wmb(); |
@@ -1328,7 +1300,7 @@ typhoon_init_rings(struct typhoon *tp) | |||
1328 | tp->rxHiRing.lastWrite = 0; | 1300 | tp->rxHiRing.lastWrite = 0; |
1329 | tp->rxBuffRing.lastWrite = 0; | 1301 | tp->rxBuffRing.lastWrite = 0; |
1330 | tp->cmdRing.lastWrite = 0; | 1302 | tp->cmdRing.lastWrite = 0; |
1331 | tp->cmdRing.lastWrite = 0; | 1303 | tp->respRing.lastWrite = 0; |
1332 | 1304 | ||
1333 | tp->txLoRing.lastRead = 0; | 1305 | tp->txLoRing.lastRead = 0; |
1334 | tp->txHiRing.lastRead = 0; | 1306 | tp->txHiRing.lastRead = 0; |
@@ -1762,13 +1734,10 @@ typhoon_rx(struct typhoon *tp, struct basic_ring *rxRing, volatile __le32 * read | |||
1762 | } else | 1734 | } else |
1763 | skb_checksum_none_assert(new_skb); | 1735 | skb_checksum_none_assert(new_skb); |
1764 | 1736 | ||
1765 | spin_lock(&tp->state_lock); | 1737 | if (rx->rxStatus & TYPHOON_RX_VLAN) |
1766 | if(tp->vlgrp != NULL && rx->rxStatus & TYPHOON_RX_VLAN) | 1738 | __vlan_hwaccel_put_tag(new_skb, |
1767 | vlan_hwaccel_receive_skb(new_skb, tp->vlgrp, | 1739 | ntohl(rx->vlanTag) & 0xffff); |
1768 | ntohl(rx->vlanTag) & 0xffff); | 1740 | netif_receive_skb(new_skb); |
1769 | else | ||
1770 | netif_receive_skb(new_skb); | ||
1771 | spin_unlock(&tp->state_lock); | ||
1772 | 1741 | ||
1773 | received++; | 1742 | received++; |
1774 | budget--; | 1743 | budget--; |
@@ -1989,11 +1958,9 @@ typhoon_start_runtime(struct typhoon *tp) | |||
1989 | goto error_out; | 1958 | goto error_out; |
1990 | 1959 | ||
1991 | INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_OFFLOAD_TASKS); | 1960 | INIT_COMMAND_NO_RESPONSE(&xp_cmd, TYPHOON_CMD_SET_OFFLOAD_TASKS); |
1992 | spin_lock_bh(&tp->state_lock); | ||
1993 | xp_cmd.parm2 = tp->offload; | 1961 | xp_cmd.parm2 = tp->offload; |
1994 | xp_cmd.parm3 = tp->offload; | 1962 | xp_cmd.parm3 = tp->offload; |
1995 | err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); | 1963 | err = typhoon_issue_command(tp, 1, &xp_cmd, 0, NULL); |
1996 | spin_unlock_bh(&tp->state_lock); | ||
1997 | if(err < 0) | 1964 | if(err < 0) |
1998 | goto error_out; | 1965 | goto error_out; |
1999 | 1966 | ||
@@ -2231,13 +2198,9 @@ typhoon_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2231 | if(!netif_running(dev)) | 2198 | if(!netif_running(dev)) |
2232 | return 0; | 2199 | return 0; |
2233 | 2200 | ||
2234 | spin_lock_bh(&tp->state_lock); | 2201 | /* TYPHOON_OFFLOAD_VLAN is always on now, so this doesn't work */ |
2235 | if(tp->vlgrp && tp->wol_events & TYPHOON_WAKE_MAGIC_PKT) { | 2202 | if(tp->wol_events & TYPHOON_WAKE_MAGIC_PKT) |
2236 | spin_unlock_bh(&tp->state_lock); | 2203 | netdev_warn(dev, "cannot do WAKE_MAGIC with VLAN offloading\n"); |
2237 | netdev_err(dev, "cannot do WAKE_MAGIC with VLANS\n"); | ||
2238 | return -EBUSY; | ||
2239 | } | ||
2240 | spin_unlock_bh(&tp->state_lock); | ||
2241 | 2204 | ||
2242 | netif_device_detach(dev); | 2205 | netif_device_detach(dev); |
2243 | 2206 | ||
@@ -2338,7 +2301,6 @@ static const struct net_device_ops typhoon_netdev_ops = { | |||
2338 | .ndo_validate_addr = eth_validate_addr, | 2301 | .ndo_validate_addr = eth_validate_addr, |
2339 | .ndo_set_mac_address = typhoon_set_mac_address, | 2302 | .ndo_set_mac_address = typhoon_set_mac_address, |
2340 | .ndo_change_mtu = eth_change_mtu, | 2303 | .ndo_change_mtu = eth_change_mtu, |
2341 | .ndo_vlan_rx_register = typhoon_vlan_rx_register, | ||
2342 | }; | 2304 | }; |
2343 | 2305 | ||
2344 | static int __devinit | 2306 | static int __devinit |
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index a4c3f5708246..acbdab3d66ca 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c | |||
@@ -2050,12 +2050,16 @@ static void ucc_geth_stop(struct ucc_geth_private *ugeth) | |||
2050 | 2050 | ||
2051 | ugeth_vdbg("%s: IN", __func__); | 2051 | ugeth_vdbg("%s: IN", __func__); |
2052 | 2052 | ||
2053 | /* | ||
2054 | * Tell the kernel the link is down. | ||
2055 | * Must be done before disabling the controller | ||
2056 | * or deadlock may happen. | ||
2057 | */ | ||
2058 | phy_stop(phydev); | ||
2059 | |||
2053 | /* Disable the controller */ | 2060 | /* Disable the controller */ |
2054 | ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); | 2061 | ugeth_disable(ugeth, COMM_DIR_RX_AND_TX); |
2055 | 2062 | ||
2056 | /* Tell the kernel the link is down */ | ||
2057 | phy_stop(phydev); | ||
2058 | |||
2059 | /* Mask all interrupts */ | 2063 | /* Mask all interrupts */ |
2060 | out_be32(ugeth->uccf->p_uccm, 0x00000000); | 2064 | out_be32(ugeth->uccf->p_uccm, 0x00000000); |
2061 | 2065 | ||
@@ -2065,9 +2069,6 @@ static void ucc_geth_stop(struct ucc_geth_private *ugeth) | |||
2065 | /* Disable Rx and Tx */ | 2069 | /* Disable Rx and Tx */ |
2066 | clrbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX); | 2070 | clrbits32(&ug_regs->maccfg1, MACCFG1_ENABLE_RX | MACCFG1_ENABLE_TX); |
2067 | 2071 | ||
2068 | phy_disconnect(ugeth->phydev); | ||
2069 | ugeth->phydev = NULL; | ||
2070 | |||
2071 | ucc_geth_memclean(ugeth); | 2072 | ucc_geth_memclean(ugeth); |
2072 | } | 2073 | } |
2073 | 2074 | ||
@@ -3550,7 +3551,10 @@ static int ucc_geth_close(struct net_device *dev) | |||
3550 | 3551 | ||
3551 | napi_disable(&ugeth->napi); | 3552 | napi_disable(&ugeth->napi); |
3552 | 3553 | ||
3554 | cancel_work_sync(&ugeth->timeout_work); | ||
3553 | ucc_geth_stop(ugeth); | 3555 | ucc_geth_stop(ugeth); |
3556 | phy_disconnect(ugeth->phydev); | ||
3557 | ugeth->phydev = NULL; | ||
3554 | 3558 | ||
3555 | free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev); | 3559 | free_irq(ugeth->ug_info->uf_info.irq, ugeth->ndev); |
3556 | 3560 | ||
@@ -3579,8 +3583,12 @@ static void ucc_geth_timeout_work(struct work_struct *work) | |||
3579 | * Must reset MAC *and* PHY. This is done by reopening | 3583 | * Must reset MAC *and* PHY. This is done by reopening |
3580 | * the device. | 3584 | * the device. |
3581 | */ | 3585 | */ |
3582 | ucc_geth_close(dev); | 3586 | netif_tx_stop_all_queues(dev); |
3583 | ucc_geth_open(dev); | 3587 | ucc_geth_stop(ugeth); |
3588 | ucc_geth_init_mac(ugeth); | ||
3589 | /* Must start PHY here */ | ||
3590 | phy_start(ugeth->phydev); | ||
3591 | netif_tx_start_all_queues(dev); | ||
3584 | } | 3592 | } |
3585 | 3593 | ||
3586 | netif_tx_schedule_all(dev); | 3594 | netif_tx_schedule_all(dev); |
@@ -3594,7 +3602,6 @@ static void ucc_geth_timeout(struct net_device *dev) | |||
3594 | { | 3602 | { |
3595 | struct ucc_geth_private *ugeth = netdev_priv(dev); | 3603 | struct ucc_geth_private *ugeth = netdev_priv(dev); |
3596 | 3604 | ||
3597 | netif_carrier_off(dev); | ||
3598 | schedule_work(&ugeth->timeout_work); | 3605 | schedule_work(&ugeth->timeout_work); |
3599 | } | 3606 | } |
3600 | 3607 | ||
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index 05a95586f3c5..055b87ab4f07 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h | |||
@@ -899,7 +899,8 @@ struct ucc_geth_hardware_statistics { | |||
899 | #define UCC_GETH_UTFS_INIT 512 /* Tx virtual FIFO size | 899 | #define UCC_GETH_UTFS_INIT 512 /* Tx virtual FIFO size |
900 | */ | 900 | */ |
901 | #define UCC_GETH_UTFET_INIT 256 /* 1/2 utfs */ | 901 | #define UCC_GETH_UTFET_INIT 256 /* 1/2 utfs */ |
902 | #define UCC_GETH_UTFTT_INIT 512 | 902 | #define UCC_GETH_UTFTT_INIT 256 /* 1/2 utfs |
903 | due to errata */ | ||
903 | /* Gigabit Ethernet (1000 Mbps) */ | 904 | /* Gigabit Ethernet (1000 Mbps) */ |
904 | #define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual | 905 | #define UCC_GETH_URFS_GIGA_INIT 4096/*2048*/ /* Rx virtual |
905 | FIFO size */ | 906 | FIFO size */ |
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c index b154a94de03e..62e9e8dc8190 100644 --- a/drivers/net/usb/hso.c +++ b/drivers/net/usb/hso.c | |||
@@ -2994,12 +2994,14 @@ static int hso_probe(struct usb_interface *interface, | |||
2994 | 2994 | ||
2995 | case HSO_INTF_BULK: | 2995 | case HSO_INTF_BULK: |
2996 | /* It's a regular bulk interface */ | 2996 | /* It's a regular bulk interface */ |
2997 | if (((port_spec & HSO_PORT_MASK) == HSO_PORT_NETWORK) && | 2997 | if ((port_spec & HSO_PORT_MASK) == HSO_PORT_NETWORK) { |
2998 | !disable_net) | 2998 | if (!disable_net) |
2999 | hso_dev = hso_create_net_device(interface, port_spec); | 2999 | hso_dev = |
3000 | else | 3000 | hso_create_net_device(interface, port_spec); |
3001 | } else { | ||
3001 | hso_dev = | 3002 | hso_dev = |
3002 | hso_create_bulk_serial_device(interface, port_spec); | 3003 | hso_create_bulk_serial_device(interface, port_spec); |
3004 | } | ||
3003 | if (!hso_dev) | 3005 | if (!hso_dev) |
3004 | goto exit; | 3006 | goto exit; |
3005 | break; | 3007 | break; |
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c index ca7fc9df1ccf..c04d49e31f81 100644 --- a/drivers/net/usb/usbnet.c +++ b/drivers/net/usb/usbnet.c | |||
@@ -45,6 +45,7 @@ | |||
45 | #include <linux/usb/usbnet.h> | 45 | #include <linux/usb/usbnet.h> |
46 | #include <linux/slab.h> | 46 | #include <linux/slab.h> |
47 | #include <linux/kernel.h> | 47 | #include <linux/kernel.h> |
48 | #include <linux/pm_runtime.h> | ||
48 | 49 | ||
49 | #define DRIVER_VERSION "22-Aug-2005" | 50 | #define DRIVER_VERSION "22-Aug-2005" |
50 | 51 | ||
@@ -1273,6 +1274,16 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod) | |||
1273 | struct usb_device *xdev; | 1274 | struct usb_device *xdev; |
1274 | int status; | 1275 | int status; |
1275 | const char *name; | 1276 | const char *name; |
1277 | struct usb_driver *driver = to_usb_driver(udev->dev.driver); | ||
1278 | |||
1279 | /* usbnet already took usb runtime pm, so have to enable the feature | ||
1280 | * for usb interface, otherwise usb_autopm_get_interface may return | ||
1281 | * failure if USB_SUSPEND(RUNTIME_PM) is enabled. | ||
1282 | */ | ||
1283 | if (!driver->supports_autosuspend) { | ||
1284 | driver->supports_autosuspend = 1; | ||
1285 | pm_runtime_enable(&udev->dev); | ||
1286 | } | ||
1276 | 1287 | ||
1277 | name = udev->dev.driver->name; | 1288 | name = udev->dev.driver->name; |
1278 | info = (struct driver_info *) prod->driver_info; | 1289 | info = (struct driver_info *) prod->driver_info; |
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index bb6b67f6b0cc..b6d402806ae6 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -986,9 +986,15 @@ static int virtnet_probe(struct virtio_device *vdev) | |||
986 | goto unregister; | 986 | goto unregister; |
987 | } | 987 | } |
988 | 988 | ||
989 | vi->status = VIRTIO_NET_S_LINK_UP; | 989 | /* Assume link up if device can't report link status, |
990 | virtnet_update_status(vi); | 990 | otherwise get link status from config. */ |
991 | netif_carrier_on(dev); | 991 | if (virtio_has_feature(vi->vdev, VIRTIO_NET_F_STATUS)) { |
992 | netif_carrier_off(dev); | ||
993 | virtnet_update_status(vi); | ||
994 | } else { | ||
995 | vi->status = VIRTIO_NET_S_LINK_UP; | ||
996 | netif_carrier_on(dev); | ||
997 | } | ||
992 | 998 | ||
993 | pr_debug("virtnet: registered device %s\n", dev->name); | 999 | pr_debug("virtnet: registered device %s\n", dev->name); |
994 | return 0; | 1000 | return 0; |
diff --git a/drivers/net/vmxnet3/upt1_defs.h b/drivers/net/vmxnet3/upt1_defs.h index 37108fb226d3..969c751ee404 100644 --- a/drivers/net/vmxnet3/upt1_defs.h +++ b/drivers/net/vmxnet3/upt1_defs.h | |||
@@ -88,9 +88,9 @@ struct UPT1_RSSConf { | |||
88 | 88 | ||
89 | /* features */ | 89 | /* features */ |
90 | enum { | 90 | enum { |
91 | UPT1_F_RXCSUM = 0x0001, /* rx csum verification */ | 91 | UPT1_F_RXCSUM = cpu_to_le64(0x0001), /* rx csum verification */ |
92 | UPT1_F_RSS = 0x0002, | 92 | UPT1_F_RSS = cpu_to_le64(0x0002), |
93 | UPT1_F_RXVLAN = 0x0004, /* VLAN tag stripping */ | 93 | UPT1_F_RXVLAN = cpu_to_le64(0x0004), /* VLAN tag stripping */ |
94 | UPT1_F_LRO = 0x0008, | 94 | UPT1_F_LRO = cpu_to_le64(0x0008), |
95 | }; | 95 | }; |
96 | #endif | 96 | #endif |
diff --git a/drivers/net/vmxnet3/vmxnet3_defs.h b/drivers/net/vmxnet3/vmxnet3_defs.h index ca7727b940ad..4d84912c99ba 100644 --- a/drivers/net/vmxnet3/vmxnet3_defs.h +++ b/drivers/net/vmxnet3/vmxnet3_defs.h | |||
@@ -523,9 +523,9 @@ struct Vmxnet3_RxFilterConf { | |||
523 | #define VMXNET3_PM_MAX_PATTERN_SIZE 128 | 523 | #define VMXNET3_PM_MAX_PATTERN_SIZE 128 |
524 | #define VMXNET3_PM_MAX_MASK_SIZE (VMXNET3_PM_MAX_PATTERN_SIZE / 8) | 524 | #define VMXNET3_PM_MAX_MASK_SIZE (VMXNET3_PM_MAX_PATTERN_SIZE / 8) |
525 | 525 | ||
526 | #define VMXNET3_PM_WAKEUP_MAGIC 0x01 /* wake up on magic pkts */ | 526 | #define VMXNET3_PM_WAKEUP_MAGIC cpu_to_le16(0x01) /* wake up on magic pkts */ |
527 | #define VMXNET3_PM_WAKEUP_FILTER 0x02 /* wake up on pkts matching | 527 | #define VMXNET3_PM_WAKEUP_FILTER cpu_to_le16(0x02) /* wake up on pkts matching |
528 | * filters */ | 528 | * filters */ |
529 | 529 | ||
530 | 530 | ||
531 | struct Vmxnet3_PM_PktFilter { | 531 | struct Vmxnet3_PM_PktFilter { |
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c index 3f60e0e3097b..21314e06e6d7 100644 --- a/drivers/net/vmxnet3/vmxnet3_drv.c +++ b/drivers/net/vmxnet3/vmxnet3_drv.c | |||
@@ -873,7 +873,7 @@ vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, | |||
873 | count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + | 873 | count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + |
874 | skb_shinfo(skb)->nr_frags + 1; | 874 | skb_shinfo(skb)->nr_frags + 1; |
875 | 875 | ||
876 | ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP)); | 876 | ctx.ipv4 = (skb->protocol == cpu_to_be16(ETH_P_IP)); |
877 | 877 | ||
878 | ctx.mss = skb_shinfo(skb)->gso_size; | 878 | ctx.mss = skb_shinfo(skb)->gso_size; |
879 | if (ctx.mss) { | 879 | if (ctx.mss) { |
@@ -1563,8 +1563,7 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |||
1563 | adapter->vlan_grp = grp; | 1563 | adapter->vlan_grp = grp; |
1564 | 1564 | ||
1565 | /* update FEATURES to device */ | 1565 | /* update FEATURES to device */ |
1566 | set_flag_le64(&devRead->misc.uptFeatures, | 1566 | devRead->misc.uptFeatures |= UPT1_F_RXVLAN; |
1567 | UPT1_F_RXVLAN); | ||
1568 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | 1567 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
1569 | VMXNET3_CMD_UPDATE_FEATURE); | 1568 | VMXNET3_CMD_UPDATE_FEATURE); |
1570 | /* | 1569 | /* |
@@ -1587,7 +1586,7 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |||
1587 | struct Vmxnet3_DSDevRead *devRead = &shared->devRead; | 1586 | struct Vmxnet3_DSDevRead *devRead = &shared->devRead; |
1588 | adapter->vlan_grp = NULL; | 1587 | adapter->vlan_grp = NULL; |
1589 | 1588 | ||
1590 | if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) { | 1589 | if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) { |
1591 | int i; | 1590 | int i; |
1592 | 1591 | ||
1593 | for (i = 0; i < VMXNET3_VFT_SIZE; i++) { | 1592 | for (i = 0; i < VMXNET3_VFT_SIZE; i++) { |
@@ -1600,8 +1599,7 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |||
1600 | VMXNET3_CMD_UPDATE_VLAN_FILTERS); | 1599 | VMXNET3_CMD_UPDATE_VLAN_FILTERS); |
1601 | 1600 | ||
1602 | /* update FEATURES to device */ | 1601 | /* update FEATURES to device */ |
1603 | reset_flag_le64(&devRead->misc.uptFeatures, | 1602 | devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN; |
1604 | UPT1_F_RXVLAN); | ||
1605 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | 1603 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
1606 | VMXNET3_CMD_UPDATE_FEATURE); | 1604 | VMXNET3_CMD_UPDATE_FEATURE); |
1607 | } | 1605 | } |
@@ -1762,15 +1760,15 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) | |||
1762 | 1760 | ||
1763 | /* set up feature flags */ | 1761 | /* set up feature flags */ |
1764 | if (adapter->rxcsum) | 1762 | if (adapter->rxcsum) |
1765 | set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM); | 1763 | devRead->misc.uptFeatures |= UPT1_F_RXCSUM; |
1766 | 1764 | ||
1767 | if (adapter->lro) { | 1765 | if (adapter->lro) { |
1768 | set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO); | 1766 | devRead->misc.uptFeatures |= UPT1_F_LRO; |
1769 | devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); | 1767 | devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); |
1770 | } | 1768 | } |
1771 | if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && | 1769 | if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && |
1772 | adapter->vlan_grp) { | 1770 | adapter->vlan_grp) { |
1773 | set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN); | 1771 | devRead->misc.uptFeatures |= UPT1_F_RXVLAN; |
1774 | } | 1772 | } |
1775 | 1773 | ||
1776 | devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); | 1774 | devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); |
@@ -2577,7 +2575,7 @@ vmxnet3_suspend(struct device *device) | |||
2577 | memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); | 2575 | memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); |
2578 | pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ | 2576 | pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ |
2579 | 2577 | ||
2580 | set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER); | 2578 | pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; |
2581 | i++; | 2579 | i++; |
2582 | } | 2580 | } |
2583 | 2581 | ||
@@ -2619,13 +2617,13 @@ vmxnet3_suspend(struct device *device) | |||
2619 | pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ | 2617 | pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ |
2620 | in_dev_put(in_dev); | 2618 | in_dev_put(in_dev); |
2621 | 2619 | ||
2622 | set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER); | 2620 | pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER; |
2623 | i++; | 2621 | i++; |
2624 | } | 2622 | } |
2625 | 2623 | ||
2626 | skip_arp: | 2624 | skip_arp: |
2627 | if (adapter->wol & WAKE_MAGIC) | 2625 | if (adapter->wol & WAKE_MAGIC) |
2628 | set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC); | 2626 | pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC; |
2629 | 2627 | ||
2630 | pmConf->numFilters = i; | 2628 | pmConf->numFilters = i; |
2631 | 2629 | ||
@@ -2667,7 +2665,7 @@ vmxnet3_resume(struct device *device) | |||
2667 | adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); | 2665 | adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); |
2668 | adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( | 2666 | adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( |
2669 | *pmConf)); | 2667 | *pmConf)); |
2670 | adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys( | 2668 | adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( |
2671 | pmConf)); | 2669 | pmConf)); |
2672 | 2670 | ||
2673 | netif_device_attach(netdev); | 2671 | netif_device_attach(netdev); |
diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c index 7e4b5a89165a..b79070bcc92e 100644 --- a/drivers/net/vmxnet3/vmxnet3_ethtool.c +++ b/drivers/net/vmxnet3/vmxnet3_ethtool.c | |||
@@ -50,13 +50,11 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val) | |||
50 | adapter->rxcsum = val; | 50 | adapter->rxcsum = val; |
51 | if (netif_running(netdev)) { | 51 | if (netif_running(netdev)) { |
52 | if (val) | 52 | if (val) |
53 | set_flag_le64( | 53 | adapter->shared->devRead.misc.uptFeatures |= |
54 | &adapter->shared->devRead.misc.uptFeatures, | 54 | UPT1_F_RXCSUM; |
55 | UPT1_F_RXCSUM); | ||
56 | else | 55 | else |
57 | reset_flag_le64( | 56 | adapter->shared->devRead.misc.uptFeatures &= |
58 | &adapter->shared->devRead.misc.uptFeatures, | 57 | ~UPT1_F_RXCSUM; |
59 | UPT1_F_RXCSUM); | ||
60 | 58 | ||
61 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | 59 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
62 | VMXNET3_CMD_UPDATE_FEATURE); | 60 | VMXNET3_CMD_UPDATE_FEATURE); |
@@ -292,10 +290,10 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data) | |||
292 | /* update harware LRO capability accordingly */ | 290 | /* update harware LRO capability accordingly */ |
293 | if (lro_requested) | 291 | if (lro_requested) |
294 | adapter->shared->devRead.misc.uptFeatures |= | 292 | adapter->shared->devRead.misc.uptFeatures |= |
295 | cpu_to_le64(UPT1_F_LRO); | 293 | UPT1_F_LRO; |
296 | else | 294 | else |
297 | adapter->shared->devRead.misc.uptFeatures &= | 295 | adapter->shared->devRead.misc.uptFeatures &= |
298 | cpu_to_le64(~UPT1_F_LRO); | 296 | ~UPT1_F_LRO; |
299 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, | 297 | VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, |
300 | VMXNET3_CMD_UPDATE_FEATURE); | 298 | VMXNET3_CMD_UPDATE_FEATURE); |
301 | } | 299 | } |
diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h index c88ea5cbba0d..edf228843afc 100644 --- a/drivers/net/vmxnet3/vmxnet3_int.h +++ b/drivers/net/vmxnet3/vmxnet3_int.h | |||
@@ -301,8 +301,8 @@ struct vmxnet3_adapter { | |||
301 | struct net_device *netdev; | 301 | struct net_device *netdev; |
302 | struct pci_dev *pdev; | 302 | struct pci_dev *pdev; |
303 | 303 | ||
304 | u8 *hw_addr0; /* for BAR 0 */ | 304 | u8 __iomem *hw_addr0; /* for BAR 0 */ |
305 | u8 *hw_addr1; /* for BAR 1 */ | 305 | u8 __iomem *hw_addr1; /* for BAR 1 */ |
306 | 306 | ||
307 | /* feature control */ | 307 | /* feature control */ |
308 | bool rxcsum; | 308 | bool rxcsum; |
@@ -330,14 +330,14 @@ struct vmxnet3_adapter { | |||
330 | }; | 330 | }; |
331 | 331 | ||
332 | #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \ | 332 | #define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \ |
333 | writel(cpu_to_le32(val), (adapter)->hw_addr0 + (reg)) | 333 | writel((val), (adapter)->hw_addr0 + (reg)) |
334 | #define VMXNET3_READ_BAR0_REG(adapter, reg) \ | 334 | #define VMXNET3_READ_BAR0_REG(adapter, reg) \ |
335 | le32_to_cpu(readl((adapter)->hw_addr0 + (reg))) | 335 | readl((adapter)->hw_addr0 + (reg)) |
336 | 336 | ||
337 | #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \ | 337 | #define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \ |
338 | writel(cpu_to_le32(val), (adapter)->hw_addr1 + (reg)) | 338 | writel((val), (adapter)->hw_addr1 + (reg)) |
339 | #define VMXNET3_READ_BAR1_REG(adapter, reg) \ | 339 | #define VMXNET3_READ_BAR1_REG(adapter, reg) \ |
340 | le32_to_cpu(readl((adapter)->hw_addr1 + (reg))) | 340 | readl((adapter)->hw_addr1 + (reg)) |
341 | 341 | ||
342 | #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5) | 342 | #define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5) |
343 | #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \ | 343 | #define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \ |
@@ -353,21 +353,6 @@ struct vmxnet3_adapter { | |||
353 | #define VMXNET3_MAX_ETH_HDR_SIZE 22 | 353 | #define VMXNET3_MAX_ETH_HDR_SIZE 22 |
354 | #define VMXNET3_MAX_SKB_BUF_SIZE (3*1024) | 354 | #define VMXNET3_MAX_SKB_BUF_SIZE (3*1024) |
355 | 355 | ||
356 | static inline void set_flag_le16(__le16 *data, u16 flag) | ||
357 | { | ||
358 | *data = cpu_to_le16(le16_to_cpu(*data) | flag); | ||
359 | } | ||
360 | |||
361 | static inline void set_flag_le64(__le64 *data, u64 flag) | ||
362 | { | ||
363 | *data = cpu_to_le64(le64_to_cpu(*data) | flag); | ||
364 | } | ||
365 | |||
366 | static inline void reset_flag_le64(__le64 *data, u64 flag) | ||
367 | { | ||
368 | *data = cpu_to_le64(le64_to_cpu(*data) & ~flag); | ||
369 | } | ||
370 | |||
371 | int | 356 | int |
372 | vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter); | 357 | vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter); |
373 | 358 | ||
diff --git a/drivers/net/vxge/vxge-config.c b/drivers/net/vxge/vxge-config.c index 0e6db5935609..906a3ca3676b 100644 --- a/drivers/net/vxge/vxge-config.c +++ b/drivers/net/vxge/vxge-config.c | |||
@@ -20,6 +20,179 @@ | |||
20 | #include "vxge-traffic.h" | 20 | #include "vxge-traffic.h" |
21 | #include "vxge-config.h" | 21 | #include "vxge-config.h" |
22 | 22 | ||
23 | static enum vxge_hw_status | ||
24 | __vxge_hw_fifo_create( | ||
25 | struct __vxge_hw_vpath_handle *vpath_handle, | ||
26 | struct vxge_hw_fifo_attr *attr); | ||
27 | |||
28 | static enum vxge_hw_status | ||
29 | __vxge_hw_fifo_abort( | ||
30 | struct __vxge_hw_fifo *fifoh); | ||
31 | |||
32 | static enum vxge_hw_status | ||
33 | __vxge_hw_fifo_reset( | ||
34 | struct __vxge_hw_fifo *ringh); | ||
35 | |||
36 | static enum vxge_hw_status | ||
37 | __vxge_hw_fifo_delete( | ||
38 | struct __vxge_hw_vpath_handle *vpath_handle); | ||
39 | |||
40 | static struct __vxge_hw_blockpool_entry * | ||
41 | __vxge_hw_blockpool_block_allocate(struct __vxge_hw_device *hldev, | ||
42 | u32 size); | ||
43 | |||
44 | static void | ||
45 | __vxge_hw_blockpool_block_free(struct __vxge_hw_device *hldev, | ||
46 | struct __vxge_hw_blockpool_entry *entry); | ||
47 | |||
48 | static void vxge_hw_blockpool_block_add(struct __vxge_hw_device *devh, | ||
49 | void *block_addr, | ||
50 | u32 length, | ||
51 | struct pci_dev *dma_h, | ||
52 | struct pci_dev *acc_handle); | ||
53 | |||
54 | static enum vxge_hw_status | ||
55 | __vxge_hw_blockpool_create(struct __vxge_hw_device *hldev, | ||
56 | struct __vxge_hw_blockpool *blockpool, | ||
57 | u32 pool_size, | ||
58 | u32 pool_max); | ||
59 | |||
60 | static void | ||
61 | __vxge_hw_blockpool_destroy(struct __vxge_hw_blockpool *blockpool); | ||
62 | |||
63 | static void * | ||
64 | __vxge_hw_blockpool_malloc(struct __vxge_hw_device *hldev, | ||
65 | u32 size, | ||
66 | struct vxge_hw_mempool_dma *dma_object); | ||
67 | |||
68 | static void | ||
69 | __vxge_hw_blockpool_free(struct __vxge_hw_device *hldev, | ||
70 | void *memblock, | ||
71 | u32 size, | ||
72 | struct vxge_hw_mempool_dma *dma_object); | ||
73 | |||
74 | |||
75 | static struct __vxge_hw_channel* | ||
76 | __vxge_hw_channel_allocate(struct __vxge_hw_vpath_handle *vph, | ||
77 | enum __vxge_hw_channel_type type, u32 length, | ||
78 | u32 per_dtr_space, void *userdata); | ||
79 | |||
80 | static void | ||
81 | __vxge_hw_channel_free( | ||
82 | struct __vxge_hw_channel *channel); | ||
83 | |||
84 | static enum vxge_hw_status | ||
85 | __vxge_hw_channel_initialize( | ||
86 | struct __vxge_hw_channel *channel); | ||
87 | |||
88 | static enum vxge_hw_status | ||
89 | __vxge_hw_channel_reset( | ||
90 | struct __vxge_hw_channel *channel); | ||
91 | |||
92 | static enum vxge_hw_status __vxge_hw_ring_delete(struct __vxge_hw_vpath_handle *vp); | ||
93 | |||
94 | static enum vxge_hw_status | ||
95 | __vxge_hw_device_fifo_config_check(struct vxge_hw_fifo_config *fifo_config); | ||
96 | |||
97 | static enum vxge_hw_status | ||
98 | __vxge_hw_device_config_check(struct vxge_hw_device_config *new_config); | ||
99 | |||
100 | static void | ||
101 | __vxge_hw_device_id_get(struct __vxge_hw_device *hldev); | ||
102 | |||
103 | static void | ||
104 | __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev); | ||
105 | |||
106 | static enum vxge_hw_status | ||
107 | __vxge_hw_vpath_card_info_get( | ||
108 | u32 vp_id, | ||
109 | struct vxge_hw_vpath_reg __iomem *vpath_reg, | ||
110 | struct vxge_hw_device_hw_info *hw_info); | ||
111 | |||
112 | static enum vxge_hw_status | ||
113 | __vxge_hw_device_initialize(struct __vxge_hw_device *hldev); | ||
114 | |||
115 | static void | ||
116 | __vxge_hw_device_pci_e_init(struct __vxge_hw_device *hldev); | ||
117 | |||
118 | static enum vxge_hw_status | ||
119 | __vxge_hw_device_reg_addr_get(struct __vxge_hw_device *hldev); | ||
120 | |||
121 | static enum vxge_hw_status | ||
122 | __vxge_hw_device_register_poll( | ||
123 | void __iomem *reg, | ||
124 | u64 mask, u32 max_millis); | ||
125 | |||
126 | static inline enum vxge_hw_status | ||
127 | __vxge_hw_pio_mem_write64(u64 val64, void __iomem *addr, | ||
128 | u64 mask, u32 max_millis) | ||
129 | { | ||
130 | __vxge_hw_pio_mem_write32_lower((u32)vxge_bVALn(val64, 32, 32), addr); | ||
131 | wmb(); | ||
132 | |||
133 | __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), addr); | ||
134 | wmb(); | ||
135 | |||
136 | return __vxge_hw_device_register_poll(addr, mask, max_millis); | ||
137 | } | ||
138 | |||
139 | static struct vxge_hw_mempool* | ||
140 | __vxge_hw_mempool_create(struct __vxge_hw_device *devh, u32 memblock_size, | ||
141 | u32 item_size, u32 private_size, u32 items_initial, | ||
142 | u32 items_max, struct vxge_hw_mempool_cbs *mp_callback, | ||
143 | void *userdata); | ||
144 | static void __vxge_hw_mempool_destroy(struct vxge_hw_mempool *mempool); | ||
145 | |||
146 | static enum vxge_hw_status | ||
147 | __vxge_hw_vpath_stats_get(struct __vxge_hw_virtualpath *vpath, | ||
148 | struct vxge_hw_vpath_stats_hw_info *hw_stats); | ||
149 | |||
150 | static enum vxge_hw_status | ||
151 | vxge_hw_vpath_stats_enable(struct __vxge_hw_vpath_handle *vpath_handle); | ||
152 | |||
153 | static enum vxge_hw_status | ||
154 | __vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg); | ||
155 | |||
156 | static u64 | ||
157 | __vxge_hw_vpath_pci_func_mode_get(u32 vp_id, | ||
158 | struct vxge_hw_vpath_reg __iomem *vpath_reg); | ||
159 | |||
160 | static u32 | ||
161 | __vxge_hw_vpath_func_id_get(u32 vp_id, struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg); | ||
162 | |||
163 | static enum vxge_hw_status | ||
164 | __vxge_hw_vpath_addr_get(u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg, | ||
165 | u8 (macaddr)[ETH_ALEN], u8 (macaddr_mask)[ETH_ALEN]); | ||
166 | |||
167 | static enum vxge_hw_status | ||
168 | __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath); | ||
169 | |||
170 | |||
171 | static enum vxge_hw_status | ||
172 | __vxge_hw_vpath_sw_reset(struct __vxge_hw_device *devh, u32 vp_id); | ||
173 | |||
174 | static enum vxge_hw_status | ||
175 | __vxge_hw_vpath_fw_ver_get(u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg, | ||
176 | struct vxge_hw_device_hw_info *hw_info); | ||
177 | |||
178 | static enum vxge_hw_status | ||
179 | __vxge_hw_vpath_mac_configure(struct __vxge_hw_device *devh, u32 vp_id); | ||
180 | |||
181 | static void | ||
182 | __vxge_hw_vp_terminate(struct __vxge_hw_device *devh, u32 vp_id); | ||
183 | |||
184 | static enum vxge_hw_status | ||
185 | __vxge_hw_vpath_stats_access(struct __vxge_hw_virtualpath *vpath, | ||
186 | u32 operation, u32 offset, u64 *stat); | ||
187 | |||
188 | static enum vxge_hw_status | ||
189 | __vxge_hw_vpath_xmac_tx_stats_get(struct __vxge_hw_virtualpath *vpath, | ||
190 | struct vxge_hw_xmac_vpath_tx_stats *vpath_tx_stats); | ||
191 | |||
192 | static enum vxge_hw_status | ||
193 | __vxge_hw_vpath_xmac_rx_stats_get(struct __vxge_hw_virtualpath *vpath, | ||
194 | struct vxge_hw_xmac_vpath_rx_stats *vpath_rx_stats); | ||
195 | |||
23 | /* | 196 | /* |
24 | * __vxge_hw_channel_allocate - Allocate memory for channel | 197 | * __vxge_hw_channel_allocate - Allocate memory for channel |
25 | * This function allocates required memory for the channel and various arrays | 198 | * This function allocates required memory for the channel and various arrays |
@@ -190,7 +363,7 @@ __vxge_hw_device_pci_e_init(struct __vxge_hw_device *hldev) | |||
190 | * Will poll certain register for specified amount of time. | 363 | * Will poll certain register for specified amount of time. |
191 | * Will poll until masked bit is not cleared. | 364 | * Will poll until masked bit is not cleared. |
192 | */ | 365 | */ |
193 | enum vxge_hw_status | 366 | static enum vxge_hw_status |
194 | __vxge_hw_device_register_poll(void __iomem *reg, u64 mask, u32 max_millis) | 367 | __vxge_hw_device_register_poll(void __iomem *reg, u64 mask, u32 max_millis) |
195 | { | 368 | { |
196 | u64 val64; | 369 | u64 val64; |
@@ -221,7 +394,7 @@ __vxge_hw_device_register_poll(void __iomem *reg, u64 mask, u32 max_millis) | |||
221 | * in progress | 394 | * in progress |
222 | * This routine checks the vpath reset in progress register is turned zero | 395 | * This routine checks the vpath reset in progress register is turned zero |
223 | */ | 396 | */ |
224 | enum vxge_hw_status | 397 | static enum vxge_hw_status |
225 | __vxge_hw_device_vpath_reset_in_prog_check(u64 __iomem *vpath_rst_in_prog) | 398 | __vxge_hw_device_vpath_reset_in_prog_check(u64 __iomem *vpath_rst_in_prog) |
226 | { | 399 | { |
227 | enum vxge_hw_status status; | 400 | enum vxge_hw_status status; |
@@ -236,7 +409,7 @@ __vxge_hw_device_vpath_reset_in_prog_check(u64 __iomem *vpath_rst_in_prog) | |||
236 | * This routine sets the swapper and reads the toc pointer and returns the | 409 | * This routine sets the swapper and reads the toc pointer and returns the |
237 | * memory mapped address of the toc | 410 | * memory mapped address of the toc |
238 | */ | 411 | */ |
239 | struct vxge_hw_toc_reg __iomem * | 412 | static struct vxge_hw_toc_reg __iomem * |
240 | __vxge_hw_device_toc_get(void __iomem *bar0) | 413 | __vxge_hw_device_toc_get(void __iomem *bar0) |
241 | { | 414 | { |
242 | u64 val64; | 415 | u64 val64; |
@@ -779,7 +952,7 @@ exit: | |||
779 | * vxge_hw_device_xmac_aggr_stats_get - Get the Statistics on aggregate port | 952 | * vxge_hw_device_xmac_aggr_stats_get - Get the Statistics on aggregate port |
780 | * Get the Statistics on aggregate port | 953 | * Get the Statistics on aggregate port |
781 | */ | 954 | */ |
782 | enum vxge_hw_status | 955 | static enum vxge_hw_status |
783 | vxge_hw_device_xmac_aggr_stats_get(struct __vxge_hw_device *hldev, u32 port, | 956 | vxge_hw_device_xmac_aggr_stats_get(struct __vxge_hw_device *hldev, u32 port, |
784 | struct vxge_hw_xmac_aggr_stats *aggr_stats) | 957 | struct vxge_hw_xmac_aggr_stats *aggr_stats) |
785 | { | 958 | { |
@@ -814,7 +987,7 @@ exit: | |||
814 | * vxge_hw_device_xmac_port_stats_get - Get the Statistics on a port | 987 | * vxge_hw_device_xmac_port_stats_get - Get the Statistics on a port |
815 | * Get the Statistics on port | 988 | * Get the Statistics on port |
816 | */ | 989 | */ |
817 | enum vxge_hw_status | 990 | static enum vxge_hw_status |
818 | vxge_hw_device_xmac_port_stats_get(struct __vxge_hw_device *hldev, u32 port, | 991 | vxge_hw_device_xmac_port_stats_get(struct __vxge_hw_device *hldev, u32 port, |
819 | struct vxge_hw_xmac_port_stats *port_stats) | 992 | struct vxge_hw_xmac_port_stats *port_stats) |
820 | { | 993 | { |
@@ -952,20 +1125,6 @@ u32 vxge_hw_device_trace_level_get(struct __vxge_hw_device *hldev) | |||
952 | return 0; | 1125 | return 0; |
953 | #endif | 1126 | #endif |
954 | } | 1127 | } |
955 | /* | ||
956 | * vxge_hw_device_debug_mask_get - Get the debug mask | ||
957 | * This routine returns the current debug mask set | ||
958 | */ | ||
959 | u32 vxge_hw_device_debug_mask_get(struct __vxge_hw_device *hldev) | ||
960 | { | ||
961 | #if defined(VXGE_DEBUG_TRACE_MASK) || defined(VXGE_DEBUG_ERR_MASK) | ||
962 | if (hldev == NULL) | ||
963 | return 0; | ||
964 | return hldev->debug_module_mask; | ||
965 | #else | ||
966 | return 0; | ||
967 | #endif | ||
968 | } | ||
969 | 1128 | ||
970 | /* | 1129 | /* |
971 | * vxge_hw_getpause_data -Pause frame frame generation and reception. | 1130 | * vxge_hw_getpause_data -Pause frame frame generation and reception. |
@@ -1090,7 +1249,7 @@ __vxge_hw_ring_block_next_pointer_set(u8 *block, dma_addr_t dma_next) | |||
1090 | * first block | 1249 | * first block |
1091 | * Returns the dma address of the first RxD block | 1250 | * Returns the dma address of the first RxD block |
1092 | */ | 1251 | */ |
1093 | u64 __vxge_hw_ring_first_block_address_get(struct __vxge_hw_ring *ring) | 1252 | static u64 __vxge_hw_ring_first_block_address_get(struct __vxge_hw_ring *ring) |
1094 | { | 1253 | { |
1095 | struct vxge_hw_mempool_dma *dma_object; | 1254 | struct vxge_hw_mempool_dma *dma_object; |
1096 | 1255 | ||
@@ -1252,7 +1411,7 @@ exit: | |||
1252 | * This function creates Ring and initializes it. | 1411 | * This function creates Ring and initializes it. |
1253 | * | 1412 | * |
1254 | */ | 1413 | */ |
1255 | enum vxge_hw_status | 1414 | static enum vxge_hw_status |
1256 | __vxge_hw_ring_create(struct __vxge_hw_vpath_handle *vp, | 1415 | __vxge_hw_ring_create(struct __vxge_hw_vpath_handle *vp, |
1257 | struct vxge_hw_ring_attr *attr) | 1416 | struct vxge_hw_ring_attr *attr) |
1258 | { | 1417 | { |
@@ -1363,7 +1522,7 @@ exit: | |||
1363 | * __vxge_hw_ring_abort - Returns the RxD | 1522 | * __vxge_hw_ring_abort - Returns the RxD |
1364 | * This function terminates the RxDs of ring | 1523 | * This function terminates the RxDs of ring |
1365 | */ | 1524 | */ |
1366 | enum vxge_hw_status __vxge_hw_ring_abort(struct __vxge_hw_ring *ring) | 1525 | static enum vxge_hw_status __vxge_hw_ring_abort(struct __vxge_hw_ring *ring) |
1367 | { | 1526 | { |
1368 | void *rxdh; | 1527 | void *rxdh; |
1369 | struct __vxge_hw_channel *channel; | 1528 | struct __vxge_hw_channel *channel; |
@@ -1392,7 +1551,7 @@ enum vxge_hw_status __vxge_hw_ring_abort(struct __vxge_hw_ring *ring) | |||
1392 | * __vxge_hw_ring_reset - Resets the ring | 1551 | * __vxge_hw_ring_reset - Resets the ring |
1393 | * This function resets the ring during vpath reset operation | 1552 | * This function resets the ring during vpath reset operation |
1394 | */ | 1553 | */ |
1395 | enum vxge_hw_status __vxge_hw_ring_reset(struct __vxge_hw_ring *ring) | 1554 | static enum vxge_hw_status __vxge_hw_ring_reset(struct __vxge_hw_ring *ring) |
1396 | { | 1555 | { |
1397 | enum vxge_hw_status status = VXGE_HW_OK; | 1556 | enum vxge_hw_status status = VXGE_HW_OK; |
1398 | struct __vxge_hw_channel *channel; | 1557 | struct __vxge_hw_channel *channel; |
@@ -1419,7 +1578,7 @@ exit: | |||
1419 | * __vxge_hw_ring_delete - Removes the ring | 1578 | * __vxge_hw_ring_delete - Removes the ring |
1420 | * This function freeup the memory pool and removes the ring | 1579 | * This function freeup the memory pool and removes the ring |
1421 | */ | 1580 | */ |
1422 | enum vxge_hw_status __vxge_hw_ring_delete(struct __vxge_hw_vpath_handle *vp) | 1581 | static enum vxge_hw_status __vxge_hw_ring_delete(struct __vxge_hw_vpath_handle *vp) |
1423 | { | 1582 | { |
1424 | struct __vxge_hw_ring *ring = vp->vpath->ringh; | 1583 | struct __vxge_hw_ring *ring = vp->vpath->ringh; |
1425 | 1584 | ||
@@ -1438,7 +1597,7 @@ enum vxge_hw_status __vxge_hw_ring_delete(struct __vxge_hw_vpath_handle *vp) | |||
1438 | * __vxge_hw_mempool_grow | 1597 | * __vxge_hw_mempool_grow |
1439 | * Will resize mempool up to %num_allocate value. | 1598 | * Will resize mempool up to %num_allocate value. |
1440 | */ | 1599 | */ |
1441 | enum vxge_hw_status | 1600 | static enum vxge_hw_status |
1442 | __vxge_hw_mempool_grow(struct vxge_hw_mempool *mempool, u32 num_allocate, | 1601 | __vxge_hw_mempool_grow(struct vxge_hw_mempool *mempool, u32 num_allocate, |
1443 | u32 *num_allocated) | 1602 | u32 *num_allocated) |
1444 | { | 1603 | { |
@@ -1527,7 +1686,7 @@ exit: | |||
1527 | * with size enough to hold %items_initial number of items. Memory is | 1686 | * with size enough to hold %items_initial number of items. Memory is |
1528 | * DMA-able but client must map/unmap before interoperating with the device. | 1687 | * DMA-able but client must map/unmap before interoperating with the device. |
1529 | */ | 1688 | */ |
1530 | struct vxge_hw_mempool* | 1689 | static struct vxge_hw_mempool* |
1531 | __vxge_hw_mempool_create( | 1690 | __vxge_hw_mempool_create( |
1532 | struct __vxge_hw_device *devh, | 1691 | struct __vxge_hw_device *devh, |
1533 | u32 memblock_size, | 1692 | u32 memblock_size, |
@@ -1644,7 +1803,7 @@ exit: | |||
1644 | /* | 1803 | /* |
1645 | * vxge_hw_mempool_destroy | 1804 | * vxge_hw_mempool_destroy |
1646 | */ | 1805 | */ |
1647 | void __vxge_hw_mempool_destroy(struct vxge_hw_mempool *mempool) | 1806 | static void __vxge_hw_mempool_destroy(struct vxge_hw_mempool *mempool) |
1648 | { | 1807 | { |
1649 | u32 i, j; | 1808 | u32 i, j; |
1650 | struct __vxge_hw_device *devh = mempool->devh; | 1809 | struct __vxge_hw_device *devh = mempool->devh; |
@@ -1700,7 +1859,7 @@ __vxge_hw_device_fifo_config_check(struct vxge_hw_fifo_config *fifo_config) | |||
1700 | * __vxge_hw_device_vpath_config_check - Check vpath configuration. | 1859 | * __vxge_hw_device_vpath_config_check - Check vpath configuration. |
1701 | * Check the vpath configuration | 1860 | * Check the vpath configuration |
1702 | */ | 1861 | */ |
1703 | enum vxge_hw_status | 1862 | static enum vxge_hw_status |
1704 | __vxge_hw_device_vpath_config_check(struct vxge_hw_vp_config *vp_config) | 1863 | __vxge_hw_device_vpath_config_check(struct vxge_hw_vp_config *vp_config) |
1705 | { | 1864 | { |
1706 | enum vxge_hw_status status; | 1865 | enum vxge_hw_status status; |
@@ -1922,7 +2081,7 @@ vxge_hw_device_config_default_get(struct vxge_hw_device_config *device_config) | |||
1922 | * _hw_legacy_swapper_set - Set the swapper bits for the legacy secion. | 2081 | * _hw_legacy_swapper_set - Set the swapper bits for the legacy secion. |
1923 | * Set the swapper bits appropriately for the lagacy section. | 2082 | * Set the swapper bits appropriately for the lagacy section. |
1924 | */ | 2083 | */ |
1925 | enum vxge_hw_status | 2084 | static enum vxge_hw_status |
1926 | __vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg) | 2085 | __vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg) |
1927 | { | 2086 | { |
1928 | u64 val64; | 2087 | u64 val64; |
@@ -1977,7 +2136,7 @@ __vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg) | |||
1977 | * __vxge_hw_vpath_swapper_set - Set the swapper bits for the vpath. | 2136 | * __vxge_hw_vpath_swapper_set - Set the swapper bits for the vpath. |
1978 | * Set the swapper bits appropriately for the vpath. | 2137 | * Set the swapper bits appropriately for the vpath. |
1979 | */ | 2138 | */ |
1980 | enum vxge_hw_status | 2139 | static enum vxge_hw_status |
1981 | __vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg) | 2140 | __vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg) |
1982 | { | 2141 | { |
1983 | #ifndef __BIG_ENDIAN | 2142 | #ifndef __BIG_ENDIAN |
@@ -1996,7 +2155,7 @@ __vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg) | |||
1996 | * __vxge_hw_kdfc_swapper_set - Set the swapper bits for the kdfc. | 2155 | * __vxge_hw_kdfc_swapper_set - Set the swapper bits for the kdfc. |
1997 | * Set the swapper bits appropriately for the vpath. | 2156 | * Set the swapper bits appropriately for the vpath. |
1998 | */ | 2157 | */ |
1999 | enum vxge_hw_status | 2158 | static enum vxge_hw_status |
2000 | __vxge_hw_kdfc_swapper_set( | 2159 | __vxge_hw_kdfc_swapper_set( |
2001 | struct vxge_hw_legacy_reg __iomem *legacy_reg, | 2160 | struct vxge_hw_legacy_reg __iomem *legacy_reg, |
2002 | struct vxge_hw_vpath_reg __iomem *vpath_reg) | 2161 | struct vxge_hw_vpath_reg __iomem *vpath_reg) |
@@ -2021,28 +2180,6 @@ __vxge_hw_kdfc_swapper_set( | |||
2021 | } | 2180 | } |
2022 | 2181 | ||
2023 | /* | 2182 | /* |
2024 | * vxge_hw_mgmt_device_config - Retrieve device configuration. | ||
2025 | * Get device configuration. Permits to retrieve at run-time configuration | ||
2026 | * values that were used to initialize and configure the device. | ||
2027 | */ | ||
2028 | enum vxge_hw_status | ||
2029 | vxge_hw_mgmt_device_config(struct __vxge_hw_device *hldev, | ||
2030 | struct vxge_hw_device_config *dev_config, int size) | ||
2031 | { | ||
2032 | |||
2033 | if ((hldev == NULL) || (hldev->magic != VXGE_HW_DEVICE_MAGIC)) | ||
2034 | return VXGE_HW_ERR_INVALID_DEVICE; | ||
2035 | |||
2036 | if (size != sizeof(struct vxge_hw_device_config)) | ||
2037 | return VXGE_HW_ERR_VERSION_CONFLICT; | ||
2038 | |||
2039 | memcpy(dev_config, &hldev->config, | ||
2040 | sizeof(struct vxge_hw_device_config)); | ||
2041 | |||
2042 | return VXGE_HW_OK; | ||
2043 | } | ||
2044 | |||
2045 | /* | ||
2046 | * vxge_hw_mgmt_reg_read - Read Titan register. | 2183 | * vxge_hw_mgmt_reg_read - Read Titan register. |
2047 | */ | 2184 | */ |
2048 | enum vxge_hw_status | 2185 | enum vxge_hw_status |
@@ -2438,7 +2575,7 @@ exit: | |||
2438 | * __vxge_hw_fifo_abort - Returns the TxD | 2575 | * __vxge_hw_fifo_abort - Returns the TxD |
2439 | * This function terminates the TxDs of fifo | 2576 | * This function terminates the TxDs of fifo |
2440 | */ | 2577 | */ |
2441 | enum vxge_hw_status __vxge_hw_fifo_abort(struct __vxge_hw_fifo *fifo) | 2578 | static enum vxge_hw_status __vxge_hw_fifo_abort(struct __vxge_hw_fifo *fifo) |
2442 | { | 2579 | { |
2443 | void *txdlh; | 2580 | void *txdlh; |
2444 | 2581 | ||
@@ -2466,7 +2603,7 @@ enum vxge_hw_status __vxge_hw_fifo_abort(struct __vxge_hw_fifo *fifo) | |||
2466 | * __vxge_hw_fifo_reset - Resets the fifo | 2603 | * __vxge_hw_fifo_reset - Resets the fifo |
2467 | * This function resets the fifo during vpath reset operation | 2604 | * This function resets the fifo during vpath reset operation |
2468 | */ | 2605 | */ |
2469 | enum vxge_hw_status __vxge_hw_fifo_reset(struct __vxge_hw_fifo *fifo) | 2606 | static enum vxge_hw_status __vxge_hw_fifo_reset(struct __vxge_hw_fifo *fifo) |
2470 | { | 2607 | { |
2471 | enum vxge_hw_status status = VXGE_HW_OK; | 2608 | enum vxge_hw_status status = VXGE_HW_OK; |
2472 | 2609 | ||
@@ -2501,7 +2638,7 @@ enum vxge_hw_status __vxge_hw_fifo_delete(struct __vxge_hw_vpath_handle *vp) | |||
2501 | * in pci config space. | 2638 | * in pci config space. |
2502 | * Read from the vpath pci config space. | 2639 | * Read from the vpath pci config space. |
2503 | */ | 2640 | */ |
2504 | enum vxge_hw_status | 2641 | static enum vxge_hw_status |
2505 | __vxge_hw_vpath_pci_read(struct __vxge_hw_virtualpath *vpath, | 2642 | __vxge_hw_vpath_pci_read(struct __vxge_hw_virtualpath *vpath, |
2506 | u32 phy_func_0, u32 offset, u32 *val) | 2643 | u32 phy_func_0, u32 offset, u32 *val) |
2507 | { | 2644 | { |
@@ -2542,7 +2679,7 @@ exit: | |||
2542 | * __vxge_hw_vpath_func_id_get - Get the function id of the vpath. | 2679 | * __vxge_hw_vpath_func_id_get - Get the function id of the vpath. |
2543 | * Returns the function number of the vpath. | 2680 | * Returns the function number of the vpath. |
2544 | */ | 2681 | */ |
2545 | u32 | 2682 | static u32 |
2546 | __vxge_hw_vpath_func_id_get(u32 vp_id, | 2683 | __vxge_hw_vpath_func_id_get(u32 vp_id, |
2547 | struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg) | 2684 | struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg) |
2548 | { | 2685 | { |
@@ -2573,7 +2710,7 @@ __vxge_hw_read_rts_ds(struct vxge_hw_vpath_reg __iomem *vpath_reg, | |||
2573 | * __vxge_hw_vpath_card_info_get - Get the serial numbers, | 2710 | * __vxge_hw_vpath_card_info_get - Get the serial numbers, |
2574 | * part number and product description. | 2711 | * part number and product description. |
2575 | */ | 2712 | */ |
2576 | enum vxge_hw_status | 2713 | static enum vxge_hw_status |
2577 | __vxge_hw_vpath_card_info_get( | 2714 | __vxge_hw_vpath_card_info_get( |
2578 | u32 vp_id, | 2715 | u32 vp_id, |
2579 | struct vxge_hw_vpath_reg __iomem *vpath_reg, | 2716 | struct vxge_hw_vpath_reg __iomem *vpath_reg, |
@@ -2695,7 +2832,7 @@ __vxge_hw_vpath_card_info_get( | |||
2695 | * __vxge_hw_vpath_fw_ver_get - Get the fw version | 2832 | * __vxge_hw_vpath_fw_ver_get - Get the fw version |
2696 | * Returns FW Version | 2833 | * Returns FW Version |
2697 | */ | 2834 | */ |
2698 | enum vxge_hw_status | 2835 | static enum vxge_hw_status |
2699 | __vxge_hw_vpath_fw_ver_get( | 2836 | __vxge_hw_vpath_fw_ver_get( |
2700 | u32 vp_id, | 2837 | u32 vp_id, |
2701 | struct vxge_hw_vpath_reg __iomem *vpath_reg, | 2838 | struct vxge_hw_vpath_reg __iomem *vpath_reg, |
@@ -2789,7 +2926,7 @@ exit: | |||
2789 | * __vxge_hw_vpath_pci_func_mode_get - Get the pci mode | 2926 | * __vxge_hw_vpath_pci_func_mode_get - Get the pci mode |
2790 | * Returns pci function mode | 2927 | * Returns pci function mode |
2791 | */ | 2928 | */ |
2792 | u64 | 2929 | static u64 |
2793 | __vxge_hw_vpath_pci_func_mode_get( | 2930 | __vxge_hw_vpath_pci_func_mode_get( |
2794 | u32 vp_id, | 2931 | u32 vp_id, |
2795 | struct vxge_hw_vpath_reg __iomem *vpath_reg) | 2932 | struct vxge_hw_vpath_reg __iomem *vpath_reg) |
@@ -2995,7 +3132,7 @@ exit: | |||
2995 | * __vxge_hw_vpath_addr_get - Get the hw address entry for this vpath | 3132 | * __vxge_hw_vpath_addr_get - Get the hw address entry for this vpath |
2996 | * from MAC address table. | 3133 | * from MAC address table. |
2997 | */ | 3134 | */ |
2998 | enum vxge_hw_status | 3135 | static enum vxge_hw_status |
2999 | __vxge_hw_vpath_addr_get( | 3136 | __vxge_hw_vpath_addr_get( |
3000 | u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg, | 3137 | u32 vp_id, struct vxge_hw_vpath_reg __iomem *vpath_reg, |
3001 | u8 (macaddr)[ETH_ALEN], u8 (macaddr_mask)[ETH_ALEN]) | 3138 | u8 (macaddr)[ETH_ALEN], u8 (macaddr_mask)[ETH_ALEN]) |
@@ -3347,7 +3484,7 @@ __vxge_hw_vpath_mgmt_read( | |||
3347 | * This routine checks the vpath_rst_in_prog register to see if | 3484 | * This routine checks the vpath_rst_in_prog register to see if |
3348 | * adapter completed the reset process for the vpath | 3485 | * adapter completed the reset process for the vpath |
3349 | */ | 3486 | */ |
3350 | enum vxge_hw_status | 3487 | static enum vxge_hw_status |
3351 | __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath) | 3488 | __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath) |
3352 | { | 3489 | { |
3353 | enum vxge_hw_status status; | 3490 | enum vxge_hw_status status; |
@@ -3365,7 +3502,7 @@ __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath) | |||
3365 | * __vxge_hw_vpath_reset | 3502 | * __vxge_hw_vpath_reset |
3366 | * This routine resets the vpath on the device | 3503 | * This routine resets the vpath on the device |
3367 | */ | 3504 | */ |
3368 | enum vxge_hw_status | 3505 | static enum vxge_hw_status |
3369 | __vxge_hw_vpath_reset(struct __vxge_hw_device *hldev, u32 vp_id) | 3506 | __vxge_hw_vpath_reset(struct __vxge_hw_device *hldev, u32 vp_id) |
3370 | { | 3507 | { |
3371 | u64 val64; | 3508 | u64 val64; |
@@ -3383,7 +3520,7 @@ __vxge_hw_vpath_reset(struct __vxge_hw_device *hldev, u32 vp_id) | |||
3383 | * __vxge_hw_vpath_sw_reset | 3520 | * __vxge_hw_vpath_sw_reset |
3384 | * This routine resets the vpath structures | 3521 | * This routine resets the vpath structures |
3385 | */ | 3522 | */ |
3386 | enum vxge_hw_status | 3523 | static enum vxge_hw_status |
3387 | __vxge_hw_vpath_sw_reset(struct __vxge_hw_device *hldev, u32 vp_id) | 3524 | __vxge_hw_vpath_sw_reset(struct __vxge_hw_device *hldev, u32 vp_id) |
3388 | { | 3525 | { |
3389 | enum vxge_hw_status status = VXGE_HW_OK; | 3526 | enum vxge_hw_status status = VXGE_HW_OK; |
@@ -3408,7 +3545,7 @@ exit: | |||
3408 | * This routine configures the prc registers of virtual path using the config | 3545 | * This routine configures the prc registers of virtual path using the config |
3409 | * passed | 3546 | * passed |
3410 | */ | 3547 | */ |
3411 | void | 3548 | static void |
3412 | __vxge_hw_vpath_prc_configure(struct __vxge_hw_device *hldev, u32 vp_id) | 3549 | __vxge_hw_vpath_prc_configure(struct __vxge_hw_device *hldev, u32 vp_id) |
3413 | { | 3550 | { |
3414 | u64 val64; | 3551 | u64 val64; |
@@ -3480,7 +3617,7 @@ __vxge_hw_vpath_prc_configure(struct __vxge_hw_device *hldev, u32 vp_id) | |||
3480 | * This routine configures the kdfc registers of virtual path using the | 3617 | * This routine configures the kdfc registers of virtual path using the |
3481 | * config passed | 3618 | * config passed |
3482 | */ | 3619 | */ |
3483 | enum vxge_hw_status | 3620 | static enum vxge_hw_status |
3484 | __vxge_hw_vpath_kdfc_configure(struct __vxge_hw_device *hldev, u32 vp_id) | 3621 | __vxge_hw_vpath_kdfc_configure(struct __vxge_hw_device *hldev, u32 vp_id) |
3485 | { | 3622 | { |
3486 | u64 val64; | 3623 | u64 val64; |
@@ -3553,7 +3690,7 @@ exit: | |||
3553 | * __vxge_hw_vpath_mac_configure | 3690 | * __vxge_hw_vpath_mac_configure |
3554 | * This routine configures the mac of virtual path using the config passed | 3691 | * This routine configures the mac of virtual path using the config passed |
3555 | */ | 3692 | */ |
3556 | enum vxge_hw_status | 3693 | static enum vxge_hw_status |
3557 | __vxge_hw_vpath_mac_configure(struct __vxge_hw_device *hldev, u32 vp_id) | 3694 | __vxge_hw_vpath_mac_configure(struct __vxge_hw_device *hldev, u32 vp_id) |
3558 | { | 3695 | { |
3559 | u64 val64; | 3696 | u64 val64; |
@@ -3621,7 +3758,7 @@ __vxge_hw_vpath_mac_configure(struct __vxge_hw_device *hldev, u32 vp_id) | |||
3621 | * This routine configures the tim registers of virtual path using the config | 3758 | * This routine configures the tim registers of virtual path using the config |
3622 | * passed | 3759 | * passed |
3623 | */ | 3760 | */ |
3624 | enum vxge_hw_status | 3761 | static enum vxge_hw_status |
3625 | __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id) | 3762 | __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id) |
3626 | { | 3763 | { |
3627 | u64 val64; | 3764 | u64 val64; |
@@ -3897,7 +4034,7 @@ vxge_hw_vpath_tti_ci_set(struct __vxge_hw_device *hldev, u32 vp_id) | |||
3897 | * This routine is the final phase of init which initializes the | 4034 | * This routine is the final phase of init which initializes the |
3898 | * registers of the vpath using the configuration passed. | 4035 | * registers of the vpath using the configuration passed. |
3899 | */ | 4036 | */ |
3900 | enum vxge_hw_status | 4037 | static enum vxge_hw_status |
3901 | __vxge_hw_vpath_initialize(struct __vxge_hw_device *hldev, u32 vp_id) | 4038 | __vxge_hw_vpath_initialize(struct __vxge_hw_device *hldev, u32 vp_id) |
3902 | { | 4039 | { |
3903 | u64 val64; | 4040 | u64 val64; |
@@ -3966,7 +4103,7 @@ exit: | |||
3966 | * This routine is the initial phase of init which resets the vpath and | 4103 | * This routine is the initial phase of init which resets the vpath and |
3967 | * initializes the software support structures. | 4104 | * initializes the software support structures. |
3968 | */ | 4105 | */ |
3969 | enum vxge_hw_status | 4106 | static enum vxge_hw_status |
3970 | __vxge_hw_vp_initialize(struct __vxge_hw_device *hldev, u32 vp_id, | 4107 | __vxge_hw_vp_initialize(struct __vxge_hw_device *hldev, u32 vp_id, |
3971 | struct vxge_hw_vp_config *config) | 4108 | struct vxge_hw_vp_config *config) |
3972 | { | 4109 | { |
@@ -4022,7 +4159,7 @@ exit: | |||
4022 | * __vxge_hw_vp_terminate - Terminate Virtual Path structure | 4159 | * __vxge_hw_vp_terminate - Terminate Virtual Path structure |
4023 | * This routine closes all channels it opened and freeup memory | 4160 | * This routine closes all channels it opened and freeup memory |
4024 | */ | 4161 | */ |
4025 | void | 4162 | static void |
4026 | __vxge_hw_vp_terminate(struct __vxge_hw_device *hldev, u32 vp_id) | 4163 | __vxge_hw_vp_terminate(struct __vxge_hw_device *hldev, u32 vp_id) |
4027 | { | 4164 | { |
4028 | struct __vxge_hw_virtualpath *vpath; | 4165 | struct __vxge_hw_virtualpath *vpath; |
@@ -4384,7 +4521,7 @@ vxge_hw_vpath_enable(struct __vxge_hw_vpath_handle *vp) | |||
4384 | * Enable the DMA vpath statistics. The function is to be called to re-enable | 4521 | * Enable the DMA vpath statistics. The function is to be called to re-enable |
4385 | * the adapter to update stats into the host memory | 4522 | * the adapter to update stats into the host memory |
4386 | */ | 4523 | */ |
4387 | enum vxge_hw_status | 4524 | static enum vxge_hw_status |
4388 | vxge_hw_vpath_stats_enable(struct __vxge_hw_vpath_handle *vp) | 4525 | vxge_hw_vpath_stats_enable(struct __vxge_hw_vpath_handle *vp) |
4389 | { | 4526 | { |
4390 | enum vxge_hw_status status = VXGE_HW_OK; | 4527 | enum vxge_hw_status status = VXGE_HW_OK; |
@@ -4409,7 +4546,7 @@ exit: | |||
4409 | * __vxge_hw_vpath_stats_access - Get the statistics from the given location | 4546 | * __vxge_hw_vpath_stats_access - Get the statistics from the given location |
4410 | * and offset and perform an operation | 4547 | * and offset and perform an operation |
4411 | */ | 4548 | */ |
4412 | enum vxge_hw_status | 4549 | static enum vxge_hw_status |
4413 | __vxge_hw_vpath_stats_access(struct __vxge_hw_virtualpath *vpath, | 4550 | __vxge_hw_vpath_stats_access(struct __vxge_hw_virtualpath *vpath, |
4414 | u32 operation, u32 offset, u64 *stat) | 4551 | u32 operation, u32 offset, u64 *stat) |
4415 | { | 4552 | { |
@@ -4445,7 +4582,7 @@ vpath_stats_access_exit: | |||
4445 | /* | 4582 | /* |
4446 | * __vxge_hw_vpath_xmac_tx_stats_get - Get the TX Statistics of a vpath | 4583 | * __vxge_hw_vpath_xmac_tx_stats_get - Get the TX Statistics of a vpath |
4447 | */ | 4584 | */ |
4448 | enum vxge_hw_status | 4585 | static enum vxge_hw_status |
4449 | __vxge_hw_vpath_xmac_tx_stats_get( | 4586 | __vxge_hw_vpath_xmac_tx_stats_get( |
4450 | struct __vxge_hw_virtualpath *vpath, | 4587 | struct __vxge_hw_virtualpath *vpath, |
4451 | struct vxge_hw_xmac_vpath_tx_stats *vpath_tx_stats) | 4588 | struct vxge_hw_xmac_vpath_tx_stats *vpath_tx_stats) |
@@ -4478,9 +4615,9 @@ exit: | |||
4478 | /* | 4615 | /* |
4479 | * __vxge_hw_vpath_xmac_rx_stats_get - Get the RX Statistics of a vpath | 4616 | * __vxge_hw_vpath_xmac_rx_stats_get - Get the RX Statistics of a vpath |
4480 | */ | 4617 | */ |
4481 | enum vxge_hw_status | 4618 | static enum vxge_hw_status |
4482 | __vxge_hw_vpath_xmac_rx_stats_get(struct __vxge_hw_virtualpath *vpath, | 4619 | __vxge_hw_vpath_xmac_rx_stats_get(struct __vxge_hw_virtualpath *vpath, |
4483 | struct vxge_hw_xmac_vpath_rx_stats *vpath_rx_stats) | 4620 | struct vxge_hw_xmac_vpath_rx_stats *vpath_rx_stats) |
4484 | { | 4621 | { |
4485 | u64 *val64; | 4622 | u64 *val64; |
4486 | enum vxge_hw_status status = VXGE_HW_OK; | 4623 | enum vxge_hw_status status = VXGE_HW_OK; |
@@ -4509,9 +4646,9 @@ exit: | |||
4509 | /* | 4646 | /* |
4510 | * __vxge_hw_vpath_stats_get - Get the vpath hw statistics. | 4647 | * __vxge_hw_vpath_stats_get - Get the vpath hw statistics. |
4511 | */ | 4648 | */ |
4512 | enum vxge_hw_status __vxge_hw_vpath_stats_get( | 4649 | static enum vxge_hw_status |
4513 | struct __vxge_hw_virtualpath *vpath, | 4650 | __vxge_hw_vpath_stats_get(struct __vxge_hw_virtualpath *vpath, |
4514 | struct vxge_hw_vpath_stats_hw_info *hw_stats) | 4651 | struct vxge_hw_vpath_stats_hw_info *hw_stats) |
4515 | { | 4652 | { |
4516 | u64 val64; | 4653 | u64 val64; |
4517 | enum vxge_hw_status status = VXGE_HW_OK; | 4654 | enum vxge_hw_status status = VXGE_HW_OK; |
@@ -4643,6 +4780,32 @@ exit: | |||
4643 | return status; | 4780 | return status; |
4644 | } | 4781 | } |
4645 | 4782 | ||
4783 | |||
4784 | static void vxge_os_dma_malloc_async(struct pci_dev *pdev, void *devh, | ||
4785 | unsigned long size) | ||
4786 | { | ||
4787 | gfp_t flags; | ||
4788 | void *vaddr; | ||
4789 | |||
4790 | if (in_interrupt()) | ||
4791 | flags = GFP_ATOMIC | GFP_DMA; | ||
4792 | else | ||
4793 | flags = GFP_KERNEL | GFP_DMA; | ||
4794 | |||
4795 | vaddr = kmalloc((size), flags); | ||
4796 | |||
4797 | vxge_hw_blockpool_block_add(devh, vaddr, size, pdev, pdev); | ||
4798 | } | ||
4799 | |||
4800 | static void vxge_os_dma_free(struct pci_dev *pdev, const void *vaddr, | ||
4801 | struct pci_dev **p_dma_acch) | ||
4802 | { | ||
4803 | unsigned long misaligned = *(unsigned long *)p_dma_acch; | ||
4804 | u8 *tmp = (u8 *)vaddr; | ||
4805 | tmp -= misaligned; | ||
4806 | kfree((void *)tmp); | ||
4807 | } | ||
4808 | |||
4646 | /* | 4809 | /* |
4647 | * __vxge_hw_blockpool_create - Create block pool | 4810 | * __vxge_hw_blockpool_create - Create block pool |
4648 | */ | 4811 | */ |
@@ -4845,12 +5008,11 @@ void __vxge_hw_blockpool_blocks_remove(struct __vxge_hw_blockpool *blockpool) | |||
4845 | * vxge_hw_blockpool_block_add - callback for vxge_os_dma_malloc_async | 5008 | * vxge_hw_blockpool_block_add - callback for vxge_os_dma_malloc_async |
4846 | * Adds a block to block pool | 5009 | * Adds a block to block pool |
4847 | */ | 5010 | */ |
4848 | void vxge_hw_blockpool_block_add( | 5011 | static void vxge_hw_blockpool_block_add(struct __vxge_hw_device *devh, |
4849 | struct __vxge_hw_device *devh, | 5012 | void *block_addr, |
4850 | void *block_addr, | 5013 | u32 length, |
4851 | u32 length, | 5014 | struct pci_dev *dma_h, |
4852 | struct pci_dev *dma_h, | 5015 | struct pci_dev *acc_handle) |
4853 | struct pci_dev *acc_handle) | ||
4854 | { | 5016 | { |
4855 | struct __vxge_hw_blockpool *blockpool; | 5017 | struct __vxge_hw_blockpool *blockpool; |
4856 | struct __vxge_hw_blockpool_entry *entry = NULL; | 5018 | struct __vxge_hw_blockpool_entry *entry = NULL; |
diff --git a/drivers/net/vxge/vxge-config.h b/drivers/net/vxge/vxge-config.h index 1a94343023cb..5c00861b6c2c 100644 --- a/drivers/net/vxge/vxge-config.h +++ b/drivers/net/vxge/vxge-config.h | |||
@@ -183,11 +183,6 @@ struct vxge_hw_device_version { | |||
183 | char version[VXGE_HW_FW_STRLEN]; | 183 | char version[VXGE_HW_FW_STRLEN]; |
184 | }; | 184 | }; |
185 | 185 | ||
186 | u64 | ||
187 | __vxge_hw_vpath_pci_func_mode_get( | ||
188 | u32 vp_id, | ||
189 | struct vxge_hw_vpath_reg __iomem *vpath_reg); | ||
190 | |||
191 | /** | 186 | /** |
192 | * struct vxge_hw_fifo_config - Configuration of fifo. | 187 | * struct vxge_hw_fifo_config - Configuration of fifo. |
193 | * @enable: Is this fifo to be commissioned | 188 | * @enable: Is this fifo to be commissioned |
@@ -1426,9 +1421,6 @@ struct vxge_hw_rth_hash_types { | |||
1426 | u8 hash_type_ipv6ex_en; | 1421 | u8 hash_type_ipv6ex_en; |
1427 | }; | 1422 | }; |
1428 | 1423 | ||
1429 | u32 | ||
1430 | vxge_hw_device_debug_mask_get(struct __vxge_hw_device *devh); | ||
1431 | |||
1432 | void vxge_hw_device_debug_set( | 1424 | void vxge_hw_device_debug_set( |
1433 | struct __vxge_hw_device *devh, | 1425 | struct __vxge_hw_device *devh, |
1434 | enum vxge_debug_level level, | 1426 | enum vxge_debug_level level, |
@@ -1440,9 +1432,6 @@ vxge_hw_device_error_level_get(struct __vxge_hw_device *devh); | |||
1440 | u32 | 1432 | u32 |
1441 | vxge_hw_device_trace_level_get(struct __vxge_hw_device *devh); | 1433 | vxge_hw_device_trace_level_get(struct __vxge_hw_device *devh); |
1442 | 1434 | ||
1443 | u32 | ||
1444 | vxge_hw_device_debug_mask_get(struct __vxge_hw_device *devh); | ||
1445 | |||
1446 | /** | 1435 | /** |
1447 | * vxge_hw_ring_rxd_size_get - Get the size of ring descriptor. | 1436 | * vxge_hw_ring_rxd_size_get - Get the size of ring descriptor. |
1448 | * @buf_mode: Buffer mode (1, 3 or 5) | 1437 | * @buf_mode: Buffer mode (1, 3 or 5) |
@@ -1817,60 +1806,10 @@ struct vxge_hw_vpath_attr { | |||
1817 | struct vxge_hw_fifo_attr fifo_attr; | 1806 | struct vxge_hw_fifo_attr fifo_attr; |
1818 | }; | 1807 | }; |
1819 | 1808 | ||
1820 | enum vxge_hw_status | ||
1821 | __vxge_hw_blockpool_create(struct __vxge_hw_device *hldev, | ||
1822 | struct __vxge_hw_blockpool *blockpool, | ||
1823 | u32 pool_size, | ||
1824 | u32 pool_max); | ||
1825 | |||
1826 | void | ||
1827 | __vxge_hw_blockpool_destroy(struct __vxge_hw_blockpool *blockpool); | ||
1828 | |||
1829 | struct __vxge_hw_blockpool_entry * | ||
1830 | __vxge_hw_blockpool_block_allocate(struct __vxge_hw_device *hldev, | ||
1831 | u32 size); | ||
1832 | |||
1833 | void | ||
1834 | __vxge_hw_blockpool_block_free(struct __vxge_hw_device *hldev, | ||
1835 | struct __vxge_hw_blockpool_entry *entry); | ||
1836 | |||
1837 | void * | ||
1838 | __vxge_hw_blockpool_malloc(struct __vxge_hw_device *hldev, | ||
1839 | u32 size, | ||
1840 | struct vxge_hw_mempool_dma *dma_object); | ||
1841 | |||
1842 | void | ||
1843 | __vxge_hw_blockpool_free(struct __vxge_hw_device *hldev, | ||
1844 | void *memblock, | ||
1845 | u32 size, | ||
1846 | struct vxge_hw_mempool_dma *dma_object); | ||
1847 | |||
1848 | enum vxge_hw_status | ||
1849 | __vxge_hw_device_fifo_config_check(struct vxge_hw_fifo_config *fifo_config); | ||
1850 | |||
1851 | enum vxge_hw_status | ||
1852 | __vxge_hw_device_config_check(struct vxge_hw_device_config *new_config); | ||
1853 | |||
1854 | enum vxge_hw_status | ||
1855 | vxge_hw_mgmt_device_config(struct __vxge_hw_device *devh, | ||
1856 | struct vxge_hw_device_config *dev_config, int size); | ||
1857 | |||
1858 | enum vxge_hw_status __devinit vxge_hw_device_hw_info_get( | 1809 | enum vxge_hw_status __devinit vxge_hw_device_hw_info_get( |
1859 | void __iomem *bar0, | 1810 | void __iomem *bar0, |
1860 | struct vxge_hw_device_hw_info *hw_info); | 1811 | struct vxge_hw_device_hw_info *hw_info); |
1861 | 1812 | ||
1862 | enum vxge_hw_status | ||
1863 | __vxge_hw_vpath_fw_ver_get( | ||
1864 | u32 vp_id, | ||
1865 | struct vxge_hw_vpath_reg __iomem *vpath_reg, | ||
1866 | struct vxge_hw_device_hw_info *hw_info); | ||
1867 | |||
1868 | enum vxge_hw_status | ||
1869 | __vxge_hw_vpath_card_info_get( | ||
1870 | u32 vp_id, | ||
1871 | struct vxge_hw_vpath_reg __iomem *vpath_reg, | ||
1872 | struct vxge_hw_device_hw_info *hw_info); | ||
1873 | |||
1874 | enum vxge_hw_status __devinit vxge_hw_device_config_default_get( | 1813 | enum vxge_hw_status __devinit vxge_hw_device_config_default_get( |
1875 | struct vxge_hw_device_config *device_config); | 1814 | struct vxge_hw_device_config *device_config); |
1876 | 1815 | ||
@@ -1954,38 +1893,6 @@ out: | |||
1954 | return vaddr; | 1893 | return vaddr; |
1955 | } | 1894 | } |
1956 | 1895 | ||
1957 | extern void vxge_hw_blockpool_block_add( | ||
1958 | struct __vxge_hw_device *devh, | ||
1959 | void *block_addr, | ||
1960 | u32 length, | ||
1961 | struct pci_dev *dma_h, | ||
1962 | struct pci_dev *acc_handle); | ||
1963 | |||
1964 | static inline void vxge_os_dma_malloc_async(struct pci_dev *pdev, void *devh, | ||
1965 | unsigned long size) | ||
1966 | { | ||
1967 | gfp_t flags; | ||
1968 | void *vaddr; | ||
1969 | |||
1970 | if (in_interrupt()) | ||
1971 | flags = GFP_ATOMIC | GFP_DMA; | ||
1972 | else | ||
1973 | flags = GFP_KERNEL | GFP_DMA; | ||
1974 | |||
1975 | vaddr = kmalloc((size), flags); | ||
1976 | |||
1977 | vxge_hw_blockpool_block_add(devh, vaddr, size, pdev, pdev); | ||
1978 | } | ||
1979 | |||
1980 | static inline void vxge_os_dma_free(struct pci_dev *pdev, const void *vaddr, | ||
1981 | struct pci_dev **p_dma_acch) | ||
1982 | { | ||
1983 | unsigned long misaligned = *(unsigned long *)p_dma_acch; | ||
1984 | u8 *tmp = (u8 *)vaddr; | ||
1985 | tmp -= misaligned; | ||
1986 | kfree((void *)tmp); | ||
1987 | } | ||
1988 | |||
1989 | /* | 1896 | /* |
1990 | * __vxge_hw_mempool_item_priv - will return pointer on per item private space | 1897 | * __vxge_hw_mempool_item_priv - will return pointer on per item private space |
1991 | */ | 1898 | */ |
@@ -2010,40 +1917,6 @@ __vxge_hw_mempool_item_priv( | |||
2010 | (*memblock_item_idx) * mempool->items_priv_size; | 1917 | (*memblock_item_idx) * mempool->items_priv_size; |
2011 | } | 1918 | } |
2012 | 1919 | ||
2013 | enum vxge_hw_status | ||
2014 | __vxge_hw_mempool_grow( | ||
2015 | struct vxge_hw_mempool *mempool, | ||
2016 | u32 num_allocate, | ||
2017 | u32 *num_allocated); | ||
2018 | |||
2019 | struct vxge_hw_mempool* | ||
2020 | __vxge_hw_mempool_create( | ||
2021 | struct __vxge_hw_device *devh, | ||
2022 | u32 memblock_size, | ||
2023 | u32 item_size, | ||
2024 | u32 private_size, | ||
2025 | u32 items_initial, | ||
2026 | u32 items_max, | ||
2027 | struct vxge_hw_mempool_cbs *mp_callback, | ||
2028 | void *userdata); | ||
2029 | |||
2030 | struct __vxge_hw_channel* | ||
2031 | __vxge_hw_channel_allocate(struct __vxge_hw_vpath_handle *vph, | ||
2032 | enum __vxge_hw_channel_type type, u32 length, | ||
2033 | u32 per_dtr_space, void *userdata); | ||
2034 | |||
2035 | void | ||
2036 | __vxge_hw_channel_free( | ||
2037 | struct __vxge_hw_channel *channel); | ||
2038 | |||
2039 | enum vxge_hw_status | ||
2040 | __vxge_hw_channel_initialize( | ||
2041 | struct __vxge_hw_channel *channel); | ||
2042 | |||
2043 | enum vxge_hw_status | ||
2044 | __vxge_hw_channel_reset( | ||
2045 | struct __vxge_hw_channel *channel); | ||
2046 | |||
2047 | /* | 1920 | /* |
2048 | * __vxge_hw_fifo_txdl_priv - Return the max fragments allocated | 1921 | * __vxge_hw_fifo_txdl_priv - Return the max fragments allocated |
2049 | * for the fifo. | 1922 | * for the fifo. |
@@ -2065,9 +1938,6 @@ enum vxge_hw_status vxge_hw_vpath_open( | |||
2065 | struct vxge_hw_vpath_attr *attr, | 1938 | struct vxge_hw_vpath_attr *attr, |
2066 | struct __vxge_hw_vpath_handle **vpath_handle); | 1939 | struct __vxge_hw_vpath_handle **vpath_handle); |
2067 | 1940 | ||
2068 | enum vxge_hw_status | ||
2069 | __vxge_hw_device_vpath_reset_in_prog_check(u64 __iomem *vpath_rst_in_prog); | ||
2070 | |||
2071 | enum vxge_hw_status vxge_hw_vpath_close( | 1941 | enum vxge_hw_status vxge_hw_vpath_close( |
2072 | struct __vxge_hw_vpath_handle *vpath_handle); | 1942 | struct __vxge_hw_vpath_handle *vpath_handle); |
2073 | 1943 | ||
@@ -2089,54 +1959,9 @@ enum vxge_hw_status vxge_hw_vpath_mtu_set( | |||
2089 | struct __vxge_hw_vpath_handle *vpath_handle, | 1959 | struct __vxge_hw_vpath_handle *vpath_handle, |
2090 | u32 new_mtu); | 1960 | u32 new_mtu); |
2091 | 1961 | ||
2092 | enum vxge_hw_status vxge_hw_vpath_stats_enable( | ||
2093 | struct __vxge_hw_vpath_handle *vpath_handle); | ||
2094 | |||
2095 | enum vxge_hw_status | ||
2096 | __vxge_hw_vpath_stats_access( | ||
2097 | struct __vxge_hw_virtualpath *vpath, | ||
2098 | u32 operation, | ||
2099 | u32 offset, | ||
2100 | u64 *stat); | ||
2101 | |||
2102 | enum vxge_hw_status | ||
2103 | __vxge_hw_vpath_xmac_tx_stats_get( | ||
2104 | struct __vxge_hw_virtualpath *vpath, | ||
2105 | struct vxge_hw_xmac_vpath_tx_stats *vpath_tx_stats); | ||
2106 | |||
2107 | enum vxge_hw_status | ||
2108 | __vxge_hw_vpath_xmac_rx_stats_get( | ||
2109 | struct __vxge_hw_virtualpath *vpath, | ||
2110 | struct vxge_hw_xmac_vpath_rx_stats *vpath_rx_stats); | ||
2111 | |||
2112 | enum vxge_hw_status | ||
2113 | __vxge_hw_vpath_stats_get( | ||
2114 | struct __vxge_hw_virtualpath *vpath, | ||
2115 | struct vxge_hw_vpath_stats_hw_info *hw_stats); | ||
2116 | |||
2117 | void | 1962 | void |
2118 | vxge_hw_vpath_rx_doorbell_init(struct __vxge_hw_vpath_handle *vp); | 1963 | vxge_hw_vpath_rx_doorbell_init(struct __vxge_hw_vpath_handle *vp); |
2119 | 1964 | ||
2120 | enum vxge_hw_status | ||
2121 | __vxge_hw_device_vpath_config_check(struct vxge_hw_vp_config *vp_config); | ||
2122 | |||
2123 | void | ||
2124 | __vxge_hw_device_pci_e_init(struct __vxge_hw_device *hldev); | ||
2125 | |||
2126 | enum vxge_hw_status | ||
2127 | __vxge_hw_legacy_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg); | ||
2128 | |||
2129 | enum vxge_hw_status | ||
2130 | __vxge_hw_vpath_swapper_set(struct vxge_hw_vpath_reg __iomem *vpath_reg); | ||
2131 | |||
2132 | enum vxge_hw_status | ||
2133 | __vxge_hw_kdfc_swapper_set(struct vxge_hw_legacy_reg __iomem *legacy_reg, | ||
2134 | struct vxge_hw_vpath_reg __iomem *vpath_reg); | ||
2135 | |||
2136 | enum vxge_hw_status | ||
2137 | __vxge_hw_device_register_poll( | ||
2138 | void __iomem *reg, | ||
2139 | u64 mask, u32 max_millis); | ||
2140 | 1965 | ||
2141 | #ifndef readq | 1966 | #ifndef readq |
2142 | static inline u64 readq(void __iomem *addr) | 1967 | static inline u64 readq(void __iomem *addr) |
@@ -2168,62 +1993,12 @@ static inline void __vxge_hw_pio_mem_write32_lower(u32 val, void __iomem *addr) | |||
2168 | writel(val, addr); | 1993 | writel(val, addr); |
2169 | } | 1994 | } |
2170 | 1995 | ||
2171 | static inline enum vxge_hw_status | ||
2172 | __vxge_hw_pio_mem_write64(u64 val64, void __iomem *addr, | ||
2173 | u64 mask, u32 max_millis) | ||
2174 | { | ||
2175 | enum vxge_hw_status status = VXGE_HW_OK; | ||
2176 | |||
2177 | __vxge_hw_pio_mem_write32_lower((u32)vxge_bVALn(val64, 32, 32), addr); | ||
2178 | wmb(); | ||
2179 | __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(val64, 0, 32), addr); | ||
2180 | wmb(); | ||
2181 | |||
2182 | status = __vxge_hw_device_register_poll(addr, mask, max_millis); | ||
2183 | return status; | ||
2184 | } | ||
2185 | |||
2186 | struct vxge_hw_toc_reg __iomem * | ||
2187 | __vxge_hw_device_toc_get(void __iomem *bar0); | ||
2188 | |||
2189 | enum vxge_hw_status | ||
2190 | __vxge_hw_device_reg_addr_get(struct __vxge_hw_device *hldev); | ||
2191 | |||
2192 | void | ||
2193 | __vxge_hw_device_id_get(struct __vxge_hw_device *hldev); | ||
2194 | |||
2195 | void | ||
2196 | __vxge_hw_device_host_info_get(struct __vxge_hw_device *hldev); | ||
2197 | |||
2198 | enum vxge_hw_status | 1996 | enum vxge_hw_status |
2199 | vxge_hw_device_flick_link_led(struct __vxge_hw_device *devh, u64 on_off); | 1997 | vxge_hw_device_flick_link_led(struct __vxge_hw_device *devh, u64 on_off); |
2200 | 1998 | ||
2201 | enum vxge_hw_status | 1999 | enum vxge_hw_status |
2202 | __vxge_hw_device_initialize(struct __vxge_hw_device *hldev); | ||
2203 | |||
2204 | enum vxge_hw_status | ||
2205 | __vxge_hw_vpath_pci_read( | ||
2206 | struct __vxge_hw_virtualpath *vpath, | ||
2207 | u32 phy_func_0, | ||
2208 | u32 offset, | ||
2209 | u32 *val); | ||
2210 | |||
2211 | enum vxge_hw_status | ||
2212 | __vxge_hw_vpath_addr_get( | ||
2213 | u32 vp_id, | ||
2214 | struct vxge_hw_vpath_reg __iomem *vpath_reg, | ||
2215 | u8 (macaddr)[ETH_ALEN], | ||
2216 | u8 (macaddr_mask)[ETH_ALEN]); | ||
2217 | |||
2218 | u32 | ||
2219 | __vxge_hw_vpath_func_id_get( | ||
2220 | u32 vp_id, struct vxge_hw_vpmgmt_reg __iomem *vpmgmt_reg); | ||
2221 | |||
2222 | enum vxge_hw_status | ||
2223 | __vxge_hw_vpath_reset_check(struct __vxge_hw_virtualpath *vpath); | ||
2224 | |||
2225 | enum vxge_hw_status | ||
2226 | vxge_hw_vpath_strip_fcs_check(struct __vxge_hw_device *hldev, u64 vpath_mask); | 2000 | vxge_hw_vpath_strip_fcs_check(struct __vxge_hw_device *hldev, u64 vpath_mask); |
2001 | |||
2227 | /** | 2002 | /** |
2228 | * vxge_debug | 2003 | * vxge_debug |
2229 | * @level: level of debug verbosity. | 2004 | * @level: level of debug verbosity. |
diff --git a/drivers/net/vxge/vxge-ethtool.c b/drivers/net/vxge/vxge-ethtool.c index 05679e306fdd..b67746eef923 100644 --- a/drivers/net/vxge/vxge-ethtool.c +++ b/drivers/net/vxge/vxge-ethtool.c | |||
@@ -1142,7 +1142,7 @@ static const struct ethtool_ops vxge_ethtool_ops = { | |||
1142 | .get_ethtool_stats = vxge_get_ethtool_stats, | 1142 | .get_ethtool_stats = vxge_get_ethtool_stats, |
1143 | }; | 1143 | }; |
1144 | 1144 | ||
1145 | void initialize_ethtool_ops(struct net_device *ndev) | 1145 | void vxge_initialize_ethtool_ops(struct net_device *ndev) |
1146 | { | 1146 | { |
1147 | SET_ETHTOOL_OPS(ndev, &vxge_ethtool_ops); | 1147 | SET_ETHTOOL_OPS(ndev, &vxge_ethtool_ops); |
1148 | } | 1148 | } |
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c index a69542ecb68d..813829f3d024 100644 --- a/drivers/net/vxge/vxge-main.c +++ b/drivers/net/vxge/vxge-main.c | |||
@@ -82,6 +82,16 @@ module_param_array(bw_percentage, uint, NULL, 0); | |||
82 | 82 | ||
83 | static struct vxge_drv_config *driver_config; | 83 | static struct vxge_drv_config *driver_config; |
84 | 84 | ||
85 | static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, | ||
86 | struct macInfo *mac); | ||
87 | static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev, | ||
88 | struct macInfo *mac); | ||
89 | static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac); | ||
90 | static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac); | ||
91 | static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath); | ||
92 | static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath); | ||
93 | static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev); | ||
94 | |||
85 | static inline int is_vxge_card_up(struct vxgedev *vdev) | 95 | static inline int is_vxge_card_up(struct vxgedev *vdev) |
86 | { | 96 | { |
87 | return test_bit(__VXGE_STATE_CARD_UP, &vdev->state); | 97 | return test_bit(__VXGE_STATE_CARD_UP, &vdev->state); |
@@ -138,7 +148,7 @@ static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev) | |||
138 | * This function is called during interrupt context to notify link up state | 148 | * This function is called during interrupt context to notify link up state |
139 | * change. | 149 | * change. |
140 | */ | 150 | */ |
141 | void | 151 | static void |
142 | vxge_callback_link_up(struct __vxge_hw_device *hldev) | 152 | vxge_callback_link_up(struct __vxge_hw_device *hldev) |
143 | { | 153 | { |
144 | struct net_device *dev = hldev->ndev; | 154 | struct net_device *dev = hldev->ndev; |
@@ -162,7 +172,7 @@ vxge_callback_link_up(struct __vxge_hw_device *hldev) | |||
162 | * This function is called during interrupt context to notify link down state | 172 | * This function is called during interrupt context to notify link down state |
163 | * change. | 173 | * change. |
164 | */ | 174 | */ |
165 | void | 175 | static void |
166 | vxge_callback_link_down(struct __vxge_hw_device *hldev) | 176 | vxge_callback_link_down(struct __vxge_hw_device *hldev) |
167 | { | 177 | { |
168 | struct net_device *dev = hldev->ndev; | 178 | struct net_device *dev = hldev->ndev; |
@@ -354,7 +364,7 @@ static inline void vxge_post(int *dtr_cnt, void **first_dtr, | |||
354 | * If the interrupt is because of a received frame or if the receive ring | 364 | * If the interrupt is because of a received frame or if the receive ring |
355 | * contains fresh as yet un-processed frames, this function is called. | 365 | * contains fresh as yet un-processed frames, this function is called. |
356 | */ | 366 | */ |
357 | enum vxge_hw_status | 367 | static enum vxge_hw_status |
358 | vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr, | 368 | vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr, |
359 | u8 t_code, void *userdata) | 369 | u8 t_code, void *userdata) |
360 | { | 370 | { |
@@ -531,7 +541,7 @@ vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr, | |||
531 | * freed and frees all skbs whose data have already DMA'ed into the NICs | 541 | * freed and frees all skbs whose data have already DMA'ed into the NICs |
532 | * internal memory. | 542 | * internal memory. |
533 | */ | 543 | */ |
534 | enum vxge_hw_status | 544 | static enum vxge_hw_status |
535 | vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr, | 545 | vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr, |
536 | enum vxge_hw_fifo_tcode t_code, void *userdata, | 546 | enum vxge_hw_fifo_tcode t_code, void *userdata, |
537 | struct sk_buff ***skb_ptr, int nr_skb, int *more) | 547 | struct sk_buff ***skb_ptr, int nr_skb, int *more) |
@@ -1246,7 +1256,7 @@ static int vxge_set_mac_addr(struct net_device *dev, void *p) | |||
1246 | * | 1256 | * |
1247 | * Enables the interrupts for the vpath | 1257 | * Enables the interrupts for the vpath |
1248 | */ | 1258 | */ |
1249 | void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id) | 1259 | static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id) |
1250 | { | 1260 | { |
1251 | struct vxge_vpath *vpath = &vdev->vpaths[vp_id]; | 1261 | struct vxge_vpath *vpath = &vdev->vpaths[vp_id]; |
1252 | int msix_id = 0; | 1262 | int msix_id = 0; |
@@ -1279,7 +1289,7 @@ void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id) | |||
1279 | * | 1289 | * |
1280 | * Disables the interrupts for the vpath | 1290 | * Disables the interrupts for the vpath |
1281 | */ | 1291 | */ |
1282 | void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id) | 1292 | static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id) |
1283 | { | 1293 | { |
1284 | struct vxge_vpath *vpath = &vdev->vpaths[vp_id]; | 1294 | struct vxge_vpath *vpath = &vdev->vpaths[vp_id]; |
1285 | int msix_id; | 1295 | int msix_id; |
@@ -1553,7 +1563,7 @@ out: | |||
1553 | * | 1563 | * |
1554 | * driver may reset the chip on events of serr, eccerr, etc | 1564 | * driver may reset the chip on events of serr, eccerr, etc |
1555 | */ | 1565 | */ |
1556 | int vxge_reset(struct vxgedev *vdev) | 1566 | static int vxge_reset(struct vxgedev *vdev) |
1557 | { | 1567 | { |
1558 | return do_vxge_reset(vdev, VXGE_LL_FULL_RESET); | 1568 | return do_vxge_reset(vdev, VXGE_LL_FULL_RESET); |
1559 | } | 1569 | } |
@@ -1724,7 +1734,7 @@ static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev) | |||
1724 | return status; | 1734 | return status; |
1725 | } | 1735 | } |
1726 | 1736 | ||
1727 | int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac) | 1737 | static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac) |
1728 | { | 1738 | { |
1729 | struct vxge_mac_addrs *new_mac_entry; | 1739 | struct vxge_mac_addrs *new_mac_entry; |
1730 | u8 *mac_address = NULL; | 1740 | u8 *mac_address = NULL; |
@@ -1757,7 +1767,8 @@ int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac) | |||
1757 | } | 1767 | } |
1758 | 1768 | ||
1759 | /* Add a mac address to DA table */ | 1769 | /* Add a mac address to DA table */ |
1760 | enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac) | 1770 | static enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, |
1771 | struct macInfo *mac) | ||
1761 | { | 1772 | { |
1762 | enum vxge_hw_status status = VXGE_HW_OK; | 1773 | enum vxge_hw_status status = VXGE_HW_OK; |
1763 | struct vxge_vpath *vpath; | 1774 | struct vxge_vpath *vpath; |
@@ -1782,7 +1793,7 @@ enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac) | |||
1782 | return status; | 1793 | return status; |
1783 | } | 1794 | } |
1784 | 1795 | ||
1785 | int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac) | 1796 | static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac) |
1786 | { | 1797 | { |
1787 | struct list_head *entry, *next; | 1798 | struct list_head *entry, *next; |
1788 | u64 del_mac = 0; | 1799 | u64 del_mac = 0; |
@@ -1807,7 +1818,8 @@ int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac) | |||
1807 | return FALSE; | 1818 | return FALSE; |
1808 | } | 1819 | } |
1809 | /* delete a mac address from DA table */ | 1820 | /* delete a mac address from DA table */ |
1810 | enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac) | 1821 | static enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev, |
1822 | struct macInfo *mac) | ||
1811 | { | 1823 | { |
1812 | enum vxge_hw_status status = VXGE_HW_OK; | 1824 | enum vxge_hw_status status = VXGE_HW_OK; |
1813 | struct vxge_vpath *vpath; | 1825 | struct vxge_vpath *vpath; |
@@ -1854,7 +1866,7 @@ static vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, | |||
1854 | } | 1866 | } |
1855 | 1867 | ||
1856 | /* Store all vlan ids from the list to the vid table */ | 1868 | /* Store all vlan ids from the list to the vid table */ |
1857 | enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath) | 1869 | static enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath) |
1858 | { | 1870 | { |
1859 | enum vxge_hw_status status = VXGE_HW_OK; | 1871 | enum vxge_hw_status status = VXGE_HW_OK; |
1860 | struct vxgedev *vdev = vpath->vdev; | 1872 | struct vxgedev *vdev = vpath->vdev; |
@@ -1874,7 +1886,7 @@ enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath) | |||
1874 | } | 1886 | } |
1875 | 1887 | ||
1876 | /* Store all mac addresses from the list to the DA table */ | 1888 | /* Store all mac addresses from the list to the DA table */ |
1877 | enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath) | 1889 | static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath) |
1878 | { | 1890 | { |
1879 | enum vxge_hw_status status = VXGE_HW_OK; | 1891 | enum vxge_hw_status status = VXGE_HW_OK; |
1880 | struct macInfo mac_info; | 1892 | struct macInfo mac_info; |
@@ -1916,7 +1928,7 @@ enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath) | |||
1916 | } | 1928 | } |
1917 | 1929 | ||
1918 | /* reset vpaths */ | 1930 | /* reset vpaths */ |
1919 | enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev) | 1931 | static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev) |
1920 | { | 1932 | { |
1921 | enum vxge_hw_status status = VXGE_HW_OK; | 1933 | enum vxge_hw_status status = VXGE_HW_OK; |
1922 | struct vxge_vpath *vpath; | 1934 | struct vxge_vpath *vpath; |
@@ -1948,7 +1960,7 @@ enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev) | |||
1948 | } | 1960 | } |
1949 | 1961 | ||
1950 | /* close vpaths */ | 1962 | /* close vpaths */ |
1951 | void vxge_close_vpaths(struct vxgedev *vdev, int index) | 1963 | static void vxge_close_vpaths(struct vxgedev *vdev, int index) |
1952 | { | 1964 | { |
1953 | struct vxge_vpath *vpath; | 1965 | struct vxge_vpath *vpath; |
1954 | int i; | 1966 | int i; |
@@ -1966,7 +1978,7 @@ void vxge_close_vpaths(struct vxgedev *vdev, int index) | |||
1966 | } | 1978 | } |
1967 | 1979 | ||
1968 | /* open vpaths */ | 1980 | /* open vpaths */ |
1969 | int vxge_open_vpaths(struct vxgedev *vdev) | 1981 | static int vxge_open_vpaths(struct vxgedev *vdev) |
1970 | { | 1982 | { |
1971 | struct vxge_hw_vpath_attr attr; | 1983 | struct vxge_hw_vpath_attr attr; |
1972 | enum vxge_hw_status status; | 1984 | enum vxge_hw_status status; |
@@ -2517,7 +2529,7 @@ static void vxge_poll_vp_lockup(unsigned long data) | |||
2517 | * Return value: '0' on success and an appropriate (-)ve integer as | 2529 | * Return value: '0' on success and an appropriate (-)ve integer as |
2518 | * defined in errno.h file on failure. | 2530 | * defined in errno.h file on failure. |
2519 | */ | 2531 | */ |
2520 | int | 2532 | static int |
2521 | vxge_open(struct net_device *dev) | 2533 | vxge_open(struct net_device *dev) |
2522 | { | 2534 | { |
2523 | enum vxge_hw_status status; | 2535 | enum vxge_hw_status status; |
@@ -2721,7 +2733,7 @@ out0: | |||
2721 | } | 2733 | } |
2722 | 2734 | ||
2723 | /* Loop throught the mac address list and delete all the entries */ | 2735 | /* Loop throught the mac address list and delete all the entries */ |
2724 | void vxge_free_mac_add_list(struct vxge_vpath *vpath) | 2736 | static void vxge_free_mac_add_list(struct vxge_vpath *vpath) |
2725 | { | 2737 | { |
2726 | 2738 | ||
2727 | struct list_head *entry, *next; | 2739 | struct list_head *entry, *next; |
@@ -2745,7 +2757,7 @@ static void vxge_napi_del_all(struct vxgedev *vdev) | |||
2745 | } | 2757 | } |
2746 | } | 2758 | } |
2747 | 2759 | ||
2748 | int do_vxge_close(struct net_device *dev, int do_io) | 2760 | static int do_vxge_close(struct net_device *dev, int do_io) |
2749 | { | 2761 | { |
2750 | enum vxge_hw_status status; | 2762 | enum vxge_hw_status status; |
2751 | struct vxgedev *vdev; | 2763 | struct vxgedev *vdev; |
@@ -2856,7 +2868,7 @@ int do_vxge_close(struct net_device *dev, int do_io) | |||
2856 | * Return value: '0' on success and an appropriate (-)ve integer as | 2868 | * Return value: '0' on success and an appropriate (-)ve integer as |
2857 | * defined in errno.h file on failure. | 2869 | * defined in errno.h file on failure. |
2858 | */ | 2870 | */ |
2859 | int | 2871 | static int |
2860 | vxge_close(struct net_device *dev) | 2872 | vxge_close(struct net_device *dev) |
2861 | { | 2873 | { |
2862 | do_vxge_close(dev, 1); | 2874 | do_vxge_close(dev, 1); |
@@ -3113,10 +3125,10 @@ static const struct net_device_ops vxge_netdev_ops = { | |||
3113 | #endif | 3125 | #endif |
3114 | }; | 3126 | }; |
3115 | 3127 | ||
3116 | int __devinit vxge_device_register(struct __vxge_hw_device *hldev, | 3128 | static int __devinit vxge_device_register(struct __vxge_hw_device *hldev, |
3117 | struct vxge_config *config, | 3129 | struct vxge_config *config, |
3118 | int high_dma, int no_of_vpath, | 3130 | int high_dma, int no_of_vpath, |
3119 | struct vxgedev **vdev_out) | 3131 | struct vxgedev **vdev_out) |
3120 | { | 3132 | { |
3121 | struct net_device *ndev; | 3133 | struct net_device *ndev; |
3122 | enum vxge_hw_status status = VXGE_HW_OK; | 3134 | enum vxge_hw_status status = VXGE_HW_OK; |
@@ -3164,7 +3176,7 @@ int __devinit vxge_device_register(struct __vxge_hw_device *hldev, | |||
3164 | 3176 | ||
3165 | ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT; | 3177 | ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT; |
3166 | 3178 | ||
3167 | initialize_ethtool_ops(ndev); | 3179 | vxge_initialize_ethtool_ops(ndev); |
3168 | 3180 | ||
3169 | /* Allocate memory for vpath */ | 3181 | /* Allocate memory for vpath */ |
3170 | vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) * | 3182 | vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) * |
@@ -3249,7 +3261,7 @@ _out0: | |||
3249 | * | 3261 | * |
3250 | * This function will unregister and free network device | 3262 | * This function will unregister and free network device |
3251 | */ | 3263 | */ |
3252 | void | 3264 | static void |
3253 | vxge_device_unregister(struct __vxge_hw_device *hldev) | 3265 | vxge_device_unregister(struct __vxge_hw_device *hldev) |
3254 | { | 3266 | { |
3255 | struct vxgedev *vdev; | 3267 | struct vxgedev *vdev; |
diff --git a/drivers/net/vxge/vxge-main.h b/drivers/net/vxge/vxge-main.h index d4be07eaacd7..de64536cb7d0 100644 --- a/drivers/net/vxge/vxge-main.h +++ b/drivers/net/vxge/vxge-main.h | |||
@@ -396,64 +396,7 @@ struct vxge_tx_priv { | |||
396 | mod_timer(&timer, (jiffies + exp)); \ | 396 | mod_timer(&timer, (jiffies + exp)); \ |
397 | } while (0); | 397 | } while (0); |
398 | 398 | ||
399 | int __devinit vxge_device_register(struct __vxge_hw_device *devh, | 399 | extern void vxge_initialize_ethtool_ops(struct net_device *ndev); |
400 | struct vxge_config *config, | ||
401 | int high_dma, int no_of_vpath, | ||
402 | struct vxgedev **vdev); | ||
403 | |||
404 | void vxge_device_unregister(struct __vxge_hw_device *devh); | ||
405 | |||
406 | void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id); | ||
407 | |||
408 | void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id); | ||
409 | |||
410 | void vxge_callback_link_up(struct __vxge_hw_device *devh); | ||
411 | |||
412 | void vxge_callback_link_down(struct __vxge_hw_device *devh); | ||
413 | |||
414 | enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, | ||
415 | struct macInfo *mac); | ||
416 | |||
417 | int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac); | ||
418 | |||
419 | int vxge_reset(struct vxgedev *vdev); | ||
420 | |||
421 | enum vxge_hw_status | ||
422 | vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr, | ||
423 | u8 t_code, void *userdata); | ||
424 | |||
425 | enum vxge_hw_status | ||
426 | vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr, | ||
427 | enum vxge_hw_fifo_tcode t_code, void *userdata, | ||
428 | struct sk_buff ***skb_ptr, int nr_skbs, int *more); | ||
429 | |||
430 | int vxge_close(struct net_device *dev); | ||
431 | |||
432 | int vxge_open(struct net_device *dev); | ||
433 | |||
434 | void vxge_close_vpaths(struct vxgedev *vdev, int index); | ||
435 | |||
436 | int vxge_open_vpaths(struct vxgedev *vdev); | ||
437 | |||
438 | enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev); | ||
439 | |||
440 | enum vxge_hw_status vxge_add_mac_addr(struct vxgedev *vdev, | ||
441 | struct macInfo *mac); | ||
442 | |||
443 | enum vxge_hw_status vxge_del_mac_addr(struct vxgedev *vdev, | ||
444 | struct macInfo *mac); | ||
445 | |||
446 | int vxge_mac_list_add(struct vxge_vpath *vpath, | ||
447 | struct macInfo *mac); | ||
448 | |||
449 | void vxge_free_mac_add_list(struct vxge_vpath *vpath); | ||
450 | |||
451 | enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath); | ||
452 | |||
453 | enum vxge_hw_status vxge_restore_vpath_vid_table(struct vxge_vpath *vpath); | ||
454 | |||
455 | int do_vxge_close(struct net_device *dev, int do_io); | ||
456 | extern void initialize_ethtool_ops(struct net_device *ndev); | ||
457 | /** | 400 | /** |
458 | * #define VXGE_DEBUG_INIT: debug for initialization functions | 401 | * #define VXGE_DEBUG_INIT: debug for initialization functions |
459 | * #define VXGE_DEBUG_TX : debug transmit related functions | 402 | * #define VXGE_DEBUG_TX : debug transmit related functions |
diff --git a/drivers/net/vxge/vxge-traffic.c b/drivers/net/vxge/vxge-traffic.c index cedf08f99cb3..4bdb611a6842 100644 --- a/drivers/net/vxge/vxge-traffic.c +++ b/drivers/net/vxge/vxge-traffic.c | |||
@@ -17,6 +17,13 @@ | |||
17 | #include "vxge-config.h" | 17 | #include "vxge-config.h" |
18 | #include "vxge-main.h" | 18 | #include "vxge-main.h" |
19 | 19 | ||
20 | static enum vxge_hw_status | ||
21 | __vxge_hw_device_handle_error(struct __vxge_hw_device *hldev, | ||
22 | u32 vp_id, enum vxge_hw_event type); | ||
23 | static enum vxge_hw_status | ||
24 | __vxge_hw_vpath_alarm_process(struct __vxge_hw_virtualpath *vpath, | ||
25 | u32 skip_alarms); | ||
26 | |||
20 | /* | 27 | /* |
21 | * vxge_hw_vpath_intr_enable - Enable vpath interrupts. | 28 | * vxge_hw_vpath_intr_enable - Enable vpath interrupts. |
22 | * @vp: Virtual Path handle. | 29 | * @vp: Virtual Path handle. |
@@ -513,7 +520,7 @@ exit: | |||
513 | * Link up indication handler. The function is invoked by HW when | 520 | * Link up indication handler. The function is invoked by HW when |
514 | * Titan indicates that the link is up for programmable amount of time. | 521 | * Titan indicates that the link is up for programmable amount of time. |
515 | */ | 522 | */ |
516 | enum vxge_hw_status | 523 | static enum vxge_hw_status |
517 | __vxge_hw_device_handle_link_up_ind(struct __vxge_hw_device *hldev) | 524 | __vxge_hw_device_handle_link_up_ind(struct __vxge_hw_device *hldev) |
518 | { | 525 | { |
519 | /* | 526 | /* |
@@ -538,7 +545,7 @@ exit: | |||
538 | * Link down indication handler. The function is invoked by HW when | 545 | * Link down indication handler. The function is invoked by HW when |
539 | * Titan indicates that the link is down. | 546 | * Titan indicates that the link is down. |
540 | */ | 547 | */ |
541 | enum vxge_hw_status | 548 | static enum vxge_hw_status |
542 | __vxge_hw_device_handle_link_down_ind(struct __vxge_hw_device *hldev) | 549 | __vxge_hw_device_handle_link_down_ind(struct __vxge_hw_device *hldev) |
543 | { | 550 | { |
544 | /* | 551 | /* |
@@ -564,7 +571,7 @@ exit: | |||
564 | * | 571 | * |
565 | * Handle error. | 572 | * Handle error. |
566 | */ | 573 | */ |
567 | enum vxge_hw_status | 574 | static enum vxge_hw_status |
568 | __vxge_hw_device_handle_error( | 575 | __vxge_hw_device_handle_error( |
569 | struct __vxge_hw_device *hldev, | 576 | struct __vxge_hw_device *hldev, |
570 | u32 vp_id, | 577 | u32 vp_id, |
@@ -646,7 +653,7 @@ void vxge_hw_device_clear_tx_rx(struct __vxge_hw_device *hldev) | |||
646 | * it swaps the reserve and free arrays. | 653 | * it swaps the reserve and free arrays. |
647 | * | 654 | * |
648 | */ | 655 | */ |
649 | enum vxge_hw_status | 656 | static enum vxge_hw_status |
650 | vxge_hw_channel_dtr_alloc(struct __vxge_hw_channel *channel, void **dtrh) | 657 | vxge_hw_channel_dtr_alloc(struct __vxge_hw_channel *channel, void **dtrh) |
651 | { | 658 | { |
652 | void **tmp_arr; | 659 | void **tmp_arr; |
@@ -692,7 +699,8 @@ _alloc_after_swap: | |||
692 | * Posts a dtr to work array. | 699 | * Posts a dtr to work array. |
693 | * | 700 | * |
694 | */ | 701 | */ |
695 | void vxge_hw_channel_dtr_post(struct __vxge_hw_channel *channel, void *dtrh) | 702 | static void vxge_hw_channel_dtr_post(struct __vxge_hw_channel *channel, |
703 | void *dtrh) | ||
696 | { | 704 | { |
697 | vxge_assert(channel->work_arr[channel->post_index] == NULL); | 705 | vxge_assert(channel->work_arr[channel->post_index] == NULL); |
698 | 706 | ||
@@ -1658,37 +1666,6 @@ exit: | |||
1658 | } | 1666 | } |
1659 | 1667 | ||
1660 | /** | 1668 | /** |
1661 | * vxge_hw_vpath_vid_get_next - Get the next vid entry for this vpath | ||
1662 | * from vlan id table. | ||
1663 | * @vp: Vpath handle. | ||
1664 | * @vid: Buffer to return vlan id | ||
1665 | * | ||
1666 | * Returns the next vlan id in the list for this vpath. | ||
1667 | * see also: vxge_hw_vpath_vid_get | ||
1668 | * | ||
1669 | */ | ||
1670 | enum vxge_hw_status | ||
1671 | vxge_hw_vpath_vid_get_next(struct __vxge_hw_vpath_handle *vp, u64 *vid) | ||
1672 | { | ||
1673 | u64 data; | ||
1674 | enum vxge_hw_status status = VXGE_HW_OK; | ||
1675 | |||
1676 | if (vp == NULL) { | ||
1677 | status = VXGE_HW_ERR_INVALID_HANDLE; | ||
1678 | goto exit; | ||
1679 | } | ||
1680 | |||
1681 | status = __vxge_hw_vpath_rts_table_get(vp, | ||
1682 | VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_LIST_NEXT_ENTRY, | ||
1683 | VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_VID, | ||
1684 | 0, vid, &data); | ||
1685 | |||
1686 | *vid = VXGE_HW_RTS_ACCESS_STEER_DATA0_GET_VLAN_ID(*vid); | ||
1687 | exit: | ||
1688 | return status; | ||
1689 | } | ||
1690 | |||
1691 | /** | ||
1692 | * vxge_hw_vpath_vid_delete - Delete the vlan id entry for this vpath | 1669 | * vxge_hw_vpath_vid_delete - Delete the vlan id entry for this vpath |
1693 | * to vlan id table. | 1670 | * to vlan id table. |
1694 | * @vp: Vpath handle. | 1671 | * @vp: Vpath handle. |
@@ -1898,9 +1875,9 @@ exit: | |||
1898 | * Process vpath alarms. | 1875 | * Process vpath alarms. |
1899 | * | 1876 | * |
1900 | */ | 1877 | */ |
1901 | enum vxge_hw_status __vxge_hw_vpath_alarm_process( | 1878 | static enum vxge_hw_status |
1902 | struct __vxge_hw_virtualpath *vpath, | 1879 | __vxge_hw_vpath_alarm_process(struct __vxge_hw_virtualpath *vpath, |
1903 | u32 skip_alarms) | 1880 | u32 skip_alarms) |
1904 | { | 1881 | { |
1905 | u64 val64; | 1882 | u64 val64; |
1906 | u64 alarm_status; | 1883 | u64 alarm_status; |
@@ -2265,36 +2242,6 @@ vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vp, int msix_id) | |||
2265 | } | 2242 | } |
2266 | 2243 | ||
2267 | /** | 2244 | /** |
2268 | * vxge_hw_vpath_msix_clear - Clear MSIX Vector. | ||
2269 | * @vp: Virtual Path handle. | ||
2270 | * @msix_id: MSI ID | ||
2271 | * | ||
2272 | * The function clears the msix interrupt for the given msix_id | ||
2273 | * | ||
2274 | * Returns: 0, | ||
2275 | * Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range | ||
2276 | * status. | ||
2277 | * See also: | ||
2278 | */ | ||
2279 | void | ||
2280 | vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id) | ||
2281 | { | ||
2282 | struct __vxge_hw_device *hldev = vp->vpath->hldev; | ||
2283 | if (hldev->config.intr_mode == | ||
2284 | VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) { | ||
2285 | __vxge_hw_pio_mem_write32_upper( | ||
2286 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), | ||
2287 | &hldev->common_reg-> | ||
2288 | clr_msix_one_shot_vec[msix_id%4]); | ||
2289 | } else { | ||
2290 | __vxge_hw_pio_mem_write32_upper( | ||
2291 | (u32)vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32), | ||
2292 | &hldev->common_reg-> | ||
2293 | clear_msix_mask_vect[msix_id%4]); | ||
2294 | } | ||
2295 | } | ||
2296 | |||
2297 | /** | ||
2298 | * vxge_hw_vpath_msix_unmask - Unmask the MSIX Vector. | 2245 | * vxge_hw_vpath_msix_unmask - Unmask the MSIX Vector. |
2299 | * @vp: Virtual Path handle. | 2246 | * @vp: Virtual Path handle. |
2300 | * @msix_id: MSI ID | 2247 | * @msix_id: MSI ID |
@@ -2316,22 +2263,6 @@ vxge_hw_vpath_msix_unmask(struct __vxge_hw_vpath_handle *vp, int msix_id) | |||
2316 | } | 2263 | } |
2317 | 2264 | ||
2318 | /** | 2265 | /** |
2319 | * vxge_hw_vpath_msix_mask_all - Mask all MSIX vectors for the vpath. | ||
2320 | * @vp: Virtual Path handle. | ||
2321 | * | ||
2322 | * The function masks all msix interrupt for the given vpath | ||
2323 | * | ||
2324 | */ | ||
2325 | void | ||
2326 | vxge_hw_vpath_msix_mask_all(struct __vxge_hw_vpath_handle *vp) | ||
2327 | { | ||
2328 | |||
2329 | __vxge_hw_pio_mem_write32_upper( | ||
2330 | (u32)vxge_bVALn(vxge_mBIT(vp->vpath->vp_id), 0, 32), | ||
2331 | &vp->vpath->hldev->common_reg->set_msix_mask_all_vect); | ||
2332 | } | ||
2333 | |||
2334 | /** | ||
2335 | * vxge_hw_vpath_inta_mask_tx_rx - Mask Tx and Rx interrupts. | 2266 | * vxge_hw_vpath_inta_mask_tx_rx - Mask Tx and Rx interrupts. |
2336 | * @vp: Virtual Path handle. | 2267 | * @vp: Virtual Path handle. |
2337 | * | 2268 | * |
diff --git a/drivers/net/vxge/vxge-traffic.h b/drivers/net/vxge/vxge-traffic.h index 6fa07d13798e..9890d4d596d0 100644 --- a/drivers/net/vxge/vxge-traffic.h +++ b/drivers/net/vxge/vxge-traffic.h | |||
@@ -1749,14 +1749,6 @@ vxge_hw_mrpcim_stats_access( | |||
1749 | u64 *stat); | 1749 | u64 *stat); |
1750 | 1750 | ||
1751 | enum vxge_hw_status | 1751 | enum vxge_hw_status |
1752 | vxge_hw_device_xmac_aggr_stats_get(struct __vxge_hw_device *devh, u32 port, | ||
1753 | struct vxge_hw_xmac_aggr_stats *aggr_stats); | ||
1754 | |||
1755 | enum vxge_hw_status | ||
1756 | vxge_hw_device_xmac_port_stats_get(struct __vxge_hw_device *devh, u32 port, | ||
1757 | struct vxge_hw_xmac_port_stats *port_stats); | ||
1758 | |||
1759 | enum vxge_hw_status | ||
1760 | vxge_hw_device_xmac_stats_get(struct __vxge_hw_device *devh, | 1752 | vxge_hw_device_xmac_stats_get(struct __vxge_hw_device *devh, |
1761 | struct vxge_hw_xmac_stats *xmac_stats); | 1753 | struct vxge_hw_xmac_stats *xmac_stats); |
1762 | 1754 | ||
@@ -2117,49 +2109,10 @@ struct __vxge_hw_ring_rxd_priv { | |||
2117 | #endif | 2109 | #endif |
2118 | }; | 2110 | }; |
2119 | 2111 | ||
2120 | /* ========================= RING PRIVATE API ============================= */ | ||
2121 | u64 | ||
2122 | __vxge_hw_ring_first_block_address_get( | ||
2123 | struct __vxge_hw_ring *ringh); | ||
2124 | |||
2125 | enum vxge_hw_status | ||
2126 | __vxge_hw_ring_create( | ||
2127 | struct __vxge_hw_vpath_handle *vpath_handle, | ||
2128 | struct vxge_hw_ring_attr *attr); | ||
2129 | |||
2130 | enum vxge_hw_status | ||
2131 | __vxge_hw_ring_abort( | ||
2132 | struct __vxge_hw_ring *ringh); | ||
2133 | |||
2134 | enum vxge_hw_status | ||
2135 | __vxge_hw_ring_reset( | ||
2136 | struct __vxge_hw_ring *ringh); | ||
2137 | |||
2138 | enum vxge_hw_status | ||
2139 | __vxge_hw_ring_delete( | ||
2140 | struct __vxge_hw_vpath_handle *vpath_handle); | ||
2141 | |||
2142 | /* ========================= FIFO PRIVATE API ============================= */ | 2112 | /* ========================= FIFO PRIVATE API ============================= */ |
2143 | 2113 | ||
2144 | struct vxge_hw_fifo_attr; | 2114 | struct vxge_hw_fifo_attr; |
2145 | 2115 | ||
2146 | enum vxge_hw_status | ||
2147 | __vxge_hw_fifo_create( | ||
2148 | struct __vxge_hw_vpath_handle *vpath_handle, | ||
2149 | struct vxge_hw_fifo_attr *attr); | ||
2150 | |||
2151 | enum vxge_hw_status | ||
2152 | __vxge_hw_fifo_abort( | ||
2153 | struct __vxge_hw_fifo *fifoh); | ||
2154 | |||
2155 | enum vxge_hw_status | ||
2156 | __vxge_hw_fifo_reset( | ||
2157 | struct __vxge_hw_fifo *ringh); | ||
2158 | |||
2159 | enum vxge_hw_status | ||
2160 | __vxge_hw_fifo_delete( | ||
2161 | struct __vxge_hw_vpath_handle *vpath_handle); | ||
2162 | |||
2163 | struct vxge_hw_mempool_cbs { | 2116 | struct vxge_hw_mempool_cbs { |
2164 | void (*item_func_alloc)( | 2117 | void (*item_func_alloc)( |
2165 | struct vxge_hw_mempool *mempoolh, | 2118 | struct vxge_hw_mempool *mempoolh, |
@@ -2169,10 +2122,6 @@ struct vxge_hw_mempool_cbs { | |||
2169 | u32 is_last); | 2122 | u32 is_last); |
2170 | }; | 2123 | }; |
2171 | 2124 | ||
2172 | void | ||
2173 | __vxge_hw_mempool_destroy( | ||
2174 | struct vxge_hw_mempool *mempool); | ||
2175 | |||
2176 | #define VXGE_HW_VIRTUAL_PATH_HANDLE(vpath) \ | 2125 | #define VXGE_HW_VIRTUAL_PATH_HANDLE(vpath) \ |
2177 | ((struct __vxge_hw_vpath_handle *)(vpath)->vpath_handles.next) | 2126 | ((struct __vxge_hw_vpath_handle *)(vpath)->vpath_handles.next) |
2178 | 2127 | ||
@@ -2195,61 +2144,10 @@ __vxge_hw_vpath_rts_table_set( | |||
2195 | u64 data2); | 2144 | u64 data2); |
2196 | 2145 | ||
2197 | enum vxge_hw_status | 2146 | enum vxge_hw_status |
2198 | __vxge_hw_vpath_reset( | ||
2199 | struct __vxge_hw_device *devh, | ||
2200 | u32 vp_id); | ||
2201 | |||
2202 | enum vxge_hw_status | ||
2203 | __vxge_hw_vpath_sw_reset( | ||
2204 | struct __vxge_hw_device *devh, | ||
2205 | u32 vp_id); | ||
2206 | |||
2207 | enum vxge_hw_status | ||
2208 | __vxge_hw_vpath_enable( | 2147 | __vxge_hw_vpath_enable( |
2209 | struct __vxge_hw_device *devh, | 2148 | struct __vxge_hw_device *devh, |
2210 | u32 vp_id); | 2149 | u32 vp_id); |
2211 | 2150 | ||
2212 | void | ||
2213 | __vxge_hw_vpath_prc_configure( | ||
2214 | struct __vxge_hw_device *devh, | ||
2215 | u32 vp_id); | ||
2216 | |||
2217 | enum vxge_hw_status | ||
2218 | __vxge_hw_vpath_kdfc_configure( | ||
2219 | struct __vxge_hw_device *devh, | ||
2220 | u32 vp_id); | ||
2221 | |||
2222 | enum vxge_hw_status | ||
2223 | __vxge_hw_vpath_mac_configure( | ||
2224 | struct __vxge_hw_device *devh, | ||
2225 | u32 vp_id); | ||
2226 | |||
2227 | enum vxge_hw_status | ||
2228 | __vxge_hw_vpath_tim_configure( | ||
2229 | struct __vxge_hw_device *devh, | ||
2230 | u32 vp_id); | ||
2231 | |||
2232 | enum vxge_hw_status | ||
2233 | __vxge_hw_vpath_initialize( | ||
2234 | struct __vxge_hw_device *devh, | ||
2235 | u32 vp_id); | ||
2236 | |||
2237 | enum vxge_hw_status | ||
2238 | __vxge_hw_vp_initialize( | ||
2239 | struct __vxge_hw_device *devh, | ||
2240 | u32 vp_id, | ||
2241 | struct vxge_hw_vp_config *config); | ||
2242 | |||
2243 | void | ||
2244 | __vxge_hw_vp_terminate( | ||
2245 | struct __vxge_hw_device *devh, | ||
2246 | u32 vp_id); | ||
2247 | |||
2248 | enum vxge_hw_status | ||
2249 | __vxge_hw_vpath_alarm_process( | ||
2250 | struct __vxge_hw_virtualpath *vpath, | ||
2251 | u32 skip_alarms); | ||
2252 | |||
2253 | void vxge_hw_device_intr_enable( | 2151 | void vxge_hw_device_intr_enable( |
2254 | struct __vxge_hw_device *devh); | 2152 | struct __vxge_hw_device *devh); |
2255 | 2153 | ||
@@ -2321,11 +2219,6 @@ vxge_hw_vpath_vid_get( | |||
2321 | u64 *vid); | 2219 | u64 *vid); |
2322 | 2220 | ||
2323 | enum vxge_hw_status | 2221 | enum vxge_hw_status |
2324 | vxge_hw_vpath_vid_get_next( | ||
2325 | struct __vxge_hw_vpath_handle *vpath_handle, | ||
2326 | u64 *vid); | ||
2327 | |||
2328 | enum vxge_hw_status | ||
2329 | vxge_hw_vpath_vid_delete( | 2222 | vxge_hw_vpath_vid_delete( |
2330 | struct __vxge_hw_vpath_handle *vpath_handle, | 2223 | struct __vxge_hw_vpath_handle *vpath_handle, |
2331 | u64 vid); | 2224 | u64 vid); |
@@ -2387,16 +2280,9 @@ vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vpath_handle, | |||
2387 | void vxge_hw_device_flush_io(struct __vxge_hw_device *devh); | 2280 | void vxge_hw_device_flush_io(struct __vxge_hw_device *devh); |
2388 | 2281 | ||
2389 | void | 2282 | void |
2390 | vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vpath_handle, | ||
2391 | int msix_id); | ||
2392 | |||
2393 | void | ||
2394 | vxge_hw_vpath_msix_unmask(struct __vxge_hw_vpath_handle *vpath_handle, | 2283 | vxge_hw_vpath_msix_unmask(struct __vxge_hw_vpath_handle *vpath_handle, |
2395 | int msix_id); | 2284 | int msix_id); |
2396 | 2285 | ||
2397 | void | ||
2398 | vxge_hw_vpath_msix_mask_all(struct __vxge_hw_vpath_handle *vpath_handle); | ||
2399 | |||
2400 | enum vxge_hw_status vxge_hw_vpath_intr_enable( | 2286 | enum vxge_hw_status vxge_hw_vpath_intr_enable( |
2401 | struct __vxge_hw_vpath_handle *vpath_handle); | 2287 | struct __vxge_hw_vpath_handle *vpath_handle); |
2402 | 2288 | ||
@@ -2415,12 +2301,6 @@ vxge_hw_channel_msix_mask(struct __vxge_hw_channel *channelh, int msix_id); | |||
2415 | void | 2301 | void |
2416 | vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channelh, int msix_id); | 2302 | vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channelh, int msix_id); |
2417 | 2303 | ||
2418 | enum vxge_hw_status | ||
2419 | vxge_hw_channel_dtr_alloc(struct __vxge_hw_channel *channel, void **dtrh); | ||
2420 | |||
2421 | void | ||
2422 | vxge_hw_channel_dtr_post(struct __vxge_hw_channel *channel, void *dtrh); | ||
2423 | |||
2424 | void | 2304 | void |
2425 | vxge_hw_channel_dtr_try_complete(struct __vxge_hw_channel *channel, | 2305 | vxge_hw_channel_dtr_try_complete(struct __vxge_hw_channel *channel, |
2426 | void **dtrh); | 2306 | void **dtrh); |
@@ -2436,18 +2316,4 @@ vxge_hw_channel_dtr_count(struct __vxge_hw_channel *channel); | |||
2436 | void | 2316 | void |
2437 | vxge_hw_vpath_tti_ci_set(struct __vxge_hw_device *hldev, u32 vp_id); | 2317 | vxge_hw_vpath_tti_ci_set(struct __vxge_hw_device *hldev, u32 vp_id); |
2438 | 2318 | ||
2439 | /* ========================== PRIVATE API ================================= */ | ||
2440 | |||
2441 | enum vxge_hw_status | ||
2442 | __vxge_hw_device_handle_link_up_ind(struct __vxge_hw_device *hldev); | ||
2443 | |||
2444 | enum vxge_hw_status | ||
2445 | __vxge_hw_device_handle_link_down_ind(struct __vxge_hw_device *hldev); | ||
2446 | |||
2447 | enum vxge_hw_status | ||
2448 | __vxge_hw_device_handle_error( | ||
2449 | struct __vxge_hw_device *hldev, | ||
2450 | u32 vp_id, | ||
2451 | enum vxge_hw_event type); | ||
2452 | |||
2453 | #endif | 2319 | #endif |
diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c index d81ad8397885..cf05504d9511 100644 --- a/drivers/net/wan/x25_asy.c +++ b/drivers/net/wan/x25_asy.c | |||
@@ -498,7 +498,6 @@ norbuff: | |||
498 | static int x25_asy_close(struct net_device *dev) | 498 | static int x25_asy_close(struct net_device *dev) |
499 | { | 499 | { |
500 | struct x25_asy *sl = netdev_priv(dev); | 500 | struct x25_asy *sl = netdev_priv(dev); |
501 | int err; | ||
502 | 501 | ||
503 | spin_lock(&sl->lock); | 502 | spin_lock(&sl->lock); |
504 | if (sl->tty) | 503 | if (sl->tty) |
@@ -507,10 +506,6 @@ static int x25_asy_close(struct net_device *dev) | |||
507 | netif_stop_queue(dev); | 506 | netif_stop_queue(dev); |
508 | sl->rcount = 0; | 507 | sl->rcount = 0; |
509 | sl->xleft = 0; | 508 | sl->xleft = 0; |
510 | err = lapb_unregister(dev); | ||
511 | if (err != LAPB_OK) | ||
512 | printk(KERN_ERR "x25_asy_close: lapb_unregister error -%d\n", | ||
513 | err); | ||
514 | spin_unlock(&sl->lock); | 509 | spin_unlock(&sl->lock); |
515 | return 0; | 510 | return 0; |
516 | } | 511 | } |
@@ -595,6 +590,7 @@ static int x25_asy_open_tty(struct tty_struct *tty) | |||
595 | static void x25_asy_close_tty(struct tty_struct *tty) | 590 | static void x25_asy_close_tty(struct tty_struct *tty) |
596 | { | 591 | { |
597 | struct x25_asy *sl = tty->disc_data; | 592 | struct x25_asy *sl = tty->disc_data; |
593 | int err; | ||
598 | 594 | ||
599 | /* First make sure we're connected. */ | 595 | /* First make sure we're connected. */ |
600 | if (!sl || sl->magic != X25_ASY_MAGIC) | 596 | if (!sl || sl->magic != X25_ASY_MAGIC) |
@@ -605,6 +601,11 @@ static void x25_asy_close_tty(struct tty_struct *tty) | |||
605 | dev_close(sl->dev); | 601 | dev_close(sl->dev); |
606 | rtnl_unlock(); | 602 | rtnl_unlock(); |
607 | 603 | ||
604 | err = lapb_unregister(sl->dev); | ||
605 | if (err != LAPB_OK) | ||
606 | printk(KERN_ERR "x25_asy_close: lapb_unregister error -%d\n", | ||
607 | err); | ||
608 | |||
608 | tty->disc_data = NULL; | 609 | tty->disc_data = NULL; |
609 | sl->tty = NULL; | 610 | sl->tty = NULL; |
610 | x25_asy_free(sl); | 611 | x25_asy_free(sl); |
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c index cd0b14a0a93a..fbe8aca975d8 100644 --- a/drivers/net/wireless/ath/ath5k/attach.c +++ b/drivers/net/wireless/ath/ath5k/attach.c | |||
@@ -139,12 +139,12 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
139 | /* Fill the ath5k_hw struct with the needed functions */ | 139 | /* Fill the ath5k_hw struct with the needed functions */ |
140 | ret = ath5k_hw_init_desc_functions(ah); | 140 | ret = ath5k_hw_init_desc_functions(ah); |
141 | if (ret) | 141 | if (ret) |
142 | goto err_free; | 142 | goto err; |
143 | 143 | ||
144 | /* Bring device out of sleep and reset its units */ | 144 | /* Bring device out of sleep and reset its units */ |
145 | ret = ath5k_hw_nic_wakeup(ah, 0, true); | 145 | ret = ath5k_hw_nic_wakeup(ah, 0, true); |
146 | if (ret) | 146 | if (ret) |
147 | goto err_free; | 147 | goto err; |
148 | 148 | ||
149 | /* Get MAC, PHY and RADIO revisions */ | 149 | /* Get MAC, PHY and RADIO revisions */ |
150 | ah->ah_mac_srev = srev; | 150 | ah->ah_mac_srev = srev; |
@@ -234,7 +234,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
234 | } else { | 234 | } else { |
235 | ATH5K_ERR(sc, "Couldn't identify radio revision.\n"); | 235 | ATH5K_ERR(sc, "Couldn't identify radio revision.\n"); |
236 | ret = -ENODEV; | 236 | ret = -ENODEV; |
237 | goto err_free; | 237 | goto err; |
238 | } | 238 | } |
239 | } | 239 | } |
240 | 240 | ||
@@ -244,7 +244,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
244 | (srev < AR5K_SREV_AR2425)) { | 244 | (srev < AR5K_SREV_AR2425)) { |
245 | ATH5K_ERR(sc, "Device not yet supported.\n"); | 245 | ATH5K_ERR(sc, "Device not yet supported.\n"); |
246 | ret = -ENODEV; | 246 | ret = -ENODEV; |
247 | goto err_free; | 247 | goto err; |
248 | } | 248 | } |
249 | 249 | ||
250 | /* | 250 | /* |
@@ -252,7 +252,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
252 | */ | 252 | */ |
253 | ret = ath5k_hw_post(ah); | 253 | ret = ath5k_hw_post(ah); |
254 | if (ret) | 254 | if (ret) |
255 | goto err_free; | 255 | goto err; |
256 | 256 | ||
257 | /* Enable pci core retry fix on Hainan (5213A) and later chips */ | 257 | /* Enable pci core retry fix on Hainan (5213A) and later chips */ |
258 | if (srev >= AR5K_SREV_AR5213A) | 258 | if (srev >= AR5K_SREV_AR5213A) |
@@ -265,7 +265,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
265 | ret = ath5k_eeprom_init(ah); | 265 | ret = ath5k_eeprom_init(ah); |
266 | if (ret) { | 266 | if (ret) { |
267 | ATH5K_ERR(sc, "unable to init EEPROM\n"); | 267 | ATH5K_ERR(sc, "unable to init EEPROM\n"); |
268 | goto err_free; | 268 | goto err; |
269 | } | 269 | } |
270 | 270 | ||
271 | ee = &ah->ah_capabilities.cap_eeprom; | 271 | ee = &ah->ah_capabilities.cap_eeprom; |
@@ -307,7 +307,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
307 | if (ret) { | 307 | if (ret) { |
308 | ATH5K_ERR(sc, "unable to get device capabilities: 0x%04x\n", | 308 | ATH5K_ERR(sc, "unable to get device capabilities: 0x%04x\n", |
309 | sc->pdev->device); | 309 | sc->pdev->device); |
310 | goto err_free; | 310 | goto err; |
311 | } | 311 | } |
312 | 312 | ||
313 | /* Crypto settings */ | 313 | /* Crypto settings */ |
@@ -341,8 +341,7 @@ int ath5k_hw_attach(struct ath5k_softc *sc) | |||
341 | ath5k_hw_set_ledstate(ah, AR5K_LED_INIT); | 341 | ath5k_hw_set_ledstate(ah, AR5K_LED_INIT); |
342 | 342 | ||
343 | return 0; | 343 | return 0; |
344 | err_free: | 344 | err: |
345 | kfree(ah); | ||
346 | return ret; | 345 | return ret; |
347 | } | 346 | } |
348 | 347 | ||
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index f1ae75d35d5d..8251946842e6 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c | |||
@@ -3580,6 +3580,7 @@ ath5k_pci_probe(struct pci_dev *pdev, | |||
3580 | common->ah = sc->ah; | 3580 | common->ah = sc->ah; |
3581 | common->hw = hw; | 3581 | common->hw = hw; |
3582 | common->cachelsz = csz << 2; /* convert to bytes */ | 3582 | common->cachelsz = csz << 2; /* convert to bytes */ |
3583 | spin_lock_init(&common->cc_lock); | ||
3583 | 3584 | ||
3584 | /* Initialize device */ | 3585 | /* Initialize device */ |
3585 | ret = ath5k_hw_attach(sc); | 3586 | ret = ath5k_hw_attach(sc); |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c index a0471f2e1c7a..48261b7252d0 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c | |||
@@ -410,6 +410,9 @@ static void ar9002_hw_configpcipowersave(struct ath_hw *ah, | |||
410 | val &= ~(AR_WA_BIT6 | AR_WA_BIT7); | 410 | val &= ~(AR_WA_BIT6 | AR_WA_BIT7); |
411 | } | 411 | } |
412 | 412 | ||
413 | if (AR_SREV_9280(ah)) | ||
414 | val |= AR_WA_BIT22; | ||
415 | |||
413 | if (AR_SREV_9285E_20(ah)) | 416 | if (AR_SREV_9285E_20(ah)) |
414 | val |= AR_WA_BIT23; | 417 | val |= AR_WA_BIT23; |
415 | 418 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h index ec98ab50748a..a14a5e43cf56 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h | |||
@@ -34,6 +34,10 @@ static const u32 ar9300_2p2_radio_postamble[][5] = { | |||
34 | 34 | ||
35 | static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = { | 35 | static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = { |
36 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | 36 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
37 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
38 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
39 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
40 | {0x0000a2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
37 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | 41 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
38 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | 42 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
39 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | 43 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
@@ -99,6 +103,30 @@ static const u32 ar9300Modes_lowest_ob_db_tx_gain_table_2p2[][5] = { | |||
99 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | 103 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
100 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | 104 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
101 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | 105 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
106 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
107 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
108 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
109 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
110 | {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
111 | {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, | ||
112 | {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, | ||
113 | {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, | ||
114 | {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, | ||
115 | {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, | ||
116 | {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, | ||
117 | {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, | ||
118 | {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
119 | {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
120 | {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
121 | {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
122 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
123 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
124 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
125 | {0x0000b2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
126 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
127 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
128 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
129 | {0x0000c2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
102 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | 130 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
103 | {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, | 131 | {0x00016048, 0x62480001, 0x62480001, 0x62480001, 0x62480001}, |
104 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | 132 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
@@ -118,7 +146,7 @@ static const u32 ar9300Modes_fast_clock_2p2[][3] = { | |||
118 | {0x00008014, 0x044c044c, 0x08980898}, | 146 | {0x00008014, 0x044c044c, 0x08980898}, |
119 | {0x0000801c, 0x148ec02b, 0x148ec057}, | 147 | {0x0000801c, 0x148ec02b, 0x148ec057}, |
120 | {0x00008318, 0x000044c0, 0x00008980}, | 148 | {0x00008318, 0x000044c0, 0x00008980}, |
121 | {0x00009e00, 0x03721821, 0x03721821}, | 149 | {0x00009e00, 0x0372131c, 0x0372131c}, |
122 | {0x0000a230, 0x0000000b, 0x00000016}, | 150 | {0x0000a230, 0x0000000b, 0x00000016}, |
123 | {0x0000a254, 0x00000898, 0x00001130}, | 151 | {0x0000a254, 0x00000898, 0x00001130}, |
124 | }; | 152 | }; |
@@ -595,15 +623,16 @@ static const u32 ar9300_2p2_baseband_postamble[][5] = { | |||
595 | {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, | 623 | {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4}, |
596 | {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, | 624 | {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c}, |
597 | {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4}, | 625 | {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4}, |
598 | {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0}, | 626 | {0x00009e00, 0x0372111a, 0x0372111a, 0x037216a0, 0x037216a0}, |
599 | {0x00009e04, 0x00802020, 0x00802020, 0x00802020, 0x00802020}, | 627 | {0x00009e04, 0x001c2020, 0x001c2020, 0x001c2020, 0x001c2020}, |
600 | {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, | 628 | {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2}, |
601 | {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, | 629 | {0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e}, |
602 | {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e}, | 630 | {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3379605e, 0x33795d5e}, |
603 | {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | 631 | {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
604 | {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, | 632 | {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c}, |
605 | {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, | 633 | {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce}, |
606 | {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, | 634 | {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021}, |
635 | {0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222}, | ||
607 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, | 636 | {0x00009e44, 0x02321e27, 0x02321e27, 0x02291e27, 0x02291e27}, |
608 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, | 637 | {0x00009e48, 0x5030201a, 0x5030201a, 0x50302012, 0x50302012}, |
609 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, | 638 | {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000}, |
@@ -624,16 +653,16 @@ static const u32 ar9300_2p2_baseband_postamble[][5] = { | |||
624 | {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, | 653 | {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222}, |
625 | {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, | 654 | {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18}, |
626 | {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, | 655 | {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071982}, |
627 | {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a}, | 656 | {0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a}, |
628 | {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | 657 | {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
629 | {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | 658 | {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
630 | {0x0000ae04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | 659 | {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000}, |
631 | {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | 660 | {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
632 | {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | 661 | {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
633 | {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | 662 | {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
634 | {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, | 663 | {0x0000b284, 0x00000000, 0x00000000, 0x00000150, 0x00000150}, |
635 | {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | 664 | {0x0000b830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
636 | {0x0000be04, 0x00800000, 0x00800000, 0x00800000, 0x00800000}, | 665 | {0x0000be04, 0x001c0000, 0x001c0000, 0x001c0000, 0x001c0000}, |
637 | {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | 666 | {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
638 | {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, | 667 | {0x0000be1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c}, |
639 | {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, | 668 | {0x0000be20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce}, |
@@ -649,13 +678,13 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
649 | {0x00009814, 0x9280c00a}, | 678 | {0x00009814, 0x9280c00a}, |
650 | {0x00009818, 0x00000000}, | 679 | {0x00009818, 0x00000000}, |
651 | {0x0000981c, 0x00020028}, | 680 | {0x0000981c, 0x00020028}, |
652 | {0x00009834, 0x5f3ca3de}, | 681 | {0x00009834, 0x6400a290}, |
653 | {0x00009838, 0x0108ecff}, | 682 | {0x00009838, 0x0108ecff}, |
654 | {0x0000983c, 0x14750600}, | 683 | {0x0000983c, 0x14750600}, |
655 | {0x00009880, 0x201fff00}, | 684 | {0x00009880, 0x201fff00}, |
656 | {0x00009884, 0x00001042}, | 685 | {0x00009884, 0x00001042}, |
657 | {0x000098a4, 0x00200400}, | 686 | {0x000098a4, 0x00200400}, |
658 | {0x000098b0, 0x52440bbe}, | 687 | {0x000098b0, 0x32840bbe}, |
659 | {0x000098d0, 0x004b6a8e}, | 688 | {0x000098d0, 0x004b6a8e}, |
660 | {0x000098d4, 0x00000820}, | 689 | {0x000098d4, 0x00000820}, |
661 | {0x000098dc, 0x00000000}, | 690 | {0x000098dc, 0x00000000}, |
@@ -681,7 +710,6 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
681 | {0x00009e30, 0x06336f77}, | 710 | {0x00009e30, 0x06336f77}, |
682 | {0x00009e34, 0x6af6532f}, | 711 | {0x00009e34, 0x6af6532f}, |
683 | {0x00009e38, 0x0cc80c00}, | 712 | {0x00009e38, 0x0cc80c00}, |
684 | {0x00009e3c, 0xcf946222}, | ||
685 | {0x00009e40, 0x0d261820}, | 713 | {0x00009e40, 0x0d261820}, |
686 | {0x00009e4c, 0x00001004}, | 714 | {0x00009e4c, 0x00001004}, |
687 | {0x00009e50, 0x00ff03f1}, | 715 | {0x00009e50, 0x00ff03f1}, |
@@ -694,7 +722,7 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
694 | {0x0000a220, 0x00000000}, | 722 | {0x0000a220, 0x00000000}, |
695 | {0x0000a224, 0x00000000}, | 723 | {0x0000a224, 0x00000000}, |
696 | {0x0000a228, 0x10002310}, | 724 | {0x0000a228, 0x10002310}, |
697 | {0x0000a22c, 0x01036a1e}, | 725 | {0x0000a22c, 0x01036a27}, |
698 | {0x0000a23c, 0x00000000}, | 726 | {0x0000a23c, 0x00000000}, |
699 | {0x0000a244, 0x0c000000}, | 727 | {0x0000a244, 0x0c000000}, |
700 | {0x0000a2a0, 0x00000001}, | 728 | {0x0000a2a0, 0x00000001}, |
@@ -702,10 +730,6 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
702 | {0x0000a2c8, 0x00000000}, | 730 | {0x0000a2c8, 0x00000000}, |
703 | {0x0000a2cc, 0x18c43433}, | 731 | {0x0000a2cc, 0x18c43433}, |
704 | {0x0000a2d4, 0x00000000}, | 732 | {0x0000a2d4, 0x00000000}, |
705 | {0x0000a2dc, 0x00000000}, | ||
706 | {0x0000a2e0, 0x00000000}, | ||
707 | {0x0000a2e4, 0x00000000}, | ||
708 | {0x0000a2e8, 0x00000000}, | ||
709 | {0x0000a2ec, 0x00000000}, | 733 | {0x0000a2ec, 0x00000000}, |
710 | {0x0000a2f0, 0x00000000}, | 734 | {0x0000a2f0, 0x00000000}, |
711 | {0x0000a2f4, 0x00000000}, | 735 | {0x0000a2f4, 0x00000000}, |
@@ -753,33 +777,17 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
753 | {0x0000a430, 0x1ce739ce}, | 777 | {0x0000a430, 0x1ce739ce}, |
754 | {0x0000a434, 0x00000000}, | 778 | {0x0000a434, 0x00000000}, |
755 | {0x0000a438, 0x00001801}, | 779 | {0x0000a438, 0x00001801}, |
756 | {0x0000a43c, 0x00000000}, | 780 | {0x0000a43c, 0x00100000}, |
757 | {0x0000a440, 0x00000000}, | 781 | {0x0000a440, 0x00000000}, |
758 | {0x0000a444, 0x00000000}, | 782 | {0x0000a444, 0x00000000}, |
759 | {0x0000a448, 0x06000080}, | 783 | {0x0000a448, 0x06000080}, |
760 | {0x0000a44c, 0x00000001}, | 784 | {0x0000a44c, 0x00000001}, |
761 | {0x0000a450, 0x00010000}, | 785 | {0x0000a450, 0x00010000}, |
762 | {0x0000a458, 0x00000000}, | 786 | {0x0000a458, 0x00000000}, |
763 | {0x0000a600, 0x00000000}, | ||
764 | {0x0000a604, 0x00000000}, | ||
765 | {0x0000a608, 0x00000000}, | ||
766 | {0x0000a60c, 0x00000000}, | ||
767 | {0x0000a610, 0x00000000}, | ||
768 | {0x0000a614, 0x00000000}, | ||
769 | {0x0000a618, 0x00000000}, | ||
770 | {0x0000a61c, 0x00000000}, | ||
771 | {0x0000a620, 0x00000000}, | ||
772 | {0x0000a624, 0x00000000}, | ||
773 | {0x0000a628, 0x00000000}, | ||
774 | {0x0000a62c, 0x00000000}, | ||
775 | {0x0000a630, 0x00000000}, | ||
776 | {0x0000a634, 0x00000000}, | ||
777 | {0x0000a638, 0x00000000}, | ||
778 | {0x0000a63c, 0x00000000}, | ||
779 | {0x0000a640, 0x00000000}, | 787 | {0x0000a640, 0x00000000}, |
780 | {0x0000a644, 0x3fad9d74}, | 788 | {0x0000a644, 0x3fad9d74}, |
781 | {0x0000a648, 0x0048060a}, | 789 | {0x0000a648, 0x0048060a}, |
782 | {0x0000a64c, 0x00000637}, | 790 | {0x0000a64c, 0x00003c37}, |
783 | {0x0000a670, 0x03020100}, | 791 | {0x0000a670, 0x03020100}, |
784 | {0x0000a674, 0x09080504}, | 792 | {0x0000a674, 0x09080504}, |
785 | {0x0000a678, 0x0d0c0b0a}, | 793 | {0x0000a678, 0x0d0c0b0a}, |
@@ -802,10 +810,6 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
802 | {0x0000a8f4, 0x00000000}, | 810 | {0x0000a8f4, 0x00000000}, |
803 | {0x0000b2d0, 0x00000080}, | 811 | {0x0000b2d0, 0x00000080}, |
804 | {0x0000b2d4, 0x00000000}, | 812 | {0x0000b2d4, 0x00000000}, |
805 | {0x0000b2dc, 0x00000000}, | ||
806 | {0x0000b2e0, 0x00000000}, | ||
807 | {0x0000b2e4, 0x00000000}, | ||
808 | {0x0000b2e8, 0x00000000}, | ||
809 | {0x0000b2ec, 0x00000000}, | 813 | {0x0000b2ec, 0x00000000}, |
810 | {0x0000b2f0, 0x00000000}, | 814 | {0x0000b2f0, 0x00000000}, |
811 | {0x0000b2f4, 0x00000000}, | 815 | {0x0000b2f4, 0x00000000}, |
@@ -820,10 +824,6 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
820 | {0x0000b8f4, 0x00000000}, | 824 | {0x0000b8f4, 0x00000000}, |
821 | {0x0000c2d0, 0x00000080}, | 825 | {0x0000c2d0, 0x00000080}, |
822 | {0x0000c2d4, 0x00000000}, | 826 | {0x0000c2d4, 0x00000000}, |
823 | {0x0000c2dc, 0x00000000}, | ||
824 | {0x0000c2e0, 0x00000000}, | ||
825 | {0x0000c2e4, 0x00000000}, | ||
826 | {0x0000c2e8, 0x00000000}, | ||
827 | {0x0000c2ec, 0x00000000}, | 827 | {0x0000c2ec, 0x00000000}, |
828 | {0x0000c2f0, 0x00000000}, | 828 | {0x0000c2f0, 0x00000000}, |
829 | {0x0000c2f4, 0x00000000}, | 829 | {0x0000c2f4, 0x00000000}, |
@@ -835,6 +835,10 @@ static const u32 ar9300_2p2_baseband_core[][2] = { | |||
835 | 835 | ||
836 | static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { | 836 | static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { |
837 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | 837 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
838 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
839 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
840 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
841 | {0x0000a2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
838 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, | 842 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, |
839 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | 843 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
840 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, | 844 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, |
@@ -855,7 +859,7 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { | |||
855 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, | 859 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, |
856 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, | 860 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, |
857 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, | 861 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, |
858 | {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, | 862 | {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83}, |
859 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, | 863 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, |
860 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, | 864 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, |
861 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, | 865 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, |
@@ -900,6 +904,30 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { | |||
900 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | 904 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, |
901 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | 905 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, |
902 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | 906 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, |
907 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
908 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
909 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
910 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
911 | {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000}, | ||
912 | {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000}, | ||
913 | {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501}, | ||
914 | {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501}, | ||
915 | {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03}, | ||
916 | {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04}, | ||
917 | {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04}, | ||
918 | {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
919 | {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
920 | {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
921 | {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
922 | {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
923 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
924 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
925 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
926 | {0x0000b2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
927 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
928 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
929 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
930 | {0x0000c2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
903 | {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, | 931 | {0x00016044, 0x056db2e6, 0x056db2e6, 0x056db2e6, 0x056db2e6}, |
904 | {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, | 932 | {0x00016048, 0xae480001, 0xae480001, 0xae480001, 0xae480001}, |
905 | {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, | 933 | {0x00016068, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c, 0x6eb6db6c}, |
@@ -913,6 +941,10 @@ static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = { | |||
913 | 941 | ||
914 | static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = { | 942 | static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = { |
915 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | 943 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
944 | {0x0000a2dc, 0x01feee00, 0x01feee00, 0x00637800, 0x00637800}, | ||
945 | {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03838000, 0x03838000}, | ||
946 | {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03fc0000, 0x03fc0000}, | ||
947 | {0x0000a2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
916 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, | 948 | {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9}, |
917 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, | 949 | {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000}, |
918 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, | 950 | {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002}, |
@@ -933,7 +965,7 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = { | |||
933 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, | 965 | {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660}, |
934 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, | 966 | {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861}, |
935 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, | 967 | {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81}, |
936 | {0x0000a54c, 0x59025eb5, 0x59025eb5, 0x42001a83, 0x42001a83}, | 968 | {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83}, |
937 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, | 969 | {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84}, |
938 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, | 970 | {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3}, |
939 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, | 971 | {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5}, |
@@ -978,6 +1010,30 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = { | |||
978 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | 1010 | {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, |
979 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | 1011 | {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, |
980 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, | 1012 | {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec}, |
1013 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1014 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1015 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1016 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1017 | {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000}, | ||
1018 | {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000}, | ||
1019 | {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501}, | ||
1020 | {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501}, | ||
1021 | {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03}, | ||
1022 | {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04}, | ||
1023 | {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04}, | ||
1024 | {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
1025 | {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
1026 | {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
1027 | {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
1028 | {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005}, | ||
1029 | {0x0000b2dc, 0x01feee00, 0x01feee00, 0x00637800, 0x00637800}, | ||
1030 | {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03838000, 0x03838000}, | ||
1031 | {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03fc0000, 0x03fc0000}, | ||
1032 | {0x0000b2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1033 | {0x0000c2dc, 0x01feee00, 0x01feee00, 0x00637800, 0x00637800}, | ||
1034 | {0x0000c2e0, 0x0000f000, 0x0000f000, 0x03838000, 0x03838000}, | ||
1035 | {0x0000c2e4, 0x01ff0000, 0x01ff0000, 0x03fc0000, 0x03fc0000}, | ||
1036 | {0x0000c2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
981 | {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, | 1037 | {0x00016044, 0x056db2e4, 0x056db2e4, 0x056db2e4, 0x056db2e4}, |
982 | {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, | 1038 | {0x00016048, 0x8e480001, 0x8e480001, 0x8e480001, 0x8e480001}, |
983 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | 1039 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
@@ -1151,14 +1207,14 @@ static const u32 ar9300Common_rx_gain_table_2p2[][2] = { | |||
1151 | {0x0000b074, 0x00000000}, | 1207 | {0x0000b074, 0x00000000}, |
1152 | {0x0000b078, 0x00000000}, | 1208 | {0x0000b078, 0x00000000}, |
1153 | {0x0000b07c, 0x00000000}, | 1209 | {0x0000b07c, 0x00000000}, |
1154 | {0x0000b080, 0x32323232}, | 1210 | {0x0000b080, 0x2a2d2f32}, |
1155 | {0x0000b084, 0x2f2f3232}, | 1211 | {0x0000b084, 0x21232328}, |
1156 | {0x0000b088, 0x23282a2d}, | 1212 | {0x0000b088, 0x19191c1e}, |
1157 | {0x0000b08c, 0x1c1e2123}, | 1213 | {0x0000b08c, 0x12141417}, |
1158 | {0x0000b090, 0x14171919}, | 1214 | {0x0000b090, 0x07070e0e}, |
1159 | {0x0000b094, 0x0e0e1214}, | 1215 | {0x0000b094, 0x03030305}, |
1160 | {0x0000b098, 0x03050707}, | 1216 | {0x0000b098, 0x00000003}, |
1161 | {0x0000b09c, 0x00030303}, | 1217 | {0x0000b09c, 0x00000000}, |
1162 | {0x0000b0a0, 0x00000000}, | 1218 | {0x0000b0a0, 0x00000000}, |
1163 | {0x0000b0a4, 0x00000000}, | 1219 | {0x0000b0a4, 0x00000000}, |
1164 | {0x0000b0a8, 0x00000000}, | 1220 | {0x0000b0a8, 0x00000000}, |
@@ -1251,6 +1307,10 @@ static const u32 ar9300Common_rx_gain_table_2p2[][2] = { | |||
1251 | 1307 | ||
1252 | static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = { | 1308 | static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = { |
1253 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ | 1309 | /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */ |
1310 | {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
1311 | {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
1312 | {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
1313 | {0x0000a2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1254 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, | 1314 | {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9}, |
1255 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | 1315 | {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, |
1256 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, | 1316 | {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002}, |
@@ -1316,6 +1376,30 @@ static const u32 ar9300Modes_low_ob_db_tx_gain_table_2p2[][5] = { | |||
1316 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | 1376 | {0x0000a5f4, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
1317 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | 1377 | {0x0000a5f8, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
1318 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, | 1378 | {0x0000a5fc, 0x7782b08c, 0x7782b08c, 0x5d801eec, 0x5d801eec}, |
1379 | {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1380 | {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1381 | {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1382 | {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1383 | {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1384 | {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000}, | ||
1385 | {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501}, | ||
1386 | {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501}, | ||
1387 | {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03}, | ||
1388 | {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04}, | ||
1389 | {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04}, | ||
1390 | {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005}, | ||
1391 | {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
1392 | {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
1393 | {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
1394 | {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005}, | ||
1395 | {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
1396 | {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
1397 | {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
1398 | {0x0000b2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1399 | {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x00637800, 0x00637800}, | ||
1400 | {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03838000, 0x03838000}, | ||
1401 | {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03fc0000, 0x03fc0000}, | ||
1402 | {0x0000c2e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, | ||
1319 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, | 1403 | {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4}, |
1320 | {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, | 1404 | {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001}, |
1321 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, | 1405 | {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c}, |
@@ -1414,15 +1498,10 @@ static const u32 ar9300_2p2_mac_core[][2] = { | |||
1414 | {0x00008144, 0xffffffff}, | 1498 | {0x00008144, 0xffffffff}, |
1415 | {0x00008168, 0x00000000}, | 1499 | {0x00008168, 0x00000000}, |
1416 | {0x0000816c, 0x00000000}, | 1500 | {0x0000816c, 0x00000000}, |
1417 | {0x00008170, 0x18486200}, | ||
1418 | {0x00008174, 0x33332210}, | ||
1419 | {0x00008178, 0x00000000}, | ||
1420 | {0x0000817c, 0x00020000}, | ||
1421 | {0x000081c0, 0x00000000}, | 1501 | {0x000081c0, 0x00000000}, |
1422 | {0x000081c4, 0x33332210}, | 1502 | {0x000081c4, 0x33332210}, |
1423 | {0x000081c8, 0x00000000}, | 1503 | {0x000081c8, 0x00000000}, |
1424 | {0x000081cc, 0x00000000}, | 1504 | {0x000081cc, 0x00000000}, |
1425 | {0x000081d4, 0x00000000}, | ||
1426 | {0x000081ec, 0x00000000}, | 1505 | {0x000081ec, 0x00000000}, |
1427 | {0x000081f0, 0x00000000}, | 1506 | {0x000081f0, 0x00000000}, |
1428 | {0x000081f4, 0x00000000}, | 1507 | {0x000081f4, 0x00000000}, |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c index 7c38229ba670..716db414c258 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c | |||
@@ -347,6 +347,10 @@ static bool create_pa_curve(u32 *data_L, u32 *data_U, u32 *pa_table, u16 *gain) | |||
347 | (((Y[6] - Y[3]) * 1 << scale_factor) + | 347 | (((Y[6] - Y[3]) * 1 << scale_factor) + |
348 | (x_est[6] - x_est[3])) / (x_est[6] - x_est[3]); | 348 | (x_est[6] - x_est[3])) / (x_est[6] - x_est[3]); |
349 | 349 | ||
350 | /* prevent division by zero */ | ||
351 | if (G_fxp == 0) | ||
352 | return false; | ||
353 | |||
350 | Y_intercept = | 354 | Y_intercept = |
351 | (G_fxp * (x_est[0] - x_est[3]) + | 355 | (G_fxp * (x_est[0] - x_est[3]) + |
352 | (1 << scale_factor)) / (1 << scale_factor) + Y[3]; | 356 | (1 << scale_factor)) / (1 << scale_factor) + Y[3]; |
@@ -356,14 +360,12 @@ static bool create_pa_curve(u32 *data_L, u32 *data_U, u32 *pa_table, u16 *gain) | |||
356 | 360 | ||
357 | for (i = 0; i <= 3; i++) { | 361 | for (i = 0; i <= 3; i++) { |
358 | y_est[i] = i * 32; | 362 | y_est[i] = i * 32; |
359 | |||
360 | /* prevent division by zero */ | ||
361 | if (G_fxp == 0) | ||
362 | return false; | ||
363 | |||
364 | x_est[i] = ((y_est[i] * 1 << scale_factor) + G_fxp) / G_fxp; | 363 | x_est[i] = ((y_est[i] * 1 << scale_factor) + G_fxp) / G_fxp; |
365 | } | 364 | } |
366 | 365 | ||
366 | if (y_est[max_index] == 0) | ||
367 | return false; | ||
368 | |||
367 | x_est_fxp1_nonlin = | 369 | x_est_fxp1_nonlin = |
368 | x_est[max_index] - ((1 << scale_factor) * y_est[max_index] + | 370 | x_est[max_index] - ((1 << scale_factor) * y_est[max_index] + |
369 | G_fxp) / G_fxp; | 371 | G_fxp) / G_fxp; |
@@ -457,6 +459,8 @@ static bool create_pa_curve(u32 *data_L, u32 *data_U, u32 *pa_table, u16 *gain) | |||
457 | 459 | ||
458 | Q_scale_B = find_proper_scale(find_expn(abs(scale_B)), 10); | 460 | Q_scale_B = find_proper_scale(find_expn(abs(scale_B)), 10); |
459 | scale_B = scale_B / (1 << Q_scale_B); | 461 | scale_B = scale_B / (1 << Q_scale_B); |
462 | if (scale_B == 0) | ||
463 | return false; | ||
460 | Q_beta = find_proper_scale(find_expn(abs(beta_raw)), 10); | 464 | Q_beta = find_proper_scale(find_expn(abs(beta_raw)), 10); |
461 | Q_alpha = find_proper_scale(find_expn(abs(alpha_raw)), 10); | 465 | Q_alpha = find_proper_scale(find_expn(abs(alpha_raw)), 10); |
462 | beta_raw = beta_raw / (1 << Q_beta); | 466 | beta_raw = beta_raw / (1 << Q_beta); |
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index 973c919fdd27..170d44a35ccb 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -310,7 +310,7 @@ struct ath_rx { | |||
310 | u8 rxotherant; | 310 | u8 rxotherant; |
311 | u32 *rxlink; | 311 | u32 *rxlink; |
312 | unsigned int rxfilter; | 312 | unsigned int rxfilter; |
313 | spinlock_t rxflushlock; | 313 | spinlock_t pcu_lock; |
314 | spinlock_t rxbuflock; | 314 | spinlock_t rxbuflock; |
315 | struct list_head rxbuf; | 315 | struct list_head rxbuf; |
316 | struct ath_descdma rxdma; | 316 | struct ath_descdma rxdma; |
@@ -675,6 +675,7 @@ static inline void ath_read_cachesize(struct ath_common *common, int *csz) | |||
675 | } | 675 | } |
676 | 676 | ||
677 | extern struct ieee80211_ops ath9k_ops; | 677 | extern struct ieee80211_ops ath9k_ops; |
678 | extern struct pm_qos_request_list ath9k_pm_qos_req; | ||
678 | extern int modparam_nohwcrypt; | 679 | extern int modparam_nohwcrypt; |
679 | extern int led_blink; | 680 | extern int led_blink; |
680 | 681 | ||
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c index 4ed010d4ef96..19891e7d49ae 100644 --- a/drivers/net/wireless/ath/ath9k/beacon.c +++ b/drivers/net/wireless/ath/ath9k/beacon.c | |||
@@ -370,7 +370,7 @@ void ath_beacon_tasklet(unsigned long data) | |||
370 | ath_print(common, ATH_DBG_BSTUCK, | 370 | ath_print(common, ATH_DBG_BSTUCK, |
371 | "beacon is officially stuck\n"); | 371 | "beacon is officially stuck\n"); |
372 | sc->sc_flags |= SC_OP_TSF_RESET; | 372 | sc->sc_flags |= SC_OP_TSF_RESET; |
373 | ath_reset(sc, false); | 373 | ath_reset(sc, true); |
374 | } | 374 | } |
375 | 375 | ||
376 | return; | 376 | return; |
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c index 966b9496a9dd..195406db3bd8 100644 --- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c +++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c | |||
@@ -37,7 +37,7 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah) | |||
37 | int addr, eep_start_loc; | 37 | int addr, eep_start_loc; |
38 | eep_data = (u16 *)eep; | 38 | eep_data = (u16 *)eep; |
39 | 39 | ||
40 | if (ah->hw_version.devid == 0x7015) | 40 | if (AR9287_HTC_DEVID(ah)) |
41 | eep_start_loc = AR9287_HTC_EEP_START_LOC; | 41 | eep_start_loc = AR9287_HTC_EEP_START_LOC; |
42 | else | 42 | else |
43 | eep_start_loc = AR9287_EEP_START_LOC; | 43 | eep_start_loc = AR9287_EEP_START_LOC; |
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c index 728d904c74d7..dfb6560dab92 100644 --- a/drivers/net/wireless/ath/ath9k/hif_usb.c +++ b/drivers/net/wireless/ath/ath9k/hif_usb.c | |||
@@ -35,8 +35,14 @@ static struct usb_device_id ath9k_hif_usb_ids[] = { | |||
35 | { USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */ | 35 | { USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */ |
36 | { USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */ | 36 | { USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */ |
37 | { USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */ | 37 | { USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */ |
38 | { USB_DEVICE(0x13D3, 0x3346) }, /* IMC Networks */ | ||
39 | { USB_DEVICE(0x13D3, 0x3348) }, /* Azurewave */ | ||
40 | { USB_DEVICE(0x13D3, 0x3349) }, /* Azurewave */ | ||
41 | { USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */ | ||
38 | { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */ | 42 | { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */ |
39 | { USB_DEVICE(0x083A, 0xA704) }, /* SMC Networks */ | 43 | { USB_DEVICE(0x083A, 0xA704) }, /* SMC Networks */ |
44 | { USB_DEVICE(0x040D, 0x3801) }, /* VIA */ | ||
45 | { USB_DEVICE(0x1668, 0x1200) }, /* Verizon */ | ||
40 | { }, | 46 | { }, |
41 | }; | 47 | }; |
42 | 48 | ||
@@ -540,11 +546,11 @@ static void ath9k_hif_usb_reg_in_cb(struct urb *urb) | |||
540 | return; | 546 | return; |
541 | } | 547 | } |
542 | 548 | ||
543 | usb_fill_int_urb(urb, hif_dev->udev, | 549 | usb_fill_bulk_urb(urb, hif_dev->udev, |
544 | usb_rcvbulkpipe(hif_dev->udev, | 550 | usb_rcvbulkpipe(hif_dev->udev, |
545 | USB_REG_IN_PIPE), | 551 | USB_REG_IN_PIPE), |
546 | nskb->data, MAX_REG_IN_BUF_SIZE, | 552 | nskb->data, MAX_REG_IN_BUF_SIZE, |
547 | ath9k_hif_usb_reg_in_cb, nskb, 1); | 553 | ath9k_hif_usb_reg_in_cb, nskb); |
548 | 554 | ||
549 | ret = usb_submit_urb(urb, GFP_ATOMIC); | 555 | ret = usb_submit_urb(urb, GFP_ATOMIC); |
550 | if (ret) { | 556 | if (ret) { |
@@ -720,11 +726,11 @@ static int ath9k_hif_usb_alloc_reg_in_urb(struct hif_device_usb *hif_dev) | |||
720 | if (!skb) | 726 | if (!skb) |
721 | goto err; | 727 | goto err; |
722 | 728 | ||
723 | usb_fill_int_urb(hif_dev->reg_in_urb, hif_dev->udev, | 729 | usb_fill_bulk_urb(hif_dev->reg_in_urb, hif_dev->udev, |
724 | usb_rcvbulkpipe(hif_dev->udev, | 730 | usb_rcvbulkpipe(hif_dev->udev, |
725 | USB_REG_IN_PIPE), | 731 | USB_REG_IN_PIPE), |
726 | skb->data, MAX_REG_IN_BUF_SIZE, | 732 | skb->data, MAX_REG_IN_BUF_SIZE, |
727 | ath9k_hif_usb_reg_in_cb, skb, 1); | 733 | ath9k_hif_usb_reg_in_cb, skb); |
728 | 734 | ||
729 | if (usb_submit_urb(hif_dev->reg_in_urb, GFP_KERNEL) != 0) | 735 | if (usb_submit_urb(hif_dev->reg_in_urb, GFP_KERNEL) != 0) |
730 | goto err; | 736 | goto err; |
@@ -801,10 +807,18 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) | |||
801 | } | 807 | } |
802 | kfree(buf); | 808 | kfree(buf); |
803 | 809 | ||
804 | if ((hif_dev->device_id == 0x7010) || (hif_dev->device_id == 0x7015)) | 810 | switch (hif_dev->device_id) { |
811 | case 0x7010: | ||
812 | case 0x7015: | ||
813 | case 0x9018: | ||
814 | case 0xA704: | ||
815 | case 0x1200: | ||
805 | firm_offset = AR7010_FIRMWARE_TEXT; | 816 | firm_offset = AR7010_FIRMWARE_TEXT; |
806 | else | 817 | break; |
818 | default: | ||
807 | firm_offset = AR9271_FIRMWARE_TEXT; | 819 | firm_offset = AR9271_FIRMWARE_TEXT; |
820 | break; | ||
821 | } | ||
808 | 822 | ||
809 | /* | 823 | /* |
810 | * Issue FW download complete command to firmware. | 824 | * Issue FW download complete command to firmware. |
@@ -837,14 +851,6 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev) | |||
837 | goto err_fw_req; | 851 | goto err_fw_req; |
838 | } | 852 | } |
839 | 853 | ||
840 | /* Alloc URBs */ | ||
841 | ret = ath9k_hif_usb_alloc_urbs(hif_dev); | ||
842 | if (ret) { | ||
843 | dev_err(&hif_dev->udev->dev, | ||
844 | "ath9k_htc: Unable to allocate URBs\n"); | ||
845 | goto err_urb; | ||
846 | } | ||
847 | |||
848 | /* Download firmware */ | 854 | /* Download firmware */ |
849 | ret = ath9k_hif_usb_download_fw(hif_dev); | 855 | ret = ath9k_hif_usb_download_fw(hif_dev); |
850 | if (ret) { | 856 | if (ret) { |
@@ -860,16 +866,22 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev) | |||
860 | */ | 866 | */ |
861 | for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) { | 867 | for (idx = 0; idx < alt->desc.bNumEndpoints; idx++) { |
862 | endp = &alt->endpoint[idx].desc; | 868 | endp = &alt->endpoint[idx].desc; |
863 | if (((endp->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) | 869 | if ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) |
864 | == 0x04) && | 870 | == USB_ENDPOINT_XFER_INT) { |
865 | ((endp->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) | ||
866 | == USB_ENDPOINT_XFER_INT)) { | ||
867 | endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK; | 871 | endp->bmAttributes &= ~USB_ENDPOINT_XFERTYPE_MASK; |
868 | endp->bmAttributes |= USB_ENDPOINT_XFER_BULK; | 872 | endp->bmAttributes |= USB_ENDPOINT_XFER_BULK; |
869 | endp->bInterval = 0; | 873 | endp->bInterval = 0; |
870 | } | 874 | } |
871 | } | 875 | } |
872 | 876 | ||
877 | /* Alloc URBs */ | ||
878 | ret = ath9k_hif_usb_alloc_urbs(hif_dev); | ||
879 | if (ret) { | ||
880 | dev_err(&hif_dev->udev->dev, | ||
881 | "ath9k_htc: Unable to allocate URBs\n"); | ||
882 | goto err_urb; | ||
883 | } | ||
884 | |||
873 | return 0; | 885 | return 0; |
874 | 886 | ||
875 | err_fw_download: | 887 | err_fw_download: |
@@ -923,6 +935,8 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface, | |||
923 | case 0x7010: | 935 | case 0x7010: |
924 | case 0x7015: | 936 | case 0x7015: |
925 | case 0x9018: | 937 | case 0x9018: |
938 | case 0xA704: | ||
939 | case 0x1200: | ||
926 | if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202) | 940 | if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202) |
927 | hif_dev->fw_name = FIRMWARE_AR7010_1_1; | 941 | hif_dev->fw_name = FIRMWARE_AR7010_1_1; |
928 | else | 942 | else |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c index 3d7b97f1b3ae..7c8a38d04561 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c | |||
@@ -249,6 +249,8 @@ static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid) | |||
249 | case 0x7010: | 249 | case 0x7010: |
250 | case 0x7015: | 250 | case 0x7015: |
251 | case 0x9018: | 251 | case 0x9018: |
252 | case 0xA704: | ||
253 | case 0x1200: | ||
252 | priv->htc->credits = 45; | 254 | priv->htc->credits = 45; |
253 | break; | 255 | break; |
254 | default: | 256 | default: |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c index 3d19b5bc937f..29d80ca78393 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_txrx.c | |||
@@ -121,7 +121,7 @@ int ath9k_htc_tx_start(struct ath9k_htc_priv *priv, struct sk_buff *skb) | |||
121 | tx_hdr.data_type = ATH9K_HTC_NORMAL; | 121 | tx_hdr.data_type = ATH9K_HTC_NORMAL; |
122 | } | 122 | } |
123 | 123 | ||
124 | if (ieee80211_is_data(fc)) { | 124 | if (ieee80211_is_data_qos(fc)) { |
125 | qc = ieee80211_get_qos_ctl(hdr); | 125 | qc = ieee80211_get_qos_ctl(hdr); |
126 | tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | 126 | tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK; |
127 | } | 127 | } |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index cc13ee117823..6ebc68bca91f 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -484,6 +484,7 @@ static int ath9k_hw_post_init(struct ath_hw *ah) | |||
484 | ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, | 484 | ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL, |
485 | "Failed allocating banks for " | 485 | "Failed allocating banks for " |
486 | "external radio\n"); | 486 | "external radio\n"); |
487 | ath9k_hw_rf_free_ext_banks(ah); | ||
487 | return ecode; | 488 | return ecode; |
488 | } | 489 | } |
489 | 490 | ||
@@ -952,9 +953,12 @@ static void ath9k_hw_set_operating_mode(struct ath_hw *ah, int opmode) | |||
952 | REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); | 953 | REG_SET_BIT(ah, AR_CFG, AR_CFG_AP_ADHOC_INDICATION); |
953 | break; | 954 | break; |
954 | case NL80211_IFTYPE_STATION: | 955 | case NL80211_IFTYPE_STATION: |
955 | case NL80211_IFTYPE_MONITOR: | ||
956 | REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE); | 956 | REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE); |
957 | break; | 957 | break; |
958 | default: | ||
959 | if (ah->is_monitoring) | ||
960 | REG_WRITE(ah, AR_STA_ID1, val | AR_STA_ID1_KSRCH_MODE); | ||
961 | break; | ||
958 | } | 962 | } |
959 | } | 963 | } |
960 | 964 | ||
@@ -1634,7 +1638,6 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period) | |||
1634 | 1638 | ||
1635 | switch (ah->opmode) { | 1639 | switch (ah->opmode) { |
1636 | case NL80211_IFTYPE_STATION: | 1640 | case NL80211_IFTYPE_STATION: |
1637 | case NL80211_IFTYPE_MONITOR: | ||
1638 | REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon)); | 1641 | REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(next_beacon)); |
1639 | REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff); | 1642 | REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff); |
1640 | REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff); | 1643 | REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff); |
@@ -1663,6 +1666,14 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period) | |||
1663 | AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN; | 1666 | AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN; |
1664 | break; | 1667 | break; |
1665 | default: | 1668 | default: |
1669 | if (ah->is_monitoring) { | ||
1670 | REG_WRITE(ah, AR_NEXT_TBTT_TIMER, | ||
1671 | TU_TO_USEC(next_beacon)); | ||
1672 | REG_WRITE(ah, AR_NEXT_DMA_BEACON_ALERT, 0xffff); | ||
1673 | REG_WRITE(ah, AR_NEXT_SWBA, 0x7ffff); | ||
1674 | flags |= AR_TBTT_TIMER_EN; | ||
1675 | break; | ||
1676 | } | ||
1666 | ath_print(ath9k_hw_common(ah), ATH_DBG_BEACON, | 1677 | ath_print(ath9k_hw_common(ah), ATH_DBG_BEACON, |
1667 | "%s: unsupported opmode: %d\n", | 1678 | "%s: unsupported opmode: %d\n", |
1668 | __func__, ah->opmode); | 1679 | __func__, ah->opmode); |
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index d032939768b0..d47d1b4b6002 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -622,6 +622,7 @@ struct ath_hw { | |||
622 | 622 | ||
623 | bool sw_mgmt_crypto; | 623 | bool sw_mgmt_crypto; |
624 | bool is_pciexpress; | 624 | bool is_pciexpress; |
625 | bool is_monitoring; | ||
625 | bool need_an_top2_fixup; | 626 | bool need_an_top2_fixup; |
626 | u16 tx_trig_level; | 627 | u16 tx_trig_level; |
627 | 628 | ||
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index bc6c4df9712c..92bc5c5f4876 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
@@ -15,6 +15,7 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/slab.h> | 17 | #include <linux/slab.h> |
18 | #include <linux/pm_qos_params.h> | ||
18 | 19 | ||
19 | #include "ath9k.h" | 20 | #include "ath9k.h" |
20 | 21 | ||
@@ -179,6 +180,8 @@ static const struct ath_ops ath9k_common_ops = { | |||
179 | .write = ath9k_iowrite32, | 180 | .write = ath9k_iowrite32, |
180 | }; | 181 | }; |
181 | 182 | ||
183 | struct pm_qos_request_list ath9k_pm_qos_req; | ||
184 | |||
182 | /**************************/ | 185 | /**************************/ |
183 | /* Initialization */ | 186 | /* Initialization */ |
184 | /**************************/ | 187 | /**************************/ |
@@ -577,6 +580,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid, | |||
577 | common->hw = sc->hw; | 580 | common->hw = sc->hw; |
578 | common->priv = sc; | 581 | common->priv = sc; |
579 | common->debug_mask = ath9k_debug; | 582 | common->debug_mask = ath9k_debug; |
583 | spin_lock_init(&common->cc_lock); | ||
580 | 584 | ||
581 | spin_lock_init(&sc->wiphy_lock); | 585 | spin_lock_init(&sc->wiphy_lock); |
582 | spin_lock_init(&sc->sc_resetlock); | 586 | spin_lock_init(&sc->sc_resetlock); |
@@ -755,6 +759,9 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid, | |||
755 | ath_init_leds(sc); | 759 | ath_init_leds(sc); |
756 | ath_start_rfkill_poll(sc); | 760 | ath_start_rfkill_poll(sc); |
757 | 761 | ||
762 | pm_qos_add_request(&ath9k_pm_qos_req, PM_QOS_CPU_DMA_LATENCY, | ||
763 | PM_QOS_DEFAULT_VALUE); | ||
764 | |||
758 | return 0; | 765 | return 0; |
759 | 766 | ||
760 | error_world: | 767 | error_world: |
@@ -823,6 +830,7 @@ void ath9k_deinit_device(struct ath_softc *sc) | |||
823 | } | 830 | } |
824 | 831 | ||
825 | ieee80211_unregister_hw(hw); | 832 | ieee80211_unregister_hw(hw); |
833 | pm_qos_remove_request(&ath9k_pm_qos_req); | ||
826 | ath_rx_cleanup(sc); | 834 | ath_rx_cleanup(sc); |
827 | ath_tx_cleanup(sc); | 835 | ath_tx_cleanup(sc); |
828 | ath9k_deinit_softc(sc); | 836 | ath9k_deinit_softc(sc); |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 3ff0e476c2b3..25d3ef4c338e 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -15,6 +15,7 @@ | |||
15 | */ | 15 | */ |
16 | 16 | ||
17 | #include <linux/nl80211.h> | 17 | #include <linux/nl80211.h> |
18 | #include <linux/pm_qos_params.h> | ||
18 | #include "ath9k.h" | 19 | #include "ath9k.h" |
19 | #include "btcoex.h" | 20 | #include "btcoex.h" |
20 | 21 | ||
@@ -93,11 +94,13 @@ void ath9k_ps_wakeup(struct ath_softc *sc) | |||
93 | { | 94 | { |
94 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); | 95 | struct ath_common *common = ath9k_hw_common(sc->sc_ah); |
95 | unsigned long flags; | 96 | unsigned long flags; |
97 | enum ath9k_power_mode power_mode; | ||
96 | 98 | ||
97 | spin_lock_irqsave(&sc->sc_pm_lock, flags); | 99 | spin_lock_irqsave(&sc->sc_pm_lock, flags); |
98 | if (++sc->ps_usecount != 1) | 100 | if (++sc->ps_usecount != 1) |
99 | goto unlock; | 101 | goto unlock; |
100 | 102 | ||
103 | power_mode = sc->sc_ah->power_mode; | ||
101 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); | 104 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); |
102 | 105 | ||
103 | /* | 106 | /* |
@@ -105,10 +108,12 @@ void ath9k_ps_wakeup(struct ath_softc *sc) | |||
105 | * useful data. Better clear them now so that they don't mess up | 108 | * useful data. Better clear them now so that they don't mess up |
106 | * survey data results. | 109 | * survey data results. |
107 | */ | 110 | */ |
108 | spin_lock(&common->cc_lock); | 111 | if (power_mode != ATH9K_PM_AWAKE) { |
109 | ath_hw_cycle_counters_update(common); | 112 | spin_lock(&common->cc_lock); |
110 | memset(&common->cc_survey, 0, sizeof(common->cc_survey)); | 113 | ath_hw_cycle_counters_update(common); |
111 | spin_unlock(&common->cc_lock); | 114 | memset(&common->cc_survey, 0, sizeof(common->cc_survey)); |
115 | spin_unlock(&common->cc_lock); | ||
116 | } | ||
112 | 117 | ||
113 | unlock: | 118 | unlock: |
114 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); | 119 | spin_unlock_irqrestore(&sc->sc_pm_lock, flags); |
@@ -182,6 +187,9 @@ static void ath_update_survey_stats(struct ath_softc *sc) | |||
182 | struct ath_cycle_counters *cc = &common->cc_survey; | 187 | struct ath_cycle_counters *cc = &common->cc_survey; |
183 | unsigned int div = common->clockrate * 1000; | 188 | unsigned int div = common->clockrate * 1000; |
184 | 189 | ||
190 | if (!ah->curchan) | ||
191 | return; | ||
192 | |||
185 | if (ah->power_mode == ATH9K_PM_AWAKE) | 193 | if (ah->power_mode == ATH9K_PM_AWAKE) |
186 | ath_hw_cycle_counters_update(common); | 194 | ath_hw_cycle_counters_update(common); |
187 | 195 | ||
@@ -238,6 +246,9 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
238 | */ | 246 | */ |
239 | ath9k_hw_set_interrupts(ah, 0); | 247 | ath9k_hw_set_interrupts(ah, 0); |
240 | ath_drain_all_txq(sc, false); | 248 | ath_drain_all_txq(sc, false); |
249 | |||
250 | spin_lock_bh(&sc->rx.pcu_lock); | ||
251 | |||
241 | stopped = ath_stoprecv(sc); | 252 | stopped = ath_stoprecv(sc); |
242 | 253 | ||
243 | /* XXX: do not flush receive queue here. We don't want | 254 | /* XXX: do not flush receive queue here. We don't want |
@@ -265,6 +276,7 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
265 | "reset status %d\n", | 276 | "reset status %d\n", |
266 | channel->center_freq, r); | 277 | channel->center_freq, r); |
267 | spin_unlock_bh(&sc->sc_resetlock); | 278 | spin_unlock_bh(&sc->sc_resetlock); |
279 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
268 | goto ps_restore; | 280 | goto ps_restore; |
269 | } | 281 | } |
270 | spin_unlock_bh(&sc->sc_resetlock); | 282 | spin_unlock_bh(&sc->sc_resetlock); |
@@ -273,9 +285,12 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, | |||
273 | ath_print(common, ATH_DBG_FATAL, | 285 | ath_print(common, ATH_DBG_FATAL, |
274 | "Unable to restart recv logic\n"); | 286 | "Unable to restart recv logic\n"); |
275 | r = -EIO; | 287 | r = -EIO; |
288 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
276 | goto ps_restore; | 289 | goto ps_restore; |
277 | } | 290 | } |
278 | 291 | ||
292 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
293 | |||
279 | ath_update_txpow(sc); | 294 | ath_update_txpow(sc); |
280 | ath9k_hw_set_interrupts(ah, ah->imask); | 295 | ath9k_hw_set_interrupts(ah, ah->imask); |
281 | 296 | ||
@@ -577,7 +592,7 @@ void ath_hw_check(struct work_struct *work) | |||
577 | 592 | ||
578 | msleep(1); | 593 | msleep(1); |
579 | } | 594 | } |
580 | ath_reset(sc, false); | 595 | ath_reset(sc, true); |
581 | 596 | ||
582 | out: | 597 | out: |
583 | ath9k_ps_restore(sc); | 598 | ath9k_ps_restore(sc); |
@@ -595,7 +610,7 @@ void ath9k_tasklet(unsigned long data) | |||
595 | ath9k_ps_wakeup(sc); | 610 | ath9k_ps_wakeup(sc); |
596 | 611 | ||
597 | if (status & ATH9K_INT_FATAL) { | 612 | if (status & ATH9K_INT_FATAL) { |
598 | ath_reset(sc, false); | 613 | ath_reset(sc, true); |
599 | ath9k_ps_restore(sc); | 614 | ath9k_ps_restore(sc); |
600 | return; | 615 | return; |
601 | } | 616 | } |
@@ -610,7 +625,7 @@ void ath9k_tasklet(unsigned long data) | |||
610 | rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); | 625 | rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN); |
611 | 626 | ||
612 | if (status & rxmask) { | 627 | if (status & rxmask) { |
613 | spin_lock_bh(&sc->rx.rxflushlock); | 628 | spin_lock_bh(&sc->rx.pcu_lock); |
614 | 629 | ||
615 | /* Check for high priority Rx first */ | 630 | /* Check for high priority Rx first */ |
616 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && | 631 | if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) && |
@@ -618,7 +633,7 @@ void ath9k_tasklet(unsigned long data) | |||
618 | ath_rx_tasklet(sc, 0, true); | 633 | ath_rx_tasklet(sc, 0, true); |
619 | 634 | ||
620 | ath_rx_tasklet(sc, 0, false); | 635 | ath_rx_tasklet(sc, 0, false); |
621 | spin_unlock_bh(&sc->rx.rxflushlock); | 636 | spin_unlock_bh(&sc->rx.pcu_lock); |
622 | } | 637 | } |
623 | 638 | ||
624 | if (status & ATH9K_INT_TX) { | 639 | if (status & ATH9K_INT_TX) { |
@@ -873,6 +888,7 @@ void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
873 | if (!ah->curchan) | 888 | if (!ah->curchan) |
874 | ah->curchan = ath_get_curchannel(sc, sc->hw); | 889 | ah->curchan = ath_get_curchannel(sc, sc->hw); |
875 | 890 | ||
891 | spin_lock_bh(&sc->rx.pcu_lock); | ||
876 | spin_lock_bh(&sc->sc_resetlock); | 892 | spin_lock_bh(&sc->sc_resetlock); |
877 | r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); | 893 | r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false); |
878 | if (r) { | 894 | if (r) { |
@@ -887,8 +903,10 @@ void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
887 | if (ath_startrecv(sc) != 0) { | 903 | if (ath_startrecv(sc) != 0) { |
888 | ath_print(common, ATH_DBG_FATAL, | 904 | ath_print(common, ATH_DBG_FATAL, |
889 | "Unable to restart recv logic\n"); | 905 | "Unable to restart recv logic\n"); |
906 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
890 | return; | 907 | return; |
891 | } | 908 | } |
909 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
892 | 910 | ||
893 | if (sc->sc_flags & SC_OP_BEACONS) | 911 | if (sc->sc_flags & SC_OP_BEACONS) |
894 | ath_beacon_config(sc, NULL); /* restart beacons */ | 912 | ath_beacon_config(sc, NULL); /* restart beacons */ |
@@ -927,6 +945,9 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
927 | ath9k_hw_set_interrupts(ah, 0); | 945 | ath9k_hw_set_interrupts(ah, 0); |
928 | 946 | ||
929 | ath_drain_all_txq(sc, false); /* clear pending tx frames */ | 947 | ath_drain_all_txq(sc, false); /* clear pending tx frames */ |
948 | |||
949 | spin_lock_bh(&sc->rx.pcu_lock); | ||
950 | |||
930 | ath_stoprecv(sc); /* turn off frame recv */ | 951 | ath_stoprecv(sc); /* turn off frame recv */ |
931 | ath_flushrecv(sc); /* flush recv queue */ | 952 | ath_flushrecv(sc); /* flush recv queue */ |
932 | 953 | ||
@@ -944,6 +965,9 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
944 | spin_unlock_bh(&sc->sc_resetlock); | 965 | spin_unlock_bh(&sc->sc_resetlock); |
945 | 966 | ||
946 | ath9k_hw_phy_disable(ah); | 967 | ath9k_hw_phy_disable(ah); |
968 | |||
969 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
970 | |||
947 | ath9k_hw_configpcipowersave(ah, 1, 1); | 971 | ath9k_hw_configpcipowersave(ah, 1, 1); |
948 | ath9k_ps_restore(sc); | 972 | ath9k_ps_restore(sc); |
949 | ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); | 973 | ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); |
@@ -963,6 +987,9 @@ int ath_reset(struct ath_softc *sc, bool retry_tx) | |||
963 | 987 | ||
964 | ath9k_hw_set_interrupts(ah, 0); | 988 | ath9k_hw_set_interrupts(ah, 0); |
965 | ath_drain_all_txq(sc, retry_tx); | 989 | ath_drain_all_txq(sc, retry_tx); |
990 | |||
991 | spin_lock_bh(&sc->rx.pcu_lock); | ||
992 | |||
966 | ath_stoprecv(sc); | 993 | ath_stoprecv(sc); |
967 | ath_flushrecv(sc); | 994 | ath_flushrecv(sc); |
968 | 995 | ||
@@ -977,6 +1004,8 @@ int ath_reset(struct ath_softc *sc, bool retry_tx) | |||
977 | ath_print(common, ATH_DBG_FATAL, | 1004 | ath_print(common, ATH_DBG_FATAL, |
978 | "Unable to start recv logic\n"); | 1005 | "Unable to start recv logic\n"); |
979 | 1006 | ||
1007 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
1008 | |||
980 | /* | 1009 | /* |
981 | * We may be doing a reset in response to a request | 1010 | * We may be doing a reset in response to a request |
982 | * that changes the channel so update any state that | 1011 | * that changes the channel so update any state that |
@@ -1139,6 +1168,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1139 | * be followed by initialization of the appropriate bits | 1168 | * be followed by initialization of the appropriate bits |
1140 | * and then setup of the interrupt mask. | 1169 | * and then setup of the interrupt mask. |
1141 | */ | 1170 | */ |
1171 | spin_lock_bh(&sc->rx.pcu_lock); | ||
1142 | spin_lock_bh(&sc->sc_resetlock); | 1172 | spin_lock_bh(&sc->sc_resetlock); |
1143 | r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); | 1173 | r = ath9k_hw_reset(ah, init_channel, ah->caldata, false); |
1144 | if (r) { | 1174 | if (r) { |
@@ -1147,6 +1177,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1147 | "(freq %u MHz)\n", r, | 1177 | "(freq %u MHz)\n", r, |
1148 | curchan->center_freq); | 1178 | curchan->center_freq); |
1149 | spin_unlock_bh(&sc->sc_resetlock); | 1179 | spin_unlock_bh(&sc->sc_resetlock); |
1180 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
1150 | goto mutex_unlock; | 1181 | goto mutex_unlock; |
1151 | } | 1182 | } |
1152 | spin_unlock_bh(&sc->sc_resetlock); | 1183 | spin_unlock_bh(&sc->sc_resetlock); |
@@ -1168,8 +1199,10 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1168 | ath_print(common, ATH_DBG_FATAL, | 1199 | ath_print(common, ATH_DBG_FATAL, |
1169 | "Unable to start recv logic\n"); | 1200 | "Unable to start recv logic\n"); |
1170 | r = -EIO; | 1201 | r = -EIO; |
1202 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
1171 | goto mutex_unlock; | 1203 | goto mutex_unlock; |
1172 | } | 1204 | } |
1205 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
1173 | 1206 | ||
1174 | /* Setup our intr mask. */ | 1207 | /* Setup our intr mask. */ |
1175 | ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | | 1208 | ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL | |
@@ -1189,6 +1222,7 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1189 | ah->imask |= ATH9K_INT_CST; | 1222 | ah->imask |= ATH9K_INT_CST; |
1190 | 1223 | ||
1191 | sc->sc_flags &= ~SC_OP_INVALID; | 1224 | sc->sc_flags &= ~SC_OP_INVALID; |
1225 | sc->sc_ah->is_monitoring = false; | ||
1192 | 1226 | ||
1193 | /* Disable BMISS interrupt when we're not associated */ | 1227 | /* Disable BMISS interrupt when we're not associated */ |
1194 | ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); | 1228 | ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); |
@@ -1210,6 +1244,8 @@ static int ath9k_start(struct ieee80211_hw *hw) | |||
1210 | ath9k_btcoex_timer_resume(sc); | 1244 | ath9k_btcoex_timer_resume(sc); |
1211 | } | 1245 | } |
1212 | 1246 | ||
1247 | pm_qos_update_request(&ath9k_pm_qos_req, 55); | ||
1248 | |||
1213 | mutex_unlock: | 1249 | mutex_unlock: |
1214 | mutex_unlock(&sc->mutex); | 1250 | mutex_unlock(&sc->mutex); |
1215 | 1251 | ||
@@ -1368,12 +1404,14 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
1368 | * before setting the invalid flag. */ | 1404 | * before setting the invalid flag. */ |
1369 | ath9k_hw_set_interrupts(ah, 0); | 1405 | ath9k_hw_set_interrupts(ah, 0); |
1370 | 1406 | ||
1407 | spin_lock_bh(&sc->rx.pcu_lock); | ||
1371 | if (!(sc->sc_flags & SC_OP_INVALID)) { | 1408 | if (!(sc->sc_flags & SC_OP_INVALID)) { |
1372 | ath_drain_all_txq(sc, false); | 1409 | ath_drain_all_txq(sc, false); |
1373 | ath_stoprecv(sc); | 1410 | ath_stoprecv(sc); |
1374 | ath9k_hw_phy_disable(ah); | 1411 | ath9k_hw_phy_disable(ah); |
1375 | } else | 1412 | } else |
1376 | sc->rx.rxlink = NULL; | 1413 | sc->rx.rxlink = NULL; |
1414 | spin_unlock_bh(&sc->rx.pcu_lock); | ||
1377 | 1415 | ||
1378 | /* disable HAL and put h/w to sleep */ | 1416 | /* disable HAL and put h/w to sleep */ |
1379 | ath9k_hw_disable(ah); | 1417 | ath9k_hw_disable(ah); |
@@ -1385,6 +1423,8 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
1385 | 1423 | ||
1386 | sc->sc_flags |= SC_OP_INVALID; | 1424 | sc->sc_flags |= SC_OP_INVALID; |
1387 | 1425 | ||
1426 | pm_qos_update_request(&ath9k_pm_qos_req, PM_QOS_DEFAULT_VALUE); | ||
1427 | |||
1388 | mutex_unlock(&sc->mutex); | 1428 | mutex_unlock(&sc->mutex); |
1389 | 1429 | ||
1390 | ath_print(common, ATH_DBG_CONFIG, "Driver halt\n"); | 1430 | ath_print(common, ATH_DBG_CONFIG, "Driver halt\n"); |
@@ -1463,8 +1503,7 @@ static int ath9k_add_interface(struct ieee80211_hw *hw, | |||
1463 | ath9k_hw_set_interrupts(ah, ah->imask); | 1503 | ath9k_hw_set_interrupts(ah, ah->imask); |
1464 | 1504 | ||
1465 | if (vif->type == NL80211_IFTYPE_AP || | 1505 | if (vif->type == NL80211_IFTYPE_AP || |
1466 | vif->type == NL80211_IFTYPE_ADHOC || | 1506 | vif->type == NL80211_IFTYPE_ADHOC) { |
1467 | vif->type == NL80211_IFTYPE_MONITOR) { | ||
1468 | sc->sc_flags |= SC_OP_ANI_RUN; | 1507 | sc->sc_flags |= SC_OP_ANI_RUN; |
1469 | ath_start_ani(common); | 1508 | ath_start_ani(common); |
1470 | } | 1509 | } |
@@ -1614,8 +1653,12 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
1614 | if (changed & IEEE80211_CONF_CHANGE_MONITOR) { | 1653 | if (changed & IEEE80211_CONF_CHANGE_MONITOR) { |
1615 | if (conf->flags & IEEE80211_CONF_MONITOR) { | 1654 | if (conf->flags & IEEE80211_CONF_MONITOR) { |
1616 | ath_print(common, ATH_DBG_CONFIG, | 1655 | ath_print(common, ATH_DBG_CONFIG, |
1617 | "HW opmode set to Monitor mode\n"); | 1656 | "Monitor mode is enabled\n"); |
1618 | sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR; | 1657 | sc->sc_ah->is_monitoring = true; |
1658 | } else { | ||
1659 | ath_print(common, ATH_DBG_CONFIG, | ||
1660 | "Monitor mode is disabled\n"); | ||
1661 | sc->sc_ah->is_monitoring = false; | ||
1619 | } | 1662 | } |
1620 | } | 1663 | } |
1621 | 1664 | ||
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 0cee90cf8dc9..89978d71617f 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -527,7 +527,7 @@ static u8 ath_rc_setvalid_rates(struct ath_rate_priv *ath_rc_priv, | |||
527 | for (i = 0; i < rateset->rs_nrates; i++) { | 527 | for (i = 0; i < rateset->rs_nrates; i++) { |
528 | for (j = 0; j < rate_table->rate_cnt; j++) { | 528 | for (j = 0; j < rate_table->rate_cnt; j++) { |
529 | u32 phy = rate_table->info[j].phy; | 529 | u32 phy = rate_table->info[j].phy; |
530 | u16 rate_flags = rate_table->info[i].rate_flags; | 530 | u16 rate_flags = rate_table->info[j].rate_flags; |
531 | u8 rate = rateset->rs_rates[i]; | 531 | u8 rate = rateset->rs_rates[i]; |
532 | u8 dot11rate = rate_table->info[j].dot11rate; | 532 | u8 dot11rate = rate_table->info[j].dot11rate; |
533 | 533 | ||
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c index fe73fc50082a..1a62e351ec77 100644 --- a/drivers/net/wireless/ath/ath9k/recv.c +++ b/drivers/net/wireless/ath/ath9k/recv.c | |||
@@ -297,19 +297,17 @@ static void ath_edma_start_recv(struct ath_softc *sc) | |||
297 | ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP, | 297 | ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_LP, |
298 | sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize); | 298 | sc->rx.rx_edma[ATH9K_RX_QUEUE_LP].rx_fifo_hwsize); |
299 | 299 | ||
300 | spin_unlock_bh(&sc->rx.rxbuflock); | ||
301 | |||
302 | ath_opmode_init(sc); | 300 | ath_opmode_init(sc); |
303 | 301 | ||
304 | ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); | 302 | ath9k_hw_startpcureceive(sc->sc_ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); |
303 | |||
304 | spin_unlock_bh(&sc->rx.rxbuflock); | ||
305 | } | 305 | } |
306 | 306 | ||
307 | static void ath_edma_stop_recv(struct ath_softc *sc) | 307 | static void ath_edma_stop_recv(struct ath_softc *sc) |
308 | { | 308 | { |
309 | spin_lock_bh(&sc->rx.rxbuflock); | ||
310 | ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP); | 309 | ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_HP); |
311 | ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP); | 310 | ath_rx_remove_buffer(sc, ATH9K_RX_QUEUE_LP); |
312 | spin_unlock_bh(&sc->rx.rxbuflock); | ||
313 | } | 311 | } |
314 | 312 | ||
315 | int ath_rx_init(struct ath_softc *sc, int nbufs) | 313 | int ath_rx_init(struct ath_softc *sc, int nbufs) |
@@ -319,7 +317,7 @@ int ath_rx_init(struct ath_softc *sc, int nbufs) | |||
319 | struct ath_buf *bf; | 317 | struct ath_buf *bf; |
320 | int error = 0; | 318 | int error = 0; |
321 | 319 | ||
322 | spin_lock_init(&sc->rx.rxflushlock); | 320 | spin_lock_init(&sc->rx.pcu_lock); |
323 | sc->sc_flags &= ~SC_OP_RXFLUSH; | 321 | sc->sc_flags &= ~SC_OP_RXFLUSH; |
324 | spin_lock_init(&sc->rx.rxbuflock); | 322 | spin_lock_init(&sc->rx.rxbuflock); |
325 | 323 | ||
@@ -443,7 +441,7 @@ u32 ath_calcrxfilter(struct ath_softc *sc) | |||
443 | */ | 441 | */ |
444 | if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) && | 442 | if (((sc->sc_ah->opmode != NL80211_IFTYPE_AP) && |
445 | (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) || | 443 | (sc->rx.rxfilter & FIF_PROMISC_IN_BSS)) || |
446 | (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR)) | 444 | (sc->sc_ah->is_monitoring)) |
447 | rfilt |= ATH9K_RX_FILTER_PROM; | 445 | rfilt |= ATH9K_RX_FILTER_PROM; |
448 | 446 | ||
449 | if (sc->rx.rxfilter & FIF_CONTROL) | 447 | if (sc->rx.rxfilter & FIF_CONTROL) |
@@ -506,10 +504,11 @@ int ath_startrecv(struct ath_softc *sc) | |||
506 | ath9k_hw_rxena(ah); | 504 | ath9k_hw_rxena(ah); |
507 | 505 | ||
508 | start_recv: | 506 | start_recv: |
509 | spin_unlock_bh(&sc->rx.rxbuflock); | ||
510 | ath_opmode_init(sc); | 507 | ath_opmode_init(sc); |
511 | ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); | 508 | ath9k_hw_startpcureceive(ah, (sc->sc_flags & SC_OP_OFFCHANNEL)); |
512 | 509 | ||
510 | spin_unlock_bh(&sc->rx.rxbuflock); | ||
511 | |||
513 | return 0; | 512 | return 0; |
514 | } | 513 | } |
515 | 514 | ||
@@ -518,7 +517,8 @@ bool ath_stoprecv(struct ath_softc *sc) | |||
518 | struct ath_hw *ah = sc->sc_ah; | 517 | struct ath_hw *ah = sc->sc_ah; |
519 | bool stopped; | 518 | bool stopped; |
520 | 519 | ||
521 | ath9k_hw_stoppcurecv(ah); | 520 | spin_lock_bh(&sc->rx.rxbuflock); |
521 | ath9k_hw_abortpcurecv(ah); | ||
522 | ath9k_hw_setrxfilter(ah, 0); | 522 | ath9k_hw_setrxfilter(ah, 0); |
523 | stopped = ath9k_hw_stopdmarecv(ah); | 523 | stopped = ath9k_hw_stopdmarecv(ah); |
524 | 524 | ||
@@ -526,19 +526,18 @@ bool ath_stoprecv(struct ath_softc *sc) | |||
526 | ath_edma_stop_recv(sc); | 526 | ath_edma_stop_recv(sc); |
527 | else | 527 | else |
528 | sc->rx.rxlink = NULL; | 528 | sc->rx.rxlink = NULL; |
529 | spin_unlock_bh(&sc->rx.rxbuflock); | ||
529 | 530 | ||
530 | return stopped; | 531 | return stopped; |
531 | } | 532 | } |
532 | 533 | ||
533 | void ath_flushrecv(struct ath_softc *sc) | 534 | void ath_flushrecv(struct ath_softc *sc) |
534 | { | 535 | { |
535 | spin_lock_bh(&sc->rx.rxflushlock); | ||
536 | sc->sc_flags |= SC_OP_RXFLUSH; | 536 | sc->sc_flags |= SC_OP_RXFLUSH; |
537 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) | 537 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) |
538 | ath_rx_tasklet(sc, 1, true); | 538 | ath_rx_tasklet(sc, 1, true); |
539 | ath_rx_tasklet(sc, 1, false); | 539 | ath_rx_tasklet(sc, 1, false); |
540 | sc->sc_flags &= ~SC_OP_RXFLUSH; | 540 | sc->sc_flags &= ~SC_OP_RXFLUSH; |
541 | spin_unlock_bh(&sc->rx.rxflushlock); | ||
542 | } | 541 | } |
543 | 542 | ||
544 | static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb) | 543 | static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb) |
@@ -898,7 +897,7 @@ static bool ath9k_rx_accept(struct ath_common *common, | |||
898 | * decryption and MIC failures. For monitor mode, | 897 | * decryption and MIC failures. For monitor mode, |
899 | * we also ignore the CRC error. | 898 | * we also ignore the CRC error. |
900 | */ | 899 | */ |
901 | if (ah->opmode == NL80211_IFTYPE_MONITOR) { | 900 | if (ah->is_monitoring) { |
902 | if (rx_stats->rs_status & | 901 | if (rx_stats->rs_status & |
903 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | | 902 | ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC | |
904 | ATH9K_RXERR_CRC)) | 903 | ATH9K_RXERR_CRC)) |
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h index 42976b0a01c1..dddf579aacf1 100644 --- a/drivers/net/wireless/ath/ath9k/reg.h +++ b/drivers/net/wireless/ath/ath9k/reg.h | |||
@@ -703,6 +703,7 @@ | |||
703 | #define AR_WA_RESET_EN (1 << 18) /* Sw Control to enable PCI-Reset to POR (bit 15) */ | 703 | #define AR_WA_RESET_EN (1 << 18) /* Sw Control to enable PCI-Reset to POR (bit 15) */ |
704 | #define AR_WA_ANALOG_SHIFT (1 << 20) | 704 | #define AR_WA_ANALOG_SHIFT (1 << 20) |
705 | #define AR_WA_POR_SHORT (1 << 21) /* PCI-E Phy reset control */ | 705 | #define AR_WA_POR_SHORT (1 << 21) /* PCI-E Phy reset control */ |
706 | #define AR_WA_BIT22 (1 << 22) | ||
706 | #define AR9285_WA_DEFAULT 0x004a050b | 707 | #define AR9285_WA_DEFAULT 0x004a050b |
707 | #define AR9280_WA_DEFAULT 0x0040073b | 708 | #define AR9280_WA_DEFAULT 0x0040073b |
708 | #define AR_WA_DEFAULT 0x0000073f | 709 | #define AR_WA_DEFAULT 0x0000073f |
@@ -865,7 +866,13 @@ | |||
865 | #define AR_DEVID_7010(_ah) \ | 866 | #define AR_DEVID_7010(_ah) \ |
866 | (((_ah)->hw_version.devid == 0x7010) || \ | 867 | (((_ah)->hw_version.devid == 0x7010) || \ |
867 | ((_ah)->hw_version.devid == 0x7015) || \ | 868 | ((_ah)->hw_version.devid == 0x7015) || \ |
868 | ((_ah)->hw_version.devid == 0x9018)) | 869 | ((_ah)->hw_version.devid == 0x9018) || \ |
870 | ((_ah)->hw_version.devid == 0xA704) || \ | ||
871 | ((_ah)->hw_version.devid == 0x1200)) | ||
872 | |||
873 | #define AR9287_HTC_DEVID(_ah) \ | ||
874 | (((_ah)->hw_version.devid == 0x7015) || \ | ||
875 | ((_ah)->hw_version.devid == 0x1200)) | ||
869 | 876 | ||
870 | #define AR_RADIO_SREV_MAJOR 0xf0 | 877 | #define AR_RADIO_SREV_MAJOR 0xf0 |
871 | #define AR_RAD5133_SREV_MAJOR 0xc0 | 878 | #define AR_RAD5133_SREV_MAJOR 0xc0 |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index d077186da870..f2ade2402ce2 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -673,6 +673,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
673 | u16 aggr_limit = 0, al = 0, bpad = 0, | 673 | u16 aggr_limit = 0, al = 0, bpad = 0, |
674 | al_delta, h_baw = tid->baw_size / 2; | 674 | al_delta, h_baw = tid->baw_size / 2; |
675 | enum ATH_AGGR_STATUS status = ATH_AGGR_DONE; | 675 | enum ATH_AGGR_STATUS status = ATH_AGGR_DONE; |
676 | struct ieee80211_tx_info *tx_info; | ||
676 | 677 | ||
677 | bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list); | 678 | bf_first = list_first_entry(&tid->buf_q, struct ath_buf, list); |
678 | 679 | ||
@@ -699,6 +700,11 @@ static enum ATH_AGGR_STATUS ath_tx_form_aggr(struct ath_softc *sc, | |||
699 | break; | 700 | break; |
700 | } | 701 | } |
701 | 702 | ||
703 | tx_info = IEEE80211_SKB_CB(bf->bf_mpdu); | ||
704 | if (nframes && ((tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) || | ||
705 | !(tx_info->control.rates[0].flags & IEEE80211_TX_RC_MCS))) | ||
706 | break; | ||
707 | |||
702 | /* do not exceed subframe limit */ | 708 | /* do not exceed subframe limit */ |
703 | if (nframes >= min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) { | 709 | if (nframes >= min((int)h_baw, ATH_AMPDU_SUBFRAME_DEFAULT)) { |
704 | status = ATH_AGGR_LIMITED; | 710 | status = ATH_AGGR_LIMITED; |
@@ -1083,15 +1089,6 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx) | |||
1083 | txq->axq_tx_inprogress = false; | 1089 | txq->axq_tx_inprogress = false; |
1084 | spin_unlock_bh(&txq->axq_lock); | 1090 | spin_unlock_bh(&txq->axq_lock); |
1085 | 1091 | ||
1086 | /* flush any pending frames if aggregation is enabled */ | ||
1087 | if (sc->sc_flags & SC_OP_TXAGGR) { | ||
1088 | if (!retry_tx) { | ||
1089 | spin_lock_bh(&txq->axq_lock); | ||
1090 | ath_txq_drain_pending_buffers(sc, txq); | ||
1091 | spin_unlock_bh(&txq->axq_lock); | ||
1092 | } | ||
1093 | } | ||
1094 | |||
1095 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { | 1092 | if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) { |
1096 | spin_lock_bh(&txq->axq_lock); | 1093 | spin_lock_bh(&txq->axq_lock); |
1097 | while (!list_empty(&txq->txq_fifo_pending)) { | 1094 | while (!list_empty(&txq->txq_fifo_pending)) { |
@@ -1112,6 +1109,15 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx) | |||
1112 | } | 1109 | } |
1113 | spin_unlock_bh(&txq->axq_lock); | 1110 | spin_unlock_bh(&txq->axq_lock); |
1114 | } | 1111 | } |
1112 | |||
1113 | /* flush any pending frames if aggregation is enabled */ | ||
1114 | if (sc->sc_flags & SC_OP_TXAGGR) { | ||
1115 | if (!retry_tx) { | ||
1116 | spin_lock_bh(&txq->axq_lock); | ||
1117 | ath_txq_drain_pending_buffers(sc, txq); | ||
1118 | spin_unlock_bh(&txq->axq_lock); | ||
1119 | } | ||
1120 | } | ||
1115 | } | 1121 | } |
1116 | 1122 | ||
1117 | void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx) | 1123 | void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx) |
@@ -2157,7 +2163,7 @@ static void ath_tx_complete_poll_work(struct work_struct *work) | |||
2157 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET, | 2163 | ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET, |
2158 | "tx hung, resetting the chip\n"); | 2164 | "tx hung, resetting the chip\n"); |
2159 | ath9k_ps_wakeup(sc); | 2165 | ath9k_ps_wakeup(sc); |
2160 | ath_reset(sc, false); | 2166 | ath_reset(sc, true); |
2161 | ath9k_ps_restore(sc); | 2167 | ath9k_ps_restore(sc); |
2162 | } | 2168 | } |
2163 | 2169 | ||
diff --git a/drivers/net/wireless/ath/carl9170/cmd.h b/drivers/net/wireless/ath/carl9170/cmd.h index f78728c38294..568174c71b94 100644 --- a/drivers/net/wireless/ath/carl9170/cmd.h +++ b/drivers/net/wireless/ath/carl9170/cmd.h | |||
@@ -116,8 +116,9 @@ __regwrite_out : \ | |||
116 | } while (0); | 116 | } while (0); |
117 | 117 | ||
118 | 118 | ||
119 | #define carl9170_async_get_buf() \ | 119 | #define carl9170_async_regwrite_get_buf() \ |
120 | do { \ | 120 | do { \ |
121 | __nreg = 0; \ | ||
121 | __cmd = carl9170_cmd_buf(__carl, CARL9170_CMD_WREG_ASYNC, \ | 122 | __cmd = carl9170_cmd_buf(__carl, CARL9170_CMD_WREG_ASYNC, \ |
122 | CARL9170_MAX_CMD_PAYLOAD_LEN); \ | 123 | CARL9170_MAX_CMD_PAYLOAD_LEN); \ |
123 | if (__cmd == NULL) { \ | 124 | if (__cmd == NULL) { \ |
@@ -128,38 +129,42 @@ do { \ | |||
128 | 129 | ||
129 | #define carl9170_async_regwrite_begin(carl) \ | 130 | #define carl9170_async_regwrite_begin(carl) \ |
130 | do { \ | 131 | do { \ |
131 | int __nreg = 0, __err = 0; \ | ||
132 | struct ar9170 *__carl = carl; \ | 132 | struct ar9170 *__carl = carl; \ |
133 | struct carl9170_cmd *__cmd; \ | 133 | struct carl9170_cmd *__cmd; \ |
134 | carl9170_async_get_buf(); \ | 134 | unsigned int __nreg; \ |
135 | int __err = 0; \ | ||
136 | carl9170_async_regwrite_get_buf(); \ | ||
137 | |||
138 | #define carl9170_async_regwrite_flush() \ | ||
139 | do { \ | ||
140 | if (__cmd == NULL || __nreg == 0) \ | ||
141 | break; \ | ||
142 | \ | ||
143 | if (IS_ACCEPTING_CMD(__carl) && __nreg) { \ | ||
144 | __cmd->hdr.len = 8 * __nreg; \ | ||
145 | __err = __carl9170_exec_cmd(__carl, __cmd, true); \ | ||
146 | __cmd = NULL; \ | ||
147 | break; \ | ||
148 | } \ | ||
149 | goto __async_regwrite_out; \ | ||
150 | } while (0) | ||
135 | 151 | ||
136 | #define carl9170_async_regwrite(r, v) do { \ | 152 | #define carl9170_async_regwrite(r, v) do { \ |
153 | if (__cmd == NULL) \ | ||
154 | carl9170_async_regwrite_get_buf(); \ | ||
137 | __cmd->wreg.regs[__nreg].addr = cpu_to_le32(r); \ | 155 | __cmd->wreg.regs[__nreg].addr = cpu_to_le32(r); \ |
138 | __cmd->wreg.regs[__nreg].val = cpu_to_le32(v); \ | 156 | __cmd->wreg.regs[__nreg].val = cpu_to_le32(v); \ |
139 | __nreg++; \ | 157 | __nreg++; \ |
140 | if ((__nreg >= PAYLOAD_MAX/2)) { \ | 158 | if ((__nreg >= PAYLOAD_MAX / 2)) \ |
141 | if (IS_ACCEPTING_CMD(__carl)) { \ | 159 | carl9170_async_regwrite_flush(); \ |
142 | __cmd->hdr.len = 8 * __nreg; \ | ||
143 | __err = __carl9170_exec_cmd(__carl, __cmd, true);\ | ||
144 | __cmd = NULL; \ | ||
145 | carl9170_async_get_buf(); \ | ||
146 | } else { \ | ||
147 | goto __async_regwrite_out; \ | ||
148 | } \ | ||
149 | __nreg = 0; \ | ||
150 | if (__err) \ | ||
151 | goto __async_regwrite_out; \ | ||
152 | } \ | ||
153 | } while (0) | 160 | } while (0) |
154 | 161 | ||
155 | #define carl9170_async_regwrite_finish() \ | 162 | #define carl9170_async_regwrite_finish() do { \ |
156 | __async_regwrite_out : \ | 163 | __async_regwrite_out : \ |
157 | if (__err == 0 && __nreg) { \ | 164 | if (__cmd != NULL && __err == 0) \ |
158 | __cmd->hdr.len = 8 * __nreg; \ | 165 | carl9170_async_regwrite_flush(); \ |
159 | if (IS_ACCEPTING_CMD(__carl)) \ | 166 | kfree(__cmd); \ |
160 | __err = __carl9170_exec_cmd(__carl, __cmd, true);\ | 167 | } while (0) \ |
161 | __nreg = 0; \ | ||
162 | } | ||
163 | 168 | ||
164 | #define carl9170_async_regwrite_result() \ | 169 | #define carl9170_async_regwrite_result() \ |
165 | __err; \ | 170 | __err; \ |
diff --git a/drivers/net/wireless/ath/carl9170/main.c b/drivers/net/wireless/ath/carl9170/main.c index 3cc99f3f7ab5..a314c2c2bfbe 100644 --- a/drivers/net/wireless/ath/carl9170/main.c +++ b/drivers/net/wireless/ath/carl9170/main.c | |||
@@ -639,15 +639,15 @@ init: | |||
639 | if (err) | 639 | if (err) |
640 | goto unlock; | 640 | goto unlock; |
641 | } else { | 641 | } else { |
642 | err = carl9170_mod_virtual_mac(ar, vif_id, vif->addr); | ||
643 | rcu_read_unlock(); | 642 | rcu_read_unlock(); |
643 | err = carl9170_mod_virtual_mac(ar, vif_id, vif->addr); | ||
644 | 644 | ||
645 | if (err) | 645 | if (err) |
646 | goto unlock; | 646 | goto unlock; |
647 | } | 647 | } |
648 | 648 | ||
649 | unlock: | 649 | unlock: |
650 | if (err && (vif_id != -1)) { | 650 | if (err && (vif_id >= 0)) { |
651 | vif_priv->active = false; | 651 | vif_priv->active = false; |
652 | bitmap_release_region(&ar->vif_bitmap, vif_id, 0); | 652 | bitmap_release_region(&ar->vif_bitmap, vif_id, 0); |
653 | ar->vifs--; | 653 | ar->vifs--; |
diff --git a/drivers/net/wireless/ath/carl9170/usb.c b/drivers/net/wireless/ath/carl9170/usb.c index c7f6193934ea..7504ed14c725 100644 --- a/drivers/net/wireless/ath/carl9170/usb.c +++ b/drivers/net/wireless/ath/carl9170/usb.c | |||
@@ -82,9 +82,11 @@ static struct usb_device_id carl9170_usb_ids[] = { | |||
82 | { USB_DEVICE(0x07d1, 0x3c10) }, | 82 | { USB_DEVICE(0x07d1, 0x3c10) }, |
83 | /* D-Link DWA 160 A2 */ | 83 | /* D-Link DWA 160 A2 */ |
84 | { USB_DEVICE(0x07d1, 0x3a09) }, | 84 | { USB_DEVICE(0x07d1, 0x3a09) }, |
85 | /* D-Link DWA 130 D */ | ||
86 | { USB_DEVICE(0x07d1, 0x3a0f) }, | ||
85 | /* Netgear WNA1000 */ | 87 | /* Netgear WNA1000 */ |
86 | { USB_DEVICE(0x0846, 0x9040) }, | 88 | { USB_DEVICE(0x0846, 0x9040) }, |
87 | /* Netgear WNDA3100 */ | 89 | /* Netgear WNDA3100 (v1) */ |
88 | { USB_DEVICE(0x0846, 0x9010) }, | 90 | { USB_DEVICE(0x0846, 0x9010) }, |
89 | /* Netgear WN111 v2 */ | 91 | /* Netgear WN111 v2 */ |
90 | { USB_DEVICE(0x0846, 0x9001), .driver_info = CARL9170_ONE_LED }, | 92 | { USB_DEVICE(0x0846, 0x9001), .driver_info = CARL9170_ONE_LED }, |
@@ -551,12 +553,12 @@ static int carl9170_usb_flush(struct ar9170 *ar) | |||
551 | usb_free_urb(urb); | 553 | usb_free_urb(urb); |
552 | } | 554 | } |
553 | 555 | ||
554 | ret = usb_wait_anchor_empty_timeout(&ar->tx_cmd, HZ); | 556 | ret = usb_wait_anchor_empty_timeout(&ar->tx_cmd, 1000); |
555 | if (ret == 0) | 557 | if (ret == 0) |
556 | err = -ETIMEDOUT; | 558 | err = -ETIMEDOUT; |
557 | 559 | ||
558 | /* lets wait a while until the tx - queues are dried out */ | 560 | /* lets wait a while until the tx - queues are dried out */ |
559 | ret = usb_wait_anchor_empty_timeout(&ar->tx_anch, HZ); | 561 | ret = usb_wait_anchor_empty_timeout(&ar->tx_anch, 1000); |
560 | if (ret == 0) | 562 | if (ret == 0) |
561 | err = -ETIMEDOUT; | 563 | err = -ETIMEDOUT; |
562 | 564 | ||
@@ -591,16 +593,23 @@ int __carl9170_exec_cmd(struct ar9170 *ar, struct carl9170_cmd *cmd, | |||
591 | const bool free_buf) | 593 | const bool free_buf) |
592 | { | 594 | { |
593 | struct urb *urb; | 595 | struct urb *urb; |
596 | int err = 0; | ||
594 | 597 | ||
595 | if (!IS_INITIALIZED(ar)) | 598 | if (!IS_INITIALIZED(ar)) { |
596 | return -EPERM; | 599 | err = -EPERM; |
600 | goto err_free; | ||
601 | } | ||
597 | 602 | ||
598 | if (WARN_ON(cmd->hdr.len > CARL9170_MAX_CMD_LEN - 4)) | 603 | if (WARN_ON(cmd->hdr.len > CARL9170_MAX_CMD_LEN - 4)) { |
599 | return -EINVAL; | 604 | err = -EINVAL; |
605 | goto err_free; | ||
606 | } | ||
600 | 607 | ||
601 | urb = usb_alloc_urb(0, GFP_ATOMIC); | 608 | urb = usb_alloc_urb(0, GFP_ATOMIC); |
602 | if (!urb) | 609 | if (!urb) { |
603 | return -ENOMEM; | 610 | err = -ENOMEM; |
611 | goto err_free; | ||
612 | } | ||
604 | 613 | ||
605 | usb_fill_int_urb(urb, ar->udev, usb_sndintpipe(ar->udev, | 614 | usb_fill_int_urb(urb, ar->udev, usb_sndintpipe(ar->udev, |
606 | AR9170_USB_EP_CMD), cmd, cmd->hdr.len + 4, | 615 | AR9170_USB_EP_CMD), cmd, cmd->hdr.len + 4, |
@@ -613,6 +622,12 @@ int __carl9170_exec_cmd(struct ar9170 *ar, struct carl9170_cmd *cmd, | |||
613 | usb_free_urb(urb); | 622 | usb_free_urb(urb); |
614 | 623 | ||
615 | return carl9170_usb_submit_cmd_urb(ar); | 624 | return carl9170_usb_submit_cmd_urb(ar); |
625 | |||
626 | err_free: | ||
627 | if (free_buf) | ||
628 | kfree(cmd); | ||
629 | |||
630 | return err; | ||
616 | } | 631 | } |
617 | 632 | ||
618 | int carl9170_exec_cmd(struct ar9170 *ar, const enum carl9170_cmd_oids cmd, | 633 | int carl9170_exec_cmd(struct ar9170 *ar, const enum carl9170_cmd_oids cmd, |
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c index dfec5496055e..e0f2d122e124 100644 --- a/drivers/net/wireless/b43/phy_n.c +++ b/drivers/net/wireless/b43/phy_n.c | |||
@@ -2964,7 +2964,7 @@ static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev, | |||
2964 | (2 - i)); | 2964 | (2 - i)); |
2965 | } | 2965 | } |
2966 | 2966 | ||
2967 | for (j = 0; i < 4; j++) { | 2967 | for (j = 0; j < 4; j++) { |
2968 | if (j < 3) { | 2968 | if (j < 3) { |
2969 | cur_lna = lna[j]; | 2969 | cur_lna = lna[j]; |
2970 | cur_hpf1 = hpf1[j]; | 2970 | cur_hpf1 = hpf1[j]; |
diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c index 45933cf8e8c2..09e2dfd7b175 100644 --- a/drivers/net/wireless/b43/sdio.c +++ b/drivers/net/wireless/b43/sdio.c | |||
@@ -163,6 +163,7 @@ static int b43_sdio_probe(struct sdio_func *func, | |||
163 | err_free_ssb: | 163 | err_free_ssb: |
164 | kfree(sdio); | 164 | kfree(sdio); |
165 | err_disable_func: | 165 | err_disable_func: |
166 | sdio_claim_host(func); | ||
166 | sdio_disable_func(func); | 167 | sdio_disable_func(func); |
167 | err_release_host: | 168 | err_release_host: |
168 | sdio_release_host(func); | 169 | sdio_release_host(func); |
@@ -175,7 +176,9 @@ static void b43_sdio_remove(struct sdio_func *func) | |||
175 | struct b43_sdio *sdio = sdio_get_drvdata(func); | 176 | struct b43_sdio *sdio = sdio_get_drvdata(func); |
176 | 177 | ||
177 | ssb_bus_unregister(&sdio->ssb); | 178 | ssb_bus_unregister(&sdio->ssb); |
179 | sdio_claim_host(func); | ||
178 | sdio_disable_func(func); | 180 | sdio_disable_func(func); |
181 | sdio_release_host(func); | ||
179 | kfree(sdio); | 182 | kfree(sdio); |
180 | sdio_set_drvdata(func, NULL); | 183 | sdio_set_drvdata(func, NULL); |
181 | } | 184 | } |
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c index 32dee2ce5d31..d5ef696298ee 100644 --- a/drivers/net/wireless/ipw2x00/libipw_module.c +++ b/drivers/net/wireless/ipw2x00/libipw_module.c | |||
@@ -54,6 +54,7 @@ | |||
54 | 54 | ||
55 | #define DRV_DESCRIPTION "802.11 data/management/control stack" | 55 | #define DRV_DESCRIPTION "802.11 data/management/control stack" |
56 | #define DRV_NAME "libipw" | 56 | #define DRV_NAME "libipw" |
57 | #define DRV_PROCNAME "ieee80211" | ||
57 | #define DRV_VERSION LIBIPW_VERSION | 58 | #define DRV_VERSION LIBIPW_VERSION |
58 | #define DRV_COPYRIGHT "Copyright (C) 2004-2005 Intel Corporation <jketreno@linux.intel.com>" | 59 | #define DRV_COPYRIGHT "Copyright (C) 2004-2005 Intel Corporation <jketreno@linux.intel.com>" |
59 | 60 | ||
@@ -293,16 +294,16 @@ static int __init libipw_init(void) | |||
293 | struct proc_dir_entry *e; | 294 | struct proc_dir_entry *e; |
294 | 295 | ||
295 | libipw_debug_level = debug; | 296 | libipw_debug_level = debug; |
296 | libipw_proc = proc_mkdir("ieee80211", init_net.proc_net); | 297 | libipw_proc = proc_mkdir(DRV_PROCNAME, init_net.proc_net); |
297 | if (libipw_proc == NULL) { | 298 | if (libipw_proc == NULL) { |
298 | LIBIPW_ERROR("Unable to create " DRV_NAME | 299 | LIBIPW_ERROR("Unable to create " DRV_PROCNAME |
299 | " proc directory\n"); | 300 | " proc directory\n"); |
300 | return -EIO; | 301 | return -EIO; |
301 | } | 302 | } |
302 | e = proc_create("debug_level", S_IRUGO | S_IWUSR, libipw_proc, | 303 | e = proc_create("debug_level", S_IRUGO | S_IWUSR, libipw_proc, |
303 | &debug_level_proc_fops); | 304 | &debug_level_proc_fops); |
304 | if (!e) { | 305 | if (!e) { |
305 | remove_proc_entry(DRV_NAME, init_net.proc_net); | 306 | remove_proc_entry(DRV_PROCNAME, init_net.proc_net); |
306 | libipw_proc = NULL; | 307 | libipw_proc = NULL; |
307 | return -EIO; | 308 | return -EIO; |
308 | } | 309 | } |
@@ -319,7 +320,7 @@ static void __exit libipw_exit(void) | |||
319 | #ifdef CONFIG_LIBIPW_DEBUG | 320 | #ifdef CONFIG_LIBIPW_DEBUG |
320 | if (libipw_proc) { | 321 | if (libipw_proc) { |
321 | remove_proc_entry("debug_level", libipw_proc); | 322 | remove_proc_entry("debug_level", libipw_proc); |
322 | remove_proc_entry(DRV_NAME, init_net.proc_net); | 323 | remove_proc_entry(DRV_PROCNAME, init_net.proc_net); |
323 | libipw_proc = NULL; | 324 | libipw_proc = NULL; |
324 | } | 325 | } |
325 | #endif /* CONFIG_LIBIPW_DEBUG */ | 326 | #endif /* CONFIG_LIBIPW_DEBUG */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c index db57aea629d9..2b078a995729 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-tx.c | |||
@@ -1227,7 +1227,8 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv, | |||
1227 | struct ieee80211_tx_info *info; | 1227 | struct ieee80211_tx_info *info; |
1228 | 1228 | ||
1229 | if (unlikely(!agg->wait_for_ba)) { | 1229 | if (unlikely(!agg->wait_for_ba)) { |
1230 | IWL_ERR(priv, "Received BA when not expected\n"); | 1230 | if (unlikely(ba_resp->bitmap)) |
1231 | IWL_ERR(priv, "Received BA when not expected\n"); | ||
1231 | return -EINVAL; | 1232 | return -EINVAL; |
1232 | } | 1233 | } |
1233 | 1234 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 8f8c4b73f8b9..7edf8c2fb8c7 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -4000,7 +4000,8 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e | |||
4000 | * "the hard way", rather than using device's scan. | 4000 | * "the hard way", rather than using device's scan. |
4001 | */ | 4001 | */ |
4002 | if (iwl3945_mod_params.disable_hw_scan) { | 4002 | if (iwl3945_mod_params.disable_hw_scan) { |
4003 | IWL_ERR(priv, "sw scan support is deprecated\n"); | 4003 | dev_printk(KERN_DEBUG, &(pdev->dev), |
4004 | "sw scan support is deprecated\n"); | ||
4004 | iwl3945_hw_ops.hw_scan = NULL; | 4005 | iwl3945_hw_ops.hw_scan = NULL; |
4005 | } | 4006 | } |
4006 | 4007 | ||
diff --git a/drivers/net/wireless/libertas/cfg.c b/drivers/net/wireless/libertas/cfg.c index 5046a0005034..373930afc26b 100644 --- a/drivers/net/wireless/libertas/cfg.c +++ b/drivers/net/wireless/libertas/cfg.c | |||
@@ -700,8 +700,9 @@ static void lbs_scan_worker(struct work_struct *work) | |||
700 | 700 | ||
701 | if (priv->scan_channel < priv->scan_req->n_channels) { | 701 | if (priv->scan_channel < priv->scan_req->n_channels) { |
702 | cancel_delayed_work(&priv->scan_work); | 702 | cancel_delayed_work(&priv->scan_work); |
703 | queue_delayed_work(priv->work_thread, &priv->scan_work, | 703 | if (!priv->stopping) |
704 | msecs_to_jiffies(300)); | 704 | queue_delayed_work(priv->work_thread, &priv->scan_work, |
705 | msecs_to_jiffies(300)); | ||
705 | } | 706 | } |
706 | 707 | ||
707 | /* This is the final data we are about to send */ | 708 | /* This is the final data we are about to send */ |
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h index f062ed583901..cb14c38caf3a 100644 --- a/drivers/net/wireless/libertas/dev.h +++ b/drivers/net/wireless/libertas/dev.h | |||
@@ -36,6 +36,7 @@ struct lbs_private { | |||
36 | /* CFG80211 */ | 36 | /* CFG80211 */ |
37 | struct wireless_dev *wdev; | 37 | struct wireless_dev *wdev; |
38 | bool wiphy_registered; | 38 | bool wiphy_registered; |
39 | bool stopping; | ||
39 | struct cfg80211_scan_request *scan_req; | 40 | struct cfg80211_scan_request *scan_req; |
40 | u8 assoc_bss[ETH_ALEN]; | 41 | u8 assoc_bss[ETH_ALEN]; |
41 | u8 disassoc_reason; | 42 | u8 disassoc_reason; |
diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c index 296fd00a5129..e5685dc317a8 100644 --- a/drivers/net/wireless/libertas/if_sdio.c +++ b/drivers/net/wireless/libertas/if_sdio.c | |||
@@ -684,18 +684,40 @@ static int if_sdio_prog_firmware(struct if_sdio_card *card) | |||
684 | 684 | ||
685 | lbs_deb_enter(LBS_DEB_SDIO); | 685 | lbs_deb_enter(LBS_DEB_SDIO); |
686 | 686 | ||
687 | /* | ||
688 | * Disable interrupts | ||
689 | */ | ||
690 | sdio_claim_host(card->func); | ||
691 | sdio_writeb(card->func, 0x00, IF_SDIO_H_INT_MASK, &ret); | ||
692 | sdio_release_host(card->func); | ||
693 | |||
687 | sdio_claim_host(card->func); | 694 | sdio_claim_host(card->func); |
688 | scratch = if_sdio_read_scratch(card, &ret); | 695 | scratch = if_sdio_read_scratch(card, &ret); |
689 | sdio_release_host(card->func); | 696 | sdio_release_host(card->func); |
690 | 697 | ||
698 | lbs_deb_sdio("firmware status = %#x\n", scratch); | ||
699 | lbs_deb_sdio("scratch ret = %d\n", ret); | ||
700 | |||
691 | if (ret) | 701 | if (ret) |
692 | goto out; | 702 | goto out; |
693 | 703 | ||
694 | lbs_deb_sdio("firmware status = %#x\n", scratch); | ||
695 | 704 | ||
705 | /* | ||
706 | * The manual clearly describes that FEDC is the right code to use | ||
707 | * to detect firmware presence, but for SD8686 it is not that simple. | ||
708 | * Scratch is also used to store the RX packet length, so we lose | ||
709 | * the FEDC value early on. So we use a non-zero check in order | ||
710 | * to validate firmware presence. | ||
711 | * Additionally, the SD8686 in the Gumstix always has the high scratch | ||
712 | * bit set, even when the firmware is not loaded. So we have to | ||
713 | * exclude that from the test. | ||
714 | */ | ||
696 | if (scratch == IF_SDIO_FIRMWARE_OK) { | 715 | if (scratch == IF_SDIO_FIRMWARE_OK) { |
697 | lbs_deb_sdio("firmware already loaded\n"); | 716 | lbs_deb_sdio("firmware already loaded\n"); |
698 | goto success; | 717 | goto success; |
718 | } else if ((card->model == MODEL_8686) && (scratch & 0x7fff)) { | ||
719 | lbs_deb_sdio("firmware may be running\n"); | ||
720 | goto success; | ||
699 | } | 721 | } |
700 | 722 | ||
701 | ret = lbs_get_firmware(&card->func->dev, lbs_helper_name, lbs_fw_name, | 723 | ret = lbs_get_firmware(&card->func->dev, lbs_helper_name, lbs_fw_name, |
@@ -709,10 +731,14 @@ static int if_sdio_prog_firmware(struct if_sdio_card *card) | |||
709 | if (ret) | 731 | if (ret) |
710 | goto out; | 732 | goto out; |
711 | 733 | ||
734 | lbs_deb_sdio("Helper firmware loaded\n"); | ||
735 | |||
712 | ret = if_sdio_prog_real(card, mainfw); | 736 | ret = if_sdio_prog_real(card, mainfw); |
713 | if (ret) | 737 | if (ret) |
714 | goto out; | 738 | goto out; |
715 | 739 | ||
740 | lbs_deb_sdio("Firmware loaded\n"); | ||
741 | |||
716 | success: | 742 | success: |
717 | sdio_claim_host(card->func); | 743 | sdio_claim_host(card->func); |
718 | sdio_set_block_size(card->func, IF_SDIO_BLOCK_SIZE); | 744 | sdio_set_block_size(card->func, IF_SDIO_BLOCK_SIZE); |
@@ -1042,8 +1068,6 @@ static int if_sdio_probe(struct sdio_func *func, | |||
1042 | priv->exit_deep_sleep = if_sdio_exit_deep_sleep; | 1068 | priv->exit_deep_sleep = if_sdio_exit_deep_sleep; |
1043 | priv->reset_deep_sleep_wakeup = if_sdio_reset_deep_sleep_wakeup; | 1069 | priv->reset_deep_sleep_wakeup = if_sdio_reset_deep_sleep_wakeup; |
1044 | 1070 | ||
1045 | priv->fw_ready = 1; | ||
1046 | |||
1047 | sdio_claim_host(func); | 1071 | sdio_claim_host(func); |
1048 | 1072 | ||
1049 | /* | 1073 | /* |
@@ -1064,6 +1088,8 @@ static int if_sdio_probe(struct sdio_func *func, | |||
1064 | if (ret) | 1088 | if (ret) |
1065 | goto reclaim; | 1089 | goto reclaim; |
1066 | 1090 | ||
1091 | priv->fw_ready = 1; | ||
1092 | |||
1067 | /* | 1093 | /* |
1068 | * FUNC_INIT is required for SD8688 WLAN/BT multiple functions | 1094 | * FUNC_INIT is required for SD8688 WLAN/BT multiple functions |
1069 | */ | 1095 | */ |
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c index 47ce5a6ba120..46b88b118c99 100644 --- a/drivers/net/wireless/libertas/main.c +++ b/drivers/net/wireless/libertas/main.c | |||
@@ -104,6 +104,7 @@ static int lbs_dev_open(struct net_device *dev) | |||
104 | lbs_deb_enter(LBS_DEB_NET); | 104 | lbs_deb_enter(LBS_DEB_NET); |
105 | 105 | ||
106 | spin_lock_irq(&priv->driver_lock); | 106 | spin_lock_irq(&priv->driver_lock); |
107 | priv->stopping = false; | ||
107 | 108 | ||
108 | if (priv->connect_status == LBS_CONNECTED) | 109 | if (priv->connect_status == LBS_CONNECTED) |
109 | netif_carrier_on(dev); | 110 | netif_carrier_on(dev); |
@@ -131,10 +132,16 @@ static int lbs_eth_stop(struct net_device *dev) | |||
131 | lbs_deb_enter(LBS_DEB_NET); | 132 | lbs_deb_enter(LBS_DEB_NET); |
132 | 133 | ||
133 | spin_lock_irq(&priv->driver_lock); | 134 | spin_lock_irq(&priv->driver_lock); |
135 | priv->stopping = true; | ||
134 | netif_stop_queue(dev); | 136 | netif_stop_queue(dev); |
135 | spin_unlock_irq(&priv->driver_lock); | 137 | spin_unlock_irq(&priv->driver_lock); |
136 | 138 | ||
137 | schedule_work(&priv->mcast_work); | 139 | schedule_work(&priv->mcast_work); |
140 | cancel_delayed_work_sync(&priv->scan_work); | ||
141 | if (priv->scan_req) { | ||
142 | cfg80211_scan_done(priv->scan_req, false); | ||
143 | priv->scan_req = NULL; | ||
144 | } | ||
138 | 145 | ||
139 | lbs_deb_leave(LBS_DEB_NET); | 146 | lbs_deb_leave(LBS_DEB_NET); |
140 | return 0; | 147 | return 0; |
diff --git a/drivers/net/wireless/orinoco/orinoco_usb.c b/drivers/net/wireless/orinoco/orinoco_usb.c index a38a7bd25f19..b9aedf18a046 100644 --- a/drivers/net/wireless/orinoco/orinoco_usb.c +++ b/drivers/net/wireless/orinoco/orinoco_usb.c | |||
@@ -57,7 +57,6 @@ | |||
57 | #include <linux/fcntl.h> | 57 | #include <linux/fcntl.h> |
58 | #include <linux/spinlock.h> | 58 | #include <linux/spinlock.h> |
59 | #include <linux/list.h> | 59 | #include <linux/list.h> |
60 | #include <linux/smp_lock.h> | ||
61 | #include <linux/usb.h> | 60 | #include <linux/usb.h> |
62 | #include <linux/timer.h> | 61 | #include <linux/timer.h> |
63 | 62 | ||
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig index eea1ef2f502b..4396d4b9bfb9 100644 --- a/drivers/net/wireless/rt2x00/Kconfig +++ b/drivers/net/wireless/rt2x00/Kconfig | |||
@@ -221,9 +221,6 @@ config RT2X00_LIB_LEDS | |||
221 | boolean | 221 | boolean |
222 | default y if (RT2X00_LIB=y && LEDS_CLASS=y) || (RT2X00_LIB=m && LEDS_CLASS!=n) | 222 | default y if (RT2X00_LIB=y && LEDS_CLASS=y) || (RT2X00_LIB=m && LEDS_CLASS!=n) |
223 | 223 | ||
224 | comment "rt2x00 leds support disabled due to modularized LEDS_CLASS and built-in rt2x00" | ||
225 | depends on RT2X00_LIB=y && LEDS_CLASS=m | ||
226 | |||
227 | config RT2X00_LIB_DEBUGFS | 224 | config RT2X00_LIB_DEBUGFS |
228 | bool "Ralink debugfs support" | 225 | bool "Ralink debugfs support" |
229 | depends on RT2X00_LIB && MAC80211_DEBUGFS | 226 | depends on RT2X00_LIB && MAC80211_DEBUGFS |
diff --git a/drivers/net/wireless/wl1251/Makefile b/drivers/net/wireless/wl1251/Makefile index 4fe246824db3..58b4f935a3f6 100644 --- a/drivers/net/wireless/wl1251/Makefile +++ b/drivers/net/wireless/wl1251/Makefile | |||
@@ -1,6 +1,8 @@ | |||
1 | wl1251-objs = main.o event.o tx.o rx.o ps.o cmd.o \ | 1 | wl1251-objs = main.o event.o tx.o rx.o ps.o cmd.o \ |
2 | acx.o boot.o init.o debugfs.o io.o | 2 | acx.o boot.o init.o debugfs.o io.o |
3 | wl1251_spi-objs += spi.o | ||
4 | wl1251_sdio-objs += sdio.o | ||
3 | 5 | ||
4 | obj-$(CONFIG_WL1251) += wl1251.o | 6 | obj-$(CONFIG_WL1251) += wl1251.o |
5 | obj-$(CONFIG_WL1251_SPI) += spi.o | 7 | obj-$(CONFIG_WL1251_SPI) += wl1251_spi.o |
6 | obj-$(CONFIG_WL1251_SDIO) += sdio.o | 8 | obj-$(CONFIG_WL1251_SDIO) += wl1251_sdio.o |
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index 630fb8664768..458bb57914a3 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c | |||
@@ -1610,6 +1610,8 @@ static void netback_changed(struct xenbus_device *dev, | |||
1610 | switch (backend_state) { | 1610 | switch (backend_state) { |
1611 | case XenbusStateInitialising: | 1611 | case XenbusStateInitialising: |
1612 | case XenbusStateInitialised: | 1612 | case XenbusStateInitialised: |
1613 | case XenbusStateReconfiguring: | ||
1614 | case XenbusStateReconfigured: | ||
1613 | case XenbusStateConnected: | 1615 | case XenbusStateConnected: |
1614 | case XenbusStateUnknown: | 1616 | case XenbusStateUnknown: |
1615 | case XenbusStateClosed: | 1617 | case XenbusStateClosed: |