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-rw-r--r--drivers/net/dsa/mv88e6171.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/drivers/net/dsa/mv88e6171.c b/drivers/net/dsa/mv88e6171.c
index aa33d16f2e22..9808c860a797 100644
--- a/drivers/net/dsa/mv88e6171.c
+++ b/drivers/net/dsa/mv88e6171.c
@@ -51,8 +51,11 @@ static int mv88e6171_switch_reset(struct dsa_switch *ds)
51 /* Wait for transmit queues to drain. */ 51 /* Wait for transmit queues to drain. */
52 usleep_range(2000, 4000); 52 usleep_range(2000, 4000);
53 53
54 /* Reset the switch. */ 54 /* Reset the switch. Keep PPU active. The PPU needs to be
55 REG_WRITE(REG_GLOBAL, 0x04, 0xc400); 55 * active to support indirect phy register accesses through
56 * global registers 0x18 and 0x19.
57 */
58 REG_WRITE(REG_GLOBAL, 0x04, 0xc000);
56 59
57 /* Wait up to one second for reset to complete. */ 60 /* Wait up to one second for reset to complete. */
58 timeout = jiffies + 1 * HZ; 61 timeout = jiffies + 1 * HZ;
@@ -83,11 +86,10 @@ static int mv88e6171_setup_global(struct dsa_switch *ds)
83 int ret; 86 int ret;
84 int i; 87 int i;
85 88
86 /* Disable the PHY polling unit (since there won't be any 89 /* Discard packets with excessive collisions, mask all
87 * external PHYs to poll), don't discard packets with 90 * interrupt sources, enable PPU.
88 * excessive collisions, and mask all interrupt sources.
89 */ 91 */
90 REG_WRITE(REG_GLOBAL, 0x04, 0x0000); 92 REG_WRITE(REG_GLOBAL, 0x04, 0x6000);
91 93
92 /* Set the default address aging time to 5 minutes, and 94 /* Set the default address aging time to 5 minutes, and
93 * enable address learn messages to be sent to all message 95 * enable address learn messages to be sent to all message
@@ -336,7 +338,7 @@ mv88e6171_phy_read(struct dsa_switch *ds, int port, int regnum)
336 int ret; 338 int ret;
337 339
338 mutex_lock(&ps->phy_mutex); 340 mutex_lock(&ps->phy_mutex);
339 ret = mv88e6xxx_phy_read(ds, addr, regnum); 341 ret = mv88e6xxx_phy_read_indirect(ds, addr, regnum);
340 mutex_unlock(&ps->phy_mutex); 342 mutex_unlock(&ps->phy_mutex);
341 return ret; 343 return ret;
342} 344}
@@ -350,7 +352,7 @@ mv88e6171_phy_write(struct dsa_switch *ds,
350 int ret; 352 int ret;
351 353
352 mutex_lock(&ps->phy_mutex); 354 mutex_lock(&ps->phy_mutex);
353 ret = mv88e6xxx_phy_write(ds, addr, regnum, val); 355 ret = mv88e6xxx_phy_write_indirect(ds, addr, regnum, val);
354 mutex_unlock(&ps->phy_mutex); 356 mutex_unlock(&ps->phy_mutex);
355 return ret; 357 return ret;
356} 358}