aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/sky2.c7
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index bdb4ac70d2fb..887c1cea1b42 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -304,10 +304,13 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
304 PHY_M_EC_MAC_S_MSK); 304 PHY_M_EC_MAC_S_MSK);
305 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ); 305 ectrl |= PHY_M_EC_MAC_S(MAC_TX_CLK_25_MHZ);
306 306
307 /* on PHY 88E1040 Rev.D0 (and newer) downshift control changed */
307 if (hw->chip_id == CHIP_ID_YUKON_EC) 308 if (hw->chip_id == CHIP_ID_YUKON_EC)
309 /* set downshift counter to 3x and enable downshift */
308 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA; 310 ectrl |= PHY_M_EC_DSC_2(2) | PHY_M_EC_DOWN_S_ENA;
309 else 311 else
310 ectrl |= PHY_M_EC_M_DSC(2) | PHY_M_EC_S_DSC(3); 312 /* set master & slave downshift counter to 1x */
313 ectrl |= PHY_M_EC_M_DSC(0) | PHY_M_EC_S_DSC(1);
311 314
312 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl); 315 gm_phy_write(hw, port, PHY_MARV_EXT_CTRL, ectrl);
313 } 316 }
@@ -324,10 +327,12 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port)
324 /* enable automatic crossover */ 327 /* enable automatic crossover */
325 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); 328 ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO);
326 329
330 /* downshift on PHY 88E1112 and 88E1149 is changed */
327 if (sky2->autoneg == AUTONEG_ENABLE 331 if (sky2->autoneg == AUTONEG_ENABLE
328 && (hw->chip_id == CHIP_ID_YUKON_XL 332 && (hw->chip_id == CHIP_ID_YUKON_XL
329 || hw->chip_id == CHIP_ID_YUKON_EC_U 333 || hw->chip_id == CHIP_ID_YUKON_EC_U
330 || hw->chip_id == CHIP_ID_YUKON_EX)) { 334 || hw->chip_id == CHIP_ID_YUKON_EX)) {
335 /* set downshift counter to 3x and enable downshift */
331 ctrl &= ~PHY_M_PC_DSC_MSK; 336 ctrl &= ~PHY_M_PC_DSC_MSK;
332 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; 337 ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA;
333 } 338 }