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-rw-r--r--drivers/net/tg3.c24
-rw-r--r--drivers/net/tg3.h1
2 files changed, 12 insertions, 13 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index ff157b704864..4154e1285d5a 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -10673,17 +10673,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10673 if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX) 10673 if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5700_BX)
10674 tp->tg3_flags |= TG3_FLAG_TXD_MBOX_HWBUG; 10674 tp->tg3_flags |= TG3_FLAG_TXD_MBOX_HWBUG;
10675 10675
10676 /* Back to back register writes can cause problems on this chip,
10677 * the workaround is to read back all reg writes except those to
10678 * mailbox regs. See tg3_write_indirect_reg32().
10679 *
10680 * PCI Express 5750_A0 rev chips need this workaround too.
10681 */
10682 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 ||
10683 ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
10684 tp->pci_chip_rev_id == CHIPREV_ID_5750_A0))
10685 tp->tg3_flags |= TG3_FLAG_5701_REG_WRITE_BUG;
10686
10687 if ((pci_state_reg & PCISTATE_BUS_SPEED_HIGH) != 0) 10676 if ((pci_state_reg & PCISTATE_BUS_SPEED_HIGH) != 0)
10688 tp->tg3_flags |= TG3_FLAG_PCI_HIGH_SPEED; 10677 tp->tg3_flags |= TG3_FLAG_PCI_HIGH_SPEED;
10689 if ((pci_state_reg & PCISTATE_BUS_32BIT) != 0) 10678 if ((pci_state_reg & PCISTATE_BUS_32BIT) != 0)
@@ -10707,8 +10696,19 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10707 /* Various workaround register access methods */ 10696 /* Various workaround register access methods */
10708 if (tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG) 10697 if (tp->tg3_flags & TG3_FLAG_PCIX_TARGET_HWBUG)
10709 tp->write32 = tg3_write_indirect_reg32; 10698 tp->write32 = tg3_write_indirect_reg32;
10710 else if (tp->tg3_flags & TG3_FLAG_5701_REG_WRITE_BUG) 10699 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 ||
10700 ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
10701 tp->pci_chip_rev_id == CHIPREV_ID_5750_A0)) {
10702 /*
10703 * Back to back register writes can cause problems on these
10704 * chips, the workaround is to read back all reg writes
10705 * except those to mailbox regs.
10706 *
10707 * See tg3_write_indirect_reg32().
10708 */
10711 tp->write32 = tg3_write_flush_reg32; 10709 tp->write32 = tg3_write_flush_reg32;
10710 }
10711
10712 10712
10713 if ((tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) || 10713 if ((tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) ||
10714 (tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER)) { 10714 (tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER)) {
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index dd04a46c6f14..c52acb0a602b 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2199,7 +2199,6 @@ struct tg3 {
2199#define TG3_FLAG_USE_LINKCHG_REG 0x00000008 2199#define TG3_FLAG_USE_LINKCHG_REG 0x00000008
2200#define TG3_FLAG_USE_MI_INTERRUPT 0x00000010 2200#define TG3_FLAG_USE_MI_INTERRUPT 0x00000010
2201#define TG3_FLAG_ENABLE_ASF 0x00000020 2201#define TG3_FLAG_ENABLE_ASF 0x00000020
2202#define TG3_FLAG_5701_REG_WRITE_BUG 0x00000040
2203#define TG3_FLAG_POLL_SERDES 0x00000080 2202#define TG3_FLAG_POLL_SERDES 0x00000080
2204#define TG3_FLAG_MBOX_WRITE_REORDER 0x00000100 2203#define TG3_FLAG_MBOX_WRITE_REORDER 0x00000100
2205#define TG3_FLAG_PCIX_TARGET_HWBUG 0x00000200 2204#define TG3_FLAG_PCIX_TARGET_HWBUG 0x00000200