18 files changed, 176 insertions, 148 deletions

diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 7858c58df4a3..b721902bb6b4 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -4826,6 +4826,7 @@ static int bond_check_params(struct bond_params *params)
 
 static struct lock_class_key bonding_netdev_xmit_lock_key;
 static struct lock_class_key bonding_netdev_addr_lock_key;
+static struct lock_class_key bonding_tx_busylock_key;
 
 static void bond_set_lockdep_class_one(struct net_device *dev,
                                        struct netdev_queue *txq,
@@ -4840,6 +4841,7 @@ static void bond_set_lockdep_class(struct net_device *dev)
         lockdep_set_class(&dev->addr_list_lock,
                           &bonding_netdev_addr_lock_key);
         netdev_for_each_tx_queue(dev, bond_set_lockdep_class_one, NULL);
+        dev->qdisc_tx_busylock = &bonding_tx_busylock_key;
 }
 
 /*
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c b/drivers/net/can/mscan/mpc5xxx_can.c
index c975999bb055..799c354083c4 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -247,7 +247,7 @@ static u32 __devinit mpc512x_can_get_clock(struct platform_device *ofdev,
 }
 #endif /* CONFIG_PPC_MPC512x */
 
-static struct of_device_id mpc5xxx_can_table[];
+static const struct of_device_id mpc5xxx_can_table[];
 static int __devinit mpc5xxx_can_probe(struct platform_device *ofdev)
 {
         const struct of_device_id *match;
@@ -380,17 +380,17 @@ static int mpc5xxx_can_resume(struct platform_device *ofdev)
 }
 #endif
 
-static const struct mpc5xxx_can_data __devinitdata mpc5200_can_data = {
+static const struct mpc5xxx_can_data __devinitconst mpc5200_can_data = {
         .type = MSCAN_TYPE_MPC5200,
         .get_clock = mpc52xx_can_get_clock,
 };
 
-static const struct mpc5xxx_can_data __devinitdata mpc5121_can_data = {
+static const struct mpc5xxx_can_data __devinitconst mpc5121_can_data = {
         .type = MSCAN_TYPE_MPC5121,
         .get_clock = mpc512x_can_get_clock,
 };
 
-static struct of_device_id __devinitdata mpc5xxx_can_table[] = {
+static const struct of_device_id __devinitconst mpc5xxx_can_table[] = {
         { .compatible = "fsl,mpc5200-mscan", .data = &mpc5200_can_data, },
         /* Note that only MPC5121 Rev. 2 (and later) is supported */
         { .compatible = "fsl,mpc5121-mscan", .data = &mpc5121_can_data, },
diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c
index f0a12962f7b6..f5b82aeb2540 100644
--- a/drivers/net/can/sja1000/peak_pci.c
+++ b/drivers/net/can/sja1000/peak_pci.c
@@ -583,12 +583,14 @@ static int __devinit peak_pci_probe(struct pci_dev *pdev,
         cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE);
         if (!cfg_base) {
                 dev_err(&pdev->dev, "failed to map PCI resource #0\n");
+                err = -ENOMEM;
                 goto failure_release_regions;
         }
 
         reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels);
         if (!reg_base) {
                 dev_err(&pdev->dev, "failed to map PCI resource #1\n");
+                err = -ENOMEM;
                 goto failure_unmap_cfg_base;
         }
 
diff --git a/drivers/net/can/sja1000/peak_pcmcia.c b/drivers/net/can/sja1000/peak_pcmcia.c
index ec6bd9d1b2af..272a85f32b14 100644
--- a/drivers/net/can/sja1000/peak_pcmcia.c
+++ b/drivers/net/can/sja1000/peak_pcmcia.c
@@ -686,8 +686,10 @@ static int __devinit pcan_probe(struct pcmcia_device *pdev)
 
         /* detect available channels */
         pcan_add_channels(card);
-        if (!card->chan_count)
+        if (!card->chan_count) {
+                err = -ENOMEM;
                 goto probe_err_4;
+        }
 
         /* init the timer which controls the leds */
         init_timer(&card->led_timer);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
index 30f04a389227..24220992413f 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_cmn.c
@@ -3523,15 +3523,18 @@ static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
         } else
 #endif
         if (!bp->rx_ring_size) {
-                u32 cfg = SHMEM_RD(bp,
-                             dev_info.port_hw_config[BP_PORT(bp)].default_cfg);
-
                 rx_ring_size = MAX_RX_AVAIL/BNX2X_NUM_RX_QUEUES(bp);
 
-                /* Dercease ring size for 1G functions */
-                if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
-                    PORT_HW_CFG_NET_SERDES_IF_SGMII)
-                        rx_ring_size /= 10;
+                if (CHIP_IS_E3(bp)) {
+                        u32 cfg = SHMEM_RD(bp,
+                                           dev_info.port_hw_config[BP_PORT(bp)].
+                                           default_cfg);
+
+                        /* Decrease ring size for 1G functions */
+                        if ((cfg & PORT_HW_CFG_NET_SERDES_IF_MASK) ==
+                            PORT_HW_CFG_NET_SERDES_IF_SGMII)
+                                rx_ring_size /= 10;
+                }
 
                 /* allocate at least number of buffers required by FW */
                 rx_ring_size = max_t(int, bp->disable_tpa ? MIN_RX_SIZE_NONTPA :
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index f7ed122f4071..d5648fc666bd 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -3052,9 +3052,8 @@ static void bnx2x_drv_info_ether_stat(struct bnx2x *bp)
         struct eth_stats_info *ether_stat =
                 &bp->slowpath->drv_info_to_mcp.ether_stat;
 
-        /* leave last char as NULL */
-        memcpy(ether_stat->version, DRV_MODULE_VERSION,
-               ETH_STAT_INFO_VERSION_LEN - 1);
+        strlcpy(ether_stat->version, DRV_MODULE_VERSION,
+                ETH_STAT_INFO_VERSION_LEN);
 
         bp->sp_objs[0].mac_obj.get_n_elements(bp, &bp->sp_objs[0].mac_obj,
                                         DRV_INFO_ETH_STAT_NUM_MACS_REQUIRED,
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c
index 46280ba4c5d4..a8800ac10df9 100644
--- a/drivers/net/ethernet/broadcom/tg3.c
+++ b/drivers/net/ethernet/broadcom/tg3.c
@@ -782,7 +782,8 @@ static int tg3_ape_wait_for_event(struct tg3 *tp, u32 timeout_us)
         return i == timeout_us / 10;
 }
 
-int tg3_ape_scratchpad_read(struct tg3 *tp, u32 *data, u32 base_off, u32 len)
+static int tg3_ape_scratchpad_read(struct tg3 *tp, u32 *data, u32 base_off,
+                                   u32 len)
 {
         int err;
         u32 i, bufoff, msgoff, maxlen, apedata;
@@ -7763,7 +7764,7 @@ static int tg3_alloc_consistent(struct tg3 *tp)
                 sblk = tnapi->hw_status;
 
                 if (tg3_flag(tp, ENABLE_RSS)) {
-                        u16 *prodptr = 0;
+                        u16 *prodptr = NULL;
 
                         /*
                          * When RSS is enabled, the status block format changes
@@ -8103,11 +8104,11 @@ static int tg3_chip_reset(struct tg3 *tp)
                 u16 val16;
 
                 if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A0) {
-                        int i;
+                        int j;
                         u32 cfg_val;
 
                         /* Wait for link training to complete.  */
-                        for (i = 0; i < 5000; i++)
+                        for (j = 0; j < 5000; j++)
                                 udelay(100);
 
                         pci_read_config_dword(tp->pdev, 0xc4, &cfg_val);
@@ -10206,7 +10207,7 @@ static u32 tg3_irq_count(struct tg3 *tp)
 static bool tg3_enable_msix(struct tg3 *tp)
 {
         int i, rc;
-        struct msix_entry msix_ent[tp->irq_max];
+        struct msix_entry msix_ent[TG3_IRQ_MAX_VECS];
 
         tp->txq_cnt = tp->txq_req;
         tp->rxq_cnt = tp->rxq_req;
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
index 745a1f53361f..31752b24434e 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
@@ -43,6 +43,7 @@
 #include <linux/pci.h>
 #include <linux/spinlock.h>
 #include <linux/timer.h>
+#include <linux/vmalloc.h>
 #include <asm/io.h>
 #include "cxgb4_uld.h"
 #include "t4_hw.h"
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 35b81d8b59e9..137a24438d9c 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -408,7 +408,8 @@ static int t4_memory_rw(struct adapter *adap, int mtype, u32 addr, u32 len,
                         __be32 *buf, int dir)
 {
         u32 pos, start, end, offset, memoffset;
-        int ret;
+        int ret = 0;
+        __be32 *data;
 
         /*
          * Argument sanity checks ...
@@ -416,6 +417,10 @@ static int t4_memory_rw(struct adapter *adap, int mtype, u32 addr, u32 len,
         if ((addr & 0x3) || (len & 0x3))
                 return -EINVAL;
 
+        data = vmalloc(MEMWIN0_APERTURE/sizeof(__be32));
+        if (!data)
+                return -ENOMEM;
+
         /*
          * Offset into the region of memory which is being accessed
          * MEM_EDC0 = 0
@@ -438,7 +443,6 @@ static int t4_memory_rw(struct adapter *adap, int mtype, u32 addr, u32 len,
         offset = (addr - start)/sizeof(__be32);
 
         for (pos = start; pos < end; pos += MEMWIN0_APERTURE, offset = 0) {
-                __be32 data[MEMWIN0_APERTURE/sizeof(__be32)];
 
                 /*
                  * If we're writing, copy the data from the caller's memory
@@ -452,7 +456,7 @@ static int t4_memory_rw(struct adapter *adap, int mtype, u32 addr, u32 len,
                         if (offset || len < MEMWIN0_APERTURE) {
                                 ret = t4_mem_win_rw(adap, pos, data, 1);
                                 if (ret)
-                                        return ret;
+                                        break;
                         }
                         while (offset < (MEMWIN0_APERTURE/sizeof(__be32)) &&
                                len > 0) {
@@ -466,7 +470,7 @@ static int t4_memory_rw(struct adapter *adap, int mtype, u32 addr, u32 len,
                  */
                 ret = t4_mem_win_rw(adap, pos, data, dir);
                 if (ret)
-                        return ret;
+                        break;
 
                 /*
                  * If we're reading, copy the data into the caller's memory
@@ -480,7 +484,8 @@ static int t4_memory_rw(struct adapter *adap, int mtype, u32 addr, u32 len,
                         }
         }
 
-        return 0;
+        vfree(data);
+        return ret;
 }
 
 int t4_memory_write(struct adapter *adap, int mtype, u32 addr, u32 len,
@@ -519,16 +524,21 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p)
         u32 cclk_param, cclk_val;
         int i, ret;
         int ec, sn;
-        u8 vpd[VPD_LEN], csum;
+        u8 *vpd, csum;
         unsigned int vpdr_len, kw_offset, id_len;
 
-        ret = pci_read_vpd(adapter->pdev, VPD_BASE, sizeof(vpd), vpd);
+        vpd = vmalloc(VPD_LEN);
+        if (!vpd)
+                return -ENOMEM;
+
+        ret = pci_read_vpd(adapter->pdev, VPD_BASE, VPD_LEN, vpd);
         if (ret < 0)
-                return ret;
+                goto out;
 
         if (vpd[0] != PCI_VPD_LRDT_ID_STRING) {
                 dev_err(adapter->pdev_dev, "missing VPD ID string\n");
-                return -EINVAL;
+                ret = -EINVAL;
+                goto out;
         }
 
         id_len = pci_vpd_lrdt_size(vpd);
@@ -538,21 +548,24 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p)
         i = pci_vpd_find_tag(vpd, 0, VPD_LEN, PCI_VPD_LRDT_RO_DATA);
         if (i < 0) {
                 dev_err(adapter->pdev_dev, "missing VPD-R section\n");
-                return -EINVAL;
+                ret = -EINVAL;
+                goto out;
         }
 
         vpdr_len = pci_vpd_lrdt_size(&vpd[i]);
         kw_offset = i + PCI_VPD_LRDT_TAG_SIZE;
         if (vpdr_len + kw_offset > VPD_LEN) {
                 dev_err(adapter->pdev_dev, "bad VPD-R length %u\n", vpdr_len);
-                return -EINVAL;
+                ret = -EINVAL;
+                goto out;
         }
 
 #define FIND_VPD_KW(var, name) do { \
         var = pci_vpd_find_info_keyword(vpd, kw_offset, vpdr_len, name); \
         if (var < 0) { \
                 dev_err(adapter->pdev_dev, "missing VPD keyword " name "\n"); \
-                return -EINVAL; \
+                ret = -EINVAL; \
+                goto out; \
         } \
         var += PCI_VPD_INFO_FLD_HDR_SIZE; \
 } while (0)
@@ -564,7 +577,8 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p)
         if (csum) {
                 dev_err(adapter->pdev_dev,
                         "corrupted VPD EEPROM, actual csum %u\n", csum);
-                return -EINVAL;
+                ret = -EINVAL;
+                goto out;
         }
 
         FIND_VPD_KW(ec, "EC");
@@ -587,6 +601,9 @@ int get_vpd_params(struct adapter *adapter, struct vpd_params *p)
                       FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_CCLK));
         ret = t4_query_params(adapter, adapter->mbox, 0, 0,
                               1, &cclk_param, &cclk_val);
+
+out:
+        vfree(vpd);
         if (ret)
                 return ret;
         p->cclk = cclk_val;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
index 18bf08c9d7a4..1077cb2b38db 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c
@@ -1099,7 +1099,7 @@ s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw)
                 if (IXGBE_READ_REG(hw, IXGBE_FDIRCTRL) &
                                    IXGBE_FDIRCTRL_INIT_DONE)
                         break;
-                udelay(10);
+                usleep_range(1000, 2000);
         }
         if (i >= IXGBE_FDIR_INIT_DONE_POLL) {
                 hw_dbg(hw, "Flow Director Signature poll time exceeded!\n");
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
index 90e41db3cb69..dbf37e4a45fd 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_common.c
@@ -70,6 +70,7 @@ static s32 ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw)
 
         switch (hw->device_id) {
         case IXGBE_DEV_ID_X540T:
+        case IXGBE_DEV_ID_X540T1:
                 return 0;
         case IXGBE_DEV_ID_82599_T3_LOM:
                 return 0;
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
index 4104ea25d818..56b20d17d0e4 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c
@@ -2690,10 +2690,7 @@ static int ixgbe_get_ts_info(struct net_device *dev,
                         (1 << HWTSTAMP_FILTER_NONE) |
                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
                         (1 << HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
-                        (1 << HWTSTAMP_FILTER_PTP_V2_SYNC) |
-                        (1 << HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
-                        (1 << HWTSTAMP_FILTER_PTP_V2_EVENT) |
-                        (1 << HWTSTAMP_FILTER_SOME);
+                        (1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
                 break;
 #endif /* CONFIG_IXGBE_PTP */
         default:
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index 868af6938219..fa3d552e1f4a 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -114,6 +114,7 @@ static DEFINE_PCI_DEVICE_TABLE(ixgbe_pci_tbl) = {
         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS), board_82599 },
         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP), board_82599 },
         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP), board_82599 },
+        {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T1), board_X540 },
         /* required last entry */
         {0, }
 };
@@ -2322,6 +2323,12 @@ static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter, bool queues,
         default:
                 break;
         }
+
+#ifdef CONFIG_IXGBE_PTP
+        if (adapter->hw.mac.type == ixgbe_mac_X540)
+                mask |= IXGBE_EIMS_TIMESYNC;
+#endif
+
         if ((adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) &&
             !(adapter->flags2 & IXGBE_FLAG2_FDIR_REQUIRES_REINIT))
                 mask |= IXGBE_EIMS_FLOW_DIR;
@@ -2385,8 +2392,10 @@ static irqreturn_t ixgbe_msix_other(int irq, void *data)
         }
 
         ixgbe_check_fan_failure(adapter, eicr);
+
 #ifdef CONFIG_IXGBE_PTP
-        ixgbe_ptp_check_pps_event(adapter, eicr);
+        if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
+                ixgbe_ptp_check_pps_event(adapter, eicr);
 #endif
 
         /* re-enable the original interrupt state, no lsc, no queues */
@@ -2580,7 +2589,8 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
 
         ixgbe_check_fan_failure(adapter, eicr);
 #ifdef CONFIG_IXGBE_PTP
-        ixgbe_ptp_check_pps_event(adapter, eicr);
+        if (unlikely(eicr & IXGBE_EICR_TIMESYNC))
+                ixgbe_ptp_check_pps_event(adapter, eicr);
 #endif
 
         /* would disable interrupts here but EIAM disabled it */
@@ -7045,6 +7055,7 @@ int ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
                 is_wol_supported = 1;
                 break;
         case IXGBE_DEV_ID_X540T:
+        case IXGBE_DEV_ID_X540T1:
                 /* check eeprom to see if enabled wol */
                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
index 39881cb17a4b..d9291316ee9f 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c
@@ -106,6 +106,83 @@ static struct sock_filter ptp_filter[] = {
 };
 
 /**
+ * ixgbe_ptp_setup_sdp
+ * @hw: the hardware private structure
+ *
+ * this function enables or disables the clock out feature on SDP0 for
+ * the X540 device. It will create a 1second periodic output that can
+ * be used as the PPS (via an interrupt).
+ *
+ * It calculates when the systime will be on an exact second, and then
+ * aligns the start of the PPS signal to that value. The shift is
+ * necessary because it can change based on the link speed.
+ */
+static void ixgbe_ptp_setup_sdp(struct ixgbe_adapter *adapter)
+{
+        struct ixgbe_hw *hw = &adapter->hw;
+        int shift = adapter->cc.shift;
+        u32 esdp, tsauxc, clktiml, clktimh, trgttiml, trgttimh, rem;
+        u64 ns = 0, clock_edge = 0;
+
+        if ((adapter->flags2 & IXGBE_FLAG2_PTP_PPS_ENABLED) &&
+            (hw->mac.type == ixgbe_mac_X540)) {
+
+                /* disable the pin first */
+                IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0x0);
+                IXGBE_WRITE_FLUSH(hw);
+
+                esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
+
+                /*
+                 * enable the SDP0 pin as output, and connected to the
+                 * native function for Timesync (ClockOut)
+                 */
+                esdp |= (IXGBE_ESDP_SDP0_DIR |
+                         IXGBE_ESDP_SDP0_NATIVE);
+
+                /*
+                 * enable the Clock Out feature on SDP0, and allow
+                 * interrupts to occur when the pin changes
+                 */
+                tsauxc = (IXGBE_TSAUXC_EN_CLK |
+                          IXGBE_TSAUXC_SYNCLK |
+                          IXGBE_TSAUXC_SDP0_INT);
+
+                /* clock period (or pulse length) */
+                clktiml = (u32)(NSECS_PER_SEC << shift);
+                clktimh = (u32)((NSECS_PER_SEC << shift) >> 32);
+
+                /*
+                 * Account for the cyclecounter wrap-around value by
+                 * using the converted ns value of the current time to
+                 * check for when the next aligned second would occur.
+                 */
+                clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML);
+                clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) << 32;
+                ns = timecounter_cyc2time(&adapter->tc, clock_edge);
+
+                div_u64_rem(ns, NSECS_PER_SEC, &rem);
+                clock_edge += ((NSECS_PER_SEC - (u64)rem) << shift);
+
+                /* specify the initial clock start time */
+                trgttiml = (u32)clock_edge;
+                trgttimh = (u32)(clock_edge >> 32);
+
+                IXGBE_WRITE_REG(hw, IXGBE_CLKTIML, clktiml);
+                IXGBE_WRITE_REG(hw, IXGBE_CLKTIMH, clktimh);
+                IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, trgttiml);
+                IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, trgttimh);
+
+                IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
+                IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc);
+        } else {
+                IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0x0);
+        }
+
+        IXGBE_WRITE_FLUSH(hw);
+}
+
+/**
  * ixgbe_ptp_read - read raw cycle counter (to be used by time counter)
  * @cc: the cyclecounter structure
  *
@@ -198,6 +275,9 @@ static int ixgbe_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
                          now);
 
         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
+
+        ixgbe_ptp_setup_sdp(adapter);
+
         return 0;
 }
 
@@ -251,6 +331,7 @@ static int ixgbe_ptp_settime(struct ptp_clock_info *ptp,
         timecounter_init(&adapter->tc, &adapter->cc, ns);
         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
 
+        ixgbe_ptp_setup_sdp(adapter);
         return 0;
 }
 
@@ -281,8 +362,9 @@ static int ixgbe_ptp_enable(struct ptp_clock_info *ptp,
                         if (on)
                                 adapter->flags2 |= IXGBE_FLAG2_PTP_PPS_ENABLED;
                         else
-                                adapter->flags2 &=
-                                        ~IXGBE_FLAG2_PTP_PPS_ENABLED;
+                                adapter->flags2 &= ~IXGBE_FLAG2_PTP_PPS_ENABLED;
+
+                        ixgbe_ptp_setup_sdp(adapter);
                         return 0;
                 default:
                         break;
@@ -305,109 +387,15 @@ void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter, u32 eicr)
         struct ixgbe_hw *hw = &adapter->hw;
         struct ptp_clock_event event;
 
-        event.type = PTP_CLOCK_PPS;
-
-        /* Make sure ptp clock is valid, and PPS event enabled */
-        if (!adapter->ptp_clock ||
-            !(adapter->flags2 & IXGBE_FLAG2_PTP_PPS_ENABLED))
-                return;
-
-        if (unlikely(eicr & IXGBE_EICR_TIMESYNC)) {
-                switch (hw->mac.type) {
-                case ixgbe_mac_X540:
-                        ptp_clock_event(adapter->ptp_clock, &event);
-                        break;
-                default:
-                        break;
-                }
-        }
-}
-
-/**
- * ixgbe_ptp_enable_sdp
- * @hw: the hardware private structure
- * @shift: the clock shift for calculating nanoseconds
- *
- * this function enables the clock out feature on the sdp0 for the
- * X540 device. It will create a 1second periodic output that can be
- * used as the PPS (via an interrupt).
- *
- * It calculates when the systime will be on an exact second, and then
- * aligns the start of the PPS signal to that value. The shift is
- * necessary because it can change based on the link speed.
- */
-static void ixgbe_ptp_enable_sdp(struct ixgbe_hw *hw, int shift)
-{
-        u32 esdp, tsauxc, clktiml, clktimh, trgttiml, trgttimh;
-        u64 clock_edge = 0;
-        u32 rem;
-
         switch (hw->mac.type) {
         case ixgbe_mac_X540:
-                esdp = IXGBE_READ_REG(hw, IXGBE_ESDP);
-
-                /*
-                 * enable the SDP0 pin as output, and connected to the native
-                 * function for Timesync (ClockOut)
-                 */
-                esdp |= (IXGBE_ESDP_SDP0_DIR |
-                         IXGBE_ESDP_SDP0_NATIVE);
-
-                /*
-                 * enable the Clock Out feature on SDP0, and allow interrupts
-                 * to occur when the pin changes
-                 */
-                tsauxc = (IXGBE_TSAUXC_EN_CLK |
-                          IXGBE_TSAUXC_SYNCLK |
-                          IXGBE_TSAUXC_SDP0_INT);
-
-                /* clock period (or pulse length) */
-                clktiml = (u32)(NSECS_PER_SEC << shift);
-                clktimh = (u32)((NSECS_PER_SEC << shift) >> 32);
-
-                clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIML);
-                clock_edge |= (u64)IXGBE_READ_REG(hw, IXGBE_SYSTIMH) << 32;
-
-                /*
-                 * account for the fact that we can't do u64 division
-                 * with remainder, by converting the clock values into
-                 * nanoseconds first
-                 */
-                clock_edge >>= shift;
-                div_u64_rem(clock_edge, NSECS_PER_SEC, &rem);
-                clock_edge += (NSECS_PER_SEC - rem);
-                clock_edge <<= shift;
-
-                /* specify the initial clock start time */
-                trgttiml = (u32)clock_edge;
-                trgttimh = (u32)(clock_edge >> 32);
-
-                IXGBE_WRITE_REG(hw, IXGBE_CLKTIML, clktiml);
-                IXGBE_WRITE_REG(hw, IXGBE_CLKTIMH, clktimh);
-                IXGBE_WRITE_REG(hw, IXGBE_TRGTTIML0, trgttiml);
-                IXGBE_WRITE_REG(hw, IXGBE_TRGTTIMH0, trgttimh);
-
-                IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp);
-                IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, tsauxc);
-
-                IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EICR_TIMESYNC);
+                ptp_clock_event(adapter->ptp_clock, &event);
                 break;
         default:
                 break;
         }
 }
 
-/**
- * ixgbe_ptp_disable_sdp
- * @hw: the private hardware structure
- *
- * this function disables the auxiliary SDP clock out feature
- */
-static void ixgbe_ptp_disable_sdp(struct ixgbe_hw *hw)
-{
-        IXGBE_WRITE_REG(hw, IXGBE_EIMC, IXGBE_EICR_TIMESYNC);
-        IXGBE_WRITE_REG(hw, IXGBE_TSAUXC, 0);
-}
 
 /**
  * ixgbe_ptp_overflow_check - delayed work to detect SYSTIME overflow
@@ -822,9 +810,6 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)
         if (adapter->cycle_speed == cycle_speed && timinca)
                 return;
 
-        /* disable the SDP clock out */
-        ixgbe_ptp_disable_sdp(hw);
-
         /**
          * Scale the NIC cycle counter by a large factor so that
          * relatively small corrections to the frequency can be added
@@ -877,10 +862,6 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)
         IXGBE_WRITE_REG(hw, IXGBE_SYSTIMH, 0x00000000);
         IXGBE_WRITE_FLUSH(hw);
 
-        /* now that the shift has been calculated and the systime
-         * registers reset, (re-)enable the Clock out feature*/
-        ixgbe_ptp_enable_sdp(hw, shift);
-
         /* store the new cycle speed */
         adapter->cycle_speed = cycle_speed;
 
@@ -901,6 +882,12 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter)
                          ktime_to_ns(ktime_get_real()));
 
         spin_unlock_irqrestore(&adapter->tmreg_lock, flags);
+
+        /*
+         * Now that the shift has been calculated and the systime
+         * registers reset, (re-)enable the Clock out feature
+         */
+        ixgbe_ptp_setup_sdp(adapter);
 }
 
 /**
@@ -979,10 +966,11 @@ void ixgbe_ptp_init(struct ixgbe_adapter *adapter)
  */
 void ixgbe_ptp_stop(struct ixgbe_adapter *adapter)
 {
-        ixgbe_ptp_disable_sdp(&adapter->hw);
-
         /* stop the overflow check task */
-        adapter->flags2 &= ~IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED;
+        adapter->flags2 &= ~(IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED |
+                             IXGBE_FLAG2_PTP_PPS_ENABLED);
+
+        ixgbe_ptp_setup_sdp(adapter);
 
         if (adapter->ptp_clock) {
                 ptp_clock_unregister(adapter->ptp_clock);
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
index 400f86a31174..0722f3368092 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_type.h
@@ -65,6 +65,7 @@
 #define IXGBE_DEV_ID_82599_LS            0x154F
 #define IXGBE_DEV_ID_X540T               0x1528
 #define IXGBE_DEV_ID_82599_SFP_SF_QP     0x154A
+#define IXGBE_DEV_ID_X540T1              0x1560
 
 /* VF Device IDs */
 #define IXGBE_DEV_ID_82599_VF           0x10ED
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
index bce01641ee6b..97302419a377 100644
--- a/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
+++ b/drivers/net/ethernet/oki-semi/pch_gbe/Kconfig
@@ -26,7 +26,7 @@ if PCH_GBE
 config PCH_PTP
         bool "PCH PTP clock support"
         default n
-        depends on PTP_1588_CLOCK_PCH
+        select PTP_1588_CLOCK_PCH
         ---help---
           Say Y here if you want to use Precision Time Protocol (PTP) in the
           driver. PTP is a method to precisely synchronize distributed clocks
diff --git a/drivers/net/ethernet/ti/davinci_cpdma.c b/drivers/net/ethernet/ti/davinci_cpdma.c
index d15c888e9df8..49956730cd8d 100644
--- a/drivers/net/ethernet/ti/davinci_cpdma.c
+++ b/drivers/net/ethernet/ti/davinci_cpdma.c
@@ -863,6 +863,7 @@ int cpdma_chan_stop(struct cpdma_chan *chan)
 
                 next_dma = desc_read(desc, hw_next);
                 chan->head = desc_from_phys(pool, next_dma);
+                chan->count--;
                 chan->stats.teardown_dequeue++;
 
                 /* issue callback without locks held */
diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index 5c7547c4f802..d44cca327588 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -1315,6 +1315,7 @@ static const struct team_option team_options[] = {
 
 static struct lock_class_key team_netdev_xmit_lock_key;
 static struct lock_class_key team_netdev_addr_lock_key;
+static struct lock_class_key team_tx_busylock_key;
 
 static void team_set_lockdep_class_one(struct net_device *dev,
                                        struct netdev_queue *txq,
@@ -1327,6 +1328,7 @@ static void team_set_lockdep_class(struct net_device *dev)
 {
         lockdep_set_class(&dev->addr_list_lock, &team_netdev_addr_lock_key);
         netdev_for_each_tx_queue(dev, team_set_lockdep_class_one, NULL);
+        dev->qdisc_tx_busylock = &team_tx_busylock_key;
 }
 
 static int team_init(struct net_device *dev)