diff options
Diffstat (limited to 'drivers/net')
44 files changed, 2838 insertions, 500 deletions
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 507569a4f232..ed5741b2e701 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -1934,6 +1934,15 @@ config XILINX_EMACLITE | |||
1934 | help | 1934 | help |
1935 | This driver supports the 10/100 Ethernet Lite from Xilinx. | 1935 | This driver supports the 10/100 Ethernet Lite from Xilinx. |
1936 | 1936 | ||
1937 | config BCM63XX_ENET | ||
1938 | tristate "Broadcom 63xx internal mac support" | ||
1939 | depends on BCM63XX | ||
1940 | select MII | ||
1941 | select PHYLIB | ||
1942 | help | ||
1943 | This driver supports the ethernet MACs in the Broadcom 63xx | ||
1944 | MIPS chipset family (BCM63XX). | ||
1945 | |||
1937 | source "drivers/net/fs_enet/Kconfig" | 1946 | source "drivers/net/fs_enet/Kconfig" |
1938 | 1947 | ||
1939 | endif # NET_ETHERNET | 1948 | endif # NET_ETHERNET |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 99ae6d7fe6a9..ae8cd30f13d6 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
@@ -137,6 +137,7 @@ obj-$(CONFIG_B44) += b44.o | |||
137 | obj-$(CONFIG_FORCEDETH) += forcedeth.o | 137 | obj-$(CONFIG_FORCEDETH) += forcedeth.o |
138 | obj-$(CONFIG_NE_H8300) += ne-h8300.o 8390.o | 138 | obj-$(CONFIG_NE_H8300) += ne-h8300.o 8390.o |
139 | obj-$(CONFIG_AX88796) += ax88796.o | 139 | obj-$(CONFIG_AX88796) += ax88796.o |
140 | obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o | ||
140 | 141 | ||
141 | obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o | 142 | obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o |
142 | obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o | 143 | obj-$(CONFIG_MV643XX_ETH) += mv643xx_eth.o |
diff --git a/drivers/net/atl1e/atl1e.h b/drivers/net/atl1e/atl1e.h index ba48220df16a..490d3b38e0cb 100644 --- a/drivers/net/atl1e/atl1e.h +++ b/drivers/net/atl1e/atl1e.h | |||
@@ -377,10 +377,19 @@ struct atl1e_hw { | |||
377 | */ | 377 | */ |
378 | struct atl1e_tx_buffer { | 378 | struct atl1e_tx_buffer { |
379 | struct sk_buff *skb; | 379 | struct sk_buff *skb; |
380 | u16 flags; | ||
381 | #define ATL1E_TX_PCIMAP_SINGLE 0x0001 | ||
382 | #define ATL1E_TX_PCIMAP_PAGE 0x0002 | ||
383 | #define ATL1E_TX_PCIMAP_TYPE_MASK 0x0003 | ||
380 | u16 length; | 384 | u16 length; |
381 | dma_addr_t dma; | 385 | dma_addr_t dma; |
382 | }; | 386 | }; |
383 | 387 | ||
388 | #define ATL1E_SET_PCIMAP_TYPE(tx_buff, type) do { \ | ||
389 | ((tx_buff)->flags) &= ~ATL1E_TX_PCIMAP_TYPE_MASK; \ | ||
390 | ((tx_buff)->flags) |= (type); \ | ||
391 | } while (0) | ||
392 | |||
384 | struct atl1e_rx_page { | 393 | struct atl1e_rx_page { |
385 | dma_addr_t dma; /* receive rage DMA address */ | 394 | dma_addr_t dma; /* receive rage DMA address */ |
386 | u8 *addr; /* receive rage virtual address */ | 395 | u8 *addr; /* receive rage virtual address */ |
diff --git a/drivers/net/atl1e/atl1e_main.c b/drivers/net/atl1e/atl1e_main.c index 69b830f4b68f..955da733c2ad 100644 --- a/drivers/net/atl1e/atl1e_main.c +++ b/drivers/net/atl1e/atl1e_main.c | |||
@@ -635,7 +635,11 @@ static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter) | |||
635 | for (index = 0; index < ring_count; index++) { | 635 | for (index = 0; index < ring_count; index++) { |
636 | tx_buffer = &tx_ring->tx_buffer[index]; | 636 | tx_buffer = &tx_ring->tx_buffer[index]; |
637 | if (tx_buffer->dma) { | 637 | if (tx_buffer->dma) { |
638 | pci_unmap_page(pdev, tx_buffer->dma, | 638 | if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) |
639 | pci_unmap_single(pdev, tx_buffer->dma, | ||
640 | tx_buffer->length, PCI_DMA_TODEVICE); | ||
641 | else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) | ||
642 | pci_unmap_page(pdev, tx_buffer->dma, | ||
639 | tx_buffer->length, PCI_DMA_TODEVICE); | 643 | tx_buffer->length, PCI_DMA_TODEVICE); |
640 | tx_buffer->dma = 0; | 644 | tx_buffer->dma = 0; |
641 | } | 645 | } |
@@ -1220,7 +1224,11 @@ static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter) | |||
1220 | while (next_to_clean != hw_next_to_clean) { | 1224 | while (next_to_clean != hw_next_to_clean) { |
1221 | tx_buffer = &tx_ring->tx_buffer[next_to_clean]; | 1225 | tx_buffer = &tx_ring->tx_buffer[next_to_clean]; |
1222 | if (tx_buffer->dma) { | 1226 | if (tx_buffer->dma) { |
1223 | pci_unmap_page(adapter->pdev, tx_buffer->dma, | 1227 | if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE) |
1228 | pci_unmap_single(adapter->pdev, tx_buffer->dma, | ||
1229 | tx_buffer->length, PCI_DMA_TODEVICE); | ||
1230 | else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE) | ||
1231 | pci_unmap_page(adapter->pdev, tx_buffer->dma, | ||
1224 | tx_buffer->length, PCI_DMA_TODEVICE); | 1232 | tx_buffer->length, PCI_DMA_TODEVICE); |
1225 | tx_buffer->dma = 0; | 1233 | tx_buffer->dma = 0; |
1226 | } | 1234 | } |
@@ -1741,6 +1749,7 @@ static void atl1e_tx_map(struct atl1e_adapter *adapter, | |||
1741 | tx_buffer->length = map_len; | 1749 | tx_buffer->length = map_len; |
1742 | tx_buffer->dma = pci_map_single(adapter->pdev, | 1750 | tx_buffer->dma = pci_map_single(adapter->pdev, |
1743 | skb->data, hdr_len, PCI_DMA_TODEVICE); | 1751 | skb->data, hdr_len, PCI_DMA_TODEVICE); |
1752 | ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); | ||
1744 | mapped_len += map_len; | 1753 | mapped_len += map_len; |
1745 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); | 1754 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); |
1746 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | | 1755 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | |
@@ -1766,6 +1775,7 @@ static void atl1e_tx_map(struct atl1e_adapter *adapter, | |||
1766 | tx_buffer->dma = | 1775 | tx_buffer->dma = |
1767 | pci_map_single(adapter->pdev, skb->data + mapped_len, | 1776 | pci_map_single(adapter->pdev, skb->data + mapped_len, |
1768 | map_len, PCI_DMA_TODEVICE); | 1777 | map_len, PCI_DMA_TODEVICE); |
1778 | ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE); | ||
1769 | mapped_len += map_len; | 1779 | mapped_len += map_len; |
1770 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); | 1780 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); |
1771 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | | 1781 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | |
@@ -1801,6 +1811,7 @@ static void atl1e_tx_map(struct atl1e_adapter *adapter, | |||
1801 | (i * MAX_TX_BUF_LEN), | 1811 | (i * MAX_TX_BUF_LEN), |
1802 | tx_buffer->length, | 1812 | tx_buffer->length, |
1803 | PCI_DMA_TODEVICE); | 1813 | PCI_DMA_TODEVICE); |
1814 | ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE); | ||
1804 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); | 1815 | use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma); |
1805 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | | 1816 | use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) | |
1806 | ((cpu_to_le32(tx_buffer->length) & | 1817 | ((cpu_to_le32(tx_buffer->length) & |
diff --git a/drivers/net/b44.c b/drivers/net/b44.c index 0189dcd36f31..e046943ef29d 100644 --- a/drivers/net/b44.c +++ b/drivers/net/b44.c | |||
@@ -847,23 +847,22 @@ static int b44_poll(struct napi_struct *napi, int budget) | |||
847 | { | 847 | { |
848 | struct b44 *bp = container_of(napi, struct b44, napi); | 848 | struct b44 *bp = container_of(napi, struct b44, napi); |
849 | int work_done; | 849 | int work_done; |
850 | unsigned long flags; | ||
850 | 851 | ||
851 | spin_lock_irq(&bp->lock); | 852 | spin_lock_irqsave(&bp->lock, flags); |
852 | 853 | ||
853 | if (bp->istat & (ISTAT_TX | ISTAT_TO)) { | 854 | if (bp->istat & (ISTAT_TX | ISTAT_TO)) { |
854 | /* spin_lock(&bp->tx_lock); */ | 855 | /* spin_lock(&bp->tx_lock); */ |
855 | b44_tx(bp); | 856 | b44_tx(bp); |
856 | /* spin_unlock(&bp->tx_lock); */ | 857 | /* spin_unlock(&bp->tx_lock); */ |
857 | } | 858 | } |
858 | spin_unlock_irq(&bp->lock); | 859 | spin_unlock_irqrestore(&bp->lock, flags); |
859 | 860 | ||
860 | work_done = 0; | 861 | work_done = 0; |
861 | if (bp->istat & ISTAT_RX) | 862 | if (bp->istat & ISTAT_RX) |
862 | work_done += b44_rx(bp, budget); | 863 | work_done += b44_rx(bp, budget); |
863 | 864 | ||
864 | if (bp->istat & ISTAT_ERRORS) { | 865 | if (bp->istat & ISTAT_ERRORS) { |
865 | unsigned long flags; | ||
866 | |||
867 | spin_lock_irqsave(&bp->lock, flags); | 866 | spin_lock_irqsave(&bp->lock, flags); |
868 | b44_halt(bp); | 867 | b44_halt(bp); |
869 | b44_init_rings(bp); | 868 | b44_init_rings(bp); |
diff --git a/drivers/net/bcm63xx_enet.c b/drivers/net/bcm63xx_enet.c new file mode 100644 index 000000000000..09d270913c50 --- /dev/null +++ b/drivers/net/bcm63xx_enet.c | |||
@@ -0,0 +1,1971 @@ | |||
1 | /* | ||
2 | * Driver for BCM963xx builtin Ethernet mac | ||
3 | * | ||
4 | * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/module.h> | ||
22 | #include <linux/clk.h> | ||
23 | #include <linux/etherdevice.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/ethtool.h> | ||
26 | #include <linux/crc32.h> | ||
27 | #include <linux/err.h> | ||
28 | #include <linux/dma-mapping.h> | ||
29 | #include <linux/platform_device.h> | ||
30 | #include <linux/if_vlan.h> | ||
31 | |||
32 | #include <bcm63xx_dev_enet.h> | ||
33 | #include "bcm63xx_enet.h" | ||
34 | |||
35 | static char bcm_enet_driver_name[] = "bcm63xx_enet"; | ||
36 | static char bcm_enet_driver_version[] = "1.0"; | ||
37 | |||
38 | static int copybreak __read_mostly = 128; | ||
39 | module_param(copybreak, int, 0); | ||
40 | MODULE_PARM_DESC(copybreak, "Receive copy threshold"); | ||
41 | |||
42 | /* io memory shared between all devices */ | ||
43 | static void __iomem *bcm_enet_shared_base; | ||
44 | |||
45 | /* | ||
46 | * io helpers to access mac registers | ||
47 | */ | ||
48 | static inline u32 enet_readl(struct bcm_enet_priv *priv, u32 off) | ||
49 | { | ||
50 | return bcm_readl(priv->base + off); | ||
51 | } | ||
52 | |||
53 | static inline void enet_writel(struct bcm_enet_priv *priv, | ||
54 | u32 val, u32 off) | ||
55 | { | ||
56 | bcm_writel(val, priv->base + off); | ||
57 | } | ||
58 | |||
59 | /* | ||
60 | * io helpers to access shared registers | ||
61 | */ | ||
62 | static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off) | ||
63 | { | ||
64 | return bcm_readl(bcm_enet_shared_base + off); | ||
65 | } | ||
66 | |||
67 | static inline void enet_dma_writel(struct bcm_enet_priv *priv, | ||
68 | u32 val, u32 off) | ||
69 | { | ||
70 | bcm_writel(val, bcm_enet_shared_base + off); | ||
71 | } | ||
72 | |||
73 | /* | ||
74 | * write given data into mii register and wait for transfer to end | ||
75 | * with timeout (average measured transfer time is 25us) | ||
76 | */ | ||
77 | static int do_mdio_op(struct bcm_enet_priv *priv, unsigned int data) | ||
78 | { | ||
79 | int limit; | ||
80 | |||
81 | /* make sure mii interrupt status is cleared */ | ||
82 | enet_writel(priv, ENET_IR_MII, ENET_IR_REG); | ||
83 | |||
84 | enet_writel(priv, data, ENET_MIIDATA_REG); | ||
85 | wmb(); | ||
86 | |||
87 | /* busy wait on mii interrupt bit, with timeout */ | ||
88 | limit = 1000; | ||
89 | do { | ||
90 | if (enet_readl(priv, ENET_IR_REG) & ENET_IR_MII) | ||
91 | break; | ||
92 | udelay(1); | ||
93 | } while (limit-- >= 0); | ||
94 | |||
95 | return (limit < 0) ? 1 : 0; | ||
96 | } | ||
97 | |||
98 | /* | ||
99 | * MII internal read callback | ||
100 | */ | ||
101 | static int bcm_enet_mdio_read(struct bcm_enet_priv *priv, int mii_id, | ||
102 | int regnum) | ||
103 | { | ||
104 | u32 tmp, val; | ||
105 | |||
106 | tmp = regnum << ENET_MIIDATA_REG_SHIFT; | ||
107 | tmp |= 0x2 << ENET_MIIDATA_TA_SHIFT; | ||
108 | tmp |= mii_id << ENET_MIIDATA_PHYID_SHIFT; | ||
109 | tmp |= ENET_MIIDATA_OP_READ_MASK; | ||
110 | |||
111 | if (do_mdio_op(priv, tmp)) | ||
112 | return -1; | ||
113 | |||
114 | val = enet_readl(priv, ENET_MIIDATA_REG); | ||
115 | val &= 0xffff; | ||
116 | return val; | ||
117 | } | ||
118 | |||
119 | /* | ||
120 | * MII internal write callback | ||
121 | */ | ||
122 | static int bcm_enet_mdio_write(struct bcm_enet_priv *priv, int mii_id, | ||
123 | int regnum, u16 value) | ||
124 | { | ||
125 | u32 tmp; | ||
126 | |||
127 | tmp = (value & 0xffff) << ENET_MIIDATA_DATA_SHIFT; | ||
128 | tmp |= 0x2 << ENET_MIIDATA_TA_SHIFT; | ||
129 | tmp |= regnum << ENET_MIIDATA_REG_SHIFT; | ||
130 | tmp |= mii_id << ENET_MIIDATA_PHYID_SHIFT; | ||
131 | tmp |= ENET_MIIDATA_OP_WRITE_MASK; | ||
132 | |||
133 | (void)do_mdio_op(priv, tmp); | ||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | /* | ||
138 | * MII read callback from phylib | ||
139 | */ | ||
140 | static int bcm_enet_mdio_read_phylib(struct mii_bus *bus, int mii_id, | ||
141 | int regnum) | ||
142 | { | ||
143 | return bcm_enet_mdio_read(bus->priv, mii_id, regnum); | ||
144 | } | ||
145 | |||
146 | /* | ||
147 | * MII write callback from phylib | ||
148 | */ | ||
149 | static int bcm_enet_mdio_write_phylib(struct mii_bus *bus, int mii_id, | ||
150 | int regnum, u16 value) | ||
151 | { | ||
152 | return bcm_enet_mdio_write(bus->priv, mii_id, regnum, value); | ||
153 | } | ||
154 | |||
155 | /* | ||
156 | * MII read callback from mii core | ||
157 | */ | ||
158 | static int bcm_enet_mdio_read_mii(struct net_device *dev, int mii_id, | ||
159 | int regnum) | ||
160 | { | ||
161 | return bcm_enet_mdio_read(netdev_priv(dev), mii_id, regnum); | ||
162 | } | ||
163 | |||
164 | /* | ||
165 | * MII write callback from mii core | ||
166 | */ | ||
167 | static void bcm_enet_mdio_write_mii(struct net_device *dev, int mii_id, | ||
168 | int regnum, int value) | ||
169 | { | ||
170 | bcm_enet_mdio_write(netdev_priv(dev), mii_id, regnum, value); | ||
171 | } | ||
172 | |||
173 | /* | ||
174 | * refill rx queue | ||
175 | */ | ||
176 | static int bcm_enet_refill_rx(struct net_device *dev) | ||
177 | { | ||
178 | struct bcm_enet_priv *priv; | ||
179 | |||
180 | priv = netdev_priv(dev); | ||
181 | |||
182 | while (priv->rx_desc_count < priv->rx_ring_size) { | ||
183 | struct bcm_enet_desc *desc; | ||
184 | struct sk_buff *skb; | ||
185 | dma_addr_t p; | ||
186 | int desc_idx; | ||
187 | u32 len_stat; | ||
188 | |||
189 | desc_idx = priv->rx_dirty_desc; | ||
190 | desc = &priv->rx_desc_cpu[desc_idx]; | ||
191 | |||
192 | if (!priv->rx_skb[desc_idx]) { | ||
193 | skb = netdev_alloc_skb(dev, priv->rx_skb_size); | ||
194 | if (!skb) | ||
195 | break; | ||
196 | priv->rx_skb[desc_idx] = skb; | ||
197 | |||
198 | p = dma_map_single(&priv->pdev->dev, skb->data, | ||
199 | priv->rx_skb_size, | ||
200 | DMA_FROM_DEVICE); | ||
201 | desc->address = p; | ||
202 | } | ||
203 | |||
204 | len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT; | ||
205 | len_stat |= DMADESC_OWNER_MASK; | ||
206 | if (priv->rx_dirty_desc == priv->rx_ring_size - 1) { | ||
207 | len_stat |= DMADESC_WRAP_MASK; | ||
208 | priv->rx_dirty_desc = 0; | ||
209 | } else { | ||
210 | priv->rx_dirty_desc++; | ||
211 | } | ||
212 | wmb(); | ||
213 | desc->len_stat = len_stat; | ||
214 | |||
215 | priv->rx_desc_count++; | ||
216 | |||
217 | /* tell dma engine we allocated one buffer */ | ||
218 | enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan)); | ||
219 | } | ||
220 | |||
221 | /* If rx ring is still empty, set a timer to try allocating | ||
222 | * again at a later time. */ | ||
223 | if (priv->rx_desc_count == 0 && netif_running(dev)) { | ||
224 | dev_warn(&priv->pdev->dev, "unable to refill rx ring\n"); | ||
225 | priv->rx_timeout.expires = jiffies + HZ; | ||
226 | add_timer(&priv->rx_timeout); | ||
227 | } | ||
228 | |||
229 | return 0; | ||
230 | } | ||
231 | |||
232 | /* | ||
233 | * timer callback to defer refill rx queue in case we're OOM | ||
234 | */ | ||
235 | static void bcm_enet_refill_rx_timer(unsigned long data) | ||
236 | { | ||
237 | struct net_device *dev; | ||
238 | struct bcm_enet_priv *priv; | ||
239 | |||
240 | dev = (struct net_device *)data; | ||
241 | priv = netdev_priv(dev); | ||
242 | |||
243 | spin_lock(&priv->rx_lock); | ||
244 | bcm_enet_refill_rx((struct net_device *)data); | ||
245 | spin_unlock(&priv->rx_lock); | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * extract packet from rx queue | ||
250 | */ | ||
251 | static int bcm_enet_receive_queue(struct net_device *dev, int budget) | ||
252 | { | ||
253 | struct bcm_enet_priv *priv; | ||
254 | struct device *kdev; | ||
255 | int processed; | ||
256 | |||
257 | priv = netdev_priv(dev); | ||
258 | kdev = &priv->pdev->dev; | ||
259 | processed = 0; | ||
260 | |||
261 | /* don't scan ring further than number of refilled | ||
262 | * descriptor */ | ||
263 | if (budget > priv->rx_desc_count) | ||
264 | budget = priv->rx_desc_count; | ||
265 | |||
266 | do { | ||
267 | struct bcm_enet_desc *desc; | ||
268 | struct sk_buff *skb; | ||
269 | int desc_idx; | ||
270 | u32 len_stat; | ||
271 | unsigned int len; | ||
272 | |||
273 | desc_idx = priv->rx_curr_desc; | ||
274 | desc = &priv->rx_desc_cpu[desc_idx]; | ||
275 | |||
276 | /* make sure we actually read the descriptor status at | ||
277 | * each loop */ | ||
278 | rmb(); | ||
279 | |||
280 | len_stat = desc->len_stat; | ||
281 | |||
282 | /* break if dma ownership belongs to hw */ | ||
283 | if (len_stat & DMADESC_OWNER_MASK) | ||
284 | break; | ||
285 | |||
286 | processed++; | ||
287 | priv->rx_curr_desc++; | ||
288 | if (priv->rx_curr_desc == priv->rx_ring_size) | ||
289 | priv->rx_curr_desc = 0; | ||
290 | priv->rx_desc_count--; | ||
291 | |||
292 | /* if the packet does not have start of packet _and_ | ||
293 | * end of packet flag set, then just recycle it */ | ||
294 | if ((len_stat & DMADESC_ESOP_MASK) != DMADESC_ESOP_MASK) { | ||
295 | priv->stats.rx_dropped++; | ||
296 | continue; | ||
297 | } | ||
298 | |||
299 | /* recycle packet if it's marked as bad */ | ||
300 | if (unlikely(len_stat & DMADESC_ERR_MASK)) { | ||
301 | priv->stats.rx_errors++; | ||
302 | |||
303 | if (len_stat & DMADESC_OVSIZE_MASK) | ||
304 | priv->stats.rx_length_errors++; | ||
305 | if (len_stat & DMADESC_CRC_MASK) | ||
306 | priv->stats.rx_crc_errors++; | ||
307 | if (len_stat & DMADESC_UNDER_MASK) | ||
308 | priv->stats.rx_frame_errors++; | ||
309 | if (len_stat & DMADESC_OV_MASK) | ||
310 | priv->stats.rx_fifo_errors++; | ||
311 | continue; | ||
312 | } | ||
313 | |||
314 | /* valid packet */ | ||
315 | skb = priv->rx_skb[desc_idx]; | ||
316 | len = (len_stat & DMADESC_LENGTH_MASK) >> DMADESC_LENGTH_SHIFT; | ||
317 | /* don't include FCS */ | ||
318 | len -= 4; | ||
319 | |||
320 | if (len < copybreak) { | ||
321 | struct sk_buff *nskb; | ||
322 | |||
323 | nskb = netdev_alloc_skb(dev, len + NET_IP_ALIGN); | ||
324 | if (!nskb) { | ||
325 | /* forget packet, just rearm desc */ | ||
326 | priv->stats.rx_dropped++; | ||
327 | continue; | ||
328 | } | ||
329 | |||
330 | /* since we're copying the data, we can align | ||
331 | * them properly */ | ||
332 | skb_reserve(nskb, NET_IP_ALIGN); | ||
333 | dma_sync_single_for_cpu(kdev, desc->address, | ||
334 | len, DMA_FROM_DEVICE); | ||
335 | memcpy(nskb->data, skb->data, len); | ||
336 | dma_sync_single_for_device(kdev, desc->address, | ||
337 | len, DMA_FROM_DEVICE); | ||
338 | skb = nskb; | ||
339 | } else { | ||
340 | dma_unmap_single(&priv->pdev->dev, desc->address, | ||
341 | priv->rx_skb_size, DMA_FROM_DEVICE); | ||
342 | priv->rx_skb[desc_idx] = NULL; | ||
343 | } | ||
344 | |||
345 | skb_put(skb, len); | ||
346 | skb->dev = dev; | ||
347 | skb->protocol = eth_type_trans(skb, dev); | ||
348 | priv->stats.rx_packets++; | ||
349 | priv->stats.rx_bytes += len; | ||
350 | dev->last_rx = jiffies; | ||
351 | netif_receive_skb(skb); | ||
352 | |||
353 | } while (--budget > 0); | ||
354 | |||
355 | if (processed || !priv->rx_desc_count) { | ||
356 | bcm_enet_refill_rx(dev); | ||
357 | |||
358 | /* kick rx dma */ | ||
359 | enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, | ||
360 | ENETDMA_CHANCFG_REG(priv->rx_chan)); | ||
361 | } | ||
362 | |||
363 | return processed; | ||
364 | } | ||
365 | |||
366 | |||
367 | /* | ||
368 | * try to or force reclaim of transmitted buffers | ||
369 | */ | ||
370 | static int bcm_enet_tx_reclaim(struct net_device *dev, int force) | ||
371 | { | ||
372 | struct bcm_enet_priv *priv; | ||
373 | int released; | ||
374 | |||
375 | priv = netdev_priv(dev); | ||
376 | released = 0; | ||
377 | |||
378 | while (priv->tx_desc_count < priv->tx_ring_size) { | ||
379 | struct bcm_enet_desc *desc; | ||
380 | struct sk_buff *skb; | ||
381 | |||
382 | /* We run in a bh and fight against start_xmit, which | ||
383 | * is called with bh disabled */ | ||
384 | spin_lock(&priv->tx_lock); | ||
385 | |||
386 | desc = &priv->tx_desc_cpu[priv->tx_dirty_desc]; | ||
387 | |||
388 | if (!force && (desc->len_stat & DMADESC_OWNER_MASK)) { | ||
389 | spin_unlock(&priv->tx_lock); | ||
390 | break; | ||
391 | } | ||
392 | |||
393 | /* ensure other field of the descriptor were not read | ||
394 | * before we checked ownership */ | ||
395 | rmb(); | ||
396 | |||
397 | skb = priv->tx_skb[priv->tx_dirty_desc]; | ||
398 | priv->tx_skb[priv->tx_dirty_desc] = NULL; | ||
399 | dma_unmap_single(&priv->pdev->dev, desc->address, skb->len, | ||
400 | DMA_TO_DEVICE); | ||
401 | |||
402 | priv->tx_dirty_desc++; | ||
403 | if (priv->tx_dirty_desc == priv->tx_ring_size) | ||
404 | priv->tx_dirty_desc = 0; | ||
405 | priv->tx_desc_count++; | ||
406 | |||
407 | spin_unlock(&priv->tx_lock); | ||
408 | |||
409 | if (desc->len_stat & DMADESC_UNDER_MASK) | ||
410 | priv->stats.tx_errors++; | ||
411 | |||
412 | dev_kfree_skb(skb); | ||
413 | released++; | ||
414 | } | ||
415 | |||
416 | if (netif_queue_stopped(dev) && released) | ||
417 | netif_wake_queue(dev); | ||
418 | |||
419 | return released; | ||
420 | } | ||
421 | |||
422 | /* | ||
423 | * poll func, called by network core | ||
424 | */ | ||
425 | static int bcm_enet_poll(struct napi_struct *napi, int budget) | ||
426 | { | ||
427 | struct bcm_enet_priv *priv; | ||
428 | struct net_device *dev; | ||
429 | int tx_work_done, rx_work_done; | ||
430 | |||
431 | priv = container_of(napi, struct bcm_enet_priv, napi); | ||
432 | dev = priv->net_dev; | ||
433 | |||
434 | /* ack interrupts */ | ||
435 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
436 | ENETDMA_IR_REG(priv->rx_chan)); | ||
437 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
438 | ENETDMA_IR_REG(priv->tx_chan)); | ||
439 | |||
440 | /* reclaim sent skb */ | ||
441 | tx_work_done = bcm_enet_tx_reclaim(dev, 0); | ||
442 | |||
443 | spin_lock(&priv->rx_lock); | ||
444 | rx_work_done = bcm_enet_receive_queue(dev, budget); | ||
445 | spin_unlock(&priv->rx_lock); | ||
446 | |||
447 | if (rx_work_done >= budget || tx_work_done > 0) { | ||
448 | /* rx/tx queue is not yet empty/clean */ | ||
449 | return rx_work_done; | ||
450 | } | ||
451 | |||
452 | /* no more packet in rx/tx queue, remove device from poll | ||
453 | * queue */ | ||
454 | napi_complete(napi); | ||
455 | |||
456 | /* restore rx/tx interrupt */ | ||
457 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
458 | ENETDMA_IRMASK_REG(priv->rx_chan)); | ||
459 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
460 | ENETDMA_IRMASK_REG(priv->tx_chan)); | ||
461 | |||
462 | return rx_work_done; | ||
463 | } | ||
464 | |||
465 | /* | ||
466 | * mac interrupt handler | ||
467 | */ | ||
468 | static irqreturn_t bcm_enet_isr_mac(int irq, void *dev_id) | ||
469 | { | ||
470 | struct net_device *dev; | ||
471 | struct bcm_enet_priv *priv; | ||
472 | u32 stat; | ||
473 | |||
474 | dev = dev_id; | ||
475 | priv = netdev_priv(dev); | ||
476 | |||
477 | stat = enet_readl(priv, ENET_IR_REG); | ||
478 | if (!(stat & ENET_IR_MIB)) | ||
479 | return IRQ_NONE; | ||
480 | |||
481 | /* clear & mask interrupt */ | ||
482 | enet_writel(priv, ENET_IR_MIB, ENET_IR_REG); | ||
483 | enet_writel(priv, 0, ENET_IRMASK_REG); | ||
484 | |||
485 | /* read mib registers in workqueue */ | ||
486 | schedule_work(&priv->mib_update_task); | ||
487 | |||
488 | return IRQ_HANDLED; | ||
489 | } | ||
490 | |||
491 | /* | ||
492 | * rx/tx dma interrupt handler | ||
493 | */ | ||
494 | static irqreturn_t bcm_enet_isr_dma(int irq, void *dev_id) | ||
495 | { | ||
496 | struct net_device *dev; | ||
497 | struct bcm_enet_priv *priv; | ||
498 | |||
499 | dev = dev_id; | ||
500 | priv = netdev_priv(dev); | ||
501 | |||
502 | /* mask rx/tx interrupts */ | ||
503 | enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); | ||
504 | enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); | ||
505 | |||
506 | napi_schedule(&priv->napi); | ||
507 | |||
508 | return IRQ_HANDLED; | ||
509 | } | ||
510 | |||
511 | /* | ||
512 | * tx request callback | ||
513 | */ | ||
514 | static int bcm_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
515 | { | ||
516 | struct bcm_enet_priv *priv; | ||
517 | struct bcm_enet_desc *desc; | ||
518 | u32 len_stat; | ||
519 | int ret; | ||
520 | |||
521 | priv = netdev_priv(dev); | ||
522 | |||
523 | /* lock against tx reclaim */ | ||
524 | spin_lock(&priv->tx_lock); | ||
525 | |||
526 | /* make sure the tx hw queue is not full, should not happen | ||
527 | * since we stop queue before it's the case */ | ||
528 | if (unlikely(!priv->tx_desc_count)) { | ||
529 | netif_stop_queue(dev); | ||
530 | dev_err(&priv->pdev->dev, "xmit called with no tx desc " | ||
531 | "available?\n"); | ||
532 | ret = NETDEV_TX_BUSY; | ||
533 | goto out_unlock; | ||
534 | } | ||
535 | |||
536 | /* point to the next available desc */ | ||
537 | desc = &priv->tx_desc_cpu[priv->tx_curr_desc]; | ||
538 | priv->tx_skb[priv->tx_curr_desc] = skb; | ||
539 | |||
540 | /* fill descriptor */ | ||
541 | desc->address = dma_map_single(&priv->pdev->dev, skb->data, skb->len, | ||
542 | DMA_TO_DEVICE); | ||
543 | |||
544 | len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK; | ||
545 | len_stat |= DMADESC_ESOP_MASK | | ||
546 | DMADESC_APPEND_CRC | | ||
547 | DMADESC_OWNER_MASK; | ||
548 | |||
549 | priv->tx_curr_desc++; | ||
550 | if (priv->tx_curr_desc == priv->tx_ring_size) { | ||
551 | priv->tx_curr_desc = 0; | ||
552 | len_stat |= DMADESC_WRAP_MASK; | ||
553 | } | ||
554 | priv->tx_desc_count--; | ||
555 | |||
556 | /* dma might be already polling, make sure we update desc | ||
557 | * fields in correct order */ | ||
558 | wmb(); | ||
559 | desc->len_stat = len_stat; | ||
560 | wmb(); | ||
561 | |||
562 | /* kick tx dma */ | ||
563 | enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, | ||
564 | ENETDMA_CHANCFG_REG(priv->tx_chan)); | ||
565 | |||
566 | /* stop queue if no more desc available */ | ||
567 | if (!priv->tx_desc_count) | ||
568 | netif_stop_queue(dev); | ||
569 | |||
570 | priv->stats.tx_bytes += skb->len; | ||
571 | priv->stats.tx_packets++; | ||
572 | dev->trans_start = jiffies; | ||
573 | ret = NETDEV_TX_OK; | ||
574 | |||
575 | out_unlock: | ||
576 | spin_unlock(&priv->tx_lock); | ||
577 | return ret; | ||
578 | } | ||
579 | |||
580 | /* | ||
581 | * Change the interface's mac address. | ||
582 | */ | ||
583 | static int bcm_enet_set_mac_address(struct net_device *dev, void *p) | ||
584 | { | ||
585 | struct bcm_enet_priv *priv; | ||
586 | struct sockaddr *addr = p; | ||
587 | u32 val; | ||
588 | |||
589 | priv = netdev_priv(dev); | ||
590 | memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); | ||
591 | |||
592 | /* use perfect match register 0 to store my mac address */ | ||
593 | val = (dev->dev_addr[2] << 24) | (dev->dev_addr[3] << 16) | | ||
594 | (dev->dev_addr[4] << 8) | dev->dev_addr[5]; | ||
595 | enet_writel(priv, val, ENET_PML_REG(0)); | ||
596 | |||
597 | val = (dev->dev_addr[0] << 8 | dev->dev_addr[1]); | ||
598 | val |= ENET_PMH_DATAVALID_MASK; | ||
599 | enet_writel(priv, val, ENET_PMH_REG(0)); | ||
600 | |||
601 | return 0; | ||
602 | } | ||
603 | |||
604 | /* | ||
605 | * Change rx mode (promiscous/allmulti) and update multicast list | ||
606 | */ | ||
607 | static void bcm_enet_set_multicast_list(struct net_device *dev) | ||
608 | { | ||
609 | struct bcm_enet_priv *priv; | ||
610 | struct dev_mc_list *mc_list; | ||
611 | u32 val; | ||
612 | int i; | ||
613 | |||
614 | priv = netdev_priv(dev); | ||
615 | |||
616 | val = enet_readl(priv, ENET_RXCFG_REG); | ||
617 | |||
618 | if (dev->flags & IFF_PROMISC) | ||
619 | val |= ENET_RXCFG_PROMISC_MASK; | ||
620 | else | ||
621 | val &= ~ENET_RXCFG_PROMISC_MASK; | ||
622 | |||
623 | /* only 3 perfect match registers left, first one is used for | ||
624 | * own mac address */ | ||
625 | if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 3) | ||
626 | val |= ENET_RXCFG_ALLMCAST_MASK; | ||
627 | else | ||
628 | val &= ~ENET_RXCFG_ALLMCAST_MASK; | ||
629 | |||
630 | /* no need to set perfect match registers if we catch all | ||
631 | * multicast */ | ||
632 | if (val & ENET_RXCFG_ALLMCAST_MASK) { | ||
633 | enet_writel(priv, val, ENET_RXCFG_REG); | ||
634 | return; | ||
635 | } | ||
636 | |||
637 | for (i = 0, mc_list = dev->mc_list; | ||
638 | (mc_list != NULL) && (i < dev->mc_count) && (i < 3); | ||
639 | i++, mc_list = mc_list->next) { | ||
640 | u8 *dmi_addr; | ||
641 | u32 tmp; | ||
642 | |||
643 | /* filter non ethernet address */ | ||
644 | if (mc_list->dmi_addrlen != 6) | ||
645 | continue; | ||
646 | |||
647 | /* update perfect match registers */ | ||
648 | dmi_addr = mc_list->dmi_addr; | ||
649 | tmp = (dmi_addr[2] << 24) | (dmi_addr[3] << 16) | | ||
650 | (dmi_addr[4] << 8) | dmi_addr[5]; | ||
651 | enet_writel(priv, tmp, ENET_PML_REG(i + 1)); | ||
652 | |||
653 | tmp = (dmi_addr[0] << 8 | dmi_addr[1]); | ||
654 | tmp |= ENET_PMH_DATAVALID_MASK; | ||
655 | enet_writel(priv, tmp, ENET_PMH_REG(i + 1)); | ||
656 | } | ||
657 | |||
658 | for (; i < 3; i++) { | ||
659 | enet_writel(priv, 0, ENET_PML_REG(i + 1)); | ||
660 | enet_writel(priv, 0, ENET_PMH_REG(i + 1)); | ||
661 | } | ||
662 | |||
663 | enet_writel(priv, val, ENET_RXCFG_REG); | ||
664 | } | ||
665 | |||
666 | /* | ||
667 | * set mac duplex parameters | ||
668 | */ | ||
669 | static void bcm_enet_set_duplex(struct bcm_enet_priv *priv, int fullduplex) | ||
670 | { | ||
671 | u32 val; | ||
672 | |||
673 | val = enet_readl(priv, ENET_TXCTL_REG); | ||
674 | if (fullduplex) | ||
675 | val |= ENET_TXCTL_FD_MASK; | ||
676 | else | ||
677 | val &= ~ENET_TXCTL_FD_MASK; | ||
678 | enet_writel(priv, val, ENET_TXCTL_REG); | ||
679 | } | ||
680 | |||
681 | /* | ||
682 | * set mac flow control parameters | ||
683 | */ | ||
684 | static void bcm_enet_set_flow(struct bcm_enet_priv *priv, int rx_en, int tx_en) | ||
685 | { | ||
686 | u32 val; | ||
687 | |||
688 | /* rx flow control (pause frame handling) */ | ||
689 | val = enet_readl(priv, ENET_RXCFG_REG); | ||
690 | if (rx_en) | ||
691 | val |= ENET_RXCFG_ENFLOW_MASK; | ||
692 | else | ||
693 | val &= ~ENET_RXCFG_ENFLOW_MASK; | ||
694 | enet_writel(priv, val, ENET_RXCFG_REG); | ||
695 | |||
696 | /* tx flow control (pause frame generation) */ | ||
697 | val = enet_dma_readl(priv, ENETDMA_CFG_REG); | ||
698 | if (tx_en) | ||
699 | val |= ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan); | ||
700 | else | ||
701 | val &= ~ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan); | ||
702 | enet_dma_writel(priv, val, ENETDMA_CFG_REG); | ||
703 | } | ||
704 | |||
705 | /* | ||
706 | * link changed callback (from phylib) | ||
707 | */ | ||
708 | static void bcm_enet_adjust_phy_link(struct net_device *dev) | ||
709 | { | ||
710 | struct bcm_enet_priv *priv; | ||
711 | struct phy_device *phydev; | ||
712 | int status_changed; | ||
713 | |||
714 | priv = netdev_priv(dev); | ||
715 | phydev = priv->phydev; | ||
716 | status_changed = 0; | ||
717 | |||
718 | if (priv->old_link != phydev->link) { | ||
719 | status_changed = 1; | ||
720 | priv->old_link = phydev->link; | ||
721 | } | ||
722 | |||
723 | /* reflect duplex change in mac configuration */ | ||
724 | if (phydev->link && phydev->duplex != priv->old_duplex) { | ||
725 | bcm_enet_set_duplex(priv, | ||
726 | (phydev->duplex == DUPLEX_FULL) ? 1 : 0); | ||
727 | status_changed = 1; | ||
728 | priv->old_duplex = phydev->duplex; | ||
729 | } | ||
730 | |||
731 | /* enable flow control if remote advertise it (trust phylib to | ||
732 | * check that duplex is full */ | ||
733 | if (phydev->link && phydev->pause != priv->old_pause) { | ||
734 | int rx_pause_en, tx_pause_en; | ||
735 | |||
736 | if (phydev->pause) { | ||
737 | /* pause was advertised by lpa and us */ | ||
738 | rx_pause_en = 1; | ||
739 | tx_pause_en = 1; | ||
740 | } else if (!priv->pause_auto) { | ||
741 | /* pause setting overrided by user */ | ||
742 | rx_pause_en = priv->pause_rx; | ||
743 | tx_pause_en = priv->pause_tx; | ||
744 | } else { | ||
745 | rx_pause_en = 0; | ||
746 | tx_pause_en = 0; | ||
747 | } | ||
748 | |||
749 | bcm_enet_set_flow(priv, rx_pause_en, tx_pause_en); | ||
750 | status_changed = 1; | ||
751 | priv->old_pause = phydev->pause; | ||
752 | } | ||
753 | |||
754 | if (status_changed) { | ||
755 | pr_info("%s: link %s", dev->name, phydev->link ? | ||
756 | "UP" : "DOWN"); | ||
757 | if (phydev->link) | ||
758 | pr_cont(" - %d/%s - flow control %s", phydev->speed, | ||
759 | DUPLEX_FULL == phydev->duplex ? "full" : "half", | ||
760 | phydev->pause == 1 ? "rx&tx" : "off"); | ||
761 | |||
762 | pr_cont("\n"); | ||
763 | } | ||
764 | } | ||
765 | |||
766 | /* | ||
767 | * link changed callback (if phylib is not used) | ||
768 | */ | ||
769 | static void bcm_enet_adjust_link(struct net_device *dev) | ||
770 | { | ||
771 | struct bcm_enet_priv *priv; | ||
772 | |||
773 | priv = netdev_priv(dev); | ||
774 | bcm_enet_set_duplex(priv, priv->force_duplex_full); | ||
775 | bcm_enet_set_flow(priv, priv->pause_rx, priv->pause_tx); | ||
776 | netif_carrier_on(dev); | ||
777 | |||
778 | pr_info("%s: link forced UP - %d/%s - flow control %s/%s\n", | ||
779 | dev->name, | ||
780 | priv->force_speed_100 ? 100 : 10, | ||
781 | priv->force_duplex_full ? "full" : "half", | ||
782 | priv->pause_rx ? "rx" : "off", | ||
783 | priv->pause_tx ? "tx" : "off"); | ||
784 | } | ||
785 | |||
786 | /* | ||
787 | * open callback, allocate dma rings & buffers and start rx operation | ||
788 | */ | ||
789 | static int bcm_enet_open(struct net_device *dev) | ||
790 | { | ||
791 | struct bcm_enet_priv *priv; | ||
792 | struct sockaddr addr; | ||
793 | struct device *kdev; | ||
794 | struct phy_device *phydev; | ||
795 | int i, ret; | ||
796 | unsigned int size; | ||
797 | char phy_id[MII_BUS_ID_SIZE + 3]; | ||
798 | void *p; | ||
799 | u32 val; | ||
800 | |||
801 | priv = netdev_priv(dev); | ||
802 | kdev = &priv->pdev->dev; | ||
803 | |||
804 | if (priv->has_phy) { | ||
805 | /* connect to PHY */ | ||
806 | snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, | ||
807 | priv->mac_id ? "1" : "0", priv->phy_id); | ||
808 | |||
809 | phydev = phy_connect(dev, phy_id, &bcm_enet_adjust_phy_link, 0, | ||
810 | PHY_INTERFACE_MODE_MII); | ||
811 | |||
812 | if (IS_ERR(phydev)) { | ||
813 | dev_err(kdev, "could not attach to PHY\n"); | ||
814 | return PTR_ERR(phydev); | ||
815 | } | ||
816 | |||
817 | /* mask with MAC supported features */ | ||
818 | phydev->supported &= (SUPPORTED_10baseT_Half | | ||
819 | SUPPORTED_10baseT_Full | | ||
820 | SUPPORTED_100baseT_Half | | ||
821 | SUPPORTED_100baseT_Full | | ||
822 | SUPPORTED_Autoneg | | ||
823 | SUPPORTED_Pause | | ||
824 | SUPPORTED_MII); | ||
825 | phydev->advertising = phydev->supported; | ||
826 | |||
827 | if (priv->pause_auto && priv->pause_rx && priv->pause_tx) | ||
828 | phydev->advertising |= SUPPORTED_Pause; | ||
829 | else | ||
830 | phydev->advertising &= ~SUPPORTED_Pause; | ||
831 | |||
832 | dev_info(kdev, "attached PHY at address %d [%s]\n", | ||
833 | phydev->addr, phydev->drv->name); | ||
834 | |||
835 | priv->old_link = 0; | ||
836 | priv->old_duplex = -1; | ||
837 | priv->old_pause = -1; | ||
838 | priv->phydev = phydev; | ||
839 | } | ||
840 | |||
841 | /* mask all interrupts and request them */ | ||
842 | enet_writel(priv, 0, ENET_IRMASK_REG); | ||
843 | enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); | ||
844 | enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); | ||
845 | |||
846 | ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev); | ||
847 | if (ret) | ||
848 | goto out_phy_disconnect; | ||
849 | |||
850 | ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, | ||
851 | IRQF_SAMPLE_RANDOM | IRQF_DISABLED, dev->name, dev); | ||
852 | if (ret) | ||
853 | goto out_freeirq; | ||
854 | |||
855 | ret = request_irq(priv->irq_tx, bcm_enet_isr_dma, | ||
856 | IRQF_DISABLED, dev->name, dev); | ||
857 | if (ret) | ||
858 | goto out_freeirq_rx; | ||
859 | |||
860 | /* initialize perfect match registers */ | ||
861 | for (i = 0; i < 4; i++) { | ||
862 | enet_writel(priv, 0, ENET_PML_REG(i)); | ||
863 | enet_writel(priv, 0, ENET_PMH_REG(i)); | ||
864 | } | ||
865 | |||
866 | /* write device mac address */ | ||
867 | memcpy(addr.sa_data, dev->dev_addr, ETH_ALEN); | ||
868 | bcm_enet_set_mac_address(dev, &addr); | ||
869 | |||
870 | /* allocate rx dma ring */ | ||
871 | size = priv->rx_ring_size * sizeof(struct bcm_enet_desc); | ||
872 | p = dma_alloc_coherent(kdev, size, &priv->rx_desc_dma, GFP_KERNEL); | ||
873 | if (!p) { | ||
874 | dev_err(kdev, "cannot allocate rx ring %u\n", size); | ||
875 | ret = -ENOMEM; | ||
876 | goto out_freeirq_tx; | ||
877 | } | ||
878 | |||
879 | memset(p, 0, size); | ||
880 | priv->rx_desc_alloc_size = size; | ||
881 | priv->rx_desc_cpu = p; | ||
882 | |||
883 | /* allocate tx dma ring */ | ||
884 | size = priv->tx_ring_size * sizeof(struct bcm_enet_desc); | ||
885 | p = dma_alloc_coherent(kdev, size, &priv->tx_desc_dma, GFP_KERNEL); | ||
886 | if (!p) { | ||
887 | dev_err(kdev, "cannot allocate tx ring\n"); | ||
888 | ret = -ENOMEM; | ||
889 | goto out_free_rx_ring; | ||
890 | } | ||
891 | |||
892 | memset(p, 0, size); | ||
893 | priv->tx_desc_alloc_size = size; | ||
894 | priv->tx_desc_cpu = p; | ||
895 | |||
896 | priv->tx_skb = kzalloc(sizeof(struct sk_buff *) * priv->tx_ring_size, | ||
897 | GFP_KERNEL); | ||
898 | if (!priv->tx_skb) { | ||
899 | dev_err(kdev, "cannot allocate rx skb queue\n"); | ||
900 | ret = -ENOMEM; | ||
901 | goto out_free_tx_ring; | ||
902 | } | ||
903 | |||
904 | priv->tx_desc_count = priv->tx_ring_size; | ||
905 | priv->tx_dirty_desc = 0; | ||
906 | priv->tx_curr_desc = 0; | ||
907 | spin_lock_init(&priv->tx_lock); | ||
908 | |||
909 | /* init & fill rx ring with skbs */ | ||
910 | priv->rx_skb = kzalloc(sizeof(struct sk_buff *) * priv->rx_ring_size, | ||
911 | GFP_KERNEL); | ||
912 | if (!priv->rx_skb) { | ||
913 | dev_err(kdev, "cannot allocate rx skb queue\n"); | ||
914 | ret = -ENOMEM; | ||
915 | goto out_free_tx_skb; | ||
916 | } | ||
917 | |||
918 | priv->rx_desc_count = 0; | ||
919 | priv->rx_dirty_desc = 0; | ||
920 | priv->rx_curr_desc = 0; | ||
921 | |||
922 | /* initialize flow control buffer allocation */ | ||
923 | enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, | ||
924 | ENETDMA_BUFALLOC_REG(priv->rx_chan)); | ||
925 | |||
926 | if (bcm_enet_refill_rx(dev)) { | ||
927 | dev_err(kdev, "cannot allocate rx skb queue\n"); | ||
928 | ret = -ENOMEM; | ||
929 | goto out; | ||
930 | } | ||
931 | |||
932 | /* write rx & tx ring addresses */ | ||
933 | enet_dma_writel(priv, priv->rx_desc_dma, | ||
934 | ENETDMA_RSTART_REG(priv->rx_chan)); | ||
935 | enet_dma_writel(priv, priv->tx_desc_dma, | ||
936 | ENETDMA_RSTART_REG(priv->tx_chan)); | ||
937 | |||
938 | /* clear remaining state ram for rx & tx channel */ | ||
939 | enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan)); | ||
940 | enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan)); | ||
941 | enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan)); | ||
942 | enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan)); | ||
943 | enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan)); | ||
944 | enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan)); | ||
945 | |||
946 | /* set max rx/tx length */ | ||
947 | enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG); | ||
948 | enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG); | ||
949 | |||
950 | /* set dma maximum burst len */ | ||
951 | enet_dma_writel(priv, BCMENET_DMA_MAXBURST, | ||
952 | ENETDMA_MAXBURST_REG(priv->rx_chan)); | ||
953 | enet_dma_writel(priv, BCMENET_DMA_MAXBURST, | ||
954 | ENETDMA_MAXBURST_REG(priv->tx_chan)); | ||
955 | |||
956 | /* set correct transmit fifo watermark */ | ||
957 | enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG); | ||
958 | |||
959 | /* set flow control low/high threshold to 1/3 / 2/3 */ | ||
960 | val = priv->rx_ring_size / 3; | ||
961 | enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan)); | ||
962 | val = (priv->rx_ring_size * 2) / 3; | ||
963 | enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan)); | ||
964 | |||
965 | /* all set, enable mac and interrupts, start dma engine and | ||
966 | * kick rx dma channel */ | ||
967 | wmb(); | ||
968 | enet_writel(priv, ENET_CTL_ENABLE_MASK, ENET_CTL_REG); | ||
969 | enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); | ||
970 | enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, | ||
971 | ENETDMA_CHANCFG_REG(priv->rx_chan)); | ||
972 | |||
973 | /* watch "mib counters about to overflow" interrupt */ | ||
974 | enet_writel(priv, ENET_IR_MIB, ENET_IR_REG); | ||
975 | enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG); | ||
976 | |||
977 | /* watch "packet transferred" interrupt in rx and tx */ | ||
978 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
979 | ENETDMA_IR_REG(priv->rx_chan)); | ||
980 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
981 | ENETDMA_IR_REG(priv->tx_chan)); | ||
982 | |||
983 | /* make sure we enable napi before rx interrupt */ | ||
984 | napi_enable(&priv->napi); | ||
985 | |||
986 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
987 | ENETDMA_IRMASK_REG(priv->rx_chan)); | ||
988 | enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, | ||
989 | ENETDMA_IRMASK_REG(priv->tx_chan)); | ||
990 | |||
991 | if (priv->has_phy) | ||
992 | phy_start(priv->phydev); | ||
993 | else | ||
994 | bcm_enet_adjust_link(dev); | ||
995 | |||
996 | netif_start_queue(dev); | ||
997 | return 0; | ||
998 | |||
999 | out: | ||
1000 | for (i = 0; i < priv->rx_ring_size; i++) { | ||
1001 | struct bcm_enet_desc *desc; | ||
1002 | |||
1003 | if (!priv->rx_skb[i]) | ||
1004 | continue; | ||
1005 | |||
1006 | desc = &priv->rx_desc_cpu[i]; | ||
1007 | dma_unmap_single(kdev, desc->address, priv->rx_skb_size, | ||
1008 | DMA_FROM_DEVICE); | ||
1009 | kfree_skb(priv->rx_skb[i]); | ||
1010 | } | ||
1011 | kfree(priv->rx_skb); | ||
1012 | |||
1013 | out_free_tx_skb: | ||
1014 | kfree(priv->tx_skb); | ||
1015 | |||
1016 | out_free_tx_ring: | ||
1017 | dma_free_coherent(kdev, priv->tx_desc_alloc_size, | ||
1018 | priv->tx_desc_cpu, priv->tx_desc_dma); | ||
1019 | |||
1020 | out_free_rx_ring: | ||
1021 | dma_free_coherent(kdev, priv->rx_desc_alloc_size, | ||
1022 | priv->rx_desc_cpu, priv->rx_desc_dma); | ||
1023 | |||
1024 | out_freeirq_tx: | ||
1025 | free_irq(priv->irq_tx, dev); | ||
1026 | |||
1027 | out_freeirq_rx: | ||
1028 | free_irq(priv->irq_rx, dev); | ||
1029 | |||
1030 | out_freeirq: | ||
1031 | free_irq(dev->irq, dev); | ||
1032 | |||
1033 | out_phy_disconnect: | ||
1034 | phy_disconnect(priv->phydev); | ||
1035 | |||
1036 | return ret; | ||
1037 | } | ||
1038 | |||
1039 | /* | ||
1040 | * disable mac | ||
1041 | */ | ||
1042 | static void bcm_enet_disable_mac(struct bcm_enet_priv *priv) | ||
1043 | { | ||
1044 | int limit; | ||
1045 | u32 val; | ||
1046 | |||
1047 | val = enet_readl(priv, ENET_CTL_REG); | ||
1048 | val |= ENET_CTL_DISABLE_MASK; | ||
1049 | enet_writel(priv, val, ENET_CTL_REG); | ||
1050 | |||
1051 | limit = 1000; | ||
1052 | do { | ||
1053 | u32 val; | ||
1054 | |||
1055 | val = enet_readl(priv, ENET_CTL_REG); | ||
1056 | if (!(val & ENET_CTL_DISABLE_MASK)) | ||
1057 | break; | ||
1058 | udelay(1); | ||
1059 | } while (limit--); | ||
1060 | } | ||
1061 | |||
1062 | /* | ||
1063 | * disable dma in given channel | ||
1064 | */ | ||
1065 | static void bcm_enet_disable_dma(struct bcm_enet_priv *priv, int chan) | ||
1066 | { | ||
1067 | int limit; | ||
1068 | |||
1069 | enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan)); | ||
1070 | |||
1071 | limit = 1000; | ||
1072 | do { | ||
1073 | u32 val; | ||
1074 | |||
1075 | val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan)); | ||
1076 | if (!(val & ENETDMA_CHANCFG_EN_MASK)) | ||
1077 | break; | ||
1078 | udelay(1); | ||
1079 | } while (limit--); | ||
1080 | } | ||
1081 | |||
1082 | /* | ||
1083 | * stop callback | ||
1084 | */ | ||
1085 | static int bcm_enet_stop(struct net_device *dev) | ||
1086 | { | ||
1087 | struct bcm_enet_priv *priv; | ||
1088 | struct device *kdev; | ||
1089 | int i; | ||
1090 | |||
1091 | priv = netdev_priv(dev); | ||
1092 | kdev = &priv->pdev->dev; | ||
1093 | |||
1094 | netif_stop_queue(dev); | ||
1095 | napi_disable(&priv->napi); | ||
1096 | if (priv->has_phy) | ||
1097 | phy_stop(priv->phydev); | ||
1098 | del_timer_sync(&priv->rx_timeout); | ||
1099 | |||
1100 | /* mask all interrupts */ | ||
1101 | enet_writel(priv, 0, ENET_IRMASK_REG); | ||
1102 | enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); | ||
1103 | enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); | ||
1104 | |||
1105 | /* make sure no mib update is scheduled */ | ||
1106 | flush_scheduled_work(); | ||
1107 | |||
1108 | /* disable dma & mac */ | ||
1109 | bcm_enet_disable_dma(priv, priv->tx_chan); | ||
1110 | bcm_enet_disable_dma(priv, priv->rx_chan); | ||
1111 | bcm_enet_disable_mac(priv); | ||
1112 | |||
1113 | /* force reclaim of all tx buffers */ | ||
1114 | bcm_enet_tx_reclaim(dev, 1); | ||
1115 | |||
1116 | /* free the rx skb ring */ | ||
1117 | for (i = 0; i < priv->rx_ring_size; i++) { | ||
1118 | struct bcm_enet_desc *desc; | ||
1119 | |||
1120 | if (!priv->rx_skb[i]) | ||
1121 | continue; | ||
1122 | |||
1123 | desc = &priv->rx_desc_cpu[i]; | ||
1124 | dma_unmap_single(kdev, desc->address, priv->rx_skb_size, | ||
1125 | DMA_FROM_DEVICE); | ||
1126 | kfree_skb(priv->rx_skb[i]); | ||
1127 | } | ||
1128 | |||
1129 | /* free remaining allocated memory */ | ||
1130 | kfree(priv->rx_skb); | ||
1131 | kfree(priv->tx_skb); | ||
1132 | dma_free_coherent(kdev, priv->rx_desc_alloc_size, | ||
1133 | priv->rx_desc_cpu, priv->rx_desc_dma); | ||
1134 | dma_free_coherent(kdev, priv->tx_desc_alloc_size, | ||
1135 | priv->tx_desc_cpu, priv->tx_desc_dma); | ||
1136 | free_irq(priv->irq_tx, dev); | ||
1137 | free_irq(priv->irq_rx, dev); | ||
1138 | free_irq(dev->irq, dev); | ||
1139 | |||
1140 | /* release phy */ | ||
1141 | if (priv->has_phy) { | ||
1142 | phy_disconnect(priv->phydev); | ||
1143 | priv->phydev = NULL; | ||
1144 | } | ||
1145 | |||
1146 | return 0; | ||
1147 | } | ||
1148 | |||
1149 | /* | ||
1150 | * core request to return device rx/tx stats | ||
1151 | */ | ||
1152 | static struct net_device_stats *bcm_enet_get_stats(struct net_device *dev) | ||
1153 | { | ||
1154 | struct bcm_enet_priv *priv; | ||
1155 | |||
1156 | priv = netdev_priv(dev); | ||
1157 | return &priv->stats; | ||
1158 | } | ||
1159 | |||
1160 | /* | ||
1161 | * ethtool callbacks | ||
1162 | */ | ||
1163 | struct bcm_enet_stats { | ||
1164 | char stat_string[ETH_GSTRING_LEN]; | ||
1165 | int sizeof_stat; | ||
1166 | int stat_offset; | ||
1167 | int mib_reg; | ||
1168 | }; | ||
1169 | |||
1170 | #define GEN_STAT(m) sizeof(((struct bcm_enet_priv *)0)->m), \ | ||
1171 | offsetof(struct bcm_enet_priv, m) | ||
1172 | |||
1173 | static const struct bcm_enet_stats bcm_enet_gstrings_stats[] = { | ||
1174 | { "rx_packets", GEN_STAT(stats.rx_packets), -1 }, | ||
1175 | { "tx_packets", GEN_STAT(stats.tx_packets), -1 }, | ||
1176 | { "rx_bytes", GEN_STAT(stats.rx_bytes), -1 }, | ||
1177 | { "tx_bytes", GEN_STAT(stats.tx_bytes), -1 }, | ||
1178 | { "rx_errors", GEN_STAT(stats.rx_errors), -1 }, | ||
1179 | { "tx_errors", GEN_STAT(stats.tx_errors), -1 }, | ||
1180 | { "rx_dropped", GEN_STAT(stats.rx_dropped), -1 }, | ||
1181 | { "tx_dropped", GEN_STAT(stats.tx_dropped), -1 }, | ||
1182 | |||
1183 | { "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETH_MIB_RX_GD_OCTETS}, | ||
1184 | { "rx_good_pkts", GEN_STAT(mib.rx_gd_pkts), ETH_MIB_RX_GD_PKTS }, | ||
1185 | { "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETH_MIB_RX_BRDCAST }, | ||
1186 | { "rx_multicast", GEN_STAT(mib.rx_mult), ETH_MIB_RX_MULT }, | ||
1187 | { "rx_64_octets", GEN_STAT(mib.rx_64), ETH_MIB_RX_64 }, | ||
1188 | { "rx_65_127_oct", GEN_STAT(mib.rx_65_127), ETH_MIB_RX_65_127 }, | ||
1189 | { "rx_128_255_oct", GEN_STAT(mib.rx_128_255), ETH_MIB_RX_128_255 }, | ||
1190 | { "rx_256_511_oct", GEN_STAT(mib.rx_256_511), ETH_MIB_RX_256_511 }, | ||
1191 | { "rx_512_1023_oct", GEN_STAT(mib.rx_512_1023), ETH_MIB_RX_512_1023 }, | ||
1192 | { "rx_1024_max_oct", GEN_STAT(mib.rx_1024_max), ETH_MIB_RX_1024_MAX }, | ||
1193 | { "rx_jabber", GEN_STAT(mib.rx_jab), ETH_MIB_RX_JAB }, | ||
1194 | { "rx_oversize", GEN_STAT(mib.rx_ovr), ETH_MIB_RX_OVR }, | ||
1195 | { "rx_fragment", GEN_STAT(mib.rx_frag), ETH_MIB_RX_FRAG }, | ||
1196 | { "rx_dropped", GEN_STAT(mib.rx_drop), ETH_MIB_RX_DROP }, | ||
1197 | { "rx_crc_align", GEN_STAT(mib.rx_crc_align), ETH_MIB_RX_CRC_ALIGN }, | ||
1198 | { "rx_undersize", GEN_STAT(mib.rx_und), ETH_MIB_RX_UND }, | ||
1199 | { "rx_crc", GEN_STAT(mib.rx_crc), ETH_MIB_RX_CRC }, | ||
1200 | { "rx_align", GEN_STAT(mib.rx_align), ETH_MIB_RX_ALIGN }, | ||
1201 | { "rx_symbol_error", GEN_STAT(mib.rx_sym), ETH_MIB_RX_SYM }, | ||
1202 | { "rx_pause", GEN_STAT(mib.rx_pause), ETH_MIB_RX_PAUSE }, | ||
1203 | { "rx_control", GEN_STAT(mib.rx_cntrl), ETH_MIB_RX_CNTRL }, | ||
1204 | |||
1205 | { "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETH_MIB_TX_GD_OCTETS }, | ||
1206 | { "tx_good_pkts", GEN_STAT(mib.tx_gd_pkts), ETH_MIB_TX_GD_PKTS }, | ||
1207 | { "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETH_MIB_TX_BRDCAST }, | ||
1208 | { "tx_multicast", GEN_STAT(mib.tx_mult), ETH_MIB_TX_MULT }, | ||
1209 | { "tx_64_oct", GEN_STAT(mib.tx_64), ETH_MIB_TX_64 }, | ||
1210 | { "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETH_MIB_TX_65_127 }, | ||
1211 | { "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETH_MIB_TX_128_255 }, | ||
1212 | { "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETH_MIB_TX_256_511 }, | ||
1213 | { "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETH_MIB_TX_512_1023}, | ||
1214 | { "tx_1024_max_oct", GEN_STAT(mib.tx_1024_max), ETH_MIB_TX_1024_MAX }, | ||
1215 | { "tx_jabber", GEN_STAT(mib.tx_jab), ETH_MIB_TX_JAB }, | ||
1216 | { "tx_oversize", GEN_STAT(mib.tx_ovr), ETH_MIB_TX_OVR }, | ||
1217 | { "tx_fragment", GEN_STAT(mib.tx_frag), ETH_MIB_TX_FRAG }, | ||
1218 | { "tx_underrun", GEN_STAT(mib.tx_underrun), ETH_MIB_TX_UNDERRUN }, | ||
1219 | { "tx_collisions", GEN_STAT(mib.tx_col), ETH_MIB_TX_COL }, | ||
1220 | { "tx_single_collision", GEN_STAT(mib.tx_1_col), ETH_MIB_TX_1_COL }, | ||
1221 | { "tx_multiple_collision", GEN_STAT(mib.tx_m_col), ETH_MIB_TX_M_COL }, | ||
1222 | { "tx_excess_collision", GEN_STAT(mib.tx_ex_col), ETH_MIB_TX_EX_COL }, | ||
1223 | { "tx_late_collision", GEN_STAT(mib.tx_late), ETH_MIB_TX_LATE }, | ||
1224 | { "tx_deferred", GEN_STAT(mib.tx_def), ETH_MIB_TX_DEF }, | ||
1225 | { "tx_carrier_sense", GEN_STAT(mib.tx_crs), ETH_MIB_TX_CRS }, | ||
1226 | { "tx_pause", GEN_STAT(mib.tx_pause), ETH_MIB_TX_PAUSE }, | ||
1227 | |||
1228 | }; | ||
1229 | |||
1230 | #define BCM_ENET_STATS_LEN \ | ||
1231 | (sizeof(bcm_enet_gstrings_stats) / sizeof(struct bcm_enet_stats)) | ||
1232 | |||
1233 | static const u32 unused_mib_regs[] = { | ||
1234 | ETH_MIB_TX_ALL_OCTETS, | ||
1235 | ETH_MIB_TX_ALL_PKTS, | ||
1236 | ETH_MIB_RX_ALL_OCTETS, | ||
1237 | ETH_MIB_RX_ALL_PKTS, | ||
1238 | }; | ||
1239 | |||
1240 | |||
1241 | static void bcm_enet_get_drvinfo(struct net_device *netdev, | ||
1242 | struct ethtool_drvinfo *drvinfo) | ||
1243 | { | ||
1244 | strncpy(drvinfo->driver, bcm_enet_driver_name, 32); | ||
1245 | strncpy(drvinfo->version, bcm_enet_driver_version, 32); | ||
1246 | strncpy(drvinfo->fw_version, "N/A", 32); | ||
1247 | strncpy(drvinfo->bus_info, "bcm63xx", 32); | ||
1248 | drvinfo->n_stats = BCM_ENET_STATS_LEN; | ||
1249 | } | ||
1250 | |||
1251 | static int bcm_enet_get_stats_count(struct net_device *netdev) | ||
1252 | { | ||
1253 | return BCM_ENET_STATS_LEN; | ||
1254 | } | ||
1255 | |||
1256 | static void bcm_enet_get_strings(struct net_device *netdev, | ||
1257 | u32 stringset, u8 *data) | ||
1258 | { | ||
1259 | int i; | ||
1260 | |||
1261 | switch (stringset) { | ||
1262 | case ETH_SS_STATS: | ||
1263 | for (i = 0; i < BCM_ENET_STATS_LEN; i++) { | ||
1264 | memcpy(data + i * ETH_GSTRING_LEN, | ||
1265 | bcm_enet_gstrings_stats[i].stat_string, | ||
1266 | ETH_GSTRING_LEN); | ||
1267 | } | ||
1268 | break; | ||
1269 | } | ||
1270 | } | ||
1271 | |||
1272 | static void update_mib_counters(struct bcm_enet_priv *priv) | ||
1273 | { | ||
1274 | int i; | ||
1275 | |||
1276 | for (i = 0; i < BCM_ENET_STATS_LEN; i++) { | ||
1277 | const struct bcm_enet_stats *s; | ||
1278 | u32 val; | ||
1279 | char *p; | ||
1280 | |||
1281 | s = &bcm_enet_gstrings_stats[i]; | ||
1282 | if (s->mib_reg == -1) | ||
1283 | continue; | ||
1284 | |||
1285 | val = enet_readl(priv, ENET_MIB_REG(s->mib_reg)); | ||
1286 | p = (char *)priv + s->stat_offset; | ||
1287 | |||
1288 | if (s->sizeof_stat == sizeof(u64)) | ||
1289 | *(u64 *)p += val; | ||
1290 | else | ||
1291 | *(u32 *)p += val; | ||
1292 | } | ||
1293 | |||
1294 | /* also empty unused mib counters to make sure mib counter | ||
1295 | * overflow interrupt is cleared */ | ||
1296 | for (i = 0; i < ARRAY_SIZE(unused_mib_regs); i++) | ||
1297 | (void)enet_readl(priv, ENET_MIB_REG(unused_mib_regs[i])); | ||
1298 | } | ||
1299 | |||
1300 | static void bcm_enet_update_mib_counters_defer(struct work_struct *t) | ||
1301 | { | ||
1302 | struct bcm_enet_priv *priv; | ||
1303 | |||
1304 | priv = container_of(t, struct bcm_enet_priv, mib_update_task); | ||
1305 | mutex_lock(&priv->mib_update_lock); | ||
1306 | update_mib_counters(priv); | ||
1307 | mutex_unlock(&priv->mib_update_lock); | ||
1308 | |||
1309 | /* reenable mib interrupt */ | ||
1310 | if (netif_running(priv->net_dev)) | ||
1311 | enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG); | ||
1312 | } | ||
1313 | |||
1314 | static void bcm_enet_get_ethtool_stats(struct net_device *netdev, | ||
1315 | struct ethtool_stats *stats, | ||
1316 | u64 *data) | ||
1317 | { | ||
1318 | struct bcm_enet_priv *priv; | ||
1319 | int i; | ||
1320 | |||
1321 | priv = netdev_priv(netdev); | ||
1322 | |||
1323 | mutex_lock(&priv->mib_update_lock); | ||
1324 | update_mib_counters(priv); | ||
1325 | |||
1326 | for (i = 0; i < BCM_ENET_STATS_LEN; i++) { | ||
1327 | const struct bcm_enet_stats *s; | ||
1328 | char *p; | ||
1329 | |||
1330 | s = &bcm_enet_gstrings_stats[i]; | ||
1331 | p = (char *)priv + s->stat_offset; | ||
1332 | data[i] = (s->sizeof_stat == sizeof(u64)) ? | ||
1333 | *(u64 *)p : *(u32 *)p; | ||
1334 | } | ||
1335 | mutex_unlock(&priv->mib_update_lock); | ||
1336 | } | ||
1337 | |||
1338 | static int bcm_enet_get_settings(struct net_device *dev, | ||
1339 | struct ethtool_cmd *cmd) | ||
1340 | { | ||
1341 | struct bcm_enet_priv *priv; | ||
1342 | |||
1343 | priv = netdev_priv(dev); | ||
1344 | |||
1345 | cmd->maxrxpkt = 0; | ||
1346 | cmd->maxtxpkt = 0; | ||
1347 | |||
1348 | if (priv->has_phy) { | ||
1349 | if (!priv->phydev) | ||
1350 | return -ENODEV; | ||
1351 | return phy_ethtool_gset(priv->phydev, cmd); | ||
1352 | } else { | ||
1353 | cmd->autoneg = 0; | ||
1354 | cmd->speed = (priv->force_speed_100) ? SPEED_100 : SPEED_10; | ||
1355 | cmd->duplex = (priv->force_duplex_full) ? | ||
1356 | DUPLEX_FULL : DUPLEX_HALF; | ||
1357 | cmd->supported = ADVERTISED_10baseT_Half | | ||
1358 | ADVERTISED_10baseT_Full | | ||
1359 | ADVERTISED_100baseT_Half | | ||
1360 | ADVERTISED_100baseT_Full; | ||
1361 | cmd->advertising = 0; | ||
1362 | cmd->port = PORT_MII; | ||
1363 | cmd->transceiver = XCVR_EXTERNAL; | ||
1364 | } | ||
1365 | return 0; | ||
1366 | } | ||
1367 | |||
1368 | static int bcm_enet_set_settings(struct net_device *dev, | ||
1369 | struct ethtool_cmd *cmd) | ||
1370 | { | ||
1371 | struct bcm_enet_priv *priv; | ||
1372 | |||
1373 | priv = netdev_priv(dev); | ||
1374 | if (priv->has_phy) { | ||
1375 | if (!priv->phydev) | ||
1376 | return -ENODEV; | ||
1377 | return phy_ethtool_sset(priv->phydev, cmd); | ||
1378 | } else { | ||
1379 | |||
1380 | if (cmd->autoneg || | ||
1381 | (cmd->speed != SPEED_100 && cmd->speed != SPEED_10) || | ||
1382 | cmd->port != PORT_MII) | ||
1383 | return -EINVAL; | ||
1384 | |||
1385 | priv->force_speed_100 = (cmd->speed == SPEED_100) ? 1 : 0; | ||
1386 | priv->force_duplex_full = (cmd->duplex == DUPLEX_FULL) ? 1 : 0; | ||
1387 | |||
1388 | if (netif_running(dev)) | ||
1389 | bcm_enet_adjust_link(dev); | ||
1390 | return 0; | ||
1391 | } | ||
1392 | } | ||
1393 | |||
1394 | static void bcm_enet_get_ringparam(struct net_device *dev, | ||
1395 | struct ethtool_ringparam *ering) | ||
1396 | { | ||
1397 | struct bcm_enet_priv *priv; | ||
1398 | |||
1399 | priv = netdev_priv(dev); | ||
1400 | |||
1401 | /* rx/tx ring is actually only limited by memory */ | ||
1402 | ering->rx_max_pending = 8192; | ||
1403 | ering->tx_max_pending = 8192; | ||
1404 | ering->rx_mini_max_pending = 0; | ||
1405 | ering->rx_jumbo_max_pending = 0; | ||
1406 | ering->rx_pending = priv->rx_ring_size; | ||
1407 | ering->tx_pending = priv->tx_ring_size; | ||
1408 | } | ||
1409 | |||
1410 | static int bcm_enet_set_ringparam(struct net_device *dev, | ||
1411 | struct ethtool_ringparam *ering) | ||
1412 | { | ||
1413 | struct bcm_enet_priv *priv; | ||
1414 | int was_running; | ||
1415 | |||
1416 | priv = netdev_priv(dev); | ||
1417 | |||
1418 | was_running = 0; | ||
1419 | if (netif_running(dev)) { | ||
1420 | bcm_enet_stop(dev); | ||
1421 | was_running = 1; | ||
1422 | } | ||
1423 | |||
1424 | priv->rx_ring_size = ering->rx_pending; | ||
1425 | priv->tx_ring_size = ering->tx_pending; | ||
1426 | |||
1427 | if (was_running) { | ||
1428 | int err; | ||
1429 | |||
1430 | err = bcm_enet_open(dev); | ||
1431 | if (err) | ||
1432 | dev_close(dev); | ||
1433 | else | ||
1434 | bcm_enet_set_multicast_list(dev); | ||
1435 | } | ||
1436 | return 0; | ||
1437 | } | ||
1438 | |||
1439 | static void bcm_enet_get_pauseparam(struct net_device *dev, | ||
1440 | struct ethtool_pauseparam *ecmd) | ||
1441 | { | ||
1442 | struct bcm_enet_priv *priv; | ||
1443 | |||
1444 | priv = netdev_priv(dev); | ||
1445 | ecmd->autoneg = priv->pause_auto; | ||
1446 | ecmd->rx_pause = priv->pause_rx; | ||
1447 | ecmd->tx_pause = priv->pause_tx; | ||
1448 | } | ||
1449 | |||
1450 | static int bcm_enet_set_pauseparam(struct net_device *dev, | ||
1451 | struct ethtool_pauseparam *ecmd) | ||
1452 | { | ||
1453 | struct bcm_enet_priv *priv; | ||
1454 | |||
1455 | priv = netdev_priv(dev); | ||
1456 | |||
1457 | if (priv->has_phy) { | ||
1458 | if (ecmd->autoneg && (ecmd->rx_pause != ecmd->tx_pause)) { | ||
1459 | /* asymetric pause mode not supported, | ||
1460 | * actually possible but integrated PHY has RO | ||
1461 | * asym_pause bit */ | ||
1462 | return -EINVAL; | ||
1463 | } | ||
1464 | } else { | ||
1465 | /* no pause autoneg on direct mii connection */ | ||
1466 | if (ecmd->autoneg) | ||
1467 | return -EINVAL; | ||
1468 | } | ||
1469 | |||
1470 | priv->pause_auto = ecmd->autoneg; | ||
1471 | priv->pause_rx = ecmd->rx_pause; | ||
1472 | priv->pause_tx = ecmd->tx_pause; | ||
1473 | |||
1474 | return 0; | ||
1475 | } | ||
1476 | |||
1477 | static struct ethtool_ops bcm_enet_ethtool_ops = { | ||
1478 | .get_strings = bcm_enet_get_strings, | ||
1479 | .get_stats_count = bcm_enet_get_stats_count, | ||
1480 | .get_ethtool_stats = bcm_enet_get_ethtool_stats, | ||
1481 | .get_settings = bcm_enet_get_settings, | ||
1482 | .set_settings = bcm_enet_set_settings, | ||
1483 | .get_drvinfo = bcm_enet_get_drvinfo, | ||
1484 | .get_link = ethtool_op_get_link, | ||
1485 | .get_ringparam = bcm_enet_get_ringparam, | ||
1486 | .set_ringparam = bcm_enet_set_ringparam, | ||
1487 | .get_pauseparam = bcm_enet_get_pauseparam, | ||
1488 | .set_pauseparam = bcm_enet_set_pauseparam, | ||
1489 | }; | ||
1490 | |||
1491 | static int bcm_enet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | ||
1492 | { | ||
1493 | struct bcm_enet_priv *priv; | ||
1494 | |||
1495 | priv = netdev_priv(dev); | ||
1496 | if (priv->has_phy) { | ||
1497 | if (!priv->phydev) | ||
1498 | return -ENODEV; | ||
1499 | return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd); | ||
1500 | } else { | ||
1501 | struct mii_if_info mii; | ||
1502 | |||
1503 | mii.dev = dev; | ||
1504 | mii.mdio_read = bcm_enet_mdio_read_mii; | ||
1505 | mii.mdio_write = bcm_enet_mdio_write_mii; | ||
1506 | mii.phy_id = 0; | ||
1507 | mii.phy_id_mask = 0x3f; | ||
1508 | mii.reg_num_mask = 0x1f; | ||
1509 | return generic_mii_ioctl(&mii, if_mii(rq), cmd, NULL); | ||
1510 | } | ||
1511 | } | ||
1512 | |||
1513 | /* | ||
1514 | * calculate actual hardware mtu | ||
1515 | */ | ||
1516 | static int compute_hw_mtu(struct bcm_enet_priv *priv, int mtu) | ||
1517 | { | ||
1518 | int actual_mtu; | ||
1519 | |||
1520 | actual_mtu = mtu; | ||
1521 | |||
1522 | /* add ethernet header + vlan tag size */ | ||
1523 | actual_mtu += VLAN_ETH_HLEN; | ||
1524 | |||
1525 | if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU) | ||
1526 | return -EINVAL; | ||
1527 | |||
1528 | /* | ||
1529 | * setup maximum size before we get overflow mark in | ||
1530 | * descriptor, note that this will not prevent reception of | ||
1531 | * big frames, they will be split into multiple buffers | ||
1532 | * anyway | ||
1533 | */ | ||
1534 | priv->hw_mtu = actual_mtu; | ||
1535 | |||
1536 | /* | ||
1537 | * align rx buffer size to dma burst len, account FCS since | ||
1538 | * it's appended | ||
1539 | */ | ||
1540 | priv->rx_skb_size = ALIGN(actual_mtu + ETH_FCS_LEN, | ||
1541 | BCMENET_DMA_MAXBURST * 4); | ||
1542 | return 0; | ||
1543 | } | ||
1544 | |||
1545 | /* | ||
1546 | * adjust mtu, can't be called while device is running | ||
1547 | */ | ||
1548 | static int bcm_enet_change_mtu(struct net_device *dev, int new_mtu) | ||
1549 | { | ||
1550 | int ret; | ||
1551 | |||
1552 | if (netif_running(dev)) | ||
1553 | return -EBUSY; | ||
1554 | |||
1555 | ret = compute_hw_mtu(netdev_priv(dev), new_mtu); | ||
1556 | if (ret) | ||
1557 | return ret; | ||
1558 | dev->mtu = new_mtu; | ||
1559 | return 0; | ||
1560 | } | ||
1561 | |||
1562 | /* | ||
1563 | * preinit hardware to allow mii operation while device is down | ||
1564 | */ | ||
1565 | static void bcm_enet_hw_preinit(struct bcm_enet_priv *priv) | ||
1566 | { | ||
1567 | u32 val; | ||
1568 | int limit; | ||
1569 | |||
1570 | /* make sure mac is disabled */ | ||
1571 | bcm_enet_disable_mac(priv); | ||
1572 | |||
1573 | /* soft reset mac */ | ||
1574 | val = ENET_CTL_SRESET_MASK; | ||
1575 | enet_writel(priv, val, ENET_CTL_REG); | ||
1576 | wmb(); | ||
1577 | |||
1578 | limit = 1000; | ||
1579 | do { | ||
1580 | val = enet_readl(priv, ENET_CTL_REG); | ||
1581 | if (!(val & ENET_CTL_SRESET_MASK)) | ||
1582 | break; | ||
1583 | udelay(1); | ||
1584 | } while (limit--); | ||
1585 | |||
1586 | /* select correct mii interface */ | ||
1587 | val = enet_readl(priv, ENET_CTL_REG); | ||
1588 | if (priv->use_external_mii) | ||
1589 | val |= ENET_CTL_EPHYSEL_MASK; | ||
1590 | else | ||
1591 | val &= ~ENET_CTL_EPHYSEL_MASK; | ||
1592 | enet_writel(priv, val, ENET_CTL_REG); | ||
1593 | |||
1594 | /* turn on mdc clock */ | ||
1595 | enet_writel(priv, (0x1f << ENET_MIISC_MDCFREQDIV_SHIFT) | | ||
1596 | ENET_MIISC_PREAMBLEEN_MASK, ENET_MIISC_REG); | ||
1597 | |||
1598 | /* set mib counters to self-clear when read */ | ||
1599 | val = enet_readl(priv, ENET_MIBCTL_REG); | ||
1600 | val |= ENET_MIBCTL_RDCLEAR_MASK; | ||
1601 | enet_writel(priv, val, ENET_MIBCTL_REG); | ||
1602 | } | ||
1603 | |||
1604 | static const struct net_device_ops bcm_enet_ops = { | ||
1605 | .ndo_open = bcm_enet_open, | ||
1606 | .ndo_stop = bcm_enet_stop, | ||
1607 | .ndo_start_xmit = bcm_enet_start_xmit, | ||
1608 | .ndo_get_stats = bcm_enet_get_stats, | ||
1609 | .ndo_set_mac_address = bcm_enet_set_mac_address, | ||
1610 | .ndo_set_multicast_list = bcm_enet_set_multicast_list, | ||
1611 | .ndo_do_ioctl = bcm_enet_ioctl, | ||
1612 | .ndo_change_mtu = bcm_enet_change_mtu, | ||
1613 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
1614 | .ndo_poll_controller = bcm_enet_netpoll, | ||
1615 | #endif | ||
1616 | }; | ||
1617 | |||
1618 | /* | ||
1619 | * allocate netdevice, request register memory and register device. | ||
1620 | */ | ||
1621 | static int __devinit bcm_enet_probe(struct platform_device *pdev) | ||
1622 | { | ||
1623 | struct bcm_enet_priv *priv; | ||
1624 | struct net_device *dev; | ||
1625 | struct bcm63xx_enet_platform_data *pd; | ||
1626 | struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx; | ||
1627 | struct mii_bus *bus; | ||
1628 | const char *clk_name; | ||
1629 | unsigned int iomem_size; | ||
1630 | int i, ret; | ||
1631 | |||
1632 | /* stop if shared driver failed, assume driver->probe will be | ||
1633 | * called in the same order we register devices (correct ?) */ | ||
1634 | if (!bcm_enet_shared_base) | ||
1635 | return -ENODEV; | ||
1636 | |||
1637 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1638 | res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
1639 | res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1); | ||
1640 | res_irq_tx = platform_get_resource(pdev, IORESOURCE_IRQ, 2); | ||
1641 | if (!res_mem || !res_irq || !res_irq_rx || !res_irq_tx) | ||
1642 | return -ENODEV; | ||
1643 | |||
1644 | ret = 0; | ||
1645 | dev = alloc_etherdev(sizeof(*priv)); | ||
1646 | if (!dev) | ||
1647 | return -ENOMEM; | ||
1648 | priv = netdev_priv(dev); | ||
1649 | memset(priv, 0, sizeof(*priv)); | ||
1650 | |||
1651 | ret = compute_hw_mtu(priv, dev->mtu); | ||
1652 | if (ret) | ||
1653 | goto out; | ||
1654 | |||
1655 | iomem_size = res_mem->end - res_mem->start + 1; | ||
1656 | if (!request_mem_region(res_mem->start, iomem_size, "bcm63xx_enet")) { | ||
1657 | ret = -EBUSY; | ||
1658 | goto out; | ||
1659 | } | ||
1660 | |||
1661 | priv->base = ioremap(res_mem->start, iomem_size); | ||
1662 | if (priv->base == NULL) { | ||
1663 | ret = -ENOMEM; | ||
1664 | goto out_release_mem; | ||
1665 | } | ||
1666 | dev->irq = priv->irq = res_irq->start; | ||
1667 | priv->irq_rx = res_irq_rx->start; | ||
1668 | priv->irq_tx = res_irq_tx->start; | ||
1669 | priv->mac_id = pdev->id; | ||
1670 | |||
1671 | /* get rx & tx dma channel id for this mac */ | ||
1672 | if (priv->mac_id == 0) { | ||
1673 | priv->rx_chan = 0; | ||
1674 | priv->tx_chan = 1; | ||
1675 | clk_name = "enet0"; | ||
1676 | } else { | ||
1677 | priv->rx_chan = 2; | ||
1678 | priv->tx_chan = 3; | ||
1679 | clk_name = "enet1"; | ||
1680 | } | ||
1681 | |||
1682 | priv->mac_clk = clk_get(&pdev->dev, clk_name); | ||
1683 | if (IS_ERR(priv->mac_clk)) { | ||
1684 | ret = PTR_ERR(priv->mac_clk); | ||
1685 | goto out_unmap; | ||
1686 | } | ||
1687 | clk_enable(priv->mac_clk); | ||
1688 | |||
1689 | /* initialize default and fetch platform data */ | ||
1690 | priv->rx_ring_size = BCMENET_DEF_RX_DESC; | ||
1691 | priv->tx_ring_size = BCMENET_DEF_TX_DESC; | ||
1692 | |||
1693 | pd = pdev->dev.platform_data; | ||
1694 | if (pd) { | ||
1695 | memcpy(dev->dev_addr, pd->mac_addr, ETH_ALEN); | ||
1696 | priv->has_phy = pd->has_phy; | ||
1697 | priv->phy_id = pd->phy_id; | ||
1698 | priv->has_phy_interrupt = pd->has_phy_interrupt; | ||
1699 | priv->phy_interrupt = pd->phy_interrupt; | ||
1700 | priv->use_external_mii = !pd->use_internal_phy; | ||
1701 | priv->pause_auto = pd->pause_auto; | ||
1702 | priv->pause_rx = pd->pause_rx; | ||
1703 | priv->pause_tx = pd->pause_tx; | ||
1704 | priv->force_duplex_full = pd->force_duplex_full; | ||
1705 | priv->force_speed_100 = pd->force_speed_100; | ||
1706 | } | ||
1707 | |||
1708 | if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { | ||
1709 | /* using internal PHY, enable clock */ | ||
1710 | priv->phy_clk = clk_get(&pdev->dev, "ephy"); | ||
1711 | if (IS_ERR(priv->phy_clk)) { | ||
1712 | ret = PTR_ERR(priv->phy_clk); | ||
1713 | priv->phy_clk = NULL; | ||
1714 | goto out_put_clk_mac; | ||
1715 | } | ||
1716 | clk_enable(priv->phy_clk); | ||
1717 | } | ||
1718 | |||
1719 | /* do minimal hardware init to be able to probe mii bus */ | ||
1720 | bcm_enet_hw_preinit(priv); | ||
1721 | |||
1722 | /* MII bus registration */ | ||
1723 | if (priv->has_phy) { | ||
1724 | |||
1725 | priv->mii_bus = mdiobus_alloc(); | ||
1726 | if (!priv->mii_bus) { | ||
1727 | ret = -ENOMEM; | ||
1728 | goto out_uninit_hw; | ||
1729 | } | ||
1730 | |||
1731 | bus = priv->mii_bus; | ||
1732 | bus->name = "bcm63xx_enet MII bus"; | ||
1733 | bus->parent = &pdev->dev; | ||
1734 | bus->priv = priv; | ||
1735 | bus->read = bcm_enet_mdio_read_phylib; | ||
1736 | bus->write = bcm_enet_mdio_write_phylib; | ||
1737 | sprintf(bus->id, "%d", priv->mac_id); | ||
1738 | |||
1739 | /* only probe bus where we think the PHY is, because | ||
1740 | * the mdio read operation return 0 instead of 0xffff | ||
1741 | * if a slave is not present on hw */ | ||
1742 | bus->phy_mask = ~(1 << priv->phy_id); | ||
1743 | |||
1744 | bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); | ||
1745 | if (!bus->irq) { | ||
1746 | ret = -ENOMEM; | ||
1747 | goto out_free_mdio; | ||
1748 | } | ||
1749 | |||
1750 | if (priv->has_phy_interrupt) | ||
1751 | bus->irq[priv->phy_id] = priv->phy_interrupt; | ||
1752 | else | ||
1753 | bus->irq[priv->phy_id] = PHY_POLL; | ||
1754 | |||
1755 | ret = mdiobus_register(bus); | ||
1756 | if (ret) { | ||
1757 | dev_err(&pdev->dev, "unable to register mdio bus\n"); | ||
1758 | goto out_free_mdio; | ||
1759 | } | ||
1760 | } else { | ||
1761 | |||
1762 | /* run platform code to initialize PHY device */ | ||
1763 | if (pd->mii_config && | ||
1764 | pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, | ||
1765 | bcm_enet_mdio_write_mii)) { | ||
1766 | dev_err(&pdev->dev, "unable to configure mdio bus\n"); | ||
1767 | goto out_uninit_hw; | ||
1768 | } | ||
1769 | } | ||
1770 | |||
1771 | spin_lock_init(&priv->rx_lock); | ||
1772 | |||
1773 | /* init rx timeout (used for oom) */ | ||
1774 | init_timer(&priv->rx_timeout); | ||
1775 | priv->rx_timeout.function = bcm_enet_refill_rx_timer; | ||
1776 | priv->rx_timeout.data = (unsigned long)dev; | ||
1777 | |||
1778 | /* init the mib update lock&work */ | ||
1779 | mutex_init(&priv->mib_update_lock); | ||
1780 | INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer); | ||
1781 | |||
1782 | /* zero mib counters */ | ||
1783 | for (i = 0; i < ENET_MIB_REG_COUNT; i++) | ||
1784 | enet_writel(priv, 0, ENET_MIB_REG(i)); | ||
1785 | |||
1786 | /* register netdevice */ | ||
1787 | dev->netdev_ops = &bcm_enet_ops; | ||
1788 | netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); | ||
1789 | |||
1790 | SET_ETHTOOL_OPS(dev, &bcm_enet_ethtool_ops); | ||
1791 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
1792 | |||
1793 | ret = register_netdev(dev); | ||
1794 | if (ret) | ||
1795 | goto out_unregister_mdio; | ||
1796 | |||
1797 | netif_carrier_off(dev); | ||
1798 | platform_set_drvdata(pdev, dev); | ||
1799 | priv->pdev = pdev; | ||
1800 | priv->net_dev = dev; | ||
1801 | |||
1802 | return 0; | ||
1803 | |||
1804 | out_unregister_mdio: | ||
1805 | if (priv->mii_bus) { | ||
1806 | mdiobus_unregister(priv->mii_bus); | ||
1807 | kfree(priv->mii_bus->irq); | ||
1808 | } | ||
1809 | |||
1810 | out_free_mdio: | ||
1811 | if (priv->mii_bus) | ||
1812 | mdiobus_free(priv->mii_bus); | ||
1813 | |||
1814 | out_uninit_hw: | ||
1815 | /* turn off mdc clock */ | ||
1816 | enet_writel(priv, 0, ENET_MIISC_REG); | ||
1817 | if (priv->phy_clk) { | ||
1818 | clk_disable(priv->phy_clk); | ||
1819 | clk_put(priv->phy_clk); | ||
1820 | } | ||
1821 | |||
1822 | out_put_clk_mac: | ||
1823 | clk_disable(priv->mac_clk); | ||
1824 | clk_put(priv->mac_clk); | ||
1825 | |||
1826 | out_unmap: | ||
1827 | iounmap(priv->base); | ||
1828 | |||
1829 | out_release_mem: | ||
1830 | release_mem_region(res_mem->start, iomem_size); | ||
1831 | out: | ||
1832 | free_netdev(dev); | ||
1833 | return ret; | ||
1834 | } | ||
1835 | |||
1836 | |||
1837 | /* | ||
1838 | * exit func, stops hardware and unregisters netdevice | ||
1839 | */ | ||
1840 | static int __devexit bcm_enet_remove(struct platform_device *pdev) | ||
1841 | { | ||
1842 | struct bcm_enet_priv *priv; | ||
1843 | struct net_device *dev; | ||
1844 | struct resource *res; | ||
1845 | |||
1846 | /* stop netdevice */ | ||
1847 | dev = platform_get_drvdata(pdev); | ||
1848 | priv = netdev_priv(dev); | ||
1849 | unregister_netdev(dev); | ||
1850 | |||
1851 | /* turn off mdc clock */ | ||
1852 | enet_writel(priv, 0, ENET_MIISC_REG); | ||
1853 | |||
1854 | if (priv->has_phy) { | ||
1855 | mdiobus_unregister(priv->mii_bus); | ||
1856 | kfree(priv->mii_bus->irq); | ||
1857 | mdiobus_free(priv->mii_bus); | ||
1858 | } else { | ||
1859 | struct bcm63xx_enet_platform_data *pd; | ||
1860 | |||
1861 | pd = pdev->dev.platform_data; | ||
1862 | if (pd && pd->mii_config) | ||
1863 | pd->mii_config(dev, 0, bcm_enet_mdio_read_mii, | ||
1864 | bcm_enet_mdio_write_mii); | ||
1865 | } | ||
1866 | |||
1867 | /* release device resources */ | ||
1868 | iounmap(priv->base); | ||
1869 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1870 | release_mem_region(res->start, res->end - res->start + 1); | ||
1871 | |||
1872 | /* disable hw block clocks */ | ||
1873 | if (priv->phy_clk) { | ||
1874 | clk_disable(priv->phy_clk); | ||
1875 | clk_put(priv->phy_clk); | ||
1876 | } | ||
1877 | clk_disable(priv->mac_clk); | ||
1878 | clk_put(priv->mac_clk); | ||
1879 | |||
1880 | platform_set_drvdata(pdev, NULL); | ||
1881 | free_netdev(dev); | ||
1882 | return 0; | ||
1883 | } | ||
1884 | |||
1885 | struct platform_driver bcm63xx_enet_driver = { | ||
1886 | .probe = bcm_enet_probe, | ||
1887 | .remove = __devexit_p(bcm_enet_remove), | ||
1888 | .driver = { | ||
1889 | .name = "bcm63xx_enet", | ||
1890 | .owner = THIS_MODULE, | ||
1891 | }, | ||
1892 | }; | ||
1893 | |||
1894 | /* | ||
1895 | * reserve & remap memory space shared between all macs | ||
1896 | */ | ||
1897 | static int __devinit bcm_enet_shared_probe(struct platform_device *pdev) | ||
1898 | { | ||
1899 | struct resource *res; | ||
1900 | unsigned int iomem_size; | ||
1901 | |||
1902 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1903 | if (!res) | ||
1904 | return -ENODEV; | ||
1905 | |||
1906 | iomem_size = res->end - res->start + 1; | ||
1907 | if (!request_mem_region(res->start, iomem_size, "bcm63xx_enet_dma")) | ||
1908 | return -EBUSY; | ||
1909 | |||
1910 | bcm_enet_shared_base = ioremap(res->start, iomem_size); | ||
1911 | if (!bcm_enet_shared_base) { | ||
1912 | release_mem_region(res->start, iomem_size); | ||
1913 | return -ENOMEM; | ||
1914 | } | ||
1915 | return 0; | ||
1916 | } | ||
1917 | |||
1918 | static int __devexit bcm_enet_shared_remove(struct platform_device *pdev) | ||
1919 | { | ||
1920 | struct resource *res; | ||
1921 | |||
1922 | iounmap(bcm_enet_shared_base); | ||
1923 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1924 | release_mem_region(res->start, res->end - res->start + 1); | ||
1925 | return 0; | ||
1926 | } | ||
1927 | |||
1928 | /* | ||
1929 | * this "shared" driver is needed because both macs share a single | ||
1930 | * address space | ||
1931 | */ | ||
1932 | struct platform_driver bcm63xx_enet_shared_driver = { | ||
1933 | .probe = bcm_enet_shared_probe, | ||
1934 | .remove = __devexit_p(bcm_enet_shared_remove), | ||
1935 | .driver = { | ||
1936 | .name = "bcm63xx_enet_shared", | ||
1937 | .owner = THIS_MODULE, | ||
1938 | }, | ||
1939 | }; | ||
1940 | |||
1941 | /* | ||
1942 | * entry point | ||
1943 | */ | ||
1944 | static int __init bcm_enet_init(void) | ||
1945 | { | ||
1946 | int ret; | ||
1947 | |||
1948 | ret = platform_driver_register(&bcm63xx_enet_shared_driver); | ||
1949 | if (ret) | ||
1950 | return ret; | ||
1951 | |||
1952 | ret = platform_driver_register(&bcm63xx_enet_driver); | ||
1953 | if (ret) | ||
1954 | platform_driver_unregister(&bcm63xx_enet_shared_driver); | ||
1955 | |||
1956 | return ret; | ||
1957 | } | ||
1958 | |||
1959 | static void __exit bcm_enet_exit(void) | ||
1960 | { | ||
1961 | platform_driver_unregister(&bcm63xx_enet_driver); | ||
1962 | platform_driver_unregister(&bcm63xx_enet_shared_driver); | ||
1963 | } | ||
1964 | |||
1965 | |||
1966 | module_init(bcm_enet_init); | ||
1967 | module_exit(bcm_enet_exit); | ||
1968 | |||
1969 | MODULE_DESCRIPTION("BCM63xx internal ethernet mac driver"); | ||
1970 | MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>"); | ||
1971 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/net/bcm63xx_enet.h b/drivers/net/bcm63xx_enet.h new file mode 100644 index 000000000000..bd3684d42d74 --- /dev/null +++ b/drivers/net/bcm63xx_enet.h | |||
@@ -0,0 +1,303 @@ | |||
1 | #ifndef BCM63XX_ENET_H_ | ||
2 | #define BCM63XX_ENET_H_ | ||
3 | |||
4 | #include <linux/types.h> | ||
5 | #include <linux/mii.h> | ||
6 | #include <linux/mutex.h> | ||
7 | #include <linux/phy.h> | ||
8 | #include <linux/platform_device.h> | ||
9 | |||
10 | #include <bcm63xx_regs.h> | ||
11 | #include <bcm63xx_irq.h> | ||
12 | #include <bcm63xx_io.h> | ||
13 | |||
14 | /* default number of descriptor */ | ||
15 | #define BCMENET_DEF_RX_DESC 64 | ||
16 | #define BCMENET_DEF_TX_DESC 32 | ||
17 | |||
18 | /* maximum burst len for dma (4 bytes unit) */ | ||
19 | #define BCMENET_DMA_MAXBURST 16 | ||
20 | |||
21 | /* tx transmit threshold (4 bytes unit), fifo is 256 bytes, the value | ||
22 | * must be low enough so that a DMA transfer of above burst length can | ||
23 | * not overflow the fifo */ | ||
24 | #define BCMENET_TX_FIFO_TRESH 32 | ||
25 | |||
26 | /* | ||
27 | * hardware maximum rx/tx packet size including FCS, max mtu is | ||
28 | * actually 2047, but if we set max rx size register to 2047 we won't | ||
29 | * get overflow information if packet size is 2048 or above | ||
30 | */ | ||
31 | #define BCMENET_MAX_MTU 2046 | ||
32 | |||
33 | /* | ||
34 | * rx/tx dma descriptor | ||
35 | */ | ||
36 | struct bcm_enet_desc { | ||
37 | u32 len_stat; | ||
38 | u32 address; | ||
39 | }; | ||
40 | |||
41 | #define DMADESC_LENGTH_SHIFT 16 | ||
42 | #define DMADESC_LENGTH_MASK (0xfff << DMADESC_LENGTH_SHIFT) | ||
43 | #define DMADESC_OWNER_MASK (1 << 15) | ||
44 | #define DMADESC_EOP_MASK (1 << 14) | ||
45 | #define DMADESC_SOP_MASK (1 << 13) | ||
46 | #define DMADESC_ESOP_MASK (DMADESC_EOP_MASK | DMADESC_SOP_MASK) | ||
47 | #define DMADESC_WRAP_MASK (1 << 12) | ||
48 | |||
49 | #define DMADESC_UNDER_MASK (1 << 9) | ||
50 | #define DMADESC_APPEND_CRC (1 << 8) | ||
51 | #define DMADESC_OVSIZE_MASK (1 << 4) | ||
52 | #define DMADESC_RXER_MASK (1 << 2) | ||
53 | #define DMADESC_CRC_MASK (1 << 1) | ||
54 | #define DMADESC_OV_MASK (1 << 0) | ||
55 | #define DMADESC_ERR_MASK (DMADESC_UNDER_MASK | \ | ||
56 | DMADESC_OVSIZE_MASK | \ | ||
57 | DMADESC_RXER_MASK | \ | ||
58 | DMADESC_CRC_MASK | \ | ||
59 | DMADESC_OV_MASK) | ||
60 | |||
61 | |||
62 | /* | ||
63 | * MIB Counters register definitions | ||
64 | */ | ||
65 | #define ETH_MIB_TX_GD_OCTETS 0 | ||
66 | #define ETH_MIB_TX_GD_PKTS 1 | ||
67 | #define ETH_MIB_TX_ALL_OCTETS 2 | ||
68 | #define ETH_MIB_TX_ALL_PKTS 3 | ||
69 | #define ETH_MIB_TX_BRDCAST 4 | ||
70 | #define ETH_MIB_TX_MULT 5 | ||
71 | #define ETH_MIB_TX_64 6 | ||
72 | #define ETH_MIB_TX_65_127 7 | ||
73 | #define ETH_MIB_TX_128_255 8 | ||
74 | #define ETH_MIB_TX_256_511 9 | ||
75 | #define ETH_MIB_TX_512_1023 10 | ||
76 | #define ETH_MIB_TX_1024_MAX 11 | ||
77 | #define ETH_MIB_TX_JAB 12 | ||
78 | #define ETH_MIB_TX_OVR 13 | ||
79 | #define ETH_MIB_TX_FRAG 14 | ||
80 | #define ETH_MIB_TX_UNDERRUN 15 | ||
81 | #define ETH_MIB_TX_COL 16 | ||
82 | #define ETH_MIB_TX_1_COL 17 | ||
83 | #define ETH_MIB_TX_M_COL 18 | ||
84 | #define ETH_MIB_TX_EX_COL 19 | ||
85 | #define ETH_MIB_TX_LATE 20 | ||
86 | #define ETH_MIB_TX_DEF 21 | ||
87 | #define ETH_MIB_TX_CRS 22 | ||
88 | #define ETH_MIB_TX_PAUSE 23 | ||
89 | |||
90 | #define ETH_MIB_RX_GD_OCTETS 32 | ||
91 | #define ETH_MIB_RX_GD_PKTS 33 | ||
92 | #define ETH_MIB_RX_ALL_OCTETS 34 | ||
93 | #define ETH_MIB_RX_ALL_PKTS 35 | ||
94 | #define ETH_MIB_RX_BRDCAST 36 | ||
95 | #define ETH_MIB_RX_MULT 37 | ||
96 | #define ETH_MIB_RX_64 38 | ||
97 | #define ETH_MIB_RX_65_127 39 | ||
98 | #define ETH_MIB_RX_128_255 40 | ||
99 | #define ETH_MIB_RX_256_511 41 | ||
100 | #define ETH_MIB_RX_512_1023 42 | ||
101 | #define ETH_MIB_RX_1024_MAX 43 | ||
102 | #define ETH_MIB_RX_JAB 44 | ||
103 | #define ETH_MIB_RX_OVR 45 | ||
104 | #define ETH_MIB_RX_FRAG 46 | ||
105 | #define ETH_MIB_RX_DROP 47 | ||
106 | #define ETH_MIB_RX_CRC_ALIGN 48 | ||
107 | #define ETH_MIB_RX_UND 49 | ||
108 | #define ETH_MIB_RX_CRC 50 | ||
109 | #define ETH_MIB_RX_ALIGN 51 | ||
110 | #define ETH_MIB_RX_SYM 52 | ||
111 | #define ETH_MIB_RX_PAUSE 53 | ||
112 | #define ETH_MIB_RX_CNTRL 54 | ||
113 | |||
114 | |||
115 | struct bcm_enet_mib_counters { | ||
116 | u64 tx_gd_octets; | ||
117 | u32 tx_gd_pkts; | ||
118 | u32 tx_all_octets; | ||
119 | u32 tx_all_pkts; | ||
120 | u32 tx_brdcast; | ||
121 | u32 tx_mult; | ||
122 | u32 tx_64; | ||
123 | u32 tx_65_127; | ||
124 | u32 tx_128_255; | ||
125 | u32 tx_256_511; | ||
126 | u32 tx_512_1023; | ||
127 | u32 tx_1024_max; | ||
128 | u32 tx_jab; | ||
129 | u32 tx_ovr; | ||
130 | u32 tx_frag; | ||
131 | u32 tx_underrun; | ||
132 | u32 tx_col; | ||
133 | u32 tx_1_col; | ||
134 | u32 tx_m_col; | ||
135 | u32 tx_ex_col; | ||
136 | u32 tx_late; | ||
137 | u32 tx_def; | ||
138 | u32 tx_crs; | ||
139 | u32 tx_pause; | ||
140 | u64 rx_gd_octets; | ||
141 | u32 rx_gd_pkts; | ||
142 | u32 rx_all_octets; | ||
143 | u32 rx_all_pkts; | ||
144 | u32 rx_brdcast; | ||
145 | u32 rx_mult; | ||
146 | u32 rx_64; | ||
147 | u32 rx_65_127; | ||
148 | u32 rx_128_255; | ||
149 | u32 rx_256_511; | ||
150 | u32 rx_512_1023; | ||
151 | u32 rx_1024_max; | ||
152 | u32 rx_jab; | ||
153 | u32 rx_ovr; | ||
154 | u32 rx_frag; | ||
155 | u32 rx_drop; | ||
156 | u32 rx_crc_align; | ||
157 | u32 rx_und; | ||
158 | u32 rx_crc; | ||
159 | u32 rx_align; | ||
160 | u32 rx_sym; | ||
161 | u32 rx_pause; | ||
162 | u32 rx_cntrl; | ||
163 | }; | ||
164 | |||
165 | |||
166 | struct bcm_enet_priv { | ||
167 | |||
168 | /* mac id (from platform device id) */ | ||
169 | int mac_id; | ||
170 | |||
171 | /* base remapped address of device */ | ||
172 | void __iomem *base; | ||
173 | |||
174 | /* mac irq, rx_dma irq, tx_dma irq */ | ||
175 | int irq; | ||
176 | int irq_rx; | ||
177 | int irq_tx; | ||
178 | |||
179 | /* hw view of rx & tx dma ring */ | ||
180 | dma_addr_t rx_desc_dma; | ||
181 | dma_addr_t tx_desc_dma; | ||
182 | |||
183 | /* allocated size (in bytes) for rx & tx dma ring */ | ||
184 | unsigned int rx_desc_alloc_size; | ||
185 | unsigned int tx_desc_alloc_size; | ||
186 | |||
187 | |||
188 | struct napi_struct napi; | ||
189 | |||
190 | /* dma channel id for rx */ | ||
191 | int rx_chan; | ||
192 | |||
193 | /* number of dma desc in rx ring */ | ||
194 | int rx_ring_size; | ||
195 | |||
196 | /* cpu view of rx dma ring */ | ||
197 | struct bcm_enet_desc *rx_desc_cpu; | ||
198 | |||
199 | /* current number of armed descriptor given to hardware for rx */ | ||
200 | int rx_desc_count; | ||
201 | |||
202 | /* next rx descriptor to fetch from hardware */ | ||
203 | int rx_curr_desc; | ||
204 | |||
205 | /* next dirty rx descriptor to refill */ | ||
206 | int rx_dirty_desc; | ||
207 | |||
208 | /* size of allocated rx skbs */ | ||
209 | unsigned int rx_skb_size; | ||
210 | |||
211 | /* list of skb given to hw for rx */ | ||
212 | struct sk_buff **rx_skb; | ||
213 | |||
214 | /* used when rx skb allocation failed, so we defer rx queue | ||
215 | * refill */ | ||
216 | struct timer_list rx_timeout; | ||
217 | |||
218 | /* lock rx_timeout against rx normal operation */ | ||
219 | spinlock_t rx_lock; | ||
220 | |||
221 | |||
222 | /* dma channel id for tx */ | ||
223 | int tx_chan; | ||
224 | |||
225 | /* number of dma desc in tx ring */ | ||
226 | int tx_ring_size; | ||
227 | |||
228 | /* cpu view of rx dma ring */ | ||
229 | struct bcm_enet_desc *tx_desc_cpu; | ||
230 | |||
231 | /* number of available descriptor for tx */ | ||
232 | int tx_desc_count; | ||
233 | |||
234 | /* next tx descriptor avaiable */ | ||
235 | int tx_curr_desc; | ||
236 | |||
237 | /* next dirty tx descriptor to reclaim */ | ||
238 | int tx_dirty_desc; | ||
239 | |||
240 | /* list of skb given to hw for tx */ | ||
241 | struct sk_buff **tx_skb; | ||
242 | |||
243 | /* lock used by tx reclaim and xmit */ | ||
244 | spinlock_t tx_lock; | ||
245 | |||
246 | |||
247 | /* set if internal phy is ignored and external mii interface | ||
248 | * is selected */ | ||
249 | int use_external_mii; | ||
250 | |||
251 | /* set if a phy is connected, phy address must be known, | ||
252 | * probing is not possible */ | ||
253 | int has_phy; | ||
254 | int phy_id; | ||
255 | |||
256 | /* set if connected phy has an associated irq */ | ||
257 | int has_phy_interrupt; | ||
258 | int phy_interrupt; | ||
259 | |||
260 | /* used when a phy is connected (phylib used) */ | ||
261 | struct mii_bus *mii_bus; | ||
262 | struct phy_device *phydev; | ||
263 | int old_link; | ||
264 | int old_duplex; | ||
265 | int old_pause; | ||
266 | |||
267 | /* used when no phy is connected */ | ||
268 | int force_speed_100; | ||
269 | int force_duplex_full; | ||
270 | |||
271 | /* pause parameters */ | ||
272 | int pause_auto; | ||
273 | int pause_rx; | ||
274 | int pause_tx; | ||
275 | |||
276 | /* stats */ | ||
277 | struct net_device_stats stats; | ||
278 | struct bcm_enet_mib_counters mib; | ||
279 | |||
280 | /* after mib interrupt, mib registers update is done in this | ||
281 | * work queue */ | ||
282 | struct work_struct mib_update_task; | ||
283 | |||
284 | /* lock mib update between userspace request and workqueue */ | ||
285 | struct mutex mib_update_lock; | ||
286 | |||
287 | /* mac clock */ | ||
288 | struct clk *mac_clk; | ||
289 | |||
290 | /* phy clock if internal phy is used */ | ||
291 | struct clk *phy_clk; | ||
292 | |||
293 | /* network device reference */ | ||
294 | struct net_device *net_dev; | ||
295 | |||
296 | /* platform device reference */ | ||
297 | struct platform_device *pdev; | ||
298 | |||
299 | /* maximum hardware transmit/receive size */ | ||
300 | unsigned int hw_mtu; | ||
301 | }; | ||
302 | |||
303 | #endif /* ! BCM63XX_ENET_H_ */ | ||
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h index 13b72ce870de..684c6fe24c8d 100644 --- a/drivers/net/benet/be.h +++ b/drivers/net/benet/be.h | |||
@@ -362,5 +362,6 @@ static inline u8 is_udp_pkt(struct sk_buff *skb) | |||
362 | extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, | 362 | extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, |
363 | u16 num_popped); | 363 | u16 num_popped); |
364 | extern void be_link_status_update(struct be_adapter *adapter, bool link_up); | 364 | extern void be_link_status_update(struct be_adapter *adapter, bool link_up); |
365 | extern void netdev_stats_update(struct be_adapter *adapter); | ||
365 | extern int be_load_fw(struct be_adapter *adapter, u8 *func); | 366 | extern int be_load_fw(struct be_adapter *adapter, u8 *func); |
366 | #endif /* BE_H */ | 367 | #endif /* BE_H */ |
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c index 1db092498309..3dd76c4170bf 100644 --- a/drivers/net/benet/be_cmds.c +++ b/drivers/net/benet/be_cmds.c | |||
@@ -59,15 +59,22 @@ static int be_mcc_compl_process(struct be_adapter *adapter, | |||
59 | 59 | ||
60 | compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & | 60 | compl_status = (compl->status >> CQE_STATUS_COMPL_SHIFT) & |
61 | CQE_STATUS_COMPL_MASK; | 61 | CQE_STATUS_COMPL_MASK; |
62 | if (compl_status != MCC_STATUS_SUCCESS) { | 62 | if (compl_status == MCC_STATUS_SUCCESS) { |
63 | if (compl->tag0 == OPCODE_ETH_GET_STATISTICS) { | ||
64 | struct be_cmd_resp_get_stats *resp = | ||
65 | adapter->stats.cmd.va; | ||
66 | be_dws_le_to_cpu(&resp->hw_stats, | ||
67 | sizeof(resp->hw_stats)); | ||
68 | netdev_stats_update(adapter); | ||
69 | } | ||
70 | } else if (compl_status != MCC_STATUS_NOT_SUPPORTED) { | ||
63 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & | 71 | extd_status = (compl->status >> CQE_STATUS_EXTD_SHIFT) & |
64 | CQE_STATUS_EXTD_MASK; | 72 | CQE_STATUS_EXTD_MASK; |
65 | dev_warn(&adapter->pdev->dev, | 73 | dev_warn(&adapter->pdev->dev, |
66 | "Error in cmd completion: status(compl/extd)=%d/%d\n", | 74 | "Error in cmd completion: status(compl/extd)=%d/%d\n", |
67 | compl_status, extd_status); | 75 | compl_status, extd_status); |
68 | return -1; | ||
69 | } | 76 | } |
70 | return 0; | 77 | return compl_status; |
71 | } | 78 | } |
72 | 79 | ||
73 | /* Link state evt is a string of bytes; no need for endian swapping */ | 80 | /* Link state evt is a string of bytes; no need for endian swapping */ |
@@ -97,10 +104,10 @@ static struct be_mcc_compl *be_mcc_compl_get(struct be_adapter *adapter) | |||
97 | return NULL; | 104 | return NULL; |
98 | } | 105 | } |
99 | 106 | ||
100 | void be_process_mcc(struct be_adapter *adapter) | 107 | int be_process_mcc(struct be_adapter *adapter) |
101 | { | 108 | { |
102 | struct be_mcc_compl *compl; | 109 | struct be_mcc_compl *compl; |
103 | int num = 0; | 110 | int num = 0, status = 0; |
104 | 111 | ||
105 | spin_lock_bh(&adapter->mcc_cq_lock); | 112 | spin_lock_bh(&adapter->mcc_cq_lock); |
106 | while ((compl = be_mcc_compl_get(adapter))) { | 113 | while ((compl = be_mcc_compl_get(adapter))) { |
@@ -111,38 +118,47 @@ void be_process_mcc(struct be_adapter *adapter) | |||
111 | /* Interpret compl as a async link evt */ | 118 | /* Interpret compl as a async link evt */ |
112 | be_async_link_state_process(adapter, | 119 | be_async_link_state_process(adapter, |
113 | (struct be_async_event_link_state *) compl); | 120 | (struct be_async_event_link_state *) compl); |
114 | } else { | 121 | } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { |
115 | be_mcc_compl_process(adapter, compl); | 122 | status = be_mcc_compl_process(adapter, compl); |
116 | atomic_dec(&adapter->mcc_obj.q.used); | 123 | atomic_dec(&adapter->mcc_obj.q.used); |
117 | } | 124 | } |
118 | be_mcc_compl_use(compl); | 125 | be_mcc_compl_use(compl); |
119 | num++; | 126 | num++; |
120 | } | 127 | } |
128 | |||
121 | if (num) | 129 | if (num) |
122 | be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, num); | 130 | be_cq_notify(adapter, adapter->mcc_obj.cq.id, true, num); |
131 | |||
123 | spin_unlock_bh(&adapter->mcc_cq_lock); | 132 | spin_unlock_bh(&adapter->mcc_cq_lock); |
133 | return status; | ||
124 | } | 134 | } |
125 | 135 | ||
126 | /* Wait till no more pending mcc requests are present */ | 136 | /* Wait till no more pending mcc requests are present */ |
127 | static void be_mcc_wait_compl(struct be_adapter *adapter) | 137 | static int be_mcc_wait_compl(struct be_adapter *adapter) |
128 | { | 138 | { |
129 | #define mcc_timeout 50000 /* 5s timeout */ | 139 | #define mcc_timeout 120000 /* 12s timeout */ |
130 | int i; | 140 | int i, status; |
131 | for (i = 0; i < mcc_timeout; i++) { | 141 | for (i = 0; i < mcc_timeout; i++) { |
132 | be_process_mcc(adapter); | 142 | status = be_process_mcc(adapter); |
143 | if (status) | ||
144 | return status; | ||
145 | |||
133 | if (atomic_read(&adapter->mcc_obj.q.used) == 0) | 146 | if (atomic_read(&adapter->mcc_obj.q.used) == 0) |
134 | break; | 147 | break; |
135 | udelay(100); | 148 | udelay(100); |
136 | } | 149 | } |
137 | if (i == mcc_timeout) | 150 | if (i == mcc_timeout) { |
138 | dev_err(&adapter->pdev->dev, "mccq poll timed out\n"); | 151 | dev_err(&adapter->pdev->dev, "mccq poll timed out\n"); |
152 | return -1; | ||
153 | } | ||
154 | return 0; | ||
139 | } | 155 | } |
140 | 156 | ||
141 | /* Notify MCC requests and wait for completion */ | 157 | /* Notify MCC requests and wait for completion */ |
142 | static void be_mcc_notify_wait(struct be_adapter *adapter) | 158 | static int be_mcc_notify_wait(struct be_adapter *adapter) |
143 | { | 159 | { |
144 | be_mcc_notify(adapter); | 160 | be_mcc_notify(adapter); |
145 | be_mcc_wait_compl(adapter); | 161 | return be_mcc_wait_compl(adapter); |
146 | } | 162 | } |
147 | 163 | ||
148 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) | 164 | static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) |
@@ -173,7 +189,7 @@ static int be_mbox_db_ready_wait(struct be_adapter *adapter, void __iomem *db) | |||
173 | * Insert the mailbox address into the doorbell in two steps | 189 | * Insert the mailbox address into the doorbell in two steps |
174 | * Polls on the mbox doorbell till a command completion (or a timeout) occurs | 190 | * Polls on the mbox doorbell till a command completion (or a timeout) occurs |
175 | */ | 191 | */ |
176 | static int be_mbox_notify(struct be_adapter *adapter) | 192 | static int be_mbox_notify_wait(struct be_adapter *adapter) |
177 | { | 193 | { |
178 | int status; | 194 | int status; |
179 | u32 val = 0; | 195 | u32 val = 0; |
@@ -182,8 +198,6 @@ static int be_mbox_notify(struct be_adapter *adapter) | |||
182 | struct be_mcc_mailbox *mbox = mbox_mem->va; | 198 | struct be_mcc_mailbox *mbox = mbox_mem->va; |
183 | struct be_mcc_compl *compl = &mbox->compl; | 199 | struct be_mcc_compl *compl = &mbox->compl; |
184 | 200 | ||
185 | memset(compl, 0, sizeof(*compl)); | ||
186 | |||
187 | val |= MPU_MAILBOX_DB_HI_MASK; | 201 | val |= MPU_MAILBOX_DB_HI_MASK; |
188 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ | 202 | /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */ |
189 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; | 203 | val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; |
@@ -310,34 +324,40 @@ static u32 eq_delay_to_mult(u32 usec_delay) | |||
310 | return multiplier; | 324 | return multiplier; |
311 | } | 325 | } |
312 | 326 | ||
313 | static inline struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem) | 327 | static inline struct be_mcc_wrb *wrb_from_mbox(struct be_adapter *adapter) |
314 | { | 328 | { |
315 | return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; | 329 | struct be_dma_mem *mbox_mem = &adapter->mbox_mem; |
330 | struct be_mcc_wrb *wrb | ||
331 | = &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb; | ||
332 | memset(wrb, 0, sizeof(*wrb)); | ||
333 | return wrb; | ||
316 | } | 334 | } |
317 | 335 | ||
318 | static inline struct be_mcc_wrb *wrb_from_mcc(struct be_queue_info *mccq) | 336 | static struct be_mcc_wrb *wrb_from_mccq(struct be_adapter *adapter) |
319 | { | 337 | { |
320 | struct be_mcc_wrb *wrb = NULL; | 338 | struct be_queue_info *mccq = &adapter->mcc_obj.q; |
321 | if (atomic_read(&mccq->used) < mccq->len) { | 339 | struct be_mcc_wrb *wrb; |
322 | wrb = queue_head_node(mccq); | 340 | |
323 | queue_head_inc(mccq); | 341 | BUG_ON(atomic_read(&mccq->used) >= mccq->len); |
324 | atomic_inc(&mccq->used); | 342 | wrb = queue_head_node(mccq); |
325 | memset(wrb, 0, sizeof(*wrb)); | 343 | queue_head_inc(mccq); |
326 | } | 344 | atomic_inc(&mccq->used); |
345 | memset(wrb, 0, sizeof(*wrb)); | ||
327 | return wrb; | 346 | return wrb; |
328 | } | 347 | } |
329 | 348 | ||
330 | int be_cmd_eq_create(struct be_adapter *adapter, | 349 | int be_cmd_eq_create(struct be_adapter *adapter, |
331 | struct be_queue_info *eq, int eq_delay) | 350 | struct be_queue_info *eq, int eq_delay) |
332 | { | 351 | { |
333 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 352 | struct be_mcc_wrb *wrb; |
334 | struct be_cmd_req_eq_create *req = embedded_payload(wrb); | 353 | struct be_cmd_req_eq_create *req; |
335 | struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); | ||
336 | struct be_dma_mem *q_mem = &eq->dma_mem; | 354 | struct be_dma_mem *q_mem = &eq->dma_mem; |
337 | int status; | 355 | int status; |
338 | 356 | ||
339 | spin_lock(&adapter->mbox_lock); | 357 | spin_lock(&adapter->mbox_lock); |
340 | memset(wrb, 0, sizeof(*wrb)); | 358 | |
359 | wrb = wrb_from_mbox(adapter); | ||
360 | req = embedded_payload(wrb); | ||
341 | 361 | ||
342 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 362 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
343 | 363 | ||
@@ -359,25 +379,29 @@ int be_cmd_eq_create(struct be_adapter *adapter, | |||
359 | 379 | ||
360 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 380 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
361 | 381 | ||
362 | status = be_mbox_notify(adapter); | 382 | status = be_mbox_notify_wait(adapter); |
363 | if (!status) { | 383 | if (!status) { |
384 | struct be_cmd_resp_eq_create *resp = embedded_payload(wrb); | ||
364 | eq->id = le16_to_cpu(resp->eq_id); | 385 | eq->id = le16_to_cpu(resp->eq_id); |
365 | eq->created = true; | 386 | eq->created = true; |
366 | } | 387 | } |
388 | |||
367 | spin_unlock(&adapter->mbox_lock); | 389 | spin_unlock(&adapter->mbox_lock); |
368 | return status; | 390 | return status; |
369 | } | 391 | } |
370 | 392 | ||
393 | /* Uses mbox */ | ||
371 | int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, | 394 | int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, |
372 | u8 type, bool permanent, u32 if_handle) | 395 | u8 type, bool permanent, u32 if_handle) |
373 | { | 396 | { |
374 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 397 | struct be_mcc_wrb *wrb; |
375 | struct be_cmd_req_mac_query *req = embedded_payload(wrb); | 398 | struct be_cmd_req_mac_query *req; |
376 | struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); | ||
377 | int status; | 399 | int status; |
378 | 400 | ||
379 | spin_lock(&adapter->mbox_lock); | 401 | spin_lock(&adapter->mbox_lock); |
380 | memset(wrb, 0, sizeof(*wrb)); | 402 | |
403 | wrb = wrb_from_mbox(adapter); | ||
404 | req = embedded_payload(wrb); | ||
381 | 405 | ||
382 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 406 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
383 | 407 | ||
@@ -388,27 +412,32 @@ int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr, | |||
388 | if (permanent) { | 412 | if (permanent) { |
389 | req->permanent = 1; | 413 | req->permanent = 1; |
390 | } else { | 414 | } else { |
391 | req->if_id = cpu_to_le16((u16)if_handle); | 415 | req->if_id = cpu_to_le16((u16) if_handle); |
392 | req->permanent = 0; | 416 | req->permanent = 0; |
393 | } | 417 | } |
394 | 418 | ||
395 | status = be_mbox_notify(adapter); | 419 | status = be_mbox_notify_wait(adapter); |
396 | if (!status) | 420 | if (!status) { |
421 | struct be_cmd_resp_mac_query *resp = embedded_payload(wrb); | ||
397 | memcpy(mac_addr, resp->mac.addr, ETH_ALEN); | 422 | memcpy(mac_addr, resp->mac.addr, ETH_ALEN); |
423 | } | ||
398 | 424 | ||
399 | spin_unlock(&adapter->mbox_lock); | 425 | spin_unlock(&adapter->mbox_lock); |
400 | return status; | 426 | return status; |
401 | } | 427 | } |
402 | 428 | ||
429 | /* Uses synchronous MCCQ */ | ||
403 | int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, | 430 | int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, |
404 | u32 if_id, u32 *pmac_id) | 431 | u32 if_id, u32 *pmac_id) |
405 | { | 432 | { |
406 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 433 | struct be_mcc_wrb *wrb; |
407 | struct be_cmd_req_pmac_add *req = embedded_payload(wrb); | 434 | struct be_cmd_req_pmac_add *req; |
408 | int status; | 435 | int status; |
409 | 436 | ||
410 | spin_lock(&adapter->mbox_lock); | 437 | spin_lock_bh(&adapter->mcc_lock); |
411 | memset(wrb, 0, sizeof(*wrb)); | 438 | |
439 | wrb = wrb_from_mccq(adapter); | ||
440 | req = embedded_payload(wrb); | ||
412 | 441 | ||
413 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 442 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
414 | 443 | ||
@@ -418,24 +447,27 @@ int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, | |||
418 | req->if_id = cpu_to_le32(if_id); | 447 | req->if_id = cpu_to_le32(if_id); |
419 | memcpy(req->mac_address, mac_addr, ETH_ALEN); | 448 | memcpy(req->mac_address, mac_addr, ETH_ALEN); |
420 | 449 | ||
421 | status = be_mbox_notify(adapter); | 450 | status = be_mcc_notify_wait(adapter); |
422 | if (!status) { | 451 | if (!status) { |
423 | struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); | 452 | struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb); |
424 | *pmac_id = le32_to_cpu(resp->pmac_id); | 453 | *pmac_id = le32_to_cpu(resp->pmac_id); |
425 | } | 454 | } |
426 | 455 | ||
427 | spin_unlock(&adapter->mbox_lock); | 456 | spin_unlock_bh(&adapter->mcc_lock); |
428 | return status; | 457 | return status; |
429 | } | 458 | } |
430 | 459 | ||
460 | /* Uses synchronous MCCQ */ | ||
431 | int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) | 461 | int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) |
432 | { | 462 | { |
433 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 463 | struct be_mcc_wrb *wrb; |
434 | struct be_cmd_req_pmac_del *req = embedded_payload(wrb); | 464 | struct be_cmd_req_pmac_del *req; |
435 | int status; | 465 | int status; |
436 | 466 | ||
437 | spin_lock(&adapter->mbox_lock); | 467 | spin_lock_bh(&adapter->mcc_lock); |
438 | memset(wrb, 0, sizeof(*wrb)); | 468 | |
469 | wrb = wrb_from_mccq(adapter); | ||
470 | req = embedded_payload(wrb); | ||
439 | 471 | ||
440 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 472 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
441 | 473 | ||
@@ -445,25 +477,29 @@ int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id) | |||
445 | req->if_id = cpu_to_le32(if_id); | 477 | req->if_id = cpu_to_le32(if_id); |
446 | req->pmac_id = cpu_to_le32(pmac_id); | 478 | req->pmac_id = cpu_to_le32(pmac_id); |
447 | 479 | ||
448 | status = be_mbox_notify(adapter); | 480 | status = be_mcc_notify_wait(adapter); |
449 | spin_unlock(&adapter->mbox_lock); | 481 | |
482 | spin_unlock_bh(&adapter->mcc_lock); | ||
450 | 483 | ||
451 | return status; | 484 | return status; |
452 | } | 485 | } |
453 | 486 | ||
487 | /* Uses Mbox */ | ||
454 | int be_cmd_cq_create(struct be_adapter *adapter, | 488 | int be_cmd_cq_create(struct be_adapter *adapter, |
455 | struct be_queue_info *cq, struct be_queue_info *eq, | 489 | struct be_queue_info *cq, struct be_queue_info *eq, |
456 | bool sol_evts, bool no_delay, int coalesce_wm) | 490 | bool sol_evts, bool no_delay, int coalesce_wm) |
457 | { | 491 | { |
458 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 492 | struct be_mcc_wrb *wrb; |
459 | struct be_cmd_req_cq_create *req = embedded_payload(wrb); | 493 | struct be_cmd_req_cq_create *req; |
460 | struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); | ||
461 | struct be_dma_mem *q_mem = &cq->dma_mem; | 494 | struct be_dma_mem *q_mem = &cq->dma_mem; |
462 | void *ctxt = &req->context; | 495 | void *ctxt; |
463 | int status; | 496 | int status; |
464 | 497 | ||
465 | spin_lock(&adapter->mbox_lock); | 498 | spin_lock(&adapter->mbox_lock); |
466 | memset(wrb, 0, sizeof(*wrb)); | 499 | |
500 | wrb = wrb_from_mbox(adapter); | ||
501 | req = embedded_payload(wrb); | ||
502 | ctxt = &req->context; | ||
467 | 503 | ||
468 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 504 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
469 | 505 | ||
@@ -486,11 +522,13 @@ int be_cmd_cq_create(struct be_adapter *adapter, | |||
486 | 522 | ||
487 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 523 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
488 | 524 | ||
489 | status = be_mbox_notify(adapter); | 525 | status = be_mbox_notify_wait(adapter); |
490 | if (!status) { | 526 | if (!status) { |
527 | struct be_cmd_resp_cq_create *resp = embedded_payload(wrb); | ||
491 | cq->id = le16_to_cpu(resp->cq_id); | 528 | cq->id = le16_to_cpu(resp->cq_id); |
492 | cq->created = true; | 529 | cq->created = true; |
493 | } | 530 | } |
531 | |||
494 | spin_unlock(&adapter->mbox_lock); | 532 | spin_unlock(&adapter->mbox_lock); |
495 | 533 | ||
496 | return status; | 534 | return status; |
@@ -508,14 +546,17 @@ int be_cmd_mccq_create(struct be_adapter *adapter, | |||
508 | struct be_queue_info *mccq, | 546 | struct be_queue_info *mccq, |
509 | struct be_queue_info *cq) | 547 | struct be_queue_info *cq) |
510 | { | 548 | { |
511 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 549 | struct be_mcc_wrb *wrb; |
512 | struct be_cmd_req_mcc_create *req = embedded_payload(wrb); | 550 | struct be_cmd_req_mcc_create *req; |
513 | struct be_dma_mem *q_mem = &mccq->dma_mem; | 551 | struct be_dma_mem *q_mem = &mccq->dma_mem; |
514 | void *ctxt = &req->context; | 552 | void *ctxt; |
515 | int status; | 553 | int status; |
516 | 554 | ||
517 | spin_lock(&adapter->mbox_lock); | 555 | spin_lock(&adapter->mbox_lock); |
518 | memset(wrb, 0, sizeof(*wrb)); | 556 | |
557 | wrb = wrb_from_mbox(adapter); | ||
558 | req = embedded_payload(wrb); | ||
559 | ctxt = &req->context; | ||
519 | 560 | ||
520 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 561 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
521 | 562 | ||
@@ -534,7 +575,7 @@ int be_cmd_mccq_create(struct be_adapter *adapter, | |||
534 | 575 | ||
535 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 576 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
536 | 577 | ||
537 | status = be_mbox_notify(adapter); | 578 | status = be_mbox_notify_wait(adapter); |
538 | if (!status) { | 579 | if (!status) { |
539 | struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); | 580 | struct be_cmd_resp_mcc_create *resp = embedded_payload(wrb); |
540 | mccq->id = le16_to_cpu(resp->id); | 581 | mccq->id = le16_to_cpu(resp->id); |
@@ -549,15 +590,17 @@ int be_cmd_txq_create(struct be_adapter *adapter, | |||
549 | struct be_queue_info *txq, | 590 | struct be_queue_info *txq, |
550 | struct be_queue_info *cq) | 591 | struct be_queue_info *cq) |
551 | { | 592 | { |
552 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 593 | struct be_mcc_wrb *wrb; |
553 | struct be_cmd_req_eth_tx_create *req = embedded_payload(wrb); | 594 | struct be_cmd_req_eth_tx_create *req; |
554 | struct be_dma_mem *q_mem = &txq->dma_mem; | 595 | struct be_dma_mem *q_mem = &txq->dma_mem; |
555 | void *ctxt = &req->context; | 596 | void *ctxt; |
556 | int status; | 597 | int status; |
557 | u32 len_encoded; | ||
558 | 598 | ||
559 | spin_lock(&adapter->mbox_lock); | 599 | spin_lock(&adapter->mbox_lock); |
560 | memset(wrb, 0, sizeof(*wrb)); | 600 | |
601 | wrb = wrb_from_mbox(adapter); | ||
602 | req = embedded_payload(wrb); | ||
603 | ctxt = &req->context; | ||
561 | 604 | ||
562 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 605 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
563 | 606 | ||
@@ -568,10 +611,8 @@ int be_cmd_txq_create(struct be_adapter *adapter, | |||
568 | req->ulp_num = BE_ULP1_NUM; | 611 | req->ulp_num = BE_ULP1_NUM; |
569 | req->type = BE_ETH_TX_RING_TYPE_STANDARD; | 612 | req->type = BE_ETH_TX_RING_TYPE_STANDARD; |
570 | 613 | ||
571 | len_encoded = fls(txq->len); /* log2(len) + 1 */ | 614 | AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, |
572 | if (len_encoded == 16) | 615 | be_encoded_q_len(txq->len)); |
573 | len_encoded = 0; | ||
574 | AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded); | ||
575 | AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, | 616 | AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt, |
576 | be_pci_func(adapter)); | 617 | be_pci_func(adapter)); |
577 | AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); | 618 | AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1); |
@@ -581,28 +622,32 @@ int be_cmd_txq_create(struct be_adapter *adapter, | |||
581 | 622 | ||
582 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); | 623 | be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem); |
583 | 624 | ||
584 | status = be_mbox_notify(adapter); | 625 | status = be_mbox_notify_wait(adapter); |
585 | if (!status) { | 626 | if (!status) { |
586 | struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); | 627 | struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb); |
587 | txq->id = le16_to_cpu(resp->cid); | 628 | txq->id = le16_to_cpu(resp->cid); |
588 | txq->created = true; | 629 | txq->created = true; |
589 | } | 630 | } |
631 | |||
590 | spin_unlock(&adapter->mbox_lock); | 632 | spin_unlock(&adapter->mbox_lock); |
591 | 633 | ||
592 | return status; | 634 | return status; |
593 | } | 635 | } |
594 | 636 | ||
637 | /* Uses mbox */ | ||
595 | int be_cmd_rxq_create(struct be_adapter *adapter, | 638 | int be_cmd_rxq_create(struct be_adapter *adapter, |
596 | struct be_queue_info *rxq, u16 cq_id, u16 frag_size, | 639 | struct be_queue_info *rxq, u16 cq_id, u16 frag_size, |
597 | u16 max_frame_size, u32 if_id, u32 rss) | 640 | u16 max_frame_size, u32 if_id, u32 rss) |
598 | { | 641 | { |
599 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 642 | struct be_mcc_wrb *wrb; |
600 | struct be_cmd_req_eth_rx_create *req = embedded_payload(wrb); | 643 | struct be_cmd_req_eth_rx_create *req; |
601 | struct be_dma_mem *q_mem = &rxq->dma_mem; | 644 | struct be_dma_mem *q_mem = &rxq->dma_mem; |
602 | int status; | 645 | int status; |
603 | 646 | ||
604 | spin_lock(&adapter->mbox_lock); | 647 | spin_lock(&adapter->mbox_lock); |
605 | memset(wrb, 0, sizeof(*wrb)); | 648 | |
649 | wrb = wrb_from_mbox(adapter); | ||
650 | req = embedded_payload(wrb); | ||
606 | 651 | ||
607 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 652 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
608 | 653 | ||
@@ -617,29 +662,34 @@ int be_cmd_rxq_create(struct be_adapter *adapter, | |||
617 | req->max_frame_size = cpu_to_le16(max_frame_size); | 662 | req->max_frame_size = cpu_to_le16(max_frame_size); |
618 | req->rss_queue = cpu_to_le32(rss); | 663 | req->rss_queue = cpu_to_le32(rss); |
619 | 664 | ||
620 | status = be_mbox_notify(adapter); | 665 | status = be_mbox_notify_wait(adapter); |
621 | if (!status) { | 666 | if (!status) { |
622 | struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); | 667 | struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb); |
623 | rxq->id = le16_to_cpu(resp->id); | 668 | rxq->id = le16_to_cpu(resp->id); |
624 | rxq->created = true; | 669 | rxq->created = true; |
625 | } | 670 | } |
671 | |||
626 | spin_unlock(&adapter->mbox_lock); | 672 | spin_unlock(&adapter->mbox_lock); |
627 | 673 | ||
628 | return status; | 674 | return status; |
629 | } | 675 | } |
630 | 676 | ||
631 | /* Generic destroyer function for all types of queues */ | 677 | /* Generic destroyer function for all types of queues |
678 | * Uses Mbox | ||
679 | */ | ||
632 | int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, | 680 | int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, |
633 | int queue_type) | 681 | int queue_type) |
634 | { | 682 | { |
635 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 683 | struct be_mcc_wrb *wrb; |
636 | struct be_cmd_req_q_destroy *req = embedded_payload(wrb); | 684 | struct be_cmd_req_q_destroy *req; |
637 | u8 subsys = 0, opcode = 0; | 685 | u8 subsys = 0, opcode = 0; |
638 | int status; | 686 | int status; |
639 | 687 | ||
640 | spin_lock(&adapter->mbox_lock); | 688 | spin_lock(&adapter->mbox_lock); |
641 | 689 | ||
642 | memset(wrb, 0, sizeof(*wrb)); | 690 | wrb = wrb_from_mbox(adapter); |
691 | req = embedded_payload(wrb); | ||
692 | |||
643 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 693 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
644 | 694 | ||
645 | switch (queue_type) { | 695 | switch (queue_type) { |
@@ -669,23 +719,27 @@ int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q, | |||
669 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); | 719 | be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req)); |
670 | req->id = cpu_to_le16(q->id); | 720 | req->id = cpu_to_le16(q->id); |
671 | 721 | ||
672 | status = be_mbox_notify(adapter); | 722 | status = be_mbox_notify_wait(adapter); |
673 | 723 | ||
674 | spin_unlock(&adapter->mbox_lock); | 724 | spin_unlock(&adapter->mbox_lock); |
675 | 725 | ||
676 | return status; | 726 | return status; |
677 | } | 727 | } |
678 | 728 | ||
679 | /* Create an rx filtering policy configuration on an i/f */ | 729 | /* Create an rx filtering policy configuration on an i/f |
730 | * Uses mbox | ||
731 | */ | ||
680 | int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, | 732 | int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, |
681 | bool pmac_invalid, u32 *if_handle, u32 *pmac_id) | 733 | bool pmac_invalid, u32 *if_handle, u32 *pmac_id) |
682 | { | 734 | { |
683 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 735 | struct be_mcc_wrb *wrb; |
684 | struct be_cmd_req_if_create *req = embedded_payload(wrb); | 736 | struct be_cmd_req_if_create *req; |
685 | int status; | 737 | int status; |
686 | 738 | ||
687 | spin_lock(&adapter->mbox_lock); | 739 | spin_lock(&adapter->mbox_lock); |
688 | memset(wrb, 0, sizeof(*wrb)); | 740 | |
741 | wrb = wrb_from_mbox(adapter); | ||
742 | req = embedded_payload(wrb); | ||
689 | 743 | ||
690 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 744 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
691 | 745 | ||
@@ -694,10 +748,11 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, | |||
694 | 748 | ||
695 | req->capability_flags = cpu_to_le32(flags); | 749 | req->capability_flags = cpu_to_le32(flags); |
696 | req->enable_flags = cpu_to_le32(flags); | 750 | req->enable_flags = cpu_to_le32(flags); |
751 | req->pmac_invalid = pmac_invalid; | ||
697 | if (!pmac_invalid) | 752 | if (!pmac_invalid) |
698 | memcpy(req->mac_addr, mac, ETH_ALEN); | 753 | memcpy(req->mac_addr, mac, ETH_ALEN); |
699 | 754 | ||
700 | status = be_mbox_notify(adapter); | 755 | status = be_mbox_notify_wait(adapter); |
701 | if (!status) { | 756 | if (!status) { |
702 | struct be_cmd_resp_if_create *resp = embedded_payload(wrb); | 757 | struct be_cmd_resp_if_create *resp = embedded_payload(wrb); |
703 | *if_handle = le32_to_cpu(resp->interface_id); | 758 | *if_handle = le32_to_cpu(resp->interface_id); |
@@ -709,14 +764,17 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, | |||
709 | return status; | 764 | return status; |
710 | } | 765 | } |
711 | 766 | ||
767 | /* Uses mbox */ | ||
712 | int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) | 768 | int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) |
713 | { | 769 | { |
714 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 770 | struct be_mcc_wrb *wrb; |
715 | struct be_cmd_req_if_destroy *req = embedded_payload(wrb); | 771 | struct be_cmd_req_if_destroy *req; |
716 | int status; | 772 | int status; |
717 | 773 | ||
718 | spin_lock(&adapter->mbox_lock); | 774 | spin_lock(&adapter->mbox_lock); |
719 | memset(wrb, 0, sizeof(*wrb)); | 775 | |
776 | wrb = wrb_from_mbox(adapter); | ||
777 | req = embedded_payload(wrb); | ||
720 | 778 | ||
721 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 779 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
722 | 780 | ||
@@ -724,7 +782,8 @@ int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) | |||
724 | OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req)); | 782 | OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req)); |
725 | 783 | ||
726 | req->interface_id = cpu_to_le32(interface_id); | 784 | req->interface_id = cpu_to_le32(interface_id); |
727 | status = be_mbox_notify(adapter); | 785 | |
786 | status = be_mbox_notify_wait(adapter); | ||
728 | 787 | ||
729 | spin_unlock(&adapter->mbox_lock); | 788 | spin_unlock(&adapter->mbox_lock); |
730 | 789 | ||
@@ -733,20 +792,22 @@ int be_cmd_if_destroy(struct be_adapter *adapter, u32 interface_id) | |||
733 | 792 | ||
734 | /* Get stats is a non embedded command: the request is not embedded inside | 793 | /* Get stats is a non embedded command: the request is not embedded inside |
735 | * WRB but is a separate dma memory block | 794 | * WRB but is a separate dma memory block |
795 | * Uses asynchronous MCC | ||
736 | */ | 796 | */ |
737 | int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) | 797 | int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) |
738 | { | 798 | { |
739 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 799 | struct be_mcc_wrb *wrb; |
740 | struct be_cmd_req_get_stats *req = nonemb_cmd->va; | 800 | struct be_cmd_req_get_stats *req; |
741 | struct be_sge *sge = nonembedded_sgl(wrb); | 801 | struct be_sge *sge; |
742 | int status; | ||
743 | 802 | ||
744 | spin_lock(&adapter->mbox_lock); | 803 | spin_lock_bh(&adapter->mcc_lock); |
745 | memset(wrb, 0, sizeof(*wrb)); | ||
746 | 804 | ||
747 | memset(req, 0, sizeof(*req)); | 805 | wrb = wrb_from_mccq(adapter); |
806 | req = nonemb_cmd->va; | ||
807 | sge = nonembedded_sgl(wrb); | ||
748 | 808 | ||
749 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1); | 809 | be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1); |
810 | wrb->tag0 = OPCODE_ETH_GET_STATISTICS; | ||
750 | 811 | ||
751 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, | 812 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, |
752 | OPCODE_ETH_GET_STATISTICS, sizeof(*req)); | 813 | OPCODE_ETH_GET_STATISTICS, sizeof(*req)); |
@@ -754,59 +815,61 @@ int be_cmd_get_stats(struct be_adapter *adapter, struct be_dma_mem *nonemb_cmd) | |||
754 | sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF); | 815 | sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF); |
755 | sge->len = cpu_to_le32(nonemb_cmd->size); | 816 | sge->len = cpu_to_le32(nonemb_cmd->size); |
756 | 817 | ||
757 | status = be_mbox_notify(adapter); | 818 | be_mcc_notify(adapter); |
758 | if (!status) { | ||
759 | struct be_cmd_resp_get_stats *resp = nonemb_cmd->va; | ||
760 | be_dws_le_to_cpu(&resp->hw_stats, sizeof(resp->hw_stats)); | ||
761 | } | ||
762 | 819 | ||
763 | spin_unlock(&adapter->mbox_lock); | 820 | spin_unlock_bh(&adapter->mcc_lock); |
764 | return status; | 821 | return 0; |
765 | } | 822 | } |
766 | 823 | ||
824 | /* Uses synchronous mcc */ | ||
767 | int be_cmd_link_status_query(struct be_adapter *adapter, | 825 | int be_cmd_link_status_query(struct be_adapter *adapter, |
768 | bool *link_up) | 826 | bool *link_up) |
769 | { | 827 | { |
770 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 828 | struct be_mcc_wrb *wrb; |
771 | struct be_cmd_req_link_status *req = embedded_payload(wrb); | 829 | struct be_cmd_req_link_status *req; |
772 | int status; | 830 | int status; |
773 | 831 | ||
774 | spin_lock(&adapter->mbox_lock); | 832 | spin_lock_bh(&adapter->mcc_lock); |
833 | |||
834 | wrb = wrb_from_mccq(adapter); | ||
835 | req = embedded_payload(wrb); | ||
775 | 836 | ||
776 | *link_up = false; | 837 | *link_up = false; |
777 | memset(wrb, 0, sizeof(*wrb)); | ||
778 | 838 | ||
779 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 839 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
780 | 840 | ||
781 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 841 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
782 | OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req)); | 842 | OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req)); |
783 | 843 | ||
784 | status = be_mbox_notify(adapter); | 844 | status = be_mcc_notify_wait(adapter); |
785 | if (!status) { | 845 | if (!status) { |
786 | struct be_cmd_resp_link_status *resp = embedded_payload(wrb); | 846 | struct be_cmd_resp_link_status *resp = embedded_payload(wrb); |
787 | if (resp->mac_speed != PHY_LINK_SPEED_ZERO) | 847 | if (resp->mac_speed != PHY_LINK_SPEED_ZERO) |
788 | *link_up = true; | 848 | *link_up = true; |
789 | } | 849 | } |
790 | 850 | ||
791 | spin_unlock(&adapter->mbox_lock); | 851 | spin_unlock_bh(&adapter->mcc_lock); |
792 | return status; | 852 | return status; |
793 | } | 853 | } |
794 | 854 | ||
855 | /* Uses Mbox */ | ||
795 | int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) | 856 | int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) |
796 | { | 857 | { |
797 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 858 | struct be_mcc_wrb *wrb; |
798 | struct be_cmd_req_get_fw_version *req = embedded_payload(wrb); | 859 | struct be_cmd_req_get_fw_version *req; |
799 | int status; | 860 | int status; |
800 | 861 | ||
801 | spin_lock(&adapter->mbox_lock); | 862 | spin_lock(&adapter->mbox_lock); |
802 | memset(wrb, 0, sizeof(*wrb)); | 863 | |
864 | wrb = wrb_from_mbox(adapter); | ||
865 | req = embedded_payload(wrb); | ||
803 | 866 | ||
804 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 867 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
805 | 868 | ||
806 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 869 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
807 | OPCODE_COMMON_GET_FW_VERSION, sizeof(*req)); | 870 | OPCODE_COMMON_GET_FW_VERSION, sizeof(*req)); |
808 | 871 | ||
809 | status = be_mbox_notify(adapter); | 872 | status = be_mbox_notify_wait(adapter); |
810 | if (!status) { | 873 | if (!status) { |
811 | struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); | 874 | struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb); |
812 | strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN); | 875 | strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN); |
@@ -816,15 +879,18 @@ int be_cmd_get_fw_ver(struct be_adapter *adapter, char *fw_ver) | |||
816 | return status; | 879 | return status; |
817 | } | 880 | } |
818 | 881 | ||
819 | /* set the EQ delay interval of an EQ to specified value */ | 882 | /* set the EQ delay interval of an EQ to specified value |
883 | * Uses async mcc | ||
884 | */ | ||
820 | int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) | 885 | int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) |
821 | { | 886 | { |
822 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 887 | struct be_mcc_wrb *wrb; |
823 | struct be_cmd_req_modify_eq_delay *req = embedded_payload(wrb); | 888 | struct be_cmd_req_modify_eq_delay *req; |
824 | int status; | ||
825 | 889 | ||
826 | spin_lock(&adapter->mbox_lock); | 890 | spin_lock_bh(&adapter->mcc_lock); |
827 | memset(wrb, 0, sizeof(*wrb)); | 891 | |
892 | wrb = wrb_from_mccq(adapter); | ||
893 | req = embedded_payload(wrb); | ||
828 | 894 | ||
829 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 895 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
830 | 896 | ||
@@ -836,21 +902,24 @@ int be_cmd_modify_eqd(struct be_adapter *adapter, u32 eq_id, u32 eqd) | |||
836 | req->delay[0].phase = 0; | 902 | req->delay[0].phase = 0; |
837 | req->delay[0].delay_multiplier = cpu_to_le32(eqd); | 903 | req->delay[0].delay_multiplier = cpu_to_le32(eqd); |
838 | 904 | ||
839 | status = be_mbox_notify(adapter); | 905 | be_mcc_notify(adapter); |
840 | 906 | ||
841 | spin_unlock(&adapter->mbox_lock); | 907 | spin_unlock_bh(&adapter->mcc_lock); |
842 | return status; | 908 | return 0; |
843 | } | 909 | } |
844 | 910 | ||
911 | /* Uses sycnhronous mcc */ | ||
845 | int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, | 912 | int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, |
846 | u32 num, bool untagged, bool promiscuous) | 913 | u32 num, bool untagged, bool promiscuous) |
847 | { | 914 | { |
848 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 915 | struct be_mcc_wrb *wrb; |
849 | struct be_cmd_req_vlan_config *req = embedded_payload(wrb); | 916 | struct be_cmd_req_vlan_config *req; |
850 | int status; | 917 | int status; |
851 | 918 | ||
852 | spin_lock(&adapter->mbox_lock); | 919 | spin_lock_bh(&adapter->mcc_lock); |
853 | memset(wrb, 0, sizeof(*wrb)); | 920 | |
921 | wrb = wrb_from_mccq(adapter); | ||
922 | req = embedded_payload(wrb); | ||
854 | 923 | ||
855 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 924 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
856 | 925 | ||
@@ -866,23 +935,24 @@ int be_cmd_vlan_config(struct be_adapter *adapter, u32 if_id, u16 *vtag_array, | |||
866 | req->num_vlan * sizeof(vtag_array[0])); | 935 | req->num_vlan * sizeof(vtag_array[0])); |
867 | } | 936 | } |
868 | 937 | ||
869 | status = be_mbox_notify(adapter); | 938 | status = be_mcc_notify_wait(adapter); |
870 | 939 | ||
871 | spin_unlock(&adapter->mbox_lock); | 940 | spin_unlock_bh(&adapter->mcc_lock); |
872 | return status; | 941 | return status; |
873 | } | 942 | } |
874 | 943 | ||
875 | /* Use MCC for this command as it may be called in BH context */ | 944 | /* Uses MCC for this command as it may be called in BH context |
945 | * Uses synchronous mcc | ||
946 | */ | ||
876 | int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) | 947 | int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) |
877 | { | 948 | { |
878 | struct be_mcc_wrb *wrb; | 949 | struct be_mcc_wrb *wrb; |
879 | struct be_cmd_req_promiscuous_config *req; | 950 | struct be_cmd_req_promiscuous_config *req; |
951 | int status; | ||
880 | 952 | ||
881 | spin_lock_bh(&adapter->mcc_lock); | 953 | spin_lock_bh(&adapter->mcc_lock); |
882 | 954 | ||
883 | wrb = wrb_from_mcc(&adapter->mcc_obj.q); | 955 | wrb = wrb_from_mccq(adapter); |
884 | BUG_ON(!wrb); | ||
885 | |||
886 | req = embedded_payload(wrb); | 956 | req = embedded_payload(wrb); |
887 | 957 | ||
888 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 958 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
@@ -895,14 +965,14 @@ int be_cmd_promiscuous_config(struct be_adapter *adapter, u8 port_num, bool en) | |||
895 | else | 965 | else |
896 | req->port0_promiscuous = en; | 966 | req->port0_promiscuous = en; |
897 | 967 | ||
898 | be_mcc_notify_wait(adapter); | 968 | status = be_mcc_notify_wait(adapter); |
899 | 969 | ||
900 | spin_unlock_bh(&adapter->mcc_lock); | 970 | spin_unlock_bh(&adapter->mcc_lock); |
901 | return 0; | 971 | return status; |
902 | } | 972 | } |
903 | 973 | ||
904 | /* | 974 | /* |
905 | * Use MCC for this command as it may be called in BH context | 975 | * Uses MCC for this command as it may be called in BH context |
906 | * (mc == NULL) => multicast promiscous | 976 | * (mc == NULL) => multicast promiscous |
907 | */ | 977 | */ |
908 | int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, | 978 | int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, |
@@ -914,9 +984,7 @@ int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, | |||
914 | 984 | ||
915 | spin_lock_bh(&adapter->mcc_lock); | 985 | spin_lock_bh(&adapter->mcc_lock); |
916 | 986 | ||
917 | wrb = wrb_from_mcc(&adapter->mcc_obj.q); | 987 | wrb = wrb_from_mccq(adapter); |
918 | BUG_ON(!wrb); | ||
919 | |||
920 | req = embedded_payload(wrb); | 988 | req = embedded_payload(wrb); |
921 | 989 | ||
922 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 990 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
@@ -944,15 +1012,17 @@ int be_cmd_multicast_set(struct be_adapter *adapter, u32 if_id, | |||
944 | return 0; | 1012 | return 0; |
945 | } | 1013 | } |
946 | 1014 | ||
1015 | /* Uses synchrounous mcc */ | ||
947 | int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) | 1016 | int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) |
948 | { | 1017 | { |
949 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1018 | struct be_mcc_wrb *wrb; |
950 | struct be_cmd_req_set_flow_control *req = embedded_payload(wrb); | 1019 | struct be_cmd_req_set_flow_control *req; |
951 | int status; | 1020 | int status; |
952 | 1021 | ||
953 | spin_lock(&adapter->mbox_lock); | 1022 | spin_lock_bh(&adapter->mcc_lock); |
954 | 1023 | ||
955 | memset(wrb, 0, sizeof(*wrb)); | 1024 | wrb = wrb_from_mccq(adapter); |
1025 | req = embedded_payload(wrb); | ||
956 | 1026 | ||
957 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1027 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
958 | 1028 | ||
@@ -962,28 +1032,30 @@ int be_cmd_set_flow_control(struct be_adapter *adapter, u32 tx_fc, u32 rx_fc) | |||
962 | req->tx_flow_control = cpu_to_le16((u16)tx_fc); | 1032 | req->tx_flow_control = cpu_to_le16((u16)tx_fc); |
963 | req->rx_flow_control = cpu_to_le16((u16)rx_fc); | 1033 | req->rx_flow_control = cpu_to_le16((u16)rx_fc); |
964 | 1034 | ||
965 | status = be_mbox_notify(adapter); | 1035 | status = be_mcc_notify_wait(adapter); |
966 | 1036 | ||
967 | spin_unlock(&adapter->mbox_lock); | 1037 | spin_unlock_bh(&adapter->mcc_lock); |
968 | return status; | 1038 | return status; |
969 | } | 1039 | } |
970 | 1040 | ||
1041 | /* Uses sycn mcc */ | ||
971 | int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) | 1042 | int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) |
972 | { | 1043 | { |
973 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1044 | struct be_mcc_wrb *wrb; |
974 | struct be_cmd_req_get_flow_control *req = embedded_payload(wrb); | 1045 | struct be_cmd_req_get_flow_control *req; |
975 | int status; | 1046 | int status; |
976 | 1047 | ||
977 | spin_lock(&adapter->mbox_lock); | 1048 | spin_lock_bh(&adapter->mcc_lock); |
978 | 1049 | ||
979 | memset(wrb, 0, sizeof(*wrb)); | 1050 | wrb = wrb_from_mccq(adapter); |
1051 | req = embedded_payload(wrb); | ||
980 | 1052 | ||
981 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1053 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
982 | 1054 | ||
983 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 1055 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
984 | OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req)); | 1056 | OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req)); |
985 | 1057 | ||
986 | status = be_mbox_notify(adapter); | 1058 | status = be_mcc_notify_wait(adapter); |
987 | if (!status) { | 1059 | if (!status) { |
988 | struct be_cmd_resp_get_flow_control *resp = | 1060 | struct be_cmd_resp_get_flow_control *resp = |
989 | embedded_payload(wrb); | 1061 | embedded_payload(wrb); |
@@ -991,26 +1063,28 @@ int be_cmd_get_flow_control(struct be_adapter *adapter, u32 *tx_fc, u32 *rx_fc) | |||
991 | *rx_fc = le16_to_cpu(resp->rx_flow_control); | 1063 | *rx_fc = le16_to_cpu(resp->rx_flow_control); |
992 | } | 1064 | } |
993 | 1065 | ||
994 | spin_unlock(&adapter->mbox_lock); | 1066 | spin_unlock_bh(&adapter->mcc_lock); |
995 | return status; | 1067 | return status; |
996 | } | 1068 | } |
997 | 1069 | ||
1070 | /* Uses mbox */ | ||
998 | int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num) | 1071 | int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num) |
999 | { | 1072 | { |
1000 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1073 | struct be_mcc_wrb *wrb; |
1001 | struct be_cmd_req_query_fw_cfg *req = embedded_payload(wrb); | 1074 | struct be_cmd_req_query_fw_cfg *req; |
1002 | int status; | 1075 | int status; |
1003 | 1076 | ||
1004 | spin_lock(&adapter->mbox_lock); | 1077 | spin_lock(&adapter->mbox_lock); |
1005 | 1078 | ||
1006 | memset(wrb, 0, sizeof(*wrb)); | 1079 | wrb = wrb_from_mbox(adapter); |
1080 | req = embedded_payload(wrb); | ||
1007 | 1081 | ||
1008 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1082 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
1009 | 1083 | ||
1010 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 1084 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
1011 | OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req)); | 1085 | OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req)); |
1012 | 1086 | ||
1013 | status = be_mbox_notify(adapter); | 1087 | status = be_mbox_notify_wait(adapter); |
1014 | if (!status) { | 1088 | if (!status) { |
1015 | struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); | 1089 | struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb); |
1016 | *port_num = le32_to_cpu(resp->phys_port); | 1090 | *port_num = le32_to_cpu(resp->phys_port); |
@@ -1020,22 +1094,24 @@ int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num) | |||
1020 | return status; | 1094 | return status; |
1021 | } | 1095 | } |
1022 | 1096 | ||
1097 | /* Uses mbox */ | ||
1023 | int be_cmd_reset_function(struct be_adapter *adapter) | 1098 | int be_cmd_reset_function(struct be_adapter *adapter) |
1024 | { | 1099 | { |
1025 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1100 | struct be_mcc_wrb *wrb; |
1026 | struct be_cmd_req_hdr *req = embedded_payload(wrb); | 1101 | struct be_cmd_req_hdr *req; |
1027 | int status; | 1102 | int status; |
1028 | 1103 | ||
1029 | spin_lock(&adapter->mbox_lock); | 1104 | spin_lock(&adapter->mbox_lock); |
1030 | 1105 | ||
1031 | memset(wrb, 0, sizeof(*wrb)); | 1106 | wrb = wrb_from_mbox(adapter); |
1107 | req = embedded_payload(wrb); | ||
1032 | 1108 | ||
1033 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); | 1109 | be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0); |
1034 | 1110 | ||
1035 | be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, | 1111 | be_cmd_hdr_prepare(req, CMD_SUBSYSTEM_COMMON, |
1036 | OPCODE_COMMON_FUNCTION_RESET, sizeof(*req)); | 1112 | OPCODE_COMMON_FUNCTION_RESET, sizeof(*req)); |
1037 | 1113 | ||
1038 | status = be_mbox_notify(adapter); | 1114 | status = be_mbox_notify_wait(adapter); |
1039 | 1115 | ||
1040 | spin_unlock(&adapter->mbox_lock); | 1116 | spin_unlock(&adapter->mbox_lock); |
1041 | return status; | 1117 | return status; |
@@ -1044,13 +1120,17 @@ int be_cmd_reset_function(struct be_adapter *adapter) | |||
1044 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, | 1120 | int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, |
1045 | u32 flash_type, u32 flash_opcode, u32 buf_size) | 1121 | u32 flash_type, u32 flash_opcode, u32 buf_size) |
1046 | { | 1122 | { |
1047 | struct be_mcc_wrb *wrb = wrb_from_mbox(&adapter->mbox_mem); | 1123 | struct be_mcc_wrb *wrb; |
1048 | struct be_cmd_write_flashrom *req = cmd->va; | 1124 | struct be_cmd_write_flashrom *req = cmd->va; |
1049 | struct be_sge *sge = nonembedded_sgl(wrb); | 1125 | struct be_sge *sge; |
1050 | int status; | 1126 | int status; |
1051 | 1127 | ||
1052 | spin_lock(&adapter->mbox_lock); | 1128 | spin_lock_bh(&adapter->mcc_lock); |
1053 | memset(wrb, 0, sizeof(*wrb)); | 1129 | |
1130 | wrb = wrb_from_mccq(adapter); | ||
1131 | req = embedded_payload(wrb); | ||
1132 | sge = nonembedded_sgl(wrb); | ||
1133 | |||
1054 | be_wrb_hdr_prepare(wrb, cmd->size, false, 1); | 1134 | be_wrb_hdr_prepare(wrb, cmd->size, false, 1); |
1055 | 1135 | ||
1056 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, | 1136 | be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, |
@@ -1063,8 +1143,8 @@ int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd, | |||
1063 | req->params.op_code = cpu_to_le32(flash_opcode); | 1143 | req->params.op_code = cpu_to_le32(flash_opcode); |
1064 | req->params.data_buf_size = cpu_to_le32(buf_size); | 1144 | req->params.data_buf_size = cpu_to_le32(buf_size); |
1065 | 1145 | ||
1066 | status = be_mbox_notify(adapter); | 1146 | status = be_mcc_notify_wait(adapter); |
1067 | 1147 | ||
1068 | spin_unlock(&adapter->mbox_lock); | 1148 | spin_unlock_bh(&adapter->mcc_lock); |
1069 | return status; | 1149 | return status; |
1070 | } | 1150 | } |
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h index fd7028e5b78e..93e432f3d926 100644 --- a/drivers/net/benet/be_cmds.h +++ b/drivers/net/benet/be_cmds.h | |||
@@ -61,7 +61,8 @@ enum { | |||
61 | /* The command is completing because the queue was getting flushed */ | 61 | /* The command is completing because the queue was getting flushed */ |
62 | MCC_STATUS_QUEUE_FLUSHING = 0x4, | 62 | MCC_STATUS_QUEUE_FLUSHING = 0x4, |
63 | /* The command is completing with a DMA error */ | 63 | /* The command is completing with a DMA error */ |
64 | MCC_STATUS_DMA_FAILED = 0x5 | 64 | MCC_STATUS_DMA_FAILED = 0x5, |
65 | MCC_STATUS_NOT_SUPPORTED = 0x66 | ||
65 | }; | 66 | }; |
66 | 67 | ||
67 | #define CQE_STATUS_COMPL_MASK 0xFFFF | 68 | #define CQE_STATUS_COMPL_MASK 0xFFFF |
@@ -761,7 +762,7 @@ extern int be_cmd_get_flow_control(struct be_adapter *adapter, | |||
761 | u32 *tx_fc, u32 *rx_fc); | 762 | u32 *tx_fc, u32 *rx_fc); |
762 | extern int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num); | 763 | extern int be_cmd_query_fw_cfg(struct be_adapter *adapter, u32 *port_num); |
763 | extern int be_cmd_reset_function(struct be_adapter *adapter); | 764 | extern int be_cmd_reset_function(struct be_adapter *adapter); |
764 | extern void be_process_mcc(struct be_adapter *adapter); | 765 | extern int be_process_mcc(struct be_adapter *adapter); |
765 | extern int be_cmd_write_flashrom(struct be_adapter *adapter, | 766 | extern int be_cmd_write_flashrom(struct be_adapter *adapter, |
766 | struct be_dma_mem *cmd, u32 flash_oper, | 767 | struct be_dma_mem *cmd, u32 flash_oper, |
767 | u32 flash_opcode, u32 buf_size); | 768 | u32 flash_opcode, u32 buf_size); |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index ce11bba2cb67..409cf0595903 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -135,7 +135,7 @@ static int be_mac_addr_set(struct net_device *netdev, void *p) | |||
135 | return status; | 135 | return status; |
136 | } | 136 | } |
137 | 137 | ||
138 | static void netdev_stats_update(struct be_adapter *adapter) | 138 | void netdev_stats_update(struct be_adapter *adapter) |
139 | { | 139 | { |
140 | struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va); | 140 | struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va); |
141 | struct be_rxf_stats *rxf_stats = &hw_stats->rxf; | 141 | struct be_rxf_stats *rxf_stats = &hw_stats->rxf; |
@@ -431,8 +431,7 @@ static int make_tx_wrbs(struct be_adapter *adapter, | |||
431 | } | 431 | } |
432 | 432 | ||
433 | static netdev_tx_t be_xmit(struct sk_buff *skb, | 433 | static netdev_tx_t be_xmit(struct sk_buff *skb, |
434 | struct net_device *netdev) | 434 | struct net_device *netdev) |
435 | |||
436 | { | 435 | { |
437 | struct be_adapter *adapter = netdev_priv(netdev); | 436 | struct be_adapter *adapter = netdev_priv(netdev); |
438 | struct be_tx_obj *tx_obj = &adapter->tx_obj; | 437 | struct be_tx_obj *tx_obj = &adapter->tx_obj; |
@@ -490,11 +489,11 @@ static int be_change_mtu(struct net_device *netdev, int new_mtu) | |||
490 | * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured, | 489 | * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured, |
491 | * set the BE in promiscuous VLAN mode. | 490 | * set the BE in promiscuous VLAN mode. |
492 | */ | 491 | */ |
493 | static void be_vid_config(struct net_device *netdev) | 492 | static int be_vid_config(struct be_adapter *adapter) |
494 | { | 493 | { |
495 | struct be_adapter *adapter = netdev_priv(netdev); | ||
496 | u16 vtag[BE_NUM_VLANS_SUPPORTED]; | 494 | u16 vtag[BE_NUM_VLANS_SUPPORTED]; |
497 | u16 ntags = 0, i; | 495 | u16 ntags = 0, i; |
496 | int status; | ||
498 | 497 | ||
499 | if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) { | 498 | if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) { |
500 | /* Construct VLAN Table to give to HW */ | 499 | /* Construct VLAN Table to give to HW */ |
@@ -504,12 +503,13 @@ static void be_vid_config(struct net_device *netdev) | |||
504 | ntags++; | 503 | ntags++; |
505 | } | 504 | } |
506 | } | 505 | } |
507 | be_cmd_vlan_config(adapter, adapter->if_handle, | 506 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
508 | vtag, ntags, 1, 0); | 507 | vtag, ntags, 1, 0); |
509 | } else { | 508 | } else { |
510 | be_cmd_vlan_config(adapter, adapter->if_handle, | 509 | status = be_cmd_vlan_config(adapter, adapter->if_handle, |
511 | NULL, 0, 1, 1); | 510 | NULL, 0, 1, 1); |
512 | } | 511 | } |
512 | return status; | ||
513 | } | 513 | } |
514 | 514 | ||
515 | static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp) | 515 | static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp) |
@@ -532,7 +532,7 @@ static void be_vlan_add_vid(struct net_device *netdev, u16 vid) | |||
532 | adapter->num_vlans++; | 532 | adapter->num_vlans++; |
533 | adapter->vlan_tag[vid] = 1; | 533 | adapter->vlan_tag[vid] = 1; |
534 | 534 | ||
535 | be_vid_config(netdev); | 535 | be_vid_config(adapter); |
536 | } | 536 | } |
537 | 537 | ||
538 | static void be_vlan_rem_vid(struct net_device *netdev, u16 vid) | 538 | static void be_vlan_rem_vid(struct net_device *netdev, u16 vid) |
@@ -543,7 +543,7 @@ static void be_vlan_rem_vid(struct net_device *netdev, u16 vid) | |||
543 | adapter->vlan_tag[vid] = 0; | 543 | adapter->vlan_tag[vid] = 0; |
544 | 544 | ||
545 | vlan_group_set_device(adapter->vlan_grp, vid, NULL); | 545 | vlan_group_set_device(adapter->vlan_grp, vid, NULL); |
546 | be_vid_config(netdev); | 546 | be_vid_config(adapter); |
547 | } | 547 | } |
548 | 548 | ||
549 | static void be_set_multicast_list(struct net_device *netdev) | 549 | static void be_set_multicast_list(struct net_device *netdev) |
@@ -1444,12 +1444,8 @@ static void be_worker(struct work_struct *work) | |||
1444 | { | 1444 | { |
1445 | struct be_adapter *adapter = | 1445 | struct be_adapter *adapter = |
1446 | container_of(work, struct be_adapter, work.work); | 1446 | container_of(work, struct be_adapter, work.work); |
1447 | int status; | ||
1448 | 1447 | ||
1449 | /* Get Stats */ | 1448 | be_cmd_get_stats(adapter, &adapter->stats.cmd); |
1450 | status = be_cmd_get_stats(adapter, &adapter->stats.cmd); | ||
1451 | if (!status) | ||
1452 | netdev_stats_update(adapter); | ||
1453 | 1449 | ||
1454 | /* Set EQ delay */ | 1450 | /* Set EQ delay */ |
1455 | be_rx_eqd_update(adapter); | 1451 | be_rx_eqd_update(adapter); |
@@ -1622,11 +1618,6 @@ static int be_setup(struct be_adapter *adapter) | |||
1622 | if (status != 0) | 1618 | if (status != 0) |
1623 | goto do_none; | 1619 | goto do_none; |
1624 | 1620 | ||
1625 | be_vid_config(netdev); | ||
1626 | |||
1627 | status = be_cmd_set_flow_control(adapter, true, true); | ||
1628 | if (status != 0) | ||
1629 | goto if_destroy; | ||
1630 | 1621 | ||
1631 | status = be_tx_queues_create(adapter); | 1622 | status = be_tx_queues_create(adapter); |
1632 | if (status != 0) | 1623 | if (status != 0) |
@@ -1640,8 +1631,17 @@ static int be_setup(struct be_adapter *adapter) | |||
1640 | if (status != 0) | 1631 | if (status != 0) |
1641 | goto rx_qs_destroy; | 1632 | goto rx_qs_destroy; |
1642 | 1633 | ||
1634 | status = be_vid_config(adapter); | ||
1635 | if (status != 0) | ||
1636 | goto mccqs_destroy; | ||
1637 | |||
1638 | status = be_cmd_set_flow_control(adapter, true, true); | ||
1639 | if (status != 0) | ||
1640 | goto mccqs_destroy; | ||
1643 | return 0; | 1641 | return 0; |
1644 | 1642 | ||
1643 | mccqs_destroy: | ||
1644 | be_mcc_queues_destroy(adapter); | ||
1645 | rx_qs_destroy: | 1645 | rx_qs_destroy: |
1646 | be_rx_queues_destroy(adapter); | 1646 | be_rx_queues_destroy(adapter); |
1647 | tx_qs_destroy: | 1647 | tx_qs_destroy: |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index a7e731f8a0da..69c5b15e22da 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -1093,15 +1093,8 @@ static struct slave *bond_find_best_slave(struct bonding *bond) | |||
1093 | return NULL; /* still no slave, return NULL */ | 1093 | return NULL; /* still no slave, return NULL */ |
1094 | } | 1094 | } |
1095 | 1095 | ||
1096 | /* | ||
1097 | * first try the primary link; if arping, a link must tx/rx | ||
1098 | * traffic before it can be considered the curr_active_slave. | ||
1099 | * also, we would skip slaves between the curr_active_slave | ||
1100 | * and primary_slave that may be up and able to arp | ||
1101 | */ | ||
1102 | if ((bond->primary_slave) && | 1096 | if ((bond->primary_slave) && |
1103 | (!bond->params.arp_interval) && | 1097 | bond->primary_slave->link == BOND_LINK_UP) { |
1104 | (IS_UP(bond->primary_slave->dev))) { | ||
1105 | new_active = bond->primary_slave; | 1098 | new_active = bond->primary_slave; |
1106 | } | 1099 | } |
1107 | 1100 | ||
@@ -1109,15 +1102,14 @@ static struct slave *bond_find_best_slave(struct bonding *bond) | |||
1109 | old_active = new_active; | 1102 | old_active = new_active; |
1110 | 1103 | ||
1111 | bond_for_each_slave_from(bond, new_active, i, old_active) { | 1104 | bond_for_each_slave_from(bond, new_active, i, old_active) { |
1112 | if (IS_UP(new_active->dev)) { | 1105 | if (new_active->link == BOND_LINK_UP) { |
1113 | if (new_active->link == BOND_LINK_UP) { | 1106 | return new_active; |
1114 | return new_active; | 1107 | } else if (new_active->link == BOND_LINK_BACK && |
1115 | } else if (new_active->link == BOND_LINK_BACK) { | 1108 | IS_UP(new_active->dev)) { |
1116 | /* link up, but waiting for stabilization */ | 1109 | /* link up, but waiting for stabilization */ |
1117 | if (new_active->delay < mintime) { | 1110 | if (new_active->delay < mintime) { |
1118 | mintime = new_active->delay; | 1111 | mintime = new_active->delay; |
1119 | bestslave = new_active; | 1112 | bestslave = new_active; |
1120 | } | ||
1121 | } | 1113 | } |
1122 | } | 1114 | } |
1123 | } | 1115 | } |
@@ -1211,7 +1203,7 @@ void bond_change_active_slave(struct bonding *bond, struct slave *new_active) | |||
1211 | write_unlock_bh(&bond->curr_slave_lock); | 1203 | write_unlock_bh(&bond->curr_slave_lock); |
1212 | read_unlock(&bond->lock); | 1204 | read_unlock(&bond->lock); |
1213 | 1205 | ||
1214 | netdev_bonding_change(bond->dev); | 1206 | netdev_bonding_change(bond->dev, NETDEV_BONDING_FAILOVER); |
1215 | 1207 | ||
1216 | read_lock(&bond->lock); | 1208 | read_lock(&bond->lock); |
1217 | write_lock_bh(&bond->curr_slave_lock); | 1209 | write_lock_bh(&bond->curr_slave_lock); |
@@ -1469,14 +1461,17 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev) | |||
1469 | */ | 1461 | */ |
1470 | if (bond->slave_cnt == 0) { | 1462 | if (bond->slave_cnt == 0) { |
1471 | if (bond_dev->type != slave_dev->type) { | 1463 | if (bond_dev->type != slave_dev->type) { |
1472 | dev_close(bond_dev); | ||
1473 | pr_debug("%s: change device type from %d to %d\n", | 1464 | pr_debug("%s: change device type from %d to %d\n", |
1474 | bond_dev->name, bond_dev->type, slave_dev->type); | 1465 | bond_dev->name, bond_dev->type, slave_dev->type); |
1466 | |||
1467 | netdev_bonding_change(bond_dev, NETDEV_BONDING_OLDTYPE); | ||
1468 | |||
1475 | if (slave_dev->type != ARPHRD_ETHER) | 1469 | if (slave_dev->type != ARPHRD_ETHER) |
1476 | bond_setup_by_slave(bond_dev, slave_dev); | 1470 | bond_setup_by_slave(bond_dev, slave_dev); |
1477 | else | 1471 | else |
1478 | ether_setup(bond_dev); | 1472 | ether_setup(bond_dev); |
1479 | dev_open(bond_dev); | 1473 | |
1474 | netdev_bonding_change(bond_dev, NETDEV_BONDING_NEWTYPE); | ||
1480 | } | 1475 | } |
1481 | } else if (bond_dev->type != slave_dev->type) { | 1476 | } else if (bond_dev->type != slave_dev->type) { |
1482 | pr_err(DRV_NAME ": %s ether type (%d) is different " | 1477 | pr_err(DRV_NAME ": %s ether type (%d) is different " |
@@ -2929,18 +2924,6 @@ static int bond_ab_arp_inspect(struct bonding *bond, int delta_in_ticks) | |||
2929 | } | 2924 | } |
2930 | } | 2925 | } |
2931 | 2926 | ||
2932 | read_lock(&bond->curr_slave_lock); | ||
2933 | |||
2934 | /* | ||
2935 | * Trigger a commit if the primary option setting has changed. | ||
2936 | */ | ||
2937 | if (bond->primary_slave && | ||
2938 | (bond->primary_slave != bond->curr_active_slave) && | ||
2939 | (bond->primary_slave->link == BOND_LINK_UP)) | ||
2940 | commit++; | ||
2941 | |||
2942 | read_unlock(&bond->curr_slave_lock); | ||
2943 | |||
2944 | return commit; | 2927 | return commit; |
2945 | } | 2928 | } |
2946 | 2929 | ||
@@ -2961,90 +2944,58 @@ static void bond_ab_arp_commit(struct bonding *bond, int delta_in_ticks) | |||
2961 | continue; | 2944 | continue; |
2962 | 2945 | ||
2963 | case BOND_LINK_UP: | 2946 | case BOND_LINK_UP: |
2964 | write_lock_bh(&bond->curr_slave_lock); | 2947 | if ((!bond->curr_active_slave && |
2965 | 2948 | time_before_eq(jiffies, | |
2966 | if (!bond->curr_active_slave && | 2949 | dev_trans_start(slave->dev) + |
2967 | time_before_eq(jiffies, dev_trans_start(slave->dev) + | 2950 | delta_in_ticks)) || |
2968 | delta_in_ticks)) { | 2951 | bond->curr_active_slave != slave) { |
2969 | slave->link = BOND_LINK_UP; | 2952 | slave->link = BOND_LINK_UP; |
2970 | bond_change_active_slave(bond, slave); | ||
2971 | bond->current_arp_slave = NULL; | 2953 | bond->current_arp_slave = NULL; |
2972 | 2954 | ||
2973 | pr_info(DRV_NAME | 2955 | pr_info(DRV_NAME |
2974 | ": %s: %s is up and now the " | 2956 | ": %s: link status definitely " |
2975 | "active interface\n", | 2957 | "up for interface %s.\n", |
2976 | bond->dev->name, slave->dev->name); | 2958 | bond->dev->name, slave->dev->name); |
2977 | |||
2978 | } else if (bond->curr_active_slave != slave) { | ||
2979 | /* this slave has just come up but we | ||
2980 | * already have a current slave; this can | ||
2981 | * also happen if bond_enslave adds a new | ||
2982 | * slave that is up while we are searching | ||
2983 | * for a new slave | ||
2984 | */ | ||
2985 | slave->link = BOND_LINK_UP; | ||
2986 | bond_set_slave_inactive_flags(slave); | ||
2987 | bond->current_arp_slave = NULL; | ||
2988 | 2959 | ||
2989 | pr_info(DRV_NAME | 2960 | if (!bond->curr_active_slave || |
2990 | ": %s: backup interface %s is now up\n", | 2961 | (slave == bond->primary_slave)) |
2991 | bond->dev->name, slave->dev->name); | 2962 | goto do_failover; |
2992 | } | ||
2993 | 2963 | ||
2994 | write_unlock_bh(&bond->curr_slave_lock); | 2964 | } |
2995 | 2965 | ||
2996 | break; | 2966 | continue; |
2997 | 2967 | ||
2998 | case BOND_LINK_DOWN: | 2968 | case BOND_LINK_DOWN: |
2999 | if (slave->link_failure_count < UINT_MAX) | 2969 | if (slave->link_failure_count < UINT_MAX) |
3000 | slave->link_failure_count++; | 2970 | slave->link_failure_count++; |
3001 | 2971 | ||
3002 | slave->link = BOND_LINK_DOWN; | 2972 | slave->link = BOND_LINK_DOWN; |
2973 | bond_set_slave_inactive_flags(slave); | ||
3003 | 2974 | ||
3004 | if (slave == bond->curr_active_slave) { | 2975 | pr_info(DRV_NAME |
3005 | pr_info(DRV_NAME | 2976 | ": %s: link status definitely down for " |
3006 | ": %s: link status down for active " | 2977 | "interface %s, disabling it\n", |
3007 | "interface %s, disabling it\n", | 2978 | bond->dev->name, slave->dev->name); |
3008 | bond->dev->name, slave->dev->name); | ||
3009 | |||
3010 | bond_set_slave_inactive_flags(slave); | ||
3011 | |||
3012 | write_lock_bh(&bond->curr_slave_lock); | ||
3013 | |||
3014 | bond_select_active_slave(bond); | ||
3015 | if (bond->curr_active_slave) | ||
3016 | bond->curr_active_slave->jiffies = | ||
3017 | jiffies; | ||
3018 | |||
3019 | write_unlock_bh(&bond->curr_slave_lock); | ||
3020 | 2979 | ||
2980 | if (slave == bond->curr_active_slave) { | ||
3021 | bond->current_arp_slave = NULL; | 2981 | bond->current_arp_slave = NULL; |
3022 | 2982 | goto do_failover; | |
3023 | } else if (slave->state == BOND_STATE_BACKUP) { | ||
3024 | pr_info(DRV_NAME | ||
3025 | ": %s: backup interface %s is now down\n", | ||
3026 | bond->dev->name, slave->dev->name); | ||
3027 | |||
3028 | bond_set_slave_inactive_flags(slave); | ||
3029 | } | 2983 | } |
3030 | break; | 2984 | |
2985 | continue; | ||
3031 | 2986 | ||
3032 | default: | 2987 | default: |
3033 | pr_err(DRV_NAME | 2988 | pr_err(DRV_NAME |
3034 | ": %s: impossible: new_link %d on slave %s\n", | 2989 | ": %s: impossible: new_link %d on slave %s\n", |
3035 | bond->dev->name, slave->new_link, | 2990 | bond->dev->name, slave->new_link, |
3036 | slave->dev->name); | 2991 | slave->dev->name); |
2992 | continue; | ||
3037 | } | 2993 | } |
3038 | } | ||
3039 | 2994 | ||
3040 | /* | 2995 | do_failover: |
3041 | * No race with changes to primary via sysfs, as we hold rtnl. | 2996 | ASSERT_RTNL(); |
3042 | */ | ||
3043 | if (bond->primary_slave && | ||
3044 | (bond->primary_slave != bond->curr_active_slave) && | ||
3045 | (bond->primary_slave->link == BOND_LINK_UP)) { | ||
3046 | write_lock_bh(&bond->curr_slave_lock); | 2997 | write_lock_bh(&bond->curr_slave_lock); |
3047 | bond_change_active_slave(bond, bond->primary_slave); | 2998 | bond_select_active_slave(bond); |
3048 | write_unlock_bh(&bond->curr_slave_lock); | 2999 | write_unlock_bh(&bond->curr_slave_lock); |
3049 | } | 3000 | } |
3050 | 3001 | ||
diff --git a/drivers/net/can/vcan.c b/drivers/net/can/vcan.c index 6971f6cd37fa..80ac56313981 100644 --- a/drivers/net/can/vcan.c +++ b/drivers/net/can/vcan.c | |||
@@ -80,7 +80,7 @@ static void vcan_rx(struct sk_buff *skb, struct net_device *dev) | |||
80 | skb->dev = dev; | 80 | skb->dev = dev; |
81 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 81 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
82 | 82 | ||
83 | netif_rx(skb); | 83 | netif_rx_ni(skb); |
84 | } | 84 | } |
85 | 85 | ||
86 | static netdev_tx_t vcan_tx(struct sk_buff *skb, struct net_device *dev) | 86 | static netdev_tx_t vcan_tx(struct sk_buff *skb, struct net_device *dev) |
diff --git a/drivers/net/fec.c b/drivers/net/fec.c index b47201874d84..29234380e6c6 100644 --- a/drivers/net/fec.c +++ b/drivers/net/fec.c | |||
@@ -1154,19 +1154,9 @@ static void __inline__ fec_request_mii_intr(struct net_device *dev) | |||
1154 | printk("FEC: Could not allocate fec(MII) IRQ(66)!\n"); | 1154 | printk("FEC: Could not allocate fec(MII) IRQ(66)!\n"); |
1155 | } | 1155 | } |
1156 | 1156 | ||
1157 | static void __inline__ fec_disable_phy_intr(void) | 1157 | static void __inline__ fec_disable_phy_intr(struct net_device *dev) |
1158 | { | 1158 | { |
1159 | volatile unsigned long *icrp; | 1159 | free_irq(66, dev); |
1160 | icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); | ||
1161 | *icrp = 0x08000000; | ||
1162 | } | ||
1163 | |||
1164 | static void __inline__ fec_phy_ack_intr(void) | ||
1165 | { | ||
1166 | volatile unsigned long *icrp; | ||
1167 | /* Acknowledge the interrupt */ | ||
1168 | icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1); | ||
1169 | *icrp = 0x0d000000; | ||
1170 | } | 1160 | } |
1171 | #endif | 1161 | #endif |
1172 | 1162 | ||
@@ -1398,7 +1388,7 @@ mii_discover_phy(uint mii_reg, struct net_device *dev) | |||
1398 | writel(0, fep->hwp + FEC_MII_SPEED); | 1388 | writel(0, fep->hwp + FEC_MII_SPEED); |
1399 | fep->phy_speed = 0; | 1389 | fep->phy_speed = 0; |
1400 | #ifdef HAVE_mii_link_interrupt | 1390 | #ifdef HAVE_mii_link_interrupt |
1401 | fec_disable_phy_intr(); | 1391 | fec_disable_phy_intr(dev); |
1402 | #endif | 1392 | #endif |
1403 | } | 1393 | } |
1404 | } | 1394 | } |
@@ -1411,8 +1401,6 @@ mii_link_interrupt(int irq, void * dev_id) | |||
1411 | struct net_device *dev = dev_id; | 1401 | struct net_device *dev = dev_id; |
1412 | struct fec_enet_private *fep = netdev_priv(dev); | 1402 | struct fec_enet_private *fep = netdev_priv(dev); |
1413 | 1403 | ||
1414 | fec_phy_ack_intr(); | ||
1415 | |||
1416 | mii_do_cmd(dev, fep->phy->ack_int); | 1404 | mii_do_cmd(dev, fep->phy->ack_int); |
1417 | mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ | 1405 | mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ |
1418 | 1406 | ||
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index 6158c0f3b205..f8f5772557ce 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
@@ -49,11 +49,10 @@ static s32 igb_read_phy_reg_sgmii_82575(struct e1000_hw *, u32, u16 *); | |||
49 | static s32 igb_reset_hw_82575(struct e1000_hw *); | 49 | static s32 igb_reset_hw_82575(struct e1000_hw *); |
50 | static s32 igb_set_d0_lplu_state_82575(struct e1000_hw *, bool); | 50 | static s32 igb_set_d0_lplu_state_82575(struct e1000_hw *, bool); |
51 | static s32 igb_setup_copper_link_82575(struct e1000_hw *); | 51 | static s32 igb_setup_copper_link_82575(struct e1000_hw *); |
52 | static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *); | 52 | static s32 igb_setup_serdes_link_82575(struct e1000_hw *); |
53 | static s32 igb_write_phy_reg_sgmii_82575(struct e1000_hw *, u32, u16); | 53 | static s32 igb_write_phy_reg_sgmii_82575(struct e1000_hw *, u32, u16); |
54 | static void igb_clear_hw_cntrs_82575(struct e1000_hw *); | 54 | static void igb_clear_hw_cntrs_82575(struct e1000_hw *); |
55 | static s32 igb_acquire_swfw_sync_82575(struct e1000_hw *, u16); | 55 | static s32 igb_acquire_swfw_sync_82575(struct e1000_hw *, u16); |
56 | static void igb_configure_pcs_link_82575(struct e1000_hw *); | ||
57 | static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *, u16 *, | 56 | static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *, u16 *, |
58 | u16 *); | 57 | u16 *); |
59 | static s32 igb_get_phy_id_82575(struct e1000_hw *); | 58 | static s32 igb_get_phy_id_82575(struct e1000_hw *); |
@@ -105,16 +104,20 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
105 | dev_spec->sgmii_active = false; | 104 | dev_spec->sgmii_active = false; |
106 | 105 | ||
107 | ctrl_ext = rd32(E1000_CTRL_EXT); | 106 | ctrl_ext = rd32(E1000_CTRL_EXT); |
108 | if ((ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) == | 107 | switch (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_MASK) { |
109 | E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES) { | 108 | case E1000_CTRL_EXT_LINK_MODE_SGMII: |
110 | hw->phy.media_type = e1000_media_type_internal_serdes; | ||
111 | ctrl_ext |= E1000_CTRL_I2C_ENA; | ||
112 | } else if (ctrl_ext & E1000_CTRL_EXT_LINK_MODE_SGMII) { | ||
113 | dev_spec->sgmii_active = true; | 109 | dev_spec->sgmii_active = true; |
114 | ctrl_ext |= E1000_CTRL_I2C_ENA; | 110 | ctrl_ext |= E1000_CTRL_I2C_ENA; |
115 | } else { | 111 | break; |
112 | case E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES: | ||
113 | hw->phy.media_type = e1000_media_type_internal_serdes; | ||
114 | ctrl_ext |= E1000_CTRL_I2C_ENA; | ||
115 | break; | ||
116 | default: | ||
116 | ctrl_ext &= ~E1000_CTRL_I2C_ENA; | 117 | ctrl_ext &= ~E1000_CTRL_I2C_ENA; |
118 | break; | ||
117 | } | 119 | } |
120 | |||
118 | wr32(E1000_CTRL_EXT, ctrl_ext); | 121 | wr32(E1000_CTRL_EXT, ctrl_ext); |
119 | 122 | ||
120 | /* Set mta register count */ | 123 | /* Set mta register count */ |
@@ -134,7 +137,7 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw) | |||
134 | mac->ops.setup_physical_interface = | 137 | mac->ops.setup_physical_interface = |
135 | (hw->phy.media_type == e1000_media_type_copper) | 138 | (hw->phy.media_type == e1000_media_type_copper) |
136 | ? igb_setup_copper_link_82575 | 139 | ? igb_setup_copper_link_82575 |
137 | : igb_setup_fiber_serdes_link_82575; | 140 | : igb_setup_serdes_link_82575; |
138 | 141 | ||
139 | /* NVM initialization */ | 142 | /* NVM initialization */ |
140 | eecd = rd32(E1000_EECD); | 143 | eecd = rd32(E1000_EECD); |
@@ -379,6 +382,7 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw) | |||
379 | struct e1000_phy_info *phy = &hw->phy; | 382 | struct e1000_phy_info *phy = &hw->phy; |
380 | s32 ret_val = 0; | 383 | s32 ret_val = 0; |
381 | u16 phy_id; | 384 | u16 phy_id; |
385 | u32 ctrl_ext; | ||
382 | 386 | ||
383 | /* | 387 | /* |
384 | * For SGMII PHYs, we try the list of possible addresses until | 388 | * For SGMII PHYs, we try the list of possible addresses until |
@@ -393,6 +397,12 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw) | |||
393 | goto out; | 397 | goto out; |
394 | } | 398 | } |
395 | 399 | ||
400 | /* Power on sgmii phy if it is disabled */ | ||
401 | ctrl_ext = rd32(E1000_CTRL_EXT); | ||
402 | wr32(E1000_CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_SDP3_DATA); | ||
403 | wrfl(); | ||
404 | msleep(300); | ||
405 | |||
396 | /* | 406 | /* |
397 | * The address field in the I2CCMD register is 3 bits and 0 is invalid. | 407 | * The address field in the I2CCMD register is 3 bits and 0 is invalid. |
398 | * Therefore, we need to test 1-7 | 408 | * Therefore, we need to test 1-7 |
@@ -418,9 +428,12 @@ static s32 igb_get_phy_id_82575(struct e1000_hw *hw) | |||
418 | phy->addr = 0; | 428 | phy->addr = 0; |
419 | ret_val = -E1000_ERR_PHY; | 429 | ret_val = -E1000_ERR_PHY; |
420 | goto out; | 430 | goto out; |
431 | } else { | ||
432 | ret_val = igb_get_phy_id(hw); | ||
421 | } | 433 | } |
422 | 434 | ||
423 | ret_val = igb_get_phy_id(hw); | 435 | /* restore previous sfp cage power state */ |
436 | wr32(E1000_CTRL_EXT, ctrl_ext); | ||
424 | 437 | ||
425 | out: | 438 | out: |
426 | return ret_val; | 439 | return ret_val; |
@@ -766,17 +779,18 @@ static s32 igb_get_pcs_speed_and_duplex_82575(struct e1000_hw *hw, u16 *speed, | |||
766 | } | 779 | } |
767 | 780 | ||
768 | /** | 781 | /** |
769 | * igb_shutdown_fiber_serdes_link_82575 - Remove link during power down | 782 | * igb_shutdown_serdes_link_82575 - Remove link during power down |
770 | * @hw: pointer to the HW structure | 783 | * @hw: pointer to the HW structure |
771 | * | 784 | * |
772 | * In the case of fiber serdes, shut down optics and PCS on driver unload | 785 | * In the case of fiber serdes, shut down optics and PCS on driver unload |
773 | * when management pass thru is not enabled. | 786 | * when management pass thru is not enabled. |
774 | **/ | 787 | **/ |
775 | void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw) | 788 | void igb_shutdown_serdes_link_82575(struct e1000_hw *hw) |
776 | { | 789 | { |
777 | u32 reg; | 790 | u32 reg; |
778 | 791 | ||
779 | if (hw->phy.media_type != e1000_media_type_internal_serdes) | 792 | if (hw->phy.media_type != e1000_media_type_internal_serdes || |
793 | igb_sgmii_active_82575(hw)) | ||
780 | return; | 794 | return; |
781 | 795 | ||
782 | /* if the management interface is not enabled, then power down */ | 796 | /* if the management interface is not enabled, then power down */ |
@@ -788,7 +802,7 @@ void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw) | |||
788 | 802 | ||
789 | /* shutdown the laser */ | 803 | /* shutdown the laser */ |
790 | reg = rd32(E1000_CTRL_EXT); | 804 | reg = rd32(E1000_CTRL_EXT); |
791 | reg |= E1000_CTRL_EXT_SDP7_DATA; | 805 | reg |= E1000_CTRL_EXT_SDP3_DATA; |
792 | wr32(E1000_CTRL_EXT, reg); | 806 | wr32(E1000_CTRL_EXT, reg); |
793 | 807 | ||
794 | /* flush the write to verify completion */ | 808 | /* flush the write to verify completion */ |
@@ -927,6 +941,17 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) | |||
927 | ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); | 941 | ctrl &= ~(E1000_CTRL_FRCSPD | E1000_CTRL_FRCDPX); |
928 | wr32(E1000_CTRL, ctrl); | 942 | wr32(E1000_CTRL, ctrl); |
929 | 943 | ||
944 | ret_val = igb_setup_serdes_link_82575(hw); | ||
945 | if (ret_val) | ||
946 | goto out; | ||
947 | |||
948 | if (igb_sgmii_active_82575(hw) && !hw->phy.reset_disable) { | ||
949 | ret_val = hw->phy.ops.reset(hw); | ||
950 | if (ret_val) { | ||
951 | hw_dbg("Error resetting the PHY.\n"); | ||
952 | goto out; | ||
953 | } | ||
954 | } | ||
930 | switch (hw->phy.type) { | 955 | switch (hw->phy.type) { |
931 | case e1000_phy_m88: | 956 | case e1000_phy_m88: |
932 | ret_val = igb_copper_link_setup_m88(hw); | 957 | ret_val = igb_copper_link_setup_m88(hw); |
@@ -963,8 +988,6 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw) | |||
963 | } | 988 | } |
964 | } | 989 | } |
965 | 990 | ||
966 | igb_configure_pcs_link_82575(hw); | ||
967 | |||
968 | /* | 991 | /* |
969 | * Check link status. Wait up to 100 microseconds for link to become | 992 | * Check link status. Wait up to 100 microseconds for link to become |
970 | * valid. | 993 | * valid. |
@@ -987,14 +1010,18 @@ out: | |||
987 | } | 1010 | } |
988 | 1011 | ||
989 | /** | 1012 | /** |
990 | * igb_setup_fiber_serdes_link_82575 - Setup link for fiber/serdes | 1013 | * igb_setup_serdes_link_82575 - Setup link for fiber/serdes |
991 | * @hw: pointer to the HW structure | 1014 | * @hw: pointer to the HW structure |
992 | * | 1015 | * |
993 | * Configures speed and duplex for fiber and serdes links. | 1016 | * Configures speed and duplex for fiber and serdes links. |
994 | **/ | 1017 | **/ |
995 | static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw) | 1018 | static s32 igb_setup_serdes_link_82575(struct e1000_hw *hw) |
996 | { | 1019 | { |
997 | u32 reg; | 1020 | u32 ctrl_reg, reg; |
1021 | |||
1022 | if ((hw->phy.media_type != e1000_media_type_internal_serdes) && | ||
1023 | !igb_sgmii_active_82575(hw)) | ||
1024 | return 0; | ||
998 | 1025 | ||
999 | /* | 1026 | /* |
1000 | * On the 82575, SerDes loopback mode persists until it is | 1027 | * On the 82575, SerDes loopback mode persists until it is |
@@ -1004,26 +1031,38 @@ static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw) | |||
1004 | */ | 1031 | */ |
1005 | wr32(E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK); | 1032 | wr32(E1000_SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK); |
1006 | 1033 | ||
1007 | /* Force link up, set 1gb, set both sw defined pins */ | 1034 | /* power on the sfp cage if present */ |
1008 | reg = rd32(E1000_CTRL); | 1035 | reg = rd32(E1000_CTRL_EXT); |
1009 | reg |= E1000_CTRL_SLU | | 1036 | reg &= ~E1000_CTRL_EXT_SDP3_DATA; |
1010 | E1000_CTRL_SPD_1000 | | 1037 | wr32(E1000_CTRL_EXT, reg); |
1011 | E1000_CTRL_FRCSPD | | 1038 | |
1012 | E1000_CTRL_SWDPIN0 | | 1039 | ctrl_reg = rd32(E1000_CTRL); |
1013 | E1000_CTRL_SWDPIN1; | 1040 | ctrl_reg |= E1000_CTRL_SLU; |
1014 | wr32(E1000_CTRL, reg); | 1041 | |
1015 | 1042 | if (hw->mac.type == e1000_82575 || hw->mac.type == e1000_82576) { | |
1016 | /* Power on phy for 82576 fiber adapters */ | 1043 | /* set both sw defined pins */ |
1017 | if (hw->mac.type == e1000_82576) { | 1044 | ctrl_reg |= E1000_CTRL_SWDPIN0 | E1000_CTRL_SWDPIN1; |
1018 | reg = rd32(E1000_CTRL_EXT); | 1045 | |
1019 | reg &= ~E1000_CTRL_EXT_SDP7_DATA; | 1046 | /* Set switch control to serdes energy detect */ |
1020 | wr32(E1000_CTRL_EXT, reg); | 1047 | reg = rd32(E1000_CONNSW); |
1048 | reg |= E1000_CONNSW_ENRGSRC; | ||
1049 | wr32(E1000_CONNSW, reg); | ||
1050 | } | ||
1051 | |||
1052 | reg = rd32(E1000_PCS_LCTL); | ||
1053 | |||
1054 | if (igb_sgmii_active_82575(hw)) { | ||
1055 | /* allow time for SFP cage to power up phy */ | ||
1056 | msleep(300); | ||
1057 | |||
1058 | /* AN time out should be disabled for SGMII mode */ | ||
1059 | reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT); | ||
1060 | } else { | ||
1061 | ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD | | ||
1062 | E1000_CTRL_FD | E1000_CTRL_FRCDPX; | ||
1021 | } | 1063 | } |
1022 | 1064 | ||
1023 | /* Set switch control to serdes energy detect */ | 1065 | wr32(E1000_CTRL, ctrl_reg); |
1024 | reg = rd32(E1000_CONNSW); | ||
1025 | reg |= E1000_CONNSW_ENRGSRC; | ||
1026 | wr32(E1000_CONNSW, reg); | ||
1027 | 1066 | ||
1028 | /* | 1067 | /* |
1029 | * New SerDes mode allows for forcing speed or autonegotiating speed | 1068 | * New SerDes mode allows for forcing speed or autonegotiating speed |
@@ -1031,12 +1070,21 @@ static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw) | |||
1031 | * mode that will be compatible with older link partners and switches. | 1070 | * mode that will be compatible with older link partners and switches. |
1032 | * However, both are supported by the hardware and some drivers/tools. | 1071 | * However, both are supported by the hardware and some drivers/tools. |
1033 | */ | 1072 | */ |
1034 | reg = rd32(E1000_PCS_LCTL); | ||
1035 | 1073 | ||
1036 | reg &= ~(E1000_PCS_LCTL_AN_ENABLE | E1000_PCS_LCTL_FLV_LINK_UP | | 1074 | reg &= ~(E1000_PCS_LCTL_AN_ENABLE | E1000_PCS_LCTL_FLV_LINK_UP | |
1037 | E1000_PCS_LCTL_FSD | E1000_PCS_LCTL_FORCE_LINK); | 1075 | E1000_PCS_LCTL_FSD | E1000_PCS_LCTL_FORCE_LINK); |
1038 | 1076 | ||
1039 | if (hw->mac.autoneg) { | 1077 | /* |
1078 | * We force flow control to prevent the CTRL register values from being | ||
1079 | * overwritten by the autonegotiated flow control values | ||
1080 | */ | ||
1081 | reg |= E1000_PCS_LCTL_FORCE_FCTRL; | ||
1082 | |||
1083 | /* | ||
1084 | * we always set sgmii to autoneg since it is the phy that will be | ||
1085 | * forcing the link and the serdes is just a go-between | ||
1086 | */ | ||
1087 | if (hw->mac.autoneg || igb_sgmii_active_82575(hw)) { | ||
1040 | /* Set PCS register for autoneg */ | 1088 | /* Set PCS register for autoneg */ |
1041 | reg |= E1000_PCS_LCTL_FSV_1000 | /* Force 1000 */ | 1089 | reg |= E1000_PCS_LCTL_FSV_1000 | /* Force 1000 */ |
1042 | E1000_PCS_LCTL_FDV_FULL | /* SerDes Full duplex */ | 1090 | E1000_PCS_LCTL_FDV_FULL | /* SerDes Full duplex */ |
@@ -1053,75 +1101,12 @@ static s32 igb_setup_fiber_serdes_link_82575(struct e1000_hw *hw) | |||
1053 | hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg); | 1101 | hw_dbg("Configuring Forced Link; PCS_LCTL = 0x%08X\n", reg); |
1054 | } | 1102 | } |
1055 | 1103 | ||
1056 | if (hw->mac.type == e1000_82576) { | ||
1057 | reg |= E1000_PCS_LCTL_FORCE_FCTRL; | ||
1058 | igb_force_mac_fc(hw); | ||
1059 | } | ||
1060 | |||
1061 | wr32(E1000_PCS_LCTL, reg); | 1104 | wr32(E1000_PCS_LCTL, reg); |
1062 | 1105 | ||
1063 | return 0; | 1106 | if (!igb_sgmii_active_82575(hw)) |
1064 | } | 1107 | igb_force_mac_fc(hw); |
1065 | |||
1066 | /** | ||
1067 | * igb_configure_pcs_link_82575 - Configure PCS link | ||
1068 | * @hw: pointer to the HW structure | ||
1069 | * | ||
1070 | * Configure the physical coding sub-layer (PCS) link. The PCS link is | ||
1071 | * only used on copper connections where the serialized gigabit media | ||
1072 | * independent interface (sgmii) is being used. Configures the link | ||
1073 | * for auto-negotiation or forces speed/duplex. | ||
1074 | **/ | ||
1075 | static void igb_configure_pcs_link_82575(struct e1000_hw *hw) | ||
1076 | { | ||
1077 | struct e1000_mac_info *mac = &hw->mac; | ||
1078 | u32 reg = 0; | ||
1079 | |||
1080 | if (hw->phy.media_type != e1000_media_type_copper || | ||
1081 | !(igb_sgmii_active_82575(hw))) | ||
1082 | return; | ||
1083 | |||
1084 | /* For SGMII, we need to issue a PCS autoneg restart */ | ||
1085 | reg = rd32(E1000_PCS_LCTL); | ||
1086 | |||
1087 | /* AN time out should be disabled for SGMII mode */ | ||
1088 | reg &= ~(E1000_PCS_LCTL_AN_TIMEOUT); | ||
1089 | |||
1090 | if (mac->autoneg) { | ||
1091 | /* Make sure forced speed and force link are not set */ | ||
1092 | reg &= ~(E1000_PCS_LCTL_FSD | E1000_PCS_LCTL_FORCE_LINK); | ||
1093 | |||
1094 | /* | ||
1095 | * The PHY should be setup prior to calling this function. | ||
1096 | * All we need to do is restart autoneg and enable autoneg. | ||
1097 | */ | ||
1098 | reg |= E1000_PCS_LCTL_AN_RESTART | E1000_PCS_LCTL_AN_ENABLE; | ||
1099 | } else { | ||
1100 | /* Set PCS register for forced speed */ | ||
1101 | |||
1102 | /* Turn off bits for full duplex, speed, and autoneg */ | ||
1103 | reg &= ~(E1000_PCS_LCTL_FSV_1000 | | ||
1104 | E1000_PCS_LCTL_FSV_100 | | ||
1105 | E1000_PCS_LCTL_FDV_FULL | | ||
1106 | E1000_PCS_LCTL_AN_ENABLE); | ||
1107 | |||
1108 | /* Check for duplex first */ | ||
1109 | if (mac->forced_speed_duplex & E1000_ALL_FULL_DUPLEX) | ||
1110 | reg |= E1000_PCS_LCTL_FDV_FULL; | ||
1111 | |||
1112 | /* Now set speed */ | ||
1113 | if (mac->forced_speed_duplex & E1000_ALL_100_SPEED) | ||
1114 | reg |= E1000_PCS_LCTL_FSV_100; | ||
1115 | |||
1116 | /* Force speed and force link */ | ||
1117 | reg |= E1000_PCS_LCTL_FSD | | ||
1118 | E1000_PCS_LCTL_FORCE_LINK | | ||
1119 | E1000_PCS_LCTL_FLV_LINK_UP; | ||
1120 | 1108 | ||
1121 | hw_dbg("Wrote 0x%08X to PCS_LCTL to configure forced link\n", | 1109 | return 0; |
1122 | reg); | ||
1123 | } | ||
1124 | wr32(E1000_PCS_LCTL, reg); | ||
1125 | } | 1110 | } |
1126 | 1111 | ||
1127 | /** | 1112 | /** |
@@ -1248,7 +1233,8 @@ static void igb_clear_hw_cntrs_82575(struct e1000_hw *hw) | |||
1248 | temp = rd32(E1000_LENERRS); | 1233 | temp = rd32(E1000_LENERRS); |
1249 | 1234 | ||
1250 | /* This register should not be read in copper configurations */ | 1235 | /* This register should not be read in copper configurations */ |
1251 | if (hw->phy.media_type == e1000_media_type_internal_serdes) | 1236 | if (hw->phy.media_type == e1000_media_type_internal_serdes || |
1237 | igb_sgmii_active_82575(hw)) | ||
1252 | temp = rd32(E1000_SCVPC); | 1238 | temp = rd32(E1000_SCVPC); |
1253 | } | 1239 | } |
1254 | 1240 | ||
diff --git a/drivers/net/igb/e1000_82575.h b/drivers/net/igb/e1000_82575.h index 8a1e6597061f..ebd146fd4e15 100644 --- a/drivers/net/igb/e1000_82575.h +++ b/drivers/net/igb/e1000_82575.h | |||
@@ -28,7 +28,7 @@ | |||
28 | #ifndef _E1000_82575_H_ | 28 | #ifndef _E1000_82575_H_ |
29 | #define _E1000_82575_H_ | 29 | #define _E1000_82575_H_ |
30 | 30 | ||
31 | extern void igb_shutdown_fiber_serdes_link_82575(struct e1000_hw *hw); | 31 | extern void igb_shutdown_serdes_link_82575(struct e1000_hw *hw); |
32 | extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); | 32 | extern void igb_rx_fifo_flush_82575(struct e1000_hw *hw); |
33 | 33 | ||
34 | #define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ | 34 | #define ID_LED_DEFAULT_82575_SERDES ((ID_LED_DEF1_DEF2 << 12) | \ |
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index c85829355d50..cb916833f303 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
@@ -44,7 +44,7 @@ | |||
44 | #define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */ | 44 | #define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */ |
45 | 45 | ||
46 | /* Extended Device Control */ | 46 | /* Extended Device Control */ |
47 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */ | 47 | #define E1000_CTRL_EXT_SDP3_DATA 0x00000080 /* Value of SW Defineable Pin 3 */ |
48 | /* Physical Func Reset Done Indication */ | 48 | /* Physical Func Reset Done Indication */ |
49 | #define E1000_CTRL_EXT_PFRSTD 0x00004000 | 49 | #define E1000_CTRL_EXT_PFRSTD 0x00004000 |
50 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 50 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
diff --git a/drivers/net/igb/e1000_phy.c b/drivers/net/igb/e1000_phy.c index c1f4da630420..ee460600e74b 100644 --- a/drivers/net/igb/e1000_phy.c +++ b/drivers/net/igb/e1000_phy.c | |||
@@ -1565,9 +1565,12 @@ out: | |||
1565 | **/ | 1565 | **/ |
1566 | s32 igb_phy_sw_reset(struct e1000_hw *hw) | 1566 | s32 igb_phy_sw_reset(struct e1000_hw *hw) |
1567 | { | 1567 | { |
1568 | s32 ret_val; | 1568 | s32 ret_val = 0; |
1569 | u16 phy_ctrl; | 1569 | u16 phy_ctrl; |
1570 | 1570 | ||
1571 | if (!(hw->phy.ops.read_reg)) | ||
1572 | goto out; | ||
1573 | |||
1571 | ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); | 1574 | ret_val = hw->phy.ops.read_reg(hw, PHY_CONTROL, &phy_ctrl); |
1572 | if (ret_val) | 1575 | if (ret_val) |
1573 | goto out; | 1576 | goto out; |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index 943186b78483..d2639c4a086d 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -5320,7 +5320,7 @@ static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake) | |||
5320 | 5320 | ||
5321 | *enable_wake = wufc || adapter->en_mng_pt; | 5321 | *enable_wake = wufc || adapter->en_mng_pt; |
5322 | if (!*enable_wake) | 5322 | if (!*enable_wake) |
5323 | igb_shutdown_fiber_serdes_link_82575(hw); | 5323 | igb_shutdown_serdes_link_82575(hw); |
5324 | 5324 | ||
5325 | /* Release control of h/w to f/w. If f/w is AMT enabled, this | 5325 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
5326 | * would have already happened in close and is redundant. */ | 5326 | * would have already happened in close and is redundant. */ |
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c index cb7f0c3c6e16..56b12f3192f1 100644 --- a/drivers/net/ixgbe/ixgbe_82598.c +++ b/drivers/net/ixgbe/ixgbe_82598.c | |||
@@ -322,14 +322,16 @@ static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw) | |||
322 | break; | 322 | break; |
323 | case IXGBE_DEV_ID_82598AF_DUAL_PORT: | 323 | case IXGBE_DEV_ID_82598AF_DUAL_PORT: |
324 | case IXGBE_DEV_ID_82598AF_SINGLE_PORT: | 324 | case IXGBE_DEV_ID_82598AF_SINGLE_PORT: |
325 | case IXGBE_DEV_ID_82598EB_CX4: | ||
326 | case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: | ||
327 | case IXGBE_DEV_ID_82598_DA_DUAL_PORT: | 325 | case IXGBE_DEV_ID_82598_DA_DUAL_PORT: |
328 | case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: | 326 | case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: |
329 | case IXGBE_DEV_ID_82598EB_XF_LR: | 327 | case IXGBE_DEV_ID_82598EB_XF_LR: |
330 | case IXGBE_DEV_ID_82598EB_SFP_LOM: | 328 | case IXGBE_DEV_ID_82598EB_SFP_LOM: |
331 | media_type = ixgbe_media_type_fiber; | 329 | media_type = ixgbe_media_type_fiber; |
332 | break; | 330 | break; |
331 | case IXGBE_DEV_ID_82598EB_CX4: | ||
332 | case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: | ||
333 | media_type = ixgbe_media_type_cx4; | ||
334 | break; | ||
333 | case IXGBE_DEV_ID_82598AT: | 335 | case IXGBE_DEV_ID_82598AT: |
334 | case IXGBE_DEV_ID_82598AT2: | 336 | case IXGBE_DEV_ID_82598AT2: |
335 | media_type = ixgbe_media_type_copper; | 337 | media_type = ixgbe_media_type_copper; |
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c index 61af47e75aa1..2ec58dcdb82b 100644 --- a/drivers/net/ixgbe/ixgbe_82599.c +++ b/drivers/net/ixgbe/ixgbe_82599.c | |||
@@ -337,6 +337,9 @@ static enum ixgbe_media_type ixgbe_get_media_type_82599(struct ixgbe_hw *hw) | |||
337 | case IXGBE_DEV_ID_82599_SFP: | 337 | case IXGBE_DEV_ID_82599_SFP: |
338 | media_type = ixgbe_media_type_fiber; | 338 | media_type = ixgbe_media_type_fiber; |
339 | break; | 339 | break; |
340 | case IXGBE_DEV_ID_82599_CX4: | ||
341 | media_type = ixgbe_media_type_cx4; | ||
342 | break; | ||
340 | default: | 343 | default: |
341 | media_type = ixgbe_media_type_unknown; | 344 | media_type = ixgbe_media_type_unknown; |
342 | break; | 345 | break; |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 45bf8b9716e3..59ad9590e700 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -97,6 +97,8 @@ static struct pci_device_id ixgbe_pci_tbl[] = { | |||
97 | board_82599 }, | 97 | board_82599 }, |
98 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), | 98 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP), |
99 | board_82599 }, | 99 | board_82599 }, |
100 | {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4), | ||
101 | board_82599 }, | ||
100 | 102 | ||
101 | /* required last entry */ | 103 | /* required last entry */ |
102 | {0, } | 104 | {0, } |
@@ -2055,6 +2057,8 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter) | |||
2055 | 2057 | ||
2056 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) | 2058 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) |
2057 | rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED; | 2059 | rx_ring->flags |= IXGBE_RING_RX_PS_ENABLED; |
2060 | else | ||
2061 | rx_ring->flags &= ~IXGBE_RING_RX_PS_ENABLED; | ||
2058 | 2062 | ||
2059 | #ifdef IXGBE_FCOE | 2063 | #ifdef IXGBE_FCOE |
2060 | if (netdev->features & NETIF_F_FCOE_MTU) { | 2064 | if (netdev->features & NETIF_F_FCOE_MTU) { |
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index 8ba90eec1dc9..8761d7899f7d 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h | |||
@@ -49,6 +49,7 @@ | |||
49 | #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1 | 49 | #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1 |
50 | #define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4 | 50 | #define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4 |
51 | #define IXGBE_DEV_ID_82599_KX4 0x10F7 | 51 | #define IXGBE_DEV_ID_82599_KX4 0x10F7 |
52 | #define IXGBE_DEV_ID_82599_CX4 0x10F9 | ||
52 | #define IXGBE_DEV_ID_82599_SFP 0x10FB | 53 | #define IXGBE_DEV_ID_82599_SFP 0x10FB |
53 | #define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC | 54 | #define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC |
54 | 55 | ||
@@ -2143,6 +2144,7 @@ enum ixgbe_media_type { | |||
2143 | ixgbe_media_type_fiber, | 2144 | ixgbe_media_type_fiber, |
2144 | ixgbe_media_type_copper, | 2145 | ixgbe_media_type_copper, |
2145 | ixgbe_media_type_backplane, | 2146 | ixgbe_media_type_backplane, |
2147 | ixgbe_media_type_cx4, | ||
2146 | ixgbe_media_type_virtual | 2148 | ixgbe_media_type_virtual |
2147 | }; | 2149 | }; |
2148 | 2150 | ||
diff --git a/drivers/net/mlx4/catas.c b/drivers/net/mlx4/catas.c index aa9674b7f19c..f599294fa8ab 100644 --- a/drivers/net/mlx4/catas.c +++ b/drivers/net/mlx4/catas.c | |||
@@ -96,12 +96,17 @@ static void catas_reset(struct work_struct *work) | |||
96 | spin_unlock_irq(&catas_lock); | 96 | spin_unlock_irq(&catas_lock); |
97 | 97 | ||
98 | list_for_each_entry_safe(priv, tmppriv, &tlist, catas_err.list) { | 98 | list_for_each_entry_safe(priv, tmppriv, &tlist, catas_err.list) { |
99 | struct pci_dev *pdev = priv->dev.pdev; | ||
100 | |||
99 | ret = mlx4_restart_one(priv->dev.pdev); | 101 | ret = mlx4_restart_one(priv->dev.pdev); |
100 | dev = &priv->dev; | 102 | /* 'priv' now is not valid */ |
101 | if (ret) | 103 | if (ret) |
102 | mlx4_err(dev, "Reset failed (%d)\n", ret); | 104 | printk(KERN_ERR "mlx4 %s: Reset failed (%d)\n", |
103 | else | 105 | pci_name(pdev), ret); |
106 | else { | ||
107 | dev = pci_get_drvdata(pdev); | ||
104 | mlx4_dbg(dev, "Reset succeeded\n"); | 108 | mlx4_dbg(dev, "Reset succeeded\n"); |
109 | } | ||
105 | } | 110 | } |
106 | } | 111 | } |
107 | 112 | ||
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index 90a94d215831..97db1c732342 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -1750,11 +1750,11 @@ static struct pcmcia_device_id pcnet_ids[] = { | |||
1750 | PCMCIA_DEVICE_PROD_ID2("EN-6200P2", 0xa996d078), | 1750 | PCMCIA_DEVICE_PROD_ID2("EN-6200P2", 0xa996d078), |
1751 | /* too generic! */ | 1751 | /* too generic! */ |
1752 | /* PCMCIA_DEVICE_PROD_ID12("PCMCIA", "10/100 Ethernet Card", 0x281f1c5d, 0x11b0ffc0), */ | 1752 | /* PCMCIA_DEVICE_PROD_ID12("PCMCIA", "10/100 Ethernet Card", 0x281f1c5d, 0x11b0ffc0), */ |
1753 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "PCMCIA", "EN2218-LAN/MODEM", 0x281f1c5d, 0x570f348e, "PCMLM28.cis"), | 1753 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "PCMCIA", "EN2218-LAN/MODEM", 0x281f1c5d, 0x570f348e, "cis/PCMLM28.cis"), |
1754 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "PCMCIA", "UE2218-LAN/MODEM", 0x281f1c5d, 0x6fdcacee, "PCMLM28.cis"), | 1754 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "PCMCIA", "UE2218-LAN/MODEM", 0x281f1c5d, 0x6fdcacee, "cis/PCMLM28.cis"), |
1755 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "Psion Dacom", "Gold Card V34 Ethernet", 0xf5f025c2, 0x338e8155, "PCMLM28.cis"), | 1755 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "Psion Dacom", "Gold Card V34 Ethernet", 0xf5f025c2, 0x338e8155, "cis/PCMLM28.cis"), |
1756 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "Psion Dacom", "Gold Card V34 Ethernet GSM", 0xf5f025c2, 0x4ae85d35, "PCMLM28.cis"), | 1756 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "Psion Dacom", "Gold Card V34 Ethernet GSM", 0xf5f025c2, 0x4ae85d35, "cis/PCMLM28.cis"), |
1757 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "LINKSYS", "PCMLM28", 0xf7cb0b07, 0x66881874, "PCMLM28.cis"), | 1757 | PCMCIA_PFC_DEVICE_CIS_PROD_ID12(0, "LINKSYS", "PCMLM28", 0xf7cb0b07, 0x66881874, "cis/PCMLM28.cis"), |
1758 | PCMCIA_MFC_DEVICE_CIS_PROD_ID12(0, "DAYNA COMMUNICATIONS", "LAN AND MODEM MULTIFUNCTION", 0x8fdf8f89, 0xdd5ed9e8, "DP83903.cis"), | 1758 | PCMCIA_MFC_DEVICE_CIS_PROD_ID12(0, "DAYNA COMMUNICATIONS", "LAN AND MODEM MULTIFUNCTION", 0x8fdf8f89, 0xdd5ed9e8, "DP83903.cis"), |
1759 | PCMCIA_MFC_DEVICE_CIS_PROD_ID4(0, "NSC MF LAN/Modem", 0x58fc6056, "DP83903.cis"), | 1759 | PCMCIA_MFC_DEVICE_CIS_PROD_ID4(0, "NSC MF LAN/Modem", 0x58fc6056, "DP83903.cis"), |
1760 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0175, 0x0000, "DP83903.cis"), | 1760 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0175, 0x0000, "DP83903.cis"), |
diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c index e0f9219a0aea..cc394d073755 100644 --- a/drivers/net/pppol2tp.c +++ b/drivers/net/pppol2tp.c | |||
@@ -229,7 +229,7 @@ static void pppol2tp_tunnel_free(struct pppol2tp_tunnel *tunnel); | |||
229 | static atomic_t pppol2tp_tunnel_count; | 229 | static atomic_t pppol2tp_tunnel_count; |
230 | static atomic_t pppol2tp_session_count; | 230 | static atomic_t pppol2tp_session_count; |
231 | static struct ppp_channel_ops pppol2tp_chan_ops = { pppol2tp_xmit , NULL }; | 231 | static struct ppp_channel_ops pppol2tp_chan_ops = { pppol2tp_xmit , NULL }; |
232 | static struct proto_ops pppol2tp_ops; | 232 | static const struct proto_ops pppol2tp_ops; |
233 | 233 | ||
234 | /* per-net private data for this module */ | 234 | /* per-net private data for this module */ |
235 | static int pppol2tp_net_id; | 235 | static int pppol2tp_net_id; |
@@ -2574,7 +2574,7 @@ static const struct file_operations pppol2tp_proc_fops = { | |||
2574 | * Init and cleanup | 2574 | * Init and cleanup |
2575 | *****************************************************************************/ | 2575 | *****************************************************************************/ |
2576 | 2576 | ||
2577 | static struct proto_ops pppol2tp_ops = { | 2577 | static const struct proto_ops pppol2tp_ops = { |
2578 | .family = AF_PPPOX, | 2578 | .family = AF_PPPOX, |
2579 | .owner = THIS_MODULE, | 2579 | .owner = THIS_MODULE, |
2580 | .release = pppol2tp_release, | 2580 | .release = pppol2tp_release, |
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 00bc65a0aac9..4bb52e9cd371 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -65,8 +65,8 @@ | |||
65 | #define RX_DEF_PENDING RX_MAX_PENDING | 65 | #define RX_DEF_PENDING RX_MAX_PENDING |
66 | 66 | ||
67 | /* This is the worst case number of transmit list elements for a single skb: | 67 | /* This is the worst case number of transmit list elements for a single skb: |
68 | VLAN + TSO + CKSUM + Data + skb_frags * DMA */ | 68 | VLAN:GSO + CKSUM + Data + skb_frags * DMA */ |
69 | #define MAX_SKB_TX_LE (4 + (sizeof(dma_addr_t)/sizeof(u32))*MAX_SKB_FRAGS) | 69 | #define MAX_SKB_TX_LE (2 + (sizeof(dma_addr_t)/sizeof(u32))*(MAX_SKB_FRAGS+1)) |
70 | #define TX_MIN_PENDING (MAX_SKB_TX_LE+1) | 70 | #define TX_MIN_PENDING (MAX_SKB_TX_LE+1) |
71 | #define TX_MAX_PENDING 4096 | 71 | #define TX_MAX_PENDING 4096 |
72 | #define TX_DEF_PENDING 127 | 72 | #define TX_DEF_PENDING 127 |
@@ -1567,11 +1567,13 @@ static unsigned tx_le_req(const struct sk_buff *skb) | |||
1567 | { | 1567 | { |
1568 | unsigned count; | 1568 | unsigned count; |
1569 | 1569 | ||
1570 | count = sizeof(dma_addr_t) / sizeof(u32); | 1570 | count = (skb_shinfo(skb)->nr_frags + 1) |
1571 | count += skb_shinfo(skb)->nr_frags * count; | 1571 | * (sizeof(dma_addr_t) / sizeof(u32)); |
1572 | 1572 | ||
1573 | if (skb_is_gso(skb)) | 1573 | if (skb_is_gso(skb)) |
1574 | ++count; | 1574 | ++count; |
1575 | else if (sizeof(dma_addr_t) == sizeof(u32)) | ||
1576 | ++count; /* possible vlan */ | ||
1575 | 1577 | ||
1576 | if (skb->ip_summed == CHECKSUM_PARTIAL) | 1578 | if (skb->ip_summed == CHECKSUM_PARTIAL) |
1577 | ++count; | 1579 | ++count; |
@@ -4548,16 +4550,18 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
4548 | if (hw->ports > 1) { | 4550 | if (hw->ports > 1) { |
4549 | struct net_device *dev1; | 4551 | struct net_device *dev1; |
4550 | 4552 | ||
4553 | err = -ENOMEM; | ||
4551 | dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default); | 4554 | dev1 = sky2_init_netdev(hw, 1, using_dac, wol_default); |
4552 | if (!dev1) | 4555 | if (dev1 && (err = register_netdev(dev1)) == 0) |
4553 | dev_warn(&pdev->dev, "allocation for second device failed\n"); | 4556 | sky2_show_addr(dev1); |
4554 | else if ((err = register_netdev(dev1))) { | 4557 | else { |
4555 | dev_warn(&pdev->dev, | 4558 | dev_warn(&pdev->dev, |
4556 | "register of second port failed (%d)\n", err); | 4559 | "register of second port failed (%d)\n", err); |
4557 | hw->dev[1] = NULL; | 4560 | hw->dev[1] = NULL; |
4558 | free_netdev(dev1); | 4561 | hw->ports = 1; |
4559 | } else | 4562 | if (dev1) |
4560 | sky2_show_addr(dev1); | 4563 | free_netdev(dev1); |
4564 | } | ||
4561 | } | 4565 | } |
4562 | 4566 | ||
4563 | setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw); | 4567 | setup_timer(&hw->watchdog_timer, sky2_watchdog, (unsigned long) hw); |
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c index 61be6d7680f6..05c91ee6921e 100644 --- a/drivers/net/smc91x.c +++ b/drivers/net/smc91x.c | |||
@@ -35,7 +35,7 @@ | |||
35 | * | 35 | * |
36 | * contributors: | 36 | * contributors: |
37 | * Daris A Nevil <dnevil@snmc.com> | 37 | * Daris A Nevil <dnevil@snmc.com> |
38 | * Nicolas Pitre <nico@cam.org> | 38 | * Nicolas Pitre <nico@fluxnic.net> |
39 | * Russell King <rmk@arm.linux.org.uk> | 39 | * Russell King <rmk@arm.linux.org.uk> |
40 | * | 40 | * |
41 | * History: | 41 | * History: |
@@ -58,7 +58,7 @@ | |||
58 | * 22/09/04 Nicolas Pitre big update (see commit log for details) | 58 | * 22/09/04 Nicolas Pitre big update (see commit log for details) |
59 | */ | 59 | */ |
60 | static const char version[] = | 60 | static const char version[] = |
61 | "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n"; | 61 | "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>\n"; |
62 | 62 | ||
63 | /* Debugging level */ | 63 | /* Debugging level */ |
64 | #ifndef SMC_DEBUG | 64 | #ifndef SMC_DEBUG |
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h index 57a159fac99f..3911be7c0cba 100644 --- a/drivers/net/smc91x.h +++ b/drivers/net/smc91x.h | |||
@@ -28,7 +28,7 @@ | |||
28 | . Authors | 28 | . Authors |
29 | . Erik Stahlman <erik@vt.edu> | 29 | . Erik Stahlman <erik@vt.edu> |
30 | . Daris A Nevil <dnevil@snmc.com> | 30 | . Daris A Nevil <dnevil@snmc.com> |
31 | . Nicolas Pitre <nico@cam.org> | 31 | . Nicolas Pitre <nico@fluxnic.net> |
32 | . | 32 | . |
33 | ---------------------------------------------------------------------------*/ | 33 | ---------------------------------------------------------------------------*/ |
34 | #ifndef _SMC91X_H_ | 34 | #ifndef _SMC91X_H_ |
@@ -83,34 +83,6 @@ static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg) | |||
83 | } | 83 | } |
84 | } | 84 | } |
85 | 85 | ||
86 | #elif defined(CONFIG_BLACKFIN) | ||
87 | |||
88 | #define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH | ||
89 | #define RPC_LSA_DEFAULT RPC_LED_100_10 | ||
90 | #define RPC_LSB_DEFAULT RPC_LED_TX_RX | ||
91 | |||
92 | #define SMC_CAN_USE_8BIT 0 | ||
93 | #define SMC_CAN_USE_16BIT 1 | ||
94 | # if defined(CONFIG_BF561) | ||
95 | #define SMC_CAN_USE_32BIT 1 | ||
96 | # else | ||
97 | #define SMC_CAN_USE_32BIT 0 | ||
98 | # endif | ||
99 | #define SMC_IO_SHIFT 0 | ||
100 | #define SMC_NOWAIT 1 | ||
101 | #define SMC_USE_BFIN_DMA 0 | ||
102 | |||
103 | #define SMC_inw(a, r) readw((a) + (r)) | ||
104 | #define SMC_outw(v, a, r) writew(v, (a) + (r)) | ||
105 | #define SMC_insw(a, r, p, l) readsw((a) + (r), p, l) | ||
106 | #define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l) | ||
107 | # if SMC_CAN_USE_32BIT | ||
108 | #define SMC_inl(a, r) readl((a) + (r)) | ||
109 | #define SMC_outl(v, a, r) writel(v, (a) + (r)) | ||
110 | #define SMC_insl(a, r, p, l) readsl((a) + (r), p, l) | ||
111 | #define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l) | ||
112 | # endif | ||
113 | |||
114 | #elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6) | 86 | #elif defined(CONFIG_REDWOOD_5) || defined(CONFIG_REDWOOD_6) |
115 | 87 | ||
116 | /* We can only do 16-bit reads and writes in the static memory space. */ | 88 | /* We can only do 16-bit reads and writes in the static memory space. */ |
diff --git a/drivers/net/usb/cdc-phonet.c b/drivers/net/usb/cdc-phonet.c index 97e54d9d03ce..33d5c579c5ad 100644 --- a/drivers/net/usb/cdc-phonet.c +++ b/drivers/net/usb/cdc-phonet.c | |||
@@ -264,7 +264,6 @@ static int usbpn_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
264 | switch (cmd) { | 264 | switch (cmd) { |
265 | case SIOCPNGAUTOCONF: | 265 | case SIOCPNGAUTOCONF: |
266 | req->ifr_phonet_autoconf.device = PN_DEV_PC; | 266 | req->ifr_phonet_autoconf.device = PN_DEV_PC; |
267 | printk(KERN_CRIT"device is PN_DEV_PC\n"); | ||
268 | return 0; | 267 | return 0; |
269 | } | 268 | } |
270 | return -ENOIOCTLCMD; | 269 | return -ENOIOCTLCMD; |
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig index ad89d23968df..49ea9c92b7e6 100644 --- a/drivers/net/wireless/Kconfig +++ b/drivers/net/wireless/Kconfig | |||
@@ -5,6 +5,7 @@ | |||
5 | menuconfig WLAN | 5 | menuconfig WLAN |
6 | bool "Wireless LAN" | 6 | bool "Wireless LAN" |
7 | depends on !S390 | 7 | depends on !S390 |
8 | default y | ||
8 | ---help--- | 9 | ---help--- |
9 | This section contains all the pre 802.11 and 802.11 wireless | 10 | This section contains all the pre 802.11 and 802.11 wireless |
10 | device drivers. For a complete list of drivers and documentation | 11 | device drivers. For a complete list of drivers and documentation |
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c index a7cbb07988cf..2b493742ef10 100644 --- a/drivers/net/wireless/ath/ath9k/ani.c +++ b/drivers/net/wireless/ath/ath9k/ani.c | |||
@@ -327,7 +327,8 @@ static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) | |||
327 | aniState->firstepLevel + 1); | 327 | aniState->firstepLevel + 1); |
328 | return; | 328 | return; |
329 | } else { | 329 | } else { |
330 | if (conf->channel->band == IEEE80211_BAND_2GHZ) { | 330 | if ((conf->channel->band == IEEE80211_BAND_2GHZ) && |
331 | !conf_is_ht(conf)) { | ||
331 | if (!aniState->ofdmWeakSigDetectOff) | 332 | if (!aniState->ofdmWeakSigDetectOff) |
332 | ath9k_hw_ani_control(ah, | 333 | ath9k_hw_ani_control(ah, |
333 | ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION, | 334 | ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION, |
@@ -369,7 +370,8 @@ static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah) | |||
369 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, | 370 | ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, |
370 | aniState->firstepLevel + 1); | 371 | aniState->firstepLevel + 1); |
371 | } else { | 372 | } else { |
372 | if (conf->channel->band == IEEE80211_BAND_2GHZ) { | 373 | if ((conf->channel->band == IEEE80211_BAND_2GHZ) && |
374 | !conf_is_ht(conf)) { | ||
373 | if (aniState->firstepLevel > 0) | 375 | if (aniState->firstepLevel > 0) |
374 | ath9k_hw_ani_control(ah, | 376 | ath9k_hw_ani_control(ah, |
375 | ATH9K_ANI_FIRSTEP_LEVEL, 0); | 377 | ATH9K_ANI_FIRSTEP_LEVEL, 0); |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index 7a9a3fa55425..e789792a36bc 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -2289,11 +2289,7 @@ static int b43_upload_microcode(struct b43_wldev *dev) | |||
2289 | err = -ENODEV; | 2289 | err = -ENODEV; |
2290 | goto error; | 2290 | goto error; |
2291 | } | 2291 | } |
2292 | msleep_interruptible(50); | 2292 | msleep(50); |
2293 | if (signal_pending(current)) { | ||
2294 | err = -EINTR; | ||
2295 | goto error; | ||
2296 | } | ||
2297 | } | 2293 | } |
2298 | b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); /* dummy read */ | 2294 | b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); /* dummy read */ |
2299 | 2295 | ||
@@ -4287,6 +4283,8 @@ static int b43_wireless_core_init(struct b43_wldev *dev) | |||
4287 | if (!dev->suspend_in_progress) | 4283 | if (!dev->suspend_in_progress) |
4288 | b43_rng_init(wl); | 4284 | b43_rng_init(wl); |
4289 | 4285 | ||
4286 | ieee80211_wake_queues(dev->wl->hw); | ||
4287 | |||
4290 | b43_set_status(dev, B43_STAT_INITIALIZED); | 4288 | b43_set_status(dev, B43_STAT_INITIALIZED); |
4291 | 4289 | ||
4292 | if (!dev->suspend_in_progress) | 4290 | if (!dev->suspend_in_progress) |
diff --git a/drivers/net/wireless/hostap/hostap_main.c b/drivers/net/wireless/hostap/hostap_main.c index 6fe122f18c0d..eb57d1ea361f 100644 --- a/drivers/net/wireless/hostap/hostap_main.c +++ b/drivers/net/wireless/hostap/hostap_main.c | |||
@@ -875,15 +875,16 @@ void hostap_setup_dev(struct net_device *dev, local_info_t *local, | |||
875 | 875 | ||
876 | switch(type) { | 876 | switch(type) { |
877 | case HOSTAP_INTERFACE_AP: | 877 | case HOSTAP_INTERFACE_AP: |
878 | dev->tx_queue_len = 0; /* use main radio device queue */ | ||
878 | dev->netdev_ops = &hostap_mgmt_netdev_ops; | 879 | dev->netdev_ops = &hostap_mgmt_netdev_ops; |
879 | dev->type = ARPHRD_IEEE80211; | 880 | dev->type = ARPHRD_IEEE80211; |
880 | dev->header_ops = &hostap_80211_ops; | 881 | dev->header_ops = &hostap_80211_ops; |
881 | break; | 882 | break; |
882 | case HOSTAP_INTERFACE_MASTER: | 883 | case HOSTAP_INTERFACE_MASTER: |
883 | dev->tx_queue_len = 0; /* use main radio device queue */ | ||
884 | dev->netdev_ops = &hostap_master_ops; | 884 | dev->netdev_ops = &hostap_master_ops; |
885 | break; | 885 | break; |
886 | default: | 886 | default: |
887 | dev->tx_queue_len = 0; /* use main radio device queue */ | ||
887 | dev->netdev_ops = &hostap_netdev_ops; | 888 | dev->netdev_ops = &hostap_netdev_ops; |
888 | } | 889 | } |
889 | 890 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 6a13bfbc9d98..ca61d3796cef 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -2346,6 +2346,7 @@ struct iwl_cfg iwl4965_agn_cfg = { | |||
2346 | .mod_params = &iwl4965_mod_params, | 2346 | .mod_params = &iwl4965_mod_params, |
2347 | .use_isr_legacy = true, | 2347 | .use_isr_legacy = true, |
2348 | .ht_greenfield_support = false, | 2348 | .ht_greenfield_support = false, |
2349 | .broken_powersave = true, | ||
2349 | }; | 2350 | }; |
2350 | 2351 | ||
2351 | /* Module firmware */ | 2352 | /* Module firmware */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 40b207aa8fef..346dc06fa7b7 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -760,6 +760,7 @@ static u32 rs_get_lower_rate(struct iwl_lq_sta *lq_sta, | |||
760 | u16 high_low; | 760 | u16 high_low; |
761 | u8 switch_to_legacy = 0; | 761 | u8 switch_to_legacy = 0; |
762 | u8 is_green = lq_sta->is_green; | 762 | u8 is_green = lq_sta->is_green; |
763 | struct iwl_priv *priv = lq_sta->drv; | ||
763 | 764 | ||
764 | /* check if we need to switch from HT to legacy rates. | 765 | /* check if we need to switch from HT to legacy rates. |
765 | * assumption is that mandatory rates (1Mbps or 6Mbps) | 766 | * assumption is that mandatory rates (1Mbps or 6Mbps) |
@@ -773,7 +774,8 @@ static u32 rs_get_lower_rate(struct iwl_lq_sta *lq_sta, | |||
773 | tbl->lq_type = LQ_G; | 774 | tbl->lq_type = LQ_G; |
774 | 775 | ||
775 | if (num_of_ant(tbl->ant_type) > 1) | 776 | if (num_of_ant(tbl->ant_type) > 1) |
776 | tbl->ant_type = ANT_A;/*FIXME:RS*/ | 777 | tbl->ant_type = |
778 | first_antenna(priv->hw_params.valid_tx_ant); | ||
777 | 779 | ||
778 | tbl->is_ht40 = 0; | 780 | tbl->is_ht40 = 0; |
779 | tbl->is_SGI = 0; | 781 | tbl->is_SGI = 0; |
@@ -883,6 +885,12 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, | |||
883 | mac_index &= RATE_MCS_CODE_MSK; /* Remove # of streams */ | 885 | mac_index &= RATE_MCS_CODE_MSK; /* Remove # of streams */ |
884 | if (mac_index >= (IWL_RATE_9M_INDEX - IWL_FIRST_OFDM_RATE)) | 886 | if (mac_index >= (IWL_RATE_9M_INDEX - IWL_FIRST_OFDM_RATE)) |
885 | mac_index++; | 887 | mac_index++; |
888 | /* | ||
889 | * mac80211 HT index is always zero-indexed; we need to move | ||
890 | * HT OFDM rates after CCK rates in 2.4 GHz band | ||
891 | */ | ||
892 | if (priv->band == IEEE80211_BAND_2GHZ) | ||
893 | mac_index += IWL_FIRST_OFDM_RATE; | ||
886 | } | 894 | } |
887 | 895 | ||
888 | if ((mac_index < 0) || | 896 | if ((mac_index < 0) || |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index acfd7b40afb8..fd26c0dc9c54 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -1585,9 +1585,12 @@ int iwl_setup_mac(struct iwl_priv *priv) | |||
1585 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | 1585 | hw->flags = IEEE80211_HW_SIGNAL_DBM | |
1586 | IEEE80211_HW_NOISE_DBM | | 1586 | IEEE80211_HW_NOISE_DBM | |
1587 | IEEE80211_HW_AMPDU_AGGREGATION | | 1587 | IEEE80211_HW_AMPDU_AGGREGATION | |
1588 | IEEE80211_HW_SPECTRUM_MGMT | | 1588 | IEEE80211_HW_SPECTRUM_MGMT; |
1589 | IEEE80211_HW_SUPPORTS_PS | | 1589 | |
1590 | IEEE80211_HW_SUPPORTS_DYNAMIC_PS; | 1590 | if (!priv->cfg->broken_powersave) |
1591 | hw->flags |= IEEE80211_HW_SUPPORTS_PS | | ||
1592 | IEEE80211_HW_SUPPORTS_DYNAMIC_PS; | ||
1593 | |||
1591 | hw->wiphy->interface_modes = | 1594 | hw->wiphy->interface_modes = |
1592 | BIT(NL80211_IFTYPE_STATION) | | 1595 | BIT(NL80211_IFTYPE_STATION) | |
1593 | BIT(NL80211_IFTYPE_ADHOC); | 1596 | BIT(NL80211_IFTYPE_ADHOC); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index c04d2a270819..7ff9ffb2b702 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -252,6 +252,7 @@ struct iwl_cfg { | |||
252 | const u16 max_ll_items; | 252 | const u16 max_ll_items; |
253 | const bool shadow_ram_support; | 253 | const bool shadow_ram_support; |
254 | const bool ht_greenfield_support; | 254 | const bool ht_greenfield_support; |
255 | const bool broken_powersave; | ||
255 | }; | 256 | }; |
256 | 257 | ||
257 | /*************************** | 258 | /*************************** |
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c index 4ec6a8307cc6..60be976afff8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-power.c +++ b/drivers/net/wireless/iwlwifi/iwl-power.c | |||
@@ -292,8 +292,9 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force) | |||
292 | else | 292 | else |
293 | dtimper = 1; | 293 | dtimper = 1; |
294 | 294 | ||
295 | /* TT power setting overwrites everything */ | 295 | if (priv->cfg->broken_powersave) |
296 | if (tt->state >= IWL_TI_1) | 296 | iwl_power_sleep_cam_cmd(priv, &cmd); |
297 | else if (tt->state >= IWL_TI_1) | ||
297 | iwl_static_sleep_cmd(priv, &cmd, tt->tt_power_mode, dtimper); | 298 | iwl_static_sleep_cmd(priv, &cmd, tt->tt_power_mode, dtimper); |
298 | else if (!enabled) | 299 | else if (!enabled) |
299 | iwl_power_sleep_cam_cmd(priv, &cmd); | 300 | iwl_power_sleep_cam_cmd(priv, &cmd); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c index 8150c5c3a16b..b90adcb73b06 100644 --- a/drivers/net/wireless/iwlwifi/iwl-rx.c +++ b/drivers/net/wireless/iwlwifi/iwl-rx.c | |||
@@ -239,26 +239,22 @@ void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority) | |||
239 | struct iwl_rx_queue *rxq = &priv->rxq; | 239 | struct iwl_rx_queue *rxq = &priv->rxq; |
240 | struct list_head *element; | 240 | struct list_head *element; |
241 | struct iwl_rx_mem_buffer *rxb; | 241 | struct iwl_rx_mem_buffer *rxb; |
242 | struct sk_buff *skb; | ||
242 | unsigned long flags; | 243 | unsigned long flags; |
243 | 244 | ||
244 | while (1) { | 245 | while (1) { |
245 | spin_lock_irqsave(&rxq->lock, flags); | 246 | spin_lock_irqsave(&rxq->lock, flags); |
246 | |||
247 | if (list_empty(&rxq->rx_used)) { | 247 | if (list_empty(&rxq->rx_used)) { |
248 | spin_unlock_irqrestore(&rxq->lock, flags); | 248 | spin_unlock_irqrestore(&rxq->lock, flags); |
249 | return; | 249 | return; |
250 | } | 250 | } |
251 | element = rxq->rx_used.next; | ||
252 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); | ||
253 | list_del(element); | ||
254 | |||
255 | spin_unlock_irqrestore(&rxq->lock, flags); | 251 | spin_unlock_irqrestore(&rxq->lock, flags); |
256 | 252 | ||
257 | /* Alloc a new receive buffer */ | 253 | /* Alloc a new receive buffer */ |
258 | rxb->skb = alloc_skb(priv->hw_params.rx_buf_size + 256, | 254 | skb = alloc_skb(priv->hw_params.rx_buf_size + 256, |
259 | priority); | 255 | priority); |
260 | 256 | ||
261 | if (!rxb->skb) { | 257 | if (!skb) { |
262 | IWL_CRIT(priv, "Can not allocate SKB buffers\n"); | 258 | IWL_CRIT(priv, "Can not allocate SKB buffers\n"); |
263 | /* We don't reschedule replenish work here -- we will | 259 | /* We don't reschedule replenish work here -- we will |
264 | * call the restock method and if it still needs | 260 | * call the restock method and if it still needs |
@@ -266,6 +262,20 @@ void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority) | |||
266 | break; | 262 | break; |
267 | } | 263 | } |
268 | 264 | ||
265 | spin_lock_irqsave(&rxq->lock, flags); | ||
266 | |||
267 | if (list_empty(&rxq->rx_used)) { | ||
268 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
269 | dev_kfree_skb_any(skb); | ||
270 | return; | ||
271 | } | ||
272 | element = rxq->rx_used.next; | ||
273 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); | ||
274 | list_del(element); | ||
275 | |||
276 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
277 | |||
278 | rxb->skb = skb; | ||
269 | /* Get physical address of RB/SKB */ | 279 | /* Get physical address of RB/SKB */ |
270 | rxb->real_dma_addr = pci_map_single( | 280 | rxb->real_dma_addr = pci_map_single( |
271 | priv->pci_dev, | 281 | priv->pci_dev, |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 2238c9f2018c..090966837f3c 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -1134,6 +1134,7 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority) | |||
1134 | struct iwl_rx_queue *rxq = &priv->rxq; | 1134 | struct iwl_rx_queue *rxq = &priv->rxq; |
1135 | struct list_head *element; | 1135 | struct list_head *element; |
1136 | struct iwl_rx_mem_buffer *rxb; | 1136 | struct iwl_rx_mem_buffer *rxb; |
1137 | struct sk_buff *skb; | ||
1137 | unsigned long flags; | 1138 | unsigned long flags; |
1138 | 1139 | ||
1139 | while (1) { | 1140 | while (1) { |
@@ -1143,17 +1144,11 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority) | |||
1143 | spin_unlock_irqrestore(&rxq->lock, flags); | 1144 | spin_unlock_irqrestore(&rxq->lock, flags); |
1144 | return; | 1145 | return; |
1145 | } | 1146 | } |
1146 | |||
1147 | element = rxq->rx_used.next; | ||
1148 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); | ||
1149 | list_del(element); | ||
1150 | spin_unlock_irqrestore(&rxq->lock, flags); | 1147 | spin_unlock_irqrestore(&rxq->lock, flags); |
1151 | 1148 | ||
1152 | /* Alloc a new receive buffer */ | 1149 | /* Alloc a new receive buffer */ |
1153 | rxb->skb = | 1150 | skb = alloc_skb(priv->hw_params.rx_buf_size, priority); |
1154 | alloc_skb(priv->hw_params.rx_buf_size, | 1151 | if (!skb) { |
1155 | priority); | ||
1156 | if (!rxb->skb) { | ||
1157 | if (net_ratelimit()) | 1152 | if (net_ratelimit()) |
1158 | IWL_CRIT(priv, ": Can not allocate SKB buffers\n"); | 1153 | IWL_CRIT(priv, ": Can not allocate SKB buffers\n"); |
1159 | /* We don't reschedule replenish work here -- we will | 1154 | /* We don't reschedule replenish work here -- we will |
@@ -1162,6 +1157,19 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority) | |||
1162 | break; | 1157 | break; |
1163 | } | 1158 | } |
1164 | 1159 | ||
1160 | spin_lock_irqsave(&rxq->lock, flags); | ||
1161 | if (list_empty(&rxq->rx_used)) { | ||
1162 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1163 | dev_kfree_skb_any(skb); | ||
1164 | return; | ||
1165 | } | ||
1166 | element = rxq->rx_used.next; | ||
1167 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); | ||
1168 | list_del(element); | ||
1169 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1170 | |||
1171 | rxb->skb = skb; | ||
1172 | |||
1165 | /* If radiotap head is required, reserve some headroom here. | 1173 | /* If radiotap head is required, reserve some headroom here. |
1166 | * The physical head count is a variable rx_stats->phy_count. | 1174 | * The physical head count is a variable rx_stats->phy_count. |
1167 | * We reserve 4 bytes here. Plus these extra bytes, the | 1175 | * We reserve 4 bytes here. Plus these extra bytes, the |
diff --git a/drivers/net/wireless/iwmc3200wifi/Kconfig b/drivers/net/wireless/iwmc3200wifi/Kconfig index c62da435285a..c25a04371ca8 100644 --- a/drivers/net/wireless/iwmc3200wifi/Kconfig +++ b/drivers/net/wireless/iwmc3200wifi/Kconfig | |||
@@ -24,8 +24,8 @@ config IWM_DEBUG | |||
24 | To see the list of debug modules and levels, see iwm/debug.h | 24 | To see the list of debug modules and levels, see iwm/debug.h |
25 | 25 | ||
26 | For example, if you want the full MLME debug output: | 26 | For example, if you want the full MLME debug output: |
27 | echo 0xff > /debug/iwm/phyN/debug/mlme | 27 | echo 0xff > /sys/kernel/debug/iwm/phyN/debug/mlme |
28 | 28 | ||
29 | Or, if you want the full debug, for all modules: | 29 | Or, if you want the full debug, for all modules: |
30 | echo 0xff > /debug/iwm/phyN/debug/level | 30 | echo 0xff > /sys/kernel/debug/iwm/phyN/debug/level |
31 | echo 0xff > /debug/iwm/phyN/debug/modules | 31 | echo 0xff > /sys/kernel/debug/iwm/phyN/debug/modules |
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c index e44460ff149c..17e199546eeb 100644 --- a/drivers/net/wireless/p54/p54usb.c +++ b/drivers/net/wireless/p54/p54usb.c | |||
@@ -67,6 +67,7 @@ static struct usb_device_id p54u_table[] __devinitdata = { | |||
67 | {USB_DEVICE(0x0bf8, 0x1009)}, /* FUJITSU E-5400 USB D1700*/ | 67 | {USB_DEVICE(0x0bf8, 0x1009)}, /* FUJITSU E-5400 USB D1700*/ |
68 | {USB_DEVICE(0x0cde, 0x0006)}, /* Medion MD40900 */ | 68 | {USB_DEVICE(0x0cde, 0x0006)}, /* Medion MD40900 */ |
69 | {USB_DEVICE(0x0cde, 0x0008)}, /* Sagem XG703A */ | 69 | {USB_DEVICE(0x0cde, 0x0008)}, /* Sagem XG703A */ |
70 | {USB_DEVICE(0x0cde, 0x0015)}, /* Zcomax XG-705A */ | ||
70 | {USB_DEVICE(0x0d8e, 0x3762)}, /* DLink DWL-G120 Cohiba */ | 71 | {USB_DEVICE(0x0d8e, 0x3762)}, /* DLink DWL-G120 Cohiba */ |
71 | {USB_DEVICE(0x124a, 0x4025)}, /* IOGear GWU513 (GW3887IK chip) */ | 72 | {USB_DEVICE(0x124a, 0x4025)}, /* IOGear GWU513 (GW3887IK chip) */ |
72 | {USB_DEVICE(0x1260, 0xee22)}, /* SMC 2862W-G version 2 */ | 73 | {USB_DEVICE(0x1260, 0xee22)}, /* SMC 2862W-G version 2 */ |
diff --git a/drivers/net/wireless/wl12xx/wl1271_main.c b/drivers/net/wireless/wl12xx/wl1271_main.c index d9169b47ac42..27298b19d5bd 100644 --- a/drivers/net/wireless/wl12xx/wl1271_main.c +++ b/drivers/net/wireless/wl12xx/wl1271_main.c | |||
@@ -644,11 +644,10 @@ static int wl1271_op_config_interface(struct ieee80211_hw *hw, | |||
644 | { | 644 | { |
645 | struct wl1271 *wl = hw->priv; | 645 | struct wl1271 *wl = hw->priv; |
646 | struct sk_buff *beacon; | 646 | struct sk_buff *beacon; |
647 | DECLARE_MAC_BUF(mac); | ||
648 | int ret; | 647 | int ret; |
649 | 648 | ||
650 | wl1271_debug(DEBUG_MAC80211, "mac80211 config_interface bssid %s", | 649 | wl1271_debug(DEBUG_MAC80211, "mac80211 config_interface bssid %pM", |
651 | print_mac(mac, conf->bssid)); | 650 | conf->bssid); |
652 | wl1271_dump_ascii(DEBUG_MAC80211, "ssid: ", conf->ssid, | 651 | wl1271_dump_ascii(DEBUG_MAC80211, "ssid: ", conf->ssid, |
653 | conf->ssid_len); | 652 | conf->ssid_len); |
654 | 653 | ||