4 files changed, 12 insertions, 28 deletions

diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index a978984d78a5..ef11dc639461 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -113,41 +113,32 @@ static void ath_pci_aspm_init(struct ath_common *common)
         struct ath_hw *ah = sc->sc_ah;
         struct pci_dev *pdev = to_pci_dev(sc->dev);
         struct pci_dev *parent;
-        int pos;
-        u8 aspm;
+        u16 aspm;
 
         if (!ah->is_pciexpress)
                 return;
 
-        pos = pci_pcie_cap(pdev);
-        if (!pos)
-                return;
-
         parent = pdev->bus->self;
         if (!parent)
                 return;
 
         if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_NONE) {
                 /* Bluetooth coexistance requires disabling ASPM. */
-                pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &aspm);
-                aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
-                pci_write_config_byte(pdev, pos + PCI_EXP_LNKCTL, aspm);
+                pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL,
+                        PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
 
                 /*
                  * Both upstream and downstream PCIe components should
                  * have the same ASPM settings.
                  */
-                pos = pci_pcie_cap(parent);
-                pci_read_config_byte(parent, pos + PCI_EXP_LNKCTL, &aspm);
-                aspm &= ~(PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
-                pci_write_config_byte(parent, pos + PCI_EXP_LNKCTL, aspm);
+                pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
+                        PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1);
 
                 ath_info(common, "Disabling ASPM since BTCOEX is enabled\n");
                 return;
         }
 
-        pos = pci_pcie_cap(parent);
-        pci_read_config_byte(parent, pos +  PCI_EXP_LNKCTL, &aspm);
+        pcie_capability_read_word(parent, PCI_EXP_LNKCTL, &aspm);
         if (aspm & (PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1)) {
                 ah->aspm_enabled = true;
                 /* Initialize PCIe PM and SERDES registers. */
diff --git a/drivers/net/wireless/iwlegacy/common.h b/drivers/net/wireless/iwlegacy/common.h
index 5f5017767b99..724682669060 100644
--- a/drivers/net/wireless/iwlegacy/common.h
+++ b/drivers/net/wireless/iwlegacy/common.h
@@ -1832,10 +1832,8 @@ int il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd);
 static inline u16
 il_pcie_link_ctl(struct il_priv *il)
 {
-        int pos;
         u16 pci_lnk_ctl;
-        pos = pci_pcie_cap(il->pci_dev);
-        pci_read_config_word(il->pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
+        pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &pci_lnk_ctl);
         return pci_lnk_ctl;
 }
 
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index dbeebef562d5..063ecaff5b56 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -675,13 +675,10 @@ static void iwl_set_pwr_vmain(struct iwl_trans *trans)
 static u16 iwl_pciexp_link_ctrl(struct iwl_trans *trans)
 {
         struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
-        int pos;
         u16 pci_lnk_ctl;
 
-        struct pci_dev *pci_dev = trans_pcie->pci_dev;
-
-        pos = pci_pcie_cap(pci_dev);
-        pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
+        pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL,
+                                  &pci_lnk_ctl);
         return pci_lnk_ctl;
 }
 
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c
index 80f75d3ba84a..5983631a1b1a 100644
--- a/drivers/net/wireless/rtlwifi/pci.c
+++ b/drivers/net/wireless/rtlwifi/pci.c
@@ -372,13 +372,11 @@ static void rtl_pci_parse_configuration(struct pci_dev *pdev,
         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 
         u8 tmp;
-        int pos;
-        u8 linkctrl_reg;
+        u16 linkctrl_reg;
 
         /*Link Control Register */
-        pos = pci_pcie_cap(pdev);
-        pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
-        pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
+        pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &linkctrl_reg);
+        pcipriv->ndis_adapter.linkctrl_reg = (u8)linkctrl_reg;
 
         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Link Control Register =%x\n",
                  pcipriv->ndis_adapter.linkctrl_reg);