diff options
Diffstat (limited to 'drivers/net/wireless')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-5000.c | 15 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-csr.h | 10 | ||||
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-prph.h | 12 |
3 files changed, 31 insertions, 6 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index f7bbd12193f9..1d793c093f1a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -93,6 +93,13 @@ static int iwl5000_apm_init(struct iwl_priv *priv) | |||
93 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, | 93 | iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, |
94 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); | 94 | CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); |
95 | 95 | ||
96 | /* Set FH wait treshold to maximum (HW error during stress W/A) */ | ||
97 | iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL); | ||
98 | |||
99 | /* enable HAP INTA to move device L1a -> L0s */ | ||
100 | iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, | ||
101 | CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A); | ||
102 | |||
96 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL); | 103 | iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL); |
97 | 104 | ||
98 | /* set "initialization complete" bit to move adapter | 105 | /* set "initialization complete" bit to move adapter |
@@ -230,6 +237,14 @@ static void iwl5000_nic_config(struct iwl_priv *priv) | |||
230 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | | 237 | CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI | |
231 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); | 238 | CSR_HW_IF_CONFIG_REG_BIT_MAC_SI); |
232 | 239 | ||
240 | /* W/A : NIC is stuck in a reset state after Early PCIe power off | ||
241 | * (PCIe power is lost before PERST# is asserted), | ||
242 | * causing ME FW to lose ownership and not being able to obtain it back. | ||
243 | */ | ||
244 | iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, | ||
245 | APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS, | ||
246 | ~APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS); | ||
247 | |||
233 | spin_unlock_irqrestore(&priv->lock, flags); | 248 | spin_unlock_irqrestore(&priv->lock, flags); |
234 | } | 249 | } |
235 | 250 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h index 545ed692d889..52629fbd835a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-csr.h +++ b/drivers/net/wireless/iwlwifi/iwl-csr.h | |||
@@ -104,6 +104,7 @@ | |||
104 | * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step | 104 | * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step |
105 | */ | 105 | */ |
106 | #define CSR_HW_REV_WA_REG (CSR_BASE+0x22C) | 106 | #define CSR_HW_REV_WA_REG (CSR_BASE+0x22C) |
107 | #define CSR_DBG_HPET_MEM_REG (CSR_BASE+0x240) | ||
107 | 108 | ||
108 | /* Bits for CSR_HW_IF_CONFIG_REG */ | 109 | /* Bits for CSR_HW_IF_CONFIG_REG */ |
109 | #define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010) | 110 | #define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010) |
@@ -118,7 +119,12 @@ | |||
118 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000) | 119 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000) |
119 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000) | 120 | #define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000) |
120 | 121 | ||
121 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) | 122 | #define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) |
123 | #define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) | ||
124 | #define CSR_HW_IF_CONFIG_REG_BIT_PCI_OWN_SEM (0x00400000) | ||
125 | #define CSR_HW_IF_CONFIG_REG_BIT_ME_OWN (0x02000000) | ||
126 | #define CSR_HW_IF_CONFIG_REG_BIT_WAKE_ME (0x08000000) | ||
127 | |||
122 | 128 | ||
123 | /* interrupt flags in INTA, set by uCode or hardware (e.g. dma), | 129 | /* interrupt flags in INTA, set by uCode or hardware (e.g. dma), |
124 | * acknowledged (reset) by host writing "1" to flagged bits. */ | 130 | * acknowledged (reset) by host writing "1" to flagged bits. */ |
@@ -236,6 +242,8 @@ | |||
236 | #define CSR39_ANA_PLL_CFG_VAL (0x01000000) | 242 | #define CSR39_ANA_PLL_CFG_VAL (0x01000000) |
237 | #define CSR50_ANA_PLL_CFG_VAL (0x00880300) | 243 | #define CSR50_ANA_PLL_CFG_VAL (0x00880300) |
238 | 244 | ||
245 | /* HPET MEM debug */ | ||
246 | #define CSR_DBG_HPET_MEM_REG_VAL (0xFFFF0000) | ||
239 | /*=== HBUS (Host-side Bus) ===*/ | 247 | /*=== HBUS (Host-side Bus) ===*/ |
240 | #define HBUS_BASE (0x400) | 248 | #define HBUS_BASE (0x400) |
241 | /* | 249 | /* |
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h index 70d9c7568b98..ee5afd48d3af 100644 --- a/drivers/net/wireless/iwlwifi/iwl-prph.h +++ b/drivers/net/wireless/iwlwifi/iwl-prph.h | |||
@@ -84,14 +84,16 @@ | |||
84 | #define APMG_CLK_VAL_DMA_CLK_RQT (0x00000200) | 84 | #define APMG_CLK_VAL_DMA_CLK_RQT (0x00000200) |
85 | #define APMG_CLK_VAL_BSM_CLK_RQT (0x00000800) | 85 | #define APMG_CLK_VAL_BSM_CLK_RQT (0x00000800) |
86 | 86 | ||
87 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) | ||
88 | 87 | ||
89 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) | 88 | #define APMG_PS_CTRL_EARLY_PWR_OFF_RESET_DIS (0x00400000) |
89 | #define APMG_PS_CTRL_VAL_RESET_REQ (0x04000000) | ||
90 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) | ||
91 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) | ||
92 | #define APMG_PS_CTRL_VAL_PWR_SRC_MAX (0x01000000) /* 3945 only */ | ||
93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x02000000) | ||
90 | 94 | ||
91 | #define APMG_PS_CTRL_MSK_PWR_SRC (0x03000000) | ||
92 | #define APMG_PS_CTRL_VAL_PWR_SRC_VMAIN (0x00000000) | ||
93 | #define APMG_PS_CTRL_VAL_PWR_SRC_VAUX (0x01000000) | ||
94 | 95 | ||
96 | #define APMG_PCIDEV_STT_VAL_L1_ACT_DIS (0x00000800) | ||
95 | 97 | ||
96 | /** | 98 | /** |
97 | * BSM (Bootstrap State Machine) | 99 | * BSM (Bootstrap State Machine) |