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-rw-r--r--drivers/net/wireless/orinoco_nortel.c7
-rw-r--r--drivers/net/wireless/orinoco_pci.c69
-rw-r--r--drivers/net/wireless/orinoco_plx.c42
-rw-r--r--drivers/net/wireless/orinoco_tmd.c16
4 files changed, 22 insertions, 112 deletions
diff --git a/drivers/net/wireless/orinoco_nortel.c b/drivers/net/wireless/orinoco_nortel.c
index deb22fb35515..1596182f7412 100644
--- a/drivers/net/wireless/orinoco_nortel.c
+++ b/drivers/net/wireless/orinoco_nortel.c
@@ -3,7 +3,6 @@
3 * Driver for Prism II devices which would usually be driven by orinoco_cs, 3 * Driver for Prism II devices which would usually be driven by orinoco_cs,
4 * but are connected to the PCI bus by a PCI-to-PCMCIA adapter used in 4 * but are connected to the PCI bus by a PCI-to-PCMCIA adapter used in
5 * Nortel emobility, Symbol LA-4113 and Symbol LA-4123. 5 * Nortel emobility, Symbol LA-4113 and Symbol LA-4123.
6 * but are connected to the PCI bus by a Nortel PCI-PCMCIA-Adapter.
7 * 6 *
8 * Copyright (C) 2002 Tobias Hoffmann 7 * Copyright (C) 2002 Tobias Hoffmann
9 * (C) 2003 Christoph Jungegger <disdos@traum404.de> 8 * (C) 2003 Christoph Jungegger <disdos@traum404.de>
@@ -57,7 +56,7 @@
57 56
58 57
59/* 58/*
60 * Do a soft reset of the PCI card using the Configuration Option Register 59 * Do a soft reset of the card using the Configuration Option Register
61 * We need this to get going... 60 * We need this to get going...
62 * This is the part of the code that is strongly inspired from wlan-ng 61 * This is the part of the code that is strongly inspired from wlan-ng
63 * 62 *
@@ -68,7 +67,7 @@ static int orinoco_nortel_cor_reset(struct orinoco_private *priv)
68{ 67{
69 struct orinoco_pci_card *card = priv->card; 68 struct orinoco_pci_card *card = priv->card;
70 69
71 /* Assert the reset until the card notice */ 70 /* Assert the reset until the card notices */
72 iowrite16(8, card->bridge_io + 2); 71 iowrite16(8, card->bridge_io + 2);
73 ioread16(card->attr_io + COR_OFFSET); 72 ioread16(card->attr_io + COR_OFFSET);
74 iowrite16(0x80, card->attr_io + COR_OFFSET); 73 iowrite16(0x80, card->attr_io + COR_OFFSET);
@@ -126,7 +125,7 @@ static int orinoco_nortel_hw_init(struct orinoco_pci_card *card)
126 return -EBUSY; 125 return -EBUSY;
127 } 126 }
128 127
129 /* Set the PCMCIA COR-Register */ 128 /* Set the PCMCIA COR register */
130 iowrite16(COR_VALUE, card->attr_io + COR_OFFSET); 129 iowrite16(COR_VALUE, card->attr_io + COR_OFFSET);
131 mdelay(1); 130 mdelay(1);
132 reg = ioread16(card->attr_io + COR_OFFSET); 131 reg = ioread16(card->attr_io + COR_OFFSET);
diff --git a/drivers/net/wireless/orinoco_pci.c b/drivers/net/wireless/orinoco_pci.c
index 41efac22ba6a..df37b95607ff 100644
--- a/drivers/net/wireless/orinoco_pci.c
+++ b/drivers/net/wireless/orinoco_pci.c
@@ -1,11 +1,11 @@
1/* orinoco_pci.c 1/* orinoco_pci.c
2 * 2 *
3 * Driver for Prism II devices that have a direct PCI interface 3 * Driver for Prism 2.5/3 devices that have a direct PCI interface
4 * (i.e., not in a Pcmcia or PLX bridge) 4 * (i.e. these are not PCMCIA cards in a PCMCIA-to-PCI bridge).
5 * 5 * The card contains only one PCI region, which contains all the usual
6 * Specifically here we're talking about the Linksys WMP11 6 * hermes registers, as well as the COR register.
7 * 7 *
8 * Current maintainers (as of 29 September 2003) are: 8 * Current maintainers are:
9 * Pavel Roskin <proski AT gnu.org> 9 * Pavel Roskin <proski AT gnu.org>
10 * and David Gibson <hermes AT gibson.dropbear.id.au> 10 * and David Gibson <hermes AT gibson.dropbear.id.au>
11 * 11 *
@@ -41,54 +41,6 @@
41 * under either the MPL or the GPL. 41 * under either the MPL or the GPL.
42 */ 42 */
43 43
44/*
45 * Theory of operation...
46 * -------------------
47 * Maybe you had a look in orinoco_plx. Well, this is totally different...
48 *
49 * The card contains only one PCI region, which contains all the usual
50 * hermes registers.
51 *
52 * The driver will memory map this region in normal memory. Because
53 * the hermes registers are mapped in normal memory and not in ISA I/O
54 * post space, we can't use the usual inw/outw macros and we need to
55 * use readw/writew.
56 * This slight difference force us to compile our own version of
57 * hermes.c with the register access macro changed. That's a bit
58 * hackish but works fine.
59 *
60 * Note that the PCI region is pretty big (4K). That's much more than
61 * the usual set of hermes register (0x0 -> 0x3E). I've got a strong
62 * suspicion that the whole memory space of the adapter is in fact in
63 * this region. Accessing directly the adapter memory instead of going
64 * through the usual register would speed up significantely the
65 * operations...
66 *
67 * Finally, the card looks like this :
68-----------------------
69 Bus 0, device 14, function 0:
70 Network controller: PCI device 1260:3873 (Harris Semiconductor) (rev 1).
71 IRQ 11.
72 Master Capable. Latency=248.
73 Prefetchable 32 bit memory at 0xffbcc000 [0xffbccfff].
74-----------------------
7500:0e.0 Network controller: Harris Semiconductor: Unknown device 3873 (rev 01)
76 Subsystem: Unknown device 1737:3874
77 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
78 Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
79 Latency: 248 set, cache line size 08
80 Interrupt: pin A routed to IRQ 11
81 Region 0: Memory at ffbcc000 (32-bit, prefetchable) [size=4K]
82 Capabilities: [dc] Power Management version 2
83 Flags: PMEClk- AuxPwr- DSI- D1+ D2+ PME+
84 Status: D0 PME-Enable- DSel=0 DScale=0 PME-
85-----------------------
86 *
87 * That's all..
88 *
89 * Jean II
90 */
91
92#define DRIVER_NAME "orinoco_pci" 44#define DRIVER_NAME "orinoco_pci"
93#define PFX DRIVER_NAME ": " 45#define PFX DRIVER_NAME ": "
94 46
@@ -102,11 +54,12 @@
102#include "orinoco.h" 54#include "orinoco.h"
103#include "orinoco_pci.h" 55#include "orinoco_pci.h"
104 56
105/* All the magic there is from wlan-ng */ 57/* Offset of the COR register of the PCI card */
106/* Magic offset of the reset register of the PCI card */
107#define HERMES_PCI_COR (0x26) 58#define HERMES_PCI_COR (0x26)
108/* Magic bitmask to reset the card */ 59
60/* Bitmask to reset the card */
109#define HERMES_PCI_COR_MASK (0x0080) 61#define HERMES_PCI_COR_MASK (0x0080)
62
110/* Magic timeouts for doing the reset. 63/* Magic timeouts for doing the reset.
111 * Those times are straight from wlan-ng, and it is claimed that they 64 * Those times are straight from wlan-ng, and it is claimed that they
112 * are necessary. Alan will kill me. Take your time and grab a coffee. */ 65 * are necessary. Alan will kill me. Take your time and grab a coffee. */
@@ -115,7 +68,7 @@
115#define HERMES_PCI_COR_BUSYT (500) /* ms */ 68#define HERMES_PCI_COR_BUSYT (500) /* ms */
116 69
117/* 70/*
118 * Do a soft reset of the PCI card using the Configuration Option Register 71 * Do a soft reset of the card using the Configuration Option Register
119 * We need this to get going... 72 * We need this to get going...
120 * This is the part of the code that is strongly inspired from wlan-ng 73 * This is the part of the code that is strongly inspired from wlan-ng
121 * 74 *
@@ -133,7 +86,7 @@ static int orinoco_pci_cor_reset(struct orinoco_private *priv)
133 unsigned long timeout; 86 unsigned long timeout;
134 u16 reg; 87 u16 reg;
135 88
136 /* Assert the reset until the card notice */ 89 /* Assert the reset until the card notices */
137 hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK); 90 hermes_write_regn(hw, PCI_COR, HERMES_PCI_COR_MASK);
138 mdelay(HERMES_PCI_COR_ONT); 91 mdelay(HERMES_PCI_COR_ONT);
139 92
diff --git a/drivers/net/wireless/orinoco_plx.c b/drivers/net/wireless/orinoco_plx.c
index c00388ec9460..7b9405096389 100644
--- a/drivers/net/wireless/orinoco_plx.c
+++ b/drivers/net/wireless/orinoco_plx.c
@@ -3,7 +3,7 @@
3 * Driver for Prism II devices which would usually be driven by orinoco_cs, 3 * Driver for Prism II devices which would usually be driven by orinoco_cs,
4 * but are connected to the PCI bus by a PLX9052. 4 * but are connected to the PCI bus by a PLX9052.
5 * 5 *
6 * Current maintainers (as of 29 September 2003) are: 6 * Current maintainers are:
7 * Pavel Roskin <proski AT gnu.org> 7 * Pavel Roskin <proski AT gnu.org>
8 * and David Gibson <hermes AT gibson.dropbear.id.au> 8 * and David Gibson <hermes AT gibson.dropbear.id.au>
9 * 9 *
@@ -30,38 +30,18 @@
30 * other provisions required by the GPL. If you do not delete the 30 * other provisions required by the GPL. If you do not delete the
31 * provisions above, a recipient may use your version of this file 31 * provisions above, a recipient may use your version of this file
32 * under either the MPL or the GPL. 32 * under either the MPL or the GPL.
33
34 * Caution: this is experimental and probably buggy. For success and
35 * failure reports for different cards and adaptors, see
36 * orinoco_plx_id_table near the end of the file. If you have a
37 * card we don't have the PCI id for, and looks like it should work,
38 * drop me mail with the id and "it works"/"it doesn't work".
39 *
40 * Note: if everything gets detected fine but it doesn't actually send
41 * or receive packets, your first port of call should probably be to
42 * try newer firmware in the card. Especially if you're doing Ad-Hoc
43 * modes.
44 *
45 * The actual driving is done by orinoco.c, this is just resource
46 * allocation stuff. The explanation below is courtesy of Ryan Niemi
47 * on the linux-wlan-ng list at
48 * http://archives.neohapsis.com/archives/dev/linux-wlan/2001-q1/0026.html
49 * 33 *
50 * The PLX9052-based cards (WL11000 and several others) are a 34 * Here's the general details on how the PLX9052 adapter works:
51 * different beast than the usual PCMCIA-based PRISM2 configuration
52 * expected by wlan-ng. Here's the general details on how the WL11000
53 * PCI adapter works:
54 * 35 *
55 * - Two PCI I/O address spaces, one 0x80 long which contains the 36 * - Two PCI I/O address spaces, one 0x80 long which contains the
56 * PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA 37 * PLX9052 registers, and one that's 0x40 long mapped to the PCMCIA
57 * slot I/O address space. 38 * slot I/O address space.
58 * 39 *
59 * - One PCI memory address space, mapped to the PCMCIA memory space 40 * - One PCI memory address space, mapped to the PCMCIA attribute space
60 * (containing the CIS). 41 * (containing the CIS).
61 * 42 *
62 * After identifying the I/O and memory space, you can read through 43 * Using the later, you can read through the CIS data to make sure the
63 * the memory space to confirm the CIS's device ID or manufacturer ID 44 * card is compatible with the driver. Keep in mind that the PCMCIA
64 * to make sure it's the expected card. qKeep in mind that the PCMCIA
65 * spec specifies the CIS as the lower 8 bits of each word read from 45 * spec specifies the CIS as the lower 8 bits of each word read from
66 * the CIS, so to read the bytes of the CIS, read every other byte 46 * the CIS, so to read the bytes of the CIS, read every other byte
67 * (0,2,4,...). Passing that test, you need to enable the I/O address 47 * (0,2,4,...). Passing that test, you need to enable the I/O address
@@ -71,7 +51,7 @@
71 * within the PCI memory space. Write 0x41 to the COR register to 51 * within the PCI memory space. Write 0x41 to the COR register to
72 * enable I/O mode and to select level triggered interrupts. To 52 * enable I/O mode and to select level triggered interrupts. To
73 * confirm you actually succeeded, read the COR register back and make 53 * confirm you actually succeeded, read the COR register back and make
74 * sure it actually got set to 0x41, incase you have an unexpected 54 * sure it actually got set to 0x41, in case you have an unexpected
75 * card inserted. 55 * card inserted.
76 * 56 *
77 * Following that, you can treat the second PCI I/O address space (the 57 * Following that, you can treat the second PCI I/O address space (the
@@ -101,16 +81,6 @@
101 * that, I've hot-swapped a number of times during debugging and 81 * that, I've hot-swapped a number of times during debugging and
102 * driver development for various reasons (stuck WAIT# line after the 82 * driver development for various reasons (stuck WAIT# line after the
103 * radio card's firmware locks up). 83 * radio card's firmware locks up).
104 *
105 * Hope this is enough info for someone to add PLX9052 support to the
106 * wlan-ng card. In the case of the WL11000, the PCI ID's are
107 * 0x1639/0x0200, with matching subsystem ID's. Other PLX9052-based
108 * manufacturers other than Eumitcom (or on cards other than the
109 * WL11000) may have different PCI ID's.
110 *
111 * If anyone needs any more specific info, let me know. I haven't had
112 * time to implement support myself yet, and with the way things are
113 * going, might not have time for a while..
114 */ 84 */
115 85
116#define DRIVER_NAME "orinoco_plx" 86#define DRIVER_NAME "orinoco_plx"
diff --git a/drivers/net/wireless/orinoco_tmd.c b/drivers/net/wireless/orinoco_tmd.c
index 438fe545b184..0496663e837c 100644
--- a/drivers/net/wireless/orinoco_tmd.c
+++ b/drivers/net/wireless/orinoco_tmd.c
@@ -26,25 +26,13 @@
26 * other provisions required by the GPL. If you do not delete the 26 * other provisions required by the GPL. If you do not delete the
27 * provisions above, a recipient may use your version of this file 27 * provisions above, a recipient may use your version of this file
28 * under either the MPL or the GPL. 28 * under either the MPL or the GPL.
29
30 * Caution: this is experimental and probably buggy. For success and
31 * failure reports for different cards and adaptors, see
32 * orinoco_tmd_id_table near the end of the file. If you have a
33 * card we don't have the PCI id for, and looks like it should work,
34 * drop me mail with the id and "it works"/"it doesn't work".
35 *
36 * Note: if everything gets detected fine but it doesn't actually send
37 * or receive packets, your first port of call should probably be to
38 * try newer firmware in the card. Especially if you're doing Ad-Hoc
39 * modes.
40 * 29 *
41 * The actual driving is done by orinoco.c, this is just resource 30 * The actual driving is done by orinoco.c, this is just resource
42 * allocation stuff. 31 * allocation stuff.
43 * 32 *
44 * This driver is modeled after the orinoco_plx driver. The main 33 * This driver is modeled after the orinoco_plx driver. The main
45 * difference is that the TMD chip has only IO port ranges and no 34 * difference is that the TMD chip has only IO port ranges and doesn't
46 * memory space, i.e. no access to the CIS. Compared to the PLX chip, 35 * provide access to the PCMCIA attribute space.
47 * the io range functionalities are exchanged.
48 * 36 *
49 * Pheecom sells cards with the TMD chip as "ASIC version" 37 * Pheecom sells cards with the TMD chip as "ASIC version"
50 */ 38 */