diff options
Diffstat (limited to 'drivers/net/wireless')
22 files changed, 1881 insertions, 1384 deletions
diff --git a/drivers/net/wireless/rt2x00/Makefile b/drivers/net/wireless/rt2x00/Makefile index 30d654a42eea..ab40e1f6b303 100644 --- a/drivers/net/wireless/rt2x00/Makefile +++ b/drivers/net/wireless/rt2x00/Makefile | |||
@@ -1,4 +1,4 @@ | |||
1 | rt2x00lib-objs := rt2x00dev.o rt2x00mac.o rt2x00config.o | 1 | rt2x00lib-objs := rt2x00dev.o rt2x00mac.o rt2x00config.o rt2x00queue.o |
2 | 2 | ||
3 | ifeq ($(CONFIG_RT2X00_LIB_DEBUGFS),y) | 3 | ifeq ($(CONFIG_RT2X00_LIB_DEBUGFS),y) |
4 | rt2x00lib-objs += rt2x00debug.o | 4 | rt2x00lib-objs += rt2x00debug.o |
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c index 763af7f19b8e..fc161084a8d3 100644 --- a/drivers/net/wireless/rt2x00/rt2400pci.c +++ b/drivers/net/wireless/rt2x00/rt2400pci.c | |||
@@ -498,13 +498,13 @@ static void rt2400pci_config(struct rt2x00_dev *rt2x00dev, | |||
498 | } | 498 | } |
499 | 499 | ||
500 | static void rt2400pci_config_cw(struct rt2x00_dev *rt2x00dev, | 500 | static void rt2400pci_config_cw(struct rt2x00_dev *rt2x00dev, |
501 | struct ieee80211_tx_queue_params *params) | 501 | const int cw_min, const int cw_max) |
502 | { | 502 | { |
503 | u32 reg; | 503 | u32 reg; |
504 | 504 | ||
505 | rt2x00pci_register_read(rt2x00dev, CSR11, ®); | 505 | rt2x00pci_register_read(rt2x00dev, CSR11, ®); |
506 | rt2x00_set_field32(®, CSR11_CWMIN, params->cw_min); | 506 | rt2x00_set_field32(®, CSR11_CWMIN, cw_min); |
507 | rt2x00_set_field32(®, CSR11_CWMAX, params->cw_max); | 507 | rt2x00_set_field32(®, CSR11_CWMAX, cw_max); |
508 | rt2x00pci_register_write(rt2x00dev, CSR11, reg); | 508 | rt2x00pci_register_write(rt2x00dev, CSR11, reg); |
509 | } | 509 | } |
510 | 510 | ||
@@ -593,90 +593,89 @@ static void rt2400pci_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
593 | * Initialization functions. | 593 | * Initialization functions. |
594 | */ | 594 | */ |
595 | static void rt2400pci_init_rxentry(struct rt2x00_dev *rt2x00dev, | 595 | static void rt2400pci_init_rxentry(struct rt2x00_dev *rt2x00dev, |
596 | struct data_entry *entry) | 596 | struct queue_entry *entry) |
597 | { | 597 | { |
598 | __le32 *rxd = entry->priv; | 598 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; |
599 | u32 word; | 599 | u32 word; |
600 | 600 | ||
601 | rt2x00_desc_read(rxd, 2, &word); | 601 | rt2x00_desc_read(priv_rx->desc, 2, &word); |
602 | rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH, entry->ring->data_size); | 602 | rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH, entry->queue->data_size); |
603 | rt2x00_desc_write(rxd, 2, word); | 603 | rt2x00_desc_write(priv_rx->desc, 2, word); |
604 | 604 | ||
605 | rt2x00_desc_read(rxd, 1, &word); | 605 | rt2x00_desc_read(priv_rx->desc, 1, &word); |
606 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, entry->data_dma); | 606 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->dma); |
607 | rt2x00_desc_write(rxd, 1, word); | 607 | rt2x00_desc_write(priv_rx->desc, 1, word); |
608 | 608 | ||
609 | rt2x00_desc_read(rxd, 0, &word); | 609 | rt2x00_desc_read(priv_rx->desc, 0, &word); |
610 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); | 610 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); |
611 | rt2x00_desc_write(rxd, 0, word); | 611 | rt2x00_desc_write(priv_rx->desc, 0, word); |
612 | } | 612 | } |
613 | 613 | ||
614 | static void rt2400pci_init_txentry(struct rt2x00_dev *rt2x00dev, | 614 | static void rt2400pci_init_txentry(struct rt2x00_dev *rt2x00dev, |
615 | struct data_entry *entry) | 615 | struct queue_entry *entry) |
616 | { | 616 | { |
617 | __le32 *txd = entry->priv; | 617 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; |
618 | u32 word; | 618 | u32 word; |
619 | 619 | ||
620 | rt2x00_desc_read(txd, 1, &word); | 620 | rt2x00_desc_read(priv_tx->desc, 1, &word); |
621 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, entry->data_dma); | 621 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->dma); |
622 | rt2x00_desc_write(txd, 1, word); | 622 | rt2x00_desc_write(priv_tx->desc, 1, word); |
623 | 623 | ||
624 | rt2x00_desc_read(txd, 2, &word); | 624 | rt2x00_desc_read(priv_tx->desc, 2, &word); |
625 | rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, entry->ring->data_size); | 625 | rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, |
626 | rt2x00_desc_write(txd, 2, word); | 626 | entry->queue->data_size); |
627 | rt2x00_desc_write(priv_tx->desc, 2, word); | ||
627 | 628 | ||
628 | rt2x00_desc_read(txd, 0, &word); | 629 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
629 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); | 630 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); |
630 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); | 631 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); |
631 | rt2x00_desc_write(txd, 0, word); | 632 | rt2x00_desc_write(priv_tx->desc, 0, word); |
632 | } | 633 | } |
633 | 634 | ||
634 | static int rt2400pci_init_rings(struct rt2x00_dev *rt2x00dev) | 635 | static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev) |
635 | { | 636 | { |
637 | struct queue_entry_priv_pci_rx *priv_rx; | ||
638 | struct queue_entry_priv_pci_tx *priv_tx; | ||
636 | u32 reg; | 639 | u32 reg; |
637 | 640 | ||
638 | /* | 641 | /* |
639 | * Initialize registers. | 642 | * Initialize registers. |
640 | */ | 643 | */ |
641 | rt2x00pci_register_read(rt2x00dev, TXCSR2, ®); | 644 | rt2x00pci_register_read(rt2x00dev, TXCSR2, ®); |
642 | rt2x00_set_field32(®, TXCSR2_TXD_SIZE, | 645 | rt2x00_set_field32(®, TXCSR2_TXD_SIZE, rt2x00dev->tx[0].desc_size); |
643 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].desc_size); | 646 | rt2x00_set_field32(®, TXCSR2_NUM_TXD, rt2x00dev->tx[1].limit); |
644 | rt2x00_set_field32(®, TXCSR2_NUM_TXD, | 647 | rt2x00_set_field32(®, TXCSR2_NUM_ATIM, rt2x00dev->bcn[1].limit); |
645 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA1].stats.limit); | 648 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); |
646 | rt2x00_set_field32(®, TXCSR2_NUM_ATIM, | ||
647 | rt2x00dev->bcn[1].stats.limit); | ||
648 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, | ||
649 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].stats.limit); | ||
650 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); | 649 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); |
651 | 650 | ||
651 | priv_tx = rt2x00dev->tx[1].entries[0].priv_data; | ||
652 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); | 652 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); |
653 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, | 653 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, priv_tx->dma); |
654 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA1].data_dma); | ||
655 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); | 654 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); |
656 | 655 | ||
656 | priv_tx = rt2x00dev->tx[0].entries[0].priv_data; | ||
657 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); | 657 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); |
658 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, | 658 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, priv_tx->dma); |
659 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].data_dma); | ||
660 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); | 659 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); |
661 | 660 | ||
661 | priv_tx = rt2x00dev->bcn[1].entries[0].priv_data; | ||
662 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); | 662 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); |
663 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, | 663 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, priv_tx->dma); |
664 | rt2x00dev->bcn[1].data_dma); | ||
665 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); | 664 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); |
666 | 665 | ||
666 | priv_tx = rt2x00dev->bcn[0].entries[0].priv_data; | ||
667 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); | 667 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); |
668 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, | 668 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, priv_tx->dma); |
669 | rt2x00dev->bcn[0].data_dma); | ||
670 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); | 669 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); |
671 | 670 | ||
672 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); | 671 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); |
673 | rt2x00_set_field32(®, RXCSR1_RXD_SIZE, rt2x00dev->rx->desc_size); | 672 | rt2x00_set_field32(®, RXCSR1_RXD_SIZE, rt2x00dev->rx->desc_size); |
674 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->stats.limit); | 673 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); |
675 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); | 674 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); |
676 | 675 | ||
676 | priv_rx = rt2x00dev->rx->entries[0].priv_data; | ||
677 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); | 677 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); |
678 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, | 678 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_tx->dma); |
679 | rt2x00dev->rx->data_dma); | ||
680 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); | 679 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); |
681 | 680 | ||
682 | return 0; | 681 | return 0; |
@@ -859,7 +858,7 @@ static int rt2400pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
859 | /* | 858 | /* |
860 | * Initialize all registers. | 859 | * Initialize all registers. |
861 | */ | 860 | */ |
862 | if (rt2400pci_init_rings(rt2x00dev) || | 861 | if (rt2400pci_init_queues(rt2x00dev) || |
863 | rt2400pci_init_registers(rt2x00dev) || | 862 | rt2400pci_init_registers(rt2x00dev) || |
864 | rt2400pci_init_bbp(rt2x00dev)) { | 863 | rt2400pci_init_bbp(rt2x00dev)) { |
865 | ERROR(rt2x00dev, "Register initialization failed.\n"); | 864 | ERROR(rt2x00dev, "Register initialization failed.\n"); |
@@ -986,10 +985,10 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
986 | */ | 985 | */ |
987 | static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 986 | static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
988 | struct sk_buff *skb, | 987 | struct sk_buff *skb, |
989 | struct txdata_entry_desc *desc, | 988 | struct txentry_desc *txdesc, |
990 | struct ieee80211_tx_control *control) | 989 | struct ieee80211_tx_control *control) |
991 | { | 990 | { |
992 | struct skb_desc *skbdesc = get_skb_desc(skb); | 991 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
993 | __le32 *txd = skbdesc->desc; | 992 | __le32 *txd = skbdesc->desc; |
994 | u32 word; | 993 | u32 word; |
995 | 994 | ||
@@ -1001,19 +1000,19 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1001 | rt2x00_desc_write(txd, 2, word); | 1000 | rt2x00_desc_write(txd, 2, word); |
1002 | 1001 | ||
1003 | rt2x00_desc_read(txd, 3, &word); | 1002 | rt2x00_desc_read(txd, 3, &word); |
1004 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, desc->signal); | 1003 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, txdesc->signal); |
1005 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_REGNUM, 5); | 1004 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_REGNUM, 5); |
1006 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_BUSY, 1); | 1005 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL_BUSY, 1); |
1007 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, desc->service); | 1006 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, txdesc->service); |
1008 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_REGNUM, 6); | 1007 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_REGNUM, 6); |
1009 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_BUSY, 1); | 1008 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE_BUSY, 1); |
1010 | rt2x00_desc_write(txd, 3, word); | 1009 | rt2x00_desc_write(txd, 3, word); |
1011 | 1010 | ||
1012 | rt2x00_desc_read(txd, 4, &word); | 1011 | rt2x00_desc_read(txd, 4, &word); |
1013 | rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_LOW, desc->length_low); | 1012 | rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_LOW, txdesc->length_low); |
1014 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_REGNUM, 8); | 1013 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_REGNUM, 8); |
1015 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_BUSY, 1); | 1014 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW_BUSY, 1); |
1016 | rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_HIGH, desc->length_high); | 1015 | rt2x00_set_field32(&word, TXD_W4_PLCP_LENGTH_HIGH, txdesc->length_high); |
1017 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_REGNUM, 7); | 1016 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_REGNUM, 7); |
1018 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_BUSY, 1); | 1017 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH_BUSY, 1); |
1019 | rt2x00_desc_write(txd, 4, word); | 1018 | rt2x00_desc_write(txd, 4, word); |
@@ -1022,14 +1021,14 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1022 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); | 1021 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); |
1023 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); | 1022 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); |
1024 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, | 1023 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
1025 | test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags)); | 1024 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
1026 | rt2x00_set_field32(&word, TXD_W0_ACK, | 1025 | rt2x00_set_field32(&word, TXD_W0_ACK, |
1027 | test_bit(ENTRY_TXD_ACK, &desc->flags)); | 1026 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
1028 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, | 1027 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
1029 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags)); | 1028 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
1030 | rt2x00_set_field32(&word, TXD_W0_RTS, | 1029 | rt2x00_set_field32(&word, TXD_W0_RTS, |
1031 | test_bit(ENTRY_TXD_RTS_FRAME, &desc->flags)); | 1030 | test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)); |
1032 | rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs); | 1031 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1033 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1032 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1034 | !!(control->flags & | 1033 | !!(control->flags & |
1035 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | 1034 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); |
@@ -1066,49 +1065,49 @@ static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1066 | /* | 1065 | /* |
1067 | * RX control handlers | 1066 | * RX control handlers |
1068 | */ | 1067 | */ |
1069 | static void rt2400pci_fill_rxdone(struct data_entry *entry, | 1068 | static void rt2400pci_fill_rxdone(struct queue_entry *entry, |
1070 | struct rxdata_entry_desc *desc) | 1069 | struct rxdone_entry_desc *rxdesc) |
1071 | { | 1070 | { |
1072 | __le32 *rxd = entry->priv; | 1071 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; |
1073 | u32 word0; | 1072 | u32 word0; |
1074 | u32 word2; | 1073 | u32 word2; |
1075 | 1074 | ||
1076 | rt2x00_desc_read(rxd, 0, &word0); | 1075 | rt2x00_desc_read(priv_rx->desc, 0, &word0); |
1077 | rt2x00_desc_read(rxd, 2, &word2); | 1076 | rt2x00_desc_read(priv_rx->desc, 2, &word2); |
1078 | 1077 | ||
1079 | desc->flags = 0; | 1078 | rxdesc->flags = 0; |
1080 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1079 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1081 | desc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1080 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1082 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) | 1081 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
1083 | desc->flags |= RX_FLAG_FAILED_PLCP_CRC; | 1082 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
1084 | 1083 | ||
1085 | /* | 1084 | /* |
1086 | * Obtain the status about this packet. | 1085 | * Obtain the status about this packet. |
1087 | */ | 1086 | */ |
1088 | desc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL); | 1087 | rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL); |
1089 | desc->rssi = rt2x00_get_field32(word2, RXD_W2_RSSI) - | 1088 | rxdesc->rssi = rt2x00_get_field32(word2, RXD_W2_RSSI) - |
1090 | entry->ring->rt2x00dev->rssi_offset; | 1089 | entry->queue->rt2x00dev->rssi_offset; |
1091 | desc->ofdm = 0; | 1090 | rxdesc->ofdm = 0; |
1092 | desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1091 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1093 | desc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); | 1092 | rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); |
1094 | } | 1093 | } |
1095 | 1094 | ||
1096 | /* | 1095 | /* |
1097 | * Interrupt functions. | 1096 | * Interrupt functions. |
1098 | */ | 1097 | */ |
1099 | static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, const int queue) | 1098 | static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, |
1099 | const enum ieee80211_tx_queue queue_idx) | ||
1100 | { | 1100 | { |
1101 | struct data_ring *ring = rt2x00lib_get_ring(rt2x00dev, queue); | 1101 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); |
1102 | struct data_entry *entry; | 1102 | struct queue_entry_priv_pci_tx *priv_tx; |
1103 | __le32 *txd; | 1103 | struct queue_entry *entry; |
1104 | struct txdone_entry_desc txdesc; | ||
1104 | u32 word; | 1105 | u32 word; |
1105 | int tx_status; | ||
1106 | int retry; | ||
1107 | 1106 | ||
1108 | while (!rt2x00_ring_empty(ring)) { | 1107 | while (!rt2x00queue_empty(queue)) { |
1109 | entry = rt2x00_get_data_entry_done(ring); | 1108 | entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
1110 | txd = entry->priv; | 1109 | priv_tx = entry->priv_data; |
1111 | rt2x00_desc_read(txd, 0, &word); | 1110 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
1112 | 1111 | ||
1113 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || | 1112 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || |
1114 | !rt2x00_get_field32(word, TXD_W0_VALID)) | 1113 | !rt2x00_get_field32(word, TXD_W0_VALID)) |
@@ -1117,10 +1116,10 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, const int queue) | |||
1117 | /* | 1116 | /* |
1118 | * Obtain the status about this packet. | 1117 | * Obtain the status about this packet. |
1119 | */ | 1118 | */ |
1120 | tx_status = rt2x00_get_field32(word, TXD_W0_RESULT); | 1119 | txdesc.status = rt2x00_get_field32(word, TXD_W0_RESULT); |
1121 | retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); | 1120 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); |
1122 | 1121 | ||
1123 | rt2x00pci_txdone(rt2x00dev, entry, tx_status, retry); | 1122 | rt2x00pci_txdone(rt2x00dev, entry, &txdesc); |
1124 | } | 1123 | } |
1125 | } | 1124 | } |
1126 | 1125 | ||
@@ -1374,9 +1373,9 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1374 | rt2400pci_probe_hw_mode(rt2x00dev); | 1373 | rt2400pci_probe_hw_mode(rt2x00dev); |
1375 | 1374 | ||
1376 | /* | 1375 | /* |
1377 | * This device requires the beacon ring | 1376 | * This device requires the atim queue |
1378 | */ | 1377 | */ |
1379 | __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags); | 1378 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1380 | 1379 | ||
1381 | /* | 1380 | /* |
1382 | * Set the rssi offset. | 1381 | * Set the rssi offset. |
@@ -1481,7 +1480,8 @@ static int rt2400pci_conf_tx(struct ieee80211_hw *hw, | |||
1481 | /* | 1480 | /* |
1482 | * Write configuration to register. | 1481 | * Write configuration to register. |
1483 | */ | 1482 | */ |
1484 | rt2400pci_config_cw(rt2x00dev, &rt2x00dev->tx->tx_params); | 1483 | rt2400pci_config_cw(rt2x00dev, |
1484 | rt2x00dev->tx->cw_min, rt2x00dev->tx->cw_max); | ||
1485 | 1485 | ||
1486 | return 0; | 1486 | return 0; |
1487 | } | 1487 | } |
@@ -1560,12 +1560,42 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = { | |||
1560 | .config = rt2400pci_config, | 1560 | .config = rt2400pci_config, |
1561 | }; | 1561 | }; |
1562 | 1562 | ||
1563 | static const struct data_queue_desc rt2400pci_queue_rx = { | ||
1564 | .entry_num = RX_ENTRIES, | ||
1565 | .data_size = DATA_FRAME_SIZE, | ||
1566 | .desc_size = RXD_DESC_SIZE, | ||
1567 | .priv_size = sizeof(struct queue_entry_priv_pci_rx), | ||
1568 | }; | ||
1569 | |||
1570 | static const struct data_queue_desc rt2400pci_queue_tx = { | ||
1571 | .entry_num = TX_ENTRIES, | ||
1572 | .data_size = DATA_FRAME_SIZE, | ||
1573 | .desc_size = TXD_DESC_SIZE, | ||
1574 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
1575 | }; | ||
1576 | |||
1577 | static const struct data_queue_desc rt2400pci_queue_bcn = { | ||
1578 | .entry_num = BEACON_ENTRIES, | ||
1579 | .data_size = MGMT_FRAME_SIZE, | ||
1580 | .desc_size = TXD_DESC_SIZE, | ||
1581 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
1582 | }; | ||
1583 | |||
1584 | static const struct data_queue_desc rt2400pci_queue_atim = { | ||
1585 | .entry_num = ATIM_ENTRIES, | ||
1586 | .data_size = DATA_FRAME_SIZE, | ||
1587 | .desc_size = TXD_DESC_SIZE, | ||
1588 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
1589 | }; | ||
1590 | |||
1563 | static const struct rt2x00_ops rt2400pci_ops = { | 1591 | static const struct rt2x00_ops rt2400pci_ops = { |
1564 | .name = KBUILD_MODNAME, | 1592 | .name = KBUILD_MODNAME, |
1565 | .rxd_size = RXD_DESC_SIZE, | ||
1566 | .txd_size = TXD_DESC_SIZE, | ||
1567 | .eeprom_size = EEPROM_SIZE, | 1593 | .eeprom_size = EEPROM_SIZE, |
1568 | .rf_size = RF_SIZE, | 1594 | .rf_size = RF_SIZE, |
1595 | .rx = &rt2400pci_queue_rx, | ||
1596 | .tx = &rt2400pci_queue_tx, | ||
1597 | .bcn = &rt2400pci_queue_bcn, | ||
1598 | .atim = &rt2400pci_queue_atim, | ||
1569 | .lib = &rt2400pci_rt2x00_ops, | 1599 | .lib = &rt2400pci_rt2x00_ops, |
1570 | .hw = &rt2400pci_mac80211_ops, | 1600 | .hw = &rt2400pci_mac80211_ops, |
1571 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 1601 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c index 884e225f7b9f..0a54b6512207 100644 --- a/drivers/net/wireless/rt2x00/rt2500pci.c +++ b/drivers/net/wireless/rt2x00/rt2500pci.c | |||
@@ -263,6 +263,8 @@ static void rt2500pci_config_bssid(struct rt2x00_dev *rt2x00dev, | |||
263 | static void rt2500pci_config_type(struct rt2x00_dev *rt2x00dev, const int type, | 263 | static void rt2500pci_config_type(struct rt2x00_dev *rt2x00dev, const int type, |
264 | const int tsf_sync) | 264 | const int tsf_sync) |
265 | { | 265 | { |
266 | struct data_queue *queue = | ||
267 | rt2x00queue_get_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON); | ||
266 | u32 reg; | 268 | u32 reg; |
267 | 269 | ||
268 | rt2x00pci_register_write(rt2x00dev, CSR14, 0); | 270 | rt2x00pci_register_write(rt2x00dev, CSR14, 0); |
@@ -273,10 +275,7 @@ static void rt2500pci_config_type(struct rt2x00_dev *rt2x00dev, const int type, | |||
273 | rt2x00pci_register_read(rt2x00dev, BCNCSR1, ®); | 275 | rt2x00pci_register_read(rt2x00dev, BCNCSR1, ®); |
274 | rt2x00_set_field32(®, BCNCSR1_PRELOAD, | 276 | rt2x00_set_field32(®, BCNCSR1_PRELOAD, |
275 | PREAMBLE + get_duration(IEEE80211_HEADER, 20)); | 277 | PREAMBLE + get_duration(IEEE80211_HEADER, 20)); |
276 | rt2x00_set_field32(®, BCNCSR1_BEACON_CWMIN, | 278 | rt2x00_set_field32(®, BCNCSR1_BEACON_CWMIN, queue->cw_min); |
277 | rt2x00lib_get_ring(rt2x00dev, | ||
278 | IEEE80211_TX_QUEUE_BEACON) | ||
279 | ->tx_params.cw_min); | ||
280 | rt2x00pci_register_write(rt2x00dev, BCNCSR1, reg); | 279 | rt2x00pci_register_write(rt2x00dev, BCNCSR1, reg); |
281 | 280 | ||
282 | /* | 281 | /* |
@@ -684,82 +683,80 @@ dynamic_cca_tune: | |||
684 | * Initialization functions. | 683 | * Initialization functions. |
685 | */ | 684 | */ |
686 | static void rt2500pci_init_rxentry(struct rt2x00_dev *rt2x00dev, | 685 | static void rt2500pci_init_rxentry(struct rt2x00_dev *rt2x00dev, |
687 | struct data_entry *entry) | 686 | struct queue_entry *entry) |
688 | { | 687 | { |
689 | __le32 *rxd = entry->priv; | 688 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; |
690 | u32 word; | 689 | u32 word; |
691 | 690 | ||
692 | rt2x00_desc_read(rxd, 1, &word); | 691 | rt2x00_desc_read(priv_rx->desc, 1, &word); |
693 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, entry->data_dma); | 692 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->dma); |
694 | rt2x00_desc_write(rxd, 1, word); | 693 | rt2x00_desc_write(priv_rx->desc, 1, word); |
695 | 694 | ||
696 | rt2x00_desc_read(rxd, 0, &word); | 695 | rt2x00_desc_read(priv_rx->desc, 0, &word); |
697 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); | 696 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); |
698 | rt2x00_desc_write(rxd, 0, word); | 697 | rt2x00_desc_write(priv_rx->desc, 0, word); |
699 | } | 698 | } |
700 | 699 | ||
701 | static void rt2500pci_init_txentry(struct rt2x00_dev *rt2x00dev, | 700 | static void rt2500pci_init_txentry(struct rt2x00_dev *rt2x00dev, |
702 | struct data_entry *entry) | 701 | struct queue_entry *entry) |
703 | { | 702 | { |
704 | __le32 *txd = entry->priv; | 703 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; |
705 | u32 word; | 704 | u32 word; |
706 | 705 | ||
707 | rt2x00_desc_read(txd, 1, &word); | 706 | rt2x00_desc_read(priv_tx->desc, 1, &word); |
708 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, entry->data_dma); | 707 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->dma); |
709 | rt2x00_desc_write(txd, 1, word); | 708 | rt2x00_desc_write(priv_tx->desc, 1, word); |
710 | 709 | ||
711 | rt2x00_desc_read(txd, 0, &word); | 710 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
712 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); | 711 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); |
713 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); | 712 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); |
714 | rt2x00_desc_write(txd, 0, word); | 713 | rt2x00_desc_write(priv_tx->desc, 0, word); |
715 | } | 714 | } |
716 | 715 | ||
717 | static int rt2500pci_init_rings(struct rt2x00_dev *rt2x00dev) | 716 | static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) |
718 | { | 717 | { |
718 | struct queue_entry_priv_pci_rx *priv_rx; | ||
719 | struct queue_entry_priv_pci_tx *priv_tx; | ||
719 | u32 reg; | 720 | u32 reg; |
720 | 721 | ||
721 | /* | 722 | /* |
722 | * Initialize registers. | 723 | * Initialize registers. |
723 | */ | 724 | */ |
724 | rt2x00pci_register_read(rt2x00dev, TXCSR2, ®); | 725 | rt2x00pci_register_read(rt2x00dev, TXCSR2, ®); |
725 | rt2x00_set_field32(®, TXCSR2_TXD_SIZE, | 726 | rt2x00_set_field32(®, TXCSR2_TXD_SIZE, rt2x00dev->tx[0].desc_size); |
726 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].desc_size); | 727 | rt2x00_set_field32(®, TXCSR2_NUM_TXD, rt2x00dev->tx[1].limit); |
727 | rt2x00_set_field32(®, TXCSR2_NUM_TXD, | 728 | rt2x00_set_field32(®, TXCSR2_NUM_ATIM, rt2x00dev->bcn[1].limit); |
728 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA1].stats.limit); | 729 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); |
729 | rt2x00_set_field32(®, TXCSR2_NUM_ATIM, | ||
730 | rt2x00dev->bcn[1].stats.limit); | ||
731 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, | ||
732 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].stats.limit); | ||
733 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); | 730 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); |
734 | 731 | ||
732 | priv_tx = rt2x00dev->tx[1].entries[0].priv_data; | ||
735 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); | 733 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); |
736 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, | 734 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, priv_tx->dma); |
737 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA1].data_dma); | ||
738 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); | 735 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); |
739 | 736 | ||
737 | priv_tx = rt2x00dev->tx[0].entries[0].priv_data; | ||
740 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); | 738 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); |
741 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, | 739 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, priv_tx->dma); |
742 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].data_dma); | ||
743 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); | 740 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); |
744 | 741 | ||
742 | priv_tx = rt2x00dev->bcn[1].entries[0].priv_data; | ||
745 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); | 743 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); |
746 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, | 744 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, priv_tx->dma); |
747 | rt2x00dev->bcn[1].data_dma); | ||
748 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); | 745 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); |
749 | 746 | ||
747 | priv_tx = rt2x00dev->bcn[0].entries[0].priv_data; | ||
750 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); | 748 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); |
751 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, | 749 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, priv_tx->dma); |
752 | rt2x00dev->bcn[0].data_dma); | ||
753 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); | 750 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); |
754 | 751 | ||
755 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); | 752 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); |
756 | rt2x00_set_field32(®, RXCSR1_RXD_SIZE, rt2x00dev->rx->desc_size); | 753 | rt2x00_set_field32(®, RXCSR1_RXD_SIZE, rt2x00dev->rx->desc_size); |
757 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->stats.limit); | 754 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); |
758 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); | 755 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); |
759 | 756 | ||
757 | priv_rx = rt2x00dev->rx->entries[0].priv_data; | ||
760 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); | 758 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); |
761 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, | 759 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_tx->dma); |
762 | rt2x00dev->rx->data_dma); | ||
763 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); | 760 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); |
764 | 761 | ||
765 | return 0; | 762 | return 0; |
@@ -1011,7 +1008,7 @@ static int rt2500pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
1011 | /* | 1008 | /* |
1012 | * Initialize all registers. | 1009 | * Initialize all registers. |
1013 | */ | 1010 | */ |
1014 | if (rt2500pci_init_rings(rt2x00dev) || | 1011 | if (rt2500pci_init_queues(rt2x00dev) || |
1015 | rt2500pci_init_registers(rt2x00dev) || | 1012 | rt2500pci_init_registers(rt2x00dev) || |
1016 | rt2500pci_init_bbp(rt2x00dev)) { | 1013 | rt2500pci_init_bbp(rt2x00dev)) { |
1017 | ERROR(rt2x00dev, "Register initialization failed.\n"); | 1014 | ERROR(rt2x00dev, "Register initialization failed.\n"); |
@@ -1138,10 +1135,10 @@ static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1138 | */ | 1135 | */ |
1139 | static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1136 | static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1140 | struct sk_buff *skb, | 1137 | struct sk_buff *skb, |
1141 | struct txdata_entry_desc *desc, | 1138 | struct txentry_desc *txdesc, |
1142 | struct ieee80211_tx_control *control) | 1139 | struct ieee80211_tx_control *control) |
1143 | { | 1140 | { |
1144 | struct skb_desc *skbdesc = get_skb_desc(skb); | 1141 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1145 | __le32 *txd = skbdesc->desc; | 1142 | __le32 *txd = skbdesc->desc; |
1146 | u32 word; | 1143 | u32 word; |
1147 | 1144 | ||
@@ -1150,36 +1147,36 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1150 | */ | 1147 | */ |
1151 | rt2x00_desc_read(txd, 2, &word); | 1148 | rt2x00_desc_read(txd, 2, &word); |
1152 | rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER); | 1149 | rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER); |
1153 | rt2x00_set_field32(&word, TXD_W2_AIFS, desc->aifs); | 1150 | rt2x00_set_field32(&word, TXD_W2_AIFS, txdesc->aifs); |
1154 | rt2x00_set_field32(&word, TXD_W2_CWMIN, desc->cw_min); | 1151 | rt2x00_set_field32(&word, TXD_W2_CWMIN, txdesc->cw_min); |
1155 | rt2x00_set_field32(&word, TXD_W2_CWMAX, desc->cw_max); | 1152 | rt2x00_set_field32(&word, TXD_W2_CWMAX, txdesc->cw_max); |
1156 | rt2x00_desc_write(txd, 2, word); | 1153 | rt2x00_desc_write(txd, 2, word); |
1157 | 1154 | ||
1158 | rt2x00_desc_read(txd, 3, &word); | 1155 | rt2x00_desc_read(txd, 3, &word); |
1159 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, desc->signal); | 1156 | rt2x00_set_field32(&word, TXD_W3_PLCP_SIGNAL, txdesc->signal); |
1160 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, desc->service); | 1157 | rt2x00_set_field32(&word, TXD_W3_PLCP_SERVICE, txdesc->service); |
1161 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW, desc->length_low); | 1158 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_LOW, txdesc->length_low); |
1162 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH, desc->length_high); | 1159 | rt2x00_set_field32(&word, TXD_W3_PLCP_LENGTH_HIGH, txdesc->length_high); |
1163 | rt2x00_desc_write(txd, 3, word); | 1160 | rt2x00_desc_write(txd, 3, word); |
1164 | 1161 | ||
1165 | rt2x00_desc_read(txd, 10, &word); | 1162 | rt2x00_desc_read(txd, 10, &word); |
1166 | rt2x00_set_field32(&word, TXD_W10_RTS, | 1163 | rt2x00_set_field32(&word, TXD_W10_RTS, |
1167 | test_bit(ENTRY_TXD_RTS_FRAME, &desc->flags)); | 1164 | test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)); |
1168 | rt2x00_desc_write(txd, 10, word); | 1165 | rt2x00_desc_write(txd, 10, word); |
1169 | 1166 | ||
1170 | rt2x00_desc_read(txd, 0, &word); | 1167 | rt2x00_desc_read(txd, 0, &word); |
1171 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); | 1168 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); |
1172 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); | 1169 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); |
1173 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, | 1170 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
1174 | test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags)); | 1171 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
1175 | rt2x00_set_field32(&word, TXD_W0_ACK, | 1172 | rt2x00_set_field32(&word, TXD_W0_ACK, |
1176 | test_bit(ENTRY_TXD_ACK, &desc->flags)); | 1173 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
1177 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, | 1174 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
1178 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags)); | 1175 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
1179 | rt2x00_set_field32(&word, TXD_W0_OFDM, | 1176 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
1180 | test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags)); | 1177 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1181 | rt2x00_set_field32(&word, TXD_W0_CIPHER_OWNER, 1); | 1178 | rt2x00_set_field32(&word, TXD_W0_CIPHER_OWNER, 1); |
1182 | rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs); | 1179 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1183 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1180 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1184 | !!(control->flags & | 1181 | !!(control->flags & |
1185 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | 1182 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); |
@@ -1218,46 +1215,46 @@ static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1218 | /* | 1215 | /* |
1219 | * RX control handlers | 1216 | * RX control handlers |
1220 | */ | 1217 | */ |
1221 | static void rt2500pci_fill_rxdone(struct data_entry *entry, | 1218 | static void rt2500pci_fill_rxdone(struct queue_entry *entry, |
1222 | struct rxdata_entry_desc *desc) | 1219 | struct rxdone_entry_desc *rxdesc) |
1223 | { | 1220 | { |
1224 | __le32 *rxd = entry->priv; | 1221 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; |
1225 | u32 word0; | 1222 | u32 word0; |
1226 | u32 word2; | 1223 | u32 word2; |
1227 | 1224 | ||
1228 | rt2x00_desc_read(rxd, 0, &word0); | 1225 | rt2x00_desc_read(priv_rx->desc, 0, &word0); |
1229 | rt2x00_desc_read(rxd, 2, &word2); | 1226 | rt2x00_desc_read(priv_rx->desc, 2, &word2); |
1230 | 1227 | ||
1231 | desc->flags = 0; | 1228 | rxdesc->flags = 0; |
1232 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1229 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1233 | desc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1230 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1234 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) | 1231 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
1235 | desc->flags |= RX_FLAG_FAILED_PLCP_CRC; | 1232 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
1236 | 1233 | ||
1237 | desc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL); | 1234 | rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL); |
1238 | desc->rssi = rt2x00_get_field32(word2, RXD_W2_RSSI) - | 1235 | rxdesc->rssi = rt2x00_get_field32(word2, RXD_W2_RSSI) - |
1239 | entry->ring->rt2x00dev->rssi_offset; | 1236 | entry->queue->rt2x00dev->rssi_offset; |
1240 | desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); | 1237 | rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); |
1241 | desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1238 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1242 | desc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); | 1239 | rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); |
1243 | } | 1240 | } |
1244 | 1241 | ||
1245 | /* | 1242 | /* |
1246 | * Interrupt functions. | 1243 | * Interrupt functions. |
1247 | */ | 1244 | */ |
1248 | static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, const int queue) | 1245 | static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, |
1246 | const enum ieee80211_tx_queue queue_idx) | ||
1249 | { | 1247 | { |
1250 | struct data_ring *ring = rt2x00lib_get_ring(rt2x00dev, queue); | 1248 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); |
1251 | struct data_entry *entry; | 1249 | struct queue_entry_priv_pci_tx *priv_tx; |
1252 | __le32 *txd; | 1250 | struct queue_entry *entry; |
1251 | struct txdone_entry_desc txdesc; | ||
1253 | u32 word; | 1252 | u32 word; |
1254 | int tx_status; | ||
1255 | int retry; | ||
1256 | 1253 | ||
1257 | while (!rt2x00_ring_empty(ring)) { | 1254 | while (!rt2x00queue_empty(queue)) { |
1258 | entry = rt2x00_get_data_entry_done(ring); | 1255 | entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
1259 | txd = entry->priv; | 1256 | priv_tx = entry->priv_data; |
1260 | rt2x00_desc_read(txd, 0, &word); | 1257 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
1261 | 1258 | ||
1262 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || | 1259 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || |
1263 | !rt2x00_get_field32(word, TXD_W0_VALID)) | 1260 | !rt2x00_get_field32(word, TXD_W0_VALID)) |
@@ -1266,10 +1263,10 @@ static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, const int queue) | |||
1266 | /* | 1263 | /* |
1267 | * Obtain the status about this packet. | 1264 | * Obtain the status about this packet. |
1268 | */ | 1265 | */ |
1269 | tx_status = rt2x00_get_field32(word, TXD_W0_RESULT); | 1266 | txdesc.status = rt2x00_get_field32(word, TXD_W0_RESULT); |
1270 | retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); | 1267 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); |
1271 | 1268 | ||
1272 | rt2x00pci_txdone(rt2x00dev, entry, tx_status, retry); | 1269 | rt2x00pci_txdone(rt2x00dev, entry, &txdesc); |
1273 | } | 1270 | } |
1274 | } | 1271 | } |
1275 | 1272 | ||
@@ -1705,9 +1702,9 @@ static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1705 | rt2500pci_probe_hw_mode(rt2x00dev); | 1702 | rt2500pci_probe_hw_mode(rt2x00dev); |
1706 | 1703 | ||
1707 | /* | 1704 | /* |
1708 | * This device requires the beacon ring | 1705 | * This device requires the atim queue |
1709 | */ | 1706 | */ |
1710 | __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags); | 1707 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1711 | 1708 | ||
1712 | /* | 1709 | /* |
1713 | * Set the rssi offset. | 1710 | * Set the rssi offset. |
@@ -1871,12 +1868,42 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = { | |||
1871 | .config = rt2500pci_config, | 1868 | .config = rt2500pci_config, |
1872 | }; | 1869 | }; |
1873 | 1870 | ||
1871 | static const struct data_queue_desc rt2500pci_queue_rx = { | ||
1872 | .entry_num = RX_ENTRIES, | ||
1873 | .data_size = DATA_FRAME_SIZE, | ||
1874 | .desc_size = RXD_DESC_SIZE, | ||
1875 | .priv_size = sizeof(struct queue_entry_priv_pci_rx), | ||
1876 | }; | ||
1877 | |||
1878 | static const struct data_queue_desc rt2500pci_queue_tx = { | ||
1879 | .entry_num = TX_ENTRIES, | ||
1880 | .data_size = DATA_FRAME_SIZE, | ||
1881 | .desc_size = TXD_DESC_SIZE, | ||
1882 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
1883 | }; | ||
1884 | |||
1885 | static const struct data_queue_desc rt2500pci_queue_bcn = { | ||
1886 | .entry_num = BEACON_ENTRIES, | ||
1887 | .data_size = MGMT_FRAME_SIZE, | ||
1888 | .desc_size = TXD_DESC_SIZE, | ||
1889 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
1890 | }; | ||
1891 | |||
1892 | static const struct data_queue_desc rt2500pci_queue_atim = { | ||
1893 | .entry_num = ATIM_ENTRIES, | ||
1894 | .data_size = DATA_FRAME_SIZE, | ||
1895 | .desc_size = TXD_DESC_SIZE, | ||
1896 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
1897 | }; | ||
1898 | |||
1874 | static const struct rt2x00_ops rt2500pci_ops = { | 1899 | static const struct rt2x00_ops rt2500pci_ops = { |
1875 | .name = KBUILD_MODNAME, | 1900 | .name = KBUILD_MODNAME, |
1876 | .rxd_size = RXD_DESC_SIZE, | ||
1877 | .txd_size = TXD_DESC_SIZE, | ||
1878 | .eeprom_size = EEPROM_SIZE, | 1901 | .eeprom_size = EEPROM_SIZE, |
1879 | .rf_size = RF_SIZE, | 1902 | .rf_size = RF_SIZE, |
1903 | .rx = &rt2500pci_queue_rx, | ||
1904 | .tx = &rt2500pci_queue_tx, | ||
1905 | .bcn = &rt2500pci_queue_bcn, | ||
1906 | .atim = &rt2500pci_queue_atim, | ||
1880 | .lib = &rt2500pci_rt2x00_ops, | 1907 | .lib = &rt2500pci_rt2x00_ops, |
1881 | .hw = &rt2500pci_mac80211_ops, | 1908 | .hw = &rt2500pci_mac80211_ops, |
1882 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 1909 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c index bd4bbcc639c3..edc16a5fc754 100644 --- a/drivers/net/wireless/rt2x00/rt2500usb.c +++ b/drivers/net/wireless/rt2x00/rt2500usb.c | |||
@@ -1027,10 +1027,10 @@ static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1027 | */ | 1027 | */ |
1028 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1028 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1029 | struct sk_buff *skb, | 1029 | struct sk_buff *skb, |
1030 | struct txdata_entry_desc *desc, | 1030 | struct txentry_desc *txdesc, |
1031 | struct ieee80211_tx_control *control) | 1031 | struct ieee80211_tx_control *control) |
1032 | { | 1032 | { |
1033 | struct skb_desc *skbdesc = get_skb_desc(skb); | 1033 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1034 | __le32 *txd = skbdesc->desc; | 1034 | __le32 *txd = skbdesc->desc; |
1035 | u32 word; | 1035 | u32 word; |
1036 | 1036 | ||
@@ -1039,31 +1039,31 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1039 | */ | 1039 | */ |
1040 | rt2x00_desc_read(txd, 1, &word); | 1040 | rt2x00_desc_read(txd, 1, &word); |
1041 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | 1041 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
1042 | rt2x00_set_field32(&word, TXD_W1_AIFS, desc->aifs); | 1042 | rt2x00_set_field32(&word, TXD_W1_AIFS, txdesc->aifs); |
1043 | rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min); | 1043 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); |
1044 | rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max); | 1044 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); |
1045 | rt2x00_desc_write(txd, 1, word); | 1045 | rt2x00_desc_write(txd, 1, word); |
1046 | 1046 | ||
1047 | rt2x00_desc_read(txd, 2, &word); | 1047 | rt2x00_desc_read(txd, 2, &word); |
1048 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal); | 1048 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal); |
1049 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service); | 1049 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service); |
1050 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low); | 1050 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low); |
1051 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high); | 1051 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high); |
1052 | rt2x00_desc_write(txd, 2, word); | 1052 | rt2x00_desc_write(txd, 2, word); |
1053 | 1053 | ||
1054 | rt2x00_desc_read(txd, 0, &word); | 1054 | rt2x00_desc_read(txd, 0, &word); |
1055 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit); | 1055 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit); |
1056 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, | 1056 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
1057 | test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags)); | 1057 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
1058 | rt2x00_set_field32(&word, TXD_W0_ACK, | 1058 | rt2x00_set_field32(&word, TXD_W0_ACK, |
1059 | test_bit(ENTRY_TXD_ACK, &desc->flags)); | 1059 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
1060 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, | 1060 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
1061 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags)); | 1061 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
1062 | rt2x00_set_field32(&word, TXD_W0_OFDM, | 1062 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
1063 | test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags)); | 1063 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1064 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, | 1064 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, |
1065 | !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT)); | 1065 | !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT)); |
1066 | rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs); | 1066 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1067 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | 1067 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); |
1068 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); | 1068 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); |
1069 | rt2x00_desc_write(txd, 0, word); | 1069 | rt2x00_desc_write(txd, 0, word); |
@@ -1114,42 +1114,61 @@ static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1114 | /* | 1114 | /* |
1115 | * RX control handlers | 1115 | * RX control handlers |
1116 | */ | 1116 | */ |
1117 | static void rt2500usb_fill_rxdone(struct data_entry *entry, | 1117 | static void rt2500usb_fill_rxdone(struct queue_entry *entry, |
1118 | struct rxdata_entry_desc *desc) | 1118 | struct rxdone_entry_desc *rxdesc) |
1119 | { | 1119 | { |
1120 | struct skb_desc *skbdesc = get_skb_desc(entry->skb); | 1120 | struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data; |
1121 | struct urb *urb = entry->priv; | 1121 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1122 | __le32 *rxd = (__le32 *)(entry->skb->data + | 1122 | __le32 *rxd = |
1123 | (urb->actual_length - entry->ring->desc_size)); | 1123 | (__le32 *)(entry->skb->data + |
1124 | (priv_rx->urb->actual_length - entry->queue->desc_size)); | ||
1125 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data; | ||
1126 | int header_size = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control)); | ||
1124 | u32 word0; | 1127 | u32 word0; |
1125 | u32 word1; | 1128 | u32 word1; |
1126 | 1129 | ||
1127 | rt2x00_desc_read(rxd, 0, &word0); | 1130 | rt2x00_desc_read(rxd, 0, &word0); |
1128 | rt2x00_desc_read(rxd, 1, &word1); | 1131 | rt2x00_desc_read(rxd, 1, &word1); |
1129 | 1132 | ||
1130 | desc->flags = 0; | 1133 | rxdesc->flags = 0; |
1131 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1134 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1132 | desc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1135 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1133 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) | 1136 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
1134 | desc->flags |= RX_FLAG_FAILED_PLCP_CRC; | 1137 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
1135 | 1138 | ||
1136 | /* | 1139 | /* |
1137 | * Obtain the status about this packet. | 1140 | * Obtain the status about this packet. |
1138 | */ | 1141 | */ |
1139 | desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); | 1142 | rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
1140 | desc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) - | 1143 | rxdesc->rssi = rt2x00_get_field32(word1, RXD_W1_RSSI) - |
1141 | entry->ring->rt2x00dev->rssi_offset; | 1144 | entry->queue->rt2x00dev->rssi_offset; |
1142 | desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); | 1145 | rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); |
1143 | desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1146 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1144 | desc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); | 1147 | rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); |
1145 | 1148 | ||
1146 | /* | 1149 | /* |
1147 | * Set descriptor and data pointer. | 1150 | * The data behind the ieee80211 header must be |
1151 | * aligned on a 4 byte boundary. | ||
1152 | */ | ||
1153 | if (header_size % 4 == 0) { | ||
1154 | skb_push(entry->skb, 2); | ||
1155 | memmove(entry->skb->data, entry->skb->data + 2, | ||
1156 | entry->skb->len - 2); | ||
1157 | } | ||
1158 | |||
1159 | /* | ||
1160 | * Set descriptor pointer. | ||
1148 | */ | 1161 | */ |
1149 | skbdesc->desc = entry->skb->data + desc->size; | ||
1150 | skbdesc->desc_len = entry->ring->desc_size; | ||
1151 | skbdesc->data = entry->skb->data; | 1162 | skbdesc->data = entry->skb->data; |
1152 | skbdesc->data_len = desc->size; | 1163 | skbdesc->data_len = entry->queue->data_size; |
1164 | skbdesc->desc = entry->skb->data + rxdesc->size; | ||
1165 | skbdesc->desc_len = entry->queue->desc_size; | ||
1166 | |||
1167 | /* | ||
1168 | * Remove descriptor from skb buffer and trim the whole thing | ||
1169 | * down to only contain data. | ||
1170 | */ | ||
1171 | skb_trim(entry->skb, rxdesc->size); | ||
1153 | } | 1172 | } |
1154 | 1173 | ||
1155 | /* | 1174 | /* |
@@ -1157,10 +1176,10 @@ static void rt2500usb_fill_rxdone(struct data_entry *entry, | |||
1157 | */ | 1176 | */ |
1158 | static void rt2500usb_beacondone(struct urb *urb) | 1177 | static void rt2500usb_beacondone(struct urb *urb) |
1159 | { | 1178 | { |
1160 | struct data_entry *entry = (struct data_entry *)urb->context; | 1179 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
1161 | struct data_ring *ring = entry->ring; | 1180 | struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data; |
1162 | 1181 | ||
1163 | if (!test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) | 1182 | if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) |
1164 | return; | 1183 | return; |
1165 | 1184 | ||
1166 | /* | 1185 | /* |
@@ -1169,18 +1188,11 @@ static void rt2500usb_beacondone(struct urb *urb) | |||
1169 | * Otherwise we should free the sk_buffer, the device | 1188 | * Otherwise we should free the sk_buffer, the device |
1170 | * should be doing the rest of the work now. | 1189 | * should be doing the rest of the work now. |
1171 | */ | 1190 | */ |
1172 | if (ring->index == 1) { | 1191 | if (priv_bcn->guardian_urb == urb) { |
1173 | rt2x00_ring_index_done_inc(ring); | 1192 | usb_submit_urb(priv_bcn->urb, GFP_ATOMIC); |
1174 | entry = rt2x00_get_data_entry(ring); | 1193 | } else if (priv_bcn->urb == urb) { |
1175 | usb_submit_urb(entry->priv, GFP_ATOMIC); | 1194 | dev_kfree_skb(entry->skb); |
1176 | rt2x00_ring_index_inc(ring); | 1195 | entry->skb = NULL; |
1177 | } else if (ring->index_done == 1) { | ||
1178 | entry = rt2x00_get_data_entry_done(ring); | ||
1179 | if (entry->skb) { | ||
1180 | dev_kfree_skb(entry->skb); | ||
1181 | entry->skb = NULL; | ||
1182 | } | ||
1183 | rt2x00_ring_index_done_inc(ring); | ||
1184 | } | 1196 | } |
1185 | } | 1197 | } |
1186 | 1198 | ||
@@ -1599,9 +1611,10 @@ static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1599 | rt2500usb_probe_hw_mode(rt2x00dev); | 1611 | rt2500usb_probe_hw_mode(rt2x00dev); |
1600 | 1612 | ||
1601 | /* | 1613 | /* |
1602 | * This device requires the beacon ring | 1614 | * This device requires the atim queue |
1603 | */ | 1615 | */ |
1604 | __set_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags); | 1616 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1617 | __set_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | ||
1605 | 1618 | ||
1606 | /* | 1619 | /* |
1607 | * Set the rssi offset. | 1620 | * Set the rssi offset. |
@@ -1691,12 +1704,11 @@ static int rt2500usb_beacon_update(struct ieee80211_hw *hw, | |||
1691 | struct ieee80211_tx_control *control) | 1704 | struct ieee80211_tx_control *control) |
1692 | { | 1705 | { |
1693 | struct rt2x00_dev *rt2x00dev = hw->priv; | 1706 | struct rt2x00_dev *rt2x00dev = hw->priv; |
1694 | struct usb_device *usb_dev = | 1707 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); |
1695 | interface_to_usbdev(rt2x00dev_usb(rt2x00dev)); | 1708 | struct queue_entry_priv_usb_bcn *priv_bcn; |
1696 | struct skb_desc *desc; | 1709 | struct skb_frame_desc *skbdesc; |
1697 | struct data_ring *ring; | 1710 | struct data_queue *queue; |
1698 | struct data_entry *beacon; | 1711 | struct queue_entry *entry; |
1699 | struct data_entry *guardian; | ||
1700 | int pipe = usb_sndbulkpipe(usb_dev, 1); | 1712 | int pipe = usb_sndbulkpipe(usb_dev, 1); |
1701 | int length; | 1713 | int length; |
1702 | 1714 | ||
@@ -1706,32 +1718,26 @@ static int rt2500usb_beacon_update(struct ieee80211_hw *hw, | |||
1706 | * initialization. | 1718 | * initialization. |
1707 | */ | 1719 | */ |
1708 | control->queue = IEEE80211_TX_QUEUE_BEACON; | 1720 | control->queue = IEEE80211_TX_QUEUE_BEACON; |
1709 | ring = rt2x00lib_get_ring(rt2x00dev, control->queue); | 1721 | queue = rt2x00queue_get_queue(rt2x00dev, control->queue); |
1710 | 1722 | entry = rt2x00queue_get_entry(queue, Q_INDEX); | |
1711 | /* | 1723 | priv_bcn = entry->priv_data; |
1712 | * Obtain 2 entries, one for the guardian byte, | ||
1713 | * the second for the actual beacon. | ||
1714 | */ | ||
1715 | guardian = rt2x00_get_data_entry(ring); | ||
1716 | rt2x00_ring_index_inc(ring); | ||
1717 | beacon = rt2x00_get_data_entry(ring); | ||
1718 | 1724 | ||
1719 | /* | 1725 | /* |
1720 | * Add the descriptor in front of the skb. | 1726 | * Add the descriptor in front of the skb. |
1721 | */ | 1727 | */ |
1722 | skb_push(skb, ring->desc_size); | 1728 | skb_push(skb, queue->desc_size); |
1723 | memset(skb->data, 0, ring->desc_size); | 1729 | memset(skb->data, 0, queue->desc_size); |
1724 | 1730 | ||
1725 | /* | 1731 | /* |
1726 | * Fill in skb descriptor | 1732 | * Fill in skb descriptor |
1727 | */ | 1733 | */ |
1728 | desc = get_skb_desc(skb); | 1734 | skbdesc = get_skb_frame_desc(skb); |
1729 | desc->desc_len = ring->desc_size; | 1735 | memset(skbdesc, 0, sizeof(*skbdesc)); |
1730 | desc->data_len = skb->len - ring->desc_size; | 1736 | skbdesc->data = skb->data + queue->desc_size; |
1731 | desc->desc = skb->data; | 1737 | skbdesc->data_len = queue->data_size; |
1732 | desc->data = skb->data + ring->desc_size; | 1738 | skbdesc->desc = skb->data; |
1733 | desc->ring = ring; | 1739 | skbdesc->desc_len = queue->desc_size; |
1734 | desc->entry = beacon; | 1740 | skbdesc->entry = entry; |
1735 | 1741 | ||
1736 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | 1742 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); |
1737 | 1743 | ||
@@ -1742,22 +1748,23 @@ static int rt2500usb_beacon_update(struct ieee80211_hw *hw, | |||
1742 | */ | 1748 | */ |
1743 | length = rt2500usb_get_tx_data_len(rt2x00dev, skb); | 1749 | length = rt2500usb_get_tx_data_len(rt2x00dev, skb); |
1744 | 1750 | ||
1745 | usb_fill_bulk_urb(beacon->priv, usb_dev, pipe, | 1751 | usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe, |
1746 | skb->data, length, rt2500usb_beacondone, beacon); | 1752 | skb->data, length, rt2500usb_beacondone, entry); |
1747 | 1753 | ||
1748 | /* | 1754 | /* |
1749 | * Second we need to create the guardian byte. | 1755 | * Second we need to create the guardian byte. |
1750 | * We only need a single byte, so lets recycle | 1756 | * We only need a single byte, so lets recycle |
1751 | * the 'flags' field we are not using for beacons. | 1757 | * the 'flags' field we are not using for beacons. |
1752 | */ | 1758 | */ |
1753 | guardian->flags = 0; | 1759 | priv_bcn->guardian_data = 0; |
1754 | usb_fill_bulk_urb(guardian->priv, usb_dev, pipe, | 1760 | usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe, |
1755 | &guardian->flags, 1, rt2500usb_beacondone, guardian); | 1761 | &priv_bcn->guardian_data, 1, rt2500usb_beacondone, |
1762 | entry); | ||
1756 | 1763 | ||
1757 | /* | 1764 | /* |
1758 | * Send out the guardian byte. | 1765 | * Send out the guardian byte. |
1759 | */ | 1766 | */ |
1760 | usb_submit_urb(guardian->priv, GFP_ATOMIC); | 1767 | usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC); |
1761 | 1768 | ||
1762 | /* | 1769 | /* |
1763 | * Enable beacon generation. | 1770 | * Enable beacon generation. |
@@ -1805,12 +1812,42 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { | |||
1805 | .config = rt2500usb_config, | 1812 | .config = rt2500usb_config, |
1806 | }; | 1813 | }; |
1807 | 1814 | ||
1815 | static const struct data_queue_desc rt2500usb_queue_rx = { | ||
1816 | .entry_num = RX_ENTRIES, | ||
1817 | .data_size = DATA_FRAME_SIZE, | ||
1818 | .desc_size = RXD_DESC_SIZE, | ||
1819 | .priv_size = sizeof(struct queue_entry_priv_usb_rx), | ||
1820 | }; | ||
1821 | |||
1822 | static const struct data_queue_desc rt2500usb_queue_tx = { | ||
1823 | .entry_num = TX_ENTRIES, | ||
1824 | .data_size = DATA_FRAME_SIZE, | ||
1825 | .desc_size = TXD_DESC_SIZE, | ||
1826 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | ||
1827 | }; | ||
1828 | |||
1829 | static const struct data_queue_desc rt2500usb_queue_bcn = { | ||
1830 | .entry_num = BEACON_ENTRIES, | ||
1831 | .data_size = MGMT_FRAME_SIZE, | ||
1832 | .desc_size = TXD_DESC_SIZE, | ||
1833 | .priv_size = sizeof(struct queue_entry_priv_usb_bcn), | ||
1834 | }; | ||
1835 | |||
1836 | static const struct data_queue_desc rt2500usb_queue_atim = { | ||
1837 | .entry_num = ATIM_ENTRIES, | ||
1838 | .data_size = DATA_FRAME_SIZE, | ||
1839 | .desc_size = TXD_DESC_SIZE, | ||
1840 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | ||
1841 | }; | ||
1842 | |||
1808 | static const struct rt2x00_ops rt2500usb_ops = { | 1843 | static const struct rt2x00_ops rt2500usb_ops = { |
1809 | .name = KBUILD_MODNAME, | 1844 | .name = KBUILD_MODNAME, |
1810 | .rxd_size = RXD_DESC_SIZE, | ||
1811 | .txd_size = TXD_DESC_SIZE, | ||
1812 | .eeprom_size = EEPROM_SIZE, | 1845 | .eeprom_size = EEPROM_SIZE, |
1813 | .rf_size = RF_SIZE, | 1846 | .rf_size = RF_SIZE, |
1847 | .rx = &rt2500usb_queue_rx, | ||
1848 | .tx = &rt2500usb_queue_tx, | ||
1849 | .bcn = &rt2500usb_queue_bcn, | ||
1850 | .atim = &rt2500usb_queue_atim, | ||
1814 | .lib = &rt2500usb_rt2x00_ops, | 1851 | .lib = &rt2500usb_rt2x00_ops, |
1815 | .hw = &rt2500usb_mac80211_ops, | 1852 | .hw = &rt2500usb_mac80211_ops, |
1816 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 1853 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index 86e4624a63ea..7b67f9666c3b 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -27,7 +27,6 @@ | |||
27 | #define RT2X00_H | 27 | #define RT2X00_H |
28 | 28 | ||
29 | #include <linux/bitops.h> | 29 | #include <linux/bitops.h> |
30 | #include <linux/prefetch.h> | ||
31 | #include <linux/skbuff.h> | 30 | #include <linux/skbuff.h> |
32 | #include <linux/workqueue.h> | 31 | #include <linux/workqueue.h> |
33 | #include <linux/firmware.h> | 32 | #include <linux/firmware.h> |
@@ -38,7 +37,7 @@ | |||
38 | 37 | ||
39 | #include "rt2x00debug.h" | 38 | #include "rt2x00debug.h" |
40 | #include "rt2x00reg.h" | 39 | #include "rt2x00reg.h" |
41 | #include "rt2x00ring.h" | 40 | #include "rt2x00queue.h" |
42 | 41 | ||
43 | /* | 42 | /* |
44 | * Module information. | 43 | * Module information. |
@@ -91,26 +90,6 @@ | |||
91 | DEBUG_PRINTK(__dev, KERN_DEBUG, "EEPROM recovery", __msg, ##__args) | 90 | DEBUG_PRINTK(__dev, KERN_DEBUG, "EEPROM recovery", __msg, ##__args) |
92 | 91 | ||
93 | /* | 92 | /* |
94 | * Ring sizes. | ||
95 | * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes. | ||
96 | * DATA_FRAME_SIZE is used for TX, RX, ATIM and PRIO rings. | ||
97 | * MGMT_FRAME_SIZE is used for the BEACON ring. | ||
98 | */ | ||
99 | #define DATA_FRAME_SIZE 2432 | ||
100 | #define MGMT_FRAME_SIZE 256 | ||
101 | |||
102 | /* | ||
103 | * Number of entries in a packet ring. | ||
104 | * PCI devices only need 1 Beacon entry, | ||
105 | * but USB devices require a second because they | ||
106 | * have to send a Guardian byte first. | ||
107 | */ | ||
108 | #define RX_ENTRIES 12 | ||
109 | #define TX_ENTRIES 12 | ||
110 | #define ATIM_ENTRIES 1 | ||
111 | #define BEACON_ENTRIES 2 | ||
112 | |||
113 | /* | ||
114 | * Standard timing and size defines. | 93 | * Standard timing and size defines. |
115 | * These values should follow the ieee80211 specifications. | 94 | * These values should follow the ieee80211 specifications. |
116 | */ | 95 | */ |
@@ -474,12 +453,12 @@ struct rt2x00lib_ops { | |||
474 | void (*uninitialize) (struct rt2x00_dev *rt2x00dev); | 453 | void (*uninitialize) (struct rt2x00_dev *rt2x00dev); |
475 | 454 | ||
476 | /* | 455 | /* |
477 | * Ring initialization handlers | 456 | * queue initialization handlers |
478 | */ | 457 | */ |
479 | void (*init_rxentry) (struct rt2x00_dev *rt2x00dev, | 458 | void (*init_rxentry) (struct rt2x00_dev *rt2x00dev, |
480 | struct data_entry *entry); | 459 | struct queue_entry *entry); |
481 | void (*init_txentry) (struct rt2x00_dev *rt2x00dev, | 460 | void (*init_txentry) (struct rt2x00_dev *rt2x00dev, |
482 | struct data_entry *entry); | 461 | struct queue_entry *entry); |
483 | 462 | ||
484 | /* | 463 | /* |
485 | * Radio control handlers. | 464 | * Radio control handlers. |
@@ -497,10 +476,10 @@ struct rt2x00lib_ops { | |||
497 | */ | 476 | */ |
498 | void (*write_tx_desc) (struct rt2x00_dev *rt2x00dev, | 477 | void (*write_tx_desc) (struct rt2x00_dev *rt2x00dev, |
499 | struct sk_buff *skb, | 478 | struct sk_buff *skb, |
500 | struct txdata_entry_desc *desc, | 479 | struct txentry_desc *txdesc, |
501 | struct ieee80211_tx_control *control); | 480 | struct ieee80211_tx_control *control); |
502 | int (*write_tx_data) (struct rt2x00_dev *rt2x00dev, | 481 | int (*write_tx_data) (struct rt2x00_dev *rt2x00dev, |
503 | struct data_ring *ring, struct sk_buff *skb, | 482 | struct data_queue *queue, struct sk_buff *skb, |
504 | struct ieee80211_tx_control *control); | 483 | struct ieee80211_tx_control *control); |
505 | int (*get_tx_data_len) (struct rt2x00_dev *rt2x00dev, | 484 | int (*get_tx_data_len) (struct rt2x00_dev *rt2x00dev, |
506 | struct sk_buff *skb); | 485 | struct sk_buff *skb); |
@@ -510,8 +489,8 @@ struct rt2x00lib_ops { | |||
510 | /* | 489 | /* |
511 | * RX control handlers | 490 | * RX control handlers |
512 | */ | 491 | */ |
513 | void (*fill_rxdone) (struct data_entry *entry, | 492 | void (*fill_rxdone) (struct queue_entry *entry, |
514 | struct rxdata_entry_desc *desc); | 493 | struct rxdone_entry_desc *rxdesc); |
515 | 494 | ||
516 | /* | 495 | /* |
517 | * Configuration handlers. | 496 | * Configuration handlers. |
@@ -540,10 +519,12 @@ struct rt2x00lib_ops { | |||
540 | */ | 519 | */ |
541 | struct rt2x00_ops { | 520 | struct rt2x00_ops { |
542 | const char *name; | 521 | const char *name; |
543 | const unsigned int rxd_size; | ||
544 | const unsigned int txd_size; | ||
545 | const unsigned int eeprom_size; | 522 | const unsigned int eeprom_size; |
546 | const unsigned int rf_size; | 523 | const unsigned int rf_size; |
524 | const struct data_queue_desc *rx; | ||
525 | const struct data_queue_desc *tx; | ||
526 | const struct data_queue_desc *bcn; | ||
527 | const struct data_queue_desc *atim; | ||
547 | const struct rt2x00lib_ops *lib; | 528 | const struct rt2x00lib_ops *lib; |
548 | const struct ieee80211_ops *hw; | 529 | const struct ieee80211_ops *hw; |
549 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 530 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
@@ -570,7 +551,8 @@ enum rt2x00_flags { | |||
570 | * Driver features | 551 | * Driver features |
571 | */ | 552 | */ |
572 | DRIVER_REQUIRE_FIRMWARE, | 553 | DRIVER_REQUIRE_FIRMWARE, |
573 | DRIVER_REQUIRE_BEACON_RING, | 554 | DRIVER_REQUIRE_BEACON_GUARD, |
555 | DRIVER_REQUIRE_ATIM_QUEUE, | ||
574 | 556 | ||
575 | /* | 557 | /* |
576 | * Driver configuration | 558 | * Driver configuration |
@@ -597,8 +579,10 @@ struct rt2x00_dev { | |||
597 | * macro's should be used for correct typecasting. | 579 | * macro's should be used for correct typecasting. |
598 | */ | 580 | */ |
599 | void *dev; | 581 | void *dev; |
600 | #define rt2x00dev_pci(__dev) ( (struct pci_dev*)(__dev)->dev ) | 582 | #define rt2x00dev_pci(__dev) ( (struct pci_dev *)(__dev)->dev ) |
601 | #define rt2x00dev_usb(__dev) ( (struct usb_interface*)(__dev)->dev ) | 583 | #define rt2x00dev_usb(__dev) ( (struct usb_interface *)(__dev)->dev ) |
584 | #define rt2x00dev_usb_dev(__dev)\ | ||
585 | ( (struct usb_device *)interface_to_usbdev(rt2x00dev_usb(__dev)) ) | ||
602 | 586 | ||
603 | /* | 587 | /* |
604 | * Callback functions. | 588 | * Callback functions. |
@@ -757,14 +741,14 @@ struct rt2x00_dev { | |||
757 | struct work_struct config_work; | 741 | struct work_struct config_work; |
758 | 742 | ||
759 | /* | 743 | /* |
760 | * Data ring arrays for RX, TX and Beacon. | 744 | * Data queue arrays for RX, TX and Beacon. |
761 | * The Beacon array also contains the Atim ring | 745 | * The Beacon array also contains the Atim queue |
762 | * if that is supported by the device. | 746 | * if that is supported by the device. |
763 | */ | 747 | */ |
764 | int data_rings; | 748 | int data_queues; |
765 | struct data_ring *rx; | 749 | struct data_queue *rx; |
766 | struct data_ring *tx; | 750 | struct data_queue *tx; |
767 | struct data_ring *bcn; | 751 | struct data_queue *bcn; |
768 | 752 | ||
769 | /* | 753 | /* |
770 | * Firmware image. | 754 | * Firmware image. |
@@ -773,37 +757,6 @@ struct rt2x00_dev { | |||
773 | }; | 757 | }; |
774 | 758 | ||
775 | /* | 759 | /* |
776 | * For-each loop for the ring array. | ||
777 | * All rings have been allocated as a single array, | ||
778 | * this means we can create a very simply loop macro | ||
779 | * that is capable of looping through all rings. | ||
780 | * ring_end(), txring_end() and ring_loop() are helper macro's which | ||
781 | * should not be used directly. Instead the following should be used: | ||
782 | * ring_for_each() - Loops through all rings (RX, TX, Beacon & Atim) | ||
783 | * txring_for_each() - Loops through TX data rings (TX only) | ||
784 | * txringall_for_each() - Loops through all TX rings (TX, Beacon & Atim) | ||
785 | */ | ||
786 | #define ring_end(__dev) \ | ||
787 | &(__dev)->rx[(__dev)->data_rings] | ||
788 | |||
789 | #define txring_end(__dev) \ | ||
790 | &(__dev)->tx[(__dev)->hw->queues] | ||
791 | |||
792 | #define ring_loop(__entry, __start, __end) \ | ||
793 | for ((__entry) = (__start); \ | ||
794 | prefetch(&(__entry)[1]), (__entry) != (__end); \ | ||
795 | (__entry) = &(__entry)[1]) | ||
796 | |||
797 | #define ring_for_each(__dev, __entry) \ | ||
798 | ring_loop(__entry, (__dev)->rx, ring_end(__dev)) | ||
799 | |||
800 | #define txring_for_each(__dev, __entry) \ | ||
801 | ring_loop(__entry, (__dev)->tx, txring_end(__dev)) | ||
802 | |||
803 | #define txringall_for_each(__dev, __entry) \ | ||
804 | ring_loop(__entry, (__dev)->tx, ring_end(__dev)) | ||
805 | |||
806 | /* | ||
807 | * Generic RF access. | 760 | * Generic RF access. |
808 | * The RF is being accessed by word index. | 761 | * The RF is being accessed by word index. |
809 | */ | 762 | */ |
@@ -895,20 +848,42 @@ static inline u16 get_duration_res(const unsigned int size, const u8 rate) | |||
895 | return ((size * 8 * 10) % rate); | 848 | return ((size * 8 * 10) % rate); |
896 | } | 849 | } |
897 | 850 | ||
898 | /* | 851 | /** |
899 | * Library functions. | 852 | * rt2x00queue_get_queue - Convert mac80211 queue index to rt2x00 queue |
853 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
854 | * @queue: mac80211 queue index (see &enum ieee80211_tx_queue). | ||
900 | */ | 855 | */ |
901 | struct data_ring *rt2x00lib_get_ring(struct rt2x00_dev *rt2x00dev, | 856 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, |
902 | const unsigned int queue); | 857 | const enum ieee80211_tx_queue queue); |
858 | |||
859 | /** | ||
860 | * rt2x00queue_get_entry - Get queue entry where the given index points to. | ||
861 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
862 | * @index: Index identifier for obtaining the correct index. | ||
863 | */ | ||
864 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | ||
865 | enum queue_index index); | ||
866 | |||
867 | /** | ||
868 | * rt2x00queue_index_inc - Index incrementation function | ||
869 | * @queue: Queue (&struct data_queue) to perform the action on. | ||
870 | * @action: Index type (&enum queue_index) to perform the action on. | ||
871 | * | ||
872 | * This function will increase the requested index on the queue, | ||
873 | * it will grab the appropriate locks and handle queue overflow events by | ||
874 | * resetting the index to the start of the queue. | ||
875 | */ | ||
876 | void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index); | ||
877 | |||
903 | 878 | ||
904 | /* | 879 | /* |
905 | * Interrupt context handlers. | 880 | * Interrupt context handlers. |
906 | */ | 881 | */ |
907 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | 882 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); |
908 | void rt2x00lib_txdone(struct data_entry *entry, | 883 | void rt2x00lib_txdone(struct queue_entry *entry, |
909 | const int status, const int retry); | 884 | struct txdone_entry_desc *txdesc); |
910 | void rt2x00lib_rxdone(struct data_entry *entry, struct sk_buff *skb, | 885 | void rt2x00lib_rxdone(struct queue_entry *entry, |
911 | struct rxdata_entry_desc *desc); | 886 | struct rxdone_entry_desc *rxdesc); |
912 | 887 | ||
913 | /* | 888 | /* |
914 | * TX descriptor initializer | 889 | * TX descriptor initializer |
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c index d70ce6ec8de8..4e048ac0a684 100644 --- a/drivers/net/wireless/rt2x00/rt2x00debug.c +++ b/drivers/net/wireless/rt2x00/rt2x00debug.c | |||
@@ -116,7 +116,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |||
116 | struct sk_buff *skb) | 116 | struct sk_buff *skb) |
117 | { | 117 | { |
118 | struct rt2x00debug_intf *intf = rt2x00dev->debugfs_intf; | 118 | struct rt2x00debug_intf *intf = rt2x00dev->debugfs_intf; |
119 | struct skb_desc *desc = get_skb_desc(skb); | 119 | struct skb_frame_desc *desc = get_skb_frame_desc(skb); |
120 | struct sk_buff *skbcopy; | 120 | struct sk_buff *skbcopy; |
121 | struct rt2x00dump_hdr *dump_hdr; | 121 | struct rt2x00dump_hdr *dump_hdr; |
122 | struct timeval timestamp; | 122 | struct timeval timestamp; |
@@ -147,7 +147,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |||
147 | dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf); | 147 | dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf); |
148 | dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev); | 148 | dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev); |
149 | dump_hdr->type = cpu_to_le16(desc->frame_type); | 149 | dump_hdr->type = cpu_to_le16(desc->frame_type); |
150 | dump_hdr->ring_index = desc->ring->queue_idx; | 150 | dump_hdr->queue_index = desc->entry->queue->qid; |
151 | dump_hdr->entry_index = desc->entry->entry_idx; | 151 | dump_hdr->entry_index = desc->entry->entry_idx; |
152 | dump_hdr->timestamp_sec = cpu_to_le32(timestamp.tv_sec); | 152 | dump_hdr->timestamp_sec = cpu_to_le32(timestamp.tv_sec); |
153 | dump_hdr->timestamp_usec = cpu_to_le32(timestamp.tv_usec); | 153 | dump_hdr->timestamp_usec = cpu_to_le32(timestamp.tv_usec); |
@@ -186,7 +186,7 @@ static int rt2x00debug_file_release(struct inode *inode, struct file *file) | |||
186 | return 0; | 186 | return 0; |
187 | } | 187 | } |
188 | 188 | ||
189 | static int rt2x00debug_open_ring_dump(struct inode *inode, struct file *file) | 189 | static int rt2x00debug_open_queue_dump(struct inode *inode, struct file *file) |
190 | { | 190 | { |
191 | struct rt2x00debug_intf *intf = inode->i_private; | 191 | struct rt2x00debug_intf *intf = inode->i_private; |
192 | int retval; | 192 | int retval; |
@@ -203,7 +203,7 @@ static int rt2x00debug_open_ring_dump(struct inode *inode, struct file *file) | |||
203 | return 0; | 203 | return 0; |
204 | } | 204 | } |
205 | 205 | ||
206 | static int rt2x00debug_release_ring_dump(struct inode *inode, struct file *file) | 206 | static int rt2x00debug_release_queue_dump(struct inode *inode, struct file *file) |
207 | { | 207 | { |
208 | struct rt2x00debug_intf *intf = inode->i_private; | 208 | struct rt2x00debug_intf *intf = inode->i_private; |
209 | 209 | ||
@@ -214,10 +214,10 @@ static int rt2x00debug_release_ring_dump(struct inode *inode, struct file *file) | |||
214 | return rt2x00debug_file_release(inode, file); | 214 | return rt2x00debug_file_release(inode, file); |
215 | } | 215 | } |
216 | 216 | ||
217 | static ssize_t rt2x00debug_read_ring_dump(struct file *file, | 217 | static ssize_t rt2x00debug_read_queue_dump(struct file *file, |
218 | char __user *buf, | 218 | char __user *buf, |
219 | size_t length, | 219 | size_t length, |
220 | loff_t *offset) | 220 | loff_t *offset) |
221 | { | 221 | { |
222 | struct rt2x00debug_intf *intf = file->private_data; | 222 | struct rt2x00debug_intf *intf = file->private_data; |
223 | struct sk_buff *skb; | 223 | struct sk_buff *skb; |
@@ -248,8 +248,8 @@ exit: | |||
248 | return status; | 248 | return status; |
249 | } | 249 | } |
250 | 250 | ||
251 | static unsigned int rt2x00debug_poll_ring_dump(struct file *file, | 251 | static unsigned int rt2x00debug_poll_queue_dump(struct file *file, |
252 | poll_table *wait) | 252 | poll_table *wait) |
253 | { | 253 | { |
254 | struct rt2x00debug_intf *intf = file->private_data; | 254 | struct rt2x00debug_intf *intf = file->private_data; |
255 | 255 | ||
@@ -261,12 +261,12 @@ static unsigned int rt2x00debug_poll_ring_dump(struct file *file, | |||
261 | return 0; | 261 | return 0; |
262 | } | 262 | } |
263 | 263 | ||
264 | static const struct file_operations rt2x00debug_fop_ring_dump = { | 264 | static const struct file_operations rt2x00debug_fop_queue_dump = { |
265 | .owner = THIS_MODULE, | 265 | .owner = THIS_MODULE, |
266 | .read = rt2x00debug_read_ring_dump, | 266 | .read = rt2x00debug_read_queue_dump, |
267 | .poll = rt2x00debug_poll_ring_dump, | 267 | .poll = rt2x00debug_poll_queue_dump, |
268 | .open = rt2x00debug_open_ring_dump, | 268 | .open = rt2x00debug_open_queue_dump, |
269 | .release = rt2x00debug_release_ring_dump, | 269 | .release = rt2x00debug_release_queue_dump, |
270 | }; | 270 | }; |
271 | 271 | ||
272 | #define RT2X00DEBUGFS_OPS_READ(__name, __format, __type) \ | 272 | #define RT2X00DEBUGFS_OPS_READ(__name, __format, __type) \ |
@@ -503,7 +503,7 @@ void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | |||
503 | 503 | ||
504 | intf->frame_dump_entry = | 504 | intf->frame_dump_entry = |
505 | debugfs_create_file("dump", S_IRUGO, intf->frame_folder, | 505 | debugfs_create_file("dump", S_IRUGO, intf->frame_folder, |
506 | intf, &rt2x00debug_fop_ring_dump); | 506 | intf, &rt2x00debug_fop_queue_dump); |
507 | if (IS_ERR(intf->frame_dump_entry)) | 507 | if (IS_ERR(intf->frame_dump_entry)) |
508 | goto exit; | 508 | goto exit; |
509 | 509 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 57355077fb7c..7620427887b6 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -31,34 +31,6 @@ | |||
31 | #include "rt2x00dump.h" | 31 | #include "rt2x00dump.h" |
32 | 32 | ||
33 | /* | 33 | /* |
34 | * Ring handler. | ||
35 | */ | ||
36 | struct data_ring *rt2x00lib_get_ring(struct rt2x00_dev *rt2x00dev, | ||
37 | const unsigned int queue) | ||
38 | { | ||
39 | int beacon = test_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags); | ||
40 | |||
41 | /* | ||
42 | * Check if we are requesting a reqular TX ring, | ||
43 | * or if we are requesting a Beacon or Atim ring. | ||
44 | * For Atim rings, we should check if it is supported. | ||
45 | */ | ||
46 | if (queue < rt2x00dev->hw->queues && rt2x00dev->tx) | ||
47 | return &rt2x00dev->tx[queue]; | ||
48 | |||
49 | if (!rt2x00dev->bcn || !beacon) | ||
50 | return NULL; | ||
51 | |||
52 | if (queue == IEEE80211_TX_QUEUE_BEACON) | ||
53 | return &rt2x00dev->bcn[0]; | ||
54 | else if (queue == IEEE80211_TX_QUEUE_AFTER_BEACON) | ||
55 | return &rt2x00dev->bcn[1]; | ||
56 | |||
57 | return NULL; | ||
58 | } | ||
59 | EXPORT_SYMBOL_GPL(rt2x00lib_get_ring); | ||
60 | |||
61 | /* | ||
62 | * Link tuning handlers | 34 | * Link tuning handlers |
63 | */ | 35 | */ |
64 | void rt2x00lib_reset_link_tuner(struct rt2x00_dev *rt2x00dev) | 36 | void rt2x00lib_reset_link_tuner(struct rt2x00_dev *rt2x00dev) |
@@ -113,46 +85,6 @@ static void rt2x00lib_stop_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
113 | } | 85 | } |
114 | 86 | ||
115 | /* | 87 | /* |
116 | * Ring initialization | ||
117 | */ | ||
118 | static void rt2x00lib_init_rxrings(struct rt2x00_dev *rt2x00dev) | ||
119 | { | ||
120 | struct data_ring *ring = rt2x00dev->rx; | ||
121 | unsigned int i; | ||
122 | |||
123 | if (!rt2x00dev->ops->lib->init_rxentry) | ||
124 | return; | ||
125 | |||
126 | if (ring->data_addr) | ||
127 | memset(ring->data_addr, 0, rt2x00_get_ring_size(ring)); | ||
128 | |||
129 | for (i = 0; i < ring->stats.limit; i++) | ||
130 | rt2x00dev->ops->lib->init_rxentry(rt2x00dev, &ring->entry[i]); | ||
131 | |||
132 | rt2x00_ring_index_clear(ring); | ||
133 | } | ||
134 | |||
135 | static void rt2x00lib_init_txrings(struct rt2x00_dev *rt2x00dev) | ||
136 | { | ||
137 | struct data_ring *ring; | ||
138 | unsigned int i; | ||
139 | |||
140 | if (!rt2x00dev->ops->lib->init_txentry) | ||
141 | return; | ||
142 | |||
143 | txringall_for_each(rt2x00dev, ring) { | ||
144 | if (ring->data_addr) | ||
145 | memset(ring->data_addr, 0, rt2x00_get_ring_size(ring)); | ||
146 | |||
147 | for (i = 0; i < ring->stats.limit; i++) | ||
148 | rt2x00dev->ops->lib->init_txentry(rt2x00dev, | ||
149 | &ring->entry[i]); | ||
150 | |||
151 | rt2x00_ring_index_clear(ring); | ||
152 | } | ||
153 | } | ||
154 | |||
155 | /* | ||
156 | * Radio control handlers. | 88 | * Radio control handlers. |
157 | */ | 89 | */ |
158 | int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev) | 90 | int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev) |
@@ -168,10 +100,10 @@ int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
168 | return 0; | 100 | return 0; |
169 | 101 | ||
170 | /* | 102 | /* |
171 | * Initialize all data rings. | 103 | * Initialize all data queues. |
172 | */ | 104 | */ |
173 | rt2x00lib_init_rxrings(rt2x00dev); | 105 | rt2x00queue_init_rx(rt2x00dev); |
174 | rt2x00lib_init_txrings(rt2x00dev); | 106 | rt2x00queue_init_tx(rt2x00dev); |
175 | 107 | ||
176 | /* | 108 | /* |
177 | * Enable radio. | 109 | * Enable radio. |
@@ -504,19 +436,15 @@ static void rt2x00lib_beacondone_scheduled(struct work_struct *work) | |||
504 | { | 436 | { |
505 | struct rt2x00_dev *rt2x00dev = | 437 | struct rt2x00_dev *rt2x00dev = |
506 | container_of(work, struct rt2x00_dev, beacon_work); | 438 | container_of(work, struct rt2x00_dev, beacon_work); |
507 | struct data_ring *ring = | 439 | struct ieee80211_tx_control control; |
508 | rt2x00lib_get_ring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON); | ||
509 | struct data_entry *entry = rt2x00_get_data_entry(ring); | ||
510 | struct sk_buff *skb; | 440 | struct sk_buff *skb; |
511 | 441 | ||
512 | skb = ieee80211_beacon_get(rt2x00dev->hw, | 442 | skb = ieee80211_beacon_get(rt2x00dev->hw, |
513 | rt2x00dev->interface.id, | 443 | rt2x00dev->interface.id, &control); |
514 | &entry->tx_status.control); | ||
515 | if (!skb) | 444 | if (!skb) |
516 | return; | 445 | return; |
517 | 446 | ||
518 | rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, skb, | 447 | rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, skb, &control); |
519 | &entry->tx_status.control); | ||
520 | 448 | ||
521 | dev_kfree_skb(skb); | 449 | dev_kfree_skb(skb); |
522 | } | 450 | } |
@@ -530,58 +458,64 @@ void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev) | |||
530 | } | 458 | } |
531 | EXPORT_SYMBOL_GPL(rt2x00lib_beacondone); | 459 | EXPORT_SYMBOL_GPL(rt2x00lib_beacondone); |
532 | 460 | ||
533 | void rt2x00lib_txdone(struct data_entry *entry, | 461 | void rt2x00lib_txdone(struct queue_entry *entry, |
534 | const int status, const int retry) | 462 | struct txdone_entry_desc *txdesc) |
535 | { | 463 | { |
536 | struct rt2x00_dev *rt2x00dev = entry->ring->rt2x00dev; | 464 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
537 | struct ieee80211_tx_status *tx_status = &entry->tx_status; | 465 | struct ieee80211_tx_status tx_status; |
538 | struct ieee80211_low_level_stats *stats = &rt2x00dev->low_level_stats; | 466 | int success = !!(txdesc->status == TX_SUCCESS || |
539 | int success = !!(status == TX_SUCCESS || status == TX_SUCCESS_RETRY); | 467 | txdesc->status == TX_SUCCESS_RETRY); |
540 | int fail = !!(status == TX_FAIL_RETRY || status == TX_FAIL_INVALID || | 468 | int fail = !!(txdesc->status == TX_FAIL_RETRY || |
541 | status == TX_FAIL_OTHER); | 469 | txdesc->status == TX_FAIL_INVALID || |
470 | txdesc->status == TX_FAIL_OTHER); | ||
542 | 471 | ||
543 | /* | 472 | /* |
544 | * Update TX statistics. | 473 | * Update TX statistics. |
545 | */ | 474 | */ |
546 | tx_status->flags = 0; | ||
547 | tx_status->ack_signal = 0; | ||
548 | tx_status->excessive_retries = (status == TX_FAIL_RETRY); | ||
549 | tx_status->retry_count = retry; | ||
550 | rt2x00dev->link.qual.tx_success += success; | 475 | rt2x00dev->link.qual.tx_success += success; |
551 | rt2x00dev->link.qual.tx_failed += retry + fail; | 476 | rt2x00dev->link.qual.tx_failed += txdesc->retry + fail; |
552 | 477 | ||
553 | if (!(tx_status->control.flags & IEEE80211_TXCTL_NO_ACK)) { | 478 | /* |
479 | * Initialize TX status | ||
480 | */ | ||
481 | tx_status.flags = 0; | ||
482 | tx_status.ack_signal = 0; | ||
483 | tx_status.excessive_retries = (txdesc->status == TX_FAIL_RETRY); | ||
484 | tx_status.retry_count = txdesc->retry; | ||
485 | memcpy(&tx_status.control, txdesc->control, sizeof(txdesc->control)); | ||
486 | |||
487 | if (!(tx_status.control.flags & IEEE80211_TXCTL_NO_ACK)) { | ||
554 | if (success) | 488 | if (success) |
555 | tx_status->flags |= IEEE80211_TX_STATUS_ACK; | 489 | tx_status.flags |= IEEE80211_TX_STATUS_ACK; |
556 | else | 490 | else |
557 | stats->dot11ACKFailureCount++; | 491 | rt2x00dev->low_level_stats.dot11ACKFailureCount++; |
558 | } | 492 | } |
559 | 493 | ||
560 | tx_status->queue_length = entry->ring->stats.limit; | 494 | tx_status.queue_length = entry->queue->limit; |
561 | tx_status->queue_number = tx_status->control.queue; | 495 | tx_status.queue_number = tx_status.control.queue; |
562 | 496 | ||
563 | if (tx_status->control.flags & IEEE80211_TXCTL_USE_RTS_CTS) { | 497 | if (tx_status.control.flags & IEEE80211_TXCTL_USE_RTS_CTS) { |
564 | if (success) | 498 | if (success) |
565 | stats->dot11RTSSuccessCount++; | 499 | rt2x00dev->low_level_stats.dot11RTSSuccessCount++; |
566 | else | 500 | else |
567 | stats->dot11RTSFailureCount++; | 501 | rt2x00dev->low_level_stats.dot11RTSFailureCount++; |
568 | } | 502 | } |
569 | 503 | ||
570 | /* | 504 | /* |
571 | * Send the tx_status to mac80211 & debugfs. | 505 | * Send the tx_status to mac80211 & debugfs. |
572 | * mac80211 will clean up the skb structure. | 506 | * mac80211 will clean up the skb structure. |
573 | */ | 507 | */ |
574 | get_skb_desc(entry->skb)->frame_type = DUMP_FRAME_TXDONE; | 508 | get_skb_frame_desc(entry->skb)->frame_type = DUMP_FRAME_TXDONE; |
575 | rt2x00debug_dump_frame(rt2x00dev, entry->skb); | 509 | rt2x00debug_dump_frame(rt2x00dev, entry->skb); |
576 | ieee80211_tx_status_irqsafe(rt2x00dev->hw, entry->skb, tx_status); | 510 | ieee80211_tx_status_irqsafe(rt2x00dev->hw, entry->skb, &tx_status); |
577 | entry->skb = NULL; | 511 | entry->skb = NULL; |
578 | } | 512 | } |
579 | EXPORT_SYMBOL_GPL(rt2x00lib_txdone); | 513 | EXPORT_SYMBOL_GPL(rt2x00lib_txdone); |
580 | 514 | ||
581 | void rt2x00lib_rxdone(struct data_entry *entry, struct sk_buff *skb, | 515 | void rt2x00lib_rxdone(struct queue_entry *entry, |
582 | struct rxdata_entry_desc *desc) | 516 | struct rxdone_entry_desc *rxdesc) |
583 | { | 517 | { |
584 | struct rt2x00_dev *rt2x00dev = entry->ring->rt2x00dev; | 518 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
585 | struct ieee80211_rx_status *rx_status = &rt2x00dev->rx_status; | 519 | struct ieee80211_rx_status *rx_status = &rt2x00dev->rx_status; |
586 | struct ieee80211_hw_mode *mode; | 520 | struct ieee80211_hw_mode *mode; |
587 | struct ieee80211_rate *rate; | 521 | struct ieee80211_rate *rate; |
@@ -602,12 +536,12 @@ void rt2x00lib_rxdone(struct data_entry *entry, struct sk_buff *skb, | |||
602 | * the signal is the PLCP value. If it was received with | 536 | * the signal is the PLCP value. If it was received with |
603 | * a CCK bitrate the signal is the rate in 0.5kbit/s. | 537 | * a CCK bitrate the signal is the rate in 0.5kbit/s. |
604 | */ | 538 | */ |
605 | if (!desc->ofdm) | 539 | if (!rxdesc->ofdm) |
606 | val = DEVICE_GET_RATE_FIELD(rate->val, RATE); | 540 | val = DEVICE_GET_RATE_FIELD(rate->val, RATE); |
607 | else | 541 | else |
608 | val = DEVICE_GET_RATE_FIELD(rate->val, PLCP); | 542 | val = DEVICE_GET_RATE_FIELD(rate->val, PLCP); |
609 | 543 | ||
610 | if (val == desc->signal) { | 544 | if (val == rxdesc->signal) { |
611 | val = rate->val; | 545 | val = rate->val; |
612 | break; | 546 | break; |
613 | } | 547 | } |
@@ -616,26 +550,28 @@ void rt2x00lib_rxdone(struct data_entry *entry, struct sk_buff *skb, | |||
616 | /* | 550 | /* |
617 | * Only update link status if this is a beacon frame carrying our bssid. | 551 | * Only update link status if this is a beacon frame carrying our bssid. |
618 | */ | 552 | */ |
619 | hdr = (struct ieee80211_hdr*)skb->data; | 553 | hdr = (struct ieee80211_hdr*)entry->skb->data; |
620 | fc = le16_to_cpu(hdr->frame_control); | 554 | fc = le16_to_cpu(hdr->frame_control); |
621 | if (is_beacon(fc) && desc->my_bss) | 555 | if (is_beacon(fc) && rxdesc->my_bss) |
622 | rt2x00lib_update_link_stats(&rt2x00dev->link, desc->rssi); | 556 | rt2x00lib_update_link_stats(&rt2x00dev->link, rxdesc->rssi); |
623 | 557 | ||
624 | rt2x00dev->link.qual.rx_success++; | 558 | rt2x00dev->link.qual.rx_success++; |
625 | 559 | ||
626 | rx_status->rate = val; | 560 | rx_status->rate = val; |
627 | rx_status->signal = | 561 | rx_status->signal = |
628 | rt2x00lib_calculate_link_signal(rt2x00dev, desc->rssi); | 562 | rt2x00lib_calculate_link_signal(rt2x00dev, rxdesc->rssi); |
629 | rx_status->ssi = desc->rssi; | 563 | rx_status->ssi = rxdesc->rssi; |
630 | rx_status->flag = desc->flags; | 564 | rx_status->flag = rxdesc->flags; |
631 | rx_status->antenna = rt2x00dev->link.ant.active.rx; | 565 | rx_status->antenna = rt2x00dev->link.ant.active.rx; |
632 | 566 | ||
633 | /* | 567 | /* |
634 | * Send frame to mac80211 & debugfs | 568 | * Send frame to mac80211 & debugfs. |
569 | * mac80211 will clean up the skb structure. | ||
635 | */ | 570 | */ |
636 | get_skb_desc(skb)->frame_type = DUMP_FRAME_RXDONE; | 571 | get_skb_frame_desc(entry->skb)->frame_type = DUMP_FRAME_RXDONE; |
637 | rt2x00debug_dump_frame(rt2x00dev, skb); | 572 | rt2x00debug_dump_frame(rt2x00dev, entry->skb); |
638 | ieee80211_rx_irqsafe(rt2x00dev->hw, skb, rx_status); | 573 | ieee80211_rx_irqsafe(rt2x00dev->hw, entry->skb, rx_status); |
574 | entry->skb = NULL; | ||
639 | } | 575 | } |
640 | EXPORT_SYMBOL_GPL(rt2x00lib_rxdone); | 576 | EXPORT_SYMBOL_GPL(rt2x00lib_rxdone); |
641 | 577 | ||
@@ -646,9 +582,9 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
646 | struct sk_buff *skb, | 582 | struct sk_buff *skb, |
647 | struct ieee80211_tx_control *control) | 583 | struct ieee80211_tx_control *control) |
648 | { | 584 | { |
649 | struct txdata_entry_desc desc; | 585 | struct txentry_desc txdesc; |
650 | struct skb_desc *skbdesc = get_skb_desc(skb); | 586 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
651 | struct ieee80211_hdr *ieee80211hdr = skbdesc->data; | 587 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
652 | int tx_rate; | 588 | int tx_rate; |
653 | int bitrate; | 589 | int bitrate; |
654 | int length; | 590 | int length; |
@@ -657,22 +593,22 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
657 | u16 frame_control; | 593 | u16 frame_control; |
658 | u16 seq_ctrl; | 594 | u16 seq_ctrl; |
659 | 595 | ||
660 | memset(&desc, 0, sizeof(desc)); | 596 | memset(&txdesc, 0, sizeof(txdesc)); |
661 | 597 | ||
662 | desc.cw_min = skbdesc->ring->tx_params.cw_min; | 598 | txdesc.cw_min = skbdesc->entry->queue->cw_min; |
663 | desc.cw_max = skbdesc->ring->tx_params.cw_max; | 599 | txdesc.cw_max = skbdesc->entry->queue->cw_max; |
664 | desc.aifs = skbdesc->ring->tx_params.aifs; | 600 | txdesc.aifs = skbdesc->entry->queue->aifs; |
665 | 601 | ||
666 | /* | 602 | /* |
667 | * Identify queue | 603 | * Identify queue |
668 | */ | 604 | */ |
669 | if (control->queue < rt2x00dev->hw->queues) | 605 | if (control->queue < rt2x00dev->hw->queues) |
670 | desc.queue = control->queue; | 606 | txdesc.queue = control->queue; |
671 | else if (control->queue == IEEE80211_TX_QUEUE_BEACON || | 607 | else if (control->queue == IEEE80211_TX_QUEUE_BEACON || |
672 | control->queue == IEEE80211_TX_QUEUE_AFTER_BEACON) | 608 | control->queue == IEEE80211_TX_QUEUE_AFTER_BEACON) |
673 | desc.queue = QUEUE_MGMT; | 609 | txdesc.queue = QID_MGMT; |
674 | else | 610 | else |
675 | desc.queue = QUEUE_OTHER; | 611 | txdesc.queue = QID_OTHER; |
676 | 612 | ||
677 | /* | 613 | /* |
678 | * Read required fields from ieee80211 header. | 614 | * Read required fields from ieee80211 header. |
@@ -686,18 +622,18 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
686 | * Check whether this frame is to be acked | 622 | * Check whether this frame is to be acked |
687 | */ | 623 | */ |
688 | if (!(control->flags & IEEE80211_TXCTL_NO_ACK)) | 624 | if (!(control->flags & IEEE80211_TXCTL_NO_ACK)) |
689 | __set_bit(ENTRY_TXD_ACK, &desc.flags); | 625 | __set_bit(ENTRY_TXD_ACK, &txdesc.flags); |
690 | 626 | ||
691 | /* | 627 | /* |
692 | * Check if this is a RTS/CTS frame | 628 | * Check if this is a RTS/CTS frame |
693 | */ | 629 | */ |
694 | if (is_rts_frame(frame_control) || is_cts_frame(frame_control)) { | 630 | if (is_rts_frame(frame_control) || is_cts_frame(frame_control)) { |
695 | __set_bit(ENTRY_TXD_BURST, &desc.flags); | 631 | __set_bit(ENTRY_TXD_BURST, &txdesc.flags); |
696 | if (is_rts_frame(frame_control)) { | 632 | if (is_rts_frame(frame_control)) { |
697 | __set_bit(ENTRY_TXD_RTS_FRAME, &desc.flags); | 633 | __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc.flags); |
698 | __set_bit(ENTRY_TXD_ACK, &desc.flags); | 634 | __set_bit(ENTRY_TXD_ACK, &txdesc.flags); |
699 | } else | 635 | } else |
700 | __clear_bit(ENTRY_TXD_ACK, &desc.flags); | 636 | __clear_bit(ENTRY_TXD_ACK, &txdesc.flags); |
701 | if (control->rts_cts_rate) | 637 | if (control->rts_cts_rate) |
702 | tx_rate = control->rts_cts_rate; | 638 | tx_rate = control->rts_cts_rate; |
703 | } | 639 | } |
@@ -706,14 +642,14 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
706 | * Check for OFDM | 642 | * Check for OFDM |
707 | */ | 643 | */ |
708 | if (DEVICE_GET_RATE_FIELD(tx_rate, RATEMASK) & DEV_OFDM_RATEMASK) | 644 | if (DEVICE_GET_RATE_FIELD(tx_rate, RATEMASK) & DEV_OFDM_RATEMASK) |
709 | __set_bit(ENTRY_TXD_OFDM_RATE, &desc.flags); | 645 | __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc.flags); |
710 | 646 | ||
711 | /* | 647 | /* |
712 | * Check if more fragments are pending | 648 | * Check if more fragments are pending |
713 | */ | 649 | */ |
714 | if (ieee80211_get_morefrag(ieee80211hdr)) { | 650 | if (ieee80211_get_morefrag(ieee80211hdr)) { |
715 | __set_bit(ENTRY_TXD_BURST, &desc.flags); | 651 | __set_bit(ENTRY_TXD_BURST, &txdesc.flags); |
716 | __set_bit(ENTRY_TXD_MORE_FRAG, &desc.flags); | 652 | __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc.flags); |
717 | } | 653 | } |
718 | 654 | ||
719 | /* | 655 | /* |
@@ -722,7 +658,7 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
722 | */ | 658 | */ |
723 | if (control->queue == IEEE80211_TX_QUEUE_BEACON || | 659 | if (control->queue == IEEE80211_TX_QUEUE_BEACON || |
724 | is_probe_resp(frame_control)) | 660 | is_probe_resp(frame_control)) |
725 | __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc.flags); | 661 | __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc.flags); |
726 | 662 | ||
727 | /* | 663 | /* |
728 | * Determine with what IFS priority this frame should be send. | 664 | * Determine with what IFS priority this frame should be send. |
@@ -730,22 +666,22 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
730 | * or this fragment came after RTS/CTS. | 666 | * or this fragment came after RTS/CTS. |
731 | */ | 667 | */ |
732 | if ((seq_ctrl & IEEE80211_SCTL_FRAG) > 0 || | 668 | if ((seq_ctrl & IEEE80211_SCTL_FRAG) > 0 || |
733 | test_bit(ENTRY_TXD_RTS_FRAME, &desc.flags)) | 669 | test_bit(ENTRY_TXD_RTS_FRAME, &txdesc.flags)) |
734 | desc.ifs = IFS_SIFS; | 670 | txdesc.ifs = IFS_SIFS; |
735 | else | 671 | else |
736 | desc.ifs = IFS_BACKOFF; | 672 | txdesc.ifs = IFS_BACKOFF; |
737 | 673 | ||
738 | /* | 674 | /* |
739 | * PLCP setup | 675 | * PLCP setup |
740 | * Length calculation depends on OFDM/CCK rate. | 676 | * Length calculation depends on OFDM/CCK rate. |
741 | */ | 677 | */ |
742 | desc.signal = DEVICE_GET_RATE_FIELD(tx_rate, PLCP); | 678 | txdesc.signal = DEVICE_GET_RATE_FIELD(tx_rate, PLCP); |
743 | desc.service = 0x04; | 679 | txdesc.service = 0x04; |
744 | 680 | ||
745 | length = skbdesc->data_len + FCS_LEN; | 681 | length = skb->len + FCS_LEN; |
746 | if (test_bit(ENTRY_TXD_OFDM_RATE, &desc.flags)) { | 682 | if (test_bit(ENTRY_TXD_OFDM_RATE, &txdesc.flags)) { |
747 | desc.length_high = (length >> 6) & 0x3f; | 683 | txdesc.length_high = (length >> 6) & 0x3f; |
748 | desc.length_low = length & 0x3f; | 684 | txdesc.length_low = length & 0x3f; |
749 | } else { | 685 | } else { |
750 | bitrate = DEVICE_GET_RATE_FIELD(tx_rate, RATE); | 686 | bitrate = DEVICE_GET_RATE_FIELD(tx_rate, RATE); |
751 | 687 | ||
@@ -762,27 +698,26 @@ void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
762 | * Check if we need to set the Length Extension | 698 | * Check if we need to set the Length Extension |
763 | */ | 699 | */ |
764 | if (bitrate == 110 && residual <= 30) | 700 | if (bitrate == 110 && residual <= 30) |
765 | desc.service |= 0x80; | 701 | txdesc.service |= 0x80; |
766 | } | 702 | } |
767 | 703 | ||
768 | desc.length_high = (duration >> 8) & 0xff; | 704 | txdesc.length_high = (duration >> 8) & 0xff; |
769 | desc.length_low = duration & 0xff; | 705 | txdesc.length_low = duration & 0xff; |
770 | 706 | ||
771 | /* | 707 | /* |
772 | * When preamble is enabled we should set the | 708 | * When preamble is enabled we should set the |
773 | * preamble bit for the signal. | 709 | * preamble bit for the signal. |
774 | */ | 710 | */ |
775 | if (DEVICE_GET_RATE_FIELD(tx_rate, PREAMBLE)) | 711 | if (DEVICE_GET_RATE_FIELD(tx_rate, PREAMBLE)) |
776 | desc.signal |= 0x08; | 712 | txdesc.signal |= 0x08; |
777 | } | 713 | } |
778 | 714 | ||
779 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, skb, &desc, control); | 715 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, skb, &txdesc, control); |
780 | 716 | ||
781 | /* | 717 | /* |
782 | * Update ring entry. | 718 | * Update queue entry. |
783 | */ | 719 | */ |
784 | skbdesc->entry->skb = skb; | 720 | skbdesc->entry->skb = skb; |
785 | memcpy(&skbdesc->entry->tx_status.control, control, sizeof(*control)); | ||
786 | 721 | ||
787 | /* | 722 | /* |
788 | * The frame has been completely initialized and ready | 723 | * The frame has been completely initialized and ready |
@@ -1012,86 +947,6 @@ static int rt2x00lib_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1012 | /* | 947 | /* |
1013 | * Initialization/uninitialization handlers. | 948 | * Initialization/uninitialization handlers. |
1014 | */ | 949 | */ |
1015 | static int rt2x00lib_alloc_entries(struct data_ring *ring, | ||
1016 | const u16 max_entries, const u16 data_size, | ||
1017 | const u16 desc_size) | ||
1018 | { | ||
1019 | struct data_entry *entry; | ||
1020 | unsigned int i; | ||
1021 | |||
1022 | ring->stats.limit = max_entries; | ||
1023 | ring->data_size = data_size; | ||
1024 | ring->desc_size = desc_size; | ||
1025 | |||
1026 | /* | ||
1027 | * Allocate all ring entries. | ||
1028 | */ | ||
1029 | entry = kzalloc(ring->stats.limit * sizeof(*entry), GFP_KERNEL); | ||
1030 | if (!entry) | ||
1031 | return -ENOMEM; | ||
1032 | |||
1033 | for (i = 0; i < ring->stats.limit; i++) { | ||
1034 | entry[i].flags = 0; | ||
1035 | entry[i].ring = ring; | ||
1036 | entry[i].skb = NULL; | ||
1037 | entry[i].entry_idx = i; | ||
1038 | } | ||
1039 | |||
1040 | ring->entry = entry; | ||
1041 | |||
1042 | return 0; | ||
1043 | } | ||
1044 | |||
1045 | static int rt2x00lib_alloc_ring_entries(struct rt2x00_dev *rt2x00dev) | ||
1046 | { | ||
1047 | struct data_ring *ring; | ||
1048 | |||
1049 | /* | ||
1050 | * Allocate the RX ring. | ||
1051 | */ | ||
1052 | if (rt2x00lib_alloc_entries(rt2x00dev->rx, RX_ENTRIES, DATA_FRAME_SIZE, | ||
1053 | rt2x00dev->ops->rxd_size)) | ||
1054 | return -ENOMEM; | ||
1055 | |||
1056 | /* | ||
1057 | * First allocate the TX rings. | ||
1058 | */ | ||
1059 | txring_for_each(rt2x00dev, ring) { | ||
1060 | if (rt2x00lib_alloc_entries(ring, TX_ENTRIES, DATA_FRAME_SIZE, | ||
1061 | rt2x00dev->ops->txd_size)) | ||
1062 | return -ENOMEM; | ||
1063 | } | ||
1064 | |||
1065 | if (!test_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags)) | ||
1066 | return 0; | ||
1067 | |||
1068 | /* | ||
1069 | * Allocate the BEACON ring. | ||
1070 | */ | ||
1071 | if (rt2x00lib_alloc_entries(&rt2x00dev->bcn[0], BEACON_ENTRIES, | ||
1072 | MGMT_FRAME_SIZE, rt2x00dev->ops->txd_size)) | ||
1073 | return -ENOMEM; | ||
1074 | |||
1075 | /* | ||
1076 | * Allocate the Atim ring. | ||
1077 | */ | ||
1078 | if (rt2x00lib_alloc_entries(&rt2x00dev->bcn[1], ATIM_ENTRIES, | ||
1079 | DATA_FRAME_SIZE, rt2x00dev->ops->txd_size)) | ||
1080 | return -ENOMEM; | ||
1081 | |||
1082 | return 0; | ||
1083 | } | ||
1084 | |||
1085 | static void rt2x00lib_free_ring_entries(struct rt2x00_dev *rt2x00dev) | ||
1086 | { | ||
1087 | struct data_ring *ring; | ||
1088 | |||
1089 | ring_for_each(rt2x00dev, ring) { | ||
1090 | kfree(ring->entry); | ||
1091 | ring->entry = NULL; | ||
1092 | } | ||
1093 | } | ||
1094 | |||
1095 | static void rt2x00lib_uninitialize(struct rt2x00_dev *rt2x00dev) | 950 | static void rt2x00lib_uninitialize(struct rt2x00_dev *rt2x00dev) |
1096 | { | 951 | { |
1097 | if (!__test_and_clear_bit(DEVICE_INITIALIZED, &rt2x00dev->flags)) | 952 | if (!__test_and_clear_bit(DEVICE_INITIALIZED, &rt2x00dev->flags)) |
@@ -1108,9 +963,9 @@ static void rt2x00lib_uninitialize(struct rt2x00_dev *rt2x00dev) | |||
1108 | rt2x00dev->ops->lib->uninitialize(rt2x00dev); | 963 | rt2x00dev->ops->lib->uninitialize(rt2x00dev); |
1109 | 964 | ||
1110 | /* | 965 | /* |
1111 | * Free allocated ring entries. | 966 | * Free allocated queue entries. |
1112 | */ | 967 | */ |
1113 | rt2x00lib_free_ring_entries(rt2x00dev); | 968 | rt2x00queue_uninitialize(rt2x00dev); |
1114 | } | 969 | } |
1115 | 970 | ||
1116 | static int rt2x00lib_initialize(struct rt2x00_dev *rt2x00dev) | 971 | static int rt2x00lib_initialize(struct rt2x00_dev *rt2x00dev) |
@@ -1121,13 +976,11 @@ static int rt2x00lib_initialize(struct rt2x00_dev *rt2x00dev) | |||
1121 | return 0; | 976 | return 0; |
1122 | 977 | ||
1123 | /* | 978 | /* |
1124 | * Allocate all ring entries. | 979 | * Allocate all queue entries. |
1125 | */ | 980 | */ |
1126 | status = rt2x00lib_alloc_ring_entries(rt2x00dev); | 981 | status = rt2x00queue_initialize(rt2x00dev); |
1127 | if (status) { | 982 | if (status) |
1128 | ERROR(rt2x00dev, "Ring entries allocation failed.\n"); | ||
1129 | return status; | 983 | return status; |
1130 | } | ||
1131 | 984 | ||
1132 | /* | 985 | /* |
1133 | * Initialize the device. | 986 | * Initialize the device. |
@@ -1143,15 +996,12 @@ static int rt2x00lib_initialize(struct rt2x00_dev *rt2x00dev) | |||
1143 | */ | 996 | */ |
1144 | status = rt2x00rfkill_register(rt2x00dev); | 997 | status = rt2x00rfkill_register(rt2x00dev); |
1145 | if (status) | 998 | if (status) |
1146 | goto exit_unitialize; | 999 | goto exit; |
1147 | 1000 | ||
1148 | return 0; | 1001 | return 0; |
1149 | 1002 | ||
1150 | exit_unitialize: | ||
1151 | rt2x00lib_uninitialize(rt2x00dev); | ||
1152 | |||
1153 | exit: | 1003 | exit: |
1154 | rt2x00lib_free_ring_entries(rt2x00dev); | 1004 | rt2x00lib_uninitialize(rt2x00dev); |
1155 | 1005 | ||
1156 | return status; | 1006 | return status; |
1157 | } | 1007 | } |
@@ -1211,65 +1061,6 @@ void rt2x00lib_stop(struct rt2x00_dev *rt2x00dev) | |||
1211 | /* | 1061 | /* |
1212 | * driver allocation handlers. | 1062 | * driver allocation handlers. |
1213 | */ | 1063 | */ |
1214 | static int rt2x00lib_alloc_rings(struct rt2x00_dev *rt2x00dev) | ||
1215 | { | ||
1216 | struct data_ring *ring; | ||
1217 | unsigned int index; | ||
1218 | |||
1219 | /* | ||
1220 | * We need the following rings: | ||
1221 | * RX: 1 | ||
1222 | * TX: hw->queues | ||
1223 | * Beacon: 1 (if required) | ||
1224 | * Atim: 1 (if required) | ||
1225 | */ | ||
1226 | rt2x00dev->data_rings = 1 + rt2x00dev->hw->queues + | ||
1227 | (2 * test_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags)); | ||
1228 | |||
1229 | ring = kzalloc(rt2x00dev->data_rings * sizeof(*ring), GFP_KERNEL); | ||
1230 | if (!ring) { | ||
1231 | ERROR(rt2x00dev, "Ring allocation failed.\n"); | ||
1232 | return -ENOMEM; | ||
1233 | } | ||
1234 | |||
1235 | /* | ||
1236 | * Initialize pointers | ||
1237 | */ | ||
1238 | rt2x00dev->rx = ring; | ||
1239 | rt2x00dev->tx = &rt2x00dev->rx[1]; | ||
1240 | if (test_bit(DRIVER_REQUIRE_BEACON_RING, &rt2x00dev->flags)) | ||
1241 | rt2x00dev->bcn = &rt2x00dev->tx[rt2x00dev->hw->queues]; | ||
1242 | |||
1243 | /* | ||
1244 | * Initialize ring parameters. | ||
1245 | * RX: queue_idx = 0 | ||
1246 | * TX: queue_idx = IEEE80211_TX_QUEUE_DATA0 + index | ||
1247 | * TX: cw_min: 2^5 = 32. | ||
1248 | * TX: cw_max: 2^10 = 1024. | ||
1249 | */ | ||
1250 | rt2x00dev->rx->rt2x00dev = rt2x00dev; | ||
1251 | rt2x00dev->rx->queue_idx = 0; | ||
1252 | |||
1253 | index = IEEE80211_TX_QUEUE_DATA0; | ||
1254 | txring_for_each(rt2x00dev, ring) { | ||
1255 | ring->rt2x00dev = rt2x00dev; | ||
1256 | ring->queue_idx = index++; | ||
1257 | ring->tx_params.aifs = 2; | ||
1258 | ring->tx_params.cw_min = 5; | ||
1259 | ring->tx_params.cw_max = 10; | ||
1260 | } | ||
1261 | |||
1262 | return 0; | ||
1263 | } | ||
1264 | |||
1265 | static void rt2x00lib_free_rings(struct rt2x00_dev *rt2x00dev) | ||
1266 | { | ||
1267 | kfree(rt2x00dev->rx); | ||
1268 | rt2x00dev->rx = NULL; | ||
1269 | rt2x00dev->tx = NULL; | ||
1270 | rt2x00dev->bcn = NULL; | ||
1271 | } | ||
1272 | |||
1273 | int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | 1064 | int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) |
1274 | { | 1065 | { |
1275 | int retval = -ENOMEM; | 1066 | int retval = -ENOMEM; |
@@ -1297,9 +1088,9 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
1297 | rt2x00dev->interface.type = IEEE80211_IF_TYPE_INVALID; | 1088 | rt2x00dev->interface.type = IEEE80211_IF_TYPE_INVALID; |
1298 | 1089 | ||
1299 | /* | 1090 | /* |
1300 | * Allocate ring array. | 1091 | * Allocate queue array. |
1301 | */ | 1092 | */ |
1302 | retval = rt2x00lib_alloc_rings(rt2x00dev); | 1093 | retval = rt2x00queue_allocate(rt2x00dev); |
1303 | if (retval) | 1094 | if (retval) |
1304 | goto exit; | 1095 | goto exit; |
1305 | 1096 | ||
@@ -1370,9 +1161,9 @@ void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev) | |||
1370 | rt2x00lib_free_firmware(rt2x00dev); | 1161 | rt2x00lib_free_firmware(rt2x00dev); |
1371 | 1162 | ||
1372 | /* | 1163 | /* |
1373 | * Free ring structures. | 1164 | * Free queue structures. |
1374 | */ | 1165 | */ |
1375 | rt2x00lib_free_rings(rt2x00dev); | 1166 | rt2x00queue_free(rt2x00dev); |
1376 | } | 1167 | } |
1377 | EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev); | 1168 | EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev); |
1378 | 1169 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00dump.h b/drivers/net/wireless/rt2x00/rt2x00dump.h index 93f8967e5dc4..7169c222a486 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dump.h +++ b/drivers/net/wireless/rt2x00/rt2x00dump.h | |||
@@ -93,8 +93,8 @@ enum rt2x00_dump_type { | |||
93 | * @chip_rf: RF chipset | 93 | * @chip_rf: RF chipset |
94 | * @chip_rev: Chipset revision | 94 | * @chip_rev: Chipset revision |
95 | * @type: The frame type (&rt2x00_dump_type) | 95 | * @type: The frame type (&rt2x00_dump_type) |
96 | * @ring_index: The index number of the data ring. | 96 | * @queue_index: The index number of the data queue. |
97 | * @entry_index: The index number of the entry inside the data ring. | 97 | * @entry_index: The index number of the entry inside the data queue. |
98 | * @timestamp_sec: Timestamp - seconds | 98 | * @timestamp_sec: Timestamp - seconds |
99 | * @timestamp_usec: Timestamp - microseconds | 99 | * @timestamp_usec: Timestamp - microseconds |
100 | */ | 100 | */ |
@@ -111,7 +111,7 @@ struct rt2x00dump_hdr { | |||
111 | __le32 chip_rev; | 111 | __le32 chip_rev; |
112 | 112 | ||
113 | __le16 type; | 113 | __le16 type; |
114 | __u8 ring_index; | 114 | __u8 queue_index; |
115 | __u8 entry_index; | 115 | __u8 entry_index; |
116 | 116 | ||
117 | __le32 timestamp_sec; | 117 | __le32 timestamp_sec; |
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h index 7540d29c47a0..5c835f42a455 100644 --- a/drivers/net/wireless/rt2x00/rt2x00lib.h +++ b/drivers/net/wireless/rt2x00/rt2x00lib.h | |||
@@ -59,6 +59,16 @@ void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, | |||
59 | struct ieee80211_conf *conf, const int force_config); | 59 | struct ieee80211_conf *conf, const int force_config); |
60 | 60 | ||
61 | /* | 61 | /* |
62 | * Queue handlers. | ||
63 | */ | ||
64 | void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev); | ||
65 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev); | ||
66 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev); | ||
67 | void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev); | ||
68 | int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev); | ||
69 | void rt2x00queue_free(struct rt2x00_dev *rt2x00dev); | ||
70 | |||
71 | /* | ||
62 | * Firmware handlers. | 72 | * Firmware handlers. |
63 | */ | 73 | */ |
64 | #ifdef CONFIG_RT2X00_LIB_FIRMWARE | 74 | #ifdef CONFIG_RT2X00_LIB_FIRMWARE |
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c index e638c653e094..411ed5d08598 100644 --- a/drivers/net/wireless/rt2x00/rt2x00mac.c +++ b/drivers/net/wireless/rt2x00/rt2x00mac.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include "rt2x00lib.h" | 30 | #include "rt2x00lib.h" |
31 | 31 | ||
32 | static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | 32 | static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, |
33 | struct data_ring *ring, | 33 | struct data_queue *queue, |
34 | struct sk_buff *frag_skb, | 34 | struct sk_buff *frag_skb, |
35 | struct ieee80211_tx_control *control) | 35 | struct ieee80211_tx_control *control) |
36 | { | 36 | { |
@@ -60,7 +60,7 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | |||
60 | frag_skb->data, frag_skb->len, control, | 60 | frag_skb->data, frag_skb->len, control, |
61 | (struct ieee80211_rts *)(skb->data)); | 61 | (struct ieee80211_rts *)(skb->data)); |
62 | 62 | ||
63 | if (rt2x00dev->ops->lib->write_tx_data(rt2x00dev, ring, skb, control)) { | 63 | if (rt2x00dev->ops->lib->write_tx_data(rt2x00dev, queue, skb, control)) { |
64 | WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); | 64 | WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); |
65 | return NETDEV_TX_BUSY; | 65 | return NETDEV_TX_BUSY; |
66 | } | 66 | } |
@@ -73,7 +73,7 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
73 | { | 73 | { |
74 | struct rt2x00_dev *rt2x00dev = hw->priv; | 74 | struct rt2x00_dev *rt2x00dev = hw->priv; |
75 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; | 75 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
76 | struct data_ring *ring; | 76 | struct data_queue *queue; |
77 | u16 frame_control; | 77 | u16 frame_control; |
78 | 78 | ||
79 | /* | 79 | /* |
@@ -88,10 +88,10 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
88 | } | 88 | } |
89 | 89 | ||
90 | /* | 90 | /* |
91 | * Determine which ring to put packet on. | 91 | * Determine which queue to put packet on. |
92 | */ | 92 | */ |
93 | ring = rt2x00lib_get_ring(rt2x00dev, control->queue); | 93 | queue = rt2x00queue_get_queue(rt2x00dev, control->queue); |
94 | if (unlikely(!ring)) { | 94 | if (unlikely(!queue)) { |
95 | ERROR(rt2x00dev, | 95 | ERROR(rt2x00dev, |
96 | "Attempt to send packet over invalid queue %d.\n" | 96 | "Attempt to send packet over invalid queue %d.\n" |
97 | "Please file bug report to %s.\n", | 97 | "Please file bug report to %s.\n", |
@@ -110,23 +110,23 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
110 | if (!is_rts_frame(frame_control) && !is_cts_frame(frame_control) && | 110 | if (!is_rts_frame(frame_control) && !is_cts_frame(frame_control) && |
111 | (control->flags & (IEEE80211_TXCTL_USE_RTS_CTS | | 111 | (control->flags & (IEEE80211_TXCTL_USE_RTS_CTS | |
112 | IEEE80211_TXCTL_USE_CTS_PROTECT))) { | 112 | IEEE80211_TXCTL_USE_CTS_PROTECT))) { |
113 | if (rt2x00_ring_free(ring) <= 1) { | 113 | if (rt2x00queue_available(queue) <= 1) { |
114 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 114 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
115 | return NETDEV_TX_BUSY; | 115 | return NETDEV_TX_BUSY; |
116 | } | 116 | } |
117 | 117 | ||
118 | if (rt2x00mac_tx_rts_cts(rt2x00dev, ring, skb, control)) { | 118 | if (rt2x00mac_tx_rts_cts(rt2x00dev, queue, skb, control)) { |
119 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 119 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
120 | return NETDEV_TX_BUSY; | 120 | return NETDEV_TX_BUSY; |
121 | } | 121 | } |
122 | } | 122 | } |
123 | 123 | ||
124 | if (rt2x00dev->ops->lib->write_tx_data(rt2x00dev, ring, skb, control)) { | 124 | if (rt2x00dev->ops->lib->write_tx_data(rt2x00dev, queue, skb, control)) { |
125 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 125 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
126 | return NETDEV_TX_BUSY; | 126 | return NETDEV_TX_BUSY; |
127 | } | 127 | } |
128 | 128 | ||
129 | if (rt2x00_ring_full(ring)) | 129 | if (rt2x00queue_full(queue)) |
130 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 130 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); |
131 | 131 | ||
132 | if (rt2x00dev->ops->lib->kick_tx_queue) | 132 | if (rt2x00dev->ops->lib->kick_tx_queue) |
@@ -214,7 +214,7 @@ void rt2x00mac_remove_interface(struct ieee80211_hw *hw, | |||
214 | !is_interface_present(intf)) | 214 | !is_interface_present(intf)) |
215 | return; | 215 | return; |
216 | 216 | ||
217 | intf->id = 0; | 217 | intf->id = NULL; |
218 | intf->type = IEEE80211_IF_TYPE_INVALID; | 218 | intf->type = IEEE80211_IF_TYPE_INVALID; |
219 | memset(&intf->bssid, 0x00, ETH_ALEN); | 219 | memset(&intf->bssid, 0x00, ETH_ALEN); |
220 | memset(&intf->mac, 0x00, ETH_ALEN); | 220 | memset(&intf->mac, 0x00, ETH_ALEN); |
@@ -334,9 +334,11 @@ int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw, | |||
334 | struct rt2x00_dev *rt2x00dev = hw->priv; | 334 | struct rt2x00_dev *rt2x00dev = hw->priv; |
335 | unsigned int i; | 335 | unsigned int i; |
336 | 336 | ||
337 | for (i = 0; i < hw->queues; i++) | 337 | for (i = 0; i < hw->queues; i++) { |
338 | memcpy(&stats->data[i], &rt2x00dev->tx[i].stats, | 338 | stats->data[i].len = rt2x00dev->tx[i].length; |
339 | sizeof(rt2x00dev->tx[i].stats)); | 339 | stats->data[i].limit = rt2x00dev->tx[i].limit; |
340 | stats->data[i].count = rt2x00dev->tx[i].count; | ||
341 | } | ||
340 | 342 | ||
341 | return 0; | 343 | return 0; |
342 | } | 344 | } |
@@ -380,14 +382,14 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, | |||
380 | } | 382 | } |
381 | EXPORT_SYMBOL_GPL(rt2x00mac_bss_info_changed); | 383 | EXPORT_SYMBOL_GPL(rt2x00mac_bss_info_changed); |
382 | 384 | ||
383 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue, | 385 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue_idx, |
384 | const struct ieee80211_tx_queue_params *params) | 386 | const struct ieee80211_tx_queue_params *params) |
385 | { | 387 | { |
386 | struct rt2x00_dev *rt2x00dev = hw->priv; | 388 | struct rt2x00_dev *rt2x00dev = hw->priv; |
387 | struct data_ring *ring; | 389 | struct data_queue *queue; |
388 | 390 | ||
389 | ring = rt2x00lib_get_ring(rt2x00dev, queue); | 391 | queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); |
390 | if (unlikely(!ring)) | 392 | if (unlikely(!queue)) |
391 | return -EINVAL; | 393 | return -EINVAL; |
392 | 394 | ||
393 | /* | 395 | /* |
@@ -395,24 +397,23 @@ int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue, | |||
395 | * Ralink registers require to know the bit number 'n'. | 397 | * Ralink registers require to know the bit number 'n'. |
396 | */ | 398 | */ |
397 | if (params->cw_min) | 399 | if (params->cw_min) |
398 | ring->tx_params.cw_min = fls(params->cw_min); | 400 | queue->cw_min = fls(params->cw_min); |
399 | else | 401 | else |
400 | ring->tx_params.cw_min = 5; /* cw_min: 2^5 = 32. */ | 402 | queue->cw_min = 5; /* cw_min: 2^5 = 32. */ |
401 | 403 | ||
402 | if (params->cw_max) | 404 | if (params->cw_max) |
403 | ring->tx_params.cw_max = fls(params->cw_max); | 405 | queue->cw_max = fls(params->cw_max); |
404 | else | 406 | else |
405 | ring->tx_params.cw_max = 10; /* cw_min: 2^10 = 1024. */ | 407 | queue->cw_max = 10; /* cw_min: 2^10 = 1024. */ |
406 | 408 | ||
407 | if (params->aifs) | 409 | if (params->aifs) |
408 | ring->tx_params.aifs = params->aifs; | 410 | queue->aifs = params->aifs; |
409 | else | 411 | else |
410 | ring->tx_params.aifs = 2; | 412 | queue->aifs = 2; |
411 | 413 | ||
412 | INFO(rt2x00dev, | 414 | INFO(rt2x00dev, |
413 | "Configured TX ring %d - CWmin: %d, CWmax: %d, Aifs: %d.\n", | 415 | "Configured TX queue %d - CWmin: %d, CWmax: %d, Aifs: %d.\n", |
414 | queue, ring->tx_params.cw_min, ring->tx_params.cw_max, | 416 | queue_idx, queue->cw_min, queue->cw_max, queue->aifs); |
415 | ring->tx_params.aifs); | ||
416 | 417 | ||
417 | return 0; | 418 | return 0; |
418 | } | 419 | } |
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c index 0f2590bc31ec..63cfe33e95da 100644 --- a/drivers/net/wireless/rt2x00/rt2x00pci.c +++ b/drivers/net/wireless/rt2x00/rt2x00pci.c | |||
@@ -38,9 +38,10 @@ int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
38 | struct ieee80211_tx_control *control) | 38 | struct ieee80211_tx_control *control) |
39 | { | 39 | { |
40 | struct rt2x00_dev *rt2x00dev = hw->priv; | 40 | struct rt2x00_dev *rt2x00dev = hw->priv; |
41 | struct skb_desc *desc; | 41 | struct queue_entry_priv_pci_tx *priv_tx; |
42 | struct data_ring *ring; | 42 | struct skb_frame_desc *skbdesc; |
43 | struct data_entry *entry; | 43 | struct data_queue *queue; |
44 | struct queue_entry *entry; | ||
44 | 45 | ||
45 | /* | 46 | /* |
46 | * Just in case mac80211 doesn't set this correctly, | 47 | * Just in case mac80211 doesn't set this correctly, |
@@ -48,21 +49,22 @@ int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
48 | * initialization. | 49 | * initialization. |
49 | */ | 50 | */ |
50 | control->queue = IEEE80211_TX_QUEUE_BEACON; | 51 | control->queue = IEEE80211_TX_QUEUE_BEACON; |
51 | ring = rt2x00lib_get_ring(rt2x00dev, control->queue); | 52 | queue = rt2x00queue_get_queue(rt2x00dev, control->queue); |
52 | entry = rt2x00_get_data_entry(ring); | 53 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
54 | priv_tx = entry->priv_data; | ||
53 | 55 | ||
54 | /* | 56 | /* |
55 | * Fill in skb descriptor | 57 | * Fill in skb descriptor |
56 | */ | 58 | */ |
57 | desc = get_skb_desc(skb); | 59 | skbdesc = get_skb_frame_desc(skb); |
58 | desc->desc_len = ring->desc_size; | 60 | memset(skbdesc, 0, sizeof(*skbdesc)); |
59 | desc->data_len = skb->len; | 61 | skbdesc->data = skb->data; |
60 | desc->desc = entry->priv; | 62 | skbdesc->data_len = queue->data_size; |
61 | desc->data = skb->data; | 63 | skbdesc->desc = priv_tx->desc; |
62 | desc->ring = ring; | 64 | skbdesc->desc_len = queue->desc_size; |
63 | desc->entry = entry; | 65 | skbdesc->entry = entry; |
64 | 66 | ||
65 | memcpy(entry->data_addr, skb->data, skb->len); | 67 | memcpy(priv_tx->data, skb->data, skb->len); |
66 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | 68 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); |
67 | 69 | ||
68 | /* | 70 | /* |
@@ -78,18 +80,18 @@ EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update); | |||
78 | * TX data handlers. | 80 | * TX data handlers. |
79 | */ | 81 | */ |
80 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, | 82 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, |
81 | struct data_ring *ring, struct sk_buff *skb, | 83 | struct data_queue *queue, struct sk_buff *skb, |
82 | struct ieee80211_tx_control *control) | 84 | struct ieee80211_tx_control *control) |
83 | { | 85 | { |
84 | struct data_entry *entry = rt2x00_get_data_entry(ring); | 86 | struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); |
85 | __le32 *txd = entry->priv; | 87 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; |
86 | struct skb_desc *desc; | 88 | struct skb_frame_desc *skbdesc; |
87 | u32 word; | 89 | u32 word; |
88 | 90 | ||
89 | if (rt2x00_ring_full(ring)) | 91 | if (rt2x00queue_full(queue)) |
90 | return -EINVAL; | 92 | return -EINVAL; |
91 | 93 | ||
92 | rt2x00_desc_read(txd, 0, &word); | 94 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
93 | 95 | ||
94 | if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) || | 96 | if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) || |
95 | rt2x00_get_field32(word, TXD_ENTRY_VALID)) { | 97 | rt2x00_get_field32(word, TXD_ENTRY_VALID)) { |
@@ -103,18 +105,18 @@ int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, | |||
103 | /* | 105 | /* |
104 | * Fill in skb descriptor | 106 | * Fill in skb descriptor |
105 | */ | 107 | */ |
106 | desc = get_skb_desc(skb); | 108 | skbdesc = get_skb_frame_desc(skb); |
107 | desc->desc_len = ring->desc_size; | 109 | memset(skbdesc, 0, sizeof(*skbdesc)); |
108 | desc->data_len = skb->len; | 110 | skbdesc->data = skb->data; |
109 | desc->desc = entry->priv; | 111 | skbdesc->data_len = queue->data_size; |
110 | desc->data = skb->data; | 112 | skbdesc->desc = priv_tx->desc; |
111 | desc->ring = ring; | 113 | skbdesc->desc_len = queue->desc_size; |
112 | desc->entry = entry; | 114 | skbdesc->entry = entry; |
113 | 115 | ||
114 | memcpy(entry->data_addr, skb->data, skb->len); | 116 | memcpy(priv_tx->data, skb->data, skb->len); |
115 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | 117 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); |
116 | 118 | ||
117 | rt2x00_ring_index_inc(ring); | 119 | rt2x00queue_index_inc(queue, Q_INDEX); |
118 | 120 | ||
119 | return 0; | 121 | return 0; |
120 | } | 122 | } |
@@ -125,29 +127,28 @@ EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data); | |||
125 | */ | 127 | */ |
126 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) | 128 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) |
127 | { | 129 | { |
128 | struct data_ring *ring = rt2x00dev->rx; | 130 | struct data_queue *queue = rt2x00dev->rx; |
129 | struct data_entry *entry; | 131 | struct queue_entry *entry; |
130 | struct sk_buff *skb; | 132 | struct queue_entry_priv_pci_rx *priv_rx; |
131 | struct ieee80211_hdr *hdr; | 133 | struct ieee80211_hdr *hdr; |
132 | struct skb_desc *skbdesc; | 134 | struct skb_frame_desc *skbdesc; |
133 | struct rxdata_entry_desc desc; | 135 | struct rxdone_entry_desc rxdesc; |
134 | int header_size; | 136 | int header_size; |
135 | __le32 *rxd; | ||
136 | int align; | 137 | int align; |
137 | u32 word; | 138 | u32 word; |
138 | 139 | ||
139 | while (1) { | 140 | while (1) { |
140 | entry = rt2x00_get_data_entry(ring); | 141 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
141 | rxd = entry->priv; | 142 | priv_rx = entry->priv_data; |
142 | rt2x00_desc_read(rxd, 0, &word); | 143 | rt2x00_desc_read(priv_rx->desc, 0, &word); |
143 | 144 | ||
144 | if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC)) | 145 | if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC)) |
145 | break; | 146 | break; |
146 | 147 | ||
147 | memset(&desc, 0, sizeof(desc)); | 148 | memset(&rxdesc, 0, sizeof(rxdesc)); |
148 | rt2x00dev->ops->lib->fill_rxdone(entry, &desc); | 149 | rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); |
149 | 150 | ||
150 | hdr = (struct ieee80211_hdr *)entry->data_addr; | 151 | hdr = (struct ieee80211_hdr *)priv_rx->data; |
151 | header_size = | 152 | header_size = |
152 | ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control)); | 153 | ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control)); |
153 | 154 | ||
@@ -161,66 +162,68 @@ void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) | |||
161 | * Allocate the sk_buffer, initialize it and copy | 162 | * Allocate the sk_buffer, initialize it and copy |
162 | * all data into it. | 163 | * all data into it. |
163 | */ | 164 | */ |
164 | skb = dev_alloc_skb(desc.size + align); | 165 | entry->skb = dev_alloc_skb(rxdesc.size + align); |
165 | if (!skb) | 166 | if (!entry->skb) |
166 | return; | 167 | return; |
167 | 168 | ||
168 | skb_reserve(skb, align); | 169 | skb_reserve(entry->skb, align); |
169 | memcpy(skb_put(skb, desc.size), entry->data_addr, desc.size); | 170 | memcpy(skb_put(entry->skb, rxdesc.size), |
171 | priv_rx->data, rxdesc.size); | ||
170 | 172 | ||
171 | /* | 173 | /* |
172 | * Fill in skb descriptor | 174 | * Fill in skb descriptor |
173 | */ | 175 | */ |
174 | skbdesc = get_skb_desc(skb); | 176 | skbdesc = get_skb_frame_desc(entry->skb); |
175 | skbdesc->desc_len = entry->ring->desc_size; | 177 | memset(skbdesc, 0, sizeof(*skbdesc)); |
176 | skbdesc->data_len = skb->len; | 178 | skbdesc->data = entry->skb->data; |
177 | skbdesc->desc = entry->priv; | 179 | skbdesc->data_len = queue->data_size; |
178 | skbdesc->data = skb->data; | 180 | skbdesc->desc = priv_rx->desc; |
179 | skbdesc->ring = ring; | 181 | skbdesc->desc_len = queue->desc_size; |
180 | skbdesc->entry = entry; | 182 | skbdesc->entry = entry; |
181 | 183 | ||
182 | /* | 184 | /* |
183 | * Send the frame to rt2x00lib for further processing. | 185 | * Send the frame to rt2x00lib for further processing. |
184 | */ | 186 | */ |
185 | rt2x00lib_rxdone(entry, skb, &desc); | 187 | rt2x00lib_rxdone(entry, &rxdesc); |
186 | 188 | ||
187 | if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) { | 189 | if (test_bit(DEVICE_ENABLED_RADIO, &queue->rt2x00dev->flags)) { |
188 | rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1); | 190 | rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1); |
189 | rt2x00_desc_write(rxd, 0, word); | 191 | rt2x00_desc_write(priv_rx->desc, 0, word); |
190 | } | 192 | } |
191 | 193 | ||
192 | rt2x00_ring_index_inc(ring); | 194 | rt2x00queue_index_inc(queue, Q_INDEX); |
193 | } | 195 | } |
194 | } | 196 | } |
195 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); | 197 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); |
196 | 198 | ||
197 | void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct data_entry *entry, | 199 | void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry, |
198 | const int tx_status, const int retry) | 200 | struct txdone_entry_desc *txdesc) |
199 | { | 201 | { |
202 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; | ||
200 | u32 word; | 203 | u32 word; |
201 | 204 | ||
202 | rt2x00lib_txdone(entry, tx_status, retry); | 205 | txdesc->control = &priv_tx->control; |
206 | rt2x00lib_txdone(entry, txdesc); | ||
203 | 207 | ||
204 | /* | 208 | /* |
205 | * Make this entry available for reuse. | 209 | * Make this entry available for reuse. |
206 | */ | 210 | */ |
207 | entry->flags = 0; | 211 | entry->flags = 0; |
208 | 212 | ||
209 | rt2x00_desc_read(entry->priv, 0, &word); | 213 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
210 | rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0); | 214 | rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0); |
211 | rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0); | 215 | rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0); |
212 | rt2x00_desc_write(entry->priv, 0, word); | 216 | rt2x00_desc_write(priv_tx->desc, 0, word); |
213 | 217 | ||
214 | rt2x00_ring_index_done_inc(entry->ring); | 218 | rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE); |
215 | 219 | ||
216 | /* | 220 | /* |
217 | * If the data ring was full before the txdone handler | 221 | * If the data queue was full before the txdone handler |
218 | * we must make sure the packet queue in the mac80211 stack | 222 | * we must make sure the packet queue in the mac80211 stack |
219 | * is reenabled when the txdone handler has finished. | 223 | * is reenabled when the txdone handler has finished. |
220 | */ | 224 | */ |
221 | if (!rt2x00_ring_full(entry->ring)) | 225 | if (!rt2x00queue_full(entry->queue)) |
222 | ieee80211_wake_queue(rt2x00dev->hw, | 226 | ieee80211_wake_queue(rt2x00dev->hw, priv_tx->control.queue); |
223 | entry->tx_status.control.queue); | ||
224 | 227 | ||
225 | } | 228 | } |
226 | EXPORT_SYMBOL_GPL(rt2x00pci_txdone); | 229 | EXPORT_SYMBOL_GPL(rt2x00pci_txdone); |
@@ -228,73 +231,83 @@ EXPORT_SYMBOL_GPL(rt2x00pci_txdone); | |||
228 | /* | 231 | /* |
229 | * Device initialization handlers. | 232 | * Device initialization handlers. |
230 | */ | 233 | */ |
231 | #define priv_offset(__ring, __i) \ | 234 | #define dma_size(__queue) \ |
232 | ({ \ | 235 | ({ \ |
233 | ring->data_addr + (i * ring->desc_size); \ | 236 | (__queue)->limit * \ |
237 | ((__queue)->desc_size + (__queue)->data_size);\ | ||
234 | }) | 238 | }) |
235 | 239 | ||
236 | #define data_addr_offset(__ring, __i) \ | 240 | #define priv_offset(__queue, __base, __i) \ |
237 | ({ \ | 241 | ({ \ |
238 | (__ring)->data_addr + \ | 242 | (__base) + ((__i) * (__queue)->desc_size); \ |
239 | ((__ring)->stats.limit * (__ring)->desc_size) + \ | ||
240 | ((__i) * (__ring)->data_size); \ | ||
241 | }) | 243 | }) |
242 | 244 | ||
243 | #define data_dma_offset(__ring, __i) \ | 245 | #define data_addr_offset(__queue, __base, __i) \ |
244 | ({ \ | 246 | ({ \ |
245 | (__ring)->data_dma + \ | 247 | (__base) + \ |
246 | ((__ring)->stats.limit * (__ring)->desc_size) + \ | 248 | ((__queue)->limit * (__queue)->desc_size) + \ |
247 | ((__i) * (__ring)->data_size); \ | 249 | ((__i) * (__queue)->data_size); \ |
248 | }) | 250 | }) |
249 | 251 | ||
250 | static int rt2x00pci_alloc_dma(struct rt2x00_dev *rt2x00dev, | 252 | #define data_dma_offset(__queue, __base, __i) \ |
251 | struct data_ring *ring) | 253 | ({ \ |
254 | (__base) + \ | ||
255 | ((__queue)->limit * (__queue)->desc_size) + \ | ||
256 | ((__i) * (__queue)->data_size); \ | ||
257 | }) | ||
258 | |||
259 | static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev, | ||
260 | struct data_queue *queue) | ||
252 | { | 261 | { |
262 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); | ||
263 | struct queue_entry_priv_pci_tx *priv_tx; | ||
264 | void *data_addr; | ||
265 | dma_addr_t data_dma; | ||
253 | unsigned int i; | 266 | unsigned int i; |
254 | 267 | ||
255 | /* | 268 | /* |
256 | * Allocate DMA memory for descriptor and buffer. | 269 | * Allocate DMA memory for descriptor and buffer. |
257 | */ | 270 | */ |
258 | ring->data_addr = pci_alloc_consistent(rt2x00dev_pci(rt2x00dev), | 271 | data_addr = pci_alloc_consistent(pci_dev, dma_size(queue), &data_dma); |
259 | rt2x00_get_ring_size(ring), | 272 | if (!data_addr) |
260 | &ring->data_dma); | ||
261 | if (!ring->data_addr) | ||
262 | return -ENOMEM; | 273 | return -ENOMEM; |
263 | 274 | ||
264 | /* | 275 | /* |
265 | * Initialize all ring entries to contain valid | 276 | * Initialize all queue entries to contain valid addresses. |
266 | * addresses. | ||
267 | */ | 277 | */ |
268 | for (i = 0; i < ring->stats.limit; i++) { | 278 | for (i = 0; i < queue->limit; i++) { |
269 | ring->entry[i].priv = priv_offset(ring, i); | 279 | priv_tx = queue->entries[i].priv_data; |
270 | ring->entry[i].data_addr = data_addr_offset(ring, i); | 280 | priv_tx->desc = priv_offset(queue, data_addr, i); |
271 | ring->entry[i].data_dma = data_dma_offset(ring, i); | 281 | priv_tx->data = data_addr_offset(queue, data_addr, i); |
282 | priv_tx->dma = data_dma_offset(queue, data_dma, i); | ||
272 | } | 283 | } |
273 | 284 | ||
274 | return 0; | 285 | return 0; |
275 | } | 286 | } |
276 | 287 | ||
277 | static void rt2x00pci_free_dma(struct rt2x00_dev *rt2x00dev, | 288 | static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev, |
278 | struct data_ring *ring) | 289 | struct data_queue *queue) |
279 | { | 290 | { |
280 | if (ring->data_addr) | 291 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); |
281 | pci_free_consistent(rt2x00dev_pci(rt2x00dev), | 292 | struct queue_entry_priv_pci_tx *priv_tx = queue->entries[0].priv_data; |
282 | rt2x00_get_ring_size(ring), | 293 | |
283 | ring->data_addr, ring->data_dma); | 294 | if (priv_tx->data) |
284 | ring->data_addr = NULL; | 295 | pci_free_consistent(pci_dev, dma_size(queue), |
296 | priv_tx->data, priv_tx->dma); | ||
297 | priv_tx->data = NULL; | ||
285 | } | 298 | } |
286 | 299 | ||
287 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) | 300 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) |
288 | { | 301 | { |
289 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); | 302 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); |
290 | struct data_ring *ring; | 303 | struct data_queue *queue; |
291 | int status; | 304 | int status; |
292 | 305 | ||
293 | /* | 306 | /* |
294 | * Allocate DMA | 307 | * Allocate DMA |
295 | */ | 308 | */ |
296 | ring_for_each(rt2x00dev, ring) { | 309 | queue_for_each(rt2x00dev, queue) { |
297 | status = rt2x00pci_alloc_dma(rt2x00dev, ring); | 310 | status = rt2x00pci_alloc_queue_dma(rt2x00dev, queue); |
298 | if (status) | 311 | if (status) |
299 | goto exit; | 312 | goto exit; |
300 | } | 313 | } |
@@ -321,7 +334,7 @@ EXPORT_SYMBOL_GPL(rt2x00pci_initialize); | |||
321 | 334 | ||
322 | void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) | 335 | void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) |
323 | { | 336 | { |
324 | struct data_ring *ring; | 337 | struct data_queue *queue; |
325 | 338 | ||
326 | /* | 339 | /* |
327 | * Free irq line. | 340 | * Free irq line. |
@@ -331,8 +344,8 @@ void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) | |||
331 | /* | 344 | /* |
332 | * Free DMA | 345 | * Free DMA |
333 | */ | 346 | */ |
334 | ring_for_each(rt2x00dev, ring) | 347 | queue_for_each(rt2x00dev, queue) |
335 | rt2x00pci_free_dma(rt2x00dev, ring); | 348 | rt2x00pci_free_queue_dma(rt2x00dev, queue); |
336 | } | 349 | } |
337 | EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize); | 350 | EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize); |
338 | 351 | ||
@@ -530,5 +543,5 @@ EXPORT_SYMBOL_GPL(rt2x00pci_resume); | |||
530 | */ | 543 | */ |
531 | MODULE_AUTHOR(DRV_PROJECT); | 544 | MODULE_AUTHOR(DRV_PROJECT); |
532 | MODULE_VERSION(DRV_VERSION); | 545 | MODULE_VERSION(DRV_VERSION); |
533 | MODULE_DESCRIPTION("rt2x00 library"); | 546 | MODULE_DESCRIPTION("rt2x00 pci library"); |
534 | MODULE_LICENSE("GPL"); | 547 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h index 9ac560b87b2b..3b1597ffb4f2 100644 --- a/drivers/net/wireless/rt2x00/rt2x00pci.h +++ b/drivers/net/wireless/rt2x00/rt2x00pci.h | |||
@@ -97,15 +97,54 @@ int rt2x00pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
97 | * TX data handlers. | 97 | * TX data handlers. |
98 | */ | 98 | */ |
99 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, | 99 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, |
100 | struct data_ring *ring, struct sk_buff *skb, | 100 | struct data_queue *queue, struct sk_buff *skb, |
101 | struct ieee80211_tx_control *control); | 101 | struct ieee80211_tx_control *control); |
102 | 102 | ||
103 | /* | 103 | /** |
104 | * RX/TX data handlers. | 104 | * struct queue_entry_priv_pci_rx: Per RX entry PCI specific information |
105 | * | ||
106 | * @desc: Pointer to device descriptor. | ||
107 | * @data: Pointer to device's entry memory. | ||
108 | * @dma: DMA pointer to &data. | ||
109 | */ | ||
110 | struct queue_entry_priv_pci_rx { | ||
111 | __le32 *desc; | ||
112 | |||
113 | void *data; | ||
114 | dma_addr_t dma; | ||
115 | }; | ||
116 | |||
117 | /** | ||
118 | * struct queue_entry_priv_pci_tx: Per TX entry PCI specific information | ||
119 | * | ||
120 | * @desc: Pointer to device descriptor | ||
121 | * @data: Pointer to device's entry memory. | ||
122 | * @dma: DMA pointer to &data. | ||
123 | * @control: mac80211 control structure used to transmit data. | ||
124 | */ | ||
125 | struct queue_entry_priv_pci_tx { | ||
126 | __le32 *desc; | ||
127 | |||
128 | void *data; | ||
129 | dma_addr_t dma; | ||
130 | |||
131 | struct ieee80211_tx_control control; | ||
132 | }; | ||
133 | |||
134 | /** | ||
135 | * rt2x00pci_rxdone - Handle RX done events | ||
136 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. | ||
105 | */ | 137 | */ |
106 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev); | 138 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev); |
107 | void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct data_entry *entry, | 139 | |
108 | const int tx_status, const int retry); | 140 | /** |
141 | * rt2x00pci_txdone - Handle TX done events | ||
142 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. | ||
143 | * @entry: Entry which has completed the transmission of a frame. | ||
144 | * @desc: TX done descriptor | ||
145 | */ | ||
146 | void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry, | ||
147 | struct txdone_entry_desc *desc); | ||
109 | 148 | ||
110 | /* | 149 | /* |
111 | * Device initialization handlers. | 150 | * Device initialization handlers. |
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c new file mode 100644 index 000000000000..921eca35719d --- /dev/null +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c | |||
@@ -0,0 +1,291 @@ | |||
1 | /* | ||
2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project | ||
3 | <http://rt2x00.serialmonkey.com> | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify | ||
6 | it under the terms of the GNU General Public License as published by | ||
7 | the Free Software Foundation; either version 2 of the License, or | ||
8 | (at your option) any later version. | ||
9 | |||
10 | This program is distributed in the hope that it will be useful, | ||
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | GNU General Public License for more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License | ||
16 | along with this program; if not, write to the | ||
17 | Free Software Foundation, Inc., | ||
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | /* | ||
22 | Module: rt2x00lib | ||
23 | Abstract: rt2x00 queue specific routines. | ||
24 | */ | ||
25 | |||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/module.h> | ||
28 | |||
29 | #include "rt2x00.h" | ||
30 | #include "rt2x00lib.h" | ||
31 | |||
32 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, | ||
33 | const enum ieee80211_tx_queue queue) | ||
34 | { | ||
35 | int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | ||
36 | |||
37 | if (queue < rt2x00dev->hw->queues && rt2x00dev->tx) | ||
38 | return &rt2x00dev->tx[queue]; | ||
39 | |||
40 | if (!rt2x00dev->bcn) | ||
41 | return NULL; | ||
42 | |||
43 | if (queue == IEEE80211_TX_QUEUE_BEACON) | ||
44 | return &rt2x00dev->bcn[0]; | ||
45 | else if (queue == IEEE80211_TX_QUEUE_AFTER_BEACON && atim) | ||
46 | return &rt2x00dev->bcn[1]; | ||
47 | |||
48 | return NULL; | ||
49 | } | ||
50 | EXPORT_SYMBOL_GPL(rt2x00queue_get_queue); | ||
51 | |||
52 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | ||
53 | enum queue_index index) | ||
54 | { | ||
55 | struct queue_entry *entry; | ||
56 | |||
57 | if (unlikely(index >= Q_INDEX_MAX)) { | ||
58 | ERROR(queue->rt2x00dev, | ||
59 | "Entry requested from invalid index type (%d)\n", index); | ||
60 | return NULL; | ||
61 | } | ||
62 | |||
63 | spin_lock(&queue->lock); | ||
64 | |||
65 | entry = &queue->entries[queue->index[index]]; | ||
66 | |||
67 | spin_unlock(&queue->lock); | ||
68 | |||
69 | return entry; | ||
70 | } | ||
71 | EXPORT_SYMBOL_GPL(rt2x00queue_get_entry); | ||
72 | |||
73 | void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index) | ||
74 | { | ||
75 | if (unlikely(index >= Q_INDEX_MAX)) { | ||
76 | ERROR(queue->rt2x00dev, | ||
77 | "Index change on invalid index type (%d)\n", index); | ||
78 | return; | ||
79 | } | ||
80 | |||
81 | spin_lock(&queue->lock); | ||
82 | |||
83 | queue->index[index]++; | ||
84 | if (queue->index[index] >= queue->limit) | ||
85 | queue->index[index] = 0; | ||
86 | |||
87 | queue->length--; | ||
88 | queue->count += (index == Q_INDEX_DONE); | ||
89 | |||
90 | spin_unlock(&queue->lock); | ||
91 | } | ||
92 | EXPORT_SYMBOL_GPL(rt2x00queue_index_inc); | ||
93 | |||
94 | static void rt2x00queue_reset(struct data_queue *queue) | ||
95 | { | ||
96 | spin_lock(&queue->lock); | ||
97 | |||
98 | queue->count = 0; | ||
99 | queue->length = 0; | ||
100 | memset(queue->index, 0, sizeof(queue->index)); | ||
101 | |||
102 | spin_unlock(&queue->lock); | ||
103 | } | ||
104 | |||
105 | void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev) | ||
106 | { | ||
107 | struct data_queue *queue = rt2x00dev->rx; | ||
108 | unsigned int i; | ||
109 | |||
110 | rt2x00queue_reset(queue); | ||
111 | |||
112 | if (!rt2x00dev->ops->lib->init_rxentry) | ||
113 | return; | ||
114 | |||
115 | for (i = 0; i < queue->limit; i++) | ||
116 | rt2x00dev->ops->lib->init_rxentry(rt2x00dev, | ||
117 | &queue->entries[i]); | ||
118 | } | ||
119 | |||
120 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev) | ||
121 | { | ||
122 | struct data_queue *queue; | ||
123 | unsigned int i; | ||
124 | |||
125 | txall_queue_for_each(rt2x00dev, queue) { | ||
126 | rt2x00queue_reset(queue); | ||
127 | |||
128 | if (!rt2x00dev->ops->lib->init_txentry) | ||
129 | continue; | ||
130 | |||
131 | for (i = 0; i < queue->limit; i++) | ||
132 | rt2x00dev->ops->lib->init_txentry(rt2x00dev, | ||
133 | &queue->entries[i]); | ||
134 | } | ||
135 | } | ||
136 | |||
137 | static int rt2x00queue_alloc_entries(struct data_queue *queue, | ||
138 | const struct data_queue_desc *qdesc) | ||
139 | { | ||
140 | struct queue_entry *entries; | ||
141 | unsigned int entry_size; | ||
142 | unsigned int i; | ||
143 | |||
144 | rt2x00queue_reset(queue); | ||
145 | |||
146 | queue->limit = qdesc->entry_num; | ||
147 | queue->data_size = qdesc->data_size; | ||
148 | queue->desc_size = qdesc->desc_size; | ||
149 | |||
150 | /* | ||
151 | * Allocate all queue entries. | ||
152 | */ | ||
153 | entry_size = sizeof(*entries) + qdesc->priv_size; | ||
154 | entries = kzalloc(queue->limit * entry_size, GFP_KERNEL); | ||
155 | if (!entries) | ||
156 | return -ENOMEM; | ||
157 | |||
158 | #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \ | ||
159 | ( (__base) + ((__limit) * (__esize)) + ((__index) * (__psize)) ) | ||
160 | |||
161 | for (i = 0; i < queue->limit; i++) { | ||
162 | entries[i].flags = 0; | ||
163 | entries[i].queue = queue; | ||
164 | entries[i].skb = NULL; | ||
165 | entries[i].entry_idx = i; | ||
166 | entries[i].priv_data = | ||
167 | QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit, | ||
168 | sizeof(*entries), qdesc->priv_size); | ||
169 | } | ||
170 | |||
171 | #undef QUEUE_ENTRY_PRIV_OFFSET | ||
172 | |||
173 | queue->entries = entries; | ||
174 | |||
175 | return 0; | ||
176 | } | ||
177 | |||
178 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) | ||
179 | { | ||
180 | struct data_queue *queue; | ||
181 | int status; | ||
182 | |||
183 | |||
184 | status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx); | ||
185 | if (status) | ||
186 | goto exit; | ||
187 | |||
188 | tx_queue_for_each(rt2x00dev, queue) { | ||
189 | status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx); | ||
190 | if (status) | ||
191 | goto exit; | ||
192 | } | ||
193 | |||
194 | status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn); | ||
195 | if (status) | ||
196 | goto exit; | ||
197 | |||
198 | if (!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) | ||
199 | return 0; | ||
200 | |||
201 | status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1], | ||
202 | rt2x00dev->ops->atim); | ||
203 | if (status) | ||
204 | goto exit; | ||
205 | |||
206 | return 0; | ||
207 | |||
208 | exit: | ||
209 | ERROR(rt2x00dev, "Queue entries allocation failed.\n"); | ||
210 | |||
211 | rt2x00queue_uninitialize(rt2x00dev); | ||
212 | |||
213 | return status; | ||
214 | } | ||
215 | |||
216 | void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev) | ||
217 | { | ||
218 | struct data_queue *queue; | ||
219 | |||
220 | queue_for_each(rt2x00dev, queue) { | ||
221 | kfree(queue->entries); | ||
222 | queue->entries = NULL; | ||
223 | } | ||
224 | } | ||
225 | |||
226 | int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) | ||
227 | { | ||
228 | struct data_queue *queue; | ||
229 | enum data_queue_qid qid; | ||
230 | unsigned int req_atim = | ||
231 | !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | ||
232 | |||
233 | /* | ||
234 | * We need the following queues: | ||
235 | * RX: 1 | ||
236 | * TX: hw->queues | ||
237 | * Beacon: 1 | ||
238 | * Atim: 1 (if required) | ||
239 | */ | ||
240 | rt2x00dev->data_queues = 2 + rt2x00dev->hw->queues + req_atim; | ||
241 | |||
242 | queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL); | ||
243 | if (!queue) { | ||
244 | ERROR(rt2x00dev, "Queue allocation failed.\n"); | ||
245 | return -ENOMEM; | ||
246 | } | ||
247 | |||
248 | /* | ||
249 | * Initialize pointers | ||
250 | */ | ||
251 | rt2x00dev->rx = queue; | ||
252 | rt2x00dev->tx = &queue[1]; | ||
253 | rt2x00dev->bcn = &queue[1 + rt2x00dev->hw->queues]; | ||
254 | |||
255 | /* | ||
256 | * Initialize queue parameters. | ||
257 | * RX: qid = QID_RX | ||
258 | * TX: qid = QID_AC_BE + index | ||
259 | * TX: cw_min: 2^5 = 32. | ||
260 | * TX: cw_max: 2^10 = 1024. | ||
261 | * BCN & Atim: qid = QID_MGMT | ||
262 | */ | ||
263 | qid = QID_AC_BE; | ||
264 | queue_for_each(rt2x00dev, queue) { | ||
265 | spin_lock_init(&queue->lock); | ||
266 | |||
267 | queue->rt2x00dev = rt2x00dev; | ||
268 | queue->qid = qid++; | ||
269 | queue->aifs = 2; | ||
270 | queue->cw_min = 5; | ||
271 | queue->cw_max = 10; | ||
272 | } | ||
273 | |||
274 | /* | ||
275 | * Fix non-TX data qid's | ||
276 | */ | ||
277 | rt2x00dev->rx->qid = QID_RX; | ||
278 | rt2x00dev->bcn[0].qid = QID_MGMT; | ||
279 | if (req_atim) | ||
280 | rt2x00dev->bcn[1].qid = QID_MGMT; | ||
281 | |||
282 | return 0; | ||
283 | } | ||
284 | |||
285 | void rt2x00queue_free(struct rt2x00_dev *rt2x00dev) | ||
286 | { | ||
287 | kfree(rt2x00dev->rx); | ||
288 | rt2x00dev->rx = NULL; | ||
289 | rt2x00dev->tx = NULL; | ||
290 | rt2x00dev->bcn = NULL; | ||
291 | } | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h new file mode 100644 index 000000000000..507116c6c9fe --- /dev/null +++ b/drivers/net/wireless/rt2x00/rt2x00queue.h | |||
@@ -0,0 +1,435 @@ | |||
1 | /* | ||
2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project | ||
3 | <http://rt2x00.serialmonkey.com> | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify | ||
6 | it under the terms of the GNU General Public License as published by | ||
7 | the Free Software Foundation; either version 2 of the License, or | ||
8 | (at your option) any later version. | ||
9 | |||
10 | This program is distributed in the hope that it will be useful, | ||
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | GNU General Public License for more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License | ||
16 | along with this program; if not, write to the | ||
17 | Free Software Foundation, Inc., | ||
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | /* | ||
22 | Module: rt2x00 | ||
23 | Abstract: rt2x00 queue datastructures and routines | ||
24 | */ | ||
25 | |||
26 | #ifndef RT2X00QUEUE_H | ||
27 | #define RT2X00QUEUE_H | ||
28 | |||
29 | #include <linux/prefetch.h> | ||
30 | |||
31 | /** | ||
32 | * DOC: Entrie frame size | ||
33 | * | ||
34 | * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes, | ||
35 | * for USB devices this restriction does not apply, but the value of | ||
36 | * 2432 makes sense since it is big enough to contain the maximum fragment | ||
37 | * size according to the ieee802.11 specs. | ||
38 | */ | ||
39 | #define DATA_FRAME_SIZE 2432 | ||
40 | #define MGMT_FRAME_SIZE 256 | ||
41 | |||
42 | /** | ||
43 | * DOC: Number of entries per queue | ||
44 | * | ||
45 | * After research it was concluded that 12 entries in a RX and TX | ||
46 | * queue would be sufficient. Although this is almost one third of | ||
47 | * the amount the legacy driver allocated, the queues aren't getting | ||
48 | * filled to the maximum even when working with the maximum rate. | ||
49 | * | ||
50 | * FIXME: For virtual interfaces we need a different number | ||
51 | * of beacons, since more interfaces require more beacons. | ||
52 | */ | ||
53 | #define RX_ENTRIES 12 | ||
54 | #define TX_ENTRIES 12 | ||
55 | #define BEACON_ENTRIES 1 | ||
56 | #define ATIM_ENTRIES 1 | ||
57 | |||
58 | /** | ||
59 | * enum data_queue_qid: Queue identification | ||
60 | */ | ||
61 | enum data_queue_qid { | ||
62 | QID_AC_BE = 0, | ||
63 | QID_AC_BK = 1, | ||
64 | QID_AC_VI = 2, | ||
65 | QID_AC_VO = 3, | ||
66 | QID_HCCA = 4, | ||
67 | QID_MGMT = 13, | ||
68 | QID_RX = 14, | ||
69 | QID_OTHER = 15, | ||
70 | }; | ||
71 | |||
72 | /** | ||
73 | * struct skb_frame_desc: Descriptor information for the skb buffer | ||
74 | * | ||
75 | * This structure is placed over the skb->cb array, this means that | ||
76 | * this structure should not exceed the size of that array (48 bytes). | ||
77 | * | ||
78 | * @flags: Frame flags. | ||
79 | * @frame_type: Frame type, see &enum rt2x00_dump_type. | ||
80 | * @data: Pointer to data part of frame (Start of ieee80211 header). | ||
81 | * @desc: Pointer to descriptor part of the frame. | ||
82 | * Note that this pointer could point to something outside | ||
83 | * of the scope of the skb->data pointer. | ||
84 | * @data_len: Length of the frame data. | ||
85 | * @desc_len: Length of the frame descriptor. | ||
86 | |||
87 | * @entry: The entry to which this sk buffer belongs. | ||
88 | */ | ||
89 | struct skb_frame_desc { | ||
90 | unsigned int flags; | ||
91 | |||
92 | unsigned int frame_type; | ||
93 | |||
94 | void *data; | ||
95 | void *desc; | ||
96 | |||
97 | unsigned int data_len; | ||
98 | unsigned int desc_len; | ||
99 | |||
100 | struct queue_entry *entry; | ||
101 | }; | ||
102 | |||
103 | static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb) | ||
104 | { | ||
105 | BUILD_BUG_ON(sizeof(struct skb_frame_desc) > sizeof(skb->cb)); | ||
106 | return (struct skb_frame_desc *)&skb->cb[0]; | ||
107 | } | ||
108 | |||
109 | /** | ||
110 | * struct rxdone_entry_desc: RX Entry descriptor | ||
111 | * | ||
112 | * Summary of information that has been read from the RX frame descriptor. | ||
113 | * | ||
114 | * @signal: Signal of the received frame. | ||
115 | * @rssi: RSSI of the received frame. | ||
116 | * @ofdm: Was frame send with an OFDM rate. | ||
117 | * @size: Data size of the received frame. | ||
118 | * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags). | ||
119 | * @my_bss: Does this frame originate from device's BSS. | ||
120 | */ | ||
121 | struct rxdone_entry_desc { | ||
122 | int signal; | ||
123 | int rssi; | ||
124 | int ofdm; | ||
125 | int size; | ||
126 | int flags; | ||
127 | int my_bss; | ||
128 | }; | ||
129 | |||
130 | /** | ||
131 | * struct txdone_entry_desc: TX done entry descriptor | ||
132 | * | ||
133 | * Summary of information that has been read from the TX frame descriptor | ||
134 | * after the device is done with transmission. | ||
135 | * | ||
136 | * @control: Control structure which was used to transmit the frame. | ||
137 | * @status: TX status (See &enum tx_status). | ||
138 | * @retry: Retry count. | ||
139 | */ | ||
140 | struct txdone_entry_desc { | ||
141 | struct ieee80211_tx_control *control; | ||
142 | int status; | ||
143 | int retry; | ||
144 | }; | ||
145 | |||
146 | /** | ||
147 | * enum txentry_desc_flags: Status flags for TX entry descriptor | ||
148 | * | ||
149 | * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. | ||
150 | * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate. | ||
151 | * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. | ||
152 | * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. | ||
153 | * @ENTRY_TXD_BURST: This frame belongs to the same burst event. | ||
154 | * @ENTRY_TXD_ACK: An ACK is required for this frame. | ||
155 | */ | ||
156 | enum txentry_desc_flags { | ||
157 | ENTRY_TXD_RTS_FRAME, | ||
158 | ENTRY_TXD_OFDM_RATE, | ||
159 | ENTRY_TXD_MORE_FRAG, | ||
160 | ENTRY_TXD_REQ_TIMESTAMP, | ||
161 | ENTRY_TXD_BURST, | ||
162 | ENTRY_TXD_ACK, | ||
163 | }; | ||
164 | |||
165 | /** | ||
166 | * struct txentry_desc: TX Entry descriptor | ||
167 | * | ||
168 | * Summary of information for the frame descriptor before sending a TX frame. | ||
169 | * | ||
170 | * @flags: Descriptor flags (See &enum queue_entry_flags). | ||
171 | * @queue: Queue identification (See &enum data_queue_qid). | ||
172 | * @length_high: PLCP length high word. | ||
173 | * @length_low: PLCP length low word. | ||
174 | * @signal: PLCP signal. | ||
175 | * @service: PLCP service. | ||
176 | * @aifs: AIFS value. | ||
177 | * @ifs: IFS value. | ||
178 | * @cw_min: cwmin value. | ||
179 | * @cw_max: cwmax value. | ||
180 | */ | ||
181 | struct txentry_desc { | ||
182 | unsigned long flags; | ||
183 | |||
184 | enum data_queue_qid queue; | ||
185 | |||
186 | u16 length_high; | ||
187 | u16 length_low; | ||
188 | u16 signal; | ||
189 | u16 service; | ||
190 | |||
191 | int aifs; | ||
192 | int ifs; | ||
193 | int cw_min; | ||
194 | int cw_max; | ||
195 | }; | ||
196 | |||
197 | /** | ||
198 | * enum queue_entry_flags: Status flags for queue entry | ||
199 | * | ||
200 | * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface. | ||
201 | * As long as this bit is set, this entry may only be touched | ||
202 | * through the interface structure. | ||
203 | * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data | ||
204 | * transfer (either TX or RX depending on the queue). The entry should | ||
205 | * only be touched after the device has signaled it is done with it. | ||
206 | * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data | ||
207 | * encryption or decryption. The entry should only be touched after | ||
208 | * the device has signaled it is done with it. | ||
209 | */ | ||
210 | |||
211 | enum queue_entry_flags { | ||
212 | ENTRY_BCN_ASSIGNED, | ||
213 | ENTRY_OWNER_DEVICE_DATA, | ||
214 | ENTRY_OWNER_DEVICE_CRYPTO, | ||
215 | }; | ||
216 | |||
217 | /** | ||
218 | * struct queue_entry: Entry inside the &struct data_queue | ||
219 | * | ||
220 | * @flags: Entry flags, see &enum queue_entry_flags. | ||
221 | * @queue: The data queue (&struct data_queue) to which this entry belongs. | ||
222 | * @skb: The buffer which is currently being transmitted (for TX queue), | ||
223 | * or used to directly recieve data in (for RX queue). | ||
224 | * @entry_idx: The entry index number. | ||
225 | * @priv_data: Private data belonging to this queue entry. The pointer | ||
226 | * points to data specific to a particular driver and queue type. | ||
227 | */ | ||
228 | struct queue_entry { | ||
229 | unsigned long flags; | ||
230 | |||
231 | struct data_queue *queue; | ||
232 | |||
233 | struct sk_buff *skb; | ||
234 | |||
235 | unsigned int entry_idx; | ||
236 | |||
237 | void *priv_data; | ||
238 | }; | ||
239 | |||
240 | /** | ||
241 | * enum queue_index: Queue index type | ||
242 | * | ||
243 | * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is | ||
244 | * owned by the hardware then the queue is considered to be full. | ||
245 | * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by | ||
246 | * the hardware and for which we need to run the txdone handler. If this | ||
247 | * entry is not owned by the hardware the queue is considered to be empty. | ||
248 | * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription | ||
249 | * will be completed by the hardware next. | ||
250 | * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size | ||
251 | * of the index array. | ||
252 | */ | ||
253 | enum queue_index { | ||
254 | Q_INDEX, | ||
255 | Q_INDEX_DONE, | ||
256 | Q_INDEX_CRYPTO, | ||
257 | Q_INDEX_MAX, | ||
258 | }; | ||
259 | |||
260 | /** | ||
261 | * struct data_queue: Data queue | ||
262 | * | ||
263 | * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to. | ||
264 | * @entries: Base address of the &struct queue_entry which are | ||
265 | * part of this queue. | ||
266 | * @qid: The queue identification, see &enum data_queue_qid. | ||
267 | * @lock: Spinlock to protect index handling. Whenever @index, @index_done or | ||
268 | * @index_crypt needs to be changed this lock should be grabbed to prevent | ||
269 | * index corruption due to concurrency. | ||
270 | * @count: Number of frames handled in the queue. | ||
271 | * @limit: Maximum number of entries in the queue. | ||
272 | * @length: Number of frames in queue. | ||
273 | * @index: Index pointers to entry positions in the queue, | ||
274 | * use &enum queue_index to get a specific index field. | ||
275 | * @aifs: The aifs value for outgoing frames (field ignored in RX queue). | ||
276 | * @cw_min: The cw min value for outgoing frames (field ignored in RX queue). | ||
277 | * @cw_max: The cw max value for outgoing frames (field ignored in RX queue). | ||
278 | * @data_size: Maximum data size for the frames in this queue. | ||
279 | * @desc_size: Hardware descriptor size for the data in this queue. | ||
280 | */ | ||
281 | struct data_queue { | ||
282 | struct rt2x00_dev *rt2x00dev; | ||
283 | struct queue_entry *entries; | ||
284 | |||
285 | enum data_queue_qid qid; | ||
286 | |||
287 | spinlock_t lock; | ||
288 | unsigned int count; | ||
289 | unsigned short limit; | ||
290 | unsigned short length; | ||
291 | unsigned short index[Q_INDEX_MAX]; | ||
292 | |||
293 | unsigned short aifs; | ||
294 | unsigned short cw_min; | ||
295 | unsigned short cw_max; | ||
296 | |||
297 | unsigned short data_size; | ||
298 | unsigned short desc_size; | ||
299 | }; | ||
300 | |||
301 | /** | ||
302 | * struct data_queue_desc: Data queue description | ||
303 | * | ||
304 | * The information in this structure is used by drivers | ||
305 | * to inform rt2x00lib about the creation of the data queue. | ||
306 | * | ||
307 | * @entry_num: Maximum number of entries for a queue. | ||
308 | * @data_size: Maximum data size for the frames in this queue. | ||
309 | * @desc_size: Hardware descriptor size for the data in this queue. | ||
310 | * @priv_size: Size of per-queue_entry private data. | ||
311 | */ | ||
312 | struct data_queue_desc { | ||
313 | unsigned short entry_num; | ||
314 | unsigned short data_size; | ||
315 | unsigned short desc_size; | ||
316 | unsigned short priv_size; | ||
317 | }; | ||
318 | |||
319 | /** | ||
320 | * queue_end - Return pointer to the last queue (HELPER MACRO). | ||
321 | * @__dev: Pointer to &struct rt2x00_dev | ||
322 | * | ||
323 | * Using the base rx pointer and the maximum number of available queues, | ||
324 | * this macro will return the address of 1 position beyond the end of the | ||
325 | * queues array. | ||
326 | */ | ||
327 | #define queue_end(__dev) \ | ||
328 | &(__dev)->rx[(__dev)->data_queues] | ||
329 | |||
330 | /** | ||
331 | * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO). | ||
332 | * @__dev: Pointer to &struct rt2x00_dev | ||
333 | * | ||
334 | * Using the base tx pointer and the maximum number of available TX | ||
335 | * queues, this macro will return the address of 1 position beyond | ||
336 | * the end of the TX queue array. | ||
337 | */ | ||
338 | #define tx_queue_end(__dev) \ | ||
339 | &(__dev)->tx[(__dev)->hw->queues] | ||
340 | |||
341 | /** | ||
342 | * queue_loop - Loop through the queues within a specific range (HELPER MACRO). | ||
343 | * @__entry: Pointer where the current queue entry will be stored in. | ||
344 | * @__start: Start queue pointer. | ||
345 | * @__end: End queue pointer. | ||
346 | * | ||
347 | * This macro will loop through all queues between &__start and &__end. | ||
348 | */ | ||
349 | #define queue_loop(__entry, __start, __end) \ | ||
350 | for ((__entry) = (__start); \ | ||
351 | prefetch(&(__entry)[1]), (__entry) != (__end); \ | ||
352 | (__entry) = &(__entry)[1]) | ||
353 | |||
354 | /** | ||
355 | * queue_for_each - Loop through all queues | ||
356 | * @__dev: Pointer to &struct rt2x00_dev | ||
357 | * @__entry: Pointer where the current queue entry will be stored in. | ||
358 | * | ||
359 | * This macro will loop through all available queues. | ||
360 | */ | ||
361 | #define queue_for_each(__dev, __entry) \ | ||
362 | queue_loop(__entry, (__dev)->rx, queue_end(__dev)) | ||
363 | |||
364 | /** | ||
365 | * tx_queue_for_each - Loop through the TX queues | ||
366 | * @__dev: Pointer to &struct rt2x00_dev | ||
367 | * @__entry: Pointer where the current queue entry will be stored in. | ||
368 | * | ||
369 | * This macro will loop through all TX related queues excluding | ||
370 | * the Beacon and Atim queues. | ||
371 | */ | ||
372 | #define tx_queue_for_each(__dev, __entry) \ | ||
373 | queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev)) | ||
374 | |||
375 | /** | ||
376 | * txall_queue_for_each - Loop through all TX related queues | ||
377 | * @__dev: Pointer to &struct rt2x00_dev | ||
378 | * @__entry: Pointer where the current queue entry will be stored in. | ||
379 | * | ||
380 | * This macro will loop through all TX related queues including | ||
381 | * the Beacon and Atim queues. | ||
382 | */ | ||
383 | #define txall_queue_for_each(__dev, __entry) \ | ||
384 | queue_loop(__entry, (__dev)->tx, queue_end(__dev)) | ||
385 | |||
386 | /** | ||
387 | * rt2x00queue_empty - Check if the queue is empty. | ||
388 | * @queue: Queue to check if empty. | ||
389 | */ | ||
390 | static inline int rt2x00queue_empty(struct data_queue *queue) | ||
391 | { | ||
392 | return queue->length == 0; | ||
393 | } | ||
394 | |||
395 | /** | ||
396 | * rt2x00queue_full - Check if the queue is full. | ||
397 | * @queue: Queue to check if full. | ||
398 | */ | ||
399 | static inline int rt2x00queue_full(struct data_queue *queue) | ||
400 | { | ||
401 | return queue->length == queue->limit; | ||
402 | } | ||
403 | |||
404 | /** | ||
405 | * rt2x00queue_free - Check the number of available entries in queue. | ||
406 | * @queue: Queue to check. | ||
407 | */ | ||
408 | static inline int rt2x00queue_available(struct data_queue *queue) | ||
409 | { | ||
410 | return queue->limit - queue->length; | ||
411 | } | ||
412 | |||
413 | /** | ||
414 | * rt2x00_desc_read - Read a word from the hardware descriptor. | ||
415 | * @desc: Base descriptor address | ||
416 | * @word: Word index from where the descriptor should be read. | ||
417 | * @value: Address where the descriptor value should be written into. | ||
418 | */ | ||
419 | static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value) | ||
420 | { | ||
421 | *value = le32_to_cpu(desc[word]); | ||
422 | } | ||
423 | |||
424 | /** | ||
425 | * rt2x00_desc_write - wrote a word to the hardware descriptor. | ||
426 | * @desc: Base descriptor address | ||
427 | * @word: Word index from where the descriptor should be written. | ||
428 | * @value: Value that should be written into the descriptor. | ||
429 | */ | ||
430 | static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value) | ||
431 | { | ||
432 | desc[word] = cpu_to_le32(value); | ||
433 | } | ||
434 | |||
435 | #endif /* RT2X00QUEUE_H */ | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00reg.h b/drivers/net/wireless/rt2x00/rt2x00reg.h index e99eab19e9d7..e0ebe51c082f 100644 --- a/drivers/net/wireless/rt2x00/rt2x00reg.h +++ b/drivers/net/wireless/rt2x00/rt2x00reg.h | |||
@@ -29,7 +29,7 @@ | |||
29 | /* | 29 | /* |
30 | * TX result flags. | 30 | * TX result flags. |
31 | */ | 31 | */ |
32 | enum TX_STATUS { | 32 | enum tx_status { |
33 | TX_SUCCESS = 0, | 33 | TX_SUCCESS = 0, |
34 | TX_SUCCESS_RETRY = 1, | 34 | TX_SUCCESS_RETRY = 1, |
35 | TX_FAIL_RETRY = 2, | 35 | TX_FAIL_RETRY = 2, |
diff --git a/drivers/net/wireless/rt2x00/rt2x00ring.h b/drivers/net/wireless/rt2x00/rt2x00ring.h deleted file mode 100644 index 764c2553d06c..000000000000 --- a/drivers/net/wireless/rt2x00/rt2x00ring.h +++ /dev/null | |||
@@ -1,290 +0,0 @@ | |||
1 | /* | ||
2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project | ||
3 | <http://rt2x00.serialmonkey.com> | ||
4 | |||
5 | This program is free software; you can redistribute it and/or modify | ||
6 | it under the terms of the GNU General Public License as published by | ||
7 | the Free Software Foundation; either version 2 of the License, or | ||
8 | (at your option) any later version. | ||
9 | |||
10 | This program is distributed in the hope that it will be useful, | ||
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | GNU General Public License for more details. | ||
14 | |||
15 | You should have received a copy of the GNU General Public License | ||
16 | along with this program; if not, write to the | ||
17 | Free Software Foundation, Inc., | ||
18 | 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
19 | */ | ||
20 | |||
21 | /* | ||
22 | Module: rt2x00 | ||
23 | Abstract: rt2x00 ring datastructures and routines | ||
24 | */ | ||
25 | |||
26 | #ifndef RT2X00RING_H | ||
27 | #define RT2X00RING_H | ||
28 | |||
29 | /* | ||
30 | * skb_desc | ||
31 | * Descriptor information for the skb buffer | ||
32 | */ | ||
33 | struct skb_desc { | ||
34 | unsigned int frame_type; | ||
35 | |||
36 | unsigned int desc_len; | ||
37 | unsigned int data_len; | ||
38 | |||
39 | void *desc; | ||
40 | void *data; | ||
41 | |||
42 | struct data_ring *ring; | ||
43 | struct data_entry *entry; | ||
44 | }; | ||
45 | |||
46 | static inline struct skb_desc* get_skb_desc(struct sk_buff *skb) | ||
47 | { | ||
48 | return (struct skb_desc*)&skb->cb[0]; | ||
49 | } | ||
50 | |||
51 | /* | ||
52 | * rxdata_entry_desc | ||
53 | * Summary of information that has been read from the | ||
54 | * RX frame descriptor. | ||
55 | */ | ||
56 | struct rxdata_entry_desc { | ||
57 | int signal; | ||
58 | int rssi; | ||
59 | int ofdm; | ||
60 | int size; | ||
61 | int flags; | ||
62 | int my_bss; | ||
63 | }; | ||
64 | |||
65 | /* | ||
66 | * txdata_entry_desc | ||
67 | * Summary of information that should be written into the | ||
68 | * descriptor for sending a TX frame. | ||
69 | */ | ||
70 | struct txdata_entry_desc { | ||
71 | unsigned long flags; | ||
72 | #define ENTRY_TXDONE 1 | ||
73 | #define ENTRY_TXD_RTS_FRAME 2 | ||
74 | #define ENTRY_TXD_OFDM_RATE 3 | ||
75 | #define ENTRY_TXD_MORE_FRAG 4 | ||
76 | #define ENTRY_TXD_REQ_TIMESTAMP 5 | ||
77 | #define ENTRY_TXD_BURST 6 | ||
78 | #define ENTRY_TXD_ACK 7 | ||
79 | |||
80 | /* | ||
81 | * Queue ID. ID's 0-4 are data TX rings | ||
82 | */ | ||
83 | int queue; | ||
84 | #define QUEUE_MGMT 13 | ||
85 | #define QUEUE_RX 14 | ||
86 | #define QUEUE_OTHER 15 | ||
87 | |||
88 | /* | ||
89 | * PLCP values. | ||
90 | */ | ||
91 | u16 length_high; | ||
92 | u16 length_low; | ||
93 | u16 signal; | ||
94 | u16 service; | ||
95 | |||
96 | /* | ||
97 | * Timing information | ||
98 | */ | ||
99 | int aifs; | ||
100 | int ifs; | ||
101 | int cw_min; | ||
102 | int cw_max; | ||
103 | }; | ||
104 | |||
105 | /* | ||
106 | * data_entry | ||
107 | * The data ring is a list of data entries. | ||
108 | * Each entry holds a reference to the descriptor | ||
109 | * and the data buffer. For TX rings the reference to the | ||
110 | * sk_buff of the packet being transmitted is also stored here. | ||
111 | */ | ||
112 | struct data_entry { | ||
113 | /* | ||
114 | * Status flags | ||
115 | */ | ||
116 | unsigned long flags; | ||
117 | #define ENTRY_OWNER_NIC 1 | ||
118 | |||
119 | /* | ||
120 | * Ring we belong to. | ||
121 | */ | ||
122 | struct data_ring *ring; | ||
123 | |||
124 | /* | ||
125 | * sk_buff for the packet which is being transmitted | ||
126 | * in this entry (Only used with TX related rings). | ||
127 | */ | ||
128 | struct sk_buff *skb; | ||
129 | |||
130 | /* | ||
131 | * Store a ieee80211_tx_status structure in each | ||
132 | * ring entry, this will optimize the txdone | ||
133 | * handler. | ||
134 | */ | ||
135 | struct ieee80211_tx_status tx_status; | ||
136 | |||
137 | /* | ||
138 | * private pointer specific to driver. | ||
139 | */ | ||
140 | void *priv; | ||
141 | |||
142 | /* | ||
143 | * Data address for this entry. | ||
144 | */ | ||
145 | void *data_addr; | ||
146 | dma_addr_t data_dma; | ||
147 | |||
148 | /* | ||
149 | * Entry identification number (index). | ||
150 | */ | ||
151 | unsigned int entry_idx; | ||
152 | }; | ||
153 | |||
154 | /* | ||
155 | * data_ring | ||
156 | * Data rings are used by the device to send and receive packets. | ||
157 | * The data_addr is the base address of the data memory. | ||
158 | * To determine at which point in the ring we are, | ||
159 | * have to use the rt2x00_ring_index_*() functions. | ||
160 | */ | ||
161 | struct data_ring { | ||
162 | /* | ||
163 | * Pointer to main rt2x00dev structure where this | ||
164 | * ring belongs to. | ||
165 | */ | ||
166 | struct rt2x00_dev *rt2x00dev; | ||
167 | |||
168 | /* | ||
169 | * Base address for the device specific data entries. | ||
170 | */ | ||
171 | struct data_entry *entry; | ||
172 | |||
173 | /* | ||
174 | * TX queue statistic info. | ||
175 | */ | ||
176 | struct ieee80211_tx_queue_stats_data stats; | ||
177 | |||
178 | /* | ||
179 | * TX Queue parameters. | ||
180 | */ | ||
181 | struct ieee80211_tx_queue_params tx_params; | ||
182 | |||
183 | /* | ||
184 | * Base address for data ring. | ||
185 | */ | ||
186 | dma_addr_t data_dma; | ||
187 | void *data_addr; | ||
188 | |||
189 | /* | ||
190 | * Queue identification number: | ||
191 | * RX: 0 | ||
192 | * TX: IEEE80211_TX_* | ||
193 | */ | ||
194 | unsigned int queue_idx; | ||
195 | |||
196 | /* | ||
197 | * Index variables. | ||
198 | */ | ||
199 | u16 index; | ||
200 | u16 index_done; | ||
201 | |||
202 | /* | ||
203 | * Size of packet and descriptor in bytes. | ||
204 | */ | ||
205 | u16 data_size; | ||
206 | u16 desc_size; | ||
207 | }; | ||
208 | |||
209 | /* | ||
210 | * Handlers to determine the address of the current device specific | ||
211 | * data entry, where either index or index_done points to. | ||
212 | */ | ||
213 | static inline struct data_entry *rt2x00_get_data_entry(struct data_ring *ring) | ||
214 | { | ||
215 | return &ring->entry[ring->index]; | ||
216 | } | ||
217 | |||
218 | static inline struct data_entry *rt2x00_get_data_entry_done(struct data_ring | ||
219 | *ring) | ||
220 | { | ||
221 | return &ring->entry[ring->index_done]; | ||
222 | } | ||
223 | |||
224 | /* | ||
225 | * Total ring memory | ||
226 | */ | ||
227 | static inline int rt2x00_get_ring_size(struct data_ring *ring) | ||
228 | { | ||
229 | return ring->stats.limit * (ring->desc_size + ring->data_size); | ||
230 | } | ||
231 | |||
232 | /* | ||
233 | * Ring index manipulation functions. | ||
234 | */ | ||
235 | static inline void rt2x00_ring_index_inc(struct data_ring *ring) | ||
236 | { | ||
237 | ring->index++; | ||
238 | if (ring->index >= ring->stats.limit) | ||
239 | ring->index = 0; | ||
240 | ring->stats.len++; | ||
241 | } | ||
242 | |||
243 | static inline void rt2x00_ring_index_done_inc(struct data_ring *ring) | ||
244 | { | ||
245 | ring->index_done++; | ||
246 | if (ring->index_done >= ring->stats.limit) | ||
247 | ring->index_done = 0; | ||
248 | ring->stats.len--; | ||
249 | ring->stats.count++; | ||
250 | } | ||
251 | |||
252 | static inline void rt2x00_ring_index_clear(struct data_ring *ring) | ||
253 | { | ||
254 | ring->index = 0; | ||
255 | ring->index_done = 0; | ||
256 | ring->stats.len = 0; | ||
257 | ring->stats.count = 0; | ||
258 | } | ||
259 | |||
260 | static inline int rt2x00_ring_empty(struct data_ring *ring) | ||
261 | { | ||
262 | return ring->stats.len == 0; | ||
263 | } | ||
264 | |||
265 | static inline int rt2x00_ring_full(struct data_ring *ring) | ||
266 | { | ||
267 | return ring->stats.len == ring->stats.limit; | ||
268 | } | ||
269 | |||
270 | static inline int rt2x00_ring_free(struct data_ring *ring) | ||
271 | { | ||
272 | return ring->stats.limit - ring->stats.len; | ||
273 | } | ||
274 | |||
275 | /* | ||
276 | * TX/RX Descriptor access functions. | ||
277 | */ | ||
278 | static inline void rt2x00_desc_read(__le32 *desc, | ||
279 | const u8 word, u32 *value) | ||
280 | { | ||
281 | *value = le32_to_cpu(desc[word]); | ||
282 | } | ||
283 | |||
284 | static inline void rt2x00_desc_write(__le32 *desc, | ||
285 | const u8 word, const u32 value) | ||
286 | { | ||
287 | desc[word] = cpu_to_le32(value); | ||
288 | } | ||
289 | |||
290 | #endif /* RT2X00RING_H */ | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index 47cd0a5bf17c..fc606448908e 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -40,8 +40,7 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev, | |||
40 | void *buffer, const u16 buffer_length, | 40 | void *buffer, const u16 buffer_length, |
41 | const int timeout) | 41 | const int timeout) |
42 | { | 42 | { |
43 | struct usb_device *usb_dev = | 43 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); |
44 | interface_to_usbdev(rt2x00dev_usb(rt2x00dev)); | ||
45 | int status; | 44 | int status; |
46 | unsigned int i; | 45 | unsigned int i; |
47 | unsigned int pipe = | 46 | unsigned int pipe = |
@@ -128,15 +127,15 @@ EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_buff); | |||
128 | */ | 127 | */ |
129 | static void rt2x00usb_interrupt_txdone(struct urb *urb) | 128 | static void rt2x00usb_interrupt_txdone(struct urb *urb) |
130 | { | 129 | { |
131 | struct data_entry *entry = (struct data_entry *)urb->context; | 130 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
132 | struct data_ring *ring = entry->ring; | 131 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
133 | struct rt2x00_dev *rt2x00dev = ring->rt2x00dev; | 132 | struct queue_entry_priv_usb_tx *priv_tx = entry->priv_data; |
133 | struct txdone_entry_desc txdesc; | ||
134 | __le32 *txd = (__le32 *)entry->skb->data; | 134 | __le32 *txd = (__le32 *)entry->skb->data; |
135 | u32 word; | 135 | u32 word; |
136 | int tx_status; | ||
137 | 136 | ||
138 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || | 137 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || |
139 | !__test_and_clear_bit(ENTRY_OWNER_NIC, &entry->flags)) | 138 | !__test_and_clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) |
140 | return; | 139 | return; |
141 | 140 | ||
142 | rt2x00_desc_read(txd, 0, &word); | 141 | rt2x00_desc_read(txd, 0, &word); |
@@ -144,45 +143,46 @@ static void rt2x00usb_interrupt_txdone(struct urb *urb) | |||
144 | /* | 143 | /* |
145 | * Remove the descriptor data from the buffer. | 144 | * Remove the descriptor data from the buffer. |
146 | */ | 145 | */ |
147 | skb_pull(entry->skb, ring->desc_size); | 146 | skb_pull(entry->skb, entry->queue->desc_size); |
148 | 147 | ||
149 | /* | 148 | /* |
150 | * Obtain the status about this packet. | 149 | * Obtain the status about this packet. |
151 | */ | 150 | */ |
152 | tx_status = !urb->status ? TX_SUCCESS : TX_FAIL_RETRY; | 151 | txdesc.status = !urb->status ? TX_SUCCESS : TX_FAIL_RETRY; |
152 | txdesc.retry = 0; | ||
153 | txdesc.control = &priv_tx->control; | ||
153 | 154 | ||
154 | rt2x00lib_txdone(entry, tx_status, 0); | 155 | rt2x00lib_txdone(entry, &txdesc); |
155 | 156 | ||
156 | /* | 157 | /* |
157 | * Make this entry available for reuse. | 158 | * Make this entry available for reuse. |
158 | */ | 159 | */ |
159 | entry->flags = 0; | 160 | entry->flags = 0; |
160 | rt2x00_ring_index_done_inc(entry->ring); | 161 | rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE); |
161 | 162 | ||
162 | /* | 163 | /* |
163 | * If the data ring was full before the txdone handler | 164 | * If the data queue was full before the txdone handler |
164 | * we must make sure the packet queue in the mac80211 stack | 165 | * we must make sure the packet queue in the mac80211 stack |
165 | * is reenabled when the txdone handler has finished. | 166 | * is reenabled when the txdone handler has finished. |
166 | */ | 167 | */ |
167 | if (!rt2x00_ring_full(ring)) | 168 | if (!rt2x00queue_full(entry->queue)) |
168 | ieee80211_wake_queue(rt2x00dev->hw, | 169 | ieee80211_wake_queue(rt2x00dev->hw, priv_tx->control.queue); |
169 | entry->tx_status.control.queue); | ||
170 | } | 170 | } |
171 | 171 | ||
172 | int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, | 172 | int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, |
173 | struct data_ring *ring, struct sk_buff *skb, | 173 | struct data_queue *queue, struct sk_buff *skb, |
174 | struct ieee80211_tx_control *control) | 174 | struct ieee80211_tx_control *control) |
175 | { | 175 | { |
176 | struct usb_device *usb_dev = | 176 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); |
177 | interface_to_usbdev(rt2x00dev_usb(rt2x00dev)); | 177 | struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); |
178 | struct data_entry *entry = rt2x00_get_data_entry(ring); | 178 | struct queue_entry_priv_usb_tx *priv_tx = entry->priv_data; |
179 | struct skb_desc *desc; | 179 | struct skb_frame_desc *skbdesc; |
180 | u32 length; | 180 | u32 length; |
181 | 181 | ||
182 | if (rt2x00_ring_full(ring)) | 182 | if (rt2x00queue_full(queue)) |
183 | return -EINVAL; | 183 | return -EINVAL; |
184 | 184 | ||
185 | if (test_bit(ENTRY_OWNER_NIC, &entry->flags)) { | 185 | if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) { |
186 | ERROR(rt2x00dev, | 186 | ERROR(rt2x00dev, |
187 | "Arrived at non-free entry in the non-full queue %d.\n" | 187 | "Arrived at non-free entry in the non-full queue %d.\n" |
188 | "Please file bug report to %s.\n", | 188 | "Please file bug report to %s.\n", |
@@ -193,19 +193,19 @@ int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, | |||
193 | /* | 193 | /* |
194 | * Add the descriptor in front of the skb. | 194 | * Add the descriptor in front of the skb. |
195 | */ | 195 | */ |
196 | skb_push(skb, ring->desc_size); | 196 | skb_push(skb, queue->desc_size); |
197 | memset(skb->data, 0, ring->desc_size); | 197 | memset(skb->data, 0, queue->desc_size); |
198 | 198 | ||
199 | /* | 199 | /* |
200 | * Fill in skb descriptor | 200 | * Fill in skb descriptor |
201 | */ | 201 | */ |
202 | desc = get_skb_desc(skb); | 202 | skbdesc = get_skb_frame_desc(skb); |
203 | desc->desc_len = ring->desc_size; | 203 | memset(skbdesc, 0, sizeof(*skbdesc)); |
204 | desc->data_len = skb->len - ring->desc_size; | 204 | skbdesc->data = skb->data + queue->desc_size; |
205 | desc->desc = skb->data; | 205 | skbdesc->data_len = queue->data_size; |
206 | desc->data = skb->data + ring->desc_size; | 206 | skbdesc->desc = skb->data; |
207 | desc->ring = ring; | 207 | skbdesc->desc_len = queue->desc_size; |
208 | desc->entry = entry; | 208 | skbdesc->entry = entry; |
209 | 209 | ||
210 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | 210 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); |
211 | 211 | ||
@@ -219,12 +219,12 @@ int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, | |||
219 | /* | 219 | /* |
220 | * Initialize URB and send the frame to the device. | 220 | * Initialize URB and send the frame to the device. |
221 | */ | 221 | */ |
222 | __set_bit(ENTRY_OWNER_NIC, &entry->flags); | 222 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); |
223 | usb_fill_bulk_urb(entry->priv, usb_dev, usb_sndbulkpipe(usb_dev, 1), | 223 | usb_fill_bulk_urb(priv_tx->urb, usb_dev, usb_sndbulkpipe(usb_dev, 1), |
224 | skb->data, length, rt2x00usb_interrupt_txdone, entry); | 224 | skb->data, length, rt2x00usb_interrupt_txdone, entry); |
225 | usb_submit_urb(entry->priv, GFP_ATOMIC); | 225 | usb_submit_urb(priv_tx->urb, GFP_ATOMIC); |
226 | 226 | ||
227 | rt2x00_ring_index_inc(ring); | 227 | rt2x00queue_index_inc(queue, Q_INDEX); |
228 | 228 | ||
229 | return 0; | 229 | return 0; |
230 | } | 230 | } |
@@ -233,20 +233,41 @@ EXPORT_SYMBOL_GPL(rt2x00usb_write_tx_data); | |||
233 | /* | 233 | /* |
234 | * RX data handlers. | 234 | * RX data handlers. |
235 | */ | 235 | */ |
236 | static struct sk_buff* rt2x00usb_alloc_rxskb(struct data_queue *queue) | ||
237 | { | ||
238 | struct sk_buff *skb; | ||
239 | unsigned int frame_size; | ||
240 | |||
241 | /* | ||
242 | * As alignment we use 2 and not NET_IP_ALIGN because we need | ||
243 | * to be sure we have 2 bytes room in the head. (NET_IP_ALIGN | ||
244 | * can be 0 on some hardware). We use these 2 bytes for frame | ||
245 | * alignment later, we assume that the chance that | ||
246 | * header_size % 4 == 2 is bigger then header_size % 2 == 0 | ||
247 | * and thus optimize alignment by reserving the 2 bytes in | ||
248 | * advance. | ||
249 | */ | ||
250 | frame_size = queue->data_size + queue->desc_size; | ||
251 | skb = dev_alloc_skb(frame_size + 2); | ||
252 | if (!skb) | ||
253 | return NULL; | ||
254 | |||
255 | skb_reserve(skb, 2); | ||
256 | skb_put(skb, frame_size); | ||
257 | |||
258 | return skb; | ||
259 | } | ||
260 | |||
236 | static void rt2x00usb_interrupt_rxdone(struct urb *urb) | 261 | static void rt2x00usb_interrupt_rxdone(struct urb *urb) |
237 | { | 262 | { |
238 | struct data_entry *entry = (struct data_entry *)urb->context; | 263 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
239 | struct data_ring *ring = entry->ring; | 264 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
240 | struct rt2x00_dev *rt2x00dev = ring->rt2x00dev; | ||
241 | struct sk_buff *skb; | 265 | struct sk_buff *skb; |
242 | struct ieee80211_hdr *hdr; | 266 | struct skb_frame_desc *skbdesc; |
243 | struct skb_desc *skbdesc; | 267 | struct rxdone_entry_desc rxdesc; |
244 | struct rxdata_entry_desc desc; | ||
245 | int header_size; | ||
246 | int frame_size; | ||
247 | 268 | ||
248 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || | 269 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || |
249 | !test_and_clear_bit(ENTRY_OWNER_NIC, &entry->flags)) | 270 | !test_and_clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) |
250 | return; | 271 | return; |
251 | 272 | ||
252 | /* | 273 | /* |
@@ -254,67 +275,32 @@ static void rt2x00usb_interrupt_rxdone(struct urb *urb) | |||
254 | * to be actually valid, or if the urb is signaling | 275 | * to be actually valid, or if the urb is signaling |
255 | * a problem. | 276 | * a problem. |
256 | */ | 277 | */ |
257 | if (urb->actual_length < entry->ring->desc_size || urb->status) | 278 | if (urb->actual_length < entry->queue->desc_size || urb->status) |
258 | goto skip_entry; | 279 | goto skip_entry; |
259 | 280 | ||
260 | /* | 281 | /* |
261 | * Fill in skb descriptor | 282 | * Fill in skb descriptor |
262 | */ | 283 | */ |
263 | skbdesc = get_skb_desc(entry->skb); | 284 | skbdesc = get_skb_frame_desc(entry->skb); |
264 | skbdesc->ring = ring; | 285 | memset(skbdesc, 0, sizeof(*skbdesc)); |
265 | skbdesc->entry = entry; | 286 | skbdesc->entry = entry; |
266 | 287 | ||
267 | memset(&desc, 0, sizeof(desc)); | 288 | memset(&rxdesc, 0, sizeof(rxdesc)); |
268 | rt2x00dev->ops->lib->fill_rxdone(entry, &desc); | 289 | rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); |
269 | 290 | ||
270 | /* | 291 | /* |
271 | * Allocate a new sk buffer to replace the current one. | 292 | * Allocate a new sk buffer to replace the current one. |
272 | * If allocation fails, we should drop the current frame | 293 | * If allocation fails, we should drop the current frame |
273 | * so we can recycle the existing sk buffer for the new frame. | 294 | * so we can recycle the existing sk buffer for the new frame. |
274 | * As alignment we use 2 and not NET_IP_ALIGN because we need | ||
275 | * to be sure we have 2 bytes room in the head. (NET_IP_ALIGN | ||
276 | * can be 0 on some hardware). We use these 2 bytes for frame | ||
277 | * alignment later, we assume that the chance that | ||
278 | * header_size % 4 == 2 is bigger then header_size % 2 == 0 | ||
279 | * and thus optimize alignment by reserving the 2 bytes in | ||
280 | * advance. | ||
281 | */ | 295 | */ |
282 | frame_size = entry->ring->data_size + entry->ring->desc_size; | 296 | skb = rt2x00usb_alloc_rxskb(entry->queue); |
283 | skb = dev_alloc_skb(frame_size + 2); | ||
284 | if (!skb) | 297 | if (!skb) |
285 | goto skip_entry; | 298 | goto skip_entry; |
286 | 299 | ||
287 | skb_reserve(skb, 2); | ||
288 | skb_put(skb, frame_size); | ||
289 | |||
290 | /* | ||
291 | * The data behind the ieee80211 header must be | ||
292 | * aligned on a 4 byte boundary. | ||
293 | */ | ||
294 | hdr = (struct ieee80211_hdr *)entry->skb->data; | ||
295 | header_size = | ||
296 | ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control)); | ||
297 | |||
298 | if (header_size % 4 == 0) { | ||
299 | skb_push(entry->skb, 2); | ||
300 | memmove(entry->skb->data, entry->skb->data + 2, skb->len - 2); | ||
301 | } | ||
302 | |||
303 | /* | ||
304 | * Trim the entire buffer down to only contain the valid frame data | ||
305 | * excluding the device descriptor. The position of the descriptor | ||
306 | * varies. This means that we should check where the descriptor is | ||
307 | * and decide if we need to pull the data pointer to exclude the | ||
308 | * device descriptor. | ||
309 | */ | ||
310 | if (skbdesc->data > skbdesc->desc) | ||
311 | skb_pull(entry->skb, skbdesc->desc_len); | ||
312 | skb_trim(entry->skb, desc.size); | ||
313 | |||
314 | /* | 300 | /* |
315 | * Send the frame to rt2x00lib for further processing. | 301 | * Send the frame to rt2x00lib for further processing. |
316 | */ | 302 | */ |
317 | rt2x00lib_rxdone(entry, entry->skb, &desc); | 303 | rt2x00lib_rxdone(entry, &rxdesc); |
318 | 304 | ||
319 | /* | 305 | /* |
320 | * Replace current entry's skb with the newly allocated one, | 306 | * Replace current entry's skb with the newly allocated one, |
@@ -325,12 +311,12 @@ static void rt2x00usb_interrupt_rxdone(struct urb *urb) | |||
325 | urb->transfer_buffer_length = entry->skb->len; | 311 | urb->transfer_buffer_length = entry->skb->len; |
326 | 312 | ||
327 | skip_entry: | 313 | skip_entry: |
328 | if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) { | 314 | if (test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) { |
329 | __set_bit(ENTRY_OWNER_NIC, &entry->flags); | 315 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); |
330 | usb_submit_urb(urb, GFP_ATOMIC); | 316 | usb_submit_urb(urb, GFP_ATOMIC); |
331 | } | 317 | } |
332 | 318 | ||
333 | rt2x00_ring_index_inc(ring); | 319 | rt2x00queue_index_inc(entry->queue, Q_INDEX); |
334 | } | 320 | } |
335 | 321 | ||
336 | /* | 322 | /* |
@@ -338,18 +324,27 @@ skip_entry: | |||
338 | */ | 324 | */ |
339 | void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev) | 325 | void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev) |
340 | { | 326 | { |
341 | struct data_ring *ring; | 327 | struct queue_entry_priv_usb_rx *priv_rx; |
328 | struct queue_entry_priv_usb_tx *priv_tx; | ||
329 | struct data_queue *queue; | ||
342 | unsigned int i; | 330 | unsigned int i; |
343 | 331 | ||
344 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_RX_CONTROL, 0x0000, 0x0000, | 332 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_RX_CONTROL, 0x0000, 0x0000, |
345 | REGISTER_TIMEOUT); | 333 | REGISTER_TIMEOUT); |
346 | 334 | ||
347 | /* | 335 | /* |
348 | * Cancel all rings. | 336 | * Cancel all queues. |
349 | */ | 337 | */ |
350 | ring_for_each(rt2x00dev, ring) { | 338 | for (i = 0; i < rt2x00dev->rx->limit; i++) { |
351 | for (i = 0; i < ring->stats.limit; i++) | 339 | priv_rx = rt2x00dev->rx->entries[i].priv_data; |
352 | usb_kill_urb(ring->entry[i].priv); | 340 | usb_kill_urb(priv_rx->urb); |
341 | } | ||
342 | |||
343 | txall_queue_for_each(rt2x00dev, queue) { | ||
344 | for (i = 0; i < queue->limit; i++) { | ||
345 | priv_tx = queue->entries[i].priv_data; | ||
346 | usb_kill_urb(priv_tx->urb); | ||
347 | } | ||
353 | } | 348 | } |
354 | } | 349 | } |
355 | EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio); | 350 | EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio); |
@@ -358,64 +353,108 @@ EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio); | |||
358 | * Device initialization handlers. | 353 | * Device initialization handlers. |
359 | */ | 354 | */ |
360 | void rt2x00usb_init_rxentry(struct rt2x00_dev *rt2x00dev, | 355 | void rt2x00usb_init_rxentry(struct rt2x00_dev *rt2x00dev, |
361 | struct data_entry *entry) | 356 | struct queue_entry *entry) |
362 | { | 357 | { |
363 | struct usb_device *usb_dev = | 358 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); |
364 | interface_to_usbdev(rt2x00dev_usb(rt2x00dev)); | 359 | struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data; |
365 | 360 | ||
366 | usb_fill_bulk_urb(entry->priv, usb_dev, | 361 | usb_fill_bulk_urb(priv_rx->urb, usb_dev, |
367 | usb_rcvbulkpipe(usb_dev, 1), | 362 | usb_rcvbulkpipe(usb_dev, 1), |
368 | entry->skb->data, entry->skb->len, | 363 | entry->skb->data, entry->skb->len, |
369 | rt2x00usb_interrupt_rxdone, entry); | 364 | rt2x00usb_interrupt_rxdone, entry); |
370 | 365 | ||
371 | __set_bit(ENTRY_OWNER_NIC, &entry->flags); | 366 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); |
372 | usb_submit_urb(entry->priv, GFP_ATOMIC); | 367 | usb_submit_urb(priv_rx->urb, GFP_ATOMIC); |
373 | } | 368 | } |
374 | EXPORT_SYMBOL_GPL(rt2x00usb_init_rxentry); | 369 | EXPORT_SYMBOL_GPL(rt2x00usb_init_rxentry); |
375 | 370 | ||
376 | void rt2x00usb_init_txentry(struct rt2x00_dev *rt2x00dev, | 371 | void rt2x00usb_init_txentry(struct rt2x00_dev *rt2x00dev, |
377 | struct data_entry *entry) | 372 | struct queue_entry *entry) |
378 | { | 373 | { |
379 | entry->flags = 0; | 374 | entry->flags = 0; |
380 | } | 375 | } |
381 | EXPORT_SYMBOL_GPL(rt2x00usb_init_txentry); | 376 | EXPORT_SYMBOL_GPL(rt2x00usb_init_txentry); |
382 | 377 | ||
383 | static int rt2x00usb_alloc_urb(struct rt2x00_dev *rt2x00dev, | 378 | static int rt2x00usb_alloc_urb(struct rt2x00_dev *rt2x00dev, |
384 | struct data_ring *ring) | 379 | struct data_queue *queue) |
385 | { | 380 | { |
381 | struct queue_entry_priv_usb_rx *priv_rx; | ||
382 | struct queue_entry_priv_usb_tx *priv_tx; | ||
383 | struct queue_entry_priv_usb_bcn *priv_bcn; | ||
384 | struct urb *urb; | ||
385 | unsigned int guardian = | ||
386 | test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | ||
386 | unsigned int i; | 387 | unsigned int i; |
387 | 388 | ||
388 | /* | 389 | /* |
389 | * Allocate the URB's | 390 | * Allocate the URB's |
390 | */ | 391 | */ |
391 | for (i = 0; i < ring->stats.limit; i++) { | 392 | for (i = 0; i < queue->limit; i++) { |
392 | ring->entry[i].priv = usb_alloc_urb(0, GFP_KERNEL); | 393 | urb = usb_alloc_urb(0, GFP_KERNEL); |
393 | if (!ring->entry[i].priv) | 394 | if (!urb) |
394 | return -ENOMEM; | 395 | return -ENOMEM; |
396 | |||
397 | if (queue->qid == QID_RX) { | ||
398 | priv_rx = queue->entries[i].priv_data; | ||
399 | priv_rx->urb = urb; | ||
400 | } else if (queue->qid == QID_MGMT && guardian) { | ||
401 | priv_bcn = queue->entries[i].priv_data; | ||
402 | priv_bcn->urb = urb; | ||
403 | |||
404 | urb = usb_alloc_urb(0, GFP_KERNEL); | ||
405 | if (!urb) | ||
406 | return -ENOMEM; | ||
407 | |||
408 | priv_bcn->guardian_urb = urb; | ||
409 | } else { | ||
410 | priv_tx = queue->entries[i].priv_data; | ||
411 | priv_tx->urb = urb; | ||
412 | } | ||
395 | } | 413 | } |
396 | 414 | ||
397 | return 0; | 415 | return 0; |
398 | } | 416 | } |
399 | 417 | ||
400 | static void rt2x00usb_free_urb(struct rt2x00_dev *rt2x00dev, | 418 | static void rt2x00usb_free_urb(struct rt2x00_dev *rt2x00dev, |
401 | struct data_ring *ring) | 419 | struct data_queue *queue) |
402 | { | 420 | { |
421 | struct queue_entry_priv_usb_rx *priv_rx; | ||
422 | struct queue_entry_priv_usb_tx *priv_tx; | ||
423 | struct queue_entry_priv_usb_bcn *priv_bcn; | ||
424 | struct urb *urb; | ||
425 | unsigned int guardian = | ||
426 | test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | ||
403 | unsigned int i; | 427 | unsigned int i; |
404 | 428 | ||
405 | if (!ring->entry) | 429 | if (!queue->entries) |
406 | return; | 430 | return; |
407 | 431 | ||
408 | for (i = 0; i < ring->stats.limit; i++) { | 432 | for (i = 0; i < queue->limit; i++) { |
409 | usb_kill_urb(ring->entry[i].priv); | 433 | if (queue->qid == QID_RX) { |
410 | usb_free_urb(ring->entry[i].priv); | 434 | priv_rx = queue->entries[i].priv_data; |
411 | if (ring->entry[i].skb) | 435 | urb = priv_rx->urb; |
412 | kfree_skb(ring->entry[i].skb); | 436 | } else if (queue->qid == QID_MGMT && guardian) { |
437 | priv_bcn = queue->entries[i].priv_data; | ||
438 | |||
439 | usb_kill_urb(priv_bcn->guardian_urb); | ||
440 | usb_free_urb(priv_bcn->guardian_urb); | ||
441 | |||
442 | urb = priv_bcn->urb; | ||
443 | } else { | ||
444 | priv_tx = queue->entries[i].priv_data; | ||
445 | urb = priv_tx->urb; | ||
446 | } | ||
447 | |||
448 | usb_kill_urb(urb); | ||
449 | usb_free_urb(urb); | ||
450 | if (queue->entries[i].skb) | ||
451 | kfree_skb(queue->entries[i].skb); | ||
413 | } | 452 | } |
414 | } | 453 | } |
415 | 454 | ||
416 | int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev) | 455 | int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev) |
417 | { | 456 | { |
418 | struct data_ring *ring; | 457 | struct data_queue *queue; |
419 | struct sk_buff *skb; | 458 | struct sk_buff *skb; |
420 | unsigned int entry_size; | 459 | unsigned int entry_size; |
421 | unsigned int i; | 460 | unsigned int i; |
@@ -424,25 +463,22 @@ int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev) | |||
424 | /* | 463 | /* |
425 | * Allocate DMA | 464 | * Allocate DMA |
426 | */ | 465 | */ |
427 | ring_for_each(rt2x00dev, ring) { | 466 | queue_for_each(rt2x00dev, queue) { |
428 | status = rt2x00usb_alloc_urb(rt2x00dev, ring); | 467 | status = rt2x00usb_alloc_urb(rt2x00dev, queue); |
429 | if (status) | 468 | if (status) |
430 | goto exit; | 469 | goto exit; |
431 | } | 470 | } |
432 | 471 | ||
433 | /* | 472 | /* |
434 | * For the RX ring, skb's should be allocated. | 473 | * For the RX queue, skb's should be allocated. |
435 | */ | 474 | */ |
436 | entry_size = rt2x00dev->rx->data_size + rt2x00dev->rx->desc_size; | 475 | entry_size = rt2x00dev->rx->data_size + rt2x00dev->rx->desc_size; |
437 | for (i = 0; i < rt2x00dev->rx->stats.limit; i++) { | 476 | for (i = 0; i < rt2x00dev->rx->limit; i++) { |
438 | skb = dev_alloc_skb(NET_IP_ALIGN + entry_size); | 477 | skb = rt2x00usb_alloc_rxskb(rt2x00dev->rx); |
439 | if (!skb) | 478 | if (!skb) |
440 | goto exit; | 479 | goto exit; |
441 | 480 | ||
442 | skb_reserve(skb, NET_IP_ALIGN); | 481 | rt2x00dev->rx->entries[i].skb = skb; |
443 | skb_put(skb, entry_size); | ||
444 | |||
445 | rt2x00dev->rx->entry[i].skb = skb; | ||
446 | } | 482 | } |
447 | 483 | ||
448 | return 0; | 484 | return 0; |
@@ -456,10 +492,10 @@ EXPORT_SYMBOL_GPL(rt2x00usb_initialize); | |||
456 | 492 | ||
457 | void rt2x00usb_uninitialize(struct rt2x00_dev *rt2x00dev) | 493 | void rt2x00usb_uninitialize(struct rt2x00_dev *rt2x00dev) |
458 | { | 494 | { |
459 | struct data_ring *ring; | 495 | struct data_queue *queue; |
460 | 496 | ||
461 | ring_for_each(rt2x00dev, ring) | 497 | queue_for_each(rt2x00dev, queue) |
462 | rt2x00usb_free_urb(rt2x00dev, ring); | 498 | rt2x00usb_free_urb(rt2x00dev, queue); |
463 | } | 499 | } |
464 | EXPORT_SYMBOL_GPL(rt2x00usb_uninitialize); | 500 | EXPORT_SYMBOL_GPL(rt2x00usb_uninitialize); |
465 | 501 | ||
@@ -627,9 +663,9 @@ EXPORT_SYMBOL_GPL(rt2x00usb_resume); | |||
627 | #endif /* CONFIG_PM */ | 663 | #endif /* CONFIG_PM */ |
628 | 664 | ||
629 | /* | 665 | /* |
630 | * rt2x00pci module information. | 666 | * rt2x00usb module information. |
631 | */ | 667 | */ |
632 | MODULE_AUTHOR(DRV_PROJECT); | 668 | MODULE_AUTHOR(DRV_PROJECT); |
633 | MODULE_VERSION(DRV_VERSION); | 669 | MODULE_VERSION(DRV_VERSION); |
634 | MODULE_DESCRIPTION("rt2x00 library"); | 670 | MODULE_DESCRIPTION("rt2x00 usb library"); |
635 | MODULE_LICENSE("GPL"); | 671 | MODULE_LICENSE("GPL"); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h index b5c1d176c481..af606638e227 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.h +++ b/drivers/net/wireless/rt2x00/rt2x00usb.h | |||
@@ -160,16 +160,58 @@ void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev); | |||
160 | * TX data handlers. | 160 | * TX data handlers. |
161 | */ | 161 | */ |
162 | int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, | 162 | int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, |
163 | struct data_ring *ring, struct sk_buff *skb, | 163 | struct data_queue *queue, struct sk_buff *skb, |
164 | struct ieee80211_tx_control *control); | 164 | struct ieee80211_tx_control *control); |
165 | 165 | ||
166 | /** | ||
167 | * struct queue_entry_priv_usb_rx: Per RX entry USB specific information | ||
168 | * | ||
169 | * @urb: Urb structure used for device communication. | ||
170 | */ | ||
171 | struct queue_entry_priv_usb_rx { | ||
172 | struct urb *urb; | ||
173 | }; | ||
174 | |||
175 | /** | ||
176 | * struct queue_entry_priv_usb_tx: Per TX entry USB specific information | ||
177 | * | ||
178 | * @urb: Urb structure used for device communication. | ||
179 | * @control: mac80211 control structure used to transmit data. | ||
180 | */ | ||
181 | struct queue_entry_priv_usb_tx { | ||
182 | struct urb *urb; | ||
183 | |||
184 | struct ieee80211_tx_control control; | ||
185 | }; | ||
186 | |||
187 | /** | ||
188 | * struct queue_entry_priv_usb_tx: Per TX entry USB specific information | ||
189 | * | ||
190 | * The first section should match &struct queue_entry_priv_usb_tx exactly. | ||
191 | * rt2500usb can use this structure to send a guardian byte when working | ||
192 | * with beacons. | ||
193 | * | ||
194 | * @urb: Urb structure used for device communication. | ||
195 | * @control: mac80211 control structure used to transmit data. | ||
196 | * @guardian_data: Set to 0, used for sending the guardian data. | ||
197 | * @guardian_urb: Urb structure used to send the guardian data. | ||
198 | */ | ||
199 | struct queue_entry_priv_usb_bcn { | ||
200 | struct urb *urb; | ||
201 | |||
202 | struct ieee80211_tx_control control; | ||
203 | |||
204 | unsigned int guardian_data; | ||
205 | struct urb *guardian_urb; | ||
206 | }; | ||
207 | |||
166 | /* | 208 | /* |
167 | * Device initialization handlers. | 209 | * Device initialization handlers. |
168 | */ | 210 | */ |
169 | void rt2x00usb_init_rxentry(struct rt2x00_dev *rt2x00dev, | 211 | void rt2x00usb_init_rxentry(struct rt2x00_dev *rt2x00dev, |
170 | struct data_entry *entry); | 212 | struct queue_entry *entry); |
171 | void rt2x00usb_init_txentry(struct rt2x00_dev *rt2x00dev, | 213 | void rt2x00usb_init_txentry(struct rt2x00_dev *rt2x00dev, |
172 | struct data_entry *entry); | 214 | struct queue_entry *entry); |
173 | int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev); | 215 | int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev); |
174 | void rt2x00usb_uninitialize(struct rt2x00_dev *rt2x00dev); | 216 | void rt2x00usb_uninitialize(struct rt2x00_dev *rt2x00dev); |
175 | 217 | ||
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index 42cd1dc09164..547fa33e99dd 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c | |||
@@ -262,7 +262,7 @@ static int rt61pci_rfkill_poll(struct rt2x00_dev *rt2x00dev) | |||
262 | u32 reg; | 262 | u32 reg; |
263 | 263 | ||
264 | rt2x00pci_register_read(rt2x00dev, MAC_CSR13, ®); | 264 | rt2x00pci_register_read(rt2x00dev, MAC_CSR13, ®); |
265 | return rt2x00_get_field32(reg, MAC_CSR13_BIT5);; | 265 | return rt2x00_get_field32(reg, MAC_CSR13_BIT5); |
266 | } | 266 | } |
267 | #else | 267 | #else |
268 | #define rt61pci_rfkill_poll NULL | 268 | #define rt61pci_rfkill_poll NULL |
@@ -990,49 +990,49 @@ static int rt61pci_load_firmware(struct rt2x00_dev *rt2x00dev, void *data, | |||
990 | } | 990 | } |
991 | 991 | ||
992 | static void rt61pci_init_rxentry(struct rt2x00_dev *rt2x00dev, | 992 | static void rt61pci_init_rxentry(struct rt2x00_dev *rt2x00dev, |
993 | struct data_entry *entry) | 993 | struct queue_entry *entry) |
994 | { | 994 | { |
995 | __le32 *rxd = entry->priv; | 995 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; |
996 | u32 word; | 996 | u32 word; |
997 | 997 | ||
998 | rt2x00_desc_read(rxd, 5, &word); | 998 | rt2x00_desc_read(priv_rx->desc, 5, &word); |
999 | rt2x00_set_field32(&word, RXD_W5_BUFFER_PHYSICAL_ADDRESS, | 999 | rt2x00_set_field32(&word, RXD_W5_BUFFER_PHYSICAL_ADDRESS, priv_rx->dma); |
1000 | entry->data_dma); | 1000 | rt2x00_desc_write(priv_rx->desc, 5, word); |
1001 | rt2x00_desc_write(rxd, 5, word); | ||
1002 | 1001 | ||
1003 | rt2x00_desc_read(rxd, 0, &word); | 1002 | rt2x00_desc_read(priv_rx->desc, 0, &word); |
1004 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); | 1003 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); |
1005 | rt2x00_desc_write(rxd, 0, word); | 1004 | rt2x00_desc_write(priv_rx->desc, 0, word); |
1006 | } | 1005 | } |
1007 | 1006 | ||
1008 | static void rt61pci_init_txentry(struct rt2x00_dev *rt2x00dev, | 1007 | static void rt61pci_init_txentry(struct rt2x00_dev *rt2x00dev, |
1009 | struct data_entry *entry) | 1008 | struct queue_entry *entry) |
1010 | { | 1009 | { |
1011 | __le32 *txd = entry->priv; | 1010 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; |
1012 | u32 word; | 1011 | u32 word; |
1013 | 1012 | ||
1014 | rt2x00_desc_read(txd, 1, &word); | 1013 | rt2x00_desc_read(priv_tx->desc, 1, &word); |
1015 | rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1); | 1014 | rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1); |
1016 | rt2x00_desc_write(txd, 1, word); | 1015 | rt2x00_desc_write(priv_tx->desc, 1, word); |
1017 | 1016 | ||
1018 | rt2x00_desc_read(txd, 5, &word); | 1017 | rt2x00_desc_read(priv_tx->desc, 5, &word); |
1019 | rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->ring->queue_idx); | 1018 | rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid); |
1020 | rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE, entry->entry_idx); | 1019 | rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE, entry->entry_idx); |
1021 | rt2x00_desc_write(txd, 5, word); | 1020 | rt2x00_desc_write(priv_tx->desc, 5, word); |
1022 | 1021 | ||
1023 | rt2x00_desc_read(txd, 6, &word); | 1022 | rt2x00_desc_read(priv_tx->desc, 6, &word); |
1024 | rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS, | 1023 | rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS, priv_tx->dma); |
1025 | entry->data_dma); | 1024 | rt2x00_desc_write(priv_tx->desc, 6, word); |
1026 | rt2x00_desc_write(txd, 6, word); | ||
1027 | 1025 | ||
1028 | rt2x00_desc_read(txd, 0, &word); | 1026 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
1029 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); | 1027 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); |
1030 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); | 1028 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); |
1031 | rt2x00_desc_write(txd, 0, word); | 1029 | rt2x00_desc_write(priv_tx->desc, 0, word); |
1032 | } | 1030 | } |
1033 | 1031 | ||
1034 | static int rt61pci_init_rings(struct rt2x00_dev *rt2x00dev) | 1032 | static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev) |
1035 | { | 1033 | { |
1034 | struct queue_entry_priv_pci_rx *priv_rx; | ||
1035 | struct queue_entry_priv_pci_tx *priv_tx; | ||
1036 | u32 reg; | 1036 | u32 reg; |
1037 | 1037 | ||
1038 | /* | 1038 | /* |
@@ -1040,59 +1040,50 @@ static int rt61pci_init_rings(struct rt2x00_dev *rt2x00dev) | |||
1040 | */ | 1040 | */ |
1041 | rt2x00pci_register_read(rt2x00dev, TX_RING_CSR0, ®); | 1041 | rt2x00pci_register_read(rt2x00dev, TX_RING_CSR0, ®); |
1042 | rt2x00_set_field32(®, TX_RING_CSR0_AC0_RING_SIZE, | 1042 | rt2x00_set_field32(®, TX_RING_CSR0_AC0_RING_SIZE, |
1043 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].stats.limit); | 1043 | rt2x00dev->tx[0].limit); |
1044 | rt2x00_set_field32(®, TX_RING_CSR0_AC1_RING_SIZE, | 1044 | rt2x00_set_field32(®, TX_RING_CSR0_AC1_RING_SIZE, |
1045 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA1].stats.limit); | 1045 | rt2x00dev->tx[1].limit); |
1046 | rt2x00_set_field32(®, TX_RING_CSR0_AC2_RING_SIZE, | 1046 | rt2x00_set_field32(®, TX_RING_CSR0_AC2_RING_SIZE, |
1047 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA2].stats.limit); | 1047 | rt2x00dev->tx[2].limit); |
1048 | rt2x00_set_field32(®, TX_RING_CSR0_AC3_RING_SIZE, | 1048 | rt2x00_set_field32(®, TX_RING_CSR0_AC3_RING_SIZE, |
1049 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA3].stats.limit); | 1049 | rt2x00dev->tx[3].limit); |
1050 | rt2x00pci_register_write(rt2x00dev, TX_RING_CSR0, reg); | 1050 | rt2x00pci_register_write(rt2x00dev, TX_RING_CSR0, reg); |
1051 | 1051 | ||
1052 | rt2x00pci_register_read(rt2x00dev, TX_RING_CSR1, ®); | 1052 | rt2x00pci_register_read(rt2x00dev, TX_RING_CSR1, ®); |
1053 | rt2x00_set_field32(®, TX_RING_CSR1_MGMT_RING_SIZE, | ||
1054 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA4].stats.limit); | ||
1055 | rt2x00_set_field32(®, TX_RING_CSR1_TXD_SIZE, | 1053 | rt2x00_set_field32(®, TX_RING_CSR1_TXD_SIZE, |
1056 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].desc_size / | 1054 | rt2x00dev->tx[0].desc_size / 4); |
1057 | 4); | ||
1058 | rt2x00pci_register_write(rt2x00dev, TX_RING_CSR1, reg); | 1055 | rt2x00pci_register_write(rt2x00dev, TX_RING_CSR1, reg); |
1059 | 1056 | ||
1057 | priv_tx = rt2x00dev->tx[0].entries[0].priv_data; | ||
1060 | rt2x00pci_register_read(rt2x00dev, AC0_BASE_CSR, ®); | 1058 | rt2x00pci_register_read(rt2x00dev, AC0_BASE_CSR, ®); |
1061 | rt2x00_set_field32(®, AC0_BASE_CSR_RING_REGISTER, | 1059 | rt2x00_set_field32(®, AC0_BASE_CSR_RING_REGISTER, priv_tx->dma); |
1062 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA0].data_dma); | ||
1063 | rt2x00pci_register_write(rt2x00dev, AC0_BASE_CSR, reg); | 1060 | rt2x00pci_register_write(rt2x00dev, AC0_BASE_CSR, reg); |
1064 | 1061 | ||
1062 | priv_tx = rt2x00dev->tx[1].entries[0].priv_data; | ||
1065 | rt2x00pci_register_read(rt2x00dev, AC1_BASE_CSR, ®); | 1063 | rt2x00pci_register_read(rt2x00dev, AC1_BASE_CSR, ®); |
1066 | rt2x00_set_field32(®, AC1_BASE_CSR_RING_REGISTER, | 1064 | rt2x00_set_field32(®, AC1_BASE_CSR_RING_REGISTER, priv_tx->dma); |
1067 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA1].data_dma); | ||
1068 | rt2x00pci_register_write(rt2x00dev, AC1_BASE_CSR, reg); | 1065 | rt2x00pci_register_write(rt2x00dev, AC1_BASE_CSR, reg); |
1069 | 1066 | ||
1067 | priv_tx = rt2x00dev->tx[2].entries[0].priv_data; | ||
1070 | rt2x00pci_register_read(rt2x00dev, AC2_BASE_CSR, ®); | 1068 | rt2x00pci_register_read(rt2x00dev, AC2_BASE_CSR, ®); |
1071 | rt2x00_set_field32(®, AC2_BASE_CSR_RING_REGISTER, | 1069 | rt2x00_set_field32(®, AC2_BASE_CSR_RING_REGISTER, priv_tx->dma); |
1072 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA2].data_dma); | ||
1073 | rt2x00pci_register_write(rt2x00dev, AC2_BASE_CSR, reg); | 1070 | rt2x00pci_register_write(rt2x00dev, AC2_BASE_CSR, reg); |
1074 | 1071 | ||
1072 | priv_tx = rt2x00dev->tx[3].entries[0].priv_data; | ||
1075 | rt2x00pci_register_read(rt2x00dev, AC3_BASE_CSR, ®); | 1073 | rt2x00pci_register_read(rt2x00dev, AC3_BASE_CSR, ®); |
1076 | rt2x00_set_field32(®, AC3_BASE_CSR_RING_REGISTER, | 1074 | rt2x00_set_field32(®, AC3_BASE_CSR_RING_REGISTER, priv_tx->dma); |
1077 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA3].data_dma); | ||
1078 | rt2x00pci_register_write(rt2x00dev, AC3_BASE_CSR, reg); | 1075 | rt2x00pci_register_write(rt2x00dev, AC3_BASE_CSR, reg); |
1079 | 1076 | ||
1080 | rt2x00pci_register_read(rt2x00dev, MGMT_BASE_CSR, ®); | ||
1081 | rt2x00_set_field32(®, MGMT_BASE_CSR_RING_REGISTER, | ||
1082 | rt2x00dev->tx[IEEE80211_TX_QUEUE_DATA4].data_dma); | ||
1083 | rt2x00pci_register_write(rt2x00dev, MGMT_BASE_CSR, reg); | ||
1084 | |||
1085 | rt2x00pci_register_read(rt2x00dev, RX_RING_CSR, ®); | 1077 | rt2x00pci_register_read(rt2x00dev, RX_RING_CSR, ®); |
1086 | rt2x00_set_field32(®, RX_RING_CSR_RING_SIZE, | 1078 | rt2x00_set_field32(®, RX_RING_CSR_RING_SIZE, rt2x00dev->rx->limit); |
1087 | rt2x00dev->rx->stats.limit); | ||
1088 | rt2x00_set_field32(®, RX_RING_CSR_RXD_SIZE, | 1079 | rt2x00_set_field32(®, RX_RING_CSR_RXD_SIZE, |
1089 | rt2x00dev->rx->desc_size / 4); | 1080 | rt2x00dev->rx->desc_size / 4); |
1090 | rt2x00_set_field32(®, RX_RING_CSR_RXD_WRITEBACK_SIZE, 4); | 1081 | rt2x00_set_field32(®, RX_RING_CSR_RXD_WRITEBACK_SIZE, 4); |
1091 | rt2x00pci_register_write(rt2x00dev, RX_RING_CSR, reg); | 1082 | rt2x00pci_register_write(rt2x00dev, RX_RING_CSR, reg); |
1092 | 1083 | ||
1084 | priv_rx = rt2x00dev->rx->entries[0].priv_data; | ||
1093 | rt2x00pci_register_read(rt2x00dev, RX_BASE_CSR, ®); | 1085 | rt2x00pci_register_read(rt2x00dev, RX_BASE_CSR, ®); |
1094 | rt2x00_set_field32(®, RX_BASE_CSR_RING_REGISTER, | 1086 | rt2x00_set_field32(®, RX_BASE_CSR_RING_REGISTER, priv_rx->dma); |
1095 | rt2x00dev->rx->data_dma); | ||
1096 | rt2x00pci_register_write(rt2x00dev, RX_BASE_CSR, reg); | 1087 | rt2x00pci_register_write(rt2x00dev, RX_BASE_CSR, reg); |
1097 | 1088 | ||
1098 | rt2x00pci_register_read(rt2x00dev, TX_DMA_DST_CSR, ®); | 1089 | rt2x00pci_register_read(rt2x00dev, TX_DMA_DST_CSR, ®); |
@@ -1108,7 +1099,7 @@ static int rt61pci_init_rings(struct rt2x00_dev *rt2x00dev) | |||
1108 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_AC1, 1); | 1099 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_AC1, 1); |
1109 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_AC2, 1); | 1100 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_AC2, 1); |
1110 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_AC3, 1); | 1101 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_AC3, 1); |
1111 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_MGMT, 1); | 1102 | rt2x00_set_field32(®, LOAD_TX_RING_CSR_LOAD_TXD_MGMT, 0); |
1112 | rt2x00pci_register_write(rt2x00dev, LOAD_TX_RING_CSR, reg); | 1103 | rt2x00pci_register_write(rt2x00dev, LOAD_TX_RING_CSR, reg); |
1113 | 1104 | ||
1114 | rt2x00pci_register_read(rt2x00dev, RX_CNTL_CSR, ®); | 1105 | rt2x00pci_register_read(rt2x00dev, RX_CNTL_CSR, ®); |
@@ -1375,7 +1366,7 @@ static int rt61pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
1375 | /* | 1366 | /* |
1376 | * Initialize all registers. | 1367 | * Initialize all registers. |
1377 | */ | 1368 | */ |
1378 | if (rt61pci_init_rings(rt2x00dev) || | 1369 | if (rt61pci_init_queues(rt2x00dev) || |
1379 | rt61pci_init_registers(rt2x00dev) || | 1370 | rt61pci_init_registers(rt2x00dev) || |
1380 | rt61pci_init_bbp(rt2x00dev)) { | 1371 | rt61pci_init_bbp(rt2x00dev)) { |
1381 | ERROR(rt2x00dev, "Register initialization failed.\n"); | 1372 | ERROR(rt2x00dev, "Register initialization failed.\n"); |
@@ -1508,10 +1499,10 @@ static int rt61pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1508 | */ | 1499 | */ |
1509 | static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1500 | static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1510 | struct sk_buff *skb, | 1501 | struct sk_buff *skb, |
1511 | struct txdata_entry_desc *desc, | 1502 | struct txentry_desc *txdesc, |
1512 | struct ieee80211_tx_control *control) | 1503 | struct ieee80211_tx_control *control) |
1513 | { | 1504 | { |
1514 | struct skb_desc *skbdesc = get_skb_desc(skb); | 1505 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1515 | __le32 *txd = skbdesc->desc; | 1506 | __le32 *txd = skbdesc->desc; |
1516 | u32 word; | 1507 | u32 word; |
1517 | 1508 | ||
@@ -1519,19 +1510,19 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1519 | * Start writing the descriptor words. | 1510 | * Start writing the descriptor words. |
1520 | */ | 1511 | */ |
1521 | rt2x00_desc_read(txd, 1, &word); | 1512 | rt2x00_desc_read(txd, 1, &word); |
1522 | rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue); | 1513 | rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue); |
1523 | rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs); | 1514 | rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs); |
1524 | rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min); | 1515 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); |
1525 | rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max); | 1516 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); |
1526 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | 1517 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
1527 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); | 1518 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); |
1528 | rt2x00_desc_write(txd, 1, word); | 1519 | rt2x00_desc_write(txd, 1, word); |
1529 | 1520 | ||
1530 | rt2x00_desc_read(txd, 2, &word); | 1521 | rt2x00_desc_read(txd, 2, &word); |
1531 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal); | 1522 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal); |
1532 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service); | 1523 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service); |
1533 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low); | 1524 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low); |
1534 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high); | 1525 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high); |
1535 | rt2x00_desc_write(txd, 2, word); | 1526 | rt2x00_desc_write(txd, 2, word); |
1536 | 1527 | ||
1537 | rt2x00_desc_read(txd, 5, &word); | 1528 | rt2x00_desc_read(txd, 5, &word); |
@@ -1548,21 +1539,21 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1548 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); | 1539 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 1); |
1549 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); | 1540 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); |
1550 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, | 1541 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
1551 | test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags)); | 1542 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
1552 | rt2x00_set_field32(&word, TXD_W0_ACK, | 1543 | rt2x00_set_field32(&word, TXD_W0_ACK, |
1553 | test_bit(ENTRY_TXD_ACK, &desc->flags)); | 1544 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
1554 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, | 1545 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
1555 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags)); | 1546 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
1556 | rt2x00_set_field32(&word, TXD_W0_OFDM, | 1547 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
1557 | test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags)); | 1548 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1558 | rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs); | 1549 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1559 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1550 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1560 | !!(control->flags & | 1551 | !!(control->flags & |
1561 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | 1552 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); |
1562 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); | 1553 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); |
1563 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | 1554 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); |
1564 | rt2x00_set_field32(&word, TXD_W0_BURST, | 1555 | rt2x00_set_field32(&word, TXD_W0_BURST, |
1565 | test_bit(ENTRY_TXD_BURST, &desc->flags)); | 1556 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); |
1566 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); | 1557 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); |
1567 | rt2x00_desc_write(txd, 0, word); | 1558 | rt2x00_desc_write(txd, 0, word); |
1568 | } | 1559 | } |
@@ -1648,28 +1639,28 @@ static int rt61pci_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1) | |||
1648 | return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset; | 1639 | return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset; |
1649 | } | 1640 | } |
1650 | 1641 | ||
1651 | static void rt61pci_fill_rxdone(struct data_entry *entry, | 1642 | static void rt61pci_fill_rxdone(struct queue_entry *entry, |
1652 | struct rxdata_entry_desc *desc) | 1643 | struct rxdone_entry_desc *rxdesc) |
1653 | { | 1644 | { |
1654 | __le32 *rxd = entry->priv; | 1645 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; |
1655 | u32 word0; | 1646 | u32 word0; |
1656 | u32 word1; | 1647 | u32 word1; |
1657 | 1648 | ||
1658 | rt2x00_desc_read(rxd, 0, &word0); | 1649 | rt2x00_desc_read(priv_rx->desc, 0, &word0); |
1659 | rt2x00_desc_read(rxd, 1, &word1); | 1650 | rt2x00_desc_read(priv_rx->desc, 1, &word1); |
1660 | 1651 | ||
1661 | desc->flags = 0; | 1652 | rxdesc->flags = 0; |
1662 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1653 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1663 | desc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1654 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1664 | 1655 | ||
1665 | /* | 1656 | /* |
1666 | * Obtain the status about this packet. | 1657 | * Obtain the status about this packet. |
1667 | */ | 1658 | */ |
1668 | desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); | 1659 | rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
1669 | desc->rssi = rt61pci_agc_to_rssi(entry->ring->rt2x00dev, word1); | 1660 | rxdesc->rssi = rt61pci_agc_to_rssi(entry->queue->rt2x00dev, word1); |
1670 | desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); | 1661 | rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); |
1671 | desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1662 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1672 | desc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); | 1663 | rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); |
1673 | } | 1664 | } |
1674 | 1665 | ||
1675 | /* | 1666 | /* |
@@ -1677,17 +1668,16 @@ static void rt61pci_fill_rxdone(struct data_entry *entry, | |||
1677 | */ | 1668 | */ |
1678 | static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | 1669 | static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) |
1679 | { | 1670 | { |
1680 | struct data_ring *ring; | 1671 | struct data_queue *queue; |
1681 | struct data_entry *entry; | 1672 | struct queue_entry *entry; |
1682 | struct data_entry *entry_done; | 1673 | struct queue_entry *entry_done; |
1683 | __le32 *txd; | 1674 | struct queue_entry_priv_pci_tx *priv_tx; |
1675 | struct txdone_entry_desc txdesc; | ||
1684 | u32 word; | 1676 | u32 word; |
1685 | u32 reg; | 1677 | u32 reg; |
1686 | u32 old_reg; | 1678 | u32 old_reg; |
1687 | int type; | 1679 | int type; |
1688 | int index; | 1680 | int index; |
1689 | int tx_status; | ||
1690 | int retry; | ||
1691 | 1681 | ||
1692 | /* | 1682 | /* |
1693 | * During each loop we will compare the freshly read | 1683 | * During each loop we will compare the freshly read |
@@ -1710,11 +1700,11 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
1710 | 1700 | ||
1711 | /* | 1701 | /* |
1712 | * Skip this entry when it contains an invalid | 1702 | * Skip this entry when it contains an invalid |
1713 | * ring identication number. | 1703 | * queue identication number. |
1714 | */ | 1704 | */ |
1715 | type = rt2x00_get_field32(reg, STA_CSR4_PID_TYPE); | 1705 | type = rt2x00_get_field32(reg, STA_CSR4_PID_TYPE); |
1716 | ring = rt2x00lib_get_ring(rt2x00dev, type); | 1706 | queue = rt2x00queue_get_queue(rt2x00dev, type); |
1717 | if (unlikely(!ring)) | 1707 | if (unlikely(!queue)) |
1718 | continue; | 1708 | continue; |
1719 | 1709 | ||
1720 | /* | 1710 | /* |
@@ -1722,36 +1712,40 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
1722 | * index number. | 1712 | * index number. |
1723 | */ | 1713 | */ |
1724 | index = rt2x00_get_field32(reg, STA_CSR4_PID_SUBTYPE); | 1714 | index = rt2x00_get_field32(reg, STA_CSR4_PID_SUBTYPE); |
1725 | if (unlikely(index >= ring->stats.limit)) | 1715 | if (unlikely(index >= queue->limit)) |
1726 | continue; | 1716 | continue; |
1727 | 1717 | ||
1728 | entry = &ring->entry[index]; | 1718 | entry = &queue->entries[index]; |
1729 | txd = entry->priv; | 1719 | priv_tx = entry->priv_data; |
1730 | rt2x00_desc_read(txd, 0, &word); | 1720 | rt2x00_desc_read(priv_tx->desc, 0, &word); |
1731 | 1721 | ||
1732 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || | 1722 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || |
1733 | !rt2x00_get_field32(word, TXD_W0_VALID)) | 1723 | !rt2x00_get_field32(word, TXD_W0_VALID)) |
1734 | return; | 1724 | return; |
1735 | 1725 | ||
1736 | entry_done = rt2x00_get_data_entry_done(ring); | 1726 | entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
1737 | while (entry != entry_done) { | 1727 | while (entry != entry_done) { |
1738 | /* Catch up. Just report any entries we missed as | 1728 | /* Catch up. |
1739 | * failed. */ | 1729 | * Just report any entries we missed as failed. |
1730 | */ | ||
1740 | WARNING(rt2x00dev, | 1731 | WARNING(rt2x00dev, |
1741 | "TX status report missed for entry %p\n", | 1732 | "TX status report missed for entry %d\n", |
1742 | entry_done); | 1733 | entry_done->entry_idx); |
1743 | rt2x00pci_txdone(rt2x00dev, entry_done, TX_FAIL_OTHER, | 1734 | |
1744 | 0); | 1735 | txdesc.status = TX_FAIL_OTHER; |
1745 | entry_done = rt2x00_get_data_entry_done(ring); | 1736 | txdesc.retry = 0; |
1737 | |||
1738 | rt2x00pci_txdone(rt2x00dev, entry_done, &txdesc); | ||
1739 | entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE); | ||
1746 | } | 1740 | } |
1747 | 1741 | ||
1748 | /* | 1742 | /* |
1749 | * Obtain the status about this packet. | 1743 | * Obtain the status about this packet. |
1750 | */ | 1744 | */ |
1751 | tx_status = rt2x00_get_field32(reg, STA_CSR4_TX_RESULT); | 1745 | txdesc.status = rt2x00_get_field32(reg, STA_CSR4_TX_RESULT); |
1752 | retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); | 1746 | txdesc.retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); |
1753 | 1747 | ||
1754 | rt2x00pci_txdone(rt2x00dev, entry, tx_status, retry); | 1748 | rt2x00pci_txdone(rt2x00dev, entry, &txdesc); |
1755 | } | 1749 | } |
1756 | } | 1750 | } |
1757 | 1751 | ||
@@ -2381,9 +2375,9 @@ static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
2381 | struct ieee80211_tx_control *control) | 2375 | struct ieee80211_tx_control *control) |
2382 | { | 2376 | { |
2383 | struct rt2x00_dev *rt2x00dev = hw->priv; | 2377 | struct rt2x00_dev *rt2x00dev = hw->priv; |
2384 | struct skb_desc *desc; | 2378 | struct skb_frame_desc *skbdesc; |
2385 | struct data_ring *ring; | 2379 | struct data_queue *queue; |
2386 | struct data_entry *entry; | 2380 | struct queue_entry *entry; |
2387 | 2381 | ||
2388 | /* | 2382 | /* |
2389 | * Just in case the ieee80211 doesn't set this, | 2383 | * Just in case the ieee80211 doesn't set this, |
@@ -2391,15 +2385,15 @@ static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
2391 | * initialization. | 2385 | * initialization. |
2392 | */ | 2386 | */ |
2393 | control->queue = IEEE80211_TX_QUEUE_BEACON; | 2387 | control->queue = IEEE80211_TX_QUEUE_BEACON; |
2394 | ring = rt2x00lib_get_ring(rt2x00dev, control->queue); | 2388 | queue = rt2x00queue_get_queue(rt2x00dev, control->queue); |
2395 | entry = rt2x00_get_data_entry(ring); | 2389 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
2396 | 2390 | ||
2397 | /* | 2391 | /* |
2398 | * We need to append the descriptor in front of the | 2392 | * We need to append the descriptor in front of the |
2399 | * beacon frame. | 2393 | * beacon frame. |
2400 | */ | 2394 | */ |
2401 | if (skb_headroom(skb) < TXD_DESC_SIZE) { | 2395 | if (skb_headroom(skb) < queue->desc_size) { |
2402 | if (pskb_expand_head(skb, TXD_DESC_SIZE, 0, GFP_ATOMIC)) { | 2396 | if (pskb_expand_head(skb, queue->desc_size, 0, GFP_ATOMIC)) { |
2403 | dev_kfree_skb(skb); | 2397 | dev_kfree_skb(skb); |
2404 | return -ENOMEM; | 2398 | return -ENOMEM; |
2405 | } | 2399 | } |
@@ -2408,19 +2402,19 @@ static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
2408 | /* | 2402 | /* |
2409 | * Add the descriptor in front of the skb. | 2403 | * Add the descriptor in front of the skb. |
2410 | */ | 2404 | */ |
2411 | skb_push(skb, ring->desc_size); | 2405 | skb_push(skb, queue->desc_size); |
2412 | memset(skb->data, 0, ring->desc_size); | 2406 | memset(skb->data, 0, queue->desc_size); |
2413 | 2407 | ||
2414 | /* | 2408 | /* |
2415 | * Fill in skb descriptor | 2409 | * Fill in skb descriptor |
2416 | */ | 2410 | */ |
2417 | desc = get_skb_desc(skb); | 2411 | skbdesc = get_skb_frame_desc(skb); |
2418 | desc->desc_len = ring->desc_size; | 2412 | memset(skbdesc, 0, sizeof(*skbdesc)); |
2419 | desc->data_len = skb->len - ring->desc_size; | 2413 | skbdesc->data = skb->data + queue->desc_size; |
2420 | desc->desc = skb->data; | 2414 | skbdesc->data_len = queue->data_size; |
2421 | desc->data = skb->data + ring->desc_size; | 2415 | skbdesc->desc = skb->data; |
2422 | desc->ring = ring; | 2416 | skbdesc->desc_len = queue->desc_size; |
2423 | desc->entry = entry; | 2417 | skbdesc->entry = entry; |
2424 | 2418 | ||
2425 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | 2419 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); |
2426 | 2420 | ||
@@ -2479,12 +2473,34 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = { | |||
2479 | .config = rt61pci_config, | 2473 | .config = rt61pci_config, |
2480 | }; | 2474 | }; |
2481 | 2475 | ||
2476 | static const struct data_queue_desc rt61pci_queue_rx = { | ||
2477 | .entry_num = RX_ENTRIES, | ||
2478 | .data_size = DATA_FRAME_SIZE, | ||
2479 | .desc_size = RXD_DESC_SIZE, | ||
2480 | .priv_size = sizeof(struct queue_entry_priv_pci_rx), | ||
2481 | }; | ||
2482 | |||
2483 | static const struct data_queue_desc rt61pci_queue_tx = { | ||
2484 | .entry_num = TX_ENTRIES, | ||
2485 | .data_size = DATA_FRAME_SIZE, | ||
2486 | .desc_size = TXD_DESC_SIZE, | ||
2487 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
2488 | }; | ||
2489 | |||
2490 | static const struct data_queue_desc rt61pci_queue_bcn = { | ||
2491 | .entry_num = BEACON_ENTRIES, | ||
2492 | .data_size = MGMT_FRAME_SIZE, | ||
2493 | .desc_size = TXINFO_SIZE, | ||
2494 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | ||
2495 | }; | ||
2496 | |||
2482 | static const struct rt2x00_ops rt61pci_ops = { | 2497 | static const struct rt2x00_ops rt61pci_ops = { |
2483 | .name = KBUILD_MODNAME, | 2498 | .name = KBUILD_MODNAME, |
2484 | .rxd_size = RXD_DESC_SIZE, | ||
2485 | .txd_size = TXD_DESC_SIZE, | ||
2486 | .eeprom_size = EEPROM_SIZE, | 2499 | .eeprom_size = EEPROM_SIZE, |
2487 | .rf_size = RF_SIZE, | 2500 | .rf_size = RF_SIZE, |
2501 | .rx = &rt61pci_queue_rx, | ||
2502 | .tx = &rt61pci_queue_tx, | ||
2503 | .bcn = &rt61pci_queue_bcn, | ||
2488 | .lib = &rt61pci_rt2x00_ops, | 2504 | .lib = &rt61pci_rt2x00_ops, |
2489 | .hw = &rt61pci_mac80211_ops, | 2505 | .hw = &rt61pci_mac80211_ops, |
2490 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 2506 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h index e4578fbdb361..10519f8c5783 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.h +++ b/drivers/net/wireless/rt2x00/rt61pci.h | |||
@@ -1247,6 +1247,7 @@ struct hw_pairwise_ta_entry { | |||
1247 | * DMA descriptor defines. | 1247 | * DMA descriptor defines. |
1248 | */ | 1248 | */ |
1249 | #define TXD_DESC_SIZE ( 16 * sizeof(__le32) ) | 1249 | #define TXD_DESC_SIZE ( 16 * sizeof(__le32) ) |
1250 | #define TXINFO_SIZE ( 6 * sizeof(__le32) ) | ||
1250 | #define RXD_DESC_SIZE ( 16 * sizeof(__le32) ) | 1251 | #define RXD_DESC_SIZE ( 16 * sizeof(__le32) ) |
1251 | 1252 | ||
1252 | /* | 1253 | /* |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index 416e44943e71..4e6466b13af1 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -1234,10 +1234,10 @@ static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1234 | */ | 1234 | */ |
1235 | static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1235 | static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1236 | struct sk_buff *skb, | 1236 | struct sk_buff *skb, |
1237 | struct txdata_entry_desc *desc, | 1237 | struct txentry_desc *txdesc, |
1238 | struct ieee80211_tx_control *control) | 1238 | struct ieee80211_tx_control *control) |
1239 | { | 1239 | { |
1240 | struct skb_desc *skbdesc = get_skb_desc(skb); | 1240 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1241 | __le32 *txd = skbdesc->desc; | 1241 | __le32 *txd = skbdesc->desc; |
1242 | u32 word; | 1242 | u32 word; |
1243 | 1243 | ||
@@ -1245,19 +1245,19 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1245 | * Start writing the descriptor words. | 1245 | * Start writing the descriptor words. |
1246 | */ | 1246 | */ |
1247 | rt2x00_desc_read(txd, 1, &word); | 1247 | rt2x00_desc_read(txd, 1, &word); |
1248 | rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue); | 1248 | rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue); |
1249 | rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs); | 1249 | rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs); |
1250 | rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min); | 1250 | rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min); |
1251 | rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max); | 1251 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); |
1252 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | 1252 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
1253 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); | 1253 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); |
1254 | rt2x00_desc_write(txd, 1, word); | 1254 | rt2x00_desc_write(txd, 1, word); |
1255 | 1255 | ||
1256 | rt2x00_desc_read(txd, 2, &word); | 1256 | rt2x00_desc_read(txd, 2, &word); |
1257 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal); | 1257 | rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal); |
1258 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service); | 1258 | rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service); |
1259 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low); | 1259 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low); |
1260 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high); | 1260 | rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high); |
1261 | rt2x00_desc_write(txd, 2, word); | 1261 | rt2x00_desc_write(txd, 2, word); |
1262 | 1262 | ||
1263 | rt2x00_desc_read(txd, 5, &word); | 1263 | rt2x00_desc_read(txd, 5, &word); |
@@ -1268,24 +1268,24 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1268 | 1268 | ||
1269 | rt2x00_desc_read(txd, 0, &word); | 1269 | rt2x00_desc_read(txd, 0, &word); |
1270 | rt2x00_set_field32(&word, TXD_W0_BURST, | 1270 | rt2x00_set_field32(&word, TXD_W0_BURST, |
1271 | test_bit(ENTRY_TXD_BURST, &desc->flags)); | 1271 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); |
1272 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); | 1272 | rt2x00_set_field32(&word, TXD_W0_VALID, 1); |
1273 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, | 1273 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
1274 | test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags)); | 1274 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
1275 | rt2x00_set_field32(&word, TXD_W0_ACK, | 1275 | rt2x00_set_field32(&word, TXD_W0_ACK, |
1276 | test_bit(ENTRY_TXD_ACK, &desc->flags)); | 1276 | test_bit(ENTRY_TXD_ACK, &txdesc->flags)); |
1277 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, | 1277 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
1278 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags)); | 1278 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
1279 | rt2x00_set_field32(&word, TXD_W0_OFDM, | 1279 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
1280 | test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags)); | 1280 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1281 | rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs); | 1281 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1282 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1282 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1283 | !!(control->flags & | 1283 | !!(control->flags & |
1284 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | 1284 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); |
1285 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); | 1285 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); |
1286 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | 1286 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); |
1287 | rt2x00_set_field32(&word, TXD_W0_BURST2, | 1287 | rt2x00_set_field32(&word, TXD_W0_BURST2, |
1288 | test_bit(ENTRY_TXD_BURST, &desc->flags)); | 1288 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); |
1289 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); | 1289 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); |
1290 | rt2x00_desc_write(txd, 0, word); | 1290 | rt2x00_desc_write(txd, 0, word); |
1291 | } | 1291 | } |
@@ -1377,37 +1377,57 @@ static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1) | |||
1377 | return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset; | 1377 | return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset; |
1378 | } | 1378 | } |
1379 | 1379 | ||
1380 | static void rt73usb_fill_rxdone(struct data_entry *entry, | 1380 | static void rt73usb_fill_rxdone(struct queue_entry *entry, |
1381 | struct rxdata_entry_desc *desc) | 1381 | struct rxdone_entry_desc *rxdesc) |
1382 | { | 1382 | { |
1383 | struct skb_desc *skbdesc = get_skb_desc(entry->skb); | 1383 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1384 | __le32 *rxd = (__le32 *)entry->skb->data; | 1384 | __le32 *rxd = (__le32 *)entry->skb->data; |
1385 | struct ieee80211_hdr *hdr = | ||
1386 | (struct ieee80211_hdr *)entry->skb->data + entry->queue->desc_size; | ||
1387 | int header_size = ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control)); | ||
1385 | u32 word0; | 1388 | u32 word0; |
1386 | u32 word1; | 1389 | u32 word1; |
1387 | 1390 | ||
1388 | rt2x00_desc_read(rxd, 0, &word0); | 1391 | rt2x00_desc_read(rxd, 0, &word0); |
1389 | rt2x00_desc_read(rxd, 1, &word1); | 1392 | rt2x00_desc_read(rxd, 1, &word1); |
1390 | 1393 | ||
1391 | desc->flags = 0; | 1394 | rxdesc->flags = 0; |
1392 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1395 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1393 | desc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1396 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1394 | 1397 | ||
1395 | /* | 1398 | /* |
1396 | * Obtain the status about this packet. | 1399 | * Obtain the status about this packet. |
1397 | */ | 1400 | */ |
1398 | desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); | 1401 | rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL); |
1399 | desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1); | 1402 | rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1); |
1400 | desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); | 1403 | rxdesc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM); |
1401 | desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1404 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1402 | desc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); | 1405 | rxdesc->my_bss = !!rt2x00_get_field32(word0, RXD_W0_MY_BSS); |
1406 | |||
1407 | /* | ||
1408 | * The data behind the ieee80211 header must be | ||
1409 | * aligned on a 4 byte boundary. | ||
1410 | */ | ||
1411 | if (header_size % 4 == 0) { | ||
1412 | skb_push(entry->skb, 2); | ||
1413 | memmove(entry->skb->data, entry->skb->data + 2, | ||
1414 | entry->skb->len - 2); | ||
1415 | } | ||
1403 | 1416 | ||
1404 | /* | 1417 | /* |
1405 | * Set descriptor and data pointer. | 1418 | * Set descriptor and data pointer. |
1406 | */ | 1419 | */ |
1420 | skbdesc->data = entry->skb->data + entry->queue->desc_size; | ||
1421 | skbdesc->data_len = entry->queue->data_size; | ||
1407 | skbdesc->desc = entry->skb->data; | 1422 | skbdesc->desc = entry->skb->data; |
1408 | skbdesc->desc_len = entry->ring->desc_size; | 1423 | skbdesc->desc_len = entry->queue->desc_size; |
1409 | skbdesc->data = entry->skb->data + entry->ring->desc_size; | 1424 | |
1410 | skbdesc->data_len = desc->size; | 1425 | /* |
1426 | * Remove descriptor from skb buffer and trim the whole thing | ||
1427 | * down to only contain data. | ||
1428 | */ | ||
1429 | skb_pull(entry->skb, skbdesc->desc_len); | ||
1430 | skb_trim(entry->skb, rxdesc->size); | ||
1411 | } | 1431 | } |
1412 | 1432 | ||
1413 | /* | 1433 | /* |
@@ -1967,9 +1987,9 @@ static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
1967 | struct ieee80211_tx_control *control) | 1987 | struct ieee80211_tx_control *control) |
1968 | { | 1988 | { |
1969 | struct rt2x00_dev *rt2x00dev = hw->priv; | 1989 | struct rt2x00_dev *rt2x00dev = hw->priv; |
1970 | struct skb_desc *desc; | 1990 | struct skb_frame_desc *skbdesc; |
1971 | struct data_ring *ring; | 1991 | struct data_queue *queue; |
1972 | struct data_entry *entry; | 1992 | struct queue_entry *entry; |
1973 | int timeout; | 1993 | int timeout; |
1974 | 1994 | ||
1975 | /* | 1995 | /* |
@@ -1978,25 +1998,25 @@ static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
1978 | * initialization. | 1998 | * initialization. |
1979 | */ | 1999 | */ |
1980 | control->queue = IEEE80211_TX_QUEUE_BEACON; | 2000 | control->queue = IEEE80211_TX_QUEUE_BEACON; |
1981 | ring = rt2x00lib_get_ring(rt2x00dev, control->queue); | 2001 | queue = rt2x00queue_get_queue(rt2x00dev, control->queue); |
1982 | entry = rt2x00_get_data_entry(ring); | 2002 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
1983 | 2003 | ||
1984 | /* | 2004 | /* |
1985 | * Add the descriptor in front of the skb. | 2005 | * Add the descriptor in front of the skb. |
1986 | */ | 2006 | */ |
1987 | skb_push(skb, ring->desc_size); | 2007 | skb_push(skb, queue->desc_size); |
1988 | memset(skb->data, 0, ring->desc_size); | 2008 | memset(skb->data, 0, queue->desc_size); |
1989 | 2009 | ||
1990 | /* | 2010 | /* |
1991 | * Fill in skb descriptor | 2011 | * Fill in skb descriptor |
1992 | */ | 2012 | */ |
1993 | desc = get_skb_desc(skb); | 2013 | skbdesc = get_skb_frame_desc(skb); |
1994 | desc->desc_len = ring->desc_size; | 2014 | memset(skbdesc, 0, sizeof(*skbdesc)); |
1995 | desc->data_len = skb->len - ring->desc_size; | 2015 | skbdesc->data = skb->data + queue->desc_size; |
1996 | desc->desc = skb->data; | 2016 | skbdesc->data_len = queue->data_size; |
1997 | desc->data = skb->data + ring->desc_size; | 2017 | skbdesc->desc = skb->data; |
1998 | desc->ring = ring; | 2018 | skbdesc->desc_len = queue->desc_size; |
1999 | desc->entry = entry; | 2019 | skbdesc->entry = entry; |
2000 | 2020 | ||
2001 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | 2021 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); |
2002 | 2022 | ||
@@ -2057,12 +2077,34 @@ static const struct rt2x00lib_ops rt73usb_rt2x00_ops = { | |||
2057 | .config = rt73usb_config, | 2077 | .config = rt73usb_config, |
2058 | }; | 2078 | }; |
2059 | 2079 | ||
2080 | static const struct data_queue_desc rt73usb_queue_rx = { | ||
2081 | .entry_num = RX_ENTRIES, | ||
2082 | .data_size = DATA_FRAME_SIZE, | ||
2083 | .desc_size = RXD_DESC_SIZE, | ||
2084 | .priv_size = sizeof(struct queue_entry_priv_usb_rx), | ||
2085 | }; | ||
2086 | |||
2087 | static const struct data_queue_desc rt73usb_queue_tx = { | ||
2088 | .entry_num = TX_ENTRIES, | ||
2089 | .data_size = DATA_FRAME_SIZE, | ||
2090 | .desc_size = TXD_DESC_SIZE, | ||
2091 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | ||
2092 | }; | ||
2093 | |||
2094 | static const struct data_queue_desc rt73usb_queue_bcn = { | ||
2095 | .entry_num = BEACON_ENTRIES, | ||
2096 | .data_size = MGMT_FRAME_SIZE, | ||
2097 | .desc_size = TXINFO_SIZE, | ||
2098 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | ||
2099 | }; | ||
2100 | |||
2060 | static const struct rt2x00_ops rt73usb_ops = { | 2101 | static const struct rt2x00_ops rt73usb_ops = { |
2061 | .name = KBUILD_MODNAME, | 2102 | .name = KBUILD_MODNAME, |
2062 | .rxd_size = RXD_DESC_SIZE, | ||
2063 | .txd_size = TXD_DESC_SIZE, | ||
2064 | .eeprom_size = EEPROM_SIZE, | 2103 | .eeprom_size = EEPROM_SIZE, |
2065 | .rf_size = RF_SIZE, | 2104 | .rf_size = RF_SIZE, |
2105 | .rx = &rt73usb_queue_rx, | ||
2106 | .tx = &rt73usb_queue_tx, | ||
2107 | .bcn = &rt73usb_queue_bcn, | ||
2066 | .lib = &rt73usb_rt2x00_ops, | 2108 | .lib = &rt73usb_rt2x00_ops, |
2067 | .hw = &rt73usb_mac80211_ops, | 2109 | .hw = &rt73usb_mac80211_ops, |
2068 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 2110 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h index bc635908c470..da62b4f091a7 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.h +++ b/drivers/net/wireless/rt2x00/rt73usb.h | |||
@@ -867,6 +867,7 @@ struct hw_pairwise_ta_entry { | |||
867 | * DMA descriptor defines. | 867 | * DMA descriptor defines. |
868 | */ | 868 | */ |
869 | #define TXD_DESC_SIZE ( 6 * sizeof(__le32) ) | 869 | #define TXD_DESC_SIZE ( 6 * sizeof(__le32) ) |
870 | #define TXINFO_SIZE ( 6 * sizeof(__le32) ) | ||
870 | #define RXD_DESC_SIZE ( 6 * sizeof(__le32) ) | 871 | #define RXD_DESC_SIZE ( 6 * sizeof(__le32) ) |
871 | 872 | ||
872 | /* | 873 | /* |