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-rw-r--r--drivers/net/wireless/Kconfig213
-rw-r--r--drivers/net/wireless/Makefile10
-rw-r--r--drivers/net/wireless/adm8211.c30
-rw-r--r--drivers/net/wireless/airo.c43
-rw-r--r--drivers/net/wireless/airo_cs.c55
-rw-r--r--drivers/net/wireless/arlan-main.c1887
-rw-r--r--drivers/net/wireless/arlan-proc.c1253
-rw-r--r--drivers/net/wireless/arlan.h539
-rw-r--r--drivers/net/wireless/at76c50x-usb.c61
-rw-r--r--drivers/net/wireless/ath/Kconfig9
-rw-r--r--drivers/net/wireless/ath/Makefile9
-rw-r--r--drivers/net/wireless/ath/ar9170/Kconfig2
-rw-r--r--drivers/net/wireless/ath/ar9170/ar9170.h24
-rw-r--r--drivers/net/wireless/ath/ar9170/cmd.c3
-rw-r--r--drivers/net/wireless/ath/ar9170/cmd.h1
-rw-r--r--drivers/net/wireless/ath/ar9170/hw.h7
-rw-r--r--drivers/net/wireless/ath/ar9170/mac.c17
-rw-r--r--drivers/net/wireless/ath/ar9170/main.c256
-rw-r--r--drivers/net/wireless/ath/ar9170/phy.c99
-rw-r--r--drivers/net/wireless/ath/ar9170/usb.c204
-rw-r--r--drivers/net/wireless/ath/ar9170/usb.h3
-rw-r--r--drivers/net/wireless/ath/ath.h68
-rw-r--r--drivers/net/wireless/ath/ath5k/Kconfig2
-rw-r--r--drivers/net/wireless/ath/ath5k/ath5k.h68
-rw-r--r--drivers/net/wireless/ath/ath5k/attach.c34
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c267
-rw-r--r--drivers/net/wireless/ath/ath5k/base.h19
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.c41
-rw-r--r--drivers/net/wireless/ath/ath5k/eeprom.h8
-rw-r--r--drivers/net/wireless/ath/ath5k/initvals.c4
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c6
-rw-r--r--drivers/net/wireless/ath/ath5k/pcu.c292
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c235
-rw-r--r--drivers/net/wireless/ath/ath5k/qcu.c25
-rw-r--r--drivers/net/wireless/ath/ath5k/reg.h20
-rw-r--r--drivers/net/wireless/ath/ath5k/reset.c69
-rw-r--r--drivers/net/wireless/ath/ath9k/Kconfig20
-rw-r--r--drivers/net/wireless/ath/ath9k/Makefile34
-rw-r--r--drivers/net/wireless/ath/ath9k/ahb.c54
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c141
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h291
-rw-r--r--drivers/net/wireless/ath/ath9k/beacon.c162
-rw-r--r--drivers/net/wireless/ath/ath9k/btcoex.c383
-rw-r--r--drivers/net/wireless/ath/ath9k/btcoex.h66
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.c421
-rw-r--r--drivers/net/wireless/ath/ath9k/calib.h2
-rw-r--r--drivers/net/wireless/ath/ath9k/common.c299
-rw-r--r--drivers/net/wireless/ath/ath9k/common.h127
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.c272
-rw-r--r--drivers/net/wireless/ath/ath9k/debug.h79
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.h9
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_4k.c94
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_9287.c97
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom_def.c183
-rw-r--r--drivers/net/wireless/ath/ath9k/gpio.c442
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.c1496
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h108
-rw-r--r--drivers/net/wireless/ath/ath9k/init.c865
-rw-r--r--drivers/net/wireless/ath/ath9k/initvals.h101
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.c200
-rw-r--r--drivers/net/wireless/ath/ath9k/mac.h63
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c1943
-rw-r--r--drivers/net/wireless/ath/ath9k/pci.c112
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.c1036
-rw-r--r--drivers/net/wireless/ath/ath9k/phy.h45
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.c572
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.h29
-rw-r--r--drivers/net/wireless/ath/ath9k/recv.c404
-rw-r--r--drivers/net/wireless/ath/ath9k/reg.h33
-rw-r--r--drivers/net/wireless/ath/ath9k/virtual.c114
-rw-r--r--drivers/net/wireless/ath/ath9k/xmit.c465
-rw-r--r--drivers/net/wireless/ath/debug.c32
-rw-r--r--drivers/net/wireless/ath/debug.h77
-rw-r--r--drivers/net/wireless/ath/hw.c126
-rw-r--r--drivers/net/wireless/ath/reg.h27
-rw-r--r--drivers/net/wireless/ath/regd.c11
-rw-r--r--drivers/net/wireless/ath/regd.h8
-rw-r--r--drivers/net/wireless/ath/regd_common.h32
-rw-r--r--drivers/net/wireless/atmel.c16
-rw-r--r--drivers/net/wireless/atmel_cs.c51
-rw-r--r--drivers/net/wireless/atmel_pci.c2
-rw-r--r--drivers/net/wireless/b43/Kconfig8
-rw-r--r--drivers/net/wireless/b43/Makefile2
-rw-r--r--drivers/net/wireless/b43/b43.h39
-rw-r--r--drivers/net/wireless/b43/dma.c135
-rw-r--r--drivers/net/wireless/b43/dma.h11
-rw-r--r--drivers/net/wireless/b43/leds.c1
-rw-r--r--drivers/net/wireless/b43/lo.c1
-rw-r--r--drivers/net/wireless/b43/main.c119
-rw-r--r--drivers/net/wireless/b43/pcmcia.c27
-rw-r--r--drivers/net/wireless/b43/phy_a.c2
-rw-r--r--drivers/net/wireless/b43/phy_common.c45
-rw-r--r--drivers/net/wireless/b43/phy_common.h10
-rw-r--r--drivers/net/wireless/b43/phy_g.c1
-rw-r--r--drivers/net/wireless/b43/phy_lp.c733
-rw-r--r--drivers/net/wireless/b43/phy_lp.h11
-rw-r--r--drivers/net/wireless/b43/phy_n.c3036
-rw-r--r--drivers/net/wireless/b43/phy_n.h98
-rw-r--r--drivers/net/wireless/b43/pio.c103
-rw-r--r--drivers/net/wireless/b43/pio.h45
-rw-r--r--drivers/net/wireless/b43/rfkill.c10
-rw-r--r--drivers/net/wireless/b43/sdio.c1
-rw-r--r--drivers/net/wireless/b43/tables_nphy.c744
-rw-r--r--drivers/net/wireless/b43/tables_nphy.h100
-rw-r--r--drivers/net/wireless/b43/xmit.c8
-rw-r--r--drivers/net/wireless/b43/xmit.h19
-rw-r--r--drivers/net/wireless/b43legacy/Kconfig2
-rw-r--r--drivers/net/wireless/b43legacy/b43legacy.h2
-rw-r--r--drivers/net/wireless/b43legacy/dma.c38
-rw-r--r--drivers/net/wireless/b43legacy/dma.h10
-rw-r--r--drivers/net/wireless/b43legacy/leds.h2
-rw-r--r--drivers/net/wireless/b43legacy/main.c70
-rw-r--r--drivers/net/wireless/b43legacy/phy.c1
-rw-r--r--drivers/net/wireless/b43legacy/pio.c14
-rw-r--r--drivers/net/wireless/b43legacy/pio.h11
-rw-r--r--drivers/net/wireless/b43legacy/rfkill.c7
-rw-r--r--drivers/net/wireless/b43legacy/xmit.c1
-rw-r--r--drivers/net/wireless/hostap/Kconfig3
-rw-r--r--drivers/net/wireless/hostap/hostap_80211_rx.c1
-rw-r--r--drivers/net/wireless/hostap/hostap_80211_tx.c2
-rw-r--r--drivers/net/wireless/hostap/hostap_ap.c1
-rw-r--r--drivers/net/wireless/hostap/hostap_cs.c69
-rw-r--r--drivers/net/wireless/hostap/hostap_hw.c9
-rw-r--r--drivers/net/wireless/hostap/hostap_info.c1
-rw-r--r--drivers/net/wireless/hostap/hostap_ioctl.c1
-rw-r--r--drivers/net/wireless/hostap/hostap_pci.c3
-rw-r--r--drivers/net/wireless/hostap/hostap_plx.c3
-rw-r--r--drivers/net/wireless/i82586.h413
-rw-r--r--drivers/net/wireless/i82593.h229
-rw-r--r--drivers/net/wireless/ipw2x00/Kconfig11
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c155
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c189
-rw-r--r--drivers/net/wireless/ipw2x00/libipw.h10
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_geo.c1
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c110
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_rx.c2
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_wx.c1
-rw-r--r--drivers/net/wireless/iwlwifi/Kconfig42
-rw-r--r--drivers/net/wireless/iwlwifi/Makefile13
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c133
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-fh.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-hw.h16
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-led.c373
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-led.h24
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-rs.c105
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c330
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.h80
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965-hw.h7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c280
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000-hw.h18
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c548
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000-hw.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c405
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-led.c85
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-led.h32
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c609
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.h105
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c1229
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-calib.c102
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-calib.h4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h363
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c1072
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h134
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h193
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debug.h59
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c1610
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h265
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-devtrace.c44
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-devtrace.h266
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c153
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h36
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-fh.h23
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-hcmd.c46
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-helpers.h9
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-io.h59
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-led.c326
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-led.h48
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-power.c242
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-power.h5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-prph.h23
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c382
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-scan.c279
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-spectrum.c198
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-spectrum.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c298
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.h7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c357
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c653
-rw-r--r--drivers/net/wireless/iwmc3200wifi/Kconfig3
-rw-r--r--drivers/net/wireless/iwmc3200wifi/cfg80211.c83
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.c113
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.h94
-rw-r--r--drivers/net/wireless/iwmc3200wifi/debugfs.c26
-rw-r--r--drivers/net/wireless/iwmc3200wifi/eeprom.c51
-rw-r--r--drivers/net/wireless/iwmc3200wifi/eeprom.h29
-rw-r--r--drivers/net/wireless/iwmc3200wifi/fw.c9
-rw-r--r--drivers/net/wireless/iwmc3200wifi/hal.c3
-rw-r--r--drivers/net/wireless/iwmc3200wifi/iwm.h17
-rw-r--r--drivers/net/wireless/iwmc3200wifi/lmac.h10
-rw-r--r--drivers/net/wireless/iwmc3200wifi/main.c93
-rw-r--r--drivers/net/wireless/iwmc3200wifi/netdev.c10
-rw-r--r--drivers/net/wireless/iwmc3200wifi/rx.c226
-rw-r--r--drivers/net/wireless/iwmc3200wifi/sdio.c14
-rw-r--r--drivers/net/wireless/iwmc3200wifi/tx.c67
-rw-r--r--drivers/net/wireless/iwmc3200wifi/umac.h41
-rw-r--r--drivers/net/wireless/libertas/11d.c696
-rw-r--r--drivers/net/wireless/libertas/11d.h105
-rw-r--r--drivers/net/wireless/libertas/Kconfig45
-rw-r--r--drivers/net/wireless/libertas/Makefile14
-rw-r--r--drivers/net/wireless/libertas/README26
-rw-r--r--drivers/net/wireless/libertas/assoc.c535
-rw-r--r--drivers/net/wireless/libertas/assoc.h141
-rw-r--r--drivers/net/wireless/libertas/cfg.c203
-rw-r--r--drivers/net/wireless/libertas/cfg.h16
-rw-r--r--drivers/net/wireless/libertas/cmd.c720
-rw-r--r--drivers/net/wireless/libertas/cmd.h115
-rw-r--r--drivers/net/wireless/libertas/cmdresp.c138
-rw-r--r--drivers/net/wireless/libertas/debugfs.c28
-rw-r--r--drivers/net/wireless/libertas/decl.h65
-rw-r--r--drivers/net/wireless/libertas/defs.h10
-rw-r--r--drivers/net/wireless/libertas/dev.h432
-rw-r--r--drivers/net/wireless/libertas/ethtool.c86
-rw-r--r--drivers/net/wireless/libertas/host.h959
-rw-r--r--drivers/net/wireless/libertas/hostcmd.h800
-rw-r--r--drivers/net/wireless/libertas/if_cs.c77
-rw-r--r--drivers/net/wireless/libertas/if_sdio.c65
-rw-r--r--drivers/net/wireless/libertas/if_sdio.h3
-rw-r--r--drivers/net/wireless/libertas/if_spi.c145
-rw-r--r--drivers/net/wireless/libertas/if_usb.c6
-rw-r--r--drivers/net/wireless/libertas/main.c795
-rw-r--r--drivers/net/wireless/libertas/mesh.c1154
-rw-r--r--drivers/net/wireless/libertas/mesh.h110
-rw-r--r--drivers/net/wireless/libertas/persistcfg.c453
-rw-r--r--drivers/net/wireless/libertas/rx.c14
-rw-r--r--drivers/net/wireless/libertas/scan.c273
-rw-r--r--drivers/net/wireless/libertas/scan.h30
-rw-r--r--drivers/net/wireless/libertas/tx.c11
-rw-r--r--drivers/net/wireless/libertas/types.h4
-rw-r--r--drivers/net/wireless/libertas/wext.c225
-rw-r--r--drivers/net/wireless/libertas/wext.h9
-rw-r--r--drivers/net/wireless/libertas_tf/cmd.c2
-rw-r--r--drivers/net/wireless/libertas_tf/if_usb.c3
-rw-r--r--drivers/net/wireless/libertas_tf/main.c16
-rw-r--r--drivers/net/wireless/mac80211_hwsim.c284
-rw-r--r--drivers/net/wireless/mwl8k.c3236
-rw-r--r--drivers/net/wireless/netwave_cs.c1389
-rw-r--r--drivers/net/wireless/orinoco/Kconfig6
-rw-r--r--drivers/net/wireless/orinoco/fw.c7
-rw-r--r--drivers/net/wireless/orinoco/hermes_dld.c6
-rw-r--r--drivers/net/wireless/orinoco/hw.c55
-rw-r--r--drivers/net/wireless/orinoco/hw.h5
-rw-r--r--drivers/net/wireless/orinoco/main.c42
-rw-r--r--drivers/net/wireless/orinoco/orinoco.h1
-rw-r--r--drivers/net/wireless/orinoco/orinoco_cs.c42
-rw-r--r--drivers/net/wireless/orinoco/orinoco_nortel.c2
-rw-r--r--drivers/net/wireless/orinoco/orinoco_pci.c2
-rw-r--r--drivers/net/wireless/orinoco/orinoco_plx.c2
-rw-r--r--drivers/net/wireless/orinoco/orinoco_tmd.c2
-rw-r--r--drivers/net/wireless/orinoco/scan.c1
-rw-r--r--drivers/net/wireless/orinoco/spectrum_cs.c60
-rw-r--r--drivers/net/wireless/orinoco/wext.c7
-rw-r--r--drivers/net/wireless/p54/Kconfig2
-rw-r--r--drivers/net/wireless/p54/eeprom.c32
-rw-r--r--drivers/net/wireless/p54/fwio.c1
-rw-r--r--drivers/net/wireless/p54/main.c54
-rw-r--r--drivers/net/wireless/p54/p54.h8
-rw-r--r--drivers/net/wireless/p54/p54pci.c89
-rw-r--r--drivers/net/wireless/p54/p54pci.h6
-rw-r--r--drivers/net/wireless/p54/p54spi.c1
-rw-r--r--drivers/net/wireless/p54/p54usb.c4
-rw-r--r--drivers/net/wireless/p54/txrx.c4
-rw-r--r--drivers/net/wireless/prism54/isl_ioctl.c5
-rw-r--r--drivers/net/wireless/prism54/islpci_dev.c4
-rw-r--r--drivers/net/wireless/prism54/islpci_eth.c1
-rw-r--r--drivers/net/wireless/prism54/islpci_hotplug.c4
-rw-r--r--drivers/net/wireless/prism54/islpci_mgt.c1
-rw-r--r--drivers/net/wireless/prism54/islpci_mgt.h1
-rw-r--r--drivers/net/wireless/prism54/oid_mgt.c1
-rw-r--r--drivers/net/wireless/ray_cs.c404
-rw-r--r--drivers/net/wireless/rndis_wlan.c442
-rw-r--r--drivers/net/wireless/rt2x00/Kconfig109
-rw-r--r--drivers/net/wireless/rt2x00/Makefile3
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c42
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.h5
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c79
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.h5
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c213
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.h4
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h1852
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c2325
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.h150
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c1288
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.h159
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c2582
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.h1834
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h127
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00config.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00crypto.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00debug.c9
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00debug.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c42
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dump.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00firmware.c3
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00ht.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00leds.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00leds.h6
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00lib.h20
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00link.c90
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c52
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.c13
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.h27
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.c103
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00queue.h8
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00reg.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00soc.c160
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00soc.h42
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c7
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.h21
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c117
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h13
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c77
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.h6
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180.h1
-rw-r--r--drivers/net/wireless/rtl818x/rtl8180_dev.c41
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187.h9
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_dev.c53
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.c74
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.h4
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_rfkill.c4
-rw-r--r--drivers/net/wireless/strip.c2805
-rw-r--r--drivers/net/wireless/wavelan.c4383
-rw-r--r--drivers/net/wireless/wavelan.h370
-rw-r--r--drivers/net/wireless/wavelan.p.h696
-rw-r--r--drivers/net/wireless/wavelan_cs.c4635
-rw-r--r--drivers/net/wireless/wavelan_cs.h386
-rw-r--r--drivers/net/wireless/wavelan_cs.p.h766
-rw-r--r--drivers/net/wireless/wl12xx/Kconfig3
-rw-r--r--drivers/net/wireless/wl12xx/Makefile4
-rw-r--r--drivers/net/wireless/wl12xx/wl1251.h9
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_acx.c138
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_acx.h123
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_boot.c58
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_cmd.c84
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_cmd.h22
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_debugfs.c27
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_event.c15
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_init.c14
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_init.h47
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_main.c559
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_ps.c53
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_ps.h1
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_reg.h6
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_rx.c9
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_spi.c5
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_tx.c9
-rw-r--r--drivers/net/wireless/wl12xx/wl1251_tx.h17
-rw-r--r--drivers/net/wireless/wl12xx/wl1271.h150
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_acx.c414
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_acx.h602
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_boot.c251
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_boot.h22
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.c473
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_cmd.h151
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_conf.h795
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_debugfs.c63
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_event.c157
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_event.h35
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_init.c184
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_init.h87
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_io.c213
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_io.h68
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_main.c1439
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_ps.c77
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_ps.h5
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_reg.h146
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_rx.c91
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_rx.h4
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_spi.c254
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_spi.h61
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_testmode.c284
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_testmode.h (renamed from drivers/net/wireless/wl12xx/wl1251_netlink.h)17
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_tx.c135
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_tx.h54
-rw-r--r--drivers/net/wireless/wl12xx/wl12xx_80211.h4
-rw-r--r--drivers/net/wireless/wl3501_cs.c76
-rw-r--r--drivers/net/wireless/zd1201.c18
-rw-r--r--drivers/net/wireless/zd1211rw/Kconfig2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.c145
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h21
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c229
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.h25
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_uw2453.c1
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.c27
394 files changed, 40408 insertions, 44456 deletions
diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig
index d7a764a2fc1a..588943660755 100644
--- a/drivers/net/wireless/Kconfig
+++ b/drivers/net/wireless/Kconfig
@@ -5,6 +5,7 @@
5menuconfig WLAN 5menuconfig WLAN
6 bool "Wireless LAN" 6 bool "Wireless LAN"
7 depends on !S390 7 depends on !S390
8 select WIRELESS
8 default y 9 default y
9 ---help--- 10 ---help---
10 This section contains all the pre 802.11 and 802.11 wireless 11 This section contains all the pre 802.11 and 802.11 wireless
@@ -15,114 +16,12 @@ menuconfig WLAN
15 16
16if WLAN 17if WLAN
17 18
18menuconfig WLAN_PRE80211
19 bool "Wireless LAN (pre-802.11)"
20 depends on NETDEVICES
21 ---help---
22 Say Y if you have any pre-802.11 wireless LAN hardware.
23
24 This option does not affect the kernel build, it only
25 lets you choose drivers.
26
27config STRIP
28 tristate "STRIP (Metricom starmode radio IP)"
29 depends on INET && WLAN_PRE80211
30 select WIRELESS_EXT
31 ---help---
32 Say Y if you have a Metricom radio and intend to use Starmode Radio
33 IP. STRIP is a radio protocol developed for the MosquitoNet project
34 to send Internet traffic using Metricom radios. Metricom radios are
35 small, battery powered, 100kbit/sec packet radio transceivers, about
36 the size and weight of a cellular telephone. (You may also have heard
37 them called "Metricom modems" but we avoid the term "modem" because
38 it misleads many people into thinking that you can plug a Metricom
39 modem into a phone line and use it as a modem.)
40
41 You can use STRIP on any Linux machine with a serial port, although
42 it is obviously most useful for people with laptop computers. If you
43 think you might get a Metricom radio in the future, there is no harm
44 in saying Y to STRIP now, except that it makes the kernel a bit
45 bigger.
46
47 To compile this as a module, choose M here: the module will be
48 called strip.
49
50config ARLAN
51 tristate "Aironet Arlan 655 & IC2200 DS support"
52 depends on ISA && !64BIT && WLAN_PRE80211
53 select WIRELESS_EXT
54 ---help---
55 Aironet makes Arlan, a class of wireless LAN adapters. These use the
56 www.Telxon.com chip, which is also used on several similar cards.
57 This driver is tested on the 655 and IC2200 series cards. Look at
58 <http://www.ylenurme.ee/~elmer/655/> for the latest information.
59
60 The driver is built as two modules, arlan and arlan-proc. The latter
61 is the /proc interface and is not needed most of time.
62
63 On some computers the card ends up in non-valid state after some
64 time. Use a ping-reset script to clear it.
65
66config WAVELAN
67 tristate "AT&T/Lucent old WaveLAN & DEC RoamAbout DS ISA support"
68 depends on ISA && WLAN_PRE80211
69 select WIRELESS_EXT
70 ---help---
71 The Lucent WaveLAN (formerly NCR and AT&T; or DEC RoamAbout DS) is
72 a Radio LAN (wireless Ethernet-like Local Area Network) using the
73 radio frequencies 900 MHz and 2.4 GHz.
74
75 If you want to use an ISA WaveLAN card under Linux, say Y and read
76 the Ethernet-HOWTO, available from
77 <http://www.tldp.org/docs.html#howto>. Some more specific
78 information is contained in
79 <file:Documentation/networking/wavelan.txt> and in the source code
80 <file:drivers/net/wireless/wavelan.p.h>.
81
82 You will also need the wireless tools package available from
83 <http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Tools.html>.
84 Please read the man pages contained therein.
85
86 To compile this driver as a module, choose M here: the module will be
87 called wavelan.
88
89config PCMCIA_WAVELAN
90 tristate "AT&T/Lucent old WaveLAN Pcmcia wireless support"
91 depends on PCMCIA && WLAN_PRE80211
92 select WIRELESS_EXT
93 help
94 Say Y here if you intend to attach an AT&T/Lucent Wavelan PCMCIA
95 (PC-card) wireless Ethernet networking card to your computer. This
96 driver is for the non-IEEE-802.11 Wavelan cards.
97
98 To compile this driver as a module, choose M here: the module will be
99 called wavelan_cs. If unsure, say N.
100
101config PCMCIA_NETWAVE
102 tristate "Xircom Netwave AirSurfer Pcmcia wireless support"
103 depends on PCMCIA && WLAN_PRE80211
104 select WIRELESS_EXT
105 help
106 Say Y here if you intend to attach this type of PCMCIA (PC-card)
107 wireless Ethernet networking card to your computer.
108
109 To compile this driver as a module, choose M here: the module will be
110 called netwave_cs. If unsure, say N.
111
112
113menuconfig WLAN_80211
114 bool "Wireless LAN (IEEE 802.11)"
115 depends on NETDEVICES
116 ---help---
117 Say Y if you have any 802.11 wireless LAN hardware.
118
119 This option does not affect the kernel build, it only
120 lets you choose drivers.
121
122config PCMCIA_RAYCS 19config PCMCIA_RAYCS
123 tristate "Aviator/Raytheon 2.4GHz wireless support" 20 tristate "Aviator/Raytheon 2.4GHz wireless support"
124 depends on PCMCIA && WLAN_80211 21 depends on PCMCIA
125 select WIRELESS_EXT 22 select WIRELESS_EXT
23 select WEXT_SPY
24 select WEXT_PRIV
126 ---help--- 25 ---help---
127 Say Y here if you intend to attach an Aviator/Raytheon PCMCIA 26 Say Y here if you intend to attach an Aviator/Raytheon PCMCIA
128 (PC-card) wireless Ethernet networking card to your computer. 27 (PC-card) wireless Ethernet networking card to your computer.
@@ -132,49 +31,9 @@ config PCMCIA_RAYCS
132 To compile this driver as a module, choose M here: the module will be 31 To compile this driver as a module, choose M here: the module will be
133 called ray_cs. If unsure, say N. 32 called ray_cs. If unsure, say N.
134 33
135config LIBERTAS
136 tristate "Marvell 8xxx Libertas WLAN driver support"
137 depends on WLAN_80211
138 select WIRELESS_EXT
139 select LIB80211
140 select FW_LOADER
141 ---help---
142 A library for Marvell Libertas 8xxx devices.
143
144config LIBERTAS_USB
145 tristate "Marvell Libertas 8388 USB 802.11b/g cards"
146 depends on LIBERTAS && USB
147 ---help---
148 A driver for Marvell Libertas 8388 USB devices.
149
150config LIBERTAS_CS
151 tristate "Marvell Libertas 8385 CompactFlash 802.11b/g cards"
152 depends on LIBERTAS && PCMCIA
153 select FW_LOADER
154 ---help---
155 A driver for Marvell Libertas 8385 CompactFlash devices.
156
157config LIBERTAS_SDIO
158 tristate "Marvell Libertas 8385/8686/8688 SDIO 802.11b/g cards"
159 depends on LIBERTAS && MMC
160 ---help---
161 A driver for Marvell Libertas 8385/8686/8688 SDIO devices.
162
163config LIBERTAS_SPI
164 tristate "Marvell Libertas 8686 SPI 802.11b/g cards"
165 depends on LIBERTAS && SPI
166 ---help---
167 A driver for Marvell Libertas 8686 SPI devices.
168
169config LIBERTAS_DEBUG
170 bool "Enable full debugging output in the Libertas module."
171 depends on LIBERTAS
172 ---help---
173 Debugging support.
174
175config LIBERTAS_THINFIRM 34config LIBERTAS_THINFIRM
176 tristate "Marvell 8xxx Libertas WLAN driver support with thin firmware" 35 tristate "Marvell 8xxx Libertas WLAN driver support with thin firmware"
177 depends on WLAN_80211 && MAC80211 36 depends on MAC80211
178 select FW_LOADER 37 select FW_LOADER
179 ---help--- 38 ---help---
180 A library for Marvell Libertas 8xxx devices using thinfirm. 39 A library for Marvell Libertas 8xxx devices using thinfirm.
@@ -187,9 +46,11 @@ config LIBERTAS_THINFIRM_USB
187 46
188config AIRO 47config AIRO
189 tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards" 48 tristate "Cisco/Aironet 34X/35X/4500/4800 ISA and PCI cards"
190 depends on ISA_DMA_API && WLAN_80211 && (PCI || BROKEN) 49 depends on ISA_DMA_API && (PCI || BROKEN)
191 select WIRELESS_EXT 50 select WIRELESS_EXT
192 select CRYPTO 51 select CRYPTO
52 select WEXT_SPY
53 select WEXT_PRIV
193 ---help--- 54 ---help---
194 This is the standard Linux driver to support Cisco/Aironet ISA and 55 This is the standard Linux driver to support Cisco/Aironet ISA and
195 PCI 802.11 wireless cards. 56 PCI 802.11 wireless cards.
@@ -205,8 +66,9 @@ config AIRO
205 66
206config ATMEL 67config ATMEL
207 tristate "Atmel at76c50x chipset 802.11b support" 68 tristate "Atmel at76c50x chipset 802.11b support"
208 depends on (PCI || PCMCIA) && WLAN_80211 69 depends on (PCI || PCMCIA)
209 select WIRELESS_EXT 70 select WIRELESS_EXT
71 select WEXT_PRIV
210 select FW_LOADER 72 select FW_LOADER
211 select CRC32 73 select CRC32
212 ---help--- 74 ---help---
@@ -239,7 +101,7 @@ config PCMCIA_ATMEL
239 101
240config AT76C50X_USB 102config AT76C50X_USB
241 tristate "Atmel at76c503/at76c505/at76c505a USB cards" 103 tristate "Atmel at76c503/at76c505/at76c505a USB cards"
242 depends on MAC80211 && WLAN_80211 && USB 104 depends on MAC80211 && USB
243 select FW_LOADER 105 select FW_LOADER
244 ---help--- 106 ---help---
245 Enable support for USB Wireless devices using Atmel at76c503, 107 Enable support for USB Wireless devices using Atmel at76c503,
@@ -247,8 +109,10 @@ config AT76C50X_USB
247 109
248config AIRO_CS 110config AIRO_CS
249 tristate "Cisco/Aironet 34X/35X/4500/4800 PCMCIA cards" 111 tristate "Cisco/Aironet 34X/35X/4500/4800 PCMCIA cards"
250 depends on PCMCIA && (BROKEN || !M32R) && WLAN_80211 112 depends on PCMCIA && (BROKEN || !M32R)
251 select WIRELESS_EXT 113 select WIRELESS_EXT
114 select WEXT_SPY
115 select WEXT_PRIV
252 select CRYPTO 116 select CRYPTO
253 select CRYPTO_AES 117 select CRYPTO_AES
254 ---help--- 118 ---help---
@@ -266,18 +130,21 @@ config AIRO_CS
266 Cisco Linux utilities can be used to configure the card. 130 Cisco Linux utilities can be used to configure the card.
267 131
268config PCMCIA_WL3501 132config PCMCIA_WL3501
269 tristate "Planet WL3501 PCMCIA cards" 133 tristate "Planet WL3501 PCMCIA cards"
270 depends on EXPERIMENTAL && PCMCIA && WLAN_80211 134 depends on EXPERIMENTAL && PCMCIA
271 select WIRELESS_EXT 135 select WIRELESS_EXT
272 ---help--- 136 select WEXT_SPY
273 A driver for WL3501 PCMCIA 802.11 wireless cards made by Planet. 137 help
274 It has basic support for Linux wireless extensions and initial 138 A driver for WL3501 PCMCIA 802.11 wireless cards made by Planet.
275 micro support for ethtool. 139 It has basic support for Linux wireless extensions and initial
140 micro support for ethtool.
276 141
277config PRISM54 142config PRISM54
278 tristate 'Intersil Prism GT/Duette/Indigo PCI/Cardbus (DEPRECATED)' 143 tristate 'Intersil Prism GT/Duette/Indigo PCI/Cardbus (DEPRECATED)'
279 depends on PCI && EXPERIMENTAL && WLAN_80211 144 depends on PCI && EXPERIMENTAL
280 select WIRELESS_EXT 145 select WIRELESS_EXT
146 select WEXT_SPY
147 select WEXT_PRIV
281 select FW_LOADER 148 select FW_LOADER
282 ---help--- 149 ---help---
283 This enables support for FullMAC PCI/Cardbus prism54 devices. This 150 This enables support for FullMAC PCI/Cardbus prism54 devices. This
@@ -298,8 +165,9 @@ config PRISM54
298 165
299config USB_ZD1201 166config USB_ZD1201
300 tristate "USB ZD1201 based Wireless device support" 167 tristate "USB ZD1201 based Wireless device support"
301 depends on USB && WLAN_80211 168 depends on USB
302 select WIRELESS_EXT 169 select WIRELESS_EXT
170 select WEXT_PRIV
303 select FW_LOADER 171 select FW_LOADER
304 ---help--- 172 ---help---
305 Say Y if you want to use wireless LAN adapters based on the ZyDAS 173 Say Y if you want to use wireless LAN adapters based on the ZyDAS
@@ -316,7 +184,7 @@ config USB_ZD1201
316 184
317config USB_NET_RNDIS_WLAN 185config USB_NET_RNDIS_WLAN
318 tristate "Wireless RNDIS USB support" 186 tristate "Wireless RNDIS USB support"
319 depends on USB && WLAN_80211 && EXPERIMENTAL 187 depends on USB && EXPERIMENTAL
320 depends on CFG80211 188 depends on CFG80211
321 select USB_USBNET 189 select USB_USBNET
322 select USB_NET_CDCETHER 190 select USB_NET_CDCETHER
@@ -344,7 +212,7 @@ config USB_NET_RNDIS_WLAN
344 212
345config RTL8180 213config RTL8180
346 tristate "Realtek 8180/8185 PCI support" 214 tristate "Realtek 8180/8185 PCI support"
347 depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL 215 depends on MAC80211 && PCI && EXPERIMENTAL
348 select EEPROM_93CX6 216 select EEPROM_93CX6
349 ---help--- 217 ---help---
350 This is a driver for RTL8180 and RTL8185 based cards. 218 This is a driver for RTL8180 and RTL8185 based cards.
@@ -400,7 +268,7 @@ config RTL8180
400 268
401config RTL8187 269config RTL8187
402 tristate "Realtek 8187 and 8187B USB support" 270 tristate "Realtek 8187 and 8187B USB support"
403 depends on MAC80211 && USB && WLAN_80211 271 depends on MAC80211 && USB
404 select EEPROM_93CX6 272 select EEPROM_93CX6
405 ---help--- 273 ---help---
406 This is a driver for RTL8187 and RTL8187B based cards. 274 This is a driver for RTL8187 and RTL8187B based cards.
@@ -429,7 +297,7 @@ config RTL8187_LEDS
429 297
430config ADM8211 298config ADM8211
431 tristate "ADMtek ADM8211 support" 299 tristate "ADMtek ADM8211 support"
432 depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL 300 depends on MAC80211 && PCI && EXPERIMENTAL
433 select CRC32 301 select CRC32
434 select EEPROM_93CX6 302 select EEPROM_93CX6
435 ---help--- 303 ---help---
@@ -456,7 +324,7 @@ config ADM8211
456 324
457config MAC80211_HWSIM 325config MAC80211_HWSIM
458 tristate "Simulated radio testing tool for mac80211" 326 tristate "Simulated radio testing tool for mac80211"
459 depends on MAC80211 && WLAN_80211 327 depends on MAC80211
460 ---help--- 328 ---help---
461 This driver is a developer testing tool that can be used to test 329 This driver is a developer testing tool that can be used to test
462 IEEE 802.11 networking stack (mac80211) functionality. This is not 330 IEEE 802.11 networking stack (mac80211) functionality. This is not
@@ -469,24 +337,25 @@ config MAC80211_HWSIM
469 337
470config MWL8K 338config MWL8K
471 tristate "Marvell 88W8xxx PCI/PCIe Wireless support" 339 tristate "Marvell 88W8xxx PCI/PCIe Wireless support"
472 depends on MAC80211 && PCI && WLAN_80211 && EXPERIMENTAL 340 depends on MAC80211 && PCI && EXPERIMENTAL
473 ---help--- 341 ---help---
474 This driver supports Marvell TOPDOG 802.11 wireless cards. 342 This driver supports Marvell TOPDOG 802.11 wireless cards.
475 343
476 To compile this driver as a module, choose M here: the module 344 To compile this driver as a module, choose M here: the module
477 will be called mwl8k. If unsure, say N. 345 will be called mwl8k. If unsure, say N.
478 346
479source "drivers/net/wireless/p54/Kconfig"
480source "drivers/net/wireless/ath/Kconfig" 347source "drivers/net/wireless/ath/Kconfig"
481source "drivers/net/wireless/ipw2x00/Kconfig"
482source "drivers/net/wireless/iwlwifi/Kconfig"
483source "drivers/net/wireless/hostap/Kconfig"
484source "drivers/net/wireless/b43/Kconfig" 348source "drivers/net/wireless/b43/Kconfig"
485source "drivers/net/wireless/b43legacy/Kconfig" 349source "drivers/net/wireless/b43legacy/Kconfig"
486source "drivers/net/wireless/zd1211rw/Kconfig" 350source "drivers/net/wireless/hostap/Kconfig"
487source "drivers/net/wireless/rt2x00/Kconfig" 351source "drivers/net/wireless/ipw2x00/Kconfig"
352source "drivers/net/wireless/iwlwifi/Kconfig"
353source "drivers/net/wireless/iwmc3200wifi/Kconfig"
354source "drivers/net/wireless/libertas/Kconfig"
488source "drivers/net/wireless/orinoco/Kconfig" 355source "drivers/net/wireless/orinoco/Kconfig"
356source "drivers/net/wireless/p54/Kconfig"
357source "drivers/net/wireless/rt2x00/Kconfig"
489source "drivers/net/wireless/wl12xx/Kconfig" 358source "drivers/net/wireless/wl12xx/Kconfig"
490source "drivers/net/wireless/iwmc3200wifi/Kconfig" 359source "drivers/net/wireless/zd1211rw/Kconfig"
491 360
492endif # WLAN 361endif # WLAN
diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile
index 7a4647e78fd3..5d4ce4d2b32b 100644
--- a/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@ -5,16 +5,6 @@
5obj-$(CONFIG_IPW2100) += ipw2x00/ 5obj-$(CONFIG_IPW2100) += ipw2x00/
6obj-$(CONFIG_IPW2200) += ipw2x00/ 6obj-$(CONFIG_IPW2200) += ipw2x00/
7 7
8obj-$(CONFIG_STRIP) += strip.o
9obj-$(CONFIG_ARLAN) += arlan.o
10
11arlan-objs := arlan-main.o arlan-proc.o
12
13# Obsolete cards
14obj-$(CONFIG_WAVELAN) += wavelan.o
15obj-$(CONFIG_PCMCIA_NETWAVE) += netwave_cs.o
16obj-$(CONFIG_PCMCIA_WAVELAN) += wavelan_cs.o
17
18obj-$(CONFIG_HERMES) += orinoco/ 8obj-$(CONFIG_HERMES) += orinoco/
19 9
20obj-$(CONFIG_AIRO) += airo.o 10obj-$(CONFIG_AIRO) += airo.o
diff --git a/drivers/net/wireless/adm8211.c b/drivers/net/wireless/adm8211.c
index b80f514877d8..ab61d2b558d6 100644
--- a/drivers/net/wireless/adm8211.c
+++ b/drivers/net/wireless/adm8211.c
@@ -18,6 +18,7 @@
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/if.h> 19#include <linux/if.h>
20#include <linux/skbuff.h> 20#include <linux/skbuff.h>
21#include <linux/slab.h>
21#include <linux/etherdevice.h> 22#include <linux/etherdevice.h>
22#include <linux/pci.h> 23#include <linux/pci.h>
23#include <linux/delay.h> 24#include <linux/delay.h>
@@ -39,7 +40,7 @@ static unsigned int rx_ring_size __read_mostly = 16;
39module_param(tx_ring_size, uint, 0); 40module_param(tx_ring_size, uint, 0);
40module_param(rx_ring_size, uint, 0); 41module_param(rx_ring_size, uint, 0);
41 42
42static struct pci_device_id adm8211_pci_id_table[] __devinitdata = { 43static DEFINE_PCI_DEVICE_TABLE(adm8211_pci_id_table) = {
43 /* ADMtek ADM8211 */ 44 /* ADMtek ADM8211 */
44 { PCI_DEVICE(0x10B7, 0x6000) }, /* 3Com 3CRSHPW796 */ 45 { PCI_DEVICE(0x10B7, 0x6000) }, /* 3Com 3CRSHPW796 */
45 { PCI_DEVICE(0x1200, 0x8201) }, /* ? */ 46 { PCI_DEVICE(0x1200, 0x8201) }, /* ? */
@@ -302,18 +303,6 @@ static int adm8211_get_stats(struct ieee80211_hw *dev,
302 return 0; 303 return 0;
303} 304}
304 305
305static int adm8211_get_tx_stats(struct ieee80211_hw *dev,
306 struct ieee80211_tx_queue_stats *stats)
307{
308 struct adm8211_priv *priv = dev->priv;
309
310 stats[0].len = priv->cur_tx - priv->dirty_tx;
311 stats[0].limit = priv->tx_ring_size - 2;
312 stats[0].count = priv->dirty_tx;
313
314 return 0;
315}
316
317static void adm8211_interrupt_tci(struct ieee80211_hw *dev) 306static void adm8211_interrupt_tci(struct ieee80211_hw *dev)
318{ 307{
319 struct adm8211_priv *priv = dev->priv; 308 struct adm8211_priv *priv = dev->priv;
@@ -1400,15 +1389,15 @@ static void adm8211_configure_filter(struct ieee80211_hw *dev,
1400} 1389}
1401 1390
1402static int adm8211_add_interface(struct ieee80211_hw *dev, 1391static int adm8211_add_interface(struct ieee80211_hw *dev,
1403 struct ieee80211_if_init_conf *conf) 1392 struct ieee80211_vif *vif)
1404{ 1393{
1405 struct adm8211_priv *priv = dev->priv; 1394 struct adm8211_priv *priv = dev->priv;
1406 if (priv->mode != NL80211_IFTYPE_MONITOR) 1395 if (priv->mode != NL80211_IFTYPE_MONITOR)
1407 return -EOPNOTSUPP; 1396 return -EOPNOTSUPP;
1408 1397
1409 switch (conf->type) { 1398 switch (vif->type) {
1410 case NL80211_IFTYPE_STATION: 1399 case NL80211_IFTYPE_STATION:
1411 priv->mode = conf->type; 1400 priv->mode = vif->type;
1412 break; 1401 break;
1413 default: 1402 default:
1414 return -EOPNOTSUPP; 1403 return -EOPNOTSUPP;
@@ -1416,8 +1405,8 @@ static int adm8211_add_interface(struct ieee80211_hw *dev,
1416 1405
1417 ADM8211_IDLE(); 1406 ADM8211_IDLE();
1418 1407
1419 ADM8211_CSR_WRITE(PAR0, le32_to_cpu(*(__le32 *)conf->mac_addr)); 1408 ADM8211_CSR_WRITE(PAR0, le32_to_cpu(*(__le32 *)vif->addr));
1420 ADM8211_CSR_WRITE(PAR1, le16_to_cpu(*(__le16 *)(conf->mac_addr + 4))); 1409 ADM8211_CSR_WRITE(PAR1, le16_to_cpu(*(__le16 *)(vif->addr + 4)));
1421 1410
1422 adm8211_update_mode(dev); 1411 adm8211_update_mode(dev);
1423 1412
@@ -1427,7 +1416,7 @@ static int adm8211_add_interface(struct ieee80211_hw *dev,
1427} 1416}
1428 1417
1429static void adm8211_remove_interface(struct ieee80211_hw *dev, 1418static void adm8211_remove_interface(struct ieee80211_hw *dev,
1430 struct ieee80211_if_init_conf *conf) 1419 struct ieee80211_vif *vif)
1431{ 1420{
1432 struct adm8211_priv *priv = dev->priv; 1421 struct adm8211_priv *priv = dev->priv;
1433 priv->mode = NL80211_IFTYPE_MONITOR; 1422 priv->mode = NL80211_IFTYPE_MONITOR;
@@ -1538,7 +1527,7 @@ static int adm8211_start(struct ieee80211_hw *dev)
1538 adm8211_hw_init(dev); 1527 adm8211_hw_init(dev);
1539 adm8211_rf_set_channel(dev, priv->channel); 1528 adm8211_rf_set_channel(dev, priv->channel);
1540 1529
1541 retval = request_irq(priv->pdev->irq, &adm8211_interrupt, 1530 retval = request_irq(priv->pdev->irq, adm8211_interrupt,
1542 IRQF_SHARED, "adm8211", dev); 1531 IRQF_SHARED, "adm8211", dev);
1543 if (retval) { 1532 if (retval) {
1544 printk(KERN_ERR "%s: failed to register IRQ handler\n", 1533 printk(KERN_ERR "%s: failed to register IRQ handler\n",
@@ -1773,7 +1762,6 @@ static const struct ieee80211_ops adm8211_ops = {
1773 .prepare_multicast = adm8211_prepare_multicast, 1762 .prepare_multicast = adm8211_prepare_multicast,
1774 .configure_filter = adm8211_configure_filter, 1763 .configure_filter = adm8211_configure_filter,
1775 .get_stats = adm8211_get_stats, 1764 .get_stats = adm8211_get_stats,
1776 .get_tx_stats = adm8211_get_tx_stats,
1777 .get_tsf = adm8211_get_tsft 1765 .get_tsf = adm8211_get_tsft
1778}; 1766};
1779 1767
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index abf896a7390e..dc5018a6d9ed 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -51,13 +51,14 @@
51#include <linux/freezer.h> 51#include <linux/freezer.h>
52 52
53#include <linux/ieee80211.h> 53#include <linux/ieee80211.h>
54#include <net/iw_handler.h>
54 55
55#include "airo.h" 56#include "airo.h"
56 57
57#define DRV_NAME "airo" 58#define DRV_NAME "airo"
58 59
59#ifdef CONFIG_PCI 60#ifdef CONFIG_PCI
60static struct pci_device_id card_ids[] = { 61static DEFINE_PCI_DEVICE_TABLE(card_ids) = {
61 { 0x14b9, 1, PCI_ANY_ID, PCI_ANY_ID, }, 62 { 0x14b9, 1, PCI_ANY_ID, PCI_ANY_ID, },
62 { 0x14b9, 0x4500, PCI_ANY_ID, PCI_ANY_ID }, 63 { 0x14b9, 0x4500, PCI_ANY_ID, PCI_ANY_ID },
63 { 0x14b9, 0x4800, PCI_ANY_ID, PCI_ANY_ID, }, 64 { 0x14b9, 0x4800, PCI_ANY_ID, PCI_ANY_ID, },
@@ -2310,7 +2311,7 @@ static void airo_set_multicast_list(struct net_device *dev) {
2310 airo_set_promisc(ai); 2311 airo_set_promisc(ai);
2311 } 2312 }
2312 2313
2313 if ((dev->flags&IFF_ALLMULTI)||dev->mc_count>0) { 2314 if ((dev->flags&IFF_ALLMULTI) || !netdev_mc_empty(dev)) {
2314 /* Turn on multicast. (Should be already setup...) */ 2315 /* Turn on multicast. (Should be already setup...) */
2315 } 2316 }
2316} 2317}
@@ -4806,7 +4807,7 @@ static int airo_config_commit(struct net_device *dev,
4806 4807
4807static inline int sniffing_mode(struct airo_info *ai) 4808static inline int sniffing_mode(struct airo_info *ai)
4808{ 4809{
4809 return le16_to_cpu(ai->config.rmode & RXMODE_MASK) >= 4810 return (le16_to_cpu(ai->config.rmode) & le16_to_cpu(RXMODE_MASK)) >=
4810 le16_to_cpu(RXMODE_RFMON); 4811 le16_to_cpu(RXMODE_RFMON);
4811} 4812}
4812 4813
@@ -5254,11 +5255,8 @@ static int set_wep_key(struct airo_info *ai, u16 index, const char *key,
5254 WepKeyRid wkr; 5255 WepKeyRid wkr;
5255 int rc; 5256 int rc;
5256 5257
5257 if (keylen == 0) { 5258 if (WARN_ON(keylen == 0))
5258 airo_print_err(ai->dev->name, "%s: key length to set was zero",
5259 __func__);
5260 return -1; 5259 return -1;
5261 }
5262 5260
5263 memset(&wkr, 0, sizeof(wkr)); 5261 memset(&wkr, 0, sizeof(wkr));
5264 wkr.len = cpu_to_le16(sizeof(wkr)); 5262 wkr.len = cpu_to_le16(sizeof(wkr));
@@ -5659,7 +5657,8 @@ static int airo_pci_suspend(struct pci_dev *pdev, pm_message_t state)
5659 5657
5660 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1); 5658 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
5661 pci_save_state(pdev); 5659 pci_save_state(pdev);
5662 return pci_set_power_state(pdev, pci_choose_state(pdev, state)); 5660 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5661 return 0;
5663} 5662}
5664 5663
5665static int airo_pci_resume(struct pci_dev *pdev) 5664static int airo_pci_resume(struct pci_dev *pdev)
@@ -6404,11 +6403,7 @@ static int airo_set_encode(struct net_device *dev,
6404 if (dwrq->length > MIN_KEY_SIZE) 6403 if (dwrq->length > MIN_KEY_SIZE)
6405 key.len = MAX_KEY_SIZE; 6404 key.len = MAX_KEY_SIZE;
6406 else 6405 else
6407 if (dwrq->length > 0) 6406 key.len = MIN_KEY_SIZE;
6408 key.len = MIN_KEY_SIZE;
6409 else
6410 /* Disable the key */
6411 key.len = 0;
6412 /* Check if the key is not marked as invalid */ 6407 /* Check if the key is not marked as invalid */
6413 if(!(dwrq->flags & IW_ENCODE_NOKEY)) { 6408 if(!(dwrq->flags & IW_ENCODE_NOKEY)) {
6414 /* Cleanup */ 6409 /* Cleanup */
@@ -6589,12 +6584,22 @@ static int airo_set_encodeext(struct net_device *dev,
6589 default: 6584 default:
6590 return -EINVAL; 6585 return -EINVAL;
6591 } 6586 }
6592 /* Send the key to the card */ 6587 if (key.len == 0) {
6593 rc = set_wep_key(local, idx, key.key, key.len, perm, 1); 6588 rc = set_wep_tx_idx(local, idx, perm, 1);
6594 if (rc < 0) { 6589 if (rc < 0) {
6595 airo_print_err(local->dev->name, "failed to set WEP key" 6590 airo_print_err(local->dev->name,
6596 " at index %d: %d.", idx, rc); 6591 "failed to set WEP transmit index to %d: %d.",
6597 return rc; 6592 idx, rc);
6593 return rc;
6594 }
6595 } else {
6596 rc = set_wep_key(local, idx, key.key, key.len, perm, 1);
6597 if (rc < 0) {
6598 airo_print_err(local->dev->name,
6599 "failed to set WEP key at index %d: %d.",
6600 idx, rc);
6601 return rc;
6602 }
6598 } 6603 }
6599 } 6604 }
6600 6605
diff --git a/drivers/net/wireless/airo_cs.c b/drivers/net/wireless/airo_cs.c
index d0593ed9170e..f6036fb42319 100644
--- a/drivers/net/wireless/airo_cs.c
+++ b/drivers/net/wireless/airo_cs.c
@@ -43,21 +43,6 @@
43 43
44#include "airo.h" 44#include "airo.h"
45 45
46/*
47 All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
48 you do not define PCMCIA_DEBUG at all, all the debug code will be
49 left out. If you compile with PCMCIA_DEBUG=0, the debug code will
50 be present but disabled -- but it can then be enabled for specific
51 modules at load time with a 'pc_debug=#' option to insmod.
52*/
53#ifdef PCMCIA_DEBUG
54static int pc_debug = PCMCIA_DEBUG;
55module_param(pc_debug, int, 0);
56static char *version = "$Revision: 1.2 $";
57#define DEBUG(n, args...) if (pc_debug > (n)) printk(KERN_DEBUG args);
58#else
59#define DEBUG(n, args...)
60#endif
61 46
62/*====================================================================*/ 47/*====================================================================*/
63 48
@@ -145,11 +130,10 @@ static int airo_probe(struct pcmcia_device *p_dev)
145{ 130{
146 local_info_t *local; 131 local_info_t *local;
147 132
148 DEBUG(0, "airo_attach()\n"); 133 dev_dbg(&p_dev->dev, "airo_attach()\n");
149 134
150 /* Interrupt setup */ 135 /* Interrupt setup */
151 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; 136 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
152 p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
153 p_dev->irq.Handler = NULL; 137 p_dev->irq.Handler = NULL;
154 138
155 /* 139 /*
@@ -184,7 +168,7 @@ static int airo_probe(struct pcmcia_device *p_dev)
184 168
185static void airo_detach(struct pcmcia_device *link) 169static void airo_detach(struct pcmcia_device *link)
186{ 170{
187 DEBUG(0, "airo_detach(0x%p)\n", link); 171 dev_dbg(&link->dev, "airo_detach\n");
188 172
189 airo_release(link); 173 airo_release(link);
190 174
@@ -204,9 +188,6 @@ static void airo_detach(struct pcmcia_device *link)
204 188
205 ======================================================================*/ 189 ======================================================================*/
206 190
207#define CS_CHECK(fn, ret) \
208do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
209
210static int airo_cs_config_check(struct pcmcia_device *p_dev, 191static int airo_cs_config_check(struct pcmcia_device *p_dev,
211 cistpl_cftable_entry_t *cfg, 192 cistpl_cftable_entry_t *cfg,
212 cistpl_cftable_entry_t *dflt, 193 cistpl_cftable_entry_t *dflt,
@@ -275,11 +256,11 @@ static int airo_cs_config_check(struct pcmcia_device *p_dev,
275 req->Base = mem->win[0].host_addr; 256 req->Base = mem->win[0].host_addr;
276 req->Size = mem->win[0].len; 257 req->Size = mem->win[0].len;
277 req->AccessSpeed = 0; 258 req->AccessSpeed = 0;
278 if (pcmcia_request_window(&p_dev, req, &p_dev->win) != 0) 259 if (pcmcia_request_window(p_dev, req, &p_dev->win) != 0)
279 return -ENODEV; 260 return -ENODEV;
280 map.Page = 0; 261 map.Page = 0;
281 map.CardOffset = mem->win[0].card_addr; 262 map.CardOffset = mem->win[0].card_addr;
282 if (pcmcia_map_mem_page(p_dev->win, &map) != 0) 263 if (pcmcia_map_mem_page(p_dev, p_dev->win, &map) != 0)
283 return -ENODEV; 264 return -ENODEV;
284 } 265 }
285 /* If we got this far, we're cool! */ 266 /* If we got this far, we're cool! */
@@ -291,11 +272,11 @@ static int airo_config(struct pcmcia_device *link)
291{ 272{
292 local_info_t *dev; 273 local_info_t *dev;
293 win_req_t *req; 274 win_req_t *req;
294 int last_fn, last_ret; 275 int ret;
295 276
296 dev = link->priv; 277 dev = link->priv;
297 278
298 DEBUG(0, "airo_config(0x%p)\n", link); 279 dev_dbg(&link->dev, "airo_config\n");
299 280
300 req = kzalloc(sizeof(win_req_t), GFP_KERNEL); 281 req = kzalloc(sizeof(win_req_t), GFP_KERNEL);
301 if (!req) 282 if (!req)
@@ -315,8 +296,8 @@ static int airo_config(struct pcmcia_device *link)
315 * and most client drivers will only use the CIS to fill in 296 * and most client drivers will only use the CIS to fill in
316 * implementation-defined details. 297 * implementation-defined details.
317 */ 298 */
318 last_ret = pcmcia_loop_config(link, airo_cs_config_check, req); 299 ret = pcmcia_loop_config(link, airo_cs_config_check, req);
319 if (last_ret) 300 if (ret)
320 goto failed; 301 goto failed;
321 302
322 /* 303 /*
@@ -324,21 +305,25 @@ static int airo_config(struct pcmcia_device *link)
324 handler to the interrupt, unless the 'Handler' member of the 305 handler to the interrupt, unless the 'Handler' member of the
325 irq structure is initialized. 306 irq structure is initialized.
326 */ 307 */
327 if (link->conf.Attributes & CONF_ENABLE_IRQ) 308 if (link->conf.Attributes & CONF_ENABLE_IRQ) {
328 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); 309 ret = pcmcia_request_irq(link, &link->irq);
310 if (ret)
311 goto failed;
312 }
329 313
330 /* 314 /*
331 This actually configures the PCMCIA socket -- setting up 315 This actually configures the PCMCIA socket -- setting up
332 the I/O windows and the interrupt mapping, and putting the 316 the I/O windows and the interrupt mapping, and putting the
333 card and host interface into "Memory and IO" mode. 317 card and host interface into "Memory and IO" mode.
334 */ 318 */
335 CS_CHECK(RequestConfiguration, 319 ret = pcmcia_request_configuration(link, &link->conf);
336 pcmcia_request_configuration(link, &link->conf)); 320 if (ret)
321 goto failed;
337 ((local_info_t *)link->priv)->eth_dev = 322 ((local_info_t *)link->priv)->eth_dev =
338 init_airo_card(link->irq.AssignedIRQ, 323 init_airo_card(link->irq.AssignedIRQ,
339 link->io.BasePort1, 1, &handle_to_dev(link)); 324 link->io.BasePort1, 1, &link->dev);
340 if (!((local_info_t *)link->priv)->eth_dev) 325 if (!((local_info_t *)link->priv)->eth_dev)
341 goto cs_failed; 326 goto failed;
342 327
343 /* 328 /*
344 At this point, the dev_node_t structure(s) need to be 329 At this point, the dev_node_t structure(s) need to be
@@ -368,8 +353,6 @@ static int airo_config(struct pcmcia_device *link)
368 kfree(req); 353 kfree(req);
369 return 0; 354 return 0;
370 355
371 cs_failed:
372 cs_error(link, last_fn, last_ret);
373 failed: 356 failed:
374 airo_release(link); 357 airo_release(link);
375 kfree(req); 358 kfree(req);
@@ -386,7 +369,7 @@ static int airo_config(struct pcmcia_device *link)
386 369
387static void airo_release(struct pcmcia_device *link) 370static void airo_release(struct pcmcia_device *link)
388{ 371{
389 DEBUG(0, "airo_release(0x%p)\n", link); 372 dev_dbg(&link->dev, "airo_release\n");
390 pcmcia_disable_device(link); 373 pcmcia_disable_device(link);
391} 374}
392 375
diff --git a/drivers/net/wireless/arlan-main.c b/drivers/net/wireless/arlan-main.c
deleted file mode 100644
index 921a082487a1..000000000000
--- a/drivers/net/wireless/arlan-main.c
+++ /dev/null
@@ -1,1887 +0,0 @@
1/*
2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer Joandiu, elmer@ylenurme.ee
4 * GNU General Public License applies
5 * This module provides support for the Arlan 655 card made by Aironet
6 */
7
8#include "arlan.h"
9
10#if BITS_PER_LONG != 32
11# error FIXME: this driver requires a 32-bit platform
12#endif
13
14static const char *arlan_version = "C.Jennigs 97 & Elmer.Joandi@ut.ee Oct'98, http://www.ylenurme.ee/~elmer/655/";
15
16struct net_device *arlan_device[MAX_ARLANS];
17
18static int SID = SIDUNKNOWN;
19static int radioNodeId = radioNodeIdUNKNOWN;
20static char encryptionKey[12] = {'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h'};
21int arlan_debug = debugUNKNOWN;
22static int spreadingCode = spreadingCodeUNKNOWN;
23static int channelNumber = channelNumberUNKNOWN;
24static int channelSet = channelSetUNKNOWN;
25static int systemId = systemIdUNKNOWN;
26static int registrationMode = registrationModeUNKNOWN;
27static int keyStart;
28static int tx_delay_ms;
29static int retries = 5;
30static int tx_queue_len = 1;
31static int arlan_EEPROM_bad;
32
33#ifdef ARLAN_DEBUGGING
34
35static int testMemory = testMemoryUNKNOWN;
36static int irq = irqUNKNOWN;
37static int txScrambled = 1;
38static int mdebug;
39
40module_param(irq, int, 0);
41module_param(mdebug, int, 0);
42module_param(testMemory, int, 0);
43module_param(txScrambled, int, 0);
44MODULE_PARM_DESC(irq, "(unused)");
45MODULE_PARM_DESC(testMemory, "(unused)");
46MODULE_PARM_DESC(mdebug, "Arlan multicast debugging (0-1)");
47#endif
48
49module_param_named(debug, arlan_debug, int, 0);
50module_param(spreadingCode, int, 0);
51module_param(channelNumber, int, 0);
52module_param(channelSet, int, 0);
53module_param(systemId, int, 0);
54module_param(registrationMode, int, 0);
55module_param(radioNodeId, int, 0);
56module_param(SID, int, 0);
57module_param(keyStart, int, 0);
58module_param(tx_delay_ms, int, 0);
59module_param(retries, int, 0);
60module_param(tx_queue_len, int, 0);
61module_param_named(EEPROM_bad, arlan_EEPROM_bad, int, 0);
62MODULE_PARM_DESC(debug, "Arlan debug enable (0-1)");
63MODULE_PARM_DESC(retries, "Arlan maximum packet retransmisions");
64#ifdef ARLAN_ENTRY_EXIT_DEBUGGING
65static int arlan_entry_debug;
66static int arlan_exit_debug;
67static int arlan_entry_and_exit_debug;
68module_param_named(entry_debug, arlan_entry_debug, int, 0);
69module_param_named(exit_debug, arlan_exit_debug, int, 0);
70module_param_named(entry_and_exit_debug, arlan_entry_and_exit_debug, int, 0);
71MODULE_PARM_DESC(entry_debug, "Arlan driver function entry debugging");
72MODULE_PARM_DESC(exit_debug, "Arlan driver function exit debugging");
73MODULE_PARM_DESC(entry_and_exit_debug, "Arlan driver function entry and exit debugging");
74#endif
75
76struct arlan_conf_stru arlan_conf[MAX_ARLANS];
77static int arlans_found;
78
79static int arlan_open(struct net_device *dev);
80static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev);
81static irqreturn_t arlan_interrupt(int irq, void *dev_id);
82static int arlan_close(struct net_device *dev);
83static struct net_device_stats *
84 arlan_statistics (struct net_device *dev);
85static void arlan_set_multicast (struct net_device *dev);
86static int arlan_hw_tx (struct net_device* dev, char *buf, int length );
87static int arlan_hw_config (struct net_device * dev);
88static void arlan_tx_done_interrupt (struct net_device * dev, int status);
89static void arlan_rx_interrupt (struct net_device * dev, u_char rxStatus, u_short, u_short);
90static void arlan_process_interrupt (struct net_device * dev);
91static void arlan_tx_timeout (struct net_device *dev);
92
93static inline long us2ticks(int us)
94{
95 return us * (1000000 / HZ);
96}
97
98
99#ifdef ARLAN_ENTRY_EXIT_DEBUGGING
100#define ARLAN_DEBUG_ENTRY(name) \
101 {\
102 struct timeval timev;\
103 do_gettimeofday(&timev);\
104 if (arlan_entry_debug || arlan_entry_and_exit_debug)\
105 printk("--->>>" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec));\
106 }
107#define ARLAN_DEBUG_EXIT(name) \
108 {\
109 struct timeval timev;\
110 do_gettimeofday(&timev);\
111 if (arlan_exit_debug || arlan_entry_and_exit_debug)\
112 printk("<<<---" name " %ld " "\n",((long int) timev.tv_sec * 1000000 + timev.tv_usec) );\
113 }
114#else
115#define ARLAN_DEBUG_ENTRY(name)
116#define ARLAN_DEBUG_EXIT(name)
117#endif
118
119
120#define arlan_interrupt_ack(dev)\
121 clearClearInterrupt(dev);\
122 setClearInterrupt(dev);
123
124static inline int arlan_drop_tx(struct net_device *dev)
125{
126 struct arlan_private *priv = netdev_priv(dev);
127
128 dev->stats.tx_errors++;
129 if (priv->Conf->tx_delay_ms)
130 {
131 priv->tx_done_delayed = jiffies + priv->Conf->tx_delay_ms * HZ / 1000 + 1;
132 }
133 else
134 {
135 priv->waiting_command_mask &= ~ARLAN_COMMAND_TX;
136 TXHEAD(dev).offset = 0;
137 TXTAIL(dev).offset = 0;
138 priv->txLast = 0;
139 priv->bad = 0;
140 if (!priv->under_reset && !priv->under_config)
141 netif_wake_queue (dev);
142 }
143 return 1;
144}
145
146
147int arlan_command(struct net_device *dev, int command_p)
148{
149 struct arlan_private *priv = netdev_priv(dev);
150 volatile struct arlan_shmem __iomem *arlan = priv->card;
151 struct arlan_conf_stru *conf = priv->Conf;
152 int udelayed = 0;
153 int i = 0;
154 unsigned long flags;
155
156 ARLAN_DEBUG_ENTRY("arlan_command");
157
158 if (priv->card_polling_interval)
159 priv->card_polling_interval = 1;
160
161 if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
162 printk(KERN_DEBUG "arlan_command, %lx commandByte %x waiting %lx incoming %x \n",
163 jiffies, READSHMB(arlan->commandByte),
164 priv->waiting_command_mask, command_p);
165
166 priv->waiting_command_mask |= command_p;
167
168 if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
169 if (time_after(jiffies, priv->lastReset + 5 * HZ))
170 priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET;
171
172 if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ACK)
173 {
174 arlan_interrupt_ack(dev);
175 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ACK;
176 }
177 if (priv->waiting_command_mask & ARLAN_COMMAND_INT_ENABLE)
178 {
179 setInterruptEnable(dev);
180 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_ENABLE;
181 }
182
183 /* Card access serializing lock */
184 spin_lock_irqsave(&priv->lock, flags);
185
186 /* Check cards status and waiting */
187
188 if (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW))
189 {
190 while (priv->waiting_command_mask & (ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW))
191 {
192 if (READSHMB(arlan->resetFlag) ||
193 READSHMB(arlan->commandByte)) /* ||
194 (readControlRegister(dev) & ARLAN_ACCESS))
195 */
196 udelay(40);
197 else
198 priv->waiting_command_mask &= ~(ARLAN_COMMAND_LONG_WAIT_NOW | ARLAN_COMMAND_WAIT_NOW);
199
200 udelayed++;
201
202 if (priv->waiting_command_mask & ARLAN_COMMAND_LONG_WAIT_NOW)
203 {
204 if (udelayed * 40 > 1000000)
205 {
206 printk(KERN_ERR "%s long wait too long \n", dev->name);
207 priv->waiting_command_mask |= ARLAN_COMMAND_RESET;
208 break;
209 }
210 }
211 else if (priv->waiting_command_mask & ARLAN_COMMAND_WAIT_NOW)
212 {
213 if (udelayed * 40 > 1000)
214 {
215 printk(KERN_ERR "%s short wait too long \n", dev->name);
216 goto bad_end;
217 }
218 }
219 }
220 }
221 else
222 {
223 i = 0;
224 while ((READSHMB(arlan->resetFlag) ||
225 READSHMB(arlan->commandByte)) &&
226 conf->pre_Command_Wait > (i++) * 10)
227 udelay(10);
228
229
230 if ((READSHMB(arlan->resetFlag) ||
231 READSHMB(arlan->commandByte)) &&
232 !(priv->waiting_command_mask & ARLAN_COMMAND_RESET))
233 {
234 goto card_busy_end;
235 }
236 }
237 if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
238 priv->under_reset = 1;
239 if (priv->waiting_command_mask & ARLAN_COMMAND_CONF)
240 priv->under_config = 1;
241
242 /* Issuing command */
243 arlan_lock_card_access(dev);
244 if (priv->waiting_command_mask & ARLAN_COMMAND_POWERUP)
245 {
246 // if (readControlRegister(dev) & (ARLAN_ACCESS && ARLAN_POWER))
247 setPowerOn(dev);
248 arlan_interrupt_lancpu(dev);
249 priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERUP;
250 priv->waiting_command_mask |= ARLAN_COMMAND_RESET;
251 priv->card_polling_interval = HZ / 10;
252 }
253 else if (priv->waiting_command_mask & ARLAN_COMMAND_ACTIVATE)
254 {
255 WRITESHMB(arlan->commandByte, ARLAN_COM_ACTIVATE);
256 arlan_interrupt_lancpu(dev);
257 priv->waiting_command_mask &= ~ARLAN_COMMAND_ACTIVATE;
258 priv->card_polling_interval = HZ / 10;
259 }
260 else if (priv->waiting_command_mask & ARLAN_COMMAND_RX_ABORT)
261 {
262 if (priv->rx_command_given)
263 {
264 WRITESHMB(arlan->commandByte, ARLAN_COM_RX_ABORT);
265 arlan_interrupt_lancpu(dev);
266 priv->rx_command_given = 0;
267 }
268 priv->waiting_command_mask &= ~ARLAN_COMMAND_RX_ABORT;
269 priv->card_polling_interval = 1;
270 }
271 else if (priv->waiting_command_mask & ARLAN_COMMAND_TX_ABORT)
272 {
273 if (priv->tx_command_given)
274 {
275 WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ABORT);
276 arlan_interrupt_lancpu(dev);
277 priv->tx_command_given = 0;
278 }
279 priv->waiting_command_mask &= ~ARLAN_COMMAND_TX_ABORT;
280 priv->card_polling_interval = 1;
281 }
282 else if (priv->waiting_command_mask & ARLAN_COMMAND_RESET)
283 {
284 priv->under_reset=1;
285 netif_stop_queue (dev);
286
287 arlan_drop_tx(dev);
288 if (priv->tx_command_given || priv->rx_command_given)
289 {
290 printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name);
291 }
292 netif_stop_queue (dev);
293 if (arlan_debug & ARLAN_DEBUG_RESET)
294 printk(KERN_ERR "%s: Doing chip reset\n", dev->name);
295 priv->lastReset = jiffies;
296 WRITESHM(arlan->commandByte, 0, u_char);
297 /* hold card in reset state */
298 setHardwareReset(dev);
299 /* set reset flag and then release reset */
300 WRITESHM(arlan->resetFlag, 0xff, u_char);
301 clearChannelAttention(dev);
302 clearHardwareReset(dev);
303 priv->card_polling_interval = HZ / 4;
304 priv->waiting_command_mask &= ~ARLAN_COMMAND_RESET;
305 priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK;
306// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RENABLE;
307// priv->waiting_command_mask |= ARLAN_COMMAND_RX;
308 }
309 else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RACK)
310 {
311 clearHardwareReset(dev);
312 clearClearInterrupt(dev);
313 setClearInterrupt(dev);
314 setInterruptEnable(dev);
315 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RACK;
316 priv->waiting_command_mask |= ARLAN_COMMAND_CONF;
317 priv->under_config = 1;
318 priv->under_reset = 0;
319 }
320 else if (priv->waiting_command_mask & ARLAN_COMMAND_INT_RENABLE)
321 {
322 setInterruptEnable(dev);
323 priv->waiting_command_mask &= ~ARLAN_COMMAND_INT_RENABLE;
324 }
325 else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF)
326 {
327 if (priv->tx_command_given || priv->rx_command_given)
328 {
329 printk(KERN_ERR "%s: Reset under tx or rx command \n", dev->name);
330 }
331 arlan_drop_tx(dev);
332 setInterruptEnable(dev);
333 arlan_hw_config(dev);
334 arlan_interrupt_lancpu(dev);
335 priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF;
336 priv->card_polling_interval = HZ / 10;
337// priv->waiting_command_mask |= ARLAN_COMMAND_INT_RACK;
338// priv->waiting_command_mask |= ARLAN_COMMAND_INT_ENABLE;
339 priv->waiting_command_mask |= ARLAN_COMMAND_CONF_WAIT;
340 }
341 else if (priv->waiting_command_mask & ARLAN_COMMAND_CONF_WAIT)
342 {
343 if (READSHMB(arlan->configuredStatusFlag) != 0 &&
344 READSHMB(arlan->diagnosticInfo) == 0xff)
345 {
346 priv->waiting_command_mask &= ~ARLAN_COMMAND_CONF_WAIT;
347 priv->waiting_command_mask |= ARLAN_COMMAND_RX;
348 priv->waiting_command_mask |= ARLAN_COMMAND_TBUSY_CLEAR;
349 priv->card_polling_interval = HZ / 10;
350 priv->tx_command_given = 0;
351 priv->under_config = 0;
352 }
353 else
354 {
355 priv->card_polling_interval = 1;
356 if (arlan_debug & ARLAN_DEBUG_TIMING)
357 printk(KERN_ERR "configure delayed \n");
358 }
359 }
360 else if (priv->waiting_command_mask & ARLAN_COMMAND_RX)
361 {
362 if (!registrationBad(dev))
363 {
364 setInterruptEnable(dev);
365 memset_io(arlan->commandParameter, 0, 0xf);
366 WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_RX_ENABLE);
367 WRITESHMB(arlan->commandParameter[0], conf->rxParameter);
368 arlan_interrupt_lancpu(dev);
369 priv->rx_command_given = 0; // mnjah, bad
370 priv->waiting_command_mask &= ~ARLAN_COMMAND_RX;
371 priv->card_polling_interval = 1;
372 }
373 else
374 priv->card_polling_interval = 2;
375 }
376 else if (priv->waiting_command_mask & ARLAN_COMMAND_TBUSY_CLEAR)
377 {
378 if ( !registrationBad(dev) &&
379 (netif_queue_stopped(dev) || !netif_running(dev)) )
380 {
381 priv->waiting_command_mask &= ~ARLAN_COMMAND_TBUSY_CLEAR;
382 netif_wake_queue (dev);
383 }
384 }
385 else if (priv->waiting_command_mask & ARLAN_COMMAND_TX)
386 {
387 if (!test_and_set_bit(0, (void *) &priv->tx_command_given))
388 {
389 if (time_after(jiffies,
390 priv->tx_last_sent + us2ticks(conf->rx_tweak1))
391 || time_before(jiffies,
392 priv->last_rx_int_ack_time + us2ticks(conf->rx_tweak2)))
393 {
394 setInterruptEnable(dev);
395 memset_io(arlan->commandParameter, 0, 0xf);
396 WRITESHMB(arlan->commandByte, ARLAN_COM_TX_ENABLE | ARLAN_COM_INT);
397 memcpy_toio(arlan->commandParameter, &TXLAST(dev), 14);
398// for ( i=1 ; i < 15 ; i++) printk("%02x:",READSHMB(arlan->commandParameter[i]));
399 priv->tx_last_sent = jiffies;
400 arlan_interrupt_lancpu(dev);
401 priv->tx_command_given = 1;
402 priv->waiting_command_mask &= ~ARLAN_COMMAND_TX;
403 priv->card_polling_interval = 1;
404 }
405 else
406 {
407 priv->tx_command_given = 0;
408 priv->card_polling_interval = 1;
409 }
410 }
411 else if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
412 printk(KERN_ERR "tx command when tx chain locked \n");
413 }
414 else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOPINT)
415 {
416 {
417 WRITESHMB(arlan->commandByte, ARLAN_COM_NOP | ARLAN_COM_INT);
418 }
419 arlan_interrupt_lancpu(dev);
420 priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOPINT;
421 priv->card_polling_interval = HZ / 3;
422 }
423 else if (priv->waiting_command_mask & ARLAN_COMMAND_NOOP)
424 {
425 WRITESHMB(arlan->commandByte, ARLAN_COM_NOP);
426 arlan_interrupt_lancpu(dev);
427 priv->waiting_command_mask &= ~ARLAN_COMMAND_NOOP;
428 priv->card_polling_interval = HZ / 3;
429 }
430 else if (priv->waiting_command_mask & ARLAN_COMMAND_SLOW_POLL)
431 {
432 WRITESHMB(arlan->commandByte, ARLAN_COM_GOTO_SLOW_POLL);
433 arlan_interrupt_lancpu(dev);
434 priv->waiting_command_mask &= ~ARLAN_COMMAND_SLOW_POLL;
435 priv->card_polling_interval = HZ / 3;
436 }
437 else if (priv->waiting_command_mask & ARLAN_COMMAND_POWERDOWN)
438 {
439 setPowerOff(dev);
440 if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
441 printk(KERN_WARNING "%s: Arlan Going Standby\n", dev->name);
442 priv->waiting_command_mask &= ~ARLAN_COMMAND_POWERDOWN;
443 priv->card_polling_interval = 3 * HZ;
444 }
445 arlan_unlock_card_access(dev);
446 for (i = 0; READSHMB(arlan->commandByte) && i < 20; i++)
447 udelay(10);
448 if (READSHMB(arlan->commandByte))
449 if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
450 printk(KERN_ERR "card busy leaving command %lx\n", priv->waiting_command_mask);
451
452 spin_unlock_irqrestore(&priv->lock, flags);
453 ARLAN_DEBUG_EXIT("arlan_command");
454 priv->last_command_buff_free_time = jiffies;
455 return 0;
456
457card_busy_end:
458 if (time_after(jiffies, priv->last_command_buff_free_time + HZ))
459 priv->waiting_command_mask |= ARLAN_COMMAND_CLEAN_AND_RESET;
460
461 if (arlan_debug & ARLAN_DEBUG_CARD_STATE)
462 printk(KERN_ERR "%s arlan_command card busy end \n", dev->name);
463 spin_unlock_irqrestore(&priv->lock, flags);
464 ARLAN_DEBUG_EXIT("arlan_command");
465 return 1;
466
467bad_end:
468 printk(KERN_ERR "%s arlan_command bad end \n", dev->name);
469
470 spin_unlock_irqrestore(&priv->lock, flags);
471 ARLAN_DEBUG_EXIT("arlan_command");
472
473 return -1;
474}
475
476static inline void arlan_command_process(struct net_device *dev)
477{
478 struct arlan_private *priv = netdev_priv(dev);
479
480 int times = 0;
481 while (priv->waiting_command_mask && times < 8)
482 {
483 if (priv->waiting_command_mask)
484 {
485 if (arlan_command(dev, 0))
486 break;
487 times++;
488 }
489 /* if long command, we won't repeat trying */ ;
490 if (priv->card_polling_interval > 1)
491 break;
492 times++;
493 }
494}
495
496
497static inline void arlan_retransmit_now(struct net_device *dev)
498{
499 struct arlan_private *priv = netdev_priv(dev);
500
501
502 ARLAN_DEBUG_ENTRY("arlan_retransmit_now");
503 if (TXLAST(dev).offset == 0)
504 {
505 if (TXHEAD(dev).offset)
506 {
507 priv->txLast = 0;
508 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to head \n");
509
510 }
511 else if (TXTAIL(dev).offset)
512 {
513 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_DEBUG "TX buff switch to tail \n");
514 priv->txLast = 1;
515 }
516 else
517 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "ReTransmit buff empty");
518 netif_wake_queue (dev);
519 return;
520
521 }
522 arlan_command(dev, ARLAN_COMMAND_TX);
523
524 priv->Conf->driverRetransmissions++;
525 priv->retransmissions++;
526
527 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk("Retransmit %d bytes \n", TXLAST(dev).length);
528
529 ARLAN_DEBUG_EXIT("arlan_retransmit_now");
530}
531
532
533
534static void arlan_registration_timer(unsigned long data)
535{
536 struct net_device *dev = (struct net_device *) data;
537 struct arlan_private *priv = netdev_priv(dev);
538 int bh_mark_needed = 0;
539 int next_tick = 1;
540 long lostTime = ((long)jiffies - (long)priv->registrationLastSeen)
541 * (1000/HZ);
542
543 if (registrationBad(dev))
544 {
545 priv->registrationLostCount++;
546 if (lostTime > 7000 && lostTime < 7200)
547 {
548 printk(KERN_NOTICE "%s registration Lost \n", dev->name);
549 }
550 if (lostTime / priv->reRegisterExp > 2000)
551 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF);
552 if (lostTime / (priv->reRegisterExp) > 3500)
553 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
554 if (priv->reRegisterExp < 400)
555 priv->reRegisterExp += 2;
556 if (lostTime > 7200)
557 {
558 next_tick = HZ;
559 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
560 }
561 }
562 else
563 {
564 if (priv->Conf->registrationMode && lostTime > 10000 &&
565 priv->registrationLostCount)
566 {
567 printk(KERN_NOTICE "%s registration is back after %ld milliseconds\n",
568 dev->name, lostTime);
569 }
570 priv->registrationLastSeen = jiffies;
571 priv->registrationLostCount = 0;
572 priv->reRegisterExp = 1;
573 if (!netif_running(dev) )
574 netif_wake_queue(dev);
575 if (time_after(priv->tx_last_sent,priv->tx_last_cleared) &&
576 time_after(jiffies, priv->tx_last_sent * 5*HZ) ){
577 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
578 priv->tx_last_cleared = jiffies;
579 }
580 }
581
582
583 if (!registrationBad(dev) && priv->ReTransmitRequested)
584 {
585 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
586 printk(KERN_ERR "Retransmit from timer \n");
587 priv->ReTransmitRequested = 0;
588 arlan_retransmit_now(dev);
589 }
590 if (!registrationBad(dev) &&
591 time_after(jiffies, priv->tx_done_delayed) &&
592 priv->tx_done_delayed != 0)
593 {
594 TXLAST(dev).offset = 0;
595 if (priv->txLast)
596 priv->txLast = 0;
597 else if (TXTAIL(dev).offset)
598 priv->txLast = 1;
599 if (TXLAST(dev).offset)
600 {
601 arlan_retransmit_now(dev);
602 dev->trans_start = jiffies;
603 }
604 if (!(TXHEAD(dev).offset && TXTAIL(dev).offset))
605 {
606 netif_wake_queue (dev);
607 }
608 priv->tx_done_delayed = 0;
609 bh_mark_needed = 1;
610 }
611 if (bh_mark_needed)
612 {
613 netif_wake_queue (dev);
614 }
615 arlan_process_interrupt(dev);
616
617 if (next_tick < priv->card_polling_interval)
618 next_tick = priv->card_polling_interval;
619
620 priv->timer.expires = jiffies + next_tick;
621
622 add_timer(&priv->timer);
623}
624
625
626#ifdef ARLAN_DEBUGGING
627
628static void arlan_print_registers(struct net_device *dev, int line)
629{
630 struct arlan_private *priv = netdev_priv(dev);
631 volatile struct arlan_shmem *arlan = priv->card;
632
633 u_char hostcpuLock, lancpuLock, controlRegister, cntrlRegImage,
634 txStatus, rxStatus, interruptInProgress, commandByte;
635
636
637 ARLAN_DEBUG_ENTRY("arlan_print_registers");
638 READSHM(interruptInProgress, arlan->interruptInProgress, u_char);
639 READSHM(hostcpuLock, arlan->hostcpuLock, u_char);
640 READSHM(lancpuLock, arlan->lancpuLock, u_char);
641 READSHM(controlRegister, arlan->controlRegister, u_char);
642 READSHM(cntrlRegImage, arlan->cntrlRegImage, u_char);
643 READSHM(txStatus, arlan->txStatus, u_char);
644 READSHM(rxStatus, arlan->rxStatus, u_char);
645 READSHM(commandByte, arlan->commandByte, u_char);
646
647 printk(KERN_WARNING "line %04d IP %02x HL %02x LL %02x CB %02x CR %02x CRI %02x TX %02x RX %02x\n",
648 line, interruptInProgress, hostcpuLock, lancpuLock, commandByte,
649 controlRegister, cntrlRegImage, txStatus, rxStatus);
650
651 ARLAN_DEBUG_EXIT("arlan_print_registers");
652}
653#endif
654
655
656static int arlan_hw_tx(struct net_device *dev, char *buf, int length)
657{
658 int i;
659
660 struct arlan_private *priv = netdev_priv(dev);
661 volatile struct arlan_shmem __iomem *arlan = priv->card;
662 struct arlan_conf_stru *conf = priv->Conf;
663
664 int tailStarts = 0x800;
665 int headEnds = 0x0;
666
667
668 ARLAN_DEBUG_ENTRY("arlan_hw_tx");
669 if (TXHEAD(dev).offset)
670 headEnds = (((TXHEAD(dev).offset + TXHEAD(dev).length - offsetof(struct arlan_shmem, txBuffer)) / 64) + 1) * 64;
671 if (TXTAIL(dev).offset)
672 tailStarts = 0x800 - (((TXTAIL(dev).offset - offsetof(struct arlan_shmem, txBuffer)) / 64) + 2) * 64;
673
674
675 if (!TXHEAD(dev).offset && length < tailStarts)
676 {
677 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
678 printk(KERN_ERR "TXHEAD insert, tailStart %d\n", tailStarts);
679
680 TXHEAD(dev).offset =
681 offsetof(struct arlan_shmem, txBuffer);
682 TXHEAD(dev).length = length - ARLAN_FAKE_HDR_LEN;
683 for (i = 0; i < 6; i++)
684 TXHEAD(dev).dest[i] = buf[i];
685 TXHEAD(dev).clear = conf->txClear;
686 TXHEAD(dev).retries = conf->txRetries; /* 0 is use default */
687 TXHEAD(dev).routing = conf->txRouting;
688 TXHEAD(dev).scrambled = conf->txScrambled;
689 memcpy_toio((char __iomem *)arlan + TXHEAD(dev).offset, buf + ARLAN_FAKE_HDR_LEN, TXHEAD(dev).length);
690 }
691 else if (!TXTAIL(dev).offset && length < (0x800 - headEnds))
692 {
693 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
694 printk(KERN_ERR "TXTAIL insert, headEnd %d\n", headEnds);
695
696 TXTAIL(dev).offset =
697 offsetof(struct arlan_shmem, txBuffer) + 0x800 - (length / 64 + 2) * 64;
698 TXTAIL(dev).length = length - ARLAN_FAKE_HDR_LEN;
699 for (i = 0; i < 6; i++)
700 TXTAIL(dev).dest[i] = buf[i];
701 TXTAIL(dev).clear = conf->txClear;
702 TXTAIL(dev).retries = conf->txRetries;
703 TXTAIL(dev).routing = conf->txRouting;
704 TXTAIL(dev).scrambled = conf->txScrambled;
705 memcpy_toio(((char __iomem *)arlan + TXTAIL(dev).offset), buf + ARLAN_FAKE_HDR_LEN, TXTAIL(dev).length);
706 }
707 else
708 {
709 netif_stop_queue (dev);
710 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
711 printk(KERN_ERR "TX TAIL & HEAD full, return, tailStart %d headEnd %d\n", tailStarts, headEnds);
712 return -1;
713 }
714 priv->out_bytes += length;
715 priv->out_bytes10 += length;
716 if (conf->measure_rate < 1)
717 conf->measure_rate = 1;
718 if (time_after(jiffies, priv->out_time + conf->measure_rate * HZ))
719 {
720 conf->out_speed = priv->out_bytes / conf->measure_rate;
721 priv->out_bytes = 0;
722 priv->out_time = jiffies;
723 }
724 if (time_after(jiffies, priv->out_time10 + conf->measure_rate * 10*HZ))
725 {
726 conf->out_speed10 = priv->out_bytes10 / (10 * conf->measure_rate);
727 priv->out_bytes10 = 0;
728 priv->out_time10 = jiffies;
729 }
730 if (TXHEAD(dev).offset && TXTAIL(dev).offset)
731 {
732 netif_stop_queue (dev);
733 return 0;
734 }
735 else
736 netif_start_queue (dev);
737
738
739 IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
740 printk(KERN_WARNING "%s Transmit t %2x:%2x:%2x:%2x:%2x:%2x f %2x:%2x:%2x:%2x:%2x:%2x \n", dev->name,
741 (unsigned char) buf[0], (unsigned char) buf[1], (unsigned char) buf[2], (unsigned char) buf[3],
742 (unsigned char) buf[4], (unsigned char) buf[5], (unsigned char) buf[6], (unsigned char) buf[7],
743 (unsigned char) buf[8], (unsigned char) buf[9], (unsigned char) buf[10], (unsigned char) buf[11]);
744
745 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk(KERN_ERR "TX command prepare for buffer %d\n", priv->txLast);
746
747 arlan_command(dev, ARLAN_COMMAND_TX);
748
749 priv->tx_last_sent = jiffies;
750
751 IFDEBUG(ARLAN_DEBUG_TX_CHAIN) printk("%s TX Qued %d bytes \n", dev->name, length);
752
753 ARLAN_DEBUG_EXIT("arlan_hw_tx");
754
755 return 0;
756}
757
758
759static int arlan_hw_config(struct net_device *dev)
760{
761 struct arlan_private *priv = netdev_priv(dev);
762 volatile struct arlan_shmem __iomem *arlan = priv->card;
763 struct arlan_conf_stru *conf = priv->Conf;
764
765 ARLAN_DEBUG_ENTRY("arlan_hw_config");
766
767 printk(KERN_NOTICE "%s arlan configure called \n", dev->name);
768 if (arlan_EEPROM_bad)
769 printk(KERN_NOTICE "arlan configure with eeprom bad option \n");
770
771
772 WRITESHM(arlan->spreadingCode, conf->spreadingCode, u_char);
773 WRITESHM(arlan->channelSet, conf->channelSet, u_char);
774
775 if (arlan_EEPROM_bad)
776 WRITESHM(arlan->defaultChannelSet, conf->channelSet, u_char);
777
778 WRITESHM(arlan->channelNumber, conf->channelNumber, u_char);
779
780 WRITESHM(arlan->scramblingDisable, conf->scramblingDisable, u_char);
781 WRITESHM(arlan->txAttenuation, conf->txAttenuation, u_char);
782
783 WRITESHM(arlan->systemId, conf->systemId, u_int);
784
785 WRITESHM(arlan->maxRetries, conf->maxRetries, u_char);
786 WRITESHM(arlan->receiveMode, conf->receiveMode, u_char);
787 WRITESHM(arlan->priority, conf->priority, u_char);
788 WRITESHM(arlan->rootOrRepeater, conf->rootOrRepeater, u_char);
789 WRITESHM(arlan->SID, conf->SID, u_int);
790
791 WRITESHM(arlan->registrationMode, conf->registrationMode, u_char);
792
793 WRITESHM(arlan->registrationFill, conf->registrationFill, u_char);
794 WRITESHM(arlan->localTalkAddress, conf->localTalkAddress, u_char);
795 WRITESHM(arlan->codeFormat, conf->codeFormat, u_char);
796 WRITESHM(arlan->numChannels, conf->numChannels, u_char);
797 WRITESHM(arlan->channel1, conf->channel1, u_char);
798 WRITESHM(arlan->channel2, conf->channel2, u_char);
799 WRITESHM(arlan->channel3, conf->channel3, u_char);
800 WRITESHM(arlan->channel4, conf->channel4, u_char);
801 WRITESHM(arlan->radioNodeId, conf->radioNodeId, u_short);
802 WRITESHM(arlan->SID, conf->SID, u_int);
803 WRITESHM(arlan->waitTime, conf->waitTime, u_short);
804 WRITESHM(arlan->lParameter, conf->lParameter, u_short);
805 memcpy_toio(&(arlan->_15), &(conf->_15), 3);
806 WRITESHM(arlan->_15, conf->_15, u_short);
807 WRITESHM(arlan->headerSize, conf->headerSize, u_short);
808 if (arlan_EEPROM_bad)
809 WRITESHM(arlan->hardwareType, conf->hardwareType, u_char);
810 WRITESHM(arlan->radioType, conf->radioType, u_char);
811 if (arlan_EEPROM_bad)
812 WRITESHM(arlan->radioModule, conf->radioType, u_char);
813
814 memcpy_toio(arlan->encryptionKey + keyStart, encryptionKey, 8);
815 memcpy_toio(arlan->name, conf->siteName, 16);
816
817 WRITESHMB(arlan->commandByte, ARLAN_COM_INT | ARLAN_COM_CONF); /* do configure */
818 memset_io(arlan->commandParameter, 0, 0xf); /* 0xf */
819 memset_io(arlan->commandParameter + 1, 0, 2);
820 if (conf->writeEEPROM)
821 {
822 memset_io(arlan->commandParameter, conf->writeEEPROM, 1);
823// conf->writeEEPROM=0;
824 }
825 if (conf->registrationMode && conf->registrationInterrupts)
826 memset_io(arlan->commandParameter + 3, 1, 1);
827 else
828 memset_io(arlan->commandParameter + 3, 0, 1);
829
830 priv->irq_test_done = 0;
831
832 if (conf->tx_queue_len)
833 dev->tx_queue_len = conf->tx_queue_len;
834 udelay(100);
835
836 ARLAN_DEBUG_EXIT("arlan_hw_config");
837 return 0;
838}
839
840
841static int arlan_read_card_configuration(struct net_device *dev)
842{
843 u_char tlx415;
844 struct arlan_private *priv = netdev_priv(dev);
845 volatile struct arlan_shmem __iomem *arlan = priv->card;
846 struct arlan_conf_stru *conf = priv->Conf;
847
848 ARLAN_DEBUG_ENTRY("arlan_read_card_configuration");
849
850 if (radioNodeId == radioNodeIdUNKNOWN)
851 {
852 READSHM(conf->radioNodeId, arlan->radioNodeId, u_short);
853 }
854 else
855 conf->radioNodeId = radioNodeId;
856
857 if (SID == SIDUNKNOWN)
858 {
859 READSHM(conf->SID, arlan->SID, u_int);
860 }
861 else conf->SID = SID;
862
863 if (spreadingCode == spreadingCodeUNKNOWN)
864 {
865 READSHM(conf->spreadingCode, arlan->spreadingCode, u_char);
866 }
867 else
868 conf->spreadingCode = spreadingCode;
869
870 if (channelSet == channelSetUNKNOWN)
871 {
872 READSHM(conf->channelSet, arlan->channelSet, u_char);
873 }
874 else conf->channelSet = channelSet;
875
876 if (channelNumber == channelNumberUNKNOWN)
877 {
878 READSHM(conf->channelNumber, arlan->channelNumber, u_char);
879 }
880 else conf->channelNumber = channelNumber;
881
882 READSHM(conf->scramblingDisable, arlan->scramblingDisable, u_char);
883 READSHM(conf->txAttenuation, arlan->txAttenuation, u_char);
884
885 if (systemId == systemIdUNKNOWN)
886 {
887 READSHM(conf->systemId, arlan->systemId, u_int);
888 }
889 else conf->systemId = systemId;
890
891 READSHM(conf->maxDatagramSize, arlan->maxDatagramSize, u_short);
892 READSHM(conf->maxFrameSize, arlan->maxFrameSize, u_short);
893 READSHM(conf->maxRetries, arlan->maxRetries, u_char);
894 READSHM(conf->receiveMode, arlan->receiveMode, u_char);
895 READSHM(conf->priority, arlan->priority, u_char);
896 READSHM(conf->rootOrRepeater, arlan->rootOrRepeater, u_char);
897
898 if (SID == SIDUNKNOWN)
899 {
900 READSHM(conf->SID, arlan->SID, u_int);
901 }
902 else conf->SID = SID;
903
904 if (registrationMode == registrationModeUNKNOWN)
905 {
906 READSHM(conf->registrationMode, arlan->registrationMode, u_char);
907 }
908 else conf->registrationMode = registrationMode;
909
910 READSHM(conf->registrationFill, arlan->registrationFill, u_char);
911 READSHM(conf->localTalkAddress, arlan->localTalkAddress, u_char);
912 READSHM(conf->codeFormat, arlan->codeFormat, u_char);
913 READSHM(conf->numChannels, arlan->numChannels, u_char);
914 READSHM(conf->channel1, arlan->channel1, u_char);
915 READSHM(conf->channel2, arlan->channel2, u_char);
916 READSHM(conf->channel3, arlan->channel3, u_char);
917 READSHM(conf->channel4, arlan->channel4, u_char);
918 READSHM(conf->waitTime, arlan->waitTime, u_short);
919 READSHM(conf->lParameter, arlan->lParameter, u_short);
920 READSHM(conf->_15, arlan->_15, u_short);
921 READSHM(conf->headerSize, arlan->headerSize, u_short);
922 READSHM(conf->hardwareType, arlan->hardwareType, u_char);
923 READSHM(conf->radioType, arlan->radioModule, u_char);
924
925 if (conf->radioType == 0)
926 conf->radioType = 0xc;
927
928 WRITESHM(arlan->configStatus, 0xA5, u_char);
929 READSHM(tlx415, arlan->configStatus, u_char);
930
931 if (tlx415 != 0xA5)
932 printk(KERN_INFO "%s tlx415 chip \n", dev->name);
933
934 conf->txClear = 0;
935 conf->txRetries = 1;
936 conf->txRouting = 1;
937 conf->txScrambled = 0;
938 conf->rxParameter = 1;
939 conf->txTimeoutMs = 4000;
940 conf->waitCardTimeout = 100000;
941 conf->receiveMode = ARLAN_RCV_CLEAN;
942 memcpy_fromio(conf->siteName, arlan->name, 16);
943 conf->siteName[16] = '\0';
944 conf->retries = retries;
945 conf->tx_delay_ms = tx_delay_ms;
946 conf->ReTransmitPacketMaxSize = 200;
947 conf->waitReTransmitPacketMaxSize = 200;
948 conf->txAckTimeoutMs = 900;
949 conf->fastReTransCount = 3;
950
951 ARLAN_DEBUG_EXIT("arlan_read_card_configuration");
952
953 return 0;
954}
955
956
957static int lastFoundAt = 0xbe000;
958
959
960/*
961 * This is the real probe routine. Linux has a history of friendly device
962 * probes on the ISA bus. A good device probes avoids doing writes, and
963 * verifies that the correct device exists and functions.
964 */
965#define ARLAN_SHMEM_SIZE 0x2000
966static int __init arlan_check_fingerprint(unsigned long memaddr)
967{
968 static const char probeText[] = "TELESYSTEM SLW INC. ARLAN \0";
969 volatile struct arlan_shmem __iomem *arlan = (struct arlan_shmem *) memaddr;
970 unsigned long paddr = virt_to_phys((void *) memaddr);
971 char tempBuf[49];
972
973 ARLAN_DEBUG_ENTRY("arlan_check_fingerprint");
974
975 if (!request_mem_region(paddr, ARLAN_SHMEM_SIZE, "arlan")) {
976 // printk(KERN_WARNING "arlan: memory region %lx excluded from probing \n",paddr);
977 return -ENODEV;
978 }
979
980 memcpy_fromio(tempBuf, arlan->textRegion, 29);
981 tempBuf[30] = 0;
982
983 /* check for card at this address */
984 if (0 != strncmp(tempBuf, probeText, 29)){
985 release_mem_region(paddr, ARLAN_SHMEM_SIZE);
986 return -ENODEV;
987 }
988
989// printk(KERN_INFO "arlan found at 0x%x \n",memaddr);
990 ARLAN_DEBUG_EXIT("arlan_check_fingerprint");
991
992 return 0;
993}
994
995static int arlan_change_mtu(struct net_device *dev, int new_mtu)
996{
997 struct arlan_private *priv = netdev_priv(dev);
998 struct arlan_conf_stru *conf = priv->Conf;
999
1000 ARLAN_DEBUG_ENTRY("arlan_change_mtu");
1001 if (new_mtu > 2032)
1002 return -EINVAL;
1003 dev->mtu = new_mtu;
1004 if (new_mtu < 256)
1005 new_mtu = 256; /* cards book suggests 1600 */
1006 conf->maxDatagramSize = new_mtu;
1007 conf->maxFrameSize = new_mtu + 48;
1008
1009 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_CONF);
1010 printk(KERN_NOTICE "%s mtu changed to %d \n", dev->name, new_mtu);
1011
1012 ARLAN_DEBUG_EXIT("arlan_change_mtu");
1013
1014 return 0;
1015}
1016
1017static int arlan_mac_addr(struct net_device *dev, void *p)
1018{
1019 struct sockaddr *addr = p;
1020
1021
1022 ARLAN_DEBUG_ENTRY("arlan_mac_addr");
1023 return -EINVAL;
1024
1025 if (netif_running(dev))
1026 return -EBUSY;
1027 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1028
1029 ARLAN_DEBUG_EXIT("arlan_mac_addr");
1030 return 0;
1031}
1032
1033static const struct net_device_ops arlan_netdev_ops = {
1034 .ndo_open = arlan_open,
1035 .ndo_stop = arlan_close,
1036 .ndo_start_xmit = arlan_tx,
1037 .ndo_get_stats = arlan_statistics,
1038 .ndo_set_multicast_list = arlan_set_multicast,
1039 .ndo_change_mtu = arlan_change_mtu,
1040 .ndo_set_mac_address = arlan_mac_addr,
1041 .ndo_tx_timeout = arlan_tx_timeout,
1042 .ndo_validate_addr = eth_validate_addr,
1043};
1044
1045static int __init arlan_setup_device(struct net_device *dev, int num)
1046{
1047 struct arlan_private *ap = netdev_priv(dev);
1048 int err;
1049
1050 ARLAN_DEBUG_ENTRY("arlan_setup_device");
1051
1052 ap->conf = (struct arlan_shmem *)(ap+1);
1053
1054 dev->tx_queue_len = tx_queue_len;
1055 dev->netdev_ops = &arlan_netdev_ops;
1056 dev->watchdog_timeo = 3*HZ;
1057
1058 ap->irq_test_done = 0;
1059 ap->Conf = &arlan_conf[num];
1060
1061 ap->Conf->pre_Command_Wait = 40;
1062 ap->Conf->rx_tweak1 = 30;
1063 ap->Conf->rx_tweak2 = 0;
1064
1065
1066 err = register_netdev(dev);
1067 if (err) {
1068 release_mem_region(virt_to_phys((void *) dev->mem_start),
1069 ARLAN_SHMEM_SIZE);
1070 free_netdev(dev);
1071 return err;
1072 }
1073 arlan_device[num] = dev;
1074 ARLAN_DEBUG_EXIT("arlan_setup_device");
1075 return 0;
1076}
1077
1078static int __init arlan_probe_here(struct net_device *dev,
1079 unsigned long memaddr)
1080{
1081 struct arlan_private *ap = netdev_priv(dev);
1082
1083 ARLAN_DEBUG_ENTRY("arlan_probe_here");
1084
1085 if (arlan_check_fingerprint(memaddr))
1086 return -ENODEV;
1087
1088 printk(KERN_NOTICE "%s: Arlan found at %llx, \n ", dev->name,
1089 (u64) virt_to_phys((void*)memaddr));
1090
1091 ap->card = (void *) memaddr;
1092 dev->mem_start = memaddr;
1093 dev->mem_end = memaddr + ARLAN_SHMEM_SIZE-1;
1094
1095 if (dev->irq < 2)
1096 {
1097 READSHM(dev->irq, ap->card->irqLevel, u_char);
1098 } else if (dev->irq == 2)
1099 dev->irq = 9;
1100
1101 arlan_read_card_configuration(dev);
1102
1103 ARLAN_DEBUG_EXIT("arlan_probe_here");
1104 return 0;
1105}
1106
1107
1108static int arlan_open(struct net_device *dev)
1109{
1110 struct arlan_private *priv = netdev_priv(dev);
1111 volatile struct arlan_shmem __iomem *arlan = priv->card;
1112 int ret = 0;
1113
1114 ARLAN_DEBUG_ENTRY("arlan_open");
1115
1116 ret = request_irq(dev->irq, &arlan_interrupt, 0, dev->name, dev);
1117 if (ret)
1118 {
1119 printk(KERN_ERR "%s: unable to get IRQ %d .\n",
1120 dev->name, dev->irq);
1121 return ret;
1122 }
1123
1124
1125 priv->bad = 0;
1126 priv->lastReset = 0;
1127 priv->reset = 0;
1128 memcpy_fromio(dev->dev_addr, arlan->lanCardNodeId, 6);
1129 memset(dev->broadcast, 0xff, 6);
1130 dev->tx_queue_len = tx_queue_len;
1131 priv->interrupt_processing_active = 0;
1132 spin_lock_init(&priv->lock);
1133
1134 netif_start_queue (dev);
1135
1136 priv->registrationLostCount = 0;
1137 priv->registrationLastSeen = jiffies;
1138 priv->txLast = 0;
1139 priv->tx_command_given = 0;
1140 priv->rx_command_given = 0;
1141
1142 priv->reRegisterExp = 1;
1143 priv->tx_last_sent = jiffies - 1;
1144 priv->tx_last_cleared = jiffies;
1145 priv->Conf->writeEEPROM = 0;
1146 priv->Conf->registrationInterrupts = 1;
1147
1148 init_timer(&priv->timer);
1149 priv->timer.expires = jiffies + HZ / 10;
1150 priv->timer.data = (unsigned long) dev;
1151 priv->timer.function = &arlan_registration_timer; /* timer handler */
1152
1153 arlan_command(dev, ARLAN_COMMAND_POWERUP | ARLAN_COMMAND_LONG_WAIT_NOW);
1154 mdelay(200);
1155 add_timer(&priv->timer);
1156
1157 ARLAN_DEBUG_EXIT("arlan_open");
1158 return 0;
1159}
1160
1161
1162static void arlan_tx_timeout (struct net_device *dev)
1163{
1164 printk(KERN_ERR "%s: arlan transmit timed out, kernel decided\n", dev->name);
1165 /* Try to restart the adaptor. */
1166 arlan_command(dev, ARLAN_COMMAND_CLEAN_AND_RESET);
1167 // dev->trans_start = jiffies;
1168 // netif_start_queue (dev);
1169}
1170
1171
1172static netdev_tx_t arlan_tx(struct sk_buff *skb, struct net_device *dev)
1173{
1174 short length;
1175 unsigned char *buf;
1176
1177 ARLAN_DEBUG_ENTRY("arlan_tx");
1178
1179 length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1180 buf = skb->data;
1181
1182 if (length + 0x12 > 0x800) {
1183 printk(KERN_ERR "TX RING overflow \n");
1184 netif_stop_queue (dev);
1185 }
1186
1187 if (arlan_hw_tx(dev, buf, length) == -1)
1188 goto bad_end;
1189
1190 dev->trans_start = jiffies;
1191
1192 dev_kfree_skb(skb);
1193
1194 arlan_process_interrupt(dev);
1195 ARLAN_DEBUG_EXIT("arlan_tx");
1196 return NETDEV_TX_OK;
1197
1198bad_end:
1199 arlan_process_interrupt(dev);
1200 netif_stop_queue (dev);
1201 ARLAN_DEBUG_EXIT("arlan_tx");
1202 return NETDEV_TX_BUSY;
1203}
1204
1205
1206static inline int DoNotReTransmitCrap(struct net_device *dev)
1207{
1208 struct arlan_private *priv = netdev_priv(dev);
1209
1210 if (TXLAST(dev).length < priv->Conf->ReTransmitPacketMaxSize)
1211 return 1;
1212 return 0;
1213
1214}
1215
1216static inline int DoNotWaitReTransmitCrap(struct net_device *dev)
1217{
1218 struct arlan_private *priv = netdev_priv(dev);
1219
1220 if (TXLAST(dev).length < priv->Conf->waitReTransmitPacketMaxSize)
1221 return 1;
1222 return 0;
1223}
1224
1225static inline void arlan_queue_retransmit(struct net_device *dev)
1226{
1227 struct arlan_private *priv = netdev_priv(dev);
1228
1229 ARLAN_DEBUG_ENTRY("arlan_queue_retransmit");
1230
1231 if (DoNotWaitReTransmitCrap(dev))
1232 {
1233 arlan_drop_tx(dev);
1234 } else
1235 priv->ReTransmitRequested++;
1236
1237 ARLAN_DEBUG_EXIT("arlan_queue_retransmit");
1238}
1239
1240static inline void RetryOrFail(struct net_device *dev)
1241{
1242 struct arlan_private *priv = netdev_priv(dev);
1243
1244 ARLAN_DEBUG_ENTRY("RetryOrFail");
1245
1246 if (priv->retransmissions > priv->Conf->retries ||
1247 DoNotReTransmitCrap(dev))
1248 {
1249 arlan_drop_tx(dev);
1250 }
1251 else if (priv->bad <= priv->Conf->fastReTransCount)
1252 {
1253 arlan_retransmit_now(dev);
1254 }
1255 else arlan_queue_retransmit(dev);
1256
1257 ARLAN_DEBUG_EXIT("RetryOrFail");
1258}
1259
1260
1261static void arlan_tx_done_interrupt(struct net_device *dev, int status)
1262{
1263 struct arlan_private *priv = netdev_priv(dev);
1264
1265 ARLAN_DEBUG_ENTRY("arlan_tx_done_interrupt");
1266
1267 priv->tx_last_cleared = jiffies;
1268 priv->tx_command_given = 0;
1269 switch (status)
1270 {
1271 case 1:
1272 {
1273 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1274 printk("arlan intr: transmit OK\n");
1275 dev->stats.tx_packets++;
1276 priv->bad = 0;
1277 priv->reset = 0;
1278 priv->retransmissions = 0;
1279 if (priv->Conf->tx_delay_ms)
1280 {
1281 priv->tx_done_delayed = jiffies + (priv->Conf->tx_delay_ms * HZ) / 1000 + 1;
1282 }
1283 else
1284 {
1285 TXLAST(dev).offset = 0;
1286 if (priv->txLast)
1287 priv->txLast = 0;
1288 else if (TXTAIL(dev).offset)
1289 priv->txLast = 1;
1290 if (TXLAST(dev).offset)
1291 {
1292 arlan_retransmit_now(dev);
1293 dev->trans_start = jiffies;
1294 }
1295 if (!TXHEAD(dev).offset || !TXTAIL(dev).offset)
1296 {
1297 netif_wake_queue (dev);
1298 }
1299 }
1300 }
1301 break;
1302
1303 case 2:
1304 {
1305 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1306 printk("arlan intr: transmit timed out\n");
1307 priv->bad += 1;
1308 //arlan_queue_retransmit(dev);
1309 RetryOrFail(dev);
1310 }
1311 break;
1312
1313 case 3:
1314 {
1315 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1316 printk("arlan intr: transmit max retries\n");
1317 priv->bad += 1;
1318 priv->reset = 0;
1319 //arlan_queue_retransmit(dev);
1320 RetryOrFail(dev);
1321 }
1322 break;
1323
1324 case 4:
1325 {
1326 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1327 printk("arlan intr: transmit aborted\n");
1328 priv->bad += 1;
1329 arlan_queue_retransmit(dev);
1330 //RetryOrFail(dev);
1331 }
1332 break;
1333
1334 case 5:
1335 {
1336 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1337 printk("arlan intr: transmit not registered\n");
1338 priv->bad += 1;
1339 //debug=101;
1340 arlan_queue_retransmit(dev);
1341 }
1342 break;
1343
1344 case 6:
1345 {
1346 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1347 printk("arlan intr: transmit destination full\n");
1348 priv->bad += 1;
1349 priv->reset = 0;
1350 //arlan_drop_tx(dev);
1351 arlan_queue_retransmit(dev);
1352 }
1353 break;
1354
1355 case 7:
1356 {
1357 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1358 printk("arlan intr: transmit unknown ack\n");
1359 priv->bad += 1;
1360 priv->reset = 0;
1361 arlan_queue_retransmit(dev);
1362 }
1363 break;
1364
1365 case 8:
1366 {
1367 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1368 printk("arlan intr: transmit dest mail box full\n");
1369 priv->bad += 1;
1370 priv->reset = 0;
1371 //arlan_drop_tx(dev);
1372 arlan_queue_retransmit(dev);
1373 }
1374 break;
1375
1376 case 9:
1377 {
1378 IFDEBUG(ARLAN_DEBUG_TX_CHAIN)
1379 printk("arlan intr: transmit root dest not reg.\n");
1380 priv->bad += 1;
1381 priv->reset = 1;
1382 //arlan_drop_tx(dev);
1383 arlan_queue_retransmit(dev);
1384 }
1385 break;
1386
1387 default:
1388 {
1389 printk(KERN_ERR "arlan intr: transmit status unknown\n");
1390 priv->bad += 1;
1391 priv->reset = 1;
1392 arlan_drop_tx(dev);
1393 }
1394 }
1395
1396 ARLAN_DEBUG_EXIT("arlan_tx_done_interrupt");
1397}
1398
1399
1400static void arlan_rx_interrupt(struct net_device *dev, u_char rxStatus, u_short rxOffset, u_short pkt_len)
1401{
1402 char *skbtmp;
1403 int i = 0;
1404
1405 struct arlan_private *priv = netdev_priv(dev);
1406 volatile struct arlan_shmem __iomem *arlan = priv->card;
1407 struct arlan_conf_stru *conf = priv->Conf;
1408
1409
1410 ARLAN_DEBUG_ENTRY("arlan_rx_interrupt");
1411 // by spec, not WRITESHMB(arlan->rxStatus,0x00);
1412 // prohibited here arlan_command(dev, ARLAN_COMMAND_RX);
1413
1414 if (pkt_len < 10 || pkt_len > 2048)
1415 {
1416 printk(KERN_WARNING "%s: got too short or long packet, len %d \n", dev->name, pkt_len);
1417 return;
1418 }
1419 if (rxOffset + pkt_len > 0x2000)
1420 {
1421 printk("%s: got too long packet, len %d offset %x\n", dev->name, pkt_len, rxOffset);
1422 return;
1423 }
1424 priv->in_bytes += pkt_len;
1425 priv->in_bytes10 += pkt_len;
1426 if (conf->measure_rate < 1)
1427 conf->measure_rate = 1;
1428 if (time_after(jiffies, priv->in_time + conf->measure_rate * HZ))
1429 {
1430 conf->in_speed = priv->in_bytes / conf->measure_rate;
1431 priv->in_bytes = 0;
1432 priv->in_time = jiffies;
1433 }
1434 if (time_after(jiffies, priv->in_time10 + conf->measure_rate * 10*HZ))
1435 {
1436 conf->in_speed10 = priv->in_bytes10 / (10 * conf->measure_rate);
1437 priv->in_bytes10 = 0;
1438 priv->in_time10 = jiffies;
1439 }
1440 DEBUGSHM(1, "arlan rcv pkt rxStatus= %d ", arlan->rxStatus, u_char);
1441 switch (rxStatus)
1442 {
1443 case 1:
1444 case 2:
1445 case 3:
1446 {
1447 /* Malloc up new buffer. */
1448 struct sk_buff *skb;
1449
1450 DEBUGSHM(50, "arlan recv pkt offs=%d\n", arlan->rxOffset, u_short);
1451 DEBUGSHM(1, "arlan rxFrmType = %d \n", arlan->rxFrmType, u_char);
1452 DEBUGSHM(1, KERN_INFO "arlan rx scrambled = %d \n", arlan->scrambled, u_char);
1453
1454 /* here we do multicast filtering to avoid slow 8-bit memcopy */
1455#ifdef ARLAN_MULTICAST
1456 if (!(dev->flags & IFF_ALLMULTI) &&
1457 !(dev->flags & IFF_PROMISC) &&
1458 dev->mc_list)
1459 {
1460 char hw_dst_addr[6];
1461 struct dev_mc_list *dmi = dev->mc_list;
1462 int i;
1463
1464 memcpy_fromio(hw_dst_addr, arlan->ultimateDestAddress, 6);
1465 if (hw_dst_addr[0] == 0x01)
1466 {
1467 if (mdebug)
1468 if (hw_dst_addr[1] == 0x00)
1469 printk(KERN_ERR "%s mcast 0x0100 \n", dev->name);
1470 else if (hw_dst_addr[1] == 0x40)
1471 printk(KERN_ERR "%s m/bcast 0x0140 \n", dev->name);
1472 while (dmi)
1473 {
1474 if (dmi->dmi_addrlen == 6) {
1475 if (arlan_debug & ARLAN_DEBUG_HEADER_DUMP)
1476 printk(KERN_ERR "%s mcl %pM\n",
1477 dev->name, dmi->dmi_addr);
1478 for (i = 0; i < 6; i++)
1479 if (dmi->dmi_addr[i] != hw_dst_addr[i])
1480 break;
1481 if (i == 6)
1482 break;
1483 } else
1484 printk(KERN_ERR "%s: invalid multicast address length given.\n", dev->name);
1485 dmi = dmi->next;
1486 }
1487 /* we reach here if multicast filtering is on and packet
1488 * is multicast and not for receive */
1489 goto end_of_interrupt;
1490 }
1491 }
1492#endif // ARLAN_MULTICAST
1493 /* multicast filtering ends here */
1494 pkt_len += ARLAN_FAKE_HDR_LEN;
1495
1496 skb = dev_alloc_skb(pkt_len + 4);
1497 if (skb == NULL)
1498 {
1499 printk(KERN_ERR "%s: Memory squeeze, dropping packet.\n", dev->name);
1500 dev->stats.rx_dropped++;
1501 break;
1502 }
1503 skb_reserve(skb, 2);
1504 skbtmp = skb_put(skb, pkt_len);
1505
1506 memcpy_fromio(skbtmp + ARLAN_FAKE_HDR_LEN, ((char __iomem *) arlan) + rxOffset, pkt_len - ARLAN_FAKE_HDR_LEN);
1507 memcpy_fromio(skbtmp, arlan->ultimateDestAddress, 6);
1508 memcpy_fromio(skbtmp + 6, arlan->rxSrc, 6);
1509 WRITESHMB(arlan->rxStatus, 0x00);
1510 arlan_command(dev, ARLAN_COMMAND_RX);
1511
1512 IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
1513 {
1514 char immedDestAddress[6];
1515 char immedSrcAddress[6];
1516 memcpy_fromio(immedDestAddress, arlan->immedDestAddress, 6);
1517 memcpy_fromio(immedSrcAddress, arlan->immedSrcAddress, 6);
1518
1519 printk(KERN_WARNING "%s t %pM f %pM imd %pM ims %pM\n",
1520 dev->name, skbtmp,
1521 &skbtmp[6],
1522 immedDestAddress,
1523 immedSrcAddress);
1524 }
1525 skb->protocol = eth_type_trans(skb, dev);
1526 IFDEBUG(ARLAN_DEBUG_HEADER_DUMP)
1527 if (skb->protocol != 0x608 && skb->protocol != 0x8)
1528 {
1529 for (i = 0; i <= 22; i++)
1530 printk("%02x:", (u_char) skbtmp[i + 12]);
1531 printk(KERN_ERR "\n");
1532 printk(KERN_WARNING "arlan kernel pkt type trans %x \n", skb->protocol);
1533 }
1534 netif_rx(skb);
1535 dev->stats.rx_packets++;
1536 dev->stats.rx_bytes += pkt_len;
1537 }
1538 break;
1539
1540 default:
1541 printk(KERN_ERR "arlan intr: received unknown status\n");
1542 dev->stats.rx_crc_errors++;
1543 break;
1544 }
1545 ARLAN_DEBUG_EXIT("arlan_rx_interrupt");
1546}
1547
1548static void arlan_process_interrupt(struct net_device *dev)
1549{
1550 struct arlan_private *priv = netdev_priv(dev);
1551 volatile struct arlan_shmem __iomem *arlan = priv->card;
1552 u_char rxStatus = READSHMB(arlan->rxStatus);
1553 u_char txStatus = READSHMB(arlan->txStatus);
1554 u_short rxOffset = READSHMS(arlan->rxOffset);
1555 u_short pkt_len = READSHMS(arlan->rxLength);
1556 int interrupt_count = 0;
1557
1558 ARLAN_DEBUG_ENTRY("arlan_process_interrupt");
1559
1560 if (test_and_set_bit(0, (void *) &priv->interrupt_processing_active))
1561 {
1562 if (arlan_debug & ARLAN_DEBUG_CHAIN_LOCKS)
1563 printk(KERN_ERR "interrupt chain reentering \n");
1564 goto end_int_process;
1565 }
1566 while ((rxStatus || txStatus || priv->interrupt_ack_requested)
1567 && (interrupt_count < 5))
1568 {
1569 if (rxStatus)
1570 priv->last_rx_int_ack_time = jiffies;
1571
1572 arlan_command(dev, ARLAN_COMMAND_INT_ACK);
1573 arlan_command(dev, ARLAN_COMMAND_INT_ENABLE);
1574
1575 IFDEBUG(ARLAN_DEBUG_INTERRUPT)
1576 printk(KERN_ERR "%s: got IRQ rx %x tx %x comm %x rxOff %x rxLen %x \n",
1577 dev->name, rxStatus, txStatus, READSHMB(arlan->commandByte),
1578 rxOffset, pkt_len);
1579
1580 if (rxStatus == 0 && txStatus == 0)
1581 {
1582 if (priv->irq_test_done)
1583 {
1584 if (!registrationBad(dev))
1585 IFDEBUG(ARLAN_DEBUG_INTERRUPT) printk(KERN_ERR "%s unknown interrupt(nop? regLost ?) reason tx %d rx %d ",
1586 dev->name, txStatus, rxStatus);
1587 } else {
1588 IFDEBUG(ARLAN_DEBUG_INTERRUPT)
1589 printk(KERN_INFO "%s irq $%d test OK \n", dev->name, dev->irq);
1590
1591 }
1592 priv->interrupt_ack_requested = 0;
1593 goto ends;
1594 }
1595 if (txStatus != 0)
1596 {
1597 WRITESHMB(arlan->txStatus, 0x00);
1598 arlan_tx_done_interrupt(dev, txStatus);
1599 goto ends;
1600 }
1601 if (rxStatus == 1 || rxStatus == 2)
1602 { /* a packet waiting */
1603 arlan_rx_interrupt(dev, rxStatus, rxOffset, pkt_len);
1604 goto ends;
1605 }
1606 if (rxStatus > 2 && rxStatus < 0xff)
1607 {
1608 WRITESHMB(arlan->rxStatus, 0x00);
1609 printk(KERN_ERR "%s unknown rxStatus reason tx %d rx %d ",
1610 dev->name, txStatus, rxStatus);
1611 goto ends;
1612 }
1613 if (rxStatus == 0xff)
1614 {
1615 WRITESHMB(arlan->rxStatus, 0x00);
1616 arlan_command(dev, ARLAN_COMMAND_RX);
1617 if (registrationBad(dev))
1618 netif_device_detach(dev);
1619 if (!registrationBad(dev))
1620 {
1621 priv->registrationLastSeen = jiffies;
1622 if (!netif_queue_stopped(dev) && !priv->under_reset && !priv->under_config)
1623 netif_wake_queue (dev);
1624 }
1625 goto ends;
1626 }
1627ends:
1628
1629 arlan_command_process(dev);
1630
1631 rxStatus = READSHMB(arlan->rxStatus);
1632 txStatus = READSHMB(arlan->txStatus);
1633 rxOffset = READSHMS(arlan->rxOffset);
1634 pkt_len = READSHMS(arlan->rxLength);
1635
1636
1637 priv->irq_test_done = 1;
1638
1639 interrupt_count++;
1640 }
1641 priv->interrupt_processing_active = 0;
1642
1643end_int_process:
1644 arlan_command_process(dev);
1645
1646 ARLAN_DEBUG_EXIT("arlan_process_interrupt");
1647 return;
1648}
1649
1650static irqreturn_t arlan_interrupt(int irq, void *dev_id)
1651{
1652 struct net_device *dev = dev_id;
1653 struct arlan_private *priv = netdev_priv(dev);
1654 volatile struct arlan_shmem __iomem *arlan = priv->card;
1655 u_char rxStatus = READSHMB(arlan->rxStatus);
1656 u_char txStatus = READSHMB(arlan->txStatus);
1657
1658 ARLAN_DEBUG_ENTRY("arlan_interrupt");
1659
1660
1661 if (!rxStatus && !txStatus)
1662 priv->interrupt_ack_requested++;
1663
1664 arlan_process_interrupt(dev);
1665
1666 priv->irq_test_done = 1;
1667
1668 ARLAN_DEBUG_EXIT("arlan_interrupt");
1669 return IRQ_HANDLED;
1670
1671}
1672
1673
1674static int arlan_close(struct net_device *dev)
1675{
1676 struct arlan_private *priv = netdev_priv(dev);
1677
1678 ARLAN_DEBUG_ENTRY("arlan_close");
1679
1680 del_timer_sync(&priv->timer);
1681
1682 arlan_command(dev, ARLAN_COMMAND_POWERDOWN);
1683
1684 IFDEBUG(ARLAN_DEBUG_STARTUP)
1685 printk(KERN_NOTICE "%s: Closing device\n", dev->name);
1686
1687 netif_stop_queue(dev);
1688 free_irq(dev->irq, dev);
1689
1690 ARLAN_DEBUG_EXIT("arlan_close");
1691 return 0;
1692}
1693
1694#ifdef ARLAN_DEBUGGING
1695static long alignLong(volatile u_char * ptr)
1696{
1697 long ret;
1698 memcpy_fromio(&ret, (void *) ptr, 4);
1699 return ret;
1700}
1701#endif
1702
1703/*
1704 * Get the current statistics.
1705 * This may be called with the card open or closed.
1706 */
1707
1708static struct net_device_stats *arlan_statistics(struct net_device *dev)
1709{
1710 struct arlan_private *priv = netdev_priv(dev);
1711 volatile struct arlan_shmem __iomem *arlan = priv->card;
1712
1713
1714 ARLAN_DEBUG_ENTRY("arlan_statistics");
1715
1716 /* Update the statistics from the device registers. */
1717
1718 READSHM(dev->stats.collisions, arlan->numReTransmissions, u_int);
1719 READSHM(dev->stats.rx_crc_errors, arlan->numCRCErrors, u_int);
1720 READSHM(dev->stats.rx_dropped, arlan->numFramesDiscarded, u_int);
1721 READSHM(dev->stats.rx_fifo_errors, arlan->numRXBufferOverflows, u_int);
1722 READSHM(dev->stats.rx_frame_errors, arlan->numReceiveFramesLost, u_int);
1723 READSHM(dev->stats.rx_over_errors, arlan->numRXOverruns, u_int);
1724 READSHM(dev->stats.rx_packets, arlan->numDatagramsReceived, u_int);
1725 READSHM(dev->stats.tx_aborted_errors, arlan->numAbortErrors, u_int);
1726 READSHM(dev->stats.tx_carrier_errors, arlan->numStatusTimeouts, u_int);
1727 READSHM(dev->stats.tx_dropped, arlan->numDatagramsDiscarded, u_int);
1728 READSHM(dev->stats.tx_fifo_errors, arlan->numTXUnderruns, u_int);
1729 READSHM(dev->stats.tx_packets, arlan->numDatagramsTransmitted, u_int);
1730 READSHM(dev->stats.tx_window_errors, arlan->numHoldOffs, u_int);
1731
1732 ARLAN_DEBUG_EXIT("arlan_statistics");
1733
1734 return &dev->stats;
1735}
1736
1737
1738static void arlan_set_multicast(struct net_device *dev)
1739{
1740 struct arlan_private *priv = netdev_priv(dev);
1741 volatile struct arlan_shmem __iomem *arlan = priv->card;
1742 struct arlan_conf_stru *conf = priv->Conf;
1743 int board_conf_needed = 0;
1744
1745
1746 ARLAN_DEBUG_ENTRY("arlan_set_multicast");
1747
1748 if (dev->flags & IFF_PROMISC)
1749 {
1750 unsigned char recMode;
1751 READSHM(recMode, arlan->receiveMode, u_char);
1752 conf->receiveMode = (ARLAN_RCV_PROMISC | ARLAN_RCV_CONTROL);
1753 if (conf->receiveMode != recMode)
1754 board_conf_needed = 1;
1755 }
1756 else
1757 {
1758 /* turn off promiscuous mode */
1759 unsigned char recMode;
1760 READSHM(recMode, arlan->receiveMode, u_char);
1761 conf->receiveMode = ARLAN_RCV_CLEAN | ARLAN_RCV_CONTROL;
1762 if (conf->receiveMode != recMode)
1763 board_conf_needed = 1;
1764 }
1765 if (board_conf_needed)
1766 arlan_command(dev, ARLAN_COMMAND_CONF);
1767
1768 ARLAN_DEBUG_EXIT("arlan_set_multicast");
1769}
1770
1771
1772struct net_device * __init arlan_probe(int unit)
1773{
1774 struct net_device *dev;
1775 int err;
1776 int m;
1777
1778 ARLAN_DEBUG_ENTRY("arlan_probe");
1779
1780 if (arlans_found == MAX_ARLANS)
1781 return ERR_PTR(-ENODEV);
1782
1783 /*
1784 * Reserve space for local data and a copy of the shared memory
1785 * that is used by the /proc interface.
1786 */
1787 dev = alloc_etherdev(sizeof(struct arlan_private)
1788 + sizeof(struct arlan_shmem));
1789 if (!dev)
1790 return ERR_PTR(-ENOMEM);
1791
1792 if (unit >= 0) {
1793 sprintf(dev->name, "eth%d", unit);
1794 netdev_boot_setup_check(dev);
1795
1796 if (dev->mem_start) {
1797 if (arlan_probe_here(dev, dev->mem_start) == 0)
1798 goto found;
1799 goto not_found;
1800 }
1801
1802 }
1803
1804
1805 for (m = (int)phys_to_virt(lastFoundAt) + ARLAN_SHMEM_SIZE;
1806 m <= (int)phys_to_virt(0xDE000);
1807 m += ARLAN_SHMEM_SIZE)
1808 {
1809 if (arlan_probe_here(dev, m) == 0)
1810 {
1811 lastFoundAt = (int)virt_to_phys((void*)m);
1812 goto found;
1813 }
1814 }
1815
1816 if (lastFoundAt == 0xbe000)
1817 printk(KERN_ERR "arlan: No Arlan devices found \n");
1818
1819 not_found:
1820 free_netdev(dev);
1821 return ERR_PTR(-ENODEV);
1822
1823 found:
1824 err = arlan_setup_device(dev, arlans_found);
1825 if (err)
1826 dev = ERR_PTR(err);
1827 else if (!arlans_found++)
1828 printk(KERN_INFO "Arlan driver %s\n", arlan_version);
1829
1830 return dev;
1831}
1832
1833#ifdef MODULE
1834int __init init_module(void)
1835{
1836 int i = 0;
1837
1838 ARLAN_DEBUG_ENTRY("init_module");
1839
1840 if (channelSet != channelSetUNKNOWN || channelNumber != channelNumberUNKNOWN || systemId != systemIdUNKNOWN)
1841 return -EINVAL;
1842
1843 for (i = 0; i < MAX_ARLANS; i++) {
1844 struct net_device *dev = arlan_probe(i);
1845
1846 if (IS_ERR(dev))
1847 return PTR_ERR(dev);
1848 }
1849 init_arlan_proc();
1850 printk(KERN_INFO "Arlan driver %s\n", arlan_version);
1851 ARLAN_DEBUG_EXIT("init_module");
1852 return 0;
1853}
1854
1855
1856void __exit cleanup_module(void)
1857{
1858 int i = 0;
1859 struct net_device *dev;
1860
1861 ARLAN_DEBUG_ENTRY("cleanup_module");
1862
1863 IFDEBUG(ARLAN_DEBUG_SHUTDOWN)
1864 printk(KERN_INFO "arlan: unloading module\n");
1865
1866 cleanup_arlan_proc();
1867
1868 for (i = 0; i < MAX_ARLANS; i++)
1869 {
1870 dev = arlan_device[i];
1871 if (dev) {
1872 arlan_command(dev, ARLAN_COMMAND_POWERDOWN );
1873
1874 unregister_netdev(dev);
1875 release_mem_region(virt_to_phys((void *) dev->mem_start),
1876 ARLAN_SHMEM_SIZE);
1877 free_netdev(dev);
1878 arlan_device[i] = NULL;
1879 }
1880 }
1881
1882 ARLAN_DEBUG_EXIT("cleanup_module");
1883}
1884
1885
1886#endif
1887MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/arlan-proc.c b/drivers/net/wireless/arlan-proc.c
deleted file mode 100644
index a8b689635a3b..000000000000
--- a/drivers/net/wireless/arlan-proc.c
+++ /dev/null
@@ -1,1253 +0,0 @@
1#include "arlan.h"
2
3#include <linux/sysctl.h>
4
5#ifdef CONFIG_PROC_FS
6
7/* void enableReceive(struct net_device* dev);
8*/
9
10
11
12#define ARLAN_STR_SIZE 0x2ff0
13#define DEV_ARLAN_INFO 1
14#define DEV_ARLAN 1
15#define SARLG(type,var) {\
16 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n", #var, READSHMB(priva->card->var)); \
17 }
18
19#define SARLBN(type,var,nn) {\
20 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x",#var);\
21 for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\
22 pos += sprintf(arlan_drive_info+pos, "\n"); \
23 }
24
25#define SARLBNpln(type,var,nn) {\
26 for (i=0; i < nn; i++ ) pos += sprintf(arlan_drive_info+pos, "%02x",READSHMB(priva->card->var[i]));\
27 }
28
29#define SARLSTR(var,nn) {\
30 char tmpStr[400];\
31 int tmpLn = nn;\
32 if (nn > 399 ) tmpLn = 399; \
33 memcpy(tmpStr,(char *) priva->conf->var,tmpLn);\
34 tmpStr[tmpLn] = 0; \
35 pos += sprintf(arlan_drive_info+pos, "%s\t=\t%s \n",#var,priva->conf->var);\
36 }
37
38#define SARLUC(var) SARLG(u_char, var)
39#define SARLUCN(var,nn) SARLBN(u_char,var, nn)
40#define SARLUS(var) SARLG(u_short, var)
41#define SARLUSN(var,nn) SARLBN(u_short,var, nn)
42#define SARLUI(var) SARLG(u_int, var)
43
44#define SARLUSA(var) {\
45 u_short tmpVar;\
46 memcpy(&tmpVar, (short *) priva->conf->var,2); \
47 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\
48}
49
50#define SARLUIA(var) {\
51 u_int tmpVar;\
52 memcpy(&tmpVar, (int* )priva->conf->var,4); \
53 pos += sprintf(arlan_drive_info+pos, "%s\t=\t0x%x\n",#var, tmpVar);\
54}
55
56
57static const char *arlan_diagnostic_info_string(struct net_device *dev)
58{
59
60 struct arlan_private *priv = netdev_priv(dev);
61 volatile struct arlan_shmem __iomem *arlan = priv->card;
62 u_char diagnosticInfo;
63
64 READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char);
65
66 switch (diagnosticInfo)
67 {
68 case 0xFF:
69 return "Diagnostic info is OK";
70 case 0xFE:
71 return "ERROR EPROM Checksum error ";
72 case 0xFD:
73 return "ERROR Local Ram Test Failed ";
74 case 0xFC:
75 return "ERROR SCC failure ";
76 case 0xFB:
77 return "ERROR BackBone failure ";
78 case 0xFA:
79 return "ERROR transceiver not found ";
80 case 0xF9:
81 return "ERROR no more address space ";
82 case 0xF8:
83 return "ERROR Checksum error ";
84 case 0xF7:
85 return "ERROR Missing SS Code";
86 case 0xF6:
87 return "ERROR Invalid config format";
88 case 0xF5:
89 return "ERROR Reserved errorcode F5";
90 case 0xF4:
91 return "ERROR Invalid spreading code/channel number";
92 case 0xF3:
93 return "ERROR Load Code Error";
94 case 0xF2:
95 return "ERROR Reserver errorcode F2 ";
96 case 0xF1:
97 return "ERROR Invalid command receivec by LAN card ";
98 case 0xF0:
99 return "ERROR Invalid parameter found in command ";
100 case 0xEF:
101 return "ERROR On-chip timer failure ";
102 case 0xEE:
103 return "ERROR T410 timer failure ";
104 case 0xED:
105 return "ERROR Too Many TxEnable commands ";
106 case 0xEC:
107 return "ERROR EEPROM error on radio module ";
108 default:
109 return "ERROR unknown Diagnostic info reply code ";
110 }
111}
112
113static const char *arlan_hardware_type_string(struct net_device *dev)
114{
115 u_char hardwareType;
116 struct arlan_private *priv = netdev_priv(dev);
117 volatile struct arlan_shmem __iomem *arlan = priv->card;
118
119 READSHM(hardwareType, arlan->hardwareType, u_char);
120 switch (hardwareType)
121 {
122 case 0x00:
123 return "type A450";
124 case 0x01:
125 return "type A650 ";
126 case 0x04:
127 return "type TMA coproc";
128 case 0x0D:
129 return "type A650E ";
130 case 0x18:
131 return "type TMA coproc Australian";
132 case 0x19:
133 return "type A650A ";
134 case 0x26:
135 return "type TMA coproc European";
136 case 0x2E:
137 return "type A655 ";
138 case 0x2F:
139 return "type A655A ";
140 case 0x30:
141 return "type A655E ";
142 case 0x0B:
143 return "type A670 ";
144 case 0x0C:
145 return "type A670E ";
146 case 0x2D:
147 return "type A670A ";
148 case 0x0F:
149 return "type A411T";
150 case 0x16:
151 return "type A411TA";
152 case 0x1B:
153 return "type A440T";
154 case 0x1C:
155 return "type A412T";
156 case 0x1E:
157 return "type A412TA";
158 case 0x22:
159 return "type A411TE";
160 case 0x24:
161 return "type A412TE";
162 case 0x27:
163 return "type A671T ";
164 case 0x29:
165 return "type A671TA ";
166 case 0x2B:
167 return "type A671TE ";
168 case 0x31:
169 return "type A415T ";
170 case 0x33:
171 return "type A415TA ";
172 case 0x35:
173 return "type A415TE ";
174 case 0x37:
175 return "type A672";
176 case 0x39:
177 return "type A672A ";
178 case 0x3B:
179 return "type A672T";
180 case 0x6B:
181 return "type IC2200";
182 default:
183 return "type A672T";
184 }
185}
186#ifdef ARLAN_DEBUGGING
187static void arlan_print_diagnostic_info(struct net_device *dev)
188{
189 int i;
190 u_char diagnosticInfo;
191 u_short diagnosticOffset;
192 u_char hardwareType;
193 struct arlan_private *priv = netdev_priv(dev);
194 volatile struct arlan_shmem __iomem *arlan = priv->card;
195
196 // ARLAN_DEBUG_ENTRY("arlan_print_diagnostic_info");
197
198 if (READSHMB(arlan->configuredStatusFlag) == 0)
199 printk("Arlan: Card NOT configured\n");
200 else
201 printk("Arlan: Card is configured\n");
202
203 READSHM(diagnosticInfo, arlan->diagnosticInfo, u_char);
204 READSHM(diagnosticOffset, arlan->diagnosticOffset, u_short);
205
206 printk(KERN_INFO "%s\n", arlan_diagnostic_info_string(dev));
207
208 if (diagnosticInfo != 0xff)
209 printk("%s arlan: Diagnostic Offset %d \n", dev->name, diagnosticOffset);
210
211 printk("arlan: LAN CODE ID = ");
212 for (i = 0; i < 6; i++)
213 DEBUGSHM(1, "%03d:", arlan->lanCardNodeId[i], u_char);
214 printk("\n");
215
216 printk("arlan: Arlan BroadCast address = ");
217 for (i = 0; i < 6; i++)
218 DEBUGSHM(1, "%03d:", arlan->broadcastAddress[i], u_char);
219 printk("\n");
220
221 READSHM(hardwareType, arlan->hardwareType, u_char);
222 printk(KERN_INFO "%s\n", arlan_hardware_type_string(dev));
223
224
225 DEBUGSHM(1, "arlan: channelNumber=%d\n", arlan->channelNumber, u_char);
226 DEBUGSHM(1, "arlan: channelSet=%d\n", arlan->channelSet, u_char);
227 DEBUGSHM(1, "arlan: spreadingCode=%d\n", arlan->spreadingCode, u_char);
228 DEBUGSHM(1, "arlan: radioNodeId=%d\n", arlan->radioNodeId, u_short);
229 DEBUGSHM(1, "arlan: SID =%d\n", arlan->SID, u_short);
230 DEBUGSHM(1, "arlan: rxOffset=%d\n", arlan->rxOffset, u_short);
231
232 DEBUGSHM(1, "arlan: registration mode is %d\n", arlan->registrationMode, u_char);
233
234 printk("arlan: name= ");
235 IFDEBUG(1)
236
237 for (i = 0; i < 16; i++)
238 {
239 char c;
240 READSHM(c, arlan->name[i], char);
241 if (c)
242 printk("%c", c);
243 }
244 printk("\n");
245
246// ARLAN_DEBUG_EXIT("arlan_print_diagnostic_info");
247
248}
249
250
251/****************************** TEST MEMORY **************/
252
253static int arlan_hw_test_memory(struct net_device *dev)
254{
255 u_char *ptr;
256 int i;
257 int memlen = sizeof(struct arlan_shmem) - 0xF; /* avoid control register */
258 volatile char *arlan_mem = (char *) (dev->mem_start);
259 struct arlan_private *priv = netdev_priv(dev);
260 volatile struct arlan_shmem __iomem *arlan = priv->card;
261 char pattern;
262
263 ptr = NULL;
264
265 /* hold card in reset state */
266 setHardwareReset(dev);
267
268 /* test memory */
269 pattern = 0;
270 for (i = 0; i < memlen; i++)
271 WRITESHM(arlan_mem[i], ((u_char) pattern++), u_char);
272
273 pattern = 0;
274 for (i = 0; i < memlen; i++)
275 {
276 char res;
277 READSHM(res, arlan_mem[i], char);
278 if (res != pattern++)
279 {
280 printk(KERN_ERR "Arlan driver memory test 1 failed \n");
281 return -1;
282 }
283 }
284
285 pattern = 0;
286 for (i = 0; i < memlen; i++)
287 WRITESHM(arlan_mem[i], ~(pattern++), char);
288
289 pattern = 0;
290 for (i = 0; i < memlen; i++)
291 {
292 char res;
293 READSHM(res, arlan_mem[i], char);
294 if (res != ~(pattern++))
295 {
296 printk(KERN_ERR "Arlan driver memory test 2 failed \n");
297 return -1;
298 }
299 }
300
301 /* zero memory */
302 for (i = 0; i < memlen; i++)
303 WRITESHM(arlan_mem[i], 0x00, char);
304
305 IFDEBUG(1) printk(KERN_INFO "Arlan: memory tests ok\n");
306
307 /* set reset flag and then release reset */
308 WRITESHM(arlan->resetFlag, 0xff, u_char);
309
310 clearChannelAttention(dev);
311 clearHardwareReset(dev);
312
313 /* wait for reset flag to become zero, we'll wait for two seconds */
314 if (arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW))
315 {
316 printk(KERN_ERR "%s arlan: failed to come back from memory test\n", dev->name);
317 return -1;
318 }
319 return 0;
320}
321
322static int arlan_setup_card_by_book(struct net_device *dev)
323{
324 u_char irqLevel, configuredStatusFlag;
325 struct arlan_private *priv = netdev_priv(dev);
326 volatile struct arlan_shmem __iomem *arlan = priv->card;
327
328// ARLAN_DEBUG_ENTRY("arlan_setup_card");
329
330 READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char);
331
332 IFDEBUG(10)
333 if (configuredStatusFlag != 0)
334 IFDEBUG(10) printk("arlan: CARD IS CONFIGURED\n");
335 else
336 IFDEBUG(10) printk("arlan: card is NOT configured\n");
337
338 if (testMemory || (READSHMB(arlan->diagnosticInfo) != 0xff))
339 if (arlan_hw_test_memory(dev))
340 return -1;
341
342 DEBUGSHM(4, "arlan configuredStatus = %d \n", arlan->configuredStatusFlag, u_char);
343 DEBUGSHM(4, "arlan driver diagnostic: 0x%2x\n", arlan->diagnosticInfo, u_char);
344
345 /* issue nop command - no interrupt */
346 arlan_command(dev, ARLAN_COMMAND_NOOP);
347 if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0)
348 return -1;
349
350 IFDEBUG(50) printk("1st Noop successfully executed !!\n");
351
352 /* try to turn on the arlan interrupts */
353 clearClearInterrupt(dev);
354 setClearInterrupt(dev);
355 setInterruptEnable(dev);
356
357 /* issue nop command - with interrupt */
358
359 arlan_command(dev, ARLAN_COMMAND_NOOPINT);
360 if (arlan_command(dev, ARLAN_COMMAND_WAIT_NOW) != 0)
361 return -1;
362
363
364 IFDEBUG(50) printk("2nd Noop successfully executed !!\n");
365
366 READSHM(irqLevel, arlan->irqLevel, u_char)
367
368 if (irqLevel != dev->irq)
369 {
370 IFDEBUG(1) printk(KERN_WARNING "arlan dip switches set irq to %d\n", irqLevel);
371 printk(KERN_WARNING "device driver irq set to %d - does not match\n", dev->irq);
372 dev->irq = irqLevel;
373 }
374 else
375 IFDEBUG(2) printk("irq level is OK\n");
376
377
378 IFDEBUG(3) arlan_print_diagnostic_info(dev);
379
380 arlan_command(dev, ARLAN_COMMAND_CONF);
381
382 READSHM(configuredStatusFlag, arlan->configuredStatusFlag, u_char);
383 if (configuredStatusFlag == 0)
384 {
385 printk(KERN_WARNING "arlan configure failed\n");
386 return -1;
387 }
388 arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW);
389 arlan_command(dev, ARLAN_COMMAND_RX);
390 arlan_command(dev, ARLAN_COMMAND_LONG_WAIT_NOW);
391 printk(KERN_NOTICE "%s: arlan driver version %s loaded\n",
392 dev->name, arlan_version);
393
394// ARLAN_DEBUG_EXIT("arlan_setup_card");
395
396 return 0; /* no errors */
397}
398#endif
399
400#ifdef ARLAN_PROC_INTERFACE
401#ifdef ARLAN_PROC_SHM_DUMP
402
403static char arlan_drive_info[ARLAN_STR_SIZE] = "A655\n\0";
404
405static int arlan_sysctl_info(ctl_table * ctl, int write,
406 void __user *buffer, size_t * lenp, loff_t *ppos)
407{
408 int i;
409 int retv, pos, devnum;
410 struct arlan_private *priva = NULL;
411 struct net_device *dev;
412 pos = 0;
413 if (write)
414 {
415 printk("wrirte: ");
416 for (i = 0; i < 100; i++)
417 printk("adi %x \n", arlan_drive_info[i]);
418 }
419 if (ctl->procname == NULL || arlan_drive_info == NULL)
420 {
421 printk(KERN_WARNING " procname is NULL in sysctl_table or arlan_drive_info is NULL \n at arlan module\n ");
422 return -1;
423 }
424 devnum = ctl->procname[5] - '0';
425 if (devnum < 0 || devnum > MAX_ARLANS - 1)
426 {
427 printk(KERN_WARNING "too strange devnum in procfs parse\n ");
428 return -1;
429 }
430 else if (arlan_device[devnum] == NULL)
431 {
432 if (ctl->procname)
433 pos += sprintf(arlan_drive_info + pos, "\t%s\n\n", ctl->procname);
434 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
435 goto final;
436 }
437 else
438 priva = netdev_priv(arlan_device[devnum]);
439
440 if (priva == NULL)
441 {
442 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
443 return -1;
444 }
445 dev = arlan_device[devnum];
446
447 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
448
449 pos = sprintf(arlan_drive_info, "Arlan info \n");
450 /* Header Signature */
451 SARLSTR(textRegion, 48);
452 SARLUC(resetFlag);
453 pos += sprintf(arlan_drive_info + pos, "diagnosticInfo\t=\t%s \n", arlan_diagnostic_info_string(dev));
454 SARLUC(diagnosticInfo);
455 SARLUS(diagnosticOffset);
456 SARLUCN(_1, 12);
457 SARLUCN(lanCardNodeId, 6);
458 SARLUCN(broadcastAddress, 6);
459 pos += sprintf(arlan_drive_info + pos, "hardwareType =\t %s \n", arlan_hardware_type_string(dev));
460 SARLUC(hardwareType);
461 SARLUC(majorHardwareVersion);
462 SARLUC(minorHardwareVersion);
463 SARLUC(radioModule);
464 SARLUC(defaultChannelSet);
465 SARLUCN(_2, 47);
466
467 /* Control/Status Block - 0x0080 */
468 SARLUC(interruptInProgress);
469 SARLUC(cntrlRegImage);
470
471 SARLUCN(_3, 14);
472 SARLUC(commandByte);
473 SARLUCN(commandParameter, 15);
474
475 /* Receive Status - 0x00a0 */
476 SARLUC(rxStatus);
477 SARLUC(rxFrmType);
478 SARLUS(rxOffset);
479 SARLUS(rxLength);
480 SARLUCN(rxSrc, 6);
481 SARLUC(rxBroadcastFlag);
482 SARLUC(rxQuality);
483 SARLUC(scrambled);
484 SARLUCN(_4, 1);
485
486 /* Transmit Status - 0x00b0 */
487 SARLUC(txStatus);
488 SARLUC(txAckQuality);
489 SARLUC(numRetries);
490 SARLUCN(_5, 14);
491 SARLUCN(registeredRouter, 6);
492 SARLUCN(backboneRouter, 6);
493 SARLUC(registrationStatus);
494 SARLUC(configuredStatusFlag);
495 SARLUCN(_6, 1);
496 SARLUCN(ultimateDestAddress, 6);
497 SARLUCN(immedDestAddress, 6);
498 SARLUCN(immedSrcAddress, 6);
499 SARLUS(rxSequenceNumber);
500 SARLUC(assignedLocaltalkAddress);
501 SARLUCN(_7, 27);
502
503 /* System Parameter Block */
504
505 /* - Driver Parameters (Novell Specific) */
506
507 SARLUS(txTimeout);
508 SARLUS(transportTime);
509 SARLUCN(_8, 4);
510
511 /* - Configuration Parameters */
512 SARLUC(irqLevel);
513 SARLUC(spreadingCode);
514 SARLUC(channelSet);
515 SARLUC(channelNumber);
516 SARLUS(radioNodeId);
517 SARLUCN(_9, 2);
518 SARLUC(scramblingDisable);
519 SARLUC(radioType);
520 SARLUS(routerId);
521 SARLUCN(_10, 9);
522 SARLUC(txAttenuation);
523 SARLUIA(systemId);
524 SARLUS(globalChecksum);
525 SARLUCN(_11, 4);
526 SARLUS(maxDatagramSize);
527 SARLUS(maxFrameSize);
528 SARLUC(maxRetries);
529 SARLUC(receiveMode);
530 SARLUC(priority);
531 SARLUC(rootOrRepeater);
532 SARLUCN(specifiedRouter, 6);
533 SARLUS(fastPollPeriod);
534 SARLUC(pollDecay);
535 SARLUSA(fastPollDelay);
536 SARLUC(arlThreshold);
537 SARLUC(arlDecay);
538 SARLUCN(_12, 1);
539 SARLUS(specRouterTimeout);
540 SARLUCN(_13, 5);
541
542 /* Scrambled Area */
543 SARLUIA(SID);
544 SARLUCN(encryptionKey, 12);
545 SARLUIA(_14);
546 SARLUSA(waitTime);
547 SARLUSA(lParameter);
548 SARLUCN(_15, 3);
549 SARLUS(headerSize);
550 SARLUS(sectionChecksum);
551
552 SARLUC(registrationMode);
553 SARLUC(registrationFill);
554 SARLUS(pollPeriod);
555 SARLUS(refreshPeriod);
556 SARLSTR(name, 16);
557 SARLUCN(NID, 6);
558 SARLUC(localTalkAddress);
559 SARLUC(codeFormat);
560 SARLUC(numChannels);
561 SARLUC(channel1);
562 SARLUC(channel2);
563 SARLUC(channel3);
564 SARLUC(channel4);
565 SARLUCN(SSCode, 59);
566
567/* SARLUCN( _16, 0x140);
568 */
569 /* Statistics Block - 0x0300 */
570 SARLUC(hostcpuLock);
571 SARLUC(lancpuLock);
572 SARLUCN(resetTime, 18);
573 SARLUIA(numDatagramsTransmitted);
574 SARLUIA(numReTransmissions);
575 SARLUIA(numFramesDiscarded);
576 SARLUIA(numDatagramsReceived);
577 SARLUIA(numDuplicateReceivedFrames);
578 SARLUIA(numDatagramsDiscarded);
579 SARLUS(maxNumReTransmitDatagram);
580 SARLUS(maxNumReTransmitFrames);
581 SARLUS(maxNumConsecutiveDuplicateFrames);
582 /* misaligned here so we have to go to characters */
583 SARLUIA(numBytesTransmitted);
584 SARLUIA(numBytesReceived);
585 SARLUIA(numCRCErrors);
586 SARLUIA(numLengthErrors);
587 SARLUIA(numAbortErrors);
588 SARLUIA(numTXUnderruns);
589 SARLUIA(numRXOverruns);
590 SARLUIA(numHoldOffs);
591 SARLUIA(numFramesTransmitted);
592 SARLUIA(numFramesReceived);
593 SARLUIA(numReceiveFramesLost);
594 SARLUIA(numRXBufferOverflows);
595 SARLUIA(numFramesDiscardedAddrMismatch);
596 SARLUIA(numFramesDiscardedSIDMismatch);
597 SARLUIA(numPollsTransmistted);
598 SARLUIA(numPollAcknowledges);
599 SARLUIA(numStatusTimeouts);
600 SARLUIA(numNACKReceived);
601 SARLUS(auxCmd);
602 SARLUCN(dumpPtr, 4);
603 SARLUC(dumpVal);
604 SARLUC(wireTest);
605
606 /* next 4 seems too long for procfs, over single page ?
607 SARLUCN( _17, 0x86);
608 SARLUCN( txBuffer, 0x800);
609 SARLUCN( rxBuffer, 0x800);
610 SARLUCN( _18, 0x0bff);
611 */
612
613 pos += sprintf(arlan_drive_info + pos, "rxRing\t=\t0x");
614 for (i = 0; i < 0x50; i++)
615 pos += sprintf(arlan_drive_info + pos, "%02x", ((char *) priva->conf)[priva->conf->rxOffset + i]);
616 pos += sprintf(arlan_drive_info + pos, "\n");
617
618 SARLUC(configStatus);
619 SARLUC(_22);
620 SARLUC(progIOCtrl);
621 SARLUC(shareMBase);
622 SARLUC(controlRegister);
623
624 pos += sprintf(arlan_drive_info + pos, " total %d chars\n", pos);
625 if (ctl)
626 if (ctl->procname)
627 pos += sprintf(arlan_drive_info + pos, " driver name : %s\n", ctl->procname);
628final:
629 *lenp = pos;
630
631 if (!write)
632 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
633 else
634 {
635 *lenp = 0;
636 return -1;
637 }
638 return retv;
639}
640
641
642static int arlan_sysctl_info161719(ctl_table * ctl, int write,
643 void __user *buffer, size_t * lenp, loff_t *ppos)
644{
645 int i;
646 int retv, pos, devnum;
647 struct arlan_private *priva = NULL;
648
649 pos = 0;
650 devnum = ctl->procname[5] - '0';
651 if (arlan_device[devnum] == NULL)
652 {
653 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
654 goto final;
655 }
656 else
657 priva = netdev_priv(arlan_device[devnum]);
658 if (priva == NULL)
659 {
660 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
661 return -1;
662 }
663 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
664 SARLUCN(_16, 0xC0);
665 SARLUCN(_17, 0x6A);
666 SARLUCN(_18, 14);
667 SARLUCN(_19, 0x86);
668 SARLUCN(_21, 0x3fd);
669
670final:
671 *lenp = pos;
672 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
673 return retv;
674}
675
676static int arlan_sysctl_infotxRing(ctl_table * ctl, int write,
677 void __user *buffer, size_t * lenp, loff_t *ppos)
678{
679 int i;
680 int retv, pos, devnum;
681 struct arlan_private *priva = NULL;
682
683 pos = 0;
684 devnum = ctl->procname[5] - '0';
685 if (arlan_device[devnum] == NULL)
686 {
687 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
688 goto final;
689 }
690 else
691 priva = netdev_priv(arlan_device[devnum]);
692 if (priva == NULL)
693 {
694 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
695 return -1;
696 }
697 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
698 SARLBNpln(u_char, txBuffer, 0x800);
699final:
700 *lenp = pos;
701 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
702 return retv;
703}
704
705static int arlan_sysctl_inforxRing(ctl_table * ctl, int write,
706 void __user *buffer, size_t * lenp, loff_t *ppos)
707{
708 int i;
709 int retv, pos, devnum;
710 struct arlan_private *priva = NULL;
711
712 pos = 0;
713 devnum = ctl->procname[5] - '0';
714 if (arlan_device[devnum] == NULL)
715 {
716 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
717 goto final;
718 } else
719 priva = netdev_priv(arlan_device[devnum]);
720 if (priva == NULL)
721 {
722 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
723 return -1;
724 }
725 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
726 SARLBNpln(u_char, rxBuffer, 0x800);
727final:
728 *lenp = pos;
729 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
730 return retv;
731}
732
733static int arlan_sysctl_info18(ctl_table * ctl, int write,
734 void __user *buffer, size_t * lenp, loff_t *ppos)
735{
736 int i;
737 int retv, pos, devnum;
738 struct arlan_private *priva = NULL;
739
740 pos = 0;
741 devnum = ctl->procname[5] - '0';
742 if (arlan_device[devnum] == NULL)
743 {
744 pos += sprintf(arlan_drive_info + pos, "No device found here \n");
745 goto final;
746 }
747 else
748 priva = netdev_priv(arlan_device[devnum]);
749 if (priva == NULL)
750 {
751 printk(KERN_WARNING " Could not find the device private in arlan procsys, bad\n ");
752 return -1;
753 }
754 memcpy_fromio(priva->conf, priva->card, sizeof(struct arlan_shmem));
755 SARLBNpln(u_char, _18, 0x800);
756
757final:
758 *lenp = pos;
759 retv = proc_dostring(ctl, write, buffer, lenp, ppos);
760 return retv;
761}
762
763
764#endif /* #ifdef ARLAN_PROC_SHM_DUMP */
765
766
767static char conf_reset_result[200];
768
769static int arlan_configure(ctl_table * ctl, int write,
770 void __user *buffer, size_t * lenp, loff_t *ppos)
771{
772 int pos = 0;
773 int devnum = ctl->procname[6] - '0';
774 struct arlan_private *priv;
775
776 if (devnum < 0 || devnum > MAX_ARLANS - 1)
777 {
778 printk(KERN_WARNING "too strange devnum in procfs parse\n ");
779 return -1;
780 }
781 else if (arlan_device[devnum] != NULL)
782 {
783 priv = netdev_priv(arlan_device[devnum]);
784
785 arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_CONF);
786 }
787 else
788 return -1;
789
790 *lenp = pos;
791 return proc_dostring(ctl, write, buffer, lenp, ppos);
792}
793
794static int arlan_sysctl_reset(ctl_table * ctl, int write,
795 void __user *buffer, size_t * lenp, loff_t *ppos)
796{
797 int pos = 0;
798 int devnum = ctl->procname[5] - '0';
799 struct arlan_private *priv;
800
801 if (devnum < 0 || devnum > MAX_ARLANS - 1)
802 {
803 printk(KERN_WARNING "too strange devnum in procfs parse\n ");
804 return -1;
805 }
806 else if (arlan_device[devnum] != NULL)
807 {
808 priv = netdev_priv(arlan_device[devnum]);
809 arlan_command(arlan_device[devnum], ARLAN_COMMAND_CLEAN_AND_RESET);
810
811 } else
812 return -1;
813 *lenp = pos + 3;
814 return proc_dostring(ctl, write, buffer, lenp, ppos);
815}
816
817
818/* Place files in /proc/sys/dev/arlan */
819#define CTBLN(num,card,nam) \
820 { .ctl_name = num,\
821 .procname = #nam,\
822 .data = &(arlan_conf[card].nam),\
823 .maxlen = sizeof(int), .mode = 0600, .proc_handler = &proc_dointvec}
824#ifdef ARLAN_DEBUGGING
825
826#define ARLAN_PROC_DEBUG_ENTRIES \
827 { .ctl_name = 48, .procname = "entry_exit_debug",\
828 .data = &arlan_entry_and_exit_debug,\
829 .maxlen = sizeof(int), .mode = 0600, .proc_handler = &proc_dointvec},\
830 { .ctl_name = 49, .procname = "debug", .data = &arlan_debug,\
831 .maxlen = sizeof(int), .mode = 0600, .proc_handler = &proc_dointvec},
832#else
833#define ARLAN_PROC_DEBUG_ENTRIES
834#endif
835
836#define ARLAN_SYSCTL_TABLE_TOTAL(cardNo)\
837 CTBLN(1,cardNo,spreadingCode),\
838 CTBLN(2,cardNo, channelNumber),\
839 CTBLN(3,cardNo, scramblingDisable),\
840 CTBLN(4,cardNo, txAttenuation),\
841 CTBLN(5,cardNo, systemId), \
842 CTBLN(6,cardNo, maxDatagramSize),\
843 CTBLN(7,cardNo, maxFrameSize),\
844 CTBLN(8,cardNo, maxRetries),\
845 CTBLN(9,cardNo, receiveMode),\
846 CTBLN(10,cardNo, priority),\
847 CTBLN(11,cardNo, rootOrRepeater),\
848 CTBLN(12,cardNo, SID),\
849 CTBLN(13,cardNo, registrationMode),\
850 CTBLN(14,cardNo, registrationFill),\
851 CTBLN(15,cardNo, localTalkAddress),\
852 CTBLN(16,cardNo, codeFormat),\
853 CTBLN(17,cardNo, numChannels),\
854 CTBLN(18,cardNo, channel1),\
855 CTBLN(19,cardNo, channel2),\
856 CTBLN(20,cardNo, channel3),\
857 CTBLN(21,cardNo, channel4),\
858 CTBLN(22,cardNo, txClear),\
859 CTBLN(23,cardNo, txRetries),\
860 CTBLN(24,cardNo, txRouting),\
861 CTBLN(25,cardNo, txScrambled),\
862 CTBLN(26,cardNo, rxParameter),\
863 CTBLN(27,cardNo, txTimeoutMs),\
864 CTBLN(28,cardNo, waitCardTimeout),\
865 CTBLN(29,cardNo, channelSet), \
866 {.ctl_name = 30, .procname = "name",\
867 .data = arlan_conf[cardNo].siteName,\
868 .maxlen = 16, .mode = 0600, .proc_handler = &proc_dostring},\
869 CTBLN(31,cardNo,waitTime),\
870 CTBLN(32,cardNo,lParameter),\
871 CTBLN(33,cardNo,_15),\
872 CTBLN(34,cardNo,headerSize),\
873 CTBLN(36,cardNo,tx_delay_ms),\
874 CTBLN(37,cardNo,retries),\
875 CTBLN(38,cardNo,ReTransmitPacketMaxSize),\
876 CTBLN(39,cardNo,waitReTransmitPacketMaxSize),\
877 CTBLN(40,cardNo,fastReTransCount),\
878 CTBLN(41,cardNo,driverRetransmissions),\
879 CTBLN(42,cardNo,txAckTimeoutMs),\
880 CTBLN(43,cardNo,registrationInterrupts),\
881 CTBLN(44,cardNo,hardwareType),\
882 CTBLN(45,cardNo,radioType),\
883 CTBLN(46,cardNo,writeEEPROM),\
884 CTBLN(47,cardNo,writeRadioType),\
885 ARLAN_PROC_DEBUG_ENTRIES\
886 CTBLN(50,cardNo,in_speed),\
887 CTBLN(51,cardNo,out_speed),\
888 CTBLN(52,cardNo,in_speed10),\
889 CTBLN(53,cardNo,out_speed10),\
890 CTBLN(54,cardNo,in_speed_max),\
891 CTBLN(55,cardNo,out_speed_max),\
892 CTBLN(56,cardNo,measure_rate),\
893 CTBLN(57,cardNo,pre_Command_Wait),\
894 CTBLN(58,cardNo,rx_tweak1),\
895 CTBLN(59,cardNo,rx_tweak2),\
896 CTBLN(60,cardNo,tx_queue_len),\
897
898
899
900static ctl_table arlan_conf_table0[] =
901{
902 ARLAN_SYSCTL_TABLE_TOTAL(0)
903
904#ifdef ARLAN_PROC_SHM_DUMP
905 {
906 .ctl_name = 150,
907 .procname = "arlan0-txRing",
908 .data = &arlan_drive_info,
909 .maxlen = ARLAN_STR_SIZE,
910 .mode = 0400,
911 .proc_handler = &arlan_sysctl_infotxRing,
912 },
913 {
914 .ctl_name = 151,
915 .procname = "arlan0-rxRing",
916 .data = &arlan_drive_info,
917 .maxlen = ARLAN_STR_SIZE,
918 .mode = 0400,
919 .proc_handler = &arlan_sysctl_inforxRing,
920 },
921 {
922 .ctl_name = 152,
923 .procname = "arlan0-18",
924 .data = &arlan_drive_info,
925 .maxlen = ARLAN_STR_SIZE,
926 .mode = 0400,
927 .proc_handler = &arlan_sysctl_info18,
928 },
929 {
930 .ctl_name = 153,
931 .procname = "arlan0-ring",
932 .data = &arlan_drive_info,
933 .maxlen = ARLAN_STR_SIZE,
934 .mode = 0400,
935 .proc_handler = &arlan_sysctl_info161719,
936 },
937 {
938 .ctl_name = 154,
939 .procname = "arlan0-shm-cpy",
940 .data = &arlan_drive_info,
941 .maxlen = ARLAN_STR_SIZE,
942 .mode = 0400,
943 .proc_handler = &arlan_sysctl_info,
944 },
945#endif
946 {
947 .ctl_name = 155,
948 .procname = "config0",
949 .data = &conf_reset_result,
950 .maxlen = 100,
951 .mode = 0400,
952 .proc_handler = &arlan_configure
953 },
954 {
955 .ctl_name = 156,
956 .procname = "reset0",
957 .data = &conf_reset_result,
958 .maxlen = 100,
959 .mode = 0400,
960 .proc_handler = &arlan_sysctl_reset,
961 },
962 { .ctl_name = 0 }
963};
964
965static ctl_table arlan_conf_table1[] =
966{
967
968 ARLAN_SYSCTL_TABLE_TOTAL(1)
969
970#ifdef ARLAN_PROC_SHM_DUMP
971 {
972 .ctl_name = 150,
973 .procname = "arlan1-txRing",
974 .data = &arlan_drive_info,
975 .maxlen = ARLAN_STR_SIZE,
976 .mode = 0400,
977 .proc_handler = &arlan_sysctl_infotxRing,
978 },
979 {
980 .ctl_name = 151,
981 .procname = "arlan1-rxRing",
982 .data = &arlan_drive_info,
983 .maxlen = ARLAN_STR_SIZE,
984 .mode = 0400,
985 .proc_handler = &arlan_sysctl_inforxRing,
986 },
987 {
988 .ctl_name = 152,
989 .procname = "arlan1-18",
990 .data = &arlan_drive_info,
991 .maxlen = ARLAN_STR_SIZE,
992 .mode = 0400,
993 .proc_handler = &arlan_sysctl_info18,
994 },
995 {
996 .ctl_name = 153,
997 .procname = "arlan1-ring",
998 .data = &arlan_drive_info,
999 .maxlen = ARLAN_STR_SIZE,
1000 .mode = 0400,
1001 .proc_handler = &arlan_sysctl_info161719,
1002 },
1003 {
1004 .ctl_name = 154,
1005 .procname = "arlan1-shm-cpy",
1006 .data = &arlan_drive_info,
1007 .maxlen = ARLAN_STR_SIZE,
1008 .mode = 0400,
1009 .proc_handler = &arlan_sysctl_info,
1010 },
1011#endif
1012 {
1013 .ctl_name = 155,
1014 .procname = "config1",
1015 .data = &conf_reset_result,
1016 .maxlen = 100,
1017 .mode = 0400,
1018 .proc_handler = &arlan_configure,
1019 },
1020 {
1021 .ctl_name = 156,
1022 .procname = "reset1",
1023 .data = &conf_reset_result,
1024 .maxlen = 100,
1025 .mode = 0400,
1026 .proc_handler = &arlan_sysctl_reset,
1027 },
1028 { .ctl_name = 0 }
1029};
1030
1031static ctl_table arlan_conf_table2[] =
1032{
1033
1034 ARLAN_SYSCTL_TABLE_TOTAL(2)
1035
1036#ifdef ARLAN_PROC_SHM_DUMP
1037 {
1038 .ctl_name = 150,
1039 .procname = "arlan2-txRing",
1040 .data = &arlan_drive_info,
1041 .maxlen = ARLAN_STR_SIZE,
1042 .mode = 0400,
1043 .proc_handler = &arlan_sysctl_infotxRing,
1044 },
1045 {
1046 .ctl_name = 151,
1047 .procname = "arlan2-rxRing",
1048 .data = &arlan_drive_info,
1049 .maxlen = ARLAN_STR_SIZE,
1050 .mode = 0400,
1051 .proc_handler = &arlan_sysctl_inforxRing,
1052 },
1053 {
1054 .ctl_name = 152,
1055 .procname = "arlan2-18",
1056 .data = &arlan_drive_info,
1057 .maxlen = ARLAN_STR_SIZE,
1058 .mode = 0400,
1059 .proc_handler = &arlan_sysctl_info18,
1060 },
1061 {
1062 .ctl_name = 153,
1063 .procname = "arlan2-ring",
1064 .data = &arlan_drive_info,
1065 .maxlen = ARLAN_STR_SIZE,
1066 .mode = 0400,
1067 .proc_handler = &arlan_sysctl_info161719,
1068 },
1069 {
1070 .ctl_name = 154,
1071 .procname = "arlan2-shm-cpy",
1072 .data = &arlan_drive_info,
1073 .maxlen = ARLAN_STR_SIZE,
1074 .mode = 0400,
1075 .proc_handler = &arlan_sysctl_info,
1076 },
1077#endif
1078 {
1079 .ctl_name = 155,
1080 .procname = "config2",
1081 .data = &conf_reset_result,
1082 .maxlen = 100,
1083 .mode = 0400,
1084 .proc_handler = &arlan_configure,
1085 },
1086 {
1087 .ctl_name = 156,
1088 .procname = "reset2",
1089 .data = &conf_reset_result,
1090 .maxlen = 100,
1091 .mode = 0400,
1092 .proc_handler = &arlan_sysctl_reset,
1093 },
1094 { .ctl_name = 0 }
1095};
1096
1097static ctl_table arlan_conf_table3[] =
1098{
1099
1100 ARLAN_SYSCTL_TABLE_TOTAL(3)
1101
1102#ifdef ARLAN_PROC_SHM_DUMP
1103 {
1104 .ctl_name = 150,
1105 .procname = "arlan3-txRing",
1106 .data = &arlan_drive_info,
1107 .maxlen = ARLAN_STR_SIZE,
1108 .mode = 0400,
1109 .proc_handler = &arlan_sysctl_infotxRing,
1110 },
1111 {
1112 .ctl_name = 151,
1113 .procname = "arlan3-rxRing",
1114 .data = &arlan_drive_info,
1115 .maxlen = ARLAN_STR_SIZE,
1116 .mode = 0400,
1117 .proc_handler = &arlan_sysctl_inforxRing,
1118 },
1119 {
1120 .ctl_name = 152,
1121 .procname = "arlan3-18",
1122 .data = &arlan_drive_info,
1123 .maxlen = ARLAN_STR_SIZE,
1124 .mode = 0400,
1125 .proc_handler = &arlan_sysctl_info18,
1126 },
1127 {
1128 .ctl_name = 153,
1129 .procname = "arlan3-ring",
1130 .data = &arlan_drive_info,
1131 .maxlen = ARLAN_STR_SIZE,
1132 .mode = 0400,
1133 .proc_handler = &arlan_sysctl_info161719,
1134 },
1135 {
1136 .ctl_name = 154,
1137 .procname = "arlan3-shm-cpy",
1138 .data = &arlan_drive_info,
1139 .maxlen = ARLAN_STR_SIZE,
1140 .mode = 0400,
1141 .proc_handler = &arlan_sysctl_info,
1142 },
1143#endif
1144 {
1145 .ctl_name = 155,
1146 .procname = "config3",
1147 .data = &conf_reset_result,
1148 .maxlen = 100,
1149 .mode = 0400,
1150 .proc_handler = &arlan_configure,
1151 },
1152 {
1153 .ctl_name = 156,
1154 .procname = "reset3",
1155 .data = &conf_reset_result,
1156 .maxlen = 100,
1157 .mode = 0400,
1158 .proc_handler = &arlan_sysctl_reset,
1159 },
1160 { .ctl_name = 0 }
1161};
1162
1163
1164
1165static ctl_table arlan_table[] =
1166{
1167 {
1168 .ctl_name = 0,
1169 .procname = "arlan0",
1170 .maxlen = 0,
1171 .mode = 0600,
1172 .child = arlan_conf_table0,
1173 },
1174 {
1175 .ctl_name = 0,
1176 .procname = "arlan1",
1177 .maxlen = 0,
1178 .mode = 0600,
1179 .child = arlan_conf_table1,
1180 },
1181 {
1182 .ctl_name = 0,
1183 .procname = "arlan2",
1184 .maxlen = 0,
1185 .mode = 0600,
1186 .child = arlan_conf_table2,
1187 },
1188 {
1189 .ctl_name = 0,
1190 .procname = "arlan3",
1191 .maxlen = 0,
1192 .mode = 0600,
1193 .child = arlan_conf_table3,
1194 },
1195 { .ctl_name = 0 }
1196};
1197
1198#else
1199
1200static ctl_table arlan_table[MAX_ARLANS + 1] =
1201{
1202 { .ctl_name = 0 }
1203};
1204#endif
1205
1206
1207// static int mmtu = 1234;
1208
1209static ctl_table arlan_root_table[] =
1210{
1211 {
1212 .ctl_name = CTL_ARLAN,
1213 .procname = "arlan",
1214 .maxlen = 0,
1215 .mode = 0555,
1216 .child = arlan_table,
1217 },
1218 { .ctl_name = 0 }
1219};
1220
1221/* Make sure that /proc/sys/dev is there */
1222//static ctl_table arlan_device_root_table[] =
1223//{
1224// {CTL_DEV, "dev", NULL, 0, 0555, arlan_root_table},
1225// {0}
1226//};
1227
1228
1229static struct ctl_table_header *arlan_device_sysctl_header;
1230
1231int __init init_arlan_proc(void)
1232{
1233
1234 int i = 0;
1235 if (arlan_device_sysctl_header)
1236 return 0;
1237 for (i = 0; i < MAX_ARLANS && arlan_device[i]; i++)
1238 arlan_table[i].ctl_name = i + 1;
1239 arlan_device_sysctl_header = register_sysctl_table(arlan_root_table);
1240 if (!arlan_device_sysctl_header)
1241 return -1;
1242
1243 return 0;
1244
1245}
1246
1247void __exit cleanup_arlan_proc(void)
1248{
1249 unregister_sysctl_table(arlan_device_sysctl_header);
1250 arlan_device_sysctl_header = NULL;
1251
1252}
1253#endif
diff --git a/drivers/net/wireless/arlan.h b/drivers/net/wireless/arlan.h
deleted file mode 100644
index fb3ad51a1caf..000000000000
--- a/drivers/net/wireless/arlan.h
+++ /dev/null
@@ -1,539 +0,0 @@
1/*
2 * Copyright (C) 1997 Cullen Jennings
3 * Copyright (C) 1998 Elmer.Joandi@ut.ee, +37-255-13500
4 * GNU General Public License applies
5 */
6
7#include <linux/module.h>
8#include <linux/kernel.h>
9#include <linux/types.h>
10#include <linux/skbuff.h>
11#include <linux/if_ether.h> /* For the statistics structure. */
12#include <linux/if_arp.h> /* For ARPHRD_ETHER */
13#include <linux/ptrace.h>
14#include <linux/ioport.h>
15#include <linux/in.h>
16#include <linux/slab.h>
17#include <linux/string.h>
18#include <linux/timer.h>
19
20#include <linux/init.h>
21#include <linux/bitops.h>
22#include <asm/system.h>
23#include <asm/io.h>
24#include <linux/errno.h>
25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
28
29
30//#define ARLAN_DEBUGGING 1
31
32#define ARLAN_PROC_INTERFACE
33#define MAX_ARLANS 4 /* not more than 4 ! */
34#define ARLAN_PROC_SHM_DUMP /* shows all card registers, makes driver way larger */
35
36#define ARLAN_MAX_MULTICAST_ADDRS 16
37#define ARLAN_RCV_CLEAN 0
38#define ARLAN_RCV_PROMISC 1
39#define ARLAN_RCV_CONTROL 2
40
41#ifdef CONFIG_PROC_FS
42extern int init_arlan_proc(void);
43extern void cleanup_arlan_proc(void);
44#else
45#define init_arlan_proc() ({ 0; })
46#define cleanup_arlan_proc() do { } while (0)
47#endif
48
49extern struct net_device *arlan_device[MAX_ARLANS];
50extern int arlan_debug;
51extern int arlan_entry_debug;
52extern int arlan_exit_debug;
53extern int testMemory;
54extern int arlan_command(struct net_device * dev, int command);
55
56#define SIDUNKNOWN -1
57#define radioNodeIdUNKNOWN -1
58#define irqUNKNOWN 0
59#define debugUNKNOWN 0
60#define testMemoryUNKNOWN 1
61#define spreadingCodeUNKNOWN 0
62#define channelNumberUNKNOWN 0
63#define channelSetUNKNOWN 0
64#define systemIdUNKNOWN -1
65#define registrationModeUNKNOWN -1
66
67
68#define IFDEBUG( L ) if ( (L) & arlan_debug )
69#define ARLAN_FAKE_HDR_LEN 12
70
71#ifdef ARLAN_DEBUGGING
72 #define DEBUG 1
73 #define ARLAN_ENTRY_EXIT_DEBUGGING 1
74 #define ARLAN_DEBUG(a,b) printk(KERN_DEBUG a, b)
75#else
76 #define ARLAN_DEBUG(a,b)
77#endif
78
79#define ARLAN_SHMEM_SIZE 0x2000
80
81struct arlan_shmem
82{
83 /* Header Signature */
84 volatile char textRegion[48];
85 volatile u_char resetFlag;
86 volatile u_char diagnosticInfo;
87 volatile u_short diagnosticOffset;
88 volatile u_char _1[12];
89 volatile u_char lanCardNodeId[6];
90 volatile u_char broadcastAddress[6];
91 volatile u_char hardwareType;
92 volatile u_char majorHardwareVersion;
93 volatile u_char minorHardwareVersion;
94 volatile u_char radioModule;// shows EEPROM, can be overridden at 0x111
95 volatile u_char defaultChannelSet; // shows EEProm, can be overriiden at 0x10A
96 volatile u_char _2[47];
97
98 /* Control/Status Block - 0x0080 */
99 volatile u_char interruptInProgress; /* not used by lancpu */
100 volatile u_char cntrlRegImage; /* not used by lancpu */
101 volatile u_char _3[13];
102 volatile u_char dumpByte;
103 volatile u_char commandByte; /* non-zero = active */
104 volatile u_char commandParameter[15];
105
106 /* Receive Status - 0x00a0 */
107 volatile u_char rxStatus; /* 1- data, 2-control, 0xff - registr change */
108 volatile u_char rxFrmType;
109 volatile u_short rxOffset;
110 volatile u_short rxLength;
111 volatile u_char rxSrc[6];
112 volatile u_char rxBroadcastFlag;
113 volatile u_char rxQuality;
114 volatile u_char scrambled;
115 volatile u_char _4[1];
116
117 /* Transmit Status - 0x00b0 */
118 volatile u_char txStatus;
119 volatile u_char txAckQuality;
120 volatile u_char numRetries;
121 volatile u_char _5[14];
122 volatile u_char registeredRouter[6];
123 volatile u_char backboneRouter[6];
124 volatile u_char registrationStatus;
125 volatile u_char configuredStatusFlag;
126 volatile u_char _6[1];
127 volatile u_char ultimateDestAddress[6];
128 volatile u_char immedDestAddress[6];
129 volatile u_char immedSrcAddress[6];
130 volatile u_short rxSequenceNumber;
131 volatile u_char assignedLocaltalkAddress;
132 volatile u_char _7[27];
133
134 /* System Parameter Block */
135
136 /* - Driver Parameters (Novell Specific) */
137
138 volatile u_short txTimeout;
139 volatile u_short transportTime;
140 volatile u_char _8[4];
141
142 /* - Configuration Parameters */
143 volatile u_char irqLevel;
144 volatile u_char spreadingCode;
145 volatile u_char channelSet;
146 volatile u_char channelNumber;
147 volatile u_short radioNodeId;
148 volatile u_char _9[2];
149 volatile u_char scramblingDisable;
150 volatile u_char radioType;
151 volatile u_short routerId;
152 volatile u_char _10[9];
153 volatile u_char txAttenuation;
154 volatile u_char systemId[4];
155 volatile u_short globalChecksum;
156 volatile u_char _11[4];
157 volatile u_short maxDatagramSize;
158 volatile u_short maxFrameSize;
159 volatile u_char maxRetries;
160 volatile u_char receiveMode;
161 volatile u_char priority;
162 volatile u_char rootOrRepeater;
163 volatile u_char specifiedRouter[6];
164 volatile u_short fastPollPeriod;
165 volatile u_char pollDecay;
166 volatile u_char fastPollDelay[2];
167 volatile u_char arlThreshold;
168 volatile u_char arlDecay;
169 volatile u_char _12[1];
170 volatile u_short specRouterTimeout;
171 volatile u_char _13[5];
172
173 /* Scrambled Area */
174 volatile u_char SID[4];
175 volatile u_char encryptionKey[12];
176 volatile u_char _14[2];
177 volatile u_char waitTime[2];
178 volatile u_char lParameter[2];
179 volatile u_char _15[3];
180 volatile u_short headerSize;
181 volatile u_short sectionChecksum;
182
183 volatile u_char registrationMode;
184 volatile u_char registrationFill;
185 volatile u_short pollPeriod;
186 volatile u_short refreshPeriod;
187 volatile u_char name[16];
188 volatile u_char NID[6];
189 volatile u_char localTalkAddress;
190 volatile u_char codeFormat;
191 volatile u_char numChannels;
192 volatile u_char channel1;
193 volatile u_char channel2;
194 volatile u_char channel3;
195 volatile u_char channel4;
196 volatile u_char SSCode[59];
197
198 volatile u_char _16[0xC0];
199 volatile u_short auxCmd;
200 volatile u_char dumpPtr[4];
201 volatile u_char dumpVal;
202 volatile u_char _17[0x6A];
203 volatile u_char wireTest;
204 volatile u_char _18[14];
205
206 /* Statistics Block - 0x0300 */
207 volatile u_char hostcpuLock;
208 volatile u_char lancpuLock;
209 volatile u_char resetTime[18];
210
211 volatile u_char numDatagramsTransmitted[4];
212 volatile u_char numReTransmissions[4];
213 volatile u_char numFramesDiscarded[4];
214 volatile u_char numDatagramsReceived[4];
215 volatile u_char numDuplicateReceivedFrames[4];
216 volatile u_char numDatagramsDiscarded[4];
217
218 volatile u_short maxNumReTransmitDatagram;
219 volatile u_short maxNumReTransmitFrames;
220 volatile u_short maxNumConsecutiveDuplicateFrames;
221 /* misaligned here so we have to go to characters */
222
223 volatile u_char numBytesTransmitted[4];
224 volatile u_char numBytesReceived[4];
225 volatile u_char numCRCErrors[4];
226 volatile u_char numLengthErrors[4];
227 volatile u_char numAbortErrors[4];
228 volatile u_char numTXUnderruns[4];
229 volatile u_char numRXOverruns[4];
230 volatile u_char numHoldOffs[4];
231 volatile u_char numFramesTransmitted[4];
232 volatile u_char numFramesReceived[4];
233 volatile u_char numReceiveFramesLost[4];
234 volatile u_char numRXBufferOverflows[4];
235 volatile u_char numFramesDiscardedAddrMismatch[4];
236 volatile u_char numFramesDiscardedSIDMismatch[4];
237 volatile u_char numPollsTransmistted[4];
238 volatile u_char numPollAcknowledges[4];
239 volatile u_char numStatusTimeouts[4];
240 volatile u_char numNACKReceived[4];
241
242 volatile u_char _19[0x86];
243
244 volatile u_char txBuffer[0x800];
245 volatile u_char rxBuffer[0x800];
246
247 volatile u_char _20[0x800];
248 volatile u_char _21[0x3fb];
249 volatile u_char configStatus;
250 volatile u_char _22;
251 volatile u_char progIOCtrl;
252 volatile u_char shareMBase;
253 volatile u_char controlRegister;
254};
255
256struct arlan_conf_stru {
257 int spreadingCode;
258 int channelSet;
259 int channelNumber;
260 int scramblingDisable;
261 int txAttenuation;
262 int systemId;
263 int maxDatagramSize;
264 int maxFrameSize;
265 int maxRetries;
266 int receiveMode;
267 int priority;
268 int rootOrRepeater;
269 int SID;
270 int radioNodeId;
271 int registrationMode;
272 int registrationFill;
273 int localTalkAddress;
274 int codeFormat;
275 int numChannels;
276 int channel1;
277 int channel2;
278 int channel3;
279 int channel4;
280 int txClear;
281 int txRetries;
282 int txRouting;
283 int txScrambled;
284 int rxParameter;
285 int txTimeoutMs;
286 int txAckTimeoutMs;
287 int waitCardTimeout;
288 int waitTime;
289 int lParameter;
290 int _15;
291 int headerSize;
292 int retries;
293 int tx_delay_ms;
294 int waitReTransmitPacketMaxSize;
295 int ReTransmitPacketMaxSize;
296 int fastReTransCount;
297 int driverRetransmissions;
298 int registrationInterrupts;
299 int hardwareType;
300 int radioType;
301 int writeRadioType;
302 int writeEEPROM;
303 char siteName[17];
304 int measure_rate;
305 int in_speed;
306 int out_speed;
307 int in_speed10;
308 int out_speed10;
309 int in_speed_max;
310 int out_speed_max;
311 int pre_Command_Wait;
312 int rx_tweak1;
313 int rx_tweak2;
314 int tx_queue_len;
315};
316
317extern struct arlan_conf_stru arlan_conf[MAX_ARLANS];
318
319struct TxParam
320{
321 volatile short offset;
322 volatile short length;
323 volatile u_char dest[6];
324 volatile unsigned char clear;
325 volatile unsigned char retries;
326 volatile unsigned char routing;
327 volatile unsigned char scrambled;
328};
329
330#define TX_RING_SIZE 2
331/* Information that need to be kept for each board. */
332struct arlan_private {
333 struct arlan_shmem __iomem * card;
334 struct arlan_shmem * conf;
335
336 struct arlan_conf_stru * Conf;
337 int bad;
338 int reset;
339 unsigned long lastReset;
340 struct timer_list timer;
341 struct timer_list tx_delay_timer;
342 struct timer_list tx_retry_timer;
343 struct timer_list rx_check_timer;
344
345 int registrationLostCount;
346 int reRegisterExp;
347 int irq_test_done;
348
349 struct TxParam txRing[TX_RING_SIZE];
350 char reTransmitBuff[0x800];
351 int txLast;
352 unsigned ReTransmitRequested;
353 unsigned long tx_done_delayed;
354 unsigned long registrationLastSeen;
355
356 unsigned long tx_last_sent;
357 unsigned long tx_last_cleared;
358 unsigned long retransmissions;
359 unsigned long interrupt_ack_requested;
360 spinlock_t lock;
361 unsigned long waiting_command_mask;
362 unsigned long card_polling_interval;
363 unsigned long last_command_buff_free_time;
364
365 int under_reset;
366 int under_config;
367 int rx_command_given;
368 int tx_command_given;
369 unsigned long interrupt_processing_active;
370 unsigned long last_rx_int_ack_time;
371 unsigned long in_bytes;
372 unsigned long out_bytes;
373 unsigned long in_time;
374 unsigned long out_time;
375 unsigned long in_time10;
376 unsigned long out_time10;
377 unsigned long in_bytes10;
378 unsigned long out_bytes10;
379 int init_etherdev_alloc;
380};
381
382
383
384#define ARLAN_CLEAR 0x00
385#define ARLAN_RESET 0x01
386#define ARLAN_CHANNEL_ATTENTION 0x02
387#define ARLAN_INTERRUPT_ENABLE 0x04
388#define ARLAN_CLEAR_INTERRUPT 0x08
389#define ARLAN_POWER 0x40
390#define ARLAN_ACCESS 0x80
391
392#define ARLAN_COM_CONF 0x01
393#define ARLAN_COM_RX_ENABLE 0x03
394#define ARLAN_COM_RX_ABORT 0x04
395#define ARLAN_COM_TX_ENABLE 0x05
396#define ARLAN_COM_TX_ABORT 0x06
397#define ARLAN_COM_NOP 0x07
398#define ARLAN_COM_STANDBY 0x08
399#define ARLAN_COM_ACTIVATE 0x09
400#define ARLAN_COM_GOTO_SLOW_POLL 0x0a
401#define ARLAN_COM_INT 0x80
402
403
404#define TXLAST(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[((struct arlan_private *)netdev_priv(dev))->txLast])
405#define TXHEAD(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[0])
406#define TXTAIL(dev) (((struct arlan_private *)netdev_priv(dev))->txRing[1])
407
408#define TXBuffStart(dev) offsetof(struct arlan_shmem, txBuffer)
409#define TXBuffEnd(dev) offsetof(struct arlan_shmem, xxBuffer)
410
411#define READSHM(to,from,atype) {\
412 atype tmp;\
413 memcpy_fromio(&(tmp),&(from),sizeof(atype));\
414 to = tmp;\
415 }
416
417#define READSHMEM(from,atype)\
418 atype from; \
419 READSHM(from, arlan->from, atype);
420
421#define WRITESHM(to,from,atype) \
422 { atype tmpSHM = from;\
423 memcpy_toio(&(to),&tmpSHM,sizeof(atype));\
424 }
425
426#define DEBUGSHM(levelSHM,stringSHM,stuff,atype) \
427 { atype tmpSHM; \
428 memcpy_fromio(&tmpSHM,&(stuff),sizeof(atype));\
429 IFDEBUG(levelSHM) printk(stringSHM,tmpSHM);\
430 }
431
432#define WRITESHMB(to, val) \
433 writeb(val,&(to))
434#define READSHMB(to) \
435 readb(&(to))
436#define WRITESHMS(to, val) \
437 writew(val,&(to))
438#define READSHMS(to) \
439 readw(&(to))
440#define WRITESHMI(to, val) \
441 writel(val,&(to))
442#define READSHMI(to) \
443 readl(&(to))
444
445
446
447
448
449#define registrationBad(dev)\
450 ( ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationMode) > 0) && \
451 ( READSHMB(((struct arlan_private *)netdev_priv(dev))->card->registrationStatus) == 0) )
452
453
454#define readControlRegister(dev)\
455 READSHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage)
456
457#define writeControlRegister(dev, v){\
458 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->cntrlRegImage ,((v) &0xF) );\
459 WRITESHMB(((struct arlan_private *)netdev_priv(dev))->card->controlRegister ,(v) );}
460
461
462#define arlan_interrupt_lancpu(dev) {\
463 int cr; \
464 \
465 cr = readControlRegister(dev);\
466 if (cr & ARLAN_CHANNEL_ATTENTION){ \
467 writeControlRegister(dev, (cr & ~ARLAN_CHANNEL_ATTENTION));\
468 }else \
469 writeControlRegister(dev, (cr | ARLAN_CHANNEL_ATTENTION));\
470}
471
472#define clearChannelAttention(dev){ \
473 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CHANNEL_ATTENTION);}
474#define setHardwareReset(dev) {\
475 writeControlRegister(dev,readControlRegister(dev) | ARLAN_RESET);}
476#define clearHardwareReset(dev) {\
477 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_RESET);}
478#define setInterruptEnable(dev){\
479 writeControlRegister(dev,readControlRegister(dev) | ARLAN_INTERRUPT_ENABLE) ;}
480#define clearInterruptEnable(dev){\
481 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_INTERRUPT_ENABLE) ;}
482#define setClearInterrupt(dev){\
483 writeControlRegister(dev,readControlRegister(dev) | ARLAN_CLEAR_INTERRUPT) ;}
484#define clearClearInterrupt(dev){\
485 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_CLEAR_INTERRUPT);}
486#define setPowerOff(dev){\
487 writeControlRegister(dev,readControlRegister(dev) | (ARLAN_POWER && ARLAN_ACCESS));\
488 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
489#define setPowerOn(dev){\
490 writeControlRegister(dev,readControlRegister(dev) & ~(ARLAN_POWER)); }
491#define arlan_lock_card_access(dev){\
492 writeControlRegister(dev,readControlRegister(dev) & ~ARLAN_ACCESS);}
493#define arlan_unlock_card_access(dev){\
494 writeControlRegister(dev,readControlRegister(dev) | ARLAN_ACCESS ); }
495
496
497
498
499#define ARLAN_COMMAND_RX 0x000001
500#define ARLAN_COMMAND_NOOP 0x000002
501#define ARLAN_COMMAND_NOOPINT 0x000004
502#define ARLAN_COMMAND_TX 0x000008
503#define ARLAN_COMMAND_CONF 0x000010
504#define ARLAN_COMMAND_RESET 0x000020
505#define ARLAN_COMMAND_TX_ABORT 0x000040
506#define ARLAN_COMMAND_RX_ABORT 0x000080
507#define ARLAN_COMMAND_POWERDOWN 0x000100
508#define ARLAN_COMMAND_POWERUP 0x000200
509#define ARLAN_COMMAND_SLOW_POLL 0x000400
510#define ARLAN_COMMAND_ACTIVATE 0x000800
511#define ARLAN_COMMAND_INT_ACK 0x001000
512#define ARLAN_COMMAND_INT_ENABLE 0x002000
513#define ARLAN_COMMAND_WAIT_NOW 0x004000
514#define ARLAN_COMMAND_LONG_WAIT_NOW 0x008000
515#define ARLAN_COMMAND_STANDBY 0x010000
516#define ARLAN_COMMAND_INT_RACK 0x020000
517#define ARLAN_COMMAND_INT_RENABLE 0x040000
518#define ARLAN_COMMAND_CONF_WAIT 0x080000
519#define ARLAN_COMMAND_TBUSY_CLEAR 0x100000
520#define ARLAN_COMMAND_CLEAN_AND_CONF (ARLAN_COMMAND_TX_ABORT\
521 | ARLAN_COMMAND_RX_ABORT\
522 | ARLAN_COMMAND_CONF)
523#define ARLAN_COMMAND_CLEAN_AND_RESET (ARLAN_COMMAND_TX_ABORT\
524 | ARLAN_COMMAND_RX_ABORT\
525 | ARLAN_COMMAND_RESET)
526
527
528
529#define ARLAN_DEBUG_CHAIN_LOCKS 0x00001
530#define ARLAN_DEBUG_RESET 0x00002
531#define ARLAN_DEBUG_TIMING 0x00004
532#define ARLAN_DEBUG_CARD_STATE 0x00008
533#define ARLAN_DEBUG_TX_CHAIN 0x00010
534#define ARLAN_DEBUG_MULTICAST 0x00020
535#define ARLAN_DEBUG_HEADER_DUMP 0x00040
536#define ARLAN_DEBUG_INTERRUPT 0x00080
537#define ARLAN_DEBUG_STARTUP 0x00100
538#define ARLAN_DEBUG_SHUTDOWN 0x00200
539
diff --git a/drivers/net/wireless/at76c50x-usb.c b/drivers/net/wireless/at76c50x-usb.c
index 8e1a55dec351..0fb419936dff 100644
--- a/drivers/net/wireless/at76c50x-usb.c
+++ b/drivers/net/wireless/at76c50x-usb.c
@@ -121,6 +121,14 @@ static struct fwentry firmwares[] = {
121 [BOARD_505A] = { "atmel_at76c505a-rfmd2958.bin" }, 121 [BOARD_505A] = { "atmel_at76c505a-rfmd2958.bin" },
122 [BOARD_505AMX] = { "atmel_at76c505amx-rfmd.bin" }, 122 [BOARD_505AMX] = { "atmel_at76c505amx-rfmd.bin" },
123}; 123};
124MODULE_FIRMWARE("atmel_at76c503-i3861.bin");
125MODULE_FIRMWARE("atmel_at76c503-i3863.bin");
126MODULE_FIRMWARE("atmel_at76c503-rfmd.bin");
127MODULE_FIRMWARE("atmel_at76c503-rfmd-acc.bin");
128MODULE_FIRMWARE("atmel_at76c505-rfmd.bin");
129MODULE_FIRMWARE("atmel_at76c505-rfmd2958.bin");
130MODULE_FIRMWARE("atmel_at76c505a-rfmd2958.bin");
131MODULE_FIRMWARE("atmel_at76c505amx-rfmd.bin");
124 132
125#define USB_DEVICE_DATA(__ops) .driver_info = (kernel_ulong_t)(__ops) 133#define USB_DEVICE_DATA(__ops) .driver_info = (kernel_ulong_t)(__ops)
126 134
@@ -524,20 +532,6 @@ static char *hex2str(void *buf, int len)
524 return ret; 532 return ret;
525} 533}
526 534
527#define MAC2STR_BUFFERS 4
528
529static inline char *mac2str(u8 *mac)
530{
531 static atomic_t a = ATOMIC_INIT(0);
532 static char bufs[MAC2STR_BUFFERS][6 * 3];
533 char *str;
534
535 str = bufs[atomic_inc_return(&a) & (MAC2STR_BUFFERS - 1)];
536 sprintf(str, "%02x:%02x:%02x:%02x:%02x:%02x",
537 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
538 return str;
539}
540
541/* LED trigger */ 535/* LED trigger */
542static int tx_activity; 536static int tx_activity;
543static void at76_ledtrig_tx_timerfunc(unsigned long data); 537static void at76_ledtrig_tx_timerfunc(unsigned long data);
@@ -973,13 +967,13 @@ static void at76_dump_mib_mac_addr(struct at76_priv *priv)
973 goto exit; 967 goto exit;
974 } 968 }
975 969
976 at76_dbg(DBG_MIB, "%s: MIB MAC_ADDR: mac_addr %s res 0x%x 0x%x", 970 at76_dbg(DBG_MIB, "%s: MIB MAC_ADDR: mac_addr %pM res 0x%x 0x%x",
977 wiphy_name(priv->hw->wiphy), 971 wiphy_name(priv->hw->wiphy),
978 mac2str(m->mac_addr), m->res[0], m->res[1]); 972 m->mac_addr, m->res[0], m->res[1]);
979 for (i = 0; i < ARRAY_SIZE(m->group_addr); i++) 973 for (i = 0; i < ARRAY_SIZE(m->group_addr); i++)
980 at76_dbg(DBG_MIB, "%s: MIB MAC_ADDR: group addr %d: %s, " 974 at76_dbg(DBG_MIB, "%s: MIB MAC_ADDR: group addr %d: %pM, "
981 "status %d", wiphy_name(priv->hw->wiphy), i, 975 "status %d", wiphy_name(priv->hw->wiphy), i,
982 mac2str(m->group_addr[i]), m->group_addr_status[i]); 976 m->group_addr[i], m->group_addr_status[i]);
983exit: 977exit:
984 kfree(m); 978 kfree(m);
985} 979}
@@ -1042,7 +1036,7 @@ static void at76_dump_mib_mac_mgmt(struct at76_priv *priv)
1042 at76_dbg(DBG_MIB, "%s: MIB MAC_MGMT: beacon_period %d CFP_max_duration " 1036 at76_dbg(DBG_MIB, "%s: MIB MAC_MGMT: beacon_period %d CFP_max_duration "
1043 "%d medium_occupancy_limit %d station_id 0x%x ATIM_window %d " 1037 "%d medium_occupancy_limit %d station_id 0x%x ATIM_window %d "
1044 "CFP_mode %d privacy_opt_impl %d DTIM_period %d CFP_period %d " 1038 "CFP_mode %d privacy_opt_impl %d DTIM_period %d CFP_period %d "
1045 "current_bssid %s current_essid %s current_bss_type %d " 1039 "current_bssid %pM current_essid %s current_bss_type %d "
1046 "pm_mode %d ibss_change %d res %d " 1040 "pm_mode %d ibss_change %d res %d "
1047 "multi_domain_capability_implemented %d " 1041 "multi_domain_capability_implemented %d "
1048 "international_roaming %d country_string %.3s", 1042 "international_roaming %d country_string %.3s",
@@ -1051,7 +1045,7 @@ static void at76_dump_mib_mac_mgmt(struct at76_priv *priv)
1051 le16_to_cpu(m->medium_occupancy_limit), 1045 le16_to_cpu(m->medium_occupancy_limit),
1052 le16_to_cpu(m->station_id), le16_to_cpu(m->ATIM_window), 1046 le16_to_cpu(m->station_id), le16_to_cpu(m->ATIM_window),
1053 m->CFP_mode, m->privacy_option_implemented, m->DTIM_period, 1047 m->CFP_mode, m->privacy_option_implemented, m->DTIM_period,
1054 m->CFP_period, mac2str(m->current_bssid), 1048 m->CFP_period, m->current_bssid,
1055 hex2str(m->current_essid, IW_ESSID_MAX_SIZE), 1049 hex2str(m->current_essid, IW_ESSID_MAX_SIZE),
1056 m->current_bss_type, m->power_mgmt_mode, m->ibss_change, 1050 m->current_bss_type, m->power_mgmt_mode, m->ibss_change,
1057 m->res, m->multi_domain_capability_implemented, 1051 m->res, m->multi_domain_capability_implemented,
@@ -1080,7 +1074,7 @@ static void at76_dump_mib_mac(struct at76_priv *priv)
1080 "cwmin %d cwmax %d short_retry_time %d long_retry_time %d " 1074 "cwmin %d cwmax %d short_retry_time %d long_retry_time %d "
1081 "scan_type %d scan_channel %d probe_delay %u " 1075 "scan_type %d scan_channel %d probe_delay %u "
1082 "min_channel_time %d max_channel_time %d listen_int %d " 1076 "min_channel_time %d max_channel_time %d listen_int %d "
1083 "desired_ssid %s desired_bssid %s desired_bsstype %d", 1077 "desired_ssid %s desired_bssid %pM desired_bsstype %d",
1084 wiphy_name(priv->hw->wiphy), 1078 wiphy_name(priv->hw->wiphy),
1085 le32_to_cpu(m->max_tx_msdu_lifetime), 1079 le32_to_cpu(m->max_tx_msdu_lifetime),
1086 le32_to_cpu(m->max_rx_lifetime), 1080 le32_to_cpu(m->max_rx_lifetime),
@@ -1092,7 +1086,7 @@ static void at76_dump_mib_mac(struct at76_priv *priv)
1092 le16_to_cpu(m->max_channel_time), 1086 le16_to_cpu(m->max_channel_time),
1093 le16_to_cpu(m->listen_interval), 1087 le16_to_cpu(m->listen_interval),
1094 hex2str(m->desired_ssid, IW_ESSID_MAX_SIZE), 1088 hex2str(m->desired_ssid, IW_ESSID_MAX_SIZE),
1095 mac2str(m->desired_bssid), m->desired_bsstype); 1089 m->desired_bssid, m->desired_bsstype);
1096exit: 1090exit:
1097 kfree(m); 1091 kfree(m);
1098} 1092}
@@ -1194,6 +1188,9 @@ static int at76_start_monitor(struct at76_priv *priv)
1194 scan.channel = priv->channel; 1188 scan.channel = priv->channel;
1195 scan.scan_type = SCAN_TYPE_PASSIVE; 1189 scan.scan_type = SCAN_TYPE_PASSIVE;
1196 scan.international_scan = 0; 1190 scan.international_scan = 0;
1191 scan.min_channel_time = cpu_to_le16(priv->scan_min_time);
1192 scan.max_channel_time = cpu_to_le16(priv->scan_max_time);
1193 scan.probe_delay = cpu_to_le16(0);
1197 1194
1198 ret = at76_set_card_command(priv->udev, CMD_SCAN, &scan, sizeof(scan)); 1195 ret = at76_set_card_command(priv->udev, CMD_SCAN, &scan, sizeof(scan));
1199 if (ret >= 0) 1196 if (ret >= 0)
@@ -1792,7 +1789,7 @@ static void at76_mac80211_stop(struct ieee80211_hw *hw)
1792} 1789}
1793 1790
1794static int at76_add_interface(struct ieee80211_hw *hw, 1791static int at76_add_interface(struct ieee80211_hw *hw,
1795 struct ieee80211_if_init_conf *conf) 1792 struct ieee80211_vif *vif)
1796{ 1793{
1797 struct at76_priv *priv = hw->priv; 1794 struct at76_priv *priv = hw->priv;
1798 int ret = 0; 1795 int ret = 0;
@@ -1801,7 +1798,7 @@ static int at76_add_interface(struct ieee80211_hw *hw,
1801 1798
1802 mutex_lock(&priv->mtx); 1799 mutex_lock(&priv->mtx);
1803 1800
1804 switch (conf->type) { 1801 switch (vif->type) {
1805 case NL80211_IFTYPE_STATION: 1802 case NL80211_IFTYPE_STATION:
1806 priv->iw_mode = IW_MODE_INFRA; 1803 priv->iw_mode = IW_MODE_INFRA;
1807 break; 1804 break;
@@ -1817,7 +1814,7 @@ exit:
1817} 1814}
1818 1815
1819static void at76_remove_interface(struct ieee80211_hw *hw, 1816static void at76_remove_interface(struct ieee80211_hw *hw,
1820 struct ieee80211_if_init_conf *conf) 1817 struct ieee80211_vif *vif)
1821{ 1818{
1822 at76_dbg(DBG_MAC80211, "%s()", __func__); 1819 at76_dbg(DBG_MAC80211, "%s()", __func__);
1823} 1820}
@@ -2217,6 +2214,8 @@ static struct ieee80211_supported_band at76_supported_band = {
2217static int at76_init_new_device(struct at76_priv *priv, 2214static int at76_init_new_device(struct at76_priv *priv,
2218 struct usb_interface *interface) 2215 struct usb_interface *interface)
2219{ 2216{
2217 struct wiphy *wiphy;
2218 size_t len;
2220 int ret; 2219 int ret;
2221 2220
2222 /* set up the endpoint information */ 2221 /* set up the endpoint information */
@@ -2254,6 +2253,7 @@ static int at76_init_new_device(struct at76_priv *priv,
2254 priv->device_unplugged = 0; 2253 priv->device_unplugged = 0;
2255 2254
2256 /* mac80211 initialisation */ 2255 /* mac80211 initialisation */
2256 wiphy = priv->hw->wiphy;
2257 priv->hw->wiphy->max_scan_ssids = 1; 2257 priv->hw->wiphy->max_scan_ssids = 1;
2258 priv->hw->wiphy->max_scan_ie_len = 0; 2258 priv->hw->wiphy->max_scan_ie_len = 0;
2259 priv->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 2259 priv->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
@@ -2265,6 +2265,13 @@ static int at76_init_new_device(struct at76_priv *priv,
2265 SET_IEEE80211_DEV(priv->hw, &interface->dev); 2265 SET_IEEE80211_DEV(priv->hw, &interface->dev);
2266 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr); 2266 SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
2267 2267
2268 len = sizeof(wiphy->fw_version);
2269 snprintf(wiphy->fw_version, len, "%d.%d.%d-%d",
2270 priv->fw_version.major, priv->fw_version.minor,
2271 priv->fw_version.patch, priv->fw_version.build);
2272
2273 wiphy->hw_version = priv->board_type;
2274
2268 ret = ieee80211_register_hw(priv->hw); 2275 ret = ieee80211_register_hw(priv->hw);
2269 if (ret) { 2276 if (ret) {
2270 printk(KERN_ERR "cannot register mac80211 hw (status %d)!\n", 2277 printk(KERN_ERR "cannot register mac80211 hw (status %d)!\n",
@@ -2274,9 +2281,9 @@ static int at76_init_new_device(struct at76_priv *priv,
2274 2281
2275 priv->mac80211_registered = 1; 2282 priv->mac80211_registered = 1;
2276 2283
2277 printk(KERN_INFO "%s: USB %s, MAC %s, firmware %d.%d.%d-%d\n", 2284 printk(KERN_INFO "%s: USB %s, MAC %pM, firmware %d.%d.%d-%d\n",
2278 wiphy_name(priv->hw->wiphy), 2285 wiphy_name(priv->hw->wiphy),
2279 dev_name(&interface->dev), mac2str(priv->mac_addr), 2286 dev_name(&interface->dev), priv->mac_addr,
2280 priv->fw_version.major, priv->fw_version.minor, 2287 priv->fw_version.major, priv->fw_version.minor,
2281 priv->fw_version.patch, priv->fw_version.build); 2288 priv->fw_version.patch, priv->fw_version.build);
2282 printk(KERN_INFO "%s: regulatory domain 0x%02x: %s\n", 2289 printk(KERN_INFO "%s: regulatory domain 0x%02x: %s\n",
diff --git a/drivers/net/wireless/ath/Kconfig b/drivers/net/wireless/ath/Kconfig
index 11ded150b932..4e7a7fd695c8 100644
--- a/drivers/net/wireless/ath/Kconfig
+++ b/drivers/net/wireless/ath/Kconfig
@@ -1,6 +1,5 @@
1menuconfig ATH_COMMON 1menuconfig ATH_COMMON
2 tristate "Atheros Wireless Cards" 2 tristate "Atheros Wireless Cards"
3 depends on WLAN_80211
4 depends on CFG80211 3 depends on CFG80211
5 ---help--- 4 ---help---
6 This will enable the support for the Atheros wireless drivers. 5 This will enable the support for the Atheros wireless drivers.
@@ -16,7 +15,15 @@ menuconfig ATH_COMMON
16 http://wireless.kernel.org/en/users/Drivers/Atheros 15 http://wireless.kernel.org/en/users/Drivers/Atheros
17 16
18if ATH_COMMON 17if ATH_COMMON
18
19config ATH_DEBUG
20 bool "Atheros wireless debugging"
21 ---help---
22 Say Y, if you want to debug atheros wireless drivers.
23 Right now only ath9k makes use of this.
24
19source "drivers/net/wireless/ath/ath5k/Kconfig" 25source "drivers/net/wireless/ath/ath5k/Kconfig"
20source "drivers/net/wireless/ath/ath9k/Kconfig" 26source "drivers/net/wireless/ath/ath9k/Kconfig"
21source "drivers/net/wireless/ath/ar9170/Kconfig" 27source "drivers/net/wireless/ath/ar9170/Kconfig"
28
22endif 29endif
diff --git a/drivers/net/wireless/ath/Makefile b/drivers/net/wireless/ath/Makefile
index 4bb0132ada37..8113a5042afa 100644
--- a/drivers/net/wireless/ath/Makefile
+++ b/drivers/net/wireless/ath/Makefile
@@ -1,6 +1,11 @@
1obj-$(CONFIG_ATH5K) += ath5k/ 1obj-$(CONFIG_ATH5K) += ath5k/
2obj-$(CONFIG_ATH9K) += ath9k/ 2obj-$(CONFIG_ATH9K_HW) += ath9k/
3obj-$(CONFIG_AR9170_USB) += ar9170/ 3obj-$(CONFIG_AR9170_USB) += ar9170/
4 4
5obj-$(CONFIG_ATH_COMMON) += ath.o 5obj-$(CONFIG_ATH_COMMON) += ath.o
6ath-objs := main.o regd.o 6
7ath-objs := main.o \
8 regd.o \
9 hw.o
10
11ath-$(CONFIG_ATH_DEBUG) += debug.o
diff --git a/drivers/net/wireless/ath/ar9170/Kconfig b/drivers/net/wireless/ath/ar9170/Kconfig
index 05918f1e685a..d7a4799d20fb 100644
--- a/drivers/net/wireless/ath/ar9170/Kconfig
+++ b/drivers/net/wireless/ath/ar9170/Kconfig
@@ -1,6 +1,6 @@
1config AR9170_USB 1config AR9170_USB
2 tristate "Atheros AR9170 802.11n USB support" 2 tristate "Atheros AR9170 802.11n USB support"
3 depends on USB && MAC80211 && WLAN_80211 3 depends on USB && MAC80211
4 select FW_LOADER 4 select FW_LOADER
5 help 5 help
6 This is a driver for the Atheros "otus" 802.11n USB devices. 6 This is a driver for the Atheros "otus" 802.11n USB devices.
diff --git a/drivers/net/wireless/ath/ar9170/ar9170.h b/drivers/net/wireless/ath/ar9170/ar9170.h
index 914e4718a9a8..dc662b76a1c8 100644
--- a/drivers/net/wireless/ath/ar9170/ar9170.h
+++ b/drivers/net/wireless/ath/ar9170/ar9170.h
@@ -109,7 +109,6 @@ struct ar9170_rxstream_mpdu_merge {
109 bool has_plcp; 109 bool has_plcp;
110}; 110};
111 111
112#define AR9170_NUM_MAX_BA_RETRY 5
113#define AR9170_NUM_TID 16 112#define AR9170_NUM_TID 16
114#define WME_BA_BMP_SIZE 64 113#define WME_BA_BMP_SIZE 64
115#define AR9170_NUM_MAX_AGG_LEN (2 * WME_BA_BMP_SIZE) 114#define AR9170_NUM_MAX_AGG_LEN (2 * WME_BA_BMP_SIZE)
@@ -143,7 +142,12 @@ struct ar9170_sta_tid {
143 u16 tid; 142 u16 tid;
144 enum ar9170_tid_state state; 143 enum ar9170_tid_state state;
145 bool active; 144 bool active;
146 u8 retry; 145};
146
147struct ar9170_tx_queue_stats {
148 unsigned int len;
149 unsigned int limit;
150 unsigned int count;
147}; 151};
148 152
149#define AR9170_QUEUE_TIMEOUT 64 153#define AR9170_QUEUE_TIMEOUT 64
@@ -154,12 +158,15 @@ struct ar9170_sta_tid {
154 158
155#define AR9170_NUM_TX_STATUS 128 159#define AR9170_NUM_TX_STATUS 128
156#define AR9170_NUM_TX_AGG_MAX 30 160#define AR9170_NUM_TX_AGG_MAX 30
161#define AR9170_NUM_TX_LIMIT_HARD AR9170_TXQ_DEPTH
162#define AR9170_NUM_TX_LIMIT_SOFT (AR9170_TXQ_DEPTH - 10)
157 163
158struct ar9170 { 164struct ar9170 {
159 struct ieee80211_hw *hw; 165 struct ieee80211_hw *hw;
160 struct ath_common common; 166 struct ath_common common;
161 struct mutex mutex; 167 struct mutex mutex;
162 enum ar9170_device_state state; 168 enum ar9170_device_state state;
169 bool registered;
163 unsigned long bad_hw_nagger; 170 unsigned long bad_hw_nagger;
164 171
165 int (*open)(struct ar9170 *); 172 int (*open)(struct ar9170 *);
@@ -172,8 +179,6 @@ struct ar9170 {
172 179
173 /* interface mode settings */ 180 /* interface mode settings */
174 struct ieee80211_vif *vif; 181 struct ieee80211_vif *vif;
175 u8 mac_addr[ETH_ALEN];
176 u8 bssid[ETH_ALEN];
177 182
178 /* beaconing */ 183 /* beaconing */
179 struct sk_buff *beacon; 184 struct sk_buff *beacon;
@@ -204,6 +209,8 @@ struct ar9170 {
204 u8 power_2G_ht20[8]; 209 u8 power_2G_ht20[8];
205 u8 power_2G_ht40[8]; 210 u8 power_2G_ht40[8];
206 211
212 u8 phy_heavy_clip;
213
207#ifdef CONFIG_AR9170_LEDS 214#ifdef CONFIG_AR9170_LEDS
208 struct delayed_work led_work; 215 struct delayed_work led_work;
209 struct ar9170_led leds[AR9170_NUM_LEDS]; 216 struct ar9170_led leds[AR9170_NUM_LEDS];
@@ -211,7 +218,7 @@ struct ar9170 {
211 218
212 /* qos queue settings */ 219 /* qos queue settings */
213 spinlock_t tx_stats_lock; 220 spinlock_t tx_stats_lock;
214 struct ieee80211_tx_queue_stats tx_stats[5]; 221 struct ar9170_tx_queue_stats tx_stats[5];
215 struct ieee80211_tx_queue_params edcf[5]; 222 struct ieee80211_tx_queue_params edcf[5];
216 223
217 spinlock_t cmdlock; 224 spinlock_t cmdlock;
@@ -231,7 +238,7 @@ struct ar9170 {
231 struct sk_buff_head tx_status_ampdu; 238 struct sk_buff_head tx_status_ampdu;
232 spinlock_t tx_ampdu_list_lock; 239 spinlock_t tx_ampdu_list_lock;
233 struct list_head tx_ampdu_list; 240 struct list_head tx_ampdu_list;
234 unsigned int tx_ampdu_pending; 241 atomic_t tx_ampdu_pending;
235 242
236 /* rxstream mpdu merge */ 243 /* rxstream mpdu merge */
237 struct ar9170_rxstream_mpdu_merge rx_mpdu; 244 struct ar9170_rxstream_mpdu_merge rx_mpdu;
@@ -248,13 +255,8 @@ struct ar9170_sta_info {
248 unsigned int ampdu_max_len; 255 unsigned int ampdu_max_len;
249}; 256};
250 257
251#define AR9170_TX_FLAG_WAIT_FOR_ACK BIT(0)
252#define AR9170_TX_FLAG_NO_ACK BIT(1)
253#define AR9170_TX_FLAG_BLOCK_ACK BIT(2)
254
255struct ar9170_tx_info { 258struct ar9170_tx_info {
256 unsigned long timeout; 259 unsigned long timeout;
257 unsigned int flags;
258}; 260};
259 261
260#define IS_STARTED(a) (((struct ar9170 *)a)->state >= AR9170_STARTED) 262#define IS_STARTED(a) (((struct ar9170 *)a)->state >= AR9170_STARTED)
diff --git a/drivers/net/wireless/ath/ar9170/cmd.c b/drivers/net/wireless/ath/ar9170/cmd.c
index f57a6200167b..cf6f5c4174a6 100644
--- a/drivers/net/wireless/ath/ar9170/cmd.c
+++ b/drivers/net/wireless/ath/ar9170/cmd.c
@@ -72,8 +72,7 @@ int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val)
72 return err; 72 return err;
73} 73}
74 74
75static int ar9170_read_mreg(struct ar9170 *ar, int nregs, 75int ar9170_read_mreg(struct ar9170 *ar, int nregs, const u32 *regs, u32 *out)
76 const u32 *regs, u32 *out)
77{ 76{
78 int i, err; 77 int i, err;
79 __le32 *offs, *res; 78 __le32 *offs, *res;
diff --git a/drivers/net/wireless/ath/ar9170/cmd.h b/drivers/net/wireless/ath/ar9170/cmd.h
index a4f0e50e52b4..826c45e6b274 100644
--- a/drivers/net/wireless/ath/ar9170/cmd.h
+++ b/drivers/net/wireless/ath/ar9170/cmd.h
@@ -44,6 +44,7 @@
44int ar9170_write_mem(struct ar9170 *ar, const __le32 *data, size_t len); 44int ar9170_write_mem(struct ar9170 *ar, const __le32 *data, size_t len);
45int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val); 45int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val);
46int ar9170_read_reg(struct ar9170 *ar, u32 reg, u32 *val); 46int ar9170_read_reg(struct ar9170 *ar, u32 reg, u32 *val);
47int ar9170_read_mreg(struct ar9170 *ar, int nregs, const u32 *regs, u32 *out);
47int ar9170_echo_test(struct ar9170 *ar, u32 v); 48int ar9170_echo_test(struct ar9170 *ar, u32 v);
48 49
49/* 50/*
diff --git a/drivers/net/wireless/ath/ar9170/hw.h b/drivers/net/wireless/ath/ar9170/hw.h
index 6cbfb2f83391..0a1d4c28e68a 100644
--- a/drivers/net/wireless/ath/ar9170/hw.h
+++ b/drivers/net/wireless/ath/ar9170/hw.h
@@ -152,14 +152,14 @@ enum ar9170_cmd {
152#define AR9170_MAC_REG_FTF_BIT14 BIT(14) 152#define AR9170_MAC_REG_FTF_BIT14 BIT(14)
153#define AR9170_MAC_REG_FTF_BIT15 BIT(15) 153#define AR9170_MAC_REG_FTF_BIT15 BIT(15)
154#define AR9170_MAC_REG_FTF_BAR BIT(24) 154#define AR9170_MAC_REG_FTF_BAR BIT(24)
155#define AR9170_MAC_REG_FTF_BIT25 BIT(25) 155#define AR9170_MAC_REG_FTF_BA BIT(25)
156#define AR9170_MAC_REG_FTF_PSPOLL BIT(26) 156#define AR9170_MAC_REG_FTF_PSPOLL BIT(26)
157#define AR9170_MAC_REG_FTF_RTS BIT(27) 157#define AR9170_MAC_REG_FTF_RTS BIT(27)
158#define AR9170_MAC_REG_FTF_CTS BIT(28) 158#define AR9170_MAC_REG_FTF_CTS BIT(28)
159#define AR9170_MAC_REG_FTF_ACK BIT(29) 159#define AR9170_MAC_REG_FTF_ACK BIT(29)
160#define AR9170_MAC_REG_FTF_CFE BIT(30) 160#define AR9170_MAC_REG_FTF_CFE BIT(30)
161#define AR9170_MAC_REG_FTF_CFE_ACK BIT(31) 161#define AR9170_MAC_REG_FTF_CFE_ACK BIT(31)
162#define AR9170_MAC_REG_FTF_DEFAULTS 0x0500ffff 162#define AR9170_MAC_REG_FTF_DEFAULTS 0x0700ffff
163#define AR9170_MAC_REG_FTF_MONITOR 0xfd00ffff 163#define AR9170_MAC_REG_FTF_MONITOR 0xfd00ffff
164 164
165#define AR9170_MAC_REG_RX_TOTAL (AR9170_MAC_REG_BASE + 0x6A0) 165#define AR9170_MAC_REG_RX_TOTAL (AR9170_MAC_REG_BASE + 0x6A0)
@@ -276,6 +276,7 @@ struct ar9170_tx_control {
276#define AR9170_TX_MAC_RATE_PROBE 0x8000 276#define AR9170_TX_MAC_RATE_PROBE 0x8000
277 277
278/* either-or */ 278/* either-or */
279#define AR9170_TX_PHY_MOD_MASK 0x00000003
279#define AR9170_TX_PHY_MOD_CCK 0x00000000 280#define AR9170_TX_PHY_MOD_CCK 0x00000000
280#define AR9170_TX_PHY_MOD_OFDM 0x00000001 281#define AR9170_TX_PHY_MOD_OFDM 0x00000001
281#define AR9170_TX_PHY_MOD_HT 0x00000002 282#define AR9170_TX_PHY_MOD_HT 0x00000002
@@ -311,6 +312,8 @@ struct ar9170_tx_control {
311 312
312#define AR9170_TX_PHY_SHORT_GI 0x80000000 313#define AR9170_TX_PHY_SHORT_GI 0x80000000
313 314
315#define AR5416_MAX_RATE_POWER 63
316
314struct ar9170_rx_head { 317struct ar9170_rx_head {
315 u8 plcp[12]; 318 u8 plcp[12];
316} __packed; 319} __packed;
diff --git a/drivers/net/wireless/ath/ar9170/mac.c b/drivers/net/wireless/ath/ar9170/mac.c
index 614e3218a2bc..857e86104295 100644
--- a/drivers/net/wireless/ath/ar9170/mac.c
+++ b/drivers/net/wireless/ath/ar9170/mac.c
@@ -35,6 +35,9 @@
35 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 35 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
36 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 36 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
37 */ 37 */
38
39#include <asm/unaligned.h>
40
38#include "ar9170.h" 41#include "ar9170.h"
39#include "cmd.h" 42#include "cmd.h"
40 43
@@ -114,7 +117,7 @@ int ar9170_set_qos(struct ar9170 *ar)
114 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP, 117 ar9170_regwrite(AR9170_MAC_REG_AC1_AC0_TXOP,
115 ar->edcf[0].txop | ar->edcf[1].txop << 16); 118 ar->edcf[0].txop | ar->edcf[1].txop << 16);
116 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP, 119 ar9170_regwrite(AR9170_MAC_REG_AC3_AC2_TXOP,
117 ar->edcf[1].txop | ar->edcf[3].txop << 16); 120 ar->edcf[2].txop | ar->edcf[3].txop << 16);
118 121
119 ar9170_regwrite_finish(); 122 ar9170_regwrite_finish();
120 123
@@ -227,11 +230,8 @@ static int ar9170_set_mac_reg(struct ar9170 *ar, const u32 reg, const u8 *mac)
227 230
228 ar9170_regwrite_begin(ar); 231 ar9170_regwrite_begin(ar);
229 232
230 ar9170_regwrite(reg, 233 ar9170_regwrite(reg, get_unaligned_le32(mac));
231 (mac[3] << 24) | (mac[2] << 16) | 234 ar9170_regwrite(reg + 4, get_unaligned_le16(mac + 4));
232 (mac[1] << 8) | mac[0]);
233
234 ar9170_regwrite(reg + 4, (mac[5] << 8) | mac[4]);
235 235
236 ar9170_regwrite_finish(); 236 ar9170_regwrite_finish();
237 237
@@ -311,13 +311,14 @@ static int ar9170_set_promiscouous(struct ar9170 *ar)
311 311
312int ar9170_set_operating_mode(struct ar9170 *ar) 312int ar9170_set_operating_mode(struct ar9170 *ar)
313{ 313{
314 struct ath_common *common = &ar->common;
314 u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS; 315 u32 pm_mode = AR9170_MAC_REG_POWERMGT_DEFAULTS;
315 u8 *mac_addr, *bssid; 316 u8 *mac_addr, *bssid;
316 int err; 317 int err;
317 318
318 if (ar->vif) { 319 if (ar->vif) {
319 mac_addr = ar->mac_addr; 320 mac_addr = common->macaddr;
320 bssid = ar->bssid; 321 bssid = common->curbssid;
321 322
322 switch (ar->vif->type) { 323 switch (ar->vif->type) {
323 case NL80211_IFTYPE_MESH_POINT: 324 case NL80211_IFTYPE_MESH_POINT:
diff --git a/drivers/net/wireless/ath/ar9170/main.c b/drivers/net/wireless/ath/ar9170/main.c
index c1f8c69db165..c53692980990 100644
--- a/drivers/net/wireless/ath/ar9170/main.c
+++ b/drivers/net/wireless/ath/ar9170/main.c
@@ -38,6 +38,7 @@
38 */ 38 */
39 39
40#include <linux/init.h> 40#include <linux/init.h>
41#include <linux/slab.h>
41#include <linux/module.h> 42#include <linux/module.h>
42#include <linux/etherdevice.h> 43#include <linux/etherdevice.h>
43#include <net/mac80211.h> 44#include <net/mac80211.h>
@@ -194,12 +195,15 @@ static inline u16 ar9170_get_seq(struct sk_buff *skb)
194 return ar9170_get_seq_h((void *) txc->frame_data); 195 return ar9170_get_seq_h((void *) txc->frame_data);
195} 196}
196 197
198static inline u16 ar9170_get_tid_h(struct ieee80211_hdr *hdr)
199{
200 return (ieee80211_get_qos_ctl(hdr))[0] & IEEE80211_QOS_CTL_TID_MASK;
201}
202
197static inline u16 ar9170_get_tid(struct sk_buff *skb) 203static inline u16 ar9170_get_tid(struct sk_buff *skb)
198{ 204{
199 struct ar9170_tx_control *txc = (void *) skb->data; 205 struct ar9170_tx_control *txc = (void *) skb->data;
200 struct ieee80211_hdr *hdr = (void *) txc->frame_data; 206 return ar9170_get_tid_h((struct ieee80211_hdr *) txc->frame_data);
201
202 return (ieee80211_get_qos_ctl(hdr))[0] & IEEE80211_QOS_CTL_TID_MASK;
203} 207}
204 208
205#define GET_NEXT_SEQ(seq) ((seq + 1) & 0x0fff) 209#define GET_NEXT_SEQ(seq) ((seq + 1) & 0x0fff)
@@ -213,10 +217,10 @@ static void ar9170_print_txheader(struct ar9170 *ar, struct sk_buff *skb)
213 struct ar9170_tx_info *arinfo = (void *) txinfo->rate_driver_data; 217 struct ar9170_tx_info *arinfo = (void *) txinfo->rate_driver_data;
214 struct ieee80211_hdr *hdr = (void *) txc->frame_data; 218 struct ieee80211_hdr *hdr = (void *) txc->frame_data;
215 219
216 printk(KERN_DEBUG "%s: => FRAME [skb:%p, q:%d, DA:[%pM] flags:%x s:%d " 220 printk(KERN_DEBUG "%s: => FRAME [skb:%p, q:%d, DA:[%pM] s:%d "
217 "mac_ctrl:%04x, phy_ctrl:%08x, timeout:[%d ms]]\n", 221 "mac_ctrl:%04x, phy_ctrl:%08x, timeout:[%d ms]]\n",
218 wiphy_name(ar->hw->wiphy), skb, skb_get_queue_mapping(skb), 222 wiphy_name(ar->hw->wiphy), skb, skb_get_queue_mapping(skb),
219 ieee80211_get_DA(hdr), arinfo->flags, ar9170_get_seq_h(hdr), 223 ieee80211_get_DA(hdr), ar9170_get_seq_h(hdr),
220 le16_to_cpu(txc->mac_control), le32_to_cpu(txc->phy_control), 224 le16_to_cpu(txc->mac_control), le32_to_cpu(txc->phy_control),
221 jiffies_to_msecs(arinfo->timeout - jiffies)); 225 jiffies_to_msecs(arinfo->timeout - jiffies));
222} 226}
@@ -391,7 +395,7 @@ static void ar9170_tx_fake_ampdu_status(struct ar9170 *ar)
391 ieee80211_tx_status_irqsafe(ar->hw, skb); 395 ieee80211_tx_status_irqsafe(ar->hw, skb);
392 } 396 }
393 397
394 for_each_bit(i, &queue_bitmap, BITS_PER_BYTE) { 398 for_each_set_bit(i, &queue_bitmap, BITS_PER_BYTE) {
395#ifdef AR9170_QUEUE_STOP_DEBUG 399#ifdef AR9170_QUEUE_STOP_DEBUG
396 printk(KERN_DEBUG "%s: wake queue %d\n", 400 printk(KERN_DEBUG "%s: wake queue %d\n",
397 wiphy_name(ar->hw->wiphy), i); 401 wiphy_name(ar->hw->wiphy), i);
@@ -414,9 +418,9 @@ static void ar9170_tx_ampdu_callback(struct ar9170 *ar, struct sk_buff *skb)
414 418
415 skb_queue_tail(&ar->tx_status_ampdu, skb); 419 skb_queue_tail(&ar->tx_status_ampdu, skb);
416 ar9170_tx_fake_ampdu_status(ar); 420 ar9170_tx_fake_ampdu_status(ar);
417 ar->tx_ampdu_pending--;
418 421
419 if (!list_empty(&ar->tx_ampdu_list) && !ar->tx_ampdu_pending) 422 if (atomic_dec_and_test(&ar->tx_ampdu_pending) &&
423 !list_empty(&ar->tx_ampdu_list))
420 ar9170_tx_ampdu(ar); 424 ar9170_tx_ampdu(ar);
421} 425}
422 426
@@ -430,7 +434,7 @@ void ar9170_tx_callback(struct ar9170 *ar, struct sk_buff *skb)
430 spin_lock_irqsave(&ar->tx_stats_lock, flags); 434 spin_lock_irqsave(&ar->tx_stats_lock, flags);
431 ar->tx_stats[queue].len--; 435 ar->tx_stats[queue].len--;
432 436
433 if (skb_queue_empty(&ar->tx_pending[queue])) { 437 if (ar->tx_stats[queue].len < AR9170_NUM_TX_LIMIT_SOFT) {
434#ifdef AR9170_QUEUE_STOP_DEBUG 438#ifdef AR9170_QUEUE_STOP_DEBUG
435 printk(KERN_DEBUG "%s: wake queue %d\n", 439 printk(KERN_DEBUG "%s: wake queue %d\n",
436 wiphy_name(ar->hw->wiphy), queue); 440 wiphy_name(ar->hw->wiphy), queue);
@@ -440,22 +444,17 @@ void ar9170_tx_callback(struct ar9170 *ar, struct sk_buff *skb)
440 } 444 }
441 spin_unlock_irqrestore(&ar->tx_stats_lock, flags); 445 spin_unlock_irqrestore(&ar->tx_stats_lock, flags);
442 446
443 if (arinfo->flags & AR9170_TX_FLAG_BLOCK_ACK) { 447 if (info->flags & IEEE80211_TX_CTL_NO_ACK) {
444 ar9170_tx_ampdu_callback(ar, skb);
445 } else if (arinfo->flags & AR9170_TX_FLAG_WAIT_FOR_ACK) {
446 arinfo->timeout = jiffies +
447 msecs_to_jiffies(AR9170_TX_TIMEOUT);
448
449 skb_queue_tail(&ar->tx_status[queue], skb);
450 } else if (arinfo->flags & AR9170_TX_FLAG_NO_ACK) {
451 ar9170_tx_status(ar, skb, AR9170_TX_STATUS_FAILED); 448 ar9170_tx_status(ar, skb, AR9170_TX_STATUS_FAILED);
452 } else { 449 } else {
453#ifdef AR9170_QUEUE_DEBUG 450 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
454 printk(KERN_DEBUG "%s: unsupported frame flags!\n", 451 ar9170_tx_ampdu_callback(ar, skb);
455 wiphy_name(ar->hw->wiphy)); 452 } else {
456 ar9170_print_txheader(ar, skb); 453 arinfo->timeout = jiffies +
457#endif /* AR9170_QUEUE_DEBUG */ 454 msecs_to_jiffies(AR9170_TX_TIMEOUT);
458 dev_kfree_skb_any(skb); 455
456 skb_queue_tail(&ar->tx_status[queue], skb);
457 }
459 } 458 }
460 459
461 if (!ar->tx_stats[queue].len && 460 if (!ar->tx_stats[queue].len &&
@@ -850,6 +849,7 @@ static int ar9170_rx_mac_status(struct ar9170 *ar,
850 } 849 }
851 break; 850 break;
852 851
852 case AR9170_RX_STATUS_MODULATION_DUPOFDM:
853 case AR9170_RX_STATUS_MODULATION_OFDM: 853 case AR9170_RX_STATUS_MODULATION_OFDM:
854 switch (head->plcp[0] & 0xf) { 854 switch (head->plcp[0] & 0xf) {
855 case 0xb: 855 case 0xb:
@@ -897,8 +897,7 @@ static int ar9170_rx_mac_status(struct ar9170 *ar,
897 status->flag |= RX_FLAG_HT; 897 status->flag |= RX_FLAG_HT;
898 break; 898 break;
899 899
900 case AR9170_RX_STATUS_MODULATION_DUPOFDM: 900 default:
901 /* XXX */
902 if (ar9170_nag_limiter(ar)) 901 if (ar9170_nag_limiter(ar))
903 printk(KERN_ERR "%s: invalid modulation\n", 902 printk(KERN_ERR "%s: invalid modulation\n",
904 wiphy_name(ar->hw->wiphy)); 903 wiphy_name(ar->hw->wiphy));
@@ -1248,6 +1247,7 @@ static int ar9170_op_start(struct ieee80211_hw *hw)
1248 ar->global_ampdu_density = 6; 1247 ar->global_ampdu_density = 6;
1249 ar->global_ampdu_factor = 3; 1248 ar->global_ampdu_factor = 3;
1250 1249
1250 atomic_set(&ar->tx_ampdu_pending, 0);
1251 ar->bad_hw_nagger = jiffies; 1251 ar->bad_hw_nagger = jiffies;
1252 1252
1253 err = ar->open(ar); 1253 err = ar->open(ar);
@@ -1406,17 +1406,6 @@ static int ar9170_tx_prepare(struct ar9170 *ar, struct sk_buff *skb)
1406 1406
1407 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) && 1407 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
1408 (is_valid_ether_addr(ieee80211_get_DA(hdr)))) { 1408 (is_valid_ether_addr(ieee80211_get_DA(hdr)))) {
1409 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
1410 if (unlikely(!info->control.sta))
1411 goto err_out;
1412
1413 txc->mac_control |= cpu_to_le16(AR9170_TX_MAC_AGGR);
1414 arinfo->flags = AR9170_TX_FLAG_BLOCK_ACK;
1415
1416 goto out;
1417 }
1418
1419 txc->mac_control |= cpu_to_le16(AR9170_TX_MAC_RATE_PROBE);
1420 /* 1409 /*
1421 * WARNING: 1410 * WARNING:
1422 * Putting the QoS queue bits into an unexplored territory is 1411 * Putting the QoS queue bits into an unexplored territory is
@@ -1430,12 +1419,17 @@ static int ar9170_tx_prepare(struct ar9170 *ar, struct sk_buff *skb)
1430 1419
1431 txc->phy_control |= 1420 txc->phy_control |=
1432 cpu_to_le32(queue << AR9170_TX_PHY_QOS_SHIFT); 1421 cpu_to_le32(queue << AR9170_TX_PHY_QOS_SHIFT);
1433 arinfo->flags = AR9170_TX_FLAG_WAIT_FOR_ACK; 1422
1434 } else { 1423 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
1435 arinfo->flags = AR9170_TX_FLAG_NO_ACK; 1424 if (unlikely(!info->control.sta))
1425 goto err_out;
1426
1427 txc->mac_control |= cpu_to_le16(AR9170_TX_MAC_AGGR);
1428 } else {
1429 txc->mac_control |= cpu_to_le16(AR9170_TX_MAC_RATE_PROBE);
1430 }
1436 } 1431 }
1437 1432
1438out:
1439 return 0; 1433 return 0;
1440 1434
1441err_out: 1435err_out:
@@ -1670,8 +1664,7 @@ static bool ar9170_tx_ampdu(struct ar9170 *ar)
1670 * tell the FW/HW that this is the last frame, 1664 * tell the FW/HW that this is the last frame,
1671 * that way it will wait for the immediate block ack. 1665 * that way it will wait for the immediate block ack.
1672 */ 1666 */
1673 if (likely(skb_peek_tail(&agg))) 1667 ar9170_tx_indicate_immba(ar, skb_peek_tail(&agg));
1674 ar9170_tx_indicate_immba(ar, skb_peek_tail(&agg));
1675 1668
1676#ifdef AR9170_TXAGG_DEBUG 1669#ifdef AR9170_TXAGG_DEBUG
1677 printk(KERN_DEBUG "%s: generated A-MPDU looks like this:\n", 1670 printk(KERN_DEBUG "%s: generated A-MPDU looks like this:\n",
@@ -1715,6 +1708,21 @@ static void ar9170_tx(struct ar9170 *ar)
1715 1708
1716 for (i = 0; i < __AR9170_NUM_TXQ; i++) { 1709 for (i = 0; i < __AR9170_NUM_TXQ; i++) {
1717 spin_lock_irqsave(&ar->tx_stats_lock, flags); 1710 spin_lock_irqsave(&ar->tx_stats_lock, flags);
1711 frames = min(ar->tx_stats[i].limit - ar->tx_stats[i].len,
1712 skb_queue_len(&ar->tx_pending[i]));
1713
1714 if (remaining_space < frames) {
1715#ifdef AR9170_QUEUE_DEBUG
1716 printk(KERN_DEBUG "%s: tx quota reached queue:%d, "
1717 "remaining slots:%d, needed:%d\n",
1718 wiphy_name(ar->hw->wiphy), i, remaining_space,
1719 frames);
1720#endif /* AR9170_QUEUE_DEBUG */
1721 frames = remaining_space;
1722 }
1723
1724 ar->tx_stats[i].len += frames;
1725 ar->tx_stats[i].count += frames;
1718 if (ar->tx_stats[i].len >= ar->tx_stats[i].limit) { 1726 if (ar->tx_stats[i].len >= ar->tx_stats[i].limit) {
1719#ifdef AR9170_QUEUE_DEBUG 1727#ifdef AR9170_QUEUE_DEBUG
1720 printk(KERN_DEBUG "%s: queue %d full\n", 1728 printk(KERN_DEBUG "%s: queue %d full\n",
@@ -1732,25 +1740,8 @@ static void ar9170_tx(struct ar9170 *ar)
1732 __ar9170_dump_txstats(ar); 1740 __ar9170_dump_txstats(ar);
1733#endif /* AR9170_QUEUE_STOP_DEBUG */ 1741#endif /* AR9170_QUEUE_STOP_DEBUG */
1734 ieee80211_stop_queue(ar->hw, i); 1742 ieee80211_stop_queue(ar->hw, i);
1735 spin_unlock_irqrestore(&ar->tx_stats_lock, flags);
1736 continue;
1737 } 1743 }
1738 1744
1739 frames = min(ar->tx_stats[i].limit - ar->tx_stats[i].len,
1740 skb_queue_len(&ar->tx_pending[i]));
1741
1742 if (remaining_space < frames) {
1743#ifdef AR9170_QUEUE_DEBUG
1744 printk(KERN_DEBUG "%s: tx quota reached queue:%d, "
1745 "remaining slots:%d, needed:%d\n",
1746 wiphy_name(ar->hw->wiphy), i, remaining_space,
1747 frames);
1748#endif /* AR9170_QUEUE_DEBUG */
1749 frames = remaining_space;
1750 }
1751
1752 ar->tx_stats[i].len += frames;
1753 ar->tx_stats[i].count += frames;
1754 spin_unlock_irqrestore(&ar->tx_stats_lock, flags); 1745 spin_unlock_irqrestore(&ar->tx_stats_lock, flags);
1755 1746
1756 if (!frames) 1747 if (!frames)
@@ -1772,8 +1763,8 @@ static void ar9170_tx(struct ar9170 *ar)
1772 arinfo->timeout = jiffies + 1763 arinfo->timeout = jiffies +
1773 msecs_to_jiffies(AR9170_TX_TIMEOUT); 1764 msecs_to_jiffies(AR9170_TX_TIMEOUT);
1774 1765
1775 if (arinfo->flags == AR9170_TX_FLAG_BLOCK_ACK) 1766 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1776 ar->tx_ampdu_pending++; 1767 atomic_inc(&ar->tx_ampdu_pending);
1777 1768
1778#ifdef AR9170_QUEUE_DEBUG 1769#ifdef AR9170_QUEUE_DEBUG
1779 printk(KERN_DEBUG "%s: send frame q:%d =>\n", 1770 printk(KERN_DEBUG "%s: send frame q:%d =>\n",
@@ -1783,8 +1774,8 @@ static void ar9170_tx(struct ar9170 *ar)
1783 1774
1784 err = ar->tx(ar, skb); 1775 err = ar->tx(ar, skb);
1785 if (unlikely(err)) { 1776 if (unlikely(err)) {
1786 if (arinfo->flags == AR9170_TX_FLAG_BLOCK_ACK) 1777 if (info->flags & IEEE80211_TX_CTL_AMPDU)
1787 ar->tx_ampdu_pending--; 1778 atomic_dec(&ar->tx_ampdu_pending);
1788 1779
1789 frames_failed++; 1780 frames_failed++;
1790 dev_kfree_skb_any(skb); 1781 dev_kfree_skb_any(skb);
@@ -1931,7 +1922,7 @@ int ar9170_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
1931 if (info->flags & IEEE80211_TX_CTL_AMPDU) { 1922 if (info->flags & IEEE80211_TX_CTL_AMPDU) {
1932 bool run = ar9170_tx_ampdu_queue(ar, skb); 1923 bool run = ar9170_tx_ampdu_queue(ar, skb);
1933 1924
1934 if (run || !ar->tx_ampdu_pending) 1925 if (run || !atomic_read(&ar->tx_ampdu_pending))
1935 ar9170_tx_ampdu(ar); 1926 ar9170_tx_ampdu(ar);
1936 } else { 1927 } else {
1937 unsigned int queue = skb_get_queue_mapping(skb); 1928 unsigned int queue = skb_get_queue_mapping(skb);
@@ -1949,9 +1940,10 @@ err_free:
1949} 1940}
1950 1941
1951static int ar9170_op_add_interface(struct ieee80211_hw *hw, 1942static int ar9170_op_add_interface(struct ieee80211_hw *hw,
1952 struct ieee80211_if_init_conf *conf) 1943 struct ieee80211_vif *vif)
1953{ 1944{
1954 struct ar9170 *ar = hw->priv; 1945 struct ar9170 *ar = hw->priv;
1946 struct ath_common *common = &ar->common;
1955 int err = 0; 1947 int err = 0;
1956 1948
1957 mutex_lock(&ar->mutex); 1949 mutex_lock(&ar->mutex);
@@ -1961,8 +1953,8 @@ static int ar9170_op_add_interface(struct ieee80211_hw *hw,
1961 goto unlock; 1953 goto unlock;
1962 } 1954 }
1963 1955
1964 ar->vif = conf->vif; 1956 ar->vif = vif;
1965 memcpy(ar->mac_addr, conf->mac_addr, ETH_ALEN); 1957 memcpy(common->macaddr, vif->addr, ETH_ALEN);
1966 1958
1967 if (modparam_nohwcrypt || (ar->vif->type != NL80211_IFTYPE_STATION)) { 1959 if (modparam_nohwcrypt || (ar->vif->type != NL80211_IFTYPE_STATION)) {
1968 ar->rx_software_decryption = true; 1960 ar->rx_software_decryption = true;
@@ -1982,7 +1974,7 @@ unlock:
1982} 1974}
1983 1975
1984static void ar9170_op_remove_interface(struct ieee80211_hw *hw, 1976static void ar9170_op_remove_interface(struct ieee80211_hw *hw,
1985 struct ieee80211_if_init_conf *conf) 1977 struct ieee80211_vif *vif)
1986{ 1978{
1987 struct ar9170 *ar = hw->priv; 1979 struct ar9170 *ar = hw->priv;
1988 1980
@@ -2131,12 +2123,13 @@ static void ar9170_op_bss_info_changed(struct ieee80211_hw *hw,
2131 u32 changed) 2123 u32 changed)
2132{ 2124{
2133 struct ar9170 *ar = hw->priv; 2125 struct ar9170 *ar = hw->priv;
2126 struct ath_common *common = &ar->common;
2134 int err = 0; 2127 int err = 0;
2135 2128
2136 mutex_lock(&ar->mutex); 2129 mutex_lock(&ar->mutex);
2137 2130
2138 if (changed & BSS_CHANGED_BSSID) { 2131 if (changed & BSS_CHANGED_BSSID) {
2139 memcpy(ar->bssid, bss_conf->bssid, ETH_ALEN); 2132 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2140 err = ar9170_set_operating_mode(ar); 2133 err = ar9170_set_operating_mode(ar);
2141 if (err) 2134 if (err)
2142 goto out; 2135 goto out;
@@ -2190,22 +2183,30 @@ static u64 ar9170_op_get_tsf(struct ieee80211_hw *hw)
2190{ 2183{
2191 struct ar9170 *ar = hw->priv; 2184 struct ar9170 *ar = hw->priv;
2192 int err; 2185 int err;
2193 u32 tsf_low;
2194 u32 tsf_high;
2195 u64 tsf; 2186 u64 tsf;
2187#define NR 3
2188 static const u32 addr[NR] = { AR9170_MAC_REG_TSF_H,
2189 AR9170_MAC_REG_TSF_L,
2190 AR9170_MAC_REG_TSF_H };
2191 u32 val[NR];
2192 int loops = 0;
2196 2193
2197 mutex_lock(&ar->mutex); 2194 mutex_lock(&ar->mutex);
2198 err = ar9170_read_reg(ar, AR9170_MAC_REG_TSF_L, &tsf_low); 2195
2199 if (!err) 2196 while (loops++ < 10) {
2200 err = ar9170_read_reg(ar, AR9170_MAC_REG_TSF_H, &tsf_high); 2197 err = ar9170_read_mreg(ar, NR, addr, val);
2198 if (err || val[0] == val[2])
2199 break;
2200 }
2201
2201 mutex_unlock(&ar->mutex); 2202 mutex_unlock(&ar->mutex);
2202 2203
2203 if (WARN_ON(err)) 2204 if (WARN_ON(err))
2204 return 0; 2205 return 0;
2205 2206 tsf = val[0];
2206 tsf = tsf_high; 2207 tsf = (tsf << 32) | val[1];
2207 tsf = (tsf << 32) | tsf_low;
2208 return tsf; 2208 return tsf;
2209#undef NR
2209} 2210}
2210 2211
2211static int ar9170_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2212static int ar9170_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
@@ -2329,55 +2330,55 @@ out:
2329 return err; 2330 return err;
2330} 2331}
2331 2332
2332static void ar9170_sta_notify(struct ieee80211_hw *hw, 2333static int ar9170_sta_add(struct ieee80211_hw *hw,
2333 struct ieee80211_vif *vif, 2334 struct ieee80211_vif *vif,
2334 enum sta_notify_cmd cmd, 2335 struct ieee80211_sta *sta)
2335 struct ieee80211_sta *sta)
2336{ 2336{
2337 struct ar9170 *ar = hw->priv; 2337 struct ar9170 *ar = hw->priv;
2338 struct ar9170_sta_info *sta_info = (void *) sta->drv_priv; 2338 struct ar9170_sta_info *sta_info = (void *) sta->drv_priv;
2339 unsigned int i; 2339 unsigned int i;
2340 2340
2341 switch (cmd) { 2341 memset(sta_info, 0, sizeof(*sta_info));
2342 case STA_NOTIFY_ADD:
2343 memset(sta_info, 0, sizeof(*sta_info));
2344 2342
2345 if (!sta->ht_cap.ht_supported) 2343 if (!sta->ht_cap.ht_supported)
2346 break; 2344 return 0;
2347 2345
2348 if (sta->ht_cap.ampdu_density > ar->global_ampdu_density) 2346 if (sta->ht_cap.ampdu_density > ar->global_ampdu_density)
2349 ar->global_ampdu_density = sta->ht_cap.ampdu_density; 2347 ar->global_ampdu_density = sta->ht_cap.ampdu_density;
2350 2348
2351 if (sta->ht_cap.ampdu_factor < ar->global_ampdu_factor) 2349 if (sta->ht_cap.ampdu_factor < ar->global_ampdu_factor)
2352 ar->global_ampdu_factor = sta->ht_cap.ampdu_factor; 2350 ar->global_ampdu_factor = sta->ht_cap.ampdu_factor;
2353 2351
2354 for (i = 0; i < AR9170_NUM_TID; i++) { 2352 for (i = 0; i < AR9170_NUM_TID; i++) {
2355 sta_info->agg[i].state = AR9170_TID_STATE_SHUTDOWN; 2353 sta_info->agg[i].state = AR9170_TID_STATE_SHUTDOWN;
2356 sta_info->agg[i].active = false; 2354 sta_info->agg[i].active = false;
2357 sta_info->agg[i].ssn = 0; 2355 sta_info->agg[i].ssn = 0;
2358 sta_info->agg[i].retry = 0; 2356 sta_info->agg[i].tid = i;
2359 sta_info->agg[i].tid = i; 2357 INIT_LIST_HEAD(&sta_info->agg[i].list);
2360 INIT_LIST_HEAD(&sta_info->agg[i].list); 2358 skb_queue_head_init(&sta_info->agg[i].queue);
2361 skb_queue_head_init(&sta_info->agg[i].queue); 2359 }
2362 }
2363 2360
2364 sta_info->ampdu_max_len = 1 << (3 + sta->ht_cap.ampdu_factor); 2361 sta_info->ampdu_max_len = 1 << (3 + sta->ht_cap.ampdu_factor);
2365 break;
2366 2362
2367 case STA_NOTIFY_REMOVE: 2363 return 0;
2368 if (!sta->ht_cap.ht_supported) 2364}
2369 break;
2370 2365
2371 for (i = 0; i < AR9170_NUM_TID; i++) { 2366static int ar9170_sta_remove(struct ieee80211_hw *hw,
2372 sta_info->agg[i].state = AR9170_TID_STATE_INVALID; 2367 struct ieee80211_vif *vif,
2373 skb_queue_purge(&sta_info->agg[i].queue); 2368 struct ieee80211_sta *sta)
2374 } 2369{
2370 struct ar9170_sta_info *sta_info = (void *) sta->drv_priv;
2371 unsigned int i;
2375 2372
2376 break; 2373 if (!sta->ht_cap.ht_supported)
2374 return 0;
2377 2375
2378 default: 2376 for (i = 0; i < AR9170_NUM_TID; i++) {
2379 break; 2377 sta_info->agg[i].state = AR9170_TID_STATE_INVALID;
2378 skb_queue_purge(&sta_info->agg[i].queue);
2380 } 2379 }
2380
2381 return 0;
2381} 2382}
2382 2383
2383static int ar9170_get_stats(struct ieee80211_hw *hw, 2384static int ar9170_get_stats(struct ieee80211_hw *hw,
@@ -2397,18 +2398,6 @@ static int ar9170_get_stats(struct ieee80211_hw *hw,
2397 return 0; 2398 return 0;
2398} 2399}
2399 2400
2400static int ar9170_get_tx_stats(struct ieee80211_hw *hw,
2401 struct ieee80211_tx_queue_stats *tx_stats)
2402{
2403 struct ar9170 *ar = hw->priv;
2404
2405 spin_lock_bh(&ar->tx_stats_lock);
2406 memcpy(tx_stats, ar->tx_stats, sizeof(tx_stats[0]) * hw->queues);
2407 spin_unlock_bh(&ar->tx_stats_lock);
2408
2409 return 0;
2410}
2411
2412static int ar9170_conf_tx(struct ieee80211_hw *hw, u16 queue, 2401static int ar9170_conf_tx(struct ieee80211_hw *hw, u16 queue,
2413 const struct ieee80211_tx_queue_params *param) 2402 const struct ieee80211_tx_queue_params *param)
2414{ 2403{
@@ -2430,6 +2419,7 @@ static int ar9170_conf_tx(struct ieee80211_hw *hw, u16 queue,
2430} 2419}
2431 2420
2432static int ar9170_ampdu_action(struct ieee80211_hw *hw, 2421static int ar9170_ampdu_action(struct ieee80211_hw *hw,
2422 struct ieee80211_vif *vif,
2433 enum ieee80211_ampdu_mlme_action action, 2423 enum ieee80211_ampdu_mlme_action action,
2434 struct ieee80211_sta *sta, u16 tid, u16 *ssn) 2424 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2435{ 2425{
@@ -2459,7 +2449,7 @@ static int ar9170_ampdu_action(struct ieee80211_hw *hw,
2459 tid_info->state = AR9170_TID_STATE_PROGRESS; 2449 tid_info->state = AR9170_TID_STATE_PROGRESS;
2460 tid_info->active = false; 2450 tid_info->active = false;
2461 spin_unlock_irqrestore(&ar->tx_ampdu_list_lock, flags); 2451 spin_unlock_irqrestore(&ar->tx_ampdu_list_lock, flags);
2462 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid); 2452 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2463 break; 2453 break;
2464 2454
2465 case IEEE80211_AMPDU_TX_STOP: 2455 case IEEE80211_AMPDU_TX_STOP:
@@ -2469,7 +2459,7 @@ static int ar9170_ampdu_action(struct ieee80211_hw *hw,
2469 tid_info->active = false; 2459 tid_info->active = false;
2470 skb_queue_purge(&tid_info->queue); 2460 skb_queue_purge(&tid_info->queue);
2471 spin_unlock_irqrestore(&ar->tx_ampdu_list_lock, flags); 2461 spin_unlock_irqrestore(&ar->tx_ampdu_list_lock, flags);
2472 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid); 2462 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2473 break; 2463 break;
2474 2464
2475 case IEEE80211_AMPDU_TX_OPERATIONAL: 2465 case IEEE80211_AMPDU_TX_OPERATIONAL:
@@ -2507,9 +2497,9 @@ static const struct ieee80211_ops ar9170_ops = {
2507 .bss_info_changed = ar9170_op_bss_info_changed, 2497 .bss_info_changed = ar9170_op_bss_info_changed,
2508 .get_tsf = ar9170_op_get_tsf, 2498 .get_tsf = ar9170_op_get_tsf,
2509 .set_key = ar9170_set_key, 2499 .set_key = ar9170_set_key,
2510 .sta_notify = ar9170_sta_notify, 2500 .sta_add = ar9170_sta_add,
2501 .sta_remove = ar9170_sta_remove,
2511 .get_stats = ar9170_get_stats, 2502 .get_stats = ar9170_get_stats,
2512 .get_tx_stats = ar9170_get_tx_stats,
2513 .ampdu_action = ar9170_ampdu_action, 2503 .ampdu_action = ar9170_ampdu_action,
2514}; 2504};
2515 2505
@@ -2523,7 +2513,7 @@ void *ar9170_alloc(size_t priv_size)
2523 /* 2513 /*
2524 * this buffer is used for rx stream reconstruction. 2514 * this buffer is used for rx stream reconstruction.
2525 * Under heavy load this device (or the transport layer?) 2515 * Under heavy load this device (or the transport layer?)
2526 * tends to split the streams into seperate rx descriptors. 2516 * tends to split the streams into separate rx descriptors.
2527 */ 2517 */
2528 2518
2529 skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL); 2519 skb = __dev_alloc_skb(AR9170_MAX_RX_BUFFER_SIZE, GFP_KERNEL);
@@ -2712,7 +2702,8 @@ int ar9170_register(struct ar9170 *ar, struct device *pdev)
2712 dev_info(pdev, "Atheros AR9170 is registered as '%s'\n", 2702 dev_info(pdev, "Atheros AR9170 is registered as '%s'\n",
2713 wiphy_name(ar->hw->wiphy)); 2703 wiphy_name(ar->hw->wiphy));
2714 2704
2715 return err; 2705 ar->registered = true;
2706 return 0;
2716 2707
2717err_unreg: 2708err_unreg:
2718 ieee80211_unregister_hw(ar->hw); 2709 ieee80211_unregister_hw(ar->hw);
@@ -2723,11 +2714,14 @@ err_out:
2723 2714
2724void ar9170_unregister(struct ar9170 *ar) 2715void ar9170_unregister(struct ar9170 *ar)
2725{ 2716{
2717 if (ar->registered) {
2726#ifdef CONFIG_AR9170_LEDS 2718#ifdef CONFIG_AR9170_LEDS
2727 ar9170_unregister_leds(ar); 2719 ar9170_unregister_leds(ar);
2728#endif /* CONFIG_AR9170_LEDS */ 2720#endif /* CONFIG_AR9170_LEDS */
2729 2721
2730 kfree_skb(ar->rx_failover);
2731 ieee80211_unregister_hw(ar->hw); 2722 ieee80211_unregister_hw(ar->hw);
2723 }
2724
2725 kfree_skb(ar->rx_failover);
2732 mutex_destroy(&ar->mutex); 2726 mutex_destroy(&ar->mutex);
2733} 2727}
diff --git a/drivers/net/wireless/ath/ar9170/phy.c b/drivers/net/wireless/ath/ar9170/phy.c
index dbd488da18b1..45a415ea809a 100644
--- a/drivers/net/wireless/ath/ar9170/phy.c
+++ b/drivers/net/wireless/ath/ar9170/phy.c
@@ -1239,9 +1239,6 @@ static u8 ar9170_get_max_edge_power(struct ar9170 *ar,
1239 struct ar9170_calctl_edges edges[], 1239 struct ar9170_calctl_edges edges[],
1240 u32 freq) 1240 u32 freq)
1241{ 1241{
1242/* TODO: move somewhere else */
1243#define AR5416_MAX_RATE_POWER 63
1244
1245 int i; 1242 int i;
1246 u8 rc = AR5416_MAX_RATE_POWER; 1243 u8 rc = AR5416_MAX_RATE_POWER;
1247 u8 f; 1244 u8 f;
@@ -1259,10 +1256,11 @@ static u8 ar9170_get_max_edge_power(struct ar9170 *ar,
1259 break; 1256 break;
1260 } 1257 }
1261 if (i > 0 && f < edges[i].channel) { 1258 if (i > 0 && f < edges[i].channel) {
1262 if (f > edges[i-1].channel && 1259 if (f > edges[i - 1].channel &&
1263 edges[i-1].power_flags & AR9170_CALCTL_EDGE_FLAGS) { 1260 edges[i - 1].power_flags &
1261 AR9170_CALCTL_EDGE_FLAGS) {
1264 /* lower channel has the inband flag set */ 1262 /* lower channel has the inband flag set */
1265 rc = edges[i-1].power_flags & 1263 rc = edges[i - 1].power_flags &
1266 ~AR9170_CALCTL_EDGE_FLAGS; 1264 ~AR9170_CALCTL_EDGE_FLAGS;
1267 } 1265 }
1268 break; 1266 break;
@@ -1270,18 +1268,48 @@ static u8 ar9170_get_max_edge_power(struct ar9170 *ar,
1270 } 1268 }
1271 1269
1272 if (i == AR5416_NUM_BAND_EDGES) { 1270 if (i == AR5416_NUM_BAND_EDGES) {
1273 if (f > edges[i-1].channel && 1271 if (f > edges[i - 1].channel &&
1274 edges[i-1].power_flags & AR9170_CALCTL_EDGE_FLAGS) { 1272 edges[i - 1].power_flags & AR9170_CALCTL_EDGE_FLAGS) {
1275 /* lower channel has the inband flag set */ 1273 /* lower channel has the inband flag set */
1276 rc = edges[i-1].power_flags & 1274 rc = edges[i - 1].power_flags &
1277 ~AR9170_CALCTL_EDGE_FLAGS; 1275 ~AR9170_CALCTL_EDGE_FLAGS;
1278 } 1276 }
1279 } 1277 }
1280 return rc; 1278 return rc;
1281} 1279}
1282 1280
1283/* calculate the conformance test limits and apply them to ar->power* 1281static u8 ar9170_get_heavy_clip(struct ar9170 *ar,
1284 * (derived from otus hal/hpmain.c, line 3706 ff.) 1282 struct ar9170_calctl_edges edges[],
1283 u32 freq, enum ar9170_bw bw)
1284{
1285 u8 f;
1286 int i;
1287 u8 rc = 0;
1288
1289 if (freq < 3000)
1290 f = freq - 2300;
1291 else
1292 f = (freq - 4800) / 5;
1293
1294 if (bw == AR9170_BW_40_BELOW || bw == AR9170_BW_40_ABOVE)
1295 rc |= 0xf0;
1296
1297 for (i = 0; i < AR5416_NUM_BAND_EDGES; i++) {
1298 if (edges[i].channel == 0xff)
1299 break;
1300 if (f == edges[i].channel) {
1301 if (!(edges[i].power_flags & AR9170_CALCTL_EDGE_FLAGS))
1302 rc |= 0x0f;
1303 break;
1304 }
1305 }
1306
1307 return rc;
1308}
1309
1310/*
1311 * calculate the conformance test limits and the heavy clip parameter
1312 * and apply them to ar->power* (derived from otus hal/hpmain.c, line 3706)
1285 */ 1313 */
1286static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw) 1314static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1287{ 1315{
@@ -1295,7 +1323,8 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1295 int pwr_cal_len; 1323 int pwr_cal_len;
1296 } *modes; 1324 } *modes;
1297 1325
1298 /* order is relevant in the mode_list_*: we fall back to the 1326 /*
1327 * order is relevant in the mode_list_*: we fall back to the
1299 * lower indices if any mode is missed in the EEPROM. 1328 * lower indices if any mode is missed in the EEPROM.
1300 */ 1329 */
1301 struct ctl_modes mode_list_2ghz[] = { 1330 struct ctl_modes mode_list_2ghz[] = {
@@ -1313,7 +1342,10 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1313 1342
1314#define EDGES(c, n) (ar->eeprom.ctl_data[c].control_edges[n]) 1343#define EDGES(c, n) (ar->eeprom.ctl_data[c].control_edges[n])
1315 1344
1316 /* TODO: investigate the differences between OTUS' 1345 ar->phy_heavy_clip = 0;
1346
1347 /*
1348 * TODO: investigate the differences between OTUS'
1317 * hpreg.c::zfHpGetRegulatoryDomain() and 1349 * hpreg.c::zfHpGetRegulatoryDomain() and
1318 * ath/regd.c::ath_regd_get_band_ctl() - 1350 * ath/regd.c::ath_regd_get_band_ctl() -
1319 * e.g. for FCC3_WORLD the OTUS procedure 1351 * e.g. for FCC3_WORLD the OTUS procedure
@@ -1347,6 +1379,15 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1347 if (ctl_idx < AR5416_NUM_CTLS) { 1379 if (ctl_idx < AR5416_NUM_CTLS) {
1348 int f_off = 0; 1380 int f_off = 0;
1349 1381
1382 /* determine heav clip parameter from
1383 the 11G edges array */
1384 if (modes[i].ctl_mode == CTL_11G) {
1385 ar->phy_heavy_clip =
1386 ar9170_get_heavy_clip(ar,
1387 EDGES(ctl_idx, 1),
1388 freq, bw);
1389 }
1390
1350 /* adjust freq for 40MHz */ 1391 /* adjust freq for 40MHz */
1351 if (modes[i].ctl_mode == CTL_2GHT40 || 1392 if (modes[i].ctl_mode == CTL_2GHT40 ||
1352 modes[i].ctl_mode == CTL_5GHT40) { 1393 modes[i].ctl_mode == CTL_5GHT40) {
@@ -1360,13 +1401,15 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1360 ar9170_get_max_edge_power(ar, EDGES(ctl_idx, 1), 1401 ar9170_get_max_edge_power(ar, EDGES(ctl_idx, 1),
1361 freq+f_off); 1402 freq+f_off);
1362 1403
1363 /* TODO: check if the regulatory max. power is 1404 /*
1405 * TODO: check if the regulatory max. power is
1364 * controlled by cfg80211 for DFS 1406 * controlled by cfg80211 for DFS
1365 * (hpmain applies it to max_power itself for DFS freq) 1407 * (hpmain applies it to max_power itself for DFS freq)
1366 */ 1408 */
1367 1409
1368 } else { 1410 } else {
1369 /* Workaround in otus driver, hpmain.c, line 3906: 1411 /*
1412 * Workaround in otus driver, hpmain.c, line 3906:
1370 * if no data for 5GHT20 are found, take the 1413 * if no data for 5GHT20 are found, take the
1371 * legacy 5G value. 1414 * legacy 5G value.
1372 * We extend this here to fallback from any other *HT or 1415 * We extend this here to fallback from any other *HT or
@@ -1390,6 +1433,19 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1390 modes[i].max_power); 1433 modes[i].max_power);
1391 } 1434 }
1392 } 1435 }
1436
1437 if (ar->phy_heavy_clip & 0xf0) {
1438 ar->power_2G_ht40[0]--;
1439 ar->power_2G_ht40[1]--;
1440 ar->power_2G_ht40[2]--;
1441 }
1442 if (ar->phy_heavy_clip & 0xf) {
1443 ar->power_2G_ht20[0]++;
1444 ar->power_2G_ht20[1]++;
1445 ar->power_2G_ht20[2]++;
1446 }
1447
1448
1393#undef EDGES 1449#undef EDGES
1394} 1450}
1395 1451
@@ -1499,8 +1555,6 @@ static int ar9170_set_power_cal(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
1499 /* calc. conformance test limits and apply to ar->power*[] */ 1555 /* calc. conformance test limits and apply to ar->power*[] */
1500 ar9170_calc_ctl(ar, freq, bw); 1556 ar9170_calc_ctl(ar, freq, bw);
1501 1557
1502 /* TODO: (heavy clip) regulatory domain power level fine-tuning. */
1503
1504 /* set ACK/CTS TX power */ 1558 /* set ACK/CTS TX power */
1505 ar9170_regwrite_begin(ar); 1559 ar9170_regwrite_begin(ar);
1506 1560
@@ -1643,6 +1697,17 @@ int ar9170_set_channel(struct ar9170 *ar, struct ieee80211_channel *channel,
1643 if (err) 1697 if (err)
1644 return err; 1698 return err;
1645 1699
1700 if (ar->phy_heavy_clip) {
1701 err = ar9170_write_reg(ar, 0x1c59e0,
1702 0x200 | ar->phy_heavy_clip);
1703 if (err) {
1704 if (ar9170_nag_limiter(ar))
1705 printk(KERN_ERR "%s: failed to set "
1706 "heavy clip\n",
1707 wiphy_name(ar->hw->wiphy));
1708 }
1709 }
1710
1646 for (i = 0; i < 2; i++) { 1711 for (i = 0; i < 2; i++) {
1647 ar->noise[i] = ar9170_calc_noise_dbm( 1712 ar->noise[i] = ar9170_calc_noise_dbm(
1648 (le32_to_cpu(vals[2 + i]) >> 19) & 0x1ff); 1713 (le32_to_cpu(vals[2 + i]) >> 19) & 0x1ff);
diff --git a/drivers/net/wireless/ath/ar9170/usb.c b/drivers/net/wireless/ath/ar9170/usb.c
index e974e5829e1a..e1c2fcaa8bed 100644
--- a/drivers/net/wireless/ath/ar9170/usb.c
+++ b/drivers/net/wireless/ath/ar9170/usb.c
@@ -38,6 +38,7 @@
38 */ 38 */
39 39
40#include <linux/module.h> 40#include <linux/module.h>
41#include <linux/slab.h>
41#include <linux/usb.h> 42#include <linux/usb.h>
42#include <linux/firmware.h> 43#include <linux/firmware.h>
43#include <linux/etherdevice.h> 44#include <linux/etherdevice.h>
@@ -68,8 +69,10 @@ static struct usb_device_id ar9170_usb_ids[] = {
68 { USB_DEVICE(0x0cf3, 0x1002) }, 69 { USB_DEVICE(0x0cf3, 0x1002) },
69 /* Cace Airpcap NX */ 70 /* Cace Airpcap NX */
70 { USB_DEVICE(0xcace, 0x0300) }, 71 { USB_DEVICE(0xcace, 0x0300) },
71 /* D-Link DWA 160A */ 72 /* D-Link DWA 160 A1 */
72 { USB_DEVICE(0x07d1, 0x3c10) }, 73 { USB_DEVICE(0x07d1, 0x3c10) },
74 /* D-Link DWA 160 A2 */
75 { USB_DEVICE(0x07d1, 0x3a09) },
73 /* Netgear WNDA3100 */ 76 /* Netgear WNDA3100 */
74 { USB_DEVICE(0x0846, 0x9010) }, 77 { USB_DEVICE(0x0846, 0x9010) },
75 /* Netgear WN111 v2 */ 78 /* Netgear WN111 v2 */
@@ -82,6 +85,8 @@ static struct usb_device_id ar9170_usb_ids[] = {
82 { USB_DEVICE(0x0cde, 0x0023) }, 85 { USB_DEVICE(0x0cde, 0x0023) },
83 /* Z-Com UB82 ABG */ 86 /* Z-Com UB82 ABG */
84 { USB_DEVICE(0x0cde, 0x0026) }, 87 { USB_DEVICE(0x0cde, 0x0026) },
88 /* Sphairon Homelink 1202 */
89 { USB_DEVICE(0x0cde, 0x0027) },
85 /* Arcadyan WN7512 */ 90 /* Arcadyan WN7512 */
86 { USB_DEVICE(0x083a, 0xf522) }, 91 { USB_DEVICE(0x083a, 0xf522) },
87 /* Planex GWUS300 */ 92 /* Planex GWUS300 */
@@ -90,6 +95,8 @@ static struct usb_device_id ar9170_usb_ids[] = {
90 { USB_DEVICE(0x04bb, 0x093f) }, 95 { USB_DEVICE(0x04bb, 0x093f) },
91 /* AVM FRITZ!WLAN USB Stick N */ 96 /* AVM FRITZ!WLAN USB Stick N */
92 { USB_DEVICE(0x057C, 0x8401) }, 97 { USB_DEVICE(0x057C, 0x8401) },
98 /* NEC WL300NU-G */
99 { USB_DEVICE(0x0409, 0x0249) },
93 /* AVM FRITZ!WLAN USB Stick N 2.4 */ 100 /* AVM FRITZ!WLAN USB Stick N 2.4 */
94 { USB_DEVICE(0x057C, 0x8402), .driver_info = AR9170_REQ_FW1_ONLY }, 101 { USB_DEVICE(0x057C, 0x8402), .driver_info = AR9170_REQ_FW1_ONLY },
95 102
@@ -108,15 +115,15 @@ static void ar9170_usb_submit_urb(struct ar9170_usb *aru)
108 return ; 115 return ;
109 116
110 spin_lock_irqsave(&aru->tx_urb_lock, flags); 117 spin_lock_irqsave(&aru->tx_urb_lock, flags);
111 if (aru->tx_submitted_urbs >= AR9170_NUM_TX_URBS) { 118 if (atomic_read(&aru->tx_submitted_urbs) >= AR9170_NUM_TX_URBS) {
112 spin_unlock_irqrestore(&aru->tx_urb_lock, flags); 119 spin_unlock_irqrestore(&aru->tx_urb_lock, flags);
113 return ; 120 return ;
114 } 121 }
115 aru->tx_submitted_urbs++; 122 atomic_inc(&aru->tx_submitted_urbs);
116 123
117 urb = usb_get_from_anchor(&aru->tx_pending); 124 urb = usb_get_from_anchor(&aru->tx_pending);
118 if (!urb) { 125 if (!urb) {
119 aru->tx_submitted_urbs--; 126 atomic_dec(&aru->tx_submitted_urbs);
120 spin_unlock_irqrestore(&aru->tx_urb_lock, flags); 127 spin_unlock_irqrestore(&aru->tx_urb_lock, flags);
121 128
122 return ; 129 return ;
@@ -133,7 +140,7 @@ static void ar9170_usb_submit_urb(struct ar9170_usb *aru)
133 err); 140 err);
134 141
135 usb_unanchor_urb(urb); 142 usb_unanchor_urb(urb);
136 aru->tx_submitted_urbs--; 143 atomic_dec(&aru->tx_submitted_urbs);
137 ar9170_tx_callback(&aru->common, urb->context); 144 ar9170_tx_callback(&aru->common, urb->context);
138 } 145 }
139 146
@@ -151,7 +158,7 @@ static void ar9170_usb_tx_urb_complete_frame(struct urb *urb)
151 return ; 158 return ;
152 } 159 }
153 160
154 aru->tx_submitted_urbs--; 161 atomic_dec(&aru->tx_submitted_urbs);
155 162
156 ar9170_tx_callback(&aru->common, skb); 163 ar9170_tx_callback(&aru->common, skb);
157 164
@@ -412,7 +419,7 @@ static int ar9170_usb_exec_cmd(struct ar9170 *ar, enum ar9170_cmd cmd,
412 spin_unlock_irqrestore(&aru->common.cmdlock, flags); 419 spin_unlock_irqrestore(&aru->common.cmdlock, flags);
413 420
414 usb_fill_int_urb(urb, aru->udev, 421 usb_fill_int_urb(urb, aru->udev,
415 usb_sndbulkpipe(aru->udev, AR9170_EP_CMD), 422 usb_sndintpipe(aru->udev, AR9170_EP_CMD),
416 aru->common.cmdbuf, plen + 4, 423 aru->common.cmdbuf, plen + 4,
417 ar9170_usb_tx_urb_complete, NULL, 1); 424 ar9170_usb_tx_urb_complete, NULL, 1);
418 425
@@ -578,43 +585,6 @@ static int ar9170_usb_upload(struct ar9170_usb *aru, const void *data,
578 return 0; 585 return 0;
579} 586}
580 587
581static int ar9170_usb_request_firmware(struct ar9170_usb *aru)
582{
583 int err = 0;
584
585 err = request_firmware(&aru->firmware, "ar9170.fw",
586 &aru->udev->dev);
587 if (!err) {
588 aru->init_values = NULL;
589 return 0;
590 }
591
592 if (aru->req_one_stage_fw) {
593 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
594 "not found and is required for this device\n");
595 return -EINVAL;
596 }
597
598 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
599 "not found, trying old firmware...\n");
600
601 err = request_firmware(&aru->init_values, "ar9170-1.fw",
602 &aru->udev->dev);
603 if (err) {
604 dev_err(&aru->udev->dev, "file with init values not found.\n");
605 return err;
606 }
607
608 err = request_firmware(&aru->firmware, "ar9170-2.fw", &aru->udev->dev);
609 if (err) {
610 release_firmware(aru->init_values);
611 dev_err(&aru->udev->dev, "firmware file not found.\n");
612 return err;
613 }
614
615 return err;
616}
617
618static int ar9170_usb_reset(struct ar9170_usb *aru) 588static int ar9170_usb_reset(struct ar9170_usb *aru)
619{ 589{
620 int ret, lock = (aru->intf->condition != USB_INTERFACE_BINDING); 590 int ret, lock = (aru->intf->condition != USB_INTERFACE_BINDING);
@@ -753,6 +723,109 @@ err_out:
753 return err; 723 return err;
754} 724}
755 725
726static void ar9170_usb_firmware_failed(struct ar9170_usb *aru)
727{
728 struct device *parent = aru->udev->dev.parent;
729
730 complete(&aru->firmware_loading_complete);
731
732 /* unbind anything failed */
733 if (parent)
734 down(&parent->sem);
735 device_release_driver(&aru->udev->dev);
736 if (parent)
737 up(&parent->sem);
738
739 usb_put_dev(aru->udev);
740}
741
742static void ar9170_usb_firmware_finish(const struct firmware *fw, void *context)
743{
744 struct ar9170_usb *aru = context;
745 int err;
746
747 aru->firmware = fw;
748
749 if (!fw) {
750 dev_err(&aru->udev->dev, "firmware file not found.\n");
751 goto err_freefw;
752 }
753
754 err = ar9170_usb_init_device(aru);
755 if (err)
756 goto err_freefw;
757
758 err = ar9170_usb_open(&aru->common);
759 if (err)
760 goto err_unrx;
761
762 err = ar9170_register(&aru->common, &aru->udev->dev);
763
764 ar9170_usb_stop(&aru->common);
765 if (err)
766 goto err_unrx;
767
768 complete(&aru->firmware_loading_complete);
769 usb_put_dev(aru->udev);
770 return;
771
772 err_unrx:
773 ar9170_usb_cancel_urbs(aru);
774
775 err_freefw:
776 ar9170_usb_firmware_failed(aru);
777}
778
779static void ar9170_usb_firmware_inits(const struct firmware *fw,
780 void *context)
781{
782 struct ar9170_usb *aru = context;
783 int err;
784
785 if (!fw) {
786 dev_err(&aru->udev->dev, "file with init values not found.\n");
787 ar9170_usb_firmware_failed(aru);
788 return;
789 }
790
791 aru->init_values = fw;
792
793 /* ok so we have the init values -- get code for two-stage */
794
795 err = request_firmware_nowait(THIS_MODULE, 1, "ar9170-2.fw",
796 &aru->udev->dev, GFP_KERNEL, aru,
797 ar9170_usb_firmware_finish);
798 if (err)
799 ar9170_usb_firmware_failed(aru);
800}
801
802static void ar9170_usb_firmware_step2(const struct firmware *fw, void *context)
803{
804 struct ar9170_usb *aru = context;
805 int err;
806
807 if (fw) {
808 ar9170_usb_firmware_finish(fw, context);
809 return;
810 }
811
812 if (aru->req_one_stage_fw) {
813 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
814 "not found and is required for this device\n");
815 ar9170_usb_firmware_failed(aru);
816 return;
817 }
818
819 dev_err(&aru->udev->dev, "ar9170.fw firmware file "
820 "not found, trying old firmware...\n");
821
822 err = request_firmware_nowait(THIS_MODULE, 1, "ar9170-1.fw",
823 &aru->udev->dev, GFP_KERNEL, aru,
824 ar9170_usb_firmware_inits);
825 if (err)
826 ar9170_usb_firmware_failed(aru);
827}
828
756static bool ar9170_requires_one_stage(const struct usb_device_id *id) 829static bool ar9170_requires_one_stage(const struct usb_device_id *id)
757{ 830{
758 if (!id->driver_info) 831 if (!id->driver_info)
@@ -791,10 +864,11 @@ static int ar9170_usb_probe(struct usb_interface *intf,
791 init_usb_anchor(&aru->tx_pending); 864 init_usb_anchor(&aru->tx_pending);
792 init_usb_anchor(&aru->tx_submitted); 865 init_usb_anchor(&aru->tx_submitted);
793 init_completion(&aru->cmd_wait); 866 init_completion(&aru->cmd_wait);
867 init_completion(&aru->firmware_loading_complete);
794 spin_lock_init(&aru->tx_urb_lock); 868 spin_lock_init(&aru->tx_urb_lock);
795 869
796 aru->tx_pending_urbs = 0; 870 aru->tx_pending_urbs = 0;
797 aru->tx_submitted_urbs = 0; 871 atomic_set(&aru->tx_submitted_urbs, 0);
798 872
799 aru->common.stop = ar9170_usb_stop; 873 aru->common.stop = ar9170_usb_stop;
800 aru->common.flush = ar9170_usb_flush; 874 aru->common.flush = ar9170_usb_flush;
@@ -810,33 +884,10 @@ static int ar9170_usb_probe(struct usb_interface *intf,
810 if (err) 884 if (err)
811 goto err_freehw; 885 goto err_freehw;
812 886
813 err = ar9170_usb_request_firmware(aru); 887 usb_get_dev(aru->udev);
814 if (err) 888 return request_firmware_nowait(THIS_MODULE, 1, "ar9170.fw",
815 goto err_freehw; 889 &aru->udev->dev, GFP_KERNEL, aru,
816 890 ar9170_usb_firmware_step2);
817 err = ar9170_usb_init_device(aru);
818 if (err)
819 goto err_freefw;
820
821 err = ar9170_usb_open(ar);
822 if (err)
823 goto err_unrx;
824
825 err = ar9170_register(ar, &udev->dev);
826
827 ar9170_usb_stop(ar);
828 if (err)
829 goto err_unrx;
830
831 return 0;
832
833err_unrx:
834 ar9170_usb_cancel_urbs(aru);
835
836err_freefw:
837 release_firmware(aru->init_values);
838 release_firmware(aru->firmware);
839
840err_freehw: 891err_freehw:
841 usb_set_intfdata(intf, NULL); 892 usb_set_intfdata(intf, NULL);
842 usb_put_dev(udev); 893 usb_put_dev(udev);
@@ -853,15 +904,18 @@ static void ar9170_usb_disconnect(struct usb_interface *intf)
853 return; 904 return;
854 905
855 aru->common.state = AR9170_IDLE; 906 aru->common.state = AR9170_IDLE;
907
908 wait_for_completion(&aru->firmware_loading_complete);
909
856 ar9170_unregister(&aru->common); 910 ar9170_unregister(&aru->common);
857 ar9170_usb_cancel_urbs(aru); 911 ar9170_usb_cancel_urbs(aru);
858 912
859 release_firmware(aru->init_values);
860 release_firmware(aru->firmware);
861
862 usb_put_dev(aru->udev); 913 usb_put_dev(aru->udev);
863 usb_set_intfdata(intf, NULL); 914 usb_set_intfdata(intf, NULL);
864 ieee80211_free_hw(aru->common.hw); 915 ieee80211_free_hw(aru->common.hw);
916
917 release_firmware(aru->init_values);
918 release_firmware(aru->firmware);
865} 919}
866 920
867#ifdef CONFIG_PM 921#ifdef CONFIG_PM
diff --git a/drivers/net/wireless/ath/ar9170/usb.h b/drivers/net/wireless/ath/ar9170/usb.h
index d098f4d5d2f2..919b06046eb3 100644
--- a/drivers/net/wireless/ath/ar9170/usb.h
+++ b/drivers/net/wireless/ath/ar9170/usb.h
@@ -67,10 +67,11 @@ struct ar9170_usb {
67 bool req_one_stage_fw; 67 bool req_one_stage_fw;
68 68
69 spinlock_t tx_urb_lock; 69 spinlock_t tx_urb_lock;
70 unsigned int tx_submitted_urbs; 70 atomic_t tx_submitted_urbs;
71 unsigned int tx_pending_urbs; 71 unsigned int tx_pending_urbs;
72 72
73 struct completion cmd_wait; 73 struct completion cmd_wait;
74 struct completion firmware_loading_complete;
74 int readlen; 75 int readlen;
75 u8 *readbuf; 76 u8 *readbuf;
76 77
diff --git a/drivers/net/wireless/ath/ath.h b/drivers/net/wireless/ath/ath.h
index a63e90cbf9e5..71fc960814f0 100644
--- a/drivers/net/wireless/ath/ath.h
+++ b/drivers/net/wireless/ath/ath.h
@@ -18,6 +18,35 @@
18#define ATH_H 18#define ATH_H
19 19
20#include <linux/skbuff.h> 20#include <linux/skbuff.h>
21#include <linux/if_ether.h>
22#include <net/mac80211.h>
23
24/*
25 * The key cache is used for h/w cipher state and also for
26 * tracking station state such as the current tx antenna.
27 * We also setup a mapping table between key cache slot indices
28 * and station state to short-circuit node lookups on rx.
29 * Different parts have different size key caches. We handle
30 * up to ATH_KEYMAX entries (could dynamically allocate state).
31 */
32#define ATH_KEYMAX 128 /* max key cache size we handle */
33
34static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
35
36struct ath_ani {
37 bool caldone;
38 int16_t noise_floor;
39 unsigned int longcal_timer;
40 unsigned int shortcal_timer;
41 unsigned int resetcal_timer;
42 unsigned int checkani_timer;
43 struct timer_list timer;
44};
45
46enum ath_device_state {
47 ATH_HW_UNAVAILABLE,
48 ATH_HW_INITIALIZED,
49};
21 50
22struct reg_dmn_pair_mapping { 51struct reg_dmn_pair_mapping {
23 u16 regDmnEnum; 52 u16 regDmnEnum;
@@ -36,13 +65,52 @@ struct ath_regulatory {
36 struct reg_dmn_pair_mapping *regpair; 65 struct reg_dmn_pair_mapping *regpair;
37}; 66};
38 67
68struct ath_ops {
69 unsigned int (*read)(void *, u32 reg_offset);
70 void (*write)(void *, u32 val, u32 reg_offset);
71};
72
73struct ath_common;
74
75struct ath_bus_ops {
76 void (*read_cachesize)(struct ath_common *common, int *csz);
77 bool (*eeprom_read)(struct ath_common *common, u32 off, u16 *data);
78 void (*bt_coex_prep)(struct ath_common *common);
79};
80
39struct ath_common { 81struct ath_common {
82 void *ah;
83 void *priv;
84 struct ieee80211_hw *hw;
85 int debug_mask;
86 enum ath_device_state state;
87
88 struct ath_ani ani;
89
40 u16 cachelsz; 90 u16 cachelsz;
91 u16 curaid;
92 u8 macaddr[ETH_ALEN];
93 u8 curbssid[ETH_ALEN];
94 u8 bssidmask[ETH_ALEN];
95
96 u8 tx_chainmask;
97 u8 rx_chainmask;
98
99 u32 rx_bufsize;
100
101 u32 keymax;
102 DECLARE_BITMAP(keymap, ATH_KEYMAX);
103 u8 splitmic;
104
41 struct ath_regulatory regulatory; 105 struct ath_regulatory regulatory;
106 const struct ath_ops *ops;
107 const struct ath_bus_ops *bus_ops;
42}; 108};
43 109
44struct sk_buff *ath_rxbuf_alloc(struct ath_common *common, 110struct sk_buff *ath_rxbuf_alloc(struct ath_common *common,
45 u32 len, 111 u32 len,
46 gfp_t gfp_mask); 112 gfp_t gfp_mask);
47 113
114void ath_hw_setbssidmask(struct ath_common *common);
115
48#endif /* ATH_H */ 116#endif /* ATH_H */
diff --git a/drivers/net/wireless/ath/ath5k/Kconfig b/drivers/net/wireless/ath/ath5k/Kconfig
index 06d006675d7d..eb83b7b4d0e3 100644
--- a/drivers/net/wireless/ath/ath5k/Kconfig
+++ b/drivers/net/wireless/ath/ath5k/Kconfig
@@ -1,6 +1,6 @@
1config ATH5K 1config ATH5K
2 tristate "Atheros 5xxx wireless cards support" 2 tristate "Atheros 5xxx wireless cards support"
3 depends on PCI && MAC80211 && WLAN_80211 3 depends on PCI && MAC80211
4 select MAC80211_LEDS 4 select MAC80211_LEDS
5 select LEDS_CLASS 5 select LEDS_CLASS
6 select NEW_LEDS 6 select NEW_LEDS
diff --git a/drivers/net/wireless/ath/ath5k/ath5k.h b/drivers/net/wireless/ath/ath5k/ath5k.h
index 6cd5efcec417..ac67f02e26d8 100644
--- a/drivers/net/wireless/ath/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath/ath5k/ath5k.h
@@ -35,6 +35,7 @@
35 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities) 35 * TODO: Make a more generic struct (eg. add more stuff to ath5k_capabilities)
36 * and clean up common bits, then introduce set/get functions in eeprom.c */ 36 * and clean up common bits, then introduce set/get functions in eeprom.c */
37#include "eeprom.h" 37#include "eeprom.h"
38#include "../ath.h"
38 39
39/* PCI IDs */ 40/* PCI IDs */
40#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */ 41#define PCI_DEVICE_ID_ATHEROS_AR5210 0x0007 /* AR5210 */
@@ -165,13 +166,6 @@
165#define AR5K_INI_VAL_XR 0 166#define AR5K_INI_VAL_XR 0
166#define AR5K_INI_VAL_MAX 5 167#define AR5K_INI_VAL_MAX 5
167 168
168/* Used for BSSID etc manipulation */
169#define AR5K_LOW_ID(_a)( \
170(_a)[0] | (_a)[1] << 8 | (_a)[2] << 16 | (_a)[3] << 24 \
171)
172
173#define AR5K_HIGH_ID(_a) ((_a)[4] | (_a)[5] << 8)
174
175/* 169/*
176 * Some tuneable values (these should be changeable by the user) 170 * Some tuneable values (these should be changeable by the user)
177 * TODO: Make use of them and add more options OR use debug/configfs 171 * TODO: Make use of them and add more options OR use debug/configfs
@@ -204,6 +198,7 @@
204#define AR5K_TUNE_CWMAX_11B 1023 198#define AR5K_TUNE_CWMAX_11B 1023
205#define AR5K_TUNE_CWMAX_XR 7 199#define AR5K_TUNE_CWMAX_XR 7
206#define AR5K_TUNE_NOISE_FLOOR -72 200#define AR5K_TUNE_NOISE_FLOOR -72
201#define AR5K_TUNE_CCA_MAX_GOOD_VALUE -95
207#define AR5K_TUNE_MAX_TXPOWER 63 202#define AR5K_TUNE_MAX_TXPOWER 63
208#define AR5K_TUNE_DEFAULT_TXPOWER 25 203#define AR5K_TUNE_DEFAULT_TXPOWER 25
209#define AR5K_TUNE_TPC_TXPOWER false 204#define AR5K_TUNE_TPC_TXPOWER false
@@ -540,13 +535,12 @@ struct ath5k_txq_info {
540 u32 tqi_cbr_period; /* Constant bit rate period */ 535 u32 tqi_cbr_period; /* Constant bit rate period */
541 u32 tqi_cbr_overflow_limit; 536 u32 tqi_cbr_overflow_limit;
542 u32 tqi_burst_time; 537 u32 tqi_burst_time;
543 u32 tqi_ready_time; /* Not used */ 538 u32 tqi_ready_time; /* Time queue waits after an event */
544}; 539};
545 540
546/* 541/*
547 * Transmit packet types. 542 * Transmit packet types.
548 * used on tx control descriptor 543 * used on tx control descriptor
549 * TODO: Use them inside base.c corectly
550 */ 544 */
551enum ath5k_pkt_type { 545enum ath5k_pkt_type {
552 AR5K_PKT_TYPE_NORMAL = 0, 546 AR5K_PKT_TYPE_NORMAL = 0,
@@ -1012,6 +1006,14 @@ struct ath5k_capabilities {
1012 } cap_queues; 1006 } cap_queues;
1013}; 1007};
1014 1008
1009/* size of noise floor history (keep it a power of two) */
1010#define ATH5K_NF_CAL_HIST_MAX 8
1011struct ath5k_nfcal_hist
1012{
1013 s16 index; /* current index into nfval */
1014 s16 nfval[ATH5K_NF_CAL_HIST_MAX]; /* last few noise floors */
1015};
1016
1015 1017
1016/***************************************\ 1018/***************************************\
1017 HARDWARE ABSTRACTION LAYER STRUCTURE 1019 HARDWARE ABSTRACTION LAYER STRUCTURE
@@ -1027,6 +1029,7 @@ struct ath5k_capabilities {
1027/* TODO: Clean up and merge with ath5k_softc */ 1029/* TODO: Clean up and merge with ath5k_softc */
1028struct ath5k_hw { 1030struct ath5k_hw {
1029 u32 ah_magic; 1031 u32 ah_magic;
1032 struct ath_common common;
1030 1033
1031 struct ath5k_softc *ah_sc; 1034 struct ath5k_softc *ah_sc;
1032 void __iomem *ah_iobase; 1035 void __iomem *ah_iobase;
@@ -1059,6 +1062,7 @@ struct ath5k_hw {
1059 u32 ah_cw_min; 1062 u32 ah_cw_min;
1060 u32 ah_cw_max; 1063 u32 ah_cw_max;
1061 u32 ah_limit_tx_retries; 1064 u32 ah_limit_tx_retries;
1065 u8 ah_coverage_class;
1062 1066
1063 /* Antenna Control */ 1067 /* Antenna Control */
1064 u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX]; 1068 u32 ah_ant_ctl[AR5K_EEPROM_N_MODES][AR5K_ANT_MAX];
@@ -1067,14 +1071,6 @@ struct ath5k_hw {
1067 u8 ah_def_ant; 1071 u8 ah_def_ant;
1068 bool ah_software_retry; 1072 bool ah_software_retry;
1069 1073
1070 u8 ah_sta_id[ETH_ALEN];
1071
1072 /* Current BSSID we are trying to assoc to / create.
1073 * This is passed by mac80211 on config_interface() and cached here for
1074 * use in resets */
1075 u8 ah_bssid[ETH_ALEN];
1076 u8 ah_bssid_mask[ETH_ALEN];
1077
1078 int ah_gpio_npins; 1074 int ah_gpio_npins;
1079 1075
1080 struct ath5k_capabilities ah_capabilities; 1076 struct ath5k_capabilities ah_capabilities;
@@ -1125,6 +1121,8 @@ struct ath5k_hw {
1125 struct ieee80211_channel r_last_channel; 1121 struct ieee80211_channel r_last_channel;
1126 } ah_radar; 1122 } ah_radar;
1127 1123
1124 struct ath5k_nfcal_hist ah_nfcal_hist;
1125
1128 /* noise floor from last periodic calibration */ 1126 /* noise floor from last periodic calibration */
1129 s32 ah_noise_floor; 1127 s32 ah_noise_floor;
1130 1128
@@ -1160,7 +1158,7 @@ struct ath5k_hw {
1160 */ 1158 */
1161 1159
1162/* Attach/Detach Functions */ 1160/* Attach/Detach Functions */
1163extern struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc); 1161extern int ath5k_hw_attach(struct ath5k_softc *sc);
1164extern void ath5k_hw_detach(struct ath5k_hw *ah); 1162extern void ath5k_hw_detach(struct ath5k_hw *ah);
1165 1163
1166/* LED functions */ 1164/* LED functions */
@@ -1202,11 +1200,11 @@ extern bool ath5k_eeprom_is_hb63(struct ath5k_hw *ah);
1202 1200
1203/* Protocol Control Unit Functions */ 1201/* Protocol Control Unit Functions */
1204extern int ath5k_hw_set_opmode(struct ath5k_hw *ah); 1202extern int ath5k_hw_set_opmode(struct ath5k_hw *ah);
1203extern void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class);
1205/* BSSID Functions */ 1204/* BSSID Functions */
1206extern void ath5k_hw_get_lladdr(struct ath5k_hw *ah, u8 *mac);
1207extern int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac); 1205extern int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac);
1208extern void ath5k_hw_set_associd(struct ath5k_hw *ah, const u8 *bssid, u16 assoc_id); 1206extern void ath5k_hw_set_associd(struct ath5k_hw *ah);
1209extern int ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask); 1207extern void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask);
1210/* Receive start/stop functions */ 1208/* Receive start/stop functions */
1211extern void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah); 1209extern void ath5k_hw_start_rx_pcu(struct ath5k_hw *ah);
1212extern void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah); 1210extern void ath5k_hw_stop_rx_pcu(struct ath5k_hw *ah);
@@ -1234,6 +1232,10 @@ extern int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout);
1234extern unsigned int ath5k_hw_get_ack_timeout(struct ath5k_hw *ah); 1232extern unsigned int ath5k_hw_get_ack_timeout(struct ath5k_hw *ah);
1235extern int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout); 1233extern int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout);
1236extern unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah); 1234extern unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah);
1235/* Clock rate related functions */
1236unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec);
1237unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock);
1238unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah);
1237/* Key table (WEP) functions */ 1239/* Key table (WEP) functions */
1238extern int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry); 1240extern int ath5k_hw_reset_key(struct ath5k_hw *ah, u16 entry);
1239extern int ath5k_hw_is_key_valid(struct ath5k_hw *ah, u16 entry); 1241extern int ath5k_hw_is_key_valid(struct ath5k_hw *ah, u16 entry);
@@ -1288,8 +1290,10 @@ extern int ath5k_hw_rfgain_opt_init(struct ath5k_hw *ah);
1288extern bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags); 1290extern bool ath5k_channel_ok(struct ath5k_hw *ah, u16 freq, unsigned int flags);
1289extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel); 1291extern int ath5k_hw_channel(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1290/* PHY calibration */ 1292/* PHY calibration */
1293void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah);
1291extern int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct ieee80211_channel *channel); 1294extern int ath5k_hw_phy_calibrate(struct ath5k_hw *ah, struct ieee80211_channel *channel);
1292extern int ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq); 1295extern int ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq);
1296extern s16 ath5k_hw_get_noise_floor(struct ath5k_hw *ah);
1293extern void ath5k_hw_calibration_poll(struct ath5k_hw *ah); 1297extern void ath5k_hw_calibration_poll(struct ath5k_hw *ah);
1294/* Spur mitigation */ 1298/* Spur mitigation */
1295bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah, 1299bool ath5k_hw_chan_has_spur_noise(struct ath5k_hw *ah,
@@ -1311,35 +1315,21 @@ extern int ath5k_hw_set_txpower_limit(struct ath5k_hw *ah, u8 txpower);
1311 * Functions used internaly 1315 * Functions used internaly
1312 */ 1316 */
1313 1317
1314/* 1318static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
1315 * Translate usec to hw clock units
1316 * TODO: Half/quarter rate
1317 */
1318static inline unsigned int ath5k_hw_htoclock(unsigned int usec, bool turbo)
1319{ 1319{
1320 return turbo ? (usec * 80) : (usec * 40); 1320 return &ah->common;
1321} 1321}
1322 1322
1323/* 1323static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
1324 * Translate hw clock units to usec
1325 * TODO: Half/quarter rate
1326 */
1327static inline unsigned int ath5k_hw_clocktoh(unsigned int clock, bool turbo)
1328{ 1324{
1329 return turbo ? (clock / 80) : (clock / 40); 1325 return &(ath5k_hw_common(ah)->regulatory);
1330} 1326}
1331 1327
1332/*
1333 * Read from a register
1334 */
1335static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg) 1328static inline u32 ath5k_hw_reg_read(struct ath5k_hw *ah, u16 reg)
1336{ 1329{
1337 return ioread32(ah->ah_iobase + reg); 1330 return ioread32(ah->ah_iobase + reg);
1338} 1331}
1339 1332
1340/*
1341 * Write to a register
1342 */
1343static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg) 1333static inline void ath5k_hw_reg_write(struct ath5k_hw *ah, u32 val, u16 reg)
1344{ 1334{
1345 iowrite32(val, ah->ah_iobase + reg); 1335 iowrite32(val, ah->ah_iobase + reg);
diff --git a/drivers/net/wireless/ath/ath5k/attach.c b/drivers/net/wireless/ath/ath5k/attach.c
index 71a1bd254517..dc0786cc2639 100644
--- a/drivers/net/wireless/ath/ath5k/attach.c
+++ b/drivers/net/wireless/ath/ath5k/attach.c
@@ -21,6 +21,7 @@
21\*************************************/ 21\*************************************/
22 22
23#include <linux/pci.h> 23#include <linux/pci.h>
24#include <linux/slab.h>
24#include "ath5k.h" 25#include "ath5k.h"
25#include "reg.h" 26#include "reg.h"
26#include "debug.h" 27#include "debug.h"
@@ -101,25 +102,15 @@ static int ath5k_hw_post(struct ath5k_hw *ah)
101 * -ENODEV if the device is not supported or prints an error msg if something 102 * -ENODEV if the device is not supported or prints an error msg if something
102 * else went wrong. 103 * else went wrong.
103 */ 104 */
104struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc) 105int ath5k_hw_attach(struct ath5k_softc *sc)
105{ 106{
106 struct ath5k_hw *ah; 107 struct ath5k_hw *ah = sc->ah;
108 struct ath_common *common = ath5k_hw_common(ah);
107 struct pci_dev *pdev = sc->pdev; 109 struct pci_dev *pdev = sc->pdev;
108 struct ath5k_eeprom_info *ee; 110 struct ath5k_eeprom_info *ee;
109 int ret; 111 int ret;
110 u32 srev; 112 u32 srev;
111 113
112 /*If we passed the test malloc a ath5k_hw struct*/
113 ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
114 if (ah == NULL) {
115 ret = -ENOMEM;
116 ATH5K_ERR(sc, "out of memory\n");
117 goto err;
118 }
119
120 ah->ah_sc = sc;
121 ah->ah_iobase = sc->iobase;
122
123 /* 114 /*
124 * HW information 115 * HW information
125 */ 116 */
@@ -278,12 +269,12 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc)
278 goto err_free; 269 goto err_free;
279 } 270 }
280 271
272 ee = &ah->ah_capabilities.cap_eeprom;
273
281 /* 274 /*
282 * Write PCI-E power save settings 275 * Write PCI-E power save settings
283 */ 276 */
284 if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) { 277 if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) {
285 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
286
287 ath5k_hw_reg_write(ah, 0x9248fc00, AR5K_PCIE_SERDES); 278 ath5k_hw_reg_write(ah, 0x9248fc00, AR5K_PCIE_SERDES);
288 ath5k_hw_reg_write(ah, 0x24924924, AR5K_PCIE_SERDES); 279 ath5k_hw_reg_write(ah, 0x24924924, AR5K_PCIE_SERDES);
289 280
@@ -321,7 +312,6 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc)
321 } 312 }
322 313
323 /* Crypto settings */ 314 /* Crypto settings */
324 ee = &ah->ah_capabilities.cap_eeprom;
325 ah->ah_aes_support = srev >= AR5K_SREV_AR5212_V4 && 315 ah->ah_aes_support = srev >= AR5K_SREV_AR5212_V4 &&
326 (ee->ee_version >= AR5K_EEPROM_VERSION_5_0 && 316 (ee->ee_version >= AR5K_EEPROM_VERSION_5_0 &&
327 !AR5K_EEPROM_AES_DIS(ee->ee_misc5)); 317 !AR5K_EEPROM_AES_DIS(ee->ee_misc5));
@@ -336,20 +326,21 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc)
336 ath5k_hw_set_lladdr(ah, (u8[ETH_ALEN]){}); 326 ath5k_hw_set_lladdr(ah, (u8[ETH_ALEN]){});
337 327
338 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */ 328 /* Set BSSID to bcast address: ff:ff:ff:ff:ff:ff for now */
339 memset(ah->ah_bssid, 0xff, ETH_ALEN); 329 memcpy(common->curbssid, ath_bcast_mac, ETH_ALEN);
340 ath5k_hw_set_associd(ah, ah->ah_bssid, 0); 330 ath5k_hw_set_associd(ah);
341 ath5k_hw_set_opmode(ah); 331 ath5k_hw_set_opmode(ah);
342 332
343 ath5k_hw_rfgain_opt_init(ah); 333 ath5k_hw_rfgain_opt_init(ah);
344 334
335 ath5k_hw_init_nfcal_hist(ah);
336
345 /* turn on HW LEDs */ 337 /* turn on HW LEDs */
346 ath5k_hw_set_ledstate(ah, AR5K_LED_INIT); 338 ath5k_hw_set_ledstate(ah, AR5K_LED_INIT);
347 339
348 return ah; 340 return 0;
349err_free: 341err_free:
350 kfree(ah); 342 kfree(ah);
351err: 343 return ret;
352 return ERR_PTR(ret);
353} 344}
354 345
355/** 346/**
@@ -369,5 +360,4 @@ void ath5k_hw_detach(struct ath5k_hw *ah)
369 ath5k_eeprom_detach(ah); 360 ath5k_eeprom_detach(ah);
370 361
371 /* assume interrupts are down */ 362 /* assume interrupts are down */
372 kfree(ah);
373} 363}
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 95a8e232b58f..3abbe7513ab5 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -50,6 +50,7 @@
50#include <linux/pci.h> 50#include <linux/pci.h>
51#include <linux/ethtool.h> 51#include <linux/ethtool.h>
52#include <linux/uaccess.h> 52#include <linux/uaccess.h>
53#include <linux/slab.h>
53 54
54#include <net/ieee80211_radiotap.h> 55#include <net/ieee80211_radiotap.h>
55 56
@@ -83,7 +84,7 @@ MODULE_VERSION("0.6.0 (EXPERIMENTAL)");
83 84
84 85
85/* Known PCI ids */ 86/* Known PCI ids */
86static const struct pci_device_id ath5k_pci_id_table[] = { 87static DEFINE_PCI_DEVICE_TABLE(ath5k_pci_id_table) = {
87 { PCI_VDEVICE(ATHEROS, 0x0207) }, /* 5210 early */ 88 { PCI_VDEVICE(ATHEROS, 0x0207) }, /* 5210 early */
88 { PCI_VDEVICE(ATHEROS, 0x0007) }, /* 5210 */ 89 { PCI_VDEVICE(ATHEROS, 0x0007) }, /* 5210 */
89 { PCI_VDEVICE(ATHEROS, 0x0011) }, /* 5311 - this is on AHB bus !*/ 90 { PCI_VDEVICE(ATHEROS, 0x0011) }, /* 5311 - this is on AHB bus !*/
@@ -195,12 +196,13 @@ static int __devinit ath5k_pci_probe(struct pci_dev *pdev,
195 const struct pci_device_id *id); 196 const struct pci_device_id *id);
196static void __devexit ath5k_pci_remove(struct pci_dev *pdev); 197static void __devexit ath5k_pci_remove(struct pci_dev *pdev);
197#ifdef CONFIG_PM 198#ifdef CONFIG_PM
198static int ath5k_pci_suspend(struct pci_dev *pdev, 199static int ath5k_pci_suspend(struct device *dev);
199 pm_message_t state); 200static int ath5k_pci_resume(struct device *dev);
200static int ath5k_pci_resume(struct pci_dev *pdev); 201
202SIMPLE_DEV_PM_OPS(ath5k_pm_ops, ath5k_pci_suspend, ath5k_pci_resume);
203#define ATH5K_PM_OPS (&ath5k_pm_ops)
201#else 204#else
202#define ath5k_pci_suspend NULL 205#define ATH5K_PM_OPS NULL
203#define ath5k_pci_resume NULL
204#endif /* CONFIG_PM */ 206#endif /* CONFIG_PM */
205 207
206static struct pci_driver ath5k_pci_driver = { 208static struct pci_driver ath5k_pci_driver = {
@@ -208,8 +210,7 @@ static struct pci_driver ath5k_pci_driver = {
208 .id_table = ath5k_pci_id_table, 210 .id_table = ath5k_pci_id_table,
209 .probe = ath5k_pci_probe, 211 .probe = ath5k_pci_probe,
210 .remove = __devexit_p(ath5k_pci_remove), 212 .remove = __devexit_p(ath5k_pci_remove),
211 .suspend = ath5k_pci_suspend, 213 .driver.pm = ATH5K_PM_OPS,
212 .resume = ath5k_pci_resume,
213}; 214};
214 215
215 216
@@ -225,9 +226,9 @@ static int ath5k_reset_wake(struct ath5k_softc *sc);
225static int ath5k_start(struct ieee80211_hw *hw); 226static int ath5k_start(struct ieee80211_hw *hw);
226static void ath5k_stop(struct ieee80211_hw *hw); 227static void ath5k_stop(struct ieee80211_hw *hw);
227static int ath5k_add_interface(struct ieee80211_hw *hw, 228static int ath5k_add_interface(struct ieee80211_hw *hw,
228 struct ieee80211_if_init_conf *conf); 229 struct ieee80211_vif *vif);
229static void ath5k_remove_interface(struct ieee80211_hw *hw, 230static void ath5k_remove_interface(struct ieee80211_hw *hw,
230 struct ieee80211_if_init_conf *conf); 231 struct ieee80211_vif *vif);
231static int ath5k_config(struct ieee80211_hw *hw, u32 changed); 232static int ath5k_config(struct ieee80211_hw *hw, u32 changed);
232static u64 ath5k_prepare_multicast(struct ieee80211_hw *hw, 233static u64 ath5k_prepare_multicast(struct ieee80211_hw *hw,
233 int mc_count, struct dev_addr_list *mc_list); 234 int mc_count, struct dev_addr_list *mc_list);
@@ -241,8 +242,6 @@ static int ath5k_set_key(struct ieee80211_hw *hw,
241 struct ieee80211_key_conf *key); 242 struct ieee80211_key_conf *key);
242static int ath5k_get_stats(struct ieee80211_hw *hw, 243static int ath5k_get_stats(struct ieee80211_hw *hw,
243 struct ieee80211_low_level_stats *stats); 244 struct ieee80211_low_level_stats *stats);
244static int ath5k_get_tx_stats(struct ieee80211_hw *hw,
245 struct ieee80211_tx_queue_stats *stats);
246static u64 ath5k_get_tsf(struct ieee80211_hw *hw); 245static u64 ath5k_get_tsf(struct ieee80211_hw *hw);
247static void ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf); 246static void ath5k_set_tsf(struct ieee80211_hw *hw, u64 tsf);
248static void ath5k_reset_tsf(struct ieee80211_hw *hw); 247static void ath5k_reset_tsf(struct ieee80211_hw *hw);
@@ -254,6 +253,8 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
254 u32 changes); 253 u32 changes);
255static void ath5k_sw_scan_start(struct ieee80211_hw *hw); 254static void ath5k_sw_scan_start(struct ieee80211_hw *hw);
256static void ath5k_sw_scan_complete(struct ieee80211_hw *hw); 255static void ath5k_sw_scan_complete(struct ieee80211_hw *hw);
256static void ath5k_set_coverage_class(struct ieee80211_hw *hw,
257 u8 coverage_class);
257 258
258static const struct ieee80211_ops ath5k_hw_ops = { 259static const struct ieee80211_ops ath5k_hw_ops = {
259 .tx = ath5k_tx, 260 .tx = ath5k_tx,
@@ -267,13 +268,13 @@ static const struct ieee80211_ops ath5k_hw_ops = {
267 .set_key = ath5k_set_key, 268 .set_key = ath5k_set_key,
268 .get_stats = ath5k_get_stats, 269 .get_stats = ath5k_get_stats,
269 .conf_tx = NULL, 270 .conf_tx = NULL,
270 .get_tx_stats = ath5k_get_tx_stats,
271 .get_tsf = ath5k_get_tsf, 271 .get_tsf = ath5k_get_tsf,
272 .set_tsf = ath5k_set_tsf, 272 .set_tsf = ath5k_set_tsf,
273 .reset_tsf = ath5k_reset_tsf, 273 .reset_tsf = ath5k_reset_tsf,
274 .bss_info_changed = ath5k_bss_info_changed, 274 .bss_info_changed = ath5k_bss_info_changed,
275 .sw_scan_start = ath5k_sw_scan_start, 275 .sw_scan_start = ath5k_sw_scan_start,
276 .sw_scan_complete = ath5k_sw_scan_complete, 276 .sw_scan_complete = ath5k_sw_scan_complete,
277 .set_coverage_class = ath5k_set_coverage_class,
277}; 278};
278 279
279/* 280/*
@@ -323,10 +324,13 @@ static inline void ath5k_txbuf_free(struct ath5k_softc *sc,
323static inline void ath5k_rxbuf_free(struct ath5k_softc *sc, 324static inline void ath5k_rxbuf_free(struct ath5k_softc *sc,
324 struct ath5k_buf *bf) 325 struct ath5k_buf *bf)
325{ 326{
327 struct ath5k_hw *ah = sc->ah;
328 struct ath_common *common = ath5k_hw_common(ah);
329
326 BUG_ON(!bf); 330 BUG_ON(!bf);
327 if (!bf->skb) 331 if (!bf->skb)
328 return; 332 return;
329 pci_unmap_single(sc->pdev, bf->skbaddr, sc->rxbufsize, 333 pci_unmap_single(sc->pdev, bf->skbaddr, common->rx_bufsize,
330 PCI_DMA_FROMDEVICE); 334 PCI_DMA_FROMDEVICE);
331 dev_kfree_skb_any(bf->skb); 335 dev_kfree_skb_any(bf->skb);
332 bf->skb = NULL; 336 bf->skb = NULL;
@@ -437,6 +441,22 @@ ath5k_chip_name(enum ath5k_srev_type type, u_int16_t val)
437 441
438 return name; 442 return name;
439} 443}
444static unsigned int ath5k_ioread32(void *hw_priv, u32 reg_offset)
445{
446 struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv;
447 return ath5k_hw_reg_read(ah, reg_offset);
448}
449
450static void ath5k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
451{
452 struct ath5k_hw *ah = (struct ath5k_hw *) hw_priv;
453 ath5k_hw_reg_write(ah, val, reg_offset);
454}
455
456static const struct ath_ops ath5k_common_ops = {
457 .read = ath5k_ioread32,
458 .write = ath5k_iowrite32,
459};
440 460
441static int __devinit 461static int __devinit
442ath5k_pci_probe(struct pci_dev *pdev, 462ath5k_pci_probe(struct pci_dev *pdev,
@@ -444,6 +464,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
444{ 464{
445 void __iomem *mem; 465 void __iomem *mem;
446 struct ath5k_softc *sc; 466 struct ath5k_softc *sc;
467 struct ath_common *common;
447 struct ieee80211_hw *hw; 468 struct ieee80211_hw *hw;
448 int ret; 469 int ret;
449 u8 csz; 470 u8 csz;
@@ -547,7 +568,6 @@ ath5k_pci_probe(struct pci_dev *pdev,
547 __set_bit(ATH_STAT_INVALID, sc->status); 568 __set_bit(ATH_STAT_INVALID, sc->status);
548 569
549 sc->iobase = mem; /* So we can unmap it on detach */ 570 sc->iobase = mem; /* So we can unmap it on detach */
550 sc->common.cachelsz = csz << 2; /* convert to bytes */
551 sc->opmode = NL80211_IFTYPE_STATION; 571 sc->opmode = NL80211_IFTYPE_STATION;
552 sc->bintval = 1000; 572 sc->bintval = 1000;
553 mutex_init(&sc->lock); 573 mutex_init(&sc->lock);
@@ -565,13 +585,28 @@ ath5k_pci_probe(struct pci_dev *pdev,
565 goto err_free; 585 goto err_free;
566 } 586 }
567 587
568 /* Initialize device */ 588 /*If we passed the test malloc a ath5k_hw struct*/
569 sc->ah = ath5k_hw_attach(sc); 589 sc->ah = kzalloc(sizeof(struct ath5k_hw), GFP_KERNEL);
570 if (IS_ERR(sc->ah)) { 590 if (!sc->ah) {
571 ret = PTR_ERR(sc->ah); 591 ret = -ENOMEM;
592 ATH5K_ERR(sc, "out of memory\n");
572 goto err_irq; 593 goto err_irq;
573 } 594 }
574 595
596 sc->ah->ah_sc = sc;
597 sc->ah->ah_iobase = sc->iobase;
598 common = ath5k_hw_common(sc->ah);
599 common->ops = &ath5k_common_ops;
600 common->ah = sc->ah;
601 common->hw = hw;
602 common->cachelsz = csz << 2; /* convert to bytes */
603
604 /* Initialize device */
605 ret = ath5k_hw_attach(sc);
606 if (ret) {
607 goto err_free_ah;
608 }
609
575 /* set up multi-rate retry capabilities */ 610 /* set up multi-rate retry capabilities */
576 if (sc->ah->ah_version == AR5K_AR5212) { 611 if (sc->ah->ah_version == AR5K_AR5212) {
577 hw->max_rates = 4; 612 hw->max_rates = 4;
@@ -640,6 +675,8 @@ err_ah:
640 ath5k_hw_detach(sc->ah); 675 ath5k_hw_detach(sc->ah);
641err_irq: 676err_irq:
642 free_irq(pdev->irq, sc); 677 free_irq(pdev->irq, sc);
678err_free_ah:
679 kfree(sc->ah);
643err_free: 680err_free:
644 ieee80211_free_hw(hw); 681 ieee80211_free_hw(hw);
645err_map: 682err_map:
@@ -661,6 +698,7 @@ ath5k_pci_remove(struct pci_dev *pdev)
661 ath5k_debug_finish_device(sc); 698 ath5k_debug_finish_device(sc);
662 ath5k_detach(pdev, hw); 699 ath5k_detach(pdev, hw);
663 ath5k_hw_detach(sc->ah); 700 ath5k_hw_detach(sc->ah);
701 kfree(sc->ah);
664 free_irq(pdev->irq, sc); 702 free_irq(pdev->irq, sc);
665 pci_iounmap(pdev, sc->iobase); 703 pci_iounmap(pdev, sc->iobase);
666 pci_release_region(pdev, 0); 704 pci_release_region(pdev, 0);
@@ -669,33 +707,20 @@ ath5k_pci_remove(struct pci_dev *pdev)
669} 707}
670 708
671#ifdef CONFIG_PM 709#ifdef CONFIG_PM
672static int 710static int ath5k_pci_suspend(struct device *dev)
673ath5k_pci_suspend(struct pci_dev *pdev, pm_message_t state)
674{ 711{
675 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 712 struct ieee80211_hw *hw = pci_get_drvdata(to_pci_dev(dev));
676 struct ath5k_softc *sc = hw->priv; 713 struct ath5k_softc *sc = hw->priv;
677 714
678 ath5k_led_off(sc); 715 ath5k_led_off(sc);
679
680 pci_save_state(pdev);
681 pci_disable_device(pdev);
682 pci_set_power_state(pdev, PCI_D3hot);
683
684 return 0; 716 return 0;
685} 717}
686 718
687static int 719static int ath5k_pci_resume(struct device *dev)
688ath5k_pci_resume(struct pci_dev *pdev)
689{ 720{
721 struct pci_dev *pdev = to_pci_dev(dev);
690 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 722 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
691 struct ath5k_softc *sc = hw->priv; 723 struct ath5k_softc *sc = hw->priv;
692 int err;
693
694 pci_restore_state(pdev);
695
696 err = pci_enable_device(pdev);
697 if (err)
698 return err;
699 724
700 /* 725 /*
701 * Suspend/Resume resets the PCI configuration space, so we have to 726 * Suspend/Resume resets the PCI configuration space, so we have to
@@ -718,7 +743,7 @@ static int ath5k_reg_notifier(struct wiphy *wiphy, struct regulatory_request *re
718{ 743{
719 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy); 744 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
720 struct ath5k_softc *sc = hw->priv; 745 struct ath5k_softc *sc = hw->priv;
721 struct ath_regulatory *regulatory = &sc->common.regulatory; 746 struct ath_regulatory *regulatory = ath5k_hw_regulatory(sc->ah);
722 747
723 return ath_reg_notifier_apply(wiphy, request, regulatory); 748 return ath_reg_notifier_apply(wiphy, request, regulatory);
724} 749}
@@ -728,7 +753,7 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
728{ 753{
729 struct ath5k_softc *sc = hw->priv; 754 struct ath5k_softc *sc = hw->priv;
730 struct ath5k_hw *ah = sc->ah; 755 struct ath5k_hw *ah = sc->ah;
731 struct ath_regulatory *regulatory = &sc->common.regulatory; 756 struct ath_regulatory *regulatory = ath5k_hw_regulatory(ah);
732 u8 mac[ETH_ALEN] = {}; 757 u8 mac[ETH_ALEN] = {};
733 int ret; 758 int ret;
734 759
@@ -815,7 +840,7 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
815 840
816 SET_IEEE80211_PERM_ADDR(hw, mac); 841 SET_IEEE80211_PERM_ADDR(hw, mac);
817 /* All MAC address bits matter for ACKs */ 842 /* All MAC address bits matter for ACKs */
818 memset(sc->bssidmask, 0xff, ETH_ALEN); 843 memcpy(sc->bssidmask, ath_bcast_mac, ETH_ALEN);
819 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask); 844 ath5k_hw_set_bssid_mask(sc->ah, sc->bssidmask);
820 845
821 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain; 846 regulatory->current_rd = ah->ah_capabilities.cap_eeprom.ee_regdomain;
@@ -1152,24 +1177,26 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
1152static 1177static
1153struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr) 1178struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
1154{ 1179{
1180 struct ath_common *common = ath5k_hw_common(sc->ah);
1155 struct sk_buff *skb; 1181 struct sk_buff *skb;
1156 1182
1157 /* 1183 /*
1158 * Allocate buffer with headroom_needed space for the 1184 * Allocate buffer with headroom_needed space for the
1159 * fake physical layer header at the start. 1185 * fake physical layer header at the start.
1160 */ 1186 */
1161 skb = ath_rxbuf_alloc(&sc->common, 1187 skb = ath_rxbuf_alloc(common,
1162 sc->rxbufsize + sc->common.cachelsz - 1, 1188 common->rx_bufsize,
1163 GFP_ATOMIC); 1189 GFP_ATOMIC);
1164 1190
1165 if (!skb) { 1191 if (!skb) {
1166 ATH5K_ERR(sc, "can't alloc skbuff of size %u\n", 1192 ATH5K_ERR(sc, "can't alloc skbuff of size %u\n",
1167 sc->rxbufsize + sc->common.cachelsz - 1); 1193 common->rx_bufsize);
1168 return NULL; 1194 return NULL;
1169 } 1195 }
1170 1196
1171 *skb_addr = pci_map_single(sc->pdev, 1197 *skb_addr = pci_map_single(sc->pdev,
1172 skb->data, sc->rxbufsize, PCI_DMA_FROMDEVICE); 1198 skb->data, common->rx_bufsize,
1199 PCI_DMA_FROMDEVICE);
1173 if (unlikely(pci_dma_mapping_error(sc->pdev, *skb_addr))) { 1200 if (unlikely(pci_dma_mapping_error(sc->pdev, *skb_addr))) {
1174 ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__); 1201 ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__);
1175 dev_kfree_skb(skb); 1202 dev_kfree_skb(skb);
@@ -1220,6 +1247,29 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1220 return 0; 1247 return 0;
1221} 1248}
1222 1249
1250static enum ath5k_pkt_type get_hw_packet_type(struct sk_buff *skb)
1251{
1252 struct ieee80211_hdr *hdr;
1253 enum ath5k_pkt_type htype;
1254 __le16 fc;
1255
1256 hdr = (struct ieee80211_hdr *)skb->data;
1257 fc = hdr->frame_control;
1258
1259 if (ieee80211_is_beacon(fc))
1260 htype = AR5K_PKT_TYPE_BEACON;
1261 else if (ieee80211_is_probe_resp(fc))
1262 htype = AR5K_PKT_TYPE_PROBE_RESP;
1263 else if (ieee80211_is_atim(fc))
1264 htype = AR5K_PKT_TYPE_ATIM;
1265 else if (ieee80211_is_pspoll(fc))
1266 htype = AR5K_PKT_TYPE_PSPOLL;
1267 else
1268 htype = AR5K_PKT_TYPE_NORMAL;
1269
1270 return htype;
1271}
1272
1223static int 1273static int
1224ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf, 1274ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
1225 struct ath5k_txq *txq) 1275 struct ath5k_txq *txq)
@@ -1274,7 +1324,8 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
1274 sc->vif, pktlen, info)); 1324 sc->vif, pktlen, info));
1275 } 1325 }
1276 ret = ah->ah_setup_tx_desc(ah, ds, pktlen, 1326 ret = ah->ah_setup_tx_desc(ah, ds, pktlen,
1277 ieee80211_get_hdrlen_from_skb(skb), AR5K_PKT_TYPE_NORMAL, 1327 ieee80211_get_hdrlen_from_skb(skb),
1328 get_hw_packet_type(skb),
1278 (sc->power_level * 2), 1329 (sc->power_level * 2),
1279 hw_rate, 1330 hw_rate,
1280 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags, 1331 info->control.rates[0].count, keyidx, ah->ah_tx_ant, flags,
@@ -1303,7 +1354,6 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf,
1303 1354
1304 spin_lock_bh(&txq->lock); 1355 spin_lock_bh(&txq->lock);
1305 list_add_tail(&bf->list, &txq->q); 1356 list_add_tail(&bf->list, &txq->q);
1306 sc->tx_stats[txq->qnum].len++;
1307 if (txq->link == NULL) /* is this first packet? */ 1357 if (txq->link == NULL) /* is this first packet? */
1308 ath5k_hw_set_txdp(ah, txq->qnum, bf->daddr); 1358 ath5k_hw_set_txdp(ah, txq->qnum, bf->daddr);
1309 else /* no, so only link it */ 1359 else /* no, so only link it */
@@ -1487,7 +1537,8 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
1487 1537
1488 ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi); 1538 ret = ath5k_hw_get_tx_queueprops(ah, sc->bhalq, &qi);
1489 if (ret) 1539 if (ret)
1490 return ret; 1540 goto err;
1541
1491 if (sc->opmode == NL80211_IFTYPE_AP || 1542 if (sc->opmode == NL80211_IFTYPE_AP ||
1492 sc->opmode == NL80211_IFTYPE_MESH_POINT) { 1543 sc->opmode == NL80211_IFTYPE_MESH_POINT) {
1493 /* 1544 /*
@@ -1514,10 +1565,25 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
1514 if (ret) { 1565 if (ret) {
1515 ATH5K_ERR(sc, "%s: unable to update parameters for beacon " 1566 ATH5K_ERR(sc, "%s: unable to update parameters for beacon "
1516 "hardware queue!\n", __func__); 1567 "hardware queue!\n", __func__);
1517 return ret; 1568 goto err;
1518 } 1569 }
1570 ret = ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */
1571 if (ret)
1572 goto err;
1573
1574 /* reconfigure cabq with ready time to 80% of beacon_interval */
1575 ret = ath5k_hw_get_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
1576 if (ret)
1577 goto err;
1578
1579 qi.tqi_ready_time = (sc->bintval * 80) / 100;
1580 ret = ath5k_hw_set_tx_queueprops(ah, AR5K_TX_QUEUE_ID_CAB, &qi);
1581 if (ret)
1582 goto err;
1519 1583
1520 return ath5k_hw_reset_tx_queue(ah, sc->bhalq); /* push to h/w */; 1584 ret = ath5k_hw_reset_tx_queue(ah, AR5K_TX_QUEUE_ID_CAB);
1585err:
1586 return ret;
1521} 1587}
1522 1588
1523static void 1589static void
@@ -1536,7 +1602,6 @@ ath5k_txq_drainq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1536 ath5k_txbuf_free(sc, bf); 1602 ath5k_txbuf_free(sc, bf);
1537 1603
1538 spin_lock_bh(&sc->txbuflock); 1604 spin_lock_bh(&sc->txbuflock);
1539 sc->tx_stats[txq->qnum].len--;
1540 list_move_tail(&bf->list, &sc->txbuf); 1605 list_move_tail(&bf->list, &sc->txbuf);
1541 sc->txbuf_len++; 1606 sc->txbuf_len++;
1542 spin_unlock_bh(&sc->txbuflock); 1607 spin_unlock_bh(&sc->txbuflock);
@@ -1605,13 +1670,14 @@ static int
1605ath5k_rx_start(struct ath5k_softc *sc) 1670ath5k_rx_start(struct ath5k_softc *sc)
1606{ 1671{
1607 struct ath5k_hw *ah = sc->ah; 1672 struct ath5k_hw *ah = sc->ah;
1673 struct ath_common *common = ath5k_hw_common(ah);
1608 struct ath5k_buf *bf; 1674 struct ath5k_buf *bf;
1609 int ret; 1675 int ret;
1610 1676
1611 sc->rxbufsize = roundup(IEEE80211_MAX_LEN, sc->common.cachelsz); 1677 common->rx_bufsize = roundup(IEEE80211_MAX_LEN, common->cachelsz);
1612 1678
1613 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rxbufsize %u\n", 1679 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "cachelsz %u rx_bufsize %u\n",
1614 sc->common.cachelsz, sc->rxbufsize); 1680 common->cachelsz, common->rx_bufsize);
1615 1681
1616 spin_lock_bh(&sc->rxbuflock); 1682 spin_lock_bh(&sc->rxbuflock);
1617 sc->rxlink = NULL; 1683 sc->rxlink = NULL;
@@ -1656,6 +1722,8 @@ static unsigned int
1656ath5k_rx_decrypted(struct ath5k_softc *sc, struct ath5k_desc *ds, 1722ath5k_rx_decrypted(struct ath5k_softc *sc, struct ath5k_desc *ds,
1657 struct sk_buff *skb, struct ath5k_rx_status *rs) 1723 struct sk_buff *skb, struct ath5k_rx_status *rs)
1658{ 1724{
1725 struct ath5k_hw *ah = sc->ah;
1726 struct ath_common *common = ath5k_hw_common(ah);
1659 struct ieee80211_hdr *hdr = (void *)skb->data; 1727 struct ieee80211_hdr *hdr = (void *)skb->data;
1660 unsigned int keyix, hlen; 1728 unsigned int keyix, hlen;
1661 1729
@@ -1672,7 +1740,7 @@ ath5k_rx_decrypted(struct ath5k_softc *sc, struct ath5k_desc *ds,
1672 skb->len >= hlen + 4) { 1740 skb->len >= hlen + 4) {
1673 keyix = skb->data[hlen + 3] >> 6; 1741 keyix = skb->data[hlen + 3] >> 6;
1674 1742
1675 if (test_bit(keyix, sc->keymap)) 1743 if (test_bit(keyix, common->keymap))
1676 return RX_FLAG_DECRYPTED; 1744 return RX_FLAG_DECRYPTED;
1677 } 1745 }
1678 1746
@@ -1684,13 +1752,14 @@ static void
1684ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb, 1752ath5k_check_ibss_tsf(struct ath5k_softc *sc, struct sk_buff *skb,
1685 struct ieee80211_rx_status *rxs) 1753 struct ieee80211_rx_status *rxs)
1686{ 1754{
1755 struct ath_common *common = ath5k_hw_common(sc->ah);
1687 u64 tsf, bc_tstamp; 1756 u64 tsf, bc_tstamp;
1688 u32 hw_tu; 1757 u32 hw_tu;
1689 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; 1758 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data;
1690 1759
1691 if (ieee80211_is_beacon(mgmt->frame_control) && 1760 if (ieee80211_is_beacon(mgmt->frame_control) &&
1692 le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS && 1761 le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS &&
1693 memcmp(mgmt->bssid, sc->ah->ah_bssid, ETH_ALEN) == 0) { 1762 memcmp(mgmt->bssid, common->curbssid, ETH_ALEN) == 0) {
1694 /* 1763 /*
1695 * Received an IBSS beacon with the same BSSID. Hardware *must* 1764 * Received an IBSS beacon with the same BSSID. Hardware *must*
1696 * have updated the local TSF. We have to work around various 1765 * have updated the local TSF. We have to work around various
@@ -1745,6 +1814,8 @@ ath5k_tasklet_rx(unsigned long data)
1745 struct sk_buff *skb, *next_skb; 1814 struct sk_buff *skb, *next_skb;
1746 dma_addr_t next_skb_addr; 1815 dma_addr_t next_skb_addr;
1747 struct ath5k_softc *sc = (void *)data; 1816 struct ath5k_softc *sc = (void *)data;
1817 struct ath5k_hw *ah = sc->ah;
1818 struct ath_common *common = ath5k_hw_common(ah);
1748 struct ath5k_buf *bf; 1819 struct ath5k_buf *bf;
1749 struct ath5k_desc *ds; 1820 struct ath5k_desc *ds;
1750 int ret; 1821 int ret;
@@ -1822,7 +1893,7 @@ accept:
1822 if (!next_skb) 1893 if (!next_skb)
1823 goto next; 1894 goto next;
1824 1895
1825 pci_unmap_single(sc->pdev, bf->skbaddr, sc->rxbufsize, 1896 pci_unmap_single(sc->pdev, bf->skbaddr, common->rx_bufsize,
1826 PCI_DMA_FROMDEVICE); 1897 PCI_DMA_FROMDEVICE);
1827 skb_put(skb, rs.rs_datalen); 1898 skb_put(skb, rs.rs_datalen);
1828 1899
@@ -1871,17 +1942,6 @@ accept:
1871 rxs->noise = sc->ah->ah_noise_floor; 1942 rxs->noise = sc->ah->ah_noise_floor;
1872 rxs->signal = rxs->noise + rs.rs_rssi; 1943 rxs->signal = rxs->noise + rs.rs_rssi;
1873 1944
1874 /* An rssi of 35 indicates you should be able use
1875 * 54 Mbps reliably. A more elaborate scheme can be used
1876 * here but it requires a map of SNR/throughput for each
1877 * possible mode used */
1878 rxs->qual = rs.rs_rssi * 100 / 35;
1879
1880 /* rssi can be more than 35 though, anything above that
1881 * should be considered at 100% */
1882 if (rxs->qual > 100)
1883 rxs->qual = 100;
1884
1885 rxs->antenna = rs.rs_antenna; 1945 rxs->antenna = rs.rs_antenna;
1886 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs.rs_rate); 1946 rxs->rate_idx = ath5k_hw_to_driver_rix(sc, rs.rs_rate);
1887 rxs->flag |= ath5k_rx_decrypted(sc, ds, skb, &rs); 1947 rxs->flag |= ath5k_rx_decrypted(sc, ds, skb, &rs);
@@ -1971,10 +2031,8 @@ ath5k_tx_processq(struct ath5k_softc *sc, struct ath5k_txq *txq)
1971 } 2031 }
1972 2032
1973 ieee80211_tx_status(sc->hw, skb); 2033 ieee80211_tx_status(sc->hw, skb);
1974 sc->tx_stats[txq->qnum].count++;
1975 2034
1976 spin_lock(&sc->txbuflock); 2035 spin_lock(&sc->txbuflock);
1977 sc->tx_stats[txq->qnum].len--;
1978 list_move_tail(&bf->list, &sc->txbuf); 2036 list_move_tail(&bf->list, &sc->txbuf);
1979 sc->txbuf_len++; 2037 sc->txbuf_len++;
1980 spin_unlock(&sc->txbuflock); 2038 spin_unlock(&sc->txbuflock);
@@ -2349,6 +2407,9 @@ ath5k_init(struct ath5k_softc *sc)
2349 */ 2407 */
2350 ath5k_stop_locked(sc); 2408 ath5k_stop_locked(sc);
2351 2409
2410 /* Set PHY calibration interval */
2411 ah->ah_cal_intval = ath5k_calinterval;
2412
2352 /* 2413 /*
2353 * The basic interface to setting the hardware in a good 2414 * The basic interface to setting the hardware in a good
2354 * state is ``reset''. On return the hardware is known to 2415 * state is ``reset''. On return the hardware is known to
@@ -2376,10 +2437,6 @@ ath5k_init(struct ath5k_softc *sc)
2376 2437
2377 /* Set ack to be sent at low bit-rates */ 2438 /* Set ack to be sent at low bit-rates */
2378 ath5k_hw_set_ack_bitrate_high(ah, false); 2439 ath5k_hw_set_ack_bitrate_high(ah, false);
2379
2380 /* Set PHY calibration inteval */
2381 ah->ah_cal_intval = ath5k_calinterval;
2382
2383 ret = 0; 2440 ret = 0;
2384done: 2441done:
2385 mmiowb(); 2442 mmiowb();
@@ -2753,7 +2810,7 @@ static void ath5k_stop(struct ieee80211_hw *hw)
2753} 2810}
2754 2811
2755static int ath5k_add_interface(struct ieee80211_hw *hw, 2812static int ath5k_add_interface(struct ieee80211_hw *hw,
2756 struct ieee80211_if_init_conf *conf) 2813 struct ieee80211_vif *vif)
2757{ 2814{
2758 struct ath5k_softc *sc = hw->priv; 2815 struct ath5k_softc *sc = hw->priv;
2759 int ret; 2816 int ret;
@@ -2764,22 +2821,22 @@ static int ath5k_add_interface(struct ieee80211_hw *hw,
2764 goto end; 2821 goto end;
2765 } 2822 }
2766 2823
2767 sc->vif = conf->vif; 2824 sc->vif = vif;
2768 2825
2769 switch (conf->type) { 2826 switch (vif->type) {
2770 case NL80211_IFTYPE_AP: 2827 case NL80211_IFTYPE_AP:
2771 case NL80211_IFTYPE_STATION: 2828 case NL80211_IFTYPE_STATION:
2772 case NL80211_IFTYPE_ADHOC: 2829 case NL80211_IFTYPE_ADHOC:
2773 case NL80211_IFTYPE_MESH_POINT: 2830 case NL80211_IFTYPE_MESH_POINT:
2774 case NL80211_IFTYPE_MONITOR: 2831 case NL80211_IFTYPE_MONITOR:
2775 sc->opmode = conf->type; 2832 sc->opmode = vif->type;
2776 break; 2833 break;
2777 default: 2834 default:
2778 ret = -EOPNOTSUPP; 2835 ret = -EOPNOTSUPP;
2779 goto end; 2836 goto end;
2780 } 2837 }
2781 2838
2782 ath5k_hw_set_lladdr(sc->ah, conf->mac_addr); 2839 ath5k_hw_set_lladdr(sc->ah, vif->addr);
2783 ath5k_mode_setup(sc); 2840 ath5k_mode_setup(sc);
2784 2841
2785 ret = 0; 2842 ret = 0;
@@ -2790,13 +2847,13 @@ end:
2790 2847
2791static void 2848static void
2792ath5k_remove_interface(struct ieee80211_hw *hw, 2849ath5k_remove_interface(struct ieee80211_hw *hw,
2793 struct ieee80211_if_init_conf *conf) 2850 struct ieee80211_vif *vif)
2794{ 2851{
2795 struct ath5k_softc *sc = hw->priv; 2852 struct ath5k_softc *sc = hw->priv;
2796 u8 mac[ETH_ALEN] = {}; 2853 u8 mac[ETH_ALEN] = {};
2797 2854
2798 mutex_lock(&sc->lock); 2855 mutex_lock(&sc->lock);
2799 if (sc->vif != conf->vif) 2856 if (sc->vif != vif)
2800 goto end; 2857 goto end;
2801 2858
2802 ath5k_hw_set_lladdr(sc->ah, mac); 2859 ath5k_hw_set_lladdr(sc->ah, mac);
@@ -3008,6 +3065,8 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3008 struct ieee80211_key_conf *key) 3065 struct ieee80211_key_conf *key)
3009{ 3066{
3010 struct ath5k_softc *sc = hw->priv; 3067 struct ath5k_softc *sc = hw->priv;
3068 struct ath5k_hw *ah = sc->ah;
3069 struct ath_common *common = ath5k_hw_common(ah);
3011 int ret = 0; 3070 int ret = 0;
3012 3071
3013 if (modparam_nohwcrypt) 3072 if (modparam_nohwcrypt)
@@ -3040,14 +3099,14 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3040 ATH5K_ERR(sc, "can't set the key\n"); 3099 ATH5K_ERR(sc, "can't set the key\n");
3041 goto unlock; 3100 goto unlock;
3042 } 3101 }
3043 __set_bit(key->keyidx, sc->keymap); 3102 __set_bit(key->keyidx, common->keymap);
3044 key->hw_key_idx = key->keyidx; 3103 key->hw_key_idx = key->keyidx;
3045 key->flags |= (IEEE80211_KEY_FLAG_GENERATE_IV | 3104 key->flags |= (IEEE80211_KEY_FLAG_GENERATE_IV |
3046 IEEE80211_KEY_FLAG_GENERATE_MMIC); 3105 IEEE80211_KEY_FLAG_GENERATE_MMIC);
3047 break; 3106 break;
3048 case DISABLE_KEY: 3107 case DISABLE_KEY:
3049 ath5k_hw_reset_key(sc->ah, key->keyidx); 3108 ath5k_hw_reset_key(sc->ah, key->keyidx);
3050 __clear_bit(key->keyidx, sc->keymap); 3109 __clear_bit(key->keyidx, common->keymap);
3051 break; 3110 break;
3052 default: 3111 default:
3053 ret = -EINVAL; 3112 ret = -EINVAL;
@@ -3075,17 +3134,6 @@ ath5k_get_stats(struct ieee80211_hw *hw,
3075 return 0; 3134 return 0;
3076} 3135}
3077 3136
3078static int
3079ath5k_get_tx_stats(struct ieee80211_hw *hw,
3080 struct ieee80211_tx_queue_stats *stats)
3081{
3082 struct ath5k_softc *sc = hw->priv;
3083
3084 memcpy(stats, &sc->tx_stats, sizeof(sc->tx_stats));
3085
3086 return 0;
3087}
3088
3089static u64 3137static u64
3090ath5k_get_tsf(struct ieee80211_hw *hw) 3138ath5k_get_tsf(struct ieee80211_hw *hw)
3091{ 3139{
@@ -3176,6 +3224,7 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
3176{ 3224{
3177 struct ath5k_softc *sc = hw->priv; 3225 struct ath5k_softc *sc = hw->priv;
3178 struct ath5k_hw *ah = sc->ah; 3226 struct ath5k_hw *ah = sc->ah;
3227 struct ath_common *common = ath5k_hw_common(ah);
3179 unsigned long flags; 3228 unsigned long flags;
3180 3229
3181 mutex_lock(&sc->lock); 3230 mutex_lock(&sc->lock);
@@ -3184,10 +3233,9 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
3184 3233
3185 if (changes & BSS_CHANGED_BSSID) { 3234 if (changes & BSS_CHANGED_BSSID) {
3186 /* Cache for later use during resets */ 3235 /* Cache for later use during resets */
3187 memcpy(ah->ah_bssid, bss_conf->bssid, ETH_ALEN); 3236 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
3188 /* XXX: assoc id is set to 0 for now, mac80211 doesn't have 3237 common->curaid = 0;
3189 * a clean way of letting us retrieve this yet. */ 3238 ath5k_hw_set_associd(ah);
3190 ath5k_hw_set_associd(ah, ah->ah_bssid, 0);
3191 mmiowb(); 3239 mmiowb();
3192 } 3240 }
3193 3241
@@ -3200,6 +3248,14 @@ static void ath5k_bss_info_changed(struct ieee80211_hw *hw,
3200 set_beacon_filter(hw, sc->assoc); 3248 set_beacon_filter(hw, sc->assoc);
3201 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 3249 ath5k_hw_set_ledstate(sc->ah, sc->assoc ?
3202 AR5K_LED_ASSOC : AR5K_LED_INIT); 3250 AR5K_LED_ASSOC : AR5K_LED_INIT);
3251 if (bss_conf->assoc) {
3252 ATH5K_DBG(sc, ATH5K_DEBUG_ANY,
3253 "Bss Info ASSOC %d, bssid: %pM\n",
3254 bss_conf->aid, common->curbssid);
3255 common->curaid = bss_conf->aid;
3256 ath5k_hw_set_associd(ah);
3257 /* Once ANI is available you would start it here */
3258 }
3203 } 3259 }
3204 3260
3205 if (changes & BSS_CHANGED_BEACON) { 3261 if (changes & BSS_CHANGED_BEACON) {
@@ -3232,3 +3288,22 @@ static void ath5k_sw_scan_complete(struct ieee80211_hw *hw)
3232 ath5k_hw_set_ledstate(sc->ah, sc->assoc ? 3288 ath5k_hw_set_ledstate(sc->ah, sc->assoc ?
3233 AR5K_LED_ASSOC : AR5K_LED_INIT); 3289 AR5K_LED_ASSOC : AR5K_LED_INIT);
3234} 3290}
3291
3292/**
3293 * ath5k_set_coverage_class - Set IEEE 802.11 coverage class
3294 *
3295 * @hw: struct ieee80211_hw pointer
3296 * @coverage_class: IEEE 802.11 coverage class number
3297 *
3298 * Mac80211 callback. Sets slot time, ACK timeout and CTS timeout for given
3299 * coverage class. The values are persistent, they are restored after device
3300 * reset.
3301 */
3302static void ath5k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
3303{
3304 struct ath5k_softc *sc = hw->priv;
3305
3306 mutex_lock(&sc->lock);
3307 ath5k_hw_set_coverage_class(sc->ah, coverage_class);
3308 mutex_unlock(&sc->lock);
3309}
diff --git a/drivers/net/wireless/ath/ath5k/base.h b/drivers/net/wireless/ath/ath5k/base.h
index a28c42f32c9d..7e1a88a5abdb 100644
--- a/drivers/net/wireless/ath/ath5k/base.h
+++ b/drivers/net/wireless/ath/ath5k/base.h
@@ -36,7 +36,7 @@
36 */ 36 */
37 37
38/* 38/*
39 * Defintions for the Atheros Wireless LAN controller driver. 39 * Definitions for the Atheros Wireless LAN controller driver.
40 */ 40 */
41#ifndef _DEV_ATH_ATHVAR_H 41#ifndef _DEV_ATH_ATHVAR_H
42#define _DEV_ATH_ATHVAR_H 42#define _DEV_ATH_ATHVAR_H
@@ -115,10 +115,8 @@ struct ath5k_rfkill {
115 * associated with an instance of a device */ 115 * associated with an instance of a device */
116struct ath5k_softc { 116struct ath5k_softc {
117 struct pci_dev *pdev; /* for dma mapping */ 117 struct pci_dev *pdev; /* for dma mapping */
118 struct ath_common common;
119 void __iomem *iobase; /* address of the device */ 118 void __iomem *iobase; /* address of the device */
120 struct mutex lock; /* dev-level lock */ 119 struct mutex lock; /* dev-level lock */
121 struct ieee80211_tx_queue_stats tx_stats[AR5K_NUM_TX_QUEUES];
122 struct ieee80211_low_level_stats ll_stats; 120 struct ieee80211_low_level_stats ll_stats;
123 struct ieee80211_hw *hw; /* IEEE 802.11 common */ 121 struct ieee80211_hw *hw; /* IEEE 802.11 common */
124 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 122 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
@@ -154,8 +152,6 @@ struct ath5k_softc {
154 152
155 enum ath5k_int imask; /* interrupt mask copy */ 153 enum ath5k_int imask; /* interrupt mask copy */
156 154
157 DECLARE_BITMAP(keymap, AR5K_KEYCACHE_SIZE); /* key use bit map */
158
159 u8 bssidmask[ETH_ALEN]; 155 u8 bssidmask[ETH_ALEN];
160 156
161 unsigned int led_pin, /* GPIO pin for driving LED */ 157 unsigned int led_pin, /* GPIO pin for driving LED */
@@ -193,7 +189,7 @@ struct ath5k_softc {
193 struct ath5k_txq *cabq; /* content after beacon */ 189 struct ath5k_txq *cabq; /* content after beacon */
194 190
195 int power_level; /* Requested tx power in dbm */ 191 int power_level; /* Requested tx power in dbm */
196 bool assoc; /* assocate state */ 192 bool assoc; /* associate state */
197 bool enable_beacon; /* true if beacons are on */ 193 bool enable_beacon; /* true if beacons are on */
198}; 194};
199 195
@@ -202,15 +198,4 @@ struct ath5k_softc {
202#define ath5k_hw_hasveol(_ah) \ 198#define ath5k_hw_hasveol(_ah) \
203 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0) 199 (ath5k_hw_get_capability(_ah, AR5K_CAP_VEOL, 0, NULL) == 0)
204 200
205static inline struct ath_common *ath5k_hw_common(struct ath5k_hw *ah)
206{
207 return &ah->ah_sc->common;
208}
209
210static inline struct ath_regulatory *ath5k_hw_regulatory(struct ath5k_hw *ah)
211{
212 return &(ath5k_hw_common(ah)->regulatory);
213
214}
215
216#endif 201#endif
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.c b/drivers/net/wireless/ath/ath5k/eeprom.c
index 644962adda97..67665cdc7afe 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.c
+++ b/drivers/net/wireless/ath/ath5k/eeprom.c
@@ -21,6 +21,8 @@
21* EEPROM access functions and helpers * 21* EEPROM access functions and helpers *
22\*************************************/ 22\*************************************/
23 23
24#include <linux/slab.h>
25
24#include "ath5k.h" 26#include "ath5k.h"
25#include "reg.h" 27#include "reg.h"
26#include "debug.h" 28#include "debug.h"
@@ -97,6 +99,7 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
97 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom; 99 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
98 int ret; 100 int ret;
99 u16 val; 101 u16 val;
102 u32 cksum, offset, eep_max = AR5K_EEPROM_INFO_MAX;
100 103
101 /* 104 /*
102 * Read values from EEPROM and store them in the capability structure 105 * Read values from EEPROM and store them in the capability structure
@@ -111,20 +114,44 @@ ath5k_eeprom_init_header(struct ath5k_hw *ah)
111 if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0) 114 if (ah->ah_ee_version < AR5K_EEPROM_VERSION_3_0)
112 return 0; 115 return 0;
113 116
114#ifdef notyet
115 /* 117 /*
116 * Validate the checksum of the EEPROM date. There are some 118 * Validate the checksum of the EEPROM date. There are some
117 * devices with invalid EEPROMs. 119 * devices with invalid EEPROMs.
118 */ 120 */
119 for (cksum = 0, offset = 0; offset < AR5K_EEPROM_INFO_MAX; offset++) { 121 AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_UPPER, val);
122 if (val) {
123 eep_max = (val & AR5K_EEPROM_SIZE_UPPER_MASK) <<
124 AR5K_EEPROM_SIZE_ENDLOC_SHIFT;
125 AR5K_EEPROM_READ(AR5K_EEPROM_SIZE_LOWER, val);
126 eep_max = (eep_max | val) - AR5K_EEPROM_INFO_BASE;
127
128 /*
129 * Fail safe check to prevent stupid loops due
130 * to busted EEPROMs. XXX: This value is likely too
131 * big still, waiting on a better value.
132 */
133 if (eep_max > (3 * AR5K_EEPROM_INFO_MAX)) {
134 ATH5K_ERR(ah->ah_sc, "Invalid max custom EEPROM size: "
135 "%d (0x%04x) max expected: %d (0x%04x)\n",
136 eep_max, eep_max,
137 3 * AR5K_EEPROM_INFO_MAX,
138 3 * AR5K_EEPROM_INFO_MAX);
139 return -EIO;
140 }
141 }
142
143 for (cksum = 0, offset = 0; offset < eep_max; offset++) {
120 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val); 144 AR5K_EEPROM_READ(AR5K_EEPROM_INFO(offset), val);
121 cksum ^= val; 145 cksum ^= val;
122 } 146 }
123 if (cksum != AR5K_EEPROM_INFO_CKSUM) { 147 if (cksum != AR5K_EEPROM_INFO_CKSUM) {
124 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM checksum 0x%04x\n", cksum); 148 ATH5K_ERR(ah->ah_sc, "Invalid EEPROM "
149 "checksum: 0x%04x eep_max: 0x%04x (%s)\n",
150 cksum, eep_max,
151 eep_max == AR5K_EEPROM_INFO_MAX ?
152 "default size" : "custom size");
125 return -EIO; 153 return -EIO;
126 } 154 }
127#endif
128 155
129 AR5K_EEPROM_READ_HDR(AR5K_EEPROM_ANT_GAIN(ah->ah_ee_version), 156 AR5K_EEPROM_READ_HDR(AR5K_EEPROM_ANT_GAIN(ah->ah_ee_version),
130 ee_ant_gain); 157 ee_ant_gain);
@@ -404,8 +431,8 @@ static int ath5k_eeprom_read_modes(struct ath5k_hw *ah, u32 *offset,
404 ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f; 431 ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f;
405 432
406 AR5K_EEPROM_READ(o++, val); 433 AR5K_EEPROM_READ(o++, val);
407 ee->ee_i_cal[mode] = (val >> 8) & 0x3f; 434 ee->ee_i_cal[mode] = (val >> 5) & 0x3f;
408 ee->ee_q_cal[mode] = (val >> 3) & 0x1f; 435 ee->ee_q_cal[mode] = val & 0x1f;
409 436
410 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_2) { 437 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_2) {
411 AR5K_EEPROM_READ(o++, val); 438 AR5K_EEPROM_READ(o++, val);
@@ -1492,7 +1519,7 @@ ath5k_eeprom_read_target_rate_pwr_info(struct ath5k_hw *ah, unsigned int mode)
1492 * This info is used to calibrate the baseband power table. Imagine 1519 * This info is used to calibrate the baseband power table. Imagine
1493 * that for each channel there is a power curve that's hw specific 1520 * that for each channel there is a power curve that's hw specific
1494 * (depends on amplifier etc) and we try to "correct" this curve using 1521 * (depends on amplifier etc) and we try to "correct" this curve using
1495 * offests we pass on to phy chip (baseband -> before amplifier) so that 1522 * offsets we pass on to phy chip (baseband -> before amplifier) so that
1496 * it can use accurate power values when setting tx power (takes amplifier's 1523 * it can use accurate power values when setting tx power (takes amplifier's
1497 * performance on each channel into account). 1524 * performance on each channel into account).
1498 * 1525 *
diff --git a/drivers/net/wireless/ath/ath5k/eeprom.h b/drivers/net/wireless/ath/ath5k/eeprom.h
index 0123f3521a0b..473a483bb9c3 100644
--- a/drivers/net/wireless/ath/ath5k/eeprom.h
+++ b/drivers/net/wireless/ath/ath5k/eeprom.h
@@ -37,6 +37,14 @@
37#define AR5K_EEPROM_RFKILL_POLARITY_S 1 37#define AR5K_EEPROM_RFKILL_POLARITY_S 1
38 38
39#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */ 39#define AR5K_EEPROM_REG_DOMAIN 0x00bf /* EEPROM regdom */
40
41/* FLASH(EEPROM) Defines for AR531X chips */
42#define AR5K_EEPROM_SIZE_LOWER 0x1b /* size info -- lower */
43#define AR5K_EEPROM_SIZE_UPPER 0x1c /* size info -- upper */
44#define AR5K_EEPROM_SIZE_UPPER_MASK 0xfff0
45#define AR5K_EEPROM_SIZE_UPPER_SHIFT 4
46#define AR5K_EEPROM_SIZE_ENDLOC_SHIFT 12
47
40#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */ 48#define AR5K_EEPROM_CHECKSUM 0x00c0 /* EEPROM checksum */
41#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */ 49#define AR5K_EEPROM_INFO_BASE 0x00c0 /* EEPROM header */
42#define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE) 50#define AR5K_EEPROM_INFO_MAX (0x400 - AR5K_EEPROM_INFO_BASE)
diff --git a/drivers/net/wireless/ath/ath5k/initvals.c b/drivers/net/wireless/ath/ath5k/initvals.c
index 18eb5190ce4b..8fa439308828 100644
--- a/drivers/net/wireless/ath/ath5k/initvals.c
+++ b/drivers/net/wireless/ath/ath5k/initvals.c
@@ -560,8 +560,8 @@ static const struct ath5k_ini ar5212_ini_common_start[] = {
560 { AR5K_SLEEP0, 0x0002aaaa }, 560 { AR5K_SLEEP0, 0x0002aaaa },
561 { AR5K_SLEEP1, 0x02005555 }, 561 { AR5K_SLEEP1, 0x02005555 },
562 { AR5K_SLEEP2, 0x00000000 }, 562 { AR5K_SLEEP2, 0x00000000 },
563 { AR5K_BSS_IDM0, 0xffffffff }, 563 { AR_BSSMSKL, 0xffffffff },
564 { AR5K_BSS_IDM1, 0x0000ffff }, 564 { AR_BSSMSKU, 0x0000ffff },
565 { AR5K_TXPC, 0x00000000 }, 565 { AR5K_TXPC, 0x00000000 },
566 { AR5K_PROFCNT_TX, 0x00000000 }, 566 { AR5K_PROFCNT_TX, 0x00000000 },
567 { AR5K_PROFCNT_RX, 0x00000000 }, 567 { AR5K_PROFCNT_RX, 0x00000000 },
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index b548c8eaaae1..67aa52e9bf94 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -59,6 +59,8 @@ static const struct pci_device_id ath5k_led_devices[] = {
59 { ATH_SDEVICE(PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID), ATH_LED(1, 1) }, 59 { ATH_SDEVICE(PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID), ATH_LED(1, 1) },
60 /* Acer Aspire One A150 (maximlevitsky@gmail.com) */ 60 /* Acer Aspire One A150 (maximlevitsky@gmail.com) */
61 { ATH_SDEVICE(PCI_VENDOR_ID_FOXCONN, 0xe008), ATH_LED(3, 0) }, 61 { ATH_SDEVICE(PCI_VENDOR_ID_FOXCONN, 0xe008), ATH_LED(3, 0) },
62 /* Acer Aspire One AO531h AO751h (keng-yu.lin@canonical.com) */
63 { ATH_SDEVICE(PCI_VENDOR_ID_FOXCONN, 0xe00d), ATH_LED(3, 0) },
62 /* Acer Ferrari 5000 (russ.dill@gmail.com) */ 64 /* Acer Ferrari 5000 (russ.dill@gmail.com) */
63 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) }, 65 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) },
64 /* E-machines E510 (tuliom@gmail.com) */ 66 /* E-machines E510 (tuliom@gmail.com) */
@@ -75,8 +77,12 @@ static const struct pci_device_id ath5k_led_devices[] = {
75 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137a), ATH_LED(3, 1) }, 77 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137a), ATH_LED(3, 1) },
76 /* HP Compaq C700 (nitrousnrg@gmail.com) */ 78 /* HP Compaq C700 (nitrousnrg@gmail.com) */
77 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, 79 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) },
80 /* LiteOn AR5BXB63 (magooz@salug.it) */
81 { ATH_SDEVICE(PCI_VENDOR_ID_ATHEROS, 0x3067), ATH_LED(3, 0) },
78 /* IBM-specific AR5212 (all others) */ 82 /* IBM-specific AR5212 (all others) */
79 { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5212_IBM), ATH_LED(0, 0) }, 83 { PCI_VDEVICE(ATHEROS, PCI_DEVICE_ID_ATHEROS_AR5212_IBM), ATH_LED(0, 0) },
84 /* Dell Vostro A860 (shahar@shahar-or.co.il) */
85 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0112), ATH_LED(3, 0) },
80 { } 86 { }
81}; 87};
82 88
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c
index 2942f13c9c4a..aefe84f9c04b 100644
--- a/drivers/net/wireless/ath/ath5k/pcu.c
+++ b/drivers/net/wireless/ath/ath5k/pcu.c
@@ -24,6 +24,8 @@
24* Protocol Control Unit Functions * 24* Protocol Control Unit Functions *
25\*********************************/ 25\*********************************/
26 26
27#include <asm/unaligned.h>
28
27#include "ath5k.h" 29#include "ath5k.h"
28#include "reg.h" 30#include "reg.h"
29#include "debug.h" 31#include "debug.h"
@@ -44,6 +46,7 @@
44 */ 46 */
45int ath5k_hw_set_opmode(struct ath5k_hw *ah) 47int ath5k_hw_set_opmode(struct ath5k_hw *ah)
46{ 48{
49 struct ath_common *common = ath5k_hw_common(ah);
47 u32 pcu_reg, beacon_reg, low_id, high_id; 50 u32 pcu_reg, beacon_reg, low_id, high_id;
48 51
49 52
@@ -95,8 +98,8 @@ int ath5k_hw_set_opmode(struct ath5k_hw *ah)
95 /* 98 /*
96 * Set PCU registers 99 * Set PCU registers
97 */ 100 */
98 low_id = AR5K_LOW_ID(ah->ah_sta_id); 101 low_id = get_unaligned_le32(common->macaddr);
99 high_id = AR5K_HIGH_ID(ah->ah_sta_id); 102 high_id = get_unaligned_le16(common->macaddr + 4);
100 ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0); 103 ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);
101 ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1); 104 ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
102 105
@@ -184,8 +187,8 @@ unsigned int ath5k_hw_get_ack_timeout(struct ath5k_hw *ah)
184{ 187{
185 ATH5K_TRACE(ah->ah_sc); 188 ATH5K_TRACE(ah->ah_sc);
186 189
187 return ath5k_hw_clocktoh(AR5K_REG_MS(ath5k_hw_reg_read(ah, 190 return ath5k_hw_clocktoh(ah, AR5K_REG_MS(ath5k_hw_reg_read(ah,
188 AR5K_TIME_OUT), AR5K_TIME_OUT_ACK), ah->ah_turbo); 191 AR5K_TIME_OUT), AR5K_TIME_OUT_ACK));
189} 192}
190 193
191/** 194/**
@@ -197,12 +200,12 @@ unsigned int ath5k_hw_get_ack_timeout(struct ath5k_hw *ah)
197int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout) 200int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout)
198{ 201{
199 ATH5K_TRACE(ah->ah_sc); 202 ATH5K_TRACE(ah->ah_sc);
200 if (ath5k_hw_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_ACK), 203 if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_ACK))
201 ah->ah_turbo) <= timeout) 204 <= timeout)
202 return -EINVAL; 205 return -EINVAL;
203 206
204 AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK, 207 AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_ACK,
205 ath5k_hw_htoclock(timeout, ah->ah_turbo)); 208 ath5k_hw_htoclock(ah, timeout));
206 209
207 return 0; 210 return 0;
208} 211}
@@ -215,8 +218,8 @@ int ath5k_hw_set_ack_timeout(struct ath5k_hw *ah, unsigned int timeout)
215unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah) 218unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah)
216{ 219{
217 ATH5K_TRACE(ah->ah_sc); 220 ATH5K_TRACE(ah->ah_sc);
218 return ath5k_hw_clocktoh(AR5K_REG_MS(ath5k_hw_reg_read(ah, 221 return ath5k_hw_clocktoh(ah, AR5K_REG_MS(ath5k_hw_reg_read(ah,
219 AR5K_TIME_OUT), AR5K_TIME_OUT_CTS), ah->ah_turbo); 222 AR5K_TIME_OUT), AR5K_TIME_OUT_CTS));
220} 223}
221 224
222/** 225/**
@@ -228,36 +231,94 @@ unsigned int ath5k_hw_get_cts_timeout(struct ath5k_hw *ah)
228int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout) 231int ath5k_hw_set_cts_timeout(struct ath5k_hw *ah, unsigned int timeout)
229{ 232{
230 ATH5K_TRACE(ah->ah_sc); 233 ATH5K_TRACE(ah->ah_sc);
231 if (ath5k_hw_clocktoh(AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_CTS), 234 if (ath5k_hw_clocktoh(ah, AR5K_REG_MS(0xffffffff, AR5K_TIME_OUT_CTS))
232 ah->ah_turbo) <= timeout) 235 <= timeout)
233 return -EINVAL; 236 return -EINVAL;
234 237
235 AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS, 238 AR5K_REG_WRITE_BITS(ah, AR5K_TIME_OUT, AR5K_TIME_OUT_CTS,
236 ath5k_hw_htoclock(timeout, ah->ah_turbo)); 239 ath5k_hw_htoclock(ah, timeout));
237 240
238 return 0; 241 return 0;
239} 242}
240 243
244/**
245 * ath5k_hw_htoclock - Translate usec to hw clock units
246 *
247 * @ah: The &struct ath5k_hw
248 * @usec: value in microseconds
249 */
250unsigned int ath5k_hw_htoclock(struct ath5k_hw *ah, unsigned int usec)
251{
252 return usec * ath5k_hw_get_clockrate(ah);
253}
241 254
242/****************\ 255/**
243* BSSID handling * 256 * ath5k_hw_clocktoh - Translate hw clock units to usec
244\****************/ 257 * @clock: value in hw clock units
258 */
259unsigned int ath5k_hw_clocktoh(struct ath5k_hw *ah, unsigned int clock)
260{
261 return clock / ath5k_hw_get_clockrate(ah);
262}
245 263
246/** 264/**
247 * ath5k_hw_get_lladdr - Get station id 265 * ath5k_hw_get_clockrate - Get the clock rate for current mode
248 * 266 *
249 * @ah: The &struct ath5k_hw 267 * @ah: The &struct ath5k_hw
250 * @mac: The card's mac address 268 */
269unsigned int ath5k_hw_get_clockrate(struct ath5k_hw *ah)
270{
271 struct ieee80211_channel *channel = ah->ah_current_channel;
272 int clock;
273
274 if (channel->hw_value & CHANNEL_5GHZ)
275 clock = 40; /* 802.11a */
276 else if (channel->hw_value & CHANNEL_CCK)
277 clock = 22; /* 802.11b */
278 else
279 clock = 44; /* 802.11g */
280
281 /* Clock rate in turbo modes is twice the normal rate */
282 if (channel->hw_value & CHANNEL_TURBO)
283 clock *= 2;
284
285 return clock;
286}
287
288/**
289 * ath5k_hw_get_default_slottime - Get the default slot time for current mode
251 * 290 *
252 * Initialize ah->ah_sta_id using the mac address provided 291 * @ah: The &struct ath5k_hw
253 * (just a memcpy). 292 */
293unsigned int ath5k_hw_get_default_slottime(struct ath5k_hw *ah)
294{
295 struct ieee80211_channel *channel = ah->ah_current_channel;
296
297 if (channel->hw_value & CHANNEL_TURBO)
298 return 6; /* both turbo modes */
299
300 if (channel->hw_value & CHANNEL_CCK)
301 return 20; /* 802.11b */
302
303 return 9; /* 802.11 a/g */
304}
305
306/**
307 * ath5k_hw_get_default_sifs - Get the default SIFS for current mode
254 * 308 *
255 * TODO: Remove it once we merge ath5k_softc and ath5k_hw 309 * @ah: The &struct ath5k_hw
256 */ 310 */
257void ath5k_hw_get_lladdr(struct ath5k_hw *ah, u8 *mac) 311unsigned int ath5k_hw_get_default_sifs(struct ath5k_hw *ah)
258{ 312{
259 ATH5K_TRACE(ah->ah_sc); 313 struct ieee80211_channel *channel = ah->ah_current_channel;
260 memcpy(mac, ah->ah_sta_id, ETH_ALEN); 314
315 if (channel->hw_value & CHANNEL_TURBO)
316 return 8; /* both turbo modes */
317
318 if (channel->hw_value & CHANNEL_5GHZ)
319 return 16; /* 802.11a */
320
321 return 10; /* 802.11 b/g */
261} 322}
262 323
263/** 324/**
@@ -270,17 +331,18 @@ void ath5k_hw_get_lladdr(struct ath5k_hw *ah, u8 *mac)
270 */ 331 */
271int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac) 332int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
272{ 333{
334 struct ath_common *common = ath5k_hw_common(ah);
273 u32 low_id, high_id; 335 u32 low_id, high_id;
274 u32 pcu_reg; 336 u32 pcu_reg;
275 337
276 ATH5K_TRACE(ah->ah_sc); 338 ATH5K_TRACE(ah->ah_sc);
277 /* Set new station ID */ 339 /* Set new station ID */
278 memcpy(ah->ah_sta_id, mac, ETH_ALEN); 340 memcpy(common->macaddr, mac, ETH_ALEN);
279 341
280 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000; 342 pcu_reg = ath5k_hw_reg_read(ah, AR5K_STA_ID1) & 0xffff0000;
281 343
282 low_id = AR5K_LOW_ID(mac); 344 low_id = get_unaligned_le32(mac);
283 high_id = AR5K_HIGH_ID(mac); 345 high_id = get_unaligned_le16(mac + 4);
284 346
285 ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0); 347 ath5k_hw_reg_write(ah, low_id, AR5K_STA_ID0);
286 ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1); 348 ath5k_hw_reg_write(ah, pcu_reg | high_id, AR5K_STA_ID1);
@@ -297,159 +359,51 @@ int ath5k_hw_set_lladdr(struct ath5k_hw *ah, const u8 *mac)
297 * 359 *
298 * Sets the BSSID which trigers the "SME Join" operation 360 * Sets the BSSID which trigers the "SME Join" operation
299 */ 361 */
300void ath5k_hw_set_associd(struct ath5k_hw *ah, const u8 *bssid, u16 assoc_id) 362void ath5k_hw_set_associd(struct ath5k_hw *ah)
301{ 363{
302 u32 low_id, high_id; 364 struct ath_common *common = ath5k_hw_common(ah);
303 u16 tim_offset = 0; 365 u16 tim_offset = 0;
304 366
305 /* 367 /*
306 * Set simple BSSID mask on 5212 368 * Set simple BSSID mask on 5212
307 */ 369 */
308 if (ah->ah_version == AR5K_AR5212) { 370 if (ah->ah_version == AR5K_AR5212)
309 ath5k_hw_reg_write(ah, AR5K_LOW_ID(ah->ah_bssid_mask), 371 ath_hw_setbssidmask(common);
310 AR5K_BSS_IDM0);
311 ath5k_hw_reg_write(ah, AR5K_HIGH_ID(ah->ah_bssid_mask),
312 AR5K_BSS_IDM1);
313 }
314 372
315 /* 373 /*
316 * Set BSSID which triggers the "SME Join" operation 374 * Set BSSID which triggers the "SME Join" operation
317 */ 375 */
318 low_id = AR5K_LOW_ID(bssid); 376 ath5k_hw_reg_write(ah,
319 high_id = AR5K_HIGH_ID(bssid); 377 get_unaligned_le32(common->curbssid),
320 ath5k_hw_reg_write(ah, low_id, AR5K_BSS_ID0); 378 AR5K_BSS_ID0);
321 ath5k_hw_reg_write(ah, high_id | ((assoc_id & 0x3fff) << 379 ath5k_hw_reg_write(ah,
322 AR5K_BSS_ID1_AID_S), AR5K_BSS_ID1); 380 get_unaligned_le16(common->curbssid + 4) |
323 381 ((common->curaid & 0x3fff) << AR5K_BSS_ID1_AID_S),
324 if (assoc_id == 0) { 382 AR5K_BSS_ID1);
383
384 if (common->curaid == 0) {
325 ath5k_hw_disable_pspoll(ah); 385 ath5k_hw_disable_pspoll(ah);
326 return; 386 return;
327 } 387 }
328 388
329 AR5K_REG_WRITE_BITS(ah, AR5K_BEACON, AR5K_BEACON_TIM, 389 AR5K_REG_WRITE_BITS(ah, AR5K_BEACON, AR5K_BEACON_TIM,
330 tim_offset ? tim_offset + 4 : 0); 390 tim_offset ? tim_offset + 4 : 0);
331 391
332 ath5k_hw_enable_pspoll(ah, NULL, 0); 392 ath5k_hw_enable_pspoll(ah, NULL, 0);
333} 393}
334 394
335/** 395void ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
336 * ath5k_hw_set_bssid_mask - filter out bssids we listen
337 *
338 * @ah: the &struct ath5k_hw
339 * @mask: the bssid_mask, a u8 array of size ETH_ALEN
340 *
341 * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
342 * which bits of the interface's MAC address should be looked at when trying
343 * to decide which packets to ACK. In station mode and AP mode with a single
344 * BSS every bit matters since we lock to only one BSS. In AP mode with
345 * multiple BSSes (virtual interfaces) not every bit matters because hw must
346 * accept frames for all BSSes and so we tweak some bits of our mac address
347 * in order to have multiple BSSes.
348 *
349 * NOTE: This is a simple filter and does *not* filter out all
350 * relevant frames. Some frames that are not for us might get ACKed from us
351 * by PCU because they just match the mask.
352 *
353 * When handling multiple BSSes you can get the BSSID mask by computing the
354 * set of ~ ( MAC XOR BSSID ) for all bssids we handle.
355 *
356 * When you do this you are essentially computing the common bits of all your
357 * BSSes. Later it is assumed the harware will "and" (&) the BSSID mask with
358 * the MAC address to obtain the relevant bits and compare the result with
359 * (frame's BSSID & mask) to see if they match.
360 */
361/*
362 * Simple example: on your card you have have two BSSes you have created with
363 * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
364 * There is another BSSID-03 but you are not part of it. For simplicity's sake,
365 * assuming only 4 bits for a mac address and for BSSIDs you can then have:
366 *
367 * \
368 * MAC: 0001 |
369 * BSSID-01: 0100 | --> Belongs to us
370 * BSSID-02: 1001 |
371 * /
372 * -------------------
373 * BSSID-03: 0110 | --> External
374 * -------------------
375 *
376 * Our bssid_mask would then be:
377 *
378 * On loop iteration for BSSID-01:
379 * ~(0001 ^ 0100) -> ~(0101)
380 * -> 1010
381 * bssid_mask = 1010
382 *
383 * On loop iteration for BSSID-02:
384 * bssid_mask &= ~(0001 ^ 1001)
385 * bssid_mask = (1010) & ~(0001 ^ 1001)
386 * bssid_mask = (1010) & ~(1001)
387 * bssid_mask = (1010) & (0110)
388 * bssid_mask = 0010
389 *
390 * A bssid_mask of 0010 means "only pay attention to the second least
391 * significant bit". This is because its the only bit common
392 * amongst the MAC and all BSSIDs we support. To findout what the real
393 * common bit is we can simply "&" the bssid_mask now with any BSSID we have
394 * or our MAC address (we assume the hardware uses the MAC address).
395 *
396 * Now, suppose there's an incoming frame for BSSID-03:
397 *
398 * IFRAME-01: 0110
399 *
400 * An easy eye-inspeciton of this already should tell you that this frame
401 * will not pass our check. This is beacuse the bssid_mask tells the
402 * hardware to only look at the second least significant bit and the
403 * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
404 * as 1, which does not match 0.
405 *
406 * So with IFRAME-01 we *assume* the hardware will do:
407 *
408 * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
409 * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
410 * --> allow = (0010) == 0000 ? 1 : 0;
411 * --> allow = 0
412 *
413 * Lets now test a frame that should work:
414 *
415 * IFRAME-02: 0001 (we should allow)
416 *
417 * allow = (0001 & 1010) == 1010
418 *
419 * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
420 * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
421 * --> allow = (0010) == (0010)
422 * --> allow = 1
423 *
424 * Other examples:
425 *
426 * IFRAME-03: 0100 --> allowed
427 * IFRAME-04: 1001 --> allowed
428 * IFRAME-05: 1101 --> allowed but its not for us!!!
429 *
430 */
431int ath5k_hw_set_bssid_mask(struct ath5k_hw *ah, const u8 *mask)
432{ 396{
433 u32 low_id, high_id; 397 struct ath_common *common = ath5k_hw_common(ah);
434 ATH5K_TRACE(ah->ah_sc); 398 ATH5K_TRACE(ah->ah_sc);
435 399
436 /* Cache bssid mask so that we can restore it 400 /* Cache bssid mask so that we can restore it
437 * on reset */ 401 * on reset */
438 memcpy(ah->ah_bssid_mask, mask, ETH_ALEN); 402 memcpy(common->bssidmask, mask, ETH_ALEN);
439 if (ah->ah_version == AR5K_AR5212) { 403 if (ah->ah_version == AR5K_AR5212)
440 low_id = AR5K_LOW_ID(mask); 404 ath_hw_setbssidmask(common);
441 high_id = AR5K_HIGH_ID(mask);
442
443 ath5k_hw_reg_write(ah, low_id, AR5K_BSS_IDM0);
444 ath5k_hw_reg_write(ah, high_id, AR5K_BSS_IDM1);
445
446 return 0;
447 }
448
449 return -EIO;
450} 405}
451 406
452
453/************\ 407/************\
454* RX Control * 408* RX Control *
455\************/ 409\************/
@@ -1157,14 +1111,17 @@ int ath5k_hw_set_key_lladdr(struct ath5k_hw *ah, u16 entry, const u8 *mac)
1157 /* Invalid entry (key table overflow) */ 1111 /* Invalid entry (key table overflow) */
1158 AR5K_ASSERT_ENTRY(entry, AR5K_KEYTABLE_SIZE); 1112 AR5K_ASSERT_ENTRY(entry, AR5K_KEYTABLE_SIZE);
1159 1113
1160 /* MAC may be NULL if it's a broadcast key. In this case no need to 1114 /*
1161 * to compute AR5K_LOW_ID and AR5K_HIGH_ID as we already know it. */ 1115 * MAC may be NULL if it's a broadcast key. In this case no need to
1116 * to compute get_unaligned_le32 and get_unaligned_le16 as we
1117 * already know it.
1118 */
1162 if (!mac) { 1119 if (!mac) {
1163 low_id = 0xffffffff; 1120 low_id = 0xffffffff;
1164 high_id = 0xffff | AR5K_KEYTABLE_VALID; 1121 high_id = 0xffff | AR5K_KEYTABLE_VALID;
1165 } else { 1122 } else {
1166 low_id = AR5K_LOW_ID(mac); 1123 low_id = get_unaligned_le32(mac);
1167 high_id = AR5K_HIGH_ID(mac) | AR5K_KEYTABLE_VALID; 1124 high_id = get_unaligned_le16(mac + 4) | AR5K_KEYTABLE_VALID;
1168 } 1125 }
1169 1126
1170 ath5k_hw_reg_write(ah, low_id, AR5K_KEYTABLE_MAC0(entry)); 1127 ath5k_hw_reg_write(ah, low_id, AR5K_KEYTABLE_MAC0(entry));
@@ -1173,3 +1130,24 @@ int ath5k_hw_set_key_lladdr(struct ath5k_hw *ah, u16 entry, const u8 *mac)
1173 return 0; 1130 return 0;
1174} 1131}
1175 1132
1133/**
1134 * ath5k_hw_set_coverage_class - Set IEEE 802.11 coverage class
1135 *
1136 * @ah: The &struct ath5k_hw
1137 * @coverage_class: IEEE 802.11 coverage class number
1138 *
1139 * Sets slot time, ACK timeout and CTS timeout for given coverage class.
1140 */
1141void ath5k_hw_set_coverage_class(struct ath5k_hw *ah, u8 coverage_class)
1142{
1143 /* As defined by IEEE 802.11-2007 17.3.8.6 */
1144 int slot_time = ath5k_hw_get_default_slottime(ah) + 3 * coverage_class;
1145 int ack_timeout = ath5k_hw_get_default_sifs(ah) + slot_time;
1146 int cts_timeout = ack_timeout;
1147
1148 ath5k_hw_set_slot_time(ah, slot_time);
1149 ath5k_hw_set_ack_timeout(ah, ack_timeout);
1150 ath5k_hw_set_cts_timeout(ah, cts_timeout);
1151
1152 ah->ah_coverage_class = coverage_class;
1153}
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 1a039f2bd732..68e2bccd90d3 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -23,6 +23,7 @@
23#define _ATH5K_PHY 23#define _ATH5K_PHY
24 24
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/slab.h>
26 27
27#include "ath5k.h" 28#include "ath5k.h"
28#include "reg.h" 29#include "reg.h"
@@ -117,7 +118,7 @@ static unsigned int ath5k_hw_rfb_op(struct ath5k_hw *ah,
117 118
118/* 119/*
119 * This code is used to optimize rf gain on different environments 120 * This code is used to optimize rf gain on different environments
120 * (temprature mostly) based on feedback from a power detector. 121 * (temperature mostly) based on feedback from a power detector.
121 * 122 *
122 * It's only used on RF5111 and RF5112, later RF chips seem to have 123 * It's only used on RF5111 and RF5112, later RF chips seem to have
123 * auto adjustment on hw -notice they have a much smaller BANK 7 and 124 * auto adjustment on hw -notice they have a much smaller BANK 7 and
@@ -1124,77 +1125,148 @@ ath5k_hw_calibration_poll(struct ath5k_hw *ah)
1124 ah->ah_swi_mask = AR5K_SWI_FULL_CALIBRATION; 1125 ah->ah_swi_mask = AR5K_SWI_FULL_CALIBRATION;
1125 AR5K_REG_ENABLE_BITS(ah, AR5K_CR, AR5K_CR_SWI); 1126 AR5K_REG_ENABLE_BITS(ah, AR5K_CR, AR5K_CR_SWI);
1126 } 1127 }
1128}
1127 1129
1130static int sign_extend(int val, const int nbits)
1131{
1132 int order = BIT(nbits-1);
1133 return (val ^ order) - order;
1128} 1134}
1129 1135
1130/** 1136static s32 ath5k_hw_read_measured_noise_floor(struct ath5k_hw *ah)
1131 * ath5k_hw_noise_floor_calibration - perform PHY noise floor calibration 1137{
1132 * 1138 s32 val;
1133 * @ah: struct ath5k_hw pointer we are operating on 1139
1134 * @freq: the channel frequency, just used for error logging 1140 val = ath5k_hw_reg_read(ah, AR5K_PHY_NF);
1135 * 1141 return sign_extend(AR5K_REG_MS(val, AR5K_PHY_NF_MINCCA_PWR), 9);
1136 * This function performs a noise floor calibration of the PHY and waits for 1142}
1137 * it to complete. Then the noise floor value is compared to some maximum 1143
1138 * noise floor we consider valid. 1144void ath5k_hw_init_nfcal_hist(struct ath5k_hw *ah)
1139 * 1145{
1140 * Note that this is different from what the madwifi HAL does: it reads the 1146 int i;
1141 * noise floor and afterwards initiates the calibration. Since the noise floor 1147
1142 * calibration can take some time to finish, depending on the current channel 1148 ah->ah_nfcal_hist.index = 0;
1143 * use, that avoids the occasional timeout warnings we are seeing now. 1149 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++)
1144 * 1150 ah->ah_nfcal_hist.nfval[i] = AR5K_TUNE_CCA_MAX_GOOD_VALUE;
1145 * See the following link for an Atheros patent on noise floor calibration: 1151}
1146 * http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO1&Sect2=HITOFF&d=PALL \ 1152
1147 * &p=1&u=%2Fnetahtml%2FPTO%2Fsrchnum.htm&r=1&f=G&l=50&s1=7245893.PN.&OS=PN/7 1153static void ath5k_hw_update_nfcal_hist(struct ath5k_hw *ah, s16 noise_floor)
1154{
1155 struct ath5k_nfcal_hist *hist = &ah->ah_nfcal_hist;
1156 hist->index = (hist->index + 1) & (ATH5K_NF_CAL_HIST_MAX-1);
1157 hist->nfval[hist->index] = noise_floor;
1158}
1159
1160static s16 ath5k_hw_get_median_noise_floor(struct ath5k_hw *ah)
1161{
1162 s16 sort[ATH5K_NF_CAL_HIST_MAX];
1163 s16 tmp;
1164 int i, j;
1165
1166 memcpy(sort, ah->ah_nfcal_hist.nfval, sizeof(sort));
1167 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX - 1; i++) {
1168 for (j = 1; j < ATH5K_NF_CAL_HIST_MAX - i; j++) {
1169 if (sort[j] > sort[j-1]) {
1170 tmp = sort[j];
1171 sort[j] = sort[j-1];
1172 sort[j-1] = tmp;
1173 }
1174 }
1175 }
1176 for (i = 0; i < ATH5K_NF_CAL_HIST_MAX; i++) {
1177 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1178 "cal %d:%d\n", i, sort[i]);
1179 }
1180 return sort[(ATH5K_NF_CAL_HIST_MAX-1) / 2];
1181}
1182
1183/*
1184 * When we tell the hardware to perform a noise floor calibration
1185 * by setting the AR5K_PHY_AGCCTL_NF bit, it will periodically
1186 * sample-and-hold the minimum noise level seen at the antennas.
1187 * This value is then stored in a ring buffer of recently measured
1188 * noise floor values so we have a moving window of the last few
1189 * samples.
1148 * 1190 *
1149 * XXX: Since during noise floor calibration antennas are detached according to 1191 * The median of the values in the history is then loaded into the
1150 * the patent, we should stop tx queues here. 1192 * hardware for its own use for RSSI and CCA measurements.
1151 */ 1193 */
1152int 1194void ath5k_hw_update_noise_floor(struct ath5k_hw *ah)
1153ath5k_hw_noise_floor_calibration(struct ath5k_hw *ah, short freq)
1154{ 1195{
1155 int ret; 1196 struct ath5k_eeprom_info *ee = &ah->ah_capabilities.cap_eeprom;
1156 unsigned int i; 1197 u32 val;
1157 s32 noise_floor; 1198 s16 nf, threshold;
1199 u8 ee_mode;
1158 1200
1159 /* 1201 /* keep last value if calibration hasn't completed */
1160 * Enable noise floor calibration 1202 if (ath5k_hw_reg_read(ah, AR5K_PHY_AGCCTL) & AR5K_PHY_AGCCTL_NF) {
1161 */ 1203 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1162 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, 1204 "NF did not complete in calibration window\n");
1163 AR5K_PHY_AGCCTL_NF);
1164 1205
1165 ret = ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, 1206 return;
1166 AR5K_PHY_AGCCTL_NF, 0, false);
1167 if (ret) {
1168 ATH5K_ERR(ah->ah_sc,
1169 "noise floor calibration timeout (%uMHz)\n", freq);
1170 return -EAGAIN;
1171 } 1207 }
1172 1208
1173 /* Wait until the noise floor is calibrated and read the value */ 1209 switch (ah->ah_current_channel->hw_value & CHANNEL_MODES) {
1174 for (i = 20; i > 0; i--) { 1210 case CHANNEL_A:
1175 mdelay(1); 1211 case CHANNEL_T:
1176 noise_floor = ath5k_hw_reg_read(ah, AR5K_PHY_NF); 1212 case CHANNEL_XR:
1177 noise_floor = AR5K_PHY_NF_RVAL(noise_floor); 1213 ee_mode = AR5K_EEPROM_MODE_11A;
1178 if (noise_floor & AR5K_PHY_NF_ACTIVE) { 1214 break;
1179 noise_floor = AR5K_PHY_NF_AVAL(noise_floor); 1215 case CHANNEL_G:
1180 1216 case CHANNEL_TG:
1181 if (noise_floor <= AR5K_TUNE_NOISE_FLOOR) 1217 ee_mode = AR5K_EEPROM_MODE_11G;
1182 break; 1218 break;
1183 } 1219 default:
1220 case CHANNEL_B:
1221 ee_mode = AR5K_EEPROM_MODE_11B;
1222 break;
1184 } 1223 }
1185 1224
1186 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1187 "noise floor %d\n", noise_floor);
1188 1225
1189 if (noise_floor > AR5K_TUNE_NOISE_FLOOR) { 1226 /* completed NF calibration, test threshold */
1190 ATH5K_ERR(ah->ah_sc, 1227 nf = ath5k_hw_read_measured_noise_floor(ah);
1191 "noise floor calibration failed (%uMHz)\n", freq); 1228 threshold = ee->ee_noise_floor_thr[ee_mode];
1192 return -EAGAIN; 1229
1230 if (nf > threshold) {
1231 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1232 "noise floor failure detected; "
1233 "read %d, threshold %d\n",
1234 nf, threshold);
1235
1236 nf = AR5K_TUNE_CCA_MAX_GOOD_VALUE;
1193 } 1237 }
1194 1238
1195 ah->ah_noise_floor = noise_floor; 1239 ath5k_hw_update_nfcal_hist(ah, nf);
1240 nf = ath5k_hw_get_median_noise_floor(ah);
1196 1241
1197 return 0; 1242 /* load noise floor (in .5 dBm) so the hardware will use it */
1243 val = ath5k_hw_reg_read(ah, AR5K_PHY_NF) & ~AR5K_PHY_NF_M;
1244 val |= (nf * 2) & AR5K_PHY_NF_M;
1245 ath5k_hw_reg_write(ah, val, AR5K_PHY_NF);
1246
1247 AR5K_REG_MASKED_BITS(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF,
1248 ~(AR5K_PHY_AGCCTL_NF_EN | AR5K_PHY_AGCCTL_NF_NOUPDATE));
1249
1250 ath5k_hw_register_timeout(ah, AR5K_PHY_AGCCTL, AR5K_PHY_AGCCTL_NF,
1251 0, false);
1252
1253 /*
1254 * Load a high max CCA Power value (-50 dBm in .5 dBm units)
1255 * so that we're not capped by the median we just loaded.
1256 * This will be used as the initial value for the next noise
1257 * floor calibration.
1258 */
1259 val = (val & ~AR5K_PHY_NF_M) | ((-50 * 2) & AR5K_PHY_NF_M);
1260 ath5k_hw_reg_write(ah, val, AR5K_PHY_NF);
1261 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
1262 AR5K_PHY_AGCCTL_NF_EN |
1263 AR5K_PHY_AGCCTL_NF_NOUPDATE |
1264 AR5K_PHY_AGCCTL_NF);
1265
1266 ah->ah_noise_floor = nf;
1267
1268 ATH5K_DBG(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1269 "noise floor calibrated: %d\n", nf);
1198} 1270}
1199 1271
1200/* 1272/*
@@ -1287,7 +1359,7 @@ static int ath5k_hw_rf5110_calibrate(struct ath5k_hw *ah,
1287 return ret; 1359 return ret;
1288 } 1360 }
1289 1361
1290 ath5k_hw_noise_floor_calibration(ah, channel->center_freq); 1362 ath5k_hw_update_noise_floor(ah);
1291 1363
1292 /* 1364 /*
1293 * Re-enable RX/TX and beacons 1365 * Re-enable RX/TX and beacons
@@ -1315,38 +1387,39 @@ static int ath5k_hw_rf511x_calibrate(struct ath5k_hw *ah,
1315 goto done; 1387 goto done;
1316 1388
1317 /* Calibration has finished, get the results and re-run */ 1389 /* Calibration has finished, get the results and re-run */
1390
1391 /* work around empty results which can apparently happen on 5212 */
1318 for (i = 0; i <= 10; i++) { 1392 for (i = 0; i <= 10; i++) {
1319 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR); 1393 iq_corr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_CORR);
1320 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I); 1394 i_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_I);
1321 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q); 1395 q_pwr = ath5k_hw_reg_read(ah, AR5K_PHY_IQRES_CAL_PWR_Q);
1396 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1397 "iq_corr:%x i_pwr:%x q_pwr:%x", iq_corr, i_pwr, q_pwr);
1398 if (i_pwr && q_pwr)
1399 break;
1322 } 1400 }
1323 1401
1324 i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7; 1402 i_coffd = ((i_pwr >> 1) + (q_pwr >> 1)) >> 7;
1325 q_coffd = q_pwr >> 7; 1403 q_coffd = q_pwr >> 7;
1326 1404
1327 /* No correction */ 1405 /* protect against divide by 0 and loss of sign bits */
1328 if (i_coffd == 0 || q_coffd == 0) 1406 if (i_coffd == 0 || q_coffd < 2)
1329 goto done; 1407 goto done;
1330 1408
1331 i_coff = ((-iq_corr) / i_coffd) & 0x3f; 1409 i_coff = (-iq_corr) / i_coffd;
1410 i_coff = clamp(i_coff, -32, 31); /* signed 6 bit */
1332 1411
1333 /* Boundary check */ 1412 q_coff = (i_pwr / q_coffd) - 128;
1334 if (i_coff > 31) 1413 q_coff = clamp(q_coff, -16, 15); /* signed 5 bit */
1335 i_coff = 31;
1336 if (i_coff < -32)
1337 i_coff = -32;
1338 1414
1339 q_coff = (((s32)i_pwr / q_coffd) - 128) & 0x1f; 1415 ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_CALIBRATE,
1340 1416 "new I:%d Q:%d (i_coffd:%x q_coffd:%x)",
1341 /* Boundary check */ 1417 i_coff, q_coff, i_coffd, q_coffd);
1342 if (q_coff > 15)
1343 q_coff = 15;
1344 if (q_coff < -16)
1345 q_coff = -16;
1346 1418
1347 /* Commit new I/Q value */ 1419 /* Commit new I/Q values (set enable bit last to match HAL sources) */
1348 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE | 1420 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF, i_coff);
1349 ((u32)q_coff) | ((u32)i_coff << AR5K_PHY_IQ_CORR_Q_I_COFF_S)); 1421 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF, q_coff);
1422 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE);
1350 1423
1351 /* Re-enable calibration -if we don't we'll commit 1424 /* Re-enable calibration -if we don't we'll commit
1352 * the same values again and again */ 1425 * the same values again and again */
@@ -1360,7 +1433,7 @@ done:
1360 * since noise floor calibration interrupts rx path while I/Q 1433 * since noise floor calibration interrupts rx path while I/Q
1361 * calibration doesn't. We don't need to run noise floor calibration 1434 * calibration doesn't. We don't need to run noise floor calibration
1362 * as often as I/Q calibration.*/ 1435 * as often as I/Q calibration.*/
1363 ath5k_hw_noise_floor_calibration(ah, channel->center_freq); 1436 ath5k_hw_update_noise_floor(ah);
1364 1437
1365 /* Initiate a gain_F calibration */ 1438 /* Initiate a gain_F calibration */
1366 ath5k_hw_request_rfgain_probe(ah); 1439 ath5k_hw_request_rfgain_probe(ah);
@@ -1802,7 +1875,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1802 break; 1875 break;
1803 case AR5K_ANTMODE_FIXED_A: 1876 case AR5K_ANTMODE_FIXED_A:
1804 def_ant = 1; 1877 def_ant = 1;
1805 tx_ant = 0; 1878 tx_ant = 1;
1806 use_def_for_tx = true; 1879 use_def_for_tx = true;
1807 update_def_on_tx = false; 1880 update_def_on_tx = false;
1808 use_def_for_rts = true; 1881 use_def_for_rts = true;
@@ -1811,7 +1884,7 @@ ath5k_hw_set_antenna_mode(struct ath5k_hw *ah, u8 ant_mode)
1811 break; 1884 break;
1812 case AR5K_ANTMODE_FIXED_B: 1885 case AR5K_ANTMODE_FIXED_B:
1813 def_ant = 2; 1886 def_ant = 2;
1814 tx_ant = 0; 1887 tx_ant = 2;
1815 use_def_for_tx = true; 1888 use_def_for_tx = true;
1816 update_def_on_tx = false; 1889 update_def_on_tx = false;
1817 use_def_for_rts = true; 1890 use_def_for_rts = true;
@@ -2675,7 +2748,7 @@ ath5k_setup_channel_powertable(struct ath5k_hw *ah,
2675 /* Fill curves in reverse order 2748 /* Fill curves in reverse order
2676 * from lower power (max gain) 2749 * from lower power (max gain)
2677 * to higher power. Use curve -> idx 2750 * to higher power. Use curve -> idx
2678 * backmaping we did on eeprom init */ 2751 * backmapping we did on eeprom init */
2679 u8 idx = pdg_curve_to_idx[pdg]; 2752 u8 idx = pdg_curve_to_idx[pdg];
2680 2753
2681 /* Grab the needed curves by index */ 2754 /* Grab the needed curves by index */
@@ -2777,7 +2850,7 @@ ath5k_setup_channel_powertable(struct ath5k_hw *ah,
2777 /* Now we have a set of curves for this 2850 /* Now we have a set of curves for this
2778 * channel on tmpL (x range is table_max - table_min 2851 * channel on tmpL (x range is table_max - table_min
2779 * and y values are tmpL[pdg][]) sorted in the same 2852 * and y values are tmpL[pdg][]) sorted in the same
2780 * order as EEPROM (because we've used the backmaping). 2853 * order as EEPROM (because we've used the backmapping).
2781 * So for RF5112 it's from higher power to lower power 2854 * So for RF5112 it's from higher power to lower power
2782 * and for RF2413 it's from lower power to higher power. 2855 * and for RF2413 it's from lower power to higher power.
2783 * For RF5111 we only have one curve. */ 2856 * For RF5111 we only have one curve. */
@@ -2954,8 +3027,6 @@ ath5k_hw_txpower(struct ath5k_hw *ah, struct ieee80211_channel *channel,
2954 ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower); 3027 ATH5K_ERR(ah->ah_sc, "invalid tx power: %u\n", txpower);
2955 return -EINVAL; 3028 return -EINVAL;
2956 } 3029 }
2957 if (txpower == 0)
2958 txpower = AR5K_TUNE_DEFAULT_TXPOWER;
2959 3030
2960 /* Reset TX power values */ 3031 /* Reset TX power values */
2961 memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower)); 3032 memset(&ah->ah_txpower, 0, sizeof(ah->ah_txpower));
diff --git a/drivers/net/wireless/ath/ath5k/qcu.c b/drivers/net/wireless/ath/ath5k/qcu.c
index eeebb9aef206..9122a8556f45 100644
--- a/drivers/net/wireless/ath/ath5k/qcu.c
+++ b/drivers/net/wireless/ath/ath5k/qcu.c
@@ -408,12 +408,13 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
408 break; 408 break;
409 409
410 case AR5K_TX_QUEUE_CAB: 410 case AR5K_TX_QUEUE_CAB:
411 /* XXX: use BCN_SENT_GT, if we can figure out how */
411 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue), 412 AR5K_REG_ENABLE_BITS(ah, AR5K_QUEUE_MISC(queue),
412 AR5K_QCU_MISC_FRSHED_BCN_SENT_GT | 413 AR5K_QCU_MISC_FRSHED_DBA_GT |
413 AR5K_QCU_MISC_CBREXP_DIS | 414 AR5K_QCU_MISC_CBREXP_DIS |
414 AR5K_QCU_MISC_CBREXP_BCN_DIS); 415 AR5K_QCU_MISC_CBREXP_BCN_DIS);
415 416
416 ath5k_hw_reg_write(ah, ((AR5K_TUNE_BEACON_INTERVAL - 417 ath5k_hw_reg_write(ah, ((tq->tqi_ready_time -
417 (AR5K_TUNE_SW_BEACON_RESP - 418 (AR5K_TUNE_SW_BEACON_RESP -
418 AR5K_TUNE_DMA_BEACON_RESP) - 419 AR5K_TUNE_DMA_BEACON_RESP) -
419 AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF) * 1024) | 420 AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF) * 1024) |
@@ -520,12 +521,16 @@ int ath5k_hw_reset_tx_queue(struct ath5k_hw *ah, unsigned int queue)
520 */ 521 */
521unsigned int ath5k_hw_get_slot_time(struct ath5k_hw *ah) 522unsigned int ath5k_hw_get_slot_time(struct ath5k_hw *ah)
522{ 523{
524 unsigned int slot_time_clock;
525
523 ATH5K_TRACE(ah->ah_sc); 526 ATH5K_TRACE(ah->ah_sc);
527
524 if (ah->ah_version == AR5K_AR5210) 528 if (ah->ah_version == AR5K_AR5210)
525 return ath5k_hw_clocktoh(ath5k_hw_reg_read(ah, 529 slot_time_clock = ath5k_hw_reg_read(ah, AR5K_SLOT_TIME);
526 AR5K_SLOT_TIME) & 0xffff, ah->ah_turbo);
527 else 530 else
528 return ath5k_hw_reg_read(ah, AR5K_DCU_GBL_IFS_SLOT) & 0xffff; 531 slot_time_clock = ath5k_hw_reg_read(ah, AR5K_DCU_GBL_IFS_SLOT);
532
533 return ath5k_hw_clocktoh(ah, slot_time_clock & 0xffff);
529} 534}
530 535
531/* 536/*
@@ -533,15 +538,17 @@ unsigned int ath5k_hw_get_slot_time(struct ath5k_hw *ah)
533 */ 538 */
534int ath5k_hw_set_slot_time(struct ath5k_hw *ah, unsigned int slot_time) 539int ath5k_hw_set_slot_time(struct ath5k_hw *ah, unsigned int slot_time)
535{ 540{
541 u32 slot_time_clock = ath5k_hw_htoclock(ah, slot_time);
542
536 ATH5K_TRACE(ah->ah_sc); 543 ATH5K_TRACE(ah->ah_sc);
537 if (slot_time < AR5K_SLOT_TIME_9 || slot_time > AR5K_SLOT_TIME_MAX) 544
545 if (slot_time < 6 || slot_time_clock > AR5K_SLOT_TIME_MAX)
538 return -EINVAL; 546 return -EINVAL;
539 547
540 if (ah->ah_version == AR5K_AR5210) 548 if (ah->ah_version == AR5K_AR5210)
541 ath5k_hw_reg_write(ah, ath5k_hw_htoclock(slot_time, 549 ath5k_hw_reg_write(ah, slot_time_clock, AR5K_SLOT_TIME);
542 ah->ah_turbo), AR5K_SLOT_TIME);
543 else 550 else
544 ath5k_hw_reg_write(ah, slot_time, AR5K_DCU_GBL_IFS_SLOT); 551 ath5k_hw_reg_write(ah, slot_time_clock, AR5K_DCU_GBL_IFS_SLOT);
545 552
546 return 0; 553 return 0;
547} 554}
diff --git a/drivers/net/wireless/ath/ath5k/reg.h b/drivers/net/wireless/ath/ath5k/reg.h
index c63ea6afd96f..1464f89b249c 100644
--- a/drivers/net/wireless/ath/ath5k/reg.h
+++ b/drivers/net/wireless/ath/ath5k/reg.h
@@ -35,7 +35,7 @@
35 * released by Atheros and on various debug messages found on the net. 35 * released by Atheros and on various debug messages found on the net.
36 */ 36 */
37 37
38 38#include "../reg.h"
39 39
40/*====MAC DMA REGISTERS====*/ 40/*====MAC DMA REGISTERS====*/
41 41
@@ -1650,12 +1650,6 @@
1650#define AR5K_SLEEP2_DTIM_PER_S 16 1650#define AR5K_SLEEP2_DTIM_PER_S 16
1651 1651
1652/* 1652/*
1653 * BSSID mask registers
1654 */
1655#define AR5K_BSS_IDM0 0x80e0 /* Upper bits */
1656#define AR5K_BSS_IDM1 0x80e4 /* Lower bits */
1657
1658/*
1659 * TX power control (TPC) register 1653 * TX power control (TPC) register
1660 * 1654 *
1661 * XXX: PCDAC steps (0.5dbm) or DBM ? 1655 * XXX: PCDAC steps (0.5dbm) or DBM ?
@@ -2039,17 +2033,14 @@
2039#define AR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 /* Don't update nf automaticaly */ 2033#define AR5K_PHY_AGCCTL_NF_NOUPDATE 0x00020000 /* Don't update nf automaticaly */
2040 2034
2041/* 2035/*
2042 * PHY noise floor status register 2036 * PHY noise floor status register (CCA = Clear Channel Assessment)
2043 */ 2037 */
2044#define AR5K_PHY_NF 0x9864 /* Register address */ 2038#define AR5K_PHY_NF 0x9864 /* Register address */
2045#define AR5K_PHY_NF_M 0x000001ff /* Noise floor mask */ 2039#define AR5K_PHY_NF_M 0x000001ff /* Noise floor, written to hardware in 1/2 dBm units */
2046#define AR5K_PHY_NF_ACTIVE 0x00000100 /* Noise floor calibration still active */ 2040#define AR5K_PHY_NF_SVAL(_n) (((_n) & AR5K_PHY_NF_M) | (1 << 9))
2047#define AR5K_PHY_NF_RVAL(_n) (((_n) >> 19) & AR5K_PHY_NF_M)
2048#define AR5K_PHY_NF_AVAL(_n) (-((_n) ^ AR5K_PHY_NF_M) + 1)
2049#define AR5K_PHY_NF_SVAL(_n) (((_n) & AR5K_PHY_NF_M) | (1 << 9))
2050#define AR5K_PHY_NF_THRESH62 0x0007f000 /* Thresh62 -check ANI patent- (field) */ 2041#define AR5K_PHY_NF_THRESH62 0x0007f000 /* Thresh62 -check ANI patent- (field) */
2051#define AR5K_PHY_NF_THRESH62_S 12 2042#define AR5K_PHY_NF_THRESH62_S 12
2052#define AR5K_PHY_NF_MINCCA_PWR 0x0ff80000 /* ??? */ 2043#define AR5K_PHY_NF_MINCCA_PWR 0x0ff80000 /* Minimum measured noise level, read from hardware in 1 dBm units */
2053#define AR5K_PHY_NF_MINCCA_PWR_S 19 2044#define AR5K_PHY_NF_MINCCA_PWR_S 19
2054 2045
2055/* 2046/*
@@ -2196,6 +2187,7 @@
2196 */ 2187 */
2197#define AR5K_PHY_IQ 0x9920 /* Register Address */ 2188#define AR5K_PHY_IQ 0x9920 /* Register Address */
2198#define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */ 2189#define AR5K_PHY_IQ_CORR_Q_Q_COFF 0x0000001f /* Mask for q correction info */
2190#define AR5K_PHY_IQ_CORR_Q_Q_COFF_S 0
2199#define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */ 2191#define AR5K_PHY_IQ_CORR_Q_I_COFF 0x000007e0 /* Mask for i correction info */
2200#define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5 2192#define AR5K_PHY_IQ_CORR_Q_I_COFF_S 5
2201#define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */ 2193#define AR5K_PHY_IQ_CORR_ENABLE 0x00000800 /* Enable i/q correction */
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c
index 34e13c700849..cbf28e379843 100644
--- a/drivers/net/wireless/ath/ath5k/reset.c
+++ b/drivers/net/wireless/ath/ath5k/reset.c
@@ -25,6 +25,8 @@
25 Reset functions and helpers 25 Reset functions and helpers
26\*****************************/ 26\*****************************/
27 27
28#include <asm/unaligned.h>
29
28#include <linux/pci.h> /* To determine if a card is pci-e */ 30#include <linux/pci.h> /* To determine if a card is pci-e */
29#include <linux/log2.h> 31#include <linux/log2.h>
30#include "ath5k.h" 32#include "ath5k.h"
@@ -58,12 +60,11 @@ static inline int ath5k_hw_write_ofdm_timings(struct ath5k_hw *ah,
58 !(channel->hw_value & CHANNEL_OFDM)); 60 !(channel->hw_value & CHANNEL_OFDM));
59 61
60 /* Get coefficient 62 /* Get coefficient
61 * ALGO: coef = (5 * clock * carrier_freq) / 2) 63 * ALGO: coef = (5 * clock / carrier_freq) / 2
62 * we scale coef by shifting clock value by 24 for 64 * we scale coef by shifting clock value by 24 for
63 * better precision since we use integers */ 65 * better precision since we use integers */
64 /* TODO: Half/quarter rate */ 66 /* TODO: Half/quarter rate */
65 clock = ath5k_hw_htoclock(1, channel->hw_value & CHANNEL_TURBO); 67 clock = (channel->hw_value & CHANNEL_TURBO) ? 80 : 40;
66
67 coef_scaled = ((5 * (clock << 24)) / 2) / channel->center_freq; 68 coef_scaled = ((5 * (clock << 24)) / 2) / channel->center_freq;
68 69
69 /* Get exponent 70 /* Get exponent
@@ -850,12 +851,15 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
850 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1, 851 AR5K_PHY_OFDM_SELFCORR_CYPWR_THR1,
851 AR5K_INIT_CYCRSSI_THR1); 852 AR5K_INIT_CYCRSSI_THR1);
852 853
853 /* I/Q correction 854 /* I/Q correction (set enable bit last to match HAL sources) */
854 * TODO: Per channel i/q infos ? */ 855 /* TODO: Per channel i/q infos ? */
855 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, 856 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_4_0) {
856 AR5K_PHY_IQ_CORR_ENABLE | 857 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_I_COFF,
857 (ee->ee_i_cal[ee_mode] << AR5K_PHY_IQ_CORR_Q_I_COFF_S) | 858 ee->ee_i_cal[ee_mode]);
858 ee->ee_q_cal[ee_mode]); 859 AR5K_REG_WRITE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_Q_Q_COFF,
860 ee->ee_q_cal[ee_mode]);
861 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_IQ, AR5K_PHY_IQ_CORR_ENABLE);
862 }
859 863
860 /* Heavy clipping -disable for now */ 864 /* Heavy clipping -disable for now */
861 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_5_1) 865 if (ah->ah_ee_version >= AR5K_EEPROM_VERSION_5_1)
@@ -870,6 +874,7 @@ static void ath5k_hw_commit_eeprom_settings(struct ath5k_hw *ah,
870int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode, 874int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
871 struct ieee80211_channel *channel, bool change_channel) 875 struct ieee80211_channel *channel, bool change_channel)
872{ 876{
877 struct ath_common *common = ath5k_hw_common(ah);
873 u32 s_seq[10], s_ant, s_led[3], staid1_flags, tsf_up, tsf_lo; 878 u32 s_seq[10], s_ant, s_led[3], staid1_flags, tsf_up, tsf_lo;
874 u32 phy_tst1; 879 u32 phy_tst1;
875 u8 mode, freq, ee_mode, ant[2]; 880 u8 mode, freq, ee_mode, ant[2];
@@ -1171,10 +1176,12 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1171 ath5k_hw_reg_write(ah, s_led[2], AR5K_GPIODO); 1176 ath5k_hw_reg_write(ah, s_led[2], AR5K_GPIODO);
1172 1177
1173 /* Restore sta_id flags and preserve our mac address*/ 1178 /* Restore sta_id flags and preserve our mac address*/
1174 ath5k_hw_reg_write(ah, AR5K_LOW_ID(ah->ah_sta_id), 1179 ath5k_hw_reg_write(ah,
1175 AR5K_STA_ID0); 1180 get_unaligned_le32(common->macaddr),
1176 ath5k_hw_reg_write(ah, staid1_flags | AR5K_HIGH_ID(ah->ah_sta_id), 1181 AR5K_STA_ID0);
1177 AR5K_STA_ID1); 1182 ath5k_hw_reg_write(ah,
1183 staid1_flags | get_unaligned_le16(common->macaddr + 4),
1184 AR5K_STA_ID1);
1178 1185
1179 1186
1180 /* 1187 /*
@@ -1182,8 +1189,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1182 */ 1189 */
1183 1190
1184 /* Restore bssid and bssid mask */ 1191 /* Restore bssid and bssid mask */
1185 /* XXX: add ah->aid once mac80211 gives this to us */ 1192 ath5k_hw_set_associd(ah);
1186 ath5k_hw_set_associd(ah, ah->ah_bssid, 0);
1187 1193
1188 /* Set PCU config */ 1194 /* Set PCU config */
1189 ath5k_hw_set_opmode(ah); 1195 ath5k_hw_set_opmode(ah);
@@ -1289,7 +1295,7 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1289 * out and/or noise floor calibration might timeout. 1295 * out and/or noise floor calibration might timeout.
1290 */ 1296 */
1291 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL, 1297 AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_AGCCTL,
1292 AR5K_PHY_AGCCTL_CAL); 1298 AR5K_PHY_AGCCTL_CAL | AR5K_PHY_AGCCTL_NF);
1293 1299
1294 /* At the same time start I/Q calibration for QAM constellation 1300 /* At the same time start I/Q calibration for QAM constellation
1295 * -no need for CCK- */ 1301 * -no need for CCK- */
@@ -1310,24 +1316,13 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1310 channel->center_freq); 1316 channel->center_freq);
1311 } 1317 }
1312 1318
1313 /*
1314 * If we run NF calibration before AGC, it always times out.
1315 * Binary HAL starts NF and AGC calibration at the same time
1316 * and only waits for AGC to finish. Also if AGC or NF cal.
1317 * times out, reset doesn't fail on binary HAL. I believe
1318 * that's wrong because since rx path is routed to a detector,
1319 * if cal. doesn't finish we won't have RX. Sam's HAL for AR5210/5211
1320 * enables noise floor calibration after offset calibration and if noise
1321 * floor calibration fails, reset fails. I believe that's
1322 * a better approach, we just need to find a polling interval
1323 * that suits best, even if reset continues we need to make
1324 * sure that rx path is ready.
1325 */
1326 ath5k_hw_noise_floor_calibration(ah, channel->center_freq);
1327
1328 /* Restore antenna mode */ 1319 /* Restore antenna mode */
1329 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode); 1320 ath5k_hw_set_antenna_mode(ah, ah->ah_ant_mode);
1330 1321
1322 /* Restore slot time and ACK timeouts */
1323 if (ah->ah_coverage_class > 0)
1324 ath5k_hw_set_coverage_class(ah, ah->ah_coverage_class);
1325
1331 /* 1326 /*
1332 * Configure QCUs/DCUs 1327 * Configure QCUs/DCUs
1333 */ 1328 */
@@ -1382,15 +1377,15 @@ int ath5k_hw_reset(struct ath5k_hw *ah, enum nl80211_iftype op_mode,
1382 * Set clocks to 32KHz operation and use an 1377 * Set clocks to 32KHz operation and use an
1383 * external 32KHz crystal when sleeping if one 1378 * external 32KHz crystal when sleeping if one
1384 * exists */ 1379 * exists */
1385 if (ah->ah_version == AR5K_AR5212) 1380 if (ah->ah_version == AR5K_AR5212 &&
1386 ath5k_hw_set_sleep_clock(ah, true); 1381 ah->ah_op_mode != NL80211_IFTYPE_AP)
1382 ath5k_hw_set_sleep_clock(ah, true);
1387 1383
1388 /* 1384 /*
1389 * Disable beacons and reset the register 1385 * Disable beacons and reset the TSF
1390 */ 1386 */
1391 AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE | 1387 AR5K_REG_DISABLE_BITS(ah, AR5K_BEACON, AR5K_BEACON_ENABLE);
1392 AR5K_BEACON_RESET_TSF); 1388 ath5k_hw_reset_tsf(ah);
1393
1394 return 0; 1389 return 0;
1395} 1390}
1396 1391
diff --git a/drivers/net/wireless/ath/ath9k/Kconfig b/drivers/net/wireless/ath/ath9k/Kconfig
index ef5f59c4dd80..5774cea23a3b 100644
--- a/drivers/net/wireless/ath/ath9k/Kconfig
+++ b/drivers/net/wireless/ath/ath9k/Kconfig
@@ -1,9 +1,16 @@
1config ATH9K_HW
2 tristate
3config ATH9K_COMMON
4 tristate
5
1config ATH9K 6config ATH9K
2 tristate "Atheros 802.11n wireless cards support" 7 tristate "Atheros 802.11n wireless cards support"
3 depends on PCI && MAC80211 && WLAN_80211 8 depends on PCI && MAC80211
9 select ATH9K_HW
4 select MAC80211_LEDS 10 select MAC80211_LEDS
5 select LEDS_CLASS 11 select LEDS_CLASS
6 select NEW_LEDS 12 select NEW_LEDS
13 select ATH9K_COMMON
7 ---help--- 14 ---help---
8 This module adds support for wireless adapters based on 15 This module adds support for wireless adapters based on
9 Atheros IEEE 802.11n AR5008, AR9001 and AR9002 family 16 Atheros IEEE 802.11n AR5008, AR9001 and AR9002 family
@@ -16,13 +23,12 @@ config ATH9K
16 23
17 If you choose to build a module, it'll be called ath9k. 24 If you choose to build a module, it'll be called ath9k.
18 25
19config ATH9K_DEBUG 26config ATH9K_DEBUGFS
20 bool "Atheros ath9k debugging" 27 bool "Atheros ath9k debugging"
21 depends on ATH9K 28 depends on ATH9K && DEBUG_FS
22 ---help--- 29 ---help---
23 Say Y, if you need ath9k to display debug messages. 30 Say Y, if you need access to ath9k's statistics for
24 Pass the debug mask as a module parameter: 31 interrupts, rate control, etc.
25 32
26 modprobe ath9k debug=0x00000200 33 Also required for changing debug message flags at run time.
27 34
28 Look in ath9k/debug.h for possible debug masks
diff --git a/drivers/net/wireless/ath/ath9k/Makefile b/drivers/net/wireless/ath/ath9k/Makefile
index ff2c9a26c10c..6b50d5eb9ec3 100644
--- a/drivers/net/wireless/ath/ath9k/Makefile
+++ b/drivers/net/wireless/ath/ath9k/Makefile
@@ -1,22 +1,30 @@
1ath9k-y += hw.o \ 1ath9k-y += beacon.o \
2 eeprom.o \ 2 gpio.o \
3 eeprom_def.o \ 3 init.o \
4 eeprom_4k.o \
5 eeprom_9287.o \
6 mac.o \
7 calib.o \
8 ani.o \
9 phy.o \
10 beacon.o \
11 main.o \ 4 main.o \
12 recv.o \ 5 recv.o \
13 xmit.o \ 6 xmit.o \
14 virtual.o \ 7 virtual.o \
15 rc.o \ 8 rc.o
16 btcoex.o
17 9
18ath9k-$(CONFIG_PCI) += pci.o 10ath9k-$(CONFIG_PCI) += pci.o
19ath9k-$(CONFIG_ATHEROS_AR71XX) += ahb.o 11ath9k-$(CONFIG_ATHEROS_AR71XX) += ahb.o
20ath9k-$(CONFIG_ATH9K_DEBUG) += debug.o 12ath9k-$(CONFIG_ATH9K_DEBUGFS) += debug.o
21 13
22obj-$(CONFIG_ATH9K) += ath9k.o 14obj-$(CONFIG_ATH9K) += ath9k.o
15
16ath9k_hw-y:= hw.o \
17 eeprom.o \
18 eeprom_def.o \
19 eeprom_4k.o \
20 eeprom_9287.o \
21 calib.o \
22 ani.o \
23 phy.o \
24 btcoex.o \
25 mac.o \
26
27obj-$(CONFIG_ATH9K_HW) += ath9k_hw.o
28
29obj-$(CONFIG_ATH9K_COMMON) += ath9k_common.o
30ath9k_common-y:= common.o
diff --git a/drivers/net/wireless/ath/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
index 2ad7d0280f7a..ca4994f13151 100644
--- a/drivers/net/wireless/ath/ath9k/ahb.c
+++ b/drivers/net/wireless/ath/ath9k/ahb.c
@@ -22,27 +22,23 @@
22#include "ath9k.h" 22#include "ath9k.h"
23 23
24/* return bus cachesize in 4B word units */ 24/* return bus cachesize in 4B word units */
25static void ath_ahb_read_cachesize(struct ath_softc *sc, int *csz) 25static void ath_ahb_read_cachesize(struct ath_common *common, int *csz)
26{ 26{
27 *csz = L1_CACHE_BYTES >> 2; 27 *csz = L1_CACHE_BYTES >> 2;
28} 28}
29 29
30static void ath_ahb_cleanup(struct ath_softc *sc) 30static bool ath_ahb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
31{ 31{
32 iounmap(sc->mem); 32 struct ath_softc *sc = (struct ath_softc *)common->priv;
33}
34
35static bool ath_ahb_eeprom_read(struct ath_hw *ah, u32 off, u16 *data)
36{
37 struct ath_softc *sc = ah->ah_sc;
38 struct platform_device *pdev = to_platform_device(sc->dev); 33 struct platform_device *pdev = to_platform_device(sc->dev);
39 struct ath9k_platform_data *pdata; 34 struct ath9k_platform_data *pdata;
40 35
41 pdata = (struct ath9k_platform_data *) pdev->dev.platform_data; 36 pdata = (struct ath9k_platform_data *) pdev->dev.platform_data;
42 if (off >= (ARRAY_SIZE(pdata->eeprom_data))) { 37 if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
43 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 38 ath_print(common, ATH_DBG_FATAL,
44 "%s: flash read failed, offset %08x is out of range\n", 39 "%s: flash read failed, offset %08x "
45 __func__, off); 40 "is out of range\n",
41 __func__, off);
46 return false; 42 return false;
47 } 43 }
48 44
@@ -52,8 +48,6 @@ static bool ath_ahb_eeprom_read(struct ath_hw *ah, u32 off, u16 *data)
52 48
53static struct ath_bus_ops ath_ahb_bus_ops = { 49static struct ath_bus_ops ath_ahb_bus_ops = {
54 .read_cachesize = ath_ahb_read_cachesize, 50 .read_cachesize = ath_ahb_read_cachesize,
55 .cleanup = ath_ahb_cleanup,
56
57 .eeprom_read = ath_ahb_eeprom_read, 51 .eeprom_read = ath_ahb_eeprom_read,
58}; 52};
59 53
@@ -67,6 +61,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
67 int irq; 61 int irq;
68 int ret = 0; 62 int ret = 0;
69 struct ath_hw *ah; 63 struct ath_hw *ah;
64 char hw_name[64];
70 65
71 if (!pdev->dev.platform_data) { 66 if (!pdev->dev.platform_data) {
72 dev_err(&pdev->dev, "no platform data specified\n"); 67 dev_err(&pdev->dev, "no platform data specified\n");
@@ -116,36 +111,35 @@ static int ath_ahb_probe(struct platform_device *pdev)
116 sc->hw = hw; 111 sc->hw = hw;
117 sc->dev = &pdev->dev; 112 sc->dev = &pdev->dev;
118 sc->mem = mem; 113 sc->mem = mem;
119 sc->bus_ops = &ath_ahb_bus_ops;
120 sc->irq = irq; 114 sc->irq = irq;
121 115
122 ret = ath_init_device(AR5416_AR9100_DEVID, sc, 0x0); 116 /* Will be cleared in ath9k_start() */
117 sc->sc_flags |= SC_OP_INVALID;
118
119 ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc);
123 if (ret) { 120 if (ret) {
124 dev_err(&pdev->dev, "failed to initialize device\n"); 121 dev_err(&pdev->dev, "request_irq failed\n");
125 goto err_free_hw; 122 goto err_free_hw;
126 } 123 }
127 124
128 ret = request_irq(irq, ath_isr, IRQF_SHARED, "ath9k", sc); 125 ret = ath9k_init_device(AR5416_AR9100_DEVID, sc, 0x0, &ath_ahb_bus_ops);
129 if (ret) { 126 if (ret) {
130 dev_err(&pdev->dev, "request_irq failed\n"); 127 dev_err(&pdev->dev, "failed to initialize device\n");
131 goto err_detach; 128 goto err_irq;
132 } 129 }
133 130
134 ah = sc->sc_ah; 131 ah = sc->sc_ah;
132 ath9k_hw_name(ah, hw_name, sizeof(hw_name));
135 printk(KERN_INFO 133 printk(KERN_INFO
136 "%s: Atheros AR%s MAC/BB Rev:%x, " 134 "%s: %s mem=0x%lx, irq=%d\n",
137 "AR%s RF Rev:%x, mem=0x%lx, irq=%d\n",
138 wiphy_name(hw->wiphy), 135 wiphy_name(hw->wiphy),
139 ath_mac_bb_name(ah->hw_version.macVersion), 136 hw_name,
140 ah->hw_version.macRev,
141 ath_rf_name((ah->hw_version.analog5GhzRev & AR_RADIO_SREV_MAJOR)),
142 ah->hw_version.phyRev,
143 (unsigned long)mem, irq); 137 (unsigned long)mem, irq);
144 138
145 return 0; 139 return 0;
146 140
147 err_detach: 141 err_irq:
148 ath_detach(sc); 142 free_irq(irq, sc);
149 err_free_hw: 143 err_free_hw:
150 ieee80211_free_hw(hw); 144 ieee80211_free_hw(hw);
151 platform_set_drvdata(pdev, NULL); 145 platform_set_drvdata(pdev, NULL);
@@ -162,8 +156,12 @@ static int ath_ahb_remove(struct platform_device *pdev)
162 if (hw) { 156 if (hw) {
163 struct ath_wiphy *aphy = hw->priv; 157 struct ath_wiphy *aphy = hw->priv;
164 struct ath_softc *sc = aphy->sc; 158 struct ath_softc *sc = aphy->sc;
159 void __iomem *mem = sc->mem;
165 160
166 ath_cleanup(sc); 161 ath9k_deinit_device(sc);
162 free_irq(sc->irq, sc);
163 ieee80211_free_hw(sc->hw);
164 iounmap(mem);
167 platform_set_drvdata(pdev, NULL); 165 platform_set_drvdata(pdev, NULL);
168 } 166 }
169 167
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index 2b493742ef10..2a0cd64c2bfb 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -14,7 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah, 19static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
20 struct ath9k_channel *chan) 20 struct ath9k_channel *chan)
@@ -31,8 +31,8 @@ static int ath9k_hw_get_ani_channel_idx(struct ath_hw *ah,
31 } 31 }
32 } 32 }
33 33
34 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 34 ath_print(ath9k_hw_common(ah), ATH_DBG_ANI,
35 "No more channel states left. Using channel 0\n"); 35 "No more channel states left. Using channel 0\n");
36 36
37 return 0; 37 return 0;
38} 38}
@@ -41,16 +41,17 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
41 enum ath9k_ani_cmd cmd, int param) 41 enum ath9k_ani_cmd cmd, int param)
42{ 42{
43 struct ar5416AniState *aniState = ah->curani; 43 struct ar5416AniState *aniState = ah->curani;
44 struct ath_common *common = ath9k_hw_common(ah);
44 45
45 switch (cmd & ah->ani_function) { 46 switch (cmd & ah->ani_function) {
46 case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{ 47 case ATH9K_ANI_NOISE_IMMUNITY_LEVEL:{
47 u32 level = param; 48 u32 level = param;
48 49
49 if (level >= ARRAY_SIZE(ah->totalSizeDesired)) { 50 if (level >= ARRAY_SIZE(ah->totalSizeDesired)) {
50 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 51 ath_print(common, ATH_DBG_ANI,
51 "level out of range (%u > %u)\n", 52 "level out of range (%u > %u)\n",
52 level, 53 level,
53 (unsigned)ARRAY_SIZE(ah->totalSizeDesired)); 54 (unsigned)ARRAY_SIZE(ah->totalSizeDesired));
54 return false; 55 return false;
55 } 56 }
56 57
@@ -152,10 +153,10 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
152 u32 level = param; 153 u32 level = param;
153 154
154 if (level >= ARRAY_SIZE(firstep)) { 155 if (level >= ARRAY_SIZE(firstep)) {
155 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 156 ath_print(common, ATH_DBG_ANI,
156 "level out of range (%u > %u)\n", 157 "level out of range (%u > %u)\n",
157 level, 158 level,
158 (unsigned) ARRAY_SIZE(firstep)); 159 (unsigned) ARRAY_SIZE(firstep));
159 return false; 160 return false;
160 } 161 }
161 REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, 162 REG_RMW_FIELD(ah, AR_PHY_FIND_SIG,
@@ -174,11 +175,10 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
174 u32 level = param; 175 u32 level = param;
175 176
176 if (level >= ARRAY_SIZE(cycpwrThr1)) { 177 if (level >= ARRAY_SIZE(cycpwrThr1)) {
177 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 178 ath_print(common, ATH_DBG_ANI,
178 "level out of range (%u > %u)\n", 179 "level out of range (%u > %u)\n",
179 level, 180 level,
180 (unsigned) 181 (unsigned) ARRAY_SIZE(cycpwrThr1));
181 ARRAY_SIZE(cycpwrThr1));
182 return false; 182 return false;
183 } 183 }
184 REG_RMW_FIELD(ah, AR_PHY_TIMING5, 184 REG_RMW_FIELD(ah, AR_PHY_TIMING5,
@@ -194,25 +194,28 @@ static bool ath9k_hw_ani_control(struct ath_hw *ah,
194 case ATH9K_ANI_PRESENT: 194 case ATH9K_ANI_PRESENT:
195 break; 195 break;
196 default: 196 default:
197 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 197 ath_print(common, ATH_DBG_ANI,
198 "invalid cmd %u\n", cmd); 198 "invalid cmd %u\n", cmd);
199 return false; 199 return false;
200 } 200 }
201 201
202 DPRINTF(ah->ah_sc, ATH_DBG_ANI, "ANI parameters:\n"); 202 ath_print(common, ATH_DBG_ANI, "ANI parameters:\n");
203 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 203 ath_print(common, ATH_DBG_ANI,
204 "noiseImmunityLevel=%d, spurImmunityLevel=%d, " 204 "noiseImmunityLevel=%d, spurImmunityLevel=%d, "
205 "ofdmWeakSigDetectOff=%d\n", 205 "ofdmWeakSigDetectOff=%d\n",
206 aniState->noiseImmunityLevel, aniState->spurImmunityLevel, 206 aniState->noiseImmunityLevel,
207 !aniState->ofdmWeakSigDetectOff); 207 aniState->spurImmunityLevel,
208 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 208 !aniState->ofdmWeakSigDetectOff);
209 "cckWeakSigThreshold=%d, " 209 ath_print(common, ATH_DBG_ANI,
210 "firstepLevel=%d, listenTime=%d\n", 210 "cckWeakSigThreshold=%d, "
211 aniState->cckWeakSigThreshold, aniState->firstepLevel, 211 "firstepLevel=%d, listenTime=%d\n",
212 aniState->listenTime); 212 aniState->cckWeakSigThreshold,
213 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 213 aniState->firstepLevel,
214 aniState->listenTime);
215 ath_print(common, ATH_DBG_ANI,
214 "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n", 216 "cycleCount=%d, ofdmPhyErrCount=%d, cckPhyErrCount=%d\n\n",
215 aniState->cycleCount, aniState->ofdmPhyErrCount, 217 aniState->cycleCount,
218 aniState->ofdmPhyErrCount,
216 aniState->cckPhyErrCount); 219 aniState->cckPhyErrCount);
217 220
218 return true; 221 return true;
@@ -231,6 +234,7 @@ static void ath9k_hw_update_mibstats(struct ath_hw *ah,
231static void ath9k_ani_restart(struct ath_hw *ah) 234static void ath9k_ani_restart(struct ath_hw *ah)
232{ 235{
233 struct ar5416AniState *aniState; 236 struct ar5416AniState *aniState;
237 struct ath_common *common = ath9k_hw_common(ah);
234 238
235 if (!DO_ANI(ah)) 239 if (!DO_ANI(ah))
236 return; 240 return;
@@ -240,24 +244,24 @@ static void ath9k_ani_restart(struct ath_hw *ah)
240 244
241 if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) { 245 if (aniState->ofdmTrigHigh > AR_PHY_COUNTMAX) {
242 aniState->ofdmPhyErrBase = 0; 246 aniState->ofdmPhyErrBase = 0;
243 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 247 ath_print(common, ATH_DBG_ANI,
244 "OFDM Trigger is too high for hw counters\n"); 248 "OFDM Trigger is too high for hw counters\n");
245 } else { 249 } else {
246 aniState->ofdmPhyErrBase = 250 aniState->ofdmPhyErrBase =
247 AR_PHY_COUNTMAX - aniState->ofdmTrigHigh; 251 AR_PHY_COUNTMAX - aniState->ofdmTrigHigh;
248 } 252 }
249 if (aniState->cckTrigHigh > AR_PHY_COUNTMAX) { 253 if (aniState->cckTrigHigh > AR_PHY_COUNTMAX) {
250 aniState->cckPhyErrBase = 0; 254 aniState->cckPhyErrBase = 0;
251 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 255 ath_print(common, ATH_DBG_ANI,
252 "CCK Trigger is too high for hw counters\n"); 256 "CCK Trigger is too high for hw counters\n");
253 } else { 257 } else {
254 aniState->cckPhyErrBase = 258 aniState->cckPhyErrBase =
255 AR_PHY_COUNTMAX - aniState->cckTrigHigh; 259 AR_PHY_COUNTMAX - aniState->cckTrigHigh;
256 } 260 }
257 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 261 ath_print(common, ATH_DBG_ANI,
258 "Writing ofdmbase=%u cckbase=%u\n", 262 "Writing ofdmbase=%u cckbase=%u\n",
259 aniState->ofdmPhyErrBase, 263 aniState->ofdmPhyErrBase,
260 aniState->cckPhyErrBase); 264 aniState->cckPhyErrBase);
261 REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase); 265 REG_WRITE(ah, AR_PHY_ERR_1, aniState->ofdmPhyErrBase);
262 REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase); 266 REG_WRITE(ah, AR_PHY_ERR_2, aniState->cckPhyErrBase);
263 REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING); 267 REG_WRITE(ah, AR_PHY_ERR_MASK_1, AR_PHY_ERR_OFDM_TIMING);
@@ -271,7 +275,7 @@ static void ath9k_ani_restart(struct ath_hw *ah)
271 275
272static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah) 276static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah)
273{ 277{
274 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 278 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
275 struct ar5416AniState *aniState; 279 struct ar5416AniState *aniState;
276 int32_t rssi; 280 int32_t rssi;
277 281
@@ -343,7 +347,7 @@ static void ath9k_hw_ani_ofdm_err_trigger(struct ath_hw *ah)
343 347
344static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah) 348static void ath9k_hw_ani_cck_err_trigger(struct ath_hw *ah)
345{ 349{
346 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 350 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
347 struct ar5416AniState *aniState; 351 struct ar5416AniState *aniState;
348 int32_t rssi; 352 int32_t rssi;
349 353
@@ -464,6 +468,7 @@ void ath9k_ani_reset(struct ath_hw *ah)
464{ 468{
465 struct ar5416AniState *aniState; 469 struct ar5416AniState *aniState;
466 struct ath9k_channel *chan = ah->curchan; 470 struct ath9k_channel *chan = ah->curchan;
471 struct ath_common *common = ath9k_hw_common(ah);
467 int index; 472 int index;
468 473
469 if (!DO_ANI(ah)) 474 if (!DO_ANI(ah))
@@ -475,8 +480,8 @@ void ath9k_ani_reset(struct ath_hw *ah)
475 480
476 if (DO_ANI(ah) && ah->opmode != NL80211_IFTYPE_STATION 481 if (DO_ANI(ah) && ah->opmode != NL80211_IFTYPE_STATION
477 && ah->opmode != NL80211_IFTYPE_ADHOC) { 482 && ah->opmode != NL80211_IFTYPE_ADHOC) {
478 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 483 ath_print(common, ATH_DBG_ANI,
479 "Reset ANI state opmode %u\n", ah->opmode); 484 "Reset ANI state opmode %u\n", ah->opmode);
480 ah->stats.ast_ani_reset++; 485 ah->stats.ast_ani_reset++;
481 486
482 if (ah->opmode == NL80211_IFTYPE_AP) { 487 if (ah->opmode == NL80211_IFTYPE_AP) {
@@ -543,6 +548,7 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
543 struct ath9k_channel *chan) 548 struct ath9k_channel *chan)
544{ 549{
545 struct ar5416AniState *aniState; 550 struct ar5416AniState *aniState;
551 struct ath_common *common = ath9k_hw_common(ah);
546 int32_t listenTime; 552 int32_t listenTime;
547 u32 phyCnt1, phyCnt2; 553 u32 phyCnt1, phyCnt2;
548 u32 ofdmPhyErrCnt, cckPhyErrCnt; 554 u32 ofdmPhyErrCnt, cckPhyErrCnt;
@@ -569,20 +575,22 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
569 if (phyCnt1 < aniState->ofdmPhyErrBase || 575 if (phyCnt1 < aniState->ofdmPhyErrBase ||
570 phyCnt2 < aniState->cckPhyErrBase) { 576 phyCnt2 < aniState->cckPhyErrBase) {
571 if (phyCnt1 < aniState->ofdmPhyErrBase) { 577 if (phyCnt1 < aniState->ofdmPhyErrBase) {
572 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 578 ath_print(common, ATH_DBG_ANI,
573 "phyCnt1 0x%x, resetting " 579 "phyCnt1 0x%x, resetting "
574 "counter value to 0x%x\n", 580 "counter value to 0x%x\n",
575 phyCnt1, aniState->ofdmPhyErrBase); 581 phyCnt1,
582 aniState->ofdmPhyErrBase);
576 REG_WRITE(ah, AR_PHY_ERR_1, 583 REG_WRITE(ah, AR_PHY_ERR_1,
577 aniState->ofdmPhyErrBase); 584 aniState->ofdmPhyErrBase);
578 REG_WRITE(ah, AR_PHY_ERR_MASK_1, 585 REG_WRITE(ah, AR_PHY_ERR_MASK_1,
579 AR_PHY_ERR_OFDM_TIMING); 586 AR_PHY_ERR_OFDM_TIMING);
580 } 587 }
581 if (phyCnt2 < aniState->cckPhyErrBase) { 588 if (phyCnt2 < aniState->cckPhyErrBase) {
582 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 589 ath_print(common, ATH_DBG_ANI,
583 "phyCnt2 0x%x, resetting " 590 "phyCnt2 0x%x, resetting "
584 "counter value to 0x%x\n", 591 "counter value to 0x%x\n",
585 phyCnt2, aniState->cckPhyErrBase); 592 phyCnt2,
593 aniState->cckPhyErrBase);
586 REG_WRITE(ah, AR_PHY_ERR_2, 594 REG_WRITE(ah, AR_PHY_ERR_2,
587 aniState->cckPhyErrBase); 595 aniState->cckPhyErrBase);
588 REG_WRITE(ah, AR_PHY_ERR_MASK_2, 596 REG_WRITE(ah, AR_PHY_ERR_MASK_2,
@@ -621,10 +629,13 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah,
621 } 629 }
622 } 630 }
623} 631}
632EXPORT_SYMBOL(ath9k_hw_ani_monitor);
624 633
625void ath9k_enable_mib_counters(struct ath_hw *ah) 634void ath9k_enable_mib_counters(struct ath_hw *ah)
626{ 635{
627 DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Enable MIB counters\n"); 636 struct ath_common *common = ath9k_hw_common(ah);
637
638 ath_print(common, ATH_DBG_ANI, "Enable MIB counters\n");
628 639
629 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); 640 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
630 641
@@ -640,7 +651,10 @@ void ath9k_enable_mib_counters(struct ath_hw *ah)
640/* Freeze the MIB counters, get the stats and then clear them */ 651/* Freeze the MIB counters, get the stats and then clear them */
641void ath9k_hw_disable_mib_counters(struct ath_hw *ah) 652void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
642{ 653{
643 DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Disable MIB counters\n"); 654 struct ath_common *common = ath9k_hw_common(ah);
655
656 ath_print(common, ATH_DBG_ANI, "Disable MIB counters\n");
657
644 REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC); 658 REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
645 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); 659 ath9k_hw_update_mibstats(ah, &ah->ah_mibStats);
646 REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC); 660 REG_WRITE(ah, AR_MIBC, AR_MIBC_CMC);
@@ -653,6 +667,7 @@ u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah,
653 u32 *rxf_pcnt, 667 u32 *rxf_pcnt,
654 u32 *txf_pcnt) 668 u32 *txf_pcnt)
655{ 669{
670 struct ath_common *common = ath9k_hw_common(ah);
656 static u32 cycles, rx_clear, rx_frame, tx_frame; 671 static u32 cycles, rx_clear, rx_frame, tx_frame;
657 u32 good = 1; 672 u32 good = 1;
658 673
@@ -662,8 +677,8 @@ u32 ath9k_hw_GetMibCycleCountsPct(struct ath_hw *ah,
662 u32 cc = REG_READ(ah, AR_CCCNT); 677 u32 cc = REG_READ(ah, AR_CCCNT);
663 678
664 if (cycles == 0 || cycles > cc) { 679 if (cycles == 0 || cycles > cc) {
665 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 680 ath_print(common, ATH_DBG_ANI,
666 "cycle counter wrap. ExtBusy = 0\n"); 681 "cycle counter wrap. ExtBusy = 0\n");
667 good = 0; 682 good = 0;
668 } else { 683 } else {
669 u32 cc_d = cc - cycles; 684 u32 cc_d = cc - cycles;
@@ -742,6 +757,7 @@ void ath9k_hw_procmibevent(struct ath_hw *ah)
742 ath9k_ani_restart(ah); 757 ath9k_ani_restart(ah);
743 } 758 }
744} 759}
760EXPORT_SYMBOL(ath9k_hw_procmibevent);
745 761
746void ath9k_hw_ani_setup(struct ath_hw *ah) 762void ath9k_hw_ani_setup(struct ath_hw *ah)
747{ 763{
@@ -762,9 +778,10 @@ void ath9k_hw_ani_setup(struct ath_hw *ah)
762 778
763void ath9k_hw_ani_init(struct ath_hw *ah) 779void ath9k_hw_ani_init(struct ath_hw *ah)
764{ 780{
781 struct ath_common *common = ath9k_hw_common(ah);
765 int i; 782 int i;
766 783
767 DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Initialize ANI\n"); 784 ath_print(common, ATH_DBG_ANI, "Initialize ANI\n");
768 785
769 memset(ah->ani, 0, sizeof(ah->ani)); 786 memset(ah->ani, 0, sizeof(ah->ani));
770 for (i = 0; i < ARRAY_SIZE(ah->ani); i++) { 787 for (i = 0; i < ARRAY_SIZE(ah->ani); i++) {
@@ -786,11 +803,11 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
786 AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH; 803 AR_PHY_COUNTMAX - ATH9K_ANI_CCK_TRIG_HIGH;
787 } 804 }
788 805
789 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 806 ath_print(common, ATH_DBG_ANI,
790 "Setting OfdmErrBase = 0x%08x\n", 807 "Setting OfdmErrBase = 0x%08x\n",
791 ah->ani[0].ofdmPhyErrBase); 808 ah->ani[0].ofdmPhyErrBase);
792 DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n", 809 ath_print(common, ATH_DBG_ANI, "Setting cckErrBase = 0x%08x\n",
793 ah->ani[0].cckPhyErrBase); 810 ah->ani[0].cckPhyErrBase);
794 811
795 REG_WRITE(ah, AR_PHY_ERR_1, ah->ani[0].ofdmPhyErrBase); 812 REG_WRITE(ah, AR_PHY_ERR_1, ah->ani[0].ofdmPhyErrBase);
796 REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase); 813 REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase);
@@ -803,7 +820,7 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
803 820
804void ath9k_hw_ani_disable(struct ath_hw *ah) 821void ath9k_hw_ani_disable(struct ath_hw *ah)
805{ 822{
806 DPRINTF(ah->ah_sc, ATH_DBG_ANI, "Disabling ANI\n"); 823 ath_print(ath9k_hw_common(ah), ATH_DBG_ANI, "Disabling ANI\n");
807 824
808 ath9k_hw_disable_mib_counters(ah); 825 ath9k_hw_disable_mib_counters(ah);
809 REG_WRITE(ah, AR_PHY_ERR_1, 0); 826 REG_WRITE(ah, AR_PHY_ERR_1, 0);
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 1d59f10f68da..83c7ea4c007f 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -19,24 +19,25 @@
19 19
20#include <linux/etherdevice.h> 20#include <linux/etherdevice.h>
21#include <linux/device.h> 21#include <linux/device.h>
22#include <net/mac80211.h>
23#include <linux/leds.h> 22#include <linux/leds.h>
24 23
25#include "hw.h"
26#include "rc.h"
27#include "debug.h" 24#include "debug.h"
28#include "../ath.h" 25#include "common.h"
29#include "btcoex.h" 26
27/*
28 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
29 * should rely on this file or its contents.
30 */
30 31
31struct ath_node; 32struct ath_node;
32 33
33/* Macro to expand scalars to 64-bit objects */ 34/* Macro to expand scalars to 64-bit objects */
34 35
35#define ito64(x) (sizeof(x) == 8) ? \ 36#define ito64(x) (sizeof(x) == 1) ? \
36 (((unsigned long long int)(x)) & (0xff)) : \ 37 (((unsigned long long int)(x)) & (0xff)) : \
37 (sizeof(x) == 16) ? \ 38 (sizeof(x) == 2) ? \
38 (((unsigned long long int)(x)) & 0xffff) : \ 39 (((unsigned long long int)(x)) & 0xffff) : \
39 ((sizeof(x) == 32) ? \ 40 ((sizeof(x) == 4) ? \
40 (((unsigned long long int)(x)) & 0xffffffff) : \ 41 (((unsigned long long int)(x)) & 0xffffffff) : \
41 (unsigned long long int)(x)) 42 (unsigned long long int)(x))
42 43
@@ -54,15 +55,11 @@ struct ath_node;
54 55
55#define A_MAX(a, b) ((a) > (b) ? (a) : (b)) 56#define A_MAX(a, b) ((a) > (b) ? (a) : (b))
56 57
57#define ASSERT(exp) BUG_ON(!(exp))
58
59#define TSF_TO_TU(_h,_l) \ 58#define TSF_TO_TU(_h,_l) \
60 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) 59 ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10))
61 60
62#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) 61#define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i))
63 62
64static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
65
66struct ath_config { 63struct ath_config {
67 u32 ath_aggr_prot; 64 u32 ath_aggr_prot;
68 u16 txpowlimit; 65 u16 txpowlimit;
@@ -103,18 +100,6 @@ enum buffer_type {
103 BUF_XRETRY = BIT(5), 100 BUF_XRETRY = BIT(5),
104}; 101};
105 102
106struct ath_buf_state {
107 int bfs_nframes;
108 u16 bfs_al;
109 u16 bfs_frmlen;
110 int bfs_seqno;
111 int bfs_tidno;
112 int bfs_retries;
113 u8 bf_type;
114 u32 bfs_keyix;
115 enum ath9k_key_type bfs_keytype;
116};
117
118#define bf_nframes bf_state.bfs_nframes 103#define bf_nframes bf_state.bfs_nframes
119#define bf_al bf_state.bfs_al 104#define bf_al bf_state.bfs_al
120#define bf_frmlen bf_state.bfs_frmlen 105#define bf_frmlen bf_state.bfs_frmlen
@@ -129,21 +114,6 @@ struct ath_buf_state {
129#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) 114#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
130#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) 115#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
131 116
132struct ath_buf {
133 struct list_head list;
134 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
135 an aggregate) */
136 struct ath_buf *bf_next; /* next subframe in the aggregate */
137 struct sk_buff *bf_mpdu; /* enclosing frame structure */
138 struct ath_desc *bf_desc; /* virtual addr of desc */
139 dma_addr_t bf_daddr; /* physical addr of desc */
140 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
141 bool bf_stale;
142 u16 bf_flags;
143 struct ath_buf_state bf_state;
144 dma_addr_t bf_dmacontext;
145};
146
147struct ath_descdma { 117struct ath_descdma {
148 struct ath_desc *dd_desc; 118 struct ath_desc *dd_desc;
149 dma_addr_t dd_desc_paddr; 119 dma_addr_t dd_desc_paddr;
@@ -163,13 +133,9 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
163 133
164#define ATH_MAX_ANTENNA 3 134#define ATH_MAX_ANTENNA 3
165#define ATH_RXBUF 512 135#define ATH_RXBUF 512
166#define WME_NUM_TID 16
167#define ATH_TXBUF 512 136#define ATH_TXBUF 512
168#define ATH_TXMAXTRY 13 137#define ATH_TXMAXTRY 13
169#define ATH_MGT_TXMAXTRY 4 138#define ATH_MGT_TXMAXTRY 4
170#define WME_BA_BMP_SIZE 64
171#define WME_MAX_BA WME_BA_BMP_SIZE
172#define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
173 139
174#define TID_TO_WME_AC(_tid) \ 140#define TID_TO_WME_AC(_tid) \
175 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ 141 ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \
@@ -177,12 +143,6 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
177 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ 143 (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \
178 WME_AC_VO) 144 WME_AC_VO)
179 145
180#define WME_AC_BE 0
181#define WME_AC_BK 1
182#define WME_AC_VI 2
183#define WME_AC_VO 3
184#define WME_NUM_AC 4
185
186#define ADDBA_EXCHANGE_ATTEMPTS 10 146#define ADDBA_EXCHANGE_ATTEMPTS 10
187#define ATH_AGGR_DELIM_SZ 4 147#define ATH_AGGR_DELIM_SZ 4
188#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 148#define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */
@@ -191,7 +151,6 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
191/* minimum h/w qdepth to be sustained to maximize aggregation */ 151/* minimum h/w qdepth to be sustained to maximize aggregation */
192#define ATH_AGGR_MIN_QDEPTH 2 152#define ATH_AGGR_MIN_QDEPTH 2
193#define ATH_AMPDU_SUBFRAME_DEFAULT 32 153#define ATH_AMPDU_SUBFRAME_DEFAULT 32
194#define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
195 154
196#define IEEE80211_SEQ_SEQ_SHIFT 4 155#define IEEE80211_SEQ_SEQ_SHIFT 4
197#define IEEE80211_SEQ_MAX 4096 156#define IEEE80211_SEQ_MAX 4096
@@ -238,18 +197,8 @@ struct ath_txq {
238 struct list_head axq_q; 197 struct list_head axq_q;
239 spinlock_t axq_lock; 198 spinlock_t axq_lock;
240 u32 axq_depth; 199 u32 axq_depth;
241 u8 axq_aggr_depth;
242 bool stopped; 200 bool stopped;
243 bool axq_tx_inprogress; 201 bool axq_tx_inprogress;
244 struct ath_buf *axq_linkbuf;
245
246 /* first desc of the last descriptor that contains CTS */
247 struct ath_desc *axq_lastdsWithCTS;
248
249 /* final desc of the gating desc that determines whether
250 lastdsWithCTS has been DMA'ed or not */
251 struct ath_desc *axq_gatingds;
252
253 struct list_head axq_acq; 202 struct list_head axq_acq;
254}; 203};
255 204
@@ -257,30 +206,6 @@ struct ath_txq {
257#define AGGR_ADDBA_COMPLETE BIT(2) 206#define AGGR_ADDBA_COMPLETE BIT(2)
258#define AGGR_ADDBA_PROGRESS BIT(3) 207#define AGGR_ADDBA_PROGRESS BIT(3)
259 208
260struct ath_atx_tid {
261 struct list_head list;
262 struct list_head buf_q;
263 struct ath_node *an;
264 struct ath_atx_ac *ac;
265 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
266 u16 seq_start;
267 u16 seq_next;
268 u16 baw_size;
269 int tidno;
270 int baw_head; /* first un-acked tx buffer */
271 int baw_tail; /* next unused tx buffer slot */
272 int sched;
273 int paused;
274 u8 state;
275};
276
277struct ath_atx_ac {
278 int sched;
279 int qnum;
280 struct list_head list;
281 struct list_head tid_q;
282};
283
284struct ath_tx_control { 209struct ath_tx_control {
285 struct ath_txq *txq; 210 struct ath_txq *txq;
286 int if_id; 211 int if_id;
@@ -291,30 +216,6 @@ struct ath_tx_control {
291#define ATH_TX_XRETRY 0x02 216#define ATH_TX_XRETRY 0x02
292#define ATH_TX_BAR 0x04 217#define ATH_TX_BAR 0x04
293 218
294#define ATH_RSSI_LPF_LEN 10
295#define RSSI_LPF_THRESHOLD -20
296#define ATH9K_RSSI_BAD 0x80
297#define ATH_RSSI_EP_MULTIPLIER (1<<7)
298#define ATH_EP_MUL(x, mul) ((x) * (mul))
299#define ATH_RSSI_IN(x) (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER))
300#define ATH_LPF_RSSI(x, y, len) \
301 ((x != ATH_RSSI_DUMMY_MARKER) ? (((x) * ((len) - 1) + (y)) / (len)) : (y))
302#define ATH_RSSI_LPF(x, y) do { \
303 if ((y) >= RSSI_LPF_THRESHOLD) \
304 x = ATH_LPF_RSSI((x), ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \
305} while (0)
306#define ATH_EP_RND(x, mul) \
307 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
308
309struct ath_node {
310 struct ath_softc *an_sc;
311 struct ath_atx_tid tid[WME_NUM_TID];
312 struct ath_atx_ac ac[WME_NUM_AC];
313 u16 maxampdu;
314 u8 mpdudensity;
315 int last_rssi;
316};
317
318struct ath_tx { 219struct ath_tx {
319 u16 seq_no; 220 u16 seq_no;
320 u32 txqsetup; 221 u32 txqsetup;
@@ -329,7 +230,6 @@ struct ath_rx {
329 u8 defant; 230 u8 defant;
330 u8 rxotherant; 231 u8 rxotherant;
331 u32 *rxlink; 232 u32 *rxlink;
332 int bufsize;
333 unsigned int rxfilter; 233 unsigned int rxfilter;
334 spinlock_t rxflushlock; 234 spinlock_t rxflushlock;
335 spinlock_t rxbuflock; 235 spinlock_t rxbuflock;
@@ -367,6 +267,7 @@ void ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
367 u16 tid, u16 *ssn); 267 u16 tid, u16 *ssn);
368void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 268void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
369void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); 269void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
270void ath9k_enable_ps(struct ath_softc *sc);
370 271
371/********/ 272/********/
372/* VIFs */ 273/* VIFs */
@@ -427,9 +328,9 @@ struct ath_beacon {
427 328
428void ath_beacon_tasklet(unsigned long data); 329void ath_beacon_tasklet(unsigned long data);
429void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); 330void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif);
430int ath_beaconq_setup(struct ath_hw *ah);
431int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif); 331int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif);
432void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp); 332void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
333int ath_beaconq_config(struct ath_softc *sc);
433 334
434/*******/ 335/*******/
435/* ANI */ 336/* ANI */
@@ -441,16 +342,37 @@ void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp);
441#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ 342#define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */
442#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ 343#define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */
443 344
444struct ath_ani { 345void ath_ani_calibrate(unsigned long data);
445 bool caldone; 346
446 int16_t noise_floor; 347/**********/
447 unsigned int longcal_timer; 348/* BTCOEX */
448 unsigned int shortcal_timer; 349/**********/
449 unsigned int resetcal_timer; 350
450 unsigned int checkani_timer; 351/* Defines the BT AR_BT_COEX_WGHT used */
451 struct timer_list timer; 352enum ath_stomp_type {
353 ATH_BTCOEX_NO_STOMP,
354 ATH_BTCOEX_STOMP_ALL,
355 ATH_BTCOEX_STOMP_LOW,
356 ATH_BTCOEX_STOMP_NONE
452}; 357};
453 358
359struct ath_btcoex {
360 bool hw_timer_enabled;
361 spinlock_t btcoex_lock;
362 struct timer_list period_timer; /* Timer for BT period */
363 u32 bt_priority_cnt;
364 unsigned long bt_priority_time;
365 int bt_stomp_type; /* Types of BT stomping */
366 u32 btcoex_no_stomp; /* in usec */
367 u32 btcoex_period; /* in usec */
368 u32 btscan_no_stomp; /* in usec */
369 struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
370};
371
372int ath_init_btcoex_timer(struct ath_softc *sc);
373void ath9k_btcoex_timer_resume(struct ath_softc *sc);
374void ath9k_btcoex_timer_pause(struct ath_softc *sc);
375
454/********************/ 376/********************/
455/* LED Control */ 377/* LED Control */
456/********************/ 378/********************/
@@ -475,6 +397,9 @@ struct ath_led {
475 bool registered; 397 bool registered;
476}; 398};
477 399
400void ath_init_leds(struct ath_softc *sc);
401void ath_deinit_leds(struct ath_softc *sc);
402
478/********************/ 403/********************/
479/* Main driver core */ 404/* Main driver core */
480/********************/ 405/********************/
@@ -484,61 +409,46 @@ struct ath_led {
484 * Used when PCI device not fully initialized by bootrom/BIOS 409 * Used when PCI device not fully initialized by bootrom/BIOS
485*/ 410*/
486#define DEFAULT_CACHELINE 32 411#define DEFAULT_CACHELINE 32
487#define ATH_DEFAULT_NOISE_FLOOR -95
488#define ATH_REGCLASSIDS_MAX 10 412#define ATH_REGCLASSIDS_MAX 10
489#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ 413#define ATH_CABQ_READY_TIME 80 /* % of beacon interval */
490#define ATH_MAX_SW_RETRIES 10 414#define ATH_MAX_SW_RETRIES 10
491#define ATH_CHAN_MAX 255 415#define ATH_CHAN_MAX 255
492#define IEEE80211_WEP_NKID 4 /* number of key ids */ 416#define IEEE80211_WEP_NKID 4 /* number of key ids */
493 417
494/*
495 * The key cache is used for h/w cipher state and also for
496 * tracking station state such as the current tx antenna.
497 * We also setup a mapping table between key cache slot indices
498 * and station state to short-circuit node lookups on rx.
499 * Different parts have different size key caches. We handle
500 * up to ATH_KEYMAX entries (could dynamically allocate state).
501 */
502#define ATH_KEYMAX 128 /* max key cache size we handle */
503
504#define ATH_TXPOWER_MAX 100 /* .5 dBm units */ 418#define ATH_TXPOWER_MAX 100 /* .5 dBm units */
505#define ATH_RSSI_DUMMY_MARKER 0x127
506#define ATH_RATE_DUMMY_MARKER 0 419#define ATH_RATE_DUMMY_MARKER 0
507 420
508#define SC_OP_INVALID BIT(0) 421#define SC_OP_INVALID BIT(0)
509#define SC_OP_BEACONS BIT(1) 422#define SC_OP_BEACONS BIT(1)
510#define SC_OP_RXAGGR BIT(2) 423#define SC_OP_RXAGGR BIT(2)
511#define SC_OP_TXAGGR BIT(3) 424#define SC_OP_TXAGGR BIT(3)
512#define SC_OP_FULL_RESET BIT(4) 425#define SC_OP_FULL_RESET BIT(4)
513#define SC_OP_PREAMBLE_SHORT BIT(5) 426#define SC_OP_PREAMBLE_SHORT BIT(5)
514#define SC_OP_PROTECT_ENABLE BIT(6) 427#define SC_OP_PROTECT_ENABLE BIT(6)
515#define SC_OP_RXFLUSH BIT(7) 428#define SC_OP_RXFLUSH BIT(7)
516#define SC_OP_LED_ASSOCIATED BIT(8) 429#define SC_OP_LED_ASSOCIATED BIT(8)
517#define SC_OP_WAIT_FOR_BEACON BIT(12) 430#define SC_OP_LED_ON BIT(9)
518#define SC_OP_LED_ON BIT(13) 431#define SC_OP_SCANNING BIT(10)
519#define SC_OP_SCANNING BIT(14) 432#define SC_OP_TSF_RESET BIT(11)
520#define SC_OP_TSF_RESET BIT(15) 433#define SC_OP_BT_PRIORITY_DETECTED BIT(12)
521#define SC_OP_WAIT_FOR_CAB BIT(16) 434#define SC_OP_BT_SCAN BIT(13)
522#define SC_OP_WAIT_FOR_PSPOLL_DATA BIT(17) 435
523#define SC_OP_WAIT_FOR_TX_ACK BIT(18) 436/* Powersave flags */
524#define SC_OP_BEACON_SYNC BIT(19) 437#define PS_WAIT_FOR_BEACON BIT(0)
525#define SC_OP_BTCOEX_ENABLED BIT(20) 438#define PS_WAIT_FOR_CAB BIT(1)
526#define SC_OP_BT_PRIORITY_DETECTED BIT(21) 439#define PS_WAIT_FOR_PSPOLL_DATA BIT(2)
527 440#define PS_WAIT_FOR_TX_ACK BIT(3)
528struct ath_bus_ops { 441#define PS_BEACON_SYNC BIT(4)
529 void (*read_cachesize)(struct ath_softc *sc, int *csz); 442#define PS_NULLFUNC_COMPLETED BIT(5)
530 void (*cleanup)(struct ath_softc *sc); 443#define PS_ENABLED BIT(6)
531 bool (*eeprom_read)(struct ath_hw *ah, u32 off, u16 *data);
532};
533 444
534struct ath_wiphy; 445struct ath_wiphy;
446struct ath_rate_table;
535 447
536struct ath_softc { 448struct ath_softc {
537 struct ieee80211_hw *hw; 449 struct ieee80211_hw *hw;
538 struct device *dev; 450 struct device *dev;
539 451
540 struct ath_common common;
541
542 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */ 452 spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */
543 struct ath_wiphy *pri_wiphy; 453 struct ath_wiphy *pri_wiphy;
544 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may 454 struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may
@@ -561,36 +471,26 @@ struct ath_softc {
561 int irq; 471 int irq;
562 spinlock_t sc_resetlock; 472 spinlock_t sc_resetlock;
563 spinlock_t sc_serial_rw; 473 spinlock_t sc_serial_rw;
564 spinlock_t ani_lock;
565 spinlock_t sc_pm_lock; 474 spinlock_t sc_pm_lock;
566 struct mutex mutex; 475 struct mutex mutex;
567 476
568 u8 curbssid[ETH_ALEN];
569 u8 bssidmask[ETH_ALEN];
570 u32 intrstatus; 477 u32 intrstatus;
571 u32 sc_flags; /* SC_OP_* */ 478 u32 sc_flags; /* SC_OP_* */
479 u16 ps_flags; /* PS_* */
572 u16 curtxpow; 480 u16 curtxpow;
573 u16 curaid;
574 u8 nbcnvifs; 481 u8 nbcnvifs;
575 u16 nvifs; 482 u16 nvifs;
576 u8 tx_chainmask;
577 u8 rx_chainmask;
578 u32 keymax;
579 DECLARE_BITMAP(keymap, ATH_KEYMAX);
580 u8 splitmic;
581 bool ps_enabled; 483 bool ps_enabled;
484 bool ps_idle;
582 unsigned long ps_usecount; 485 unsigned long ps_usecount;
583 enum ath9k_int imask; 486 enum ath9k_int imask;
584 enum ath9k_ht_extprotspacing ht_extprotspacing;
585 enum ath9k_ht_macmode tx_chan_width;
586 487
587 struct ath_config config; 488 struct ath_config config;
588 struct ath_rx rx; 489 struct ath_rx rx;
589 struct ath_tx tx; 490 struct ath_tx tx;
590 struct ath_beacon beacon; 491 struct ath_beacon beacon;
591 struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX];
592 const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX];
593 const struct ath_rate_table *cur_rate_table; 492 const struct ath_rate_table *cur_rate_table;
493 enum wireless_mode cur_rate_mode;
594 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 494 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
595 495
596 struct ath_led radio_led; 496 struct ath_led radio_led;
@@ -605,14 +505,12 @@ struct ath_softc {
605 505
606 int beacon_interval; 506 int beacon_interval;
607 507
608 struct ath_ani ani; 508#ifdef CONFIG_ATH9K_DEBUGFS
609#ifdef CONFIG_ATH9K_DEBUG
610 struct ath9k_debug debug; 509 struct ath9k_debug debug;
611#endif 510#endif
612 struct ath_bus_ops *bus_ops;
613 struct ath_beacon_config cur_beacon_conf; 511 struct ath_beacon_config cur_beacon_conf;
614 struct delayed_work tx_complete_work; 512 struct delayed_work tx_complete_work;
615 struct ath_btcoex_info btcoex_info; 513 struct ath_btcoex btcoex;
616}; 514};
617 515
618struct ath_wiphy { 516struct ath_wiphy {
@@ -625,51 +523,41 @@ struct ath_wiphy {
625 ATH_WIPHY_PAUSED, 523 ATH_WIPHY_PAUSED,
626 ATH_WIPHY_SCAN, 524 ATH_WIPHY_SCAN,
627 } state; 525 } state;
526 bool idle;
628 int chan_idx; 527 int chan_idx;
629 int chan_is_ht; 528 int chan_is_ht;
630}; 529};
631 530
531void ath9k_tasklet(unsigned long data);
632int ath_reset(struct ath_softc *sc, bool retry_tx); 532int ath_reset(struct ath_softc *sc, bool retry_tx);
633int ath_get_hal_qnum(u16 queue, struct ath_softc *sc); 533int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
634int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc); 534int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
635int ath_cabq_update(struct ath_softc *); 535int ath_cabq_update(struct ath_softc *);
636 536
637static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) 537static inline void ath_read_cachesize(struct ath_common *common, int *csz)
638{ 538{
639 return &ah->ah_sc->common; 539 common->bus_ops->read_cachesize(common, csz);
640}
641
642static inline struct ath_regulatory *ath9k_hw_regulatory(struct ath_hw *ah)
643{
644 return &(ath9k_hw_common(ah)->regulatory);
645}
646
647static inline void ath_read_cachesize(struct ath_softc *sc, int *csz)
648{
649 sc->bus_ops->read_cachesize(sc, csz);
650}
651
652static inline void ath_bus_cleanup(struct ath_softc *sc)
653{
654 sc->bus_ops->cleanup(sc);
655} 540}
656 541
657extern struct ieee80211_ops ath9k_ops; 542extern struct ieee80211_ops ath9k_ops;
543extern int modparam_nohwcrypt;
658 544
659irqreturn_t ath_isr(int irq, void *dev); 545irqreturn_t ath_isr(int irq, void *dev);
660void ath_cleanup(struct ath_softc *sc); 546int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
661int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid); 547 const struct ath_bus_ops *bus_ops);
662void ath_detach(struct ath_softc *sc); 548void ath9k_deinit_device(struct ath_softc *sc);
663const char *ath_mac_bb_name(u32 mac_bb_version); 549const char *ath_mac_bb_name(u32 mac_bb_version);
664const char *ath_rf_name(u16 rf_version); 550const char *ath_rf_name(u16 rf_version);
665void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); 551void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
666void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, 552void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
667 struct ath9k_channel *ichan); 553 struct ath9k_channel *ichan);
668void ath_update_chainmask(struct ath_softc *sc, int is_ht); 554void ath_update_chainmask(struct ath_softc *sc, int is_ht);
669int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, 555int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
670 struct ath9k_channel *hchan); 556 struct ath9k_channel *hchan);
671void ath_radio_enable(struct ath_softc *sc); 557
672void ath_radio_disable(struct ath_softc *sc); 558void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw);
559void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw);
560bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode);
673 561
674#ifdef CONFIG_PCI 562#ifdef CONFIG_PCI
675int ath_pci_init(void); 563int ath_pci_init(void);
@@ -705,9 +593,14 @@ void ath9k_wiphy_pause_all_forced(struct ath_softc *sc,
705bool ath9k_wiphy_scanning(struct ath_softc *sc); 593bool ath9k_wiphy_scanning(struct ath_softc *sc);
706void ath9k_wiphy_work(struct work_struct *work); 594void ath9k_wiphy_work(struct work_struct *work);
707bool ath9k_all_wiphys_idle(struct ath_softc *sc); 595bool ath9k_all_wiphys_idle(struct ath_softc *sc);
596void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle);
708 597
709void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val); 598void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue);
710unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset); 599void ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue);
711 600
712int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype); 601int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype);
602
603void ath_start_rfkill_poll(struct ath_softc *sc);
604extern void ath9k_rfkill_poll_state(struct ieee80211_hw *hw);
605
713#endif /* ATH9K_H */ 606#endif /* ATH9K_H */
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index 45c4ea57616b..b4a31a43a62c 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -23,10 +23,12 @@
23 * the operating mode of the station (AP or AdHoc). Parameters are AIFS 23 * the operating mode of the station (AP or AdHoc). Parameters are AIFS
24 * settings and channel width min/max 24 * settings and channel width min/max
25*/ 25*/
26static int ath_beaconq_config(struct ath_softc *sc) 26int ath_beaconq_config(struct ath_softc *sc)
27{ 27{
28 struct ath_hw *ah = sc->sc_ah; 28 struct ath_hw *ah = sc->sc_ah;
29 struct ath9k_tx_queue_info qi; 29 struct ath_common *common = ath9k_hw_common(ah);
30 struct ath9k_tx_queue_info qi, qi_be;
31 int qnum;
30 32
31 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi); 33 ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
32 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) { 34 if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) {
@@ -36,14 +38,17 @@ static int ath_beaconq_config(struct ath_softc *sc)
36 qi.tqi_cwmax = 0; 38 qi.tqi_cwmax = 0;
37 } else { 39 } else {
38 /* Adhoc mode; important thing is to use 2x cwmin. */ 40 /* Adhoc mode; important thing is to use 2x cwmin. */
39 qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs; 41 qnum = ath_tx_get_qnum(sc, ATH9K_TX_QUEUE_DATA,
40 qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin; 42 ATH9K_WME_AC_BE);
41 qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax; 43 ath9k_hw_get_txq_props(ah, qnum, &qi_be);
44 qi.tqi_aifs = qi_be.tqi_aifs;
45 qi.tqi_cwmin = 4*qi_be.tqi_cwmin;
46 qi.tqi_cwmax = qi_be.tqi_cwmax;
42 } 47 }
43 48
44 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) { 49 if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
45 DPRINTF(sc, ATH_DBG_FATAL, 50 ath_print(common, ATH_DBG_FATAL,
46 "Unable to update h/w beacon queue parameters\n"); 51 "Unable to update h/w beacon queue parameters\n");
47 return 0; 52 return 0;
48 } else { 53 } else {
49 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); 54 ath9k_hw_resettxqueue(ah, sc->beacon.beaconq);
@@ -57,15 +62,16 @@ static int ath_beaconq_config(struct ath_softc *sc)
57 * Beacons are always sent out at the lowest rate, and are not retried. 62 * Beacons are always sent out at the lowest rate, and are not retried.
58*/ 63*/
59static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp, 64static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
60 struct ath_buf *bf) 65 struct ath_buf *bf, int rateidx)
61{ 66{
62 struct sk_buff *skb = bf->bf_mpdu; 67 struct sk_buff *skb = bf->bf_mpdu;
63 struct ath_hw *ah = sc->sc_ah; 68 struct ath_hw *ah = sc->sc_ah;
69 struct ath_common *common = ath9k_hw_common(ah);
64 struct ath_desc *ds; 70 struct ath_desc *ds;
65 struct ath9k_11n_rate_series series[4]; 71 struct ath9k_11n_rate_series series[4];
66 const struct ath_rate_table *rt;
67 int flags, antenna, ctsrate = 0, ctsduration = 0; 72 int flags, antenna, ctsrate = 0, ctsduration = 0;
68 u8 rate; 73 struct ieee80211_supported_band *sband;
74 u8 rate = 0;
69 75
70 ds = bf->bf_desc; 76 ds = bf->bf_desc;
71 flags = ATH9K_TXDESC_NOACK; 77 flags = ATH9K_TXDESC_NOACK;
@@ -89,10 +95,10 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
89 95
90 ds->ds_data = bf->bf_buf_addr; 96 ds->ds_data = bf->bf_buf_addr;
91 97
92 rt = sc->cur_rate_table; 98 sband = &sc->sbands[common->hw->conf.channel->band];
93 rate = rt->info[0].ratecode; 99 rate = sband->bitrates[rateidx].hw_value;
94 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) 100 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
95 rate |= rt->info[0].short_preamble; 101 rate |= sband->bitrates[rateidx].hw_value_short;
96 102
97 ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN, 103 ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN,
98 ATH9K_PKT_TYPE_BEACON, 104 ATH9K_PKT_TYPE_BEACON,
@@ -108,7 +114,7 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
108 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4); 114 memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
109 series[0].Tries = 1; 115 series[0].Tries = 1;
110 series[0].Rate = rate; 116 series[0].Rate = rate;
111 series[0].ChSel = sc->tx_chainmask; 117 series[0].ChSel = common->tx_chainmask;
112 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0; 118 series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
113 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration, 119 ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration,
114 series, 4, 0); 120 series, 4, 0);
@@ -119,6 +125,7 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
119{ 125{
120 struct ath_wiphy *aphy = hw->priv; 126 struct ath_wiphy *aphy = hw->priv;
121 struct ath_softc *sc = aphy->sc; 127 struct ath_softc *sc = aphy->sc;
128 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
122 struct ath_buf *bf; 129 struct ath_buf *bf;
123 struct ath_vif *avp; 130 struct ath_vif *avp;
124 struct sk_buff *skb; 131 struct sk_buff *skb;
@@ -172,7 +179,8 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
172 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { 179 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
173 dev_kfree_skb_any(skb); 180 dev_kfree_skb_any(skb);
174 bf->bf_mpdu = NULL; 181 bf->bf_mpdu = NULL;
175 DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error on beaconing\n"); 182 ath_print(common, ATH_DBG_FATAL,
183 "dma_mapping_error on beaconing\n");
176 return NULL; 184 return NULL;
177 } 185 }
178 186
@@ -192,13 +200,13 @@ static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
192 200
193 if (skb && cabq_depth) { 201 if (skb && cabq_depth) {
194 if (sc->nvifs > 1) { 202 if (sc->nvifs > 1) {
195 DPRINTF(sc, ATH_DBG_BEACON, 203 ath_print(common, ATH_DBG_BEACON,
196 "Flushing previous cabq traffic\n"); 204 "Flushing previous cabq traffic\n");
197 ath_draintxq(sc, cabq, false); 205 ath_draintxq(sc, cabq, false);
198 } 206 }
199 } 207 }
200 208
201 ath_beacon_setup(sc, avp, bf); 209 ath_beacon_setup(sc, avp, bf, info->control.rates[0].idx);
202 210
203 while (skb) { 211 while (skb) {
204 ath_tx_cabq(hw, skb); 212 ath_tx_cabq(hw, skb);
@@ -216,6 +224,7 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc,
216 struct ieee80211_vif *vif) 224 struct ieee80211_vif *vif)
217{ 225{
218 struct ath_hw *ah = sc->sc_ah; 226 struct ath_hw *ah = sc->sc_ah;
227 struct ath_common *common = ath9k_hw_common(ah);
219 struct ath_buf *bf; 228 struct ath_buf *bf;
220 struct ath_vif *avp; 229 struct ath_vif *avp;
221 struct sk_buff *skb; 230 struct sk_buff *skb;
@@ -228,30 +237,19 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc,
228 bf = avp->av_bcbuf; 237 bf = avp->av_bcbuf;
229 skb = bf->bf_mpdu; 238 skb = bf->bf_mpdu;
230 239
231 ath_beacon_setup(sc, avp, bf); 240 ath_beacon_setup(sc, avp, bf, 0);
232 241
233 /* NB: caller is known to have already stopped tx dma */ 242 /* NB: caller is known to have already stopped tx dma */
234 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr); 243 ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
235 ath9k_hw_txstart(ah, sc->beacon.beaconq); 244 ath9k_hw_txstart(ah, sc->beacon.beaconq);
236 DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n", 245 ath_print(common, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
237 sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc); 246 sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
238}
239
240int ath_beaconq_setup(struct ath_hw *ah)
241{
242 struct ath9k_tx_queue_info qi;
243
244 memset(&qi, 0, sizeof(qi));
245 qi.tqi_aifs = 1;
246 qi.tqi_cwmin = 0;
247 qi.tqi_cwmax = 0;
248 /* NB: don't enable any interrupts */
249 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
250} 247}
251 248
252int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif) 249int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
253{ 250{
254 struct ath_softc *sc = aphy->sc; 251 struct ath_softc *sc = aphy->sc;
252 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
255 struct ath_vif *avp; 253 struct ath_vif *avp;
256 struct ath_buf *bf; 254 struct ath_buf *bf;
257 struct sk_buff *skb; 255 struct sk_buff *skb;
@@ -309,7 +307,7 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
309 /* NB: the beacon data buffer must be 32-bit aligned. */ 307 /* NB: the beacon data buffer must be 32-bit aligned. */
310 skb = ieee80211_beacon_get(sc->hw, vif); 308 skb = ieee80211_beacon_get(sc->hw, vif);
311 if (skb == NULL) { 309 if (skb == NULL) {
312 DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n"); 310 ath_print(common, ATH_DBG_BEACON, "cannot get skb\n");
313 return -ENOMEM; 311 return -ENOMEM;
314 } 312 }
315 313
@@ -333,9 +331,10 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
333 tsfadjust = intval * avp->av_bslot / ATH_BCBUF; 331 tsfadjust = intval * avp->av_bslot / ATH_BCBUF;
334 avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust)); 332 avp->tsf_adjust = cpu_to_le64(TU_TO_USEC(tsfadjust));
335 333
336 DPRINTF(sc, ATH_DBG_BEACON, 334 ath_print(common, ATH_DBG_BEACON,
337 "stagger beacons, bslot %d intval %u tsfadjust %llu\n", 335 "stagger beacons, bslot %d intval "
338 avp->av_bslot, intval, (unsigned long long)tsfadjust); 336 "%u tsfadjust %llu\n",
337 avp->av_bslot, intval, (unsigned long long)tsfadjust);
339 338
340 ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp = 339 ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp =
341 avp->tsf_adjust; 340 avp->tsf_adjust;
@@ -349,8 +348,8 @@ int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif)
349 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) { 348 if (unlikely(dma_mapping_error(sc->dev, bf->bf_buf_addr))) {
350 dev_kfree_skb_any(skb); 349 dev_kfree_skb_any(skb);
351 bf->bf_mpdu = NULL; 350 bf->bf_mpdu = NULL;
352 DPRINTF(sc, ATH_DBG_FATAL, 351 ath_print(common, ATH_DBG_FATAL,
353 "dma_mapping_error on beacon alloc\n"); 352 "dma_mapping_error on beacon alloc\n");
354 return -ENOMEM; 353 return -ENOMEM;
355 } 354 }
356 355
@@ -386,6 +385,7 @@ void ath_beacon_tasklet(unsigned long data)
386{ 385{
387 struct ath_softc *sc = (struct ath_softc *)data; 386 struct ath_softc *sc = (struct ath_softc *)data;
388 struct ath_hw *ah = sc->sc_ah; 387 struct ath_hw *ah = sc->sc_ah;
388 struct ath_common *common = ath9k_hw_common(ah);
389 struct ath_buf *bf = NULL; 389 struct ath_buf *bf = NULL;
390 struct ieee80211_vif *vif; 390 struct ieee80211_vif *vif;
391 struct ath_wiphy *aphy; 391 struct ath_wiphy *aphy;
@@ -405,12 +405,12 @@ void ath_beacon_tasklet(unsigned long data)
405 sc->beacon.bmisscnt++; 405 sc->beacon.bmisscnt++;
406 406
407 if (sc->beacon.bmisscnt < BSTUCK_THRESH) { 407 if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
408 DPRINTF(sc, ATH_DBG_BEACON, 408 ath_print(common, ATH_DBG_BEACON,
409 "missed %u consecutive beacons\n", 409 "missed %u consecutive beacons\n",
410 sc->beacon.bmisscnt); 410 sc->beacon.bmisscnt);
411 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) { 411 } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
412 DPRINTF(sc, ATH_DBG_BEACON, 412 ath_print(common, ATH_DBG_BEACON,
413 "beacon is officially stuck\n"); 413 "beacon is officially stuck\n");
414 sc->sc_flags |= SC_OP_TSF_RESET; 414 sc->sc_flags |= SC_OP_TSF_RESET;
415 ath_reset(sc, false); 415 ath_reset(sc, false);
416 } 416 }
@@ -419,9 +419,9 @@ void ath_beacon_tasklet(unsigned long data)
419 } 419 }
420 420
421 if (sc->beacon.bmisscnt != 0) { 421 if (sc->beacon.bmisscnt != 0) {
422 DPRINTF(sc, ATH_DBG_BEACON, 422 ath_print(common, ATH_DBG_BEACON,
423 "resume beacon xmit after %u misses\n", 423 "resume beacon xmit after %u misses\n",
424 sc->beacon.bmisscnt); 424 sc->beacon.bmisscnt);
425 sc->beacon.bmisscnt = 0; 425 sc->beacon.bmisscnt = 0;
426 } 426 }
427 427
@@ -447,9 +447,9 @@ void ath_beacon_tasklet(unsigned long data)
447 vif = sc->beacon.bslot[slot]; 447 vif = sc->beacon.bslot[slot];
448 aphy = sc->beacon.bslot_aphy[slot]; 448 aphy = sc->beacon.bslot_aphy[slot];
449 449
450 DPRINTF(sc, ATH_DBG_BEACON, 450 ath_print(common, ATH_DBG_BEACON,
451 "slot %d [tsf %llu tsftu %u intval %u] vif %p\n", 451 "slot %d [tsf %llu tsftu %u intval %u] vif %p\n",
452 slot, tsf, tsftu, intval, vif); 452 slot, tsf, tsftu, intval, vif);
453 453
454 bfaddr = 0; 454 bfaddr = 0;
455 if (vif) { 455 if (vif) {
@@ -480,7 +480,8 @@ void ath_beacon_tasklet(unsigned long data)
480 sc->beacon.updateslot = COMMIT; /* commit next beacon */ 480 sc->beacon.updateslot = COMMIT; /* commit next beacon */
481 sc->beacon.slotupdate = slot; 481 sc->beacon.slotupdate = slot;
482 } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) { 482 } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
483 ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime); 483 ah->slottime = sc->beacon.slottime;
484 ath9k_hw_init_global_settings(ah);
484 sc->beacon.updateslot = OK; 485 sc->beacon.updateslot = OK;
485 } 486 }
486 if (bfaddr != 0) { 487 if (bfaddr != 0) {
@@ -490,7 +491,7 @@ void ath_beacon_tasklet(unsigned long data)
490 * are still pending on the queue. 491 * are still pending on the queue.
491 */ 492 */
492 if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) { 493 if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
493 DPRINTF(sc, ATH_DBG_FATAL, 494 ath_print(common, ATH_DBG_FATAL,
494 "beacon queue %u did not stop?\n", sc->beacon.beaconq); 495 "beacon queue %u did not stop?\n", sc->beacon.beaconq);
495 } 496 }
496 497
@@ -502,6 +503,19 @@ void ath_beacon_tasklet(unsigned long data)
502 } 503 }
503} 504}
504 505
506static void ath9k_beacon_init(struct ath_softc *sc,
507 u32 next_beacon,
508 u32 beacon_period)
509{
510 if (beacon_period & ATH9K_BEACON_RESET_TSF)
511 ath9k_ps_wakeup(sc);
512
513 ath9k_hw_beaconinit(sc->sc_ah, next_beacon, beacon_period);
514
515 if (beacon_period & ATH9K_BEACON_RESET_TSF)
516 ath9k_ps_restore(sc);
517}
518
505/* 519/*
506 * For multi-bss ap support beacons are either staggered evenly over N slots or 520 * For multi-bss ap support beacons are either staggered evenly over N slots or
507 * burst together. For the former arrange for the SWBA to be delivered for each 521 * burst together. For the former arrange for the SWBA to be delivered for each
@@ -512,16 +526,13 @@ static void ath_beacon_config_ap(struct ath_softc *sc,
512{ 526{
513 u32 nexttbtt, intval; 527 u32 nexttbtt, intval;
514 528
515 /* Configure the timers only when the TSF has to be reset */
516
517 if (!(sc->sc_flags & SC_OP_TSF_RESET))
518 return;
519
520 /* NB: the beacon interval is kept internally in TU's */ 529 /* NB: the beacon interval is kept internally in TU's */
521 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; 530 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
522 intval /= ATH_BCBUF; /* for staggered beacons */ 531 intval /= ATH_BCBUF; /* for staggered beacons */
523 nexttbtt = intval; 532 nexttbtt = intval;
524 intval |= ATH9K_BEACON_RESET_TSF; 533
534 if (sc->sc_flags & SC_OP_TSF_RESET)
535 intval |= ATH9K_BEACON_RESET_TSF;
525 536
526 /* 537 /*
527 * In AP mode we enable the beacon timers and SWBA interrupts to 538 * In AP mode we enable the beacon timers and SWBA interrupts to
@@ -534,7 +545,7 @@ static void ath_beacon_config_ap(struct ath_softc *sc,
534 /* Set the computed AP beacon timers */ 545 /* Set the computed AP beacon timers */
535 546
536 ath9k_hw_set_interrupts(sc->sc_ah, 0); 547 ath9k_hw_set_interrupts(sc->sc_ah, 0);
537 ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); 548 ath9k_beacon_init(sc, nexttbtt, intval);
538 sc->beacon.bmisscnt = 0; 549 sc->beacon.bmisscnt = 0;
539 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 550 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
540 551
@@ -555,6 +566,7 @@ static void ath_beacon_config_ap(struct ath_softc *sc,
555static void ath_beacon_config_sta(struct ath_softc *sc, 566static void ath_beacon_config_sta(struct ath_softc *sc,
556 struct ath_beacon_config *conf) 567 struct ath_beacon_config *conf)
557{ 568{
569 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
558 struct ath9k_beacon_state bs; 570 struct ath9k_beacon_state bs;
559 int dtimperiod, dtimcount, sleepduration; 571 int dtimperiod, dtimcount, sleepduration;
560 int cfpperiod, cfpcount; 572 int cfpperiod, cfpcount;
@@ -562,6 +574,13 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
562 u64 tsf; 574 u64 tsf;
563 int num_beacons, offset, dtim_dec_count, cfp_dec_count; 575 int num_beacons, offset, dtim_dec_count, cfp_dec_count;
564 576
577 /* No need to configure beacon if we are not associated */
578 if (!common->curaid) {
579 ath_print(common, ATH_DBG_BEACON,
580 "STA is not yet associated..skipping beacon config\n");
581 return;
582 }
583
565 memset(&bs, 0, sizeof(bs)); 584 memset(&bs, 0, sizeof(bs));
566 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD; 585 intval = conf->beacon_interval & ATH9K_BEACON_PERIOD;
567 586
@@ -651,11 +670,11 @@ static void ath_beacon_config_sta(struct ath_softc *sc,
651 /* TSF out of range threshold fixed at 1 second */ 670 /* TSF out of range threshold fixed at 1 second */
652 bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD; 671 bs.bs_tsfoor_threshold = ATH9K_TSFOOR_THRESHOLD;
653 672
654 DPRINTF(sc, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu); 673 ath_print(common, ATH_DBG_BEACON, "tsf: %llu tsftu: %u\n", tsf, tsftu);
655 DPRINTF(sc, ATH_DBG_BEACON, 674 ath_print(common, ATH_DBG_BEACON,
656 "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n", 675 "bmiss: %u sleep: %u cfp-period: %u maxdur: %u next: %u\n",
657 bs.bs_bmissthreshold, bs.bs_sleepduration, 676 bs.bs_bmissthreshold, bs.bs_sleepduration,
658 bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext); 677 bs.bs_cfpperiod, bs.bs_cfpmaxduration, bs.bs_cfpnext);
659 678
660 /* Set the computed STA beacon timers */ 679 /* Set the computed STA beacon timers */
661 680
@@ -669,6 +688,7 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
669 struct ath_beacon_config *conf, 688 struct ath_beacon_config *conf,
670 struct ieee80211_vif *vif) 689 struct ieee80211_vif *vif)
671{ 690{
691 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
672 u64 tsf; 692 u64 tsf;
673 u32 tsftu, intval, nexttbtt; 693 u32 tsftu, intval, nexttbtt;
674 694
@@ -689,9 +709,9 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
689 nexttbtt += intval; 709 nexttbtt += intval;
690 } while (nexttbtt < tsftu); 710 } while (nexttbtt < tsftu);
691 711
692 DPRINTF(sc, ATH_DBG_BEACON, 712 ath_print(common, ATH_DBG_BEACON,
693 "IBSS nexttbtt %u intval %u (%u)\n", 713 "IBSS nexttbtt %u intval %u (%u)\n",
694 nexttbtt, intval, conf->beacon_interval); 714 nexttbtt, intval, conf->beacon_interval);
695 715
696 /* 716 /*
697 * In IBSS mode enable the beacon timers but only enable SWBA interrupts 717 * In IBSS mode enable the beacon timers but only enable SWBA interrupts
@@ -707,7 +727,7 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
707 /* Set the computed ADHOC beacon timers */ 727 /* Set the computed ADHOC beacon timers */
708 728
709 ath9k_hw_set_interrupts(sc->sc_ah, 0); 729 ath9k_hw_set_interrupts(sc->sc_ah, 0);
710 ath9k_hw_beaconinit(sc->sc_ah, nexttbtt, intval); 730 ath9k_beacon_init(sc, nexttbtt, intval);
711 sc->beacon.bmisscnt = 0; 731 sc->beacon.bmisscnt = 0;
712 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 732 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
713 733
@@ -719,10 +739,10 @@ static void ath_beacon_config_adhoc(struct ath_softc *sc,
719void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif) 739void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
720{ 740{
721 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf; 741 struct ath_beacon_config *cur_conf = &sc->cur_beacon_conf;
742 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
722 enum nl80211_iftype iftype; 743 enum nl80211_iftype iftype;
723 744
724 /* Setup the beacon configuration parameters */ 745 /* Setup the beacon configuration parameters */
725
726 if (vif) { 746 if (vif) {
727 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; 747 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
728 748
@@ -759,8 +779,8 @@ void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif)
759 ath_beacon_config_sta(sc, cur_conf); 779 ath_beacon_config_sta(sc, cur_conf);
760 break; 780 break;
761 default: 781 default:
762 DPRINTF(sc, ATH_DBG_CONFIG, 782 ath_print(common, ATH_DBG_CONFIG,
763 "Unsupported beaconing mode\n"); 783 "Unsupported beaconing mode\n");
764 return; 784 return;
765 } 785 }
766 786
diff --git a/drivers/net/wireless/ath/ath9k/btcoex.c b/drivers/net/wireless/ath/ath9k/btcoex.c
index 55f607b7699e..fb4ac15f3b93 100644
--- a/drivers/net/wireless/ath/ath9k/btcoex.c
+++ b/drivers/net/wireless/ath/ath9k/btcoex.c
@@ -14,10 +14,26 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static const struct ath_btcoex_config ath_bt_config = { 0, true, true, 19enum ath_bt_mode {
20 ATH_BT_COEX_MODE_SLOTTED, true, true, 2, 5, true }; 20 ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
21 ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
22 ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
23 ATH_BT_COEX_MODE_DISALBED, /* coexistence disabled */
24};
25
26struct ath_btcoex_config {
27 u8 bt_time_extend;
28 bool bt_txstate_extend;
29 bool bt_txframe_extend;
30 enum ath_bt_mode bt_mode; /* coexistence mode */
31 bool bt_quiet_collision;
32 bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
33 u8 bt_priority_time;
34 u8 bt_first_slot_time;
35 bool bt_hold_rx_clear;
36};
21 37
22static const u16 ath_subsysid_tbl[] = { 38static const u16 ath_subsysid_tbl[] = {
23 AR9280_COEX2WIRE_SUBSYSID, 39 AR9280_COEX2WIRE_SUBSYSID,
@@ -29,141 +45,38 @@ static const u16 ath_subsysid_tbl[] = {
29 * Checks the subsystem id of the device to see if it 45 * Checks the subsystem id of the device to see if it
30 * supports btcoex 46 * supports btcoex
31 */ 47 */
32bool ath_btcoex_supported(u16 subsysid) 48bool ath9k_hw_btcoex_supported(struct ath_hw *ah)
33{ 49{
34 int i; 50 int i;
35 51
36 if (!subsysid) 52 if (!ah->hw_version.subsysid)
37 return false; 53 return false;
38 54
39 for (i = 0; i < ARRAY_SIZE(ath_subsysid_tbl); i++) 55 for (i = 0; i < ARRAY_SIZE(ath_subsysid_tbl); i++)
40 if (subsysid == ath_subsysid_tbl[i]) 56 if (ah->hw_version.subsysid == ath_subsysid_tbl[i])
41 return true; 57 return true;
42 58
43 return false; 59 return false;
44} 60}
45 61
46/* 62void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum)
47 * Detects if there is any priority bt traffic
48 */
49static void ath_detect_bt_priority(struct ath_softc *sc)
50{
51 struct ath_btcoex_info *btinfo = &sc->btcoex_info;
52
53 if (ath9k_hw_gpio_get(sc->sc_ah, btinfo->btpriority_gpio))
54 btinfo->bt_priority_cnt++;
55
56 if (time_after(jiffies, btinfo->bt_priority_time +
57 msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
58 if (btinfo->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
59 DPRINTF(sc, ATH_DBG_BTCOEX,
60 "BT priority traffic detected");
61 sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
62 } else {
63 sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED;
64 }
65
66 btinfo->bt_priority_cnt = 0;
67 btinfo->bt_priority_time = jiffies;
68 }
69}
70
71/*
72 * Configures appropriate weight based on stomp type.
73 */
74static void ath_btcoex_bt_stomp(struct ath_softc *sc,
75 struct ath_btcoex_info *btinfo,
76 int stomp_type)
77{
78
79 switch (stomp_type) {
80 case ATH_BTCOEX_STOMP_ALL:
81 ath_btcoex_set_weight(btinfo, AR_BT_COEX_WGHT,
82 AR_STOMP_ALL_WLAN_WGHT);
83 break;
84 case ATH_BTCOEX_STOMP_LOW:
85 ath_btcoex_set_weight(btinfo, AR_BT_COEX_WGHT,
86 AR_STOMP_LOW_WLAN_WGHT);
87 break;
88 case ATH_BTCOEX_STOMP_NONE:
89 ath_btcoex_set_weight(btinfo, AR_BT_COEX_WGHT,
90 AR_STOMP_NONE_WLAN_WGHT);
91 break;
92 default:
93 DPRINTF(sc, ATH_DBG_BTCOEX, "Invalid Stomptype\n");
94 break;
95 }
96
97 ath9k_hw_btcoex_enable(sc->sc_ah);
98}
99
100/*
101 * This is the master bt coex timer which runs for every
102 * 45ms, bt traffic will be given priority during 55% of this
103 * period while wlan gets remaining 45%
104 */
105
106static void ath_btcoex_period_timer(unsigned long data)
107{
108 struct ath_softc *sc = (struct ath_softc *) data;
109 struct ath_btcoex_info *btinfo = &sc->btcoex_info;
110
111 ath_detect_bt_priority(sc);
112
113 spin_lock_bh(&btinfo->btcoex_lock);
114
115 ath_btcoex_bt_stomp(sc, btinfo, btinfo->bt_stomp_type);
116
117 spin_unlock_bh(&btinfo->btcoex_lock);
118
119 if (btinfo->btcoex_period != btinfo->btcoex_no_stomp) {
120 if (btinfo->hw_timer_enabled)
121 ath_gen_timer_stop(sc->sc_ah, btinfo->no_stomp_timer);
122
123 ath_gen_timer_start(sc->sc_ah,
124 btinfo->no_stomp_timer,
125 (ath9k_hw_gettsf32(sc->sc_ah) +
126 btinfo->btcoex_no_stomp),
127 btinfo->btcoex_no_stomp * 10);
128 btinfo->hw_timer_enabled = true;
129 }
130
131 mod_timer(&btinfo->period_timer, jiffies +
132 msecs_to_jiffies(ATH_BTCOEX_DEF_BT_PERIOD));
133}
134
135/*
136 * Generic tsf based hw timer which configures weight
137 * registers to time slice between wlan and bt traffic
138 */
139
140static void ath_btcoex_no_stomp_timer(void *arg)
141{
142 struct ath_softc *sc = (struct ath_softc *)arg;
143 struct ath_btcoex_info *btinfo = &sc->btcoex_info;
144
145 DPRINTF(sc, ATH_DBG_BTCOEX, "no stomp timer running \n");
146
147 spin_lock_bh(&btinfo->btcoex_lock);
148
149 if (btinfo->bt_stomp_type == ATH_BTCOEX_STOMP_LOW)
150 ath_btcoex_bt_stomp(sc, btinfo, ATH_BTCOEX_STOMP_NONE);
151 else if (btinfo->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
152 ath_btcoex_bt_stomp(sc, btinfo, ATH_BTCOEX_STOMP_LOW);
153
154 spin_unlock_bh(&btinfo->btcoex_lock);
155}
156
157static int ath_init_btcoex_info(struct ath_hw *hw,
158 struct ath_btcoex_info *btcoex_info)
159{ 63{
64 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
65 const struct ath_btcoex_config ath_bt_config = {
66 .bt_time_extend = 0,
67 .bt_txstate_extend = true,
68 .bt_txframe_extend = true,
69 .bt_mode = ATH_BT_COEX_MODE_SLOTTED,
70 .bt_quiet_collision = true,
71 .bt_rxclear_polarity = true,
72 .bt_priority_time = 2,
73 .bt_first_slot_time = 5,
74 .bt_hold_rx_clear = true,
75 };
160 u32 i; 76 u32 i;
161 int qnum;
162 77
163 qnum = ath_tx_get_qnum(hw->ah_sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE); 78 btcoex_hw->bt_coex_mode =
164 79 (btcoex_hw->bt_coex_mode & AR_BT_QCU_THRESH) |
165 btcoex_info->bt_coex_mode =
166 (btcoex_info->bt_coex_mode & AR_BT_QCU_THRESH) |
167 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) | 80 SM(ath_bt_config.bt_time_extend, AR_BT_TIME_EXTEND) |
168 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) | 81 SM(ath_bt_config.bt_txstate_extend, AR_BT_TXSTATE_EXTEND) |
169 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) | 82 SM(ath_bt_config.bt_txframe_extend, AR_BT_TX_FRAME_EXTEND) |
@@ -174,167 +87,141 @@ static int ath_init_btcoex_info(struct ath_hw *hw,
174 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) | 87 SM(ath_bt_config.bt_first_slot_time, AR_BT_FIRST_SLOT_TIME) |
175 SM(qnum, AR_BT_QCU_THRESH); 88 SM(qnum, AR_BT_QCU_THRESH);
176 89
177 btcoex_info->bt_coex_mode2 = 90 btcoex_hw->bt_coex_mode2 =
178 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) | 91 SM(ath_bt_config.bt_hold_rx_clear, AR_BT_HOLD_RX_CLEAR) |
179 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) | 92 SM(ATH_BTCOEX_BMISS_THRESH, AR_BT_BCN_MISS_THRESH) |
180 AR_BT_DISABLE_BT_ANT; 93 AR_BT_DISABLE_BT_ANT;
181 94
182 btcoex_info->bt_stomp_type = ATH_BTCOEX_STOMP_LOW; 95 for (i = 0; i < 32; i++)
96 ah->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i;
97}
98EXPORT_SYMBOL(ath9k_hw_init_btcoex_hw);
183 99
184 btcoex_info->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000; 100void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah)
101{
102 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
185 103
186 btcoex_info->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) * 104 /* connect bt_active to baseband */
187 btcoex_info->btcoex_period / 100; 105 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
106 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
107 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
188 108
189 for (i = 0; i < 32; i++) 109 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
190 hw->hw_gen_timers.gen_timer_index[(debruijn32 << i) >> 27] = i; 110 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
191 111
192 setup_timer(&btcoex_info->period_timer, ath_btcoex_period_timer, 112 /* Set input mux for bt_active to gpio pin */
193 (unsigned long) hw->ah_sc); 113 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
114 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
115 btcoex_hw->btactive_gpio);
194 116
195 btcoex_info->no_stomp_timer = ath_gen_timer_alloc(hw, 117 /* Configure the desired gpio port for input */
196 ath_btcoex_no_stomp_timer, 118 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
197 ath_btcoex_no_stomp_timer, 119}
198 (void *)hw->ah_sc, AR_FIRST_NDP_TIMER); 120EXPORT_SYMBOL(ath9k_hw_btcoex_init_2wire);
121
122void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah)
123{
124 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
199 125
200 if (btcoex_info->no_stomp_timer == NULL) 126 /* btcoex 3-wire */
201 return -ENOMEM; 127 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
128 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
129 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
202 130
203 spin_lock_init(&btcoex_info->btcoex_lock); 131 /* Set input mux for bt_prority_async and
132 * bt_active_async to GPIO pins */
133 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
134 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
135 btcoex_hw->btactive_gpio);
204 136
205 return 0; 137 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
138 AR_GPIO_INPUT_MUX1_BT_PRIORITY,
139 btcoex_hw->btpriority_gpio);
140
141 /* Configure the desired GPIO ports for input */
142
143 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btactive_gpio);
144 ath9k_hw_cfg_gpio_input(ah, btcoex_hw->btpriority_gpio);
206} 145}
146EXPORT_SYMBOL(ath9k_hw_btcoex_init_3wire);
207 147
208int ath9k_hw_btcoex_init(struct ath_hw *ah) 148static void ath9k_hw_btcoex_enable_2wire(struct ath_hw *ah)
209{ 149{
210 struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info; 150 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
211 int ret = 0;
212
213 if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
214 /* connect bt_active to baseband */
215 REG_CLR_BIT(ah, AR_GPIO_INPUT_EN_VAL,
216 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_DEF |
217 AR_GPIO_INPUT_EN_VAL_BT_FREQUENCY_DEF));
218
219 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
220 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB);
221
222 /* Set input mux for bt_active to gpio pin */
223 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
224 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
225 btcoex_info->btactive_gpio);
226
227 /* Configure the desired gpio port for input */
228 ath9k_hw_cfg_gpio_input(ah, btcoex_info->btactive_gpio);
229 } else {
230 /* btcoex 3-wire */
231 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
232 (AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB |
233 AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB));
234
235 /* Set input mux for bt_prority_async and
236 * bt_active_async to GPIO pins */
237 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
238 AR_GPIO_INPUT_MUX1_BT_ACTIVE,
239 btcoex_info->btactive_gpio);
240
241 REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1,
242 AR_GPIO_INPUT_MUX1_BT_PRIORITY,
243 btcoex_info->btpriority_gpio);
244
245 /* Configure the desired GPIO ports for input */
246
247 ath9k_hw_cfg_gpio_input(ah, btcoex_info->btactive_gpio);
248 ath9k_hw_cfg_gpio_input(ah, btcoex_info->btpriority_gpio);
249
250 ret = ath_init_btcoex_info(ah, btcoex_info);
251 }
252 151
253 return ret; 152 /* Configure the desired GPIO port for TX_FRAME output */
153 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
154 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
254} 155}
255 156
256void ath9k_hw_btcoex_enable(struct ath_hw *ah) 157void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
158 u32 bt_weight,
159 u32 wlan_weight)
257{ 160{
258 struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info; 161 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
259
260 if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) {
261 /* Configure the desired GPIO port for TX_FRAME output */
262 ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
263 AR_GPIO_OUTPUT_MUX_AS_TX_FRAME);
264 } else {
265 /*
266 * Program coex mode and weight registers to
267 * enable coex 3-wire
268 */
269 REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_info->bt_coex_mode);
270 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_info->bt_coex_weights);
271 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_info->bt_coex_mode2);
272
273 REG_RMW_FIELD(ah, AR_QUIET1,
274 AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
275 REG_RMW_FIELD(ah, AR_PCU_MISC,
276 AR_PCU_BT_ANT_PREVENT_RX, 0);
277
278 ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio,
279 AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
280 }
281 162
282 REG_RMW(ah, AR_GPIO_PDPU, 163 btcoex_hw->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
283 (0x2 << (btcoex_info->btactive_gpio * 2)), 164 SM(wlan_weight, AR_BTCOEX_WL_WGHT);
284 (0x3 << (btcoex_info->btactive_gpio * 2)));
285
286 ah->ah_sc->sc_flags |= SC_OP_BTCOEX_ENABLED;
287} 165}
166EXPORT_SYMBOL(ath9k_hw_btcoex_set_weight);
288 167
289void ath9k_hw_btcoex_disable(struct ath_hw *ah) 168static void ath9k_hw_btcoex_enable_3wire(struct ath_hw *ah)
290{ 169{
291 struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info; 170 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
292 171
293 ath9k_hw_set_gpio(ah, btcoex_info->wlanactive_gpio, 0); 172 /*
173 * Program coex mode and weight registers to
174 * enable coex 3-wire
175 */
176 REG_WRITE(ah, AR_BT_COEX_MODE, btcoex_hw->bt_coex_mode);
177 REG_WRITE(ah, AR_BT_COEX_WEIGHT, btcoex_hw->bt_coex_weights);
178 REG_WRITE(ah, AR_BT_COEX_MODE2, btcoex_hw->bt_coex_mode2);
294 179
295 ath9k_hw_cfg_output(ah, btcoex_info->wlanactive_gpio, 180 REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1);
296 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 181 REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0);
297 182
298 if (btcoex_info->btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) { 183 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
299 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE); 184 AR_GPIO_OUTPUT_MUX_AS_RX_CLEAR_EXTERNAL);
300 REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
301 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
302 }
303
304 ah->ah_sc->sc_flags &= ~SC_OP_BTCOEX_ENABLED;
305} 185}
306 186
307/* 187void ath9k_hw_btcoex_enable(struct ath_hw *ah)
308 * Pause btcoex timer and bt duty cycle timer
309 */
310void ath_btcoex_timer_pause(struct ath_softc *sc,
311 struct ath_btcoex_info *btinfo)
312{ 188{
189 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
313 190
314 del_timer_sync(&btinfo->period_timer); 191 switch (btcoex_hw->scheme) {
192 case ATH_BTCOEX_CFG_NONE:
193 break;
194 case ATH_BTCOEX_CFG_2WIRE:
195 ath9k_hw_btcoex_enable_2wire(ah);
196 break;
197 case ATH_BTCOEX_CFG_3WIRE:
198 ath9k_hw_btcoex_enable_3wire(ah);
199 break;
200 }
315 201
316 if (btinfo->hw_timer_enabled) 202 REG_RMW(ah, AR_GPIO_PDPU,
317 ath_gen_timer_stop(sc->sc_ah, btinfo->no_stomp_timer); 203 (0x2 << (btcoex_hw->btactive_gpio * 2)),
204 (0x3 << (btcoex_hw->btactive_gpio * 2)));
318 205
319 btinfo->hw_timer_enabled = false; 206 ah->btcoex_hw.enabled = true;
320} 207}
208EXPORT_SYMBOL(ath9k_hw_btcoex_enable);
321 209
322/* 210void ath9k_hw_btcoex_disable(struct ath_hw *ah)
323 * (Re)start btcoex timers
324 */
325void ath_btcoex_timer_resume(struct ath_softc *sc,
326 struct ath_btcoex_info *btinfo)
327{ 211{
212 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
328 213
329 DPRINTF(sc, ATH_DBG_BTCOEX, "Starting btcoex timers"); 214 ath9k_hw_set_gpio(ah, btcoex_hw->wlanactive_gpio, 0);
330 215
331 /* make sure duty cycle timer is also stopped when resuming */ 216 ath9k_hw_cfg_output(ah, btcoex_hw->wlanactive_gpio,
332 if (btinfo->hw_timer_enabled) 217 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
333 ath_gen_timer_stop(sc->sc_ah, btinfo->no_stomp_timer);
334 218
335 btinfo->bt_priority_cnt = 0; 219 if (btcoex_hw->scheme == ATH_BTCOEX_CFG_3WIRE) {
336 btinfo->bt_priority_time = jiffies; 220 REG_WRITE(ah, AR_BT_COEX_MODE, AR_BT_QUIET | AR_BT_MODE);
337 sc->sc_flags &= ~SC_OP_BT_PRIORITY_DETECTED; 221 REG_WRITE(ah, AR_BT_COEX_WEIGHT, 0);
222 REG_WRITE(ah, AR_BT_COEX_MODE2, 0);
223 }
338 224
339 mod_timer(&btinfo->period_timer, jiffies); 225 ah->btcoex_hw.enabled = false;
340} 226}
227EXPORT_SYMBOL(ath9k_hw_btcoex_disable);
diff --git a/drivers/net/wireless/ath/ath9k/btcoex.h b/drivers/net/wireless/ath/ath9k/btcoex.h
index 297b027fd3c3..1ee5a15ccbb1 100644
--- a/drivers/net/wireless/ath/ath9k/btcoex.h
+++ b/drivers/net/wireless/ath/ath9k/btcoex.h
@@ -17,16 +17,20 @@
17#ifndef BTCOEX_H 17#ifndef BTCOEX_H
18#define BTCOEX_H 18#define BTCOEX_H
19 19
20#include "hw.h"
21
20#define ATH_WLANACTIVE_GPIO 5 22#define ATH_WLANACTIVE_GPIO 5
21#define ATH_BTACTIVE_GPIO 6 23#define ATH_BTACTIVE_GPIO 6
22#define ATH_BTPRIORITY_GPIO 7 24#define ATH_BTPRIORITY_GPIO 7
23 25
24#define ATH_BTCOEX_DEF_BT_PERIOD 45 26#define ATH_BTCOEX_DEF_BT_PERIOD 45
25#define ATH_BTCOEX_DEF_DUTY_CYCLE 55 27#define ATH_BTCOEX_DEF_DUTY_CYCLE 55
28#define ATH_BTCOEX_BTSCAN_DUTY_CYCLE 90
26#define ATH_BTCOEX_BMISS_THRESH 50 29#define ATH_BTCOEX_BMISS_THRESH 50
27 30
28#define ATH_BT_PRIORITY_TIME_THRESHOLD 1000 /* ms */ 31#define ATH_BT_PRIORITY_TIME_THRESHOLD 1000 /* ms */
29#define ATH_BT_CNT_THRESHOLD 3 32#define ATH_BT_CNT_THRESHOLD 3
33#define ATH_BT_CNT_SCAN_THRESHOLD 15
30 34
31enum ath_btcoex_scheme { 35enum ath_btcoex_scheme {
32 ATH_BTCOEX_CFG_NONE, 36 ATH_BTCOEX_CFG_NONE,
@@ -34,67 +38,25 @@ enum ath_btcoex_scheme {
34 ATH_BTCOEX_CFG_3WIRE, 38 ATH_BTCOEX_CFG_3WIRE,
35}; 39};
36 40
37enum ath_stomp_type { 41struct ath_btcoex_hw {
38 ATH_BTCOEX_NO_STOMP, 42 enum ath_btcoex_scheme scheme;
39 ATH_BTCOEX_STOMP_ALL, 43 bool enabled;
40 ATH_BTCOEX_STOMP_LOW,
41 ATH_BTCOEX_STOMP_NONE
42};
43
44enum ath_bt_mode {
45 ATH_BT_COEX_MODE_LEGACY, /* legacy rx_clear mode */
46 ATH_BT_COEX_MODE_UNSLOTTED, /* untimed/unslotted mode */
47 ATH_BT_COEX_MODE_SLOTTED, /* slotted mode */
48 ATH_BT_COEX_MODE_DISALBED, /* coexistence disabled */
49};
50
51struct ath_btcoex_config {
52 u8 bt_time_extend;
53 bool bt_txstate_extend;
54 bool bt_txframe_extend;
55 enum ath_bt_mode bt_mode; /* coexistence mode */
56 bool bt_quiet_collision;
57 bool bt_rxclear_polarity; /* invert rx_clear as WLAN_ACTIVE*/
58 u8 bt_priority_time;
59 u8 bt_first_slot_time;
60 bool bt_hold_rx_clear;
61};
62
63struct ath_btcoex_info {
64 enum ath_btcoex_scheme btcoex_scheme;
65 u8 wlanactive_gpio; 44 u8 wlanactive_gpio;
66 u8 btactive_gpio; 45 u8 btactive_gpio;
67 u8 btpriority_gpio; 46 u8 btpriority_gpio;
68 u8 bt_duty_cycle; /* BT duty cycle in percentage */
69 int bt_stomp_type; /* Types of BT stomping */
70 u32 bt_coex_mode; /* Register setting for AR_BT_COEX_MODE */ 47 u32 bt_coex_mode; /* Register setting for AR_BT_COEX_MODE */
71 u32 bt_coex_weights; /* Register setting for AR_BT_COEX_WEIGHT */ 48 u32 bt_coex_weights; /* Register setting for AR_BT_COEX_WEIGHT */
72 u32 bt_coex_mode2; /* Register setting for AR_BT_COEX_MODE2 */ 49 u32 bt_coex_mode2; /* Register setting for AR_BT_COEX_MODE2 */
73 u32 btcoex_no_stomp; /* in usec */
74 u32 btcoex_period; /* in usec */
75 u32 bt_priority_cnt;
76 unsigned long bt_priority_time;
77 bool hw_timer_enabled;
78 spinlock_t btcoex_lock;
79 struct timer_list period_timer; /* Timer for BT period */
80 struct ath_gen_timer *no_stomp_timer; /*Timer for no BT stomping*/
81}; 50};
82 51
83bool ath_btcoex_supported(u16 subsysid); 52bool ath9k_hw_btcoex_supported(struct ath_hw *ah);
84int ath9k_hw_btcoex_init(struct ath_hw *ah); 53void ath9k_hw_btcoex_init_2wire(struct ath_hw *ah);
54void ath9k_hw_btcoex_init_3wire(struct ath_hw *ah);
55void ath9k_hw_init_btcoex_hw(struct ath_hw *ah, int qnum);
56void ath9k_hw_btcoex_set_weight(struct ath_hw *ah,
57 u32 bt_weight,
58 u32 wlan_weight);
85void ath9k_hw_btcoex_enable(struct ath_hw *ah); 59void ath9k_hw_btcoex_enable(struct ath_hw *ah);
86void ath9k_hw_btcoex_disable(struct ath_hw *ah); 60void ath9k_hw_btcoex_disable(struct ath_hw *ah);
87void ath_btcoex_timer_resume(struct ath_softc *sc,
88 struct ath_btcoex_info *btinfo);
89void ath_btcoex_timer_pause(struct ath_softc *sc,
90 struct ath_btcoex_info *btinfo);
91
92static inline void ath_btcoex_set_weight(struct ath_btcoex_info *btcoex_info,
93 u32 bt_weight,
94 u32 wlan_weight)
95{
96 btcoex_info->bt_coex_weights = SM(bt_weight, AR_BTCOEX_BT_WGHT) |
97 SM(wlan_weight, AR_BTCOEX_WL_WGHT);
98}
99 61
100#endif 62#endif
diff --git a/drivers/net/wireless/ath/ath9k/calib.c b/drivers/net/wireless/ath/ath9k/calib.c
index 0ad6d0b76e9e..238a5744d8e9 100644
--- a/drivers/net/wireless/ath/ath9k/calib.c
+++ b/drivers/net/wireless/ath/ath9k/calib.c
@@ -14,7 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19/* We can tune this as we go by monitoring really low values */ 19/* We can tune this as we go by monitoring really low values */
20#define ATH9K_NF_TOO_LOW -60 20#define ATH9K_NF_TOO_LOW -60
@@ -26,11 +26,11 @@
26static bool ath9k_hw_nf_in_range(struct ath_hw *ah, s16 nf) 26static bool ath9k_hw_nf_in_range(struct ath_hw *ah, s16 nf)
27{ 27{
28 if (nf > ATH9K_NF_TOO_LOW) { 28 if (nf > ATH9K_NF_TOO_LOW) {
29 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 29 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
30 "noise floor value detected (%d) is " 30 "noise floor value detected (%d) is "
31 "lower than what we think is a " 31 "lower than what we think is a "
32 "reasonable value (%d)\n", 32 "reasonable value (%d)\n",
33 nf, ATH9K_NF_TOO_LOW); 33 nf, ATH9K_NF_TOO_LOW);
34 return false; 34 return false;
35 } 35 }
36 return true; 36 return true;
@@ -89,6 +89,7 @@ static void ath9k_hw_update_nfcal_hist_buffer(struct ath9k_nfcal_hist *h,
89static void ath9k_hw_do_getnf(struct ath_hw *ah, 89static void ath9k_hw_do_getnf(struct ath_hw *ah,
90 int16_t nfarray[NUM_NF_READINGS]) 90 int16_t nfarray[NUM_NF_READINGS])
91{ 91{
92 struct ath_common *common = ath9k_hw_common(ah);
92 int16_t nf; 93 int16_t nf;
93 94
94 if (AR_SREV_9280_10_OR_LATER(ah)) 95 if (AR_SREV_9280_10_OR_LATER(ah))
@@ -98,8 +99,8 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
98 99
99 if (nf & 0x100) 100 if (nf & 0x100)
100 nf = 0 - ((nf ^ 0x1ff) + 1); 101 nf = 0 - ((nf ^ 0x1ff) + 1);
101 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 102 ath_print(common, ATH_DBG_CALIBRATE,
102 "NF calibrated [ctl] [chain 0] is %d\n", nf); 103 "NF calibrated [ctl] [chain 0] is %d\n", nf);
103 nfarray[0] = nf; 104 nfarray[0] = nf;
104 105
105 if (!AR_SREV_9285(ah)) { 106 if (!AR_SREV_9285(ah)) {
@@ -112,8 +113,8 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
112 113
113 if (nf & 0x100) 114 if (nf & 0x100)
114 nf = 0 - ((nf ^ 0x1ff) + 1); 115 nf = 0 - ((nf ^ 0x1ff) + 1);
115 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 116 ath_print(common, ATH_DBG_CALIBRATE,
116 "NF calibrated [ctl] [chain 1] is %d\n", nf); 117 "NF calibrated [ctl] [chain 1] is %d\n", nf);
117 nfarray[1] = nf; 118 nfarray[1] = nf;
118 119
119 if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) { 120 if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) {
@@ -121,8 +122,8 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
121 AR_PHY_CH2_MINCCA_PWR); 122 AR_PHY_CH2_MINCCA_PWR);
122 if (nf & 0x100) 123 if (nf & 0x100)
123 nf = 0 - ((nf ^ 0x1ff) + 1); 124 nf = 0 - ((nf ^ 0x1ff) + 1);
124 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 125 ath_print(common, ATH_DBG_CALIBRATE,
125 "NF calibrated [ctl] [chain 2] is %d\n", nf); 126 "NF calibrated [ctl] [chain 2] is %d\n", nf);
126 nfarray[2] = nf; 127 nfarray[2] = nf;
127 } 128 }
128 } 129 }
@@ -136,8 +137,8 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
136 137
137 if (nf & 0x100) 138 if (nf & 0x100)
138 nf = 0 - ((nf ^ 0x1ff) + 1); 139 nf = 0 - ((nf ^ 0x1ff) + 1);
139 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 140 ath_print(common, ATH_DBG_CALIBRATE,
140 "NF calibrated [ext] [chain 0] is %d\n", nf); 141 "NF calibrated [ext] [chain 0] is %d\n", nf);
141 nfarray[3] = nf; 142 nfarray[3] = nf;
142 143
143 if (!AR_SREV_9285(ah)) { 144 if (!AR_SREV_9285(ah)) {
@@ -150,8 +151,8 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
150 151
151 if (nf & 0x100) 152 if (nf & 0x100)
152 nf = 0 - ((nf ^ 0x1ff) + 1); 153 nf = 0 - ((nf ^ 0x1ff) + 1);
153 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 154 ath_print(common, ATH_DBG_CALIBRATE,
154 "NF calibrated [ext] [chain 1] is %d\n", nf); 155 "NF calibrated [ext] [chain 1] is %d\n", nf);
155 nfarray[4] = nf; 156 nfarray[4] = nf;
156 157
157 if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) { 158 if (!AR_SREV_9280(ah) && !AR_SREV_9287(ah)) {
@@ -159,8 +160,8 @@ static void ath9k_hw_do_getnf(struct ath_hw *ah,
159 AR_PHY_CH2_EXT_MINCCA_PWR); 160 AR_PHY_CH2_EXT_MINCCA_PWR);
160 if (nf & 0x100) 161 if (nf & 0x100)
161 nf = 0 - ((nf ^ 0x1ff) + 1); 162 nf = 0 - ((nf ^ 0x1ff) + 1);
162 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 163 ath_print(common, ATH_DBG_CALIBRATE,
163 "NF calibrated [ext] [chain 2] is %d\n", nf); 164 "NF calibrated [ext] [chain 2] is %d\n", nf);
164 nfarray[5] = nf; 165 nfarray[5] = nf;
165 } 166 }
166 } 167 }
@@ -188,6 +189,8 @@ static bool getNoiseFloorThresh(struct ath_hw *ah,
188static void ath9k_hw_setup_calibration(struct ath_hw *ah, 189static void ath9k_hw_setup_calibration(struct ath_hw *ah,
189 struct ath9k_cal_list *currCal) 190 struct ath9k_cal_list *currCal)
190{ 191{
192 struct ath_common *common = ath9k_hw_common(ah);
193
191 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0), 194 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(0),
192 AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX, 195 AR_PHY_TIMING_CTRL4_IQCAL_LOG_COUNT_MAX,
193 currCal->calData->calCountMax); 196 currCal->calData->calCountMax);
@@ -195,23 +198,23 @@ static void ath9k_hw_setup_calibration(struct ath_hw *ah,
195 switch (currCal->calData->calType) { 198 switch (currCal->calData->calType) {
196 case IQ_MISMATCH_CAL: 199 case IQ_MISMATCH_CAL:
197 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ); 200 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
198 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 201 ath_print(common, ATH_DBG_CALIBRATE,
199 "starting IQ Mismatch Calibration\n"); 202 "starting IQ Mismatch Calibration\n");
200 break; 203 break;
201 case ADC_GAIN_CAL: 204 case ADC_GAIN_CAL:
202 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN); 205 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_GAIN);
203 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 206 ath_print(common, ATH_DBG_CALIBRATE,
204 "starting ADC Gain Calibration\n"); 207 "starting ADC Gain Calibration\n");
205 break; 208 break;
206 case ADC_DC_CAL: 209 case ADC_DC_CAL:
207 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER); 210 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_PER);
208 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 211 ath_print(common, ATH_DBG_CALIBRATE,
209 "starting ADC DC Calibration\n"); 212 "starting ADC DC Calibration\n");
210 break; 213 break;
211 case ADC_DC_INIT_CAL: 214 case ADC_DC_INIT_CAL:
212 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT); 215 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_ADC_DC_INIT);
213 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 216 ath_print(common, ATH_DBG_CALIBRATE,
214 "starting Init ADC DC Calibration\n"); 217 "starting Init ADC DC Calibration\n");
215 break; 218 break;
216 } 219 }
217 220
@@ -278,7 +281,7 @@ static bool ath9k_hw_per_calibration(struct ath_hw *ah,
278static bool ath9k_hw_iscal_supported(struct ath_hw *ah, 281static bool ath9k_hw_iscal_supported(struct ath_hw *ah,
279 enum ath9k_cal_types calType) 282 enum ath9k_cal_types calType)
280{ 283{
281 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 284 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
282 285
283 switch (calType & ah->supp_cals) { 286 switch (calType & ah->supp_cals) {
284 case IQ_MISMATCH_CAL: /* Both 2 GHz and 5 GHz support OFDM */ 287 case IQ_MISMATCH_CAL: /* Both 2 GHz and 5 GHz support OFDM */
@@ -304,11 +307,11 @@ static void ath9k_hw_iqcal_collect(struct ath_hw *ah)
304 REG_READ(ah, AR_PHY_CAL_MEAS_1(i)); 307 REG_READ(ah, AR_PHY_CAL_MEAS_1(i));
305 ah->totalIqCorrMeas[i] += 308 ah->totalIqCorrMeas[i] +=
306 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i)); 309 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_2(i));
307 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 310 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
308 "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n", 311 "%d: Chn %d pmi=0x%08x;pmq=0x%08x;iqcm=0x%08x;\n",
309 ah->cal_samples, i, ah->totalPowerMeasI[i], 312 ah->cal_samples, i, ah->totalPowerMeasI[i],
310 ah->totalPowerMeasQ[i], 313 ah->totalPowerMeasQ[i],
311 ah->totalIqCorrMeas[i]); 314 ah->totalIqCorrMeas[i]);
312 } 315 }
313} 316}
314 317
@@ -326,14 +329,14 @@ static void ath9k_hw_adc_gaincal_collect(struct ath_hw *ah)
326 ah->totalAdcQEvenPhase[i] += 329 ah->totalAdcQEvenPhase[i] +=
327 REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 330 REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
328 331
329 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 332 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
330 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; " 333 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
331 "oddq=0x%08x; evenq=0x%08x;\n", 334 "oddq=0x%08x; evenq=0x%08x;\n",
332 ah->cal_samples, i, 335 ah->cal_samples, i,
333 ah->totalAdcIOddPhase[i], 336 ah->totalAdcIOddPhase[i],
334 ah->totalAdcIEvenPhase[i], 337 ah->totalAdcIEvenPhase[i],
335 ah->totalAdcQOddPhase[i], 338 ah->totalAdcQOddPhase[i],
336 ah->totalAdcQEvenPhase[i]); 339 ah->totalAdcQEvenPhase[i]);
337 } 340 }
338} 341}
339 342
@@ -351,19 +354,20 @@ static void ath9k_hw_adc_dccal_collect(struct ath_hw *ah)
351 ah->totalAdcDcOffsetQEvenPhase[i] += 354 ah->totalAdcDcOffsetQEvenPhase[i] +=
352 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i)); 355 (int32_t) REG_READ(ah, AR_PHY_CAL_MEAS_3(i));
353 356
354 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 357 ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
355 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; " 358 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; "
356 "oddq=0x%08x; evenq=0x%08x;\n", 359 "oddq=0x%08x; evenq=0x%08x;\n",
357 ah->cal_samples, i, 360 ah->cal_samples, i,
358 ah->totalAdcDcOffsetIOddPhase[i], 361 ah->totalAdcDcOffsetIOddPhase[i],
359 ah->totalAdcDcOffsetIEvenPhase[i], 362 ah->totalAdcDcOffsetIEvenPhase[i],
360 ah->totalAdcDcOffsetQOddPhase[i], 363 ah->totalAdcDcOffsetQOddPhase[i],
361 ah->totalAdcDcOffsetQEvenPhase[i]); 364 ah->totalAdcDcOffsetQEvenPhase[i]);
362 } 365 }
363} 366}
364 367
365static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains) 368static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
366{ 369{
370 struct ath_common *common = ath9k_hw_common(ah);
367 u32 powerMeasQ, powerMeasI, iqCorrMeas; 371 u32 powerMeasQ, powerMeasI, iqCorrMeas;
368 u32 qCoffDenom, iCoffDenom; 372 u32 qCoffDenom, iCoffDenom;
369 int32_t qCoff, iCoff; 373 int32_t qCoff, iCoff;
@@ -374,13 +378,13 @@ static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
374 powerMeasQ = ah->totalPowerMeasQ[i]; 378 powerMeasQ = ah->totalPowerMeasQ[i];
375 iqCorrMeas = ah->totalIqCorrMeas[i]; 379 iqCorrMeas = ah->totalIqCorrMeas[i];
376 380
377 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 381 ath_print(common, ATH_DBG_CALIBRATE,
378 "Starting IQ Cal and Correction for Chain %d\n", 382 "Starting IQ Cal and Correction for Chain %d\n",
379 i); 383 i);
380 384
381 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 385 ath_print(common, ATH_DBG_CALIBRATE,
382 "Orignal: Chn %diq_corr_meas = 0x%08x\n", 386 "Orignal: Chn %diq_corr_meas = 0x%08x\n",
383 i, ah->totalIqCorrMeas[i]); 387 i, ah->totalIqCorrMeas[i]);
384 388
385 iqCorrNeg = 0; 389 iqCorrNeg = 0;
386 390
@@ -389,27 +393,28 @@ static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
389 iqCorrNeg = 1; 393 iqCorrNeg = 1;
390 } 394 }
391 395
392 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 396 ath_print(common, ATH_DBG_CALIBRATE,
393 "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI); 397 "Chn %d pwr_meas_i = 0x%08x\n", i, powerMeasI);
394 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 398 ath_print(common, ATH_DBG_CALIBRATE,
395 "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ); 399 "Chn %d pwr_meas_q = 0x%08x\n", i, powerMeasQ);
396 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n", 400 ath_print(common, ATH_DBG_CALIBRATE, "iqCorrNeg is 0x%08x\n",
397 iqCorrNeg); 401 iqCorrNeg);
398 402
399 iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 128; 403 iCoffDenom = (powerMeasI / 2 + powerMeasQ / 2) / 128;
400 qCoffDenom = powerMeasQ / 64; 404 qCoffDenom = powerMeasQ / 64;
401 405
402 if (powerMeasQ != 0) { 406 if ((powerMeasQ != 0) && (iCoffDenom != 0) &&
407 (qCoffDenom != 0)) {
403 iCoff = iqCorrMeas / iCoffDenom; 408 iCoff = iqCorrMeas / iCoffDenom;
404 qCoff = powerMeasI / qCoffDenom - 64; 409 qCoff = powerMeasI / qCoffDenom - 64;
405 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 410 ath_print(common, ATH_DBG_CALIBRATE,
406 "Chn %d iCoff = 0x%08x\n", i, iCoff); 411 "Chn %d iCoff = 0x%08x\n", i, iCoff);
407 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 412 ath_print(common, ATH_DBG_CALIBRATE,
408 "Chn %d qCoff = 0x%08x\n", i, qCoff); 413 "Chn %d qCoff = 0x%08x\n", i, qCoff);
409 414
410 iCoff = iCoff & 0x3f; 415 iCoff = iCoff & 0x3f;
411 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 416 ath_print(common, ATH_DBG_CALIBRATE,
412 "New: Chn %d iCoff = 0x%08x\n", i, iCoff); 417 "New: Chn %d iCoff = 0x%08x\n", i, iCoff);
413 if (iqCorrNeg == 0x0) 418 if (iqCorrNeg == 0x0)
414 iCoff = 0x40 - iCoff; 419 iCoff = 0x40 - iCoff;
415 420
@@ -418,9 +423,9 @@ static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
418 else if (qCoff <= -16) 423 else if (qCoff <= -16)
419 qCoff = 16; 424 qCoff = 16;
420 425
421 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 426 ath_print(common, ATH_DBG_CALIBRATE,
422 "Chn %d : iCoff = 0x%x qCoff = 0x%x\n", 427 "Chn %d : iCoff = 0x%x qCoff = 0x%x\n",
423 i, iCoff, qCoff); 428 i, iCoff, qCoff);
424 429
425 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), 430 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
426 AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF, 431 AR_PHY_TIMING_CTRL4_IQCORR_Q_I_COFF,
@@ -428,9 +433,9 @@ static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
428 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i), 433 REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4(i),
429 AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF, 434 AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF,
430 qCoff); 435 qCoff);
431 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 436 ath_print(common, ATH_DBG_CALIBRATE,
432 "IQ Cal and Correction done for Chain %d\n", 437 "IQ Cal and Correction done for Chain %d\n",
433 i); 438 i);
434 } 439 }
435 } 440 }
436 441
@@ -440,6 +445,7 @@ static void ath9k_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
440 445
441static void ath9k_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains) 446static void ath9k_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
442{ 447{
448 struct ath_common *common = ath9k_hw_common(ah);
443 u32 iOddMeasOffset, iEvenMeasOffset, qOddMeasOffset, qEvenMeasOffset; 449 u32 iOddMeasOffset, iEvenMeasOffset, qOddMeasOffset, qEvenMeasOffset;
444 u32 qGainMismatch, iGainMismatch, val, i; 450 u32 qGainMismatch, iGainMismatch, val, i;
445 451
@@ -449,21 +455,21 @@ static void ath9k_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
449 qOddMeasOffset = ah->totalAdcQOddPhase[i]; 455 qOddMeasOffset = ah->totalAdcQOddPhase[i];
450 qEvenMeasOffset = ah->totalAdcQEvenPhase[i]; 456 qEvenMeasOffset = ah->totalAdcQEvenPhase[i];
451 457
452 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 458 ath_print(common, ATH_DBG_CALIBRATE,
453 "Starting ADC Gain Cal for Chain %d\n", i); 459 "Starting ADC Gain Cal for Chain %d\n", i);
454 460
455 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 461 ath_print(common, ATH_DBG_CALIBRATE,
456 "Chn %d pwr_meas_odd_i = 0x%08x\n", i, 462 "Chn %d pwr_meas_odd_i = 0x%08x\n", i,
457 iOddMeasOffset); 463 iOddMeasOffset);
458 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 464 ath_print(common, ATH_DBG_CALIBRATE,
459 "Chn %d pwr_meas_even_i = 0x%08x\n", i, 465 "Chn %d pwr_meas_even_i = 0x%08x\n", i,
460 iEvenMeasOffset); 466 iEvenMeasOffset);
461 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 467 ath_print(common, ATH_DBG_CALIBRATE,
462 "Chn %d pwr_meas_odd_q = 0x%08x\n", i, 468 "Chn %d pwr_meas_odd_q = 0x%08x\n", i,
463 qOddMeasOffset); 469 qOddMeasOffset);
464 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 470 ath_print(common, ATH_DBG_CALIBRATE,
465 "Chn %d pwr_meas_even_q = 0x%08x\n", i, 471 "Chn %d pwr_meas_even_q = 0x%08x\n", i,
466 qEvenMeasOffset); 472 qEvenMeasOffset);
467 473
468 if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) { 474 if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) {
469 iGainMismatch = 475 iGainMismatch =
@@ -473,20 +479,20 @@ static void ath9k_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
473 ((qOddMeasOffset * 32) / 479 ((qOddMeasOffset * 32) /
474 qEvenMeasOffset) & 0x3f; 480 qEvenMeasOffset) & 0x3f;
475 481
476 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 482 ath_print(common, ATH_DBG_CALIBRATE,
477 "Chn %d gain_mismatch_i = 0x%08x\n", i, 483 "Chn %d gain_mismatch_i = 0x%08x\n", i,
478 iGainMismatch); 484 iGainMismatch);
479 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 485 ath_print(common, ATH_DBG_CALIBRATE,
480 "Chn %d gain_mismatch_q = 0x%08x\n", i, 486 "Chn %d gain_mismatch_q = 0x%08x\n", i,
481 qGainMismatch); 487 qGainMismatch);
482 488
483 val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 489 val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
484 val &= 0xfffff000; 490 val &= 0xfffff000;
485 val |= (qGainMismatch) | (iGainMismatch << 6); 491 val |= (qGainMismatch) | (iGainMismatch << 6);
486 REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 492 REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
487 493
488 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 494 ath_print(common, ATH_DBG_CALIBRATE,
489 "ADC Gain Cal done for Chain %d\n", i); 495 "ADC Gain Cal done for Chain %d\n", i);
490 } 496 }
491 } 497 }
492 498
@@ -497,6 +503,7 @@ static void ath9k_hw_adc_gaincal_calibrate(struct ath_hw *ah, u8 numChains)
497 503
498static void ath9k_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains) 504static void ath9k_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
499{ 505{
506 struct ath_common *common = ath9k_hw_common(ah);
500 u32 iOddMeasOffset, iEvenMeasOffset, val, i; 507 u32 iOddMeasOffset, iEvenMeasOffset, val, i;
501 int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch; 508 int32_t qOddMeasOffset, qEvenMeasOffset, qDcMismatch, iDcMismatch;
502 const struct ath9k_percal_data *calData = 509 const struct ath9k_percal_data *calData =
@@ -510,41 +517,41 @@ static void ath9k_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
510 qOddMeasOffset = ah->totalAdcDcOffsetQOddPhase[i]; 517 qOddMeasOffset = ah->totalAdcDcOffsetQOddPhase[i];
511 qEvenMeasOffset = ah->totalAdcDcOffsetQEvenPhase[i]; 518 qEvenMeasOffset = ah->totalAdcDcOffsetQEvenPhase[i];
512 519
513 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 520 ath_print(common, ATH_DBG_CALIBRATE,
514 "Starting ADC DC Offset Cal for Chain %d\n", i); 521 "Starting ADC DC Offset Cal for Chain %d\n", i);
515 522
516 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 523 ath_print(common, ATH_DBG_CALIBRATE,
517 "Chn %d pwr_meas_odd_i = %d\n", i, 524 "Chn %d pwr_meas_odd_i = %d\n", i,
518 iOddMeasOffset); 525 iOddMeasOffset);
519 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 526 ath_print(common, ATH_DBG_CALIBRATE,
520 "Chn %d pwr_meas_even_i = %d\n", i, 527 "Chn %d pwr_meas_even_i = %d\n", i,
521 iEvenMeasOffset); 528 iEvenMeasOffset);
522 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 529 ath_print(common, ATH_DBG_CALIBRATE,
523 "Chn %d pwr_meas_odd_q = %d\n", i, 530 "Chn %d pwr_meas_odd_q = %d\n", i,
524 qOddMeasOffset); 531 qOddMeasOffset);
525 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 532 ath_print(common, ATH_DBG_CALIBRATE,
526 "Chn %d pwr_meas_even_q = %d\n", i, 533 "Chn %d pwr_meas_even_q = %d\n", i,
527 qEvenMeasOffset); 534 qEvenMeasOffset);
528 535
529 iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) / 536 iDcMismatch = (((iEvenMeasOffset - iOddMeasOffset) * 2) /
530 numSamples) & 0x1ff; 537 numSamples) & 0x1ff;
531 qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) / 538 qDcMismatch = (((qOddMeasOffset - qEvenMeasOffset) * 2) /
532 numSamples) & 0x1ff; 539 numSamples) & 0x1ff;
533 540
534 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 541 ath_print(common, ATH_DBG_CALIBRATE,
535 "Chn %d dc_offset_mismatch_i = 0x%08x\n", i, 542 "Chn %d dc_offset_mismatch_i = 0x%08x\n", i,
536 iDcMismatch); 543 iDcMismatch);
537 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 544 ath_print(common, ATH_DBG_CALIBRATE,
538 "Chn %d dc_offset_mismatch_q = 0x%08x\n", i, 545 "Chn %d dc_offset_mismatch_q = 0x%08x\n", i,
539 qDcMismatch); 546 qDcMismatch);
540 547
541 val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i)); 548 val = REG_READ(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i));
542 val &= 0xc0000fff; 549 val &= 0xc0000fff;
543 val |= (qDcMismatch << 12) | (iDcMismatch << 21); 550 val |= (qDcMismatch << 12) | (iDcMismatch << 21);
544 REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val); 551 REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(i), val);
545 552
546 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 553 ath_print(common, ATH_DBG_CALIBRATE,
547 "ADC DC Offset Cal done for Chain %d\n", i); 554 "ADC DC Offset Cal done for Chain %d\n", i);
548 } 555 }
549 556
550 REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0), 557 REG_WRITE(ah, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
@@ -555,7 +562,8 @@ static void ath9k_hw_adc_dccal_calibrate(struct ath_hw *ah, u8 numChains)
555/* This is done for the currently configured channel */ 562/* This is done for the currently configured channel */
556bool ath9k_hw_reset_calvalid(struct ath_hw *ah) 563bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
557{ 564{
558 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 565 struct ath_common *common = ath9k_hw_common(ah);
566 struct ieee80211_conf *conf = &common->hw->conf;
559 struct ath9k_cal_list *currCal = ah->cal_list_curr; 567 struct ath9k_cal_list *currCal = ah->cal_list_curr;
560 568
561 if (!ah->curchan) 569 if (!ah->curchan)
@@ -568,24 +576,25 @@ bool ath9k_hw_reset_calvalid(struct ath_hw *ah)
568 return true; 576 return true;
569 577
570 if (currCal->calState != CAL_DONE) { 578 if (currCal->calState != CAL_DONE) {
571 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 579 ath_print(common, ATH_DBG_CALIBRATE,
572 "Calibration state incorrect, %d\n", 580 "Calibration state incorrect, %d\n",
573 currCal->calState); 581 currCal->calState);
574 return true; 582 return true;
575 } 583 }
576 584
577 if (!ath9k_hw_iscal_supported(ah, currCal->calData->calType)) 585 if (!ath9k_hw_iscal_supported(ah, currCal->calData->calType))
578 return true; 586 return true;
579 587
580 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 588 ath_print(common, ATH_DBG_CALIBRATE,
581 "Resetting Cal %d state for channel %u\n", 589 "Resetting Cal %d state for channel %u\n",
582 currCal->calData->calType, conf->channel->center_freq); 590 currCal->calData->calType, conf->channel->center_freq);
583 591
584 ah->curchan->CalValid &= ~currCal->calData->calType; 592 ah->curchan->CalValid &= ~currCal->calData->calType;
585 currCal->calState = CAL_WAITING; 593 currCal->calState = CAL_WAITING;
586 594
587 return false; 595 return false;
588} 596}
597EXPORT_SYMBOL(ath9k_hw_reset_calvalid);
589 598
590void ath9k_hw_start_nfcal(struct ath_hw *ah) 599void ath9k_hw_start_nfcal(struct ath_hw *ah)
591{ 600{
@@ -645,11 +654,11 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
645 AR_PHY_AGC_CONTROL_NO_UPDATE_NF); 654 AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
646 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF); 655 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
647 656
648 for (j = 0; j < 1000; j++) { 657 for (j = 0; j < 5; j++) {
649 if ((REG_READ(ah, AR_PHY_AGC_CONTROL) & 658 if ((REG_READ(ah, AR_PHY_AGC_CONTROL) &
650 AR_PHY_AGC_CONTROL_NF) == 0) 659 AR_PHY_AGC_CONTROL_NF) == 0)
651 break; 660 break;
652 udelay(10); 661 udelay(50);
653 } 662 }
654 663
655 for (i = 0; i < NUM_NF_READINGS; i++) { 664 for (i = 0; i < NUM_NF_READINGS; i++) {
@@ -665,6 +674,7 @@ void ath9k_hw_loadnf(struct ath_hw *ah, struct ath9k_channel *chan)
665int16_t ath9k_hw_getnf(struct ath_hw *ah, 674int16_t ath9k_hw_getnf(struct ath_hw *ah,
666 struct ath9k_channel *chan) 675 struct ath9k_channel *chan)
667{ 676{
677 struct ath_common *common = ath9k_hw_common(ah);
668 int16_t nf, nfThresh; 678 int16_t nf, nfThresh;
669 int16_t nfarray[NUM_NF_READINGS] = { 0 }; 679 int16_t nfarray[NUM_NF_READINGS] = { 0 };
670 struct ath9k_nfcal_hist *h; 680 struct ath9k_nfcal_hist *h;
@@ -672,8 +682,8 @@ int16_t ath9k_hw_getnf(struct ath_hw *ah,
672 682
673 chan->channelFlags &= (~CHANNEL_CW_INT); 683 chan->channelFlags &= (~CHANNEL_CW_INT);
674 if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) { 684 if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {
675 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 685 ath_print(common, ATH_DBG_CALIBRATE,
676 "NF did not complete in calibration window\n"); 686 "NF did not complete in calibration window\n");
677 nf = 0; 687 nf = 0;
678 chan->rawNoiseFloor = nf; 688 chan->rawNoiseFloor = nf;
679 return chan->rawNoiseFloor; 689 return chan->rawNoiseFloor;
@@ -682,10 +692,10 @@ int16_t ath9k_hw_getnf(struct ath_hw *ah,
682 nf = nfarray[0]; 692 nf = nfarray[0];
683 if (getNoiseFloorThresh(ah, c->band, &nfThresh) 693 if (getNoiseFloorThresh(ah, c->band, &nfThresh)
684 && nf > nfThresh) { 694 && nf > nfThresh) {
685 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 695 ath_print(common, ATH_DBG_CALIBRATE,
686 "noise floor failed detected; " 696 "noise floor failed detected; "
687 "detected %d, threshold %d\n", 697 "detected %d, threshold %d\n",
688 nf, nfThresh); 698 nf, nfThresh);
689 chan->channelFlags |= CHANNEL_CW_INT; 699 chan->channelFlags |= CHANNEL_CW_INT;
690 } 700 }
691 } 701 }
@@ -737,51 +747,73 @@ s16 ath9k_hw_getchan_noise(struct ath_hw *ah, struct ath9k_channel *chan)
737 747
738 return nf; 748 return nf;
739} 749}
750EXPORT_SYMBOL(ath9k_hw_getchan_noise);
740 751
741static void ath9k_olc_temp_compensation(struct ath_hw *ah) 752static void ath9k_olc_temp_compensation_9287(struct ath_hw *ah)
742{ 753{
743 u32 rddata, i; 754 u32 rddata;
744 int delta, currPDADC, regval, slope; 755 int32_t delta, currPDADC, slope;
745 756
746 rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4); 757 rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4);
747 currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT); 758 currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
748 759
760 if (ah->initPDADC == 0 || currPDADC == 0) {
761 /*
762 * Zero value indicates that no frames have been transmitted yet,
763 * can't do temperature compensation until frames are transmitted.
764 */
765 return;
766 } else {
767 slope = ah->eep_ops->get_eeprom(ah, EEP_TEMPSENSE_SLOPE);
768
769 if (slope == 0) { /* to avoid divide by zero case */
770 delta = 0;
771 } else {
772 delta = ((currPDADC - ah->initPDADC)*4) / slope;
773 }
774 REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11,
775 AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta);
776 REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11,
777 AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta);
778 }
779}
780
781static void ath9k_olc_temp_compensation(struct ath_hw *ah)
782{
783 u32 rddata, i;
784 int delta, currPDADC, regval;
749 785
750 if (OLC_FOR_AR9287_10_LATER) { 786 if (OLC_FOR_AR9287_10_LATER) {
787 ath9k_olc_temp_compensation_9287(ah);
788 } else {
789 rddata = REG_READ(ah, AR_PHY_TX_PWRCTRL4);
790 currPDADC = MS(rddata, AR_PHY_TX_PWRCTRL_PD_AVG_OUT);
791
751 if (ah->initPDADC == 0 || currPDADC == 0) { 792 if (ah->initPDADC == 0 || currPDADC == 0) {
752 return; 793 return;
753 } else { 794 } else {
754 slope = ah->eep_ops->get_eeprom(ah, EEP_TEMPSENSE_SLOPE); 795 if (ah->eep_ops->get_eeprom(ah, EEP_DAC_HPWR_5G))
755 if (slope == 0) 796 delta = (currPDADC - ah->initPDADC + 4) / 8;
756 delta = 0;
757 else 797 else
758 delta = ((currPDADC - ah->initPDADC)*4) / slope; 798 delta = (currPDADC - ah->initPDADC + 5) / 10;
759 REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11, 799
760 AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta); 800 if (delta != ah->PDADCdelta) {
761 REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11, 801 ah->PDADCdelta = delta;
762 AR_PHY_TX_PWRCTRL_OLPC_TEMP_COMP, delta); 802 for (i = 1; i < AR9280_TX_GAIN_TABLE_SIZE; i++) {
763 } 803 regval = ah->originalGain[i] - delta;
764 } else { 804 if (regval < 0)
765 if (ah->eep_ops->get_eeprom(ah, EEP_DAC_HPWR_5G)) 805 regval = 0;
766 delta = (currPDADC - ah->initPDADC + 4) / 8; 806
767 else 807 REG_RMW_FIELD(ah,
768 delta = (currPDADC - ah->initPDADC + 5) / 10; 808 AR_PHY_TX_GAIN_TBL1 + i * 4,
769 809 AR_PHY_TX_GAIN, regval);
770 if (delta != ah->PDADCdelta) { 810 }
771 ah->PDADCdelta = delta;
772 for (i = 1; i < AR9280_TX_GAIN_TABLE_SIZE; i++) {
773 regval = ah->originalGain[i] - delta;
774 if (regval < 0)
775 regval = 0;
776
777 REG_RMW_FIELD(ah, AR_PHY_TX_GAIN_TBL1 + i * 4,
778 AR_PHY_TX_GAIN, regval);
779 } 811 }
780 } 812 }
781 } 813 }
782} 814}
783 815
784static void ath9k_hw_9271_pa_cal(struct ath_hw *ah) 816static void ath9k_hw_9271_pa_cal(struct ath_hw *ah, bool is_reset)
785{ 817{
786 u32 regVal; 818 u32 regVal;
787 unsigned int i; 819 unsigned int i;
@@ -845,7 +877,7 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
845 REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0); 877 REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0);
846 878
847 /* find off_6_1; */ 879 /* find off_6_1; */
848 for (i = 6; i >= 0; i--) { 880 for (i = 6; i > 0; i--) {
849 regVal = REG_READ(ah, 0x7834); 881 regVal = REG_READ(ah, 0x7834);
850 regVal |= (1 << (20 + i)); 882 regVal |= (1 << (20 + i));
851 REG_WRITE(ah, 0x7834, regVal); 883 REG_WRITE(ah, 0x7834, regVal);
@@ -857,10 +889,19 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
857 REG_WRITE(ah, 0x7834, regVal); 889 REG_WRITE(ah, 0x7834, regVal);
858 } 890 }
859 891
860 /* Empirical offset correction */ 892 regVal = (regVal >>20) & 0x7f;
861#if 0 893
862 REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9271_AN_RF2G6_OFFS, 0x20); 894 /* Update PA cal info */
863#endif 895 if ((!is_reset) && (ah->pacal_info.prev_offset == regVal)) {
896 if (ah->pacal_info.max_skipcount < MAX_PACAL_SKIPCOUNT)
897 ah->pacal_info.max_skipcount =
898 2 * ah->pacal_info.max_skipcount;
899 ah->pacal_info.skipcount = ah->pacal_info.max_skipcount;
900 } else {
901 ah->pacal_info.max_skipcount = 1;
902 ah->pacal_info.skipcount = 0;
903 ah->pacal_info.prev_offset = regVal;
904 }
864 905
865 regVal = REG_READ(ah, 0x7834); 906 regVal = REG_READ(ah, 0x7834);
866 regVal |= 0x1; 907 regVal |= 0x1;
@@ -875,7 +916,7 @@ static void ath9k_hw_9271_pa_cal(struct ath_hw *ah)
875 916
876static inline void ath9k_hw_9285_pa_cal(struct ath_hw *ah, bool is_reset) 917static inline void ath9k_hw_9285_pa_cal(struct ath_hw *ah, bool is_reset)
877{ 918{
878 919 struct ath_common *common = ath9k_hw_common(ah);
879 u32 regVal; 920 u32 regVal;
880 int i, offset, offs_6_1, offs_0; 921 int i, offset, offs_6_1, offs_0;
881 u32 ccomp_org, reg_field; 922 u32 ccomp_org, reg_field;
@@ -889,7 +930,7 @@ static inline void ath9k_hw_9285_pa_cal(struct ath_hw *ah, bool is_reset)
889 { 0x7838, 0 }, 930 { 0x7838, 0 },
890 }; 931 };
891 932
892 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, "Running PA Calibration\n"); 933 ath_print(common, ATH_DBG_CALIBRATE, "Running PA Calibration\n");
893 934
894 /* PA CAL is not needed for high power solution */ 935 /* PA CAL is not needed for high power solution */
895 if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 936 if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) ==
@@ -1011,7 +1052,7 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
1011 if (longcal) { 1052 if (longcal) {
1012 /* Do periodic PAOffset Cal */ 1053 /* Do periodic PAOffset Cal */
1013 if (AR_SREV_9271(ah)) 1054 if (AR_SREV_9271(ah))
1014 ath9k_hw_9271_pa_cal(ah); 1055 ath9k_hw_9271_pa_cal(ah, false);
1015 else if (AR_SREV_9285_11_OR_LATER(ah)) { 1056 else if (AR_SREV_9285_11_OR_LATER(ah)) {
1016 if (!ah->pacal_info.skipcount) 1057 if (!ah->pacal_info.skipcount)
1017 ath9k_hw_9285_pa_cal(ah, false); 1058 ath9k_hw_9285_pa_cal(ah, false);
@@ -1036,9 +1077,13 @@ bool ath9k_hw_calibrate(struct ath_hw *ah, struct ath9k_channel *chan,
1036 1077
1037 return iscaldone; 1078 return iscaldone;
1038} 1079}
1080EXPORT_SYMBOL(ath9k_hw_calibrate);
1039 1081
1082/* Carrier leakage Calibration fix */
1040static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan) 1083static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan)
1041{ 1084{
1085 struct ath_common *common = ath9k_hw_common(ah);
1086
1042 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE); 1087 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
1043 if (IS_CHAN_HT20(chan)) { 1088 if (IS_CHAN_HT20(chan)) {
1044 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE); 1089 REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE);
@@ -1049,9 +1094,9 @@ static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan)
1049 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL); 1094 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
1050 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, 1095 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
1051 AR_PHY_AGC_CONTROL_CAL, 0, AH_WAIT_TIMEOUT)) { 1096 AR_PHY_AGC_CONTROL_CAL, 0, AH_WAIT_TIMEOUT)) {
1052 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, "offset " 1097 ath_print(common, ATH_DBG_CALIBRATE, "offset "
1053 "calibration failed to complete in " 1098 "calibration failed to complete in "
1054 "1ms; noisy ??\n"); 1099 "1ms; noisy ??\n");
1055 return false; 1100 return false;
1056 } 1101 }
1057 REG_CLR_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN); 1102 REG_CLR_BIT(ah, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
@@ -1064,8 +1109,8 @@ static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan)
1064 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL); 1109 REG_SET_BIT(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
1065 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 1110 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
1066 0, AH_WAIT_TIMEOUT)) { 1111 0, AH_WAIT_TIMEOUT)) {
1067 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, "offset calibration " 1112 ath_print(common, ATH_DBG_CALIBRATE, "offset calibration "
1068 "failed to complete in 1ms; noisy ??\n"); 1113 "failed to complete in 1ms; noisy ??\n");
1069 return false; 1114 return false;
1070 } 1115 }
1071 1116
@@ -1078,7 +1123,9 @@ static bool ar9285_clc(struct ath_hw *ah, struct ath9k_channel *chan)
1078 1123
1079bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) 1124bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
1080{ 1125{
1081 if (AR_SREV_9285_12_OR_LATER(ah)) { 1126 struct ath_common *common = ath9k_hw_common(ah);
1127
1128 if (AR_SREV_9271(ah) || AR_SREV_9285_12_OR_LATER(ah)) {
1082 if (!ar9285_clc(ah, chan)) 1129 if (!ar9285_clc(ah, chan))
1083 return false; 1130 return false;
1084 } else { 1131 } else {
@@ -1098,9 +1145,9 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
1098 /* Poll for offset calibration complete */ 1145 /* Poll for offset calibration complete */
1099 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL, 1146 if (!ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL,
1100 0, AH_WAIT_TIMEOUT)) { 1147 0, AH_WAIT_TIMEOUT)) {
1101 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 1148 ath_print(common, ATH_DBG_CALIBRATE,
1102 "offset calibration failed to complete in 1ms; " 1149 "offset calibration failed to "
1103 "noisy environment?\n"); 1150 "complete in 1ms; noisy environment?\n");
1104 return false; 1151 return false;
1105 } 1152 }
1106 1153
@@ -1114,7 +1161,9 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
1114 } 1161 }
1115 1162
1116 /* Do PA Calibration */ 1163 /* Do PA Calibration */
1117 if (AR_SREV_9285_11_OR_LATER(ah)) 1164 if (AR_SREV_9271(ah))
1165 ath9k_hw_9271_pa_cal(ah, true);
1166 else if (AR_SREV_9285_11_OR_LATER(ah))
1118 ath9k_hw_9285_pa_cal(ah, true); 1167 ath9k_hw_9285_pa_cal(ah, true);
1119 1168
1120 /* Do NF Calibration after DC offset and other calibrations */ 1169 /* Do NF Calibration after DC offset and other calibrations */
@@ -1128,20 +1177,20 @@ bool ath9k_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan)
1128 if (ath9k_hw_iscal_supported(ah, ADC_GAIN_CAL)) { 1177 if (ath9k_hw_iscal_supported(ah, ADC_GAIN_CAL)) {
1129 INIT_CAL(&ah->adcgain_caldata); 1178 INIT_CAL(&ah->adcgain_caldata);
1130 INSERT_CAL(ah, &ah->adcgain_caldata); 1179 INSERT_CAL(ah, &ah->adcgain_caldata);
1131 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 1180 ath_print(common, ATH_DBG_CALIBRATE,
1132 "enabling ADC Gain Calibration.\n"); 1181 "enabling ADC Gain Calibration.\n");
1133 } 1182 }
1134 if (ath9k_hw_iscal_supported(ah, ADC_DC_CAL)) { 1183 if (ath9k_hw_iscal_supported(ah, ADC_DC_CAL)) {
1135 INIT_CAL(&ah->adcdc_caldata); 1184 INIT_CAL(&ah->adcdc_caldata);
1136 INSERT_CAL(ah, &ah->adcdc_caldata); 1185 INSERT_CAL(ah, &ah->adcdc_caldata);
1137 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 1186 ath_print(common, ATH_DBG_CALIBRATE,
1138 "enabling ADC DC Calibration.\n"); 1187 "enabling ADC DC Calibration.\n");
1139 } 1188 }
1140 if (ath9k_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) { 1189 if (ath9k_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) {
1141 INIT_CAL(&ah->iq_caldata); 1190 INIT_CAL(&ah->iq_caldata);
1142 INSERT_CAL(ah, &ah->iq_caldata); 1191 INSERT_CAL(ah, &ah->iq_caldata);
1143 DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, 1192 ath_print(common, ATH_DBG_CALIBRATE,
1144 "enabling IQ Calibration.\n"); 1193 "enabling IQ Calibration.\n");
1145 } 1194 }
1146 1195
1147 ah->cal_list_curr = ah->cal_list; 1196 ah->cal_list_curr = ah->cal_list;
diff --git a/drivers/net/wireless/ath/ath9k/calib.h b/drivers/net/wireless/ath/ath9k/calib.h
index 9028ab193e42..b2c873e97485 100644
--- a/drivers/net/wireless/ath/ath9k/calib.h
+++ b/drivers/net/wireless/ath/ath9k/calib.h
@@ -17,6 +17,8 @@
17#ifndef CALIB_H 17#ifndef CALIB_H
18#define CALIB_H 18#define CALIB_H
19 19
20#include "hw.h"
21
20extern const struct ath9k_percal_data iq_cal_multi_sample; 22extern const struct ath9k_percal_data iq_cal_multi_sample;
21extern const struct ath9k_percal_data iq_cal_single_sample; 23extern const struct ath9k_percal_data iq_cal_single_sample;
22extern const struct ath9k_percal_data adc_gain_cal_multi_sample; 24extern const struct ath9k_percal_data adc_gain_cal_multi_sample;
diff --git a/drivers/net/wireless/ath/ath9k/common.c b/drivers/net/wireless/ath/ath9k/common.c
new file mode 100644
index 000000000000..4d775ae141db
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/common.c
@@ -0,0 +1,299 @@
1/*
2 * Copyright (c) 2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17/*
18 * Module for common driver code between ath9k and ath9k_htc
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23
24#include "common.h"
25
26MODULE_AUTHOR("Atheros Communications");
27MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards.");
28MODULE_LICENSE("Dual BSD/GPL");
29
30/* Common RX processing */
31
32/* Assumes you've already done the endian to CPU conversion */
33static bool ath9k_rx_accept(struct ath_common *common,
34 struct sk_buff *skb,
35 struct ieee80211_rx_status *rxs,
36 struct ath_rx_status *rx_stats,
37 bool *decrypt_error)
38{
39 struct ath_hw *ah = common->ah;
40 struct ieee80211_hdr *hdr;
41 __le16 fc;
42
43 hdr = (struct ieee80211_hdr *) skb->data;
44 fc = hdr->frame_control;
45
46 if (!rx_stats->rs_datalen)
47 return false;
48 /*
49 * rs_status follows rs_datalen so if rs_datalen is too large
50 * we can take a hint that hardware corrupted it, so ignore
51 * those frames.
52 */
53 if (rx_stats->rs_datalen > common->rx_bufsize)
54 return false;
55
56 /*
57 * rs_more indicates chained descriptors which can be used
58 * to link buffers together for a sort of scatter-gather
59 * operation.
60 *
61 * The rx_stats->rs_status will not be set until the end of the
62 * chained descriptors so it can be ignored if rs_more is set. The
63 * rs_more will be false at the last element of the chained
64 * descriptors.
65 */
66 if (!rx_stats->rs_more && rx_stats->rs_status != 0) {
67 if (rx_stats->rs_status & ATH9K_RXERR_CRC)
68 rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
69 if (rx_stats->rs_status & ATH9K_RXERR_PHY)
70 return false;
71
72 if (rx_stats->rs_status & ATH9K_RXERR_DECRYPT) {
73 *decrypt_error = true;
74 } else if (rx_stats->rs_status & ATH9K_RXERR_MIC) {
75 if (ieee80211_is_ctl(fc))
76 /*
77 * Sometimes, we get invalid
78 * MIC failures on valid control frames.
79 * Remove these mic errors.
80 */
81 rx_stats->rs_status &= ~ATH9K_RXERR_MIC;
82 else
83 rxs->flag |= RX_FLAG_MMIC_ERROR;
84 }
85 /*
86 * Reject error frames with the exception of
87 * decryption and MIC failures. For monitor mode,
88 * we also ignore the CRC error.
89 */
90 if (ah->opmode == NL80211_IFTYPE_MONITOR) {
91 if (rx_stats->rs_status &
92 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
93 ATH9K_RXERR_CRC))
94 return false;
95 } else {
96 if (rx_stats->rs_status &
97 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
98 return false;
99 }
100 }
101 }
102 return true;
103}
104
105static u8 ath9k_process_rate(struct ath_common *common,
106 struct ieee80211_hw *hw,
107 struct ath_rx_status *rx_stats,
108 struct ieee80211_rx_status *rxs,
109 struct sk_buff *skb)
110{
111 struct ieee80211_supported_band *sband;
112 enum ieee80211_band band;
113 unsigned int i = 0;
114
115 band = hw->conf.channel->band;
116 sband = hw->wiphy->bands[band];
117
118 if (rx_stats->rs_rate & 0x80) {
119 /* HT rate */
120 rxs->flag |= RX_FLAG_HT;
121 if (rx_stats->rs_flags & ATH9K_RX_2040)
122 rxs->flag |= RX_FLAG_40MHZ;
123 if (rx_stats->rs_flags & ATH9K_RX_GI)
124 rxs->flag |= RX_FLAG_SHORT_GI;
125 return rx_stats->rs_rate & 0x7f;
126 }
127
128 for (i = 0; i < sband->n_bitrates; i++) {
129 if (sband->bitrates[i].hw_value == rx_stats->rs_rate)
130 return i;
131 if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
132 rxs->flag |= RX_FLAG_SHORTPRE;
133 return i;
134 }
135 }
136
137 /* No valid hardware bitrate found -- we should not get here */
138 ath_print(common, ATH_DBG_XMIT, "unsupported hw bitrate detected "
139 "0x%02x using 1 Mbit\n", rx_stats->rs_rate);
140 if ((common->debug_mask & ATH_DBG_XMIT))
141 print_hex_dump_bytes("", DUMP_PREFIX_NONE, skb->data, skb->len);
142
143 return 0;
144}
145
146static void ath9k_process_rssi(struct ath_common *common,
147 struct ieee80211_hw *hw,
148 struct sk_buff *skb,
149 struct ath_rx_status *rx_stats)
150{
151 struct ath_hw *ah = common->ah;
152 struct ieee80211_sta *sta;
153 struct ieee80211_hdr *hdr;
154 struct ath_node *an;
155 int last_rssi = ATH_RSSI_DUMMY_MARKER;
156 __le16 fc;
157
158 hdr = (struct ieee80211_hdr *)skb->data;
159 fc = hdr->frame_control;
160
161 rcu_read_lock();
162 /*
163 * XXX: use ieee80211_find_sta! This requires quite a bit of work
164 * under the current ath9k virtual wiphy implementation as we have
165 * no way of tying a vif to wiphy. Typically vifs are attached to
166 * at least one sdata of a wiphy on mac80211 but with ath9k virtual
167 * wiphy you'd have to iterate over every wiphy and each sdata.
168 */
169 sta = ieee80211_find_sta_by_hw(hw, hdr->addr2);
170 if (sta) {
171 an = (struct ath_node *) sta->drv_priv;
172 if (rx_stats->rs_rssi != ATH9K_RSSI_BAD &&
173 !rx_stats->rs_moreaggr)
174 ATH_RSSI_LPF(an->last_rssi, rx_stats->rs_rssi);
175 last_rssi = an->last_rssi;
176 }
177 rcu_read_unlock();
178
179 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
180 rx_stats->rs_rssi = ATH_EP_RND(last_rssi,
181 ATH_RSSI_EP_MULTIPLIER);
182 if (rx_stats->rs_rssi < 0)
183 rx_stats->rs_rssi = 0;
184
185 /* Update Beacon RSSI, this is used by ANI. */
186 if (ieee80211_is_beacon(fc))
187 ah->stats.avgbrssi = rx_stats->rs_rssi;
188}
189
190/*
191 * For Decrypt or Demic errors, we only mark packet status here and always push
192 * up the frame up to let mac80211 handle the actual error case, be it no
193 * decryption key or real decryption error. This let us keep statistics there.
194 */
195int ath9k_cmn_rx_skb_preprocess(struct ath_common *common,
196 struct ieee80211_hw *hw,
197 struct sk_buff *skb,
198 struct ath_rx_status *rx_stats,
199 struct ieee80211_rx_status *rx_status,
200 bool *decrypt_error)
201{
202 struct ath_hw *ah = common->ah;
203
204 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
205 if (!ath9k_rx_accept(common, skb, rx_status, rx_stats, decrypt_error))
206 return -EINVAL;
207
208 ath9k_process_rssi(common, hw, skb, rx_stats);
209
210 rx_status->rate_idx = ath9k_process_rate(common, hw,
211 rx_stats, rx_status, skb);
212 rx_status->mactime = ath9k_hw_extend_tsf(ah, rx_stats->rs_tstamp);
213 rx_status->band = hw->conf.channel->band;
214 rx_status->freq = hw->conf.channel->center_freq;
215 rx_status->noise = common->ani.noise_floor;
216 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + rx_stats->rs_rssi;
217 rx_status->antenna = rx_stats->rs_antenna;
218 rx_status->flag |= RX_FLAG_TSFT;
219
220 return 0;
221}
222EXPORT_SYMBOL(ath9k_cmn_rx_skb_preprocess);
223
224void ath9k_cmn_rx_skb_postprocess(struct ath_common *common,
225 struct sk_buff *skb,
226 struct ath_rx_status *rx_stats,
227 struct ieee80211_rx_status *rxs,
228 bool decrypt_error)
229{
230 struct ath_hw *ah = common->ah;
231 struct ieee80211_hdr *hdr;
232 int hdrlen, padpos, padsize;
233 u8 keyix;
234 __le16 fc;
235
236 /* see if any padding is done by the hw and remove it */
237 hdr = (struct ieee80211_hdr *) skb->data;
238 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
239 fc = hdr->frame_control;
240 padpos = ath9k_cmn_padpos(hdr->frame_control);
241
242 /* The MAC header is padded to have 32-bit boundary if the
243 * packet payload is non-zero. The general calculation for
244 * padsize would take into account odd header lengths:
245 * padsize = (4 - padpos % 4) % 4; However, since only
246 * even-length headers are used, padding can only be 0 or 2
247 * bytes and we can optimize this a bit. In addition, we must
248 * not try to remove padding from short control frames that do
249 * not have payload. */
250 padsize = padpos & 3;
251 if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
252 memmove(skb->data + padsize, skb->data, padpos);
253 skb_pull(skb, padsize);
254 }
255
256 keyix = rx_stats->rs_keyix;
257
258 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) {
259 rxs->flag |= RX_FLAG_DECRYPTED;
260 } else if (ieee80211_has_protected(fc)
261 && !decrypt_error && skb->len >= hdrlen + 4) {
262 keyix = skb->data[hdrlen + 3] >> 6;
263
264 if (test_bit(keyix, common->keymap))
265 rxs->flag |= RX_FLAG_DECRYPTED;
266 }
267 if (ah->sw_mgmt_crypto &&
268 (rxs->flag & RX_FLAG_DECRYPTED) &&
269 ieee80211_is_mgmt(fc))
270 /* Use software decrypt for management frames. */
271 rxs->flag &= ~RX_FLAG_DECRYPTED;
272}
273EXPORT_SYMBOL(ath9k_cmn_rx_skb_postprocess);
274
275int ath9k_cmn_padpos(__le16 frame_control)
276{
277 int padpos = 24;
278 if (ieee80211_has_a4(frame_control)) {
279 padpos += ETH_ALEN;
280 }
281 if (ieee80211_is_data_qos(frame_control)) {
282 padpos += IEEE80211_QOS_CTL_LEN;
283 }
284
285 return padpos;
286}
287EXPORT_SYMBOL(ath9k_cmn_padpos);
288
289static int __init ath9k_cmn_init(void)
290{
291 return 0;
292}
293module_init(ath9k_cmn_init);
294
295static void __exit ath9k_cmn_exit(void)
296{
297 return;
298}
299module_exit(ath9k_cmn_exit);
diff --git a/drivers/net/wireless/ath/ath9k/common.h b/drivers/net/wireless/ath/ath9k/common.h
new file mode 100644
index 000000000000..042999c2fe9c
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/common.h
@@ -0,0 +1,127 @@
1/*
2 * Copyright (c) 2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <net/mac80211.h>
18
19#include "../ath.h"
20#include "../debug.h"
21
22#include "hw.h"
23
24/* Common header for Atheros 802.11n base driver cores */
25
26#define WME_NUM_TID 16
27#define WME_BA_BMP_SIZE 64
28#define WME_MAX_BA WME_BA_BMP_SIZE
29#define ATH_TID_MAX_BUFS (2 * WME_MAX_BA)
30
31#define WME_AC_BE 0
32#define WME_AC_BK 1
33#define WME_AC_VI 2
34#define WME_AC_VO 3
35#define WME_NUM_AC 4
36
37#define ATH_RSSI_DUMMY_MARKER 0x127
38#define ATH_RSSI_LPF_LEN 10
39#define RSSI_LPF_THRESHOLD -20
40#define ATH_RSSI_EP_MULTIPLIER (1<<7)
41#define ATH_EP_MUL(x, mul) ((x) * (mul))
42#define ATH_RSSI_IN(x) (ATH_EP_MUL((x), ATH_RSSI_EP_MULTIPLIER))
43#define ATH_LPF_RSSI(x, y, len) \
44 ((x != ATH_RSSI_DUMMY_MARKER) ? (((x) * ((len) - 1) + (y)) / (len)) : (y))
45#define ATH_RSSI_LPF(x, y) do { \
46 if ((y) >= RSSI_LPF_THRESHOLD) \
47 x = ATH_LPF_RSSI((x), ATH_RSSI_IN((y)), ATH_RSSI_LPF_LEN); \
48} while (0)
49#define ATH_EP_RND(x, mul) \
50 ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
51
52struct ath_atx_ac {
53 int sched;
54 int qnum;
55 struct list_head list;
56 struct list_head tid_q;
57};
58
59struct ath_buf_state {
60 int bfs_nframes;
61 u16 bfs_al;
62 u16 bfs_frmlen;
63 int bfs_seqno;
64 int bfs_tidno;
65 int bfs_retries;
66 u8 bf_type;
67 u32 bfs_keyix;
68 enum ath9k_key_type bfs_keytype;
69};
70
71struct ath_buf {
72 struct list_head list;
73 struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
74 an aggregate) */
75 struct ath_buf *bf_next; /* next subframe in the aggregate */
76 struct sk_buff *bf_mpdu; /* enclosing frame structure */
77 struct ath_desc *bf_desc; /* virtual addr of desc */
78 dma_addr_t bf_daddr; /* physical addr of desc */
79 dma_addr_t bf_buf_addr; /* physical addr of data buffer */
80 bool bf_stale;
81 bool bf_isnullfunc;
82 u16 bf_flags;
83 struct ath_buf_state bf_state;
84 dma_addr_t bf_dmacontext;
85 struct ath_wiphy *aphy;
86};
87
88struct ath_atx_tid {
89 struct list_head list;
90 struct list_head buf_q;
91 struct ath_node *an;
92 struct ath_atx_ac *ac;
93 struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];
94 u16 seq_start;
95 u16 seq_next;
96 u16 baw_size;
97 int tidno;
98 int baw_head; /* first un-acked tx buffer */
99 int baw_tail; /* next unused tx buffer slot */
100 int sched;
101 int paused;
102 u8 state;
103};
104
105struct ath_node {
106 struct ath_common *common;
107 struct ath_atx_tid tid[WME_NUM_TID];
108 struct ath_atx_ac ac[WME_NUM_AC];
109 u16 maxampdu;
110 u8 mpdudensity;
111 int last_rssi;
112};
113
114int ath9k_cmn_rx_skb_preprocess(struct ath_common *common,
115 struct ieee80211_hw *hw,
116 struct sk_buff *skb,
117 struct ath_rx_status *rx_stats,
118 struct ieee80211_rx_status *rx_status,
119 bool *decrypt_error);
120
121void ath9k_cmn_rx_skb_postprocess(struct ath_common *common,
122 struct sk_buff *skb,
123 struct ath_rx_status *rx_stats,
124 struct ieee80211_rx_status *rxs,
125 bool decrypt_error);
126
127int ath9k_cmn_padpos(__le16 frame_control);
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index 2be4c2252047..081e0085ed4c 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -14,44 +14,35 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <linux/slab.h>
17#include <asm/unaligned.h> 18#include <asm/unaligned.h>
18 19
19#include "ath9k.h" 20#include "ath9k.h"
20 21
21static unsigned int ath9k_debug = DBG_DEFAULT; 22#define REG_WRITE_D(_ah, _reg, _val) \
22module_param_named(debug, ath9k_debug, uint, 0); 23 ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
24#define REG_READ_D(_ah, _reg) \
25 ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
23 26
24static struct dentry *ath9k_debugfs_root; 27static struct dentry *ath9k_debugfs_root;
25 28
26void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...)
27{
28 if (!sc)
29 return;
30
31 if (sc->debug.debug_mask & dbg_mask) {
32 va_list args;
33
34 va_start(args, fmt);
35 printk(KERN_DEBUG "ath9k: ");
36 vprintk(fmt, args);
37 va_end(args);
38 }
39}
40
41static int ath9k_debugfs_open(struct inode *inode, struct file *file) 29static int ath9k_debugfs_open(struct inode *inode, struct file *file)
42{ 30{
43 file->private_data = inode->i_private; 31 file->private_data = inode->i_private;
44 return 0; 32 return 0;
45} 33}
46 34
35#ifdef CONFIG_ATH_DEBUG
36
47static ssize_t read_file_debug(struct file *file, char __user *user_buf, 37static ssize_t read_file_debug(struct file *file, char __user *user_buf,
48 size_t count, loff_t *ppos) 38 size_t count, loff_t *ppos)
49{ 39{
50 struct ath_softc *sc = file->private_data; 40 struct ath_softc *sc = file->private_data;
41 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
51 char buf[32]; 42 char buf[32];
52 unsigned int len; 43 unsigned int len;
53 44
54 len = snprintf(buf, sizeof(buf), "0x%08x\n", sc->debug.debug_mask); 45 len = snprintf(buf, sizeof(buf), "0x%08x\n", common->debug_mask);
55 return simple_read_from_buffer(user_buf, count, ppos, buf, len); 46 return simple_read_from_buffer(user_buf, count, ppos, buf, len);
56} 47}
57 48
@@ -59,6 +50,7 @@ static ssize_t write_file_debug(struct file *file, const char __user *user_buf,
59 size_t count, loff_t *ppos) 50 size_t count, loff_t *ppos)
60{ 51{
61 struct ath_softc *sc = file->private_data; 52 struct ath_softc *sc = file->private_data;
53 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
62 unsigned long mask; 54 unsigned long mask;
63 char buf[32]; 55 char buf[32];
64 ssize_t len; 56 ssize_t len;
@@ -71,7 +63,7 @@ static ssize_t write_file_debug(struct file *file, const char __user *user_buf,
71 if (strict_strtoul(buf, 0, &mask)) 63 if (strict_strtoul(buf, 0, &mask))
72 return -EINVAL; 64 return -EINVAL;
73 65
74 sc->debug.debug_mask = mask; 66 common->debug_mask = mask;
75 return count; 67 return count;
76} 68}
77 69
@@ -82,38 +74,47 @@ static const struct file_operations fops_debug = {
82 .owner = THIS_MODULE 74 .owner = THIS_MODULE
83}; 75};
84 76
77#endif
78
79#define DMA_BUF_LEN 1024
80
85static ssize_t read_file_dma(struct file *file, char __user *user_buf, 81static ssize_t read_file_dma(struct file *file, char __user *user_buf,
86 size_t count, loff_t *ppos) 82 size_t count, loff_t *ppos)
87{ 83{
88 struct ath_softc *sc = file->private_data; 84 struct ath_softc *sc = file->private_data;
89 struct ath_hw *ah = sc->sc_ah; 85 struct ath_hw *ah = sc->sc_ah;
90 char buf[1024]; 86 char *buf;
87 int retval;
91 unsigned int len = 0; 88 unsigned int len = 0;
92 u32 val[ATH9K_NUM_DMA_DEBUG_REGS]; 89 u32 val[ATH9K_NUM_DMA_DEBUG_REGS];
93 int i, qcuOffset = 0, dcuOffset = 0; 90 int i, qcuOffset = 0, dcuOffset = 0;
94 u32 *qcuBase = &val[0], *dcuBase = &val[4]; 91 u32 *qcuBase = &val[0], *dcuBase = &val[4];
95 92
93 buf = kmalloc(DMA_BUF_LEN, GFP_KERNEL);
94 if (!buf)
95 return 0;
96
96 ath9k_ps_wakeup(sc); 97 ath9k_ps_wakeup(sc);
97 98
98 REG_WRITE(ah, AR_MACMISC, 99 REG_WRITE_D(ah, AR_MACMISC,
99 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) | 100 ((AR_MACMISC_DMA_OBS_LINE_8 << AR_MACMISC_DMA_OBS_S) |
100 (AR_MACMISC_MISC_OBS_BUS_1 << 101 (AR_MACMISC_MISC_OBS_BUS_1 <<
101 AR_MACMISC_MISC_OBS_BUS_MSB_S))); 102 AR_MACMISC_MISC_OBS_BUS_MSB_S)));
102 103
103 len += snprintf(buf + len, sizeof(buf) - len, 104 len += snprintf(buf + len, DMA_BUF_LEN - len,
104 "Raw DMA Debug values:\n"); 105 "Raw DMA Debug values:\n");
105 106
106 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) { 107 for (i = 0; i < ATH9K_NUM_DMA_DEBUG_REGS; i++) {
107 if (i % 4 == 0) 108 if (i % 4 == 0)
108 len += snprintf(buf + len, sizeof(buf) - len, "\n"); 109 len += snprintf(buf + len, DMA_BUF_LEN - len, "\n");
109 110
110 val[i] = REG_READ(ah, AR_DMADBG_0 + (i * sizeof(u32))); 111 val[i] = REG_READ_D(ah, AR_DMADBG_0 + (i * sizeof(u32)));
111 len += snprintf(buf + len, sizeof(buf) - len, "%d: %08x ", 112 len += snprintf(buf + len, DMA_BUF_LEN - len, "%d: %08x ",
112 i, val[i]); 113 i, val[i]);
113 } 114 }
114 115
115 len += snprintf(buf + len, sizeof(buf) - len, "\n\n"); 116 len += snprintf(buf + len, DMA_BUF_LEN - len, "\n\n");
116 len += snprintf(buf + len, sizeof(buf) - len, 117 len += snprintf(buf + len, DMA_BUF_LEN - len,
117 "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n"); 118 "Num QCU: chain_st fsp_ok fsp_st DCU: chain_st\n");
118 119
119 for (i = 0; i < ATH9K_NUM_QUEUES; i++, qcuOffset += 4, dcuOffset += 5) { 120 for (i = 0; i < ATH9K_NUM_QUEUES; i++, qcuOffset += 4, dcuOffset += 5) {
@@ -127,7 +128,7 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf,
127 dcuBase++; 128 dcuBase++;
128 } 129 }
129 130
130 len += snprintf(buf + len, sizeof(buf) - len, 131 len += snprintf(buf + len, DMA_BUF_LEN - len,
131 "%2d %2x %1x %2x %2x\n", 132 "%2d %2x %1x %2x %2x\n",
132 i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset, 133 i, (*qcuBase & (0x7 << qcuOffset)) >> qcuOffset,
133 (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3), 134 (*qcuBase & (0x8 << qcuOffset)) >> (qcuOffset + 3),
@@ -135,35 +136,37 @@ static ssize_t read_file_dma(struct file *file, char __user *user_buf,
135 (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset); 136 (*dcuBase & (0x1f << dcuOffset)) >> dcuOffset);
136 } 137 }
137 138
138 len += snprintf(buf + len, sizeof(buf) - len, "\n"); 139 len += snprintf(buf + len, DMA_BUF_LEN - len, "\n");
139 140
140 len += snprintf(buf + len, sizeof(buf) - len, 141 len += snprintf(buf + len, DMA_BUF_LEN - len,
141 "qcu_stitch state: %2x qcu_fetch state: %2x\n", 142 "qcu_stitch state: %2x qcu_fetch state: %2x\n",
142 (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22); 143 (val[3] & 0x003c0000) >> 18, (val[3] & 0x03c00000) >> 22);
143 len += snprintf(buf + len, sizeof(buf) - len, 144 len += snprintf(buf + len, DMA_BUF_LEN - len,
144 "qcu_complete state: %2x dcu_complete state: %2x\n", 145 "qcu_complete state: %2x dcu_complete state: %2x\n",
145 (val[3] & 0x1c000000) >> 26, (val[6] & 0x3)); 146 (val[3] & 0x1c000000) >> 26, (val[6] & 0x3));
146 len += snprintf(buf + len, sizeof(buf) - len, 147 len += snprintf(buf + len, DMA_BUF_LEN - len,
147 "dcu_arb state: %2x dcu_fp state: %2x\n", 148 "dcu_arb state: %2x dcu_fp state: %2x\n",
148 (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27); 149 (val[5] & 0x06000000) >> 25, (val[5] & 0x38000000) >> 27);
149 len += snprintf(buf + len, sizeof(buf) - len, 150 len += snprintf(buf + len, DMA_BUF_LEN - len,
150 "chan_idle_dur: %3d chan_idle_dur_valid: %1d\n", 151 "chan_idle_dur: %3d chan_idle_dur_valid: %1d\n",
151 (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10); 152 (val[6] & 0x000003fc) >> 2, (val[6] & 0x00000400) >> 10);
152 len += snprintf(buf + len, sizeof(buf) - len, 153 len += snprintf(buf + len, DMA_BUF_LEN - len,
153 "txfifo_valid_0: %1d txfifo_valid_1: %1d\n", 154 "txfifo_valid_0: %1d txfifo_valid_1: %1d\n",
154 (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12); 155 (val[6] & 0x00000800) >> 11, (val[6] & 0x00001000) >> 12);
155 len += snprintf(buf + len, sizeof(buf) - len, 156 len += snprintf(buf + len, DMA_BUF_LEN - len,
156 "txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n", 157 "txfifo_dcu_num_0: %2d txfifo_dcu_num_1: %2d\n",
157 (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17); 158 (val[6] & 0x0001e000) >> 13, (val[6] & 0x001e0000) >> 17);
158 159
159 len += snprintf(buf + len, sizeof(buf) - len, "pcu observe: 0x%x \n", 160 len += snprintf(buf + len, DMA_BUF_LEN - len, "pcu observe: 0x%x \n",
160 REG_READ(ah, AR_OBS_BUS_1)); 161 REG_READ_D(ah, AR_OBS_BUS_1));
161 len += snprintf(buf + len, sizeof(buf) - len, 162 len += snprintf(buf + len, DMA_BUF_LEN - len,
162 "AR_CR: 0x%x \n", REG_READ(ah, AR_CR)); 163 "AR_CR: 0x%x \n", REG_READ_D(ah, AR_CR));
163 164
164 ath9k_ps_restore(sc); 165 ath9k_ps_restore(sc);
165 166
166 return simple_read_from_buffer(user_buf, count, ppos, buf, len); 167 retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
168 kfree(buf);
169 return retval;
167} 170}
168 171
169static const struct file_operations fops_dma = { 172static const struct file_operations fops_dma = {
@@ -266,18 +269,11 @@ static const struct file_operations fops_interrupt = {
266 .owner = THIS_MODULE 269 .owner = THIS_MODULE
267}; 270};
268 271
269void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb) 272void ath_debug_stat_rc(struct ath_softc *sc, int final_rate)
270{ 273{
271 struct ath_tx_info_priv *tx_info_priv = NULL;
272 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
273 struct ieee80211_tx_rate *rates = tx_info->status.rates;
274 int final_ts_idx, idx;
275 struct ath_rc_stats *stats; 274 struct ath_rc_stats *stats;
276 275
277 tx_info_priv = ATH_TX_INFO_PRIV(tx_info); 276 stats = &sc->debug.stats.rcstats[final_rate];
278 final_ts_idx = tx_info_priv->tx.ts_rateindex;
279 idx = rates[final_ts_idx].idx;
280 stats = &sc->debug.stats.rcstats[idx];
281 stats->success++; 277 stats->success++;
282} 278}
283 279
@@ -303,23 +299,49 @@ static ssize_t read_file_rcstat(struct file *file, char __user *user_buf,
303 if (sc->cur_rate_table == NULL) 299 if (sc->cur_rate_table == NULL)
304 return 0; 300 return 0;
305 301
306 max = 80 + sc->cur_rate_table->rate_cnt * 64; 302 max = 80 + sc->cur_rate_table->rate_cnt * 1024;
307 buf = kmalloc(max + 1, GFP_KERNEL); 303 buf = kmalloc(max + 1, GFP_KERNEL);
308 if (buf == NULL) 304 if (buf == NULL)
309 return 0; 305 return 0;
310 buf[max] = 0; 306 buf[max] = 0;
311 307
312 len += sprintf(buf, "%5s %15s %8s %9s %3s\n\n", "Rate", "Success", 308 len += sprintf(buf, "%6s %6s %6s "
313 "Retries", "XRetries", "PER"); 309 "%10s %10s %10s %10s\n",
310 "HT", "MCS", "Rate",
311 "Success", "Retries", "XRetries", "PER");
314 312
315 for (i = 0; i < sc->cur_rate_table->rate_cnt; i++) { 313 for (i = 0; i < sc->cur_rate_table->rate_cnt; i++) {
316 u32 ratekbps = sc->cur_rate_table->info[i].ratekbps; 314 u32 ratekbps = sc->cur_rate_table->info[i].ratekbps;
317 struct ath_rc_stats *stats = &sc->debug.stats.rcstats[i]; 315 struct ath_rc_stats *stats = &sc->debug.stats.rcstats[i];
316 char mcs[5];
317 char htmode[5];
318 int used_mcs = 0, used_htmode = 0;
319
320 if (WLAN_RC_PHY_HT(sc->cur_rate_table->info[i].phy)) {
321 used_mcs = snprintf(mcs, 5, "%d",
322 sc->cur_rate_table->info[i].ratecode);
323
324 if (WLAN_RC_PHY_40(sc->cur_rate_table->info[i].phy))
325 used_htmode = snprintf(htmode, 5, "HT40");
326 else if (WLAN_RC_PHY_20(sc->cur_rate_table->info[i].phy))
327 used_htmode = snprintf(htmode, 5, "HT20");
328 else
329 used_htmode = snprintf(htmode, 5, "????");
330 }
331
332 mcs[used_mcs] = '\0';
333 htmode[used_htmode] = '\0';
318 334
319 len += snprintf(buf + len, max - len, 335 len += snprintf(buf + len, max - len,
320 "%3u.%d: %8u %8u %8u %8u\n", ratekbps / 1000, 336 "%6s %6s %3u.%d: "
321 (ratekbps % 1000) / 100, stats->success, 337 "%10u %10u %10u %10u\n",
322 stats->retries, stats->xretries, 338 htmode,
339 mcs,
340 ratekbps / 1000,
341 (ratekbps % 1000) / 100,
342 stats->success,
343 stats->retries,
344 stats->xretries,
323 stats->per); 345 stats->per);
324 } 346 }
325 347
@@ -376,12 +398,12 @@ static ssize_t read_file_wiphy(struct file *file, char __user *user_buf,
376 aphy->chan_idx, aphy->chan_is_ht); 398 aphy->chan_idx, aphy->chan_is_ht);
377 } 399 }
378 400
379 put_unaligned_le32(REG_READ(sc->sc_ah, AR_STA_ID0), addr); 401 put_unaligned_le32(REG_READ_D(sc->sc_ah, AR_STA_ID0), addr);
380 put_unaligned_le16(REG_READ(sc->sc_ah, AR_STA_ID1) & 0xffff, addr + 4); 402 put_unaligned_le16(REG_READ_D(sc->sc_ah, AR_STA_ID1) & 0xffff, addr + 4);
381 len += snprintf(buf + len, sizeof(buf) - len, 403 len += snprintf(buf + len, sizeof(buf) - len,
382 "addr: %pM\n", addr); 404 "addr: %pM\n", addr);
383 put_unaligned_le32(REG_READ(sc->sc_ah, AR_BSSMSKL), addr); 405 put_unaligned_le32(REG_READ_D(sc->sc_ah, AR_BSSMSKL), addr);
384 put_unaligned_le16(REG_READ(sc->sc_ah, AR_BSSMSKU) & 0xffff, addr + 4); 406 put_unaligned_le16(REG_READ_D(sc->sc_ah, AR_BSSMSKU) & 0xffff, addr + 4);
385 len += snprintf(buf + len, sizeof(buf) - len, 407 len += snprintf(buf + len, sizeof(buf) - len,
386 "addrmask: %pM\n", addr); 408 "addrmask: %pM\n", addr);
387 409
@@ -568,9 +590,120 @@ static const struct file_operations fops_xmit = {
568 .owner = THIS_MODULE 590 .owner = THIS_MODULE
569}; 591};
570 592
571int ath9k_init_debug(struct ath_softc *sc) 593static ssize_t read_file_recv(struct file *file, char __user *user_buf,
594 size_t count, loff_t *ppos)
572{ 595{
573 sc->debug.debug_mask = ath9k_debug; 596#define PHY_ERR(s, p) \
597 len += snprintf(buf + len, size - len, "%18s : %10u\n", s, \
598 sc->debug.stats.rxstats.phy_err_stats[p]);
599
600 struct ath_softc *sc = file->private_data;
601 char *buf;
602 unsigned int len = 0, size = 1152;
603 ssize_t retval = 0;
604
605 buf = kzalloc(size, GFP_KERNEL);
606 if (buf == NULL)
607 return 0;
608
609 len += snprintf(buf + len, size - len,
610 "%18s : %10u\n", "CRC ERR",
611 sc->debug.stats.rxstats.crc_err);
612 len += snprintf(buf + len, size - len,
613 "%18s : %10u\n", "DECRYPT CRC ERR",
614 sc->debug.stats.rxstats.decrypt_crc_err);
615 len += snprintf(buf + len, size - len,
616 "%18s : %10u\n", "PHY ERR",
617 sc->debug.stats.rxstats.phy_err);
618 len += snprintf(buf + len, size - len,
619 "%18s : %10u\n", "MIC ERR",
620 sc->debug.stats.rxstats.mic_err);
621 len += snprintf(buf + len, size - len,
622 "%18s : %10u\n", "PRE-DELIM CRC ERR",
623 sc->debug.stats.rxstats.pre_delim_crc_err);
624 len += snprintf(buf + len, size - len,
625 "%18s : %10u\n", "POST-DELIM CRC ERR",
626 sc->debug.stats.rxstats.post_delim_crc_err);
627 len += snprintf(buf + len, size - len,
628 "%18s : %10u\n", "DECRYPT BUSY ERR",
629 sc->debug.stats.rxstats.decrypt_busy_err);
630
631 PHY_ERR("UNDERRUN", ATH9K_PHYERR_UNDERRUN);
632 PHY_ERR("TIMING", ATH9K_PHYERR_TIMING);
633 PHY_ERR("PARITY", ATH9K_PHYERR_PARITY);
634 PHY_ERR("RATE", ATH9K_PHYERR_RATE);
635 PHY_ERR("LENGTH", ATH9K_PHYERR_LENGTH);
636 PHY_ERR("RADAR", ATH9K_PHYERR_RADAR);
637 PHY_ERR("SERVICE", ATH9K_PHYERR_SERVICE);
638 PHY_ERR("TOR", ATH9K_PHYERR_TOR);
639 PHY_ERR("OFDM-TIMING", ATH9K_PHYERR_OFDM_TIMING);
640 PHY_ERR("OFDM-SIGNAL-PARITY", ATH9K_PHYERR_OFDM_SIGNAL_PARITY);
641 PHY_ERR("OFDM-RATE", ATH9K_PHYERR_OFDM_RATE_ILLEGAL);
642 PHY_ERR("OFDM-LENGTH", ATH9K_PHYERR_OFDM_LENGTH_ILLEGAL);
643 PHY_ERR("OFDM-POWER-DROP", ATH9K_PHYERR_OFDM_POWER_DROP);
644 PHY_ERR("OFDM-SERVICE", ATH9K_PHYERR_OFDM_SERVICE);
645 PHY_ERR("OFDM-RESTART", ATH9K_PHYERR_OFDM_RESTART);
646 PHY_ERR("FALSE-RADAR-EXT", ATH9K_PHYERR_FALSE_RADAR_EXT);
647 PHY_ERR("CCK-TIMING", ATH9K_PHYERR_CCK_TIMING);
648 PHY_ERR("CCK-HEADER-CRC", ATH9K_PHYERR_CCK_HEADER_CRC);
649 PHY_ERR("CCK-RATE", ATH9K_PHYERR_CCK_RATE_ILLEGAL);
650 PHY_ERR("CCK-SERVICE", ATH9K_PHYERR_CCK_SERVICE);
651 PHY_ERR("CCK-RESTART", ATH9K_PHYERR_CCK_RESTART);
652 PHY_ERR("CCK-LENGTH", ATH9K_PHYERR_CCK_LENGTH_ILLEGAL);
653 PHY_ERR("CCK-POWER-DROP", ATH9K_PHYERR_CCK_POWER_DROP);
654 PHY_ERR("HT-CRC", ATH9K_PHYERR_HT_CRC_ERROR);
655 PHY_ERR("HT-LENGTH", ATH9K_PHYERR_HT_LENGTH_ILLEGAL);
656 PHY_ERR("HT-RATE", ATH9K_PHYERR_HT_RATE_ILLEGAL);
657
658 retval = simple_read_from_buffer(user_buf, count, ppos, buf, len);
659 kfree(buf);
660
661 return retval;
662
663#undef PHY_ERR
664}
665
666void ath_debug_stat_rx(struct ath_softc *sc, struct ath_buf *bf)
667{
668#define RX_STAT_INC(c) sc->debug.stats.rxstats.c++
669#define RX_PHY_ERR_INC(c) sc->debug.stats.rxstats.phy_err_stats[c]++
670
671 struct ath_desc *ds = bf->bf_desc;
672 u32 phyerr;
673
674 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
675 RX_STAT_INC(crc_err);
676 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT)
677 RX_STAT_INC(decrypt_crc_err);
678 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC)
679 RX_STAT_INC(mic_err);
680 if (ds->ds_rxstat.rs_status & ATH9K_RX_DELIM_CRC_PRE)
681 RX_STAT_INC(pre_delim_crc_err);
682 if (ds->ds_rxstat.rs_status & ATH9K_RX_DELIM_CRC_POST)
683 RX_STAT_INC(post_delim_crc_err);
684 if (ds->ds_rxstat.rs_status & ATH9K_RX_DECRYPT_BUSY)
685 RX_STAT_INC(decrypt_busy_err);
686
687 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY) {
688 RX_STAT_INC(phy_err);
689 phyerr = ds->ds_rxstat.rs_phyerr & 0x24;
690 RX_PHY_ERR_INC(phyerr);
691 }
692
693#undef RX_STAT_INC
694#undef RX_PHY_ERR_INC
695}
696
697static const struct file_operations fops_recv = {
698 .read = read_file_recv,
699 .open = ath9k_debugfs_open,
700 .owner = THIS_MODULE
701};
702
703int ath9k_init_debug(struct ath_hw *ah)
704{
705 struct ath_common *common = ath9k_hw_common(ah);
706 struct ath_softc *sc = (struct ath_softc *) common->priv;
574 707
575 if (!ath9k_debugfs_root) 708 if (!ath9k_debugfs_root)
576 return -ENOENT; 709 return -ENOENT;
@@ -580,10 +713,12 @@ int ath9k_init_debug(struct ath_softc *sc)
580 if (!sc->debug.debugfs_phy) 713 if (!sc->debug.debugfs_phy)
581 goto err; 714 goto err;
582 715
716#ifdef CONFIG_ATH_DEBUG
583 sc->debug.debugfs_debug = debugfs_create_file("debug", 717 sc->debug.debugfs_debug = debugfs_create_file("debug",
584 S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, sc, &fops_debug); 718 S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, sc, &fops_debug);
585 if (!sc->debug.debugfs_debug) 719 if (!sc->debug.debugfs_debug)
586 goto err; 720 goto err;
721#endif
587 722
588 sc->debug.debugfs_dma = debugfs_create_file("dma", S_IRUSR, 723 sc->debug.debugfs_dma = debugfs_create_file("dma", S_IRUSR,
589 sc->debug.debugfs_phy, sc, &fops_dma); 724 sc->debug.debugfs_phy, sc, &fops_dma);
@@ -617,14 +752,25 @@ int ath9k_init_debug(struct ath_softc *sc)
617 if (!sc->debug.debugfs_xmit) 752 if (!sc->debug.debugfs_xmit)
618 goto err; 753 goto err;
619 754
755 sc->debug.debugfs_recv = debugfs_create_file("recv",
756 S_IRUSR,
757 sc->debug.debugfs_phy,
758 sc, &fops_recv);
759 if (!sc->debug.debugfs_recv)
760 goto err;
761
620 return 0; 762 return 0;
621err: 763err:
622 ath9k_exit_debug(sc); 764 ath9k_exit_debug(ah);
623 return -ENOMEM; 765 return -ENOMEM;
624} 766}
625 767
626void ath9k_exit_debug(struct ath_softc *sc) 768void ath9k_exit_debug(struct ath_hw *ah)
627{ 769{
770 struct ath_common *common = ath9k_hw_common(ah);
771 struct ath_softc *sc = (struct ath_softc *) common->priv;
772
773 debugfs_remove(sc->debug.debugfs_recv);
628 debugfs_remove(sc->debug.debugfs_xmit); 774 debugfs_remove(sc->debug.debugfs_xmit);
629 debugfs_remove(sc->debug.debugfs_wiphy); 775 debugfs_remove(sc->debug.debugfs_wiphy);
630 debugfs_remove(sc->debug.debugfs_rcstat); 776 debugfs_remove(sc->debug.debugfs_rcstat);
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 7241f4748338..86780e68b31e 100644
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -17,36 +17,19 @@
17#ifndef DEBUG_H 17#ifndef DEBUG_H
18#define DEBUG_H 18#define DEBUG_H
19 19
20enum ATH_DEBUG { 20#include "hw.h"
21 ATH_DBG_RESET = 0x00000001, 21#include "rc.h"
22 ATH_DBG_QUEUE = 0x00000002,
23 ATH_DBG_EEPROM = 0x00000004,
24 ATH_DBG_CALIBRATE = 0x00000008,
25 ATH_DBG_INTERRUPT = 0x00000010,
26 ATH_DBG_REGULATORY = 0x00000020,
27 ATH_DBG_ANI = 0x00000040,
28 ATH_DBG_XMIT = 0x00000080,
29 ATH_DBG_BEACON = 0x00000100,
30 ATH_DBG_CONFIG = 0x00000200,
31 ATH_DBG_FATAL = 0x00000400,
32 ATH_DBG_PS = 0x00000800,
33 ATH_DBG_HWTIMER = 0x00001000,
34 ATH_DBG_BTCOEX = 0x00002000,
35 ATH_DBG_ANY = 0xffffffff
36};
37
38#define DBG_DEFAULT (ATH_DBG_FATAL)
39 22
40struct ath_txq; 23struct ath_txq;
41struct ath_buf; 24struct ath_buf;
42 25
43#ifdef CONFIG_ATH9K_DEBUG 26#ifdef CONFIG_ATH9K_DEBUGFS
44#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++ 27#define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
45#else 28#else
46#define TX_STAT_INC(q, c) do { } while (0) 29#define TX_STAT_INC(q, c) do { } while (0)
47#endif 30#endif
48 31
49#ifdef CONFIG_ATH9K_DEBUG 32#ifdef CONFIG_ATH9K_DEBUGFS
50 33
51/** 34/**
52 * struct ath_interrupt_stats - Contains statistics about interrupts 35 * struct ath_interrupt_stats - Contains statistics about interrupts
@@ -133,14 +116,38 @@ struct ath_tx_stats {
133 u32 delim_underrun; 116 u32 delim_underrun;
134}; 117};
135 118
119/**
120 * struct ath_rx_stats - RX Statistics
121 * @crc_err: No. of frames with incorrect CRC value
122 * @decrypt_crc_err: No. of frames whose CRC check failed after
123 decryption process completed
124 * @phy_err: No. of frames whose reception failed because the PHY
125 encountered an error
126 * @mic_err: No. of frames with incorrect TKIP MIC verification failure
127 * @pre_delim_crc_err: Pre-Frame delimiter CRC error detections
128 * @post_delim_crc_err: Post-Frame delimiter CRC error detections
129 * @decrypt_busy_err: Decryption interruptions counter
130 * @phy_err_stats: Individual PHY error statistics
131 */
132struct ath_rx_stats {
133 u32 crc_err;
134 u32 decrypt_crc_err;
135 u32 phy_err;
136 u32 mic_err;
137 u32 pre_delim_crc_err;
138 u32 post_delim_crc_err;
139 u32 decrypt_busy_err;
140 u32 phy_err_stats[ATH9K_PHYERR_MAX];
141};
142
136struct ath_stats { 143struct ath_stats {
137 struct ath_interrupt_stats istats; 144 struct ath_interrupt_stats istats;
138 struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; 145 struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
139 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES]; 146 struct ath_tx_stats txstats[ATH9K_NUM_TX_QUEUES];
147 struct ath_rx_stats rxstats;
140}; 148};
141 149
142struct ath9k_debug { 150struct ath9k_debug {
143 int debug_mask;
144 struct dentry *debugfs_phy; 151 struct dentry *debugfs_phy;
145 struct dentry *debugfs_debug; 152 struct dentry *debugfs_debug;
146 struct dentry *debugfs_dma; 153 struct dentry *debugfs_dma;
@@ -148,34 +155,31 @@ struct ath9k_debug {
148 struct dentry *debugfs_rcstat; 155 struct dentry *debugfs_rcstat;
149 struct dentry *debugfs_wiphy; 156 struct dentry *debugfs_wiphy;
150 struct dentry *debugfs_xmit; 157 struct dentry *debugfs_xmit;
158 struct dentry *debugfs_recv;
151 struct ath_stats stats; 159 struct ath_stats stats;
152}; 160};
153 161
154void DPRINTF(struct ath_softc *sc, int dbg_mask, const char *fmt, ...); 162int ath9k_init_debug(struct ath_hw *ah);
155int ath9k_init_debug(struct ath_softc *sc); 163void ath9k_exit_debug(struct ath_hw *ah);
156void ath9k_exit_debug(struct ath_softc *sc); 164
157int ath9k_debug_create_root(void); 165int ath9k_debug_create_root(void);
158void ath9k_debug_remove_root(void); 166void ath9k_debug_remove_root(void);
159void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status); 167void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
160void ath_debug_stat_rc(struct ath_softc *sc, struct sk_buff *skb); 168void ath_debug_stat_rc(struct ath_softc *sc, int final_rate);
161void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq, 169void ath_debug_stat_tx(struct ath_softc *sc, struct ath_txq *txq,
162 struct ath_buf *bf); 170 struct ath_buf *bf);
171void ath_debug_stat_rx(struct ath_softc *sc, struct ath_buf *bf);
163void ath_debug_stat_retries(struct ath_softc *sc, int rix, 172void ath_debug_stat_retries(struct ath_softc *sc, int rix,
164 int xretries, int retries, u8 per); 173 int xretries, int retries, u8 per);
165 174
166#else 175#else
167 176
168static inline void DPRINTF(struct ath_softc *sc, int dbg_mask, 177static inline int ath9k_init_debug(struct ath_hw *ah)
169 const char *fmt, ...)
170{
171}
172
173static inline int ath9k_init_debug(struct ath_softc *sc)
174{ 178{
175 return 0; 179 return 0;
176} 180}
177 181
178static inline void ath9k_exit_debug(struct ath_softc *sc) 182static inline void ath9k_exit_debug(struct ath_hw *ah)
179{ 183{
180} 184}
181 185
@@ -194,7 +198,7 @@ static inline void ath_debug_stat_interrupt(struct ath_softc *sc,
194} 198}
195 199
196static inline void ath_debug_stat_rc(struct ath_softc *sc, 200static inline void ath_debug_stat_rc(struct ath_softc *sc,
197 struct sk_buff *skb) 201 int final_rate)
198{ 202{
199} 203}
200 204
@@ -204,11 +208,16 @@ static inline void ath_debug_stat_tx(struct ath_softc *sc,
204{ 208{
205} 209}
206 210
211static inline void ath_debug_stat_rx(struct ath_softc *sc,
212 struct ath_buf *bf)
213{
214}
215
207static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix, 216static inline void ath_debug_stat_retries(struct ath_softc *sc, int rix,
208 int xretries, int retries, u8 per) 217 int xretries, int retries, u8 per)
209{ 218{
210} 219}
211 220
212#endif /* CONFIG_ATH9K_DEBUG */ 221#endif /* CONFIG_ATH9K_DEBUGFS */
213 222
214#endif /* DEBUG_H */ 223#endif /* DEBUG_H */
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index b6e52d0f8c48..dacaae934148 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -14,7 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz) 19static inline u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)
20{ 20{
@@ -83,11 +83,9 @@ bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
83 return false; 83 return false;
84} 84}
85 85
86bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data) 86bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data)
87{ 87{
88 struct ath_softc *sc = ah->ah_sc; 88 return common->bus_ops->eeprom_read(common, off, data);
89
90 return sc->bus_ops->eeprom_read(ah, off, data);
91} 89}
92 90
93void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, 91void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.h b/drivers/net/wireless/ath/ath9k/eeprom.h
index 4fe33f7eee9d..2f2993b50e2f 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.h
+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
@@ -17,6 +17,7 @@
17#ifndef EEPROM_H 17#ifndef EEPROM_H
18#define EEPROM_H 18#define EEPROM_H
19 19
20#include "../ath.h"
20#include <net/cfg80211.h> 21#include <net/cfg80211.h>
21 22
22#define AH_USE_EEPROM 0x1 23#define AH_USE_EEPROM 0x1
@@ -133,6 +134,7 @@
133#define AR5416_EEP_MINOR_VER_17 0x11 134#define AR5416_EEP_MINOR_VER_17 0x11
134#define AR5416_EEP_MINOR_VER_19 0x13 135#define AR5416_EEP_MINOR_VER_19 0x13
135#define AR5416_EEP_MINOR_VER_20 0x14 136#define AR5416_EEP_MINOR_VER_20 0x14
137#define AR5416_EEP_MINOR_VER_21 0x15
136#define AR5416_EEP_MINOR_VER_22 0x16 138#define AR5416_EEP_MINOR_VER_22 0x16
137 139
138#define AR5416_NUM_5G_CAL_PIERS 8 140#define AR5416_NUM_5G_CAL_PIERS 8
@@ -153,7 +155,7 @@
153#define AR5416_BCHAN_UNUSED 0xFF 155#define AR5416_BCHAN_UNUSED 0xFF
154#define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64 156#define AR5416_MAX_PWR_RANGE_IN_HALF_DB 64
155#define AR5416_MAX_CHAINS 3 157#define AR5416_MAX_CHAINS 3
156#define AR5416_PWR_TABLE_OFFSET -5 158#define AR5416_PWR_TABLE_OFFSET_DB -5
157 159
158/* Rx gain type values */ 160/* Rx gain type values */
159#define AR5416_EEP_RXGAIN_23DB_BACKOFF 0 161#define AR5416_EEP_RXGAIN_23DB_BACKOFF 0
@@ -301,7 +303,7 @@ struct base_eep_header {
301 u8 txGainType; 303 u8 txGainType;
302 u8 rcChainMask; 304 u8 rcChainMask;
303 u8 desiredScaleCCK; 305 u8 desiredScaleCCK;
304 u8 power_table_offset; 306 u8 pwr_table_offset;
305 u8 frac_n_5g; 307 u8 frac_n_5g;
306 u8 futureBase_3[21]; 308 u8 futureBase_3[21];
307} __packed; 309} __packed;
@@ -638,6 +640,7 @@ struct ar9287_eeprom {
638} __packed; 640} __packed;
639 641
640enum reg_ext_bitmap { 642enum reg_ext_bitmap {
643 REG_EXT_FCC_MIDBAND = 0,
641 REG_EXT_JAPAN_MIDBAND = 1, 644 REG_EXT_JAPAN_MIDBAND = 1,
642 REG_EXT_FCC_DFS_HT40 = 2, 645 REG_EXT_FCC_DFS_HT40 = 2,
643 REG_EXT_JAPAN_NONDFS_HT40 = 3, 646 REG_EXT_JAPAN_NONDFS_HT40 = 3,
@@ -684,7 +687,7 @@ int16_t ath9k_hw_interpolate(u16 target, u16 srcLeft, u16 srcRight,
684 int16_t targetRight); 687 int16_t targetRight);
685bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize, 688bool ath9k_hw_get_lower_upper_index(u8 target, u8 *pList, u16 listSize,
686 u16 *indexL, u16 *indexR); 689 u16 *indexL, u16 *indexR);
687bool ath9k_hw_nvram_read(struct ath_hw *ah, u32 off, u16 *data); 690bool ath9k_hw_nvram_read(struct ath_common *common, u32 off, u16 *data);
688void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList, 691void ath9k_hw_fill_vpd_table(u8 pwrMin, u8 pwrMax, u8 *pPwrList,
689 u8 *pVpdList, u16 numIntercepts, 692 u8 *pVpdList, u16 numIntercepts,
690 u8 *pRetVpdList); 693 u8 *pRetVpdList);
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_4k.c b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
index b8eca7be5f3a..68db16690abf 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
@@ -14,7 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah) 19static int ath9k_hw_4k_get_eeprom_ver(struct ath_hw *ah)
20{ 20{
@@ -29,20 +29,21 @@ static int ath9k_hw_4k_get_eeprom_rev(struct ath_hw *ah)
29static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah) 29static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
30{ 30{
31#define SIZE_EEPROM_4K (sizeof(struct ar5416_eeprom_4k) / sizeof(u16)) 31#define SIZE_EEPROM_4K (sizeof(struct ar5416_eeprom_4k) / sizeof(u16))
32 struct ath_common *common = ath9k_hw_common(ah);
32 u16 *eep_data = (u16 *)&ah->eeprom.map4k; 33 u16 *eep_data = (u16 *)&ah->eeprom.map4k;
33 int addr, eep_start_loc = 0; 34 int addr, eep_start_loc = 0;
34 35
35 eep_start_loc = 64; 36 eep_start_loc = 64;
36 37
37 if (!ath9k_hw_use_flash(ah)) { 38 if (!ath9k_hw_use_flash(ah)) {
38 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 39 ath_print(common, ATH_DBG_EEPROM,
39 "Reading from EEPROM, not flash\n"); 40 "Reading from EEPROM, not flash\n");
40 } 41 }
41 42
42 for (addr = 0; addr < SIZE_EEPROM_4K; addr++) { 43 for (addr = 0; addr < SIZE_EEPROM_4K; addr++) {
43 if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data)) { 44 if (!ath9k_hw_nvram_read(common, addr + eep_start_loc, eep_data)) {
44 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 45 ath_print(common, ATH_DBG_EEPROM,
45 "Unable to read eeprom region \n"); 46 "Unable to read eeprom region \n");
46 return false; 47 return false;
47 } 48 }
48 eep_data++; 49 eep_data++;
@@ -55,6 +56,7 @@ static bool ath9k_hw_4k_fill_eeprom(struct ath_hw *ah)
55static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah) 56static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
56{ 57{
57#define EEPROM_4K_SIZE (sizeof(struct ar5416_eeprom_4k) / sizeof(u16)) 58#define EEPROM_4K_SIZE (sizeof(struct ar5416_eeprom_4k) / sizeof(u16))
59 struct ath_common *common = ath9k_hw_common(ah);
58 struct ar5416_eeprom_4k *eep = 60 struct ar5416_eeprom_4k *eep =
59 (struct ar5416_eeprom_4k *) &ah->eeprom.map4k; 61 (struct ar5416_eeprom_4k *) &ah->eeprom.map4k;
60 u16 *eepdata, temp, magic, magic2; 62 u16 *eepdata, temp, magic, magic2;
@@ -64,15 +66,15 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
64 66
65 67
66 if (!ath9k_hw_use_flash(ah)) { 68 if (!ath9k_hw_use_flash(ah)) {
67 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, 69 if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET,
68 &magic)) { 70 &magic)) {
69 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 71 ath_print(common, ATH_DBG_FATAL,
70 "Reading Magic # failed\n"); 72 "Reading Magic # failed\n");
71 return false; 73 return false;
72 } 74 }
73 75
74 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 76 ath_print(common, ATH_DBG_EEPROM,
75 "Read Magic = 0x%04X\n", magic); 77 "Read Magic = 0x%04X\n", magic);
76 78
77 if (magic != AR5416_EEPROM_MAGIC) { 79 if (magic != AR5416_EEPROM_MAGIC) {
78 magic2 = swab16(magic); 80 magic2 = swab16(magic);
@@ -87,16 +89,16 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
87 eepdata++; 89 eepdata++;
88 } 90 }
89 } else { 91 } else {
90 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 92 ath_print(common, ATH_DBG_FATAL,
91 "Invalid EEPROM Magic. " 93 "Invalid EEPROM Magic. "
92 "endianness mismatch.\n"); 94 "endianness mismatch.\n");
93 return -EINVAL; 95 return -EINVAL;
94 } 96 }
95 } 97 }
96 } 98 }
97 99
98 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "need_swap = %s.\n", 100 ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
99 need_swap ? "True" : "False"); 101 need_swap ? "True" : "False");
100 102
101 if (need_swap) 103 if (need_swap)
102 el = swab16(ah->eeprom.map4k.baseEepHeader.length); 104 el = swab16(ah->eeprom.map4k.baseEepHeader.length);
@@ -117,8 +119,8 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
117 u32 integer; 119 u32 integer;
118 u16 word; 120 u16 word;
119 121
120 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 122 ath_print(common, ATH_DBG_EEPROM,
121 "EEPROM Endianness is not native.. Changing\n"); 123 "EEPROM Endianness is not native.. Changing\n");
122 124
123 word = swab16(eep->baseEepHeader.length); 125 word = swab16(eep->baseEepHeader.length);
124 eep->baseEepHeader.length = word; 126 eep->baseEepHeader.length = word;
@@ -160,9 +162,9 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
160 162
161 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER || 163 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER ||
162 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) { 164 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) {
163 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 165 ath_print(common, ATH_DBG_FATAL,
164 "Bad EEPROM checksum 0x%x or revision 0x%04x\n", 166 "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
165 sum, ah->eep_ops->get_eeprom_ver(ah)); 167 sum, ah->eep_ops->get_eeprom_ver(ah));
166 return -EINVAL; 168 return -EINVAL;
167 } 169 }
168 170
@@ -208,6 +210,8 @@ static u32 ath9k_hw_4k_get_eeprom(struct ath_hw *ah,
208 return pBase->rxMask; 210 return pBase->rxMask;
209 case EEP_FRAC_N_5G: 211 case EEP_FRAC_N_5G:
210 return 0; 212 return 0;
213 case EEP_PWR_TABLE_OFFSET:
214 return AR5416_PWR_TABLE_OFFSET_DB;
211 default: 215 default:
212 return 0; 216 return 0;
213 } 217 }
@@ -385,6 +389,7 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
385 struct ath9k_channel *chan, 389 struct ath9k_channel *chan,
386 int16_t *pTxPowerIndexOffset) 390 int16_t *pTxPowerIndexOffset)
387{ 391{
392 struct ath_common *common = ath9k_hw_common(ah);
388 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; 393 struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
389 struct cal_data_per_freq_4k *pRawDataset; 394 struct cal_data_per_freq_4k *pRawDataset;
390 u8 *pCalBChans = NULL; 395 u8 *pCalBChans = NULL;
@@ -470,21 +475,21 @@ static void ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
470 ((pdadcValues[4 * j + 3] & 0xFF) << 24); 475 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
471 REG_WRITE(ah, regOffset, reg32); 476 REG_WRITE(ah, regOffset, reg32);
472 477
473 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 478 ath_print(common, ATH_DBG_EEPROM,
474 "PDADC (%d,%4x): %4.4x %8.8x\n", 479 "PDADC (%d,%4x): %4.4x %8.8x\n",
475 i, regChainOffset, regOffset, 480 i, regChainOffset, regOffset,
476 reg32); 481 reg32);
477 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 482 ath_print(common, ATH_DBG_EEPROM,
478 "PDADC: Chain %d | " 483 "PDADC: Chain %d | "
479 "PDADC %3d Value %3d | " 484 "PDADC %3d Value %3d | "
480 "PDADC %3d Value %3d | " 485 "PDADC %3d Value %3d | "
481 "PDADC %3d Value %3d | " 486 "PDADC %3d Value %3d | "
482 "PDADC %3d Value %3d |\n", 487 "PDADC %3d Value %3d |\n",
483 i, 4 * j, pdadcValues[4 * j], 488 i, 4 * j, pdadcValues[4 * j],
484 4 * j + 1, pdadcValues[4 * j + 1], 489 4 * j + 1, pdadcValues[4 * j + 1],
485 4 * j + 2, pdadcValues[4 * j + 2], 490 4 * j + 2, pdadcValues[4 * j + 2],
486 4 * j + 3, 491 4 * j + 3,
487 pdadcValues[4 * j + 3]); 492 pdadcValues[4 * j + 3]);
488 493
489 regOffset += 4; 494 regOffset += 4;
490 } 495 }
@@ -750,7 +755,7 @@ static void ath9k_hw_4k_set_txpower(struct ath_hw *ah,
750 755
751 if (AR_SREV_9280_10_OR_LATER(ah)) { 756 if (AR_SREV_9280_10_OR_LATER(ah)) {
752 for (i = 0; i < Ar5416RateSize; i++) 757 for (i = 0; i < Ar5416RateSize; i++)
753 ratesArray[i] -= AR5416_PWR_TABLE_OFFSET * 2; 758 ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
754 } 759 }
755 760
756 /* OFDM power per rate */ 761 /* OFDM power per rate */
@@ -1107,6 +1112,10 @@ static void ath9k_hw_4k_set_board_values(struct ath_hw *ah,
1107 1112
1108 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON, 1113 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
1109 pModal->txEndToRxOn); 1114 pModal->txEndToRxOn);
1115
1116 if (AR_SREV_9271_10(ah))
1117 REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, AR_PHY_TX_END_TO_A2_RX_ON,
1118 pModal->txEndToRxOn);
1110 REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62, 1119 REG_RMW_FIELD(ah, AR_PHY_CCA, AR9280_PHY_CCA_THRESH62,
1111 pModal->thresh62); 1120 pModal->thresh62);
1112 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62, 1121 REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, AR_PHY_EXT_CCA0_THRESH62,
@@ -1148,20 +1157,21 @@ static u16 ath9k_hw_4k_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
1148{ 1157{
1149#define EEP_MAP4K_SPURCHAN \ 1158#define EEP_MAP4K_SPURCHAN \
1150 (ah->eeprom.map4k.modalHeader.spurChans[i].spurChan) 1159 (ah->eeprom.map4k.modalHeader.spurChans[i].spurChan)
1160 struct ath_common *common = ath9k_hw_common(ah);
1151 1161
1152 u16 spur_val = AR_NO_SPUR; 1162 u16 spur_val = AR_NO_SPUR;
1153 1163
1154 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1164 ath_print(common, ATH_DBG_ANI,
1155 "Getting spur idx %d is2Ghz. %d val %x\n", 1165 "Getting spur idx %d is2Ghz. %d val %x\n",
1156 i, is2GHz, ah->config.spurchans[i][is2GHz]); 1166 i, is2GHz, ah->config.spurchans[i][is2GHz]);
1157 1167
1158 switch (ah->config.spurmode) { 1168 switch (ah->config.spurmode) {
1159 case SPUR_DISABLE: 1169 case SPUR_DISABLE:
1160 break; 1170 break;
1161 case SPUR_ENABLE_IOCTL: 1171 case SPUR_ENABLE_IOCTL:
1162 spur_val = ah->config.spurchans[i][is2GHz]; 1172 spur_val = ah->config.spurchans[i][is2GHz];
1163 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1173 ath_print(common, ATH_DBG_ANI,
1164 "Getting spur val from new loc. %d\n", spur_val); 1174 "Getting spur val from new loc. %d\n", spur_val);
1165 break; 1175 break;
1166 case SPUR_ENABLE_EEPROM: 1176 case SPUR_ENABLE_EEPROM:
1167 spur_val = EEP_MAP4K_SPURCHAN; 1177 spur_val = EEP_MAP4K_SPURCHAN;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_9287.c b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
index c20c21a79b21..839d05a1df29 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
@@ -14,7 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static int ath9k_hw_AR9287_get_eeprom_ver(struct ath_hw *ah) 19static int ath9k_hw_AR9287_get_eeprom_ver(struct ath_hw *ah)
20{ 20{
@@ -29,20 +29,22 @@ static int ath9k_hw_AR9287_get_eeprom_rev(struct ath_hw *ah)
29static bool ath9k_hw_AR9287_fill_eeprom(struct ath_hw *ah) 29static bool ath9k_hw_AR9287_fill_eeprom(struct ath_hw *ah)
30{ 30{
31 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 31 struct ar9287_eeprom *eep = &ah->eeprom.map9287;
32 struct ath_common *common = ath9k_hw_common(ah);
32 u16 *eep_data; 33 u16 *eep_data;
33 int addr, eep_start_loc = AR9287_EEP_START_LOC; 34 int addr, eep_start_loc = AR9287_EEP_START_LOC;
34 eep_data = (u16 *)eep; 35 eep_data = (u16 *)eep;
35 36
36 if (!ath9k_hw_use_flash(ah)) { 37 if (!ath9k_hw_use_flash(ah)) {
37 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 38 ath_print(common, ATH_DBG_EEPROM,
38 "Reading from EEPROM, not flash\n"); 39 "Reading from EEPROM, not flash\n");
39 } 40 }
40 41
41 for (addr = 0; addr < sizeof(struct ar9287_eeprom) / sizeof(u16); 42 for (addr = 0; addr < sizeof(struct ar9287_eeprom) / sizeof(u16);
42 addr++) { 43 addr++) {
43 if (!ath9k_hw_nvram_read(ah, addr + eep_start_loc, eep_data)) { 44 if (!ath9k_hw_nvram_read(common,
44 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 45 addr + eep_start_loc, eep_data)) {
45 "Unable to read eeprom region \n"); 46 ath_print(common, ATH_DBG_EEPROM,
47 "Unable to read eeprom region \n");
46 return false; 48 return false;
47 } 49 }
48 eep_data++; 50 eep_data++;
@@ -57,17 +59,18 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah)
57 int i, addr; 59 int i, addr;
58 bool need_swap = false; 60 bool need_swap = false;
59 struct ar9287_eeprom *eep = &ah->eeprom.map9287; 61 struct ar9287_eeprom *eep = &ah->eeprom.map9287;
62 struct ath_common *common = ath9k_hw_common(ah);
60 63
61 if (!ath9k_hw_use_flash(ah)) { 64 if (!ath9k_hw_use_flash(ah)) {
62 if (!ath9k_hw_nvram_read 65 if (!ath9k_hw_nvram_read(common,
63 (ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { 66 AR5416_EEPROM_MAGIC_OFFSET, &magic)) {
64 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 67 ath_print(common, ATH_DBG_FATAL,
65 "Reading Magic # failed\n"); 68 "Reading Magic # failed\n");
66 return false; 69 return false;
67 } 70 }
68 71
69 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 72 ath_print(common, ATH_DBG_EEPROM,
70 "Read Magic = 0x%04X\n", magic); 73 "Read Magic = 0x%04X\n", magic);
71 if (magic != AR5416_EEPROM_MAGIC) { 74 if (magic != AR5416_EEPROM_MAGIC) {
72 magic2 = swab16(magic); 75 magic2 = swab16(magic);
73 76
@@ -83,15 +86,15 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah)
83 eepdata++; 86 eepdata++;
84 } 87 }
85 } else { 88 } else {
86 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 89 ath_print(common, ATH_DBG_FATAL,
87 "Invalid EEPROM Magic. " 90 "Invalid EEPROM Magic. "
88 "endianness mismatch.\n"); 91 "endianness mismatch.\n");
89 return -EINVAL; 92 return -EINVAL;
90 } 93 }
91 } 94 }
92 } 95 }
93 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "need_swap = %s.\n", need_swap ? 96 ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n", need_swap ?
94 "True" : "False"); 97 "True" : "False");
95 98
96 if (need_swap) 99 if (need_swap)
97 el = swab16(ah->eeprom.map9287.baseEepHeader.length); 100 el = swab16(ah->eeprom.map9287.baseEepHeader.length);
@@ -148,9 +151,9 @@ static int ath9k_hw_AR9287_check_eeprom(struct ath_hw *ah)
148 151
149 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR9287_EEP_VER 152 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR9287_EEP_VER
150 || ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) { 153 || ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) {
151 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 154 ath_print(common, ATH_DBG_FATAL,
152 "Bad EEPROM checksum 0x%x or revision 0x%04x\n", 155 "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
153 sum, ah->eep_ops->get_eeprom_ver(ah)); 156 sum, ah->eep_ops->get_eeprom_ver(ah));
154 return -EINVAL; 157 return -EINVAL;
155 } 158 }
156 159
@@ -436,6 +439,7 @@ static void ath9k_hw_set_AR9287_power_cal_table(struct ath_hw *ah,
436 struct ath9k_channel *chan, 439 struct ath9k_channel *chan,
437 int16_t *pTxPowerIndexOffset) 440 int16_t *pTxPowerIndexOffset)
438{ 441{
442 struct ath_common *common = ath9k_hw_common(ah);
439 struct cal_data_per_freq_ar9287 *pRawDataset; 443 struct cal_data_per_freq_ar9287 *pRawDataset;
440 struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop; 444 struct cal_data_op_loop_ar9287 *pRawDatasetOpenLoop;
441 u8 *pCalBChans = NULL; 445 u8 *pCalBChans = NULL;
@@ -564,24 +568,25 @@ static void ath9k_hw_set_AR9287_power_cal_table(struct ath_hw *ah,
564 & 0xFF) << 24) ; 568 & 0xFF) << 24) ;
565 REG_WRITE(ah, regOffset, reg32); 569 REG_WRITE(ah, regOffset, reg32);
566 570
567 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 571 ath_print(common, ATH_DBG_EEPROM,
568 "PDADC (%d,%4x): %4.4x %8.8x\n", 572 "PDADC (%d,%4x): %4.4x "
569 i, regChainOffset, regOffset, 573 "%8.8x\n",
570 reg32); 574 i, regChainOffset, regOffset,
571 575 reg32);
572 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 576
573 "PDADC: Chain %d | " 577 ath_print(common, ATH_DBG_EEPROM,
574 "PDADC %3d Value %3d | " 578 "PDADC: Chain %d | "
575 "PDADC %3d Value %3d | " 579 "PDADC %3d Value %3d | "
576 "PDADC %3d Value %3d | " 580 "PDADC %3d Value %3d | "
577 "PDADC %3d Value %3d |\n", 581 "PDADC %3d Value %3d | "
578 i, 4 * j, pdadcValues[4 * j], 582 "PDADC %3d Value %3d |\n",
579 4 * j + 1, 583 i, 4 * j, pdadcValues[4 * j],
580 pdadcValues[4 * j + 1], 584 4 * j + 1,
581 4 * j + 2, 585 pdadcValues[4 * j + 1],
582 pdadcValues[4 * j + 2], 586 4 * j + 2,
583 4 * j + 3, 587 pdadcValues[4 * j + 2],
584 pdadcValues[4 * j + 3]); 588 4 * j + 3,
589 pdadcValues[4 * j + 3]);
585 590
586 regOffset += 4; 591 regOffset += 4;
587 } 592 }
@@ -831,6 +836,7 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah,
831{ 836{
832#define INCREASE_MAXPOW_BY_TWO_CHAIN 6 837#define INCREASE_MAXPOW_BY_TWO_CHAIN 6
833#define INCREASE_MAXPOW_BY_THREE_CHAIN 10 838#define INCREASE_MAXPOW_BY_THREE_CHAIN 10
839 struct ath_common *common = ath9k_hw_common(ah);
834 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 840 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
835 struct ar9287_eeprom *pEepData = &ah->eeprom.map9287; 841 struct ar9287_eeprom *pEepData = &ah->eeprom.map9287;
836 struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader; 842 struct modal_eep_ar9287_header *pModal = &pEepData->modalHeader;
@@ -966,8 +972,8 @@ static void ath9k_hw_AR9287_set_txpower(struct ath_hw *ah,
966 INCREASE_MAXPOW_BY_THREE_CHAIN; 972 INCREASE_MAXPOW_BY_THREE_CHAIN;
967 break; 973 break;
968 default: 974 default:
969 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 975 ath_print(common, ATH_DBG_EEPROM,
970 "Invalid chainmask configuration\n"); 976 "Invalid chainmask configuration\n");
971 break; 977 break;
972 } 978 }
973} 979}
@@ -1138,19 +1144,20 @@ static u16 ath9k_hw_AR9287_get_spur_channel(struct ath_hw *ah,
1138{ 1144{
1139#define EEP_MAP9287_SPURCHAN \ 1145#define EEP_MAP9287_SPURCHAN \
1140 (ah->eeprom.map9287.modalHeader.spurChans[i].spurChan) 1146 (ah->eeprom.map9287.modalHeader.spurChans[i].spurChan)
1147 struct ath_common *common = ath9k_hw_common(ah);
1141 u16 spur_val = AR_NO_SPUR; 1148 u16 spur_val = AR_NO_SPUR;
1142 1149
1143 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1150 ath_print(common, ATH_DBG_ANI,
1144 "Getting spur idx %d is2Ghz. %d val %x\n", 1151 "Getting spur idx %d is2Ghz. %d val %x\n",
1145 i, is2GHz, ah->config.spurchans[i][is2GHz]); 1152 i, is2GHz, ah->config.spurchans[i][is2GHz]);
1146 1153
1147 switch (ah->config.spurmode) { 1154 switch (ah->config.spurmode) {
1148 case SPUR_DISABLE: 1155 case SPUR_DISABLE:
1149 break; 1156 break;
1150 case SPUR_ENABLE_IOCTL: 1157 case SPUR_ENABLE_IOCTL:
1151 spur_val = ah->config.spurchans[i][is2GHz]; 1158 spur_val = ah->config.spurchans[i][is2GHz];
1152 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1159 ath_print(common, ATH_DBG_ANI,
1153 "Getting spur val from new loc. %d\n", spur_val); 1160 "Getting spur val from new loc. %d\n", spur_val);
1154 break; 1161 break;
1155 case SPUR_ENABLE_EEPROM: 1162 case SPUR_ENABLE_EEPROM:
1156 spur_val = EEP_MAP9287_SPURCHAN; 1163 spur_val = EEP_MAP9287_SPURCHAN;
diff --git a/drivers/net/wireless/ath/ath9k/eeprom_def.c b/drivers/net/wireless/ath/ath9k/eeprom_def.c
index 4071fc91da0a..404a0341242c 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
@@ -14,7 +14,7 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static void ath9k_get_txgain_index(struct ath_hw *ah, 19static void ath9k_get_txgain_index(struct ath_hw *ah,
20 struct ath9k_channel *chan, 20 struct ath9k_channel *chan,
@@ -89,14 +89,15 @@ static int ath9k_hw_def_get_eeprom_rev(struct ath_hw *ah)
89static bool ath9k_hw_def_fill_eeprom(struct ath_hw *ah) 89static bool ath9k_hw_def_fill_eeprom(struct ath_hw *ah)
90{ 90{
91#define SIZE_EEPROM_DEF (sizeof(struct ar5416_eeprom_def) / sizeof(u16)) 91#define SIZE_EEPROM_DEF (sizeof(struct ar5416_eeprom_def) / sizeof(u16))
92 struct ath_common *common = ath9k_hw_common(ah);
92 u16 *eep_data = (u16 *)&ah->eeprom.def; 93 u16 *eep_data = (u16 *)&ah->eeprom.def;
93 int addr, ar5416_eep_start_loc = 0x100; 94 int addr, ar5416_eep_start_loc = 0x100;
94 95
95 for (addr = 0; addr < SIZE_EEPROM_DEF; addr++) { 96 for (addr = 0; addr < SIZE_EEPROM_DEF; addr++) {
96 if (!ath9k_hw_nvram_read(ah, addr + ar5416_eep_start_loc, 97 if (!ath9k_hw_nvram_read(common, addr + ar5416_eep_start_loc,
97 eep_data)) { 98 eep_data)) {
98 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 99 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
99 "Unable to read eeprom region\n"); 100 "Unable to read eeprom region\n");
100 return false; 101 return false;
101 } 102 }
102 eep_data++; 103 eep_data++;
@@ -109,19 +110,20 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
109{ 110{
110 struct ar5416_eeprom_def *eep = 111 struct ar5416_eeprom_def *eep =
111 (struct ar5416_eeprom_def *) &ah->eeprom.def; 112 (struct ar5416_eeprom_def *) &ah->eeprom.def;
113 struct ath_common *common = ath9k_hw_common(ah);
112 u16 *eepdata, temp, magic, magic2; 114 u16 *eepdata, temp, magic, magic2;
113 u32 sum = 0, el; 115 u32 sum = 0, el;
114 bool need_swap = false; 116 bool need_swap = false;
115 int i, addr, size; 117 int i, addr, size;
116 118
117 if (!ath9k_hw_nvram_read(ah, AR5416_EEPROM_MAGIC_OFFSET, &magic)) { 119 if (!ath9k_hw_nvram_read(common, AR5416_EEPROM_MAGIC_OFFSET, &magic)) {
118 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Reading Magic # failed\n"); 120 ath_print(common, ATH_DBG_FATAL, "Reading Magic # failed\n");
119 return false; 121 return false;
120 } 122 }
121 123
122 if (!ath9k_hw_use_flash(ah)) { 124 if (!ath9k_hw_use_flash(ah)) {
123 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 125 ath_print(common, ATH_DBG_EEPROM,
124 "Read Magic = 0x%04X\n", magic); 126 "Read Magic = 0x%04X\n", magic);
125 127
126 if (magic != AR5416_EEPROM_MAGIC) { 128 if (magic != AR5416_EEPROM_MAGIC) {
127 magic2 = swab16(magic); 129 magic2 = swab16(magic);
@@ -137,16 +139,16 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
137 eepdata++; 139 eepdata++;
138 } 140 }
139 } else { 141 } else {
140 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 142 ath_print(common, ATH_DBG_FATAL,
141 "Invalid EEPROM Magic. " 143 "Invalid EEPROM Magic. "
142 "Endianness mismatch.\n"); 144 "Endianness mismatch.\n");
143 return -EINVAL; 145 return -EINVAL;
144 } 146 }
145 } 147 }
146 } 148 }
147 149
148 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, "need_swap = %s.\n", 150 ath_print(common, ATH_DBG_EEPROM, "need_swap = %s.\n",
149 need_swap ? "True" : "False"); 151 need_swap ? "True" : "False");
150 152
151 if (need_swap) 153 if (need_swap)
152 el = swab16(ah->eeprom.def.baseEepHeader.length); 154 el = swab16(ah->eeprom.def.baseEepHeader.length);
@@ -167,8 +169,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
167 u32 integer, j; 169 u32 integer, j;
168 u16 word; 170 u16 word;
169 171
170 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 172 ath_print(common, ATH_DBG_EEPROM,
171 "EEPROM Endianness is not native.. Changing.\n"); 173 "EEPROM Endianness is not native.. Changing.\n");
172 174
173 word = swab16(eep->baseEepHeader.length); 175 word = swab16(eep->baseEepHeader.length);
174 eep->baseEepHeader.length = word; 176 eep->baseEepHeader.length = word;
@@ -214,8 +216,8 @@ static int ath9k_hw_def_check_eeprom(struct ath_hw *ah)
214 216
215 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER || 217 if (sum != 0xffff || ah->eep_ops->get_eeprom_ver(ah) != AR5416_EEP_VER ||
216 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) { 218 ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_NO_BACK_VER) {
217 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 219 ath_print(common, ATH_DBG_FATAL,
218 "Bad EEPROM checksum 0x%x or revision 0x%04x\n", 220 "Bad EEPROM checksum 0x%x or revision 0x%04x\n",
219 sum, ah->eep_ops->get_eeprom_ver(ah)); 221 sum, ah->eep_ops->get_eeprom_ver(ah));
220 return -EINVAL; 222 return -EINVAL;
221 } 223 }
@@ -289,6 +291,11 @@ static u32 ath9k_hw_def_get_eeprom(struct ath_hw *ah,
289 return pBase->frac_n_5g; 291 return pBase->frac_n_5g;
290 else 292 else
291 return 0; 293 return 0;
294 case EEP_PWR_TABLE_OFFSET:
295 if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_21)
296 return pBase->pwr_table_offset;
297 else
298 return AR5416_PWR_TABLE_OFFSET_DB;
292 default: 299 default:
293 return 0; 300 return 0;
294 } 301 }
@@ -739,6 +746,76 @@ static void ath9k_hw_get_def_gain_boundaries_pdadcs(struct ath_hw *ah,
739 return; 746 return;
740} 747}
741 748
749static int16_t ath9k_change_gain_boundary_setting(struct ath_hw *ah,
750 u16 *gb,
751 u16 numXpdGain,
752 u16 pdGainOverlap_t2,
753 int8_t pwr_table_offset,
754 int16_t *diff)
755
756{
757 u16 k;
758
759 /* Prior to writing the boundaries or the pdadc vs. power table
760 * into the chip registers the default starting point on the pdadc
761 * vs. power table needs to be checked and the curve boundaries
762 * adjusted accordingly
763 */
764 if (AR_SREV_9280_20_OR_LATER(ah)) {
765 u16 gb_limit;
766
767 if (AR5416_PWR_TABLE_OFFSET_DB != pwr_table_offset) {
768 /* get the difference in dB */
769 *diff = (u16)(pwr_table_offset - AR5416_PWR_TABLE_OFFSET_DB);
770 /* get the number of half dB steps */
771 *diff *= 2;
772 /* change the original gain boundary settings
773 * by the number of half dB steps
774 */
775 for (k = 0; k < numXpdGain; k++)
776 gb[k] = (u16)(gb[k] - *diff);
777 }
778 /* Because of a hardware limitation, ensure the gain boundary
779 * is not larger than (63 - overlap)
780 */
781 gb_limit = (u16)(AR5416_MAX_RATE_POWER - pdGainOverlap_t2);
782
783 for (k = 0; k < numXpdGain; k++)
784 gb[k] = (u16)min(gb_limit, gb[k]);
785 }
786
787 return *diff;
788}
789
790static void ath9k_adjust_pdadc_values(struct ath_hw *ah,
791 int8_t pwr_table_offset,
792 int16_t diff,
793 u8 *pdadcValues)
794{
795#define NUM_PDADC(diff) (AR5416_NUM_PDADC_VALUES - diff)
796 u16 k;
797
798 /* If this is a board that has a pwrTableOffset that differs from
799 * the default AR5416_PWR_TABLE_OFFSET_DB then the start of the
800 * pdadc vs pwr table needs to be adjusted prior to writing to the
801 * chip.
802 */
803 if (AR_SREV_9280_20_OR_LATER(ah)) {
804 if (AR5416_PWR_TABLE_OFFSET_DB != pwr_table_offset) {
805 /* shift the table to start at the new offset */
806 for (k = 0; k < (u16)NUM_PDADC(diff); k++ ) {
807 pdadcValues[k] = pdadcValues[k + diff];
808 }
809
810 /* fill the back of the table */
811 for (k = (u16)NUM_PDADC(diff); k < NUM_PDADC(0); k++) {
812 pdadcValues[k] = pdadcValues[NUM_PDADC(diff)];
813 }
814 }
815 }
816#undef NUM_PDADC
817}
818
742static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah, 819static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
743 struct ath9k_channel *chan, 820 struct ath9k_channel *chan,
744 int16_t *pTxPowerIndexOffset) 821 int16_t *pTxPowerIndexOffset)
@@ -746,7 +823,7 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
746#define SM_PD_GAIN(x) SM(0x38, AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##x) 823#define SM_PD_GAIN(x) SM(0x38, AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##x)
747#define SM_PDGAIN_B(x, y) \ 824#define SM_PDGAIN_B(x, y) \
748 SM((gainBoundaries[x]), AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##y) 825 SM((gainBoundaries[x]), AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_##y)
749 826 struct ath_common *common = ath9k_hw_common(ah);
750 struct ar5416_eeprom_def *pEepData = &ah->eeprom.def; 827 struct ar5416_eeprom_def *pEepData = &ah->eeprom.def;
751 struct cal_data_per_freq *pRawDataset; 828 struct cal_data_per_freq *pRawDataset;
752 u8 *pCalBChans = NULL; 829 u8 *pCalBChans = NULL;
@@ -754,15 +831,18 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
754 static u8 pdadcValues[AR5416_NUM_PDADC_VALUES]; 831 static u8 pdadcValues[AR5416_NUM_PDADC_VALUES];
755 u16 gainBoundaries[AR5416_PD_GAINS_IN_MASK]; 832 u16 gainBoundaries[AR5416_PD_GAINS_IN_MASK];
756 u16 numPiers, i, j; 833 u16 numPiers, i, j;
757 int16_t tMinCalPower; 834 int16_t tMinCalPower, diff = 0;
758 u16 numXpdGain, xpdMask; 835 u16 numXpdGain, xpdMask;
759 u16 xpdGainValues[AR5416_NUM_PD_GAINS] = { 0, 0, 0, 0 }; 836 u16 xpdGainValues[AR5416_NUM_PD_GAINS] = { 0, 0, 0, 0 };
760 u32 reg32, regOffset, regChainOffset; 837 u32 reg32, regOffset, regChainOffset;
761 int16_t modalIdx; 838 int16_t modalIdx;
839 int8_t pwr_table_offset;
762 840
763 modalIdx = IS_CHAN_2GHZ(chan) ? 1 : 0; 841 modalIdx = IS_CHAN_2GHZ(chan) ? 1 : 0;
764 xpdMask = pEepData->modalHeader[modalIdx].xpdGain; 842 xpdMask = pEepData->modalHeader[modalIdx].xpdGain;
765 843
844 pwr_table_offset = ah->eep_ops->get_eeprom(ah, EEP_PWR_TABLE_OFFSET);
845
766 if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >= 846 if ((pEepData->baseEepHeader.version & AR5416_EEP_VER_MINOR_MASK) >=
767 AR5416_EEP_MINOR_VER_2) { 847 AR5416_EEP_MINOR_VER_2) {
768 pdGainOverlap_t2 = 848 pdGainOverlap_t2 =
@@ -842,6 +922,13 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
842 numXpdGain); 922 numXpdGain);
843 } 923 }
844 924
925 diff = ath9k_change_gain_boundary_setting(ah,
926 gainBoundaries,
927 numXpdGain,
928 pdGainOverlap_t2,
929 pwr_table_offset,
930 &diff);
931
845 if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) { 932 if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
846 if (OLC_FOR_AR9280_20_LATER) { 933 if (OLC_FOR_AR9280_20_LATER) {
847 REG_WRITE(ah, 934 REG_WRITE(ah,
@@ -862,6 +949,10 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
862 } 949 }
863 } 950 }
864 951
952
953 ath9k_adjust_pdadc_values(ah, pwr_table_offset,
954 diff, pdadcValues);
955
865 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset; 956 regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
866 for (j = 0; j < 32; j++) { 957 for (j = 0; j < 32; j++) {
867 reg32 = ((pdadcValues[4 * j + 0] & 0xFF) << 0) | 958 reg32 = ((pdadcValues[4 * j + 0] & 0xFF) << 0) |
@@ -870,20 +961,20 @@ static void ath9k_hw_set_def_power_cal_table(struct ath_hw *ah,
870 ((pdadcValues[4 * j + 3] & 0xFF) << 24); 961 ((pdadcValues[4 * j + 3] & 0xFF) << 24);
871 REG_WRITE(ah, regOffset, reg32); 962 REG_WRITE(ah, regOffset, reg32);
872 963
873 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 964 ath_print(common, ATH_DBG_EEPROM,
874 "PDADC (%d,%4x): %4.4x %8.8x\n", 965 "PDADC (%d,%4x): %4.4x %8.8x\n",
875 i, regChainOffset, regOffset, 966 i, regChainOffset, regOffset,
876 reg32); 967 reg32);
877 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 968 ath_print(common, ATH_DBG_EEPROM,
878 "PDADC: Chain %d | PDADC %3d " 969 "PDADC: Chain %d | PDADC %3d "
879 "Value %3d | PDADC %3d Value %3d | " 970 "Value %3d | PDADC %3d Value %3d | "
880 "PDADC %3d Value %3d | PDADC %3d " 971 "PDADC %3d Value %3d | PDADC %3d "
881 "Value %3d |\n", 972 "Value %3d |\n",
882 i, 4 * j, pdadcValues[4 * j], 973 i, 4 * j, pdadcValues[4 * j],
883 4 * j + 1, pdadcValues[4 * j + 1], 974 4 * j + 1, pdadcValues[4 * j + 1],
884 4 * j + 2, pdadcValues[4 * j + 2], 975 4 * j + 2, pdadcValues[4 * j + 2],
885 4 * j + 3, 976 4 * j + 3,
886 pdadcValues[4 * j + 3]); 977 pdadcValues[4 * j + 3]);
887 978
888 regOffset += 4; 979 regOffset += 4;
889 } 980 }
@@ -1197,8 +1288,13 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
1197 } 1288 }
1198 1289
1199 if (AR_SREV_9280_10_OR_LATER(ah)) { 1290 if (AR_SREV_9280_10_OR_LATER(ah)) {
1200 for (i = 0; i < Ar5416RateSize; i++) 1291 for (i = 0; i < Ar5416RateSize; i++) {
1201 ratesArray[i] -= AR5416_PWR_TABLE_OFFSET * 2; 1292 int8_t pwr_table_offset;
1293
1294 pwr_table_offset = ah->eep_ops->get_eeprom(ah,
1295 EEP_PWR_TABLE_OFFSET);
1296 ratesArray[i] -= pwr_table_offset * 2;
1297 }
1202 } 1298 }
1203 1299
1204 REG_WRITE(ah, AR_PHY_POWER_TX_RATE1, 1300 REG_WRITE(ah, AR_PHY_POWER_TX_RATE1,
@@ -1297,7 +1393,7 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
1297 1393
1298 if (AR_SREV_9280_10_OR_LATER(ah)) 1394 if (AR_SREV_9280_10_OR_LATER(ah))
1299 regulatory->max_power_level = 1395 regulatory->max_power_level =
1300 ratesArray[i] + AR5416_PWR_TABLE_OFFSET * 2; 1396 ratesArray[i] + AR5416_PWR_TABLE_OFFSET_DB * 2;
1301 else 1397 else
1302 regulatory->max_power_level = ratesArray[i]; 1398 regulatory->max_power_level = ratesArray[i];
1303 1399
@@ -1311,8 +1407,8 @@ static void ath9k_hw_def_set_txpower(struct ath_hw *ah,
1311 regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN; 1407 regulatory->max_power_level += INCREASE_MAXPOW_BY_THREE_CHAIN;
1312 break; 1408 break;
1313 default: 1409 default:
1314 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1410 ath_print(ath9k_hw_common(ah), ATH_DBG_EEPROM,
1315 "Invalid chainmask configuration\n"); 1411 "Invalid chainmask configuration\n");
1316 break; 1412 break;
1317 } 1413 }
1318} 1414}
@@ -1349,20 +1445,21 @@ static u16 ath9k_hw_def_get_spur_channel(struct ath_hw *ah, u16 i, bool is2GHz)
1349{ 1445{
1350#define EEP_DEF_SPURCHAN \ 1446#define EEP_DEF_SPURCHAN \
1351 (ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan) 1447 (ah->eeprom.def.modalHeader[is2GHz].spurChans[i].spurChan)
1448 struct ath_common *common = ath9k_hw_common(ah);
1352 1449
1353 u16 spur_val = AR_NO_SPUR; 1450 u16 spur_val = AR_NO_SPUR;
1354 1451
1355 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1452 ath_print(common, ATH_DBG_ANI,
1356 "Getting spur idx %d is2Ghz. %d val %x\n", 1453 "Getting spur idx %d is2Ghz. %d val %x\n",
1357 i, is2GHz, ah->config.spurchans[i][is2GHz]); 1454 i, is2GHz, ah->config.spurchans[i][is2GHz]);
1358 1455
1359 switch (ah->config.spurmode) { 1456 switch (ah->config.spurmode) {
1360 case SPUR_DISABLE: 1457 case SPUR_DISABLE:
1361 break; 1458 break;
1362 case SPUR_ENABLE_IOCTL: 1459 case SPUR_ENABLE_IOCTL:
1363 spur_val = ah->config.spurchans[i][is2GHz]; 1460 spur_val = ah->config.spurchans[i][is2GHz];
1364 DPRINTF(ah->ah_sc, ATH_DBG_ANI, 1461 ath_print(common, ATH_DBG_ANI,
1365 "Getting spur val from new loc. %d\n", spur_val); 1462 "Getting spur val from new loc. %d\n", spur_val);
1366 break; 1463 break;
1367 case SPUR_ENABLE_EEPROM: 1464 case SPUR_ENABLE_EEPROM:
1368 spur_val = EEP_DEF_SPURCHAN; 1465 spur_val = EEP_DEF_SPURCHAN;
diff --git a/drivers/net/wireless/ath/ath9k/gpio.c b/drivers/net/wireless/ath/ath9k/gpio.c
new file mode 100644
index 000000000000..deab8beb0680
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/gpio.c
@@ -0,0 +1,442 @@
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "ath9k.h"
18
19/********************************/
20/* LED functions */
21/********************************/
22
23static void ath_led_blink_work(struct work_struct *work)
24{
25 struct ath_softc *sc = container_of(work, struct ath_softc,
26 ath_led_blink_work.work);
27
28 if (!(sc->sc_flags & SC_OP_LED_ASSOCIATED))
29 return;
30
31 if ((sc->led_on_duration == ATH_LED_ON_DURATION_IDLE) ||
32 (sc->led_off_duration == ATH_LED_OFF_DURATION_IDLE))
33 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
34 else
35 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
36 (sc->sc_flags & SC_OP_LED_ON) ? 1 : 0);
37
38 ieee80211_queue_delayed_work(sc->hw,
39 &sc->ath_led_blink_work,
40 (sc->sc_flags & SC_OP_LED_ON) ?
41 msecs_to_jiffies(sc->led_off_duration) :
42 msecs_to_jiffies(sc->led_on_duration));
43
44 sc->led_on_duration = sc->led_on_cnt ?
45 max((ATH_LED_ON_DURATION_IDLE - sc->led_on_cnt), 25) :
46 ATH_LED_ON_DURATION_IDLE;
47 sc->led_off_duration = sc->led_off_cnt ?
48 max((ATH_LED_OFF_DURATION_IDLE - sc->led_off_cnt), 10) :
49 ATH_LED_OFF_DURATION_IDLE;
50 sc->led_on_cnt = sc->led_off_cnt = 0;
51 if (sc->sc_flags & SC_OP_LED_ON)
52 sc->sc_flags &= ~SC_OP_LED_ON;
53 else
54 sc->sc_flags |= SC_OP_LED_ON;
55}
56
57static void ath_led_brightness(struct led_classdev *led_cdev,
58 enum led_brightness brightness)
59{
60 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
61 struct ath_softc *sc = led->sc;
62
63 switch (brightness) {
64 case LED_OFF:
65 if (led->led_type == ATH_LED_ASSOC ||
66 led->led_type == ATH_LED_RADIO) {
67 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
68 (led->led_type == ATH_LED_RADIO));
69 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
70 if (led->led_type == ATH_LED_RADIO)
71 sc->sc_flags &= ~SC_OP_LED_ON;
72 } else {
73 sc->led_off_cnt++;
74 }
75 break;
76 case LED_FULL:
77 if (led->led_type == ATH_LED_ASSOC) {
78 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
79 ieee80211_queue_delayed_work(sc->hw,
80 &sc->ath_led_blink_work, 0);
81 } else if (led->led_type == ATH_LED_RADIO) {
82 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
83 sc->sc_flags |= SC_OP_LED_ON;
84 } else {
85 sc->led_on_cnt++;
86 }
87 break;
88 default:
89 break;
90 }
91}
92
93static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
94 char *trigger)
95{
96 int ret;
97
98 led->sc = sc;
99 led->led_cdev.name = led->name;
100 led->led_cdev.default_trigger = trigger;
101 led->led_cdev.brightness_set = ath_led_brightness;
102
103 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
104 if (ret)
105 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
106 "Failed to register led:%s", led->name);
107 else
108 led->registered = 1;
109 return ret;
110}
111
112static void ath_unregister_led(struct ath_led *led)
113{
114 if (led->registered) {
115 led_classdev_unregister(&led->led_cdev);
116 led->registered = 0;
117 }
118}
119
120void ath_deinit_leds(struct ath_softc *sc)
121{
122 ath_unregister_led(&sc->assoc_led);
123 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
124 ath_unregister_led(&sc->tx_led);
125 ath_unregister_led(&sc->rx_led);
126 ath_unregister_led(&sc->radio_led);
127 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
128}
129
130void ath_init_leds(struct ath_softc *sc)
131{
132 char *trigger;
133 int ret;
134
135 if (AR_SREV_9287(sc->sc_ah))
136 sc->sc_ah->led_pin = ATH_LED_PIN_9287;
137 else
138 sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
139
140 /* Configure gpio 1 for output */
141 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
142 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
143 /* LED off, active low */
144 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
145
146 INIT_DELAYED_WORK(&sc->ath_led_blink_work, ath_led_blink_work);
147
148 trigger = ieee80211_get_radio_led_name(sc->hw);
149 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
150 "ath9k-%s::radio", wiphy_name(sc->hw->wiphy));
151 ret = ath_register_led(sc, &sc->radio_led, trigger);
152 sc->radio_led.led_type = ATH_LED_RADIO;
153 if (ret)
154 goto fail;
155
156 trigger = ieee80211_get_assoc_led_name(sc->hw);
157 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
158 "ath9k-%s::assoc", wiphy_name(sc->hw->wiphy));
159 ret = ath_register_led(sc, &sc->assoc_led, trigger);
160 sc->assoc_led.led_type = ATH_LED_ASSOC;
161 if (ret)
162 goto fail;
163
164 trigger = ieee80211_get_tx_led_name(sc->hw);
165 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
166 "ath9k-%s::tx", wiphy_name(sc->hw->wiphy));
167 ret = ath_register_led(sc, &sc->tx_led, trigger);
168 sc->tx_led.led_type = ATH_LED_TX;
169 if (ret)
170 goto fail;
171
172 trigger = ieee80211_get_rx_led_name(sc->hw);
173 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
174 "ath9k-%s::rx", wiphy_name(sc->hw->wiphy));
175 ret = ath_register_led(sc, &sc->rx_led, trigger);
176 sc->rx_led.led_type = ATH_LED_RX;
177 if (ret)
178 goto fail;
179
180 return;
181
182fail:
183 cancel_delayed_work_sync(&sc->ath_led_blink_work);
184 ath_deinit_leds(sc);
185}
186
187/*******************/
188/* Rfkill */
189/*******************/
190
191static bool ath_is_rfkill_set(struct ath_softc *sc)
192{
193 struct ath_hw *ah = sc->sc_ah;
194
195 return ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
196 ah->rfkill_polarity;
197}
198
199void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
200{
201 struct ath_wiphy *aphy = hw->priv;
202 struct ath_softc *sc = aphy->sc;
203 bool blocked = !!ath_is_rfkill_set(sc);
204
205 wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
206}
207
208void ath_start_rfkill_poll(struct ath_softc *sc)
209{
210 struct ath_hw *ah = sc->sc_ah;
211
212 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
213 wiphy_rfkill_start_polling(sc->hw->wiphy);
214}
215
216/******************/
217/* BTCOEX */
218/******************/
219
220/*
221 * Detects if there is any priority bt traffic
222 */
223static void ath_detect_bt_priority(struct ath_softc *sc)
224{
225 struct ath_btcoex *btcoex = &sc->btcoex;
226 struct ath_hw *ah = sc->sc_ah;
227
228 if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
229 btcoex->bt_priority_cnt++;
230
231 if (time_after(jiffies, btcoex->bt_priority_time +
232 msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
233 sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN);
234 /* Detect if colocated bt started scanning */
235 if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
236 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
237 "BT scan detected");
238 sc->sc_flags |= (SC_OP_BT_SCAN |
239 SC_OP_BT_PRIORITY_DETECTED);
240 } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
241 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_BTCOEX,
242 "BT priority traffic detected");
243 sc->sc_flags |= SC_OP_BT_PRIORITY_DETECTED;
244 }
245
246 btcoex->bt_priority_cnt = 0;
247 btcoex->bt_priority_time = jiffies;
248 }
249}
250
251/*
252 * Configures appropriate weight based on stomp type.
253 */
254static void ath9k_btcoex_bt_stomp(struct ath_softc *sc,
255 enum ath_stomp_type stomp_type)
256{
257 struct ath_hw *ah = sc->sc_ah;
258
259 switch (stomp_type) {
260 case ATH_BTCOEX_STOMP_ALL:
261 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
262 AR_STOMP_ALL_WLAN_WGHT);
263 break;
264 case ATH_BTCOEX_STOMP_LOW:
265 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
266 AR_STOMP_LOW_WLAN_WGHT);
267 break;
268 case ATH_BTCOEX_STOMP_NONE:
269 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
270 AR_STOMP_NONE_WLAN_WGHT);
271 break;
272 default:
273 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
274 "Invalid Stomptype\n");
275 break;
276 }
277
278 ath9k_hw_btcoex_enable(ah);
279}
280
281static void ath9k_gen_timer_start(struct ath_hw *ah,
282 struct ath_gen_timer *timer,
283 u32 timer_next,
284 u32 timer_period)
285{
286 struct ath_common *common = ath9k_hw_common(ah);
287 struct ath_softc *sc = (struct ath_softc *) common->priv;
288
289 ath9k_hw_gen_timer_start(ah, timer, timer_next, timer_period);
290
291 if ((sc->imask & ATH9K_INT_GENTIMER) == 0) {
292 ath9k_hw_set_interrupts(ah, 0);
293 sc->imask |= ATH9K_INT_GENTIMER;
294 ath9k_hw_set_interrupts(ah, sc->imask);
295 }
296}
297
298static void ath9k_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
299{
300 struct ath_common *common = ath9k_hw_common(ah);
301 struct ath_softc *sc = (struct ath_softc *) common->priv;
302 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
303
304 ath9k_hw_gen_timer_stop(ah, timer);
305
306 /* if no timer is enabled, turn off interrupt mask */
307 if (timer_table->timer_mask.val == 0) {
308 ath9k_hw_set_interrupts(ah, 0);
309 sc->imask &= ~ATH9K_INT_GENTIMER;
310 ath9k_hw_set_interrupts(ah, sc->imask);
311 }
312}
313
314/*
315 * This is the master bt coex timer which runs for every
316 * 45ms, bt traffic will be given priority during 55% of this
317 * period while wlan gets remaining 45%
318 */
319static void ath_btcoex_period_timer(unsigned long data)
320{
321 struct ath_softc *sc = (struct ath_softc *) data;
322 struct ath_hw *ah = sc->sc_ah;
323 struct ath_btcoex *btcoex = &sc->btcoex;
324 u32 timer_period;
325 bool is_btscan;
326
327 ath_detect_bt_priority(sc);
328
329 is_btscan = sc->sc_flags & SC_OP_BT_SCAN;
330
331 spin_lock_bh(&btcoex->btcoex_lock);
332
333 ath9k_btcoex_bt_stomp(sc, is_btscan ? ATH_BTCOEX_STOMP_ALL :
334 btcoex->bt_stomp_type);
335
336 spin_unlock_bh(&btcoex->btcoex_lock);
337
338 if (btcoex->btcoex_period != btcoex->btcoex_no_stomp) {
339 if (btcoex->hw_timer_enabled)
340 ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
341
342 timer_period = is_btscan ? btcoex->btscan_no_stomp :
343 btcoex->btcoex_no_stomp;
344 ath9k_gen_timer_start(ah,
345 btcoex->no_stomp_timer,
346 (ath9k_hw_gettsf32(ah) +
347 timer_period), timer_period * 10);
348 btcoex->hw_timer_enabled = true;
349 }
350
351 mod_timer(&btcoex->period_timer, jiffies +
352 msecs_to_jiffies(ATH_BTCOEX_DEF_BT_PERIOD));
353}
354
355/*
356 * Generic tsf based hw timer which configures weight
357 * registers to time slice between wlan and bt traffic
358 */
359static void ath_btcoex_no_stomp_timer(void *arg)
360{
361 struct ath_softc *sc = (struct ath_softc *)arg;
362 struct ath_hw *ah = sc->sc_ah;
363 struct ath_btcoex *btcoex = &sc->btcoex;
364 bool is_btscan = sc->sc_flags & SC_OP_BT_SCAN;
365
366 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
367 "no stomp timer running \n");
368
369 spin_lock_bh(&btcoex->btcoex_lock);
370
371 if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW || is_btscan)
372 ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_NONE);
373 else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
374 ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_LOW);
375
376 spin_unlock_bh(&btcoex->btcoex_lock);
377}
378
379int ath_init_btcoex_timer(struct ath_softc *sc)
380{
381 struct ath_btcoex *btcoex = &sc->btcoex;
382
383 btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD * 1000;
384 btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
385 btcoex->btcoex_period / 100;
386 btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) *
387 btcoex->btcoex_period / 100;
388
389 setup_timer(&btcoex->period_timer, ath_btcoex_period_timer,
390 (unsigned long) sc);
391
392 spin_lock_init(&btcoex->btcoex_lock);
393
394 btcoex->no_stomp_timer = ath_gen_timer_alloc(sc->sc_ah,
395 ath_btcoex_no_stomp_timer,
396 ath_btcoex_no_stomp_timer,
397 (void *) sc, AR_FIRST_NDP_TIMER);
398
399 if (!btcoex->no_stomp_timer)
400 return -ENOMEM;
401
402 return 0;
403}
404
405/*
406 * (Re)start btcoex timers
407 */
408void ath9k_btcoex_timer_resume(struct ath_softc *sc)
409{
410 struct ath_btcoex *btcoex = &sc->btcoex;
411 struct ath_hw *ah = sc->sc_ah;
412
413 ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
414 "Starting btcoex timers");
415
416 /* make sure duty cycle timer is also stopped when resuming */
417 if (btcoex->hw_timer_enabled)
418 ath9k_gen_timer_stop(sc->sc_ah, btcoex->no_stomp_timer);
419
420 btcoex->bt_priority_cnt = 0;
421 btcoex->bt_priority_time = jiffies;
422 sc->sc_flags &= ~(SC_OP_BT_PRIORITY_DETECTED | SC_OP_BT_SCAN);
423
424 mod_timer(&btcoex->period_timer, jiffies);
425}
426
427
428/*
429 * Pause btcoex timer and bt duty cycle timer
430 */
431void ath9k_btcoex_timer_pause(struct ath_softc *sc)
432{
433 struct ath_btcoex *btcoex = &sc->btcoex;
434 struct ath_hw *ah = sc->sc_ah;
435
436 del_timer_sync(&btcoex->period_timer);
437
438 if (btcoex->hw_timer_enabled)
439 ath9k_gen_timer_stop(ah, btcoex->no_stomp_timer);
440
441 btcoex->hw_timer_enabled = false;
442}
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index ca7694caf364..78b571129c92 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -15,10 +15,11 @@
15 */ 15 */
16 16
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/slab.h>
18#include <asm/unaligned.h> 19#include <asm/unaligned.h>
19#include <linux/pci.h>
20 20
21#include "ath9k.h" 21#include "hw.h"
22#include "rc.h"
22#include "initvals.h" 23#include "initvals.h"
23 24
24#define ATH9K_CLOCK_RATE_CCK 22 25#define ATH9K_CLOCK_RATE_CCK 22
@@ -26,43 +27,35 @@
26#define ATH9K_CLOCK_RATE_2GHZ_OFDM 44 27#define ATH9K_CLOCK_RATE_2GHZ_OFDM 44
27 28
28static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type); 29static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type);
29static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, 30static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan);
30 enum ath9k_ht_macmode macmode);
31static u32 ath9k_hw_ini_fixup(struct ath_hw *ah, 31static u32 ath9k_hw_ini_fixup(struct ath_hw *ah,
32 struct ar5416_eeprom_def *pEepData, 32 struct ar5416_eeprom_def *pEepData,
33 u32 reg, u32 value); 33 u32 reg, u32 value);
34static void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
35static void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
36 34
37/********************/ 35MODULE_AUTHOR("Atheros Communications");
38/* Helper Functions */ 36MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
39/********************/ 37MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
38MODULE_LICENSE("Dual BSD/GPL");
40 39
41static u32 ath9k_hw_mac_usec(struct ath_hw *ah, u32 clks) 40static int __init ath9k_init(void)
42{ 41{
43 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 42 return 0;
44
45 if (!ah->curchan) /* should really check for CCK instead */
46 return clks / ATH9K_CLOCK_RATE_CCK;
47 if (conf->channel->band == IEEE80211_BAND_2GHZ)
48 return clks / ATH9K_CLOCK_RATE_2GHZ_OFDM;
49
50 return clks / ATH9K_CLOCK_RATE_5GHZ_OFDM;
51} 43}
44module_init(ath9k_init);
52 45
53static u32 ath9k_hw_mac_to_usec(struct ath_hw *ah, u32 clks) 46static void __exit ath9k_exit(void)
54{ 47{
55 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 48 return;
56
57 if (conf_is_ht40(conf))
58 return ath9k_hw_mac_usec(ah, clks) / 2;
59 else
60 return ath9k_hw_mac_usec(ah, clks);
61} 49}
50module_exit(ath9k_exit);
51
52/********************/
53/* Helper Functions */
54/********************/
62 55
63static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs) 56static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs)
64{ 57{
65 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 58 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
66 59
67 if (!ah->curchan) /* should really check for CCK instead */ 60 if (!ah->curchan) /* should really check for CCK instead */
68 return usecs *ATH9K_CLOCK_RATE_CCK; 61 return usecs *ATH9K_CLOCK_RATE_CCK;
@@ -73,7 +66,7 @@ static u32 ath9k_hw_mac_clks(struct ath_hw *ah, u32 usecs)
73 66
74static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs) 67static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
75{ 68{
76 struct ieee80211_conf *conf = &ah->ah_sc->hw->conf; 69 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
77 70
78 if (conf_is_ht40(conf)) 71 if (conf_is_ht40(conf))
79 return ath9k_hw_mac_clks(ah, usecs) * 2; 72 return ath9k_hw_mac_clks(ah, usecs) * 2;
@@ -81,38 +74,6 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hw *ah, u32 usecs)
81 return ath9k_hw_mac_clks(ah, usecs); 74 return ath9k_hw_mac_clks(ah, usecs);
82} 75}
83 76
84/*
85 * Read and write, they both share the same lock. We do this to serialize
86 * reads and writes on Atheros 802.11n PCI devices only. This is required
87 * as the FIFO on these devices can only accept sanely 2 requests. After
88 * that the device goes bananas. Serializing the reads/writes prevents this
89 * from happening.
90 */
91
92void ath9k_iowrite32(struct ath_hw *ah, u32 reg_offset, u32 val)
93{
94 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
95 unsigned long flags;
96 spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
97 iowrite32(val, ah->ah_sc->mem + reg_offset);
98 spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
99 } else
100 iowrite32(val, ah->ah_sc->mem + reg_offset);
101}
102
103unsigned int ath9k_ioread32(struct ath_hw *ah, u32 reg_offset)
104{
105 u32 val;
106 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
107 unsigned long flags;
108 spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
109 val = ioread32(ah->ah_sc->mem + reg_offset);
110 spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
111 } else
112 val = ioread32(ah->ah_sc->mem + reg_offset);
113 return val;
114}
115
116bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout) 77bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
117{ 78{
118 int i; 79 int i;
@@ -126,12 +87,13 @@ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout)
126 udelay(AH_TIME_QUANTUM); 87 udelay(AH_TIME_QUANTUM);
127 } 88 }
128 89
129 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 90 ath_print(ath9k_hw_common(ah), ATH_DBG_ANY,
130 "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n", 91 "timeout (%d us) on reg 0x%x: 0x%08x & 0x%08x != 0x%08x\n",
131 timeout, reg, REG_READ(ah, reg), mask, val); 92 timeout, reg, REG_READ(ah, reg), mask, val);
132 93
133 return false; 94 return false;
134} 95}
96EXPORT_SYMBOL(ath9k_hw_wait);
135 97
136u32 ath9k_hw_reverse_bits(u32 val, u32 n) 98u32 ath9k_hw_reverse_bits(u32 val, u32 n)
137{ 99{
@@ -165,22 +127,19 @@ bool ath9k_get_channel_edges(struct ath_hw *ah,
165} 127}
166 128
167u16 ath9k_hw_computetxtime(struct ath_hw *ah, 129u16 ath9k_hw_computetxtime(struct ath_hw *ah,
168 const struct ath_rate_table *rates, 130 u8 phy, int kbps,
169 u32 frameLen, u16 rateix, 131 u32 frameLen, u16 rateix,
170 bool shortPreamble) 132 bool shortPreamble)
171{ 133{
172 u32 bitsPerSymbol, numBits, numSymbols, phyTime, txTime; 134 u32 bitsPerSymbol, numBits, numSymbols, phyTime, txTime;
173 u32 kbps;
174
175 kbps = rates->info[rateix].ratekbps;
176 135
177 if (kbps == 0) 136 if (kbps == 0)
178 return 0; 137 return 0;
179 138
180 switch (rates->info[rateix].phy) { 139 switch (phy) {
181 case WLAN_RC_PHY_CCK: 140 case WLAN_RC_PHY_CCK:
182 phyTime = CCK_PREAMBLE_BITS + CCK_PLCP_BITS; 141 phyTime = CCK_PREAMBLE_BITS + CCK_PLCP_BITS;
183 if (shortPreamble && rates->info[rateix].short_preamble) 142 if (shortPreamble)
184 phyTime >>= 1; 143 phyTime >>= 1;
185 numBits = frameLen << 3; 144 numBits = frameLen << 3;
186 txTime = CCK_SIFS_TIME + phyTime + ((numBits * 1000) / kbps); 145 txTime = CCK_SIFS_TIME + phyTime + ((numBits * 1000) / kbps);
@@ -210,15 +169,15 @@ u16 ath9k_hw_computetxtime(struct ath_hw *ah,
210 } 169 }
211 break; 170 break;
212 default: 171 default:
213 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 172 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
214 "Unknown phy %u (rate ix %u)\n", 173 "Unknown phy %u (rate ix %u)\n", phy, rateix);
215 rates->info[rateix].phy, rateix);
216 txTime = 0; 174 txTime = 0;
217 break; 175 break;
218 } 176 }
219 177
220 return txTime; 178 return txTime;
221} 179}
180EXPORT_SYMBOL(ath9k_hw_computetxtime);
222 181
223void ath9k_hw_get_channel_centers(struct ath_hw *ah, 182void ath9k_hw_get_channel_centers(struct ath_hw *ah,
224 struct ath9k_channel *chan, 183 struct ath9k_channel *chan,
@@ -245,10 +204,9 @@ void ath9k_hw_get_channel_centers(struct ath_hw *ah,
245 204
246 centers->ctl_center = 205 centers->ctl_center =
247 centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT); 206 centers->synth_center - (extoff * HT40_CHANNEL_CENTER_SHIFT);
207 /* 25 MHz spacing is supported by hw but not on upper layers */
248 centers->ext_center = 208 centers->ext_center =
249 centers->synth_center + (extoff * 209 centers->synth_center + (extoff * HT40_CHANNEL_CENTER_SHIFT);
250 ((ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_20) ?
251 HT40_CHANNEL_CENTER_SHIFT : 15));
252} 210}
253 211
254/******************/ 212/******************/
@@ -317,6 +275,7 @@ static void ath9k_hw_disablepcie(struct ath_hw *ah)
317 275
318static bool ath9k_hw_chip_test(struct ath_hw *ah) 276static bool ath9k_hw_chip_test(struct ath_hw *ah)
319{ 277{
278 struct ath_common *common = ath9k_hw_common(ah);
320 u32 regAddr[2] = { AR_STA_ID0, AR_PHY_BASE + (8 << 2) }; 279 u32 regAddr[2] = { AR_STA_ID0, AR_PHY_BASE + (8 << 2) };
321 u32 regHold[2]; 280 u32 regHold[2];
322 u32 patternData[4] = { 0x55555555, 281 u32 patternData[4] = { 0x55555555,
@@ -335,10 +294,11 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
335 REG_WRITE(ah, addr, wrData); 294 REG_WRITE(ah, addr, wrData);
336 rdData = REG_READ(ah, addr); 295 rdData = REG_READ(ah, addr);
337 if (rdData != wrData) { 296 if (rdData != wrData) {
338 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 297 ath_print(common, ATH_DBG_FATAL,
339 "address test failed " 298 "address test failed "
340 "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 299 "addr: 0x%08x - wr:0x%08x != "
341 addr, wrData, rdData); 300 "rd:0x%08x\n",
301 addr, wrData, rdData);
342 return false; 302 return false;
343 } 303 }
344 } 304 }
@@ -347,10 +307,11 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
347 REG_WRITE(ah, addr, wrData); 307 REG_WRITE(ah, addr, wrData);
348 rdData = REG_READ(ah, addr); 308 rdData = REG_READ(ah, addr);
349 if (wrData != rdData) { 309 if (wrData != rdData) {
350 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 310 ath_print(common, ATH_DBG_FATAL,
351 "address test failed " 311 "address test failed "
352 "addr: 0x%08x - wr:0x%08x != rd:0x%08x\n", 312 "addr: 0x%08x - wr:0x%08x != "
353 addr, wrData, rdData); 313 "rd:0x%08x\n",
314 addr, wrData, rdData);
354 return false; 315 return false;
355 } 316 }
356 } 317 }
@@ -361,30 +322,6 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
361 return true; 322 return true;
362} 323}
363 324
364static const char *ath9k_hw_devname(u16 devid)
365{
366 switch (devid) {
367 case AR5416_DEVID_PCI:
368 return "Atheros 5416";
369 case AR5416_DEVID_PCIE:
370 return "Atheros 5418";
371 case AR9160_DEVID_PCI:
372 return "Atheros 9160";
373 case AR5416_AR9100_DEVID:
374 return "Atheros 9100";
375 case AR9280_DEVID_PCI:
376 case AR9280_DEVID_PCIE:
377 return "Atheros 9280";
378 case AR9285_DEVID_PCIE:
379 return "Atheros 9285";
380 case AR5416_DEVID_AR9287_PCI:
381 case AR5416_DEVID_AR9287_PCIE:
382 return "Atheros 9287";
383 }
384
385 return NULL;
386}
387
388static void ath9k_hw_init_config(struct ath_hw *ah) 325static void ath9k_hw_init_config(struct ath_hw *ah)
389{ 326{
390 int i; 327 int i;
@@ -398,21 +335,23 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
398 ah->config.pcie_clock_req = 0; 335 ah->config.pcie_clock_req = 0;
399 ah->config.pcie_waen = 0; 336 ah->config.pcie_waen = 0;
400 ah->config.analog_shiftreg = 1; 337 ah->config.analog_shiftreg = 1;
401 ah->config.ht_enable = 1;
402 ah->config.ofdm_trig_low = 200; 338 ah->config.ofdm_trig_low = 200;
403 ah->config.ofdm_trig_high = 500; 339 ah->config.ofdm_trig_high = 500;
404 ah->config.cck_trig_high = 200; 340 ah->config.cck_trig_high = 200;
405 ah->config.cck_trig_low = 100; 341 ah->config.cck_trig_low = 100;
406 ah->config.enable_ani = 1; 342 ah->config.enable_ani = 1;
407 ah->config.diversity_control = ATH9K_ANT_VARIABLE;
408 ah->config.antenna_switch_swap = 0;
409 343
410 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) { 344 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
411 ah->config.spurchans[i][0] = AR_NO_SPUR; 345 ah->config.spurchans[i][0] = AR_NO_SPUR;
412 ah->config.spurchans[i][1] = AR_NO_SPUR; 346 ah->config.spurchans[i][1] = AR_NO_SPUR;
413 } 347 }
414 348
415 ah->config.intr_mitigation = true; 349 if (ah->hw_version.devid != AR2427_DEVID_PCIE)
350 ah->config.ht_enable = 1;
351 else
352 ah->config.ht_enable = 0;
353
354 ah->config.rx_intr_mitigation = true;
416 355
417 /* 356 /*
418 * We need this for PCI devices only (Cardbus, PCI, miniPCI) 357 * We need this for PCI devices only (Cardbus, PCI, miniPCI)
@@ -433,6 +372,7 @@ static void ath9k_hw_init_config(struct ath_hw *ah)
433 if (num_possible_cpus() > 1) 372 if (num_possible_cpus() > 1)
434 ah->config.serialize_regmode = SER_REG_MODE_AUTO; 373 ah->config.serialize_regmode = SER_REG_MODE_AUTO;
435} 374}
375EXPORT_SYMBOL(ath9k_hw_init);
436 376
437static void ath9k_hw_init_defaults(struct ath_hw *ah) 377static void ath9k_hw_init_defaults(struct ath_hw *ah)
438{ 378{
@@ -456,30 +396,10 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
456 ah->beacon_interval = 100; 396 ah->beacon_interval = 100;
457 ah->enable_32kHz_clock = DONT_USE_32KHZ; 397 ah->enable_32kHz_clock = DONT_USE_32KHZ;
458 ah->slottime = (u32) -1; 398 ah->slottime = (u32) -1;
459 ah->acktimeout = (u32) -1;
460 ah->ctstimeout = (u32) -1;
461 ah->globaltxtimeout = (u32) -1; 399 ah->globaltxtimeout = (u32) -1;
462
463 ah->gbeacon_rate = 0;
464
465 ah->power_mode = ATH9K_PM_UNDEFINED; 400 ah->power_mode = ATH9K_PM_UNDEFINED;
466} 401}
467 402
468static int ath9k_hw_rfattach(struct ath_hw *ah)
469{
470 bool rfStatus = false;
471 int ecode = 0;
472
473 rfStatus = ath9k_hw_init_rf(ah, &ecode);
474 if (!rfStatus) {
475 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
476 "RF setup failed, status: %u\n", ecode);
477 return ecode;
478 }
479
480 return 0;
481}
482
483static int ath9k_hw_rf_claim(struct ath_hw *ah) 403static int ath9k_hw_rf_claim(struct ath_hw *ah)
484{ 404{
485 u32 val; 405 u32 val;
@@ -497,9 +417,9 @@ static int ath9k_hw_rf_claim(struct ath_hw *ah)
497 case AR_RAD2122_SREV_MAJOR: 417 case AR_RAD2122_SREV_MAJOR:
498 break; 418 break;
499 default: 419 default:
500 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 420 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
501 "Radio Chip Rev 0x%02X not supported\n", 421 "Radio Chip Rev 0x%02X not supported\n",
502 val & AR_RADIO_SREV_MAJOR); 422 val & AR_RADIO_SREV_MAJOR);
503 return -EOPNOTSUPP; 423 return -EOPNOTSUPP;
504 } 424 }
505 425
@@ -510,6 +430,7 @@ static int ath9k_hw_rf_claim(struct ath_hw *ah)
510 430
511static int ath9k_hw_init_macaddr(struct ath_hw *ah) 431static int ath9k_hw_init_macaddr(struct ath_hw *ah)
512{ 432{
433 struct ath_common *common = ath9k_hw_common(ah);
513 u32 sum; 434 u32 sum;
514 int i; 435 int i;
515 u16 eeval; 436 u16 eeval;
@@ -518,8 +439,8 @@ static int ath9k_hw_init_macaddr(struct ath_hw *ah)
518 for (i = 0; i < 3; i++) { 439 for (i = 0; i < 3; i++) {
519 eeval = ah->eep_ops->get_eeprom(ah, AR_EEPROM_MAC(i)); 440 eeval = ah->eep_ops->get_eeprom(ah, AR_EEPROM_MAC(i));
520 sum += eeval; 441 sum += eeval;
521 ah->macaddr[2 * i] = eeval >> 8; 442 common->macaddr[2 * i] = eeval >> 8;
522 ah->macaddr[2 * i + 1] = eeval & 0xff; 443 common->macaddr[2 * i + 1] = eeval & 0xff;
523 } 444 }
524 if (sum == 0 || sum == 0xffff * 3) 445 if (sum == 0 || sum == 0xffff * 3)
525 return -EADDRNOTAVAIL; 446 return -EADDRNOTAVAIL;
@@ -590,12 +511,20 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
590 if (ecode != 0) 511 if (ecode != 0)
591 return ecode; 512 return ecode;
592 513
593 DPRINTF(ah->ah_sc, ATH_DBG_CONFIG, "Eeprom VER: %d, REV: %d\n", 514 ath_print(ath9k_hw_common(ah), ATH_DBG_CONFIG,
594 ah->eep_ops->get_eeprom_ver(ah), ah->eep_ops->get_eeprom_rev(ah)); 515 "Eeprom VER: %d, REV: %d\n",
595 516 ah->eep_ops->get_eeprom_ver(ah),
596 ecode = ath9k_hw_rfattach(ah); 517 ah->eep_ops->get_eeprom_rev(ah));
597 if (ecode != 0) 518
598 return ecode; 519 if (!AR_SREV_9280_10_OR_LATER(ah)) {
520 ecode = ath9k_hw_rf_alloc_ext_banks(ah);
521 if (ecode) {
522 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
523 "Failed allocating banks for "
524 "external radio\n");
525 return ecode;
526 }
527 }
599 528
600 if (!AR_SREV_9100(ah)) { 529 if (!AR_SREV_9100(ah)) {
601 ath9k_hw_ani_setup(ah); 530 ath9k_hw_ani_setup(ah);
@@ -617,6 +546,8 @@ static bool ath9k_hw_devid_supported(u16 devid)
617 case AR9285_DEVID_PCIE: 546 case AR9285_DEVID_PCIE:
618 case AR5416_DEVID_AR9287_PCI: 547 case AR5416_DEVID_AR9287_PCI:
619 case AR5416_DEVID_AR9287_PCIE: 548 case AR5416_DEVID_AR9287_PCIE:
549 case AR9271_USB:
550 case AR2427_DEVID_PCIE:
620 return true; 551 return true;
621 default: 552 default:
622 break; 553 break;
@@ -634,9 +565,8 @@ static bool ath9k_hw_macversion_supported(u32 macversion)
634 case AR_SREV_VERSION_9280: 565 case AR_SREV_VERSION_9280:
635 case AR_SREV_VERSION_9285: 566 case AR_SREV_VERSION_9285:
636 case AR_SREV_VERSION_9287: 567 case AR_SREV_VERSION_9287:
637 return true;
638 /* Not yet */
639 case AR_SREV_VERSION_9271: 568 case AR_SREV_VERSION_9271:
569 return true;
640 default: 570 default:
641 break; 571 break;
642 } 572 }
@@ -670,10 +600,13 @@ static void ath9k_hw_init_cal_settings(struct ath_hw *ah)
670static void ath9k_hw_init_mode_regs(struct ath_hw *ah) 600static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
671{ 601{
672 if (AR_SREV_9271(ah)) { 602 if (AR_SREV_9271(ah)) {
673 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271_1_0, 603 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271,
674 ARRAY_SIZE(ar9271Modes_9271_1_0), 6); 604 ARRAY_SIZE(ar9271Modes_9271), 6);
675 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271_1_0, 605 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271,
676 ARRAY_SIZE(ar9271Common_9271_1_0), 2); 606 ARRAY_SIZE(ar9271Common_9271), 2);
607 INIT_INI_ARRAY(&ah->iniModes_9271_1_0_only,
608 ar9271Modes_9271_1_0_only,
609 ARRAY_SIZE(ar9271Modes_9271_1_0_only), 6);
677 return; 610 return;
678 } 611 }
679 612
@@ -880,12 +813,11 @@ static void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
880 } 813 }
881} 814}
882 815
883static void ath9k_hw_init_11a_eeprom_fix(struct ath_hw *ah) 816static void ath9k_hw_init_eeprom_fix(struct ath_hw *ah)
884{ 817{
885 u32 i, j; 818 u32 i, j;
886 819
887 if ((ah->hw_version.devid == AR9280_DEVID_PCI) && 820 if (ah->hw_version.devid == AR9280_DEVID_PCI) {
888 test_bit(ATH9K_MODE_11A, ah->caps.wireless_modes)) {
889 821
890 /* EEPROM Fixup */ 822 /* EEPROM Fixup */
891 for (i = 0; i < ah->iniModes.ia_rows; i++) { 823 for (i = 0; i < ah->iniModes.ia_rows; i++) {
@@ -905,21 +837,27 @@ static void ath9k_hw_init_11a_eeprom_fix(struct ath_hw *ah)
905 837
906int ath9k_hw_init(struct ath_hw *ah) 838int ath9k_hw_init(struct ath_hw *ah)
907{ 839{
840 struct ath_common *common = ath9k_hw_common(ah);
908 int r = 0; 841 int r = 0;
909 842
910 if (!ath9k_hw_devid_supported(ah->hw_version.devid)) 843 if (!ath9k_hw_devid_supported(ah->hw_version.devid)) {
844 ath_print(common, ATH_DBG_FATAL,
845 "Unsupported device ID: 0x%0x\n",
846 ah->hw_version.devid);
911 return -EOPNOTSUPP; 847 return -EOPNOTSUPP;
848 }
912 849
913 ath9k_hw_init_defaults(ah); 850 ath9k_hw_init_defaults(ah);
914 ath9k_hw_init_config(ah); 851 ath9k_hw_init_config(ah);
915 852
916 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) { 853 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_POWER_ON)) {
917 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Couldn't reset chip\n"); 854 ath_print(common, ATH_DBG_FATAL,
855 "Couldn't reset chip\n");
918 return -EIO; 856 return -EIO;
919 } 857 }
920 858
921 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) { 859 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
922 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Couldn't wakeup chip\n"); 860 ath_print(common, ATH_DBG_FATAL, "Couldn't wakeup chip\n");
923 return -EIO; 861 return -EIO;
924 } 862 }
925 863
@@ -934,14 +872,19 @@ int ath9k_hw_init(struct ath_hw *ah)
934 } 872 }
935 } 873 }
936 874
937 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "serialize_regmode is %d\n", 875 ath_print(common, ATH_DBG_RESET, "serialize_regmode is %d\n",
938 ah->config.serialize_regmode); 876 ah->config.serialize_regmode);
939 877
878 if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
879 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD >> 1;
880 else
881 ah->config.max_txtrig_level = MAX_TX_FIFO_THRESHOLD;
882
940 if (!ath9k_hw_macversion_supported(ah->hw_version.macVersion)) { 883 if (!ath9k_hw_macversion_supported(ah->hw_version.macVersion)) {
941 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 884 ath_print(common, ATH_DBG_FATAL,
942 "Mac Chip Rev 0x%02x.%x is not supported by " 885 "Mac Chip Rev 0x%02x.%x is not supported by "
943 "this driver\n", ah->hw_version.macVersion, 886 "this driver\n", ah->hw_version.macVersion,
944 ah->hw_version.macRev); 887 ah->hw_version.macRev);
945 return -EOPNOTSUPP; 888 return -EOPNOTSUPP;
946 } 889 }
947 890
@@ -959,8 +902,14 @@ int ath9k_hw_init(struct ath_hw *ah)
959 ath9k_hw_init_cal_settings(ah); 902 ath9k_hw_init_cal_settings(ah);
960 903
961 ah->ani_function = ATH9K_ANI_ALL; 904 ah->ani_function = ATH9K_ANI_ALL;
962 if (AR_SREV_9280_10_OR_LATER(ah)) 905 if (AR_SREV_9280_10_OR_LATER(ah)) {
963 ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL; 906 ah->ani_function &= ~ATH9K_ANI_NOISE_IMMUNITY_LEVEL;
907 ah->ath9k_hw_rf_set_freq = &ath9k_hw_ar9280_set_channel;
908 ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_9280_spur_mitigate;
909 } else {
910 ah->ath9k_hw_rf_set_freq = &ath9k_hw_set_channel;
911 ah->ath9k_hw_spur_mitigate_freq = &ath9k_hw_spur_mitigate;
912 }
964 913
965 ath9k_hw_init_mode_regs(ah); 914 ath9k_hw_init_mode_regs(ah);
966 915
@@ -969,18 +918,31 @@ int ath9k_hw_init(struct ath_hw *ah)
969 else 918 else
970 ath9k_hw_disablepcie(ah); 919 ath9k_hw_disablepcie(ah);
971 920
921 /* Support for Japan ch.14 (2484) spread */
922 if (AR_SREV_9287_11_OR_LATER(ah)) {
923 INIT_INI_ARRAY(&ah->iniCckfirNormal,
924 ar9287Common_normal_cck_fir_coeff_92871_1,
925 ARRAY_SIZE(ar9287Common_normal_cck_fir_coeff_92871_1), 2);
926 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
927 ar9287Common_japan_2484_cck_fir_coeff_92871_1,
928 ARRAY_SIZE(ar9287Common_japan_2484_cck_fir_coeff_92871_1), 2);
929 }
930
972 r = ath9k_hw_post_init(ah); 931 r = ath9k_hw_post_init(ah);
973 if (r) 932 if (r)
974 return r; 933 return r;
975 934
976 ath9k_hw_init_mode_gain_regs(ah); 935 ath9k_hw_init_mode_gain_regs(ah);
977 ath9k_hw_fill_cap_info(ah); 936 r = ath9k_hw_fill_cap_info(ah);
978 ath9k_hw_init_11a_eeprom_fix(ah); 937 if (r)
938 return r;
939
940 ath9k_hw_init_eeprom_fix(ah);
979 941
980 r = ath9k_hw_init_macaddr(ah); 942 r = ath9k_hw_init_macaddr(ah);
981 if (r) { 943 if (r) {
982 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 944 ath_print(common, ATH_DBG_FATAL,
983 "Failed to initialize MAC address\n"); 945 "Failed to initialize MAC address\n");
984 return r; 946 return r;
985 } 947 }
986 948
@@ -991,6 +953,8 @@ int ath9k_hw_init(struct ath_hw *ah)
991 953
992 ath9k_init_nfcal_hist_buffer(ah); 954 ath9k_init_nfcal_hist_buffer(ah);
993 955
956 common->state = ATH_HW_INITIALIZED;
957
994 return 0; 958 return 0;
995} 959}
996 960
@@ -1027,6 +991,22 @@ static void ath9k_hw_init_qos(struct ath_hw *ah)
1027 REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF); 991 REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF);
1028} 992}
1029 993
994static void ath9k_hw_change_target_baud(struct ath_hw *ah, u32 freq, u32 baud)
995{
996 u32 lcr;
997 u32 baud_divider = freq * 1000 * 1000 / 16 / baud;
998
999 lcr = REG_READ(ah , 0x5100c);
1000 lcr |= 0x80;
1001
1002 REG_WRITE(ah, 0x5100c, lcr);
1003 REG_WRITE(ah, 0x51004, (baud_divider >> 8));
1004 REG_WRITE(ah, 0x51000, (baud_divider & 0xff));
1005
1006 lcr &= ~0x80;
1007 REG_WRITE(ah, 0x5100c, lcr);
1008}
1009
1030static void ath9k_hw_init_pll(struct ath_hw *ah, 1010static void ath9k_hw_init_pll(struct ath_hw *ah,
1031 struct ath9k_channel *chan) 1011 struct ath9k_channel *chan)
1032{ 1012{
@@ -1090,6 +1070,26 @@ static void ath9k_hw_init_pll(struct ath_hw *ah,
1090 } 1070 }
1091 REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll); 1071 REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
1092 1072
1073 /* Switch the core clock for ar9271 to 117Mhz */
1074 if (AR_SREV_9271(ah)) {
1075 if ((pll == 0x142c) || (pll == 0x2850) ) {
1076 udelay(500);
1077 /* set CLKOBS to output AHB clock */
1078 REG_WRITE(ah, 0x7020, 0xe);
1079 /*
1080 * 0x304: 117Mhz, ahb_ratio: 1x1
1081 * 0x306: 40Mhz, ahb_ratio: 1x1
1082 */
1083 REG_WRITE(ah, 0x50040, 0x304);
1084 /*
1085 * makes adjustments for the baud dividor to keep the
1086 * targetted baud rate based on the used core clock.
1087 */
1088 ath9k_hw_change_target_baud(ah, AR9271_CORE_CLOCK,
1089 AR9271_TARGET_BAUD_RATE);
1090 }
1091 }
1092
1093 udelay(RTC_PLL_SETTLE_DELAY); 1093 udelay(RTC_PLL_SETTLE_DELAY);
1094 1094
1095 REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK); 1095 REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
@@ -1107,7 +1107,7 @@ static void ath9k_hw_init_chain_masks(struct ath_hw *ah)
1107 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP, 1107 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
1108 AR_PHY_SWAP_ALT_CHAIN); 1108 AR_PHY_SWAP_ALT_CHAIN);
1109 case 0x3: 1109 case 0x3:
1110 if (((ah)->hw_version.macVersion <= AR_SREV_VERSION_9160)) { 1110 if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) {
1111 REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7); 1111 REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7);
1112 REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7); 1112 REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, 0x7);
1113 break; 1113 break;
@@ -1141,7 +1141,7 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
1141 AR_IMR_RXORN | 1141 AR_IMR_RXORN |
1142 AR_IMR_BCNMISC; 1142 AR_IMR_BCNMISC;
1143 1143
1144 if (ah->config.intr_mitigation) 1144 if (ah->config.rx_intr_mitigation)
1145 ah->mask_reg |= AR_IMR_RXINTM | AR_IMR_RXMINTR; 1145 ah->mask_reg |= AR_IMR_RXINTM | AR_IMR_RXMINTR;
1146 else 1146 else
1147 ah->mask_reg |= AR_IMR_RXOK; 1147 ah->mask_reg |= AR_IMR_RXOK;
@@ -1161,39 +1161,32 @@ static void ath9k_hw_init_interrupt_masks(struct ath_hw *ah,
1161 } 1161 }
1162} 1162}
1163 1163
1164static bool ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us) 1164static void ath9k_hw_setslottime(struct ath_hw *ah, u32 us)
1165{ 1165{
1166 if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_ACK))) { 1166 u32 val = ath9k_hw_mac_to_clks(ah, us);
1167 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad ack timeout %u\n", us); 1167 val = min(val, (u32) 0xFFFF);
1168 ah->acktimeout = (u32) -1; 1168 REG_WRITE(ah, AR_D_GBL_IFS_SLOT, val);
1169 return false;
1170 } else {
1171 REG_RMW_FIELD(ah, AR_TIME_OUT,
1172 AR_TIME_OUT_ACK, ath9k_hw_mac_to_clks(ah, us));
1173 ah->acktimeout = us;
1174 return true;
1175 }
1176} 1169}
1177 1170
1178static bool ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us) 1171static void ath9k_hw_set_ack_timeout(struct ath_hw *ah, u32 us)
1179{ 1172{
1180 if (us > ath9k_hw_mac_to_usec(ah, MS(0xffffffff, AR_TIME_OUT_CTS))) { 1173 u32 val = ath9k_hw_mac_to_clks(ah, us);
1181 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad cts timeout %u\n", us); 1174 val = min(val, (u32) MS(0xFFFFFFFF, AR_TIME_OUT_ACK));
1182 ah->ctstimeout = (u32) -1; 1175 REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_ACK, val);
1183 return false; 1176}
1184 } else { 1177
1185 REG_RMW_FIELD(ah, AR_TIME_OUT, 1178static void ath9k_hw_set_cts_timeout(struct ath_hw *ah, u32 us)
1186 AR_TIME_OUT_CTS, ath9k_hw_mac_to_clks(ah, us)); 1179{
1187 ah->ctstimeout = us; 1180 u32 val = ath9k_hw_mac_to_clks(ah, us);
1188 return true; 1181 val = min(val, (u32) MS(0xFFFFFFFF, AR_TIME_OUT_CTS));
1189 } 1182 REG_RMW_FIELD(ah, AR_TIME_OUT, AR_TIME_OUT_CTS, val);
1190} 1183}
1191 1184
1192static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu) 1185static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
1193{ 1186{
1194 if (tu > 0xFFFF) { 1187 if (tu > 0xFFFF) {
1195 DPRINTF(ah->ah_sc, ATH_DBG_XMIT, 1188 ath_print(ath9k_hw_common(ah), ATH_DBG_XMIT,
1196 "bad global tx timeout %u\n", tu); 1189 "bad global tx timeout %u\n", tu);
1197 ah->globaltxtimeout = (u32) -1; 1190 ah->globaltxtimeout = (u32) -1;
1198 return false; 1191 return false;
1199 } else { 1192 } else {
@@ -1203,40 +1196,66 @@ static bool ath9k_hw_set_global_txtimeout(struct ath_hw *ah, u32 tu)
1203 } 1196 }
1204} 1197}
1205 1198
1206static void ath9k_hw_init_user_settings(struct ath_hw *ah) 1199void ath9k_hw_init_global_settings(struct ath_hw *ah)
1207{ 1200{
1208 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "ah->misc_mode 0x%x\n", 1201 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
1209 ah->misc_mode); 1202 int acktimeout;
1203 int slottime;
1204 int sifstime;
1205
1206 ath_print(ath9k_hw_common(ah), ATH_DBG_RESET, "ah->misc_mode 0x%x\n",
1207 ah->misc_mode);
1210 1208
1211 if (ah->misc_mode != 0) 1209 if (ah->misc_mode != 0)
1212 REG_WRITE(ah, AR_PCU_MISC, 1210 REG_WRITE(ah, AR_PCU_MISC,
1213 REG_READ(ah, AR_PCU_MISC) | ah->misc_mode); 1211 REG_READ(ah, AR_PCU_MISC) | ah->misc_mode);
1214 if (ah->slottime != (u32) -1) 1212
1215 ath9k_hw_setslottime(ah, ah->slottime); 1213 if (conf->channel && conf->channel->band == IEEE80211_BAND_5GHZ)
1216 if (ah->acktimeout != (u32) -1) 1214 sifstime = 16;
1217 ath9k_hw_set_ack_timeout(ah, ah->acktimeout); 1215 else
1218 if (ah->ctstimeout != (u32) -1) 1216 sifstime = 10;
1219 ath9k_hw_set_cts_timeout(ah, ah->ctstimeout); 1217
1218 /* As defined by IEEE 802.11-2007 17.3.8.6 */
1219 slottime = ah->slottime + 3 * ah->coverage_class;
1220 acktimeout = slottime + sifstime;
1221
1222 /*
1223 * Workaround for early ACK timeouts, add an offset to match the
1224 * initval's 64us ack timeout value.
1225 * This was initially only meant to work around an issue with delayed
1226 * BA frames in some implementations, but it has been found to fix ACK
1227 * timeout issues in other cases as well.
1228 */
1229 if (conf->channel && conf->channel->band == IEEE80211_BAND_2GHZ)
1230 acktimeout += 64 - sifstime - ah->slottime;
1231
1232 ath9k_hw_setslottime(ah, slottime);
1233 ath9k_hw_set_ack_timeout(ah, acktimeout);
1234 ath9k_hw_set_cts_timeout(ah, acktimeout);
1220 if (ah->globaltxtimeout != (u32) -1) 1235 if (ah->globaltxtimeout != (u32) -1)
1221 ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout); 1236 ath9k_hw_set_global_txtimeout(ah, ah->globaltxtimeout);
1222} 1237}
1238EXPORT_SYMBOL(ath9k_hw_init_global_settings);
1223 1239
1224const char *ath9k_hw_probe(u16 vendorid, u16 devid) 1240void ath9k_hw_deinit(struct ath_hw *ah)
1225{ 1241{
1226 return vendorid == ATHEROS_VENDOR_ID ? 1242 struct ath_common *common = ath9k_hw_common(ah);
1227 ath9k_hw_devname(devid) : NULL; 1243
1228} 1244 if (common->state <= ATH_HW_INITIALIZED)
1245 goto free_hw;
1229 1246
1230void ath9k_hw_detach(struct ath_hw *ah)
1231{
1232 if (!AR_SREV_9100(ah)) 1247 if (!AR_SREV_9100(ah))
1233 ath9k_hw_ani_disable(ah); 1248 ath9k_hw_ani_disable(ah);
1234 1249
1235 ath9k_hw_rf_free(ah);
1236 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP); 1250 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
1251
1252free_hw:
1253 if (!AR_SREV_9280_10_OR_LATER(ah))
1254 ath9k_hw_rf_free_ext_banks(ah);
1237 kfree(ah); 1255 kfree(ah);
1238 ah = NULL; 1256 ah = NULL;
1239} 1257}
1258EXPORT_SYMBOL(ath9k_hw_deinit);
1240 1259
1241/*******/ 1260/*******/
1242/* INI */ 1261/* INI */
@@ -1254,7 +1273,8 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
1254 * AR9271 1.1 1273 * AR9271 1.1
1255 */ 1274 */
1256 if (AR_SREV_9271_10(ah)) { 1275 if (AR_SREV_9271_10(ah)) {
1257 val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) | AR_PHY_SPECTRAL_SCAN_ENABLE; 1276 val = REG_READ(ah, AR_PHY_SPECTRAL_SCAN) |
1277 AR_PHY_SPECTRAL_SCAN_ENABLE;
1258 REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val); 1278 REG_WRITE(ah, AR_PHY_SPECTRAL_SCAN, val);
1259 } 1279 }
1260 else if (AR_SREV_9271_11(ah)) 1280 else if (AR_SREV_9271_11(ah))
@@ -1291,6 +1311,16 @@ static void ath9k_hw_override_ini(struct ath_hw *ah,
1291 * Necessary to avoid issues on AR5416 2.0 1311 * Necessary to avoid issues on AR5416 2.0
1292 */ 1312 */
1293 REG_WRITE(ah, 0x9800 + (651 << 2), 0x11); 1313 REG_WRITE(ah, 0x9800 + (651 << 2), 0x11);
1314
1315 /*
1316 * Disable RIFS search on some chips to avoid baseband
1317 * hang issues.
1318 */
1319 if (AR_SREV_9100(ah) || AR_SREV_9160(ah)) {
1320 val = REG_READ(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS);
1321 val &= ~AR_PHY_RIFS_INIT_DELAY;
1322 REG_WRITE(ah, AR_PHY_HEAVY_CLIP_FACTOR_RIFS, val);
1323 }
1294} 1324}
1295 1325
1296static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah, 1326static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah,
@@ -1298,28 +1328,29 @@ static u32 ath9k_hw_def_ini_fixup(struct ath_hw *ah,
1298 u32 reg, u32 value) 1328 u32 reg, u32 value)
1299{ 1329{
1300 struct base_eep_header *pBase = &(pEepData->baseEepHeader); 1330 struct base_eep_header *pBase = &(pEepData->baseEepHeader);
1331 struct ath_common *common = ath9k_hw_common(ah);
1301 1332
1302 switch (ah->hw_version.devid) { 1333 switch (ah->hw_version.devid) {
1303 case AR9280_DEVID_PCI: 1334 case AR9280_DEVID_PCI:
1304 if (reg == 0x7894) { 1335 if (reg == 0x7894) {
1305 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1336 ath_print(common, ATH_DBG_EEPROM,
1306 "ini VAL: %x EEPROM: %x\n", value, 1337 "ini VAL: %x EEPROM: %x\n", value,
1307 (pBase->version & 0xff)); 1338 (pBase->version & 0xff));
1308 1339
1309 if ((pBase->version & 0xff) > 0x0a) { 1340 if ((pBase->version & 0xff) > 0x0a) {
1310 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1341 ath_print(common, ATH_DBG_EEPROM,
1311 "PWDCLKIND: %d\n", 1342 "PWDCLKIND: %d\n",
1312 pBase->pwdclkind); 1343 pBase->pwdclkind);
1313 value &= ~AR_AN_TOP2_PWDCLKIND; 1344 value &= ~AR_AN_TOP2_PWDCLKIND;
1314 value |= AR_AN_TOP2_PWDCLKIND & 1345 value |= AR_AN_TOP2_PWDCLKIND &
1315 (pBase->pwdclkind << AR_AN_TOP2_PWDCLKIND_S); 1346 (pBase->pwdclkind << AR_AN_TOP2_PWDCLKIND_S);
1316 } else { 1347 } else {
1317 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1348 ath_print(common, ATH_DBG_EEPROM,
1318 "PWDCLKIND Earlier Rev\n"); 1349 "PWDCLKIND Earlier Rev\n");
1319 } 1350 }
1320 1351
1321 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 1352 ath_print(common, ATH_DBG_EEPROM,
1322 "final ini VAL: %x\n", value); 1353 "final ini VAL: %x\n", value);
1323 } 1354 }
1324 break; 1355 break;
1325 } 1356 }
@@ -1374,8 +1405,7 @@ static u32 ath9k_regd_get_ctl(struct ath_regulatory *reg,
1374} 1405}
1375 1406
1376static int ath9k_hw_process_ini(struct ath_hw *ah, 1407static int ath9k_hw_process_ini(struct ath_hw *ah,
1377 struct ath9k_channel *chan, 1408 struct ath9k_channel *chan)
1378 enum ath9k_ht_macmode macmode)
1379{ 1409{
1380 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 1410 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
1381 int i, regWrites = 0; 1411 int i, regWrites = 0;
@@ -1469,7 +1499,11 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
1469 DO_DELAY(regWrites); 1499 DO_DELAY(regWrites);
1470 } 1500 }
1471 1501
1472 ath9k_hw_write_regs(ah, modesIndex, freqIndex, regWrites); 1502 ath9k_hw_write_regs(ah, freqIndex, regWrites);
1503
1504 if (AR_SREV_9271_10(ah))
1505 REG_WRITE_ARRAY(&ah->iniModes_9271_1_0_only,
1506 modesIndex, regWrites);
1473 1507
1474 if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) { 1508 if (AR_SREV_9280_20(ah) && IS_CHAN_A_5MHZ_SPACED(chan)) {
1475 REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, 1509 REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex,
@@ -1477,7 +1511,7 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
1477 } 1511 }
1478 1512
1479 ath9k_hw_override_ini(ah, chan); 1513 ath9k_hw_override_ini(ah, chan);
1480 ath9k_hw_set_regs(ah, chan, macmode); 1514 ath9k_hw_set_regs(ah, chan);
1481 ath9k_hw_init_chain_masks(ah); 1515 ath9k_hw_init_chain_masks(ah);
1482 1516
1483 if (OLC_FOR_AR9280_20_LATER) 1517 if (OLC_FOR_AR9280_20_LATER)
@@ -1491,8 +1525,8 @@ static int ath9k_hw_process_ini(struct ath_hw *ah,
1491 (u32) regulatory->power_limit)); 1525 (u32) regulatory->power_limit));
1492 1526
1493 if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) { 1527 if (!ath9k_hw_set_rf_regs(ah, chan, freqIndex)) {
1494 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 1528 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
1495 "ar5416SetRfRegs failed\n"); 1529 "ar5416SetRfRegs failed\n");
1496 return -EIO; 1530 return -EIO;
1497 } 1531 }
1498 1532
@@ -1697,16 +1731,14 @@ static bool ath9k_hw_set_reset(struct ath_hw *ah, int type)
1697 1731
1698 REG_WRITE(ah, AR_RTC_RC, 0); 1732 REG_WRITE(ah, AR_RTC_RC, 0);
1699 if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) { 1733 if (!ath9k_hw_wait(ah, AR_RTC_RC, AR_RTC_RC_M, 0, AH_WAIT_TIMEOUT)) {
1700 DPRINTF(ah->ah_sc, ATH_DBG_RESET, 1734 ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
1701 "RTC stuck in MAC reset\n"); 1735 "RTC stuck in MAC reset\n");
1702 return false; 1736 return false;
1703 } 1737 }
1704 1738
1705 if (!AR_SREV_9100(ah)) 1739 if (!AR_SREV_9100(ah))
1706 REG_WRITE(ah, AR_RC, 0); 1740 REG_WRITE(ah, AR_RC, 0);
1707 1741
1708 ath9k_hw_init_pll(ah, NULL);
1709
1710 if (AR_SREV_9100(ah)) 1742 if (AR_SREV_9100(ah))
1711 udelay(50); 1743 udelay(50);
1712 1744
@@ -1734,7 +1766,8 @@ static bool ath9k_hw_set_reset_power_on(struct ath_hw *ah)
1734 AR_RTC_STATUS_M, 1766 AR_RTC_STATUS_M,
1735 AR_RTC_STATUS_ON, 1767 AR_RTC_STATUS_ON,
1736 AH_WAIT_TIMEOUT)) { 1768 AH_WAIT_TIMEOUT)) {
1737 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "RTC not waking up\n"); 1769 ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
1770 "RTC not waking up\n");
1738 return false; 1771 return false;
1739 } 1772 }
1740 1773
@@ -1759,8 +1792,7 @@ static bool ath9k_hw_set_reset_reg(struct ath_hw *ah, u32 type)
1759 } 1792 }
1760} 1793}
1761 1794
1762static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan, 1795static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan)
1763 enum ath9k_ht_macmode macmode)
1764{ 1796{
1765 u32 phymode; 1797 u32 phymode;
1766 u32 enableDacFifo = 0; 1798 u32 enableDacFifo = 0;
@@ -1779,12 +1811,10 @@ static void ath9k_hw_set_regs(struct ath_hw *ah, struct ath9k_channel *chan,
1779 (chan->chanmode == CHANNEL_G_HT40PLUS)) 1811 (chan->chanmode == CHANNEL_G_HT40PLUS))
1780 phymode |= AR_PHY_FC_DYN2040_PRI_CH; 1812 phymode |= AR_PHY_FC_DYN2040_PRI_CH;
1781 1813
1782 if (ah->extprotspacing == ATH9K_HT_EXTPROTSPACING_25)
1783 phymode |= AR_PHY_FC_DYN2040_EXT_CH;
1784 } 1814 }
1785 REG_WRITE(ah, AR_PHY_TURBO, phymode); 1815 REG_WRITE(ah, AR_PHY_TURBO, phymode);
1786 1816
1787 ath9k_hw_set11nmac2040(ah, macmode); 1817 ath9k_hw_set11nmac2040(ah);
1788 1818
1789 REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S); 1819 REG_WRITE(ah, AR_GTXTO, 25 << AR_GTXTO_TIMEOUT_LIMIT_S);
1790 REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S); 1820 REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S);
@@ -1810,17 +1840,19 @@ static bool ath9k_hw_chip_reset(struct ath_hw *ah,
1810} 1840}
1811 1841
1812static bool ath9k_hw_channel_change(struct ath_hw *ah, 1842static bool ath9k_hw_channel_change(struct ath_hw *ah,
1813 struct ath9k_channel *chan, 1843 struct ath9k_channel *chan)
1814 enum ath9k_ht_macmode macmode)
1815{ 1844{
1816 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 1845 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
1846 struct ath_common *common = ath9k_hw_common(ah);
1817 struct ieee80211_channel *channel = chan->chan; 1847 struct ieee80211_channel *channel = chan->chan;
1818 u32 synthDelay, qnum; 1848 u32 synthDelay, qnum;
1849 int r;
1819 1850
1820 for (qnum = 0; qnum < AR_NUM_QCU; qnum++) { 1851 for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
1821 if (ath9k_hw_numtxpending(ah, qnum)) { 1852 if (ath9k_hw_numtxpending(ah, qnum)) {
1822 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 1853 ath_print(common, ATH_DBG_QUEUE,
1823 "Transmit frames pending on queue %d\n", qnum); 1854 "Transmit frames pending on "
1855 "queue %d\n", qnum);
1824 return false; 1856 return false;
1825 } 1857 }
1826 } 1858 }
@@ -1828,21 +1860,18 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
1828 REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN); 1860 REG_WRITE(ah, AR_PHY_RFBUS_REQ, AR_PHY_RFBUS_REQ_EN);
1829 if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN, 1861 if (!ath9k_hw_wait(ah, AR_PHY_RFBUS_GRANT, AR_PHY_RFBUS_GRANT_EN,
1830 AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT)) { 1862 AR_PHY_RFBUS_GRANT_EN, AH_WAIT_TIMEOUT)) {
1831 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 1863 ath_print(common, ATH_DBG_FATAL,
1832 "Could not kill baseband RX\n"); 1864 "Could not kill baseband RX\n");
1833 return false; 1865 return false;
1834 } 1866 }
1835 1867
1836 ath9k_hw_set_regs(ah, chan, macmode); 1868 ath9k_hw_set_regs(ah, chan);
1837 1869
1838 if (AR_SREV_9280_10_OR_LATER(ah)) { 1870 r = ah->ath9k_hw_rf_set_freq(ah, chan);
1839 ath9k_hw_ar9280_set_channel(ah, chan); 1871 if (r) {
1840 } else { 1872 ath_print(common, ATH_DBG_FATAL,
1841 if (!(ath9k_hw_set_channel(ah, chan))) { 1873 "Failed to set channel\n");
1842 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 1874 return false;
1843 "Failed to set channel\n");
1844 return false;
1845 }
1846 } 1875 }
1847 1876
1848 ah->eep_ops->set_txpower(ah, chan, 1877 ah->eep_ops->set_txpower(ah, chan,
@@ -1865,10 +1894,7 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
1865 if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan)) 1894 if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
1866 ath9k_hw_set_delta_slope(ah, chan); 1895 ath9k_hw_set_delta_slope(ah, chan);
1867 1896
1868 if (AR_SREV_9280_10_OR_LATER(ah)) 1897 ah->ath9k_hw_spur_mitigate_freq(ah, chan);
1869 ath9k_hw_9280_spur_mitigate(ah, chan);
1870 else
1871 ath9k_hw_spur_mitigate(ah, chan);
1872 1898
1873 if (!chan->oneTimeCalsDone) 1899 if (!chan->oneTimeCalsDone)
1874 chan->oneTimeCalsDone = true; 1900 chan->oneTimeCalsDone = true;
@@ -1876,457 +1902,6 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah,
1876 return true; 1902 return true;
1877} 1903}
1878 1904
1879static void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
1880{
1881 int bb_spur = AR_NO_SPUR;
1882 int freq;
1883 int bin, cur_bin;
1884 int bb_spur_off, spur_subchannel_sd;
1885 int spur_freq_sd;
1886 int spur_delta_phase;
1887 int denominator;
1888 int upper, lower, cur_vit_mask;
1889 int tmp, newVal;
1890 int i;
1891 int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
1892 AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
1893 };
1894 int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
1895 AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
1896 };
1897 int inc[4] = { 0, 100, 0, 0 };
1898 struct chan_centers centers;
1899
1900 int8_t mask_m[123];
1901 int8_t mask_p[123];
1902 int8_t mask_amt;
1903 int tmp_mask;
1904 int cur_bb_spur;
1905 bool is2GHz = IS_CHAN_2GHZ(chan);
1906
1907 memset(&mask_m, 0, sizeof(int8_t) * 123);
1908 memset(&mask_p, 0, sizeof(int8_t) * 123);
1909
1910 ath9k_hw_get_channel_centers(ah, chan, &centers);
1911 freq = centers.synth_center;
1912
1913 ah->config.spurmode = SPUR_ENABLE_EEPROM;
1914 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
1915 cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
1916
1917 if (is2GHz)
1918 cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_2GHZ;
1919 else
1920 cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_5GHZ;
1921
1922 if (AR_NO_SPUR == cur_bb_spur)
1923 break;
1924 cur_bb_spur = cur_bb_spur - freq;
1925
1926 if (IS_CHAN_HT40(chan)) {
1927 if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT40) &&
1928 (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT40)) {
1929 bb_spur = cur_bb_spur;
1930 break;
1931 }
1932 } else if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT20) &&
1933 (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT20)) {
1934 bb_spur = cur_bb_spur;
1935 break;
1936 }
1937 }
1938
1939 if (AR_NO_SPUR == bb_spur) {
1940 REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
1941 AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
1942 return;
1943 } else {
1944 REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
1945 AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
1946 }
1947
1948 bin = bb_spur * 320;
1949
1950 tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
1951
1952 newVal = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
1953 AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
1954 AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
1955 AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
1956 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);
1957
1958 newVal = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
1959 AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
1960 AR_PHY_SPUR_REG_MASK_RATE_SELECT |
1961 AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
1962 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
1963 REG_WRITE(ah, AR_PHY_SPUR_REG, newVal);
1964
1965 if (IS_CHAN_HT40(chan)) {
1966 if (bb_spur < 0) {
1967 spur_subchannel_sd = 1;
1968 bb_spur_off = bb_spur + 10;
1969 } else {
1970 spur_subchannel_sd = 0;
1971 bb_spur_off = bb_spur - 10;
1972 }
1973 } else {
1974 spur_subchannel_sd = 0;
1975 bb_spur_off = bb_spur;
1976 }
1977
1978 if (IS_CHAN_HT40(chan))
1979 spur_delta_phase =
1980 ((bb_spur * 262144) /
1981 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
1982 else
1983 spur_delta_phase =
1984 ((bb_spur * 524288) /
1985 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
1986
1987 denominator = IS_CHAN_2GHZ(chan) ? 44 : 40;
1988 spur_freq_sd = ((bb_spur_off * 2048) / denominator) & 0x3ff;
1989
1990 newVal = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
1991 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
1992 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
1993 REG_WRITE(ah, AR_PHY_TIMING11, newVal);
1994
1995 newVal = spur_subchannel_sd << AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S;
1996 REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal);
1997
1998 cur_bin = -6000;
1999 upper = bin + 100;
2000 lower = bin - 100;
2001
2002 for (i = 0; i < 4; i++) {
2003 int pilot_mask = 0;
2004 int chan_mask = 0;
2005 int bp = 0;
2006 for (bp = 0; bp < 30; bp++) {
2007 if ((cur_bin > lower) && (cur_bin < upper)) {
2008 pilot_mask = pilot_mask | 0x1 << bp;
2009 chan_mask = chan_mask | 0x1 << bp;
2010 }
2011 cur_bin += 100;
2012 }
2013 cur_bin += inc[i];
2014 REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
2015 REG_WRITE(ah, chan_mask_reg[i], chan_mask);
2016 }
2017
2018 cur_vit_mask = 6100;
2019 upper = bin + 120;
2020 lower = bin - 120;
2021
2022 for (i = 0; i < 123; i++) {
2023 if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
2024
2025 /* workaround for gcc bug #37014 */
2026 volatile int tmp_v = abs(cur_vit_mask - bin);
2027
2028 if (tmp_v < 75)
2029 mask_amt = 1;
2030 else
2031 mask_amt = 0;
2032 if (cur_vit_mask < 0)
2033 mask_m[abs(cur_vit_mask / 100)] = mask_amt;
2034 else
2035 mask_p[cur_vit_mask / 100] = mask_amt;
2036 }
2037 cur_vit_mask -= 100;
2038 }
2039
2040 tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
2041 | (mask_m[48] << 26) | (mask_m[49] << 24)
2042 | (mask_m[50] << 22) | (mask_m[51] << 20)
2043 | (mask_m[52] << 18) | (mask_m[53] << 16)
2044 | (mask_m[54] << 14) | (mask_m[55] << 12)
2045 | (mask_m[56] << 10) | (mask_m[57] << 8)
2046 | (mask_m[58] << 6) | (mask_m[59] << 4)
2047 | (mask_m[60] << 2) | (mask_m[61] << 0);
2048 REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
2049 REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
2050
2051 tmp_mask = (mask_m[31] << 28)
2052 | (mask_m[32] << 26) | (mask_m[33] << 24)
2053 | (mask_m[34] << 22) | (mask_m[35] << 20)
2054 | (mask_m[36] << 18) | (mask_m[37] << 16)
2055 | (mask_m[48] << 14) | (mask_m[39] << 12)
2056 | (mask_m[40] << 10) | (mask_m[41] << 8)
2057 | (mask_m[42] << 6) | (mask_m[43] << 4)
2058 | (mask_m[44] << 2) | (mask_m[45] << 0);
2059 REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
2060 REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
2061
2062 tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
2063 | (mask_m[18] << 26) | (mask_m[18] << 24)
2064 | (mask_m[20] << 22) | (mask_m[20] << 20)
2065 | (mask_m[22] << 18) | (mask_m[22] << 16)
2066 | (mask_m[24] << 14) | (mask_m[24] << 12)
2067 | (mask_m[25] << 10) | (mask_m[26] << 8)
2068 | (mask_m[27] << 6) | (mask_m[28] << 4)
2069 | (mask_m[29] << 2) | (mask_m[30] << 0);
2070 REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
2071 REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
2072
2073 tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
2074 | (mask_m[2] << 26) | (mask_m[3] << 24)
2075 | (mask_m[4] << 22) | (mask_m[5] << 20)
2076 | (mask_m[6] << 18) | (mask_m[7] << 16)
2077 | (mask_m[8] << 14) | (mask_m[9] << 12)
2078 | (mask_m[10] << 10) | (mask_m[11] << 8)
2079 | (mask_m[12] << 6) | (mask_m[13] << 4)
2080 | (mask_m[14] << 2) | (mask_m[15] << 0);
2081 REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
2082 REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
2083
2084 tmp_mask = (mask_p[15] << 28)
2085 | (mask_p[14] << 26) | (mask_p[13] << 24)
2086 | (mask_p[12] << 22) | (mask_p[11] << 20)
2087 | (mask_p[10] << 18) | (mask_p[9] << 16)
2088 | (mask_p[8] << 14) | (mask_p[7] << 12)
2089 | (mask_p[6] << 10) | (mask_p[5] << 8)
2090 | (mask_p[4] << 6) | (mask_p[3] << 4)
2091 | (mask_p[2] << 2) | (mask_p[1] << 0);
2092 REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
2093 REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
2094
2095 tmp_mask = (mask_p[30] << 28)
2096 | (mask_p[29] << 26) | (mask_p[28] << 24)
2097 | (mask_p[27] << 22) | (mask_p[26] << 20)
2098 | (mask_p[25] << 18) | (mask_p[24] << 16)
2099 | (mask_p[23] << 14) | (mask_p[22] << 12)
2100 | (mask_p[21] << 10) | (mask_p[20] << 8)
2101 | (mask_p[19] << 6) | (mask_p[18] << 4)
2102 | (mask_p[17] << 2) | (mask_p[16] << 0);
2103 REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
2104 REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
2105
2106 tmp_mask = (mask_p[45] << 28)
2107 | (mask_p[44] << 26) | (mask_p[43] << 24)
2108 | (mask_p[42] << 22) | (mask_p[41] << 20)
2109 | (mask_p[40] << 18) | (mask_p[39] << 16)
2110 | (mask_p[38] << 14) | (mask_p[37] << 12)
2111 | (mask_p[36] << 10) | (mask_p[35] << 8)
2112 | (mask_p[34] << 6) | (mask_p[33] << 4)
2113 | (mask_p[32] << 2) | (mask_p[31] << 0);
2114 REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
2115 REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
2116
2117 tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
2118 | (mask_p[59] << 26) | (mask_p[58] << 24)
2119 | (mask_p[57] << 22) | (mask_p[56] << 20)
2120 | (mask_p[55] << 18) | (mask_p[54] << 16)
2121 | (mask_p[53] << 14) | (mask_p[52] << 12)
2122 | (mask_p[51] << 10) | (mask_p[50] << 8)
2123 | (mask_p[49] << 6) | (mask_p[48] << 4)
2124 | (mask_p[47] << 2) | (mask_p[46] << 0);
2125 REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
2126 REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
2127}
2128
2129static void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
2130{
2131 int bb_spur = AR_NO_SPUR;
2132 int bin, cur_bin;
2133 int spur_freq_sd;
2134 int spur_delta_phase;
2135 int denominator;
2136 int upper, lower, cur_vit_mask;
2137 int tmp, new;
2138 int i;
2139 int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
2140 AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
2141 };
2142 int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
2143 AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
2144 };
2145 int inc[4] = { 0, 100, 0, 0 };
2146
2147 int8_t mask_m[123];
2148 int8_t mask_p[123];
2149 int8_t mask_amt;
2150 int tmp_mask;
2151 int cur_bb_spur;
2152 bool is2GHz = IS_CHAN_2GHZ(chan);
2153
2154 memset(&mask_m, 0, sizeof(int8_t) * 123);
2155 memset(&mask_p, 0, sizeof(int8_t) * 123);
2156
2157 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
2158 cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
2159 if (AR_NO_SPUR == cur_bb_spur)
2160 break;
2161 cur_bb_spur = cur_bb_spur - (chan->channel * 10);
2162 if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
2163 bb_spur = cur_bb_spur;
2164 break;
2165 }
2166 }
2167
2168 if (AR_NO_SPUR == bb_spur)
2169 return;
2170
2171 bin = bb_spur * 32;
2172
2173 tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
2174 new = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
2175 AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
2176 AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
2177 AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
2178
2179 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
2180
2181 new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
2182 AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
2183 AR_PHY_SPUR_REG_MASK_RATE_SELECT |
2184 AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
2185 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
2186 REG_WRITE(ah, AR_PHY_SPUR_REG, new);
2187
2188 spur_delta_phase = ((bb_spur * 524288) / 100) &
2189 AR_PHY_TIMING11_SPUR_DELTA_PHASE;
2190
2191 denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
2192 spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
2193
2194 new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
2195 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
2196 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
2197 REG_WRITE(ah, AR_PHY_TIMING11, new);
2198
2199 cur_bin = -6000;
2200 upper = bin + 100;
2201 lower = bin - 100;
2202
2203 for (i = 0; i < 4; i++) {
2204 int pilot_mask = 0;
2205 int chan_mask = 0;
2206 int bp = 0;
2207 for (bp = 0; bp < 30; bp++) {
2208 if ((cur_bin > lower) && (cur_bin < upper)) {
2209 pilot_mask = pilot_mask | 0x1 << bp;
2210 chan_mask = chan_mask | 0x1 << bp;
2211 }
2212 cur_bin += 100;
2213 }
2214 cur_bin += inc[i];
2215 REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
2216 REG_WRITE(ah, chan_mask_reg[i], chan_mask);
2217 }
2218
2219 cur_vit_mask = 6100;
2220 upper = bin + 120;
2221 lower = bin - 120;
2222
2223 for (i = 0; i < 123; i++) {
2224 if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
2225
2226 /* workaround for gcc bug #37014 */
2227 volatile int tmp_v = abs(cur_vit_mask - bin);
2228
2229 if (tmp_v < 75)
2230 mask_amt = 1;
2231 else
2232 mask_amt = 0;
2233 if (cur_vit_mask < 0)
2234 mask_m[abs(cur_vit_mask / 100)] = mask_amt;
2235 else
2236 mask_p[cur_vit_mask / 100] = mask_amt;
2237 }
2238 cur_vit_mask -= 100;
2239 }
2240
2241 tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
2242 | (mask_m[48] << 26) | (mask_m[49] << 24)
2243 | (mask_m[50] << 22) | (mask_m[51] << 20)
2244 | (mask_m[52] << 18) | (mask_m[53] << 16)
2245 | (mask_m[54] << 14) | (mask_m[55] << 12)
2246 | (mask_m[56] << 10) | (mask_m[57] << 8)
2247 | (mask_m[58] << 6) | (mask_m[59] << 4)
2248 | (mask_m[60] << 2) | (mask_m[61] << 0);
2249 REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
2250 REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
2251
2252 tmp_mask = (mask_m[31] << 28)
2253 | (mask_m[32] << 26) | (mask_m[33] << 24)
2254 | (mask_m[34] << 22) | (mask_m[35] << 20)
2255 | (mask_m[36] << 18) | (mask_m[37] << 16)
2256 | (mask_m[48] << 14) | (mask_m[39] << 12)
2257 | (mask_m[40] << 10) | (mask_m[41] << 8)
2258 | (mask_m[42] << 6) | (mask_m[43] << 4)
2259 | (mask_m[44] << 2) | (mask_m[45] << 0);
2260 REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
2261 REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
2262
2263 tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
2264 | (mask_m[18] << 26) | (mask_m[18] << 24)
2265 | (mask_m[20] << 22) | (mask_m[20] << 20)
2266 | (mask_m[22] << 18) | (mask_m[22] << 16)
2267 | (mask_m[24] << 14) | (mask_m[24] << 12)
2268 | (mask_m[25] << 10) | (mask_m[26] << 8)
2269 | (mask_m[27] << 6) | (mask_m[28] << 4)
2270 | (mask_m[29] << 2) | (mask_m[30] << 0);
2271 REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
2272 REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
2273
2274 tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
2275 | (mask_m[2] << 26) | (mask_m[3] << 24)
2276 | (mask_m[4] << 22) | (mask_m[5] << 20)
2277 | (mask_m[6] << 18) | (mask_m[7] << 16)
2278 | (mask_m[8] << 14) | (mask_m[9] << 12)
2279 | (mask_m[10] << 10) | (mask_m[11] << 8)
2280 | (mask_m[12] << 6) | (mask_m[13] << 4)
2281 | (mask_m[14] << 2) | (mask_m[15] << 0);
2282 REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
2283 REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
2284
2285 tmp_mask = (mask_p[15] << 28)
2286 | (mask_p[14] << 26) | (mask_p[13] << 24)
2287 | (mask_p[12] << 22) | (mask_p[11] << 20)
2288 | (mask_p[10] << 18) | (mask_p[9] << 16)
2289 | (mask_p[8] << 14) | (mask_p[7] << 12)
2290 | (mask_p[6] << 10) | (mask_p[5] << 8)
2291 | (mask_p[4] << 6) | (mask_p[3] << 4)
2292 | (mask_p[2] << 2) | (mask_p[1] << 0);
2293 REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
2294 REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
2295
2296 tmp_mask = (mask_p[30] << 28)
2297 | (mask_p[29] << 26) | (mask_p[28] << 24)
2298 | (mask_p[27] << 22) | (mask_p[26] << 20)
2299 | (mask_p[25] << 18) | (mask_p[24] << 16)
2300 | (mask_p[23] << 14) | (mask_p[22] << 12)
2301 | (mask_p[21] << 10) | (mask_p[20] << 8)
2302 | (mask_p[19] << 6) | (mask_p[18] << 4)
2303 | (mask_p[17] << 2) | (mask_p[16] << 0);
2304 REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
2305 REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
2306
2307 tmp_mask = (mask_p[45] << 28)
2308 | (mask_p[44] << 26) | (mask_p[43] << 24)
2309 | (mask_p[42] << 22) | (mask_p[41] << 20)
2310 | (mask_p[40] << 18) | (mask_p[39] << 16)
2311 | (mask_p[38] << 14) | (mask_p[37] << 12)
2312 | (mask_p[36] << 10) | (mask_p[35] << 8)
2313 | (mask_p[34] << 6) | (mask_p[33] << 4)
2314 | (mask_p[32] << 2) | (mask_p[31] << 0);
2315 REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
2316 REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
2317
2318 tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
2319 | (mask_p[59] << 26) | (mask_p[58] << 24)
2320 | (mask_p[57] << 22) | (mask_p[56] << 20)
2321 | (mask_p[55] << 18) | (mask_p[54] << 16)
2322 | (mask_p[53] << 14) | (mask_p[52] << 12)
2323 | (mask_p[51] << 10) | (mask_p[50] << 8)
2324 | (mask_p[49] << 6) | (mask_p[48] << 4)
2325 | (mask_p[47] << 2) | (mask_p[46] << 0);
2326 REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
2327 REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
2328}
2329
2330static void ath9k_enable_rfkill(struct ath_hw *ah) 1905static void ath9k_enable_rfkill(struct ath_hw *ah)
2331{ 1906{
2332 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, 1907 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL,
@@ -2342,17 +1917,16 @@ static void ath9k_enable_rfkill(struct ath_hw *ah)
2342int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, 1917int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2343 bool bChannelChange) 1918 bool bChannelChange)
2344{ 1919{
1920 struct ath_common *common = ath9k_hw_common(ah);
2345 u32 saveLedState; 1921 u32 saveLedState;
2346 struct ath_softc *sc = ah->ah_sc;
2347 struct ath9k_channel *curchan = ah->curchan; 1922 struct ath9k_channel *curchan = ah->curchan;
2348 u32 saveDefAntenna; 1923 u32 saveDefAntenna;
2349 u32 macStaId1; 1924 u32 macStaId1;
2350 u64 tsf = 0; 1925 u64 tsf = 0;
2351 int i, rx_chainmask, r; 1926 int i, rx_chainmask, r;
2352 1927
2353 ah->extprotspacing = sc->ht_extprotspacing; 1928 ah->txchainmask = common->tx_chainmask;
2354 ah->txchainmask = sc->tx_chainmask; 1929 ah->rxchainmask = common->rx_chainmask;
2355 ah->rxchainmask = sc->rx_chainmask;
2356 1930
2357 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) 1931 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
2358 return -EIO; 1932 return -EIO;
@@ -2369,7 +1943,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2369 !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) || 1943 !(AR_SREV_9280(ah) || IS_CHAN_A_5MHZ_SPACED(chan) ||
2370 IS_CHAN_A_5MHZ_SPACED(ah->curchan))) { 1944 IS_CHAN_A_5MHZ_SPACED(ah->curchan))) {
2371 1945
2372 if (ath9k_hw_channel_change(ah, chan, sc->tx_chan_width)) { 1946 if (ath9k_hw_channel_change(ah, chan)) {
2373 ath9k_hw_loadnf(ah, ah->curchan); 1947 ath9k_hw_loadnf(ah, ah->curchan);
2374 ath9k_hw_start_nfcal(ah); 1948 ath9k_hw_start_nfcal(ah);
2375 return 0; 1949 return 0;
@@ -2400,7 +1974,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2400 } 1974 }
2401 1975
2402 if (!ath9k_hw_chip_reset(ah, chan)) { 1976 if (!ath9k_hw_chip_reset(ah, chan)) {
2403 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Chip reset failed\n"); 1977 ath_print(common, ATH_DBG_FATAL, "Chip reset failed\n");
2404 return -EINVAL; 1978 return -EINVAL;
2405 } 1979 }
2406 1980
@@ -2429,7 +2003,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2429 REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3, 2003 REG_SET_BIT(ah, AR_MAC_PCU_ASYNC_FIFO_REG3,
2430 AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET); 2004 AR_MAC_PCU_ASYNC_FIFO_REG3_SOFT_RESET);
2431 } 2005 }
2432 r = ath9k_hw_process_ini(ah, chan, sc->tx_chan_width); 2006 r = ath9k_hw_process_ini(ah, chan);
2433 if (r) 2007 if (r)
2434 return r; 2008 return r;
2435 2009
@@ -2453,17 +2027,11 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2453 if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan)) 2027 if (IS_CHAN_OFDM(chan) || IS_CHAN_HT(chan))
2454 ath9k_hw_set_delta_slope(ah, chan); 2028 ath9k_hw_set_delta_slope(ah, chan);
2455 2029
2456 if (AR_SREV_9280_10_OR_LATER(ah)) 2030 ah->ath9k_hw_spur_mitigate_freq(ah, chan);
2457 ath9k_hw_9280_spur_mitigate(ah, chan);
2458 else
2459 ath9k_hw_spur_mitigate(ah, chan);
2460
2461 ah->eep_ops->set_board_values(ah, chan); 2031 ah->eep_ops->set_board_values(ah, chan);
2462 2032
2463 ath9k_hw_decrease_chain_power(ah, chan); 2033 REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
2464 2034 REG_WRITE(ah, AR_STA_ID1, get_unaligned_le16(common->macaddr + 4)
2465 REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(ah->macaddr));
2466 REG_WRITE(ah, AR_STA_ID1, get_unaligned_le16(ah->macaddr + 4)
2467 | macStaId1 2035 | macStaId1
2468 | AR_STA_ID1_RTS_USE_DEF 2036 | AR_STA_ID1_RTS_USE_DEF
2469 | (ah->config. 2037 | (ah->config.
@@ -2471,24 +2039,19 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2471 | ah->sta_id1_defaults); 2039 | ah->sta_id1_defaults);
2472 ath9k_hw_set_operating_mode(ah, ah->opmode); 2040 ath9k_hw_set_operating_mode(ah, ah->opmode);
2473 2041
2474 REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(sc->bssidmask)); 2042 ath_hw_setbssidmask(common);
2475 REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(sc->bssidmask + 4));
2476 2043
2477 REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna); 2044 REG_WRITE(ah, AR_DEF_ANTENNA, saveDefAntenna);
2478 2045
2479 REG_WRITE(ah, AR_BSS_ID0, get_unaligned_le32(sc->curbssid)); 2046 ath9k_hw_write_associd(ah);
2480 REG_WRITE(ah, AR_BSS_ID1, get_unaligned_le16(sc->curbssid + 4) |
2481 ((sc->curaid & 0x3fff) << AR_BSS_ID1_AID_S));
2482 2047
2483 REG_WRITE(ah, AR_ISR, ~0); 2048 REG_WRITE(ah, AR_ISR, ~0);
2484 2049
2485 REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); 2050 REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
2486 2051
2487 if (AR_SREV_9280_10_OR_LATER(ah)) 2052 r = ah->ath9k_hw_rf_set_freq(ah, chan);
2488 ath9k_hw_ar9280_set_channel(ah, chan); 2053 if (r)
2489 else 2054 return r;
2490 if (!(ath9k_hw_set_channel(ah, chan)))
2491 return -EIO;
2492 2055
2493 for (i = 0; i < AR_NUM_DCU; i++) 2056 for (i = 0; i < AR_NUM_DCU; i++)
2494 REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); 2057 REG_WRITE(ah, AR_DQCUMASK(i), 1 << i);
@@ -2503,7 +2066,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2503 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT) 2066 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
2504 ath9k_enable_rfkill(ah); 2067 ath9k_enable_rfkill(ah);
2505 2068
2506 ath9k_hw_init_user_settings(ah); 2069 ath9k_hw_init_global_settings(ah);
2507 2070
2508 if (AR_SREV_9287_12_OR_LATER(ah)) { 2071 if (AR_SREV_9287_12_OR_LATER(ah)) {
2509 REG_WRITE(ah, AR_D_GBL_IFS_SIFS, 2072 REG_WRITE(ah, AR_D_GBL_IFS_SIFS,
@@ -2533,7 +2096,7 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2533 2096
2534 REG_WRITE(ah, AR_OBS, 8); 2097 REG_WRITE(ah, AR_OBS, 8);
2535 2098
2536 if (ah->config.intr_mitigation) { 2099 if (ah->config.rx_intr_mitigation) {
2537 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500); 2100 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);
2538 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000); 2101 REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);
2539 } 2102 }
@@ -2558,13 +2121,13 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2558 u32 mask; 2121 u32 mask;
2559 mask = REG_READ(ah, AR_CFG); 2122 mask = REG_READ(ah, AR_CFG);
2560 if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) { 2123 if (mask & (AR_CFG_SWRB | AR_CFG_SWTB | AR_CFG_SWRG)) {
2561 DPRINTF(ah->ah_sc, ATH_DBG_RESET, 2124 ath_print(common, ATH_DBG_RESET,
2562 "CFG Byte Swap Set 0x%x\n", mask); 2125 "CFG Byte Swap Set 0x%x\n", mask);
2563 } else { 2126 } else {
2564 mask = 2127 mask =
2565 INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB; 2128 INIT_CONFIG_STATUS | AR_CFG_SWRB | AR_CFG_SWTB;
2566 REG_WRITE(ah, AR_CFG, mask); 2129 REG_WRITE(ah, AR_CFG, mask);
2567 DPRINTF(ah->ah_sc, ATH_DBG_RESET, 2130 ath_print(common, ATH_DBG_RESET,
2568 "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG)); 2131 "Setting CFG 0x%x\n", REG_READ(ah, AR_CFG));
2569 } 2132 }
2570 } else { 2133 } else {
@@ -2577,11 +2140,12 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
2577#endif 2140#endif
2578 } 2141 }
2579 2142
2580 if (ah->ah_sc->sc_flags & SC_OP_BTCOEX_ENABLED) 2143 if (ah->btcoex_hw.enabled)
2581 ath9k_hw_btcoex_enable(ah); 2144 ath9k_hw_btcoex_enable(ah);
2582 2145
2583 return 0; 2146 return 0;
2584} 2147}
2148EXPORT_SYMBOL(ath9k_hw_reset);
2585 2149
2586/************************/ 2150/************************/
2587/* Key Cache Management */ 2151/* Key Cache Management */
@@ -2592,8 +2156,8 @@ bool ath9k_hw_keyreset(struct ath_hw *ah, u16 entry)
2592 u32 keyType; 2156 u32 keyType;
2593 2157
2594 if (entry >= ah->caps.keycache_size) { 2158 if (entry >= ah->caps.keycache_size) {
2595 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 2159 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
2596 "keychache entry %u out of range\n", entry); 2160 "keychache entry %u out of range\n", entry);
2597 return false; 2161 return false;
2598 } 2162 }
2599 2163
@@ -2620,14 +2184,15 @@ bool ath9k_hw_keyreset(struct ath_hw *ah, u16 entry)
2620 2184
2621 return true; 2185 return true;
2622} 2186}
2187EXPORT_SYMBOL(ath9k_hw_keyreset);
2623 2188
2624bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac) 2189bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac)
2625{ 2190{
2626 u32 macHi, macLo; 2191 u32 macHi, macLo;
2627 2192
2628 if (entry >= ah->caps.keycache_size) { 2193 if (entry >= ah->caps.keycache_size) {
2629 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 2194 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
2630 "keychache entry %u out of range\n", entry); 2195 "keychache entry %u out of range\n", entry);
2631 return false; 2196 return false;
2632 } 2197 }
2633 2198
@@ -2648,18 +2213,20 @@ bool ath9k_hw_keysetmac(struct ath_hw *ah, u16 entry, const u8 *mac)
2648 2213
2649 return true; 2214 return true;
2650} 2215}
2216EXPORT_SYMBOL(ath9k_hw_keysetmac);
2651 2217
2652bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry, 2218bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2653 const struct ath9k_keyval *k, 2219 const struct ath9k_keyval *k,
2654 const u8 *mac) 2220 const u8 *mac)
2655{ 2221{
2656 const struct ath9k_hw_capabilities *pCap = &ah->caps; 2222 const struct ath9k_hw_capabilities *pCap = &ah->caps;
2223 struct ath_common *common = ath9k_hw_common(ah);
2657 u32 key0, key1, key2, key3, key4; 2224 u32 key0, key1, key2, key3, key4;
2658 u32 keyType; 2225 u32 keyType;
2659 2226
2660 if (entry >= pCap->keycache_size) { 2227 if (entry >= pCap->keycache_size) {
2661 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 2228 ath_print(common, ATH_DBG_FATAL,
2662 "keycache entry %u out of range\n", entry); 2229 "keycache entry %u out of range\n", entry);
2663 return false; 2230 return false;
2664 } 2231 }
2665 2232
@@ -2669,9 +2236,9 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2669 break; 2236 break;
2670 case ATH9K_CIPHER_AES_CCM: 2237 case ATH9K_CIPHER_AES_CCM:
2671 if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) { 2238 if (!(pCap->hw_caps & ATH9K_HW_CAP_CIPHER_AESCCM)) {
2672 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 2239 ath_print(common, ATH_DBG_ANY,
2673 "AES-CCM not supported by mac rev 0x%x\n", 2240 "AES-CCM not supported by mac rev 0x%x\n",
2674 ah->hw_version.macRev); 2241 ah->hw_version.macRev);
2675 return false; 2242 return false;
2676 } 2243 }
2677 keyType = AR_KEYTABLE_TYPE_CCM; 2244 keyType = AR_KEYTABLE_TYPE_CCM;
@@ -2680,15 +2247,15 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2680 keyType = AR_KEYTABLE_TYPE_TKIP; 2247 keyType = AR_KEYTABLE_TYPE_TKIP;
2681 if (ATH9K_IS_MIC_ENABLED(ah) 2248 if (ATH9K_IS_MIC_ENABLED(ah)
2682 && entry + 64 >= pCap->keycache_size) { 2249 && entry + 64 >= pCap->keycache_size) {
2683 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 2250 ath_print(common, ATH_DBG_ANY,
2684 "entry %u inappropriate for TKIP\n", entry); 2251 "entry %u inappropriate for TKIP\n", entry);
2685 return false; 2252 return false;
2686 } 2253 }
2687 break; 2254 break;
2688 case ATH9K_CIPHER_WEP: 2255 case ATH9K_CIPHER_WEP:
2689 if (k->kv_len < WLAN_KEY_LEN_WEP40) { 2256 if (k->kv_len < WLAN_KEY_LEN_WEP40) {
2690 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 2257 ath_print(common, ATH_DBG_ANY,
2691 "WEP key length %u too small\n", k->kv_len); 2258 "WEP key length %u too small\n", k->kv_len);
2692 return false; 2259 return false;
2693 } 2260 }
2694 if (k->kv_len <= WLAN_KEY_LEN_WEP40) 2261 if (k->kv_len <= WLAN_KEY_LEN_WEP40)
@@ -2702,8 +2269,8 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2702 keyType = AR_KEYTABLE_TYPE_CLR; 2269 keyType = AR_KEYTABLE_TYPE_CLR;
2703 break; 2270 break;
2704 default: 2271 default:
2705 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 2272 ath_print(common, ATH_DBG_FATAL,
2706 "cipher %u not supported\n", k->kv_type); 2273 "cipher %u not supported\n", k->kv_type);
2707 return false; 2274 return false;
2708 } 2275 }
2709 2276
@@ -2845,6 +2412,7 @@ bool ath9k_hw_set_keycache_entry(struct ath_hw *ah, u16 entry,
2845 2412
2846 return true; 2413 return true;
2847} 2414}
2415EXPORT_SYMBOL(ath9k_hw_set_keycache_entry);
2848 2416
2849bool ath9k_hw_keyisvalid(struct ath_hw *ah, u16 entry) 2417bool ath9k_hw_keyisvalid(struct ath_hw *ah, u16 entry)
2850{ 2418{
@@ -2855,6 +2423,7 @@ bool ath9k_hw_keyisvalid(struct ath_hw *ah, u16 entry)
2855 } 2423 }
2856 return false; 2424 return false;
2857} 2425}
2426EXPORT_SYMBOL(ath9k_hw_keyisvalid);
2858 2427
2859/******************************/ 2428/******************************/
2860/* Power Management (Chipset) */ 2429/* Power Management (Chipset) */
@@ -2869,8 +2438,9 @@ static void ath9k_set_power_sleep(struct ath_hw *ah, int setChip)
2869 if (!AR_SREV_9100(ah)) 2438 if (!AR_SREV_9100(ah))
2870 REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF); 2439 REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
2871 2440
2872 REG_CLR_BIT(ah, (AR_RTC_RESET), 2441 if(!AR_SREV_5416(ah))
2873 AR_RTC_RESET_EN); 2442 REG_CLR_BIT(ah, (AR_RTC_RESET),
2443 AR_RTC_RESET_EN);
2874 } 2444 }
2875} 2445}
2876 2446
@@ -2902,6 +2472,7 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
2902 ATH9K_RESET_POWER_ON) != true) { 2472 ATH9K_RESET_POWER_ON) != true) {
2903 return false; 2473 return false;
2904 } 2474 }
2475 ath9k_hw_init_pll(ah, NULL);
2905 } 2476 }
2906 if (AR_SREV_9100(ah)) 2477 if (AR_SREV_9100(ah))
2907 REG_SET_BIT(ah, AR_RTC_RESET, 2478 REG_SET_BIT(ah, AR_RTC_RESET,
@@ -2920,8 +2491,9 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
2920 AR_RTC_FORCE_WAKE_EN); 2491 AR_RTC_FORCE_WAKE_EN);
2921 } 2492 }
2922 if (i == 0) { 2493 if (i == 0) {
2923 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 2494 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
2924 "Failed to wakeup in %uus\n", POWER_UP_TIME / 20); 2495 "Failed to wakeup in %uus\n",
2496 POWER_UP_TIME / 20);
2925 return false; 2497 return false;
2926 } 2498 }
2927 } 2499 }
@@ -2931,9 +2503,9 @@ static bool ath9k_hw_set_power_awake(struct ath_hw *ah, int setChip)
2931 return true; 2503 return true;
2932} 2504}
2933 2505
2934static bool ath9k_hw_setpower_nolock(struct ath_hw *ah, 2506bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
2935 enum ath9k_power_mode mode)
2936{ 2507{
2508 struct ath_common *common = ath9k_hw_common(ah);
2937 int status = true, setChip = true; 2509 int status = true, setChip = true;
2938 static const char *modes[] = { 2510 static const char *modes[] = {
2939 "AWAKE", 2511 "AWAKE",
@@ -2945,8 +2517,8 @@ static bool ath9k_hw_setpower_nolock(struct ath_hw *ah,
2945 if (ah->power_mode == mode) 2517 if (ah->power_mode == mode)
2946 return status; 2518 return status;
2947 2519
2948 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "%s -> %s\n", 2520 ath_print(common, ATH_DBG_RESET, "%s -> %s\n",
2949 modes[ah->power_mode], modes[mode]); 2521 modes[ah->power_mode], modes[mode]);
2950 2522
2951 switch (mode) { 2523 switch (mode) {
2952 case ATH9K_PM_AWAKE: 2524 case ATH9K_PM_AWAKE:
@@ -2960,59 +2532,15 @@ static bool ath9k_hw_setpower_nolock(struct ath_hw *ah,
2960 ath9k_set_power_network_sleep(ah, setChip); 2532 ath9k_set_power_network_sleep(ah, setChip);
2961 break; 2533 break;
2962 default: 2534 default:
2963 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 2535 ath_print(common, ATH_DBG_FATAL,
2964 "Unknown power mode %u\n", mode); 2536 "Unknown power mode %u\n", mode);
2965 return false; 2537 return false;
2966 } 2538 }
2967 ah->power_mode = mode; 2539 ah->power_mode = mode;
2968 2540
2969 return status; 2541 return status;
2970} 2542}
2971 2543EXPORT_SYMBOL(ath9k_hw_setpower);
2972bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode)
2973{
2974 unsigned long flags;
2975 bool ret;
2976
2977 spin_lock_irqsave(&ah->ah_sc->sc_pm_lock, flags);
2978 ret = ath9k_hw_setpower_nolock(ah, mode);
2979 spin_unlock_irqrestore(&ah->ah_sc->sc_pm_lock, flags);
2980
2981 return ret;
2982}
2983
2984void ath9k_ps_wakeup(struct ath_softc *sc)
2985{
2986 unsigned long flags;
2987
2988 spin_lock_irqsave(&sc->sc_pm_lock, flags);
2989 if (++sc->ps_usecount != 1)
2990 goto unlock;
2991
2992 ath9k_hw_setpower_nolock(sc->sc_ah, ATH9K_PM_AWAKE);
2993
2994 unlock:
2995 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
2996}
2997
2998void ath9k_ps_restore(struct ath_softc *sc)
2999{
3000 unsigned long flags;
3001
3002 spin_lock_irqsave(&sc->sc_pm_lock, flags);
3003 if (--sc->ps_usecount != 0)
3004 goto unlock;
3005
3006 if (sc->ps_enabled &&
3007 !(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON |
3008 SC_OP_WAIT_FOR_CAB |
3009 SC_OP_WAIT_FOR_PSPOLL_DATA |
3010 SC_OP_WAIT_FOR_TX_ACK)))
3011 ath9k_hw_setpower_nolock(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
3012
3013 unlock:
3014 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
3015}
3016 2544
3017/* 2545/*
3018 * Helper for ASPM support. 2546 * Helper for ASPM support.
@@ -3145,6 +2673,7 @@ void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore, int power_off)
3145 } 2673 }
3146 } 2674 }
3147} 2675}
2676EXPORT_SYMBOL(ath9k_hw_configpcipowersave);
3148 2677
3149/**********************/ 2678/**********************/
3150/* Interrupt Handling */ 2679/* Interrupt Handling */
@@ -3168,6 +2697,7 @@ bool ath9k_hw_intrpend(struct ath_hw *ah)
3168 2697
3169 return false; 2698 return false;
3170} 2699}
2700EXPORT_SYMBOL(ath9k_hw_intrpend);
3171 2701
3172bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked) 2702bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3173{ 2703{
@@ -3176,6 +2706,7 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3176 struct ath9k_hw_capabilities *pCap = &ah->caps; 2706 struct ath9k_hw_capabilities *pCap = &ah->caps;
3177 u32 sync_cause = 0; 2707 u32 sync_cause = 0;
3178 bool fatal_int = false; 2708 bool fatal_int = false;
2709 struct ath_common *common = ath9k_hw_common(ah);
3179 2710
3180 if (!AR_SREV_9100(ah)) { 2711 if (!AR_SREV_9100(ah)) {
3181 if (REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) { 2712 if (REG_READ(ah, AR_INTR_ASYNC_CAUSE) & AR_INTR_MAC_IRQ) {
@@ -3225,7 +2756,7 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3225 2756
3226 *masked = isr & ATH9K_INT_COMMON; 2757 *masked = isr & ATH9K_INT_COMMON;
3227 2758
3228 if (ah->config.intr_mitigation) { 2759 if (ah->config.rx_intr_mitigation) {
3229 if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM)) 2760 if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM))
3230 *masked |= ATH9K_INT_RX; 2761 *masked |= ATH9K_INT_RX;
3231 } 2762 }
@@ -3249,8 +2780,8 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3249 } 2780 }
3250 2781
3251 if (isr & AR_ISR_RXORN) { 2782 if (isr & AR_ISR_RXORN) {
3252 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, 2783 ath_print(common, ATH_DBG_INTERRUPT,
3253 "receive FIFO overrun interrupt\n"); 2784 "receive FIFO overrun interrupt\n");
3254 } 2785 }
3255 2786
3256 if (!AR_SREV_9100(ah)) { 2787 if (!AR_SREV_9100(ah)) {
@@ -3292,25 +2823,25 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3292 2823
3293 if (fatal_int) { 2824 if (fatal_int) {
3294 if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) { 2825 if (sync_cause & AR_INTR_SYNC_HOST1_FATAL) {
3295 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 2826 ath_print(common, ATH_DBG_ANY,
3296 "received PCI FATAL interrupt\n"); 2827 "received PCI FATAL interrupt\n");
3297 } 2828 }
3298 if (sync_cause & AR_INTR_SYNC_HOST1_PERR) { 2829 if (sync_cause & AR_INTR_SYNC_HOST1_PERR) {
3299 DPRINTF(ah->ah_sc, ATH_DBG_ANY, 2830 ath_print(common, ATH_DBG_ANY,
3300 "received PCI PERR interrupt\n"); 2831 "received PCI PERR interrupt\n");
3301 } 2832 }
3302 *masked |= ATH9K_INT_FATAL; 2833 *masked |= ATH9K_INT_FATAL;
3303 } 2834 }
3304 if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) { 2835 if (sync_cause & AR_INTR_SYNC_RADM_CPL_TIMEOUT) {
3305 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, 2836 ath_print(common, ATH_DBG_INTERRUPT,
3306 "AR_INTR_SYNC_RADM_CPL_TIMEOUT\n"); 2837 "AR_INTR_SYNC_RADM_CPL_TIMEOUT\n");
3307 REG_WRITE(ah, AR_RC, AR_RC_HOSTIF); 2838 REG_WRITE(ah, AR_RC, AR_RC_HOSTIF);
3308 REG_WRITE(ah, AR_RC, 0); 2839 REG_WRITE(ah, AR_RC, 0);
3309 *masked |= ATH9K_INT_FATAL; 2840 *masked |= ATH9K_INT_FATAL;
3310 } 2841 }
3311 if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) { 2842 if (sync_cause & AR_INTR_SYNC_LOCAL_TIMEOUT) {
3312 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, 2843 ath_print(common, ATH_DBG_INTERRUPT,
3313 "AR_INTR_SYNC_LOCAL_TIMEOUT\n"); 2844 "AR_INTR_SYNC_LOCAL_TIMEOUT\n");
3314 } 2845 }
3315 2846
3316 REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause); 2847 REG_WRITE(ah, AR_INTR_SYNC_CAUSE_CLR, sync_cause);
@@ -3319,17 +2850,19 @@ bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked)
3319 2850
3320 return true; 2851 return true;
3321} 2852}
2853EXPORT_SYMBOL(ath9k_hw_getisr);
3322 2854
3323enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints) 2855enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
3324{ 2856{
3325 u32 omask = ah->mask_reg; 2857 u32 omask = ah->mask_reg;
3326 u32 mask, mask2; 2858 u32 mask, mask2;
3327 struct ath9k_hw_capabilities *pCap = &ah->caps; 2859 struct ath9k_hw_capabilities *pCap = &ah->caps;
2860 struct ath_common *common = ath9k_hw_common(ah);
3328 2861
3329 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints); 2862 ath_print(common, ATH_DBG_INTERRUPT, "0x%x => 0x%x\n", omask, ints);
3330 2863
3331 if (omask & ATH9K_INT_GLOBAL) { 2864 if (omask & ATH9K_INT_GLOBAL) {
3332 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "disable IER\n"); 2865 ath_print(common, ATH_DBG_INTERRUPT, "disable IER\n");
3333 REG_WRITE(ah, AR_IER, AR_IER_DISABLE); 2866 REG_WRITE(ah, AR_IER, AR_IER_DISABLE);
3334 (void) REG_READ(ah, AR_IER); 2867 (void) REG_READ(ah, AR_IER);
3335 if (!AR_SREV_9100(ah)) { 2868 if (!AR_SREV_9100(ah)) {
@@ -3356,7 +2889,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
3356 } 2889 }
3357 if (ints & ATH9K_INT_RX) { 2890 if (ints & ATH9K_INT_RX) {
3358 mask |= AR_IMR_RXERR; 2891 mask |= AR_IMR_RXERR;
3359 if (ah->config.intr_mitigation) 2892 if (ah->config.rx_intr_mitigation)
3360 mask |= AR_IMR_RXMINTR | AR_IMR_RXINTM; 2893 mask |= AR_IMR_RXMINTR | AR_IMR_RXINTM;
3361 else 2894 else
3362 mask |= AR_IMR_RXOK | AR_IMR_RXDESC; 2895 mask |= AR_IMR_RXOK | AR_IMR_RXDESC;
@@ -3386,7 +2919,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
3386 mask2 |= AR_IMR_S2_CST; 2919 mask2 |= AR_IMR_S2_CST;
3387 } 2920 }
3388 2921
3389 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask); 2922 ath_print(common, ATH_DBG_INTERRUPT, "new IMR 0x%x\n", mask);
3390 REG_WRITE(ah, AR_IMR, mask); 2923 REG_WRITE(ah, AR_IMR, mask);
3391 mask = REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM | 2924 mask = REG_READ(ah, AR_IMR_S2) & ~(AR_IMR_S2_TIM |
3392 AR_IMR_S2_DTIM | 2925 AR_IMR_S2_DTIM |
@@ -3406,7 +2939,7 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
3406 } 2939 }
3407 2940
3408 if (ints & ATH9K_INT_GLOBAL) { 2941 if (ints & ATH9K_INT_GLOBAL) {
3409 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "enable IER\n"); 2942 ath_print(common, ATH_DBG_INTERRUPT, "enable IER\n");
3410 REG_WRITE(ah, AR_IER, AR_IER_ENABLE); 2943 REG_WRITE(ah, AR_IER, AR_IER_ENABLE);
3411 if (!AR_SREV_9100(ah)) { 2944 if (!AR_SREV_9100(ah)) {
3412 REG_WRITE(ah, AR_INTR_ASYNC_ENABLE, 2945 REG_WRITE(ah, AR_INTR_ASYNC_ENABLE,
@@ -3419,12 +2952,13 @@ enum ath9k_int ath9k_hw_set_interrupts(struct ath_hw *ah, enum ath9k_int ints)
3419 REG_WRITE(ah, AR_INTR_SYNC_MASK, 2952 REG_WRITE(ah, AR_INTR_SYNC_MASK,
3420 AR_INTR_SYNC_DEFAULT); 2953 AR_INTR_SYNC_DEFAULT);
3421 } 2954 }
3422 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n", 2955 ath_print(common, ATH_DBG_INTERRUPT, "AR_IMR 0x%x IER 0x%x\n",
3423 REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER)); 2956 REG_READ(ah, AR_IMR), REG_READ(ah, AR_IER));
3424 } 2957 }
3425 2958
3426 return omask; 2959 return omask;
3427} 2960}
2961EXPORT_SYMBOL(ath9k_hw_set_interrupts);
3428 2962
3429/*******************/ 2963/*******************/
3430/* Beacon Handling */ 2964/* Beacon Handling */
@@ -3467,9 +3001,9 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
3467 AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN; 3001 AR_TBTT_TIMER_EN | AR_DBA_TIMER_EN | AR_SWBA_TIMER_EN;
3468 break; 3002 break;
3469 default: 3003 default:
3470 DPRINTF(ah->ah_sc, ATH_DBG_BEACON, 3004 ath_print(ath9k_hw_common(ah), ATH_DBG_BEACON,
3471 "%s: unsupported opmode: %d\n", 3005 "%s: unsupported opmode: %d\n",
3472 __func__, ah->opmode); 3006 __func__, ah->opmode);
3473 return; 3007 return;
3474 break; 3008 break;
3475 } 3009 }
@@ -3481,18 +3015,19 @@ void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period)
3481 3015
3482 beacon_period &= ~ATH9K_BEACON_ENA; 3016 beacon_period &= ~ATH9K_BEACON_ENA;
3483 if (beacon_period & ATH9K_BEACON_RESET_TSF) { 3017 if (beacon_period & ATH9K_BEACON_RESET_TSF) {
3484 beacon_period &= ~ATH9K_BEACON_RESET_TSF;
3485 ath9k_hw_reset_tsf(ah); 3018 ath9k_hw_reset_tsf(ah);
3486 } 3019 }
3487 3020
3488 REG_SET_BIT(ah, AR_TIMER_MODE, flags); 3021 REG_SET_BIT(ah, AR_TIMER_MODE, flags);
3489} 3022}
3023EXPORT_SYMBOL(ath9k_hw_beaconinit);
3490 3024
3491void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, 3025void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
3492 const struct ath9k_beacon_state *bs) 3026 const struct ath9k_beacon_state *bs)
3493{ 3027{
3494 u32 nextTbtt, beaconintval, dtimperiod, beacontimeout; 3028 u32 nextTbtt, beaconintval, dtimperiod, beacontimeout;
3495 struct ath9k_hw_capabilities *pCap = &ah->caps; 3029 struct ath9k_hw_capabilities *pCap = &ah->caps;
3030 struct ath_common *common = ath9k_hw_common(ah);
3496 3031
3497 REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt)); 3032 REG_WRITE(ah, AR_NEXT_TBTT_TIMER, TU_TO_USEC(bs->bs_nexttbtt));
3498 3033
@@ -3518,10 +3053,10 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
3518 else 3053 else
3519 nextTbtt = bs->bs_nexttbtt; 3054 nextTbtt = bs->bs_nexttbtt;
3520 3055
3521 DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim); 3056 ath_print(common, ATH_DBG_BEACON, "next DTIM %d\n", bs->bs_nextdtim);
3522 DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt); 3057 ath_print(common, ATH_DBG_BEACON, "next beacon %d\n", nextTbtt);
3523 DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "beacon period %d\n", beaconintval); 3058 ath_print(common, ATH_DBG_BEACON, "beacon period %d\n", beaconintval);
3524 DPRINTF(ah->ah_sc, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod); 3059 ath_print(common, ATH_DBG_BEACON, "DTIM period %d\n", dtimperiod);
3525 3060
3526 REG_WRITE(ah, AR_NEXT_DTIM, 3061 REG_WRITE(ah, AR_NEXT_DTIM,
3527 TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP)); 3062 TU_TO_USEC(bs->bs_nextdtim - SLEEP_SLOP));
@@ -3549,16 +3084,18 @@ void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
3549 /* TSF Out of Range Threshold */ 3084 /* TSF Out of Range Threshold */
3550 REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold); 3085 REG_WRITE(ah, AR_TSFOOR_THRESHOLD, bs->bs_tsfoor_threshold);
3551} 3086}
3087EXPORT_SYMBOL(ath9k_hw_set_sta_beacon_timers);
3552 3088
3553/*******************/ 3089/*******************/
3554/* HW Capabilities */ 3090/* HW Capabilities */
3555/*******************/ 3091/*******************/
3556 3092
3557void ath9k_hw_fill_cap_info(struct ath_hw *ah) 3093int ath9k_hw_fill_cap_info(struct ath_hw *ah)
3558{ 3094{
3559 struct ath9k_hw_capabilities *pCap = &ah->caps; 3095 struct ath9k_hw_capabilities *pCap = &ah->caps;
3560 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah); 3096 struct ath_regulatory *regulatory = ath9k_hw_regulatory(ah);
3561 struct ath_btcoex_info *btcoex_info = &ah->ah_sc->btcoex_info; 3097 struct ath_common *common = ath9k_hw_common(ah);
3098 struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
3562 3099
3563 u16 capField = 0, eeval; 3100 u16 capField = 0, eeval;
3564 3101
@@ -3579,11 +3116,17 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3579 regulatory->current_rd += 5; 3116 regulatory->current_rd += 5;
3580 else if (regulatory->current_rd == 0x41) 3117 else if (regulatory->current_rd == 0x41)
3581 regulatory->current_rd = 0x43; 3118 regulatory->current_rd = 0x43;
3582 DPRINTF(ah->ah_sc, ATH_DBG_REGULATORY, 3119 ath_print(common, ATH_DBG_REGULATORY,
3583 "regdomain mapped to 0x%x\n", regulatory->current_rd); 3120 "regdomain mapped to 0x%x\n", regulatory->current_rd);
3584 } 3121 }
3585 3122
3586 eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE); 3123 eeval = ah->eep_ops->get_eeprom(ah, EEP_OP_MODE);
3124 if ((eeval & (AR5416_OPFLAGS_11G | AR5416_OPFLAGS_11A)) == 0) {
3125 ath_print(common, ATH_DBG_FATAL,
3126 "no band has been marked as supported in EEPROM.\n");
3127 return -EINVAL;
3128 }
3129
3587 bitmap_zero(pCap->wireless_modes, ATH9K_MODE_MAX); 3130 bitmap_zero(pCap->wireless_modes, ATH9K_MODE_MAX);
3588 3131
3589 if (eeval & AR5416_OPFLAGS_11A) { 3132 if (eeval & AR5416_OPFLAGS_11A) {
@@ -3670,7 +3213,11 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3670 pCap->keycache_size = AR_KEYTABLE_SIZE; 3213 pCap->keycache_size = AR_KEYTABLE_SIZE;
3671 3214
3672 pCap->hw_caps |= ATH9K_HW_CAP_FASTCC; 3215 pCap->hw_caps |= ATH9K_HW_CAP_FASTCC;
3673 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD; 3216
3217 if (AR_SREV_9285(ah) || AR_SREV_9271(ah))
3218 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD >> 1;
3219 else
3220 pCap->tx_triglevel_max = MAX_TX_FIFO_THRESHOLD;
3674 3221
3675 if (AR_SREV_9285_10_OR_LATER(ah)) 3222 if (AR_SREV_9285_10_OR_LATER(ah))
3676 pCap->num_gpio_pins = AR9285_NUM_GPIO; 3223 pCap->num_gpio_pins = AR9285_NUM_GPIO;
@@ -3719,7 +3266,10 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3719 AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN; 3266 AR_EEPROM_EEREGCAP_EN_KK_U1_EVEN;
3720 } 3267 }
3721 3268
3722 pCap->reg_cap |= AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND; 3269 /* Advertise midband for AR5416 with FCC midband set in eeprom */
3270 if (regulatory->current_rd_ext & (1 << REG_EXT_FCC_MIDBAND) &&
3271 AR_SREV_5416(ah))
3272 pCap->reg_cap |= AR_EEPROM_EEREGCAP_EN_FCC_MIDBAND;
3723 3273
3724 pCap->num_antcfg_5ghz = 3274 pCap->num_antcfg_5ghz =
3725 ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_5GHZ); 3275 ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_5GHZ);
@@ -3727,19 +3277,21 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
3727 ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ); 3277 ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ);
3728 3278
3729 if (AR_SREV_9280_10_OR_LATER(ah) && 3279 if (AR_SREV_9280_10_OR_LATER(ah) &&
3730 ath_btcoex_supported(ah->hw_version.subsysid)) { 3280 ath9k_hw_btcoex_supported(ah)) {
3731 btcoex_info->btactive_gpio = ATH_BTACTIVE_GPIO; 3281 btcoex_hw->btactive_gpio = ATH_BTACTIVE_GPIO;
3732 btcoex_info->wlanactive_gpio = ATH_WLANACTIVE_GPIO; 3282 btcoex_hw->wlanactive_gpio = ATH_WLANACTIVE_GPIO;
3733 3283
3734 if (AR_SREV_9285(ah)) { 3284 if (AR_SREV_9285(ah)) {
3735 btcoex_info->btcoex_scheme = ATH_BTCOEX_CFG_3WIRE; 3285 btcoex_hw->scheme = ATH_BTCOEX_CFG_3WIRE;
3736 btcoex_info->btpriority_gpio = ATH_BTPRIORITY_GPIO; 3286 btcoex_hw->btpriority_gpio = ATH_BTPRIORITY_GPIO;
3737 } else { 3287 } else {
3738 btcoex_info->btcoex_scheme = ATH_BTCOEX_CFG_2WIRE; 3288 btcoex_hw->scheme = ATH_BTCOEX_CFG_2WIRE;
3739 } 3289 }
3740 } else { 3290 } else {
3741 btcoex_info->btcoex_scheme = ATH_BTCOEX_CFG_NONE; 3291 btcoex_hw->scheme = ATH_BTCOEX_CFG_NONE;
3742 } 3292 }
3293
3294 return 0;
3743} 3295}
3744 3296
3745bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, 3297bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
@@ -3812,6 +3364,7 @@ bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
3812 return false; 3364 return false;
3813 } 3365 }
3814} 3366}
3367EXPORT_SYMBOL(ath9k_hw_getcapability);
3815 3368
3816bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type, 3369bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
3817 u32 capability, u32 setting, int *status) 3370 u32 capability, u32 setting, int *status)
@@ -3845,6 +3398,7 @@ bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
3845 return false; 3398 return false;
3846 } 3399 }
3847} 3400}
3401EXPORT_SYMBOL(ath9k_hw_setcapability);
3848 3402
3849/****************************/ 3403/****************************/
3850/* GPIO / RFKILL / Antennae */ 3404/* GPIO / RFKILL / Antennae */
@@ -3882,7 +3436,7 @@ void ath9k_hw_cfg_gpio_input(struct ath_hw *ah, u32 gpio)
3882{ 3436{
3883 u32 gpio_shift; 3437 u32 gpio_shift;
3884 3438
3885 ASSERT(gpio < ah->caps.num_gpio_pins); 3439 BUG_ON(gpio >= ah->caps.num_gpio_pins);
3886 3440
3887 gpio_shift = gpio << 1; 3441 gpio_shift = gpio << 1;
3888 3442
@@ -3891,6 +3445,7 @@ void ath9k_hw_cfg_gpio_input(struct ath_hw *ah, u32 gpio)
3891 (AR_GPIO_OE_OUT_DRV_NO << gpio_shift), 3445 (AR_GPIO_OE_OUT_DRV_NO << gpio_shift),
3892 (AR_GPIO_OE_OUT_DRV << gpio_shift)); 3446 (AR_GPIO_OE_OUT_DRV << gpio_shift));
3893} 3447}
3448EXPORT_SYMBOL(ath9k_hw_cfg_gpio_input);
3894 3449
3895u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio) 3450u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio)
3896{ 3451{
@@ -3909,6 +3464,7 @@ u32 ath9k_hw_gpio_get(struct ath_hw *ah, u32 gpio)
3909 else 3464 else
3910 return MS_REG_READ(AR, gpio) != 0; 3465 return MS_REG_READ(AR, gpio) != 0;
3911} 3466}
3467EXPORT_SYMBOL(ath9k_hw_gpio_get);
3912 3468
3913void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio, 3469void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio,
3914 u32 ah_signal_type) 3470 u32 ah_signal_type)
@@ -3924,67 +3480,26 @@ void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio,
3924 (AR_GPIO_OE_OUT_DRV_ALL << gpio_shift), 3480 (AR_GPIO_OE_OUT_DRV_ALL << gpio_shift),
3925 (AR_GPIO_OE_OUT_DRV << gpio_shift)); 3481 (AR_GPIO_OE_OUT_DRV << gpio_shift));
3926} 3482}
3483EXPORT_SYMBOL(ath9k_hw_cfg_output);
3927 3484
3928void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val) 3485void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val)
3929{ 3486{
3930 REG_RMW(ah, AR_GPIO_IN_OUT, ((val & 1) << gpio), 3487 REG_RMW(ah, AR_GPIO_IN_OUT, ((val & 1) << gpio),
3931 AR_GPIO_BIT(gpio)); 3488 AR_GPIO_BIT(gpio));
3932} 3489}
3490EXPORT_SYMBOL(ath9k_hw_set_gpio);
3933 3491
3934u32 ath9k_hw_getdefantenna(struct ath_hw *ah) 3492u32 ath9k_hw_getdefantenna(struct ath_hw *ah)
3935{ 3493{
3936 return REG_READ(ah, AR_DEF_ANTENNA) & 0x7; 3494 return REG_READ(ah, AR_DEF_ANTENNA) & 0x7;
3937} 3495}
3496EXPORT_SYMBOL(ath9k_hw_getdefantenna);
3938 3497
3939void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna) 3498void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna)
3940{ 3499{
3941 REG_WRITE(ah, AR_DEF_ANTENNA, (antenna & 0x7)); 3500 REG_WRITE(ah, AR_DEF_ANTENNA, (antenna & 0x7));
3942} 3501}
3943 3502EXPORT_SYMBOL(ath9k_hw_setantenna);
3944bool ath9k_hw_setantennaswitch(struct ath_hw *ah,
3945 enum ath9k_ant_setting settings,
3946 struct ath9k_channel *chan,
3947 u8 *tx_chainmask,
3948 u8 *rx_chainmask,
3949 u8 *antenna_cfgd)
3950{
3951 static u8 tx_chainmask_cfg, rx_chainmask_cfg;
3952
3953 if (AR_SREV_9280(ah)) {
3954 if (!tx_chainmask_cfg) {
3955
3956 tx_chainmask_cfg = *tx_chainmask;
3957 rx_chainmask_cfg = *rx_chainmask;
3958 }
3959
3960 switch (settings) {
3961 case ATH9K_ANT_FIXED_A:
3962 *tx_chainmask = ATH9K_ANTENNA0_CHAINMASK;
3963 *rx_chainmask = ATH9K_ANTENNA0_CHAINMASK;
3964 *antenna_cfgd = true;
3965 break;
3966 case ATH9K_ANT_FIXED_B:
3967 if (ah->caps.tx_chainmask >
3968 ATH9K_ANTENNA1_CHAINMASK) {
3969 *tx_chainmask = ATH9K_ANTENNA1_CHAINMASK;
3970 }
3971 *rx_chainmask = ATH9K_ANTENNA1_CHAINMASK;
3972 *antenna_cfgd = true;
3973 break;
3974 case ATH9K_ANT_VARIABLE:
3975 *tx_chainmask = tx_chainmask_cfg;
3976 *rx_chainmask = rx_chainmask_cfg;
3977 *antenna_cfgd = true;
3978 break;
3979 default:
3980 break;
3981 }
3982 } else {
3983 ah->config.diversity_control = settings;
3984 }
3985
3986 return true;
3987}
3988 3503
3989/*********************/ 3504/*********************/
3990/* General Operation */ 3505/* General Operation */
@@ -4002,6 +3517,7 @@ u32 ath9k_hw_getrxfilter(struct ath_hw *ah)
4002 3517
4003 return bits; 3518 return bits;
4004} 3519}
3520EXPORT_SYMBOL(ath9k_hw_getrxfilter);
4005 3521
4006void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits) 3522void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
4007{ 3523{
@@ -4023,19 +3539,30 @@ void ath9k_hw_setrxfilter(struct ath_hw *ah, u32 bits)
4023 REG_WRITE(ah, AR_RXCFG, 3539 REG_WRITE(ah, AR_RXCFG,
4024 REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA); 3540 REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA);
4025} 3541}
3542EXPORT_SYMBOL(ath9k_hw_setrxfilter);
4026 3543
4027bool ath9k_hw_phy_disable(struct ath_hw *ah) 3544bool ath9k_hw_phy_disable(struct ath_hw *ah)
4028{ 3545{
4029 return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM); 3546 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_WARM))
3547 return false;
3548
3549 ath9k_hw_init_pll(ah, NULL);
3550 return true;
4030} 3551}
3552EXPORT_SYMBOL(ath9k_hw_phy_disable);
4031 3553
4032bool ath9k_hw_disable(struct ath_hw *ah) 3554bool ath9k_hw_disable(struct ath_hw *ah)
4033{ 3555{
4034 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) 3556 if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE))
4035 return false; 3557 return false;
4036 3558
4037 return ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD); 3559 if (!ath9k_hw_set_reset_reg(ah, ATH9K_RESET_COLD))
3560 return false;
3561
3562 ath9k_hw_init_pll(ah, NULL);
3563 return true;
4038} 3564}
3565EXPORT_SYMBOL(ath9k_hw_disable);
4039 3566
4040void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit) 3567void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit)
4041{ 3568{
@@ -4052,35 +3579,36 @@ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit)
4052 min((u32) MAX_RATE_POWER, 3579 min((u32) MAX_RATE_POWER,
4053 (u32) regulatory->power_limit)); 3580 (u32) regulatory->power_limit));
4054} 3581}
3582EXPORT_SYMBOL(ath9k_hw_set_txpowerlimit);
4055 3583
4056void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac) 3584void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac)
4057{ 3585{
4058 memcpy(ah->macaddr, mac, ETH_ALEN); 3586 memcpy(ath9k_hw_common(ah)->macaddr, mac, ETH_ALEN);
4059} 3587}
3588EXPORT_SYMBOL(ath9k_hw_setmac);
4060 3589
4061void ath9k_hw_setopmode(struct ath_hw *ah) 3590void ath9k_hw_setopmode(struct ath_hw *ah)
4062{ 3591{
4063 ath9k_hw_set_operating_mode(ah, ah->opmode); 3592 ath9k_hw_set_operating_mode(ah, ah->opmode);
4064} 3593}
3594EXPORT_SYMBOL(ath9k_hw_setopmode);
4065 3595
4066void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1) 3596void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1)
4067{ 3597{
4068 REG_WRITE(ah, AR_MCAST_FIL0, filter0); 3598 REG_WRITE(ah, AR_MCAST_FIL0, filter0);
4069 REG_WRITE(ah, AR_MCAST_FIL1, filter1); 3599 REG_WRITE(ah, AR_MCAST_FIL1, filter1);
4070} 3600}
3601EXPORT_SYMBOL(ath9k_hw_setmcastfilter);
4071 3602
4072void ath9k_hw_setbssidmask(struct ath_softc *sc) 3603void ath9k_hw_write_associd(struct ath_hw *ah)
4073{ 3604{
4074 REG_WRITE(sc->sc_ah, AR_BSSMSKL, get_unaligned_le32(sc->bssidmask)); 3605 struct ath_common *common = ath9k_hw_common(ah);
4075 REG_WRITE(sc->sc_ah, AR_BSSMSKU, get_unaligned_le16(sc->bssidmask + 4));
4076}
4077 3606
4078void ath9k_hw_write_associd(struct ath_softc *sc) 3607 REG_WRITE(ah, AR_BSS_ID0, get_unaligned_le32(common->curbssid));
4079{ 3608 REG_WRITE(ah, AR_BSS_ID1, get_unaligned_le16(common->curbssid + 4) |
4080 REG_WRITE(sc->sc_ah, AR_BSS_ID0, get_unaligned_le32(sc->curbssid)); 3609 ((common->curaid & 0x3fff) << AR_BSS_ID1_AID_S));
4081 REG_WRITE(sc->sc_ah, AR_BSS_ID1, get_unaligned_le16(sc->curbssid + 4) |
4082 ((sc->curaid & 0x3fff) << AR_BSS_ID1_AID_S));
4083} 3610}
3611EXPORT_SYMBOL(ath9k_hw_write_associd);
4084 3612
4085u64 ath9k_hw_gettsf64(struct ath_hw *ah) 3613u64 ath9k_hw_gettsf64(struct ath_hw *ah)
4086{ 3614{
@@ -4091,24 +3619,25 @@ u64 ath9k_hw_gettsf64(struct ath_hw *ah)
4091 3619
4092 return tsf; 3620 return tsf;
4093} 3621}
3622EXPORT_SYMBOL(ath9k_hw_gettsf64);
4094 3623
4095void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64) 3624void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64)
4096{ 3625{
4097 REG_WRITE(ah, AR_TSF_L32, tsf64 & 0xffffffff); 3626 REG_WRITE(ah, AR_TSF_L32, tsf64 & 0xffffffff);
4098 REG_WRITE(ah, AR_TSF_U32, (tsf64 >> 32) & 0xffffffff); 3627 REG_WRITE(ah, AR_TSF_U32, (tsf64 >> 32) & 0xffffffff);
4099} 3628}
3629EXPORT_SYMBOL(ath9k_hw_settsf64);
4100 3630
4101void ath9k_hw_reset_tsf(struct ath_hw *ah) 3631void ath9k_hw_reset_tsf(struct ath_hw *ah)
4102{ 3632{
4103 ath9k_ps_wakeup(ah->ah_sc);
4104 if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0, 3633 if (!ath9k_hw_wait(ah, AR_SLP32_MODE, AR_SLP32_TSF_WRITE_STATUS, 0,
4105 AH_TSF_WRITE_TIMEOUT)) 3634 AH_TSF_WRITE_TIMEOUT))
4106 DPRINTF(ah->ah_sc, ATH_DBG_RESET, 3635 ath_print(ath9k_hw_common(ah), ATH_DBG_RESET,
4107 "AR_SLP32_TSF_WRITE_STATUS limit exceeded\n"); 3636 "AR_SLP32_TSF_WRITE_STATUS limit exceeded\n");
4108 3637
4109 REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE); 3638 REG_WRITE(ah, AR_RESET_TSF, AR_RESET_TSF_ONCE);
4110 ath9k_ps_restore(ah->ah_sc);
4111} 3639}
3640EXPORT_SYMBOL(ath9k_hw_reset_tsf);
4112 3641
4113void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting) 3642void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
4114{ 3643{
@@ -4117,26 +3646,29 @@ void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting)
4117 else 3646 else
4118 ah->misc_mode &= ~AR_PCU_TX_ADD_TSF; 3647 ah->misc_mode &= ~AR_PCU_TX_ADD_TSF;
4119} 3648}
3649EXPORT_SYMBOL(ath9k_hw_set_tsfadjust);
4120 3650
4121bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us) 3651/*
3652 * Extend 15-bit time stamp from rx descriptor to
3653 * a full 64-bit TSF using the current h/w TSF.
3654*/
3655u64 ath9k_hw_extend_tsf(struct ath_hw *ah, u32 rstamp)
4122{ 3656{
4123 if (us < ATH9K_SLOT_TIME_9 || us > ath9k_hw_mac_to_usec(ah, 0xffff)) { 3657 u64 tsf;
4124 DPRINTF(ah->ah_sc, ATH_DBG_RESET, "bad slot time %u\n", us); 3658
4125 ah->slottime = (u32) -1; 3659 tsf = ath9k_hw_gettsf64(ah);
4126 return false; 3660 if ((tsf & 0x7fff) < rstamp)
4127 } else { 3661 tsf -= 0x8000;
4128 REG_WRITE(ah, AR_D_GBL_IFS_SLOT, ath9k_hw_mac_to_clks(ah, us)); 3662 return (tsf & ~0x7fff) | rstamp;
4129 ah->slottime = us;
4130 return true;
4131 }
4132} 3663}
3664EXPORT_SYMBOL(ath9k_hw_extend_tsf);
4133 3665
4134void ath9k_hw_set11nmac2040(struct ath_hw *ah, enum ath9k_ht_macmode mode) 3666void ath9k_hw_set11nmac2040(struct ath_hw *ah)
4135{ 3667{
3668 struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf;
4136 u32 macmode; 3669 u32 macmode;
4137 3670
4138 if (mode == ATH9K_HT_MACMODE_2040 && 3671 if (conf_is_ht40(conf) && !ah->config.cwm_ignore_extcca)
4139 !ah->config.cwm_ignore_extcca)
4140 macmode = AR_2040_JOINED_RX_CLEAR; 3672 macmode = AR_2040_JOINED_RX_CLEAR;
4141 else 3673 else
4142 macmode = 0; 3674 macmode = 0;
@@ -4193,6 +3725,7 @@ u32 ath9k_hw_gettsf32(struct ath_hw *ah)
4193{ 3725{
4194 return REG_READ(ah, AR_TSF_L32); 3726 return REG_READ(ah, AR_TSF_L32);
4195} 3727}
3728EXPORT_SYMBOL(ath9k_hw_gettsf32);
4196 3729
4197struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah, 3730struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
4198 void (*trigger)(void *), 3731 void (*trigger)(void *),
@@ -4206,8 +3739,9 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
4206 timer = kzalloc(sizeof(struct ath_gen_timer), GFP_KERNEL); 3739 timer = kzalloc(sizeof(struct ath_gen_timer), GFP_KERNEL);
4207 3740
4208 if (timer == NULL) { 3741 if (timer == NULL) {
4209 printk(KERN_DEBUG "Failed to allocate memory" 3742 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
4210 "for hw timer[%d]\n", timer_index); 3743 "Failed to allocate memory"
3744 "for hw timer[%d]\n", timer_index);
4211 return NULL; 3745 return NULL;
4212 } 3746 }
4213 3747
@@ -4220,10 +3754,12 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
4220 3754
4221 return timer; 3755 return timer;
4222} 3756}
3757EXPORT_SYMBOL(ath_gen_timer_alloc);
4223 3758
4224void ath_gen_timer_start(struct ath_hw *ah, 3759void ath9k_hw_gen_timer_start(struct ath_hw *ah,
4225 struct ath_gen_timer *timer, 3760 struct ath_gen_timer *timer,
4226 u32 timer_next, u32 timer_period) 3761 u32 timer_next,
3762 u32 timer_period)
4227{ 3763{
4228 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers; 3764 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
4229 u32 tsf; 3765 u32 tsf;
@@ -4234,8 +3770,9 @@ void ath_gen_timer_start(struct ath_hw *ah,
4234 3770
4235 tsf = ath9k_hw_gettsf32(ah); 3771 tsf = ath9k_hw_gettsf32(ah);
4236 3772
4237 DPRINTF(ah->ah_sc, ATH_DBG_HWTIMER, "curent tsf %x period %x" 3773 ath_print(ath9k_hw_common(ah), ATH_DBG_HWTIMER,
4238 "timer_next %x\n", tsf, timer_period, timer_next); 3774 "curent tsf %x period %x"
3775 "timer_next %x\n", tsf, timer_period, timer_next);
4239 3776
4240 /* 3777 /*
4241 * Pull timer_next forward if the current TSF already passed it 3778 * Pull timer_next forward if the current TSF already passed it
@@ -4258,15 +3795,10 @@ void ath_gen_timer_start(struct ath_hw *ah,
4258 REG_SET_BIT(ah, AR_IMR_S5, 3795 REG_SET_BIT(ah, AR_IMR_S5,
4259 (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) | 3796 (SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_THRESH) |
4260 SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG))); 3797 SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
4261
4262 if ((ah->ah_sc->imask & ATH9K_INT_GENTIMER) == 0) {
4263 ath9k_hw_set_interrupts(ah, 0);
4264 ah->ah_sc->imask |= ATH9K_INT_GENTIMER;
4265 ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
4266 }
4267} 3798}
3799EXPORT_SYMBOL(ath9k_hw_gen_timer_start);
4268 3800
4269void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer) 3801void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
4270{ 3802{
4271 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers; 3803 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
4272 3804
@@ -4285,14 +3817,8 @@ void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer)
4285 SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG))); 3817 SM(AR_GENTMR_BIT(timer->index), AR_IMR_S5_GENTIMER_TRIG)));
4286 3818
4287 clear_bit(timer->index, &timer_table->timer_mask.timer_bits); 3819 clear_bit(timer->index, &timer_table->timer_mask.timer_bits);
4288
4289 /* if no timer is enabled, turn off interrupt mask */
4290 if (timer_table->timer_mask.val == 0) {
4291 ath9k_hw_set_interrupts(ah, 0);
4292 ah->ah_sc->imask &= ~ATH9K_INT_GENTIMER;
4293 ath9k_hw_set_interrupts(ah, ah->ah_sc->imask);
4294 }
4295} 3820}
3821EXPORT_SYMBOL(ath9k_hw_gen_timer_stop);
4296 3822
4297void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer) 3823void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer)
4298{ 3824{
@@ -4302,6 +3828,7 @@ void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer)
4302 timer_table->timers[timer->index] = NULL; 3828 timer_table->timers[timer->index] = NULL;
4303 kfree(timer); 3829 kfree(timer);
4304} 3830}
3831EXPORT_SYMBOL(ath_gen_timer_free);
4305 3832
4306/* 3833/*
4307 * Generic Timer Interrupts handling 3834 * Generic Timer Interrupts handling
@@ -4310,6 +3837,7 @@ void ath_gen_timer_isr(struct ath_hw *ah)
4310{ 3837{
4311 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers; 3838 struct ath_gen_timer_table *timer_table = &ah->hw_gen_timers;
4312 struct ath_gen_timer *timer; 3839 struct ath_gen_timer *timer;
3840 struct ath_common *common = ath9k_hw_common(ah);
4313 u32 trigger_mask, thresh_mask, index; 3841 u32 trigger_mask, thresh_mask, index;
4314 3842
4315 /* get hardware generic timer interrupt status */ 3843 /* get hardware generic timer interrupt status */
@@ -4324,8 +3852,8 @@ void ath_gen_timer_isr(struct ath_hw *ah)
4324 index = rightmost_index(timer_table, &thresh_mask); 3852 index = rightmost_index(timer_table, &thresh_mask);
4325 timer = timer_table->timers[index]; 3853 timer = timer_table->timers[index];
4326 BUG_ON(!timer); 3854 BUG_ON(!timer);
4327 DPRINTF(ah->ah_sc, ATH_DBG_HWTIMER, 3855 ath_print(common, ATH_DBG_HWTIMER,
4328 "TSF overflow for Gen timer %d\n", index); 3856 "TSF overflow for Gen timer %d\n", index);
4329 timer->overflow(timer->arg); 3857 timer->overflow(timer->arg);
4330 } 3858 }
4331 3859
@@ -4333,21 +3861,95 @@ void ath_gen_timer_isr(struct ath_hw *ah)
4333 index = rightmost_index(timer_table, &trigger_mask); 3861 index = rightmost_index(timer_table, &trigger_mask);
4334 timer = timer_table->timers[index]; 3862 timer = timer_table->timers[index];
4335 BUG_ON(!timer); 3863 BUG_ON(!timer);
4336 DPRINTF(ah->ah_sc, ATH_DBG_HWTIMER, 3864 ath_print(common, ATH_DBG_HWTIMER,
4337 "Gen timer[%d] trigger\n", index); 3865 "Gen timer[%d] trigger\n", index);
4338 timer->trigger(timer->arg); 3866 timer->trigger(timer->arg);
4339 } 3867 }
4340} 3868}
3869EXPORT_SYMBOL(ath_gen_timer_isr);
3870
3871static struct {
3872 u32 version;
3873 const char * name;
3874} ath_mac_bb_names[] = {
3875 /* Devices with external radios */
3876 { AR_SREV_VERSION_5416_PCI, "5416" },
3877 { AR_SREV_VERSION_5416_PCIE, "5418" },
3878 { AR_SREV_VERSION_9100, "9100" },
3879 { AR_SREV_VERSION_9160, "9160" },
3880 /* Single-chip solutions */
3881 { AR_SREV_VERSION_9280, "9280" },
3882 { AR_SREV_VERSION_9285, "9285" },
3883 { AR_SREV_VERSION_9287, "9287" },
3884 { AR_SREV_VERSION_9271, "9271" },
3885};
3886
3887/* For devices with external radios */
3888static struct {
3889 u16 version;
3890 const char * name;
3891} ath_rf_names[] = {
3892 { 0, "5133" },
3893 { AR_RAD5133_SREV_MAJOR, "5133" },
3894 { AR_RAD5122_SREV_MAJOR, "5122" },
3895 { AR_RAD2133_SREV_MAJOR, "2133" },
3896 { AR_RAD2122_SREV_MAJOR, "2122" }
3897};
3898
3899/*
3900 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
3901 */
3902static const char *ath9k_hw_mac_bb_name(u32 mac_bb_version)
3903{
3904 int i;
3905
3906 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
3907 if (ath_mac_bb_names[i].version == mac_bb_version) {
3908 return ath_mac_bb_names[i].name;
3909 }
3910 }
3911
3912 return "????";
3913}
4341 3914
4342/* 3915/*
4343 * Primitive to disable ASPM 3916 * Return the RF name. "????" is returned if the RF is unknown.
3917 * Used for devices with external radios.
4344 */ 3918 */
4345void ath_pcie_aspm_disable(struct ath_softc *sc) 3919static const char *ath9k_hw_rf_name(u16 rf_version)
4346{ 3920{
4347 struct pci_dev *pdev = to_pci_dev(sc->dev); 3921 int i;
4348 u8 aspm; 3922
3923 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
3924 if (ath_rf_names[i].version == rf_version) {
3925 return ath_rf_names[i].name;
3926 }
3927 }
3928
3929 return "????";
3930}
3931
3932void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len)
3933{
3934 int used;
3935
3936 /* chipsets >= AR9280 are single-chip */
3937 if (AR_SREV_9280_10_OR_LATER(ah)) {
3938 used = snprintf(hw_name, len,
3939 "Atheros AR%s Rev:%x",
3940 ath9k_hw_mac_bb_name(ah->hw_version.macVersion),
3941 ah->hw_version.macRev);
3942 }
3943 else {
3944 used = snprintf(hw_name, len,
3945 "Atheros AR%s MAC/BB Rev:%x AR%s RF Rev:%x",
3946 ath9k_hw_mac_bb_name(ah->hw_version.macVersion),
3947 ah->hw_version.macRev,
3948 ath9k_hw_rf_name((ah->hw_version.analog5GhzRev &
3949 AR_RADIO_SREV_MAJOR)),
3950 ah->hw_version.phyRev);
3951 }
4349 3952
4350 pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm); 3953 hw_name[used] = '\0';
4351 aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1);
4352 pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
4353} 3954}
3955EXPORT_SYMBOL(ath9k_hw_name);
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index b89234571829..dbbf7ca5f97d 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -27,17 +27,25 @@
27#include "calib.h" 27#include "calib.h"
28#include "reg.h" 28#include "reg.h"
29#include "phy.h" 29#include "phy.h"
30#include "btcoex.h"
30 31
31#include "../regd.h" 32#include "../regd.h"
33#include "../debug.h"
32 34
33#define ATHEROS_VENDOR_ID 0x168c 35#define ATHEROS_VENDOR_ID 0x168c
36
34#define AR5416_DEVID_PCI 0x0023 37#define AR5416_DEVID_PCI 0x0023
35#define AR5416_DEVID_PCIE 0x0024 38#define AR5416_DEVID_PCIE 0x0024
36#define AR9160_DEVID_PCI 0x0027 39#define AR9160_DEVID_PCI 0x0027
37#define AR9280_DEVID_PCI 0x0029 40#define AR9280_DEVID_PCI 0x0029
38#define AR9280_DEVID_PCIE 0x002a 41#define AR9280_DEVID_PCIE 0x002a
39#define AR9285_DEVID_PCIE 0x002b 42#define AR9285_DEVID_PCIE 0x002b
43#define AR2427_DEVID_PCIE 0x002c
44
40#define AR5416_AR9100_DEVID 0x000b 45#define AR5416_AR9100_DEVID 0x000b
46
47#define AR9271_USB 0x9271
48
41#define AR_SUBVENDOR_ID_NOG 0x0e11 49#define AR_SUBVENDOR_ID_NOG 0x0e11
42#define AR_SUBVENDOR_ID_NEW_A 0x7065 50#define AR_SUBVENDOR_ID_NEW_A 0x7065
43#define AR5416_MAGIC 0x19641014 51#define AR5416_MAGIC 0x19641014
@@ -49,9 +57,18 @@
49#define AT9285_COEX3WIRE_SA_SUBSYSID 0x30aa 57#define AT9285_COEX3WIRE_SA_SUBSYSID 0x30aa
50#define AT9285_COEX3WIRE_DA_SUBSYSID 0x30ab 58#define AT9285_COEX3WIRE_DA_SUBSYSID 0x30ab
51 59
60#define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1)
61
62#define ATH_DEFAULT_NOISE_FLOOR -95
63
64#define ATH9K_RSSI_BAD -128
65
52/* Register read/write primitives */ 66/* Register read/write primitives */
53#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val)) 67#define REG_WRITE(_ah, _reg, _val) \
54#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg)) 68 ath9k_hw_common(_ah)->ops->write((_ah), (_val), (_reg))
69
70#define REG_READ(_ah, _reg) \
71 ath9k_hw_common(_ah)->ops->read((_ah), (_reg))
55 72
56#define SM(_v, _f) (((_v) << _f##_S) & _f) 73#define SM(_v, _f) (((_v) << _f##_S) & _f)
57#define MS(_v, _f) (((_v) & _f) >> _f##_S) 74#define MS(_v, _f) (((_v) & _f) >> _f##_S)
@@ -91,7 +108,7 @@
91#define AR_GPIO_BIT(_gpio) (1 << (_gpio)) 108#define AR_GPIO_BIT(_gpio) (1 << (_gpio))
92 109
93#define BASE_ACTIVATE_DELAY 100 110#define BASE_ACTIVATE_DELAY 100
94#define RTC_PLL_SETTLE_DELAY 1000 111#define RTC_PLL_SETTLE_DELAY 100
95#define COEF_SCALE_S 24 112#define COEF_SCALE_S 24
96#define HT40_CHANNEL_CENTER_SHIFT 10 113#define HT40_CHANNEL_CENTER_SHIFT 10
97 114
@@ -132,12 +149,6 @@ enum wireless_mode {
132 ATH9K_MODE_MAX, 149 ATH9K_MODE_MAX,
133}; 150};
134 151
135enum ath9k_ant_setting {
136 ATH9K_ANT_VARIABLE = 0,
137 ATH9K_ANT_FIXED_A,
138 ATH9K_ANT_FIXED_B
139};
140
141enum ath9k_hw_caps { 152enum ath9k_hw_caps {
142 ATH9K_HW_CAP_MIC_AESCCM = BIT(0), 153 ATH9K_HW_CAP_MIC_AESCCM = BIT(0),
143 ATH9K_HW_CAP_MIC_CKIP = BIT(1), 154 ATH9K_HW_CAP_MIC_CKIP = BIT(1),
@@ -201,10 +212,8 @@ struct ath9k_ops_config {
201 u32 cck_trig_high; 212 u32 cck_trig_high;
202 u32 cck_trig_low; 213 u32 cck_trig_low;
203 u32 enable_ani; 214 u32 enable_ani;
204 enum ath9k_ant_setting diversity_control;
205 u16 antenna_switch_swap;
206 int serialize_regmode; 215 int serialize_regmode;
207 bool intr_mitigation; 216 bool rx_intr_mitigation;
208#define SPUR_DISABLE 0 217#define SPUR_DISABLE 0
209#define SPUR_ENABLE_IOCTL 1 218#define SPUR_ENABLE_IOCTL 1
210#define SPUR_ENABLE_EEPROM 2 219#define SPUR_ENABLE_EEPROM 2
@@ -218,6 +227,7 @@ struct ath9k_ops_config {
218#define AR_SPUR_FEEQ_BOUND_HT20 10 227#define AR_SPUR_FEEQ_BOUND_HT20 10
219 int spurmode; 228 int spurmode;
220 u16 spurchans[AR_EEPROM_MODAL_SPURS][2]; 229 u16 spurchans[AR_EEPROM_MODAL_SPURS][2];
230 u8 max_txtrig_level;
221}; 231};
222 232
223enum ath9k_int { 233enum ath9k_int {
@@ -407,7 +417,7 @@ struct ath9k_hw_version {
407 * Using de Bruijin sequence to to look up 1's index in a 32 bit number 417 * Using de Bruijin sequence to to look up 1's index in a 32 bit number
408 * debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001 418 * debruijn32 = 0000 0111 0111 1100 1011 0101 0011 0001
409 */ 419 */
410#define debruijn32 0x077CB531UL 420#define debruijn32 0x077CB531U
411 421
412struct ath_gen_timer_configuration { 422struct ath_gen_timer_configuration {
413 u32 next_addr; 423 u32 next_addr;
@@ -433,7 +443,8 @@ struct ath_gen_timer_table {
433}; 443};
434 444
435struct ath_hw { 445struct ath_hw {
436 struct ath_softc *ah_sc; 446 struct ieee80211_hw *hw;
447 struct ath_common common;
437 struct ath9k_hw_version hw_version; 448 struct ath9k_hw_version hw_version;
438 struct ath9k_ops_config config; 449 struct ath9k_ops_config config;
439 struct ath9k_hw_capabilities caps; 450 struct ath9k_hw_capabilities caps;
@@ -450,7 +461,6 @@ struct ath_hw {
450 461
451 bool sw_mgmt_crypto; 462 bool sw_mgmt_crypto;
452 bool is_pciexpress; 463 bool is_pciexpress;
453 u8 macaddr[ETH_ALEN];
454 u16 tx_trig_level; 464 u16 tx_trig_level;
455 u16 rfsilent; 465 u16 rfsilent;
456 u32 rfkill_gpio; 466 u32 rfkill_gpio;
@@ -523,7 +533,14 @@ struct ath_hw {
523 DONT_USE_32KHZ, 533 DONT_USE_32KHZ,
524 } enable_32kHz_clock; 534 } enable_32kHz_clock;
525 535
526 /* RF */ 536 /* Callback for radio frequency change */
537 int (*ath9k_hw_rf_set_freq)(struct ath_hw *ah, struct ath9k_channel *chan);
538
539 /* Callback for baseband spur frequency */
540 void (*ath9k_hw_spur_mitigate_freq)(struct ath_hw *ah,
541 struct ath9k_channel *chan);
542
543 /* Used to program the radio on non single-chip devices */
527 u32 *analogBank0Data; 544 u32 *analogBank0Data;
528 u32 *analogBank1Data; 545 u32 *analogBank1Data;
529 u32 *analogBank2Data; 546 u32 *analogBank2Data;
@@ -535,12 +552,10 @@ struct ath_hw {
535 u32 *bank6Temp; 552 u32 *bank6Temp;
536 553
537 int16_t txpower_indexoffset; 554 int16_t txpower_indexoffset;
555 int coverage_class;
538 u32 beacon_interval; 556 u32 beacon_interval;
539 u32 slottime; 557 u32 slottime;
540 u32 acktimeout;
541 u32 ctstimeout;
542 u32 globaltxtimeout; 558 u32 globaltxtimeout;
543 u8 gbeacon_rate;
544 559
545 /* ANI */ 560 /* ANI */
546 u32 proc_phyerr; 561 u32 proc_phyerr;
@@ -553,8 +568,10 @@ struct ath_hw {
553 int firpwr[5]; 568 int firpwr[5];
554 enum ath9k_ani_cmd ani_function; 569 enum ath9k_ani_cmd ani_function;
555 570
571 /* Bluetooth coexistance */
572 struct ath_btcoex_hw btcoex_hw;
573
556 u32 intr_txqs; 574 u32 intr_txqs;
557 enum ath9k_ht_extprotspacing extprotspacing;
558 u8 txchainmask; 575 u8 txchainmask;
559 u8 rxchainmask; 576 u8 rxchainmask;
560 577
@@ -578,20 +595,32 @@ struct ath_hw {
578 struct ar5416IniArray iniModesAdditional; 595 struct ar5416IniArray iniModesAdditional;
579 struct ar5416IniArray iniModesRxGain; 596 struct ar5416IniArray iniModesRxGain;
580 struct ar5416IniArray iniModesTxGain; 597 struct ar5416IniArray iniModesTxGain;
598 struct ar5416IniArray iniModes_9271_1_0_only;
599 struct ar5416IniArray iniCckfirNormal;
600 struct ar5416IniArray iniCckfirJapan2484;
581 601
582 u32 intr_gen_timer_trigger; 602 u32 intr_gen_timer_trigger;
583 u32 intr_gen_timer_thresh; 603 u32 intr_gen_timer_thresh;
584 struct ath_gen_timer_table hw_gen_timers; 604 struct ath_gen_timer_table hw_gen_timers;
585}; 605};
586 606
607static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah)
608{
609 return &ah->common;
610}
611
612static inline struct ath_regulatory *ath9k_hw_regulatory(struct ath_hw *ah)
613{
614 return &(ath9k_hw_common(ah)->regulatory);
615}
616
587/* Initialization, Detach, Reset */ 617/* Initialization, Detach, Reset */
588const char *ath9k_hw_probe(u16 vendorid, u16 devid); 618const char *ath9k_hw_probe(u16 vendorid, u16 devid);
589void ath9k_hw_detach(struct ath_hw *ah); 619void ath9k_hw_deinit(struct ath_hw *ah);
590int ath9k_hw_init(struct ath_hw *ah); 620int ath9k_hw_init(struct ath_hw *ah);
591void ath9k_hw_rf_free(struct ath_hw *ah);
592int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, 621int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan,
593 bool bChannelChange); 622 bool bChannelChange);
594void ath9k_hw_fill_cap_info(struct ath_hw *ah); 623int ath9k_hw_fill_cap_info(struct ath_hw *ah);
595bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type, 624bool ath9k_hw_getcapability(struct ath_hw *ah, enum ath9k_capability_type type,
596 u32 capability, u32 *result); 625 u32 capability, u32 *result);
597bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type, 626bool ath9k_hw_setcapability(struct ath_hw *ah, enum ath9k_capability_type type,
@@ -613,18 +642,13 @@ void ath9k_hw_cfg_output(struct ath_hw *ah, u32 gpio,
613void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val); 642void ath9k_hw_set_gpio(struct ath_hw *ah, u32 gpio, u32 val);
614u32 ath9k_hw_getdefantenna(struct ath_hw *ah); 643u32 ath9k_hw_getdefantenna(struct ath_hw *ah);
615void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna); 644void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
616bool ath9k_hw_setantennaswitch(struct ath_hw *ah,
617 enum ath9k_ant_setting settings,
618 struct ath9k_channel *chan,
619 u8 *tx_chainmask, u8 *rx_chainmask,
620 u8 *antenna_cfgd);
621 645
622/* General Operation */ 646/* General Operation */
623bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout); 647bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
624u32 ath9k_hw_reverse_bits(u32 val, u32 n); 648u32 ath9k_hw_reverse_bits(u32 val, u32 n);
625bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high); 649bool ath9k_get_channel_edges(struct ath_hw *ah, u16 flags, u16 *low, u16 *high);
626u16 ath9k_hw_computetxtime(struct ath_hw *ah, 650u16 ath9k_hw_computetxtime(struct ath_hw *ah,
627 const struct ath_rate_table *rates, 651 u8 phy, int kbps,
628 u32 frameLen, u16 rateix, bool shortPreamble); 652 u32 frameLen, u16 rateix, bool shortPreamble);
629void ath9k_hw_get_channel_centers(struct ath_hw *ah, 653void ath9k_hw_get_channel_centers(struct ath_hw *ah,
630 struct ath9k_channel *chan, 654 struct ath9k_channel *chan,
@@ -637,19 +661,21 @@ void ath9k_hw_set_txpowerlimit(struct ath_hw *ah, u32 limit);
637void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac); 661void ath9k_hw_setmac(struct ath_hw *ah, const u8 *mac);
638void ath9k_hw_setopmode(struct ath_hw *ah); 662void ath9k_hw_setopmode(struct ath_hw *ah);
639void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1); 663void ath9k_hw_setmcastfilter(struct ath_hw *ah, u32 filter0, u32 filter1);
640void ath9k_hw_setbssidmask(struct ath_softc *sc); 664void ath9k_hw_setbssidmask(struct ath_hw *ah);
641void ath9k_hw_write_associd(struct ath_softc *sc); 665void ath9k_hw_write_associd(struct ath_hw *ah);
642u64 ath9k_hw_gettsf64(struct ath_hw *ah); 666u64 ath9k_hw_gettsf64(struct ath_hw *ah);
643void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64); 667void ath9k_hw_settsf64(struct ath_hw *ah, u64 tsf64);
644void ath9k_hw_reset_tsf(struct ath_hw *ah); 668void ath9k_hw_reset_tsf(struct ath_hw *ah);
645void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting); 669void ath9k_hw_set_tsfadjust(struct ath_hw *ah, u32 setting);
646bool ath9k_hw_setslottime(struct ath_hw *ah, u32 us); 670u64 ath9k_hw_extend_tsf(struct ath_hw *ah, u32 rstamp);
647void ath9k_hw_set11nmac2040(struct ath_hw *ah, enum ath9k_ht_macmode mode); 671void ath9k_hw_init_global_settings(struct ath_hw *ah);
672void ath9k_hw_set11nmac2040(struct ath_hw *ah);
648void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period); 673void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
649void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, 674void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
650 const struct ath9k_beacon_state *bs); 675 const struct ath9k_beacon_state *bs);
651bool ath9k_hw_setpower(struct ath_hw *ah, 676
652 enum ath9k_power_mode mode); 677bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode);
678
653void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore, int power_off); 679void ath9k_hw_configpcipowersave(struct ath_hw *ah, int restore, int power_off);
654 680
655/* Interrupt Handling */ 681/* Interrupt Handling */
@@ -663,16 +689,20 @@ struct ath_gen_timer *ath_gen_timer_alloc(struct ath_hw *ah,
663 void (*overflow)(void *), 689 void (*overflow)(void *),
664 void *arg, 690 void *arg,
665 u8 timer_index); 691 u8 timer_index);
666void ath_gen_timer_start(struct ath_hw *ah, struct ath_gen_timer *timer, 692void ath9k_hw_gen_timer_start(struct ath_hw *ah,
667 u32 timer_next, u32 timer_period); 693 struct ath_gen_timer *timer,
668void ath_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer); 694 u32 timer_next,
695 u32 timer_period);
696void ath9k_hw_gen_timer_stop(struct ath_hw *ah, struct ath_gen_timer *timer);
697
669void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer); 698void ath_gen_timer_free(struct ath_hw *ah, struct ath_gen_timer *timer);
670void ath_gen_timer_isr(struct ath_hw *hw); 699void ath_gen_timer_isr(struct ath_hw *hw);
671u32 ath9k_hw_gettsf32(struct ath_hw *ah); 700u32 ath9k_hw_gettsf32(struct ath_hw *ah);
672 701
702void ath9k_hw_name(struct ath_hw *ah, char *hw_name, size_t len);
703
673#define ATH_PCIE_CAP_LINK_CTRL 0x70 704#define ATH_PCIE_CAP_LINK_CTRL 0x70
674#define ATH_PCIE_CAP_LINK_L0S 1 705#define ATH_PCIE_CAP_LINK_L0S 1
675#define ATH_PCIE_CAP_LINK_L1 2 706#define ATH_PCIE_CAP_LINK_L1 2
676 707
677void ath_pcie_aspm_disable(struct ath_softc *sc);
678#endif 708#endif
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
new file mode 100644
index 000000000000..3d4d897add6d
--- /dev/null
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -0,0 +1,865 @@
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <linux/slab.h>
18
19#include "ath9k.h"
20
21static char *dev_info = "ath9k";
22
23MODULE_AUTHOR("Atheros Communications");
24MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
25MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
26MODULE_LICENSE("Dual BSD/GPL");
27
28static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
29module_param_named(debug, ath9k_debug, uint, 0);
30MODULE_PARM_DESC(debug, "Debugging mask");
31
32int modparam_nohwcrypt;
33module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
34MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
35
36/* We use the hw_value as an index into our private channel structure */
37
38#define CHAN2G(_freq, _idx) { \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
41 .max_power = 20, \
42}
43
44#define CHAN5G(_freq, _idx) { \
45 .band = IEEE80211_BAND_5GHZ, \
46 .center_freq = (_freq), \
47 .hw_value = (_idx), \
48 .max_power = 20, \
49}
50
51/* Some 2 GHz radios are actually tunable on 2312-2732
52 * on 5 MHz steps, we support the channels which we know
53 * we have calibration data for all cards though to make
54 * this static */
55static struct ieee80211_channel ath9k_2ghz_chantable[] = {
56 CHAN2G(2412, 0), /* Channel 1 */
57 CHAN2G(2417, 1), /* Channel 2 */
58 CHAN2G(2422, 2), /* Channel 3 */
59 CHAN2G(2427, 3), /* Channel 4 */
60 CHAN2G(2432, 4), /* Channel 5 */
61 CHAN2G(2437, 5), /* Channel 6 */
62 CHAN2G(2442, 6), /* Channel 7 */
63 CHAN2G(2447, 7), /* Channel 8 */
64 CHAN2G(2452, 8), /* Channel 9 */
65 CHAN2G(2457, 9), /* Channel 10 */
66 CHAN2G(2462, 10), /* Channel 11 */
67 CHAN2G(2467, 11), /* Channel 12 */
68 CHAN2G(2472, 12), /* Channel 13 */
69 CHAN2G(2484, 13), /* Channel 14 */
70};
71
72/* Some 5 GHz radios are actually tunable on XXXX-YYYY
73 * on 5 MHz steps, we support the channels which we know
74 * we have calibration data for all cards though to make
75 * this static */
76static struct ieee80211_channel ath9k_5ghz_chantable[] = {
77 /* _We_ call this UNII 1 */
78 CHAN5G(5180, 14), /* Channel 36 */
79 CHAN5G(5200, 15), /* Channel 40 */
80 CHAN5G(5220, 16), /* Channel 44 */
81 CHAN5G(5240, 17), /* Channel 48 */
82 /* _We_ call this UNII 2 */
83 CHAN5G(5260, 18), /* Channel 52 */
84 CHAN5G(5280, 19), /* Channel 56 */
85 CHAN5G(5300, 20), /* Channel 60 */
86 CHAN5G(5320, 21), /* Channel 64 */
87 /* _We_ call this "Middle band" */
88 CHAN5G(5500, 22), /* Channel 100 */
89 CHAN5G(5520, 23), /* Channel 104 */
90 CHAN5G(5540, 24), /* Channel 108 */
91 CHAN5G(5560, 25), /* Channel 112 */
92 CHAN5G(5580, 26), /* Channel 116 */
93 CHAN5G(5600, 27), /* Channel 120 */
94 CHAN5G(5620, 28), /* Channel 124 */
95 CHAN5G(5640, 29), /* Channel 128 */
96 CHAN5G(5660, 30), /* Channel 132 */
97 CHAN5G(5680, 31), /* Channel 136 */
98 CHAN5G(5700, 32), /* Channel 140 */
99 /* _We_ call this UNII 3 */
100 CHAN5G(5745, 33), /* Channel 149 */
101 CHAN5G(5765, 34), /* Channel 153 */
102 CHAN5G(5785, 35), /* Channel 157 */
103 CHAN5G(5805, 36), /* Channel 161 */
104 CHAN5G(5825, 37), /* Channel 165 */
105};
106
107/* Atheros hardware rate code addition for short premble */
108#define SHPCHECK(__hw_rate, __flags) \
109 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04 ) : 0)
110
111#define RATE(_bitrate, _hw_rate, _flags) { \
112 .bitrate = (_bitrate), \
113 .flags = (_flags), \
114 .hw_value = (_hw_rate), \
115 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
116}
117
118static struct ieee80211_rate ath9k_legacy_rates[] = {
119 RATE(10, 0x1b, 0),
120 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE),
121 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE),
122 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE),
123 RATE(60, 0x0b, 0),
124 RATE(90, 0x0f, 0),
125 RATE(120, 0x0a, 0),
126 RATE(180, 0x0e, 0),
127 RATE(240, 0x09, 0),
128 RATE(360, 0x0d, 0),
129 RATE(480, 0x08, 0),
130 RATE(540, 0x0c, 0),
131};
132
133static void ath9k_deinit_softc(struct ath_softc *sc);
134
135/*
136 * Read and write, they both share the same lock. We do this to serialize
137 * reads and writes on Atheros 802.11n PCI devices only. This is required
138 * as the FIFO on these devices can only accept sanely 2 requests.
139 */
140
141static void ath9k_iowrite32(void *hw_priv, u32 val, u32 reg_offset)
142{
143 struct ath_hw *ah = (struct ath_hw *) hw_priv;
144 struct ath_common *common = ath9k_hw_common(ah);
145 struct ath_softc *sc = (struct ath_softc *) common->priv;
146
147 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
148 unsigned long flags;
149 spin_lock_irqsave(&sc->sc_serial_rw, flags);
150 iowrite32(val, sc->mem + reg_offset);
151 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
152 } else
153 iowrite32(val, sc->mem + reg_offset);
154}
155
156static unsigned int ath9k_ioread32(void *hw_priv, u32 reg_offset)
157{
158 struct ath_hw *ah = (struct ath_hw *) hw_priv;
159 struct ath_common *common = ath9k_hw_common(ah);
160 struct ath_softc *sc = (struct ath_softc *) common->priv;
161 u32 val;
162
163 if (ah->config.serialize_regmode == SER_REG_MODE_ON) {
164 unsigned long flags;
165 spin_lock_irqsave(&sc->sc_serial_rw, flags);
166 val = ioread32(sc->mem + reg_offset);
167 spin_unlock_irqrestore(&sc->sc_serial_rw, flags);
168 } else
169 val = ioread32(sc->mem + reg_offset);
170 return val;
171}
172
173static const struct ath_ops ath9k_common_ops = {
174 .read = ath9k_ioread32,
175 .write = ath9k_iowrite32,
176};
177
178/**************************/
179/* Initialization */
180/**************************/
181
182static void setup_ht_cap(struct ath_softc *sc,
183 struct ieee80211_sta_ht_cap *ht_info)
184{
185 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
186 u8 tx_streams, rx_streams;
187
188 ht_info->ht_supported = true;
189 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
190 IEEE80211_HT_CAP_SM_PS |
191 IEEE80211_HT_CAP_SGI_40 |
192 IEEE80211_HT_CAP_DSSSCCK40;
193
194 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
195 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
196
197 /* set up supported mcs set */
198 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
199 tx_streams = !(common->tx_chainmask & (common->tx_chainmask - 1)) ?
200 1 : 2;
201 rx_streams = !(common->rx_chainmask & (common->rx_chainmask - 1)) ?
202 1 : 2;
203
204 if (tx_streams != rx_streams) {
205 ath_print(common, ATH_DBG_CONFIG,
206 "TX streams %d, RX streams: %d\n",
207 tx_streams, rx_streams);
208 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
209 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
210 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
211 }
212
213 ht_info->mcs.rx_mask[0] = 0xff;
214 if (rx_streams >= 2)
215 ht_info->mcs.rx_mask[1] = 0xff;
216
217 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
218}
219
220static int ath9k_reg_notifier(struct wiphy *wiphy,
221 struct regulatory_request *request)
222{
223 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
224 struct ath_wiphy *aphy = hw->priv;
225 struct ath_softc *sc = aphy->sc;
226 struct ath_regulatory *reg = ath9k_hw_regulatory(sc->sc_ah);
227
228 return ath_reg_notifier_apply(wiphy, request, reg);
229}
230
231/*
232 * This function will allocate both the DMA descriptor structure, and the
233 * buffers it contains. These are used to contain the descriptors used
234 * by the system.
235*/
236int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
237 struct list_head *head, const char *name,
238 int nbuf, int ndesc)
239{
240#define DS2PHYS(_dd, _ds) \
241 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
242#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
243#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
244 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
245 struct ath_desc *ds;
246 struct ath_buf *bf;
247 int i, bsize, error;
248
249 ath_print(common, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
250 name, nbuf, ndesc);
251
252 INIT_LIST_HEAD(head);
253 /* ath_desc must be a multiple of DWORDs */
254 if ((sizeof(struct ath_desc) % 4) != 0) {
255 ath_print(common, ATH_DBG_FATAL,
256 "ath_desc not DWORD aligned\n");
257 BUG_ON((sizeof(struct ath_desc) % 4) != 0);
258 error = -ENOMEM;
259 goto fail;
260 }
261
262 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
263
264 /*
265 * Need additional DMA memory because we can't use
266 * descriptors that cross the 4K page boundary. Assume
267 * one skipped descriptor per 4K page.
268 */
269 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
270 u32 ndesc_skipped =
271 ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len);
272 u32 dma_len;
273
274 while (ndesc_skipped) {
275 dma_len = ndesc_skipped * sizeof(struct ath_desc);
276 dd->dd_desc_len += dma_len;
277
278 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
279 };
280 }
281
282 /* allocate descriptors */
283 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
284 &dd->dd_desc_paddr, GFP_KERNEL);
285 if (dd->dd_desc == NULL) {
286 error = -ENOMEM;
287 goto fail;
288 }
289 ds = dd->dd_desc;
290 ath_print(common, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
291 name, ds, (u32) dd->dd_desc_len,
292 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
293
294 /* allocate buffers */
295 bsize = sizeof(struct ath_buf) * nbuf;
296 bf = kzalloc(bsize, GFP_KERNEL);
297 if (bf == NULL) {
298 error = -ENOMEM;
299 goto fail2;
300 }
301 dd->dd_bufptr = bf;
302
303 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
304 bf->bf_desc = ds;
305 bf->bf_daddr = DS2PHYS(dd, ds);
306
307 if (!(sc->sc_ah->caps.hw_caps &
308 ATH9K_HW_CAP_4KB_SPLITTRANS)) {
309 /*
310 * Skip descriptor addresses which can cause 4KB
311 * boundary crossing (addr + length) with a 32 dword
312 * descriptor fetch.
313 */
314 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
315 BUG_ON((caddr_t) bf->bf_desc >=
316 ((caddr_t) dd->dd_desc +
317 dd->dd_desc_len));
318
319 ds += ndesc;
320 bf->bf_desc = ds;
321 bf->bf_daddr = DS2PHYS(dd, ds);
322 }
323 }
324 list_add_tail(&bf->list, head);
325 }
326 return 0;
327fail2:
328 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
329 dd->dd_desc_paddr);
330fail:
331 memset(dd, 0, sizeof(*dd));
332 return error;
333#undef ATH_DESC_4KB_BOUND_CHECK
334#undef ATH_DESC_4KB_BOUND_NUM_SKIPPED
335#undef DS2PHYS
336}
337
338static void ath9k_init_crypto(struct ath_softc *sc)
339{
340 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
341 int i = 0;
342
343 /* Get the hardware key cache size. */
344 common->keymax = sc->sc_ah->caps.keycache_size;
345 if (common->keymax > ATH_KEYMAX) {
346 ath_print(common, ATH_DBG_ANY,
347 "Warning, using only %u entries in %u key cache\n",
348 ATH_KEYMAX, common->keymax);
349 common->keymax = ATH_KEYMAX;
350 }
351
352 /*
353 * Reset the key cache since some parts do not
354 * reset the contents on initial power up.
355 */
356 for (i = 0; i < common->keymax; i++)
357 ath9k_hw_keyreset(sc->sc_ah, (u16) i);
358
359 if (ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_CIPHER,
360 ATH9K_CIPHER_TKIP, NULL)) {
361 /*
362 * Whether we should enable h/w TKIP MIC.
363 * XXX: if we don't support WME TKIP MIC, then we wouldn't
364 * report WMM capable, so it's always safe to turn on
365 * TKIP MIC in this case.
366 */
367 ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC, 0, 1, NULL);
368 }
369
370 /*
371 * Check whether the separate key cache entries
372 * are required to handle both tx+rx MIC keys.
373 * With split mic keys the number of stations is limited
374 * to 27 otherwise 59.
375 */
376 if (ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_CIPHER,
377 ATH9K_CIPHER_TKIP, NULL)
378 && ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_CIPHER,
379 ATH9K_CIPHER_MIC, NULL)
380 && ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_TKIP_SPLIT,
381 0, NULL))
382 common->splitmic = 1;
383
384 /* turn on mcast key search if possible */
385 if (!ath9k_hw_getcapability(sc->sc_ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
386 (void)ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_MCAST_KEYSRCH,
387 1, 1, NULL);
388
389}
390
391static int ath9k_init_btcoex(struct ath_softc *sc)
392{
393 int r, qnum;
394
395 switch (sc->sc_ah->btcoex_hw.scheme) {
396 case ATH_BTCOEX_CFG_NONE:
397 break;
398 case ATH_BTCOEX_CFG_2WIRE:
399 ath9k_hw_btcoex_init_2wire(sc->sc_ah);
400 break;
401 case ATH_BTCOEX_CFG_3WIRE:
402 ath9k_hw_btcoex_init_3wire(sc->sc_ah);
403 r = ath_init_btcoex_timer(sc);
404 if (r)
405 return -1;
406 qnum = ath_tx_get_qnum(sc, ATH9K_TX_QUEUE_DATA, ATH9K_WME_AC_BE);
407 ath9k_hw_init_btcoex_hw(sc->sc_ah, qnum);
408 sc->btcoex.bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
409 break;
410 default:
411 WARN_ON(1);
412 break;
413 }
414
415 return 0;
416}
417
418static int ath9k_init_queues(struct ath_softc *sc)
419{
420 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
421 int i = 0;
422
423 for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
424 sc->tx.hwq_map[i] = -1;
425
426 sc->beacon.beaconq = ath9k_hw_beaconq_setup(sc->sc_ah);
427 if (sc->beacon.beaconq == -1) {
428 ath_print(common, ATH_DBG_FATAL,
429 "Unable to setup a beacon xmit queue\n");
430 goto err;
431 }
432
433 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
434 if (sc->beacon.cabq == NULL) {
435 ath_print(common, ATH_DBG_FATAL,
436 "Unable to setup CAB xmit queue\n");
437 goto err;
438 }
439
440 sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
441 ath_cabq_update(sc);
442
443 if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
444 ath_print(common, ATH_DBG_FATAL,
445 "Unable to setup xmit queue for BK traffic\n");
446 goto err;
447 }
448
449 if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
450 ath_print(common, ATH_DBG_FATAL,
451 "Unable to setup xmit queue for BE traffic\n");
452 goto err;
453 }
454 if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
455 ath_print(common, ATH_DBG_FATAL,
456 "Unable to setup xmit queue for VI traffic\n");
457 goto err;
458 }
459 if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
460 ath_print(common, ATH_DBG_FATAL,
461 "Unable to setup xmit queue for VO traffic\n");
462 goto err;
463 }
464
465 return 0;
466
467err:
468 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
469 if (ATH_TXQ_SETUP(sc, i))
470 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
471
472 return -EIO;
473}
474
475static void ath9k_init_channels_rates(struct ath_softc *sc)
476{
477 if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes)) {
478 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
479 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
480 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
481 ARRAY_SIZE(ath9k_2ghz_chantable);
482 sc->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
483 sc->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
484 ARRAY_SIZE(ath9k_legacy_rates);
485 }
486
487 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) {
488 sc->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_chantable;
489 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
490 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
491 ARRAY_SIZE(ath9k_5ghz_chantable);
492 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
493 ath9k_legacy_rates + 4;
494 sc->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
495 ARRAY_SIZE(ath9k_legacy_rates) - 4;
496 }
497}
498
499static void ath9k_init_misc(struct ath_softc *sc)
500{
501 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
502 int i = 0;
503
504 common->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
505 setup_timer(&common->ani.timer, ath_ani_calibrate, (unsigned long)sc);
506
507 sc->config.txpowlimit = ATH_TXPOWER_MAX;
508
509 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
510 sc->sc_flags |= SC_OP_TXAGGR;
511 sc->sc_flags |= SC_OP_RXAGGR;
512 }
513
514 common->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
515 common->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
516
517 ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
518 sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
519
520 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
521 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
522
523 sc->beacon.slottime = ATH9K_SLOT_TIME_9;
524
525 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
526 sc->beacon.bslot[i] = NULL;
527 sc->beacon.bslot_aphy[i] = NULL;
528 }
529}
530
531static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
532 const struct ath_bus_ops *bus_ops)
533{
534 struct ath_hw *ah = NULL;
535 struct ath_common *common;
536 int ret = 0, i;
537 int csz = 0;
538
539 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
540 if (!ah)
541 return -ENOMEM;
542
543 ah->hw_version.devid = devid;
544 ah->hw_version.subsysid = subsysid;
545 sc->sc_ah = ah;
546
547 common = ath9k_hw_common(ah);
548 common->ops = &ath9k_common_ops;
549 common->bus_ops = bus_ops;
550 common->ah = ah;
551 common->hw = sc->hw;
552 common->priv = sc;
553 common->debug_mask = ath9k_debug;
554
555 spin_lock_init(&sc->wiphy_lock);
556 spin_lock_init(&sc->sc_resetlock);
557 spin_lock_init(&sc->sc_serial_rw);
558 spin_lock_init(&sc->sc_pm_lock);
559 mutex_init(&sc->mutex);
560 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
561 tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
562 (unsigned long)sc);
563
564 /*
565 * Cache line size is used to size and align various
566 * structures used to communicate with the hardware.
567 */
568 ath_read_cachesize(common, &csz);
569 common->cachelsz = csz << 2; /* convert to bytes */
570
571 ret = ath9k_hw_init(ah);
572 if (ret) {
573 ath_print(common, ATH_DBG_FATAL,
574 "Unable to initialize hardware; "
575 "initialization status: %d\n", ret);
576 goto err_hw;
577 }
578
579 ret = ath9k_init_debug(ah);
580 if (ret) {
581 ath_print(common, ATH_DBG_FATAL,
582 "Unable to create debugfs files\n");
583 goto err_debug;
584 }
585
586 ret = ath9k_init_queues(sc);
587 if (ret)
588 goto err_queues;
589
590 ret = ath9k_init_btcoex(sc);
591 if (ret)
592 goto err_btcoex;
593
594 ath9k_init_crypto(sc);
595 ath9k_init_channels_rates(sc);
596 ath9k_init_misc(sc);
597
598 return 0;
599
600err_btcoex:
601 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
602 if (ATH_TXQ_SETUP(sc, i))
603 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
604err_queues:
605 ath9k_exit_debug(ah);
606err_debug:
607 ath9k_hw_deinit(ah);
608err_hw:
609 tasklet_kill(&sc->intr_tq);
610 tasklet_kill(&sc->bcon_tasklet);
611
612 kfree(ah);
613 sc->sc_ah = NULL;
614
615 return ret;
616}
617
618void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
619{
620 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
621
622 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
623 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
624 IEEE80211_HW_SIGNAL_DBM |
625 IEEE80211_HW_SUPPORTS_PS |
626 IEEE80211_HW_PS_NULLFUNC_STACK |
627 IEEE80211_HW_SPECTRUM_MGMT |
628 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
629
630 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
631 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
632
633 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt)
634 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
635
636 hw->wiphy->interface_modes =
637 BIT(NL80211_IFTYPE_AP) |
638 BIT(NL80211_IFTYPE_STATION) |
639 BIT(NL80211_IFTYPE_ADHOC) |
640 BIT(NL80211_IFTYPE_MESH_POINT);
641
642 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
643
644 hw->queues = 4;
645 hw->max_rates = 4;
646 hw->channel_change_time = 5000;
647 hw->max_listen_interval = 10;
648 hw->max_rate_tries = 10;
649 hw->sta_data_size = sizeof(struct ath_node);
650 hw->vif_data_size = sizeof(struct ath_vif);
651
652 hw->rate_control_algorithm = "ath9k_rate_control";
653
654 if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes))
655 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
656 &sc->sbands[IEEE80211_BAND_2GHZ];
657 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
658 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
659 &sc->sbands[IEEE80211_BAND_5GHZ];
660
661 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
662 if (test_bit(ATH9K_MODE_11G, sc->sc_ah->caps.wireless_modes))
663 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
664 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
665 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
666 }
667
668 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
669}
670
671int ath9k_init_device(u16 devid, struct ath_softc *sc, u16 subsysid,
672 const struct ath_bus_ops *bus_ops)
673{
674 struct ieee80211_hw *hw = sc->hw;
675 struct ath_common *common;
676 struct ath_hw *ah;
677 int error = 0;
678 struct ath_regulatory *reg;
679
680 /* Bring up device */
681 error = ath9k_init_softc(devid, sc, subsysid, bus_ops);
682 if (error != 0)
683 goto error_init;
684
685 ah = sc->sc_ah;
686 common = ath9k_hw_common(ah);
687 ath9k_set_hw_capab(sc, hw);
688
689 /* Initialize regulatory */
690 error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
691 ath9k_reg_notifier);
692 if (error)
693 goto error_regd;
694
695 reg = &common->regulatory;
696
697 /* Setup TX DMA */
698 error = ath_tx_init(sc, ATH_TXBUF);
699 if (error != 0)
700 goto error_tx;
701
702 /* Setup RX DMA */
703 error = ath_rx_init(sc, ATH_RXBUF);
704 if (error != 0)
705 goto error_rx;
706
707 /* Register with mac80211 */
708 error = ieee80211_register_hw(hw);
709 if (error)
710 goto error_register;
711
712 /* Handle world regulatory */
713 if (!ath_is_world_regd(reg)) {
714 error = regulatory_hint(hw->wiphy, reg->alpha2);
715 if (error)
716 goto error_world;
717 }
718
719 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
720 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
721 sc->wiphy_scheduler_int = msecs_to_jiffies(500);
722
723 ath_init_leds(sc);
724 ath_start_rfkill_poll(sc);
725
726 return 0;
727
728error_world:
729 ieee80211_unregister_hw(hw);
730error_register:
731 ath_rx_cleanup(sc);
732error_rx:
733 ath_tx_cleanup(sc);
734error_tx:
735 /* Nothing */
736error_regd:
737 ath9k_deinit_softc(sc);
738error_init:
739 return error;
740}
741
742/*****************************/
743/* De-Initialization */
744/*****************************/
745
746static void ath9k_deinit_softc(struct ath_softc *sc)
747{
748 int i = 0;
749
750 if ((sc->btcoex.no_stomp_timer) &&
751 sc->sc_ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
752 ath_gen_timer_free(sc->sc_ah, sc->btcoex.no_stomp_timer);
753
754 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
755 if (ATH_TXQ_SETUP(sc, i))
756 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
757
758 ath9k_exit_debug(sc->sc_ah);
759 ath9k_hw_deinit(sc->sc_ah);
760
761 tasklet_kill(&sc->intr_tq);
762 tasklet_kill(&sc->bcon_tasklet);
763}
764
765void ath9k_deinit_device(struct ath_softc *sc)
766{
767 struct ieee80211_hw *hw = sc->hw;
768 int i = 0;
769
770 ath9k_ps_wakeup(sc);
771
772 wiphy_rfkill_stop_polling(sc->hw->wiphy);
773 ath_deinit_leds(sc);
774
775 for (i = 0; i < sc->num_sec_wiphy; i++) {
776 struct ath_wiphy *aphy = sc->sec_wiphy[i];
777 if (aphy == NULL)
778 continue;
779 sc->sec_wiphy[i] = NULL;
780 ieee80211_unregister_hw(aphy->hw);
781 ieee80211_free_hw(aphy->hw);
782 }
783 kfree(sc->sec_wiphy);
784
785 ieee80211_unregister_hw(hw);
786 ath_rx_cleanup(sc);
787 ath_tx_cleanup(sc);
788 ath9k_deinit_softc(sc);
789}
790
791void ath_descdma_cleanup(struct ath_softc *sc,
792 struct ath_descdma *dd,
793 struct list_head *head)
794{
795 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
796 dd->dd_desc_paddr);
797
798 INIT_LIST_HEAD(head);
799 kfree(dd->dd_bufptr);
800 memset(dd, 0, sizeof(*dd));
801}
802
803/************************/
804/* Module Hooks */
805/************************/
806
807static int __init ath9k_init(void)
808{
809 int error;
810
811 /* Register rate control algorithm */
812 error = ath_rate_control_register();
813 if (error != 0) {
814 printk(KERN_ERR
815 "ath9k: Unable to register rate control "
816 "algorithm: %d\n",
817 error);
818 goto err_out;
819 }
820
821 error = ath9k_debug_create_root();
822 if (error) {
823 printk(KERN_ERR
824 "ath9k: Unable to create debugfs root: %d\n",
825 error);
826 goto err_rate_unregister;
827 }
828
829 error = ath_pci_init();
830 if (error < 0) {
831 printk(KERN_ERR
832 "ath9k: No PCI devices found, driver not installed.\n");
833 error = -ENODEV;
834 goto err_remove_root;
835 }
836
837 error = ath_ahb_init();
838 if (error < 0) {
839 error = -ENODEV;
840 goto err_pci_exit;
841 }
842
843 return 0;
844
845 err_pci_exit:
846 ath_pci_exit();
847
848 err_remove_root:
849 ath9k_debug_remove_root();
850 err_rate_unregister:
851 ath_rate_control_unregister();
852 err_out:
853 return error;
854}
855module_init(ath9k_init);
856
857static void __exit ath9k_exit(void)
858{
859 ath_ahb_exit();
860 ath_pci_exit();
861 ath9k_debug_remove_root();
862 ath_rate_control_unregister();
863 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
864}
865module_exit(ath9k_exit);
diff --git a/drivers/net/wireless/ath/ath9k/initvals.h b/drivers/net/wireless/ath/ath9k/initvals.h
index 8622265a030a..8a3bf3ab998d 100644
--- a/drivers/net/wireless/ath/ath9k/initvals.h
+++ b/drivers/net/wireless/ath/ath9k/initvals.h
@@ -21,6 +21,8 @@ static const u32 ar5416Modes[][6] = {
21 { 0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008 }, 21 { 0x000010f0, 0x0000a000, 0x00014000, 0x00016000, 0x0000b000, 0x00014008 },
22 { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0 }, 22 { 0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00, 0x06e006e0 },
23 { 0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf }, 23 { 0x0000801c, 0x128d93a7, 0x128d93cf, 0x12e013d7, 0x12e013ab, 0x098813cf },
24 { 0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810, 0x08f04810 },
25 { 0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a, 0x0000320a },
24 { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 }, 26 { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
25 { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 }, 27 { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
26 { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e }, 28 { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
@@ -31,11 +33,11 @@ static const u32 ar5416Modes[][6] = {
31 { 0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 }, 33 { 0x00009848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
32 { 0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 }, 34 { 0x0000a848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
33 { 0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 }, 35 { 0x0000b848, 0x001a6a65, 0x001a6a65, 0x00197a68, 0x00197a68, 0x00197a68 },
34 { 0x00009850, 0x6c48b4e0, 0x6c48b4e0, 0x6c48b0de, 0x6c48b0de, 0x6c48b0de }, 36 { 0x00009850, 0x6c48b4e0, 0x6d48b4e0, 0x6d48b0de, 0x6c48b0de, 0x6c48b0de },
35 { 0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e }, 37 { 0x00009858, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e, 0x7ec82d2e },
36 { 0x0000985c, 0x31395d5e, 0x31395d5e, 0x31395d5e, 0x31395d5e, 0x31395d5e }, 38 { 0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e, 0x31395d5e },
37 { 0x00009860, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18 }, 39 { 0x00009860, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18, 0x00049d18 },
38 { 0x0000c864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 }, 40 { 0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
39 { 0x00009868, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 }, 41 { 0x00009868, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190, 0x409a4190 },
40 { 0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 }, 42 { 0x0000986c, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081, 0x050cb081 },
41 { 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 }, 43 { 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 },
@@ -46,10 +48,10 @@ static const u32 ar5416Modes[][6] = {
46 { 0x0000a960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 }, 48 { 0x0000a960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 },
47 { 0x0000b960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 }, 49 { 0x0000b960, 0x00000900, 0x00000900, 0x00012d80, 0x00012d80, 0x00012d80 },
48 { 0x00009964, 0x00000000, 0x00000000, 0x00001120, 0x00001120, 0x00001120 }, 50 { 0x00009964, 0x00000000, 0x00000000, 0x00001120, 0x00001120, 0x00001120 },
49 { 0x0000c9bc, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00 }, 51 { 0x000099bc, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00, 0x001a0a00 },
50 { 0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be }, 52 { 0x000099c0, 0x038919be, 0x038919be, 0x038919be, 0x038919be, 0x038919be },
51 { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 }, 53 { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
52 { 0x000099c8, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c, 0x60f6532c }, 54 { 0x000099c8, 0x6af6532c, 0x6af6532c, 0x6af6532c, 0x6af6532c, 0x6af6532c },
53 { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 }, 55 { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
54 { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 }, 56 { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
55 { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, 57 { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
@@ -199,7 +201,6 @@ static const u32 ar5416Common[][2] = {
199 { 0x00008110, 0x00000168 }, 201 { 0x00008110, 0x00000168 },
200 { 0x00008118, 0x000100aa }, 202 { 0x00008118, 0x000100aa },
201 { 0x0000811c, 0x00003210 }, 203 { 0x0000811c, 0x00003210 },
202 { 0x00008120, 0x08f04800 },
203 { 0x00008124, 0x00000000 }, 204 { 0x00008124, 0x00000000 },
204 { 0x00008128, 0x00000000 }, 205 { 0x00008128, 0x00000000 },
205 { 0x0000812c, 0x00000000 }, 206 { 0x0000812c, 0x00000000 },
@@ -215,7 +216,6 @@ static const u32 ar5416Common[][2] = {
215 { 0x00008178, 0x00000100 }, 216 { 0x00008178, 0x00000100 },
216 { 0x0000817c, 0x00000000 }, 217 { 0x0000817c, 0x00000000 },
217 { 0x000081c4, 0x00000000 }, 218 { 0x000081c4, 0x00000000 },
218 { 0x000081d0, 0x00003210 },
219 { 0x000081ec, 0x00000000 }, 219 { 0x000081ec, 0x00000000 },
220 { 0x000081f0, 0x00000000 }, 220 { 0x000081f0, 0x00000000 },
221 { 0x000081f4, 0x00000000 }, 221 { 0x000081f4, 0x00000000 },
@@ -246,6 +246,7 @@ static const u32 ar5416Common[][2] = {
246 { 0x00008258, 0x00000000 }, 246 { 0x00008258, 0x00000000 },
247 { 0x0000825c, 0x400000ff }, 247 { 0x0000825c, 0x400000ff },
248 { 0x00008260, 0x00080922 }, 248 { 0x00008260, 0x00080922 },
249 { 0x00008264, 0xa8000010 },
249 { 0x00008270, 0x00000000 }, 250 { 0x00008270, 0x00000000 },
250 { 0x00008274, 0x40000000 }, 251 { 0x00008274, 0x40000000 },
251 { 0x00008278, 0x003e4180 }, 252 { 0x00008278, 0x003e4180 },
@@ -406,9 +407,9 @@ static const u32 ar5416Common[][2] = {
406 { 0x0000a25c, 0x0f0f0f01 }, 407 { 0x0000a25c, 0x0f0f0f01 },
407 { 0x0000a260, 0xdfa91f01 }, 408 { 0x0000a260, 0xdfa91f01 },
408 { 0x0000a268, 0x00000000 }, 409 { 0x0000a268, 0x00000000 },
409 { 0x0000a26c, 0x0ebae9c6 }, 410 { 0x0000a26c, 0x0e79e5c6 },
410 { 0x0000b26c, 0x0ebae9c6 }, 411 { 0x0000b26c, 0x0e79e5c6 },
411 { 0x0000c26c, 0x0ebae9c6 }, 412 { 0x0000c26c, 0x0e79e5c6 },
412 { 0x0000d270, 0x00820820 }, 413 { 0x0000d270, 0x00820820 },
413 { 0x0000a278, 0x1ce739ce }, 414 { 0x0000a278, 0x1ce739ce },
414 { 0x0000a27c, 0x051701ce }, 415 { 0x0000a27c, 0x051701ce },
@@ -2551,26 +2552,27 @@ static const u32 ar9280Modes_9280_2[][6] = {
2551 { 0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880 }, 2552 { 0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880 },
2552 { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 }, 2553 { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
2553 { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 }, 2554 { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
2554 { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e }, 2555 { 0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e },
2555 { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 }, 2556 { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
2556 { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e }, 2557 { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
2557 { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 }, 2558 { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
2558 { 0x00009840, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e, 0x206a012e }, 2559 { 0x00009840, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e, 0x206a012e },
2559 { 0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0 }, 2560 { 0x00009844, 0x0372161e, 0x0372161e, 0x037216a0, 0x037216a0, 0x037216a0 },
2560 { 0x00009850, 0x6c4000e2, 0x6c4000e2, 0x6d4000e2, 0x6c4000e2, 0x6c4000e2 }, 2561 { 0x00009850, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2, 0x6c4000e2 },
2561 { 0x00009858, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e }, 2562 { 0x00009858, 0x7ec88d2e, 0x7ec88d2e, 0x7ec84d2e, 0x7ec84d2e, 0x7ec84d2e },
2562 { 0x0000985c, 0x31395d5e, 0x31395d5e, 0x3139605e, 0x31395d5e, 0x31395d5e }, 2563 { 0x0000985c, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e, 0x31395d5e },
2563 { 0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18 }, 2564 { 0x00009860, 0x00048d18, 0x00048d18, 0x00048d20, 0x00048d20, 0x00048d18 },
2564 { 0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 }, 2565 { 0x00009864, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
2565 { 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 }, 2566 { 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 },
2566 { 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 }, 2567 { 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 },
2567 { 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 }, 2568 { 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 },
2568 { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 }, 2569 { 0x00009918, 0x0000000a, 0x00000014, 0x00000268, 0x0000000b, 0x00000016 },
2569 { 0x00009924, 0xd00a8a0b, 0xd00a8a0b, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d }, 2570 { 0x00009924, 0xd00a8a0b, 0xd00a8a0b, 0xd00a8a0d, 0xd00a8a0d, 0xd00a8a0d },
2570 { 0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010 }, 2571 { 0x00009944, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010, 0xffbc1010 },
2571 { 0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 }, 2572 { 0x00009960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 },
2572 { 0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 }, 2573 { 0x0000a960, 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 },
2573 { 0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210, 0x00000210 }, 2574 { 0x00009964, 0x00000210, 0x00000210, 0x00000210, 0x00000210, 0x00000210 },
2575 { 0x0000c968, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce, 0x000003ce },
2574 { 0x000099b8, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c }, 2576 { 0x000099b8, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c, 0x0000001c },
2575 { 0x000099bc, 0x00000a00, 0x00000a00, 0x00000c00, 0x00000c00, 0x00000c00 }, 2577 { 0x000099bc, 0x00000a00, 0x00000a00, 0x00000c00, 0x00000c00, 0x00000c00 },
2576 { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 }, 2578 { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 },
@@ -2585,8 +2587,10 @@ static const u32 ar9280Modes_9280_2[][6] = {
2585 { 0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019 }, 2587 { 0x0000b20c, 0x00000014, 0x00000014, 0x0001f019, 0x0001f019, 0x0001f019 },
2586 { 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a }, 2588 { 0x0000a21c, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a, 0x1883800a },
2587 { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 }, 2589 { 0x0000a230, 0x00000000, 0x00000000, 0x00000210, 0x00000108, 0x00000000 },
2590 { 0x0000a23c, 0x13c88000, 0x13c88000, 0x13c88001, 0x13c88000, 0x13c88000 },
2588 { 0x0000a250, 0x001ff000, 0x001ff000, 0x0004a000, 0x0004a000, 0x0004a000 }, 2591 { 0x0000a250, 0x001ff000, 0x001ff000, 0x0004a000, 0x0004a000, 0x0004a000 },
2589 { 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e }, 2592 { 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e },
2593 { 0x0000a388, 0x0c000000, 0x0c000000, 0x08000000, 0x0c000000, 0x0c000000 },
2590 { 0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, 2594 { 0x0000a3d8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
2591 { 0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000 }, 2595 { 0x00007894, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000, 0x5a508000 },
2592}; 2596};
@@ -2813,7 +2817,6 @@ static const u32 ar9280Common_9280_2[][2] = {
2813 { 0x00009958, 0x2108ecff }, 2817 { 0x00009958, 0x2108ecff },
2814 { 0x00009940, 0x14750604 }, 2818 { 0x00009940, 0x14750604 },
2815 { 0x0000c95c, 0x004b6a8e }, 2819 { 0x0000c95c, 0x004b6a8e },
2816 { 0x0000c968, 0x000003ce },
2817 { 0x00009970, 0x190fb515 }, 2820 { 0x00009970, 0x190fb515 },
2818 { 0x00009974, 0x00000000 }, 2821 { 0x00009974, 0x00000000 },
2819 { 0x00009978, 0x00000001 }, 2822 { 0x00009978, 0x00000001 },
@@ -2849,7 +2852,6 @@ static const u32 ar9280Common_9280_2[][2] = {
2849 { 0x0000a22c, 0x233f7180 }, 2852 { 0x0000a22c, 0x233f7180 },
2850 { 0x0000a234, 0x20202020 }, 2853 { 0x0000a234, 0x20202020 },
2851 { 0x0000a238, 0x20202020 }, 2854 { 0x0000a238, 0x20202020 },
2852 { 0x0000a23c, 0x13c88000 },
2853 { 0x0000a240, 0x38490a20 }, 2855 { 0x0000a240, 0x38490a20 },
2854 { 0x0000a244, 0x00007bb6 }, 2856 { 0x0000a244, 0x00007bb6 },
2855 { 0x0000a248, 0x0fff3ffc }, 2857 { 0x0000a248, 0x0fff3ffc },
@@ -2859,8 +2861,8 @@ static const u32 ar9280Common_9280_2[][2] = {
2859 { 0x0000a25c, 0x0f0f0f01 }, 2861 { 0x0000a25c, 0x0f0f0f01 },
2860 { 0x0000a260, 0xdfa91f01 }, 2862 { 0x0000a260, 0xdfa91f01 },
2861 { 0x0000a268, 0x00000000 }, 2863 { 0x0000a268, 0x00000000 },
2862 { 0x0000a26c, 0x0ebae9c6 }, 2864 { 0x0000a26c, 0x0e79e5c6 },
2863 { 0x0000b26c, 0x0ebae9c6 }, 2865 { 0x0000b26c, 0x0e79e5c6 },
2864 { 0x0000d270, 0x00820820 }, 2866 { 0x0000d270, 0x00820820 },
2865 { 0x0000a278, 0x1ce739ce }, 2867 { 0x0000a278, 0x1ce739ce },
2866 { 0x0000d35c, 0x07ffffef }, 2868 { 0x0000d35c, 0x07ffffef },
@@ -2874,7 +2876,6 @@ static const u32 ar9280Common_9280_2[][2] = {
2874 { 0x0000d37c, 0x7fffffe2 }, 2876 { 0x0000d37c, 0x7fffffe2 },
2875 { 0x0000d380, 0x7f3c7bba }, 2877 { 0x0000d380, 0x7f3c7bba },
2876 { 0x0000d384, 0xf3307ff0 }, 2878 { 0x0000d384, 0xf3307ff0 },
2877 { 0x0000a388, 0x0c000000 },
2878 { 0x0000a38c, 0x20202020 }, 2879 { 0x0000a38c, 0x20202020 },
2879 { 0x0000a390, 0x20202020 }, 2880 { 0x0000a390, 0x20202020 },
2880 { 0x0000a394, 0x1ce739ce }, 2881 { 0x0000a394, 0x1ce739ce },
@@ -2940,7 +2941,7 @@ static const u32 ar9280Modes_fast_clock_9280_2[][3] = {
2940 { 0x0000801c, 0x148ec02b, 0x148ec057 }, 2941 { 0x0000801c, 0x148ec02b, 0x148ec057 },
2941 { 0x00008318, 0x000044c0, 0x00008980 }, 2942 { 0x00008318, 0x000044c0, 0x00008980 },
2942 { 0x00009820, 0x02020200, 0x02020200 }, 2943 { 0x00009820, 0x02020200, 0x02020200 },
2943 { 0x00009824, 0x00000f0f, 0x00000f0f }, 2944 { 0x00009824, 0x01000f0f, 0x01000f0f },
2944 { 0x00009828, 0x0b020001, 0x0b020001 }, 2945 { 0x00009828, 0x0b020001, 0x0b020001 },
2945 { 0x00009834, 0x00000f0f, 0x00000f0f }, 2946 { 0x00009834, 0x00000f0f, 0x00000f0f },
2946 { 0x00009844, 0x03721821, 0x03721821 }, 2947 { 0x00009844, 0x03721821, 0x03721821 },
@@ -3348,6 +3349,8 @@ static const u32 ar9280Modes_backoff_13db_rxgain_9280_2[][6] = {
3348}; 3349};
3349 3350
3350static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = { 3351static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = {
3352 { 0x0000a274, 0x0a19e652, 0x0a19e652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 },
3353 { 0x0000a27c, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce },
3351 { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, 3354 { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
3352 { 0x0000a304, 0x00003002, 0x00003002, 0x00004002, 0x00004002, 0x00004002 }, 3355 { 0x0000a304, 0x00003002, 0x00003002, 0x00004002, 0x00004002, 0x00004002 },
3353 { 0x0000a308, 0x00006004, 0x00006004, 0x00007008, 0x00007008, 0x00007008 }, 3356 { 0x0000a308, 0x00006004, 0x00006004, 0x00007008, 0x00007008, 0x00007008 },
@@ -3376,11 +3379,11 @@ static const u32 ar9280Modes_high_power_tx_gain_9280_2[][6] = {
3376 { 0x00007840, 0x00172000, 0x00172000, 0x00172000, 0x00172000, 0x00172000 }, 3379 { 0x00007840, 0x00172000, 0x00172000, 0x00172000, 0x00172000, 0x00172000 },
3377 { 0x00007820, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480 }, 3380 { 0x00007820, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480 },
3378 { 0x00007844, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480 }, 3381 { 0x00007844, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480, 0xf258a480 },
3379 { 0x0000a274, 0x0a19e652, 0x0a19e652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 },
3380 { 0x0000a27c, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce, 0x050739ce },
3381}; 3382};
3382 3383
3383static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = { 3384static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = {
3385 { 0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 },
3386 { 0x0000a27c, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce },
3384 { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, 3387 { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
3385 { 0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002, 0x00003002 }, 3388 { 0x0000a304, 0x00003002, 0x00003002, 0x00003002, 0x00003002, 0x00003002 },
3386 { 0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009, 0x00008009 }, 3389 { 0x0000a308, 0x00006004, 0x00006004, 0x00008009, 0x00008009, 0x00008009 },
@@ -3409,8 +3412,6 @@ static const u32 ar9280Modes_original_tx_gain_9280_2[][6] = {
3409 { 0x00007840, 0x00392000, 0x00392000, 0x00392000, 0x00392000, 0x00392000 }, 3412 { 0x00007840, 0x00392000, 0x00392000, 0x00392000, 0x00392000, 0x00392000 },
3410 { 0x00007820, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480 }, 3413 { 0x00007820, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480 },
3411 { 0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480 }, 3414 { 0x00007844, 0x92592480, 0x92592480, 0x92592480, 0x92592480, 0x92592480 },
3412 { 0x0000a274, 0x0a19c652, 0x0a19c652, 0x0a1aa652, 0x0a1aa652, 0x0a1aa652 },
3413 { 0x0000a27c, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce, 0x050701ce },
3414}; 3415};
3415 3416
3416static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = { 3417static const u32 ar9280PciePhy_clkreq_off_L1_9280[][2] = {
@@ -5918,9 +5919,6 @@ static const u_int32_t ar9287Common_9287_1_1[][2] = {
5918 { 0x000099ec, 0x0cc80caa }, 5919 { 0x000099ec, 0x0cc80caa },
5919 { 0x000099f0, 0x00000000 }, 5920 { 0x000099f0, 0x00000000 },
5920 { 0x000099fc, 0x00001042 }, 5921 { 0x000099fc, 0x00001042 },
5921 { 0x0000a1f4, 0x00fffeff },
5922 { 0x0000a1f8, 0x00f5f9ff },
5923 { 0x0000a1fc, 0xb79f6427 },
5924 { 0x0000a208, 0x803e4788 }, 5922 { 0x0000a208, 0x803e4788 },
5925 { 0x0000a210, 0x4080a333 }, 5923 { 0x0000a210, 0x4080a333 },
5926 { 0x0000a214, 0x40206c10 }, 5924 { 0x0000a214, 0x40206c10 },
@@ -5980,7 +5978,7 @@ static const u_int32_t ar9287Common_9287_1_1[][2] = {
5980 { 0x0000b3f4, 0x00000000 }, 5978 { 0x0000b3f4, 0x00000000 },
5981 { 0x0000a7d8, 0x000003f1 }, 5979 { 0x0000a7d8, 0x000003f1 },
5982 { 0x00007800, 0x00000800 }, 5980 { 0x00007800, 0x00000800 },
5983 { 0x00007804, 0x6c35ffc2 }, 5981 { 0x00007804, 0x6c35ffd2 },
5984 { 0x00007808, 0x6db6c000 }, 5982 { 0x00007808, 0x6db6c000 },
5985 { 0x0000780c, 0x6db6cb30 }, 5983 { 0x0000780c, 0x6db6cb30 },
5986 { 0x00007810, 0x6db6cb6c }, 5984 { 0x00007810, 0x6db6cb6c },
@@ -6000,7 +5998,7 @@ static const u_int32_t ar9287Common_9287_1_1[][2] = {
6000 { 0x00007848, 0x934934a8 }, 5998 { 0x00007848, 0x934934a8 },
6001 { 0x00007850, 0x00000000 }, 5999 { 0x00007850, 0x00000000 },
6002 { 0x00007854, 0x00000800 }, 6000 { 0x00007854, 0x00000800 },
6003 { 0x00007858, 0x6c35ffc2 }, 6001 { 0x00007858, 0x6c35ffd2 },
6004 { 0x0000785c, 0x6db6c000 }, 6002 { 0x0000785c, 0x6db6c000 },
6005 { 0x00007860, 0x6db6cb30 }, 6003 { 0x00007860, 0x6db6cb30 },
6006 { 0x00007864, 0x6db6cb6c }, 6004 { 0x00007864, 0x6db6cb6c },
@@ -6027,6 +6025,22 @@ static const u_int32_t ar9287Common_9287_1_1[][2] = {
6027 { 0x000078b8, 0x2a850160 }, 6025 { 0x000078b8, 0x2a850160 },
6028}; 6026};
6029 6027
6028/*
6029 * For Japanese regulatory requirements, 2484 MHz requires the following three
6030 * registers be programmed differently from the channel between 2412 and 2472 MHz.
6031 */
6032static const u_int32_t ar9287Common_normal_cck_fir_coeff_92871_1[][2] = {
6033 { 0x0000a1f4, 0x00fffeff },
6034 { 0x0000a1f8, 0x00f5f9ff },
6035 { 0x0000a1fc, 0xb79f6427 },
6036};
6037
6038static const u_int32_t ar9287Common_japan_2484_cck_fir_coeff_92871_1[][2] = {
6039 { 0x0000a1f4, 0x00000000 },
6040 { 0x0000a1f8, 0xefff0301 },
6041 { 0x0000a1fc, 0xca9228ee },
6042};
6043
6030static const u_int32_t ar9287Modes_tx_gain_9287_1_1[][6] = { 6044static const u_int32_t ar9287Modes_tx_gain_9287_1_1[][6] = {
6031 /* Address 5G-HT20 5G-HT40 2G-HT40 2G-HT20 Turbo */ 6045 /* Address 5G-HT20 5G-HT40 2G-HT40 2G-HT20 Turbo */
6032 { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, 6046 { 0x0000a300, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
@@ -6365,8 +6379,8 @@ static const u_int32_t ar9287PciePhy_clkreq_off_L1_9287_1_1[][2] = {
6365}; 6379};
6366 6380
6367 6381
6368/* AR9271 initialization values automaticaly created: 03/23/09 */ 6382/* AR9271 initialization values automaticaly created: 06/04/09 */
6369static const u_int32_t ar9271Modes_9271_1_0[][6] = { 6383static const u_int32_t ar9271Modes_9271[][6] = {
6370 { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 }, 6384 { 0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160, 0x000001e0 },
6371 { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 }, 6385 { 0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c, 0x000001e0 },
6372 { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 }, 6386 { 0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38, 0x00001180 },
@@ -6376,8 +6390,8 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
6376 { 0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880 }, 6390 { 0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440, 0x00006880 },
6377 { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 }, 6391 { 0x00009804, 0x00000300, 0x000003c4, 0x000003c4, 0x00000300, 0x00000303 },
6378 { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 }, 6392 { 0x00009820, 0x02020200, 0x02020200, 0x02020200, 0x02020200, 0x02020200 },
6379 { 0x00009824, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e }, 6393 { 0x00009824, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e },
6380 { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 }, 6394 { 0x00009828, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001, 0x3a020001 },
6381 { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e }, 6395 { 0x00009834, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e },
6382 { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 }, 6396 { 0x00009838, 0x00000007, 0x00000007, 0x00000007, 0x00000007, 0x00000007 },
6383 { 0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e }, 6397 { 0x00009840, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e, 0x206a012e },
@@ -6391,6 +6405,7 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
6391 { 0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00, 0x0001ce00 }, 6405 { 0x00009864, 0x0000fe00, 0x0000fe00, 0x0001ce00, 0x0001ce00, 0x0001ce00 },
6392 { 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 }, 6406 { 0x00009868, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0 },
6393 { 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 }, 6407 { 0x0000986c, 0x06903081, 0x06903081, 0x06903881, 0x06903881, 0x06903881 },
6408 { 0x00009910, 0x30002310, 0x30002310, 0x30002310, 0x30002310, 0x30002310 },
6394 { 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 }, 6409 { 0x00009914, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898, 0x000007d0 },
6395 { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 }, 6410 { 0x00009918, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b, 0x00000016 },
6396 { 0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d }, 6411 { 0x00009924, 0xd00a8007, 0xd00a8007, 0xd00a800d, 0xd00a800d, 0xd00a800d },
@@ -6401,7 +6416,7 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
6401 { 0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00 }, 6416 { 0x000099bc, 0x00000600, 0x00000600, 0x00000c00, 0x00000c00, 0x00000c00 },
6402 { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 }, 6417 { 0x000099c0, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4 },
6403 { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 }, 6418 { 0x000099c4, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77, 0x06336f77 },
6404 { 0x000099c8, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329, 0x6af65329 }, 6419 { 0x000099c8, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f, 0x6af6532f },
6405 { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 }, 6420 { 0x000099cc, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8, 0x08f186c8 },
6406 { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 }, 6421 { 0x000099d0, 0x00046384, 0x00046384, 0x00046384, 0x00046384, 0x00046384 },
6407 { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, 6422 { 0x000099d4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },
@@ -6690,7 +6705,7 @@ static const u_int32_t ar9271Modes_9271_1_0[][6] = {
6690 { 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e }, 6705 { 0x0000a358, 0x7999aa02, 0x7999aa02, 0x7999aa0e, 0x7999aa0e, 0x7999aa0e },
6691}; 6706};
6692 6707
6693static const u_int32_t ar9271Common_9271_1_0[][2] = { 6708static const u_int32_t ar9271Common_9271[][2] = {
6694 { 0x0000000c, 0x00000000 }, 6709 { 0x0000000c, 0x00000000 },
6695 { 0x00000030, 0x00020045 }, 6710 { 0x00000030, 0x00020045 },
6696 { 0x00000034, 0x00000005 }, 6711 { 0x00000034, 0x00000005 },
@@ -6786,7 +6801,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
6786 { 0x0000803c, 0x00000000 }, 6801 { 0x0000803c, 0x00000000 },
6787 { 0x00008048, 0x00000000 }, 6802 { 0x00008048, 0x00000000 },
6788 { 0x00008054, 0x00000000 }, 6803 { 0x00008054, 0x00000000 },
6789 { 0x00008058, 0x02000000 }, 6804 { 0x00008058, 0x00000000 },
6790 { 0x0000805c, 0x000fc78f }, 6805 { 0x0000805c, 0x000fc78f },
6791 { 0x00008060, 0x0000000f }, 6806 { 0x00008060, 0x0000000f },
6792 { 0x00008064, 0x00000000 }, 6807 { 0x00008064, 0x00000000 },
@@ -6817,7 +6832,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
6817 { 0x00008110, 0x00000168 }, 6832 { 0x00008110, 0x00000168 },
6818 { 0x00008118, 0x000100aa }, 6833 { 0x00008118, 0x000100aa },
6819 { 0x0000811c, 0x00003210 }, 6834 { 0x0000811c, 0x00003210 },
6820 { 0x00008120, 0x08f04814 }, 6835 { 0x00008120, 0x08f04810 },
6821 { 0x00008124, 0x00000000 }, 6836 { 0x00008124, 0x00000000 },
6822 { 0x00008128, 0x00000000 }, 6837 { 0x00008128, 0x00000000 },
6823 { 0x0000812c, 0x00000000 }, 6838 { 0x0000812c, 0x00000000 },
@@ -6864,7 +6879,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
6864 { 0x00008258, 0x00000000 }, 6879 { 0x00008258, 0x00000000 },
6865 { 0x0000825c, 0x400000ff }, 6880 { 0x0000825c, 0x400000ff },
6866 { 0x00008260, 0x00080922 }, 6881 { 0x00008260, 0x00080922 },
6867 { 0x00008264, 0xa8a00010 }, 6882 { 0x00008264, 0x88a00010 },
6868 { 0x00008270, 0x00000000 }, 6883 { 0x00008270, 0x00000000 },
6869 { 0x00008274, 0x40000000 }, 6884 { 0x00008274, 0x40000000 },
6870 { 0x00008278, 0x003e4180 }, 6885 { 0x00008278, 0x003e4180 },
@@ -6896,7 +6911,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
6896 { 0x00007814, 0x924934a8 }, 6911 { 0x00007814, 0x924934a8 },
6897 { 0x0000781c, 0x00000000 }, 6912 { 0x0000781c, 0x00000000 },
6898 { 0x00007820, 0x00000c04 }, 6913 { 0x00007820, 0x00000c04 },
6899 { 0x00007824, 0x00d86bff }, 6914 { 0x00007824, 0x00d8abff },
6900 { 0x00007828, 0x66964300 }, 6915 { 0x00007828, 0x66964300 },
6901 { 0x0000782c, 0x8db6d961 }, 6916 { 0x0000782c, 0x8db6d961 },
6902 { 0x00007830, 0x8db6d96c }, 6917 { 0x00007830, 0x8db6d96c },
@@ -6930,7 +6945,6 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
6930 { 0x00009904, 0x00000000 }, 6945 { 0x00009904, 0x00000000 },
6931 { 0x00009908, 0x00000000 }, 6946 { 0x00009908, 0x00000000 },
6932 { 0x0000990c, 0x00000000 }, 6947 { 0x0000990c, 0x00000000 },
6933 { 0x00009910, 0x30002310 },
6934 { 0x0000991c, 0x10000fff }, 6948 { 0x0000991c, 0x10000fff },
6935 { 0x00009920, 0x04900000 }, 6949 { 0x00009920, 0x04900000 },
6936 { 0x00009928, 0x00000001 }, 6950 { 0x00009928, 0x00000001 },
@@ -6944,7 +6958,7 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
6944 { 0x00009954, 0x5f3ca3de }, 6958 { 0x00009954, 0x5f3ca3de },
6945 { 0x00009958, 0x0108ecff }, 6959 { 0x00009958, 0x0108ecff },
6946 { 0x00009968, 0x000003ce }, 6960 { 0x00009968, 0x000003ce },
6947 { 0x00009970, 0x192bb515 }, 6961 { 0x00009970, 0x192bb514 },
6948 { 0x00009974, 0x00000000 }, 6962 { 0x00009974, 0x00000000 },
6949 { 0x00009978, 0x00000001 }, 6963 { 0x00009978, 0x00000001 },
6950 { 0x0000997c, 0x00000000 }, 6964 { 0x0000997c, 0x00000000 },
@@ -7031,3 +7045,8 @@ static const u_int32_t ar9271Common_9271_1_0[][2] = {
7031 { 0x0000d380, 0x7f3c7bba }, 7045 { 0x0000d380, 0x7f3c7bba },
7032 { 0x0000d384, 0xf3307ff0 }, 7046 { 0x0000d384, 0xf3307ff0 },
7033}; 7047};
7048
7049static const u_int32_t ar9271Modes_9271_1_0_only[][6] = {
7050 { 0x00009910, 0x30002311, 0x30002311, 0x30002311, 0x30002311, 0x30002311 },
7051 { 0x00009828, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001, 0x0a020001 },
7052};
diff --git a/drivers/net/wireless/ath/ath9k/mac.c b/drivers/net/wireless/ath/ath9k/mac.c
index 800bfab94635..efc420cd42bf 100644
--- a/drivers/net/wireless/ath/ath9k/mac.c
+++ b/drivers/net/wireless/ath/ath9k/mac.c
@@ -14,16 +14,16 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17#include "hw.h"
18 18
19static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah, 19static void ath9k_hw_set_txq_interrupts(struct ath_hw *ah,
20 struct ath9k_tx_queue_info *qi) 20 struct ath9k_tx_queue_info *qi)
21{ 21{
22 DPRINTF(ah->ah_sc, ATH_DBG_INTERRUPT, 22 ath_print(ath9k_hw_common(ah), ATH_DBG_INTERRUPT,
23 "tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n", 23 "tx ok 0x%x err 0x%x desc 0x%x eol 0x%x urn 0x%x\n",
24 ah->txok_interrupt_mask, ah->txerr_interrupt_mask, 24 ah->txok_interrupt_mask, ah->txerr_interrupt_mask,
25 ah->txdesc_interrupt_mask, ah->txeol_interrupt_mask, 25 ah->txdesc_interrupt_mask, ah->txeol_interrupt_mask,
26 ah->txurn_interrupt_mask); 26 ah->txurn_interrupt_mask);
27 27
28 REG_WRITE(ah, AR_IMR_S0, 28 REG_WRITE(ah, AR_IMR_S0,
29 SM(ah->txok_interrupt_mask, AR_IMR_S0_QCU_TXOK) 29 SM(ah->txok_interrupt_mask, AR_IMR_S0_QCU_TXOK)
@@ -39,17 +39,21 @@ u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q)
39{ 39{
40 return REG_READ(ah, AR_QTXDP(q)); 40 return REG_READ(ah, AR_QTXDP(q));
41} 41}
42EXPORT_SYMBOL(ath9k_hw_gettxbuf);
42 43
43void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp) 44void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp)
44{ 45{
45 REG_WRITE(ah, AR_QTXDP(q), txdp); 46 REG_WRITE(ah, AR_QTXDP(q), txdp);
46} 47}
48EXPORT_SYMBOL(ath9k_hw_puttxbuf);
47 49
48void ath9k_hw_txstart(struct ath_hw *ah, u32 q) 50void ath9k_hw_txstart(struct ath_hw *ah, u32 q)
49{ 51{
50 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Enable TXE on queue: %u\n", q); 52 ath_print(ath9k_hw_common(ah), ATH_DBG_QUEUE,
53 "Enable TXE on queue: %u\n", q);
51 REG_WRITE(ah, AR_Q_TXE, 1 << q); 54 REG_WRITE(ah, AR_Q_TXE, 1 << q);
52} 55}
56EXPORT_SYMBOL(ath9k_hw_txstart);
53 57
54u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q) 58u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
55{ 59{
@@ -64,13 +68,39 @@ u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
64 68
65 return npend; 69 return npend;
66} 70}
71EXPORT_SYMBOL(ath9k_hw_numtxpending);
67 72
73/**
74 * ath9k_hw_updatetxtriglevel - adjusts the frame trigger level
75 *
76 * @ah: atheros hardware struct
77 * @bIncTrigLevel: whether or not the frame trigger level should be updated
78 *
79 * The frame trigger level specifies the minimum number of bytes,
80 * in units of 64 bytes, that must be DMA'ed into the PCU TX FIFO
81 * before the PCU will initiate sending the frame on the air. This can
82 * mean we initiate transmit before a full frame is on the PCU TX FIFO.
83 * Resets to 0x1 (meaning 64 bytes or a full frame, whichever occurs
84 * first)
85 *
86 * Caution must be taken to ensure to set the frame trigger level based
87 * on the DMA request size. For example if the DMA request size is set to
88 * 128 bytes the trigger level cannot exceed 6 * 64 = 384. This is because
89 * there need to be enough space in the tx FIFO for the requested transfer
90 * size. Hence the tx FIFO will stop with 512 - 128 = 384 bytes. If we set
91 * the threshold to a value beyond 6, then the transmit will hang.
92 *
93 * Current dual stream devices have a PCU TX FIFO size of 8 KB.
94 * Current single stream devices have a PCU TX FIFO size of 4 KB, however,
95 * there is a hardware issue which forces us to use 2 KB instead so the
96 * frame trigger level must not exceed 2 KB for these chipsets.
97 */
68bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel) 98bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel)
69{ 99{
70 u32 txcfg, curLevel, newLevel; 100 u32 txcfg, curLevel, newLevel;
71 enum ath9k_int omask; 101 enum ath9k_int omask;
72 102
73 if (ah->tx_trig_level >= MAX_TX_FIFO_THRESHOLD) 103 if (ah->tx_trig_level >= ah->config.max_txtrig_level)
74 return false; 104 return false;
75 105
76 omask = ath9k_hw_set_interrupts(ah, ah->mask_reg & ~ATH9K_INT_GLOBAL); 106 omask = ath9k_hw_set_interrupts(ah, ah->mask_reg & ~ATH9K_INT_GLOBAL);
@@ -79,7 +109,7 @@ bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel)
79 curLevel = MS(txcfg, AR_FTRIG); 109 curLevel = MS(txcfg, AR_FTRIG);
80 newLevel = curLevel; 110 newLevel = curLevel;
81 if (bIncTrigLevel) { 111 if (bIncTrigLevel) {
82 if (curLevel < MAX_TX_FIFO_THRESHOLD) 112 if (curLevel < ah->config.max_txtrig_level)
83 newLevel++; 113 newLevel++;
84 } else if (curLevel > MIN_TX_FIFO_THRESHOLD) 114 } else if (curLevel > MIN_TX_FIFO_THRESHOLD)
85 newLevel--; 115 newLevel--;
@@ -93,27 +123,28 @@ bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel)
93 123
94 return newLevel != curLevel; 124 return newLevel != curLevel;
95} 125}
126EXPORT_SYMBOL(ath9k_hw_updatetxtriglevel);
96 127
97bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q) 128bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
98{ 129{
99#define ATH9K_TX_STOP_DMA_TIMEOUT 4000 /* usec */ 130#define ATH9K_TX_STOP_DMA_TIMEOUT 4000 /* usec */
100#define ATH9K_TIME_QUANTUM 100 /* usec */ 131#define ATH9K_TIME_QUANTUM 100 /* usec */
101 132 struct ath_common *common = ath9k_hw_common(ah);
102 struct ath9k_hw_capabilities *pCap = &ah->caps; 133 struct ath9k_hw_capabilities *pCap = &ah->caps;
103 struct ath9k_tx_queue_info *qi; 134 struct ath9k_tx_queue_info *qi;
104 u32 tsfLow, j, wait; 135 u32 tsfLow, j, wait;
105 u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM; 136 u32 wait_time = ATH9K_TX_STOP_DMA_TIMEOUT / ATH9K_TIME_QUANTUM;
106 137
107 if (q >= pCap->total_queues) { 138 if (q >= pCap->total_queues) {
108 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Stopping TX DMA, " 139 ath_print(common, ATH_DBG_QUEUE, "Stopping TX DMA, "
109 "invalid queue: %u\n", q); 140 "invalid queue: %u\n", q);
110 return false; 141 return false;
111 } 142 }
112 143
113 qi = &ah->txq[q]; 144 qi = &ah->txq[q];
114 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 145 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
115 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Stopping TX DMA, " 146 ath_print(common, ATH_DBG_QUEUE, "Stopping TX DMA, "
116 "inactive queue: %u\n", q); 147 "inactive queue: %u\n", q);
117 return false; 148 return false;
118 } 149 }
119 150
@@ -126,9 +157,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
126 } 157 }
127 158
128 if (ath9k_hw_numtxpending(ah, q)) { 159 if (ath9k_hw_numtxpending(ah, q)) {
129 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 160 ath_print(common, ATH_DBG_QUEUE,
130 "%s: Num of pending TX Frames %d on Q %d\n", 161 "%s: Num of pending TX Frames %d on Q %d\n",
131 __func__, ath9k_hw_numtxpending(ah, q), q); 162 __func__, ath9k_hw_numtxpending(ah, q), q);
132 163
133 for (j = 0; j < 2; j++) { 164 for (j = 0; j < 2; j++) {
134 tsfLow = REG_READ(ah, AR_TSF_L32); 165 tsfLow = REG_READ(ah, AR_TSF_L32);
@@ -142,9 +173,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
142 if ((REG_READ(ah, AR_TSF_L32) >> 10) == (tsfLow >> 10)) 173 if ((REG_READ(ah, AR_TSF_L32) >> 10) == (tsfLow >> 10))
143 break; 174 break;
144 175
145 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 176 ath_print(common, ATH_DBG_QUEUE,
146 "TSF has moved while trying to set " 177 "TSF has moved while trying to set "
147 "quiet time TSF: 0x%08x\n", tsfLow); 178 "quiet time TSF: 0x%08x\n", tsfLow);
148 } 179 }
149 180
150 REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH); 181 REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
@@ -155,9 +186,9 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
155 wait = wait_time; 186 wait = wait_time;
156 while (ath9k_hw_numtxpending(ah, q)) { 187 while (ath9k_hw_numtxpending(ah, q)) {
157 if ((--wait) == 0) { 188 if ((--wait) == 0) {
158 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, 189 ath_print(common, ATH_DBG_FATAL,
159 "Failed to stop TX DMA in 100 " 190 "Failed to stop TX DMA in 100 "
160 "msec after killing last frame\n"); 191 "msec after killing last frame\n");
161 break; 192 break;
162 } 193 }
163 udelay(ATH9K_TIME_QUANTUM); 194 udelay(ATH9K_TIME_QUANTUM);
@@ -172,6 +203,7 @@ bool ath9k_hw_stoptxdma(struct ath_hw *ah, u32 q)
172#undef ATH9K_TX_STOP_DMA_TIMEOUT 203#undef ATH9K_TX_STOP_DMA_TIMEOUT
173#undef ATH9K_TIME_QUANTUM 204#undef ATH9K_TIME_QUANTUM
174} 205}
206EXPORT_SYMBOL(ath9k_hw_stoptxdma);
175 207
176void ath9k_hw_filltxdesc(struct ath_hw *ah, struct ath_desc *ds, 208void ath9k_hw_filltxdesc(struct ath_hw *ah, struct ath_desc *ds,
177 u32 segLen, bool firstSeg, 209 u32 segLen, bool firstSeg,
@@ -198,6 +230,7 @@ void ath9k_hw_filltxdesc(struct ath_hw *ah, struct ath_desc *ds,
198 ads->ds_txstatus6 = ads->ds_txstatus7 = 0; 230 ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
199 ads->ds_txstatus8 = ads->ds_txstatus9 = 0; 231 ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
200} 232}
233EXPORT_SYMBOL(ath9k_hw_filltxdesc);
201 234
202void ath9k_hw_cleartxdesc(struct ath_hw *ah, struct ath_desc *ds) 235void ath9k_hw_cleartxdesc(struct ath_hw *ah, struct ath_desc *ds)
203{ 236{
@@ -209,6 +242,7 @@ void ath9k_hw_cleartxdesc(struct ath_hw *ah, struct ath_desc *ds)
209 ads->ds_txstatus6 = ads->ds_txstatus7 = 0; 242 ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
210 ads->ds_txstatus8 = ads->ds_txstatus9 = 0; 243 ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
211} 244}
245EXPORT_SYMBOL(ath9k_hw_cleartxdesc);
212 246
213int ath9k_hw_txprocdesc(struct ath_hw *ah, struct ath_desc *ds) 247int ath9k_hw_txprocdesc(struct ath_hw *ah, struct ath_desc *ds)
214{ 248{
@@ -222,6 +256,8 @@ int ath9k_hw_txprocdesc(struct ath_hw *ah, struct ath_desc *ds)
222 ds->ds_txstat.ts_status = 0; 256 ds->ds_txstat.ts_status = 0;
223 ds->ds_txstat.ts_flags = 0; 257 ds->ds_txstat.ts_flags = 0;
224 258
259 if (ads->ds_txstatus1 & AR_FrmXmitOK)
260 ds->ds_txstat.ts_status |= ATH9K_TX_ACKED;
225 if (ads->ds_txstatus1 & AR_ExcessiveRetries) 261 if (ads->ds_txstatus1 & AR_ExcessiveRetries)
226 ds->ds_txstat.ts_status |= ATH9K_TXERR_XRETRY; 262 ds->ds_txstat.ts_status |= ATH9K_TXERR_XRETRY;
227 if (ads->ds_txstatus1 & AR_Filtered) 263 if (ads->ds_txstatus1 & AR_Filtered)
@@ -284,6 +320,7 @@ int ath9k_hw_txprocdesc(struct ath_hw *ah, struct ath_desc *ds)
284 320
285 return 0; 321 return 0;
286} 322}
323EXPORT_SYMBOL(ath9k_hw_txprocdesc);
287 324
288void ath9k_hw_set11n_txdesc(struct ath_hw *ah, struct ath_desc *ds, 325void ath9k_hw_set11n_txdesc(struct ath_hw *ah, struct ath_desc *ds,
289 u32 pktLen, enum ath9k_pkt_type type, u32 txPower, 326 u32 pktLen, enum ath9k_pkt_type type, u32 txPower,
@@ -319,6 +356,7 @@ void ath9k_hw_set11n_txdesc(struct ath_hw *ah, struct ath_desc *ds,
319 ads->ds_ctl11 = 0; 356 ads->ds_ctl11 = 0;
320 } 357 }
321} 358}
359EXPORT_SYMBOL(ath9k_hw_set11n_txdesc);
322 360
323void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, struct ath_desc *ds, 361void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, struct ath_desc *ds,
324 struct ath_desc *lastds, 362 struct ath_desc *lastds,
@@ -374,6 +412,7 @@ void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, struct ath_desc *ds,
374 last_ads->ds_ctl2 = ads->ds_ctl2; 412 last_ads->ds_ctl2 = ads->ds_ctl2;
375 last_ads->ds_ctl3 = ads->ds_ctl3; 413 last_ads->ds_ctl3 = ads->ds_ctl3;
376} 414}
415EXPORT_SYMBOL(ath9k_hw_set11n_ratescenario);
377 416
378void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, struct ath_desc *ds, 417void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, struct ath_desc *ds,
379 u32 aggrLen) 418 u32 aggrLen)
@@ -384,6 +423,7 @@ void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, struct ath_desc *ds,
384 ads->ds_ctl6 &= ~AR_AggrLen; 423 ads->ds_ctl6 &= ~AR_AggrLen;
385 ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen); 424 ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
386} 425}
426EXPORT_SYMBOL(ath9k_hw_set11n_aggr_first);
387 427
388void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, struct ath_desc *ds, 428void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, struct ath_desc *ds,
389 u32 numDelims) 429 u32 numDelims)
@@ -398,6 +438,7 @@ void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, struct ath_desc *ds,
398 ctl6 |= SM(numDelims, AR_PadDelim); 438 ctl6 |= SM(numDelims, AR_PadDelim);
399 ads->ds_ctl6 = ctl6; 439 ads->ds_ctl6 = ctl6;
400} 440}
441EXPORT_SYMBOL(ath9k_hw_set11n_aggr_middle);
401 442
402void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, struct ath_desc *ds) 443void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, struct ath_desc *ds)
403{ 444{
@@ -407,6 +448,7 @@ void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, struct ath_desc *ds)
407 ads->ds_ctl1 &= ~AR_MoreAggr; 448 ads->ds_ctl1 &= ~AR_MoreAggr;
408 ads->ds_ctl6 &= ~AR_PadDelim; 449 ads->ds_ctl6 &= ~AR_PadDelim;
409} 450}
451EXPORT_SYMBOL(ath9k_hw_set11n_aggr_last);
410 452
411void ath9k_hw_clr11n_aggr(struct ath_hw *ah, struct ath_desc *ds) 453void ath9k_hw_clr11n_aggr(struct ath_hw *ah, struct ath_desc *ds)
412{ 454{
@@ -414,6 +456,7 @@ void ath9k_hw_clr11n_aggr(struct ath_hw *ah, struct ath_desc *ds)
414 456
415 ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr); 457 ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
416} 458}
459EXPORT_SYMBOL(ath9k_hw_clr11n_aggr);
417 460
418void ath9k_hw_set11n_burstduration(struct ath_hw *ah, struct ath_desc *ds, 461void ath9k_hw_set11n_burstduration(struct ath_hw *ah, struct ath_desc *ds,
419 u32 burstDuration) 462 u32 burstDuration)
@@ -423,6 +466,7 @@ void ath9k_hw_set11n_burstduration(struct ath_hw *ah, struct ath_desc *ds,
423 ads->ds_ctl2 &= ~AR_BurstDur; 466 ads->ds_ctl2 &= ~AR_BurstDur;
424 ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur); 467 ads->ds_ctl2 |= SM(burstDuration, AR_BurstDur);
425} 468}
469EXPORT_SYMBOL(ath9k_hw_set11n_burstduration);
426 470
427void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, struct ath_desc *ds, 471void ath9k_hw_set11n_virtualmorefrag(struct ath_hw *ah, struct ath_desc *ds,
428 u32 vmf) 472 u32 vmf)
@@ -440,28 +484,30 @@ void ath9k_hw_gettxintrtxqs(struct ath_hw *ah, u32 *txqs)
440 *txqs &= ah->intr_txqs; 484 *txqs &= ah->intr_txqs;
441 ah->intr_txqs &= ~(*txqs); 485 ah->intr_txqs &= ~(*txqs);
442} 486}
487EXPORT_SYMBOL(ath9k_hw_gettxintrtxqs);
443 488
444bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q, 489bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
445 const struct ath9k_tx_queue_info *qinfo) 490 const struct ath9k_tx_queue_info *qinfo)
446{ 491{
447 u32 cw; 492 u32 cw;
493 struct ath_common *common = ath9k_hw_common(ah);
448 struct ath9k_hw_capabilities *pCap = &ah->caps; 494 struct ath9k_hw_capabilities *pCap = &ah->caps;
449 struct ath9k_tx_queue_info *qi; 495 struct ath9k_tx_queue_info *qi;
450 496
451 if (q >= pCap->total_queues) { 497 if (q >= pCap->total_queues) {
452 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Set TXQ properties, " 498 ath_print(common, ATH_DBG_QUEUE, "Set TXQ properties, "
453 "invalid queue: %u\n", q); 499 "invalid queue: %u\n", q);
454 return false; 500 return false;
455 } 501 }
456 502
457 qi = &ah->txq[q]; 503 qi = &ah->txq[q];
458 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 504 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
459 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Set TXQ properties, " 505 ath_print(common, ATH_DBG_QUEUE, "Set TXQ properties, "
460 "inactive queue: %u\n", q); 506 "inactive queue: %u\n", q);
461 return false; 507 return false;
462 } 508 }
463 509
464 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Set queue properties for: %u\n", q); 510 ath_print(common, ATH_DBG_QUEUE, "Set queue properties for: %u\n", q);
465 511
466 qi->tqi_ver = qinfo->tqi_ver; 512 qi->tqi_ver = qinfo->tqi_ver;
467 qi->tqi_subtype = qinfo->tqi_subtype; 513 qi->tqi_subtype = qinfo->tqi_subtype;
@@ -510,23 +556,25 @@ bool ath9k_hw_set_txq_props(struct ath_hw *ah, int q,
510 556
511 return true; 557 return true;
512} 558}
559EXPORT_SYMBOL(ath9k_hw_set_txq_props);
513 560
514bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q, 561bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q,
515 struct ath9k_tx_queue_info *qinfo) 562 struct ath9k_tx_queue_info *qinfo)
516{ 563{
564 struct ath_common *common = ath9k_hw_common(ah);
517 struct ath9k_hw_capabilities *pCap = &ah->caps; 565 struct ath9k_hw_capabilities *pCap = &ah->caps;
518 struct ath9k_tx_queue_info *qi; 566 struct ath9k_tx_queue_info *qi;
519 567
520 if (q >= pCap->total_queues) { 568 if (q >= pCap->total_queues) {
521 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Get TXQ properties, " 569 ath_print(common, ATH_DBG_QUEUE, "Get TXQ properties, "
522 "invalid queue: %u\n", q); 570 "invalid queue: %u\n", q);
523 return false; 571 return false;
524 } 572 }
525 573
526 qi = &ah->txq[q]; 574 qi = &ah->txq[q];
527 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 575 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
528 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Get TXQ properties, " 576 ath_print(common, ATH_DBG_QUEUE, "Get TXQ properties, "
529 "inactive queue: %u\n", q); 577 "inactive queue: %u\n", q);
530 return false; 578 return false;
531 } 579 }
532 580
@@ -547,10 +595,12 @@ bool ath9k_hw_get_txq_props(struct ath_hw *ah, int q,
547 595
548 return true; 596 return true;
549} 597}
598EXPORT_SYMBOL(ath9k_hw_get_txq_props);
550 599
551int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type, 600int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
552 const struct ath9k_tx_queue_info *qinfo) 601 const struct ath9k_tx_queue_info *qinfo)
553{ 602{
603 struct ath_common *common = ath9k_hw_common(ah);
554 struct ath9k_tx_queue_info *qi; 604 struct ath9k_tx_queue_info *qi;
555 struct ath9k_hw_capabilities *pCap = &ah->caps; 605 struct ath9k_hw_capabilities *pCap = &ah->caps;
556 int q; 606 int q;
@@ -574,23 +624,23 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
574 ATH9K_TX_QUEUE_INACTIVE) 624 ATH9K_TX_QUEUE_INACTIVE)
575 break; 625 break;
576 if (q == pCap->total_queues) { 626 if (q == pCap->total_queues) {
577 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 627 ath_print(common, ATH_DBG_FATAL,
578 "No available TX queue\n"); 628 "No available TX queue\n");
579 return -1; 629 return -1;
580 } 630 }
581 break; 631 break;
582 default: 632 default:
583 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, "Invalid TX queue type: %u\n", 633 ath_print(common, ATH_DBG_FATAL,
584 type); 634 "Invalid TX queue type: %u\n", type);
585 return -1; 635 return -1;
586 } 636 }
587 637
588 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Setup TX queue: %u\n", q); 638 ath_print(common, ATH_DBG_QUEUE, "Setup TX queue: %u\n", q);
589 639
590 qi = &ah->txq[q]; 640 qi = &ah->txq[q];
591 if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) { 641 if (qi->tqi_type != ATH9K_TX_QUEUE_INACTIVE) {
592 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 642 ath_print(common, ATH_DBG_FATAL,
593 "TX queue: %u already active\n", q); 643 "TX queue: %u already active\n", q);
594 return -1; 644 return -1;
595 } 645 }
596 memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); 646 memset(qi, 0, sizeof(struct ath9k_tx_queue_info));
@@ -613,25 +663,27 @@ int ath9k_hw_setuptxqueue(struct ath_hw *ah, enum ath9k_tx_queue type,
613 663
614 return q; 664 return q;
615} 665}
666EXPORT_SYMBOL(ath9k_hw_setuptxqueue);
616 667
617bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q) 668bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
618{ 669{
619 struct ath9k_hw_capabilities *pCap = &ah->caps; 670 struct ath9k_hw_capabilities *pCap = &ah->caps;
671 struct ath_common *common = ath9k_hw_common(ah);
620 struct ath9k_tx_queue_info *qi; 672 struct ath9k_tx_queue_info *qi;
621 673
622 if (q >= pCap->total_queues) { 674 if (q >= pCap->total_queues) {
623 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Release TXQ, " 675 ath_print(common, ATH_DBG_QUEUE, "Release TXQ, "
624 "invalid queue: %u\n", q); 676 "invalid queue: %u\n", q);
625 return false; 677 return false;
626 } 678 }
627 qi = &ah->txq[q]; 679 qi = &ah->txq[q];
628 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 680 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
629 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Release TXQ, " 681 ath_print(common, ATH_DBG_QUEUE, "Release TXQ, "
630 "inactive queue: %u\n", q); 682 "inactive queue: %u\n", q);
631 return false; 683 return false;
632 } 684 }
633 685
634 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Release TX queue: %u\n", q); 686 ath_print(common, ATH_DBG_QUEUE, "Release TX queue: %u\n", q);
635 687
636 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE; 688 qi->tqi_type = ATH9K_TX_QUEUE_INACTIVE;
637 ah->txok_interrupt_mask &= ~(1 << q); 689 ah->txok_interrupt_mask &= ~(1 << q);
@@ -643,28 +695,30 @@ bool ath9k_hw_releasetxqueue(struct ath_hw *ah, u32 q)
643 695
644 return true; 696 return true;
645} 697}
698EXPORT_SYMBOL(ath9k_hw_releasetxqueue);
646 699
647bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q) 700bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
648{ 701{
649 struct ath9k_hw_capabilities *pCap = &ah->caps; 702 struct ath9k_hw_capabilities *pCap = &ah->caps;
703 struct ath_common *common = ath9k_hw_common(ah);
650 struct ath9k_channel *chan = ah->curchan; 704 struct ath9k_channel *chan = ah->curchan;
651 struct ath9k_tx_queue_info *qi; 705 struct ath9k_tx_queue_info *qi;
652 u32 cwMin, chanCwMin, value; 706 u32 cwMin, chanCwMin, value;
653 707
654 if (q >= pCap->total_queues) { 708 if (q >= pCap->total_queues) {
655 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Reset TXQ, " 709 ath_print(common, ATH_DBG_QUEUE, "Reset TXQ, "
656 "invalid queue: %u\n", q); 710 "invalid queue: %u\n", q);
657 return false; 711 return false;
658 } 712 }
659 713
660 qi = &ah->txq[q]; 714 qi = &ah->txq[q];
661 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { 715 if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) {
662 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Reset TXQ, " 716 ath_print(common, ATH_DBG_QUEUE, "Reset TXQ, "
663 "inactive queue: %u\n", q); 717 "inactive queue: %u\n", q);
664 return true; 718 return true;
665 } 719 }
666 720
667 DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "Reset TX queue: %u\n", q); 721 ath_print(common, ATH_DBG_QUEUE, "Reset TX queue: %u\n", q);
668 722
669 if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) { 723 if (qi->tqi_cwmin == ATH9K_TXQ_USEDEFAULT) {
670 if (chan && IS_CHAN_B(chan)) 724 if (chan && IS_CHAN_B(chan))
@@ -799,6 +853,7 @@ bool ath9k_hw_resettxqueue(struct ath_hw *ah, u32 q)
799 853
800 return true; 854 return true;
801} 855}
856EXPORT_SYMBOL(ath9k_hw_resettxqueue);
802 857
803int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds, 858int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
804 u32 pa, struct ath_desc *nds, u64 tsf) 859 u32 pa, struct ath_desc *nds, u64 tsf)
@@ -880,6 +935,7 @@ int ath9k_hw_rxprocdesc(struct ath_hw *ah, struct ath_desc *ds,
880 935
881 return 0; 936 return 0;
882} 937}
938EXPORT_SYMBOL(ath9k_hw_rxprocdesc);
883 939
884void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds, 940void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
885 u32 size, u32 flags) 941 u32 size, u32 flags)
@@ -895,7 +951,15 @@ void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
895 if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) 951 if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
896 memset(&(ads->u), 0, sizeof(ads->u)); 952 memset(&(ads->u), 0, sizeof(ads->u));
897} 953}
954EXPORT_SYMBOL(ath9k_hw_setuprxdesc);
898 955
956/*
957 * This can stop or re-enables RX.
958 *
959 * If bool is set this will kill any frame which is currently being
960 * transferred between the MAC and baseband and also prevent any new
961 * frames from getting started.
962 */
899bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set) 963bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set)
900{ 964{
901 u32 reg; 965 u32 reg;
@@ -911,8 +975,9 @@ bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set)
911 AR_DIAG_RX_ABORT)); 975 AR_DIAG_RX_ABORT));
912 976
913 reg = REG_READ(ah, AR_OBS_BUS_1); 977 reg = REG_READ(ah, AR_OBS_BUS_1);
914 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 978 ath_print(ath9k_hw_common(ah), ATH_DBG_FATAL,
915 "RX failed to go idle in 10 ms RXSM=0x%x\n", reg); 979 "RX failed to go idle in 10 ms RXSM=0x%x\n",
980 reg);
916 981
917 return false; 982 return false;
918 } 983 }
@@ -923,16 +988,19 @@ bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set)
923 988
924 return true; 989 return true;
925} 990}
991EXPORT_SYMBOL(ath9k_hw_setrxabort);
926 992
927void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp) 993void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp)
928{ 994{
929 REG_WRITE(ah, AR_RXDP, rxdp); 995 REG_WRITE(ah, AR_RXDP, rxdp);
930} 996}
997EXPORT_SYMBOL(ath9k_hw_putrxbuf);
931 998
932void ath9k_hw_rxena(struct ath_hw *ah) 999void ath9k_hw_rxena(struct ath_hw *ah)
933{ 1000{
934 REG_WRITE(ah, AR_CR, AR_CR_RXE); 1001 REG_WRITE(ah, AR_CR, AR_CR_RXE);
935} 1002}
1003EXPORT_SYMBOL(ath9k_hw_rxena);
936 1004
937void ath9k_hw_startpcureceive(struct ath_hw *ah) 1005void ath9k_hw_startpcureceive(struct ath_hw *ah)
938{ 1006{
@@ -942,6 +1010,7 @@ void ath9k_hw_startpcureceive(struct ath_hw *ah)
942 1010
943 REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT)); 1011 REG_CLR_BIT(ah, AR_DIAG_SW, (AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT));
944} 1012}
1013EXPORT_SYMBOL(ath9k_hw_startpcureceive);
945 1014
946void ath9k_hw_stoppcurecv(struct ath_hw *ah) 1015void ath9k_hw_stoppcurecv(struct ath_hw *ah)
947{ 1016{
@@ -949,12 +1018,13 @@ void ath9k_hw_stoppcurecv(struct ath_hw *ah)
949 1018
950 ath9k_hw_disable_mib_counters(ah); 1019 ath9k_hw_disable_mib_counters(ah);
951} 1020}
1021EXPORT_SYMBOL(ath9k_hw_stoppcurecv);
952 1022
953bool ath9k_hw_stopdmarecv(struct ath_hw *ah) 1023bool ath9k_hw_stopdmarecv(struct ath_hw *ah)
954{ 1024{
955#define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */ 1025#define AH_RX_STOP_DMA_TIMEOUT 10000 /* usec */
956#define AH_RX_TIME_QUANTUM 100 /* usec */ 1026#define AH_RX_TIME_QUANTUM 100 /* usec */
957 1027 struct ath_common *common = ath9k_hw_common(ah);
958 int i; 1028 int i;
959 1029
960 REG_WRITE(ah, AR_CR, AR_CR_RXD); 1030 REG_WRITE(ah, AR_CR, AR_CR_RXD);
@@ -967,12 +1037,12 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah)
967 } 1037 }
968 1038
969 if (i == 0) { 1039 if (i == 0) {
970 DPRINTF(ah->ah_sc, ATH_DBG_FATAL, 1040 ath_print(common, ATH_DBG_FATAL,
971 "DMA failed to stop in %d ms " 1041 "DMA failed to stop in %d ms "
972 "AR_CR=0x%08x AR_DIAG_SW=0x%08x\n", 1042 "AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
973 AH_RX_STOP_DMA_TIMEOUT / 1000, 1043 AH_RX_STOP_DMA_TIMEOUT / 1000,
974 REG_READ(ah, AR_CR), 1044 REG_READ(ah, AR_CR),
975 REG_READ(ah, AR_DIAG_SW)); 1045 REG_READ(ah, AR_DIAG_SW));
976 return false; 1046 return false;
977 } else { 1047 } else {
978 return true; 1048 return true;
@@ -981,3 +1051,17 @@ bool ath9k_hw_stopdmarecv(struct ath_hw *ah)
981#undef AH_RX_TIME_QUANTUM 1051#undef AH_RX_TIME_QUANTUM
982#undef AH_RX_STOP_DMA_TIMEOUT 1052#undef AH_RX_STOP_DMA_TIMEOUT
983} 1053}
1054EXPORT_SYMBOL(ath9k_hw_stopdmarecv);
1055
1056int ath9k_hw_beaconq_setup(struct ath_hw *ah)
1057{
1058 struct ath9k_tx_queue_info qi;
1059
1060 memset(&qi, 0, sizeof(qi));
1061 qi.tqi_aifs = 1;
1062 qi.tqi_cwmin = 0;
1063 qi.tqi_cwmax = 0;
1064 /* NB: don't enable any interrupts */
1065 return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
1066}
1067EXPORT_SYMBOL(ath9k_hw_beaconq_setup);
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index f56e77da6c3e..29851e6376a9 100644
--- a/drivers/net/wireless/ath/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
@@ -76,6 +76,10 @@
76#define ATH9K_TXERR_FIFO 0x04 76#define ATH9K_TXERR_FIFO 0x04
77#define ATH9K_TXERR_XTXOP 0x08 77#define ATH9K_TXERR_XTXOP 0x08
78#define ATH9K_TXERR_TIMER_EXPIRED 0x10 78#define ATH9K_TXERR_TIMER_EXPIRED 0x10
79#define ATH9K_TX_ACKED 0x20
80#define ATH9K_TXERR_MASK \
81 (ATH9K_TXERR_XRETRY | ATH9K_TXERR_FILT | ATH9K_TXERR_FIFO | \
82 ATH9K_TXERR_XTXOP | ATH9K_TXERR_TIMER_EXPIRED)
79 83
80#define ATH9K_TX_BA 0x01 84#define ATH9K_TX_BA 0x01
81#define ATH9K_TX_PWRMGMT 0x02 85#define ATH9K_TX_PWRMGMT 0x02
@@ -85,9 +89,15 @@
85#define ATH9K_TX_SW_ABORTED 0x40 89#define ATH9K_TX_SW_ABORTED 0x40
86#define ATH9K_TX_SW_FILTERED 0x80 90#define ATH9K_TX_SW_FILTERED 0x80
87 91
92/* 64 bytes */
88#define MIN_TX_FIFO_THRESHOLD 0x1 93#define MIN_TX_FIFO_THRESHOLD 0x1
94
95/*
96 * Single stream device AR9285 and AR9271 require 2 KB
97 * to work around a hardware issue, all other devices
98 * have can use the max 4 KB limit.
99 */
89#define MAX_TX_FIFO_THRESHOLD ((4096 / 64) - 1) 100#define MAX_TX_FIFO_THRESHOLD ((4096 / 64) - 1)
90#define INIT_TX_FIFO_THRESHOLD MIN_TX_FIFO_THRESHOLD
91 101
92struct ath_tx_status { 102struct ath_tx_status {
93 u32 ts_tstamp; 103 u32 ts_tstamp;
@@ -157,6 +167,40 @@ struct ath_rx_status {
157#define ATH9K_RXKEYIX_INVALID ((u8)-1) 167#define ATH9K_RXKEYIX_INVALID ((u8)-1)
158#define ATH9K_TXKEYIX_INVALID ((u32)-1) 168#define ATH9K_TXKEYIX_INVALID ((u32)-1)
159 169
170enum ath9k_phyerr {
171 ATH9K_PHYERR_UNDERRUN = 0, /* Transmit underrun */
172 ATH9K_PHYERR_TIMING = 1, /* Timing error */
173 ATH9K_PHYERR_PARITY = 2, /* Illegal parity */
174 ATH9K_PHYERR_RATE = 3, /* Illegal rate */
175 ATH9K_PHYERR_LENGTH = 4, /* Illegal length */
176 ATH9K_PHYERR_RADAR = 5, /* Radar detect */
177 ATH9K_PHYERR_SERVICE = 6, /* Illegal service */
178 ATH9K_PHYERR_TOR = 7, /* Transmit override receive */
179
180 ATH9K_PHYERR_OFDM_TIMING = 17,
181 ATH9K_PHYERR_OFDM_SIGNAL_PARITY = 18,
182 ATH9K_PHYERR_OFDM_RATE_ILLEGAL = 19,
183 ATH9K_PHYERR_OFDM_LENGTH_ILLEGAL = 20,
184 ATH9K_PHYERR_OFDM_POWER_DROP = 21,
185 ATH9K_PHYERR_OFDM_SERVICE = 22,
186 ATH9K_PHYERR_OFDM_RESTART = 23,
187 ATH9K_PHYERR_FALSE_RADAR_EXT = 24,
188
189 ATH9K_PHYERR_CCK_TIMING = 25,
190 ATH9K_PHYERR_CCK_HEADER_CRC = 26,
191 ATH9K_PHYERR_CCK_RATE_ILLEGAL = 27,
192 ATH9K_PHYERR_CCK_SERVICE = 30,
193 ATH9K_PHYERR_CCK_RESTART = 31,
194 ATH9K_PHYERR_CCK_LENGTH_ILLEGAL = 32,
195 ATH9K_PHYERR_CCK_POWER_DROP = 33,
196
197 ATH9K_PHYERR_HT_CRC_ERROR = 34,
198 ATH9K_PHYERR_HT_LENGTH_ILLEGAL = 35,
199 ATH9K_PHYERR_HT_RATE_ILLEGAL = 36,
200
201 ATH9K_PHYERR_MAX = 37,
202};
203
160struct ath_desc { 204struct ath_desc {
161 u32 ds_link; 205 u32 ds_link;
162 u32 ds_data; 206 u32 ds_data;
@@ -380,6 +424,11 @@ struct ar5416_desc {
380#define AR_TxBaStatus 0x40000000 424#define AR_TxBaStatus 0x40000000
381#define AR_TxStatusRsvd01 0x80000000 425#define AR_TxStatusRsvd01 0x80000000
382 426
427/*
428 * AR_FrmXmitOK - Frame transmission success flag. If set, the frame was
429 * transmitted successfully. If clear, no ACK or BA was received to indicate
430 * successful transmission when we were expecting an ACK or BA.
431 */
383#define AR_FrmXmitOK 0x00000001 432#define AR_FrmXmitOK 0x00000001
384#define AR_ExcessiveRetries 0x00000002 433#define AR_ExcessiveRetries 0x00000002
385#define AR_FIFOUnderrun 0x00000004 434#define AR_FIFOUnderrun 0x00000004
@@ -614,19 +663,8 @@ enum ath9k_cipher {
614 ATH9K_CIPHER_MIC = 127 663 ATH9K_CIPHER_MIC = 127
615}; 664};
616 665
617enum ath9k_ht_macmode {
618 ATH9K_HT_MACMODE_20 = 0,
619 ATH9K_HT_MACMODE_2040 = 1,
620};
621
622enum ath9k_ht_extprotspacing {
623 ATH9K_HT_EXTPROTSPACING_20 = 0,
624 ATH9K_HT_EXTPROTSPACING_25 = 1,
625};
626
627struct ath_hw; 666struct ath_hw;
628struct ath9k_channel; 667struct ath9k_channel;
629struct ath_rate_table;
630 668
631u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q); 669u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q);
632void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp); 670void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp);
@@ -677,5 +715,6 @@ void ath9k_hw_rxena(struct ath_hw *ah);
677void ath9k_hw_startpcureceive(struct ath_hw *ah); 715void ath9k_hw_startpcureceive(struct ath_hw *ah);
678void ath9k_hw_stoppcurecv(struct ath_hw *ah); 716void ath9k_hw_stoppcurecv(struct ath_hw *ah);
679bool ath9k_hw_stopdmarecv(struct ath_hw *ah); 717bool ath9k_hw_stopdmarecv(struct ath_hw *ah);
718int ath9k_hw_beaconq_setup(struct ath_hw *ah);
680 719
681#endif /* MAC_H */ 720#endif /* MAC_H */
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index 43d2be9867fc..115e1aeedb59 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -16,88 +16,7 @@
16 16
17#include <linux/nl80211.h> 17#include <linux/nl80211.h>
18#include "ath9k.h" 18#include "ath9k.h"
19 19#include "btcoex.h"
20static char *dev_info = "ath9k";
21
22MODULE_AUTHOR("Atheros Communications");
23MODULE_DESCRIPTION("Support for Atheros 802.11n wireless LAN cards.");
24MODULE_SUPPORTED_DEVICE("Atheros 802.11n WLAN cards");
25MODULE_LICENSE("Dual BSD/GPL");
26
27static int modparam_nohwcrypt;
28module_param_named(nohwcrypt, modparam_nohwcrypt, int, 0444);
29MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
30
31/* We use the hw_value as an index into our private channel structure */
32
33#define CHAN2G(_freq, _idx) { \
34 .center_freq = (_freq), \
35 .hw_value = (_idx), \
36 .max_power = 20, \
37}
38
39#define CHAN5G(_freq, _idx) { \
40 .band = IEEE80211_BAND_5GHZ, \
41 .center_freq = (_freq), \
42 .hw_value = (_idx), \
43 .max_power = 20, \
44}
45
46/* Some 2 GHz radios are actually tunable on 2312-2732
47 * on 5 MHz steps, we support the channels which we know
48 * we have calibration data for all cards though to make
49 * this static */
50static struct ieee80211_channel ath9k_2ghz_chantable[] = {
51 CHAN2G(2412, 0), /* Channel 1 */
52 CHAN2G(2417, 1), /* Channel 2 */
53 CHAN2G(2422, 2), /* Channel 3 */
54 CHAN2G(2427, 3), /* Channel 4 */
55 CHAN2G(2432, 4), /* Channel 5 */
56 CHAN2G(2437, 5), /* Channel 6 */
57 CHAN2G(2442, 6), /* Channel 7 */
58 CHAN2G(2447, 7), /* Channel 8 */
59 CHAN2G(2452, 8), /* Channel 9 */
60 CHAN2G(2457, 9), /* Channel 10 */
61 CHAN2G(2462, 10), /* Channel 11 */
62 CHAN2G(2467, 11), /* Channel 12 */
63 CHAN2G(2472, 12), /* Channel 13 */
64 CHAN2G(2484, 13), /* Channel 14 */
65};
66
67/* Some 5 GHz radios are actually tunable on XXXX-YYYY
68 * on 5 MHz steps, we support the channels which we know
69 * we have calibration data for all cards though to make
70 * this static */
71static struct ieee80211_channel ath9k_5ghz_chantable[] = {
72 /* _We_ call this UNII 1 */
73 CHAN5G(5180, 14), /* Channel 36 */
74 CHAN5G(5200, 15), /* Channel 40 */
75 CHAN5G(5220, 16), /* Channel 44 */
76 CHAN5G(5240, 17), /* Channel 48 */
77 /* _We_ call this UNII 2 */
78 CHAN5G(5260, 18), /* Channel 52 */
79 CHAN5G(5280, 19), /* Channel 56 */
80 CHAN5G(5300, 20), /* Channel 60 */
81 CHAN5G(5320, 21), /* Channel 64 */
82 /* _We_ call this "Middle band" */
83 CHAN5G(5500, 22), /* Channel 100 */
84 CHAN5G(5520, 23), /* Channel 104 */
85 CHAN5G(5540, 24), /* Channel 108 */
86 CHAN5G(5560, 25), /* Channel 112 */
87 CHAN5G(5580, 26), /* Channel 116 */
88 CHAN5G(5600, 27), /* Channel 120 */
89 CHAN5G(5620, 28), /* Channel 124 */
90 CHAN5G(5640, 29), /* Channel 128 */
91 CHAN5G(5660, 30), /* Channel 132 */
92 CHAN5G(5680, 31), /* Channel 136 */
93 CHAN5G(5700, 32), /* Channel 140 */
94 /* _We_ call this UNII 3 */
95 CHAN5G(5745, 33), /* Channel 149 */
96 CHAN5G(5765, 34), /* Channel 153 */
97 CHAN5G(5785, 35), /* Channel 157 */
98 CHAN5G(5805, 36), /* Channel 161 */
99 CHAN5G(5825, 37), /* Channel 165 */
100};
101 20
102static void ath_cache_conf_rate(struct ath_softc *sc, 21static void ath_cache_conf_rate(struct ath_softc *sc,
103 struct ieee80211_conf *conf) 22 struct ieee80211_conf *conf)
@@ -105,31 +24,23 @@ static void ath_cache_conf_rate(struct ath_softc *sc,
105 switch (conf->channel->band) { 24 switch (conf->channel->band) {
106 case IEEE80211_BAND_2GHZ: 25 case IEEE80211_BAND_2GHZ:
107 if (conf_is_ht20(conf)) 26 if (conf_is_ht20(conf))
108 sc->cur_rate_table = 27 sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
109 sc->hw_rate_table[ATH9K_MODE_11NG_HT20];
110 else if (conf_is_ht40_minus(conf)) 28 else if (conf_is_ht40_minus(conf))
111 sc->cur_rate_table = 29 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
112 sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS];
113 else if (conf_is_ht40_plus(conf)) 30 else if (conf_is_ht40_plus(conf))
114 sc->cur_rate_table = 31 sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
115 sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS];
116 else 32 else
117 sc->cur_rate_table = 33 sc->cur_rate_mode = ATH9K_MODE_11G;
118 sc->hw_rate_table[ATH9K_MODE_11G];
119 break; 34 break;
120 case IEEE80211_BAND_5GHZ: 35 case IEEE80211_BAND_5GHZ:
121 if (conf_is_ht20(conf)) 36 if (conf_is_ht20(conf))
122 sc->cur_rate_table = 37 sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
123 sc->hw_rate_table[ATH9K_MODE_11NA_HT20];
124 else if (conf_is_ht40_minus(conf)) 38 else if (conf_is_ht40_minus(conf))
125 sc->cur_rate_table = 39 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
126 sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS];
127 else if (conf_is_ht40_plus(conf)) 40 else if (conf_is_ht40_plus(conf))
128 sc->cur_rate_table = 41 sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
129 sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS];
130 else 42 else
131 sc->cur_rate_table = 43 sc->cur_rate_mode = ATH9K_MODE_11A;
132 sc->hw_rate_table[ATH9K_MODE_11A];
133 break; 44 break;
134 default: 45 default:
135 BUG_ON(1); 46 BUG_ON(1);
@@ -185,50 +96,6 @@ static u8 parse_mpdudensity(u8 mpdudensity)
185 } 96 }
186} 97}
187 98
188static void ath_setup_rates(struct ath_softc *sc, enum ieee80211_band band)
189{
190 const struct ath_rate_table *rate_table = NULL;
191 struct ieee80211_supported_band *sband;
192 struct ieee80211_rate *rate;
193 int i, maxrates;
194
195 switch (band) {
196 case IEEE80211_BAND_2GHZ:
197 rate_table = sc->hw_rate_table[ATH9K_MODE_11G];
198 break;
199 case IEEE80211_BAND_5GHZ:
200 rate_table = sc->hw_rate_table[ATH9K_MODE_11A];
201 break;
202 default:
203 break;
204 }
205
206 if (rate_table == NULL)
207 return;
208
209 sband = &sc->sbands[band];
210 rate = sc->rates[band];
211
212 if (rate_table->rate_cnt > ATH_RATE_MAX)
213 maxrates = ATH_RATE_MAX;
214 else
215 maxrates = rate_table->rate_cnt;
216
217 for (i = 0; i < maxrates; i++) {
218 rate[i].bitrate = rate_table->info[i].ratekbps / 100;
219 rate[i].hw_value = rate_table->info[i].ratecode;
220 if (rate_table->info[i].short_preamble) {
221 rate[i].hw_value_short = rate_table->info[i].ratecode |
222 rate_table->info[i].short_preamble;
223 rate[i].flags = IEEE80211_RATE_SHORT_PREAMBLE;
224 }
225 sband->n_bitrates++;
226
227 DPRINTF(sc, ATH_DBG_CONFIG, "Rate: %2dMbps, ratecode: %2d\n",
228 rate[i].bitrate / 10, rate[i].hw_value);
229 }
230}
231
232static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc, 99static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
233 struct ieee80211_hw *hw) 100 struct ieee80211_hw *hw)
234{ 101{
@@ -242,6 +109,53 @@ static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
242 return channel; 109 return channel;
243} 110}
244 111
112bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
113{
114 unsigned long flags;
115 bool ret;
116
117 spin_lock_irqsave(&sc->sc_pm_lock, flags);
118 ret = ath9k_hw_setpower(sc->sc_ah, mode);
119 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
120
121 return ret;
122}
123
124void ath9k_ps_wakeup(struct ath_softc *sc)
125{
126 unsigned long flags;
127
128 spin_lock_irqsave(&sc->sc_pm_lock, flags);
129 if (++sc->ps_usecount != 1)
130 goto unlock;
131
132 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
133
134 unlock:
135 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
136}
137
138void ath9k_ps_restore(struct ath_softc *sc)
139{
140 unsigned long flags;
141
142 spin_lock_irqsave(&sc->sc_pm_lock, flags);
143 if (--sc->ps_usecount != 0)
144 goto unlock;
145
146 if (sc->ps_idle)
147 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
148 else if (sc->ps_enabled &&
149 !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
150 PS_WAIT_FOR_CAB |
151 PS_WAIT_FOR_PSPOLL_DATA |
152 PS_WAIT_FOR_TX_ACK)))
153 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
154
155 unlock:
156 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
157}
158
245/* 159/*
246 * Set/change channels. If the channel is really being changed, it's done 160 * Set/change channels. If the channel is really being changed, it's done
247 * by reseting the chip. To accomplish this we must first cleanup any pending 161 * by reseting the chip. To accomplish this we must first cleanup any pending
@@ -251,6 +165,8 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
251 struct ath9k_channel *hchan) 165 struct ath9k_channel *hchan)
252{ 166{
253 struct ath_hw *ah = sc->sc_ah; 167 struct ath_hw *ah = sc->sc_ah;
168 struct ath_common *common = ath9k_hw_common(ah);
169 struct ieee80211_conf *conf = &common->hw->conf;
254 bool fastcc = true, stopped; 170 bool fastcc = true, stopped;
255 struct ieee80211_channel *channel = hw->conf.channel; 171 struct ieee80211_channel *channel = hw->conf.channel;
256 int r; 172 int r;
@@ -280,19 +196,19 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
280 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET)) 196 if (!stopped || (sc->sc_flags & SC_OP_FULL_RESET))
281 fastcc = false; 197 fastcc = false;
282 198
283 DPRINTF(sc, ATH_DBG_CONFIG, 199 ath_print(common, ATH_DBG_CONFIG,
284 "(%u MHz) -> (%u MHz), chanwidth: %d\n", 200 "(%u MHz) -> (%u MHz), conf_is_ht40: %d\n",
285 sc->sc_ah->curchan->channel, 201 sc->sc_ah->curchan->channel,
286 channel->center_freq, sc->tx_chan_width); 202 channel->center_freq, conf_is_ht40(conf));
287 203
288 spin_lock_bh(&sc->sc_resetlock); 204 spin_lock_bh(&sc->sc_resetlock);
289 205
290 r = ath9k_hw_reset(ah, hchan, fastcc); 206 r = ath9k_hw_reset(ah, hchan, fastcc);
291 if (r) { 207 if (r) {
292 DPRINTF(sc, ATH_DBG_FATAL, 208 ath_print(common, ATH_DBG_FATAL,
293 "Unable to reset channel (%u Mhz) " 209 "Unable to reset channel (%u MHz), "
294 "reset status %d\n", 210 "reset status %d\n",
295 channel->center_freq, r); 211 channel->center_freq, r);
296 spin_unlock_bh(&sc->sc_resetlock); 212 spin_unlock_bh(&sc->sc_resetlock);
297 goto ps_restore; 213 goto ps_restore;
298 } 214 }
@@ -301,8 +217,8 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
301 sc->sc_flags &= ~SC_OP_FULL_RESET; 217 sc->sc_flags &= ~SC_OP_FULL_RESET;
302 218
303 if (ath_startrecv(sc) != 0) { 219 if (ath_startrecv(sc) != 0) {
304 DPRINTF(sc, ATH_DBG_FATAL, 220 ath_print(common, ATH_DBG_FATAL,
305 "Unable to restart recv logic\n"); 221 "Unable to restart recv logic\n");
306 r = -EIO; 222 r = -EIO;
307 goto ps_restore; 223 goto ps_restore;
308 } 224 }
@@ -323,10 +239,11 @@ int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
323 * When the task is complete, it reschedules itself depending on the 239 * When the task is complete, it reschedules itself depending on the
324 * appropriate interval that was calculated. 240 * appropriate interval that was calculated.
325 */ 241 */
326static void ath_ani_calibrate(unsigned long data) 242void ath_ani_calibrate(unsigned long data)
327{ 243{
328 struct ath_softc *sc = (struct ath_softc *)data; 244 struct ath_softc *sc = (struct ath_softc *)data;
329 struct ath_hw *ah = sc->sc_ah; 245 struct ath_hw *ah = sc->sc_ah;
246 struct ath_common *common = ath9k_hw_common(ah);
330 bool longcal = false; 247 bool longcal = false;
331 bool shortcal = false; 248 bool shortcal = false;
332 bool aniflag = false; 249 bool aniflag = false;
@@ -336,14 +253,6 @@ static void ath_ani_calibrate(unsigned long data)
336 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ? 253 short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
337 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL; 254 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
338 255
339 /*
340 * don't calibrate when we're scanning.
341 * we are most likely not on our home channel.
342 */
343 spin_lock(&sc->ani_lock);
344 if (sc->sc_flags & SC_OP_SCANNING)
345 goto set_timer;
346
347 /* Only calibrate if awake */ 256 /* Only calibrate if awake */
348 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) 257 if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
349 goto set_timer; 258 goto set_timer;
@@ -351,33 +260,34 @@ static void ath_ani_calibrate(unsigned long data)
351 ath9k_ps_wakeup(sc); 260 ath9k_ps_wakeup(sc);
352 261
353 /* Long calibration runs independently of short calibration. */ 262 /* Long calibration runs independently of short calibration. */
354 if ((timestamp - sc->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) { 263 if ((timestamp - common->ani.longcal_timer) >= ATH_LONG_CALINTERVAL) {
355 longcal = true; 264 longcal = true;
356 DPRINTF(sc, ATH_DBG_ANI, "longcal @%lu\n", jiffies); 265 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
357 sc->ani.longcal_timer = timestamp; 266 common->ani.longcal_timer = timestamp;
358 } 267 }
359 268
360 /* Short calibration applies only while caldone is false */ 269 /* Short calibration applies only while caldone is false */
361 if (!sc->ani.caldone) { 270 if (!common->ani.caldone) {
362 if ((timestamp - sc->ani.shortcal_timer) >= short_cal_interval) { 271 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
363 shortcal = true; 272 shortcal = true;
364 DPRINTF(sc, ATH_DBG_ANI, "shortcal @%lu\n", jiffies); 273 ath_print(common, ATH_DBG_ANI,
365 sc->ani.shortcal_timer = timestamp; 274 "shortcal @%lu\n", jiffies);
366 sc->ani.resetcal_timer = timestamp; 275 common->ani.shortcal_timer = timestamp;
276 common->ani.resetcal_timer = timestamp;
367 } 277 }
368 } else { 278 } else {
369 if ((timestamp - sc->ani.resetcal_timer) >= 279 if ((timestamp - common->ani.resetcal_timer) >=
370 ATH_RESTART_CALINTERVAL) { 280 ATH_RESTART_CALINTERVAL) {
371 sc->ani.caldone = ath9k_hw_reset_calvalid(ah); 281 common->ani.caldone = ath9k_hw_reset_calvalid(ah);
372 if (sc->ani.caldone) 282 if (common->ani.caldone)
373 sc->ani.resetcal_timer = timestamp; 283 common->ani.resetcal_timer = timestamp;
374 } 284 }
375 } 285 }
376 286
377 /* Verify whether we must check ANI */ 287 /* Verify whether we must check ANI */
378 if ((timestamp - sc->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) { 288 if ((timestamp - common->ani.checkani_timer) >= ATH_ANI_POLLINTERVAL) {
379 aniflag = true; 289 aniflag = true;
380 sc->ani.checkani_timer = timestamp; 290 common->ani.checkani_timer = timestamp;
381 } 291 }
382 292
383 /* Skip all processing if there's nothing to do. */ 293 /* Skip all processing if there's nothing to do. */
@@ -388,23 +298,27 @@ static void ath_ani_calibrate(unsigned long data)
388 298
389 /* Perform calibration if necessary */ 299 /* Perform calibration if necessary */
390 if (longcal || shortcal) { 300 if (longcal || shortcal) {
391 sc->ani.caldone = ath9k_hw_calibrate(ah, ah->curchan, 301 common->ani.caldone =
392 sc->rx_chainmask, longcal); 302 ath9k_hw_calibrate(ah,
303 ah->curchan,
304 common->rx_chainmask,
305 longcal);
393 306
394 if (longcal) 307 if (longcal)
395 sc->ani.noise_floor = ath9k_hw_getchan_noise(ah, 308 common->ani.noise_floor = ath9k_hw_getchan_noise(ah,
396 ah->curchan); 309 ah->curchan);
397 310
398 DPRINTF(sc, ATH_DBG_ANI," calibrate chan %u/%x nf: %d\n", 311 ath_print(common, ATH_DBG_ANI,
399 ah->curchan->channel, ah->curchan->channelFlags, 312 " calibrate chan %u/%x nf: %d\n",
400 sc->ani.noise_floor); 313 ah->curchan->channel,
314 ah->curchan->channelFlags,
315 common->ani.noise_floor);
401 } 316 }
402 } 317 }
403 318
404 ath9k_ps_restore(sc); 319 ath9k_ps_restore(sc);
405 320
406set_timer: 321set_timer:
407 spin_unlock(&sc->ani_lock);
408 /* 322 /*
409 * Set timer interval based on previous results. 323 * Set timer interval based on previous results.
410 * The interval must be the shortest necessary to satisfy ANI, 324 * The interval must be the shortest necessary to satisfy ANI,
@@ -413,21 +327,21 @@ set_timer:
413 cal_interval = ATH_LONG_CALINTERVAL; 327 cal_interval = ATH_LONG_CALINTERVAL;
414 if (sc->sc_ah->config.enable_ani) 328 if (sc->sc_ah->config.enable_ani)
415 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL); 329 cal_interval = min(cal_interval, (u32)ATH_ANI_POLLINTERVAL);
416 if (!sc->ani.caldone) 330 if (!common->ani.caldone)
417 cal_interval = min(cal_interval, (u32)short_cal_interval); 331 cal_interval = min(cal_interval, (u32)short_cal_interval);
418 332
419 mod_timer(&sc->ani.timer, jiffies + msecs_to_jiffies(cal_interval)); 333 mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
420} 334}
421 335
422static void ath_start_ani(struct ath_softc *sc) 336static void ath_start_ani(struct ath_common *common)
423{ 337{
424 unsigned long timestamp = jiffies_to_msecs(jiffies); 338 unsigned long timestamp = jiffies_to_msecs(jiffies);
425 339
426 sc->ani.longcal_timer = timestamp; 340 common->ani.longcal_timer = timestamp;
427 sc->ani.shortcal_timer = timestamp; 341 common->ani.shortcal_timer = timestamp;
428 sc->ani.checkani_timer = timestamp; 342 common->ani.checkani_timer = timestamp;
429 343
430 mod_timer(&sc->ani.timer, 344 mod_timer(&common->ani.timer,
431 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL)); 345 jiffies + msecs_to_jiffies(ATH_ANI_POLLINTERVAL));
432} 346}
433 347
@@ -439,17 +353,22 @@ static void ath_start_ani(struct ath_softc *sc)
439 */ 353 */
440void ath_update_chainmask(struct ath_softc *sc, int is_ht) 354void ath_update_chainmask(struct ath_softc *sc, int is_ht)
441{ 355{
356 struct ath_hw *ah = sc->sc_ah;
357 struct ath_common *common = ath9k_hw_common(ah);
358
442 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht || 359 if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
443 (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) { 360 (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
444 sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask; 361 common->tx_chainmask = ah->caps.tx_chainmask;
445 sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask; 362 common->rx_chainmask = ah->caps.rx_chainmask;
446 } else { 363 } else {
447 sc->tx_chainmask = 1; 364 common->tx_chainmask = 1;
448 sc->rx_chainmask = 1; 365 common->rx_chainmask = 1;
449 } 366 }
450 367
451 DPRINTF(sc, ATH_DBG_CONFIG, "tx chmask: %d, rx chmask: %d\n", 368 ath_print(common, ATH_DBG_CONFIG,
452 sc->tx_chainmask, sc->rx_chainmask); 369 "tx chmask: %d, rx chmask: %d\n",
370 common->tx_chainmask,
371 common->rx_chainmask);
453} 372}
454 373
455static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta) 374static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
@@ -475,9 +394,12 @@ static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
475 ath_tx_node_cleanup(sc, an); 394 ath_tx_node_cleanup(sc, an);
476} 395}
477 396
478static void ath9k_tasklet(unsigned long data) 397void ath9k_tasklet(unsigned long data)
479{ 398{
480 struct ath_softc *sc = (struct ath_softc *)data; 399 struct ath_softc *sc = (struct ath_softc *)data;
400 struct ath_hw *ah = sc->sc_ah;
401 struct ath_common *common = ath9k_hw_common(ah);
402
481 u32 status = sc->intrstatus; 403 u32 status = sc->intrstatus;
482 404
483 ath9k_ps_wakeup(sc); 405 ath9k_ps_wakeup(sc);
@@ -502,16 +424,17 @@ static void ath9k_tasklet(unsigned long data)
502 * TSF sync does not look correct; remain awake to sync with 424 * TSF sync does not look correct; remain awake to sync with
503 * the next Beacon. 425 * the next Beacon.
504 */ 426 */
505 DPRINTF(sc, ATH_DBG_PS, "TSFOOR - Sync with next Beacon\n"); 427 ath_print(common, ATH_DBG_PS,
506 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON | SC_OP_BEACON_SYNC; 428 "TSFOOR - Sync with next Beacon\n");
429 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
507 } 430 }
508 431
509 if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) 432 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
510 if (status & ATH9K_INT_GENTIMER) 433 if (status & ATH9K_INT_GENTIMER)
511 ath_gen_timer_isr(sc->sc_ah); 434 ath_gen_timer_isr(sc->sc_ah);
512 435
513 /* re-enable hardware interrupt */ 436 /* re-enable hardware interrupt */
514 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 437 ath9k_hw_set_interrupts(ah, sc->imask);
515 ath9k_ps_restore(sc); 438 ath9k_ps_restore(sc);
516} 439}
517 440
@@ -602,9 +525,9 @@ irqreturn_t ath_isr(int irq, void *dev)
602 if (status & ATH9K_INT_TIM_TIMER) { 525 if (status & ATH9K_INT_TIM_TIMER) {
603 /* Clear RxAbort bit so that we can 526 /* Clear RxAbort bit so that we can
604 * receive frames */ 527 * receive frames */
605 ath9k_hw_setpower(ah, ATH9K_PM_AWAKE); 528 ath9k_setpower(sc, ATH9K_PM_AWAKE);
606 ath9k_hw_setrxabort(sc->sc_ah, 0); 529 ath9k_hw_setrxabort(sc->sc_ah, 0);
607 sc->sc_flags |= SC_OP_WAIT_FOR_BEACON; 530 sc->ps_flags |= PS_WAIT_FOR_BEACON;
608 } 531 }
609 532
610chip_reset: 533chip_reset:
@@ -664,10 +587,11 @@ static u32 ath_get_extchanmode(struct ath_softc *sc,
664 return chanmode; 587 return chanmode;
665} 588}
666 589
667static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key, 590static int ath_setkey_tkip(struct ath_common *common, u16 keyix, const u8 *key,
668 struct ath9k_keyval *hk, const u8 *addr, 591 struct ath9k_keyval *hk, const u8 *addr,
669 bool authenticator) 592 bool authenticator)
670{ 593{
594 struct ath_hw *ah = common->ah;
671 const u8 *key_rxmic; 595 const u8 *key_rxmic;
672 const u8 *key_txmic; 596 const u8 *key_txmic;
673 597
@@ -687,42 +611,42 @@ static int ath_setkey_tkip(struct ath_softc *sc, u16 keyix, const u8 *key,
687 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); 611 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
688 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic)); 612 memcpy(hk->kv_txmic, key_rxmic, sizeof(hk->kv_mic));
689 } 613 }
690 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, addr); 614 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
691 } 615 }
692 if (!sc->splitmic) { 616 if (!common->splitmic) {
693 /* TX and RX keys share the same key cache entry. */ 617 /* TX and RX keys share the same key cache entry. */
694 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); 618 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
695 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic)); 619 memcpy(hk->kv_txmic, key_txmic, sizeof(hk->kv_txmic));
696 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, addr); 620 return ath9k_hw_set_keycache_entry(ah, keyix, hk, addr);
697 } 621 }
698 622
699 /* Separate key cache entries for TX and RX */ 623 /* Separate key cache entries for TX and RX */
700 624
701 /* TX key goes at first index, RX key at +32. */ 625 /* TX key goes at first index, RX key at +32. */
702 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic)); 626 memcpy(hk->kv_mic, key_txmic, sizeof(hk->kv_mic));
703 if (!ath9k_hw_set_keycache_entry(sc->sc_ah, keyix, hk, NULL)) { 627 if (!ath9k_hw_set_keycache_entry(ah, keyix, hk, NULL)) {
704 /* TX MIC entry failed. No need to proceed further */ 628 /* TX MIC entry failed. No need to proceed further */
705 DPRINTF(sc, ATH_DBG_FATAL, 629 ath_print(common, ATH_DBG_FATAL,
706 "Setting TX MIC Key Failed\n"); 630 "Setting TX MIC Key Failed\n");
707 return 0; 631 return 0;
708 } 632 }
709 633
710 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic)); 634 memcpy(hk->kv_mic, key_rxmic, sizeof(hk->kv_mic));
711 /* XXX delete tx key on failure? */ 635 /* XXX delete tx key on failure? */
712 return ath9k_hw_set_keycache_entry(sc->sc_ah, keyix + 32, hk, addr); 636 return ath9k_hw_set_keycache_entry(ah, keyix + 32, hk, addr);
713} 637}
714 638
715static int ath_reserve_key_cache_slot_tkip(struct ath_softc *sc) 639static int ath_reserve_key_cache_slot_tkip(struct ath_common *common)
716{ 640{
717 int i; 641 int i;
718 642
719 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) { 643 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
720 if (test_bit(i, sc->keymap) || 644 if (test_bit(i, common->keymap) ||
721 test_bit(i + 64, sc->keymap)) 645 test_bit(i + 64, common->keymap))
722 continue; /* At least one part of TKIP key allocated */ 646 continue; /* At least one part of TKIP key allocated */
723 if (sc->splitmic && 647 if (common->splitmic &&
724 (test_bit(i + 32, sc->keymap) || 648 (test_bit(i + 32, common->keymap) ||
725 test_bit(i + 64 + 32, sc->keymap))) 649 test_bit(i + 64 + 32, common->keymap)))
726 continue; /* At least one part of TKIP key allocated */ 650 continue; /* At least one part of TKIP key allocated */
727 651
728 /* Found a free slot for a TKIP key */ 652 /* Found a free slot for a TKIP key */
@@ -731,60 +655,60 @@ static int ath_reserve_key_cache_slot_tkip(struct ath_softc *sc)
731 return -1; 655 return -1;
732} 656}
733 657
734static int ath_reserve_key_cache_slot(struct ath_softc *sc) 658static int ath_reserve_key_cache_slot(struct ath_common *common)
735{ 659{
736 int i; 660 int i;
737 661
738 /* First, try to find slots that would not be available for TKIP. */ 662 /* First, try to find slots that would not be available for TKIP. */
739 if (sc->splitmic) { 663 if (common->splitmic) {
740 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 4; i++) { 664 for (i = IEEE80211_WEP_NKID; i < common->keymax / 4; i++) {
741 if (!test_bit(i, sc->keymap) && 665 if (!test_bit(i, common->keymap) &&
742 (test_bit(i + 32, sc->keymap) || 666 (test_bit(i + 32, common->keymap) ||
743 test_bit(i + 64, sc->keymap) || 667 test_bit(i + 64, common->keymap) ||
744 test_bit(i + 64 + 32, sc->keymap))) 668 test_bit(i + 64 + 32, common->keymap)))
745 return i; 669 return i;
746 if (!test_bit(i + 32, sc->keymap) && 670 if (!test_bit(i + 32, common->keymap) &&
747 (test_bit(i, sc->keymap) || 671 (test_bit(i, common->keymap) ||
748 test_bit(i + 64, sc->keymap) || 672 test_bit(i + 64, common->keymap) ||
749 test_bit(i + 64 + 32, sc->keymap))) 673 test_bit(i + 64 + 32, common->keymap)))
750 return i + 32; 674 return i + 32;
751 if (!test_bit(i + 64, sc->keymap) && 675 if (!test_bit(i + 64, common->keymap) &&
752 (test_bit(i , sc->keymap) || 676 (test_bit(i , common->keymap) ||
753 test_bit(i + 32, sc->keymap) || 677 test_bit(i + 32, common->keymap) ||
754 test_bit(i + 64 + 32, sc->keymap))) 678 test_bit(i + 64 + 32, common->keymap)))
755 return i + 64; 679 return i + 64;
756 if (!test_bit(i + 64 + 32, sc->keymap) && 680 if (!test_bit(i + 64 + 32, common->keymap) &&
757 (test_bit(i, sc->keymap) || 681 (test_bit(i, common->keymap) ||
758 test_bit(i + 32, sc->keymap) || 682 test_bit(i + 32, common->keymap) ||
759 test_bit(i + 64, sc->keymap))) 683 test_bit(i + 64, common->keymap)))
760 return i + 64 + 32; 684 return i + 64 + 32;
761 } 685 }
762 } else { 686 } else {
763 for (i = IEEE80211_WEP_NKID; i < sc->keymax / 2; i++) { 687 for (i = IEEE80211_WEP_NKID; i < common->keymax / 2; i++) {
764 if (!test_bit(i, sc->keymap) && 688 if (!test_bit(i, common->keymap) &&
765 test_bit(i + 64, sc->keymap)) 689 test_bit(i + 64, common->keymap))
766 return i; 690 return i;
767 if (test_bit(i, sc->keymap) && 691 if (test_bit(i, common->keymap) &&
768 !test_bit(i + 64, sc->keymap)) 692 !test_bit(i + 64, common->keymap))
769 return i + 64; 693 return i + 64;
770 } 694 }
771 } 695 }
772 696
773 /* No partially used TKIP slots, pick any available slot */ 697 /* No partially used TKIP slots, pick any available slot */
774 for (i = IEEE80211_WEP_NKID; i < sc->keymax; i++) { 698 for (i = IEEE80211_WEP_NKID; i < common->keymax; i++) {
775 /* Do not allow slots that could be needed for TKIP group keys 699 /* Do not allow slots that could be needed for TKIP group keys
776 * to be used. This limitation could be removed if we know that 700 * to be used. This limitation could be removed if we know that
777 * TKIP will not be used. */ 701 * TKIP will not be used. */
778 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID) 702 if (i >= 64 && i < 64 + IEEE80211_WEP_NKID)
779 continue; 703 continue;
780 if (sc->splitmic) { 704 if (common->splitmic) {
781 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID) 705 if (i >= 32 && i < 32 + IEEE80211_WEP_NKID)
782 continue; 706 continue;
783 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID) 707 if (i >= 64 + 32 && i < 64 + 32 + IEEE80211_WEP_NKID)
784 continue; 708 continue;
785 } 709 }
786 710
787 if (!test_bit(i, sc->keymap)) 711 if (!test_bit(i, common->keymap))
788 return i; /* Found a free slot for a key */ 712 return i; /* Found a free slot for a key */
789 } 713 }
790 714
@@ -792,11 +716,12 @@ static int ath_reserve_key_cache_slot(struct ath_softc *sc)
792 return -1; 716 return -1;
793} 717}
794 718
795static int ath_key_config(struct ath_softc *sc, 719static int ath_key_config(struct ath_common *common,
796 struct ieee80211_vif *vif, 720 struct ieee80211_vif *vif,
797 struct ieee80211_sta *sta, 721 struct ieee80211_sta *sta,
798 struct ieee80211_key_conf *key) 722 struct ieee80211_key_conf *key)
799{ 723{
724 struct ath_hw *ah = common->ah;
800 struct ath9k_keyval hk; 725 struct ath9k_keyval hk;
801 const u8 *mac = NULL; 726 const u8 *mac = NULL;
802 int ret = 0; 727 int ret = 0;
@@ -842,104 +767,76 @@ static int ath_key_config(struct ath_softc *sc,
842 mac = sta->addr; 767 mac = sta->addr;
843 768
844 if (key->alg == ALG_TKIP) 769 if (key->alg == ALG_TKIP)
845 idx = ath_reserve_key_cache_slot_tkip(sc); 770 idx = ath_reserve_key_cache_slot_tkip(common);
846 else 771 else
847 idx = ath_reserve_key_cache_slot(sc); 772 idx = ath_reserve_key_cache_slot(common);
848 if (idx < 0) 773 if (idx < 0)
849 return -ENOSPC; /* no free key cache entries */ 774 return -ENOSPC; /* no free key cache entries */
850 } 775 }
851 776
852 if (key->alg == ALG_TKIP) 777 if (key->alg == ALG_TKIP)
853 ret = ath_setkey_tkip(sc, idx, key->key, &hk, mac, 778 ret = ath_setkey_tkip(common, idx, key->key, &hk, mac,
854 vif->type == NL80211_IFTYPE_AP); 779 vif->type == NL80211_IFTYPE_AP);
855 else 780 else
856 ret = ath9k_hw_set_keycache_entry(sc->sc_ah, idx, &hk, mac); 781 ret = ath9k_hw_set_keycache_entry(ah, idx, &hk, mac);
857 782
858 if (!ret) 783 if (!ret)
859 return -EIO; 784 return -EIO;
860 785
861 set_bit(idx, sc->keymap); 786 set_bit(idx, common->keymap);
862 if (key->alg == ALG_TKIP) { 787 if (key->alg == ALG_TKIP) {
863 set_bit(idx + 64, sc->keymap); 788 set_bit(idx + 64, common->keymap);
864 if (sc->splitmic) { 789 if (common->splitmic) {
865 set_bit(idx + 32, sc->keymap); 790 set_bit(idx + 32, common->keymap);
866 set_bit(idx + 64 + 32, sc->keymap); 791 set_bit(idx + 64 + 32, common->keymap);
867 } 792 }
868 } 793 }
869 794
870 return idx; 795 return idx;
871} 796}
872 797
873static void ath_key_delete(struct ath_softc *sc, struct ieee80211_key_conf *key) 798static void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key)
874{ 799{
875 ath9k_hw_keyreset(sc->sc_ah, key->hw_key_idx); 800 struct ath_hw *ah = common->ah;
801
802 ath9k_hw_keyreset(ah, key->hw_key_idx);
876 if (key->hw_key_idx < IEEE80211_WEP_NKID) 803 if (key->hw_key_idx < IEEE80211_WEP_NKID)
877 return; 804 return;
878 805
879 clear_bit(key->hw_key_idx, sc->keymap); 806 clear_bit(key->hw_key_idx, common->keymap);
880 if (key->alg != ALG_TKIP) 807 if (key->alg != ALG_TKIP)
881 return; 808 return;
882 809
883 clear_bit(key->hw_key_idx + 64, sc->keymap); 810 clear_bit(key->hw_key_idx + 64, common->keymap);
884 if (sc->splitmic) { 811 if (common->splitmic) {
885 clear_bit(key->hw_key_idx + 32, sc->keymap); 812 ath9k_hw_keyreset(ah, key->hw_key_idx + 32);
886 clear_bit(key->hw_key_idx + 64 + 32, sc->keymap); 813 clear_bit(key->hw_key_idx + 32, common->keymap);
814 clear_bit(key->hw_key_idx + 64 + 32, common->keymap);
887 } 815 }
888} 816}
889 817
890static void setup_ht_cap(struct ath_softc *sc,
891 struct ieee80211_sta_ht_cap *ht_info)
892{
893 u8 tx_streams, rx_streams;
894
895 ht_info->ht_supported = true;
896 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
897 IEEE80211_HT_CAP_SM_PS |
898 IEEE80211_HT_CAP_SGI_40 |
899 IEEE80211_HT_CAP_DSSSCCK40;
900
901 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
902 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
903
904 /* set up supported mcs set */
905 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
906 tx_streams = !(sc->tx_chainmask & (sc->tx_chainmask - 1)) ? 1 : 2;
907 rx_streams = !(sc->rx_chainmask & (sc->rx_chainmask - 1)) ? 1 : 2;
908
909 if (tx_streams != rx_streams) {
910 DPRINTF(sc, ATH_DBG_CONFIG, "TX streams %d, RX streams: %d\n",
911 tx_streams, rx_streams);
912 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
913 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
914 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
915 }
916
917 ht_info->mcs.rx_mask[0] = 0xff;
918 if (rx_streams >= 2)
919 ht_info->mcs.rx_mask[1] = 0xff;
920
921 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
922}
923
924static void ath9k_bss_assoc_info(struct ath_softc *sc, 818static void ath9k_bss_assoc_info(struct ath_softc *sc,
925 struct ieee80211_vif *vif, 819 struct ieee80211_vif *vif,
926 struct ieee80211_bss_conf *bss_conf) 820 struct ieee80211_bss_conf *bss_conf)
927{ 821{
822 struct ath_hw *ah = sc->sc_ah;
823 struct ath_common *common = ath9k_hw_common(ah);
928 824
929 if (bss_conf->assoc) { 825 if (bss_conf->assoc) {
930 DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info ASSOC %d, bssid: %pM\n", 826 ath_print(common, ATH_DBG_CONFIG,
931 bss_conf->aid, sc->curbssid); 827 "Bss Info ASSOC %d, bssid: %pM\n",
828 bss_conf->aid, common->curbssid);
932 829
933 /* New association, store aid */ 830 /* New association, store aid */
934 sc->curaid = bss_conf->aid; 831 common->curaid = bss_conf->aid;
935 ath9k_hw_write_associd(sc); 832 ath9k_hw_write_associd(ah);
936 833
937 /* 834 /*
938 * Request a re-configuration of Beacon related timers 835 * Request a re-configuration of Beacon related timers
939 * on the receipt of the first Beacon frame (i.e., 836 * on the receipt of the first Beacon frame (i.e.,
940 * after time sync with the AP). 837 * after time sync with the AP).
941 */ 838 */
942 sc->sc_flags |= SC_OP_BEACON_SYNC; 839 sc->ps_flags |= PS_BEACON_SYNC;
943 840
944 /* Configure the beacon */ 841 /* Configure the beacon */
945 ath_beacon_config(sc, vif); 842 ath_beacon_config(sc, vif);
@@ -947,187 +844,20 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
947 /* Reset rssi stats */ 844 /* Reset rssi stats */
948 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 845 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
949 846
950 ath_start_ani(sc); 847 ath_start_ani(common);
951 } else { 848 } else {
952 DPRINTF(sc, ATH_DBG_CONFIG, "Bss Info DISASSOC\n"); 849 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
953 sc->curaid = 0; 850 common->curaid = 0;
954 /* Stop ANI */ 851 /* Stop ANI */
955 del_timer_sync(&sc->ani.timer); 852 del_timer_sync(&common->ani.timer);
956 } 853 }
957} 854}
958 855
959/********************************/ 856void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
960/* LED functions */
961/********************************/
962
963static void ath_led_blink_work(struct work_struct *work)
964{
965 struct ath_softc *sc = container_of(work, struct ath_softc,
966 ath_led_blink_work.work);
967
968 if (!(sc->sc_flags & SC_OP_LED_ASSOCIATED))
969 return;
970
971 if ((sc->led_on_duration == ATH_LED_ON_DURATION_IDLE) ||
972 (sc->led_off_duration == ATH_LED_OFF_DURATION_IDLE))
973 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
974 else
975 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
976 (sc->sc_flags & SC_OP_LED_ON) ? 1 : 0);
977
978 ieee80211_queue_delayed_work(sc->hw,
979 &sc->ath_led_blink_work,
980 (sc->sc_flags & SC_OP_LED_ON) ?
981 msecs_to_jiffies(sc->led_off_duration) :
982 msecs_to_jiffies(sc->led_on_duration));
983
984 sc->led_on_duration = sc->led_on_cnt ?
985 max((ATH_LED_ON_DURATION_IDLE - sc->led_on_cnt), 25) :
986 ATH_LED_ON_DURATION_IDLE;
987 sc->led_off_duration = sc->led_off_cnt ?
988 max((ATH_LED_OFF_DURATION_IDLE - sc->led_off_cnt), 10) :
989 ATH_LED_OFF_DURATION_IDLE;
990 sc->led_on_cnt = sc->led_off_cnt = 0;
991 if (sc->sc_flags & SC_OP_LED_ON)
992 sc->sc_flags &= ~SC_OP_LED_ON;
993 else
994 sc->sc_flags |= SC_OP_LED_ON;
995}
996
997static void ath_led_brightness(struct led_classdev *led_cdev,
998 enum led_brightness brightness)
999{
1000 struct ath_led *led = container_of(led_cdev, struct ath_led, led_cdev);
1001 struct ath_softc *sc = led->sc;
1002
1003 switch (brightness) {
1004 case LED_OFF:
1005 if (led->led_type == ATH_LED_ASSOC ||
1006 led->led_type == ATH_LED_RADIO) {
1007 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin,
1008 (led->led_type == ATH_LED_RADIO));
1009 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1010 if (led->led_type == ATH_LED_RADIO)
1011 sc->sc_flags &= ~SC_OP_LED_ON;
1012 } else {
1013 sc->led_off_cnt++;
1014 }
1015 break;
1016 case LED_FULL:
1017 if (led->led_type == ATH_LED_ASSOC) {
1018 sc->sc_flags |= SC_OP_LED_ASSOCIATED;
1019 ieee80211_queue_delayed_work(sc->hw,
1020 &sc->ath_led_blink_work, 0);
1021 } else if (led->led_type == ATH_LED_RADIO) {
1022 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
1023 sc->sc_flags |= SC_OP_LED_ON;
1024 } else {
1025 sc->led_on_cnt++;
1026 }
1027 break;
1028 default:
1029 break;
1030 }
1031}
1032
1033static int ath_register_led(struct ath_softc *sc, struct ath_led *led,
1034 char *trigger)
1035{
1036 int ret;
1037
1038 led->sc = sc;
1039 led->led_cdev.name = led->name;
1040 led->led_cdev.default_trigger = trigger;
1041 led->led_cdev.brightness_set = ath_led_brightness;
1042
1043 ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &led->led_cdev);
1044 if (ret)
1045 DPRINTF(sc, ATH_DBG_FATAL,
1046 "Failed to register led:%s", led->name);
1047 else
1048 led->registered = 1;
1049 return ret;
1050}
1051
1052static void ath_unregister_led(struct ath_led *led)
1053{
1054 if (led->registered) {
1055 led_classdev_unregister(&led->led_cdev);
1056 led->registered = 0;
1057 }
1058}
1059
1060static void ath_deinit_leds(struct ath_softc *sc)
1061{
1062 ath_unregister_led(&sc->assoc_led);
1063 sc->sc_flags &= ~SC_OP_LED_ASSOCIATED;
1064 ath_unregister_led(&sc->tx_led);
1065 ath_unregister_led(&sc->rx_led);
1066 ath_unregister_led(&sc->radio_led);
1067 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
1068}
1069
1070static void ath_init_leds(struct ath_softc *sc)
1071{
1072 char *trigger;
1073 int ret;
1074
1075 if (AR_SREV_9287(sc->sc_ah))
1076 sc->sc_ah->led_pin = ATH_LED_PIN_9287;
1077 else
1078 sc->sc_ah->led_pin = ATH_LED_PIN_DEF;
1079
1080 /* Configure gpio 1 for output */
1081 ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
1082 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1083 /* LED off, active low */
1084 ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
1085
1086 INIT_DELAYED_WORK(&sc->ath_led_blink_work, ath_led_blink_work);
1087
1088 trigger = ieee80211_get_radio_led_name(sc->hw);
1089 snprintf(sc->radio_led.name, sizeof(sc->radio_led.name),
1090 "ath9k-%s::radio", wiphy_name(sc->hw->wiphy));
1091 ret = ath_register_led(sc, &sc->radio_led, trigger);
1092 sc->radio_led.led_type = ATH_LED_RADIO;
1093 if (ret)
1094 goto fail;
1095
1096 trigger = ieee80211_get_assoc_led_name(sc->hw);
1097 snprintf(sc->assoc_led.name, sizeof(sc->assoc_led.name),
1098 "ath9k-%s::assoc", wiphy_name(sc->hw->wiphy));
1099 ret = ath_register_led(sc, &sc->assoc_led, trigger);
1100 sc->assoc_led.led_type = ATH_LED_ASSOC;
1101 if (ret)
1102 goto fail;
1103
1104 trigger = ieee80211_get_tx_led_name(sc->hw);
1105 snprintf(sc->tx_led.name, sizeof(sc->tx_led.name),
1106 "ath9k-%s::tx", wiphy_name(sc->hw->wiphy));
1107 ret = ath_register_led(sc, &sc->tx_led, trigger);
1108 sc->tx_led.led_type = ATH_LED_TX;
1109 if (ret)
1110 goto fail;
1111
1112 trigger = ieee80211_get_rx_led_name(sc->hw);
1113 snprintf(sc->rx_led.name, sizeof(sc->rx_led.name),
1114 "ath9k-%s::rx", wiphy_name(sc->hw->wiphy));
1115 ret = ath_register_led(sc, &sc->rx_led, trigger);
1116 sc->rx_led.led_type = ATH_LED_RX;
1117 if (ret)
1118 goto fail;
1119
1120 return;
1121
1122fail:
1123 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1124 ath_deinit_leds(sc);
1125}
1126
1127void ath_radio_enable(struct ath_softc *sc)
1128{ 857{
1129 struct ath_hw *ah = sc->sc_ah; 858 struct ath_hw *ah = sc->sc_ah;
1130 struct ieee80211_channel *channel = sc->hw->conf.channel; 859 struct ath_common *common = ath9k_hw_common(ah);
860 struct ieee80211_channel *channel = hw->conf.channel;
1131 int r; 861 int r;
1132 862
1133 ath9k_ps_wakeup(sc); 863 ath9k_ps_wakeup(sc);
@@ -1139,17 +869,17 @@ void ath_radio_enable(struct ath_softc *sc)
1139 spin_lock_bh(&sc->sc_resetlock); 869 spin_lock_bh(&sc->sc_resetlock);
1140 r = ath9k_hw_reset(ah, ah->curchan, false); 870 r = ath9k_hw_reset(ah, ah->curchan, false);
1141 if (r) { 871 if (r) {
1142 DPRINTF(sc, ATH_DBG_FATAL, 872 ath_print(common, ATH_DBG_FATAL,
1143 "Unable to reset channel %u (%uMhz) ", 873 "Unable to reset channel (%u MHz), "
1144 "reset status %d\n", 874 "reset status %d\n",
1145 channel->center_freq, r); 875 channel->center_freq, r);
1146 } 876 }
1147 spin_unlock_bh(&sc->sc_resetlock); 877 spin_unlock_bh(&sc->sc_resetlock);
1148 878
1149 ath_update_txpow(sc); 879 ath_update_txpow(sc);
1150 if (ath_startrecv(sc) != 0) { 880 if (ath_startrecv(sc) != 0) {
1151 DPRINTF(sc, ATH_DBG_FATAL, 881 ath_print(common, ATH_DBG_FATAL,
1152 "Unable to restart recv logic\n"); 882 "Unable to restart recv logic\n");
1153 return; 883 return;
1154 } 884 }
1155 885
@@ -1164,18 +894,18 @@ void ath_radio_enable(struct ath_softc *sc)
1164 AR_GPIO_OUTPUT_MUX_AS_OUTPUT); 894 AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
1165 ath9k_hw_set_gpio(ah, ah->led_pin, 0); 895 ath9k_hw_set_gpio(ah, ah->led_pin, 0);
1166 896
1167 ieee80211_wake_queues(sc->hw); 897 ieee80211_wake_queues(hw);
1168 ath9k_ps_restore(sc); 898 ath9k_ps_restore(sc);
1169} 899}
1170 900
1171void ath_radio_disable(struct ath_softc *sc) 901void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
1172{ 902{
1173 struct ath_hw *ah = sc->sc_ah; 903 struct ath_hw *ah = sc->sc_ah;
1174 struct ieee80211_channel *channel = sc->hw->conf.channel; 904 struct ieee80211_channel *channel = hw->conf.channel;
1175 int r; 905 int r;
1176 906
1177 ath9k_ps_wakeup(sc); 907 ath9k_ps_wakeup(sc);
1178 ieee80211_stop_queues(sc->hw); 908 ieee80211_stop_queues(hw);
1179 909
1180 /* Disable LED */ 910 /* Disable LED */
1181 ath9k_hw_set_gpio(ah, ah->led_pin, 1); 911 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
@@ -1189,471 +919,36 @@ void ath_radio_disable(struct ath_softc *sc)
1189 ath_flushrecv(sc); /* flush recv queue */ 919 ath_flushrecv(sc); /* flush recv queue */
1190 920
1191 if (!ah->curchan) 921 if (!ah->curchan)
1192 ah->curchan = ath_get_curchannel(sc, sc->hw); 922 ah->curchan = ath_get_curchannel(sc, hw);
1193 923
1194 spin_lock_bh(&sc->sc_resetlock); 924 spin_lock_bh(&sc->sc_resetlock);
1195 r = ath9k_hw_reset(ah, ah->curchan, false); 925 r = ath9k_hw_reset(ah, ah->curchan, false);
1196 if (r) { 926 if (r) {
1197 DPRINTF(sc, ATH_DBG_FATAL, 927 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1198 "Unable to reset channel %u (%uMhz) " 928 "Unable to reset channel (%u MHz), "
1199 "reset status %d\n", 929 "reset status %d\n",
1200 channel->center_freq, r); 930 channel->center_freq, r);
1201 } 931 }
1202 spin_unlock_bh(&sc->sc_resetlock); 932 spin_unlock_bh(&sc->sc_resetlock);
1203 933
1204 ath9k_hw_phy_disable(ah); 934 ath9k_hw_phy_disable(ah);
1205 ath9k_hw_configpcipowersave(ah, 1, 1); 935 ath9k_hw_configpcipowersave(ah, 1, 1);
1206 ath9k_ps_restore(sc); 936 ath9k_ps_restore(sc);
1207 ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP); 937 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1208}
1209
1210/*******************/
1211/* Rfkill */
1212/*******************/
1213
1214static bool ath_is_rfkill_set(struct ath_softc *sc)
1215{
1216 struct ath_hw *ah = sc->sc_ah;
1217
1218 return ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
1219 ah->rfkill_polarity;
1220}
1221
1222static void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
1223{
1224 struct ath_wiphy *aphy = hw->priv;
1225 struct ath_softc *sc = aphy->sc;
1226 bool blocked = !!ath_is_rfkill_set(sc);
1227
1228 wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
1229}
1230
1231static void ath_start_rfkill_poll(struct ath_softc *sc)
1232{
1233 struct ath_hw *ah = sc->sc_ah;
1234
1235 if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
1236 wiphy_rfkill_start_polling(sc->hw->wiphy);
1237}
1238
1239void ath_cleanup(struct ath_softc *sc)
1240{
1241 ath_detach(sc);
1242 free_irq(sc->irq, sc);
1243 ath_bus_cleanup(sc);
1244 kfree(sc->sec_wiphy);
1245 ieee80211_free_hw(sc->hw);
1246}
1247
1248void ath_detach(struct ath_softc *sc)
1249{
1250 struct ieee80211_hw *hw = sc->hw;
1251 int i = 0;
1252
1253 ath9k_ps_wakeup(sc);
1254
1255 DPRINTF(sc, ATH_DBG_CONFIG, "Detach ATH hw\n");
1256
1257 ath_deinit_leds(sc);
1258 wiphy_rfkill_stop_polling(sc->hw->wiphy);
1259
1260 for (i = 0; i < sc->num_sec_wiphy; i++) {
1261 struct ath_wiphy *aphy = sc->sec_wiphy[i];
1262 if (aphy == NULL)
1263 continue;
1264 sc->sec_wiphy[i] = NULL;
1265 ieee80211_unregister_hw(aphy->hw);
1266 ieee80211_free_hw(aphy->hw);
1267 }
1268 ieee80211_unregister_hw(hw);
1269 ath_rx_cleanup(sc);
1270 ath_tx_cleanup(sc);
1271
1272 tasklet_kill(&sc->intr_tq);
1273 tasklet_kill(&sc->bcon_tasklet);
1274
1275 if (!(sc->sc_flags & SC_OP_INVALID))
1276 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
1277
1278 /* cleanup tx queues */
1279 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1280 if (ATH_TXQ_SETUP(sc, i))
1281 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1282
1283 if ((sc->btcoex_info.no_stomp_timer) &&
1284 sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE)
1285 ath_gen_timer_free(sc->sc_ah, sc->btcoex_info.no_stomp_timer);
1286
1287 ath9k_hw_detach(sc->sc_ah);
1288 sc->sc_ah = NULL;
1289 ath9k_exit_debug(sc);
1290}
1291
1292static int ath9k_reg_notifier(struct wiphy *wiphy,
1293 struct regulatory_request *request)
1294{
1295 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
1296 struct ath_wiphy *aphy = hw->priv;
1297 struct ath_softc *sc = aphy->sc;
1298 struct ath_regulatory *reg = &sc->common.regulatory;
1299
1300 return ath_reg_notifier_apply(wiphy, request, reg);
1301}
1302
1303/*
1304 * Initialize and fill ath_softc, ath_sofct is the
1305 * "Software Carrier" struct. Historically it has existed
1306 * to allow the separation between hardware specific
1307 * variables (now in ath_hw) and driver specific variables.
1308 */
1309static int ath_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid)
1310{
1311 struct ath_hw *ah = NULL;
1312 int r = 0, i;
1313 int csz = 0;
1314
1315 /* XXX: hardware will not be ready until ath_open() being called */
1316 sc->sc_flags |= SC_OP_INVALID;
1317
1318 if (ath9k_init_debug(sc) < 0)
1319 printk(KERN_ERR "Unable to create debugfs files\n");
1320
1321 spin_lock_init(&sc->wiphy_lock);
1322 spin_lock_init(&sc->sc_resetlock);
1323 spin_lock_init(&sc->sc_serial_rw);
1324 spin_lock_init(&sc->ani_lock);
1325 spin_lock_init(&sc->sc_pm_lock);
1326 mutex_init(&sc->mutex);
1327 tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
1328 tasklet_init(&sc->bcon_tasklet, ath_beacon_tasklet,
1329 (unsigned long)sc);
1330
1331 /*
1332 * Cache line size is used to size and align various
1333 * structures used to communicate with the hardware.
1334 */
1335 ath_read_cachesize(sc, &csz);
1336 /* XXX assert csz is non-zero */
1337 sc->common.cachelsz = csz << 2; /* convert to bytes */
1338
1339 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
1340 if (!ah) {
1341 r = -ENOMEM;
1342 goto bad_no_ah;
1343 }
1344
1345 ah->ah_sc = sc;
1346 ah->hw_version.devid = devid;
1347 ah->hw_version.subsysid = subsysid;
1348 sc->sc_ah = ah;
1349
1350 r = ath9k_hw_init(ah);
1351 if (r) {
1352 DPRINTF(sc, ATH_DBG_FATAL,
1353 "Unable to initialize hardware; "
1354 "initialization status: %d\n", r);
1355 goto bad;
1356 }
1357
1358 /* Get the hardware key cache size. */
1359 sc->keymax = ah->caps.keycache_size;
1360 if (sc->keymax > ATH_KEYMAX) {
1361 DPRINTF(sc, ATH_DBG_ANY,
1362 "Warning, using only %u entries in %u key cache\n",
1363 ATH_KEYMAX, sc->keymax);
1364 sc->keymax = ATH_KEYMAX;
1365 }
1366
1367 /*
1368 * Reset the key cache since some parts do not
1369 * reset the contents on initial power up.
1370 */
1371 for (i = 0; i < sc->keymax; i++)
1372 ath9k_hw_keyreset(ah, (u16) i);
1373
1374 /* default to MONITOR mode */
1375 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1376
1377 /* Setup rate tables */
1378
1379 ath_rate_attach(sc);
1380 ath_setup_rates(sc, IEEE80211_BAND_2GHZ);
1381 ath_setup_rates(sc, IEEE80211_BAND_5GHZ);
1382
1383 /*
1384 * Allocate hardware transmit queues: one queue for
1385 * beacon frames and one data queue for each QoS
1386 * priority. Note that the hal handles reseting
1387 * these queues at the needed time.
1388 */
1389 sc->beacon.beaconq = ath_beaconq_setup(ah);
1390 if (sc->beacon.beaconq == -1) {
1391 DPRINTF(sc, ATH_DBG_FATAL,
1392 "Unable to setup a beacon xmit queue\n");
1393 r = -EIO;
1394 goto bad2;
1395 }
1396 sc->beacon.cabq = ath_txq_setup(sc, ATH9K_TX_QUEUE_CAB, 0);
1397 if (sc->beacon.cabq == NULL) {
1398 DPRINTF(sc, ATH_DBG_FATAL,
1399 "Unable to setup CAB xmit queue\n");
1400 r = -EIO;
1401 goto bad2;
1402 }
1403
1404 sc->config.cabqReadytime = ATH_CABQ_READY_TIME;
1405 ath_cabq_update(sc);
1406
1407 for (i = 0; i < ARRAY_SIZE(sc->tx.hwq_map); i++)
1408 sc->tx.hwq_map[i] = -1;
1409
1410 /* Setup data queues */
1411 /* NB: ensure BK queue is the lowest priority h/w queue */
1412 if (!ath_tx_setup(sc, ATH9K_WME_AC_BK)) {
1413 DPRINTF(sc, ATH_DBG_FATAL,
1414 "Unable to setup xmit queue for BK traffic\n");
1415 r = -EIO;
1416 goto bad2;
1417 }
1418
1419 if (!ath_tx_setup(sc, ATH9K_WME_AC_BE)) {
1420 DPRINTF(sc, ATH_DBG_FATAL,
1421 "Unable to setup xmit queue for BE traffic\n");
1422 r = -EIO;
1423 goto bad2;
1424 }
1425 if (!ath_tx_setup(sc, ATH9K_WME_AC_VI)) {
1426 DPRINTF(sc, ATH_DBG_FATAL,
1427 "Unable to setup xmit queue for VI traffic\n");
1428 r = -EIO;
1429 goto bad2;
1430 }
1431 if (!ath_tx_setup(sc, ATH9K_WME_AC_VO)) {
1432 DPRINTF(sc, ATH_DBG_FATAL,
1433 "Unable to setup xmit queue for VO traffic\n");
1434 r = -EIO;
1435 goto bad2;
1436 }
1437
1438 /* Initializes the noise floor to a reasonable default value.
1439 * Later on this will be updated during ANI processing. */
1440
1441 sc->ani.noise_floor = ATH_DEFAULT_NOISE_FLOOR;
1442 setup_timer(&sc->ani.timer, ath_ani_calibrate, (unsigned long)sc);
1443
1444 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1445 ATH9K_CIPHER_TKIP, NULL)) {
1446 /*
1447 * Whether we should enable h/w TKIP MIC.
1448 * XXX: if we don't support WME TKIP MIC, then we wouldn't
1449 * report WMM capable, so it's always safe to turn on
1450 * TKIP MIC in this case.
1451 */
1452 ath9k_hw_setcapability(sc->sc_ah, ATH9K_CAP_TKIP_MIC,
1453 0, 1, NULL);
1454 }
1455
1456 /*
1457 * Check whether the separate key cache entries
1458 * are required to handle both tx+rx MIC keys.
1459 * With split mic keys the number of stations is limited
1460 * to 27 otherwise 59.
1461 */
1462 if (ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1463 ATH9K_CIPHER_TKIP, NULL)
1464 && ath9k_hw_getcapability(ah, ATH9K_CAP_CIPHER,
1465 ATH9K_CIPHER_MIC, NULL)
1466 && ath9k_hw_getcapability(ah, ATH9K_CAP_TKIP_SPLIT,
1467 0, NULL))
1468 sc->splitmic = 1;
1469
1470 /* turn on mcast key search if possible */
1471 if (!ath9k_hw_getcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 0, NULL))
1472 (void)ath9k_hw_setcapability(ah, ATH9K_CAP_MCAST_KEYSRCH, 1,
1473 1, NULL);
1474
1475 sc->config.txpowlimit = ATH_TXPOWER_MAX;
1476
1477 /* 11n Capabilities */
1478 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
1479 sc->sc_flags |= SC_OP_TXAGGR;
1480 sc->sc_flags |= SC_OP_RXAGGR;
1481 }
1482
1483 sc->tx_chainmask = ah->caps.tx_chainmask;
1484 sc->rx_chainmask = ah->caps.rx_chainmask;
1485
1486 ath9k_hw_setcapability(ah, ATH9K_CAP_DIVERSITY, 1, true, NULL);
1487 sc->rx.defant = ath9k_hw_getdefantenna(ah);
1488
1489 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
1490 memcpy(sc->bssidmask, ath_bcast_mac, ETH_ALEN);
1491
1492 sc->beacon.slottime = ATH9K_SLOT_TIME_9; /* default to short slot time */
1493
1494 /* initialize beacon slots */
1495 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1496 sc->beacon.bslot[i] = NULL;
1497 sc->beacon.bslot_aphy[i] = NULL;
1498 }
1499
1500 /* setup channels and rates */
1501
1502 sc->sbands[IEEE80211_BAND_2GHZ].channels = ath9k_2ghz_chantable;
1503 sc->sbands[IEEE80211_BAND_2GHZ].bitrates =
1504 sc->rates[IEEE80211_BAND_2GHZ];
1505 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
1506 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
1507 ARRAY_SIZE(ath9k_2ghz_chantable);
1508
1509 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes)) {
1510 sc->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_chantable;
1511 sc->sbands[IEEE80211_BAND_5GHZ].bitrates =
1512 sc->rates[IEEE80211_BAND_5GHZ];
1513 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
1514 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
1515 ARRAY_SIZE(ath9k_5ghz_chantable);
1516 }
1517
1518 if (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) {
1519 r = ath9k_hw_btcoex_init(ah);
1520 if (r)
1521 goto bad2;
1522 }
1523
1524 return 0;
1525bad2:
1526 /* cleanup tx queues */
1527 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1528 if (ATH_TXQ_SETUP(sc, i))
1529 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1530bad:
1531 ath9k_hw_detach(ah);
1532 sc->sc_ah = NULL;
1533bad_no_ah:
1534 ath9k_exit_debug(sc);
1535
1536 return r;
1537}
1538
1539void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
1540{
1541 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1542 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1543 IEEE80211_HW_SIGNAL_DBM |
1544 IEEE80211_HW_AMPDU_AGGREGATION |
1545 IEEE80211_HW_SUPPORTS_PS |
1546 IEEE80211_HW_PS_NULLFUNC_STACK |
1547 IEEE80211_HW_SPECTRUM_MGMT;
1548
1549 if (AR_SREV_9160_10_OR_LATER(sc->sc_ah) || modparam_nohwcrypt)
1550 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
1551
1552 hw->wiphy->interface_modes =
1553 BIT(NL80211_IFTYPE_AP) |
1554 BIT(NL80211_IFTYPE_STATION) |
1555 BIT(NL80211_IFTYPE_ADHOC) |
1556 BIT(NL80211_IFTYPE_MESH_POINT);
1557
1558 hw->wiphy->ps_default = false;
1559
1560 hw->queues = 4;
1561 hw->max_rates = 4;
1562 hw->channel_change_time = 5000;
1563 hw->max_listen_interval = 10;
1564 /* Hardware supports 10 but we use 4 */
1565 hw->max_rate_tries = 4;
1566 hw->sta_data_size = sizeof(struct ath_node);
1567 hw->vif_data_size = sizeof(struct ath_vif);
1568
1569 hw->rate_control_algorithm = "ath9k_rate_control";
1570
1571 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1572 &sc->sbands[IEEE80211_BAND_2GHZ];
1573 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
1574 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1575 &sc->sbands[IEEE80211_BAND_5GHZ];
1576}
1577
1578/* Device driver core initialization */
1579int ath_init_device(u16 devid, struct ath_softc *sc, u16 subsysid)
1580{
1581 struct ieee80211_hw *hw = sc->hw;
1582 int error = 0, i;
1583 struct ath_regulatory *reg;
1584
1585 DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n");
1586
1587 error = ath_init_softc(devid, sc, subsysid);
1588 if (error != 0)
1589 return error;
1590
1591 /* get mac address from hardware and set in mac80211 */
1592
1593 SET_IEEE80211_PERM_ADDR(hw, sc->sc_ah->macaddr);
1594
1595 ath_set_hw_capab(sc, hw);
1596
1597 error = ath_regd_init(&sc->common.regulatory, sc->hw->wiphy,
1598 ath9k_reg_notifier);
1599 if (error)
1600 return error;
1601
1602 reg = &sc->common.regulatory;
1603
1604 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
1605 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_2GHZ].ht_cap);
1606 if (test_bit(ATH9K_MODE_11A, sc->sc_ah->caps.wireless_modes))
1607 setup_ht_cap(sc, &sc->sbands[IEEE80211_BAND_5GHZ].ht_cap);
1608 }
1609
1610 /* initialize tx/rx engine */
1611 error = ath_tx_init(sc, ATH_TXBUF);
1612 if (error != 0)
1613 goto error_attach;
1614
1615 error = ath_rx_init(sc, ATH_RXBUF);
1616 if (error != 0)
1617 goto error_attach;
1618
1619 INIT_WORK(&sc->chan_work, ath9k_wiphy_chan_work);
1620 INIT_DELAYED_WORK(&sc->wiphy_work, ath9k_wiphy_work);
1621 sc->wiphy_scheduler_int = msecs_to_jiffies(500);
1622
1623 error = ieee80211_register_hw(hw);
1624
1625 if (!ath_is_world_regd(reg)) {
1626 error = regulatory_hint(hw->wiphy, reg->alpha2);
1627 if (error)
1628 goto error_attach;
1629 }
1630
1631 /* Initialize LED control */
1632 ath_init_leds(sc);
1633
1634 ath_start_rfkill_poll(sc);
1635
1636 return 0;
1637
1638error_attach:
1639 /* cleanup tx queues */
1640 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
1641 if (ATH_TXQ_SETUP(sc, i))
1642 ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1643
1644 ath9k_hw_detach(sc->sc_ah);
1645 sc->sc_ah = NULL;
1646 ath9k_exit_debug(sc);
1647
1648 return error;
1649} 938}
1650 939
1651int ath_reset(struct ath_softc *sc, bool retry_tx) 940int ath_reset(struct ath_softc *sc, bool retry_tx)
1652{ 941{
1653 struct ath_hw *ah = sc->sc_ah; 942 struct ath_hw *ah = sc->sc_ah;
943 struct ath_common *common = ath9k_hw_common(ah);
1654 struct ieee80211_hw *hw = sc->hw; 944 struct ieee80211_hw *hw = sc->hw;
1655 int r; 945 int r;
1656 946
947 /* Stop ANI */
948 del_timer_sync(&common->ani.timer);
949
950 ieee80211_stop_queues(hw);
951
1657 ath9k_hw_set_interrupts(ah, 0); 952 ath9k_hw_set_interrupts(ah, 0);
1658 ath_drain_all_txq(sc, retry_tx); 953 ath_drain_all_txq(sc, retry_tx);
1659 ath_stoprecv(sc); 954 ath_stoprecv(sc);
@@ -1662,12 +957,13 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
1662 spin_lock_bh(&sc->sc_resetlock); 957 spin_lock_bh(&sc->sc_resetlock);
1663 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false); 958 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1664 if (r) 959 if (r)
1665 DPRINTF(sc, ATH_DBG_FATAL, 960 ath_print(common, ATH_DBG_FATAL,
1666 "Unable to reset hardware; reset status %d\n", r); 961 "Unable to reset hardware; reset status %d\n", r);
1667 spin_unlock_bh(&sc->sc_resetlock); 962 spin_unlock_bh(&sc->sc_resetlock);
1668 963
1669 if (ath_startrecv(sc) != 0) 964 if (ath_startrecv(sc) != 0)
1670 DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n"); 965 ath_print(common, ATH_DBG_FATAL,
966 "Unable to start recv logic\n");
1671 967
1672 /* 968 /*
1673 * We may be doing a reset in response to a request 969 * We may be doing a reset in response to a request
@@ -1694,125 +990,12 @@ int ath_reset(struct ath_softc *sc, bool retry_tx)
1694 } 990 }
1695 } 991 }
1696 992
1697 return r; 993 ieee80211_wake_queues(hw);
1698}
1699
1700/*
1701 * This function will allocate both the DMA descriptor structure, and the
1702 * buffers it contains. These are used to contain the descriptors used
1703 * by the system.
1704*/
1705int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
1706 struct list_head *head, const char *name,
1707 int nbuf, int ndesc)
1708{
1709#define DS2PHYS(_dd, _ds) \
1710 ((_dd)->dd_desc_paddr + ((caddr_t)(_ds) - (caddr_t)(_dd)->dd_desc))
1711#define ATH_DESC_4KB_BOUND_CHECK(_daddr) ((((_daddr) & 0xFFF) > 0xF7F) ? 1 : 0)
1712#define ATH_DESC_4KB_BOUND_NUM_SKIPPED(_len) ((_len) / 4096)
1713
1714 struct ath_desc *ds;
1715 struct ath_buf *bf;
1716 int i, bsize, error;
1717
1718 DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA: %u buffers %u desc/buf\n",
1719 name, nbuf, ndesc);
1720
1721 INIT_LIST_HEAD(head);
1722 /* ath_desc must be a multiple of DWORDs */
1723 if ((sizeof(struct ath_desc) % 4) != 0) {
1724 DPRINTF(sc, ATH_DBG_FATAL, "ath_desc not DWORD aligned\n");
1725 ASSERT((sizeof(struct ath_desc) % 4) == 0);
1726 error = -ENOMEM;
1727 goto fail;
1728 }
1729
1730 dd->dd_desc_len = sizeof(struct ath_desc) * nbuf * ndesc;
1731
1732 /*
1733 * Need additional DMA memory because we can't use
1734 * descriptors that cross the 4K page boundary. Assume
1735 * one skipped descriptor per 4K page.
1736 */
1737 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_4KB_SPLITTRANS)) {
1738 u32 ndesc_skipped =
1739 ATH_DESC_4KB_BOUND_NUM_SKIPPED(dd->dd_desc_len);
1740 u32 dma_len;
1741
1742 while (ndesc_skipped) {
1743 dma_len = ndesc_skipped * sizeof(struct ath_desc);
1744 dd->dd_desc_len += dma_len;
1745
1746 ndesc_skipped = ATH_DESC_4KB_BOUND_NUM_SKIPPED(dma_len);
1747 };
1748 }
1749
1750 /* allocate descriptors */
1751 dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
1752 &dd->dd_desc_paddr, GFP_KERNEL);
1753 if (dd->dd_desc == NULL) {
1754 error = -ENOMEM;
1755 goto fail;
1756 }
1757 ds = dd->dd_desc;
1758 DPRINTF(sc, ATH_DBG_CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
1759 name, ds, (u32) dd->dd_desc_len,
1760 ito64(dd->dd_desc_paddr), /*XXX*/(u32) dd->dd_desc_len);
1761
1762 /* allocate buffers */
1763 bsize = sizeof(struct ath_buf) * nbuf;
1764 bf = kzalloc(bsize, GFP_KERNEL);
1765 if (bf == NULL) {
1766 error = -ENOMEM;
1767 goto fail2;
1768 }
1769 dd->dd_bufptr = bf;
1770
1771 for (i = 0; i < nbuf; i++, bf++, ds += ndesc) {
1772 bf->bf_desc = ds;
1773 bf->bf_daddr = DS2PHYS(dd, ds);
1774
1775 if (!(sc->sc_ah->caps.hw_caps &
1776 ATH9K_HW_CAP_4KB_SPLITTRANS)) {
1777 /*
1778 * Skip descriptor addresses which can cause 4KB
1779 * boundary crossing (addr + length) with a 32 dword
1780 * descriptor fetch.
1781 */
1782 while (ATH_DESC_4KB_BOUND_CHECK(bf->bf_daddr)) {
1783 ASSERT((caddr_t) bf->bf_desc <
1784 ((caddr_t) dd->dd_desc +
1785 dd->dd_desc_len));
1786
1787 ds += ndesc;
1788 bf->bf_desc = ds;
1789 bf->bf_daddr = DS2PHYS(dd, ds);
1790 }
1791 }
1792 list_add_tail(&bf->list, head);
1793 }
1794 return 0;
1795fail2:
1796 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
1797 dd->dd_desc_paddr);
1798fail:
1799 memset(dd, 0, sizeof(*dd));
1800 return error;
1801#undef ATH_DESC_4KB_BOUND_CHECK
1802#undef ATH_DESC_4KB_BOUND_NUM_SKIPPED
1803#undef DS2PHYS
1804}
1805 994
1806void ath_descdma_cleanup(struct ath_softc *sc, 995 /* Start ANI */
1807 struct ath_descdma *dd, 996 ath_start_ani(common);
1808 struct list_head *head)
1809{
1810 dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
1811 dd->dd_desc_paddr);
1812 997
1813 INIT_LIST_HEAD(head); 998 return r;
1814 kfree(dd->dd_bufptr);
1815 memset(dd, 0, sizeof(*dd));
1816} 999}
1817 1000
1818int ath_get_hal_qnum(u16 queue, struct ath_softc *sc) 1001int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
@@ -1884,15 +1067,9 @@ void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1884 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM; 1067 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1885 } 1068 }
1886 1069
1887 sc->tx_chan_width = ATH9K_HT_MACMODE_20; 1070 if (conf_is_ht(conf))
1888
1889 if (conf_is_ht(conf)) {
1890 if (conf_is_ht40(conf))
1891 sc->tx_chan_width = ATH9K_HT_MACMODE_2040;
1892
1893 ichan->chanmode = ath_get_extchanmode(sc, chan, 1071 ichan->chanmode = ath_get_extchanmode(sc, chan,
1894 conf->channel_type); 1072 conf->channel_type);
1895 }
1896} 1073}
1897 1074
1898/**********************/ 1075/**********************/
@@ -1903,12 +1080,15 @@ static int ath9k_start(struct ieee80211_hw *hw)
1903{ 1080{
1904 struct ath_wiphy *aphy = hw->priv; 1081 struct ath_wiphy *aphy = hw->priv;
1905 struct ath_softc *sc = aphy->sc; 1082 struct ath_softc *sc = aphy->sc;
1083 struct ath_hw *ah = sc->sc_ah;
1084 struct ath_common *common = ath9k_hw_common(ah);
1906 struct ieee80211_channel *curchan = hw->conf.channel; 1085 struct ieee80211_channel *curchan = hw->conf.channel;
1907 struct ath9k_channel *init_channel; 1086 struct ath9k_channel *init_channel;
1908 int r; 1087 int r;
1909 1088
1910 DPRINTF(sc, ATH_DBG_CONFIG, "Starting driver with " 1089 ath_print(common, ATH_DBG_CONFIG,
1911 "initial channel: %d MHz\n", curchan->center_freq); 1090 "Starting driver with initial channel: %d MHz\n",
1091 curchan->center_freq);
1912 1092
1913 mutex_lock(&sc->mutex); 1093 mutex_lock(&sc->mutex);
1914 1094
@@ -1940,7 +1120,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
1940 init_channel = ath_get_curchannel(sc, hw); 1120 init_channel = ath_get_curchannel(sc, hw);
1941 1121
1942 /* Reset SERDES registers */ 1122 /* Reset SERDES registers */
1943 ath9k_hw_configpcipowersave(sc->sc_ah, 0, 0); 1123 ath9k_hw_configpcipowersave(ah, 0, 0);
1944 1124
1945 /* 1125 /*
1946 * The basic interface to setting the hardware in a good 1126 * The basic interface to setting the hardware in a good
@@ -1950,12 +1130,12 @@ static int ath9k_start(struct ieee80211_hw *hw)
1950 * and then setup of the interrupt mask. 1130 * and then setup of the interrupt mask.
1951 */ 1131 */
1952 spin_lock_bh(&sc->sc_resetlock); 1132 spin_lock_bh(&sc->sc_resetlock);
1953 r = ath9k_hw_reset(sc->sc_ah, init_channel, false); 1133 r = ath9k_hw_reset(ah, init_channel, false);
1954 if (r) { 1134 if (r) {
1955 DPRINTF(sc, ATH_DBG_FATAL, 1135 ath_print(common, ATH_DBG_FATAL,
1956 "Unable to reset hardware; reset status %d " 1136 "Unable to reset hardware; reset status %d "
1957 "(freq %u MHz)\n", r, 1137 "(freq %u MHz)\n", r,
1958 curchan->center_freq); 1138 curchan->center_freq);
1959 spin_unlock_bh(&sc->sc_resetlock); 1139 spin_unlock_bh(&sc->sc_resetlock);
1960 goto mutex_unlock; 1140 goto mutex_unlock;
1961 } 1141 }
@@ -1975,7 +1155,8 @@ static int ath9k_start(struct ieee80211_hw *hw)
1975 * here except setup the interrupt mask. 1155 * here except setup the interrupt mask.
1976 */ 1156 */
1977 if (ath_startrecv(sc) != 0) { 1157 if (ath_startrecv(sc) != 0) {
1978 DPRINTF(sc, ATH_DBG_FATAL, "Unable to start recv logic\n"); 1158 ath_print(common, ATH_DBG_FATAL,
1159 "Unable to start recv logic\n");
1979 r = -EIO; 1160 r = -EIO;
1980 goto mutex_unlock; 1161 goto mutex_unlock;
1981 } 1162 }
@@ -1985,10 +1166,10 @@ static int ath9k_start(struct ieee80211_hw *hw)
1985 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN 1166 | ATH9K_INT_RXEOL | ATH9K_INT_RXORN
1986 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL; 1167 | ATH9K_INT_FATAL | ATH9K_INT_GLOBAL;
1987 1168
1988 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_GTT) 1169 if (ah->caps.hw_caps & ATH9K_HW_CAP_GTT)
1989 sc->imask |= ATH9K_INT_GTT; 1170 sc->imask |= ATH9K_INT_GTT;
1990 1171
1991 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) 1172 if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1992 sc->imask |= ATH9K_INT_CST; 1173 sc->imask |= ATH9K_INT_CST;
1993 1174
1994 ath_cache_conf_rate(sc, &hw->conf); 1175 ath_cache_conf_rate(sc, &hw->conf);
@@ -1997,21 +1178,22 @@ static int ath9k_start(struct ieee80211_hw *hw)
1997 1178
1998 /* Disable BMISS interrupt when we're not associated */ 1179 /* Disable BMISS interrupt when we're not associated */
1999 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS); 1180 sc->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
2000 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 1181 ath9k_hw_set_interrupts(ah, sc->imask);
2001 1182
2002 ieee80211_wake_queues(hw); 1183 ieee80211_wake_queues(hw);
2003 1184
2004 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); 1185 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2005 1186
2006 if ((sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE) && 1187 if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
2007 !(sc->sc_flags & SC_OP_BTCOEX_ENABLED)) { 1188 !ah->btcoex_hw.enabled) {
2008 ath_btcoex_set_weight(&sc->btcoex_info, AR_BT_COEX_WGHT, 1189 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
2009 AR_STOMP_LOW_WLAN_WGHT); 1190 AR_STOMP_LOW_WLAN_WGHT);
2010 ath9k_hw_btcoex_enable(sc->sc_ah); 1191 ath9k_hw_btcoex_enable(ah);
2011 1192
2012 ath_pcie_aspm_disable(sc); 1193 if (common->bus_ops->bt_coex_prep)
2013 if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) 1194 common->bus_ops->bt_coex_prep(common);
2014 ath_btcoex_timer_resume(sc, &sc->btcoex_info); 1195 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1196 ath9k_btcoex_timer_resume(sc);
2015 } 1197 }
2016 1198
2017mutex_unlock: 1199mutex_unlock:
@@ -2026,17 +1208,19 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2026 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1208 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
2027 struct ath_wiphy *aphy = hw->priv; 1209 struct ath_wiphy *aphy = hw->priv;
2028 struct ath_softc *sc = aphy->sc; 1210 struct ath_softc *sc = aphy->sc;
1211 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2029 struct ath_tx_control txctl; 1212 struct ath_tx_control txctl;
2030 int hdrlen, padsize; 1213 int padpos, padsize;
1214 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2031 1215
2032 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { 1216 if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
2033 printk(KERN_DEBUG "ath9k: %s: TX in unexpected wiphy state " 1217 ath_print(common, ATH_DBG_XMIT,
2034 "%d\n", wiphy_name(hw->wiphy), aphy->state); 1218 "ath9k: %s: TX in unexpected wiphy state "
1219 "%d\n", wiphy_name(hw->wiphy), aphy->state);
2035 goto exit; 1220 goto exit;
2036 } 1221 }
2037 1222
2038 if (sc->ps_enabled) { 1223 if (sc->ps_enabled) {
2039 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2040 /* 1224 /*
2041 * mac80211 does not set PM field for normal data frames, so we 1225 * mac80211 does not set PM field for normal data frames, so we
2042 * need to update that based on the current PS mode. 1226 * need to update that based on the current PS mode.
@@ -2044,8 +1228,8 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2044 if (ieee80211_is_data(hdr->frame_control) && 1228 if (ieee80211_is_data(hdr->frame_control) &&
2045 !ieee80211_is_nullfunc(hdr->frame_control) && 1229 !ieee80211_is_nullfunc(hdr->frame_control) &&
2046 !ieee80211_has_pm(hdr->frame_control)) { 1230 !ieee80211_has_pm(hdr->frame_control)) {
2047 DPRINTF(sc, ATH_DBG_PS, "Add PM=1 for a TX frame " 1231 ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
2048 "while in PS mode\n"); 1232 "while in PS mode\n");
2049 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); 1233 hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
2050 } 1234 }
2051 } 1235 }
@@ -2056,16 +1240,16 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2056 * power save mode. Need to wake up hardware for the TX to be 1240 * power save mode. Need to wake up hardware for the TX to be
2057 * completed and if needed, also for RX of buffered frames. 1241 * completed and if needed, also for RX of buffered frames.
2058 */ 1242 */
2059 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2060 ath9k_ps_wakeup(sc); 1243 ath9k_ps_wakeup(sc);
2061 ath9k_hw_setrxabort(sc->sc_ah, 0); 1244 ath9k_hw_setrxabort(sc->sc_ah, 0);
2062 if (ieee80211_is_pspoll(hdr->frame_control)) { 1245 if (ieee80211_is_pspoll(hdr->frame_control)) {
2063 DPRINTF(sc, ATH_DBG_PS, "Sending PS-Poll to pick a " 1246 ath_print(common, ATH_DBG_PS,
2064 "buffered frame\n"); 1247 "Sending PS-Poll to pick a buffered frame\n");
2065 sc->sc_flags |= SC_OP_WAIT_FOR_PSPOLL_DATA; 1248 sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
2066 } else { 1249 } else {
2067 DPRINTF(sc, ATH_DBG_PS, "Wake up to complete TX\n"); 1250 ath_print(common, ATH_DBG_PS,
2068 sc->sc_flags |= SC_OP_WAIT_FOR_TX_ACK; 1251 "Wake up to complete TX\n");
1252 sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
2069 } 1253 }
2070 /* 1254 /*
2071 * The actual restore operation will happen only after 1255 * The actual restore operation will happen only after
@@ -2083,7 +1267,6 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2083 * BSSes. 1267 * BSSes.
2084 */ 1268 */
2085 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 1269 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
2086 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2087 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 1270 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
2088 sc->tx.seq_no += 0x10; 1271 sc->tx.seq_no += 0x10;
2089 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 1272 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
@@ -2091,13 +1274,13 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2091 } 1274 }
2092 1275
2093 /* Add the padding after the header if this is not already done */ 1276 /* Add the padding after the header if this is not already done */
2094 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1277 padpos = ath9k_cmn_padpos(hdr->frame_control);
2095 if (hdrlen & 3) { 1278 padsize = padpos & 3;
2096 padsize = hdrlen % 4; 1279 if (padsize && skb->len>padpos) {
2097 if (skb_headroom(skb) < padsize) 1280 if (skb_headroom(skb) < padsize)
2098 return -1; 1281 return -1;
2099 skb_push(skb, padsize); 1282 skb_push(skb, padsize);
2100 memmove(skb->data, skb->data + padsize, hdrlen); 1283 memmove(skb->data, skb->data + padsize, padpos);
2101 } 1284 }
2102 1285
2103 /* Check if a tx queue is available */ 1286 /* Check if a tx queue is available */
@@ -2106,10 +1289,10 @@ static int ath9k_tx(struct ieee80211_hw *hw,
2106 if (!txctl.txq) 1289 if (!txctl.txq)
2107 goto exit; 1290 goto exit;
2108 1291
2109 DPRINTF(sc, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); 1292 ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
2110 1293
2111 if (ath_tx_start(hw, skb, &txctl) != 0) { 1294 if (ath_tx_start(hw, skb, &txctl) != 0) {
2112 DPRINTF(sc, ATH_DBG_XMIT, "TX failed\n"); 1295 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
2113 goto exit; 1296 goto exit;
2114 } 1297 }
2115 1298
@@ -2123,6 +1306,8 @@ static void ath9k_stop(struct ieee80211_hw *hw)
2123{ 1306{
2124 struct ath_wiphy *aphy = hw->priv; 1307 struct ath_wiphy *aphy = hw->priv;
2125 struct ath_softc *sc = aphy->sc; 1308 struct ath_softc *sc = aphy->sc;
1309 struct ath_hw *ah = sc->sc_ah;
1310 struct ath_common *common = ath9k_hw_common(ah);
2126 1311
2127 mutex_lock(&sc->mutex); 1312 mutex_lock(&sc->mutex);
2128 1313
@@ -2137,7 +1322,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
2137 } 1322 }
2138 1323
2139 if (sc->sc_flags & SC_OP_INVALID) { 1324 if (sc->sc_flags & SC_OP_INVALID) {
2140 DPRINTF(sc, ATH_DBG_ANY, "Device not present\n"); 1325 ath_print(common, ATH_DBG_ANY, "Device not present\n");
2141 mutex_unlock(&sc->mutex); 1326 mutex_unlock(&sc->mutex);
2142 return; 1327 return;
2143 } 1328 }
@@ -2147,41 +1332,48 @@ static void ath9k_stop(struct ieee80211_hw *hw)
2147 return; /* another wiphy still in use */ 1332 return; /* another wiphy still in use */
2148 } 1333 }
2149 1334
2150 if (sc->sc_flags & SC_OP_BTCOEX_ENABLED) { 1335 /* Ensure HW is awake when we try to shut it down. */
2151 ath9k_hw_btcoex_disable(sc->sc_ah); 1336 ath9k_ps_wakeup(sc);
2152 if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_3WIRE) 1337
2153 ath_btcoex_timer_pause(sc, &sc->btcoex_info); 1338 if (ah->btcoex_hw.enabled) {
1339 ath9k_hw_btcoex_disable(ah);
1340 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1341 ath9k_btcoex_timer_pause(sc);
2154 } 1342 }
2155 1343
2156 /* make sure h/w will not generate any interrupt 1344 /* make sure h/w will not generate any interrupt
2157 * before setting the invalid flag. */ 1345 * before setting the invalid flag. */
2158 ath9k_hw_set_interrupts(sc->sc_ah, 0); 1346 ath9k_hw_set_interrupts(ah, 0);
2159 1347
2160 if (!(sc->sc_flags & SC_OP_INVALID)) { 1348 if (!(sc->sc_flags & SC_OP_INVALID)) {
2161 ath_drain_all_txq(sc, false); 1349 ath_drain_all_txq(sc, false);
2162 ath_stoprecv(sc); 1350 ath_stoprecv(sc);
2163 ath9k_hw_phy_disable(sc->sc_ah); 1351 ath9k_hw_phy_disable(ah);
2164 } else 1352 } else
2165 sc->rx.rxlink = NULL; 1353 sc->rx.rxlink = NULL;
2166 1354
2167 /* disable HAL and put h/w to sleep */ 1355 /* disable HAL and put h/w to sleep */
2168 ath9k_hw_disable(sc->sc_ah); 1356 ath9k_hw_disable(ah);
2169 ath9k_hw_configpcipowersave(sc->sc_ah, 1, 1); 1357 ath9k_hw_configpcipowersave(ah, 1, 1);
2170 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP); 1358 ath9k_ps_restore(sc);
1359
1360 /* Finally, put the chip in FULL SLEEP mode */
1361 ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
2171 1362
2172 sc->sc_flags |= SC_OP_INVALID; 1363 sc->sc_flags |= SC_OP_INVALID;
2173 1364
2174 mutex_unlock(&sc->mutex); 1365 mutex_unlock(&sc->mutex);
2175 1366
2176 DPRINTF(sc, ATH_DBG_CONFIG, "Driver halt\n"); 1367 ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
2177} 1368}
2178 1369
2179static int ath9k_add_interface(struct ieee80211_hw *hw, 1370static int ath9k_add_interface(struct ieee80211_hw *hw,
2180 struct ieee80211_if_init_conf *conf) 1371 struct ieee80211_vif *vif)
2181{ 1372{
2182 struct ath_wiphy *aphy = hw->priv; 1373 struct ath_wiphy *aphy = hw->priv;
2183 struct ath_softc *sc = aphy->sc; 1374 struct ath_softc *sc = aphy->sc;
2184 struct ath_vif *avp = (void *)conf->vif->drv_priv; 1375 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1376 struct ath_vif *avp = (void *)vif->drv_priv;
2185 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED; 1377 enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
2186 int ret = 0; 1378 int ret = 0;
2187 1379
@@ -2193,7 +1385,7 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
2193 goto out; 1385 goto out;
2194 } 1386 }
2195 1387
2196 switch (conf->type) { 1388 switch (vif->type) {
2197 case NL80211_IFTYPE_STATION: 1389 case NL80211_IFTYPE_STATION:
2198 ic_opmode = NL80211_IFTYPE_STATION; 1390 ic_opmode = NL80211_IFTYPE_STATION;
2199 break; 1391 break;
@@ -2204,16 +1396,17 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
2204 ret = -ENOBUFS; 1396 ret = -ENOBUFS;
2205 goto out; 1397 goto out;
2206 } 1398 }
2207 ic_opmode = conf->type; 1399 ic_opmode = vif->type;
2208 break; 1400 break;
2209 default: 1401 default:
2210 DPRINTF(sc, ATH_DBG_FATAL, 1402 ath_print(common, ATH_DBG_FATAL,
2211 "Interface type %d not yet supported\n", conf->type); 1403 "Interface type %d not yet supported\n", vif->type);
2212 ret = -EOPNOTSUPP; 1404 ret = -EOPNOTSUPP;
2213 goto out; 1405 goto out;
2214 } 1406 }
2215 1407
2216 DPRINTF(sc, ATH_DBG_CONFIG, "Attach a VIF of type: %d\n", ic_opmode); 1408 ath_print(common, ATH_DBG_CONFIG,
1409 "Attach a VIF of type: %d\n", ic_opmode);
2217 1410
2218 /* Set the VIF opmode */ 1411 /* Set the VIF opmode */
2219 avp->av_opmode = ic_opmode; 1412 avp->av_opmode = ic_opmode;
@@ -2239,19 +1432,19 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
2239 * Enable MIB interrupts when there are hardware phy counters. 1432 * Enable MIB interrupts when there are hardware phy counters.
2240 * Note we only do this (at the moment) for station mode. 1433 * Note we only do this (at the moment) for station mode.
2241 */ 1434 */
2242 if ((conf->type == NL80211_IFTYPE_STATION) || 1435 if ((vif->type == NL80211_IFTYPE_STATION) ||
2243 (conf->type == NL80211_IFTYPE_ADHOC) || 1436 (vif->type == NL80211_IFTYPE_ADHOC) ||
2244 (conf->type == NL80211_IFTYPE_MESH_POINT)) { 1437 (vif->type == NL80211_IFTYPE_MESH_POINT)) {
2245 sc->imask |= ATH9K_INT_MIB; 1438 sc->imask |= ATH9K_INT_MIB;
2246 sc->imask |= ATH9K_INT_TSFOOR; 1439 sc->imask |= ATH9K_INT_TSFOOR;
2247 } 1440 }
2248 1441
2249 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask); 1442 ath9k_hw_set_interrupts(sc->sc_ah, sc->imask);
2250 1443
2251 if (conf->type == NL80211_IFTYPE_AP || 1444 if (vif->type == NL80211_IFTYPE_AP ||
2252 conf->type == NL80211_IFTYPE_ADHOC || 1445 vif->type == NL80211_IFTYPE_ADHOC ||
2253 conf->type == NL80211_IFTYPE_MONITOR) 1446 vif->type == NL80211_IFTYPE_MONITOR)
2254 ath_start_ani(sc); 1447 ath_start_ani(common);
2255 1448
2256out: 1449out:
2257 mutex_unlock(&sc->mutex); 1450 mutex_unlock(&sc->mutex);
@@ -2259,32 +1452,35 @@ out:
2259} 1452}
2260 1453
2261static void ath9k_remove_interface(struct ieee80211_hw *hw, 1454static void ath9k_remove_interface(struct ieee80211_hw *hw,
2262 struct ieee80211_if_init_conf *conf) 1455 struct ieee80211_vif *vif)
2263{ 1456{
2264 struct ath_wiphy *aphy = hw->priv; 1457 struct ath_wiphy *aphy = hw->priv;
2265 struct ath_softc *sc = aphy->sc; 1458 struct ath_softc *sc = aphy->sc;
2266 struct ath_vif *avp = (void *)conf->vif->drv_priv; 1459 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1460 struct ath_vif *avp = (void *)vif->drv_priv;
2267 int i; 1461 int i;
2268 1462
2269 DPRINTF(sc, ATH_DBG_CONFIG, "Detach Interface\n"); 1463 ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
2270 1464
2271 mutex_lock(&sc->mutex); 1465 mutex_lock(&sc->mutex);
2272 1466
2273 /* Stop ANI */ 1467 /* Stop ANI */
2274 del_timer_sync(&sc->ani.timer); 1468 del_timer_sync(&common->ani.timer);
2275 1469
2276 /* Reclaim beacon resources */ 1470 /* Reclaim beacon resources */
2277 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) || 1471 if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
2278 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) || 1472 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
2279 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) { 1473 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1474 ath9k_ps_wakeup(sc);
2280 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1475 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2281 ath_beacon_return(sc, avp); 1476 ath9k_ps_restore(sc);
2282 } 1477 }
2283 1478
1479 ath_beacon_return(sc, avp);
2284 sc->sc_flags &= ~SC_OP_BEACONS; 1480 sc->sc_flags &= ~SC_OP_BEACONS;
2285 1481
2286 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) { 1482 for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
2287 if (sc->beacon.bslot[i] == conf->vif) { 1483 if (sc->beacon.bslot[i] == vif) {
2288 printk(KERN_DEBUG "%s: vif had allocated beacon " 1484 printk(KERN_DEBUG "%s: vif had allocated beacon "
2289 "slot\n", __func__); 1485 "slot\n", __func__);
2290 sc->beacon.bslot[i] = NULL; 1486 sc->beacon.bslot[i] = NULL;
@@ -2297,56 +1493,92 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
2297 mutex_unlock(&sc->mutex); 1493 mutex_unlock(&sc->mutex);
2298} 1494}
2299 1495
1496void ath9k_enable_ps(struct ath_softc *sc)
1497{
1498 sc->ps_enabled = true;
1499 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1500 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) {
1501 sc->imask |= ATH9K_INT_TIM_TIMER;
1502 ath9k_hw_set_interrupts(sc->sc_ah,
1503 sc->imask);
1504 }
1505 }
1506 ath9k_hw_setrxabort(sc->sc_ah, 1);
1507}
1508
2300static int ath9k_config(struct ieee80211_hw *hw, u32 changed) 1509static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
2301{ 1510{
2302 struct ath_wiphy *aphy = hw->priv; 1511 struct ath_wiphy *aphy = hw->priv;
2303 struct ath_softc *sc = aphy->sc; 1512 struct ath_softc *sc = aphy->sc;
1513 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2304 struct ieee80211_conf *conf = &hw->conf; 1514 struct ieee80211_conf *conf = &hw->conf;
2305 struct ath_hw *ah = sc->sc_ah; 1515 struct ath_hw *ah = sc->sc_ah;
2306 bool all_wiphys_idle = false, disable_radio = false; 1516 bool disable_radio;
2307 1517
2308 mutex_lock(&sc->mutex); 1518 mutex_lock(&sc->mutex);
2309 1519
2310 /* Leave this as the first check */ 1520 /*
1521 * Leave this as the first check because we need to turn on the
1522 * radio if it was disabled before prior to processing the rest
1523 * of the changes. Likewise we must only disable the radio towards
1524 * the end.
1525 */
2311 if (changed & IEEE80211_CONF_CHANGE_IDLE) { 1526 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1527 bool enable_radio;
1528 bool all_wiphys_idle;
1529 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
2312 1530
2313 spin_lock_bh(&sc->wiphy_lock); 1531 spin_lock_bh(&sc->wiphy_lock);
2314 all_wiphys_idle = ath9k_all_wiphys_idle(sc); 1532 all_wiphys_idle = ath9k_all_wiphys_idle(sc);
1533 ath9k_set_wiphy_idle(aphy, idle);
1534
1535 enable_radio = (!idle && all_wiphys_idle);
1536
1537 /*
1538 * After we unlock here its possible another wiphy
1539 * can be re-renabled so to account for that we will
1540 * only disable the radio toward the end of this routine
1541 * if by then all wiphys are still idle.
1542 */
2315 spin_unlock_bh(&sc->wiphy_lock); 1543 spin_unlock_bh(&sc->wiphy_lock);
2316 1544
2317 if (conf->flags & IEEE80211_CONF_IDLE){ 1545 if (enable_radio) {
2318 if (all_wiphys_idle) 1546 sc->ps_idle = false;
2319 disable_radio = true; 1547 ath_radio_enable(sc, hw);
2320 } 1548 ath_print(common, ATH_DBG_CONFIG,
2321 else if (all_wiphys_idle) { 1549 "not-idle: enabling radio\n");
2322 ath_radio_enable(sc);
2323 DPRINTF(sc, ATH_DBG_CONFIG,
2324 "not-idle: enabling radio\n");
2325 } 1550 }
2326 } 1551 }
2327 1552
1553 /*
1554 * We just prepare to enable PS. We have to wait until our AP has
1555 * ACK'd our null data frame to disable RX otherwise we'll ignore
1556 * those ACKs and end up retransmitting the same null data frames.
1557 * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1558 */
2328 if (changed & IEEE80211_CONF_CHANGE_PS) { 1559 if (changed & IEEE80211_CONF_CHANGE_PS) {
2329 if (conf->flags & IEEE80211_CONF_PS) { 1560 if (conf->flags & IEEE80211_CONF_PS) {
2330 if (!(ah->caps.hw_caps & 1561 sc->ps_flags |= PS_ENABLED;
2331 ATH9K_HW_CAP_AUTOSLEEP)) { 1562 /*
2332 if ((sc->imask & ATH9K_INT_TIM_TIMER) == 0) { 1563 * At this point we know hardware has received an ACK
2333 sc->imask |= ATH9K_INT_TIM_TIMER; 1564 * of a previously sent null data frame.
2334 ath9k_hw_set_interrupts(sc->sc_ah, 1565 */
2335 sc->imask); 1566 if ((sc->ps_flags & PS_NULLFUNC_COMPLETED)) {
2336 } 1567 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
2337 ath9k_hw_setrxabort(sc->sc_ah, 1); 1568 ath9k_enable_ps(sc);
2338 } 1569 }
2339 sc->ps_enabled = true;
2340 } else { 1570 } else {
2341 sc->ps_enabled = false; 1571 sc->ps_enabled = false;
2342 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); 1572 sc->ps_flags &= ~(PS_ENABLED |
1573 PS_NULLFUNC_COMPLETED);
1574 ath9k_setpower(sc, ATH9K_PM_AWAKE);
2343 if (!(ah->caps.hw_caps & 1575 if (!(ah->caps.hw_caps &
2344 ATH9K_HW_CAP_AUTOSLEEP)) { 1576 ATH9K_HW_CAP_AUTOSLEEP)) {
2345 ath9k_hw_setrxabort(sc->sc_ah, 0); 1577 ath9k_hw_setrxabort(sc->sc_ah, 0);
2346 sc->sc_flags &= ~(SC_OP_WAIT_FOR_BEACON | 1578 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
2347 SC_OP_WAIT_FOR_CAB | 1579 PS_WAIT_FOR_CAB |
2348 SC_OP_WAIT_FOR_PSPOLL_DATA | 1580 PS_WAIT_FOR_PSPOLL_DATA |
2349 SC_OP_WAIT_FOR_TX_ACK); 1581 PS_WAIT_FOR_TX_ACK);
2350 if (sc->imask & ATH9K_INT_TIM_TIMER) { 1582 if (sc->imask & ATH9K_INT_TIM_TIMER) {
2351 sc->imask &= ~ATH9K_INT_TIM_TIMER; 1583 sc->imask &= ~ATH9K_INT_TIM_TIMER;
2352 ath9k_hw_set_interrupts(sc->sc_ah, 1584 ath9k_hw_set_interrupts(sc->sc_ah,
@@ -2356,6 +1588,14 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
2356 } 1588 }
2357 } 1589 }
2358 1590
1591 if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1592 if (conf->flags & IEEE80211_CONF_MONITOR) {
1593 ath_print(common, ATH_DBG_CONFIG,
1594 "HW opmode set to Monitor mode\n");
1595 sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
1596 }
1597 }
1598
2359 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { 1599 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
2360 struct ieee80211_channel *curchan = hw->conf.channel; 1600 struct ieee80211_channel *curchan = hw->conf.channel;
2361 int pos = curchan->hw_value; 1601 int pos = curchan->hw_value;
@@ -2374,8 +1614,8 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
2374 goto skip_chan_change; 1614 goto skip_chan_change;
2375 } 1615 }
2376 1616
2377 DPRINTF(sc, ATH_DBG_CONFIG, "Set channel: %d MHz\n", 1617 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
2378 curchan->center_freq); 1618 curchan->center_freq);
2379 1619
2380 /* XXX: remove me eventualy */ 1620 /* XXX: remove me eventualy */
2381 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]); 1621 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
@@ -2383,19 +1623,27 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
2383 ath_update_chainmask(sc, conf_is_ht(conf)); 1623 ath_update_chainmask(sc, conf_is_ht(conf));
2384 1624
2385 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) { 1625 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
2386 DPRINTF(sc, ATH_DBG_FATAL, "Unable to set channel\n"); 1626 ath_print(common, ATH_DBG_FATAL,
1627 "Unable to set channel\n");
2387 mutex_unlock(&sc->mutex); 1628 mutex_unlock(&sc->mutex);
2388 return -EINVAL; 1629 return -EINVAL;
2389 } 1630 }
2390 } 1631 }
2391 1632
2392skip_chan_change: 1633skip_chan_change:
2393 if (changed & IEEE80211_CONF_CHANGE_POWER) 1634 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2394 sc->config.txpowlimit = 2 * conf->power_level; 1635 sc->config.txpowlimit = 2 * conf->power_level;
1636 ath_update_txpow(sc);
1637 }
1638
1639 spin_lock_bh(&sc->wiphy_lock);
1640 disable_radio = ath9k_all_wiphys_idle(sc);
1641 spin_unlock_bh(&sc->wiphy_lock);
2395 1642
2396 if (disable_radio) { 1643 if (disable_radio) {
2397 DPRINTF(sc, ATH_DBG_CONFIG, "idle: disabling radio\n"); 1644 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
2398 ath_radio_disable(sc); 1645 sc->ps_idle = true;
1646 ath_radio_disable(sc, hw);
2399 } 1647 }
2400 1648
2401 mutex_unlock(&sc->mutex); 1649 mutex_unlock(&sc->mutex);
@@ -2431,27 +1679,32 @@ static void ath9k_configure_filter(struct ieee80211_hw *hw,
2431 ath9k_hw_setrxfilter(sc->sc_ah, rfilt); 1679 ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
2432 ath9k_ps_restore(sc); 1680 ath9k_ps_restore(sc);
2433 1681
2434 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW RX filter: 0x%x\n", rfilt); 1682 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1683 "Set HW RX filter: 0x%x\n", rfilt);
2435} 1684}
2436 1685
2437static void ath9k_sta_notify(struct ieee80211_hw *hw, 1686static int ath9k_sta_add(struct ieee80211_hw *hw,
2438 struct ieee80211_vif *vif, 1687 struct ieee80211_vif *vif,
2439 enum sta_notify_cmd cmd, 1688 struct ieee80211_sta *sta)
2440 struct ieee80211_sta *sta)
2441{ 1689{
2442 struct ath_wiphy *aphy = hw->priv; 1690 struct ath_wiphy *aphy = hw->priv;
2443 struct ath_softc *sc = aphy->sc; 1691 struct ath_softc *sc = aphy->sc;
2444 1692
2445 switch (cmd) { 1693 ath_node_attach(sc, sta);
2446 case STA_NOTIFY_ADD: 1694
2447 ath_node_attach(sc, sta); 1695 return 0;
2448 break; 1696}
2449 case STA_NOTIFY_REMOVE: 1697
2450 ath_node_detach(sc, sta); 1698static int ath9k_sta_remove(struct ieee80211_hw *hw,
2451 break; 1699 struct ieee80211_vif *vif,
2452 default: 1700 struct ieee80211_sta *sta)
2453 break; 1701{
2454 } 1702 struct ath_wiphy *aphy = hw->priv;
1703 struct ath_softc *sc = aphy->sc;
1704
1705 ath_node_detach(sc, sta);
1706
1707 return 0;
2455} 1708}
2456 1709
2457static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue, 1710static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
@@ -2459,6 +1712,7 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2459{ 1712{
2460 struct ath_wiphy *aphy = hw->priv; 1713 struct ath_wiphy *aphy = hw->priv;
2461 struct ath_softc *sc = aphy->sc; 1714 struct ath_softc *sc = aphy->sc;
1715 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2462 struct ath9k_tx_queue_info qi; 1716 struct ath9k_tx_queue_info qi;
2463 int ret = 0, qnum; 1717 int ret = 0, qnum;
2464 1718
@@ -2475,15 +1729,19 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2475 qi.tqi_burstTime = params->txop; 1729 qi.tqi_burstTime = params->txop;
2476 qnum = ath_get_hal_qnum(queue, sc); 1730 qnum = ath_get_hal_qnum(queue, sc);
2477 1731
2478 DPRINTF(sc, ATH_DBG_CONFIG, 1732 ath_print(common, ATH_DBG_CONFIG,
2479 "Configure tx [queue/halq] [%d/%d], " 1733 "Configure tx [queue/halq] [%d/%d], "
2480 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n", 1734 "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
2481 queue, qnum, params->aifs, params->cw_min, 1735 queue, qnum, params->aifs, params->cw_min,
2482 params->cw_max, params->txop); 1736 params->cw_max, params->txop);
2483 1737
2484 ret = ath_txq_update(sc, qnum, &qi); 1738 ret = ath_txq_update(sc, qnum, &qi);
2485 if (ret) 1739 if (ret)
2486 DPRINTF(sc, ATH_DBG_FATAL, "TXQ Update failed\n"); 1740 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1741
1742 if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1743 if ((qnum == sc->tx.hwq_map[ATH9K_WME_AC_BE]) && !ret)
1744 ath_beaconq_config(sc);
2487 1745
2488 mutex_unlock(&sc->mutex); 1746 mutex_unlock(&sc->mutex);
2489 1747
@@ -2498,6 +1756,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
2498{ 1756{
2499 struct ath_wiphy *aphy = hw->priv; 1757 struct ath_wiphy *aphy = hw->priv;
2500 struct ath_softc *sc = aphy->sc; 1758 struct ath_softc *sc = aphy->sc;
1759 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2501 int ret = 0; 1760 int ret = 0;
2502 1761
2503 if (modparam_nohwcrypt) 1762 if (modparam_nohwcrypt)
@@ -2505,11 +1764,11 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
2505 1764
2506 mutex_lock(&sc->mutex); 1765 mutex_lock(&sc->mutex);
2507 ath9k_ps_wakeup(sc); 1766 ath9k_ps_wakeup(sc);
2508 DPRINTF(sc, ATH_DBG_CONFIG, "Set HW Key\n"); 1767 ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
2509 1768
2510 switch (cmd) { 1769 switch (cmd) {
2511 case SET_KEY: 1770 case SET_KEY:
2512 ret = ath_key_config(sc, vif, sta, key); 1771 ret = ath_key_config(common, vif, sta, key);
2513 if (ret >= 0) { 1772 if (ret >= 0) {
2514 key->hw_key_idx = ret; 1773 key->hw_key_idx = ret;
2515 /* push IV and Michael MIC generation to stack */ 1774 /* push IV and Michael MIC generation to stack */
@@ -2522,7 +1781,7 @@ static int ath9k_set_key(struct ieee80211_hw *hw,
2522 } 1781 }
2523 break; 1782 break;
2524 case DISABLE_KEY: 1783 case DISABLE_KEY:
2525 ath_key_delete(sc, key); 1784 ath_key_delete(common, key);
2526 break; 1785 break;
2527 default: 1786 default:
2528 ret = -EINVAL; 1787 ret = -EINVAL;
@@ -2542,94 +1801,87 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2542 struct ath_wiphy *aphy = hw->priv; 1801 struct ath_wiphy *aphy = hw->priv;
2543 struct ath_softc *sc = aphy->sc; 1802 struct ath_softc *sc = aphy->sc;
2544 struct ath_hw *ah = sc->sc_ah; 1803 struct ath_hw *ah = sc->sc_ah;
1804 struct ath_common *common = ath9k_hw_common(ah);
2545 struct ath_vif *avp = (void *)vif->drv_priv; 1805 struct ath_vif *avp = (void *)vif->drv_priv;
2546 u32 rfilt = 0; 1806 int slottime;
2547 int error, i; 1807 int error;
2548 1808
2549 mutex_lock(&sc->mutex); 1809 mutex_lock(&sc->mutex);
2550 1810
2551 /* 1811 if (changed & BSS_CHANGED_BSSID) {
2552 * TODO: Need to decide which hw opmode to use for 1812 /* Set BSSID */
2553 * multi-interface cases 1813 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
2554 * XXX: This belongs into add_interface! 1814 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
2555 */ 1815 common->curaid = 0;
2556 if (vif->type == NL80211_IFTYPE_AP && 1816 ath9k_hw_write_associd(ah);
2557 ah->opmode != NL80211_IFTYPE_AP) {
2558 ah->opmode = NL80211_IFTYPE_STATION;
2559 ath9k_hw_setopmode(ah);
2560 memcpy(sc->curbssid, sc->sc_ah->macaddr, ETH_ALEN);
2561 sc->curaid = 0;
2562 ath9k_hw_write_associd(sc);
2563 /* Request full reset to get hw opmode changed properly */
2564 sc->sc_flags |= SC_OP_FULL_RESET;
2565 }
2566
2567 if ((changed & BSS_CHANGED_BSSID) &&
2568 !is_zero_ether_addr(bss_conf->bssid)) {
2569 switch (vif->type) {
2570 case NL80211_IFTYPE_STATION:
2571 case NL80211_IFTYPE_ADHOC:
2572 case NL80211_IFTYPE_MESH_POINT:
2573 /* Set BSSID */
2574 memcpy(sc->curbssid, bss_conf->bssid, ETH_ALEN);
2575 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
2576 sc->curaid = 0;
2577 ath9k_hw_write_associd(sc);
2578
2579 /* Set aggregation protection mode parameters */
2580 sc->config.ath_aggr_prot = 0;
2581
2582 DPRINTF(sc, ATH_DBG_CONFIG,
2583 "RX filter 0x%x bssid %pM aid 0x%x\n",
2584 rfilt, sc->curbssid, sc->curaid);
2585
2586 /* need to reconfigure the beacon */
2587 sc->sc_flags &= ~SC_OP_BEACONS ;
2588 1817
2589 break; 1818 /* Set aggregation protection mode parameters */
2590 default: 1819 sc->config.ath_aggr_prot = 0;
2591 break; 1820
2592 } 1821 /* Only legacy IBSS for now */
1822 if (vif->type == NL80211_IFTYPE_ADHOC)
1823 ath_update_chainmask(sc, 0);
1824
1825 ath_print(common, ATH_DBG_CONFIG,
1826 "BSSID: %pM aid: 0x%x\n",
1827 common->curbssid, common->curaid);
1828
1829 /* need to reconfigure the beacon */
1830 sc->sc_flags &= ~SC_OP_BEACONS ;
2593 } 1831 }
2594 1832
2595 if ((vif->type == NL80211_IFTYPE_ADHOC) || 1833 /* Enable transmission of beacons (AP, IBSS, MESH) */
2596 (vif->type == NL80211_IFTYPE_AP) || 1834 if ((changed & BSS_CHANGED_BEACON) ||
2597 (vif->type == NL80211_IFTYPE_MESH_POINT)) { 1835 ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
2598 if ((changed & BSS_CHANGED_BEACON) || 1836 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2599 (changed & BSS_CHANGED_BEACON_ENABLED && 1837 error = ath_beacon_alloc(aphy, vif);
2600 bss_conf->enable_beacon)) { 1838 if (!error)
1839 ath_beacon_config(sc, vif);
1840 }
1841
1842 if (changed & BSS_CHANGED_ERP_SLOT) {
1843 if (bss_conf->use_short_slot)
1844 slottime = 9;
1845 else
1846 slottime = 20;
1847 if (vif->type == NL80211_IFTYPE_AP) {
2601 /* 1848 /*
2602 * Allocate and setup the beacon frame. 1849 * Defer update, so that connected stations can adjust
2603 * 1850 * their settings at the same time.
2604 * Stop any previous beacon DMA. This may be 1851 * See beacon.c for more details
2605 * necessary, for example, when an ibss merge
2606 * causes reconfiguration; we may be called
2607 * with beacon transmission active.
2608 */ 1852 */
2609 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq); 1853 sc->beacon.slottime = slottime;
1854 sc->beacon.updateslot = UPDATE;
1855 } else {
1856 ah->slottime = slottime;
1857 ath9k_hw_init_global_settings(ah);
1858 }
1859 }
1860
1861 /* Disable transmission of beacons */
1862 if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1863 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2610 1864
1865 if (changed & BSS_CHANGED_BEACON_INT) {
1866 sc->beacon_interval = bss_conf->beacon_int;
1867 /*
1868 * In case of AP mode, the HW TSF has to be reset
1869 * when the beacon interval changes.
1870 */
1871 if (vif->type == NL80211_IFTYPE_AP) {
1872 sc->sc_flags |= SC_OP_TSF_RESET;
1873 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2611 error = ath_beacon_alloc(aphy, vif); 1874 error = ath_beacon_alloc(aphy, vif);
2612 if (!error) 1875 if (!error)
2613 ath_beacon_config(sc, vif); 1876 ath_beacon_config(sc, vif);
1877 } else {
1878 ath_beacon_config(sc, vif);
2614 } 1879 }
2615 } 1880 }
2616 1881
2617 /* Check for WLAN_CAPABILITY_PRIVACY ? */
2618 if ((avp->av_opmode != NL80211_IFTYPE_STATION)) {
2619 for (i = 0; i < IEEE80211_WEP_NKID; i++)
2620 if (ath9k_hw_keyisvalid(sc->sc_ah, (u16)i))
2621 ath9k_hw_keysetmac(sc->sc_ah,
2622 (u16)i,
2623 sc->curbssid);
2624 }
2625
2626 /* Only legacy IBSS for now */
2627 if (vif->type == NL80211_IFTYPE_ADHOC)
2628 ath_update_chainmask(sc, 0);
2629
2630 if (changed & BSS_CHANGED_ERP_PREAMBLE) { 1882 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2631 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n", 1883 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
2632 bss_conf->use_short_preamble); 1884 bss_conf->use_short_preamble);
2633 if (bss_conf->use_short_preamble) 1885 if (bss_conf->use_short_preamble)
2634 sc->sc_flags |= SC_OP_PREAMBLE_SHORT; 1886 sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
2635 else 1887 else
@@ -2637,8 +1889,8 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2637 } 1889 }
2638 1890
2639 if (changed & BSS_CHANGED_ERP_CTS_PROT) { 1891 if (changed & BSS_CHANGED_ERP_CTS_PROT) {
2640 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n", 1892 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
2641 bss_conf->use_cts_prot); 1893 bss_conf->use_cts_prot);
2642 if (bss_conf->use_cts_prot && 1894 if (bss_conf->use_cts_prot &&
2643 hw->conf.channel->band != IEEE80211_BAND_5GHZ) 1895 hw->conf.channel->band != IEEE80211_BAND_5GHZ)
2644 sc->sc_flags |= SC_OP_PROTECT_ENABLE; 1896 sc->sc_flags |= SC_OP_PROTECT_ENABLE;
@@ -2647,23 +1899,11 @@ static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
2647 } 1899 }
2648 1900
2649 if (changed & BSS_CHANGED_ASSOC) { 1901 if (changed & BSS_CHANGED_ASSOC) {
2650 DPRINTF(sc, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n", 1902 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
2651 bss_conf->assoc); 1903 bss_conf->assoc);
2652 ath9k_bss_assoc_info(sc, vif, bss_conf); 1904 ath9k_bss_assoc_info(sc, vif, bss_conf);
2653 } 1905 }
2654 1906
2655 /*
2656 * The HW TSF has to be reset when the beacon interval changes.
2657 * We set the flag here, and ath_beacon_config_ap() would take this
2658 * into account when it gets called through the subsequent
2659 * config_interface() call - with IFCC_BEACON in the changed field.
2660 */
2661
2662 if (changed & BSS_CHANGED_BEACON_INT) {
2663 sc->sc_flags |= SC_OP_TSF_RESET;
2664 sc->beacon_interval = bss_conf->beacon_int;
2665 }
2666
2667 mutex_unlock(&sc->mutex); 1907 mutex_unlock(&sc->mutex);
2668} 1908}
2669 1909
@@ -2696,11 +1936,16 @@ static void ath9k_reset_tsf(struct ieee80211_hw *hw)
2696 struct ath_softc *sc = aphy->sc; 1936 struct ath_softc *sc = aphy->sc;
2697 1937
2698 mutex_lock(&sc->mutex); 1938 mutex_lock(&sc->mutex);
1939
1940 ath9k_ps_wakeup(sc);
2699 ath9k_hw_reset_tsf(sc->sc_ah); 1941 ath9k_hw_reset_tsf(sc->sc_ah);
1942 ath9k_ps_restore(sc);
1943
2700 mutex_unlock(&sc->mutex); 1944 mutex_unlock(&sc->mutex);
2701} 1945}
2702 1946
2703static int ath9k_ampdu_action(struct ieee80211_hw *hw, 1947static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1948 struct ieee80211_vif *vif,
2704 enum ieee80211_ampdu_mlme_action action, 1949 enum ieee80211_ampdu_mlme_action action,
2705 struct ieee80211_sta *sta, 1950 struct ieee80211_sta *sta,
2706 u16 tid, u16 *ssn) 1951 u16 tid, u16 *ssn)
@@ -2717,18 +1962,25 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
2717 case IEEE80211_AMPDU_RX_STOP: 1962 case IEEE80211_AMPDU_RX_STOP:
2718 break; 1963 break;
2719 case IEEE80211_AMPDU_TX_START: 1964 case IEEE80211_AMPDU_TX_START:
1965 ath9k_ps_wakeup(sc);
2720 ath_tx_aggr_start(sc, sta, tid, ssn); 1966 ath_tx_aggr_start(sc, sta, tid, ssn);
2721 ieee80211_start_tx_ba_cb_irqsafe(hw, sta->addr, tid); 1967 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1968 ath9k_ps_restore(sc);
2722 break; 1969 break;
2723 case IEEE80211_AMPDU_TX_STOP: 1970 case IEEE80211_AMPDU_TX_STOP:
1971 ath9k_ps_wakeup(sc);
2724 ath_tx_aggr_stop(sc, sta, tid); 1972 ath_tx_aggr_stop(sc, sta, tid);
2725 ieee80211_stop_tx_ba_cb_irqsafe(hw, sta->addr, tid); 1973 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
1974 ath9k_ps_restore(sc);
2726 break; 1975 break;
2727 case IEEE80211_AMPDU_TX_OPERATIONAL: 1976 case IEEE80211_AMPDU_TX_OPERATIONAL:
1977 ath9k_ps_wakeup(sc);
2728 ath_tx_aggr_resume(sc, sta, tid); 1978 ath_tx_aggr_resume(sc, sta, tid);
1979 ath9k_ps_restore(sc);
2729 break; 1980 break;
2730 default: 1981 default:
2731 DPRINTF(sc, ATH_DBG_FATAL, "Unknown AMPDU action\n"); 1982 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1983 "Unknown AMPDU action\n");
2732 } 1984 }
2733 1985
2734 return ret; 1986 return ret;
@@ -2738,6 +1990,7 @@ static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2738{ 1990{
2739 struct ath_wiphy *aphy = hw->priv; 1991 struct ath_wiphy *aphy = hw->priv;
2740 struct ath_softc *sc = aphy->sc; 1992 struct ath_softc *sc = aphy->sc;
1993 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2741 1994
2742 mutex_lock(&sc->mutex); 1995 mutex_lock(&sc->mutex);
2743 if (ath9k_wiphy_scanning(sc)) { 1996 if (ath9k_wiphy_scanning(sc)) {
@@ -2753,10 +2006,9 @@ static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2753 2006
2754 aphy->state = ATH_WIPHY_SCAN; 2007 aphy->state = ATH_WIPHY_SCAN;
2755 ath9k_wiphy_pause_all_forced(sc, aphy); 2008 ath9k_wiphy_pause_all_forced(sc, aphy);
2756
2757 spin_lock_bh(&sc->ani_lock);
2758 sc->sc_flags |= SC_OP_SCANNING; 2009 sc->sc_flags |= SC_OP_SCANNING;
2759 spin_unlock_bh(&sc->ani_lock); 2010 del_timer_sync(&common->ani.timer);
2011 cancel_delayed_work_sync(&sc->tx_complete_work);
2760 mutex_unlock(&sc->mutex); 2012 mutex_unlock(&sc->mutex);
2761} 2013}
2762 2014
@@ -2764,17 +2016,30 @@ static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2764{ 2016{
2765 struct ath_wiphy *aphy = hw->priv; 2017 struct ath_wiphy *aphy = hw->priv;
2766 struct ath_softc *sc = aphy->sc; 2018 struct ath_softc *sc = aphy->sc;
2019 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2767 2020
2768 mutex_lock(&sc->mutex); 2021 mutex_lock(&sc->mutex);
2769 spin_lock_bh(&sc->ani_lock);
2770 aphy->state = ATH_WIPHY_ACTIVE; 2022 aphy->state = ATH_WIPHY_ACTIVE;
2771 sc->sc_flags &= ~SC_OP_SCANNING; 2023 sc->sc_flags &= ~SC_OP_SCANNING;
2772 sc->sc_flags |= SC_OP_FULL_RESET; 2024 sc->sc_flags |= SC_OP_FULL_RESET;
2773 spin_unlock_bh(&sc->ani_lock); 2025 ath_start_ani(common);
2026 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
2774 ath_beacon_config(sc, NULL); 2027 ath_beacon_config(sc, NULL);
2775 mutex_unlock(&sc->mutex); 2028 mutex_unlock(&sc->mutex);
2776} 2029}
2777 2030
2031static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2032{
2033 struct ath_wiphy *aphy = hw->priv;
2034 struct ath_softc *sc = aphy->sc;
2035 struct ath_hw *ah = sc->sc_ah;
2036
2037 mutex_lock(&sc->mutex);
2038 ah->coverage_class = coverage_class;
2039 ath9k_hw_init_global_settings(ah);
2040 mutex_unlock(&sc->mutex);
2041}
2042
2778struct ieee80211_ops ath9k_ops = { 2043struct ieee80211_ops ath9k_ops = {
2779 .tx = ath9k_tx, 2044 .tx = ath9k_tx,
2780 .start = ath9k_start, 2045 .start = ath9k_start,
@@ -2783,7 +2048,8 @@ struct ieee80211_ops ath9k_ops = {
2783 .remove_interface = ath9k_remove_interface, 2048 .remove_interface = ath9k_remove_interface,
2784 .config = ath9k_config, 2049 .config = ath9k_config,
2785 .configure_filter = ath9k_configure_filter, 2050 .configure_filter = ath9k_configure_filter,
2786 .sta_notify = ath9k_sta_notify, 2051 .sta_add = ath9k_sta_add,
2052 .sta_remove = ath9k_sta_remove,
2787 .conf_tx = ath9k_conf_tx, 2053 .conf_tx = ath9k_conf_tx,
2788 .bss_info_changed = ath9k_bss_info_changed, 2054 .bss_info_changed = ath9k_bss_info_changed,
2789 .set_key = ath9k_set_key, 2055 .set_key = ath9k_set_key,
@@ -2794,122 +2060,5 @@ struct ieee80211_ops ath9k_ops = {
2794 .sw_scan_start = ath9k_sw_scan_start, 2060 .sw_scan_start = ath9k_sw_scan_start,
2795 .sw_scan_complete = ath9k_sw_scan_complete, 2061 .sw_scan_complete = ath9k_sw_scan_complete,
2796 .rfkill_poll = ath9k_rfkill_poll_state, 2062 .rfkill_poll = ath9k_rfkill_poll_state,
2063 .set_coverage_class = ath9k_set_coverage_class,
2797}; 2064};
2798
2799static struct {
2800 u32 version;
2801 const char * name;
2802} ath_mac_bb_names[] = {
2803 { AR_SREV_VERSION_5416_PCI, "5416" },
2804 { AR_SREV_VERSION_5416_PCIE, "5418" },
2805 { AR_SREV_VERSION_9100, "9100" },
2806 { AR_SREV_VERSION_9160, "9160" },
2807 { AR_SREV_VERSION_9280, "9280" },
2808 { AR_SREV_VERSION_9285, "9285" },
2809 { AR_SREV_VERSION_9287, "9287" }
2810};
2811
2812static struct {
2813 u16 version;
2814 const char * name;
2815} ath_rf_names[] = {
2816 { 0, "5133" },
2817 { AR_RAD5133_SREV_MAJOR, "5133" },
2818 { AR_RAD5122_SREV_MAJOR, "5122" },
2819 { AR_RAD2133_SREV_MAJOR, "2133" },
2820 { AR_RAD2122_SREV_MAJOR, "2122" }
2821};
2822
2823/*
2824 * Return the MAC/BB name. "????" is returned if the MAC/BB is unknown.
2825 */
2826const char *
2827ath_mac_bb_name(u32 mac_bb_version)
2828{
2829 int i;
2830
2831 for (i=0; i<ARRAY_SIZE(ath_mac_bb_names); i++) {
2832 if (ath_mac_bb_names[i].version == mac_bb_version) {
2833 return ath_mac_bb_names[i].name;
2834 }
2835 }
2836
2837 return "????";
2838}
2839
2840/*
2841 * Return the RF name. "????" is returned if the RF is unknown.
2842 */
2843const char *
2844ath_rf_name(u16 rf_version)
2845{
2846 int i;
2847
2848 for (i=0; i<ARRAY_SIZE(ath_rf_names); i++) {
2849 if (ath_rf_names[i].version == rf_version) {
2850 return ath_rf_names[i].name;
2851 }
2852 }
2853
2854 return "????";
2855}
2856
2857static int __init ath9k_init(void)
2858{
2859 int error;
2860
2861 /* Register rate control algorithm */
2862 error = ath_rate_control_register();
2863 if (error != 0) {
2864 printk(KERN_ERR
2865 "ath9k: Unable to register rate control "
2866 "algorithm: %d\n",
2867 error);
2868 goto err_out;
2869 }
2870
2871 error = ath9k_debug_create_root();
2872 if (error) {
2873 printk(KERN_ERR
2874 "ath9k: Unable to create debugfs root: %d\n",
2875 error);
2876 goto err_rate_unregister;
2877 }
2878
2879 error = ath_pci_init();
2880 if (error < 0) {
2881 printk(KERN_ERR
2882 "ath9k: No PCI devices found, driver not installed.\n");
2883 error = -ENODEV;
2884 goto err_remove_root;
2885 }
2886
2887 error = ath_ahb_init();
2888 if (error < 0) {
2889 error = -ENODEV;
2890 goto err_pci_exit;
2891 }
2892
2893 return 0;
2894
2895 err_pci_exit:
2896 ath_pci_exit();
2897
2898 err_remove_root:
2899 ath9k_debug_remove_root();
2900 err_rate_unregister:
2901 ath_rate_control_unregister();
2902 err_out:
2903 return error;
2904}
2905module_init(ath9k_init);
2906
2907static void __exit ath9k_exit(void)
2908{
2909 ath_ahb_exit();
2910 ath_pci_exit();
2911 ath9k_debug_remove_root();
2912 ath_rate_control_unregister();
2913 printk(KERN_INFO "%s: Driver unloaded\n", dev_info);
2914}
2915module_exit(ath9k_exit);
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 903dd8ad9d43..9441c6718a30 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -18,21 +18,23 @@
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include "ath9k.h" 19#include "ath9k.h"
20 20
21static struct pci_device_id ath_pci_id_table[] __devinitdata = { 21static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
22 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */ 22 { PCI_VDEVICE(ATHEROS, 0x0023) }, /* PCI */
23 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */ 23 { PCI_VDEVICE(ATHEROS, 0x0024) }, /* PCI-E */
24 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */ 24 { PCI_VDEVICE(ATHEROS, 0x0027) }, /* PCI */
25 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */ 25 { PCI_VDEVICE(ATHEROS, 0x0029) }, /* PCI */
26 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */ 26 { PCI_VDEVICE(ATHEROS, 0x002A) }, /* PCI-E */
27 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */ 27 { PCI_VDEVICE(ATHEROS, 0x002B) }, /* PCI-E */
28 { PCI_VDEVICE(ATHEROS, 0x002C) }, /* PCI-E 802.11n bonded out */
28 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */ 29 { PCI_VDEVICE(ATHEROS, 0x002D) }, /* PCI */
29 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */ 30 { PCI_VDEVICE(ATHEROS, 0x002E) }, /* PCI-E */
30 { 0 } 31 { 0 }
31}; 32};
32 33
33/* return bus cachesize in 4B word units */ 34/* return bus cachesize in 4B word units */
34static void ath_pci_read_cachesize(struct ath_softc *sc, int *csz) 35static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
35{ 36{
37 struct ath_softc *sc = (struct ath_softc *) common->priv;
36 u8 u8tmp; 38 u8 u8tmp;
37 39
38 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp); 40 pci_read_config_byte(to_pci_dev(sc->dev), PCI_CACHE_LINE_SIZE, &u8tmp);
@@ -48,18 +50,11 @@ static void ath_pci_read_cachesize(struct ath_softc *sc, int *csz)
48 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */ 50 *csz = DEFAULT_CACHELINE >> 2; /* Use the default size */
49} 51}
50 52
51static void ath_pci_cleanup(struct ath_softc *sc) 53static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
52{ 54{
53 struct pci_dev *pdev = to_pci_dev(sc->dev); 55 struct ath_hw *ah = (struct ath_hw *) common->ah;
54
55 pci_iounmap(pdev, sc->mem);
56 pci_disable_device(pdev);
57 pci_release_region(pdev, 0);
58}
59 56
60static bool ath_pci_eeprom_read(struct ath_hw *ah, u32 off, u16 *data) 57 common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
61{
62 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
63 58
64 if (!ath9k_hw_wait(ah, 59 if (!ath9k_hw_wait(ah,
65 AR_EEPROM_STATUS_DATA, 60 AR_EEPROM_STATUS_DATA,
@@ -69,16 +64,33 @@ static bool ath_pci_eeprom_read(struct ath_hw *ah, u32 off, u16 *data)
69 return false; 64 return false;
70 } 65 }
71 66
72 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA), 67 *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
73 AR_EEPROM_STATUS_DATA_VAL); 68 AR_EEPROM_STATUS_DATA_VAL);
74 69
75 return true; 70 return true;
76} 71}
77 72
78static struct ath_bus_ops ath_pci_bus_ops = { 73/*
74 * Bluetooth coexistance requires disabling ASPM.
75 */
76static void ath_pci_bt_coex_prep(struct ath_common *common)
77{
78 struct ath_softc *sc = (struct ath_softc *) common->priv;
79 struct pci_dev *pdev = to_pci_dev(sc->dev);
80 u8 aspm;
81
82 if (!pdev->is_pcie)
83 return;
84
85 pci_read_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, &aspm);
86 aspm &= ~(ATH_PCIE_CAP_LINK_L0S | ATH_PCIE_CAP_LINK_L1);
87 pci_write_config_byte(pdev, ATH_PCIE_CAP_LINK_CTRL, aspm);
88}
89
90static const struct ath_bus_ops ath_pci_bus_ops = {
79 .read_cachesize = ath_pci_read_cachesize, 91 .read_cachesize = ath_pci_read_cachesize,
80 .cleanup = ath_pci_cleanup,
81 .eeprom_read = ath_pci_eeprom_read, 92 .eeprom_read = ath_pci_eeprom_read,
93 .bt_coex_prep = ath_pci_bt_coex_prep,
82}; 94};
83 95
84static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 96static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
@@ -91,24 +103,22 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
91 u16 subsysid; 103 u16 subsysid;
92 u32 val; 104 u32 val;
93 int ret = 0; 105 int ret = 0;
94 struct ath_hw *ah; 106 char hw_name[64];
95 107
96 if (pci_enable_device(pdev)) 108 if (pci_enable_device(pdev))
97 return -EIO; 109 return -EIO;
98 110
99 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 111 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
100
101 if (ret) { 112 if (ret) {
102 printk(KERN_ERR "ath9k: 32-bit DMA not available\n"); 113 printk(KERN_ERR "ath9k: 32-bit DMA not available\n");
103 goto bad; 114 goto err_dma;
104 } 115 }
105 116
106 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 117 ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
107
108 if (ret) { 118 if (ret) {
109 printk(KERN_ERR "ath9k: 32-bit DMA consistent " 119 printk(KERN_ERR "ath9k: 32-bit DMA consistent "
110 "DMA enable failed\n"); 120 "DMA enable failed\n");
111 goto bad; 121 goto err_dma;
112 } 122 }
113 123
114 /* 124 /*
@@ -148,22 +158,22 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
148 if (ret) { 158 if (ret) {
149 dev_err(&pdev->dev, "PCI memory region reserve error\n"); 159 dev_err(&pdev->dev, "PCI memory region reserve error\n");
150 ret = -ENODEV; 160 ret = -ENODEV;
151 goto bad; 161 goto err_region;
152 } 162 }
153 163
154 mem = pci_iomap(pdev, 0, 0); 164 mem = pci_iomap(pdev, 0, 0);
155 if (!mem) { 165 if (!mem) {
156 printk(KERN_ERR "PCI memory map error\n") ; 166 printk(KERN_ERR "PCI memory map error\n") ;
157 ret = -EIO; 167 ret = -EIO;
158 goto bad1; 168 goto err_iomap;
159 } 169 }
160 170
161 hw = ieee80211_alloc_hw(sizeof(struct ath_wiphy) + 171 hw = ieee80211_alloc_hw(sizeof(struct ath_wiphy) +
162 sizeof(struct ath_softc), &ath9k_ops); 172 sizeof(struct ath_softc), &ath9k_ops);
163 if (!hw) { 173 if (!hw) {
164 dev_err(&pdev->dev, "no memory for ieee80211_hw\n"); 174 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
165 ret = -ENOMEM; 175 ret = -ENOMEM;
166 goto bad2; 176 goto err_alloc_hw;
167 } 177 }
168 178
169 SET_IEEE80211_DEV(hw, &pdev->dev); 179 SET_IEEE80211_DEV(hw, &pdev->dev);
@@ -177,46 +187,45 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
177 sc->hw = hw; 187 sc->hw = hw;
178 sc->dev = &pdev->dev; 188 sc->dev = &pdev->dev;
179 sc->mem = mem; 189 sc->mem = mem;
180 sc->bus_ops = &ath_pci_bus_ops;
181 190
182 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid); 191 /* Will be cleared in ath9k_start() */
183 ret = ath_init_device(id->device, sc, subsysid); 192 sc->sc_flags |= SC_OP_INVALID;
184 if (ret) {
185 dev_err(&pdev->dev, "failed to initialize device\n");
186 goto bad3;
187 }
188
189 /* setup interrupt service routine */
190 193
191 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc); 194 ret = request_irq(pdev->irq, ath_isr, IRQF_SHARED, "ath9k", sc);
192 if (ret) { 195 if (ret) {
193 dev_err(&pdev->dev, "request_irq failed\n"); 196 dev_err(&pdev->dev, "request_irq failed\n");
194 goto bad4; 197 goto err_irq;
195 } 198 }
196 199
197 sc->irq = pdev->irq; 200 sc->irq = pdev->irq;
198 201
199 ah = sc->sc_ah; 202 pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsysid);
203 ret = ath9k_init_device(id->device, sc, subsysid, &ath_pci_bus_ops);
204 if (ret) {
205 dev_err(&pdev->dev, "Failed to initialize device\n");
206 goto err_init;
207 }
208
209 ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
200 printk(KERN_INFO 210 printk(KERN_INFO
201 "%s: Atheros AR%s MAC/BB Rev:%x " 211 "%s: %s mem=0x%lx, irq=%d\n",
202 "AR%s RF Rev:%x: mem=0x%lx, irq=%d\n",
203 wiphy_name(hw->wiphy), 212 wiphy_name(hw->wiphy),
204 ath_mac_bb_name(ah->hw_version.macVersion), 213 hw_name,
205 ah->hw_version.macRev,
206 ath_rf_name((ah->hw_version.analog5GhzRev & AR_RADIO_SREV_MAJOR)),
207 ah->hw_version.phyRev,
208 (unsigned long)mem, pdev->irq); 214 (unsigned long)mem, pdev->irq);
209 215
210 return 0; 216 return 0;
211bad4: 217
212 ath_detach(sc); 218err_init:
213bad3: 219 free_irq(sc->irq, sc);
220err_irq:
214 ieee80211_free_hw(hw); 221 ieee80211_free_hw(hw);
215bad2: 222err_alloc_hw:
216 pci_iounmap(pdev, mem); 223 pci_iounmap(pdev, mem);
217bad1: 224err_iomap:
218 pci_release_region(pdev, 0); 225 pci_release_region(pdev, 0);
219bad: 226err_region:
227 /* Nothing */
228err_dma:
220 pci_disable_device(pdev); 229 pci_disable_device(pdev);
221 return ret; 230 return ret;
222} 231}
@@ -226,8 +235,15 @@ static void ath_pci_remove(struct pci_dev *pdev)
226 struct ieee80211_hw *hw = pci_get_drvdata(pdev); 235 struct ieee80211_hw *hw = pci_get_drvdata(pdev);
227 struct ath_wiphy *aphy = hw->priv; 236 struct ath_wiphy *aphy = hw->priv;
228 struct ath_softc *sc = aphy->sc; 237 struct ath_softc *sc = aphy->sc;
238 void __iomem *mem = sc->mem;
239
240 ath9k_deinit_device(sc);
241 free_irq(sc->irq, sc);
242 ieee80211_free_hw(sc->hw);
229 243
230 ath_cleanup(sc); 244 pci_iounmap(pdev, mem);
245 pci_disable_device(pdev);
246 pci_release_region(pdev, 0);
231} 247}
232 248
233#ifdef CONFIG_PM 249#ifdef CONFIG_PM
diff --git a/drivers/net/wireless/ath/ath9k/phy.c b/drivers/net/wireless/ath/ath9k/phy.c
index 63bf9a307c6a..2547b3c4a26c 100644
--- a/drivers/net/wireless/ath/ath9k/phy.c
+++ b/drivers/net/wireless/ath/ath9k/phy.c
@@ -14,90 +14,72 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include "ath9k.h" 17/**
18 18 * DOC: Programming Atheros 802.11n analog front end radios
19void 19 *
20ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, u32 freqIndex, 20 * AR5416 MAC based PCI devices and AR518 MAC based PCI-Express
21 int regWrites) 21 * devices have either an external AR2133 analog front end radio for single
22{ 22 * band 2.4 GHz communication or an AR5133 analog front end radio for dual
23 REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites); 23 * band 2.4 GHz / 5 GHz communication.
24} 24 *
25 25 * All devices after the AR5416 and AR5418 family starting with the AR9280
26bool 26 * have their analog front radios, MAC/BB and host PCIe/USB interface embedded
27ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan) 27 * into a single-chip and require less programming.
28{ 28 *
29 u32 channelSel = 0; 29 * The following single-chips exist with a respective embedded radio:
30 u32 bModeSynth = 0; 30 *
31 u32 aModeRefSel = 0; 31 * AR9280 - 11n dual-band 2x2 MIMO for PCIe
32 u32 reg32 = 0; 32 * AR9281 - 11n single-band 1x2 MIMO for PCIe
33 u16 freq; 33 * AR9285 - 11n single-band 1x1 for PCIe
34 struct chan_centers centers; 34 * AR9287 - 11n single-band 2x2 MIMO for PCIe
35 35 *
36 ath9k_hw_get_channel_centers(ah, chan, &centers); 36 * AR9220 - 11n dual-band 2x2 MIMO for PCI
37 freq = centers.synth_center; 37 * AR9223 - 11n single-band 2x2 MIMO for PCI
38 38 *
39 if (freq < 4800) { 39 * AR9287 - 11n single-band 1x1 MIMO for USB
40 u32 txctl; 40 */
41
42 if (((freq - 2192) % 5) == 0) {
43 channelSel = ((freq - 672) * 2 - 3040) / 10;
44 bModeSynth = 0;
45 } else if (((freq - 2224) % 5) == 0) {
46 channelSel = ((freq - 704) * 2 - 3040) / 10;
47 bModeSynth = 1;
48 } else {
49 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
50 "Invalid channel %u MHz\n", freq);
51 return false;
52 }
53
54 channelSel = (channelSel << 2) & 0xff;
55 channelSel = ath9k_hw_reverse_bits(channelSel, 8);
56
57 txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
58 if (freq == 2484) {
59
60 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
61 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
62 } else {
63 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
64 txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
65 }
66
67 } else if ((freq % 20) == 0 && freq >= 5120) {
68 channelSel =
69 ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
70 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
71 } else if ((freq % 10) == 0) {
72 channelSel =
73 ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
74 if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
75 aModeRefSel = ath9k_hw_reverse_bits(2, 2);
76 else
77 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
78 } else if ((freq % 5) == 0) {
79 channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
80 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
81 } else {
82 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
83 "Invalid channel %u MHz\n", freq);
84 return false;
85 }
86
87 reg32 =
88 (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
89 (1 << 5) | 0x1;
90 41
91 REG_WRITE(ah, AR_PHY(0x37), reg32); 42#include <linux/slab.h>
92 43
93 ah->curchan = chan; 44#include "hw.h"
94 ah->curchan_rad_index = -1;
95 45
96 return true; 46/**
47 * ath9k_hw_write_regs - ??
48 *
49 * @ah: atheros hardware structure
50 * @freqIndex:
51 * @regWrites:
52 *
53 * Used for both the chipsets with an external AR2133/AR5133 radios and
54 * single-chip devices.
55 */
56void ath9k_hw_write_regs(struct ath_hw *ah, u32 freqIndex, int regWrites)
57{
58 REG_WRITE_ARRAY(&ah->iniBB_RfGain, freqIndex, regWrites);
97} 59}
98 60
99void ath9k_hw_ar9280_set_channel(struct ath_hw *ah, 61/**
100 struct ath9k_channel *chan) 62 * ath9k_hw_ar9280_set_channel - set channel on single-chip device
63 * @ah: atheros hardware structure
64 * @chan:
65 *
66 * This is the function to change channel on single-chip devices, that is
67 * all devices after ar9280.
68 *
69 * This function takes the channel value in MHz and sets
70 * hardware channel value. Assumes writes have been enabled to analog bus.
71 *
72 * Actual Expression,
73 *
74 * For 2GHz channel,
75 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
76 * (freq_ref = 40MHz)
77 *
78 * For 5GHz channel,
79 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
80 * (freq_ref = 40MHz/(24>>amodeRefSel))
81 */
82int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
101{ 83{
102 u16 bMode, fracMode, aModeRefSel = 0; 84 u16 bMode, fracMode, aModeRefSel = 0;
103 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0; 85 u32 freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
@@ -110,22 +92,34 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
110 reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL); 92 reg32 = REG_READ(ah, AR_PHY_SYNTH_CONTROL);
111 reg32 &= 0xc0000000; 93 reg32 &= 0xc0000000;
112 94
113 if (freq < 4800) { 95 if (freq < 4800) { /* 2 GHz, fractional mode */
114 u32 txctl; 96 u32 txctl;
97 int regWrites = 0;
115 98
116 bMode = 1; 99 bMode = 1;
117 fracMode = 1; 100 fracMode = 1;
118 aModeRefSel = 0; 101 aModeRefSel = 0;
119 channelSel = (freq * 0x10000) / 15; 102 channelSel = (freq * 0x10000) / 15;
120 103
121 txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL); 104 if (AR_SREV_9287_11_OR_LATER(ah)) {
122 if (freq == 2484) { 105 if (freq == 2484) {
123 106 /* Enable channel spreading for channel 14 */
124 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 107 REG_WRITE_ARRAY(&ah->iniCckfirJapan2484,
125 txctl | AR_PHY_CCK_TX_CTRL_JAPAN); 108 1, regWrites);
109 } else {
110 REG_WRITE_ARRAY(&ah->iniCckfirNormal,
111 1, regWrites);
112 }
126 } else { 113 } else {
127 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL, 114 txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
128 txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN); 115 if (freq == 2484) {
116 /* Enable channel spreading for channel 14 */
117 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
118 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
119 } else {
120 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
121 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
122 }
129 } 123 }
130 } else { 124 } else {
131 bMode = 0; 125 bMode = 0;
@@ -143,10 +137,15 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
143 case 1: 137 case 1:
144 default: 138 default:
145 aModeRefSel = 0; 139 aModeRefSel = 0;
140 /*
141 * Enable 2G (fractional) mode for channels
142 * which are 5MHz spaced.
143 */
146 fracMode = 1; 144 fracMode = 1;
147 refDivA = 1; 145 refDivA = 1;
148 channelSel = (freq * 0x8000) / 15; 146 channelSel = (freq * 0x8000) / 15;
149 147
148 /* RefDivA setting */
150 REG_RMW_FIELD(ah, AR_AN_SYNTH9, 149 REG_RMW_FIELD(ah, AR_AN_SYNTH9,
151 AR_AN_SYNTH9_REFDIVA, refDivA); 150 AR_AN_SYNTH9_REFDIVA, refDivA);
152 151
@@ -168,12 +167,284 @@ void ath9k_hw_ar9280_set_channel(struct ath_hw *ah,
168 167
169 ah->curchan = chan; 168 ah->curchan = chan;
170 ah->curchan_rad_index = -1; 169 ah->curchan_rad_index = -1;
170
171 return 0;
172}
173
174/**
175 * ath9k_hw_9280_spur_mitigate - convert baseband spur frequency
176 * @ah: atheros hardware structure
177 * @chan:
178 *
179 * For single-chip solutions. Converts to baseband spur frequency given the
180 * input channel frequency and compute register settings below.
181 */
182void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
183{
184 int bb_spur = AR_NO_SPUR;
185 int freq;
186 int bin, cur_bin;
187 int bb_spur_off, spur_subchannel_sd;
188 int spur_freq_sd;
189 int spur_delta_phase;
190 int denominator;
191 int upper, lower, cur_vit_mask;
192 int tmp, newVal;
193 int i;
194 int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
195 AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
196 };
197 int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
198 AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
199 };
200 int inc[4] = { 0, 100, 0, 0 };
201 struct chan_centers centers;
202
203 int8_t mask_m[123];
204 int8_t mask_p[123];
205 int8_t mask_amt;
206 int tmp_mask;
207 int cur_bb_spur;
208 bool is2GHz = IS_CHAN_2GHZ(chan);
209
210 memset(&mask_m, 0, sizeof(int8_t) * 123);
211 memset(&mask_p, 0, sizeof(int8_t) * 123);
212
213 ath9k_hw_get_channel_centers(ah, chan, &centers);
214 freq = centers.synth_center;
215
216 ah->config.spurmode = SPUR_ENABLE_EEPROM;
217 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
218 cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
219
220 if (is2GHz)
221 cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_2GHZ;
222 else
223 cur_bb_spur = (cur_bb_spur / 10) + AR_BASE_FREQ_5GHZ;
224
225 if (AR_NO_SPUR == cur_bb_spur)
226 break;
227 cur_bb_spur = cur_bb_spur - freq;
228
229 if (IS_CHAN_HT40(chan)) {
230 if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT40) &&
231 (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT40)) {
232 bb_spur = cur_bb_spur;
233 break;
234 }
235 } else if ((cur_bb_spur > -AR_SPUR_FEEQ_BOUND_HT20) &&
236 (cur_bb_spur < AR_SPUR_FEEQ_BOUND_HT20)) {
237 bb_spur = cur_bb_spur;
238 break;
239 }
240 }
241
242 if (AR_NO_SPUR == bb_spur) {
243 REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
244 AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
245 return;
246 } else {
247 REG_CLR_BIT(ah, AR_PHY_FORCE_CLKEN_CCK,
248 AR_PHY_FORCE_CLKEN_CCK_MRC_MUX);
249 }
250
251 bin = bb_spur * 320;
252
253 tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
254
255 newVal = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
256 AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
257 AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
258 AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
259 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), newVal);
260
261 newVal = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
262 AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
263 AR_PHY_SPUR_REG_MASK_RATE_SELECT |
264 AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
265 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
266 REG_WRITE(ah, AR_PHY_SPUR_REG, newVal);
267
268 if (IS_CHAN_HT40(chan)) {
269 if (bb_spur < 0) {
270 spur_subchannel_sd = 1;
271 bb_spur_off = bb_spur + 10;
272 } else {
273 spur_subchannel_sd = 0;
274 bb_spur_off = bb_spur - 10;
275 }
276 } else {
277 spur_subchannel_sd = 0;
278 bb_spur_off = bb_spur;
279 }
280
281 if (IS_CHAN_HT40(chan))
282 spur_delta_phase =
283 ((bb_spur * 262144) /
284 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
285 else
286 spur_delta_phase =
287 ((bb_spur * 524288) /
288 10) & AR_PHY_TIMING11_SPUR_DELTA_PHASE;
289
290 denominator = IS_CHAN_2GHZ(chan) ? 44 : 40;
291 spur_freq_sd = ((bb_spur_off * 2048) / denominator) & 0x3ff;
292
293 newVal = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
294 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
295 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
296 REG_WRITE(ah, AR_PHY_TIMING11, newVal);
297
298 newVal = spur_subchannel_sd << AR_PHY_SFCORR_SPUR_SUBCHNL_SD_S;
299 REG_WRITE(ah, AR_PHY_SFCORR_EXT, newVal);
300
301 cur_bin = -6000;
302 upper = bin + 100;
303 lower = bin - 100;
304
305 for (i = 0; i < 4; i++) {
306 int pilot_mask = 0;
307 int chan_mask = 0;
308 int bp = 0;
309 for (bp = 0; bp < 30; bp++) {
310 if ((cur_bin > lower) && (cur_bin < upper)) {
311 pilot_mask = pilot_mask | 0x1 << bp;
312 chan_mask = chan_mask | 0x1 << bp;
313 }
314 cur_bin += 100;
315 }
316 cur_bin += inc[i];
317 REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
318 REG_WRITE(ah, chan_mask_reg[i], chan_mask);
319 }
320
321 cur_vit_mask = 6100;
322 upper = bin + 120;
323 lower = bin - 120;
324
325 for (i = 0; i < 123; i++) {
326 if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
327
328 /* workaround for gcc bug #37014 */
329 volatile int tmp_v = abs(cur_vit_mask - bin);
330
331 if (tmp_v < 75)
332 mask_amt = 1;
333 else
334 mask_amt = 0;
335 if (cur_vit_mask < 0)
336 mask_m[abs(cur_vit_mask / 100)] = mask_amt;
337 else
338 mask_p[cur_vit_mask / 100] = mask_amt;
339 }
340 cur_vit_mask -= 100;
341 }
342
343 tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
344 | (mask_m[48] << 26) | (mask_m[49] << 24)
345 | (mask_m[50] << 22) | (mask_m[51] << 20)
346 | (mask_m[52] << 18) | (mask_m[53] << 16)
347 | (mask_m[54] << 14) | (mask_m[55] << 12)
348 | (mask_m[56] << 10) | (mask_m[57] << 8)
349 | (mask_m[58] << 6) | (mask_m[59] << 4)
350 | (mask_m[60] << 2) | (mask_m[61] << 0);
351 REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
352 REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
353
354 tmp_mask = (mask_m[31] << 28)
355 | (mask_m[32] << 26) | (mask_m[33] << 24)
356 | (mask_m[34] << 22) | (mask_m[35] << 20)
357 | (mask_m[36] << 18) | (mask_m[37] << 16)
358 | (mask_m[48] << 14) | (mask_m[39] << 12)
359 | (mask_m[40] << 10) | (mask_m[41] << 8)
360 | (mask_m[42] << 6) | (mask_m[43] << 4)
361 | (mask_m[44] << 2) | (mask_m[45] << 0);
362 REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
363 REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
364
365 tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
366 | (mask_m[18] << 26) | (mask_m[18] << 24)
367 | (mask_m[20] << 22) | (mask_m[20] << 20)
368 | (mask_m[22] << 18) | (mask_m[22] << 16)
369 | (mask_m[24] << 14) | (mask_m[24] << 12)
370 | (mask_m[25] << 10) | (mask_m[26] << 8)
371 | (mask_m[27] << 6) | (mask_m[28] << 4)
372 | (mask_m[29] << 2) | (mask_m[30] << 0);
373 REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
374 REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
375
376 tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
377 | (mask_m[2] << 26) | (mask_m[3] << 24)
378 | (mask_m[4] << 22) | (mask_m[5] << 20)
379 | (mask_m[6] << 18) | (mask_m[7] << 16)
380 | (mask_m[8] << 14) | (mask_m[9] << 12)
381 | (mask_m[10] << 10) | (mask_m[11] << 8)
382 | (mask_m[12] << 6) | (mask_m[13] << 4)
383 | (mask_m[14] << 2) | (mask_m[15] << 0);
384 REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
385 REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
386
387 tmp_mask = (mask_p[15] << 28)
388 | (mask_p[14] << 26) | (mask_p[13] << 24)
389 | (mask_p[12] << 22) | (mask_p[11] << 20)
390 | (mask_p[10] << 18) | (mask_p[9] << 16)
391 | (mask_p[8] << 14) | (mask_p[7] << 12)
392 | (mask_p[6] << 10) | (mask_p[5] << 8)
393 | (mask_p[4] << 6) | (mask_p[3] << 4)
394 | (mask_p[2] << 2) | (mask_p[1] << 0);
395 REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
396 REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
397
398 tmp_mask = (mask_p[30] << 28)
399 | (mask_p[29] << 26) | (mask_p[28] << 24)
400 | (mask_p[27] << 22) | (mask_p[26] << 20)
401 | (mask_p[25] << 18) | (mask_p[24] << 16)
402 | (mask_p[23] << 14) | (mask_p[22] << 12)
403 | (mask_p[21] << 10) | (mask_p[20] << 8)
404 | (mask_p[19] << 6) | (mask_p[18] << 4)
405 | (mask_p[17] << 2) | (mask_p[16] << 0);
406 REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
407 REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
408
409 tmp_mask = (mask_p[45] << 28)
410 | (mask_p[44] << 26) | (mask_p[43] << 24)
411 | (mask_p[42] << 22) | (mask_p[41] << 20)
412 | (mask_p[40] << 18) | (mask_p[39] << 16)
413 | (mask_p[38] << 14) | (mask_p[37] << 12)
414 | (mask_p[36] << 10) | (mask_p[35] << 8)
415 | (mask_p[34] << 6) | (mask_p[33] << 4)
416 | (mask_p[32] << 2) | (mask_p[31] << 0);
417 REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
418 REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
419
420 tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
421 | (mask_p[59] << 26) | (mask_p[58] << 24)
422 | (mask_p[57] << 22) | (mask_p[56] << 20)
423 | (mask_p[55] << 18) | (mask_p[54] << 16)
424 | (mask_p[53] << 14) | (mask_p[52] << 12)
425 | (mask_p[51] << 10) | (mask_p[50] << 8)
426 | (mask_p[49] << 6) | (mask_p[48] << 4)
427 | (mask_p[47] << 2) | (mask_p[46] << 0);
428 REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
429 REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
171} 430}
172 431
173static void 432/* All code below is for non single-chip solutions */
174ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32, 433
175 u32 numBits, u32 firstBit, 434/**
176 u32 column) 435 * ath9k_phy_modify_rx_buffer() - perform analog swizzling of parameters
436 * @rfbuf:
437 * @reg32:
438 * @numBits:
439 * @firstBit:
440 * @column:
441 *
442 * Performs analog "swizzling" of parameters into their location.
443 * Used on external AR2133/AR5133 radios.
444 */
445static void ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
446 u32 numBits, u32 firstBit,
447 u32 column)
177{ 448{
178 u32 tmp32, mask, arrayEntry, lastBit; 449 u32 tmp32, mask, arrayEntry, lastBit;
179 int32_t bitPosition, bitsLeft; 450 int32_t bitPosition, bitsLeft;
@@ -197,26 +468,466 @@ ath9k_phy_modify_rx_buffer(u32 *rfBuf, u32 reg32,
197 } 468 }
198} 469}
199 470
200bool 471/*
201ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan, 472 * Fix on 2.4 GHz band for orientation sensitivity issue by increasing
202 u16 modesIndex) 473 * rf_pwd_icsyndiv.
474 *
475 * Theoretical Rules:
476 * if 2 GHz band
477 * if forceBiasAuto
478 * if synth_freq < 2412
479 * bias = 0
480 * else if 2412 <= synth_freq <= 2422
481 * bias = 1
482 * else // synth_freq > 2422
483 * bias = 2
484 * else if forceBias > 0
485 * bias = forceBias & 7
486 * else
487 * no change, use value from ini file
488 * else
489 * no change, invalid band
490 *
491 * 1st Mod:
492 * 2422 also uses value of 2
493 * <approved>
494 *
495 * 2nd Mod:
496 * Less than 2412 uses value of 0, 2412 and above uses value of 2
497 */
498static void ath9k_hw_force_bias(struct ath_hw *ah, u16 synth_freq)
499{
500 struct ath_common *common = ath9k_hw_common(ah);
501 u32 tmp_reg;
502 int reg_writes = 0;
503 u32 new_bias = 0;
504
505 if (!AR_SREV_5416(ah) || synth_freq >= 3000) {
506 return;
507 }
508
509 BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
510
511 if (synth_freq < 2412)
512 new_bias = 0;
513 else if (synth_freq < 2422)
514 new_bias = 1;
515 else
516 new_bias = 2;
517
518 /* pre-reverse this field */
519 tmp_reg = ath9k_hw_reverse_bits(new_bias, 3);
520
521 ath_print(common, ATH_DBG_CONFIG,
522 "Force rf_pwd_icsyndiv to %1d on %4d\n",
523 new_bias, synth_freq);
524
525 /* swizzle rf_pwd_icsyndiv */
526 ath9k_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
527
528 /* write Bank 6 with new params */
529 REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
530}
531
532/**
533 * ath9k_hw_set_channel - tune to a channel on the external AR2133/AR5133 radios
534 * @ah: atheros hardware stucture
535 * @chan:
536 *
537 * For the external AR2133/AR5133 radios, takes the MHz channel value and set
538 * the channel value. Assumes writes enabled to analog bus and bank6 register
539 * cache in ah->analogBank6Data.
540 */
541int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
542{
543 struct ath_common *common = ath9k_hw_common(ah);
544 u32 channelSel = 0;
545 u32 bModeSynth = 0;
546 u32 aModeRefSel = 0;
547 u32 reg32 = 0;
548 u16 freq;
549 struct chan_centers centers;
550
551 ath9k_hw_get_channel_centers(ah, chan, &centers);
552 freq = centers.synth_center;
553
554 if (freq < 4800) {
555 u32 txctl;
556
557 if (((freq - 2192) % 5) == 0) {
558 channelSel = ((freq - 672) * 2 - 3040) / 10;
559 bModeSynth = 0;
560 } else if (((freq - 2224) % 5) == 0) {
561 channelSel = ((freq - 704) * 2 - 3040) / 10;
562 bModeSynth = 1;
563 } else {
564 ath_print(common, ATH_DBG_FATAL,
565 "Invalid channel %u MHz\n", freq);
566 return -EINVAL;
567 }
568
569 channelSel = (channelSel << 2) & 0xff;
570 channelSel = ath9k_hw_reverse_bits(channelSel, 8);
571
572 txctl = REG_READ(ah, AR_PHY_CCK_TX_CTRL);
573 if (freq == 2484) {
574
575 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
576 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
577 } else {
578 REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
579 txctl & ~AR_PHY_CCK_TX_CTRL_JAPAN);
580 }
581
582 } else if ((freq % 20) == 0 && freq >= 5120) {
583 channelSel =
584 ath9k_hw_reverse_bits(((freq - 4800) / 20 << 2), 8);
585 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
586 } else if ((freq % 10) == 0) {
587 channelSel =
588 ath9k_hw_reverse_bits(((freq - 4800) / 10 << 1), 8);
589 if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
590 aModeRefSel = ath9k_hw_reverse_bits(2, 2);
591 else
592 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
593 } else if ((freq % 5) == 0) {
594 channelSel = ath9k_hw_reverse_bits((freq - 4800) / 5, 8);
595 aModeRefSel = ath9k_hw_reverse_bits(1, 2);
596 } else {
597 ath_print(common, ATH_DBG_FATAL,
598 "Invalid channel %u MHz\n", freq);
599 return -EINVAL;
600 }
601
602 ath9k_hw_force_bias(ah, freq);
603
604 reg32 =
605 (channelSel << 8) | (aModeRefSel << 2) | (bModeSynth << 1) |
606 (1 << 5) | 0x1;
607
608 REG_WRITE(ah, AR_PHY(0x37), reg32);
609
610 ah->curchan = chan;
611 ah->curchan_rad_index = -1;
612
613 return 0;
614}
615
616/**
617 * ath9k_hw_spur_mitigate - convert baseband spur frequency for external radios
618 * @ah: atheros hardware structure
619 * @chan:
620 *
621 * For non single-chip solutions. Converts to baseband spur frequency given the
622 * input channel frequency and compute register settings below.
623 */
624void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan)
625{
626 int bb_spur = AR_NO_SPUR;
627 int bin, cur_bin;
628 int spur_freq_sd;
629 int spur_delta_phase;
630 int denominator;
631 int upper, lower, cur_vit_mask;
632 int tmp, new;
633 int i;
634 int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8,
635 AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
636 };
637 int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10,
638 AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
639 };
640 int inc[4] = { 0, 100, 0, 0 };
641
642 int8_t mask_m[123];
643 int8_t mask_p[123];
644 int8_t mask_amt;
645 int tmp_mask;
646 int cur_bb_spur;
647 bool is2GHz = IS_CHAN_2GHZ(chan);
648
649 memset(&mask_m, 0, sizeof(int8_t) * 123);
650 memset(&mask_p, 0, sizeof(int8_t) * 123);
651
652 for (i = 0; i < AR_EEPROM_MODAL_SPURS; i++) {
653 cur_bb_spur = ah->eep_ops->get_spur_channel(ah, i, is2GHz);
654 if (AR_NO_SPUR == cur_bb_spur)
655 break;
656 cur_bb_spur = cur_bb_spur - (chan->channel * 10);
657 if ((cur_bb_spur > -95) && (cur_bb_spur < 95)) {
658 bb_spur = cur_bb_spur;
659 break;
660 }
661 }
662
663 if (AR_NO_SPUR == bb_spur)
664 return;
665
666 bin = bb_spur * 32;
667
668 tmp = REG_READ(ah, AR_PHY_TIMING_CTRL4(0));
669 new = tmp | (AR_PHY_TIMING_CTRL4_ENABLE_SPUR_RSSI |
670 AR_PHY_TIMING_CTRL4_ENABLE_SPUR_FILTER |
671 AR_PHY_TIMING_CTRL4_ENABLE_CHAN_MASK |
672 AR_PHY_TIMING_CTRL4_ENABLE_PILOT_MASK);
673
674 REG_WRITE(ah, AR_PHY_TIMING_CTRL4(0), new);
675
676 new = (AR_PHY_SPUR_REG_MASK_RATE_CNTL |
677 AR_PHY_SPUR_REG_ENABLE_MASK_PPM |
678 AR_PHY_SPUR_REG_MASK_RATE_SELECT |
679 AR_PHY_SPUR_REG_ENABLE_VIT_SPUR_RSSI |
680 SM(SPUR_RSSI_THRESH, AR_PHY_SPUR_REG_SPUR_RSSI_THRESH));
681 REG_WRITE(ah, AR_PHY_SPUR_REG, new);
682
683 spur_delta_phase = ((bb_spur * 524288) / 100) &
684 AR_PHY_TIMING11_SPUR_DELTA_PHASE;
685
686 denominator = IS_CHAN_2GHZ(chan) ? 440 : 400;
687 spur_freq_sd = ((bb_spur * 2048) / denominator) & 0x3ff;
688
689 new = (AR_PHY_TIMING11_USE_SPUR_IN_AGC |
690 SM(spur_freq_sd, AR_PHY_TIMING11_SPUR_FREQ_SD) |
691 SM(spur_delta_phase, AR_PHY_TIMING11_SPUR_DELTA_PHASE));
692 REG_WRITE(ah, AR_PHY_TIMING11, new);
693
694 cur_bin = -6000;
695 upper = bin + 100;
696 lower = bin - 100;
697
698 for (i = 0; i < 4; i++) {
699 int pilot_mask = 0;
700 int chan_mask = 0;
701 int bp = 0;
702 for (bp = 0; bp < 30; bp++) {
703 if ((cur_bin > lower) && (cur_bin < upper)) {
704 pilot_mask = pilot_mask | 0x1 << bp;
705 chan_mask = chan_mask | 0x1 << bp;
706 }
707 cur_bin += 100;
708 }
709 cur_bin += inc[i];
710 REG_WRITE(ah, pilot_mask_reg[i], pilot_mask);
711 REG_WRITE(ah, chan_mask_reg[i], chan_mask);
712 }
713
714 cur_vit_mask = 6100;
715 upper = bin + 120;
716 lower = bin - 120;
717
718 for (i = 0; i < 123; i++) {
719 if ((cur_vit_mask > lower) && (cur_vit_mask < upper)) {
720
721 /* workaround for gcc bug #37014 */
722 volatile int tmp_v = abs(cur_vit_mask - bin);
723
724 if (tmp_v < 75)
725 mask_amt = 1;
726 else
727 mask_amt = 0;
728 if (cur_vit_mask < 0)
729 mask_m[abs(cur_vit_mask / 100)] = mask_amt;
730 else
731 mask_p[cur_vit_mask / 100] = mask_amt;
732 }
733 cur_vit_mask -= 100;
734 }
735
736 tmp_mask = (mask_m[46] << 30) | (mask_m[47] << 28)
737 | (mask_m[48] << 26) | (mask_m[49] << 24)
738 | (mask_m[50] << 22) | (mask_m[51] << 20)
739 | (mask_m[52] << 18) | (mask_m[53] << 16)
740 | (mask_m[54] << 14) | (mask_m[55] << 12)
741 | (mask_m[56] << 10) | (mask_m[57] << 8)
742 | (mask_m[58] << 6) | (mask_m[59] << 4)
743 | (mask_m[60] << 2) | (mask_m[61] << 0);
744 REG_WRITE(ah, AR_PHY_BIN_MASK_1, tmp_mask);
745 REG_WRITE(ah, AR_PHY_VIT_MASK2_M_46_61, tmp_mask);
746
747 tmp_mask = (mask_m[31] << 28)
748 | (mask_m[32] << 26) | (mask_m[33] << 24)
749 | (mask_m[34] << 22) | (mask_m[35] << 20)
750 | (mask_m[36] << 18) | (mask_m[37] << 16)
751 | (mask_m[48] << 14) | (mask_m[39] << 12)
752 | (mask_m[40] << 10) | (mask_m[41] << 8)
753 | (mask_m[42] << 6) | (mask_m[43] << 4)
754 | (mask_m[44] << 2) | (mask_m[45] << 0);
755 REG_WRITE(ah, AR_PHY_BIN_MASK_2, tmp_mask);
756 REG_WRITE(ah, AR_PHY_MASK2_M_31_45, tmp_mask);
757
758 tmp_mask = (mask_m[16] << 30) | (mask_m[16] << 28)
759 | (mask_m[18] << 26) | (mask_m[18] << 24)
760 | (mask_m[20] << 22) | (mask_m[20] << 20)
761 | (mask_m[22] << 18) | (mask_m[22] << 16)
762 | (mask_m[24] << 14) | (mask_m[24] << 12)
763 | (mask_m[25] << 10) | (mask_m[26] << 8)
764 | (mask_m[27] << 6) | (mask_m[28] << 4)
765 | (mask_m[29] << 2) | (mask_m[30] << 0);
766 REG_WRITE(ah, AR_PHY_BIN_MASK_3, tmp_mask);
767 REG_WRITE(ah, AR_PHY_MASK2_M_16_30, tmp_mask);
768
769 tmp_mask = (mask_m[0] << 30) | (mask_m[1] << 28)
770 | (mask_m[2] << 26) | (mask_m[3] << 24)
771 | (mask_m[4] << 22) | (mask_m[5] << 20)
772 | (mask_m[6] << 18) | (mask_m[7] << 16)
773 | (mask_m[8] << 14) | (mask_m[9] << 12)
774 | (mask_m[10] << 10) | (mask_m[11] << 8)
775 | (mask_m[12] << 6) | (mask_m[13] << 4)
776 | (mask_m[14] << 2) | (mask_m[15] << 0);
777 REG_WRITE(ah, AR_PHY_MASK_CTL, tmp_mask);
778 REG_WRITE(ah, AR_PHY_MASK2_M_00_15, tmp_mask);
779
780 tmp_mask = (mask_p[15] << 28)
781 | (mask_p[14] << 26) | (mask_p[13] << 24)
782 | (mask_p[12] << 22) | (mask_p[11] << 20)
783 | (mask_p[10] << 18) | (mask_p[9] << 16)
784 | (mask_p[8] << 14) | (mask_p[7] << 12)
785 | (mask_p[6] << 10) | (mask_p[5] << 8)
786 | (mask_p[4] << 6) | (mask_p[3] << 4)
787 | (mask_p[2] << 2) | (mask_p[1] << 0);
788 REG_WRITE(ah, AR_PHY_BIN_MASK2_1, tmp_mask);
789 REG_WRITE(ah, AR_PHY_MASK2_P_15_01, tmp_mask);
790
791 tmp_mask = (mask_p[30] << 28)
792 | (mask_p[29] << 26) | (mask_p[28] << 24)
793 | (mask_p[27] << 22) | (mask_p[26] << 20)
794 | (mask_p[25] << 18) | (mask_p[24] << 16)
795 | (mask_p[23] << 14) | (mask_p[22] << 12)
796 | (mask_p[21] << 10) | (mask_p[20] << 8)
797 | (mask_p[19] << 6) | (mask_p[18] << 4)
798 | (mask_p[17] << 2) | (mask_p[16] << 0);
799 REG_WRITE(ah, AR_PHY_BIN_MASK2_2, tmp_mask);
800 REG_WRITE(ah, AR_PHY_MASK2_P_30_16, tmp_mask);
801
802 tmp_mask = (mask_p[45] << 28)
803 | (mask_p[44] << 26) | (mask_p[43] << 24)
804 | (mask_p[42] << 22) | (mask_p[41] << 20)
805 | (mask_p[40] << 18) | (mask_p[39] << 16)
806 | (mask_p[38] << 14) | (mask_p[37] << 12)
807 | (mask_p[36] << 10) | (mask_p[35] << 8)
808 | (mask_p[34] << 6) | (mask_p[33] << 4)
809 | (mask_p[32] << 2) | (mask_p[31] << 0);
810 REG_WRITE(ah, AR_PHY_BIN_MASK2_3, tmp_mask);
811 REG_WRITE(ah, AR_PHY_MASK2_P_45_31, tmp_mask);
812
813 tmp_mask = (mask_p[61] << 30) | (mask_p[60] << 28)
814 | (mask_p[59] << 26) | (mask_p[58] << 24)
815 | (mask_p[57] << 22) | (mask_p[56] << 20)
816 | (mask_p[55] << 18) | (mask_p[54] << 16)
817 | (mask_p[53] << 14) | (mask_p[52] << 12)
818 | (mask_p[51] << 10) | (mask_p[50] << 8)
819 | (mask_p[49] << 6) | (mask_p[48] << 4)
820 | (mask_p[47] << 2) | (mask_p[46] << 0);
821 REG_WRITE(ah, AR_PHY_BIN_MASK2_4, tmp_mask);
822 REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask);
823}
824
825/**
826 * ath9k_hw_rf_alloc_ext_banks - allocates banks for external radio programming
827 * @ah: atheros hardware structure
828 *
829 * Only required for older devices with external AR2133/AR5133 radios.
830 */
831int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
832{
833#define ATH_ALLOC_BANK(bank, size) do { \
834 bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \
835 if (!bank) { \
836 ath_print(common, ATH_DBG_FATAL, \
837 "Cannot allocate RF banks\n"); \
838 return -ENOMEM; \
839 } \
840 } while (0);
841
842 struct ath_common *common = ath9k_hw_common(ah);
843
844 BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
845
846 ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
847 ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
848 ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
849 ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
850 ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
851 ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
852 ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
853 ATH_ALLOC_BANK(ah->addac5416_21,
854 ah->iniAddac.ia_rows * ah->iniAddac.ia_columns);
855 ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
856
857 return 0;
858#undef ATH_ALLOC_BANK
859}
860
861
862/**
863 * ath9k_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
864 * @ah: atheros hardware struture
865 * For the external AR2133/AR5133 radios banks.
866 */
867void
868ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
869{
870#define ATH_FREE_BANK(bank) do { \
871 kfree(bank); \
872 bank = NULL; \
873 } while (0);
874
875 BUG_ON(AR_SREV_9280_10_OR_LATER(ah));
876
877 ATH_FREE_BANK(ah->analogBank0Data);
878 ATH_FREE_BANK(ah->analogBank1Data);
879 ATH_FREE_BANK(ah->analogBank2Data);
880 ATH_FREE_BANK(ah->analogBank3Data);
881 ATH_FREE_BANK(ah->analogBank6Data);
882 ATH_FREE_BANK(ah->analogBank6TPCData);
883 ATH_FREE_BANK(ah->analogBank7Data);
884 ATH_FREE_BANK(ah->addac5416_21);
885 ATH_FREE_BANK(ah->bank6Temp);
886
887#undef ATH_FREE_BANK
888}
889
890/* *
891 * ath9k_hw_set_rf_regs - programs rf registers based on EEPROM
892 * @ah: atheros hardware structure
893 * @chan:
894 * @modesIndex:
895 *
896 * Used for the external AR2133/AR5133 radios.
897 *
898 * Reads the EEPROM header info from the device structure and programs
899 * all rf registers. This routine requires access to the analog
900 * rf device. This is not required for single-chip devices.
901 */
902bool ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
903 u16 modesIndex)
203{ 904{
204 u32 eepMinorRev; 905 u32 eepMinorRev;
205 u32 ob5GHz = 0, db5GHz = 0; 906 u32 ob5GHz = 0, db5GHz = 0;
206 u32 ob2GHz = 0, db2GHz = 0; 907 u32 ob2GHz = 0, db2GHz = 0;
207 int regWrites = 0; 908 int regWrites = 0;
208 909
910 /*
911 * Software does not need to program bank data
912 * for single chip devices, that is AR9280 or anything
913 * after that.
914 */
209 if (AR_SREV_9280_10_OR_LATER(ah)) 915 if (AR_SREV_9280_10_OR_LATER(ah))
210 return true; 916 return true;
211 917
918 /* Setup rf parameters */
212 eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV); 919 eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
213 920
921 /* Setup Bank 0 Write */
214 RF_BANK_SETUP(ah->analogBank0Data, &ah->iniBank0, 1); 922 RF_BANK_SETUP(ah->analogBank0Data, &ah->iniBank0, 1);
215 923
924 /* Setup Bank 1 Write */
216 RF_BANK_SETUP(ah->analogBank1Data, &ah->iniBank1, 1); 925 RF_BANK_SETUP(ah->analogBank1Data, &ah->iniBank1, 1);
217 926
927 /* Setup Bank 2 Write */
218 RF_BANK_SETUP(ah->analogBank2Data, &ah->iniBank2, 1); 928 RF_BANK_SETUP(ah->analogBank2Data, &ah->iniBank2, 1);
219 929
930 /* Setup Bank 6 Write */
220 RF_BANK_SETUP(ah->analogBank3Data, &ah->iniBank3, 931 RF_BANK_SETUP(ah->analogBank3Data, &ah->iniBank3,
221 modesIndex); 932 modesIndex);
222 { 933 {
@@ -227,6 +938,7 @@ ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
227 } 938 }
228 } 939 }
229 940
941 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
230 if (eepMinorRev >= 2) { 942 if (eepMinorRev >= 2) {
231 if (IS_CHAN_2GHZ(chan)) { 943 if (IS_CHAN_2GHZ(chan)) {
232 ob2GHz = ah->eep_ops->get_eeprom(ah, EEP_OB_2); 944 ob2GHz = ah->eep_ops->get_eeprom(ah, EEP_OB_2);
@@ -245,8 +957,10 @@ ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
245 } 957 }
246 } 958 }
247 959
960 /* Setup Bank 7 Setup */
248 RF_BANK_SETUP(ah->analogBank7Data, &ah->iniBank7, 1); 961 RF_BANK_SETUP(ah->analogBank7Data, &ah->iniBank7, 1);
249 962
963 /* Write Analog registers */
250 REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data, 964 REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
251 regWrites); 965 regWrites);
252 REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data, 966 REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
@@ -262,137 +976,3 @@ ath9k_hw_set_rf_regs(struct ath_hw *ah, struct ath9k_channel *chan,
262 976
263 return true; 977 return true;
264} 978}
265
266void
267ath9k_hw_rf_free(struct ath_hw *ah)
268{
269#define ATH_FREE_BANK(bank) do { \
270 kfree(bank); \
271 bank = NULL; \
272 } while (0);
273
274 ATH_FREE_BANK(ah->analogBank0Data);
275 ATH_FREE_BANK(ah->analogBank1Data);
276 ATH_FREE_BANK(ah->analogBank2Data);
277 ATH_FREE_BANK(ah->analogBank3Data);
278 ATH_FREE_BANK(ah->analogBank6Data);
279 ATH_FREE_BANK(ah->analogBank6TPCData);
280 ATH_FREE_BANK(ah->analogBank7Data);
281 ATH_FREE_BANK(ah->addac5416_21);
282 ATH_FREE_BANK(ah->bank6Temp);
283#undef ATH_FREE_BANK
284}
285
286bool ath9k_hw_init_rf(struct ath_hw *ah, int *status)
287{
288 if (!AR_SREV_9280_10_OR_LATER(ah)) {
289 ah->analogBank0Data =
290 kzalloc((sizeof(u32) *
291 ah->iniBank0.ia_rows), GFP_KERNEL);
292 ah->analogBank1Data =
293 kzalloc((sizeof(u32) *
294 ah->iniBank1.ia_rows), GFP_KERNEL);
295 ah->analogBank2Data =
296 kzalloc((sizeof(u32) *
297 ah->iniBank2.ia_rows), GFP_KERNEL);
298 ah->analogBank3Data =
299 kzalloc((sizeof(u32) *
300 ah->iniBank3.ia_rows), GFP_KERNEL);
301 ah->analogBank6Data =
302 kzalloc((sizeof(u32) *
303 ah->iniBank6.ia_rows), GFP_KERNEL);
304 ah->analogBank6TPCData =
305 kzalloc((sizeof(u32) *
306 ah->iniBank6TPC.ia_rows), GFP_KERNEL);
307 ah->analogBank7Data =
308 kzalloc((sizeof(u32) *
309 ah->iniBank7.ia_rows), GFP_KERNEL);
310
311 if (ah->analogBank0Data == NULL
312 || ah->analogBank1Data == NULL
313 || ah->analogBank2Data == NULL
314 || ah->analogBank3Data == NULL
315 || ah->analogBank6Data == NULL
316 || ah->analogBank6TPCData == NULL
317 || ah->analogBank7Data == NULL) {
318 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
319 "Cannot allocate RF banks\n");
320 *status = -ENOMEM;
321 return false;
322 }
323
324 ah->addac5416_21 =
325 kzalloc((sizeof(u32) *
326 ah->iniAddac.ia_rows *
327 ah->iniAddac.ia_columns), GFP_KERNEL);
328 if (ah->addac5416_21 == NULL) {
329 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
330 "Cannot allocate addac5416_21\n");
331 *status = -ENOMEM;
332 return false;
333 }
334
335 ah->bank6Temp =
336 kzalloc((sizeof(u32) *
337 ah->iniBank6.ia_rows), GFP_KERNEL);
338 if (ah->bank6Temp == NULL) {
339 DPRINTF(ah->ah_sc, ATH_DBG_FATAL,
340 "Cannot allocate bank6Temp\n");
341 *status = -ENOMEM;
342 return false;
343 }
344 }
345
346 return true;
347}
348
349void
350ath9k_hw_decrease_chain_power(struct ath_hw *ah, struct ath9k_channel *chan)
351{
352 int i, regWrites = 0;
353 u32 bank6SelMask;
354 u32 *bank6Temp = ah->bank6Temp;
355
356 switch (ah->config.diversity_control) {
357 case ATH9K_ANT_FIXED_A:
358 bank6SelMask =
359 (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
360 REDUCE_CHAIN_0 : REDUCE_CHAIN_1;
361 break;
362 case ATH9K_ANT_FIXED_B:
363 bank6SelMask =
364 (ah->config.antenna_switch_swap & ANTSWAP_AB) ?
365 REDUCE_CHAIN_1 : REDUCE_CHAIN_0;
366 break;
367 case ATH9K_ANT_VARIABLE:
368 return;
369 break;
370 default:
371 return;
372 break;
373 }
374
375 for (i = 0; i < ah->iniBank6.ia_rows; i++)
376 bank6Temp[i] = ah->analogBank6Data[i];
377
378 REG_WRITE(ah, AR_PHY_BASE + 0xD8, bank6SelMask);
379
380 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 189, 0);
381 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 190, 0);
382 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 191, 0);
383 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 192, 0);
384 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 193, 0);
385 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 222, 0);
386 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 245, 0);
387 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 246, 0);
388 ath9k_phy_modify_rx_buffer(bank6Temp, 1, 1, 247, 0);
389
390 REG_WRITE_RF_ARRAY(&ah->iniBank6, bank6Temp, regWrites);
391
392 REG_WRITE(ah, AR_PHY_BASE + 0xD8, 0x00000053);
393#ifdef ALTER_SWITCH
394 REG_WRITE(ah, PHY_SWITCH_CHAIN_0,
395 (REG_READ(ah, PHY_SWITCH_CHAIN_0) & ~0x38)
396 | ((REG_READ(ah, PHY_SWITCH_CHAIN_0) >> 3) & 0x38));
397#endif
398}
diff --git a/drivers/net/wireless/ath/ath9k/phy.h b/drivers/net/wireless/ath/ath9k/phy.h
index dfda6f444648..0999a495fd46 100644
--- a/drivers/net/wireless/ath/ath9k/phy.h
+++ b/drivers/net/wireless/ath/ath9k/phy.h
@@ -17,20 +17,23 @@
17#ifndef PHY_H 17#ifndef PHY_H
18#define PHY_H 18#define PHY_H
19 19
20void ath9k_hw_ar9280_set_channel(struct ath_hw *ah, 20/* Common between single chip and non single-chip solutions */
21 struct ath9k_channel 21void ath9k_hw_write_regs(struct ath_hw *ah, u32 freqIndex, int regWrites);
22 *chan); 22
23bool ath9k_hw_set_channel(struct ath_hw *ah, 23/* Single chip radio settings */
24 struct ath9k_channel *chan); 24int ath9k_hw_ar9280_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
25void ath9k_hw_write_regs(struct ath_hw *ah, u32 modesIndex, 25void ath9k_hw_9280_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
26 u32 freqIndex, int regWrites); 26
27/* Routines below are for non single-chip solutions */
28int ath9k_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan);
29void ath9k_hw_spur_mitigate(struct ath_hw *ah, struct ath9k_channel *chan);
30
31int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah);
32void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah);
33
27bool ath9k_hw_set_rf_regs(struct ath_hw *ah, 34bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
28 struct ath9k_channel *chan, 35 struct ath9k_channel *chan,
29 u16 modesIndex); 36 u16 modesIndex);
30void ath9k_hw_decrease_chain_power(struct ath_hw *ah,
31 struct ath9k_channel *chan);
32bool ath9k_hw_init_rf(struct ath_hw *ah,
33 int *status);
34 37
35#define AR_PHY_BASE 0x9800 38#define AR_PHY_BASE 0x9800
36#define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2)) 39#define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
@@ -45,6 +48,7 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
45#define AR_PHY_FC_DYN2040_EN 0x00000004 48#define AR_PHY_FC_DYN2040_EN 0x00000004
46#define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008 49#define AR_PHY_FC_DYN2040_PRI_ONLY 0x00000008
47#define AR_PHY_FC_DYN2040_PRI_CH 0x00000010 50#define AR_PHY_FC_DYN2040_PRI_CH 0x00000010
51/* For 25 MHz channel spacing -- not used but supported by hw */
48#define AR_PHY_FC_DYN2040_EXT_CH 0x00000020 52#define AR_PHY_FC_DYN2040_EXT_CH 0x00000020
49#define AR_PHY_FC_HT_EN 0x00000040 53#define AR_PHY_FC_HT_EN 0x00000040
50#define AR_PHY_FC_SHORT_GI_40 0x00000080 54#define AR_PHY_FC_SHORT_GI_40 0x00000080
@@ -185,8 +189,20 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
185#define AR_PHY_PLL_CTL_44_2133 0xeb 189#define AR_PHY_PLL_CTL_44_2133 0xeb
186#define AR_PHY_PLL_CTL_40_2133 0xea 190#define AR_PHY_PLL_CTL_40_2133 0xea
187 191
188#define AR_PHY_SPECTRAL_SCAN 0x9912 192#define AR_PHY_SPECTRAL_SCAN 0x9910 /* AR9280 spectral scan configuration register */
189#define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1 193#define AR_PHY_SPECTRAL_SCAN_ENABLE 0x1
194#define AR_PHY_SPECTRAL_SCAN_ENA 0x00000001 /* Enable spectral scan, reg 68, bit 0 */
195#define AR_PHY_SPECTRAL_SCAN_ENA_S 0 /* Enable spectral scan, reg 68, bit 0 */
196#define AR_PHY_SPECTRAL_SCAN_ACTIVE 0x00000002 /* Activate spectral scan reg 68, bit 1*/
197#define AR_PHY_SPECTRAL_SCAN_ACTIVE_S 1 /* Activate spectral scan reg 68, bit 1*/
198#define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD 0x000000F0 /* Interval for FFT reports, reg 68, bits 4-7*/
199#define AR_PHY_SPECTRAL_SCAN_FFT_PERIOD_S 4
200#define AR_PHY_SPECTRAL_SCAN_PERIOD 0x0000FF00 /* Interval for FFT reports, reg 68, bits 8-15*/
201#define AR_PHY_SPECTRAL_SCAN_PERIOD_S 8
202#define AR_PHY_SPECTRAL_SCAN_COUNT 0x00FF0000 /* Number of reports, reg 68, bits 16-23*/
203#define AR_PHY_SPECTRAL_SCAN_COUNT_S 16
204#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 /* Short repeat, reg 68, bit 24*/
205#define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24 /* Short repeat, reg 68, bit 24*/
190 206
191#define AR_PHY_RX_DELAY 0x9914 207#define AR_PHY_RX_DELAY 0x9914
192#define AR_PHY_SEARCH_START_DELAY 0x9918 208#define AR_PHY_SEARCH_START_DELAY 0x9918
@@ -368,6 +384,9 @@ bool ath9k_hw_init_rf(struct ath_hw *ah,
368 384
369#define AR_PHY_HEAVY_CLIP_ENABLE 0x99E0 385#define AR_PHY_HEAVY_CLIP_ENABLE 0x99E0
370 386
387#define AR_PHY_HEAVY_CLIP_FACTOR_RIFS 0x99EC
388#define AR_PHY_RIFS_INIT_DELAY 0x03ff0000
389
371#define AR_PHY_M_SLEEP 0x99f0 390#define AR_PHY_M_SLEEP 0x99f0
372#define AR_PHY_REFCLKDLY 0x99f4 391#define AR_PHY_REFCLKDLY 0x99f4
373#define AR_PHY_REFCLKPD 0x99f8 392#define AR_PHY_REFCLKPD 0x99f8
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 1895d63aad0a..244e1c629177 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -15,137 +15,98 @@
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */ 16 */
17 17
18#include <linux/slab.h>
19
18#include "ath9k.h" 20#include "ath9k.h"
19 21
20static const struct ath_rate_table ar5416_11na_ratetable = { 22static const struct ath_rate_table ar5416_11na_ratetable = {
21 42, 23 42,
24 8, /* MCS start */
22 { 25 {
23 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ 26 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
24 5400, 0x0b, 0x00, 12, 27 5400, 0, 12, 0, 0, 0, 0, 0 },
25 0, 0, 0, 0, 0, 0 },
26 { VALID, VALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */ 28 { VALID, VALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
27 7800, 0x0f, 0x00, 18, 29 7800, 1, 18, 0, 1, 1, 1, 1 },
28 0, 1, 1, 1, 1, 0 },
29 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */ 30 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
30 10000, 0x0a, 0x00, 24, 31 10000, 2, 24, 2, 2, 2, 2, 2 },
31 2, 2, 2, 2, 2, 0 },
32 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */ 32 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
33 13900, 0x0e, 0x00, 36, 33 13900, 3, 36, 2, 3, 3, 3, 3 },
34 2, 3, 3, 3, 3, 0 },
35 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */ 34 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
36 17300, 0x09, 0x00, 48, 35 17300, 4, 48, 4, 4, 4, 4, 4 },
37 4, 4, 4, 4, 4, 0 },
38 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */ 36 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
39 23000, 0x0d, 0x00, 72, 37 23000, 5, 72, 4, 5, 5, 5, 5 },
40 4, 5, 5, 5, 5, 0 },
41 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */ 38 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
42 27400, 0x08, 0x00, 96, 39 27400, 6, 96, 4, 6, 6, 6, 6 },
43 4, 6, 6, 6, 6, 0 },
44 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ 40 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
45 29300, 0x0c, 0x00, 108, 41 29300, 7, 108, 4, 7, 7, 7, 7 },
46 4, 7, 7, 7, 7, 0 },
47 { VALID_2040, VALID_2040, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ 42 { VALID_2040, VALID_2040, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */
48 6400, 0x80, 0x00, 0, 43 6400, 0, 0, 0, 8, 24, 8, 24 },
49 0, 8, 24, 8, 24, 3216 },
50 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ 44 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */
51 12700, 0x81, 0x00, 1, 45 12700, 1, 1, 2, 9, 25, 9, 25 },
52 2, 9, 25, 9, 25, 6434 },
53 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ 46 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */
54 18800, 0x82, 0x00, 2, 47 18800, 2, 2, 2, 10, 26, 10, 26 },
55 2, 10, 26, 10, 26, 9650 },
56 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ 48 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */
57 25000, 0x83, 0x00, 3, 49 25000, 3, 3, 4, 11, 27, 11, 27 },
58 4, 11, 27, 11, 27, 12868 },
59 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ 50 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */
60 36700, 0x84, 0x00, 4, 51 36700, 4, 4, 4, 12, 28, 12, 28 },
61 4, 12, 28, 12, 28, 19304 },
62 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ 52 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */
63 48100, 0x85, 0x00, 5, 53 48100, 5, 5, 4, 13, 29, 13, 29 },
64 4, 13, 29, 13, 29, 25740 },
65 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ 54 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */
66 53500, 0x86, 0x00, 6, 55 53500, 6, 6, 4, 14, 30, 14, 30 },
67 4, 14, 30, 14, 30, 28956 },
68 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ 56 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */
69 59000, 0x87, 0x00, 7, 57 59000, 7, 7, 4, 15, 31, 15, 32 },
70 4, 15, 31, 15, 32, 32180 },
71 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ 58 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */
72 12700, 0x88, 0x00, 59 12700, 8, 8, 3, 16, 33, 16, 33 },
73 8, 3, 16, 33, 16, 33, 6430 },
74 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ 60 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */
75 24800, 0x89, 0x00, 9, 61 24800, 9, 9, 2, 17, 34, 17, 34 },
76 2, 17, 34, 17, 34, 12860 },
77 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ 62 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */
78 36600, 0x8a, 0x00, 10, 63 36600, 10, 10, 2, 18, 35, 18, 35 },
79 2, 18, 35, 18, 35, 19300 },
80 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ 64 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */
81 48100, 0x8b, 0x00, 11, 65 48100, 11, 11, 4, 19, 36, 19, 36 },
82 4, 19, 36, 19, 36, 25736 },
83 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ 66 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */
84 69500, 0x8c, 0x00, 12, 67 69500, 12, 12, 4, 20, 37, 20, 37 },
85 4, 20, 37, 20, 37, 38600 },
86 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ 68 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */
87 89500, 0x8d, 0x00, 13, 69 89500, 13, 13, 4, 21, 38, 21, 38 },
88 4, 21, 38, 21, 38, 51472 },
89 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ 70 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */
90 98900, 0x8e, 0x00, 14, 71 98900, 14, 14, 4, 22, 39, 22, 39 },
91 4, 22, 39, 22, 39, 57890 },
92 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ 72 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */
93 108300, 0x8f, 0x00, 15, 73 108300, 15, 15, 4, 23, 40, 23, 41 },
94 4, 23, 40, 23, 41, 64320 },
95 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ 74 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */
96 13200, 0x80, 0x00, 0, 75 13200, 0, 0, 0, 8, 24, 24, 24 },
97 0, 8, 24, 24, 24, 6684 },
98 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ 76 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */
99 25900, 0x81, 0x00, 1, 77 25900, 1, 1, 2, 9, 25, 25, 25 },
100 2, 9, 25, 25, 25, 13368 },
101 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ 78 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */
102 38600, 0x82, 0x00, 2, 79 38600, 2, 2, 2, 10, 26, 26, 26 },
103 2, 10, 26, 26, 26, 20052 },
104 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ 80 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */
105 49800, 0x83, 0x00, 3, 81 49800, 3, 3, 4, 11, 27, 27, 27 },
106 4, 11, 27, 27, 27, 26738 },
107 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ 82 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */
108 72200, 0x84, 0x00, 4, 83 72200, 4, 4, 4, 12, 28, 28, 28 },
109 4, 12, 28, 28, 28, 40104 },
110 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ 84 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */
111 92900, 0x85, 0x00, 5, 85 92900, 5, 5, 4, 13, 29, 29, 29 },
112 4, 13, 29, 29, 29, 53476 },
113 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ 86 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */
114 102700, 0x86, 0x00, 6, 87 102700, 6, 6, 4, 14, 30, 30, 30 },
115 4, 14, 30, 30, 30, 60156 },
116 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ 88 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */
117 112000, 0x87, 0x00, 7, 89 112000, 7, 7, 4, 15, 31, 32, 32 },
118 4, 15, 31, 32, 32, 66840 },
119 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ 90 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */
120 122000, 0x87, 0x00, 7, 91 122000, 7, 7, 4, 15, 31, 32, 32 },
121 4, 15, 31, 32, 32, 74200 },
122 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ 92 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */
123 25800, 0x88, 0x00, 8, 93 25800, 8, 8, 0, 16, 33, 33, 33 },
124 0, 16, 33, 33, 33, 13360 },
125 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ 94 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */
126 49800, 0x89, 0x00, 9, 95 49800, 9, 9, 2, 17, 34, 34, 34 },
127 2, 17, 34, 34, 34, 26720 },
128 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ 96 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */
129 71900, 0x8a, 0x00, 10, 97 71900, 10, 10, 2, 18, 35, 35, 35 },
130 2, 18, 35, 35, 35, 40080 },
131 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ 98 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */
132 92500, 0x8b, 0x00, 11, 99 92500, 11, 11, 4, 19, 36, 36, 36 },
133 4, 19, 36, 36, 36, 53440 },
134 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ 100 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */
135 130300, 0x8c, 0x00, 12, 101 130300, 12, 12, 4, 20, 37, 37, 37 },
136 4, 20, 37, 37, 37, 80160 },
137 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ 102 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */
138 162800, 0x8d, 0x00, 13, 103 162800, 13, 13, 4, 21, 38, 38, 38 },
139 4, 21, 38, 38, 38, 106880 },
140 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ 104 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */
141 178200, 0x8e, 0x00, 14, 105 178200, 14, 14, 4, 22, 39, 39, 39 },
142 4, 22, 39, 39, 39, 120240 },
143 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ 106 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */
144 192100, 0x8f, 0x00, 15, 107 192100, 15, 15, 4, 23, 40, 41, 41 },
145 4, 23, 40, 41, 41, 133600 },
146 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ 108 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */
147 207000, 0x8f, 0x00, 15, 109 207000, 15, 15, 4, 23, 40, 41, 41 },
148 4, 23, 40, 41, 41, 148400 },
149 }, 110 },
150 50, /* probe interval */ 111 50, /* probe interval */
151 WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ 112 WLAN_RC_HT_FLAG, /* Phy rates allowed initially */
@@ -156,177 +117,125 @@ static const struct ath_rate_table ar5416_11na_ratetable = {
156 117
157static const struct ath_rate_table ar5416_11ng_ratetable = { 118static const struct ath_rate_table ar5416_11ng_ratetable = {
158 46, 119 46,
120 12, /* MCS start */
159 { 121 {
160 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ 122 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
161 900, 0x1b, 0x00, 2, 123 900, 0, 2, 0, 0, 0, 0, 0 },
162 0, 0, 0, 0, 0, 0 },
163 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 2000, /* 2 Mb */ 124 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 2000, /* 2 Mb */
164 1900, 0x1a, 0x04, 4, 125 1900, 1, 4, 1, 1, 1, 1, 1 },
165 1, 1, 1, 1, 1, 0 },
166 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 5500, /* 5.5 Mb */ 126 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 5500, /* 5.5 Mb */
167 4900, 0x19, 0x04, 11, 127 4900, 2, 11, 2, 2, 2, 2, 2 },
168 2, 2, 2, 2, 2, 0 },
169 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 11000, /* 11 Mb */ 128 { VALID_ALL, VALID_ALL, WLAN_RC_PHY_CCK, 11000, /* 11 Mb */
170 8100, 0x18, 0x04, 22, 129 8100, 3, 22, 3, 3, 3, 3, 3 },
171 3, 3, 3, 3, 3, 0 },
172 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ 130 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
173 5400, 0x0b, 0x00, 12, 131 5400, 4, 12, 4, 4, 4, 4, 4 },
174 4, 4, 4, 4, 4, 0 },
175 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */ 132 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
176 7800, 0x0f, 0x00, 18, 133 7800, 5, 18, 4, 5, 5, 5, 5 },
177 4, 5, 5, 5, 5, 0 },
178 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */ 134 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
179 10100, 0x0a, 0x00, 24, 135 10100, 6, 24, 6, 6, 6, 6, 6 },
180 6, 6, 6, 6, 6, 0 },
181 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */ 136 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
182 14100, 0x0e, 0x00, 36, 137 14100, 7, 36, 6, 7, 7, 7, 7 },
183 6, 7, 7, 7, 7, 0 },
184 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */ 138 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
185 17700, 0x09, 0x00, 48, 139 17700, 8, 48, 8, 8, 8, 8, 8 },
186 8, 8, 8, 8, 8, 0 },
187 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */ 140 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
188 23700, 0x0d, 0x00, 72, 141 23700, 9, 72, 8, 9, 9, 9, 9 },
189 8, 9, 9, 9, 9, 0 },
190 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */ 142 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
191 27400, 0x08, 0x00, 96, 143 27400, 10, 96, 8, 10, 10, 10, 10 },
192 8, 10, 10, 10, 10, 0 },
193 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ 144 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
194 30900, 0x0c, 0x00, 108, 145 30900, 11, 108, 8, 11, 11, 11, 11 },
195 8, 11, 11, 11, 11, 0 },
196 { INVALID, INVALID, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */ 146 { INVALID, INVALID, WLAN_RC_PHY_HT_20_SS, 6500, /* 6.5 Mb */
197 6400, 0x80, 0x00, 0, 147 6400, 0, 0, 4, 12, 28, 12, 28 },
198 4, 12, 28, 12, 28, 3216 },
199 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */ 148 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 13000, /* 13 Mb */
200 12700, 0x81, 0x00, 1, 149 12700, 1, 1, 6, 13, 29, 13, 29 },
201 6, 13, 29, 13, 29, 6434 },
202 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */ 150 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 19500, /* 19.5 Mb */
203 18800, 0x82, 0x00, 2, 151 18800, 2, 2, 6, 14, 30, 14, 30 },
204 6, 14, 30, 14, 30, 9650 },
205 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */ 152 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 26000, /* 26 Mb */
206 25000, 0x83, 0x00, 3, 153 25000, 3, 3, 8, 15, 31, 15, 31 },
207 8, 15, 31, 15, 31, 12868 },
208 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */ 154 { VALID_20, VALID_20, WLAN_RC_PHY_HT_20_SS, 39000, /* 39 Mb */
209 36700, 0x84, 0x00, 4, 155 36700, 4, 4, 8, 16, 32, 16, 32 },
210 8, 16, 32, 16, 32, 19304 },
211 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */ 156 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 52000, /* 52 Mb */
212 48100, 0x85, 0x00, 5, 157 48100, 5, 5, 8, 17, 33, 17, 33 },
213 8, 17, 33, 17, 33, 25740 },
214 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */ 158 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 58500, /* 58.5 Mb */
215 53500, 0x86, 0x00, 6, 159 53500, 6, 6, 8, 18, 34, 18, 34 },
216 8, 18, 34, 18, 34, 28956 },
217 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */ 160 { INVALID, VALID_20, WLAN_RC_PHY_HT_20_SS, 65000, /* 65 Mb */
218 59000, 0x87, 0x00, 7, 161 59000, 7, 7, 8, 19, 35, 19, 36 },
219 8, 19, 35, 19, 36, 32180 },
220 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */ 162 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 13000, /* 13 Mb */
221 12700, 0x88, 0x00, 8, 163 12700, 8, 8, 4, 20, 37, 20, 37 },
222 4, 20, 37, 20, 37, 6430 },
223 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */ 164 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 26000, /* 26 Mb */
224 24800, 0x89, 0x00, 9, 165 24800, 9, 9, 6, 21, 38, 21, 38 },
225 6, 21, 38, 21, 38, 12860 },
226 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */ 166 { INVALID, INVALID, WLAN_RC_PHY_HT_20_DS, 39000, /* 39 Mb */
227 36600, 0x8a, 0x00, 10, 167 36600, 10, 10, 6, 22, 39, 22, 39 },
228 6, 22, 39, 22, 39, 19300 },
229 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */ 168 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 52000, /* 52 Mb */
230 48100, 0x8b, 0x00, 11, 169 48100, 11, 11, 8, 23, 40, 23, 40 },
231 8, 23, 40, 23, 40, 25736 },
232 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */ 170 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 78000, /* 78 Mb */
233 69500, 0x8c, 0x00, 12, 171 69500, 12, 12, 8, 24, 41, 24, 41 },
234 8, 24, 41, 24, 41, 38600 },
235 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */ 172 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 104000, /* 104 Mb */
236 89500, 0x8d, 0x00, 13, 173 89500, 13, 13, 8, 25, 42, 25, 42 },
237 8, 25, 42, 25, 42, 51472 },
238 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */ 174 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 117000, /* 117 Mb */
239 98900, 0x8e, 0x00, 14, 175 98900, 14, 14, 8, 26, 43, 26, 44 },
240 8, 26, 43, 26, 44, 57890 },
241 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */ 176 { VALID_20, INVALID, WLAN_RC_PHY_HT_20_DS, 130000, /* 130 Mb */
242 108300, 0x8f, 0x00, 15, 177 108300, 15, 15, 8, 27, 44, 27, 45 },
243 8, 27, 44, 27, 45, 64320 },
244 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */ 178 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 13500, /* 13.5 Mb */
245 13200, 0x80, 0x00, 0, 179 13200, 0, 0, 8, 12, 28, 28, 28 },
246 8, 12, 28, 28, 28, 6684 },
247 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */ 180 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 27500, /* 27.0 Mb */
248 25900, 0x81, 0x00, 1, 181 25900, 1, 1, 8, 13, 29, 29, 29 },
249 8, 13, 29, 29, 29, 13368 },
250 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */ 182 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 40500, /* 40.5 Mb */
251 38600, 0x82, 0x00, 2, 183 38600, 2, 2, 8, 14, 30, 30, 30 },
252 8, 14, 30, 30, 30, 20052 },
253 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */ 184 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 54000, /* 54 Mb */
254 49800, 0x83, 0x00, 3, 185 49800, 3, 3, 8, 15, 31, 31, 31 },
255 8, 15, 31, 31, 31, 26738 },
256 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */ 186 { VALID_40, VALID_40, WLAN_RC_PHY_HT_40_SS, 81500, /* 81 Mb */
257 72200, 0x84, 0x00, 4, 187 72200, 4, 4, 8, 16, 32, 32, 32 },
258 8, 16, 32, 32, 32, 40104 },
259 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */ 188 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 108000, /* 108 Mb */
260 92900, 0x85, 0x00, 5, 189 92900, 5, 5, 8, 17, 33, 33, 33 },
261 8, 17, 33, 33, 33, 53476 },
262 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */ 190 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 121500, /* 121.5 Mb */
263 102700, 0x86, 0x00, 6, 191 102700, 6, 6, 8, 18, 34, 34, 34 },
264 8, 18, 34, 34, 34, 60156 },
265 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */ 192 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS, 135000, /* 135 Mb */
266 112000, 0x87, 0x00, 7, 193 112000, 7, 7, 8, 19, 35, 36, 36 },
267 8, 19, 35, 36, 36, 66840 },
268 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */ 194 { INVALID, VALID_40, WLAN_RC_PHY_HT_40_SS_HGI, 150000, /* 150 Mb */
269 122000, 0x87, 0x00, 7, 195 122000, 7, 7, 8, 19, 35, 36, 36 },
270 8, 19, 35, 36, 36, 74200 },
271 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */ 196 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 27000, /* 27 Mb */
272 25800, 0x88, 0x00, 8, 197 25800, 8, 8, 8, 20, 37, 37, 37 },
273 8, 20, 37, 37, 37, 13360 },
274 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */ 198 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 54000, /* 54 Mb */
275 49800, 0x89, 0x00, 9, 199 49800, 9, 9, 8, 21, 38, 38, 38 },
276 8, 21, 38, 38, 38, 26720 },
277 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */ 200 { INVALID, INVALID, WLAN_RC_PHY_HT_40_DS, 81000, /* 81 Mb */
278 71900, 0x8a, 0x00, 10, 201 71900, 10, 10, 8, 22, 39, 39, 39 },
279 8, 22, 39, 39, 39, 40080 },
280 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */ 202 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 108000, /* 108 Mb */
281 92500, 0x8b, 0x00, 11, 203 92500, 11, 11, 8, 23, 40, 40, 40 },
282 8, 23, 40, 40, 40, 53440 },
283 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */ 204 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 162000, /* 162 Mb */
284 130300, 0x8c, 0x00, 12, 205 130300, 12, 12, 8, 24, 41, 41, 41 },
285 8, 24, 41, 41, 41, 80160 },
286 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */ 206 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 216000, /* 216 Mb */
287 162800, 0x8d, 0x00, 13, 207 162800, 13, 13, 8, 25, 42, 42, 42 },
288 8, 25, 42, 42, 42, 106880 },
289 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */ 208 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 243000, /* 243 Mb */
290 178200, 0x8e, 0x00, 14, 209 178200, 14, 14, 8, 26, 43, 43, 43 },
291 8, 26, 43, 43, 43, 120240 },
292 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */ 210 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS, 270000, /* 270 Mb */
293 192100, 0x8f, 0x00, 15, 211 192100, 15, 15, 8, 27, 44, 45, 45 },
294 8, 27, 44, 45, 45, 133600 },
295 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */ 212 { VALID_40, INVALID, WLAN_RC_PHY_HT_40_DS_HGI, 300000, /* 300 Mb */
296 207000, 0x8f, 0x00, 15, 213 207000, 15, 15, 8, 27, 44, 45, 45 },
297 8, 27, 44, 45, 45, 148400 }, 214 },
298 },
299 50, /* probe interval */ 215 50, /* probe interval */
300 WLAN_RC_HT_FLAG, /* Phy rates allowed initially */ 216 WLAN_RC_HT_FLAG, /* Phy rates allowed initially */
301}; 217};
302 218
303static const struct ath_rate_table ar5416_11a_ratetable = { 219static const struct ath_rate_table ar5416_11a_ratetable = {
304 8, 220 8,
221 0,
305 { 222 {
306 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ 223 { VALID, VALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
307 5400, 0x0b, 0x00, (0x80|12), 224 5400, 0, 12, 0, 0, 0 },
308 0, 0, 0 },
309 { VALID, VALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */ 225 { VALID, VALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
310 7800, 0x0f, 0x00, 18, 226 7800, 1, 18, 0, 1, 0 },
311 0, 1, 0 },
312 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */ 227 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
313 10000, 0x0a, 0x00, (0x80|24), 228 10000, 2, 24, 2, 2, 0 },
314 2, 2, 0 },
315 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */ 229 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
316 13900, 0x0e, 0x00, 36, 230 13900, 3, 36, 2, 3, 0 },
317 2, 3, 0 },
318 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */ 231 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
319 17300, 0x09, 0x00, (0x80|48), 232 17300, 4, 48, 4, 4, 0 },
320 4, 4, 0 },
321 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */ 233 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
322 23000, 0x0d, 0x00, 72, 234 23000, 5, 72, 4, 5, 0 },
323 4, 5, 0 },
324 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */ 235 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
325 27400, 0x08, 0x00, 96, 236 27400, 6, 96, 4, 6, 0 },
326 4, 6, 0 },
327 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ 237 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
328 29300, 0x0c, 0x00, 108, 238 29300, 7, 108, 4, 7, 0 },
329 4, 7, 0 },
330 }, 239 },
331 50, /* probe interval */ 240 50, /* probe interval */
332 0, /* Phy rates allowed initially */ 241 0, /* Phy rates allowed initially */
@@ -334,48 +243,51 @@ static const struct ath_rate_table ar5416_11a_ratetable = {
334 243
335static const struct ath_rate_table ar5416_11g_ratetable = { 244static const struct ath_rate_table ar5416_11g_ratetable = {
336 12, 245 12,
246 0,
337 { 247 {
338 { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */ 248 { VALID, VALID, WLAN_RC_PHY_CCK, 1000, /* 1 Mb */
339 900, 0x1b, 0x00, 2, 249 900, 0, 2, 0, 0, 0 },
340 0, 0, 0 },
341 { VALID, VALID, WLAN_RC_PHY_CCK, 2000, /* 2 Mb */ 250 { VALID, VALID, WLAN_RC_PHY_CCK, 2000, /* 2 Mb */
342 1900, 0x1a, 0x04, 4, 251 1900, 1, 4, 1, 1, 0 },
343 1, 1, 0 },
344 { VALID, VALID, WLAN_RC_PHY_CCK, 5500, /* 5.5 Mb */ 252 { VALID, VALID, WLAN_RC_PHY_CCK, 5500, /* 5.5 Mb */
345 4900, 0x19, 0x04, 11, 253 4900, 2, 11, 2, 2, 0 },
346 2, 2, 0 },
347 { VALID, VALID, WLAN_RC_PHY_CCK, 11000, /* 11 Mb */ 254 { VALID, VALID, WLAN_RC_PHY_CCK, 11000, /* 11 Mb */
348 8100, 0x18, 0x04, 22, 255 8100, 3, 22, 3, 3, 0 },
349 3, 3, 0 },
350 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */ 256 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 6000, /* 6 Mb */
351 5400, 0x0b, 0x00, 12, 257 5400, 4, 12, 4, 4, 0 },
352 4, 4, 0 },
353 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */ 258 { INVALID, INVALID, WLAN_RC_PHY_OFDM, 9000, /* 9 Mb */
354 7800, 0x0f, 0x00, 18, 259 7800, 5, 18, 4, 5, 0 },
355 4, 5, 0 },
356 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */ 260 { VALID, VALID, WLAN_RC_PHY_OFDM, 12000, /* 12 Mb */
357 10000, 0x0a, 0x00, 24, 261 10000, 6, 24, 6, 6, 0 },
358 6, 6, 0 },
359 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */ 262 { VALID, VALID, WLAN_RC_PHY_OFDM, 18000, /* 18 Mb */
360 13900, 0x0e, 0x00, 36, 263 13900, 7, 36, 6, 7, 0 },
361 6, 7, 0 },
362 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */ 264 { VALID, VALID, WLAN_RC_PHY_OFDM, 24000, /* 24 Mb */
363 17300, 0x09, 0x00, 48, 265 17300, 8, 48, 8, 8, 0 },
364 8, 8, 0 },
365 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */ 266 { VALID, VALID, WLAN_RC_PHY_OFDM, 36000, /* 36 Mb */
366 23000, 0x0d, 0x00, 72, 267 23000, 9, 72, 8, 9, 0 },
367 8, 9, 0 },
368 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */ 268 { VALID, VALID, WLAN_RC_PHY_OFDM, 48000, /* 48 Mb */
369 27400, 0x08, 0x00, 96, 269 27400, 10, 96, 8, 10, 0 },
370 8, 10, 0 },
371 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */ 270 { VALID, VALID, WLAN_RC_PHY_OFDM, 54000, /* 54 Mb */
372 29300, 0x0c, 0x00, 108, 271 29300, 11, 108, 8, 11, 0 },
373 8, 11, 0 },
374 }, 272 },
375 50, /* probe interval */ 273 50, /* probe interval */
376 0, /* Phy rates allowed initially */ 274 0, /* Phy rates allowed initially */
377}; 275};
378 276
277static const struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX] = {
278 [ATH9K_MODE_11A] = &ar5416_11a_ratetable,
279 [ATH9K_MODE_11G] = &ar5416_11g_ratetable,
280 [ATH9K_MODE_11NA_HT20] = &ar5416_11na_ratetable,
281 [ATH9K_MODE_11NG_HT20] = &ar5416_11ng_ratetable,
282 [ATH9K_MODE_11NA_HT40PLUS] = &ar5416_11na_ratetable,
283 [ATH9K_MODE_11NA_HT40MINUS] = &ar5416_11na_ratetable,
284 [ATH9K_MODE_11NG_HT40PLUS] = &ar5416_11ng_ratetable,
285 [ATH9K_MODE_11NG_HT40MINUS] = &ar5416_11ng_ratetable,
286};
287
288static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table,
289 struct ieee80211_tx_rate *rate);
290
379static inline int8_t median(int8_t a, int8_t b, int8_t c) 291static inline int8_t median(int8_t a, int8_t b, int8_t c)
380{ 292{
381 if (a >= b) { 293 if (a >= b) {
@@ -425,7 +337,7 @@ static void ath_rc_init_valid_txmask(struct ath_rate_priv *ath_rc_priv)
425static inline void ath_rc_set_valid_txmask(struct ath_rate_priv *ath_rc_priv, 337static inline void ath_rc_set_valid_txmask(struct ath_rate_priv *ath_rc_priv,
426 u8 index, int valid_tx_rate) 338 u8 index, int valid_tx_rate)
427{ 339{
428 ASSERT(index <= ath_rc_priv->rate_table_size); 340 BUG_ON(index > ath_rc_priv->rate_table_size);
429 ath_rc_priv->valid_rate_index[index] = valid_tx_rate ? 1 : 0; 341 ath_rc_priv->valid_rate_index[index] = valid_tx_rate ? 1 : 0;
430} 342}
431 343
@@ -534,7 +446,7 @@ static u8 ath_rc_setvalid_rates(struct ath_rate_priv *ath_rc_priv,
534 * capflag matches one of the validity 446 * capflag matches one of the validity
535 * (VALID/VALID_20/VALID_40) flags */ 447 * (VALID/VALID_20/VALID_40) flags */
536 448
537 if (((rate & 0x7F) == (dot11rate & 0x7F)) && 449 if ((rate == dot11rate) &&
538 ((valid & WLAN_RC_CAP_MODE(capflag)) == 450 ((valid & WLAN_RC_CAP_MODE(capflag)) ==
539 WLAN_RC_CAP_MODE(capflag)) && 451 WLAN_RC_CAP_MODE(capflag)) &&
540 !WLAN_RC_PHY_HT(phy)) { 452 !WLAN_RC_PHY_HT(phy)) {
@@ -576,8 +488,7 @@ static u8 ath_rc_setvalid_htrates(struct ath_rate_priv *ath_rc_priv,
576 u8 rate = rateset->rs_rates[i]; 488 u8 rate = rateset->rs_rates[i];
577 u8 dot11rate = rate_table->info[j].dot11rate; 489 u8 dot11rate = rate_table->info[j].dot11rate;
578 490
579 if (((rate & 0x7F) != (dot11rate & 0x7F)) || 491 if ((rate != dot11rate) || !WLAN_RC_PHY_HT(phy) ||
580 !WLAN_RC_PHY_HT(phy) ||
581 !WLAN_RC_PHY_HT_VALID(valid, capflag)) 492 !WLAN_RC_PHY_HT_VALID(valid, capflag))
582 continue; 493 continue;
583 494
@@ -696,18 +607,20 @@ static void ath_rc_rate_set_series(const struct ath_rate_table *rate_table,
696 u8 tries, u8 rix, int rtsctsenable) 607 u8 tries, u8 rix, int rtsctsenable)
697{ 608{
698 rate->count = tries; 609 rate->count = tries;
699 rate->idx = rix; 610 rate->idx = rate_table->info[rix].ratecode;
700 611
701 if (txrc->short_preamble) 612 if (txrc->short_preamble)
702 rate->flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE; 613 rate->flags |= IEEE80211_TX_RC_USE_SHORT_PREAMBLE;
703 if (txrc->rts || rtsctsenable) 614 if (txrc->rts || rtsctsenable)
704 rate->flags |= IEEE80211_TX_RC_USE_RTS_CTS; 615 rate->flags |= IEEE80211_TX_RC_USE_RTS_CTS;
705 if (WLAN_RC_PHY_40(rate_table->info[rix].phy)) 616
706 rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH; 617 if (WLAN_RC_PHY_HT(rate_table->info[rix].phy)) {
707 if (WLAN_RC_PHY_SGI(rate_table->info[rix].phy))
708 rate->flags |= IEEE80211_TX_RC_SHORT_GI;
709 if (WLAN_RC_PHY_HT(rate_table->info[rix].phy))
710 rate->flags |= IEEE80211_TX_RC_MCS; 618 rate->flags |= IEEE80211_TX_RC_MCS;
619 if (WLAN_RC_PHY_40(rate_table->info[rix].phy))
620 rate->flags |= IEEE80211_TX_RC_40_MHZ_WIDTH;
621 if (WLAN_RC_PHY_SGI(rate_table->info[rix].phy))
622 rate->flags |= IEEE80211_TX_RC_SHORT_GI;
623 }
711} 624}
712 625
713static void ath_rc_rate_set_rtscts(struct ath_softc *sc, 626static void ath_rc_rate_set_rtscts(struct ath_softc *sc,
@@ -720,7 +633,7 @@ static void ath_rc_rate_set_rtscts(struct ath_softc *sc,
720 /* get the cix for the lowest valid rix */ 633 /* get the cix for the lowest valid rix */
721 for (i = 3; i >= 0; i--) { 634 for (i = 3; i >= 0; i--) {
722 if (rates[i].count && (rates[i].idx >= 0)) { 635 if (rates[i].count && (rates[i].idx >= 0)) {
723 rix = rates[i].idx; 636 rix = ath_rc_get_rateindex(rate_table, &rates[i]);
724 break; 637 break;
725 } 638 }
726 } 639 }
@@ -757,7 +670,7 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
757 struct ieee80211_tx_rate *rates = tx_info->control.rates; 670 struct ieee80211_tx_rate *rates = tx_info->control.rates;
758 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 671 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
759 __le16 fc = hdr->frame_control; 672 __le16 fc = hdr->frame_control;
760 u8 try_per_rate, i = 0, rix, nrix; 673 u8 try_per_rate, i = 0, rix;
761 int is_probe = 0; 674 int is_probe = 0;
762 675
763 if (rate_control_send_low(sta, priv_sta, txrc)) 676 if (rate_control_send_low(sta, priv_sta, txrc))
@@ -767,48 +680,47 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
767 * For Multi Rate Retry we use a different number of 680 * For Multi Rate Retry we use a different number of
768 * retry attempt counts. This ends up looking like this: 681 * retry attempt counts. This ends up looking like this:
769 * 682 *
770 * MRR[0] = 2 683 * MRR[0] = 4
771 * MRR[1] = 2 684 * MRR[1] = 4
772 * MRR[2] = 2 685 * MRR[2] = 4
773 * MRR[3] = 4 686 * MRR[3] = 8
774 * 687 *
775 */ 688 */
776 try_per_rate = sc->hw->max_rate_tries; 689 try_per_rate = 4;
777 690
778 rate_table = sc->cur_rate_table; 691 rate_table = sc->cur_rate_table;
779 rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe); 692 rix = ath_rc_get_highest_rix(sc, ath_rc_priv, rate_table, &is_probe);
780 nrix = rix;
781 693
782 if (is_probe) { 694 if (is_probe) {
783 /* set one try for probe rates. For the 695 /* set one try for probe rates. For the
784 * probes don't enable rts */ 696 * probes don't enable rts */
785 ath_rc_rate_set_series(rate_table, &rates[i++], txrc, 697 ath_rc_rate_set_series(rate_table, &rates[i++], txrc,
786 1, nrix, 0); 698 1, rix, 0);
787 699
788 /* Get the next tried/allowed rate. No RTS for the next series 700 /* Get the next tried/allowed rate. No RTS for the next series
789 * after the probe rate 701 * after the probe rate
790 */ 702 */
791 ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &nrix); 703 ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix);
792 ath_rc_rate_set_series(rate_table, &rates[i++], txrc, 704 ath_rc_rate_set_series(rate_table, &rates[i++], txrc,
793 try_per_rate, nrix, 0); 705 try_per_rate, rix, 0);
794 706
795 tx_info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE; 707 tx_info->flags |= IEEE80211_TX_CTL_RATE_CTRL_PROBE;
796 } else { 708 } else {
797 /* Set the choosen rate. No RTS for first series entry. */ 709 /* Set the choosen rate. No RTS for first series entry. */
798 ath_rc_rate_set_series(rate_table, &rates[i++], txrc, 710 ath_rc_rate_set_series(rate_table, &rates[i++], txrc,
799 try_per_rate, nrix, 0); 711 try_per_rate, rix, 0);
800 } 712 }
801 713
802 /* Fill in the other rates for multirate retry */ 714 /* Fill in the other rates for multirate retry */
803 for ( ; i < 4; i++) { 715 for ( ; i < 4; i++) {
804 /* Use twice the number of tries for the last MRR segment. */ 716 /* Use twice the number of tries for the last MRR segment. */
805 if (i + 1 == 4) 717 if (i + 1 == 4)
806 try_per_rate = 4; 718 try_per_rate = 8;
807 719
808 ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &nrix); 720 ath_rc_get_lower_rix(rate_table, ath_rc_priv, rix, &rix);
809 /* All other rates in the series have RTS enabled */ 721 /* All other rates in the series have RTS enabled */
810 ath_rc_rate_set_series(rate_table, &rates[i], txrc, 722 ath_rc_rate_set_series(rate_table, &rates[i], txrc,
811 try_per_rate, nrix, 1); 723 try_per_rate, rix, 1);
812 } 724 }
813 725
814 /* 726 /*
@@ -859,12 +771,12 @@ static void ath_get_rate(void *priv, struct ieee80211_sta *sta, void *priv_sta,
859static bool ath_rc_update_per(struct ath_softc *sc, 771static bool ath_rc_update_per(struct ath_softc *sc,
860 const struct ath_rate_table *rate_table, 772 const struct ath_rate_table *rate_table,
861 struct ath_rate_priv *ath_rc_priv, 773 struct ath_rate_priv *ath_rc_priv,
862 struct ath_tx_info_priv *tx_info_priv, 774 struct ieee80211_tx_info *tx_info,
863 int tx_rate, int xretries, int retries, 775 int tx_rate, int xretries, int retries,
864 u32 now_msec) 776 u32 now_msec)
865{ 777{
866 bool state_change = false; 778 bool state_change = false;
867 int count; 779 int count, n_bad_frames;
868 u8 last_per; 780 u8 last_per;
869 static u32 nretry_to_per_lookup[10] = { 781 static u32 nretry_to_per_lookup[10] = {
870 100 * 0 / 1, 782 100 * 0 / 1,
@@ -880,6 +792,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
880 }; 792 };
881 793
882 last_per = ath_rc_priv->per[tx_rate]; 794 last_per = ath_rc_priv->per[tx_rate];
795 n_bad_frames = tx_info->status.ampdu_len - tx_info->status.ampdu_ack_len;
883 796
884 if (xretries) { 797 if (xretries) {
885 if (xretries == 1) { 798 if (xretries == 1) {
@@ -907,7 +820,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
907 if (retries >= count) 820 if (retries >= count)
908 retries = count - 1; 821 retries = count - 1;
909 822
910 if (tx_info_priv->n_bad_frames) { 823 if (n_bad_frames) {
911 /* new_PER = 7/8*old_PER + 1/8*(currentPER) 824 /* new_PER = 7/8*old_PER + 1/8*(currentPER)
912 * Assuming that n_frames is not 0. The current PER 825 * Assuming that n_frames is not 0. The current PER
913 * from the retries is 100 * retries / (retries+1), 826 * from the retries is 100 * retries / (retries+1),
@@ -920,14 +833,14 @@ static bool ath_rc_update_per(struct ath_softc *sc,
920 * the above PER. The expression below is a 833 * the above PER. The expression below is a
921 * simplified version of the sum of these two terms. 834 * simplified version of the sum of these two terms.
922 */ 835 */
923 if (tx_info_priv->n_frames > 0) { 836 if (tx_info->status.ampdu_len > 0) {
924 int n_frames, n_bad_frames; 837 int n_frames, n_bad_tries;
925 u8 cur_per, new_per; 838 u8 cur_per, new_per;
926 839
927 n_bad_frames = retries * tx_info_priv->n_frames + 840 n_bad_tries = retries * tx_info->status.ampdu_len +
928 tx_info_priv->n_bad_frames; 841 n_bad_frames;
929 n_frames = tx_info_priv->n_frames * (retries + 1); 842 n_frames = tx_info->status.ampdu_len * (retries + 1);
930 cur_per = (100 * n_bad_frames / n_frames) >> 3; 843 cur_per = (100 * n_bad_tries / n_frames) >> 3;
931 new_per = (u8)(last_per - (last_per >> 3) + cur_per); 844 new_per = (u8)(last_per - (last_per >> 3) + cur_per);
932 ath_rc_priv->per[tx_rate] = new_per; 845 ath_rc_priv->per[tx_rate] = new_per;
933 } 846 }
@@ -943,8 +856,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
943 * this was a probe. Otherwise, ignore the probe. 856 * this was a probe. Otherwise, ignore the probe.
944 */ 857 */
945 if (ath_rc_priv->probe_rate && ath_rc_priv->probe_rate == tx_rate) { 858 if (ath_rc_priv->probe_rate && ath_rc_priv->probe_rate == tx_rate) {
946 if (retries > 0 || 2 * tx_info_priv->n_bad_frames > 859 if (retries > 0 || 2 * n_bad_frames > tx_info->status.ampdu_len) {
947 tx_info_priv->n_frames) {
948 /* 860 /*
949 * Since we probed with just a single attempt, 861 * Since we probed with just a single attempt,
950 * any retries means the probe failed. Also, 862 * any retries means the probe failed. Also,
@@ -969,7 +881,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
969 * Since this probe succeeded, we allow the next 881 * Since this probe succeeded, we allow the next
970 * probe twice as soon. This allows the maxRate 882 * probe twice as soon. This allows the maxRate
971 * to move up faster if the probes are 883 * to move up faster if the probes are
972 * succesful. 884 * successful.
973 */ 885 */
974 ath_rc_priv->probe_time = 886 ath_rc_priv->probe_time =
975 now_msec - rate_table->probe_interval / 2; 887 now_msec - rate_table->probe_interval / 2;
@@ -1003,7 +915,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
1003 915
1004static void ath_rc_update_ht(struct ath_softc *sc, 916static void ath_rc_update_ht(struct ath_softc *sc,
1005 struct ath_rate_priv *ath_rc_priv, 917 struct ath_rate_priv *ath_rc_priv,
1006 struct ath_tx_info_priv *tx_info_priv, 918 struct ieee80211_tx_info *tx_info,
1007 int tx_rate, int xretries, int retries) 919 int tx_rate, int xretries, int retries)
1008{ 920{
1009 u32 now_msec = jiffies_to_msecs(jiffies); 921 u32 now_msec = jiffies_to_msecs(jiffies);
@@ -1020,7 +932,7 @@ static void ath_rc_update_ht(struct ath_softc *sc,
1020 932
1021 /* Update PER first */ 933 /* Update PER first */
1022 state_change = ath_rc_update_per(sc, rate_table, ath_rc_priv, 934 state_change = ath_rc_update_per(sc, rate_table, ath_rc_priv,
1023 tx_info_priv, tx_rate, xretries, 935 tx_info, tx_rate, xretries,
1024 retries, now_msec); 936 retries, now_msec);
1025 937
1026 /* 938 /*
@@ -1080,15 +992,19 @@ static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table,
1080{ 992{
1081 int rix; 993 int rix;
1082 994
995 if (!(rate->flags & IEEE80211_TX_RC_MCS))
996 return rate->idx;
997
998 rix = rate->idx + rate_table->mcs_start;
1083 if ((rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) && 999 if ((rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) &&
1084 (rate->flags & IEEE80211_TX_RC_SHORT_GI)) 1000 (rate->flags & IEEE80211_TX_RC_SHORT_GI))
1085 rix = rate_table->info[rate->idx].ht_index; 1001 rix = rate_table->info[rix].ht_index;
1086 else if (rate->flags & IEEE80211_TX_RC_SHORT_GI) 1002 else if (rate->flags & IEEE80211_TX_RC_SHORT_GI)
1087 rix = rate_table->info[rate->idx].sgi_index; 1003 rix = rate_table->info[rix].sgi_index;
1088 else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH) 1004 else if (rate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
1089 rix = rate_table->info[rate->idx].cw40index; 1005 rix = rate_table->info[rix].cw40index;
1090 else 1006 else
1091 rix = rate_table->info[rate->idx].base_index; 1007 rix = rate_table->info[rix].base_index;
1092 1008
1093 return rix; 1009 return rix;
1094} 1010}
@@ -1098,7 +1014,6 @@ static void ath_rc_tx_status(struct ath_softc *sc,
1098 struct ieee80211_tx_info *tx_info, 1014 struct ieee80211_tx_info *tx_info,
1099 int final_ts_idx, int xretries, int long_retry) 1015 int final_ts_idx, int xretries, int long_retry)
1100{ 1016{
1101 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info);
1102 const struct ath_rate_table *rate_table; 1017 const struct ath_rate_table *rate_table;
1103 struct ieee80211_tx_rate *rates = tx_info->status.rates; 1018 struct ieee80211_tx_rate *rates = tx_info->status.rates;
1104 u8 flags; 1019 u8 flags;
@@ -1124,9 +1039,8 @@ static void ath_rc_tx_status(struct ath_softc *sc,
1124 return; 1039 return;
1125 1040
1126 rix = ath_rc_get_rateindex(rate_table, &rates[i]); 1041 rix = ath_rc_get_rateindex(rate_table, &rates[i]);
1127 ath_rc_update_ht(sc, ath_rc_priv, 1042 ath_rc_update_ht(sc, ath_rc_priv, tx_info,
1128 tx_info_priv, rix, 1043 rix, xretries ? 1 : 2,
1129 xretries ? 1 : 2,
1130 rates[i].count); 1044 rates[i].count);
1131 } 1045 }
1132 } 1046 }
@@ -1149,8 +1063,7 @@ static void ath_rc_tx_status(struct ath_softc *sc,
1149 return; 1063 return;
1150 1064
1151 rix = ath_rc_get_rateindex(rate_table, &rates[i]); 1065 rix = ath_rc_get_rateindex(rate_table, &rates[i]);
1152 ath_rc_update_ht(sc, ath_rc_priv, tx_info_priv, rix, 1066 ath_rc_update_ht(sc, ath_rc_priv, tx_info, rix, xretries, long_retry);
1153 xretries, long_retry);
1154} 1067}
1155 1068
1156static const 1069static const
@@ -1160,6 +1073,7 @@ struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc,
1160 bool is_cw_40) 1073 bool is_cw_40)
1161{ 1074{
1162 int mode = 0; 1075 int mode = 0;
1076 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1163 1077
1164 switch(band) { 1078 switch(band) {
1165 case IEEE80211_BAND_2GHZ: 1079 case IEEE80211_BAND_2GHZ:
@@ -1177,14 +1091,17 @@ struct ath_rate_table *ath_choose_rate_table(struct ath_softc *sc,
1177 mode = ATH9K_MODE_11NA_HT40PLUS; 1091 mode = ATH9K_MODE_11NA_HT40PLUS;
1178 break; 1092 break;
1179 default: 1093 default:
1180 DPRINTF(sc, ATH_DBG_CONFIG, "Invalid band\n"); 1094 ath_print(common, ATH_DBG_CONFIG, "Invalid band\n");
1181 return NULL; 1095 return NULL;
1182 } 1096 }
1183 1097
1184 BUG_ON(mode >= ATH9K_MODE_MAX); 1098 BUG_ON(mode >= ATH9K_MODE_MAX);
1185 1099
1186 DPRINTF(sc, ATH_DBG_CONFIG, "Choosing rate table for mode: %d\n", mode); 1100 ath_print(common, ATH_DBG_CONFIG,
1187 return sc->hw_rate_table[mode]; 1101 "Choosing rate table for mode: %d\n", mode);
1102
1103 sc->cur_rate_mode = mode;
1104 return hw_rate_table[mode];
1188} 1105}
1189 1106
1190static void ath_rc_init(struct ath_softc *sc, 1107static void ath_rc_init(struct ath_softc *sc,
@@ -1194,14 +1111,10 @@ static void ath_rc_init(struct ath_softc *sc,
1194 const struct ath_rate_table *rate_table) 1111 const struct ath_rate_table *rate_table)
1195{ 1112{
1196 struct ath_rateset *rateset = &ath_rc_priv->neg_rates; 1113 struct ath_rateset *rateset = &ath_rc_priv->neg_rates;
1114 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1197 u8 *ht_mcs = (u8 *)&ath_rc_priv->neg_ht_rates; 1115 u8 *ht_mcs = (u8 *)&ath_rc_priv->neg_ht_rates;
1198 u8 i, j, k, hi = 0, hthi = 0; 1116 u8 i, j, k, hi = 0, hthi = 0;
1199 1117
1200 if (!rate_table) {
1201 DPRINTF(sc, ATH_DBG_FATAL, "Rate table not initialized\n");
1202 return;
1203 }
1204
1205 /* Initial rate table size. Will change depending 1118 /* Initial rate table size. Will change depending
1206 * on the working rate set */ 1119 * on the working rate set */
1207 ath_rc_priv->rate_table_size = RATE_TABLE_SIZE; 1120 ath_rc_priv->rate_table_size = RATE_TABLE_SIZE;
@@ -1239,7 +1152,7 @@ static void ath_rc_init(struct ath_softc *sc,
1239 1152
1240 ath_rc_priv->rate_table_size = hi + 1; 1153 ath_rc_priv->rate_table_size = hi + 1;
1241 ath_rc_priv->rate_max_phy = 0; 1154 ath_rc_priv->rate_max_phy = 0;
1242 ASSERT(ath_rc_priv->rate_table_size <= RATE_TABLE_SIZE); 1155 BUG_ON(ath_rc_priv->rate_table_size > RATE_TABLE_SIZE);
1243 1156
1244 for (i = 0, k = 0; i < WLAN_RC_PHY_MAX; i++) { 1157 for (i = 0, k = 0; i < WLAN_RC_PHY_MAX; i++) {
1245 for (j = 0; j < ath_rc_priv->valid_phy_ratecnt[i]; j++) { 1158 for (j = 0; j < ath_rc_priv->valid_phy_ratecnt[i]; j++) {
@@ -1253,16 +1166,17 @@ static void ath_rc_init(struct ath_softc *sc,
1253 1166
1254 ath_rc_priv->rate_max_phy = ath_rc_priv->valid_phy_rateidx[i][j-1]; 1167 ath_rc_priv->rate_max_phy = ath_rc_priv->valid_phy_rateidx[i][j-1];
1255 } 1168 }
1256 ASSERT(ath_rc_priv->rate_table_size <= RATE_TABLE_SIZE); 1169 BUG_ON(ath_rc_priv->rate_table_size > RATE_TABLE_SIZE);
1257 ASSERT(k <= RATE_TABLE_SIZE); 1170 BUG_ON(k > RATE_TABLE_SIZE);
1258 1171
1259 ath_rc_priv->max_valid_rate = k; 1172 ath_rc_priv->max_valid_rate = k;
1260 ath_rc_sort_validrates(rate_table, ath_rc_priv); 1173 ath_rc_sort_validrates(rate_table, ath_rc_priv);
1261 ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4]; 1174 ath_rc_priv->rate_max_phy = ath_rc_priv->valid_rate_index[k-4];
1262 sc->cur_rate_table = rate_table; 1175 sc->cur_rate_table = rate_table;
1263 1176
1264 DPRINTF(sc, ATH_DBG_CONFIG, "RC Initialized with capabilities: 0x%x\n", 1177 ath_print(common, ATH_DBG_CONFIG,
1265 ath_rc_priv->ht_cap); 1178 "RC Initialized with capabilities: 0x%x\n",
1179 ath_rc_priv->ht_cap);
1266} 1180}
1267 1181
1268static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta, 1182static u8 ath_rc_build_ht_caps(struct ath_softc *sc, struct ieee80211_sta *sta,
@@ -1296,44 +1210,52 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
1296{ 1210{
1297 struct ath_softc *sc = priv; 1211 struct ath_softc *sc = priv;
1298 struct ath_rate_priv *ath_rc_priv = priv_sta; 1212 struct ath_rate_priv *ath_rc_priv = priv_sta;
1299 struct ath_tx_info_priv *tx_info_priv = NULL;
1300 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1213 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1301 struct ieee80211_hdr *hdr; 1214 struct ieee80211_hdr *hdr;
1302 int final_ts_idx, tx_status = 0, is_underrun = 0; 1215 int final_ts_idx = 0, tx_status = 0, is_underrun = 0;
1216 int long_retry = 0;
1303 __le16 fc; 1217 __le16 fc;
1218 int i;
1304 1219
1305 hdr = (struct ieee80211_hdr *)skb->data; 1220 hdr = (struct ieee80211_hdr *)skb->data;
1306 fc = hdr->frame_control; 1221 fc = hdr->frame_control;
1307 tx_info_priv = ATH_TX_INFO_PRIV(tx_info); 1222 for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) {
1308 final_ts_idx = tx_info_priv->tx.ts_rateindex; 1223 struct ieee80211_tx_rate *rate = &tx_info->status.rates[i];
1224 if (!rate->count)
1225 break;
1226
1227 final_ts_idx = i;
1228 long_retry = rate->count - 1;
1229 }
1309 1230
1310 if (!priv_sta || !ieee80211_is_data(fc) || 1231 if (!priv_sta || !ieee80211_is_data(fc) ||
1311 !tx_info_priv->update_rc) 1232 !(tx_info->pad[0] & ATH_TX_INFO_UPDATE_RC))
1312 goto exit; 1233 return;
1313 1234
1314 if (tx_info_priv->tx.ts_status & ATH9K_TXERR_FILT) 1235 if (tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED)
1315 goto exit; 1236 return;
1316 1237
1317 /* 1238 /*
1318 * If underrun error is seen assume it as an excessive retry only 1239 * If an underrun error is seen assume it as an excessive retry only
1319 * if prefetch trigger level have reached the max (0x3f for 5416) 1240 * if max frame trigger level has been reached (2 KB for singel stream,
1320 * Adjust the long retry as if the frame was tried hw->max_rate_tries 1241 * and 4 KB for dual stream). Adjust the long retry as if the frame was
1321 * times. This affects how ratectrl updates PER for the failed rate. 1242 * tried hw->max_rate_tries times to affect how ratectrl updates PER for
1243 * the failed rate. In case of congestion on the bus penalizing these
1244 * type of underruns should help hardware actually transmit new frames
1245 * successfully by eventually preferring slower rates. This itself
1246 * should also alleviate congestion on the bus.
1322 */ 1247 */
1323 if (tx_info_priv->tx.ts_flags & 1248 if ((tx_info->pad[0] & ATH_TX_INFO_UNDERRUN) &&
1324 (ATH9K_TX_DATA_UNDERRUN | ATH9K_TX_DELIM_UNDERRUN) && 1249 (sc->sc_ah->tx_trig_level >= ath_rc_priv->tx_triglevel_max)) {
1325 ((sc->sc_ah->tx_trig_level) >= ath_rc_priv->tx_triglevel_max)) {
1326 tx_status = 1; 1250 tx_status = 1;
1327 is_underrun = 1; 1251 is_underrun = 1;
1328 } 1252 }
1329 1253
1330 if ((tx_info_priv->tx.ts_status & ATH9K_TXERR_XRETRY) || 1254 if (tx_info->pad[0] & ATH_TX_INFO_XRETRY)
1331 (tx_info_priv->tx.ts_status & ATH9K_TXERR_FIFO))
1332 tx_status = 1; 1255 tx_status = 1;
1333 1256
1334 ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status, 1257 ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status,
1335 (is_underrun) ? sc->hw->max_rate_tries : 1258 (is_underrun) ? sc->hw->max_rate_tries : long_retry);
1336 tx_info_priv->tx.ts_longretry);
1337 1259
1338 /* Check if aggregation has to be enabled for this tid */ 1260 /* Check if aggregation has to be enabled for this tid */
1339 if (conf_is_ht(&sc->hw->conf) && 1261 if (conf_is_ht(&sc->hw->conf) &&
@@ -1347,13 +1269,12 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
1347 an = (struct ath_node *)sta->drv_priv; 1269 an = (struct ath_node *)sta->drv_priv;
1348 1270
1349 if(ath_tx_aggr_check(sc, an, tid)) 1271 if(ath_tx_aggr_check(sc, an, tid))
1350 ieee80211_start_tx_ba_session(sc->hw, hdr->addr1, tid); 1272 ieee80211_start_tx_ba_session(sta, tid);
1351 } 1273 }
1352 } 1274 }
1353 1275
1354 ath_debug_stat_rc(sc, skb); 1276 ath_debug_stat_rc(sc, ath_rc_get_rateindex(sc->cur_rate_table,
1355exit: 1277 &tx_info->status.rates[final_ts_idx]));
1356 kfree(tx_info_priv);
1357} 1278}
1358 1279
1359static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband, 1280static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,
@@ -1361,7 +1282,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,
1361{ 1282{
1362 struct ath_softc *sc = priv; 1283 struct ath_softc *sc = priv;
1363 struct ath_rate_priv *ath_rc_priv = priv_sta; 1284 struct ath_rate_priv *ath_rc_priv = priv_sta;
1364 const struct ath_rate_table *rate_table = NULL; 1285 const struct ath_rate_table *rate_table;
1365 bool is_cw40, is_sgi40; 1286 bool is_cw40, is_sgi40;
1366 int i, j = 0; 1287 int i, j = 0;
1367 1288
@@ -1393,11 +1314,9 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,
1393 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT) || 1314 (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT) ||
1394 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)) { 1315 (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)) {
1395 rate_table = ath_choose_rate_table(sc, sband->band, 1316 rate_table = ath_choose_rate_table(sc, sband->band,
1396 sta->ht_cap.ht_supported, 1317 sta->ht_cap.ht_supported, is_cw40);
1397 is_cw40); 1318 } else {
1398 } else if (sc->sc_ah->opmode == NL80211_IFTYPE_AP) { 1319 rate_table = hw_rate_table[sc->cur_rate_mode];
1399 /* cur_rate_table would be set on init through config() */
1400 rate_table = sc->cur_rate_table;
1401 } 1320 }
1402 1321
1403 ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi40); 1322 ath_rc_priv->ht_cap = ath_rc_build_ht_caps(sc, sta, is_cw40, is_sgi40);
@@ -1406,7 +1325,7 @@ static void ath_rate_init(void *priv, struct ieee80211_supported_band *sband,
1406 1325
1407static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband, 1326static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1408 struct ieee80211_sta *sta, void *priv_sta, 1327 struct ieee80211_sta *sta, void *priv_sta,
1409 u32 changed) 1328 u32 changed, enum nl80211_channel_type oper_chan_type)
1410{ 1329{
1411 struct ath_softc *sc = priv; 1330 struct ath_softc *sc = priv;
1412 struct ath_rate_priv *ath_rc_priv = priv_sta; 1331 struct ath_rate_priv *ath_rc_priv = priv_sta;
@@ -1423,8 +1342,8 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1423 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION) 1342 if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
1424 return; 1343 return;
1425 1344
1426 if (sc->hw->conf.channel_type == NL80211_CHAN_HT40MINUS || 1345 if (oper_chan_type == NL80211_CHAN_HT40MINUS ||
1427 sc->hw->conf.channel_type == NL80211_CHAN_HT40PLUS) 1346 oper_chan_type == NL80211_CHAN_HT40PLUS)
1428 oper_cw40 = true; 1347 oper_cw40 = true;
1429 1348
1430 oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ? 1349 oper_sgi40 = (sta->ht_cap.cap & IEEE80211_HT_CAP_SGI_40) ?
@@ -1438,9 +1357,10 @@ static void ath_rate_update(void *priv, struct ieee80211_supported_band *sband,
1438 oper_cw40, oper_sgi40); 1357 oper_cw40, oper_sgi40);
1439 ath_rc_init(sc, priv_sta, sband, sta, rate_table); 1358 ath_rc_init(sc, priv_sta, sband, sta, rate_table);
1440 1359
1441 DPRINTF(sc, ATH_DBG_CONFIG, 1360 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1442 "Operating HT Bandwidth changed to: %d\n", 1361 "Operating HT Bandwidth changed to: %d\n",
1443 sc->hw->conf.channel_type); 1362 sc->hw->conf.channel_type);
1363 sc->cur_rate_table = hw_rate_table[sc->cur_rate_mode];
1444 } 1364 }
1445 } 1365 }
1446} 1366}
@@ -1463,8 +1383,8 @@ static void *ath_rate_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp
1463 1383
1464 rate_priv = kzalloc(sizeof(struct ath_rate_priv), gfp); 1384 rate_priv = kzalloc(sizeof(struct ath_rate_priv), gfp);
1465 if (!rate_priv) { 1385 if (!rate_priv) {
1466 DPRINTF(sc, ATH_DBG_FATAL, 1386 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1467 "Unable to allocate private rc structure\n"); 1387 "Unable to allocate private rc structure\n");
1468 return NULL; 1388 return NULL;
1469 } 1389 }
1470 1390
@@ -1493,26 +1413,6 @@ static struct rate_control_ops ath_rate_ops = {
1493 .free_sta = ath_rate_free_sta, 1413 .free_sta = ath_rate_free_sta,
1494}; 1414};
1495 1415
1496void ath_rate_attach(struct ath_softc *sc)
1497{
1498 sc->hw_rate_table[ATH9K_MODE_11A] =
1499 &ar5416_11a_ratetable;
1500 sc->hw_rate_table[ATH9K_MODE_11G] =
1501 &ar5416_11g_ratetable;
1502 sc->hw_rate_table[ATH9K_MODE_11NA_HT20] =
1503 &ar5416_11na_ratetable;
1504 sc->hw_rate_table[ATH9K_MODE_11NG_HT20] =
1505 &ar5416_11ng_ratetable;
1506 sc->hw_rate_table[ATH9K_MODE_11NA_HT40PLUS] =
1507 &ar5416_11na_ratetable;
1508 sc->hw_rate_table[ATH9K_MODE_11NA_HT40MINUS] =
1509 &ar5416_11na_ratetable;
1510 sc->hw_rate_table[ATH9K_MODE_11NG_HT40PLUS] =
1511 &ar5416_11ng_ratetable;
1512 sc->hw_rate_table[ATH9K_MODE_11NG_HT40MINUS] =
1513 &ar5416_11ng_ratetable;
1514}
1515
1516int ath_rate_control_register(void) 1416int ath_rate_control_register(void)
1517{ 1417{
1518 return ieee80211_rate_control_register(&ath_rate_ops); 1418 return ieee80211_rate_control_register(&ath_rate_ops);
diff --git a/drivers/net/wireless/ath/ath9k/rc.h b/drivers/net/wireless/ath/ath9k/rc.h
index fa21a628ddd0..4f6d6fd442f4 100644
--- a/drivers/net/wireless/ath/ath9k/rc.h
+++ b/drivers/net/wireless/ath/ath9k/rc.h
@@ -19,6 +19,8 @@
19#ifndef RC_H 19#ifndef RC_H
20#define RC_H 20#define RC_H
21 21
22#include "hw.h"
23
22struct ath_softc; 24struct ath_softc;
23 25
24#define ATH_RATE_MAX 30 26#define ATH_RATE_MAX 30
@@ -55,6 +57,10 @@ enum {
55 || (_phy == WLAN_RC_PHY_HT_40_DS) \ 57 || (_phy == WLAN_RC_PHY_HT_40_DS) \
56 || (_phy == WLAN_RC_PHY_HT_20_DS_HGI) \ 58 || (_phy == WLAN_RC_PHY_HT_20_DS_HGI) \
57 || (_phy == WLAN_RC_PHY_HT_40_DS_HGI)) 59 || (_phy == WLAN_RC_PHY_HT_40_DS_HGI))
60#define WLAN_RC_PHY_20(_phy) ((_phy == WLAN_RC_PHY_HT_20_SS) \
61 || (_phy == WLAN_RC_PHY_HT_20_DS) \
62 || (_phy == WLAN_RC_PHY_HT_20_SS_HGI) \
63 || (_phy == WLAN_RC_PHY_HT_20_DS_HGI))
58#define WLAN_RC_PHY_40(_phy) ((_phy == WLAN_RC_PHY_HT_40_SS) \ 64#define WLAN_RC_PHY_40(_phy) ((_phy == WLAN_RC_PHY_HT_40_SS) \
59 || (_phy == WLAN_RC_PHY_HT_40_DS) \ 65 || (_phy == WLAN_RC_PHY_HT_40_DS) \
60 || (_phy == WLAN_RC_PHY_HT_40_SS_HGI) \ 66 || (_phy == WLAN_RC_PHY_HT_40_SS_HGI) \
@@ -102,6 +108,7 @@ enum {
102 */ 108 */
103struct ath_rate_table { 109struct ath_rate_table {
104 int rate_cnt; 110 int rate_cnt;
111 int mcs_start;
105 struct { 112 struct {
106 int valid; 113 int valid;
107 int valid_single_stream; 114 int valid_single_stream;
@@ -109,14 +116,12 @@ struct ath_rate_table {
109 u32 ratekbps; 116 u32 ratekbps;
110 u32 user_ratekbps; 117 u32 user_ratekbps;
111 u8 ratecode; 118 u8 ratecode;
112 u8 short_preamble;
113 u8 dot11rate; 119 u8 dot11rate;
114 u8 ctrl_rate; 120 u8 ctrl_rate;
115 u8 base_index; 121 u8 base_index;
116 u8 cw40index; 122 u8 cw40index;
117 u8 sgi_index; 123 u8 sgi_index;
118 u8 ht_index; 124 u8 ht_index;
119 u32 max_4ms_framelen;
120 } info[RATE_TABLE_SIZE]; 125 } info[RATE_TABLE_SIZE];
121 u32 probe_interval; 126 u32 probe_interval;
122 u8 initial_ratemax; 127 u8 initial_ratemax;
@@ -165,26 +170,18 @@ struct ath_rate_priv {
165 struct ath_rate_softc *asc; 170 struct ath_rate_softc *asc;
166}; 171};
167 172
173#define ATH_TX_INFO_FRAME_TYPE_INTERNAL (1 << 0)
174#define ATH_TX_INFO_FRAME_TYPE_PAUSE (1 << 1)
175#define ATH_TX_INFO_UPDATE_RC (1 << 2)
176#define ATH_TX_INFO_XRETRY (1 << 3)
177#define ATH_TX_INFO_UNDERRUN (1 << 4)
178
168enum ath9k_internal_frame_type { 179enum ath9k_internal_frame_type {
169 ATH9K_NOT_INTERNAL, 180 ATH9K_NOT_INTERNAL,
170 ATH9K_INT_PAUSE, 181 ATH9K_INT_PAUSE,
171 ATH9K_INT_UNPAUSE 182 ATH9K_INT_UNPAUSE
172}; 183};
173 184
174struct ath_tx_info_priv {
175 struct ath_wiphy *aphy;
176 struct ath_tx_status tx;
177 int n_frames;
178 int n_bad_frames;
179 bool update_rc;
180 enum ath9k_internal_frame_type frame_type;
181};
182
183#define ATH_TX_INFO_PRIV(tx_info) \
184 ((struct ath_tx_info_priv *)((tx_info)->rate_driver_data[0]))
185
186void ath_rate_attach(struct ath_softc *sc);
187u8 ath_rate_findrateix(struct ath_softc *sc, u8 dot11_rate);
188int ath_rate_control_register(void); 185int ath_rate_control_register(void);
189void ath_rate_control_unregister(void); 186void ath_rate_control_unregister(void);
190 187
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index ec0abf823995..1ca42e5148c8 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -48,6 +48,7 @@ static struct ieee80211_hw * ath_get_virt_hw(struct ath_softc *sc,
48static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf) 48static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
49{ 49{
50 struct ath_hw *ah = sc->sc_ah; 50 struct ath_hw *ah = sc->sc_ah;
51 struct ath_common *common = ath9k_hw_common(ah);
51 struct ath_desc *ds; 52 struct ath_desc *ds;
52 struct sk_buff *skb; 53 struct sk_buff *skb;
53 54
@@ -59,14 +60,16 @@ static void ath_rx_buf_link(struct ath_softc *sc, struct ath_buf *bf)
59 60
60 /* virtual addr of the beginning of the buffer. */ 61 /* virtual addr of the beginning of the buffer. */
61 skb = bf->bf_mpdu; 62 skb = bf->bf_mpdu;
62 ASSERT(skb != NULL); 63 BUG_ON(skb == NULL);
63 ds->ds_vdata = skb->data; 64 ds->ds_vdata = skb->data;
64 65
65 /* setup rx descriptors. The rx.bufsize here tells the harware 66 /*
67 * setup rx descriptors. The rx_bufsize here tells the hardware
66 * how much data it can DMA to us and that we are prepared 68 * how much data it can DMA to us and that we are prepared
67 * to process */ 69 * to process
70 */
68 ath9k_hw_setuprxdesc(ah, ds, 71 ath9k_hw_setuprxdesc(ah, ds,
69 sc->rx.bufsize, 72 common->rx_bufsize,
70 0); 73 0);
71 74
72 if (sc->rx.rxlink == NULL) 75 if (sc->rx.rxlink == NULL)
@@ -86,192 +89,11 @@ static void ath_setdefantenna(struct ath_softc *sc, u32 antenna)
86 sc->rx.rxotherant = 0; 89 sc->rx.rxotherant = 0;
87} 90}
88 91
89/*
90 * Extend 15-bit time stamp from rx descriptor to
91 * a full 64-bit TSF using the current h/w TSF.
92*/
93static u64 ath_extend_tsf(struct ath_softc *sc, u32 rstamp)
94{
95 u64 tsf;
96
97 tsf = ath9k_hw_gettsf64(sc->sc_ah);
98 if ((tsf & 0x7fff) < rstamp)
99 tsf -= 0x8000;
100 return (tsf & ~0x7fff) | rstamp;
101}
102
103/*
104 * For Decrypt or Demic errors, we only mark packet status here and always push
105 * up the frame up to let mac80211 handle the actual error case, be it no
106 * decryption key or real decryption error. This let us keep statistics there.
107 */
108static int ath_rx_prepare(struct sk_buff *skb, struct ath_desc *ds,
109 struct ieee80211_rx_status *rx_status, bool *decrypt_error,
110 struct ath_softc *sc)
111{
112 struct ieee80211_hdr *hdr;
113 u8 ratecode;
114 __le16 fc;
115 struct ieee80211_hw *hw;
116 struct ieee80211_sta *sta;
117 struct ath_node *an;
118 int last_rssi = ATH_RSSI_DUMMY_MARKER;
119
120
121 hdr = (struct ieee80211_hdr *)skb->data;
122 fc = hdr->frame_control;
123 memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
124 hw = ath_get_virt_hw(sc, hdr);
125
126 if (ds->ds_rxstat.rs_more) {
127 /*
128 * Frame spans multiple descriptors; this cannot happen yet
129 * as we don't support jumbograms. If not in monitor mode,
130 * discard the frame. Enable this if you want to see
131 * error frames in Monitor mode.
132 */
133 if (sc->sc_ah->opmode != NL80211_IFTYPE_MONITOR)
134 goto rx_next;
135 } else if (ds->ds_rxstat.rs_status != 0) {
136 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_CRC)
137 rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
138 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_PHY)
139 goto rx_next;
140
141 if (ds->ds_rxstat.rs_status & ATH9K_RXERR_DECRYPT) {
142 *decrypt_error = true;
143 } else if (ds->ds_rxstat.rs_status & ATH9K_RXERR_MIC) {
144 if (ieee80211_is_ctl(fc))
145 /*
146 * Sometimes, we get invalid
147 * MIC failures on valid control frames.
148 * Remove these mic errors.
149 */
150 ds->ds_rxstat.rs_status &= ~ATH9K_RXERR_MIC;
151 else
152 rx_status->flag |= RX_FLAG_MMIC_ERROR;
153 }
154 /*
155 * Reject error frames with the exception of
156 * decryption and MIC failures. For monitor mode,
157 * we also ignore the CRC error.
158 */
159 if (sc->sc_ah->opmode == NL80211_IFTYPE_MONITOR) {
160 if (ds->ds_rxstat.rs_status &
161 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
162 ATH9K_RXERR_CRC))
163 goto rx_next;
164 } else {
165 if (ds->ds_rxstat.rs_status &
166 ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
167 goto rx_next;
168 }
169 }
170 }
171
172 ratecode = ds->ds_rxstat.rs_rate;
173
174 if (ratecode & 0x80) {
175 /* HT rate */
176 rx_status->flag |= RX_FLAG_HT;
177 if (ds->ds_rxstat.rs_flags & ATH9K_RX_2040)
178 rx_status->flag |= RX_FLAG_40MHZ;
179 if (ds->ds_rxstat.rs_flags & ATH9K_RX_GI)
180 rx_status->flag |= RX_FLAG_SHORT_GI;
181 rx_status->rate_idx = ratecode & 0x7f;
182 } else {
183 int i = 0, cur_band, n_rates;
184
185 cur_band = hw->conf.channel->band;
186 n_rates = sc->sbands[cur_band].n_bitrates;
187
188 for (i = 0; i < n_rates; i++) {
189 if (sc->sbands[cur_band].bitrates[i].hw_value ==
190 ratecode) {
191 rx_status->rate_idx = i;
192 break;
193 }
194
195 if (sc->sbands[cur_band].bitrates[i].hw_value_short ==
196 ratecode) {
197 rx_status->rate_idx = i;
198 rx_status->flag |= RX_FLAG_SHORTPRE;
199 break;
200 }
201 }
202 }
203
204 rcu_read_lock();
205 sta = ieee80211_find_sta(sc->hw, hdr->addr2);
206 if (sta) {
207 an = (struct ath_node *) sta->drv_priv;
208 if (ds->ds_rxstat.rs_rssi != ATH9K_RSSI_BAD &&
209 !ds->ds_rxstat.rs_moreaggr)
210 ATH_RSSI_LPF(an->last_rssi, ds->ds_rxstat.rs_rssi);
211 last_rssi = an->last_rssi;
212 }
213 rcu_read_unlock();
214
215 if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
216 ds->ds_rxstat.rs_rssi = ATH_EP_RND(last_rssi,
217 ATH_RSSI_EP_MULTIPLIER);
218 if (ds->ds_rxstat.rs_rssi < 0)
219 ds->ds_rxstat.rs_rssi = 0;
220 else if (ds->ds_rxstat.rs_rssi > 127)
221 ds->ds_rxstat.rs_rssi = 127;
222
223 /* Update Beacon RSSI, this is used by ANI. */
224 if (ieee80211_is_beacon(fc))
225 sc->sc_ah->stats.avgbrssi = ds->ds_rxstat.rs_rssi;
226
227 rx_status->mactime = ath_extend_tsf(sc, ds->ds_rxstat.rs_tstamp);
228 rx_status->band = hw->conf.channel->band;
229 rx_status->freq = hw->conf.channel->center_freq;
230 rx_status->noise = sc->ani.noise_floor;
231 rx_status->signal = ATH_DEFAULT_NOISE_FLOOR + ds->ds_rxstat.rs_rssi;
232 rx_status->antenna = ds->ds_rxstat.rs_antenna;
233
234 /*
235 * Theory for reporting quality:
236 *
237 * At a hardware RSSI of 45 you will be able to use MCS 7 reliably.
238 * At a hardware RSSI of 45 you will be able to use MCS 15 reliably.
239 * At a hardware RSSI of 35 you should be able use 54 Mbps reliably.
240 *
241 * MCS 7 is the highets MCS index usable by a 1-stream device.
242 * MCS 15 is the highest MCS index usable by a 2-stream device.
243 *
244 * All ath9k devices are either 1-stream or 2-stream.
245 *
246 * How many bars you see is derived from the qual reporting.
247 *
248 * A more elaborate scheme can be used here but it requires tables
249 * of SNR/throughput for each possible mode used. For the MCS table
250 * you can refer to the wireless wiki:
251 *
252 * http://wireless.kernel.org/en/developers/Documentation/ieee80211/802.11n
253 *
254 */
255 if (conf_is_ht(&hw->conf))
256 rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 45;
257 else
258 rx_status->qual = ds->ds_rxstat.rs_rssi * 100 / 35;
259
260 /* rssi can be more than 45 though, anything above that
261 * should be considered at 100% */
262 if (rx_status->qual > 100)
263 rx_status->qual = 100;
264
265 rx_status->flag |= RX_FLAG_TSFT;
266
267 return 1;
268rx_next:
269 return 0;
270}
271
272static void ath_opmode_init(struct ath_softc *sc) 92static void ath_opmode_init(struct ath_softc *sc)
273{ 93{
274 struct ath_hw *ah = sc->sc_ah; 94 struct ath_hw *ah = sc->sc_ah;
95 struct ath_common *common = ath9k_hw_common(ah);
96
275 u32 rfilt, mfilt[2]; 97 u32 rfilt, mfilt[2];
276 98
277 /* configure rx filter */ 99 /* configure rx filter */
@@ -280,13 +102,13 @@ static void ath_opmode_init(struct ath_softc *sc)
280 102
281 /* configure bssid mask */ 103 /* configure bssid mask */
282 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK) 104 if (ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
283 ath9k_hw_setbssidmask(sc); 105 ath_hw_setbssidmask(common);
284 106
285 /* configure operational mode */ 107 /* configure operational mode */
286 ath9k_hw_setopmode(ah); 108 ath9k_hw_setopmode(ah);
287 109
288 /* Handle any link-level address change. */ 110 /* Handle any link-level address change. */
289 ath9k_hw_setmac(ah, sc->sc_ah->macaddr); 111 ath9k_hw_setmac(ah, common->macaddr);
290 112
291 /* calculate and install multicast filter */ 113 /* calculate and install multicast filter */
292 mfilt[0] = mfilt[1] = ~0; 114 mfilt[0] = mfilt[1] = ~0;
@@ -295,6 +117,7 @@ static void ath_opmode_init(struct ath_softc *sc)
295 117
296int ath_rx_init(struct ath_softc *sc, int nbufs) 118int ath_rx_init(struct ath_softc *sc, int nbufs)
297{ 119{
120 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
298 struct sk_buff *skb; 121 struct sk_buff *skb;
299 struct ath_buf *bf; 122 struct ath_buf *bf;
300 int error = 0; 123 int error = 0;
@@ -303,24 +126,24 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
303 sc->sc_flags &= ~SC_OP_RXFLUSH; 126 sc->sc_flags &= ~SC_OP_RXFLUSH;
304 spin_lock_init(&sc->rx.rxbuflock); 127 spin_lock_init(&sc->rx.rxbuflock);
305 128
306 sc->rx.bufsize = roundup(IEEE80211_MAX_MPDU_LEN, 129 common->rx_bufsize = roundup(IEEE80211_MAX_MPDU_LEN,
307 min(sc->common.cachelsz, (u16)64)); 130 min(common->cachelsz, (u16)64));
308 131
309 DPRINTF(sc, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n", 132 ath_print(common, ATH_DBG_CONFIG, "cachelsz %u rxbufsize %u\n",
310 sc->common.cachelsz, sc->rx.bufsize); 133 common->cachelsz, common->rx_bufsize);
311 134
312 /* Initialize rx descriptors */ 135 /* Initialize rx descriptors */
313 136
314 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf, 137 error = ath_descdma_setup(sc, &sc->rx.rxdma, &sc->rx.rxbuf,
315 "rx", nbufs, 1); 138 "rx", nbufs, 1);
316 if (error != 0) { 139 if (error != 0) {
317 DPRINTF(sc, ATH_DBG_FATAL, 140 ath_print(common, ATH_DBG_FATAL,
318 "failed to allocate rx descriptors: %d\n", error); 141 "failed to allocate rx descriptors: %d\n", error);
319 goto err; 142 goto err;
320 } 143 }
321 144
322 list_for_each_entry(bf, &sc->rx.rxbuf, list) { 145 list_for_each_entry(bf, &sc->rx.rxbuf, list) {
323 skb = ath_rxbuf_alloc(&sc->common, sc->rx.bufsize, GFP_KERNEL); 146 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
324 if (skb == NULL) { 147 if (skb == NULL) {
325 error = -ENOMEM; 148 error = -ENOMEM;
326 goto err; 149 goto err;
@@ -328,14 +151,14 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
328 151
329 bf->bf_mpdu = skb; 152 bf->bf_mpdu = skb;
330 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data, 153 bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
331 sc->rx.bufsize, 154 common->rx_bufsize,
332 DMA_FROM_DEVICE); 155 DMA_FROM_DEVICE);
333 if (unlikely(dma_mapping_error(sc->dev, 156 if (unlikely(dma_mapping_error(sc->dev,
334 bf->bf_buf_addr))) { 157 bf->bf_buf_addr))) {
335 dev_kfree_skb_any(skb); 158 dev_kfree_skb_any(skb);
336 bf->bf_mpdu = NULL; 159 bf->bf_mpdu = NULL;
337 DPRINTF(sc, ATH_DBG_FATAL, 160 ath_print(common, ATH_DBG_FATAL,
338 "dma_mapping_error() on RX init\n"); 161 "dma_mapping_error() on RX init\n");
339 error = -ENOMEM; 162 error = -ENOMEM;
340 goto err; 163 goto err;
341 } 164 }
@@ -352,6 +175,8 @@ err:
352 175
353void ath_rx_cleanup(struct ath_softc *sc) 176void ath_rx_cleanup(struct ath_softc *sc)
354{ 177{
178 struct ath_hw *ah = sc->sc_ah;
179 struct ath_common *common = ath9k_hw_common(ah);
355 struct sk_buff *skb; 180 struct sk_buff *skb;
356 struct ath_buf *bf; 181 struct ath_buf *bf;
357 182
@@ -359,7 +184,7 @@ void ath_rx_cleanup(struct ath_softc *sc)
359 skb = bf->bf_mpdu; 184 skb = bf->bf_mpdu;
360 if (skb) { 185 if (skb) {
361 dma_unmap_single(sc->dev, bf->bf_buf_addr, 186 dma_unmap_single(sc->dev, bf->bf_buf_addr,
362 sc->rx.bufsize, DMA_FROM_DEVICE); 187 common->rx_bufsize, DMA_FROM_DEVICE);
363 dev_kfree_skb(skb); 188 dev_kfree_skb(skb);
364 } 189 }
365 } 190 }
@@ -420,7 +245,10 @@ u32 ath_calcrxfilter(struct ath_softc *sc)
420 else 245 else
421 rfilt |= ATH9K_RX_FILTER_BEACON; 246 rfilt |= ATH9K_RX_FILTER_BEACON;
422 247
423 if (sc->rx.rxfilter & FIF_PSPOLL) 248 if ((AR_SREV_9280_10_OR_LATER(sc->sc_ah) ||
249 AR_SREV_9285_10_OR_LATER(sc->sc_ah)) &&
250 (sc->sc_ah->opmode == NL80211_IFTYPE_AP) &&
251 (sc->rx.rxfilter & FIF_PSPOLL))
424 rfilt |= ATH9K_RX_FILTER_PSPOLL; 252 rfilt |= ATH9K_RX_FILTER_PSPOLL;
425 253
426 if (conf_is_ht(&sc->hw->conf)) 254 if (conf_is_ht(&sc->hw->conf))
@@ -527,20 +355,22 @@ static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
527static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb) 355static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
528{ 356{
529 struct ieee80211_mgmt *mgmt; 357 struct ieee80211_mgmt *mgmt;
358 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
530 359
531 if (skb->len < 24 + 8 + 2 + 2) 360 if (skb->len < 24 + 8 + 2 + 2)
532 return; 361 return;
533 362
534 mgmt = (struct ieee80211_mgmt *)skb->data; 363 mgmt = (struct ieee80211_mgmt *)skb->data;
535 if (memcmp(sc->curbssid, mgmt->bssid, ETH_ALEN) != 0) 364 if (memcmp(common->curbssid, mgmt->bssid, ETH_ALEN) != 0)
536 return; /* not from our current AP */ 365 return; /* not from our current AP */
537 366
538 sc->sc_flags &= ~SC_OP_WAIT_FOR_BEACON; 367 sc->ps_flags &= ~PS_WAIT_FOR_BEACON;
539 368
540 if (sc->sc_flags & SC_OP_BEACON_SYNC) { 369 if (sc->ps_flags & PS_BEACON_SYNC) {
541 sc->sc_flags &= ~SC_OP_BEACON_SYNC; 370 sc->ps_flags &= ~PS_BEACON_SYNC;
542 DPRINTF(sc, ATH_DBG_PS, "Reconfigure Beacon timers based on " 371 ath_print(common, ATH_DBG_PS,
543 "timestamp from the AP\n"); 372 "Reconfigure Beacon timers based on "
373 "timestamp from the AP\n");
544 ath_beacon_config(sc, NULL); 374 ath_beacon_config(sc, NULL);
545 } 375 }
546 376
@@ -552,34 +382,36 @@ static void ath_rx_ps_beacon(struct ath_softc *sc, struct sk_buff *skb)
552 * a backup trigger for returning into NETWORK SLEEP state, 382 * a backup trigger for returning into NETWORK SLEEP state,
553 * so we are waiting for it as well. 383 * so we are waiting for it as well.
554 */ 384 */
555 DPRINTF(sc, ATH_DBG_PS, "Received DTIM beacon indicating " 385 ath_print(common, ATH_DBG_PS, "Received DTIM beacon indicating "
556 "buffered broadcast/multicast frame(s)\n"); 386 "buffered broadcast/multicast frame(s)\n");
557 sc->sc_flags |= SC_OP_WAIT_FOR_CAB | SC_OP_WAIT_FOR_BEACON; 387 sc->ps_flags |= PS_WAIT_FOR_CAB | PS_WAIT_FOR_BEACON;
558 return; 388 return;
559 } 389 }
560 390
561 if (sc->sc_flags & SC_OP_WAIT_FOR_CAB) { 391 if (sc->ps_flags & PS_WAIT_FOR_CAB) {
562 /* 392 /*
563 * This can happen if a broadcast frame is dropped or the AP 393 * This can happen if a broadcast frame is dropped or the AP
564 * fails to send a frame indicating that all CAB frames have 394 * fails to send a frame indicating that all CAB frames have
565 * been delivered. 395 * been delivered.
566 */ 396 */
567 sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB; 397 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
568 DPRINTF(sc, ATH_DBG_PS, "PS wait for CAB frames timed out\n"); 398 ath_print(common, ATH_DBG_PS,
399 "PS wait for CAB frames timed out\n");
569 } 400 }
570} 401}
571 402
572static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb) 403static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
573{ 404{
574 struct ieee80211_hdr *hdr; 405 struct ieee80211_hdr *hdr;
406 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
575 407
576 hdr = (struct ieee80211_hdr *)skb->data; 408 hdr = (struct ieee80211_hdr *)skb->data;
577 409
578 /* Process Beacon and CAB receive in PS state */ 410 /* Process Beacon and CAB receive in PS state */
579 if ((sc->sc_flags & SC_OP_WAIT_FOR_BEACON) && 411 if ((sc->ps_flags & PS_WAIT_FOR_BEACON) &&
580 ieee80211_is_beacon(hdr->frame_control)) 412 ieee80211_is_beacon(hdr->frame_control))
581 ath_rx_ps_beacon(sc, skb); 413 ath_rx_ps_beacon(sc, skb);
582 else if ((sc->sc_flags & SC_OP_WAIT_FOR_CAB) && 414 else if ((sc->ps_flags & PS_WAIT_FOR_CAB) &&
583 (ieee80211_is_data(hdr->frame_control) || 415 (ieee80211_is_data(hdr->frame_control) ||
584 ieee80211_is_action(hdr->frame_control)) && 416 ieee80211_is_action(hdr->frame_control)) &&
585 is_multicast_ether_addr(hdr->addr1) && 417 is_multicast_ether_addr(hdr->addr1) &&
@@ -588,24 +420,26 @@ static void ath_rx_ps(struct ath_softc *sc, struct sk_buff *skb)
588 * No more broadcast/multicast frames to be received at this 420 * No more broadcast/multicast frames to be received at this
589 * point. 421 * point.
590 */ 422 */
591 sc->sc_flags &= ~SC_OP_WAIT_FOR_CAB; 423 sc->ps_flags &= ~PS_WAIT_FOR_CAB;
592 DPRINTF(sc, ATH_DBG_PS, "All PS CAB frames received, back to " 424 ath_print(common, ATH_DBG_PS,
593 "sleep\n"); 425 "All PS CAB frames received, back to sleep\n");
594 } else if ((sc->sc_flags & SC_OP_WAIT_FOR_PSPOLL_DATA) && 426 } else if ((sc->ps_flags & PS_WAIT_FOR_PSPOLL_DATA) &&
595 !is_multicast_ether_addr(hdr->addr1) && 427 !is_multicast_ether_addr(hdr->addr1) &&
596 !ieee80211_has_morefrags(hdr->frame_control)) { 428 !ieee80211_has_morefrags(hdr->frame_control)) {
597 sc->sc_flags &= ~SC_OP_WAIT_FOR_PSPOLL_DATA; 429 sc->ps_flags &= ~PS_WAIT_FOR_PSPOLL_DATA;
598 DPRINTF(sc, ATH_DBG_PS, "Going back to sleep after having " 430 ath_print(common, ATH_DBG_PS,
599 "received PS-Poll data (0x%x)\n", 431 "Going back to sleep after having received "
600 sc->sc_flags & (SC_OP_WAIT_FOR_BEACON | 432 "PS-Poll data (0x%lx)\n",
601 SC_OP_WAIT_FOR_CAB | 433 sc->ps_flags & (PS_WAIT_FOR_BEACON |
602 SC_OP_WAIT_FOR_PSPOLL_DATA | 434 PS_WAIT_FOR_CAB |
603 SC_OP_WAIT_FOR_TX_ACK)); 435 PS_WAIT_FOR_PSPOLL_DATA |
436 PS_WAIT_FOR_TX_ACK));
604 } 437 }
605} 438}
606 439
607static void ath_rx_send_to_mac80211(struct ath_softc *sc, struct sk_buff *skb, 440static void ath_rx_send_to_mac80211(struct ieee80211_hw *hw,
608 struct ieee80211_rx_status *rx_status) 441 struct ath_softc *sc, struct sk_buff *skb,
442 struct ieee80211_rx_status *rxs)
609{ 443{
610 struct ieee80211_hdr *hdr; 444 struct ieee80211_hdr *hdr;
611 445
@@ -625,19 +459,14 @@ static void ath_rx_send_to_mac80211(struct ath_softc *sc, struct sk_buff *skb,
625 if (aphy == NULL) 459 if (aphy == NULL)
626 continue; 460 continue;
627 nskb = skb_copy(skb, GFP_ATOMIC); 461 nskb = skb_copy(skb, GFP_ATOMIC);
628 if (nskb) { 462 if (!nskb)
629 memcpy(IEEE80211_SKB_RXCB(nskb), rx_status, 463 continue;
630 sizeof(*rx_status)); 464 ieee80211_rx(aphy->hw, nskb);
631 ieee80211_rx(aphy->hw, nskb);
632 }
633 } 465 }
634 memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status));
635 ieee80211_rx(sc->hw, skb); 466 ieee80211_rx(sc->hw, skb);
636 } else { 467 } else
637 /* Deliver unicast frames based on receiver address */ 468 /* Deliver unicast frames based on receiver address */
638 memcpy(IEEE80211_SKB_RXCB(skb), rx_status, sizeof(*rx_status)); 469 ieee80211_rx(hw, skb);
639 ieee80211_rx(ath_get_virt_hw(sc, hdr), skb);
640 }
641} 470}
642 471
643int ath_rx_tasklet(struct ath_softc *sc, int flush) 472int ath_rx_tasklet(struct ath_softc *sc, int flush)
@@ -648,14 +477,20 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
648 477
649 struct ath_buf *bf; 478 struct ath_buf *bf;
650 struct ath_desc *ds; 479 struct ath_desc *ds;
480 struct ath_rx_status *rx_stats;
651 struct sk_buff *skb = NULL, *requeue_skb; 481 struct sk_buff *skb = NULL, *requeue_skb;
652 struct ieee80211_rx_status rx_status; 482 struct ieee80211_rx_status *rxs;
653 struct ath_hw *ah = sc->sc_ah; 483 struct ath_hw *ah = sc->sc_ah;
484 struct ath_common *common = ath9k_hw_common(ah);
485 /*
486 * The hw can techncically differ from common->hw when using ath9k
487 * virtual wiphy so to account for that we iterate over the active
488 * wiphys and find the appropriate wiphy and therefore hw.
489 */
490 struct ieee80211_hw *hw = NULL;
654 struct ieee80211_hdr *hdr; 491 struct ieee80211_hdr *hdr;
655 int hdrlen, padsize, retval; 492 int retval;
656 bool decrypt_error = false; 493 bool decrypt_error = false;
657 u8 keyix;
658 __le16 fc;
659 494
660 spin_lock_bh(&sc->rx.rxbuflock); 495 spin_lock_bh(&sc->rx.rxbuflock);
661 496
@@ -727,9 +562,17 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
727 * 2. requeueing the same buffer to h/w 562 * 2. requeueing the same buffer to h/w
728 */ 563 */
729 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr, 564 dma_sync_single_for_cpu(sc->dev, bf->bf_buf_addr,
730 sc->rx.bufsize, 565 common->rx_bufsize,
731 DMA_FROM_DEVICE); 566 DMA_FROM_DEVICE);
732 567
568 hdr = (struct ieee80211_hdr *) skb->data;
569 rxs = IEEE80211_SKB_RXCB(skb);
570
571 hw = ath_get_virt_hw(sc, hdr);
572 rx_stats = &ds->ds_rxstat;
573
574 ath_debug_stat_rx(sc, bf);
575
733 /* 576 /*
734 * If we're asked to flush receive queue, directly 577 * If we're asked to flush receive queue, directly
735 * chain it back at the queue without processing it. 578 * chain it back at the queue without processing it.
@@ -737,19 +580,14 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
737 if (flush) 580 if (flush)
738 goto requeue; 581 goto requeue;
739 582
740 if (!ds->ds_rxstat.rs_datalen) 583 retval = ath9k_cmn_rx_skb_preprocess(common, hw, skb, rx_stats,
741 goto requeue; 584 rxs, &decrypt_error);
742 585 if (retval)
743 /* The status portion of the descriptor could get corrupted. */
744 if (sc->rx.bufsize < ds->ds_rxstat.rs_datalen)
745 goto requeue;
746
747 if (!ath_rx_prepare(skb, ds, &rx_status, &decrypt_error, sc))
748 goto requeue; 586 goto requeue;
749 587
750 /* Ensure we always have an skb to requeue once we are done 588 /* Ensure we always have an skb to requeue once we are done
751 * processing the current buffer's skb */ 589 * processing the current buffer's skb */
752 requeue_skb = ath_rxbuf_alloc(&sc->common, sc->rx.bufsize, GFP_ATOMIC); 590 requeue_skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_ATOMIC);
753 591
754 /* If there is no memory we ignore the current RX'd frame, 592 /* If there is no memory we ignore the current RX'd frame,
755 * tell hardware it can give us a new frame using the old 593 * tell hardware it can give us a new frame using the old
@@ -760,60 +598,26 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
760 598
761 /* Unmap the frame */ 599 /* Unmap the frame */
762 dma_unmap_single(sc->dev, bf->bf_buf_addr, 600 dma_unmap_single(sc->dev, bf->bf_buf_addr,
763 sc->rx.bufsize, 601 common->rx_bufsize,
764 DMA_FROM_DEVICE); 602 DMA_FROM_DEVICE);
765 603
766 skb_put(skb, ds->ds_rxstat.rs_datalen); 604 skb_put(skb, rx_stats->rs_datalen);
767
768 /* see if any padding is done by the hw and remove it */
769 hdr = (struct ieee80211_hdr *)skb->data;
770 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
771 fc = hdr->frame_control;
772
773 /* The MAC header is padded to have 32-bit boundary if the
774 * packet payload is non-zero. The general calculation for
775 * padsize would take into account odd header lengths:
776 * padsize = (4 - hdrlen % 4) % 4; However, since only
777 * even-length headers are used, padding can only be 0 or 2
778 * bytes and we can optimize this a bit. In addition, we must
779 * not try to remove padding from short control frames that do
780 * not have payload. */
781 padsize = hdrlen & 3;
782 if (padsize && hdrlen >= 24) {
783 memmove(skb->data + padsize, skb->data, hdrlen);
784 skb_pull(skb, padsize);
785 }
786
787 keyix = ds->ds_rxstat.rs_keyix;
788 605
789 if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error) { 606 ath9k_cmn_rx_skb_postprocess(common, skb, rx_stats,
790 rx_status.flag |= RX_FLAG_DECRYPTED; 607 rxs, decrypt_error);
791 } else if (ieee80211_has_protected(fc)
792 && !decrypt_error && skb->len >= hdrlen + 4) {
793 keyix = skb->data[hdrlen + 3] >> 6;
794
795 if (test_bit(keyix, sc->keymap))
796 rx_status.flag |= RX_FLAG_DECRYPTED;
797 }
798 if (ah->sw_mgmt_crypto &&
799 (rx_status.flag & RX_FLAG_DECRYPTED) &&
800 ieee80211_is_mgmt(fc)) {
801 /* Use software decrypt for management frames. */
802 rx_status.flag &= ~RX_FLAG_DECRYPTED;
803 }
804 608
805 /* We will now give hardware our shiny new allocated skb */ 609 /* We will now give hardware our shiny new allocated skb */
806 bf->bf_mpdu = requeue_skb; 610 bf->bf_mpdu = requeue_skb;
807 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data, 611 bf->bf_buf_addr = dma_map_single(sc->dev, requeue_skb->data,
808 sc->rx.bufsize, 612 common->rx_bufsize,
809 DMA_FROM_DEVICE); 613 DMA_FROM_DEVICE);
810 if (unlikely(dma_mapping_error(sc->dev, 614 if (unlikely(dma_mapping_error(sc->dev,
811 bf->bf_buf_addr))) { 615 bf->bf_buf_addr))) {
812 dev_kfree_skb_any(requeue_skb); 616 dev_kfree_skb_any(requeue_skb);
813 bf->bf_mpdu = NULL; 617 bf->bf_mpdu = NULL;
814 DPRINTF(sc, ATH_DBG_FATAL, 618 ath_print(common, ATH_DBG_FATAL,
815 "dma_mapping_error() on RX\n"); 619 "dma_mapping_error() on RX\n");
816 ath_rx_send_to_mac80211(sc, skb, &rx_status); 620 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
817 break; 621 break;
818 } 622 }
819 bf->bf_dmacontext = bf->bf_buf_addr; 623 bf->bf_dmacontext = bf->bf_buf_addr;
@@ -824,17 +628,17 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush)
824 */ 628 */
825 if (sc->rx.defant != ds->ds_rxstat.rs_antenna) { 629 if (sc->rx.defant != ds->ds_rxstat.rs_antenna) {
826 if (++sc->rx.rxotherant >= 3) 630 if (++sc->rx.rxotherant >= 3)
827 ath_setdefantenna(sc, ds->ds_rxstat.rs_antenna); 631 ath_setdefantenna(sc, rx_stats->rs_antenna);
828 } else { 632 } else {
829 sc->rx.rxotherant = 0; 633 sc->rx.rxotherant = 0;
830 } 634 }
831 635
832 if (unlikely(sc->sc_flags & (SC_OP_WAIT_FOR_BEACON | 636 if (unlikely(sc->ps_flags & (PS_WAIT_FOR_BEACON |
833 SC_OP_WAIT_FOR_CAB | 637 PS_WAIT_FOR_CAB |
834 SC_OP_WAIT_FOR_PSPOLL_DATA))) 638 PS_WAIT_FOR_PSPOLL_DATA)))
835 ath_rx_ps(sc, skb); 639 ath_rx_ps(sc, skb);
836 640
837 ath_rx_send_to_mac80211(sc, skb, &rx_status); 641 ath_rx_send_to_mac80211(hw, sc, skb, rxs);
838 642
839requeue: 643requeue:
840 list_move_tail(&bf->list, &sc->rx.rxbuf); 644 list_move_tail(&bf->list, &sc->rx.rxbuf);
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index d83b77f821e9..72cfa8ebd9ae 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -17,6 +17,8 @@
17#ifndef REG_H 17#ifndef REG_H
18#define REG_H 18#define REG_H
19 19
20#include "../reg.h"
21
20#define AR_CR 0x0008 22#define AR_CR 0x0008
21#define AR_CR_RXE 0x00000004 23#define AR_CR_RXE 0x00000004
22#define AR_CR_RXD 0x00000020 24#define AR_CR_RXD 0x00000020
@@ -969,10 +971,10 @@ enum {
969#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_S 4 971#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_S 4
970#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF 0x00000080 972#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF 0x00000080
971#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S 7 973#define AR_GPIO_INPUT_EN_VAL_RFSILENT_DEF_S 7
974#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB 0x00000400
975#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S 10
972#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB 0x00001000 976#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB 0x00001000
973#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB_S 12 977#define AR_GPIO_INPUT_EN_VAL_BT_ACTIVE_BB_S 12
974#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB 0x00001000
975#define AR_GPIO_INPUT_EN_VAL_BT_PRIORITY_BB_S 1
976#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB 0x00008000 978#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB 0x00008000
977#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S 15 979#define AR_GPIO_INPUT_EN_VAL_RFSILENT_BB_S 15
978#define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE 0x00010000 980#define AR_GPIO_RTC_RESET_OVERRIDE_ENABLE 0x00010000
@@ -1330,13 +1332,22 @@ enum {
1330#define AR_MCAST_FIL0 0x8040 1332#define AR_MCAST_FIL0 0x8040
1331#define AR_MCAST_FIL1 0x8044 1333#define AR_MCAST_FIL1 0x8044
1332 1334
1335/*
1336 * AR_DIAG_SW - Register which can be used for diagnostics and testing purposes.
1337 *
1338 * The force RX abort (AR_DIAG_RX_ABORT, bit 25) can be used in conjunction with
1339 * RX block (AR_DIAG_RX_DIS, bit 5) to help fast channel change to shut down
1340 * receive. The force RX abort bit will kill any frame which is currently being
1341 * transferred between the MAC and baseband. The RX block bit (AR_DIAG_RX_DIS)
1342 * will prevent any new frames from getting started.
1343 */
1333#define AR_DIAG_SW 0x8048 1344#define AR_DIAG_SW 0x8048
1334#define AR_DIAG_CACHE_ACK 0x00000001 1345#define AR_DIAG_CACHE_ACK 0x00000001
1335#define AR_DIAG_ACK_DIS 0x00000002 1346#define AR_DIAG_ACK_DIS 0x00000002
1336#define AR_DIAG_CTS_DIS 0x00000004 1347#define AR_DIAG_CTS_DIS 0x00000004
1337#define AR_DIAG_ENCRYPT_DIS 0x00000008 1348#define AR_DIAG_ENCRYPT_DIS 0x00000008
1338#define AR_DIAG_DECRYPT_DIS 0x00000010 1349#define AR_DIAG_DECRYPT_DIS 0x00000010
1339#define AR_DIAG_RX_DIS 0x00000020 1350#define AR_DIAG_RX_DIS 0x00000020 /* RX block */
1340#define AR_DIAG_LOOP_BACK 0x00000040 1351#define AR_DIAG_LOOP_BACK 0x00000040
1341#define AR_DIAG_CORR_FCS 0x00000080 1352#define AR_DIAG_CORR_FCS 0x00000080
1342#define AR_DIAG_CHAN_INFO 0x00000100 1353#define AR_DIAG_CHAN_INFO 0x00000100
@@ -1345,12 +1356,12 @@ enum {
1345#define AR_DIAG_FRAME_NV0 0x00020000 1356#define AR_DIAG_FRAME_NV0 0x00020000
1346#define AR_DIAG_OBS_PT_SEL1 0x000C0000 1357#define AR_DIAG_OBS_PT_SEL1 0x000C0000
1347#define AR_DIAG_OBS_PT_SEL1_S 18 1358#define AR_DIAG_OBS_PT_SEL1_S 18
1348#define AR_DIAG_FORCE_RX_CLEAR 0x00100000 1359#define AR_DIAG_FORCE_RX_CLEAR 0x00100000 /* force rx_clear high */
1349#define AR_DIAG_IGNORE_VIRT_CS 0x00200000 1360#define AR_DIAG_IGNORE_VIRT_CS 0x00200000
1350#define AR_DIAG_FORCE_CH_IDLE_HIGH 0x00400000 1361#define AR_DIAG_FORCE_CH_IDLE_HIGH 0x00400000
1351#define AR_DIAG_EIFS_CTRL_ENA 0x00800000 1362#define AR_DIAG_EIFS_CTRL_ENA 0x00800000
1352#define AR_DIAG_DUAL_CHAIN_INFO 0x01000000 1363#define AR_DIAG_DUAL_CHAIN_INFO 0x01000000
1353#define AR_DIAG_RX_ABORT 0x02000000 1364#define AR_DIAG_RX_ABORT 0x02000000 /* Force RX abort */
1354#define AR_DIAG_SATURATE_CYCLE_CNT 0x04000000 1365#define AR_DIAG_SATURATE_CYCLE_CNT 0x04000000
1355#define AR_DIAG_OBS_PT_SEL2 0x08000000 1366#define AR_DIAG_OBS_PT_SEL2 0x08000000
1356#define AR_DIAG_RX_CLEAR_CTL_LOW 0x10000000 1367#define AR_DIAG_RX_CLEAR_CTL_LOW 0x10000000
@@ -1421,9 +1432,6 @@ enum {
1421#define AR_SLEEP2_BEACON_TIMEOUT 0xFFE00000 1432#define AR_SLEEP2_BEACON_TIMEOUT 0xFFE00000
1422#define AR_SLEEP2_BEACON_TIMEOUT_S 21 1433#define AR_SLEEP2_BEACON_TIMEOUT_S 21
1423 1434
1424#define AR_BSSMSKL 0x80e0
1425#define AR_BSSMSKU 0x80e4
1426
1427#define AR_TPC 0x80e8 1435#define AR_TPC 0x80e8
1428#define AR_TPC_ACK 0x0000003f 1436#define AR_TPC_ACK 0x0000003f
1429#define AR_TPC_ACK_S 0x00 1437#define AR_TPC_ACK_S 0x00
@@ -1539,9 +1547,9 @@ enum {
1539 1547
1540#define AR_BT_COEX_WEIGHT 0x8174 1548#define AR_BT_COEX_WEIGHT 0x8174
1541#define AR_BT_COEX_WGHT 0xff55 1549#define AR_BT_COEX_WGHT 0xff55
1542#define AR_STOMP_ALL_WLAN_WGHT 0xffcc 1550#define AR_STOMP_ALL_WLAN_WGHT 0xfcfc
1543#define AR_STOMP_LOW_WLAN_WGHT 0xaaa8 1551#define AR_STOMP_LOW_WLAN_WGHT 0xa8a8
1544#define AR_STOMP_NONE_WLAN_WGHT 0xaa00 1552#define AR_STOMP_NONE_WLAN_WGHT 0x0000
1545#define AR_BTCOEX_BT_WGHT 0x0000ffff 1553#define AR_BTCOEX_BT_WGHT 0x0000ffff
1546#define AR_BTCOEX_BT_WGHT_S 0 1554#define AR_BTCOEX_BT_WGHT_S 0
1547#define AR_BTCOEX_WL_WGHT 0xffff0000 1555#define AR_BTCOEX_WL_WGHT 0xffff0000
@@ -1705,4 +1713,7 @@ enum {
1705#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24) 1713#define AR_KEYTABLE_MAC0(_n) (AR_KEYTABLE(_n) + 24)
1706#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28) 1714#define AR_KEYTABLE_MAC1(_n) (AR_KEYTABLE(_n) + 28)
1707 1715
1716#define AR9271_CORE_CLOCK 117 /* clock to 117Mhz */
1717#define AR9271_TARGET_BAUD_RATE 19200 /* 115200 */
1718
1708#endif 1719#endif
diff --git a/drivers/net/wireless/ath/ath9k/virtual.c b/drivers/net/wireless/ath/ath9k/virtual.c
index 19b88f8177fd..00c0e21a4af7 100644
--- a/drivers/net/wireless/ath/ath9k/virtual.c
+++ b/drivers/net/wireless/ath/ath9k/virtual.c
@@ -14,6 +14,8 @@
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */ 15 */
16 16
17#include <linux/slab.h>
18
17#include "ath9k.h" 19#include "ath9k.h"
18 20
19struct ath9k_vif_iter_data { 21struct ath9k_vif_iter_data {
@@ -40,6 +42,7 @@ void ath9k_set_bssid_mask(struct ieee80211_hw *hw)
40{ 42{
41 struct ath_wiphy *aphy = hw->priv; 43 struct ath_wiphy *aphy = hw->priv;
42 struct ath_softc *sc = aphy->sc; 44 struct ath_softc *sc = aphy->sc;
45 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
43 struct ath9k_vif_iter_data iter_data; 46 struct ath9k_vif_iter_data iter_data;
44 int i, j; 47 int i, j;
45 u8 mask[ETH_ALEN]; 48 u8 mask[ETH_ALEN];
@@ -51,7 +54,7 @@ void ath9k_set_bssid_mask(struct ieee80211_hw *hw)
51 */ 54 */
52 iter_data.addr = kmalloc(ETH_ALEN, GFP_ATOMIC); 55 iter_data.addr = kmalloc(ETH_ALEN, GFP_ATOMIC);
53 if (iter_data.addr) { 56 if (iter_data.addr) {
54 memcpy(iter_data.addr, sc->sc_ah->macaddr, ETH_ALEN); 57 memcpy(iter_data.addr, common->macaddr, ETH_ALEN);
55 iter_data.count = 1; 58 iter_data.count = 1;
56 } else 59 } else
57 iter_data.count = 0; 60 iter_data.count = 0;
@@ -86,20 +89,21 @@ void ath9k_set_bssid_mask(struct ieee80211_hw *hw)
86 kfree(iter_data.addr); 89 kfree(iter_data.addr);
87 90
88 /* Invert the mask and configure hardware */ 91 /* Invert the mask and configure hardware */
89 sc->bssidmask[0] = ~mask[0]; 92 common->bssidmask[0] = ~mask[0];
90 sc->bssidmask[1] = ~mask[1]; 93 common->bssidmask[1] = ~mask[1];
91 sc->bssidmask[2] = ~mask[2]; 94 common->bssidmask[2] = ~mask[2];
92 sc->bssidmask[3] = ~mask[3]; 95 common->bssidmask[3] = ~mask[3];
93 sc->bssidmask[4] = ~mask[4]; 96 common->bssidmask[4] = ~mask[4];
94 sc->bssidmask[5] = ~mask[5]; 97 common->bssidmask[5] = ~mask[5];
95 98
96 ath9k_hw_setbssidmask(sc); 99 ath_hw_setbssidmask(common);
97} 100}
98 101
99int ath9k_wiphy_add(struct ath_softc *sc) 102int ath9k_wiphy_add(struct ath_softc *sc)
100{ 103{
101 int i, error; 104 int i, error;
102 struct ath_wiphy *aphy; 105 struct ath_wiphy *aphy;
106 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
103 struct ieee80211_hw *hw; 107 struct ieee80211_hw *hw;
104 u8 addr[ETH_ALEN]; 108 u8 addr[ETH_ALEN];
105 109
@@ -138,7 +142,7 @@ int ath9k_wiphy_add(struct ath_softc *sc)
138 sc->sec_wiphy[i] = aphy; 142 sc->sec_wiphy[i] = aphy;
139 spin_unlock_bh(&sc->wiphy_lock); 143 spin_unlock_bh(&sc->wiphy_lock);
140 144
141 memcpy(addr, sc->sc_ah->macaddr, ETH_ALEN); 145 memcpy(addr, common->macaddr, ETH_ALEN);
142 addr[0] |= 0x02; /* Locally managed address */ 146 addr[0] |= 0x02; /* Locally managed address */
143 /* 147 /*
144 * XOR virtual wiphy index into the least significant bits to generate 148 * XOR virtual wiphy index into the least significant bits to generate
@@ -150,7 +154,7 @@ int ath9k_wiphy_add(struct ath_softc *sc)
150 154
151 SET_IEEE80211_PERM_ADDR(hw, addr); 155 SET_IEEE80211_PERM_ADDR(hw, addr);
152 156
153 ath_set_hw_capab(sc, hw); 157 ath9k_set_hw_capab(sc, hw);
154 158
155 error = ieee80211_register_hw(hw); 159 error = ieee80211_register_hw(hw);
156 160
@@ -296,6 +300,7 @@ static void ath9k_wiphy_unpause_channel(struct ath_softc *sc)
296void ath9k_wiphy_chan_work(struct work_struct *work) 300void ath9k_wiphy_chan_work(struct work_struct *work)
297{ 301{
298 struct ath_softc *sc = container_of(work, struct ath_softc, chan_work); 302 struct ath_softc *sc = container_of(work, struct ath_softc, chan_work);
303 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
299 struct ath_wiphy *aphy = sc->next_wiphy; 304 struct ath_wiphy *aphy = sc->next_wiphy;
300 305
301 if (aphy == NULL) 306 if (aphy == NULL)
@@ -311,6 +316,10 @@ void ath9k_wiphy_chan_work(struct work_struct *work)
311 /* XXX: remove me eventually */ 316 /* XXX: remove me eventually */
312 ath9k_update_ichannel(sc, aphy->hw, 317 ath9k_update_ichannel(sc, aphy->hw,
313 &sc->sc_ah->channels[sc->chan_idx]); 318 &sc->sc_ah->channels[sc->chan_idx]);
319
320 /* sync hw configuration for hw code */
321 common->hw = aphy->hw;
322
314 ath_update_chainmask(sc, sc->chan_is_ht); 323 ath_update_chainmask(sc, sc->chan_is_ht);
315 if (ath_set_channel(sc, aphy->hw, 324 if (ath_set_channel(sc, aphy->hw,
316 &sc->sc_ah->channels[sc->chan_idx]) < 0) { 325 &sc->sc_ah->channels[sc->chan_idx]) < 0) {
@@ -331,13 +340,11 @@ void ath9k_wiphy_chan_work(struct work_struct *work)
331void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) 340void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
332{ 341{
333 struct ath_wiphy *aphy = hw->priv; 342 struct ath_wiphy *aphy = hw->priv;
334 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
335 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 343 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
336 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info);
337 344
338 if (tx_info_priv && tx_info_priv->frame_type == ATH9K_INT_PAUSE && 345 if ((tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_PAUSE) &&
339 aphy->state == ATH_WIPHY_PAUSING) { 346 aphy->state == ATH_WIPHY_PAUSING) {
340 if (!(info->flags & IEEE80211_TX_STAT_ACK)) { 347 if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) {
341 printk(KERN_DEBUG "ath9k: %s: no ACK for pause " 348 printk(KERN_DEBUG "ath9k: %s: no ACK for pause "
342 "frame\n", wiphy_name(hw->wiphy)); 349 "frame\n", wiphy_name(hw->wiphy));
343 /* 350 /*
@@ -356,9 +363,6 @@ void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
356 } 363 }
357 } 364 }
358 365
359 kfree(tx_info_priv);
360 tx_info->rate_driver_data[0] = NULL;
361
362 dev_kfree_skb(skb); 366 dev_kfree_skb(skb);
363} 367}
364 368
@@ -519,8 +523,9 @@ int ath9k_wiphy_select(struct ath_wiphy *aphy)
519 * frame being completed) 523 * frame being completed)
520 */ 524 */
521 spin_unlock_bh(&sc->wiphy_lock); 525 spin_unlock_bh(&sc->wiphy_lock);
522 ath_radio_disable(sc); 526 ath_radio_disable(sc, aphy->hw);
523 ath_radio_enable(sc); 527 ath_radio_enable(sc, aphy->hw);
528 /* Only the primary wiphy hw is used for queuing work */
524 ieee80211_queue_work(aphy->sc->hw, 529 ieee80211_queue_work(aphy->sc->hw,
525 &aphy->sc->chan_work); 530 &aphy->sc->chan_work);
526 return -EBUSY; /* previous select still in progress */ 531 return -EBUSY; /* previous select still in progress */
@@ -666,15 +671,78 @@ void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int)
666bool ath9k_all_wiphys_idle(struct ath_softc *sc) 671bool ath9k_all_wiphys_idle(struct ath_softc *sc)
667{ 672{
668 unsigned int i; 673 unsigned int i;
669 if (sc->pri_wiphy->state != ATH_WIPHY_INACTIVE) { 674 if (!sc->pri_wiphy->idle)
670 return false; 675 return false;
671 }
672 for (i = 0; i < sc->num_sec_wiphy; i++) { 676 for (i = 0; i < sc->num_sec_wiphy; i++) {
673 struct ath_wiphy *aphy = sc->sec_wiphy[i]; 677 struct ath_wiphy *aphy = sc->sec_wiphy[i];
674 if (!aphy) 678 if (!aphy)
675 continue; 679 continue;
676 if (aphy->state != ATH_WIPHY_INACTIVE) 680 if (!aphy->idle)
677 return false; 681 return false;
678 } 682 }
679 return true; 683 return true;
680} 684}
685
686/* caller must hold wiphy_lock */
687void ath9k_set_wiphy_idle(struct ath_wiphy *aphy, bool idle)
688{
689 struct ath_softc *sc = aphy->sc;
690
691 aphy->idle = idle;
692 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
693 "Marking %s as %s\n",
694 wiphy_name(aphy->hw->wiphy),
695 idle ? "idle" : "not-idle");
696}
697/* Only bother starting a queue on an active virtual wiphy */
698void ath_mac80211_start_queue(struct ath_softc *sc, u16 skb_queue)
699{
700 struct ieee80211_hw *hw = sc->pri_wiphy->hw;
701 unsigned int i;
702
703 spin_lock_bh(&sc->wiphy_lock);
704
705 /* Start the primary wiphy */
706 if (sc->pri_wiphy->state == ATH_WIPHY_ACTIVE) {
707 ieee80211_wake_queue(hw, skb_queue);
708 goto unlock;
709 }
710
711 /* Now start the secondary wiphy queues */
712 for (i = 0; i < sc->num_sec_wiphy; i++) {
713 struct ath_wiphy *aphy = sc->sec_wiphy[i];
714 if (!aphy)
715 continue;
716 if (aphy->state != ATH_WIPHY_ACTIVE)
717 continue;
718
719 hw = aphy->hw;
720 ieee80211_wake_queue(hw, skb_queue);
721 break;
722 }
723
724unlock:
725 spin_unlock_bh(&sc->wiphy_lock);
726}
727
728/* Go ahead and propagate information to all virtual wiphys, it won't hurt */
729void ath_mac80211_stop_queue(struct ath_softc *sc, u16 skb_queue)
730{
731 struct ieee80211_hw *hw = sc->pri_wiphy->hw;
732 unsigned int i;
733
734 spin_lock_bh(&sc->wiphy_lock);
735
736 /* Stop the primary wiphy */
737 ieee80211_stop_queue(hw, skb_queue);
738
739 /* Now stop the secondary wiphy queues */
740 for (i = 0; i < sc->num_sec_wiphy; i++) {
741 struct ath_wiphy *aphy = sc->sec_wiphy[i];
742 if (!aphy)
743 continue;
744 hw = aphy->hw;
745 ieee80211_stop_queue(hw, skb_queue);
746 }
747 spin_unlock_bh(&sc->wiphy_lock);
748}
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 42551a48c8ac..294b486bc3ed 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -70,6 +70,29 @@ static int ath_tx_num_badfrms(struct ath_softc *sc, struct ath_buf *bf,
70static void ath_tx_rc_status(struct ath_buf *bf, struct ath_desc *ds, 70static void ath_tx_rc_status(struct ath_buf *bf, struct ath_desc *ds,
71 int nbad, int txok, bool update_rc); 71 int nbad, int txok, bool update_rc);
72 72
73enum {
74 MCS_DEFAULT,
75 MCS_HT40,
76 MCS_HT40_SGI,
77};
78
79static int ath_max_4ms_framelen[3][16] = {
80 [MCS_DEFAULT] = {
81 3216, 6434, 9650, 12868, 19304, 25740, 28956, 32180,
82 6430, 12860, 19300, 25736, 38600, 51472, 57890, 64320,
83 },
84 [MCS_HT40] = {
85 6684, 13368, 20052, 26738, 40104, 53476, 60156, 66840,
86 13360, 26720, 40080, 53440, 80160, 106880, 120240, 133600,
87 },
88 [MCS_HT40_SGI] = {
89 /* TODO: Only MCS 7 and 15 updated, recalculate the rest */
90 6684, 13368, 20052, 26738, 40104, 53476, 60156, 74200,
91 13360, 26720, 40080, 53440, 80160, 106880, 120240, 148400,
92 }
93};
94
95
73/*********************/ 96/*********************/
74/* Aggregation logic */ 97/* Aggregation logic */
75/*********************/ 98/*********************/
@@ -107,7 +130,7 @@ static void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
107{ 130{
108 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum]; 131 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
109 132
110 ASSERT(tid->paused > 0); 133 BUG_ON(tid->paused <= 0);
111 spin_lock_bh(&txq->axq_lock); 134 spin_lock_bh(&txq->axq_lock);
112 135
113 tid->paused--; 136 tid->paused--;
@@ -131,7 +154,7 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
131 struct list_head bf_head; 154 struct list_head bf_head;
132 INIT_LIST_HEAD(&bf_head); 155 INIT_LIST_HEAD(&bf_head);
133 156
134 ASSERT(tid->paused > 0); 157 BUG_ON(tid->paused <= 0);
135 spin_lock_bh(&txq->axq_lock); 158 spin_lock_bh(&txq->axq_lock);
136 159
137 tid->paused--; 160 tid->paused--;
@@ -143,7 +166,7 @@ static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
143 166
144 while (!list_empty(&tid->buf_q)) { 167 while (!list_empty(&tid->buf_q)) {
145 bf = list_first_entry(&tid->buf_q, struct ath_buf, list); 168 bf = list_first_entry(&tid->buf_q, struct ath_buf, list);
146 ASSERT(!bf_isretried(bf)); 169 BUG_ON(bf_isretried(bf));
147 list_move_tail(&bf->list, &bf_head); 170 list_move_tail(&bf->list, &bf_head);
148 ath_tx_send_ht_normal(sc, txq, tid, &bf_head); 171 ath_tx_send_ht_normal(sc, txq, tid, &bf_head);
149 } 172 }
@@ -178,7 +201,7 @@ static void ath_tx_addto_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
178 index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno); 201 index = ATH_BA_INDEX(tid->seq_start, bf->bf_seqno);
179 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 202 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
180 203
181 ASSERT(tid->tx_buf[cindex] == NULL); 204 BUG_ON(tid->tx_buf[cindex] != NULL);
182 tid->tx_buf[cindex] = bf; 205 tid->tx_buf[cindex] = bf;
183 206
184 if (index >= ((tid->baw_tail - tid->baw_head) & 207 if (index >= ((tid->baw_tail - tid->baw_head) &
@@ -251,6 +274,7 @@ static struct ath_buf* ath_clone_txbuf(struct ath_softc *sc, struct ath_buf *bf)
251 274
252 ATH_TXBUF_RESET(tbf); 275 ATH_TXBUF_RESET(tbf);
253 276
277 tbf->aphy = bf->aphy;
254 tbf->bf_mpdu = bf->bf_mpdu; 278 tbf->bf_mpdu = bf->bf_mpdu;
255 tbf->bf_buf_addr = bf->bf_buf_addr; 279 tbf->bf_buf_addr = bf->bf_buf_addr;
256 *(tbf->bf_desc) = *(bf->bf_desc); 280 *(tbf->bf_desc) = *(bf->bf_desc);
@@ -267,7 +291,9 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
267 struct ath_node *an = NULL; 291 struct ath_node *an = NULL;
268 struct sk_buff *skb; 292 struct sk_buff *skb;
269 struct ieee80211_sta *sta; 293 struct ieee80211_sta *sta;
294 struct ieee80211_hw *hw;
270 struct ieee80211_hdr *hdr; 295 struct ieee80211_hdr *hdr;
296 struct ieee80211_tx_info *tx_info;
271 struct ath_atx_tid *tid = NULL; 297 struct ath_atx_tid *tid = NULL;
272 struct ath_buf *bf_next, *bf_last = bf->bf_lastbf; 298 struct ath_buf *bf_next, *bf_last = bf->bf_lastbf;
273 struct ath_desc *ds = bf_last->bf_desc; 299 struct ath_desc *ds = bf_last->bf_desc;
@@ -280,9 +306,13 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
280 skb = bf->bf_mpdu; 306 skb = bf->bf_mpdu;
281 hdr = (struct ieee80211_hdr *)skb->data; 307 hdr = (struct ieee80211_hdr *)skb->data;
282 308
309 tx_info = IEEE80211_SKB_CB(skb);
310 hw = bf->aphy->hw;
311
283 rcu_read_lock(); 312 rcu_read_lock();
284 313
285 sta = ieee80211_find_sta(sc->hw, hdr->addr1); 314 /* XXX: use ieee80211_find_sta! */
315 sta = ieee80211_find_sta_by_hw(hw, hdr->addr1);
286 if (!sta) { 316 if (!sta) {
287 rcu_read_unlock(); 317 rcu_read_unlock();
288 return; 318 return;
@@ -358,7 +388,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
358 else 388 else
359 INIT_LIST_HEAD(&bf_head); 389 INIT_LIST_HEAD(&bf_head);
360 } else { 390 } else {
361 ASSERT(!list_empty(bf_q)); 391 BUG_ON(list_empty(bf_q));
362 list_move_tail(&bf->list, &bf_head); 392 list_move_tail(&bf->list, &bf_head);
363 } 393 }
364 394
@@ -452,11 +482,9 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
452static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf, 482static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
453 struct ath_atx_tid *tid) 483 struct ath_atx_tid *tid)
454{ 484{
455 const struct ath_rate_table *rate_table = sc->cur_rate_table;
456 struct sk_buff *skb; 485 struct sk_buff *skb;
457 struct ieee80211_tx_info *tx_info; 486 struct ieee80211_tx_info *tx_info;
458 struct ieee80211_tx_rate *rates; 487 struct ieee80211_tx_rate *rates;
459 struct ath_tx_info_priv *tx_info_priv;
460 u32 max_4ms_framelen, frmlen; 488 u32 max_4ms_framelen, frmlen;
461 u16 aggr_limit, legacy = 0; 489 u16 aggr_limit, legacy = 0;
462 int i; 490 int i;
@@ -464,7 +492,6 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
464 skb = bf->bf_mpdu; 492 skb = bf->bf_mpdu;
465 tx_info = IEEE80211_SKB_CB(skb); 493 tx_info = IEEE80211_SKB_CB(skb);
466 rates = tx_info->control.rates; 494 rates = tx_info->control.rates;
467 tx_info_priv = (struct ath_tx_info_priv *)tx_info->rate_driver_data[0];
468 495
469 /* 496 /*
470 * Find the lowest frame length among the rate series that will have a 497 * Find the lowest frame length among the rate series that will have a
@@ -475,12 +502,20 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
475 502
476 for (i = 0; i < 4; i++) { 503 for (i = 0; i < 4; i++) {
477 if (rates[i].count) { 504 if (rates[i].count) {
478 if (!WLAN_RC_PHY_HT(rate_table->info[rates[i].idx].phy)) { 505 int modeidx;
506 if (!(rates[i].flags & IEEE80211_TX_RC_MCS)) {
479 legacy = 1; 507 legacy = 1;
480 break; 508 break;
481 } 509 }
482 510
483 frmlen = rate_table->info[rates[i].idx].max_4ms_framelen; 511 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
512 modeidx = MCS_HT40_SGI;
513 else if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
514 modeidx = MCS_HT40;
515 else
516 modeidx = MCS_DEFAULT;
517
518 frmlen = ath_max_4ms_framelen[modeidx][rates[i].idx];
484 max_4ms_framelen = min(max_4ms_framelen, frmlen); 519 max_4ms_framelen = min(max_4ms_framelen, frmlen);
485 } 520 }
486 } 521 }
@@ -518,12 +553,11 @@ static u32 ath_lookup_rate(struct ath_softc *sc, struct ath_buf *bf,
518static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid, 553static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
519 struct ath_buf *bf, u16 frmlen) 554 struct ath_buf *bf, u16 frmlen)
520{ 555{
521 const struct ath_rate_table *rt = sc->cur_rate_table;
522 struct sk_buff *skb = bf->bf_mpdu; 556 struct sk_buff *skb = bf->bf_mpdu;
523 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 557 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
524 u32 nsymbits, nsymbols; 558 u32 nsymbits, nsymbols;
525 u16 minlen; 559 u16 minlen;
526 u8 rc, flags, rix; 560 u8 flags, rix;
527 int width, half_gi, ndelim, mindelim; 561 int width, half_gi, ndelim, mindelim;
528 562
529 /* Select standard number of delimiters based on frame length alone */ 563 /* Select standard number of delimiters based on frame length alone */
@@ -553,7 +587,6 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
553 587
554 rix = tx_info->control.rates[0].idx; 588 rix = tx_info->control.rates[0].idx;
555 flags = tx_info->control.rates[0].flags; 589 flags = tx_info->control.rates[0].flags;
556 rc = rt->info[rix].ratecode;
557 width = (flags & IEEE80211_TX_RC_40_MHZ_WIDTH) ? 1 : 0; 590 width = (flags & IEEE80211_TX_RC_40_MHZ_WIDTH) ? 1 : 0;
558 half_gi = (flags & IEEE80211_TX_RC_SHORT_GI) ? 1 : 0; 591 half_gi = (flags & IEEE80211_TX_RC_SHORT_GI) ? 1 : 0;
559 592
@@ -565,7 +598,7 @@ static int ath_compute_num_delims(struct ath_softc *sc, struct ath_atx_tid *tid,
565 if (nsymbols == 0) 598 if (nsymbols == 0)
566 nsymbols = 1; 599 nsymbols = 1;
567 600
568 nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width]; 601 nsymbits = bits_per_symbol[rix][width];
569 minlen = (nsymbols * nsymbits) / BITS_PER_BYTE; 602 minlen = (nsymbols * nsymbits) / BITS_PER_BYTE;
570 603
571 if (frmlen < minlen) { 604 if (frmlen < minlen) {
@@ -694,7 +727,6 @@ static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
694 /* anchor last desc of aggregate */ 727 /* anchor last desc of aggregate */
695 ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc); 728 ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc);
696 729
697 txq->axq_aggr_depth++;
698 ath_tx_txqaddbuf(sc, txq, &bf_q); 730 ath_tx_txqaddbuf(sc, txq, &bf_q);
699 TX_STAT_INC(txq->axq_qnum, a_aggr); 731 TX_STAT_INC(txq->axq_qnum, a_aggr);
700 732
@@ -815,6 +847,7 @@ static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
815struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) 847struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
816{ 848{
817 struct ath_hw *ah = sc->sc_ah; 849 struct ath_hw *ah = sc->sc_ah;
850 struct ath_common *common = ath9k_hw_common(ah);
818 struct ath9k_tx_queue_info qi; 851 struct ath9k_tx_queue_info qi;
819 int qnum; 852 int qnum;
820 853
@@ -854,9 +887,9 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
854 return NULL; 887 return NULL;
855 } 888 }
856 if (qnum >= ARRAY_SIZE(sc->tx.txq)) { 889 if (qnum >= ARRAY_SIZE(sc->tx.txq)) {
857 DPRINTF(sc, ATH_DBG_FATAL, 890 ath_print(common, ATH_DBG_FATAL,
858 "qnum %u out of range, max %u!\n", 891 "qnum %u out of range, max %u!\n",
859 qnum, (unsigned int)ARRAY_SIZE(sc->tx.txq)); 892 qnum, (unsigned int)ARRAY_SIZE(sc->tx.txq));
860 ath9k_hw_releasetxqueue(ah, qnum); 893 ath9k_hw_releasetxqueue(ah, qnum);
861 return NULL; 894 return NULL;
862 } 895 }
@@ -869,8 +902,6 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
869 INIT_LIST_HEAD(&txq->axq_acq); 902 INIT_LIST_HEAD(&txq->axq_acq);
870 spin_lock_init(&txq->axq_lock); 903 spin_lock_init(&txq->axq_lock);
871 txq->axq_depth = 0; 904 txq->axq_depth = 0;
872 txq->axq_aggr_depth = 0;
873 txq->axq_linkbuf = NULL;
874 txq->axq_tx_inprogress = false; 905 txq->axq_tx_inprogress = false;
875 sc->tx.txqsetup |= 1<<qnum; 906 sc->tx.txqsetup |= 1<<qnum;
876 } 907 }
@@ -884,9 +915,9 @@ int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype)
884 switch (qtype) { 915 switch (qtype) {
885 case ATH9K_TX_QUEUE_DATA: 916 case ATH9K_TX_QUEUE_DATA:
886 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) { 917 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) {
887 DPRINTF(sc, ATH_DBG_FATAL, 918 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
888 "HAL AC %u out of range, max %zu!\n", 919 "HAL AC %u out of range, max %zu!\n",
889 haltype, ARRAY_SIZE(sc->tx.hwq_map)); 920 haltype, ARRAY_SIZE(sc->tx.hwq_map));
890 return -1; 921 return -1;
891 } 922 }
892 qnum = sc->tx.hwq_map[haltype]; 923 qnum = sc->tx.hwq_map[haltype];
@@ -906,18 +937,19 @@ int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype)
906struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb) 937struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb)
907{ 938{
908 struct ath_txq *txq = NULL; 939 struct ath_txq *txq = NULL;
940 u16 skb_queue = skb_get_queue_mapping(skb);
909 int qnum; 941 int qnum;
910 942
911 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc); 943 qnum = ath_get_hal_qnum(skb_queue, sc);
912 txq = &sc->tx.txq[qnum]; 944 txq = &sc->tx.txq[qnum];
913 945
914 spin_lock_bh(&txq->axq_lock); 946 spin_lock_bh(&txq->axq_lock);
915 947
916 if (txq->axq_depth >= (ATH_TXBUF - 20)) { 948 if (txq->axq_depth >= (ATH_TXBUF - 20)) {
917 DPRINTF(sc, ATH_DBG_XMIT, 949 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_XMIT,
918 "TX queue: %d is full, depth: %d\n", 950 "TX queue: %d is full, depth: %d\n",
919 qnum, txq->axq_depth); 951 qnum, txq->axq_depth);
920 ieee80211_stop_queue(sc->hw, skb_get_queue_mapping(skb)); 952 ath_mac80211_stop_queue(sc, skb_queue);
921 txq->stopped = 1; 953 txq->stopped = 1;
922 spin_unlock_bh(&txq->axq_lock); 954 spin_unlock_bh(&txq->axq_lock);
923 return NULL; 955 return NULL;
@@ -945,7 +977,7 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
945 return 0; 977 return 0;
946 } 978 }
947 979
948 ASSERT(sc->tx.txq[qnum].axq_qnum == qnum); 980 BUG_ON(sc->tx.txq[qnum].axq_qnum != qnum);
949 981
950 ath9k_hw_get_txq_props(ah, qnum, &qi); 982 ath9k_hw_get_txq_props(ah, qnum, &qi);
951 qi.tqi_aifs = qinfo->tqi_aifs; 983 qi.tqi_aifs = qinfo->tqi_aifs;
@@ -955,8 +987,8 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
955 qi.tqi_readyTime = qinfo->tqi_readyTime; 987 qi.tqi_readyTime = qinfo->tqi_readyTime;
956 988
957 if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) { 989 if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
958 DPRINTF(sc, ATH_DBG_FATAL, 990 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
959 "Unable to update hardware queue %u!\n", qnum); 991 "Unable to update hardware queue %u!\n", qnum);
960 error = -EIO; 992 error = -EIO;
961 } else { 993 } else {
962 ath9k_hw_resettxqueue(ah, qnum); 994 ath9k_hw_resettxqueue(ah, qnum);
@@ -1004,7 +1036,6 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
1004 1036
1005 if (list_empty(&txq->axq_q)) { 1037 if (list_empty(&txq->axq_q)) {
1006 txq->axq_link = NULL; 1038 txq->axq_link = NULL;
1007 txq->axq_linkbuf = NULL;
1008 spin_unlock_bh(&txq->axq_lock); 1039 spin_unlock_bh(&txq->axq_lock);
1009 break; 1040 break;
1010 } 1041 }
@@ -1055,6 +1086,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
1055void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx) 1086void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
1056{ 1087{
1057 struct ath_hw *ah = sc->sc_ah; 1088 struct ath_hw *ah = sc->sc_ah;
1089 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1058 struct ath_txq *txq; 1090 struct ath_txq *txq;
1059 int i, npend = 0; 1091 int i, npend = 0;
1060 1092
@@ -1076,14 +1108,15 @@ void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
1076 if (npend) { 1108 if (npend) {
1077 int r; 1109 int r;
1078 1110
1079 DPRINTF(sc, ATH_DBG_XMIT, "Unable to stop TxDMA. Reset HAL!\n"); 1111 ath_print(common, ATH_DBG_FATAL,
1112 "Unable to stop TxDMA. Reset HAL!\n");
1080 1113
1081 spin_lock_bh(&sc->sc_resetlock); 1114 spin_lock_bh(&sc->sc_resetlock);
1082 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, true); 1115 r = ath9k_hw_reset(ah, sc->sc_ah->curchan, false);
1083 if (r) 1116 if (r)
1084 DPRINTF(sc, ATH_DBG_FATAL, 1117 ath_print(common, ATH_DBG_FATAL,
1085 "Unable to reset hardware; reset status %d\n", 1118 "Unable to reset hardware; reset status %d\n",
1086 r); 1119 r);
1087 spin_unlock_bh(&sc->sc_resetlock); 1120 spin_unlock_bh(&sc->sc_resetlock);
1088 } 1121 }
1089 1122
@@ -1147,8 +1180,8 @@ int ath_tx_setup(struct ath_softc *sc, int haltype)
1147 struct ath_txq *txq; 1180 struct ath_txq *txq;
1148 1181
1149 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) { 1182 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) {
1150 DPRINTF(sc, ATH_DBG_FATAL, 1183 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1151 "HAL AC %u out of range, max %zu!\n", 1184 "HAL AC %u out of range, max %zu!\n",
1152 haltype, ARRAY_SIZE(sc->tx.hwq_map)); 1185 haltype, ARRAY_SIZE(sc->tx.hwq_map));
1153 return 0; 1186 return 0;
1154 } 1187 }
@@ -1172,6 +1205,7 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
1172 struct list_head *head) 1205 struct list_head *head)
1173{ 1206{
1174 struct ath_hw *ah = sc->sc_ah; 1207 struct ath_hw *ah = sc->sc_ah;
1208 struct ath_common *common = ath9k_hw_common(ah);
1175 struct ath_buf *bf; 1209 struct ath_buf *bf;
1176 1210
1177 /* 1211 /*
@@ -1186,21 +1220,20 @@ static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
1186 1220
1187 list_splice_tail_init(head, &txq->axq_q); 1221 list_splice_tail_init(head, &txq->axq_q);
1188 txq->axq_depth++; 1222 txq->axq_depth++;
1189 txq->axq_linkbuf = list_entry(txq->axq_q.prev, struct ath_buf, list);
1190 1223
1191 DPRINTF(sc, ATH_DBG_QUEUE, 1224 ath_print(common, ATH_DBG_QUEUE,
1192 "qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth); 1225 "qnum: %d, txq depth: %d\n", txq->axq_qnum, txq->axq_depth);
1193 1226
1194 if (txq->axq_link == NULL) { 1227 if (txq->axq_link == NULL) {
1195 ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr); 1228 ath9k_hw_puttxbuf(ah, txq->axq_qnum, bf->bf_daddr);
1196 DPRINTF(sc, ATH_DBG_XMIT, 1229 ath_print(common, ATH_DBG_XMIT,
1197 "TXDP[%u] = %llx (%p)\n", 1230 "TXDP[%u] = %llx (%p)\n",
1198 txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc); 1231 txq->axq_qnum, ito64(bf->bf_daddr), bf->bf_desc);
1199 } else { 1232 } else {
1200 *txq->axq_link = bf->bf_daddr; 1233 *txq->axq_link = bf->bf_daddr;
1201 DPRINTF(sc, ATH_DBG_XMIT, "link[%u] (%p)=%llx (%p)\n", 1234 ath_print(common, ATH_DBG_XMIT, "link[%u] (%p)=%llx (%p)\n",
1202 txq->axq_qnum, txq->axq_link, 1235 txq->axq_qnum, txq->axq_link,
1203 ito64(bf->bf_daddr), bf->bf_desc); 1236 ito64(bf->bf_daddr), bf->bf_desc);
1204 } 1237 }
1205 txq->axq_link = &(bf->bf_lastbf->bf_desc->ds_link); 1238 txq->axq_link = &(bf->bf_lastbf->bf_desc->ds_link);
1206 ath9k_hw_txstart(ah, txq->axq_qnum); 1239 ath9k_hw_txstart(ah, txq->axq_qnum);
@@ -1320,25 +1353,6 @@ static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
1320 return htype; 1353 return htype;
1321} 1354}
1322 1355
1323static bool is_pae(struct sk_buff *skb)
1324{
1325 struct ieee80211_hdr *hdr;
1326 __le16 fc;
1327
1328 hdr = (struct ieee80211_hdr *)skb->data;
1329 fc = hdr->frame_control;
1330
1331 if (ieee80211_is_data(fc)) {
1332 if (ieee80211_is_nullfunc(fc) ||
1333 /* Port Access Entity (IEEE 802.1X) */
1334 (skb->protocol == cpu_to_be16(ETH_P_PAE))) {
1335 return true;
1336 }
1337 }
1338
1339 return false;
1340}
1341
1342static int get_hw_crypto_keytype(struct sk_buff *skb) 1356static int get_hw_crypto_keytype(struct sk_buff *skb)
1343{ 1357{
1344 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1358 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
@@ -1381,17 +1395,9 @@ static void assign_aggr_tid_seqno(struct sk_buff *skb,
1381 * For HT capable stations, we save tidno for later use. 1395 * For HT capable stations, we save tidno for later use.
1382 * We also override seqno set by upper layer with the one 1396 * We also override seqno set by upper layer with the one
1383 * in tx aggregation state. 1397 * in tx aggregation state.
1384 *
1385 * If fragmentation is on, the sequence number is
1386 * not overridden, since it has been
1387 * incremented by the fragmentation routine.
1388 *
1389 * FIXME: check if the fragmentation threshold exceeds
1390 * IEEE80211 max.
1391 */ 1398 */
1392 tid = ATH_AN_2_TID(an, bf->bf_tidno); 1399 tid = ATH_AN_2_TID(an, bf->bf_tidno);
1393 hdr->seq_ctrl = cpu_to_le16(tid->seq_next << 1400 hdr->seq_ctrl = cpu_to_le16(tid->seq_next << IEEE80211_SEQ_SEQ_SHIFT);
1394 IEEE80211_SEQ_SEQ_SHIFT);
1395 bf->bf_seqno = tid->seq_next; 1401 bf->bf_seqno = tid->seq_next;
1396 INCR(tid->seq_next, IEEE80211_SEQ_MAX); 1402 INCR(tid->seq_next, IEEE80211_SEQ_MAX);
1397} 1403}
@@ -1420,22 +1426,14 @@ static int setup_tx_flags(struct ath_softc *sc, struct sk_buff *skb,
1420static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf, 1426static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
1421 int width, int half_gi, bool shortPreamble) 1427 int width, int half_gi, bool shortPreamble)
1422{ 1428{
1423 const struct ath_rate_table *rate_table = sc->cur_rate_table;
1424 u32 nbits, nsymbits, duration, nsymbols; 1429 u32 nbits, nsymbits, duration, nsymbols;
1425 u8 rc;
1426 int streams, pktlen; 1430 int streams, pktlen;
1427 1431
1428 pktlen = bf_isaggr(bf) ? bf->bf_al : bf->bf_frmlen; 1432 pktlen = bf_isaggr(bf) ? bf->bf_al : bf->bf_frmlen;
1429 rc = rate_table->info[rix].ratecode;
1430
1431 /* for legacy rates, use old function to compute packet duration */
1432 if (!IS_HT_RATE(rc))
1433 return ath9k_hw_computetxtime(sc->sc_ah, rate_table, pktlen,
1434 rix, shortPreamble);
1435 1433
1436 /* find number of symbols: PLCP + data */ 1434 /* find number of symbols: PLCP + data */
1437 nbits = (pktlen << 3) + OFDM_PLCP_BITS; 1435 nbits = (pktlen << 3) + OFDM_PLCP_BITS;
1438 nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width]; 1436 nsymbits = bits_per_symbol[rix][width];
1439 nsymbols = (nbits + nsymbits - 1) / nsymbits; 1437 nsymbols = (nbits + nsymbits - 1) / nsymbits;
1440 1438
1441 if (!half_gi) 1439 if (!half_gi)
@@ -1444,7 +1442,7 @@ static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
1444 duration = SYMBOL_TIME_HALFGI(nsymbols); 1442 duration = SYMBOL_TIME_HALFGI(nsymbols);
1445 1443
1446 /* addup duration for legacy/ht training and signal fields */ 1444 /* addup duration for legacy/ht training and signal fields */
1447 streams = HT_RC_2_STREAMS(rc); 1445 streams = HT_RC_2_STREAMS(rix);
1448 duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams); 1446 duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
1449 1447
1450 return duration; 1448 return duration;
@@ -1452,11 +1450,12 @@ static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
1452 1450
1453static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf) 1451static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
1454{ 1452{
1455 const struct ath_rate_table *rt = sc->cur_rate_table; 1453 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1456 struct ath9k_11n_rate_series series[4]; 1454 struct ath9k_11n_rate_series series[4];
1457 struct sk_buff *skb; 1455 struct sk_buff *skb;
1458 struct ieee80211_tx_info *tx_info; 1456 struct ieee80211_tx_info *tx_info;
1459 struct ieee80211_tx_rate *rates; 1457 struct ieee80211_tx_rate *rates;
1458 const struct ieee80211_rate *rate;
1460 struct ieee80211_hdr *hdr; 1459 struct ieee80211_hdr *hdr;
1461 int i, flags = 0; 1460 int i, flags = 0;
1462 u8 rix = 0, ctsrate = 0; 1461 u8 rix = 0, ctsrate = 0;
@@ -1475,59 +1474,76 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
1475 * checking the BSS's global flag. 1474 * checking the BSS's global flag.
1476 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used. 1475 * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
1477 */ 1476 */
1477 rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
1478 ctsrate = rate->hw_value;
1478 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT) 1479 if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
1479 ctsrate = rt->info[tx_info->control.rts_cts_rate_idx].ratecode | 1480 ctsrate |= rate->hw_value_short;
1480 rt->info[tx_info->control.rts_cts_rate_idx].short_preamble;
1481 else
1482 ctsrate = rt->info[tx_info->control.rts_cts_rate_idx].ratecode;
1483
1484 /*
1485 * ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive.
1486 * Check the first rate in the series to decide whether RTS/CTS
1487 * or CTS-to-self has to be used.
1488 */
1489 if (rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
1490 flags = ATH9K_TXDESC_CTSENA;
1491 else if (rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS)
1492 flags = ATH9K_TXDESC_RTSENA;
1493
1494 /* FIXME: Handle aggregation protection */
1495 if (sc->config.ath_aggr_prot &&
1496 (!bf_isaggr(bf) || (bf_isaggr(bf) && bf->bf_al < 8192))) {
1497 flags = ATH9K_TXDESC_RTSENA;
1498 }
1499
1500 /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
1501 if (bf_isaggr(bf) && (bf->bf_al > sc->sc_ah->caps.rts_aggr_limit))
1502 flags &= ~(ATH9K_TXDESC_RTSENA);
1503 1481
1504 for (i = 0; i < 4; i++) { 1482 for (i = 0; i < 4; i++) {
1483 bool is_40, is_sgi, is_sp;
1484 int phy;
1485
1505 if (!rates[i].count || (rates[i].idx < 0)) 1486 if (!rates[i].count || (rates[i].idx < 0))
1506 continue; 1487 continue;
1507 1488
1508 rix = rates[i].idx; 1489 rix = rates[i].idx;
1509 series[i].Tries = rates[i].count; 1490 series[i].Tries = rates[i].count;
1510 series[i].ChSel = sc->tx_chainmask; 1491 series[i].ChSel = common->tx_chainmask;
1511 1492
1512 if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 1493 if ((sc->config.ath_aggr_prot && bf_isaggr(bf)) ||
1513 series[i].Rate = rt->info[rix].ratecode | 1494 (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS)) {
1514 rt->info[rix].short_preamble; 1495 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
1515 else 1496 flags |= ATH9K_TXDESC_RTSENA;
1516 series[i].Rate = rt->info[rix].ratecode; 1497 } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
1517
1518 if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS)
1519 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS; 1498 series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
1499 flags |= ATH9K_TXDESC_CTSENA;
1500 }
1501
1520 if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) 1502 if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
1521 series[i].RateFlags |= ATH9K_RATESERIES_2040; 1503 series[i].RateFlags |= ATH9K_RATESERIES_2040;
1522 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI) 1504 if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
1523 series[i].RateFlags |= ATH9K_RATESERIES_HALFGI; 1505 series[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
1524 1506
1525 series[i].PktDuration = ath_pkt_duration(sc, rix, bf, 1507 is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
1526 (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH) != 0, 1508 is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
1527 (rates[i].flags & IEEE80211_TX_RC_SHORT_GI), 1509 is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
1528 (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)); 1510
1511 if (rates[i].flags & IEEE80211_TX_RC_MCS) {
1512 /* MCS rates */
1513 series[i].Rate = rix | 0x80;
1514 series[i].PktDuration = ath_pkt_duration(sc, rix, bf,
1515 is_40, is_sgi, is_sp);
1516 continue;
1517 }
1518
1519 /* legcay rates */
1520 if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
1521 !(rate->flags & IEEE80211_RATE_ERP_G))
1522 phy = WLAN_RC_PHY_CCK;
1523 else
1524 phy = WLAN_RC_PHY_OFDM;
1525
1526 rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
1527 series[i].Rate = rate->hw_value;
1528 if (rate->hw_value_short) {
1529 if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
1530 series[i].Rate |= rate->hw_value_short;
1531 } else {
1532 is_sp = false;
1533 }
1534
1535 series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
1536 phy, rate->bitrate * 100, bf->bf_frmlen, rix, is_sp);
1529 } 1537 }
1530 1538
1539 /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
1540 if (bf_isaggr(bf) && (bf->bf_al > sc->sc_ah->caps.rts_aggr_limit))
1541 flags &= ~ATH9K_TXDESC_RTSENA;
1542
1543 /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
1544 if (flags & ATH9K_TXDESC_RTSENA)
1545 flags &= ~ATH9K_TXDESC_CTSENA;
1546
1531 /* set dur_update_en for l-sig computation except for PS-Poll frames */ 1547 /* set dur_update_en for l-sig computation except for PS-Poll frames */
1532 ath9k_hw_set11n_ratescenario(sc->sc_ah, bf->bf_desc, 1548 ath9k_hw_set11n_ratescenario(sc->sc_ah, bf->bf_desc,
1533 bf->bf_lastbf->bf_desc, 1549 bf->bf_lastbf->bf_desc,
@@ -1546,24 +1562,36 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1546 struct ath_softc *sc = aphy->sc; 1562 struct ath_softc *sc = aphy->sc;
1547 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1563 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1548 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1564 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1549 struct ath_tx_info_priv *tx_info_priv;
1550 int hdrlen; 1565 int hdrlen;
1551 __le16 fc; 1566 __le16 fc;
1567 int padpos, padsize;
1552 1568
1553 tx_info_priv = kzalloc(sizeof(*tx_info_priv), GFP_ATOMIC); 1569 tx_info->pad[0] = 0;
1554 if (unlikely(!tx_info_priv)) 1570 switch (txctl->frame_type) {
1555 return -ENOMEM; 1571 case ATH9K_NOT_INTERNAL:
1556 tx_info->rate_driver_data[0] = tx_info_priv; 1572 break;
1557 tx_info_priv->aphy = aphy; 1573 case ATH9K_INT_PAUSE:
1558 tx_info_priv->frame_type = txctl->frame_type; 1574 tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_PAUSE;
1575 /* fall through */
1576 case ATH9K_INT_UNPAUSE:
1577 tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_INTERNAL;
1578 break;
1579 }
1559 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1580 hdrlen = ieee80211_get_hdrlen_from_skb(skb);
1560 fc = hdr->frame_control; 1581 fc = hdr->frame_control;
1561 1582
1562 ATH_TXBUF_RESET(bf); 1583 ATH_TXBUF_RESET(bf);
1563 1584
1564 bf->bf_frmlen = skb->len + FCS_LEN - (hdrlen & 3); 1585 bf->aphy = aphy;
1586 bf->bf_frmlen = skb->len + FCS_LEN;
1587 /* Remove the padding size from bf_frmlen, if any */
1588 padpos = ath9k_cmn_padpos(hdr->frame_control);
1589 padsize = padpos & 3;
1590 if (padsize && skb->len>padpos+padsize) {
1591 bf->bf_frmlen -= padsize;
1592 }
1565 1593
1566 if (conf_is_ht(&sc->hw->conf) && !is_pae(skb)) 1594 if (conf_is_ht(&hw->conf))
1567 bf->bf_state.bf_type |= BUF_HT; 1595 bf->bf_state.bf_type |= BUF_HT;
1568 1596
1569 bf->bf_flags = setup_tx_flags(sc, skb, txctl->txq); 1597 bf->bf_flags = setup_tx_flags(sc, skb, txctl->txq);
@@ -1576,7 +1604,8 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1576 bf->bf_keyix = ATH9K_TXKEYIX_INVALID; 1604 bf->bf_keyix = ATH9K_TXKEYIX_INVALID;
1577 } 1605 }
1578 1606
1579 if (ieee80211_is_data_qos(fc) && (sc->sc_flags & SC_OP_TXAGGR)) 1607 if (ieee80211_is_data_qos(fc) && bf_isht(bf) &&
1608 (sc->sc_flags & SC_OP_TXAGGR))
1580 assign_aggr_tid_seqno(skb, bf); 1609 assign_aggr_tid_seqno(skb, bf);
1581 1610
1582 bf->bf_mpdu = skb; 1611 bf->bf_mpdu = skb;
@@ -1585,13 +1614,20 @@ static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
1585 skb->len, DMA_TO_DEVICE); 1614 skb->len, DMA_TO_DEVICE);
1586 if (unlikely(dma_mapping_error(sc->dev, bf->bf_dmacontext))) { 1615 if (unlikely(dma_mapping_error(sc->dev, bf->bf_dmacontext))) {
1587 bf->bf_mpdu = NULL; 1616 bf->bf_mpdu = NULL;
1588 kfree(tx_info_priv); 1617 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
1589 tx_info->rate_driver_data[0] = NULL; 1618 "dma_mapping_error() on TX\n");
1590 DPRINTF(sc, ATH_DBG_FATAL, "dma_mapping_error() on TX\n");
1591 return -ENOMEM; 1619 return -ENOMEM;
1592 } 1620 }
1593 1621
1594 bf->bf_buf_addr = bf->bf_dmacontext; 1622 bf->bf_buf_addr = bf->bf_dmacontext;
1623
1624 /* tag if this is a nullfunc frame to enable PS when AP acks it */
1625 if (ieee80211_is_nullfunc(fc) && ieee80211_has_pm(fc)) {
1626 bf->bf_isnullfunc = true;
1627 sc->ps_flags &= ~PS_NULLFUNC_COMPLETED;
1628 } else
1629 bf->bf_isnullfunc = false;
1630
1595 return 0; 1631 return 0;
1596} 1632}
1597 1633
@@ -1669,12 +1705,13 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
1669{ 1705{
1670 struct ath_wiphy *aphy = hw->priv; 1706 struct ath_wiphy *aphy = hw->priv;
1671 struct ath_softc *sc = aphy->sc; 1707 struct ath_softc *sc = aphy->sc;
1708 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1672 struct ath_buf *bf; 1709 struct ath_buf *bf;
1673 int r; 1710 int r;
1674 1711
1675 bf = ath_tx_get_buffer(sc); 1712 bf = ath_tx_get_buffer(sc);
1676 if (!bf) { 1713 if (!bf) {
1677 DPRINTF(sc, ATH_DBG_XMIT, "TX buffers are full\n"); 1714 ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n");
1678 return -1; 1715 return -1;
1679 } 1716 }
1680 1717
@@ -1682,7 +1719,7 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
1682 if (unlikely(r)) { 1719 if (unlikely(r)) {
1683 struct ath_txq *txq = txctl->txq; 1720 struct ath_txq *txq = txctl->txq;
1684 1721
1685 DPRINTF(sc, ATH_DBG_FATAL, "TX mem alloc failure\n"); 1722 ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n");
1686 1723
1687 /* upon ath_tx_processq() this TX queue will be resumed, we 1724 /* upon ath_tx_processq() this TX queue will be resumed, we
1688 * guarantee this will happen by knowing beforehand that 1725 * guarantee this will happen by knowing beforehand that
@@ -1690,8 +1727,7 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
1690 * on the queue */ 1727 * on the queue */
1691 spin_lock_bh(&txq->axq_lock); 1728 spin_lock_bh(&txq->axq_lock);
1692 if (sc->tx.txq[txq->axq_qnum].axq_depth > 1) { 1729 if (sc->tx.txq[txq->axq_qnum].axq_depth > 1) {
1693 ieee80211_stop_queue(sc->hw, 1730 ath_mac80211_stop_queue(sc, skb_get_queue_mapping(skb));
1694 skb_get_queue_mapping(skb));
1695 txq->stopped = 1; 1731 txq->stopped = 1;
1696 } 1732 }
1697 spin_unlock_bh(&txq->axq_lock); 1733 spin_unlock_bh(&txq->axq_lock);
@@ -1712,7 +1748,9 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1712{ 1748{
1713 struct ath_wiphy *aphy = hw->priv; 1749 struct ath_wiphy *aphy = hw->priv;
1714 struct ath_softc *sc = aphy->sc; 1750 struct ath_softc *sc = aphy->sc;
1715 int hdrlen, padsize; 1751 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1752 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1753 int padpos, padsize;
1716 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1754 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1717 struct ath_tx_control txctl; 1755 struct ath_tx_control txctl;
1718 1756
@@ -1724,7 +1762,6 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1724 * BSSes. 1762 * BSSes.
1725 */ 1763 */
1726 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 1764 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1727 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1728 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 1765 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
1729 sc->tx.seq_no += 0x10; 1766 sc->tx.seq_no += 0x10;
1730 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 1767 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
@@ -1732,24 +1769,26 @@ void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
1732 } 1769 }
1733 1770
1734 /* Add the padding after the header if this is not already done */ 1771 /* Add the padding after the header if this is not already done */
1735 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1772 padpos = ath9k_cmn_padpos(hdr->frame_control);
1736 if (hdrlen & 3) { 1773 padsize = padpos & 3;
1737 padsize = hdrlen % 4; 1774 if (padsize && skb->len>padpos) {
1738 if (skb_headroom(skb) < padsize) { 1775 if (skb_headroom(skb) < padsize) {
1739 DPRINTF(sc, ATH_DBG_XMIT, "TX CABQ padding failed\n"); 1776 ath_print(common, ATH_DBG_XMIT,
1777 "TX CABQ padding failed\n");
1740 dev_kfree_skb_any(skb); 1778 dev_kfree_skb_any(skb);
1741 return; 1779 return;
1742 } 1780 }
1743 skb_push(skb, padsize); 1781 skb_push(skb, padsize);
1744 memmove(skb->data, skb->data + padsize, hdrlen); 1782 memmove(skb->data, skb->data + padsize, padpos);
1745 } 1783 }
1746 1784
1747 txctl.txq = sc->beacon.cabq; 1785 txctl.txq = sc->beacon.cabq;
1748 1786
1749 DPRINTF(sc, ATH_DBG_XMIT, "transmitting CABQ packet, skb: %p\n", skb); 1787 ath_print(common, ATH_DBG_XMIT,
1788 "transmitting CABQ packet, skb: %p\n", skb);
1750 1789
1751 if (ath_tx_start(hw, skb, &txctl) != 0) { 1790 if (ath_tx_start(hw, skb, &txctl) != 0) {
1752 DPRINTF(sc, ATH_DBG_XMIT, "CABQ TX failed\n"); 1791 ath_print(common, ATH_DBG_XMIT, "CABQ TX failed\n");
1753 goto exit; 1792 goto exit;
1754 } 1793 }
1755 1794
@@ -1763,26 +1802,18 @@ exit:
1763/*****************/ 1802/*****************/
1764 1803
1765static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb, 1804static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1766 int tx_flags) 1805 struct ath_wiphy *aphy, int tx_flags)
1767{ 1806{
1768 struct ieee80211_hw *hw = sc->hw; 1807 struct ieee80211_hw *hw = sc->hw;
1769 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1808 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1770 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info); 1809 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1771 int hdrlen, padsize; 1810 struct ieee80211_hdr * hdr = (struct ieee80211_hdr *)skb->data;
1772 int frame_type = ATH9K_NOT_INTERNAL; 1811 int padpos, padsize;
1773 1812
1774 DPRINTF(sc, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb); 1813 ath_print(common, ATH_DBG_XMIT, "TX complete: skb: %p\n", skb);
1775
1776 if (tx_info_priv) {
1777 hw = tx_info_priv->aphy->hw;
1778 frame_type = tx_info_priv->frame_type;
1779 }
1780 1814
1781 if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK || 1815 if (aphy)
1782 tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) { 1816 hw = aphy->hw;
1783 kfree(tx_info_priv);
1784 tx_info->rate_driver_data[0] = NULL;
1785 }
1786 1817
1787 if (tx_flags & ATH_TX_BAR) 1818 if (tx_flags & ATH_TX_BAR)
1788 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK; 1819 tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
@@ -1792,31 +1823,32 @@ static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
1792 tx_info->flags |= IEEE80211_TX_STAT_ACK; 1823 tx_info->flags |= IEEE80211_TX_STAT_ACK;
1793 } 1824 }
1794 1825
1795 hdrlen = ieee80211_get_hdrlen_from_skb(skb); 1826 padpos = ath9k_cmn_padpos(hdr->frame_control);
1796 padsize = hdrlen & 3; 1827 padsize = padpos & 3;
1797 if (padsize && hdrlen >= 24) { 1828 if (padsize && skb->len>padpos+padsize) {
1798 /* 1829 /*
1799 * Remove MAC header padding before giving the frame back to 1830 * Remove MAC header padding before giving the frame back to
1800 * mac80211. 1831 * mac80211.
1801 */ 1832 */
1802 memmove(skb->data + padsize, skb->data, hdrlen); 1833 memmove(skb->data + padsize, skb->data, padpos);
1803 skb_pull(skb, padsize); 1834 skb_pull(skb, padsize);
1804 } 1835 }
1805 1836
1806 if (sc->sc_flags & SC_OP_WAIT_FOR_TX_ACK) { 1837 if (sc->ps_flags & PS_WAIT_FOR_TX_ACK) {
1807 sc->sc_flags &= ~SC_OP_WAIT_FOR_TX_ACK; 1838 sc->ps_flags &= ~PS_WAIT_FOR_TX_ACK;
1808 DPRINTF(sc, ATH_DBG_PS, "Going back to sleep after having " 1839 ath_print(common, ATH_DBG_PS,
1809 "received TX status (0x%x)\n", 1840 "Going back to sleep after having "
1810 sc->sc_flags & (SC_OP_WAIT_FOR_BEACON | 1841 "received TX status (0x%lx)\n",
1811 SC_OP_WAIT_FOR_CAB | 1842 sc->ps_flags & (PS_WAIT_FOR_BEACON |
1812 SC_OP_WAIT_FOR_PSPOLL_DATA | 1843 PS_WAIT_FOR_CAB |
1813 SC_OP_WAIT_FOR_TX_ACK)); 1844 PS_WAIT_FOR_PSPOLL_DATA |
1845 PS_WAIT_FOR_TX_ACK));
1814 } 1846 }
1815 1847
1816 if (frame_type == ATH9K_NOT_INTERNAL) 1848 if (unlikely(tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_INTERNAL))
1817 ieee80211_tx_status(hw, skb);
1818 else
1819 ath9k_tx_status(hw, skb); 1849 ath9k_tx_status(hw, skb);
1850 else
1851 ieee80211_tx_status(hw, skb);
1820} 1852}
1821 1853
1822static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, 1854static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
@@ -1839,7 +1871,7 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
1839 } 1871 }
1840 1872
1841 dma_unmap_single(sc->dev, bf->bf_dmacontext, skb->len, DMA_TO_DEVICE); 1873 dma_unmap_single(sc->dev, bf->bf_dmacontext, skb->len, DMA_TO_DEVICE);
1842 ath_tx_complete(sc, skb, tx_flags); 1874 ath_tx_complete(sc, skb, bf->aphy, tx_flags);
1843 ath_debug_stat_tx(sc, txq, bf); 1875 ath_debug_stat_tx(sc, txq, bf);
1844 1876
1845 /* 1877 /*
@@ -1887,8 +1919,7 @@ static void ath_tx_rc_status(struct ath_buf *bf, struct ath_desc *ds,
1887 struct sk_buff *skb = bf->bf_mpdu; 1919 struct sk_buff *skb = bf->bf_mpdu;
1888 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1920 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1889 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1921 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1890 struct ath_tx_info_priv *tx_info_priv = ATH_TX_INFO_PRIV(tx_info); 1922 struct ieee80211_hw *hw = bf->aphy->hw;
1891 struct ieee80211_hw *hw = tx_info_priv->aphy->hw;
1892 u8 i, tx_rateindex; 1923 u8 i, tx_rateindex;
1893 1924
1894 if (txok) 1925 if (txok)
@@ -1897,22 +1928,29 @@ static void ath_tx_rc_status(struct ath_buf *bf, struct ath_desc *ds,
1897 tx_rateindex = ds->ds_txstat.ts_rateindex; 1928 tx_rateindex = ds->ds_txstat.ts_rateindex;
1898 WARN_ON(tx_rateindex >= hw->max_rates); 1929 WARN_ON(tx_rateindex >= hw->max_rates);
1899 1930
1900 tx_info_priv->update_rc = update_rc; 1931 if (update_rc)
1932 tx_info->pad[0] |= ATH_TX_INFO_UPDATE_RC;
1901 if (ds->ds_txstat.ts_status & ATH9K_TXERR_FILT) 1933 if (ds->ds_txstat.ts_status & ATH9K_TXERR_FILT)
1902 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; 1934 tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
1903 1935
1904 if ((ds->ds_txstat.ts_status & ATH9K_TXERR_FILT) == 0 && 1936 if ((ds->ds_txstat.ts_status & ATH9K_TXERR_FILT) == 0 &&
1905 (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { 1937 (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) {
1906 if (ieee80211_is_data(hdr->frame_control)) { 1938 if (ieee80211_is_data(hdr->frame_control)) {
1907 memcpy(&tx_info_priv->tx, &ds->ds_txstat, 1939 if (ds->ds_txstat.ts_flags &
1908 sizeof(tx_info_priv->tx)); 1940 (ATH9K_TX_DATA_UNDERRUN | ATH9K_TX_DELIM_UNDERRUN))
1909 tx_info_priv->n_frames = bf->bf_nframes; 1941 tx_info->pad[0] |= ATH_TX_INFO_UNDERRUN;
1910 tx_info_priv->n_bad_frames = nbad; 1942 if ((ds->ds_txstat.ts_status & ATH9K_TXERR_XRETRY) ||
1943 (ds->ds_txstat.ts_status & ATH9K_TXERR_FIFO))
1944 tx_info->pad[0] |= ATH_TX_INFO_XRETRY;
1945 tx_info->status.ampdu_len = bf->bf_nframes;
1946 tx_info->status.ampdu_ack_len = bf->bf_nframes - nbad;
1911 } 1947 }
1912 } 1948 }
1913 1949
1914 for (i = tx_rateindex + 1; i < hw->max_rates; i++) 1950 for (i = tx_rateindex + 1; i < hw->max_rates; i++) {
1915 tx_info->status.rates[i].count = 0; 1951 tx_info->status.rates[i].count = 0;
1952 tx_info->status.rates[i].idx = -1;
1953 }
1916 1954
1917 tx_info->status.rates[tx_rateindex].count = bf->bf_retries + 1; 1955 tx_info->status.rates[tx_rateindex].count = bf->bf_retries + 1;
1918} 1956}
@@ -1926,7 +1964,7 @@ static void ath_wake_mac80211_queue(struct ath_softc *sc, struct ath_txq *txq)
1926 sc->tx.txq[txq->axq_qnum].axq_depth <= (ATH_TXBUF - 20)) { 1964 sc->tx.txq[txq->axq_qnum].axq_depth <= (ATH_TXBUF - 20)) {
1927 qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc); 1965 qnum = ath_get_mac80211_qnum(txq->axq_qnum, sc);
1928 if (qnum != -1) { 1966 if (qnum != -1) {
1929 ieee80211_wake_queue(sc->hw, qnum); 1967 ath_mac80211_start_queue(sc, qnum);
1930 txq->stopped = 0; 1968 txq->stopped = 0;
1931 } 1969 }
1932 } 1970 }
@@ -1936,21 +1974,21 @@ static void ath_wake_mac80211_queue(struct ath_softc *sc, struct ath_txq *txq)
1936static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq) 1974static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
1937{ 1975{
1938 struct ath_hw *ah = sc->sc_ah; 1976 struct ath_hw *ah = sc->sc_ah;
1977 struct ath_common *common = ath9k_hw_common(ah);
1939 struct ath_buf *bf, *lastbf, *bf_held = NULL; 1978 struct ath_buf *bf, *lastbf, *bf_held = NULL;
1940 struct list_head bf_head; 1979 struct list_head bf_head;
1941 struct ath_desc *ds; 1980 struct ath_desc *ds;
1942 int txok; 1981 int txok;
1943 int status; 1982 int status;
1944 1983
1945 DPRINTF(sc, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n", 1984 ath_print(common, ATH_DBG_QUEUE, "tx queue %d (%x), link %p\n",
1946 txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum), 1985 txq->axq_qnum, ath9k_hw_gettxbuf(sc->sc_ah, txq->axq_qnum),
1947 txq->axq_link); 1986 txq->axq_link);
1948 1987
1949 for (;;) { 1988 for (;;) {
1950 spin_lock_bh(&txq->axq_lock); 1989 spin_lock_bh(&txq->axq_lock);
1951 if (list_empty(&txq->axq_q)) { 1990 if (list_empty(&txq->axq_q)) {
1952 txq->axq_link = NULL; 1991 txq->axq_link = NULL;
1953 txq->axq_linkbuf = NULL;
1954 spin_unlock_bh(&txq->axq_lock); 1992 spin_unlock_bh(&txq->axq_lock);
1955 break; 1993 break;
1956 } 1994 }
@@ -1984,10 +2022,18 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
1984 spin_unlock_bh(&txq->axq_lock); 2022 spin_unlock_bh(&txq->axq_lock);
1985 break; 2023 break;
1986 } 2024 }
1987 if (bf->bf_desc == txq->axq_lastdsWithCTS) 2025
1988 txq->axq_lastdsWithCTS = NULL; 2026 /*
1989 if (ds == txq->axq_gatingds) 2027 * We now know the nullfunc frame has been ACKed so we
1990 txq->axq_gatingds = NULL; 2028 * can disable RX.
2029 */
2030 if (bf->bf_isnullfunc &&
2031 (ds->ds_txstat.ts_status & ATH9K_TX_ACKED)) {
2032 if ((sc->ps_flags & PS_ENABLED))
2033 ath9k_enable_ps(sc);
2034 else
2035 sc->ps_flags |= PS_NULLFUNC_COMPLETED;
2036 }
1991 2037
1992 /* 2038 /*
1993 * Remove ath_buf's of the same transmit unit from txq, 2039 * Remove ath_buf's of the same transmit unit from txq,
@@ -2001,10 +2047,7 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
2001 &txq->axq_q, lastbf->list.prev); 2047 &txq->axq_q, lastbf->list.prev);
2002 2048
2003 txq->axq_depth--; 2049 txq->axq_depth--;
2004 if (bf_isaggr(bf)) 2050 txok = !(ds->ds_txstat.ts_status & ATH9K_TXERR_MASK);
2005 txq->axq_aggr_depth--;
2006
2007 txok = (ds->ds_txstat.ts_status == 0);
2008 txq->axq_tx_inprogress = false; 2051 txq->axq_tx_inprogress = false;
2009 spin_unlock_bh(&txq->axq_lock); 2052 spin_unlock_bh(&txq->axq_lock);
2010 2053
@@ -2064,8 +2107,11 @@ static void ath_tx_complete_poll_work(struct work_struct *work)
2064 } 2107 }
2065 2108
2066 if (needreset) { 2109 if (needreset) {
2067 DPRINTF(sc, ATH_DBG_RESET, "tx hung, resetting the chip\n"); 2110 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_RESET,
2111 "tx hung, resetting the chip\n");
2112 ath9k_ps_wakeup(sc);
2068 ath_reset(sc, false); 2113 ath_reset(sc, false);
2114 ath9k_ps_restore(sc);
2069 } 2115 }
2070 2116
2071 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 2117 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work,
@@ -2093,6 +2139,7 @@ void ath_tx_tasklet(struct ath_softc *sc)
2093 2139
2094int ath_tx_init(struct ath_softc *sc, int nbufs) 2140int ath_tx_init(struct ath_softc *sc, int nbufs)
2095{ 2141{
2142 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2096 int error = 0; 2143 int error = 0;
2097 2144
2098 spin_lock_init(&sc->tx.txbuflock); 2145 spin_lock_init(&sc->tx.txbuflock);
@@ -2100,16 +2147,16 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
2100 error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf, 2147 error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf,
2101 "tx", nbufs, 1); 2148 "tx", nbufs, 1);
2102 if (error != 0) { 2149 if (error != 0) {
2103 DPRINTF(sc, ATH_DBG_FATAL, 2150 ath_print(common, ATH_DBG_FATAL,
2104 "Failed to allocate tx descriptors: %d\n", error); 2151 "Failed to allocate tx descriptors: %d\n", error);
2105 goto err; 2152 goto err;
2106 } 2153 }
2107 2154
2108 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf, 2155 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
2109 "beacon", ATH_BCBUF, 1); 2156 "beacon", ATH_BCBUF, 1);
2110 if (error != 0) { 2157 if (error != 0) {
2111 DPRINTF(sc, ATH_DBG_FATAL, 2158 ath_print(common, ATH_DBG_FATAL,
2112 "Failed to allocate beacon descriptors: %d\n", error); 2159 "Failed to allocate beacon descriptors: %d\n", error);
2113 goto err; 2160 goto err;
2114 } 2161 }
2115 2162
@@ -2192,7 +2239,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
2192 if (ATH_TXQ_SETUP(sc, i)) { 2239 if (ATH_TXQ_SETUP(sc, i)) {
2193 txq = &sc->tx.txq[i]; 2240 txq = &sc->tx.txq[i];
2194 2241
2195 spin_lock(&txq->axq_lock); 2242 spin_lock_bh(&txq->axq_lock);
2196 2243
2197 list_for_each_entry_safe(ac, 2244 list_for_each_entry_safe(ac,
2198 ac_tmp, &txq->axq_acq, list) { 2245 ac_tmp, &txq->axq_acq, list) {
@@ -2213,7 +2260,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
2213 } 2260 }
2214 } 2261 }
2215 2262
2216 spin_unlock(&txq->axq_lock); 2263 spin_unlock_bh(&txq->axq_lock);
2217 } 2264 }
2218 } 2265 }
2219} 2266}
diff --git a/drivers/net/wireless/ath/debug.c b/drivers/net/wireless/ath/debug.c
new file mode 100644
index 000000000000..53e77bd131b9
--- /dev/null
+++ b/drivers/net/wireless/ath/debug.c
@@ -0,0 +1,32 @@
1/*
2 * Copyright (c) 2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "ath.h"
18#include "debug.h"
19
20void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...)
21{
22 va_list args;
23
24 if (likely(!(common->debug_mask & dbg_mask)))
25 return;
26
27 va_start(args, fmt);
28 printk(KERN_DEBUG "ath: ");
29 vprintk(fmt, args);
30 va_end(args);
31}
32EXPORT_SYMBOL(ath_print);
diff --git a/drivers/net/wireless/ath/debug.h b/drivers/net/wireless/ath/debug.h
new file mode 100644
index 000000000000..8263633c003c
--- /dev/null
+++ b/drivers/net/wireless/ath/debug.h
@@ -0,0 +1,77 @@
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef ATH_DEBUG_H
18#define ATH_DEBUG_H
19
20#include "ath.h"
21
22/**
23 * enum ath_debug_level - atheros wireless debug level
24 *
25 * @ATH_DBG_RESET: reset processing
26 * @ATH_DBG_QUEUE: hardware queue management
27 * @ATH_DBG_EEPROM: eeprom processing
28 * @ATH_DBG_CALIBRATE: periodic calibration
29 * @ATH_DBG_INTERRUPT: interrupt processing
30 * @ATH_DBG_REGULATORY: regulatory processing
31 * @ATH_DBG_ANI: adaptive noise immunitive processing
32 * @ATH_DBG_XMIT: basic xmit operation
33 * @ATH_DBG_BEACON: beacon handling
34 * @ATH_DBG_CONFIG: configuration of the hardware
35 * @ATH_DBG_FATAL: fatal errors, this is the default, DBG_DEFAULT
36 * @ATH_DBG_PS: power save processing
37 * @ATH_DBG_HWTIMER: hardware timer handling
38 * @ATH_DBG_BTCOEX: bluetooth coexistance
39 * @ATH_DBG_ANY: enable all debugging
40 *
41 * The debug level is used to control the amount and type of debugging output
42 * we want to see. Each driver has its own method for enabling debugging and
43 * modifying debug level states -- but this is typically done through a
44 * module parameter 'debug' along with a respective 'debug' debugfs file
45 * entry.
46 */
47enum ATH_DEBUG {
48 ATH_DBG_RESET = 0x00000001,
49 ATH_DBG_QUEUE = 0x00000002,
50 ATH_DBG_EEPROM = 0x00000004,
51 ATH_DBG_CALIBRATE = 0x00000008,
52 ATH_DBG_INTERRUPT = 0x00000010,
53 ATH_DBG_REGULATORY = 0x00000020,
54 ATH_DBG_ANI = 0x00000040,
55 ATH_DBG_XMIT = 0x00000080,
56 ATH_DBG_BEACON = 0x00000100,
57 ATH_DBG_CONFIG = 0x00000200,
58 ATH_DBG_FATAL = 0x00000400,
59 ATH_DBG_PS = 0x00000800,
60 ATH_DBG_HWTIMER = 0x00001000,
61 ATH_DBG_BTCOEX = 0x00002000,
62 ATH_DBG_ANY = 0xffffffff
63};
64
65#define ATH_DBG_DEFAULT (ATH_DBG_FATAL)
66
67#ifdef CONFIG_ATH_DEBUG
68void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...)
69 __attribute__ ((format (printf, 3, 4)));
70#else
71static inline void __attribute__ ((format (printf, 3, 4)))
72ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...)
73{
74}
75#endif /* CONFIG_ATH_DEBUG */
76
77#endif /* ATH_DEBUG_H */
diff --git a/drivers/net/wireless/ath/hw.c b/drivers/net/wireless/ath/hw.c
new file mode 100644
index 000000000000..ecc9eb01f4fa
--- /dev/null
+++ b/drivers/net/wireless/ath/hw.c
@@ -0,0 +1,126 @@
1/*
2 * Copyright (c) 2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include <asm/unaligned.h>
18
19#include "ath.h"
20#include "reg.h"
21
22#define REG_READ common->ops->read
23#define REG_WRITE common->ops->write
24
25/**
26 * ath_hw_set_bssid_mask - filter out bssids we listen
27 *
28 * @common: the ath_common struct for the device.
29 *
30 * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
31 * which bits of the interface's MAC address should be looked at when trying
32 * to decide which packets to ACK. In station mode and AP mode with a single
33 * BSS every bit matters since we lock to only one BSS. In AP mode with
34 * multiple BSSes (virtual interfaces) not every bit matters because hw must
35 * accept frames for all BSSes and so we tweak some bits of our mac address
36 * in order to have multiple BSSes.
37 *
38 * NOTE: This is a simple filter and does *not* filter out all
39 * relevant frames. Some frames that are not for us might get ACKed from us
40 * by PCU because they just match the mask.
41 *
42 * When handling multiple BSSes you can get the BSSID mask by computing the
43 * set of ~ ( MAC XOR BSSID ) for all bssids we handle.
44 *
45 * When you do this you are essentially computing the common bits of all your
46 * BSSes. Later it is assumed the harware will "and" (&) the BSSID mask with
47 * the MAC address to obtain the relevant bits and compare the result with
48 * (frame's BSSID & mask) to see if they match.
49 *
50 * Simple example: on your card you have have two BSSes you have created with
51 * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
52 * There is another BSSID-03 but you are not part of it. For simplicity's sake,
53 * assuming only 4 bits for a mac address and for BSSIDs you can then have:
54 *
55 * \
56 * MAC: 0001 |
57 * BSSID-01: 0100 | --> Belongs to us
58 * BSSID-02: 1001 |
59 * /
60 * -------------------
61 * BSSID-03: 0110 | --> External
62 * -------------------
63 *
64 * Our bssid_mask would then be:
65 *
66 * On loop iteration for BSSID-01:
67 * ~(0001 ^ 0100) -> ~(0101)
68 * -> 1010
69 * bssid_mask = 1010
70 *
71 * On loop iteration for BSSID-02:
72 * bssid_mask &= ~(0001 ^ 1001)
73 * bssid_mask = (1010) & ~(0001 ^ 1001)
74 * bssid_mask = (1010) & ~(1001)
75 * bssid_mask = (1010) & (0110)
76 * bssid_mask = 0010
77 *
78 * A bssid_mask of 0010 means "only pay attention to the second least
79 * significant bit". This is because its the only bit common
80 * amongst the MAC and all BSSIDs we support. To findout what the real
81 * common bit is we can simply "&" the bssid_mask now with any BSSID we have
82 * or our MAC address (we assume the hardware uses the MAC address).
83 *
84 * Now, suppose there's an incoming frame for BSSID-03:
85 *
86 * IFRAME-01: 0110
87 *
88 * An easy eye-inspeciton of this already should tell you that this frame
89 * will not pass our check. This is beacuse the bssid_mask tells the
90 * hardware to only look at the second least significant bit and the
91 * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
92 * as 1, which does not match 0.
93 *
94 * So with IFRAME-01 we *assume* the hardware will do:
95 *
96 * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
97 * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
98 * --> allow = (0010) == 0000 ? 1 : 0;
99 * --> allow = 0
100 *
101 * Lets now test a frame that should work:
102 *
103 * IFRAME-02: 0001 (we should allow)
104 *
105 * allow = (0001 & 1010) == 1010
106 *
107 * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
108 * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
109 * --> allow = (0010) == (0010)
110 * --> allow = 1
111 *
112 * Other examples:
113 *
114 * IFRAME-03: 0100 --> allowed
115 * IFRAME-04: 1001 --> allowed
116 * IFRAME-05: 1101 --> allowed but its not for us!!!
117 *
118 */
119void ath_hw_setbssidmask(struct ath_common *common)
120{
121 void *ah = common->ah;
122
123 REG_WRITE(ah, get_unaligned_le32(common->bssidmask), AR_BSSMSKL);
124 REG_WRITE(ah, get_unaligned_le16(common->bssidmask + 4), AR_BSSMSKU);
125}
126EXPORT_SYMBOL(ath_hw_setbssidmask);
diff --git a/drivers/net/wireless/ath/reg.h b/drivers/net/wireless/ath/reg.h
new file mode 100644
index 000000000000..dfe1fbec24f5
--- /dev/null
+++ b/drivers/net/wireless/ath/reg.h
@@ -0,0 +1,27 @@
1/*
2 * Copyright (c) 2008-2009 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef ATH_REGISTERS_H
18#define ATH_REGISTERS_H
19
20/*
21 * BSSID mask registers. See ath_hw_set_bssid_mask()
22 * for detailed documentation about these registers.
23 */
24#define AR_BSSMSKL 0x80e0
25#define AR_BSSMSKU 0x80e4
26
27#endif /* ATH_REGISTERS_H */
diff --git a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c
index 077bcc142cde..00489c40be0c 100644
--- a/drivers/net/wireless/ath/regd.c
+++ b/drivers/net/wireless/ath/regd.c
@@ -15,7 +15,6 @@
15 */ 15 */
16 16
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/slab.h>
19#include <net/cfg80211.h> 18#include <net/cfg80211.h>
20#include <net/mac80211.h> 19#include <net/mac80211.h>
21#include "regd.h" 20#include "regd.h"
@@ -110,8 +109,9 @@ static const struct ieee80211_regdomain ath_world_regdom_67_68_6A = {
110 109
111static inline bool is_wwr_sku(u16 regd) 110static inline bool is_wwr_sku(u16 regd)
112{ 111{
113 return ((regd & WORLD_SKU_MASK) == WORLD_SKU_PREFIX) || 112 return ((regd & COUNTRY_ERD_FLAG) != COUNTRY_ERD_FLAG) &&
114 (regd == WORLD); 113 (((regd & WORLD_SKU_MASK) == WORLD_SKU_PREFIX) ||
114 (regd == WORLD));
115} 115}
116 116
117static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg) 117static u16 ath_regd_get_eepromRD(struct ath_regulatory *reg)
@@ -450,7 +450,7 @@ ath_regd_init_wiphy(struct ath_regulatory *reg,
450 const struct ieee80211_regdomain *regd; 450 const struct ieee80211_regdomain *regd;
451 451
452 wiphy->reg_notifier = reg_notifier; 452 wiphy->reg_notifier = reg_notifier;
453 wiphy->strict_regulatory = true; 453 wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY;
454 454
455 if (ath_is_world_regd(reg)) { 455 if (ath_is_world_regd(reg)) {
456 /* 456 /*
@@ -458,8 +458,7 @@ ath_regd_init_wiphy(struct ath_regulatory *reg,
458 * saved on the wiphy orig_* parameters 458 * saved on the wiphy orig_* parameters
459 */ 459 */
460 regd = ath_world_regdomain(reg); 460 regd = ath_world_regdomain(reg);
461 wiphy->custom_regulatory = true; 461 wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
462 wiphy->strict_regulatory = false;
463 } else { 462 } else {
464 /* 463 /*
465 * This gets applied in the case of the absense of CRDA, 464 * This gets applied in the case of the absense of CRDA,
diff --git a/drivers/net/wireless/ath/regd.h b/drivers/net/wireless/ath/regd.h
index c1dd857697a7..a1c39526161a 100644
--- a/drivers/net/wireless/ath/regd.h
+++ b/drivers/net/wireless/ath/regd.h
@@ -65,10 +65,13 @@ enum CountryCode {
65 CTRY_ALGERIA = 12, 65 CTRY_ALGERIA = 12,
66 CTRY_ARGENTINA = 32, 66 CTRY_ARGENTINA = 32,
67 CTRY_ARMENIA = 51, 67 CTRY_ARMENIA = 51,
68 CTRY_ARUBA = 533,
68 CTRY_AUSTRALIA = 36, 69 CTRY_AUSTRALIA = 36,
69 CTRY_AUSTRIA = 40, 70 CTRY_AUSTRIA = 40,
70 CTRY_AZERBAIJAN = 31, 71 CTRY_AZERBAIJAN = 31,
71 CTRY_BAHRAIN = 48, 72 CTRY_BAHRAIN = 48,
73 CTRY_BANGLADESH = 50,
74 CTRY_BARBADOS = 52,
72 CTRY_BELARUS = 112, 75 CTRY_BELARUS = 112,
73 CTRY_BELGIUM = 56, 76 CTRY_BELGIUM = 56,
74 CTRY_BELIZE = 84, 77 CTRY_BELIZE = 84,
@@ -77,6 +80,7 @@ enum CountryCode {
77 CTRY_BRAZIL = 76, 80 CTRY_BRAZIL = 76,
78 CTRY_BRUNEI_DARUSSALAM = 96, 81 CTRY_BRUNEI_DARUSSALAM = 96,
79 CTRY_BULGARIA = 100, 82 CTRY_BULGARIA = 100,
83 CTRY_CAMBODIA = 116,
80 CTRY_CANADA = 124, 84 CTRY_CANADA = 124,
81 CTRY_CHILE = 152, 85 CTRY_CHILE = 152,
82 CTRY_CHINA = 156, 86 CTRY_CHINA = 156,
@@ -97,7 +101,11 @@ enum CountryCode {
97 CTRY_GEORGIA = 268, 101 CTRY_GEORGIA = 268,
98 CTRY_GERMANY = 276, 102 CTRY_GERMANY = 276,
99 CTRY_GREECE = 300, 103 CTRY_GREECE = 300,
104 CTRY_GREENLAND = 304,
105 CTRY_GRENEDA = 308,
106 CTRY_GUAM = 316,
100 CTRY_GUATEMALA = 320, 107 CTRY_GUATEMALA = 320,
108 CTRY_HAITI = 332,
101 CTRY_HONDURAS = 340, 109 CTRY_HONDURAS = 340,
102 CTRY_HONG_KONG = 344, 110 CTRY_HONG_KONG = 344,
103 CTRY_HUNGARY = 348, 111 CTRY_HUNGARY = 348,
diff --git a/drivers/net/wireless/ath/regd_common.h b/drivers/net/wireless/ath/regd_common.h
index 9847af72208c..248c670fdfbe 100644
--- a/drivers/net/wireless/ath/regd_common.h
+++ b/drivers/net/wireless/ath/regd_common.h
@@ -288,13 +288,16 @@ static struct country_code_to_enum_rd allCountries[] = {
288 {CTRY_DEFAULT, FCC1_FCCA, "CO"}, 288 {CTRY_DEFAULT, FCC1_FCCA, "CO"},
289 {CTRY_ALBANIA, NULL1_WORLD, "AL"}, 289 {CTRY_ALBANIA, NULL1_WORLD, "AL"},
290 {CTRY_ALGERIA, NULL1_WORLD, "DZ"}, 290 {CTRY_ALGERIA, NULL1_WORLD, "DZ"},
291 {CTRY_ARGENTINA, APL3_WORLD, "AR"}, 291 {CTRY_ARGENTINA, FCC3_WORLD, "AR"},
292 {CTRY_ARMENIA, ETSI4_WORLD, "AM"}, 292 {CTRY_ARMENIA, ETSI4_WORLD, "AM"},
293 {CTRY_ARUBA, ETSI1_WORLD, "AW"},
293 {CTRY_AUSTRALIA, FCC2_WORLD, "AU"}, 294 {CTRY_AUSTRALIA, FCC2_WORLD, "AU"},
294 {CTRY_AUSTRALIA2, FCC6_WORLD, "AU"}, 295 {CTRY_AUSTRALIA2, FCC6_WORLD, "AU"},
295 {CTRY_AUSTRIA, ETSI1_WORLD, "AT"}, 296 {CTRY_AUSTRIA, ETSI1_WORLD, "AT"},
296 {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ"}, 297 {CTRY_AZERBAIJAN, ETSI4_WORLD, "AZ"},
297 {CTRY_BAHRAIN, APL6_WORLD, "BH"}, 298 {CTRY_BAHRAIN, APL6_WORLD, "BH"},
299 {CTRY_BANGLADESH, NULL1_WORLD, "BD"},
300 {CTRY_BARBADOS, FCC2_WORLD, "BB"},
298 {CTRY_BELARUS, ETSI1_WORLD, "BY"}, 301 {CTRY_BELARUS, ETSI1_WORLD, "BY"},
299 {CTRY_BELGIUM, ETSI1_WORLD, "BE"}, 302 {CTRY_BELGIUM, ETSI1_WORLD, "BE"},
300 {CTRY_BELGIUM2, ETSI4_WORLD, "BL"}, 303 {CTRY_BELGIUM2, ETSI4_WORLD, "BL"},
@@ -304,13 +307,14 @@ static struct country_code_to_enum_rd allCountries[] = {
304 {CTRY_BRAZIL, FCC3_WORLD, "BR"}, 307 {CTRY_BRAZIL, FCC3_WORLD, "BR"},
305 {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN"}, 308 {CTRY_BRUNEI_DARUSSALAM, APL1_WORLD, "BN"},
306 {CTRY_BULGARIA, ETSI6_WORLD, "BG"}, 309 {CTRY_BULGARIA, ETSI6_WORLD, "BG"},
307 {CTRY_CANADA, FCC2_FCCA, "CA"}, 310 {CTRY_CAMBODIA, ETSI1_WORLD, "KH"},
311 {CTRY_CANADA, FCC3_FCCA, "CA"},
308 {CTRY_CANADA2, FCC6_FCCA, "CA"}, 312 {CTRY_CANADA2, FCC6_FCCA, "CA"},
309 {CTRY_CHILE, APL6_WORLD, "CL"}, 313 {CTRY_CHILE, APL6_WORLD, "CL"},
310 {CTRY_CHINA, APL1_WORLD, "CN"}, 314 {CTRY_CHINA, APL1_WORLD, "CN"},
311 {CTRY_COLOMBIA, FCC1_FCCA, "CO"}, 315 {CTRY_COLOMBIA, FCC1_FCCA, "CO"},
312 {CTRY_COSTA_RICA, FCC1_WORLD, "CR"}, 316 {CTRY_COSTA_RICA, FCC1_WORLD, "CR"},
313 {CTRY_CROATIA, ETSI3_WORLD, "HR"}, 317 {CTRY_CROATIA, ETSI1_WORLD, "HR"},
314 {CTRY_CYPRUS, ETSI1_WORLD, "CY"}, 318 {CTRY_CYPRUS, ETSI1_WORLD, "CY"},
315 {CTRY_CZECH, ETSI3_WORLD, "CZ"}, 319 {CTRY_CZECH, ETSI3_WORLD, "CZ"},
316 {CTRY_DENMARK, ETSI1_WORLD, "DK"}, 320 {CTRY_DENMARK, ETSI1_WORLD, "DK"},
@@ -324,18 +328,22 @@ static struct country_code_to_enum_rd allCountries[] = {
324 {CTRY_GEORGIA, ETSI4_WORLD, "GE"}, 328 {CTRY_GEORGIA, ETSI4_WORLD, "GE"},
325 {CTRY_GERMANY, ETSI1_WORLD, "DE"}, 329 {CTRY_GERMANY, ETSI1_WORLD, "DE"},
326 {CTRY_GREECE, ETSI1_WORLD, "GR"}, 330 {CTRY_GREECE, ETSI1_WORLD, "GR"},
331 {CTRY_GREENLAND, ETSI1_WORLD, "GL"},
332 {CTRY_GRENEDA, FCC3_FCCA, "GD"},
333 {CTRY_GUAM, FCC1_FCCA, "GU"},
327 {CTRY_GUATEMALA, FCC1_FCCA, "GT"}, 334 {CTRY_GUATEMALA, FCC1_FCCA, "GT"},
335 {CTRY_HAITI, ETSI1_WORLD, "HT"},
328 {CTRY_HONDURAS, NULL1_WORLD, "HN"}, 336 {CTRY_HONDURAS, NULL1_WORLD, "HN"},
329 {CTRY_HONG_KONG, FCC2_WORLD, "HK"}, 337 {CTRY_HONG_KONG, FCC3_WORLD, "HK"},
330 {CTRY_HUNGARY, ETSI1_WORLD, "HU"}, 338 {CTRY_HUNGARY, ETSI1_WORLD, "HU"},
331 {CTRY_ICELAND, ETSI1_WORLD, "IS"}, 339 {CTRY_ICELAND, ETSI1_WORLD, "IS"},
332 {CTRY_INDIA, APL6_WORLD, "IN"}, 340 {CTRY_INDIA, APL6_WORLD, "IN"},
333 {CTRY_INDONESIA, APL1_WORLD, "ID"}, 341 {CTRY_INDONESIA, NULL1_WORLD, "ID"},
334 {CTRY_IRAN, APL1_WORLD, "IR"}, 342 {CTRY_IRAN, APL1_WORLD, "IR"},
335 {CTRY_IRELAND, ETSI1_WORLD, "IE"}, 343 {CTRY_IRELAND, ETSI1_WORLD, "IE"},
336 {CTRY_ISRAEL, NULL1_WORLD, "IL"}, 344 {CTRY_ISRAEL, NULL1_WORLD, "IL"},
337 {CTRY_ITALY, ETSI1_WORLD, "IT"}, 345 {CTRY_ITALY, ETSI1_WORLD, "IT"},
338 {CTRY_JAMAICA, ETSI1_WORLD, "JM"}, 346 {CTRY_JAMAICA, FCC3_WORLD, "JM"},
339 347
340 {CTRY_JAPAN, MKK1_MKKA, "JP"}, 348 {CTRY_JAPAN, MKK1_MKKA, "JP"},
341 {CTRY_JAPAN1, MKK1_MKKB, "JP"}, 349 {CTRY_JAPAN1, MKK1_MKKB, "JP"},
@@ -402,7 +410,7 @@ static struct country_code_to_enum_rd allCountries[] = {
402 {CTRY_KOREA_ROC, APL9_WORLD, "KR"}, 410 {CTRY_KOREA_ROC, APL9_WORLD, "KR"},
403 {CTRY_KOREA_ROC2, APL2_WORLD, "K2"}, 411 {CTRY_KOREA_ROC2, APL2_WORLD, "K2"},
404 {CTRY_KOREA_ROC3, APL9_WORLD, "K3"}, 412 {CTRY_KOREA_ROC3, APL9_WORLD, "K3"},
405 {CTRY_KUWAIT, NULL1_WORLD, "KW"}, 413 {CTRY_KUWAIT, ETSI3_WORLD, "KW"},
406 {CTRY_LATVIA, ETSI1_WORLD, "LV"}, 414 {CTRY_LATVIA, ETSI1_WORLD, "LV"},
407 {CTRY_LEBANON, NULL1_WORLD, "LB"}, 415 {CTRY_LEBANON, NULL1_WORLD, "LB"},
408 {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI"}, 416 {CTRY_LIECHTENSTEIN, ETSI1_WORLD, "LI"},
@@ -414,13 +422,13 @@ static struct country_code_to_enum_rd allCountries[] = {
414 {CTRY_MALTA, ETSI1_WORLD, "MT"}, 422 {CTRY_MALTA, ETSI1_WORLD, "MT"},
415 {CTRY_MEXICO, FCC1_FCCA, "MX"}, 423 {CTRY_MEXICO, FCC1_FCCA, "MX"},
416 {CTRY_MONACO, ETSI4_WORLD, "MC"}, 424 {CTRY_MONACO, ETSI4_WORLD, "MC"},
417 {CTRY_MOROCCO, NULL1_WORLD, "MA"}, 425 {CTRY_MOROCCO, APL4_WORLD, "MA"},
418 {CTRY_NEPAL, APL1_WORLD, "NP"}, 426 {CTRY_NEPAL, APL1_WORLD, "NP"},
419 {CTRY_NETHERLANDS, ETSI1_WORLD, "NL"}, 427 {CTRY_NETHERLANDS, ETSI1_WORLD, "NL"},
420 {CTRY_NETHERLANDS_ANTILLES, ETSI1_WORLD, "AN"}, 428 {CTRY_NETHERLANDS_ANTILLES, ETSI1_WORLD, "AN"},
421 {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ"}, 429 {CTRY_NEW_ZEALAND, FCC2_ETSIC, "NZ"},
422 {CTRY_NORWAY, ETSI1_WORLD, "NO"}, 430 {CTRY_NORWAY, ETSI1_WORLD, "NO"},
423 {CTRY_OMAN, APL6_WORLD, "OM"}, 431 {CTRY_OMAN, FCC3_WORLD, "OM"},
424 {CTRY_PAKISTAN, NULL1_WORLD, "PK"}, 432 {CTRY_PAKISTAN, NULL1_WORLD, "PK"},
425 {CTRY_PANAMA, FCC1_FCCA, "PA"}, 433 {CTRY_PANAMA, FCC1_FCCA, "PA"},
426 {CTRY_PAPUA_NEW_GUINEA, FCC1_WORLD, "PG"}, 434 {CTRY_PAPUA_NEW_GUINEA, FCC1_WORLD, "PG"},
@@ -429,7 +437,7 @@ static struct country_code_to_enum_rd allCountries[] = {
429 {CTRY_POLAND, ETSI1_WORLD, "PL"}, 437 {CTRY_POLAND, ETSI1_WORLD, "PL"},
430 {CTRY_PORTUGAL, ETSI1_WORLD, "PT"}, 438 {CTRY_PORTUGAL, ETSI1_WORLD, "PT"},
431 {CTRY_PUERTO_RICO, FCC1_FCCA, "PR"}, 439 {CTRY_PUERTO_RICO, FCC1_FCCA, "PR"},
432 {CTRY_QATAR, NULL1_WORLD, "QA"}, 440 {CTRY_QATAR, APL1_WORLD, "QA"},
433 {CTRY_ROMANIA, NULL1_WORLD, "RO"}, 441 {CTRY_ROMANIA, NULL1_WORLD, "RO"},
434 {CTRY_RUSSIA, NULL1_WORLD, "RU"}, 442 {CTRY_RUSSIA, NULL1_WORLD, "RU"},
435 {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA"}, 443 {CTRY_SAUDI_ARABIA, NULL1_WORLD, "SA"},
@@ -445,7 +453,7 @@ static struct country_code_to_enum_rd allCountries[] = {
445 {CTRY_SYRIA, NULL1_WORLD, "SY"}, 453 {CTRY_SYRIA, NULL1_WORLD, "SY"},
446 {CTRY_TAIWAN, APL3_FCCA, "TW"}, 454 {CTRY_TAIWAN, APL3_FCCA, "TW"},
447 {CTRY_THAILAND, FCC3_WORLD, "TH"}, 455 {CTRY_THAILAND, FCC3_WORLD, "TH"},
448 {CTRY_TRINIDAD_Y_TOBAGO, ETSI4_WORLD, "TT"}, 456 {CTRY_TRINIDAD_Y_TOBAGO, FCC3_WORLD, "TT"},
449 {CTRY_TUNISIA, ETSI3_WORLD, "TN"}, 457 {CTRY_TUNISIA, ETSI3_WORLD, "TN"},
450 {CTRY_TURKEY, ETSI3_WORLD, "TR"}, 458 {CTRY_TURKEY, ETSI3_WORLD, "TR"},
451 {CTRY_UKRAINE, NULL1_WORLD, "UA"}, 459 {CTRY_UKRAINE, NULL1_WORLD, "UA"},
@@ -456,7 +464,7 @@ static struct country_code_to_enum_rd allCountries[] = {
456 * would need to assign new special alpha2 to CRDA db as with the world 464 * would need to assign new special alpha2 to CRDA db as with the world
457 * regdomain and use another alpha2 */ 465 * regdomain and use another alpha2 */
458 {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS"}, 466 {CTRY_UNITED_STATES_FCC49, FCC4_FCCA, "PS"},
459 {CTRY_URUGUAY, APL2_WORLD, "UY"}, 467 {CTRY_URUGUAY, FCC3_WORLD, "UY"},
460 {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ"}, 468 {CTRY_UZBEKISTAN, FCC3_FCCA, "UZ"},
461 {CTRY_VENEZUELA, APL2_ETSIC, "VE"}, 469 {CTRY_VENEZUELA, APL2_ETSIC, "VE"},
462 {CTRY_VIET_NAM, NULL1_WORLD, "VN"}, 470 {CTRY_VIET_NAM, NULL1_WORLD, "VN"},
diff --git a/drivers/net/wireless/atmel.c b/drivers/net/wireless/atmel.c
index cce188837d10..3edbbcf0f548 100644
--- a/drivers/net/wireless/atmel.c
+++ b/drivers/net/wireless/atmel.c
@@ -99,6 +99,22 @@ static struct {
99 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" }, 99 { ATMEL_FW_TYPE_506, "atmel_at76c506", "bin" },
100 { ATMEL_FW_TYPE_NONE, NULL, NULL } 100 { ATMEL_FW_TYPE_NONE, NULL, NULL }
101}; 101};
102MODULE_FIRMWARE("atmel_at76c502-wpa.bin");
103MODULE_FIRMWARE("atmel_at76c502.bin");
104MODULE_FIRMWARE("atmel_at76c502d-wpa.bin");
105MODULE_FIRMWARE("atmel_at76c502d.bin");
106MODULE_FIRMWARE("atmel_at76c502e-wpa.bin");
107MODULE_FIRMWARE("atmel_at76c502e.bin");
108MODULE_FIRMWARE("atmel_at76c502_3com-wpa.bin");
109MODULE_FIRMWARE("atmel_at76c502_3com.bin");
110MODULE_FIRMWARE("atmel_at76c504-wpa.bin");
111MODULE_FIRMWARE("atmel_at76c504.bin");
112MODULE_FIRMWARE("atmel_at76c504_2958-wpa.bin");
113MODULE_FIRMWARE("atmel_at76c504_2958.bin");
114MODULE_FIRMWARE("atmel_at76c504a_2958-wpa.bin");
115MODULE_FIRMWARE("atmel_at76c504a_2958.bin");
116MODULE_FIRMWARE("atmel_at76c506-wpa.bin");
117MODULE_FIRMWARE("atmel_at76c506.bin");
102 118
103#define MAX_SSID_LENGTH 32 119#define MAX_SSID_LENGTH 32
104#define MGMT_JIFFIES (256 * HZ / 100) 120#define MGMT_JIFFIES (256 * HZ / 100)
diff --git a/drivers/net/wireless/atmel_cs.c b/drivers/net/wireless/atmel_cs.c
index ddaa859c3491..32407911842f 100644
--- a/drivers/net/wireless/atmel_cs.c
+++ b/drivers/net/wireless/atmel_cs.c
@@ -55,22 +55,6 @@
55 55
56#include "atmel.h" 56#include "atmel.h"
57 57
58/*
59 All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
60 you do not define PCMCIA_DEBUG at all, all the debug code will be
61 left out. If you compile with PCMCIA_DEBUG=0, the debug code will
62 be present but disabled -- but it can then be enabled for specific
63 modules at load time with a 'pc_debug=#' option to insmod.
64*/
65
66#ifdef PCMCIA_DEBUG
67static int pc_debug = PCMCIA_DEBUG;
68module_param(pc_debug, int, 0);
69static char *version = "$Revision: 1.2 $";
70#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args);
71#else
72#define DEBUG(n, args...)
73#endif
74 58
75/*====================================================================*/ 59/*====================================================================*/
76 60
@@ -155,11 +139,10 @@ static int atmel_probe(struct pcmcia_device *p_dev)
155{ 139{
156 local_info_t *local; 140 local_info_t *local;
157 141
158 DEBUG(0, "atmel_attach()\n"); 142 dev_dbg(&p_dev->dev, "atmel_attach()\n");
159 143
160 /* Interrupt setup */ 144 /* Interrupt setup */
161 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; 145 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
162 p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
163 p_dev->irq.Handler = NULL; 146 p_dev->irq.Handler = NULL;
164 147
165 /* 148 /*
@@ -194,7 +177,7 @@ static int atmel_probe(struct pcmcia_device *p_dev)
194 177
195static void atmel_detach(struct pcmcia_device *link) 178static void atmel_detach(struct pcmcia_device *link)
196{ 179{
197 DEBUG(0, "atmel_detach(0x%p)\n", link); 180 dev_dbg(&link->dev, "atmel_detach\n");
198 181
199 atmel_release(link); 182 atmel_release(link);
200 183
@@ -209,9 +192,6 @@ static void atmel_detach(struct pcmcia_device *link)
209 192
210 ======================================================================*/ 193 ======================================================================*/
211 194
212#define CS_CHECK(fn, ret) \
213do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
214
215/* Call-back function to interrogate PCMCIA-specific information 195/* Call-back function to interrogate PCMCIA-specific information
216 about the current existance of the card */ 196 about the current existance of the card */
217static int card_present(void *arg) 197static int card_present(void *arg)
@@ -275,13 +255,13 @@ static int atmel_config_check(struct pcmcia_device *p_dev,
275static int atmel_config(struct pcmcia_device *link) 255static int atmel_config(struct pcmcia_device *link)
276{ 256{
277 local_info_t *dev; 257 local_info_t *dev;
278 int last_fn, last_ret; 258 int ret;
279 struct pcmcia_device_id *did; 259 struct pcmcia_device_id *did;
280 260
281 dev = link->priv; 261 dev = link->priv;
282 did = dev_get_drvdata(&handle_to_dev(link)); 262 did = dev_get_drvdata(&link->dev);
283 263
284 DEBUG(0, "atmel_config(0x%p)\n", link); 264 dev_dbg(&link->dev, "atmel_config\n");
285 265
286 /* 266 /*
287 In this loop, we scan the CIS for configuration table entries, 267 In this loop, we scan the CIS for configuration table entries,
@@ -303,31 +283,36 @@ static int atmel_config(struct pcmcia_device *link)
303 handler to the interrupt, unless the 'Handler' member of the 283 handler to the interrupt, unless the 'Handler' member of the
304 irq structure is initialized. 284 irq structure is initialized.
305 */ 285 */
306 if (link->conf.Attributes & CONF_ENABLE_IRQ) 286 if (link->conf.Attributes & CONF_ENABLE_IRQ) {
307 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); 287 ret = pcmcia_request_irq(link, &link->irq);
288 if (ret)
289 goto failed;
290 }
308 291
309 /* 292 /*
310 This actually configures the PCMCIA socket -- setting up 293 This actually configures the PCMCIA socket -- setting up
311 the I/O windows and the interrupt mapping, and putting the 294 the I/O windows and the interrupt mapping, and putting the
312 card and host interface into "Memory and IO" mode. 295 card and host interface into "Memory and IO" mode.
313 */ 296 */
314 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); 297 ret = pcmcia_request_configuration(link, &link->conf);
298 if (ret)
299 goto failed;
315 300
316 if (link->irq.AssignedIRQ == 0) { 301 if (link->irq.AssignedIRQ == 0) {
317 printk(KERN_ALERT 302 printk(KERN_ALERT
318 "atmel: cannot assign IRQ: check that CONFIG_ISA is set in kernel config."); 303 "atmel: cannot assign IRQ: check that CONFIG_ISA is set in kernel config.");
319 goto cs_failed; 304 goto failed;
320 } 305 }
321 306
322 ((local_info_t*)link->priv)->eth_dev = 307 ((local_info_t*)link->priv)->eth_dev =
323 init_atmel_card(link->irq.AssignedIRQ, 308 init_atmel_card(link->irq.AssignedIRQ,
324 link->io.BasePort1, 309 link->io.BasePort1,
325 did ? did->driver_info : ATMEL_FW_TYPE_NONE, 310 did ? did->driver_info : ATMEL_FW_TYPE_NONE,
326 &handle_to_dev(link), 311 &link->dev,
327 card_present, 312 card_present,
328 link); 313 link);
329 if (!((local_info_t*)link->priv)->eth_dev) 314 if (!((local_info_t*)link->priv)->eth_dev)
330 goto cs_failed; 315 goto failed;
331 316
332 317
333 /* 318 /*
@@ -340,8 +325,6 @@ static int atmel_config(struct pcmcia_device *link)
340 325
341 return 0; 326 return 0;
342 327
343 cs_failed:
344 cs_error(link, last_fn, last_ret);
345 failed: 328 failed:
346 atmel_release(link); 329 atmel_release(link);
347 return -ENODEV; 330 return -ENODEV;
@@ -359,7 +342,7 @@ static void atmel_release(struct pcmcia_device *link)
359{ 342{
360 struct net_device *dev = ((local_info_t*)link->priv)->eth_dev; 343 struct net_device *dev = ((local_info_t*)link->priv)->eth_dev;
361 344
362 DEBUG(0, "atmel_release(0x%p)\n", link); 345 dev_dbg(&link->dev, "atmel_release\n");
363 346
364 if (dev) 347 if (dev)
365 stop_atmel_card(dev); 348 stop_atmel_card(dev);
diff --git a/drivers/net/wireless/atmel_pci.c b/drivers/net/wireless/atmel_pci.c
index 92f87fbe750f..9ab1192004c0 100644
--- a/drivers/net/wireless/atmel_pci.c
+++ b/drivers/net/wireless/atmel_pci.c
@@ -31,7 +31,7 @@ MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.")
31MODULE_LICENSE("GPL"); 31MODULE_LICENSE("GPL");
32MODULE_SUPPORTED_DEVICE("Atmel at76c506 PCI wireless cards"); 32MODULE_SUPPORTED_DEVICE("Atmel at76c506 PCI wireless cards");
33 33
34static struct pci_device_id card_ids[] = { 34static DEFINE_PCI_DEVICE_TABLE(card_ids) = {
35 { 0x1114, 0x0506, PCI_ANY_ID, PCI_ANY_ID }, 35 { 0x1114, 0x0506, PCI_ANY_ID, PCI_ANY_ID },
36 { 0, } 36 { 0, }
37}; 37};
diff --git a/drivers/net/wireless/b43/Kconfig b/drivers/net/wireless/b43/Kconfig
index 54ea61c15d8b..0a00d42642cd 100644
--- a/drivers/net/wireless/b43/Kconfig
+++ b/drivers/net/wireless/b43/Kconfig
@@ -1,6 +1,6 @@
1config B43 1config B43
2 tristate "Broadcom 43xx wireless support (mac80211 stack)" 2 tristate "Broadcom 43xx wireless support (mac80211 stack)"
3 depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA 3 depends on SSB_POSSIBLE && MAC80211 && HAS_DMA
4 select SSB 4 select SSB
5 select FW_LOADER 5 select FW_LOADER
6 ---help--- 6 ---help---
@@ -78,11 +78,11 @@ config B43_SDIO
78 78
79 If unsure, say N. 79 If unsure, say N.
80 80
81# Data transfers to the device via PIO 81#Data transfers to the device via PIO. We want it as a fallback even
82# This is only needed on PCMCIA and SDIO devices. All others can do DMA properly. 82# if we can do DMA.
83config B43_PIO 83config B43_PIO
84 bool 84 bool
85 depends on B43 && (B43_SDIO || B43_PCMCIA || B43_FORCE_PIO) 85 depends on B43
86 select SSB_BLOCKIO 86 select SSB_BLOCKIO
87 default y 87 default y
88 88
diff --git a/drivers/net/wireless/b43/Makefile b/drivers/net/wireless/b43/Makefile
index 84772a2542dc..5e83b6f0a3a0 100644
--- a/drivers/net/wireless/b43/Makefile
+++ b/drivers/net/wireless/b43/Makefile
@@ -12,7 +12,7 @@ b43-y += xmit.o
12b43-y += lo.o 12b43-y += lo.o
13b43-y += wa.o 13b43-y += wa.o
14b43-y += dma.o 14b43-y += dma.o
15b43-$(CONFIG_B43_PIO) += pio.o 15b43-y += pio.o
16b43-y += rfkill.o 16b43-y += rfkill.o
17b43-$(CONFIG_B43_LEDS) += leds.o 17b43-$(CONFIG_B43_LEDS) += leds.o
18b43-$(CONFIG_B43_PCMCIA) += pcmcia.o 18b43-$(CONFIG_B43_PCMCIA) += pcmcia.o
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index 660716214d49..b8807fb12c92 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -26,8 +26,6 @@
26# define B43_DEBUG 0 26# define B43_DEBUG 0
27#endif 27#endif
28 28
29#define B43_RX_MAX_SSI 60
30
31/* MMIO offsets */ 29/* MMIO offsets */
32#define B43_MMIO_DMA0_REASON 0x20 30#define B43_MMIO_DMA0_REASON 0x20
33#define B43_MMIO_DMA0_IRQ_MASK 0x24 31#define B43_MMIO_DMA0_IRQ_MASK 0x24
@@ -117,6 +115,7 @@
117#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */ 115#define B43_MMIO_TSF_2 0x636 /* core rev < 3 only */
118#define B43_MMIO_TSF_3 0x638 /* core rev < 3 only */ 116#define B43_MMIO_TSF_3 0x638 /* core rev < 3 only */
119#define B43_MMIO_RNG 0x65A 117#define B43_MMIO_RNG 0x65A
118#define B43_MMIO_IFSSLOT 0x684 /* Interframe slot time */
120#define B43_MMIO_IFSCTL 0x688 /* Interframe space control */ 119#define B43_MMIO_IFSCTL 0x688 /* Interframe space control */
121#define B43_MMIO_IFSCTL_USE_EDCF 0x0004 120#define B43_MMIO_IFSCTL_USE_EDCF 0x0004
122#define B43_MMIO_POWERUP_DELAY 0x6A8 121#define B43_MMIO_POWERUP_DELAY 0x6A8
@@ -255,6 +254,14 @@ enum {
255#define B43_SHM_SH_MAXBFRAMES 0x0080 /* Maximum number of frames in a burst */ 254#define B43_SHM_SH_MAXBFRAMES 0x0080 /* Maximum number of frames in a burst */
256#define B43_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */ 255#define B43_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */
257#define B43_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */ 256#define B43_SHM_SH_PRETBTT 0x0096 /* pre-TBTT in us */
257/* SHM_SHARED tx iq workarounds */
258#define B43_SHM_SH_NPHY_TXIQW0 0x0700
259#define B43_SHM_SH_NPHY_TXIQW1 0x0702
260#define B43_SHM_SH_NPHY_TXIQW2 0x0704
261#define B43_SHM_SH_NPHY_TXIQW3 0x0706
262/* SHM_SHARED tx pwr ctrl */
263#define B43_SHM_SH_NPHY_TXPWR_INDX0 0x0708
264#define B43_SHM_SH_NPHY_TXPWR_INDX1 0x070E
258 265
259/* SHM_SCRATCH offsets */ 266/* SHM_SCRATCH offsets */
260#define B43_SHM_SC_MINCONT 0x0003 /* Minimum contention window */ 267#define B43_SHM_SC_MINCONT 0x0003 /* Minimum contention window */
@@ -695,6 +702,7 @@ struct b43_wldev {
695 bool radio_hw_enable; /* saved state of radio hardware enabled state */ 702 bool radio_hw_enable; /* saved state of radio hardware enabled state */
696 bool qos_enabled; /* TRUE, if QoS is used. */ 703 bool qos_enabled; /* TRUE, if QoS is used. */
697 bool hwcrypto_enabled; /* TRUE, if HW crypto acceleration is enabled. */ 704 bool hwcrypto_enabled; /* TRUE, if HW crypto acceleration is enabled. */
705 bool use_pio; /* TRUE if next init should use PIO */
698 706
699 /* PHY/Radio device. */ 707 /* PHY/Radio device. */
700 struct b43_phy phy; 708 struct b43_phy phy;
@@ -749,12 +757,6 @@ struct b43_wldev {
749#endif 757#endif
750}; 758};
751 759
752/*
753 * Include goes here to avoid a dependency problem.
754 * A better fix would be to integrate xmit.h into b43.h.
755 */
756#include "xmit.h"
757
758/* Data structure for the WLAN parts (802.11 cores) of the b43 chip. */ 760/* Data structure for the WLAN parts (802.11 cores) of the b43 chip. */
759struct b43_wl { 761struct b43_wl {
760 /* Pointer to the active wireless device on this chip */ 762 /* Pointer to the active wireless device on this chip */
@@ -829,15 +831,9 @@ struct b43_wl {
829 /* The device LEDs. */ 831 /* The device LEDs. */
830 struct b43_leds leds; 832 struct b43_leds leds;
831 833
832#ifdef CONFIG_B43_PIO 834 /* Kmalloc'ed scratch space for PIO TX/RX. Protected by wl->mutex. */
833 /* 835 u8 pio_scratchspace[110] __attribute__((__aligned__(8)));
834 * RX/TX header/tail buffers used by the frame transmit functions. 836 u8 pio_tailspace[4] __attribute__((__aligned__(8)));
835 */
836 struct b43_rxhdr_fw4 rxhdr;
837 struct b43_txhdr txhdr;
838 u8 rx_tail[4];
839 u8 tx_tail[4];
840#endif /* CONFIG_B43_PIO */
841}; 837};
842 838
843static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw) 839static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw)
@@ -888,20 +884,15 @@ static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
888 884
889static inline bool b43_using_pio_transfers(struct b43_wldev *dev) 885static inline bool b43_using_pio_transfers(struct b43_wldev *dev)
890{ 886{
891#ifdef CONFIG_B43_PIO
892 return dev->__using_pio_transfers; 887 return dev->__using_pio_transfers;
893#else
894 return 0;
895#endif
896} 888}
897 889
898#ifdef CONFIG_B43_FORCE_PIO 890#ifdef CONFIG_B43_FORCE_PIO
899# define B43_FORCE_PIO 1 891# define B43_PIO_DEFAULT 1
900#else 892#else
901# define B43_FORCE_PIO 0 893# define B43_PIO_DEFAULT 0
902#endif 894#endif
903 895
904
905/* Message printing */ 896/* Message printing */
906void b43info(struct b43_wl *wl, const char *fmt, ...) 897void b43info(struct b43_wl *wl, const char *fmt, ...)
907 __attribute__ ((format(printf, 2, 3))); 898 __attribute__ ((format(printf, 2, 3)));
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index de4e804bedf0..fa40fdfea719 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -38,6 +38,7 @@
38#include <linux/delay.h> 38#include <linux/delay.h>
39#include <linux/skbuff.h> 39#include <linux/skbuff.h>
40#include <linux/etherdevice.h> 40#include <linux/etherdevice.h>
41#include <linux/slab.h>
41#include <asm/div64.h> 42#include <asm/div64.h>
42 43
43 44
@@ -770,7 +771,7 @@ static void free_all_descbuffers(struct b43_dmaring *ring)
770 for (i = 0; i < ring->nr_slots; i++) { 771 for (i = 0; i < ring->nr_slots; i++) {
771 desc = ring->ops->idx2desc(ring, i, &meta); 772 desc = ring->ops->idx2desc(ring, i, &meta);
772 773
773 if (!meta->skb) { 774 if (!meta->skb || b43_dma_ptr_is_poisoned(meta->skb)) {
774 B43_WARN_ON(!ring->tx); 775 B43_WARN_ON(!ring->tx);
775 continue; 776 continue;
776 } 777 }
@@ -822,7 +823,7 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
822 enum b43_dmatype type) 823 enum b43_dmatype type)
823{ 824{
824 struct b43_dmaring *ring; 825 struct b43_dmaring *ring;
825 int err; 826 int i, err;
826 dma_addr_t dma_test; 827 dma_addr_t dma_test;
827 828
828 ring = kzalloc(sizeof(*ring), GFP_KERNEL); 829 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
@@ -837,6 +838,8 @@ struct b43_dmaring *b43_setup_dmaring(struct b43_wldev *dev,
837 GFP_KERNEL); 838 GFP_KERNEL);
838 if (!ring->meta) 839 if (!ring->meta)
839 goto err_kfree_ring; 840 goto err_kfree_ring;
841 for (i = 0; i < ring->nr_slots; i++)
842 ring->meta->skb = B43_DMA_PTR_POISON;
840 843
841 ring->type = type; 844 ring->type = type;
842 ring->dev = dev; 845 ring->dev = dev;
@@ -1147,28 +1150,29 @@ struct b43_dmaring *parse_cookie(struct b43_wldev *dev, u16 cookie, int *slot)
1147 case 0x5000: 1150 case 0x5000:
1148 ring = dma->tx_ring_mcast; 1151 ring = dma->tx_ring_mcast;
1149 break; 1152 break;
1150 default:
1151 B43_WARN_ON(1);
1152 } 1153 }
1153 *slot = (cookie & 0x0FFF); 1154 *slot = (cookie & 0x0FFF);
1154 B43_WARN_ON(!(ring && *slot >= 0 && *slot < ring->nr_slots)); 1155 if (unlikely(!ring || *slot < 0 || *slot >= ring->nr_slots)) {
1156 b43dbg(dev->wl, "TX-status contains "
1157 "invalid cookie: 0x%04X\n", cookie);
1158 return NULL;
1159 }
1155 1160
1156 return ring; 1161 return ring;
1157} 1162}
1158 1163
1159static int dma_tx_fragment(struct b43_dmaring *ring, 1164static int dma_tx_fragment(struct b43_dmaring *ring,
1160 struct sk_buff **in_skb) 1165 struct sk_buff *skb)
1161{ 1166{
1162 struct sk_buff *skb = *in_skb;
1163 const struct b43_dma_ops *ops = ring->ops; 1167 const struct b43_dma_ops *ops = ring->ops;
1164 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1168 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1169 struct b43_private_tx_info *priv_info = b43_get_priv_tx_info(info);
1165 u8 *header; 1170 u8 *header;
1166 int slot, old_top_slot, old_used_slots; 1171 int slot, old_top_slot, old_used_slots;
1167 int err; 1172 int err;
1168 struct b43_dmadesc_generic *desc; 1173 struct b43_dmadesc_generic *desc;
1169 struct b43_dmadesc_meta *meta; 1174 struct b43_dmadesc_meta *meta;
1170 struct b43_dmadesc_meta *meta_hdr; 1175 struct b43_dmadesc_meta *meta_hdr;
1171 struct sk_buff *bounce_skb;
1172 u16 cookie; 1176 u16 cookie;
1173 size_t hdrsize = b43_txhdr_size(ring->dev); 1177 size_t hdrsize = b43_txhdr_size(ring->dev);
1174 1178
@@ -1212,34 +1216,28 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
1212 1216
1213 meta->skb = skb; 1217 meta->skb = skb;
1214 meta->is_last_fragment = 1; 1218 meta->is_last_fragment = 1;
1219 priv_info->bouncebuffer = NULL;
1215 1220
1216 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); 1221 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
1217 /* create a bounce buffer in zone_dma on mapping failure. */ 1222 /* create a bounce buffer in zone_dma on mapping failure. */
1218 if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { 1223 if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
1219 bounce_skb = __dev_alloc_skb(skb->len, GFP_ATOMIC | GFP_DMA); 1224 priv_info->bouncebuffer = kmalloc(skb->len, GFP_ATOMIC | GFP_DMA);
1220 if (!bounce_skb) { 1225 if (!priv_info->bouncebuffer) {
1221 ring->current_slot = old_top_slot; 1226 ring->current_slot = old_top_slot;
1222 ring->used_slots = old_used_slots; 1227 ring->used_slots = old_used_slots;
1223 err = -ENOMEM; 1228 err = -ENOMEM;
1224 goto out_unmap_hdr; 1229 goto out_unmap_hdr;
1225 } 1230 }
1231 memcpy(priv_info->bouncebuffer, skb->data, skb->len);
1226 1232
1227 memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); 1233 meta->dmaaddr = map_descbuffer(ring, priv_info->bouncebuffer, skb->len, 1);
1228 memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb));
1229 bounce_skb->dev = skb->dev;
1230 skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb));
1231 info = IEEE80211_SKB_CB(bounce_skb);
1232
1233 dev_kfree_skb_any(skb);
1234 skb = bounce_skb;
1235 *in_skb = bounce_skb;
1236 meta->skb = skb;
1237 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
1238 if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { 1234 if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
1235 kfree(priv_info->bouncebuffer);
1236 priv_info->bouncebuffer = NULL;
1239 ring->current_slot = old_top_slot; 1237 ring->current_slot = old_top_slot;
1240 ring->used_slots = old_used_slots; 1238 ring->used_slots = old_used_slots;
1241 err = -EIO; 1239 err = -EIO;
1242 goto out_free_bounce; 1240 goto out_unmap_hdr;
1243 } 1241 }
1244 } 1242 }
1245 1243
@@ -1256,8 +1254,6 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
1256 ops->poke_tx(ring, next_slot(ring, slot)); 1254 ops->poke_tx(ring, next_slot(ring, slot));
1257 return 0; 1255 return 0;
1258 1256
1259out_free_bounce:
1260 dev_kfree_skb_any(skb);
1261out_unmap_hdr: 1257out_unmap_hdr:
1262 unmap_descbuffer(ring, meta_hdr->dmaaddr, 1258 unmap_descbuffer(ring, meta_hdr->dmaaddr,
1263 hdrsize, 1); 1259 hdrsize, 1);
@@ -1362,11 +1358,7 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
1362 * static, so we don't need to store it per frame. */ 1358 * static, so we don't need to store it per frame. */
1363 ring->queue_prio = skb_get_queue_mapping(skb); 1359 ring->queue_prio = skb_get_queue_mapping(skb);
1364 1360
1365 /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing 1361 err = dma_tx_fragment(ring, skb);
1366 * into the skb data or cb now. */
1367 hdr = NULL;
1368 info = NULL;
1369 err = dma_tx_fragment(ring, &skb);
1370 if (unlikely(err == -ENOKEY)) { 1362 if (unlikely(err == -ENOKEY)) {
1371 /* Drop this packet, as we don't have the encryption key 1363 /* Drop this packet, as we don't have the encryption key
1372 * anymore and must not transmit it unencrypted. */ 1364 * anymore and must not transmit it unencrypted. */
@@ -1378,7 +1370,6 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
1378 b43err(dev->wl, "DMA tx mapping failure\n"); 1370 b43err(dev->wl, "DMA tx mapping failure\n");
1379 goto out; 1371 goto out;
1380 } 1372 }
1381 ring->nr_tx_packets++;
1382 if ((free_slots(ring) < TX_SLOTS_PER_FRAME) || 1373 if ((free_slots(ring) < TX_SLOTS_PER_FRAME) ||
1383 should_inject_overflow(ring)) { 1374 should_inject_overflow(ring)) {
1384 /* This TX ring is full. */ 1375 /* This TX ring is full. */
@@ -1400,30 +1391,63 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
1400 struct b43_dmaring *ring; 1391 struct b43_dmaring *ring;
1401 struct b43_dmadesc_generic *desc; 1392 struct b43_dmadesc_generic *desc;
1402 struct b43_dmadesc_meta *meta; 1393 struct b43_dmadesc_meta *meta;
1403 int slot; 1394 int slot, firstused;
1404 bool frame_succeed; 1395 bool frame_succeed;
1405 1396
1406 ring = parse_cookie(dev, status->cookie, &slot); 1397 ring = parse_cookie(dev, status->cookie, &slot);
1407 if (unlikely(!ring)) 1398 if (unlikely(!ring))
1408 return; 1399 return;
1409
1410 B43_WARN_ON(!ring->tx); 1400 B43_WARN_ON(!ring->tx);
1401
1402 /* Sanity check: TX packets are processed in-order on one ring.
1403 * Check if the slot deduced from the cookie really is the first
1404 * used slot. */
1405 firstused = ring->current_slot - ring->used_slots + 1;
1406 if (firstused < 0)
1407 firstused = ring->nr_slots + firstused;
1408 if (unlikely(slot != firstused)) {
1409 /* This possibly is a firmware bug and will result in
1410 * malfunction, memory leaks and/or stall of DMA functionality. */
1411 b43dbg(dev->wl, "Out of order TX status report on DMA ring %d. "
1412 "Expected %d, but got %d\n",
1413 ring->index, firstused, slot);
1414 return;
1415 }
1416
1411 ops = ring->ops; 1417 ops = ring->ops;
1412 while (1) { 1418 while (1) {
1413 B43_WARN_ON(!(slot >= 0 && slot < ring->nr_slots)); 1419 B43_WARN_ON(slot < 0 || slot >= ring->nr_slots);
1414 desc = ops->idx2desc(ring, slot, &meta); 1420 desc = ops->idx2desc(ring, slot, &meta);
1415 1421
1416 if (meta->skb) 1422 if (b43_dma_ptr_is_poisoned(meta->skb)) {
1417 unmap_descbuffer(ring, meta->dmaaddr, meta->skb->len, 1423 b43dbg(dev->wl, "Poisoned TX slot %d (first=%d) "
1418 1); 1424 "on ring %d\n",
1419 else 1425 slot, firstused, ring->index);
1426 break;
1427 }
1428 if (meta->skb) {
1429 struct b43_private_tx_info *priv_info =
1430 b43_get_priv_tx_info(IEEE80211_SKB_CB(meta->skb));
1431
1432 unmap_descbuffer(ring, meta->dmaaddr, meta->skb->len, 1);
1433 kfree(priv_info->bouncebuffer);
1434 priv_info->bouncebuffer = NULL;
1435 } else {
1420 unmap_descbuffer(ring, meta->dmaaddr, 1436 unmap_descbuffer(ring, meta->dmaaddr,
1421 b43_txhdr_size(dev), 1); 1437 b43_txhdr_size(dev), 1);
1438 }
1422 1439
1423 if (meta->is_last_fragment) { 1440 if (meta->is_last_fragment) {
1424 struct ieee80211_tx_info *info; 1441 struct ieee80211_tx_info *info;
1425 1442
1426 BUG_ON(!meta->skb); 1443 if (unlikely(!meta->skb)) {
1444 /* This is a scatter-gather fragment of a frame, so
1445 * the skb pointer must not be NULL. */
1446 b43dbg(dev->wl, "TX status unexpected NULL skb "
1447 "at slot %d (first=%d) on ring %d\n",
1448 slot, firstused, ring->index);
1449 break;
1450 }
1427 1451
1428 info = IEEE80211_SKB_CB(meta->skb); 1452 info = IEEE80211_SKB_CB(meta->skb);
1429 1453
@@ -1441,20 +1465,29 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
1441#endif /* DEBUG */ 1465#endif /* DEBUG */
1442 ieee80211_tx_status(dev->wl->hw, meta->skb); 1466 ieee80211_tx_status(dev->wl->hw, meta->skb);
1443 1467
1444 /* skb is freed by ieee80211_tx_status() */ 1468 /* skb will be freed by ieee80211_tx_status().
1445 meta->skb = NULL; 1469 * Poison our pointer. */
1470 meta->skb = B43_DMA_PTR_POISON;
1446 } else { 1471 } else {
1447 /* No need to call free_descriptor_buffer here, as 1472 /* No need to call free_descriptor_buffer here, as
1448 * this is only the txhdr, which is not allocated. 1473 * this is only the txhdr, which is not allocated.
1449 */ 1474 */
1450 B43_WARN_ON(meta->skb); 1475 if (unlikely(meta->skb)) {
1476 b43dbg(dev->wl, "TX status unexpected non-NULL skb "
1477 "at slot %d (first=%d) on ring %d\n",
1478 slot, firstused, ring->index);
1479 break;
1480 }
1451 } 1481 }
1452 1482
1453 /* Everything unmapped and free'd. So it's not used anymore. */ 1483 /* Everything unmapped and free'd. So it's not used anymore. */
1454 ring->used_slots--; 1484 ring->used_slots--;
1455 1485
1456 if (meta->is_last_fragment) 1486 if (meta->is_last_fragment) {
1487 /* This is the last scatter-gather
1488 * fragment of the frame. We are done. */
1457 break; 1489 break;
1490 }
1458 slot = next_slot(ring, slot); 1491 slot = next_slot(ring, slot);
1459 } 1492 }
1460 if (ring->stopped) { 1493 if (ring->stopped) {
@@ -1467,22 +1500,6 @@ void b43_dma_handle_txstatus(struct b43_wldev *dev,
1467 } 1500 }
1468} 1501}
1469 1502
1470void b43_dma_get_tx_stats(struct b43_wldev *dev,
1471 struct ieee80211_tx_queue_stats *stats)
1472{
1473 const int nr_queues = dev->wl->hw->queues;
1474 struct b43_dmaring *ring;
1475 int i;
1476
1477 for (i = 0; i < nr_queues; i++) {
1478 ring = select_ring_by_priority(dev, i);
1479
1480 stats[i].len = ring->used_slots / TX_SLOTS_PER_FRAME;
1481 stats[i].limit = ring->nr_slots / TX_SLOTS_PER_FRAME;
1482 stats[i].count = ring->nr_tx_packets;
1483 }
1484}
1485
1486static void dma_rx(struct b43_dmaring *ring, int *slot) 1503static void dma_rx(struct b43_dmaring *ring, int *slot)
1487{ 1504{
1488 const struct b43_dma_ops *ops = ring->ops; 1505 const struct b43_dma_ops *ops = ring->ops;
@@ -1620,7 +1637,6 @@ void b43_dma_tx_resume(struct b43_wldev *dev)
1620 b43_power_saving_ctl_bits(dev, 0); 1637 b43_power_saving_ctl_bits(dev, 0);
1621} 1638}
1622 1639
1623#ifdef CONFIG_B43_PIO
1624static void direct_fifo_rx(struct b43_wldev *dev, enum b43_dmatype type, 1640static void direct_fifo_rx(struct b43_wldev *dev, enum b43_dmatype type,
1625 u16 mmio_base, bool enable) 1641 u16 mmio_base, bool enable)
1626{ 1642{
@@ -1654,4 +1670,3 @@ void b43_dma_direct_fifo_rx(struct b43_wldev *dev,
1654 mmio_base = b43_dmacontroller_base(type, engine_index); 1670 mmio_base = b43_dmacontroller_base(type, engine_index);
1655 direct_fifo_rx(dev, type, mmio_base, enable); 1671 direct_fifo_rx(dev, type, mmio_base, enable);
1656} 1672}
1657#endif /* CONFIG_B43_PIO */
diff --git a/drivers/net/wireless/b43/dma.h b/drivers/net/wireless/b43/dma.h
index f0b0838fb5ba..dc91944d6022 100644
--- a/drivers/net/wireless/b43/dma.h
+++ b/drivers/net/wireless/b43/dma.h
@@ -1,7 +1,7 @@
1#ifndef B43_DMA_H_ 1#ifndef B43_DMA_H_
2#define B43_DMA_H_ 2#define B43_DMA_H_
3 3
4#include <linux/ieee80211.h> 4#include <linux/err.h>
5 5
6#include "b43.h" 6#include "b43.h"
7 7
@@ -165,6 +165,10 @@ struct b43_dmadesc_generic {
165#define B43_RXRING_SLOTS 64 165#define B43_RXRING_SLOTS 64
166#define B43_DMA0_RX_BUFFERSIZE IEEE80211_MAX_FRAME_LEN 166#define B43_DMA0_RX_BUFFERSIZE IEEE80211_MAX_FRAME_LEN
167 167
168/* Pointer poison */
169#define B43_DMA_PTR_POISON ((void *)ERR_PTR(-ENOMEM))
170#define b43_dma_ptr_is_poisoned(ptr) (unlikely((ptr) == B43_DMA_PTR_POISON))
171
168 172
169struct sk_buff; 173struct sk_buff;
170struct b43_private; 174struct b43_private;
@@ -224,8 +228,6 @@ struct b43_dmaring {
224 int used_slots; 228 int used_slots;
225 /* Currently used slot in the ring. */ 229 /* Currently used slot in the ring. */
226 int current_slot; 230 int current_slot;
227 /* Total number of packets sent. Statistics only. */
228 unsigned int nr_tx_packets;
229 /* Frameoffset in octets. */ 231 /* Frameoffset in octets. */
230 u32 frameoffset; 232 u32 frameoffset;
231 /* Descriptor buffer size. */ 233 /* Descriptor buffer size. */
@@ -274,9 +276,6 @@ void b43_dma_free(struct b43_wldev *dev);
274void b43_dma_tx_suspend(struct b43_wldev *dev); 276void b43_dma_tx_suspend(struct b43_wldev *dev);
275void b43_dma_tx_resume(struct b43_wldev *dev); 277void b43_dma_tx_resume(struct b43_wldev *dev);
276 278
277void b43_dma_get_tx_stats(struct b43_wldev *dev,
278 struct ieee80211_tx_queue_stats *stats);
279
280int b43_dma_tx(struct b43_wldev *dev, 279int b43_dma_tx(struct b43_wldev *dev,
281 struct sk_buff *skb); 280 struct sk_buff *skb);
282void b43_dma_handle_txstatus(struct b43_wldev *dev, 281void b43_dma_handle_txstatus(struct b43_wldev *dev,
diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c
index 1e8dba488004..c587115dd2b9 100644
--- a/drivers/net/wireless/b43/leds.c
+++ b/drivers/net/wireless/b43/leds.c
@@ -246,6 +246,7 @@ static void b43_led_get_sprominfo(struct b43_wldev *dev,
246 *behaviour = B43_LED_OFF; 246 *behaviour = B43_LED_OFF;
247 break; 247 break;
248 default: 248 default:
249 *behaviour = B43_LED_OFF;
249 B43_WARN_ON(1); 250 B43_WARN_ON(1);
250 return; 251 return;
251 } 252 }
diff --git a/drivers/net/wireless/b43/lo.c b/drivers/net/wireless/b43/lo.c
index 976104f634a1..94e4f1378fc3 100644
--- a/drivers/net/wireless/b43/lo.c
+++ b/drivers/net/wireless/b43/lo.c
@@ -34,6 +34,7 @@
34 34
35#include <linux/delay.h> 35#include <linux/delay.h>
36#include <linux/sched.h> 36#include <linux/sched.h>
37#include <linux/slab.h>
37 38
38 39
39static struct b43_lo_calib *b43_find_lo_calib(struct b43_txpower_lo_control *lo, 40static struct b43_lo_calib *b43_find_lo_calib(struct b43_txpower_lo_control *lo,
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 098dda1a67c1..9a374ef83a22 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -42,6 +42,7 @@
42#include <linux/skbuff.h> 42#include <linux/skbuff.h>
43#include <linux/io.h> 43#include <linux/io.h>
44#include <linux/dma-mapping.h> 44#include <linux/dma-mapping.h>
45#include <linux/slab.h>
45#include <asm/unaligned.h> 46#include <asm/unaligned.h>
46 47
47#include "b43.h" 48#include "b43.h"
@@ -67,7 +68,12 @@ MODULE_AUTHOR("Gábor Stefanik");
67MODULE_LICENSE("GPL"); 68MODULE_LICENSE("GPL");
68 69
69MODULE_FIRMWARE(B43_SUPPORTED_FIRMWARE_ID); 70MODULE_FIRMWARE(B43_SUPPORTED_FIRMWARE_ID);
70 71MODULE_FIRMWARE("b43/ucode11.fw");
72MODULE_FIRMWARE("b43/ucode13.fw");
73MODULE_FIRMWARE("b43/ucode14.fw");
74MODULE_FIRMWARE("b43/ucode15.fw");
75MODULE_FIRMWARE("b43/ucode5.fw");
76MODULE_FIRMWARE("b43/ucode9.fw");
71 77
72static int modparam_bad_frames_preempt; 78static int modparam_bad_frames_preempt;
73module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444); 79module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
@@ -102,6 +108,9 @@ int b43_modparam_verbose = B43_VERBOSITY_DEFAULT;
102module_param_named(verbose, b43_modparam_verbose, int, 0644); 108module_param_named(verbose, b43_modparam_verbose, int, 0644);
103MODULE_PARM_DESC(verbose, "Log message verbosity: 0=error, 1=warn, 2=info(default), 3=debug"); 109MODULE_PARM_DESC(verbose, "Log message verbosity: 0=error, 1=warn, 2=info(default), 3=debug");
104 110
111int b43_modparam_pio = B43_PIO_DEFAULT;
112module_param_named(pio, b43_modparam_pio, int, 0644);
113MODULE_PARM_DESC(pio, "Use PIO accesses by default: 0=DMA, 1=PIO");
105 114
106static const struct ssb_device_id b43_ssb_tbl[] = { 115static const struct ssb_device_id b43_ssb_tbl[] = {
107 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5), 116 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 5),
@@ -110,6 +119,7 @@ static const struct ssb_device_id b43_ssb_tbl[] = {
110 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9), 119 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 9),
111 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10), 120 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 10),
112 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 11), 121 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 11),
122 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 12),
113 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13), 123 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 13),
114 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 15), 124 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 15),
115 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 16), 125 SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 16),
@@ -628,10 +638,17 @@ static void b43_upload_card_macaddress(struct b43_wldev *dev)
628static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time) 638static void b43_set_slot_time(struct b43_wldev *dev, u16 slot_time)
629{ 639{
630 /* slot_time is in usec. */ 640 /* slot_time is in usec. */
631 if (dev->phy.type != B43_PHYTYPE_G) 641 /* This test used to exit for all but a G PHY. */
642 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
632 return; 643 return;
633 b43_write16(dev, 0x684, 510 + slot_time); 644 b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time);
634 b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time); 645 /* Shared memory location 0x0010 is the slot time and should be
646 * set to slot_time; however, this register is initially 0 and changing
647 * the value adversely affects the transmit rate for BCM4311
648 * devices. Until this behavior is unterstood, delete this step
649 *
650 * b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time);
651 */
635} 652}
636 653
637static void b43_short_slot_timing_enable(struct b43_wldev *dev) 654static void b43_short_slot_timing_enable(struct b43_wldev *dev)
@@ -835,8 +852,10 @@ static void rx_tkip_phase1_write(struct b43_wldev *dev, u8 index, u32 iv32,
835} 852}
836 853
837static void b43_op_update_tkip_key(struct ieee80211_hw *hw, 854static void b43_op_update_tkip_key(struct ieee80211_hw *hw,
838 struct ieee80211_key_conf *keyconf, const u8 *addr, 855 struct ieee80211_vif *vif,
839 u32 iv32, u16 *phase1key) 856 struct ieee80211_key_conf *keyconf,
857 struct ieee80211_sta *sta,
858 u32 iv32, u16 *phase1key)
840{ 859{
841 struct b43_wl *wl = hw_to_b43_wl(hw); 860 struct b43_wl *wl = hw_to_b43_wl(hw);
842 struct b43_wldev *dev; 861 struct b43_wldev *dev;
@@ -845,19 +864,19 @@ static void b43_op_update_tkip_key(struct ieee80211_hw *hw,
845 if (B43_WARN_ON(!modparam_hwtkip)) 864 if (B43_WARN_ON(!modparam_hwtkip))
846 return; 865 return;
847 866
848 mutex_lock(&wl->mutex); 867 /* This is only called from the RX path through mac80211, where
849 868 * our mutex is already locked. */
869 B43_WARN_ON(!mutex_is_locked(&wl->mutex));
850 dev = wl->current_dev; 870 dev = wl->current_dev;
851 if (!dev || b43_status(dev) < B43_STAT_INITIALIZED) 871 B43_WARN_ON(!dev || b43_status(dev) < B43_STAT_INITIALIZED);
852 goto out_unlock;
853 872
854 keymac_write(dev, index, NULL); /* First zero out mac to avoid race */ 873 keymac_write(dev, index, NULL); /* First zero out mac to avoid race */
855 874
856 rx_tkip_phase1_write(dev, index, iv32, phase1key); 875 rx_tkip_phase1_write(dev, index, iv32, phase1key);
857 keymac_write(dev, index, addr); 876 /* only pairwise TKIP keys are supported right now */
858 877 if (WARN_ON(!sta))
859out_unlock: 878 return;
860 mutex_unlock(&wl->mutex); 879 keymac_write(dev, index, sta->addr);
861} 880}
862 881
863static void do_key_write(struct b43_wldev *dev, 882static void do_key_write(struct b43_wldev *dev,
@@ -1784,6 +1803,10 @@ static void b43_do_interrupt_thread(struct b43_wldev *dev)
1784 dma_reason[0], dma_reason[1], 1803 dma_reason[0], dma_reason[1],
1785 dma_reason[2], dma_reason[3], 1804 dma_reason[2], dma_reason[3],
1786 dma_reason[4], dma_reason[5]); 1805 dma_reason[4], dma_reason[5]);
1806 b43err(dev->wl, "This device does not support DMA "
1807 "on your system. Please use PIO instead.\n");
1808 /* Fall back to PIO transfers if we get fatal DMA errors! */
1809 dev->use_pio = 1;
1787 b43_controller_restart(dev, "DMA error"); 1810 b43_controller_restart(dev, "DMA error");
1788 return; 1811 return;
1789 } 1812 }
@@ -2955,7 +2978,7 @@ static void do_periodic_work(struct b43_wldev *dev)
2955/* Periodic work locking policy: 2978/* Periodic work locking policy:
2956 * The whole periodic work handler is protected by 2979 * The whole periodic work handler is protected by
2957 * wl->mutex. If another lock is needed somewhere in the 2980 * wl->mutex. If another lock is needed somewhere in the
2958 * pwork callchain, it's aquired in-place, where it's needed. 2981 * pwork callchain, it's acquired in-place, where it's needed.
2959 */ 2982 */
2960static void b43_periodic_work_handler(struct work_struct *work) 2983static void b43_periodic_work_handler(struct work_struct *work)
2961{ 2984{
@@ -3335,27 +3358,6 @@ out_unlock:
3335 return err; 3358 return err;
3336} 3359}
3337 3360
3338static int b43_op_get_tx_stats(struct ieee80211_hw *hw,
3339 struct ieee80211_tx_queue_stats *stats)
3340{
3341 struct b43_wl *wl = hw_to_b43_wl(hw);
3342 struct b43_wldev *dev;
3343 int err = -ENODEV;
3344
3345 mutex_lock(&wl->mutex);
3346 dev = wl->current_dev;
3347 if (dev && b43_status(dev) >= B43_STAT_STARTED) {
3348 if (b43_using_pio_transfers(dev))
3349 b43_pio_get_tx_stats(dev, stats);
3350 else
3351 b43_dma_get_tx_stats(dev, stats);
3352 err = 0;
3353 }
3354 mutex_unlock(&wl->mutex);
3355
3356 return err;
3357}
3358
3359static int b43_op_get_stats(struct ieee80211_hw *hw, 3361static int b43_op_get_stats(struct ieee80211_hw *hw,
3360 struct ieee80211_low_level_stats *stats) 3362 struct ieee80211_low_level_stats *stats)
3361{ 3363{
@@ -3559,6 +3561,12 @@ static int b43_op_config(struct ieee80211_hw *hw, u32 changed)
3559 dev = wl->current_dev; 3561 dev = wl->current_dev;
3560 phy = &dev->phy; 3562 phy = &dev->phy;
3561 3563
3564 if (conf_is_ht(conf))
3565 phy->is_40mhz =
3566 (conf_is_ht40_minus(conf) || conf_is_ht40_plus(conf));
3567 else
3568 phy->is_40mhz = false;
3569
3562 b43_mac_suspend(dev); 3570 b43_mac_suspend(dev);
3563 3571
3564 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) 3572 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
@@ -3573,7 +3581,7 @@ static int b43_op_config(struct ieee80211_hw *hw, u32 changed)
3573 if (conf->channel->hw_value != phy->channel) 3581 if (conf->channel->hw_value != phy->channel)
3574 b43_switch_channel(dev, conf->channel->hw_value); 3582 b43_switch_channel(dev, conf->channel->hw_value);
3575 3583
3576 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP); 3584 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
3577 3585
3578 /* Adjust the desired TX power level. */ 3586 /* Adjust the desired TX power level. */
3579 if (conf->power_level != 0) { 3587 if (conf->power_level != 0) {
@@ -3960,6 +3968,7 @@ static int b43_wireless_core_start(struct b43_wldev *dev)
3960 } 3968 }
3961 3969
3962 /* We are ready to run. */ 3970 /* We are ready to run. */
3971 ieee80211_wake_queues(dev->wl->hw);
3963 b43_set_status(dev, B43_STAT_STARTED); 3972 b43_set_status(dev, B43_STAT_STARTED);
3964 3973
3965 /* Start data flow (TX/RX). */ 3974 /* Start data flow (TX/RX). */
@@ -4350,7 +4359,7 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4350 4359
4351 if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) || 4360 if ((dev->dev->bus->bustype == SSB_BUSTYPE_PCMCIA) ||
4352 (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) || 4361 (dev->dev->bus->bustype == SSB_BUSTYPE_SDIO) ||
4353 B43_FORCE_PIO) { 4362 dev->use_pio) {
4354 dev->__using_pio_transfers = 1; 4363 dev->__using_pio_transfers = 1;
4355 err = b43_pio_init(dev); 4364 err = b43_pio_init(dev);
4356 } else { 4365 } else {
@@ -4369,8 +4378,6 @@ static int b43_wireless_core_init(struct b43_wldev *dev)
4369 4378
4370 ieee80211_wake_queues(dev->wl->hw); 4379 ieee80211_wake_queues(dev->wl->hw);
4371 4380
4372 ieee80211_wake_queues(dev->wl->hw);
4373
4374 b43_set_status(dev, B43_STAT_INITIALIZED); 4381 b43_set_status(dev, B43_STAT_INITIALIZED);
4375 4382
4376out: 4383out:
@@ -4385,7 +4392,7 @@ err_busdown:
4385} 4392}
4386 4393
4387static int b43_op_add_interface(struct ieee80211_hw *hw, 4394static int b43_op_add_interface(struct ieee80211_hw *hw,
4388 struct ieee80211_if_init_conf *conf) 4395 struct ieee80211_vif *vif)
4389{ 4396{
4390 struct b43_wl *wl = hw_to_b43_wl(hw); 4397 struct b43_wl *wl = hw_to_b43_wl(hw);
4391 struct b43_wldev *dev; 4398 struct b43_wldev *dev;
@@ -4393,24 +4400,24 @@ static int b43_op_add_interface(struct ieee80211_hw *hw,
4393 4400
4394 /* TODO: allow WDS/AP devices to coexist */ 4401 /* TODO: allow WDS/AP devices to coexist */
4395 4402
4396 if (conf->type != NL80211_IFTYPE_AP && 4403 if (vif->type != NL80211_IFTYPE_AP &&
4397 conf->type != NL80211_IFTYPE_MESH_POINT && 4404 vif->type != NL80211_IFTYPE_MESH_POINT &&
4398 conf->type != NL80211_IFTYPE_STATION && 4405 vif->type != NL80211_IFTYPE_STATION &&
4399 conf->type != NL80211_IFTYPE_WDS && 4406 vif->type != NL80211_IFTYPE_WDS &&
4400 conf->type != NL80211_IFTYPE_ADHOC) 4407 vif->type != NL80211_IFTYPE_ADHOC)
4401 return -EOPNOTSUPP; 4408 return -EOPNOTSUPP;
4402 4409
4403 mutex_lock(&wl->mutex); 4410 mutex_lock(&wl->mutex);
4404 if (wl->operating) 4411 if (wl->operating)
4405 goto out_mutex_unlock; 4412 goto out_mutex_unlock;
4406 4413
4407 b43dbg(wl, "Adding Interface type %d\n", conf->type); 4414 b43dbg(wl, "Adding Interface type %d\n", vif->type);
4408 4415
4409 dev = wl->current_dev; 4416 dev = wl->current_dev;
4410 wl->operating = 1; 4417 wl->operating = 1;
4411 wl->vif = conf->vif; 4418 wl->vif = vif;
4412 wl->if_type = conf->type; 4419 wl->if_type = vif->type;
4413 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN); 4420 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
4414 4421
4415 b43_adjust_opmode(dev); 4422 b43_adjust_opmode(dev);
4416 b43_set_pretbtt(dev); 4423 b43_set_pretbtt(dev);
@@ -4425,17 +4432,17 @@ static int b43_op_add_interface(struct ieee80211_hw *hw,
4425} 4432}
4426 4433
4427static void b43_op_remove_interface(struct ieee80211_hw *hw, 4434static void b43_op_remove_interface(struct ieee80211_hw *hw,
4428 struct ieee80211_if_init_conf *conf) 4435 struct ieee80211_vif *vif)
4429{ 4436{
4430 struct b43_wl *wl = hw_to_b43_wl(hw); 4437 struct b43_wl *wl = hw_to_b43_wl(hw);
4431 struct b43_wldev *dev = wl->current_dev; 4438 struct b43_wldev *dev = wl->current_dev;
4432 4439
4433 b43dbg(wl, "Removing Interface type %d\n", conf->type); 4440 b43dbg(wl, "Removing Interface type %d\n", vif->type);
4434 4441
4435 mutex_lock(&wl->mutex); 4442 mutex_lock(&wl->mutex);
4436 4443
4437 B43_WARN_ON(!wl->operating); 4444 B43_WARN_ON(!wl->operating);
4438 B43_WARN_ON(wl->vif != conf->vif); 4445 B43_WARN_ON(wl->vif != vif);
4439 wl->vif = NULL; 4446 wl->vif = NULL;
4440 4447
4441 wl->operating = 0; 4448 wl->operating = 0;
@@ -4576,7 +4583,6 @@ static const struct ieee80211_ops b43_hw_ops = {
4576 .set_key = b43_op_set_key, 4583 .set_key = b43_op_set_key,
4577 .update_tkip_key = b43_op_update_tkip_key, 4584 .update_tkip_key = b43_op_update_tkip_key,
4578 .get_stats = b43_op_get_stats, 4585 .get_stats = b43_op_get_stats,
4579 .get_tx_stats = b43_op_get_tx_stats,
4580 .get_tsf = b43_op_get_tsf, 4586 .get_tsf = b43_op_get_tsf,
4581 .set_tsf = b43_op_set_tsf, 4587 .set_tsf = b43_op_set_tsf,
4582 .start = b43_op_start, 4588 .start = b43_op_start,
@@ -4669,7 +4675,7 @@ static int b43_wireless_core_attach(struct b43_wldev *dev)
4669{ 4675{
4670 struct b43_wl *wl = dev->wl; 4676 struct b43_wl *wl = dev->wl;
4671 struct ssb_bus *bus = dev->dev->bus; 4677 struct ssb_bus *bus = dev->dev->bus;
4672 struct pci_dev *pdev = bus->host_pci; 4678 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
4673 int err; 4679 int err;
4674 bool have_2ghz_phy = 0, have_5ghz_phy = 0; 4680 bool have_2ghz_phy = 0, have_5ghz_phy = 0;
4675 u32 tmp; 4681 u32 tmp;
@@ -4802,7 +4808,7 @@ static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
4802 4808
4803 if (!list_empty(&wl->devlist)) { 4809 if (!list_empty(&wl->devlist)) {
4804 /* We are not the first core on this chip. */ 4810 /* We are not the first core on this chip. */
4805 pdev = dev->bus->host_pci; 4811 pdev = (dev->bus->bustype == SSB_BUSTYPE_PCI) ? dev->bus->host_pci : NULL;
4806 /* Only special chips support more than one wireless 4812 /* Only special chips support more than one wireless
4807 * core, although some of the other chips have more than 4813 * core, although some of the other chips have more than
4808 * one wireless core as well. Check for this and 4814 * one wireless core as well. Check for this and
@@ -4820,6 +4826,7 @@ static int b43_one_core_attach(struct ssb_device *dev, struct b43_wl *wl)
4820 if (!wldev) 4826 if (!wldev)
4821 goto out; 4827 goto out;
4822 4828
4829 wldev->use_pio = b43_modparam_pio;
4823 wldev->dev = dev; 4830 wldev->dev = dev;
4824 wldev->wl = wl; 4831 wldev->wl = wl;
4825 b43_set_status(wldev, B43_STAT_UNINIT); 4832 b43_set_status(wldev, B43_STAT_UNINIT);
diff --git a/drivers/net/wireless/b43/pcmcia.c b/drivers/net/wireless/b43/pcmcia.c
index 6c3a74964ab8..609e7051e018 100644
--- a/drivers/net/wireless/b43/pcmcia.c
+++ b/drivers/net/wireless/b43/pcmcia.c
@@ -24,6 +24,7 @@
24#include "pcmcia.h" 24#include "pcmcia.h"
25 25
26#include <linux/ssb/ssb.h> 26#include <linux/ssb/ssb.h>
27#include <linux/slab.h>
27 28
28#include <pcmcia/cs_types.h> 29#include <pcmcia/cs_types.h>
29#include <pcmcia/cs.h> 30#include <pcmcia/cs.h>
@@ -65,35 +66,15 @@ static int __devinit b43_pcmcia_probe(struct pcmcia_device *dev)
65 struct ssb_bus *ssb; 66 struct ssb_bus *ssb;
66 win_req_t win; 67 win_req_t win;
67 memreq_t mem; 68 memreq_t mem;
68 tuple_t tuple;
69 cisparse_t parse;
70 int err = -ENOMEM; 69 int err = -ENOMEM;
71 int res = 0; 70 int res = 0;
72 unsigned char buf[64];
73 71
74 ssb = kzalloc(sizeof(*ssb), GFP_KERNEL); 72 ssb = kzalloc(sizeof(*ssb), GFP_KERNEL);
75 if (!ssb) 73 if (!ssb)
76 goto out_error; 74 goto out_error;
77 75
78 err = -ENODEV; 76 err = -ENODEV;
79 tuple.DesiredTuple = CISTPL_CONFIG;
80 tuple.Attributes = 0;
81 tuple.TupleData = buf;
82 tuple.TupleDataMax = sizeof(buf);
83 tuple.TupleOffset = 0;
84 77
85 res = pcmcia_get_first_tuple(dev, &tuple);
86 if (res != 0)
87 goto err_kfree_ssb;
88 res = pcmcia_get_tuple_data(dev, &tuple);
89 if (res != 0)
90 goto err_kfree_ssb;
91 res = pcmcia_parse_tuple(&tuple, &parse);
92 if (res != 0)
93 goto err_kfree_ssb;
94
95 dev->conf.ConfigBase = parse.config.base;
96 dev->conf.Present = parse.config.rmask[0];
97 dev->conf.Attributes = CONF_ENABLE_IRQ; 78 dev->conf.Attributes = CONF_ENABLE_IRQ;
98 dev->conf.IntType = INT_MEMORY_AND_IO; 79 dev->conf.IntType = INT_MEMORY_AND_IO;
99 80
@@ -107,20 +88,18 @@ static int __devinit b43_pcmcia_probe(struct pcmcia_device *dev)
107 win.Base = 0; 88 win.Base = 0;
108 win.Size = SSB_CORE_SIZE; 89 win.Size = SSB_CORE_SIZE;
109 win.AccessSpeed = 250; 90 win.AccessSpeed = 250;
110 res = pcmcia_request_window(&dev, &win, &dev->win); 91 res = pcmcia_request_window(dev, &win, &dev->win);
111 if (res != 0) 92 if (res != 0)
112 goto err_kfree_ssb; 93 goto err_kfree_ssb;
113 94
114 mem.CardOffset = 0; 95 mem.CardOffset = 0;
115 mem.Page = 0; 96 mem.Page = 0;
116 res = pcmcia_map_mem_page(dev->win, &mem); 97 res = pcmcia_map_mem_page(dev, dev->win, &mem);
117 if (res != 0) 98 if (res != 0)
118 goto err_disable; 99 goto err_disable;
119 100
120 dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; 101 dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
121 dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
122 dev->irq.Handler = NULL; /* The handler is registered later. */ 102 dev->irq.Handler = NULL; /* The handler is registered later. */
123 dev->irq.Instance = NULL;
124 res = pcmcia_request_irq(dev, &dev->irq); 103 res = pcmcia_request_irq(dev, &dev->irq);
125 if (res != 0) 104 if (res != 0)
126 goto err_disable; 105 goto err_disable;
diff --git a/drivers/net/wireless/b43/phy_a.c b/drivers/net/wireless/b43/phy_a.c
index d90217c3a706..b6428ec16dd6 100644
--- a/drivers/net/wireless/b43/phy_a.c
+++ b/drivers/net/wireless/b43/phy_a.c
@@ -26,6 +26,8 @@
26 26
27*/ 27*/
28 28
29#include <linux/slab.h>
30
29#include "b43.h" 31#include "b43.h"
30#include "phy_a.h" 32#include "phy_a.h"
31#include "phy_common.h" 33#include "phy_common.h"
diff --git a/drivers/net/wireless/b43/phy_common.c b/drivers/net/wireless/b43/phy_common.c
index 75b26e175e8f..8f7d7eff2d80 100644
--- a/drivers/net/wireless/b43/phy_common.c
+++ b/drivers/net/wireless/b43/phy_common.c
@@ -421,3 +421,48 @@ void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on)
421{ 421{
422 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4); 422 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4);
423} 423}
424
425/* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */
426struct b43_c32 b43_cordic(int theta)
427{
428 u32 arctg[] = { 2949120, 1740967, 919879, 466945, 234379, 117304,
429 58666, 29335, 14668, 7334, 3667, 1833, 917, 458,
430 229, 115, 57, 29, };
431 u8 i;
432 s32 tmp;
433 s8 signx = 1;
434 u32 angle = 0;
435 struct b43_c32 ret = { .i = 39797, .q = 0, };
436
437 while (theta > (180 << 16))
438 theta -= (360 << 16);
439 while (theta < -(180 << 16))
440 theta += (360 << 16);
441
442 if (theta > (90 << 16)) {
443 theta -= (180 << 16);
444 signx = -1;
445 } else if (theta < -(90 << 16)) {
446 theta += (180 << 16);
447 signx = -1;
448 }
449
450 for (i = 0; i <= 17; i++) {
451 if (theta > angle) {
452 tmp = ret.i - (ret.q >> i);
453 ret.q += ret.i >> i;
454 ret.i = tmp;
455 angle += arctg[i];
456 } else {
457 tmp = ret.i + (ret.q >> i);
458 ret.q -= ret.i >> i;
459 ret.i = tmp;
460 angle -= arctg[i];
461 }
462 }
463
464 ret.i *= signx;
465 ret.q *= signx;
466
467 return ret;
468}
diff --git a/drivers/net/wireless/b43/phy_common.h b/drivers/net/wireless/b43/phy_common.h
index 9edd4e8e0c85..bd480b481bfc 100644
--- a/drivers/net/wireless/b43/phy_common.h
+++ b/drivers/net/wireless/b43/phy_common.h
@@ -5,6 +5,12 @@
5 5
6struct b43_wldev; 6struct b43_wldev;
7 7
8/* Complex number using 2 32-bit signed integers */
9struct b43_c32 { s32 i, q; };
10
11#define CORDIC_CONVERT(value) (((value) >= 0) ? \
12 ((((value) >> 15) + 1) >> 1) : \
13 -((((-(value)) >> 15) + 1) >> 1))
8 14
9/* PHY register routing bits */ 15/* PHY register routing bits */
10#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */ 16#define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
@@ -212,6 +218,9 @@ struct b43_phy {
212 bool supports_2ghz; 218 bool supports_2ghz;
213 bool supports_5ghz; 219 bool supports_5ghz;
214 220
221 /* HT info */
222 bool is_40mhz;
223
215 /* GMODE bit enabled? */ 224 /* GMODE bit enabled? */
216 bool gmode; 225 bool gmode;
217 226
@@ -418,5 +427,6 @@ int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
418 */ 427 */
419void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on); 428void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on);
420 429
430struct b43_c32 b43_cordic(int theta);
421 431
422#endif /* LINUX_B43_PHY_COMMON_H_ */ 432#endif /* LINUX_B43_PHY_COMMON_H_ */
diff --git a/drivers/net/wireless/b43/phy_g.c b/drivers/net/wireless/b43/phy_g.c
index 382826a8da82..29bf34ced865 100644
--- a/drivers/net/wireless/b43/phy_g.c
+++ b/drivers/net/wireless/b43/phy_g.c
@@ -33,6 +33,7 @@
33#include "main.h" 33#include "main.h"
34 34
35#include <linux/bitrev.h> 35#include <linux/bitrev.h>
36#include <linux/slab.h>
36 37
37 38
38static const s8 b43_tssi2dbm_g_table[] = { 39static const s8 b43_tssi2dbm_g_table[] = {
diff --git a/drivers/net/wireless/b43/phy_lp.c b/drivers/net/wireless/b43/phy_lp.c
index 1e318d815a5b..c6afe9d94590 100644
--- a/drivers/net/wireless/b43/phy_lp.c
+++ b/drivers/net/wireless/b43/phy_lp.c
@@ -23,6 +23,8 @@
23 23
24*/ 24*/
25 25
26#include <linux/slab.h>
27
26#include "b43.h" 28#include "b43.h"
27#include "main.h" 29#include "main.h"
28#include "phy_lp.h" 30#include "phy_lp.h"
@@ -67,6 +69,7 @@ static void b43_lpphy_op_prepare_structs(struct b43_wldev *dev)
67 struct b43_phy_lp *lpphy = phy->lp; 69 struct b43_phy_lp *lpphy = phy->lp;
68 70
69 memset(lpphy, 0, sizeof(*lpphy)); 71 memset(lpphy, 0, sizeof(*lpphy));
72 lpphy->antenna = B43_ANTENNA_DEFAULT;
70 73
71 //TODO 74 //TODO
72} 75}
@@ -79,6 +82,7 @@ static void b43_lpphy_op_free(struct b43_wldev *dev)
79 dev->phy.lp = NULL; 82 dev->phy.lp = NULL;
80} 83}
81 84
85/* http://bcm-v4.sipsolutions.net/802.11/PHY/LP/ReadBandSrom */
82static void lpphy_read_band_sprom(struct b43_wldev *dev) 86static void lpphy_read_band_sprom(struct b43_wldev *dev)
83{ 87{
84 struct b43_phy_lp *lpphy = dev->phy.lp; 88 struct b43_phy_lp *lpphy = dev->phy.lp;
@@ -100,6 +104,12 @@ static void lpphy_read_band_sprom(struct b43_wldev *dev)
100 maxpwr = bus->sprom.maxpwr_bg; 104 maxpwr = bus->sprom.maxpwr_bg;
101 lpphy->max_tx_pwr_med_band = maxpwr; 105 lpphy->max_tx_pwr_med_band = maxpwr;
102 cckpo = bus->sprom.cck2gpo; 106 cckpo = bus->sprom.cck2gpo;
107 /*
108 * We don't read SPROM's opo as specs say. On rev8 SPROMs
109 * opo == ofdm2gpo and we don't know any SSB with LP-PHY
110 * and SPROM rev below 8.
111 */
112 B43_WARN_ON(bus->sprom.revision < 8);
103 ofdmpo = bus->sprom.ofdm2gpo; 113 ofdmpo = bus->sprom.ofdm2gpo;
104 if (cckpo) { 114 if (cckpo) {
105 for (i = 0; i < 4; i++) { 115 for (i = 0; i < 4; i++) {
@@ -751,11 +761,17 @@ static void lpphy_clear_deaf(struct b43_wldev *dev, bool user)
751 } 761 }
752} 762}
753 763
764static void lpphy_set_trsw_over(struct b43_wldev *dev, bool tx, bool rx)
765{
766 u16 trsw = (tx << 1) | rx;
767 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, trsw);
768 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
769}
770
754static void lpphy_disable_crs(struct b43_wldev *dev, bool user) 771static void lpphy_disable_crs(struct b43_wldev *dev, bool user)
755{ 772{
756 lpphy_set_deaf(dev, user); 773 lpphy_set_deaf(dev, user);
757 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x1); 774 lpphy_set_trsw_over(dev, false, true);
758 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
759 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB); 775 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB);
760 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4); 776 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4);
761 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7); 777 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7);
@@ -790,6 +806,60 @@ static void lpphy_restore_crs(struct b43_wldev *dev, bool user)
790 806
791struct lpphy_tx_gains { u16 gm, pga, pad, dac; }; 807struct lpphy_tx_gains { u16 gm, pga, pad, dac; };
792 808
809static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
810{
811 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE);
812 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF);
813 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF);
814 if (dev->phy.rev >= 2) {
815 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
816 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
817 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF);
818 b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7);
819 }
820 } else {
821 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF);
822 }
823}
824
825static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
826{
827 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);
828 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
829 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
830 if (dev->phy.rev >= 2) {
831 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
832 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
833 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);
834 b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);
835 }
836 } else {
837 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);
838 }
839}
840
841static void lpphy_disable_tx_gain_override(struct b43_wldev *dev)
842{
843 if (dev->phy.rev < 2)
844 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
845 else {
846 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F);
847 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF);
848 }
849 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF);
850}
851
852static void lpphy_enable_tx_gain_override(struct b43_wldev *dev)
853{
854 if (dev->phy.rev < 2)
855 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
856 else {
857 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x80);
858 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x4000);
859 }
860 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x40);
861}
862
793static struct lpphy_tx_gains lpphy_get_tx_gains(struct b43_wldev *dev) 863static struct lpphy_tx_gains lpphy_get_tx_gains(struct b43_wldev *dev)
794{ 864{
795 struct lpphy_tx_gains gains; 865 struct lpphy_tx_gains gains;
@@ -819,6 +889,17 @@ static void lpphy_set_dac_gain(struct b43_wldev *dev, u16 dac)
819 b43_phy_maskset(dev, B43_LPPHY_AFE_DAC_CTL, 0xF000, ctl); 889 b43_phy_maskset(dev, B43_LPPHY_AFE_DAC_CTL, 0xF000, ctl);
820} 890}
821 891
892static u16 lpphy_get_pa_gain(struct b43_wldev *dev)
893{
894 return b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x7F;
895}
896
897static void lpphy_set_pa_gain(struct b43_wldev *dev, u16 gain)
898{
899 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), 0xE03F, gain << 6);
900 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD), 0x80FF, gain << 8);
901}
902
822static void lpphy_set_tx_gains(struct b43_wldev *dev, 903static void lpphy_set_tx_gains(struct b43_wldev *dev,
823 struct lpphy_tx_gains gains) 904 struct lpphy_tx_gains gains)
824{ 905{
@@ -829,25 +910,22 @@ static void lpphy_set_tx_gains(struct b43_wldev *dev,
829 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, 910 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
830 0xF800, rf_gain); 911 0xF800, rf_gain);
831 } else { 912 } else {
832 pa_gain = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x1FC0; 913 pa_gain = lpphy_get_pa_gain(dev);
833 pa_gain <<= 2;
834 b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, 914 b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
835 (gains.pga << 8) | gains.gm); 915 (gains.pga << 8) | gains.gm);
916 /*
917 * SPEC FIXME The spec calls for (pa_gain << 8) here, but that
918 * conflicts with the spec for set_pa_gain! Vendor driver bug?
919 */
836 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), 920 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB),
837 0x8000, gains.pad | pa_gain); 921 0x8000, gains.pad | (pa_gain << 6));
838 b43_phy_write(dev, B43_PHY_OFDM(0xFC), 922 b43_phy_write(dev, B43_PHY_OFDM(0xFC),
839 (gains.pga << 8) | gains.gm); 923 (gains.pga << 8) | gains.gm);
840 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD), 924 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD),
841 0x8000, gains.pad | pa_gain); 925 0x8000, gains.pad | (pa_gain << 8));
842 } 926 }
843 lpphy_set_dac_gain(dev, gains.dac); 927 lpphy_set_dac_gain(dev, gains.dac);
844 if (dev->phy.rev < 2) { 928 lpphy_enable_tx_gain_override(dev);
845 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF, 1 << 8);
846 } else {
847 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F, 1 << 7);
848 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF, 1 << 14);
849 }
850 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF, 1 << 6);
851} 929}
852 930
853static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain) 931static void lpphy_rev0_1_set_rx_gain(struct b43_wldev *dev, u32 gain)
@@ -887,38 +965,6 @@ static void lpphy_rev2plus_set_rx_gain(struct b43_wldev *dev, u32 gain)
887 } 965 }
888} 966}
889 967
890static void lpphy_disable_rx_gain_override(struct b43_wldev *dev)
891{
892 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE);
893 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF);
894 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF);
895 if (dev->phy.rev >= 2) {
896 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF);
897 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
898 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF);
899 b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7);
900 }
901 } else {
902 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF);
903 }
904}
905
906static void lpphy_enable_rx_gain_override(struct b43_wldev *dev)
907{
908 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1);
909 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10);
910 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40);
911 if (dev->phy.rev >= 2) {
912 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100);
913 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
914 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400);
915 b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8);
916 }
917 } else {
918 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200);
919 }
920}
921
922static void lpphy_set_rx_gain(struct b43_wldev *dev, u32 gain) 968static void lpphy_set_rx_gain(struct b43_wldev *dev, u32 gain)
923{ 969{
924 if (dev->phy.rev < 2) 970 if (dev->phy.rev < 2)
@@ -1003,8 +1049,7 @@ static int lpphy_loopback(struct b43_wldev *dev)
1003 1049
1004 memset(&iq_est, 0, sizeof(iq_est)); 1050 memset(&iq_est, 0, sizeof(iq_est));
1005 1051
1006 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, 0x3); 1052 lpphy_set_trsw_over(dev, true, true);
1007 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3);
1008 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 1); 1053 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 1);
1009 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE); 1054 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE);
1010 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800); 1055 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);
@@ -1126,7 +1171,7 @@ static void lpphy_set_tx_power_control(struct b43_wldev *dev,
1126 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 1171 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM,
1127 0x8FFF, ((u16)lpphy->tssi_npt << 16)); 1172 0x8FFF, ((u16)lpphy->tssi_npt << 16));
1128 //TODO Set "TSSI Transmit Count" variable to total transmitted frame count 1173 //TODO Set "TSSI Transmit Count" variable to total transmitted frame count
1129 //TODO Disable TX gain override 1174 lpphy_disable_tx_gain_override(dev);
1130 lpphy->tx_pwr_idx_over = -1; 1175 lpphy->tx_pwr_idx_over = -1;
1131 } 1176 }
1132 } 1177 }
@@ -1312,15 +1357,73 @@ static void lpphy_calibrate_rc(struct b43_wldev *dev)
1312 } 1357 }
1313} 1358}
1314 1359
1360static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
1361{
1362 if (dev->phy.rev >= 2)
1363 return; // rev2+ doesn't support antenna diversity
1364
1365 if (B43_WARN_ON(antenna > B43_ANTENNA_AUTO1))
1366 return;
1367
1368 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP);
1369
1370 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFD, antenna & 0x2);
1371 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFE, antenna & 0x1);
1372
1373 b43_hf_write(dev, b43_hf_read(dev) | B43_HF_ANTDIVHELP);
1374
1375 dev->phy.lp->antenna = antenna;
1376}
1377
1378static void lpphy_set_tx_iqcc(struct b43_wldev *dev, u16 a, u16 b)
1379{
1380 u16 tmp[2];
1381
1382 tmp[0] = a;
1383 tmp[1] = b;
1384 b43_lptab_write_bulk(dev, B43_LPTAB16(0, 80), 2, tmp);
1385}
1386
1315static void lpphy_set_tx_power_by_index(struct b43_wldev *dev, u8 index) 1387static void lpphy_set_tx_power_by_index(struct b43_wldev *dev, u8 index)
1316{ 1388{
1317 struct b43_phy_lp *lpphy = dev->phy.lp; 1389 struct b43_phy_lp *lpphy = dev->phy.lp;
1390 struct lpphy_tx_gains gains;
1391 u32 iq_comp, tx_gain, coeff, rf_power;
1318 1392
1319 lpphy->tx_pwr_idx_over = index; 1393 lpphy->tx_pwr_idx_over = index;
1394 lpphy_read_tx_pctl_mode_from_hardware(dev);
1320 if (lpphy->txpctl_mode != B43_LPPHY_TXPCTL_OFF) 1395 if (lpphy->txpctl_mode != B43_LPPHY_TXPCTL_OFF)
1321 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_SW); 1396 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_SW);
1322 1397 if (dev->phy.rev >= 2) {
1323 //TODO 1398 iq_comp = b43_lptab_read(dev, B43_LPTAB32(7, index + 320));
1399 tx_gain = b43_lptab_read(dev, B43_LPTAB32(7, index + 192));
1400 gains.pad = (tx_gain >> 16) & 0xFF;
1401 gains.gm = tx_gain & 0xFF;
1402 gains.pga = (tx_gain >> 8) & 0xFF;
1403 gains.dac = (iq_comp >> 28) & 0xFF;
1404 lpphy_set_tx_gains(dev, gains);
1405 } else {
1406 iq_comp = b43_lptab_read(dev, B43_LPTAB32(10, index + 320));
1407 tx_gain = b43_lptab_read(dev, B43_LPTAB32(10, index + 192));
1408 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL,
1409 0xF800, (tx_gain >> 4) & 0x7FFF);
1410 lpphy_set_dac_gain(dev, tx_gain & 0x7);
1411 lpphy_set_pa_gain(dev, (tx_gain >> 24) & 0x7F);
1412 }
1413 lpphy_set_bb_mult(dev, (iq_comp >> 20) & 0xFF);
1414 lpphy_set_tx_iqcc(dev, (iq_comp >> 10) & 0x3FF, iq_comp & 0x3FF);
1415 if (dev->phy.rev >= 2) {
1416 coeff = b43_lptab_read(dev, B43_LPTAB32(7, index + 448));
1417 } else {
1418 coeff = b43_lptab_read(dev, B43_LPTAB32(10, index + 448));
1419 }
1420 b43_lptab_write(dev, B43_LPTAB16(0, 85), coeff & 0xFFFF);
1421 if (dev->phy.rev >= 2) {
1422 rf_power = b43_lptab_read(dev, B43_LPTAB32(7, index + 576));
1423 b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00,
1424 rf_power & 0xFFFF);//SPEC FIXME mask & set != 0
1425 }
1426 lpphy_enable_tx_gain_override(dev);
1324} 1427}
1325 1428
1326static void lpphy_btcoex_override(struct b43_wldev *dev) 1429static void lpphy_btcoex_override(struct b43_wldev *dev)
@@ -1329,58 +1432,45 @@ static void lpphy_btcoex_override(struct b43_wldev *dev)
1329 b43_write16(dev, B43_MMIO_BTCOEX_TXCTL, 0xFF); 1432 b43_write16(dev, B43_MMIO_BTCOEX_TXCTL, 0xFF);
1330} 1433}
1331 1434
1332static void lpphy_pr41573_workaround(struct b43_wldev *dev) 1435static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
1436 bool blocked)
1333{ 1437{
1334 struct b43_phy_lp *lpphy = dev->phy.lp; 1438 //TODO check MAC control register
1335 u32 *saved_tab; 1439 if (blocked) {
1336 const unsigned int saved_tab_size = 256; 1440 if (dev->phy.rev >= 2) {
1337 enum b43_lpphy_txpctl_mode txpctl_mode; 1441 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x83FF);
1338 s8 tx_pwr_idx_over; 1442 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);
1339 u16 tssi_npt, tssi_idx; 1443 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0x80FF);
1340 1444 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xDFFF);
1341 saved_tab = kcalloc(saved_tab_size, sizeof(saved_tab[0]), GFP_KERNEL); 1445 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0808);
1342 if (!saved_tab) { 1446 } else {
1343 b43err(dev->wl, "PR41573 failed. Out of memory!\n"); 1447 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xE0FF);
1344 return; 1448 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00);
1345 } 1449 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFCFF);
1346 1450 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0018);
1347 lpphy_read_tx_pctl_mode_from_hardware(dev); 1451 }
1348 txpctl_mode = lpphy->txpctl_mode;
1349 tx_pwr_idx_over = lpphy->tx_pwr_idx_over;
1350 tssi_npt = lpphy->tssi_npt;
1351 tssi_idx = lpphy->tssi_idx;
1352
1353 if (dev->phy.rev < 2) {
1354 b43_lptab_read_bulk(dev, B43_LPTAB32(10, 0x140),
1355 saved_tab_size, saved_tab);
1356 } else { 1452 } else {
1357 b43_lptab_read_bulk(dev, B43_LPTAB32(7, 0x140), 1453 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xE0FF);
1358 saved_tab_size, saved_tab); 1454 if (dev->phy.rev >= 2)
1455 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xF7F7);
1456 else
1457 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFE7);
1359 } 1458 }
1360 //TODO
1361
1362 kfree(saved_tab);
1363} 1459}
1364 1460
1365static void lpphy_calibration(struct b43_wldev *dev) 1461/* This was previously called lpphy_japan_filter */
1462static void lpphy_set_analog_filter(struct b43_wldev *dev, int channel)
1366{ 1463{
1367 struct b43_phy_lp *lpphy = dev->phy.lp; 1464 struct b43_phy_lp *lpphy = dev->phy.lp;
1368 enum b43_lpphy_txpctl_mode saved_pctl_mode; 1465 u16 tmp = (channel == 14); //SPEC FIXME check japanwidefilter!
1369
1370 b43_mac_suspend(dev);
1371
1372 lpphy_btcoex_override(dev);
1373 lpphy_read_tx_pctl_mode_from_hardware(dev);
1374 saved_pctl_mode = lpphy->txpctl_mode;
1375 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1376 //TODO Perform transmit power table I/Q LO calibration
1377 if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF))
1378 lpphy_pr41573_workaround(dev);
1379 //TODO If a full calibration has not been performed on this channel yet, perform PAPD TX-power calibration
1380 lpphy_set_tx_power_control(dev, saved_pctl_mode);
1381 //TODO Perform I/Q calibration with a single control value set
1382 1466
1383 b43_mac_enable(dev); 1467 if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific?
1468 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFCFF, tmp << 9);
1469 if ((dev->phy.rev == 1) && (lpphy->rc_cap))
1470 lpphy_set_rc_cap(dev);
1471 } else {
1472 b43_radio_write(dev, B2063_TX_BB_SP3, 0x3F);
1473 }
1384} 1474}
1385 1475
1386static void lpphy_set_tssi_mux(struct b43_wldev *dev, enum tssi_mux_mode mode) 1476static void lpphy_set_tssi_mux(struct b43_wldev *dev, enum tssi_mux_mode mode)
@@ -1489,6 +1579,420 @@ static void lpphy_tx_pctl_init(struct b43_wldev *dev)
1489 } 1579 }
1490} 1580}
1491 1581
1582static void lpphy_pr41573_workaround(struct b43_wldev *dev)
1583{
1584 struct b43_phy_lp *lpphy = dev->phy.lp;
1585 u32 *saved_tab;
1586 const unsigned int saved_tab_size = 256;
1587 enum b43_lpphy_txpctl_mode txpctl_mode;
1588 s8 tx_pwr_idx_over;
1589 u16 tssi_npt, tssi_idx;
1590
1591 saved_tab = kcalloc(saved_tab_size, sizeof(saved_tab[0]), GFP_KERNEL);
1592 if (!saved_tab) {
1593 b43err(dev->wl, "PR41573 failed. Out of memory!\n");
1594 return;
1595 }
1596
1597 lpphy_read_tx_pctl_mode_from_hardware(dev);
1598 txpctl_mode = lpphy->txpctl_mode;
1599 tx_pwr_idx_over = lpphy->tx_pwr_idx_over;
1600 tssi_npt = lpphy->tssi_npt;
1601 tssi_idx = lpphy->tssi_idx;
1602
1603 if (dev->phy.rev < 2) {
1604 b43_lptab_read_bulk(dev, B43_LPTAB32(10, 0x140),
1605 saved_tab_size, saved_tab);
1606 } else {
1607 b43_lptab_read_bulk(dev, B43_LPTAB32(7, 0x140),
1608 saved_tab_size, saved_tab);
1609 }
1610 //FIXME PHY reset
1611 lpphy_table_init(dev); //FIXME is table init needed?
1612 lpphy_baseband_init(dev);
1613 lpphy_tx_pctl_init(dev);
1614 b43_lpphy_op_software_rfkill(dev, false);
1615 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1616 if (dev->phy.rev < 2) {
1617 b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0x140),
1618 saved_tab_size, saved_tab);
1619 } else {
1620 b43_lptab_write_bulk(dev, B43_LPTAB32(7, 0x140),
1621 saved_tab_size, saved_tab);
1622 }
1623 b43_write16(dev, B43_MMIO_CHANNEL, lpphy->channel);
1624 lpphy->tssi_npt = tssi_npt;
1625 lpphy->tssi_idx = tssi_idx;
1626 lpphy_set_analog_filter(dev, lpphy->channel);
1627 if (tx_pwr_idx_over != -1)
1628 lpphy_set_tx_power_by_index(dev, tx_pwr_idx_over);
1629 if (lpphy->rc_cap)
1630 lpphy_set_rc_cap(dev);
1631 b43_lpphy_op_set_rx_antenna(dev, lpphy->antenna);
1632 lpphy_set_tx_power_control(dev, txpctl_mode);
1633 kfree(saved_tab);
1634}
1635
1636struct lpphy_rx_iq_comp { u8 chan; s8 c1, c0; };
1637
1638static const struct lpphy_rx_iq_comp lpphy_5354_iq_table[] = {
1639 { .chan = 1, .c1 = -66, .c0 = 15, },
1640 { .chan = 2, .c1 = -66, .c0 = 15, },
1641 { .chan = 3, .c1 = -66, .c0 = 15, },
1642 { .chan = 4, .c1 = -66, .c0 = 15, },
1643 { .chan = 5, .c1 = -66, .c0 = 15, },
1644 { .chan = 6, .c1 = -66, .c0 = 15, },
1645 { .chan = 7, .c1 = -66, .c0 = 14, },
1646 { .chan = 8, .c1 = -66, .c0 = 14, },
1647 { .chan = 9, .c1 = -66, .c0 = 14, },
1648 { .chan = 10, .c1 = -66, .c0 = 14, },
1649 { .chan = 11, .c1 = -66, .c0 = 14, },
1650 { .chan = 12, .c1 = -66, .c0 = 13, },
1651 { .chan = 13, .c1 = -66, .c0 = 13, },
1652 { .chan = 14, .c1 = -66, .c0 = 13, },
1653};
1654
1655static const struct lpphy_rx_iq_comp lpphy_rev0_1_iq_table[] = {
1656 { .chan = 1, .c1 = -64, .c0 = 13, },
1657 { .chan = 2, .c1 = -64, .c0 = 13, },
1658 { .chan = 3, .c1 = -64, .c0 = 13, },
1659 { .chan = 4, .c1 = -64, .c0 = 13, },
1660 { .chan = 5, .c1 = -64, .c0 = 12, },
1661 { .chan = 6, .c1 = -64, .c0 = 12, },
1662 { .chan = 7, .c1 = -64, .c0 = 12, },
1663 { .chan = 8, .c1 = -64, .c0 = 12, },
1664 { .chan = 9, .c1 = -64, .c0 = 12, },
1665 { .chan = 10, .c1 = -64, .c0 = 11, },
1666 { .chan = 11, .c1 = -64, .c0 = 11, },
1667 { .chan = 12, .c1 = -64, .c0 = 11, },
1668 { .chan = 13, .c1 = -64, .c0 = 11, },
1669 { .chan = 14, .c1 = -64, .c0 = 10, },
1670 { .chan = 34, .c1 = -62, .c0 = 24, },
1671 { .chan = 38, .c1 = -62, .c0 = 24, },
1672 { .chan = 42, .c1 = -62, .c0 = 24, },
1673 { .chan = 46, .c1 = -62, .c0 = 23, },
1674 { .chan = 36, .c1 = -62, .c0 = 24, },
1675 { .chan = 40, .c1 = -62, .c0 = 24, },
1676 { .chan = 44, .c1 = -62, .c0 = 23, },
1677 { .chan = 48, .c1 = -62, .c0 = 23, },
1678 { .chan = 52, .c1 = -62, .c0 = 23, },
1679 { .chan = 56, .c1 = -62, .c0 = 22, },
1680 { .chan = 60, .c1 = -62, .c0 = 22, },
1681 { .chan = 64, .c1 = -62, .c0 = 22, },
1682 { .chan = 100, .c1 = -62, .c0 = 16, },
1683 { .chan = 104, .c1 = -62, .c0 = 16, },
1684 { .chan = 108, .c1 = -62, .c0 = 15, },
1685 { .chan = 112, .c1 = -62, .c0 = 14, },
1686 { .chan = 116, .c1 = -62, .c0 = 14, },
1687 { .chan = 120, .c1 = -62, .c0 = 13, },
1688 { .chan = 124, .c1 = -62, .c0 = 12, },
1689 { .chan = 128, .c1 = -62, .c0 = 12, },
1690 { .chan = 132, .c1 = -62, .c0 = 12, },
1691 { .chan = 136, .c1 = -62, .c0 = 11, },
1692 { .chan = 140, .c1 = -62, .c0 = 10, },
1693 { .chan = 149, .c1 = -61, .c0 = 9, },
1694 { .chan = 153, .c1 = -61, .c0 = 9, },
1695 { .chan = 157, .c1 = -61, .c0 = 9, },
1696 { .chan = 161, .c1 = -61, .c0 = 8, },
1697 { .chan = 165, .c1 = -61, .c0 = 8, },
1698 { .chan = 184, .c1 = -62, .c0 = 25, },
1699 { .chan = 188, .c1 = -62, .c0 = 25, },
1700 { .chan = 192, .c1 = -62, .c0 = 25, },
1701 { .chan = 196, .c1 = -62, .c0 = 25, },
1702 { .chan = 200, .c1 = -62, .c0 = 25, },
1703 { .chan = 204, .c1 = -62, .c0 = 25, },
1704 { .chan = 208, .c1 = -62, .c0 = 25, },
1705 { .chan = 212, .c1 = -62, .c0 = 25, },
1706 { .chan = 216, .c1 = -62, .c0 = 26, },
1707};
1708
1709static const struct lpphy_rx_iq_comp lpphy_rev2plus_iq_comp = {
1710 .chan = 0,
1711 .c1 = -64,
1712 .c0 = 0,
1713};
1714
1715static int lpphy_calc_rx_iq_comp(struct b43_wldev *dev, u16 samples)
1716{
1717 struct lpphy_iq_est iq_est;
1718 u16 c0, c1;
1719 int prod, ipwr, qpwr, prod_msb, q_msb, tmp1, tmp2, tmp3, tmp4, ret;
1720
1721 c1 = b43_phy_read(dev, B43_LPPHY_RX_COMP_COEFF_S);
1722 c0 = c1 >> 8;
1723 c1 |= 0xFF;
1724
1725 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, 0x00C0);
1726 b43_phy_mask(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF);
1727
1728 ret = lpphy_rx_iq_est(dev, samples, 32, &iq_est);
1729 if (!ret)
1730 goto out;
1731
1732 prod = iq_est.iq_prod;
1733 ipwr = iq_est.i_pwr;
1734 qpwr = iq_est.q_pwr;
1735
1736 if (ipwr + qpwr < 2) {
1737 ret = 0;
1738 goto out;
1739 }
1740
1741 prod_msb = fls(abs(prod));
1742 q_msb = fls(abs(qpwr));
1743 tmp1 = prod_msb - 20;
1744
1745 if (tmp1 >= 0) {
1746 tmp3 = ((prod << (30 - prod_msb)) + (ipwr >> (1 + tmp1))) /
1747 (ipwr >> tmp1);
1748 } else {
1749 tmp3 = ((prod << (30 - prod_msb)) + (ipwr << (-1 - tmp1))) /
1750 (ipwr << -tmp1);
1751 }
1752
1753 tmp2 = q_msb - 11;
1754
1755 if (tmp2 >= 0)
1756 tmp4 = (qpwr << (31 - q_msb)) / (ipwr >> tmp2);
1757 else
1758 tmp4 = (qpwr << (31 - q_msb)) / (ipwr << -tmp2);
1759
1760 tmp4 -= tmp3 * tmp3;
1761 tmp4 = -int_sqrt(tmp4);
1762
1763 c0 = tmp3 >> 3;
1764 c1 = tmp4 >> 4;
1765
1766out:
1767 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, c1);
1768 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF, c0 << 8);
1769 return ret;
1770}
1771
1772static void lpphy_run_samples(struct b43_wldev *dev, u16 samples, u16 loops,
1773 u16 wait)
1774{
1775 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL,
1776 0xFFC0, samples - 1);
1777 if (loops != 0xFFFF)
1778 loops--;
1779 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000, loops);
1780 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL, 0x3F, wait << 6);
1781 b43_phy_set(dev, B43_LPPHY_A_PHY_CTL_ADDR, 0x1);
1782}
1783
1784//SPEC FIXME what does a negative freq mean?
1785static void lpphy_start_tx_tone(struct b43_wldev *dev, s32 freq, u16 max)
1786{
1787 struct b43_phy_lp *lpphy = dev->phy.lp;
1788 u16 buf[64];
1789 int i, samples = 0, angle = 0;
1790 int rotation = (((36 * freq) / 20) << 16) / 100;
1791 struct b43_c32 sample;
1792
1793 lpphy->tx_tone_freq = freq;
1794
1795 if (freq) {
1796 /* Find i for which abs(freq) integrally divides 20000 * i */
1797 for (i = 1; samples * abs(freq) != 20000 * i; i++) {
1798 samples = (20000 * i) / abs(freq);
1799 if(B43_WARN_ON(samples > 63))
1800 return;
1801 }
1802 } else {
1803 samples = 2;
1804 }
1805
1806 for (i = 0; i < samples; i++) {
1807 sample = b43_cordic(angle);
1808 angle += rotation;
1809 buf[i] = CORDIC_CONVERT((sample.i * max) & 0xFF) << 8;
1810 buf[i] |= CORDIC_CONVERT((sample.q * max) & 0xFF);
1811 }
1812
1813 b43_lptab_write_bulk(dev, B43_LPTAB16(5, 0), samples, buf);
1814
1815 lpphy_run_samples(dev, samples, 0xFFFF, 0);
1816}
1817
1818static void lpphy_stop_tx_tone(struct b43_wldev *dev)
1819{
1820 struct b43_phy_lp *lpphy = dev->phy.lp;
1821 int i;
1822
1823 lpphy->tx_tone_freq = 0;
1824
1825 b43_phy_mask(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000);
1826 for (i = 0; i < 31; i++) {
1827 if (!(b43_phy_read(dev, B43_LPPHY_A_PHY_CTL_ADDR) & 0x1))
1828 break;
1829 udelay(100);
1830 }
1831}
1832
1833
1834static void lpphy_papd_cal(struct b43_wldev *dev, struct lpphy_tx_gains gains,
1835 int mode, bool useindex, u8 index)
1836{
1837 //TODO
1838}
1839
1840static void lpphy_papd_cal_txpwr(struct b43_wldev *dev)
1841{
1842 struct b43_phy_lp *lpphy = dev->phy.lp;
1843 struct ssb_bus *bus = dev->dev->bus;
1844 struct lpphy_tx_gains gains, oldgains;
1845 int old_txpctl, old_afe_ovr, old_rf, old_bbmult;
1846
1847 lpphy_read_tx_pctl_mode_from_hardware(dev);
1848 old_txpctl = lpphy->txpctl_mode;
1849 old_afe_ovr = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40;
1850 if (old_afe_ovr)
1851 oldgains = lpphy_get_tx_gains(dev);
1852 old_rf = b43_phy_read(dev, B43_LPPHY_RF_PWR_OVERRIDE) & 0xFF;
1853 old_bbmult = lpphy_get_bb_mult(dev);
1854
1855 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1856
1857 if (bus->chip_id == 0x4325 && bus->chip_rev == 0)
1858 lpphy_papd_cal(dev, gains, 0, 1, 30);
1859 else
1860 lpphy_papd_cal(dev, gains, 0, 1, 65);
1861
1862 if (old_afe_ovr)
1863 lpphy_set_tx_gains(dev, oldgains);
1864 lpphy_set_bb_mult(dev, old_bbmult);
1865 lpphy_set_tx_power_control(dev, old_txpctl);
1866 b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00, old_rf);
1867}
1868
1869static int lpphy_rx_iq_cal(struct b43_wldev *dev, bool noise, bool tx,
1870 bool rx, bool pa, struct lpphy_tx_gains *gains)
1871{
1872 struct b43_phy_lp *lpphy = dev->phy.lp;
1873 struct ssb_bus *bus = dev->dev->bus;
1874 const struct lpphy_rx_iq_comp *iqcomp = NULL;
1875 struct lpphy_tx_gains nogains, oldgains;
1876 u16 tmp;
1877 int i, ret;
1878
1879 memset(&nogains, 0, sizeof(nogains));
1880 memset(&oldgains, 0, sizeof(oldgains));
1881
1882 if (bus->chip_id == 0x5354) {
1883 for (i = 0; i < ARRAY_SIZE(lpphy_5354_iq_table); i++) {
1884 if (lpphy_5354_iq_table[i].chan == lpphy->channel) {
1885 iqcomp = &lpphy_5354_iq_table[i];
1886 }
1887 }
1888 } else if (dev->phy.rev >= 2) {
1889 iqcomp = &lpphy_rev2plus_iq_comp;
1890 } else {
1891 for (i = 0; i < ARRAY_SIZE(lpphy_rev0_1_iq_table); i++) {
1892 if (lpphy_rev0_1_iq_table[i].chan == lpphy->channel) {
1893 iqcomp = &lpphy_rev0_1_iq_table[i];
1894 }
1895 }
1896 }
1897
1898 if (B43_WARN_ON(!iqcomp))
1899 return 0;
1900
1901 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, iqcomp->c1);
1902 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S,
1903 0x00FF, iqcomp->c0 << 8);
1904
1905 if (noise) {
1906 tx = true;
1907 rx = false;
1908 pa = false;
1909 }
1910
1911 lpphy_set_trsw_over(dev, tx, rx);
1912
1913 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
1914 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8);
1915 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0,
1916 0xFFF7, pa << 3);
1917 } else {
1918 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20);
1919 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0,
1920 0xFFDF, pa << 5);
1921 }
1922
1923 tmp = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40;
1924
1925 if (noise)
1926 lpphy_set_rx_gain(dev, 0x2D5D);
1927 else {
1928 if (tmp)
1929 oldgains = lpphy_get_tx_gains(dev);
1930 if (!gains)
1931 gains = &nogains;
1932 lpphy_set_tx_gains(dev, *gains);
1933 }
1934
1935 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE);
1936 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE);
1937 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800);
1938 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800);
1939 lpphy_set_deaf(dev, false);
1940 if (noise)
1941 ret = lpphy_calc_rx_iq_comp(dev, 0xFFF0);
1942 else {
1943 lpphy_start_tx_tone(dev, 4000, 100);
1944 ret = lpphy_calc_rx_iq_comp(dev, 0x4000);
1945 lpphy_stop_tx_tone(dev);
1946 }
1947 lpphy_clear_deaf(dev, false);
1948 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFC);
1949 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7);
1950 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFDF);
1951 if (!noise) {
1952 if (tmp)
1953 lpphy_set_tx_gains(dev, oldgains);
1954 else
1955 lpphy_disable_tx_gain_override(dev);
1956 }
1957 lpphy_disable_rx_gain_override(dev);
1958 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE);
1959 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xF7FF);
1960 return ret;
1961}
1962
1963static void lpphy_calibration(struct b43_wldev *dev)
1964{
1965 struct b43_phy_lp *lpphy = dev->phy.lp;
1966 enum b43_lpphy_txpctl_mode saved_pctl_mode;
1967 bool full_cal = false;
1968
1969 if (lpphy->full_calib_chan != lpphy->channel) {
1970 full_cal = true;
1971 lpphy->full_calib_chan = lpphy->channel;
1972 }
1973
1974 b43_mac_suspend(dev);
1975
1976 lpphy_btcoex_override(dev);
1977 if (dev->phy.rev >= 2)
1978 lpphy_save_dig_flt_state(dev);
1979 lpphy_read_tx_pctl_mode_from_hardware(dev);
1980 saved_pctl_mode = lpphy->txpctl_mode;
1981 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF);
1982 //TODO Perform transmit power table I/Q LO calibration
1983 if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF))
1984 lpphy_pr41573_workaround(dev);
1985 if ((dev->phy.rev >= 2) && full_cal) {
1986 lpphy_papd_cal_txpwr(dev);
1987 }
1988 lpphy_set_tx_power_control(dev, saved_pctl_mode);
1989 if (dev->phy.rev >= 2)
1990 lpphy_restore_dig_flt_state(dev);
1991 lpphy_rx_iq_cal(dev, true, true, false, false, NULL);
1992
1993 b43_mac_enable(dev);
1994}
1995
1492static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg) 1996static u16 b43_lpphy_op_read(struct b43_wldev *dev, u16 reg)
1493{ 1997{
1494 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg); 1998 b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
@@ -1533,12 +2037,6 @@ static void b43_lpphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
1533 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value); 2037 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value);
1534} 2038}
1535 2039
1536static void b43_lpphy_op_software_rfkill(struct b43_wldev *dev,
1537 bool blocked)
1538{
1539 //TODO
1540}
1541
1542struct b206x_channel { 2040struct b206x_channel {
1543 u8 channel; 2041 u8 channel;
1544 u16 freq; 2042 u16 freq;
@@ -2004,22 +2502,6 @@ static int lpphy_b2062_tune(struct b43_wldev *dev,
2004 return err; 2502 return err;
2005} 2503}
2006 2504
2007
2008/* This was previously called lpphy_japan_filter */
2009static void lpphy_set_analog_filter(struct b43_wldev *dev, int channel)
2010{
2011 struct b43_phy_lp *lpphy = dev->phy.lp;
2012 u16 tmp = (channel == 14); //SPEC FIXME check japanwidefilter!
2013
2014 if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific?
2015 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFCFF, tmp << 9);
2016 if ((dev->phy.rev == 1) && (lpphy->rc_cap))
2017 lpphy_set_rc_cap(dev);
2018 } else {
2019 b43_radio_write(dev, B2063_TX_BB_SP3, 0x3F);
2020 }
2021}
2022
2023static void lpphy_b2063_vco_calib(struct b43_wldev *dev) 2505static void lpphy_b2063_vco_calib(struct b43_wldev *dev)
2024{ 2506{
2025 u16 tmp; 2507 u16 tmp;
@@ -2204,18 +2686,6 @@ static int b43_lpphy_op_init(struct b43_wldev *dev)
2204 return 0; 2686 return 0;
2205} 2687}
2206 2688
2207static void b43_lpphy_op_set_rx_antenna(struct b43_wldev *dev, int antenna)
2208{
2209 if (dev->phy.rev >= 2)
2210 return; // rev2+ doesn't support antenna diversity
2211
2212 if (B43_WARN_ON(antenna > B43_ANTENNA_AUTO1))
2213 return;
2214
2215 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFD, antenna & 0x2);
2216 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFE, antenna & 0x1);
2217}
2218
2219static void b43_lpphy_op_adjust_txpower(struct b43_wldev *dev) 2689static void b43_lpphy_op_adjust_txpower(struct b43_wldev *dev)
2220{ 2690{
2221 //TODO 2691 //TODO
@@ -2238,6 +2708,11 @@ void b43_lpphy_op_switch_analog(struct b43_wldev *dev, bool on)
2238 } 2708 }
2239} 2709}
2240 2710
2711static void b43_lpphy_op_pwork_15sec(struct b43_wldev *dev)
2712{
2713 //TODO
2714}
2715
2241const struct b43_phy_operations b43_phyops_lp = { 2716const struct b43_phy_operations b43_phyops_lp = {
2242 .allocate = b43_lpphy_op_allocate, 2717 .allocate = b43_lpphy_op_allocate,
2243 .free = b43_lpphy_op_free, 2718 .free = b43_lpphy_op_free,
@@ -2255,4 +2730,6 @@ const struct b43_phy_operations b43_phyops_lp = {
2255 .set_rx_antenna = b43_lpphy_op_set_rx_antenna, 2730 .set_rx_antenna = b43_lpphy_op_set_rx_antenna,
2256 .recalc_txpower = b43_lpphy_op_recalc_txpower, 2731 .recalc_txpower = b43_lpphy_op_recalc_txpower,
2257 .adjust_txpower = b43_lpphy_op_adjust_txpower, 2732 .adjust_txpower = b43_lpphy_op_adjust_txpower,
2733 .pwork_15sec = b43_lpphy_op_pwork_15sec,
2734 .pwork_60sec = lpphy_calibration,
2258}; 2735};
diff --git a/drivers/net/wireless/b43/phy_lp.h b/drivers/net/wireless/b43/phy_lp.h
index c3232c17b60a..62737f700cbc 100644
--- a/drivers/net/wireless/b43/phy_lp.h
+++ b/drivers/net/wireless/b43/phy_lp.h
@@ -286,6 +286,7 @@
286#define B43_LPPHY_TR_LOOKUP_6 B43_PHY_OFDM(0xC8) /* TR Lookup 6 */ 286#define B43_LPPHY_TR_LOOKUP_6 B43_PHY_OFDM(0xC8) /* TR Lookup 6 */
287#define B43_LPPHY_TR_LOOKUP_7 B43_PHY_OFDM(0xC9) /* TR Lookup 7 */ 287#define B43_LPPHY_TR_LOOKUP_7 B43_PHY_OFDM(0xC9) /* TR Lookup 7 */
288#define B43_LPPHY_TR_LOOKUP_8 B43_PHY_OFDM(0xCA) /* TR Lookup 8 */ 288#define B43_LPPHY_TR_LOOKUP_8 B43_PHY_OFDM(0xCA) /* TR Lookup 8 */
289#define B43_LPPHY_RF_PWR_OVERRIDE B43_PHY_OFDM(0xD3) /* RF power override */
289 290
290 291
291 292
@@ -871,12 +872,12 @@ struct b43_phy_lp {
871 u8 rssi_gs; 872 u8 rssi_gs;
872 873
873 /* RC cap */ 874 /* RC cap */
874 u8 rc_cap; /* FIXME initial value? */ 875 u8 rc_cap;
875 /* BX arch */ 876 /* BX arch */
876 u8 bx_arch; 877 u8 bx_arch;
877 878
878 /* Full calibration channel */ 879 /* Full calibration channel */
879 u8 full_calib_chan; /* FIXME initial value? */ 880 u8 full_calib_chan;
880 881
881 /* Transmit iqlocal best coeffs */ 882 /* Transmit iqlocal best coeffs */
882 bool tx_iqloc_best_coeffs_valid; 883 bool tx_iqloc_best_coeffs_valid;
@@ -891,6 +892,12 @@ struct b43_phy_lp {
891 892
892 /* The channel we are tuned to */ 893 /* The channel we are tuned to */
893 u8 channel; 894 u8 channel;
895
896 /* The active antenna diversity mode */
897 int antenna;
898
899 /* Frequency of the active TX tone */
900 int tx_tone_freq;
894}; 901};
895 902
896enum tssi_mux_mode { 903enum tssi_mux_mode {
diff --git a/drivers/net/wireless/b43/phy_n.c b/drivers/net/wireless/b43/phy_n.c
index 992318a78077..9c7cd282e46c 100644
--- a/drivers/net/wireless/b43/phy_n.c
+++ b/drivers/net/wireless/b43/phy_n.c
@@ -23,12 +23,56 @@
23*/ 23*/
24 24
25#include <linux/delay.h> 25#include <linux/delay.h>
26#include <linux/slab.h>
26#include <linux/types.h> 27#include <linux/types.h>
27 28
28#include "b43.h" 29#include "b43.h"
29#include "phy_n.h" 30#include "phy_n.h"
30#include "tables_nphy.h" 31#include "tables_nphy.h"
32#include "main.h"
31 33
34struct nphy_txgains {
35 u16 txgm[2];
36 u16 pga[2];
37 u16 pad[2];
38 u16 ipa[2];
39};
40
41struct nphy_iqcal_params {
42 u16 txgm;
43 u16 pga;
44 u16 pad;
45 u16 ipa;
46 u16 cal_gain;
47 u16 ncorr[5];
48};
49
50struct nphy_iq_est {
51 s32 iq0_prod;
52 u32 i0_pwr;
53 u32 q0_pwr;
54 s32 iq1_prod;
55 u32 i1_pwr;
56 u32 q1_pwr;
57};
58
59enum b43_nphy_rf_sequence {
60 B43_RFSEQ_RX2TX,
61 B43_RFSEQ_TX2RX,
62 B43_RFSEQ_RESET2RX,
63 B43_RFSEQ_UPDATE_GAINH,
64 B43_RFSEQ_UPDATE_GAINL,
65 B43_RFSEQ_UPDATE_GAINU,
66};
67
68static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
69 u8 *events, u8 *delays, u8 length);
70static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
71 enum b43_nphy_rf_sequence seq);
72static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
73 u16 value, u8 core, bool off);
74static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
75 u16 value, u8 core);
32 76
33void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna) 77void b43_nphy_set_rxantenna(struct b43_wldev *dev, int antenna)
34{//TODO 78{//TODO
@@ -197,173 +241,1020 @@ void b43_nphy_radio_turn_off(struct b43_wldev *dev)
197 ~B43_NPHY_RFCTL_CMD_EN); 241 ~B43_NPHY_RFCTL_CMD_EN);
198} 242}
199 243
200#define ntab_upload(dev, offset, data) do { \ 244/*
201 unsigned int i; \ 245 * Upload the N-PHY tables.
202 for (i = 0; i < (offset##_SIZE); i++) \ 246 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/InitTables
203 b43_ntab_write(dev, (offset) + i, (data)[i]); \ 247 */
204 } while (0)
205
206/* Upload the N-PHY tables. */
207static void b43_nphy_tables_init(struct b43_wldev *dev) 248static void b43_nphy_tables_init(struct b43_wldev *dev)
208{ 249{
209 /* Static tables */ 250 if (dev->phy.rev < 3)
210 ntab_upload(dev, B43_NTAB_FRAMESTRUCT, b43_ntab_framestruct); 251 b43_nphy_rev0_1_2_tables_init(dev);
211 ntab_upload(dev, B43_NTAB_FRAMELT, b43_ntab_framelookup); 252 else
212 ntab_upload(dev, B43_NTAB_TMAP, b43_ntab_tmap); 253 b43_nphy_rev3plus_tables_init(dev);
213 ntab_upload(dev, B43_NTAB_TDTRN, b43_ntab_tdtrn); 254}
214 ntab_upload(dev, B43_NTAB_INTLEVEL, b43_ntab_intlevel); 255
215 ntab_upload(dev, B43_NTAB_PILOT, b43_ntab_pilot); 256/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PA%20override */
216 ntab_upload(dev, B43_NTAB_PILOTLT, b43_ntab_pilotlt); 257static void b43_nphy_pa_override(struct b43_wldev *dev, bool enable)
217 ntab_upload(dev, B43_NTAB_TDI20A0, b43_ntab_tdi20a0); 258{
218 ntab_upload(dev, B43_NTAB_TDI20A1, b43_ntab_tdi20a1); 259 struct b43_phy_n *nphy = dev->phy.n;
219 ntab_upload(dev, B43_NTAB_TDI40A0, b43_ntab_tdi40a0); 260 enum ieee80211_band band;
220 ntab_upload(dev, B43_NTAB_TDI40A1, b43_ntab_tdi40a1); 261 u16 tmp;
221 ntab_upload(dev, B43_NTAB_BDI, b43_ntab_bdi); 262
222 ntab_upload(dev, B43_NTAB_CHANEST, b43_ntab_channelest); 263 if (!enable) {
223 ntab_upload(dev, B43_NTAB_MCS, b43_ntab_mcs); 264 nphy->rfctrl_intc1_save = b43_phy_read(dev,
224 265 B43_NPHY_RFCTL_INTC1);
225 /* Volatile tables */ 266 nphy->rfctrl_intc2_save = b43_phy_read(dev,
226 ntab_upload(dev, B43_NTAB_NOISEVAR10, b43_ntab_noisevar10); 267 B43_NPHY_RFCTL_INTC2);
227 ntab_upload(dev, B43_NTAB_NOISEVAR11, b43_ntab_noisevar11); 268 band = b43_current_band(dev->wl);
228 ntab_upload(dev, B43_NTAB_C0_ESTPLT, b43_ntab_estimatepowerlt0); 269 if (dev->phy.rev >= 3) {
229 ntab_upload(dev, B43_NTAB_C1_ESTPLT, b43_ntab_estimatepowerlt1); 270 if (band == IEEE80211_BAND_5GHZ)
230 ntab_upload(dev, B43_NTAB_C0_ADJPLT, b43_ntab_adjustpower0); 271 tmp = 0x600;
231 ntab_upload(dev, B43_NTAB_C1_ADJPLT, b43_ntab_adjustpower1); 272 else
232 ntab_upload(dev, B43_NTAB_C0_GAINCTL, b43_ntab_gainctl0); 273 tmp = 0x480;
233 ntab_upload(dev, B43_NTAB_C1_GAINCTL, b43_ntab_gainctl1); 274 } else {
234 ntab_upload(dev, B43_NTAB_C0_IQLT, b43_ntab_iqlt0); 275 if (band == IEEE80211_BAND_5GHZ)
235 ntab_upload(dev, B43_NTAB_C1_IQLT, b43_ntab_iqlt1); 276 tmp = 0x180;
236 ntab_upload(dev, B43_NTAB_C0_LOFEEDTH, b43_ntab_loftlt0); 277 else
237 ntab_upload(dev, B43_NTAB_C1_LOFEEDTH, b43_ntab_loftlt1); 278 tmp = 0x120;
279 }
280 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
281 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
282 } else {
283 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1,
284 nphy->rfctrl_intc1_save);
285 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2,
286 nphy->rfctrl_intc2_save);
287 }
238} 288}
239 289
240static void b43_nphy_workarounds(struct b43_wldev *dev) 290/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxLpFbw */
291static void b43_nphy_tx_lp_fbw(struct b43_wldev *dev)
292{
293 struct b43_phy_n *nphy = dev->phy.n;
294 u16 tmp;
295 enum ieee80211_band band = b43_current_band(dev->wl);
296 bool ipa = (nphy->ipa2g_on && band == IEEE80211_BAND_2GHZ) ||
297 (nphy->ipa5g_on && band == IEEE80211_BAND_5GHZ);
298
299 if (dev->phy.rev >= 3) {
300 if (ipa) {
301 tmp = 4;
302 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2,
303 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
304 }
305
306 tmp = 1;
307 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S2,
308 (((((tmp << 3) | tmp) << 3) | tmp) << 3) | tmp);
309 }
310}
311
312/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BmacPhyClkFgc */
313static void b43_nphy_bmac_clock_fgc(struct b43_wldev *dev, bool force)
314{
315 u32 tmslow;
316
317 if (dev->phy.type != B43_PHYTYPE_N)
318 return;
319
320 tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
321 if (force)
322 tmslow |= SSB_TMSLOW_FGC;
323 else
324 tmslow &= ~SSB_TMSLOW_FGC;
325 ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
326}
327
328/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CCA */
329static void b43_nphy_reset_cca(struct b43_wldev *dev)
330{
331 u16 bbcfg;
332
333 b43_nphy_bmac_clock_fgc(dev, 1);
334 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG);
335 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg | B43_NPHY_BBCFG_RSTCCA);
336 udelay(1);
337 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA);
338 b43_nphy_bmac_clock_fgc(dev, 0);
339 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
340}
341
342/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/MIMOConfig */
343static void b43_nphy_update_mimo_config(struct b43_wldev *dev, s32 preamble)
344{
345 u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG);
346
347 mimocfg |= B43_NPHY_MIMOCFG_AUTO;
348 if (preamble == 1)
349 mimocfg |= B43_NPHY_MIMOCFG_GFMIX;
350 else
351 mimocfg &= ~B43_NPHY_MIMOCFG_GFMIX;
352
353 b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg);
354}
355
356/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Chains */
357static void b43_nphy_update_txrx_chain(struct b43_wldev *dev)
358{
359 struct b43_phy_n *nphy = dev->phy.n;
360
361 bool override = false;
362 u16 chain = 0x33;
363
364 if (nphy->txrx_chain == 0) {
365 chain = 0x11;
366 override = true;
367 } else if (nphy->txrx_chain == 1) {
368 chain = 0x22;
369 override = true;
370 }
371
372 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
373 ~(B43_NPHY_RFSEQCA_TXEN | B43_NPHY_RFSEQCA_RXEN),
374 chain);
375
376 if (override)
377 b43_phy_set(dev, B43_NPHY_RFSEQMODE,
378 B43_NPHY_RFSEQMODE_CAOVER);
379 else
380 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
381 ~B43_NPHY_RFSEQMODE_CAOVER);
382}
383
384/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqEst */
385static void b43_nphy_rx_iq_est(struct b43_wldev *dev, struct nphy_iq_est *est,
386 u16 samps, u8 time, bool wait)
387{
388 int i;
389 u16 tmp;
390
391 b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps);
392 b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time);
393 if (wait)
394 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE);
395 else
396 b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE);
397
398 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START);
399
400 for (i = 1000; i; i--) {
401 tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD);
402 if (!(tmp & B43_NPHY_IQEST_CMD_START)) {
403 est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) |
404 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0);
405 est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) |
406 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0);
407 est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) |
408 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0);
409
410 est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) |
411 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1);
412 est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) |
413 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1);
414 est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) |
415 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1);
416 return;
417 }
418 udelay(10);
419 }
420 memset(est, 0, sizeof(*est));
421}
422
423/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxIqCoeffs */
424static void b43_nphy_rx_iq_coeffs(struct b43_wldev *dev, bool write,
425 struct b43_phy_n_iq_comp *pcomp)
426{
427 if (write) {
428 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPA0, pcomp->a0);
429 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPB0, pcomp->b0);
430 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPA1, pcomp->a1);
431 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPB1, pcomp->b1);
432 } else {
433 pcomp->a0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPA0);
434 pcomp->b0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPB0);
435 pcomp->a1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPA1);
436 pcomp->b1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPB1);
437 }
438}
439
440/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhyCleanup */
441static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev *dev, u8 core)
442{
443 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
444
445 b43_phy_write(dev, B43_NPHY_RFSEQCA, regs[0]);
446 if (core == 0) {
447 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[1]);
448 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
449 } else {
450 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
451 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
452 }
453 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[3]);
454 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[4]);
455 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, regs[5]);
456 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, regs[6]);
457 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, regs[7]);
458 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, regs[8]);
459 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
460 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
461}
462
463/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RxCalPhySetup */
464static void b43_nphy_rx_cal_phy_setup(struct b43_wldev *dev, u8 core)
465{
466 u8 rxval, txval;
467 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
468
469 regs[0] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
470 if (core == 0) {
471 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
472 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
473 } else {
474 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
475 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
476 }
477 regs[3] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
478 regs[4] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
479 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
480 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
481 regs[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S1);
482 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
483 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
484 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
485
486 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
487 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
488
489 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, (u16)~B43_NPHY_RFSEQCA_RXDIS,
490 ((1 - core) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
491 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
492 ((1 - core) << B43_NPHY_RFSEQCA_TXEN_SHIFT));
493 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN,
494 (core << B43_NPHY_RFSEQCA_RXEN_SHIFT));
495 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXDIS,
496 (core << B43_NPHY_RFSEQCA_TXDIS_SHIFT));
497
498 if (core == 0) {
499 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007);
500 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007);
501 } else {
502 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007);
503 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007);
504 }
505
506 b43_nphy_rf_control_intc_override(dev, 2, 0, 3);
507 b43_nphy_rf_control_override(dev, 8, 0, 3, false);
508 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
509
510 if (core == 0) {
511 rxval = 1;
512 txval = 8;
513 } else {
514 rxval = 4;
515 txval = 2;
516 }
517 b43_nphy_rf_control_intc_override(dev, 1, rxval, (core + 1));
518 b43_nphy_rf_control_intc_override(dev, 1, txval, (2 - core));
519}
520
521/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalcRxIqComp */
522static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
523{
524 int i;
525 s32 iq;
526 u32 ii;
527 u32 qq;
528 int iq_nbits, qq_nbits;
529 int arsh, brsh;
530 u16 tmp, a, b;
531
532 struct nphy_iq_est est;
533 struct b43_phy_n_iq_comp old;
534 struct b43_phy_n_iq_comp new = { };
535 bool error = false;
536
537 if (mask == 0)
538 return;
539
540 b43_nphy_rx_iq_coeffs(dev, false, &old);
541 b43_nphy_rx_iq_coeffs(dev, true, &new);
542 b43_nphy_rx_iq_est(dev, &est, 0x4000, 32, false);
543 new = old;
544
545 for (i = 0; i < 2; i++) {
546 if (i == 0 && (mask & 1)) {
547 iq = est.iq0_prod;
548 ii = est.i0_pwr;
549 qq = est.q0_pwr;
550 } else if (i == 1 && (mask & 2)) {
551 iq = est.iq1_prod;
552 ii = est.i1_pwr;
553 qq = est.q1_pwr;
554 } else {
555 B43_WARN_ON(1);
556 continue;
557 }
558
559 if (ii + qq < 2) {
560 error = true;
561 break;
562 }
563
564 iq_nbits = fls(abs(iq));
565 qq_nbits = fls(qq);
566
567 arsh = iq_nbits - 20;
568 if (arsh >= 0) {
569 a = -((iq << (30 - iq_nbits)) + (ii >> (1 + arsh)));
570 tmp = ii >> arsh;
571 } else {
572 a = -((iq << (30 - iq_nbits)) + (ii << (-1 - arsh)));
573 tmp = ii << -arsh;
574 }
575 if (tmp == 0) {
576 error = true;
577 break;
578 }
579 a /= tmp;
580
581 brsh = qq_nbits - 11;
582 if (brsh >= 0) {
583 b = (qq << (31 - qq_nbits));
584 tmp = ii >> brsh;
585 } else {
586 b = (qq << (31 - qq_nbits));
587 tmp = ii << -brsh;
588 }
589 if (tmp == 0) {
590 error = true;
591 break;
592 }
593 b = int_sqrt(b / tmp - a * a) - (1 << 10);
594
595 if (i == 0 && (mask & 0x1)) {
596 if (dev->phy.rev >= 3) {
597 new.a0 = a & 0x3FF;
598 new.b0 = b & 0x3FF;
599 } else {
600 new.a0 = b & 0x3FF;
601 new.b0 = a & 0x3FF;
602 }
603 } else if (i == 1 && (mask & 0x2)) {
604 if (dev->phy.rev >= 3) {
605 new.a1 = a & 0x3FF;
606 new.b1 = b & 0x3FF;
607 } else {
608 new.a1 = b & 0x3FF;
609 new.b1 = a & 0x3FF;
610 }
611 }
612 }
613
614 if (error)
615 new = old;
616
617 b43_nphy_rx_iq_coeffs(dev, true, &new);
618}
619
620/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxIqWar */
621static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
622{
623 u16 array[4];
624 int i;
625
626 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x3C50);
627 for (i = 0; i < 4; i++)
628 array[i] = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
629
630 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]);
631 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]);
632 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW2, array[2]);
633 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]);
634}
635
636/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
637static void b43_nphy_write_clip_detection(struct b43_wldev *dev, u16 *clip_st)
638{
639 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
640 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
641}
642
643/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
644static void b43_nphy_read_clip_detection(struct b43_wldev *dev, u16 *clip_st)
645{
646 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES);
647 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES);
648}
649
650/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/classifier */
651static u16 b43_nphy_classifier(struct b43_wldev *dev, u16 mask, u16 val)
652{
653 u16 tmp;
654
655 if (dev->dev->id.revision == 16)
656 b43_mac_suspend(dev);
657
658 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL);
659 tmp &= (B43_NPHY_CLASSCTL_CCKEN | B43_NPHY_CLASSCTL_OFDMEN |
660 B43_NPHY_CLASSCTL_WAITEDEN);
661 tmp &= ~mask;
662 tmp |= (val & mask);
663 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp);
664
665 if (dev->dev->id.revision == 16)
666 b43_mac_enable(dev);
667
668 return tmp;
669}
670
671/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/carriersearch */
672static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
241{ 673{
242 struct b43_phy *phy = &dev->phy; 674 struct b43_phy *phy = &dev->phy;
243 unsigned int i; 675 struct b43_phy_n *nphy = phy->n;
244 676
245 b43_phy_set(dev, B43_NPHY_IQFLIP, 677 if (enable) {
246 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2); 678 u16 clip[] = { 0xFFFF, 0xFFFF };
247 if (1 /* FIXME band is 2.4GHz */) { 679 if (nphy->deaf_count++ == 0) {
248 b43_phy_set(dev, B43_NPHY_CLASSCTL, 680 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
249 B43_NPHY_CLASSCTL_CCKEN); 681 b43_nphy_classifier(dev, 0x7, 0);
250 } else { 682 b43_nphy_read_clip_detection(dev, nphy->clip_state);
251 b43_phy_mask(dev, B43_NPHY_CLASSCTL, 683 b43_nphy_write_clip_detection(dev, clip);
252 ~B43_NPHY_CLASSCTL_CCKEN); 684 }
253 } 685 b43_nphy_reset_cca(dev);
254 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8); 686 } else {
255 b43_phy_write(dev, B43_NPHY_TXFRAMEDELAY, 8); 687 if (--nphy->deaf_count == 0) {
256 688 b43_nphy_classifier(dev, 0x7, nphy->classifier_state);
257 /* Fixup some tables */ 689 b43_nphy_write_clip_detection(dev, nphy->clip_state);
258 b43_ntab_write(dev, B43_NTAB16(8, 0x00), 0xA); 690 }
259 b43_ntab_write(dev, B43_NTAB16(8, 0x10), 0xA); 691 }
260 b43_ntab_write(dev, B43_NTAB16(8, 0x02), 0xCDAA); 692}
261 b43_ntab_write(dev, B43_NTAB16(8, 0x12), 0xCDAA); 693
262 b43_ntab_write(dev, B43_NTAB16(8, 0x08), 0); 694/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/stop-playback */
263 b43_ntab_write(dev, B43_NTAB16(8, 0x18), 0); 695static void b43_nphy_stop_playback(struct b43_wldev *dev)
264 b43_ntab_write(dev, B43_NTAB16(8, 0x07), 0x7AAB); 696{
265 b43_ntab_write(dev, B43_NTAB16(8, 0x17), 0x7AAB); 697 struct b43_phy_n *nphy = dev->phy.n;
266 b43_ntab_write(dev, B43_NTAB16(8, 0x06), 0x800); 698 u16 tmp;
267 b43_ntab_write(dev, B43_NTAB16(8, 0x16), 0x800); 699
268 700 if (nphy->hang_avoid)
269 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8); 701 b43_nphy_stay_in_carrier_search(dev, 1);
270 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301); 702
271 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8); 703 tmp = b43_phy_read(dev, B43_NPHY_SAMP_STAT);
272 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301); 704 if (tmp & 0x1)
273 705 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP);
274 //TODO set RF sequence 706 else if (tmp & 0x2)
275 707 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, (u16)~0x8000);
276 /* Set narrowband clip threshold */ 708
277 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 66); 709 b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004);
278 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 66); 710
279 711 if (nphy->bb_mult_save & 0x80000000) {
280 /* Set wideband clip 2 threshold */ 712 tmp = nphy->bb_mult_save & 0xFFFF;
281 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES, 713 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
282 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2, 714 nphy->bb_mult_save = 0;
283 21 << B43_NPHY_C1_CLIPWBTHRES_CLIP2_SHIFT); 715 }
284 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES, 716
285 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2, 717 if (nphy->hang_avoid)
286 21 << B43_NPHY_C2_CLIPWBTHRES_CLIP2_SHIFT); 718 b43_nphy_stay_in_carrier_search(dev, 0);
287 719}
288 /* Set Clip 2 detect */ 720
289 b43_phy_set(dev, B43_NPHY_C1_CGAINI, 721/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SpurWar */
290 B43_NPHY_C1_CGAINI_CL2DETECT); 722static void b43_nphy_spur_workaround(struct b43_wldev *dev)
291 b43_phy_set(dev, B43_NPHY_C2_CGAINI, 723{
292 B43_NPHY_C2_CGAINI_CL2DETECT); 724 struct b43_phy_n *nphy = dev->phy.n;
293 725
294 if (0 /*FIXME*/) { 726 unsigned int channel;
295 /* Set dwell lengths */ 727 int tone[2] = { 57, 58 };
296 b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 43); 728 u32 noise[2] = { 0x3FF, 0x3FF };
297 b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 43); 729
298 b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 9); 730 B43_WARN_ON(dev->phy.rev < 3);
299 b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 9); 731
300 732 if (nphy->hang_avoid)
301 /* Set gain backoff */ 733 b43_nphy_stay_in_carrier_search(dev, 1);
302 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI, 734
303 ~B43_NPHY_C1_CGAINI_GAINBKOFF, 735 /* FIXME: channel = radio_chanspec */
304 1 << B43_NPHY_C1_CGAINI_GAINBKOFF_SHIFT); 736
305 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI, 737 if (nphy->gband_spurwar_en) {
306 ~B43_NPHY_C2_CGAINI_GAINBKOFF, 738 /* TODO: N PHY Adjust Analog Pfbw (7) */
307 1 << B43_NPHY_C2_CGAINI_GAINBKOFF_SHIFT); 739 if (channel == 11 && dev->phy.is_40mhz)
740 ; /* TODO: N PHY Adjust Min Noise Var(2, tone, noise)*/
741 else
742 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
743 /* TODO: N PHY Adjust CRS Min Power (0x1E) */
744 }
745
746 if (nphy->aband_spurwar_en) {
747 if (channel == 54) {
748 tone[0] = 0x20;
749 noise[0] = 0x25F;
750 } else if (channel == 38 || channel == 102 || channel == 118) {
751 if (0 /* FIXME */) {
752 tone[0] = 0x20;
753 noise[0] = 0x21F;
754 } else {
755 tone[0] = 0;
756 noise[0] = 0;
757 }
758 } else if (channel == 134) {
759 tone[0] = 0x20;
760 noise[0] = 0x21F;
761 } else if (channel == 151) {
762 tone[0] = 0x10;
763 noise[0] = 0x23F;
764 } else if (channel == 153 || channel == 161) {
765 tone[0] = 0x30;
766 noise[0] = 0x23F;
767 } else {
768 tone[0] = 0;
769 noise[0] = 0;
770 }
771
772 if (!tone[0] && !noise[0])
773 ; /* TODO: N PHY Adjust Min Noise Var(1, tone, noise)*/
774 else
775 ; /* TODO: N PHY Adjust Min Noise Var(0, NULL, NULL)*/
776 }
777
778 if (nphy->hang_avoid)
779 b43_nphy_stay_in_carrier_search(dev, 0);
780}
781
782/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/WorkaroundsGainCtrl */
783static void b43_nphy_gain_crtl_workarounds(struct b43_wldev *dev)
784{
785 struct b43_phy_n *nphy = dev->phy.n;
786 u8 i, j;
787 u8 code;
788
789 /* TODO: for PHY >= 3
790 s8 *lna1_gain, *lna2_gain;
791 u8 *gain_db, *gain_bits;
792 u16 *rfseq_init;
793 u8 lpf_gain[6] = { 0x00, 0x06, 0x0C, 0x12, 0x12, 0x12 };
794 u8 lpf_bits[6] = { 0, 1, 2, 3, 3, 3 };
795 */
796
797 u8 rfseq_events[3] = { 6, 8, 7 };
798 u8 rfseq_delays[3] = { 10, 30, 1 };
799
800 if (dev->phy.rev >= 3) {
801 /* TODO */
802 } else {
803 /* Set Clip 2 detect */
804 b43_phy_set(dev, B43_NPHY_C1_CGAINI,
805 B43_NPHY_C1_CGAINI_CL2DETECT);
806 b43_phy_set(dev, B43_NPHY_C2_CGAINI,
807 B43_NPHY_C2_CGAINI_CL2DETECT);
808
809 /* Set narrowband clip threshold */
810 b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
811 b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
812
813 if (!dev->phy.is_40mhz) {
814 /* Set dwell lengths */
815 b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
816 b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
817 b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
818 b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
819 }
820
821 /* Set wideband clip 2 threshold */
822 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES,
823 ~B43_NPHY_C1_CLIPWBTHRES_CLIP2,
824 21);
825 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES,
826 ~B43_NPHY_C2_CLIPWBTHRES_CLIP2,
827 21);
828
829 if (!dev->phy.is_40mhz) {
830 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI,
831 ~B43_NPHY_C1_CGAINI_GAINBKOFF, 0x1);
832 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI,
833 ~B43_NPHY_C2_CGAINI_GAINBKOFF, 0x1);
834 b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI,
835 ~B43_NPHY_C1_CCK_CGAINI_GAINBKOFF, 0x1);
836 b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI,
837 ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
838 }
839
840 b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
841
842 if (nphy->gain_boost) {
843 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
844 dev->phy.is_40mhz)
845 code = 4;
846 else
847 code = 5;
848 } else {
849 code = dev->phy.is_40mhz ? 6 : 7;
850 }
308 851
309 /* Set HPVGA2 index */ 852 /* Set HPVGA2 index */
310 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN, 853 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN,
311 ~B43_NPHY_C1_INITGAIN_HPVGA2, 854 ~B43_NPHY_C1_INITGAIN_HPVGA2,
312 6 << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT); 855 code << B43_NPHY_C1_INITGAIN_HPVGA2_SHIFT);
313 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN, 856 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN,
314 ~B43_NPHY_C2_INITGAIN_HPVGA2, 857 ~B43_NPHY_C2_INITGAIN_HPVGA2,
315 6 << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT); 858 code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
859
860 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
861 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
862 (code << 8 | 0x7C));
863 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
864 (code << 8 | 0x7C));
865
866 /* TODO: b43_nphy_adjust_lna_gain_table(dev); */
867
868 if (nphy->elna_gain_config) {
869 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808);
870 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
871 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
872 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
873 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
874
875 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08);
876 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0);
877 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
878 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
879 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
880
881 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
882 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
883 (code << 8 | 0x74));
884 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
885 (code << 8 | 0x74));
886 }
316 887
317 //FIXME verify that the specs really mean to use autoinc here. 888 if (dev->phy.rev == 2) {
318 for (i = 0; i < 3; i++) 889 for (i = 0; i < 4; i++) {
319 b43_ntab_write(dev, B43_NTAB16(7, 0x106) + i, 0x673); 890 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
891 (0x0400 * i) + 0x0020);
892 for (j = 0; j < 21; j++)
893 b43_phy_write(dev,
894 B43_NPHY_TABLE_DATALO, 3 * j);
895 }
896
897 b43_nphy_set_rf_sequence(dev, 5,
898 rfseq_events, rfseq_delays, 3);
899 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1,
900 (u16)~B43_NPHY_OVER_DGAIN_CCKDGECV,
901 0x5A << B43_NPHY_OVER_DGAIN_CCKDGECV_SHIFT);
902
903 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
904 b43_phy_maskset(dev, B43_PHY_N(0xC5D),
905 0xFF80, 4);
906 }
320 } 907 }
908}
321 909
322 /* Set minimum gain value */ 910/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/Workarounds */
323 b43_phy_maskset(dev, B43_NPHY_C1_MINMAX_GAIN, 911static void b43_nphy_workarounds(struct b43_wldev *dev)
324 ~B43_NPHY_C1_MINGAIN, 912{
325 23 << B43_NPHY_C1_MINGAIN_SHIFT); 913 struct ssb_bus *bus = dev->dev->bus;
326 b43_phy_maskset(dev, B43_NPHY_C2_MINMAX_GAIN, 914 struct b43_phy *phy = &dev->phy;
327 ~B43_NPHY_C2_MINGAIN, 915 struct b43_phy_n *nphy = phy->n;
328 23 << B43_NPHY_C2_MINGAIN_SHIFT);
329 916
330 if (phy->rev < 2) { 917 u8 events1[7] = { 0x0, 0x1, 0x2, 0x8, 0x4, 0x5, 0x3 };
331 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL, 918 u8 delays1[7] = { 0x8, 0x6, 0x6, 0x2, 0x4, 0x3C, 0x1 };
332 ~B43_NPHY_SCRAM_SIGCTL_SCM); 919
920 u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
921 u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
922
923 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
924 b43_nphy_classifier(dev, 1, 0);
925 else
926 b43_nphy_classifier(dev, 1, 1);
927
928 if (nphy->hang_avoid)
929 b43_nphy_stay_in_carrier_search(dev, 1);
930
931 b43_phy_set(dev, B43_NPHY_IQFLIP,
932 B43_NPHY_IQFLIP_ADC1 | B43_NPHY_IQFLIP_ADC2);
933
934 if (dev->phy.rev >= 3) {
935 /* TODO */
936 } else {
937 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ &&
938 nphy->band5g_pwrgain) {
939 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8);
940 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8);
941 } else {
942 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8);
943 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8);
944 }
945
946 /* TODO: convert to b43_ntab_write? */
947 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2000);
948 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
949 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2010);
950 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x000A);
951 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2002);
952 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
953 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2012);
954 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0xCDAA);
955
956 if (dev->phy.rev < 2) {
957 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2008);
958 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
959 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2018);
960 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0000);
961 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2007);
962 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
963 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2017);
964 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x7AAB);
965 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2006);
966 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
967 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x2016);
968 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0800);
969 }
970
971 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
972 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301);
973 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8);
974 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301);
975
976 if (bus->sprom.boardflags2_lo & 0x100 &&
977 bus->boardinfo.type == 0x8B) {
978 delays1[0] = 0x1;
979 delays1[5] = 0x14;
980 }
981 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7);
982 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7);
983
984 b43_nphy_gain_crtl_workarounds(dev);
985
986 if (dev->phy.rev < 2) {
987 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2)
988 ; /*TODO: b43_mhf(dev, 2, 0x0010, 0x0010, 3);*/
989 } else if (dev->phy.rev == 2) {
990 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0);
991 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0);
992 }
993
994 if (dev->phy.rev < 2)
995 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL,
996 ~B43_NPHY_SCRAM_SIGCTL_SCM);
997
998 /* Set phase track alpha and beta */
999 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125);
1000 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
1001 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
1002 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
1003 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
1004 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
1005
1006 b43_phy_mask(dev, B43_NPHY_PIL_DW1,
1007 (u16)~B43_NPHY_PIL_DW_64QAM);
1008 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5);
1009 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4);
1010 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00);
1011
1012 if (dev->phy.rev == 2)
1013 b43_phy_set(dev, B43_NPHY_FINERX2_CGC,
1014 B43_NPHY_FINERX2_CGC_DECGC);
333 } 1015 }
334 1016
335 /* Set phase track alpha and beta */ 1017 if (nphy->hang_avoid)
336 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125); 1018 b43_nphy_stay_in_carrier_search(dev, 0);
337 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3);
338 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105);
339 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E);
340 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD);
341 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20);
342} 1019}
343 1020
344static void b43_nphy_reset_cca(struct b43_wldev *dev) 1021/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/LoadSampleTable */
1022static int b43_nphy_load_samples(struct b43_wldev *dev,
1023 struct b43_c32 *samples, u16 len) {
1024 struct b43_phy_n *nphy = dev->phy.n;
1025 u16 i;
1026 u32 *data;
1027
1028 data = kzalloc(len * sizeof(u32), GFP_KERNEL);
1029 if (!data) {
1030 b43err(dev->wl, "allocation for samples loading failed\n");
1031 return -ENOMEM;
1032 }
1033 if (nphy->hang_avoid)
1034 b43_nphy_stay_in_carrier_search(dev, 1);
1035
1036 for (i = 0; i < len; i++) {
1037 data[i] = (samples[i].i & 0x3FF << 10);
1038 data[i] |= samples[i].q & 0x3FF;
1039 }
1040 b43_ntab_write_bulk(dev, B43_NTAB32(17, 0), len, data);
1041
1042 kfree(data);
1043 if (nphy->hang_avoid)
1044 b43_nphy_stay_in_carrier_search(dev, 0);
1045 return 0;
1046}
1047
1048/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GenLoadSamples */
1049static u16 b43_nphy_gen_load_samples(struct b43_wldev *dev, u32 freq, u16 max,
1050 bool test)
345{ 1051{
346 u16 bbcfg; 1052 int i;
1053 u16 bw, len, rot, angle;
1054 struct b43_c32 *samples;
347 1055
348 ssb_write32(dev->dev, SSB_TMSLOW, 1056
349 ssb_read32(dev->dev, SSB_TMSLOW) | SSB_TMSLOW_FGC); 1057 bw = (dev->phy.is_40mhz) ? 40 : 20;
350 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG); 1058 len = bw << 3;
351 b43_phy_set(dev, B43_NPHY_BBCFG, B43_NPHY_BBCFG_RSTCCA); 1059
352 b43_phy_write(dev, B43_NPHY_BBCFG, 1060 if (test) {
353 bbcfg & ~B43_NPHY_BBCFG_RSTCCA); 1061 if (b43_phy_read(dev, B43_NPHY_BBCFG) & B43_NPHY_BBCFG_RSTRX)
354 ssb_write32(dev->dev, SSB_TMSLOW, 1062 bw = 82;
355 ssb_read32(dev->dev, SSB_TMSLOW) & ~SSB_TMSLOW_FGC); 1063 else
1064 bw = 80;
1065
1066 if (dev->phy.is_40mhz)
1067 bw <<= 1;
1068
1069 len = bw << 1;
1070 }
1071
1072 samples = kzalloc(len * sizeof(struct b43_c32), GFP_KERNEL);
1073 if (!samples) {
1074 b43err(dev->wl, "allocation for samples generation failed\n");
1075 return 0;
1076 }
1077 rot = (((freq * 36) / bw) << 16) / 100;
1078 angle = 0;
1079
1080 for (i = 0; i < len; i++) {
1081 samples[i] = b43_cordic(angle);
1082 angle += rot;
1083 samples[i].q = CORDIC_CONVERT(samples[i].q * max);
1084 samples[i].i = CORDIC_CONVERT(samples[i].i * max);
1085 }
1086
1087 i = b43_nphy_load_samples(dev, samples, len);
1088 kfree(samples);
1089 return (i < 0) ? 0 : len;
356} 1090}
357 1091
358enum b43_nphy_rf_sequence { 1092/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RunSamples */
359 B43_RFSEQ_RX2TX, 1093static void b43_nphy_run_samples(struct b43_wldev *dev, u16 samps, u16 loops,
360 B43_RFSEQ_TX2RX, 1094 u16 wait, bool iqmode, bool dac_test)
361 B43_RFSEQ_RESET2RX, 1095{
362 B43_RFSEQ_UPDATE_GAINH, 1096 struct b43_phy_n *nphy = dev->phy.n;
363 B43_RFSEQ_UPDATE_GAINL, 1097 int i;
364 B43_RFSEQ_UPDATE_GAINU, 1098 u16 seq_mode;
365}; 1099 u32 tmp;
1100
1101 if (nphy->hang_avoid)
1102 b43_nphy_stay_in_carrier_search(dev, true);
1103
1104 if ((nphy->bb_mult_save & 0x80000000) == 0) {
1105 tmp = b43_ntab_read(dev, B43_NTAB16(15, 87));
1106 nphy->bb_mult_save = (tmp & 0xFFFF) | 0x80000000;
1107 }
1108
1109 if (!dev->phy.is_40mhz)
1110 tmp = 0x6464;
1111 else
1112 tmp = 0x4747;
1113 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp);
1114
1115 if (nphy->hang_avoid)
1116 b43_nphy_stay_in_carrier_search(dev, false);
1117
1118 b43_phy_write(dev, B43_NPHY_SAMP_DEPCNT, (samps - 1));
1119
1120 if (loops != 0xFFFF)
1121 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, (loops - 1));
1122 else
1123 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, loops);
1124
1125 b43_phy_write(dev, B43_NPHY_SAMP_WAITCNT, wait);
1126
1127 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
1128
1129 b43_phy_set(dev, B43_NPHY_RFSEQMODE, B43_NPHY_RFSEQMODE_CAOVER);
1130 if (iqmode) {
1131 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF);
1132 b43_phy_set(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8000);
1133 } else {
1134 if (dac_test)
1135 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 5);
1136 else
1137 b43_phy_write(dev, B43_NPHY_SAMP_CMD, 1);
1138 }
1139 for (i = 0; i < 100; i++) {
1140 if (b43_phy_read(dev, B43_NPHY_RFSEQST) & 1) {
1141 i = 0;
1142 break;
1143 }
1144 udelay(10);
1145 }
1146 if (i)
1147 b43err(dev->wl, "run samples timeout\n");
1148
1149 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
1150}
1151
1152/*
1153 * Transmits a known value for LO calibration
1154 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/TXTone
1155 */
1156static int b43_nphy_tx_tone(struct b43_wldev *dev, u32 freq, u16 max_val,
1157 bool iqmode, bool dac_test)
1158{
1159 u16 samp = b43_nphy_gen_load_samples(dev, freq, max_val, dac_test);
1160 if (samp == 0)
1161 return -1;
1162 b43_nphy_run_samples(dev, samp, 0xFFFF, 0, iqmode, dac_test);
1163 return 0;
1164}
1165
1166/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxPwrCtrlCoefSetup */
1167static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev *dev)
1168{
1169 struct b43_phy_n *nphy = dev->phy.n;
1170 int i, j;
1171 u32 tmp;
1172 u32 cur_real, cur_imag, real_part, imag_part;
1173
1174 u16 buffer[7];
1175
1176 if (nphy->hang_avoid)
1177 b43_nphy_stay_in_carrier_search(dev, true);
1178
1179 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
1180
1181 for (i = 0; i < 2; i++) {
1182 tmp = ((buffer[i * 2] & 0x3FF) << 10) |
1183 (buffer[i * 2 + 1] & 0x3FF);
1184 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1185 (((i + 26) << 10) | 320));
1186 for (j = 0; j < 128; j++) {
1187 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1188 ((tmp >> 16) & 0xFFFF));
1189 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1190 (tmp & 0xFFFF));
1191 }
1192 }
1193
1194 for (i = 0; i < 2; i++) {
1195 tmp = buffer[5 + i];
1196 real_part = (tmp >> 8) & 0xFF;
1197 imag_part = (tmp & 0xFF);
1198 b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
1199 (((i + 26) << 10) | 448));
1200
1201 if (dev->phy.rev >= 3) {
1202 cur_real = real_part;
1203 cur_imag = imag_part;
1204 tmp = ((cur_real & 0xFF) << 8) | (cur_imag & 0xFF);
1205 }
1206
1207 for (j = 0; j < 128; j++) {
1208 if (dev->phy.rev < 3) {
1209 cur_real = (real_part * loscale[j] + 128) >> 8;
1210 cur_imag = (imag_part * loscale[j] + 128) >> 8;
1211 tmp = ((cur_real & 0xFF) << 8) |
1212 (cur_imag & 0xFF);
1213 }
1214 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI,
1215 ((tmp >> 16) & 0xFFFF));
1216 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
1217 (tmp & 0xFFFF));
1218 }
1219 }
1220
1221 if (dev->phy.rev >= 3) {
1222 b43_shm_write16(dev, B43_SHM_SHARED,
1223 B43_SHM_SH_NPHY_TXPWR_INDX0, 0xFFFF);
1224 b43_shm_write16(dev, B43_SHM_SHARED,
1225 B43_SHM_SH_NPHY_TXPWR_INDX1, 0xFFFF);
1226 }
1227
1228 if (nphy->hang_avoid)
1229 b43_nphy_stay_in_carrier_search(dev, false);
1230}
1231
1232/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRfSeq */
1233static void b43_nphy_set_rf_sequence(struct b43_wldev *dev, u8 cmd,
1234 u8 *events, u8 *delays, u8 length)
1235{
1236 struct b43_phy_n *nphy = dev->phy.n;
1237 u8 i;
1238 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F;
1239 u16 offset1 = cmd << 4;
1240 u16 offset2 = offset1 + 0x80;
366 1241
1242 if (nphy->hang_avoid)
1243 b43_nphy_stay_in_carrier_search(dev, true);
1244
1245 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events);
1246 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays);
1247
1248 for (i = length; i < 16; i++) {
1249 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end);
1250 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1);
1251 }
1252
1253 if (nphy->hang_avoid)
1254 b43_nphy_stay_in_carrier_search(dev, false);
1255}
1256
1257/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ForceRFSeq */
367static void b43_nphy_force_rf_sequence(struct b43_wldev *dev, 1258static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
368 enum b43_nphy_rf_sequence seq) 1259 enum b43_nphy_rf_sequence seq)
369{ 1260{
@@ -376,6 +1267,7 @@ static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
376 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU, 1267 [B43_RFSEQ_UPDATE_GAINU] = B43_NPHY_RFSEQTR_UPGU,
377 }; 1268 };
378 int i; 1269 int i;
1270 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE);
379 1271
380 B43_WARN_ON(seq >= ARRAY_SIZE(trigger)); 1272 B43_WARN_ON(seq >= ARRAY_SIZE(trigger));
381 1273
@@ -389,8 +1281,181 @@ static void b43_nphy_force_rf_sequence(struct b43_wldev *dev,
389 } 1281 }
390 b43err(dev->wl, "RF sequence status timeout\n"); 1282 b43err(dev->wl, "RF sequence status timeout\n");
391ok: 1283ok:
392 b43_phy_mask(dev, B43_NPHY_RFSEQMODE, 1284 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode);
393 ~(B43_NPHY_RFSEQMODE_CAOVER | B43_NPHY_RFSEQMODE_TROVER)); 1285}
1286
1287/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlOverride */
1288static void b43_nphy_rf_control_override(struct b43_wldev *dev, u16 field,
1289 u16 value, u8 core, bool off)
1290{
1291 int i;
1292 u8 index = fls(field);
1293 u8 addr, en_addr, val_addr;
1294 /* we expect only one bit set */
1295 B43_WARN_ON(field & (~(1 << (index - 1))));
1296
1297 if (dev->phy.rev >= 3) {
1298 const struct nphy_rf_control_override_rev3 *rf_ctrl;
1299 for (i = 0; i < 2; i++) {
1300 if (index == 0 || index == 16) {
1301 b43err(dev->wl,
1302 "Unsupported RF Ctrl Override call\n");
1303 return;
1304 }
1305
1306 rf_ctrl = &tbl_rf_control_override_rev3[index - 1];
1307 en_addr = B43_PHY_N((i == 0) ?
1308 rf_ctrl->en_addr0 : rf_ctrl->en_addr1);
1309 val_addr = B43_PHY_N((i == 0) ?
1310 rf_ctrl->val_addr0 : rf_ctrl->val_addr1);
1311
1312 if (off) {
1313 b43_phy_mask(dev, en_addr, ~(field));
1314 b43_phy_mask(dev, val_addr,
1315 ~(rf_ctrl->val_mask));
1316 } else {
1317 if (core == 0 || ((1 << core) & i) != 0) {
1318 b43_phy_set(dev, en_addr, field);
1319 b43_phy_maskset(dev, val_addr,
1320 ~(rf_ctrl->val_mask),
1321 (value << rf_ctrl->val_shift));
1322 }
1323 }
1324 }
1325 } else {
1326 const struct nphy_rf_control_override_rev2 *rf_ctrl;
1327 if (off) {
1328 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field));
1329 value = 0;
1330 } else {
1331 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field);
1332 }
1333
1334 for (i = 0; i < 2; i++) {
1335 if (index <= 1 || index == 16) {
1336 b43err(dev->wl,
1337 "Unsupported RF Ctrl Override call\n");
1338 return;
1339 }
1340
1341 if (index == 2 || index == 10 ||
1342 (index >= 13 && index <= 15)) {
1343 core = 1;
1344 }
1345
1346 rf_ctrl = &tbl_rf_control_override_rev2[index - 2];
1347 addr = B43_PHY_N((i == 0) ?
1348 rf_ctrl->addr0 : rf_ctrl->addr1);
1349
1350 if ((core & (1 << i)) != 0)
1351 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask),
1352 (value << rf_ctrl->shift));
1353
1354 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1);
1355 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1356 B43_NPHY_RFCTL_CMD_START);
1357 udelay(1);
1358 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE);
1359 }
1360 }
1361}
1362
1363/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RFCtrlIntcOverride */
1364static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
1365 u16 value, u8 core)
1366{
1367 u8 i, j;
1368 u16 reg, tmp, val;
1369
1370 B43_WARN_ON(dev->phy.rev < 3);
1371 B43_WARN_ON(field > 4);
1372
1373 for (i = 0; i < 2; i++) {
1374 if ((core == 1 && i == 1) || (core == 2 && !i))
1375 continue;
1376
1377 reg = (i == 0) ?
1378 B43_NPHY_RFCTL_INTC1 : B43_NPHY_RFCTL_INTC2;
1379 b43_phy_mask(dev, reg, 0xFBFF);
1380
1381 switch (field) {
1382 case 0:
1383 b43_phy_write(dev, reg, 0);
1384 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
1385 break;
1386 case 1:
1387 if (!i) {
1388 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1,
1389 0xFC3F, (value << 6));
1390 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1,
1391 0xFFFE, 1);
1392 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1393 B43_NPHY_RFCTL_CMD_START);
1394 for (j = 0; j < 100; j++) {
1395 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START) {
1396 j = 0;
1397 break;
1398 }
1399 udelay(10);
1400 }
1401 if (j)
1402 b43err(dev->wl,
1403 "intc override timeout\n");
1404 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1,
1405 0xFFFE);
1406 } else {
1407 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2,
1408 0xFC3F, (value << 6));
1409 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1410 0xFFFE, 1);
1411 b43_phy_set(dev, B43_NPHY_RFCTL_CMD,
1412 B43_NPHY_RFCTL_CMD_RXTX);
1413 for (j = 0; j < 100; j++) {
1414 if (b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX) {
1415 j = 0;
1416 break;
1417 }
1418 udelay(10);
1419 }
1420 if (j)
1421 b43err(dev->wl,
1422 "intc override timeout\n");
1423 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER,
1424 0xFFFE);
1425 }
1426 break;
1427 case 2:
1428 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1429 tmp = 0x0020;
1430 val = value << 5;
1431 } else {
1432 tmp = 0x0010;
1433 val = value << 4;
1434 }
1435 b43_phy_maskset(dev, reg, ~tmp, val);
1436 break;
1437 case 3:
1438 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1439 tmp = 0x0001;
1440 val = value;
1441 } else {
1442 tmp = 0x0004;
1443 val = value << 2;
1444 }
1445 b43_phy_maskset(dev, reg, ~tmp, val);
1446 break;
1447 case 4:
1448 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
1449 tmp = 0x0002;
1450 val = value << 1;
1451 } else {
1452 tmp = 0x0008;
1453 val = value << 3;
1454 }
1455 b43_phy_maskset(dev, reg, ~tmp, val);
1456 break;
1457 }
1458 }
394} 1459}
395 1460
396static void b43_nphy_bphy_init(struct b43_wldev *dev) 1461static void b43_nphy_bphy_init(struct b43_wldev *dev)
@@ -411,81 +1476,1680 @@ static void b43_nphy_bphy_init(struct b43_wldev *dev)
411 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); 1476 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
412} 1477}
413 1478
414/* RSSI Calibration */ 1479/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ScaleOffsetRssi */
415static void b43_nphy_rssi_cal(struct b43_wldev *dev, u8 type) 1480static void b43_nphy_scale_offset_rssi(struct b43_wldev *dev, u16 scale,
1481 s8 offset, u8 core, u8 rail, u8 type)
416{ 1482{
417 //TODO 1483 u16 tmp;
1484 bool core1or5 = (core == 1) || (core == 5);
1485 bool core2or5 = (core == 2) || (core == 5);
1486
1487 offset = clamp_val(offset, -32, 31);
1488 tmp = ((scale & 0x3F) << 8) | (offset & 0x3F);
1489
1490 if (core1or5 && (rail == 0) && (type == 2))
1491 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp);
1492 if (core1or5 && (rail == 1) && (type == 2))
1493 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp);
1494 if (core2or5 && (rail == 0) && (type == 2))
1495 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp);
1496 if (core2or5 && (rail == 1) && (type == 2))
1497 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp);
1498 if (core1or5 && (rail == 0) && (type == 0))
1499 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp);
1500 if (core1or5 && (rail == 1) && (type == 0))
1501 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp);
1502 if (core2or5 && (rail == 0) && (type == 0))
1503 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp);
1504 if (core2or5 && (rail == 1) && (type == 0))
1505 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp);
1506 if (core1or5 && (rail == 0) && (type == 1))
1507 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp);
1508 if (core1or5 && (rail == 1) && (type == 1))
1509 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp);
1510 if (core2or5 && (rail == 0) && (type == 1))
1511 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp);
1512 if (core2or5 && (rail == 1) && (type == 1))
1513 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp);
1514 if (core1or5 && (rail == 0) && (type == 6))
1515 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp);
1516 if (core1or5 && (rail == 1) && (type == 6))
1517 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp);
1518 if (core2or5 && (rail == 0) && (type == 6))
1519 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp);
1520 if (core2or5 && (rail == 1) && (type == 6))
1521 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp);
1522 if (core1or5 && (rail == 0) && (type == 3))
1523 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp);
1524 if (core1or5 && (rail == 1) && (type == 3))
1525 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp);
1526 if (core2or5 && (rail == 0) && (type == 3))
1527 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp);
1528 if (core2or5 && (rail == 1) && (type == 3))
1529 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp);
1530 if (core1or5 && (type == 4))
1531 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp);
1532 if (core2or5 && (type == 4))
1533 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp);
1534 if (core1or5 && (type == 5))
1535 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp);
1536 if (core2or5 && (type == 5))
1537 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp);
1538}
1539
1540static void b43_nphy_rev2_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1541{
1542 u16 val;
1543
1544 if (type < 3)
1545 val = 0;
1546 else if (type == 6)
1547 val = 1;
1548 else if (type == 3)
1549 val = 2;
1550 else
1551 val = 3;
1552
1553 val = (val << 12) | (val << 14);
1554 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val);
1555 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val);
1556
1557 if (type < 3) {
1558 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF,
1559 (type + 1) << 4);
1560 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF,
1561 (type + 1) << 4);
1562 }
1563
1564 /* TODO use some definitions */
1565 if (code == 0) {
1566 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF, 0);
1567 if (type < 3) {
1568 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFEC7, 0);
1569 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xEFDC, 0);
1570 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0);
1571 udelay(20);
1572 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
1573 }
1574 } else {
1575 b43_phy_maskset(dev, B43_NPHY_AFECTL_OVER, 0xCFFF,
1576 0x3000);
1577 if (type < 3) {
1578 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD,
1579 0xFEC7, 0x0180);
1580 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER,
1581 0xEFDC, (code << 1 | 0x1021));
1582 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, 0xFFFE, 0x1);
1583 udelay(20);
1584 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, 0xFFFE, 0);
1585 }
1586 }
1587}
1588
1589static void b43_nphy_rev3_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1590{
1591 struct b43_phy_n *nphy = dev->phy.n;
1592 u8 i;
1593 u16 reg, val;
1594
1595 if (code == 0) {
1596 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF);
1597 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF);
1598 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF);
1599 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF);
1600 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF);
1601 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF);
1602 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3);
1603 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3);
1604 } else {
1605 for (i = 0; i < 2; i++) {
1606 if ((code == 1 && i == 1) || (code == 2 && !i))
1607 continue;
1608
1609 reg = (i == 0) ?
1610 B43_NPHY_AFECTL_OVER1 : B43_NPHY_AFECTL_OVER;
1611 b43_phy_maskset(dev, reg, 0xFDFF, 0x0200);
1612
1613 if (type < 3) {
1614 reg = (i == 0) ?
1615 B43_NPHY_AFECTL_C1 :
1616 B43_NPHY_AFECTL_C2;
1617 b43_phy_maskset(dev, reg, 0xFCFF, 0);
1618
1619 reg = (i == 0) ?
1620 B43_NPHY_RFCTL_LUT_TRSW_UP1 :
1621 B43_NPHY_RFCTL_LUT_TRSW_UP2;
1622 b43_phy_maskset(dev, reg, 0xFFC3, 0);
1623
1624 if (type == 0)
1625 val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8;
1626 else if (type == 1)
1627 val = 16;
1628 else
1629 val = 32;
1630 b43_phy_set(dev, reg, val);
1631
1632 reg = (i == 0) ?
1633 B43_NPHY_TXF_40CO_B1S0 :
1634 B43_NPHY_TXF_40CO_B32S1;
1635 b43_phy_set(dev, reg, 0x0020);
1636 } else {
1637 if (type == 6)
1638 val = 0x0100;
1639 else if (type == 3)
1640 val = 0x0200;
1641 else
1642 val = 0x0300;
1643
1644 reg = (i == 0) ?
1645 B43_NPHY_AFECTL_C1 :
1646 B43_NPHY_AFECTL_C2;
1647
1648 b43_phy_maskset(dev, reg, 0xFCFF, val);
1649 b43_phy_maskset(dev, reg, 0xF3FF, val << 2);
1650
1651 if (type != 3 && type != 6) {
1652 enum ieee80211_band band =
1653 b43_current_band(dev->wl);
1654
1655 if ((nphy->ipa2g_on &&
1656 band == IEEE80211_BAND_2GHZ) ||
1657 (nphy->ipa5g_on &&
1658 band == IEEE80211_BAND_5GHZ))
1659 val = (band == IEEE80211_BAND_5GHZ) ? 0xC : 0xE;
1660 else
1661 val = 0x11;
1662 reg = (i == 0) ? 0x2000 : 0x3000;
1663 reg |= B2055_PADDRV;
1664 b43_radio_write16(dev, reg, val);
1665
1666 reg = (i == 0) ?
1667 B43_NPHY_AFECTL_OVER1 :
1668 B43_NPHY_AFECTL_OVER;
1669 b43_phy_set(dev, reg, 0x0200);
1670 }
1671 }
1672 }
1673 }
1674}
1675
1676/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSISel */
1677static void b43_nphy_rssi_select(struct b43_wldev *dev, u8 code, u8 type)
1678{
1679 if (dev->phy.rev >= 3)
1680 b43_nphy_rev3_rssi_select(dev, code, type);
1681 else
1682 b43_nphy_rev2_rssi_select(dev, code, type);
1683}
1684
1685/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SetRssi2055Vcm */
1686static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev *dev, u8 type, u8 *buf)
1687{
1688 int i;
1689 for (i = 0; i < 2; i++) {
1690 if (type == 2) {
1691 if (i == 0) {
1692 b43_radio_maskset(dev, B2055_C1_B0NB_RSSIVCM,
1693 0xFC, buf[0]);
1694 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1695 0xFC, buf[1]);
1696 } else {
1697 b43_radio_maskset(dev, B2055_C2_B0NB_RSSIVCM,
1698 0xFC, buf[2 * i]);
1699 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1700 0xFC, buf[2 * i + 1]);
1701 }
1702 } else {
1703 if (i == 0)
1704 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5,
1705 0xF3, buf[0] << 2);
1706 else
1707 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5,
1708 0xF3, buf[2 * i + 1] << 2);
1709 }
1710 }
1711}
1712
1713/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/PollRssi */
1714static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
1715 u8 nsamp)
1716{
1717 int i;
1718 int out;
1719 u16 save_regs_phy[9];
1720 u16 s[2];
1721
1722 if (dev->phy.rev >= 3) {
1723 save_regs_phy[0] = b43_phy_read(dev,
1724 B43_NPHY_RFCTL_LUT_TRSW_UP1);
1725 save_regs_phy[1] = b43_phy_read(dev,
1726 B43_NPHY_RFCTL_LUT_TRSW_UP2);
1727 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
1728 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
1729 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
1730 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
1731 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
1732 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
1733 }
1734
1735 b43_nphy_rssi_select(dev, 5, type);
1736
1737 if (dev->phy.rev < 2) {
1738 save_regs_phy[8] = b43_phy_read(dev, B43_NPHY_GPIO_SEL);
1739 b43_phy_write(dev, B43_NPHY_GPIO_SEL, 5);
1740 }
1741
1742 for (i = 0; i < 4; i++)
1743 buf[i] = 0;
1744
1745 for (i = 0; i < nsamp; i++) {
1746 if (dev->phy.rev < 2) {
1747 s[0] = b43_phy_read(dev, B43_NPHY_GPIO_LOOUT);
1748 s[1] = b43_phy_read(dev, B43_NPHY_GPIO_HIOUT);
1749 } else {
1750 s[0] = b43_phy_read(dev, B43_NPHY_RSSI1);
1751 s[1] = b43_phy_read(dev, B43_NPHY_RSSI2);
1752 }
1753
1754 buf[0] += ((s8)((s[0] & 0x3F) << 2)) >> 2;
1755 buf[1] += ((s8)(((s[0] >> 8) & 0x3F) << 2)) >> 2;
1756 buf[2] += ((s8)((s[1] & 0x3F) << 2)) >> 2;
1757 buf[3] += ((s8)(((s[1] >> 8) & 0x3F) << 2)) >> 2;
1758 }
1759 out = (buf[0] & 0xFF) << 24 | (buf[1] & 0xFF) << 16 |
1760 (buf[2] & 0xFF) << 8 | (buf[3] & 0xFF);
1761
1762 if (dev->phy.rev < 2)
1763 b43_phy_write(dev, B43_NPHY_GPIO_SEL, save_regs_phy[8]);
1764
1765 if (dev->phy.rev >= 3) {
1766 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1,
1767 save_regs_phy[0]);
1768 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2,
1769 save_regs_phy[1]);
1770 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[2]);
1771 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[3]);
1772 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, save_regs_phy[4]);
1773 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
1774 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
1775 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
1776 }
1777
1778 return out;
1779}
1780
1781/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal */
1782static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
1783{
1784 int i, j;
1785 u8 state[4];
1786 u8 code, val;
1787 u16 class, override;
1788 u8 regs_save_radio[2];
1789 u16 regs_save_phy[2];
1790 s8 offset[4];
1791
1792 u16 clip_state[2];
1793 u16 clip_off[2] = { 0xFFFF, 0xFFFF };
1794 s32 results_min[4] = { };
1795 u8 vcm_final[4] = { };
1796 s32 results[4][4] = { };
1797 s32 miniq[4][2] = { };
1798
1799 if (type == 2) {
1800 code = 0;
1801 val = 6;
1802 } else if (type < 2) {
1803 code = 25;
1804 val = 4;
1805 } else {
1806 B43_WARN_ON(1);
1807 return;
1808 }
1809
1810 class = b43_nphy_classifier(dev, 0, 0);
1811 b43_nphy_classifier(dev, 7, 4);
1812 b43_nphy_read_clip_detection(dev, clip_state);
1813 b43_nphy_write_clip_detection(dev, clip_off);
1814
1815 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
1816 override = 0x140;
1817 else
1818 override = 0x110;
1819
1820 regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
1821 regs_save_radio[0] = b43_radio_read16(dev, B2055_C1_PD_RXTX);
1822 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override);
1823 b43_radio_write16(dev, B2055_C1_PD_RXTX, val);
1824
1825 regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
1826 regs_save_radio[1] = b43_radio_read16(dev, B2055_C2_PD_RXTX);
1827 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override);
1828 b43_radio_write16(dev, B2055_C2_PD_RXTX, val);
1829
1830 state[0] = b43_radio_read16(dev, B2055_C1_PD_RSSIMISC) & 0x07;
1831 state[1] = b43_radio_read16(dev, B2055_C2_PD_RSSIMISC) & 0x07;
1832 b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8);
1833 b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8);
1834 state[2] = b43_radio_read16(dev, B2055_C1_SP_RSSI) & 0x07;
1835 state[3] = b43_radio_read16(dev, B2055_C2_SP_RSSI) & 0x07;
1836
1837 b43_nphy_rssi_select(dev, 5, type);
1838 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 0, type);
1839 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, 1, type);
1840
1841 for (i = 0; i < 4; i++) {
1842 u8 tmp[4];
1843 for (j = 0; j < 4; j++)
1844 tmp[j] = i;
1845 if (type != 1)
1846 b43_nphy_set_rssi_2055_vcm(dev, type, tmp);
1847 b43_nphy_poll_rssi(dev, type, results[i], 8);
1848 if (type < 2)
1849 for (j = 0; j < 2; j++)
1850 miniq[i][j] = min(results[i][2 * j],
1851 results[i][2 * j + 1]);
1852 }
1853
1854 for (i = 0; i < 4; i++) {
1855 s32 mind = 40;
1856 u8 minvcm = 0;
1857 s32 minpoll = 249;
1858 s32 curr;
1859 for (j = 0; j < 4; j++) {
1860 if (type == 2)
1861 curr = abs(results[j][i]);
1862 else
1863 curr = abs(miniq[j][i / 2] - code * 8);
1864
1865 if (curr < mind) {
1866 mind = curr;
1867 minvcm = j;
1868 }
1869
1870 if (results[j][i] < minpoll)
1871 minpoll = results[j][i];
1872 }
1873 results_min[i] = minpoll;
1874 vcm_final[i] = minvcm;
1875 }
1876
1877 if (type != 1)
1878 b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final);
1879
1880 for (i = 0; i < 4; i++) {
1881 offset[i] = (code * 8) - results[vcm_final[i]][i];
1882
1883 if (offset[i] < 0)
1884 offset[i] = -((abs(offset[i]) + 4) / 8);
1885 else
1886 offset[i] = (offset[i] + 4) / 8;
1887
1888 if (results_min[i] == 248)
1889 offset[i] = code - 32;
1890
1891 if (i % 2 == 0)
1892 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 1, 0,
1893 type);
1894 else
1895 b43_nphy_scale_offset_rssi(dev, 0, offset[i], 2, 1,
1896 type);
1897 }
1898
1899 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
1900 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]);
1901
1902 switch (state[2]) {
1903 case 1:
1904 b43_nphy_rssi_select(dev, 1, 2);
1905 break;
1906 case 4:
1907 b43_nphy_rssi_select(dev, 1, 0);
1908 break;
1909 case 2:
1910 b43_nphy_rssi_select(dev, 1, 1);
1911 break;
1912 default:
1913 b43_nphy_rssi_select(dev, 1, 1);
1914 break;
1915 }
1916
1917 switch (state[3]) {
1918 case 1:
1919 b43_nphy_rssi_select(dev, 2, 2);
1920 break;
1921 case 4:
1922 b43_nphy_rssi_select(dev, 2, 0);
1923 break;
1924 default:
1925 b43_nphy_rssi_select(dev, 2, 1);
1926 break;
1927 }
1928
1929 b43_nphy_rssi_select(dev, 0, type);
1930
1931 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]);
1932 b43_radio_write16(dev, B2055_C1_PD_RXTX, regs_save_radio[0]);
1933 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]);
1934 b43_radio_write16(dev, B2055_C2_PD_RXTX, regs_save_radio[1]);
1935
1936 b43_nphy_classifier(dev, 7, class);
1937 b43_nphy_write_clip_detection(dev, clip_state);
1938}
1939
1940/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICalRev3 */
1941static void b43_nphy_rev3_rssi_cal(struct b43_wldev *dev)
1942{
1943 /* TODO */
1944}
1945
1946/*
1947 * RSSI Calibration
1948 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RSSICal
1949 */
1950static void b43_nphy_rssi_cal(struct b43_wldev *dev)
1951{
1952 if (dev->phy.rev >= 3) {
1953 b43_nphy_rev3_rssi_cal(dev);
1954 } else {
1955 b43_nphy_rev2_rssi_cal(dev, 2);
1956 b43_nphy_rev2_rssi_cal(dev, 0);
1957 b43_nphy_rev2_rssi_cal(dev, 1);
1958 }
418} 1959}
419 1960
1961/*
1962 * Restore RSSI Calibration
1963 * http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreRssiCal
1964 */
1965static void b43_nphy_restore_rssi_cal(struct b43_wldev *dev)
1966{
1967 struct b43_phy_n *nphy = dev->phy.n;
1968
1969 u16 *rssical_radio_regs = NULL;
1970 u16 *rssical_phy_regs = NULL;
1971
1972 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
1973 if (!nphy->rssical_chanspec_2G)
1974 return;
1975 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_2G;
1976 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_2G;
1977 } else {
1978 if (!nphy->rssical_chanspec_5G)
1979 return;
1980 rssical_radio_regs = nphy->rssical_cache.rssical_radio_regs_5G;
1981 rssical_phy_regs = nphy->rssical_cache.rssical_phy_regs_5G;
1982 }
1983
1984 /* TODO use some definitions */
1985 b43_radio_maskset(dev, 0x602B, 0xE3, rssical_radio_regs[0]);
1986 b43_radio_maskset(dev, 0x702B, 0xE3, rssical_radio_regs[1]);
1987
1988 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, rssical_phy_regs[0]);
1989 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, rssical_phy_regs[1]);
1990 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, rssical_phy_regs[2]);
1991 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, rssical_phy_regs[3]);
1992
1993 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, rssical_phy_regs[4]);
1994 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, rssical_phy_regs[5]);
1995 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, rssical_phy_regs[6]);
1996 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, rssical_phy_regs[7]);
1997
1998 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, rssical_phy_regs[8]);
1999 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, rssical_phy_regs[9]);
2000 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, rssical_phy_regs[10]);
2001 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]);
2002}
2003
2004/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetIpaGainTbl */
2005static const u32 *b43_nphy_get_ipa_gain_table(struct b43_wldev *dev)
2006{
2007 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2008 if (dev->phy.rev >= 6) {
2009 /* TODO If the chip is 47162
2010 return txpwrctrl_tx_gain_ipa_rev5 */
2011 return txpwrctrl_tx_gain_ipa_rev6;
2012 } else if (dev->phy.rev >= 5) {
2013 return txpwrctrl_tx_gain_ipa_rev5;
2014 } else {
2015 return txpwrctrl_tx_gain_ipa;
2016 }
2017 } else {
2018 return txpwrctrl_tx_gain_ipa_5g;
2019 }
2020}
2021
2022/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalRadioSetup */
2023static void b43_nphy_tx_cal_radio_setup(struct b43_wldev *dev)
2024{
2025 struct b43_phy_n *nphy = dev->phy.n;
2026 u16 *save = nphy->tx_rx_cal_radio_saveregs;
2027 u16 tmp;
2028 u8 offset, i;
2029
2030 if (dev->phy.rev >= 3) {
2031 for (i = 0; i < 2; i++) {
2032 tmp = (i == 0) ? 0x2000 : 0x3000;
2033 offset = i * 11;
2034
2035 save[offset + 0] = b43_radio_read16(dev, B2055_CAL_RVARCTL);
2036 save[offset + 1] = b43_radio_read16(dev, B2055_CAL_LPOCTL);
2037 save[offset + 2] = b43_radio_read16(dev, B2055_CAL_TS);
2038 save[offset + 3] = b43_radio_read16(dev, B2055_CAL_RCCALRTS);
2039 save[offset + 4] = b43_radio_read16(dev, B2055_CAL_RCALRTS);
2040 save[offset + 5] = b43_radio_read16(dev, B2055_PADDRV);
2041 save[offset + 6] = b43_radio_read16(dev, B2055_XOCTL1);
2042 save[offset + 7] = b43_radio_read16(dev, B2055_XOCTL2);
2043 save[offset + 8] = b43_radio_read16(dev, B2055_XOREGUL);
2044 save[offset + 9] = b43_radio_read16(dev, B2055_XOMISC);
2045 save[offset + 10] = b43_radio_read16(dev, B2055_PLL_LFC1);
2046
2047 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2048 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x0A);
2049 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2050 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2051 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2052 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2053 if (nphy->ipa5g_on) {
2054 b43_radio_write16(dev, tmp | B2055_PADDRV, 4);
2055 b43_radio_write16(dev, tmp | B2055_XOCTL1, 1);
2056 } else {
2057 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2058 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0x2F);
2059 }
2060 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2061 } else {
2062 b43_radio_write16(dev, tmp | B2055_CAL_RVARCTL, 0x06);
2063 b43_radio_write16(dev, tmp | B2055_CAL_LPOCTL, 0x40);
2064 b43_radio_write16(dev, tmp | B2055_CAL_TS, 0x55);
2065 b43_radio_write16(dev, tmp | B2055_CAL_RCCALRTS, 0);
2066 b43_radio_write16(dev, tmp | B2055_CAL_RCALRTS, 0);
2067 b43_radio_write16(dev, tmp | B2055_XOCTL1, 0);
2068 if (nphy->ipa2g_on) {
2069 b43_radio_write16(dev, tmp | B2055_PADDRV, 6);
2070 b43_radio_write16(dev, tmp | B2055_XOCTL2,
2071 (dev->phy.rev < 5) ? 0x11 : 0x01);
2072 } else {
2073 b43_radio_write16(dev, tmp | B2055_PADDRV, 0);
2074 b43_radio_write16(dev, tmp | B2055_XOCTL2, 0);
2075 }
2076 }
2077 b43_radio_write16(dev, tmp | B2055_XOREGUL, 0);
2078 b43_radio_write16(dev, tmp | B2055_XOMISC, 0);
2079 b43_radio_write16(dev, tmp | B2055_PLL_LFC1, 0);
2080 }
2081 } else {
2082 save[0] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL1);
2083 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL1, 0x29);
2084
2085 save[1] = b43_radio_read16(dev, B2055_C1_TX_RF_IQCAL2);
2086 b43_radio_write16(dev, B2055_C1_TX_RF_IQCAL2, 0x54);
2087
2088 save[2] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL1);
2089 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL1, 0x29);
2090
2091 save[3] = b43_radio_read16(dev, B2055_C2_TX_RF_IQCAL2);
2092 b43_radio_write16(dev, B2055_C2_TX_RF_IQCAL2, 0x54);
2093
2094 save[3] = b43_radio_read16(dev, B2055_C1_PWRDET_RXTX);
2095 save[4] = b43_radio_read16(dev, B2055_C2_PWRDET_RXTX);
2096
2097 if (!(b43_phy_read(dev, B43_NPHY_BANDCTL) &
2098 B43_NPHY_BANDCTL_5GHZ)) {
2099 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x04);
2100 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x04);
2101 } else {
2102 b43_radio_write16(dev, B2055_C1_PWRDET_RXTX, 0x20);
2103 b43_radio_write16(dev, B2055_C2_PWRDET_RXTX, 0x20);
2104 }
2105
2106 if (dev->phy.rev < 2) {
2107 b43_radio_set(dev, B2055_C1_TX_BB_MXGM, 0x20);
2108 b43_radio_set(dev, B2055_C2_TX_BB_MXGM, 0x20);
2109 } else {
2110 b43_radio_mask(dev, B2055_C1_TX_BB_MXGM, ~0x20);
2111 b43_radio_mask(dev, B2055_C2_TX_BB_MXGM, ~0x20);
2112 }
2113 }
2114}
2115
2116/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IqCalGainParams */
2117static void b43_nphy_iq_cal_gain_params(struct b43_wldev *dev, u16 core,
2118 struct nphy_txgains target,
2119 struct nphy_iqcal_params *params)
2120{
2121 int i, j, indx;
2122 u16 gain;
2123
2124 if (dev->phy.rev >= 3) {
2125 params->txgm = target.txgm[core];
2126 params->pga = target.pga[core];
2127 params->pad = target.pad[core];
2128 params->ipa = target.ipa[core];
2129 params->cal_gain = (params->txgm << 12) | (params->pga << 8) |
2130 (params->pad << 4) | (params->ipa);
2131 for (j = 0; j < 5; j++)
2132 params->ncorr[j] = 0x79;
2133 } else {
2134 gain = (target.pad[core]) | (target.pga[core] << 4) |
2135 (target.txgm[core] << 8);
2136
2137 indx = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ?
2138 1 : 0;
2139 for (i = 0; i < 9; i++)
2140 if (tbl_iqcal_gainparams[indx][i][0] == gain)
2141 break;
2142 i = min(i, 8);
2143
2144 params->txgm = tbl_iqcal_gainparams[indx][i][1];
2145 params->pga = tbl_iqcal_gainparams[indx][i][2];
2146 params->pad = tbl_iqcal_gainparams[indx][i][3];
2147 params->cal_gain = (params->txgm << 7) | (params->pga << 4) |
2148 (params->pad << 2);
2149 for (j = 0; j < 4; j++)
2150 params->ncorr[j] = tbl_iqcal_gainparams[indx][i][4 + j];
2151 }
2152}
2153
2154/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/UpdateTxCalLadder */
2155static void b43_nphy_update_tx_cal_ladder(struct b43_wldev *dev, u16 core)
2156{
2157 struct b43_phy_n *nphy = dev->phy.n;
2158 int i;
2159 u16 scale, entry;
2160
2161 u16 tmp = nphy->txcal_bbmult;
2162 if (core == 0)
2163 tmp >>= 8;
2164 tmp &= 0xff;
2165
2166 for (i = 0; i < 18; i++) {
2167 scale = (ladder_lo[i].percent * tmp) / 100;
2168 entry = ((scale & 0xFF) << 8) | ladder_lo[i].g_env;
2169 b43_ntab_write(dev, B43_NTAB16(15, i), entry);
2170
2171 scale = (ladder_iq[i].percent * tmp) / 100;
2172 entry = ((scale & 0xFF) << 8) | ladder_iq[i].g_env;
2173 b43_ntab_write(dev, B43_NTAB16(15, i + 32), entry);
2174 }
2175}
2176
2177/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ExtPaSetTxDigiFilts */
2178static void b43_nphy_ext_pa_set_tx_dig_filters(struct b43_wldev *dev)
2179{
2180 int i;
2181 for (i = 0; i < 15; i++)
2182 b43_phy_write(dev, B43_PHY_N(0x2C5 + i),
2183 tbl_tx_filter_coef_rev4[2][i]);
2184}
2185
2186/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/IpaSetTxDigiFilts */
2187static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
2188{
2189 int i, j;
2190 /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
2191 u16 offset[] = { 0x186, 0x195, 0x2C5 };
2192
2193 for (i = 0; i < 3; i++)
2194 for (j = 0; j < 15; j++)
2195 b43_phy_write(dev, B43_PHY_N(offset[i] + j),
2196 tbl_tx_filter_coef_rev4[i][j]);
2197
2198 if (dev->phy.is_40mhz) {
2199 for (j = 0; j < 15; j++)
2200 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2201 tbl_tx_filter_coef_rev4[3][j]);
2202 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) {
2203 for (j = 0; j < 15; j++)
2204 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2205 tbl_tx_filter_coef_rev4[5][j]);
2206 }
2207
2208 if (dev->phy.channel == 14)
2209 for (j = 0; j < 15; j++)
2210 b43_phy_write(dev, B43_PHY_N(offset[0] + j),
2211 tbl_tx_filter_coef_rev4[6][j]);
2212}
2213
2214/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/GetTxGain */
2215static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev *dev)
2216{
2217 struct b43_phy_n *nphy = dev->phy.n;
2218
2219 u16 curr_gain[2];
2220 struct nphy_txgains target;
2221 const u32 *table = NULL;
2222
2223 if (nphy->txpwrctrl == 0) {
2224 int i;
2225
2226 if (nphy->hang_avoid)
2227 b43_nphy_stay_in_carrier_search(dev, true);
2228 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, curr_gain);
2229 if (nphy->hang_avoid)
2230 b43_nphy_stay_in_carrier_search(dev, false);
2231
2232 for (i = 0; i < 2; ++i) {
2233 if (dev->phy.rev >= 3) {
2234 target.ipa[i] = curr_gain[i] & 0x000F;
2235 target.pad[i] = (curr_gain[i] & 0x00F0) >> 4;
2236 target.pga[i] = (curr_gain[i] & 0x0F00) >> 8;
2237 target.txgm[i] = (curr_gain[i] & 0x7000) >> 12;
2238 } else {
2239 target.ipa[i] = curr_gain[i] & 0x0003;
2240 target.pad[i] = (curr_gain[i] & 0x000C) >> 2;
2241 target.pga[i] = (curr_gain[i] & 0x0070) >> 4;
2242 target.txgm[i] = (curr_gain[i] & 0x0380) >> 7;
2243 }
2244 }
2245 } else {
2246 int i;
2247 u16 index[2];
2248 index[0] = (b43_phy_read(dev, B43_NPHY_C1_TXPCTL_STAT) &
2249 B43_NPHY_TXPCTL_STAT_BIDX) >>
2250 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2251 index[1] = (b43_phy_read(dev, B43_NPHY_C2_TXPCTL_STAT) &
2252 B43_NPHY_TXPCTL_STAT_BIDX) >>
2253 B43_NPHY_TXPCTL_STAT_BIDX_SHIFT;
2254
2255 for (i = 0; i < 2; ++i) {
2256 if (dev->phy.rev >= 3) {
2257 enum ieee80211_band band =
2258 b43_current_band(dev->wl);
2259
2260 if ((nphy->ipa2g_on &&
2261 band == IEEE80211_BAND_2GHZ) ||
2262 (nphy->ipa5g_on &&
2263 band == IEEE80211_BAND_5GHZ)) {
2264 table = b43_nphy_get_ipa_gain_table(dev);
2265 } else {
2266 if (band == IEEE80211_BAND_5GHZ) {
2267 if (dev->phy.rev == 3)
2268 table = b43_ntab_tx_gain_rev3_5ghz;
2269 else if (dev->phy.rev == 4)
2270 table = b43_ntab_tx_gain_rev4_5ghz;
2271 else
2272 table = b43_ntab_tx_gain_rev5plus_5ghz;
2273 } else {
2274 table = b43_ntab_tx_gain_rev3plus_2ghz;
2275 }
2276 }
2277
2278 target.ipa[i] = (table[index[i]] >> 16) & 0xF;
2279 target.pad[i] = (table[index[i]] >> 20) & 0xF;
2280 target.pga[i] = (table[index[i]] >> 24) & 0xF;
2281 target.txgm[i] = (table[index[i]] >> 28) & 0xF;
2282 } else {
2283 table = b43_ntab_tx_gain_rev0_1_2;
2284
2285 target.ipa[i] = (table[index[i]] >> 16) & 0x3;
2286 target.pad[i] = (table[index[i]] >> 18) & 0x3;
2287 target.pga[i] = (table[index[i]] >> 20) & 0x7;
2288 target.txgm[i] = (table[index[i]] >> 23) & 0x7;
2289 }
2290 }
2291 }
2292
2293 return target;
2294}
2295
2296/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhyCleanup */
2297static void b43_nphy_tx_cal_phy_cleanup(struct b43_wldev *dev)
2298{
2299 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2300
2301 if (dev->phy.rev >= 3) {
2302 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[0]);
2303 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]);
2304 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]);
2305 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[3]);
2306 b43_phy_write(dev, B43_NPHY_BBCFG, regs[4]);
2307 b43_ntab_write(dev, B43_NTAB16(8, 3), regs[5]);
2308 b43_ntab_write(dev, B43_NTAB16(8, 19), regs[6]);
2309 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[7]);
2310 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[8]);
2311 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]);
2312 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]);
2313 b43_nphy_reset_cca(dev);
2314 } else {
2315 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, regs[0]);
2316 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, regs[1]);
2317 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]);
2318 b43_ntab_write(dev, B43_NTAB16(8, 2), regs[3]);
2319 b43_ntab_write(dev, B43_NTAB16(8, 18), regs[4]);
2320 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[5]);
2321 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[6]);
2322 }
2323}
2324
2325/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/TxCalPhySetup */
2326static void b43_nphy_tx_cal_phy_setup(struct b43_wldev *dev)
2327{
2328 u16 *regs = dev->phy.n->tx_rx_cal_phy_saveregs;
2329 u16 tmp;
2330
2331 regs[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
2332 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
2333 if (dev->phy.rev >= 3) {
2334 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0xF0FF, 0x0A00);
2335 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0xF0FF, 0x0A00);
2336
2337 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1);
2338 regs[2] = tmp;
2339 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, tmp | 0x0600);
2340
2341 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2342 regs[3] = tmp;
2343 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x0600);
2344
2345 regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG);
2346 b43_phy_mask(dev, B43_NPHY_BBCFG, (u16)~B43_NPHY_BBCFG_RSTRX);
2347
2348 tmp = b43_ntab_read(dev, B43_NTAB16(8, 3));
2349 regs[5] = tmp;
2350 b43_ntab_write(dev, B43_NTAB16(8, 3), 0);
2351
2352 tmp = b43_ntab_read(dev, B43_NTAB16(8, 19));
2353 regs[6] = tmp;
2354 b43_ntab_write(dev, B43_NTAB16(8, 19), 0);
2355 regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2356 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2357
2358 b43_nphy_rf_control_intc_override(dev, 2, 1, 3);
2359 b43_nphy_rf_control_intc_override(dev, 1, 2, 1);
2360 b43_nphy_rf_control_intc_override(dev, 1, 8, 2);
2361
2362 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0);
2363 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1);
2364 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001);
2365 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001);
2366 } else {
2367 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, 0xA000);
2368 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, 0xA000);
2369 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2370 regs[2] = tmp;
2371 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp | 0x3000);
2372 tmp = b43_ntab_read(dev, B43_NTAB16(8, 2));
2373 regs[3] = tmp;
2374 tmp |= 0x2000;
2375 b43_ntab_write(dev, B43_NTAB16(8, 2), tmp);
2376 tmp = b43_ntab_read(dev, B43_NTAB16(8, 18));
2377 regs[4] = tmp;
2378 tmp |= 0x2000;
2379 b43_ntab_write(dev, B43_NTAB16(8, 18), tmp);
2380 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1);
2381 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2);
2382 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
2383 tmp = 0x0180;
2384 else
2385 tmp = 0x0120;
2386 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp);
2387 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp);
2388 }
2389}
2390
2391/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/SaveCal */
2392static void b43_nphy_save_cal(struct b43_wldev *dev)
2393{
2394 struct b43_phy_n *nphy = dev->phy.n;
2395
2396 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2397 u16 *txcal_radio_regs = NULL;
2398 u8 *iqcal_chanspec;
2399 u16 *table = NULL;
2400
2401 if (nphy->hang_avoid)
2402 b43_nphy_stay_in_carrier_search(dev, 1);
2403
2404 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2405 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2406 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2407 iqcal_chanspec = &nphy->iqcal_chanspec_2G;
2408 table = nphy->cal_cache.txcal_coeffs_2G;
2409 } else {
2410 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2411 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2412 iqcal_chanspec = &nphy->iqcal_chanspec_5G;
2413 table = nphy->cal_cache.txcal_coeffs_5G;
2414 }
2415
2416 b43_nphy_rx_iq_coeffs(dev, false, rxcal_coeffs);
2417 /* TODO use some definitions */
2418 if (dev->phy.rev >= 3) {
2419 txcal_radio_regs[0] = b43_radio_read(dev, 0x2021);
2420 txcal_radio_regs[1] = b43_radio_read(dev, 0x2022);
2421 txcal_radio_regs[2] = b43_radio_read(dev, 0x3021);
2422 txcal_radio_regs[3] = b43_radio_read(dev, 0x3022);
2423 txcal_radio_regs[4] = b43_radio_read(dev, 0x2023);
2424 txcal_radio_regs[5] = b43_radio_read(dev, 0x2024);
2425 txcal_radio_regs[6] = b43_radio_read(dev, 0x3023);
2426 txcal_radio_regs[7] = b43_radio_read(dev, 0x3024);
2427 } else {
2428 txcal_radio_regs[0] = b43_radio_read(dev, 0x8B);
2429 txcal_radio_regs[1] = b43_radio_read(dev, 0xBA);
2430 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D);
2431 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC);
2432 }
2433 *iqcal_chanspec = nphy->radio_chanspec;
2434 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 8, table);
2435
2436 if (nphy->hang_avoid)
2437 b43_nphy_stay_in_carrier_search(dev, 0);
2438}
2439
2440/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/RestoreCal */
2441static void b43_nphy_restore_cal(struct b43_wldev *dev)
2442{
2443 struct b43_phy_n *nphy = dev->phy.n;
2444
2445 u16 coef[4];
2446 u16 *loft = NULL;
2447 u16 *table = NULL;
2448
2449 int i;
2450 u16 *txcal_radio_regs = NULL;
2451 struct b43_phy_n_iq_comp *rxcal_coeffs = NULL;
2452
2453 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2454 if (nphy->iqcal_chanspec_2G == 0)
2455 return;
2456 table = nphy->cal_cache.txcal_coeffs_2G;
2457 loft = &nphy->cal_cache.txcal_coeffs_2G[5];
2458 } else {
2459 if (nphy->iqcal_chanspec_5G == 0)
2460 return;
2461 table = nphy->cal_cache.txcal_coeffs_5G;
2462 loft = &nphy->cal_cache.txcal_coeffs_5G[5];
2463 }
2464
2465 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, table);
2466
2467 for (i = 0; i < 4; i++) {
2468 if (dev->phy.rev >= 3)
2469 table[i] = coef[i];
2470 else
2471 coef[i] = 0;
2472 }
2473
2474 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, coef);
2475 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, loft);
2476 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, loft);
2477
2478 if (dev->phy.rev < 2)
2479 b43_nphy_tx_iq_workaround(dev);
2480
2481 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
2482 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_2G;
2483 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_2G;
2484 } else {
2485 txcal_radio_regs = nphy->cal_cache.txcal_radio_regs_5G;
2486 rxcal_coeffs = &nphy->cal_cache.rxcal_coeffs_5G;
2487 }
2488
2489 /* TODO use some definitions */
2490 if (dev->phy.rev >= 3) {
2491 b43_radio_write(dev, 0x2021, txcal_radio_regs[0]);
2492 b43_radio_write(dev, 0x2022, txcal_radio_regs[1]);
2493 b43_radio_write(dev, 0x3021, txcal_radio_regs[2]);
2494 b43_radio_write(dev, 0x3022, txcal_radio_regs[3]);
2495 b43_radio_write(dev, 0x2023, txcal_radio_regs[4]);
2496 b43_radio_write(dev, 0x2024, txcal_radio_regs[5]);
2497 b43_radio_write(dev, 0x3023, txcal_radio_regs[6]);
2498 b43_radio_write(dev, 0x3024, txcal_radio_regs[7]);
2499 } else {
2500 b43_radio_write(dev, 0x8B, txcal_radio_regs[0]);
2501 b43_radio_write(dev, 0xBA, txcal_radio_regs[1]);
2502 b43_radio_write(dev, 0x8D, txcal_radio_regs[2]);
2503 b43_radio_write(dev, 0xBC, txcal_radio_regs[3]);
2504 }
2505 b43_nphy_rx_iq_coeffs(dev, true, rxcal_coeffs);
2506}
2507
2508/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalTxIqlo */
2509static int b43_nphy_cal_tx_iq_lo(struct b43_wldev *dev,
2510 struct nphy_txgains target,
2511 bool full, bool mphase)
2512{
2513 struct b43_phy_n *nphy = dev->phy.n;
2514 int i;
2515 int error = 0;
2516 int freq;
2517 bool avoid = false;
2518 u8 length;
2519 u16 tmp, core, type, count, max, numb, last, cmd;
2520 const u16 *table;
2521 bool phy6or5x;
2522
2523 u16 buffer[11];
2524 u16 diq_start = 0;
2525 u16 save[2];
2526 u16 gain[2];
2527 struct nphy_iqcal_params params[2];
2528 bool updated[2] = { };
2529
2530 b43_nphy_stay_in_carrier_search(dev, true);
2531
2532 if (dev->phy.rev >= 4) {
2533 avoid = nphy->hang_avoid;
2534 nphy->hang_avoid = 0;
2535 }
2536
2537 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
2538
2539 for (i = 0; i < 2; i++) {
2540 b43_nphy_iq_cal_gain_params(dev, i, target, &params[i]);
2541 gain[i] = params[i].cal_gain;
2542 }
2543
2544 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain);
2545
2546 b43_nphy_tx_cal_radio_setup(dev);
2547 b43_nphy_tx_cal_phy_setup(dev);
2548
2549 phy6or5x = dev->phy.rev >= 6 ||
2550 (dev->phy.rev == 5 && nphy->ipa2g_on &&
2551 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ);
2552 if (phy6or5x) {
2553 if (dev->phy.is_40mhz) {
2554 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2555 tbl_tx_iqlo_cal_loft_ladder_40);
2556 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2557 tbl_tx_iqlo_cal_iqimb_ladder_40);
2558 } else {
2559 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18,
2560 tbl_tx_iqlo_cal_loft_ladder_20);
2561 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18,
2562 tbl_tx_iqlo_cal_iqimb_ladder_20);
2563 }
2564 }
2565
2566 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AA9);
2567
2568 if (!dev->phy.is_40mhz)
2569 freq = 2500;
2570 else
2571 freq = 5000;
2572
2573 if (nphy->mphase_cal_phase_id > 2)
2574 b43_nphy_run_samples(dev, (dev->phy.is_40mhz ? 40 : 20) * 8,
2575 0xFFFF, 0, true, false);
2576 else
2577 error = b43_nphy_tx_tone(dev, freq, 250, true, false);
2578
2579 if (error == 0) {
2580 if (nphy->mphase_cal_phase_id > 2) {
2581 table = nphy->mphase_txcal_bestcoeffs;
2582 length = 11;
2583 if (dev->phy.rev < 3)
2584 length -= 2;
2585 } else {
2586 if (!full && nphy->txiqlocal_coeffsvalid) {
2587 table = nphy->txiqlocal_bestc;
2588 length = 11;
2589 if (dev->phy.rev < 3)
2590 length -= 2;
2591 } else {
2592 full = true;
2593 if (dev->phy.rev >= 3) {
2594 table = tbl_tx_iqlo_cal_startcoefs_nphyrev3;
2595 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3;
2596 } else {
2597 table = tbl_tx_iqlo_cal_startcoefs;
2598 length = B43_NTAB_TX_IQLO_CAL_STARTCOEFS;
2599 }
2600 }
2601 }
2602
2603 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, table);
2604
2605 if (full) {
2606 if (dev->phy.rev >= 3)
2607 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3;
2608 else
2609 max = B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL;
2610 } else {
2611 if (dev->phy.rev >= 3)
2612 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3;
2613 else
2614 max = B43_NTAB_TX_IQLO_CAL_CMDS_RECAL;
2615 }
2616
2617 if (mphase) {
2618 count = nphy->mphase_txcal_cmdidx;
2619 numb = min(max,
2620 (u16)(count + nphy->mphase_txcal_numcmds));
2621 } else {
2622 count = 0;
2623 numb = max;
2624 }
2625
2626 for (; count < numb; count++) {
2627 if (full) {
2628 if (dev->phy.rev >= 3)
2629 cmd = tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[count];
2630 else
2631 cmd = tbl_tx_iqlo_cal_cmds_fullcal[count];
2632 } else {
2633 if (dev->phy.rev >= 3)
2634 cmd = tbl_tx_iqlo_cal_cmds_recal_nphyrev3[count];
2635 else
2636 cmd = tbl_tx_iqlo_cal_cmds_recal[count];
2637 }
2638
2639 core = (cmd & 0x3000) >> 12;
2640 type = (cmd & 0x0F00) >> 8;
2641
2642 if (phy6or5x && updated[core] == 0) {
2643 b43_nphy_update_tx_cal_ladder(dev, core);
2644 updated[core] = 1;
2645 }
2646
2647 tmp = (params[core].ncorr[type] << 8) | 0x66;
2648 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDNNUM, tmp);
2649
2650 if (type == 1 || type == 3 || type == 4) {
2651 buffer[0] = b43_ntab_read(dev,
2652 B43_NTAB16(15, 69 + core));
2653 diq_start = buffer[0];
2654 buffer[0] = 0;
2655 b43_ntab_write(dev, B43_NTAB16(15, 69 + core),
2656 0);
2657 }
2658
2659 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMD, cmd);
2660 for (i = 0; i < 2000; i++) {
2661 tmp = b43_phy_read(dev, B43_NPHY_IQLOCAL_CMD);
2662 if (tmp & 0xC000)
2663 break;
2664 udelay(10);
2665 }
2666
2667 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2668 buffer);
2669 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length,
2670 buffer);
2671
2672 if (type == 1 || type == 3 || type == 4)
2673 buffer[0] = diq_start;
2674 }
2675
2676 if (mphase)
2677 nphy->mphase_txcal_cmdidx = (numb >= max) ? 0 : numb;
2678
2679 last = (dev->phy.rev < 3) ? 6 : 7;
2680
2681 if (!mphase || nphy->mphase_cal_phase_id == last) {
2682 b43_ntab_write_bulk(dev, B43_NTAB16(15, 96), 4, buffer);
2683 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 4, buffer);
2684 if (dev->phy.rev < 3) {
2685 buffer[0] = 0;
2686 buffer[1] = 0;
2687 buffer[2] = 0;
2688 buffer[3] = 0;
2689 }
2690 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2691 buffer);
2692 b43_ntab_write_bulk(dev, B43_NTAB16(15, 101), 2,
2693 buffer);
2694 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2695 buffer);
2696 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2697 buffer);
2698 length = 11;
2699 if (dev->phy.rev < 3)
2700 length -= 2;
2701 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2702 nphy->txiqlocal_bestc);
2703 nphy->txiqlocal_coeffsvalid = true;
2704 /* TODO: Set nphy->txiqlocal_chanspec to
2705 the current channel */
2706 } else {
2707 length = 11;
2708 if (dev->phy.rev < 3)
2709 length -= 2;
2710 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length,
2711 nphy->mphase_txcal_bestcoeffs);
2712 }
2713
2714 b43_nphy_stop_playback(dev);
2715 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0);
2716 }
2717
2718 b43_nphy_tx_cal_phy_cleanup(dev);
2719 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save);
2720
2721 if (dev->phy.rev < 2 && (!mphase || nphy->mphase_cal_phase_id == last))
2722 b43_nphy_tx_iq_workaround(dev);
2723
2724 if (dev->phy.rev >= 4)
2725 nphy->hang_avoid = avoid;
2726
2727 b43_nphy_stay_in_carrier_search(dev, false);
2728
2729 return error;
2730}
2731
2732/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/ReapplyTxCalCoeffs */
2733static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev *dev)
2734{
2735 struct b43_phy_n *nphy = dev->phy.n;
2736 u8 i;
2737 u16 buffer[7];
2738 bool equal = true;
2739
2740 if (!nphy->txiqlocal_coeffsvalid || 1 /* FIXME */)
2741 return;
2742
2743 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer);
2744 for (i = 0; i < 4; i++) {
2745 if (buffer[i] != nphy->txiqlocal_bestc[i]) {
2746 equal = false;
2747 break;
2748 }
2749 }
2750
2751 if (!equal) {
2752 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4,
2753 nphy->txiqlocal_bestc);
2754 for (i = 0; i < 4; i++)
2755 buffer[i] = 0;
2756 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4,
2757 buffer);
2758 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2,
2759 &nphy->txiqlocal_bestc[5]);
2760 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2,
2761 &nphy->txiqlocal_bestc[5]);
2762 }
2763}
2764
2765/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIqRev2 */
2766static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev *dev,
2767 struct nphy_txgains target, u8 type, bool debug)
2768{
2769 struct b43_phy_n *nphy = dev->phy.n;
2770 int i, j, index;
2771 u8 rfctl[2];
2772 u8 afectl_core;
2773 u16 tmp[6];
2774 u16 cur_hpf1, cur_hpf2, cur_lna;
2775 u32 real, imag;
2776 enum ieee80211_band band;
2777
2778 u8 use;
2779 u16 cur_hpf;
2780 u16 lna[3] = { 3, 3, 1 };
2781 u16 hpf1[3] = { 7, 2, 0 };
2782 u16 hpf2[3] = { 2, 0, 0 };
2783 u32 power[3] = { };
2784 u16 gain_save[2];
2785 u16 cal_gain[2];
2786 struct nphy_iqcal_params cal_params[2];
2787 struct nphy_iq_est est;
2788 int ret = 0;
2789 bool playtone = true;
2790 int desired = 13;
2791
2792 b43_nphy_stay_in_carrier_search(dev, 1);
2793
2794 if (dev->phy.rev < 2)
2795 b43_nphy_reapply_tx_cal_coeffs(dev);
2796 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
2797 for (i = 0; i < 2; i++) {
2798 b43_nphy_iq_cal_gain_params(dev, i, target, &cal_params[i]);
2799 cal_gain[i] = cal_params[i].cal_gain;
2800 }
2801 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, cal_gain);
2802
2803 for (i = 0; i < 2; i++) {
2804 if (i == 0) {
2805 rfctl[0] = B43_NPHY_RFCTL_INTC1;
2806 rfctl[1] = B43_NPHY_RFCTL_INTC2;
2807 afectl_core = B43_NPHY_AFECTL_C1;
2808 } else {
2809 rfctl[0] = B43_NPHY_RFCTL_INTC2;
2810 rfctl[1] = B43_NPHY_RFCTL_INTC1;
2811 afectl_core = B43_NPHY_AFECTL_C2;
2812 }
2813
2814 tmp[1] = b43_phy_read(dev, B43_NPHY_RFSEQCA);
2815 tmp[2] = b43_phy_read(dev, afectl_core);
2816 tmp[3] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
2817 tmp[4] = b43_phy_read(dev, rfctl[0]);
2818 tmp[5] = b43_phy_read(dev, rfctl[1]);
2819
2820 b43_phy_maskset(dev, B43_NPHY_RFSEQCA,
2821 (u16)~B43_NPHY_RFSEQCA_RXDIS,
2822 ((1 - i) << B43_NPHY_RFSEQCA_RXDIS_SHIFT));
2823 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN,
2824 (1 - i));
2825 b43_phy_set(dev, afectl_core, 0x0006);
2826 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0006);
2827
2828 band = b43_current_band(dev->wl);
2829
2830 if (nphy->rxcalparams & 0xFF000000) {
2831 if (band == IEEE80211_BAND_5GHZ)
2832 b43_phy_write(dev, rfctl[0], 0x140);
2833 else
2834 b43_phy_write(dev, rfctl[0], 0x110);
2835 } else {
2836 if (band == IEEE80211_BAND_5GHZ)
2837 b43_phy_write(dev, rfctl[0], 0x180);
2838 else
2839 b43_phy_write(dev, rfctl[0], 0x120);
2840 }
2841
2842 if (band == IEEE80211_BAND_5GHZ)
2843 b43_phy_write(dev, rfctl[1], 0x148);
2844 else
2845 b43_phy_write(dev, rfctl[1], 0x114);
2846
2847 if (nphy->rxcalparams & 0x10000) {
2848 b43_radio_maskset(dev, B2055_C1_GENSPARE2, 0xFC,
2849 (i + 1));
2850 b43_radio_maskset(dev, B2055_C2_GENSPARE2, 0xFC,
2851 (2 - i));
2852 }
2853
2854 for (j = 0; i < 4; j++) {
2855 if (j < 3) {
2856 cur_lna = lna[j];
2857 cur_hpf1 = hpf1[j];
2858 cur_hpf2 = hpf2[j];
2859 } else {
2860 if (power[1] > 10000) {
2861 use = 1;
2862 cur_hpf = cur_hpf1;
2863 index = 2;
2864 } else {
2865 if (power[0] > 10000) {
2866 use = 1;
2867 cur_hpf = cur_hpf1;
2868 index = 1;
2869 } else {
2870 index = 0;
2871 use = 2;
2872 cur_hpf = cur_hpf2;
2873 }
2874 }
2875 cur_lna = lna[index];
2876 cur_hpf1 = hpf1[index];
2877 cur_hpf2 = hpf2[index];
2878 cur_hpf += desired - hweight32(power[index]);
2879 cur_hpf = clamp_val(cur_hpf, 0, 10);
2880 if (use == 1)
2881 cur_hpf1 = cur_hpf;
2882 else
2883 cur_hpf2 = cur_hpf;
2884 }
2885
2886 tmp[0] = ((cur_hpf2 << 8) | (cur_hpf1 << 4) |
2887 (cur_lna << 2));
2888 b43_nphy_rf_control_override(dev, 0x400, tmp[0], 3,
2889 false);
2890 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
2891 b43_nphy_stop_playback(dev);
2892
2893 if (playtone) {
2894 ret = b43_nphy_tx_tone(dev, 4000,
2895 (nphy->rxcalparams & 0xFFFF),
2896 false, false);
2897 playtone = false;
2898 } else {
2899 b43_nphy_run_samples(dev, 160, 0xFFFF, 0,
2900 false, false);
2901 }
2902
2903 if (ret == 0) {
2904 if (j < 3) {
2905 b43_nphy_rx_iq_est(dev, &est, 1024, 32,
2906 false);
2907 if (i == 0) {
2908 real = est.i0_pwr;
2909 imag = est.q0_pwr;
2910 } else {
2911 real = est.i1_pwr;
2912 imag = est.q1_pwr;
2913 }
2914 power[i] = ((real + imag) / 1024) + 1;
2915 } else {
2916 b43_nphy_calc_rx_iq_comp(dev, 1 << i);
2917 }
2918 b43_nphy_stop_playback(dev);
2919 }
2920
2921 if (ret != 0)
2922 break;
2923 }
2924
2925 b43_radio_mask(dev, B2055_C1_GENSPARE2, 0xFC);
2926 b43_radio_mask(dev, B2055_C2_GENSPARE2, 0xFC);
2927 b43_phy_write(dev, rfctl[1], tmp[5]);
2928 b43_phy_write(dev, rfctl[0], tmp[4]);
2929 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp[3]);
2930 b43_phy_write(dev, afectl_core, tmp[2]);
2931 b43_phy_write(dev, B43_NPHY_RFSEQCA, tmp[1]);
2932
2933 if (ret != 0)
2934 break;
2935 }
2936
2937 b43_nphy_rf_control_override(dev, 0x400, 0, 3, true);
2938 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
2939 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save);
2940
2941 b43_nphy_stay_in_carrier_search(dev, 0);
2942
2943 return ret;
2944}
2945
2946static int b43_nphy_rev3_cal_rx_iq(struct b43_wldev *dev,
2947 struct nphy_txgains target, u8 type, bool debug)
2948{
2949 return -1;
2950}
2951
2952/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/CalRxIq */
2953static int b43_nphy_cal_rx_iq(struct b43_wldev *dev,
2954 struct nphy_txgains target, u8 type, bool debug)
2955{
2956 if (dev->phy.rev >= 3)
2957 return b43_nphy_rev3_cal_rx_iq(dev, target, type, debug);
2958 else
2959 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug);
2960}
2961
2962/*
2963 * Init N-PHY
2964 * http://bcm-v4.sipsolutions.net/802.11/PHY/Init/N
2965 */
420int b43_phy_initn(struct b43_wldev *dev) 2966int b43_phy_initn(struct b43_wldev *dev)
421{ 2967{
2968 struct ssb_bus *bus = dev->dev->bus;
422 struct b43_phy *phy = &dev->phy; 2969 struct b43_phy *phy = &dev->phy;
2970 struct b43_phy_n *nphy = phy->n;
2971 u8 tx_pwr_state;
2972 struct nphy_txgains target;
423 u16 tmp; 2973 u16 tmp;
2974 enum ieee80211_band tmp2;
2975 bool do_rssi_cal;
424 2976
425 //TODO: Spectral management 2977 u16 clip[2];
2978 bool do_cal = false;
2979
2980 if ((dev->phy.rev >= 3) &&
2981 (bus->sprom.boardflags_lo & B43_BFL_EXTLNA) &&
2982 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) {
2983 chipco_set32(&dev->dev->bus->chipco, SSB_CHIPCO_CHIPCTL, 0x40);
2984 }
2985 nphy->deaf_count = 0;
426 b43_nphy_tables_init(dev); 2986 b43_nphy_tables_init(dev);
2987 nphy->crsminpwr_adjusted = false;
2988 nphy->noisevars_adjusted = false;
427 2989
428 /* Clear all overrides */ 2990 /* Clear all overrides */
429 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0); 2991 if (dev->phy.rev >= 3) {
2992 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, 0);
2993 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
2994 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, 0);
2995 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, 0);
2996 } else {
2997 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0);
2998 }
430 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0); 2999 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0);
431 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0); 3000 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0);
432 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0); 3001 if (dev->phy.rev < 6) {
433 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0); 3002 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0);
3003 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0);
3004 }
434 b43_phy_mask(dev, B43_NPHY_RFSEQMODE, 3005 b43_phy_mask(dev, B43_NPHY_RFSEQMODE,
435 ~(B43_NPHY_RFSEQMODE_CAOVER | 3006 ~(B43_NPHY_RFSEQMODE_CAOVER |
436 B43_NPHY_RFSEQMODE_TROVER)); 3007 B43_NPHY_RFSEQMODE_TROVER));
3008 if (dev->phy.rev >= 3)
3009 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, 0);
437 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0); 3010 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0);
438 3011
439 tmp = (phy->rev < 2) ? 64 : 59; 3012 if (dev->phy.rev <= 2) {
440 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, 3013 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40;
441 ~B43_NPHY_BPHY_CTL3_SCALE, 3014 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3,
442 tmp << B43_NPHY_BPHY_CTL3_SCALE_SHIFT); 3015 ~B43_NPHY_BPHY_CTL3_SCALE,
443 3016 tmp << B43_NPHY_BPHY_CTL3_SCALE_SHIFT);
3017 }
444 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20); 3018 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20);
445 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20); 3019 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20);
446 3020
447 b43_phy_write(dev, B43_NPHY_TXREALFD, 184); 3021 if (bus->sprom.boardflags2_lo & 0x100 ||
448 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 200); 3022 (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
449 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 80); 3023 bus->boardinfo.type == 0x8B))
450 b43_phy_write(dev, B43_NPHY_C2_BCLIPBKOFF, 511); 3024 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0);
3025 else
3026 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8);
3027 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 0xC8);
3028 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x50);
3029 b43_phy_write(dev, B43_NPHY_TXRIFS_FRDEL, 0x30);
451 3030
452 //TODO MIMO-Config 3031 b43_nphy_update_mimo_config(dev, nphy->preamble_override);
453 //TODO Update TX/RX chain 3032 b43_nphy_update_txrx_chain(dev);
454 3033
455 if (phy->rev < 2) { 3034 if (phy->rev < 2) {
456 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8); 3035 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8);
457 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4); 3036 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4);
458 } 3037 }
3038
3039 tmp2 = b43_current_band(dev->wl);
3040 if ((nphy->ipa2g_on && tmp2 == IEEE80211_BAND_2GHZ) ||
3041 (nphy->ipa5g_on && tmp2 == IEEE80211_BAND_5GHZ)) {
3042 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1);
3043 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F,
3044 nphy->papd_epsilon_offset[0] << 7);
3045 b43_phy_set(dev, B43_NPHY_PAPD_EN1, 0x1);
3046 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ1, 0x007F,
3047 nphy->papd_epsilon_offset[1] << 7);
3048 b43_nphy_int_pa_set_tx_dig_filters(dev);
3049 } else if (phy->rev >= 5) {
3050 b43_nphy_ext_pa_set_tx_dig_filters(dev);
3051 }
3052
459 b43_nphy_workarounds(dev); 3053 b43_nphy_workarounds(dev);
460 b43_nphy_reset_cca(dev);
461 3054
462 ssb_write32(dev->dev, SSB_TMSLOW, 3055 /* Reset CCA, in init code it differs a little from standard way */
463 ssb_read32(dev->dev, SSB_TMSLOW) | B43_TMSLOW_MACPHYCLKEN); 3056 b43_nphy_bmac_clock_fgc(dev, 1);
3057 tmp = b43_phy_read(dev, B43_NPHY_BBCFG);
3058 b43_phy_write(dev, B43_NPHY_BBCFG, tmp | B43_NPHY_BBCFG_RSTCCA);
3059 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA);
3060 b43_nphy_bmac_clock_fgc(dev, 0);
3061
3062 /* TODO N PHY MAC PHY Clock Set with argument 1 */
3063
3064 b43_nphy_pa_override(dev, false);
464 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX); 3065 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX);
465 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); 3066 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX);
3067 b43_nphy_pa_override(dev, true);
3068
3069 b43_nphy_classifier(dev, 0, 0);
3070 b43_nphy_read_clip_detection(dev, clip);
3071 tx_pwr_state = nphy->txpwrctrl;
3072 /* TODO N PHY TX power control with argument 0
3073 (turning off power control) */
3074 /* TODO Fix the TX Power Settings */
3075 /* TODO N PHY TX Power Control Idle TSSI */
3076 /* TODO N PHY TX Power Control Setup */
3077
3078 if (phy->rev >= 3) {
3079 /* TODO */
3080 } else {
3081 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128,
3082 b43_ntab_tx_gain_rev0_1_2);
3083 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128,
3084 b43_ntab_tx_gain_rev0_1_2);
3085 }
3086
3087 if (nphy->phyrxchain != 3)
3088 ;/* TODO N PHY RX Core Set State with phyrxchain as argument */
3089 if (nphy->mphase_cal_phase_id > 0)
3090 ;/* TODO PHY Periodic Calibration Multi-Phase Restart */
3091
3092 do_rssi_cal = false;
3093 if (phy->rev >= 3) {
3094 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3095 do_rssi_cal = (nphy->rssical_chanspec_2G == 0);
3096 else
3097 do_rssi_cal = (nphy->rssical_chanspec_5G == 0);
3098
3099 if (do_rssi_cal)
3100 b43_nphy_rssi_cal(dev);
3101 else
3102 b43_nphy_restore_rssi_cal(dev);
3103 } else {
3104 b43_nphy_rssi_cal(dev);
3105 }
3106
3107 if (!((nphy->measure_hold & 0x6) != 0)) {
3108 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
3109 do_cal = (nphy->iqcal_chanspec_2G == 0);
3110 else
3111 do_cal = (nphy->iqcal_chanspec_5G == 0);
3112
3113 if (nphy->mute)
3114 do_cal = false;
3115
3116 if (do_cal) {
3117 target = b43_nphy_get_tx_gains(dev);
3118
3119 if (nphy->antsel_type == 2)
3120 ;/*TODO NPHY Superswitch Init with argument 1*/
3121 if (nphy->perical != 2) {
3122 b43_nphy_rssi_cal(dev);
3123 if (phy->rev >= 3) {
3124 nphy->cal_orig_pwr_idx[0] =
3125 nphy->txpwrindex[0].index_internal;
3126 nphy->cal_orig_pwr_idx[1] =
3127 nphy->txpwrindex[1].index_internal;
3128 /* TODO N PHY Pre Calibrate TX Gain */
3129 target = b43_nphy_get_tx_gains(dev);
3130 }
3131 }
3132 }
3133 }
3134
3135 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) {
3136 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0)
3137 b43_nphy_save_cal(dev);
3138 else if (nphy->mphase_cal_phase_id == 0)
3139 ;/* N PHY Periodic Calibration with argument 3 */
3140 } else {
3141 b43_nphy_restore_cal(dev);
3142 }
466 3143
467 b43_phy_read(dev, B43_NPHY_CLASSCTL); /* dummy read */ 3144 b43_nphy_tx_pwr_ctrl_coef_setup(dev);
468 //TODO read core1/2 clip1 thres regs 3145 /* TODO N PHY TX Power Control Enable with argument tx_pwr_state */
469 3146 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015);
470 if (1 /* FIXME Band is 2.4GHz */) 3147 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320);
471 b43_nphy_bphy_init(dev); 3148 if (phy->rev >= 3 && phy->rev <= 6)
472 //TODO disable TX power control 3149 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0014);
473 //TODO Fix the TX power settings 3150 b43_nphy_tx_lp_fbw(dev);
474 //TODO Init periodic calibration with reason 3 3151 if (phy->rev >= 3)
475 b43_nphy_rssi_cal(dev, 2); 3152 b43_nphy_spur_workaround(dev);
476 b43_nphy_rssi_cal(dev, 0);
477 b43_nphy_rssi_cal(dev, 1);
478 //TODO get TX gain
479 //TODO init superswitch
480 //TODO calibrate LO
481 //TODO idle TSSI TX pctl
482 //TODO TX power control power setup
483 //TODO table writes
484 //TODO TX power control coefficients
485 //TODO enable TX power control
486 //TODO control antenna selection
487 //TODO init radar detection
488 //TODO reset channel if changed
489 3153
490 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n"); 3154 b43err(dev->wl, "IEEE 802.11n devices are not supported, yet.\n");
491 return 0; 3155 return 0;
diff --git a/drivers/net/wireless/b43/phy_n.h b/drivers/net/wireless/b43/phy_n.h
index 1749aef4147d..403aad3f894f 100644
--- a/drivers/net/wireless/b43/phy_n.h
+++ b/drivers/net/wireless/b43/phy_n.h
@@ -231,6 +231,7 @@
231#define B43_NPHY_C2_TXIQ_COMP_OFF B43_PHY_N(0x088) /* Core 2 TX I/Q comp offset */ 231#define B43_NPHY_C2_TXIQ_COMP_OFF B43_PHY_N(0x088) /* Core 2 TX I/Q comp offset */
232#define B43_NPHY_C1_TXCTL B43_PHY_N(0x08B) /* Core 1 TX control */ 232#define B43_NPHY_C1_TXCTL B43_PHY_N(0x08B) /* Core 1 TX control */
233#define B43_NPHY_C2_TXCTL B43_PHY_N(0x08C) /* Core 2 TX control */ 233#define B43_NPHY_C2_TXCTL B43_PHY_N(0x08C) /* Core 2 TX control */
234#define B43_NPHY_AFECTL_OVER1 B43_PHY_N(0x08F) /* AFE control override 1 */
234#define B43_NPHY_SCRAM_SIGCTL B43_PHY_N(0x090) /* Scram signal control */ 235#define B43_NPHY_SCRAM_SIGCTL B43_PHY_N(0x090) /* Scram signal control */
235#define B43_NPHY_SCRAM_SIGCTL_INITST 0x007F /* Initial state value */ 236#define B43_NPHY_SCRAM_SIGCTL_INITST 0x007F /* Initial state value */
236#define B43_NPHY_SCRAM_SIGCTL_INITST_SHIFT 0 237#define B43_NPHY_SCRAM_SIGCTL_INITST_SHIFT 0
@@ -705,6 +706,10 @@
705#define B43_NPHY_TXPCTL_INIT B43_PHY_N(0x222) /* TX power controll init */ 706#define B43_NPHY_TXPCTL_INIT B43_PHY_N(0x222) /* TX power controll init */
706#define B43_NPHY_TXPCTL_INIT_PIDXI1 0x00FF /* Power index init 1 */ 707#define B43_NPHY_TXPCTL_INIT_PIDXI1 0x00FF /* Power index init 1 */
707#define B43_NPHY_TXPCTL_INIT_PIDXI1_SHIFT 0 708#define B43_NPHY_TXPCTL_INIT_PIDXI1_SHIFT 0
709#define B43_NPHY_PAPD_EN0 B43_PHY_N(0x297) /* PAPD Enable0 TBD */
710#define B43_NPHY_EPS_TABLE_ADJ0 B43_PHY_N(0x298) /* EPS Table Adj0 TBD */
711#define B43_NPHY_PAPD_EN1 B43_PHY_N(0x29B) /* PAPD Enable1 TBD */
712#define B43_NPHY_EPS_TABLE_ADJ1 B43_PHY_N(0x29C) /* EPS Table Adj1 TBD */
708 713
709 714
710 715
@@ -919,8 +924,99 @@
919 924
920struct b43_wldev; 925struct b43_wldev;
921 926
927struct b43_phy_n_iq_comp {
928 s16 a0;
929 s16 b0;
930 s16 a1;
931 s16 b1;
932};
933
934struct b43_phy_n_rssical_cache {
935 u16 rssical_radio_regs_2G[2];
936 u16 rssical_phy_regs_2G[12];
937
938 u16 rssical_radio_regs_5G[2];
939 u16 rssical_phy_regs_5G[12];
940};
941
942struct b43_phy_n_cal_cache {
943 u16 txcal_radio_regs_2G[8];
944 u16 txcal_coeffs_2G[8];
945 struct b43_phy_n_iq_comp rxcal_coeffs_2G;
946
947 u16 txcal_radio_regs_5G[8];
948 u16 txcal_coeffs_5G[8];
949 struct b43_phy_n_iq_comp rxcal_coeffs_5G;
950};
951
952struct b43_phy_n_txpwrindex {
953 s8 index;
954 s8 index_internal;
955 s8 index_internal_save;
956 u16 AfectrlOverride;
957 u16 AfeCtrlDacGain;
958 u16 rad_gain;
959 u8 bbmult;
960 u16 iqcomp_a;
961 u16 iqcomp_b;
962 u16 locomp;
963};
964
922struct b43_phy_n { 965struct b43_phy_n {
923 //TODO lots of missing stuff 966 u8 antsel_type;
967 u8 cal_orig_pwr_idx[2];
968 u8 measure_hold;
969 u8 phyrxchain;
970 u8 perical;
971 u32 deaf_count;
972 u32 rxcalparams;
973 bool hang_avoid;
974 bool mute;
975 u16 papd_epsilon_offset[2];
976 s32 preamble_override;
977 u32 bb_mult_save;
978 u16 radio_chanspec;
979
980 bool gain_boost;
981 bool elna_gain_config;
982 bool band5g_pwrgain;
983
984 u8 mphase_cal_phase_id;
985 u16 mphase_txcal_cmdidx;
986 u16 mphase_txcal_numcmds;
987 u16 mphase_txcal_bestcoeffs[11];
988
989 u8 txpwrctrl;
990 u16 txcal_bbmult;
991 u16 txiqlocal_bestc[11];
992 bool txiqlocal_coeffsvalid;
993 struct b43_phy_n_txpwrindex txpwrindex[2];
994
995 u8 txrx_chain;
996 u16 tx_rx_cal_phy_saveregs[11];
997 u16 tx_rx_cal_radio_saveregs[22];
998
999 u16 rfctrl_intc1_save;
1000 u16 rfctrl_intc2_save;
1001
1002 u16 classifier_state;
1003 u16 clip_state[2];
1004
1005 bool aband_spurwar_en;
1006 bool gband_spurwar_en;
1007
1008 bool ipa2g_on;
1009 u8 iqcal_chanspec_2G;
1010 u8 rssical_chanspec_2G;
1011
1012 bool ipa5g_on;
1013 u8 iqcal_chanspec_5G;
1014 u8 rssical_chanspec_5G;
1015
1016 struct b43_phy_n_rssical_cache rssical_cache;
1017 struct b43_phy_n_cal_cache cal_cache;
1018 bool crsminpwr_adjusted;
1019 bool noisevars_adjusted;
924}; 1020};
925 1021
926 1022
diff --git a/drivers/net/wireless/b43/pio.c b/drivers/net/wireless/b43/pio.c
index 9b9044400218..aa12273ae716 100644
--- a/drivers/net/wireless/b43/pio.c
+++ b/drivers/net/wireless/b43/pio.c
@@ -31,6 +31,7 @@
31 31
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/sched.h> 33#include <linux/sched.h>
34#include <linux/slab.h>
34 35
35 36
36static u16 generate_cookie(struct b43_pio_txqueue *q, 37static u16 generate_cookie(struct b43_pio_txqueue *q,
@@ -342,12 +343,15 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
342 q->mmio_base + B43_PIO_TXDATA, 343 q->mmio_base + B43_PIO_TXDATA,
343 sizeof(u16)); 344 sizeof(u16));
344 if (data_len & 1) { 345 if (data_len & 1) {
346 u8 *tail = wl->pio_tailspace;
347 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
348
345 /* Write the last byte. */ 349 /* Write the last byte. */
346 ctl &= ~B43_PIO_TXCTL_WRITEHI; 350 ctl &= ~B43_PIO_TXCTL_WRITEHI;
347 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); 351 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
348 wl->tx_tail[0] = data[data_len - 1]; 352 tail[0] = data[data_len - 1];
349 wl->tx_tail[1] = 0; 353 tail[1] = 0;
350 ssb_block_write(dev->dev, wl->tx_tail, 2, 354 ssb_block_write(dev->dev, tail, 2,
351 q->mmio_base + B43_PIO_TXDATA, 355 q->mmio_base + B43_PIO_TXDATA,
352 sizeof(u16)); 356 sizeof(u16));
353 } 357 }
@@ -393,31 +397,31 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
393 q->mmio_base + B43_PIO8_TXDATA, 397 q->mmio_base + B43_PIO8_TXDATA,
394 sizeof(u32)); 398 sizeof(u32));
395 if (data_len & 3) { 399 if (data_len & 3) {
396 wl->tx_tail[3] = 0; 400 u8 *tail = wl->pio_tailspace;
401 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
402
403 memset(tail, 0, 4);
397 /* Write the last few bytes. */ 404 /* Write the last few bytes. */
398 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 | 405 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
399 B43_PIO8_TXCTL_24_31); 406 B43_PIO8_TXCTL_24_31);
400 switch (data_len & 3) { 407 switch (data_len & 3) {
401 case 3: 408 case 3:
402 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15; 409 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
403 wl->tx_tail[0] = data[data_len - 3]; 410 tail[0] = data[data_len - 3];
404 wl->tx_tail[1] = data[data_len - 2]; 411 tail[1] = data[data_len - 2];
405 wl->tx_tail[2] = data[data_len - 1]; 412 tail[2] = data[data_len - 1];
406 break; 413 break;
407 case 2: 414 case 2:
408 ctl |= B43_PIO8_TXCTL_8_15; 415 ctl |= B43_PIO8_TXCTL_8_15;
409 wl->tx_tail[0] = data[data_len - 2]; 416 tail[0] = data[data_len - 2];
410 wl->tx_tail[1] = data[data_len - 1]; 417 tail[1] = data[data_len - 1];
411 wl->tx_tail[2] = 0;
412 break; 418 break;
413 case 1: 419 case 1:
414 wl->tx_tail[0] = data[data_len - 1]; 420 tail[0] = data[data_len - 1];
415 wl->tx_tail[1] = 0;
416 wl->tx_tail[2] = 0;
417 break; 421 break;
418 } 422 }
419 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); 423 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
420 ssb_block_write(dev->dev, wl->tx_tail, 4, 424 ssb_block_write(dev->dev, tail, 4,
421 q->mmio_base + B43_PIO8_TXDATA, 425 q->mmio_base + B43_PIO8_TXDATA,
422 sizeof(u32)); 426 sizeof(u32));
423 } 427 }
@@ -456,6 +460,7 @@ static int pio_tx_frame(struct b43_pio_txqueue *q,
456 int err; 460 int err;
457 unsigned int hdrlen; 461 unsigned int hdrlen;
458 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 462 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
463 struct b43_txhdr *txhdr = (struct b43_txhdr *)wl->pio_scratchspace;
459 464
460 B43_WARN_ON(list_empty(&q->packets_list)); 465 B43_WARN_ON(list_empty(&q->packets_list));
461 pack = list_entry(q->packets_list.next, 466 pack = list_entry(q->packets_list.next,
@@ -463,7 +468,9 @@ static int pio_tx_frame(struct b43_pio_txqueue *q,
463 468
464 cookie = generate_cookie(q, pack); 469 cookie = generate_cookie(q, pack);
465 hdrlen = b43_txhdr_size(dev); 470 hdrlen = b43_txhdr_size(dev);
466 err = b43_generate_txhdr(dev, (u8 *)&wl->txhdr, skb, 471 BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(struct b43_txhdr));
472 B43_WARN_ON(sizeof(wl->pio_scratchspace) < hdrlen);
473 err = b43_generate_txhdr(dev, (u8 *)txhdr, skb,
467 info, cookie); 474 info, cookie);
468 if (err) 475 if (err)
469 return err; 476 return err;
@@ -477,9 +484,9 @@ static int pio_tx_frame(struct b43_pio_txqueue *q,
477 484
478 pack->skb = skb; 485 pack->skb = skb;
479 if (q->rev >= 8) 486 if (q->rev >= 8)
480 pio_tx_frame_4byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen); 487 pio_tx_frame_4byte_queue(pack, (const u8 *)txhdr, hdrlen);
481 else 488 else
482 pio_tx_frame_2byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen); 489 pio_tx_frame_2byte_queue(pack, (const u8 *)txhdr, hdrlen);
483 490
484 /* Remove it from the list of available packet slots. 491 /* Remove it from the list of available packet slots.
485 * It will be put back when we receive the status report. */ 492 * It will be put back when we receive the status report. */
@@ -553,7 +560,6 @@ int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
553 b43err(dev->wl, "PIO transmission failure\n"); 560 b43err(dev->wl, "PIO transmission failure\n");
554 goto out; 561 goto out;
555 } 562 }
556 q->nr_tx_packets++;
557 563
558 B43_WARN_ON(q->buffer_used > q->buffer_size); 564 B43_WARN_ON(q->buffer_used > q->buffer_size);
559 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) || 565 if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
@@ -599,22 +605,6 @@ void b43_pio_handle_txstatus(struct b43_wldev *dev,
599 } 605 }
600} 606}
601 607
602void b43_pio_get_tx_stats(struct b43_wldev *dev,
603 struct ieee80211_tx_queue_stats *stats)
604{
605 const int nr_queues = dev->wl->hw->queues;
606 struct b43_pio_txqueue *q;
607 int i;
608
609 for (i = 0; i < nr_queues; i++) {
610 q = select_queue_by_priority(dev, i);
611
612 stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
613 stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
614 stats[i].count = q->nr_tx_packets;
615 }
616}
617
618/* Returns whether we should fetch another frame. */ 608/* Returns whether we should fetch another frame. */
619static bool pio_rx_frame(struct b43_pio_rxqueue *q) 609static bool pio_rx_frame(struct b43_pio_rxqueue *q)
620{ 610{
@@ -625,8 +615,11 @@ static bool pio_rx_frame(struct b43_pio_rxqueue *q)
625 unsigned int i, padding; 615 unsigned int i, padding;
626 struct sk_buff *skb; 616 struct sk_buff *skb;
627 const char *err_msg = NULL; 617 const char *err_msg = NULL;
618 struct b43_rxhdr_fw4 *rxhdr =
619 (struct b43_rxhdr_fw4 *)wl->pio_scratchspace;
628 620
629 memset(&wl->rxhdr, 0, sizeof(wl->rxhdr)); 621 BUILD_BUG_ON(sizeof(wl->pio_scratchspace) < sizeof(*rxhdr));
622 memset(rxhdr, 0, sizeof(*rxhdr));
630 623
631 /* Check if we have data and wait for it to get ready. */ 624 /* Check if we have data and wait for it to get ready. */
632 if (q->rev >= 8) { 625 if (q->rev >= 8) {
@@ -664,16 +657,16 @@ data_ready:
664 657
665 /* Get the preamble (RX header) */ 658 /* Get the preamble (RX header) */
666 if (q->rev >= 8) { 659 if (q->rev >= 8) {
667 ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr), 660 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
668 q->mmio_base + B43_PIO8_RXDATA, 661 q->mmio_base + B43_PIO8_RXDATA,
669 sizeof(u32)); 662 sizeof(u32));
670 } else { 663 } else {
671 ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr), 664 ssb_block_read(dev->dev, rxhdr, sizeof(*rxhdr),
672 q->mmio_base + B43_PIO_RXDATA, 665 q->mmio_base + B43_PIO_RXDATA,
673 sizeof(u16)); 666 sizeof(u16));
674 } 667 }
675 /* Sanity checks. */ 668 /* Sanity checks. */
676 len = le16_to_cpu(wl->rxhdr.frame_len); 669 len = le16_to_cpu(rxhdr->frame_len);
677 if (unlikely(len > 0x700)) { 670 if (unlikely(len > 0x700)) {
678 err_msg = "len > 0x700"; 671 err_msg = "len > 0x700";
679 goto rx_error; 672 goto rx_error;
@@ -683,7 +676,7 @@ data_ready:
683 goto rx_error; 676 goto rx_error;
684 } 677 }
685 678
686 macstat = le32_to_cpu(wl->rxhdr.mac_status); 679 macstat = le32_to_cpu(rxhdr->mac_status);
687 if (macstat & B43_RX_MAC_FCSERR) { 680 if (macstat & B43_RX_MAC_FCSERR) {
688 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) { 681 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
689 /* Drop frames with failed FCS. */ 682 /* Drop frames with failed FCS. */
@@ -708,22 +701,25 @@ data_ready:
708 q->mmio_base + B43_PIO8_RXDATA, 701 q->mmio_base + B43_PIO8_RXDATA,
709 sizeof(u32)); 702 sizeof(u32));
710 if (len & 3) { 703 if (len & 3) {
704 u8 *tail = wl->pio_tailspace;
705 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 4);
706
711 /* Read the last few bytes. */ 707 /* Read the last few bytes. */
712 ssb_block_read(dev->dev, wl->rx_tail, 4, 708 ssb_block_read(dev->dev, tail, 4,
713 q->mmio_base + B43_PIO8_RXDATA, 709 q->mmio_base + B43_PIO8_RXDATA,
714 sizeof(u32)); 710 sizeof(u32));
715 switch (len & 3) { 711 switch (len & 3) {
716 case 3: 712 case 3:
717 skb->data[len + padding - 3] = wl->rx_tail[0]; 713 skb->data[len + padding - 3] = tail[0];
718 skb->data[len + padding - 2] = wl->rx_tail[1]; 714 skb->data[len + padding - 2] = tail[1];
719 skb->data[len + padding - 1] = wl->rx_tail[2]; 715 skb->data[len + padding - 1] = tail[2];
720 break; 716 break;
721 case 2: 717 case 2:
722 skb->data[len + padding - 2] = wl->rx_tail[0]; 718 skb->data[len + padding - 2] = tail[0];
723 skb->data[len + padding - 1] = wl->rx_tail[1]; 719 skb->data[len + padding - 1] = tail[1];
724 break; 720 break;
725 case 1: 721 case 1:
726 skb->data[len + padding - 1] = wl->rx_tail[0]; 722 skb->data[len + padding - 1] = tail[0];
727 break; 723 break;
728 } 724 }
729 } 725 }
@@ -732,22 +728,29 @@ data_ready:
732 q->mmio_base + B43_PIO_RXDATA, 728 q->mmio_base + B43_PIO_RXDATA,
733 sizeof(u16)); 729 sizeof(u16));
734 if (len & 1) { 730 if (len & 1) {
731 u8 *tail = wl->pio_tailspace;
732 BUILD_BUG_ON(sizeof(wl->pio_tailspace) < 2);
733
735 /* Read the last byte. */ 734 /* Read the last byte. */
736 ssb_block_read(dev->dev, wl->rx_tail, 2, 735 ssb_block_read(dev->dev, tail, 2,
737 q->mmio_base + B43_PIO_RXDATA, 736 q->mmio_base + B43_PIO_RXDATA,
738 sizeof(u16)); 737 sizeof(u16));
739 skb->data[len + padding - 1] = wl->rx_tail[0]; 738 skb->data[len + padding - 1] = tail[0];
740 } 739 }
741 } 740 }
742 741
743 b43_rx(q->dev, skb, &wl->rxhdr); 742 b43_rx(q->dev, skb, rxhdr);
744 743
745 return 1; 744 return 1;
746 745
747rx_error: 746rx_error:
748 if (err_msg) 747 if (err_msg)
749 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg); 748 b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
750 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY); 749 if (q->rev >= 8)
750 b43_piorx_write32(q, B43_PIO8_RXCTL, B43_PIO8_RXCTL_DATARDY);
751 else
752 b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
753
751 return 1; 754 return 1;
752} 755}
753 756
diff --git a/drivers/net/wireless/b43/pio.h b/drivers/net/wireless/b43/pio.h
index 7dd649c9ddad..1e516147424f 100644
--- a/drivers/net/wireless/b43/pio.h
+++ b/drivers/net/wireless/b43/pio.h
@@ -55,8 +55,6 @@
55#define B43_PIO_MAX_NR_TXPACKETS 32 55#define B43_PIO_MAX_NR_TXPACKETS 32
56 56
57 57
58#ifdef CONFIG_B43_PIO
59
60struct b43_pio_txpacket { 58struct b43_pio_txpacket {
61 /* Pointer to the TX queue we belong to. */ 59 /* Pointer to the TX queue we belong to. */
62 struct b43_pio_txqueue *queue; 60 struct b43_pio_txqueue *queue;
@@ -92,9 +90,6 @@ struct b43_pio_txqueue {
92 struct b43_pio_txpacket packets[B43_PIO_MAX_NR_TXPACKETS]; 90 struct b43_pio_txpacket packets[B43_PIO_MAX_NR_TXPACKETS];
93 struct list_head packets_list; 91 struct list_head packets_list;
94 92
95 /* Total number of transmitted packets. */
96 unsigned int nr_tx_packets;
97
98 /* Shortcut to the 802.11 core revision. This is to 93 /* Shortcut to the 802.11 core revision. This is to
99 * avoid horrible pointer dereferencing in the fastpaths. */ 94 * avoid horrible pointer dereferencing in the fastpaths. */
100 u8 rev; 95 u8 rev;
@@ -162,49 +157,9 @@ void b43_pio_free(struct b43_wldev *dev);
162int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb); 157int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb);
163void b43_pio_handle_txstatus(struct b43_wldev *dev, 158void b43_pio_handle_txstatus(struct b43_wldev *dev,
164 const struct b43_txstatus *status); 159 const struct b43_txstatus *status);
165void b43_pio_get_tx_stats(struct b43_wldev *dev,
166 struct ieee80211_tx_queue_stats *stats);
167void b43_pio_rx(struct b43_pio_rxqueue *q); 160void b43_pio_rx(struct b43_pio_rxqueue *q);
168 161
169void b43_pio_tx_suspend(struct b43_wldev *dev); 162void b43_pio_tx_suspend(struct b43_wldev *dev);
170void b43_pio_tx_resume(struct b43_wldev *dev); 163void b43_pio_tx_resume(struct b43_wldev *dev);
171 164
172
173#else /* CONFIG_B43_PIO */
174
175
176static inline int b43_pio_init(struct b43_wldev *dev)
177{
178 return 0;
179}
180static inline void b43_pio_free(struct b43_wldev *dev)
181{
182}
183static inline void b43_pio_stop(struct b43_wldev *dev)
184{
185}
186static inline int b43_pio_tx(struct b43_wldev *dev,
187 struct sk_buff *skb)
188{
189 return 0;
190}
191static inline void b43_pio_handle_txstatus(struct b43_wldev *dev,
192 const struct b43_txstatus *status)
193{
194}
195static inline void b43_pio_get_tx_stats(struct b43_wldev *dev,
196 struct ieee80211_tx_queue_stats *stats)
197{
198}
199static inline void b43_pio_rx(struct b43_pio_rxqueue *q)
200{
201}
202static inline void b43_pio_tx_suspend(struct b43_wldev *dev)
203{
204}
205static inline void b43_pio_tx_resume(struct b43_wldev *dev)
206{
207}
208
209#endif /* CONFIG_B43_PIO */
210#endif /* B43_PIO_H_ */ 165#endif /* B43_PIO_H_ */
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c
index ffdce6f3c909..78016ae21c50 100644
--- a/drivers/net/wireless/b43/rfkill.c
+++ b/drivers/net/wireless/b43/rfkill.c
@@ -33,8 +33,14 @@ bool b43_is_hw_radio_enabled(struct b43_wldev *dev)
33 & B43_MMIO_RADIO_HWENABLED_HI_MASK)) 33 & B43_MMIO_RADIO_HWENABLED_HI_MASK))
34 return 1; 34 return 1;
35 } else { 35 } else {
36 if (b43_status(dev) >= B43_STAT_STARTED && 36 /* To prevent CPU fault on PPC, do not read a register
37 b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) 37 * unless the interface is started; however, on resume
38 * for hibernation, this routine is entered early. When
39 * that happens, unconditionally return TRUE.
40 */
41 if (b43_status(dev) < B43_STAT_STARTED)
42 return 1;
43 if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO)
38 & B43_MMIO_RADIO_HWENABLED_LO_MASK) 44 & B43_MMIO_RADIO_HWENABLED_LO_MASK)
39 return 1; 45 return 1;
40 } 46 }
diff --git a/drivers/net/wireless/b43/sdio.c b/drivers/net/wireless/b43/sdio.c
index 0d3ac64147a5..4e56b7bbcebd 100644
--- a/drivers/net/wireless/b43/sdio.c
+++ b/drivers/net/wireless/b43/sdio.c
@@ -16,6 +16,7 @@
16#include <linux/mmc/card.h> 16#include <linux/mmc/card.h>
17#include <linux/mmc/sdio_func.h> 17#include <linux/mmc/sdio_func.h>
18#include <linux/mmc/sdio_ids.h> 18#include <linux/mmc/sdio_ids.h>
19#include <linux/slab.h>
19#include <linux/ssb/ssb.h> 20#include <linux/ssb/ssb.h>
20 21
21#include "sdio.h" 22#include "sdio.h"
diff --git a/drivers/net/wireless/b43/tables_nphy.c b/drivers/net/wireless/b43/tables_nphy.c
index 4e2336315545..a00d509150f7 100644
--- a/drivers/net/wireless/b43/tables_nphy.c
+++ b/drivers/net/wireless/b43/tables_nphy.c
@@ -1336,7 +1336,7 @@ b43_nphy_get_chantabent(struct b43_wldev *dev, u8 channel)
1336} 1336}
1337 1337
1338 1338
1339const u8 b43_ntab_adjustpower0[] = { 1339static const u8 b43_ntab_adjustpower0[] = {
1340 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 1340 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01,
1341 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 1341 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03,
1342 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05, 1342 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05,
@@ -1355,7 +1355,7 @@ const u8 b43_ntab_adjustpower0[] = {
1355 0x1E, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x1F, 1355 0x1E, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x1F,
1356}; 1356};
1357 1357
1358const u8 b43_ntab_adjustpower1[] = { 1358static const u8 b43_ntab_adjustpower1[] = {
1359 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 1359 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, 0x01,
1360 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03, 1360 0x02, 0x02, 0x02, 0x02, 0x03, 0x03, 0x03, 0x03,
1361 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05, 1361 0x04, 0x04, 0x04, 0x04, 0x05, 0x05, 0x05, 0x05,
@@ -1374,11 +1374,11 @@ const u8 b43_ntab_adjustpower1[] = {
1374 0x1E, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x1F, 1374 0x1E, 0x1E, 0x1E, 0x1E, 0x1F, 0x1F, 0x1F, 0x1F,
1375}; 1375};
1376 1376
1377const u16 b43_ntab_bdi[] = { 1377static const u16 b43_ntab_bdi[] = {
1378 0x0070, 0x0126, 0x012C, 0x0246, 0x048D, 0x04D2, 1378 0x0070, 0x0126, 0x012C, 0x0246, 0x048D, 0x04D2,
1379}; 1379};
1380 1380
1381const u32 b43_ntab_channelest[] = { 1381static const u32 b43_ntab_channelest[] = {
1382 0x44444444, 0x44444444, 0x44444444, 0x44444444, 1382 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1383 0x44444444, 0x44444444, 0x44444444, 0x44444444, 1383 0x44444444, 0x44444444, 0x44444444, 0x44444444,
1384 0x10101010, 0x10101010, 0x10101010, 0x10101010, 1384 0x10101010, 0x10101010, 0x10101010, 0x10101010,
@@ -1405,7 +1405,7 @@ const u32 b43_ntab_channelest[] = {
1405 0x10101010, 0x10101010, 0x10101010, 0x10101010, 1405 0x10101010, 0x10101010, 0x10101010, 0x10101010,
1406}; 1406};
1407 1407
1408const u8 b43_ntab_estimatepowerlt0[] = { 1408static const u8 b43_ntab_estimatepowerlt0[] = {
1409 0x50, 0x4F, 0x4E, 0x4D, 0x4C, 0x4B, 0x4A, 0x49, 1409 0x50, 0x4F, 0x4E, 0x4D, 0x4C, 0x4B, 0x4A, 0x49,
1410 0x48, 0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41, 1410 0x48, 0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41,
1411 0x40, 0x3F, 0x3E, 0x3D, 0x3C, 0x3B, 0x3A, 0x39, 1411 0x40, 0x3F, 0x3E, 0x3D, 0x3C, 0x3B, 0x3A, 0x39,
@@ -1416,7 +1416,7 @@ const u8 b43_ntab_estimatepowerlt0[] = {
1416 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 1416 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11,
1417}; 1417};
1418 1418
1419const u8 b43_ntab_estimatepowerlt1[] = { 1419static const u8 b43_ntab_estimatepowerlt1[] = {
1420 0x50, 0x4F, 0x4E, 0x4D, 0x4C, 0x4B, 0x4A, 0x49, 1420 0x50, 0x4F, 0x4E, 0x4D, 0x4C, 0x4B, 0x4A, 0x49,
1421 0x48, 0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41, 1421 0x48, 0x47, 0x46, 0x45, 0x44, 0x43, 0x42, 0x41,
1422 0x40, 0x3F, 0x3E, 0x3D, 0x3C, 0x3B, 0x3A, 0x39, 1422 0x40, 0x3F, 0x3E, 0x3D, 0x3C, 0x3B, 0x3A, 0x39,
@@ -1427,14 +1427,14 @@ const u8 b43_ntab_estimatepowerlt1[] = {
1427 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 1427 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11,
1428}; 1428};
1429 1429
1430const u8 b43_ntab_framelookup[] = { 1430static const u8 b43_ntab_framelookup[] = {
1431 0x02, 0x04, 0x14, 0x14, 0x03, 0x05, 0x16, 0x16, 1431 0x02, 0x04, 0x14, 0x14, 0x03, 0x05, 0x16, 0x16,
1432 0x0A, 0x0C, 0x1C, 0x1C, 0x0B, 0x0D, 0x1E, 0x1E, 1432 0x0A, 0x0C, 0x1C, 0x1C, 0x0B, 0x0D, 0x1E, 0x1E,
1433 0x06, 0x08, 0x18, 0x18, 0x07, 0x09, 0x1A, 0x1A, 1433 0x06, 0x08, 0x18, 0x18, 0x07, 0x09, 0x1A, 0x1A,
1434 0x0E, 0x10, 0x20, 0x28, 0x0F, 0x11, 0x22, 0x2A, 1434 0x0E, 0x10, 0x20, 0x28, 0x0F, 0x11, 0x22, 0x2A,
1435}; 1435};
1436 1436
1437const u32 b43_ntab_framestruct[] = { 1437static const u32 b43_ntab_framestruct[] = {
1438 0x08004A04, 0x00100000, 0x01000A05, 0x00100020, 1438 0x08004A04, 0x00100000, 0x01000A05, 0x00100020,
1439 0x09804506, 0x00100030, 0x09804507, 0x00100030, 1439 0x09804506, 0x00100030, 0x09804507, 0x00100030,
1440 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1440 0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -1645,7 +1645,7 @@ const u32 b43_ntab_framestruct[] = {
1645 0x00000000, 0x00000000, 0x00000000, 0x00000000, 1645 0x00000000, 0x00000000, 0x00000000, 0x00000000,
1646}; 1646};
1647 1647
1648const u32 b43_ntab_gainctl0[] = { 1648static const u32 b43_ntab_gainctl0[] = {
1649 0x007F003F, 0x007E013F, 0x007D023E, 0x007C033E, 1649 0x007F003F, 0x007E013F, 0x007D023E, 0x007C033E,
1650 0x007B043D, 0x007A053D, 0x0079063C, 0x0078073C, 1650 0x007B043D, 0x007A053D, 0x0079063C, 0x0078073C,
1651 0x0077083B, 0x0076093B, 0x00750A3A, 0x00740B3A, 1651 0x0077083B, 0x0076093B, 0x00750A3A, 0x00740B3A,
@@ -1680,7 +1680,7 @@ const u32 b43_ntab_gainctl0[] = {
1680 0x00030C01, 0x00020D01, 0x00010E00, 0x00000F00, 1680 0x00030C01, 0x00020D01, 0x00010E00, 0x00000F00,
1681}; 1681};
1682 1682
1683const u32 b43_ntab_gainctl1[] = { 1683static const u32 b43_ntab_gainctl1[] = {
1684 0x007F003F, 0x007E013F, 0x007D023E, 0x007C033E, 1684 0x007F003F, 0x007E013F, 0x007D023E, 0x007C033E,
1685 0x007B043D, 0x007A053D, 0x0079063C, 0x0078073C, 1685 0x007B043D, 0x007A053D, 0x0079063C, 0x0078073C,
1686 0x0077083B, 0x0076093B, 0x00750A3A, 0x00740B3A, 1686 0x0077083B, 0x0076093B, 0x00750A3A, 0x00740B3A,
@@ -1715,12 +1715,12 @@ const u32 b43_ntab_gainctl1[] = {
1715 0x00030C01, 0x00020D01, 0x00010E00, 0x00000F00, 1715 0x00030C01, 0x00020D01, 0x00010E00, 0x00000F00,
1716}; 1716};
1717 1717
1718const u32 b43_ntab_intlevel[] = { 1718static const u32 b43_ntab_intlevel[] = {
1719 0x00802070, 0x0671188D, 0x0A60192C, 0x0A300E46, 1719 0x00802070, 0x0671188D, 0x0A60192C, 0x0A300E46,
1720 0x00C1188D, 0x080024D2, 0x00000070, 1720 0x00C1188D, 0x080024D2, 0x00000070,
1721}; 1721};
1722 1722
1723const u32 b43_ntab_iqlt0[] = { 1723static const u32 b43_ntab_iqlt0[] = {
1724 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1724 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
1725 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1725 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
1726 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1726 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
@@ -1755,7 +1755,7 @@ const u32 b43_ntab_iqlt0[] = {
1755 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1755 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
1756}; 1756};
1757 1757
1758const u32 b43_ntab_iqlt1[] = { 1758static const u32 b43_ntab_iqlt1[] = {
1759 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1759 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
1760 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1760 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
1761 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1761 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
@@ -1790,7 +1790,7 @@ const u32 b43_ntab_iqlt1[] = {
1790 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F, 1790 0x0000007F, 0x0000007F, 0x0000007F, 0x0000007F,
1791}; 1791};
1792 1792
1793const u16 b43_ntab_loftlt0[] = { 1793static const u16 b43_ntab_loftlt0[] = {
1794 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101, 1794 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101,
1795 0x0002, 0x0103, 0x0000, 0x0101, 0x0002, 0x0103, 1795 0x0002, 0x0103, 0x0000, 0x0101, 0x0002, 0x0103,
1796 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101, 1796 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101,
@@ -1815,7 +1815,7 @@ const u16 b43_ntab_loftlt0[] = {
1815 0x0002, 0x0103, 1815 0x0002, 0x0103,
1816}; 1816};
1817 1817
1818const u16 b43_ntab_loftlt1[] = { 1818static const u16 b43_ntab_loftlt1[] = {
1819 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101, 1819 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101,
1820 0x0002, 0x0103, 0x0000, 0x0101, 0x0002, 0x0103, 1820 0x0002, 0x0103, 0x0000, 0x0101, 0x0002, 0x0103,
1821 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101, 1821 0x0000, 0x0101, 0x0002, 0x0103, 0x0000, 0x0101,
@@ -1840,7 +1840,7 @@ const u16 b43_ntab_loftlt1[] = {
1840 0x0002, 0x0103, 1840 0x0002, 0x0103,
1841}; 1841};
1842 1842
1843const u8 b43_ntab_mcs[] = { 1843static const u8 b43_ntab_mcs[] = {
1844 0x00, 0x08, 0x0A, 0x10, 0x12, 0x19, 0x1A, 0x1C, 1844 0x00, 0x08, 0x0A, 0x10, 0x12, 0x19, 0x1A, 0x1C,
1845 0x40, 0x48, 0x4A, 0x50, 0x52, 0x59, 0x5A, 0x5C, 1845 0x40, 0x48, 0x4A, 0x50, 0x52, 0x59, 0x5A, 0x5C,
1846 0x80, 0x88, 0x8A, 0x90, 0x92, 0x99, 0x9A, 0x9C, 1846 0x80, 0x88, 0x8A, 0x90, 0x92, 0x99, 0x9A, 0x9C,
@@ -1859,7 +1859,7 @@ const u8 b43_ntab_mcs[] = {
1859 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 1859 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1860}; 1860};
1861 1861
1862const u32 b43_ntab_noisevar10[] = { 1862static const u32 b43_ntab_noisevar10[] = {
1863 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1863 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
1864 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1864 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
1865 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1865 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
@@ -1926,7 +1926,7 @@ const u32 b43_ntab_noisevar10[] = {
1926 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1926 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
1927}; 1927};
1928 1928
1929const u32 b43_ntab_noisevar11[] = { 1929static const u32 b43_ntab_noisevar11[] = {
1930 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1930 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
1931 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1931 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
1932 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1932 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
@@ -1993,7 +1993,7 @@ const u32 b43_ntab_noisevar11[] = {
1993 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D, 1993 0x020C020C, 0x0000014D, 0x020C020C, 0x0000014D,
1994}; 1994};
1995 1995
1996const u16 b43_ntab_pilot[] = { 1996static const u16 b43_ntab_pilot[] = {
1997 0xFF08, 0xFF08, 0xFF08, 0xFF08, 0xFF08, 0xFF08, 1997 0xFF08, 0xFF08, 0xFF08, 0xFF08, 0xFF08, 0xFF08,
1998 0xFF08, 0xFF08, 0x80D5, 0x80D5, 0x80D5, 0x80D5, 1998 0xFF08, 0xFF08, 0x80D5, 0x80D5, 0x80D5, 0x80D5,
1999 0x80D5, 0x80D5, 0x80D5, 0x80D5, 0xFF0A, 0xFF82, 1999 0x80D5, 0x80D5, 0x80D5, 0x80D5, 0xFF0A, 0xFF82,
@@ -2011,12 +2011,12 @@ const u16 b43_ntab_pilot[] = {
2011 0xF0A0, 0xF028, 0xFFFF, 0xFFFF, 2011 0xF0A0, 0xF028, 0xFFFF, 0xFFFF,
2012}; 2012};
2013 2013
2014const u32 b43_ntab_pilotlt[] = { 2014static const u32 b43_ntab_pilotlt[] = {
2015 0x76540123, 0x62407351, 0x76543201, 0x76540213, 2015 0x76540123, 0x62407351, 0x76543201, 0x76540213,
2016 0x76540123, 0x76430521, 2016 0x76540123, 0x76430521,
2017}; 2017};
2018 2018
2019const u32 b43_ntab_tdi20a0[] = { 2019static const u32 b43_ntab_tdi20a0[] = {
2020 0x00091226, 0x000A1429, 0x000B56AD, 0x000C58B0, 2020 0x00091226, 0x000A1429, 0x000B56AD, 0x000C58B0,
2021 0x000D5AB3, 0x000E9CB6, 0x000F9EBA, 0x0000C13D, 2021 0x000D5AB3, 0x000E9CB6, 0x000F9EBA, 0x0000C13D,
2022 0x00020301, 0x00030504, 0x00040708, 0x0005090B, 2022 0x00020301, 0x00030504, 0x00040708, 0x0005090B,
@@ -2033,7 +2033,7 @@ const u32 b43_ntab_tdi20a0[] = {
2033 0x00000000, 0x00000000, 0x00000000, 2033 0x00000000, 0x00000000, 0x00000000,
2034}; 2034};
2035 2035
2036const u32 b43_ntab_tdi20a1[] = { 2036static const u32 b43_ntab_tdi20a1[] = {
2037 0x00014B26, 0x00028D29, 0x000393AD, 0x00049630, 2037 0x00014B26, 0x00028D29, 0x000393AD, 0x00049630,
2038 0x0005D833, 0x0006DA36, 0x00099C3A, 0x000A9E3D, 2038 0x0005D833, 0x0006DA36, 0x00099C3A, 0x000A9E3D,
2039 0x000BC081, 0x000CC284, 0x000DC488, 0x000F068B, 2039 0x000BC081, 0x000CC284, 0x000DC488, 0x000F068B,
@@ -2050,7 +2050,7 @@ const u32 b43_ntab_tdi20a1[] = {
2050 0x00000000, 0x00000000, 0x00000000, 2050 0x00000000, 0x00000000, 0x00000000,
2051}; 2051};
2052 2052
2053const u32 b43_ntab_tdi40a0[] = { 2053static const u32 b43_ntab_tdi40a0[] = {
2054 0x0011A346, 0x00136CCF, 0x0014F5D9, 0x001641E2, 2054 0x0011A346, 0x00136CCF, 0x0014F5D9, 0x001641E2,
2055 0x0017CB6B, 0x00195475, 0x001B2383, 0x001CAD0C, 2055 0x0017CB6B, 0x00195475, 0x001B2383, 0x001CAD0C,
2056 0x001E7616, 0x0000821F, 0x00020BA8, 0x0003D4B2, 2056 0x001E7616, 0x0000821F, 0x00020BA8, 0x0003D4B2,
@@ -2081,7 +2081,7 @@ const u32 b43_ntab_tdi40a0[] = {
2081 0x00000000, 0x00000000, 2081 0x00000000, 0x00000000,
2082}; 2082};
2083 2083
2084const u32 b43_ntab_tdi40a1[] = { 2084static const u32 b43_ntab_tdi40a1[] = {
2085 0x001EDB36, 0x000129CA, 0x0002B353, 0x00047CDD, 2085 0x001EDB36, 0x000129CA, 0x0002B353, 0x00047CDD,
2086 0x0005C8E6, 0x000791EF, 0x00091BF9, 0x000AAA07, 2086 0x0005C8E6, 0x000791EF, 0x00091BF9, 0x000AAA07,
2087 0x000C3391, 0x000DFD1A, 0x00120923, 0x0013D22D, 2087 0x000C3391, 0x000DFD1A, 0x00120923, 0x0013D22D,
@@ -2112,7 +2112,7 @@ const u32 b43_ntab_tdi40a1[] = {
2112 0x00000000, 0x00000000, 2112 0x00000000, 0x00000000,
2113}; 2113};
2114 2114
2115const u32 b43_ntab_tdtrn[] = { 2115static const u32 b43_ntab_tdtrn[] = {
2116 0x061C061C, 0x0050EE68, 0xF592FE36, 0xFE5212F6, 2116 0x061C061C, 0x0050EE68, 0xF592FE36, 0xFE5212F6,
2117 0x00000C38, 0xFE5212F6, 0xF592FE36, 0x0050EE68, 2117 0x00000C38, 0xFE5212F6, 0xF592FE36, 0x0050EE68,
2118 0x061C061C, 0xEE680050, 0xFE36F592, 0x12F6FE52, 2118 0x061C061C, 0xEE680050, 0xFE36F592, 0x12F6FE52,
@@ -2291,7 +2291,7 @@ const u32 b43_ntab_tdtrn[] = {
2291 0xFA58FC00, 0x0B64FC7E, 0x0800F7B6, 0x00F006BE, 2291 0xFA58FC00, 0x0B64FC7E, 0x0800F7B6, 0x00F006BE,
2292}; 2292};
2293 2293
2294const u32 b43_ntab_tmap[] = { 2294static const u32 b43_ntab_tmap[] = {
2295 0x8A88AA80, 0x8AAAAA8A, 0x8A8A8AA8, 0x00000888, 2295 0x8A88AA80, 0x8AAAAA8A, 0x8A8A8AA8, 0x00000888,
2296 0x88000000, 0x8A8A88AA, 0x8AA88888, 0x8888A8A8, 2296 0x88000000, 0x8A8A88AA, 0x8AA88888, 0x8888A8A8,
2297 0xF1111110, 0x11111111, 0x11F11111, 0x00000111, 2297 0xF1111110, 0x11111111, 0x11F11111, 0x00000111,
@@ -2406,6 +2406,544 @@ const u32 b43_ntab_tmap[] = {
2406 0x00000000, 0x00000000, 0x00000000, 0x00000000, 2406 0x00000000, 0x00000000, 0x00000000, 0x00000000,
2407}; 2407};
2408 2408
2409const u32 b43_ntab_tx_gain_rev0_1_2[] = {
2410 0x03cc2b44, 0x03cc2b42, 0x03cc2a44, 0x03cc2a42,
2411 0x03cc2944, 0x03c82b44, 0x03c82b42, 0x03c82a44,
2412 0x03c82a42, 0x03c82944, 0x03c82942, 0x03c82844,
2413 0x03c82842, 0x03c42b44, 0x03c42b42, 0x03c42a44,
2414 0x03c42a42, 0x03c42944, 0x03c42942, 0x03c42844,
2415 0x03c42842, 0x03c42744, 0x03c42742, 0x03c42644,
2416 0x03c42642, 0x03c42544, 0x03c42542, 0x03c42444,
2417 0x03c42442, 0x03c02b44, 0x03c02b42, 0x03c02a44,
2418 0x03c02a42, 0x03c02944, 0x03c02942, 0x03c02844,
2419 0x03c02842, 0x03c02744, 0x03c02742, 0x03b02b44,
2420 0x03b02b42, 0x03b02a44, 0x03b02a42, 0x03b02944,
2421 0x03b02942, 0x03b02844, 0x03b02842, 0x03b02744,
2422 0x03b02742, 0x03b02644, 0x03b02642, 0x03b02544,
2423 0x03b02542, 0x03a02b44, 0x03a02b42, 0x03a02a44,
2424 0x03a02a42, 0x03a02944, 0x03a02942, 0x03a02844,
2425 0x03a02842, 0x03a02744, 0x03a02742, 0x03902b44,
2426 0x03902b42, 0x03902a44, 0x03902a42, 0x03902944,
2427 0x03902942, 0x03902844, 0x03902842, 0x03902744,
2428 0x03902742, 0x03902644, 0x03902642, 0x03902544,
2429 0x03902542, 0x03802b44, 0x03802b42, 0x03802a44,
2430 0x03802a42, 0x03802944, 0x03802942, 0x03802844,
2431 0x03802842, 0x03802744, 0x03802742, 0x03802644,
2432 0x03802642, 0x03802544, 0x03802542, 0x03802444,
2433 0x03802442, 0x03802344, 0x03802342, 0x03802244,
2434 0x03802242, 0x03802144, 0x03802142, 0x03802044,
2435 0x03802042, 0x03801f44, 0x03801f42, 0x03801e44,
2436 0x03801e42, 0x03801d44, 0x03801d42, 0x03801c44,
2437 0x03801c42, 0x03801b44, 0x03801b42, 0x03801a44,
2438 0x03801a42, 0x03801944, 0x03801942, 0x03801844,
2439 0x03801842, 0x03801744, 0x03801742, 0x03801644,
2440 0x03801642, 0x03801544, 0x03801542, 0x03801444,
2441 0x03801442, 0x03801344, 0x03801342, 0x00002b00,
2442};
2443
2444const u32 b43_ntab_tx_gain_rev3plus_2ghz[] = {
2445 0x1f410044, 0x1f410042, 0x1f410040, 0x1f41003e,
2446 0x1f41003c, 0x1f41003b, 0x1f410039, 0x1f410037,
2447 0x1e410044, 0x1e410042, 0x1e410040, 0x1e41003e,
2448 0x1e41003c, 0x1e41003b, 0x1e410039, 0x1e410037,
2449 0x1d410044, 0x1d410042, 0x1d410040, 0x1d41003e,
2450 0x1d41003c, 0x1d41003b, 0x1d410039, 0x1d410037,
2451 0x1c410044, 0x1c410042, 0x1c410040, 0x1c41003e,
2452 0x1c41003c, 0x1c41003b, 0x1c410039, 0x1c410037,
2453 0x1b410044, 0x1b410042, 0x1b410040, 0x1b41003e,
2454 0x1b41003c, 0x1b41003b, 0x1b410039, 0x1b410037,
2455 0x1a410044, 0x1a410042, 0x1a410040, 0x1a41003e,
2456 0x1a41003c, 0x1a41003b, 0x1a410039, 0x1a410037,
2457 0x19410044, 0x19410042, 0x19410040, 0x1941003e,
2458 0x1941003c, 0x1941003b, 0x19410039, 0x19410037,
2459 0x18410044, 0x18410042, 0x18410040, 0x1841003e,
2460 0x1841003c, 0x1841003b, 0x18410039, 0x18410037,
2461 0x17410044, 0x17410042, 0x17410040, 0x1741003e,
2462 0x1741003c, 0x1741003b, 0x17410039, 0x17410037,
2463 0x16410044, 0x16410042, 0x16410040, 0x1641003e,
2464 0x1641003c, 0x1641003b, 0x16410039, 0x16410037,
2465 0x15410044, 0x15410042, 0x15410040, 0x1541003e,
2466 0x1541003c, 0x1541003b, 0x15410039, 0x15410037,
2467 0x14410044, 0x14410042, 0x14410040, 0x1441003e,
2468 0x1441003c, 0x1441003b, 0x14410039, 0x14410037,
2469 0x13410044, 0x13410042, 0x13410040, 0x1341003e,
2470 0x1341003c, 0x1341003b, 0x13410039, 0x13410037,
2471 0x12410044, 0x12410042, 0x12410040, 0x1241003e,
2472 0x1241003c, 0x1241003b, 0x12410039, 0x12410037,
2473 0x11410044, 0x11410042, 0x11410040, 0x1141003e,
2474 0x1141003c, 0x1141003b, 0x11410039, 0x11410037,
2475 0x10410044, 0x10410042, 0x10410040, 0x1041003e,
2476 0x1041003c, 0x1041003b, 0x10410039, 0x10410037,
2477};
2478
2479const u32 b43_ntab_tx_gain_rev3_5ghz[] = {
2480 0xcff70044, 0xcff70042, 0xcff70040, 0xcff7003e,
2481 0xcff7003c, 0xcff7003b, 0xcff70039, 0xcff70037,
2482 0xcef70044, 0xcef70042, 0xcef70040, 0xcef7003e,
2483 0xcef7003c, 0xcef7003b, 0xcef70039, 0xcef70037,
2484 0xcdf70044, 0xcdf70042, 0xcdf70040, 0xcdf7003e,
2485 0xcdf7003c, 0xcdf7003b, 0xcdf70039, 0xcdf70037,
2486 0xccf70044, 0xccf70042, 0xccf70040, 0xccf7003e,
2487 0xccf7003c, 0xccf7003b, 0xccf70039, 0xccf70037,
2488 0xcbf70044, 0xcbf70042, 0xcbf70040, 0xcbf7003e,
2489 0xcbf7003c, 0xcbf7003b, 0xcbf70039, 0xcbf70037,
2490 0xcaf70044, 0xcaf70042, 0xcaf70040, 0xcaf7003e,
2491 0xcaf7003c, 0xcaf7003b, 0xcaf70039, 0xcaf70037,
2492 0xc9f70044, 0xc9f70042, 0xc9f70040, 0xc9f7003e,
2493 0xc9f7003c, 0xc9f7003b, 0xc9f70039, 0xc9f70037,
2494 0xc8f70044, 0xc8f70042, 0xc8f70040, 0xc8f7003e,
2495 0xc8f7003c, 0xc8f7003b, 0xc8f70039, 0xc8f70037,
2496 0xc7f70044, 0xc7f70042, 0xc7f70040, 0xc7f7003e,
2497 0xc7f7003c, 0xc7f7003b, 0xc7f70039, 0xc7f70037,
2498 0xc6f70044, 0xc6f70042, 0xc6f70040, 0xc6f7003e,
2499 0xc6f7003c, 0xc6f7003b, 0xc6f70039, 0xc6f70037,
2500 0xc5f70044, 0xc5f70042, 0xc5f70040, 0xc5f7003e,
2501 0xc5f7003c, 0xc5f7003b, 0xc5f70039, 0xc5f70037,
2502 0xc4f70044, 0xc4f70042, 0xc4f70040, 0xc4f7003e,
2503 0xc4f7003c, 0xc4f7003b, 0xc4f70039, 0xc4f70037,
2504 0xc3f70044, 0xc3f70042, 0xc3f70040, 0xc3f7003e,
2505 0xc3f7003c, 0xc3f7003b, 0xc3f70039, 0xc3f70037,
2506 0xc2f70044, 0xc2f70042, 0xc2f70040, 0xc2f7003e,
2507 0xc2f7003c, 0xc2f7003b, 0xc2f70039, 0xc2f70037,
2508 0xc1f70044, 0xc1f70042, 0xc1f70040, 0xc1f7003e,
2509 0xc1f7003c, 0xc1f7003b, 0xc1f70039, 0xc1f70037,
2510 0xc0f70044, 0xc0f70042, 0xc0f70040, 0xc0f7003e,
2511 0xc0f7003c, 0xc0f7003b, 0xc0f70039, 0xc0f70037,
2512};
2513
2514const u32 b43_ntab_tx_gain_rev4_5ghz[] = {
2515 0x2ff20044, 0x2ff20042, 0x2ff20040, 0x2ff2003e,
2516 0x2ff2003c, 0x2ff2003b, 0x2ff20039, 0x2ff20037,
2517 0x2ef20044, 0x2ef20042, 0x2ef20040, 0x2ef2003e,
2518 0x2ef2003c, 0x2ef2003b, 0x2ef20039, 0x2ef20037,
2519 0x2df20044, 0x2df20042, 0x2df20040, 0x2df2003e,
2520 0x2df2003c, 0x2df2003b, 0x2df20039, 0x2df20037,
2521 0x2cf20044, 0x2cf20042, 0x2cf20040, 0x2cf2003e,
2522 0x2cf2003c, 0x2cf2003b, 0x2cf20039, 0x2cf20037,
2523 0x2bf20044, 0x2bf20042, 0x2bf20040, 0x2bf2003e,
2524 0x2bf2003c, 0x2bf2003b, 0x2bf20039, 0x2bf20037,
2525 0x2af20044, 0x2af20042, 0x2af20040, 0x2af2003e,
2526 0x2af2003c, 0x2af2003b, 0x2af20039, 0x2af20037,
2527 0x29f20044, 0x29f20042, 0x29f20040, 0x29f2003e,
2528 0x29f2003c, 0x29f2003b, 0x29f20039, 0x29f20037,
2529 0x28f20044, 0x28f20042, 0x28f20040, 0x28f2003e,
2530 0x28f2003c, 0x28f2003b, 0x28f20039, 0x28f20037,
2531 0x27f20044, 0x27f20042, 0x27f20040, 0x27f2003e,
2532 0x27f2003c, 0x27f2003b, 0x27f20039, 0x27f20037,
2533 0x26f20044, 0x26f20042, 0x26f20040, 0x26f2003e,
2534 0x26f2003c, 0x26f2003b, 0x26f20039, 0x26f20037,
2535 0x25f20044, 0x25f20042, 0x25f20040, 0x25f2003e,
2536 0x25f2003c, 0x25f2003b, 0x25f20039, 0x25f20037,
2537 0x24f20044, 0x24f20042, 0x24f20040, 0x24f2003e,
2538 0x24f2003c, 0x24f2003b, 0x24f20039, 0x24f20038,
2539 0x23f20041, 0x23f20040, 0x23f2003f, 0x23f2003e,
2540 0x23f2003c, 0x23f2003b, 0x23f20039, 0x23f20037,
2541 0x22f20044, 0x22f20042, 0x22f20040, 0x22f2003e,
2542 0x22f2003c, 0x22f2003b, 0x22f20039, 0x22f20037,
2543 0x21f20044, 0x21f20042, 0x21f20040, 0x21f2003e,
2544 0x21f2003c, 0x21f2003b, 0x21f20039, 0x21f20037,
2545 0x20d20043, 0x20d20041, 0x20d2003e, 0x20d2003c,
2546 0x20d2003a, 0x20d20038, 0x20d20036, 0x20d20034,
2547};
2548
2549const u32 b43_ntab_tx_gain_rev5plus_5ghz[] = {
2550 0x0f62004a, 0x0f620048, 0x0f620046, 0x0f620044,
2551 0x0f620042, 0x0f620040, 0x0f62003e, 0x0f62003c,
2552 0x0e620044, 0x0e620042, 0x0e620040, 0x0e62003e,
2553 0x0e62003c, 0x0e62003d, 0x0e62003b, 0x0e62003a,
2554 0x0d620043, 0x0d620041, 0x0d620040, 0x0d62003e,
2555 0x0d62003d, 0x0d62003c, 0x0d62003b, 0x0d62003a,
2556 0x0c620041, 0x0c620040, 0x0c62003f, 0x0c62003e,
2557 0x0c62003c, 0x0c62003b, 0x0c620039, 0x0c620037,
2558 0x0b620046, 0x0b620044, 0x0b620042, 0x0b620040,
2559 0x0b62003e, 0x0b62003c, 0x0b62003b, 0x0b62003a,
2560 0x0a620041, 0x0a620040, 0x0a62003e, 0x0a62003c,
2561 0x0a62003b, 0x0a62003a, 0x0a620039, 0x0a620038,
2562 0x0962003e, 0x0962003d, 0x0962003c, 0x0962003b,
2563 0x09620039, 0x09620037, 0x09620035, 0x09620033,
2564 0x08620044, 0x08620042, 0x08620040, 0x0862003e,
2565 0x0862003c, 0x0862003b, 0x0862003a, 0x08620039,
2566 0x07620043, 0x07620042, 0x07620040, 0x0762003f,
2567 0x0762003d, 0x0762003b, 0x0762003a, 0x07620039,
2568 0x0662003e, 0x0662003d, 0x0662003c, 0x0662003b,
2569 0x06620039, 0x06620037, 0x06620035, 0x06620033,
2570 0x05620046, 0x05620044, 0x05620042, 0x05620040,
2571 0x0562003e, 0x0562003c, 0x0562003b, 0x05620039,
2572 0x04620044, 0x04620042, 0x04620040, 0x0462003e,
2573 0x0462003c, 0x0462003b, 0x04620039, 0x04620038,
2574 0x0362003c, 0x0362003b, 0x0362003a, 0x03620039,
2575 0x03620038, 0x03620037, 0x03620035, 0x03620033,
2576 0x0262004c, 0x0262004a, 0x02620048, 0x02620047,
2577 0x02620046, 0x02620044, 0x02620043, 0x02620042,
2578 0x0162004a, 0x01620048, 0x01620046, 0x01620044,
2579 0x01620043, 0x01620042, 0x01620041, 0x01620040,
2580 0x00620042, 0x00620040, 0x0062003e, 0x0062003c,
2581 0x0062003b, 0x00620039, 0x00620037, 0x00620035,
2582};
2583
2584const u32 txpwrctrl_tx_gain_ipa[] = {
2585 0x5ff7002d, 0x5ff7002b, 0x5ff7002a, 0x5ff70029,
2586 0x5ff70028, 0x5ff70027, 0x5ff70026, 0x5ff70025,
2587 0x5ef7002d, 0x5ef7002b, 0x5ef7002a, 0x5ef70029,
2588 0x5ef70028, 0x5ef70027, 0x5ef70026, 0x5ef70025,
2589 0x5df7002d, 0x5df7002b, 0x5df7002a, 0x5df70029,
2590 0x5df70028, 0x5df70027, 0x5df70026, 0x5df70025,
2591 0x5cf7002d, 0x5cf7002b, 0x5cf7002a, 0x5cf70029,
2592 0x5cf70028, 0x5cf70027, 0x5cf70026, 0x5cf70025,
2593 0x5bf7002d, 0x5bf7002b, 0x5bf7002a, 0x5bf70029,
2594 0x5bf70028, 0x5bf70027, 0x5bf70026, 0x5bf70025,
2595 0x5af7002d, 0x5af7002b, 0x5af7002a, 0x5af70029,
2596 0x5af70028, 0x5af70027, 0x5af70026, 0x5af70025,
2597 0x59f7002d, 0x59f7002b, 0x59f7002a, 0x59f70029,
2598 0x59f70028, 0x59f70027, 0x59f70026, 0x59f70025,
2599 0x58f7002d, 0x58f7002b, 0x58f7002a, 0x58f70029,
2600 0x58f70028, 0x58f70027, 0x58f70026, 0x58f70025,
2601 0x57f7002d, 0x57f7002b, 0x57f7002a, 0x57f70029,
2602 0x57f70028, 0x57f70027, 0x57f70026, 0x57f70025,
2603 0x56f7002d, 0x56f7002b, 0x56f7002a, 0x56f70029,
2604 0x56f70028, 0x56f70027, 0x56f70026, 0x56f70025,
2605 0x55f7002d, 0x55f7002b, 0x55f7002a, 0x55f70029,
2606 0x55f70028, 0x55f70027, 0x55f70026, 0x55f70025,
2607 0x54f7002d, 0x54f7002b, 0x54f7002a, 0x54f70029,
2608 0x54f70028, 0x54f70027, 0x54f70026, 0x54f70025,
2609 0x53f7002d, 0x53f7002b, 0x53f7002a, 0x53f70029,
2610 0x53f70028, 0x53f70027, 0x53f70026, 0x53f70025,
2611 0x52f7002d, 0x52f7002b, 0x52f7002a, 0x52f70029,
2612 0x52f70028, 0x52f70027, 0x52f70026, 0x52f70025,
2613 0x51f7002d, 0x51f7002b, 0x51f7002a, 0x51f70029,
2614 0x51f70028, 0x51f70027, 0x51f70026, 0x51f70025,
2615 0x50f7002d, 0x50f7002b, 0x50f7002a, 0x50f70029,
2616 0x50f70028, 0x50f70027, 0x50f70026, 0x50f70025,
2617};
2618
2619const u32 txpwrctrl_tx_gain_ipa_rev5[] = {
2620 0x1ff7002d, 0x1ff7002b, 0x1ff7002a, 0x1ff70029,
2621 0x1ff70028, 0x1ff70027, 0x1ff70026, 0x1ff70025,
2622 0x1ef7002d, 0x1ef7002b, 0x1ef7002a, 0x1ef70029,
2623 0x1ef70028, 0x1ef70027, 0x1ef70026, 0x1ef70025,
2624 0x1df7002d, 0x1df7002b, 0x1df7002a, 0x1df70029,
2625 0x1df70028, 0x1df70027, 0x1df70026, 0x1df70025,
2626 0x1cf7002d, 0x1cf7002b, 0x1cf7002a, 0x1cf70029,
2627 0x1cf70028, 0x1cf70027, 0x1cf70026, 0x1cf70025,
2628 0x1bf7002d, 0x1bf7002b, 0x1bf7002a, 0x1bf70029,
2629 0x1bf70028, 0x1bf70027, 0x1bf70026, 0x1bf70025,
2630 0x1af7002d, 0x1af7002b, 0x1af7002a, 0x1af70029,
2631 0x1af70028, 0x1af70027, 0x1af70026, 0x1af70025,
2632 0x19f7002d, 0x19f7002b, 0x19f7002a, 0x19f70029,
2633 0x19f70028, 0x19f70027, 0x19f70026, 0x19f70025,
2634 0x18f7002d, 0x18f7002b, 0x18f7002a, 0x18f70029,
2635 0x18f70028, 0x18f70027, 0x18f70026, 0x18f70025,
2636 0x17f7002d, 0x17f7002b, 0x17f7002a, 0x17f70029,
2637 0x17f70028, 0x17f70027, 0x17f70026, 0x17f70025,
2638 0x16f7002d, 0x16f7002b, 0x16f7002a, 0x16f70029,
2639 0x16f70028, 0x16f70027, 0x16f70026, 0x16f70025,
2640 0x15f7002d, 0x15f7002b, 0x15f7002a, 0x15f70029,
2641 0x15f70028, 0x15f70027, 0x15f70026, 0x15f70025,
2642 0x14f7002d, 0x14f7002b, 0x14f7002a, 0x14f70029,
2643 0x14f70028, 0x14f70027, 0x14f70026, 0x14f70025,
2644 0x13f7002d, 0x13f7002b, 0x13f7002a, 0x13f70029,
2645 0x13f70028, 0x13f70027, 0x13f70026, 0x13f70025,
2646 0x12f7002d, 0x12f7002b, 0x12f7002a, 0x12f70029,
2647 0x12f70028, 0x12f70027, 0x12f70026, 0x12f70025,
2648 0x11f7002d, 0x11f7002b, 0x11f7002a, 0x11f70029,
2649 0x11f70028, 0x11f70027, 0x11f70026, 0x11f70025,
2650 0x10f7002d, 0x10f7002b, 0x10f7002a, 0x10f70029,
2651 0x10f70028, 0x10f70027, 0x10f70026, 0x10f70025,
2652};
2653
2654const u32 txpwrctrl_tx_gain_ipa_rev6[] = {
2655 0x0ff7002d, 0x0ff7002b, 0x0ff7002a, 0x0ff70029,
2656 0x0ff70028, 0x0ff70027, 0x0ff70026, 0x0ff70025,
2657 0x0ef7002d, 0x0ef7002b, 0x0ef7002a, 0x0ef70029,
2658 0x0ef70028, 0x0ef70027, 0x0ef70026, 0x0ef70025,
2659 0x0df7002d, 0x0df7002b, 0x0df7002a, 0x0df70029,
2660 0x0df70028, 0x0df70027, 0x0df70026, 0x0df70025,
2661 0x0cf7002d, 0x0cf7002b, 0x0cf7002a, 0x0cf70029,
2662 0x0cf70028, 0x0cf70027, 0x0cf70026, 0x0cf70025,
2663 0x0bf7002d, 0x0bf7002b, 0x0bf7002a, 0x0bf70029,
2664 0x0bf70028, 0x0bf70027, 0x0bf70026, 0x0bf70025,
2665 0x0af7002d, 0x0af7002b, 0x0af7002a, 0x0af70029,
2666 0x0af70028, 0x0af70027, 0x0af70026, 0x0af70025,
2667 0x09f7002d, 0x09f7002b, 0x09f7002a, 0x09f70029,
2668 0x09f70028, 0x09f70027, 0x09f70026, 0x09f70025,
2669 0x08f7002d, 0x08f7002b, 0x08f7002a, 0x08f70029,
2670 0x08f70028, 0x08f70027, 0x08f70026, 0x08f70025,
2671 0x07f7002d, 0x07f7002b, 0x07f7002a, 0x07f70029,
2672 0x07f70028, 0x07f70027, 0x07f70026, 0x07f70025,
2673 0x06f7002d, 0x06f7002b, 0x06f7002a, 0x06f70029,
2674 0x06f70028, 0x06f70027, 0x06f70026, 0x06f70025,
2675 0x05f7002d, 0x05f7002b, 0x05f7002a, 0x05f70029,
2676 0x05f70028, 0x05f70027, 0x05f70026, 0x05f70025,
2677 0x04f7002d, 0x04f7002b, 0x04f7002a, 0x04f70029,
2678 0x04f70028, 0x04f70027, 0x04f70026, 0x04f70025,
2679 0x03f7002d, 0x03f7002b, 0x03f7002a, 0x03f70029,
2680 0x03f70028, 0x03f70027, 0x03f70026, 0x03f70025,
2681 0x02f7002d, 0x02f7002b, 0x02f7002a, 0x02f70029,
2682 0x02f70028, 0x02f70027, 0x02f70026, 0x02f70025,
2683 0x01f7002d, 0x01f7002b, 0x01f7002a, 0x01f70029,
2684 0x01f70028, 0x01f70027, 0x01f70026, 0x01f70025,
2685 0x00f7002d, 0x00f7002b, 0x00f7002a, 0x00f70029,
2686 0x00f70028, 0x00f70027, 0x00f70026, 0x00f70025,
2687};
2688
2689const u32 txpwrctrl_tx_gain_ipa_5g[] = {
2690 0x7ff70035, 0x7ff70033, 0x7ff70032, 0x7ff70031,
2691 0x7ff7002f, 0x7ff7002e, 0x7ff7002d, 0x7ff7002b,
2692 0x7ff7002a, 0x7ff70029, 0x7ff70028, 0x7ff70027,
2693 0x7ff70026, 0x7ff70024, 0x7ff70023, 0x7ff70022,
2694 0x7ef70028, 0x7ef70027, 0x7ef70026, 0x7ef70025,
2695 0x7ef70024, 0x7ef70023, 0x7df70028, 0x7df70027,
2696 0x7df70026, 0x7df70025, 0x7df70024, 0x7df70023,
2697 0x7df70022, 0x7cf70029, 0x7cf70028, 0x7cf70027,
2698 0x7cf70026, 0x7cf70025, 0x7cf70023, 0x7cf70022,
2699 0x7bf70029, 0x7bf70028, 0x7bf70026, 0x7bf70025,
2700 0x7bf70024, 0x7bf70023, 0x7bf70022, 0x7bf70021,
2701 0x7af70029, 0x7af70028, 0x7af70027, 0x7af70026,
2702 0x7af70025, 0x7af70024, 0x7af70023, 0x7af70022,
2703 0x79f70029, 0x79f70028, 0x79f70027, 0x79f70026,
2704 0x79f70025, 0x79f70024, 0x79f70023, 0x79f70022,
2705 0x78f70029, 0x78f70028, 0x78f70027, 0x78f70026,
2706 0x78f70025, 0x78f70024, 0x78f70023, 0x78f70022,
2707 0x77f70029, 0x77f70028, 0x77f70027, 0x77f70026,
2708 0x77f70025, 0x77f70024, 0x77f70023, 0x77f70022,
2709 0x76f70029, 0x76f70028, 0x76f70027, 0x76f70026,
2710 0x76f70024, 0x76f70023, 0x76f70022, 0x76f70021,
2711 0x75f70029, 0x75f70028, 0x75f70027, 0x75f70026,
2712 0x75f70025, 0x75f70024, 0x75f70023, 0x74f70029,
2713 0x74f70028, 0x74f70026, 0x74f70025, 0x74f70024,
2714 0x74f70023, 0x74f70022, 0x73f70029, 0x73f70027,
2715 0x73f70026, 0x73f70025, 0x73f70024, 0x73f70023,
2716 0x73f70022, 0x72f70028, 0x72f70027, 0x72f70026,
2717 0x72f70025, 0x72f70024, 0x72f70023, 0x72f70022,
2718 0x71f70028, 0x71f70027, 0x71f70026, 0x71f70025,
2719 0x71f70024, 0x71f70023, 0x70f70028, 0x70f70027,
2720 0x70f70026, 0x70f70024, 0x70f70023, 0x70f70022,
2721 0x70f70021, 0x70f70020, 0x70f70020, 0x70f7001f,
2722};
2723
2724const u16 tbl_iqcal_gainparams[2][9][8] = {
2725 {
2726 { 0x000, 0, 0, 2, 0x69, 0x69, 0x69, 0x69 },
2727 { 0x700, 7, 0, 0, 0x69, 0x69, 0x69, 0x69 },
2728 { 0x710, 7, 1, 0, 0x68, 0x68, 0x68, 0x68 },
2729 { 0x720, 7, 2, 0, 0x67, 0x67, 0x67, 0x67 },
2730 { 0x730, 7, 3, 0, 0x66, 0x66, 0x66, 0x66 },
2731 { 0x740, 7, 4, 0, 0x65, 0x65, 0x65, 0x65 },
2732 { 0x741, 7, 4, 1, 0x65, 0x65, 0x65, 0x65 },
2733 { 0x742, 7, 4, 2, 0x65, 0x65, 0x65, 0x65 },
2734 { 0x743, 7, 4, 3, 0x65, 0x65, 0x65, 0x65 }
2735 },
2736 {
2737 { 0x000, 7, 0, 0, 0x79, 0x79, 0x79, 0x79 },
2738 { 0x700, 7, 0, 0, 0x79, 0x79, 0x79, 0x79 },
2739 { 0x710, 7, 1, 0, 0x79, 0x79, 0x79, 0x79 },
2740 { 0x720, 7, 2, 0, 0x78, 0x78, 0x78, 0x78 },
2741 { 0x730, 7, 3, 0, 0x78, 0x78, 0x78, 0x78 },
2742 { 0x740, 7, 4, 0, 0x78, 0x78, 0x78, 0x78 },
2743 { 0x741, 7, 4, 1, 0x78, 0x78, 0x78, 0x78 },
2744 { 0x742, 7, 4, 2, 0x78, 0x78, 0x78, 0x78 },
2745 { 0x743, 7, 4, 3, 0x78, 0x78, 0x78, 0x78 }
2746 }
2747};
2748
2749const struct nphy_txiqcal_ladder ladder_lo[] = {
2750 { 3, 0 },
2751 { 4, 0 },
2752 { 6, 0 },
2753 { 9, 0 },
2754 { 13, 0 },
2755 { 18, 0 },
2756 { 25, 0 },
2757 { 25, 1 },
2758 { 25, 2 },
2759 { 25, 3 },
2760 { 25, 4 },
2761 { 25, 5 },
2762 { 25, 6 },
2763 { 25, 7 },
2764 { 35, 7 },
2765 { 50, 7 },
2766 { 71, 7 },
2767 { 100, 7 }
2768};
2769
2770const struct nphy_txiqcal_ladder ladder_iq[] = {
2771 { 3, 0 },
2772 { 4, 0 },
2773 { 6, 0 },
2774 { 9, 0 },
2775 { 13, 0 },
2776 { 18, 0 },
2777 { 25, 0 },
2778 { 35, 0 },
2779 { 50, 0 },
2780 { 71, 0 },
2781 { 100, 0 },
2782 { 100, 1 },
2783 { 100, 2 },
2784 { 100, 3 },
2785 { 100, 4 },
2786 { 100, 5 },
2787 { 100, 6 },
2788 { 100, 7 }
2789};
2790
2791const u16 loscale[] = {
2792 256, 256, 271, 271,
2793 287, 256, 256, 271,
2794 271, 287, 287, 304,
2795 304, 256, 256, 271,
2796 271, 287, 287, 304,
2797 304, 322, 322, 341,
2798 341, 362, 362, 383,
2799 383, 256, 256, 271,
2800 271, 287, 287, 304,
2801 304, 322, 322, 256,
2802 256, 271, 271, 287,
2803 287, 304, 304, 322,
2804 322, 341, 341, 362,
2805 362, 256, 256, 271,
2806 271, 287, 287, 304,
2807 304, 322, 322, 256,
2808 256, 271, 271, 287,
2809 287, 304, 304, 322,
2810 322, 341, 341, 362,
2811 362, 256, 256, 271,
2812 271, 287, 287, 304,
2813 304, 322, 322, 341,
2814 341, 362, 362, 383,
2815 383, 406, 406, 430,
2816 430, 455, 455, 482,
2817 482, 511, 511, 541,
2818 541, 573, 573, 607,
2819 607, 643, 643, 681,
2820 681, 722, 722, 764,
2821 764, 810, 810, 858,
2822 858, 908, 908, 962,
2823 962, 1019, 1019, 256
2824};
2825
2826const u16 tbl_tx_iqlo_cal_loft_ladder_40[] = {
2827 0x0200, 0x0300, 0x0400, 0x0700,
2828 0x0900, 0x0c00, 0x1200, 0x1201,
2829 0x1202, 0x1203, 0x1204, 0x1205,
2830 0x1206, 0x1207, 0x1907, 0x2307,
2831 0x3207, 0x4707
2832};
2833
2834const u16 tbl_tx_iqlo_cal_loft_ladder_20[] = {
2835 0x0300, 0x0500, 0x0700, 0x0900,
2836 0x0d00, 0x1100, 0x1900, 0x1901,
2837 0x1902, 0x1903, 0x1904, 0x1905,
2838 0x1906, 0x1907, 0x2407, 0x3207,
2839 0x4607, 0x6407
2840};
2841
2842const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[] = {
2843 0x0100, 0x0200, 0x0400, 0x0700,
2844 0x0900, 0x0c00, 0x1200, 0x1900,
2845 0x2300, 0x3200, 0x4700, 0x4701,
2846 0x4702, 0x4703, 0x4704, 0x4705,
2847 0x4706, 0x4707
2848};
2849
2850const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[] = {
2851 0x0200, 0x0300, 0x0600, 0x0900,
2852 0x0d00, 0x1100, 0x1900, 0x2400,
2853 0x3200, 0x4600, 0x6400, 0x6401,
2854 0x6402, 0x6403, 0x6404, 0x6405,
2855 0x6406, 0x6407
2856};
2857
2858const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3] = { };
2859
2860const u16 tbl_tx_iqlo_cal_startcoefs[B43_NTAB_TX_IQLO_CAL_STARTCOEFS] = { };
2861
2862const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[] = {
2863 0x8423, 0x8323, 0x8073, 0x8256,
2864 0x8045, 0x8223, 0x9423, 0x9323,
2865 0x9073, 0x9256, 0x9045, 0x9223
2866};
2867
2868const u16 tbl_tx_iqlo_cal_cmds_recal[] = {
2869 0x8101, 0x8253, 0x8053, 0x8234,
2870 0x8034, 0x9101, 0x9253, 0x9053,
2871 0x9234, 0x9034
2872};
2873
2874const u16 tbl_tx_iqlo_cal_cmds_fullcal[] = {
2875 0x8123, 0x8264, 0x8086, 0x8245,
2876 0x8056, 0x9123, 0x9264, 0x9086,
2877 0x9245, 0x9056
2878};
2879
2880const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[] = {
2881 0x8434, 0x8334, 0x8084, 0x8267,
2882 0x8056, 0x8234, 0x9434, 0x9334,
2883 0x9084, 0x9267, 0x9056, 0x9234
2884};
2885
2886const s16 tbl_tx_filter_coef_rev4[7][15] = {
2887 { -377, 137, -407, 208, -1527,
2888 956, 93, 186, 93, 230,
2889 -44, 230, 20, -191, 201 },
2890 { -77, 20, -98, 49, -93,
2891 60, 56, 111, 56, 26,
2892 -5, 26, 34, -32, 34 },
2893 { -360, 164, -376, 164, -1533,
2894 576, 308, -314, 308, 121,
2895 -73, 121, 91, 124, 91 },
2896 { -295, 200, -363, 142, -1391,
2897 826, 151, 301, 151, 151,
2898 301, 151, 602, -752, 602 },
2899 { -92, 58, -96, 49, -104,
2900 44, 17, 35, 17, 12,
2901 25, 12, 13, 27, 13 },
2902 { -375, 136, -399, 209, -1479,
2903 949, 130, 260, 130, 230,
2904 -44, 230, 201, -191, 201 },
2905 { 0xed9, 0xc8, 0xe95, 0x8e, 0xa91,
2906 0x33a, 0x97, 0x12d, 0x97, 0x97,
2907 0x12d, 0x97, 0x25a, 0xd10, 0x25a }
2908};
2909
2910/* addr0, addr1, bmask, shift */
2911const struct nphy_rf_control_override_rev2 tbl_rf_control_override_rev2[] = {
2912 { 0x78, 0x78, 0x0038, 3 }, /* for field == 0x0002 (fls == 2) */
2913 { 0x7A, 0x7D, 0x0001, 0 }, /* for field == 0x0004 (fls == 3) */
2914 { 0x7A, 0x7D, 0x0002, 1 }, /* for field == 0x0008 (fls == 4) */
2915 { 0x7A, 0x7D, 0x0004, 2 }, /* for field == 0x0010 (fls == 5) */
2916 { 0x7A, 0x7D, 0x0030, 4 }, /* for field == 0x0020 (fls == 6) */
2917 { 0x7A, 0x7D, 0x00C0, 6 }, /* for field == 0x0040 (fls == 7) */
2918 { 0x7A, 0x7D, 0x0100, 8 }, /* for field == 0x0080 (fls == 8) */
2919 { 0x7A, 0x7D, 0x0200, 9 }, /* for field == 0x0100 (fls == 9) */
2920 { 0x78, 0x78, 0x0004, 2 }, /* for field == 0x0200 (fls == 10) */
2921 { 0x7B, 0x7E, 0x01FF, 0 }, /* for field == 0x0400 (fls == 11) */
2922 { 0x7C, 0x7F, 0x01FF, 0 }, /* for field == 0x0800 (fls == 12) */
2923 { 0x78, 0x78, 0x0100, 8 }, /* for field == 0x1000 (fls == 13) */
2924 { 0x78, 0x78, 0x0200, 9 }, /* for field == 0x2000 (fls == 14) */
2925 { 0x78, 0x78, 0xF000, 12 } /* for field == 0x4000 (fls == 15) */
2926};
2927
2928/* val_mask, val_shift, en_addr0, val_addr0, en_addr1, val_addr1 */
2929const struct nphy_rf_control_override_rev3 tbl_rf_control_override_rev3[] = {
2930 { 0x8000, 15, 0xE5, 0xF9, 0xE6, 0xFB }, /* field == 0x0001 (fls 1) */
2931 { 0x0001, 0, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0002 (fls 2) */
2932 { 0x0002, 1, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0004 (fls 3) */
2933 { 0x0004, 2, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0008 (fls 4) */
2934 { 0x0016, 4, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0010 (fls 5) */
2935 { 0x0020, 5, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0020 (fls 6) */
2936 { 0x0040, 6, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0040 (fls 7) */
2937 { 0x0080, 6, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0080 (fls 8) */
2938 { 0x0100, 7, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0100 (fls 9) */
2939 { 0x0007, 0, 0xE7, 0xF8, 0xEC, 0xFA }, /* field == 0x0200 (fls 10) */
2940 { 0x0070, 4, 0xE7, 0xF8, 0xEC, 0xFA }, /* field == 0x0400 (fls 11) */
2941 { 0xE000, 13, 0xE7, 0x7A, 0xEC, 0x7D }, /* field == 0x0800 (fls 12) */
2942 { 0xFFFF, 0, 0xE7, 0x7B, 0xEC, 0x7E }, /* field == 0x1000 (fls 13) */
2943 { 0xFFFF, 0, 0xE7, 0x7C, 0xEC, 0x7F }, /* field == 0x2000 (fls 14) */
2944 { 0x00C0, 6, 0xE7, 0xF9, 0xEC, 0xFB } /* field == 0x4000 (fls 15) */
2945};
2946
2409static inline void assert_ntab_array_sizes(void) 2947static inline void assert_ntab_array_sizes(void)
2410{ 2948{
2411#undef check 2949#undef check
@@ -2442,6 +2980,72 @@ static inline void assert_ntab_array_sizes(void)
2442#undef check 2980#undef check
2443} 2981}
2444 2982
2983u32 b43_ntab_read(struct b43_wldev *dev, u32 offset)
2984{
2985 u32 type, value;
2986
2987 type = offset & B43_NTAB_TYPEMASK;
2988 offset &= ~B43_NTAB_TYPEMASK;
2989 B43_WARN_ON(offset > 0xFFFF);
2990
2991 switch (type) {
2992 case B43_NTAB_8BIT:
2993 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, offset);
2994 value = b43_phy_read(dev, B43_NPHY_TABLE_DATALO) & 0xFF;
2995 break;
2996 case B43_NTAB_16BIT:
2997 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, offset);
2998 value = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
2999 break;
3000 case B43_NTAB_32BIT:
3001 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, offset);
3002 value = b43_phy_read(dev, B43_NPHY_TABLE_DATAHI);
3003 value <<= 16;
3004 value |= b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
3005 break;
3006 default:
3007 B43_WARN_ON(1);
3008 value = 0;
3009 }
3010
3011 return value;
3012}
3013
3014void b43_ntab_read_bulk(struct b43_wldev *dev, u32 offset,
3015 unsigned int nr_elements, void *_data)
3016{
3017 u32 type;
3018 u8 *data = _data;
3019 unsigned int i;
3020
3021 type = offset & B43_NTAB_TYPEMASK;
3022 offset &= ~B43_NTAB_TYPEMASK;
3023 B43_WARN_ON(offset > 0xFFFF);
3024
3025 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, offset);
3026
3027 for (i = 0; i < nr_elements; i++) {
3028 switch (type) {
3029 case B43_NTAB_8BIT:
3030 *data = b43_phy_read(dev, B43_NPHY_TABLE_DATALO) & 0xFF;
3031 data++;
3032 break;
3033 case B43_NTAB_16BIT:
3034 *((u16 *)data) = b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
3035 data += 2;
3036 break;
3037 case B43_NTAB_32BIT:
3038 *((u32 *)data) = b43_phy_read(dev, B43_NPHY_TABLE_DATAHI);
3039 *((u32 *)data) <<= 16;
3040 *((u32 *)data) |= b43_phy_read(dev, B43_NPHY_TABLE_DATALO);
3041 data += 4;
3042 break;
3043 default:
3044 B43_WARN_ON(1);
3045 }
3046 }
3047}
3048
2445void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value) 3049void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value)
2446{ 3050{
2447 u32 type; 3051 u32 type;
@@ -2474,3 +3078,91 @@ void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value)
2474 /* Some compiletime assertions... */ 3078 /* Some compiletime assertions... */
2475 assert_ntab_array_sizes(); 3079 assert_ntab_array_sizes();
2476} 3080}
3081
3082void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset,
3083 unsigned int nr_elements, const void *_data)
3084{
3085 u32 type, value;
3086 const u8 *data = _data;
3087 unsigned int i;
3088
3089 type = offset & B43_NTAB_TYPEMASK;
3090 offset &= ~B43_NTAB_TYPEMASK;
3091 B43_WARN_ON(offset > 0xFFFF);
3092
3093 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, offset);
3094
3095 for (i = 0; i < nr_elements; i++) {
3096 switch (type) {
3097 case B43_NTAB_8BIT:
3098 value = *data;
3099 data++;
3100 B43_WARN_ON(value & ~0xFF);
3101 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, value);
3102 break;
3103 case B43_NTAB_16BIT:
3104 value = *((u16 *)data);
3105 data += 2;
3106 B43_WARN_ON(value & ~0xFFFF);
3107 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, value);
3108 break;
3109 case B43_NTAB_32BIT:
3110 value = *((u32 *)data);
3111 data += 4;
3112 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI, value >> 16);
3113 b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
3114 value & 0xFFFF);
3115 break;
3116 default:
3117 B43_WARN_ON(1);
3118 }
3119 }
3120}
3121
3122#define ntab_upload(dev, offset, data) do { \
3123 unsigned int i; \
3124 for (i = 0; i < (offset##_SIZE); i++) \
3125 b43_ntab_write(dev, (offset) + i, (data)[i]); \
3126 } while (0)
3127
3128void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev)
3129{
3130 /* Static tables */
3131 ntab_upload(dev, B43_NTAB_FRAMESTRUCT, b43_ntab_framestruct);
3132 ntab_upload(dev, B43_NTAB_FRAMELT, b43_ntab_framelookup);
3133 ntab_upload(dev, B43_NTAB_TMAP, b43_ntab_tmap);
3134 ntab_upload(dev, B43_NTAB_TDTRN, b43_ntab_tdtrn);
3135 ntab_upload(dev, B43_NTAB_INTLEVEL, b43_ntab_intlevel);
3136 ntab_upload(dev, B43_NTAB_PILOT, b43_ntab_pilot);
3137 ntab_upload(dev, B43_NTAB_PILOTLT, b43_ntab_pilotlt);
3138 ntab_upload(dev, B43_NTAB_TDI20A0, b43_ntab_tdi20a0);
3139 ntab_upload(dev, B43_NTAB_TDI20A1, b43_ntab_tdi20a1);
3140 ntab_upload(dev, B43_NTAB_TDI40A0, b43_ntab_tdi40a0);
3141 ntab_upload(dev, B43_NTAB_TDI40A1, b43_ntab_tdi40a1);
3142 ntab_upload(dev, B43_NTAB_BDI, b43_ntab_bdi);
3143 ntab_upload(dev, B43_NTAB_CHANEST, b43_ntab_channelest);
3144 ntab_upload(dev, B43_NTAB_MCS, b43_ntab_mcs);
3145
3146 /* Volatile tables */
3147 ntab_upload(dev, B43_NTAB_NOISEVAR10, b43_ntab_noisevar10);
3148 ntab_upload(dev, B43_NTAB_NOISEVAR11, b43_ntab_noisevar11);
3149 ntab_upload(dev, B43_NTAB_C0_ESTPLT, b43_ntab_estimatepowerlt0);
3150 ntab_upload(dev, B43_NTAB_C1_ESTPLT, b43_ntab_estimatepowerlt1);
3151 ntab_upload(dev, B43_NTAB_C0_ADJPLT, b43_ntab_adjustpower0);
3152 ntab_upload(dev, B43_NTAB_C1_ADJPLT, b43_ntab_adjustpower1);
3153 ntab_upload(dev, B43_NTAB_C0_GAINCTL, b43_ntab_gainctl0);
3154 ntab_upload(dev, B43_NTAB_C1_GAINCTL, b43_ntab_gainctl1);
3155 ntab_upload(dev, B43_NTAB_C0_IQLT, b43_ntab_iqlt0);
3156 ntab_upload(dev, B43_NTAB_C1_IQLT, b43_ntab_iqlt1);
3157 ntab_upload(dev, B43_NTAB_C0_LOFEEDTH, b43_ntab_loftlt0);
3158 ntab_upload(dev, B43_NTAB_C1_LOFEEDTH, b43_ntab_loftlt1);
3159}
3160
3161void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev)
3162{
3163 /* Static tables */
3164 /* TODO */
3165
3166 /* Volatile tables */
3167 /* TODO */
3168}
diff --git a/drivers/net/wireless/b43/tables_nphy.h b/drivers/net/wireless/b43/tables_nphy.h
index 4d498b053ec7..9c1c6ecd3672 100644
--- a/drivers/net/wireless/b43/tables_nphy.h
+++ b/drivers/net/wireless/b43/tables_nphy.h
@@ -46,6 +46,27 @@ struct b43_nphy_channeltab_entry {
46 46
47struct b43_wldev; 47struct b43_wldev;
48 48
49struct nphy_txiqcal_ladder {
50 u8 percent;
51 u8 g_env;
52};
53
54struct nphy_rf_control_override_rev2 {
55 u8 addr0;
56 u8 addr1;
57 u16 bmask;
58 u8 shift;
59};
60
61struct nphy_rf_control_override_rev3 {
62 u16 val_mask;
63 u8 val_shift;
64 u8 en_addr0;
65 u8 val_addr0;
66 u8 en_addr1;
67 u8 val_addr1;
68};
69
49/* Upload the default register value table. 70/* Upload the default register value table.
50 * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz 71 * If "ghz5" is true, we upload the 5Ghz table. Otherwise the 2.4Ghz
51 * table is uploaded. If "ignore_uploadflag" is true, we upload any value 72 * table is uploaded. If "ignore_uploadflag" is true, we upload any value
@@ -126,34 +147,57 @@ b43_nphy_get_chantabent(struct b43_wldev *dev, u8 channel);
126#define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */ 147#define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */
127#define B43_NTAB_C1_LOFEEDTH_SIZE 128 148#define B43_NTAB_C1_LOFEEDTH_SIZE 128
128 149
150#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18
151#define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18
152#define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18
153#define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_20_SIZE 18
154#define B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3 11
155#define B43_NTAB_TX_IQLO_CAL_STARTCOEFS 9
156#define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3 12
157#define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL 10
158#define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL 10
159#define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3 12
160
161u32 b43_ntab_read(struct b43_wldev *dev, u32 offset);
162void b43_ntab_read_bulk(struct b43_wldev *dev, u32 offset,
163 unsigned int nr_elements, void *_data);
129void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value); 164void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value);
130 165void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset,
131extern const u8 b43_ntab_adjustpower0[]; 166 unsigned int nr_elements, const void *_data);
132extern const u8 b43_ntab_adjustpower1[]; 167
133extern const u16 b43_ntab_bdi[]; 168void b43_nphy_rev0_1_2_tables_init(struct b43_wldev *dev);
134extern const u32 b43_ntab_channelest[]; 169void b43_nphy_rev3plus_tables_init(struct b43_wldev *dev);
135extern const u8 b43_ntab_estimatepowerlt0[]; 170
136extern const u8 b43_ntab_estimatepowerlt1[]; 171extern const u32 b43_ntab_tx_gain_rev0_1_2[];
137extern const u8 b43_ntab_framelookup[]; 172extern const u32 b43_ntab_tx_gain_rev3plus_2ghz[];
138extern const u32 b43_ntab_framestruct[]; 173extern const u32 b43_ntab_tx_gain_rev3_5ghz[];
139extern const u32 b43_ntab_gainctl0[]; 174extern const u32 b43_ntab_tx_gain_rev4_5ghz[];
140extern const u32 b43_ntab_gainctl1[]; 175extern const u32 b43_ntab_tx_gain_rev5plus_5ghz[];
141extern const u32 b43_ntab_intlevel[]; 176
142extern const u32 b43_ntab_iqlt0[]; 177extern const u32 txpwrctrl_tx_gain_ipa[];
143extern const u32 b43_ntab_iqlt1[]; 178extern const u32 txpwrctrl_tx_gain_ipa_rev5[];
144extern const u16 b43_ntab_loftlt0[]; 179extern const u32 txpwrctrl_tx_gain_ipa_rev6[];
145extern const u16 b43_ntab_loftlt1[]; 180extern const u32 txpwrctrl_tx_gain_ipa_5g[];
146extern const u8 b43_ntab_mcs[]; 181extern const u16 tbl_iqcal_gainparams[2][9][8];
147extern const u32 b43_ntab_noisevar10[]; 182extern const struct nphy_txiqcal_ladder ladder_lo[];
148extern const u32 b43_ntab_noisevar11[]; 183extern const struct nphy_txiqcal_ladder ladder_iq[];
149extern const u16 b43_ntab_pilot[]; 184extern const u16 loscale[];
150extern const u32 b43_ntab_pilotlt[]; 185
151extern const u32 b43_ntab_tdi20a0[]; 186extern const u16 tbl_tx_iqlo_cal_loft_ladder_40[];
152extern const u32 b43_ntab_tdi20a1[]; 187extern const u16 tbl_tx_iqlo_cal_loft_ladder_20[];
153extern const u32 b43_ntab_tdi40a0[]; 188extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[];
154extern const u32 b43_ntab_tdi40a1[]; 189extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[];
155extern const u32 b43_ntab_tdtrn[]; 190extern const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[];
156extern const u32 b43_ntab_tmap[]; 191extern const u16 tbl_tx_iqlo_cal_startcoefs[];
157 192extern const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[];
193extern const u16 tbl_tx_iqlo_cal_cmds_recal[];
194extern const u16 tbl_tx_iqlo_cal_cmds_fullcal[];
195extern const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[];
196extern const s16 tbl_tx_filter_coef_rev4[7][15];
197
198extern const struct nphy_rf_control_override_rev2
199 tbl_rf_control_override_rev2[];
200extern const struct nphy_rf_control_override_rev3
201 tbl_rf_control_override_rev3[];
158 202
159#endif /* B43_TABLES_NPHY_H_ */ 203#endif /* B43_TABLES_NPHY_H_ */
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c
index f4e9695ec186..eda06529ef5f 100644
--- a/drivers/net/wireless/b43/xmit.c
+++ b/drivers/net/wireless/b43/xmit.c
@@ -27,7 +27,7 @@
27 27
28*/ 28*/
29 29
30#include "b43.h" 30#include "xmit.h"
31#include "phy_common.h" 31#include "phy_common.h"
32#include "dma.h" 32#include "dma.h"
33#include "pio.h" 33#include "pio.h"
@@ -621,7 +621,6 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
621 (phystat0 & B43_RX_PHYST0_OFDM), 621 (phystat0 & B43_RX_PHYST0_OFDM),
622 (phystat0 & B43_RX_PHYST0_GAINCTL), 622 (phystat0 & B43_RX_PHYST0_GAINCTL),
623 (phystat3 & B43_RX_PHYST3_TRSTATE)); 623 (phystat3 & B43_RX_PHYST3_TRSTATE));
624 status.qual = (rxhdr->jssi * 100) / B43_RX_MAX_SSI;
625 } 624 }
626 625
627 if (phystat0 & B43_RX_PHYST0_OFDM) 626 if (phystat0 & B43_RX_PHYST0_OFDM)
@@ -690,10 +689,7 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
690 } 689 }
691 690
692 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 691 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
693 692 ieee80211_rx_ni(dev->wl->hw, skb);
694 local_bh_disable();
695 ieee80211_rx(dev->wl->hw, skb);
696 local_bh_enable();
697 693
698#if B43_DEBUG 694#if B43_DEBUG
699 dev->rx_count++; 695 dev->rx_count++;
diff --git a/drivers/net/wireless/b43/xmit.h b/drivers/net/wireless/b43/xmit.h
index 3530de871873..d23ff9fe0c9e 100644
--- a/drivers/net/wireless/b43/xmit.h
+++ b/drivers/net/wireless/b43/xmit.h
@@ -2,6 +2,8 @@
2#define B43_XMIT_H_ 2#define B43_XMIT_H_
3 3
4#include "main.h" 4#include "main.h"
5#include <net/mac80211.h>
6
5 7
6#define _b43_declare_plcp_hdr(size) \ 8#define _b43_declare_plcp_hdr(size) \
7 struct b43_plcp_hdr##size { \ 9 struct b43_plcp_hdr##size { \
@@ -332,4 +334,21 @@ static inline u8 b43_kidx_to_raw(struct b43_wldev *dev, u8 firmware_kidx)
332 return raw_kidx; 334 return raw_kidx;
333} 335}
334 336
337/* struct b43_private_tx_info - TX info private to b43.
338 * The structure is placed in (struct ieee80211_tx_info *)->rate_driver_data
339 *
340 * @bouncebuffer: DMA Bouncebuffer (if used)
341 */
342struct b43_private_tx_info {
343 void *bouncebuffer;
344};
345
346static inline struct b43_private_tx_info *
347b43_get_priv_tx_info(struct ieee80211_tx_info *info)
348{
349 BUILD_BUG_ON(sizeof(struct b43_private_tx_info) >
350 sizeof(info->rate_driver_data));
351 return (struct b43_private_tx_info *)info->rate_driver_data;
352}
353
335#endif /* B43_XMIT_H_ */ 354#endif /* B43_XMIT_H_ */
diff --git a/drivers/net/wireless/b43legacy/Kconfig b/drivers/net/wireless/b43legacy/Kconfig
index 94a463478053..1ffa28835c58 100644
--- a/drivers/net/wireless/b43legacy/Kconfig
+++ b/drivers/net/wireless/b43legacy/Kconfig
@@ -1,6 +1,6 @@
1config B43LEGACY 1config B43LEGACY
2 tristate "Broadcom 43xx-legacy wireless support (mac80211 stack)" 2 tristate "Broadcom 43xx-legacy wireless support (mac80211 stack)"
3 depends on SSB_POSSIBLE && MAC80211 && WLAN_80211 && HAS_DMA 3 depends on SSB_POSSIBLE && MAC80211 && HAS_DMA
4 select SSB 4 select SSB
5 select FW_LOADER 5 select FW_LOADER
6 ---help--- 6 ---help---
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h
index 038baa8869e2..89fe2f972c72 100644
--- a/drivers/net/wireless/b43legacy/b43legacy.h
+++ b/drivers/net/wireless/b43legacy/b43legacy.h
@@ -29,8 +29,6 @@
29 29
30#define B43legacy_IRQWAIT_MAX_RETRIES 20 30#define B43legacy_IRQWAIT_MAX_RETRIES 20
31 31
32#define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */
33
34/* MMIO offsets */ 32/* MMIO offsets */
35#define B43legacy_MMIO_DMA0_REASON 0x20 33#define B43legacy_MMIO_DMA0_REASON 0x20
36#define B43legacy_MMIO_DMA0_IRQ_MASK 0x24 34#define B43legacy_MMIO_DMA0_IRQ_MASK 0x24
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c
index 866403415811..e91520d0312e 100644
--- a/drivers/net/wireless/b43legacy/dma.c
+++ b/drivers/net/wireless/b43legacy/dma.c
@@ -37,6 +37,7 @@
37#include <linux/pci.h> 37#include <linux/pci.h>
38#include <linux/delay.h> 38#include <linux/delay.h>
39#include <linux/skbuff.h> 39#include <linux/skbuff.h>
40#include <linux/slab.h>
40#include <net/dst.h> 41#include <net/dst.h>
41 42
42/* 32bit DMA ops. */ 43/* 32bit DMA ops. */
@@ -1240,8 +1241,9 @@ struct b43legacy_dmaring *parse_cookie(struct b43legacy_wldev *dev,
1240} 1241}
1241 1242
1242static int dma_tx_fragment(struct b43legacy_dmaring *ring, 1243static int dma_tx_fragment(struct b43legacy_dmaring *ring,
1243 struct sk_buff *skb) 1244 struct sk_buff **in_skb)
1244{ 1245{
1246 struct sk_buff *skb = *in_skb;
1245 const struct b43legacy_dma_ops *ops = ring->ops; 1247 const struct b43legacy_dma_ops *ops = ring->ops;
1246 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1248 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1247 u8 *header; 1249 u8 *header;
@@ -1305,8 +1307,14 @@ static int dma_tx_fragment(struct b43legacy_dmaring *ring,
1305 } 1307 }
1306 1308
1307 memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); 1309 memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len);
1310 memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb));
1311 bounce_skb->dev = skb->dev;
1312 skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb));
1313 info = IEEE80211_SKB_CB(bounce_skb);
1314
1308 dev_kfree_skb_any(skb); 1315 dev_kfree_skb_any(skb);
1309 skb = bounce_skb; 1316 skb = bounce_skb;
1317 *in_skb = bounce_skb;
1310 meta->skb = skb; 1318 meta->skb = skb;
1311 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); 1319 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
1312 if (b43legacy_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { 1320 if (b43legacy_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
@@ -1360,8 +1368,10 @@ int b43legacy_dma_tx(struct b43legacy_wldev *dev,
1360 struct sk_buff *skb) 1368 struct sk_buff *skb)
1361{ 1369{
1362 struct b43legacy_dmaring *ring; 1370 struct b43legacy_dmaring *ring;
1371 struct ieee80211_hdr *hdr;
1363 int err = 0; 1372 int err = 0;
1364 unsigned long flags; 1373 unsigned long flags;
1374 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1365 1375
1366 ring = priority_to_txring(dev, skb_get_queue_mapping(skb)); 1376 ring = priority_to_txring(dev, skb_get_queue_mapping(skb));
1367 spin_lock_irqsave(&ring->lock, flags); 1377 spin_lock_irqsave(&ring->lock, flags);
@@ -1386,7 +1396,11 @@ int b43legacy_dma_tx(struct b43legacy_wldev *dev,
1386 goto out_unlock; 1396 goto out_unlock;
1387 } 1397 }
1388 1398
1389 err = dma_tx_fragment(ring, skb); 1399 /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing
1400 * into the skb data or cb now. */
1401 hdr = NULL;
1402 info = NULL;
1403 err = dma_tx_fragment(ring, &skb);
1390 if (unlikely(err == -ENOKEY)) { 1404 if (unlikely(err == -ENOKEY)) {
1391 /* Drop this packet, as we don't have the encryption key 1405 /* Drop this packet, as we don't have the encryption key
1392 * anymore and must not transmit it unencrypted. */ 1406 * anymore and must not transmit it unencrypted. */
@@ -1398,7 +1412,6 @@ int b43legacy_dma_tx(struct b43legacy_wldev *dev,
1398 b43legacyerr(dev->wl, "DMA tx mapping failure\n"); 1412 b43legacyerr(dev->wl, "DMA tx mapping failure\n");
1399 goto out_unlock; 1413 goto out_unlock;
1400 } 1414 }
1401 ring->nr_tx_packets++;
1402 if ((free_slots(ring) < SLOTS_PER_PACKET) || 1415 if ((free_slots(ring) < SLOTS_PER_PACKET) ||
1403 should_inject_overflow(ring)) { 1416 should_inject_overflow(ring)) {
1404 /* This TX ring is full. */ 1417 /* This TX ring is full. */
@@ -1514,25 +1527,6 @@ void b43legacy_dma_handle_txstatus(struct b43legacy_wldev *dev,
1514 spin_unlock(&ring->lock); 1527 spin_unlock(&ring->lock);
1515} 1528}
1516 1529
1517void b43legacy_dma_get_tx_stats(struct b43legacy_wldev *dev,
1518 struct ieee80211_tx_queue_stats *stats)
1519{
1520 const int nr_queues = dev->wl->hw->queues;
1521 struct b43legacy_dmaring *ring;
1522 unsigned long flags;
1523 int i;
1524
1525 for (i = 0; i < nr_queues; i++) {
1526 ring = priority_to_txring(dev, i);
1527
1528 spin_lock_irqsave(&ring->lock, flags);
1529 stats[i].len = ring->used_slots / SLOTS_PER_PACKET;
1530 stats[i].limit = ring->nr_slots / SLOTS_PER_PACKET;
1531 stats[i].count = ring->nr_tx_packets;
1532 spin_unlock_irqrestore(&ring->lock, flags);
1533 }
1534}
1535
1536static void dma_rx(struct b43legacy_dmaring *ring, 1530static void dma_rx(struct b43legacy_dmaring *ring,
1537 int *slot) 1531 int *slot)
1538{ 1532{
diff --git a/drivers/net/wireless/b43legacy/dma.h b/drivers/net/wireless/b43legacy/dma.h
index 2f186003c31e..f9681041c2d8 100644
--- a/drivers/net/wireless/b43legacy/dma.h
+++ b/drivers/net/wireless/b43legacy/dma.h
@@ -243,8 +243,6 @@ struct b43legacy_dmaring {
243 int used_slots; 243 int used_slots;
244 /* Currently used slot in the ring. */ 244 /* Currently used slot in the ring. */
245 int current_slot; 245 int current_slot;
246 /* Total number of packets sent. Statistics only. */
247 unsigned int nr_tx_packets;
248 /* Frameoffset in octets. */ 246 /* Frameoffset in octets. */
249 u32 frameoffset; 247 u32 frameoffset;
250 /* Descriptor buffer size. */ 248 /* Descriptor buffer size. */
@@ -292,9 +290,6 @@ void b43legacy_dma_free(struct b43legacy_wldev *dev);
292void b43legacy_dma_tx_suspend(struct b43legacy_wldev *dev); 290void b43legacy_dma_tx_suspend(struct b43legacy_wldev *dev);
293void b43legacy_dma_tx_resume(struct b43legacy_wldev *dev); 291void b43legacy_dma_tx_resume(struct b43legacy_wldev *dev);
294 292
295void b43legacy_dma_get_tx_stats(struct b43legacy_wldev *dev,
296 struct ieee80211_tx_queue_stats *stats);
297
298int b43legacy_dma_tx(struct b43legacy_wldev *dev, 293int b43legacy_dma_tx(struct b43legacy_wldev *dev,
299 struct sk_buff *skb); 294 struct sk_buff *skb);
300void b43legacy_dma_handle_txstatus(struct b43legacy_wldev *dev, 295void b43legacy_dma_handle_txstatus(struct b43legacy_wldev *dev,
@@ -315,11 +310,6 @@ void b43legacy_dma_free(struct b43legacy_wldev *dev)
315{ 310{
316} 311}
317static inline 312static inline
318void b43legacy_dma_get_tx_stats(struct b43legacy_wldev *dev,
319 struct ieee80211_tx_queue_stats *stats)
320{
321}
322static inline
323int b43legacy_dma_tx(struct b43legacy_wldev *dev, 313int b43legacy_dma_tx(struct b43legacy_wldev *dev,
324 struct sk_buff *skb) 314 struct sk_buff *skb)
325{ 315{
diff --git a/drivers/net/wireless/b43legacy/leds.h b/drivers/net/wireless/b43legacy/leds.h
index 82167a90088f..9ff6750dc57f 100644
--- a/drivers/net/wireless/b43legacy/leds.h
+++ b/drivers/net/wireless/b43legacy/leds.h
@@ -45,7 +45,7 @@ enum b43legacy_led_behaviour {
45void b43legacy_leds_init(struct b43legacy_wldev *dev); 45void b43legacy_leds_init(struct b43legacy_wldev *dev);
46void b43legacy_leds_exit(struct b43legacy_wldev *dev); 46void b43legacy_leds_exit(struct b43legacy_wldev *dev);
47 47
48#else /* CONFIG_B43EGACY_LEDS */ 48#else /* CONFIG_B43LEGACY_LEDS */
49/* LED support disabled */ 49/* LED support disabled */
50 50
51struct b43legacy_led { 51struct b43legacy_led {
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c
index 4b60148a5e61..bb2dd9329aa0 100644
--- a/drivers/net/wireless/b43legacy/main.c
+++ b/drivers/net/wireless/b43legacy/main.c
@@ -40,6 +40,7 @@
40#include <linux/sched.h> 40#include <linux/sched.h>
41#include <linux/skbuff.h> 41#include <linux/skbuff.h>
42#include <linux/dma-mapping.h> 42#include <linux/dma-mapping.h>
43#include <linux/slab.h>
43#include <net/dst.h> 44#include <net/dst.h>
44#include <asm/unaligned.h> 45#include <asm/unaligned.h>
45 46
@@ -61,6 +62,8 @@ MODULE_AUTHOR("Michael Buesch");
61MODULE_LICENSE("GPL"); 62MODULE_LICENSE("GPL");
62 63
63MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID); 64MODULE_FIRMWARE(B43legacy_SUPPORTED_FIRMWARE_ID);
65MODULE_FIRMWARE("b43legacy/ucode2.fw");
66MODULE_FIRMWARE("b43legacy/ucode4.fw");
64 67
65#if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO) 68#if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
66static int modparam_pio; 69static int modparam_pio;
@@ -2277,7 +2280,7 @@ static void do_periodic_work(struct b43legacy_wldev *dev)
2277/* Periodic work locking policy: 2280/* Periodic work locking policy:
2278 * The whole periodic work handler is protected by 2281 * The whole periodic work handler is protected by
2279 * wl->mutex. If another lock is needed somewhere in the 2282 * wl->mutex. If another lock is needed somewhere in the
2280 * pwork callchain, it's aquired in-place, where it's needed. 2283 * pwork callchain, it's acquired in-place, where it's needed.
2281 */ 2284 */
2282static void b43legacy_periodic_work_handler(struct work_struct *work) 2285static void b43legacy_periodic_work_handler(struct work_struct *work)
2283{ 2286{
@@ -2444,29 +2447,6 @@ static int b43legacy_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
2444 return 0; 2447 return 0;
2445} 2448}
2446 2449
2447static int b43legacy_op_get_tx_stats(struct ieee80211_hw *hw,
2448 struct ieee80211_tx_queue_stats *stats)
2449{
2450 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2451 struct b43legacy_wldev *dev = wl->current_dev;
2452 unsigned long flags;
2453 int err = -ENODEV;
2454
2455 if (!dev)
2456 goto out;
2457 spin_lock_irqsave(&wl->irq_lock, flags);
2458 if (likely(b43legacy_status(dev) >= B43legacy_STAT_STARTED)) {
2459 if (b43legacy_using_pio(dev))
2460 b43legacy_pio_get_tx_stats(dev, stats);
2461 else
2462 b43legacy_dma_get_tx_stats(dev, stats);
2463 err = 0;
2464 }
2465 spin_unlock_irqrestore(&wl->irq_lock, flags);
2466out:
2467 return err;
2468}
2469
2470static int b43legacy_op_get_stats(struct ieee80211_hw *hw, 2450static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2471 struct ieee80211_low_level_stats *stats) 2451 struct ieee80211_low_level_stats *stats)
2472{ 2452{
@@ -2677,7 +2657,7 @@ static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2677 if (conf->channel->hw_value != phy->channel) 2657 if (conf->channel->hw_value != phy->channel)
2678 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0); 2658 b43legacy_radio_selectchannel(dev, conf->channel->hw_value, 0);
2679 2659
2680 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_RADIOTAP); 2660 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2681 2661
2682 /* Adjust the desired TX power level. */ 2662 /* Adjust the desired TX power level. */
2683 if (conf->power_level != 0) { 2663 if (conf->power_level != 0) {
@@ -2921,6 +2901,7 @@ static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2921 goto out; 2901 goto out;
2922 } 2902 }
2923 /* We are ready to run. */ 2903 /* We are ready to run. */
2904 ieee80211_wake_queues(dev->wl->hw);
2924 b43legacy_set_status(dev, B43legacy_STAT_STARTED); 2905 b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2925 2906
2926 /* Start data flow (TX/RX) */ 2907 /* Start data flow (TX/RX) */
@@ -3341,6 +3322,7 @@ static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3341 b43legacy_security_init(dev); 3322 b43legacy_security_init(dev);
3342 b43legacy_rng_init(wl); 3323 b43legacy_rng_init(wl);
3343 3324
3325 ieee80211_wake_queues(dev->wl->hw);
3344 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); 3326 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3345 3327
3346 b43legacy_leds_init(dev); 3328 b43legacy_leds_init(dev);
@@ -3361,7 +3343,7 @@ err_kfree_lo_control:
3361} 3343}
3362 3344
3363static int b43legacy_op_add_interface(struct ieee80211_hw *hw, 3345static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3364 struct ieee80211_if_init_conf *conf) 3346 struct ieee80211_vif *vif)
3365{ 3347{
3366 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3348 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3367 struct b43legacy_wldev *dev; 3349 struct b43legacy_wldev *dev;
@@ -3370,23 +3352,23 @@ static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3370 3352
3371 /* TODO: allow WDS/AP devices to coexist */ 3353 /* TODO: allow WDS/AP devices to coexist */
3372 3354
3373 if (conf->type != NL80211_IFTYPE_AP && 3355 if (vif->type != NL80211_IFTYPE_AP &&
3374 conf->type != NL80211_IFTYPE_STATION && 3356 vif->type != NL80211_IFTYPE_STATION &&
3375 conf->type != NL80211_IFTYPE_WDS && 3357 vif->type != NL80211_IFTYPE_WDS &&
3376 conf->type != NL80211_IFTYPE_ADHOC) 3358 vif->type != NL80211_IFTYPE_ADHOC)
3377 return -EOPNOTSUPP; 3359 return -EOPNOTSUPP;
3378 3360
3379 mutex_lock(&wl->mutex); 3361 mutex_lock(&wl->mutex);
3380 if (wl->operating) 3362 if (wl->operating)
3381 goto out_mutex_unlock; 3363 goto out_mutex_unlock;
3382 3364
3383 b43legacydbg(wl, "Adding Interface type %d\n", conf->type); 3365 b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3384 3366
3385 dev = wl->current_dev; 3367 dev = wl->current_dev;
3386 wl->operating = 1; 3368 wl->operating = 1;
3387 wl->vif = conf->vif; 3369 wl->vif = vif;
3388 wl->if_type = conf->type; 3370 wl->if_type = vif->type;
3389 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN); 3371 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3390 3372
3391 spin_lock_irqsave(&wl->irq_lock, flags); 3373 spin_lock_irqsave(&wl->irq_lock, flags);
3392 b43legacy_adjust_opmode(dev); 3374 b43legacy_adjust_opmode(dev);
@@ -3403,18 +3385,18 @@ static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3403} 3385}
3404 3386
3405static void b43legacy_op_remove_interface(struct ieee80211_hw *hw, 3387static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3406 struct ieee80211_if_init_conf *conf) 3388 struct ieee80211_vif *vif)
3407{ 3389{
3408 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw); 3390 struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3409 struct b43legacy_wldev *dev = wl->current_dev; 3391 struct b43legacy_wldev *dev = wl->current_dev;
3410 unsigned long flags; 3392 unsigned long flags;
3411 3393
3412 b43legacydbg(wl, "Removing Interface type %d\n", conf->type); 3394 b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3413 3395
3414 mutex_lock(&wl->mutex); 3396 mutex_lock(&wl->mutex);
3415 3397
3416 B43legacy_WARN_ON(!wl->operating); 3398 B43legacy_WARN_ON(!wl->operating);
3417 B43legacy_WARN_ON(wl->vif != conf->vif); 3399 B43legacy_WARN_ON(wl->vif != vif);
3418 wl->vif = NULL; 3400 wl->vif = NULL;
3419 3401
3420 wl->operating = 0; 3402 wl->operating = 0;
@@ -3509,7 +3491,6 @@ static const struct ieee80211_ops b43legacy_hw_ops = {
3509 .bss_info_changed = b43legacy_op_bss_info_changed, 3491 .bss_info_changed = b43legacy_op_bss_info_changed,
3510 .configure_filter = b43legacy_op_configure_filter, 3492 .configure_filter = b43legacy_op_configure_filter,
3511 .get_stats = b43legacy_op_get_stats, 3493 .get_stats = b43legacy_op_get_stats,
3512 .get_tx_stats = b43legacy_op_get_tx_stats,
3513 .start = b43legacy_op_start, 3494 .start = b43legacy_op_start,
3514 .stop = b43legacy_op_stop, 3495 .stop = b43legacy_op_stop,
3515 .set_tim = b43legacy_op_beacon_set_tim, 3496 .set_tim = b43legacy_op_beacon_set_tim,
@@ -3593,7 +3574,7 @@ static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3593{ 3574{
3594 struct b43legacy_wl *wl = dev->wl; 3575 struct b43legacy_wl *wl = dev->wl;
3595 struct ssb_bus *bus = dev->dev->bus; 3576 struct ssb_bus *bus = dev->dev->bus;
3596 struct pci_dev *pdev = bus->host_pci; 3577 struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3597 int err; 3578 int err;
3598 int have_bphy = 0; 3579 int have_bphy = 0;
3599 int have_gphy = 0; 3580 int have_gphy = 0;
@@ -3707,7 +3688,7 @@ static int b43legacy_one_core_attach(struct ssb_device *dev,
3707 3688
3708 if (!list_empty(&wl->devlist)) { 3689 if (!list_empty(&wl->devlist)) {
3709 /* We are not the first core on this chip. */ 3690 /* We are not the first core on this chip. */
3710 pdev = dev->bus->host_pci; 3691 pdev = (dev->bus->bustype == SSB_BUSTYPE_PCI) ? dev->bus->host_pci : NULL;
3711 /* Only special chips support more than one wireless 3692 /* Only special chips support more than one wireless
3712 * core, although some of the other chips have more than 3693 * core, although some of the other chips have more than
3713 * one wireless core as well. Check for this and 3694 * one wireless core as well. Check for this and
@@ -3960,7 +3941,7 @@ static struct ssb_driver b43legacy_ssb_driver = {
3960 3941
3961static void b43legacy_print_driverinfo(void) 3942static void b43legacy_print_driverinfo(void)
3962{ 3943{
3963 const char *feat_pci = "", *feat_leds = "", *feat_rfkill = "", 3944 const char *feat_pci = "", *feat_leds = "",
3964 *feat_pio = "", *feat_dma = ""; 3945 *feat_pio = "", *feat_dma = "";
3965 3946
3966#ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT 3947#ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
@@ -3969,9 +3950,6 @@ static void b43legacy_print_driverinfo(void)
3969#ifdef CONFIG_B43LEGACY_LEDS 3950#ifdef CONFIG_B43LEGACY_LEDS
3970 feat_leds = "L"; 3951 feat_leds = "L";
3971#endif 3952#endif
3972#ifdef CONFIG_B43LEGACY_RFKILL
3973 feat_rfkill = "R";
3974#endif
3975#ifdef CONFIG_B43LEGACY_PIO 3953#ifdef CONFIG_B43LEGACY_PIO
3976 feat_pio = "I"; 3954 feat_pio = "I";
3977#endif 3955#endif
@@ -3979,9 +3957,9 @@ static void b43legacy_print_driverinfo(void)
3979 feat_dma = "D"; 3957 feat_dma = "D";
3980#endif 3958#endif
3981 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded " 3959 printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
3982 "[ Features: %s%s%s%s%s, Firmware-ID: " 3960 "[ Features: %s%s%s%s, Firmware-ID: "
3983 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n", 3961 B43legacy_SUPPORTED_FIRMWARE_ID " ]\n",
3984 feat_pci, feat_leds, feat_rfkill, feat_pio, feat_dma); 3962 feat_pci, feat_leds, feat_pio, feat_dma);
3985} 3963}
3986 3964
3987static int __init b43legacy_init(void) 3965static int __init b43legacy_init(void)
diff --git a/drivers/net/wireless/b43legacy/phy.c b/drivers/net/wireless/b43legacy/phy.c
index aaf227203a98..35033dd342ce 100644
--- a/drivers/net/wireless/b43legacy/phy.c
+++ b/drivers/net/wireless/b43legacy/phy.c
@@ -32,6 +32,7 @@
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/sched.h> 34#include <linux/sched.h>
35#include <linux/slab.h>
35#include <linux/types.h> 36#include <linux/types.h>
36 37
37#include "b43legacy.h" 38#include "b43legacy.h"
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c
index 51866c9a2769..b033b0ed4ca0 100644
--- a/drivers/net/wireless/b43legacy/pio.c
+++ b/drivers/net/wireless/b43legacy/pio.c
@@ -29,6 +29,7 @@
29#include "xmit.h" 29#include "xmit.h"
30 30
31#include <linux/delay.h> 31#include <linux/delay.h>
32#include <linux/slab.h>
32 33
33 34
34static void tx_start(struct b43legacy_pioqueue *queue) 35static void tx_start(struct b43legacy_pioqueue *queue)
@@ -477,7 +478,6 @@ int b43legacy_pio_tx(struct b43legacy_wldev *dev,
477 478
478 list_move_tail(&packet->list, &queue->txqueue); 479 list_move_tail(&packet->list, &queue->txqueue);
479 queue->nr_txfree--; 480 queue->nr_txfree--;
480 queue->nr_tx_packets++;
481 B43legacy_WARN_ON(queue->nr_txfree >= B43legacy_PIO_MAXTXPACKETS); 481 B43legacy_WARN_ON(queue->nr_txfree >= B43legacy_PIO_MAXTXPACKETS);
482 482
483 tasklet_schedule(&queue->txtask); 483 tasklet_schedule(&queue->txtask);
@@ -546,18 +546,6 @@ void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
546 tasklet_schedule(&queue->txtask); 546 tasklet_schedule(&queue->txtask);
547} 547}
548 548
549void b43legacy_pio_get_tx_stats(struct b43legacy_wldev *dev,
550 struct ieee80211_tx_queue_stats *stats)
551{
552 struct b43legacy_pio *pio = &dev->pio;
553 struct b43legacy_pioqueue *queue;
554
555 queue = pio->queue1;
556 stats[0].len = B43legacy_PIO_MAXTXPACKETS - queue->nr_txfree;
557 stats[0].limit = B43legacy_PIO_MAXTXPACKETS;
558 stats[0].count = queue->nr_tx_packets;
559}
560
561static void pio_rx_error(struct b43legacy_pioqueue *queue, 549static void pio_rx_error(struct b43legacy_pioqueue *queue,
562 int clear_buffers, 550 int clear_buffers,
563 const char *error) 551 const char *error)
diff --git a/drivers/net/wireless/b43legacy/pio.h b/drivers/net/wireless/b43legacy/pio.h
index 464fec05a06d..8e6773ea6e75 100644
--- a/drivers/net/wireless/b43legacy/pio.h
+++ b/drivers/net/wireless/b43legacy/pio.h
@@ -74,10 +74,6 @@ struct b43legacy_pioqueue {
74 * posted to the device. We are waiting for the txstatus. 74 * posted to the device. We are waiting for the txstatus.
75 */ 75 */
76 struct list_head txrunning; 76 struct list_head txrunning;
77 /* Total number or packets sent.
78 * (This counter can obviously wrap).
79 */
80 unsigned int nr_tx_packets;
81 struct tasklet_struct txtask; 77 struct tasklet_struct txtask;
82 struct b43legacy_pio_txpacket 78 struct b43legacy_pio_txpacket
83 tx_packets_cache[B43legacy_PIO_MAXTXPACKETS]; 79 tx_packets_cache[B43legacy_PIO_MAXTXPACKETS];
@@ -106,8 +102,6 @@ int b43legacy_pio_tx(struct b43legacy_wldev *dev,
106 struct sk_buff *skb); 102 struct sk_buff *skb);
107void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev, 103void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
108 const struct b43legacy_txstatus *status); 104 const struct b43legacy_txstatus *status);
109void b43legacy_pio_get_tx_stats(struct b43legacy_wldev *dev,
110 struct ieee80211_tx_queue_stats *stats);
111void b43legacy_pio_rx(struct b43legacy_pioqueue *queue); 105void b43legacy_pio_rx(struct b43legacy_pioqueue *queue);
112 106
113/* Suspend TX queue in hardware. */ 107/* Suspend TX queue in hardware. */
@@ -140,11 +134,6 @@ void b43legacy_pio_handle_txstatus(struct b43legacy_wldev *dev,
140{ 134{
141} 135}
142static inline 136static inline
143void b43legacy_pio_get_tx_stats(struct b43legacy_wldev *dev,
144 struct ieee80211_tx_queue_stats *stats)
145{
146}
147static inline
148void b43legacy_pio_rx(struct b43legacy_pioqueue *queue) 137void b43legacy_pio_rx(struct b43legacy_pioqueue *queue)
149{ 138{
150} 139}
diff --git a/drivers/net/wireless/b43legacy/rfkill.c b/drivers/net/wireless/b43legacy/rfkill.c
index 8783022db11e..d579df72b783 100644
--- a/drivers/net/wireless/b43legacy/rfkill.c
+++ b/drivers/net/wireless/b43legacy/rfkill.c
@@ -34,6 +34,13 @@ bool b43legacy_is_hw_radio_enabled(struct b43legacy_wldev *dev)
34 & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK)) 34 & B43legacy_MMIO_RADIO_HWENABLED_HI_MASK))
35 return 1; 35 return 1;
36 } else { 36 } else {
37 /* To prevent CPU fault on PPC, do not read a register
38 * unless the interface is started; however, on resume
39 * for hibernation, this routine is entered early. When
40 * that happens, unconditionally return TRUE.
41 */
42 if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
43 return 1;
37 if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO) 44 if (b43legacy_read16(dev, B43legacy_MMIO_RADIO_HWENABLED_LO)
38 & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK) 45 & B43legacy_MMIO_RADIO_HWENABLED_LO_MASK)
39 return 1; 46 return 1;
diff --git a/drivers/net/wireless/b43legacy/xmit.c b/drivers/net/wireless/b43legacy/xmit.c
index 103f3c9e7f58..9c8882d9275e 100644
--- a/drivers/net/wireless/b43legacy/xmit.c
+++ b/drivers/net/wireless/b43legacy/xmit.c
@@ -549,7 +549,6 @@ void b43legacy_rx(struct b43legacy_wldev *dev,
549 (phystat0 & B43legacy_RX_PHYST0_GAINCTL), 549 (phystat0 & B43legacy_RX_PHYST0_GAINCTL),
550 (phystat3 & B43legacy_RX_PHYST3_TRSTATE)); 550 (phystat3 & B43legacy_RX_PHYST3_TRSTATE));
551 status.noise = dev->stats.link_noise; 551 status.noise = dev->stats.link_noise;
552 status.qual = (jssi * 100) / B43legacy_RX_MAX_SSI;
553 /* change to support A PHY */ 552 /* change to support A PHY */
554 if (phystat0 & B43legacy_RX_PHYST0_OFDM) 553 if (phystat0 & B43legacy_RX_PHYST0_OFDM)
555 status.rate_idx = b43legacy_plcp_get_bitrate_idx_ofdm(plcp, false); 554 status.rate_idx = b43legacy_plcp_get_bitrate_idx_ofdm(plcp, false);
diff --git a/drivers/net/wireless/hostap/Kconfig b/drivers/net/wireless/hostap/Kconfig
index c15db2293515..287d82728bc3 100644
--- a/drivers/net/wireless/hostap/Kconfig
+++ b/drivers/net/wireless/hostap/Kconfig
@@ -1,7 +1,8 @@
1config HOSTAP 1config HOSTAP
2 tristate "IEEE 802.11 for Host AP (Prism2/2.5/3 and WEP/TKIP/CCMP)" 2 tristate "IEEE 802.11 for Host AP (Prism2/2.5/3 and WEP/TKIP/CCMP)"
3 depends on WLAN_80211
4 select WIRELESS_EXT 3 select WIRELESS_EXT
4 select WEXT_SPY
5 select WEXT_PRIV
5 select CRYPTO 6 select CRYPTO
6 select CRYPTO_ARC4 7 select CRYPTO_ARC4
7 select CRYPTO_ECB 8 select CRYPTO_ECB
diff --git a/drivers/net/wireless/hostap/hostap_80211_rx.c b/drivers/net/wireless/hostap/hostap_80211_rx.c
index 3816df96a663..f4c56121d387 100644
--- a/drivers/net/wireless/hostap/hostap_80211_rx.c
+++ b/drivers/net/wireless/hostap/hostap_80211_rx.c
@@ -1,4 +1,5 @@
1#include <linux/etherdevice.h> 1#include <linux/etherdevice.h>
2#include <linux/slab.h>
2#include <net/lib80211.h> 3#include <net/lib80211.h>
3#include <linux/if_arp.h> 4#include <linux/if_arp.h>
4 5
diff --git a/drivers/net/wireless/hostap/hostap_80211_tx.c b/drivers/net/wireless/hostap/hostap_80211_tx.c
index 90108b698f11..c34a3b7f1292 100644
--- a/drivers/net/wireless/hostap/hostap_80211_tx.c
+++ b/drivers/net/wireless/hostap/hostap_80211_tx.c
@@ -1,3 +1,5 @@
1#include <linux/slab.h>
2
1#include "hostap_80211.h" 3#include "hostap_80211.h"
2#include "hostap_common.h" 4#include "hostap_common.h"
3#include "hostap_wlan.h" 5#include "hostap_wlan.h"
diff --git a/drivers/net/wireless/hostap/hostap_ap.c b/drivers/net/wireless/hostap/hostap_ap.c
index a2a203c90ba3..7e72ac1de49b 100644
--- a/drivers/net/wireless/hostap/hostap_ap.c
+++ b/drivers/net/wireless/hostap/hostap_ap.c
@@ -20,6 +20,7 @@
20#include <linux/delay.h> 20#include <linux/delay.h>
21#include <linux/random.h> 21#include <linux/random.h>
22#include <linux/if_arp.h> 22#include <linux/if_arp.h>
23#include <linux/slab.h>
23 24
24#include "hostap_wlan.h" 25#include "hostap_wlan.h"
25#include "hostap.h" 26#include "hostap.h"
diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c
index ad8eab4a639b..a36501dbbe02 100644
--- a/drivers/net/wireless/hostap/hostap_cs.c
+++ b/drivers/net/wireless/hostap/hostap_cs.c
@@ -3,6 +3,7 @@
3#include <linux/module.h> 3#include <linux/module.h>
4#include <linux/init.h> 4#include <linux/init.h>
5#include <linux/if.h> 5#include <linux/if.h>
6#include <linux/slab.h>
6#include <linux/wait.h> 7#include <linux/wait.h>
7#include <linux/timer.h> 8#include <linux/timer.h>
8#include <linux/skbuff.h> 9#include <linux/skbuff.h>
@@ -274,9 +275,6 @@ static int sandisk_enable_wireless(struct net_device *dev)
274 conf_reg_t reg; 275 conf_reg_t reg;
275 struct hostap_interface *iface = netdev_priv(dev); 276 struct hostap_interface *iface = netdev_priv(dev);
276 local_info_t *local = iface->local; 277 local_info_t *local = iface->local;
277 tuple_t tuple;
278 cisparse_t *parse = NULL;
279 u_char buf[64];
280 struct hostap_cs_priv *hw_priv = local->hw_priv; 278 struct hostap_cs_priv *hw_priv = local->hw_priv;
281 279
282 if (hw_priv->link->io.NumPorts1 < 0x42) { 280 if (hw_priv->link->io.NumPorts1 < 0x42) {
@@ -285,28 +283,13 @@ static int sandisk_enable_wireless(struct net_device *dev)
285 goto done; 283 goto done;
286 } 284 }
287 285
288 parse = kmalloc(sizeof(cisparse_t), GFP_KERNEL);
289 if (parse == NULL) {
290 ret = -ENOMEM;
291 goto done;
292 }
293
294 tuple.Attributes = TUPLE_RETURN_COMMON;
295 tuple.TupleData = buf;
296 tuple.TupleDataMax = sizeof(buf);
297 tuple.TupleOffset = 0;
298
299 if (hw_priv->link->manf_id != 0xd601 || hw_priv->link->card_id != 0x0101) { 286 if (hw_priv->link->manf_id != 0xd601 || hw_priv->link->card_id != 0x0101) {
300 /* No SanDisk manfid found */ 287 /* No SanDisk manfid found */
301 ret = -ENODEV; 288 ret = -ENODEV;
302 goto done; 289 goto done;
303 } 290 }
304 291
305 tuple.DesiredTuple = CISTPL_LONGLINK_MFC; 292 if (hw_priv->link->socket->functions < 2) {
306 if (pcmcia_get_first_tuple(hw_priv->link, &tuple) ||
307 pcmcia_get_tuple_data(hw_priv->link, &tuple) ||
308 pcmcia_parse_tuple(&tuple, parse) ||
309 parse->longlink_mfc.nfn < 2) {
310 /* No multi-function links found */ 293 /* No multi-function links found */
311 ret = -ENODEV; 294 ret = -ENODEV;
312 goto done; 295 goto done;
@@ -354,7 +337,6 @@ static int sandisk_enable_wireless(struct net_device *dev)
354 udelay(10); 337 udelay(10);
355 338
356done: 339done:
357 kfree(parse);
358 return ret; 340 return ret;
359} 341}
360 342
@@ -529,10 +511,6 @@ static void prism2_detach(struct pcmcia_device *link)
529} 511}
530 512
531 513
532#define CS_CHECK(fn, ret) \
533do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
534
535
536/* run after a CARD_INSERTION event is received to configure the PCMCIA 514/* run after a CARD_INSERTION event is received to configure the PCMCIA
537 * socket and make the device available to the system */ 515 * socket and make the device available to the system */
538 516
@@ -624,7 +602,6 @@ static int prism2_config(struct pcmcia_device *link)
624 struct hostap_interface *iface; 602 struct hostap_interface *iface;
625 local_info_t *local; 603 local_info_t *local;
626 int ret = 1; 604 int ret = 1;
627 int last_fn, last_ret;
628 struct hostap_cs_priv *hw_priv; 605 struct hostap_cs_priv *hw_priv;
629 606
630 PDEBUG(DEBUG_FLOW, "prism2_config()\n"); 607 PDEBUG(DEBUG_FLOW, "prism2_config()\n");
@@ -636,19 +613,18 @@ static int prism2_config(struct pcmcia_device *link)
636 } 613 }
637 614
638 /* Look for an appropriate configuration table entry in the CIS */ 615 /* Look for an appropriate configuration table entry in the CIS */
639 last_ret = pcmcia_loop_config(link, prism2_config_check, NULL); 616 ret = pcmcia_loop_config(link, prism2_config_check, NULL);
640 if (last_ret) { 617 if (ret) {
641 if (!ignore_cis_vcc) 618 if (!ignore_cis_vcc)
642 printk(KERN_ERR "GetNextTuple(): No matching " 619 printk(KERN_ERR "GetNextTuple(): No matching "
643 "CIS configuration. Maybe you need the " 620 "CIS configuration. Maybe you need the "
644 "ignore_cis_vcc=1 parameter.\n"); 621 "ignore_cis_vcc=1 parameter.\n");
645 cs_error(link, RequestIO, last_ret);
646 goto failed; 622 goto failed;
647 } 623 }
648 624
649 /* Need to allocate net_device before requesting IRQ handler */ 625 /* Need to allocate net_device before requesting IRQ handler */
650 dev = prism2_init_local_data(&prism2_pccard_funcs, 0, 626 dev = prism2_init_local_data(&prism2_pccard_funcs, 0,
651 &handle_to_dev(link)); 627 &link->dev);
652 if (dev == NULL) 628 if (dev == NULL)
653 goto failed; 629 goto failed;
654 link->priv = dev; 630 link->priv = dev;
@@ -666,13 +642,11 @@ static int prism2_config(struct pcmcia_device *link)
666 * irq structure is initialized. 642 * irq structure is initialized.
667 */ 643 */
668 if (link->conf.Attributes & CONF_ENABLE_IRQ) { 644 if (link->conf.Attributes & CONF_ENABLE_IRQ) {
669 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | 645 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
670 IRQ_HANDLE_PRESENT;
671 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
672 link->irq.Handler = prism2_interrupt; 646 link->irq.Handler = prism2_interrupt;
673 link->irq.Instance = dev; 647 ret = pcmcia_request_irq(link, &link->irq);
674 CS_CHECK(RequestIRQ, 648 if (ret)
675 pcmcia_request_irq(link, &link->irq)); 649 goto failed;
676 } 650 }
677 651
678 /* 652 /*
@@ -680,8 +654,9 @@ static int prism2_config(struct pcmcia_device *link)
680 * the I/O windows and the interrupt mapping, and putting the 654 * the I/O windows and the interrupt mapping, and putting the
681 * card and host interface into "Memory and IO" mode. 655 * card and host interface into "Memory and IO" mode.
682 */ 656 */
683 CS_CHECK(RequestConfiguration, 657 ret = pcmcia_request_configuration(link, &link->conf);
684 pcmcia_request_configuration(link, &link->conf)); 658 if (ret)
659 goto failed;
685 660
686 dev->irq = link->irq.AssignedIRQ; 661 dev->irq = link->irq.AssignedIRQ;
687 dev->base_addr = link->io.BasePort1; 662 dev->base_addr = link->io.BasePort1;
@@ -714,9 +689,6 @@ static int prism2_config(struct pcmcia_device *link)
714 } 689 }
715 return ret; 690 return ret;
716 691
717 cs_failed:
718 cs_error(link, last_fn, last_ret);
719
720 failed: 692 failed:
721 kfree(hw_priv); 693 kfree(hw_priv);
722 prism2_release((u_long)link); 694 prism2_release((u_long)link);
@@ -823,13 +795,6 @@ static struct pcmcia_device_id hostap_cs_ids[] = {
823 PCMCIA_MFC_DEVICE_PROD_ID12(0, "SanDisk", "ConnectPlus", 795 PCMCIA_MFC_DEVICE_PROD_ID12(0, "SanDisk", "ConnectPlus",
824 0x7a954bd9, 0x74be00c6), 796 0x7a954bd9, 0x74be00c6),
825 PCMCIA_DEVICE_PROD_ID123( 797 PCMCIA_DEVICE_PROD_ID123(
826 "Intersil", "PRISM 2_5 PCMCIA ADAPTER", "ISL37300P",
827 0x4b801a17, 0x6345a0bf, 0xc9049a39),
828 /* D-Link DWL-650 Rev. P1; manfid 0x000b, 0x7110 */
829 PCMCIA_DEVICE_PROD_ID123(
830 "D-Link", "DWL-650 Wireless PC Card RevP", "ISL37101P-10",
831 0x1a424a1c, 0x6ea57632, 0xdd97a26b),
832 PCMCIA_DEVICE_PROD_ID123(
833 "Addtron", "AWP-100 Wireless PCMCIA", "Version 01.02", 798 "Addtron", "AWP-100 Wireless PCMCIA", "Version 01.02",
834 0xe6ec52ce, 0x08649af2, 0x4b74baa0), 799 0xe6ec52ce, 0x08649af2, 0x4b74baa0),
835 PCMCIA_DEVICE_PROD_ID123( 800 PCMCIA_DEVICE_PROD_ID123(
@@ -863,14 +828,12 @@ static struct pcmcia_device_id hostap_cs_ids[] = {
863 "Ver. 1.00", 828 "Ver. 1.00",
864 0x5cd01705, 0x4271660f, 0x9d08ee12), 829 0x5cd01705, 0x4271660f, 0x9d08ee12),
865 PCMCIA_DEVICE_PROD_ID123( 830 PCMCIA_DEVICE_PROD_ID123(
866 "corega", "WL PCCL-11", "ISL37300P",
867 0xa21501a, 0x59868926, 0xc9049a39),
868 PCMCIA_DEVICE_PROD_ID123(
869 "The Linksys Group, Inc.", "Wireless Network CF Card", "ISL37300P",
870 0xa5f472c2, 0x9c05598d, 0xc9049a39),
871 PCMCIA_DEVICE_PROD_ID123(
872 "Wireless LAN" , "11Mbps PC Card", "Version 01.02", 831 "Wireless LAN" , "11Mbps PC Card", "Version 01.02",
873 0x4b8870ff, 0x70e946d1, 0x4b74baa0), 832 0x4b8870ff, 0x70e946d1, 0x4b74baa0),
833 PCMCIA_DEVICE_PROD_ID3("HFA3863", 0x355cb092),
834 PCMCIA_DEVICE_PROD_ID3("ISL37100P", 0x630d52b2),
835 PCMCIA_DEVICE_PROD_ID3("ISL37101P-10", 0xdd97a26b),
836 PCMCIA_DEVICE_PROD_ID3("ISL37300P", 0xc9049a39),
874 PCMCIA_DEVICE_NULL 837 PCMCIA_DEVICE_NULL
875}; 838};
876MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids); 839MODULE_DEVICE_TABLE(pcmcia, hostap_cs_ids);
diff --git a/drivers/net/wireless/hostap/hostap_hw.c b/drivers/net/wireless/hostap/hostap_hw.c
index ff9b5c882184..d70732819423 100644
--- a/drivers/net/wireless/hostap/hostap_hw.c
+++ b/drivers/net/wireless/hostap/hostap_hw.c
@@ -2618,6 +2618,15 @@ static irqreturn_t prism2_interrupt(int irq, void *dev_id)
2618 int events = 0; 2618 int events = 0;
2619 u16 ev; 2619 u16 ev;
2620 2620
2621 /* Detect early interrupt before driver is fully configued */
2622 if (!dev->base_addr) {
2623 if (net_ratelimit()) {
2624 printk(KERN_DEBUG "%s: Interrupt, but dev not configured\n",
2625 dev->name);
2626 }
2627 return IRQ_HANDLED;
2628 }
2629
2621 iface = netdev_priv(dev); 2630 iface = netdev_priv(dev);
2622 local = iface->local; 2631 local = iface->local;
2623 2632
diff --git a/drivers/net/wireless/hostap/hostap_info.c b/drivers/net/wireless/hostap/hostap_info.c
index 4dfb40a84c96..d737091cf6ac 100644
--- a/drivers/net/wireless/hostap/hostap_info.c
+++ b/drivers/net/wireless/hostap/hostap_info.c
@@ -2,6 +2,7 @@
2 2
3#include <linux/if_arp.h> 3#include <linux/if_arp.h>
4#include <linux/sched.h> 4#include <linux/sched.h>
5#include <linux/slab.h>
5#include "hostap_wlan.h" 6#include "hostap_wlan.h"
6#include "hostap.h" 7#include "hostap.h"
7#include "hostap_ap.h" 8#include "hostap_ap.h"
diff --git a/drivers/net/wireless/hostap/hostap_ioctl.c b/drivers/net/wireless/hostap/hostap_ioctl.c
index 9419cebca8a5..9a082308a9d4 100644
--- a/drivers/net/wireless/hostap/hostap_ioctl.c
+++ b/drivers/net/wireless/hostap/hostap_ioctl.c
@@ -1,5 +1,6 @@
1/* ioctl() (mostly Linux Wireless Extensions) routines for Host AP driver */ 1/* ioctl() (mostly Linux Wireless Extensions) routines for Host AP driver */
2 2
3#include <linux/slab.h>
3#include <linux/types.h> 4#include <linux/types.h>
4#include <linux/sched.h> 5#include <linux/sched.h>
5#include <linux/ethtool.h> 6#include <linux/ethtool.h>
diff --git a/drivers/net/wireless/hostap/hostap_pci.c b/drivers/net/wireless/hostap/hostap_pci.c
index 8fdd41f4b4f2..d24dc7dc0723 100644
--- a/drivers/net/wireless/hostap/hostap_pci.c
+++ b/drivers/net/wireless/hostap/hostap_pci.c
@@ -9,6 +9,7 @@
9#include <linux/if.h> 9#include <linux/if.h>
10#include <linux/skbuff.h> 10#include <linux/skbuff.h>
11#include <linux/netdevice.h> 11#include <linux/netdevice.h>
12#include <linux/slab.h>
12#include <linux/workqueue.h> 13#include <linux/workqueue.h>
13#include <linux/wireless.h> 14#include <linux/wireless.h>
14#include <net/iw_handler.h> 15#include <net/iw_handler.h>
@@ -39,7 +40,7 @@ struct hostap_pci_priv {
39/* FIX: do we need mb/wmb/rmb with memory operations? */ 40/* FIX: do we need mb/wmb/rmb with memory operations? */
40 41
41 42
42static struct pci_device_id prism2_pci_id_table[] __devinitdata = { 43static DEFINE_PCI_DEVICE_TABLE(prism2_pci_id_table) = {
43 /* Intersil Prism3 ISL3872 11Mb/s WLAN Controller */ 44 /* Intersil Prism3 ISL3872 11Mb/s WLAN Controller */
44 { 0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID }, 45 { 0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID },
45 /* Intersil Prism2.5 ISL3874 11Mb/s WLAN Controller */ 46 /* Intersil Prism2.5 ISL3874 11Mb/s WLAN Controller */
diff --git a/drivers/net/wireless/hostap/hostap_plx.c b/drivers/net/wireless/hostap/hostap_plx.c
index 0e5d51086a44..33e79037770b 100644
--- a/drivers/net/wireless/hostap/hostap_plx.c
+++ b/drivers/net/wireless/hostap/hostap_plx.c
@@ -12,6 +12,7 @@
12#include <linux/if.h> 12#include <linux/if.h>
13#include <linux/skbuff.h> 13#include <linux/skbuff.h>
14#include <linux/netdevice.h> 14#include <linux/netdevice.h>
15#include <linux/slab.h>
15#include <linux/workqueue.h> 16#include <linux/workqueue.h>
16#include <linux/wireless.h> 17#include <linux/wireless.h>
17#include <net/iw_handler.h> 18#include <net/iw_handler.h>
@@ -60,7 +61,7 @@ struct hostap_plx_priv {
60 61
61#define PLXDEV(vendor,dev,str) { vendor, dev, PCI_ANY_ID, PCI_ANY_ID } 62#define PLXDEV(vendor,dev,str) { vendor, dev, PCI_ANY_ID, PCI_ANY_ID }
62 63
63static struct pci_device_id prism2_plx_id_table[] __devinitdata = { 64static DEFINE_PCI_DEVICE_TABLE(prism2_plx_id_table) = {
64 PLXDEV(0x10b7, 0x7770, "3Com AirConnect PCI 777A"), 65 PLXDEV(0x10b7, 0x7770, "3Com AirConnect PCI 777A"),
65 PLXDEV(0x111a, 0x1023, "Siemens SpeedStream SS1023"), 66 PLXDEV(0x111a, 0x1023, "Siemens SpeedStream SS1023"),
66 PLXDEV(0x126c, 0x8030, "Nortel emobility"), 67 PLXDEV(0x126c, 0x8030, "Nortel emobility"),
diff --git a/drivers/net/wireless/i82586.h b/drivers/net/wireless/i82586.h
deleted file mode 100644
index 5f65b250646f..000000000000
--- a/drivers/net/wireless/i82586.h
+++ /dev/null
@@ -1,413 +0,0 @@
1/*
2 * Intel 82586 IEEE 802.3 Ethernet LAN Coprocessor.
3 *
4 * See:
5 * Intel Microcommunications 1991
6 * p1-1 to p1-37
7 * Intel order No. 231658
8 * ISBN 1-55512-119-5
9 *
10 * Unfortunately, the above chapter mentions neither
11 * the System Configuration Pointer (SCP) nor the
12 * Intermediate System Configuration Pointer (ISCP),
13 * so we probably need to look elsewhere for the
14 * whole story -- some recommend the "Intel LAN
15 * Components manual" but I have neither a copy
16 * nor a full reference. But "elsewhere" may be
17 * in the same publication...
18 * The description of a later device, the
19 * "82596CA High-Performance 32-Bit Local Area Network
20 * Coprocessor", (ibid. p1-38 to p1-109) does mention
21 * the SCP and ISCP and also has an i82586 compatibility
22 * mode. Even more useful is "AP-235 An 82586 Data Link
23 * Driver" (ibid. p1-337 to p1-417).
24 */
25
26#define I82586_MEMZ (64 * 1024)
27
28#define I82586_SCP_ADDR (I82586_MEMZ - sizeof(scp_t))
29
30#define ADDR_LEN 6
31#define I82586NULL 0xFFFF
32
33#define toff(t,p,f) (unsigned short)((void *)(&((t *)((void *)0 + (p)))->f) - (void *)0)
34
35/*
36 * System Configuration Pointer (SCP).
37 */
38typedef struct scp_t scp_t;
39struct scp_t
40{
41 unsigned short scp_sysbus; /* 82586 bus width: */
42#define SCP_SY_16BBUS (0x0 << 0) /* 16 bits */
43#define SCP_SY_8BBUS (0x1 << 0) /* 8 bits. */
44 unsigned short scp_junk[2]; /* Unused */
45 unsigned short scp_iscpl; /* lower 16 bits of ISCP_ADDR */
46 unsigned short scp_iscph; /* upper 16 bits of ISCP_ADDR */
47};
48
49/*
50 * Intermediate System Configuration Pointer (ISCP).
51 */
52typedef struct iscp_t iscp_t;
53struct iscp_t
54{
55 unsigned short iscp_busy; /* set by CPU before first CA, */
56 /* cleared by 82586 after read. */
57 unsigned short iscp_offset; /* offset of SCB */
58 unsigned short iscp_basel; /* base of SCB */
59 unsigned short iscp_baseh; /* " */
60};
61
62/*
63 * System Control Block (SCB).
64 * The 82586 writes its status to scb_status and then
65 * raises an interrupt to alert the CPU.
66 * The CPU writes a command to scb_command and
67 * then issues a Channel Attention (CA) to alert the 82586.
68 */
69typedef struct scb_t scb_t;
70struct scb_t
71{
72 unsigned short scb_status; /* Status of 82586 */
73#define SCB_ST_INT (0xF << 12) /* Some of: */
74#define SCB_ST_CX (0x1 << 15) /* Cmd completed */
75#define SCB_ST_FR (0x1 << 14) /* Frame received */
76#define SCB_ST_CNA (0x1 << 13) /* Cmd unit not active */
77#define SCB_ST_RNR (0x1 << 12) /* Rcv unit not ready */
78#define SCB_ST_JUNK0 (0x1 << 11) /* 0 */
79#define SCB_ST_CUS (0x7 << 8) /* Cmd unit status */
80#define SCB_ST_CUS_IDLE (0 << 8) /* Idle */
81#define SCB_ST_CUS_SUSP (1 << 8) /* Suspended */
82#define SCB_ST_CUS_ACTV (2 << 8) /* Active */
83#define SCB_ST_JUNK1 (0x1 << 7) /* 0 */
84#define SCB_ST_RUS (0x7 << 4) /* Rcv unit status */
85#define SCB_ST_RUS_IDLE (0 << 4) /* Idle */
86#define SCB_ST_RUS_SUSP (1 << 4) /* Suspended */
87#define SCB_ST_RUS_NRES (2 << 4) /* No resources */
88#define SCB_ST_RUS_RDY (4 << 4) /* Ready */
89 unsigned short scb_command; /* Next command */
90#define SCB_CMD_ACK_CX (0x1 << 15) /* Ack cmd completion */
91#define SCB_CMD_ACK_FR (0x1 << 14) /* Ack frame received */
92#define SCB_CMD_ACK_CNA (0x1 << 13) /* Ack CU not active */
93#define SCB_CMD_ACK_RNR (0x1 << 12) /* Ack RU not ready */
94#define SCB_CMD_JUNKX (0x1 << 11) /* Unused */
95#define SCB_CMD_CUC (0x7 << 8) /* Command Unit command */
96#define SCB_CMD_CUC_NOP (0 << 8) /* Nop */
97#define SCB_CMD_CUC_GO (1 << 8) /* Start cbl_offset */
98#define SCB_CMD_CUC_RES (2 << 8) /* Resume execution */
99#define SCB_CMD_CUC_SUS (3 << 8) /* Suspend " */
100#define SCB_CMD_CUC_ABT (4 << 8) /* Abort " */
101#define SCB_CMD_RESET (0x1 << 7) /* Reset chip (hardware) */
102#define SCB_CMD_RUC (0x7 << 4) /* Receive Unit command */
103#define SCB_CMD_RUC_NOP (0 << 4) /* Nop */
104#define SCB_CMD_RUC_GO (1 << 4) /* Start rfa_offset */
105#define SCB_CMD_RUC_RES (2 << 4) /* Resume reception */
106#define SCB_CMD_RUC_SUS (3 << 4) /* Suspend " */
107#define SCB_CMD_RUC_ABT (4 << 4) /* Abort " */
108 unsigned short scb_cbl_offset; /* Offset of first command unit */
109 /* Action Command */
110 unsigned short scb_rfa_offset; /* Offset of first Receive */
111 /* Frame Descriptor in the */
112 /* Receive Frame Area */
113 unsigned short scb_crcerrs; /* Properly aligned frames */
114 /* received with a CRC error */
115 unsigned short scb_alnerrs; /* Misaligned frames received */
116 /* with a CRC error */
117 unsigned short scb_rscerrs; /* Frames lost due to no space */
118 unsigned short scb_ovrnerrs; /* Frames lost due to slow bus */
119};
120
121#define scboff(p,f) toff(scb_t, p, f)
122
123/*
124 * The eight Action Commands.
125 */
126typedef enum acmd_e acmd_e;
127enum acmd_e
128{
129 acmd_nop = 0, /* Do nothing */
130 acmd_ia_setup = 1, /* Load an (ethernet) address into the */
131 /* 82586 */
132 acmd_configure = 2, /* Update the 82586 operating parameters */
133 acmd_mc_setup = 3, /* Load a list of (ethernet) multicast */
134 /* addresses into the 82586 */
135 acmd_transmit = 4, /* Transmit a frame */
136 acmd_tdr = 5, /* Perform a Time Domain Reflectometer */
137 /* test on the serial link */
138 acmd_dump = 6, /* Copy 82586 registers to memory */
139 acmd_diagnose = 7, /* Run an internal self test */
140};
141
142/*
143 * Generic Action Command header.
144 */
145typedef struct ach_t ach_t;
146struct ach_t
147{
148 unsigned short ac_status; /* Command status: */
149#define AC_SFLD_C (0x1 << 15) /* Command completed */
150#define AC_SFLD_B (0x1 << 14) /* Busy executing */
151#define AC_SFLD_OK (0x1 << 13) /* Completed error free */
152#define AC_SFLD_A (0x1 << 12) /* Command aborted */
153#define AC_SFLD_FAIL (0x1 << 11) /* Selftest failed */
154#define AC_SFLD_S10 (0x1 << 10) /* No carrier sense */
155 /* during transmission */
156#define AC_SFLD_S9 (0x1 << 9) /* Tx unsuccessful: */
157 /* (stopped) lost CTS */
158#define AC_SFLD_S8 (0x1 << 8) /* Tx unsuccessful: */
159 /* (stopped) slow DMA */
160#define AC_SFLD_S7 (0x1 << 7) /* Tx deferred: */
161 /* other link traffic */
162#define AC_SFLD_S6 (0x1 << 6) /* Heart Beat: collision */
163 /* detect after last tx */
164#define AC_SFLD_S5 (0x1 << 5) /* Tx stopped: */
165 /* excessive collisions */
166#define AC_SFLD_MAXCOL (0xF << 0) /* Collision count */
167 unsigned short ac_command; /* Command specifier: */
168#define AC_CFLD_EL (0x1 << 15) /* End of command list */
169#define AC_CFLD_S (0x1 << 14) /* Suspend on completion */
170#define AC_CFLD_I (0x1 << 13) /* Interrupt on completion */
171#define AC_CFLD_CMD (0x7 << 0) /* acmd_e */
172 unsigned short ac_link; /* Next Action Command */
173};
174
175#define acoff(p,f) toff(ach_t, p, f)
176
177/*
178 * The Nop Action Command.
179 */
180typedef struct ac_nop_t ac_nop_t;
181struct ac_nop_t
182{
183 ach_t nop_h;
184};
185
186/*
187 * The IA-Setup Action Command.
188 */
189typedef struct ac_ias_t ac_ias_t;
190struct ac_ias_t
191{
192 ach_t ias_h;
193 unsigned char ias_addr[ADDR_LEN]; /* The (ethernet) address */
194};
195
196/*
197 * The Configure Action Command.
198 */
199typedef struct ac_cfg_t ac_cfg_t;
200struct ac_cfg_t
201{
202 ach_t cfg_h;
203 unsigned char cfg_byte_cnt; /* Size foll data: 4-12 */
204#define AC_CFG_BYTE_CNT(v) (((v) & 0xF) << 0)
205 unsigned char cfg_fifolim; /* FIFO threshold */
206#define AC_CFG_FIFOLIM(v) (((v) & 0xF) << 0)
207 unsigned char cfg_byte8;
208#define AC_CFG_SAV_BF(v) (((v) & 0x1) << 7) /* Save rxd bad frames */
209#define AC_CFG_SRDY(v) (((v) & 0x1) << 6) /* SRDY/ARDY pin means */
210 /* external sync. */
211 unsigned char cfg_byte9;
212#define AC_CFG_ELPBCK(v) (((v) & 0x1) << 7) /* External loopback */
213#define AC_CFG_ILPBCK(v) (((v) & 0x1) << 6) /* Internal loopback */
214#define AC_CFG_PRELEN(v) (((v) & 0x3) << 4) /* Preamble length */
215#define AC_CFG_PLEN_2 0 /* 2 bytes */
216#define AC_CFG_PLEN_4 1 /* 4 bytes */
217#define AC_CFG_PLEN_8 2 /* 8 bytes */
218#define AC_CFG_PLEN_16 3 /* 16 bytes */
219#define AC_CFG_ALOC(v) (((v) & 0x1) << 3) /* Addr/len data is */
220 /* explicit in buffers */
221#define AC_CFG_ADDRLEN(v) (((v) & 0x7) << 0) /* Bytes per address */
222 unsigned char cfg_byte10;
223#define AC_CFG_BOFMET(v) (((v) & 0x1) << 7) /* Use alternate expo. */
224 /* backoff method */
225#define AC_CFG_ACR(v) (((v) & 0x7) << 4) /* Accelerated cont. res. */
226#define AC_CFG_LINPRIO(v) (((v) & 0x7) << 0) /* Linear priority */
227 unsigned char cfg_ifs; /* Interframe spacing */
228 unsigned char cfg_slotl; /* Slot time (low byte) */
229 unsigned char cfg_byte13;
230#define AC_CFG_RETRYNUM(v) (((v) & 0xF) << 4) /* Max. collision retry */
231#define AC_CFG_SLTTMHI(v) (((v) & 0x7) << 0) /* Slot time (high bits) */
232 unsigned char cfg_byte14;
233#define AC_CFG_FLGPAD(v) (((v) & 0x1) << 7) /* Pad with HDLC flags */
234#define AC_CFG_BTSTF(v) (((v) & 0x1) << 6) /* Do HDLC bitstuffing */
235#define AC_CFG_CRC16(v) (((v) & 0x1) << 5) /* 16 bit CCITT CRC */
236#define AC_CFG_NCRC(v) (((v) & 0x1) << 4) /* Insert no CRC */
237#define AC_CFG_TNCRS(v) (((v) & 0x1) << 3) /* Tx even if no carrier */
238#define AC_CFG_MANCH(v) (((v) & 0x1) << 2) /* Manchester coding */
239#define AC_CFG_BCDIS(v) (((v) & 0x1) << 1) /* Disable broadcast */
240#define AC_CFG_PRM(v) (((v) & 0x1) << 0) /* Promiscuous mode */
241 unsigned char cfg_byte15;
242#define AC_CFG_ICDS(v) (((v) & 0x1) << 7) /* Internal collision */
243 /* detect source */
244#define AC_CFG_CDTF(v) (((v) & 0x7) << 4) /* Collision detect */
245 /* filter in bit times */
246#define AC_CFG_ICSS(v) (((v) & 0x1) << 3) /* Internal carrier */
247 /* sense source */
248#define AC_CFG_CSTF(v) (((v) & 0x7) << 0) /* Carrier sense */
249 /* filter in bit times */
250 unsigned short cfg_min_frm_len;
251#define AC_CFG_MNFRM(v) (((v) & 0xFF) << 0) /* Min. bytes/frame (<= 255) */
252};
253
254/*
255 * The MC-Setup Action Command.
256 */
257typedef struct ac_mcs_t ac_mcs_t;
258struct ac_mcs_t
259{
260 ach_t mcs_h;
261 unsigned short mcs_cnt; /* No. of bytes of MC addresses */
262#if 0
263 unsigned char mcs_data[ADDR_LEN]; /* The first MC address .. */
264 ...
265#endif
266};
267
268#define I82586_MAX_MULTICAST_ADDRESSES 128 /* Hardware hashed filter */
269
270/*
271 * The Transmit Action Command.
272 */
273typedef struct ac_tx_t ac_tx_t;
274struct ac_tx_t
275{
276 ach_t tx_h;
277 unsigned short tx_tbd_offset; /* Address of list of buffers. */
278#if 0
279Linux packets are passed down with the destination MAC address
280and length/type field already prepended to the data,
281so we do not need to insert it. Consistent with this
282we must also set the AC_CFG_ALOC(..) flag during the
283ac_cfg_t action command.
284 unsigned char tx_addr[ADDR_LEN]; /* The frame dest. address */
285 unsigned short tx_length; /* The frame length */
286#endif /* 0 */
287};
288
289/*
290 * The Time Domain Reflectometer Action Command.
291 */
292typedef struct ac_tdr_t ac_tdr_t;
293struct ac_tdr_t
294{
295 ach_t tdr_h;
296 unsigned short tdr_result; /* Result. */
297#define AC_TDR_LNK_OK (0x1 << 15) /* No link problem */
298#define AC_TDR_XCVR_PRB (0x1 << 14) /* Txcvr cable problem */
299#define AC_TDR_ET_OPN (0x1 << 13) /* Open on the link */
300#define AC_TDR_ET_SRT (0x1 << 12) /* Short on the link */
301#define AC_TDR_TIME (0x7FF << 0) /* Distance to problem */
302 /* site in transmit */
303 /* clock cycles */
304};
305
306/*
307 * The Dump Action Command.
308 */
309typedef struct ac_dmp_t ac_dmp_t;
310struct ac_dmp_t
311{
312 ach_t dmp_h;
313 unsigned short dmp_offset; /* Result. */
314};
315
316/*
317 * Size of the result of the dump command.
318 */
319#define DUMPBYTES 170
320
321/*
322 * The Diagnose Action Command.
323 */
324typedef struct ac_dgn_t ac_dgn_t;
325struct ac_dgn_t
326{
327 ach_t dgn_h;
328};
329
330/*
331 * Transmit Buffer Descriptor (TBD).
332 */
333typedef struct tbd_t tbd_t;
334struct tbd_t
335{
336 unsigned short tbd_status; /* Written by the CPU */
337#define TBD_STATUS_EOF (0x1 << 15) /* This TBD is the */
338 /* last for this frame */
339#define TBD_STATUS_ACNT (0x3FFF << 0) /* Actual count of data */
340 /* bytes in this buffer */
341 unsigned short tbd_next_bd_offset; /* Next in list */
342 unsigned short tbd_bufl; /* Buffer address (low) */
343 unsigned short tbd_bufh; /* " " (high) */
344};
345
346/*
347 * Receive Buffer Descriptor (RBD).
348 */
349typedef struct rbd_t rbd_t;
350struct rbd_t
351{
352 unsigned short rbd_status; /* Written by the 82586 */
353#define RBD_STATUS_EOF (0x1 << 15) /* This RBD is the */
354 /* last for this frame */
355#define RBD_STATUS_F (0x1 << 14) /* ACNT field is valid */
356#define RBD_STATUS_ACNT (0x3FFF << 0) /* Actual no. of data */
357 /* bytes in this buffer */
358 unsigned short rbd_next_rbd_offset; /* Next rbd in list */
359 unsigned short rbd_bufl; /* Data pointer (low) */
360 unsigned short rbd_bufh; /* " " (high) */
361 unsigned short rbd_el_size; /* EL+Data buf. size */
362#define RBD_EL (0x1 << 15) /* This BD is the */
363 /* last in the list */
364#define RBD_SIZE (0x3FFF << 0) /* No. of bytes the */
365 /* buffer can hold */
366};
367
368#define rbdoff(p,f) toff(rbd_t, p, f)
369
370/*
371 * Frame Descriptor (FD).
372 */
373typedef struct fd_t fd_t;
374struct fd_t
375{
376 unsigned short fd_status; /* Written by the 82586 */
377#define FD_STATUS_C (0x1 << 15) /* Completed storing frame */
378#define FD_STATUS_B (0x1 << 14) /* FD was consumed by RU */
379#define FD_STATUS_OK (0x1 << 13) /* Frame rxd successfully */
380#define FD_STATUS_S11 (0x1 << 11) /* CRC error */
381#define FD_STATUS_S10 (0x1 << 10) /* Alignment error */
382#define FD_STATUS_S9 (0x1 << 9) /* Ran out of resources */
383#define FD_STATUS_S8 (0x1 << 8) /* Rx DMA overrun */
384#define FD_STATUS_S7 (0x1 << 7) /* Frame too short */
385#define FD_STATUS_S6 (0x1 << 6) /* No EOF flag */
386 unsigned short fd_command; /* Command */
387#define FD_COMMAND_EL (0x1 << 15) /* Last FD in list */
388#define FD_COMMAND_S (0x1 << 14) /* Suspend RU after rx */
389 unsigned short fd_link_offset; /* Next FD */
390 unsigned short fd_rbd_offset; /* First RBD (data) */
391 /* Prepared by CPU, */
392 /* updated by 82586 */
393#if 0
394I think the rest is unused since we
395have set AC_CFG_ALOC(..). However, just
396in case, we leave the space.
397#endif /* 0 */
398 unsigned char fd_dest[ADDR_LEN]; /* Destination address */
399 /* Written by 82586 */
400 unsigned char fd_src[ADDR_LEN]; /* Source address */
401 /* Written by 82586 */
402 unsigned short fd_length; /* Frame length or type */
403 /* Written by 82586 */
404};
405
406#define fdoff(p,f) toff(fd_t, p, f)
407
408/*
409 * This software may only be used and distributed
410 * according to the terms of the GNU General Public License.
411 *
412 * For more details, see wavelan.c.
413 */
diff --git a/drivers/net/wireless/i82593.h b/drivers/net/wireless/i82593.h
deleted file mode 100644
index afac5c7a323d..000000000000
--- a/drivers/net/wireless/i82593.h
+++ /dev/null
@@ -1,229 +0,0 @@
1/*
2 * Definitions for Intel 82593 CSMA/CD Core LAN Controller
3 * The definitions are taken from the 1992 users manual with Intel
4 * order number 297125-001.
5 *
6 * /usr/src/pc/RCS/i82593.h,v 1.1 1996/07/17 15:23:12 root Exp
7 *
8 * Copyright 1994, Anders Klemets <klemets@it.kth.se>
9 *
10 * HISTORY
11 * i82593.h,v
12 * Revision 1.4 2005/11/4 09:15:00 baroniunas
13 * Modified copyright with permission of author as follows:
14 *
15 * "If I82539.H is the only file with my copyright statement
16 * that is included in the Source Forge project, then you have
17 * my approval to change the copyright statement to be a GPL
18 * license, in the way you proposed on October 10."
19 *
20 * Revision 1.1 1996/07/17 15:23:12 root
21 * Initial revision
22 *
23 * Revision 1.3 1995/04/05 15:13:58 adj
24 * Initial alpha release
25 *
26 * Revision 1.2 1994/06/16 23:57:31 klemets
27 * Mirrored all the fields in the configuration block.
28 *
29 * Revision 1.1 1994/06/02 20:25:34 klemets
30 * Initial revision
31 *
32 *
33 */
34#ifndef _I82593_H
35#define _I82593_H
36
37/* Intel 82593 CSMA/CD Core LAN Controller */
38
39/* Port 0 Command Register definitions */
40
41/* Execution operations */
42#define OP0_NOP 0 /* CHNL = 0 */
43#define OP0_SWIT_TO_PORT_1 0 /* CHNL = 1 */
44#define OP0_IA_SETUP 1
45#define OP0_CONFIGURE 2
46#define OP0_MC_SETUP 3
47#define OP0_TRANSMIT 4
48#define OP0_TDR 5
49#define OP0_DUMP 6
50#define OP0_DIAGNOSE 7
51#define OP0_TRANSMIT_NO_CRC 9
52#define OP0_RETRANSMIT 12
53#define OP0_ABORT 13
54/* Reception operations */
55#define OP0_RCV_ENABLE 8
56#define OP0_RCV_DISABLE 10
57#define OP0_STOP_RCV 11
58/* Status pointer control operations */
59#define OP0_FIX_PTR 15 /* CHNL = 1 */
60#define OP0_RLS_PTR 15 /* CHNL = 0 */
61#define OP0_RESET 14
62
63#define CR0_CHNL (1 << 4) /* 0=Channel 0, 1=Channel 1 */
64#define CR0_STATUS_0 0x00
65#define CR0_STATUS_1 0x20
66#define CR0_STATUS_2 0x40
67#define CR0_STATUS_3 0x60
68#define CR0_INT_ACK (1 << 7) /* 0=No ack, 1=acknowledge */
69
70/* Port 0 Status Register definitions */
71
72#define SR0_NO_RESULT 0 /* dummy */
73#define SR0_EVENT_MASK 0x0f
74#define SR0_IA_SETUP_DONE 1
75#define SR0_CONFIGURE_DONE 2
76#define SR0_MC_SETUP_DONE 3
77#define SR0_TRANSMIT_DONE 4
78#define SR0_TDR_DONE 5
79#define SR0_DUMP_DONE 6
80#define SR0_DIAGNOSE_PASSED 7
81#define SR0_TRANSMIT_NO_CRC_DONE 9
82#define SR0_RETRANSMIT_DONE 12
83#define SR0_EXECUTION_ABORTED 13
84#define SR0_END_OF_FRAME 8
85#define SR0_RECEPTION_ABORTED 10
86#define SR0_DIAGNOSE_FAILED 15
87#define SR0_STOP_REG_HIT 11
88
89#define SR0_CHNL (1 << 4)
90#define SR0_EXECUTION (1 << 5)
91#define SR0_RECEPTION (1 << 6)
92#define SR0_INTERRUPT (1 << 7)
93#define SR0_BOTH_RX_TX (SR0_EXECUTION | SR0_RECEPTION)
94
95#define SR3_EXEC_STATE_MASK 0x03
96#define SR3_EXEC_IDLE 0
97#define SR3_TX_ABORT_IN_PROGRESS 1
98#define SR3_EXEC_ACTIVE 2
99#define SR3_ABORT_IN_PROGRESS 3
100#define SR3_EXEC_CHNL (1 << 2)
101#define SR3_STP_ON_NO_RSRC (1 << 3)
102#define SR3_RCVING_NO_RSRC (1 << 4)
103#define SR3_RCV_STATE_MASK 0x60
104#define SR3_RCV_IDLE 0x00
105#define SR3_RCV_READY 0x20
106#define SR3_RCV_ACTIVE 0x40
107#define SR3_RCV_STOP_IN_PROG 0x60
108#define SR3_RCV_CHNL (1 << 7)
109
110/* Port 1 Command Register definitions */
111
112#define OP1_NOP 0
113#define OP1_SWIT_TO_PORT_0 1
114#define OP1_INT_DISABLE 2
115#define OP1_INT_ENABLE 3
116#define OP1_SET_TS 5
117#define OP1_RST_TS 7
118#define OP1_POWER_DOWN 8
119#define OP1_RESET_RING_MNGMT 11
120#define OP1_RESET 14
121#define OP1_SEL_RST 15
122
123#define CR1_STATUS_4 0x00
124#define CR1_STATUS_5 0x20
125#define CR1_STATUS_6 0x40
126#define CR1_STOP_REG_UPDATE (1 << 7)
127
128/* Receive frame status bits */
129
130#define RX_RCLD (1 << 0)
131#define RX_IA_MATCH (1 << 1)
132#define RX_NO_AD_MATCH (1 << 2)
133#define RX_NO_SFD (1 << 3)
134#define RX_SRT_FRM (1 << 7)
135#define RX_OVRRUN (1 << 8)
136#define RX_ALG_ERR (1 << 10)
137#define RX_CRC_ERR (1 << 11)
138#define RX_LEN_ERR (1 << 12)
139#define RX_RCV_OK (1 << 13)
140#define RX_TYP_LEN (1 << 15)
141
142/* Transmit status bits */
143
144#define TX_NCOL_MASK 0x0f
145#define TX_FRTL (1 << 4)
146#define TX_MAX_COL (1 << 5)
147#define TX_HRT_BEAT (1 << 6)
148#define TX_DEFER (1 << 7)
149#define TX_UND_RUN (1 << 8)
150#define TX_LOST_CTS (1 << 9)
151#define TX_LOST_CRS (1 << 10)
152#define TX_LTCOL (1 << 11)
153#define TX_OK (1 << 13)
154#define TX_COLL (1 << 15)
155
156struct i82593_conf_block {
157 u_char fifo_limit : 4,
158 forgnesi : 1,
159 fifo_32 : 1,
160 d6mod : 1,
161 throttle_enb : 1;
162 u_char throttle : 6,
163 cntrxint : 1,
164 contin : 1;
165 u_char addr_len : 3,
166 acloc : 1,
167 preamb_len : 2,
168 loopback : 2;
169 u_char lin_prio : 3,
170 tbofstop : 1,
171 exp_prio : 3,
172 bof_met : 1;
173 u_char : 4,
174 ifrm_spc : 4;
175 u_char : 5,
176 slottim_low : 3;
177 u_char slottim_hi : 3,
178 : 1,
179 max_retr : 4;
180 u_char prmisc : 1,
181 bc_dis : 1,
182 : 1,
183 crs_1 : 1,
184 nocrc_ins : 1,
185 crc_1632 : 1,
186 : 1,
187 crs_cdt : 1;
188 u_char cs_filter : 3,
189 crs_src : 1,
190 cd_filter : 3,
191 : 1;
192 u_char : 2,
193 min_fr_len : 6;
194 u_char lng_typ : 1,
195 lng_fld : 1,
196 rxcrc_xf : 1,
197 artx : 1,
198 sarec : 1,
199 tx_jabber : 1, /* why is this called max_len in the manual? */
200 hash_1 : 1,
201 lbpkpol : 1;
202 u_char : 6,
203 fdx : 1,
204 : 1;
205 u_char dummy_6 : 6, /* supposed to be ones */
206 mult_ia : 1,
207 dis_bof : 1;
208 u_char dummy_1 : 1, /* supposed to be one */
209 tx_ifs_retrig : 2,
210 mc_all : 1,
211 rcv_mon : 2,
212 frag_acpt : 1,
213 tstrttrs : 1;
214 u_char fretx : 1,
215 runt_eop : 1,
216 hw_sw_pin : 1,
217 big_endn : 1,
218 syncrqs : 1,
219 sttlen : 1,
220 tx_eop : 1,
221 rx_eop : 1;
222 u_char rbuf_size : 5,
223 rcvstop : 1,
224 : 2;
225};
226
227#define I82593_MAX_MULTICAST_ADDRESSES 128 /* Hardware hashed filter */
228
229#endif /* _I82593_H */
diff --git a/drivers/net/wireless/ipw2x00/Kconfig b/drivers/net/wireless/ipw2x00/Kconfig
index a8131384c6b9..2715b101aded 100644
--- a/drivers/net/wireless/ipw2x00/Kconfig
+++ b/drivers/net/wireless/ipw2x00/Kconfig
@@ -4,8 +4,10 @@
4 4
5config IPW2100 5config IPW2100
6 tristate "Intel PRO/Wireless 2100 Network Connection" 6 tristate "Intel PRO/Wireless 2100 Network Connection"
7 depends on PCI && WLAN_80211 && CFG80211 7 depends on PCI && CFG80211
8 select WIRELESS_EXT 8 select WIRELESS_EXT
9 select WEXT_SPY
10 select WEXT_PRIV
9 select FW_LOADER 11 select FW_LOADER
10 select LIB80211 12 select LIB80211
11 select LIBIPW 13 select LIBIPW
@@ -63,8 +65,10 @@ config IPW2100_DEBUG
63 65
64config IPW2200 66config IPW2200
65 tristate "Intel PRO/Wireless 2200BG and 2915ABG Network Connection" 67 tristate "Intel PRO/Wireless 2200BG and 2915ABG Network Connection"
66 depends on PCI && WLAN_80211 && CFG80211 68 depends on PCI && CFG80211 && CFG80211_WEXT
67 select WIRELESS_EXT 69 select WIRELESS_EXT
70 select WEXT_SPY
71 select WEXT_PRIV
68 select FW_LOADER 72 select FW_LOADER
69 select LIB80211 73 select LIB80211
70 select LIBIPW 74 select LIBIPW
@@ -150,8 +154,9 @@ config IPW2200_DEBUG
150 154
151config LIBIPW 155config LIBIPW
152 tristate 156 tristate
153 depends on PCI && WLAN_80211 && CFG80211 157 depends on PCI && CFG80211
154 select WIRELESS_EXT 158 select WIRELESS_EXT
159 select WEXT_SPY
155 select CRYPTO 160 select CRYPTO
156 select CRYPTO_ARC4 161 select CRYPTO_ARC4
157 select CRYPTO_ECB 162 select CRYPTO_ECB
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index 6e2fc0cb6f8a..9b72c45a7748 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -296,6 +296,33 @@ static const char *command_types[] = {
296}; 296};
297#endif 297#endif
298 298
299#define WEXT_USECHANNELS 1
300
301static const long ipw2100_frequencies[] = {
302 2412, 2417, 2422, 2427,
303 2432, 2437, 2442, 2447,
304 2452, 2457, 2462, 2467,
305 2472, 2484
306};
307
308#define FREQ_COUNT ARRAY_SIZE(ipw2100_frequencies)
309
310static const long ipw2100_rates_11b[] = {
311 1000000,
312 2000000,
313 5500000,
314 11000000
315};
316
317static struct ieee80211_rate ipw2100_bg_rates[] = {
318 { .bitrate = 10 },
319 { .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
320 { .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
321 { .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
322};
323
324#define RATE_COUNT ARRAY_SIZE(ipw2100_rates_11b)
325
299/* Pre-decl until we get the code solid and then we can clean it up */ 326/* Pre-decl until we get the code solid and then we can clean it up */
300static void ipw2100_tx_send_commands(struct ipw2100_priv *priv); 327static void ipw2100_tx_send_commands(struct ipw2100_priv *priv);
301static void ipw2100_tx_send_data(struct ipw2100_priv *priv); 328static void ipw2100_tx_send_data(struct ipw2100_priv *priv);
@@ -551,7 +578,7 @@ static int ipw2100_get_ordinal(struct ipw2100_priv *priv, u32 ord,
551 /* get number of entries */ 578 /* get number of entries */
552 field_count = *(((u16 *) & field_info) + 1); 579 field_count = *(((u16 *) & field_info) + 1);
553 580
554 /* abort if no enought memory */ 581 /* abort if no enough memory */
555 total_length = field_len * field_count; 582 total_length = field_len * field_count;
556 if (total_length > *len) { 583 if (total_length > *len) {
557 *len = total_length; 584 *len = total_length;
@@ -1141,6 +1168,7 @@ static int rf_kill_active(struct ipw2100_priv *priv)
1141 int i; 1168 int i;
1142 1169
1143 if (!(priv->hw_features & HW_FEATURE_RFKILL)) { 1170 if (!(priv->hw_features & HW_FEATURE_RFKILL)) {
1171 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, false);
1144 priv->status &= ~STATUS_RF_KILL_HW; 1172 priv->status &= ~STATUS_RF_KILL_HW;
1145 return 0; 1173 return 0;
1146 } 1174 }
@@ -1151,10 +1179,13 @@ static int rf_kill_active(struct ipw2100_priv *priv)
1151 value = (value << 1) | ((reg & IPW_BIT_GPIO_RF_KILL) ? 0 : 1); 1179 value = (value << 1) | ((reg & IPW_BIT_GPIO_RF_KILL) ? 0 : 1);
1152 } 1180 }
1153 1181
1154 if (value == 0) 1182 if (value == 0) {
1183 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, true);
1155 priv->status |= STATUS_RF_KILL_HW; 1184 priv->status |= STATUS_RF_KILL_HW;
1156 else 1185 } else {
1186 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, false);
1157 priv->status &= ~STATUS_RF_KILL_HW; 1187 priv->status &= ~STATUS_RF_KILL_HW;
1188 }
1158 1189
1159 return (value == 0); 1190 return (value == 0);
1160} 1191}
@@ -1814,13 +1845,6 @@ static int ipw2100_up(struct ipw2100_priv *priv, int deferred)
1814 return rc; 1845 return rc;
1815} 1846}
1816 1847
1817/* Called by register_netdev() */
1818static int ipw2100_net_init(struct net_device *dev)
1819{
1820 struct ipw2100_priv *priv = libipw_priv(dev);
1821 return ipw2100_up(priv, 1);
1822}
1823
1824static void ipw2100_down(struct ipw2100_priv *priv) 1848static void ipw2100_down(struct ipw2100_priv *priv)
1825{ 1849{
1826 unsigned long flags; 1850 unsigned long flags;
@@ -1875,6 +1899,64 @@ static void ipw2100_down(struct ipw2100_priv *priv)
1875 netif_stop_queue(priv->net_dev); 1899 netif_stop_queue(priv->net_dev);
1876} 1900}
1877 1901
1902/* Called by register_netdev() */
1903static int ipw2100_net_init(struct net_device *dev)
1904{
1905 struct ipw2100_priv *priv = libipw_priv(dev);
1906 const struct libipw_geo *geo = libipw_get_geo(priv->ieee);
1907 struct wireless_dev *wdev = &priv->ieee->wdev;
1908 int ret;
1909 int i;
1910
1911 ret = ipw2100_up(priv, 1);
1912 if (ret)
1913 return ret;
1914
1915 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN);
1916
1917 /* fill-out priv->ieee->bg_band */
1918 if (geo->bg_channels) {
1919 struct ieee80211_supported_band *bg_band = &priv->ieee->bg_band;
1920
1921 bg_band->band = IEEE80211_BAND_2GHZ;
1922 bg_band->n_channels = geo->bg_channels;
1923 bg_band->channels =
1924 kzalloc(geo->bg_channels *
1925 sizeof(struct ieee80211_channel), GFP_KERNEL);
1926 /* translate geo->bg to bg_band.channels */
1927 for (i = 0; i < geo->bg_channels; i++) {
1928 bg_band->channels[i].band = IEEE80211_BAND_2GHZ;
1929 bg_band->channels[i].center_freq = geo->bg[i].freq;
1930 bg_band->channels[i].hw_value = geo->bg[i].channel;
1931 bg_band->channels[i].max_power = geo->bg[i].max_power;
1932 if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
1933 bg_band->channels[i].flags |=
1934 IEEE80211_CHAN_PASSIVE_SCAN;
1935 if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
1936 bg_band->channels[i].flags |=
1937 IEEE80211_CHAN_NO_IBSS;
1938 if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
1939 bg_band->channels[i].flags |=
1940 IEEE80211_CHAN_RADAR;
1941 /* No equivalent for LIBIPW_CH_80211H_RULES,
1942 LIBIPW_CH_UNIFORM_SPREADING, or
1943 LIBIPW_CH_B_ONLY... */
1944 }
1945 /* point at bitrate info */
1946 bg_band->bitrates = ipw2100_bg_rates;
1947 bg_band->n_bitrates = RATE_COUNT;
1948
1949 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = bg_band;
1950 }
1951
1952 set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev);
1953 if (wiphy_register(wdev->wiphy)) {
1954 ipw2100_down(priv);
1955 return -EIO;
1956 }
1957 return 0;
1958}
1959
1878static void ipw2100_reset_adapter(struct work_struct *work) 1960static void ipw2100_reset_adapter(struct work_struct *work)
1879{ 1961{
1880 struct ipw2100_priv *priv = 1962 struct ipw2100_priv *priv =
@@ -2090,6 +2172,7 @@ static void isr_indicate_rf_kill(struct ipw2100_priv *priv, u32 status)
2090 priv->net_dev->name); 2172 priv->net_dev->name);
2091 2173
2092 /* RF_KILL is now enabled (else we wouldn't be here) */ 2174 /* RF_KILL is now enabled (else we wouldn't be here) */
2175 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, true);
2093 priv->status |= STATUS_RF_KILL_HW; 2176 priv->status |= STATUS_RF_KILL_HW;
2094 2177
2095 /* Make sure the RF Kill check timer is running */ 2178 /* Make sure the RF Kill check timer is running */
@@ -3044,7 +3127,7 @@ static void ipw2100_tx_send_data(struct ipw2100_priv *priv)
3044 IPW_MAX_BDS)) { 3127 IPW_MAX_BDS)) {
3045 /* TODO: Support merging buffers if more than 3128 /* TODO: Support merging buffers if more than
3046 * IPW_MAX_BDS are used */ 3129 * IPW_MAX_BDS are used */
3047 IPW_DEBUG_INFO("%s: Maximum BD theshold exceeded. " 3130 IPW_DEBUG_INFO("%s: Maximum BD threshold exceeded. "
3048 "Increase fragmentation level.\n", 3131 "Increase fragmentation level.\n",
3049 priv->net_dev->name); 3132 priv->net_dev->name);
3050 } 3133 }
@@ -6029,7 +6112,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6029 struct ipw2100_priv *priv; 6112 struct ipw2100_priv *priv;
6030 struct net_device *dev; 6113 struct net_device *dev;
6031 6114
6032 dev = alloc_ieee80211(sizeof(struct ipw2100_priv)); 6115 dev = alloc_ieee80211(sizeof(struct ipw2100_priv), 0);
6033 if (!dev) 6116 if (!dev)
6034 return NULL; 6117 return NULL;
6035 priv = libipw_priv(dev); 6118 priv = libipw_priv(dev);
@@ -6342,7 +6425,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6342 sysfs_remove_group(&pci_dev->dev.kobj, 6425 sysfs_remove_group(&pci_dev->dev.kobj,
6343 &ipw2100_attribute_group); 6426 &ipw2100_attribute_group);
6344 6427
6345 free_ieee80211(dev); 6428 free_ieee80211(dev, 0);
6346 pci_set_drvdata(pci_dev, NULL); 6429 pci_set_drvdata(pci_dev, NULL);
6347 } 6430 }
6348 6431
@@ -6400,7 +6483,10 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6400 if (dev->base_addr) 6483 if (dev->base_addr)
6401 iounmap((void __iomem *)dev->base_addr); 6484 iounmap((void __iomem *)dev->base_addr);
6402 6485
6403 free_ieee80211(dev); 6486 /* wiphy_unregister needs to be here, before free_ieee80211 */
6487 wiphy_unregister(priv->ieee->wdev.wiphy);
6488 kfree(priv->ieee->bg_band.channels);
6489 free_ieee80211(dev, 0);
6404 } 6490 }
6405 6491
6406 pci_release_regions(pci_dev); 6492 pci_release_regions(pci_dev);
@@ -6487,9 +6573,19 @@ static int ipw2100_resume(struct pci_dev *pci_dev)
6487} 6573}
6488#endif 6574#endif
6489 6575
6576static void ipw2100_shutdown(struct pci_dev *pci_dev)
6577{
6578 struct ipw2100_priv *priv = pci_get_drvdata(pci_dev);
6579
6580 /* Take down the device; powers it off, etc. */
6581 ipw2100_down(priv);
6582
6583 pci_disable_device(pci_dev);
6584}
6585
6490#define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x } 6586#define IPW2100_DEV_ID(x) { PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, x }
6491 6587
6492static struct pci_device_id ipw2100_pci_id_table[] __devinitdata = { 6588static DEFINE_PCI_DEVICE_TABLE(ipw2100_pci_id_table) = {
6493 IPW2100_DEV_ID(0x2520), /* IN 2100A mPCI 3A */ 6589 IPW2100_DEV_ID(0x2520), /* IN 2100A mPCI 3A */
6494 IPW2100_DEV_ID(0x2521), /* IN 2100A mPCI 3B */ 6590 IPW2100_DEV_ID(0x2521), /* IN 2100A mPCI 3B */
6495 IPW2100_DEV_ID(0x2524), /* IN 2100A mPCI 3B */ 6591 IPW2100_DEV_ID(0x2524), /* IN 2100A mPCI 3B */
@@ -6550,6 +6646,7 @@ static struct pci_driver ipw2100_pci_driver = {
6550 .suspend = ipw2100_suspend, 6646 .suspend = ipw2100_suspend,
6551 .resume = ipw2100_resume, 6647 .resume = ipw2100_resume,
6552#endif 6648#endif
6649 .shutdown = ipw2100_shutdown,
6553}; 6650};
6554 6651
6555/** 6652/**
@@ -6601,26 +6698,6 @@ static void __exit ipw2100_exit(void)
6601module_init(ipw2100_init); 6698module_init(ipw2100_init);
6602module_exit(ipw2100_exit); 6699module_exit(ipw2100_exit);
6603 6700
6604#define WEXT_USECHANNELS 1
6605
6606static const long ipw2100_frequencies[] = {
6607 2412, 2417, 2422, 2427,
6608 2432, 2437, 2442, 2447,
6609 2452, 2457, 2462, 2467,
6610 2472, 2484
6611};
6612
6613#define FREQ_COUNT ARRAY_SIZE(ipw2100_frequencies)
6614
6615static const long ipw2100_rates_11b[] = {
6616 1000000,
6617 2000000,
6618 5500000,
6619 11000000
6620};
6621
6622#define RATE_COUNT ARRAY_SIZE(ipw2100_rates_11b)
6623
6624static int ipw2100_wx_get_name(struct net_device *dev, 6701static int ipw2100_wx_get_name(struct net_device *dev,
6625 struct iw_request_info *info, 6702 struct iw_request_info *info,
6626 union iwreq_data *wrqu, char *extra) 6703 union iwreq_data *wrqu, char *extra)
@@ -6820,7 +6897,7 @@ static int ipw2100_wx_get_range(struct net_device *dev,
6820 range->max_qual.updated = 7; /* Updated all three */ 6897 range->max_qual.updated = 7; /* Updated all three */
6821 6898
6822 range->avg_qual.qual = 70; /* > 8% missed beacons is 'bad' */ 6899 range->avg_qual.qual = 70; /* > 8% missed beacons is 'bad' */
6823 /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ 6900 /* TODO: Find real 'good' to 'bad' threshold value for RSSI */
6824 range->avg_qual.level = 20 + IPW2100_RSSI_TO_DBM; 6901 range->avg_qual.level = 20 + IPW2100_RSSI_TO_DBM;
6825 range->avg_qual.noise = 0; 6902 range->avg_qual.noise = 0;
6826 range->avg_qual.updated = 7; /* Updated all three */ 6903 range->avg_qual.updated = 7; /* Updated all three */
@@ -8462,6 +8539,12 @@ static int ipw2100_get_firmware(struct ipw2100_priv *priv,
8462 return 0; 8539 return 0;
8463} 8540}
8464 8541
8542MODULE_FIRMWARE(IPW2100_FW_NAME("-i"));
8543#ifdef CONFIG_IPW2100_MONITOR
8544MODULE_FIRMWARE(IPW2100_FW_NAME("-p"));
8545#endif
8546MODULE_FIRMWARE(IPW2100_FW_NAME(""));
8547
8465static void ipw2100_release_firmware(struct ipw2100_priv *priv, 8548static void ipw2100_release_firmware(struct ipw2100_priv *priv,
8466 struct ipw2100_fw *fw) 8549 struct ipw2100_fw *fw)
8467{ 8550{
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index a6ca536e44f8..8d72e3d19586 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -31,6 +31,7 @@
31******************************************************************************/ 31******************************************************************************/
32 32
33#include <linux/sched.h> 33#include <linux/sched.h>
34#include <linux/slab.h>
34#include "ipw2200.h" 35#include "ipw2200.h"
35 36
36 37
@@ -81,6 +82,11 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION);
81MODULE_VERSION(DRV_VERSION); 82MODULE_VERSION(DRV_VERSION);
82MODULE_AUTHOR(DRV_COPYRIGHT); 83MODULE_AUTHOR(DRV_COPYRIGHT);
83MODULE_LICENSE("GPL"); 84MODULE_LICENSE("GPL");
85MODULE_FIRMWARE("ipw2200-ibss.fw");
86#ifdef CONFIG_IPW2200_MONITOR
87MODULE_FIRMWARE("ipw2200-sniffer.fw");
88#endif
89MODULE_FIRMWARE("ipw2200-bss.fw");
84 90
85static int cmdlog = 0; 91static int cmdlog = 0;
86static int debug = 0; 92static int debug = 0;
@@ -104,6 +110,25 @@ static int antenna = CFG_SYS_ANTENNA_BOTH;
104static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */ 110static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */
105#endif 111#endif
106 112
113static struct ieee80211_rate ipw2200_rates[] = {
114 { .bitrate = 10 },
115 { .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
116 { .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
117 { .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
118 { .bitrate = 60 },
119 { .bitrate = 90 },
120 { .bitrate = 120 },
121 { .bitrate = 180 },
122 { .bitrate = 240 },
123 { .bitrate = 360 },
124 { .bitrate = 480 },
125 { .bitrate = 540 }
126};
127
128#define ipw2200_a_rates (ipw2200_rates + 4)
129#define ipw2200_num_a_rates 8
130#define ipw2200_bg_rates (ipw2200_rates + 0)
131#define ipw2200_num_bg_rates 12
107 132
108#ifdef CONFIG_IPW2200_QOS 133#ifdef CONFIG_IPW2200_QOS
109static int qos_enable = 0; 134static int qos_enable = 0;
@@ -768,7 +793,7 @@ static int ipw_get_ordinal(struct ipw_priv *priv, u32 ord, void *val, u32 * len)
768 /* get number of entries */ 793 /* get number of entries */
769 field_count = *(((u16 *) & field_info) + 1); 794 field_count = *(((u16 *) & field_info) + 1);
770 795
771 /* abort if not enought memory */ 796 /* abort if not enough memory */
772 total_len = field_len * field_count; 797 total_len = field_len * field_count;
773 if (total_len > *len) { 798 if (total_len > *len) {
774 *len = total_len; 799 *len = total_len;
@@ -1734,10 +1759,13 @@ static DEVICE_ATTR(direct_dword, S_IWUSR | S_IRUGO,
1734 1759
1735static int rf_kill_active(struct ipw_priv *priv) 1760static int rf_kill_active(struct ipw_priv *priv)
1736{ 1761{
1737 if (0 == (ipw_read32(priv, 0x30) & 0x10000)) 1762 if (0 == (ipw_read32(priv, 0x30) & 0x10000)) {
1738 priv->status |= STATUS_RF_KILL_HW; 1763 priv->status |= STATUS_RF_KILL_HW;
1739 else 1764 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, true);
1765 } else {
1740 priv->status &= ~STATUS_RF_KILL_HW; 1766 priv->status &= ~STATUS_RF_KILL_HW;
1767 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, false);
1768 }
1741 1769
1742 return (priv->status & STATUS_RF_KILL_HW) ? 1 : 0; 1770 return (priv->status & STATUS_RF_KILL_HW) ? 1 : 0;
1743} 1771}
@@ -2020,6 +2048,7 @@ static void ipw_irq_tasklet(struct ipw_priv *priv)
2020 if (inta & IPW_INTA_BIT_RF_KILL_DONE) { 2048 if (inta & IPW_INTA_BIT_RF_KILL_DONE) {
2021 IPW_DEBUG_RF_KILL("RF_KILL_DONE\n"); 2049 IPW_DEBUG_RF_KILL("RF_KILL_DONE\n");
2022 priv->status |= STATUS_RF_KILL_HW; 2050 priv->status |= STATUS_RF_KILL_HW;
2051 wiphy_rfkill_set_hw_state(priv->ieee->wdev.wiphy, true);
2023 wake_up_interruptible(&priv->wait_command_queue); 2052 wake_up_interruptible(&priv->wait_command_queue);
2024 priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING); 2053 priv->status &= ~(STATUS_ASSOCIATED | STATUS_ASSOCIATING);
2025 cancel_delayed_work(&priv->request_scan); 2054 cancel_delayed_work(&priv->request_scan);
@@ -3149,14 +3178,27 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len)
3149 int total_nr = 0; 3178 int total_nr = 0;
3150 int i; 3179 int i;
3151 struct pci_pool *pool; 3180 struct pci_pool *pool;
3152 u32 *virts[CB_NUMBER_OF_ELEMENTS_SMALL]; 3181 void **virts;
3153 dma_addr_t phys[CB_NUMBER_OF_ELEMENTS_SMALL]; 3182 dma_addr_t *phys;
3154 3183
3155 IPW_DEBUG_TRACE("<< : \n"); 3184 IPW_DEBUG_TRACE("<< : \n");
3156 3185
3186 virts = kmalloc(sizeof(void *) * CB_NUMBER_OF_ELEMENTS_SMALL,
3187 GFP_KERNEL);
3188 if (!virts)
3189 return -ENOMEM;
3190
3191 phys = kmalloc(sizeof(dma_addr_t) * CB_NUMBER_OF_ELEMENTS_SMALL,
3192 GFP_KERNEL);
3193 if (!phys) {
3194 kfree(virts);
3195 return -ENOMEM;
3196 }
3157 pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0); 3197 pool = pci_pool_create("ipw2200", priv->pci_dev, CB_MAX_LENGTH, 0, 0);
3158 if (!pool) { 3198 if (!pool) {
3159 IPW_ERROR("pci_pool_create failed\n"); 3199 IPW_ERROR("pci_pool_create failed\n");
3200 kfree(phys);
3201 kfree(virts);
3160 return -ENOMEM; 3202 return -ENOMEM;
3161 } 3203 }
3162 3204
@@ -3226,6 +3268,8 @@ static int ipw_load_firmware(struct ipw_priv *priv, u8 * data, size_t len)
3226 pci_pool_free(pool, virts[i], phys[i]); 3268 pci_pool_free(pool, virts[i], phys[i]);
3227 3269
3228 pci_pool_destroy(pool); 3270 pci_pool_destroy(pool);
3271 kfree(phys);
3272 kfree(virts);
3229 3273
3230 return ret; 3274 return ret;
3231} 3275}
@@ -7732,7 +7776,7 @@ static void ipw_rebuild_decrypted_skb(struct ipw_priv *priv,
7732 case SEC_LEVEL_0: 7776 case SEC_LEVEL_0:
7733 break; 7777 break;
7734 default: 7778 default:
7735 printk(KERN_ERR "Unknow security level %d\n", 7779 printk(KERN_ERR "Unknown security level %d\n",
7736 priv->ieee->sec.level); 7780 priv->ieee->sec.level);
7737 break; 7781 break;
7738 } 7782 }
@@ -8655,24 +8699,6 @@ static int ipw_sw_reset(struct ipw_priv *priv, int option)
8655 * 8699 *
8656 */ 8700 */
8657 8701
8658static int ipw_wx_get_name(struct net_device *dev,
8659 struct iw_request_info *info,
8660 union iwreq_data *wrqu, char *extra)
8661{
8662 struct ipw_priv *priv = libipw_priv(dev);
8663 mutex_lock(&priv->mutex);
8664 if (priv->status & STATUS_RF_KILL_MASK)
8665 strcpy(wrqu->name, "radio off");
8666 else if (!(priv->status & STATUS_ASSOCIATED))
8667 strcpy(wrqu->name, "unassociated");
8668 else
8669 snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c",
8670 ipw_modes[priv->assoc_request.ieee_mode]);
8671 IPW_DEBUG_WX("Name: %s\n", wrqu->name);
8672 mutex_unlock(&priv->mutex);
8673 return 0;
8674}
8675
8676static int ipw_set_channel(struct ipw_priv *priv, u8 channel) 8702static int ipw_set_channel(struct ipw_priv *priv, u8 channel)
8677{ 8703{
8678 if (channel == 0) { 8704 if (channel == 0) {
@@ -8916,7 +8942,7 @@ static int ipw_wx_get_range(struct net_device *dev,
8916 range->max_qual.updated = 7; /* Updated all three */ 8942 range->max_qual.updated = 7; /* Updated all three */
8917 8943
8918 range->avg_qual.qual = 70; 8944 range->avg_qual.qual = 70;
8919 /* TODO: Find real 'good' to 'bad' threshol value for RSSI */ 8945 /* TODO: Find real 'good' to 'bad' threshold value for RSSI */
8920 range->avg_qual.level = 0; /* FIXME to real average level */ 8946 range->avg_qual.level = 0; /* FIXME to real average level */
8921 range->avg_qual.noise = 0; 8947 range->avg_qual.noise = 0;
8922 range->avg_qual.updated = 7; /* Updated all three */ 8948 range->avg_qual.updated = 7; /* Updated all three */
@@ -9972,7 +9998,7 @@ static int ipw_wx_sw_reset(struct net_device *dev,
9972/* Rebase the WE IOCTLs to zero for the handler array */ 9998/* Rebase the WE IOCTLs to zero for the handler array */
9973#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] 9999#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
9974static iw_handler ipw_wx_handlers[] = { 10000static iw_handler ipw_wx_handlers[] = {
9975 IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name, 10001 IW_IOCTL(SIOCGIWNAME) = (iw_handler) cfg80211_wext_giwname,
9976 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, 10002 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq,
9977 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, 10003 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq,
9978 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, 10004 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode,
@@ -10289,7 +10315,7 @@ static int ipw_tx_skb(struct ipw_priv *priv, struct libipw_txb *txb,
10289 case SEC_LEVEL_0: 10315 case SEC_LEVEL_0:
10290 break; 10316 break;
10291 default: 10317 default:
10292 printk(KERN_ERR "Unknow security level %d\n", 10318 printk(KERN_ERR "Unknown security level %d\n",
10293 priv->ieee->sec.level); 10319 priv->ieee->sec.level);
10294 break; 10320 break;
10295 } 10321 }
@@ -11275,6 +11301,7 @@ static int ipw_up(struct ipw_priv *priv)
11275 if (!(priv->config & CFG_CUSTOM_MAC)) 11301 if (!(priv->config & CFG_CUSTOM_MAC))
11276 eeprom_parse_mac(priv, priv->mac_addr); 11302 eeprom_parse_mac(priv, priv->mac_addr);
11277 memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN); 11303 memcpy(priv->net_dev->dev_addr, priv->mac_addr, ETH_ALEN);
11304 memcpy(priv->net_dev->perm_addr, priv->mac_addr, ETH_ALEN);
11278 11305
11279 for (j = 0; j < ARRAY_SIZE(ipw_geos); j++) { 11306 for (j = 0; j < ARRAY_SIZE(ipw_geos); j++) {
11280 if (!memcmp(&priv->eeprom[EEPROM_COUNTRY_CODE], 11307 if (!memcmp(&priv->eeprom[EEPROM_COUNTRY_CODE],
@@ -11416,20 +11443,104 @@ static void ipw_bg_down(struct work_struct *work)
11416/* Called by register_netdev() */ 11443/* Called by register_netdev() */
11417static int ipw_net_init(struct net_device *dev) 11444static int ipw_net_init(struct net_device *dev)
11418{ 11445{
11446 int i, rc = 0;
11419 struct ipw_priv *priv = libipw_priv(dev); 11447 struct ipw_priv *priv = libipw_priv(dev);
11448 const struct libipw_geo *geo = libipw_get_geo(priv->ieee);
11449 struct wireless_dev *wdev = &priv->ieee->wdev;
11420 mutex_lock(&priv->mutex); 11450 mutex_lock(&priv->mutex);
11421 11451
11422 if (ipw_up(priv)) { 11452 if (ipw_up(priv)) {
11423 mutex_unlock(&priv->mutex); 11453 rc = -EIO;
11424 return -EIO; 11454 goto out;
11455 }
11456
11457 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN);
11458
11459 /* fill-out priv->ieee->bg_band */
11460 if (geo->bg_channels) {
11461 struct ieee80211_supported_band *bg_band = &priv->ieee->bg_band;
11462
11463 bg_band->band = IEEE80211_BAND_2GHZ;
11464 bg_band->n_channels = geo->bg_channels;
11465 bg_band->channels =
11466 kzalloc(geo->bg_channels *
11467 sizeof(struct ieee80211_channel), GFP_KERNEL);
11468 /* translate geo->bg to bg_band.channels */
11469 for (i = 0; i < geo->bg_channels; i++) {
11470 bg_band->channels[i].band = IEEE80211_BAND_2GHZ;
11471 bg_band->channels[i].center_freq = geo->bg[i].freq;
11472 bg_band->channels[i].hw_value = geo->bg[i].channel;
11473 bg_band->channels[i].max_power = geo->bg[i].max_power;
11474 if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
11475 bg_band->channels[i].flags |=
11476 IEEE80211_CHAN_PASSIVE_SCAN;
11477 if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
11478 bg_band->channels[i].flags |=
11479 IEEE80211_CHAN_NO_IBSS;
11480 if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
11481 bg_band->channels[i].flags |=
11482 IEEE80211_CHAN_RADAR;
11483 /* No equivalent for LIBIPW_CH_80211H_RULES,
11484 LIBIPW_CH_UNIFORM_SPREADING, or
11485 LIBIPW_CH_B_ONLY... */
11486 }
11487 /* point at bitrate info */
11488 bg_band->bitrates = ipw2200_bg_rates;
11489 bg_band->n_bitrates = ipw2200_num_bg_rates;
11490
11491 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = bg_band;
11492 }
11493
11494 /* fill-out priv->ieee->a_band */
11495 if (geo->a_channels) {
11496 struct ieee80211_supported_band *a_band = &priv->ieee->a_band;
11497
11498 a_band->band = IEEE80211_BAND_5GHZ;
11499 a_band->n_channels = geo->a_channels;
11500 a_band->channels =
11501 kzalloc(geo->a_channels *
11502 sizeof(struct ieee80211_channel), GFP_KERNEL);
11503 /* translate geo->bg to a_band.channels */
11504 for (i = 0; i < geo->a_channels; i++) {
11505 a_band->channels[i].band = IEEE80211_BAND_2GHZ;
11506 a_band->channels[i].center_freq = geo->a[i].freq;
11507 a_band->channels[i].hw_value = geo->a[i].channel;
11508 a_band->channels[i].max_power = geo->a[i].max_power;
11509 if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY)
11510 a_band->channels[i].flags |=
11511 IEEE80211_CHAN_PASSIVE_SCAN;
11512 if (geo->a[i].flags & LIBIPW_CH_NO_IBSS)
11513 a_band->channels[i].flags |=
11514 IEEE80211_CHAN_NO_IBSS;
11515 if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT)
11516 a_band->channels[i].flags |=
11517 IEEE80211_CHAN_RADAR;
11518 /* No equivalent for LIBIPW_CH_80211H_RULES,
11519 LIBIPW_CH_UNIFORM_SPREADING, or
11520 LIBIPW_CH_B_ONLY... */
11521 }
11522 /* point at bitrate info */
11523 a_band->bitrates = ipw2200_a_rates;
11524 a_band->n_bitrates = ipw2200_num_a_rates;
11525
11526 wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = a_band;
11425 } 11527 }
11426 11528
11529 set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev);
11530
11531 /* With that information in place, we can now register the wiphy... */
11532 if (wiphy_register(wdev->wiphy)) {
11533 rc = -EIO;
11534 goto out;
11535 }
11536
11537out:
11427 mutex_unlock(&priv->mutex); 11538 mutex_unlock(&priv->mutex);
11428 return 0; 11539 return rc;
11429} 11540}
11430 11541
11431/* PCI driver stuff */ 11542/* PCI driver stuff */
11432static struct pci_device_id card_ids[] = { 11543static DEFINE_PCI_DEVICE_TABLE(card_ids) = {
11433 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2701, 0, 0, 0}, 11544 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2701, 0, 0, 0},
11434 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2702, 0, 0, 0}, 11545 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2702, 0, 0, 0},
11435 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2711, 0, 0, 0}, 11546 {PCI_VENDOR_ID_INTEL, 0x1043, 0x8086, 0x2711, 0, 0, 0},
@@ -11556,7 +11667,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv)
11556 if (priv->prom_net_dev) 11667 if (priv->prom_net_dev)
11557 return -EPERM; 11668 return -EPERM;
11558 11669
11559 priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv)); 11670 priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv), 1);
11560 if (priv->prom_net_dev == NULL) 11671 if (priv->prom_net_dev == NULL)
11561 return -ENOMEM; 11672 return -ENOMEM;
11562 11673
@@ -11575,7 +11686,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv)
11575 11686
11576 rc = register_netdev(priv->prom_net_dev); 11687 rc = register_netdev(priv->prom_net_dev);
11577 if (rc) { 11688 if (rc) {
11578 free_ieee80211(priv->prom_net_dev); 11689 free_ieee80211(priv->prom_net_dev, 1);
11579 priv->prom_net_dev = NULL; 11690 priv->prom_net_dev = NULL;
11580 return rc; 11691 return rc;
11581 } 11692 }
@@ -11589,7 +11700,7 @@ static void ipw_prom_free(struct ipw_priv *priv)
11589 return; 11700 return;
11590 11701
11591 unregister_netdev(priv->prom_net_dev); 11702 unregister_netdev(priv->prom_net_dev);
11592 free_ieee80211(priv->prom_net_dev); 11703 free_ieee80211(priv->prom_net_dev, 1);
11593 11704
11594 priv->prom_net_dev = NULL; 11705 priv->prom_net_dev = NULL;
11595} 11706}
@@ -11617,7 +11728,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11617 struct ipw_priv *priv; 11728 struct ipw_priv *priv;
11618 int i; 11729 int i;
11619 11730
11620 net_dev = alloc_ieee80211(sizeof(struct ipw_priv)); 11731 net_dev = alloc_ieee80211(sizeof(struct ipw_priv), 0);
11621 if (net_dev == NULL) { 11732 if (net_dev == NULL) {
11622 err = -ENOMEM; 11733 err = -ENOMEM;
11623 goto out; 11734 goto out;
@@ -11765,7 +11876,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11765 pci_disable_device(pdev); 11876 pci_disable_device(pdev);
11766 pci_set_drvdata(pdev, NULL); 11877 pci_set_drvdata(pdev, NULL);
11767 out_free_ieee80211: 11878 out_free_ieee80211:
11768 free_ieee80211(priv->net_dev); 11879 free_ieee80211(priv->net_dev, 0);
11769 out: 11880 out:
11770 return err; 11881 return err;
11771} 11882}
@@ -11832,7 +11943,11 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev)
11832 pci_release_regions(pdev); 11943 pci_release_regions(pdev);
11833 pci_disable_device(pdev); 11944 pci_disable_device(pdev);
11834 pci_set_drvdata(pdev, NULL); 11945 pci_set_drvdata(pdev, NULL);
11835 free_ieee80211(priv->net_dev); 11946 /* wiphy_unregister needs to be here, before free_ieee80211 */
11947 wiphy_unregister(priv->ieee->wdev.wiphy);
11948 kfree(priv->ieee->a_band.channels);
11949 kfree(priv->ieee->bg_band.channels);
11950 free_ieee80211(priv->net_dev, 0);
11836 free_firmware(); 11951 free_firmware();
11837} 11952}
11838 11953
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h
index 1e334ff6bd52..a6d5e42647e4 100644
--- a/drivers/net/wireless/ipw2x00/libipw.h
+++ b/drivers/net/wireless/ipw2x00/libipw.h
@@ -31,6 +31,7 @@
31#include <linux/ieee80211.h> 31#include <linux/ieee80211.h>
32 32
33#include <net/lib80211.h> 33#include <net/lib80211.h>
34#include <net/cfg80211.h>
34 35
35#define LIBIPW_VERSION "git-1.1.13" 36#define LIBIPW_VERSION "git-1.1.13"
36 37
@@ -783,17 +784,20 @@ struct libipw_geo {
783 784
784struct libipw_device { 785struct libipw_device {
785 struct net_device *dev; 786 struct net_device *dev;
787 struct wireless_dev wdev;
786 struct libipw_security sec; 788 struct libipw_security sec;
787 789
788 /* Bookkeeping structures */ 790 /* Bookkeeping structures */
789 struct libipw_stats ieee_stats; 791 struct libipw_stats ieee_stats;
790 792
791 struct libipw_geo geo; 793 struct libipw_geo geo;
794 struct ieee80211_supported_band bg_band;
795 struct ieee80211_supported_band a_band;
792 796
793 /* Probe / Beacon management */ 797 /* Probe / Beacon management */
794 struct list_head network_free_list; 798 struct list_head network_free_list;
795 struct list_head network_list; 799 struct list_head network_list;
796 struct libipw_network *networks; 800 struct libipw_network *networks[MAX_NETWORK_COUNT];
797 int scans; 801 int scans;
798 int scan_age; 802 int scan_age;
799 803
@@ -1014,8 +1018,8 @@ static inline int libipw_is_cck_rate(u8 rate)
1014} 1018}
1015 1019
1016/* ieee80211.c */ 1020/* ieee80211.c */
1017extern void free_ieee80211(struct net_device *dev); 1021extern void free_ieee80211(struct net_device *dev, int monitor);
1018extern struct net_device *alloc_ieee80211(int sizeof_priv); 1022extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor);
1019extern int libipw_change_mtu(struct net_device *dev, int new_mtu); 1023extern int libipw_change_mtu(struct net_device *dev, int new_mtu);
1020 1024
1021extern void libipw_networks_age(struct libipw_device *ieee, 1025extern void libipw_networks_age(struct libipw_device *ieee,
diff --git a/drivers/net/wireless/ipw2x00/libipw_geo.c b/drivers/net/wireless/ipw2x00/libipw_geo.c
index 65e8c175a4a0..c9fe3c99cb00 100644
--- a/drivers/net/wireless/ipw2x00/libipw_geo.c
+++ b/drivers/net/wireless/ipw2x00/libipw_geo.c
@@ -34,7 +34,6 @@
34#include <linux/netdevice.h> 34#include <linux/netdevice.h>
35#include <linux/proc_fs.h> 35#include <linux/proc_fs.h>
36#include <linux/skbuff.h> 36#include <linux/skbuff.h>
37#include <linux/slab.h>
38#include <linux/tcp.h> 37#include <linux/tcp.h>
39#include <linux/types.h> 38#include <linux/types.h>
40#include <linux/wireless.h> 39#include <linux/wireless.h>
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c
index eb2b60834c17..2fa55867bd8b 100644
--- a/drivers/net/wireless/ipw2x00/libipw_module.c
+++ b/drivers/net/wireless/ipw2x00/libipw_module.c
@@ -62,18 +62,22 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION);
62MODULE_AUTHOR(DRV_COPYRIGHT); 62MODULE_AUTHOR(DRV_COPYRIGHT);
63MODULE_LICENSE("GPL"); 63MODULE_LICENSE("GPL");
64 64
65struct cfg80211_ops libipw_config_ops = { };
66void *libipw_wiphy_privid = &libipw_wiphy_privid;
67
65static int libipw_networks_allocate(struct libipw_device *ieee) 68static int libipw_networks_allocate(struct libipw_device *ieee)
66{ 69{
67 if (ieee->networks) 70 int i, j;
68 return 0; 71
69 72 for (i = 0; i < MAX_NETWORK_COUNT; i++) {
70 ieee->networks = 73 ieee->networks[i] = kzalloc(sizeof(struct libipw_network),
71 kzalloc(MAX_NETWORK_COUNT * sizeof(struct libipw_network), 74 GFP_KERNEL);
72 GFP_KERNEL); 75 if (!ieee->networks[i]) {
73 if (!ieee->networks) { 76 LIBIPW_ERROR("Out of memory allocating beacons\n");
74 printk(KERN_WARNING "%s: Out of memory allocating beacons\n", 77 for (j = 0; j < i; j++)
75 ieee->dev->name); 78 kfree(ieee->networks[j]);
76 return -ENOMEM; 79 return -ENOMEM;
80 }
77 } 81 }
78 82
79 return 0; 83 return 0;
@@ -94,15 +98,11 @@ static inline void libipw_networks_free(struct libipw_device *ieee)
94{ 98{
95 int i; 99 int i;
96 100
97 if (!ieee->networks) 101 for (i = 0; i < MAX_NETWORK_COUNT; i++) {
98 return; 102 if (ieee->networks[i]->ibss_dfs)
99 103 kfree(ieee->networks[i]->ibss_dfs);
100 for (i = 0; i < MAX_NETWORK_COUNT; i++) 104 kfree(ieee->networks[i]);
101 if (ieee->networks[i].ibss_dfs) 105 }
102 kfree(ieee->networks[i].ibss_dfs);
103
104 kfree(ieee->networks);
105 ieee->networks = NULL;
106} 106}
107 107
108void libipw_networks_age(struct libipw_device *ieee, 108void libipw_networks_age(struct libipw_device *ieee,
@@ -127,7 +127,7 @@ static void libipw_networks_initialize(struct libipw_device *ieee)
127 INIT_LIST_HEAD(&ieee->network_free_list); 127 INIT_LIST_HEAD(&ieee->network_free_list);
128 INIT_LIST_HEAD(&ieee->network_list); 128 INIT_LIST_HEAD(&ieee->network_list);
129 for (i = 0; i < MAX_NETWORK_COUNT; i++) 129 for (i = 0; i < MAX_NETWORK_COUNT; i++)
130 list_add_tail(&ieee->networks[i].list, 130 list_add_tail(&ieee->networks[i]->list,
131 &ieee->network_free_list); 131 &ieee->network_free_list);
132} 132}
133 133
@@ -140,7 +140,7 @@ int libipw_change_mtu(struct net_device *dev, int new_mtu)
140} 140}
141EXPORT_SYMBOL(libipw_change_mtu); 141EXPORT_SYMBOL(libipw_change_mtu);
142 142
143struct net_device *alloc_ieee80211(int sizeof_priv) 143struct net_device *alloc_ieee80211(int sizeof_priv, int monitor)
144{ 144{
145 struct libipw_device *ieee; 145 struct libipw_device *ieee;
146 struct net_device *dev; 146 struct net_device *dev;
@@ -157,10 +157,31 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
157 157
158 ieee->dev = dev; 158 ieee->dev = dev;
159 159
160 if (!monitor) {
161 ieee->wdev.wiphy = wiphy_new(&libipw_config_ops, 0);
162 if (!ieee->wdev.wiphy) {
163 LIBIPW_ERROR("Unable to allocate wiphy.\n");
164 goto failed_free_netdev;
165 }
166
167 ieee->dev->ieee80211_ptr = &ieee->wdev;
168 ieee->wdev.iftype = NL80211_IFTYPE_STATION;
169
170 /* Fill-out wiphy structure bits we know... Not enough info
171 here to call set_wiphy_dev or set MAC address or channel info
172 -- have to do that in ->ndo_init... */
173 ieee->wdev.wiphy->privid = libipw_wiphy_privid;
174
175 ieee->wdev.wiphy->max_scan_ssids = 1;
176 ieee->wdev.wiphy->max_scan_ie_len = 0;
177 ieee->wdev.wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION)
178 | BIT(NL80211_IFTYPE_ADHOC);
179 }
180
160 err = libipw_networks_allocate(ieee); 181 err = libipw_networks_allocate(ieee);
161 if (err) { 182 if (err) {
162 LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err); 183 LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err);
163 goto failed_free_netdev; 184 goto failed_free_wiphy;
164 } 185 }
165 libipw_networks_initialize(ieee); 186 libipw_networks_initialize(ieee);
166 187
@@ -175,7 +196,7 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
175 ieee->host_decrypt = 1; 196 ieee->host_decrypt = 1;
176 ieee->host_mc_decrypt = 1; 197 ieee->host_mc_decrypt = 1;
177 198
178 /* Host fragementation in Open mode. Default is enabled. 199 /* Host fragmentation in Open mode. Default is enabled.
179 * Note: host fragmentation is always enabled if host encryption 200 * Note: host fragmentation is always enabled if host encryption
180 * is enabled. For cards can do hardware encryption, they must do 201 * is enabled. For cards can do hardware encryption, they must do
181 * hardware fragmentation as well. So we don't need a variable 202 * hardware fragmentation as well. So we don't need a variable
@@ -193,19 +214,27 @@ struct net_device *alloc_ieee80211(int sizeof_priv)
193 214
194 return dev; 215 return dev;
195 216
217failed_free_wiphy:
218 if (!monitor)
219 wiphy_free(ieee->wdev.wiphy);
196failed_free_netdev: 220failed_free_netdev:
197 free_netdev(dev); 221 free_netdev(dev);
198failed: 222failed:
199 return NULL; 223 return NULL;
200} 224}
201 225
202void free_ieee80211(struct net_device *dev) 226void free_ieee80211(struct net_device *dev, int monitor)
203{ 227{
204 struct libipw_device *ieee = netdev_priv(dev); 228 struct libipw_device *ieee = netdev_priv(dev);
205 229
206 lib80211_crypt_info_free(&ieee->crypt_info); 230 lib80211_crypt_info_free(&ieee->crypt_info);
207 231
208 libipw_networks_free(ieee); 232 libipw_networks_free(ieee);
233
234 /* free cfg80211 resources */
235 if (!monitor)
236 wiphy_free(ieee->wdev.wiphy);
237
209 free_netdev(dev); 238 free_netdev(dev);
210} 239}
211 240
@@ -216,17 +245,22 @@ u32 libipw_debug_level = 0;
216EXPORT_SYMBOL_GPL(libipw_debug_level); 245EXPORT_SYMBOL_GPL(libipw_debug_level);
217static struct proc_dir_entry *libipw_proc = NULL; 246static struct proc_dir_entry *libipw_proc = NULL;
218 247
219static int show_debug_level(char *page, char **start, off_t offset, 248static int debug_level_proc_show(struct seq_file *m, void *v)
220 int count, int *eof, void *data)
221{ 249{
222 return snprintf(page, count, "0x%08X\n", libipw_debug_level); 250 seq_printf(m, "0x%08X\n", libipw_debug_level);
251 return 0;
223} 252}
224 253
225static int store_debug_level(struct file *file, const char __user * buffer, 254static int debug_level_proc_open(struct inode *inode, struct file *file)
226 unsigned long count, void *data) 255{
256 return single_open(file, debug_level_proc_show, NULL);
257}
258
259static ssize_t debug_level_proc_write(struct file *file,
260 const char __user *buffer, size_t count, loff_t *pos)
227{ 261{
228 char buf[] = "0x00000000\n"; 262 char buf[] = "0x00000000\n";
229 unsigned long len = min((unsigned long)sizeof(buf) - 1, count); 263 size_t len = min(sizeof(buf) - 1, count);
230 unsigned long val; 264 unsigned long val;
231 265
232 if (copy_from_user(buf, buffer, len)) 266 if (copy_from_user(buf, buffer, len))
@@ -240,6 +274,15 @@ static int store_debug_level(struct file *file, const char __user * buffer,
240 274
241 return strnlen(buf, len); 275 return strnlen(buf, len);
242} 276}
277
278static const struct file_operations debug_level_proc_fops = {
279 .owner = THIS_MODULE,
280 .open = debug_level_proc_open,
281 .read = seq_read,
282 .llseek = seq_lseek,
283 .release = single_release,
284 .write = debug_level_proc_write,
285};
243#endif /* CONFIG_LIBIPW_DEBUG */ 286#endif /* CONFIG_LIBIPW_DEBUG */
244 287
245static int __init libipw_init(void) 288static int __init libipw_init(void)
@@ -254,16 +297,13 @@ static int __init libipw_init(void)
254 " proc directory\n"); 297 " proc directory\n");
255 return -EIO; 298 return -EIO;
256 } 299 }
257 e = create_proc_entry("debug_level", S_IFREG | S_IRUGO | S_IWUSR, 300 e = proc_create("debug_level", S_IRUGO | S_IWUSR, libipw_proc,
258 libipw_proc); 301 &debug_level_proc_fops);
259 if (!e) { 302 if (!e) {
260 remove_proc_entry(DRV_NAME, init_net.proc_net); 303 remove_proc_entry(DRV_NAME, init_net.proc_net);
261 libipw_proc = NULL; 304 libipw_proc = NULL;
262 return -EIO; 305 return -EIO;
263 } 306 }
264 e->read_proc = show_debug_level;
265 e->write_proc = store_debug_level;
266 e->data = NULL;
267#endif /* CONFIG_LIBIPW_DEBUG */ 307#endif /* CONFIG_LIBIPW_DEBUG */
268 308
269 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n"); 309 printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
diff --git a/drivers/net/wireless/ipw2x00/libipw_rx.c b/drivers/net/wireless/ipw2x00/libipw_rx.c
index 282b1f7ff1e9..39a34da52d52 100644
--- a/drivers/net/wireless/ipw2x00/libipw_rx.c
+++ b/drivers/net/wireless/ipw2x00/libipw_rx.c
@@ -17,6 +17,7 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/if_arp.h> 18#include <linux/if_arp.h>
19#include <linux/in6.h> 19#include <linux/in6.h>
20#include <linux/gfp.h>
20#include <linux/in.h> 21#include <linux/in.h>
21#include <linux/ip.h> 22#include <linux/ip.h>
22#include <linux/kernel.h> 23#include <linux/kernel.h>
@@ -24,7 +25,6 @@
24#include <linux/netdevice.h> 25#include <linux/netdevice.h>
25#include <linux/proc_fs.h> 26#include <linux/proc_fs.h>
26#include <linux/skbuff.h> 27#include <linux/skbuff.h>
27#include <linux/slab.h>
28#include <linux/tcp.h> 28#include <linux/tcp.h>
29#include <linux/types.h> 29#include <linux/types.h>
30#include <linux/wireless.h> 30#include <linux/wireless.h>
diff --git a/drivers/net/wireless/ipw2x00/libipw_wx.c b/drivers/net/wireless/ipw2x00/libipw_wx.c
index 4d89f66f53b2..3633c6682e49 100644
--- a/drivers/net/wireless/ipw2x00/libipw_wx.c
+++ b/drivers/net/wireless/ipw2x00/libipw_wx.c
@@ -31,6 +31,7 @@
31******************************************************************************/ 31******************************************************************************/
32 32
33#include <linux/kmod.h> 33#include <linux/kmod.h>
34#include <linux/slab.h>
34#include <linux/module.h> 35#include <linux/module.h>
35#include <linux/jiffies.h> 36#include <linux/jiffies.h>
36 37
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig
index 99310c033253..dc8ed1527666 100644
--- a/drivers/net/wireless/iwlwifi/Kconfig
+++ b/drivers/net/wireless/iwlwifi/Kconfig
@@ -1,23 +1,7 @@
1config IWLWIFI 1config IWLWIFI
2 tristate "Intel Wireless Wifi" 2 tristate "Intel Wireless Wifi"
3 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on PCI && MAC80211
4 select LIB80211
5 select FW_LOADER 4 select FW_LOADER
6 select MAC80211_LEDS if IWLWIFI_LEDS
7 select LEDS_CLASS if IWLWIFI_LEDS
8
9config IWLWIFI_LEDS
10 bool "Enable LED support in iwlagn and iwl3945 drivers"
11 depends on IWLWIFI
12 default y
13 ---help---
14 Select this if you want LED support.
15
16config IWLWIFI_SPECTRUM_MEASUREMENT
17 bool "Enable Spectrum Measurement in iwlagn driver"
18 depends on IWLWIFI
19 ---help---
20 This option will enable spectrum measurement for the iwlagn driver.
21 5
22config IWLWIFI_DEBUG 6config IWLWIFI_DEBUG
23 bool "Enable full debugging output in iwlagn and iwl3945 drivers" 7 bool "Enable full debugging output in iwlagn and iwl3945 drivers"
@@ -50,6 +34,24 @@ config IWLWIFI_DEBUGFS
50 ---help--- 34 ---help---
51 Enable creation of debugfs files for the iwlwifi drivers. 35 Enable creation of debugfs files for the iwlwifi drivers.
52 36
37config IWLWIFI_DEVICE_TRACING
38 bool "iwlwifi device access tracing"
39 depends on IWLWIFI
40 depends on EVENT_TRACING
41 help
42 Say Y here to trace all commands, including TX frames and IO
43 accesses, sent to the device. If you say yes, iwlwifi will
44 register with the ftrace framework for event tracing and dump
45 all this information to the ringbuffer, you may need to
46 increase the ringbuffer size. See the ftrace documentation
47 for more information.
48
49 When tracing is not enabled, this option still has some
50 (though rather small) overhead.
51
52 If unsure, say Y so we can help you better when problems
53 occur.
54
53config IWLAGN 55config IWLAGN
54 tristate "Intel Wireless WiFi Next Gen AGN (iwlagn)" 56 tristate "Intel Wireless WiFi Next Gen AGN (iwlagn)"
55 depends on IWLWIFI 57 depends on IWLWIFI
@@ -112,9 +114,3 @@ config IWL3945
112 inserted in and removed from the running kernel whenever you want), 114 inserted in and removed from the running kernel whenever you want),
113 say M here and read <file:Documentation/kbuild/modules.txt>. The 115 say M here and read <file:Documentation/kbuild/modules.txt>. The
114 module will be called iwl3945. 116 module will be called iwl3945.
115
116config IWL3945_SPECTRUM_MEASUREMENT
117 bool "Enable Spectrum Measurement in iwl3945 driver"
118 depends on IWL3945
119 ---help---
120 This option will enable spectrum measurement for the iwl3945 driver.
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile
index 1d4e0a226fd4..4e378faee650 100644
--- a/drivers/net/wireless/iwlwifi/Makefile
+++ b/drivers/net/wireless/iwlwifi/Makefile
@@ -1,20 +1,23 @@
1obj-$(CONFIG_IWLWIFI) += iwlcore.o 1obj-$(CONFIG_IWLWIFI) += iwlcore.o
2iwlcore-objs := iwl-core.o iwl-eeprom.o iwl-hcmd.o iwl-power.o 2iwlcore-objs := iwl-core.o iwl-eeprom.o iwl-hcmd.o iwl-power.o
3iwlcore-objs += iwl-rx.o iwl-tx.o iwl-sta.o iwl-calib.o 3iwlcore-objs += iwl-rx.o iwl-tx.o iwl-sta.o iwl-calib.o
4iwlcore-objs += iwl-scan.o 4iwlcore-objs += iwl-scan.o iwl-led.o
5iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o 5iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o
6iwlcore-$(CONFIG_IWLWIFI_LEDS) += iwl-led.o 6iwlcore-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o
7iwlcore-$(CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT) += iwl-spectrum.o
8 7
8CFLAGS_iwl-devtrace.o := -I$(src)
9
10# AGN
9obj-$(CONFIG_IWLAGN) += iwlagn.o 11obj-$(CONFIG_IWLAGN) += iwlagn.o
10iwlagn-objs := iwl-agn.o iwl-agn-rs.o 12iwlagn-objs := iwl-agn.o iwl-agn-rs.o iwl-agn-led.o
11 13
12iwlagn-$(CONFIG_IWL4965) += iwl-4965.o 14iwlagn-$(CONFIG_IWL4965) += iwl-4965.o
13iwlagn-$(CONFIG_IWL5000) += iwl-5000.o 15iwlagn-$(CONFIG_IWL5000) += iwl-5000.o
14iwlagn-$(CONFIG_IWL5000) += iwl-6000.o 16iwlagn-$(CONFIG_IWL5000) += iwl-6000.o
15iwlagn-$(CONFIG_IWL5000) += iwl-1000.o 17iwlagn-$(CONFIG_IWL5000) += iwl-1000.o
16 18
19# 3945
17obj-$(CONFIG_IWL3945) += iwl3945.o 20obj-$(CONFIG_IWL3945) += iwl3945.o
18iwl3945-objs := iwl3945-base.o iwl-3945.o iwl-3945-rs.o iwl-3945-led.o 21iwl3945-objs := iwl3945-base.o iwl-3945.o iwl-3945-rs.o iwl-3945-led.o
19 22
20 23ccflags-y += -D__CHECK_ENDIAN__
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 950267ab556a..3bf2e6e9b2d9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2008-2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -44,6 +44,7 @@
44#include "iwl-sta.h" 44#include "iwl-sta.h"
45#include "iwl-helpers.h" 45#include "iwl-helpers.h"
46#include "iwl-5000-hw.h" 46#include "iwl-5000-hw.h"
47#include "iwl-agn-led.h"
47 48
48/* Highest firmware API version supported */ 49/* Highest firmware API version supported */
49#define IWL1000_UCODE_API_MAX 3 50#define IWL1000_UCODE_API_MAX 3
@@ -76,7 +77,10 @@ static void iwl1000_set_ct_threshold(struct iwl_priv *priv)
76/* NIC configuration for 1000 series */ 77/* NIC configuration for 1000 series */
77static void iwl1000_nic_config(struct iwl_priv *priv) 78static void iwl1000_nic_config(struct iwl_priv *priv)
78{ 79{
79 iwl5000_nic_config(priv); 80 /* set CSR_HW_CONFIG_REG for uCode use */
81 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
82 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
83 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
80 84
81 /* Setting digital SVR for 1000 card to 1.32V */ 85 /* Setting digital SVR for 1000 card to 1.32V */
82 /* locking is acquired in iwl_set_bits_mask_prph() function */ 86 /* locking is acquired in iwl_set_bits_mask_prph() function */
@@ -85,8 +89,78 @@ static void iwl1000_nic_config(struct iwl_priv *priv)
85 ~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK); 89 ~APMG_SVR_VOLTAGE_CONFIG_BIT_MSK);
86} 90}
87 91
92static struct iwl_sensitivity_ranges iwl1000_sensitivity = {
93 .min_nrg_cck = 95,
94 .max_nrg_cck = 0, /* not used, set to 0 */
95 .auto_corr_min_ofdm = 90,
96 .auto_corr_min_ofdm_mrc = 170,
97 .auto_corr_min_ofdm_x1 = 120,
98 .auto_corr_min_ofdm_mrc_x1 = 240,
99
100 .auto_corr_max_ofdm = 120,
101 .auto_corr_max_ofdm_mrc = 210,
102 .auto_corr_max_ofdm_x1 = 155,
103 .auto_corr_max_ofdm_mrc_x1 = 290,
104
105 .auto_corr_min_cck = 125,
106 .auto_corr_max_cck = 200,
107 .auto_corr_min_cck_mrc = 170,
108 .auto_corr_max_cck_mrc = 400,
109 .nrg_th_cck = 95,
110 .nrg_th_ofdm = 95,
111
112 .barker_corr_th_min = 190,
113 .barker_corr_th_min_mrc = 390,
114 .nrg_th_cca = 62,
115};
116
117static int iwl1000_hw_set_hw_params(struct iwl_priv *priv)
118{
119 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
120 priv->cfg->mod_params->num_of_queues <= IWL50_NUM_QUEUES)
121 priv->cfg->num_of_queues =
122 priv->cfg->mod_params->num_of_queues;
123
124 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
125 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
126 priv->hw_params.scd_bc_tbls_size =
127 priv->cfg->num_of_queues *
128 sizeof(struct iwl5000_scd_bc_tbl);
129 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
130 priv->hw_params.max_stations = IWL5000_STATION_COUNT;
131 priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
132
133 priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
134 priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
135
136 priv->hw_params.max_bsm_size = 0;
137 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
138 BIT(IEEE80211_BAND_5GHZ);
139 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
140
141 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
142 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
143 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
144 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
145
146 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
147 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
148
149 /* Set initial sensitivity parameters */
150 /* Set initial calibration set */
151 priv->hw_params.sens = &iwl1000_sensitivity;
152 priv->hw_params.calib_init_cfg =
153 BIT(IWL_CALIB_XTAL) |
154 BIT(IWL_CALIB_LO) |
155 BIT(IWL_CALIB_TX_IQ) |
156 BIT(IWL_CALIB_TX_IQ_PERD) |
157 BIT(IWL_CALIB_BASE_BAND);
158
159 return 0;
160}
161
88static struct iwl_lib_ops iwl1000_lib = { 162static struct iwl_lib_ops iwl1000_lib = {
89 .set_hw_params = iwl5000_hw_set_hw_params, 163 .set_hw_params = iwl1000_hw_set_hw_params,
90 .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl, 164 .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
91 .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl, 165 .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl,
92 .txq_set_sched = iwl5000_txq_set_sched, 166 .txq_set_sched = iwl5000_txq_set_sched,
@@ -101,14 +175,15 @@ static struct iwl_lib_ops iwl1000_lib = {
101 .load_ucode = iwl5000_load_ucode, 175 .load_ucode = iwl5000_load_ucode,
102 .dump_nic_event_log = iwl_dump_nic_event_log, 176 .dump_nic_event_log = iwl_dump_nic_event_log,
103 .dump_nic_error_log = iwl_dump_nic_error_log, 177 .dump_nic_error_log = iwl_dump_nic_error_log,
178 .dump_csr = iwl_dump_csr,
179 .dump_fh = iwl_dump_fh,
104 .init_alive_start = iwl5000_init_alive_start, 180 .init_alive_start = iwl5000_init_alive_start,
105 .alive_notify = iwl5000_alive_notify, 181 .alive_notify = iwl5000_alive_notify,
106 .send_tx_power = iwl5000_send_tx_power, 182 .send_tx_power = iwl5000_send_tx_power,
107 .update_chain_flags = iwl_update_chain_flags, 183 .update_chain_flags = iwl_update_chain_flags,
108 .apm_ops = { 184 .apm_ops = {
109 .init = iwl5000_apm_init, 185 .init = iwl_apm_init,
110 .reset = iwl5000_apm_reset, 186 .stop = iwl_apm_stop,
111 .stop = iwl5000_apm_stop,
112 .config = iwl1000_nic_config, 187 .config = iwl1000_nic_config,
113 .set_pwr_src = iwl_set_pwr_src, 188 .set_pwr_src = iwl_set_pwr_src,
114 }, 189 },
@@ -135,13 +210,15 @@ static struct iwl_lib_ops iwl1000_lib = {
135 .temperature = iwl5000_temperature, 210 .temperature = iwl5000_temperature,
136 .set_ct_kill = iwl1000_set_ct_threshold, 211 .set_ct_kill = iwl1000_set_ct_threshold,
137 }, 212 },
213 .add_bcast_station = iwl_add_bcast_station,
138}; 214};
139 215
140static struct iwl_ops iwl1000_ops = { 216static const struct iwl_ops iwl1000_ops = {
141 .ucode = &iwl5000_ucode, 217 .ucode = &iwl5000_ucode,
142 .lib = &iwl1000_lib, 218 .lib = &iwl1000_lib,
143 .hcmd = &iwl5000_hcmd, 219 .hcmd = &iwl5000_hcmd,
144 .utils = &iwl5000_hcmd_utils, 220 .utils = &iwl5000_hcmd_utils,
221 .led = &iwlagn_led_ops,
145}; 222};
146 223
147struct iwl_cfg iwl1000_bgn_cfg = { 224struct iwl_cfg iwl1000_bgn_cfg = {
@@ -152,15 +229,53 @@ struct iwl_cfg iwl1000_bgn_cfg = {
152 .sku = IWL_SKU_G|IWL_SKU_N, 229 .sku = IWL_SKU_G|IWL_SKU_N,
153 .ops = &iwl1000_ops, 230 .ops = &iwl1000_ops,
154 .eeprom_size = OTP_LOW_IMAGE_SIZE, 231 .eeprom_size = OTP_LOW_IMAGE_SIZE,
155 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 232 .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
156 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 233 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
234 .num_of_queues = IWL50_NUM_QUEUES,
235 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
157 .mod_params = &iwl50_mod_params, 236 .mod_params = &iwl50_mod_params,
158 .valid_tx_ant = ANT_A, 237 .valid_tx_ant = ANT_A,
159 .valid_rx_ant = ANT_AB, 238 .valid_rx_ant = ANT_AB,
160 .need_pll_cfg = true, 239 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
240 .set_l0s = true,
241 .use_bsm = false,
161 .max_ll_items = OTP_MAX_LL_ITEMS_1000, 242 .max_ll_items = OTP_MAX_LL_ITEMS_1000,
162 .shadow_ram_support = false, 243 .shadow_ram_support = false,
163 .ht_greenfield_support = true, 244 .ht_greenfield_support = true,
245 .led_compensation = 51,
164 .use_rts_for_ht = true, /* use rts/cts protection */ 246 .use_rts_for_ht = true, /* use rts/cts protection */
247 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
248 .support_ct_kill_exit = true,
249 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF,
250 .chain_noise_scale = 1000,
251};
252
253struct iwl_cfg iwl1000_bg_cfg = {
254 .name = "1000 Series BG",
255 .fw_name_pre = IWL1000_FW_PRE,
256 .ucode_api_max = IWL1000_UCODE_API_MAX,
257 .ucode_api_min = IWL1000_UCODE_API_MIN,
258 .sku = IWL_SKU_G,
259 .ops = &iwl1000_ops,
260 .eeprom_size = OTP_LOW_IMAGE_SIZE,
261 .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
262 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
263 .num_of_queues = IWL50_NUM_QUEUES,
264 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
265 .mod_params = &iwl50_mod_params,
266 .valid_tx_ant = ANT_A,
267 .valid_rx_ant = ANT_AB,
268 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
269 .set_l0s = true,
270 .use_bsm = false,
271 .max_ll_items = OTP_MAX_LL_ITEMS_1000,
272 .shadow_ram_support = false,
273 .ht_greenfield_support = true,
274 .led_compensation = 51,
275 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
276 .support_ct_kill_exit = true,
277 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF,
278 .chain_noise_scale = 1000,
165}; 279};
166 280
281MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-fh.h b/drivers/net/wireless/iwlwifi/iwl-3945-fh.h
index 08ce259a0e60..042f6bc0df13 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-fh.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-fh.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h
index 16772780c5b0..3a876a8ece38 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-hw.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -71,12 +71,6 @@
71 71
72#include "iwl-eeprom.h" 72#include "iwl-eeprom.h"
73 73
74/*
75 * uCode queue management definitions ...
76 * Queue #4 is the command queue for 3945 and 4965.
77 */
78#define IWL_CMD_QUEUE_NUM 4
79
80/* Time constants */ 74/* Time constants */
81#define SHORT_SLOT_TIME 9 75#define SHORT_SLOT_TIME 9
82#define LONG_SLOT_TIME 20 76#define LONG_SLOT_TIME 20
@@ -254,12 +248,6 @@ struct iwl3945_eeprom {
254#define TFD_CTL_PAD_SET(n) (n << 28) 248#define TFD_CTL_PAD_SET(n) (n << 28)
255#define TFD_CTL_PAD_GET(ctl) (ctl >> 28) 249#define TFD_CTL_PAD_GET(ctl) (ctl >> 28)
256 250
257/*
258 * RX related structures and functions
259 */
260#define RX_FREE_BUFFERS 64
261#define RX_LOW_WATERMARK 8
262
263/* Sizes and addresses for instruction and data memory (SRAM) in 251/* Sizes and addresses for instruction and data memory (SRAM) in
264 * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */ 252 * 3945's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
265#define IWL39_RTC_INST_LOWER_BOUND (0x000000) 253#define IWL39_RTC_INST_LOWER_BOUND (0x000000)
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.c b/drivers/net/wireless/iwlwifi/iwl-3945-led.c
index 8c29ded7d02c..abe2b739c4dc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-led.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -24,8 +24,6 @@
24 * 24 *
25 *****************************************************************************/ 25 *****************************************************************************/
26 26
27#ifdef CONFIG_IWLWIFI_LEDS
28
29#include <linux/kernel.h> 27#include <linux/kernel.h>
30#include <linux/module.h> 28#include <linux/module.h>
31#include <linux/init.h> 29#include <linux/init.h>
@@ -43,388 +41,51 @@
43#include "iwl-3945.h" 41#include "iwl-3945.h"
44#include "iwl-core.h" 42#include "iwl-core.h"
45#include "iwl-dev.h" 43#include "iwl-dev.h"
44#include "iwl-3945-led.h"
46 45
47#ifdef CONFIG_IWLWIFI_DEBUG
48static const char *led_type_str[] = {
49 __stringify(IWL_LED_TRG_TX),
50 __stringify(IWL_LED_TRG_RX),
51 __stringify(IWL_LED_TRG_ASSOC),
52 __stringify(IWL_LED_TRG_RADIO),
53 NULL
54};
55#endif /* CONFIG_IWLWIFI_DEBUG */
56
57static const struct {
58 u16 brightness;
59 u8 on_time;
60 u8 off_time;
61} blink_tbl[] =
62{
63 {300, 25, 25},
64 {200, 40, 40},
65 {100, 55, 55},
66 {70, 65, 65},
67 {50, 75, 75},
68 {20, 85, 85},
69 {15, 95, 95 },
70 {10, 110, 110},
71 {5, 130, 130},
72 {0, 167, 167},
73 /* SOLID_ON */
74 {-1, IWL_LED_SOLID, 0}
75};
76
77#define IWL_1MB_RATE (128 * 1024)
78#define IWL_LED_THRESHOLD (16)
79#define IWL_MAX_BLINK_TBL (ARRAY_SIZE(blink_tbl) - 1) /*Exclude Solid on*/
80#define IWL_SOLID_BLINK_IDX (ARRAY_SIZE(blink_tbl) - 1)
81
82static void iwl3945_led_cmd_callback(struct iwl_priv *priv,
83 struct iwl_device_cmd *cmd,
84 struct sk_buff *skb)
85{
86}
87
88static inline int iwl3945_brightness_to_idx(enum led_brightness brightness)
89{
90 return fls(0x000000FF & (u32)brightness);
91}
92 46
93/* Send led command */ 47/* Send led command */
94static int iwl_send_led_cmd(struct iwl_priv *priv, 48static int iwl3945_send_led_cmd(struct iwl_priv *priv,
95 struct iwl_led_cmd *led_cmd) 49 struct iwl_led_cmd *led_cmd)
96{ 50{
97 struct iwl_host_cmd cmd = { 51 struct iwl_host_cmd cmd = {
98 .id = REPLY_LEDS_CMD, 52 .id = REPLY_LEDS_CMD,
99 .len = sizeof(struct iwl_led_cmd), 53 .len = sizeof(struct iwl_led_cmd),
100 .data = led_cmd, 54 .data = led_cmd,
101 .flags = CMD_ASYNC, 55 .flags = CMD_ASYNC,
102 .callback = iwl3945_led_cmd_callback, 56 .callback = NULL,
103 }; 57 };
104 58
105 return iwl_send_cmd(priv, &cmd); 59 return iwl_send_cmd(priv, &cmd);
106} 60}
107 61
108
109
110/* Set led on command */
111static int iwl3945_led_pattern(struct iwl_priv *priv, int led_id,
112 unsigned int idx)
113{
114 struct iwl_led_cmd led_cmd = {
115 .id = led_id,
116 .interval = IWL_DEF_LED_INTRVL
117 };
118
119 BUG_ON(idx > IWL_MAX_BLINK_TBL);
120
121 led_cmd.on = blink_tbl[idx].on_time;
122 led_cmd.off = blink_tbl[idx].off_time;
123
124 return iwl_send_led_cmd(priv, &led_cmd);
125}
126
127
128/* Set led on command */ 62/* Set led on command */
129static int iwl3945_led_on(struct iwl_priv *priv, int led_id) 63static int iwl3945_led_on(struct iwl_priv *priv)
130{ 64{
131 struct iwl_led_cmd led_cmd = { 65 struct iwl_led_cmd led_cmd = {
132 .id = led_id, 66 .id = IWL_LED_LINK,
133 .on = IWL_LED_SOLID, 67 .on = IWL_LED_SOLID,
134 .off = 0, 68 .off = 0,
135 .interval = IWL_DEF_LED_INTRVL 69 .interval = IWL_DEF_LED_INTRVL
136 }; 70 };
137 return iwl_send_led_cmd(priv, &led_cmd); 71 return iwl3945_send_led_cmd(priv, &led_cmd);
138} 72}
139 73
140/* Set led off command */ 74/* Set led off command */
141static int iwl3945_led_off(struct iwl_priv *priv, int led_id) 75static int iwl3945_led_off(struct iwl_priv *priv)
142{ 76{
143 struct iwl_led_cmd led_cmd = { 77 struct iwl_led_cmd led_cmd = {
144 .id = led_id, 78 .id = IWL_LED_LINK,
145 .on = 0, 79 .on = 0,
146 .off = 0, 80 .off = 0,
147 .interval = IWL_DEF_LED_INTRVL 81 .interval = IWL_DEF_LED_INTRVL
148 }; 82 };
149 IWL_DEBUG_LED(priv, "led off %d\n", led_id); 83 IWL_DEBUG_LED(priv, "led off\n");
150 return iwl_send_led_cmd(priv, &led_cmd); 84 return iwl3945_send_led_cmd(priv, &led_cmd);
151} 85}
152 86
153/* 87const struct iwl_led_ops iwl3945_led_ops = {
154 * Set led on in case of association 88 .cmd = iwl3945_send_led_cmd,
155 * */ 89 .on = iwl3945_led_on,
156static int iwl3945_led_associate(struct iwl_priv *priv, int led_id) 90 .off = iwl3945_led_off,
157{ 91};
158 IWL_DEBUG_LED(priv, "Associated\n");
159
160 priv->allow_blinking = 1;
161 return iwl3945_led_on(priv, led_id);
162}
163/* Set Led off in case of disassociation */
164static int iwl3945_led_disassociate(struct iwl_priv *priv, int led_id)
165{
166 IWL_DEBUG_LED(priv, "Disassociated\n");
167
168 priv->allow_blinking = 0;
169
170 return 0;
171}
172
173/*
174 * brightness call back function for Tx/Rx LED
175 */
176static int iwl3945_led_associated(struct iwl_priv *priv, int led_id)
177{
178 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
179 !test_bit(STATUS_READY, &priv->status))
180 return 0;
181
182
183 /* start counting Tx/Rx bytes */
184 if (!priv->last_blink_time && priv->allow_blinking)
185 priv->last_blink_time = jiffies;
186 return 0;
187}
188
189/*
190 * brightness call back for association and radio
191 */
192static void iwl3945_led_brightness_set(struct led_classdev *led_cdev,
193 enum led_brightness brightness)
194{
195 struct iwl_led *led = container_of(led_cdev,
196 struct iwl_led, led_dev);
197 struct iwl_priv *priv = led->priv;
198
199 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
200 return;
201
202 IWL_DEBUG_LED(priv, "Led type = %s brightness = %d\n",
203 led_type_str[led->type], brightness);
204
205 switch (brightness) {
206 case LED_FULL:
207 if (led->led_on)
208 led->led_on(priv, IWL_LED_LINK);
209 break;
210 case LED_OFF:
211 if (led->led_off)
212 led->led_off(priv, IWL_LED_LINK);
213 break;
214 default:
215 if (led->led_pattern) {
216 int idx = iwl3945_brightness_to_idx(brightness);
217 led->led_pattern(priv, IWL_LED_LINK, idx);
218 }
219 break;
220 }
221}
222
223/*
224 * Register led class with the system
225 */
226static int iwl3945_led_register_led(struct iwl_priv *priv,
227 struct iwl_led *led,
228 enum led_type type, u8 set_led,
229 char *trigger)
230{
231 struct device *device = wiphy_dev(priv->hw->wiphy);
232 int ret;
233
234 led->led_dev.name = led->name;
235 led->led_dev.brightness_set = iwl3945_led_brightness_set;
236 led->led_dev.default_trigger = trigger;
237
238 led->priv = priv;
239 led->type = type;
240
241 ret = led_classdev_register(device, &led->led_dev);
242 if (ret) {
243 IWL_ERR(priv, "Error: failed to register led handler.\n");
244 return ret;
245 }
246
247 led->registered = 1;
248
249 if (set_led && led->led_on)
250 led->led_on(priv, IWL_LED_LINK);
251 return 0;
252}
253
254
255/*
256 * calculate blink rate according to last 2 sec Tx/Rx activities
257 */
258static inline u8 get_blink_rate(struct iwl_priv *priv)
259{
260 int index;
261 s64 tpt = priv->rxtxpackets;
262
263 if (tpt < 0)
264 tpt = -tpt;
265
266 IWL_DEBUG_LED(priv, "tpt %lld \n", (long long)tpt);
267
268 if (!priv->allow_blinking)
269 index = IWL_MAX_BLINK_TBL;
270 else
271 for (index = 0; index < IWL_MAX_BLINK_TBL; index++)
272 if (tpt > (blink_tbl[index].brightness * IWL_1MB_RATE))
273 break;
274
275 IWL_DEBUG_LED(priv, "LED BLINK IDX=%d\n", index);
276 return index;
277}
278
279/*
280 * this function called from handler. Since setting Led command can
281 * happen very frequent we postpone led command to be called from
282 * REPLY handler so we know ucode is up
283 */
284void iwl3945_led_background(struct iwl_priv *priv)
285{
286 u8 blink_idx;
287
288 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
289 priv->last_blink_time = 0;
290 return;
291 }
292 if (iwl_is_rfkill(priv)) {
293 priv->last_blink_time = 0;
294 return;
295 }
296
297 if (!priv->allow_blinking) {
298 priv->last_blink_time = 0;
299 if (priv->last_blink_rate != IWL_SOLID_BLINK_IDX) {
300 priv->last_blink_rate = IWL_SOLID_BLINK_IDX;
301 iwl3945_led_pattern(priv, IWL_LED_LINK,
302 IWL_SOLID_BLINK_IDX);
303 }
304 return;
305 }
306 if (!priv->last_blink_time ||
307 !time_after(jiffies, priv->last_blink_time +
308 msecs_to_jiffies(1000)))
309 return;
310
311 blink_idx = get_blink_rate(priv);
312
313 /* call only if blink rate change */
314 if (blink_idx != priv->last_blink_rate)
315 iwl3945_led_pattern(priv, IWL_LED_LINK, blink_idx);
316
317 priv->last_blink_time = jiffies;
318 priv->last_blink_rate = blink_idx;
319 priv->rxtxpackets = 0;
320}
321
322
323/* Register all led handler */
324int iwl3945_led_register(struct iwl_priv *priv)
325{
326 char *trigger;
327 int ret;
328
329 priv->last_blink_rate = 0;
330 priv->rxtxpackets = 0;
331 priv->led_tpt = 0;
332 priv->last_blink_time = 0;
333 priv->allow_blinking = 0;
334
335 trigger = ieee80211_get_radio_led_name(priv->hw);
336 snprintf(priv->led[IWL_LED_TRG_RADIO].name,
337 sizeof(priv->led[IWL_LED_TRG_RADIO].name), "iwl-%s::radio",
338 wiphy_name(priv->hw->wiphy));
339
340 priv->led[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on;
341 priv->led[IWL_LED_TRG_RADIO].led_off = iwl3945_led_off;
342 priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL;
343
344 ret = iwl3945_led_register_led(priv,
345 &priv->led[IWL_LED_TRG_RADIO],
346 IWL_LED_TRG_RADIO, 1, trigger);
347
348 if (ret)
349 goto exit_fail;
350
351 trigger = ieee80211_get_assoc_led_name(priv->hw);
352 snprintf(priv->led[IWL_LED_TRG_ASSOC].name,
353 sizeof(priv->led[IWL_LED_TRG_ASSOC].name), "iwl-%s::assoc",
354 wiphy_name(priv->hw->wiphy));
355
356 ret = iwl3945_led_register_led(priv,
357 &priv->led[IWL_LED_TRG_ASSOC],
358 IWL_LED_TRG_ASSOC, 0, trigger);
359
360 /* for assoc always turn led on */
361 priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_associate;
362 priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_disassociate;
363 priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
364
365 if (ret)
366 goto exit_fail;
367
368 trigger = ieee80211_get_rx_led_name(priv->hw);
369 snprintf(priv->led[IWL_LED_TRG_RX].name,
370 sizeof(priv->led[IWL_LED_TRG_RX].name), "iwl-%s::RX",
371 wiphy_name(priv->hw->wiphy));
372
373 ret = iwl3945_led_register_led(priv,
374 &priv->led[IWL_LED_TRG_RX],
375 IWL_LED_TRG_RX, 0, trigger);
376
377 priv->led[IWL_LED_TRG_RX].led_on = iwl3945_led_associated;
378 priv->led[IWL_LED_TRG_RX].led_off = iwl3945_led_associated;
379 priv->led[IWL_LED_TRG_RX].led_pattern = iwl3945_led_pattern;
380
381 if (ret)
382 goto exit_fail;
383
384 trigger = ieee80211_get_tx_led_name(priv->hw);
385 snprintf(priv->led[IWL_LED_TRG_TX].name,
386 sizeof(priv->led[IWL_LED_TRG_TX].name), "iwl-%s::TX",
387 wiphy_name(priv->hw->wiphy));
388
389 ret = iwl3945_led_register_led(priv,
390 &priv->led[IWL_LED_TRG_TX],
391 IWL_LED_TRG_TX, 0, trigger);
392
393 priv->led[IWL_LED_TRG_TX].led_on = iwl3945_led_associated;
394 priv->led[IWL_LED_TRG_TX].led_off = iwl3945_led_associated;
395 priv->led[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern;
396
397 if (ret)
398 goto exit_fail;
399
400 return 0;
401
402exit_fail:
403 iwl3945_led_unregister(priv);
404 return ret;
405}
406
407
408/* unregister led class */
409static void iwl3945_led_unregister_led(struct iwl_led *led, u8 set_led)
410{
411 if (!led->registered)
412 return;
413
414 led_classdev_unregister(&led->led_dev);
415
416 if (set_led)
417 led->led_dev.brightness_set(&led->led_dev, LED_OFF);
418 led->registered = 0;
419}
420
421/* Unregister all led handlers */
422void iwl3945_led_unregister(struct iwl_priv *priv)
423{
424 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0);
425 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RX], 0);
426 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_TX], 0);
427 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1);
428}
429
430#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.h b/drivers/net/wireless/iwlwifi/iwl-3945-led.h
index 3b65642258ca..ce990adc51e7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-led.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -24,23 +24,9 @@
24 * 24 *
25 *****************************************************************************/ 25 *****************************************************************************/
26 26
27#ifndef IWL3945_LEDS_H 27#ifndef __iwl_3945_led_h__
28#define IWL3945_LEDS_H 28#define __iwl_3945_led_h__
29 29
30struct iwl_priv; 30extern const struct iwl_led_ops iwl3945_led_ops;
31 31
32#ifdef CONFIG_IWLWIFI_LEDS 32#endif /* __iwl_3945_led_h__ */
33
34#include "iwl-led.h"
35
36extern int iwl3945_led_register(struct iwl_priv *priv);
37extern void iwl3945_led_unregister(struct iwl_priv *priv);
38extern void iwl3945_led_background(struct iwl_priv *priv);
39
40#else
41static inline int iwl3945_led_register(struct iwl_priv *priv) { return 0; }
42static inline void iwl3945_led_unregister(struct iwl_priv *priv) {}
43static inline void iwl3945_led_background(struct iwl_priv *priv) {}
44
45#endif /* IWLWIFI_LEDS*/
46#endif /* IWL3945_LEDS_H */
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
index cbb0585083a9..902c4d4293e9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -27,6 +27,7 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/init.h> 28#include <linux/init.h>
29#include <linux/skbuff.h> 29#include <linux/skbuff.h>
30#include <linux/slab.h>
30#include <linux/wireless.h> 31#include <linux/wireless.h>
31#include <net/mac80211.h> 32#include <net/mac80211.h>
32 33
@@ -42,38 +43,6 @@
42 43
43#define RS_NAME "iwl-3945-rs" 44#define RS_NAME "iwl-3945-rs"
44 45
45struct iwl3945_rate_scale_data {
46 u64 data;
47 s32 success_counter;
48 s32 success_ratio;
49 s32 counter;
50 s32 average_tpt;
51 unsigned long stamp;
52};
53
54struct iwl3945_rs_sta {
55 spinlock_t lock;
56 struct iwl_priv *priv;
57 s32 *expected_tpt;
58 unsigned long last_partial_flush;
59 unsigned long last_flush;
60 u32 flush_time;
61 u32 last_tx_packets;
62 u32 tx_packets;
63 u8 tgg;
64 u8 flush_pending;
65 u8 start_rate;
66 u8 ibss_sta_added;
67 struct timer_list rate_scale_flush;
68 struct iwl3945_rate_scale_data win[IWL_RATE_COUNT_3945];
69#ifdef CONFIG_MAC80211_DEBUGFS
70 struct dentry *rs_sta_dbgfs_stats_table_file;
71#endif
72
73 /* used to be in sta_info */
74 int last_txrate_idx;
75};
76
77static s32 iwl3945_expected_tpt_g[IWL_RATE_COUNT_3945] = { 46static s32 iwl3945_expected_tpt_g[IWL_RATE_COUNT_3945] = {
78 7, 13, 35, 58, 0, 0, 76, 104, 130, 168, 191, 202 47 7, 13, 35, 58, 0, 0, 76, 104, 130, 168, 191, 202
79}; 48};
@@ -370,6 +339,28 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband,
370 339
371 IWL_DEBUG_RATE(priv, "enter\n"); 340 IWL_DEBUG_RATE(priv, "enter\n");
372 341
342 spin_lock_init(&rs_sta->lock);
343
344 rs_sta->priv = priv;
345
346 rs_sta->start_rate = IWL_RATE_INVALID;
347
348 /* default to just 802.11b */
349 rs_sta->expected_tpt = iwl3945_expected_tpt_b;
350
351 rs_sta->last_partial_flush = jiffies;
352 rs_sta->last_flush = jiffies;
353 rs_sta->flush_time = IWL_RATE_FLUSH;
354 rs_sta->last_tx_packets = 0;
355 rs_sta->ibss_sta_added = 0;
356
357 init_timer(&rs_sta->rate_scale_flush);
358 rs_sta->rate_scale_flush.data = (unsigned long)rs_sta;
359 rs_sta->rate_scale_flush.function = iwl3945_bg_rate_scale_flush;
360
361 for (i = 0; i < IWL_RATE_COUNT_3945; i++)
362 iwl3945_clear_window(&rs_sta->win[i]);
363
373 /* TODO: what is a good starting rate for STA? About middle? Maybe not 364 /* TODO: what is a good starting rate for STA? About middle? Maybe not
374 * the lowest or the highest rate.. Could consider using RSSI from 365 * the lowest or the highest rate.. Could consider using RSSI from
375 * previous packets? Need to have IEEE 802.1X auth succeed immediately 366 * previous packets? Need to have IEEE 802.1X auth succeed immediately
@@ -409,45 +400,11 @@ static void *rs_alloc_sta(void *iwl_priv, struct ieee80211_sta *sta, gfp_t gfp)
409{ 400{
410 struct iwl3945_rs_sta *rs_sta; 401 struct iwl3945_rs_sta *rs_sta;
411 struct iwl3945_sta_priv *psta = (void *) sta->drv_priv; 402 struct iwl3945_sta_priv *psta = (void *) sta->drv_priv;
412 struct iwl_priv *priv = iwl_priv; 403 struct iwl_priv *priv __maybe_unused = iwl_priv;
413 int i;
414
415 /*
416 * XXX: If it's using sta->drv_priv anyway, it might
417 * as well just put all the information there.
418 */
419 404
420 IWL_DEBUG_RATE(priv, "enter\n"); 405 IWL_DEBUG_RATE(priv, "enter\n");
421 406
422 rs_sta = kzalloc(sizeof(struct iwl3945_rs_sta), gfp); 407 rs_sta = &psta->rs_sta;
423 if (!rs_sta) {
424 IWL_DEBUG_RATE(priv, "leave: ENOMEM\n");
425 return NULL;
426 }
427
428 psta->rs_sta = rs_sta;
429
430 spin_lock_init(&rs_sta->lock);
431
432 rs_sta->priv = priv;
433
434 rs_sta->start_rate = IWL_RATE_INVALID;
435
436 /* default to just 802.11b */
437 rs_sta->expected_tpt = iwl3945_expected_tpt_b;
438
439 rs_sta->last_partial_flush = jiffies;
440 rs_sta->last_flush = jiffies;
441 rs_sta->flush_time = IWL_RATE_FLUSH;
442 rs_sta->last_tx_packets = 0;
443 rs_sta->ibss_sta_added = 0;
444
445 init_timer(&rs_sta->rate_scale_flush);
446 rs_sta->rate_scale_flush.data = (unsigned long)rs_sta;
447 rs_sta->rate_scale_flush.function = &iwl3945_bg_rate_scale_flush;
448
449 for (i = 0; i < IWL_RATE_COUNT_3945; i++)
450 iwl3945_clear_window(&rs_sta->win[i]);
451 408
452 IWL_DEBUG_RATE(priv, "leave\n"); 409 IWL_DEBUG_RATE(priv, "leave\n");
453 410
@@ -458,14 +415,11 @@ static void rs_free_sta(void *iwl_priv, struct ieee80211_sta *sta,
458 void *priv_sta) 415 void *priv_sta)
459{ 416{
460 struct iwl3945_sta_priv *psta = (void *) sta->drv_priv; 417 struct iwl3945_sta_priv *psta = (void *) sta->drv_priv;
461 struct iwl3945_rs_sta *rs_sta = priv_sta; 418 struct iwl3945_rs_sta *rs_sta = &psta->rs_sta;
462 struct iwl_priv *priv __maybe_unused = rs_sta->priv; 419 struct iwl_priv *priv __maybe_unused = rs_sta->priv;
463 420
464 psta->rs_sta = NULL;
465
466 IWL_DEBUG_RATE(priv, "enter\n"); 421 IWL_DEBUG_RATE(priv, "enter\n");
467 del_timer_sync(&rs_sta->rate_scale_flush); 422 del_timer_sync(&rs_sta->rate_scale_flush);
468 kfree(rs_sta);
469 IWL_DEBUG_RATE(priv, "leave\n"); 423 IWL_DEBUG_RATE(priv, "leave\n");
470} 424}
471 425
@@ -960,14 +914,15 @@ void iwl3945_rate_scale_init(struct ieee80211_hw *hw, s32 sta_id)
960 914
961 rcu_read_lock(); 915 rcu_read_lock();
962 916
963 sta = ieee80211_find_sta(hw, priv->stations[sta_id].sta.sta.addr); 917 sta = ieee80211_find_sta(priv->vif,
918 priv->stations[sta_id].sta.sta.addr);
964 if (!sta) { 919 if (!sta) {
965 rcu_read_unlock(); 920 rcu_read_unlock();
966 return; 921 return;
967 } 922 }
968 923
969 psta = (void *) sta->drv_priv; 924 psta = (void *) sta->drv_priv;
970 rs_sta = psta->rs_sta; 925 rs_sta = &psta->rs_sta;
971 926
972 spin_lock_irqsave(&rs_sta->lock, flags); 927 spin_lock_irqsave(&rs_sta->lock, flags);
973 928
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index f059b49dc691..0728054a22d4 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -27,6 +27,7 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/slab.h>
30#include <linux/pci.h> 31#include <linux/pci.h>
31#include <linux/dma-mapping.h> 32#include <linux/dma-mapping.h>
32#include <linux/delay.h> 33#include <linux/delay.h>
@@ -45,9 +46,10 @@
45#include "iwl-sta.h" 46#include "iwl-sta.h"
46#include "iwl-3945.h" 47#include "iwl-3945.h"
47#include "iwl-eeprom.h" 48#include "iwl-eeprom.h"
48#include "iwl-helpers.h"
49#include "iwl-core.h" 49#include "iwl-core.h"
50#include "iwl-agn-rs.h" 50#include "iwl-helpers.h"
51#include "iwl-led.h"
52#include "iwl-3945-led.h"
51 53
52#define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \ 54#define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np) \
53 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ 55 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
@@ -183,7 +185,7 @@ static int iwl3945_hwrate_to_plcp_idx(u8 plcp)
183{ 185{
184 int idx; 186 int idx;
185 187
186 for (idx = 0; idx < IWL_RATE_COUNT; idx++) 188 for (idx = 0; idx < IWL_RATE_COUNT_3945; idx++)
187 if (iwl3945_rates[idx].plcp == plcp) 189 if (iwl3945_rates[idx].plcp == plcp)
188 return idx; 190 return idx;
189 return -1; 191 return -1;
@@ -293,7 +295,7 @@ static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv,
293static void iwl3945_rx_reply_tx(struct iwl_priv *priv, 295static void iwl3945_rx_reply_tx(struct iwl_priv *priv,
294 struct iwl_rx_mem_buffer *rxb) 296 struct iwl_rx_mem_buffer *rxb)
295{ 297{
296 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 298 struct iwl_rx_packet *pkt = rxb_addr(rxb);
297 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 299 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
298 int txq_id = SEQ_TO_QUEUE(sequence); 300 int txq_id = SEQ_TO_QUEUE(sequence);
299 int index = SEQ_TO_INDEX(sequence); 301 int index = SEQ_TO_INDEX(sequence);
@@ -353,16 +355,12 @@ static void iwl3945_rx_reply_tx(struct iwl_priv *priv,
353void iwl3945_hw_rx_statistics(struct iwl_priv *priv, 355void iwl3945_hw_rx_statistics(struct iwl_priv *priv,
354 struct iwl_rx_mem_buffer *rxb) 356 struct iwl_rx_mem_buffer *rxb)
355{ 357{
356 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 358 struct iwl_rx_packet *pkt = rxb_addr(rxb);
357 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n", 359 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
358 (int)sizeof(struct iwl3945_notif_statistics), 360 (int)sizeof(struct iwl3945_notif_statistics),
359 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK); 361 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
360 362
361 memcpy(&priv->statistics_39, pkt->u.raw, sizeof(priv->statistics_39)); 363 memcpy(&priv->statistics_39, pkt->u.raw, sizeof(priv->statistics_39));
362
363 iwl3945_led_background(priv);
364
365 priv->last_statistics_time = jiffies;
366} 364}
367 365
368/****************************************************************************** 366/******************************************************************************
@@ -545,14 +543,18 @@ static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv,
545 struct iwl_rx_mem_buffer *rxb, 543 struct iwl_rx_mem_buffer *rxb,
546 struct ieee80211_rx_status *stats) 544 struct ieee80211_rx_status *stats)
547{ 545{
548 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 546 struct iwl_rx_packet *pkt = rxb_addr(rxb);
549 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); 547 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
550 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); 548 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
551 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); 549 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
552 short len = le16_to_cpu(rx_hdr->len); 550 u16 len = le16_to_cpu(rx_hdr->len);
551 struct sk_buff *skb;
552 int ret;
553 __le16 fc = hdr->frame_control;
553 554
554 /* We received data from the HW, so stop the watchdog */ 555 /* We received data from the HW, so stop the watchdog */
555 if (unlikely((len + IWL39_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) { 556 if (unlikely(len + IWL39_RX_FRAME_SIZE >
557 PAGE_SIZE << priv->hw_params.rx_page_order)) {
556 IWL_DEBUG_DROP(priv, "Corruption detected!\n"); 558 IWL_DEBUG_DROP(priv, "Corruption detected!\n");
557 return; 559 return;
558 } 560 }
@@ -564,24 +566,50 @@ static void iwl3945_pass_packet_to_mac80211(struct iwl_priv *priv,
564 return; 566 return;
565 } 567 }
566 568
567 skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt); 569 skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
568 /* Set the size of the skb to the size of the frame */ 570 if (!skb) {
569 skb_put(rxb->skb, le16_to_cpu(rx_hdr->len)); 571 IWL_ERR(priv, "alloc_skb failed\n");
572 return;
573 }
570 574
571 if (!iwl3945_mod_params.sw_crypto) 575 if (!iwl3945_mod_params.sw_crypto)
572 iwl_set_decrypted_flag(priv, 576 iwl_set_decrypted_flag(priv,
573 (struct ieee80211_hdr *)rxb->skb->data, 577 (struct ieee80211_hdr *)rxb_addr(rxb),
574 le32_to_cpu(rx_end->status), stats); 578 le32_to_cpu(rx_end->status), stats);
575 579
576#ifdef CONFIG_IWLWIFI_LEDS 580 skb_reserve(skb, IWL_LINK_HDR_MAX);
577 if (ieee80211_is_data(hdr->frame_control)) 581 skb_add_rx_frag(skb, 0, rxb->page,
578 priv->rxtxpackets += len; 582 (void *)rx_hdr->payload - (void *)pkt, len);
579#endif 583
580 iwl_update_stats(priv, false, hdr->frame_control, len); 584 /* mac80211 currently doesn't support paged SKB. Convert it to
585 * linear SKB for management frame and data frame requires
586 * software decryption or software defragementation. */
587 if (ieee80211_is_mgmt(fc) ||
588 ieee80211_has_protected(fc) ||
589 ieee80211_has_morefrags(fc) ||
590 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG)
591 ret = skb_linearize(skb);
592 else
593 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
594 0 : -ENOMEM;
595
596 if (ret) {
597 kfree_skb(skb);
598 goto out;
599 }
600
601 /*
602 * XXX: We cannot touch the page and its virtual memory (pkt) after
603 * here. It might have already been freed by the above skb change.
604 */
605
606 iwl_update_stats(priv, false, fc, len);
607 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
581 608
582 memcpy(IEEE80211_SKB_RXCB(rxb->skb), stats, sizeof(*stats)); 609 ieee80211_rx(priv->hw, skb);
583 ieee80211_rx_irqsafe(priv->hw, rxb->skb); 610 out:
584 rxb->skb = NULL; 611 priv->alloc_rxb_page--;
612 rxb->page = NULL;
585} 613}
586 614
587#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) 615#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
@@ -591,7 +619,7 @@ static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
591{ 619{
592 struct ieee80211_hdr *header; 620 struct ieee80211_hdr *header;
593 struct ieee80211_rx_status rx_status; 621 struct ieee80211_rx_status rx_status;
594 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 622 struct iwl_rx_packet *pkt = rxb_addr(rxb);
595 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt); 623 struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
596 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt); 624 struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
597 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt); 625 struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
@@ -654,19 +682,13 @@ static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
654 snr = rx_stats_sig_avg / rx_stats_noise_diff; 682 snr = rx_stats_sig_avg / rx_stats_noise_diff;
655 rx_status.noise = rx_status.signal - 683 rx_status.noise = rx_status.signal -
656 iwl3945_calc_db_from_ratio(snr); 684 iwl3945_calc_db_from_ratio(snr);
657 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal,
658 rx_status.noise);
659
660 /* If noise info not available, calculate signal quality indicator (%)
661 * using just the dBm signal level. */
662 } else { 685 } else {
663 rx_status.noise = priv->last_rx_noise; 686 rx_status.noise = priv->last_rx_noise;
664 rx_status.qual = iwl3945_calc_sig_qual(rx_status.signal, 0);
665 } 687 }
666 688
667 689
668 IWL_DEBUG_STATS(priv, "Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n", 690 IWL_DEBUG_STATS(priv, "Rssi %d noise %d sig_avg %d noise_diff %d\n",
669 rx_status.signal, rx_status.noise, rx_status.qual, 691 rx_status.signal, rx_status.noise,
670 rx_stats_sig_avg, rx_stats_noise_diff); 692 rx_stats_sig_avg, rx_stats_noise_diff);
671 693
672 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt); 694 header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
@@ -784,36 +806,38 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
784 int sta_id, int tx_id) 806 int sta_id, int tx_id)
785{ 807{
786 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value; 808 u16 hw_value = ieee80211_get_tx_rate(priv->hw, info)->hw_value;
787 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT - 1); 809 u16 rate_index = min(hw_value & 0xffff, IWL_RATE_COUNT_3945);
788 u16 rate_mask; 810 u16 rate_mask;
789 int rate; 811 int rate;
790 u8 rts_retry_limit; 812 u8 rts_retry_limit;
791 u8 data_retry_limit; 813 u8 data_retry_limit;
792 __le32 tx_flags; 814 __le32 tx_flags;
793 __le16 fc = hdr->frame_control; 815 __le16 fc = hdr->frame_control;
794 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; 816 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
795 817
796 rate = iwl3945_rates[rate_index].plcp; 818 rate = iwl3945_rates[rate_index].plcp;
797 tx_flags = tx->tx_flags; 819 tx_flags = tx_cmd->tx_flags;
798 820
799 /* We need to figure out how to get the sta->supp_rates while 821 /* We need to figure out how to get the sta->supp_rates while
800 * in this running context */ 822 * in this running context */
801 rate_mask = IWL_RATES_MASK; 823 rate_mask = IWL_RATES_MASK;
802 824
825
826 /* Set retry limit on DATA packets and Probe Responses*/
827 if (ieee80211_is_probe_resp(fc))
828 data_retry_limit = 3;
829 else
830 data_retry_limit = IWL_DEFAULT_TX_RETRY;
831 tx_cmd->data_retry_limit = data_retry_limit;
832
803 if (tx_id >= IWL_CMD_QUEUE_NUM) 833 if (tx_id >= IWL_CMD_QUEUE_NUM)
804 rts_retry_limit = 3; 834 rts_retry_limit = 3;
805 else 835 else
806 rts_retry_limit = 7; 836 rts_retry_limit = 7;
807 837
808 if (ieee80211_is_probe_resp(fc)) { 838 if (data_retry_limit < rts_retry_limit)
809 data_retry_limit = 3; 839 rts_retry_limit = data_retry_limit;
810 if (data_retry_limit < rts_retry_limit) 840 tx_cmd->rts_retry_limit = rts_retry_limit;
811 rts_retry_limit = data_retry_limit;
812 } else
813 data_retry_limit = IWL_DEFAULT_TX_RETRY;
814
815 if (priv->data_retry_limit != -1)
816 data_retry_limit = priv->data_retry_limit;
817 841
818 if (ieee80211_is_mgmt(fc)) { 842 if (ieee80211_is_mgmt(fc)) {
819 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) { 843 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
@@ -831,22 +855,20 @@ void iwl3945_hw_build_tx_cmd_rate(struct iwl_priv *priv,
831 } 855 }
832 } 856 }
833 857
834 tx->rts_retry_limit = rts_retry_limit; 858 tx_cmd->rate = rate;
835 tx->data_retry_limit = data_retry_limit; 859 tx_cmd->tx_flags = tx_flags;
836 tx->rate = rate;
837 tx->tx_flags = tx_flags;
838 860
839 /* OFDM */ 861 /* OFDM */
840 tx->supp_rates[0] = 862 tx_cmd->supp_rates[0] =
841 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF; 863 ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
842 864
843 /* CCK */ 865 /* CCK */
844 tx->supp_rates[1] = (rate_mask & 0xF); 866 tx_cmd->supp_rates[1] = (rate_mask & 0xF);
845 867
846 IWL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X " 868 IWL_DEBUG_RATE(priv, "Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
847 "cck/ofdm mask: 0x%x/0x%x\n", sta_id, 869 "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
848 tx->rate, le32_to_cpu(tx->tx_flags), 870 tx_cmd->rate, le32_to_cpu(tx_cmd->tx_flags),
849 tx->supp_rates[1], tx->supp_rates[0]); 871 tx_cmd->supp_rates[1], tx_cmd->supp_rates[0]);
850} 872}
851 873
852u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags) 874u8 iwl3945_sync_sta(struct iwl_priv *priv, int sta_id, u16 tx_rate, u8 flags)
@@ -962,6 +984,11 @@ static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
962 984
963 iwl3945_hw_txq_ctx_free(priv); 985 iwl3945_hw_txq_ctx_free(priv);
964 986
987 /* allocate tx queue structure */
988 rc = iwl_alloc_txq_mem(priv);
989 if (rc)
990 return rc;
991
965 /* Tx CMD queue */ 992 /* Tx CMD queue */
966 rc = iwl3945_tx_reset(priv); 993 rc = iwl3945_tx_reset(priv);
967 if (rc) 994 if (rc)
@@ -986,41 +1013,25 @@ static int iwl3945_txq_ctx_reset(struct iwl_priv *priv)
986 return rc; 1013 return rc;
987} 1014}
988 1015
1016
1017/*
1018 * Start up 3945's basic functionality after it has been reset
1019 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1020 * NOTE: This does not load uCode nor start the embedded processor
1021 */
989static int iwl3945_apm_init(struct iwl_priv *priv) 1022static int iwl3945_apm_init(struct iwl_priv *priv)
990{ 1023{
991 int ret; 1024 int ret = iwl_apm_init(priv);
992
993 iwl_power_initialize(priv);
994
995 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
996 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
997 1025
998 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */ 1026 /* Clear APMG (NIC's internal power management) interrupts */
999 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS, 1027 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1000 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX); 1028 iwl_write_prph(priv, APMG_RTC_INT_STT_REG, 0xFFFFFFFF);
1001
1002 /* set "initialization complete" bit to move adapter
1003 * D0U* --> D0A* state */
1004 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1005
1006 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
1007 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1008 if (ret < 0) {
1009 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1010 goto out;
1011 }
1012
1013 /* enable DMA */
1014 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
1015 APMG_CLK_VAL_BSM_CLK_RQT);
1016
1017 udelay(20);
1018 1029
1019 /* disable L1-Active */ 1030 /* Reset radio chip */
1020 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 1031 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1021 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 1032 udelay(5);
1033 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
1022 1034
1023out:
1024 return ret; 1035 return ret;
1025} 1036}
1026 1037
@@ -1145,12 +1156,16 @@ void iwl3945_hw_txq_ctx_free(struct iwl_priv *priv)
1145 int txq_id; 1156 int txq_id;
1146 1157
1147 /* Tx queues */ 1158 /* Tx queues */
1148 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) 1159 if (priv->txq)
1149 if (txq_id == IWL_CMD_QUEUE_NUM) 1160 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num;
1150 iwl_cmd_queue_free(priv); 1161 txq_id++)
1151 else 1162 if (txq_id == IWL_CMD_QUEUE_NUM)
1152 iwl_tx_queue_free(priv, txq_id); 1163 iwl_cmd_queue_free(priv);
1164 else
1165 iwl_tx_queue_free(priv, txq_id);
1153 1166
1167 /* free tx queue structure */
1168 iwl_free_txq_mem(priv);
1154} 1169}
1155 1170
1156void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv) 1171void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
@@ -1159,6 +1174,7 @@ void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1159 1174
1160 /* stop SCD */ 1175 /* stop SCD */
1161 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0); 1176 iwl_write_prph(priv, ALM_SCD_MODE_REG, 0);
1177 iwl_write_prph(priv, ALM_SCD_TXFACT_REG, 0);
1162 1178
1163 /* reset TFD queues */ 1179 /* reset TFD queues */
1164 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) { 1180 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
@@ -1171,85 +1187,6 @@ void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
1171 iwl3945_hw_txq_ctx_free(priv); 1187 iwl3945_hw_txq_ctx_free(priv);
1172} 1188}
1173 1189
1174static int iwl3945_apm_stop_master(struct iwl_priv *priv)
1175{
1176 int ret = 0;
1177 unsigned long flags;
1178
1179 spin_lock_irqsave(&priv->lock, flags);
1180
1181 /* set stop master bit */
1182 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1183
1184 iwl_poll_direct_bit(priv, CSR_RESET,
1185 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1186
1187 if (ret < 0)
1188 goto out;
1189
1190out:
1191 spin_unlock_irqrestore(&priv->lock, flags);
1192 IWL_DEBUG_INFO(priv, "stop master\n");
1193
1194 return ret;
1195}
1196
1197static void iwl3945_apm_stop(struct iwl_priv *priv)
1198{
1199 unsigned long flags;
1200
1201 iwl3945_apm_stop_master(priv);
1202
1203 spin_lock_irqsave(&priv->lock, flags);
1204
1205 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1206
1207 udelay(10);
1208 /* clear "init complete" move adapter D0A* --> D0U state */
1209 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1210 spin_unlock_irqrestore(&priv->lock, flags);
1211}
1212
1213static int iwl3945_apm_reset(struct iwl_priv *priv)
1214{
1215 iwl3945_apm_stop_master(priv);
1216
1217
1218 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1219 udelay(10);
1220
1221 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1222
1223 iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
1224 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1225
1226 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
1227 APMG_CLK_VAL_BSM_CLK_RQT);
1228
1229 iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1230 iwl_write_prph(priv, APMG_RTC_INT_STT_REG,
1231 0xFFFFFFFF);
1232
1233 /* enable DMA */
1234 iwl_write_prph(priv, APMG_CLK_EN_REG,
1235 APMG_CLK_VAL_DMA_CLK_RQT |
1236 APMG_CLK_VAL_BSM_CLK_RQT);
1237 udelay(10);
1238
1239 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
1240 APMG_PS_CTRL_VAL_RESET_REQ);
1241 udelay(5);
1242 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1243 APMG_PS_CTRL_VAL_RESET_REQ);
1244
1245 /* Clear the 'host command active' bit... */
1246 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1247
1248 wake_up_interruptible(&priv->wait_command_queue);
1249
1250 return 0;
1251}
1252
1253/** 1190/**
1254 * iwl3945_hw_reg_adjust_power_by_temp 1191 * iwl3945_hw_reg_adjust_power_by_temp
1255 * return index delta into power gain settings table 1192 * return index delta into power gain settings table
@@ -1858,7 +1795,7 @@ int iwl3945_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
1858static int iwl3945_send_rxon_assoc(struct iwl_priv *priv) 1795static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1859{ 1796{
1860 int rc = 0; 1797 int rc = 0;
1861 struct iwl_rx_packet *res = NULL; 1798 struct iwl_rx_packet *pkt;
1862 struct iwl3945_rxon_assoc_cmd rxon_assoc; 1799 struct iwl3945_rxon_assoc_cmd rxon_assoc;
1863 struct iwl_host_cmd cmd = { 1800 struct iwl_host_cmd cmd = {
1864 .id = REPLY_RXON_ASSOC, 1801 .id = REPLY_RXON_ASSOC,
@@ -1887,14 +1824,13 @@ static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
1887 if (rc) 1824 if (rc)
1888 return rc; 1825 return rc;
1889 1826
1890 res = (struct iwl_rx_packet *)cmd.reply_skb->data; 1827 pkt = (struct iwl_rx_packet *)cmd.reply_page;
1891 if (res->hdr.flags & IWL_CMD_FAILED_MSK) { 1828 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
1892 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n"); 1829 IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
1893 rc = -EIO; 1830 rc = -EIO;
1894 } 1831 }
1895 1832
1896 priv->alloc_rxb_skb--; 1833 iwl_free_pages(priv, cmd.reply_page);
1897 dev_kfree_skb_any(cmd.reply_skb);
1898 1834
1899 return rc; 1835 return rc;
1900} 1836}
@@ -2016,11 +1952,7 @@ static int iwl3945_commit_rxon(struct iwl_priv *priv)
2016 } 1952 }
2017 1953
2018 /* Add the broadcast address so we can send broadcast frames */ 1954 /* Add the broadcast address so we can send broadcast frames */
2019 if (iwl_add_station(priv, iwl_bcast_addr, false, CMD_SYNC, NULL) == 1955 priv->cfg->ops->lib->add_bcast_station(priv);
2020 IWL_INVALID_STATION) {
2021 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
2022 return -EIO;
2023 }
2024 1956
2025 /* If we have set the ASSOC_MSK and we are in BSS mode then 1957 /* If we have set the ASSOC_MSK and we are in BSS mode then
2026 * add the IWL_AP_ID to the station rate table */ 1958 * add the IWL_AP_ID to the station rate table */
@@ -2042,12 +1974,6 @@ static int iwl3945_commit_rxon(struct iwl_priv *priv)
2042 return 0; 1974 return 0;
2043} 1975}
2044 1976
2045/* will add 3945 channel switch cmd handling later */
2046int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel)
2047{
2048 return 0;
2049}
2050
2051/** 1977/**
2052 * iwl3945_reg_txpower_periodic - called when time to check our temperature. 1978 * iwl3945_reg_txpower_periodic - called when time to check our temperature.
2053 * 1979 *
@@ -2221,7 +2147,7 @@ static void iwl3945_hw_reg_init_channel_groups(struct iwl_priv *priv)
2221 2147
2222 /* fill in channel group's nominal powers for each rate */ 2148 /* fill in channel group's nominal powers for each rate */
2223 for (rate_index = 0; 2149 for (rate_index = 0;
2224 rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) { 2150 rate_index < IWL_RATE_COUNT_3945; rate_index++, clip_pwrs++) {
2225 switch (rate_index) { 2151 switch (rate_index) {
2226 case IWL_RATE_36M_INDEX_TABLE: 2152 case IWL_RATE_36M_INDEX_TABLE:
2227 if (i == 0) /* B/G */ 2153 if (i == 0) /* B/G */
@@ -2545,11 +2471,9 @@ int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
2545 memset((void *)&priv->hw_params, 0, 2471 memset((void *)&priv->hw_params, 0,
2546 sizeof(struct iwl_hw_params)); 2472 sizeof(struct iwl_hw_params));
2547 2473
2548 priv->shared_virt = 2474 priv->shared_virt = dma_alloc_coherent(&priv->pci_dev->dev,
2549 pci_alloc_consistent(priv->pci_dev, 2475 sizeof(struct iwl3945_shared),
2550 sizeof(struct iwl3945_shared), 2476 &priv->shared_phys, GFP_KERNEL);
2551 &priv->shared_phys);
2552
2553 if (!priv->shared_virt) { 2477 if (!priv->shared_virt) {
2554 IWL_ERR(priv, "failed to allocate pci memory\n"); 2478 IWL_ERR(priv, "failed to allocate pci memory\n");
2555 mutex_unlock(&priv->mutex); 2479 mutex_unlock(&priv->mutex);
@@ -2557,11 +2481,10 @@ int iwl3945_hw_set_hw_params(struct iwl_priv *priv)
2557 } 2481 }
2558 2482
2559 /* Assign number of Usable TX queues */ 2483 /* Assign number of Usable TX queues */
2560 priv->hw_params.max_txq_num = IWL39_NUM_QUEUES; 2484 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
2561 2485
2562 priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd); 2486 priv->hw_params.tfd_size = sizeof(struct iwl3945_tfd);
2563 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_3K; 2487 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_3K);
2564 priv->hw_params.max_pkt_size = 2342;
2565 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; 2488 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
2566 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; 2489 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
2567 priv->hw_params.max_stations = IWL3945_STATION_COUNT; 2490 priv->hw_params.max_stations = IWL3945_STATION_COUNT;
@@ -2844,8 +2767,7 @@ static struct iwl_lib_ops iwl3945_lib = {
2844 .dump_nic_error_log = iwl3945_dump_nic_error_log, 2767 .dump_nic_error_log = iwl3945_dump_nic_error_log,
2845 .apm_ops = { 2768 .apm_ops = {
2846 .init = iwl3945_apm_init, 2769 .init = iwl3945_apm_init,
2847 .reset = iwl3945_apm_reset, 2770 .stop = iwl_apm_stop,
2848 .stop = iwl3945_apm_stop,
2849 .config = iwl3945_nic_config, 2771 .config = iwl3945_nic_config,
2850 .set_pwr_src = iwl3945_set_pwr_src, 2772 .set_pwr_src = iwl3945_set_pwr_src,
2851 }, 2773 },
@@ -2869,18 +2791,21 @@ static struct iwl_lib_ops iwl3945_lib = {
2869 .post_associate = iwl3945_post_associate, 2791 .post_associate = iwl3945_post_associate,
2870 .isr = iwl_isr_legacy, 2792 .isr = iwl_isr_legacy,
2871 .config_ap = iwl3945_config_ap, 2793 .config_ap = iwl3945_config_ap,
2794 .add_bcast_station = iwl3945_add_bcast_station,
2872}; 2795};
2873 2796
2874static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = { 2797static struct iwl_hcmd_utils_ops iwl3945_hcmd_utils = {
2875 .get_hcmd_size = iwl3945_get_hcmd_size, 2798 .get_hcmd_size = iwl3945_get_hcmd_size,
2876 .build_addsta_hcmd = iwl3945_build_addsta_hcmd, 2799 .build_addsta_hcmd = iwl3945_build_addsta_hcmd,
2800 .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2877}; 2801};
2878 2802
2879static struct iwl_ops iwl3945_ops = { 2803static const struct iwl_ops iwl3945_ops = {
2880 .ucode = &iwl3945_ucode, 2804 .ucode = &iwl3945_ucode,
2881 .lib = &iwl3945_lib, 2805 .lib = &iwl3945_lib,
2882 .hcmd = &iwl3945_hcmd, 2806 .hcmd = &iwl3945_hcmd,
2883 .utils = &iwl3945_hcmd_utils, 2807 .utils = &iwl3945_hcmd_utils,
2808 .led = &iwl3945_led_ops,
2884}; 2809};
2885 2810
2886static struct iwl_cfg iwl3945_bg_cfg = { 2811static struct iwl_cfg iwl3945_bg_cfg = {
@@ -2892,9 +2817,16 @@ static struct iwl_cfg iwl3945_bg_cfg = {
2892 .eeprom_size = IWL3945_EEPROM_IMG_SIZE, 2817 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2893 .eeprom_ver = EEPROM_3945_EEPROM_VERSION, 2818 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2894 .ops = &iwl3945_ops, 2819 .ops = &iwl3945_ops,
2820 .num_of_queues = IWL39_NUM_QUEUES,
2895 .mod_params = &iwl3945_mod_params, 2821 .mod_params = &iwl3945_mod_params,
2822 .pll_cfg_val = CSR39_ANA_PLL_CFG_VAL,
2823 .set_l0s = false,
2824 .use_bsm = true,
2896 .use_isr_legacy = true, 2825 .use_isr_legacy = true,
2897 .ht_greenfield_support = false, 2826 .ht_greenfield_support = false,
2827 .led_compensation = 64,
2828 .broken_powersave = true,
2829 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2898}; 2830};
2899 2831
2900static struct iwl_cfg iwl3945_abg_cfg = { 2832static struct iwl_cfg iwl3945_abg_cfg = {
@@ -2906,12 +2838,16 @@ static struct iwl_cfg iwl3945_abg_cfg = {
2906 .eeprom_size = IWL3945_EEPROM_IMG_SIZE, 2838 .eeprom_size = IWL3945_EEPROM_IMG_SIZE,
2907 .eeprom_ver = EEPROM_3945_EEPROM_VERSION, 2839 .eeprom_ver = EEPROM_3945_EEPROM_VERSION,
2908 .ops = &iwl3945_ops, 2840 .ops = &iwl3945_ops,
2841 .num_of_queues = IWL39_NUM_QUEUES,
2909 .mod_params = &iwl3945_mod_params, 2842 .mod_params = &iwl3945_mod_params,
2910 .use_isr_legacy = true, 2843 .use_isr_legacy = true,
2911 .ht_greenfield_support = false, 2844 .ht_greenfield_support = false,
2845 .led_compensation = 64,
2846 .broken_powersave = true,
2847 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2912}; 2848};
2913 2849
2914struct pci_device_id iwl3945_hw_card_ids[] = { 2850DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = {
2915 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)}, 2851 {IWL_PCI_DEVICE(0x4222, 0x1005, iwl3945_bg_cfg)},
2916 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)}, 2852 {IWL_PCI_DEVICE(0x4222, 0x1034, iwl3945_bg_cfg)},
2917 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)}, 2853 {IWL_PCI_DEVICE(0x4222, 0x1044, iwl3945_bg_cfg)},
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h
index 21679bf3a1aa..452dfd5456c6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -37,7 +37,7 @@
37#include <net/ieee80211_radiotap.h> 37#include <net/ieee80211_radiotap.h>
38 38
39/* Hardware specific file defines the PCI IDs table for that hardware module */ 39/* Hardware specific file defines the PCI IDs table for that hardware module */
40extern struct pci_device_id iwl3945_hw_card_ids[]; 40extern const struct pci_device_id iwl3945_hw_card_ids[];
41 41
42#include "iwl-csr.h" 42#include "iwl-csr.h"
43#include "iwl-prph.h" 43#include "iwl-prph.h"
@@ -46,7 +46,7 @@ extern struct pci_device_id iwl3945_hw_card_ids[];
46#include "iwl-debug.h" 46#include "iwl-debug.h"
47#include "iwl-power.h" 47#include "iwl-power.h"
48#include "iwl-dev.h" 48#include "iwl-dev.h"
49#include "iwl-3945-led.h" 49#include "iwl-led.h"
50 50
51/* Highest firmware API version supported */ 51/* Highest firmware API version supported */
52#define IWL3945_UCODE_API_MAX 2 52#define IWL3945_UCODE_API_MAX 2
@@ -74,8 +74,41 @@ extern struct pci_device_id iwl3945_hw_card_ids[];
74/* Module parameters accessible from iwl-*.c */ 74/* Module parameters accessible from iwl-*.c */
75extern struct iwl_mod_params iwl3945_mod_params; 75extern struct iwl_mod_params iwl3945_mod_params;
76 76
77struct iwl3945_rate_scale_data {
78 u64 data;
79 s32 success_counter;
80 s32 success_ratio;
81 s32 counter;
82 s32 average_tpt;
83 unsigned long stamp;
84};
85
86struct iwl3945_rs_sta {
87 spinlock_t lock;
88 struct iwl_priv *priv;
89 s32 *expected_tpt;
90 unsigned long last_partial_flush;
91 unsigned long last_flush;
92 u32 flush_time;
93 u32 last_tx_packets;
94 u32 tx_packets;
95 u8 tgg;
96 u8 flush_pending;
97 u8 start_rate;
98 u8 ibss_sta_added;
99 struct timer_list rate_scale_flush;
100 struct iwl3945_rate_scale_data win[IWL_RATE_COUNT_3945];
101#ifdef CONFIG_MAC80211_DEBUGFS
102 struct dentry *rs_sta_dbgfs_stats_table_file;
103#endif
104
105 /* used to be in sta_info */
106 int last_txrate_idx;
107};
108
109
77struct iwl3945_sta_priv { 110struct iwl3945_sta_priv {
78 struct iwl3945_rs_sta *rs_sta; 111 struct iwl3945_rs_sta rs_sta;
79}; 112};
80 113
81enum iwl3945_antenna { 114enum iwl3945_antenna {
@@ -130,12 +163,6 @@ struct iwl3945_frame {
130#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ) 163#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
131#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4) 164#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
132 165
133/*
134 * RX related structures and functions
135 */
136#define RX_FREE_BUFFERS 64
137#define RX_LOW_WATERMARK 8
138
139#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 166#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
140#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 167#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
141#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 168#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
@@ -144,24 +171,6 @@ struct iwl3945_frame {
144 171
145#define SCAN_INTERVAL 100 172#define SCAN_INTERVAL 100
146 173
147#define STATUS_HCMD_ACTIVE 0 /* host command in progress */
148#define STATUS_HCMD_SYNC_ACTIVE 1 /* sync host command in progress */
149#define STATUS_INT_ENABLED 2
150#define STATUS_RF_KILL_HW 3
151#define STATUS_INIT 5
152#define STATUS_ALIVE 6
153#define STATUS_READY 7
154#define STATUS_TEMPERATURE 8
155#define STATUS_GEO_CONFIGURED 9
156#define STATUS_EXIT_PENDING 10
157#define STATUS_STATISTICS 12
158#define STATUS_SCANNING 13
159#define STATUS_SCAN_ABORTING 14
160#define STATUS_SCAN_HW 15
161#define STATUS_POWER_PMI 16
162#define STATUS_FW_ERROR 17
163#define STATUS_CONF_PENDING 18
164
165#define MAX_TID_COUNT 9 174#define MAX_TID_COUNT 9
166 175
167#define IWL_INVALID_RATE 0xFF 176#define IWL_INVALID_RATE 0xFF
@@ -194,22 +203,13 @@ struct iwl3945_ibss_seq {
194 * for use by iwl-*.c 203 * for use by iwl-*.c
195 * 204 *
196 *****************************************************************************/ 205 *****************************************************************************/
197extern int iwl3945_power_init_handle(struct iwl_priv *priv);
198extern int iwl3945_eeprom_init(struct iwl_priv *priv);
199extern int iwl3945_calc_db_from_ratio(int sig_ratio); 206extern int iwl3945_calc_db_from_ratio(int sig_ratio);
200extern int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm);
201extern int iwl3945_tx_queue_init(struct iwl_priv *priv,
202 struct iwl_tx_queue *txq, int count, u32 id);
203extern void iwl3945_rx_replenish(void *data); 207extern void iwl3945_rx_replenish(void *data);
204extern void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq); 208extern void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
205extern void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq);
206extern int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len,
207 const void *data);
208extern int __must_check iwl3945_send_cmd(struct iwl_priv *priv,
209 struct iwl_host_cmd *cmd);
210extern unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv, 209extern unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
211 struct ieee80211_hdr *hdr,int left); 210 struct ieee80211_hdr *hdr,int left);
212extern void iwl3945_dump_nic_event_log(struct iwl_priv *priv); 211extern int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
212 char **buf, bool display);
213extern void iwl3945_dump_nic_error_log(struct iwl_priv *priv); 213extern void iwl3945_dump_nic_error_log(struct iwl_priv *priv);
214 214
215/* 215/*
@@ -280,8 +280,6 @@ extern void iwl3945_config_ap(struct iwl_priv *priv);
280 */ 280 */
281extern u8 iwl3945_hw_find_station(struct iwl_priv *priv, const u8 *bssid); 281extern u8 iwl3945_hw_find_station(struct iwl_priv *priv, const u8 *bssid);
282 282
283extern int iwl3945_hw_channel_switch(struct iwl_priv *priv, u16 channel);
284
285/* 283/*
286 * Forward declare iwl-3945.c functions for iwl-base.c 284 * Forward declare iwl-3945.c functions for iwl-base.c
287 */ 285 */
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h
index b34322a32458..67ef562e8db1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-4965-hw.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -76,12 +76,9 @@
76 76
77/* 77/*
78 * uCode queue management definitions ... 78 * uCode queue management definitions ...
79 * Queue #4 is the command queue for 3945 and 4965; map it to Tx FIFO chnl 4.
80 * The first queue used for block-ack aggregation is #7 (4965 only). 79 * The first queue used for block-ack aggregation is #7 (4965 only).
81 * All block-ack aggregation queues should map to Tx DMA/FIFO channel 7. 80 * All block-ack aggregation queues should map to Tx DMA/FIFO channel 7.
82 */ 81 */
83#define IWL_CMD_QUEUE_NUM 4
84#define IWL_CMD_FIFO_NUM 4
85#define IWL49_FIRST_AMPDU_QUEUE 7 82#define IWL49_FIRST_AMPDU_QUEUE 7
86 83
87/* Time constants */ 84/* Time constants */
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 6f703a041847..8972166386cb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -45,6 +45,7 @@
45#include "iwl-helpers.h" 45#include "iwl-helpers.h"
46#include "iwl-calib.h" 46#include "iwl-calib.h"
47#include "iwl-sta.h" 47#include "iwl-sta.h"
48#include "iwl-agn-led.h"
48 49
49static int iwl4965_send_tx_power(struct iwl_priv *priv); 50static int iwl4965_send_tx_power(struct iwl_priv *priv);
50static int iwl4965_hw_get_temperature(struct iwl_priv *priv); 51static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
@@ -62,8 +63,6 @@ static int iwl4965_hw_get_temperature(struct iwl_priv *priv);
62 63
63/* module parameters */ 64/* module parameters */
64static struct iwl_mod_params iwl4965_mod_params = { 65static struct iwl_mod_params iwl4965_mod_params = {
65 .num_of_queues = IWL49_NUM_QUEUES,
66 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
67 .amsdu_size_8K = 1, 66 .amsdu_size_8K = 1,
68 .restart_fw = 1, 67 .restart_fw = 1,
69 /* the rest are 0 by default */ 68 /* the rest are 0 by default */
@@ -319,63 +318,13 @@ static void iwl4965_txq_set_sched(struct iwl_priv *priv, u32 mask)
319 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask); 318 iwl_write_prph(priv, IWL49_SCD_TXFACT, mask);
320} 319}
321 320
322static int iwl4965_apm_init(struct iwl_priv *priv)
323{
324 int ret = 0;
325
326 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
327 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
328
329 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
330 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
331 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
332
333 /* set "initialization complete" bit to move adapter
334 * D0U* --> D0A* state */
335 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
336
337 /* wait for clock stabilization */
338 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
339 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
340 if (ret < 0) {
341 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
342 goto out;
343 }
344
345 /* enable DMA */
346 iwl_write_prph(priv, APMG_CLK_CTRL_REG, APMG_CLK_VAL_DMA_CLK_RQT |
347 APMG_CLK_VAL_BSM_CLK_RQT);
348
349 udelay(20);
350
351 /* disable L1-Active */
352 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
353 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
354
355out:
356 return ret;
357}
358
359
360static void iwl4965_nic_config(struct iwl_priv *priv) 321static void iwl4965_nic_config(struct iwl_priv *priv)
361{ 322{
362 unsigned long flags; 323 unsigned long flags;
363 u16 radio_cfg; 324 u16 radio_cfg;
364 u16 lctl;
365 325
366 spin_lock_irqsave(&priv->lock, flags); 326 spin_lock_irqsave(&priv->lock, flags);
367 327
368 lctl = iwl_pcie_link_ctl(priv);
369
370 /* HW bug W/A - negligible power consumption */
371 /* L1-ASPM is enabled by BIOS */
372 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
373 /* L1-ASPM enabled: disable L0S */
374 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
375 else
376 /* L1-ASPM disabled: enable L0S */
377 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
378
379 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG); 328 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
380 329
381 /* write radio config values to register */ 330 /* write radio config values to register */
@@ -396,79 +345,6 @@ static void iwl4965_nic_config(struct iwl_priv *priv)
396 spin_unlock_irqrestore(&priv->lock, flags); 345 spin_unlock_irqrestore(&priv->lock, flags);
397} 346}
398 347
399static int iwl4965_apm_stop_master(struct iwl_priv *priv)
400{
401 unsigned long flags;
402
403 spin_lock_irqsave(&priv->lock, flags);
404
405 /* set stop master bit */
406 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
407
408 iwl_poll_direct_bit(priv, CSR_RESET,
409 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
410
411 spin_unlock_irqrestore(&priv->lock, flags);
412 IWL_DEBUG_INFO(priv, "stop master\n");
413
414 return 0;
415}
416
417static void iwl4965_apm_stop(struct iwl_priv *priv)
418{
419 unsigned long flags;
420
421 iwl4965_apm_stop_master(priv);
422
423 spin_lock_irqsave(&priv->lock, flags);
424
425 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
426
427 udelay(10);
428 /* clear "init complete" move adapter D0A* --> D0U state */
429 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
430 spin_unlock_irqrestore(&priv->lock, flags);
431}
432
433static int iwl4965_apm_reset(struct iwl_priv *priv)
434{
435 int ret = 0;
436
437 iwl4965_apm_stop_master(priv);
438
439
440 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
441
442 udelay(10);
443
444 /* FIXME: put here L1A -L0S w/a */
445
446 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
447
448 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
449 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
450 if (ret < 0)
451 goto out;
452
453 udelay(10);
454
455 /* Enable DMA and BSM Clock */
456 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
457 APMG_CLK_VAL_BSM_CLK_RQT);
458
459 udelay(10);
460
461 /* disable L1A */
462 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
463 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
464
465 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
466 wake_up_interruptible(&priv->wait_command_queue);
467
468out:
469 return ret;
470}
471
472/* Reset differential Rx gains in NIC to prepare for chain noise calibration. 348/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
473 * Called after every association, but this runs only once! 349 * Called after every association, but this runs only once!
474 * ... once chain noise is calibrated the first time, it's good forever. */ 350 * ... once chain noise is calibrated the first time, it's good forever. */
@@ -496,14 +372,15 @@ static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
496static void iwl4965_gain_computation(struct iwl_priv *priv, 372static void iwl4965_gain_computation(struct iwl_priv *priv,
497 u32 *average_noise, 373 u32 *average_noise,
498 u16 min_average_noise_antenna_i, 374 u16 min_average_noise_antenna_i,
499 u32 min_average_noise) 375 u32 min_average_noise,
376 u8 default_chain)
500{ 377{
501 int i, ret; 378 int i, ret;
502 struct iwl_chain_noise_data *data = &priv->chain_noise_data; 379 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
503 380
504 data->delta_gain_code[min_average_noise_antenna_i] = 0; 381 data->delta_gain_code[min_average_noise_antenna_i] = 0;
505 382
506 for (i = 0; i < NUM_RX_CHAINS; i++) { 383 for (i = default_chain; i < NUM_RX_CHAINS; i++) {
507 s32 delta_g = 0; 384 s32 delta_g = 0;
508 385
509 if (!(data->disconn_array[i]) && 386 if (!(data->disconn_array[i]) &&
@@ -557,18 +434,6 @@ static void iwl4965_gain_computation(struct iwl_priv *priv,
557 data->beacon_count = 0; 434 data->beacon_count = 0;
558} 435}
559 436
560static void iwl4965_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
561 __le32 *tx_flags)
562{
563 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
564 *tx_flags |= TX_CMD_FLG_RTS_MSK;
565 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
566 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
567 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
568 *tx_flags |= TX_CMD_FLG_CTS_MSK;
569 }
570}
571
572static void iwl4965_bg_txpower_work(struct work_struct *work) 437static void iwl4965_bg_txpower_work(struct work_struct *work)
573{ 438{
574 struct iwl_priv *priv = container_of(work, struct iwl_priv, 439 struct iwl_priv *priv = container_of(work, struct iwl_priv,
@@ -663,7 +528,8 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
663 iwl_write_targ_mem(priv, a, 0); 528 iwl_write_targ_mem(priv, a, 0);
664 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4) 529 for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
665 iwl_write_targ_mem(priv, a, 0); 530 iwl_write_targ_mem(priv, a, 0);
666 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4) 531 for (; a < priv->scd_base_addr +
532 IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
667 iwl_write_targ_mem(priv, a, 0); 533 iwl_write_targ_mem(priv, a, 0);
668 534
669 /* Tel 4965 where to find Tx byte count tables */ 535 /* Tel 4965 where to find Tx byte count tables */
@@ -715,6 +581,13 @@ static int iwl4965_alive_notify(struct iwl_priv *priv)
715 581
716 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); 582 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
717 583
584 /* make sure all queue are not stopped */
585 memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
586 for (i = 0; i < 4; i++)
587 atomic_set(&priv->queue_stop_count[i], 0);
588
589 /* reset to 0 to enable all the queue first */
590 priv->txq_ctx_active_msk = 0;
718 /* Map each Tx/cmd queue to its corresponding fifo */ 591 /* Map each Tx/cmd queue to its corresponding fifo */
719 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) { 592 for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
720 int ac = default_queue_to_tx_fifo[i]; 593 int ac = default_queue_to_tx_fifo[i];
@@ -748,6 +621,10 @@ static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
748 621
749 .nrg_th_cck = 100, 622 .nrg_th_cck = 100,
750 .nrg_th_ofdm = 100, 623 .nrg_th_ofdm = 100,
624
625 .barker_corr_th_min = 190,
626 .barker_corr_th_min_mrc = 390,
627 .nrg_th_cca = 62,
751}; 628};
752 629
753static void iwl4965_set_ct_threshold(struct iwl_priv *priv) 630static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
@@ -764,19 +641,16 @@ static void iwl4965_set_ct_threshold(struct iwl_priv *priv)
764 */ 641 */
765static int iwl4965_hw_set_hw_params(struct iwl_priv *priv) 642static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
766{ 643{
644 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
645 priv->cfg->mod_params->num_of_queues <= IWL49_NUM_QUEUES)
646 priv->cfg->num_of_queues =
647 priv->cfg->mod_params->num_of_queues;
767 648
768 if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) || 649 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
769 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
770 IWL_ERR(priv,
771 "invalid queues_num, should be between %d and %d\n",
772 IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
773 return -EINVAL;
774 }
775
776 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
777 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM; 650 priv->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
778 priv->hw_params.scd_bc_tbls_size = 651 priv->hw_params.scd_bc_tbls_size =
779 IWL49_NUM_QUEUES * sizeof(struct iwl4965_scd_bc_tbl); 652 priv->cfg->num_of_queues *
653 sizeof(struct iwl4965_scd_bc_tbl);
780 priv->hw_params.tfd_size = sizeof(struct iwl_tfd); 654 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
781 priv->hw_params.max_stations = IWL4965_STATION_COUNT; 655 priv->hw_params.max_stations = IWL4965_STATION_COUNT;
782 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID; 656 priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
@@ -787,10 +661,10 @@ static int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
787 661
788 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR; 662 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
789 663
790 priv->hw_params.tx_chains_num = 2; 664 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
791 priv->hw_params.rx_chains_num = 2; 665 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
792 priv->hw_params.valid_tx_ant = ANT_A | ANT_B; 666 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
793 priv->hw_params.valid_rx_ant = ANT_A | ANT_B; 667 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
794 if (priv->cfg->ops->lib->temp_ops.set_ct_kill) 668 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
795 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv); 669 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
796 670
@@ -1337,7 +1211,7 @@ static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
1337 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info); 1211 iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
1338 1212
1339 /* calculate tx gain adjustment based on power supply voltage */ 1213 /* calculate tx gain adjustment based on power supply voltage */
1340 voltage = priv->calib_info->voltage; 1214 voltage = le16_to_cpu(priv->calib_info->voltage);
1341 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage); 1215 init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
1342 voltage_compensation = 1216 voltage_compensation =
1343 iwl4965_get_voltage_compensation(voltage, init_voltage); 1217 iwl4965_get_voltage_compensation(voltage, init_voltage);
@@ -1567,14 +1441,13 @@ static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
1567 return ret; 1441 return ret;
1568} 1442}
1569 1443
1570#ifdef IEEE80211_CONF_CHANNEL_SWITCH
1571static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel) 1444static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1572{ 1445{
1573 int rc; 1446 int rc;
1574 u8 band = 0; 1447 u8 band = 0;
1575 bool is_ht40 = false; 1448 bool is_ht40 = false;
1576 u8 ctrl_chan_high = 0; 1449 u8 ctrl_chan_high = 0;
1577 struct iwl4965_channel_switch_cmd cmd = { 0 }; 1450 struct iwl4965_channel_switch_cmd cmd;
1578 const struct iwl_channel_info *ch_info; 1451 const struct iwl_channel_info *ch_info;
1579 1452
1580 band = priv->band == IEEE80211_BAND_2GHZ; 1453 band = priv->band == IEEE80211_BAND_2GHZ;
@@ -1584,19 +1457,22 @@ static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1584 is_ht40 = is_ht40_channel(priv->staging_rxon.flags); 1457 is_ht40 = is_ht40_channel(priv->staging_rxon.flags);
1585 1458
1586 if (is_ht40 && 1459 if (is_ht40 &&
1587 (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK)) 1460 (priv->staging_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
1588 ctrl_chan_high = 1; 1461 ctrl_chan_high = 1;
1589 1462
1590 cmd.band = band; 1463 cmd.band = band;
1591 cmd.expect_beacon = 0; 1464 cmd.expect_beacon = 0;
1592 cmd.channel = cpu_to_le16(channel); 1465 cmd.channel = cpu_to_le16(channel);
1593 cmd.rxon_flags = priv->active_rxon.flags; 1466 cmd.rxon_flags = priv->staging_rxon.flags;
1594 cmd.rxon_filter_flags = priv->active_rxon.filter_flags; 1467 cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
1595 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time); 1468 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1596 if (ch_info) 1469 if (ch_info)
1597 cmd.expect_beacon = is_channel_radar(ch_info); 1470 cmd.expect_beacon = is_channel_radar(ch_info);
1598 else 1471 else {
1599 cmd.expect_beacon = 1; 1472 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1473 priv->active_rxon.channel, channel);
1474 return -EFAULT;
1475 }
1600 1476
1601 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40, 1477 rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_ht40,
1602 ctrl_chan_high, &cmd.tx_power); 1478 ctrl_chan_high, &cmd.tx_power);
@@ -1605,10 +1481,11 @@ static int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1605 return rc; 1481 return rc;
1606 } 1482 }
1607 1483
1608 rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd); 1484 priv->switch_rxon.channel = cpu_to_le16(channel);
1609 return rc; 1485 priv->switch_rxon.switch_in_progress = true;
1486
1487 return iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
1610} 1488}
1611#endif
1612 1489
1613/** 1490/**
1614 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array 1491 * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
@@ -1805,11 +1682,13 @@ static int iwl4965_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1805 u16 ssn_idx, u8 tx_fifo) 1682 u16 ssn_idx, u8 tx_fifo)
1806{ 1683{
1807 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || 1684 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1808 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { 1685 (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1686 <= txq_id)) {
1809 IWL_WARN(priv, 1687 IWL_WARN(priv,
1810 "queue number out of range: %d, must be %d to %d\n", 1688 "queue number out of range: %d, must be %d to %d\n",
1811 txq_id, IWL49_FIRST_AMPDU_QUEUE, 1689 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1812 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1); 1690 IWL49_FIRST_AMPDU_QUEUE +
1691 priv->cfg->num_of_ampdu_queues - 1);
1813 return -EINVAL; 1692 return -EINVAL;
1814 } 1693 }
1815 1694
@@ -1870,11 +1749,13 @@ static int iwl4965_txq_agg_enable(struct iwl_priv *priv, int txq_id,
1870 u16 ra_tid; 1749 u16 ra_tid;
1871 1750
1872 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) || 1751 if ((IWL49_FIRST_AMPDU_QUEUE > txq_id) ||
1873 (IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES <= txq_id)) { 1752 (IWL49_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
1753 <= txq_id)) {
1874 IWL_WARN(priv, 1754 IWL_WARN(priv,
1875 "queue number out of range: %d, must be %d to %d\n", 1755 "queue number out of range: %d, must be %d to %d\n",
1876 txq_id, IWL49_FIRST_AMPDU_QUEUE, 1756 txq_id, IWL49_FIRST_AMPDU_QUEUE,
1877 IWL49_FIRST_AMPDU_QUEUE + IWL49_NUM_AMPDU_QUEUES - 1); 1757 IWL49_FIRST_AMPDU_QUEUE +
1758 priv->cfg->num_of_ampdu_queues - 1);
1878 return -EINVAL; 1759 return -EINVAL;
1879 } 1760 }
1880 1761
@@ -1944,8 +1825,9 @@ static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
1944 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid; 1825 addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
1945 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid; 1826 addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
1946 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn; 1827 addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
1828 addsta->sleep_tx_count = cmd->sleep_tx_count;
1947 addsta->reserved1 = cpu_to_le16(0); 1829 addsta->reserved1 = cpu_to_le16(0);
1948 addsta->reserved2 = cpu_to_le32(0); 1830 addsta->reserved2 = cpu_to_le16(0);
1949 1831
1950 return (u16)sizeof(struct iwl4965_addsta_cmd); 1832 return (u16)sizeof(struct iwl4965_addsta_cmd);
1951} 1833}
@@ -1991,8 +1873,7 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
1991 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]); 1873 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1992 info->status.rates[0].count = tx_resp->failure_frame + 1; 1874 info->status.rates[0].count = tx_resp->failure_frame + 1;
1993 info->flags &= ~IEEE80211_TX_CTL_AMPDU; 1875 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1994 info->flags |= iwl_is_tx_success(status) ? 1876 info->flags |= iwl_tx_status_to_mac80211(status);
1995 IEEE80211_TX_STAT_ACK : 0;
1996 iwl_hwrate_to_tx_control(priv, rate_n_flags, info); 1877 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1997 /* FIXME: code repetition end */ 1878 /* FIXME: code repetition end */
1998 1879
@@ -2078,7 +1959,7 @@ static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
2078static void iwl4965_rx_reply_tx(struct iwl_priv *priv, 1959static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2079 struct iwl_rx_mem_buffer *rxb) 1960 struct iwl_rx_mem_buffer *rxb)
2080{ 1961{
2081 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1962 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2082 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 1963 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
2083 int txq_id = SEQ_TO_QUEUE(sequence); 1964 int txq_id = SEQ_TO_QUEUE(sequence);
2084 int index = SEQ_TO_INDEX(sequence); 1965 int index = SEQ_TO_INDEX(sequence);
@@ -2087,7 +1968,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2087 struct ieee80211_tx_info *info; 1968 struct ieee80211_tx_info *info;
2088 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0]; 1969 struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
2089 u32 status = le32_to_cpu(tx_resp->u.status); 1970 u32 status = le32_to_cpu(tx_resp->u.status);
2090 int tid = MAX_TID_COUNT; 1971 int uninitialized_var(tid);
2091 int sta_id; 1972 int sta_id;
2092 int freed; 1973 int freed;
2093 u8 *qc = NULL; 1974 u8 *qc = NULL;
@@ -2134,7 +2015,9 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2134 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn " 2015 IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn "
2135 "%d index %d\n", scd_ssn , index); 2016 "%d index %d\n", scd_ssn , index);
2136 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 2017 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2137 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 2018 if (qc)
2019 iwl_free_tfds_in_queue(priv, sta_id,
2020 tid, freed);
2138 2021
2139 if (priv->mac80211_registered && 2022 if (priv->mac80211_registered &&
2140 (iwl_queue_space(&txq->q) > txq->q.low_mark) && 2023 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
@@ -2147,8 +2030,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2147 } 2030 }
2148 } else { 2031 } else {
2149 info->status.rates[0].count = tx_resp->failure_frame + 1; 2032 info->status.rates[0].count = tx_resp->failure_frame + 1;
2150 info->flags |= iwl_is_tx_success(status) ? 2033 info->flags |= iwl_tx_status_to_mac80211(status);
2151 IEEE80211_TX_STAT_ACK : 0;
2152 iwl_hwrate_to_tx_control(priv, 2034 iwl_hwrate_to_tx_control(priv,
2153 le32_to_cpu(tx_resp->rate_n_flags), 2035 le32_to_cpu(tx_resp->rate_n_flags),
2154 info); 2036 info);
@@ -2162,13 +2044,14 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
2162 2044
2163 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 2045 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
2164 if (qc && likely(sta_id != IWL_INVALID_STATION)) 2046 if (qc && likely(sta_id != IWL_INVALID_STATION))
2165 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 2047 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
2048 else if (sta_id == IWL_INVALID_STATION)
2049 IWL_DEBUG_TX_REPLY(priv, "Station not known\n");
2166 2050
2167 if (priv->mac80211_registered && 2051 if (priv->mac80211_registered &&
2168 (iwl_queue_space(&txq->q) > txq->q.low_mark)) 2052 (iwl_queue_space(&txq->q) > txq->q.low_mark))
2169 iwl_wake_queue(priv, txq_id); 2053 iwl_wake_queue(priv, txq_id);
2170 } 2054 }
2171
2172 if (qc && likely(sta_id != IWL_INVALID_STATION)) 2055 if (qc && likely(sta_id != IWL_INVALID_STATION))
2173 iwl_txq_check_empty(priv, sta_id, tid, txq_id); 2056 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
2174 2057
@@ -2279,7 +2162,7 @@ static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
2279 .build_addsta_hcmd = iwl4965_build_addsta_hcmd, 2162 .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
2280 .chain_noise_reset = iwl4965_chain_noise_reset, 2163 .chain_noise_reset = iwl4965_chain_noise_reset,
2281 .gain_computation = iwl4965_gain_computation, 2164 .gain_computation = iwl4965_gain_computation,
2282 .rts_tx_cmd_flag = iwl4965_rts_tx_cmd_flag, 2165 .rts_tx_cmd_flag = iwlcore_rts_tx_cmd_flag,
2283 .calc_rssi = iwl4965_calc_rssi, 2166 .calc_rssi = iwl4965_calc_rssi,
2284}; 2167};
2285 2168
@@ -2301,10 +2184,10 @@ static struct iwl_lib_ops iwl4965_lib = {
2301 .load_ucode = iwl4965_load_bsm, 2184 .load_ucode = iwl4965_load_bsm,
2302 .dump_nic_event_log = iwl_dump_nic_event_log, 2185 .dump_nic_event_log = iwl_dump_nic_event_log,
2303 .dump_nic_error_log = iwl_dump_nic_error_log, 2186 .dump_nic_error_log = iwl_dump_nic_error_log,
2187 .set_channel_switch = iwl4965_hw_channel_switch,
2304 .apm_ops = { 2188 .apm_ops = {
2305 .init = iwl4965_apm_init, 2189 .init = iwl_apm_init,
2306 .reset = iwl4965_apm_reset, 2190 .stop = iwl_apm_stop,
2307 .stop = iwl4965_apm_stop,
2308 .config = iwl4965_nic_config, 2191 .config = iwl4965_nic_config,
2309 .set_pwr_src = iwl_set_pwr_src, 2192 .set_pwr_src = iwl_set_pwr_src,
2310 }, 2193 },
@@ -2333,13 +2216,15 @@ static struct iwl_lib_ops iwl4965_lib = {
2333 .temperature = iwl4965_temperature_calib, 2216 .temperature = iwl4965_temperature_calib,
2334 .set_ct_kill = iwl4965_set_ct_threshold, 2217 .set_ct_kill = iwl4965_set_ct_threshold,
2335 }, 2218 },
2219 .add_bcast_station = iwl_add_bcast_station,
2336}; 2220};
2337 2221
2338static struct iwl_ops iwl4965_ops = { 2222static const struct iwl_ops iwl4965_ops = {
2339 .ucode = &iwl4965_ucode, 2223 .ucode = &iwl4965_ucode,
2340 .lib = &iwl4965_lib, 2224 .lib = &iwl4965_lib,
2341 .hcmd = &iwl4965_hcmd, 2225 .hcmd = &iwl4965_hcmd,
2342 .utils = &iwl4965_hcmd_utils, 2226 .utils = &iwl4965_hcmd_utils,
2227 .led = &iwlagn_led_ops,
2343}; 2228};
2344 2229
2345struct iwl_cfg iwl4965_agn_cfg = { 2230struct iwl_cfg iwl4965_agn_cfg = {
@@ -2352,30 +2237,41 @@ struct iwl_cfg iwl4965_agn_cfg = {
2352 .eeprom_ver = EEPROM_4965_EEPROM_VERSION, 2237 .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
2353 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION, 2238 .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
2354 .ops = &iwl4965_ops, 2239 .ops = &iwl4965_ops,
2240 .num_of_queues = IWL49_NUM_QUEUES,
2241 .num_of_ampdu_queues = IWL49_NUM_AMPDU_QUEUES,
2355 .mod_params = &iwl4965_mod_params, 2242 .mod_params = &iwl4965_mod_params,
2243 .valid_tx_ant = ANT_AB,
2244 .valid_rx_ant = ANT_ABC,
2245 .pll_cfg_val = 0,
2246 .set_l0s = true,
2247 .use_bsm = true,
2356 .use_isr_legacy = true, 2248 .use_isr_legacy = true,
2357 .ht_greenfield_support = false, 2249 .ht_greenfield_support = false,
2358 .broken_powersave = true, 2250 .broken_powersave = true,
2251 .led_compensation = 61,
2252 .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS,
2253 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
2359}; 2254};
2360 2255
2361/* Module firmware */ 2256/* Module firmware */
2362MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX)); 2257MODULE_FIRMWARE(IWL4965_MODULE_FIRMWARE(IWL4965_UCODE_API_MAX));
2363 2258
2364module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444); 2259module_param_named(antenna, iwl4965_mod_params.antenna, int, S_IRUGO);
2365MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 2260MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
2366module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444); 2261module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, S_IRUGO);
2367MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); 2262MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
2368module_param_named( 2263module_param_named(
2369 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444); 2264 disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, S_IRUGO);
2370MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); 2265MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
2371 2266
2372module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444); 2267module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, S_IRUGO);
2373MODULE_PARM_DESC(queues_num, "number of hw queues."); 2268MODULE_PARM_DESC(queues_num, "number of hw queues.");
2374/* 11n */ 2269/* 11n */
2375module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, 0444); 2270module_param_named(11n_disable, iwl4965_mod_params.disable_11n, int, S_IRUGO);
2376MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); 2271MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
2377module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444); 2272module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K,
2273 int, S_IRUGO);
2378MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); 2274MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
2379 2275
2380module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444); 2276module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, S_IRUGO);
2381MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error"); 2277MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
index 4ef6804a455a..714e032f6217 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-5000-hw.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -92,11 +92,15 @@
92 92
93static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv) 93static inline s32 iwl_temp_calib_to_offset(struct iwl_priv *priv)
94{ 94{
95 u16 *temp_calib = (u16 *)iwl_eeprom_query_addr(priv, 95 u16 temperature, voltage;
96 EEPROM_5000_TEMPERATURE); 96 __le16 *temp_calib =
97 /* offset = temperature - voltage / coef */ 97 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_TEMPERATURE);
98 s32 offset = (s32)(temp_calib[0] - temp_calib[1] / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF); 98
99 return offset; 99 temperature = le16_to_cpu(temp_calib[0]);
100 voltage = le16_to_cpu(temp_calib[1]);
101
102 /* offset = temp - volt / coeff */
103 return (s32)(temperature - voltage / IWL_5150_VOLTAGE_TO_TEMPERATURE_COEFF);
100} 104}
101 105
102/* Fixed (non-configurable) rx data from phy */ 106/* Fixed (non-configurable) rx data from phy */
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 6e6f516ba404..e476acb53aa7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -43,6 +43,7 @@
43#include "iwl-io.h" 43#include "iwl-io.h"
44#include "iwl-sta.h" 44#include "iwl-sta.h"
45#include "iwl-helpers.h" 45#include "iwl-helpers.h"
46#include "iwl-agn-led.h"
46#include "iwl-5000-hw.h" 47#include "iwl-5000-hw.h"
47#include "iwl-6000-hw.h" 48#include "iwl-6000-hw.h"
48 49
@@ -72,157 +73,18 @@ static const u16 iwl5000_default_queue_to_tx_fifo[] = {
72 IWL_TX_FIFO_HCCA_2 73 IWL_TX_FIFO_HCCA_2
73}; 74};
74 75
75/* FIXME: same implementation as 4965 */ 76/* NIC configuration for 5000 series */
76static int iwl5000_apm_stop_master(struct iwl_priv *priv)
77{
78 unsigned long flags;
79
80 spin_lock_irqsave(&priv->lock, flags);
81
82 /* set stop master bit */
83 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
84
85 iwl_poll_direct_bit(priv, CSR_RESET,
86 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
87
88 spin_unlock_irqrestore(&priv->lock, flags);
89 IWL_DEBUG_INFO(priv, "stop master\n");
90
91 return 0;
92}
93
94
95int iwl5000_apm_init(struct iwl_priv *priv)
96{
97 int ret = 0;
98
99 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
100 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
101
102 /* disable L0s without affecting L1 :don't wait for ICH L0s bug W/A) */
103 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
104 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
105
106 /* Set FH wait threshold to maximum (HW error during stress W/A) */
107 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
108
109 /* enable HAP INTA to move device L1a -> L0s */
110 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
111 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
112
113 if (priv->cfg->need_pll_cfg)
114 iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
115
116 /* set "initialization complete" bit to move adapter
117 * D0U* --> D0A* state */
118 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
119
120 /* wait for clock stabilization */
121 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
122 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
123 if (ret < 0) {
124 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
125 return ret;
126 }
127
128 /* enable DMA */
129 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
130
131 udelay(20);
132
133 /* disable L1-Active */
134 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
135 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
136
137 return ret;
138}
139
140/* FIXME: this is identical to 4965 */
141void iwl5000_apm_stop(struct iwl_priv *priv)
142{
143 unsigned long flags;
144
145 iwl5000_apm_stop_master(priv);
146
147 spin_lock_irqsave(&priv->lock, flags);
148
149 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
150
151 udelay(10);
152
153 /* clear "init complete" move adapter D0A* --> D0U state */
154 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
155
156 spin_unlock_irqrestore(&priv->lock, flags);
157}
158
159
160int iwl5000_apm_reset(struct iwl_priv *priv)
161{
162 int ret = 0;
163
164 iwl5000_apm_stop_master(priv);
165
166 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
167
168 udelay(10);
169
170
171 /* FIXME: put here L1A -L0S w/a */
172
173 if (priv->cfg->need_pll_cfg)
174 iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);
175
176 /* set "initialization complete" bit to move adapter
177 * D0U* --> D0A* state */
178 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
179
180 /* wait for clock stabilization */
181 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL,
182 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
183 if (ret < 0) {
184 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
185 goto out;
186 }
187
188 /* enable DMA */
189 iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
190
191 udelay(20);
192
193 /* disable L1-Active */
194 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
195 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
196out:
197
198 return ret;
199}
200
201
202/* NIC configuration for 5000 series and up */
203void iwl5000_nic_config(struct iwl_priv *priv) 77void iwl5000_nic_config(struct iwl_priv *priv)
204{ 78{
205 unsigned long flags; 79 unsigned long flags;
206 u16 radio_cfg; 80 u16 radio_cfg;
207 u16 lctl;
208 81
209 spin_lock_irqsave(&priv->lock, flags); 82 spin_lock_irqsave(&priv->lock, flags);
210 83
211 lctl = iwl_pcie_link_ctl(priv);
212
213 /* HW bug W/A */
214 /* L1-ASPM is enabled by BIOS */
215 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) == PCI_CFG_LINK_CTRL_VAL_L1_EN)
216 /* L1-APSM enabled: disable L0S */
217 iwl_set_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
218 else
219 /* L1-ASPM disabled: enable L0S */
220 iwl_clear_bit(priv, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
221
222 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG); 84 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
223 85
224 /* write radio config values to register */ 86 /* write radio config values to register */
225 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) < EEPROM_5000_RF_CFG_TYPE_MAX) 87 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) < EEPROM_RF_CONFIG_TYPE_MAX)
226 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 88 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
227 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) | 89 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
228 EEPROM_RF_CFG_STEP_MSK(radio_cfg) | 90 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
@@ -302,26 +164,39 @@ u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv)
302static void iwl5000_gain_computation(struct iwl_priv *priv, 164static void iwl5000_gain_computation(struct iwl_priv *priv,
303 u32 average_noise[NUM_RX_CHAINS], 165 u32 average_noise[NUM_RX_CHAINS],
304 u16 min_average_noise_antenna_i, 166 u16 min_average_noise_antenna_i,
305 u32 min_average_noise) 167 u32 min_average_noise,
168 u8 default_chain)
306{ 169{
307 int i; 170 int i;
308 s32 delta_g; 171 s32 delta_g;
309 struct iwl_chain_noise_data *data = &priv->chain_noise_data; 172 struct iwl_chain_noise_data *data = &priv->chain_noise_data;
310 173
311 /* Find Gain Code for the antennas B and C */ 174 /*
312 for (i = 1; i < NUM_RX_CHAINS; i++) { 175 * Find Gain Code for the chains based on "default chain"
176 */
177 for (i = default_chain + 1; i < NUM_RX_CHAINS; i++) {
313 if ((data->disconn_array[i])) { 178 if ((data->disconn_array[i])) {
314 data->delta_gain_code[i] = 0; 179 data->delta_gain_code[i] = 0;
315 continue; 180 continue;
316 } 181 }
317 delta_g = (1000 * ((s32)average_noise[0] - 182
183 delta_g = (priv->cfg->chain_noise_scale *
184 ((s32)average_noise[default_chain] -
318 (s32)average_noise[i])) / 1500; 185 (s32)average_noise[i])) / 1500;
186
319 /* bound gain by 2 bits value max, 3rd bit is sign */ 187 /* bound gain by 2 bits value max, 3rd bit is sign */
320 data->delta_gain_code[i] = 188 data->delta_gain_code[i] =
321 min(abs(delta_g), (long) CHAIN_NOISE_MAX_DELTA_GAIN_CODE); 189 min(abs(delta_g), (long) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
322 190
323 if (delta_g < 0) 191 if (delta_g < 0)
324 /* set negative sign */ 192 /*
193 * set negative sign ...
194 * note to Intel developers: This is uCode API format,
195 * not the format of any internal device registers.
196 * Do not change this format for e.g. 6050 or similar
197 * devices. Change format only if more resolution
198 * (i.e. more than 2 bits magnitude) is needed.
199 */
325 data->delta_gain_code[i] |= (1 << 2); 200 data->delta_gain_code[i] |= (1 << 2);
326 } 201 }
327 202
@@ -398,8 +273,8 @@ static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
398 273
399 .auto_corr_max_ofdm = 120, 274 .auto_corr_max_ofdm = 120,
400 .auto_corr_max_ofdm_mrc = 210, 275 .auto_corr_max_ofdm_mrc = 210,
401 .auto_corr_max_ofdm_x1 = 155, 276 .auto_corr_max_ofdm_x1 = 120,
402 .auto_corr_max_ofdm_mrc_x1 = 290, 277 .auto_corr_max_ofdm_mrc_x1 = 240,
403 278
404 .auto_corr_min_cck = 125, 279 .auto_corr_min_cck = 125,
405 .auto_corr_max_cck = 200, 280 .auto_corr_max_cck = 200,
@@ -407,6 +282,10 @@ static struct iwl_sensitivity_ranges iwl5000_sensitivity = {
407 .auto_corr_max_cck_mrc = 400, 282 .auto_corr_max_cck_mrc = 400,
408 .nrg_th_cck = 95, 283 .nrg_th_cck = 95,
409 .nrg_th_ofdm = 95, 284 .nrg_th_ofdm = 95,
285
286 .barker_corr_th_min = 190,
287 .barker_corr_th_min_mrc = 390,
288 .nrg_th_cca = 62,
410}; 289};
411 290
412static struct iwl_sensitivity_ranges iwl5150_sensitivity = { 291static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
@@ -429,6 +308,10 @@ static struct iwl_sensitivity_ranges iwl5150_sensitivity = {
429 .auto_corr_max_cck_mrc = 400, 308 .auto_corr_max_cck_mrc = 400,
430 .nrg_th_cck = 95, 309 .nrg_th_cck = 95,
431 .nrg_th_ofdm = 95, 310 .nrg_th_ofdm = 95,
311
312 .barker_corr_th_min = 190,
313 .barker_corr_th_min_mrc = 390,
314 .nrg_th_cca = 62,
432}; 315};
433 316
434const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv, 317const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
@@ -460,14 +343,15 @@ static void iwl5000_set_ct_threshold(struct iwl_priv *priv)
460static int iwl5000_set_Xtal_calib(struct iwl_priv *priv) 343static int iwl5000_set_Xtal_calib(struct iwl_priv *priv)
461{ 344{
462 struct iwl_calib_xtal_freq_cmd cmd; 345 struct iwl_calib_xtal_freq_cmd cmd;
463 u16 *xtal_calib = (u16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL); 346 __le16 *xtal_calib =
347 (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_5000_XTAL);
464 348
465 cmd.hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD; 349 cmd.hdr.op_code = IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD;
466 cmd.hdr.first_group = 0; 350 cmd.hdr.first_group = 0;
467 cmd.hdr.groups_num = 1; 351 cmd.hdr.groups_num = 1;
468 cmd.hdr.data_valid = 1; 352 cmd.hdr.data_valid = 1;
469 cmd.cap_pin1 = (u8)xtal_calib[0]; 353 cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
470 cmd.cap_pin2 = (u8)xtal_calib[1]; 354 cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
471 return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL], 355 return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
472 (u8 *)&cmd, sizeof(cmd)); 356 (u8 *)&cmd, sizeof(cmd));
473} 357}
@@ -493,7 +377,7 @@ static int iwl5000_send_calib_cfg(struct iwl_priv *priv)
493static void iwl5000_rx_calib_result(struct iwl_priv *priv, 377static void iwl5000_rx_calib_result(struct iwl_priv *priv,
494 struct iwl_rx_mem_buffer *rxb) 378 struct iwl_rx_mem_buffer *rxb)
495{ 379{
496 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 380 struct iwl_rx_packet *pkt = rxb_addr(rxb);
497 struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw; 381 struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
498 int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 382 int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
499 int index; 383 int index;
@@ -538,12 +422,14 @@ static void iwl5000_rx_calib_complete(struct iwl_priv *priv,
538/* 422/*
539 * ucode 423 * ucode
540 */ 424 */
541static int iwl5000_load_section(struct iwl_priv *priv, 425static int iwl5000_load_section(struct iwl_priv *priv, const char *name,
542 struct fw_desc *image, 426 struct fw_desc *image, u32 dst_addr)
543 u32 dst_addr)
544{ 427{
545 dma_addr_t phy_addr = image->p_addr; 428 dma_addr_t phy_addr = image->p_addr;
546 u32 byte_cnt = image->len; 429 u32 byte_cnt = image->len;
430 int ret;
431
432 priv->ucode_write_complete = 0;
547 433
548 iwl_write_direct32(priv, 434 iwl_write_direct32(priv,
549 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL), 435 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
@@ -573,57 +459,36 @@ static int iwl5000_load_section(struct iwl_priv *priv,
573 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE | 459 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
574 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD); 460 FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
575 461
576 return 0; 462 IWL_DEBUG_INFO(priv, "%s uCode section being loaded...\n", name);
577}
578
579static int iwl5000_load_given_ucode(struct iwl_priv *priv,
580 struct fw_desc *inst_image,
581 struct fw_desc *data_image)
582{
583 int ret = 0;
584
585 ret = iwl5000_load_section(priv, inst_image,
586 IWL50_RTC_INST_LOWER_BOUND);
587 if (ret)
588 return ret;
589
590 IWL_DEBUG_INFO(priv, "INST uCode section being loaded...\n");
591 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 463 ret = wait_event_interruptible_timeout(priv->wait_command_queue,
592 priv->ucode_write_complete, 5 * HZ); 464 priv->ucode_write_complete, 5 * HZ);
593 if (ret == -ERESTARTSYS) { 465 if (ret == -ERESTARTSYS) {
594 IWL_ERR(priv, "Could not load the INST uCode section due " 466 IWL_ERR(priv, "Could not load the %s uCode section due "
595 "to interrupt\n"); 467 "to interrupt\n", name);
596 return ret; 468 return ret;
597 } 469 }
598 if (!ret) { 470 if (!ret) {
599 IWL_ERR(priv, "Could not load the INST uCode section\n"); 471 IWL_ERR(priv, "Could not load the %s uCode section\n",
472 name);
600 return -ETIMEDOUT; 473 return -ETIMEDOUT;
601 } 474 }
602 475
603 priv->ucode_write_complete = 0; 476 return 0;
604 477}
605 ret = iwl5000_load_section(
606 priv, data_image, IWL50_RTC_DATA_LOWER_BOUND);
607 if (ret)
608 return ret;
609 478
610 IWL_DEBUG_INFO(priv, "DATA uCode section being loaded...\n"); 479static int iwl5000_load_given_ucode(struct iwl_priv *priv,
480 struct fw_desc *inst_image,
481 struct fw_desc *data_image)
482{
483 int ret = 0;
611 484
612 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 485 ret = iwl5000_load_section(priv, "INST", inst_image,
613 priv->ucode_write_complete, 5 * HZ); 486 IWL50_RTC_INST_LOWER_BOUND);
614 if (ret == -ERESTARTSYS) { 487 if (ret)
615 IWL_ERR(priv, "Could not load the INST uCode section due "
616 "to interrupt\n");
617 return ret; 488 return ret;
618 } else if (!ret) {
619 IWL_ERR(priv, "Could not load the DATA uCode section\n");
620 return -ETIMEDOUT;
621 } else
622 ret = 0;
623
624 priv->ucode_write_complete = 0;
625 489
626 return ret; 490 return iwl5000_load_section(priv, "DATA", data_image,
491 IWL50_RTC_DATA_LOWER_BOUND);
627} 492}
628 493
629int iwl5000_load_ucode(struct iwl_priv *priv) 494int iwl5000_load_ucode(struct iwl_priv *priv)
@@ -719,16 +584,6 @@ static void iwl5000_tx_queue_set_status(struct iwl_priv *priv,
719 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id); 584 scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
720} 585}
721 586
722static int iwl5000_send_wimax_coex(struct iwl_priv *priv)
723{
724 struct iwl_wimax_coex_cmd coex_cmd;
725
726 memset(&coex_cmd, 0, sizeof(coex_cmd));
727
728 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
729 sizeof(coex_cmd), &coex_cmd);
730}
731
732int iwl5000_alive_notify(struct iwl_priv *priv) 587int iwl5000_alive_notify(struct iwl_priv *priv)
733{ 588{
734 u32 a; 589 u32 a;
@@ -746,7 +601,8 @@ int iwl5000_alive_notify(struct iwl_priv *priv)
746 for (; a < priv->scd_base_addr + IWL50_SCD_TRANSLATE_TBL_OFFSET; 601 for (; a < priv->scd_base_addr + IWL50_SCD_TRANSLATE_TBL_OFFSET;
747 a += 4) 602 a += 4)
748 iwl_write_targ_mem(priv, a, 0); 603 iwl_write_targ_mem(priv, a, 0);
749 for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4) 604 for (; a < priv->scd_base_addr +
605 IWL50_SCD_TRANSLATE_TBL_OFFSET_QUEUE(priv->hw_params.max_txq_num); a += 4)
750 iwl_write_targ_mem(priv, a, 0); 606 iwl_write_targ_mem(priv, a, 0);
751 607
752 iwl_write_prph(priv, IWL50_SCD_DRAM_BASE_ADDR, 608 iwl_write_prph(priv, IWL50_SCD_DRAM_BASE_ADDR,
@@ -792,15 +648,26 @@ int iwl5000_alive_notify(struct iwl_priv *priv)
792 648
793 iwl5000_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); 649 iwl5000_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
794 650
651 /* make sure all queue are not stopped */
652 memset(&priv->queue_stopped[0], 0, sizeof(priv->queue_stopped));
653 for (i = 0; i < 4; i++)
654 atomic_set(&priv->queue_stop_count[i], 0);
655
656 /* reset to 0 to enable all the queue first */
657 priv->txq_ctx_active_msk = 0;
795 /* map qos queues to fifos one-to-one */ 658 /* map qos queues to fifos one-to-one */
796 for (i = 0; i < ARRAY_SIZE(iwl5000_default_queue_to_tx_fifo); i++) { 659 for (i = 0; i < ARRAY_SIZE(iwl5000_default_queue_to_tx_fifo); i++) {
797 int ac = iwl5000_default_queue_to_tx_fifo[i]; 660 int ac = iwl5000_default_queue_to_tx_fifo[i];
798 iwl_txq_ctx_activate(priv, i); 661 iwl_txq_ctx_activate(priv, i);
799 iwl5000_tx_queue_set_status(priv, &priv->txq[i], ac, 0); 662 iwl5000_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
800 } 663 }
801 /* TODO - need to initialize those FIFOs inside the loop above, 664
802 * not only mark them as active */ 665 /*
803 iwl_txq_ctx_activate(priv, 4); 666 * TODO - need to initialize these queues and map them to FIFOs
667 * in the loop above, not only mark them as active. We do this
668 * because we want the first aggregation queue to be queue #10,
669 * but do not use 8 or 9 otherwise yet.
670 */
804 iwl_txq_ctx_activate(priv, 7); 671 iwl_txq_ctx_activate(priv, 7);
805 iwl_txq_ctx_activate(priv, 8); 672 iwl_txq_ctx_activate(priv, 8);
806 iwl_txq_ctx_activate(priv, 9); 673 iwl_txq_ctx_activate(priv, 9);
@@ -808,7 +675,7 @@ int iwl5000_alive_notify(struct iwl_priv *priv)
808 spin_unlock_irqrestore(&priv->lock, flags); 675 spin_unlock_irqrestore(&priv->lock, flags);
809 676
810 677
811 iwl5000_send_wimax_coex(priv); 678 iwl_send_wimax_coex(priv);
812 679
813 iwl5000_set_Xtal_calib(priv); 680 iwl5000_set_Xtal_calib(priv);
814 iwl_send_calib_results(priv); 681 iwl_send_calib_results(priv);
@@ -818,32 +685,22 @@ int iwl5000_alive_notify(struct iwl_priv *priv)
818 685
819int iwl5000_hw_set_hw_params(struct iwl_priv *priv) 686int iwl5000_hw_set_hw_params(struct iwl_priv *priv)
820{ 687{
821 if ((priv->cfg->mod_params->num_of_queues > IWL50_NUM_QUEUES) || 688 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
822 (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) { 689 priv->cfg->mod_params->num_of_queues <= IWL50_NUM_QUEUES)
823 IWL_ERR(priv, 690 priv->cfg->num_of_queues =
824 "invalid queues_num, should be between %d and %d\n", 691 priv->cfg->mod_params->num_of_queues;
825 IWL_MIN_NUM_QUEUES, IWL50_NUM_QUEUES);
826 return -EINVAL;
827 }
828 692
829 priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues; 693 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
830 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM; 694 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
831 priv->hw_params.scd_bc_tbls_size = 695 priv->hw_params.scd_bc_tbls_size =
832 IWL50_NUM_QUEUES * sizeof(struct iwl5000_scd_bc_tbl); 696 priv->cfg->num_of_queues *
697 sizeof(struct iwl5000_scd_bc_tbl);
833 priv->hw_params.tfd_size = sizeof(struct iwl_tfd); 698 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
834 priv->hw_params.max_stations = IWL5000_STATION_COUNT; 699 priv->hw_params.max_stations = IWL5000_STATION_COUNT;
835 priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID; 700 priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
836 701
837 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { 702 priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
838 case CSR_HW_REV_TYPE_6x00: 703 priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
839 case CSR_HW_REV_TYPE_6x50:
840 priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE;
841 priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE;
842 break;
843 default:
844 priv->hw_params.max_data_size = IWL50_RTC_DATA_SIZE;
845 priv->hw_params.max_inst_size = IWL50_RTC_INST_SIZE;
846 }
847 704
848 priv->hw_params.max_bsm_size = 0; 705 priv->hw_params.max_bsm_size = 0;
849 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) | 706 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
@@ -922,7 +779,7 @@ void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
922 779
923 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent; 780 scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
924 781
925 if (txq->q.write_ptr < TFD_QUEUE_SIZE_BC_DUP) 782 if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
926 scd_bc_tbl[txq_id]. 783 scd_bc_tbl[txq_id].
927 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent; 784 tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
928} 785}
@@ -941,12 +798,12 @@ void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
941 if (txq_id != IWL_CMD_QUEUE_NUM) 798 if (txq_id != IWL_CMD_QUEUE_NUM)
942 sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id; 799 sta_id = txq->cmd[read_ptr]->cmd.tx.sta_id;
943 800
944 bc_ent = cpu_to_le16(1 | (sta_id << 12)); 801 bc_ent = cpu_to_le16(1 | (sta_id << 12));
945 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent; 802 scd_bc_tbl[txq_id].tfd_offset[read_ptr] = bc_ent;
946 803
947 if (txq->q.write_ptr < TFD_QUEUE_SIZE_BC_DUP) 804 if (read_ptr < TFD_QUEUE_SIZE_BC_DUP)
948 scd_bc_tbl[txq_id]. 805 scd_bc_tbl[txq_id].
949 tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent; 806 tfd_offset[TFD_QUEUE_SIZE_MAX + read_ptr] = bc_ent;
950} 807}
951 808
952static int iwl5000_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid, 809static int iwl5000_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
@@ -989,11 +846,13 @@ int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
989 u16 ra_tid; 846 u16 ra_tid;
990 847
991 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || 848 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) ||
992 (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { 849 (IWL50_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
850 <= txq_id)) {
993 IWL_WARN(priv, 851 IWL_WARN(priv,
994 "queue number out of range: %d, must be %d to %d\n", 852 "queue number out of range: %d, must be %d to %d\n",
995 txq_id, IWL50_FIRST_AMPDU_QUEUE, 853 txq_id, IWL50_FIRST_AMPDU_QUEUE,
996 IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES - 1); 854 IWL50_FIRST_AMPDU_QUEUE +
855 priv->cfg->num_of_ampdu_queues - 1);
997 return -EINVAL; 856 return -EINVAL;
998 } 857 }
999 858
@@ -1047,11 +906,13 @@ int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
1047 u16 ssn_idx, u8 tx_fifo) 906 u16 ssn_idx, u8 tx_fifo)
1048{ 907{
1049 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) || 908 if ((IWL50_FIRST_AMPDU_QUEUE > txq_id) ||
1050 (IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES <= txq_id)) { 909 (IWL50_FIRST_AMPDU_QUEUE + priv->cfg->num_of_ampdu_queues
910 <= txq_id)) {
1051 IWL_ERR(priv, 911 IWL_ERR(priv,
1052 "queue number out of range: %d, must be %d to %d\n", 912 "queue number out of range: %d, must be %d to %d\n",
1053 txq_id, IWL50_FIRST_AMPDU_QUEUE, 913 txq_id, IWL50_FIRST_AMPDU_QUEUE,
1054 IWL50_FIRST_AMPDU_QUEUE + IWL50_NUM_AMPDU_QUEUES - 1); 914 IWL50_FIRST_AMPDU_QUEUE +
915 priv->cfg->num_of_ampdu_queues - 1);
1055 return -EINVAL; 916 return -EINVAL;
1056 } 917 }
1057 918
@@ -1132,8 +993,7 @@ static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv,
1132 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]); 993 info = IEEE80211_SKB_CB(priv->txq[txq_id].txb[idx].skb[0]);
1133 info->status.rates[0].count = tx_resp->failure_frame + 1; 994 info->status.rates[0].count = tx_resp->failure_frame + 1;
1134 info->flags &= ~IEEE80211_TX_CTL_AMPDU; 995 info->flags &= ~IEEE80211_TX_CTL_AMPDU;
1135 info->flags |= iwl_is_tx_success(status) ? 996 info->flags |= iwl_tx_status_to_mac80211(status);
1136 IEEE80211_TX_STAT_ACK : 0;
1137 iwl_hwrate_to_tx_control(priv, rate_n_flags, info); 997 iwl_hwrate_to_tx_control(priv, rate_n_flags, info);
1138 998
1139 /* FIXME: code repetition end */ 999 /* FIXME: code repetition end */
@@ -1218,7 +1078,7 @@ static int iwl5000_tx_status_reply_tx(struct iwl_priv *priv,
1218static void iwl5000_rx_reply_tx(struct iwl_priv *priv, 1078static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1219 struct iwl_rx_mem_buffer *rxb) 1079 struct iwl_rx_mem_buffer *rxb)
1220{ 1080{
1221 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1081 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1222 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 1082 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1223 int txq_id = SEQ_TO_QUEUE(sequence); 1083 int txq_id = SEQ_TO_QUEUE(sequence);
1224 int index = SEQ_TO_INDEX(sequence); 1084 int index = SEQ_TO_INDEX(sequence);
@@ -1263,7 +1123,7 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1263 scd_ssn , index, txq_id, txq->swq_id); 1123 scd_ssn , index, txq_id, txq->swq_id);
1264 1124
1265 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 1125 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
1266 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 1126 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1267 1127
1268 if (priv->mac80211_registered && 1128 if (priv->mac80211_registered &&
1269 (iwl_queue_space(&txq->q) > txq->q.low_mark) && 1129 (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
@@ -1278,8 +1138,7 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1278 BUG_ON(txq_id != txq->swq_id); 1138 BUG_ON(txq_id != txq->swq_id);
1279 1139
1280 info->status.rates[0].count = tx_resp->failure_frame + 1; 1140 info->status.rates[0].count = tx_resp->failure_frame + 1;
1281 info->flags |= iwl_is_tx_success(status) ? 1141 info->flags |= iwl_tx_status_to_mac80211(status);
1282 IEEE80211_TX_STAT_ACK : 0;
1283 iwl_hwrate_to_tx_control(priv, 1142 iwl_hwrate_to_tx_control(priv,
1284 le32_to_cpu(tx_resp->rate_n_flags), 1143 le32_to_cpu(tx_resp->rate_n_flags),
1285 info); 1144 info);
@@ -1292,16 +1151,14 @@ static void iwl5000_rx_reply_tx(struct iwl_priv *priv,
1292 tx_resp->failure_frame); 1151 tx_resp->failure_frame);
1293 1152
1294 freed = iwl_tx_queue_reclaim(priv, txq_id, index); 1153 freed = iwl_tx_queue_reclaim(priv, txq_id, index);
1295 if (ieee80211_is_data_qos(tx_resp->frame_ctrl)) 1154 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1296 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
1297 1155
1298 if (priv->mac80211_registered && 1156 if (priv->mac80211_registered &&
1299 (iwl_queue_space(&txq->q) > txq->q.low_mark)) 1157 (iwl_queue_space(&txq->q) > txq->q.low_mark))
1300 iwl_wake_queue(priv, txq_id); 1158 iwl_wake_queue(priv, txq_id);
1301 } 1159 }
1302 1160
1303 if (ieee80211_is_data_qos(tx_resp->frame_ctrl)) 1161 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
1304 iwl_txq_check_empty(priv, sta_id, tid, txq_id);
1305 1162
1306 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) 1163 if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
1307 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); 1164 IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n");
@@ -1389,6 +1246,22 @@ int iwl5000_send_tx_power(struct iwl_priv *priv)
1389 1246
1390 /* half dBm need to multiply */ 1247 /* half dBm need to multiply */
1391 tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt); 1248 tx_power_cmd.global_lmt = (s8)(2 * priv->tx_power_user_lmt);
1249
1250 if (priv->tx_power_lmt_in_half_dbm &&
1251 priv->tx_power_lmt_in_half_dbm < tx_power_cmd.global_lmt) {
1252 /*
1253 * For the newer devices which using enhanced/extend tx power
1254 * table in EEPROM, the format is in half dBm. driver need to
1255 * convert to dBm format before report to mac80211.
1256 * By doing so, there is a possibility of 1/2 dBm resolution
1257 * lost. driver will perform "round-up" operation before
1258 * reporting, but it will cause 1/2 dBm tx power over the
1259 * regulatory limit. Perform the checking here, if the
1260 * "tx_power_user_lmt" is higher than EEPROM value (in
1261 * half-dBm format), lower the tx power based on EEPROM
1262 */
1263 tx_power_cmd.global_lmt = priv->tx_power_lmt_in_half_dbm;
1264 }
1392 tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED; 1265 tx_power_cmd.flags = IWL50_TX_POWER_NO_CLOSED;
1393 tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO; 1266 tx_power_cmd.srv_chan_lmt = IWL50_TX_POWER_AUTO;
1394 1267
@@ -1459,6 +1332,24 @@ int iwl5000_calc_rssi(struct iwl_priv *priv,
1459 return max_rssi - agc - IWL49_RSSI_OFFSET; 1332 return max_rssi - agc - IWL49_RSSI_OFFSET;
1460} 1333}
1461 1334
1335static int iwl5000_send_tx_ant_config(struct iwl_priv *priv, u8 valid_tx_ant)
1336{
1337 struct iwl_tx_ant_config_cmd tx_ant_cmd = {
1338 .valid = cpu_to_le32(valid_tx_ant),
1339 };
1340
1341 if (IWL_UCODE_API(priv->ucode_ver) > 1) {
1342 IWL_DEBUG_HC(priv, "select valid tx ant: %u\n", valid_tx_ant);
1343 return iwl_send_cmd_pdu(priv, TX_ANT_CONFIGURATION_CMD,
1344 sizeof(struct iwl_tx_ant_config_cmd),
1345 &tx_ant_cmd);
1346 } else {
1347 IWL_DEBUG_HC(priv, "TX_ANT_CONFIGURATION_CMD not supported\n");
1348 return -EOPNOTSUPP;
1349 }
1350}
1351
1352
1462#define IWL5000_UCODE_GET(item) \ 1353#define IWL5000_UCODE_GET(item) \
1463static u32 iwl5000_ucode_get_##item(const struct iwl_ucode_header *ucode,\ 1354static u32 iwl5000_ucode_get_##item(const struct iwl_ucode_header *ucode,\
1464 u32 api_ver) \ 1355 u32 api_ver) \
@@ -1497,10 +1388,43 @@ IWL5000_UCODE_GET(init_size);
1497IWL5000_UCODE_GET(init_data_size); 1388IWL5000_UCODE_GET(init_data_size);
1498IWL5000_UCODE_GET(boot_size); 1389IWL5000_UCODE_GET(boot_size);
1499 1390
1391static int iwl5000_hw_channel_switch(struct iwl_priv *priv, u16 channel)
1392{
1393 struct iwl5000_channel_switch_cmd cmd;
1394 const struct iwl_channel_info *ch_info;
1395 struct iwl_host_cmd hcmd = {
1396 .id = REPLY_CHANNEL_SWITCH,
1397 .len = sizeof(cmd),
1398 .flags = CMD_SIZE_HUGE,
1399 .data = &cmd,
1400 };
1401
1402 IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",
1403 priv->active_rxon.channel, channel);
1404 cmd.band = priv->band == IEEE80211_BAND_2GHZ;
1405 cmd.channel = cpu_to_le16(channel);
1406 cmd.rxon_flags = priv->staging_rxon.flags;
1407 cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
1408 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
1409 ch_info = iwl_get_channel_info(priv, priv->band, channel);
1410 if (ch_info)
1411 cmd.expect_beacon = is_channel_radar(ch_info);
1412 else {
1413 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
1414 priv->active_rxon.channel, channel);
1415 return -EFAULT;
1416 }
1417 priv->switch_rxon.channel = cpu_to_le16(channel);
1418 priv->switch_rxon.switch_in_progress = true;
1419
1420 return iwl_send_cmd_sync(priv, &hcmd);
1421}
1422
1500struct iwl_hcmd_ops iwl5000_hcmd = { 1423struct iwl_hcmd_ops iwl5000_hcmd = {
1501 .rxon_assoc = iwl5000_send_rxon_assoc, 1424 .rxon_assoc = iwl5000_send_rxon_assoc,
1502 .commit_rxon = iwl_commit_rxon, 1425 .commit_rxon = iwl_commit_rxon,
1503 .set_rxon_chain = iwl_set_rxon_chain, 1426 .set_rxon_chain = iwl_set_rxon_chain,
1427 .set_tx_ant = iwl5000_send_tx_ant_config,
1504}; 1428};
1505 1429
1506struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = { 1430struct iwl_hcmd_utils_ops iwl5000_hcmd_utils = {
@@ -1538,15 +1462,17 @@ struct iwl_lib_ops iwl5000_lib = {
1538 .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr, 1462 .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
1539 .dump_nic_event_log = iwl_dump_nic_event_log, 1463 .dump_nic_event_log = iwl_dump_nic_event_log,
1540 .dump_nic_error_log = iwl_dump_nic_error_log, 1464 .dump_nic_error_log = iwl_dump_nic_error_log,
1465 .dump_csr = iwl_dump_csr,
1466 .dump_fh = iwl_dump_fh,
1541 .load_ucode = iwl5000_load_ucode, 1467 .load_ucode = iwl5000_load_ucode,
1542 .init_alive_start = iwl5000_init_alive_start, 1468 .init_alive_start = iwl5000_init_alive_start,
1543 .alive_notify = iwl5000_alive_notify, 1469 .alive_notify = iwl5000_alive_notify,
1544 .send_tx_power = iwl5000_send_tx_power, 1470 .send_tx_power = iwl5000_send_tx_power,
1545 .update_chain_flags = iwl_update_chain_flags, 1471 .update_chain_flags = iwl_update_chain_flags,
1472 .set_channel_switch = iwl5000_hw_channel_switch,
1546 .apm_ops = { 1473 .apm_ops = {
1547 .init = iwl5000_apm_init, 1474 .init = iwl_apm_init,
1548 .reset = iwl5000_apm_reset, 1475 .stop = iwl_apm_stop,
1549 .stop = iwl5000_apm_stop,
1550 .config = iwl5000_nic_config, 1476 .config = iwl5000_nic_config,
1551 .set_pwr_src = iwl_set_pwr_src, 1477 .set_pwr_src = iwl_set_pwr_src,
1552 }, 1478 },
@@ -1573,6 +1499,7 @@ struct iwl_lib_ops iwl5000_lib = {
1573 .temperature = iwl5000_temperature, 1499 .temperature = iwl5000_temperature,
1574 .set_ct_kill = iwl5000_set_ct_threshold, 1500 .set_ct_kill = iwl5000_set_ct_threshold,
1575 }, 1501 },
1502 .add_bcast_station = iwl_add_bcast_station,
1576}; 1503};
1577 1504
1578static struct iwl_lib_ops iwl5150_lib = { 1505static struct iwl_lib_ops iwl5150_lib = {
@@ -1590,15 +1517,16 @@ static struct iwl_lib_ops iwl5150_lib = {
1590 .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr, 1517 .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
1591 .dump_nic_event_log = iwl_dump_nic_event_log, 1518 .dump_nic_event_log = iwl_dump_nic_event_log,
1592 .dump_nic_error_log = iwl_dump_nic_error_log, 1519 .dump_nic_error_log = iwl_dump_nic_error_log,
1520 .dump_csr = iwl_dump_csr,
1593 .load_ucode = iwl5000_load_ucode, 1521 .load_ucode = iwl5000_load_ucode,
1594 .init_alive_start = iwl5000_init_alive_start, 1522 .init_alive_start = iwl5000_init_alive_start,
1595 .alive_notify = iwl5000_alive_notify, 1523 .alive_notify = iwl5000_alive_notify,
1596 .send_tx_power = iwl5000_send_tx_power, 1524 .send_tx_power = iwl5000_send_tx_power,
1597 .update_chain_flags = iwl_update_chain_flags, 1525 .update_chain_flags = iwl_update_chain_flags,
1526 .set_channel_switch = iwl5000_hw_channel_switch,
1598 .apm_ops = { 1527 .apm_ops = {
1599 .init = iwl5000_apm_init, 1528 .init = iwl_apm_init,
1600 .reset = iwl5000_apm_reset, 1529 .stop = iwl_apm_stop,
1601 .stop = iwl5000_apm_stop,
1602 .config = iwl5000_nic_config, 1530 .config = iwl5000_nic_config,
1603 .set_pwr_src = iwl_set_pwr_src, 1531 .set_pwr_src = iwl_set_pwr_src,
1604 }, 1532 },
@@ -1625,25 +1553,26 @@ static struct iwl_lib_ops iwl5150_lib = {
1625 .temperature = iwl5150_temperature, 1553 .temperature = iwl5150_temperature,
1626 .set_ct_kill = iwl5150_set_ct_threshold, 1554 .set_ct_kill = iwl5150_set_ct_threshold,
1627 }, 1555 },
1556 .add_bcast_station = iwl_add_bcast_station,
1628}; 1557};
1629 1558
1630struct iwl_ops iwl5000_ops = { 1559static const struct iwl_ops iwl5000_ops = {
1631 .ucode = &iwl5000_ucode, 1560 .ucode = &iwl5000_ucode,
1632 .lib = &iwl5000_lib, 1561 .lib = &iwl5000_lib,
1633 .hcmd = &iwl5000_hcmd, 1562 .hcmd = &iwl5000_hcmd,
1634 .utils = &iwl5000_hcmd_utils, 1563 .utils = &iwl5000_hcmd_utils,
1564 .led = &iwlagn_led_ops,
1635}; 1565};
1636 1566
1637static struct iwl_ops iwl5150_ops = { 1567static const struct iwl_ops iwl5150_ops = {
1638 .ucode = &iwl5000_ucode, 1568 .ucode = &iwl5000_ucode,
1639 .lib = &iwl5150_lib, 1569 .lib = &iwl5150_lib,
1640 .hcmd = &iwl5000_hcmd, 1570 .hcmd = &iwl5000_hcmd,
1641 .utils = &iwl5000_hcmd_utils, 1571 .utils = &iwl5000_hcmd_utils,
1572 .led = &iwlagn_led_ops,
1642}; 1573};
1643 1574
1644struct iwl_mod_params iwl50_mod_params = { 1575struct iwl_mod_params iwl50_mod_params = {
1645 .num_of_queues = IWL50_NUM_QUEUES,
1646 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1647 .amsdu_size_8K = 1, 1576 .amsdu_size_8K = 1,
1648 .restart_fw = 1, 1577 .restart_fw = 1,
1649 /* the rest are 0 by default */ 1578 /* the rest are 0 by default */
@@ -1660,28 +1589,46 @@ struct iwl_cfg iwl5300_agn_cfg = {
1660 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1589 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1661 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 1590 .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1662 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 1591 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1592 .num_of_queues = IWL50_NUM_QUEUES,
1593 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1663 .mod_params = &iwl50_mod_params, 1594 .mod_params = &iwl50_mod_params,
1664 .valid_tx_ant = ANT_ABC, 1595 .valid_tx_ant = ANT_ABC,
1665 .valid_rx_ant = ANT_ABC, 1596 .valid_rx_ant = ANT_ABC,
1666 .need_pll_cfg = true, 1597 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1598 .set_l0s = true,
1599 .use_bsm = false,
1667 .ht_greenfield_support = true, 1600 .ht_greenfield_support = true,
1601 .led_compensation = 51,
1602 .use_rts_for_ht = true, /* use rts/cts protection */
1603 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1604 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1605 .chain_noise_scale = 1000,
1668}; 1606};
1669 1607
1670struct iwl_cfg iwl5100_bg_cfg = { 1608struct iwl_cfg iwl5100_bgn_cfg = {
1671 .name = "5100BG", 1609 .name = "5100BGN",
1672 .fw_name_pre = IWL5000_FW_PRE, 1610 .fw_name_pre = IWL5000_FW_PRE,
1673 .ucode_api_max = IWL5000_UCODE_API_MAX, 1611 .ucode_api_max = IWL5000_UCODE_API_MAX,
1674 .ucode_api_min = IWL5000_UCODE_API_MIN, 1612 .ucode_api_min = IWL5000_UCODE_API_MIN,
1675 .sku = IWL_SKU_G, 1613 .sku = IWL_SKU_G|IWL_SKU_N,
1676 .ops = &iwl5000_ops, 1614 .ops = &iwl5000_ops,
1677 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1615 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1678 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 1616 .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1679 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 1617 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1618 .num_of_queues = IWL50_NUM_QUEUES,
1619 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1680 .mod_params = &iwl50_mod_params, 1620 .mod_params = &iwl50_mod_params,
1681 .valid_tx_ant = ANT_B, 1621 .valid_tx_ant = ANT_B,
1682 .valid_rx_ant = ANT_AB, 1622 .valid_rx_ant = ANT_AB,
1683 .need_pll_cfg = true, 1623 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1624 .set_l0s = true,
1625 .use_bsm = false,
1684 .ht_greenfield_support = true, 1626 .ht_greenfield_support = true,
1627 .led_compensation = 51,
1628 .use_rts_for_ht = true, /* use rts/cts protection */
1629 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1630 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1631 .chain_noise_scale = 1000,
1685}; 1632};
1686 1633
1687struct iwl_cfg iwl5100_abg_cfg = { 1634struct iwl_cfg iwl5100_abg_cfg = {
@@ -1694,11 +1641,18 @@ struct iwl_cfg iwl5100_abg_cfg = {
1694 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1641 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1695 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 1642 .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1696 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 1643 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1644 .num_of_queues = IWL50_NUM_QUEUES,
1645 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1697 .mod_params = &iwl50_mod_params, 1646 .mod_params = &iwl50_mod_params,
1698 .valid_tx_ant = ANT_B, 1647 .valid_tx_ant = ANT_B,
1699 .valid_rx_ant = ANT_AB, 1648 .valid_rx_ant = ANT_AB,
1700 .need_pll_cfg = true, 1649 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1701 .ht_greenfield_support = true, 1650 .set_l0s = true,
1651 .use_bsm = false,
1652 .led_compensation = 51,
1653 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1654 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1655 .chain_noise_scale = 1000,
1702}; 1656};
1703 1657
1704struct iwl_cfg iwl5100_agn_cfg = { 1658struct iwl_cfg iwl5100_agn_cfg = {
@@ -1711,11 +1665,20 @@ struct iwl_cfg iwl5100_agn_cfg = {
1711 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1665 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1712 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 1666 .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
1713 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 1667 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
1668 .num_of_queues = IWL50_NUM_QUEUES,
1669 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1714 .mod_params = &iwl50_mod_params, 1670 .mod_params = &iwl50_mod_params,
1715 .valid_tx_ant = ANT_B, 1671 .valid_tx_ant = ANT_B,
1716 .valid_rx_ant = ANT_AB, 1672 .valid_rx_ant = ANT_AB,
1717 .need_pll_cfg = true, 1673 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1674 .set_l0s = true,
1675 .use_bsm = false,
1718 .ht_greenfield_support = true, 1676 .ht_greenfield_support = true,
1677 .led_compensation = 51,
1678 .use_rts_for_ht = true, /* use rts/cts protection */
1679 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1680 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1681 .chain_noise_scale = 1000,
1719}; 1682};
1720 1683
1721struct iwl_cfg iwl5350_agn_cfg = { 1684struct iwl_cfg iwl5350_agn_cfg = {
@@ -1728,11 +1691,20 @@ struct iwl_cfg iwl5350_agn_cfg = {
1728 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1691 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1729 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, 1692 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
1730 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, 1693 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
1694 .num_of_queues = IWL50_NUM_QUEUES,
1695 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1731 .mod_params = &iwl50_mod_params, 1696 .mod_params = &iwl50_mod_params,
1732 .valid_tx_ant = ANT_ABC, 1697 .valid_tx_ant = ANT_ABC,
1733 .valid_rx_ant = ANT_ABC, 1698 .valid_rx_ant = ANT_ABC,
1734 .need_pll_cfg = true, 1699 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1700 .set_l0s = true,
1701 .use_bsm = false,
1735 .ht_greenfield_support = true, 1702 .ht_greenfield_support = true,
1703 .led_compensation = 51,
1704 .use_rts_for_ht = true, /* use rts/cts protection */
1705 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1706 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1707 .chain_noise_scale = 1000,
1736}; 1708};
1737 1709
1738struct iwl_cfg iwl5150_agn_cfg = { 1710struct iwl_cfg iwl5150_agn_cfg = {
@@ -1745,24 +1717,58 @@ struct iwl_cfg iwl5150_agn_cfg = {
1745 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE, 1717 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1746 .eeprom_ver = EEPROM_5050_EEPROM_VERSION, 1718 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
1747 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION, 1719 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
1720 .num_of_queues = IWL50_NUM_QUEUES,
1721 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1748 .mod_params = &iwl50_mod_params, 1722 .mod_params = &iwl50_mod_params,
1749 .valid_tx_ant = ANT_A, 1723 .valid_tx_ant = ANT_A,
1750 .valid_rx_ant = ANT_AB, 1724 .valid_rx_ant = ANT_AB,
1751 .need_pll_cfg = true, 1725 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1726 .set_l0s = true,
1727 .use_bsm = false,
1752 .ht_greenfield_support = true, 1728 .ht_greenfield_support = true,
1729 .led_compensation = 51,
1730 .use_rts_for_ht = true, /* use rts/cts protection */
1731 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1732 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1733 .chain_noise_scale = 1000,
1734};
1735
1736struct iwl_cfg iwl5150_abg_cfg = {
1737 .name = "5150ABG",
1738 .fw_name_pre = IWL5150_FW_PRE,
1739 .ucode_api_max = IWL5150_UCODE_API_MAX,
1740 .ucode_api_min = IWL5150_UCODE_API_MIN,
1741 .sku = IWL_SKU_A|IWL_SKU_G,
1742 .ops = &iwl5150_ops,
1743 .eeprom_size = IWL_5000_EEPROM_IMG_SIZE,
1744 .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
1745 .eeprom_calib_ver = EEPROM_5050_TX_POWER_VERSION,
1746 .num_of_queues = IWL50_NUM_QUEUES,
1747 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
1748 .mod_params = &iwl50_mod_params,
1749 .valid_tx_ant = ANT_A,
1750 .valid_rx_ant = ANT_AB,
1751 .pll_cfg_val = CSR50_ANA_PLL_CFG_VAL,
1752 .set_l0s = true,
1753 .use_bsm = false,
1754 .led_compensation = 51,
1755 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
1756 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF,
1757 .chain_noise_scale = 1000,
1753}; 1758};
1754 1759
1755MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX)); 1760MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));
1756MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX)); 1761MODULE_FIRMWARE(IWL5150_MODULE_FIRMWARE(IWL5150_UCODE_API_MAX));
1757 1762
1758module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, 0444); 1763module_param_named(swcrypto50, iwl50_mod_params.sw_crypto, bool, S_IRUGO);
1759MODULE_PARM_DESC(swcrypto50, 1764MODULE_PARM_DESC(swcrypto50,
1760 "using software crypto engine (default 0 [hardware])\n"); 1765 "using software crypto engine (default 0 [hardware])\n");
1761module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, 0444); 1766module_param_named(queues_num50, iwl50_mod_params.num_of_queues, int, S_IRUGO);
1762MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series"); 1767MODULE_PARM_DESC(queues_num50, "number of hw queues in 50xx series");
1763module_param_named(11n_disable50, iwl50_mod_params.disable_11n, int, 0444); 1768module_param_named(11n_disable50, iwl50_mod_params.disable_11n, int, S_IRUGO);
1764MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality"); 1769MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality");
1765module_param_named(amsdu_size_8K50, iwl50_mod_params.amsdu_size_8K, int, 0444); 1770module_param_named(amsdu_size_8K50, iwl50_mod_params.amsdu_size_8K,
1771 int, S_IRUGO);
1766MODULE_PARM_DESC(amsdu_size_8K50, "enable 8K amsdu size in 50XX series"); 1772MODULE_PARM_DESC(amsdu_size_8K50, "enable 8K amsdu size in 50XX series");
1767module_param_named(fw_restart50, iwl50_mod_params.restart_fw, int, 0444); 1773module_param_named(fw_restart50, iwl50_mod_params.restart_fw, int, S_IRUGO);
1768MODULE_PARM_DESC(fw_restart50, "restart firmware in case of error"); 1774MODULE_PARM_DESC(fw_restart50, "restart firmware in case of error");
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000-hw.h b/drivers/net/wireless/iwlwifi/iwl-6000-hw.h
index 90185777d98b..ddba39999997 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000-hw.h
+++ b/drivers/net/wireless/iwlwifi/iwl-6000-hw.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index 1473452ba22f..92b3e64fc14d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2008-2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -44,14 +44,16 @@
44#include "iwl-sta.h" 44#include "iwl-sta.h"
45#include "iwl-helpers.h" 45#include "iwl-helpers.h"
46#include "iwl-5000-hw.h" 46#include "iwl-5000-hw.h"
47#include "iwl-6000-hw.h"
48#include "iwl-agn-led.h"
47 49
48/* Highest firmware API version supported */ 50/* Highest firmware API version supported */
49#define IWL6000_UCODE_API_MAX 4 51#define IWL6000_UCODE_API_MAX 4
50#define IWL6050_UCODE_API_MAX 4 52#define IWL6050_UCODE_API_MAX 4
51 53
52/* Lowest firmware API version supported */ 54/* Lowest firmware API version supported */
53#define IWL6000_UCODE_API_MIN 1 55#define IWL6000_UCODE_API_MIN 4
54#define IWL6050_UCODE_API_MIN 1 56#define IWL6050_UCODE_API_MIN 4
55 57
56#define IWL6000_FW_PRE "iwlwifi-6000-" 58#define IWL6000_FW_PRE "iwlwifi-6000-"
57#define _IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE #api ".ucode" 59#define _IWL6000_MODULE_FIRMWARE(api) IWL6000_FW_PRE #api ".ucode"
@@ -68,26 +70,161 @@ static void iwl6000_set_ct_threshold(struct iwl_priv *priv)
68 priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD; 70 priv->hw_params.ct_kill_exit_threshold = CT_KILL_EXIT_THRESHOLD;
69} 71}
70 72
73/* Indicate calibration version to uCode. */
74static void iwl6050_set_calib_version(struct iwl_priv *priv)
75{
76 if (priv->cfg->ops->lib->eeprom_ops.calib_version(priv) >= 6)
77 iwl_set_bit(priv, CSR_GP_DRIVER_REG,
78 CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6);
79}
80
71/* NIC configuration for 6000 series */ 81/* NIC configuration for 6000 series */
72static void iwl6000_nic_config(struct iwl_priv *priv) 82static void iwl6000_nic_config(struct iwl_priv *priv)
73{ 83{
74 iwl5000_nic_config(priv); 84 u16 radio_cfg;
85
86 radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
87
88 /* write radio config values to register */
89 if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) <= EEPROM_RF_CONFIG_TYPE_MAX)
90 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
91 EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
92 EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
93 EEPROM_RF_CFG_DASH_MSK(radio_cfg));
94
95 /* set CSR_HW_CONFIG_REG for uCode use */
96 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
97 CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
98 CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
75 99
76 /* no locking required for register write */ 100 /* no locking required for register write */
77 if (priv->cfg->pa_type == IWL_PA_HYBRID) { 101 if (priv->cfg->pa_type == IWL_PA_INTERNAL) {
78 /* 2x2 hybrid phy type */
79 iwl_write32(priv, CSR_GP_DRIVER_REG,
80 CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_HYB);
81 } else if (priv->cfg->pa_type == IWL_PA_INTERNAL) {
82 /* 2x2 IPA phy type */ 102 /* 2x2 IPA phy type */
83 iwl_write32(priv, CSR_GP_DRIVER_REG, 103 iwl_write32(priv, CSR_GP_DRIVER_REG,
84 CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA); 104 CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA);
85 } 105 }
86 /* else do nothing, uCode configured */ 106 /* else do nothing, uCode configured */
107 if (priv->cfg->ops->lib->temp_ops.set_calib_version)
108 priv->cfg->ops->lib->temp_ops.set_calib_version(priv);
109}
110
111static struct iwl_sensitivity_ranges iwl6000_sensitivity = {
112 .min_nrg_cck = 97,
113 .max_nrg_cck = 0, /* not used, set to 0 */
114 .auto_corr_min_ofdm = 80,
115 .auto_corr_min_ofdm_mrc = 128,
116 .auto_corr_min_ofdm_x1 = 105,
117 .auto_corr_min_ofdm_mrc_x1 = 192,
118
119 .auto_corr_max_ofdm = 145,
120 .auto_corr_max_ofdm_mrc = 232,
121 .auto_corr_max_ofdm_x1 = 110,
122 .auto_corr_max_ofdm_mrc_x1 = 232,
123
124 .auto_corr_min_cck = 125,
125 .auto_corr_max_cck = 175,
126 .auto_corr_min_cck_mrc = 160,
127 .auto_corr_max_cck_mrc = 310,
128 .nrg_th_cck = 97,
129 .nrg_th_ofdm = 100,
130
131 .barker_corr_th_min = 190,
132 .barker_corr_th_min_mrc = 390,
133 .nrg_th_cca = 62,
134};
135
136static int iwl6000_hw_set_hw_params(struct iwl_priv *priv)
137{
138 if (priv->cfg->mod_params->num_of_queues >= IWL_MIN_NUM_QUEUES &&
139 priv->cfg->mod_params->num_of_queues <= IWL50_NUM_QUEUES)
140 priv->cfg->num_of_queues =
141 priv->cfg->mod_params->num_of_queues;
142
143 priv->hw_params.max_txq_num = priv->cfg->num_of_queues;
144 priv->hw_params.dma_chnl_num = FH50_TCSR_CHNL_NUM;
145 priv->hw_params.scd_bc_tbls_size =
146 priv->cfg->num_of_queues *
147 sizeof(struct iwl5000_scd_bc_tbl);
148 priv->hw_params.tfd_size = sizeof(struct iwl_tfd);
149 priv->hw_params.max_stations = IWL5000_STATION_COUNT;
150 priv->hw_params.bcast_sta_id = IWL5000_BROADCAST_ID;
151
152 priv->hw_params.max_data_size = IWL60_RTC_DATA_SIZE;
153 priv->hw_params.max_inst_size = IWL60_RTC_INST_SIZE;
154
155 priv->hw_params.max_bsm_size = 0;
156 priv->hw_params.ht40_channel = BIT(IEEE80211_BAND_2GHZ) |
157 BIT(IEEE80211_BAND_5GHZ);
158 priv->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
159
160 priv->hw_params.tx_chains_num = num_of_ant(priv->cfg->valid_tx_ant);
161 priv->hw_params.rx_chains_num = num_of_ant(priv->cfg->valid_rx_ant);
162 priv->hw_params.valid_tx_ant = priv->cfg->valid_tx_ant;
163 priv->hw_params.valid_rx_ant = priv->cfg->valid_rx_ant;
164
165 if (priv->cfg->ops->lib->temp_ops.set_ct_kill)
166 priv->cfg->ops->lib->temp_ops.set_ct_kill(priv);
167
168 /* Set initial sensitivity parameters */
169 /* Set initial calibration set */
170 priv->hw_params.sens = &iwl6000_sensitivity;
171 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) {
172 case CSR_HW_REV_TYPE_6x50:
173 priv->hw_params.calib_init_cfg =
174 BIT(IWL_CALIB_XTAL) |
175 BIT(IWL_CALIB_DC) |
176 BIT(IWL_CALIB_LO) |
177 BIT(IWL_CALIB_TX_IQ) |
178 BIT(IWL_CALIB_BASE_BAND);
179
180 break;
181 default:
182 priv->hw_params.calib_init_cfg =
183 BIT(IWL_CALIB_XTAL) |
184 BIT(IWL_CALIB_LO) |
185 BIT(IWL_CALIB_TX_IQ) |
186 BIT(IWL_CALIB_BASE_BAND);
187 break;
188 }
189
190 return 0;
191}
192
193static int iwl6000_hw_channel_switch(struct iwl_priv *priv, u16 channel)
194{
195 struct iwl6000_channel_switch_cmd cmd;
196 const struct iwl_channel_info *ch_info;
197 struct iwl_host_cmd hcmd = {
198 .id = REPLY_CHANNEL_SWITCH,
199 .len = sizeof(cmd),
200 .flags = CMD_SIZE_HUGE,
201 .data = &cmd,
202 };
203
204 IWL_DEBUG_11H(priv, "channel switch from %d to %d\n",
205 priv->active_rxon.channel, channel);
206
207 cmd.band = priv->band == IEEE80211_BAND_2GHZ;
208 cmd.channel = cpu_to_le16(channel);
209 cmd.rxon_flags = priv->staging_rxon.flags;
210 cmd.rxon_filter_flags = priv->staging_rxon.filter_flags;
211 cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
212 ch_info = iwl_get_channel_info(priv, priv->band, channel);
213 if (ch_info)
214 cmd.expect_beacon = is_channel_radar(ch_info);
215 else {
216 IWL_ERR(priv, "invalid channel switch from %u to %u\n",
217 priv->active_rxon.channel, channel);
218 return -EFAULT;
219 }
220 priv->switch_rxon.channel = cpu_to_le16(channel);
221 priv->switch_rxon.switch_in_progress = true;
222
223 return iwl_send_cmd_sync(priv, &hcmd);
87} 224}
88 225
89static struct iwl_lib_ops iwl6000_lib = { 226static struct iwl_lib_ops iwl6000_lib = {
90 .set_hw_params = iwl5000_hw_set_hw_params, 227 .set_hw_params = iwl6000_hw_set_hw_params,
91 .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl, 228 .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
92 .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl, 229 .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl,
93 .txq_set_sched = iwl5000_txq_set_sched, 230 .txq_set_sched = iwl5000_txq_set_sched,
@@ -102,14 +239,16 @@ static struct iwl_lib_ops iwl6000_lib = {
102 .load_ucode = iwl5000_load_ucode, 239 .load_ucode = iwl5000_load_ucode,
103 .dump_nic_event_log = iwl_dump_nic_event_log, 240 .dump_nic_event_log = iwl_dump_nic_event_log,
104 .dump_nic_error_log = iwl_dump_nic_error_log, 241 .dump_nic_error_log = iwl_dump_nic_error_log,
242 .dump_csr = iwl_dump_csr,
243 .dump_fh = iwl_dump_fh,
105 .init_alive_start = iwl5000_init_alive_start, 244 .init_alive_start = iwl5000_init_alive_start,
106 .alive_notify = iwl5000_alive_notify, 245 .alive_notify = iwl5000_alive_notify,
107 .send_tx_power = iwl5000_send_tx_power, 246 .send_tx_power = iwl5000_send_tx_power,
108 .update_chain_flags = iwl_update_chain_flags, 247 .update_chain_flags = iwl_update_chain_flags,
248 .set_channel_switch = iwl6000_hw_channel_switch,
109 .apm_ops = { 249 .apm_ops = {
110 .init = iwl5000_apm_init, 250 .init = iwl_apm_init,
111 .reset = iwl5000_apm_reset, 251 .stop = iwl_apm_stop,
112 .stop = iwl5000_apm_stop,
113 .config = iwl6000_nic_config, 252 .config = iwl6000_nic_config,
114 .set_pwr_src = iwl_set_pwr_src, 253 .set_pwr_src = iwl_set_pwr_src,
115 }, 254 },
@@ -120,7 +259,7 @@ static struct iwl_lib_ops iwl6000_lib = {
120 EEPROM_5000_REG_BAND_3_CHANNELS, 259 EEPROM_5000_REG_BAND_3_CHANNELS,
121 EEPROM_5000_REG_BAND_4_CHANNELS, 260 EEPROM_5000_REG_BAND_4_CHANNELS,
122 EEPROM_5000_REG_BAND_5_CHANNELS, 261 EEPROM_5000_REG_BAND_5_CHANNELS,
123 EEPROM_5000_REG_BAND_24_HT40_CHANNELS, 262 EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
124 EEPROM_5000_REG_BAND_52_HT40_CHANNELS 263 EEPROM_5000_REG_BAND_52_HT40_CHANNELS
125 }, 264 },
126 .verify_signature = iwlcore_eeprom_verify_signature, 265 .verify_signature = iwlcore_eeprom_verify_signature,
@@ -137,27 +276,86 @@ static struct iwl_lib_ops iwl6000_lib = {
137 .temperature = iwl5000_temperature, 276 .temperature = iwl5000_temperature,
138 .set_ct_kill = iwl6000_set_ct_threshold, 277 .set_ct_kill = iwl6000_set_ct_threshold,
139 }, 278 },
279 .add_bcast_station = iwl_add_bcast_station,
140}; 280};
141 281
142static struct iwl_hcmd_utils_ops iwl6000_hcmd_utils = { 282static const struct iwl_ops iwl6000_ops = {
143 .get_hcmd_size = iwl5000_get_hcmd_size,
144 .build_addsta_hcmd = iwl5000_build_addsta_hcmd,
145 .rts_tx_cmd_flag = iwl5000_rts_tx_cmd_flag,
146 .calc_rssi = iwl5000_calc_rssi,
147};
148
149static struct iwl_ops iwl6000_ops = {
150 .ucode = &iwl5000_ucode, 283 .ucode = &iwl5000_ucode,
151 .lib = &iwl6000_lib, 284 .lib = &iwl6000_lib,
152 .hcmd = &iwl5000_hcmd, 285 .hcmd = &iwl5000_hcmd,
153 .utils = &iwl6000_hcmd_utils, 286 .utils = &iwl5000_hcmd_utils,
287 .led = &iwlagn_led_ops,
288};
289
290static struct iwl_lib_ops iwl6050_lib = {
291 .set_hw_params = iwl6000_hw_set_hw_params,
292 .txq_update_byte_cnt_tbl = iwl5000_txq_update_byte_cnt_tbl,
293 .txq_inval_byte_cnt_tbl = iwl5000_txq_inval_byte_cnt_tbl,
294 .txq_set_sched = iwl5000_txq_set_sched,
295 .txq_agg_enable = iwl5000_txq_agg_enable,
296 .txq_agg_disable = iwl5000_txq_agg_disable,
297 .txq_attach_buf_to_tfd = iwl_hw_txq_attach_buf_to_tfd,
298 .txq_free_tfd = iwl_hw_txq_free_tfd,
299 .txq_init = iwl_hw_tx_queue_init,
300 .rx_handler_setup = iwl5000_rx_handler_setup,
301 .setup_deferred_work = iwl5000_setup_deferred_work,
302 .is_valid_rtc_data_addr = iwl5000_hw_valid_rtc_data_addr,
303 .load_ucode = iwl5000_load_ucode,
304 .dump_nic_event_log = iwl_dump_nic_event_log,
305 .dump_nic_error_log = iwl_dump_nic_error_log,
306 .dump_csr = iwl_dump_csr,
307 .dump_fh = iwl_dump_fh,
308 .init_alive_start = iwl5000_init_alive_start,
309 .alive_notify = iwl5000_alive_notify,
310 .send_tx_power = iwl5000_send_tx_power,
311 .update_chain_flags = iwl_update_chain_flags,
312 .set_channel_switch = iwl6000_hw_channel_switch,
313 .apm_ops = {
314 .init = iwl_apm_init,
315 .stop = iwl_apm_stop,
316 .config = iwl6000_nic_config,
317 .set_pwr_src = iwl_set_pwr_src,
318 },
319 .eeprom_ops = {
320 .regulatory_bands = {
321 EEPROM_5000_REG_BAND_1_CHANNELS,
322 EEPROM_5000_REG_BAND_2_CHANNELS,
323 EEPROM_5000_REG_BAND_3_CHANNELS,
324 EEPROM_5000_REG_BAND_4_CHANNELS,
325 EEPROM_5000_REG_BAND_5_CHANNELS,
326 EEPROM_6000_REG_BAND_24_HT40_CHANNELS,
327 EEPROM_5000_REG_BAND_52_HT40_CHANNELS
328 },
329 .verify_signature = iwlcore_eeprom_verify_signature,
330 .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
331 .release_semaphore = iwlcore_eeprom_release_semaphore,
332 .calib_version = iwl5000_eeprom_calib_version,
333 .query_addr = iwl5000_eeprom_query_addr,
334 .update_enhanced_txpower = iwlcore_eeprom_enhanced_txpower,
335 },
336 .post_associate = iwl_post_associate,
337 .isr = iwl_isr_ict,
338 .config_ap = iwl_config_ap,
339 .temp_ops = {
340 .temperature = iwl5000_temperature,
341 .set_ct_kill = iwl6000_set_ct_threshold,
342 .set_calib_version = iwl6050_set_calib_version,
343 },
344 .add_bcast_station = iwl_add_bcast_station,
154}; 345};
155 346
347static const struct iwl_ops iwl6050_ops = {
348 .ucode = &iwl5000_ucode,
349 .lib = &iwl6050_lib,
350 .hcmd = &iwl5000_hcmd,
351 .utils = &iwl5000_hcmd_utils,
352 .led = &iwlagn_led_ops,
353};
156 354
157/* 355/*
158 * "h": Hybrid configuration, use both internal and external Power Amplifier 356 * "i": Internal configuration, use internal Power Amplifier
159 */ 357 */
160struct iwl_cfg iwl6000h_2agn_cfg = { 358struct iwl_cfg iwl6000i_2agn_cfg = {
161 .name = "6000 Series 2x2 AGN", 359 .name = "6000 Series 2x2 AGN",
162 .fw_name_pre = IWL6000_FW_PRE, 360 .fw_name_pre = IWL6000_FW_PRE,
163 .ucode_api_max = IWL6000_UCODE_API_MAX, 361 .ucode_api_max = IWL6000_UCODE_API_MAX,
@@ -165,41 +363,90 @@ struct iwl_cfg iwl6000h_2agn_cfg = {
165 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, 363 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
166 .ops = &iwl6000_ops, 364 .ops = &iwl6000_ops,
167 .eeprom_size = OTP_LOW_IMAGE_SIZE, 365 .eeprom_size = OTP_LOW_IMAGE_SIZE,
168 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 366 .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
169 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 367 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
368 .num_of_queues = IWL50_NUM_QUEUES,
369 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
170 .mod_params = &iwl50_mod_params, 370 .mod_params = &iwl50_mod_params,
171 .valid_tx_ant = ANT_AB, 371 .valid_tx_ant = ANT_BC,
172 .valid_rx_ant = ANT_AB, 372 .valid_rx_ant = ANT_BC,
173 .need_pll_cfg = false, 373 .pll_cfg_val = 0,
174 .pa_type = IWL_PA_HYBRID, 374 .set_l0s = true,
375 .use_bsm = false,
376 .pa_type = IWL_PA_INTERNAL,
175 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 377 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
176 .shadow_ram_support = true, 378 .shadow_ram_support = true,
177 .ht_greenfield_support = true, 379 .ht_greenfield_support = true,
380 .led_compensation = 51,
178 .use_rts_for_ht = true, /* use rts/cts protection */ 381 .use_rts_for_ht = true, /* use rts/cts protection */
382 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
383 .supports_idle = true,
384 .adv_thermal_throttle = true,
385 .support_ct_kill_exit = true,
386 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
387 .chain_noise_scale = 1000,
179}; 388};
180 389
181/* 390struct iwl_cfg iwl6000i_2abg_cfg = {
182 * "i": Internal configuration, use internal Power Amplifier 391 .name = "6000 Series 2x2 ABG",
183 */
184struct iwl_cfg iwl6000i_2agn_cfg = {
185 .name = "6000 Series 2x2 AGN",
186 .fw_name_pre = IWL6000_FW_PRE, 392 .fw_name_pre = IWL6000_FW_PRE,
187 .ucode_api_max = IWL6000_UCODE_API_MAX, 393 .ucode_api_max = IWL6000_UCODE_API_MAX,
188 .ucode_api_min = IWL6000_UCODE_API_MIN, 394 .ucode_api_min = IWL6000_UCODE_API_MIN,
189 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, 395 .sku = IWL_SKU_A|IWL_SKU_G,
190 .ops = &iwl6000_ops, 396 .ops = &iwl6000_ops,
191 .eeprom_size = OTP_LOW_IMAGE_SIZE, 397 .eeprom_size = OTP_LOW_IMAGE_SIZE,
192 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 398 .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
193 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 399 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
400 .num_of_queues = IWL50_NUM_QUEUES,
401 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
194 .mod_params = &iwl50_mod_params, 402 .mod_params = &iwl50_mod_params,
195 .valid_tx_ant = ANT_BC, 403 .valid_tx_ant = ANT_BC,
196 .valid_rx_ant = ANT_BC, 404 .valid_rx_ant = ANT_BC,
197 .need_pll_cfg = false, 405 .pll_cfg_val = 0,
406 .set_l0s = true,
407 .use_bsm = false,
198 .pa_type = IWL_PA_INTERNAL, 408 .pa_type = IWL_PA_INTERNAL,
199 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 409 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
200 .shadow_ram_support = true, 410 .shadow_ram_support = true,
201 .ht_greenfield_support = true, 411 .ht_greenfield_support = true,
202 .use_rts_for_ht = true, /* use rts/cts protection */ 412 .led_compensation = 51,
413 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
414 .supports_idle = true,
415 .adv_thermal_throttle = true,
416 .support_ct_kill_exit = true,
417 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
418 .chain_noise_scale = 1000,
419};
420
421struct iwl_cfg iwl6000i_2bg_cfg = {
422 .name = "6000 Series 2x2 BG",
423 .fw_name_pre = IWL6000_FW_PRE,
424 .ucode_api_max = IWL6000_UCODE_API_MAX,
425 .ucode_api_min = IWL6000_UCODE_API_MIN,
426 .sku = IWL_SKU_G,
427 .ops = &iwl6000_ops,
428 .eeprom_size = OTP_LOW_IMAGE_SIZE,
429 .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
430 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
431 .num_of_queues = IWL50_NUM_QUEUES,
432 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
433 .mod_params = &iwl50_mod_params,
434 .valid_tx_ant = ANT_BC,
435 .valid_rx_ant = ANT_BC,
436 .pll_cfg_val = 0,
437 .set_l0s = true,
438 .use_bsm = false,
439 .pa_type = IWL_PA_INTERNAL,
440 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
441 .shadow_ram_support = true,
442 .ht_greenfield_support = true,
443 .led_compensation = 51,
444 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
445 .supports_idle = true,
446 .adv_thermal_throttle = true,
447 .support_ct_kill_exit = true,
448 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
449 .chain_noise_scale = 1000,
203}; 450};
204 451
205struct iwl_cfg iwl6050_2agn_cfg = { 452struct iwl_cfg iwl6050_2agn_cfg = {
@@ -208,61 +455,93 @@ struct iwl_cfg iwl6050_2agn_cfg = {
208 .ucode_api_max = IWL6050_UCODE_API_MAX, 455 .ucode_api_max = IWL6050_UCODE_API_MAX,
209 .ucode_api_min = IWL6050_UCODE_API_MIN, 456 .ucode_api_min = IWL6050_UCODE_API_MIN,
210 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, 457 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
211 .ops = &iwl6000_ops, 458 .ops = &iwl6050_ops,
212 .eeprom_size = OTP_LOW_IMAGE_SIZE, 459 .eeprom_size = OTP_LOW_IMAGE_SIZE,
213 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 460 .eeprom_ver = EEPROM_6050_EEPROM_VERSION,
214 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 461 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
462 .num_of_queues = IWL50_NUM_QUEUES,
463 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
215 .mod_params = &iwl50_mod_params, 464 .mod_params = &iwl50_mod_params,
216 .valid_tx_ant = ANT_AB, 465 .valid_tx_ant = ANT_AB,
217 .valid_rx_ant = ANT_AB, 466 .valid_rx_ant = ANT_AB,
218 .need_pll_cfg = false, 467 .pll_cfg_val = 0,
468 .set_l0s = true,
469 .use_bsm = false,
219 .pa_type = IWL_PA_SYSTEM, 470 .pa_type = IWL_PA_SYSTEM,
220 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 471 .max_ll_items = OTP_MAX_LL_ITEMS_6x50,
221 .shadow_ram_support = true, 472 .shadow_ram_support = true,
222 .ht_greenfield_support = true, 473 .ht_greenfield_support = true,
474 .led_compensation = 51,
223 .use_rts_for_ht = true, /* use rts/cts protection */ 475 .use_rts_for_ht = true, /* use rts/cts protection */
476 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
477 .supports_idle = true,
478 .adv_thermal_throttle = true,
479 .support_ct_kill_exit = true,
480 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
481 .chain_noise_scale = 1500,
224}; 482};
225 483
226struct iwl_cfg iwl6000_3agn_cfg = { 484struct iwl_cfg iwl6050_2abg_cfg = {
227 .name = "6000 Series 3x3 AGN", 485 .name = "6050 Series 2x2 ABG",
228 .fw_name_pre = IWL6000_FW_PRE, 486 .fw_name_pre = IWL6050_FW_PRE,
229 .ucode_api_max = IWL6000_UCODE_API_MAX, 487 .ucode_api_max = IWL6050_UCODE_API_MAX,
230 .ucode_api_min = IWL6000_UCODE_API_MIN, 488 .ucode_api_min = IWL6050_UCODE_API_MIN,
231 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, 489 .sku = IWL_SKU_A|IWL_SKU_G,
232 .ops = &iwl6000_ops, 490 .ops = &iwl6050_ops,
233 .eeprom_size = OTP_LOW_IMAGE_SIZE, 491 .eeprom_size = OTP_LOW_IMAGE_SIZE,
234 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 492 .eeprom_ver = EEPROM_6050_EEPROM_VERSION,
235 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 493 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
494 .num_of_queues = IWL50_NUM_QUEUES,
495 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
236 .mod_params = &iwl50_mod_params, 496 .mod_params = &iwl50_mod_params,
237 .valid_tx_ant = ANT_ABC, 497 .valid_tx_ant = ANT_AB,
238 .valid_rx_ant = ANT_ABC, 498 .valid_rx_ant = ANT_AB,
239 .need_pll_cfg = false, 499 .pll_cfg_val = 0,
500 .set_l0s = true,
501 .use_bsm = false,
240 .pa_type = IWL_PA_SYSTEM, 502 .pa_type = IWL_PA_SYSTEM,
241 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 503 .max_ll_items = OTP_MAX_LL_ITEMS_6x50,
242 .shadow_ram_support = true, 504 .shadow_ram_support = true,
243 .ht_greenfield_support = true, 505 .ht_greenfield_support = true,
244 .use_rts_for_ht = true, /* use rts/cts protection */ 506 .led_compensation = 51,
507 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
508 .supports_idle = true,
509 .adv_thermal_throttle = true,
510 .support_ct_kill_exit = true,
511 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
512 .chain_noise_scale = 1500,
245}; 513};
246 514
247struct iwl_cfg iwl6050_3agn_cfg = { 515struct iwl_cfg iwl6000_3agn_cfg = {
248 .name = "6050 Series 3x3 AGN", 516 .name = "6000 Series 3x3 AGN",
249 .fw_name_pre = IWL6050_FW_PRE, 517 .fw_name_pre = IWL6000_FW_PRE,
250 .ucode_api_max = IWL6050_UCODE_API_MAX, 518 .ucode_api_max = IWL6000_UCODE_API_MAX,
251 .ucode_api_min = IWL6050_UCODE_API_MIN, 519 .ucode_api_min = IWL6000_UCODE_API_MIN,
252 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N, 520 .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
253 .ops = &iwl6000_ops, 521 .ops = &iwl6000_ops,
254 .eeprom_size = OTP_LOW_IMAGE_SIZE, 522 .eeprom_size = OTP_LOW_IMAGE_SIZE,
255 .eeprom_ver = EEPROM_5000_EEPROM_VERSION, 523 .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
256 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION, 524 .eeprom_calib_ver = EEPROM_5000_TX_POWER_VERSION,
525 .num_of_queues = IWL50_NUM_QUEUES,
526 .num_of_ampdu_queues = IWL50_NUM_AMPDU_QUEUES,
257 .mod_params = &iwl50_mod_params, 527 .mod_params = &iwl50_mod_params,
258 .valid_tx_ant = ANT_ABC, 528 .valid_tx_ant = ANT_ABC,
259 .valid_rx_ant = ANT_ABC, 529 .valid_rx_ant = ANT_ABC,
260 .need_pll_cfg = false, 530 .pll_cfg_val = 0,
531 .set_l0s = true,
532 .use_bsm = false,
261 .pa_type = IWL_PA_SYSTEM, 533 .pa_type = IWL_PA_SYSTEM,
262 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 534 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
263 .shadow_ram_support = true, 535 .shadow_ram_support = true,
264 .ht_greenfield_support = true, 536 .ht_greenfield_support = true,
537 .led_compensation = 51,
265 .use_rts_for_ht = true, /* use rts/cts protection */ 538 .use_rts_for_ht = true, /* use rts/cts protection */
539 .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS,
540 .supports_idle = true,
541 .adv_thermal_throttle = true,
542 .support_ct_kill_exit = true,
543 .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF,
544 .chain_noise_scale = 1000,
266}; 545};
267 546
268MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); 547MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-led.c b/drivers/net/wireless/iwlwifi/iwl-agn-led.c
new file mode 100644
index 000000000000..1a24946bc203
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-led.c
@@ -0,0 +1,85 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/pci.h>
31#include <linux/dma-mapping.h>
32#include <linux/delay.h>
33#include <linux/skbuff.h>
34#include <linux/netdevice.h>
35#include <linux/wireless.h>
36#include <net/mac80211.h>
37#include <linux/etherdevice.h>
38#include <asm/unaligned.h>
39
40#include "iwl-commands.h"
41#include "iwl-dev.h"
42#include "iwl-core.h"
43#include "iwl-io.h"
44#include "iwl-agn-led.h"
45
46/* Send led command */
47static int iwl_send_led_cmd(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd)
48{
49 struct iwl_host_cmd cmd = {
50 .id = REPLY_LEDS_CMD,
51 .len = sizeof(struct iwl_led_cmd),
52 .data = led_cmd,
53 .flags = CMD_ASYNC,
54 .callback = NULL,
55 };
56 u32 reg;
57
58 reg = iwl_read32(priv, CSR_LED_REG);
59 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
60 iwl_write32(priv, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
61
62 return iwl_send_cmd(priv, &cmd);
63}
64
65/* Set led register off */
66static int iwl_led_on_reg(struct iwl_priv *priv)
67{
68 IWL_DEBUG_LED(priv, "led on\n");
69 iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
70 return 0;
71}
72
73/* Set led register off */
74static int iwl_led_off_reg(struct iwl_priv *priv)
75{
76 IWL_DEBUG_LED(priv, "LED Reg off\n");
77 iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_OFF);
78 return 0;
79}
80
81const struct iwl_led_ops iwlagn_led_ops = {
82 .cmd = iwl_send_led_cmd,
83 .on = iwl_led_on_reg,
84 .off = iwl_led_off_reg,
85};
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-led.h b/drivers/net/wireless/iwlwifi/iwl-agn-led.h
new file mode 100644
index 000000000000..a594e4fdc6b8
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-led.h
@@ -0,0 +1,32 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#ifndef __iwl_agn_led_h__
28#define __iwl_agn_led_h__
29
30extern const struct iwl_led_ops iwlagn_led_ops;
31
32#endif /* __iwl_agn_led_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index 81726ee32858..1460116d329f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -26,6 +26,7 @@
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/init.h> 27#include <linux/init.h>
28#include <linux/skbuff.h> 28#include <linux/skbuff.h>
29#include <linux/slab.h>
29#include <linux/wireless.h> 30#include <linux/wireless.h>
30#include <net/mac80211.h> 31#include <net/mac80211.h>
31 32
@@ -75,104 +76,6 @@ static const u8 ant_toggle_lookup[] = {
75 /*ANT_ABC -> */ ANT_ABC, 76 /*ANT_ABC -> */ ANT_ABC,
76}; 77};
77 78
78/**
79 * struct iwl_rate_scale_data -- tx success history for one rate
80 */
81struct iwl_rate_scale_data {
82 u64 data; /* bitmap of successful frames */
83 s32 success_counter; /* number of frames successful */
84 s32 success_ratio; /* per-cent * 128 */
85 s32 counter; /* number of frames attempted */
86 s32 average_tpt; /* success ratio * expected throughput */
87 unsigned long stamp;
88};
89
90/**
91 * struct iwl_scale_tbl_info -- tx params and success history for all rates
92 *
93 * There are two of these in struct iwl_lq_sta,
94 * one for "active", and one for "search".
95 */
96struct iwl_scale_tbl_info {
97 enum iwl_table_type lq_type;
98 u8 ant_type;
99 u8 is_SGI; /* 1 = short guard interval */
100 u8 is_ht40; /* 1 = 40 MHz channel width */
101 u8 is_dup; /* 1 = duplicated data streams */
102 u8 action; /* change modulation; IWL_[LEGACY/SISO/MIMO]_SWITCH_* */
103 u8 max_search; /* maximun number of tables we can search */
104 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
105 u32 current_rate; /* rate_n_flags, uCode API format */
106 struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */
107};
108
109struct iwl_traffic_load {
110 unsigned long time_stamp; /* age of the oldest statistics */
111 u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time
112 * slice */
113 u32 total; /* total num of packets during the
114 * last TID_MAX_TIME_DIFF */
115 u8 queue_count; /* number of queues that has
116 * been used since the last cleanup */
117 u8 head; /* start of the circular buffer */
118};
119
120/**
121 * struct iwl_lq_sta -- driver's rate scaling private structure
122 *
123 * Pointer to this gets passed back and forth between driver and mac80211.
124 */
125struct iwl_lq_sta {
126 u8 active_tbl; /* index of active table, range 0-1 */
127 u8 enable_counter; /* indicates HT mode */
128 u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */
129 u8 search_better_tbl; /* 1: currently trying alternate mode */
130 s32 last_tpt;
131
132 /* The following determine when to search for a new mode */
133 u32 table_count_limit;
134 u32 max_failure_limit; /* # failed frames before new search */
135 u32 max_success_limit; /* # successful frames before new search */
136 u32 table_count;
137 u32 total_failed; /* total failed frames, any/all rates */
138 u32 total_success; /* total successful frames, any/all rates */
139 u64 flush_timer; /* time staying in mode before new search */
140
141 u8 action_counter; /* # mode-switch actions tried */
142 u8 is_green;
143 u8 is_dup;
144 enum ieee80211_band band;
145 u8 ibss_sta_added;
146
147 /* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */
148 u32 supp_rates;
149 u16 active_legacy_rate;
150 u16 active_siso_rate;
151 u16 active_mimo2_rate;
152 u16 active_mimo3_rate;
153 u16 active_rate_basic;
154 s8 max_rate_idx; /* Max rate set by user */
155 u8 missed_rate_counter;
156
157 struct iwl_link_quality_cmd lq;
158 struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
159 struct iwl_traffic_load load[TID_MAX_LOAD_COUNT];
160 u8 tx_agg_tid_en;
161#ifdef CONFIG_MAC80211_DEBUGFS
162 struct dentry *rs_sta_dbgfs_scale_table_file;
163 struct dentry *rs_sta_dbgfs_stats_table_file;
164 struct dentry *rs_sta_dbgfs_rate_scale_data_file;
165 struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file;
166 u32 dbg_fixed_rate;
167#endif
168 struct iwl_priv *drv;
169
170 /* used to be in sta_info */
171 int last_txrate_idx;
172 /* last tx rate_n_flags */
173 u32 last_rate_n_flags;
174};
175
176static void rs_rate_scale_perform(struct iwl_priv *priv, 79static void rs_rate_scale_perform(struct iwl_priv *priv,
177 struct sk_buff *skb, 80 struct sk_buff *skb,
178 struct ieee80211_sta *sta, 81 struct ieee80211_sta *sta,
@@ -190,84 +93,78 @@ static void rs_dbgfs_set_mcs(struct iwl_lq_sta *lq_sta,
190{} 93{}
191#endif 94#endif
192 95
193/* 96/**
194 * Expected throughput metrics for following rates: 97 * The following tables contain the expected throughput metrics for all rates
195 * 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54, 60 MBits 98 *
196 * "G" is the only table that supports CCK (the first 4 rates). 99 * 1, 2, 5.5, 11, 6, 9, 12, 18, 24, 36, 48, 54, 60 MBits
100 *
101 * where invalid entries are zeros.
102 *
103 * CCK rates are only valid in legacy table and will only be used in G
104 * (2.4 GHz) band.
197 */ 105 */
198 106
199static s32 expected_tpt_A[IWL_RATE_COUNT] = { 107static s32 expected_tpt_legacy[IWL_RATE_COUNT] = {
200 0, 0, 0, 0, 40, 57, 72, 98, 121, 154, 177, 186, 186 108 7, 13, 35, 58, 40, 57, 72, 98, 121, 154, 177, 186, 0
201};
202
203static s32 expected_tpt_G[IWL_RATE_COUNT] = {
204 7, 13, 35, 58, 40, 57, 72, 98, 121, 154, 177, 186, 186
205};
206
207static s32 expected_tpt_siso20MHz[IWL_RATE_COUNT] = {
208 0, 0, 0, 0, 42, 42, 76, 102, 124, 159, 183, 193, 202
209};
210
211static s32 expected_tpt_siso20MHzSGI[IWL_RATE_COUNT] = {
212 0, 0, 0, 0, 46, 46, 82, 110, 132, 168, 192, 202, 211
213};
214
215static s32 expected_tpt_mimo2_20MHz[IWL_RATE_COUNT] = {
216 0, 0, 0, 0, 74, 74, 123, 155, 179, 214, 236, 244, 251
217};
218
219static s32 expected_tpt_mimo2_20MHzSGI[IWL_RATE_COUNT] = {
220 0, 0, 0, 0, 81, 81, 131, 164, 188, 222, 243, 251, 257
221};
222
223static s32 expected_tpt_siso40MHz[IWL_RATE_COUNT] = {
224 0, 0, 0, 0, 77, 77, 127, 160, 184, 220, 242, 250, 257
225};
226
227static s32 expected_tpt_siso40MHzSGI[IWL_RATE_COUNT] = {
228 0, 0, 0, 0, 83, 83, 135, 169, 193, 229, 250, 257, 264
229}; 109};
230 110
231static s32 expected_tpt_mimo2_40MHz[IWL_RATE_COUNT] = { 111static s32 expected_tpt_siso20MHz[4][IWL_RATE_COUNT] = {
232 0, 0, 0, 0, 123, 123, 182, 214, 235, 264, 279, 285, 289 112 {0, 0, 0, 0, 42, 0, 76, 102, 124, 158, 183, 193, 202}, /* Norm */
113 {0, 0, 0, 0, 46, 0, 82, 110, 132, 167, 192, 202, 210}, /* SGI */
114 {0, 0, 0, 0, 48, 0, 93, 135, 176, 251, 319, 351, 381}, /* AGG */
115 {0, 0, 0, 0, 53, 0, 102, 149, 193, 275, 348, 381, 413}, /* AGG+SGI */
233}; 116};
234 117
235static s32 expected_tpt_mimo2_40MHzSGI[IWL_RATE_COUNT] = { 118static s32 expected_tpt_siso40MHz[4][IWL_RATE_COUNT] = {
236 0, 0, 0, 0, 131, 131, 191, 222, 242, 270, 284, 289, 293 119 {0, 0, 0, 0, 77, 0, 127, 160, 184, 220, 242, 250, 257}, /* Norm */
120 {0, 0, 0, 0, 83, 0, 135, 169, 193, 229, 250, 257, 264}, /* SGI */
121 {0, 0, 0, 0, 96, 0, 182, 259, 328, 451, 553, 598, 640}, /* AGG */
122 {0, 0, 0, 0, 106, 0, 199, 282, 357, 487, 593, 640, 683}, /* AGG+SGI */
237}; 123};
238 124
239/* Expected throughput metric MIMO3 */ 125static s32 expected_tpt_mimo2_20MHz[4][IWL_RATE_COUNT] = {
240static s32 expected_tpt_mimo3_20MHz[IWL_RATE_COUNT] = { 126 {0, 0, 0, 0, 74, 0, 123, 155, 179, 213, 235, 243, 250}, /* Norm */
241 0, 0, 0, 0, 99, 99, 153, 186, 208, 239, 256, 263, 268 127 {0, 0, 0, 0, 81, 0, 131, 164, 187, 221, 242, 250, 256}, /* SGI */
128 {0, 0, 0, 0, 92, 0, 175, 250, 317, 436, 534, 578, 619}, /* AGG */
129 {0, 0, 0, 0, 102, 0, 192, 273, 344, 470, 573, 619, 660}, /* AGG+SGI*/
242}; 130};
243 131
244static s32 expected_tpt_mimo3_20MHzSGI[IWL_RATE_COUNT] = { 132static s32 expected_tpt_mimo2_40MHz[4][IWL_RATE_COUNT] = {
245 0, 0, 0, 0, 106, 106, 162, 194, 215, 246, 262, 268, 273 133 {0, 0, 0, 0, 123, 0, 182, 214, 235, 264, 279, 285, 289}, /* Norm */
134 {0, 0, 0, 0, 131, 0, 191, 222, 242, 270, 284, 289, 293}, /* SGI */
135 {0, 0, 0, 0, 180, 0, 327, 446, 545, 708, 828, 878, 922}, /* AGG */
136 {0, 0, 0, 0, 197, 0, 355, 481, 584, 752, 872, 922, 966}, /* AGG+SGI */
246}; 137};
247 138
248static s32 expected_tpt_mimo3_40MHz[IWL_RATE_COUNT] = { 139static s32 expected_tpt_mimo3_20MHz[4][IWL_RATE_COUNT] = {
249 0, 0, 0, 0, 152, 152, 211, 239, 255, 279, 290, 294, 297 140 {0, 0, 0, 0, 99, 0, 153, 186, 208, 239, 256, 263, 268}, /* Norm */
141 {0, 0, 0, 0, 106, 0, 162, 194, 215, 246, 262, 268, 273}, /* SGI */
142 {0, 0, 0, 0, 134, 0, 249, 346, 431, 574, 685, 732, 775}, /* AGG */
143 {0, 0, 0, 0, 148, 0, 272, 376, 465, 614, 727, 775, 818}, /* AGG+SGI */
250}; 144};
251 145
252static s32 expected_tpt_mimo3_40MHzSGI[IWL_RATE_COUNT] = { 146static s32 expected_tpt_mimo3_40MHz[4][IWL_RATE_COUNT] = {
253 0, 0, 0, 0, 160, 160, 219, 245, 261, 284, 294, 297, 300 147 {0, 0, 0, 0, 152, 0, 211, 239, 255, 279, 290, 294, 297}, /* Norm */
148 {0, 0, 0, 0, 160, 0, 219, 245, 261, 284, 294, 297, 300}, /* SGI */
149 {0, 0, 0, 0, 254, 0, 443, 584, 695, 868, 984, 1030, 1070}, /* AGG */
150 {0, 0, 0, 0, 277, 0, 478, 624, 737, 911, 1026, 1070, 1109}, /* AGG+SGI */
254}; 151};
255 152
256/* mbps, mcs */ 153/* mbps, mcs */
257const static struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = { 154static const struct iwl_rate_mcs_info iwl_rate_mcs[IWL_RATE_COUNT] = {
258 {"1", ""}, 155 { "1", "BPSK DSSS"},
259 {"2", ""}, 156 { "2", "QPSK DSSS"},
260 {"5.5", ""}, 157 {"5.5", "BPSK CCK"},
261 {"11", ""}, 158 { "11", "QPSK CCK"},
262 {"6", "BPSK 1/2"}, 159 { "6", "BPSK 1/2"},
263 {"9", "BPSK 1/2"}, 160 { "9", "BPSK 1/2"},
264 {"12", "QPSK 1/2"}, 161 { "12", "QPSK 1/2"},
265 {"18", "QPSK 3/4"}, 162 { "18", "QPSK 3/4"},
266 {"24", "16QAM 1/2"}, 163 { "24", "16QAM 1/2"},
267 {"36", "16QAM 3/4"}, 164 { "36", "16QAM 3/4"},
268 {"48", "64QAM 2/3"}, 165 { "48", "64QAM 2/3"},
269 {"54", "64QAM 3/4"}, 166 { "54", "64QAM 3/4"},
270 {"60", "64QAM 5/6"} 167 { "60", "64QAM 5/6"},
271}; 168};
272 169
273#define MCS_INDEX_PER_STREAM (8) 170#define MCS_INDEX_PER_STREAM (8)
@@ -402,10 +299,23 @@ static void rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv,
402 struct iwl_lq_sta *lq_data, u8 tid, 299 struct iwl_lq_sta *lq_data, u8 tid,
403 struct ieee80211_sta *sta) 300 struct ieee80211_sta *sta)
404{ 301{
302 int ret;
303
405 if (rs_tl_get_load(lq_data, tid) > IWL_AGG_LOAD_THRESHOLD) { 304 if (rs_tl_get_load(lq_data, tid) > IWL_AGG_LOAD_THRESHOLD) {
406 IWL_DEBUG_HT(priv, "Starting Tx agg: STA: %pM tid: %d\n", 305 IWL_DEBUG_HT(priv, "Starting Tx agg: STA: %pM tid: %d\n",
407 sta->addr, tid); 306 sta->addr, tid);
408 ieee80211_start_tx_ba_session(priv->hw, sta->addr, tid); 307 ret = ieee80211_start_tx_ba_session(sta, tid);
308 if (ret == -EAGAIN) {
309 /*
310 * driver and mac80211 is out of sync
311 * this might be cause by reloading firmware
312 * stop the tx ba session here
313 */
314 IWL_DEBUG_HT(priv, "Fail start Tx agg on tid: %d\n",
315 tid);
316 ret = ieee80211_stop_tx_ba_session(sta, tid,
317 WLAN_BACK_INITIATOR);
318 }
409 } 319 }
410} 320}
411 321
@@ -436,6 +346,17 @@ static inline int get_num_of_ant_from_rate(u32 rate_n_flags)
436 !!(rate_n_flags & RATE_MCS_ANT_C_MSK); 346 !!(rate_n_flags & RATE_MCS_ANT_C_MSK);
437} 347}
438 348
349/*
350 * Static function to get the expected throughput from an iwl_scale_tbl_info
351 * that wraps a NULL pointer check
352 */
353static s32 get_expected_tpt(struct iwl_scale_tbl_info *tbl, int rs_index)
354{
355 if (tbl->expected_tpt)
356 return tbl->expected_tpt[rs_index];
357 return 0;
358}
359
439/** 360/**
440 * rs_collect_tx_data - Update the success/failure sliding window 361 * rs_collect_tx_data - Update the success/failure sliding window
441 * 362 *
@@ -443,19 +364,21 @@ static inline int get_num_of_ant_from_rate(u32 rate_n_flags)
443 * at this rate. window->data contains the bitmask of successful 364 * at this rate. window->data contains the bitmask of successful
444 * packets. 365 * packets.
445 */ 366 */
446static int rs_collect_tx_data(struct iwl_rate_scale_data *windows, 367static int rs_collect_tx_data(struct iwl_scale_tbl_info *tbl,
447 int scale_index, s32 tpt, int retries, 368 int scale_index, int attempts, int successes)
448 int successes)
449{ 369{
450 struct iwl_rate_scale_data *window = NULL; 370 struct iwl_rate_scale_data *window = NULL;
451 static const u64 mask = (((u64)1) << (IWL_RATE_MAX_WINDOW - 1)); 371 static const u64 mask = (((u64)1) << (IWL_RATE_MAX_WINDOW - 1));
452 s32 fail_count; 372 s32 fail_count, tpt;
453 373
454 if (scale_index < 0 || scale_index >= IWL_RATE_COUNT) 374 if (scale_index < 0 || scale_index >= IWL_RATE_COUNT)
455 return -EINVAL; 375 return -EINVAL;
456 376
457 /* Select data for current tx bit rate */ 377 /* Select window for current tx bit rate */
458 window = &(windows[scale_index]); 378 window = &(tbl->win[scale_index]);
379
380 /* Get expected throughput */
381 tpt = get_expected_tpt(tbl, scale_index);
459 382
460 /* 383 /*
461 * Keep track of only the latest 62 tx frame attempts in this rate's 384 * Keep track of only the latest 62 tx frame attempts in this rate's
@@ -465,7 +388,7 @@ static int rs_collect_tx_data(struct iwl_rate_scale_data *windows,
465 * subtract "1" from the success counter (this is the main reason 388 * subtract "1" from the success counter (this is the main reason
466 * we keep these bitmaps!). 389 * we keep these bitmaps!).
467 */ 390 */
468 while (retries > 0) { 391 while (attempts > 0) {
469 if (window->counter >= IWL_RATE_MAX_WINDOW) { 392 if (window->counter >= IWL_RATE_MAX_WINDOW) {
470 393
471 /* remove earliest */ 394 /* remove earliest */
@@ -480,17 +403,17 @@ static int rs_collect_tx_data(struct iwl_rate_scale_data *windows,
480 /* Increment frames-attempted counter */ 403 /* Increment frames-attempted counter */
481 window->counter++; 404 window->counter++;
482 405
483 /* Shift bitmap by one frame (throw away oldest history), 406 /* Shift bitmap by one frame to throw away oldest history */
484 * OR in "1", and increment "success" if this
485 * frame was successful. */
486 window->data <<= 1; 407 window->data <<= 1;
408
409 /* Mark the most recent #successes attempts as successful */
487 if (successes > 0) { 410 if (successes > 0) {
488 window->success_counter++; 411 window->success_counter++;
489 window->data |= 0x1; 412 window->data |= 0x1;
490 successes--; 413 successes--;
491 } 414 }
492 415
493 retries--; 416 attempts--;
494 } 417 }
495 418
496 /* Calculate current success ratio, avoid divide-by-0! */ 419 /* Calculate current success ratio, avoid divide-by-0! */
@@ -671,7 +594,7 @@ static int rs_toggle_antenna(u32 valid_ant, u32 *rate_n_flags,
671 * there are no non-GF stations present in the BSS. 594 * there are no non-GF stations present in the BSS.
672 */ 595 */
673static inline u8 rs_use_green(struct ieee80211_sta *sta, 596static inline u8 rs_use_green(struct ieee80211_sta *sta,
674 struct iwl_ht_info *ht_conf) 597 struct iwl_ht_config *ht_conf)
675{ 598{
676 return (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) && 599 return (sta->ht_cap.cap & IEEE80211_HT_CAP_GRN_FLD) &&
677 !(ht_conf->non_GF_STA_present); 600 !(ht_conf->non_GF_STA_present);
@@ -821,28 +744,34 @@ out:
821} 744}
822 745
823/* 746/*
747 * Simple function to compare two rate scale table types
748 */
749static bool table_type_matches(struct iwl_scale_tbl_info *a,
750 struct iwl_scale_tbl_info *b)
751{
752 return (a->lq_type == b->lq_type) && (a->ant_type == b->ant_type) &&
753 (a->is_SGI == b->is_SGI);
754}
755
756/*
824 * mac80211 sends us Tx status 757 * mac80211 sends us Tx status
825 */ 758 */
826static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, 759static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
827 struct ieee80211_sta *sta, void *priv_sta, 760 struct ieee80211_sta *sta, void *priv_sta,
828 struct sk_buff *skb) 761 struct sk_buff *skb)
829{ 762{
830 int status; 763 int legacy_success;
831 u8 retries; 764 int retries;
832 int rs_index, mac_index, index = 0; 765 int rs_index, mac_index, i;
833 struct iwl_lq_sta *lq_sta = priv_sta; 766 struct iwl_lq_sta *lq_sta = priv_sta;
834 struct iwl_link_quality_cmd *table; 767 struct iwl_link_quality_cmd *table;
835 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 768 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
836 struct iwl_priv *priv = (struct iwl_priv *)priv_r; 769 struct iwl_priv *priv = (struct iwl_priv *)priv_r;
837 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 770 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
838 struct iwl_rate_scale_data *window = NULL;
839 struct iwl_rate_scale_data *search_win = NULL;
840 enum mac80211_rate_control_flags mac_flags; 771 enum mac80211_rate_control_flags mac_flags;
841 u32 tx_rate; 772 u32 tx_rate;
842 struct iwl_scale_tbl_info tbl_type; 773 struct iwl_scale_tbl_info tbl_type;
843 struct iwl_scale_tbl_info *curr_tbl, *search_tbl; 774 struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl;
844 u8 active_index = 0;
845 s32 tpt = 0;
846 775
847 IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n"); 776 IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n");
848 777
@@ -850,30 +779,14 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
850 info->flags & IEEE80211_TX_CTL_NO_ACK) 779 info->flags & IEEE80211_TX_CTL_NO_ACK)
851 return; 780 return;
852 781
853 /* This packet was aggregated but doesn't carry rate scale info */ 782 /* This packet was aggregated but doesn't carry status info */
854 if ((info->flags & IEEE80211_TX_CTL_AMPDU) && 783 if ((info->flags & IEEE80211_TX_CTL_AMPDU) &&
855 !(info->flags & IEEE80211_TX_STAT_AMPDU)) 784 !(info->flags & IEEE80211_TX_STAT_AMPDU))
856 return; 785 return;
857 786
858 if (info->flags & IEEE80211_TX_STAT_AMPDU)
859 retries = 0;
860 else
861 retries = info->status.rates[0].count - 1;
862
863 if (retries > 15)
864 retries = 15;
865
866 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) && 787 if ((priv->iw_mode == NL80211_IFTYPE_ADHOC) &&
867 !lq_sta->ibss_sta_added) 788 !lq_sta->ibss_sta_added)
868 goto out; 789 return;
869
870 table = &lq_sta->lq;
871 active_index = lq_sta->active_tbl;
872
873 curr_tbl = &(lq_sta->lq_info[active_index]);
874 search_tbl = &(lq_sta->lq_info[(1 - active_index)]);
875 window = (struct iwl_rate_scale_data *)&(curr_tbl->win[0]);
876 search_win = (struct iwl_rate_scale_data *)&(search_tbl->win[0]);
877 790
878 /* 791 /*
879 * Ignore this Tx frame response if its initial rate doesn't match 792 * Ignore this Tx frame response if its initial rate doesn't match
@@ -883,6 +796,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
883 * to check "search" mode, or a prior "search" mode after we've moved 796 * to check "search" mode, or a prior "search" mode after we've moved
884 * to a new "search" mode (which might become the new "active" mode). 797 * to a new "search" mode (which might become the new "active" mode).
885 */ 798 */
799 table = &lq_sta->lq;
886 tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); 800 tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags);
887 rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, &rs_index); 801 rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, &rs_index);
888 if (priv->band == IEEE80211_BAND_5GHZ) 802 if (priv->band == IEEE80211_BAND_5GHZ)
@@ -901,7 +815,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
901 if (priv->band == IEEE80211_BAND_2GHZ) 815 if (priv->band == IEEE80211_BAND_2GHZ)
902 mac_index += IWL_FIRST_OFDM_RATE; 816 mac_index += IWL_FIRST_OFDM_RATE;
903 } 817 }
904 818 /* Here we actually compare this rate to the latest LQ command */
905 if ((mac_index < 0) || 819 if ((mac_index < 0) ||
906 (tbl_type.is_SGI != !!(mac_flags & IEEE80211_TX_RC_SHORT_GI)) || 820 (tbl_type.is_SGI != !!(mac_flags & IEEE80211_TX_RC_SHORT_GI)) ||
907 (tbl_type.is_ht40 != !!(mac_flags & IEEE80211_TX_RC_40_MHZ_WIDTH)) || 821 (tbl_type.is_ht40 != !!(mac_flags & IEEE80211_TX_RC_40_MHZ_WIDTH)) ||
@@ -911,124 +825,98 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband,
911 (!!(tx_rate & RATE_MCS_GF_MSK) != !!(mac_flags & IEEE80211_TX_RC_GREEN_FIELD)) || 825 (!!(tx_rate & RATE_MCS_GF_MSK) != !!(mac_flags & IEEE80211_TX_RC_GREEN_FIELD)) ||
912 (rs_index != mac_index)) { 826 (rs_index != mac_index)) {
913 IWL_DEBUG_RATE(priv, "initial rate %d does not match %d (0x%x)\n", mac_index, rs_index, tx_rate); 827 IWL_DEBUG_RATE(priv, "initial rate %d does not match %d (0x%x)\n", mac_index, rs_index, tx_rate);
914 /* the last LQ command could failed so the LQ in ucode not 828 /*
915 * the same in driver sync up 829 * Since rates mis-match, the last LQ command may have failed.
830 * After IWL_MISSED_RATE_MAX mis-matches, resync the uCode with
831 * ... driver.
916 */ 832 */
917 lq_sta->missed_rate_counter++; 833 lq_sta->missed_rate_counter++;
918 if (lq_sta->missed_rate_counter > IWL_MISSED_RATE_MAX) { 834 if (lq_sta->missed_rate_counter > IWL_MISSED_RATE_MAX) {
919 lq_sta->missed_rate_counter = 0; 835 lq_sta->missed_rate_counter = 0;
920 iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC); 836 iwl_send_lq_cmd(priv, &lq_sta->lq, CMD_ASYNC);
921 } 837 }
922 goto out; 838 /* Regardless, ignore this status info for outdated rate */
923 } 839 return;
924 840 } else
925 lq_sta->missed_rate_counter = 0; 841 /* Rate did match, so reset the missed_rate_counter */
926 /* Update frame history window with "failure" for each Tx retry. */ 842 lq_sta->missed_rate_counter = 0;
927 while (retries) { 843
928 /* Look up the rate and other info used for each tx attempt. 844 /* Figure out if rate scale algorithm is in active or search table */
929 * Each tx attempt steps one entry deeper in the rate table. */ 845 if (table_type_matches(&tbl_type,
930 tx_rate = le32_to_cpu(table->rs_table[index].rate_n_flags); 846 &(lq_sta->lq_info[lq_sta->active_tbl]))) {
931 rs_get_tbl_info_from_mcs(tx_rate, priv->band, 847 curr_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
932 &tbl_type, &rs_index); 848 other_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]);
933 849 } else if (table_type_matches(&tbl_type,
934 /* If type matches "search" table, 850 &lq_sta->lq_info[1 - lq_sta->active_tbl])) {
935 * add failure to "search" history */ 851 curr_tbl = &(lq_sta->lq_info[1 - lq_sta->active_tbl]);
936 if ((tbl_type.lq_type == search_tbl->lq_type) && 852 other_tbl = &(lq_sta->lq_info[lq_sta->active_tbl]);
937 (tbl_type.ant_type == search_tbl->ant_type) && 853 } else {
938 (tbl_type.is_SGI == search_tbl->is_SGI)) { 854 IWL_DEBUG_RATE(priv, "Neither active nor search matches tx rate\n");
939 if (search_tbl->expected_tpt) 855 return;
940 tpt = search_tbl->expected_tpt[rs_index];
941 else
942 tpt = 0;
943 rs_collect_tx_data(search_win, rs_index, tpt, 1, 0);
944
945 /* Else if type matches "current/active" table,
946 * add failure to "current/active" history */
947 } else if ((tbl_type.lq_type == curr_tbl->lq_type) &&
948 (tbl_type.ant_type == curr_tbl->ant_type) &&
949 (tbl_type.is_SGI == curr_tbl->is_SGI)) {
950 if (curr_tbl->expected_tpt)
951 tpt = curr_tbl->expected_tpt[rs_index];
952 else
953 tpt = 0;
954 rs_collect_tx_data(window, rs_index, tpt, 1, 0);
955 }
956
957 /* If not searching for a new mode, increment failed counter
958 * ... this helps determine when to start searching again */
959 if (lq_sta->stay_in_tbl)
960 lq_sta->total_failed++;
961 --retries;
962 index++;
963
964 } 856 }
965 857
966 /* 858 /*
967 * Find (by rate) the history window to update with final Tx attempt; 859 * Updating the frame history depends on whether packets were
968 * if Tx was successful first try, use original rate, 860 * aggregated.
969 * else look up the rate that was, finally, successful. 861 *
862 * For aggregation, all packets were transmitted at the same rate, the
863 * first index into rate scale table.
970 */ 864 */
971 tx_rate = le32_to_cpu(table->rs_table[index].rate_n_flags); 865 if (info->flags & IEEE80211_TX_STAT_AMPDU) {
972 lq_sta->last_rate_n_flags = tx_rate; 866 tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags);
973 rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, &rs_index); 867 rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type,
974 868 &rs_index);
975 /* Update frame history window with "success" if Tx got ACKed ... */ 869 rs_collect_tx_data(curr_tbl, rs_index,
976 status = !!(info->flags & IEEE80211_TX_STAT_ACK); 870 info->status.ampdu_ack_len,
977 871 info->status.ampdu_ack_map);
978 /* If type matches "search" table, 872
979 * add final tx status to "search" history */ 873 /* Update success/fail counts if not searching for new mode */
980 if ((tbl_type.lq_type == search_tbl->lq_type) && 874 if (lq_sta->stay_in_tbl) {
981 (tbl_type.ant_type == search_tbl->ant_type) &&
982 (tbl_type.is_SGI == search_tbl->is_SGI)) {
983 if (search_tbl->expected_tpt)
984 tpt = search_tbl->expected_tpt[rs_index];
985 else
986 tpt = 0;
987 if (info->flags & IEEE80211_TX_STAT_AMPDU)
988 rs_collect_tx_data(search_win, rs_index, tpt,
989 info->status.ampdu_ack_len,
990 info->status.ampdu_ack_map);
991 else
992 rs_collect_tx_data(search_win, rs_index, tpt,
993 1, status);
994 /* Else if type matches "current/active" table,
995 * add final tx status to "current/active" history */
996 } else if ((tbl_type.lq_type == curr_tbl->lq_type) &&
997 (tbl_type.ant_type == curr_tbl->ant_type) &&
998 (tbl_type.is_SGI == curr_tbl->is_SGI)) {
999 if (curr_tbl->expected_tpt)
1000 tpt = curr_tbl->expected_tpt[rs_index];
1001 else
1002 tpt = 0;
1003 if (info->flags & IEEE80211_TX_STAT_AMPDU)
1004 rs_collect_tx_data(window, rs_index, tpt,
1005 info->status.ampdu_ack_len,
1006 info->status.ampdu_ack_map);
1007 else
1008 rs_collect_tx_data(window, rs_index, tpt,
1009 1, status);
1010 }
1011
1012 /* If not searching for new mode, increment success/failed counter
1013 * ... these help determine when to start searching again */
1014 if (lq_sta->stay_in_tbl) {
1015 if (info->flags & IEEE80211_TX_STAT_AMPDU) {
1016 lq_sta->total_success += info->status.ampdu_ack_map; 875 lq_sta->total_success += info->status.ampdu_ack_map;
1017 lq_sta->total_failed += 876 lq_sta->total_failed += (info->status.ampdu_ack_len -
1018 (info->status.ampdu_ack_len - info->status.ampdu_ack_map); 877 info->status.ampdu_ack_map);
1019 } else { 878 }
1020 if (status) 879 } else {
1021 lq_sta->total_success++; 880 /*
881 * For legacy, update frame history with for each Tx retry.
882 */
883 retries = info->status.rates[0].count - 1;
884 /* HW doesn't send more than 15 retries */
885 retries = min(retries, 15);
886
887 /* The last transmission may have been successful */
888 legacy_success = !!(info->flags & IEEE80211_TX_STAT_ACK);
889 /* Collect data for each rate used during failed TX attempts */
890 for (i = 0; i <= retries; ++i) {
891 tx_rate = le32_to_cpu(table->rs_table[i].rate_n_flags);
892 rs_get_tbl_info_from_mcs(tx_rate, priv->band,
893 &tbl_type, &rs_index);
894 /*
895 * Only collect stats if retried rate is in the same RS
896 * table as active/search.
897 */
898 if (table_type_matches(&tbl_type, curr_tbl))
899 tmp_tbl = curr_tbl;
900 else if (table_type_matches(&tbl_type, other_tbl))
901 tmp_tbl = other_tbl;
1022 else 902 else
1023 lq_sta->total_failed++; 903 continue;
904 rs_collect_tx_data(tmp_tbl, rs_index, 1,
905 i < retries ? 0 : legacy_success);
906 }
907
908 /* Update success/fail counts if not searching for new mode */
909 if (lq_sta->stay_in_tbl) {
910 lq_sta->total_success += legacy_success;
911 lq_sta->total_failed += retries + (1 - legacy_success);
1024 } 912 }
1025 } 913 }
914 /* The last TX rate is cached in lq_sta; it's set in if/else above */
915 lq_sta->last_rate_n_flags = tx_rate;
1026 916
1027 /* See if there's a better rate or modulation mode to try. */ 917 /* See if there's a better rate or modulation mode to try. */
1028 if (sta && sta->supp_rates[sband->band]) 918 if (sta && sta->supp_rates[sband->band])
1029 rs_rate_scale_perform(priv, skb, sta, lq_sta); 919 rs_rate_scale_perform(priv, skb, sta, lq_sta);
1030out:
1031 return;
1032} 920}
1033 921
1034/* 922/*
@@ -1066,43 +954,45 @@ static void rs_set_stay_in_table(struct iwl_priv *priv, u8 is_legacy,
1066static void rs_set_expected_tpt_table(struct iwl_lq_sta *lq_sta, 954static void rs_set_expected_tpt_table(struct iwl_lq_sta *lq_sta,
1067 struct iwl_scale_tbl_info *tbl) 955 struct iwl_scale_tbl_info *tbl)
1068{ 956{
957 /* Used to choose among HT tables */
958 s32 (*ht_tbl_pointer)[IWL_RATE_COUNT];
959
960 /* Check for invalid LQ type */
961 if (WARN_ON_ONCE(!is_legacy(tbl->lq_type) && !is_Ht(tbl->lq_type))) {
962 tbl->expected_tpt = expected_tpt_legacy;
963 return;
964 }
965
966 /* Legacy rates have only one table */
1069 if (is_legacy(tbl->lq_type)) { 967 if (is_legacy(tbl->lq_type)) {
1070 if (!is_a_band(tbl->lq_type)) 968 tbl->expected_tpt = expected_tpt_legacy;
1071 tbl->expected_tpt = expected_tpt_G; 969 return;
1072 else 970 }
1073 tbl->expected_tpt = expected_tpt_A; 971
1074 } else if (is_siso(tbl->lq_type)) { 972 /* Choose among many HT tables depending on number of streams
1075 if (tbl->is_ht40 && !lq_sta->is_dup) 973 * (SISO/MIMO2/MIMO3), channel width (20/40), SGI, and aggregation
1076 if (tbl->is_SGI) 974 * status */
1077 tbl->expected_tpt = expected_tpt_siso40MHzSGI; 975 if (is_siso(tbl->lq_type) && (!tbl->is_ht40 || lq_sta->is_dup))
1078 else 976 ht_tbl_pointer = expected_tpt_siso20MHz;
1079 tbl->expected_tpt = expected_tpt_siso40MHz; 977 else if (is_siso(tbl->lq_type))
1080 else if (tbl->is_SGI) 978 ht_tbl_pointer = expected_tpt_siso40MHz;
1081 tbl->expected_tpt = expected_tpt_siso20MHzSGI; 979 else if (is_mimo2(tbl->lq_type) && (!tbl->is_ht40 || lq_sta->is_dup))
1082 else 980 ht_tbl_pointer = expected_tpt_mimo2_20MHz;
1083 tbl->expected_tpt = expected_tpt_siso20MHz; 981 else if (is_mimo2(tbl->lq_type))
1084 } else if (is_mimo2(tbl->lq_type)) { 982 ht_tbl_pointer = expected_tpt_mimo2_40MHz;
1085 if (tbl->is_ht40 && !lq_sta->is_dup) 983 else if (is_mimo3(tbl->lq_type) && (!tbl->is_ht40 || lq_sta->is_dup))
1086 if (tbl->is_SGI) 984 ht_tbl_pointer = expected_tpt_mimo3_20MHz;
1087 tbl->expected_tpt = expected_tpt_mimo2_40MHzSGI; 985 else /* if (is_mimo3(tbl->lq_type)) <-- must be true */
1088 else 986 ht_tbl_pointer = expected_tpt_mimo3_40MHz;
1089 tbl->expected_tpt = expected_tpt_mimo2_40MHz; 987
1090 else if (tbl->is_SGI) 988 if (!tbl->is_SGI && !lq_sta->is_agg) /* Normal */
1091 tbl->expected_tpt = expected_tpt_mimo2_20MHzSGI; 989 tbl->expected_tpt = ht_tbl_pointer[0];
1092 else 990 else if (tbl->is_SGI && !lq_sta->is_agg) /* SGI */
1093 tbl->expected_tpt = expected_tpt_mimo2_20MHz; 991 tbl->expected_tpt = ht_tbl_pointer[1];
1094 } else if (is_mimo3(tbl->lq_type)) { 992 else if (!tbl->is_SGI && lq_sta->is_agg) /* AGG */
1095 if (tbl->is_ht40 && !lq_sta->is_dup) 993 tbl->expected_tpt = ht_tbl_pointer[2];
1096 if (tbl->is_SGI) 994 else /* AGG+SGI */
1097 tbl->expected_tpt = expected_tpt_mimo3_40MHzSGI; 995 tbl->expected_tpt = ht_tbl_pointer[3];
1098 else
1099 tbl->expected_tpt = expected_tpt_mimo3_40MHz;
1100 else if (tbl->is_SGI)
1101 tbl->expected_tpt = expected_tpt_mimo3_20MHzSGI;
1102 else
1103 tbl->expected_tpt = expected_tpt_mimo3_20MHz;
1104 } else
1105 tbl->expected_tpt = expected_tpt_G;
1106} 996}
1107 997
1108/* 998/*
@@ -2077,6 +1967,14 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
2077 lq_sta->supp_rates = sta->supp_rates[lq_sta->band]; 1967 lq_sta->supp_rates = sta->supp_rates[lq_sta->band];
2078 1968
2079 tid = rs_tl_add_packet(lq_sta, hdr); 1969 tid = rs_tl_add_packet(lq_sta, hdr);
1970 if ((tid != MAX_TID_COUNT) && (lq_sta->tx_agg_tid_en & (1 << tid))) {
1971 tid_data = &priv->stations[lq_sta->lq.sta_id].tid[tid];
1972 if (tid_data->agg.state == IWL_AGG_OFF)
1973 lq_sta->is_agg = 0;
1974 else
1975 lq_sta->is_agg = 1;
1976 } else
1977 lq_sta->is_agg = 0;
2080 1978
2081 /* 1979 /*
2082 * Select rate-scale / modulation-mode table to work with in 1980 * Select rate-scale / modulation-mode table to work with in
@@ -2177,10 +2075,10 @@ static void rs_rate_scale_perform(struct iwl_priv *priv,
2177 2075
2178 goto out; 2076 goto out;
2179 } 2077 }
2180
2181 /* Else we have enough samples; calculate estimate of 2078 /* Else we have enough samples; calculate estimate of
2182 * actual average throughput */ 2079 * actual average throughput */
2183 2080
2081 /* Sanity-check TPT calculations */
2184 BUG_ON(window->average_tpt != ((window->success_ratio * 2082 BUG_ON(window->average_tpt != ((window->success_ratio *
2185 tbl->expected_tpt[index] + 64) / 128)); 2083 tbl->expected_tpt[index] + 64) / 128));
2186 2084
@@ -2584,22 +2482,13 @@ static void *rs_alloc_sta(void *priv_rate, struct ieee80211_sta *sta,
2584 gfp_t gfp) 2482 gfp_t gfp)
2585{ 2483{
2586 struct iwl_lq_sta *lq_sta; 2484 struct iwl_lq_sta *lq_sta;
2485 struct iwl_station_priv *sta_priv = (struct iwl_station_priv *) sta->drv_priv;
2587 struct iwl_priv *priv; 2486 struct iwl_priv *priv;
2588 int i, j;
2589 2487
2590 priv = (struct iwl_priv *)priv_rate; 2488 priv = (struct iwl_priv *)priv_rate;
2591 IWL_DEBUG_RATE(priv, "create station rate scale window\n"); 2489 IWL_DEBUG_RATE(priv, "create station rate scale window\n");
2592 2490
2593 lq_sta = kzalloc(sizeof(struct iwl_lq_sta), gfp); 2491 lq_sta = &sta_priv->lq_sta;
2594
2595 if (lq_sta == NULL)
2596 return NULL;
2597 lq_sta->lq.sta_id = 0xff;
2598
2599
2600 for (j = 0; j < LQ_SIZE; j++)
2601 for (i = 0; i < IWL_RATE_COUNT; i++)
2602 rs_rate_scale_clear_window(&lq_sta->lq_info[j].win[i]);
2603 2492
2604 return lq_sta; 2493 return lq_sta;
2605} 2494}
@@ -2613,6 +2502,12 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband,
2613 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; 2502 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2614 struct iwl_lq_sta *lq_sta = priv_sta; 2503 struct iwl_lq_sta *lq_sta = priv_sta;
2615 2504
2505 lq_sta->lq.sta_id = 0xff;
2506
2507 for (j = 0; j < LQ_SIZE; j++)
2508 for (i = 0; i < IWL_RATE_COUNT; i++)
2509 rs_rate_scale_clear_window(&lq_sta->lq_info[j].win[i]);
2510
2616 lq_sta->flush_timer = 0; 2511 lq_sta->flush_timer = 0;
2617 lq_sta->supp_rates = sta->supp_rates[sband->band]; 2512 lq_sta->supp_rates = sta->supp_rates[sband->band];
2618 for (j = 0; j < LQ_SIZE; j++) 2513 for (j = 0; j < LQ_SIZE; j++)
@@ -2690,6 +2585,7 @@ static void rs_rate_init(void *priv_r, struct ieee80211_supported_band *sband,
2690 lq_sta->last_txrate_idx = rate_lowest_index(sband, sta); 2585 lq_sta->last_txrate_idx = rate_lowest_index(sband, sta);
2691 if (sband->band == IEEE80211_BAND_5GHZ) 2586 if (sband->band == IEEE80211_BAND_5GHZ)
2692 lq_sta->last_txrate_idx += IWL_FIRST_OFDM_RATE; 2587 lq_sta->last_txrate_idx += IWL_FIRST_OFDM_RATE;
2588 lq_sta->is_agg = 0;
2693 2589
2694 rs_initialize_lq(priv, conf, sta, lq_sta); 2590 rs_initialize_lq(priv, conf, sta, lq_sta);
2695} 2591}
@@ -2808,7 +2704,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,
2808 repeat_rate--; 2704 repeat_rate--;
2809 } 2705 }
2810 2706
2811 lq_cmd->agg_params.agg_frame_cnt_limit = LINK_QUAL_AGG_FRAME_LIMIT_MAX; 2707 lq_cmd->agg_params.agg_frame_cnt_limit = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2812 lq_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF; 2708 lq_cmd->agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
2813 lq_cmd->agg_params.agg_time_limit = 2709 lq_cmd->agg_params.agg_time_limit =
2814 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF); 2710 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
@@ -2827,11 +2723,9 @@ static void rs_free(void *priv_rate)
2827static void rs_free_sta(void *priv_r, struct ieee80211_sta *sta, 2723static void rs_free_sta(void *priv_r, struct ieee80211_sta *sta,
2828 void *priv_sta) 2724 void *priv_sta)
2829{ 2725{
2830 struct iwl_lq_sta *lq_sta = priv_sta;
2831 struct iwl_priv *priv __maybe_unused = priv_r; 2726 struct iwl_priv *priv __maybe_unused = priv_r;
2832 2727
2833 IWL_DEBUG_RATE(priv, "enter\n"); 2728 IWL_DEBUG_RATE(priv, "enter\n");
2834 kfree(lq_sta);
2835 IWL_DEBUG_RATE(priv, "leave\n"); 2729 IWL_DEBUG_RATE(priv, "leave\n");
2836} 2730}
2837 2731
@@ -2942,8 +2836,9 @@ static ssize_t rs_sta_dbgfs_scale_table_read(struct file *file,
2942 ((is_mimo2(tbl->lq_type)) ? "MIMO2" : "MIMO3")); 2836 ((is_mimo2(tbl->lq_type)) ? "MIMO2" : "MIMO3"));
2943 desc += sprintf(buff+desc, " %s", 2837 desc += sprintf(buff+desc, " %s",
2944 (tbl->is_ht40) ? "40MHz" : "20MHz"); 2838 (tbl->is_ht40) ? "40MHz" : "20MHz");
2945 desc += sprintf(buff+desc, " %s %s\n", (tbl->is_SGI) ? "SGI" : "", 2839 desc += sprintf(buff+desc, " %s %s %s\n", (tbl->is_SGI) ? "SGI" : "",
2946 (lq_sta->is_green) ? "GF enabled" : ""); 2840 (lq_sta->is_green) ? "GF enabled" : "",
2841 (lq_sta->is_agg) ? "AGG on" : "");
2947 } 2842 }
2948 desc += sprintf(buff+desc, "last tx rate=0x%X\n", 2843 desc += sprintf(buff+desc, "last tx rate=0x%X\n",
2949 lq_sta->last_rate_n_flags); 2844 lq_sta->last_rate_n_flags);
@@ -3076,16 +2971,16 @@ static void rs_add_debugfs(void *priv, void *priv_sta,
3076{ 2971{
3077 struct iwl_lq_sta *lq_sta = priv_sta; 2972 struct iwl_lq_sta *lq_sta = priv_sta;
3078 lq_sta->rs_sta_dbgfs_scale_table_file = 2973 lq_sta->rs_sta_dbgfs_scale_table_file =
3079 debugfs_create_file("rate_scale_table", 0600, dir, 2974 debugfs_create_file("rate_scale_table", S_IRUSR | S_IWUSR, dir,
3080 lq_sta, &rs_sta_dbgfs_scale_table_ops); 2975 lq_sta, &rs_sta_dbgfs_scale_table_ops);
3081 lq_sta->rs_sta_dbgfs_stats_table_file = 2976 lq_sta->rs_sta_dbgfs_stats_table_file =
3082 debugfs_create_file("rate_stats_table", 0600, dir, 2977 debugfs_create_file("rate_stats_table", S_IRUSR, dir,
3083 lq_sta, &rs_sta_dbgfs_stats_table_ops); 2978 lq_sta, &rs_sta_dbgfs_stats_table_ops);
3084 lq_sta->rs_sta_dbgfs_rate_scale_data_file = 2979 lq_sta->rs_sta_dbgfs_rate_scale_data_file =
3085 debugfs_create_file("rate_scale_data", 0600, dir, 2980 debugfs_create_file("rate_scale_data", S_IRUSR, dir,
3086 lq_sta, &rs_sta_dbgfs_rate_scale_data_ops); 2981 lq_sta, &rs_sta_dbgfs_rate_scale_data_ops);
3087 lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file = 2982 lq_sta->rs_sta_dbgfs_tx_agg_tid_en_file =
3088 debugfs_create_u8("tx_agg_tid_enable", 0600, dir, 2983 debugfs_create_u8("tx_agg_tid_enable", S_IRUSR | S_IWUSR, dir,
3089 &lq_sta->tx_agg_tid_en); 2984 &lq_sta->tx_agg_tid_en);
3090 2985
3091} 2986}
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h
index 9fac530cfb7e..e71923961e69 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.h
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -54,6 +54,7 @@ struct iwl3945_rate_info {
54 u8 prev_table_rs; /* prev in rate table cmd */ 54 u8 prev_table_rs; /* prev in rate table cmd */
55}; 55};
56 56
57
57/* 58/*
58 * These serve as indexes into 59 * These serve as indexes into
59 * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT]; 60 * struct iwl_rate_info iwl_rates[IWL_RATE_COUNT];
@@ -190,7 +191,7 @@ enum {
190 IWL_RATE_2M_MASK) 191 IWL_RATE_2M_MASK)
191 192
192#define IWL_CCK_RATES_MASK \ 193#define IWL_CCK_RATES_MASK \
193 (IWL_BASIC_RATES_MASK | \ 194 (IWL_CCK_BASIC_RATES_MASK | \
194 IWL_RATE_5M_MASK | \ 195 IWL_RATE_5M_MASK | \
195 IWL_RATE_11M_MASK) 196 IWL_RATE_11M_MASK)
196 197
@@ -335,6 +336,106 @@ struct iwl_rate_mcs_info {
335 char mcs[IWL_MAX_MCS_DISPLAY_SIZE]; 336 char mcs[IWL_MAX_MCS_DISPLAY_SIZE];
336}; 337};
337 338
339/**
340 * struct iwl_rate_scale_data -- tx success history for one rate
341 */
342struct iwl_rate_scale_data {
343 u64 data; /* bitmap of successful frames */
344 s32 success_counter; /* number of frames successful */
345 s32 success_ratio; /* per-cent * 128 */
346 s32 counter; /* number of frames attempted */
347 s32 average_tpt; /* success ratio * expected throughput */
348 unsigned long stamp;
349};
350
351/**
352 * struct iwl_scale_tbl_info -- tx params and success history for all rates
353 *
354 * There are two of these in struct iwl_lq_sta,
355 * one for "active", and one for "search".
356 */
357struct iwl_scale_tbl_info {
358 enum iwl_table_type lq_type;
359 u8 ant_type;
360 u8 is_SGI; /* 1 = short guard interval */
361 u8 is_ht40; /* 1 = 40 MHz channel width */
362 u8 is_dup; /* 1 = duplicated data streams */
363 u8 action; /* change modulation; IWL_[LEGACY/SISO/MIMO]_SWITCH_* */
364 u8 max_search; /* maximun number of tables we can search */
365 s32 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */
366 u32 current_rate; /* rate_n_flags, uCode API format */
367 struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */
368};
369
370struct iwl_traffic_load {
371 unsigned long time_stamp; /* age of the oldest statistics */
372 u32 packet_count[TID_QUEUE_MAX_SIZE]; /* packet count in this time
373 * slice */
374 u32 total; /* total num of packets during the
375 * last TID_MAX_TIME_DIFF */
376 u8 queue_count; /* number of queues that has
377 * been used since the last cleanup */
378 u8 head; /* start of the circular buffer */
379};
380
381/**
382 * struct iwl_lq_sta -- driver's rate scaling private structure
383 *
384 * Pointer to this gets passed back and forth between driver and mac80211.
385 */
386struct iwl_lq_sta {
387 u8 active_tbl; /* index of active table, range 0-1 */
388 u8 enable_counter; /* indicates HT mode */
389 u8 stay_in_tbl; /* 1: disallow, 0: allow search for new mode */
390 u8 search_better_tbl; /* 1: currently trying alternate mode */
391 s32 last_tpt;
392
393 /* The following determine when to search for a new mode */
394 u32 table_count_limit;
395 u32 max_failure_limit; /* # failed frames before new search */
396 u32 max_success_limit; /* # successful frames before new search */
397 u32 table_count;
398 u32 total_failed; /* total failed frames, any/all rates */
399 u32 total_success; /* total successful frames, any/all rates */
400 u64 flush_timer; /* time staying in mode before new search */
401
402 u8 action_counter; /* # mode-switch actions tried */
403 u8 is_green;
404 u8 is_dup;
405 enum ieee80211_band band;
406 u8 ibss_sta_added;
407
408 /* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */
409 u32 supp_rates;
410 u16 active_legacy_rate;
411 u16 active_siso_rate;
412 u16 active_mimo2_rate;
413 u16 active_mimo3_rate;
414 u16 active_rate_basic;
415 s8 max_rate_idx; /* Max rate set by user */
416 u8 missed_rate_counter;
417
418 struct iwl_link_quality_cmd lq;
419 struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */
420 struct iwl_traffic_load load[TID_MAX_LOAD_COUNT];
421 u8 tx_agg_tid_en;
422#ifdef CONFIG_MAC80211_DEBUGFS
423 struct dentry *rs_sta_dbgfs_scale_table_file;
424 struct dentry *rs_sta_dbgfs_stats_table_file;
425 struct dentry *rs_sta_dbgfs_rate_scale_data_file;
426 struct dentry *rs_sta_dbgfs_tx_agg_tid_en_file;
427 u32 dbg_fixed_rate;
428#endif
429 struct iwl_priv *drv;
430
431 /* used to be in sta_info */
432 int last_txrate_idx;
433 /* last tx rate_n_flags */
434 u32 last_rate_n_flags;
435 /* packets destined for this STA are aggregated */
436 u8 is_agg;
437};
438
338static inline u8 num_of_ant(u8 mask) 439static inline u8 num_of_ant(u8 mask)
339{ 440{
340 return !!((mask) & ANT_A) + 441 return !!((mask) & ANT_A) +
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 921dc4a26fe2..bdff56583e11 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -31,6 +31,7 @@
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/slab.h>
34#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
35#include <linux/delay.h> 36#include <linux/delay.h>
36#include <linux/sched.h> 37#include <linux/sched.h>
@@ -73,13 +74,7 @@
73#define VD 74#define VD
74#endif 75#endif
75 76
76#ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT 77#define DRV_VERSION IWLWIFI_VERSION VD
77#define VS "s"
78#else
79#define VS
80#endif
81
82#define DRV_VERSION IWLWIFI_VERSION VD VS
83 78
84 79
85MODULE_DESCRIPTION(DRV_DESCRIPTION); 80MODULE_DESCRIPTION(DRV_DESCRIPTION);
@@ -123,6 +118,17 @@ int iwl_commit_rxon(struct iwl_priv *priv)
123 return -EINVAL; 118 return -EINVAL;
124 } 119 }
125 120
121 /*
122 * receive commit_rxon request
123 * abort any previous channel switch if still in process
124 */
125 if (priv->switch_rxon.switch_in_progress &&
126 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
127 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
128 le16_to_cpu(priv->switch_rxon.channel));
129 priv->switch_rxon.switch_in_progress = false;
130 }
131
126 /* If we don't need to send a full RXON, we can use 132 /* If we don't need to send a full RXON, we can use
127 * iwl_rxon_assoc_cmd which is used to reconfigure filter 133 * iwl_rxon_assoc_cmd which is used to reconfigure filter
128 * and other flags for the current radio configuration. */ 134 * and other flags for the current radio configuration. */
@@ -134,6 +140,7 @@ int iwl_commit_rxon(struct iwl_priv *priv)
134 } 140 }
135 141
136 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); 142 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
143 iwl_print_rx_config_cmd(priv);
137 return 0; 144 return 0;
138 } 145 }
139 146
@@ -191,11 +198,8 @@ int iwl_commit_rxon(struct iwl_priv *priv)
191 priv->start_calib = 0; 198 priv->start_calib = 0;
192 199
193 /* Add the broadcast address so we can send broadcast frames */ 200 /* Add the broadcast address so we can send broadcast frames */
194 if (iwl_rxon_add_station(priv, iwl_bcast_addr, 0) == 201 priv->cfg->ops->lib->add_bcast_station(priv);
195 IWL_INVALID_STATION) { 202
196 IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
197 return -EIO;
198 }
199 203
200 /* If we have set the ASSOC_MSK and we are in BSS mode then 204 /* If we have set the ASSOC_MSK and we are in BSS mode then
201 * add the IWL_AP_ID to the station rate table */ 205 * add the IWL_AP_ID to the station rate table */
@@ -233,6 +237,7 @@ int iwl_commit_rxon(struct iwl_priv *priv)
233 } 237 }
234 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon)); 238 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
235 } 239 }
240 iwl_print_rx_config_cmd(priv);
236 241
237 iwl_init_sensitivity(priv); 242 iwl_init_sensitivity(priv);
238 243
@@ -302,7 +307,7 @@ static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
302 list_add(&frame->list, &priv->free_frames); 307 list_add(&frame->list, &priv->free_frames);
303} 308}
304 309
305static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv, 310static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
306 struct ieee80211_hdr *hdr, 311 struct ieee80211_hdr *hdr,
307 int left) 312 int left)
308{ 313{
@@ -319,34 +324,74 @@ static unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
319 return priv->ibss_beacon->len; 324 return priv->ibss_beacon->len;
320} 325}
321 326
327/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
328static void iwl_set_beacon_tim(struct iwl_priv *priv,
329 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
330 u8 *beacon, u32 frame_size)
331{
332 u16 tim_idx;
333 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
334
335 /*
336 * The index is relative to frame start but we start looking at the
337 * variable-length part of the beacon.
338 */
339 tim_idx = mgmt->u.beacon.variable - beacon;
340
341 /* Parse variable-length elements of beacon to find WLAN_EID_TIM */
342 while ((tim_idx < (frame_size - 2)) &&
343 (beacon[tim_idx] != WLAN_EID_TIM))
344 tim_idx += beacon[tim_idx+1] + 2;
345
346 /* If TIM field was found, set variables */
347 if ((tim_idx < (frame_size - 1)) && (beacon[tim_idx] == WLAN_EID_TIM)) {
348 tx_beacon_cmd->tim_idx = cpu_to_le16(tim_idx);
349 tx_beacon_cmd->tim_size = beacon[tim_idx+1];
350 } else
351 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
352}
353
322static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, 354static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
323 struct iwl_frame *frame, u8 rate) 355 struct iwl_frame *frame)
324{ 356{
325 struct iwl_tx_beacon_cmd *tx_beacon_cmd; 357 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
326 unsigned int frame_size; 358 u32 frame_size;
359 u32 rate_flags;
360 u32 rate;
361 /*
362 * We have to set up the TX command, the TX Beacon command, and the
363 * beacon contents.
364 */
327 365
366 /* Initialize memory */
328 tx_beacon_cmd = &frame->u.beacon; 367 tx_beacon_cmd = &frame->u.beacon;
329 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); 368 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
330 369
331 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; 370 /* Set up TX beacon contents */
332 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
333
334 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, 371 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame,
335 sizeof(frame->u) - sizeof(*tx_beacon_cmd)); 372 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
373 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
374 return 0;
336 375
337 BUG_ON(frame_size > MAX_MPDU_SIZE); 376 /* Set up TX command fields */
338 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); 377 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
378 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
379 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
380 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
381 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
339 382
340 if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP)) 383 /* Set up TX beacon command fields */
341 tx_beacon_cmd->tx.rate_n_flags = 384 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame,
342 iwl_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK); 385 frame_size);
343 else
344 tx_beacon_cmd->tx.rate_n_flags =
345 iwl_hw_set_rate_n_flags(rate, 0);
346 386
347 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | 387 /* Set up packet rate and flags */
348 TX_CMD_FLG_TSF_MSK | 388 rate = iwl_rate_get_lowest_plcp(priv);
349 TX_CMD_FLG_STA_RATE_MSK; 389 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant);
390 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
391 if ((rate >= IWL_FIRST_CCK_RATE) && (rate <= IWL_LAST_CCK_RATE))
392 rate_flags |= RATE_MCS_CCK_MSK;
393 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
394 rate_flags);
350 395
351 return sizeof(*tx_beacon_cmd) + frame_size; 396 return sizeof(*tx_beacon_cmd) + frame_size;
352} 397}
@@ -355,19 +400,20 @@ static int iwl_send_beacon_cmd(struct iwl_priv *priv)
355 struct iwl_frame *frame; 400 struct iwl_frame *frame;
356 unsigned int frame_size; 401 unsigned int frame_size;
357 int rc; 402 int rc;
358 u8 rate;
359 403
360 frame = iwl_get_free_frame(priv); 404 frame = iwl_get_free_frame(priv);
361
362 if (!frame) { 405 if (!frame) {
363 IWL_ERR(priv, "Could not obtain free frame buffer for beacon " 406 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
364 "command.\n"); 407 "command.\n");
365 return -ENOMEM; 408 return -ENOMEM;
366 } 409 }
367 410
368 rate = iwl_rate_get_lowest_plcp(priv); 411 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
369 412 if (!frame_size) {
370 frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate); 413 IWL_ERR(priv, "Error configuring the beacon command\n");
414 iwl_free_frame(priv, frame);
415 return -EINVAL;
416 }
371 417
372 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, 418 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
373 &frame->u.cmd[0]); 419 &frame->u.cmd[0]);
@@ -525,7 +571,7 @@ int iwl_hw_tx_queue_init(struct iwl_priv *priv,
525static void iwl_rx_reply_alive(struct iwl_priv *priv, 571static void iwl_rx_reply_alive(struct iwl_priv *priv,
526 struct iwl_rx_mem_buffer *rxb) 572 struct iwl_rx_mem_buffer *rxb)
527{ 573{
528 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 574 struct iwl_rx_packet *pkt = rxb_addr(rxb);
529 struct iwl_alive_resp *palive; 575 struct iwl_alive_resp *palive;
530 struct delayed_work *pwork; 576 struct delayed_work *pwork;
531 577
@@ -604,14 +650,139 @@ static void iwl_bg_statistics_periodic(unsigned long data)
604 if (!iwl_is_ready_rf(priv)) 650 if (!iwl_is_ready_rf(priv))
605 return; 651 return;
606 652
607 iwl_send_statistics_request(priv, CMD_ASYNC); 653 iwl_send_statistics_request(priv, CMD_ASYNC, false);
654}
655
656
657static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
658 u32 start_idx, u32 num_events,
659 u32 mode)
660{
661 u32 i;
662 u32 ptr; /* SRAM byte address of log data */
663 u32 ev, time, data; /* event log data */
664 unsigned long reg_flags;
665
666 if (mode == 0)
667 ptr = base + (4 * sizeof(u32)) + (start_idx * 2 * sizeof(u32));
668 else
669 ptr = base + (4 * sizeof(u32)) + (start_idx * 3 * sizeof(u32));
670
671 /* Make sure device is powered up for SRAM reads */
672 spin_lock_irqsave(&priv->reg_lock, reg_flags);
673 if (iwl_grab_nic_access(priv)) {
674 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
675 return;
676 }
677
678 /* Set starting address; reads will auto-increment */
679 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
680 rmb();
681
682 /*
683 * "time" is actually "data" for mode 0 (no timestamp).
684 * place event id # at far right for easier visual parsing.
685 */
686 for (i = 0; i < num_events; i++) {
687 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
688 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
689 if (mode == 0) {
690 trace_iwlwifi_dev_ucode_cont_event(priv,
691 0, time, ev);
692 } else {
693 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
694 trace_iwlwifi_dev_ucode_cont_event(priv,
695 time, data, ev);
696 }
697 }
698 /* Allow device to power down */
699 iwl_release_nic_access(priv);
700 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
701}
702
703static void iwl_continuous_event_trace(struct iwl_priv *priv)
704{
705 u32 capacity; /* event log capacity in # entries */
706 u32 base; /* SRAM byte address of event log header */
707 u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
708 u32 num_wraps; /* # times uCode wrapped to top of log */
709 u32 next_entry; /* index of next entry to be written by uCode */
710
711 if (priv->ucode_type == UCODE_INIT)
712 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
713 else
714 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
715 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
716 capacity = iwl_read_targ_mem(priv, base);
717 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
718 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
719 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
720 } else
721 return;
722
723 if (num_wraps == priv->event_log.num_wraps) {
724 iwl_print_cont_event_trace(priv,
725 base, priv->event_log.next_entry,
726 next_entry - priv->event_log.next_entry,
727 mode);
728 priv->event_log.non_wraps_count++;
729 } else {
730 if ((num_wraps - priv->event_log.num_wraps) > 1)
731 priv->event_log.wraps_more_count++;
732 else
733 priv->event_log.wraps_once_count++;
734 trace_iwlwifi_dev_ucode_wrap_event(priv,
735 num_wraps - priv->event_log.num_wraps,
736 next_entry, priv->event_log.next_entry);
737 if (next_entry < priv->event_log.next_entry) {
738 iwl_print_cont_event_trace(priv, base,
739 priv->event_log.next_entry,
740 capacity - priv->event_log.next_entry,
741 mode);
742
743 iwl_print_cont_event_trace(priv, base, 0,
744 next_entry, mode);
745 } else {
746 iwl_print_cont_event_trace(priv, base,
747 next_entry, capacity - next_entry,
748 mode);
749
750 iwl_print_cont_event_trace(priv, base, 0,
751 next_entry, mode);
752 }
753 }
754 priv->event_log.num_wraps = num_wraps;
755 priv->event_log.next_entry = next_entry;
756}
757
758/**
759 * iwl_bg_ucode_trace - Timer callback to log ucode event
760 *
761 * The timer is continually set to execute every
762 * UCODE_TRACE_PERIOD milliseconds after the last timer expired
763 * this function is to perform continuous uCode event logging operation
764 * if enabled
765 */
766static void iwl_bg_ucode_trace(unsigned long data)
767{
768 struct iwl_priv *priv = (struct iwl_priv *)data;
769
770 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
771 return;
772
773 if (priv->event_log.ucode_trace) {
774 iwl_continuous_event_trace(priv);
775 /* Reschedule the timer to occur in UCODE_TRACE_PERIOD */
776 mod_timer(&priv->ucode_trace,
777 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
778 }
608} 779}
609 780
610static void iwl_rx_beacon_notif(struct iwl_priv *priv, 781static void iwl_rx_beacon_notif(struct iwl_priv *priv,
611 struct iwl_rx_mem_buffer *rxb) 782 struct iwl_rx_mem_buffer *rxb)
612{ 783{
613#ifdef CONFIG_IWLWIFI_DEBUG 784#ifdef CONFIG_IWLWIFI_DEBUG
614 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 785 struct iwl_rx_packet *pkt = rxb_addr(rxb);
615 struct iwl4965_beacon_notif *beacon = 786 struct iwl4965_beacon_notif *beacon =
616 (struct iwl4965_beacon_notif *)pkt->u.raw; 787 (struct iwl4965_beacon_notif *)pkt->u.raw;
617 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags); 788 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
@@ -635,16 +806,18 @@ static void iwl_rx_beacon_notif(struct iwl_priv *priv,
635static void iwl_rx_card_state_notif(struct iwl_priv *priv, 806static void iwl_rx_card_state_notif(struct iwl_priv *priv,
636 struct iwl_rx_mem_buffer *rxb) 807 struct iwl_rx_mem_buffer *rxb)
637{ 808{
638 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 809 struct iwl_rx_packet *pkt = rxb_addr(rxb);
639 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 810 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
640 unsigned long status = priv->status; 811 unsigned long status = priv->status;
641 812
642 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n", 813 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
643 (flags & HW_CARD_DISABLED) ? "Kill" : "On", 814 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
644 (flags & SW_CARD_DISABLED) ? "Kill" : "On"); 815 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
816 (flags & CT_CARD_DISABLED) ?
817 "Reached" : "Not reached");
645 818
646 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | 819 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
647 RF_CARD_DISABLED)) { 820 CT_CARD_DISABLED)) {
648 821
649 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, 822 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
650 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 823 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
@@ -658,10 +831,10 @@ static void iwl_rx_card_state_notif(struct iwl_priv *priv,
658 iwl_write_direct32(priv, HBUS_TARG_MBX_C, 831 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
659 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 832 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
660 } 833 }
661 if (flags & RF_CARD_DISABLED) 834 if (flags & CT_CARD_DISABLED)
662 iwl_tt_enter_ct_kill(priv); 835 iwl_tt_enter_ct_kill(priv);
663 } 836 }
664 if (!(flags & RF_CARD_DISABLED)) 837 if (!(flags & CT_CARD_DISABLED))
665 iwl_tt_exit_ct_kill(priv); 838 iwl_tt_exit_ct_kill(priv);
666 839
667 if (flags & HW_CARD_DISABLED) 840 if (flags & HW_CARD_DISABLED)
@@ -711,6 +884,8 @@ static void iwl_setup_rx_handlers(struct iwl_priv *priv)
711 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive; 884 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
712 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error; 885 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
713 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa; 886 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
887 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
888 iwl_rx_spectrum_measure_notif;
714 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; 889 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
715 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = 890 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
716 iwl_rx_pm_debug_statistics_notif; 891 iwl_rx_pm_debug_statistics_notif;
@@ -721,10 +896,9 @@ static void iwl_setup_rx_handlers(struct iwl_priv *priv)
721 * statistics request from the host as well as for the periodic 896 * statistics request from the host as well as for the periodic
722 * statistics notifications (after received beacons) from the uCode. 897 * statistics notifications (after received beacons) from the uCode.
723 */ 898 */
724 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_rx_statistics; 899 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
725 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics; 900 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
726 901
727 iwl_setup_spectrum_handlers(priv);
728 iwl_setup_rx_scan_handlers(priv); 902 iwl_setup_rx_scan_handlers(priv);
729 903
730 /* status change handler */ 904 /* status change handler */
@@ -770,7 +944,7 @@ void iwl_rx_handle(struct iwl_priv *priv)
770 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i); 944 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
771 945
772 /* calculate total frames need to be restock after handling RX */ 946 /* calculate total frames need to be restock after handling RX */
773 total_empty = r - priv->rxq.write_actual; 947 total_empty = r - rxq->write_actual;
774 if (total_empty < 0) 948 if (total_empty < 0)
775 total_empty += RX_QUEUE_SIZE; 949 total_empty += RX_QUEUE_SIZE;
776 950
@@ -787,10 +961,13 @@ void iwl_rx_handle(struct iwl_priv *priv)
787 961
788 rxq->queue[i] = NULL; 962 rxq->queue[i] = NULL;
789 963
790 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr, 964 pci_unmap_page(priv->pci_dev, rxb->page_dma,
791 priv->hw_params.rx_buf_size + 256, 965 PAGE_SIZE << priv->hw_params.rx_page_order,
792 PCI_DMA_FROMDEVICE); 966 PCI_DMA_FROMDEVICE);
793 pkt = (struct iwl_rx_packet *)rxb->skb->data; 967 pkt = rxb_addr(rxb);
968
969 trace_iwlwifi_dev_rx(priv, pkt,
970 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
794 971
795 /* Reclaim a command buffer only if this packet is a response 972 /* Reclaim a command buffer only if this packet is a response
796 * to a (driver-originated) command. 973 * to a (driver-originated) command.
@@ -812,8 +989,8 @@ void iwl_rx_handle(struct iwl_priv *priv)
812 if (priv->rx_handlers[pkt->hdr.cmd]) { 989 if (priv->rx_handlers[pkt->hdr.cmd]) {
813 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, 990 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r,
814 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 991 i, get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
815 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
816 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++; 992 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
993 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
817 } else { 994 } else {
818 /* No handling needed */ 995 /* No handling needed */
819 IWL_DEBUG_RX(priv, 996 IWL_DEBUG_RX(priv,
@@ -822,35 +999,45 @@ void iwl_rx_handle(struct iwl_priv *priv)
822 pkt->hdr.cmd); 999 pkt->hdr.cmd);
823 } 1000 }
824 1001
1002 /*
1003 * XXX: After here, we should always check rxb->page
1004 * against NULL before touching it or its virtual
1005 * memory (pkt). Because some rx_handler might have
1006 * already taken or freed the pages.
1007 */
1008
825 if (reclaim) { 1009 if (reclaim) {
826 /* Invoke any callbacks, transfer the skb to caller, and 1010 /* Invoke any callbacks, transfer the buffer to caller,
827 * fire off the (possibly) blocking iwl_send_cmd() 1011 * and fire off the (possibly) blocking iwl_send_cmd()
828 * as we reclaim the driver command queue */ 1012 * as we reclaim the driver command queue */
829 if (rxb && rxb->skb) 1013 if (rxb->page)
830 iwl_tx_cmd_complete(priv, rxb); 1014 iwl_tx_cmd_complete(priv, rxb);
831 else 1015 else
832 IWL_WARN(priv, "Claim null rxb?\n"); 1016 IWL_WARN(priv, "Claim null rxb?\n");
833 } 1017 }
834 1018
835 /* For now we just don't re-use anything. We can tweak this 1019 /* Reuse the page if possible. For notification packets and
836 * later to try and re-use notification packets and SKBs that 1020 * SKBs that fail to Rx correctly, add them back into the
837 * fail to Rx correctly */ 1021 * rx_free list for reuse later. */
838 if (rxb->skb != NULL) {
839 priv->alloc_rxb_skb--;
840 dev_kfree_skb_any(rxb->skb);
841 rxb->skb = NULL;
842 }
843
844 spin_lock_irqsave(&rxq->lock, flags); 1022 spin_lock_irqsave(&rxq->lock, flags);
845 list_add_tail(&rxb->list, &priv->rxq.rx_used); 1023 if (rxb->page != NULL) {
1024 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1025 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1026 PCI_DMA_FROMDEVICE);
1027 list_add_tail(&rxb->list, &rxq->rx_free);
1028 rxq->free_count++;
1029 } else
1030 list_add_tail(&rxb->list, &rxq->rx_used);
1031
846 spin_unlock_irqrestore(&rxq->lock, flags); 1032 spin_unlock_irqrestore(&rxq->lock, flags);
1033
847 i = (i + 1) & RX_QUEUE_MASK; 1034 i = (i + 1) & RX_QUEUE_MASK;
848 /* If there are a lot of unused frames, 1035 /* If there are a lot of unused frames,
849 * restock the Rx queue so ucode wont assert. */ 1036 * restock the Rx queue so ucode wont assert. */
850 if (fill_rx) { 1037 if (fill_rx) {
851 count++; 1038 count++;
852 if (count >= 8) { 1039 if (count >= 8) {
853 priv->rxq.read = i; 1040 rxq->read = i;
854 iwl_rx_replenish_now(priv); 1041 iwl_rx_replenish_now(priv);
855 count = 0; 1042 count = 0;
856 } 1043 }
@@ -858,7 +1045,7 @@ void iwl_rx_handle(struct iwl_priv *priv)
858 } 1045 }
859 1046
860 /* Backtrack one entry */ 1047 /* Backtrack one entry */
861 priv->rxq.read = i; 1048 rxq->read = i;
862 if (fill_rx) 1049 if (fill_rx)
863 iwl_rx_replenish_now(priv); 1050 iwl_rx_replenish_now(priv);
864 else 1051 else
@@ -878,6 +1065,7 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
878 u32 inta, handled = 0; 1065 u32 inta, handled = 0;
879 u32 inta_fh; 1066 u32 inta_fh;
880 unsigned long flags; 1067 unsigned long flags;
1068 u32 i;
881#ifdef CONFIG_IWLWIFI_DEBUG 1069#ifdef CONFIG_IWLWIFI_DEBUG
882 u32 inta_mask; 1070 u32 inta_mask;
883#endif 1071#endif
@@ -905,6 +1093,8 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
905 } 1093 }
906#endif 1094#endif
907 1095
1096 spin_unlock_irqrestore(&priv->lock, flags);
1097
908 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1098 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
909 * atomic, make sure that inta covers all the interrupts that 1099 * atomic, make sure that inta covers all the interrupts that
910 * we've discovered, even if FH interrupt came in just after 1100 * we've discovered, even if FH interrupt came in just after
@@ -926,8 +1116,6 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
926 1116
927 handled |= CSR_INT_BIT_HW_ERR; 1117 handled |= CSR_INT_BIT_HW_ERR;
928 1118
929 spin_unlock_irqrestore(&priv->lock, flags);
930
931 return; 1119 return;
932 } 1120 }
933 1121
@@ -995,19 +1183,17 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
995 handled |= CSR_INT_BIT_SW_ERR; 1183 handled |= CSR_INT_BIT_SW_ERR;
996 } 1184 }
997 1185
998 /* uCode wakes up after power-down sleep */ 1186 /*
1187 * uCode wakes up after power-down sleep.
1188 * Tell device about any new tx or host commands enqueued,
1189 * and about any Rx buffers made available while asleep.
1190 */
999 if (inta & CSR_INT_BIT_WAKEUP) { 1191 if (inta & CSR_INT_BIT_WAKEUP) {
1000 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n"); 1192 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1001 iwl_rx_queue_update_write_ptr(priv, &priv->rxq); 1193 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1002 iwl_txq_update_write_ptr(priv, &priv->txq[0]); 1194 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1003 iwl_txq_update_write_ptr(priv, &priv->txq[1]); 1195 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1004 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1005 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1006 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1007 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1008
1009 priv->isr_stats.wakeup++; 1196 priv->isr_stats.wakeup++;
1010
1011 handled |= CSR_INT_BIT_WAKEUP; 1197 handled |= CSR_INT_BIT_WAKEUP;
1012 } 1198 }
1013 1199
@@ -1020,11 +1206,12 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1020 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 1206 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1021 } 1207 }
1022 1208
1209 /* This "Tx" DMA channel is used only for loading uCode */
1023 if (inta & CSR_INT_BIT_FH_TX) { 1210 if (inta & CSR_INT_BIT_FH_TX) {
1024 IWL_DEBUG_ISR(priv, "Tx interrupt\n"); 1211 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1025 priv->isr_stats.tx++; 1212 priv->isr_stats.tx++;
1026 handled |= CSR_INT_BIT_FH_TX; 1213 handled |= CSR_INT_BIT_FH_TX;
1027 /* FH finished to write, send event */ 1214 /* Wake up uCode load routine, now that load is complete */
1028 priv->ucode_write_complete = 1; 1215 priv->ucode_write_complete = 1;
1029 wake_up_interruptible(&priv->wait_command_queue); 1216 wake_up_interruptible(&priv->wait_command_queue);
1030 } 1217 }
@@ -1054,7 +1241,6 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1054 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 1241 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1055 } 1242 }
1056#endif 1243#endif
1057 spin_unlock_irqrestore(&priv->lock, flags);
1058} 1244}
1059 1245
1060/* tasklet for iwlagn interrupt */ 1246/* tasklet for iwlagn interrupt */
@@ -1063,6 +1249,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1063 u32 inta = 0; 1249 u32 inta = 0;
1064 u32 handled = 0; 1250 u32 handled = 0;
1065 unsigned long flags; 1251 unsigned long flags;
1252 u32 i;
1066#ifdef CONFIG_IWLWIFI_DEBUG 1253#ifdef CONFIG_IWLWIFI_DEBUG
1067 u32 inta_mask; 1254 u32 inta_mask;
1068#endif 1255#endif
@@ -1072,7 +1259,15 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1072 /* Ack/clear/reset pending uCode interrupts. 1259 /* Ack/clear/reset pending uCode interrupts.
1073 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 1260 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1074 */ 1261 */
1075 iwl_write32(priv, CSR_INT, priv->inta); 1262 /* There is a hardware bug in the interrupt mask function that some
1263 * interrupts (i.e. CSR_INT_BIT_SCD) can still be generated even if
1264 * they are disabled in the CSR_INT_MASK register. Furthermore the
1265 * ICT interrupt handling mechanism has another bug that might cause
1266 * these unmasked interrupts fail to be detected. We workaround the
1267 * hardware bugs here by ACKing all the possible interrupts so that
1268 * interrupt coalescing can still be achieved.
1269 */
1270 iwl_write32(priv, CSR_INT, priv->inta | ~priv->inta_mask);
1076 1271
1077 inta = priv->inta; 1272 inta = priv->inta;
1078 1273
@@ -1084,6 +1279,9 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1084 inta, inta_mask); 1279 inta, inta_mask);
1085 } 1280 }
1086#endif 1281#endif
1282
1283 spin_unlock_irqrestore(&priv->lock, flags);
1284
1087 /* saved interrupt in inta variable now we can reset priv->inta */ 1285 /* saved interrupt in inta variable now we can reset priv->inta */
1088 priv->inta = 0; 1286 priv->inta = 0;
1089 1287
@@ -1099,8 +1297,6 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1099 1297
1100 handled |= CSR_INT_BIT_HW_ERR; 1298 handled |= CSR_INT_BIT_HW_ERR;
1101 1299
1102 spin_unlock_irqrestore(&priv->lock, flags);
1103
1104 return; 1300 return;
1105 } 1301 }
1106 1302
@@ -1172,12 +1368,8 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1172 if (inta & CSR_INT_BIT_WAKEUP) { 1368 if (inta & CSR_INT_BIT_WAKEUP) {
1173 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n"); 1369 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1174 iwl_rx_queue_update_write_ptr(priv, &priv->rxq); 1370 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1175 iwl_txq_update_write_ptr(priv, &priv->txq[0]); 1371 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1176 iwl_txq_update_write_ptr(priv, &priv->txq[1]); 1372 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1177 iwl_txq_update_write_ptr(priv, &priv->txq[2]);
1178 iwl_txq_update_write_ptr(priv, &priv->txq[3]);
1179 iwl_txq_update_write_ptr(priv, &priv->txq[4]);
1180 iwl_txq_update_write_ptr(priv, &priv->txq[5]);
1181 1373
1182 priv->isr_stats.wakeup++; 1374 priv->isr_stats.wakeup++;
1183 1375
@@ -1206,26 +1398,36 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1206 * 3- update RX shared data to indicate last write index. 1398 * 3- update RX shared data to indicate last write index.
1207 * 4- send interrupt. 1399 * 4- send interrupt.
1208 * This could lead to RX race, driver could receive RX interrupt 1400 * This could lead to RX race, driver could receive RX interrupt
1209 * but the shared data changes does not reflect this. 1401 * but the shared data changes does not reflect this;
1210 * this could lead to RX race, RX periodic will solve this race 1402 * periodic interrupt will detect any dangling Rx activity.
1211 */ 1403 */
1212 iwl_write32(priv, CSR_INT_PERIODIC_REG, 1404
1405 /* Disable periodic interrupt; we use it as just a one-shot. */
1406 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1213 CSR_INT_PERIODIC_DIS); 1407 CSR_INT_PERIODIC_DIS);
1214 iwl_rx_handle(priv); 1408 iwl_rx_handle(priv);
1215 /* Only set RX periodic if real RX is received. */ 1409
1410 /*
1411 * Enable periodic interrupt in 8 msec only if we received
1412 * real RX interrupt (instead of just periodic int), to catch
1413 * any dangling Rx interrupt. If it was just the periodic
1414 * interrupt, there was no dangling Rx activity, and no need
1415 * to extend the periodic interrupt; one-shot is enough.
1416 */
1216 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) 1417 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX))
1217 iwl_write32(priv, CSR_INT_PERIODIC_REG, 1418 iwl_write8(priv, CSR_INT_PERIODIC_REG,
1218 CSR_INT_PERIODIC_ENA); 1419 CSR_INT_PERIODIC_ENA);
1219 1420
1220 priv->isr_stats.rx++; 1421 priv->isr_stats.rx++;
1221 } 1422 }
1222 1423
1424 /* This "Tx" DMA channel is used only for loading uCode */
1223 if (inta & CSR_INT_BIT_FH_TX) { 1425 if (inta & CSR_INT_BIT_FH_TX) {
1224 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK); 1426 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK);
1225 IWL_DEBUG_ISR(priv, "Tx interrupt\n"); 1427 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1226 priv->isr_stats.tx++; 1428 priv->isr_stats.tx++;
1227 handled |= CSR_INT_BIT_FH_TX; 1429 handled |= CSR_INT_BIT_FH_TX;
1228 /* FH finished to write, send event */ 1430 /* Wake up uCode load routine, now that load is complete */
1229 priv->ucode_write_complete = 1; 1431 priv->ucode_write_complete = 1;
1230 wake_up_interruptible(&priv->wait_command_queue); 1432 wake_up_interruptible(&priv->wait_command_queue);
1231 } 1433 }
@@ -1240,14 +1442,10 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1240 inta & ~priv->inta_mask); 1442 inta & ~priv->inta_mask);
1241 } 1443 }
1242 1444
1243
1244 /* Re-enable all interrupts */ 1445 /* Re-enable all interrupts */
1245 /* only Re-enable if diabled by irq */ 1446 /* only Re-enable if diabled by irq */
1246 if (test_bit(STATUS_INT_ENABLED, &priv->status)) 1447 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1247 iwl_enable_interrupts(priv); 1448 iwl_enable_interrupts(priv);
1248
1249 spin_unlock_irqrestore(&priv->lock, flags);
1250
1251} 1449}
1252 1450
1253 1451
@@ -1274,59 +1472,66 @@ static void iwl_nic_start(struct iwl_priv *priv)
1274} 1472}
1275 1473
1276 1474
1475static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1476static int iwl_mac_setup_register(struct iwl_priv *priv);
1477
1478static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1479{
1480 const char *name_pre = priv->cfg->fw_name_pre;
1481
1482 if (first)
1483 priv->fw_index = priv->cfg->ucode_api_max;
1484 else
1485 priv->fw_index--;
1486
1487 if (priv->fw_index < priv->cfg->ucode_api_min) {
1488 IWL_ERR(priv, "no suitable firmware found!\n");
1489 return -ENOENT;
1490 }
1491
1492 sprintf(priv->firmware_name, "%s%d%s",
1493 name_pre, priv->fw_index, ".ucode");
1494
1495 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n",
1496 priv->firmware_name);
1497
1498 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
1499 &priv->pci_dev->dev, GFP_KERNEL, priv,
1500 iwl_ucode_callback);
1501}
1502
1277/** 1503/**
1278 * iwl_read_ucode - Read uCode images from disk file. 1504 * iwl_ucode_callback - callback when firmware was loaded
1279 * 1505 *
1280 * Copy into buffers for card to fetch via bus-mastering 1506 * If loaded successfully, copies the firmware into buffers
1507 * for the card to fetch (via DMA).
1281 */ 1508 */
1282static int iwl_read_ucode(struct iwl_priv *priv) 1509static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1283{ 1510{
1511 struct iwl_priv *priv = context;
1284 struct iwl_ucode_header *ucode; 1512 struct iwl_ucode_header *ucode;
1285 int ret = -EINVAL, index;
1286 const struct firmware *ucode_raw;
1287 const char *name_pre = priv->cfg->fw_name_pre;
1288 const unsigned int api_max = priv->cfg->ucode_api_max; 1513 const unsigned int api_max = priv->cfg->ucode_api_max;
1289 const unsigned int api_min = priv->cfg->ucode_api_min; 1514 const unsigned int api_min = priv->cfg->ucode_api_min;
1290 char buf[25];
1291 u8 *src; 1515 u8 *src;
1292 size_t len; 1516 size_t len;
1293 u32 api_ver, build; 1517 u32 api_ver, build;
1294 u32 inst_size, data_size, init_size, init_data_size, boot_size; 1518 u32 inst_size, data_size, init_size, init_data_size, boot_size;
1519 int err;
1295 u16 eeprom_ver; 1520 u16 eeprom_ver;
1296 1521
1297 /* Ask kernel firmware_class module to get the boot firmware off disk. 1522 if (!ucode_raw) {
1298 * request_firmware() is synchronous, file is in memory on return. */ 1523 IWL_ERR(priv, "request for firmware file '%s' failed.\n",
1299 for (index = api_max; index >= api_min; index--) { 1524 priv->firmware_name);
1300 sprintf(buf, "%s%d%s", name_pre, index, ".ucode"); 1525 goto try_again;
1301 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1302 if (ret < 0) {
1303 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1304 buf, ret);
1305 if (ret == -ENOENT)
1306 continue;
1307 else
1308 goto error;
1309 } else {
1310 if (index < api_max)
1311 IWL_ERR(priv, "Loaded firmware %s, "
1312 "which is deprecated. "
1313 "Please use API v%u instead.\n",
1314 buf, api_max);
1315
1316 IWL_DEBUG_INFO(priv, "Got firmware '%s' file (%zd bytes) from disk\n",
1317 buf, ucode_raw->size);
1318 break;
1319 }
1320 } 1526 }
1321 1527
1322 if (ret < 0) 1528 IWL_DEBUG_INFO(priv, "Loaded firmware file '%s' (%zd bytes).\n",
1323 goto error; 1529 priv->firmware_name, ucode_raw->size);
1324 1530
1325 /* Make sure that we got at least the v1 header! */ 1531 /* Make sure that we got at least the v1 header! */
1326 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) { 1532 if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
1327 IWL_ERR(priv, "File size way too small!\n"); 1533 IWL_ERR(priv, "File size way too small!\n");
1328 ret = -EINVAL; 1534 goto try_again;
1329 goto err_release;
1330 } 1535 }
1331 1536
1332 /* Data from ucode file: header followed by uCode images */ 1537 /* Data from ucode file: header followed by uCode images */
@@ -1351,10 +1556,9 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1351 IWL_ERR(priv, "Driver unable to support your firmware API. " 1556 IWL_ERR(priv, "Driver unable to support your firmware API. "
1352 "Driver supports v%u, firmware is v%u.\n", 1557 "Driver supports v%u, firmware is v%u.\n",
1353 api_max, api_ver); 1558 api_max, api_ver);
1354 priv->ucode_ver = 0; 1559 goto try_again;
1355 ret = -EINVAL;
1356 goto err_release;
1357 } 1560 }
1561
1358 if (api_ver != api_max) 1562 if (api_ver != api_max)
1359 IWL_ERR(priv, "Firmware has old API version. Expected v%u, " 1563 IWL_ERR(priv, "Firmware has old API version. Expected v%u, "
1360 "got v%u. New firmware can be obtained " 1564 "got v%u. New firmware can be obtained "
@@ -1367,6 +1571,14 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1367 IWL_UCODE_API(priv->ucode_ver), 1571 IWL_UCODE_API(priv->ucode_ver),
1368 IWL_UCODE_SERIAL(priv->ucode_ver)); 1572 IWL_UCODE_SERIAL(priv->ucode_ver));
1369 1573
1574 snprintf(priv->hw->wiphy->fw_version,
1575 sizeof(priv->hw->wiphy->fw_version),
1576 "%u.%u.%u.%u",
1577 IWL_UCODE_MAJOR(priv->ucode_ver),
1578 IWL_UCODE_MINOR(priv->ucode_ver),
1579 IWL_UCODE_API(priv->ucode_ver),
1580 IWL_UCODE_SERIAL(priv->ucode_ver));
1581
1370 if (build) 1582 if (build)
1371 IWL_DEBUG_INFO(priv, "Build %u\n", build); 1583 IWL_DEBUG_INFO(priv, "Build %u\n", build);
1372 1584
@@ -1388,6 +1600,12 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1388 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n", 1600 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1389 boot_size); 1601 boot_size);
1390 1602
1603 /*
1604 * For any of the failures below (before allocating pci memory)
1605 * we will try to load a version with a smaller API -- maybe the
1606 * user just got a corrupted version of the latest API.
1607 */
1608
1391 /* Verify size of file vs. image size info in file's header */ 1609 /* Verify size of file vs. image size info in file's header */
1392 if (ucode_raw->size != 1610 if (ucode_raw->size !=
1393 priv->cfg->ops->ucode->get_header_size(api_ver) + 1611 priv->cfg->ops->ucode->get_header_size(api_ver) +
@@ -1397,41 +1615,35 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1397 IWL_DEBUG_INFO(priv, 1615 IWL_DEBUG_INFO(priv,
1398 "uCode file size %d does not match expected size\n", 1616 "uCode file size %d does not match expected size\n",
1399 (int)ucode_raw->size); 1617 (int)ucode_raw->size);
1400 ret = -EINVAL; 1618 goto try_again;
1401 goto err_release;
1402 } 1619 }
1403 1620
1404 /* Verify that uCode images will fit in card's SRAM */ 1621 /* Verify that uCode images will fit in card's SRAM */
1405 if (inst_size > priv->hw_params.max_inst_size) { 1622 if (inst_size > priv->hw_params.max_inst_size) {
1406 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n", 1623 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1407 inst_size); 1624 inst_size);
1408 ret = -EINVAL; 1625 goto try_again;
1409 goto err_release;
1410 } 1626 }
1411 1627
1412 if (data_size > priv->hw_params.max_data_size) { 1628 if (data_size > priv->hw_params.max_data_size) {
1413 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n", 1629 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1414 data_size); 1630 data_size);
1415 ret = -EINVAL; 1631 goto try_again;
1416 goto err_release;
1417 } 1632 }
1418 if (init_size > priv->hw_params.max_inst_size) { 1633 if (init_size > priv->hw_params.max_inst_size) {
1419 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n", 1634 IWL_INFO(priv, "uCode init instr len %d too large to fit in\n",
1420 init_size); 1635 init_size);
1421 ret = -EINVAL; 1636 goto try_again;
1422 goto err_release;
1423 } 1637 }
1424 if (init_data_size > priv->hw_params.max_data_size) { 1638 if (init_data_size > priv->hw_params.max_data_size) {
1425 IWL_INFO(priv, "uCode init data len %d too large to fit in\n", 1639 IWL_INFO(priv, "uCode init data len %d too large to fit in\n",
1426 init_data_size); 1640 init_data_size);
1427 ret = -EINVAL; 1641 goto try_again;
1428 goto err_release;
1429 } 1642 }
1430 if (boot_size > priv->hw_params.max_bsm_size) { 1643 if (boot_size > priv->hw_params.max_bsm_size) {
1431 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n", 1644 IWL_INFO(priv, "uCode boot instr len %d too large to fit in\n",
1432 boot_size); 1645 boot_size);
1433 ret = -EINVAL; 1646 goto try_again;
1434 goto err_release;
1435 } 1647 }
1436 1648
1437 /* Allocate ucode buffers for card's bus-master loading ... */ 1649 /* Allocate ucode buffers for card's bus-master loading ... */
@@ -1515,23 +1727,38 @@ static int iwl_read_ucode(struct iwl_priv *priv)
1515 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len); 1727 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", len);
1516 memcpy(priv->ucode_boot.v_addr, src, len); 1728 memcpy(priv->ucode_boot.v_addr, src, len);
1517 1729
1730 /**************************************************
1731 * This is still part of probe() in a sense...
1732 *
1733 * 9. Setup and register with mac80211 and debugfs
1734 **************************************************/
1735 err = iwl_mac_setup_register(priv);
1736 if (err)
1737 goto out_unbind;
1738
1739 err = iwl_dbgfs_register(priv, DRV_NAME);
1740 if (err)
1741 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
1742
1518 /* We have our copies now, allow OS release its copies */ 1743 /* We have our copies now, allow OS release its copies */
1519 release_firmware(ucode_raw); 1744 release_firmware(ucode_raw);
1520 return 0; 1745 return;
1746
1747 try_again:
1748 /* try next, if any */
1749 if (iwl_request_firmware(priv, false))
1750 goto out_unbind;
1751 release_firmware(ucode_raw);
1752 return;
1521 1753
1522 err_pci_alloc: 1754 err_pci_alloc:
1523 IWL_ERR(priv, "failed to allocate pci memory\n"); 1755 IWL_ERR(priv, "failed to allocate pci memory\n");
1524 ret = -ENOMEM;
1525 iwl_dealloc_ucode_pci(priv); 1756 iwl_dealloc_ucode_pci(priv);
1526 1757 out_unbind:
1527 err_release: 1758 device_release_driver(&priv->pci_dev->dev);
1528 release_firmware(ucode_raw); 1759 release_firmware(ucode_raw);
1529
1530 error:
1531 return ret;
1532} 1760}
1533 1761
1534#ifdef CONFIG_IWLWIFI_DEBUG
1535static const char *desc_lookup_text[] = { 1762static const char *desc_lookup_text[] = {
1536 "OK", 1763 "OK",
1537 "FAIL", 1764 "FAIL",
@@ -1561,7 +1788,7 @@ static const char *desc_lookup_text[] = {
1561 "DEBUG_1", 1788 "DEBUG_1",
1562 "DEBUG_2", 1789 "DEBUG_2",
1563 "DEBUG_3", 1790 "DEBUG_3",
1564 "UNKNOWN" 1791 "ADVANCED SYSASSERT"
1565}; 1792};
1566 1793
1567static const char *desc_lookup(int i) 1794static const char *desc_lookup(int i)
@@ -1589,7 +1816,9 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1589 base = le32_to_cpu(priv->card_alive.error_event_table_ptr); 1816 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1590 1817
1591 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1818 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1592 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base); 1819 IWL_ERR(priv,
1820 "Not valid error log pointer 0x%08X for %s uCode\n",
1821 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1593 return; 1822 return;
1594 } 1823 }
1595 1824
@@ -1611,6 +1840,9 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1611 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); 1840 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
1612 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); 1841 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
1613 1842
1843 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
1844 blink1, blink2, ilink1, ilink2);
1845
1614 IWL_ERR(priv, "Desc Time " 1846 IWL_ERR(priv, "Desc Time "
1615 "data1 data2 line\n"); 1847 "data1 data2 line\n");
1616 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n", 1848 IWL_ERR(priv, "%-28s (#%02d) %010u 0x%08X 0x%08X %u\n",
@@ -1627,17 +1859,19 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
1627 * iwl_print_event_log - Dump error event log to syslog 1859 * iwl_print_event_log - Dump error event log to syslog
1628 * 1860 *
1629 */ 1861 */
1630static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx, 1862static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1631 u32 num_events, u32 mode) 1863 u32 num_events, u32 mode,
1864 int pos, char **buf, size_t bufsz)
1632{ 1865{
1633 u32 i; 1866 u32 i;
1634 u32 base; /* SRAM byte address of event log header */ 1867 u32 base; /* SRAM byte address of event log header */
1635 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ 1868 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1636 u32 ptr; /* SRAM byte address of log data */ 1869 u32 ptr; /* SRAM byte address of log data */
1637 u32 ev, time, data; /* event log data */ 1870 u32 ev, time, data; /* event log data */
1871 unsigned long reg_flags;
1638 1872
1639 if (num_events == 0) 1873 if (num_events == 0)
1640 return; 1874 return pos;
1641 if (priv->ucode_type == UCODE_INIT) 1875 if (priv->ucode_type == UCODE_INIT)
1642 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); 1876 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
1643 else 1877 else
@@ -1650,26 +1884,95 @@ static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
1650 1884
1651 ptr = base + EVENT_START_OFFSET + (start_idx * event_size); 1885 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1652 1886
1887 /* Make sure device is powered up for SRAM reads */
1888 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1889 iwl_grab_nic_access(priv);
1890
1891 /* Set starting address; reads will auto-increment */
1892 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1893 rmb();
1894
1653 /* "time" is actually "data" for mode 0 (no timestamp). 1895 /* "time" is actually "data" for mode 0 (no timestamp).
1654 * place event id # at far right for easier visual parsing. */ 1896 * place event id # at far right for easier visual parsing. */
1655 for (i = 0; i < num_events; i++) { 1897 for (i = 0; i < num_events; i++) {
1656 ev = iwl_read_targ_mem(priv, ptr); 1898 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1657 ptr += sizeof(u32); 1899 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1658 time = iwl_read_targ_mem(priv, ptr);
1659 ptr += sizeof(u32);
1660 if (mode == 0) { 1900 if (mode == 0) {
1661 /* data, ev */ 1901 /* data, ev */
1662 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n", time, ev); 1902 if (bufsz) {
1903 pos += scnprintf(*buf + pos, bufsz - pos,
1904 "EVT_LOG:0x%08x:%04u\n",
1905 time, ev);
1906 } else {
1907 trace_iwlwifi_dev_ucode_event(priv, 0,
1908 time, ev);
1909 IWL_ERR(priv, "EVT_LOG:0x%08x:%04u\n",
1910 time, ev);
1911 }
1663 } else { 1912 } else {
1664 data = iwl_read_targ_mem(priv, ptr); 1913 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1665 ptr += sizeof(u32); 1914 if (bufsz) {
1666 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n", 1915 pos += scnprintf(*buf + pos, bufsz - pos,
1916 "EVT_LOGT:%010u:0x%08x:%04u\n",
1917 time, data, ev);
1918 } else {
1919 IWL_ERR(priv, "EVT_LOGT:%010u:0x%08x:%04u\n",
1667 time, data, ev); 1920 time, data, ev);
1921 trace_iwlwifi_dev_ucode_event(priv, time,
1922 data, ev);
1923 }
1924 }
1925 }
1926
1927 /* Allow device to power down */
1928 iwl_release_nic_access(priv);
1929 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1930 return pos;
1931}
1932
1933/**
1934 * iwl_print_last_event_logs - Dump the newest # of event log to syslog
1935 */
1936static int iwl_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1937 u32 num_wraps, u32 next_entry,
1938 u32 size, u32 mode,
1939 int pos, char **buf, size_t bufsz)
1940{
1941 /*
1942 * display the newest DEFAULT_LOG_ENTRIES entries
1943 * i.e the entries just before the next ont that uCode would fill.
1944 */
1945 if (num_wraps) {
1946 if (next_entry < size) {
1947 pos = iwl_print_event_log(priv,
1948 capacity - (size - next_entry),
1949 size - next_entry, mode,
1950 pos, buf, bufsz);
1951 pos = iwl_print_event_log(priv, 0,
1952 next_entry, mode,
1953 pos, buf, bufsz);
1954 } else
1955 pos = iwl_print_event_log(priv, next_entry - size,
1956 size, mode, pos, buf, bufsz);
1957 } else {
1958 if (next_entry < size) {
1959 pos = iwl_print_event_log(priv, 0, next_entry,
1960 mode, pos, buf, bufsz);
1961 } else {
1962 pos = iwl_print_event_log(priv, next_entry - size,
1963 size, mode, pos, buf, bufsz);
1668 } 1964 }
1669 } 1965 }
1966 return pos;
1670} 1967}
1671 1968
1672void iwl_dump_nic_event_log(struct iwl_priv *priv) 1969/* For sanity check only. Actual size is determined by uCode, typ. 512 */
1970#define MAX_EVENT_LOG_SIZE (512)
1971
1972#define DEFAULT_DUMP_EVENT_LOG_ENTRIES (20)
1973
1974int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1975 char **buf, bool display)
1673{ 1976{
1674 u32 base; /* SRAM byte address of event log header */ 1977 u32 base; /* SRAM byte address of event log header */
1675 u32 capacity; /* event log capacity in # entries */ 1978 u32 capacity; /* event log capacity in # entries */
@@ -1677,6 +1980,8 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv)
1677 u32 num_wraps; /* # times uCode wrapped to top of log */ 1980 u32 num_wraps; /* # times uCode wrapped to top of log */
1678 u32 next_entry; /* index of next entry to be written by uCode */ 1981 u32 next_entry; /* index of next entry to be written by uCode */
1679 u32 size; /* # entries that we'll print */ 1982 u32 size; /* # entries that we'll print */
1983 int pos = 0;
1984 size_t bufsz = 0;
1680 1985
1681 if (priv->ucode_type == UCODE_INIT) 1986 if (priv->ucode_type == UCODE_INIT)
1682 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); 1987 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr);
@@ -1684,8 +1989,10 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv)
1684 base = le32_to_cpu(priv->card_alive.log_event_table_ptr); 1989 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1685 1990
1686 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1991 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
1687 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); 1992 IWL_ERR(priv,
1688 return; 1993 "Invalid event log pointer 0x%08X for %s uCode\n",
1994 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT");
1995 return -EINVAL;
1689 } 1996 }
1690 1997
1691 /* event log header */ 1998 /* event log header */
@@ -1694,27 +2001,71 @@ void iwl_dump_nic_event_log(struct iwl_priv *priv)
1694 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); 2001 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1695 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); 2002 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1696 2003
2004 if (capacity > MAX_EVENT_LOG_SIZE) {
2005 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
2006 capacity, MAX_EVENT_LOG_SIZE);
2007 capacity = MAX_EVENT_LOG_SIZE;
2008 }
2009
2010 if (next_entry > MAX_EVENT_LOG_SIZE) {
2011 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
2012 next_entry, MAX_EVENT_LOG_SIZE);
2013 next_entry = MAX_EVENT_LOG_SIZE;
2014 }
2015
1697 size = num_wraps ? capacity : next_entry; 2016 size = num_wraps ? capacity : next_entry;
1698 2017
1699 /* bail out if nothing in log */ 2018 /* bail out if nothing in log */
1700 if (size == 0) { 2019 if (size == 0) {
1701 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); 2020 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1702 return; 2021 return pos;
1703 } 2022 }
1704 2023
1705 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n", 2024#ifdef CONFIG_IWLWIFI_DEBUG
1706 size, num_wraps); 2025 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1707 2026 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1708 /* if uCode has wrapped back to top of log, start at the oldest entry, 2027 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1709 * i.e the next one that uCode would fill. */ 2028#else
1710 if (num_wraps) 2029 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
1711 iwl_print_event_log(priv, next_entry, 2030 ? DEFAULT_DUMP_EVENT_LOG_ENTRIES : size;
1712 capacity - next_entry, mode); 2031#endif
1713 /* (then/else) start at top of log */ 2032 IWL_ERR(priv, "Start IWL Event Log Dump: display last %u entries\n",
1714 iwl_print_event_log(priv, 0, next_entry, mode); 2033 size);
1715 2034
1716} 2035#ifdef CONFIG_IWLWIFI_DEBUG
2036 if (display) {
2037 if (full_log)
2038 bufsz = capacity * 48;
2039 else
2040 bufsz = size * 48;
2041 *buf = kmalloc(bufsz, GFP_KERNEL);
2042 if (!*buf)
2043 return -ENOMEM;
2044 }
2045 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
2046 /*
2047 * if uCode has wrapped back to top of log,
2048 * start at the oldest entry,
2049 * i.e the next one that uCode would fill.
2050 */
2051 if (num_wraps)
2052 pos = iwl_print_event_log(priv, next_entry,
2053 capacity - next_entry, mode,
2054 pos, buf, bufsz);
2055 /* (then/else) start at top of log */
2056 pos = iwl_print_event_log(priv, 0,
2057 next_entry, mode, pos, buf, bufsz);
2058 } else
2059 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2060 next_entry, size, mode,
2061 pos, buf, bufsz);
2062#else
2063 pos = iwl_print_last_event_logs(priv, capacity, num_wraps,
2064 next_entry, size, mode,
2065 pos, buf, bufsz);
1717#endif 2066#endif
2067 return pos;
2068}
1718 2069
1719/** 2070/**
1720 * iwl_alive_start - called after REPLY_ALIVE notification received 2071 * iwl_alive_start - called after REPLY_ALIVE notification received
@@ -1763,6 +2114,10 @@ static void iwl_alive_start(struct iwl_priv *priv)
1763 priv->active_rate = priv->rates_mask; 2114 priv->active_rate = priv->rates_mask;
1764 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; 2115 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
1765 2116
2117 /* Configure Tx antenna selection based on H/W config */
2118 if (priv->cfg->ops->hcmd->set_tx_ant)
2119 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2120
1766 if (iwl_is_associated(priv)) { 2121 if (iwl_is_associated(priv)) {
1767 struct iwl_rxon_cmd *active_rxon = 2122 struct iwl_rxon_cmd *active_rxon =
1768 (struct iwl_rxon_cmd *)&priv->active_rxon; 2123 (struct iwl_rxon_cmd *)&priv->active_rxon;
@@ -1790,7 +2145,7 @@ static void iwl_alive_start(struct iwl_priv *priv)
1790 /* At this point, the NIC is initialized and operational */ 2145 /* At this point, the NIC is initialized and operational */
1791 iwl_rf_kill_ct_config(priv); 2146 iwl_rf_kill_ct_config(priv);
1792 2147
1793 iwl_leds_register(priv); 2148 iwl_leds_init(priv);
1794 2149
1795 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); 2150 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
1796 set_bit(STATUS_READY, &priv->status); 2151 set_bit(STATUS_READY, &priv->status);
@@ -1828,8 +2183,6 @@ static void __iwl_down(struct iwl_priv *priv)
1828 if (!exit_pending) 2183 if (!exit_pending)
1829 set_bit(STATUS_EXIT_PENDING, &priv->status); 2184 set_bit(STATUS_EXIT_PENDING, &priv->status);
1830 2185
1831 iwl_leds_unregister(priv);
1832
1833 iwl_clear_stations_table(priv); 2186 iwl_clear_stations_table(priv);
1834 2187
1835 /* Unblock any waiting calls */ 2188 /* Unblock any waiting calls */
@@ -1877,24 +2230,20 @@ static void __iwl_down(struct iwl_priv *priv)
1877 2230
1878 /* device going down, Stop using ICT table */ 2231 /* device going down, Stop using ICT table */
1879 iwl_disable_ict(priv); 2232 iwl_disable_ict(priv);
1880 spin_lock_irqsave(&priv->lock, flags);
1881 iwl_clear_bit(priv, CSR_GP_CNTRL,
1882 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1883 spin_unlock_irqrestore(&priv->lock, flags);
1884 2233
1885 iwl_txq_ctx_stop(priv); 2234 iwl_txq_ctx_stop(priv);
1886 iwl_rxq_stop(priv); 2235 iwl_rxq_stop(priv);
1887 2236
1888 iwl_write_prph(priv, APMG_CLK_DIS_REG, 2237 /* Power-down device's busmaster DMA clocks */
1889 APMG_CLK_VAL_DMA_CLK_RQT); 2238 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
1890
1891 udelay(5); 2239 udelay(5);
1892 2240
1893 /* FIXME: apm_ops.suspend(priv) */ 2241 /* Make sure (redundant) we've released our request to stay awake */
1894 if (exit_pending) 2242 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
1895 priv->cfg->ops->lib->apm_ops.stop(priv); 2243
1896 else 2244 /* Stop the device, and put it in low power state */
1897 priv->cfg->ops->lib->apm_ops.reset(priv); 2245 priv->cfg->ops->lib->apm_ops.stop(priv);
2246
1898 exit: 2247 exit:
1899 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); 2248 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
1900 2249
@@ -2121,18 +2470,6 @@ static void iwl_bg_run_time_calib_work(struct work_struct *work)
2121 return; 2470 return;
2122} 2471}
2123 2472
2124static void iwl_bg_up(struct work_struct *data)
2125{
2126 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2127
2128 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2129 return;
2130
2131 mutex_lock(&priv->mutex);
2132 __iwl_up(priv);
2133 mutex_unlock(&priv->mutex);
2134}
2135
2136static void iwl_bg_restart(struct work_struct *data) 2473static void iwl_bg_restart(struct work_struct *data)
2137{ 2474{
2138 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); 2475 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
@@ -2149,7 +2486,13 @@ static void iwl_bg_restart(struct work_struct *data)
2149 ieee80211_restart_hw(priv->hw); 2486 ieee80211_restart_hw(priv->hw);
2150 } else { 2487 } else {
2151 iwl_down(priv); 2488 iwl_down(priv);
2152 queue_work(priv->workqueue, &priv->up); 2489
2490 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2491 return;
2492
2493 mutex_lock(&priv->mutex);
2494 __iwl_up(priv);
2495 mutex_unlock(&priv->mutex);
2153 } 2496 }
2154} 2497}
2155 2498
@@ -2281,6 +2624,71 @@ void iwl_post_associate(struct iwl_priv *priv)
2281 2624
2282#define UCODE_READY_TIMEOUT (4 * HZ) 2625#define UCODE_READY_TIMEOUT (4 * HZ)
2283 2626
2627/*
2628 * Not a mac80211 entry point function, but it fits in with all the
2629 * other mac80211 functions grouped here.
2630 */
2631static int iwl_mac_setup_register(struct iwl_priv *priv)
2632{
2633 int ret;
2634 struct ieee80211_hw *hw = priv->hw;
2635 hw->rate_control_algorithm = "iwl-agn-rs";
2636
2637 /* Tell mac80211 our characteristics */
2638 hw->flags = IEEE80211_HW_SIGNAL_DBM |
2639 IEEE80211_HW_NOISE_DBM |
2640 IEEE80211_HW_AMPDU_AGGREGATION |
2641 IEEE80211_HW_SPECTRUM_MGMT;
2642
2643 if (!priv->cfg->broken_powersave)
2644 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2645 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
2646
2647 if (priv->cfg->sku & IWL_SKU_N)
2648 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
2649 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
2650
2651 hw->sta_data_size = sizeof(struct iwl_station_priv);
2652 hw->wiphy->interface_modes =
2653 BIT(NL80211_IFTYPE_STATION) |
2654 BIT(NL80211_IFTYPE_ADHOC);
2655
2656 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
2657 WIPHY_FLAG_DISABLE_BEACON_HINTS;
2658
2659 /*
2660 * For now, disable PS by default because it affects
2661 * RX performance significantly.
2662 */
2663 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2664
2665 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
2666 /* we create the 802.11 header and a zero-length SSID element */
2667 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
2668
2669 /* Default value; 4 EDCA QOS priorities */
2670 hw->queues = 4;
2671
2672 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
2673
2674 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
2675 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
2676 &priv->bands[IEEE80211_BAND_2GHZ];
2677 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
2678 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
2679 &priv->bands[IEEE80211_BAND_5GHZ];
2680
2681 ret = ieee80211_register_hw(priv->hw);
2682 if (ret) {
2683 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
2684 return ret;
2685 }
2686 priv->mac80211_registered = 1;
2687
2688 return 0;
2689}
2690
2691
2284static int iwl_mac_start(struct ieee80211_hw *hw) 2692static int iwl_mac_start(struct ieee80211_hw *hw)
2285{ 2693{
2286 struct iwl_priv *priv = hw->priv; 2694 struct iwl_priv *priv = hw->priv;
@@ -2290,21 +2698,7 @@ static int iwl_mac_start(struct ieee80211_hw *hw)
2290 2698
2291 /* we should be verifying the device is ready to be opened */ 2699 /* we should be verifying the device is ready to be opened */
2292 mutex_lock(&priv->mutex); 2700 mutex_lock(&priv->mutex);
2293
2294 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2295 * ucode filename and max sizes are card-specific. */
2296
2297 if (!priv->ucode_code.len) {
2298 ret = iwl_read_ucode(priv);
2299 if (ret) {
2300 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2301 mutex_unlock(&priv->mutex);
2302 return ret;
2303 }
2304 }
2305
2306 ret = __iwl_up(priv); 2701 ret = __iwl_up(priv);
2307
2308 mutex_unlock(&priv->mutex); 2702 mutex_unlock(&priv->mutex);
2309 2703
2310 if (ret) 2704 if (ret)
@@ -2328,6 +2722,8 @@ static int iwl_mac_start(struct ieee80211_hw *hw)
2328 } 2722 }
2329 } 2723 }
2330 2724
2725 iwl_led_start(priv);
2726
2331out: 2727out:
2332 priv->is_open = 1; 2728 priv->is_open = 1;
2333 IWL_DEBUG_MAC80211(priv, "leave\n"); 2729 IWL_DEBUG_MAC80211(priv, "leave\n");
@@ -2404,6 +2800,10 @@ void iwl_config_ap(struct iwl_priv *priv)
2404 IWL_WARN(priv, "REPLY_RXON_TIMING failed - " 2800 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2405 "Attempting to continue.\n"); 2801 "Attempting to continue.\n");
2406 2802
2803 /* AP has all antennas */
2804 priv->chain_noise_data.active_chains =
2805 priv->hw_params.valid_rx_ant;
2806 iwl_set_rxon_ht(priv, &priv->current_ht_config);
2407 if (priv->cfg->ops->hcmd->set_rxon_chain) 2807 if (priv->cfg->ops->hcmd->set_rxon_chain)
2408 priv->cfg->ops->hcmd->set_rxon_chain(priv); 2808 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2409 2809
@@ -2432,10 +2832,11 @@ void iwl_config_ap(struct iwl_priv *priv)
2432 /* restore RXON assoc */ 2832 /* restore RXON assoc */
2433 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; 2833 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
2434 iwlcore_commit_rxon(priv); 2834 iwlcore_commit_rxon(priv);
2835 iwl_reset_qos(priv);
2435 spin_lock_irqsave(&priv->lock, flags); 2836 spin_lock_irqsave(&priv->lock, flags);
2436 iwl_activate_qos(priv, 1); 2837 iwl_activate_qos(priv, 1);
2437 spin_unlock_irqrestore(&priv->lock, flags); 2838 spin_unlock_irqrestore(&priv->lock, flags);
2438 iwl_rxon_add_station(priv, iwl_bcast_addr, 0); 2839 iwl_add_bcast_station(priv);
2439 } 2840 }
2440 iwl_send_beacon_cmd(priv); 2841 iwl_send_beacon_cmd(priv);
2441 2842
@@ -2445,14 +2846,18 @@ void iwl_config_ap(struct iwl_priv *priv)
2445} 2846}
2446 2847
2447static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw, 2848static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw,
2448 struct ieee80211_key_conf *keyconf, const u8 *addr, 2849 struct ieee80211_vif *vif,
2449 u32 iv32, u16 *phase1key) 2850 struct ieee80211_key_conf *keyconf,
2851 struct ieee80211_sta *sta,
2852 u32 iv32, u16 *phase1key)
2450{ 2853{
2451 2854
2452 struct iwl_priv *priv = hw->priv; 2855 struct iwl_priv *priv = hw->priv;
2453 IWL_DEBUG_MAC80211(priv, "enter\n"); 2856 IWL_DEBUG_MAC80211(priv, "enter\n");
2454 2857
2455 iwl_update_tkip_key(priv, keyconf, addr, iv32, phase1key); 2858 iwl_update_tkip_key(priv, keyconf,
2859 sta ? sta->addr : iwl_bcast_addr,
2860 iv32, phase1key);
2456 2861
2457 IWL_DEBUG_MAC80211(priv, "leave\n"); 2862 IWL_DEBUG_MAC80211(priv, "leave\n");
2458} 2863}
@@ -2527,6 +2932,7 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2527} 2932}
2528 2933
2529static int iwl_mac_ampdu_action(struct ieee80211_hw *hw, 2934static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2935 struct ieee80211_vif *vif,
2530 enum ieee80211_ampdu_mlme_action action, 2936 enum ieee80211_ampdu_mlme_action action,
2531 struct ieee80211_sta *sta, u16 tid, u16 *ssn) 2937 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2532{ 2938{
@@ -2560,6 +2966,9 @@ static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
2560 return 0; 2966 return 0;
2561 else 2967 else
2562 return ret; 2968 return ret;
2969 case IEEE80211_AMPDU_TX_OPERATIONAL:
2970 /* do nothing */
2971 return -EOPNOTSUPP;
2563 default: 2972 default:
2564 IWL_DEBUG_HT(priv, "unknown\n"); 2973 IWL_DEBUG_HT(priv, "unknown\n");
2565 return -EINVAL; 2974 return -EINVAL;
@@ -2580,6 +2989,47 @@ static int iwl_mac_get_stats(struct ieee80211_hw *hw,
2580 return 0; 2989 return 0;
2581} 2990}
2582 2991
2992static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
2993 struct ieee80211_vif *vif,
2994 enum sta_notify_cmd cmd,
2995 struct ieee80211_sta *sta)
2996{
2997 struct iwl_priv *priv = hw->priv;
2998 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2999 int sta_id;
3000
3001 /*
3002 * TODO: We really should use this callback to
3003 * actually maintain the station table in
3004 * the device.
3005 */
3006
3007 switch (cmd) {
3008 case STA_NOTIFY_ADD:
3009 atomic_set(&sta_priv->pending_frames, 0);
3010 if (vif->type == NL80211_IFTYPE_AP)
3011 sta_priv->client = true;
3012 break;
3013 case STA_NOTIFY_SLEEP:
3014 WARN_ON(!sta_priv->client);
3015 sta_priv->asleep = true;
3016 if (atomic_read(&sta_priv->pending_frames) > 0)
3017 ieee80211_sta_block_awake(hw, sta, true);
3018 break;
3019 case STA_NOTIFY_AWAKE:
3020 WARN_ON(!sta_priv->client);
3021 if (!sta_priv->asleep)
3022 break;
3023 sta_priv->asleep = false;
3024 sta_id = iwl_find_station(priv, sta->addr);
3025 if (sta_id != IWL_INVALID_STATION)
3026 iwl_sta_modify_ps_wake(priv, sta_id);
3027 break;
3028 default:
3029 break;
3030 }
3031}
3032
2583/***************************************************************************** 3033/*****************************************************************************
2584 * 3034 *
2585 * sysfs attributes 3035 * sysfs attributes
@@ -2774,7 +3224,7 @@ static ssize_t show_statistics(struct device *d,
2774 return -EAGAIN; 3224 return -EAGAIN;
2775 3225
2776 mutex_lock(&priv->mutex); 3226 mutex_lock(&priv->mutex);
2777 rc = iwl_send_statistics_request(priv, 0); 3227 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
2778 mutex_unlock(&priv->mutex); 3228 mutex_unlock(&priv->mutex);
2779 3229
2780 if (rc) { 3230 if (rc) {
@@ -2799,6 +3249,40 @@ static ssize_t show_statistics(struct device *d,
2799 3249
2800static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL); 3250static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
2801 3251
3252static ssize_t show_rts_ht_protection(struct device *d,
3253 struct device_attribute *attr, char *buf)
3254{
3255 struct iwl_priv *priv = dev_get_drvdata(d);
3256
3257 return sprintf(buf, "%s\n",
3258 priv->cfg->use_rts_for_ht ? "RTS/CTS" : "CTS-to-self");
3259}
3260
3261static ssize_t store_rts_ht_protection(struct device *d,
3262 struct device_attribute *attr,
3263 const char *buf, size_t count)
3264{
3265 struct iwl_priv *priv = dev_get_drvdata(d);
3266 unsigned long val;
3267 int ret;
3268
3269 ret = strict_strtoul(buf, 10, &val);
3270 if (ret)
3271 IWL_INFO(priv, "Input is not in decimal form.\n");
3272 else {
3273 if (!iwl_is_associated(priv))
3274 priv->cfg->use_rts_for_ht = val ? true : false;
3275 else
3276 IWL_ERR(priv, "Sta associated with AP - "
3277 "Change protection mechanism is not allowed\n");
3278 ret = count;
3279 }
3280 return ret;
3281}
3282
3283static DEVICE_ATTR(rts_ht_protection, S_IWUSR | S_IRUGO,
3284 show_rts_ht_protection, store_rts_ht_protection);
3285
2802 3286
2803/***************************************************************************** 3287/*****************************************************************************
2804 * 3288 *
@@ -2812,7 +3296,6 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
2812 3296
2813 init_waitqueue_head(&priv->wait_command_queue); 3297 init_waitqueue_head(&priv->wait_command_queue);
2814 3298
2815 INIT_WORK(&priv->up, iwl_bg_up);
2816 INIT_WORK(&priv->restart, iwl_bg_restart); 3299 INIT_WORK(&priv->restart, iwl_bg_restart);
2817 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish); 3300 INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
2818 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); 3301 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
@@ -2829,6 +3312,10 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
2829 priv->statistics_periodic.data = (unsigned long)priv; 3312 priv->statistics_periodic.data = (unsigned long)priv;
2830 priv->statistics_periodic.function = iwl_bg_statistics_periodic; 3313 priv->statistics_periodic.function = iwl_bg_statistics_periodic;
2831 3314
3315 init_timer(&priv->ucode_trace);
3316 priv->ucode_trace.data = (unsigned long)priv;
3317 priv->ucode_trace.function = iwl_bg_ucode_trace;
3318
2832 if (!priv->cfg->use_isr_legacy) 3319 if (!priv->cfg->use_isr_legacy)
2833 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) 3320 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
2834 iwl_irq_tasklet, (unsigned long)priv); 3321 iwl_irq_tasklet, (unsigned long)priv);
@@ -2844,9 +3331,109 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
2844 3331
2845 cancel_delayed_work_sync(&priv->init_alive_start); 3332 cancel_delayed_work_sync(&priv->init_alive_start);
2846 cancel_delayed_work(&priv->scan_check); 3333 cancel_delayed_work(&priv->scan_check);
3334 cancel_work_sync(&priv->start_internal_scan);
2847 cancel_delayed_work(&priv->alive_start); 3335 cancel_delayed_work(&priv->alive_start);
2848 cancel_work_sync(&priv->beacon_update); 3336 cancel_work_sync(&priv->beacon_update);
2849 del_timer_sync(&priv->statistics_periodic); 3337 del_timer_sync(&priv->statistics_periodic);
3338 del_timer_sync(&priv->ucode_trace);
3339}
3340
3341static void iwl_init_hw_rates(struct iwl_priv *priv,
3342 struct ieee80211_rate *rates)
3343{
3344 int i;
3345
3346 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
3347 rates[i].bitrate = iwl_rates[i].ieee * 5;
3348 rates[i].hw_value = i; /* Rate scaling will work on indexes */
3349 rates[i].hw_value_short = i;
3350 rates[i].flags = 0;
3351 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
3352 /*
3353 * If CCK != 1M then set short preamble rate flag.
3354 */
3355 rates[i].flags |=
3356 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
3357 0 : IEEE80211_RATE_SHORT_PREAMBLE;
3358 }
3359 }
3360}
3361
3362static int iwl_init_drv(struct iwl_priv *priv)
3363{
3364 int ret;
3365
3366 priv->ibss_beacon = NULL;
3367
3368 spin_lock_init(&priv->sta_lock);
3369 spin_lock_init(&priv->hcmd_lock);
3370
3371 INIT_LIST_HEAD(&priv->free_frames);
3372
3373 mutex_init(&priv->mutex);
3374 mutex_init(&priv->sync_cmd_mutex);
3375
3376 /* Clear the driver's (not device's) station table */
3377 iwl_clear_stations_table(priv);
3378
3379 priv->ieee_channels = NULL;
3380 priv->ieee_rates = NULL;
3381 priv->band = IEEE80211_BAND_2GHZ;
3382
3383 priv->iw_mode = NL80211_IFTYPE_STATION;
3384 priv->current_ht_config.smps = IEEE80211_SMPS_STATIC;
3385 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3386
3387 /* initialize force reset */
3388 priv->force_reset[IWL_RF_RESET].reset_duration =
3389 IWL_DELAY_NEXT_FORCE_RF_RESET;
3390 priv->force_reset[IWL_FW_RESET].reset_duration =
3391 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3392
3393 /* Choose which receivers/antennas to use */
3394 if (priv->cfg->ops->hcmd->set_rxon_chain)
3395 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3396
3397 iwl_init_scan_params(priv);
3398
3399 iwl_reset_qos(priv);
3400
3401 priv->qos_data.qos_active = 0;
3402 priv->qos_data.qos_cap.val = 0;
3403
3404 priv->rates_mask = IWL_RATES_MASK;
3405 /* Set the tx_power_user_lmt to the lowest power level
3406 * this value will get overwritten by channel max power avg
3407 * from eeprom */
3408 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
3409
3410 ret = iwl_init_channel_map(priv);
3411 if (ret) {
3412 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3413 goto err;
3414 }
3415
3416 ret = iwlcore_init_geos(priv);
3417 if (ret) {
3418 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3419 goto err_free_channel_map;
3420 }
3421 iwl_init_hw_rates(priv, priv->ieee_rates);
3422
3423 return 0;
3424
3425err_free_channel_map:
3426 iwl_free_channel_map(priv);
3427err:
3428 return ret;
3429}
3430
3431static void iwl_uninit_drv(struct iwl_priv *priv)
3432{
3433 iwl_calib_free_results(priv);
3434 iwlcore_free_geos(priv);
3435 iwl_free_channel_map(priv);
3436 kfree(priv->scan);
2850} 3437}
2851 3438
2852static struct attribute *iwl_sysfs_entries[] = { 3439static struct attribute *iwl_sysfs_entries[] = {
@@ -2855,6 +3442,7 @@ static struct attribute *iwl_sysfs_entries[] = {
2855 &dev_attr_statistics.attr, 3442 &dev_attr_statistics.attr,
2856 &dev_attr_temperature.attr, 3443 &dev_attr_temperature.attr,
2857 &dev_attr_tx_power.attr, 3444 &dev_attr_tx_power.attr,
3445 &dev_attr_rts_ht_protection.attr,
2858#ifdef CONFIG_IWLWIFI_DEBUG 3446#ifdef CONFIG_IWLWIFI_DEBUG
2859 &dev_attr_debug_level.attr, 3447 &dev_attr_debug_level.attr,
2860#endif 3448#endif
@@ -2877,12 +3465,12 @@ static struct ieee80211_ops iwl_hw_ops = {
2877 .set_key = iwl_mac_set_key, 3465 .set_key = iwl_mac_set_key,
2878 .update_tkip_key = iwl_mac_update_tkip_key, 3466 .update_tkip_key = iwl_mac_update_tkip_key,
2879 .get_stats = iwl_mac_get_stats, 3467 .get_stats = iwl_mac_get_stats,
2880 .get_tx_stats = iwl_mac_get_tx_stats,
2881 .conf_tx = iwl_mac_conf_tx, 3468 .conf_tx = iwl_mac_conf_tx,
2882 .reset_tsf = iwl_mac_reset_tsf, 3469 .reset_tsf = iwl_mac_reset_tsf,
2883 .bss_info_changed = iwl_bss_info_changed, 3470 .bss_info_changed = iwl_bss_info_changed,
2884 .ampdu_action = iwl_mac_ampdu_action, 3471 .ampdu_action = iwl_mac_ampdu_action,
2885 .hw_scan = iwl_mac_hw_scan 3472 .hw_scan = iwl_mac_hw_scan,
3473 .sta_notify = iwl_mac_sta_notify,
2886}; 3474};
2887 3475
2888static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3476static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
@@ -2972,10 +3560,19 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2972 (unsigned long long) pci_resource_len(pdev, 0)); 3560 (unsigned long long) pci_resource_len(pdev, 0));
2973 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base); 3561 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
2974 3562
2975 /* this spin lock will be used in apm_ops.init and EEPROM access 3563 /* these spin locks will be used in apm_ops.init and EEPROM access
2976 * we should init now 3564 * we should init now
2977 */ 3565 */
2978 spin_lock_init(&priv->reg_lock); 3566 spin_lock_init(&priv->reg_lock);
3567 spin_lock_init(&priv->lock);
3568
3569 /*
3570 * stop and reset the on-board processor just in case it is in a
3571 * strange state ... like being left stranded by a primary kernel
3572 * and this is now the kdump kernel trying to start up
3573 */
3574 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3575
2979 iwl_hw_detect(priv); 3576 iwl_hw_detect(priv);
2980 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n", 3577 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s REV=0x%X\n",
2981 priv->cfg->name, priv->hw_rev); 3578 priv->cfg->name, priv->hw_rev);
@@ -2990,12 +3587,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2990 goto out_iounmap; 3587 goto out_iounmap;
2991 } 3588 }
2992 3589
2993 /* amp init */
2994 err = priv->cfg->ops->lib->apm_ops.init(priv);
2995 if (err < 0) {
2996 IWL_ERR(priv, "Failed to init APMG\n");
2997 goto out_iounmap;
2998 }
2999 /***************** 3590 /*****************
3000 * 4. Read EEPROM 3591 * 4. Read EEPROM
3001 *****************/ 3592 *****************/
@@ -3056,9 +3647,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3056 iwl_setup_deferred_work(priv); 3647 iwl_setup_deferred_work(priv);
3057 iwl_setup_rx_handlers(priv); 3648 iwl_setup_rx_handlers(priv);
3058 3649
3059 /********************************** 3650 /*********************************************
3060 * 8. Setup and register mac80211 3651 * 8. Enable interrupts and read RFKILL state
3061 **********************************/ 3652 *********************************************/
3062 3653
3063 /* enable interrupts if needed: hw bug w/a */ 3654 /* enable interrupts if needed: hw bug w/a */
3064 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); 3655 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
@@ -3069,14 +3660,6 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3069 3660
3070 iwl_enable_interrupts(priv); 3661 iwl_enable_interrupts(priv);
3071 3662
3072 err = iwl_setup_mac(priv);
3073 if (err)
3074 goto out_remove_sysfs;
3075
3076 err = iwl_dbgfs_register(priv, DRV_NAME);
3077 if (err)
3078 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3079
3080 /* If platform's RF_KILL switch is NOT set to KILL */ 3663 /* If platform's RF_KILL switch is NOT set to KILL */
3081 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 3664 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
3082 clear_bit(STATUS_RF_KILL_HW, &priv->status); 3665 clear_bit(STATUS_RF_KILL_HW, &priv->status);
@@ -3088,6 +3671,11 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3088 3671
3089 iwl_power_initialize(priv); 3672 iwl_power_initialize(priv);
3090 iwl_tt_initialize(priv); 3673 iwl_tt_initialize(priv);
3674
3675 err = iwl_request_firmware(priv, true);
3676 if (err)
3677 goto out_remove_sysfs;
3678
3091 return 0; 3679 return 0;
3092 3680
3093 out_remove_sysfs: 3681 out_remove_sysfs:
@@ -3141,6 +3729,15 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3141 iwl_down(priv); 3729 iwl_down(priv);
3142 } 3730 }
3143 3731
3732 /*
3733 * Make sure device is reset to low power before unloading driver.
3734 * This may be redundant with iwl_down(), but there are paths to
3735 * run iwl_down() without calling apm_ops.stop(), and there are
3736 * paths to avoid running iwl_down() at all before leaving driver.
3737 * This (inexpensive) call *makes sure* device is reset.
3738 */
3739 priv->cfg->ops->lib->apm_ops.stop(priv);
3740
3144 iwl_tt_exit(priv); 3741 iwl_tt_exit(priv);
3145 3742
3146 /* make sure we flush any pending irq or 3743 /* make sure we flush any pending irq or
@@ -3197,43 +3794,103 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
3197 *****************************************************************************/ 3794 *****************************************************************************/
3198 3795
3199/* Hardware specific file defines the PCI IDs table for that hardware module */ 3796/* Hardware specific file defines the PCI IDs table for that hardware module */
3200static struct pci_device_id iwl_hw_card_ids[] = { 3797static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
3201#ifdef CONFIG_IWL4965 3798#ifdef CONFIG_IWL4965
3202 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)}, 3799 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
3203 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)}, 3800 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
3204#endif /* CONFIG_IWL4965 */ 3801#endif /* CONFIG_IWL4965 */
3205#ifdef CONFIG_IWL5000 3802#ifdef CONFIG_IWL5000
3206 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bg_cfg)}, 3803/* 5100 Series WiFi */
3207 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bg_cfg)}, 3804 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
3208 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, 3805 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
3209 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, 3806 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
3210 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, 3807 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
3211 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, 3808 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
3212 {IWL_PCI_DEVICE(0x4232, PCI_ANY_ID, iwl5100_agn_cfg)}, 3809 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
3213 {IWL_PCI_DEVICE(0x4235, PCI_ANY_ID, iwl5300_agn_cfg)}, 3810 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
3214 {IWL_PCI_DEVICE(0x4236, PCI_ANY_ID, iwl5300_agn_cfg)}, 3811 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
3215 {IWL_PCI_DEVICE(0x4237, PCI_ANY_ID, iwl5100_agn_cfg)}, 3812 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
3216/* 5350 WiFi/WiMax */ 3813 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
3217 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, 3814 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
3218 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, 3815 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
3219 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, 3816 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
3220/* 5150 Wifi/WiMax */ 3817 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
3221 {IWL_PCI_DEVICE(0x423C, PCI_ANY_ID, iwl5150_agn_cfg)}, 3818 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
3222 {IWL_PCI_DEVICE(0x423D, PCI_ANY_ID, iwl5150_agn_cfg)}, 3819 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
3223/* 6000/6050 Series */ 3820 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
3224 {IWL_PCI_DEVICE(0x008D, PCI_ANY_ID, iwl6000h_2agn_cfg)}, 3821 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
3225 {IWL_PCI_DEVICE(0x008E, PCI_ANY_ID, iwl6000h_2agn_cfg)}, 3822 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
3226 {IWL_PCI_DEVICE(0x422B, PCI_ANY_ID, iwl6000_3agn_cfg)}, 3823 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
3227 {IWL_PCI_DEVICE(0x422C, PCI_ANY_ID, iwl6000i_2agn_cfg)}, 3824 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
3228 {IWL_PCI_DEVICE(0x4238, PCI_ANY_ID, iwl6000_3agn_cfg)}, 3825 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
3229 {IWL_PCI_DEVICE(0x4239, PCI_ANY_ID, iwl6000i_2agn_cfg)}, 3826 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
3230 {IWL_PCI_DEVICE(0x0086, PCI_ANY_ID, iwl6050_3agn_cfg)}, 3827 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
3231 {IWL_PCI_DEVICE(0x0087, PCI_ANY_ID, iwl6050_2agn_cfg)}, 3828
3232 {IWL_PCI_DEVICE(0x0088, PCI_ANY_ID, iwl6050_3agn_cfg)}, 3829/* 5300 Series WiFi */
3233 {IWL_PCI_DEVICE(0x0089, PCI_ANY_ID, iwl6050_2agn_cfg)}, 3830 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
3831 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
3832 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
3833 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
3834 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
3835 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
3836 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
3837 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
3838 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
3839 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
3840 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
3841 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
3842
3843/* 5350 Series WiFi/WiMax */
3844 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
3845 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
3846 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
3847
3848/* 5150 Series Wifi/WiMax */
3849 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
3850 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
3851 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
3852 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
3853 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
3854 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
3855
3856 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
3857 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
3858 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
3859 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
3860
3861/* 6x00 Series */
3862 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
3863 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
3864 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
3865 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
3866 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
3867 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
3868 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
3869 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
3870 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
3871 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
3872
3873/* 6x50 WiFi/WiMax Series */
3874 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
3875 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
3876 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
3877 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
3878 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
3879 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
3880
3234/* 1000 Series WiFi */ 3881/* 1000 Series WiFi */
3235 {IWL_PCI_DEVICE(0x0083, PCI_ANY_ID, iwl1000_bgn_cfg)}, 3882 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
3236 {IWL_PCI_DEVICE(0x0084, PCI_ANY_ID, iwl1000_bgn_cfg)}, 3883 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
3884 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
3885 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
3886 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
3887 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
3888 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
3889 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
3890 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
3891 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
3892 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
3893 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
3237#endif /* CONFIG_IWL5000 */ 3894#endif /* CONFIG_IWL5000 */
3238 3895
3239 {0} 3896 {0}
@@ -3288,9 +3945,9 @@ module_exit(iwl_exit);
3288module_init(iwl_init); 3945module_init(iwl_init);
3289 3946
3290#ifdef CONFIG_IWLWIFI_DEBUG 3947#ifdef CONFIG_IWLWIFI_DEBUG
3291module_param_named(debug50, iwl_debug_level, uint, 0444); 3948module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
3292MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)"); 3949MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
3293module_param_named(debug, iwl_debug_level, uint, 0644); 3950module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
3294MODULE_PARM_DESC(debug, "debug output mask"); 3951MODULE_PARM_DESC(debug, "debug output mask");
3295#endif 3952#endif
3296 3953
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.c b/drivers/net/wireless/iwlwifi/iwl-calib.c
index c4b565a2de94..8b516c5ff0bb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-calib.c
+++ b/drivers/net/wireless/iwlwifi/iwl-calib.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -60,6 +60,7 @@
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *****************************************************************************/ 61 *****************************************************************************/
62 62
63#include <linux/slab.h>
63#include <net/mac80211.h> 64#include <net/mac80211.h>
64 65
65#include "iwl-dev.h" 66#include "iwl-dev.h"
@@ -132,6 +133,7 @@ void iwl_calib_free_results(struct iwl_priv *priv)
132 priv->calib_results[i].buf_len = 0; 133 priv->calib_results[i].buf_len = 0;
133 } 134 }
134} 135}
136EXPORT_SYMBOL(iwl_calib_free_results);
135 137
136/***************************************************************************** 138/*****************************************************************************
137 * RUNTIME calibrations framework 139 * RUNTIME calibrations framework
@@ -413,7 +415,6 @@ static int iwl_sens_auto_corr_ofdm(struct iwl_priv *priv,
413/* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */ 415/* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
414static int iwl_sensitivity_write(struct iwl_priv *priv) 416static int iwl_sensitivity_write(struct iwl_priv *priv)
415{ 417{
416 int ret = 0;
417 struct iwl_sensitivity_cmd cmd ; 418 struct iwl_sensitivity_cmd cmd ;
418 struct iwl_sensitivity_data *data = NULL; 419 struct iwl_sensitivity_data *data = NULL;
419 struct iwl_host_cmd cmd_out = { 420 struct iwl_host_cmd cmd_out = {
@@ -447,11 +448,11 @@ static int iwl_sensitivity_write(struct iwl_priv *priv)
447 cpu_to_le16((u16)data->nrg_th_ofdm); 448 cpu_to_le16((u16)data->nrg_th_ofdm);
448 449
449 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] = 450 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
450 cpu_to_le16(190); 451 cpu_to_le16(data->barker_corr_th_min);
451 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] = 452 cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
452 cpu_to_le16(390); 453 cpu_to_le16(data->barker_corr_th_min_mrc);
453 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] = 454 cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
454 cpu_to_le16(62); 455 cpu_to_le16(data->nrg_th_cca);
455 456
456 IWL_DEBUG_CALIB(priv, "ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n", 457 IWL_DEBUG_CALIB(priv, "ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
457 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc, 458 data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
@@ -476,11 +477,7 @@ static int iwl_sensitivity_write(struct iwl_priv *priv)
476 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]), 477 memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
477 sizeof(u16)*HD_TABLE_SIZE); 478 sizeof(u16)*HD_TABLE_SIZE);
478 479
479 ret = iwl_send_cmd(priv, &cmd_out); 480 return iwl_send_cmd(priv, &cmd_out);
480 if (ret)
481 IWL_ERR(priv, "SENSITIVITY_CMD failed\n");
482
483 return ret;
484} 481}
485 482
486void iwl_init_sensitivity(struct iwl_priv *priv) 483void iwl_init_sensitivity(struct iwl_priv *priv)
@@ -516,7 +513,7 @@ void iwl_init_sensitivity(struct iwl_priv *priv)
516 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) 513 for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
517 data->nrg_silence_rssi[i] = 0; 514 data->nrg_silence_rssi[i] = 0;
518 515
519 data->auto_corr_ofdm = 90; 516 data->auto_corr_ofdm = ranges->auto_corr_min_ofdm;
520 data->auto_corr_ofdm_mrc = ranges->auto_corr_min_ofdm_mrc; 517 data->auto_corr_ofdm_mrc = ranges->auto_corr_min_ofdm_mrc;
521 data->auto_corr_ofdm_x1 = ranges->auto_corr_min_ofdm_x1; 518 data->auto_corr_ofdm_x1 = ranges->auto_corr_min_ofdm_x1;
522 data->auto_corr_ofdm_mrc_x1 = ranges->auto_corr_min_ofdm_mrc_x1; 519 data->auto_corr_ofdm_mrc_x1 = ranges->auto_corr_min_ofdm_mrc_x1;
@@ -524,6 +521,9 @@ void iwl_init_sensitivity(struct iwl_priv *priv)
524 data->auto_corr_cck_mrc = ranges->auto_corr_min_cck_mrc; 521 data->auto_corr_cck_mrc = ranges->auto_corr_min_cck_mrc;
525 data->nrg_th_cck = ranges->nrg_th_cck; 522 data->nrg_th_cck = ranges->nrg_th_cck;
526 data->nrg_th_ofdm = ranges->nrg_th_ofdm; 523 data->nrg_th_ofdm = ranges->nrg_th_ofdm;
524 data->barker_corr_th_min = ranges->barker_corr_th_min;
525 data->barker_corr_th_min_mrc = ranges->barker_corr_th_min_mrc;
526 data->nrg_th_cca = ranges->nrg_th_cca;
527 527
528 data->last_bad_plcp_cnt_ofdm = 0; 528 data->last_bad_plcp_cnt_ofdm = 0;
529 data->last_fa_cnt_ofdm = 0; 529 data->last_fa_cnt_ofdm = 0;
@@ -643,6 +643,15 @@ void iwl_sensitivity_calibration(struct iwl_priv *priv,
643} 643}
644EXPORT_SYMBOL(iwl_sensitivity_calibration); 644EXPORT_SYMBOL(iwl_sensitivity_calibration);
645 645
646static inline u8 find_first_chain(u8 mask)
647{
648 if (mask & ANT_A)
649 return CHAIN_A;
650 if (mask & ANT_B)
651 return CHAIN_B;
652 return CHAIN_C;
653}
654
646/* 655/*
647 * Accumulate 20 beacons of signal and noise statistics for each of 656 * Accumulate 20 beacons of signal and noise statistics for each of
648 * 3 receivers/antennas/rx-chains, then figure out: 657 * 3 receivers/antennas/rx-chains, then figure out:
@@ -675,14 +684,17 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
675 u8 num_tx_chains; 684 u8 num_tx_chains;
676 unsigned long flags; 685 unsigned long flags;
677 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general); 686 struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
687 u8 first_chain;
678 688
679 if (priv->disable_chain_noise_cal) 689 if (priv->disable_chain_noise_cal)
680 return; 690 return;
681 691
682 data = &(priv->chain_noise_data); 692 data = &(priv->chain_noise_data);
683 693
684 /* Accumulate just the first 20 beacons after the first association, 694 /*
685 * then we're done forever. */ 695 * Accumulate just the first "chain_noise_num_beacons" after
696 * the first association, then we're done forever.
697 */
686 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) { 698 if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
687 if (data->state == IWL_CHAIN_NOISE_ALIVE) 699 if (data->state == IWL_CHAIN_NOISE_ALIVE)
688 IWL_DEBUG_CALIB(priv, "Wait for noise calib reset\n"); 700 IWL_DEBUG_CALIB(priv, "Wait for noise calib reset\n");
@@ -710,7 +722,10 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
710 return; 722 return;
711 } 723 }
712 724
713 /* Accumulate beacon statistics values across 20 beacons */ 725 /*
726 * Accumulate beacon statistics values across
727 * "chain_noise_num_beacons"
728 */
714 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) & 729 chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
715 IN_BAND_FILTER; 730 IN_BAND_FILTER;
716 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) & 731 chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
@@ -741,16 +756,19 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
741 IWL_DEBUG_CALIB(priv, "chain_noise: a %d b %d c %d\n", 756 IWL_DEBUG_CALIB(priv, "chain_noise: a %d b %d c %d\n",
742 chain_noise_a, chain_noise_b, chain_noise_c); 757 chain_noise_a, chain_noise_b, chain_noise_c);
743 758
744 /* If this is the 20th beacon, determine: 759 /* If this is the "chain_noise_num_beacons", determine:
745 * 1) Disconnected antennas (using signal strengths) 760 * 1) Disconnected antennas (using signal strengths)
746 * 2) Differential gain (using silence noise) to balance receivers */ 761 * 2) Differential gain (using silence noise) to balance receivers */
747 if (data->beacon_count != CAL_NUM_OF_BEACONS) 762 if (data->beacon_count != priv->cfg->chain_noise_num_beacons)
748 return; 763 return;
749 764
750 /* Analyze signal for disconnected antenna */ 765 /* Analyze signal for disconnected antenna */
751 average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS; 766 average_sig[0] =
752 average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS; 767 (data->chain_signal_a) / priv->cfg->chain_noise_num_beacons;
753 average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS; 768 average_sig[1] =
769 (data->chain_signal_b) / priv->cfg->chain_noise_num_beacons;
770 average_sig[2] =
771 (data->chain_signal_c) / priv->cfg->chain_noise_num_beacons;
754 772
755 if (average_sig[0] >= average_sig[1]) { 773 if (average_sig[0] >= average_sig[1]) {
756 max_average_sig = average_sig[0]; 774 max_average_sig = average_sig[0];
@@ -790,6 +808,18 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
790 } 808 }
791 } 809 }
792 810
811 /*
812 * The above algorithm sometimes fails when the ucode
813 * reports 0 for all chains. It's not clear why that
814 * happens to start with, but it is then causing trouble
815 * because this can make us enable more chains than the
816 * hardware really has.
817 *
818 * To be safe, simply mask out any chains that we know
819 * are not on the device.
820 */
821 active_chains &= priv->hw_params.valid_rx_ant;
822
793 num_tx_chains = 0; 823 num_tx_chains = 0;
794 for (i = 0; i < NUM_RX_CHAINS; i++) { 824 for (i = 0; i < NUM_RX_CHAINS; i++) {
795 /* loops on all the bits of 825 /* loops on all the bits of
@@ -803,13 +833,17 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
803 /* there is a Tx antenna connected */ 833 /* there is a Tx antenna connected */
804 break; 834 break;
805 if (num_tx_chains == priv->hw_params.tx_chains_num && 835 if (num_tx_chains == priv->hw_params.tx_chains_num &&
806 data->disconn_array[i]) { 836 data->disconn_array[i]) {
807 /* This is the last TX antenna and is also 837 /*
808 * disconnected connect it anyway */ 838 * If all chains are disconnected
809 data->disconn_array[i] = 0; 839 * connect the first valid tx chain
810 active_chains |= ant_msk; 840 */
811 IWL_DEBUG_CALIB(priv, "All Tx chains are disconnected W/A - " 841 first_chain =
812 "declare %d as connected\n", i); 842 find_first_chain(priv->cfg->valid_tx_ant);
843 data->disconn_array[first_chain] = 0;
844 active_chains |= BIT(first_chain);
845 IWL_DEBUG_CALIB(priv, "All Tx chains are disconnected W/A - declare %d as connected\n",
846 first_chain);
813 break; 847 break;
814 } 848 }
815 } 849 }
@@ -820,9 +854,12 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
820 active_chains); 854 active_chains);
821 855
822 /* Analyze noise for rx balance */ 856 /* Analyze noise for rx balance */
823 average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS); 857 average_noise[0] =
824 average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS); 858 ((data->chain_noise_a) / priv->cfg->chain_noise_num_beacons);
825 average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS); 859 average_noise[1] =
860 ((data->chain_noise_b) / priv->cfg->chain_noise_num_beacons);
861 average_noise[2] =
862 ((data->chain_noise_c) / priv->cfg->chain_noise_num_beacons);
826 863
827 for (i = 0; i < NUM_RX_CHAINS; i++) { 864 for (i = 0; i < NUM_RX_CHAINS; i++) {
828 if (!(data->disconn_array[i]) && 865 if (!(data->disconn_array[i]) &&
@@ -843,7 +880,8 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv,
843 880
844 if (priv->cfg->ops->utils->gain_computation) 881 if (priv->cfg->ops->utils->gain_computation)
845 priv->cfg->ops->utils->gain_computation(priv, average_noise, 882 priv->cfg->ops->utils->gain_computation(priv, average_noise,
846 min_average_noise_antenna_i, min_average_noise); 883 min_average_noise_antenna_i, min_average_noise,
884 find_first_chain(priv->cfg->valid_rx_ant));
847 885
848 /* Some power changes may have been made during the calibration. 886 /* Some power changes may have been made during the calibration.
849 * Update and commit the RXON 887 * Update and commit the RXON
@@ -870,7 +908,7 @@ void iwl_reset_run_time_calib(struct iwl_priv *priv)
870 908
871 /* Ask for statistics now, the uCode will send notification 909 /* Ask for statistics now, the uCode will send notification
872 * periodically after association */ 910 * periodically after association */
873 iwl_send_statistics_request(priv, CMD_ASYNC); 911 iwl_send_statistics_request(priv, CMD_ASYNC, true);
874} 912}
875EXPORT_SYMBOL(iwl_reset_run_time_calib); 913EXPORT_SYMBOL(iwl_reset_run_time_calib);
876 914
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.h b/drivers/net/wireless/iwlwifi/iwl-calib.h
index b6cef989a796..2b7b1df83ba0 100644
--- a/drivers/net/wireless/iwlwifi/iwl-calib.h
+++ b/drivers/net/wireless/iwlwifi/iwl-calib.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h
index 4afaf773aeac..f4e59ae07f8e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-commands.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -109,17 +109,17 @@ enum {
109 REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* 4965 only */ 109 REPLY_TX_LINK_QUALITY_CMD = 0x4e, /* 4965 only */
110 110
111 /* WiMAX coexistence */ 111 /* WiMAX coexistence */
112 COEX_PRIORITY_TABLE_CMD = 0x5a, /*5000 only */ 112 COEX_PRIORITY_TABLE_CMD = 0x5a, /* for 5000 series and up */
113 COEX_MEDIUM_NOTIFICATION = 0x5b, 113 COEX_MEDIUM_NOTIFICATION = 0x5b,
114 COEX_EVENT_CMD = 0x5c, 114 COEX_EVENT_CMD = 0x5c,
115 115
116 /* Calibration */ 116 /* Calibration */
117 TEMPERATURE_NOTIFICATION = 0x62,
117 CALIBRATION_CFG_CMD = 0x65, 118 CALIBRATION_CFG_CMD = 0x65,
118 CALIBRATION_RES_NOTIFICATION = 0x66, 119 CALIBRATION_RES_NOTIFICATION = 0x66,
119 CALIBRATION_COMPLETE_NOTIFICATION = 0x67, 120 CALIBRATION_COMPLETE_NOTIFICATION = 0x67,
120 121
121 /* 802.11h related */ 122 /* 802.11h related */
122 RADAR_NOTIFICATION = 0x70, /* not used */
123 REPLY_QUIET_CMD = 0x71, /* not used */ 123 REPLY_QUIET_CMD = 0x71, /* not used */
124 REPLY_CHANNEL_SWITCH = 0x72, 124 REPLY_CHANNEL_SWITCH = 0x72,
125 CHANNEL_SWITCH_NOTIFICATION = 0x73, 125 CHANNEL_SWITCH_NOTIFICATION = 0x73,
@@ -148,7 +148,7 @@ enum {
148 QUIET_NOTIFICATION = 0x96, /* not used */ 148 QUIET_NOTIFICATION = 0x96, /* not used */
149 REPLY_TX_PWR_TABLE_CMD = 0x97, 149 REPLY_TX_PWR_TABLE_CMD = 0x97,
150 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */ 150 REPLY_TX_POWER_DBM_CMD_V1 = 0x98, /* old version of API */
151 TX_ANT_CONFIGURATION_CMD = 0x98, /* not used */ 151 TX_ANT_CONFIGURATION_CMD = 0x98,
152 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */ 152 MEASURE_ABORT_NOTIFICATION = 0x99, /* not used */
153 153
154 /* Bluetooth device coexistence config command */ 154 /* Bluetooth device coexistence config command */
@@ -353,6 +353,9 @@ struct iwl3945_power_per_rate {
353#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32 353#define POWER_TABLE_NUM_HT_OFDM_ENTRIES 32
354#define POWER_TABLE_CCK_ENTRY 32 354#define POWER_TABLE_CCK_ENTRY 32
355 355
356#define IWL_PWR_NUM_HT_OFDM_ENTRIES 24
357#define IWL_PWR_CCK_ENTRIES 2
358
356/** 359/**
357 * union iwl4965_tx_power_dual_stream 360 * union iwl4965_tx_power_dual_stream
358 * 361 *
@@ -411,6 +414,16 @@ struct iwl5000_tx_power_dbm_cmd {
411 u8 reserved; 414 u8 reserved;
412} __attribute__ ((packed)); 415} __attribute__ ((packed));
413 416
417/**
418 * Command TX_ANT_CONFIGURATION_CMD = 0x98
419 * This command is used to configure valid Tx antenna.
420 * By default uCode concludes the valid antenna according to the radio flavor.
421 * This command enables the driver to override/modify this conclusion.
422 */
423struct iwl_tx_ant_config_cmd {
424 __le32 valid;
425} __attribute__ ((packed));
426
414/****************************************************************************** 427/******************************************************************************
415 * (0a) 428 * (0a)
416 * Alive and Error Commands & Responses: 429 * Alive and Error Commands & Responses:
@@ -793,7 +806,7 @@ struct iwl3945_channel_switch_cmd {
793 struct iwl3945_power_per_rate power[IWL_MAX_RATES]; 806 struct iwl3945_power_per_rate power[IWL_MAX_RATES];
794} __attribute__ ((packed)); 807} __attribute__ ((packed));
795 808
796struct iwl_channel_switch_cmd { 809struct iwl4965_channel_switch_cmd {
797 u8 band; 810 u8 band;
798 u8 expect_beacon; 811 u8 expect_beacon;
799 __le16 channel; 812 __le16 channel;
@@ -803,6 +816,48 @@ struct iwl_channel_switch_cmd {
803 struct iwl4965_tx_power_db tx_power; 816 struct iwl4965_tx_power_db tx_power;
804} __attribute__ ((packed)); 817} __attribute__ ((packed));
805 818
819/**
820 * struct iwl5000_channel_switch_cmd
821 * @band: 0- 5.2GHz, 1- 2.4GHz
822 * @expect_beacon: 0- resume transmits after channel switch
823 * 1- wait for beacon to resume transmits
824 * @channel: new channel number
825 * @rxon_flags: Rx on flags
826 * @rxon_filter_flags: filtering parameters
827 * @switch_time: switch time in extended beacon format
828 * @reserved: reserved bytes
829 */
830struct iwl5000_channel_switch_cmd {
831 u8 band;
832 u8 expect_beacon;
833 __le16 channel;
834 __le32 rxon_flags;
835 __le32 rxon_filter_flags;
836 __le32 switch_time;
837 __le32 reserved[2][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
838} __attribute__ ((packed));
839
840/**
841 * struct iwl6000_channel_switch_cmd
842 * @band: 0- 5.2GHz, 1- 2.4GHz
843 * @expect_beacon: 0- resume transmits after channel switch
844 * 1- wait for beacon to resume transmits
845 * @channel: new channel number
846 * @rxon_flags: Rx on flags
847 * @rxon_filter_flags: filtering parameters
848 * @switch_time: switch time in extended beacon format
849 * @reserved: reserved bytes
850 */
851struct iwl6000_channel_switch_cmd {
852 u8 band;
853 u8 expect_beacon;
854 __le16 channel;
855 __le32 rxon_flags;
856 __le32 rxon_filter_flags;
857 __le32 switch_time;
858 __le32 reserved[3][IWL_PWR_NUM_HT_OFDM_ENTRIES + IWL_PWR_CCK_ENTRIES];
859} __attribute__ ((packed));
860
806/* 861/*
807 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command) 862 * CHANNEL_SWITCH_NOTIFICATION = 0x73 (notification only, not a command)
808 */ 863 */
@@ -921,6 +976,7 @@ struct iwl_qosparam_cmd {
921#define STA_MODIFY_TX_RATE_MSK 0x04 976#define STA_MODIFY_TX_RATE_MSK 0x04
922#define STA_MODIFY_ADDBA_TID_MSK 0x08 977#define STA_MODIFY_ADDBA_TID_MSK 0x08
923#define STA_MODIFY_DELBA_TID_MSK 0x10 978#define STA_MODIFY_DELBA_TID_MSK 0x10
979#define STA_MODIFY_SLEEP_TX_COUNT_MSK 0x20
924 980
925/* Receiver address (actually, Rx station's index into station table), 981/* Receiver address (actually, Rx station's index into station table),
926 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */ 982 * combined with Traffic ID (QOS priority), in format used by Tx Scheduler */
@@ -1051,7 +1107,14 @@ struct iwl4965_addsta_cmd {
1051 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 1107 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
1052 __le16 add_immediate_ba_ssn; 1108 __le16 add_immediate_ba_ssn;
1053 1109
1054 __le32 reserved2; 1110 /*
1111 * Number of packets OK to transmit to station even though
1112 * it is asleep -- used to synchronise PS-poll and u-APSD
1113 * responses while ucode keeps track of STA sleep state.
1114 */
1115 __le16 sleep_tx_count;
1116
1117 __le16 reserved2;
1055} __attribute__ ((packed)); 1118} __attribute__ ((packed));
1056 1119
1057/* 5000 */ 1120/* 5000 */
@@ -1082,7 +1145,14 @@ struct iwl_addsta_cmd {
1082 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */ 1145 * Set modify_mask bit STA_MODIFY_ADDBA_TID_MSK to use this field. */
1083 __le16 add_immediate_ba_ssn; 1146 __le16 add_immediate_ba_ssn;
1084 1147
1085 __le32 reserved2; 1148 /*
1149 * Number of packets OK to transmit to station even though
1150 * it is asleep -- used to synchronise PS-poll and u-APSD
1151 * responses while ucode keeps track of STA sleep state.
1152 */
1153 __le16 sleep_tx_count;
1154
1155 __le16 reserved2;
1086} __attribute__ ((packed)); 1156} __attribute__ ((packed));
1087 1157
1088 1158
@@ -1634,6 +1704,21 @@ enum {
1634 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */ 1704 TX_ABORT_REQUIRED_MSK = 0x80000000, /* bits 31:31 */
1635}; 1705};
1636 1706
1707static inline u32 iwl_tx_status_to_mac80211(u32 status)
1708{
1709 status &= TX_STATUS_MSK;
1710
1711 switch (status) {
1712 case TX_STATUS_SUCCESS:
1713 case TX_STATUS_DIRECT_DONE:
1714 return IEEE80211_TX_STAT_ACK;
1715 case TX_STATUS_FAIL_DEST_PS:
1716 return IEEE80211_TX_STAT_TX_FILTERED;
1717 default:
1718 return 0;
1719 }
1720}
1721
1637static inline bool iwl_is_tx_success(u32 status) 1722static inline bool iwl_is_tx_success(u32 status)
1638{ 1723{
1639 status &= TX_STATUS_MSK; 1724 status &= TX_STATUS_MSK;
@@ -2163,6 +2248,31 @@ struct iwl_link_quality_cmd {
2163} __attribute__ ((packed)); 2248} __attribute__ ((packed));
2164 2249
2165/* 2250/*
2251 * BT configuration enable flags:
2252 * bit 0 - 1: BT channel announcement enabled
2253 * 0: disable
2254 * bit 1 - 1: priority of BT device enabled
2255 * 0: disable
2256 * bit 2 - 1: BT 2 wire support enabled
2257 * 0: disable
2258 */
2259#define BT_COEX_DISABLE (0x0)
2260#define BT_ENABLE_CHANNEL_ANNOUNCE BIT(0)
2261#define BT_ENABLE_PRIORITY BIT(1)
2262#define BT_ENABLE_2_WIRE BIT(2)
2263
2264#define BT_COEX_DISABLE (0x0)
2265#define BT_COEX_ENABLE (BT_ENABLE_CHANNEL_ANNOUNCE | BT_ENABLE_PRIORITY)
2266
2267#define BT_LEAD_TIME_MIN (0x0)
2268#define BT_LEAD_TIME_DEF (0x1E)
2269#define BT_LEAD_TIME_MAX (0xFF)
2270
2271#define BT_MAX_KILL_MIN (0x1)
2272#define BT_MAX_KILL_DEF (0x5)
2273#define BT_MAX_KILL_MAX (0xFF)
2274
2275/*
2166 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response) 2276 * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
2167 * 2277 *
2168 * 3945 and 4965 support hardware handshake with Bluetooth device on 2278 * 3945 and 4965 support hardware handshake with Bluetooth device on
@@ -2411,7 +2521,7 @@ struct iwl_card_state_notif {
2411 2521
2412#define HW_CARD_DISABLED 0x01 2522#define HW_CARD_DISABLED 0x01
2413#define SW_CARD_DISABLED 0x02 2523#define SW_CARD_DISABLED 0x02
2414#define RF_CARD_DISABLED 0x04 2524#define CT_CARD_DISABLED 0x04
2415#define RXON_CARD_DISABLED 0x10 2525#define RXON_CARD_DISABLED 0x10
2416 2526
2417struct iwl_ct_kill_config { 2527struct iwl_ct_kill_config {
@@ -2497,9 +2607,10 @@ struct iwl_scan_channel {
2497/** 2607/**
2498 * struct iwl_ssid_ie - directed scan network information element 2608 * struct iwl_ssid_ie - directed scan network information element
2499 * 2609 *
2500 * Up to 4 of these may appear in REPLY_SCAN_CMD, selected by "type" field 2610 * Up to 20 of these may appear in REPLY_SCAN_CMD (Note: Only 4 are in
2501 * in struct iwl_scan_channel; each channel may select different ssids from 2611 * 3945 SCAN api), selected by "type" bit field in struct iwl_scan_channel;
2502 * among the 4 entries. SSID IEs get transmitted in reverse order of entry. 2612 * each channel may select different ssids from among the 20 (4) entries.
2613 * SSID IEs get transmitted in reverse order of entry.
2503 */ 2614 */
2504struct iwl_ssid_ie { 2615struct iwl_ssid_ie {
2505 u8 id; 2616 u8 id;
@@ -2510,8 +2621,11 @@ struct iwl_ssid_ie {
2510#define PROBE_OPTION_MAX_3945 4 2621#define PROBE_OPTION_MAX_3945 4
2511#define PROBE_OPTION_MAX 20 2622#define PROBE_OPTION_MAX 20
2512#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF) 2623#define TX_CMD_LIFE_TIME_INFINITE cpu_to_le32(0xFFFFFFFF)
2513#define IWL_GOOD_CRC_TH cpu_to_le16(1) 2624#define IWL_GOOD_CRC_TH_DISABLED 0
2625#define IWL_GOOD_CRC_TH_DEFAULT cpu_to_le16(1)
2626#define IWL_GOOD_CRC_TH_NEVER cpu_to_le16(0xffff)
2514#define IWL_MAX_SCAN_SIZE 1024 2627#define IWL_MAX_SCAN_SIZE 1024
2628#define IWL_MAX_CMD_SIZE 4096
2515#define IWL_MAX_PROBE_REQUEST 200 2629#define IWL_MAX_PROBE_REQUEST 200
2516 2630
2517/* 2631/*
@@ -2884,7 +2998,7 @@ struct statistics_rx_ht_phy {
2884 __le32 agg_crc32_good; 2998 __le32 agg_crc32_good;
2885 __le32 agg_mpdu_cnt; 2999 __le32 agg_mpdu_cnt;
2886 __le32 agg_cnt; 3000 __le32 agg_cnt;
2887 __le32 reserved2; 3001 __le32 unsupport_mcs;
2888} __attribute__ ((packed)); 3002} __attribute__ ((packed));
2889 3003
2890#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1) 3004#define INTERFERENCE_DATA_AVAILABLE cpu_to_le32(1)
@@ -2987,8 +3101,8 @@ struct statistics_div {
2987} __attribute__ ((packed)); 3101} __attribute__ ((packed));
2988 3102
2989struct statistics_general { 3103struct statistics_general {
2990 __le32 temperature; 3104 __le32 temperature; /* radio temperature */
2991 __le32 temperature_m; 3105 __le32 temperature_m; /* for 5000 and up, this is radio voltage */
2992 struct statistics_dbg dbg; 3106 struct statistics_dbg dbg;
2993 __le32 sleep_time; 3107 __le32 sleep_time;
2994 __le32 slots_out; 3108 __le32 slots_out;
@@ -2996,11 +3110,20 @@ struct statistics_general {
2996 __le32 ttl_timestamp; 3110 __le32 ttl_timestamp;
2997 struct statistics_div div; 3111 struct statistics_div div;
2998 __le32 rx_enable_counter; 3112 __le32 rx_enable_counter;
2999 __le32 reserved1; 3113 /*
3114 * num_of_sos_states:
3115 * count the number of times we have to re-tune
3116 * in order to get out of bad PHY status
3117 */
3118 __le32 num_of_sos_states;
3000 __le32 reserved2; 3119 __le32 reserved2;
3001 __le32 reserved3; 3120 __le32 reserved3;
3002} __attribute__ ((packed)); 3121} __attribute__ ((packed));
3003 3122
3123#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
3124#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
3125#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
3126
3004/* 3127/*
3005 * REPLY_STATISTICS_CMD = 0x9c, 3128 * REPLY_STATISTICS_CMD = 0x9c,
3006 * 3945 and 4965 identical. 3129 * 3945 and 4965 identical.
@@ -3057,13 +3180,30 @@ struct iwl_notif_statistics {
3057 3180
3058/* 3181/*
3059 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command) 3182 * MISSED_BEACONS_NOTIFICATION = 0xa2 (notification only, not a command)
3183 *
3184 * uCode send MISSED_BEACONS_NOTIFICATION to driver when detect beacon missed
3185 * in regardless of how many missed beacons, which mean when driver receive the
3186 * notification, inside the command, it can find all the beacons information
3187 * which include number of total missed beacons, number of consecutive missed
3188 * beacons, number of beacons received and number of beacons expected to
3189 * receive.
3190 *
3191 * If uCode detected consecutive_missed_beacons > 5, it will reset the radio
3192 * in order to bring the radio/PHY back to working state; which has no relation
3193 * to when driver will perform sensitivity calibration.
3194 *
3195 * Driver should set it own missed_beacon_threshold to decide when to perform
3196 * sensitivity calibration based on number of consecutive missed beacons in
3197 * order to improve overall performance, especially in noisy environment.
3198 *
3060 */ 3199 */
3061/* if ucode missed CONSECUTIVE_MISSED_BCONS_TH beacons in a row, 3200
3062 * then this notification will be sent. */ 3201#define IWL_MISSED_BEACON_THRESHOLD_MIN (1)
3063#define CONSECUTIVE_MISSED_BCONS_TH 20 3202#define IWL_MISSED_BEACON_THRESHOLD_DEF (5)
3203#define IWL_MISSED_BEACON_THRESHOLD_MAX IWL_MISSED_BEACON_THRESHOLD_DEF
3064 3204
3065struct iwl_missed_beacon_notif { 3205struct iwl_missed_beacon_notif {
3066 __le32 consequtive_missed_beacons; 3206 __le32 consecutive_missed_beacons;
3067 __le32 total_missed_becons; 3207 __le32 total_missed_becons;
3068 __le32 num_expected_beacons; 3208 __le32 num_expected_beacons;
3069 __le32 num_recvd_beacons; 3209 __le32 num_recvd_beacons;
@@ -3237,12 +3377,6 @@ struct iwl_missed_beacon_notif {
3237 * Lower values mean higher energy; this means making sure that the value 3377 * Lower values mean higher energy; this means making sure that the value
3238 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy". 3378 * in HD_MIN_ENERGY_CCK_DET_INDEX is at or *above* "Max cck energy".
3239 * 3379 *
3240 * Driver should set the following entries to fixed values:
3241 *
3242 * HD_MIN_ENERGY_OFDM_DET_INDEX 100
3243 * HD_BARKER_CORR_TH_ADD_MIN_INDEX 190
3244 * HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX 390
3245 * HD_OFDM_ENERGY_TH_IN_INDEX 62
3246 */ 3380 */
3247 3381
3248/* 3382/*
@@ -3339,11 +3473,7 @@ enum {
3339 IWL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7, 3473 IWL_PHY_CALIBRATE_DIFF_GAIN_CMD = 7,
3340 IWL_PHY_CALIBRATE_DC_CMD = 8, 3474 IWL_PHY_CALIBRATE_DC_CMD = 8,
3341 IWL_PHY_CALIBRATE_LO_CMD = 9, 3475 IWL_PHY_CALIBRATE_LO_CMD = 9,
3342 IWL_PHY_CALIBRATE_RX_BB_CMD = 10,
3343 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11, 3476 IWL_PHY_CALIBRATE_TX_IQ_CMD = 11,
3344 IWL_PHY_CALIBRATE_RX_IQ_CMD = 12,
3345 IWL_PHY_CALIBRATION_NOISE_CMD = 13,
3346 IWL_PHY_CALIBRATE_AGC_TABLE_CMD = 14,
3347 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15, 3477 IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD = 15,
3348 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16, 3478 IWL_PHY_CALIBRATE_BASE_BAND_CMD = 16,
3349 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17, 3479 IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD = 17,
@@ -3440,30 +3570,134 @@ struct iwl_led_cmd {
3440} __attribute__ ((packed)); 3570} __attribute__ ((packed));
3441 3571
3442/* 3572/*
3443 * Coexistence WIFI/WIMAX Command 3573 * station priority table entries
3444 * COEX_PRIORITY_TABLE_CMD = 0x5a 3574 * also used as potential "events" value for both
3445 * 3575 * COEX_MEDIUM_NOTIFICATION and COEX_EVENT_CMD
3576 */
3577
3578/*
3579 * COEX events entry flag masks
3580 * RP - Requested Priority
3581 * WP - Win Medium Priority: priority assigned when the contention has been won
3582 */
3583#define COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG (0x1)
3584#define COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG (0x2)
3585#define COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG (0x4)
3586
3587#define COEX_CU_UNASSOC_IDLE_RP 4
3588#define COEX_CU_UNASSOC_MANUAL_SCAN_RP 4
3589#define COEX_CU_UNASSOC_AUTO_SCAN_RP 4
3590#define COEX_CU_CALIBRATION_RP 4
3591#define COEX_CU_PERIODIC_CALIBRATION_RP 4
3592#define COEX_CU_CONNECTION_ESTAB_RP 4
3593#define COEX_CU_ASSOCIATED_IDLE_RP 4
3594#define COEX_CU_ASSOC_MANUAL_SCAN_RP 4
3595#define COEX_CU_ASSOC_AUTO_SCAN_RP 4
3596#define COEX_CU_ASSOC_ACTIVE_LEVEL_RP 4
3597#define COEX_CU_RF_ON_RP 6
3598#define COEX_CU_RF_OFF_RP 4
3599#define COEX_CU_STAND_ALONE_DEBUG_RP 6
3600#define COEX_CU_IPAN_ASSOC_LEVEL_RP 4
3601#define COEX_CU_RSRVD1_RP 4
3602#define COEX_CU_RSRVD2_RP 4
3603
3604#define COEX_CU_UNASSOC_IDLE_WP 3
3605#define COEX_CU_UNASSOC_MANUAL_SCAN_WP 3
3606#define COEX_CU_UNASSOC_AUTO_SCAN_WP 3
3607#define COEX_CU_CALIBRATION_WP 3
3608#define COEX_CU_PERIODIC_CALIBRATION_WP 3
3609#define COEX_CU_CONNECTION_ESTAB_WP 3
3610#define COEX_CU_ASSOCIATED_IDLE_WP 3
3611#define COEX_CU_ASSOC_MANUAL_SCAN_WP 3
3612#define COEX_CU_ASSOC_AUTO_SCAN_WP 3
3613#define COEX_CU_ASSOC_ACTIVE_LEVEL_WP 3
3614#define COEX_CU_RF_ON_WP 3
3615#define COEX_CU_RF_OFF_WP 3
3616#define COEX_CU_STAND_ALONE_DEBUG_WP 6
3617#define COEX_CU_IPAN_ASSOC_LEVEL_WP 3
3618#define COEX_CU_RSRVD1_WP 3
3619#define COEX_CU_RSRVD2_WP 3
3620
3621#define COEX_UNASSOC_IDLE_FLAGS 0
3622#define COEX_UNASSOC_MANUAL_SCAN_FLAGS \
3623 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3624 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3625#define COEX_UNASSOC_AUTO_SCAN_FLAGS \
3626 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3627 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3628#define COEX_CALIBRATION_FLAGS \
3629 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3630 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3631#define COEX_PERIODIC_CALIBRATION_FLAGS 0
3632/*
3633 * COEX_CONNECTION_ESTAB:
3634 * we need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3635 */
3636#define COEX_CONNECTION_ESTAB_FLAGS \
3637 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3638 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3639 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3640#define COEX_ASSOCIATED_IDLE_FLAGS 0
3641#define COEX_ASSOC_MANUAL_SCAN_FLAGS \
3642 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3643 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3644#define COEX_ASSOC_AUTO_SCAN_FLAGS \
3645 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3646 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3647#define COEX_ASSOC_ACTIVE_LEVEL_FLAGS 0
3648#define COEX_RF_ON_FLAGS 0
3649#define COEX_RF_OFF_FLAGS 0
3650#define COEX_STAND_ALONE_DEBUG_FLAGS \
3651 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3652 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG)
3653#define COEX_IPAN_ASSOC_LEVEL_FLAGS \
3654 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3655 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3656 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3657#define COEX_RSRVD1_FLAGS 0
3658#define COEX_RSRVD2_FLAGS 0
3659/*
3660 * COEX_CU_RF_ON is the event wrapping all radio ownership.
3661 * We need DELAY_MEDIUM_FREE_NTFY to let WiMAX disconnect from network.
3446 */ 3662 */
3663#define COEX_CU_RF_ON_FLAGS \
3664 (COEX_EVT_FLAG_MEDIUM_FREE_NTFY_FLG | \
3665 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_FLG | \
3666 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_FLG)
3667
3668
3447enum { 3669enum {
3670 /* un-association part */
3448 COEX_UNASSOC_IDLE = 0, 3671 COEX_UNASSOC_IDLE = 0,
3449 COEX_UNASSOC_MANUAL_SCAN = 1, 3672 COEX_UNASSOC_MANUAL_SCAN = 1,
3450 COEX_UNASSOC_AUTO_SCAN = 2, 3673 COEX_UNASSOC_AUTO_SCAN = 2,
3674 /* calibration */
3451 COEX_CALIBRATION = 3, 3675 COEX_CALIBRATION = 3,
3452 COEX_PERIODIC_CALIBRATION = 4, 3676 COEX_PERIODIC_CALIBRATION = 4,
3677 /* connection */
3453 COEX_CONNECTION_ESTAB = 5, 3678 COEX_CONNECTION_ESTAB = 5,
3679 /* association part */
3454 COEX_ASSOCIATED_IDLE = 6, 3680 COEX_ASSOCIATED_IDLE = 6,
3455 COEX_ASSOC_MANUAL_SCAN = 7, 3681 COEX_ASSOC_MANUAL_SCAN = 7,
3456 COEX_ASSOC_AUTO_SCAN = 8, 3682 COEX_ASSOC_AUTO_SCAN = 8,
3457 COEX_ASSOC_ACTIVE_LEVEL = 9, 3683 COEX_ASSOC_ACTIVE_LEVEL = 9,
3684 /* RF ON/OFF */
3458 COEX_RF_ON = 10, 3685 COEX_RF_ON = 10,
3459 COEX_RF_OFF = 11, 3686 COEX_RF_OFF = 11,
3460 COEX_STAND_ALONE_DEBUG = 12, 3687 COEX_STAND_ALONE_DEBUG = 12,
3688 /* IPAN */
3461 COEX_IPAN_ASSOC_LEVEL = 13, 3689 COEX_IPAN_ASSOC_LEVEL = 13,
3690 /* reserved */
3462 COEX_RSRVD1 = 14, 3691 COEX_RSRVD1 = 14,
3463 COEX_RSRVD2 = 15, 3692 COEX_RSRVD2 = 15,
3464 COEX_NUM_OF_EVENTS = 16 3693 COEX_NUM_OF_EVENTS = 16
3465}; 3694};
3466 3695
3696/*
3697 * Coexistence WIFI/WIMAX Command
3698 * COEX_PRIORITY_TABLE_CMD = 0x5a
3699 *
3700 */
3467struct iwl_wimax_coex_event_entry { 3701struct iwl_wimax_coex_event_entry {
3468 u8 request_prio; 3702 u8 request_prio;
3469 u8 win_medium_prio; 3703 u8 win_medium_prio;
@@ -3488,6 +3722,55 @@ struct iwl_wimax_coex_cmd {
3488 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS]; 3722 struct iwl_wimax_coex_event_entry sta_prio[COEX_NUM_OF_EVENTS];
3489} __attribute__ ((packed)); 3723} __attribute__ ((packed));
3490 3724
3725/*
3726 * Coexistence MEDIUM NOTIFICATION
3727 * COEX_MEDIUM_NOTIFICATION = 0x5b
3728 *
3729 * notification from uCode to host to indicate medium changes
3730 *
3731 */
3732/*
3733 * status field
3734 * bit 0 - 2: medium status
3735 * bit 3: medium change indication
3736 * bit 4 - 31: reserved
3737 */
3738/* status option values, (0 - 2 bits) */
3739#define COEX_MEDIUM_BUSY (0x0) /* radio belongs to WiMAX */
3740#define COEX_MEDIUM_ACTIVE (0x1) /* radio belongs to WiFi */
3741#define COEX_MEDIUM_PRE_RELEASE (0x2) /* received radio release */
3742#define COEX_MEDIUM_MSK (0x7)
3743
3744/* send notification status (1 bit) */
3745#define COEX_MEDIUM_CHANGED (0x8)
3746#define COEX_MEDIUM_CHANGED_MSK (0x8)
3747#define COEX_MEDIUM_SHIFT (3)
3748
3749struct iwl_coex_medium_notification {
3750 __le32 status;
3751 __le32 events;
3752} __attribute__ ((packed));
3753
3754/*
3755 * Coexistence EVENT Command
3756 * COEX_EVENT_CMD = 0x5c
3757 *
3758 * send from host to uCode for coex event request.
3759 */
3760/* flags options */
3761#define COEX_EVENT_REQUEST_MSK (0x1)
3762
3763struct iwl_coex_event_cmd {
3764 u8 flags;
3765 u8 event;
3766 __le16 reserved;
3767} __attribute__ ((packed));
3768
3769struct iwl_coex_event_resp {
3770 __le32 status;
3771} __attribute__ ((packed));
3772
3773
3491/****************************************************************************** 3774/******************************************************************************
3492 * (13) 3775 * (13)
3493 * Union of all expected notifications/responses: 3776 * Union of all expected notifications/responses:
@@ -3495,6 +3778,16 @@ struct iwl_wimax_coex_cmd {
3495 *****************************************************************************/ 3778 *****************************************************************************/
3496 3779
3497struct iwl_rx_packet { 3780struct iwl_rx_packet {
3781 /*
3782 * The first 4 bytes of the RX frame header contain both the RX frame
3783 * size and some flags.
3784 * Bit fields:
3785 * 31: flag flush RB request
3786 * 30: flag ignore TC (terminal counter) request
3787 * 29: flag fast IRQ request
3788 * 28-14: Reserved
3789 * 13-00: RX frame size
3790 */
3498 __le32 len_n_flags; 3791 __le32 len_n_flags;
3499 struct iwl_cmd_header hdr; 3792 struct iwl_cmd_header hdr;
3500 union { 3793 union {
@@ -3514,6 +3807,8 @@ struct iwl_rx_packet {
3514 struct iwl_notif_statistics stats; 3807 struct iwl_notif_statistics stats;
3515 struct iwl_compressed_ba_resp compressed_ba; 3808 struct iwl_compressed_ba_resp compressed_ba;
3516 struct iwl_missed_beacon_notif missed_beacon; 3809 struct iwl_missed_beacon_notif missed_beacon;
3810 struct iwl_coex_medium_notification coex_medium_notif;
3811 struct iwl_coex_event_resp coex_event;
3517 __le32 status; 3812 __le32 status;
3518 u8 raw[0]; 3813 u8 raw[0];
3519 } u; 3814 } u;
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 2dc928755454..049b652bcb5e 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * GPL LICENSE SUMMARY 3 * GPL LICENSE SUMMARY
4 * 4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as 8 * it under the terms of version 2 of the GNU General Public License as
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/etherdevice.h> 31#include <linux/etherdevice.h>
32#include <linux/sched.h> 32#include <linux/sched.h>
33#include <linux/slab.h>
33#include <net/mac80211.h> 34#include <net/mac80211.h>
34 35
35#include "iwl-eeprom.h" 36#include "iwl-eeprom.h"
@@ -47,6 +48,57 @@ MODULE_VERSION(IWLWIFI_VERSION);
47MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
48MODULE_LICENSE("GPL"); 49MODULE_LICENSE("GPL");
49 50
51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist\n");
70
71static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
72 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
73 0, COEX_UNASSOC_IDLE_FLAGS},
74 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
75 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
76 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
77 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
78 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
79 0, COEX_CALIBRATION_FLAGS},
80 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
81 0, COEX_PERIODIC_CALIBRATION_FLAGS},
82 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
83 0, COEX_CONNECTION_ESTAB_FLAGS},
84 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
85 0, COEX_ASSOCIATED_IDLE_FLAGS},
86 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
87 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
88 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
89 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
90 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
91 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
92 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
93 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
94 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
95 0, COEX_STAND_ALONE_DEBUG_FLAGS},
96 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
97 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
98 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
99 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
100};
101
50#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \ 102#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
51 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \ 103 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
52 IWL_RATE_SISO_##s##M_PLCP, \ 104 IWL_RATE_SISO_##s##M_PLCP, \
@@ -178,6 +230,7 @@ u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
178 } 230 }
179 return ant; 231 return ant;
180} 232}
233EXPORT_SYMBOL(iwl_toggle_tx_ant);
181 234
182const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }; 235const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
183EXPORT_SYMBOL(iwl_bcast_addr); 236EXPORT_SYMBOL(iwl_bcast_addr);
@@ -224,7 +277,10 @@ int iwl_hw_nic_init(struct iwl_priv *priv)
224 /* nic_init */ 277 /* nic_init */
225 spin_lock_irqsave(&priv->lock, flags); 278 spin_lock_irqsave(&priv->lock, flags);
226 priv->cfg->ops->lib->apm_ops.init(priv); 279 priv->cfg->ops->lib->apm_ops.init(priv);
227 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32); 280
281 /* Set interrupt coalescing calibration timer to default (512 usecs) */
282 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_CALIB_TIMEOUT_DEF);
283
228 spin_unlock_irqrestore(&priv->lock, flags); 284 spin_unlock_irqrestore(&priv->lock, flags);
229 285
230 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN); 286 ret = priv->cfg->ops->lib->apm_ops.set_pwr_src(priv, IWL_PWR_SRC_VMAIN);
@@ -252,10 +308,13 @@ int iwl_hw_nic_init(struct iwl_priv *priv)
252 308
253 spin_unlock_irqrestore(&priv->lock, flags); 309 spin_unlock_irqrestore(&priv->lock, flags);
254 310
255 /* Allocate and init all Tx and Command queues */ 311 /* Allocate or reset and init all Tx and Command queues */
256 ret = iwl_txq_ctx_reset(priv); 312 if (!priv->txq) {
257 if (ret) 313 ret = iwl_txq_ctx_alloc(priv);
258 return ret; 314 if (ret)
315 return ret;
316 } else
317 iwl_txq_ctx_reset(priv);
259 318
260 set_bit(STATUS_INIT, &priv->status); 319 set_bit(STATUS_INIT, &priv->status);
261 320
@@ -415,9 +474,6 @@ static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
415 if (priv->cfg->ht_greenfield_support) 474 if (priv->cfg->ht_greenfield_support)
416 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD; 475 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
417 ht_info->cap |= IEEE80211_HT_CAP_SGI_20; 476 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
418 ht_info->cap |= (IEEE80211_HT_CAP_SM_PS &
419 (WLAN_HT_CAP_SM_PS_DISABLED << 2));
420
421 max_bit_rate = MAX_BIT_RATE_20_MHZ; 477 max_bit_rate = MAX_BIT_RATE_20_MHZ;
422 if (priv->hw_params.ht40_channel & BIT(band)) { 478 if (priv->hw_params.ht40_channel & BIT(band)) {
423 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40; 479 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
@@ -452,28 +508,6 @@ static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
452 } 508 }
453} 509}
454 510
455static void iwlcore_init_hw_rates(struct iwl_priv *priv,
456 struct ieee80211_rate *rates)
457{
458 int i;
459
460 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
461 rates[i].bitrate = iwl_rates[i].ieee * 5;
462 rates[i].hw_value = i; /* Rate scaling will work on indexes */
463 rates[i].hw_value_short = i;
464 rates[i].flags = 0;
465 if ((i >= IWL_FIRST_CCK_RATE) && (i <= IWL_LAST_CCK_RATE)) {
466 /*
467 * If CCK != 1M then set short preamble rate flag.
468 */
469 rates[i].flags |=
470 (iwl_rates[i].plcp == IWL_RATE_1M_PLCP) ?
471 0 : IEEE80211_RATE_SHORT_PREAMBLE;
472 }
473 }
474}
475
476
477/** 511/**
478 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom 512 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
479 */ 513 */
@@ -605,11 +639,27 @@ void iwlcore_free_geos(struct iwl_priv *priv)
605} 639}
606EXPORT_SYMBOL(iwlcore_free_geos); 640EXPORT_SYMBOL(iwlcore_free_geos);
607 641
642/*
643 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
644 * function.
645 */
646void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
647 __le32 *tx_flags)
648{
649 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
650 *tx_flags |= TX_CMD_FLG_RTS_MSK;
651 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
652 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
653 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
654 *tx_flags |= TX_CMD_FLG_CTS_MSK;
655 }
656}
657EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
658
608static bool is_single_rx_stream(struct iwl_priv *priv) 659static bool is_single_rx_stream(struct iwl_priv *priv)
609{ 660{
610 return !priv->current_ht_config.is_ht || 661 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
611 ((priv->current_ht_config.mcs.rx_mask[1] == 0) && 662 priv->current_ht_config.single_chain_sufficient;
612 (priv->current_ht_config.mcs.rx_mask[2] == 0));
613} 663}
614 664
615static u8 iwl_is_channel_extension(struct iwl_priv *priv, 665static u8 iwl_is_channel_extension(struct iwl_priv *priv,
@@ -635,10 +685,9 @@ static u8 iwl_is_channel_extension(struct iwl_priv *priv,
635u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv, 685u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
636 struct ieee80211_sta_ht_cap *sta_ht_inf) 686 struct ieee80211_sta_ht_cap *sta_ht_inf)
637{ 687{
638 struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config; 688 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
639 689
640 if ((!iwl_ht_conf->is_ht) || 690 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
641 (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ))
642 return 0; 691 return 0;
643 692
644 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40 693 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
@@ -654,7 +703,7 @@ u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
654#endif 703#endif
655 return iwl_is_channel_extension(priv, priv->band, 704 return iwl_is_channel_extension(priv, priv->band,
656 le16_to_cpu(priv->staging_rxon.channel), 705 le16_to_cpu(priv->staging_rxon.channel),
657 iwl_ht_conf->extension_chan_offset); 706 ht_conf->extension_chan_offset);
658} 707}
659EXPORT_SYMBOL(iwl_is_ht40_tx_allowed); 708EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
660 709
@@ -878,11 +927,11 @@ u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
878} 927}
879EXPORT_SYMBOL(iwl_rate_get_lowest_plcp); 928EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
880 929
881void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info) 930void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
882{ 931{
883 struct iwl_rxon_cmd *rxon = &priv->staging_rxon; 932 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
884 933
885 if (!ht_info->is_ht) { 934 if (!ht_conf->is_ht) {
886 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK | 935 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
887 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | 936 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
888 RXON_FLG_HT40_PROT_MSK | 937 RXON_FLG_HT40_PROT_MSK |
@@ -893,7 +942,7 @@ void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
893 /* FIXME: if the definition of ht_protection changed, the "translation" 942 /* FIXME: if the definition of ht_protection changed, the "translation"
894 * will be needed for rxon->flags 943 * will be needed for rxon->flags
895 */ 944 */
896 rxon->flags |= cpu_to_le32(ht_info->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS); 945 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
897 946
898 /* Set up channel bandwidth: 947 /* Set up channel bandwidth:
899 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */ 948 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
@@ -902,10 +951,10 @@ void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
902 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); 951 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
903 if (iwl_is_ht40_tx_allowed(priv, NULL)) { 952 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
904 /* pure ht40 */ 953 /* pure ht40 */
905 if (ht_info->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) { 954 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
906 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40; 955 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
907 /* Note: control channel is opposite of extension channel */ 956 /* Note: control channel is opposite of extension channel */
908 switch (ht_info->extension_chan_offset) { 957 switch (ht_conf->extension_chan_offset) {
909 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: 958 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
910 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK; 959 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
911 break; 960 break;
@@ -915,7 +964,7 @@ void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
915 } 964 }
916 } else { 965 } else {
917 /* Note: control channel is opposite of extension channel */ 966 /* Note: control channel is opposite of extension channel */
918 switch (ht_info->extension_chan_offset) { 967 switch (ht_conf->extension_chan_offset) {
919 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE: 968 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
920 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK); 969 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
921 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED; 970 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
@@ -938,14 +987,10 @@ void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
938 if (priv->cfg->ops->hcmd->set_rxon_chain) 987 if (priv->cfg->ops->hcmd->set_rxon_chain)
939 priv->cfg->ops->hcmd->set_rxon_chain(priv); 988 priv->cfg->ops->hcmd->set_rxon_chain(priv);
940 989
941 IWL_DEBUG_ASSOC(priv, "supported HT rate 0x%X 0x%X 0x%X " 990 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
942 "rxon flags 0x%X operation mode :0x%X "
943 "extension channel offset 0x%x\n", 991 "extension channel offset 0x%x\n",
944 ht_info->mcs.rx_mask[0], 992 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
945 ht_info->mcs.rx_mask[1], 993 ht_conf->extension_chan_offset);
946 ht_info->mcs.rx_mask[2],
947 le32_to_cpu(rxon->flags), ht_info->ht_protection,
948 ht_info->extension_chan_offset);
949 return; 994 return;
950} 995}
951EXPORT_SYMBOL(iwl_set_rxon_ht); 996EXPORT_SYMBOL(iwl_set_rxon_ht);
@@ -955,47 +1000,43 @@ EXPORT_SYMBOL(iwl_set_rxon_ht);
955#define IWL_NUM_IDLE_CHAINS_DUAL 2 1000#define IWL_NUM_IDLE_CHAINS_DUAL 2
956#define IWL_NUM_IDLE_CHAINS_SINGLE 1 1001#define IWL_NUM_IDLE_CHAINS_SINGLE 1
957 1002
958/* Determine how many receiver/antenna chains to use. 1003/*
959 * More provides better reception via diversity. Fewer saves power. 1004 * Determine how many receiver/antenna chains to use.
1005 *
1006 * More provides better reception via diversity. Fewer saves power
1007 * at the expense of throughput, but only when not in powersave to
1008 * start with.
1009 *
960 * MIMO (dual stream) requires at least 2, but works better with 3. 1010 * MIMO (dual stream) requires at least 2, but works better with 3.
961 * This does not determine *which* chains to use, just how many. 1011 * This does not determine *which* chains to use, just how many.
962 */ 1012 */
963static int iwl_get_active_rx_chain_count(struct iwl_priv *priv) 1013static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
964{ 1014{
965 bool is_single = is_single_rx_stream(priv);
966 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
967
968 /* # of Rx chains to use when expecting MIMO. */ 1015 /* # of Rx chains to use when expecting MIMO. */
969 if (is_single || (!is_cam && (priv->current_ht_config.sm_ps == 1016 if (is_single_rx_stream(priv))
970 WLAN_HT_CAP_SM_PS_STATIC)))
971 return IWL_NUM_RX_CHAINS_SINGLE; 1017 return IWL_NUM_RX_CHAINS_SINGLE;
972 else 1018 else
973 return IWL_NUM_RX_CHAINS_MULTIPLE; 1019 return IWL_NUM_RX_CHAINS_MULTIPLE;
974} 1020}
975 1021
1022/*
1023 * When we are in power saving mode, unless device support spatial
1024 * multiplexing power save, use the active count for rx chain count.
1025 */
976static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt) 1026static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
977{ 1027{
978 int idle_cnt; 1028 /* # Rx chains when idling, depending on SMPS mode */
979 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status); 1029 switch (priv->current_ht_config.smps) {
980 /* # Rx chains when idling and maybe trying to save power */ 1030 case IEEE80211_SMPS_STATIC:
981 switch (priv->current_ht_config.sm_ps) { 1031 case IEEE80211_SMPS_DYNAMIC:
982 case WLAN_HT_CAP_SM_PS_STATIC: 1032 return IWL_NUM_IDLE_CHAINS_SINGLE;
983 case WLAN_HT_CAP_SM_PS_DYNAMIC: 1033 case IEEE80211_SMPS_OFF:
984 idle_cnt = (is_cam) ? IWL_NUM_IDLE_CHAINS_DUAL : 1034 return active_cnt;
985 IWL_NUM_IDLE_CHAINS_SINGLE;
986 break;
987 case WLAN_HT_CAP_SM_PS_DISABLED:
988 idle_cnt = (is_cam) ? active_cnt : IWL_NUM_IDLE_CHAINS_SINGLE;
989 break;
990 case WLAN_HT_CAP_SM_PS_INVALID:
991 default: 1035 default:
992 IWL_ERR(priv, "invalid mimo ps mode %d\n", 1036 WARN(1, "invalid SMPS mode %d",
993 priv->current_ht_config.sm_ps); 1037 priv->current_ht_config.smps);
994 WARN_ON(1); 1038 return active_cnt;
995 idle_cnt = -1;
996 break;
997 } 1039 }
998 return idle_cnt;
999} 1040}
1000 1041
1001/* up to 4 chains */ 1042/* up to 4 chains */
@@ -1005,7 +1046,7 @@ static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
1005 res = (chain_bitmap & BIT(0)) >> 0; 1046 res = (chain_bitmap & BIT(0)) >> 0;
1006 res += (chain_bitmap & BIT(1)) >> 1; 1047 res += (chain_bitmap & BIT(1)) >> 1;
1007 res += (chain_bitmap & BIT(2)) >> 2; 1048 res += (chain_bitmap & BIT(2)) >> 2;
1008 res += (chain_bitmap & BIT(4)) >> 4; 1049 res += (chain_bitmap & BIT(3)) >> 3;
1009 return res; 1050 return res;
1010} 1051}
1011 1052
@@ -1281,18 +1322,28 @@ static void iwl_set_rate(struct iwl_priv *priv)
1281 1322
1282void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 1323void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1283{ 1324{
1284 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1325 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1285 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon; 1326 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1286 struct iwl_csa_notification *csa = &(pkt->u.csa_notif); 1327 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
1287 IWL_DEBUG_11H(priv, "CSA notif: channel %d, status %d\n", 1328
1288 le16_to_cpu(csa->channel), le32_to_cpu(csa->status)); 1329 if (priv->switch_rxon.switch_in_progress) {
1289 rxon->channel = csa->channel; 1330 if (!le32_to_cpu(csa->status) &&
1290 priv->staging_rxon.channel = csa->channel; 1331 (csa->channel == priv->switch_rxon.channel)) {
1332 rxon->channel = csa->channel;
1333 priv->staging_rxon.channel = csa->channel;
1334 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1335 le16_to_cpu(csa->channel));
1336 } else
1337 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1338 le16_to_cpu(csa->channel));
1339
1340 priv->switch_rxon.switch_in_progress = false;
1341 }
1291} 1342}
1292EXPORT_SYMBOL(iwl_rx_csa); 1343EXPORT_SYMBOL(iwl_rx_csa);
1293 1344
1294#ifdef CONFIG_IWLWIFI_DEBUG 1345#ifdef CONFIG_IWLWIFI_DEBUG
1295static void iwl_print_rx_config_cmd(struct iwl_priv *priv) 1346void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1296{ 1347{
1297 struct iwl_rxon_cmd *rxon = &priv->staging_rxon; 1348 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1298 1349
@@ -1310,6 +1361,7 @@ static void iwl_print_rx_config_cmd(struct iwl_priv *priv)
1310 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr); 1361 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1311 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id)); 1362 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
1312} 1363}
1364EXPORT_SYMBOL(iwl_print_rx_config_cmd);
1313#endif 1365#endif
1314/** 1366/**
1315 * iwl_irq_handle_error - called for HW or SW error interrupt from card 1367 * iwl_irq_handle_error - called for HW or SW error interrupt from card
@@ -1322,12 +1374,15 @@ void iwl_irq_handle_error(struct iwl_priv *priv)
1322 /* Cancel currently queued command. */ 1374 /* Cancel currently queued command. */
1323 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 1375 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1324 1376
1377 priv->cfg->ops->lib->dump_nic_error_log(priv);
1378 if (priv->cfg->ops->lib->dump_csr)
1379 priv->cfg->ops->lib->dump_csr(priv);
1380 if (priv->cfg->ops->lib->dump_fh)
1381 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
1382 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
1325#ifdef CONFIG_IWLWIFI_DEBUG 1383#ifdef CONFIG_IWLWIFI_DEBUG
1326 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) { 1384 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
1327 priv->cfg->ops->lib->dump_nic_error_log(priv);
1328 priv->cfg->ops->lib->dump_nic_event_log(priv);
1329 iwl_print_rx_config_cmd(priv); 1385 iwl_print_rx_config_cmd(priv);
1330 }
1331#endif 1386#endif
1332 1387
1333 wake_up_interruptible(&priv->wait_command_queue); 1388 wake_up_interruptible(&priv->wait_command_queue);
@@ -1346,6 +1401,160 @@ void iwl_irq_handle_error(struct iwl_priv *priv)
1346} 1401}
1347EXPORT_SYMBOL(iwl_irq_handle_error); 1402EXPORT_SYMBOL(iwl_irq_handle_error);
1348 1403
1404int iwl_apm_stop_master(struct iwl_priv *priv)
1405{
1406 int ret = 0;
1407
1408 /* stop device's busmaster DMA activity */
1409 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1410
1411 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
1412 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1413 if (ret)
1414 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
1415
1416 IWL_DEBUG_INFO(priv, "stop master\n");
1417
1418 return ret;
1419}
1420EXPORT_SYMBOL(iwl_apm_stop_master);
1421
1422void iwl_apm_stop(struct iwl_priv *priv)
1423{
1424 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1425
1426 /* Stop device's DMA activity */
1427 iwl_apm_stop_master(priv);
1428
1429 /* Reset the entire device */
1430 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1431
1432 udelay(10);
1433
1434 /*
1435 * Clear "initialization complete" bit to move adapter from
1436 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1437 */
1438 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1439}
1440EXPORT_SYMBOL(iwl_apm_stop);
1441
1442
1443/*
1444 * Start up NIC's basic functionality after it has been reset
1445 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1446 * NOTE: This does not load uCode nor start the embedded processor
1447 */
1448int iwl_apm_init(struct iwl_priv *priv)
1449{
1450 int ret = 0;
1451 u16 lctl;
1452
1453 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1454
1455 /*
1456 * Use "set_bit" below rather than "write", to preserve any hardware
1457 * bits already set by default after reset.
1458 */
1459
1460 /* Disable L0S exit timer (platform NMI Work/Around) */
1461 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1462 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1463
1464 /*
1465 * Disable L0s without affecting L1;
1466 * don't wait for ICH L0s (ICH bug W/A)
1467 */
1468 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1469 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1470
1471 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1472 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1473
1474 /*
1475 * Enable HAP INTA (interrupt from management bus) to
1476 * wake device's PCI Express link L1a -> L0s
1477 * NOTE: This is no-op for 3945 (non-existant bit)
1478 */
1479 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1480 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1481
1482 /*
1483 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1484 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1485 * If so (likely), disable L0S, so device moves directly L0->L1;
1486 * costs negligible amount of power savings.
1487 * If not (unlikely), enable L0S, so there is at least some
1488 * power savings, even without L1.
1489 */
1490 if (priv->cfg->set_l0s) {
1491 lctl = iwl_pcie_link_ctl(priv);
1492 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1493 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1494 /* L1-ASPM enabled; disable(!) L0S */
1495 iwl_set_bit(priv, CSR_GIO_REG,
1496 CSR_GIO_REG_VAL_L0S_ENABLED);
1497 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1498 } else {
1499 /* L1-ASPM disabled; enable(!) L0S */
1500 iwl_clear_bit(priv, CSR_GIO_REG,
1501 CSR_GIO_REG_VAL_L0S_ENABLED);
1502 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1503 }
1504 }
1505
1506 /* Configure analog phase-lock-loop before activating to D0A */
1507 if (priv->cfg->pll_cfg_val)
1508 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1509
1510 /*
1511 * Set "initialization complete" bit to move adapter from
1512 * D0U* --> D0A* (powered-up active) state.
1513 */
1514 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1515
1516 /*
1517 * Wait for clock stabilization; once stabilized, access to
1518 * device-internal resources is supported, e.g. iwl_write_prph()
1519 * and accesses to uCode SRAM.
1520 */
1521 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1522 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1523 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1524 if (ret < 0) {
1525 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1526 goto out;
1527 }
1528
1529 /*
1530 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1531 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1532 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1533 * and don't need BSM to restore data after power-saving sleep.
1534 *
1535 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1536 * do not disable clocks. This preserves any hardware bits already
1537 * set by default in "CLK_CTRL_REG" after reset.
1538 */
1539 if (priv->cfg->use_bsm)
1540 iwl_write_prph(priv, APMG_CLK_EN_REG,
1541 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1542 else
1543 iwl_write_prph(priv, APMG_CLK_EN_REG,
1544 APMG_CLK_VAL_DMA_CLK_RQT);
1545 udelay(20);
1546
1547 /* Disable L1-Active */
1548 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1549 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1550
1551out:
1552 return ret;
1553}
1554EXPORT_SYMBOL(iwl_apm_init);
1555
1556
1557
1349void iwl_configure_filter(struct ieee80211_hw *hw, 1558void iwl_configure_filter(struct ieee80211_hw *hw,
1350 unsigned int changed_flags, 1559 unsigned int changed_flags,
1351 unsigned int *total_flags, 1560 unsigned int *total_flags,
@@ -1393,73 +1602,14 @@ void iwl_configure_filter(struct ieee80211_hw *hw,
1393} 1602}
1394EXPORT_SYMBOL(iwl_configure_filter); 1603EXPORT_SYMBOL(iwl_configure_filter);
1395 1604
1396int iwl_setup_mac(struct iwl_priv *priv)
1397{
1398 int ret;
1399 struct ieee80211_hw *hw = priv->hw;
1400 hw->rate_control_algorithm = "iwl-agn-rs";
1401
1402 /* Tell mac80211 our characteristics */
1403 hw->flags = IEEE80211_HW_SIGNAL_DBM |
1404 IEEE80211_HW_NOISE_DBM |
1405 IEEE80211_HW_AMPDU_AGGREGATION |
1406 IEEE80211_HW_SPECTRUM_MGMT;
1407
1408 if (!priv->cfg->broken_powersave)
1409 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
1410 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
1411
1412 hw->wiphy->interface_modes =
1413 BIT(NL80211_IFTYPE_STATION) |
1414 BIT(NL80211_IFTYPE_ADHOC);
1415
1416 hw->wiphy->custom_regulatory = true;
1417
1418 /* Firmware does not support this */
1419 hw->wiphy->disable_beacon_hints = true;
1420
1421 /*
1422 * For now, disable PS by default because it affects
1423 * RX performance significantly.
1424 */
1425 hw->wiphy->ps_default = false;
1426
1427 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1428 /* we create the 802.11 header and a zero-length SSID element */
1429 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
1430
1431 /* Default value; 4 EDCA QOS priorities */
1432 hw->queues = 4;
1433
1434 hw->max_listen_interval = IWL_CONN_MAX_LISTEN_INTERVAL;
1435
1436 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
1437 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
1438 &priv->bands[IEEE80211_BAND_2GHZ];
1439 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
1440 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1441 &priv->bands[IEEE80211_BAND_5GHZ];
1442
1443 ret = ieee80211_register_hw(priv->hw);
1444 if (ret) {
1445 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
1446 return ret;
1447 }
1448 priv->mac80211_registered = 1;
1449
1450 return 0;
1451}
1452EXPORT_SYMBOL(iwl_setup_mac);
1453
1454int iwl_set_hw_params(struct iwl_priv *priv) 1605int iwl_set_hw_params(struct iwl_priv *priv)
1455{ 1606{
1456 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; 1607 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1457 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; 1608 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1458 if (priv->cfg->mod_params->amsdu_size_8K) 1609 if (priv->cfg->mod_params->amsdu_size_8K)
1459 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K; 1610 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
1460 else 1611 else
1461 priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K; 1612 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
1462 priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
1463 1613
1464 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL; 1614 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1465 1615
@@ -1471,71 +1621,6 @@ int iwl_set_hw_params(struct iwl_priv *priv)
1471} 1621}
1472EXPORT_SYMBOL(iwl_set_hw_params); 1622EXPORT_SYMBOL(iwl_set_hw_params);
1473 1623
1474int iwl_init_drv(struct iwl_priv *priv)
1475{
1476 int ret;
1477
1478 priv->ibss_beacon = NULL;
1479
1480 spin_lock_init(&priv->lock);
1481 spin_lock_init(&priv->sta_lock);
1482 spin_lock_init(&priv->hcmd_lock);
1483
1484 INIT_LIST_HEAD(&priv->free_frames);
1485
1486 mutex_init(&priv->mutex);
1487
1488 /* Clear the driver's (not device's) station table */
1489 iwl_clear_stations_table(priv);
1490
1491 priv->data_retry_limit = -1;
1492 priv->ieee_channels = NULL;
1493 priv->ieee_rates = NULL;
1494 priv->band = IEEE80211_BAND_2GHZ;
1495
1496 priv->iw_mode = NL80211_IFTYPE_STATION;
1497
1498 priv->current_ht_config.sm_ps = WLAN_HT_CAP_SM_PS_DISABLED;
1499
1500 /* Choose which receivers/antennas to use */
1501 if (priv->cfg->ops->hcmd->set_rxon_chain)
1502 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1503
1504 iwl_init_scan_params(priv);
1505
1506 iwl_reset_qos(priv);
1507
1508 priv->qos_data.qos_active = 0;
1509 priv->qos_data.qos_cap.val = 0;
1510
1511 priv->rates_mask = IWL_RATES_MASK;
1512 /* Set the tx_power_user_lmt to the lowest power level
1513 * this value will get overwritten by channel max power avg
1514 * from eeprom */
1515 priv->tx_power_user_lmt = IWL_TX_POWER_TARGET_POWER_MIN;
1516
1517 ret = iwl_init_channel_map(priv);
1518 if (ret) {
1519 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
1520 goto err;
1521 }
1522
1523 ret = iwlcore_init_geos(priv);
1524 if (ret) {
1525 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
1526 goto err_free_channel_map;
1527 }
1528 iwlcore_init_hw_rates(priv, priv->ieee_rates);
1529
1530 return 0;
1531
1532err_free_channel_map:
1533 iwl_free_channel_map(priv);
1534err:
1535 return ret;
1536}
1537EXPORT_SYMBOL(iwl_init_drv);
1538
1539int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force) 1624int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1540{ 1625{
1541 int ret = 0; 1626 int ret = 0;
@@ -1583,24 +1668,15 @@ int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1583} 1668}
1584EXPORT_SYMBOL(iwl_set_tx_power); 1669EXPORT_SYMBOL(iwl_set_tx_power);
1585 1670
1586void iwl_uninit_drv(struct iwl_priv *priv)
1587{
1588 iwl_calib_free_results(priv);
1589 iwlcore_free_geos(priv);
1590 iwl_free_channel_map(priv);
1591 kfree(priv->scan);
1592}
1593EXPORT_SYMBOL(iwl_uninit_drv);
1594
1595#define ICT_COUNT (PAGE_SIZE/sizeof(u32)) 1671#define ICT_COUNT (PAGE_SIZE/sizeof(u32))
1596 1672
1597/* Free dram table */ 1673/* Free dram table */
1598void iwl_free_isr_ict(struct iwl_priv *priv) 1674void iwl_free_isr_ict(struct iwl_priv *priv)
1599{ 1675{
1600 if (priv->ict_tbl_vir) { 1676 if (priv->ict_tbl_vir) {
1601 pci_free_consistent(priv->pci_dev, (sizeof(u32) * ICT_COUNT) + 1677 dma_free_coherent(&priv->pci_dev->dev,
1602 PAGE_SIZE, priv->ict_tbl_vir, 1678 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
1603 priv->ict_tbl_dma); 1679 priv->ict_tbl_vir, priv->ict_tbl_dma);
1604 priv->ict_tbl_vir = NULL; 1680 priv->ict_tbl_vir = NULL;
1605 } 1681 }
1606} 1682}
@@ -1616,9 +1692,9 @@ int iwl_alloc_isr_ict(struct iwl_priv *priv)
1616 if (priv->cfg->use_isr_legacy) 1692 if (priv->cfg->use_isr_legacy)
1617 return 0; 1693 return 0;
1618 /* allocate shrared data table */ 1694 /* allocate shrared data table */
1619 priv->ict_tbl_vir = pci_alloc_consistent(priv->pci_dev, (sizeof(u32) * 1695 priv->ict_tbl_vir = dma_alloc_coherent(&priv->pci_dev->dev,
1620 ICT_COUNT) + PAGE_SIZE, 1696 (sizeof(u32) * ICT_COUNT) + PAGE_SIZE,
1621 &priv->ict_tbl_dma); 1697 &priv->ict_tbl_dma, GFP_KERNEL);
1622 if (!priv->ict_tbl_vir) 1698 if (!priv->ict_tbl_vir)
1623 return -ENOMEM; 1699 return -ENOMEM;
1624 1700
@@ -1753,6 +1829,16 @@ irqreturn_t iwl_isr_ict(int irq, void *data)
1753 if (val == 0xffffffff) 1829 if (val == 0xffffffff)
1754 val = 0; 1830 val = 0;
1755 1831
1832 /*
1833 * this is a w/a for a h/w bug. the h/w bug may cause the Rx bit
1834 * (bit 15 before shifting it to 31) to clear when using interrupt
1835 * coalescing. fortunately, bits 18 and 19 stay set when this happens
1836 * so we use them to decide on the real state of the Rx bit.
1837 * In order words, bit 15 is set if bit 18 or bit 19 are set.
1838 */
1839 if (val & 0xC0000)
1840 val |= 0x8000;
1841
1756 inta = (0xff & val) | ((0xff00 & val) << 16); 1842 inta = (0xff & val) | ((0xff00 & val) << 16);
1757 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n", 1843 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x ict 0x%08x\n",
1758 inta, inta_mask, val); 1844 inta, inta_mask, val);
@@ -1915,28 +2001,40 @@ EXPORT_SYMBOL(iwl_isr_legacy);
1915int iwl_send_bt_config(struct iwl_priv *priv) 2001int iwl_send_bt_config(struct iwl_priv *priv)
1916{ 2002{
1917 struct iwl_bt_cmd bt_cmd = { 2003 struct iwl_bt_cmd bt_cmd = {
1918 .flags = 3, 2004 .lead_time = BT_LEAD_TIME_DEF,
1919 .lead_time = 0xAA, 2005 .max_kill = BT_MAX_KILL_DEF,
1920 .max_kill = 1,
1921 .kill_ack_mask = 0, 2006 .kill_ack_mask = 0,
1922 .kill_cts_mask = 0, 2007 .kill_cts_mask = 0,
1923 }; 2008 };
1924 2009
2010 if (!bt_coex_active)
2011 bt_cmd.flags = BT_COEX_DISABLE;
2012 else
2013 bt_cmd.flags = BT_COEX_ENABLE;
2014
2015 IWL_DEBUG_INFO(priv, "BT coex %s\n",
2016 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
2017
1925 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG, 2018 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1926 sizeof(struct iwl_bt_cmd), &bt_cmd); 2019 sizeof(struct iwl_bt_cmd), &bt_cmd);
1927} 2020}
1928EXPORT_SYMBOL(iwl_send_bt_config); 2021EXPORT_SYMBOL(iwl_send_bt_config);
1929 2022
1930int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags) 2023int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
1931{ 2024{
1932 u32 stat_flags = 0; 2025 struct iwl_statistics_cmd statistics_cmd = {
1933 struct iwl_host_cmd cmd = { 2026 .configuration_flags =
1934 .id = REPLY_STATISTICS_CMD, 2027 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
1935 .flags = flags,
1936 .len = sizeof(stat_flags),
1937 .data = (u8 *) &stat_flags,
1938 }; 2028 };
1939 return iwl_send_cmd(priv, &cmd); 2029
2030 if (flags & CMD_ASYNC)
2031 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
2032 sizeof(struct iwl_statistics_cmd),
2033 &statistics_cmd, NULL);
2034 else
2035 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
2036 sizeof(struct iwl_statistics_cmd),
2037 &statistics_cmd);
1940} 2038}
1941EXPORT_SYMBOL(iwl_send_statistics_request); 2039EXPORT_SYMBOL(iwl_send_statistics_request);
1942 2040
@@ -2077,10 +2175,7 @@ void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2077 spin_unlock_irqrestore(&priv->lock, flags); 2175 spin_unlock_irqrestore(&priv->lock, flags);
2078 priv->thermal_throttle.ct_kill_toggle = false; 2176 priv->thermal_throttle.ct_kill_toggle = false;
2079 2177
2080 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { 2178 if (priv->cfg->support_ct_kill_exit) {
2081 case CSR_HW_REV_TYPE_1000:
2082 case CSR_HW_REV_TYPE_6x00:
2083 case CSR_HW_REV_TYPE_6x50:
2084 adv_cmd.critical_temperature_enter = 2179 adv_cmd.critical_temperature_enter =
2085 cpu_to_le32(priv->hw_params.ct_kill_threshold); 2180 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2086 adv_cmd.critical_temperature_exit = 2181 adv_cmd.critical_temperature_exit =
@@ -2097,8 +2192,7 @@ void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2097 "exit is %d\n", 2192 "exit is %d\n",
2098 priv->hw_params.ct_kill_threshold, 2193 priv->hw_params.ct_kill_threshold,
2099 priv->hw_params.ct_kill_exit_threshold); 2194 priv->hw_params.ct_kill_exit_threshold);
2100 break; 2195 } else {
2101 default:
2102 cmd.critical_temperature_R = 2196 cmd.critical_temperature_R =
2103 cpu_to_le32(priv->hw_params.ct_kill_threshold); 2197 cpu_to_le32(priv->hw_params.ct_kill_threshold);
2104 2198
@@ -2111,7 +2205,6 @@ void iwl_rf_kill_ct_config(struct iwl_priv *priv)
2111 "succeeded, " 2205 "succeeded, "
2112 "critical temperature is %d\n", 2206 "critical temperature is %d\n",
2113 priv->hw_params.ct_kill_threshold); 2207 priv->hw_params.ct_kill_threshold);
2114 break;
2115 } 2208 }
2116} 2209}
2117EXPORT_SYMBOL(iwl_rf_kill_ct_config); 2210EXPORT_SYMBOL(iwl_rf_kill_ct_config);
@@ -2143,7 +2236,7 @@ void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
2143 struct iwl_rx_mem_buffer *rxb) 2236 struct iwl_rx_mem_buffer *rxb)
2144{ 2237{
2145#ifdef CONFIG_IWLWIFI_DEBUG 2238#ifdef CONFIG_IWLWIFI_DEBUG
2146 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 2239 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2147 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif); 2240 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
2148 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n", 2241 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
2149 sleep->pm_sleep_mode, sleep->pm_wakeup_src); 2242 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
@@ -2154,7 +2247,7 @@ EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
2154void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv, 2247void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
2155 struct iwl_rx_mem_buffer *rxb) 2248 struct iwl_rx_mem_buffer *rxb)
2156{ 2249{
2157 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 2250 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2158 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; 2251 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
2159 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled " 2252 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
2160 "notification for %s:\n", len, 2253 "notification for %s:\n", len,
@@ -2166,7 +2259,7 @@ EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
2166void iwl_rx_reply_error(struct iwl_priv *priv, 2259void iwl_rx_reply_error(struct iwl_priv *priv,
2167 struct iwl_rx_mem_buffer *rxb) 2260 struct iwl_rx_mem_buffer *rxb)
2168{ 2261{
2169 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 2262 struct iwl_rx_packet *pkt = rxb_addr(rxb);
2170 2263
2171 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) " 2264 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
2172 "seq 0x%04X ser 0x%08X\n", 2265 "seq 0x%04X ser 0x%08X\n",
@@ -2228,46 +2321,77 @@ int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
2228EXPORT_SYMBOL(iwl_mac_conf_tx); 2321EXPORT_SYMBOL(iwl_mac_conf_tx);
2229 2322
2230static void iwl_ht_conf(struct iwl_priv *priv, 2323static void iwl_ht_conf(struct iwl_priv *priv,
2231 struct ieee80211_bss_conf *bss_conf) 2324 struct ieee80211_bss_conf *bss_conf)
2232{ 2325{
2233 struct ieee80211_sta_ht_cap *ht_conf; 2326 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2234 struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
2235 struct ieee80211_sta *sta; 2327 struct ieee80211_sta *sta;
2236 2328
2237 IWL_DEBUG_MAC80211(priv, "enter: \n"); 2329 IWL_DEBUG_MAC80211(priv, "enter: \n");
2238 2330
2239 if (!iwl_conf->is_ht) 2331 if (!ht_conf->is_ht)
2240 return; 2332 return;
2241 2333
2334 ht_conf->ht_protection =
2335 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2336 ht_conf->non_GF_STA_present =
2337 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2242 2338
2243 /* 2339 ht_conf->single_chain_sufficient = false;
2244 * It is totally wrong to base global information on something
2245 * that is valid only when associated, alas, this driver works
2246 * that way and I don't know how to fix it.
2247 */
2248 2340
2249 rcu_read_lock(); 2341 switch (priv->iw_mode) {
2250 sta = ieee80211_find_sta(priv->hw, priv->bssid); 2342 case NL80211_IFTYPE_STATION:
2251 if (!sta) { 2343 rcu_read_lock();
2344 sta = ieee80211_find_sta(priv->vif, priv->bssid);
2345 if (sta) {
2346 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
2347 int maxstreams;
2348
2349 maxstreams = (ht_cap->mcs.tx_params &
2350 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
2351 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
2352 maxstreams += 1;
2353
2354 if ((ht_cap->mcs.rx_mask[1] == 0) &&
2355 (ht_cap->mcs.rx_mask[2] == 0))
2356 ht_conf->single_chain_sufficient = true;
2357 if (maxstreams <= 1)
2358 ht_conf->single_chain_sufficient = true;
2359 } else {
2360 /*
2361 * If at all, this can only happen through a race
2362 * when the AP disconnects us while we're still
2363 * setting up the connection, in that case mac80211
2364 * will soon tell us about that.
2365 */
2366 ht_conf->single_chain_sufficient = true;
2367 }
2252 rcu_read_unlock(); 2368 rcu_read_unlock();
2253 return; 2369 break;
2370 case NL80211_IFTYPE_ADHOC:
2371 ht_conf->single_chain_sufficient = true;
2372 break;
2373 default:
2374 break;
2254 } 2375 }
2255 ht_conf = &sta->ht_cap;
2256
2257 iwl_conf->sm_ps = (u8)((ht_conf->cap & IEEE80211_HT_CAP_SM_PS) >> 2);
2258
2259 memcpy(&iwl_conf->mcs, &ht_conf->mcs, 16);
2260
2261 iwl_conf->ht_protection =
2262 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
2263 iwl_conf->non_GF_STA_present =
2264 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
2265
2266 rcu_read_unlock();
2267 2376
2268 IWL_DEBUG_MAC80211(priv, "leave\n"); 2377 IWL_DEBUG_MAC80211(priv, "leave\n");
2269} 2378}
2270 2379
2380static inline void iwl_set_no_assoc(struct iwl_priv *priv)
2381{
2382 priv->assoc_id = 0;
2383 iwl_led_disassociate(priv);
2384 /*
2385 * inform the ucode that there is no longer an
2386 * association and that no more packets should be
2387 * sent
2388 */
2389 priv->staging_rxon.filter_flags &=
2390 ~RXON_FILTER_ASSOC_MSK;
2391 priv->staging_rxon.assoc_id = 0;
2392 iwlcore_commit_rxon(priv);
2393}
2394
2271#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6) 2395#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
2272void iwl_bss_info_changed(struct ieee80211_hw *hw, 2396void iwl_bss_info_changed(struct ieee80211_hw *hw,
2273 struct ieee80211_vif *vif, 2397 struct ieee80211_vif *vif,
@@ -2387,6 +2511,8 @@ void iwl_bss_info_changed(struct ieee80211_hw *hw,
2387 priv->timestamp = bss_conf->timestamp; 2511 priv->timestamp = bss_conf->timestamp;
2388 priv->assoc_capability = bss_conf->assoc_capability; 2512 priv->assoc_capability = bss_conf->assoc_capability;
2389 2513
2514 iwl_led_associate(priv);
2515
2390 /* 2516 /*
2391 * We have just associated, don't start scan too early 2517 * We have just associated, don't start scan too early
2392 * leave time for EAPOL exchange to complete. 2518 * leave time for EAPOL exchange to complete.
@@ -2398,8 +2524,7 @@ void iwl_bss_info_changed(struct ieee80211_hw *hw,
2398 if (!iwl_is_rfkill(priv)) 2524 if (!iwl_is_rfkill(priv))
2399 priv->cfg->ops->lib->post_associate(priv); 2525 priv->cfg->ops->lib->post_associate(priv);
2400 } else 2526 } else
2401 priv->assoc_id = 0; 2527 iwl_set_no_assoc(priv);
2402
2403 } 2528 }
2404 2529
2405 if (changes && iwl_is_associated(priv) && priv->assoc_id) { 2530 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
@@ -2414,6 +2539,16 @@ void iwl_bss_info_changed(struct ieee80211_hw *hw,
2414 } 2539 }
2415 } 2540 }
2416 2541
2542 if (changes & BSS_CHANGED_BEACON_ENABLED) {
2543 if (vif->bss_conf.enable_beacon) {
2544 memcpy(priv->staging_rxon.bssid_addr,
2545 bss_conf->bssid, ETH_ALEN);
2546 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2547 iwlcore_config_ap(priv);
2548 } else
2549 iwl_set_no_assoc(priv);
2550 }
2551
2417 mutex_unlock(&priv->mutex); 2552 mutex_unlock(&priv->mutex);
2418 2553
2419 IWL_DEBUG_MAC80211(priv, "leave\n"); 2554 IWL_DEBUG_MAC80211(priv, "leave\n");
@@ -2497,44 +2632,43 @@ int iwl_set_mode(struct iwl_priv *priv, int mode)
2497EXPORT_SYMBOL(iwl_set_mode); 2632EXPORT_SYMBOL(iwl_set_mode);
2498 2633
2499int iwl_mac_add_interface(struct ieee80211_hw *hw, 2634int iwl_mac_add_interface(struct ieee80211_hw *hw,
2500 struct ieee80211_if_init_conf *conf) 2635 struct ieee80211_vif *vif)
2501{ 2636{
2502 struct iwl_priv *priv = hw->priv; 2637 struct iwl_priv *priv = hw->priv;
2503 unsigned long flags; 2638 int err = 0;
2639
2640 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
2504 2641
2505 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", conf->type); 2642 mutex_lock(&priv->mutex);
2506 2643
2507 if (priv->vif) { 2644 if (priv->vif) {
2508 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n"); 2645 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
2509 return -EOPNOTSUPP; 2646 err = -EOPNOTSUPP;
2647 goto out;
2510 } 2648 }
2511 2649
2512 spin_lock_irqsave(&priv->lock, flags); 2650 priv->vif = vif;
2513 priv->vif = conf->vif; 2651 priv->iw_mode = vif->type;
2514 priv->iw_mode = conf->type;
2515 2652
2516 spin_unlock_irqrestore(&priv->lock, flags); 2653 if (vif->addr) {
2517 2654 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2518 mutex_lock(&priv->mutex); 2655 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
2519
2520 if (conf->mac_addr) {
2521 IWL_DEBUG_MAC80211(priv, "Set %pM\n", conf->mac_addr);
2522 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
2523 } 2656 }
2524 2657
2525 if (iwl_set_mode(priv, conf->type) == -EAGAIN) 2658 if (iwl_set_mode(priv, vif->type) == -EAGAIN)
2526 /* we are not ready, will run again when ready */ 2659 /* we are not ready, will run again when ready */
2527 set_bit(STATUS_MODE_PENDING, &priv->status); 2660 set_bit(STATUS_MODE_PENDING, &priv->status);
2528 2661
2662 out:
2529 mutex_unlock(&priv->mutex); 2663 mutex_unlock(&priv->mutex);
2530 2664
2531 IWL_DEBUG_MAC80211(priv, "leave\n"); 2665 IWL_DEBUG_MAC80211(priv, "leave\n");
2532 return 0; 2666 return err;
2533} 2667}
2534EXPORT_SYMBOL(iwl_mac_add_interface); 2668EXPORT_SYMBOL(iwl_mac_add_interface);
2535 2669
2536void iwl_mac_remove_interface(struct ieee80211_hw *hw, 2670void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2537 struct ieee80211_if_init_conf *conf) 2671 struct ieee80211_vif *vif)
2538{ 2672{
2539 struct iwl_priv *priv = hw->priv; 2673 struct iwl_priv *priv = hw->priv;
2540 2674
@@ -2547,7 +2681,7 @@ void iwl_mac_remove_interface(struct ieee80211_hw *hw,
2547 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2681 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2548 iwlcore_commit_rxon(priv); 2682 iwlcore_commit_rxon(priv);
2549 } 2683 }
2550 if (priv->vif == conf->vif) { 2684 if (priv->vif == vif) {
2551 priv->vif = NULL; 2685 priv->vif = NULL;
2552 memset(priv->bssid, 0, ETH_ALEN); 2686 memset(priv->bssid, 0, ETH_ALEN);
2553 } 2687 }
@@ -2570,7 +2704,7 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2570 struct iwl_priv *priv = hw->priv; 2704 struct iwl_priv *priv = hw->priv;
2571 const struct iwl_channel_info *ch_info; 2705 const struct iwl_channel_info *ch_info;
2572 struct ieee80211_conf *conf = &hw->conf; 2706 struct ieee80211_conf *conf = &hw->conf;
2573 struct iwl_ht_info *ht_conf = &priv->current_ht_config; 2707 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2574 unsigned long flags = 0; 2708 unsigned long flags = 0;
2575 int ret = 0; 2709 int ret = 0;
2576 u16 ch; 2710 u16 ch;
@@ -2587,6 +2721,21 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2587 IWL_DEBUG_MAC80211(priv, "leave - scanning\n"); 2721 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2588 } 2722 }
2589 2723
2724 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2725 IEEE80211_CONF_CHANGE_CHANNEL)) {
2726 /* mac80211 uses static for non-HT which is what we want */
2727 priv->current_ht_config.smps = conf->smps_mode;
2728
2729 /*
2730 * Recalculate chain counts.
2731 *
2732 * If monitor mode is enabled then mac80211 will
2733 * set up the SM PS mode to OFF if an HT channel is
2734 * configured.
2735 */
2736 if (priv->cfg->ops->hcmd->set_rxon_chain)
2737 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2738 }
2590 2739
2591 /* during scanning mac80211 will delay channel setting until 2740 /* during scanning mac80211 will delay channel setting until
2592 * scan finish with changed = 0 2741 * scan finish with changed = 0
@@ -2620,21 +2769,18 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2620 if (conf_is_ht40_minus(conf)) { 2769 if (conf_is_ht40_minus(conf)) {
2621 ht_conf->extension_chan_offset = 2770 ht_conf->extension_chan_offset =
2622 IEEE80211_HT_PARAM_CHA_SEC_BELOW; 2771 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
2623 ht_conf->supported_chan_width = 2772 ht_conf->is_40mhz = true;
2624 IWL_CHANNEL_WIDTH_40MHZ;
2625 } else if (conf_is_ht40_plus(conf)) { 2773 } else if (conf_is_ht40_plus(conf)) {
2626 ht_conf->extension_chan_offset = 2774 ht_conf->extension_chan_offset =
2627 IEEE80211_HT_PARAM_CHA_SEC_ABOVE; 2775 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
2628 ht_conf->supported_chan_width = 2776 ht_conf->is_40mhz = true;
2629 IWL_CHANNEL_WIDTH_40MHZ;
2630 } else { 2777 } else {
2631 ht_conf->extension_chan_offset = 2778 ht_conf->extension_chan_offset =
2632 IEEE80211_HT_PARAM_CHA_SEC_NONE; 2779 IEEE80211_HT_PARAM_CHA_SEC_NONE;
2633 ht_conf->supported_chan_width = 2780 ht_conf->is_40mhz = false;
2634 IWL_CHANNEL_WIDTH_20MHZ;
2635 } 2781 }
2636 } else 2782 } else
2637 ht_conf->supported_chan_width = IWL_CHANNEL_WIDTH_20MHZ; 2783 ht_conf->is_40mhz = false;
2638 /* Default to no protection. Protection mode will later be set 2784 /* Default to no protection. Protection mode will later be set
2639 * from BSS config in iwl_ht_conf */ 2785 * from BSS config in iwl_ht_conf */
2640 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE; 2786 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
@@ -2646,9 +2792,26 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2646 priv->staging_rxon.flags = 0; 2792 priv->staging_rxon.flags = 0;
2647 2793
2648 iwl_set_rxon_channel(priv, conf->channel); 2794 iwl_set_rxon_channel(priv, conf->channel);
2795 iwl_set_rxon_ht(priv, ht_conf);
2649 2796
2650 iwl_set_flags_for_band(priv, conf->channel->band); 2797 iwl_set_flags_for_band(priv, conf->channel->band);
2651 spin_unlock_irqrestore(&priv->lock, flags); 2798 spin_unlock_irqrestore(&priv->lock, flags);
2799 if (iwl_is_associated(priv) &&
2800 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2801 priv->cfg->ops->lib->set_channel_switch) {
2802 iwl_set_rate(priv);
2803 /*
2804 * at this point, staging_rxon has the
2805 * configuration for channel switch
2806 */
2807 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2808 ch);
2809 if (!ret) {
2810 iwl_print_rx_config_cmd(priv);
2811 goto out;
2812 }
2813 priv->switch_rxon.switch_in_progress = false;
2814 }
2652 set_ch_out: 2815 set_ch_out:
2653 /* The list of supported rates and rate mask can be different 2816 /* The list of supported rates and rate mask can be different
2654 * for each band; since the band may have changed, reset 2817 * for each band; since the band may have changed, reset
@@ -2656,7 +2819,8 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2656 iwl_set_rate(priv); 2819 iwl_set_rate(priv);
2657 } 2820 }
2658 2821
2659 if (changed & IEEE80211_CONF_CHANGE_PS) { 2822 if (changed & (IEEE80211_CONF_CHANGE_PS |
2823 IEEE80211_CONF_CHANGE_IDLE)) {
2660 ret = iwl_power_update_mode(priv, false); 2824 ret = iwl_power_update_mode(priv, false);
2661 if (ret) 2825 if (ret)
2662 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n"); 2826 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
@@ -2669,10 +2833,6 @@ int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2669 iwl_set_tx_power(priv, conf->power_level, false); 2833 iwl_set_tx_power(priv, conf->power_level, false);
2670 } 2834 }
2671 2835
2672 /* call to ensure that 4965 rx_chain is set properly in monitor mode */
2673 if (priv->cfg->ops->hcmd->set_rxon_chain)
2674 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2675
2676 if (!iwl_is_ready(priv)) { 2836 if (!iwl_is_ready(priv)) {
2677 IWL_DEBUG_MAC80211(priv, "leave - not ready\n"); 2837 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2678 goto out; 2838 goto out;
@@ -2695,42 +2855,6 @@ out:
2695} 2855}
2696EXPORT_SYMBOL(iwl_mac_config); 2856EXPORT_SYMBOL(iwl_mac_config);
2697 2857
2698int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
2699 struct ieee80211_tx_queue_stats *stats)
2700{
2701 struct iwl_priv *priv = hw->priv;
2702 int i, avail;
2703 struct iwl_tx_queue *txq;
2704 struct iwl_queue *q;
2705 unsigned long flags;
2706
2707 IWL_DEBUG_MAC80211(priv, "enter\n");
2708
2709 if (!iwl_is_ready_rf(priv)) {
2710 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2711 return -EIO;
2712 }
2713
2714 spin_lock_irqsave(&priv->lock, flags);
2715
2716 for (i = 0; i < AC_NUM; i++) {
2717 txq = &priv->txq[i];
2718 q = &txq->q;
2719 avail = iwl_queue_space(q);
2720
2721 stats[i].len = q->n_window - avail;
2722 stats[i].limit = q->n_window - q->high_mark;
2723 stats[i].count = q->n_window;
2724
2725 }
2726 spin_unlock_irqrestore(&priv->lock, flags);
2727
2728 IWL_DEBUG_MAC80211(priv, "leave\n");
2729
2730 return 0;
2731}
2732EXPORT_SYMBOL(iwl_mac_get_tx_stats);
2733
2734void iwl_mac_reset_tsf(struct ieee80211_hw *hw) 2858void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2735{ 2859{
2736 struct iwl_priv *priv = hw->priv; 2860 struct iwl_priv *priv = hw->priv;
@@ -2740,7 +2864,7 @@ void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2740 IWL_DEBUG_MAC80211(priv, "enter\n"); 2864 IWL_DEBUG_MAC80211(priv, "enter\n");
2741 2865
2742 spin_lock_irqsave(&priv->lock, flags); 2866 spin_lock_irqsave(&priv->lock, flags);
2743 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info)); 2867 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
2744 spin_unlock_irqrestore(&priv->lock, flags); 2868 spin_unlock_irqrestore(&priv->lock, flags);
2745 2869
2746 iwl_reset_qos(priv); 2870 iwl_reset_qos(priv);
@@ -2792,6 +2916,55 @@ void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2792} 2916}
2793EXPORT_SYMBOL(iwl_mac_reset_tsf); 2917EXPORT_SYMBOL(iwl_mac_reset_tsf);
2794 2918
2919int iwl_alloc_txq_mem(struct iwl_priv *priv)
2920{
2921 if (!priv->txq)
2922 priv->txq = kzalloc(
2923 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2924 GFP_KERNEL);
2925 if (!priv->txq) {
2926 IWL_ERR(priv, "Not enough memory for txq \n");
2927 return -ENOMEM;
2928 }
2929 return 0;
2930}
2931EXPORT_SYMBOL(iwl_alloc_txq_mem);
2932
2933void iwl_free_txq_mem(struct iwl_priv *priv)
2934{
2935 kfree(priv->txq);
2936 priv->txq = NULL;
2937}
2938EXPORT_SYMBOL(iwl_free_txq_mem);
2939
2940int iwl_send_wimax_coex(struct iwl_priv *priv)
2941{
2942 struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2943
2944 if (priv->cfg->support_wimax_coexist) {
2945 /* UnMask wake up src at associated sleep */
2946 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2947
2948 /* UnMask wake up src at unassociated sleep */
2949 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2950 memcpy(coex_cmd.sta_prio, cu_priorities,
2951 sizeof(struct iwl_wimax_coex_event_entry) *
2952 COEX_NUM_OF_EVENTS);
2953
2954 /* enabling the coexistence feature */
2955 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2956
2957 /* enabling the priorities tables */
2958 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2959 } else {
2960 /* coexistence is disabled */
2961 memset(&coex_cmd, 0, sizeof(coex_cmd));
2962 }
2963 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2964 sizeof(coex_cmd), &coex_cmd);
2965}
2966EXPORT_SYMBOL(iwl_send_wimax_coex);
2967
2795#ifdef CONFIG_IWLWIFI_DEBUGFS 2968#ifdef CONFIG_IWLWIFI_DEBUGFS
2796 2969
2797#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES) 2970#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
@@ -2929,15 +3102,11 @@ const char *get_ctrl_string(int cmd)
2929 } 3102 }
2930} 3103}
2931 3104
2932void iwl_clear_tx_stats(struct iwl_priv *priv) 3105void iwl_clear_traffic_stats(struct iwl_priv *priv)
2933{ 3106{
2934 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats)); 3107 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
2935
2936}
2937
2938void iwl_clear_rx_stats(struct iwl_priv *priv)
2939{
2940 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats)); 3108 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
3109 priv->led_tpt = 0;
2941} 3110}
2942 3111
2943/* 3112/*
@@ -3030,10 +3199,211 @@ void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
3030 stats->data_cnt++; 3199 stats->data_cnt++;
3031 stats->data_bytes += len; 3200 stats->data_bytes += len;
3032 } 3201 }
3202 iwl_leds_background(priv);
3033} 3203}
3034EXPORT_SYMBOL(iwl_update_stats); 3204EXPORT_SYMBOL(iwl_update_stats);
3035#endif 3205#endif
3036 3206
3207const static char *get_csr_string(int cmd)
3208{
3209 switch (cmd) {
3210 IWL_CMD(CSR_HW_IF_CONFIG_REG);
3211 IWL_CMD(CSR_INT_COALESCING);
3212 IWL_CMD(CSR_INT);
3213 IWL_CMD(CSR_INT_MASK);
3214 IWL_CMD(CSR_FH_INT_STATUS);
3215 IWL_CMD(CSR_GPIO_IN);
3216 IWL_CMD(CSR_RESET);
3217 IWL_CMD(CSR_GP_CNTRL);
3218 IWL_CMD(CSR_HW_REV);
3219 IWL_CMD(CSR_EEPROM_REG);
3220 IWL_CMD(CSR_EEPROM_GP);
3221 IWL_CMD(CSR_OTP_GP_REG);
3222 IWL_CMD(CSR_GIO_REG);
3223 IWL_CMD(CSR_GP_UCODE_REG);
3224 IWL_CMD(CSR_GP_DRIVER_REG);
3225 IWL_CMD(CSR_UCODE_DRV_GP1);
3226 IWL_CMD(CSR_UCODE_DRV_GP2);
3227 IWL_CMD(CSR_LED_REG);
3228 IWL_CMD(CSR_DRAM_INT_TBL_REG);
3229 IWL_CMD(CSR_GIO_CHICKEN_BITS);
3230 IWL_CMD(CSR_ANA_PLL_CFG);
3231 IWL_CMD(CSR_HW_REV_WA_REG);
3232 IWL_CMD(CSR_DBG_HPET_MEM_REG);
3233 default:
3234 return "UNKNOWN";
3235
3236 }
3237}
3238
3239void iwl_dump_csr(struct iwl_priv *priv)
3240{
3241 int i;
3242 u32 csr_tbl[] = {
3243 CSR_HW_IF_CONFIG_REG,
3244 CSR_INT_COALESCING,
3245 CSR_INT,
3246 CSR_INT_MASK,
3247 CSR_FH_INT_STATUS,
3248 CSR_GPIO_IN,
3249 CSR_RESET,
3250 CSR_GP_CNTRL,
3251 CSR_HW_REV,
3252 CSR_EEPROM_REG,
3253 CSR_EEPROM_GP,
3254 CSR_OTP_GP_REG,
3255 CSR_GIO_REG,
3256 CSR_GP_UCODE_REG,
3257 CSR_GP_DRIVER_REG,
3258 CSR_UCODE_DRV_GP1,
3259 CSR_UCODE_DRV_GP2,
3260 CSR_LED_REG,
3261 CSR_DRAM_INT_TBL_REG,
3262 CSR_GIO_CHICKEN_BITS,
3263 CSR_ANA_PLL_CFG,
3264 CSR_HW_REV_WA_REG,
3265 CSR_DBG_HPET_MEM_REG
3266 };
3267 IWL_ERR(priv, "CSR values:\n");
3268 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
3269 "CSR_INT_PERIODIC_REG)\n");
3270 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
3271 IWL_ERR(priv, " %25s: 0X%08x\n",
3272 get_csr_string(csr_tbl[i]),
3273 iwl_read32(priv, csr_tbl[i]));
3274 }
3275}
3276EXPORT_SYMBOL(iwl_dump_csr);
3277
3278const static char *get_fh_string(int cmd)
3279{
3280 switch (cmd) {
3281 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
3282 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
3283 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
3284 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
3285 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
3286 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
3287 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
3288 IWL_CMD(FH_TSSR_TX_STATUS_REG);
3289 IWL_CMD(FH_TSSR_TX_ERROR_REG);
3290 default:
3291 return "UNKNOWN";
3292
3293 }
3294}
3295
3296int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
3297{
3298 int i;
3299#ifdef CONFIG_IWLWIFI_DEBUG
3300 int pos = 0;
3301 size_t bufsz = 0;
3302#endif
3303 u32 fh_tbl[] = {
3304 FH_RSCSR_CHNL0_STTS_WPTR_REG,
3305 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
3306 FH_RSCSR_CHNL0_WPTR,
3307 FH_MEM_RCSR_CHNL0_CONFIG_REG,
3308 FH_MEM_RSSR_SHARED_CTRL_REG,
3309 FH_MEM_RSSR_RX_STATUS_REG,
3310 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
3311 FH_TSSR_TX_STATUS_REG,
3312 FH_TSSR_TX_ERROR_REG
3313 };
3314#ifdef CONFIG_IWLWIFI_DEBUG
3315 if (display) {
3316 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
3317 *buf = kmalloc(bufsz, GFP_KERNEL);
3318 if (!*buf)
3319 return -ENOMEM;
3320 pos += scnprintf(*buf + pos, bufsz - pos,
3321 "FH register values:\n");
3322 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
3323 pos += scnprintf(*buf + pos, bufsz - pos,
3324 " %34s: 0X%08x\n",
3325 get_fh_string(fh_tbl[i]),
3326 iwl_read_direct32(priv, fh_tbl[i]));
3327 }
3328 return pos;
3329 }
3330#endif
3331 IWL_ERR(priv, "FH register values:\n");
3332 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
3333 IWL_ERR(priv, " %34s: 0X%08x\n",
3334 get_fh_string(fh_tbl[i]),
3335 iwl_read_direct32(priv, fh_tbl[i]));
3336 }
3337 return 0;
3338}
3339EXPORT_SYMBOL(iwl_dump_fh);
3340
3341static void iwl_force_rf_reset(struct iwl_priv *priv)
3342{
3343 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3344 return;
3345
3346 if (!iwl_is_associated(priv)) {
3347 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
3348 return;
3349 }
3350 /*
3351 * There is no easy and better way to force reset the radio,
3352 * the only known method is switching channel which will force to
3353 * reset and tune the radio.
3354 * Use internal short scan (single channel) operation to should
3355 * achieve this objective.
3356 * Driver should reset the radio when number of consecutive missed
3357 * beacon, or any other uCode error condition detected.
3358 */
3359 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
3360 iwl_internal_short_hw_scan(priv);
3361}
3362
3363
3364int iwl_force_reset(struct iwl_priv *priv, int mode)
3365{
3366 struct iwl_force_reset *force_reset;
3367
3368 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3369 return -EINVAL;
3370
3371 if (mode >= IWL_MAX_FORCE_RESET) {
3372 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
3373 return -EINVAL;
3374 }
3375 force_reset = &priv->force_reset[mode];
3376 force_reset->reset_request_count++;
3377 if (force_reset->last_force_reset_jiffies &&
3378 time_after(force_reset->last_force_reset_jiffies +
3379 force_reset->reset_duration, jiffies)) {
3380 IWL_DEBUG_INFO(priv, "force reset rejected\n");
3381 force_reset->reset_reject_count++;
3382 return -EAGAIN;
3383 }
3384 force_reset->reset_success_count++;
3385 force_reset->last_force_reset_jiffies = jiffies;
3386 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
3387 switch (mode) {
3388 case IWL_RF_RESET:
3389 iwl_force_rf_reset(priv);
3390 break;
3391 case IWL_FW_RESET:
3392 IWL_ERR(priv, "On demand firmware reload\n");
3393 /* Set the FW error flag -- cleared on iwl_down */
3394 set_bit(STATUS_FW_ERROR, &priv->status);
3395 wake_up_interruptible(&priv->wait_command_queue);
3396 /*
3397 * Keep the restart process from trying to send host
3398 * commands by clearing the INIT status bit
3399 */
3400 clear_bit(STATUS_READY, &priv->status);
3401 queue_work(priv->workqueue, &priv->restart);
3402 break;
3403 }
3404 return 0;
3405}
3406
3037#ifdef CONFIG_PM 3407#ifdef CONFIG_PM
3038 3408
3039int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state) 3409int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 7754538c2194..36940a9ec6b9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -70,8 +70,8 @@ struct iwl_host_cmd;
70struct iwl_cmd; 70struct iwl_cmd;
71 71
72 72
73#define IWLWIFI_VERSION "1.3.27k" 73#define IWLWIFI_VERSION "in-tree:"
74#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation" 74#define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
75#define DRV_AUTHOR "<ilw@linux.intel.com>" 75#define DRV_AUTHOR "<ilw@linux.intel.com>"
76 76
77#define IWL_PCI_DEVICE(dev, subdev, cfg) \ 77#define IWL_PCI_DEVICE(dev, subdev, cfg) \
@@ -89,6 +89,7 @@ struct iwl_hcmd_ops {
89 int (*rxon_assoc)(struct iwl_priv *priv); 89 int (*rxon_assoc)(struct iwl_priv *priv);
90 int (*commit_rxon)(struct iwl_priv *priv); 90 int (*commit_rxon)(struct iwl_priv *priv);
91 void (*set_rxon_chain)(struct iwl_priv *priv); 91 void (*set_rxon_chain)(struct iwl_priv *priv);
92 int (*set_tx_ant)(struct iwl_priv *priv, u8 valid_tx_ant);
92}; 93};
93 94
94struct iwl_hcmd_utils_ops { 95struct iwl_hcmd_utils_ops {
@@ -97,7 +98,8 @@ struct iwl_hcmd_utils_ops {
97 void (*gain_computation)(struct iwl_priv *priv, 98 void (*gain_computation)(struct iwl_priv *priv,
98 u32 *average_noise, 99 u32 *average_noise,
99 u16 min_average_noise_antennat_i, 100 u16 min_average_noise_antennat_i,
100 u32 min_average_noise); 101 u32 min_average_noise,
102 u8 default_chain);
101 void (*chain_noise_reset)(struct iwl_priv *priv); 103 void (*chain_noise_reset)(struct iwl_priv *priv);
102 void (*rts_tx_cmd_flag)(struct ieee80211_tx_info *info, 104 void (*rts_tx_cmd_flag)(struct ieee80211_tx_info *info,
103 __le32 *tx_flags); 105 __le32 *tx_flags);
@@ -107,7 +109,6 @@ struct iwl_hcmd_utils_ops {
107 109
108struct iwl_apm_ops { 110struct iwl_apm_ops {
109 int (*init)(struct iwl_priv *priv); 111 int (*init)(struct iwl_priv *priv);
110 int (*reset)(struct iwl_priv *priv);
111 void (*stop)(struct iwl_priv *priv); 112 void (*stop)(struct iwl_priv *priv);
112 void (*config)(struct iwl_priv *priv); 113 void (*config)(struct iwl_priv *priv);
113 int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src); 114 int (*set_pwr_src)(struct iwl_priv *priv, enum iwl_pwr_src src);
@@ -116,6 +117,7 @@ struct iwl_apm_ops {
116struct iwl_temp_ops { 117struct iwl_temp_ops {
117 void (*temperature)(struct iwl_priv *priv); 118 void (*temperature)(struct iwl_priv *priv);
118 void (*set_ct_kill)(struct iwl_priv *priv); 119 void (*set_ct_kill)(struct iwl_priv *priv);
120 void (*set_calib_version)(struct iwl_priv *priv);
119}; 121};
120 122
121struct iwl_ucode_ops { 123struct iwl_ucode_ops {
@@ -166,8 +168,12 @@ struct iwl_lib_ops {
166 int (*is_valid_rtc_data_addr)(u32 addr); 168 int (*is_valid_rtc_data_addr)(u32 addr);
167 /* 1st ucode load */ 169 /* 1st ucode load */
168 int (*load_ucode)(struct iwl_priv *priv); 170 int (*load_ucode)(struct iwl_priv *priv);
169 void (*dump_nic_event_log)(struct iwl_priv *priv); 171 int (*dump_nic_event_log)(struct iwl_priv *priv,
172 bool full_log, char **buf, bool display);
170 void (*dump_nic_error_log)(struct iwl_priv *priv); 173 void (*dump_nic_error_log)(struct iwl_priv *priv);
174 void (*dump_csr)(struct iwl_priv *priv);
175 int (*dump_fh)(struct iwl_priv *priv, char **buf, bool display);
176 int (*set_channel_switch)(struct iwl_priv *priv, u16 channel);
171 /* power management */ 177 /* power management */
172 struct iwl_apm_ops apm_ops; 178 struct iwl_apm_ops apm_ops;
173 179
@@ -183,6 +189,14 @@ struct iwl_lib_ops {
183 189
184 /* temperature */ 190 /* temperature */
185 struct iwl_temp_ops temp_ops; 191 struct iwl_temp_ops temp_ops;
192 /* station management */
193 void (*add_bcast_station)(struct iwl_priv *priv);
194};
195
196struct iwl_led_ops {
197 int (*cmd)(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd);
198 int (*on)(struct iwl_priv *priv);
199 int (*off)(struct iwl_priv *priv);
186}; 200};
187 201
188struct iwl_ops { 202struct iwl_ops {
@@ -190,13 +204,13 @@ struct iwl_ops {
190 const struct iwl_lib_ops *lib; 204 const struct iwl_lib_ops *lib;
191 const struct iwl_hcmd_ops *hcmd; 205 const struct iwl_hcmd_ops *hcmd;
192 const struct iwl_hcmd_utils_ops *utils; 206 const struct iwl_hcmd_utils_ops *utils;
207 const struct iwl_led_ops *led;
193}; 208};
194 209
195struct iwl_mod_params { 210struct iwl_mod_params {
196 int sw_crypto; /* def: 0 = using hardware encryption */ 211 int sw_crypto; /* def: 0 = using hardware encryption */
197 int disable_hw_scan; /* def: 0 = use h/w scan */ 212 int disable_hw_scan; /* def: 0 = use h/w scan */
198 int num_of_queues; /* def: HW dependent */ 213 int num_of_queues; /* def: HW dependent */
199 int num_of_ampdu_queues;/* def: HW dependent */
200 int disable_11n; /* def: 0 = 11n capabilities enabled */ 214 int disable_11n; /* def: 0 = 11n capabilities enabled */
201 int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */ 215 int amsdu_size_8K; /* def: 1 = enable 8K amsdu size */
202 int antenna; /* def: 0 = both antennas (use diversity) */ 216 int antenna; /* def: 0 = both antennas (use diversity) */
@@ -213,7 +227,16 @@ struct iwl_mod_params {
213 * @pa_type: used by 6000 series only to identify the type of Power Amplifier 227 * @pa_type: used by 6000 series only to identify the type of Power Amplifier
214 * @max_ll_items: max number of OTP blocks 228 * @max_ll_items: max number of OTP blocks
215 * @shadow_ram_support: shadow support for OTP memory 229 * @shadow_ram_support: shadow support for OTP memory
230 * @led_compensation: compensate on the led on/off time per HW according
231 * to the deviation to achieve the desired led frequency.
232 * The detail algorithm is described in iwl-led.c
216 * @use_rts_for_ht: use rts/cts protection for HT traffic 233 * @use_rts_for_ht: use rts/cts protection for HT traffic
234 * @chain_noise_num_beacons: number of beacons used to compute chain noise
235 * @adv_thermal_throttle: support advance thermal throttle
236 * @support_ct_kill_exit: support ct kill exit condition
237 * @support_wimax_coexist: support wimax/wifi co-exist
238 * @plcp_delta_threshold: plcp error rate threshold used to trigger
239 * radio tuning when there is a high receiving plcp error rate
217 * 240 *
218 * We enable the driver to be backward compatible wrt API version. The 241 * We enable the driver to be backward compatible wrt API version. The
219 * driver specifies which APIs it supports (with @ucode_api_max being the 242 * driver specifies which APIs it supports (with @ucode_api_max being the
@@ -245,18 +268,33 @@ struct iwl_cfg {
245 int eeprom_size; 268 int eeprom_size;
246 u16 eeprom_ver; 269 u16 eeprom_ver;
247 u16 eeprom_calib_ver; 270 u16 eeprom_calib_ver;
271 int num_of_queues; /* def: HW dependent */
272 int num_of_ampdu_queues;/* def: HW dependent */
248 const struct iwl_ops *ops; 273 const struct iwl_ops *ops;
249 const struct iwl_mod_params *mod_params; 274 const struct iwl_mod_params *mod_params;
250 u8 valid_tx_ant; 275 u8 valid_tx_ant;
251 u8 valid_rx_ant; 276 u8 valid_rx_ant;
252 bool need_pll_cfg; 277
278 /* for iwl_apm_init() */
279 u32 pll_cfg_val;
280 bool set_l0s;
281 bool use_bsm;
282
253 bool use_isr_legacy; 283 bool use_isr_legacy;
254 enum iwl_pa_type pa_type; 284 enum iwl_pa_type pa_type;
255 const u16 max_ll_items; 285 const u16 max_ll_items;
256 const bool shadow_ram_support; 286 const bool shadow_ram_support;
257 const bool ht_greenfield_support; 287 const bool ht_greenfield_support;
288 u16 led_compensation;
258 const bool broken_powersave; 289 const bool broken_powersave;
259 bool use_rts_for_ht; 290 bool use_rts_for_ht;
291 int chain_noise_num_beacons;
292 const bool supports_idle;
293 bool adv_thermal_throttle;
294 bool support_ct_kill_exit;
295 const bool support_wimax_coexist;
296 u8 plcp_delta_threshold;
297 s32 chain_noise_scale;
260}; 298};
261 299
262/*************************** 300/***************************
@@ -275,7 +313,7 @@ int iwl_check_rxon_cmd(struct iwl_priv *priv);
275int iwl_full_rxon_required(struct iwl_priv *priv); 313int iwl_full_rxon_required(struct iwl_priv *priv);
276void iwl_set_rxon_chain(struct iwl_priv *priv); 314void iwl_set_rxon_chain(struct iwl_priv *priv);
277int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch); 315int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch);
278void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info); 316void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf);
279u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv, 317u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
280 struct ieee80211_sta_ht_cap *sta_ht_inf); 318 struct ieee80211_sta_ht_cap *sta_ht_inf);
281void iwl_set_flags_for_band(struct iwl_priv *priv, enum ieee80211_band band); 319void iwl_set_flags_for_band(struct iwl_priv *priv, enum ieee80211_band band);
@@ -289,10 +327,7 @@ void iwl_configure_filter(struct ieee80211_hw *hw,
289 unsigned int changed_flags, 327 unsigned int changed_flags,
290 unsigned int *total_flags, u64 multicast); 328 unsigned int *total_flags, u64 multicast);
291int iwl_hw_nic_init(struct iwl_priv *priv); 329int iwl_hw_nic_init(struct iwl_priv *priv);
292int iwl_setup_mac(struct iwl_priv *priv);
293int iwl_set_hw_params(struct iwl_priv *priv); 330int iwl_set_hw_params(struct iwl_priv *priv);
294int iwl_init_drv(struct iwl_priv *priv);
295void iwl_uninit_drv(struct iwl_priv *priv);
296bool iwl_is_monitor_mode(struct iwl_priv *priv); 331bool iwl_is_monitor_mode(struct iwl_priv *priv);
297void iwl_post_associate(struct iwl_priv *priv); 332void iwl_post_associate(struct iwl_priv *priv);
298void iwl_bss_info_changed(struct ieee80211_hw *hw, 333void iwl_bss_info_changed(struct ieee80211_hw *hw,
@@ -303,14 +338,17 @@ int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb);
303int iwl_commit_rxon(struct iwl_priv *priv); 338int iwl_commit_rxon(struct iwl_priv *priv);
304int iwl_set_mode(struct iwl_priv *priv, int mode); 339int iwl_set_mode(struct iwl_priv *priv, int mode);
305int iwl_mac_add_interface(struct ieee80211_hw *hw, 340int iwl_mac_add_interface(struct ieee80211_hw *hw,
306 struct ieee80211_if_init_conf *conf); 341 struct ieee80211_vif *vif);
307void iwl_mac_remove_interface(struct ieee80211_hw *hw, 342void iwl_mac_remove_interface(struct ieee80211_hw *hw,
308 struct ieee80211_if_init_conf *conf); 343 struct ieee80211_vif *vif);
309int iwl_mac_config(struct ieee80211_hw *hw, u32 changed); 344int iwl_mac_config(struct ieee80211_hw *hw, u32 changed);
310void iwl_config_ap(struct iwl_priv *priv); 345void iwl_config_ap(struct iwl_priv *priv);
311int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
312 struct ieee80211_tx_queue_stats *stats);
313void iwl_mac_reset_tsf(struct ieee80211_hw *hw); 346void iwl_mac_reset_tsf(struct ieee80211_hw *hw);
347int iwl_alloc_txq_mem(struct iwl_priv *priv);
348void iwl_free_txq_mem(struct iwl_priv *priv);
349void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
350 __le32 *tx_flags);
351int iwl_send_wimax_coex(struct iwl_priv *priv);
314#ifdef CONFIG_IWLWIFI_DEBUGFS 352#ifdef CONFIG_IWLWIFI_DEBUGFS
315int iwl_alloc_traffic_mem(struct iwl_priv *priv); 353int iwl_alloc_traffic_mem(struct iwl_priv *priv);
316void iwl_free_traffic_mem(struct iwl_priv *priv); 354void iwl_free_traffic_mem(struct iwl_priv *priv);
@@ -321,8 +359,7 @@ void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
321 u16 length, struct ieee80211_hdr *header); 359 u16 length, struct ieee80211_hdr *header);
322const char *get_mgmt_string(int cmd); 360const char *get_mgmt_string(int cmd);
323const char *get_ctrl_string(int cmd); 361const char *get_ctrl_string(int cmd);
324void iwl_clear_tx_stats(struct iwl_priv *priv); 362void iwl_clear_traffic_stats(struct iwl_priv *priv);
325void iwl_clear_rx_stats(struct iwl_priv *priv);
326void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, 363void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc,
327 u16 len); 364 u16 len);
328#else 365#else
@@ -358,6 +395,7 @@ static inline void iwl_update_stats(struct iwl_priv *priv, bool is_tx,
358 /* data */ 395 /* data */
359 stats->data_bytes += len; 396 stats->data_bytes += len;
360 } 397 }
398 iwl_leds_background(priv);
361} 399}
362#endif 400#endif
363/***************************************************** 401/*****************************************************
@@ -377,13 +415,13 @@ void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
377void iwl_cmd_queue_free(struct iwl_priv *priv); 415void iwl_cmd_queue_free(struct iwl_priv *priv);
378int iwl_rx_queue_alloc(struct iwl_priv *priv); 416int iwl_rx_queue_alloc(struct iwl_priv *priv);
379void iwl_rx_handle(struct iwl_priv *priv); 417void iwl_rx_handle(struct iwl_priv *priv);
380int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, 418void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv,
381 struct iwl_rx_queue *q); 419 struct iwl_rx_queue *q);
382void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq); 420void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
383void iwl_rx_replenish(struct iwl_priv *priv); 421void iwl_rx_replenish(struct iwl_priv *priv);
384void iwl_rx_replenish_now(struct iwl_priv *priv); 422void iwl_rx_replenish_now(struct iwl_priv *priv);
385int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq); 423int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq);
386int iwl_rx_queue_restock(struct iwl_priv *priv); 424void iwl_rx_queue_restock(struct iwl_priv *priv);
387int iwl_rx_queue_space(const struct iwl_rx_queue *q); 425int iwl_rx_queue_space(const struct iwl_rx_queue *q);
388void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority); 426void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority);
389void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); 427void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
@@ -391,8 +429,12 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index);
391/* Handlers */ 429/* Handlers */
392void iwl_rx_missed_beacon_notif(struct iwl_priv *priv, 430void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
393 struct iwl_rx_mem_buffer *rxb); 431 struct iwl_rx_mem_buffer *rxb);
432void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
433 struct iwl_rx_mem_buffer *rxb);
394void iwl_rx_statistics(struct iwl_priv *priv, 434void iwl_rx_statistics(struct iwl_priv *priv,
395 struct iwl_rx_mem_buffer *rxb); 435 struct iwl_rx_mem_buffer *rxb);
436void iwl_reply_statistics(struct iwl_priv *priv,
437 struct iwl_rx_mem_buffer *rxb);
396void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); 438void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
397 439
398/* TX helpers */ 440/* TX helpers */
@@ -400,7 +442,8 @@ void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb);
400/***************************************************** 442/*****************************************************
401* TX 443* TX
402******************************************************/ 444******************************************************/
403int iwl_txq_ctx_reset(struct iwl_priv *priv); 445int iwl_txq_ctx_alloc(struct iwl_priv *priv);
446void iwl_txq_ctx_reset(struct iwl_priv *priv);
404void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq); 447void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq);
405int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, 448int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
406 struct iwl_tx_queue *txq, 449 struct iwl_tx_queue *txq,
@@ -409,9 +452,13 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb);
409void iwl_hw_txq_ctx_free(struct iwl_priv *priv); 452void iwl_hw_txq_ctx_free(struct iwl_priv *priv);
410int iwl_hw_tx_queue_init(struct iwl_priv *priv, 453int iwl_hw_tx_queue_init(struct iwl_priv *priv,
411 struct iwl_tx_queue *txq); 454 struct iwl_tx_queue *txq);
412int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); 455void iwl_free_tfds_in_queue(struct iwl_priv *priv,
456 int sta_id, int tid, int freed);
457void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq);
413int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, 458int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
414 int slots_num, u32 txq_id); 459 int slots_num, u32 txq_id);
460void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq,
461 int slots_num, u32 txq_id);
415void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id); 462void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id);
416int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn); 463int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn);
417int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid); 464int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid);
@@ -459,6 +506,8 @@ void iwl_init_scan_params(struct iwl_priv *priv);
459int iwl_scan_cancel(struct iwl_priv *priv); 506int iwl_scan_cancel(struct iwl_priv *priv);
460int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms); 507int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms);
461int iwl_mac_hw_scan(struct ieee80211_hw *hw, struct cfg80211_scan_request *req); 508int iwl_mac_hw_scan(struct ieee80211_hw *hw, struct cfg80211_scan_request *req);
509void iwl_internal_short_hw_scan(struct iwl_priv *priv);
510int iwl_force_reset(struct iwl_priv *priv, int mode);
462u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame, 511u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame,
463 const u8 *ie, int ie_len, int left); 512 const u8 *ie, int ie_len, int left);
464void iwl_setup_rx_scan_handlers(struct iwl_priv *priv); 513void iwl_setup_rx_scan_handlers(struct iwl_priv *priv);
@@ -489,14 +538,6 @@ int iwl_send_calib_results(struct iwl_priv *priv);
489int iwl_calib_set(struct iwl_calib_result *res, const u8 *buf, int len); 538int iwl_calib_set(struct iwl_calib_result *res, const u8 *buf, int len);
490void iwl_calib_free_results(struct iwl_priv *priv); 539void iwl_calib_free_results(struct iwl_priv *priv);
491 540
492/*******************************************************************************
493 * Spectrum Measureemtns in iwl-spectrum.c
494 ******************************************************************************/
495#ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
496void iwl_setup_spectrum_handlers(struct iwl_priv *priv);
497#else
498static inline void iwl_setup_spectrum_handlers(struct iwl_priv *priv) {}
499#endif
500/***************************************************** 541/*****************************************************
501 * S e n d i n g H o s t C o m m a n d s * 542 * S e n d i n g H o s t C o m m a n d s *
502 *****************************************************/ 543 *****************************************************/
@@ -511,7 +552,7 @@ int iwl_send_cmd_pdu_async(struct iwl_priv *priv, u8 id, u16 len,
511 const void *data, 552 const void *data,
512 void (*callback)(struct iwl_priv *priv, 553 void (*callback)(struct iwl_priv *priv,
513 struct iwl_device_cmd *cmd, 554 struct iwl_device_cmd *cmd,
514 struct sk_buff *skb)); 555 struct iwl_rx_packet *pkt));
515 556
516int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd); 557int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd);
517 558
@@ -544,15 +585,15 @@ int iwl_pci_resume(struct pci_dev *pdev);
544/***************************************************** 585/*****************************************************
545* Error Handling Debugging 586* Error Handling Debugging
546******************************************************/ 587******************************************************/
547#ifdef CONFIG_IWLWIFI_DEBUG
548void iwl_dump_nic_event_log(struct iwl_priv *priv);
549void iwl_dump_nic_error_log(struct iwl_priv *priv); 588void iwl_dump_nic_error_log(struct iwl_priv *priv);
589int iwl_dump_nic_event_log(struct iwl_priv *priv,
590 bool full_log, char **buf, bool display);
591void iwl_dump_csr(struct iwl_priv *priv);
592int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display);
593#ifdef CONFIG_IWLWIFI_DEBUG
594void iwl_print_rx_config_cmd(struct iwl_priv *priv);
550#else 595#else
551static inline void iwl_dump_nic_event_log(struct iwl_priv *priv) 596static inline void iwl_print_rx_config_cmd(struct iwl_priv *priv)
552{
553}
554
555static inline void iwl_dump_nic_error_log(struct iwl_priv *priv)
556{ 597{
557} 598}
558#endif 599#endif
@@ -568,9 +609,10 @@ void iwlcore_free_geos(struct iwl_priv *priv);
568/*************** DRIVER STATUS FUNCTIONS *****/ 609/*************** DRIVER STATUS FUNCTIONS *****/
569 610
570#define STATUS_HCMD_ACTIVE 0 /* host command in progress */ 611#define STATUS_HCMD_ACTIVE 0 /* host command in progress */
571#define STATUS_HCMD_SYNC_ACTIVE 1 /* sync host command in progress */ 612/* 1 is unused (used to be STATUS_HCMD_SYNC_ACTIVE) */
572#define STATUS_INT_ENABLED 2 613#define STATUS_INT_ENABLED 2
573#define STATUS_RF_KILL_HW 3 614#define STATUS_RF_KILL_HW 3
615#define STATUS_CT_KILL 4
574#define STATUS_INIT 5 616#define STATUS_INIT 5
575#define STATUS_ALIVE 6 617#define STATUS_ALIVE 6
576#define STATUS_READY 7 618#define STATUS_READY 7
@@ -615,6 +657,11 @@ static inline int iwl_is_rfkill(struct iwl_priv *priv)
615 return iwl_is_rfkill_hw(priv); 657 return iwl_is_rfkill_hw(priv);
616} 658}
617 659
660static inline int iwl_is_ctkill(struct iwl_priv *priv)
661{
662 return test_bit(STATUS_CT_KILL, &priv->status);
663}
664
618static inline int iwl_is_ready_rf(struct iwl_priv *priv) 665static inline int iwl_is_ready_rf(struct iwl_priv *priv)
619{ 666{
620 667
@@ -626,7 +673,8 @@ static inline int iwl_is_ready_rf(struct iwl_priv *priv)
626 673
627extern void iwl_rf_kill_ct_config(struct iwl_priv *priv); 674extern void iwl_rf_kill_ct_config(struct iwl_priv *priv);
628extern int iwl_send_bt_config(struct iwl_priv *priv); 675extern int iwl_send_bt_config(struct iwl_priv *priv);
629extern int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags); 676extern int iwl_send_statistics_request(struct iwl_priv *priv,
677 u8 flags, bool clear);
630extern int iwl_verify_ucode(struct iwl_priv *priv); 678extern int iwl_verify_ucode(struct iwl_priv *priv);
631extern int iwl_send_lq_cmd(struct iwl_priv *priv, 679extern int iwl_send_lq_cmd(struct iwl_priv *priv,
632 struct iwl_link_quality_cmd *lq, u8 flags); 680 struct iwl_link_quality_cmd *lq, u8 flags);
@@ -636,6 +684,9 @@ extern void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
636 struct iwl_rx_mem_buffer *rxb); 684 struct iwl_rx_mem_buffer *rxb);
637void iwl_rx_reply_compressed_ba(struct iwl_priv *priv, 685void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
638 struct iwl_rx_mem_buffer *rxb); 686 struct iwl_rx_mem_buffer *rxb);
687void iwl_apm_stop(struct iwl_priv *priv);
688int iwl_apm_stop_master(struct iwl_priv *priv);
689int iwl_apm_init(struct iwl_priv *priv);
639 690
640void iwl_setup_rxon_timing(struct iwl_priv *priv); 691void iwl_setup_rxon_timing(struct iwl_priv *priv);
641static inline int iwl_send_rxon_assoc(struct iwl_priv *priv) 692static inline int iwl_send_rxon_assoc(struct iwl_priv *priv)
@@ -655,5 +706,4 @@ static inline const struct ieee80211_supported_band *iwl_get_hw_mode(
655{ 706{
656 return priv->hw->wiphy->bands[band]; 707 return priv->hw->wiphy->bands[band];
657} 708}
658
659#endif /* __iwl_core_h__ */ 709#endif /* __iwl_core_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index 06437d13e73e..808b7146bead 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -62,11 +62,28 @@
62 *****************************************************************************/ 62 *****************************************************************************/
63#ifndef __iwl_csr_h__ 63#ifndef __iwl_csr_h__
64#define __iwl_csr_h__ 64#define __iwl_csr_h__
65/*=== CSR (control and status registers) ===*/ 65/*
66 * CSR (control and status registers)
67 *
68 * CSR registers are mapped directly into PCI bus space, and are accessible
69 * whenever platform supplies power to device, even when device is in
70 * low power states due to driver-invoked device resets
71 * (e.g. CSR_RESET_REG_FLAG_SW_RESET) or uCode-driven power-saving modes.
72 *
73 * Use iwl_write32() and iwl_read32() family to access these registers;
74 * these provide simple PCI bus access, without waking up the MAC.
75 * Do not use iwl_write_direct32() family for these registers;
76 * no need to "grab nic access" via CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ.
77 * The MAC (uCode processor, etc.) does not need to be powered up for accessing
78 * the CSR registers.
79 *
80 * NOTE: Device does need to be awake in order to read this memory
81 * via CSR_EEPROM and CSR_OTP registers
82 */
66#define CSR_BASE (0x000) 83#define CSR_BASE (0x000)
67 84
68#define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */ 85#define CSR_HW_IF_CONFIG_REG (CSR_BASE+0x000) /* hardware interface config */
69#define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */ 86#define CSR_INT_COALESCING (CSR_BASE+0x004) /* accum ints, 32-usec units */
70#define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */ 87#define CSR_INT (CSR_BASE+0x008) /* host interrupt status/ack */
71#define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */ 88#define CSR_INT_MASK (CSR_BASE+0x00c) /* host interrupt enable */
72#define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/ 89#define CSR_FH_INT_STATUS (CSR_BASE+0x010) /* busmaster int status/ack*/
@@ -74,43 +91,66 @@
74#define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/ 91#define CSR_RESET (CSR_BASE+0x020) /* busmaster enable, NMI, etc*/
75#define CSR_GP_CNTRL (CSR_BASE+0x024) 92#define CSR_GP_CNTRL (CSR_BASE+0x024)
76 93
94/* 2nd byte of CSR_INT_COALESCING, not accessible via iwl_write32()! */
95#define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)
96
77/* 97/*
78 * Hardware revision info 98 * Hardware revision info
79 * Bit fields: 99 * Bit fields:
80 * 31-8: Reserved 100 * 31-8: Reserved
81 * 7-4: Type of device: 0x0 = 4965, 0xd = 3945 101 * 7-4: Type of device: see CSR_HW_REV_TYPE_xxx definitions
82 * 3-2: Revision step: 0 = A, 1 = B, 2 = C, 3 = D 102 * 3-2: Revision step: 0 = A, 1 = B, 2 = C, 3 = D
83 * 1-0: "Dash" value, as in A-1, etc. 103 * 1-0: "Dash" (-) value, as in A-1, etc.
84 * 104 *
85 * NOTE: Revision step affects calculation of CCK txpower for 4965. 105 * NOTE: Revision step affects calculation of CCK txpower for 4965.
106 * NOTE: See also CSR_HW_REV_WA_REG (work-around for bug in 4965).
86 */ 107 */
87#define CSR_HW_REV (CSR_BASE+0x028) 108#define CSR_HW_REV (CSR_BASE+0x028)
88 109
89/* EEPROM reads */ 110/*
111 * EEPROM and OTP (one-time-programmable) memory reads
112 *
113 * NOTE: Device must be awake, initialized via apm_ops.init(),
114 * in order to read.
115 */
90#define CSR_EEPROM_REG (CSR_BASE+0x02c) 116#define CSR_EEPROM_REG (CSR_BASE+0x02c)
91#define CSR_EEPROM_GP (CSR_BASE+0x030) 117#define CSR_EEPROM_GP (CSR_BASE+0x030)
92#define CSR_OTP_GP_REG (CSR_BASE+0x034) 118#define CSR_OTP_GP_REG (CSR_BASE+0x034)
119
93#define CSR_GIO_REG (CSR_BASE+0x03C) 120#define CSR_GIO_REG (CSR_BASE+0x03C)
94#define CSR_GP_UCODE_REG (CSR_BASE+0x048) 121#define CSR_GP_UCODE_REG (CSR_BASE+0x048)
95#define CSR_GP_DRIVER_REG (CSR_BASE+0x050) 122#define CSR_GP_DRIVER_REG (CSR_BASE+0x050)
123
124/*
125 * UCODE-DRIVER GP (general purpose) mailbox registers.
126 * SET/CLR registers set/clear bit(s) if "1" is written.
127 */
96#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054) 128#define CSR_UCODE_DRV_GP1 (CSR_BASE+0x054)
97#define CSR_UCODE_DRV_GP1_SET (CSR_BASE+0x058) 129#define CSR_UCODE_DRV_GP1_SET (CSR_BASE+0x058)
98#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c) 130#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c)
99#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060) 131#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060)
132
100#define CSR_LED_REG (CSR_BASE+0x094) 133#define CSR_LED_REG (CSR_BASE+0x094)
101#define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0) 134#define CSR_DRAM_INT_TBL_REG (CSR_BASE+0x0A0)
135
136/* GIO Chicken Bits (PCI Express bus link power management) */
102#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100) 137#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
103 138
104#define CSR_INT_PERIODIC_REG (CSR_BASE+0x005)
105/* Analog phase-lock-loop configuration */ 139/* Analog phase-lock-loop configuration */
106#define CSR_ANA_PLL_CFG (CSR_BASE+0x20c) 140#define CSR_ANA_PLL_CFG (CSR_BASE+0x20c)
141
107/* 142/*
108 * Indicates hardware rev, to determine CCK backoff for txpower calculation. 143 * CSR Hardware Revision Workaround Register. Indicates hardware rev;
144 * "step" determines CCK backoff for txpower calculation. Used for 4965 only.
145 * See also CSR_HW_REV register.
109 * Bit fields: 146 * Bit fields:
110 * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step 147 * 3-2: 0 = A, 1 = B, 2 = C, 3 = D step
148 * 1-0: "Dash" (-) value, as in C-1, etc.
111 */ 149 */
112#define CSR_HW_REV_WA_REG (CSR_BASE+0x22C) 150#define CSR_HW_REV_WA_REG (CSR_BASE+0x22C)
113#define CSR_DBG_HPET_MEM_REG (CSR_BASE+0x240) 151
152#define CSR_DBG_HPET_MEM_REG (CSR_BASE+0x240)
153#define CSR_DBG_LINK_PWR_MGMT_REG (CSR_BASE+0x250)
114 154
115/* Bits for CSR_HW_IF_CONFIG_REG */ 155/* Bits for CSR_HW_IF_CONFIG_REG */
116#define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010) 156#define CSR49_HW_IF_CONFIG_REG_BIT_4965_R (0x00000010)
@@ -125,14 +165,14 @@
125#define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000) 165#define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A (0x00000000)
126#define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000) 166#define CSR39_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B (0x00001000)
127 167
128#define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000) 168#define CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A (0x00080000)
129#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000) 169#define CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM (0x00200000)
130#define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000) 170#define CSR_HW_IF_CONFIG_REG_BIT_NIC_READY (0x00400000) /* PCI_OWN_SEM */
131#define CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE (0x02000000) 171#define CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE (0x02000000) /* ME_OWN */
132#define CSR_HW_IF_CONFIG_REG_PREPARE (0x08000000) 172#define CSR_HW_IF_CONFIG_REG_PREPARE (0x08000000) /* WAKE_ME */
133 173
134#define CSR_INT_PERIODIC_DIS (0x00) 174#define CSR_INT_PERIODIC_DIS (0x00) /* disable periodic int*/
135#define CSR_INT_PERIODIC_ENA (0xFF) 175#define CSR_INT_PERIODIC_ENA (0xFF) /* 255*32 usec ~ 8 msec*/
136 176
137/* interrupt flags in INTA, set by uCode or hardware (e.g. dma), 177/* interrupt flags in INTA, set by uCode or hardware (e.g. dma),
138 * acknowledged (reset) by host writing "1" to flagged bits. */ 178 * acknowledged (reset) by host writing "1" to flagged bits. */
@@ -195,8 +235,46 @@
195#define CSR_RESET_REG_FLAG_SW_RESET (0x00000080) 235#define CSR_RESET_REG_FLAG_SW_RESET (0x00000080)
196#define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100) 236#define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100)
197#define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200) 237#define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200)
238#define CSR_RESET_LINK_PWR_MGMT_DISABLED (0x80000000)
198 239
199/* GP (general purpose) CONTROL */ 240/*
241 * GP (general purpose) CONTROL REGISTER
242 * Bit fields:
243 * 27: HW_RF_KILL_SW
244 * Indicates state of (platform's) hardware RF-Kill switch
245 * 26-24: POWER_SAVE_TYPE
246 * Indicates current power-saving mode:
247 * 000 -- No power saving
248 * 001 -- MAC power-down
249 * 010 -- PHY (radio) power-down
250 * 011 -- Error
251 * 9-6: SYS_CONFIG
252 * Indicates current system configuration, reflecting pins on chip
253 * as forced high/low by device circuit board.
254 * 4: GOING_TO_SLEEP
255 * Indicates MAC is entering a power-saving sleep power-down.
256 * Not a good time to access device-internal resources.
257 * 3: MAC_ACCESS_REQ
258 * Host sets this to request and maintain MAC wakeup, to allow host
259 * access to device-internal resources. Host must wait for
260 * MAC_CLOCK_READY (and !GOING_TO_SLEEP) before accessing non-CSR
261 * device registers.
262 * 2: INIT_DONE
263 * Host sets this to put device into fully operational D0 power mode.
264 * Host resets this after SW_RESET to put device into low power mode.
265 * 0: MAC_CLOCK_READY
266 * Indicates MAC (ucode processor, etc.) is powered up and can run.
267 * Internal resources are accessible.
268 * NOTE: This does not indicate that the processor is actually running.
269 * NOTE: This does not indicate that 4965 or 3945 has completed
270 * init or post-power-down restore of internal SRAM memory.
271 * Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
272 * SRAM is restored and uCode is in normal operation mode.
273 * Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
274 * do not need to save/restore it.
275 * NOTE: After device reset, this bit remains "0" until host sets
276 * INIT_DONE
277 */
200#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY (0x00000001) 278#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY (0x00000001)
201#define CSR_GP_CNTRL_REG_FLAG_INIT_DONE (0x00000004) 279#define CSR_GP_CNTRL_REG_FLAG_INIT_DONE (0x00000004)
202#define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008) 280#define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008)
@@ -229,18 +307,58 @@
229#define CSR_EEPROM_REG_MSK_DATA (0xFFFF0000) 307#define CSR_EEPROM_REG_MSK_DATA (0xFFFF0000)
230 308
231/* EEPROM GP */ 309/* EEPROM GP */
232#define CSR_EEPROM_GP_VALID_MSK (0x00000007) 310#define CSR_EEPROM_GP_VALID_MSK (0x00000007) /* signature */
233#define CSR_EEPROM_GP_BAD_SIGNATURE (0x00000000)
234#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180) 311#define CSR_EEPROM_GP_IF_OWNER_MSK (0x00000180)
312#define CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP (0x00000000)
313#define CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP (0x00000001)
314#define CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K (0x00000002)
315#define CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K (0x00000004)
316
317/* One-time-programmable memory general purpose reg */
235#define CSR_OTP_GP_REG_DEVICE_SELECT (0x00010000) /* 0 - EEPROM, 1 - OTP */ 318#define CSR_OTP_GP_REG_DEVICE_SELECT (0x00010000) /* 0 - EEPROM, 1 - OTP */
236#define CSR_OTP_GP_REG_OTP_ACCESS_MODE (0x00020000) /* 0 - absolute, 1 - relative */ 319#define CSR_OTP_GP_REG_OTP_ACCESS_MODE (0x00020000) /* 0 - absolute, 1 - relative */
237#define CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK (0x00100000) /* bit 20 */ 320#define CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK (0x00100000) /* bit 20 */
238#define CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK (0x00200000) /* bit 21 */ 321#define CSR_OTP_GP_REG_ECC_UNCORR_STATUS_MSK (0x00200000) /* bit 21 */
239 322
323/* GP REG */
324#define CSR_GP_REG_POWER_SAVE_STATUS_MSK (0x03000000) /* bit 24/25 */
325#define CSR_GP_REG_NO_POWER_SAVE (0x00000000)
326#define CSR_GP_REG_MAC_POWER_SAVE (0x01000000)
327#define CSR_GP_REG_PHY_POWER_SAVE (0x02000000)
328#define CSR_GP_REG_POWER_SAVE_ERROR (0x03000000)
329
330
240/* CSR GIO */ 331/* CSR GIO */
241#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002) 332#define CSR_GIO_REG_VAL_L0S_ENABLED (0x00000002)
242 333
243/* UCODE DRV GP */ 334/*
335 * UCODE-DRIVER GP (general purpose) mailbox register 1
336 * Host driver and uCode write and/or read this register to communicate with
337 * each other.
338 * Bit fields:
339 * 4: UCODE_DISABLE
340 * Host sets this to request permanent halt of uCode, same as
341 * sending CARD_STATE command with "halt" bit set.
342 * 3: CT_KILL_EXIT
343 * Host sets this to request exit from CT_KILL state, i.e. host thinks
344 * device temperature is low enough to continue normal operation.
345 * 2: CMD_BLOCKED
346 * Host sets this during RF KILL power-down sequence (HW, SW, CT KILL)
347 * to release uCode to clear all Tx and command queues, enter
348 * unassociated mode, and power down.
349 * NOTE: Some devices also use HBUS_TARG_MBX_C register for this bit.
350 * 1: SW_BIT_RFKILL
351 * Host sets this when issuing CARD_STATE command to request
352 * device sleep.
353 * 0: MAC_SLEEP
354 * uCode sets this when preparing a power-saving power-down.
355 * uCode resets this when power-up is complete and SRAM is sane.
356 * NOTE: 3945/4965 saves internal SRAM data to host when powering down,
357 * and must restore this data after powering back up.
358 * MAC_SLEEP is the best indication that restore is complete.
359 * Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
360 * do not need to save/restore it.
361 */
244#define CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP (0x00000001) 362#define CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP (0x00000001)
245#define CSR_UCODE_SW_BIT_RFKILL (0x00000002) 363#define CSR_UCODE_SW_BIT_RFKILL (0x00000002)
246#define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004) 364#define CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED (0x00000004)
@@ -251,9 +369,9 @@
251#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_3x3_HYB (0x00000000) 369#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_3x3_HYB (0x00000000)
252#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_HYB (0x00000001) 370#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_HYB (0x00000001)
253#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA (0x00000002) 371#define CSR_GP_DRIVER_REG_BIT_RADIO_SKU_2x2_IPA (0x00000002)
372#define CSR_GP_DRIVER_REG_BIT_CALIB_VERSION6 (0x00000004)
254 373
255 374/* GIO Chicken Bits (PCI Express bus link power management) */
256/* GI Chicken Bits */
257#define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000) 375#define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000)
258#define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000) 376#define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000)
259 377
@@ -273,8 +391,23 @@
273#define CSR_DRAM_INT_TBL_ENABLE (1 << 31) 391#define CSR_DRAM_INT_TBL_ENABLE (1 << 31)
274#define CSR_DRAM_INIT_TBL_WRAP_CHECK (1 << 27) 392#define CSR_DRAM_INIT_TBL_WRAP_CHECK (1 << 27)
275 393
276/*=== HBUS (Host-side Bus) ===*/ 394/*
395 * HBUS (Host-side Bus)
396 *
397 * HBUS registers are mapped directly into PCI bus space, but are used
398 * to indirectly access device's internal memory or registers that
399 * may be powered-down.
400 *
401 * Use iwl_write_direct32()/iwl_read_direct32() family for these registers;
402 * host must "grab nic access" via CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ
403 * to make sure the MAC (uCode processor, etc.) is powered up for accessing
404 * internal resources.
405 *
406 * Do not use iwl_write32()/iwl_read32() family to access these registers;
407 * these provide only simple PCI bus access, without waking up the MAC.
408 */
277#define HBUS_BASE (0x400) 409#define HBUS_BASE (0x400)
410
278/* 411/*
279 * Registers for accessing device's internal SRAM memory (e.g. SCD SRAM 412 * Registers for accessing device's internal SRAM memory (e.g. SCD SRAM
280 * structures, error log, event log, verifying uCode load). 413 * structures, error log, event log, verifying uCode load).
@@ -289,6 +422,10 @@
289#define HBUS_TARG_MEM_WDAT (HBUS_BASE+0x018) 422#define HBUS_TARG_MEM_WDAT (HBUS_BASE+0x018)
290#define HBUS_TARG_MEM_RDAT (HBUS_BASE+0x01c) 423#define HBUS_TARG_MEM_RDAT (HBUS_BASE+0x01c)
291 424
425/* Mailbox C, used as workaround alternative to CSR_UCODE_DRV_GP1 mailbox */
426#define HBUS_TARG_MBX_C (HBUS_BASE+0x030)
427#define HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED (0x00000004)
428
292/* 429/*
293 * Registers for accessing device's internal peripheral registers 430 * Registers for accessing device's internal peripheral registers
294 * (e.g. SCD, BSM, etc.). First write to address register, 431 * (e.g. SCD, BSM, etc.). First write to address register,
@@ -303,16 +440,12 @@
303#define HBUS_TARG_PRPH_RDAT (HBUS_BASE+0x050) 440#define HBUS_TARG_PRPH_RDAT (HBUS_BASE+0x050)
304 441
305/* 442/*
306 * Per-Tx-queue write pointer (index, really!) (3945 and 4965). 443 * Per-Tx-queue write pointer (index, really!)
307 * Indicates index to next TFD that driver will fill (1 past latest filled). 444 * Indicates index to next TFD that driver will fill (1 past latest filled).
308 * Bit usage: 445 * Bit usage:
309 * 0-7: queue write index 446 * 0-7: queue write index
310 * 11-8: queue selector 447 * 11-8: queue selector
311 */ 448 */
312#define HBUS_TARG_WRPTR (HBUS_BASE+0x060) 449#define HBUS_TARG_WRPTR (HBUS_BASE+0x060)
313#define HBUS_TARG_MBX_C (HBUS_BASE+0x030)
314
315#define HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED (0x00000004)
316
317 450
318#endif /* !__iwl_csr_h__ */ 451#endif /* !__iwl_csr_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-debug.h b/drivers/net/wireless/iwlwifi/iwl-debug.h
index cbc62904655d..1c7b53d511c7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debug.h
+++ b/drivers/net/wireless/iwlwifi/iwl-debug.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project. 5 * Portions of this file are derived from the ipw3945 project.
6 * 6 *
@@ -67,56 +67,6 @@ do { \
67 DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \ 67 DUMP_PREFIX_OFFSET, 16, 1, p, len, 1); \
68} while (0) 68} while (0)
69 69
70#ifdef CONFIG_IWLWIFI_DEBUGFS
71struct iwl_debugfs {
72 const char *name;
73 struct dentry *dir_drv;
74 struct dentry *dir_data;
75 struct dentry *dir_debug;
76 struct dentry *dir_rf;
77 struct dir_data_files {
78 struct dentry *file_sram;
79 struct dentry *file_nvm;
80 struct dentry *file_stations;
81 struct dentry *file_log_event;
82 struct dentry *file_channels;
83 struct dentry *file_status;
84 struct dentry *file_interrupt;
85 struct dentry *file_qos;
86 struct dentry *file_thermal_throttling;
87#ifdef CONFIG_IWLWIFI_LEDS
88 struct dentry *file_led;
89#endif
90 struct dentry *file_disable_ht40;
91 struct dentry *file_sleep_level_override;
92 struct dentry *file_current_sleep_command;
93 } dbgfs_data_files;
94 struct dir_rf_files {
95 struct dentry *file_disable_sensitivity;
96 struct dentry *file_disable_chain_noise;
97 struct dentry *file_disable_tx_power;
98 } dbgfs_rf_files;
99 struct dir_debug_files {
100 struct dentry *file_rx_statistics;
101 struct dentry *file_tx_statistics;
102 struct dentry *file_traffic_log;
103 struct dentry *file_rx_queue;
104 struct dentry *file_tx_queue;
105 struct dentry *file_ucode_rx_stats;
106 struct dentry *file_ucode_tx_stats;
107 struct dentry *file_ucode_general_stats;
108 struct dentry *file_sensitivity;
109 struct dentry *file_chain_noise;
110 struct dentry *file_tx_power;
111 } dbgfs_debug_files;
112 u32 sram_offset;
113 u32 sram_len;
114};
115
116int iwl_dbgfs_register(struct iwl_priv *priv, const char *name);
117void iwl_dbgfs_unregister(struct iwl_priv *priv);
118#endif
119
120#else 70#else
121#define IWL_DEBUG(__priv, level, fmt, args...) 71#define IWL_DEBUG(__priv, level, fmt, args...)
122#define IWL_DEBUG_LIMIT(__priv, level, fmt, args...) 72#define IWL_DEBUG_LIMIT(__priv, level, fmt, args...)
@@ -125,9 +75,10 @@ static inline void iwl_print_hex_dump(struct iwl_priv *priv, int level,
125{} 75{}
126#endif /* CONFIG_IWLWIFI_DEBUG */ 76#endif /* CONFIG_IWLWIFI_DEBUG */
127 77
128 78#ifdef CONFIG_IWLWIFI_DEBUGFS
129 79int iwl_dbgfs_register(struct iwl_priv *priv, const char *name);
130#ifndef CONFIG_IWLWIFI_DEBUGFS 80void iwl_dbgfs_unregister(struct iwl_priv *priv);
81#else
131static inline int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) 82static inline int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
132{ 83{
133 return 0; 84 return 0;
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index a198bcf61022..b6e1b0ebe230 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * GPL LICENSE SUMMARY 3 * GPL LICENSE SUMMARY
4 * 4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as 8 * it under the terms of version 2 of the GNU General Public License as
@@ -26,6 +26,7 @@
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/ 27 *****************************************************************************/
28 28
29#include <linux/slab.h>
29#include <linux/kernel.h> 30#include <linux/kernel.h>
30#include <linux/module.h> 31#include <linux/module.h>
31#include <linux/debugfs.h> 32#include <linux/debugfs.h>
@@ -41,43 +42,28 @@
41#include "iwl-calib.h" 42#include "iwl-calib.h"
42 43
43/* create and remove of files */ 44/* create and remove of files */
44#define DEBUGFS_ADD_DIR(name, parent) do { \ 45#define DEBUGFS_ADD_FILE(name, parent, mode) do { \
45 dbgfs->dir_##name = debugfs_create_dir(#name, parent); \ 46 if (!debugfs_create_file(#name, mode, parent, priv, \
46 if (!(dbgfs->dir_##name)) \ 47 &iwl_dbgfs_##name##_ops)) \
47 goto err; \ 48 goto err; \
48} while (0) 49} while (0)
49 50
50#define DEBUGFS_ADD_FILE(name, parent) do { \ 51#define DEBUGFS_ADD_BOOL(name, parent, ptr) do { \
51 dbgfs->dbgfs_##parent##_files.file_##name = \ 52 struct dentry *__tmp; \
52 debugfs_create_file(#name, S_IWUSR | S_IRUSR, \ 53 __tmp = debugfs_create_bool(#name, S_IWUSR | S_IRUSR, \
53 dbgfs->dir_##parent, priv, \ 54 parent, ptr); \
54 &iwl_dbgfs_##name##_ops); \ 55 if (IS_ERR(__tmp) || !__tmp) \
55 if (!(dbgfs->dbgfs_##parent##_files.file_##name)) \ 56 goto err; \
56 goto err; \
57} while (0) 57} while (0)
58 58
59#define DEBUGFS_ADD_BOOL(name, parent, ptr) do { \ 59#define DEBUGFS_ADD_X32(name, parent, ptr) do { \
60 dbgfs->dbgfs_##parent##_files.file_##name = \ 60 struct dentry *__tmp; \
61 debugfs_create_bool(#name, S_IWUSR | S_IRUSR, \ 61 __tmp = debugfs_create_x32(#name, S_IWUSR | S_IRUSR, \
62 dbgfs->dir_##parent, ptr); \ 62 parent, ptr); \
63 if (IS_ERR(dbgfs->dbgfs_##parent##_files.file_##name) \ 63 if (IS_ERR(__tmp) || !__tmp) \
64 || !dbgfs->dbgfs_##parent##_files.file_##name) \ 64 goto err; \
65 goto err; \
66} while (0) 65} while (0)
67 66
68#define DEBUGFS_ADD_X32(name, parent, ptr) do { \
69 dbgfs->dbgfs_##parent##_files.file_##name = \
70 debugfs_create_x32(#name, S_IRUSR, dbgfs->dir_##parent, ptr); \
71 if (IS_ERR(dbgfs->dbgfs_##parent##_files.file_##name) \
72 || !dbgfs->dbgfs_##parent##_files.file_##name) \
73 goto err; \
74} while (0)
75
76#define DEBUGFS_REMOVE(name) do { \
77 debugfs_remove(name); \
78 name = NULL; \
79} while (0);
80
81/* file operation */ 67/* file operation */
82#define DEBUGFS_READ_FUNC(name) \ 68#define DEBUGFS_READ_FUNC(name) \
83static ssize_t iwl_dbgfs_##name##_read(struct file *file, \ 69static ssize_t iwl_dbgfs_##name##_read(struct file *file, \
@@ -125,27 +111,28 @@ static ssize_t iwl_dbgfs_tx_statistics_read(struct file *file,
125 char __user *user_buf, 111 char __user *user_buf,
126 size_t count, loff_t *ppos) { 112 size_t count, loff_t *ppos) {
127 113
128 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 114 struct iwl_priv *priv = file->private_data;
129 char *buf; 115 char *buf;
130 int pos = 0; 116 int pos = 0;
131 117
132 int cnt; 118 int cnt;
133 ssize_t ret; 119 ssize_t ret;
134 const size_t bufsz = 100 + sizeof(char) * 24 * (MANAGEMENT_MAX + CONTROL_MAX); 120 const size_t bufsz = 100 +
121 sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX);
135 buf = kzalloc(bufsz, GFP_KERNEL); 122 buf = kzalloc(bufsz, GFP_KERNEL);
136 if (!buf) 123 if (!buf)
137 return -ENOMEM; 124 return -ENOMEM;
138 pos += scnprintf(buf + pos, bufsz - pos, "Management:\n"); 125 pos += scnprintf(buf + pos, bufsz - pos, "Management:\n");
139 for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) { 126 for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) {
140 pos += scnprintf(buf + pos, bufsz - pos, 127 pos += scnprintf(buf + pos, bufsz - pos,
141 "\t%s\t\t: %u\n", 128 "\t%25s\t\t: %u\n",
142 get_mgmt_string(cnt), 129 get_mgmt_string(cnt),
143 priv->tx_stats.mgmt[cnt]); 130 priv->tx_stats.mgmt[cnt]);
144 } 131 }
145 pos += scnprintf(buf + pos, bufsz - pos, "Control\n"); 132 pos += scnprintf(buf + pos, bufsz - pos, "Control\n");
146 for (cnt = 0; cnt < CONTROL_MAX; cnt++) { 133 for (cnt = 0; cnt < CONTROL_MAX; cnt++) {
147 pos += scnprintf(buf + pos, bufsz - pos, 134 pos += scnprintf(buf + pos, bufsz - pos,
148 "\t%s\t\t: %u\n", 135 "\t%25s\t\t: %u\n",
149 get_ctrl_string(cnt), 136 get_ctrl_string(cnt),
150 priv->tx_stats.ctrl[cnt]); 137 priv->tx_stats.ctrl[cnt]);
151 } 138 }
@@ -159,7 +146,7 @@ static ssize_t iwl_dbgfs_tx_statistics_read(struct file *file,
159 return ret; 146 return ret;
160} 147}
161 148
162static ssize_t iwl_dbgfs_tx_statistics_write(struct file *file, 149static ssize_t iwl_dbgfs_clear_traffic_statistics_write(struct file *file,
163 const char __user *user_buf, 150 const char __user *user_buf,
164 size_t count, loff_t *ppos) 151 size_t count, loff_t *ppos)
165{ 152{
@@ -174,8 +161,7 @@ static ssize_t iwl_dbgfs_tx_statistics_write(struct file *file,
174 return -EFAULT; 161 return -EFAULT;
175 if (sscanf(buf, "%x", &clear_flag) != 1) 162 if (sscanf(buf, "%x", &clear_flag) != 1)
176 return -EFAULT; 163 return -EFAULT;
177 if (clear_flag == 1) 164 iwl_clear_traffic_stats(priv);
178 iwl_clear_tx_stats(priv);
179 165
180 return count; 166 return count;
181} 167}
@@ -184,13 +170,13 @@ static ssize_t iwl_dbgfs_rx_statistics_read(struct file *file,
184 char __user *user_buf, 170 char __user *user_buf,
185 size_t count, loff_t *ppos) { 171 size_t count, loff_t *ppos) {
186 172
187 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 173 struct iwl_priv *priv = file->private_data;
188 char *buf; 174 char *buf;
189 int pos = 0; 175 int pos = 0;
190 int cnt; 176 int cnt;
191 ssize_t ret; 177 ssize_t ret;
192 const size_t bufsz = 100 + 178 const size_t bufsz = 100 +
193 sizeof(char) * 24 * (MANAGEMENT_MAX + CONTROL_MAX); 179 sizeof(char) * 50 * (MANAGEMENT_MAX + CONTROL_MAX);
194 buf = kzalloc(bufsz, GFP_KERNEL); 180 buf = kzalloc(bufsz, GFP_KERNEL);
195 if (!buf) 181 if (!buf)
196 return -ENOMEM; 182 return -ENOMEM;
@@ -198,14 +184,14 @@ static ssize_t iwl_dbgfs_rx_statistics_read(struct file *file,
198 pos += scnprintf(buf + pos, bufsz - pos, "Management:\n"); 184 pos += scnprintf(buf + pos, bufsz - pos, "Management:\n");
199 for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) { 185 for (cnt = 0; cnt < MANAGEMENT_MAX; cnt++) {
200 pos += scnprintf(buf + pos, bufsz - pos, 186 pos += scnprintf(buf + pos, bufsz - pos,
201 "\t%s\t\t: %u\n", 187 "\t%25s\t\t: %u\n",
202 get_mgmt_string(cnt), 188 get_mgmt_string(cnt),
203 priv->rx_stats.mgmt[cnt]); 189 priv->rx_stats.mgmt[cnt]);
204 } 190 }
205 pos += scnprintf(buf + pos, bufsz - pos, "Control:\n"); 191 pos += scnprintf(buf + pos, bufsz - pos, "Control:\n");
206 for (cnt = 0; cnt < CONTROL_MAX; cnt++) { 192 for (cnt = 0; cnt < CONTROL_MAX; cnt++) {
207 pos += scnprintf(buf + pos, bufsz - pos, 193 pos += scnprintf(buf + pos, bufsz - pos,
208 "\t%s\t\t: %u\n", 194 "\t%25s\t\t: %u\n",
209 get_ctrl_string(cnt), 195 get_ctrl_string(cnt),
210 priv->rx_stats.ctrl[cnt]); 196 priv->rx_stats.ctrl[cnt]);
211 } 197 }
@@ -220,26 +206,6 @@ static ssize_t iwl_dbgfs_rx_statistics_read(struct file *file,
220 return ret; 206 return ret;
221} 207}
222 208
223static ssize_t iwl_dbgfs_rx_statistics_write(struct file *file,
224 const char __user *user_buf,
225 size_t count, loff_t *ppos)
226{
227 struct iwl_priv *priv = file->private_data;
228 u32 clear_flag;
229 char buf[8];
230 int buf_size;
231
232 memset(buf, 0, sizeof(buf));
233 buf_size = min(count, sizeof(buf) - 1);
234 if (copy_from_user(buf, user_buf, buf_size))
235 return -EFAULT;
236 if (sscanf(buf, "%x", &clear_flag) != 1)
237 return -EFAULT;
238 if (clear_flag == 1)
239 iwl_clear_rx_stats(priv);
240 return count;
241}
242
243#define BYTE1_MASK 0x000000ff; 209#define BYTE1_MASK 0x000000ff;
244#define BYTE2_MASK 0x0000ffff; 210#define BYTE2_MASK 0x0000ffff;
245#define BYTE3_MASK 0x00ffffff; 211#define BYTE3_MASK 0x00ffffff;
@@ -248,16 +214,32 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
248 size_t count, loff_t *ppos) 214 size_t count, loff_t *ppos)
249{ 215{
250 u32 val; 216 u32 val;
251 char buf[1024]; 217 char *buf;
252 ssize_t ret; 218 ssize_t ret;
253 int i; 219 int i;
254 int pos = 0; 220 int pos = 0;
255 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 221 struct iwl_priv *priv = file->private_data;
256 const size_t bufsz = sizeof(buf); 222 size_t bufsz;
257 223
258 for (i = priv->dbgfs->sram_len; i > 0; i -= 4) { 224 /* default is to dump the entire data segment */
259 val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \ 225 if (!priv->dbgfs_sram_offset && !priv->dbgfs_sram_len) {
260 priv->dbgfs->sram_len - i); 226 priv->dbgfs_sram_offset = 0x800000;
227 if (priv->ucode_type == UCODE_INIT)
228 priv->dbgfs_sram_len = priv->ucode_init_data.len;
229 else
230 priv->dbgfs_sram_len = priv->ucode_data.len;
231 }
232 bufsz = 30 + priv->dbgfs_sram_len * sizeof(char) * 10;
233 buf = kmalloc(bufsz, GFP_KERNEL);
234 if (!buf)
235 return -ENOMEM;
236 pos += scnprintf(buf + pos, bufsz - pos, "sram_len: 0x%x\n",
237 priv->dbgfs_sram_len);
238 pos += scnprintf(buf + pos, bufsz - pos, "sram_offset: 0x%x\n",
239 priv->dbgfs_sram_offset);
240 for (i = priv->dbgfs_sram_len; i > 0; i -= 4) {
241 val = iwl_read_targ_mem(priv, priv->dbgfs_sram_offset + \
242 priv->dbgfs_sram_len - i);
261 if (i < 4) { 243 if (i < 4) {
262 switch (i) { 244 switch (i) {
263 case 1: 245 case 1:
@@ -271,11 +253,14 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
271 break; 253 break;
272 } 254 }
273 } 255 }
256 if (!(i % 16))
257 pos += scnprintf(buf + pos, bufsz - pos, "\n");
274 pos += scnprintf(buf + pos, bufsz - pos, "0x%08x ", val); 258 pos += scnprintf(buf + pos, bufsz - pos, "0x%08x ", val);
275 } 259 }
276 pos += scnprintf(buf + pos, bufsz - pos, "\n"); 260 pos += scnprintf(buf + pos, bufsz - pos, "\n");
277 261
278 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 262 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
263 kfree(buf);
279 return ret; 264 return ret;
280} 265}
281 266
@@ -294,11 +279,11 @@ static ssize_t iwl_dbgfs_sram_write(struct file *file,
294 return -EFAULT; 279 return -EFAULT;
295 280
296 if (sscanf(buf, "%x,%x", &offset, &len) == 2) { 281 if (sscanf(buf, "%x,%x", &offset, &len) == 2) {
297 priv->dbgfs->sram_offset = offset; 282 priv->dbgfs_sram_offset = offset;
298 priv->dbgfs->sram_len = len; 283 priv->dbgfs_sram_len = len;
299 } else { 284 } else {
300 priv->dbgfs->sram_offset = 0; 285 priv->dbgfs_sram_offset = 0;
301 priv->dbgfs->sram_len = 0; 286 priv->dbgfs_sram_len = 0;
302 } 287 }
303 288
304 return count; 289 return count;
@@ -307,7 +292,7 @@ static ssize_t iwl_dbgfs_sram_write(struct file *file,
307static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf, 292static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf,
308 size_t count, loff_t *ppos) 293 size_t count, loff_t *ppos)
309{ 294{
310 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 295 struct iwl_priv *priv = file->private_data;
311 struct iwl_station_entry *station; 296 struct iwl_station_entry *station;
312 int max_sta = priv->hw_params.max_stations; 297 int max_sta = priv->hw_params.max_stations;
313 char *buf; 298 char *buf;
@@ -335,8 +320,6 @@ static ssize_t iwl_dbgfs_stations_read(struct file *file, char __user *user_buf,
335 pos += scnprintf(buf + pos, bufsz - pos, 320 pos += scnprintf(buf + pos, bufsz - pos,
336 "flags: 0x%x\n", 321 "flags: 0x%x\n",
337 station->sta.station_flags_msk); 322 station->sta.station_flags_msk);
338 pos += scnprintf(buf + pos, bufsz - pos,
339 "ps_status: %u\n", station->ps_status);
340 pos += scnprintf(buf + pos, bufsz - pos, "tid data:\n"); 323 pos += scnprintf(buf + pos, bufsz - pos, "tid data:\n");
341 pos += scnprintf(buf + pos, bufsz - pos, 324 pos += scnprintf(buf + pos, bufsz - pos,
342 "seq_num\t\ttxq_id"); 325 "seq_num\t\ttxq_id");
@@ -379,10 +362,11 @@ static ssize_t iwl_dbgfs_nvm_read(struct file *file,
379 loff_t *ppos) 362 loff_t *ppos)
380{ 363{
381 ssize_t ret; 364 ssize_t ret;
382 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 365 struct iwl_priv *priv = file->private_data;
383 int pos = 0, ofs = 0, buf_size = 0; 366 int pos = 0, ofs = 0, buf_size = 0;
384 const u8 *ptr; 367 const u8 *ptr;
385 char *buf; 368 char *buf;
369 u16 eeprom_ver;
386 size_t eeprom_len = priv->cfg->eeprom_size; 370 size_t eeprom_len = priv->cfg->eeprom_size;
387 buf_size = 4 * eeprom_len + 256; 371 buf_size = 4 * eeprom_len + 256;
388 372
@@ -403,9 +387,11 @@ static ssize_t iwl_dbgfs_nvm_read(struct file *file,
403 IWL_ERR(priv, "Can not allocate Buffer\n"); 387 IWL_ERR(priv, "Can not allocate Buffer\n");
404 return -ENOMEM; 388 return -ENOMEM;
405 } 389 }
406 pos += scnprintf(buf + pos, buf_size - pos, "NVM Type: %s\n", 390 eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
391 pos += scnprintf(buf + pos, buf_size - pos, "NVM Type: %s, "
392 "version: 0x%x\n",
407 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) 393 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
408 ? "OTP" : "EEPROM"); 394 ? "OTP" : "EEPROM", eeprom_ver);
409 for (ofs = 0 ; ofs < eeprom_len ; ofs += 16) { 395 for (ofs = 0 ; ofs < eeprom_len ; ofs += 16) {
410 pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs); 396 pos += scnprintf(buf + pos, buf_size - pos, "0x%.4x ", ofs);
411 hex_dump_to_buffer(ptr + ofs, 16 , 16, 2, buf + pos, 397 hex_dump_to_buffer(ptr + ofs, 16 , 16, 2, buf + pos,
@@ -420,6 +406,24 @@ static ssize_t iwl_dbgfs_nvm_read(struct file *file,
420 return ret; 406 return ret;
421} 407}
422 408
409static ssize_t iwl_dbgfs_log_event_read(struct file *file,
410 char __user *user_buf,
411 size_t count, loff_t *ppos)
412{
413 struct iwl_priv *priv = file->private_data;
414 char *buf;
415 int pos = 0;
416 ssize_t ret = -ENOMEM;
417
418 ret = pos = priv->cfg->ops->lib->dump_nic_event_log(
419 priv, true, &buf, true);
420 if (buf) {
421 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
422 kfree(buf);
423 }
424 return ret;
425}
426
423static ssize_t iwl_dbgfs_log_event_write(struct file *file, 427static ssize_t iwl_dbgfs_log_event_write(struct file *file,
424 const char __user *user_buf, 428 const char __user *user_buf,
425 size_t count, loff_t *ppos) 429 size_t count, loff_t *ppos)
@@ -436,7 +440,8 @@ static ssize_t iwl_dbgfs_log_event_write(struct file *file,
436 if (sscanf(buf, "%d", &event_log_flag) != 1) 440 if (sscanf(buf, "%d", &event_log_flag) != 1)
437 return -EFAULT; 441 return -EFAULT;
438 if (event_log_flag == 1) 442 if (event_log_flag == 1)
439 priv->cfg->ops->lib->dump_nic_event_log(priv); 443 priv->cfg->ops->lib->dump_nic_event_log(priv, true,
444 NULL, false);
440 445
441 return count; 446 return count;
442} 447}
@@ -446,7 +451,7 @@ static ssize_t iwl_dbgfs_log_event_write(struct file *file,
446static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf, 451static ssize_t iwl_dbgfs_channels_read(struct file *file, char __user *user_buf,
447 size_t count, loff_t *ppos) 452 size_t count, loff_t *ppos)
448{ 453{
449 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 454 struct iwl_priv *priv = file->private_data;
450 struct ieee80211_channel *channels = NULL; 455 struct ieee80211_channel *channels = NULL;
451 const struct ieee80211_supported_band *supp_band = NULL; 456 const struct ieee80211_supported_band *supp_band = NULL;
452 int pos = 0, i, bufsz = PAGE_SIZE; 457 int pos = 0, i, bufsz = PAGE_SIZE;
@@ -519,19 +524,19 @@ static ssize_t iwl_dbgfs_status_read(struct file *file,
519 char __user *user_buf, 524 char __user *user_buf,
520 size_t count, loff_t *ppos) { 525 size_t count, loff_t *ppos) {
521 526
522 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 527 struct iwl_priv *priv = file->private_data;
523 char buf[512]; 528 char buf[512];
524 int pos = 0; 529 int pos = 0;
525 const size_t bufsz = sizeof(buf); 530 const size_t bufsz = sizeof(buf);
526 531
527 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_HCMD_ACTIVE:\t %d\n", 532 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_HCMD_ACTIVE:\t %d\n",
528 test_bit(STATUS_HCMD_ACTIVE, &priv->status)); 533 test_bit(STATUS_HCMD_ACTIVE, &priv->status));
529 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_HCMD_SYNC_ACTIVE: %d\n",
530 test_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status));
531 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_INT_ENABLED:\t %d\n", 534 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_INT_ENABLED:\t %d\n",
532 test_bit(STATUS_INT_ENABLED, &priv->status)); 535 test_bit(STATUS_INT_ENABLED, &priv->status));
533 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_RF_KILL_HW:\t %d\n", 536 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_RF_KILL_HW:\t %d\n",
534 test_bit(STATUS_RF_KILL_HW, &priv->status)); 537 test_bit(STATUS_RF_KILL_HW, &priv->status));
538 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_CT_KILL:\t\t %d\n",
539 test_bit(STATUS_CT_KILL, &priv->status));
535 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_INIT:\t\t %d\n", 540 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_INIT:\t\t %d\n",
536 test_bit(STATUS_INIT, &priv->status)); 541 test_bit(STATUS_INIT, &priv->status));
537 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_ALIVE:\t\t %d\n", 542 pos += scnprintf(buf + pos, bufsz - pos, "STATUS_ALIVE:\t\t %d\n",
@@ -565,7 +570,7 @@ static ssize_t iwl_dbgfs_interrupt_read(struct file *file,
565 char __user *user_buf, 570 char __user *user_buf,
566 size_t count, loff_t *ppos) { 571 size_t count, loff_t *ppos) {
567 572
568 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 573 struct iwl_priv *priv = file->private_data;
569 int pos = 0; 574 int pos = 0;
570 int cnt = 0; 575 int cnt = 0;
571 char *buf; 576 char *buf;
@@ -652,7 +657,7 @@ static ssize_t iwl_dbgfs_interrupt_write(struct file *file,
652static ssize_t iwl_dbgfs_qos_read(struct file *file, char __user *user_buf, 657static ssize_t iwl_dbgfs_qos_read(struct file *file, char __user *user_buf,
653 size_t count, loff_t *ppos) 658 size_t count, loff_t *ppos)
654{ 659{
655 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 660 struct iwl_priv *priv = file->private_data;
656 int pos = 0, i; 661 int pos = 0, i;
657 char buf[256]; 662 char buf[256];
658 const size_t bufsz = sizeof(buf); 663 const size_t bufsz = sizeof(buf);
@@ -672,11 +677,10 @@ static ssize_t iwl_dbgfs_qos_read(struct file *file, char __user *user_buf,
672 return ret; 677 return ret;
673} 678}
674 679
675#ifdef CONFIG_IWLWIFI_LEDS
676static ssize_t iwl_dbgfs_led_read(struct file *file, char __user *user_buf, 680static ssize_t iwl_dbgfs_led_read(struct file *file, char __user *user_buf,
677 size_t count, loff_t *ppos) 681 size_t count, loff_t *ppos)
678{ 682{
679 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 683 struct iwl_priv *priv = file->private_data;
680 int pos = 0; 684 int pos = 0;
681 char buf[256]; 685 char buf[256];
682 const size_t bufsz = sizeof(buf); 686 const size_t bufsz = sizeof(buf);
@@ -697,13 +701,12 @@ static ssize_t iwl_dbgfs_led_read(struct file *file, char __user *user_buf,
697 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 701 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
698 return ret; 702 return ret;
699} 703}
700#endif
701 704
702static ssize_t iwl_dbgfs_thermal_throttling_read(struct file *file, 705static ssize_t iwl_dbgfs_thermal_throttling_read(struct file *file,
703 char __user *user_buf, 706 char __user *user_buf,
704 size_t count, loff_t *ppos) 707 size_t count, loff_t *ppos)
705{ 708{
706 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 709 struct iwl_priv *priv = file->private_data;
707 struct iwl_tt_mgmt *tt = &priv->thermal_throttle; 710 struct iwl_tt_mgmt *tt = &priv->thermal_throttle;
708 struct iwl_tt_restriction *restriction; 711 struct iwl_tt_restriction *restriction;
709 char buf[100]; 712 char buf[100];
@@ -763,7 +766,7 @@ static ssize_t iwl_dbgfs_disable_ht40_read(struct file *file,
763 char __user *user_buf, 766 char __user *user_buf,
764 size_t count, loff_t *ppos) 767 size_t count, loff_t *ppos)
765{ 768{
766 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 769 struct iwl_priv *priv = file->private_data;
767 char buf[100]; 770 char buf[100];
768 int pos = 0; 771 int pos = 0;
769 const size_t bufsz = sizeof(buf); 772 const size_t bufsz = sizeof(buf);
@@ -798,15 +801,22 @@ static ssize_t iwl_dbgfs_sleep_level_override_write(struct file *file,
798 * valid here. However, let's not confuse them and present 801 * valid here. However, let's not confuse them and present
799 * IWL_POWER_INDEX_1 as "1", not "0". 802 * IWL_POWER_INDEX_1 as "1", not "0".
800 */ 803 */
801 if (value > 0) 804 if (value == 0)
805 return -EINVAL;
806 else if (value > 0)
802 value -= 1; 807 value -= 1;
803 808
804 if (value != -1 && (value < 0 || value >= IWL_POWER_NUM)) 809 if (value != -1 && (value < 0 || value >= IWL_POWER_NUM))
805 return -EINVAL; 810 return -EINVAL;
806 811
812 if (!iwl_is_ready_rf(priv))
813 return -EAGAIN;
814
807 priv->power_data.debug_sleep_level_override = value; 815 priv->power_data.debug_sleep_level_override = value;
808 816
809 iwl_power_update_mode(priv, false); 817 mutex_lock(&priv->mutex);
818 iwl_power_update_mode(priv, true);
819 mutex_unlock(&priv->mutex);
810 820
811 return count; 821 return count;
812} 822}
@@ -815,7 +825,7 @@ static ssize_t iwl_dbgfs_sleep_level_override_read(struct file *file,
815 char __user *user_buf, 825 char __user *user_buf,
816 size_t count, loff_t *ppos) 826 size_t count, loff_t *ppos)
817{ 827{
818 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 828 struct iwl_priv *priv = file->private_data;
819 char buf[10]; 829 char buf[10];
820 int pos, value; 830 int pos, value;
821 const size_t bufsz = sizeof(buf); 831 const size_t bufsz = sizeof(buf);
@@ -833,7 +843,7 @@ static ssize_t iwl_dbgfs_current_sleep_command_read(struct file *file,
833 char __user *user_buf, 843 char __user *user_buf,
834 size_t count, loff_t *ppos) 844 size_t count, loff_t *ppos)
835{ 845{
836 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 846 struct iwl_priv *priv = file->private_data;
837 char buf[200]; 847 char buf[200];
838 int pos = 0, i; 848 int pos = 0, i;
839 const size_t bufsz = sizeof(buf); 849 const size_t bufsz = sizeof(buf);
@@ -854,16 +864,14 @@ static ssize_t iwl_dbgfs_current_sleep_command_read(struct file *file,
854} 864}
855 865
856DEBUGFS_READ_WRITE_FILE_OPS(sram); 866DEBUGFS_READ_WRITE_FILE_OPS(sram);
857DEBUGFS_WRITE_FILE_OPS(log_event); 867DEBUGFS_READ_WRITE_FILE_OPS(log_event);
858DEBUGFS_READ_FILE_OPS(nvm); 868DEBUGFS_READ_FILE_OPS(nvm);
859DEBUGFS_READ_FILE_OPS(stations); 869DEBUGFS_READ_FILE_OPS(stations);
860DEBUGFS_READ_FILE_OPS(channels); 870DEBUGFS_READ_FILE_OPS(channels);
861DEBUGFS_READ_FILE_OPS(status); 871DEBUGFS_READ_FILE_OPS(status);
862DEBUGFS_READ_WRITE_FILE_OPS(interrupt); 872DEBUGFS_READ_WRITE_FILE_OPS(interrupt);
863DEBUGFS_READ_FILE_OPS(qos); 873DEBUGFS_READ_FILE_OPS(qos);
864#ifdef CONFIG_IWLWIFI_LEDS
865DEBUGFS_READ_FILE_OPS(led); 874DEBUGFS_READ_FILE_OPS(led);
866#endif
867DEBUGFS_READ_FILE_OPS(thermal_throttling); 875DEBUGFS_READ_FILE_OPS(thermal_throttling);
868DEBUGFS_READ_WRITE_FILE_OPS(disable_ht40); 876DEBUGFS_READ_WRITE_FILE_OPS(disable_ht40);
869DEBUGFS_READ_WRITE_FILE_OPS(sleep_level_override); 877DEBUGFS_READ_WRITE_FILE_OPS(sleep_level_override);
@@ -881,10 +889,14 @@ static ssize_t iwl_dbgfs_traffic_log_read(struct file *file,
881 struct iwl_rx_queue *rxq = &priv->rxq; 889 struct iwl_rx_queue *rxq = &priv->rxq;
882 char *buf; 890 char *buf;
883 int bufsz = ((IWL_TRAFFIC_ENTRIES * IWL_TRAFFIC_ENTRY_SIZE * 64) * 2) + 891 int bufsz = ((IWL_TRAFFIC_ENTRIES * IWL_TRAFFIC_ENTRY_SIZE * 64) * 2) +
884 (IWL_MAX_NUM_QUEUES * 32 * 8) + 400; 892 (priv->cfg->num_of_queues * 32 * 8) + 400;
885 const u8 *ptr; 893 const u8 *ptr;
886 ssize_t ret; 894 ssize_t ret;
887 895
896 if (!priv->txq) {
897 IWL_ERR(priv, "txq not ready\n");
898 return -EAGAIN;
899 }
888 buf = kzalloc(bufsz, GFP_KERNEL); 900 buf = kzalloc(bufsz, GFP_KERNEL);
889 if (!buf) { 901 if (!buf) {
890 IWL_ERR(priv, "Can not allocate buffer\n"); 902 IWL_ERR(priv, "Can not allocate buffer\n");
@@ -969,15 +981,19 @@ static ssize_t iwl_dbgfs_tx_queue_read(struct file *file,
969 char __user *user_buf, 981 char __user *user_buf,
970 size_t count, loff_t *ppos) { 982 size_t count, loff_t *ppos) {
971 983
972 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 984 struct iwl_priv *priv = file->private_data;
973 struct iwl_tx_queue *txq; 985 struct iwl_tx_queue *txq;
974 struct iwl_queue *q; 986 struct iwl_queue *q;
975 char *buf; 987 char *buf;
976 int pos = 0; 988 int pos = 0;
977 int cnt; 989 int cnt;
978 int ret; 990 int ret;
979 const size_t bufsz = sizeof(char) * 60 * IWL_MAX_NUM_QUEUES; 991 const size_t bufsz = sizeof(char) * 64 * priv->cfg->num_of_queues;
980 992
993 if (!priv->txq) {
994 IWL_ERR(priv, "txq not ready\n");
995 return -EAGAIN;
996 }
981 buf = kzalloc(bufsz, GFP_KERNEL); 997 buf = kzalloc(bufsz, GFP_KERNEL);
982 if (!buf) 998 if (!buf)
983 return -ENOMEM; 999 return -ENOMEM;
@@ -1011,7 +1027,7 @@ static ssize_t iwl_dbgfs_rx_queue_read(struct file *file,
1011 char __user *user_buf, 1027 char __user *user_buf,
1012 size_t count, loff_t *ppos) { 1028 size_t count, loff_t *ppos) {
1013 1029
1014 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1030 struct iwl_priv *priv = file->private_data;
1015 struct iwl_rx_queue *rxq = &priv->rxq; 1031 struct iwl_rx_queue *rxq = &priv->rxq;
1016 char buf[256]; 1032 char buf[256];
1017 int pos = 0; 1033 int pos = 0;
@@ -1028,10 +1044,6 @@ static ssize_t iwl_dbgfs_rx_queue_read(struct file *file,
1028 return simple_read_from_buffer(user_buf, count, ppos, buf, pos); 1044 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1029} 1045}
1030 1046
1031#define UCODE_STATISTICS_CLEAR_MSK (0x1 << 0)
1032#define UCODE_STATISTICS_FREQUENCY_MSK (0x1 << 1)
1033#define UCODE_STATISTICS_NARROW_BAND_MSK (0x1 << 2)
1034
1035static int iwl_dbgfs_statistics_flag(struct iwl_priv *priv, char *buf, 1047static int iwl_dbgfs_statistics_flag(struct iwl_priv *priv, char *buf,
1036 int bufsz) 1048 int bufsz)
1037{ 1049{
@@ -1056,36 +1068,33 @@ static int iwl_dbgfs_statistics_flag(struct iwl_priv *priv, char *buf,
1056 return p; 1068 return p;
1057} 1069}
1058 1070
1071static const char ucode_stats_header[] =
1072 "%-32s current acumulative delta max\n";
1073static const char ucode_stats_short_format[] =
1074 " %-30s %10u\n";
1075static const char ucode_stats_format[] =
1076 " %-30s %10u %10u %10u %10u\n";
1059 1077
1060static ssize_t iwl_dbgfs_ucode_rx_stats_read(struct file *file, 1078static ssize_t iwl_dbgfs_ucode_rx_stats_read(struct file *file,
1061 char __user *user_buf, 1079 char __user *user_buf,
1062 size_t count, loff_t *ppos) 1080 size_t count, loff_t *ppos)
1063{ 1081{
1064 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1082 struct iwl_priv *priv = file->private_data;
1065 int pos = 0; 1083 int pos = 0;
1066 char *buf; 1084 char *buf;
1067 int bufsz = sizeof(struct statistics_rx_phy) * 20 + 1085 int bufsz = sizeof(struct statistics_rx_phy) * 40 +
1068 sizeof(struct statistics_rx_non_phy) * 20 + 1086 sizeof(struct statistics_rx_non_phy) * 40 +
1069 sizeof(struct statistics_rx_ht_phy) * 20 + 400; 1087 sizeof(struct statistics_rx_ht_phy) * 40 + 400;
1070 ssize_t ret; 1088 ssize_t ret;
1071 struct statistics_rx_phy *ofdm; 1089 struct statistics_rx_phy *ofdm, *accum_ofdm, *delta_ofdm, *max_ofdm;
1072 struct statistics_rx_phy *cck; 1090 struct statistics_rx_phy *cck, *accum_cck, *delta_cck, *max_cck;
1073 struct statistics_rx_non_phy *general; 1091 struct statistics_rx_non_phy *general, *accum_general;
1074 struct statistics_rx_ht_phy *ht; 1092 struct statistics_rx_non_phy *delta_general, *max_general;
1093 struct statistics_rx_ht_phy *ht, *accum_ht, *delta_ht, *max_ht;
1075 1094
1076 if (!iwl_is_alive(priv)) 1095 if (!iwl_is_alive(priv))
1077 return -EAGAIN; 1096 return -EAGAIN;
1078 1097
1079 /* make request to uCode to retrieve statistics information */
1080 mutex_lock(&priv->mutex);
1081 ret = iwl_send_statistics_request(priv, 0);
1082 mutex_unlock(&priv->mutex);
1083
1084 if (ret) {
1085 IWL_ERR(priv,
1086 "Error sending statistics request: %zd\n", ret);
1087 return -EAGAIN;
1088 }
1089 buf = kzalloc(bufsz, GFP_KERNEL); 1098 buf = kzalloc(bufsz, GFP_KERNEL);
1090 if (!buf) { 1099 if (!buf) {
1091 IWL_ERR(priv, "Can not allocate Buffer\n"); 1100 IWL_ERR(priv, "Can not allocate Buffer\n");
@@ -1100,155 +1109,405 @@ static ssize_t iwl_dbgfs_ucode_rx_stats_read(struct file *file,
1100 cck = &priv->statistics.rx.cck; 1109 cck = &priv->statistics.rx.cck;
1101 general = &priv->statistics.rx.general; 1110 general = &priv->statistics.rx.general;
1102 ht = &priv->statistics.rx.ofdm_ht; 1111 ht = &priv->statistics.rx.ofdm_ht;
1112 accum_ofdm = &priv->accum_statistics.rx.ofdm;
1113 accum_cck = &priv->accum_statistics.rx.cck;
1114 accum_general = &priv->accum_statistics.rx.general;
1115 accum_ht = &priv->accum_statistics.rx.ofdm_ht;
1116 delta_ofdm = &priv->delta_statistics.rx.ofdm;
1117 delta_cck = &priv->delta_statistics.rx.cck;
1118 delta_general = &priv->delta_statistics.rx.general;
1119 delta_ht = &priv->delta_statistics.rx.ofdm_ht;
1120 max_ofdm = &priv->max_delta.rx.ofdm;
1121 max_cck = &priv->max_delta.rx.cck;
1122 max_general = &priv->max_delta.rx.general;
1123 max_ht = &priv->max_delta.rx.ofdm_ht;
1124
1103 pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); 1125 pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz);
1104 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_Rx - OFDM:\n"); 1126 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_header,
1105 pos += scnprintf(buf + pos, bufsz - pos, "ina_cnt: %u\n", 1127 "Statistics_Rx - OFDM:");
1106 le32_to_cpu(ofdm->ina_cnt)); 1128 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1107 pos += scnprintf(buf + pos, bufsz - pos, "fina_cnt: %u\n", 1129 "ina_cnt:", le32_to_cpu(ofdm->ina_cnt),
1108 le32_to_cpu(ofdm->fina_cnt)); 1130 accum_ofdm->ina_cnt,
1109 pos += scnprintf(buf + pos, bufsz - pos, "plcp_err: %u\n", 1131 delta_ofdm->ina_cnt, max_ofdm->ina_cnt);
1110 le32_to_cpu(ofdm->plcp_err)); 1132 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1111 pos += scnprintf(buf + pos, bufsz - pos, "crc32_err: %u\n", 1133 "fina_cnt:",
1112 le32_to_cpu(ofdm->crc32_err)); 1134 le32_to_cpu(ofdm->fina_cnt), accum_ofdm->fina_cnt,
1113 pos += scnprintf(buf + pos, bufsz - pos, "overrun_err: %u\n", 1135 delta_ofdm->fina_cnt, max_ofdm->fina_cnt);
1114 le32_to_cpu(ofdm->overrun_err)); 1136 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1115 pos += scnprintf(buf + pos, bufsz - pos, "early_overrun_err: %u\n", 1137 "plcp_err:",
1116 le32_to_cpu(ofdm->early_overrun_err)); 1138 le32_to_cpu(ofdm->plcp_err), accum_ofdm->plcp_err,
1117 pos += scnprintf(buf + pos, bufsz - pos, "crc32_good: %u\n", 1139 delta_ofdm->plcp_err, max_ofdm->plcp_err);
1118 le32_to_cpu(ofdm->crc32_good)); 1140 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1119 pos += scnprintf(buf + pos, bufsz - pos, "false_alarm_cnt: %u\n", 1141 "crc32_err:",
1120 le32_to_cpu(ofdm->false_alarm_cnt)); 1142 le32_to_cpu(ofdm->crc32_err), accum_ofdm->crc32_err,
1121 pos += scnprintf(buf + pos, bufsz - pos, "fina_sync_err_cnt: %u\n", 1143 delta_ofdm->crc32_err, max_ofdm->crc32_err);
1122 le32_to_cpu(ofdm->fina_sync_err_cnt)); 1144 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1123 pos += scnprintf(buf + pos, bufsz - pos, "sfd_timeout: %u\n", 1145 "overrun_err:",
1124 le32_to_cpu(ofdm->sfd_timeout)); 1146 le32_to_cpu(ofdm->overrun_err),
1125 pos += scnprintf(buf + pos, bufsz - pos, "fina_timeout: %u\n", 1147 accum_ofdm->overrun_err,
1126 le32_to_cpu(ofdm->fina_timeout)); 1148 delta_ofdm->overrun_err, max_ofdm->overrun_err);
1127 pos += scnprintf(buf + pos, bufsz - pos, "unresponded_rts: %u\n", 1149 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1128 le32_to_cpu(ofdm->unresponded_rts)); 1150 "early_overrun_err:",
1129 pos += scnprintf(buf + pos, bufsz - pos, 1151 le32_to_cpu(ofdm->early_overrun_err),
1130 "rxe_frame_limit_overrun: %u\n", 1152 accum_ofdm->early_overrun_err,
1131 le32_to_cpu(ofdm->rxe_frame_limit_overrun)); 1153 delta_ofdm->early_overrun_err,
1132 pos += scnprintf(buf + pos, bufsz - pos, "sent_ack_cnt: %u\n", 1154 max_ofdm->early_overrun_err);
1133 le32_to_cpu(ofdm->sent_ack_cnt)); 1155 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1134 pos += scnprintf(buf + pos, bufsz - pos, "sent_cts_cnt: %u\n", 1156 "crc32_good:",
1135 le32_to_cpu(ofdm->sent_cts_cnt)); 1157 le32_to_cpu(ofdm->crc32_good),
1136 pos += scnprintf(buf + pos, bufsz - pos, "sent_ba_rsp_cnt: %u\n", 1158 accum_ofdm->crc32_good,
1137 le32_to_cpu(ofdm->sent_ba_rsp_cnt)); 1159 delta_ofdm->crc32_good, max_ofdm->crc32_good);
1138 pos += scnprintf(buf + pos, bufsz - pos, "dsp_self_kill: %u\n", 1160 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1139 le32_to_cpu(ofdm->dsp_self_kill)); 1161 "false_alarm_cnt:",
1140 pos += scnprintf(buf + pos, bufsz - pos, "mh_format_err: %u\n", 1162 le32_to_cpu(ofdm->false_alarm_cnt),
1141 le32_to_cpu(ofdm->mh_format_err)); 1163 accum_ofdm->false_alarm_cnt,
1142 pos += scnprintf(buf + pos, bufsz - pos, "re_acq_main_rssi_sum: %u\n", 1164 delta_ofdm->false_alarm_cnt,
1143 le32_to_cpu(ofdm->re_acq_main_rssi_sum)); 1165 max_ofdm->false_alarm_cnt);
1144 1166 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1145 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_Rx - CCK:\n"); 1167 "fina_sync_err_cnt:",
1146 pos += scnprintf(buf + pos, bufsz - pos, "ina_cnt: %u\n", 1168 le32_to_cpu(ofdm->fina_sync_err_cnt),
1147 le32_to_cpu(cck->ina_cnt)); 1169 accum_ofdm->fina_sync_err_cnt,
1148 pos += scnprintf(buf + pos, bufsz - pos, "fina_cnt: %u\n", 1170 delta_ofdm->fina_sync_err_cnt,
1149 le32_to_cpu(cck->fina_cnt)); 1171 max_ofdm->fina_sync_err_cnt);
1150 pos += scnprintf(buf + pos, bufsz - pos, "plcp_err: %u\n", 1172 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1151 le32_to_cpu(cck->plcp_err)); 1173 "sfd_timeout:",
1152 pos += scnprintf(buf + pos, bufsz - pos, "crc32_err: %u\n", 1174 le32_to_cpu(ofdm->sfd_timeout),
1153 le32_to_cpu(cck->crc32_err)); 1175 accum_ofdm->sfd_timeout,
1154 pos += scnprintf(buf + pos, bufsz - pos, "overrun_err: %u\n", 1176 delta_ofdm->sfd_timeout,
1155 le32_to_cpu(cck->overrun_err)); 1177 max_ofdm->sfd_timeout);
1156 pos += scnprintf(buf + pos, bufsz - pos, "early_overrun_err: %u\n", 1178 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1157 le32_to_cpu(cck->early_overrun_err)); 1179 "fina_timeout:",
1158 pos += scnprintf(buf + pos, bufsz - pos, "crc32_good: %u\n", 1180 le32_to_cpu(ofdm->fina_timeout),
1159 le32_to_cpu(cck->crc32_good)); 1181 accum_ofdm->fina_timeout,
1160 pos += scnprintf(buf + pos, bufsz - pos, "false_alarm_cnt: %u\n", 1182 delta_ofdm->fina_timeout,
1161 le32_to_cpu(cck->false_alarm_cnt)); 1183 max_ofdm->fina_timeout);
1162 pos += scnprintf(buf + pos, bufsz - pos, "fina_sync_err_cnt: %u\n", 1184 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1163 le32_to_cpu(cck->fina_sync_err_cnt)); 1185 "unresponded_rts:",
1164 pos += scnprintf(buf + pos, bufsz - pos, "sfd_timeout: %u\n", 1186 le32_to_cpu(ofdm->unresponded_rts),
1165 le32_to_cpu(cck->sfd_timeout)); 1187 accum_ofdm->unresponded_rts,
1166 pos += scnprintf(buf + pos, bufsz - pos, "fina_timeout: %u\n", 1188 delta_ofdm->unresponded_rts,
1167 le32_to_cpu(cck->fina_timeout)); 1189 max_ofdm->unresponded_rts);
1168 pos += scnprintf(buf + pos, bufsz - pos, "unresponded_rts: %u\n", 1190 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1169 le32_to_cpu(cck->unresponded_rts)); 1191 "rxe_frame_lmt_ovrun:",
1170 pos += scnprintf(buf + pos, bufsz - pos, 1192 le32_to_cpu(ofdm->rxe_frame_limit_overrun),
1171 "rxe_frame_limit_overrun: %u\n", 1193 accum_ofdm->rxe_frame_limit_overrun,
1172 le32_to_cpu(cck->rxe_frame_limit_overrun)); 1194 delta_ofdm->rxe_frame_limit_overrun,
1173 pos += scnprintf(buf + pos, bufsz - pos, "sent_ack_cnt: %u\n", 1195 max_ofdm->rxe_frame_limit_overrun);
1174 le32_to_cpu(cck->sent_ack_cnt)); 1196 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1175 pos += scnprintf(buf + pos, bufsz - pos, "sent_cts_cnt: %u\n", 1197 "sent_ack_cnt:",
1176 le32_to_cpu(cck->sent_cts_cnt)); 1198 le32_to_cpu(ofdm->sent_ack_cnt),
1177 pos += scnprintf(buf + pos, bufsz - pos, "sent_ba_rsp_cnt: %u\n", 1199 accum_ofdm->sent_ack_cnt,
1178 le32_to_cpu(cck->sent_ba_rsp_cnt)); 1200 delta_ofdm->sent_ack_cnt,
1179 pos += scnprintf(buf + pos, bufsz - pos, "dsp_self_kill: %u\n", 1201 max_ofdm->sent_ack_cnt);
1180 le32_to_cpu(cck->dsp_self_kill)); 1202 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1181 pos += scnprintf(buf + pos, bufsz - pos, "mh_format_err: %u\n", 1203 "sent_cts_cnt:",
1182 le32_to_cpu(cck->mh_format_err)); 1204 le32_to_cpu(ofdm->sent_cts_cnt),
1183 pos += scnprintf(buf + pos, bufsz - pos, "re_acq_main_rssi_sum: %u\n", 1205 accum_ofdm->sent_cts_cnt,
1184 le32_to_cpu(cck->re_acq_main_rssi_sum)); 1206 delta_ofdm->sent_cts_cnt, max_ofdm->sent_cts_cnt);
1185 1207 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1186 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_Rx - GENERAL:\n"); 1208 "sent_ba_rsp_cnt:",
1187 pos += scnprintf(buf + pos, bufsz - pos, "bogus_cts: %u\n", 1209 le32_to_cpu(ofdm->sent_ba_rsp_cnt),
1188 le32_to_cpu(general->bogus_cts)); 1210 accum_ofdm->sent_ba_rsp_cnt,
1189 pos += scnprintf(buf + pos, bufsz - pos, "bogus_ack: %u\n", 1211 delta_ofdm->sent_ba_rsp_cnt,
1190 le32_to_cpu(general->bogus_ack)); 1212 max_ofdm->sent_ba_rsp_cnt);
1191 pos += scnprintf(buf + pos, bufsz - pos, "non_bssid_frames: %u\n", 1213 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1192 le32_to_cpu(general->non_bssid_frames)); 1214 "dsp_self_kill:",
1193 pos += scnprintf(buf + pos, bufsz - pos, "filtered_frames: %u\n", 1215 le32_to_cpu(ofdm->dsp_self_kill),
1194 le32_to_cpu(general->filtered_frames)); 1216 accum_ofdm->dsp_self_kill,
1195 pos += scnprintf(buf + pos, bufsz - pos, "non_channel_beacons: %u\n", 1217 delta_ofdm->dsp_self_kill,
1196 le32_to_cpu(general->non_channel_beacons)); 1218 max_ofdm->dsp_self_kill);
1197 pos += scnprintf(buf + pos, bufsz - pos, "channel_beacons: %u\n", 1219 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1198 le32_to_cpu(general->channel_beacons)); 1220 "mh_format_err:",
1199 pos += scnprintf(buf + pos, bufsz - pos, "num_missed_bcon: %u\n", 1221 le32_to_cpu(ofdm->mh_format_err),
1200 le32_to_cpu(general->num_missed_bcon)); 1222 accum_ofdm->mh_format_err,
1201 pos += scnprintf(buf + pos, bufsz - pos, 1223 delta_ofdm->mh_format_err,
1202 "adc_rx_saturation_time: %u\n", 1224 max_ofdm->mh_format_err);
1203 le32_to_cpu(general->adc_rx_saturation_time)); 1225 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1204 pos += scnprintf(buf + pos, bufsz - pos, 1226 "re_acq_main_rssi_sum:",
1205 "ina_detection_search_time: %u\n", 1227 le32_to_cpu(ofdm->re_acq_main_rssi_sum),
1206 le32_to_cpu(general->ina_detection_search_time)); 1228 accum_ofdm->re_acq_main_rssi_sum,
1207 pos += scnprintf(buf + pos, bufsz - pos, "beacon_silence_rssi_a: %u\n", 1229 delta_ofdm->re_acq_main_rssi_sum,
1208 le32_to_cpu(general->beacon_silence_rssi_a)); 1230 max_ofdm->re_acq_main_rssi_sum);
1209 pos += scnprintf(buf + pos, bufsz - pos, "beacon_silence_rssi_b: %u\n", 1231
1210 le32_to_cpu(general->beacon_silence_rssi_b)); 1232 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_header,
1211 pos += scnprintf(buf + pos, bufsz - pos, "beacon_silence_rssi_c: %u\n", 1233 "Statistics_Rx - CCK:");
1212 le32_to_cpu(general->beacon_silence_rssi_c)); 1234 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1213 pos += scnprintf(buf + pos, bufsz - pos, 1235 "ina_cnt:",
1214 "interference_data_flag: %u\n", 1236 le32_to_cpu(cck->ina_cnt), accum_cck->ina_cnt,
1215 le32_to_cpu(general->interference_data_flag)); 1237 delta_cck->ina_cnt, max_cck->ina_cnt);
1216 pos += scnprintf(buf + pos, bufsz - pos, "channel_load: %u\n", 1238 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1217 le32_to_cpu(general->channel_load)); 1239 "fina_cnt:",
1218 pos += scnprintf(buf + pos, bufsz - pos, "dsp_false_alarms: %u\n", 1240 le32_to_cpu(cck->fina_cnt), accum_cck->fina_cnt,
1219 le32_to_cpu(general->dsp_false_alarms)); 1241 delta_cck->fina_cnt, max_cck->fina_cnt);
1220 pos += scnprintf(buf + pos, bufsz - pos, "beacon_rssi_a: %u\n", 1242 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1221 le32_to_cpu(general->beacon_rssi_a)); 1243 "plcp_err:",
1222 pos += scnprintf(buf + pos, bufsz - pos, "beacon_rssi_b: %u\n", 1244 le32_to_cpu(cck->plcp_err), accum_cck->plcp_err,
1223 le32_to_cpu(general->beacon_rssi_b)); 1245 delta_cck->plcp_err, max_cck->plcp_err);
1224 pos += scnprintf(buf + pos, bufsz - pos, "beacon_rssi_c: %u\n", 1246 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1225 le32_to_cpu(general->beacon_rssi_c)); 1247 "crc32_err:",
1226 pos += scnprintf(buf + pos, bufsz - pos, "beacon_energy_a: %u\n", 1248 le32_to_cpu(cck->crc32_err), accum_cck->crc32_err,
1227 le32_to_cpu(general->beacon_energy_a)); 1249 delta_cck->crc32_err, max_cck->crc32_err);
1228 pos += scnprintf(buf + pos, bufsz - pos, "beacon_energy_b: %u\n", 1250 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1229 le32_to_cpu(general->beacon_energy_b)); 1251 "overrun_err:",
1230 pos += scnprintf(buf + pos, bufsz - pos, "beacon_energy_c: %u\n", 1252 le32_to_cpu(cck->overrun_err),
1231 le32_to_cpu(general->beacon_energy_c)); 1253 accum_cck->overrun_err,
1254 delta_cck->overrun_err, max_cck->overrun_err);
1255 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1256 "early_overrun_err:",
1257 le32_to_cpu(cck->early_overrun_err),
1258 accum_cck->early_overrun_err,
1259 delta_cck->early_overrun_err,
1260 max_cck->early_overrun_err);
1261 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1262 "crc32_good:",
1263 le32_to_cpu(cck->crc32_good), accum_cck->crc32_good,
1264 delta_cck->crc32_good,
1265 max_cck->crc32_good);
1266 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1267 "false_alarm_cnt:",
1268 le32_to_cpu(cck->false_alarm_cnt),
1269 accum_cck->false_alarm_cnt,
1270 delta_cck->false_alarm_cnt, max_cck->false_alarm_cnt);
1271 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1272 "fina_sync_err_cnt:",
1273 le32_to_cpu(cck->fina_sync_err_cnt),
1274 accum_cck->fina_sync_err_cnt,
1275 delta_cck->fina_sync_err_cnt,
1276 max_cck->fina_sync_err_cnt);
1277 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1278 "sfd_timeout:",
1279 le32_to_cpu(cck->sfd_timeout),
1280 accum_cck->sfd_timeout,
1281 delta_cck->sfd_timeout, max_cck->sfd_timeout);
1282 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1283 "fina_timeout:",
1284 le32_to_cpu(cck->fina_timeout),
1285 accum_cck->fina_timeout,
1286 delta_cck->fina_timeout, max_cck->fina_timeout);
1287 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1288 "unresponded_rts:",
1289 le32_to_cpu(cck->unresponded_rts),
1290 accum_cck->unresponded_rts,
1291 delta_cck->unresponded_rts,
1292 max_cck->unresponded_rts);
1293 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1294 "rxe_frame_lmt_ovrun:",
1295 le32_to_cpu(cck->rxe_frame_limit_overrun),
1296 accum_cck->rxe_frame_limit_overrun,
1297 delta_cck->rxe_frame_limit_overrun,
1298 max_cck->rxe_frame_limit_overrun);
1299 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1300 "sent_ack_cnt:",
1301 le32_to_cpu(cck->sent_ack_cnt),
1302 accum_cck->sent_ack_cnt,
1303 delta_cck->sent_ack_cnt,
1304 max_cck->sent_ack_cnt);
1305 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1306 "sent_cts_cnt:",
1307 le32_to_cpu(cck->sent_cts_cnt),
1308 accum_cck->sent_cts_cnt,
1309 delta_cck->sent_cts_cnt,
1310 max_cck->sent_cts_cnt);
1311 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1312 "sent_ba_rsp_cnt:",
1313 le32_to_cpu(cck->sent_ba_rsp_cnt),
1314 accum_cck->sent_ba_rsp_cnt,
1315 delta_cck->sent_ba_rsp_cnt,
1316 max_cck->sent_ba_rsp_cnt);
1317 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1318 "dsp_self_kill:",
1319 le32_to_cpu(cck->dsp_self_kill),
1320 accum_cck->dsp_self_kill,
1321 delta_cck->dsp_self_kill,
1322 max_cck->dsp_self_kill);
1323 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1324 "mh_format_err:",
1325 le32_to_cpu(cck->mh_format_err),
1326 accum_cck->mh_format_err,
1327 delta_cck->mh_format_err, max_cck->mh_format_err);
1328 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1329 "re_acq_main_rssi_sum:",
1330 le32_to_cpu(cck->re_acq_main_rssi_sum),
1331 accum_cck->re_acq_main_rssi_sum,
1332 delta_cck->re_acq_main_rssi_sum,
1333 max_cck->re_acq_main_rssi_sum);
1334
1335 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_header,
1336 "Statistics_Rx - GENERAL:");
1337 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1338 "bogus_cts:",
1339 le32_to_cpu(general->bogus_cts),
1340 accum_general->bogus_cts,
1341 delta_general->bogus_cts, max_general->bogus_cts);
1342 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1343 "bogus_ack:",
1344 le32_to_cpu(general->bogus_ack),
1345 accum_general->bogus_ack,
1346 delta_general->bogus_ack, max_general->bogus_ack);
1347 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1348 "non_bssid_frames:",
1349 le32_to_cpu(general->non_bssid_frames),
1350 accum_general->non_bssid_frames,
1351 delta_general->non_bssid_frames,
1352 max_general->non_bssid_frames);
1353 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1354 "filtered_frames:",
1355 le32_to_cpu(general->filtered_frames),
1356 accum_general->filtered_frames,
1357 delta_general->filtered_frames,
1358 max_general->filtered_frames);
1359 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1360 "non_channel_beacons:",
1361 le32_to_cpu(general->non_channel_beacons),
1362 accum_general->non_channel_beacons,
1363 delta_general->non_channel_beacons,
1364 max_general->non_channel_beacons);
1365 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1366 "channel_beacons:",
1367 le32_to_cpu(general->channel_beacons),
1368 accum_general->channel_beacons,
1369 delta_general->channel_beacons,
1370 max_general->channel_beacons);
1371 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1372 "num_missed_bcon:",
1373 le32_to_cpu(general->num_missed_bcon),
1374 accum_general->num_missed_bcon,
1375 delta_general->num_missed_bcon,
1376 max_general->num_missed_bcon);
1377 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1378 "adc_rx_saturation_time:",
1379 le32_to_cpu(general->adc_rx_saturation_time),
1380 accum_general->adc_rx_saturation_time,
1381 delta_general->adc_rx_saturation_time,
1382 max_general->adc_rx_saturation_time);
1383 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1384 "ina_detect_search_tm:",
1385 le32_to_cpu(general->ina_detection_search_time),
1386 accum_general->ina_detection_search_time,
1387 delta_general->ina_detection_search_time,
1388 max_general->ina_detection_search_time);
1389 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1390 "beacon_silence_rssi_a:",
1391 le32_to_cpu(general->beacon_silence_rssi_a),
1392 accum_general->beacon_silence_rssi_a,
1393 delta_general->beacon_silence_rssi_a,
1394 max_general->beacon_silence_rssi_a);
1395 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1396 "beacon_silence_rssi_b:",
1397 le32_to_cpu(general->beacon_silence_rssi_b),
1398 accum_general->beacon_silence_rssi_b,
1399 delta_general->beacon_silence_rssi_b,
1400 max_general->beacon_silence_rssi_b);
1401 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1402 "beacon_silence_rssi_c:",
1403 le32_to_cpu(general->beacon_silence_rssi_c),
1404 accum_general->beacon_silence_rssi_c,
1405 delta_general->beacon_silence_rssi_c,
1406 max_general->beacon_silence_rssi_c);
1407 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1408 "interference_data_flag:",
1409 le32_to_cpu(general->interference_data_flag),
1410 accum_general->interference_data_flag,
1411 delta_general->interference_data_flag,
1412 max_general->interference_data_flag);
1413 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1414 "channel_load:",
1415 le32_to_cpu(general->channel_load),
1416 accum_general->channel_load,
1417 delta_general->channel_load,
1418 max_general->channel_load);
1419 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1420 "dsp_false_alarms:",
1421 le32_to_cpu(general->dsp_false_alarms),
1422 accum_general->dsp_false_alarms,
1423 delta_general->dsp_false_alarms,
1424 max_general->dsp_false_alarms);
1425 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1426 "beacon_rssi_a:",
1427 le32_to_cpu(general->beacon_rssi_a),
1428 accum_general->beacon_rssi_a,
1429 delta_general->beacon_rssi_a,
1430 max_general->beacon_rssi_a);
1431 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1432 "beacon_rssi_b:",
1433 le32_to_cpu(general->beacon_rssi_b),
1434 accum_general->beacon_rssi_b,
1435 delta_general->beacon_rssi_b,
1436 max_general->beacon_rssi_b);
1437 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1438 "beacon_rssi_c:",
1439 le32_to_cpu(general->beacon_rssi_c),
1440 accum_general->beacon_rssi_c,
1441 delta_general->beacon_rssi_c,
1442 max_general->beacon_rssi_c);
1443 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1444 "beacon_energy_a:",
1445 le32_to_cpu(general->beacon_energy_a),
1446 accum_general->beacon_energy_a,
1447 delta_general->beacon_energy_a,
1448 max_general->beacon_energy_a);
1449 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1450 "beacon_energy_b:",
1451 le32_to_cpu(general->beacon_energy_b),
1452 accum_general->beacon_energy_b,
1453 delta_general->beacon_energy_b,
1454 max_general->beacon_energy_b);
1455 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1456 "beacon_energy_c:",
1457 le32_to_cpu(general->beacon_energy_c),
1458 accum_general->beacon_energy_c,
1459 delta_general->beacon_energy_c,
1460 max_general->beacon_energy_c);
1232 1461
1233 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_Rx - OFDM_HT:\n"); 1462 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_Rx - OFDM_HT:\n");
1234 pos += scnprintf(buf + pos, bufsz - pos, "plcp_err: %u\n", 1463 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_header,
1235 le32_to_cpu(ht->plcp_err)); 1464 "Statistics_Rx - OFDM_HT:");
1236 pos += scnprintf(buf + pos, bufsz - pos, "overrun_err: %u\n", 1465 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1237 le32_to_cpu(ht->overrun_err)); 1466 "plcp_err:",
1238 pos += scnprintf(buf + pos, bufsz - pos, "early_overrun_err: %u\n", 1467 le32_to_cpu(ht->plcp_err), accum_ht->plcp_err,
1239 le32_to_cpu(ht->early_overrun_err)); 1468 delta_ht->plcp_err, max_ht->plcp_err);
1240 pos += scnprintf(buf + pos, bufsz - pos, "crc32_good: %u\n", 1469 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1241 le32_to_cpu(ht->crc32_good)); 1470 "overrun_err:",
1242 pos += scnprintf(buf + pos, bufsz - pos, "crc32_err: %u\n", 1471 le32_to_cpu(ht->overrun_err), accum_ht->overrun_err,
1243 le32_to_cpu(ht->crc32_err)); 1472 delta_ht->overrun_err, max_ht->overrun_err);
1244 pos += scnprintf(buf + pos, bufsz - pos, "mh_format_err: %u\n", 1473 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1245 le32_to_cpu(ht->mh_format_err)); 1474 "early_overrun_err:",
1246 pos += scnprintf(buf + pos, bufsz - pos, "agg_crc32_good: %u\n", 1475 le32_to_cpu(ht->early_overrun_err),
1247 le32_to_cpu(ht->agg_crc32_good)); 1476 accum_ht->early_overrun_err,
1248 pos += scnprintf(buf + pos, bufsz - pos, "agg_mpdu_cnt: %u\n", 1477 delta_ht->early_overrun_err,
1249 le32_to_cpu(ht->agg_mpdu_cnt)); 1478 max_ht->early_overrun_err);
1250 pos += scnprintf(buf + pos, bufsz - pos, "agg_cnt: %u\n", 1479 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1251 le32_to_cpu(ht->agg_cnt)); 1480 "crc32_good:",
1481 le32_to_cpu(ht->crc32_good), accum_ht->crc32_good,
1482 delta_ht->crc32_good, max_ht->crc32_good);
1483 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1484 "crc32_err:",
1485 le32_to_cpu(ht->crc32_err), accum_ht->crc32_err,
1486 delta_ht->crc32_err, max_ht->crc32_err);
1487 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1488 "mh_format_err:",
1489 le32_to_cpu(ht->mh_format_err),
1490 accum_ht->mh_format_err,
1491 delta_ht->mh_format_err, max_ht->mh_format_err);
1492 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1493 "agg_crc32_good:",
1494 le32_to_cpu(ht->agg_crc32_good),
1495 accum_ht->agg_crc32_good,
1496 delta_ht->agg_crc32_good, max_ht->agg_crc32_good);
1497 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1498 "agg_mpdu_cnt:",
1499 le32_to_cpu(ht->agg_mpdu_cnt),
1500 accum_ht->agg_mpdu_cnt,
1501 delta_ht->agg_mpdu_cnt, max_ht->agg_mpdu_cnt);
1502 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1503 "agg_cnt:",
1504 le32_to_cpu(ht->agg_cnt), accum_ht->agg_cnt,
1505 delta_ht->agg_cnt, max_ht->agg_cnt);
1506 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1507 "unsupport_mcs:",
1508 le32_to_cpu(ht->unsupport_mcs),
1509 accum_ht->unsupport_mcs,
1510 delta_ht->unsupport_mcs, max_ht->unsupport_mcs);
1252 1511
1253 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 1512 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1254 kfree(buf); 1513 kfree(buf);
@@ -1259,26 +1518,16 @@ static ssize_t iwl_dbgfs_ucode_tx_stats_read(struct file *file,
1259 char __user *user_buf, 1518 char __user *user_buf,
1260 size_t count, loff_t *ppos) 1519 size_t count, loff_t *ppos)
1261{ 1520{
1262 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1521 struct iwl_priv *priv = file->private_data;
1263 int pos = 0; 1522 int pos = 0;
1264 char *buf; 1523 char *buf;
1265 int bufsz = (sizeof(struct statistics_tx) * 24) + 250; 1524 int bufsz = (sizeof(struct statistics_tx) * 48) + 250;
1266 ssize_t ret; 1525 ssize_t ret;
1267 struct statistics_tx *tx; 1526 struct statistics_tx *tx, *accum_tx, *delta_tx, *max_tx;
1268 1527
1269 if (!iwl_is_alive(priv)) 1528 if (!iwl_is_alive(priv))
1270 return -EAGAIN; 1529 return -EAGAIN;
1271 1530
1272 /* make request to uCode to retrieve statistics information */
1273 mutex_lock(&priv->mutex);
1274 ret = iwl_send_statistics_request(priv, 0);
1275 mutex_unlock(&priv->mutex);
1276
1277 if (ret) {
1278 IWL_ERR(priv,
1279 "Error sending statistics request: %zd\n", ret);
1280 return -EAGAIN;
1281 }
1282 buf = kzalloc(bufsz, GFP_KERNEL); 1531 buf = kzalloc(bufsz, GFP_KERNEL);
1283 if (!buf) { 1532 if (!buf) {
1284 IWL_ERR(priv, "Can not allocate Buffer\n"); 1533 IWL_ERR(priv, "Can not allocate Buffer\n");
@@ -1290,62 +1539,149 @@ static ssize_t iwl_dbgfs_ucode_tx_stats_read(struct file *file,
1290 * might not reflect the current uCode activity 1539 * might not reflect the current uCode activity
1291 */ 1540 */
1292 tx = &priv->statistics.tx; 1541 tx = &priv->statistics.tx;
1542 accum_tx = &priv->accum_statistics.tx;
1543 delta_tx = &priv->delta_statistics.tx;
1544 max_tx = &priv->max_delta.tx;
1293 pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); 1545 pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz);
1294 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_Tx:\n"); 1546 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_header,
1295 pos += scnprintf(buf + pos, bufsz - pos, "preamble: %u\n", 1547 "Statistics_Tx:");
1296 le32_to_cpu(tx->preamble_cnt)); 1548 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1297 pos += scnprintf(buf + pos, bufsz - pos, "rx_detected_cnt: %u\n", 1549 "preamble:",
1298 le32_to_cpu(tx->rx_detected_cnt)); 1550 le32_to_cpu(tx->preamble_cnt),
1299 pos += scnprintf(buf + pos, bufsz - pos, "bt_prio_defer_cnt: %u\n", 1551 accum_tx->preamble_cnt,
1300 le32_to_cpu(tx->bt_prio_defer_cnt)); 1552 delta_tx->preamble_cnt, max_tx->preamble_cnt);
1301 pos += scnprintf(buf + pos, bufsz - pos, "bt_prio_kill_cnt: %u\n", 1553 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1302 le32_to_cpu(tx->bt_prio_kill_cnt)); 1554 "rx_detected_cnt:",
1303 pos += scnprintf(buf + pos, bufsz - pos, "few_bytes_cnt: %u\n", 1555 le32_to_cpu(tx->rx_detected_cnt),
1304 le32_to_cpu(tx->few_bytes_cnt)); 1556 accum_tx->rx_detected_cnt,
1305 pos += scnprintf(buf + pos, bufsz - pos, "cts_timeout: %u\n", 1557 delta_tx->rx_detected_cnt, max_tx->rx_detected_cnt);
1306 le32_to_cpu(tx->cts_timeout)); 1558 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1307 pos += scnprintf(buf + pos, bufsz - pos, "ack_timeout: %u\n", 1559 "bt_prio_defer_cnt:",
1308 le32_to_cpu(tx->ack_timeout)); 1560 le32_to_cpu(tx->bt_prio_defer_cnt),
1309 pos += scnprintf(buf + pos, bufsz - pos, "expected_ack_cnt: %u\n", 1561 accum_tx->bt_prio_defer_cnt,
1310 le32_to_cpu(tx->expected_ack_cnt)); 1562 delta_tx->bt_prio_defer_cnt,
1311 pos += scnprintf(buf + pos, bufsz - pos, "actual_ack_cnt: %u\n", 1563 max_tx->bt_prio_defer_cnt);
1312 le32_to_cpu(tx->actual_ack_cnt)); 1564 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1313 pos += scnprintf(buf + pos, bufsz - pos, "dump_msdu_cnt: %u\n", 1565 "bt_prio_kill_cnt:",
1314 le32_to_cpu(tx->dump_msdu_cnt)); 1566 le32_to_cpu(tx->bt_prio_kill_cnt),
1315 pos += scnprintf(buf + pos, bufsz - pos, 1567 accum_tx->bt_prio_kill_cnt,
1316 "burst_abort_next_frame_mismatch_cnt: %u\n", 1568 delta_tx->bt_prio_kill_cnt,
1317 le32_to_cpu(tx->burst_abort_next_frame_mismatch_cnt)); 1569 max_tx->bt_prio_kill_cnt);
1318 pos += scnprintf(buf + pos, bufsz - pos, 1570 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1319 "burst_abort_missing_next_frame_cnt: %u\n", 1571 "few_bytes_cnt:",
1320 le32_to_cpu(tx->burst_abort_missing_next_frame_cnt)); 1572 le32_to_cpu(tx->few_bytes_cnt),
1321 pos += scnprintf(buf + pos, bufsz - pos, "cts_timeout_collision: %u\n", 1573 accum_tx->few_bytes_cnt,
1322 le32_to_cpu(tx->cts_timeout_collision)); 1574 delta_tx->few_bytes_cnt, max_tx->few_bytes_cnt);
1323 pos += scnprintf(buf + pos, bufsz - pos, 1575 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1324 "ack_or_ba_timeout_collision: %u\n", 1576 "cts_timeout:",
1325 le32_to_cpu(tx->ack_or_ba_timeout_collision)); 1577 le32_to_cpu(tx->cts_timeout), accum_tx->cts_timeout,
1326 pos += scnprintf(buf + pos, bufsz - pos, "agg ba_timeout: %u\n", 1578 delta_tx->cts_timeout, max_tx->cts_timeout);
1327 le32_to_cpu(tx->agg.ba_timeout)); 1579 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1328 pos += scnprintf(buf + pos, bufsz - pos, 1580 "ack_timeout:",
1329 "agg ba_reschedule_frames: %u\n", 1581 le32_to_cpu(tx->ack_timeout),
1330 le32_to_cpu(tx->agg.ba_reschedule_frames)); 1582 accum_tx->ack_timeout,
1331 pos += scnprintf(buf + pos, bufsz - pos, 1583 delta_tx->ack_timeout, max_tx->ack_timeout);
1332 "agg scd_query_agg_frame_cnt: %u\n", 1584 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1333 le32_to_cpu(tx->agg.scd_query_agg_frame_cnt)); 1585 "expected_ack_cnt:",
1334 pos += scnprintf(buf + pos, bufsz - pos, "agg scd_query_no_agg: %u\n", 1586 le32_to_cpu(tx->expected_ack_cnt),
1335 le32_to_cpu(tx->agg.scd_query_no_agg)); 1587 accum_tx->expected_ack_cnt,
1336 pos += scnprintf(buf + pos, bufsz - pos, "agg scd_query_agg: %u\n", 1588 delta_tx->expected_ack_cnt,
1337 le32_to_cpu(tx->agg.scd_query_agg)); 1589 max_tx->expected_ack_cnt);
1338 pos += scnprintf(buf + pos, bufsz - pos, 1590 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1339 "agg scd_query_mismatch: %u\n", 1591 "actual_ack_cnt:",
1340 le32_to_cpu(tx->agg.scd_query_mismatch)); 1592 le32_to_cpu(tx->actual_ack_cnt),
1341 pos += scnprintf(buf + pos, bufsz - pos, "agg frame_not_ready: %u\n", 1593 accum_tx->actual_ack_cnt,
1342 le32_to_cpu(tx->agg.frame_not_ready)); 1594 delta_tx->actual_ack_cnt,
1343 pos += scnprintf(buf + pos, bufsz - pos, "agg underrun: %u\n", 1595 max_tx->actual_ack_cnt);
1344 le32_to_cpu(tx->agg.underrun)); 1596 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1345 pos += scnprintf(buf + pos, bufsz - pos, "agg bt_prio_kill: %u\n", 1597 "dump_msdu_cnt:",
1346 le32_to_cpu(tx->agg.bt_prio_kill)); 1598 le32_to_cpu(tx->dump_msdu_cnt),
1347 pos += scnprintf(buf + pos, bufsz - pos, "agg rx_ba_rsp_cnt: %u\n", 1599 accum_tx->dump_msdu_cnt,
1348 le32_to_cpu(tx->agg.rx_ba_rsp_cnt)); 1600 delta_tx->dump_msdu_cnt,
1601 max_tx->dump_msdu_cnt);
1602 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1603 "abort_nxt_frame_mismatch:",
1604 le32_to_cpu(tx->burst_abort_next_frame_mismatch_cnt),
1605 accum_tx->burst_abort_next_frame_mismatch_cnt,
1606 delta_tx->burst_abort_next_frame_mismatch_cnt,
1607 max_tx->burst_abort_next_frame_mismatch_cnt);
1608 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1609 "abort_missing_nxt_frame:",
1610 le32_to_cpu(tx->burst_abort_missing_next_frame_cnt),
1611 accum_tx->burst_abort_missing_next_frame_cnt,
1612 delta_tx->burst_abort_missing_next_frame_cnt,
1613 max_tx->burst_abort_missing_next_frame_cnt);
1614 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1615 "cts_timeout_collision:",
1616 le32_to_cpu(tx->cts_timeout_collision),
1617 accum_tx->cts_timeout_collision,
1618 delta_tx->cts_timeout_collision,
1619 max_tx->cts_timeout_collision);
1620 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1621 "ack_ba_timeout_collision:",
1622 le32_to_cpu(tx->ack_or_ba_timeout_collision),
1623 accum_tx->ack_or_ba_timeout_collision,
1624 delta_tx->ack_or_ba_timeout_collision,
1625 max_tx->ack_or_ba_timeout_collision);
1626 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1627 "agg ba_timeout:",
1628 le32_to_cpu(tx->agg.ba_timeout),
1629 accum_tx->agg.ba_timeout,
1630 delta_tx->agg.ba_timeout,
1631 max_tx->agg.ba_timeout);
1632 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1633 "agg ba_resched_frames:",
1634 le32_to_cpu(tx->agg.ba_reschedule_frames),
1635 accum_tx->agg.ba_reschedule_frames,
1636 delta_tx->agg.ba_reschedule_frames,
1637 max_tx->agg.ba_reschedule_frames);
1638 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1639 "agg scd_query_agg_frame:",
1640 le32_to_cpu(tx->agg.scd_query_agg_frame_cnt),
1641 accum_tx->agg.scd_query_agg_frame_cnt,
1642 delta_tx->agg.scd_query_agg_frame_cnt,
1643 max_tx->agg.scd_query_agg_frame_cnt);
1644 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1645 "agg scd_query_no_agg:",
1646 le32_to_cpu(tx->agg.scd_query_no_agg),
1647 accum_tx->agg.scd_query_no_agg,
1648 delta_tx->agg.scd_query_no_agg,
1649 max_tx->agg.scd_query_no_agg);
1650 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1651 "agg scd_query_agg:",
1652 le32_to_cpu(tx->agg.scd_query_agg),
1653 accum_tx->agg.scd_query_agg,
1654 delta_tx->agg.scd_query_agg,
1655 max_tx->agg.scd_query_agg);
1656 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1657 "agg scd_query_mismatch:",
1658 le32_to_cpu(tx->agg.scd_query_mismatch),
1659 accum_tx->agg.scd_query_mismatch,
1660 delta_tx->agg.scd_query_mismatch,
1661 max_tx->agg.scd_query_mismatch);
1662 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1663 "agg frame_not_ready:",
1664 le32_to_cpu(tx->agg.frame_not_ready),
1665 accum_tx->agg.frame_not_ready,
1666 delta_tx->agg.frame_not_ready,
1667 max_tx->agg.frame_not_ready);
1668 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1669 "agg underrun:",
1670 le32_to_cpu(tx->agg.underrun),
1671 accum_tx->agg.underrun,
1672 delta_tx->agg.underrun, max_tx->agg.underrun);
1673 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1674 "agg bt_prio_kill:",
1675 le32_to_cpu(tx->agg.bt_prio_kill),
1676 accum_tx->agg.bt_prio_kill,
1677 delta_tx->agg.bt_prio_kill,
1678 max_tx->agg.bt_prio_kill);
1679 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1680 "agg rx_ba_rsp_cnt:",
1681 le32_to_cpu(tx->agg.rx_ba_rsp_cnt),
1682 accum_tx->agg.rx_ba_rsp_cnt,
1683 delta_tx->agg.rx_ba_rsp_cnt,
1684 max_tx->agg.rx_ba_rsp_cnt);
1349 1685
1350 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 1686 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1351 kfree(buf); 1687 kfree(buf);
@@ -1356,28 +1692,19 @@ static ssize_t iwl_dbgfs_ucode_general_stats_read(struct file *file,
1356 char __user *user_buf, 1692 char __user *user_buf,
1357 size_t count, loff_t *ppos) 1693 size_t count, loff_t *ppos)
1358{ 1694{
1359 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1695 struct iwl_priv *priv = file->private_data;
1360 int pos = 0; 1696 int pos = 0;
1361 char *buf; 1697 char *buf;
1362 int bufsz = sizeof(struct statistics_general) * 4 + 250; 1698 int bufsz = sizeof(struct statistics_general) * 10 + 300;
1363 ssize_t ret; 1699 ssize_t ret;
1364 struct statistics_general *general; 1700 struct statistics_general *general, *accum_general;
1365 struct statistics_dbg *dbg; 1701 struct statistics_general *delta_general, *max_general;
1366 struct statistics_div *div; 1702 struct statistics_dbg *dbg, *accum_dbg, *delta_dbg, *max_dbg;
1703 struct statistics_div *div, *accum_div, *delta_div, *max_div;
1367 1704
1368 if (!iwl_is_alive(priv)) 1705 if (!iwl_is_alive(priv))
1369 return -EAGAIN; 1706 return -EAGAIN;
1370 1707
1371 /* make request to uCode to retrieve statistics information */
1372 mutex_lock(&priv->mutex);
1373 ret = iwl_send_statistics_request(priv, 0);
1374 mutex_unlock(&priv->mutex);
1375
1376 if (ret) {
1377 IWL_ERR(priv,
1378 "Error sending statistics request: %zd\n", ret);
1379 return -EAGAIN;
1380 }
1381 buf = kzalloc(bufsz, GFP_KERNEL); 1708 buf = kzalloc(bufsz, GFP_KERNEL);
1382 if (!buf) { 1709 if (!buf) {
1383 IWL_ERR(priv, "Can not allocate Buffer\n"); 1710 IWL_ERR(priv, "Can not allocate Buffer\n");
@@ -1391,34 +1718,79 @@ static ssize_t iwl_dbgfs_ucode_general_stats_read(struct file *file,
1391 general = &priv->statistics.general; 1718 general = &priv->statistics.general;
1392 dbg = &priv->statistics.general.dbg; 1719 dbg = &priv->statistics.general.dbg;
1393 div = &priv->statistics.general.div; 1720 div = &priv->statistics.general.div;
1721 accum_general = &priv->accum_statistics.general;
1722 delta_general = &priv->delta_statistics.general;
1723 max_general = &priv->max_delta.general;
1724 accum_dbg = &priv->accum_statistics.general.dbg;
1725 delta_dbg = &priv->delta_statistics.general.dbg;
1726 max_dbg = &priv->max_delta.general.dbg;
1727 accum_div = &priv->accum_statistics.general.div;
1728 delta_div = &priv->delta_statistics.general.div;
1729 max_div = &priv->max_delta.general.div;
1394 pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz); 1730 pos += iwl_dbgfs_statistics_flag(priv, buf, bufsz);
1395 pos += scnprintf(buf + pos, bufsz - pos, "Statistics_General:\n"); 1731 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_header,
1396 pos += scnprintf(buf + pos, bufsz - pos, "temperature: %u\n", 1732 "Statistics_General:");
1733 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_short_format,
1734 "temperature:",
1397 le32_to_cpu(general->temperature)); 1735 le32_to_cpu(general->temperature));
1398 pos += scnprintf(buf + pos, bufsz - pos, "temperature_m: %u\n", 1736 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_short_format,
1737 "temperature_m:",
1399 le32_to_cpu(general->temperature_m)); 1738 le32_to_cpu(general->temperature_m));
1400 pos += scnprintf(buf + pos, bufsz - pos, "burst_check: %u\n", 1739 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1401 le32_to_cpu(dbg->burst_check)); 1740 "burst_check:",
1402 pos += scnprintf(buf + pos, bufsz - pos, "burst_count: %u\n", 1741 le32_to_cpu(dbg->burst_check),
1403 le32_to_cpu(dbg->burst_count)); 1742 accum_dbg->burst_check,
1404 pos += scnprintf(buf + pos, bufsz - pos, "sleep_time: %u\n", 1743 delta_dbg->burst_check, max_dbg->burst_check);
1405 le32_to_cpu(general->sleep_time)); 1744 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1406 pos += scnprintf(buf + pos, bufsz - pos, "slots_out: %u\n", 1745 "burst_count:",
1407 le32_to_cpu(general->slots_out)); 1746 le32_to_cpu(dbg->burst_count),
1408 pos += scnprintf(buf + pos, bufsz - pos, "slots_idle: %u\n", 1747 accum_dbg->burst_count,
1409 le32_to_cpu(general->slots_idle)); 1748 delta_dbg->burst_count, max_dbg->burst_count);
1410 pos += scnprintf(buf + pos, bufsz - pos, "ttl_timestamp: %u\n", 1749 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1750 "sleep_time:",
1751 le32_to_cpu(general->sleep_time),
1752 accum_general->sleep_time,
1753 delta_general->sleep_time, max_general->sleep_time);
1754 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1755 "slots_out:",
1756 le32_to_cpu(general->slots_out),
1757 accum_general->slots_out,
1758 delta_general->slots_out, max_general->slots_out);
1759 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1760 "slots_idle:",
1761 le32_to_cpu(general->slots_idle),
1762 accum_general->slots_idle,
1763 delta_general->slots_idle, max_general->slots_idle);
1764 pos += scnprintf(buf + pos, bufsz - pos, "ttl_timestamp:\t\t\t%u\n",
1411 le32_to_cpu(general->ttl_timestamp)); 1765 le32_to_cpu(general->ttl_timestamp));
1412 pos += scnprintf(buf + pos, bufsz - pos, "tx_on_a: %u\n", 1766 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1413 le32_to_cpu(div->tx_on_a)); 1767 "tx_on_a:",
1414 pos += scnprintf(buf + pos, bufsz - pos, "tx_on_b: %u\n", 1768 le32_to_cpu(div->tx_on_a), accum_div->tx_on_a,
1415 le32_to_cpu(div->tx_on_b)); 1769 delta_div->tx_on_a, max_div->tx_on_a);
1416 pos += scnprintf(buf + pos, bufsz - pos, "exec_time: %u\n", 1770 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1417 le32_to_cpu(div->exec_time)); 1771 "tx_on_b:",
1418 pos += scnprintf(buf + pos, bufsz - pos, "probe_time: %u\n", 1772 le32_to_cpu(div->tx_on_b), accum_div->tx_on_b,
1419 le32_to_cpu(div->probe_time)); 1773 delta_div->tx_on_b, max_div->tx_on_b);
1420 pos += scnprintf(buf + pos, bufsz - pos, "rx_enable_counter: %u\n", 1774 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1421 le32_to_cpu(general->rx_enable_counter)); 1775 "exec_time:",
1776 le32_to_cpu(div->exec_time), accum_div->exec_time,
1777 delta_div->exec_time, max_div->exec_time);
1778 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1779 "probe_time:",
1780 le32_to_cpu(div->probe_time), accum_div->probe_time,
1781 delta_div->probe_time, max_div->probe_time);
1782 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1783 "rx_enable_counter:",
1784 le32_to_cpu(general->rx_enable_counter),
1785 accum_general->rx_enable_counter,
1786 delta_general->rx_enable_counter,
1787 max_general->rx_enable_counter);
1788 pos += scnprintf(buf + pos, bufsz - pos, ucode_stats_format,
1789 "num_of_sos_states:",
1790 le32_to_cpu(general->num_of_sos_states),
1791 accum_general->num_of_sos_states,
1792 delta_general->num_of_sos_states,
1793 max_general->num_of_sos_states);
1422 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 1794 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1423 kfree(buf); 1795 kfree(buf);
1424 return ret; 1796 return ret;
@@ -1428,7 +1800,7 @@ static ssize_t iwl_dbgfs_sensitivity_read(struct file *file,
1428 char __user *user_buf, 1800 char __user *user_buf,
1429 size_t count, loff_t *ppos) { 1801 size_t count, loff_t *ppos) {
1430 1802
1431 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1803 struct iwl_priv *priv = file->private_data;
1432 int pos = 0; 1804 int pos = 0;
1433 int cnt = 0; 1805 int cnt = 0;
1434 char *buf; 1806 char *buf;
@@ -1509,7 +1881,7 @@ static ssize_t iwl_dbgfs_chain_noise_read(struct file *file,
1509 char __user *user_buf, 1881 char __user *user_buf,
1510 size_t count, loff_t *ppos) { 1882 size_t count, loff_t *ppos) {
1511 1883
1512 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1884 struct iwl_priv *priv = file->private_data;
1513 int pos = 0; 1885 int pos = 0;
1514 int cnt = 0; 1886 int cnt = 0;
1515 char *buf; 1887 char *buf;
@@ -1567,26 +1939,15 @@ static ssize_t iwl_dbgfs_tx_power_read(struct file *file,
1567 char __user *user_buf, 1939 char __user *user_buf,
1568 size_t count, loff_t *ppos) { 1940 size_t count, loff_t *ppos) {
1569 1941
1570 struct iwl_priv *priv = (struct iwl_priv *)file->private_data; 1942 struct iwl_priv *priv = file->private_data;
1571 char buf[128]; 1943 char buf[128];
1572 int pos = 0; 1944 int pos = 0;
1573 ssize_t ret;
1574 const size_t bufsz = sizeof(buf); 1945 const size_t bufsz = sizeof(buf);
1575 struct statistics_tx *tx; 1946 struct statistics_tx *tx;
1576 1947
1577 if (!iwl_is_alive(priv)) 1948 if (!iwl_is_alive(priv))
1578 pos += scnprintf(buf + pos, bufsz - pos, "N/A\n"); 1949 pos += scnprintf(buf + pos, bufsz - pos, "N/A\n");
1579 else { 1950 else {
1580 /* make request to uCode to retrieve statistics information */
1581 mutex_lock(&priv->mutex);
1582 ret = iwl_send_statistics_request(priv, 0);
1583 mutex_unlock(&priv->mutex);
1584
1585 if (ret) {
1586 IWL_ERR(priv, "Error sending statistics request: %zd\n",
1587 ret);
1588 return -EAGAIN;
1589 }
1590 tx = &priv->statistics.tx; 1951 tx = &priv->statistics.tx;
1591 if (tx->tx_power.ant_a || 1952 if (tx->tx_power.ant_a ||
1592 tx->tx_power.ant_b || 1953 tx->tx_power.ant_b ||
@@ -1614,8 +1975,311 @@ static ssize_t iwl_dbgfs_tx_power_read(struct file *file,
1614 return simple_read_from_buffer(user_buf, count, ppos, buf, pos); 1975 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1615} 1976}
1616 1977
1617DEBUGFS_READ_WRITE_FILE_OPS(rx_statistics); 1978static ssize_t iwl_dbgfs_power_save_status_read(struct file *file,
1618DEBUGFS_READ_WRITE_FILE_OPS(tx_statistics); 1979 char __user *user_buf,
1980 size_t count, loff_t *ppos)
1981{
1982 struct iwl_priv *priv = file->private_data;
1983 char buf[60];
1984 int pos = 0;
1985 const size_t bufsz = sizeof(buf);
1986 u32 pwrsave_status;
1987
1988 pwrsave_status = iwl_read32(priv, CSR_GP_CNTRL) &
1989 CSR_GP_REG_POWER_SAVE_STATUS_MSK;
1990
1991 pos += scnprintf(buf + pos, bufsz - pos, "Power Save Status: ");
1992 pos += scnprintf(buf + pos, bufsz - pos, "%s\n",
1993 (pwrsave_status == CSR_GP_REG_NO_POWER_SAVE) ? "none" :
1994 (pwrsave_status == CSR_GP_REG_MAC_POWER_SAVE) ? "MAC" :
1995 (pwrsave_status == CSR_GP_REG_PHY_POWER_SAVE) ? "PHY" :
1996 "error");
1997
1998 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
1999}
2000
2001static ssize_t iwl_dbgfs_clear_ucode_statistics_write(struct file *file,
2002 const char __user *user_buf,
2003 size_t count, loff_t *ppos)
2004{
2005 struct iwl_priv *priv = file->private_data;
2006 char buf[8];
2007 int buf_size;
2008 int clear;
2009
2010 memset(buf, 0, sizeof(buf));
2011 buf_size = min(count, sizeof(buf) - 1);
2012 if (copy_from_user(buf, user_buf, buf_size))
2013 return -EFAULT;
2014 if (sscanf(buf, "%d", &clear) != 1)
2015 return -EFAULT;
2016
2017 /* make request to uCode to retrieve statistics information */
2018 mutex_lock(&priv->mutex);
2019 iwl_send_statistics_request(priv, CMD_SYNC, true);
2020 mutex_unlock(&priv->mutex);
2021
2022 return count;
2023}
2024
2025static ssize_t iwl_dbgfs_csr_write(struct file *file,
2026 const char __user *user_buf,
2027 size_t count, loff_t *ppos)
2028{
2029 struct iwl_priv *priv = file->private_data;
2030 char buf[8];
2031 int buf_size;
2032 int csr;
2033
2034 memset(buf, 0, sizeof(buf));
2035 buf_size = min(count, sizeof(buf) - 1);
2036 if (copy_from_user(buf, user_buf, buf_size))
2037 return -EFAULT;
2038 if (sscanf(buf, "%d", &csr) != 1)
2039 return -EFAULT;
2040
2041 if (priv->cfg->ops->lib->dump_csr)
2042 priv->cfg->ops->lib->dump_csr(priv);
2043
2044 return count;
2045}
2046
2047static ssize_t iwl_dbgfs_ucode_tracing_read(struct file *file,
2048 char __user *user_buf,
2049 size_t count, loff_t *ppos) {
2050
2051 struct iwl_priv *priv = (struct iwl_priv *)file->private_data;
2052 int pos = 0;
2053 char buf[128];
2054 const size_t bufsz = sizeof(buf);
2055 ssize_t ret;
2056
2057 pos += scnprintf(buf + pos, bufsz - pos, "ucode trace timer is %s\n",
2058 priv->event_log.ucode_trace ? "On" : "Off");
2059 pos += scnprintf(buf + pos, bufsz - pos, "non_wraps_count:\t\t %u\n",
2060 priv->event_log.non_wraps_count);
2061 pos += scnprintf(buf + pos, bufsz - pos, "wraps_once_count:\t\t %u\n",
2062 priv->event_log.wraps_once_count);
2063 pos += scnprintf(buf + pos, bufsz - pos, "wraps_more_count:\t\t %u\n",
2064 priv->event_log.wraps_more_count);
2065
2066 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2067 return ret;
2068}
2069
2070static ssize_t iwl_dbgfs_ucode_tracing_write(struct file *file,
2071 const char __user *user_buf,
2072 size_t count, loff_t *ppos)
2073{
2074 struct iwl_priv *priv = file->private_data;
2075 char buf[8];
2076 int buf_size;
2077 int trace;
2078
2079 memset(buf, 0, sizeof(buf));
2080 buf_size = min(count, sizeof(buf) - 1);
2081 if (copy_from_user(buf, user_buf, buf_size))
2082 return -EFAULT;
2083 if (sscanf(buf, "%d", &trace) != 1)
2084 return -EFAULT;
2085
2086 if (trace) {
2087 priv->event_log.ucode_trace = true;
2088 /* schedule the ucode timer to occur in UCODE_TRACE_PERIOD */
2089 mod_timer(&priv->ucode_trace,
2090 jiffies + msecs_to_jiffies(UCODE_TRACE_PERIOD));
2091 } else {
2092 priv->event_log.ucode_trace = false;
2093 del_timer_sync(&priv->ucode_trace);
2094 }
2095
2096 return count;
2097}
2098
2099static ssize_t iwl_dbgfs_fh_reg_read(struct file *file,
2100 char __user *user_buf,
2101 size_t count, loff_t *ppos)
2102{
2103 struct iwl_priv *priv = (struct iwl_priv *)file->private_data;
2104 char *buf;
2105 int pos = 0;
2106 ssize_t ret = -EFAULT;
2107
2108 if (priv->cfg->ops->lib->dump_fh) {
2109 ret = pos = priv->cfg->ops->lib->dump_fh(priv, &buf, true);
2110 if (buf) {
2111 ret = simple_read_from_buffer(user_buf,
2112 count, ppos, buf, pos);
2113 kfree(buf);
2114 }
2115 }
2116
2117 return ret;
2118}
2119
2120static ssize_t iwl_dbgfs_missed_beacon_read(struct file *file,
2121 char __user *user_buf,
2122 size_t count, loff_t *ppos) {
2123
2124 struct iwl_priv *priv = file->private_data;
2125 int pos = 0;
2126 char buf[12];
2127 const size_t bufsz = sizeof(buf);
2128 ssize_t ret;
2129
2130 pos += scnprintf(buf + pos, bufsz - pos, "%d\n",
2131 priv->missed_beacon_threshold);
2132
2133 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2134 return ret;
2135}
2136
2137static ssize_t iwl_dbgfs_missed_beacon_write(struct file *file,
2138 const char __user *user_buf,
2139 size_t count, loff_t *ppos)
2140{
2141 struct iwl_priv *priv = file->private_data;
2142 char buf[8];
2143 int buf_size;
2144 int missed;
2145
2146 memset(buf, 0, sizeof(buf));
2147 buf_size = min(count, sizeof(buf) - 1);
2148 if (copy_from_user(buf, user_buf, buf_size))
2149 return -EFAULT;
2150 if (sscanf(buf, "%d", &missed) != 1)
2151 return -EINVAL;
2152
2153 if (missed < IWL_MISSED_BEACON_THRESHOLD_MIN ||
2154 missed > IWL_MISSED_BEACON_THRESHOLD_MAX)
2155 priv->missed_beacon_threshold =
2156 IWL_MISSED_BEACON_THRESHOLD_DEF;
2157 else
2158 priv->missed_beacon_threshold = missed;
2159
2160 return count;
2161}
2162
2163static ssize_t iwl_dbgfs_internal_scan_write(struct file *file,
2164 const char __user *user_buf,
2165 size_t count, loff_t *ppos)
2166{
2167 struct iwl_priv *priv = file->private_data;
2168 char buf[8];
2169 int buf_size;
2170 int scan;
2171
2172 memset(buf, 0, sizeof(buf));
2173 buf_size = min(count, sizeof(buf) - 1);
2174 if (copy_from_user(buf, user_buf, buf_size))
2175 return -EFAULT;
2176 if (sscanf(buf, "%d", &scan) != 1)
2177 return -EINVAL;
2178
2179 iwl_internal_short_hw_scan(priv);
2180
2181 return count;
2182}
2183
2184static ssize_t iwl_dbgfs_plcp_delta_read(struct file *file,
2185 char __user *user_buf,
2186 size_t count, loff_t *ppos) {
2187
2188 struct iwl_priv *priv = (struct iwl_priv *)file->private_data;
2189 int pos = 0;
2190 char buf[12];
2191 const size_t bufsz = sizeof(buf);
2192 ssize_t ret;
2193
2194 pos += scnprintf(buf + pos, bufsz - pos, "%u\n",
2195 priv->cfg->plcp_delta_threshold);
2196
2197 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2198 return ret;
2199}
2200
2201static ssize_t iwl_dbgfs_plcp_delta_write(struct file *file,
2202 const char __user *user_buf,
2203 size_t count, loff_t *ppos) {
2204
2205 struct iwl_priv *priv = file->private_data;
2206 char buf[8];
2207 int buf_size;
2208 int plcp;
2209
2210 memset(buf, 0, sizeof(buf));
2211 buf_size = min(count, sizeof(buf) - 1);
2212 if (copy_from_user(buf, user_buf, buf_size))
2213 return -EFAULT;
2214 if (sscanf(buf, "%d", &plcp) != 1)
2215 return -EINVAL;
2216 if ((plcp <= IWL_MAX_PLCP_ERR_THRESHOLD_MIN) ||
2217 (plcp > IWL_MAX_PLCP_ERR_THRESHOLD_MAX))
2218 priv->cfg->plcp_delta_threshold =
2219 IWL_MAX_PLCP_ERR_THRESHOLD_DEF;
2220 else
2221 priv->cfg->plcp_delta_threshold = plcp;
2222 return count;
2223}
2224
2225static ssize_t iwl_dbgfs_force_reset_read(struct file *file,
2226 char __user *user_buf,
2227 size_t count, loff_t *ppos) {
2228
2229 struct iwl_priv *priv = file->private_data;
2230 int i, pos = 0;
2231 char buf[300];
2232 const size_t bufsz = sizeof(buf);
2233 struct iwl_force_reset *force_reset;
2234
2235 for (i = 0; i < IWL_MAX_FORCE_RESET; i++) {
2236 force_reset = &priv->force_reset[i];
2237 pos += scnprintf(buf + pos, bufsz - pos,
2238 "Force reset method %d\n", i);
2239 pos += scnprintf(buf + pos, bufsz - pos,
2240 "\tnumber of reset request: %d\n",
2241 force_reset->reset_request_count);
2242 pos += scnprintf(buf + pos, bufsz - pos,
2243 "\tnumber of reset request success: %d\n",
2244 force_reset->reset_success_count);
2245 pos += scnprintf(buf + pos, bufsz - pos,
2246 "\tnumber of reset request reject: %d\n",
2247 force_reset->reset_reject_count);
2248 pos += scnprintf(buf + pos, bufsz - pos,
2249 "\treset duration: %lu\n",
2250 force_reset->reset_duration);
2251 }
2252 return simple_read_from_buffer(user_buf, count, ppos, buf, pos);
2253}
2254
2255static ssize_t iwl_dbgfs_force_reset_write(struct file *file,
2256 const char __user *user_buf,
2257 size_t count, loff_t *ppos) {
2258
2259 struct iwl_priv *priv = file->private_data;
2260 char buf[8];
2261 int buf_size;
2262 int reset, ret;
2263
2264 memset(buf, 0, sizeof(buf));
2265 buf_size = min(count, sizeof(buf) - 1);
2266 if (copy_from_user(buf, user_buf, buf_size))
2267 return -EFAULT;
2268 if (sscanf(buf, "%d", &reset) != 1)
2269 return -EINVAL;
2270 switch (reset) {
2271 case IWL_RF_RESET:
2272 case IWL_FW_RESET:
2273 ret = iwl_force_reset(priv, reset);
2274 break;
2275 default:
2276 return -EINVAL;
2277 }
2278 return ret ? ret : count;
2279}
2280
2281DEBUGFS_READ_FILE_OPS(rx_statistics);
2282DEBUGFS_READ_FILE_OPS(tx_statistics);
1619DEBUGFS_READ_WRITE_FILE_OPS(traffic_log); 2283DEBUGFS_READ_WRITE_FILE_OPS(traffic_log);
1620DEBUGFS_READ_FILE_OPS(rx_queue); 2284DEBUGFS_READ_FILE_OPS(rx_queue);
1621DEBUGFS_READ_FILE_OPS(tx_queue); 2285DEBUGFS_READ_FILE_OPS(tx_queue);
@@ -1625,6 +2289,16 @@ DEBUGFS_READ_FILE_OPS(ucode_general_stats);
1625DEBUGFS_READ_FILE_OPS(sensitivity); 2289DEBUGFS_READ_FILE_OPS(sensitivity);
1626DEBUGFS_READ_FILE_OPS(chain_noise); 2290DEBUGFS_READ_FILE_OPS(chain_noise);
1627DEBUGFS_READ_FILE_OPS(tx_power); 2291DEBUGFS_READ_FILE_OPS(tx_power);
2292DEBUGFS_READ_FILE_OPS(power_save_status);
2293DEBUGFS_WRITE_FILE_OPS(clear_ucode_statistics);
2294DEBUGFS_WRITE_FILE_OPS(clear_traffic_statistics);
2295DEBUGFS_WRITE_FILE_OPS(csr);
2296DEBUGFS_READ_WRITE_FILE_OPS(ucode_tracing);
2297DEBUGFS_READ_FILE_OPS(fh_reg);
2298DEBUGFS_READ_WRITE_FILE_OPS(missed_beacon);
2299DEBUGFS_WRITE_FILE_OPS(internal_scan);
2300DEBUGFS_READ_WRITE_FILE_OPS(plcp_delta);
2301DEBUGFS_READ_WRITE_FILE_OPS(force_reset);
1628 2302
1629/* 2303/*
1630 * Create the debugfs files and directories 2304 * Create the debugfs files and directories
@@ -1632,68 +2306,74 @@ DEBUGFS_READ_FILE_OPS(tx_power);
1632 */ 2306 */
1633int iwl_dbgfs_register(struct iwl_priv *priv, const char *name) 2307int iwl_dbgfs_register(struct iwl_priv *priv, const char *name)
1634{ 2308{
1635 struct iwl_debugfs *dbgfs;
1636 struct dentry *phyd = priv->hw->wiphy->debugfsdir; 2309 struct dentry *phyd = priv->hw->wiphy->debugfsdir;
1637 int ret = 0; 2310 struct dentry *dir_drv, *dir_data, *dir_rf, *dir_debug;
1638 2311
1639 dbgfs = kzalloc(sizeof(struct iwl_debugfs), GFP_KERNEL); 2312 dir_drv = debugfs_create_dir(name, phyd);
1640 if (!dbgfs) { 2313 if (!dir_drv)
1641 ret = -ENOMEM; 2314 return -ENOMEM;
1642 goto err; 2315
1643 } 2316 priv->debugfs_dir = dir_drv;
1644 2317
1645 priv->dbgfs = dbgfs; 2318 dir_data = debugfs_create_dir("data", dir_drv);
1646 dbgfs->name = name; 2319 if (!dir_data)
1647 dbgfs->dir_drv = debugfs_create_dir(name, phyd); 2320 goto err;
1648 if (!dbgfs->dir_drv || IS_ERR(dbgfs->dir_drv)) { 2321 dir_rf = debugfs_create_dir("rf", dir_drv);
1649 ret = -ENOENT; 2322 if (!dir_rf)
2323 goto err;
2324 dir_debug = debugfs_create_dir("debug", dir_drv);
2325 if (!dir_debug)
1650 goto err; 2326 goto err;
1651 }
1652 2327
1653 DEBUGFS_ADD_DIR(data, dbgfs->dir_drv); 2328 DEBUGFS_ADD_FILE(nvm, dir_data, S_IRUSR);
1654 DEBUGFS_ADD_DIR(rf, dbgfs->dir_drv); 2329 DEBUGFS_ADD_FILE(sram, dir_data, S_IWUSR | S_IRUSR);
1655 DEBUGFS_ADD_DIR(debug, dbgfs->dir_drv); 2330 DEBUGFS_ADD_FILE(log_event, dir_data, S_IWUSR | S_IRUSR);
1656 DEBUGFS_ADD_FILE(nvm, data); 2331 DEBUGFS_ADD_FILE(stations, dir_data, S_IRUSR);
1657 DEBUGFS_ADD_FILE(sram, data); 2332 DEBUGFS_ADD_FILE(channels, dir_data, S_IRUSR);
1658 DEBUGFS_ADD_FILE(log_event, data); 2333 DEBUGFS_ADD_FILE(status, dir_data, S_IRUSR);
1659 DEBUGFS_ADD_FILE(stations, data); 2334 DEBUGFS_ADD_FILE(interrupt, dir_data, S_IWUSR | S_IRUSR);
1660 DEBUGFS_ADD_FILE(channels, data); 2335 DEBUGFS_ADD_FILE(qos, dir_data, S_IRUSR);
1661 DEBUGFS_ADD_FILE(status, data); 2336 DEBUGFS_ADD_FILE(led, dir_data, S_IRUSR);
1662 DEBUGFS_ADD_FILE(interrupt, data); 2337 DEBUGFS_ADD_FILE(sleep_level_override, dir_data, S_IWUSR | S_IRUSR);
1663 DEBUGFS_ADD_FILE(qos, data); 2338 DEBUGFS_ADD_FILE(current_sleep_command, dir_data, S_IRUSR);
1664#ifdef CONFIG_IWLWIFI_LEDS 2339 DEBUGFS_ADD_FILE(thermal_throttling, dir_data, S_IRUSR);
1665 DEBUGFS_ADD_FILE(led, data); 2340 DEBUGFS_ADD_FILE(disable_ht40, dir_data, S_IWUSR | S_IRUSR);
1666#endif 2341 DEBUGFS_ADD_FILE(rx_statistics, dir_debug, S_IRUSR);
1667 DEBUGFS_ADD_FILE(sleep_level_override, data); 2342 DEBUGFS_ADD_FILE(tx_statistics, dir_debug, S_IRUSR);
1668 DEBUGFS_ADD_FILE(current_sleep_command, data); 2343 DEBUGFS_ADD_FILE(traffic_log, dir_debug, S_IWUSR | S_IRUSR);
1669 DEBUGFS_ADD_FILE(thermal_throttling, data); 2344 DEBUGFS_ADD_FILE(rx_queue, dir_debug, S_IRUSR);
1670 DEBUGFS_ADD_FILE(disable_ht40, data); 2345 DEBUGFS_ADD_FILE(tx_queue, dir_debug, S_IRUSR);
1671 DEBUGFS_ADD_FILE(rx_statistics, debug); 2346 DEBUGFS_ADD_FILE(tx_power, dir_debug, S_IRUSR);
1672 DEBUGFS_ADD_FILE(tx_statistics, debug); 2347 DEBUGFS_ADD_FILE(power_save_status, dir_debug, S_IRUSR);
1673 DEBUGFS_ADD_FILE(traffic_log, debug); 2348 DEBUGFS_ADD_FILE(clear_ucode_statistics, dir_debug, S_IWUSR);
1674 DEBUGFS_ADD_FILE(rx_queue, debug); 2349 DEBUGFS_ADD_FILE(clear_traffic_statistics, dir_debug, S_IWUSR);
1675 DEBUGFS_ADD_FILE(tx_queue, debug); 2350 DEBUGFS_ADD_FILE(csr, dir_debug, S_IWUSR);
1676 DEBUGFS_ADD_FILE(tx_power, debug); 2351 DEBUGFS_ADD_FILE(fh_reg, dir_debug, S_IRUSR);
2352 DEBUGFS_ADD_FILE(missed_beacon, dir_debug, S_IWUSR);
2353 DEBUGFS_ADD_FILE(internal_scan, dir_debug, S_IWUSR);
2354 DEBUGFS_ADD_FILE(plcp_delta, dir_debug, S_IWUSR | S_IRUSR);
2355 DEBUGFS_ADD_FILE(force_reset, dir_debug, S_IWUSR | S_IRUSR);
1677 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) != CSR_HW_REV_TYPE_3945) { 2356 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) != CSR_HW_REV_TYPE_3945) {
1678 DEBUGFS_ADD_FILE(ucode_rx_stats, debug); 2357 DEBUGFS_ADD_FILE(ucode_rx_stats, dir_debug, S_IRUSR);
1679 DEBUGFS_ADD_FILE(ucode_tx_stats, debug); 2358 DEBUGFS_ADD_FILE(ucode_tx_stats, dir_debug, S_IRUSR);
1680 DEBUGFS_ADD_FILE(ucode_general_stats, debug); 2359 DEBUGFS_ADD_FILE(ucode_general_stats, dir_debug, S_IRUSR);
1681 DEBUGFS_ADD_FILE(sensitivity, debug); 2360 DEBUGFS_ADD_FILE(sensitivity, dir_debug, S_IRUSR);
1682 DEBUGFS_ADD_FILE(chain_noise, debug); 2361 DEBUGFS_ADD_FILE(chain_noise, dir_debug, S_IRUSR);
2362 DEBUGFS_ADD_FILE(ucode_tracing, dir_debug, S_IWUSR | S_IRUSR);
1683 } 2363 }
1684 DEBUGFS_ADD_BOOL(disable_sensitivity, rf, &priv->disable_sens_cal); 2364 DEBUGFS_ADD_BOOL(disable_sensitivity, dir_rf, &priv->disable_sens_cal);
1685 DEBUGFS_ADD_BOOL(disable_chain_noise, rf, 2365 DEBUGFS_ADD_BOOL(disable_chain_noise, dir_rf,
1686 &priv->disable_chain_noise_cal); 2366 &priv->disable_chain_noise_cal);
1687 if (((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965) || 2367 if (((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965) ||
1688 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_3945)) 2368 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_3945))
1689 DEBUGFS_ADD_BOOL(disable_tx_power, rf, 2369 DEBUGFS_ADD_BOOL(disable_tx_power, dir_rf,
1690 &priv->disable_tx_power_cal); 2370 &priv->disable_tx_power_cal);
1691 return 0; 2371 return 0;
1692 2372
1693err: 2373err:
1694 IWL_ERR(priv, "Can't open the debugfs directory\n"); 2374 IWL_ERR(priv, "Can't create the debugfs directory\n");
1695 iwl_dbgfs_unregister(priv); 2375 iwl_dbgfs_unregister(priv);
1696 return ret; 2376 return -ENOMEM;
1697} 2377}
1698EXPORT_SYMBOL(iwl_dbgfs_register); 2378EXPORT_SYMBOL(iwl_dbgfs_register);
1699 2379
@@ -1703,53 +2383,11 @@ EXPORT_SYMBOL(iwl_dbgfs_register);
1703 */ 2383 */
1704void iwl_dbgfs_unregister(struct iwl_priv *priv) 2384void iwl_dbgfs_unregister(struct iwl_priv *priv)
1705{ 2385{
1706 if (!priv->dbgfs) 2386 if (!priv->debugfs_dir)
1707 return; 2387 return;
1708 2388
1709 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_sleep_level_override); 2389 debugfs_remove_recursive(priv->debugfs_dir);
1710 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_current_sleep_command); 2390 priv->debugfs_dir = NULL;
1711 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_nvm);
1712 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_sram);
1713 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_log_event);
1714 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_stations);
1715 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_channels);
1716 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_status);
1717 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_interrupt);
1718 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_qos);
1719#ifdef CONFIG_IWLWIFI_LEDS
1720 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_led);
1721#endif
1722 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_thermal_throttling);
1723 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_data_files.file_disable_ht40);
1724 DEBUGFS_REMOVE(priv->dbgfs->dir_data);
1725 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.file_rx_statistics);
1726 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.file_tx_statistics);
1727 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.file_traffic_log);
1728 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.file_rx_queue);
1729 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.file_tx_queue);
1730 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.file_tx_power);
1731 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) != CSR_HW_REV_TYPE_3945) {
1732 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.
1733 file_ucode_rx_stats);
1734 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.
1735 file_ucode_tx_stats);
1736 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.
1737 file_ucode_general_stats);
1738 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.
1739 file_sensitivity);
1740 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_debug_files.
1741 file_chain_noise);
1742 }
1743 DEBUGFS_REMOVE(priv->dbgfs->dir_debug);
1744 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_sensitivity);
1745 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_chain_noise);
1746 if (((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965) ||
1747 ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_3945))
1748 DEBUGFS_REMOVE(priv->dbgfs->dbgfs_rf_files.file_disable_tx_power);
1749 DEBUGFS_REMOVE(priv->dbgfs->dir_rf);
1750 DEBUGFS_REMOVE(priv->dbgfs->dir_drv);
1751 kfree(priv->dbgfs);
1752 priv->dbgfs = NULL;
1753} 2391}
1754EXPORT_SYMBOL(iwl_dbgfs_unregister); 2392EXPORT_SYMBOL(iwl_dbgfs_unregister);
1755 2393
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index 028d50599550..ef1720a852e9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -43,7 +43,6 @@
43#include "iwl-debug.h" 43#include "iwl-debug.h"
44#include "iwl-4965-hw.h" 44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h" 45#include "iwl-3945-hw.h"
46#include "iwl-3945-led.h"
47#include "iwl-led.h" 46#include "iwl-led.h"
48#include "iwl-power.h" 47#include "iwl-power.h"
49#include "iwl-agn-rs.h" 48#include "iwl-agn-rs.h"
@@ -53,21 +52,23 @@ extern struct iwl_cfg iwl4965_agn_cfg;
53extern struct iwl_cfg iwl5300_agn_cfg; 52extern struct iwl_cfg iwl5300_agn_cfg;
54extern struct iwl_cfg iwl5100_agn_cfg; 53extern struct iwl_cfg iwl5100_agn_cfg;
55extern struct iwl_cfg iwl5350_agn_cfg; 54extern struct iwl_cfg iwl5350_agn_cfg;
56extern struct iwl_cfg iwl5100_bg_cfg; 55extern struct iwl_cfg iwl5100_bgn_cfg;
57extern struct iwl_cfg iwl5100_abg_cfg; 56extern struct iwl_cfg iwl5100_abg_cfg;
58extern struct iwl_cfg iwl5150_agn_cfg; 57extern struct iwl_cfg iwl5150_agn_cfg;
59extern struct iwl_cfg iwl6000h_2agn_cfg; 58extern struct iwl_cfg iwl5150_abg_cfg;
60extern struct iwl_cfg iwl6000i_2agn_cfg; 59extern struct iwl_cfg iwl6000i_2agn_cfg;
60extern struct iwl_cfg iwl6000i_2abg_cfg;
61extern struct iwl_cfg iwl6000i_2bg_cfg;
61extern struct iwl_cfg iwl6000_3agn_cfg; 62extern struct iwl_cfg iwl6000_3agn_cfg;
62extern struct iwl_cfg iwl6050_2agn_cfg; 63extern struct iwl_cfg iwl6050_2agn_cfg;
63extern struct iwl_cfg iwl6050_3agn_cfg; 64extern struct iwl_cfg iwl6050_2abg_cfg;
64extern struct iwl_cfg iwl1000_bgn_cfg; 65extern struct iwl_cfg iwl1000_bgn_cfg;
66extern struct iwl_cfg iwl1000_bg_cfg;
65 67
66struct iwl_tx_queue; 68struct iwl_tx_queue;
67 69
68/* shared structures from iwl-5000.c */ 70/* shared structures from iwl-5000.c */
69extern struct iwl_mod_params iwl50_mod_params; 71extern struct iwl_mod_params iwl50_mod_params;
70extern struct iwl_ops iwl5000_ops;
71extern struct iwl_ucode_ops iwl5000_ucode; 72extern struct iwl_ucode_ops iwl5000_ucode;
72extern struct iwl_lib_ops iwl5000_lib; 73extern struct iwl_lib_ops iwl5000_lib;
73extern struct iwl_hcmd_ops iwl5000_hcmd; 74extern struct iwl_hcmd_ops iwl5000_hcmd;
@@ -81,9 +82,6 @@ extern void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
81 __le32 *tx_flags); 82 __le32 *tx_flags);
82extern int iwl5000_calc_rssi(struct iwl_priv *priv, 83extern int iwl5000_calc_rssi(struct iwl_priv *priv,
83 struct iwl_rx_phy_res *rx_resp); 84 struct iwl_rx_phy_res *rx_resp);
84extern int iwl5000_apm_init(struct iwl_priv *priv);
85extern void iwl5000_apm_stop(struct iwl_priv *priv);
86extern int iwl5000_apm_reset(struct iwl_priv *priv);
87extern void iwl5000_nic_config(struct iwl_priv *priv); 85extern void iwl5000_nic_config(struct iwl_priv *priv);
88extern u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv); 86extern u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv);
89extern const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv, 87extern const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
@@ -144,12 +142,13 @@ extern void iwl5000_temperature(struct iwl_priv *priv);
144#define DEFAULT_LONG_RETRY_LIMIT 4U 142#define DEFAULT_LONG_RETRY_LIMIT 4U
145 143
146struct iwl_rx_mem_buffer { 144struct iwl_rx_mem_buffer {
147 dma_addr_t real_dma_addr; 145 dma_addr_t page_dma;
148 dma_addr_t aligned_dma_addr; 146 struct page *page;
149 struct sk_buff *skb;
150 struct list_head list; 147 struct list_head list;
151}; 148};
152 149
150#define rxb_addr(r) page_address(r->page)
151
153/* defined below */ 152/* defined below */
154struct iwl_device_cmd; 153struct iwl_device_cmd;
155 154
@@ -165,7 +164,7 @@ struct iwl_cmd_meta {
165 */ 164 */
166 void (*callback)(struct iwl_priv *priv, 165 void (*callback)(struct iwl_priv *priv,
167 struct iwl_device_cmd *cmd, 166 struct iwl_device_cmd *cmd,
168 struct sk_buff *skb); 167 struct iwl_rx_packet *pkt);
169 168
170 /* The CMD_SIZE_HUGE flag bit indicates that the command 169 /* The CMD_SIZE_HUGE flag bit indicates that the command
171 * structure is stored at the end of the shared queue memory. */ 170 * structure is stored at the end of the shared queue memory. */
@@ -293,9 +292,6 @@ struct iwl_channel_info {
293 292
294 /* HT40 channel info */ 293 /* HT40 channel info */
295 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */ 294 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
296 s8 ht40_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
297 s8 ht40_min_power; /* always 0 */
298 s8 ht40_scan_power; /* (dBm) eeprom, direct scans, any rate */
299 u8 ht40_flags; /* flags copied from EEPROM */ 295 u8 ht40_flags; /* flags copied from EEPROM */
300 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */ 296 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
301 297
@@ -321,6 +317,13 @@ struct iwl_channel_info {
321 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */ 317 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
322#define IWL_MIN_NUM_QUEUES 10 318#define IWL_MIN_NUM_QUEUES 10
323 319
320/*
321 * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00,
322 * the driver maps it into the appropriate device FIFO for the
323 * uCode.
324 */
325#define IWL_CMD_QUEUE_NUM 4
326
324/* Power management (not Tx power) structures */ 327/* Power management (not Tx power) structures */
325 328
326enum iwl_pwr_src { 329enum iwl_pwr_src {
@@ -356,7 +359,14 @@ enum {
356 CMD_WANT_SKB = (1 << 2), 359 CMD_WANT_SKB = (1 << 2),
357}; 360};
358 361
359#define IWL_CMD_MAX_PAYLOAD 320 362#define DEF_CMD_PAYLOAD_SIZE 320
363
364/*
365 * IWL_LINK_HDR_MAX should include ieee80211_hdr, radiotap header,
366 * SNAP header and alignment. It should also be big enough for 802.11
367 * control frames.
368 */
369#define IWL_LINK_HDR_MAX 64
360 370
361/** 371/**
362 * struct iwl_device_cmd 372 * struct iwl_device_cmd
@@ -373,7 +383,8 @@ struct iwl_device_cmd {
373 u16 val16; 383 u16 val16;
374 u32 val32; 384 u32 val32;
375 struct iwl_tx_cmd tx; 385 struct iwl_tx_cmd tx;
376 u8 payload[IWL_CMD_MAX_PAYLOAD]; 386 struct iwl6000_channel_switch_cmd chswitch;
387 u8 payload[DEF_CMD_PAYLOAD_SIZE];
377 } __attribute__ ((packed)) cmd; 388 } __attribute__ ((packed)) cmd;
378} __attribute__ ((packed)); 389} __attribute__ ((packed));
379 390
@@ -382,21 +393,15 @@ struct iwl_device_cmd {
382 393
383struct iwl_host_cmd { 394struct iwl_host_cmd {
384 const void *data; 395 const void *data;
385 struct sk_buff *reply_skb; 396 unsigned long reply_page;
386 void (*callback)(struct iwl_priv *priv, 397 void (*callback)(struct iwl_priv *priv,
387 struct iwl_device_cmd *cmd, 398 struct iwl_device_cmd *cmd,
388 struct sk_buff *skb); 399 struct iwl_rx_packet *pkt);
389 u32 flags; 400 u32 flags;
390 u16 len; 401 u16 len;
391 u8 id; 402 u8 id;
392}; 403};
393 404
394/*
395 * RX related structures and functions
396 */
397#define RX_FREE_BUFFERS 64
398#define RX_LOW_WATERMARK 8
399
400#define SUP_RATE_11A_MAX_NUM_CHANNELS 8 405#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
401#define SUP_RATE_11B_MAX_NUM_CHANNELS 4 406#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
402#define SUP_RATE_11G_MAX_NUM_CHANNELS 12 407#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
@@ -502,12 +507,12 @@ union iwl_ht_rate_supp {
502#define CFG_HT_MPDU_DENSITY_4USEC (0x5) 507#define CFG_HT_MPDU_DENSITY_4USEC (0x5)
503#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC 508#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
504 509
505struct iwl_ht_info { 510struct iwl_ht_config {
506 /* self configuration data */ 511 /* self configuration data */
507 u8 is_ht; 512 bool is_ht;
508 u8 supported_chan_width; 513 bool is_40mhz;
509 u8 sm_ps; 514 bool single_chain_sufficient;
510 struct ieee80211_mcs_info mcs; 515 enum ieee80211_smps_mode smps; /* current smps mode */
511 /* BSS related data */ 516 /* BSS related data */
512 u8 extension_chan_offset; 517 u8 extension_chan_offset;
513 u8 ht_protection; 518 u8 ht_protection;
@@ -541,26 +546,27 @@ struct iwl_qos_info {
541 struct iwl_qosparam_cmd def_qos_parm; 546 struct iwl_qosparam_cmd def_qos_parm;
542}; 547};
543 548
544#define STA_PS_STATUS_WAKE 0
545#define STA_PS_STATUS_SLEEP 1
546
547
548struct iwl3945_station_entry {
549 struct iwl3945_addsta_cmd sta;
550 struct iwl_tid_data tid[MAX_TID_COUNT];
551 u8 used;
552 u8 ps_status;
553 struct iwl_hw_key keyinfo;
554};
555
556struct iwl_station_entry { 549struct iwl_station_entry {
557 struct iwl_addsta_cmd sta; 550 struct iwl_addsta_cmd sta;
558 struct iwl_tid_data tid[MAX_TID_COUNT]; 551 struct iwl_tid_data tid[MAX_TID_COUNT];
559 u8 used; 552 u8 used;
560 u8 ps_status;
561 struct iwl_hw_key keyinfo; 553 struct iwl_hw_key keyinfo;
562}; 554};
563 555
556/*
557 * iwl_station_priv: Driver's private station information
558 *
559 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
560 * in the structure for use by driver. This structure is places in that
561 * space.
562 */
563struct iwl_station_priv {
564 struct iwl_lq_sta lq_sta;
565 atomic_t pending_frames;
566 bool client;
567 bool asleep;
568};
569
564/* one for each uCode image (inst/data, boot/init/runtime) */ 570/* one for each uCode image (inst/data, boot/init/runtime) */
565struct fw_desc { 571struct fw_desc {
566 void *v_addr; /* access by driver */ 572 void *v_addr; /* access by driver */
@@ -622,6 +628,10 @@ struct iwl_sensitivity_ranges {
622 u16 auto_corr_max_cck_mrc; 628 u16 auto_corr_max_cck_mrc;
623 u16 auto_corr_min_cck; 629 u16 auto_corr_min_cck;
624 u16 auto_corr_min_cck_mrc; 630 u16 auto_corr_min_cck_mrc;
631
632 u16 barker_corr_th_min;
633 u16 barker_corr_th_min_mrc;
634 u16 nrg_th_cca;
625}; 635};
626 636
627 637
@@ -639,7 +649,7 @@ struct iwl_sensitivity_ranges {
639 * @valid_tx/rx_ant: usable antennas 649 * @valid_tx/rx_ant: usable antennas
640 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2) 650 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
641 * @max_rxq_log: Log-base-2 of max_rxq_size 651 * @max_rxq_log: Log-base-2 of max_rxq_size
642 * @rx_buf_size: Rx buffer size 652 * @rx_page_order: Rx buffer page order
643 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR 653 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
644 * @max_stations: 654 * @max_stations:
645 * @bcast_sta_id: 655 * @bcast_sta_id:
@@ -662,9 +672,8 @@ struct iwl_hw_params {
662 u8 valid_rx_ant; 672 u8 valid_rx_ant;
663 u16 max_rxq_size; 673 u16 max_rxq_size;
664 u16 max_rxq_log; 674 u16 max_rxq_log;
665 u32 rx_buf_size; 675 u32 rx_page_order;
666 u32 rx_wrt_ptr_reg; 676 u32 rx_wrt_ptr_reg;
667 u32 max_pkt_size;
668 u8 max_stations; 677 u8 max_stations;
669 u8 bcast_sta_id; 678 u8 bcast_sta_id;
670 u8 ht40_channel; 679 u8 ht40_channel;
@@ -703,7 +712,7 @@ extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
703extern int iwl_queue_space(const struct iwl_queue *q); 712extern int iwl_queue_space(const struct iwl_queue *q);
704static inline int iwl_queue_used(const struct iwl_queue *q, int i) 713static inline int iwl_queue_used(const struct iwl_queue *q, int i)
705{ 714{
706 return q->write_ptr > q->read_ptr ? 715 return q->write_ptr >= q->read_ptr ?
707 (i >= q->read_ptr && i < q->write_ptr) : 716 (i >= q->read_ptr && i < q->write_ptr) :
708 !(i < q->read_ptr && i >= q->write_ptr); 717 !(i < q->read_ptr && i >= q->write_ptr);
709} 718}
@@ -711,7 +720,11 @@ static inline int iwl_queue_used(const struct iwl_queue *q, int i)
711 720
712static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge) 721static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
713{ 722{
714 /* This is for scan command, the big buffer at end of command array */ 723 /*
724 * This is for init calibration result and scan command which
725 * required buffer > TFD_MAX_PAYLOAD_SIZE,
726 * the big buffer at end of command array
727 */
715 if (is_huge) 728 if (is_huge)
716 return q->n_window; /* must be power of 2 */ 729 return q->n_window; /* must be power of 2 */
717 730
@@ -726,9 +739,6 @@ struct iwl_dma_ptr {
726 size_t size; 739 size_t size;
727}; 740};
728 741
729#define IWL_CHANNEL_WIDTH_20MHZ 0
730#define IWL_CHANNEL_WIDTH_40MHZ 1
731
732#define IWL_OPERATION_MODE_AUTO 0 742#define IWL_OPERATION_MODE_AUTO 0
733#define IWL_OPERATION_MODE_HT_ONLY 1 743#define IWL_OPERATION_MODE_HT_ONLY 1
734#define IWL_OPERATION_MODE_MIXED 2 744#define IWL_OPERATION_MODE_MIXED 2
@@ -741,7 +751,8 @@ struct iwl_dma_ptr {
741 751
742/* Sensitivity and chain noise calibration */ 752/* Sensitivity and chain noise calibration */
743#define INITIALIZATION_VALUE 0xFFFF 753#define INITIALIZATION_VALUE 0xFFFF
744#define CAL_NUM_OF_BEACONS 20 754#define IWL4965_CAL_NUM_BEACONS 20
755#define IWL_CAL_NUM_BEACONS 16
745#define MAXIMUM_ALLOWED_PATHLOSS 15 756#define MAXIMUM_ALLOWED_PATHLOSS 15
746 757
747#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3 758#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
@@ -845,6 +856,10 @@ struct iwl_sensitivity_data {
845 s32 nrg_auto_corr_silence_diff; 856 s32 nrg_auto_corr_silence_diff;
846 u32 num_in_cck_no_fa; 857 u32 num_in_cck_no_fa;
847 u32 nrg_th_ofdm; 858 u32 nrg_th_ofdm;
859
860 u16 barker_corr_th_min;
861 u16 barker_corr_th_min_mrc;
862 u16 nrg_th_cca;
848}; 863};
849 864
850/* Chain noise (differential Rx gain) calib data */ 865/* Chain noise (differential Rx gain) calib data */
@@ -894,13 +909,11 @@ enum iwl_access_mode {
894/** 909/**
895 * enum iwl_pa_type - Power Amplifier type 910 * enum iwl_pa_type - Power Amplifier type
896 * @IWL_PA_SYSTEM: based on uCode configuration 911 * @IWL_PA_SYSTEM: based on uCode configuration
897 * @IWL_PA_HYBRID: use both Internal and external PA
898 * @IWL_PA_INTERNAL: use Internal only 912 * @IWL_PA_INTERNAL: use Internal only
899 */ 913 */
900enum iwl_pa_type { 914enum iwl_pa_type {
901 IWL_PA_SYSTEM = 0, 915 IWL_PA_SYSTEM = 0,
902 IWL_PA_HYBRID = 1, 916 IWL_PA_INTERNAL = 1,
903 IWL_PA_INTERNAL = 2,
904}; 917};
905 918
906/* interrupt statistics */ 919/* interrupt statistics */
@@ -961,7 +974,84 @@ struct traffic_stats {
961}; 974};
962#endif 975#endif
963 976
964#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */ 977/*
978 * iwl_switch_rxon: "channel switch" structure
979 *
980 * @ switch_in_progress: channel switch in progress
981 * @ channel: new channel
982 */
983struct iwl_switch_rxon {
984 bool switch_in_progress;
985 __le16 channel;
986};
987
988/*
989 * schedule the timer to wake up every UCODE_TRACE_PERIOD milliseconds
990 * to perform continuous uCode event logging operation if enabled
991 */
992#define UCODE_TRACE_PERIOD (100)
993
994/*
995 * iwl_event_log: current uCode event log position
996 *
997 * @ucode_trace: enable/disable ucode continuous trace timer
998 * @num_wraps: how many times the event buffer wraps
999 * @next_entry: the entry just before the next one that uCode would fill
1000 * @non_wraps_count: counter for no wrap detected when dump ucode events
1001 * @wraps_once_count: counter for wrap once detected when dump ucode events
1002 * @wraps_more_count: counter for wrap more than once detected
1003 * when dump ucode events
1004 */
1005struct iwl_event_log {
1006 bool ucode_trace;
1007 u32 num_wraps;
1008 u32 next_entry;
1009 int non_wraps_count;
1010 int wraps_once_count;
1011 int wraps_more_count;
1012};
1013
1014/*
1015 * host interrupt timeout value
1016 * used with setting interrupt coalescing timer
1017 * the CSR_INT_COALESCING is an 8 bit register in 32-usec unit
1018 *
1019 * default interrupt coalescing timer is 64 x 32 = 2048 usecs
1020 * default interrupt coalescing calibration timer is 16 x 32 = 512 usecs
1021 */
1022#define IWL_HOST_INT_TIMEOUT_MAX (0xFF)
1023#define IWL_HOST_INT_TIMEOUT_DEF (0x40)
1024#define IWL_HOST_INT_TIMEOUT_MIN (0x0)
1025#define IWL_HOST_INT_CALIB_TIMEOUT_MAX (0xFF)
1026#define IWL_HOST_INT_CALIB_TIMEOUT_DEF (0x10)
1027#define IWL_HOST_INT_CALIB_TIMEOUT_MIN (0x0)
1028
1029/*
1030 * This is the threshold value of plcp error rate per 100mSecs. It is
1031 * used to set and check for the validity of plcp_delta.
1032 */
1033#define IWL_MAX_PLCP_ERR_THRESHOLD_MIN (0)
1034#define IWL_MAX_PLCP_ERR_THRESHOLD_DEF (50)
1035#define IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF (100)
1036#define IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF (200)
1037#define IWL_MAX_PLCP_ERR_THRESHOLD_MAX (255)
1038
1039#define IWL_DELAY_NEXT_FORCE_RF_RESET (HZ*3)
1040#define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5)
1041
1042enum iwl_reset {
1043 IWL_RF_RESET = 0,
1044 IWL_FW_RESET,
1045 IWL_MAX_FORCE_RESET,
1046};
1047
1048struct iwl_force_reset {
1049 int reset_request_count;
1050 int reset_success_count;
1051 int reset_reject_count;
1052 unsigned long reset_duration;
1053 unsigned long last_force_reset_jiffies;
1054};
965 1055
966struct iwl_priv { 1056struct iwl_priv {
967 1057
@@ -976,20 +1066,26 @@ struct iwl_priv {
976 int frames_count; 1066 int frames_count;
977 1067
978 enum ieee80211_band band; 1068 enum ieee80211_band band;
979 int alloc_rxb_skb; 1069 int alloc_rxb_page;
980 1070
981 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv, 1071 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
982 struct iwl_rx_mem_buffer *rxb); 1072 struct iwl_rx_mem_buffer *rxb);
983 1073
984 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS]; 1074 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
985 1075
986#if defined(CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT) || defined(CONFIG_IWL3945_SPECTRUM_MEASUREMENT)
987 /* spectrum measurement report caching */ 1076 /* spectrum measurement report caching */
988 struct iwl_spectrum_notification measure_report; 1077 struct iwl_spectrum_notification measure_report;
989 u8 measurement_status; 1078 u8 measurement_status;
990#endif 1079
991 /* ucode beacon time */ 1080 /* ucode beacon time */
992 u32 ucode_beacon_time; 1081 u32 ucode_beacon_time;
1082 int missed_beacon_threshold;
1083
1084 /* storing the jiffies when the plcp error rate is received */
1085 unsigned long plcp_jiffies;
1086
1087 /* force reset */
1088 struct iwl_force_reset force_reset[IWL_MAX_FORCE_RESET];
993 1089
994 /* we allocate array of iwl4965_channel_info for NIC's valid channels. 1090 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
995 * Access via channel # using indirect index array */ 1091 * Access via channel # using indirect index array */
@@ -1008,7 +1104,6 @@ struct iwl_priv {
1008 struct iwl_calib_result calib_results[IWL_CALIB_MAX]; 1104 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
1009 1105
1010 /* Scan related variables */ 1106 /* Scan related variables */
1011 unsigned long last_scan_jiffies;
1012 unsigned long next_scan_jiffies; 1107 unsigned long next_scan_jiffies;
1013 unsigned long scan_start; 1108 unsigned long scan_start;
1014 unsigned long scan_pass_start; 1109 unsigned long scan_pass_start;
@@ -1016,6 +1111,7 @@ struct iwl_priv {
1016 void *scan; 1111 void *scan;
1017 int scan_bands; 1112 int scan_bands;
1018 struct cfg80211_scan_request *scan_request; 1113 struct cfg80211_scan_request *scan_request;
1114 bool is_internal_short_scan;
1019 u8 scan_tx_ant[IEEE80211_NUM_BANDS]; 1115 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1020 u8 mgmt_tx_ant; 1116 u8 mgmt_tx_ant;
1021 1117
@@ -1024,6 +1120,7 @@ struct iwl_priv {
1024 spinlock_t hcmd_lock; /* protect hcmd */ 1120 spinlock_t hcmd_lock; /* protect hcmd */
1025 spinlock_t reg_lock; /* protect hw register access */ 1121 spinlock_t reg_lock; /* protect hw register access */
1026 struct mutex mutex; 1122 struct mutex mutex;
1123 struct mutex sync_cmd_mutex; /* enable serialization of sync commands */
1027 1124
1028 /* basic pci-network driver stuff */ 1125 /* basic pci-network driver stuff */
1029 struct pci_dev *pci_dev; 1126 struct pci_dev *pci_dev;
@@ -1035,6 +1132,7 @@ struct iwl_priv {
1035 u8 rev_id; 1132 u8 rev_id;
1036 1133
1037 /* uCode images, save to reload in case of failure */ 1134 /* uCode images, save to reload in case of failure */
1135 int fw_index; /* firmware we're trying to load */
1038 u32 ucode_ver; /* version of ucode, copy of 1136 u32 ucode_ver; /* version of ucode, copy of
1039 iwl_ucode.ver */ 1137 iwl_ucode.ver */
1040 struct fw_desc ucode_code; /* runtime inst */ 1138 struct fw_desc ucode_code; /* runtime inst */
@@ -1045,6 +1143,7 @@ struct iwl_priv {
1045 struct fw_desc ucode_boot; /* bootstrap inst */ 1143 struct fw_desc ucode_boot; /* bootstrap inst */
1046 enum ucode_type ucode_type; 1144 enum ucode_type ucode_type;
1047 u8 ucode_write_complete; /* the image write is complete */ 1145 u8 ucode_write_complete; /* the image write is complete */
1146 char firmware_name[25];
1048 1147
1049 1148
1050 struct iwl_rxon_time_cmd rxon_timing; 1149 struct iwl_rxon_time_cmd rxon_timing;
@@ -1056,21 +1155,18 @@ struct iwl_priv {
1056 const struct iwl_rxon_cmd active_rxon; 1155 const struct iwl_rxon_cmd active_rxon;
1057 struct iwl_rxon_cmd staging_rxon; 1156 struct iwl_rxon_cmd staging_rxon;
1058 1157
1059 struct iwl_rxon_cmd recovery_rxon; 1158 struct iwl_switch_rxon switch_rxon;
1060 1159
1061 /* 1st responses from initialize and runtime uCode images. 1160 /* 1st responses from initialize and runtime uCode images.
1062 * 4965's initialize alive response contains some calibration data. */ 1161 * 4965's initialize alive response contains some calibration data. */
1063 struct iwl_init_alive_resp card_alive_init; 1162 struct iwl_init_alive_resp card_alive_init;
1064 struct iwl_alive_resp card_alive; 1163 struct iwl_alive_resp card_alive;
1065 1164
1066#ifdef CONFIG_IWLWIFI_LEDS
1067 unsigned long last_blink_time; 1165 unsigned long last_blink_time;
1068 u8 last_blink_rate; 1166 u8 last_blink_rate;
1069 u8 allow_blinking; 1167 u8 allow_blinking;
1070 u64 led_tpt; 1168 u64 led_tpt;
1071 struct iwl_led led[IWL_LED_TRG_MAX]; 1169
1072 unsigned int rxtxpackets;
1073#endif
1074 u16 active_rate; 1170 u16 active_rate;
1075 u16 active_rate_basic; 1171 u16 active_rate_basic;
1076 1172
@@ -1080,11 +1176,10 @@ struct iwl_priv {
1080 struct iwl_chain_noise_data chain_noise_data; 1176 struct iwl_chain_noise_data chain_noise_data;
1081 __le16 sensitivity_tbl[HD_TABLE_SIZE]; 1177 __le16 sensitivity_tbl[HD_TABLE_SIZE];
1082 1178
1083 struct iwl_ht_info current_ht_config; 1179 struct iwl_ht_config current_ht_config;
1084 u8 last_phy_res[100]; 1180 u8 last_phy_res[100];
1085 1181
1086 /* Rate scaling data */ 1182 /* Rate scaling data */
1087 s8 data_retry_limit;
1088 u8 retry_rate; 1183 u8 retry_rate;
1089 1184
1090 wait_queue_head_t wait_command_queue; 1185 wait_queue_head_t wait_command_queue;
@@ -1093,7 +1188,7 @@ struct iwl_priv {
1093 1188
1094 /* Rx and Tx DMA processing queues */ 1189 /* Rx and Tx DMA processing queues */
1095 struct iwl_rx_queue rxq; 1190 struct iwl_rx_queue rxq;
1096 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES]; 1191 struct iwl_tx_queue *txq;
1097 unsigned long txq_ctx_active_msk; 1192 unsigned long txq_ctx_active_msk;
1098 struct iwl_dma_ptr kw; /* keep warm address */ 1193 struct iwl_dma_ptr kw; /* keep warm address */
1099 struct iwl_dma_ptr scd_bc_tbls; 1194 struct iwl_dma_ptr scd_bc_tbls;
@@ -1116,7 +1211,11 @@ struct iwl_priv {
1116 struct iwl_tt_mgmt thermal_throttle; 1211 struct iwl_tt_mgmt thermal_throttle;
1117 1212
1118 struct iwl_notif_statistics statistics; 1213 struct iwl_notif_statistics statistics;
1119 unsigned long last_statistics_time; 1214#ifdef CONFIG_IWLWIFI_DEBUG
1215 struct iwl_notif_statistics accum_statistics;
1216 struct iwl_notif_statistics delta_statistics;
1217 struct iwl_notif_statistics max_delta;
1218#endif
1120 1219
1121 /* context information */ 1220 /* context information */
1122 u16 rates_mask; 1221 u16 rates_mask;
@@ -1149,7 +1248,7 @@ struct iwl_priv {
1149 u32 last_beacon_time; 1248 u32 last_beacon_time;
1150 u64 last_tsf; 1249 u64 last_tsf;
1151 1250
1152 /* eeprom */ 1251 /* eeprom -- this is in the card's little endian byte order */
1153 u8 *eeprom; 1252 u8 *eeprom;
1154 int nvm_device_type; 1253 int nvm_device_type;
1155 struct iwl_eeprom_calib_info *calib_info; 1254 struct iwl_eeprom_calib_info *calib_info;
@@ -1188,20 +1287,16 @@ struct iwl_priv {
1188 1287
1189 struct workqueue_struct *workqueue; 1288 struct workqueue_struct *workqueue;
1190 1289
1191 struct work_struct up;
1192 struct work_struct restart; 1290 struct work_struct restart;
1193 struct work_struct calibrated_work;
1194 struct work_struct scan_completed; 1291 struct work_struct scan_completed;
1195 struct work_struct rx_replenish; 1292 struct work_struct rx_replenish;
1196 struct work_struct abort_scan; 1293 struct work_struct abort_scan;
1197 struct work_struct update_link_led;
1198 struct work_struct auth_work;
1199 struct work_struct report_work;
1200 struct work_struct request_scan; 1294 struct work_struct request_scan;
1201 struct work_struct beacon_update; 1295 struct work_struct beacon_update;
1202 struct work_struct tt_work; 1296 struct work_struct tt_work;
1203 struct work_struct ct_enter; 1297 struct work_struct ct_enter;
1204 struct work_struct ct_exit; 1298 struct work_struct ct_exit;
1299 struct work_struct start_internal_scan;
1205 1300
1206 struct tasklet_struct irq_tasklet; 1301 struct tasklet_struct irq_tasklet;
1207 1302
@@ -1216,6 +1311,7 @@ struct iwl_priv {
1216 /* TX Power */ 1311 /* TX Power */
1217 s8 tx_power_user_lmt; 1312 s8 tx_power_user_lmt;
1218 s8 tx_power_device_lmt; 1313 s8 tx_power_device_lmt;
1314 s8 tx_power_lmt_in_half_dbm; /* max tx power in half-dBm format */
1219 1315
1220 1316
1221#ifdef CONFIG_IWLWIFI_DEBUG 1317#ifdef CONFIG_IWLWIFI_DEBUG
@@ -1231,7 +1327,8 @@ struct iwl_priv {
1231 u16 rx_traffic_idx; 1327 u16 rx_traffic_idx;
1232 u8 *tx_traffic; 1328 u8 *tx_traffic;
1233 u8 *rx_traffic; 1329 u8 *rx_traffic;
1234 struct iwl_debugfs *dbgfs; 1330 struct dentry *debugfs_dir;
1331 u32 dbgfs_sram_offset, dbgfs_sram_len;
1235#endif /* CONFIG_IWLWIFI_DEBUGFS */ 1332#endif /* CONFIG_IWLWIFI_DEBUGFS */
1236#endif /* CONFIG_IWLWIFI_DEBUG */ 1333#endif /* CONFIG_IWLWIFI_DEBUG */
1237 1334
@@ -1241,6 +1338,7 @@ struct iwl_priv {
1241 u32 disable_tx_power_cal; 1338 u32 disable_tx_power_cal;
1242 struct work_struct run_time_calib_work; 1339 struct work_struct run_time_calib_work;
1243 struct timer_list statistics_periodic; 1340 struct timer_list statistics_periodic;
1341 struct timer_list ucode_trace;
1244 bool hw_ready; 1342 bool hw_ready;
1245 /*For 3945*/ 1343 /*For 3945*/
1246#define IWL_DEFAULT_TX_POWER 0x0F 1344#define IWL_DEFAULT_TX_POWER 0x0F
@@ -1248,6 +1346,8 @@ struct iwl_priv {
1248 struct iwl3945_notif_statistics statistics_39; 1346 struct iwl3945_notif_statistics statistics_39;
1249 1347
1250 u32 sta_supp_rates; 1348 u32 sta_supp_rates;
1349
1350 struct iwl_event_log event_log;
1251}; /*iwl_priv */ 1351}; /*iwl_priv */
1252 1352
1253static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id) 1353static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
@@ -1333,4 +1433,15 @@ static inline int is_channel_ibss(const struct iwl_channel_info *ch)
1333 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0; 1433 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1334} 1434}
1335 1435
1436static inline void __iwl_free_pages(struct iwl_priv *priv, struct page *page)
1437{
1438 __free_pages(page, priv->hw_params.rx_page_order);
1439 priv->alloc_rxb_page--;
1440}
1441
1442static inline void iwl_free_pages(struct iwl_priv *priv, unsigned long page)
1443{
1444 free_pages(page, priv->hw_params.rx_page_order);
1445 priv->alloc_rxb_page--;
1446}
1336#endif /* __iwl_dev_h__ */ 1447#endif /* __iwl_dev_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.c b/drivers/net/wireless/iwlwifi/iwl-devtrace.c
new file mode 100644
index 000000000000..2ffc2edbf4f0
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.c
@@ -0,0 +1,44 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#include <linux/module.h>
28
29/* sparse doesn't like tracepoint macros */
30#ifndef __CHECKER__
31#include "iwl-dev.h"
32
33#define CREATE_TRACE_POINTS
34#include "iwl-devtrace.h"
35
36EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_iowrite8);
37EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_ioread32);
38EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_iowrite32);
39EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_rx);
40EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_ucode_event);
41EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_ucode_error);
42EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_ucode_cont_event);
43EXPORT_TRACEPOINT_SYMBOL(iwlwifi_dev_ucode_wrap_event);
44#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-devtrace.h b/drivers/net/wireless/iwlwifi/iwl-devtrace.h
new file mode 100644
index 000000000000..ae7319bb3a99
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-devtrace.h
@@ -0,0 +1,266 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009 - 2010 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * Intel Linux Wireless <ilw@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#if !defined(__IWLWIFI_DEVICE_TRACE) || defined(TRACE_HEADER_MULTI_READ)
28#define __IWLWIFI_DEVICE_TRACE
29
30#include <linux/tracepoint.h>
31
32#if !defined(CONFIG_IWLWIFI_DEVICE_TRACING) || defined(__CHECKER__)
33#undef TRACE_EVENT
34#define TRACE_EVENT(name, proto, ...) \
35static inline void trace_ ## name(proto) {}
36#endif
37
38#define PRIV_ENTRY __field(struct iwl_priv *, priv)
39#define PRIV_ASSIGN __entry->priv = priv
40
41#undef TRACE_SYSTEM
42#define TRACE_SYSTEM iwlwifi_io
43
44TRACE_EVENT(iwlwifi_dev_ioread32,
45 TP_PROTO(struct iwl_priv *priv, u32 offs, u32 val),
46 TP_ARGS(priv, offs, val),
47 TP_STRUCT__entry(
48 PRIV_ENTRY
49 __field(u32, offs)
50 __field(u32, val)
51 ),
52 TP_fast_assign(
53 PRIV_ASSIGN;
54 __entry->offs = offs;
55 __entry->val = val;
56 ),
57 TP_printk("[%p] read io[%#x] = %#x", __entry->priv, __entry->offs, __entry->val)
58);
59
60TRACE_EVENT(iwlwifi_dev_iowrite8,
61 TP_PROTO(struct iwl_priv *priv, u32 offs, u8 val),
62 TP_ARGS(priv, offs, val),
63 TP_STRUCT__entry(
64 PRIV_ENTRY
65 __field(u32, offs)
66 __field(u8, val)
67 ),
68 TP_fast_assign(
69 PRIV_ASSIGN;
70 __entry->offs = offs;
71 __entry->val = val;
72 ),
73 TP_printk("[%p] write io[%#x] = %#x)", __entry->priv, __entry->offs, __entry->val)
74);
75
76TRACE_EVENT(iwlwifi_dev_iowrite32,
77 TP_PROTO(struct iwl_priv *priv, u32 offs, u32 val),
78 TP_ARGS(priv, offs, val),
79 TP_STRUCT__entry(
80 PRIV_ENTRY
81 __field(u32, offs)
82 __field(u32, val)
83 ),
84 TP_fast_assign(
85 PRIV_ASSIGN;
86 __entry->offs = offs;
87 __entry->val = val;
88 ),
89 TP_printk("[%p] write io[%#x] = %#x)", __entry->priv, __entry->offs, __entry->val)
90);
91
92#undef TRACE_SYSTEM
93#define TRACE_SYSTEM iwlwifi_ucode
94
95TRACE_EVENT(iwlwifi_dev_ucode_cont_event,
96 TP_PROTO(struct iwl_priv *priv, u32 time, u32 data, u32 ev),
97 TP_ARGS(priv, time, data, ev),
98 TP_STRUCT__entry(
99 PRIV_ENTRY
100
101 __field(u32, time)
102 __field(u32, data)
103 __field(u32, ev)
104 ),
105 TP_fast_assign(
106 PRIV_ASSIGN;
107 __entry->time = time;
108 __entry->data = data;
109 __entry->ev = ev;
110 ),
111 TP_printk("[%p] EVT_LOGT:%010u:0x%08x:%04u",
112 __entry->priv, __entry->time, __entry->data, __entry->ev)
113);
114
115TRACE_EVENT(iwlwifi_dev_ucode_wrap_event,
116 TP_PROTO(struct iwl_priv *priv, u32 wraps, u32 n_entry, u32 p_entry),
117 TP_ARGS(priv, wraps, n_entry, p_entry),
118 TP_STRUCT__entry(
119 PRIV_ENTRY
120
121 __field(u32, wraps)
122 __field(u32, n_entry)
123 __field(u32, p_entry)
124 ),
125 TP_fast_assign(
126 PRIV_ASSIGN;
127 __entry->wraps = wraps;
128 __entry->n_entry = n_entry;
129 __entry->p_entry = p_entry;
130 ),
131 TP_printk("[%p] wraps=#%02d n=0x%X p=0x%X",
132 __entry->priv, __entry->wraps, __entry->n_entry,
133 __entry->p_entry)
134);
135
136#undef TRACE_SYSTEM
137#define TRACE_SYSTEM iwlwifi
138
139TRACE_EVENT(iwlwifi_dev_hcmd,
140 TP_PROTO(struct iwl_priv *priv, void *hcmd, size_t len, u32 flags),
141 TP_ARGS(priv, hcmd, len, flags),
142 TP_STRUCT__entry(
143 PRIV_ENTRY
144 __dynamic_array(u8, hcmd, len)
145 __field(u32, flags)
146 ),
147 TP_fast_assign(
148 PRIV_ASSIGN;
149 memcpy(__get_dynamic_array(hcmd), hcmd, len);
150 __entry->flags = flags;
151 ),
152 TP_printk("[%p] hcmd %#.2x (%ssync)",
153 __entry->priv, ((u8 *)__get_dynamic_array(hcmd))[0],
154 __entry->flags & CMD_ASYNC ? "a" : "")
155);
156
157TRACE_EVENT(iwlwifi_dev_rx,
158 TP_PROTO(struct iwl_priv *priv, void *rxbuf, size_t len),
159 TP_ARGS(priv, rxbuf, len),
160 TP_STRUCT__entry(
161 PRIV_ENTRY
162 __dynamic_array(u8, rxbuf, len)
163 ),
164 TP_fast_assign(
165 PRIV_ASSIGN;
166 memcpy(__get_dynamic_array(rxbuf), rxbuf, len);
167 ),
168 TP_printk("[%p] RX cmd %#.2x",
169 __entry->priv, ((u8 *)__get_dynamic_array(rxbuf))[4])
170);
171
172TRACE_EVENT(iwlwifi_dev_tx,
173 TP_PROTO(struct iwl_priv *priv, void *tfd, size_t tfdlen,
174 void *buf0, size_t buf0_len,
175 void *buf1, size_t buf1_len),
176 TP_ARGS(priv, tfd, tfdlen, buf0, buf0_len, buf1, buf1_len),
177 TP_STRUCT__entry(
178 PRIV_ENTRY
179
180 __field(size_t, framelen)
181 __dynamic_array(u8, tfd, tfdlen)
182
183 /*
184 * Do not insert between or below these items,
185 * we want to keep the frame together (except
186 * for the possible padding).
187 */
188 __dynamic_array(u8, buf0, buf0_len)
189 __dynamic_array(u8, buf1, buf1_len)
190 ),
191 TP_fast_assign(
192 PRIV_ASSIGN;
193 __entry->framelen = buf0_len + buf1_len;
194 memcpy(__get_dynamic_array(tfd), tfd, tfdlen);
195 memcpy(__get_dynamic_array(buf0), buf0, buf0_len);
196 memcpy(__get_dynamic_array(buf1), buf1, buf0_len);
197 ),
198 TP_printk("[%p] TX %.2x (%zu bytes)",
199 __entry->priv,
200 ((u8 *)__get_dynamic_array(buf0))[0],
201 __entry->framelen)
202);
203
204TRACE_EVENT(iwlwifi_dev_ucode_error,
205 TP_PROTO(struct iwl_priv *priv, u32 desc, u32 time,
206 u32 data1, u32 data2, u32 line, u32 blink1,
207 u32 blink2, u32 ilink1, u32 ilink2),
208 TP_ARGS(priv, desc, time, data1, data2, line,
209 blink1, blink2, ilink1, ilink2),
210 TP_STRUCT__entry(
211 PRIV_ENTRY
212 __field(u32, desc)
213 __field(u32, time)
214 __field(u32, data1)
215 __field(u32, data2)
216 __field(u32, line)
217 __field(u32, blink1)
218 __field(u32, blink2)
219 __field(u32, ilink1)
220 __field(u32, ilink2)
221 ),
222 TP_fast_assign(
223 PRIV_ASSIGN;
224 __entry->desc = desc;
225 __entry->time = time;
226 __entry->data1 = data1;
227 __entry->data2 = data2;
228 __entry->line = line;
229 __entry->blink1 = blink1;
230 __entry->blink2 = blink2;
231 __entry->ilink1 = ilink1;
232 __entry->ilink2 = ilink2;
233 ),
234 TP_printk("[%p] #%02d %010u data 0x%08X 0x%08X line %u, "
235 "blink 0x%05X 0x%05X ilink 0x%05X 0x%05X",
236 __entry->priv, __entry->desc, __entry->time, __entry->data1,
237 __entry->data2, __entry->line, __entry->blink1,
238 __entry->blink2, __entry->ilink1, __entry->ilink2)
239);
240
241TRACE_EVENT(iwlwifi_dev_ucode_event,
242 TP_PROTO(struct iwl_priv *priv, u32 time, u32 data, u32 ev),
243 TP_ARGS(priv, time, data, ev),
244 TP_STRUCT__entry(
245 PRIV_ENTRY
246
247 __field(u32, time)
248 __field(u32, data)
249 __field(u32, ev)
250 ),
251 TP_fast_assign(
252 PRIV_ASSIGN;
253 __entry->time = time;
254 __entry->data = data;
255 __entry->ev = ev;
256 ),
257 TP_printk("[%p] EVT_LOGT:%010u:0x%08x:%04u",
258 __entry->priv, __entry->time, __entry->data, __entry->ev)
259);
260#endif /* __IWLWIFI_DEVICE_TRACE */
261
262#undef TRACE_INCLUDE_PATH
263#define TRACE_INCLUDE_PATH .
264#undef TRACE_INCLUDE_FILE
265#define TRACE_INCLUDE_FILE iwl-devtrace
266#include <trace/define_trace.h>
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index e14c9952a935..fb5bb487f3bc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -63,6 +63,7 @@
63 63
64#include <linux/kernel.h> 64#include <linux/kernel.h>
65#include <linux/module.h> 65#include <linux/module.h>
66#include <linux/slab.h>
66#include <linux/init.h> 67#include <linux/init.h>
67 68
68#include <net/mac80211.h> 69#include <net/mac80211.h>
@@ -215,12 +216,35 @@ static const struct iwl_txpwr_section enhinfo[] = {
215 216
216int iwlcore_eeprom_verify_signature(struct iwl_priv *priv) 217int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
217{ 218{
218 u32 gp = iwl_read32(priv, CSR_EEPROM_GP); 219 u32 gp = iwl_read32(priv, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
219 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { 220 int ret = 0;
220 IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp); 221
221 return -ENOENT; 222 IWL_DEBUG_INFO(priv, "EEPROM signature=0x%08x\n", gp);
223 switch (gp) {
224 case CSR_EEPROM_GP_BAD_SIG_EEP_GOOD_SIG_OTP:
225 if (priv->nvm_device_type != NVM_DEVICE_TYPE_OTP) {
226 IWL_ERR(priv, "EEPROM with bad signature: 0x%08x\n",
227 gp);
228 ret = -ENOENT;
229 }
230 break;
231 case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
232 case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
233 if (priv->nvm_device_type != NVM_DEVICE_TYPE_EEPROM) {
234 IWL_ERR(priv, "OTP with bad signature: 0x%08x\n", gp);
235 ret = -ENOENT;
236 }
237 break;
238 case CSR_EEPROM_GP_BAD_SIGNATURE_BOTH_EEP_AND_OTP:
239 default:
240 IWL_ERR(priv, "bad EEPROM/OTP signature, type=%s, "
241 "EEPROM_GP=0x%08x\n",
242 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
243 ? "OTP" : "EEPROM", gp);
244 ret = -ENOENT;
245 break;
222 } 246 }
223 return 0; 247 return ret;
224} 248}
225EXPORT_SYMBOL(iwlcore_eeprom_verify_signature); 249EXPORT_SYMBOL(iwlcore_eeprom_verify_signature);
226 250
@@ -283,7 +307,8 @@ int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
283 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 307 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
284 308
285 /* See if we got it */ 309 /* See if we got it */
286 ret = iwl_poll_direct_bit(priv, CSR_HW_IF_CONFIG_REG, 310 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
311 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
287 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 312 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
288 EEPROM_SEM_TIMEOUT); 313 EEPROM_SEM_TIMEOUT);
289 if (ret >= 0) { 314 if (ret >= 0) {
@@ -322,7 +347,8 @@ static int iwl_init_otp_access(struct iwl_priv *priv)
322 CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 347 CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
323 348
324 /* wait for clock to be ready */ 349 /* wait for clock to be ready */
325 ret = iwl_poll_direct_bit(priv, CSR_GP_CNTRL, 350 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
351 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
326 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 352 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
327 25000); 353 25000);
328 if (ret < 0) 354 if (ret < 0)
@@ -333,11 +359,19 @@ static int iwl_init_otp_access(struct iwl_priv *priv)
333 udelay(5); 359 udelay(5);
334 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, 360 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
335 APMG_PS_CTRL_VAL_RESET_REQ); 361 APMG_PS_CTRL_VAL_RESET_REQ);
362
363 /*
364 * CSR auto clock gate disable bit -
365 * this is only applicable for HW with OTP shadow RAM
366 */
367 if (priv->cfg->shadow_ram_support)
368 iwl_set_bit(priv, CSR_DBG_LINK_PWR_MGMT_REG,
369 CSR_RESET_LINK_PWR_MGMT_DISABLED);
336 } 370 }
337 return ret; 371 return ret;
338} 372}
339 373
340static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data) 374static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, __le16 *eeprom_data)
341{ 375{
342 int ret = 0; 376 int ret = 0;
343 u32 r; 377 u32 r;
@@ -345,7 +379,8 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
345 379
346 _iwl_write32(priv, CSR_EEPROM_REG, 380 _iwl_write32(priv, CSR_EEPROM_REG,
347 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 381 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
348 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, 382 ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
383 CSR_EEPROM_REG_READ_VALID_MSK,
349 CSR_EEPROM_REG_READ_VALID_MSK, 384 CSR_EEPROM_REG_READ_VALID_MSK,
350 IWL_EEPROM_ACCESS_TIMEOUT); 385 IWL_EEPROM_ACCESS_TIMEOUT);
351 if (ret < 0) { 386 if (ret < 0) {
@@ -370,7 +405,7 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
370 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK); 405 CSR_OTP_GP_REG_ECC_CORR_STATUS_MSK);
371 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n"); 406 IWL_ERR(priv, "Correctable OTP ECC error, continue read\n");
372 } 407 }
373 *eeprom_data = le16_to_cpu((__force __le16)(r >> 16)); 408 *eeprom_data = cpu_to_le16(r >> 16);
374 return 0; 409 return 0;
375} 410}
376 411
@@ -379,7 +414,8 @@ static int iwl_read_otp_word(struct iwl_priv *priv, u16 addr, u16 *eeprom_data)
379 */ 414 */
380static bool iwl_is_otp_empty(struct iwl_priv *priv) 415static bool iwl_is_otp_empty(struct iwl_priv *priv)
381{ 416{
382 u16 next_link_addr = 0, link_value; 417 u16 next_link_addr = 0;
418 __le16 link_value;
383 bool is_empty = false; 419 bool is_empty = false;
384 420
385 /* locate the beginning of OTP link list */ 421 /* locate the beginning of OTP link list */
@@ -409,7 +445,8 @@ static bool iwl_is_otp_empty(struct iwl_priv *priv)
409static int iwl_find_otp_image(struct iwl_priv *priv, 445static int iwl_find_otp_image(struct iwl_priv *priv,
410 u16 *validblockaddr) 446 u16 *validblockaddr)
411{ 447{
412 u16 next_link_addr = 0, link_value = 0, valid_addr; 448 u16 next_link_addr = 0, valid_addr;
449 __le16 link_value = 0;
413 int usedblocks = 0; 450 int usedblocks = 0;
414 451
415 /* set addressing mode to absolute to traverse the link list */ 452 /* set addressing mode to absolute to traverse the link list */
@@ -429,7 +466,7 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
429 * check for more block on the link list 466 * check for more block on the link list
430 */ 467 */
431 valid_addr = next_link_addr; 468 valid_addr = next_link_addr;
432 next_link_addr = link_value * sizeof(u16); 469 next_link_addr = le16_to_cpu(link_value) * sizeof(u16);
433 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n", 470 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
434 usedblocks, next_link_addr); 471 usedblocks, next_link_addr);
435 if (iwl_read_otp_word(priv, next_link_addr, &link_value)) 472 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
@@ -463,7 +500,7 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
463 */ 500 */
464int iwl_eeprom_init(struct iwl_priv *priv) 501int iwl_eeprom_init(struct iwl_priv *priv)
465{ 502{
466 u16 *e; 503 __le16 *e;
467 u32 gp = iwl_read32(priv, CSR_EEPROM_GP); 504 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
468 int sz; 505 int sz;
469 int ret; 506 int ret;
@@ -482,7 +519,9 @@ int iwl_eeprom_init(struct iwl_priv *priv)
482 ret = -ENOMEM; 519 ret = -ENOMEM;
483 goto alloc_err; 520 goto alloc_err;
484 } 521 }
485 e = (u16 *)priv->eeprom; 522 e = (__le16 *)priv->eeprom;
523
524 priv->cfg->ops->lib->apm_ops.init(priv);
486 525
487 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv); 526 ret = priv->cfg->ops->lib->eeprom_ops.verify_signature(priv);
488 if (ret < 0) { 527 if (ret < 0) {
@@ -498,7 +537,9 @@ int iwl_eeprom_init(struct iwl_priv *priv)
498 ret = -ENOENT; 537 ret = -ENOENT;
499 goto err; 538 goto err;
500 } 539 }
540
501 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) { 541 if (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) {
542
502 ret = iwl_init_otp_access(priv); 543 ret = iwl_init_otp_access(priv);
503 if (ret) { 544 if (ret) {
504 IWL_ERR(priv, "Failed to initialize OTP access.\n"); 545 IWL_ERR(priv, "Failed to initialize OTP access.\n");
@@ -521,7 +562,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
521 } 562 }
522 for (addr = validblockaddr; addr < validblockaddr + sz; 563 for (addr = validblockaddr; addr < validblockaddr + sz;
523 addr += sizeof(u16)) { 564 addr += sizeof(u16)) {
524 u16 eeprom_data; 565 __le16 eeprom_data;
525 566
526 ret = iwl_read_otp_word(priv, addr, &eeprom_data); 567 ret = iwl_read_otp_word(priv, addr, &eeprom_data);
527 if (ret) 568 if (ret)
@@ -537,7 +578,8 @@ int iwl_eeprom_init(struct iwl_priv *priv)
537 _iwl_write32(priv, CSR_EEPROM_REG, 578 _iwl_write32(priv, CSR_EEPROM_REG,
538 CSR_EEPROM_REG_MSK_ADDR & (addr << 1)); 579 CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
539 580
540 ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG, 581 ret = iwl_poll_bit(priv, CSR_EEPROM_REG,
582 CSR_EEPROM_REG_READ_VALID_MSK,
541 CSR_EEPROM_REG_READ_VALID_MSK, 583 CSR_EEPROM_REG_READ_VALID_MSK,
542 IWL_EEPROM_ACCESS_TIMEOUT); 584 IWL_EEPROM_ACCESS_TIMEOUT);
543 if (ret < 0) { 585 if (ret < 0) {
@@ -545,7 +587,7 @@ int iwl_eeprom_init(struct iwl_priv *priv)
545 goto done; 587 goto done;
546 } 588 }
547 r = _iwl_read_direct32(priv, CSR_EEPROM_REG); 589 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
548 e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16)); 590 e[addr / 2] = cpu_to_le16(r >> 16);
549 } 591 }
550 } 592 }
551 ret = 0; 593 ret = 0;
@@ -554,6 +596,8 @@ done:
554err: 596err:
555 if (ret) 597 if (ret)
556 iwl_eeprom_free(priv); 598 iwl_eeprom_free(priv);
599 /* Reset chip to save power until we load uCode during "up". */
600 priv->cfg->ops->lib->apm_ops.stop(priv);
557alloc_err: 601alloc_err:
558 return ret; 602 return ret;
559} 603}
@@ -705,11 +749,9 @@ static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
705 749
706 ch_info->ht40_eeprom = *eeprom_ch; 750 ch_info->ht40_eeprom = *eeprom_ch;
707 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg; 751 ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
708 ch_info->ht40_curr_txpow = eeprom_ch->max_power_avg;
709 ch_info->ht40_min_power = 0;
710 ch_info->ht40_scan_power = eeprom_ch->max_power_avg;
711 ch_info->ht40_flags = eeprom_ch->flags; 752 ch_info->ht40_flags = eeprom_ch->flags;
712 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel; 753 if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
754 ch_info->ht40_extension_channel &= ~clear_ht40_extension_channel;
713 755
714 return 0; 756 return 0;
715} 757}
@@ -719,7 +761,8 @@ static int iwl_mod_ht40_chan_info(struct iwl_priv *priv,
719 * find the highest tx power from all chains for the channel 761 * find the highest tx power from all chains for the channel
720 */ 762 */
721static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv, 763static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
722 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, int element) 764 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
765 int element, s8 *max_txpower_in_half_dbm)
723{ 766{
724 s8 max_txpower_avg = 0; /* (dBm) */ 767 s8 max_txpower_avg = 0; /* (dBm) */
725 768
@@ -751,10 +794,14 @@ static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
751 (enhanced_txpower[element].mimo3_max > max_txpower_avg)) 794 (enhanced_txpower[element].mimo3_max > max_txpower_avg))
752 max_txpower_avg = enhanced_txpower[element].mimo3_max; 795 max_txpower_avg = enhanced_txpower[element].mimo3_max;
753 796
754 /* max. tx power in EEPROM is in 1/2 dBm format 797 /*
755 * convert from 1/2 dBm to dBm 798 * max. tx power in EEPROM is in 1/2 dBm format
799 * convert from 1/2 dBm to dBm (round-up convert)
800 * but we also do not want to loss 1/2 dBm resolution which
801 * will impact performance
756 */ 802 */
757 return max_txpower_avg >> 1; 803 *max_txpower_in_half_dbm = max_txpower_avg;
804 return (max_txpower_avg & 0x01) + (max_txpower_avg >> 1);
758} 805}
759 806
760/** 807/**
@@ -763,7 +810,7 @@ static s8 iwl_get_max_txpower_avg(struct iwl_priv *priv,
763 */ 810 */
764static s8 iwl_update_common_txpower(struct iwl_priv *priv, 811static s8 iwl_update_common_txpower(struct iwl_priv *priv,
765 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, 812 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
766 int section, int element) 813 int section, int element, s8 *max_txpower_in_half_dbm)
767{ 814{
768 struct iwl_channel_info *ch_info; 815 struct iwl_channel_info *ch_info;
769 int ch; 816 int ch;
@@ -777,25 +824,25 @@ static s8 iwl_update_common_txpower(struct iwl_priv *priv,
777 if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX) 824 if (element == EEPROM_TXPOWER_COMMON_HT40_INDEX)
778 is_ht40 = true; 825 is_ht40 = true;
779 max_txpower_avg = 826 max_txpower_avg =
780 iwl_get_max_txpower_avg(priv, enhanced_txpower, element); 827 iwl_get_max_txpower_avg(priv, enhanced_txpower,
828 element, max_txpower_in_half_dbm);
829
781 ch_info = priv->channel_info; 830 ch_info = priv->channel_info;
782 831
783 for (ch = 0; ch < priv->channel_count; ch++) { 832 for (ch = 0; ch < priv->channel_count; ch++) {
784 /* find matching band and update tx power if needed */ 833 /* find matching band and update tx power if needed */
785 if ((ch_info->band == enhinfo[section].band) && 834 if ((ch_info->band == enhinfo[section].band) &&
786 (ch_info->max_power_avg < max_txpower_avg) && (!is_ht40)) { 835 (ch_info->max_power_avg < max_txpower_avg) &&
836 (!is_ht40)) {
787 /* Update regulatory-based run-time data */ 837 /* Update regulatory-based run-time data */
788 ch_info->max_power_avg = ch_info->curr_txpow = 838 ch_info->max_power_avg = ch_info->curr_txpow =
789 max_txpower_avg; 839 max_txpower_avg;
790 ch_info->scan_power = max_txpower_avg; 840 ch_info->scan_power = max_txpower_avg;
791 } 841 }
792 if ((ch_info->band == enhinfo[section].band) && is_ht40 && 842 if ((ch_info->band == enhinfo[section].band) && is_ht40 &&
793 ch_info->ht40_max_power_avg &&
794 (ch_info->ht40_max_power_avg < max_txpower_avg)) { 843 (ch_info->ht40_max_power_avg < max_txpower_avg)) {
795 /* Update regulatory-based run-time data */ 844 /* Update regulatory-based run-time data */
796 ch_info->ht40_max_power_avg = max_txpower_avg; 845 ch_info->ht40_max_power_avg = max_txpower_avg;
797 ch_info->ht40_curr_txpow = max_txpower_avg;
798 ch_info->ht40_scan_power = max_txpower_avg;
799 } 846 }
800 ch_info++; 847 ch_info++;
801 } 848 }
@@ -808,7 +855,7 @@ static s8 iwl_update_common_txpower(struct iwl_priv *priv,
808 */ 855 */
809static s8 iwl_update_channel_txpower(struct iwl_priv *priv, 856static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
810 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower, 857 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower,
811 int section, int element) 858 int section, int element, s8 *max_txpower_in_half_dbm)
812{ 859{
813 struct iwl_channel_info *ch_info; 860 struct iwl_channel_info *ch_info;
814 int ch; 861 int ch;
@@ -817,7 +864,8 @@ static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
817 864
818 channel = enhinfo[section].iwl_eeprom_section_channel[element]; 865 channel = enhinfo[section].iwl_eeprom_section_channel[element];
819 max_txpower_avg = 866 max_txpower_avg =
820 iwl_get_max_txpower_avg(priv, enhanced_txpower, element); 867 iwl_get_max_txpower_avg(priv, enhanced_txpower,
868 element, max_txpower_in_half_dbm);
821 869
822 ch_info = priv->channel_info; 870 ch_info = priv->channel_info;
823 for (ch = 0; ch < priv->channel_count; ch++) { 871 for (ch = 0; ch < priv->channel_count; ch++) {
@@ -831,12 +879,9 @@ static s8 iwl_update_channel_txpower(struct iwl_priv *priv,
831 ch_info->scan_power = max_txpower_avg; 879 ch_info->scan_power = max_txpower_avg;
832 } 880 }
833 if ((enhinfo[section].is_ht40) && 881 if ((enhinfo[section].is_ht40) &&
834 (ch_info->ht40_max_power_avg) &&
835 (ch_info->ht40_max_power_avg < max_txpower_avg)) { 882 (ch_info->ht40_max_power_avg < max_txpower_avg)) {
836 /* Update regulatory-based run-time data */ 883 /* Update regulatory-based run-time data */
837 ch_info->ht40_max_power_avg = max_txpower_avg; 884 ch_info->ht40_max_power_avg = max_txpower_avg;
838 ch_info->ht40_curr_txpow = max_txpower_avg;
839 ch_info->ht40_scan_power = max_txpower_avg;
840 } 885 }
841 break; 886 break;
842 } 887 }
@@ -855,6 +900,7 @@ void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
855 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower; 900 struct iwl_eeprom_enhanced_txpwr *enhanced_txpower;
856 u32 offset; 901 u32 offset;
857 s8 max_txpower_avg; /* (dBm) */ 902 s8 max_txpower_avg; /* (dBm) */
903 s8 max_txpower_in_half_dbm; /* (half-dBm) */
858 904
859 /* Loop through all the sections 905 /* Loop through all the sections
860 * adjust bands and channel's max tx power 906 * adjust bands and channel's max tx power
@@ -867,20 +913,43 @@ void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv)
867 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *) 913 enhanced_txpower = (struct iwl_eeprom_enhanced_txpwr *)
868 iwl_eeprom_query_addr(priv, offset); 914 iwl_eeprom_query_addr(priv, offset);
869 915
916 /*
917 * check for valid entry -
918 * different version of EEPROM might contain different set
919 * of enhanced tx power table
920 * always check for valid entry before process
921 * the information
922 */
923 if (!enhanced_txpower->common || enhanced_txpower->reserved)
924 continue;
925
870 for (element = 0; element < eeprom_section_count; element++) { 926 for (element = 0; element < eeprom_section_count; element++) {
871 if (enhinfo[section].is_common) 927 if (enhinfo[section].is_common)
872 max_txpower_avg = 928 max_txpower_avg =
873 iwl_update_common_txpower(priv, 929 iwl_update_common_txpower(priv,
874 enhanced_txpower, section, element); 930 enhanced_txpower, section,
931 element,
932 &max_txpower_in_half_dbm);
875 else 933 else
876 max_txpower_avg = 934 max_txpower_avg =
877 iwl_update_channel_txpower(priv, 935 iwl_update_channel_txpower(priv,
878 enhanced_txpower, section, element); 936 enhanced_txpower, section,
937 element,
938 &max_txpower_in_half_dbm);
879 939
880 /* Update the tx_power_user_lmt to the highest power 940 /* Update the tx_power_user_lmt to the highest power
881 * supported by any channel */ 941 * supported by any channel */
882 if (max_txpower_avg > priv->tx_power_user_lmt) 942 if (max_txpower_avg > priv->tx_power_user_lmt)
883 priv->tx_power_user_lmt = max_txpower_avg; 943 priv->tx_power_user_lmt = max_txpower_avg;
944
945 /*
946 * Update the tx_power_lmt_in_half_dbm to
947 * the highest power supported by any channel
948 */
949 if (max_txpower_in_half_dbm >
950 priv->tx_power_lmt_in_half_dbm)
951 priv->tx_power_lmt_in_half_dbm =
952 max_txpower_in_half_dbm;
884 } 953 }
885 } 954 }
886} 955}
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index 80b9e45d9b9c..8171c701e4e1 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -63,6 +63,8 @@
63#ifndef __iwl_eeprom_h__ 63#ifndef __iwl_eeprom_h__
64#define __iwl_eeprom_h__ 64#define __iwl_eeprom_h__
65 65
66#include <net/mac80211.h>
67
66struct iwl_priv; 68struct iwl_priv;
67 69
68/* 70/*
@@ -125,19 +127,21 @@ struct iwl_eeprom_channel {
125 * Enhanced regulatory tx power portion of eeprom image can be broken down 127 * Enhanced regulatory tx power portion of eeprom image can be broken down
126 * into individual structures; each one is 8 bytes in size and contain the 128 * into individual structures; each one is 8 bytes in size and contain the
127 * following information 129 * following information
130 * @common: (desc + channel) not used by driver, should _NOT_ be "zero"
128 * @chain_a_max_pwr: chain a max power in 1/2 dBm 131 * @chain_a_max_pwr: chain a max power in 1/2 dBm
129 * @chain_b_max_pwr: chain b max power in 1/2 dBm 132 * @chain_b_max_pwr: chain b max power in 1/2 dBm
130 * @chain_c_max_pwr: chain c max power in 1/2 dBm 133 * @chain_c_max_pwr: chain c max power in 1/2 dBm
134 * @reserved: not used, should be "zero"
131 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm 135 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm
132 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm 136 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm
133 * 137 *
134 */ 138 */
135struct iwl_eeprom_enhanced_txpwr { 139struct iwl_eeprom_enhanced_txpwr {
136 u16 reserved; 140 __le16 common;
137 s8 chain_a_max; 141 s8 chain_a_max;
138 s8 chain_b_max; 142 s8 chain_b_max;
139 s8 chain_c_max; 143 s8 chain_c_max;
140 s8 reserved1; 144 s8 reserved;
141 s8 mimo2_max; 145 s8 mimo2_max;
142 s8 mimo3_max; 146 s8 mimo3_max;
143} __attribute__ ((packed)); 147} __attribute__ ((packed));
@@ -199,6 +203,10 @@ struct iwl_eeprom_enhanced_txpwr {
199#define EEPROM_5000_REG_BAND_52_HT40_CHANNELS ((0x92)\ 203#define EEPROM_5000_REG_BAND_52_HT40_CHANNELS ((0x92)\
200 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */ 204 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 22 bytes */
201 205
206/* 6000 regulatory - indirect access */
207#define EEPROM_6000_REG_BAND_24_HT40_CHANNELS ((0x80)\
208 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */
209
202/* 6000 and up regulatory tx power - indirect access */ 210/* 6000 and up regulatory tx power - indirect access */
203/* max. elements per section */ 211/* max. elements per section */
204#define EEPROM_MAX_TXPOWER_SECTION_ELEMENTS (8) 212#define EEPROM_MAX_TXPOWER_SECTION_ELEMENTS (8)
@@ -256,6 +264,15 @@ struct iwl_eeprom_enhanced_txpwr {
256#define EEPROM_5050_TX_POWER_VERSION (4) 264#define EEPROM_5050_TX_POWER_VERSION (4)
257#define EEPROM_5050_EEPROM_VERSION (0x21E) 265#define EEPROM_5050_EEPROM_VERSION (0x21E)
258 266
267/* 1000 Specific */
268#define EEPROM_1000_EEPROM_VERSION (0x15C)
269
270/* 6x00 Specific */
271#define EEPROM_6000_EEPROM_VERSION (0x434)
272
273/* 6x50 Specific */
274#define EEPROM_6050_EEPROM_VERSION (0x532)
275
259/* OTP */ 276/* OTP */
260/* lower blocks contain EEPROM image and calibration data */ 277/* lower blocks contain EEPROM image and calibration data */
261#define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */ 278#define OTP_LOW_IMAGE_SIZE (2 * 512 * sizeof(u16)) /* 2 KB */
@@ -347,7 +364,7 @@ struct iwl_eeprom_calib_subband_info {
347struct iwl_eeprom_calib_info { 364struct iwl_eeprom_calib_info {
348 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ 365 u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */
349 u8 saturation_power52; /* half-dBm */ 366 u8 saturation_power52; /* half-dBm */
350 s16 voltage; /* signed */ 367 __le16 voltage; /* signed */
351 struct iwl_eeprom_calib_subband_info 368 struct iwl_eeprom_calib_subband_info
352 band_info[EEPROM_TX_POWER_BANDS]; 369 band_info[EEPROM_TX_POWER_BANDS];
353} __attribute__ ((packed)); 370} __attribute__ ((packed));
@@ -370,12 +387,10 @@ struct iwl_eeprom_calib_info {
370#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ 387#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
371#define EEPROM_VERSION (2*0x44) /* 2 bytes */ 388#define EEPROM_VERSION (2*0x44) /* 2 bytes */
372#define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ 389#define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */
373#define EEPROM_LEDS_MODE (2*0x45+1) /* 1 bytes */
374#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ 390#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
375#define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ 391#define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
376#define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ 392#define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
377#define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */ 393#define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */
378#define EEPROM_ANTENNA_SWITCH_TYPE (2*0x4A+1) /* 1 bytes */
379 394
380/* The following masks are to be applied on EEPROM_RADIO_CONFIG */ 395/* The following masks are to be applied on EEPROM_RADIO_CONFIG */
381#define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */ 396#define EEPROM_RF_CFG_TYPE_MSK(x) (x & 0x3) /* bits 0-1 */
@@ -387,7 +402,12 @@ struct iwl_eeprom_calib_info {
387 402
388#define EEPROM_3945_RF_CFG_TYPE_MAX 0x0 403#define EEPROM_3945_RF_CFG_TYPE_MAX 0x0
389#define EEPROM_4965_RF_CFG_TYPE_MAX 0x1 404#define EEPROM_4965_RF_CFG_TYPE_MAX 0x1
390#define EEPROM_5000_RF_CFG_TYPE_MAX 0x3 405
406/* Radio Config for 5000 and up */
407#define EEPROM_RF_CONFIG_TYPE_R3x3 0x0
408#define EEPROM_RF_CONFIG_TYPE_R2x2 0x1
409#define EEPROM_RF_CONFIG_TYPE_R1x2 0x2
410#define EEPROM_RF_CONFIG_TYPE_MAX 0x3
391 411
392/* 412/*
393 * Per-channel regulatory data. 413 * Per-channel regulatory data.
diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h
index 65fa8a69fd5a..113c3669b9ce 100644
--- a/drivers/net/wireless/iwlwifi/iwl-fh.h
+++ b/drivers/net/wireless/iwlwifi/iwl-fh.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -379,6 +379,25 @@
379 379
380#define FH_TSSR_TX_STATUS_REG (FH_TSSR_LOWER_BOUND + 0x010) 380#define FH_TSSR_TX_STATUS_REG (FH_TSSR_LOWER_BOUND + 0x010)
381 381
382/**
383 * Bit fields for TSSR(Tx Shared Status & Control) error status register:
384 * 31: Indicates an address error when accessed to internal memory
385 * uCode/driver must write "1" in order to clear this flag
386 * 30: Indicates that Host did not send the expected number of dwords to FH
387 * uCode/driver must write "1" in order to clear this flag
388 * 16-9:Each status bit is for one channel. Indicates that an (Error) ActDMA
389 * command was received from the scheduler while the TRB was already full
390 * with previous command
391 * uCode/driver must write "1" in order to clear this flag
392 * 7-0: Each status bit indicates a channel's TxCredit error. When an error
393 * bit is set, it indicates that the FH has received a full indication
394 * from the RTC TxFIFO and the current value of the TxCredit counter was
395 * not equal to zero. This mean that the credit mechanism was not
396 * synchronized to the TxFIFO status
397 * uCode/driver must write "1" in order to clear this flag
398 */
399#define FH_TSSR_TX_ERROR_REG (FH_TSSR_LOWER_BOUND + 0x018)
400
382#define FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_chnl) ((1 << (_chnl)) << 24) 401#define FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_chnl) ((1 << (_chnl)) << 24)
383#define FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_chnl) ((1 << (_chnl)) << 16) 402#define FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_chnl) ((1 << (_chnl)) << 16)
384 403
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
index a6856daf14cb..73681c4fefe7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c
+++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * GPL LICENSE SUMMARY 3 * GPL LICENSE SUMMARY
4 * 4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as 8 * it under the terms of version 2 of the GNU General Public License as
@@ -56,7 +56,8 @@ const char *get_cmd_string(u8 cmd)
56 IWL_CMD(REPLY_LEDS_CMD); 56 IWL_CMD(REPLY_LEDS_CMD);
57 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD); 57 IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
58 IWL_CMD(COEX_PRIORITY_TABLE_CMD); 58 IWL_CMD(COEX_PRIORITY_TABLE_CMD);
59 IWL_CMD(RADAR_NOTIFICATION); 59 IWL_CMD(COEX_MEDIUM_NOTIFICATION);
60 IWL_CMD(COEX_EVENT_CMD);
60 IWL_CMD(REPLY_QUIET_CMD); 61 IWL_CMD(REPLY_QUIET_CMD);
61 IWL_CMD(REPLY_CHANNEL_SWITCH); 62 IWL_CMD(REPLY_CHANNEL_SWITCH);
62 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION); 63 IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
@@ -93,6 +94,8 @@ const char *get_cmd_string(u8 cmd)
93 IWL_CMD(CALIBRATION_RES_NOTIFICATION); 94 IWL_CMD(CALIBRATION_RES_NOTIFICATION);
94 IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION); 95 IWL_CMD(CALIBRATION_COMPLETE_NOTIFICATION);
95 IWL_CMD(REPLY_TX_POWER_DBM_CMD); 96 IWL_CMD(REPLY_TX_POWER_DBM_CMD);
97 IWL_CMD(TEMPERATURE_NOTIFICATION);
98 IWL_CMD(TX_ANT_CONFIGURATION_CMD);
96 default: 99 default:
97 return "UNKNOWN"; 100 return "UNKNOWN";
98 101
@@ -104,17 +107,8 @@ EXPORT_SYMBOL(get_cmd_string);
104 107
105static void iwl_generic_cmd_callback(struct iwl_priv *priv, 108static void iwl_generic_cmd_callback(struct iwl_priv *priv,
106 struct iwl_device_cmd *cmd, 109 struct iwl_device_cmd *cmd,
107 struct sk_buff *skb) 110 struct iwl_rx_packet *pkt)
108{ 111{
109 struct iwl_rx_packet *pkt = NULL;
110
111 if (!skb) {
112 IWL_ERR(priv, "Error: Response NULL in %s.\n",
113 get_cmd_string(cmd->hdr.cmd));
114 return;
115 }
116
117 pkt = (struct iwl_rx_packet *)skb->data;
118 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) { 112 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
119 IWL_ERR(priv, "Bad return from %s (0x%08X)\n", 113 IWL_ERR(priv, "Bad return from %s (0x%08X)\n",
120 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags); 114 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
@@ -170,15 +164,13 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
170 /* A synchronous command can not have a callback set. */ 164 /* A synchronous command can not have a callback set. */
171 BUG_ON(cmd->callback); 165 BUG_ON(cmd->callback);
172 166
173 if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) { 167 IWL_DEBUG_INFO(priv, "Attempting to send sync command %s\n",
174 IWL_ERR(priv,
175 "Error sending %s: Already sending a host command\n",
176 get_cmd_string(cmd->id)); 168 get_cmd_string(cmd->id));
177 ret = -EBUSY; 169 mutex_lock(&priv->sync_cmd_mutex);
178 goto out;
179 }
180 170
181 set_bit(STATUS_HCMD_ACTIVE, &priv->status); 171 set_bit(STATUS_HCMD_ACTIVE, &priv->status);
172 IWL_DEBUG_INFO(priv, "Setting HCMD_ACTIVE for command %s \n",
173 get_cmd_string(cmd->id));
182 174
183 cmd_idx = iwl_enqueue_hcmd(priv, cmd); 175 cmd_idx = iwl_enqueue_hcmd(priv, cmd);
184 if (cmd_idx < 0) { 176 if (cmd_idx < 0) {
@@ -199,24 +191,26 @@ int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
199 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT)); 191 jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
200 192
201 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 193 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
194 IWL_DEBUG_INFO(priv, "Clearing HCMD_ACTIVE for command %s \n",
195 get_cmd_string(cmd->id));
202 ret = -ETIMEDOUT; 196 ret = -ETIMEDOUT;
203 goto cancel; 197 goto cancel;
204 } 198 }
205 } 199 }
206 200
207 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { 201 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
208 IWL_DEBUG_INFO(priv, "Command %s aborted: RF KILL Switch\n", 202 IWL_ERR(priv, "Command %s aborted: RF KILL Switch\n",
209 get_cmd_string(cmd->id)); 203 get_cmd_string(cmd->id));
210 ret = -ECANCELED; 204 ret = -ECANCELED;
211 goto fail; 205 goto fail;
212 } 206 }
213 if (test_bit(STATUS_FW_ERROR, &priv->status)) { 207 if (test_bit(STATUS_FW_ERROR, &priv->status)) {
214 IWL_DEBUG_INFO(priv, "Command %s failed: FW Error\n", 208 IWL_ERR(priv, "Command %s failed: FW Error\n",
215 get_cmd_string(cmd->id)); 209 get_cmd_string(cmd->id));
216 ret = -EIO; 210 ret = -EIO;
217 goto fail; 211 goto fail;
218 } 212 }
219 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_skb) { 213 if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
220 IWL_ERR(priv, "Error: Response NULL in '%s'\n", 214 IWL_ERR(priv, "Error: Response NULL in '%s'\n",
221 get_cmd_string(cmd->id)); 215 get_cmd_string(cmd->id));
222 ret = -EIO; 216 ret = -EIO;
@@ -238,12 +232,12 @@ cancel:
238 ~CMD_WANT_SKB; 232 ~CMD_WANT_SKB;
239 } 233 }
240fail: 234fail:
241 if (cmd->reply_skb) { 235 if (cmd->reply_page) {
242 dev_kfree_skb_any(cmd->reply_skb); 236 iwl_free_pages(priv, cmd->reply_page);
243 cmd->reply_skb = NULL; 237 cmd->reply_page = 0;
244 } 238 }
245out: 239out:
246 clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status); 240 mutex_unlock(&priv->sync_cmd_mutex);
247 return ret; 241 return ret;
248} 242}
249EXPORT_SYMBOL(iwl_send_cmd_sync); 243EXPORT_SYMBOL(iwl_send_cmd_sync);
@@ -273,7 +267,7 @@ int iwl_send_cmd_pdu_async(struct iwl_priv *priv,
273 u8 id, u16 len, const void *data, 267 u8 id, u16 len, const void *data,
274 void (*callback)(struct iwl_priv *priv, 268 void (*callback)(struct iwl_priv *priv,
275 struct iwl_device_cmd *cmd, 269 struct iwl_device_cmd *cmd,
276 struct sk_buff *skb)) 270 struct iwl_rx_packet *pkt))
277{ 271{
278 struct iwl_host_cmd cmd = { 272 struct iwl_host_cmd cmd = {
279 .id = id, 273 .id = id,
diff --git a/drivers/net/wireless/iwlwifi/iwl-helpers.h b/drivers/net/wireless/iwlwifi/iwl-helpers.h
index bd0b12efb5c7..51a67fb2e185 100644
--- a/drivers/net/wireless/iwlwifi/iwl-helpers.h
+++ b/drivers/net/wireless/iwlwifi/iwl-helpers.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -80,8 +80,8 @@ static inline void iwl_free_fw_desc(struct pci_dev *pci_dev,
80 struct fw_desc *desc) 80 struct fw_desc *desc)
81{ 81{
82 if (desc->v_addr) 82 if (desc->v_addr)
83 pci_free_consistent(pci_dev, desc->len, 83 dma_free_coherent(&pci_dev->dev, desc->len,
84 desc->v_addr, desc->p_addr); 84 desc->v_addr, desc->p_addr);
85 desc->v_addr = NULL; 85 desc->v_addr = NULL;
86 desc->len = 0; 86 desc->len = 0;
87} 87}
@@ -89,7 +89,8 @@ static inline void iwl_free_fw_desc(struct pci_dev *pci_dev,
89static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev, 89static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev,
90 struct fw_desc *desc) 90 struct fw_desc *desc)
91{ 91{
92 desc->v_addr = pci_alloc_consistent(pci_dev, desc->len, &desc->p_addr); 92 desc->v_addr = dma_alloc_coherent(&pci_dev->dev, desc->len,
93 &desc->p_addr, GFP_KERNEL);
93 return (desc->v_addr != NULL) ? 0 : -ENOMEM; 94 return (desc->v_addr != NULL) ? 0 : -ENOMEM;
94} 95}
95 96
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h
index d30cb0275d19..16eb3ced9b30 100644
--- a/drivers/net/wireless/iwlwifi/iwl-io.h
+++ b/drivers/net/wireless/iwlwifi/iwl-io.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project. 5 * Portions of this file are derived from the ipw3945 project.
6 * 6 *
@@ -31,7 +31,9 @@
31 31
32#include <linux/io.h> 32#include <linux/io.h>
33 33
34#include "iwl-dev.h"
34#include "iwl-debug.h" 35#include "iwl-debug.h"
36#include "iwl-devtrace.h"
35 37
36/* 38/*
37 * IO, register, and NIC memory access functions 39 * IO, register, and NIC memory access functions
@@ -61,7 +63,32 @@
61 * 63 *
62 */ 64 */
63 65
64#define _iwl_write32(priv, ofs, val) iowrite32((val), (priv)->hw_base + (ofs)) 66static inline void _iwl_write8(struct iwl_priv *priv, u32 ofs, u8 val)
67{
68 trace_iwlwifi_dev_iowrite8(priv, ofs, val);
69 iowrite8(val, priv->hw_base + ofs);
70}
71
72#ifdef CONFIG_IWLWIFI_DEBUG
73static inline void __iwl_write8(const char *f, u32 l, struct iwl_priv *priv,
74 u32 ofs, u8 val)
75{
76 IWL_DEBUG_IO(priv, "write8(0x%08X, 0x%02X) - %s %d\n", ofs, val, f, l);
77 _iwl_write8(priv, ofs, val);
78}
79#define iwl_write8(priv, ofs, val) \
80 __iwl_write8(__FILE__, __LINE__, priv, ofs, val)
81#else
82#define iwl_write8(priv, ofs, val) _iwl_write8(priv, ofs, val)
83#endif
84
85
86static inline void _iwl_write32(struct iwl_priv *priv, u32 ofs, u32 val)
87{
88 trace_iwlwifi_dev_iowrite32(priv, ofs, val);
89 iowrite32(val, priv->hw_base + ofs);
90}
91
65#ifdef CONFIG_IWLWIFI_DEBUG 92#ifdef CONFIG_IWLWIFI_DEBUG
66static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv, 93static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv,
67 u32 ofs, u32 val) 94 u32 ofs, u32 val)
@@ -75,7 +102,13 @@ static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv,
75#define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val) 102#define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val)
76#endif 103#endif
77 104
78#define _iwl_read32(priv, ofs) ioread32((priv)->hw_base + (ofs)) 105static inline u32 _iwl_read32(struct iwl_priv *priv, u32 ofs)
106{
107 u32 val = ioread32(priv->hw_base + ofs);
108 trace_iwlwifi_dev_ioread32(priv, ofs, val);
109 return val;
110}
111
79#ifdef CONFIG_IWLWIFI_DEBUG 112#ifdef CONFIG_IWLWIFI_DEBUG
80static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs) 113static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs)
81{ 114{
@@ -188,6 +221,26 @@ static inline int _iwl_grab_nic_access(struct iwl_priv *priv)
188 221
189 /* this bit wakes up the NIC */ 222 /* this bit wakes up the NIC */
190 _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 223 _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
224
225 /*
226 * These bits say the device is running, and should keep running for
227 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
228 * but they do not indicate that embedded SRAM is restored yet;
229 * 3945 and 4965 have volatile SRAM, and must save/restore contents
230 * to/from host DRAM when sleeping/waking for power-saving.
231 * Each direction takes approximately 1/4 millisecond; with this
232 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
233 * series of register accesses are expected (e.g. reading Event Log),
234 * to keep device from sleeping.
235 *
236 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
237 * SRAM is okay/restored. We don't check that here because this call
238 * is just for hardware register access; but GP1 MAC_SLEEP check is a
239 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
240 *
241 * 5000 series and later (including 1000 series) have non-volatile SRAM,
242 * and do not save/restore SRAM when power cycling.
243 */
191 ret = _iwl_poll_bit(priv, CSR_GP_CNTRL, 244 ret = _iwl_poll_bit(priv, CSR_GP_CNTRL,
192 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN, 245 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
193 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY | 246 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c
index f420c99e7240..a6f9c918aabc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-led.c
+++ b/drivers/net/wireless/iwlwifi/iwl-led.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -42,15 +42,11 @@
42#include "iwl-core.h" 42#include "iwl-core.h"
43#include "iwl-io.h" 43#include "iwl-io.h"
44 44
45#ifdef CONFIG_IWLWIFI_DEBUG 45/* default: IWL_LED_BLINK(0) using blinking index table */
46static const char *led_type_str[] = { 46static int led_mode;
47 __stringify(IWL_LED_TRG_TX), 47module_param(led_mode, int, S_IRUGO);
48 __stringify(IWL_LED_TRG_RX), 48MODULE_PARM_DESC(led_mode, "led mode: 0=blinking, 1=On(RF On)/Off(RF Off), "
49 __stringify(IWL_LED_TRG_ASSOC), 49 "(default 0)\n");
50 __stringify(IWL_LED_TRG_RADIO),
51 NULL
52};
53#endif /* CONFIG_IWLWIFI_DEBUG */
54 50
55 51
56static const struct { 52static const struct {
@@ -65,11 +61,11 @@ static const struct {
65 {70, 65, 65}, 61 {70, 65, 65},
66 {50, 75, 75}, 62 {50, 75, 75},
67 {20, 85, 85}, 63 {20, 85, 85},
68 {15, 95, 95 }, 64 {10, 95, 95},
69 {10, 110, 110}, 65 {5, 110, 110},
70 {5, 130, 130}, 66 {1, 130, 130},
71 {0, 167, 167}, 67 {0, 167, 167},
72/* SOLID_ON */ 68 /* SOLID_ON */
73 {-1, IWL_LED_SOLID, 0} 69 {-1, IWL_LED_SOLID, 0}
74}; 70};
75 71
@@ -78,191 +74,74 @@ static const struct {
78#define IWL_MAX_BLINK_TBL (ARRAY_SIZE(blink_tbl) - 1) /* exclude SOLID_ON */ 74#define IWL_MAX_BLINK_TBL (ARRAY_SIZE(blink_tbl) - 1) /* exclude SOLID_ON */
79#define IWL_SOLID_BLINK_IDX (ARRAY_SIZE(blink_tbl) - 1) 75#define IWL_SOLID_BLINK_IDX (ARRAY_SIZE(blink_tbl) - 1)
80 76
81/* [0-256] -> [0..8] FIXME: we need [0..10] */ 77/*
82static inline int iwl_brightness_to_idx(enum led_brightness brightness) 78 * Adjust led blink rate to compensate on a MAC Clock difference on every HW
83{ 79 * Led blink rate analysis showed an average deviation of 0% on 3945,
84 return fls(0x000000FF & (u32)brightness); 80 * 5% on 4965 HW and 20% on 5000 series and up.
85} 81 * Need to compensate on the led on/off time per HW according to the deviation
86 82 * to achieve the desired led frequency
87/* Send led command */ 83 * The calculation is: (100-averageDeviation)/100 * blinkTime
88static int iwl_send_led_cmd(struct iwl_priv *priv, struct iwl_led_cmd *led_cmd) 84 * For code efficiency the calculation will be:
85 * compensation = (100 - averageDeviation) * 64 / 100
86 * NewBlinkTime = (compensation * BlinkTime) / 64
87 */
88static inline u8 iwl_blink_compensation(struct iwl_priv *priv,
89 u8 time, u16 compensation)
89{ 90{
90 struct iwl_host_cmd cmd = { 91 if (!compensation) {
91 .id = REPLY_LEDS_CMD, 92 IWL_ERR(priv, "undefined blink compensation: "
92 .len = sizeof(struct iwl_led_cmd), 93 "use pre-defined blinking time\n");
93 .data = led_cmd, 94 return time;
94 .flags = CMD_ASYNC, 95 }
95 .callback = NULL,
96 };
97 u32 reg;
98
99 reg = iwl_read32(priv, CSR_LED_REG);
100 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
101 iwl_write32(priv, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
102 96
103 return iwl_send_cmd(priv, &cmd); 97 return (u8)((time * compensation) >> 6);
104} 98}
105 99
106/* Set led pattern command */ 100/* Set led pattern command */
107static int iwl_led_pattern(struct iwl_priv *priv, int led_id, 101static int iwl_led_pattern(struct iwl_priv *priv, unsigned int idx)
108 unsigned int idx)
109{ 102{
110 struct iwl_led_cmd led_cmd = { 103 struct iwl_led_cmd led_cmd = {
111 .id = led_id, 104 .id = IWL_LED_LINK,
112 .interval = IWL_DEF_LED_INTRVL 105 .interval = IWL_DEF_LED_INTRVL
113 }; 106 };
114 107
115 BUG_ON(idx > IWL_MAX_BLINK_TBL); 108 BUG_ON(idx > IWL_MAX_BLINK_TBL);
116 109
117 led_cmd.on = blink_tbl[idx].on_time; 110 IWL_DEBUG_LED(priv, "Led blink time compensation= %u\n",
118 led_cmd.off = blink_tbl[idx].off_time; 111 priv->cfg->led_compensation);
119 112 led_cmd.on =
120 return iwl_send_led_cmd(priv, &led_cmd); 113 iwl_blink_compensation(priv, blink_tbl[idx].on_time,
121} 114 priv->cfg->led_compensation);
122 115 led_cmd.off =
123/* Set led register off */ 116 iwl_blink_compensation(priv, blink_tbl[idx].off_time,
124static int iwl_led_on_reg(struct iwl_priv *priv, int led_id) 117 priv->cfg->led_compensation);
125{
126 IWL_DEBUG_LED(priv, "led on %d\n", led_id);
127 iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
128 return 0;
129}
130 118
131#if 0 119 return priv->cfg->ops->led->cmd(priv, &led_cmd);
132/* Set led on command */
133static int iwl_led_on(struct iwl_priv *priv, int led_id)
134{
135 struct iwl_led_cmd led_cmd = {
136 .id = led_id,
137 .on = IWL_LED_SOLID,
138 .off = 0,
139 .interval = IWL_DEF_LED_INTRVL
140 };
141 return iwl_send_led_cmd(priv, &led_cmd);
142} 120}
143 121
144/* Set led off command */ 122int iwl_led_start(struct iwl_priv *priv)
145int iwl_led_off(struct iwl_priv *priv, int led_id)
146{ 123{
147 struct iwl_led_cmd led_cmd = { 124 return priv->cfg->ops->led->on(priv);
148 .id = led_id,
149 .on = 0,
150 .off = 0,
151 .interval = IWL_DEF_LED_INTRVL
152 };
153 IWL_DEBUG_LED(priv, "led off %d\n", led_id);
154 return iwl_send_led_cmd(priv, &led_cmd);
155} 125}
156#endif 126EXPORT_SYMBOL(iwl_led_start);
157
158 127
159/* Set led register off */ 128int iwl_led_associate(struct iwl_priv *priv)
160static int iwl_led_off_reg(struct iwl_priv *priv, int led_id)
161{
162 IWL_DEBUG_LED(priv, "LED Reg off\n");
163 iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_OFF);
164 return 0;
165}
166
167/*
168 * Set led register in case of disassociation according to rfkill state
169 */
170static int iwl_led_associate(struct iwl_priv *priv, int led_id)
171{ 129{
172 IWL_DEBUG_LED(priv, "Associated\n"); 130 IWL_DEBUG_LED(priv, "Associated\n");
173 priv->allow_blinking = 1; 131 if (led_mode == IWL_LED_BLINK)
174 return iwl_led_on_reg(priv, led_id); 132 priv->allow_blinking = 1;
175} 133 priv->last_blink_time = jiffies;
176static int iwl_led_disassociate(struct iwl_priv *priv, int led_id)
177{
178 priv->allow_blinking = 0;
179
180 return 0;
181}
182
183/*
184 * brightness call back function for Tx/Rx LED
185 */
186static int iwl_led_associated(struct iwl_priv *priv, int led_id)
187{
188 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
189 !test_bit(STATUS_READY, &priv->status))
190 return 0;
191
192 134
193 /* start counting Tx/Rx bytes */
194 if (!priv->last_blink_time && priv->allow_blinking)
195 priv->last_blink_time = jiffies;
196 return 0; 135 return 0;
197} 136}
198 137
199/* 138int iwl_led_disassociate(struct iwl_priv *priv)
200 * brightness call back for association and radio
201 */
202static void iwl_led_brightness_set(struct led_classdev *led_cdev,
203 enum led_brightness brightness)
204{ 139{
205 struct iwl_led *led = container_of(led_cdev, struct iwl_led, led_dev); 140 priv->allow_blinking = 0;
206 struct iwl_priv *priv = led->priv;
207
208 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
209 return;
210
211
212 IWL_DEBUG_LED(priv, "Led type = %s brightness = %d\n",
213 led_type_str[led->type], brightness);
214 switch (brightness) {
215 case LED_FULL:
216 if (led->led_on)
217 led->led_on(priv, IWL_LED_LINK);
218 break;
219 case LED_OFF:
220 if (led->led_off)
221 led->led_off(priv, IWL_LED_LINK);
222 break;
223 default:
224 if (led->led_pattern) {
225 int idx = iwl_brightness_to_idx(brightness);
226 led->led_pattern(priv, IWL_LED_LINK, idx);
227 }
228 break;
229 }
230}
231
232
233
234/*
235 * Register led class with the system
236 */
237static int iwl_leds_register_led(struct iwl_priv *priv, struct iwl_led *led,
238 enum led_type type, u8 set_led,
239 char *trigger)
240{
241 struct device *device = wiphy_dev(priv->hw->wiphy);
242 int ret;
243
244 led->led_dev.name = led->name;
245 led->led_dev.brightness_set = iwl_led_brightness_set;
246 led->led_dev.default_trigger = trigger;
247
248 led->priv = priv;
249 led->type = type;
250
251 ret = led_classdev_register(device, &led->led_dev);
252 if (ret) {
253 IWL_ERR(priv, "Error: failed to register led handler.\n");
254 return ret;
255 }
256
257 led->registered = 1;
258
259 if (set_led && led->led_on)
260 led->led_on(priv, IWL_LED_LINK);
261 141
262 return 0; 142 return 0;
263} 143}
264 144
265
266/* 145/*
267 * calculate blink rate according to last second Tx/Rx activities 146 * calculate blink rate according to last second Tx/Rx activities
268 */ 147 */
@@ -288,7 +167,7 @@ static int iwl_get_blink_rate(struct iwl_priv *priv)
288 i = IWL_MAX_BLINK_TBL; 167 i = IWL_MAX_BLINK_TBL;
289 else 168 else
290 for (i = 0; i < IWL_MAX_BLINK_TBL; i++) 169 for (i = 0; i < IWL_MAX_BLINK_TBL; i++)
291 if (tpt > (blink_tbl[i].tpt * IWL_1MB_RATE)) 170 if (tpt > (blink_tbl[i].tpt * IWL_1MB_RATE))
292 break; 171 break;
293 172
294 IWL_DEBUG_LED(priv, "LED BLINK IDX=%d\n", i); 173 IWL_DEBUG_LED(priv, "LED BLINK IDX=%d\n", i);
@@ -317,8 +196,7 @@ void iwl_leds_background(struct iwl_priv *priv)
317 priv->last_blink_time = 0; 196 priv->last_blink_time = 0;
318 if (priv->last_blink_rate != IWL_SOLID_BLINK_IDX) { 197 if (priv->last_blink_rate != IWL_SOLID_BLINK_IDX) {
319 priv->last_blink_rate = IWL_SOLID_BLINK_IDX; 198 priv->last_blink_rate = IWL_SOLID_BLINK_IDX;
320 iwl_led_pattern(priv, IWL_LED_LINK, 199 iwl_led_pattern(priv, IWL_SOLID_BLINK_IDX);
321 IWL_SOLID_BLINK_IDX);
322 } 200 }
323 return; 201 return;
324 } 202 }
@@ -331,111 +209,17 @@ void iwl_leds_background(struct iwl_priv *priv)
331 209
332 /* call only if blink rate change */ 210 /* call only if blink rate change */
333 if (blink_idx != priv->last_blink_rate) 211 if (blink_idx != priv->last_blink_rate)
334 iwl_led_pattern(priv, IWL_LED_LINK, blink_idx); 212 iwl_led_pattern(priv, blink_idx);
335 213
336 priv->last_blink_time = jiffies; 214 priv->last_blink_time = jiffies;
337 priv->last_blink_rate = blink_idx; 215 priv->last_blink_rate = blink_idx;
338} 216}
217EXPORT_SYMBOL(iwl_leds_background);
339 218
340/* Register all led handler */ 219void iwl_leds_init(struct iwl_priv *priv)
341int iwl_leds_register(struct iwl_priv *priv)
342{ 220{
343 char *trigger;
344 int ret;
345
346 priv->last_blink_rate = 0; 221 priv->last_blink_rate = 0;
347 priv->led_tpt = 0;
348 priv->last_blink_time = 0; 222 priv->last_blink_time = 0;
349 priv->allow_blinking = 0; 223 priv->allow_blinking = 0;
350
351 trigger = ieee80211_get_radio_led_name(priv->hw);
352 snprintf(priv->led[IWL_LED_TRG_RADIO].name,
353 sizeof(priv->led[IWL_LED_TRG_RADIO].name), "iwl-%s::radio",
354 wiphy_name(priv->hw->wiphy));
355
356 priv->led[IWL_LED_TRG_RADIO].led_on = iwl_led_on_reg;
357 priv->led[IWL_LED_TRG_RADIO].led_off = iwl_led_off_reg;
358 priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL;
359
360 ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_RADIO],
361 IWL_LED_TRG_RADIO, 1, trigger);
362 if (ret)
363 goto exit_fail;
364
365 trigger = ieee80211_get_assoc_led_name(priv->hw);
366 snprintf(priv->led[IWL_LED_TRG_ASSOC].name,
367 sizeof(priv->led[IWL_LED_TRG_ASSOC].name), "iwl-%s::assoc",
368 wiphy_name(priv->hw->wiphy));
369
370 ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_ASSOC],
371 IWL_LED_TRG_ASSOC, 0, trigger);
372
373 /* for assoc always turn led on */
374 priv->led[IWL_LED_TRG_ASSOC].led_on = iwl_led_associate;
375 priv->led[IWL_LED_TRG_ASSOC].led_off = iwl_led_disassociate;
376 priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
377
378 if (ret)
379 goto exit_fail;
380
381 trigger = ieee80211_get_rx_led_name(priv->hw);
382 snprintf(priv->led[IWL_LED_TRG_RX].name,
383 sizeof(priv->led[IWL_LED_TRG_RX].name), "iwl-%s::RX",
384 wiphy_name(priv->hw->wiphy));
385
386 ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_RX],
387 IWL_LED_TRG_RX, 0, trigger);
388
389 priv->led[IWL_LED_TRG_RX].led_on = iwl_led_associated;
390 priv->led[IWL_LED_TRG_RX].led_off = iwl_led_associated;
391 priv->led[IWL_LED_TRG_RX].led_pattern = iwl_led_pattern;
392
393 if (ret)
394 goto exit_fail;
395
396 trigger = ieee80211_get_tx_led_name(priv->hw);
397 snprintf(priv->led[IWL_LED_TRG_TX].name,
398 sizeof(priv->led[IWL_LED_TRG_TX].name), "iwl-%s::TX",
399 wiphy_name(priv->hw->wiphy));
400
401 ret = iwl_leds_register_led(priv, &priv->led[IWL_LED_TRG_TX],
402 IWL_LED_TRG_TX, 0, trigger);
403
404 priv->led[IWL_LED_TRG_TX].led_on = iwl_led_associated;
405 priv->led[IWL_LED_TRG_TX].led_off = iwl_led_associated;
406 priv->led[IWL_LED_TRG_TX].led_pattern = iwl_led_pattern;
407
408 if (ret)
409 goto exit_fail;
410
411 return 0;
412
413exit_fail:
414 iwl_leds_unregister(priv);
415 return ret;
416} 224}
417EXPORT_SYMBOL(iwl_leds_register); 225EXPORT_SYMBOL(iwl_leds_init);
418
419/* unregister led class */
420static void iwl_leds_unregister_led(struct iwl_led *led, u8 set_led)
421{
422 if (!led->registered)
423 return;
424
425 led_classdev_unregister(&led->led_dev);
426
427 if (set_led)
428 led->led_dev.brightness_set(&led->led_dev, LED_OFF);
429 led->registered = 0;
430}
431
432/* Unregister all led handlers */
433void iwl_leds_unregister(struct iwl_priv *priv)
434{
435 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0);
436 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_RX], 0);
437 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_TX], 0);
438 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1);
439}
440EXPORT_SYMBOL(iwl_leds_unregister);
441
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.h b/drivers/net/wireless/iwlwifi/iwl-led.h
index ef9b174c37ff..49a70baa3fb6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-led.h
+++ b/drivers/net/wireless/iwlwifi/iwl-led.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * This program is free software; you can redistribute it and/or modify it 5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as 6 * under the terms of version 2 of the GNU General Public License as
@@ -30,9 +30,6 @@
30 30
31struct iwl_priv; 31struct iwl_priv;
32 32
33#ifdef CONFIG_IWLWIFI_LEDS
34#include <linux/leds.h>
35
36#define IWL_LED_SOLID 11 33#define IWL_LED_SOLID 11
37#define IWL_LED_NAME_LEN 31 34#define IWL_LED_NAME_LEN 31
38#define IWL_DEF_LED_INTRVL cpu_to_le32(1000) 35#define IWL_DEF_LED_INTRVL cpu_to_le32(1000)
@@ -47,38 +44,23 @@ enum led_type {
47 IWL_LED_TRG_RADIO, 44 IWL_LED_TRG_RADIO,
48 IWL_LED_TRG_MAX, 45 IWL_LED_TRG_MAX,
49}; 46};
50#endif
51
52#ifdef CONFIG_IWLWIFI_LEDS
53
54struct iwl_led {
55 struct iwl_priv *priv;
56 struct led_classdev led_dev;
57 char name[32];
58 47
59 int (*led_on) (struct iwl_priv *priv, int led_id); 48/*
60 int (*led_off) (struct iwl_priv *priv, int led_id); 49 * LED mode
61 int (*led_pattern) (struct iwl_priv *priv, int led_id, unsigned int idx); 50 * IWL_LED_BLINK: adjust led blink rate based on blink table
62 51 * IWL_LED_RF_STATE: turn LED on/off based on RF state
63 enum led_type type; 52 * LED ON = RF ON
64 unsigned int registered; 53 * LED OFF = RF OFF
54 */
55enum iwl_led_mode {
56 IWL_LED_BLINK,
57 IWL_LED_RF_STATE,
65}; 58};
66 59
67int iwl_leds_register(struct iwl_priv *priv); 60void iwl_leds_init(struct iwl_priv *priv);
68void iwl_leds_unregister(struct iwl_priv *priv);
69void iwl_leds_background(struct iwl_priv *priv); 61void iwl_leds_background(struct iwl_priv *priv);
62int iwl_led_start(struct iwl_priv *priv);
63int iwl_led_associate(struct iwl_priv *priv);
64int iwl_led_disassociate(struct iwl_priv *priv);
70 65
71#else
72static inline int iwl_leds_register(struct iwl_priv *priv)
73{
74 return 0;
75}
76static inline void iwl_leds_unregister(struct iwl_priv *priv)
77{
78}
79static inline void iwl_leds_background(struct iwl_priv *priv)
80{
81}
82
83#endif /* CONFIG_IWLWIFI_LEDS */
84#endif /* __iwl_leds_h__ */ 66#endif /* __iwl_leds_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.c b/drivers/net/wireless/iwlwifi/iwl-power.c
index 60be976afff8..548dac2f6a96 100644
--- a/drivers/net/wireless/iwlwifi/iwl-power.c
+++ b/drivers/net/wireless/iwlwifi/iwl-power.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -29,6 +29,7 @@
29 29
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/slab.h>
32#include <linux/init.h> 33#include <linux/init.h>
33 34
34#include <net/mac80211.h> 35#include <net/mac80211.h>
@@ -66,7 +67,7 @@ MODULE_PARM_DESC(no_sleep_autoadjust,
66 67
67struct iwl_power_vec_entry { 68struct iwl_power_vec_entry {
68 struct iwl_powertable_cmd cmd; 69 struct iwl_powertable_cmd cmd;
69 u8 no_dtim; 70 u8 no_dtim; /* number of skip dtim */
70}; 71};
71 72
72#define IWL_DTIM_RANGE_0_MAX 2 73#define IWL_DTIM_RANGE_0_MAX 2
@@ -83,8 +84,9 @@ struct iwl_power_vec_entry {
83 cpu_to_le32(X4)} 84 cpu_to_le32(X4)}
84/* default power management (not Tx power) table values */ 85/* default power management (not Tx power) table values */
85/* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */ 86/* for DTIM period 0 through IWL_DTIM_RANGE_0_MAX */
87/* DTIM 0 - 2 */
86static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = { 88static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
87 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, 89 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 1, 2, 2, 0xFF)}, 0},
88 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0}, 90 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 2, 2, 0xFF)}, 0},
89 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0}, 91 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 2, 2, 2, 0xFF)}, 0},
90 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1}, 92 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 2, 4, 4, 0xFF)}, 1},
@@ -93,15 +95,17 @@ static const struct iwl_power_vec_entry range_0[IWL_POWER_NUM] = {
93 95
94 96
95/* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */ 97/* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
98/* DTIM 3 - 10 */
96static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = { 99static const struct iwl_power_vec_entry range_1[IWL_POWER_NUM] = {
97 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0}, 100 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
98 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0}, 101 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(1, 2, 3, 4, 7)}, 0},
99 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0}, 102 {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 4, 6, 7, 9)}, 0},
100 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1}, 103 {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 4, 6, 9, 10)}, 1},
101 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 7, 10, 10)}, 2} 104 {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(2, 4, 6, 10, 10)}, 2}
102}; 105};
103 106
104/* for DTIM period > IWL_DTIM_RANGE_1_MAX */ 107/* for DTIM period > IWL_DTIM_RANGE_1_MAX */
108/* DTIM 11 - */
105static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = { 109static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
106 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0}, 110 {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
107 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0}, 111 {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
@@ -115,13 +119,15 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,
115 enum iwl_power_level lvl, int period) 119 enum iwl_power_level lvl, int period)
116{ 120{
117 const struct iwl_power_vec_entry *table; 121 const struct iwl_power_vec_entry *table;
118 int max_sleep, i; 122 int max_sleep[IWL_POWER_VEC_SIZE] = { 0 };
119 bool skip; 123 int i;
124 u8 skip;
125 u32 slp_itrvl;
120 126
121 table = range_2; 127 table = range_2;
122 if (period < IWL_DTIM_RANGE_1_MAX) 128 if (period <= IWL_DTIM_RANGE_1_MAX)
123 table = range_1; 129 table = range_1;
124 if (period < IWL_DTIM_RANGE_0_MAX) 130 if (period <= IWL_DTIM_RANGE_0_MAX)
125 table = range_0; 131 table = range_0;
126 132
127 BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM); 133 BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM);
@@ -129,34 +135,60 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,
129 *cmd = table[lvl].cmd; 135 *cmd = table[lvl].cmd;
130 136
131 if (period == 0) { 137 if (period == 0) {
132 skip = false; 138 skip = 0;
133 period = 1; 139 period = 1;
140 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
141 max_sleep[i] = 1;
142
134 } else { 143 } else {
135 skip = !!table[lvl].no_dtim; 144 skip = table[lvl].no_dtim;
145 for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
146 max_sleep[i] = le32_to_cpu(cmd->sleep_interval[i]);
147 max_sleep[IWL_POWER_VEC_SIZE - 1] = skip + 1;
136 } 148 }
137 149
138 if (skip) { 150 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
139 __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]; 151 /* figure out the listen interval based on dtim period and skip */
140 max_sleep = le32_to_cpu(slp_itrvl); 152 if (slp_itrvl == 0xFF)
141 if (max_sleep == 0xFF) 153 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
142 max_sleep = period * (skip + 1); 154 cpu_to_le32(period * (skip + 1));
143 else if (max_sleep > period) 155
144 max_sleep = (le32_to_cpu(slp_itrvl) / period) * period; 156 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
157 if (slp_itrvl > period)
158 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
159 cpu_to_le32((slp_itrvl / period) * period);
160
161 if (skip)
145 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK; 162 cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
146 } else { 163 else
147 max_sleep = period;
148 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; 164 cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
149 }
150 165
151 for (i = 0; i < IWL_POWER_VEC_SIZE; i++) 166 slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
152 if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep) 167 if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
153 cmd->sleep_interval[i] = cpu_to_le32(max_sleep); 168 cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
169 cpu_to_le32(IWL_CONN_MAX_LISTEN_INTERVAL);
170
171 /* enforce max sleep interval */
172 for (i = IWL_POWER_VEC_SIZE - 1; i >= 0 ; i--) {
173 if (le32_to_cpu(cmd->sleep_interval[i]) >
174 (max_sleep[i] * period))
175 cmd->sleep_interval[i] =
176 cpu_to_le32(max_sleep[i] * period);
177 if (i != (IWL_POWER_VEC_SIZE - 1)) {
178 if (le32_to_cpu(cmd->sleep_interval[i]) >
179 le32_to_cpu(cmd->sleep_interval[i+1]))
180 cmd->sleep_interval[i] =
181 cmd->sleep_interval[i+1];
182 }
183 }
154 184
155 if (priv->power_data.pci_pm) 185 if (priv->power_data.pci_pm)
156 cmd->flags |= IWL_POWER_PCI_PM_MSK; 186 cmd->flags |= IWL_POWER_PCI_PM_MSK;
157 else 187 else
158 cmd->flags &= ~IWL_POWER_PCI_PM_MSK; 188 cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
159 189
190 IWL_DEBUG_POWER(priv, "numSkipDtim = %u, dtimPeriod = %d\n",
191 skip, period);
160 IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1); 192 IWL_DEBUG_POWER(priv, "Sleep command for index %d\n", lvl + 1);
161} 193}
162 194
@@ -165,26 +197,26 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,
165 *============================================================================= 197 *=============================================================================
166 * Condition Nxt State Condition Nxt State Condition Nxt State 198 * Condition Nxt State Condition Nxt State Condition Nxt State
167 *----------------------------------------------------------------------------- 199 *-----------------------------------------------------------------------------
168 * IWL_TI_0 T >= 115 CT_KILL 115>T>=105 TI_1 N/A N/A 200 * IWL_TI_0 T >= 114 CT_KILL 114>T>=105 TI_1 N/A N/A
169 * IWL_TI_1 T >= 115 CT_KILL 115>T>=110 TI_2 T<=95 TI_0 201 * IWL_TI_1 T >= 114 CT_KILL 114>T>=110 TI_2 T<=95 TI_0
170 * IWL_TI_2 T >= 115 CT_KILL T<=100 TI_1 202 * IWL_TI_2 T >= 114 CT_KILL T<=100 TI_1
171 * IWL_CT_KILL N/A N/A N/A N/A T<=95 TI_0 203 * IWL_CT_KILL N/A N/A N/A N/A T<=95 TI_0
172 *============================================================================= 204 *=============================================================================
173 */ 205 */
174static const struct iwl_tt_trans tt_range_0[IWL_TI_STATE_MAX - 1] = { 206static const struct iwl_tt_trans tt_range_0[IWL_TI_STATE_MAX - 1] = {
175 {IWL_TI_0, IWL_ABSOLUTE_ZERO, 104}, 207 {IWL_TI_0, IWL_ABSOLUTE_ZERO, 104},
176 {IWL_TI_1, 105, CT_KILL_THRESHOLD}, 208 {IWL_TI_1, 105, CT_KILL_THRESHOLD - 1},
177 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD + 1, IWL_ABSOLUTE_MAX} 209 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD, IWL_ABSOLUTE_MAX}
178}; 210};
179static const struct iwl_tt_trans tt_range_1[IWL_TI_STATE_MAX - 1] = { 211static const struct iwl_tt_trans tt_range_1[IWL_TI_STATE_MAX - 1] = {
180 {IWL_TI_0, IWL_ABSOLUTE_ZERO, 95}, 212 {IWL_TI_0, IWL_ABSOLUTE_ZERO, 95},
181 {IWL_TI_2, 110, CT_KILL_THRESHOLD}, 213 {IWL_TI_2, 110, CT_KILL_THRESHOLD - 1},
182 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD + 1, IWL_ABSOLUTE_MAX} 214 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD, IWL_ABSOLUTE_MAX}
183}; 215};
184static const struct iwl_tt_trans tt_range_2[IWL_TI_STATE_MAX - 1] = { 216static const struct iwl_tt_trans tt_range_2[IWL_TI_STATE_MAX - 1] = {
185 {IWL_TI_1, IWL_ABSOLUTE_ZERO, 100}, 217 {IWL_TI_1, IWL_ABSOLUTE_ZERO, 100},
186 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD + 1, IWL_ABSOLUTE_MAX}, 218 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD, IWL_ABSOLUTE_MAX},
187 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD + 1, IWL_ABSOLUTE_MAX} 219 {IWL_TI_CT_KILL, CT_KILL_THRESHOLD, IWL_ABSOLUTE_MAX}
188}; 220};
189static const struct iwl_tt_trans tt_range_3[IWL_TI_STATE_MAX - 1] = { 221static const struct iwl_tt_trans tt_range_3[IWL_TI_STATE_MAX - 1] = {
190 {IWL_TI_0, IWL_ABSOLUTE_ZERO, CT_KILL_EXIT_THRESHOLD}, 222 {IWL_TI_0, IWL_ABSOLUTE_ZERO, CT_KILL_EXIT_THRESHOLD},
@@ -272,13 +304,12 @@ static int iwl_set_power(struct iwl_priv *priv, struct iwl_powertable_cmd *cmd)
272 sizeof(struct iwl_powertable_cmd), cmd); 304 sizeof(struct iwl_powertable_cmd), cmd);
273} 305}
274 306
275 307/* priv->mutex must be held */
276int iwl_power_update_mode(struct iwl_priv *priv, bool force) 308int iwl_power_update_mode(struct iwl_priv *priv, bool force)
277{ 309{
278 int ret = 0; 310 int ret = 0;
279 struct iwl_tt_mgmt *tt = &priv->thermal_throttle; 311 struct iwl_tt_mgmt *tt = &priv->thermal_throttle;
280 bool enabled = (priv->iw_mode == NL80211_IFTYPE_STATION) && 312 bool enabled = priv->hw->conf.flags & IEEE80211_CONF_PS;
281 (priv->hw->conf.flags & IEEE80211_CONF_PS);
282 bool update_chains; 313 bool update_chains;
283 struct iwl_powertable_cmd cmd; 314 struct iwl_powertable_cmd cmd;
284 int dtimper; 315 int dtimper;
@@ -288,12 +319,15 @@ int iwl_power_update_mode(struct iwl_priv *priv, bool force)
288 priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE; 319 priv->chain_noise_data.state == IWL_CHAIN_NOISE_ALIVE;
289 320
290 if (priv->vif) 321 if (priv->vif)
291 dtimper = priv->vif->bss_conf.dtim_period; 322 dtimper = priv->hw->conf.ps_dtim_period;
292 else 323 else
293 dtimper = 1; 324 dtimper = 1;
294 325
295 if (priv->cfg->broken_powersave) 326 if (priv->cfg->broken_powersave)
296 iwl_power_sleep_cam_cmd(priv, &cmd); 327 iwl_power_sleep_cam_cmd(priv, &cmd);
328 else if (priv->cfg->supports_idle &&
329 priv->hw->conf.flags & IEEE80211_CONF_IDLE)
330 iwl_static_sleep_cmd(priv, &cmd, IWL_POWER_INDEX_5, 20);
297 else if (tt->state >= IWL_TI_1) 331 else if (tt->state >= IWL_TI_1)
298 iwl_static_sleep_cmd(priv, &cmd, tt->tt_power_mode, dtimper); 332 iwl_static_sleep_cmd(priv, &cmd, tt->tt_power_mode, dtimper);
299 else if (!enabled) 333 else if (!enabled)
@@ -348,6 +382,23 @@ bool iwl_ht_enabled(struct iwl_priv *priv)
348} 382}
349EXPORT_SYMBOL(iwl_ht_enabled); 383EXPORT_SYMBOL(iwl_ht_enabled);
350 384
385bool iwl_within_ct_kill_margin(struct iwl_priv *priv)
386{
387 s32 temp = priv->temperature; /* degrees CELSIUS except 4965 */
388 bool within_margin = false;
389
390 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)
391 temp = KELVIN_TO_CELSIUS(priv->temperature);
392
393 if (!priv->thermal_throttle.advanced_tt)
394 within_margin = ((temp + IWL_TT_CT_KILL_MARGIN) >=
395 CT_KILL_THRESHOLD_LEGACY) ? true : false;
396 else
397 within_margin = ((temp + IWL_TT_CT_KILL_MARGIN) >=
398 CT_KILL_THRESHOLD) ? true : false;
399 return within_margin;
400}
401
351enum iwl_antenna_ok iwl_tx_ant_restriction(struct iwl_priv *priv) 402enum iwl_antenna_ok iwl_tx_ant_restriction(struct iwl_priv *priv)
352{ 403{
353 struct iwl_tt_mgmt *tt = &priv->thermal_throttle; 404 struct iwl_tt_mgmt *tt = &priv->thermal_throttle;
@@ -372,6 +423,7 @@ enum iwl_antenna_ok iwl_rx_ant_restriction(struct iwl_priv *priv)
372} 423}
373 424
374#define CT_KILL_EXIT_DURATION (5) /* 5 seconds duration */ 425#define CT_KILL_EXIT_DURATION (5) /* 5 seconds duration */
426#define CT_KILL_WAITING_DURATION (300) /* 300ms duration */
375 427
376/* 428/*
377 * toggle the bit to wake up uCode and check the temperature 429 * toggle the bit to wake up uCode and check the temperature
@@ -409,6 +461,7 @@ static void iwl_tt_check_exit_ct_kill(unsigned long data)
409 /* Reschedule the ct_kill timer to occur in 461 /* Reschedule the ct_kill timer to occur in
410 * CT_KILL_EXIT_DURATION seconds to ensure we get a 462 * CT_KILL_EXIT_DURATION seconds to ensure we get a
411 * thermal update */ 463 * thermal update */
464 IWL_DEBUG_POWER(priv, "schedule ct_kill exit timer\n");
412 mod_timer(&priv->thermal_throttle.ct_kill_exit_tm, jiffies + 465 mod_timer(&priv->thermal_throttle.ct_kill_exit_tm, jiffies +
413 CT_KILL_EXIT_DURATION * HZ); 466 CT_KILL_EXIT_DURATION * HZ);
414 } 467 }
@@ -432,6 +485,33 @@ static void iwl_perform_ct_kill_task(struct iwl_priv *priv,
432 } 485 }
433} 486}
434 487
488static void iwl_tt_ready_for_ct_kill(unsigned long data)
489{
490 struct iwl_priv *priv = (struct iwl_priv *)data;
491 struct iwl_tt_mgmt *tt = &priv->thermal_throttle;
492
493 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
494 return;
495
496 /* temperature timer expired, ready to go into CT_KILL state */
497 if (tt->state != IWL_TI_CT_KILL) {
498 IWL_DEBUG_POWER(priv, "entering CT_KILL state when temperature timer expired\n");
499 tt->state = IWL_TI_CT_KILL;
500 set_bit(STATUS_CT_KILL, &priv->status);
501 iwl_perform_ct_kill_task(priv, true);
502 }
503}
504
505static void iwl_prepare_ct_kill_task(struct iwl_priv *priv)
506{
507 IWL_DEBUG_POWER(priv, "Prepare to enter IWL_TI_CT_KILL\n");
508 /* make request to retrieve statistics information */
509 iwl_send_statistics_request(priv, CMD_SYNC, false);
510 /* Reschedule the ct_kill wait timer */
511 mod_timer(&priv->thermal_throttle.ct_kill_waiting_tm,
512 jiffies + msecs_to_jiffies(CT_KILL_WAITING_DURATION));
513}
514
435#define IWL_MINIMAL_POWER_THRESHOLD (CT_KILL_THRESHOLD_LEGACY) 515#define IWL_MINIMAL_POWER_THRESHOLD (CT_KILL_THRESHOLD_LEGACY)
436#define IWL_REDUCED_PERFORMANCE_THRESHOLD_2 (100) 516#define IWL_REDUCED_PERFORMANCE_THRESHOLD_2 (100)
437#define IWL_REDUCED_PERFORMANCE_THRESHOLD_1 (90) 517#define IWL_REDUCED_PERFORMANCE_THRESHOLD_1 (90)
@@ -445,7 +525,7 @@ static void iwl_perform_ct_kill_task(struct iwl_priv *priv,
445 * Throttle early enough to lower the power consumption before 525 * Throttle early enough to lower the power consumption before
446 * drastic steps are needed 526 * drastic steps are needed
447 */ 527 */
448static void iwl_legacy_tt_handler(struct iwl_priv *priv, s32 temp) 528static void iwl_legacy_tt_handler(struct iwl_priv *priv, s32 temp, bool force)
449{ 529{
450 struct iwl_tt_mgmt *tt = &priv->thermal_throttle; 530 struct iwl_tt_mgmt *tt = &priv->thermal_throttle;
451 enum iwl_tt_state old_state; 531 enum iwl_tt_state old_state;
@@ -474,6 +554,8 @@ static void iwl_legacy_tt_handler(struct iwl_priv *priv, s32 temp)
474#ifdef CONFIG_IWLWIFI_DEBUG 554#ifdef CONFIG_IWLWIFI_DEBUG
475 tt->tt_previous_temp = temp; 555 tt->tt_previous_temp = temp;
476#endif 556#endif
557 /* stop ct_kill_waiting_tm timer */
558 del_timer_sync(&priv->thermal_throttle.ct_kill_waiting_tm);
477 if (tt->state != old_state) { 559 if (tt->state != old_state) {
478 switch (tt->state) { 560 switch (tt->state) {
479 case IWL_TI_0: 561 case IWL_TI_0:
@@ -494,17 +576,28 @@ static void iwl_legacy_tt_handler(struct iwl_priv *priv, s32 temp)
494 break; 576 break;
495 } 577 }
496 mutex_lock(&priv->mutex); 578 mutex_lock(&priv->mutex);
497 if (iwl_power_update_mode(priv, true)) { 579 if (old_state == IWL_TI_CT_KILL)
580 clear_bit(STATUS_CT_KILL, &priv->status);
581 if (tt->state != IWL_TI_CT_KILL &&
582 iwl_power_update_mode(priv, true)) {
498 /* TT state not updated 583 /* TT state not updated
499 * try again during next temperature read 584 * try again during next temperature read
500 */ 585 */
586 if (old_state == IWL_TI_CT_KILL)
587 set_bit(STATUS_CT_KILL, &priv->status);
501 tt->state = old_state; 588 tt->state = old_state;
502 IWL_ERR(priv, "Cannot update power mode, " 589 IWL_ERR(priv, "Cannot update power mode, "
503 "TT state not updated\n"); 590 "TT state not updated\n");
504 } else { 591 } else {
505 if (tt->state == IWL_TI_CT_KILL) 592 if (tt->state == IWL_TI_CT_KILL) {
506 iwl_perform_ct_kill_task(priv, true); 593 if (force) {
507 else if (old_state == IWL_TI_CT_KILL && 594 set_bit(STATUS_CT_KILL, &priv->status);
595 iwl_perform_ct_kill_task(priv, true);
596 } else {
597 iwl_prepare_ct_kill_task(priv);
598 tt->state = old_state;
599 }
600 } else if (old_state == IWL_TI_CT_KILL &&
508 tt->state != IWL_TI_CT_KILL) 601 tt->state != IWL_TI_CT_KILL)
509 iwl_perform_ct_kill_task(priv, false); 602 iwl_perform_ct_kill_task(priv, false);
510 IWL_DEBUG_POWER(priv, "Temperature state changed %u\n", 603 IWL_DEBUG_POWER(priv, "Temperature state changed %u\n",
@@ -531,13 +624,13 @@ static void iwl_legacy_tt_handler(struct iwl_priv *priv, s32 temp)
531 *============================================================================= 624 *=============================================================================
532 * Condition Nxt State Condition Nxt State Condition Nxt State 625 * Condition Nxt State Condition Nxt State Condition Nxt State
533 *----------------------------------------------------------------------------- 626 *-----------------------------------------------------------------------------
534 * IWL_TI_0 T >= 115 CT_KILL 115>T>=105 TI_1 N/A N/A 627 * IWL_TI_0 T >= 114 CT_KILL 114>T>=105 TI_1 N/A N/A
535 * IWL_TI_1 T >= 115 CT_KILL 115>T>=110 TI_2 T<=95 TI_0 628 * IWL_TI_1 T >= 114 CT_KILL 114>T>=110 TI_2 T<=95 TI_0
536 * IWL_TI_2 T >= 115 CT_KILL T<=100 TI_1 629 * IWL_TI_2 T >= 114 CT_KILL T<=100 TI_1
537 * IWL_CT_KILL N/A N/A N/A N/A T<=95 TI_0 630 * IWL_CT_KILL N/A N/A N/A N/A T<=95 TI_0
538 *============================================================================= 631 *=============================================================================
539 */ 632 */
540static void iwl_advance_tt_handler(struct iwl_priv *priv, s32 temp) 633static void iwl_advance_tt_handler(struct iwl_priv *priv, s32 temp, bool force)
541{ 634{
542 struct iwl_tt_mgmt *tt = &priv->thermal_throttle; 635 struct iwl_tt_mgmt *tt = &priv->thermal_throttle;
543 int i; 636 int i;
@@ -582,6 +675,8 @@ static void iwl_advance_tt_handler(struct iwl_priv *priv, s32 temp)
582 break; 675 break;
583 } 676 }
584 } 677 }
678 /* stop ct_kill_waiting_tm timer */
679 del_timer_sync(&priv->thermal_throttle.ct_kill_waiting_tm);
585 if (changed) { 680 if (changed) {
586 struct iwl_rxon_cmd *rxon = &priv->staging_rxon; 681 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
587 682
@@ -613,12 +708,17 @@ static void iwl_advance_tt_handler(struct iwl_priv *priv, s32 temp)
613 iwl_set_rxon_ht(priv, &priv->current_ht_config); 708 iwl_set_rxon_ht(priv, &priv->current_ht_config);
614 } 709 }
615 mutex_lock(&priv->mutex); 710 mutex_lock(&priv->mutex);
616 if (iwl_power_update_mode(priv, true)) { 711 if (old_state == IWL_TI_CT_KILL)
712 clear_bit(STATUS_CT_KILL, &priv->status);
713 if (tt->state != IWL_TI_CT_KILL &&
714 iwl_power_update_mode(priv, true)) {
617 /* TT state not updated 715 /* TT state not updated
618 * try again during next temperature read 716 * try again during next temperature read
619 */ 717 */
620 IWL_ERR(priv, "Cannot update power mode, " 718 IWL_ERR(priv, "Cannot update power mode, "
621 "TT state not updated\n"); 719 "TT state not updated\n");
720 if (old_state == IWL_TI_CT_KILL)
721 set_bit(STATUS_CT_KILL, &priv->status);
622 tt->state = old_state; 722 tt->state = old_state;
623 } else { 723 } else {
624 IWL_DEBUG_POWER(priv, 724 IWL_DEBUG_POWER(priv,
@@ -626,9 +726,15 @@ static void iwl_advance_tt_handler(struct iwl_priv *priv, s32 temp)
626 tt->state); 726 tt->state);
627 if (old_state != IWL_TI_CT_KILL && 727 if (old_state != IWL_TI_CT_KILL &&
628 tt->state == IWL_TI_CT_KILL) { 728 tt->state == IWL_TI_CT_KILL) {
629 IWL_DEBUG_POWER(priv, "Enter IWL_TI_CT_KILL\n"); 729 if (force) {
630 iwl_perform_ct_kill_task(priv, true); 730 IWL_DEBUG_POWER(priv,
631 731 "Enter IWL_TI_CT_KILL\n");
732 set_bit(STATUS_CT_KILL, &priv->status);
733 iwl_perform_ct_kill_task(priv, true);
734 } else {
735 iwl_prepare_ct_kill_task(priv);
736 tt->state = old_state;
737 }
632 } else if (old_state == IWL_TI_CT_KILL && 738 } else if (old_state == IWL_TI_CT_KILL &&
633 tt->state != IWL_TI_CT_KILL) { 739 tt->state != IWL_TI_CT_KILL) {
634 IWL_DEBUG_POWER(priv, "Exit IWL_TI_CT_KILL\n"); 740 IWL_DEBUG_POWER(priv, "Exit IWL_TI_CT_KILL\n");
@@ -665,10 +771,11 @@ static void iwl_bg_ct_enter(struct work_struct *work)
665 "- ucode going to sleep!\n"); 771 "- ucode going to sleep!\n");
666 if (!priv->thermal_throttle.advanced_tt) 772 if (!priv->thermal_throttle.advanced_tt)
667 iwl_legacy_tt_handler(priv, 773 iwl_legacy_tt_handler(priv,
668 IWL_MINIMAL_POWER_THRESHOLD); 774 IWL_MINIMAL_POWER_THRESHOLD,
775 true);
669 else 776 else
670 iwl_advance_tt_handler(priv, 777 iwl_advance_tt_handler(priv,
671 CT_KILL_THRESHOLD + 1); 778 CT_KILL_THRESHOLD + 1, true);
672 } 779 }
673} 780}
674 781
@@ -695,11 +802,18 @@ static void iwl_bg_ct_exit(struct work_struct *work)
695 IWL_ERR(priv, 802 IWL_ERR(priv,
696 "Device temperature below critical" 803 "Device temperature below critical"
697 "- ucode awake!\n"); 804 "- ucode awake!\n");
805 /*
806 * exit from CT_KILL state
807 * reset the current temperature reading
808 */
809 priv->temperature = 0;
698 if (!priv->thermal_throttle.advanced_tt) 810 if (!priv->thermal_throttle.advanced_tt)
699 iwl_legacy_tt_handler(priv, 811 iwl_legacy_tt_handler(priv,
700 IWL_REDUCED_PERFORMANCE_THRESHOLD_2); 812 IWL_REDUCED_PERFORMANCE_THRESHOLD_2,
813 true);
701 else 814 else
702 iwl_advance_tt_handler(priv, CT_KILL_EXIT_THRESHOLD); 815 iwl_advance_tt_handler(priv, CT_KILL_EXIT_THRESHOLD,
816 true);
703 } 817 }
704} 818}
705 819
@@ -735,9 +849,9 @@ static void iwl_bg_tt_work(struct work_struct *work)
735 temp = KELVIN_TO_CELSIUS(priv->temperature); 849 temp = KELVIN_TO_CELSIUS(priv->temperature);
736 850
737 if (!priv->thermal_throttle.advanced_tt) 851 if (!priv->thermal_throttle.advanced_tt)
738 iwl_legacy_tt_handler(priv, temp); 852 iwl_legacy_tt_handler(priv, temp, false);
739 else 853 else
740 iwl_advance_tt_handler(priv, temp); 854 iwl_advance_tt_handler(priv, temp, false);
741} 855}
742 856
743void iwl_tt_handler(struct iwl_priv *priv) 857void iwl_tt_handler(struct iwl_priv *priv)
@@ -768,16 +882,18 @@ void iwl_tt_initialize(struct iwl_priv *priv)
768 tt->state = IWL_TI_0; 882 tt->state = IWL_TI_0;
769 init_timer(&priv->thermal_throttle.ct_kill_exit_tm); 883 init_timer(&priv->thermal_throttle.ct_kill_exit_tm);
770 priv->thermal_throttle.ct_kill_exit_tm.data = (unsigned long)priv; 884 priv->thermal_throttle.ct_kill_exit_tm.data = (unsigned long)priv;
771 priv->thermal_throttle.ct_kill_exit_tm.function = iwl_tt_check_exit_ct_kill; 885 priv->thermal_throttle.ct_kill_exit_tm.function =
772 886 iwl_tt_check_exit_ct_kill;
887 init_timer(&priv->thermal_throttle.ct_kill_waiting_tm);
888 priv->thermal_throttle.ct_kill_waiting_tm.data = (unsigned long)priv;
889 priv->thermal_throttle.ct_kill_waiting_tm.function =
890 iwl_tt_ready_for_ct_kill;
773 /* setup deferred ct kill work */ 891 /* setup deferred ct kill work */
774 INIT_WORK(&priv->tt_work, iwl_bg_tt_work); 892 INIT_WORK(&priv->tt_work, iwl_bg_tt_work);
775 INIT_WORK(&priv->ct_enter, iwl_bg_ct_enter); 893 INIT_WORK(&priv->ct_enter, iwl_bg_ct_enter);
776 INIT_WORK(&priv->ct_exit, iwl_bg_ct_exit); 894 INIT_WORK(&priv->ct_exit, iwl_bg_ct_exit);
777 895
778 switch (priv->hw_rev & CSR_HW_REV_TYPE_MSK) { 896 if (priv->cfg->adv_thermal_throttle) {
779 case CSR_HW_REV_TYPE_6x00:
780 case CSR_HW_REV_TYPE_6x50:
781 IWL_DEBUG_POWER(priv, "Advanced Thermal Throttling\n"); 897 IWL_DEBUG_POWER(priv, "Advanced Thermal Throttling\n");
782 tt->restriction = kzalloc(sizeof(struct iwl_tt_restriction) * 898 tt->restriction = kzalloc(sizeof(struct iwl_tt_restriction) *
783 IWL_TI_STATE_MAX, GFP_KERNEL); 899 IWL_TI_STATE_MAX, GFP_KERNEL);
@@ -810,11 +926,9 @@ void iwl_tt_initialize(struct iwl_priv *priv)
810 &restriction_range[0], size); 926 &restriction_range[0], size);
811 priv->thermal_throttle.advanced_tt = true; 927 priv->thermal_throttle.advanced_tt = true;
812 } 928 }
813 break; 929 } else {
814 default:
815 IWL_DEBUG_POWER(priv, "Legacy Thermal Throttling\n"); 930 IWL_DEBUG_POWER(priv, "Legacy Thermal Throttling\n");
816 priv->thermal_throttle.advanced_tt = false; 931 priv->thermal_throttle.advanced_tt = false;
817 break;
818 } 932 }
819} 933}
820EXPORT_SYMBOL(iwl_tt_initialize); 934EXPORT_SYMBOL(iwl_tt_initialize);
@@ -826,6 +940,8 @@ void iwl_tt_exit(struct iwl_priv *priv)
826 940
827 /* stop ct_kill_exit_tm timer if activated */ 941 /* stop ct_kill_exit_tm timer if activated */
828 del_timer_sync(&priv->thermal_throttle.ct_kill_exit_tm); 942 del_timer_sync(&priv->thermal_throttle.ct_kill_exit_tm);
943 /* stop ct_kill_waiting_tm timer if activated */
944 del_timer_sync(&priv->thermal_throttle.ct_kill_waiting_tm);
829 cancel_work_sync(&priv->tt_work); 945 cancel_work_sync(&priv->tt_work);
830 cancel_work_sync(&priv->ct_enter); 946 cancel_work_sync(&priv->ct_enter);
831 cancel_work_sync(&priv->ct_exit); 947 cancel_work_sync(&priv->ct_exit);
diff --git a/drivers/net/wireless/iwlwifi/iwl-power.h b/drivers/net/wireless/iwlwifi/iwl-power.h
index df6f6a49712b..5db91c10dcc8 100644
--- a/drivers/net/wireless/iwlwifi/iwl-power.h
+++ b/drivers/net/wireless/iwlwifi/iwl-power.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2007 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2007 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -33,6 +33,7 @@
33#define IWL_ABSOLUTE_ZERO 0 33#define IWL_ABSOLUTE_ZERO 0
34#define IWL_ABSOLUTE_MAX 0xFFFFFFFF 34#define IWL_ABSOLUTE_MAX 0xFFFFFFFF
35#define IWL_TT_INCREASE_MARGIN 5 35#define IWL_TT_INCREASE_MARGIN 5
36#define IWL_TT_CT_KILL_MARGIN 3
36 37
37enum iwl_antenna_ok { 38enum iwl_antenna_ok {
38 IWL_ANT_OK_NONE, 39 IWL_ANT_OK_NONE,
@@ -110,6 +111,7 @@ struct iwl_tt_mgmt {
110 struct iwl_tt_restriction *restriction; 111 struct iwl_tt_restriction *restriction;
111 struct iwl_tt_trans *transaction; 112 struct iwl_tt_trans *transaction;
112 struct timer_list ct_kill_exit_tm; 113 struct timer_list ct_kill_exit_tm;
114 struct timer_list ct_kill_waiting_tm;
113}; 115};
114 116
115enum iwl_power_level { 117enum iwl_power_level {
@@ -129,6 +131,7 @@ struct iwl_power_mgr {
129 131
130int iwl_power_update_mode(struct iwl_priv *priv, bool force); 132int iwl_power_update_mode(struct iwl_priv *priv, bool force);
131bool iwl_ht_enabled(struct iwl_priv *priv); 133bool iwl_ht_enabled(struct iwl_priv *priv);
134bool iwl_within_ct_kill_margin(struct iwl_priv *priv);
132enum iwl_antenna_ok iwl_tx_ant_restriction(struct iwl_priv *priv); 135enum iwl_antenna_ok iwl_tx_ant_restriction(struct iwl_priv *priv);
133enum iwl_antenna_ok iwl_rx_ant_restriction(struct iwl_priv *priv); 136enum iwl_antenna_ok iwl_rx_ant_restriction(struct iwl_priv *priv);
134void iwl_tt_enter_ct_kill(struct iwl_priv *priv); 137void iwl_tt_enter_ct_kill(struct iwl_priv *priv);
diff --git a/drivers/net/wireless/iwlwifi/iwl-prph.h b/drivers/net/wireless/iwlwifi/iwl-prph.h
index d393e8f02102..d2d2a9174900 100644
--- a/drivers/net/wireless/iwlwifi/iwl-prph.h
+++ b/drivers/net/wireless/iwlwifi/iwl-prph.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * GPL LICENSE SUMMARY 6 * GPL LICENSE SUMMARY
7 * 7 *
8 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 8 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as 11 * it under the terms of version 2 of the GNU General Public License as
@@ -30,7 +30,7 @@
30 * 30 *
31 * BSD LICENSE 31 * BSD LICENSE
32 * 32 *
33 * Copyright(c) 2005 - 2009 Intel Corporation. All rights reserved. 33 * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved.
34 * All rights reserved. 34 * All rights reserved.
35 * 35 *
36 * Redistribution and use in source and binary forms, with or without 36 * Redistribution and use in source and binary forms, with or without
@@ -254,7 +254,8 @@
254 * device. A queue maps to only one (selectable by driver) Tx DMA channel, 254 * device. A queue maps to only one (selectable by driver) Tx DMA channel,
255 * but one DMA channel may take input from several queues. 255 * but one DMA channel may take input from several queues.
256 * 256 *
257 * Tx DMA channels have dedicated purposes. For 4965, they are used as follows: 257 * Tx DMA channels have dedicated purposes. For 4965, they are used as follows
258 * (cf. default_queue_to_tx_fifo in iwl-4965.c):
258 * 259 *
259 * 0 -- EDCA BK (background) frames, lowest priority 260 * 0 -- EDCA BK (background) frames, lowest priority
260 * 1 -- EDCA BE (best effort) frames, normal priority 261 * 1 -- EDCA BE (best effort) frames, normal priority
@@ -265,9 +266,21 @@
265 * 6 -- HCCA long frames 266 * 6 -- HCCA long frames
266 * 7 -- not used by driver (device-internal only) 267 * 7 -- not used by driver (device-internal only)
267 * 268 *
269 * For 5000 series and up, they are used slightly differently
270 * (cf. iwl5000_default_queue_to_tx_fifo in iwl-5000.c):
271 *
272 * 0 -- EDCA BK (background) frames, lowest priority
273 * 1 -- EDCA BE (best effort) frames, normal priority
274 * 2 -- EDCA VI (video) frames, higher priority
275 * 3 -- EDCA VO (voice) and management frames, highest priority
276 * 4 -- (TBD)
277 * 5 -- HCCA short frames
278 * 6 -- HCCA long frames
279 * 7 -- Commands
280 *
268 * Driver should normally map queues 0-6 to Tx DMA/FIFO channels 0-6. 281 * Driver should normally map queues 0-6 to Tx DMA/FIFO channels 0-6.
269 * In addition, driver can map queues 7-15 to Tx DMA/FIFO channels 0-3 to 282 * In addition, driver can map the remaining queues to Tx DMA/FIFO
270 * support 11n aggregation via EDCA DMA channels. 283 * channels 0-3 to support 11n aggregation via EDCA DMA channels.
271 * 284 *
272 * The driver sets up each queue to work in one of two modes: 285 * The driver sets up each queue to work in one of two modes:
273 * 286 *
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index 493626bcd3ec..e5eb339107dd 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -28,6 +28,7 @@
28 *****************************************************************************/ 28 *****************************************************************************/
29 29
30#include <linux/etherdevice.h> 30#include <linux/etherdevice.h>
31#include <linux/slab.h>
31#include <net/mac80211.h> 32#include <net/mac80211.h>
32#include <asm/unaligned.h> 33#include <asm/unaligned.h>
33#include "iwl-eeprom.h" 34#include "iwl-eeprom.h"
@@ -123,12 +124,11 @@ EXPORT_SYMBOL(iwl_rx_queue_space);
123/** 124/**
124 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue 125 * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
125 */ 126 */
126int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q) 127void iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
127{ 128{
128 unsigned long flags; 129 unsigned long flags;
129 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg; 130 u32 rx_wrt_ptr_reg = priv->hw_params.rx_wrt_ptr_reg;
130 u32 reg; 131 u32 reg;
131 int ret = 0;
132 132
133 spin_lock_irqsave(&q->lock, flags); 133 spin_lock_irqsave(&q->lock, flags);
134 134
@@ -140,6 +140,8 @@ int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
140 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); 140 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
141 141
142 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { 142 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
143 IWL_DEBUG_INFO(priv, "Rx queue requesting wakeup, GP1 = 0x%x\n",
144 reg);
143 iwl_set_bit(priv, CSR_GP_CNTRL, 145 iwl_set_bit(priv, CSR_GP_CNTRL,
144 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 146 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
145 goto exit_unlock; 147 goto exit_unlock;
@@ -159,7 +161,6 @@ int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
159 161
160 exit_unlock: 162 exit_unlock:
161 spin_unlock_irqrestore(&q->lock, flags); 163 spin_unlock_irqrestore(&q->lock, flags);
162 return ret;
163} 164}
164EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr); 165EXPORT_SYMBOL(iwl_rx_queue_update_write_ptr);
165/** 166/**
@@ -182,14 +183,13 @@ static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
182 * also updates the memory address in the firmware to reference the new 183 * also updates the memory address in the firmware to reference the new
183 * target buffer. 184 * target buffer.
184 */ 185 */
185int iwl_rx_queue_restock(struct iwl_priv *priv) 186void iwl_rx_queue_restock(struct iwl_priv *priv)
186{ 187{
187 struct iwl_rx_queue *rxq = &priv->rxq; 188 struct iwl_rx_queue *rxq = &priv->rxq;
188 struct list_head *element; 189 struct list_head *element;
189 struct iwl_rx_mem_buffer *rxb; 190 struct iwl_rx_mem_buffer *rxb;
190 unsigned long flags; 191 unsigned long flags;
191 int write; 192 int write;
192 int ret = 0;
193 193
194 spin_lock_irqsave(&rxq->lock, flags); 194 spin_lock_irqsave(&rxq->lock, flags);
195 write = rxq->write & ~0x7; 195 write = rxq->write & ~0x7;
@@ -200,7 +200,7 @@ int iwl_rx_queue_restock(struct iwl_priv *priv)
200 list_del(element); 200 list_del(element);
201 201
202 /* Point to Rx buffer via next RBD in circular buffer */ 202 /* Point to Rx buffer via next RBD in circular buffer */
203 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->aligned_dma_addr); 203 rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->page_dma);
204 rxq->queue[rxq->write] = rxb; 204 rxq->queue[rxq->write] = rxb;
205 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 205 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
206 rxq->free_count--; 206 rxq->free_count--;
@@ -218,10 +218,8 @@ int iwl_rx_queue_restock(struct iwl_priv *priv)
218 spin_lock_irqsave(&rxq->lock, flags); 218 spin_lock_irqsave(&rxq->lock, flags);
219 rxq->need_update = 1; 219 rxq->need_update = 1;
220 spin_unlock_irqrestore(&rxq->lock, flags); 220 spin_unlock_irqrestore(&rxq->lock, flags);
221 ret = iwl_rx_queue_update_write_ptr(priv, rxq); 221 iwl_rx_queue_update_write_ptr(priv, rxq);
222 } 222 }
223
224 return ret;
225} 223}
226EXPORT_SYMBOL(iwl_rx_queue_restock); 224EXPORT_SYMBOL(iwl_rx_queue_restock);
227 225
@@ -239,8 +237,9 @@ void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
239 struct iwl_rx_queue *rxq = &priv->rxq; 237 struct iwl_rx_queue *rxq = &priv->rxq;
240 struct list_head *element; 238 struct list_head *element;
241 struct iwl_rx_mem_buffer *rxb; 239 struct iwl_rx_mem_buffer *rxb;
242 struct sk_buff *skb; 240 struct page *page;
243 unsigned long flags; 241 unsigned long flags;
242 gfp_t gfp_mask = priority;
244 243
245 while (1) { 244 while (1) {
246 spin_lock_irqsave(&rxq->lock, flags); 245 spin_lock_irqsave(&rxq->lock, flags);
@@ -251,30 +250,35 @@ void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
251 spin_unlock_irqrestore(&rxq->lock, flags); 250 spin_unlock_irqrestore(&rxq->lock, flags);
252 251
253 if (rxq->free_count > RX_LOW_WATERMARK) 252 if (rxq->free_count > RX_LOW_WATERMARK)
254 priority |= __GFP_NOWARN; 253 gfp_mask |= __GFP_NOWARN;
255 /* Alloc a new receive buffer */ 254
256 skb = alloc_skb(priv->hw_params.rx_buf_size + 256, 255 if (priv->hw_params.rx_page_order > 0)
257 priority); 256 gfp_mask |= __GFP_COMP;
258 257
259 if (!skb) { 258 /* Alloc a new receive buffer */
259 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
260 if (!page) {
260 if (net_ratelimit()) 261 if (net_ratelimit())
261 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n"); 262 IWL_DEBUG_INFO(priv, "alloc_pages failed, "
263 "order: %d\n",
264 priv->hw_params.rx_page_order);
265
262 if ((rxq->free_count <= RX_LOW_WATERMARK) && 266 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
263 net_ratelimit()) 267 net_ratelimit())
264 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n", 268 IWL_CRIT(priv, "Failed to alloc_pages with %s. Only %u free buffers remaining.\n",
265 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", 269 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
266 rxq->free_count); 270 rxq->free_count);
267 /* We don't reschedule replenish work here -- we will 271 /* We don't reschedule replenish work here -- we will
268 * call the restock method and if it still needs 272 * call the restock method and if it still needs
269 * more buffers it will schedule replenish */ 273 * more buffers it will schedule replenish */
270 break; 274 return;
271 } 275 }
272 276
273 spin_lock_irqsave(&rxq->lock, flags); 277 spin_lock_irqsave(&rxq->lock, flags);
274 278
275 if (list_empty(&rxq->rx_used)) { 279 if (list_empty(&rxq->rx_used)) {
276 spin_unlock_irqrestore(&rxq->lock, flags); 280 spin_unlock_irqrestore(&rxq->lock, flags);
277 dev_kfree_skb_any(skb); 281 __free_pages(page, priv->hw_params.rx_page_order);
278 return; 282 return;
279 } 283 }
280 element = rxq->rx_used.next; 284 element = rxq->rx_used.next;
@@ -283,24 +287,21 @@ void iwl_rx_allocate(struct iwl_priv *priv, gfp_t priority)
283 287
284 spin_unlock_irqrestore(&rxq->lock, flags); 288 spin_unlock_irqrestore(&rxq->lock, flags);
285 289
286 rxb->skb = skb; 290 rxb->page = page;
287 /* Get physical address of RB/SKB */ 291 /* Get physical address of the RB */
288 rxb->real_dma_addr = pci_map_single( 292 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
289 priv->pci_dev, 293 PAGE_SIZE << priv->hw_params.rx_page_order,
290 rxb->skb->data, 294 PCI_DMA_FROMDEVICE);
291 priv->hw_params.rx_buf_size + 256,
292 PCI_DMA_FROMDEVICE);
293 /* dma address must be no more than 36 bits */ 295 /* dma address must be no more than 36 bits */
294 BUG_ON(rxb->real_dma_addr & ~DMA_BIT_MASK(36)); 296 BUG_ON(rxb->page_dma & ~DMA_BIT_MASK(36));
295 /* and also 256 byte aligned! */ 297 /* and also 256 byte aligned! */
296 rxb->aligned_dma_addr = ALIGN(rxb->real_dma_addr, 256); 298 BUG_ON(rxb->page_dma & DMA_BIT_MASK(8));
297 skb_reserve(rxb->skb, rxb->aligned_dma_addr - rxb->real_dma_addr);
298 299
299 spin_lock_irqsave(&rxq->lock, flags); 300 spin_lock_irqsave(&rxq->lock, flags);
300 301
301 list_add_tail(&rxb->list, &rxq->rx_free); 302 list_add_tail(&rxb->list, &rxq->rx_free);
302 rxq->free_count++; 303 rxq->free_count++;
303 priv->alloc_rxb_skb++; 304 priv->alloc_rxb_page++;
304 305
305 spin_unlock_irqrestore(&rxq->lock, flags); 306 spin_unlock_irqrestore(&rxq->lock, flags);
306 } 307 }
@@ -336,19 +337,19 @@ void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
336{ 337{
337 int i; 338 int i;
338 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 339 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
339 if (rxq->pool[i].skb != NULL) { 340 if (rxq->pool[i].page != NULL) {
340 pci_unmap_single(priv->pci_dev, 341 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
341 rxq->pool[i].real_dma_addr, 342 PAGE_SIZE << priv->hw_params.rx_page_order,
342 priv->hw_params.rx_buf_size + 256, 343 PCI_DMA_FROMDEVICE);
343 PCI_DMA_FROMDEVICE); 344 __iwl_free_pages(priv, rxq->pool[i].page);
344 dev_kfree_skb(rxq->pool[i].skb); 345 rxq->pool[i].page = NULL;
345 } 346 }
346 } 347 }
347 348
348 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, 349 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
349 rxq->dma_addr); 350 rxq->dma_addr);
350 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status), 351 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
351 rxq->rb_stts, rxq->rb_stts_dma); 352 rxq->rb_stts, rxq->rb_stts_dma);
352 rxq->bd = NULL; 353 rxq->bd = NULL;
353 rxq->rb_stts = NULL; 354 rxq->rb_stts = NULL;
354} 355}
@@ -357,7 +358,7 @@ EXPORT_SYMBOL(iwl_rx_queue_free);
357int iwl_rx_queue_alloc(struct iwl_priv *priv) 358int iwl_rx_queue_alloc(struct iwl_priv *priv)
358{ 359{
359 struct iwl_rx_queue *rxq = &priv->rxq; 360 struct iwl_rx_queue *rxq = &priv->rxq;
360 struct pci_dev *dev = priv->pci_dev; 361 struct device *dev = &priv->pci_dev->dev;
361 int i; 362 int i;
362 363
363 spin_lock_init(&rxq->lock); 364 spin_lock_init(&rxq->lock);
@@ -365,12 +366,13 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv)
365 INIT_LIST_HEAD(&rxq->rx_used); 366 INIT_LIST_HEAD(&rxq->rx_used);
366 367
367 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */ 368 /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
368 rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr); 369 rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr,
370 GFP_KERNEL);
369 if (!rxq->bd) 371 if (!rxq->bd)
370 goto err_bd; 372 goto err_bd;
371 373
372 rxq->rb_stts = pci_alloc_consistent(dev, sizeof(struct iwl_rb_status), 374 rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct iwl_rb_status),
373 &rxq->rb_stts_dma); 375 &rxq->rb_stts_dma, GFP_KERNEL);
374 if (!rxq->rb_stts) 376 if (!rxq->rb_stts)
375 goto err_rb; 377 goto err_rb;
376 378
@@ -387,8 +389,8 @@ int iwl_rx_queue_alloc(struct iwl_priv *priv)
387 return 0; 389 return 0;
388 390
389err_rb: 391err_rb:
390 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, 392 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
391 rxq->dma_addr); 393 rxq->dma_addr);
392err_bd: 394err_bd:
393 return -ENOMEM; 395 return -ENOMEM;
394} 396}
@@ -405,14 +407,12 @@ void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
405 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { 407 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
406 /* In the reset function, these buffers may have been allocated 408 /* In the reset function, these buffers may have been allocated
407 * to an SKB, so we need to unmap and free potential storage */ 409 * to an SKB, so we need to unmap and free potential storage */
408 if (rxq->pool[i].skb != NULL) { 410 if (rxq->pool[i].page != NULL) {
409 pci_unmap_single(priv->pci_dev, 411 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
410 rxq->pool[i].real_dma_addr, 412 PAGE_SIZE << priv->hw_params.rx_page_order,
411 priv->hw_params.rx_buf_size + 256, 413 PCI_DMA_FROMDEVICE);
412 PCI_DMA_FROMDEVICE); 414 __iwl_free_pages(priv, rxq->pool[i].page);
413 priv->alloc_rxb_skb--; 415 rxq->pool[i].page = NULL;
414 dev_kfree_skb(rxq->pool[i].skb);
415 rxq->pool[i].skb = NULL;
416 } 416 }
417 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 417 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
418 } 418 }
@@ -470,7 +470,8 @@ int iwl_rx_init(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
470 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)| 470 (rb_timeout << FH_RCSR_RX_CONFIG_REG_IRQ_RBTH_POS)|
471 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS)); 471 (rfdnlog << FH_RCSR_RX_CONFIG_RBDCB_SIZE_POS));
472 472
473 iwl_write32(priv, CSR_INT_COALESCING, 0x40); 473 /* Set interrupt coalescing timer to default (2048 usecs) */
474 iwl_write8(priv, CSR_INT_COALESCING, IWL_HOST_INT_TIMEOUT_DEF);
474 475
475 return 0; 476 return 0;
476} 477}
@@ -491,13 +492,14 @@ void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
491 struct iwl_rx_mem_buffer *rxb) 492 struct iwl_rx_mem_buffer *rxb)
492 493
493{ 494{
494 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 495 struct iwl_rx_packet *pkt = rxb_addr(rxb);
495 struct iwl_missed_beacon_notif *missed_beacon; 496 struct iwl_missed_beacon_notif *missed_beacon;
496 497
497 missed_beacon = &pkt->u.missed_beacon; 498 missed_beacon = &pkt->u.missed_beacon;
498 if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) { 499 if (le32_to_cpu(missed_beacon->consecutive_missed_beacons) >
500 priv->missed_beacon_threshold) {
499 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n", 501 IWL_DEBUG_CALIB(priv, "missed bcn cnsq %d totl %d rcd %d expctd %d\n",
500 le32_to_cpu(missed_beacon->consequtive_missed_beacons), 502 le32_to_cpu(missed_beacon->consecutive_missed_beacons),
501 le32_to_cpu(missed_beacon->total_missed_becons), 503 le32_to_cpu(missed_beacon->total_missed_becons),
502 le32_to_cpu(missed_beacon->num_recvd_beacons), 504 le32_to_cpu(missed_beacon->num_recvd_beacons),
503 le32_to_cpu(missed_beacon->num_expected_beacons)); 505 le32_to_cpu(missed_beacon->num_expected_beacons));
@@ -507,6 +509,24 @@ void iwl_rx_missed_beacon_notif(struct iwl_priv *priv,
507} 509}
508EXPORT_SYMBOL(iwl_rx_missed_beacon_notif); 510EXPORT_SYMBOL(iwl_rx_missed_beacon_notif);
509 511
512void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
513 struct iwl_rx_mem_buffer *rxb)
514{
515 struct iwl_rx_packet *pkt = rxb_addr(rxb);
516 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
517
518 if (!report->state) {
519 IWL_DEBUG_11H(priv,
520 "Spectrum Measure Notification: Start\n");
521 return;
522 }
523
524 memcpy(&priv->measure_report, report, sizeof(*report));
525 priv->measurement_status |= MEASUREMENT_READY;
526}
527EXPORT_SYMBOL(iwl_rx_spectrum_measure_notif);
528
529
510 530
511/* Calculate noise level, based on measurements during network silence just 531/* Calculate noise level, based on measurements during network silence just
512 * before arriving beacon. This measurement can be done only if we know 532 * before arriving beacon. This measurement can be done only if we know
@@ -548,13 +568,64 @@ static void iwl_rx_calc_noise(struct iwl_priv *priv)
548 priv->last_rx_noise); 568 priv->last_rx_noise);
549} 569}
550 570
571#ifdef CONFIG_IWLWIFI_DEBUG
572/*
573 * based on the assumption of all statistics counter are in DWORD
574 * FIXME: This function is for debugging, do not deal with
575 * the case of counters roll-over.
576 */
577static void iwl_accumulative_statistics(struct iwl_priv *priv,
578 __le32 *stats)
579{
580 int i;
581 __le32 *prev_stats;
582 u32 *accum_stats;
583 u32 *delta, *max_delta;
584
585 prev_stats = (__le32 *)&priv->statistics;
586 accum_stats = (u32 *)&priv->accum_statistics;
587 delta = (u32 *)&priv->delta_statistics;
588 max_delta = (u32 *)&priv->max_delta;
589
590 for (i = sizeof(__le32); i < sizeof(struct iwl_notif_statistics);
591 i += sizeof(__le32), stats++, prev_stats++, delta++,
592 max_delta++, accum_stats++) {
593 if (le32_to_cpu(*stats) > le32_to_cpu(*prev_stats)) {
594 *delta = (le32_to_cpu(*stats) -
595 le32_to_cpu(*prev_stats));
596 *accum_stats += *delta;
597 if (*delta > *max_delta)
598 *max_delta = *delta;
599 }
600 }
601
602 /* reset accumulative statistics for "no-counter" type statistics */
603 priv->accum_statistics.general.temperature =
604 priv->statistics.general.temperature;
605 priv->accum_statistics.general.temperature_m =
606 priv->statistics.general.temperature_m;
607 priv->accum_statistics.general.ttl_timestamp =
608 priv->statistics.general.ttl_timestamp;
609 priv->accum_statistics.tx.tx_power.ant_a =
610 priv->statistics.tx.tx_power.ant_a;
611 priv->accum_statistics.tx.tx_power.ant_b =
612 priv->statistics.tx.tx_power.ant_b;
613 priv->accum_statistics.tx.tx_power.ant_c =
614 priv->statistics.tx.tx_power.ant_c;
615}
616#endif
617
551#define REG_RECALIB_PERIOD (60) 618#define REG_RECALIB_PERIOD (60)
552 619
620#define PLCP_MSG "plcp_err exceeded %u, %u, %u, %u, %u, %d, %u mSecs\n"
553void iwl_rx_statistics(struct iwl_priv *priv, 621void iwl_rx_statistics(struct iwl_priv *priv,
554 struct iwl_rx_mem_buffer *rxb) 622 struct iwl_rx_mem_buffer *rxb)
555{ 623{
556 int change; 624 int change;
557 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 625 struct iwl_rx_packet *pkt = rxb_addr(rxb);
626 int combined_plcp_delta;
627 unsigned int plcp_msec;
628 unsigned long plcp_received_jiffies;
558 629
559 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n", 630 IWL_DEBUG_RX(priv, "Statistics notification received (%d vs %d).\n",
560 (int)sizeof(priv->statistics), 631 (int)sizeof(priv->statistics),
@@ -566,6 +637,59 @@ void iwl_rx_statistics(struct iwl_priv *priv,
566 STATISTICS_REPLY_FLG_HT40_MODE_MSK) != 637 STATISTICS_REPLY_FLG_HT40_MODE_MSK) !=
567 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK))); 638 (pkt->u.stats.flag & STATISTICS_REPLY_FLG_HT40_MODE_MSK)));
568 639
640#ifdef CONFIG_IWLWIFI_DEBUG
641 iwl_accumulative_statistics(priv, (__le32 *)&pkt->u.stats);
642#endif
643 /*
644 * check for plcp_err and trigger radio reset if it exceeds
645 * the plcp error threshold plcp_delta.
646 */
647 plcp_received_jiffies = jiffies;
648 plcp_msec = jiffies_to_msecs((long) plcp_received_jiffies -
649 (long) priv->plcp_jiffies);
650 priv->plcp_jiffies = plcp_received_jiffies;
651 /*
652 * check to make sure plcp_msec is not 0 to prevent division
653 * by zero.
654 */
655 if (plcp_msec) {
656 combined_plcp_delta =
657 (le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err) -
658 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err)) +
659 (le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err) -
660 le32_to_cpu(priv->statistics.rx.ofdm_ht.plcp_err));
661
662 if ((combined_plcp_delta > 0) &&
663 ((combined_plcp_delta * 100) / plcp_msec) >
664 priv->cfg->plcp_delta_threshold) {
665 /*
666 * if plcp_err exceed the threshold, the following
667 * data is printed in csv format:
668 * Text: plcp_err exceeded %d,
669 * Received ofdm.plcp_err,
670 * Current ofdm.plcp_err,
671 * Received ofdm_ht.plcp_err,
672 * Current ofdm_ht.plcp_err,
673 * combined_plcp_delta,
674 * plcp_msec
675 */
676 IWL_DEBUG_RADIO(priv, PLCP_MSG,
677 priv->cfg->plcp_delta_threshold,
678 le32_to_cpu(pkt->u.stats.rx.ofdm.plcp_err),
679 le32_to_cpu(priv->statistics.rx.ofdm.plcp_err),
680 le32_to_cpu(pkt->u.stats.rx.ofdm_ht.plcp_err),
681 le32_to_cpu(
682 priv->statistics.rx.ofdm_ht.plcp_err),
683 combined_plcp_delta, plcp_msec);
684
685 /*
686 * Reset the RF radio due to the high plcp
687 * error rate
688 */
689 iwl_force_reset(priv, IWL_RF_RESET);
690 }
691 }
692
569 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics)); 693 memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
570 694
571 set_bit(STATUS_STATISTICS, &priv->status); 695 set_bit(STATUS_STATISTICS, &priv->status);
@@ -582,54 +706,30 @@ void iwl_rx_statistics(struct iwl_priv *priv,
582 iwl_rx_calc_noise(priv); 706 iwl_rx_calc_noise(priv);
583 queue_work(priv->workqueue, &priv->run_time_calib_work); 707 queue_work(priv->workqueue, &priv->run_time_calib_work);
584 } 708 }
585
586 iwl_leds_background(priv);
587
588 if (priv->cfg->ops->lib->temp_ops.temperature && change) 709 if (priv->cfg->ops->lib->temp_ops.temperature && change)
589 priv->cfg->ops->lib->temp_ops.temperature(priv); 710 priv->cfg->ops->lib->temp_ops.temperature(priv);
590} 711}
591EXPORT_SYMBOL(iwl_rx_statistics); 712EXPORT_SYMBOL(iwl_rx_statistics);
592 713
593#define PERFECT_RSSI (-20) /* dBm */ 714void iwl_reply_statistics(struct iwl_priv *priv,
594#define WORST_RSSI (-95) /* dBm */ 715 struct iwl_rx_mem_buffer *rxb)
595#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
596
597/* Calculate an indication of rx signal quality (a percentage, not dBm!).
598 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
599 * about formulas used below. */
600static int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
601{ 716{
602 int sig_qual; 717 struct iwl_rx_packet *pkt = rxb_addr(rxb);
603 int degradation = PERFECT_RSSI - rssi_dbm; 718
604 719 if (le32_to_cpu(pkt->u.stats.flag) & UCODE_STATISTICS_CLEAR_MSK) {
605 /* If we get a noise measurement, use signal-to-noise ratio (SNR) 720#ifdef CONFIG_IWLWIFI_DEBUG
606 * as indicator; formula is (signal dbm - noise dbm). 721 memset(&priv->accum_statistics, 0,
607 * SNR at or above 40 is a great signal (100%). 722 sizeof(struct iwl_notif_statistics));
608 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator. 723 memset(&priv->delta_statistics, 0,
609 * Weakest usable signal is usually 10 - 15 dB SNR. */ 724 sizeof(struct iwl_notif_statistics));
610 if (noise_dbm) { 725 memset(&priv->max_delta, 0,
611 if (rssi_dbm - noise_dbm >= 40) 726 sizeof(struct iwl_notif_statistics));
612 return 100; 727#endif
613 else if (rssi_dbm < noise_dbm) 728 IWL_DEBUG_RX(priv, "Statistics have been cleared\n");
614 return 0; 729 }
615 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2; 730 iwl_rx_statistics(priv, rxb);
616
617 /* Else use just the signal level.
618 * This formula is a least squares fit of data points collected and
619 * compared with a reference system that had a percentage (%) display
620 * for signal quality. */
621 } else
622 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
623 (15 * RSSI_RANGE + 62 * degradation)) /
624 (RSSI_RANGE * RSSI_RANGE);
625
626 if (sig_qual > 100)
627 sig_qual = 100;
628 else if (sig_qual < 1)
629 sig_qual = 0;
630
631 return sig_qual;
632} 731}
732EXPORT_SYMBOL(iwl_reply_statistics);
633 733
634/* Calc max signal level (dBm) among 3 possible receivers */ 734/* Calc max signal level (dBm) among 3 possible receivers */
635static inline int iwl_calc_rssi(struct iwl_priv *priv, 735static inline int iwl_calc_rssi(struct iwl_priv *priv,
@@ -878,6 +978,10 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
878 struct iwl_rx_mem_buffer *rxb, 978 struct iwl_rx_mem_buffer *rxb,
879 struct ieee80211_rx_status *stats) 979 struct ieee80211_rx_status *stats)
880{ 980{
981 struct sk_buff *skb;
982 int ret = 0;
983 __le16 fc = hdr->frame_control;
984
881 /* We only process data packets if the interface is open */ 985 /* We only process data packets if the interface is open */
882 if (unlikely(!priv->is_open)) { 986 if (unlikely(!priv->is_open)) {
883 IWL_DEBUG_DROP_LIMIT(priv, 987 IWL_DEBUG_DROP_LIMIT(priv,
@@ -890,15 +994,47 @@ static void iwl_pass_packet_to_mac80211(struct iwl_priv *priv,
890 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats)) 994 iwl_set_decrypted_flag(priv, hdr, ampdu_status, stats))
891 return; 995 return;
892 996
893 /* Resize SKB from mac header to end of packet */ 997 skb = alloc_skb(IWL_LINK_HDR_MAX * 2, GFP_ATOMIC);
894 skb_reserve(rxb->skb, (void *)hdr - (void *)rxb->skb->data); 998 if (!skb) {
895 skb_put(rxb->skb, len); 999 IWL_ERR(priv, "alloc_skb failed\n");
1000 return;
1001 }
1002
1003 skb_reserve(skb, IWL_LINK_HDR_MAX);
1004 skb_add_rx_frag(skb, 0, rxb->page, (void *)hdr - rxb_addr(rxb), len);
1005
1006 /* mac80211 currently doesn't support paged SKB. Convert it to
1007 * linear SKB for management frame and data frame requires
1008 * software decryption or software defragementation. */
1009 if (ieee80211_is_mgmt(fc) ||
1010 ieee80211_has_protected(fc) ||
1011 ieee80211_has_morefrags(fc) ||
1012 le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG ||
1013 (ieee80211_is_data_qos(fc) &&
1014 *ieee80211_get_qos_ctl(hdr) &
1015 IEEE80211_QOS_CONTROL_A_MSDU_PRESENT))
1016 ret = skb_linearize(skb);
1017 else
1018 ret = __pskb_pull_tail(skb, min_t(u16, IWL_LINK_HDR_MAX, len)) ?
1019 0 : -ENOMEM;
1020
1021 if (ret) {
1022 kfree_skb(skb);
1023 goto out;
1024 }
896 1025
897 iwl_update_stats(priv, false, hdr->frame_control, len); 1026 /*
898 memcpy(IEEE80211_SKB_RXCB(rxb->skb), stats, sizeof(*stats)); 1027 * XXX: We cannot touch the page and its virtual memory (hdr) after
899 ieee80211_rx_irqsafe(priv->hw, rxb->skb); 1028 * here. It might have already been freed by the above skb change.
900 priv->alloc_rxb_skb--; 1029 */
901 rxb->skb = NULL; 1030
1031 iwl_update_stats(priv, false, fc, len);
1032 memcpy(IEEE80211_SKB_RXCB(skb), stats, sizeof(*stats));
1033
1034 ieee80211_rx(priv->hw, skb);
1035 out:
1036 priv->alloc_rxb_page--;
1037 rxb->page = NULL;
902} 1038}
903 1039
904/* This is necessary only for a number of statistics, see the caller. */ 1040/* This is necessary only for a number of statistics, see the caller. */
@@ -926,13 +1062,12 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
926{ 1062{
927 struct ieee80211_hdr *header; 1063 struct ieee80211_hdr *header;
928 struct ieee80211_rx_status rx_status; 1064 struct ieee80211_rx_status rx_status;
929 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1065 struct iwl_rx_packet *pkt = rxb_addr(rxb);
930 struct iwl_rx_phy_res *phy_res; 1066 struct iwl_rx_phy_res *phy_res;
931 __le32 rx_pkt_status; 1067 __le32 rx_pkt_status;
932 struct iwl4965_rx_mpdu_res_start *amsdu; 1068 struct iwl4965_rx_mpdu_res_start *amsdu;
933 u32 len; 1069 u32 len;
934 u32 ampdu_status; 1070 u32 ampdu_status;
935 u16 fc;
936 u32 rate_n_flags; 1071 u32 rate_n_flags;
937 1072
938 /** 1073 /**
@@ -1009,11 +1144,8 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1009 if (iwl_is_associated(priv) && 1144 if (iwl_is_associated(priv) &&
1010 !test_bit(STATUS_SCANNING, &priv->status)) { 1145 !test_bit(STATUS_SCANNING, &priv->status)) {
1011 rx_status.noise = priv->last_rx_noise; 1146 rx_status.noise = priv->last_rx_noise;
1012 rx_status.qual = iwl_calc_sig_qual(rx_status.signal,
1013 rx_status.noise);
1014 } else { 1147 } else {
1015 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE; 1148 rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
1016 rx_status.qual = iwl_calc_sig_qual(rx_status.signal, 0);
1017 } 1149 }
1018 1150
1019 /* Reset beacon noise level if not associated. */ 1151 /* Reset beacon noise level if not associated. */
@@ -1026,8 +1158,8 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1026 iwl_dbg_report_frame(priv, phy_res, len, header, 1); 1158 iwl_dbg_report_frame(priv, phy_res, len, header, 1);
1027#endif 1159#endif
1028 iwl_dbg_log_rx_data_frame(priv, len, header); 1160 iwl_dbg_log_rx_data_frame(priv, len, header);
1029 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, qual %d, TSF %llu\n", 1161 IWL_DEBUG_STATS_LIMIT(priv, "Rssi %d, noise %d, TSF %llu\n",
1030 rx_status.signal, rx_status.noise, rx_status.qual, 1162 rx_status.signal, rx_status.noise,
1031 (unsigned long long)rx_status.mactime); 1163 (unsigned long long)rx_status.mactime);
1032 1164
1033 /* 1165 /*
@@ -1065,20 +1197,8 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1065 priv->last_tsf = le64_to_cpu(phy_res->timestamp); 1197 priv->last_tsf = le64_to_cpu(phy_res->timestamp);
1066 } 1198 }
1067 1199
1068 fc = le16_to_cpu(header->frame_control); 1200 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1069 switch (fc & IEEE80211_FCTL_FTYPE) { 1201 rxb, &rx_status);
1070 case IEEE80211_FTYPE_MGMT:
1071 case IEEE80211_FTYPE_DATA:
1072 if (priv->iw_mode == NL80211_IFTYPE_AP)
1073 iwl_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
1074 header->addr2);
1075 /* fall through */
1076 default:
1077 iwl_pass_packet_to_mac80211(priv, header, len, ampdu_status,
1078 rxb, &rx_status);
1079 break;
1080
1081 }
1082} 1202}
1083EXPORT_SYMBOL(iwl_rx_reply_rx); 1203EXPORT_SYMBOL(iwl_rx_reply_rx);
1084 1204
@@ -1087,7 +1207,7 @@ EXPORT_SYMBOL(iwl_rx_reply_rx);
1087void iwl_rx_reply_rx_phy(struct iwl_priv *priv, 1207void iwl_rx_reply_rx_phy(struct iwl_priv *priv,
1088 struct iwl_rx_mem_buffer *rxb) 1208 struct iwl_rx_mem_buffer *rxb)
1089{ 1209{
1090 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1210 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1091 priv->last_phy_res[0] = 1; 1211 priv->last_phy_res[0] = 1;
1092 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]), 1212 memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
1093 sizeof(struct iwl_rx_phy_res)); 1213 sizeof(struct iwl_rx_phy_res));
diff --git a/drivers/net/wireless/iwlwifi/iwl-scan.c b/drivers/net/wireless/iwlwifi/iwl-scan.c
index 4f3a108fa990..741e65ec8301 100644
--- a/drivers/net/wireless/iwlwifi/iwl-scan.c
+++ b/drivers/net/wireless/iwlwifi/iwl-scan.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * GPL LICENSE SUMMARY 3 * GPL LICENSE SUMMARY
4 * 4 *
5 * Copyright(c) 2008 - 2009 Intel Corporation. All rights reserved. 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as 8 * it under the terms of version 2 of the GNU General Public License as
@@ -25,9 +25,9 @@
25 * Intel Linux Wireless <ilw@linux.intel.com> 25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/ 27 *****************************************************************************/
28#include <linux/slab.h>
28#include <linux/types.h> 29#include <linux/types.h>
29#include <linux/etherdevice.h> 30#include <linux/etherdevice.h>
30#include <net/lib80211.h>
31#include <net/mac80211.h> 31#include <net/mac80211.h>
32 32
33#include "iwl-eeprom.h" 33#include "iwl-eeprom.h"
@@ -112,7 +112,7 @@ EXPORT_SYMBOL(iwl_scan_cancel_timeout);
112static int iwl_send_scan_abort(struct iwl_priv *priv) 112static int iwl_send_scan_abort(struct iwl_priv *priv)
113{ 113{
114 int ret = 0; 114 int ret = 0;
115 struct iwl_rx_packet *res; 115 struct iwl_rx_packet *pkt;
116 struct iwl_host_cmd cmd = { 116 struct iwl_host_cmd cmd = {
117 .id = REPLY_SCAN_ABORT_CMD, 117 .id = REPLY_SCAN_ABORT_CMD,
118 .flags = CMD_WANT_SKB, 118 .flags = CMD_WANT_SKB,
@@ -132,21 +132,20 @@ static int iwl_send_scan_abort(struct iwl_priv *priv)
132 return ret; 132 return ret;
133 } 133 }
134 134
135 res = (struct iwl_rx_packet *)cmd.reply_skb->data; 135 pkt = (struct iwl_rx_packet *)cmd.reply_page;
136 if (res->u.status != CAN_ABORT_STATUS) { 136 if (pkt->u.status != CAN_ABORT_STATUS) {
137 /* The scan abort will return 1 for success or 137 /* The scan abort will return 1 for success or
138 * 2 for "failure". A failure condition can be 138 * 2 for "failure". A failure condition can be
139 * due to simply not being in an active scan which 139 * due to simply not being in an active scan which
140 * can occur if we send the scan abort before we 140 * can occur if we send the scan abort before we
141 * the microcode has notified us that a scan is 141 * the microcode has notified us that a scan is
142 * completed. */ 142 * completed. */
143 IWL_DEBUG_INFO(priv, "SCAN_ABORT returned %d.\n", res->u.status); 143 IWL_DEBUG_INFO(priv, "SCAN_ABORT returned %d.\n", pkt->u.status);
144 clear_bit(STATUS_SCAN_ABORTING, &priv->status); 144 clear_bit(STATUS_SCAN_ABORTING, &priv->status);
145 clear_bit(STATUS_SCAN_HW, &priv->status); 145 clear_bit(STATUS_SCAN_HW, &priv->status);
146 } 146 }
147 147
148 priv->alloc_rxb_skb--; 148 iwl_free_pages(priv, cmd.reply_page);
149 dev_kfree_skb_any(cmd.reply_skb);
150 149
151 return ret; 150 return ret;
152} 151}
@@ -156,7 +155,7 @@ static void iwl_rx_reply_scan(struct iwl_priv *priv,
156 struct iwl_rx_mem_buffer *rxb) 155 struct iwl_rx_mem_buffer *rxb)
157{ 156{
158#ifdef CONFIG_IWLWIFI_DEBUG 157#ifdef CONFIG_IWLWIFI_DEBUG
159 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 158 struct iwl_rx_packet *pkt = rxb_addr(rxb);
160 struct iwl_scanreq_notification *notif = 159 struct iwl_scanreq_notification *notif =
161 (struct iwl_scanreq_notification *)pkt->u.raw; 160 (struct iwl_scanreq_notification *)pkt->u.raw;
162 161
@@ -168,7 +167,7 @@ static void iwl_rx_reply_scan(struct iwl_priv *priv,
168static void iwl_rx_scan_start_notif(struct iwl_priv *priv, 167static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
169 struct iwl_rx_mem_buffer *rxb) 168 struct iwl_rx_mem_buffer *rxb)
170{ 169{
171 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 170 struct iwl_rx_packet *pkt = rxb_addr(rxb);
172 struct iwl_scanstart_notification *notif = 171 struct iwl_scanstart_notification *notif =
173 (struct iwl_scanstart_notification *)pkt->u.raw; 172 (struct iwl_scanstart_notification *)pkt->u.raw;
174 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low); 173 priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
@@ -187,26 +186,24 @@ static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
187 struct iwl_rx_mem_buffer *rxb) 186 struct iwl_rx_mem_buffer *rxb)
188{ 187{
189#ifdef CONFIG_IWLWIFI_DEBUG 188#ifdef CONFIG_IWLWIFI_DEBUG
190 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 189 struct iwl_rx_packet *pkt = rxb_addr(rxb);
191 struct iwl_scanresults_notification *notif = 190 struct iwl_scanresults_notification *notif =
192 (struct iwl_scanresults_notification *)pkt->u.raw; 191 (struct iwl_scanresults_notification *)pkt->u.raw;
193 192
194 IWL_DEBUG_SCAN(priv, "Scan ch.res: " 193 IWL_DEBUG_SCAN(priv, "Scan ch.res: "
195 "%d [802.11%s] " 194 "%d [802.11%s] "
196 "(TSF: 0x%08X:%08X) - %d " 195 "(TSF: 0x%08X:%08X) - %d "
197 "elapsed=%lu usec (%dms since last)\n", 196 "elapsed=%lu usec\n",
198 notif->channel, 197 notif->channel,
199 notif->band ? "bg" : "a", 198 notif->band ? "bg" : "a",
200 le32_to_cpu(notif->tsf_high), 199 le32_to_cpu(notif->tsf_high),
201 le32_to_cpu(notif->tsf_low), 200 le32_to_cpu(notif->tsf_low),
202 le32_to_cpu(notif->statistics[0]), 201 le32_to_cpu(notif->statistics[0]),
203 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf, 202 le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf);
204 jiffies_to_msecs(elapsed_jiffies
205 (priv->last_scan_jiffies, jiffies)));
206#endif 203#endif
207 204
208 priv->last_scan_jiffies = jiffies; 205 if (!priv->is_internal_short_scan)
209 priv->next_scan_jiffies = 0; 206 priv->next_scan_jiffies = 0;
210} 207}
211 208
212/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */ 209/* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
@@ -214,7 +211,7 @@ static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
214 struct iwl_rx_mem_buffer *rxb) 211 struct iwl_rx_mem_buffer *rxb)
215{ 212{
216#ifdef CONFIG_IWLWIFI_DEBUG 213#ifdef CONFIG_IWLWIFI_DEBUG
217 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 214 struct iwl_rx_packet *pkt = rxb_addr(rxb);
218 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw; 215 struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
219 216
220 IWL_DEBUG_SCAN(priv, "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n", 217 IWL_DEBUG_SCAN(priv, "Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
@@ -252,8 +249,9 @@ static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
252 goto reschedule; 249 goto reschedule;
253 } 250 }
254 251
255 priv->last_scan_jiffies = jiffies; 252 if (!priv->is_internal_short_scan)
256 priv->next_scan_jiffies = 0; 253 priv->next_scan_jiffies = 0;
254
257 IWL_DEBUG_INFO(priv, "Setting scan to off\n"); 255 IWL_DEBUG_INFO(priv, "Setting scan to off\n");
258 256
259 clear_bit(STATUS_SCANNING, &priv->status); 257 clear_bit(STATUS_SCANNING, &priv->status);
@@ -316,6 +314,72 @@ u16 iwl_get_passive_dwell_time(struct iwl_priv *priv,
316} 314}
317EXPORT_SYMBOL(iwl_get_passive_dwell_time); 315EXPORT_SYMBOL(iwl_get_passive_dwell_time);
318 316
317static int iwl_get_single_channel_for_scan(struct iwl_priv *priv,
318 enum ieee80211_band band,
319 struct iwl_scan_channel *scan_ch)
320{
321 const struct ieee80211_supported_band *sband;
322 const struct iwl_channel_info *ch_info;
323 u16 passive_dwell = 0;
324 u16 active_dwell = 0;
325 int i, added = 0;
326 u16 channel = 0;
327
328 sband = iwl_get_hw_mode(priv, band);
329 if (!sband) {
330 IWL_ERR(priv, "invalid band\n");
331 return added;
332 }
333
334 active_dwell = iwl_get_active_dwell_time(priv, band, 0);
335 passive_dwell = iwl_get_passive_dwell_time(priv, band);
336
337 if (passive_dwell <= active_dwell)
338 passive_dwell = active_dwell + 1;
339
340 /* only scan single channel, good enough to reset the RF */
341 /* pick the first valid not in-use channel */
342 if (band == IEEE80211_BAND_5GHZ) {
343 for (i = 14; i < priv->channel_count; i++) {
344 if (priv->channel_info[i].channel !=
345 le16_to_cpu(priv->staging_rxon.channel)) {
346 channel = priv->channel_info[i].channel;
347 ch_info = iwl_get_channel_info(priv,
348 band, channel);
349 if (is_channel_valid(ch_info))
350 break;
351 }
352 }
353 } else {
354 for (i = 0; i < 14; i++) {
355 if (priv->channel_info[i].channel !=
356 le16_to_cpu(priv->staging_rxon.channel)) {
357 channel =
358 priv->channel_info[i].channel;
359 ch_info = iwl_get_channel_info(priv,
360 band, channel);
361 if (is_channel_valid(ch_info))
362 break;
363 }
364 }
365 }
366 if (channel) {
367 scan_ch->channel = cpu_to_le16(channel);
368 scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
369 scan_ch->active_dwell = cpu_to_le16(active_dwell);
370 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
371 /* Set txpower levels to defaults */
372 scan_ch->dsp_atten = 110;
373 if (band == IEEE80211_BAND_5GHZ)
374 scan_ch->tx_gain = ((1 << 5) | (3 << 3)) | 3;
375 else
376 scan_ch->tx_gain = ((1 << 5) | (5 << 3));
377 added++;
378 } else
379 IWL_ERR(priv, "no valid channel found\n");
380 return added;
381}
382
319static int iwl_get_channels_for_scan(struct iwl_priv *priv, 383static int iwl_get_channels_for_scan(struct iwl_priv *priv,
320 enum ieee80211_band band, 384 enum ieee80211_band band,
321 u8 is_active, u8 n_probes, 385 u8 is_active, u8 n_probes,
@@ -402,26 +466,15 @@ void iwl_init_scan_params(struct iwl_priv *priv)
402 if (!priv->scan_tx_ant[IEEE80211_BAND_2GHZ]) 466 if (!priv->scan_tx_ant[IEEE80211_BAND_2GHZ])
403 priv->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx; 467 priv->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
404} 468}
469EXPORT_SYMBOL(iwl_init_scan_params);
405 470
406static int iwl_scan_initiate(struct iwl_priv *priv) 471static int iwl_scan_initiate(struct iwl_priv *priv)
407{ 472{
408 if (!iwl_is_ready_rf(priv)) { 473 WARN_ON(!mutex_is_locked(&priv->mutex));
409 IWL_DEBUG_SCAN(priv, "Aborting scan due to not ready.\n");
410 return -EIO;
411 }
412
413 if (test_bit(STATUS_SCANNING, &priv->status)) {
414 IWL_DEBUG_SCAN(priv, "Scan already in progress.\n");
415 return -EAGAIN;
416 }
417
418 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
419 IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n");
420 return -EAGAIN;
421 }
422 474
423 IWL_DEBUG_INFO(priv, "Starting scan...\n"); 475 IWL_DEBUG_INFO(priv, "Starting scan...\n");
424 set_bit(STATUS_SCANNING, &priv->status); 476 set_bit(STATUS_SCANNING, &priv->status);
477 priv->is_internal_short_scan = false;
425 priv->scan_start = jiffies; 478 priv->scan_start = jiffies;
426 priv->scan_pass_start = priv->scan_start; 479 priv->scan_pass_start = priv->scan_start;
427 480
@@ -450,6 +503,18 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw,
450 goto out_unlock; 503 goto out_unlock;
451 } 504 }
452 505
506 if (test_bit(STATUS_SCANNING, &priv->status)) {
507 IWL_DEBUG_SCAN(priv, "Scan already in progress.\n");
508 ret = -EAGAIN;
509 goto out_unlock;
510 }
511
512 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
513 IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n");
514 ret = -EAGAIN;
515 goto out_unlock;
516 }
517
453 /* We don't schedule scan within next_scan_jiffies period. 518 /* We don't schedule scan within next_scan_jiffies period.
454 * Avoid scanning during possible EAPOL exchange, return 519 * Avoid scanning during possible EAPOL exchange, return
455 * success immediately. 520 * success immediately.
@@ -462,15 +527,6 @@ int iwl_mac_hw_scan(struct ieee80211_hw *hw,
462 goto out_unlock; 527 goto out_unlock;
463 } 528 }
464 529
465 /* if we just finished scan ask for delay */
466 if (iwl_is_associated(priv) && priv->last_scan_jiffies &&
467 time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN, jiffies)) {
468 IWL_DEBUG_SCAN(priv, "scan rejected: within previous scan period\n");
469 queue_work(priv->workqueue, &priv->scan_completed);
470 ret = 0;
471 goto out_unlock;
472 }
473
474 priv->scan_bands = 0; 530 priv->scan_bands = 0;
475 for (i = 0; i < req->n_channels; i++) 531 for (i = 0; i < req->n_channels; i++)
476 priv->scan_bands |= BIT(req->channels[i]->band); 532 priv->scan_bands |= BIT(req->channels[i]->band);
@@ -489,6 +545,52 @@ out_unlock:
489} 545}
490EXPORT_SYMBOL(iwl_mac_hw_scan); 546EXPORT_SYMBOL(iwl_mac_hw_scan);
491 547
548/*
549 * internal short scan, this function should only been called while associated.
550 * It will reset and tune the radio to prevent possible RF related problem
551 */
552void iwl_internal_short_hw_scan(struct iwl_priv *priv)
553{
554 queue_work(priv->workqueue, &priv->start_internal_scan);
555}
556
557static void iwl_bg_start_internal_scan(struct work_struct *work)
558{
559 struct iwl_priv *priv =
560 container_of(work, struct iwl_priv, start_internal_scan);
561
562 mutex_lock(&priv->mutex);
563
564 if (!iwl_is_ready_rf(priv)) {
565 IWL_DEBUG_SCAN(priv, "not ready or exit pending\n");
566 goto unlock;
567 }
568
569 if (test_bit(STATUS_SCANNING, &priv->status)) {
570 IWL_DEBUG_SCAN(priv, "Scan already in progress.\n");
571 goto unlock;
572 }
573
574 if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
575 IWL_DEBUG_SCAN(priv, "Scan request while abort pending\n");
576 goto unlock;
577 }
578
579 priv->scan_bands = 0;
580 if (priv->band == IEEE80211_BAND_5GHZ)
581 priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
582 else
583 priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
584
585 IWL_DEBUG_SCAN(priv, "Start internal short scan...\n");
586 set_bit(STATUS_SCANNING, &priv->status);
587 priv->is_internal_short_scan = true;
588 queue_work(priv->workqueue, &priv->request_scan);
589 unlock:
590 mutex_unlock(&priv->mutex);
591}
592EXPORT_SYMBOL(iwl_internal_short_hw_scan);
593
492#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ) 594#define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
493 595
494void iwl_bg_scan_check(struct work_struct *data) 596void iwl_bg_scan_check(struct work_struct *data)
@@ -552,7 +654,8 @@ u16 iwl_fill_probe_req(struct iwl_priv *priv, struct ieee80211_mgmt *frame,
552 if (WARN_ON(left < ie_len)) 654 if (WARN_ON(left < ie_len))
553 return len; 655 return len;
554 656
555 memcpy(pos, ies, ie_len); 657 if (ies)
658 memcpy(pos, ies, ie_len);
556 len += ie_len; 659 len += ie_len;
557 left -= ie_len; 660 left -= ie_len;
558 661
@@ -581,6 +684,7 @@ static void iwl_bg_request_scan(struct work_struct *data)
581 u8 rate; 684 u8 rate;
582 bool is_active = false; 685 bool is_active = false;
583 int chan_mod; 686 int chan_mod;
687 u8 active_chains;
584 688
585 conf = ieee80211_get_hw_conf(priv->hw); 689 conf = ieee80211_get_hw_conf(priv->hw);
586 690
@@ -654,7 +758,6 @@ static void iwl_bg_request_scan(struct work_struct *data)
654 unsigned long flags; 758 unsigned long flags;
655 759
656 IWL_DEBUG_INFO(priv, "Scanning while associated...\n"); 760 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
657
658 spin_lock_irqsave(&priv->lock, flags); 761 spin_lock_irqsave(&priv->lock, flags);
659 interval = priv->beacon_int; 762 interval = priv->beacon_int;
660 spin_unlock_irqrestore(&priv->lock, flags); 763 spin_unlock_irqrestore(&priv->lock, flags);
@@ -672,7 +775,9 @@ static void iwl_bg_request_scan(struct work_struct *data)
672 scan_suspend_time, interval); 775 scan_suspend_time, interval);
673 } 776 }
674 777
675 if (priv->scan_request->n_ssids) { 778 if (priv->is_internal_short_scan) {
779 IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
780 } else if (priv->scan_request->n_ssids) {
676 int i, p = 0; 781 int i, p = 0;
677 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n"); 782 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
678 for (i = 0; i < priv->scan_request->n_ssids; i++) { 783 for (i = 0; i < priv->scan_request->n_ssids; i++) {
@@ -708,16 +813,29 @@ static void iwl_bg_request_scan(struct work_struct *data)
708 rate = IWL_RATE_1M_PLCP; 813 rate = IWL_RATE_1M_PLCP;
709 rate_flags = RATE_MCS_CCK_MSK; 814 rate_flags = RATE_MCS_CCK_MSK;
710 } 815 }
711 scan->good_CRC_th = 0; 816 scan->good_CRC_th = IWL_GOOD_CRC_TH_DISABLED;
712 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) { 817 } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
713 band = IEEE80211_BAND_5GHZ; 818 band = IEEE80211_BAND_5GHZ;
714 rate = IWL_RATE_6M_PLCP; 819 rate = IWL_RATE_6M_PLCP;
715 /* 820 /*
716 * If active scaning is requested but a certain channel 821 * If active scanning is requested but a certain channel is
717 * is marked passive, we can do active scanning if we 822 * marked passive, we can do active scanning if we detect
718 * detect transmissions. 823 * transmissions.
824 *
825 * There is an issue with some firmware versions that triggers
826 * a sysassert on a "good CRC threshold" of zero (== disabled),
827 * on a radar channel even though this means that we should NOT
828 * send probes.
829 *
830 * The "good CRC threshold" is the number of frames that we
831 * need to receive during our dwell time on a channel before
832 * sending out probes -- setting this to a huge value will
833 * mean we never reach it, but at the same time work around
834 * the aforementioned issue. Thus use IWL_GOOD_CRC_TH_NEVER
835 * here instead of IWL_GOOD_CRC_TH_DISABLED.
719 */ 836 */
720 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0; 837 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
838 IWL_GOOD_CRC_TH_NEVER;
721 839
722 /* Force use of chains B and C (0x6) for scan Rx for 4965 840 /* Force use of chains B and C (0x6) for scan Rx for 4965
723 * Avoid A (0x1) because of its off-channel reception on A-band. 841 * Avoid A (0x1) because of its off-channel reception on A-band.
@@ -734,30 +852,57 @@ static void iwl_bg_request_scan(struct work_struct *data)
734 rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]); 852 rate_flags |= iwl_ant_idx_to_flags(priv->scan_tx_ant[band]);
735 scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags); 853 scan->tx_cmd.rate_n_flags = iwl_hw_set_rate_n_flags(rate, rate_flags);
736 854
855 /* In power save mode use one chain, otherwise use all chains */
856 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
857 /* rx_ant has been set to all valid chains previously */
858 active_chains = rx_ant &
859 ((u8)(priv->chain_noise_data.active_chains));
860 if (!active_chains)
861 active_chains = rx_ant;
862
863 IWL_DEBUG_SCAN(priv, "chain_noise_data.active_chains: %u\n",
864 priv->chain_noise_data.active_chains);
865
866 rx_ant = first_antenna(active_chains);
867 }
737 /* MIMO is not used here, but value is required */ 868 /* MIMO is not used here, but value is required */
738 rx_chain |= ANT_ABC << RXON_RX_CHAIN_VALID_POS; 869 rx_chain |= priv->hw_params.valid_rx_ant << RXON_RX_CHAIN_VALID_POS;
739 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS; 870 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
740 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS; 871 rx_chain |= rx_ant << RXON_RX_CHAIN_FORCE_SEL_POS;
741 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS; 872 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
742 scan->rx_chain = cpu_to_le16(rx_chain); 873 scan->rx_chain = cpu_to_le16(rx_chain);
743 cmd_len = iwl_fill_probe_req(priv, 874 if (!priv->is_internal_short_scan) {
744 (struct ieee80211_mgmt *)scan->data, 875 cmd_len = iwl_fill_probe_req(priv,
745 priv->scan_request->ie, 876 (struct ieee80211_mgmt *)scan->data,
746 priv->scan_request->ie_len, 877 priv->scan_request->ie,
747 IWL_MAX_SCAN_SIZE - sizeof(*scan)); 878 priv->scan_request->ie_len,
879 IWL_MAX_SCAN_SIZE - sizeof(*scan));
880 } else {
881 cmd_len = iwl_fill_probe_req(priv,
882 (struct ieee80211_mgmt *)scan->data,
883 NULL, 0,
884 IWL_MAX_SCAN_SIZE - sizeof(*scan));
748 885
886 }
749 scan->tx_cmd.len = cpu_to_le16(cmd_len); 887 scan->tx_cmd.len = cpu_to_le16(cmd_len);
750
751 if (iwl_is_monitor_mode(priv)) 888 if (iwl_is_monitor_mode(priv))
752 scan->filter_flags = RXON_FILTER_PROMISC_MSK; 889 scan->filter_flags = RXON_FILTER_PROMISC_MSK;
753 890
754 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK | 891 scan->filter_flags |= (RXON_FILTER_ACCEPT_GRP_MSK |
755 RXON_FILTER_BCON_AWARE_MSK); 892 RXON_FILTER_BCON_AWARE_MSK);
756 893
757 scan->channel_count = 894 if (priv->is_internal_short_scan) {
758 iwl_get_channels_for_scan(priv, band, is_active, n_probes, 895 scan->channel_count =
759 (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]); 896 iwl_get_single_channel_for_scan(priv, band,
760 897 (void *)&scan->data[le16_to_cpu(
898 scan->tx_cmd.len)]);
899 } else {
900 scan->channel_count =
901 iwl_get_channels_for_scan(priv, band,
902 is_active, n_probes,
903 (void *)&scan->data[le16_to_cpu(
904 scan->tx_cmd.len)]);
905 }
761 if (scan->channel_count == 0) { 906 if (scan->channel_count == 0) {
762 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count); 907 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
763 goto done; 908 goto done;
@@ -818,7 +963,12 @@ void iwl_bg_scan_completed(struct work_struct *work)
818 963
819 cancel_delayed_work(&priv->scan_check); 964 cancel_delayed_work(&priv->scan_check);
820 965
821 ieee80211_scan_completed(priv->hw, false); 966 if (!priv->is_internal_short_scan)
967 ieee80211_scan_completed(priv->hw, false);
968 else {
969 priv->is_internal_short_scan = false;
970 IWL_DEBUG_SCAN(priv, "internal short scan completed\n");
971 }
822 972
823 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 973 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
824 return; 974 return;
@@ -836,6 +986,7 @@ void iwl_setup_scan_deferred_work(struct iwl_priv *priv)
836 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); 986 INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
837 INIT_WORK(&priv->request_scan, iwl_bg_request_scan); 987 INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
838 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan); 988 INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
989 INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
839 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check); 990 INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
840} 991}
841EXPORT_SYMBOL(iwl_setup_scan_deferred_work); 992EXPORT_SYMBOL(iwl_setup_scan_deferred_work);
diff --git a/drivers/net/wireless/iwlwifi/iwl-spectrum.c b/drivers/net/wireless/iwlwifi/iwl-spectrum.c
deleted file mode 100644
index 022bcf115731..000000000000
--- a/drivers/net/wireless/iwlwifi/iwl-spectrum.c
+++ /dev/null
@@ -1,198 +0,0 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/pci.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <linux/netdevice.h>
37#include <linux/wireless.h>
38
39#include <net/mac80211.h>
40
41#include "iwl-eeprom.h"
42#include "iwl-dev.h"
43#include "iwl-core.h"
44#include "iwl-io.h"
45#include "iwl-spectrum.h"
46
47#define BEACON_TIME_MASK_LOW 0x00FFFFFF
48#define BEACON_TIME_MASK_HIGH 0xFF000000
49#define TIME_UNIT 1024
50
51/*
52 * extended beacon time format
53 * time in usec will be changed into a 32-bit value in 8:24 format
54 * the high 1 byte is the beacon counts
55 * the lower 3 bytes is the time in usec within one beacon interval
56 */
57
58/* TOOD: was used in sysfs debug interface need to add to mac */
59#if 0
60static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
61{
62 u32 quot;
63 u32 rem;
64 u32 interval = beacon_interval * 1024;
65
66 if (!interval || !usec)
67 return 0;
68
69 quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
70 rem = (usec % interval) & BEACON_TIME_MASK_LOW;
71
72 return (quot << 24) + rem;
73}
74
75/* base is usually what we get from ucode with each received frame,
76 * the same as HW timer counter counting down
77 */
78
79static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
80{
81 u32 base_low = base & BEACON_TIME_MASK_LOW;
82 u32 addon_low = addon & BEACON_TIME_MASK_LOW;
83 u32 interval = beacon_interval * TIME_UNIT;
84 u32 res = (base & BEACON_TIME_MASK_HIGH) +
85 (addon & BEACON_TIME_MASK_HIGH);
86
87 if (base_low > addon_low)
88 res += base_low - addon_low;
89 else if (base_low < addon_low) {
90 res += interval + base_low - addon_low;
91 res += (1 << 24);
92 } else
93 res += (1 << 24);
94
95 return cpu_to_le32(res);
96}
97static int iwl_get_measurement(struct iwl_priv *priv,
98 struct ieee80211_measurement_params *params,
99 u8 type)
100{
101 struct iwl4965_spectrum_cmd spectrum;
102 struct iwl_rx_packet *res;
103 struct iwl_host_cmd cmd = {
104 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
105 .data = (void *)&spectrum,
106 .meta.flags = CMD_WANT_SKB,
107 };
108 u32 add_time = le64_to_cpu(params->start_time);
109 int rc;
110 int spectrum_resp_status;
111 int duration = le16_to_cpu(params->duration);
112
113 if (iwl_is_associated(priv))
114 add_time =
115 iwl_usecs_to_beacons(
116 le64_to_cpu(params->start_time) - priv->last_tsf,
117 le16_to_cpu(priv->rxon_timing.beacon_interval));
118
119 memset(&spectrum, 0, sizeof(spectrum));
120
121 spectrum.channel_count = cpu_to_le16(1);
122 spectrum.flags =
123 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
124 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
125 cmd.len = sizeof(spectrum);
126 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
127
128 if (iwl_is_associated(priv))
129 spectrum.start_time =
130 iwl_add_beacon_time(priv->last_beacon_time,
131 add_time,
132 le16_to_cpu(priv->rxon_timing.beacon_interval));
133 else
134 spectrum.start_time = 0;
135
136 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
137 spectrum.channels[0].channel = params->channel;
138 spectrum.channels[0].type = type;
139 if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
140 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
141 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
142
143 rc = iwl_send_cmd_sync(priv, &cmd);
144 if (rc)
145 return rc;
146
147 res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
148 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
149 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
150 rc = -EIO;
151 }
152
153 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
154 switch (spectrum_resp_status) {
155 case 0: /* Command will be handled */
156 if (res->u.spectrum.id != 0xff) {
157 IWL_DEBUG_INFO(priv,
158 "Replaced existing measurement: %d\n",
159 res->u.spectrum.id);
160 priv->measurement_status &= ~MEASUREMENT_READY;
161 }
162 priv->measurement_status |= MEASUREMENT_ACTIVE;
163 rc = 0;
164 break;
165
166 case 1: /* Command will not be handled */
167 rc = -EAGAIN;
168 break;
169 }
170
171 dev_kfree_skb_any(cmd.meta.u.skb);
172
173 return rc;
174}
175#endif
176
177static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
178 struct iwl_rx_mem_buffer *rxb)
179{
180 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
181 struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
182
183 if (!report->state) {
184 IWL_DEBUG_11H(priv,
185 "Spectrum Measure Notification: Start\n");
186 return;
187 }
188
189 memcpy(&priv->measure_report, report, sizeof(*report));
190 priv->measurement_status |= MEASUREMENT_READY;
191}
192
193void iwl_setup_spectrum_handlers(struct iwl_priv *priv)
194{
195 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
196 iwl_rx_spectrum_measure_notif;
197}
198EXPORT_SYMBOL(iwl_setup_spectrum_handlers);
diff --git a/drivers/net/wireless/iwlwifi/iwl-spectrum.h b/drivers/net/wireless/iwlwifi/iwl-spectrum.h
index a77c1e619062..af6babee2891 100644
--- a/drivers/net/wireless/iwlwifi/iwl-spectrum.h
+++ b/drivers/net/wireless/iwlwifi/iwl-spectrum.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ieee80211 subsystem header files. 5 * Portions of this file are derived from the ieee80211 subsystem header files.
6 * 6 *
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index c6633fec8216..4a6686fa6b36 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -80,59 +80,109 @@ int iwl_get_ra_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
80} 80}
81EXPORT_SYMBOL(iwl_get_ra_sta_id); 81EXPORT_SYMBOL(iwl_get_ra_sta_id);
82 82
83/* priv->sta_lock must be held */
83static void iwl_sta_ucode_activate(struct iwl_priv *priv, u8 sta_id) 84static void iwl_sta_ucode_activate(struct iwl_priv *priv, u8 sta_id)
84{ 85{
85 unsigned long flags;
86
87 spin_lock_irqsave(&priv->sta_lock, flags);
88 86
89 if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE)) 87 if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE))
90 IWL_ERR(priv, "ACTIVATE a non DRIVER active station %d\n", 88 IWL_ERR(priv, "ACTIVATE a non DRIVER active station id %u addr %pM\n",
91 sta_id); 89 sta_id, priv->stations[sta_id].sta.sta.addr);
92
93 priv->stations[sta_id].used |= IWL_STA_UCODE_ACTIVE;
94 IWL_DEBUG_ASSOC(priv, "Added STA to Ucode: %pM\n",
95 priv->stations[sta_id].sta.sta.addr);
96 90
97 spin_unlock_irqrestore(&priv->sta_lock, flags); 91 if (priv->stations[sta_id].used & IWL_STA_UCODE_ACTIVE) {
92 IWL_DEBUG_ASSOC(priv,
93 "STA id %u addr %pM already present in uCode (according to driver)\n",
94 sta_id, priv->stations[sta_id].sta.sta.addr);
95 } else {
96 priv->stations[sta_id].used |= IWL_STA_UCODE_ACTIVE;
97 IWL_DEBUG_ASSOC(priv, "Added STA id %u addr %pM to uCode\n",
98 sta_id, priv->stations[sta_id].sta.sta.addr);
99 }
98} 100}
99 101
100static void iwl_add_sta_callback(struct iwl_priv *priv, 102static void iwl_process_add_sta_resp(struct iwl_priv *priv,
101 struct iwl_device_cmd *cmd, 103 struct iwl_addsta_cmd *addsta,
102 struct sk_buff *skb) 104 struct iwl_rx_packet *pkt,
105 bool sync)
103{ 106{
104 struct iwl_rx_packet *res = NULL;
105 struct iwl_addsta_cmd *addsta =
106 (struct iwl_addsta_cmd *)cmd->cmd.payload;
107 u8 sta_id = addsta->sta.sta_id; 107 u8 sta_id = addsta->sta.sta_id;
108 unsigned long flags;
108 109
109 if (!skb) { 110 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
110 IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
111 return;
112 }
113
114 res = (struct iwl_rx_packet *)skb->data;
115 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
116 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n", 111 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
117 res->hdr.flags); 112 pkt->hdr.flags);
118 return; 113 return;
119 } 114 }
120 115
121 switch (res->u.add_sta.status) { 116 IWL_DEBUG_INFO(priv, "Processing response for adding station %u\n",
117 sta_id);
118
119 spin_lock_irqsave(&priv->sta_lock, flags);
120
121 switch (pkt->u.add_sta.status) {
122 case ADD_STA_SUCCESS_MSK: 122 case ADD_STA_SUCCESS_MSK:
123 IWL_DEBUG_INFO(priv, "REPLY_ADD_STA PASSED\n");
123 iwl_sta_ucode_activate(priv, sta_id); 124 iwl_sta_ucode_activate(priv, sta_id);
124 /* fall through */ 125 break;
126 case ADD_STA_NO_ROOM_IN_TABLE:
127 IWL_ERR(priv, "Adding station %d failed, no room in table.\n",
128 sta_id);
129 break;
130 case ADD_STA_NO_BLOCK_ACK_RESOURCE:
131 IWL_ERR(priv, "Adding station %d failed, no block ack resource.\n",
132 sta_id);
133 break;
134 case ADD_STA_MODIFY_NON_EXIST_STA:
135 IWL_ERR(priv, "Attempting to modify non-existing station %d \n",
136 sta_id);
137 break;
125 default: 138 default:
126 IWL_DEBUG_HC(priv, "Received REPLY_ADD_STA:(0x%08X)\n", 139 IWL_DEBUG_ASSOC(priv, "Received REPLY_ADD_STA:(0x%08X)\n",
127 res->u.add_sta.status); 140 pkt->u.add_sta.status);
128 break; 141 break;
129 } 142 }
143
144 IWL_DEBUG_INFO(priv, "%s station id %u addr %pM\n",
145 priv->stations[sta_id].sta.mode ==
146 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
147 sta_id, priv->stations[sta_id].sta.sta.addr);
148
149 /*
150 * XXX: The MAC address in the command buffer is often changed from
151 * the original sent to the device. That is, the MAC address
152 * written to the command buffer often is not the same MAC adress
153 * read from the command buffer when the command returns. This
154 * issue has not yet been resolved and this debugging is left to
155 * observe the problem.
156 */
157 IWL_DEBUG_INFO(priv, "%s station according to cmd buffer %pM\n",
158 priv->stations[sta_id].sta.mode ==
159 STA_CONTROL_MODIFY_MSK ? "Modified" : "Added",
160 addsta->sta.addr);
161
162 /*
163 * Determine if we wanted to modify or add a station,
164 * if adding a station succeeded we have some more initialization
165 * to do when using station notification. TODO
166 */
167
168 spin_unlock_irqrestore(&priv->sta_lock, flags);
169}
170
171static void iwl_add_sta_callback(struct iwl_priv *priv,
172 struct iwl_device_cmd *cmd,
173 struct iwl_rx_packet *pkt)
174{
175 struct iwl_addsta_cmd *addsta =
176 (struct iwl_addsta_cmd *)cmd->cmd.payload;
177
178 iwl_process_add_sta_resp(priv, addsta, pkt, false);
179
130} 180}
131 181
132int iwl_send_add_sta(struct iwl_priv *priv, 182int iwl_send_add_sta(struct iwl_priv *priv,
133 struct iwl_addsta_cmd *sta, u8 flags) 183 struct iwl_addsta_cmd *sta, u8 flags)
134{ 184{
135 struct iwl_rx_packet *res = NULL; 185 struct iwl_rx_packet *pkt = NULL;
136 int ret = 0; 186 int ret = 0;
137 u8 data[sizeof(*sta)]; 187 u8 data[sizeof(*sta)];
138 struct iwl_host_cmd cmd = { 188 struct iwl_host_cmd cmd = {
@@ -152,28 +202,11 @@ int iwl_send_add_sta(struct iwl_priv *priv,
152 if (ret || (flags & CMD_ASYNC)) 202 if (ret || (flags & CMD_ASYNC))
153 return ret; 203 return ret;
154 204
155 res = (struct iwl_rx_packet *)cmd.reply_skb->data;
156 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
157 IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
158 res->hdr.flags);
159 ret = -EIO;
160 }
161
162 if (ret == 0) { 205 if (ret == 0) {
163 switch (res->u.add_sta.status) { 206 pkt = (struct iwl_rx_packet *)cmd.reply_page;
164 case ADD_STA_SUCCESS_MSK: 207 iwl_process_add_sta_resp(priv, sta, pkt, true);
165 iwl_sta_ucode_activate(priv, sta->sta.sta_id);
166 IWL_DEBUG_INFO(priv, "REPLY_ADD_STA PASSED\n");
167 break;
168 default:
169 ret = -EIO;
170 IWL_WARN(priv, "REPLY_ADD_STA failed\n");
171 break;
172 }
173 } 208 }
174 209 iwl_free_pages(priv, cmd.reply_page);
175 priv->alloc_rxb_skb--;
176 dev_kfree_skb_any(cmd.reply_skb);
177 210
178 return ret; 211 return ret;
179} 212}
@@ -189,6 +222,11 @@ static void iwl_set_ht_add_station(struct iwl_priv *priv, u8 index,
189 goto done; 222 goto done;
190 223
191 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2; 224 mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
225 IWL_DEBUG_ASSOC(priv, "spatial multiplexing power save mode: %s\n",
226 (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ?
227 "static" :
228 (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ?
229 "dynamic" : "disabled");
192 230
193 sta_flags = priv->stations[index].sta.station_flags; 231 sta_flags = priv->stations[index].sta.station_flags;
194 232
@@ -301,7 +339,7 @@ u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap, u8 flags,
301} 339}
302EXPORT_SYMBOL(iwl_add_station); 340EXPORT_SYMBOL(iwl_add_station);
303 341
304static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const char *addr) 342static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const u8 *addr)
305{ 343{
306 unsigned long flags; 344 unsigned long flags;
307 u8 sta_id = iwl_find_station(priv, addr); 345 u8 sta_id = iwl_find_station(priv, addr);
@@ -324,26 +362,19 @@ static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, const char *addr)
324 362
325static void iwl_remove_sta_callback(struct iwl_priv *priv, 363static void iwl_remove_sta_callback(struct iwl_priv *priv,
326 struct iwl_device_cmd *cmd, 364 struct iwl_device_cmd *cmd,
327 struct sk_buff *skb) 365 struct iwl_rx_packet *pkt)
328{ 366{
329 struct iwl_rx_packet *res = NULL;
330 struct iwl_rem_sta_cmd *rm_sta = 367 struct iwl_rem_sta_cmd *rm_sta =
331 (struct iwl_rem_sta_cmd *)cmd->cmd.payload; 368 (struct iwl_rem_sta_cmd *)cmd->cmd.payload;
332 const char *addr = rm_sta->addr; 369 const u8 *addr = rm_sta->addr;
333
334 if (!skb) {
335 IWL_ERR(priv, "Error: Response NULL in REPLY_REMOVE_STA.\n");
336 return;
337 }
338 370
339 res = (struct iwl_rx_packet *)skb->data; 371 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
340 if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
341 IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n", 372 IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n",
342 res->hdr.flags); 373 pkt->hdr.flags);
343 return; 374 return;
344 } 375 }
345 376
346 switch (res->u.rem_sta.status) { 377 switch (pkt->u.rem_sta.status) {
347 case REM_STA_SUCCESS_MSK: 378 case REM_STA_SUCCESS_MSK:
348 iwl_sta_ucode_deactivate(priv, addr); 379 iwl_sta_ucode_deactivate(priv, addr);
349 break; 380 break;
@@ -356,7 +387,7 @@ static void iwl_remove_sta_callback(struct iwl_priv *priv,
356static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr, 387static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr,
357 u8 flags) 388 u8 flags)
358{ 389{
359 struct iwl_rx_packet *res = NULL; 390 struct iwl_rx_packet *pkt;
360 int ret; 391 int ret;
361 392
362 struct iwl_rem_sta_cmd rm_sta_cmd; 393 struct iwl_rem_sta_cmd rm_sta_cmd;
@@ -381,15 +412,15 @@ static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr,
381 if (ret || (flags & CMD_ASYNC)) 412 if (ret || (flags & CMD_ASYNC))
382 return ret; 413 return ret;
383 414
384 res = (struct iwl_rx_packet *)cmd.reply_skb->data; 415 pkt = (struct iwl_rx_packet *)cmd.reply_page;
385 if (res->hdr.flags & IWL_CMD_FAILED_MSK) { 416 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
386 IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n", 417 IWL_ERR(priv, "Bad return from REPLY_REMOVE_STA (0x%08X)\n",
387 res->hdr.flags); 418 pkt->hdr.flags);
388 ret = -EIO; 419 ret = -EIO;
389 } 420 }
390 421
391 if (!ret) { 422 if (!ret) {
392 switch (res->u.rem_sta.status) { 423 switch (pkt->u.rem_sta.status) {
393 case REM_STA_SUCCESS_MSK: 424 case REM_STA_SUCCESS_MSK:
394 iwl_sta_ucode_deactivate(priv, addr); 425 iwl_sta_ucode_deactivate(priv, addr);
395 IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n"); 426 IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n");
@@ -400,9 +431,7 @@ static int iwl_send_remove_station(struct iwl_priv *priv, const u8 *addr,
400 break; 431 break;
401 } 432 }
402 } 433 }
403 434 iwl_free_pages(priv, cmd.reply_page);
404 priv->alloc_rxb_skb--;
405 dev_kfree_skb_any(cmd.reply_skb);
406 435
407 return ret; 436 return ret;
408} 437}
@@ -1016,24 +1045,19 @@ int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap)
1016 struct ieee80211_sta_ht_cap *cur_ht_config = NULL; 1045 struct ieee80211_sta_ht_cap *cur_ht_config = NULL;
1017 u8 sta_id; 1046 u8 sta_id;
1018 1047
1019 /* Add station to device's station table */
1020
1021 /* 1048 /*
1022 * XXX: This check is definitely not correct, if we're an AP 1049 * Set HT capabilities. It is ok to set this struct even if not using
1023 * it'll always be false which is not what we want, but 1050 * HT config: the priv->current_ht_config.is_ht flag will just be false
1024 * it doesn't look like iwlagn is prepared to be an HT
1025 * AP anyway.
1026 */ 1051 */
1027 if (priv->current_ht_config.is_ht) { 1052 rcu_read_lock();
1028 rcu_read_lock(); 1053 sta = ieee80211_find_sta(priv->vif, addr);
1029 sta = ieee80211_find_sta(priv->hw, addr); 1054 if (sta) {
1030 if (sta) { 1055 memcpy(&ht_config, &sta->ht_cap, sizeof(ht_config));
1031 memcpy(&ht_config, &sta->ht_cap, sizeof(ht_config)); 1056 cur_ht_config = &ht_config;
1032 cur_ht_config = &ht_config;
1033 }
1034 rcu_read_unlock();
1035 } 1057 }
1058 rcu_read_unlock();
1036 1059
1060 /* Add station to device's station table */
1037 sta_id = iwl_add_station(priv, addr, is_ap, CMD_SYNC, cur_ht_config); 1061 sta_id = iwl_add_station(priv, addr, is_ap, CMD_SYNC, cur_ht_config);
1038 1062
1039 /* Set up default rate scaling table in device's station table */ 1063 /* Set up default rate scaling table in device's station table */
@@ -1044,6 +1068,79 @@ int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap)
1044EXPORT_SYMBOL(iwl_rxon_add_station); 1068EXPORT_SYMBOL(iwl_rxon_add_station);
1045 1069
1046/** 1070/**
1071 * iwl_sta_init_bcast_lq - Initialize a bcast station's hardware rate table
1072 *
1073 * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
1074 * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
1075 * which requires station table entry to exist).
1076 */
1077static void iwl_sta_init_bcast_lq(struct iwl_priv *priv)
1078{
1079 int i, r;
1080 struct iwl_link_quality_cmd link_cmd = {
1081 .reserved1 = 0,
1082 };
1083 u32 rate_flags;
1084
1085 /* Set up the rate scaling to start at selected rate, fall back
1086 * all the way down to 1M in IEEE order, and then spin on 1M */
1087 if (priv->band == IEEE80211_BAND_5GHZ)
1088 r = IWL_RATE_6M_INDEX;
1089 else
1090 r = IWL_RATE_1M_INDEX;
1091
1092 for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
1093 rate_flags = 0;
1094 if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
1095 rate_flags |= RATE_MCS_CCK_MSK;
1096
1097 rate_flags |= first_antenna(priv->hw_params.valid_tx_ant) <<
1098 RATE_MCS_ANT_POS;
1099
1100 link_cmd.rs_table[i].rate_n_flags =
1101 iwl_hw_set_rate_n_flags(iwl_rates[r].plcp, rate_flags);
1102 r = iwl_get_prev_ieee_rate(r);
1103 }
1104
1105 link_cmd.general_params.single_stream_ant_msk =
1106 first_antenna(priv->hw_params.valid_tx_ant);
1107 link_cmd.general_params.dual_stream_ant_msk = 3;
1108 link_cmd.agg_params.agg_dis_start_th = LINK_QUAL_AGG_DISABLE_START_DEF;
1109 link_cmd.agg_params.agg_time_limit =
1110 cpu_to_le16(LINK_QUAL_AGG_TIME_LIMIT_DEF);
1111
1112 /* Update the rate scaling for control frame Tx to AP */
1113 link_cmd.sta_id = priv->hw_params.bcast_sta_id;
1114
1115 iwl_send_cmd_pdu_async(priv, REPLY_TX_LINK_QUALITY_CMD,
1116 sizeof(link_cmd), &link_cmd, NULL);
1117}
1118
1119
1120/**
1121 * iwl_add_bcast_station - add broadcast station into station table.
1122 */
1123void iwl_add_bcast_station(struct iwl_priv *priv)
1124{
1125 IWL_DEBUG_INFO(priv, "Adding broadcast station to station table\n");
1126 iwl_add_station(priv, iwl_bcast_addr, false, CMD_SYNC, NULL);
1127
1128 /* Set up default rate scaling table in device's station table */
1129 iwl_sta_init_bcast_lq(priv);
1130}
1131EXPORT_SYMBOL(iwl_add_bcast_station);
1132
1133/**
1134 * iwl3945_add_bcast_station - add broadcast station into station table.
1135 */
1136void iwl3945_add_bcast_station(struct iwl_priv *priv)
1137{
1138 IWL_DEBUG_INFO(priv, "Adding broadcast station to station table\n");
1139 iwl_add_station(priv, iwl_bcast_addr, false, CMD_SYNC, NULL);
1140}
1141EXPORT_SYMBOL(iwl3945_add_bcast_station);
1142
1143/**
1047 * iwl_get_sta_id - Find station's index within station table 1144 * iwl_get_sta_id - Find station's index within station table
1048 * 1145 *
1049 * If new IBSS station, create new entry in station table 1146 * If new IBSS station, create new entry in station table
@@ -1163,7 +1260,7 @@ int iwl_sta_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid)
1163} 1260}
1164EXPORT_SYMBOL(iwl_sta_rx_agg_stop); 1261EXPORT_SYMBOL(iwl_sta_rx_agg_stop);
1165 1262
1166static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id) 1263void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
1167{ 1264{
1168 unsigned long flags; 1265 unsigned long flags;
1169 1266
@@ -1171,27 +1268,26 @@ static void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
1171 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK; 1268 priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
1172 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK; 1269 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
1173 priv->stations[sta_id].sta.sta.modify_mask = 0; 1270 priv->stations[sta_id].sta.sta.modify_mask = 0;
1271 priv->stations[sta_id].sta.sleep_tx_count = 0;
1174 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 1272 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1175 spin_unlock_irqrestore(&priv->sta_lock, flags); 1273 spin_unlock_irqrestore(&priv->sta_lock, flags);
1176 1274
1177 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); 1275 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
1178} 1276}
1277EXPORT_SYMBOL(iwl_sta_modify_ps_wake);
1179 1278
1180void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr) 1279void iwl_sta_modify_sleep_tx_count(struct iwl_priv *priv, int sta_id, int cnt)
1181{ 1280{
1182 /* FIXME: need locking over ps_status ??? */ 1281 unsigned long flags;
1183 u8 sta_id = iwl_find_station(priv, addr);
1184 1282
1185 if (sta_id != IWL_INVALID_STATION) { 1283 spin_lock_irqsave(&priv->sta_lock, flags);
1186 u8 sta_awake = priv->stations[sta_id]. 1284 priv->stations[sta_id].sta.station_flags |= STA_FLG_PWR_SAVE_MSK;
1187 ps_status == STA_PS_STATUS_WAKE; 1285 priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
1286 priv->stations[sta_id].sta.sta.modify_mask =
1287 STA_MODIFY_SLEEP_TX_COUNT_MSK;
1288 priv->stations[sta_id].sta.sleep_tx_count = cpu_to_le16(cnt);
1289 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
1290 spin_unlock_irqrestore(&priv->sta_lock, flags);
1188 1291
1189 if (sta_awake && ps_bit) 1292 iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
1190 priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
1191 else if (!sta_awake && !ps_bit) {
1192 iwl_sta_modify_ps_wake(priv, sta_id);
1193 priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
1194 }
1195 }
1196} 1293}
1197
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h
index 6deebade6361..2dc35fe28f56 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.h
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.h
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -52,6 +52,8 @@ void iwl_update_tkip_key(struct iwl_priv *priv,
52 const u8 *addr, u32 iv32, u16 *phase1key); 52 const u8 *addr, u32 iv32, u16 *phase1key);
53 53
54int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap); 54int iwl_rxon_add_station(struct iwl_priv *priv, const u8 *addr, bool is_ap);
55void iwl_add_bcast_station(struct iwl_priv *priv);
56void iwl3945_add_bcast_station(struct iwl_priv *priv);
55int iwl_remove_station(struct iwl_priv *priv, const u8 *addr, bool is_ap); 57int iwl_remove_station(struct iwl_priv *priv, const u8 *addr, bool is_ap);
56void iwl_clear_stations_table(struct iwl_priv *priv); 58void iwl_clear_stations_table(struct iwl_priv *priv);
57int iwl_get_free_ucode_key_index(struct iwl_priv *priv); 59int iwl_get_free_ucode_key_index(struct iwl_priv *priv);
@@ -65,5 +67,6 @@ void iwl_sta_tx_modify_enable_tid(struct iwl_priv *priv, int sta_id, int tid);
65int iwl_sta_rx_agg_start(struct iwl_priv *priv, 67int iwl_sta_rx_agg_start(struct iwl_priv *priv,
66 const u8 *addr, int tid, u16 ssn); 68 const u8 *addr, int tid, u16 ssn);
67int iwl_sta_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid); 69int iwl_sta_rx_agg_stop(struct iwl_priv *priv, const u8 *addr, int tid);
68void iwl_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr); 70void iwl_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id);
71void iwl_sta_modify_sleep_tx_count(struct iwl_priv *priv, int sta_id, int cnt);
69#endif /* __iwl_sta_h__ */ 72#endif /* __iwl_sta_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index b7e196e3c8d3..8dd0c036d547 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -29,6 +29,7 @@
29 29
30#include <linux/etherdevice.h> 30#include <linux/etherdevice.h>
31#include <linux/sched.h> 31#include <linux/sched.h>
32#include <linux/slab.h>
32#include <net/mac80211.h> 33#include <net/mac80211.h>
33#include "iwl-eeprom.h" 34#include "iwl-eeprom.h"
34#include "iwl-dev.h" 35#include "iwl-dev.h"
@@ -60,7 +61,8 @@ static const u16 default_tid_to_tx_fifo[] = {
60static inline int iwl_alloc_dma_ptr(struct iwl_priv *priv, 61static inline int iwl_alloc_dma_ptr(struct iwl_priv *priv,
61 struct iwl_dma_ptr *ptr, size_t size) 62 struct iwl_dma_ptr *ptr, size_t size)
62{ 63{
63 ptr->addr = pci_alloc_consistent(priv->pci_dev, size, &ptr->dma); 64 ptr->addr = dma_alloc_coherent(&priv->pci_dev->dev, size, &ptr->dma,
65 GFP_KERNEL);
64 if (!ptr->addr) 66 if (!ptr->addr)
65 return -ENOMEM; 67 return -ENOMEM;
66 ptr->size = size; 68 ptr->size = size;
@@ -73,21 +75,20 @@ static inline void iwl_free_dma_ptr(struct iwl_priv *priv,
73 if (unlikely(!ptr->addr)) 75 if (unlikely(!ptr->addr))
74 return; 76 return;
75 77
76 pci_free_consistent(priv->pci_dev, ptr->size, ptr->addr, ptr->dma); 78 dma_free_coherent(&priv->pci_dev->dev, ptr->size, ptr->addr, ptr->dma);
77 memset(ptr, 0, sizeof(*ptr)); 79 memset(ptr, 0, sizeof(*ptr));
78} 80}
79 81
80/** 82/**
81 * iwl_txq_update_write_ptr - Send new write index to hardware 83 * iwl_txq_update_write_ptr - Send new write index to hardware
82 */ 84 */
83int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq) 85void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
84{ 86{
85 u32 reg = 0; 87 u32 reg = 0;
86 int ret = 0;
87 int txq_id = txq->q.id; 88 int txq_id = txq->q.id;
88 89
89 if (txq->need_update == 0) 90 if (txq->need_update == 0)
90 return ret; 91 return;
91 92
92 /* if we're trying to save power */ 93 /* if we're trying to save power */
93 if (test_bit(STATUS_POWER_PMI, &priv->status)) { 94 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
@@ -97,10 +98,11 @@ int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
97 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1); 98 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
98 99
99 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { 100 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
100 IWL_DEBUG_INFO(priv, "Requesting wakeup, GP1 = 0x%x\n", reg); 101 IWL_DEBUG_INFO(priv, "Tx queue %d requesting wakeup, GP1 = 0x%x\n",
102 txq_id, reg);
101 iwl_set_bit(priv, CSR_GP_CNTRL, 103 iwl_set_bit(priv, CSR_GP_CNTRL,
102 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 104 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
103 return ret; 105 return;
104 } 106 }
105 107
106 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 108 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
@@ -113,12 +115,24 @@ int iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq)
113 txq->q.write_ptr | (txq_id << 8)); 115 txq->q.write_ptr | (txq_id << 8));
114 116
115 txq->need_update = 0; 117 txq->need_update = 0;
116
117 return ret;
118} 118}
119EXPORT_SYMBOL(iwl_txq_update_write_ptr); 119EXPORT_SYMBOL(iwl_txq_update_write_ptr);
120 120
121 121
122void iwl_free_tfds_in_queue(struct iwl_priv *priv,
123 int sta_id, int tid, int freed)
124{
125 if (priv->stations[sta_id].tid[tid].tfds_in_queue >= freed)
126 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
127 else {
128 IWL_DEBUG_TX(priv, "free more than tfds_in_queue (%u:%d)\n",
129 priv->stations[sta_id].tid[tid].tfds_in_queue,
130 freed);
131 priv->stations[sta_id].tid[tid].tfds_in_queue = 0;
132 }
133}
134EXPORT_SYMBOL(iwl_free_tfds_in_queue);
135
122/** 136/**
123 * iwl_tx_queue_free - Deallocate DMA queue. 137 * iwl_tx_queue_free - Deallocate DMA queue.
124 * @txq: Transmit queue to deallocate. 138 * @txq: Transmit queue to deallocate.
@@ -131,8 +145,8 @@ void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
131{ 145{
132 struct iwl_tx_queue *txq = &priv->txq[txq_id]; 146 struct iwl_tx_queue *txq = &priv->txq[txq_id];
133 struct iwl_queue *q = &txq->q; 147 struct iwl_queue *q = &txq->q;
134 struct pci_dev *dev = priv->pci_dev; 148 struct device *dev = &priv->pci_dev->dev;
135 int i, len; 149 int i;
136 150
137 if (q->n_bd == 0) 151 if (q->n_bd == 0)
138 return; 152 return;
@@ -142,16 +156,14 @@ void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id)
142 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) 156 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
143 priv->cfg->ops->lib->txq_free_tfd(priv, txq); 157 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
144 158
145 len = sizeof(struct iwl_device_cmd) * q->n_window;
146
147 /* De-alloc array of command/tx buffers */ 159 /* De-alloc array of command/tx buffers */
148 for (i = 0; i < TFD_TX_CMD_SLOTS; i++) 160 for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
149 kfree(txq->cmd[i]); 161 kfree(txq->cmd[i]);
150 162
151 /* De-alloc circular buffer of TFDs */ 163 /* De-alloc circular buffer of TFDs */
152 if (txq->q.n_bd) 164 if (txq->q.n_bd)
153 pci_free_consistent(dev, priv->hw_params.tfd_size * 165 dma_free_coherent(dev, priv->hw_params.tfd_size *
154 txq->q.n_bd, txq->tfds, txq->q.dma_addr); 166 txq->q.n_bd, txq->tfds, txq->q.dma_addr);
155 167
156 /* De-alloc array of per-TFD driver data */ 168 /* De-alloc array of per-TFD driver data */
157 kfree(txq->txb); 169 kfree(txq->txb);
@@ -180,14 +192,35 @@ void iwl_cmd_queue_free(struct iwl_priv *priv)
180{ 192{
181 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; 193 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
182 struct iwl_queue *q = &txq->q; 194 struct iwl_queue *q = &txq->q;
183 struct pci_dev *dev = priv->pci_dev; 195 struct device *dev = &priv->pci_dev->dev;
184 int i, len; 196 int i;
197 bool huge = false;
185 198
186 if (q->n_bd == 0) 199 if (q->n_bd == 0)
187 return; 200 return;
188 201
189 len = sizeof(struct iwl_device_cmd) * q->n_window; 202 for (; q->read_ptr != q->write_ptr;
190 len += IWL_MAX_SCAN_SIZE; 203 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
204 /* we have no way to tell if it is a huge cmd ATM */
205 i = get_cmd_index(q, q->read_ptr, 0);
206
207 if (txq->meta[i].flags & CMD_SIZE_HUGE) {
208 huge = true;
209 continue;
210 }
211
212 pci_unmap_single(priv->pci_dev,
213 pci_unmap_addr(&txq->meta[i], mapping),
214 pci_unmap_len(&txq->meta[i], len),
215 PCI_DMA_BIDIRECTIONAL);
216 }
217 if (huge) {
218 i = q->n_window;
219 pci_unmap_single(priv->pci_dev,
220 pci_unmap_addr(&txq->meta[i], mapping),
221 pci_unmap_len(&txq->meta[i], len),
222 PCI_DMA_BIDIRECTIONAL);
223 }
191 224
192 /* De-alloc array of command/tx buffers */ 225 /* De-alloc array of command/tx buffers */
193 for (i = 0; i <= TFD_CMD_SLOTS; i++) 226 for (i = 0; i <= TFD_CMD_SLOTS; i++)
@@ -195,8 +228,8 @@ void iwl_cmd_queue_free(struct iwl_priv *priv)
195 228
196 /* De-alloc circular buffer of TFDs */ 229 /* De-alloc circular buffer of TFDs */
197 if (txq->q.n_bd) 230 if (txq->q.n_bd)
198 pci_free_consistent(dev, priv->hw_params.tfd_size * 231 dma_free_coherent(dev, priv->hw_params.tfd_size * txq->q.n_bd,
199 txq->q.n_bd, txq->tfds, txq->q.dma_addr); 232 txq->tfds, txq->q.dma_addr);
200 233
201 /* deallocate arrays */ 234 /* deallocate arrays */
202 kfree(txq->cmd); 235 kfree(txq->cmd);
@@ -287,7 +320,7 @@ static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
287static int iwl_tx_queue_alloc(struct iwl_priv *priv, 320static int iwl_tx_queue_alloc(struct iwl_priv *priv,
288 struct iwl_tx_queue *txq, u32 id) 321 struct iwl_tx_queue *txq, u32 id)
289{ 322{
290 struct pci_dev *dev = priv->pci_dev; 323 struct device *dev = &priv->pci_dev->dev;
291 size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX; 324 size_t tfd_sz = priv->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
292 325
293 /* Driver private data, only for Tx (not command) queues, 326 /* Driver private data, only for Tx (not command) queues,
@@ -306,8 +339,8 @@ static int iwl_tx_queue_alloc(struct iwl_priv *priv,
306 339
307 /* Circular buffer of transmit frame descriptors (TFDs), 340 /* Circular buffer of transmit frame descriptors (TFDs),
308 * shared with device */ 341 * shared with device */
309 txq->tfds = pci_alloc_consistent(dev, tfd_sz, &txq->q.dma_addr); 342 txq->tfds = dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr,
310 343 GFP_KERNEL);
311 if (!txq->tfds) { 344 if (!txq->tfds) {
312 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz); 345 IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n", tfd_sz);
313 goto error; 346 goto error;
@@ -356,7 +389,7 @@ int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
356 for (i = 0; i < actual_slots; i++) { 389 for (i = 0; i < actual_slots; i++) {
357 /* only happens for cmd queue */ 390 /* only happens for cmd queue */
358 if (i == slots_num) 391 if (i == slots_num)
359 len += IWL_MAX_SCAN_SIZE; 392 len = IWL_MAX_CMD_SIZE;
360 393
361 txq->cmd[i] = kmalloc(len, GFP_KERNEL); 394 txq->cmd[i] = kmalloc(len, GFP_KERNEL);
362 if (!txq->cmd[i]) 395 if (!txq->cmd[i])
@@ -370,8 +403,13 @@ int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
370 403
371 txq->need_update = 0; 404 txq->need_update = 0;
372 405
373 /* aggregation TX queues will get their ID when aggregation begins */ 406 /*
374 if (txq_id <= IWL_TX_FIFO_AC3) 407 * Aggregation TX queues will get their ID when aggregation begins;
408 * they overwrite the setting done here. The command FIFO doesn't
409 * need an swq_id so don't set one to catch errors, all others can
410 * be set up to the identity mapping.
411 */
412 if (txq_id != IWL_CMD_QUEUE_NUM)
375 txq->swq_id = txq_id; 413 txq->swq_id = txq_id;
376 414
377 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise 415 /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
@@ -396,6 +434,26 @@ out_free_arrays:
396} 434}
397EXPORT_SYMBOL(iwl_tx_queue_init); 435EXPORT_SYMBOL(iwl_tx_queue_init);
398 436
437void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq,
438 int slots_num, u32 txq_id)
439{
440 int actual_slots = slots_num;
441
442 if (txq_id == IWL_CMD_QUEUE_NUM)
443 actual_slots++;
444
445 memset(txq->meta, 0, sizeof(struct iwl_cmd_meta) * actual_slots);
446
447 txq->need_update = 0;
448
449 /* Initialize queue's high/low-water marks, and head/tail indexes */
450 iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
451
452 /* Tell device where to find queue */
453 priv->cfg->ops->lib->txq_init(priv, txq);
454}
455EXPORT_SYMBOL(iwl_tx_queue_reset);
456
399/** 457/**
400 * iwl_hw_txq_ctx_free - Free TXQ Context 458 * iwl_hw_txq_ctx_free - Free TXQ Context
401 * 459 *
@@ -406,28 +464,32 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv)
406 int txq_id; 464 int txq_id;
407 465
408 /* Tx queues */ 466 /* Tx queues */
409 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) 467 if (priv->txq) {
410 if (txq_id == IWL_CMD_QUEUE_NUM) 468 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
411 iwl_cmd_queue_free(priv); 469 if (txq_id == IWL_CMD_QUEUE_NUM)
412 else 470 iwl_cmd_queue_free(priv);
413 iwl_tx_queue_free(priv, txq_id); 471 else
414 472 iwl_tx_queue_free(priv, txq_id);
473 }
415 iwl_free_dma_ptr(priv, &priv->kw); 474 iwl_free_dma_ptr(priv, &priv->kw);
416 475
417 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls); 476 iwl_free_dma_ptr(priv, &priv->scd_bc_tbls);
477
478 /* free tx queue structure */
479 iwl_free_txq_mem(priv);
418} 480}
419EXPORT_SYMBOL(iwl_hw_txq_ctx_free); 481EXPORT_SYMBOL(iwl_hw_txq_ctx_free);
420 482
421/** 483/**
422 * iwl_txq_ctx_reset - Reset TX queue context 484 * iwl_txq_ctx_alloc - allocate TX queue context
423 * Destroys all DMA structures and initialize them again 485 * Allocate all Tx DMA structures and initialize them
424 * 486 *
425 * @param priv 487 * @param priv
426 * @return error code 488 * @return error code
427 */ 489 */
428int iwl_txq_ctx_reset(struct iwl_priv *priv) 490int iwl_txq_ctx_alloc(struct iwl_priv *priv)
429{ 491{
430 int ret = 0; 492 int ret;
431 int txq_id, slots_num; 493 int txq_id, slots_num;
432 unsigned long flags; 494 unsigned long flags;
433 495
@@ -446,6 +508,12 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
446 IWL_ERR(priv, "Keep Warm allocation failed\n"); 508 IWL_ERR(priv, "Keep Warm allocation failed\n");
447 goto error_kw; 509 goto error_kw;
448 } 510 }
511
512 /* allocate tx queue structure */
513 ret = iwl_alloc_txq_mem(priv);
514 if (ret)
515 goto error;
516
449 spin_lock_irqsave(&priv->lock, flags); 517 spin_lock_irqsave(&priv->lock, flags);
450 518
451 /* Turn off all Tx DMA fifos */ 519 /* Turn off all Tx DMA fifos */
@@ -479,8 +547,31 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv)
479 return ret; 547 return ret;
480} 548}
481 549
550void iwl_txq_ctx_reset(struct iwl_priv *priv)
551{
552 int txq_id, slots_num;
553 unsigned long flags;
554
555 spin_lock_irqsave(&priv->lock, flags);
556
557 /* Turn off all Tx DMA fifos */
558 priv->cfg->ops->lib->txq_set_sched(priv, 0);
559
560 /* Tell NIC where to find the "keep warm" buffer */
561 iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4);
562
563 spin_unlock_irqrestore(&priv->lock, flags);
564
565 /* Alloc and init all Tx queues, including the command queue (#4) */
566 for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
567 slots_num = txq_id == IWL_CMD_QUEUE_NUM ?
568 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
569 iwl_tx_queue_reset(priv, &priv->txq[txq_id], slots_num, txq_id);
570 }
571}
572
482/** 573/**
483 * iwl_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory 574 * iwl_txq_ctx_stop - Stop all Tx DMA channels
484 */ 575 */
485void iwl_txq_ctx_stop(struct iwl_priv *priv) 576void iwl_txq_ctx_stop(struct iwl_priv *priv)
486{ 577{
@@ -500,9 +591,6 @@ void iwl_txq_ctx_stop(struct iwl_priv *priv)
500 1000); 591 1000);
501 } 592 }
502 spin_unlock_irqrestore(&priv->lock, flags); 593 spin_unlock_irqrestore(&priv->lock, flags);
503
504 /* Deallocate memory for all Tx queues */
505 iwl_hw_txq_ctx_free(priv);
506} 594}
507EXPORT_SYMBOL(iwl_txq_ctx_stop); 595EXPORT_SYMBOL(iwl_txq_ctx_stop);
508 596
@@ -582,9 +670,7 @@ static void iwl_tx_cmd_build_rate(struct iwl_priv *priv,
582 u8 rate_plcp; 670 u8 rate_plcp;
583 671
584 /* Set retry limit on DATA packets and Probe Responses*/ 672 /* Set retry limit on DATA packets and Probe Responses*/
585 if (priv->data_retry_limit != -1) 673 if (ieee80211_is_probe_resp(fc))
586 data_retry_limit = priv->data_retry_limit;
587 else if (ieee80211_is_probe_resp(fc))
588 data_retry_limit = 3; 674 data_retry_limit = 3;
589 else 675 else
590 data_retry_limit = IWL_DEFAULT_TX_RETRY; 676 data_retry_limit = IWL_DEFAULT_TX_RETRY;
@@ -701,6 +787,8 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
701{ 787{
702 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 788 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
703 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 789 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
790 struct ieee80211_sta *sta = info->control.sta;
791 struct iwl_station_priv *sta_priv = NULL;
704 struct iwl_tx_queue *txq; 792 struct iwl_tx_queue *txq;
705 struct iwl_queue *q; 793 struct iwl_queue *q;
706 struct iwl_device_cmd *out_cmd; 794 struct iwl_device_cmd *out_cmd;
@@ -710,7 +798,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
710 dma_addr_t phys_addr; 798 dma_addr_t phys_addr;
711 dma_addr_t txcmd_phys; 799 dma_addr_t txcmd_phys;
712 dma_addr_t scratch_phys; 800 dma_addr_t scratch_phys;
713 u16 len, len_org; 801 u16 len, len_org, firstlen, secondlen;
714 u16 seq_number = 0; 802 u16 seq_number = 0;
715 __le16 fc; 803 __le16 fc;
716 u8 hdr_len; 804 u8 hdr_len;
@@ -719,7 +807,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
719 u8 tid = 0; 807 u8 tid = 0;
720 u8 *qc = NULL; 808 u8 *qc = NULL;
721 unsigned long flags; 809 unsigned long flags;
722 int ret;
723 810
724 spin_lock_irqsave(&priv->lock, flags); 811 spin_lock_irqsave(&priv->lock, flags);
725 if (iwl_is_rfkill(priv)) { 812 if (iwl_is_rfkill(priv)) {
@@ -763,6 +850,24 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
763 850
764 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id); 851 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
765 852
853 if (sta)
854 sta_priv = (void *)sta->drv_priv;
855
856 if (sta_priv && sta_id != priv->hw_params.bcast_sta_id &&
857 sta_priv->asleep) {
858 WARN_ON(!(info->flags & IEEE80211_TX_CTL_PSPOLL_RESPONSE));
859 /*
860 * This sends an asynchronous command to the device,
861 * but we can rely on it being processed before the
862 * next frame is processed -- and the next frame to
863 * this station is the one that will consume this
864 * counter.
865 * For now set the counter to just 1 since we do not
866 * support uAPSD yet.
867 */
868 iwl_sta_modify_sleep_tx_count(priv, sta_id, 1);
869 }
870
766 txq_id = skb_get_queue_mapping(skb); 871 txq_id = skb_get_queue_mapping(skb);
767 if (ieee80211_is_data_qos(fc)) { 872 if (ieee80211_is_data_qos(fc)) {
768 qc = ieee80211_get_qos_ctl(hdr); 873 qc = ieee80211_get_qos_ctl(hdr);
@@ -776,8 +881,10 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
776 hdr->seq_ctrl |= cpu_to_le16(seq_number); 881 hdr->seq_ctrl |= cpu_to_le16(seq_number);
777 seq_number += 0x10; 882 seq_number += 0x10;
778 /* aggregation is on for this <sta,tid> */ 883 /* aggregation is on for this <sta,tid> */
779 if (info->flags & IEEE80211_TX_CTL_AMPDU) 884 if (info->flags & IEEE80211_TX_CTL_AMPDU &&
885 priv->stations[sta_id].tid[tid].agg.state == IWL_AGG_ON) {
780 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; 886 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
887 }
781 } 888 }
782 889
783 txq = &priv->txq[txq_id]; 890 txq = &priv->txq[txq_id];
@@ -843,7 +950,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
843 sizeof(struct iwl_cmd_header) + hdr_len; 950 sizeof(struct iwl_cmd_header) + hdr_len;
844 951
845 len_org = len; 952 len_org = len;
846 len = (len + 3) & ~3; 953 firstlen = len = (len + 3) & ~3;
847 954
848 if (len_org != len) 955 if (len_org != len)
849 len_org = 1; 956 len_org = 1;
@@ -877,7 +984,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
877 984
878 /* Set up TFD's 2nd entry to point directly to remainder of skb, 985 /* Set up TFD's 2nd entry to point directly to remainder of skb,
879 * if any (802.11 null frames have no payload). */ 986 * if any (802.11 null frames have no payload). */
880 len = skb->len - hdr_len; 987 secondlen = len = skb->len - hdr_len;
881 if (len) { 988 if (len) {
882 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, 989 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
883 len, PCI_DMA_TODEVICE); 990 len, PCI_DMA_TODEVICE);
@@ -911,13 +1018,27 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
911 pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys, 1018 pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys,
912 len, PCI_DMA_BIDIRECTIONAL); 1019 len, PCI_DMA_BIDIRECTIONAL);
913 1020
1021 trace_iwlwifi_dev_tx(priv,
1022 &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
1023 sizeof(struct iwl_tfd),
1024 &out_cmd->hdr, firstlen,
1025 skb->data + hdr_len, secondlen);
1026
914 /* Tell device the write index *just past* this latest filled TFD */ 1027 /* Tell device the write index *just past* this latest filled TFD */
915 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); 1028 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
916 ret = iwl_txq_update_write_ptr(priv, txq); 1029 iwl_txq_update_write_ptr(priv, txq);
917 spin_unlock_irqrestore(&priv->lock, flags); 1030 spin_unlock_irqrestore(&priv->lock, flags);
918 1031
919 if (ret) 1032 /*
920 return ret; 1033 * At this point the frame is "transmitted" successfully
1034 * and we will get a TX status notification eventually,
1035 * regardless of the value of ret. "ret" only indicates
1036 * whether or not we should update the write pointer.
1037 */
1038
1039 /* avoid atomic ops if it isn't an associated client */
1040 if (sta_priv && sta_priv->client)
1041 atomic_inc(&sta_priv->pending_frames);
921 1042
922 if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) { 1043 if ((iwl_queue_space(q) < q->high_mark) && priv->mac80211_registered) {
923 if (wait_write_ptr) { 1044 if (wait_write_ptr) {
@@ -957,7 +1078,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
957 struct iwl_cmd_meta *out_meta; 1078 struct iwl_cmd_meta *out_meta;
958 dma_addr_t phys_addr; 1079 dma_addr_t phys_addr;
959 unsigned long flags; 1080 unsigned long flags;
960 int len, ret; 1081 int len;
961 u32 idx; 1082 u32 idx;
962 u16 fix_size; 1083 u16 fix_size;
963 1084
@@ -966,22 +1087,40 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
966 1087
967 /* If any of the command structures end up being larger than 1088 /* If any of the command structures end up being larger than
968 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then 1089 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
969 * we will need to increase the size of the TFD entries */ 1090 * we will need to increase the size of the TFD entries
1091 * Also, check to see if command buffer should not exceed the size
1092 * of device_cmd and max_cmd_size. */
970 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) && 1093 BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
971 !(cmd->flags & CMD_SIZE_HUGE)); 1094 !(cmd->flags & CMD_SIZE_HUGE));
1095 BUG_ON(fix_size > IWL_MAX_CMD_SIZE);
972 1096
973 if (iwl_is_rfkill(priv)) { 1097 if (iwl_is_rfkill(priv) || iwl_is_ctkill(priv)) {
974 IWL_DEBUG_INFO(priv, "Not sending command - RF KILL\n"); 1098 IWL_WARN(priv, "Not sending command - %s KILL\n",
1099 iwl_is_rfkill(priv) ? "RF" : "CT");
975 return -EIO; 1100 return -EIO;
976 } 1101 }
977 1102
978 if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) { 1103 if (iwl_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
979 IWL_ERR(priv, "No space for Tx\n"); 1104 IWL_ERR(priv, "No space in command queue\n");
1105 if (iwl_within_ct_kill_margin(priv))
1106 iwl_tt_enter_ct_kill(priv);
1107 else {
1108 IWL_ERR(priv, "Restarting adapter due to queue full\n");
1109 queue_work(priv->workqueue, &priv->restart);
1110 }
980 return -ENOSPC; 1111 return -ENOSPC;
981 } 1112 }
982 1113
983 spin_lock_irqsave(&priv->hcmd_lock, flags); 1114 spin_lock_irqsave(&priv->hcmd_lock, flags);
984 1115
1116 /* If this is a huge cmd, mark the huge flag also on the meta.flags
1117 * of the _original_ cmd. This is used for DMA mapping clean up.
1118 */
1119 if (cmd->flags & CMD_SIZE_HUGE) {
1120 idx = get_cmd_index(q, q->write_ptr, 0);
1121 txq->meta[idx].flags = CMD_SIZE_HUGE;
1122 }
1123
985 idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE); 1124 idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
986 out_cmd = txq->cmd[idx]; 1125 out_cmd = txq->cmd[idx];
987 out_meta = &txq->meta[idx]; 1126 out_meta = &txq->meta[idx];
@@ -1005,8 +1144,8 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
1005 if (cmd->flags & CMD_SIZE_HUGE) 1144 if (cmd->flags & CMD_SIZE_HUGE)
1006 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME; 1145 out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
1007 len = sizeof(struct iwl_device_cmd); 1146 len = sizeof(struct iwl_device_cmd);
1008 len += (idx == TFD_CMD_SLOTS) ? IWL_MAX_SCAN_SIZE : 0; 1147 if (idx == TFD_CMD_SLOTS)
1009 1148 len = IWL_MAX_CMD_SIZE;
1010 1149
1011#ifdef CONFIG_IWLWIFI_DEBUG 1150#ifdef CONFIG_IWLWIFI_DEBUG
1012 switch (out_cmd->hdr.cmd) { 1151 switch (out_cmd->hdr.cmd) {
@@ -1039,16 +1178,36 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
1039 pci_unmap_addr_set(out_meta, mapping, phys_addr); 1178 pci_unmap_addr_set(out_meta, mapping, phys_addr);
1040 pci_unmap_len_set(out_meta, len, fix_size); 1179 pci_unmap_len_set(out_meta, len, fix_size);
1041 1180
1181 trace_iwlwifi_dev_hcmd(priv, &out_cmd->hdr, fix_size, cmd->flags);
1182
1042 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, 1183 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
1043 phys_addr, fix_size, 1, 1184 phys_addr, fix_size, 1,
1044 U32_PAD(cmd->len)); 1185 U32_PAD(cmd->len));
1045 1186
1046 /* Increment and update queue's write index */ 1187 /* Increment and update queue's write index */
1047 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); 1188 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
1048 ret = iwl_txq_update_write_ptr(priv, txq); 1189 iwl_txq_update_write_ptr(priv, txq);
1049 1190
1050 spin_unlock_irqrestore(&priv->hcmd_lock, flags); 1191 spin_unlock_irqrestore(&priv->hcmd_lock, flags);
1051 return ret ? ret : idx; 1192 return idx;
1193}
1194
1195static void iwl_tx_status(struct iwl_priv *priv, struct sk_buff *skb)
1196{
1197 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1198 struct ieee80211_sta *sta;
1199 struct iwl_station_priv *sta_priv;
1200
1201 sta = ieee80211_find_sta(priv->vif, hdr->addr1);
1202 if (sta) {
1203 sta_priv = (void *)sta->drv_priv;
1204 /* avoid atomic ops if this isn't a client */
1205 if (sta_priv->client &&
1206 atomic_dec_return(&sta_priv->pending_frames) == 0)
1207 ieee80211_sta_block_awake(priv->hw, sta, false);
1208 }
1209
1210 ieee80211_tx_status_irqsafe(priv->hw, skb);
1052} 1211}
1053 1212
1054int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index) 1213int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
@@ -1057,6 +1216,7 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
1057 struct iwl_queue *q = &txq->q; 1216 struct iwl_queue *q = &txq->q;
1058 struct iwl_tx_info *tx_info; 1217 struct iwl_tx_info *tx_info;
1059 int nfreed = 0; 1218 int nfreed = 0;
1219 struct ieee80211_hdr *hdr;
1060 1220
1061 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) { 1221 if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
1062 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, " 1222 IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
@@ -1070,14 +1230,17 @@ int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
1070 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { 1230 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1071 1231
1072 tx_info = &txq->txb[txq->q.read_ptr]; 1232 tx_info = &txq->txb[txq->q.read_ptr];
1073 ieee80211_tx_status_irqsafe(priv->hw, tx_info->skb[0]); 1233 iwl_tx_status(priv, tx_info->skb[0]);
1234
1235 hdr = (struct ieee80211_hdr *)tx_info->skb[0]->data;
1236 if (hdr && ieee80211_is_data_qos(hdr->frame_control))
1237 nfreed++;
1074 tx_info->skb[0] = NULL; 1238 tx_info->skb[0] = NULL;
1075 1239
1076 if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl) 1240 if (priv->cfg->ops->lib->txq_inval_byte_cnt_tbl)
1077 priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq); 1241 priv->cfg->ops->lib->txq_inval_byte_cnt_tbl(priv, txq);
1078 1242
1079 priv->cfg->ops->lib->txq_free_tfd(priv, txq); 1243 priv->cfg->ops->lib->txq_free_tfd(priv, txq);
1080 nfreed++;
1081 } 1244 }
1082 return nfreed; 1245 return nfreed;
1083} 1246}
@@ -1105,11 +1268,6 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
1105 return; 1268 return;
1106 } 1269 }
1107 1270
1108 pci_unmap_single(priv->pci_dev,
1109 pci_unmap_addr(&txq->meta[cmd_idx], mapping),
1110 pci_unmap_len(&txq->meta[cmd_idx], len),
1111 PCI_DMA_BIDIRECTIONAL);
1112
1113 for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx; 1271 for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
1114 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { 1272 q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
1115 1273
@@ -1132,7 +1290,7 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
1132 */ 1290 */
1133void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) 1291void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1134{ 1292{
1135 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1293 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1136 u16 sequence = le16_to_cpu(pkt->hdr.sequence); 1294 u16 sequence = le16_to_cpu(pkt->hdr.sequence);
1137 int txq_id = SEQ_TO_QUEUE(sequence); 1295 int txq_id = SEQ_TO_QUEUE(sequence);
1138 int index = SEQ_TO_INDEX(sequence); 1296 int index = SEQ_TO_INDEX(sequence);
@@ -1140,6 +1298,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1140 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME); 1298 bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
1141 struct iwl_device_cmd *cmd; 1299 struct iwl_device_cmd *cmd;
1142 struct iwl_cmd_meta *meta; 1300 struct iwl_cmd_meta *meta;
1301 struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
1143 1302
1144 /* If a Tx command is being handled and it isn't in the actual 1303 /* If a Tx command is being handled and it isn't in the actual
1145 * command queue then there a command routing bug has been introduced 1304 * command queue then there a command routing bug has been introduced
@@ -1153,23 +1312,39 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1153 return; 1312 return;
1154 } 1313 }
1155 1314
1156 cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); 1315 /* If this is a huge cmd, clear the huge flag on the meta.flags
1157 cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; 1316 * of the _original_ cmd. So that iwl_cmd_queue_free won't unmap
1158 meta = &priv->txq[IWL_CMD_QUEUE_NUM].meta[cmd_index]; 1317 * the DMA buffer for the scan (huge) command.
1318 */
1319 if (huge) {
1320 cmd_index = get_cmd_index(&txq->q, index, 0);
1321 txq->meta[cmd_index].flags = 0;
1322 }
1323 cmd_index = get_cmd_index(&txq->q, index, huge);
1324 cmd = txq->cmd[cmd_index];
1325 meta = &txq->meta[cmd_index];
1326
1327 pci_unmap_single(priv->pci_dev,
1328 pci_unmap_addr(meta, mapping),
1329 pci_unmap_len(meta, len),
1330 PCI_DMA_BIDIRECTIONAL);
1159 1331
1160 /* Input error checking is done when commands are added to queue. */ 1332 /* Input error checking is done when commands are added to queue. */
1161 if (meta->flags & CMD_WANT_SKB) { 1333 if (meta->flags & CMD_WANT_SKB) {
1162 meta->source->reply_skb = rxb->skb; 1334 meta->source->reply_page = (unsigned long)rxb_addr(rxb);
1163 rxb->skb = NULL; 1335 rxb->page = NULL;
1164 } else if (meta->callback) 1336 } else if (meta->callback)
1165 meta->callback(priv, cmd, rxb->skb); 1337 meta->callback(priv, cmd, pkt);
1166 1338
1167 iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index); 1339 iwl_hcmd_queue_reclaim(priv, txq_id, index, cmd_index);
1168 1340
1169 if (!(meta->flags & CMD_ASYNC)) { 1341 if (!(meta->flags & CMD_ASYNC)) {
1170 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 1342 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1343 IWL_DEBUG_INFO(priv, "Clearing HCMD_ACTIVE for command %s \n",
1344 get_cmd_string(cmd->hdr.cmd));
1171 wake_up_interruptible(&priv->wait_command_queue); 1345 wake_up_interruptible(&priv->wait_command_queue);
1172 } 1346 }
1347 meta->flags = 0;
1173} 1348}
1174EXPORT_SYMBOL(iwl_tx_cmd_complete); 1349EXPORT_SYMBOL(iwl_tx_cmd_complete);
1175 1350
@@ -1240,7 +1415,7 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
1240 if (tid_data->tfds_in_queue == 0) { 1415 if (tid_data->tfds_in_queue == 0) {
1241 IWL_DEBUG_HT(priv, "HW queue is empty\n"); 1416 IWL_DEBUG_HT(priv, "HW queue is empty\n");
1242 tid_data->agg.state = IWL_AGG_ON; 1417 tid_data->agg.state = IWL_AGG_ON;
1243 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, ra, tid); 1418 ieee80211_start_tx_ba_cb_irqsafe(priv->vif, ra, tid);
1244 } else { 1419 } else {
1245 IWL_DEBUG_HT(priv, "HW queue is NOT empty: %d packets in HW queue\n", 1420 IWL_DEBUG_HT(priv, "HW queue is NOT empty: %d packets in HW queue\n",
1246 tid_data->tfds_in_queue); 1421 tid_data->tfds_in_queue);
@@ -1254,7 +1429,7 @@ int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid)
1254{ 1429{
1255 int tx_fifo_id, txq_id, sta_id, ssn = -1; 1430 int tx_fifo_id, txq_id, sta_id, ssn = -1;
1256 struct iwl_tid_data *tid_data; 1431 struct iwl_tid_data *tid_data;
1257 int ret, write_ptr, read_ptr; 1432 int write_ptr, read_ptr;
1258 unsigned long flags; 1433 unsigned long flags;
1259 1434
1260 if (!ra) { 1435 if (!ra) {
@@ -1280,7 +1455,7 @@ int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid)
1280 if (priv->stations[sta_id].tid[tid].agg.state == 1455 if (priv->stations[sta_id].tid[tid].agg.state ==
1281 IWL_EMPTYING_HW_QUEUE_ADDBA) { 1456 IWL_EMPTYING_HW_QUEUE_ADDBA) {
1282 IWL_DEBUG_HT(priv, "AGG stop before setup done\n"); 1457 IWL_DEBUG_HT(priv, "AGG stop before setup done\n");
1283 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid); 1458 ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, ra, tid);
1284 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; 1459 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
1285 return 0; 1460 return 0;
1286 } 1461 }
@@ -1306,14 +1481,18 @@ int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid)
1306 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF; 1481 priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
1307 1482
1308 spin_lock_irqsave(&priv->lock, flags); 1483 spin_lock_irqsave(&priv->lock, flags);
1309 ret = priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn, 1484 /*
1485 * the only reason this call can fail is queue number out of range,
1486 * which can happen if uCode is reloaded and all the station
1487 * information are lost. if it is outside the range, there is no need
1488 * to deactivate the uCode queue, just return "success" to allow
1489 * mac80211 to clean up it own data.
1490 */
1491 priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, ssn,
1310 tx_fifo_id); 1492 tx_fifo_id);
1311 spin_unlock_irqrestore(&priv->lock, flags); 1493 spin_unlock_irqrestore(&priv->lock, flags);
1312 1494
1313 if (ret) 1495 ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, ra, tid);
1314 return ret;
1315
1316 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
1317 1496
1318 return 0; 1497 return 0;
1319} 1498}
@@ -1337,7 +1516,7 @@ int iwl_txq_check_empty(struct iwl_priv *priv, int sta_id, u8 tid, int txq_id)
1337 priv->cfg->ops->lib->txq_agg_disable(priv, txq_id, 1516 priv->cfg->ops->lib->txq_agg_disable(priv, txq_id,
1338 ssn, tx_fifo); 1517 ssn, tx_fifo);
1339 tid_data->agg.state = IWL_AGG_OFF; 1518 tid_data->agg.state = IWL_AGG_OFF;
1340 ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid); 1519 ieee80211_stop_tx_ba_cb_irqsafe(priv->vif, addr, tid);
1341 } 1520 }
1342 break; 1521 break;
1343 case IWL_EMPTYING_HW_QUEUE_ADDBA: 1522 case IWL_EMPTYING_HW_QUEUE_ADDBA:
@@ -1345,7 +1524,7 @@ int iwl_txq_check_empty(struct iwl_priv *priv, int sta_id, u8 tid, int txq_id)
1345 if (tid_data->tfds_in_queue == 0) { 1524 if (tid_data->tfds_in_queue == 0) {
1346 IWL_DEBUG_HT(priv, "HW queue empty: continue ADDBA flow\n"); 1525 IWL_DEBUG_HT(priv, "HW queue empty: continue ADDBA flow\n");
1347 tid_data->agg.state = IWL_AGG_ON; 1526 tid_data->agg.state = IWL_AGG_ON;
1348 ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid); 1527 ieee80211_start_tx_ba_cb_irqsafe(priv->vif, addr, tid);
1349 } 1528 }
1350 break; 1529 break;
1351 } 1530 }
@@ -1409,7 +1588,7 @@ static int iwl_tx_status_reply_compressed_ba(struct iwl_priv *priv,
1409 1588
1410 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]); 1589 info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
1411 memset(&info->status, 0, sizeof(info->status)); 1590 memset(&info->status, 0, sizeof(info->status));
1412 info->flags = IEEE80211_TX_STAT_ACK; 1591 info->flags |= IEEE80211_TX_STAT_ACK;
1413 info->flags |= IEEE80211_TX_STAT_AMPDU; 1592 info->flags |= IEEE80211_TX_STAT_AMPDU;
1414 info->status.ampdu_ack_map = successes; 1593 info->status.ampdu_ack_map = successes;
1415 info->status.ampdu_ack_len = agg->frame_count; 1594 info->status.ampdu_ack_len = agg->frame_count;
@@ -1429,7 +1608,7 @@ static int iwl_tx_status_reply_compressed_ba(struct iwl_priv *priv,
1429void iwl_rx_reply_compressed_ba(struct iwl_priv *priv, 1608void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
1430 struct iwl_rx_mem_buffer *rxb) 1609 struct iwl_rx_mem_buffer *rxb)
1431{ 1610{
1432 struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data; 1611 struct iwl_rx_packet *pkt = rxb_addr(rxb);
1433 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba; 1612 struct iwl_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
1434 struct iwl_tx_queue *txq = NULL; 1613 struct iwl_tx_queue *txq = NULL;
1435 struct iwl_ht_agg *agg; 1614 struct iwl_ht_agg *agg;
@@ -1485,7 +1664,7 @@ void iwl_rx_reply_compressed_ba(struct iwl_priv *priv,
1485 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) { 1664 if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
1486 /* calculate mac80211 ampdu sw queue to wake */ 1665 /* calculate mac80211 ampdu sw queue to wake */
1487 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index); 1666 int freed = iwl_tx_queue_reclaim(priv, scd_flow, index);
1488 priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; 1667 iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
1489 1668
1490 if ((iwl_queue_space(&txq->q) > txq->q.low_mark) && 1669 if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
1491 priv->mac80211_registered && 1670 priv->mac80211_registered &&
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index d00a80334095..b74a56c48d26 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -31,6 +31,7 @@
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/pci.h> 33#include <linux/pci.h>
34#include <linux/slab.h>
34#include <linux/dma-mapping.h> 35#include <linux/dma-mapping.h>
35#include <linux/delay.h> 36#include <linux/delay.h>
36#include <linux/sched.h> 37#include <linux/sched.h>
@@ -42,7 +43,6 @@
42#include <linux/if_arp.h> 43#include <linux/if_arp.h>
43 44
44#include <net/ieee80211_radiotap.h> 45#include <net/ieee80211_radiotap.h>
45#include <net/lib80211.h>
46#include <net/mac80211.h> 46#include <net/mac80211.h>
47 47
48#include <asm/div64.h> 48#include <asm/div64.h>
@@ -54,9 +54,10 @@
54#include "iwl-commands.h" 54#include "iwl-commands.h"
55#include "iwl-sta.h" 55#include "iwl-sta.h"
56#include "iwl-3945.h" 56#include "iwl-3945.h"
57#include "iwl-helpers.h"
58#include "iwl-core.h" 57#include "iwl-core.h"
58#include "iwl-helpers.h"
59#include "iwl-dev.h" 59#include "iwl-dev.h"
60#include "iwl-spectrum.h"
60 61
61/* 62/*
62 * module name, copyright, version, etc. 63 * module name, copyright, version, etc.
@@ -71,17 +72,14 @@
71#define VD 72#define VD
72#endif 73#endif
73 74
74#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT 75/*
75#define VS "s" 76 * add "s" to indicate spectrum measurement included.
76#else 77 * we add it here to be consistent with previous releases in which
77#define VS 78 * this was configurable.
78#endif 79 */
79 80#define DRV_VERSION IWLWIFI_VERSION VD "s"
80#define IWL39_VERSION "1.2.26k" VD VS 81#define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
81#define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
82#define DRV_AUTHOR "<ilw@linux.intel.com>" 82#define DRV_AUTHOR "<ilw@linux.intel.com>"
83#define DRV_VERSION IWL39_VERSION
84
85 83
86MODULE_DESCRIPTION(DRV_DESCRIPTION); 84MODULE_DESCRIPTION(DRV_DESCRIPTION);
87MODULE_VERSION(DRV_VERSION); 85MODULE_VERSION(DRV_VERSION);
@@ -90,7 +88,6 @@ MODULE_LICENSE("GPL");
90 88
91 /* module parameters */ 89 /* module parameters */
92struct iwl_mod_params iwl3945_mod_params = { 90struct iwl_mod_params iwl3945_mod_params = {
93 .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
94 .sw_crypto = 1, 91 .sw_crypto = 1,
95 .restart_fw = 1, 92 .restart_fw = 1,
96 /* the rest are 0 by default */ 93 /* the rest are 0 by default */
@@ -356,10 +353,10 @@ static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
356static void iwl3945_unset_hw_params(struct iwl_priv *priv) 353static void iwl3945_unset_hw_params(struct iwl_priv *priv)
357{ 354{
358 if (priv->shared_virt) 355 if (priv->shared_virt)
359 pci_free_consistent(priv->pci_dev, 356 dma_free_coherent(&priv->pci_dev->dev,
360 sizeof(struct iwl3945_shared), 357 sizeof(struct iwl3945_shared),
361 priv->shared_virt, 358 priv->shared_virt,
362 priv->shared_phys); 359 priv->shared_phys);
363} 360}
364 361
365static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv, 362static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
@@ -368,13 +365,13 @@ static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
368 struct sk_buff *skb_frag, 365 struct sk_buff *skb_frag,
369 int sta_id) 366 int sta_id)
370{ 367{
371 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; 368 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
372 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo; 369 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
373 370
374 switch (keyinfo->alg) { 371 switch (keyinfo->alg) {
375 case ALG_CCMP: 372 case ALG_CCMP:
376 tx->sec_ctl = TX_CMD_SEC_CCM; 373 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
377 memcpy(tx->key, keyinfo->key, keyinfo->keylen); 374 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
378 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n"); 375 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
379 break; 376 break;
380 377
@@ -382,13 +379,13 @@ static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
382 break; 379 break;
383 380
384 case ALG_WEP: 381 case ALG_WEP:
385 tx->sec_ctl = TX_CMD_SEC_WEP | 382 tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
386 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; 383 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
387 384
388 if (keyinfo->keylen == 13) 385 if (keyinfo->keylen == 13)
389 tx->sec_ctl |= TX_CMD_SEC_KEY128; 386 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
390 387
391 memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen); 388 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
392 389
393 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption " 390 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
394 "with key %d\n", info->control.hw_key->hw_key_idx); 391 "with key %d\n", info->control.hw_key->hw_key_idx);
@@ -408,12 +405,11 @@ static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
408 struct ieee80211_tx_info *info, 405 struct ieee80211_tx_info *info,
409 struct ieee80211_hdr *hdr, u8 std_id) 406 struct ieee80211_hdr *hdr, u8 std_id)
410{ 407{
411 struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload; 408 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
412 __le32 tx_flags = tx->tx_flags; 409 __le32 tx_flags = tx_cmd->tx_flags;
413 __le16 fc = hdr->frame_control; 410 __le16 fc = hdr->frame_control;
414 u8 rc_flags = info->control.rates[0].flags;
415 411
416 tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 412 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
417 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { 413 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
418 tx_flags |= TX_CMD_FLG_ACK_MSK; 414 tx_flags |= TX_CMD_FLG_ACK_MSK;
419 if (ieee80211_is_mgmt(fc)) 415 if (ieee80211_is_mgmt(fc))
@@ -426,25 +422,19 @@ static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
426 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 422 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
427 } 423 }
428 424
429 tx->sta_id = std_id; 425 tx_cmd->sta_id = std_id;
430 if (ieee80211_has_morefrags(fc)) 426 if (ieee80211_has_morefrags(fc))
431 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; 427 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
432 428
433 if (ieee80211_is_data_qos(fc)) { 429 if (ieee80211_is_data_qos(fc)) {
434 u8 *qc = ieee80211_get_qos_ctl(hdr); 430 u8 *qc = ieee80211_get_qos_ctl(hdr);
435 tx->tid_tspec = qc[0] & 0xf; 431 tx_cmd->tid_tspec = qc[0] & 0xf;
436 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; 432 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
437 } else { 433 } else {
438 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; 434 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
439 } 435 }
440 436
441 if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 437 priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
442 tx_flags |= TX_CMD_FLG_RTS_MSK;
443 tx_flags &= ~TX_CMD_FLG_CTS_MSK;
444 } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
445 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
446 tx_flags |= TX_CMD_FLG_CTS_MSK;
447 }
448 438
449 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK)) 439 if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
450 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK; 440 tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
@@ -452,19 +442,16 @@ static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
452 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); 442 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
453 if (ieee80211_is_mgmt(fc)) { 443 if (ieee80211_is_mgmt(fc)) {
454 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) 444 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
455 tx->timeout.pm_frame_timeout = cpu_to_le16(3); 445 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
456 else 446 else
457 tx->timeout.pm_frame_timeout = cpu_to_le16(2); 447 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
458 } else { 448 } else {
459 tx->timeout.pm_frame_timeout = 0; 449 tx_cmd->timeout.pm_frame_timeout = 0;
460#ifdef CONFIG_IWLWIFI_LEDS
461 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
462#endif
463 } 450 }
464 451
465 tx->driver_txop = 0; 452 tx_cmd->driver_txop = 0;
466 tx->tx_flags = tx_flags; 453 tx_cmd->tx_flags = tx_flags;
467 tx->next_frame_len = 0; 454 tx_cmd->next_frame_len = 0;
468} 455}
469 456
470/* 457/*
@@ -474,7 +461,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
474{ 461{
475 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 462 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
476 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 463 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
477 struct iwl3945_tx_cmd *tx; 464 struct iwl3945_tx_cmd *tx_cmd;
478 struct iwl_tx_queue *txq = NULL; 465 struct iwl_tx_queue *txq = NULL;
479 struct iwl_queue *q = NULL; 466 struct iwl_queue *q = NULL;
480 struct iwl_device_cmd *out_cmd; 467 struct iwl_device_cmd *out_cmd;
@@ -492,7 +479,6 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
492 u8 wait_write_ptr = 0; 479 u8 wait_write_ptr = 0;
493 u8 *qc = NULL; 480 u8 *qc = NULL;
494 unsigned long flags; 481 unsigned long flags;
495 int rc;
496 482
497 spin_lock_irqsave(&priv->lock, flags); 483 spin_lock_irqsave(&priv->lock, flags);
498 if (iwl_is_rfkill(priv)) { 484 if (iwl_is_rfkill(priv)) {
@@ -562,6 +548,9 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
562 txq = &priv->txq[txq_id]; 548 txq = &priv->txq[txq_id];
563 q = &txq->q; 549 q = &txq->q;
564 550
551 if ((iwl_queue_space(q) < q->high_mark))
552 goto drop;
553
565 spin_lock_irqsave(&priv->lock, flags); 554 spin_lock_irqsave(&priv->lock, flags);
566 555
567 idx = get_cmd_index(q, q->write_ptr, 0); 556 idx = get_cmd_index(q, q->write_ptr, 0);
@@ -573,9 +562,9 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
573 /* Init first empty entry in queue's array of Tx/cmd buffers */ 562 /* Init first empty entry in queue's array of Tx/cmd buffers */
574 out_cmd = txq->cmd[idx]; 563 out_cmd = txq->cmd[idx];
575 out_meta = &txq->meta[idx]; 564 out_meta = &txq->meta[idx];
576 tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload; 565 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
577 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); 566 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
578 memset(tx, 0, sizeof(*tx)); 567 memset(tx_cmd, 0, sizeof(*tx_cmd));
579 568
580 /* 569 /*
581 * Set up the Tx-command (not MAC!) header. 570 * Set up the Tx-command (not MAC!) header.
@@ -588,7 +577,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
588 INDEX_TO_SEQ(q->write_ptr))); 577 INDEX_TO_SEQ(q->write_ptr)));
589 578
590 /* Copy MAC header from skb into command buffer */ 579 /* Copy MAC header from skb into command buffer */
591 memcpy(tx->hdr, hdr, hdr_len); 580 memcpy(tx_cmd->hdr, hdr, hdr_len);
592 581
593 582
594 if (info->control.hw_key) 583 if (info->control.hw_key)
@@ -602,12 +591,12 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
602 591
603 /* Total # bytes to be transmitted */ 592 /* Total # bytes to be transmitted */
604 len = (u16)skb->len; 593 len = (u16)skb->len;
605 tx->len = cpu_to_le16(len); 594 tx_cmd->len = cpu_to_le16(len);
606 595
607 iwl_dbg_log_tx_data_frame(priv, len, hdr); 596 iwl_dbg_log_tx_data_frame(priv, len, hdr);
608 iwl_update_stats(priv, true, fc, len); 597 iwl_update_stats(priv, true, fc, len);
609 tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; 598 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
610 tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; 599 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
611 600
612 if (!ieee80211_has_morefrags(hdr->frame_control)) { 601 if (!ieee80211_has_morefrags(hdr->frame_control)) {
613 txq->need_update = 1; 602 txq->need_update = 1;
@@ -620,9 +609,9 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
620 609
621 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n", 610 IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
622 le16_to_cpu(out_cmd->hdr.sequence)); 611 le16_to_cpu(out_cmd->hdr.sequence));
623 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags)); 612 IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
624 iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx)); 613 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
625 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr, 614 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
626 ieee80211_hdrlen(fc)); 615 ieee80211_hdrlen(fc));
627 616
628 /* 617 /*
@@ -674,12 +663,9 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
674 663
675 /* Tell device the write index *just past* this latest filled TFD */ 664 /* Tell device the write index *just past* this latest filled TFD */
676 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); 665 q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
677 rc = iwl_txq_update_write_ptr(priv, txq); 666 iwl_txq_update_write_ptr(priv, txq);
678 spin_unlock_irqrestore(&priv->lock, flags); 667 spin_unlock_irqrestore(&priv->lock, flags);
679 668
680 if (rc)
681 return rc;
682
683 if ((iwl_queue_space(q) < q->high_mark) 669 if ((iwl_queue_space(q) < q->high_mark)
684 && priv->mac80211_registered) { 670 && priv->mac80211_registered) {
685 if (wait_write_ptr) { 671 if (wait_write_ptr) {
@@ -700,10 +686,6 @@ drop:
700 return -1; 686 return -1;
701} 687}
702 688
703#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
704
705#include "iwl-spectrum.h"
706
707#define BEACON_TIME_MASK_LOW 0x00FFFFFF 689#define BEACON_TIME_MASK_LOW 0x00FFFFFF
708#define BEACON_TIME_MASK_HIGH 0xFF000000 690#define BEACON_TIME_MASK_HIGH 0xFF000000
709#define TIME_UNIT 1024 691#define TIME_UNIT 1024
@@ -758,7 +740,7 @@ static int iwl3945_get_measurement(struct iwl_priv *priv,
758 u8 type) 740 u8 type)
759{ 741{
760 struct iwl_spectrum_cmd spectrum; 742 struct iwl_spectrum_cmd spectrum;
761 struct iwl_rx_packet *res; 743 struct iwl_rx_packet *pkt;
762 struct iwl_host_cmd cmd = { 744 struct iwl_host_cmd cmd = {
763 .id = REPLY_SPECTRUM_MEASUREMENT_CMD, 745 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
764 .data = (void *)&spectrum, 746 .data = (void *)&spectrum,
@@ -803,18 +785,18 @@ static int iwl3945_get_measurement(struct iwl_priv *priv,
803 if (rc) 785 if (rc)
804 return rc; 786 return rc;
805 787
806 res = (struct iwl_rx_packet *)cmd.reply_skb->data; 788 pkt = (struct iwl_rx_packet *)cmd.reply_page;
807 if (res->hdr.flags & IWL_CMD_FAILED_MSK) { 789 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
808 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n"); 790 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
809 rc = -EIO; 791 rc = -EIO;
810 } 792 }
811 793
812 spectrum_resp_status = le16_to_cpu(res->u.spectrum.status); 794 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
813 switch (spectrum_resp_status) { 795 switch (spectrum_resp_status) {
814 case 0: /* Command will be handled */ 796 case 0: /* Command will be handled */
815 if (res->u.spectrum.id != 0xff) { 797 if (pkt->u.spectrum.id != 0xff) {
816 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n", 798 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
817 res->u.spectrum.id); 799 pkt->u.spectrum.id);
818 priv->measurement_status &= ~MEASUREMENT_READY; 800 priv->measurement_status &= ~MEASUREMENT_READY;
819 } 801 }
820 priv->measurement_status |= MEASUREMENT_ACTIVE; 802 priv->measurement_status |= MEASUREMENT_ACTIVE;
@@ -826,16 +808,15 @@ static int iwl3945_get_measurement(struct iwl_priv *priv,
826 break; 808 break;
827 } 809 }
828 810
829 dev_kfree_skb_any(cmd.reply_skb); 811 iwl_free_pages(priv, cmd.reply_page);
830 812
831 return rc; 813 return rc;
832} 814}
833#endif
834 815
835static void iwl3945_rx_reply_alive(struct iwl_priv *priv, 816static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
836 struct iwl_rx_mem_buffer *rxb) 817 struct iwl_rx_mem_buffer *rxb)
837{ 818{
838 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 819 struct iwl_rx_packet *pkt = rxb_addr(rxb);
839 struct iwl_alive_resp *palive; 820 struct iwl_alive_resp *palive;
840 struct delayed_work *pwork; 821 struct delayed_work *pwork;
841 822
@@ -872,7 +853,7 @@ static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
872 struct iwl_rx_mem_buffer *rxb) 853 struct iwl_rx_mem_buffer *rxb)
873{ 854{
874#ifdef CONFIG_IWLWIFI_DEBUG 855#ifdef CONFIG_IWLWIFI_DEBUG
875 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 856 struct iwl_rx_packet *pkt = rxb_addr(rxb);
876#endif 857#endif
877 858
878 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); 859 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
@@ -908,7 +889,7 @@ static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
908 struct iwl_rx_mem_buffer *rxb) 889 struct iwl_rx_mem_buffer *rxb)
909{ 890{
910#ifdef CONFIG_IWLWIFI_DEBUG 891#ifdef CONFIG_IWLWIFI_DEBUG
911 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 892 struct iwl_rx_packet *pkt = rxb_addr(rxb);
912 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status); 893 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
913 u8 rate = beacon->beacon_notify_hdr.rate; 894 u8 rate = beacon->beacon_notify_hdr.rate;
914 895
@@ -931,7 +912,7 @@ static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
931static void iwl3945_rx_card_state_notif(struct iwl_priv *priv, 912static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
932 struct iwl_rx_mem_buffer *rxb) 913 struct iwl_rx_mem_buffer *rxb)
933{ 914{
934 struct iwl_rx_packet *pkt = (void *)rxb->skb->data; 915 struct iwl_rx_packet *pkt = rxb_addr(rxb);
935 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); 916 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
936 unsigned long status = priv->status; 917 unsigned long status = priv->status;
937 918
@@ -973,6 +954,8 @@ static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
973 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta; 954 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
974 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error; 955 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
975 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa; 956 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
957 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
958 iwl_rx_spectrum_measure_notif;
976 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; 959 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
977 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = 960 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
978 iwl_rx_pm_debug_statistics_notif; 961 iwl_rx_pm_debug_statistics_notif;
@@ -986,7 +969,6 @@ static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
986 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics; 969 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
987 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics; 970 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
988 971
989 iwl_setup_spectrum_handlers(priv);
990 iwl_setup_rx_scan_handlers(priv); 972 iwl_setup_rx_scan_handlers(priv);
991 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif; 973 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
992 974
@@ -1078,13 +1060,13 @@ static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
1078 * also updates the memory address in the firmware to reference the new 1060 * also updates the memory address in the firmware to reference the new
1079 * target buffer. 1061 * target buffer.
1080 */ 1062 */
1081static int iwl3945_rx_queue_restock(struct iwl_priv *priv) 1063static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
1082{ 1064{
1083 struct iwl_rx_queue *rxq = &priv->rxq; 1065 struct iwl_rx_queue *rxq = &priv->rxq;
1084 struct list_head *element; 1066 struct list_head *element;
1085 struct iwl_rx_mem_buffer *rxb; 1067 struct iwl_rx_mem_buffer *rxb;
1086 unsigned long flags; 1068 unsigned long flags;
1087 int write, rc; 1069 int write;
1088 1070
1089 spin_lock_irqsave(&rxq->lock, flags); 1071 spin_lock_irqsave(&rxq->lock, flags);
1090 write = rxq->write & ~0x7; 1072 write = rxq->write & ~0x7;
@@ -1095,7 +1077,7 @@ static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1095 list_del(element); 1077 list_del(element);
1096 1078
1097 /* Point to Rx buffer via next RBD in circular buffer */ 1079 /* Point to Rx buffer via next RBD in circular buffer */
1098 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr); 1080 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
1099 rxq->queue[rxq->write] = rxb; 1081 rxq->queue[rxq->write] = rxb;
1100 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; 1082 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
1101 rxq->free_count--; 1083 rxq->free_count--;
@@ -1114,12 +1096,8 @@ static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
1114 spin_lock_irqsave(&rxq->lock, flags); 1096 spin_lock_irqsave(&rxq->lock, flags);
1115 rxq->need_update = 1; 1097 rxq->need_update = 1;
1116 spin_unlock_irqrestore(&rxq->lock, flags); 1098 spin_unlock_irqrestore(&rxq->lock, flags);
1117 rc = iwl_rx_queue_update_write_ptr(priv, rxq); 1099 iwl_rx_queue_update_write_ptr(priv, rxq);
1118 if (rc)
1119 return rc;
1120 } 1100 }
1121
1122 return 0;
1123} 1101}
1124 1102
1125/** 1103/**
@@ -1135,8 +1113,9 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1135 struct iwl_rx_queue *rxq = &priv->rxq; 1113 struct iwl_rx_queue *rxq = &priv->rxq;
1136 struct list_head *element; 1114 struct list_head *element;
1137 struct iwl_rx_mem_buffer *rxb; 1115 struct iwl_rx_mem_buffer *rxb;
1138 struct sk_buff *skb; 1116 struct page *page;
1139 unsigned long flags; 1117 unsigned long flags;
1118 gfp_t gfp_mask = priority;
1140 1119
1141 while (1) { 1120 while (1) {
1142 spin_lock_irqsave(&rxq->lock, flags); 1121 spin_lock_irqsave(&rxq->lock, flags);
@@ -1148,10 +1127,14 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1148 spin_unlock_irqrestore(&rxq->lock, flags); 1127 spin_unlock_irqrestore(&rxq->lock, flags);
1149 1128
1150 if (rxq->free_count > RX_LOW_WATERMARK) 1129 if (rxq->free_count > RX_LOW_WATERMARK)
1151 priority |= __GFP_NOWARN; 1130 gfp_mask |= __GFP_NOWARN;
1131
1132 if (priv->hw_params.rx_page_order > 0)
1133 gfp_mask |= __GFP_COMP;
1134
1152 /* Alloc a new receive buffer */ 1135 /* Alloc a new receive buffer */
1153 skb = alloc_skb(priv->hw_params.rx_buf_size, priority); 1136 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1154 if (!skb) { 1137 if (!page) {
1155 if (net_ratelimit()) 1138 if (net_ratelimit())
1156 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n"); 1139 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1157 if ((rxq->free_count <= RX_LOW_WATERMARK) && 1140 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
@@ -1168,7 +1151,7 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1168 spin_lock_irqsave(&rxq->lock, flags); 1151 spin_lock_irqsave(&rxq->lock, flags);
1169 if (list_empty(&rxq->rx_used)) { 1152 if (list_empty(&rxq->rx_used)) {
1170 spin_unlock_irqrestore(&rxq->lock, flags); 1153 spin_unlock_irqrestore(&rxq->lock, flags);
1171 dev_kfree_skb_any(skb); 1154 __free_pages(page, priv->hw_params.rx_page_order);
1172 return; 1155 return;
1173 } 1156 }
1174 element = rxq->rx_used.next; 1157 element = rxq->rx_used.next;
@@ -1176,26 +1159,18 @@ static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1176 list_del(element); 1159 list_del(element);
1177 spin_unlock_irqrestore(&rxq->lock, flags); 1160 spin_unlock_irqrestore(&rxq->lock, flags);
1178 1161
1179 rxb->skb = skb; 1162 rxb->page = page;
1180
1181 /* If radiotap head is required, reserve some headroom here.
1182 * The physical head count is a variable rx_stats->phy_count.
1183 * We reserve 4 bytes here. Plus these extra bytes, the
1184 * headroom of the physical head should be enough for the
1185 * radiotap head that iwl3945 supported. See iwl3945_rt.
1186 */
1187 skb_reserve(rxb->skb, 4);
1188
1189 /* Get physical address of RB/SKB */ 1163 /* Get physical address of RB/SKB */
1190 rxb->real_dma_addr = pci_map_single(priv->pci_dev, 1164 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1191 rxb->skb->data, 1165 PAGE_SIZE << priv->hw_params.rx_page_order,
1192 priv->hw_params.rx_buf_size, 1166 PCI_DMA_FROMDEVICE);
1193 PCI_DMA_FROMDEVICE);
1194 1167
1195 spin_lock_irqsave(&rxq->lock, flags); 1168 spin_lock_irqsave(&rxq->lock, flags);
1169
1196 list_add_tail(&rxb->list, &rxq->rx_free); 1170 list_add_tail(&rxb->list, &rxq->rx_free);
1197 priv->alloc_rxb_skb++;
1198 rxq->free_count++; 1171 rxq->free_count++;
1172 priv->alloc_rxb_page++;
1173
1199 spin_unlock_irqrestore(&rxq->lock, flags); 1174 spin_unlock_irqrestore(&rxq->lock, flags);
1200 } 1175 }
1201} 1176}
@@ -1211,14 +1186,12 @@ void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1211 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { 1186 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1212 /* In the reset function, these buffers may have been allocated 1187 /* In the reset function, these buffers may have been allocated
1213 * to an SKB, so we need to unmap and free potential storage */ 1188 * to an SKB, so we need to unmap and free potential storage */
1214 if (rxq->pool[i].skb != NULL) { 1189 if (rxq->pool[i].page != NULL) {
1215 pci_unmap_single(priv->pci_dev, 1190 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1216 rxq->pool[i].real_dma_addr, 1191 PAGE_SIZE << priv->hw_params.rx_page_order,
1217 priv->hw_params.rx_buf_size, 1192 PCI_DMA_FROMDEVICE);
1218 PCI_DMA_FROMDEVICE); 1193 __iwl_free_pages(priv, rxq->pool[i].page);
1219 priv->alloc_rxb_skb--; 1194 rxq->pool[i].page = NULL;
1220 dev_kfree_skb(rxq->pool[i].skb);
1221 rxq->pool[i].skb = NULL;
1222 } 1195 }
1223 list_add_tail(&rxq->pool[i].list, &rxq->rx_used); 1196 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1224 } 1197 }
@@ -1226,8 +1199,8 @@ void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1226 /* Set us so that we have processed and used all buffers, but have 1199 /* Set us so that we have processed and used all buffers, but have
1227 * not restocked the Rx queue with fresh buffers */ 1200 * not restocked the Rx queue with fresh buffers */
1228 rxq->read = rxq->write = 0; 1201 rxq->read = rxq->write = 0;
1229 rxq->free_count = 0;
1230 rxq->write_actual = 0; 1202 rxq->write_actual = 0;
1203 rxq->free_count = 0;
1231 spin_unlock_irqrestore(&rxq->lock, flags); 1204 spin_unlock_irqrestore(&rxq->lock, flags);
1232} 1205}
1233 1206
@@ -1260,19 +1233,19 @@ static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rx
1260{ 1233{
1261 int i; 1234 int i;
1262 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { 1235 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1263 if (rxq->pool[i].skb != NULL) { 1236 if (rxq->pool[i].page != NULL) {
1264 pci_unmap_single(priv->pci_dev, 1237 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1265 rxq->pool[i].real_dma_addr, 1238 PAGE_SIZE << priv->hw_params.rx_page_order,
1266 priv->hw_params.rx_buf_size, 1239 PCI_DMA_FROMDEVICE);
1267 PCI_DMA_FROMDEVICE); 1240 __iwl_free_pages(priv, rxq->pool[i].page);
1268 dev_kfree_skb(rxq->pool[i].skb); 1241 rxq->pool[i].page = NULL;
1269 } 1242 }
1270 } 1243 }
1271 1244
1272 pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd, 1245 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1273 rxq->dma_addr); 1246 rxq->dma_addr);
1274 pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status), 1247 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1275 rxq->rb_stts, rxq->rb_stts_dma); 1248 rxq->rb_stts, rxq->rb_stts_dma);
1276 rxq->bd = NULL; 1249 rxq->bd = NULL;
1277 rxq->rb_stts = NULL; 1250 rxq->rb_stts = NULL;
1278} 1251}
@@ -1315,47 +1288,6 @@ int iwl3945_calc_db_from_ratio(int sig_ratio)
1315 return (int)ratio2dB[sig_ratio]; 1288 return (int)ratio2dB[sig_ratio];
1316} 1289}
1317 1290
1318#define PERFECT_RSSI (-20) /* dBm */
1319#define WORST_RSSI (-95) /* dBm */
1320#define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
1321
1322/* Calculate an indication of rx signal quality (a percentage, not dBm!).
1323 * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
1324 * about formulas used below. */
1325int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
1326{
1327 int sig_qual;
1328 int degradation = PERFECT_RSSI - rssi_dbm;
1329
1330 /* If we get a noise measurement, use signal-to-noise ratio (SNR)
1331 * as indicator; formula is (signal dbm - noise dbm).
1332 * SNR at or above 40 is a great signal (100%).
1333 * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
1334 * Weakest usable signal is usually 10 - 15 dB SNR. */
1335 if (noise_dbm) {
1336 if (rssi_dbm - noise_dbm >= 40)
1337 return 100;
1338 else if (rssi_dbm < noise_dbm)
1339 return 0;
1340 sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
1341
1342 /* Else use just the signal level.
1343 * This formula is a least squares fit of data points collected and
1344 * compared with a reference system that had a percentage (%) display
1345 * for signal quality. */
1346 } else
1347 sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
1348 (15 * RSSI_RANGE + 62 * degradation)) /
1349 (RSSI_RANGE * RSSI_RANGE);
1350
1351 if (sig_qual > 100)
1352 sig_qual = 100;
1353 else if (sig_qual < 1)
1354 sig_qual = 0;
1355
1356 return sig_qual;
1357}
1358
1359/** 1291/**
1360 * iwl3945_rx_handle - Main entry function for receiving responses from uCode 1292 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1361 * 1293 *
@@ -1381,7 +1313,7 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
1381 i = rxq->read; 1313 i = rxq->read;
1382 1314
1383 /* calculate total frames need to be restock after handling RX */ 1315 /* calculate total frames need to be restock after handling RX */
1384 total_empty = r - priv->rxq.write_actual; 1316 total_empty = r - rxq->write_actual;
1385 if (total_empty < 0) 1317 if (total_empty < 0)
1386 total_empty += RX_QUEUE_SIZE; 1318 total_empty += RX_QUEUE_SIZE;
1387 1319
@@ -1401,10 +1333,13 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
1401 1333
1402 rxq->queue[i] = NULL; 1334 rxq->queue[i] = NULL;
1403 1335
1404 pci_unmap_single(priv->pci_dev, rxb->real_dma_addr, 1336 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1405 priv->hw_params.rx_buf_size, 1337 PAGE_SIZE << priv->hw_params.rx_page_order,
1406 PCI_DMA_FROMDEVICE); 1338 PCI_DMA_FROMDEVICE);
1407 pkt = (struct iwl_rx_packet *)rxb->skb->data; 1339 pkt = rxb_addr(rxb);
1340
1341 trace_iwlwifi_dev_rx(priv, pkt,
1342 le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
1408 1343
1409 /* Reclaim a command buffer only if this packet is a response 1344 /* Reclaim a command buffer only if this packet is a response
1410 * to a (driver-originated) command. 1345 * to a (driver-originated) command.
@@ -1422,44 +1357,55 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
1422 if (priv->rx_handlers[pkt->hdr.cmd]) { 1357 if (priv->rx_handlers[pkt->hdr.cmd]) {
1423 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i, 1358 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1424 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); 1359 get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1425 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1426 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++; 1360 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1361 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1427 } else { 1362 } else {
1428 /* No handling needed */ 1363 /* No handling needed */
1429 IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n", 1364 IWL_DEBUG_RX(priv,
1365 "r %d i %d No handler needed for %s, 0x%02x\n",
1430 r, i, get_cmd_string(pkt->hdr.cmd), 1366 r, i, get_cmd_string(pkt->hdr.cmd),
1431 pkt->hdr.cmd); 1367 pkt->hdr.cmd);
1432 } 1368 }
1433 1369
1370 /*
1371 * XXX: After here, we should always check rxb->page
1372 * against NULL before touching it or its virtual
1373 * memory (pkt). Because some rx_handler might have
1374 * already taken or freed the pages.
1375 */
1376
1434 if (reclaim) { 1377 if (reclaim) {
1435 /* Invoke any callbacks, transfer the skb to caller, and 1378 /* Invoke any callbacks, transfer the buffer to caller,
1436 * fire off the (possibly) blocking iwl_send_cmd() 1379 * and fire off the (possibly) blocking iwl_send_cmd()
1437 * as we reclaim the driver command queue */ 1380 * as we reclaim the driver command queue */
1438 if (rxb && rxb->skb) 1381 if (rxb->page)
1439 iwl_tx_cmd_complete(priv, rxb); 1382 iwl_tx_cmd_complete(priv, rxb);
1440 else 1383 else
1441 IWL_WARN(priv, "Claim null rxb?\n"); 1384 IWL_WARN(priv, "Claim null rxb?\n");
1442 } 1385 }
1443 1386
1444 /* For now we just don't re-use anything. We can tweak this 1387 /* Reuse the page if possible. For notification packets and
1445 * later to try and re-use notification packets and SKBs that 1388 * SKBs that fail to Rx correctly, add them back into the
1446 * fail to Rx correctly */ 1389 * rx_free list for reuse later. */
1447 if (rxb->skb != NULL) {
1448 priv->alloc_rxb_skb--;
1449 dev_kfree_skb_any(rxb->skb);
1450 rxb->skb = NULL;
1451 }
1452
1453 spin_lock_irqsave(&rxq->lock, flags); 1390 spin_lock_irqsave(&rxq->lock, flags);
1454 list_add_tail(&rxb->list, &priv->rxq.rx_used); 1391 if (rxb->page != NULL) {
1392 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1393 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1394 PCI_DMA_FROMDEVICE);
1395 list_add_tail(&rxb->list, &rxq->rx_free);
1396 rxq->free_count++;
1397 } else
1398 list_add_tail(&rxb->list, &rxq->rx_used);
1399
1455 spin_unlock_irqrestore(&rxq->lock, flags); 1400 spin_unlock_irqrestore(&rxq->lock, flags);
1401
1456 i = (i + 1) & RX_QUEUE_MASK; 1402 i = (i + 1) & RX_QUEUE_MASK;
1457 /* If there are a lot of unused frames, 1403 /* If there are a lot of unused frames,
1458 * restock the Rx queue so ucode won't assert. */ 1404 * restock the Rx queue so ucode won't assert. */
1459 if (fill_rx) { 1405 if (fill_rx) {
1460 count++; 1406 count++;
1461 if (count >= 8) { 1407 if (count >= 8) {
1462 priv->rxq.read = i; 1408 rxq->read = i;
1463 iwl3945_rx_replenish_now(priv); 1409 iwl3945_rx_replenish_now(priv);
1464 count = 0; 1410 count = 0;
1465 } 1411 }
@@ -1467,7 +1413,7 @@ static void iwl3945_rx_handle(struct iwl_priv *priv)
1467 } 1413 }
1468 1414
1469 /* Backtrack one entry */ 1415 /* Backtrack one entry */
1470 priv->rxq.read = i; 1416 rxq->read = i;
1471 if (fill_rx) 1417 if (fill_rx)
1472 iwl3945_rx_replenish_now(priv); 1418 iwl3945_rx_replenish_now(priv);
1473 else 1419 else
@@ -1482,7 +1428,6 @@ static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1482 tasklet_kill(&priv->irq_tasklet); 1428 tasklet_kill(&priv->irq_tasklet);
1483} 1429}
1484 1430
1485#ifdef CONFIG_IWLWIFI_DEBUG
1486static const char *desc_lookup(int i) 1431static const char *desc_lookup(int i)
1487{ 1432{
1488 switch (i) { 1433 switch (i) {
@@ -1551,8 +1496,9 @@ void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1551 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", 1496 "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1552 desc_lookup(desc), desc, time, blink1, blink2, 1497 desc_lookup(desc), desc, time, blink1, blink2,
1553 ilink1, ilink2, data1); 1498 ilink1, ilink2, data1);
1499 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
1500 0, blink1, blink2, ilink1, ilink2);
1554 } 1501 }
1555
1556} 1502}
1557 1503
1558#define EVENT_START_OFFSET (6 * sizeof(u32)) 1504#define EVENT_START_OFFSET (6 * sizeof(u32))
@@ -1561,17 +1507,19 @@ void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1561 * iwl3945_print_event_log - Dump error event log to syslog 1507 * iwl3945_print_event_log - Dump error event log to syslog
1562 * 1508 *
1563 */ 1509 */
1564static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx, 1510static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1565 u32 num_events, u32 mode) 1511 u32 num_events, u32 mode,
1512 int pos, char **buf, size_t bufsz)
1566{ 1513{
1567 u32 i; 1514 u32 i;
1568 u32 base; /* SRAM byte address of event log header */ 1515 u32 base; /* SRAM byte address of event log header */
1569 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ 1516 u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
1570 u32 ptr; /* SRAM byte address of log data */ 1517 u32 ptr; /* SRAM byte address of log data */
1571 u32 ev, time, data; /* event log data */ 1518 u32 ev, time, data; /* event log data */
1519 unsigned long reg_flags;
1572 1520
1573 if (num_events == 0) 1521 if (num_events == 0)
1574 return; 1522 return pos;
1575 1523
1576 base = le32_to_cpu(priv->card_alive.log_event_table_ptr); 1524 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1577 1525
@@ -1582,25 +1530,96 @@ static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
1582 1530
1583 ptr = base + EVENT_START_OFFSET + (start_idx * event_size); 1531 ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
1584 1532
1533 /* Make sure device is powered up for SRAM reads */
1534 spin_lock_irqsave(&priv->reg_lock, reg_flags);
1535 iwl_grab_nic_access(priv);
1536
1537 /* Set starting address; reads will auto-increment */
1538 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
1539 rmb();
1540
1585 /* "time" is actually "data" for mode 0 (no timestamp). 1541 /* "time" is actually "data" for mode 0 (no timestamp).
1586 * place event id # at far right for easier visual parsing. */ 1542 * place event id # at far right for easier visual parsing. */
1587 for (i = 0; i < num_events; i++) { 1543 for (i = 0; i < num_events; i++) {
1588 ev = iwl_read_targ_mem(priv, ptr); 1544 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1589 ptr += sizeof(u32); 1545 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1590 time = iwl_read_targ_mem(priv, ptr);
1591 ptr += sizeof(u32);
1592 if (mode == 0) { 1546 if (mode == 0) {
1593 /* data, ev */ 1547 /* data, ev */
1594 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev); 1548 if (bufsz) {
1549 pos += scnprintf(*buf + pos, bufsz - pos,
1550 "0x%08x:%04u\n",
1551 time, ev);
1552 } else {
1553 IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
1554 trace_iwlwifi_dev_ucode_event(priv, 0,
1555 time, ev);
1556 }
1595 } else { 1557 } else {
1596 data = iwl_read_targ_mem(priv, ptr); 1558 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1597 ptr += sizeof(u32); 1559 if (bufsz) {
1598 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev); 1560 pos += scnprintf(*buf + pos, bufsz - pos,
1561 "%010u:0x%08x:%04u\n",
1562 time, data, ev);
1563 } else {
1564 IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
1565 time, data, ev);
1566 trace_iwlwifi_dev_ucode_event(priv, time,
1567 data, ev);
1568 }
1599 } 1569 }
1600 } 1570 }
1571
1572 /* Allow device to power down */
1573 iwl_release_nic_access(priv);
1574 spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
1575 return pos;
1601} 1576}
1602 1577
1603void iwl3945_dump_nic_event_log(struct iwl_priv *priv) 1578/**
1579 * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
1580 */
1581static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
1582 u32 num_wraps, u32 next_entry,
1583 u32 size, u32 mode,
1584 int pos, char **buf, size_t bufsz)
1585{
1586 /*
1587 * display the newest DEFAULT_LOG_ENTRIES entries
1588 * i.e the entries just before the next ont that uCode would fill.
1589 */
1590 if (num_wraps) {
1591 if (next_entry < size) {
1592 pos = iwl3945_print_event_log(priv,
1593 capacity - (size - next_entry),
1594 size - next_entry, mode,
1595 pos, buf, bufsz);
1596 pos = iwl3945_print_event_log(priv, 0,
1597 next_entry, mode,
1598 pos, buf, bufsz);
1599 } else
1600 pos = iwl3945_print_event_log(priv, next_entry - size,
1601 size, mode,
1602 pos, buf, bufsz);
1603 } else {
1604 if (next_entry < size)
1605 pos = iwl3945_print_event_log(priv, 0,
1606 next_entry, mode,
1607 pos, buf, bufsz);
1608 else
1609 pos = iwl3945_print_event_log(priv, next_entry - size,
1610 size, mode,
1611 pos, buf, bufsz);
1612 }
1613 return pos;
1614}
1615
1616/* For sanity check only. Actual size is determined by uCode, typ. 512 */
1617#define IWL3945_MAX_EVENT_LOG_SIZE (512)
1618
1619#define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
1620
1621int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
1622 char **buf, bool display)
1604{ 1623{
1605 u32 base; /* SRAM byte address of event log header */ 1624 u32 base; /* SRAM byte address of event log header */
1606 u32 capacity; /* event log capacity in # entries */ 1625 u32 capacity; /* event log capacity in # entries */
@@ -1608,11 +1627,13 @@ void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1608 u32 num_wraps; /* # times uCode wrapped to top of log */ 1627 u32 num_wraps; /* # times uCode wrapped to top of log */
1609 u32 next_entry; /* index of next entry to be written by uCode */ 1628 u32 next_entry; /* index of next entry to be written by uCode */
1610 u32 size; /* # entries that we'll print */ 1629 u32 size; /* # entries that we'll print */
1630 int pos = 0;
1631 size_t bufsz = 0;
1611 1632
1612 base = le32_to_cpu(priv->card_alive.log_event_table_ptr); 1633 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
1613 if (!iwl3945_hw_valid_rtc_data_addr(base)) { 1634 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1614 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); 1635 IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
1615 return; 1636 return -EINVAL;
1616 } 1637 }
1617 1638
1618 /* event log header */ 1639 /* event log header */
@@ -1621,37 +1642,72 @@ void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
1621 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); 1642 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
1622 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); 1643 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
1623 1644
1645 if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
1646 IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
1647 capacity, IWL3945_MAX_EVENT_LOG_SIZE);
1648 capacity = IWL3945_MAX_EVENT_LOG_SIZE;
1649 }
1650
1651 if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
1652 IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
1653 next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
1654 next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
1655 }
1656
1624 size = num_wraps ? capacity : next_entry; 1657 size = num_wraps ? capacity : next_entry;
1625 1658
1626 /* bail out if nothing in log */ 1659 /* bail out if nothing in log */
1627 if (size == 0) { 1660 if (size == 0) {
1628 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); 1661 IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
1629 return; 1662 return pos;
1630 } 1663 }
1631 1664
1632 IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n", 1665#ifdef CONFIG_IWLWIFI_DEBUG
1633 size, num_wraps); 1666 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
1634 1667 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1635 /* if uCode has wrapped back to top of log, start at the oldest entry, 1668 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1636 * i.e the next one that uCode would fill. */
1637 if (num_wraps)
1638 iwl3945_print_event_log(priv, next_entry,
1639 capacity - next_entry, mode);
1640
1641 /* (then/else) start at top of log */
1642 iwl3945_print_event_log(priv, 0, next_entry, mode);
1643
1644}
1645#else 1669#else
1646void iwl3945_dump_nic_event_log(struct iwl_priv *priv) 1670 size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
1647{ 1671 ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
1648} 1672#endif
1649 1673
1650void iwl3945_dump_nic_error_log(struct iwl_priv *priv) 1674 IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
1651{ 1675 size);
1652}
1653 1676
1677#ifdef CONFIG_IWLWIFI_DEBUG
1678 if (display) {
1679 if (full_log)
1680 bufsz = capacity * 48;
1681 else
1682 bufsz = size * 48;
1683 *buf = kmalloc(bufsz, GFP_KERNEL);
1684 if (!*buf)
1685 return -ENOMEM;
1686 }
1687 if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
1688 /* if uCode has wrapped back to top of log,
1689 * start at the oldest entry,
1690 * i.e the next one that uCode would fill.
1691 */
1692 if (num_wraps)
1693 pos = iwl3945_print_event_log(priv, next_entry,
1694 capacity - next_entry, mode,
1695 pos, buf, bufsz);
1696
1697 /* (then/else) start at top of log */
1698 pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
1699 pos, buf, bufsz);
1700 } else
1701 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1702 next_entry, size, mode,
1703 pos, buf, bufsz);
1704#else
1705 pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
1706 next_entry, size, mode,
1707 pos, buf, bufsz);
1654#endif 1708#endif
1709 return pos;
1710}
1655 1711
1656static void iwl3945_irq_tasklet(struct iwl_priv *priv) 1712static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1657{ 1713{
@@ -1685,6 +1741,8 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1685 } 1741 }
1686#endif 1742#endif
1687 1743
1744 spin_unlock_irqrestore(&priv->lock, flags);
1745
1688 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not 1746 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1689 * atomic, make sure that inta covers all the interrupts that 1747 * atomic, make sure that inta covers all the interrupts that
1690 * we've discovered, even if FH interrupt came in just after 1748 * we've discovered, even if FH interrupt came in just after
@@ -1706,8 +1764,6 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1706 1764
1707 handled |= CSR_INT_BIT_HW_ERR; 1765 handled |= CSR_INT_BIT_HW_ERR;
1708 1766
1709 spin_unlock_irqrestore(&priv->lock, flags);
1710
1711 return; 1767 return;
1712 } 1768 }
1713 1769
@@ -1799,7 +1855,6 @@ static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1799 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 1855 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1800 } 1856 }
1801#endif 1857#endif
1802 spin_unlock_irqrestore(&priv->lock, flags);
1803} 1858}
1804 1859
1805static int iwl3945_get_channels_for_scan(struct iwl_priv *priv, 1860static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
@@ -1901,7 +1956,7 @@ static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1901{ 1956{
1902 int i; 1957 int i;
1903 1958
1904 for (i = 0; i < IWL_RATE_COUNT; i++) { 1959 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1905 rates[i].bitrate = iwl3945_rates[i].ieee * 5; 1960 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1906 rates[i].hw_value = i; /* Rate scaling will work on indexes */ 1961 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1907 rates[i].hw_value_short = i; 1962 rates[i].hw_value_short = i;
@@ -2158,6 +2213,14 @@ static int iwl3945_read_ucode(struct iwl_priv *priv)
2158 IWL_UCODE_API(priv->ucode_ver), 2213 IWL_UCODE_API(priv->ucode_ver),
2159 IWL_UCODE_SERIAL(priv->ucode_ver)); 2214 IWL_UCODE_SERIAL(priv->ucode_ver));
2160 2215
2216 snprintf(priv->hw->wiphy->fw_version,
2217 sizeof(priv->hw->wiphy->fw_version),
2218 "%u.%u.%u.%u",
2219 IWL_UCODE_MAJOR(priv->ucode_ver),
2220 IWL_UCODE_MINOR(priv->ucode_ver),
2221 IWL_UCODE_API(priv->ucode_ver),
2222 IWL_UCODE_SERIAL(priv->ucode_ver));
2223
2161 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", 2224 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
2162 priv->ucode_ver); 2225 priv->ucode_ver);
2163 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n", 2226 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
@@ -2458,7 +2521,7 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2458 priv->active_rate = priv->rates_mask; 2521 priv->active_rate = priv->rates_mask;
2459 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK; 2522 priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
2460 2523
2461 iwl_power_update_mode(priv, false); 2524 iwl_power_update_mode(priv, true);
2462 2525
2463 if (iwl_is_associated(priv)) { 2526 if (iwl_is_associated(priv)) {
2464 struct iwl3945_rxon_cmd *active_rxon = 2527 struct iwl3945_rxon_cmd *active_rxon =
@@ -2479,7 +2542,7 @@ static void iwl3945_alive_start(struct iwl_priv *priv)
2479 2542
2480 iwl3945_reg_txpower_periodic(priv); 2543 iwl3945_reg_txpower_periodic(priv);
2481 2544
2482 iwl3945_led_register(priv); 2545 iwl_leds_init(priv);
2483 2546
2484 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); 2547 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2485 set_bit(STATUS_READY, &priv->status); 2548 set_bit(STATUS_READY, &priv->status);
@@ -2517,7 +2580,6 @@ static void __iwl3945_down(struct iwl_priv *priv)
2517 if (!exit_pending) 2580 if (!exit_pending)
2518 set_bit(STATUS_EXIT_PENDING, &priv->status); 2581 set_bit(STATUS_EXIT_PENDING, &priv->status);
2519 2582
2520 iwl3945_led_unregister(priv);
2521 iwl_clear_stations_table(priv); 2583 iwl_clear_stations_table(priv);
2522 2584
2523 /* Unblock any waiting calls */ 2585 /* Unblock any waiting calls */
@@ -2563,23 +2625,15 @@ static void __iwl3945_down(struct iwl_priv *priv)
2563 test_bit(STATUS_EXIT_PENDING, &priv->status) << 2625 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2564 STATUS_EXIT_PENDING; 2626 STATUS_EXIT_PENDING;
2565 2627
2566 priv->cfg->ops->lib->apm_ops.reset(priv);
2567 spin_lock_irqsave(&priv->lock, flags);
2568 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2569 spin_unlock_irqrestore(&priv->lock, flags);
2570
2571 iwl3945_hw_txq_ctx_stop(priv); 2628 iwl3945_hw_txq_ctx_stop(priv);
2572 iwl3945_hw_rxq_stop(priv); 2629 iwl3945_hw_rxq_stop(priv);
2573 2630
2574 iwl_write_prph(priv, APMG_CLK_DIS_REG, 2631 /* Power-down device's busmaster DMA clocks */
2575 APMG_CLK_VAL_DMA_CLK_RQT); 2632 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2576
2577 udelay(5); 2633 udelay(5);
2578 2634
2579 if (exit_pending) 2635 /* Stop the device, and put it in low power state */
2580 priv->cfg->ops->lib->apm_ops.stop(priv); 2636 priv->cfg->ops->lib->apm_ops.stop(priv);
2581 else
2582 priv->cfg->ops->lib->apm_ops.reset(priv);
2583 2637
2584 exit: 2638 exit:
2585 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); 2639 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
@@ -2724,19 +2778,34 @@ static void iwl3945_bg_alive_start(struct work_struct *data)
2724 mutex_unlock(&priv->mutex); 2778 mutex_unlock(&priv->mutex);
2725} 2779}
2726 2780
2781/*
2782 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2783 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2784 * *is* readable even when device has been SW_RESET into low power mode
2785 * (e.g. during RF KILL).
2786 */
2727static void iwl3945_rfkill_poll(struct work_struct *data) 2787static void iwl3945_rfkill_poll(struct work_struct *data)
2728{ 2788{
2729 struct iwl_priv *priv = 2789 struct iwl_priv *priv =
2730 container_of(data, struct iwl_priv, rfkill_poll.work); 2790 container_of(data, struct iwl_priv, rfkill_poll.work);
2791 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2792 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2793 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2731 2794
2732 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 2795 if (new_rfkill != old_rfkill) {
2733 clear_bit(STATUS_RF_KILL_HW, &priv->status); 2796 if (new_rfkill)
2734 else 2797 set_bit(STATUS_RF_KILL_HW, &priv->status);
2735 set_bit(STATUS_RF_KILL_HW, &priv->status); 2798 else
2799 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2736 2800
2737 wiphy_rfkill_set_hw_state(priv->hw->wiphy, 2801 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2738 test_bit(STATUS_RF_KILL_HW, &priv->status));
2739 2802
2803 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2804 new_rfkill ? "disable radio" : "enable radio");
2805 }
2806
2807 /* Keep this running, even if radio now enabled. This will be
2808 * cancelled in mac_start() if system decides to start again */
2740 queue_delayed_work(priv->workqueue, &priv->rfkill_poll, 2809 queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
2741 round_jiffies_relative(2 * HZ)); 2810 round_jiffies_relative(2 * HZ));
2742 2811
@@ -2898,7 +2967,8 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
2898 * is marked passive, we can do active scanning if we 2967 * is marked passive, we can do active scanning if we
2899 * detect transmissions. 2968 * detect transmissions.
2900 */ 2969 */
2901 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0; 2970 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2971 IWL_GOOD_CRC_TH_DISABLED;
2902 band = IEEE80211_BAND_5GHZ; 2972 band = IEEE80211_BAND_5GHZ;
2903 } else { 2973 } else {
2904 IWL_WARN(priv, "Invalid scan band count\n"); 2974 IWL_WARN(priv, "Invalid scan band count\n");
@@ -2957,18 +3027,6 @@ static void iwl3945_bg_request_scan(struct work_struct *data)
2957 mutex_unlock(&priv->mutex); 3027 mutex_unlock(&priv->mutex);
2958} 3028}
2959 3029
2960static void iwl3945_bg_up(struct work_struct *data)
2961{
2962 struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
2963
2964 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2965 return;
2966
2967 mutex_lock(&priv->mutex);
2968 __iwl3945_up(priv);
2969 mutex_unlock(&priv->mutex);
2970}
2971
2972static void iwl3945_bg_restart(struct work_struct *data) 3030static void iwl3945_bg_restart(struct work_struct *data)
2973{ 3031{
2974 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); 3032 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
@@ -2985,7 +3043,13 @@ static void iwl3945_bg_restart(struct work_struct *data)
2985 ieee80211_restart_hw(priv->hw); 3043 ieee80211_restart_hw(priv->hw);
2986 } else { 3044 } else {
2987 iwl3945_down(priv); 3045 iwl3945_down(priv);
2988 queue_work(priv->workqueue, &priv->up); 3046
3047 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3048 return;
3049
3050 mutex_lock(&priv->mutex);
3051 __iwl3945_up(priv);
3052 mutex_unlock(&priv->mutex);
2989 } 3053 }
2990} 3054}
2991 3055
@@ -3152,6 +3216,8 @@ static int iwl3945_mac_start(struct ieee80211_hw *hw)
3152 * no need to poll the killswitch state anymore */ 3216 * no need to poll the killswitch state anymore */
3153 cancel_delayed_work(&priv->rfkill_poll); 3217 cancel_delayed_work(&priv->rfkill_poll);
3154 3218
3219 iwl_led_start(priv);
3220
3155 priv->is_open = 1; 3221 priv->is_open = 1;
3156 IWL_DEBUG_MAC80211(priv, "leave\n"); 3222 IWL_DEBUG_MAC80211(priv, "leave\n");
3157 return 0; 3223 return 0;
@@ -3487,8 +3553,6 @@ static ssize_t store_filter_flags(struct device *d,
3487static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, 3553static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
3488 store_filter_flags); 3554 store_filter_flags);
3489 3555
3490#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3491
3492static ssize_t show_measurement(struct device *d, 3556static ssize_t show_measurement(struct device *d,
3493 struct device_attribute *attr, char *buf) 3557 struct device_attribute *attr, char *buf)
3494{ 3558{
@@ -3558,7 +3622,6 @@ static ssize_t store_measurement(struct device *d,
3558 3622
3559static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, 3623static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3560 show_measurement, store_measurement); 3624 show_measurement, store_measurement);
3561#endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
3562 3625
3563static ssize_t store_retry_rate(struct device *d, 3626static ssize_t store_retry_rate(struct device *d,
3564 struct device_attribute *attr, 3627 struct device_attribute *attr,
@@ -3606,7 +3669,7 @@ static ssize_t show_statistics(struct device *d,
3606 return -EAGAIN; 3669 return -EAGAIN;
3607 3670
3608 mutex_lock(&priv->mutex); 3671 mutex_lock(&priv->mutex);
3609 rc = iwl_send_statistics_request(priv, 0); 3672 rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
3610 mutex_unlock(&priv->mutex); 3673 mutex_unlock(&priv->mutex);
3611 3674
3612 if (rc) { 3675 if (rc) {
@@ -3707,7 +3770,6 @@ static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3707 3770
3708 init_waitqueue_head(&priv->wait_command_queue); 3771 init_waitqueue_head(&priv->wait_command_queue);
3709 3772
3710 INIT_WORK(&priv->up, iwl3945_bg_up);
3711 INIT_WORK(&priv->restart, iwl3945_bg_restart); 3773 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3712 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish); 3774 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3713 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update); 3775 INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
@@ -3741,9 +3803,7 @@ static struct attribute *iwl3945_sysfs_entries[] = {
3741 &dev_attr_dump_errors.attr, 3803 &dev_attr_dump_errors.attr,
3742 &dev_attr_flags.attr, 3804 &dev_attr_flags.attr,
3743 &dev_attr_filter_flags.attr, 3805 &dev_attr_filter_flags.attr,
3744#ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
3745 &dev_attr_measurement.attr, 3806 &dev_attr_measurement.attr,
3746#endif
3747 &dev_attr_retry_rate.attr, 3807 &dev_attr_retry_rate.attr,
3748 &dev_attr_statistics.attr, 3808 &dev_attr_statistics.attr,
3749 &dev_attr_status.attr, 3809 &dev_attr_status.attr,
@@ -3769,7 +3829,6 @@ static struct ieee80211_ops iwl3945_hw_ops = {
3769 .config = iwl_mac_config, 3829 .config = iwl_mac_config,
3770 .configure_filter = iwl_configure_filter, 3830 .configure_filter = iwl_configure_filter,
3771 .set_key = iwl3945_mac_set_key, 3831 .set_key = iwl3945_mac_set_key,
3772 .get_tx_stats = iwl_mac_get_tx_stats,
3773 .conf_tx = iwl_mac_conf_tx, 3832 .conf_tx = iwl_mac_conf_tx,
3774 .reset_tsf = iwl_mac_reset_tsf, 3833 .reset_tsf = iwl_mac_reset_tsf,
3775 .bss_info_changed = iwl_bss_info_changed, 3834 .bss_info_changed = iwl_bss_info_changed,
@@ -3784,23 +3843,23 @@ static int iwl3945_init_drv(struct iwl_priv *priv)
3784 priv->retry_rate = 1; 3843 priv->retry_rate = 1;
3785 priv->ibss_beacon = NULL; 3844 priv->ibss_beacon = NULL;
3786 3845
3787 spin_lock_init(&priv->lock);
3788 spin_lock_init(&priv->sta_lock); 3846 spin_lock_init(&priv->sta_lock);
3789 spin_lock_init(&priv->hcmd_lock); 3847 spin_lock_init(&priv->hcmd_lock);
3790 3848
3791 INIT_LIST_HEAD(&priv->free_frames); 3849 INIT_LIST_HEAD(&priv->free_frames);
3792 3850
3793 mutex_init(&priv->mutex); 3851 mutex_init(&priv->mutex);
3852 mutex_init(&priv->sync_cmd_mutex);
3794 3853
3795 /* Clear the driver's (not device's) station table */ 3854 /* Clear the driver's (not device's) station table */
3796 iwl_clear_stations_table(priv); 3855 iwl_clear_stations_table(priv);
3797 3856
3798 priv->data_retry_limit = -1;
3799 priv->ieee_channels = NULL; 3857 priv->ieee_channels = NULL;
3800 priv->ieee_rates = NULL; 3858 priv->ieee_rates = NULL;
3801 priv->band = IEEE80211_BAND_2GHZ; 3859 priv->band = IEEE80211_BAND_2GHZ;
3802 3860
3803 priv->iw_mode = NL80211_IFTYPE_STATION; 3861 priv->iw_mode = NL80211_IFTYPE_STATION;
3862 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3804 3863
3805 iwl_reset_qos(priv); 3864 iwl_reset_qos(priv);
3806 3865
@@ -3854,18 +3913,18 @@ static int iwl3945_setup_mac(struct iwl_priv *priv)
3854 /* Tell mac80211 our characteristics */ 3913 /* Tell mac80211 our characteristics */
3855 hw->flags = IEEE80211_HW_SIGNAL_DBM | 3914 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3856 IEEE80211_HW_NOISE_DBM | 3915 IEEE80211_HW_NOISE_DBM |
3857 IEEE80211_HW_SPECTRUM_MGMT | 3916 IEEE80211_HW_SPECTRUM_MGMT;
3858 IEEE80211_HW_SUPPORTS_PS | 3917
3859 IEEE80211_HW_SUPPORTS_DYNAMIC_PS; 3918 if (!priv->cfg->broken_powersave)
3919 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3920 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3860 3921
3861 hw->wiphy->interface_modes = 3922 hw->wiphy->interface_modes =
3862 BIT(NL80211_IFTYPE_STATION) | 3923 BIT(NL80211_IFTYPE_STATION) |
3863 BIT(NL80211_IFTYPE_ADHOC); 3924 BIT(NL80211_IFTYPE_ADHOC);
3864 3925
3865 hw->wiphy->custom_regulatory = true; 3926 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3866 3927 WIPHY_FLAG_DISABLE_BEACON_HINTS;
3867 /* Firmware does not support this */
3868 hw->wiphy->disable_beacon_hints = true;
3869 3928
3870 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; 3929 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3871 /* we create the 802.11 header and a zero-length SSID element */ 3930 /* we create the 802.11 header and a zero-length SSID element */
@@ -3977,17 +4036,18 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
3977 * PCI Tx retries from interfering with C3 CPU state */ 4036 * PCI Tx retries from interfering with C3 CPU state */
3978 pci_write_config_byte(pdev, 0x41, 0x00); 4037 pci_write_config_byte(pdev, 0x41, 0x00);
3979 4038
3980 /* this spin lock will be used in apm_ops.init and EEPROM access 4039 /* these spin locks will be used in apm_ops.init and EEPROM access
3981 * we should init now 4040 * we should init now
3982 */ 4041 */
3983 spin_lock_init(&priv->reg_lock); 4042 spin_lock_init(&priv->reg_lock);
4043 spin_lock_init(&priv->lock);
3984 4044
3985 /* amp init */ 4045 /*
3986 err = priv->cfg->ops->lib->apm_ops.init(priv); 4046 * stop and reset the on-board processor just in case it is in a
3987 if (err < 0) { 4047 * strange state ... like being left stranded by a primary kernel
3988 IWL_DEBUG_INFO(priv, "Failed to init the card\n"); 4048 * and this is now the kdump kernel trying to start up
3989 goto out_iounmap; 4049 */
3990 } 4050 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3991 4051
3992 /*********************** 4052 /***********************
3993 * 4. Read EEPROM 4053 * 4. Read EEPROM
@@ -4054,6 +4114,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
4054 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]); 4114 &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
4055 iwl3945_setup_deferred_work(priv); 4115 iwl3945_setup_deferred_work(priv);
4056 iwl3945_setup_rx_handlers(priv); 4116 iwl3945_setup_rx_handlers(priv);
4117 iwl_power_initialize(priv);
4057 4118
4058 /********************************* 4119 /*********************************
4059 * 8. Setup and Register mac80211 4120 * 8. Setup and Register mac80211
@@ -4124,6 +4185,15 @@ static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
4124 iwl3945_down(priv); 4185 iwl3945_down(priv);
4125 } 4186 }
4126 4187
4188 /*
4189 * Make sure device is reset to low power before unloading driver.
4190 * This may be redundant with iwl_down(), but there are paths to
4191 * run iwl_down() without calling apm_ops.stop(), and there are
4192 * paths to avoid running iwl_down() at all before leaving driver.
4193 * This (inexpensive) call *makes sure* device is reset.
4194 */
4195 priv->cfg->ops->lib->apm_ops.stop(priv);
4196
4127 /* make sure we flush any pending irq or 4197 /* make sure we flush any pending irq or
4128 * tasklet for the driver 4198 * tasklet for the driver
4129 */ 4199 */
@@ -4226,18 +4296,19 @@ static void __exit iwl3945_exit(void)
4226 4296
4227MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX)); 4297MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4228 4298
4229module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444); 4299module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4230MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); 4300MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4231module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444); 4301module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4232MODULE_PARM_DESC(swcrypto, 4302MODULE_PARM_DESC(swcrypto,
4233 "using software crypto (default 1 [software])\n"); 4303 "using software crypto (default 1 [software])\n");
4234#ifdef CONFIG_IWLWIFI_DEBUG 4304#ifdef CONFIG_IWLWIFI_DEBUG
4235module_param_named(debug, iwl_debug_level, uint, 0644); 4305module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4236MODULE_PARM_DESC(debug, "debug output mask"); 4306MODULE_PARM_DESC(debug, "debug output mask");
4237#endif 4307#endif
4238module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444); 4308module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4309 int, S_IRUGO);
4239MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); 4310MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4240module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444); 4311module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4241MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error"); 4312MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
4242 4313
4243module_exit(iwl3945_exit); 4314module_exit(iwl3945_exit);
diff --git a/drivers/net/wireless/iwmc3200wifi/Kconfig b/drivers/net/wireless/iwmc3200wifi/Kconfig
index c25a04371ca8..b9d34a766964 100644
--- a/drivers/net/wireless/iwmc3200wifi/Kconfig
+++ b/drivers/net/wireless/iwmc3200wifi/Kconfig
@@ -1,8 +1,9 @@
1config IWM 1config IWM
2 tristate "Intel Wireless Multicomm 3200 WiFi driver" 2 tristate "Intel Wireless Multicomm 3200 WiFi driver"
3 depends on MMC && WLAN_80211 && EXPERIMENTAL 3 depends on MMC && EXPERIMENTAL
4 depends on CFG80211 4 depends on CFG80211
5 select FW_LOADER 5 select FW_LOADER
6 select IWMC3200TOP
6 help 7 help
7 The Intel Wireless Multicomm 3200 hardware is a combo 8 The Intel Wireless Multicomm 3200 hardware is a combo
8 card with GPS, Bluetooth, WiMax and 802.11 radios. It 9 card with GPS, Bluetooth, WiMax and 802.11 radios. It
diff --git a/drivers/net/wireless/iwmc3200wifi/cfg80211.c b/drivers/net/wireless/iwmc3200wifi/cfg80211.c
index f3c55658225b..a1d45cce0ebc 100644
--- a/drivers/net/wireless/iwmc3200wifi/cfg80211.c
+++ b/drivers/net/wireless/iwmc3200wifi/cfg80211.c
@@ -27,6 +27,7 @@
27#include <linux/etherdevice.h> 27#include <linux/etherdevice.h>
28#include <linux/wireless.h> 28#include <linux/wireless.h>
29#include <linux/ieee80211.h> 29#include <linux/ieee80211.h>
30#include <linux/slab.h>
30#include <net/cfg80211.h> 31#include <net/cfg80211.h>
31 32
32#include "iwm.h" 33#include "iwm.h"
@@ -405,39 +406,21 @@ static int iwm_cfg80211_join_ibss(struct wiphy *wiphy, struct net_device *dev,
405{ 406{
406 struct iwm_priv *iwm = wiphy_to_iwm(wiphy); 407 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
407 struct ieee80211_channel *chan = params->channel; 408 struct ieee80211_channel *chan = params->channel;
408 struct cfg80211_bss *bss;
409 409
410 if (!test_bit(IWM_STATUS_READY, &iwm->status)) 410 if (!test_bit(IWM_STATUS_READY, &iwm->status))
411 return -EIO; 411 return -EIO;
412 412
413 /* UMAC doesn't support creating IBSS network with specified bssid. 413 /* UMAC doesn't support creating or joining an IBSS network
414 * This should be removed after we have join only mode supported. */ 414 * with specified bssid. */
415 if (params->bssid) 415 if (params->bssid)
416 return -EOPNOTSUPP; 416 return -EOPNOTSUPP;
417 417
418 bss = cfg80211_get_ibss(iwm_to_wiphy(iwm), NULL,
419 params->ssid, params->ssid_len);
420 if (!bss) {
421 iwm_scan_one_ssid(iwm, params->ssid, params->ssid_len);
422 schedule_timeout_interruptible(2 * HZ);
423 bss = cfg80211_get_ibss(iwm_to_wiphy(iwm), NULL,
424 params->ssid, params->ssid_len);
425 }
426 /* IBSS join only mode is not supported by UMAC ATM */
427 if (bss) {
428 cfg80211_put_bss(bss);
429 return -EOPNOTSUPP;
430 }
431
432 iwm->channel = ieee80211_frequency_to_channel(chan->center_freq); 418 iwm->channel = ieee80211_frequency_to_channel(chan->center_freq);
433 iwm->umac_profile->ibss.band = chan->band; 419 iwm->umac_profile->ibss.band = chan->band;
434 iwm->umac_profile->ibss.channel = iwm->channel; 420 iwm->umac_profile->ibss.channel = iwm->channel;
435 iwm->umac_profile->ssid.ssid_len = params->ssid_len; 421 iwm->umac_profile->ssid.ssid_len = params->ssid_len;
436 memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len); 422 memcpy(iwm->umac_profile->ssid.ssid, params->ssid, params->ssid_len);
437 423
438 if (params->bssid)
439 memcpy(&iwm->umac_profile->bssid[0], params->bssid, ETH_ALEN);
440
441 return iwm_send_mlme_profile(iwm); 424 return iwm_send_mlme_profile(iwm);
442} 425}
443 426
@@ -490,12 +473,12 @@ static int iwm_set_wpa_version(struct iwm_priv *iwm, u32 wpa_version)
490 return 0; 473 return 0;
491 } 474 }
492 475
476 if (wpa_version & NL80211_WPA_VERSION_1)
477 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_WPA_ON_MSK;
478
493 if (wpa_version & NL80211_WPA_VERSION_2) 479 if (wpa_version & NL80211_WPA_VERSION_2)
494 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_RSNA_ON_MSK; 480 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_RSNA_ON_MSK;
495 481
496 if (wpa_version & NL80211_WPA_VERSION_1)
497 iwm->umac_profile->sec.flags |= UMAC_SEC_FLG_WPA_ON_MSK;
498
499 return 0; 482 return 0;
500} 483}
501 484
@@ -646,6 +629,13 @@ static int iwm_cfg80211_connect(struct wiphy *wiphy, struct net_device *dev,
646 iwm->default_key = sme->key_idx; 629 iwm->default_key = sme->key_idx;
647 } 630 }
648 631
632 /* WPA and open AUTH type from wpa_s means WPS (a.k.a. WSC) */
633 if ((iwm->umac_profile->sec.flags &
634 (UMAC_SEC_FLG_WPA_ON_MSK | UMAC_SEC_FLG_RSNA_ON_MSK)) &&
635 iwm->umac_profile->sec.auth_type == UMAC_AUTH_TYPE_OPEN) {
636 iwm->umac_profile->sec.flags = UMAC_SEC_FLG_WSC_ON_MSK;
637 }
638
649 ret = iwm_send_mlme_profile(iwm); 639 ret = iwm_send_mlme_profile(iwm);
650 640
651 if (iwm->umac_profile->sec.auth_type != UMAC_AUTH_TYPE_LEGACY_PSK || 641 if (iwm->umac_profile->sec.auth_type != UMAC_AUTH_TYPE_LEGACY_PSK ||
@@ -682,10 +672,24 @@ static int iwm_cfg80211_disconnect(struct wiphy *wiphy, struct net_device *dev,
682static int iwm_cfg80211_set_txpower(struct wiphy *wiphy, 672static int iwm_cfg80211_set_txpower(struct wiphy *wiphy,
683 enum tx_power_setting type, int dbm) 673 enum tx_power_setting type, int dbm)
684{ 674{
675 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
676 int ret;
677
685 switch (type) { 678 switch (type) {
686 case TX_POWER_AUTOMATIC: 679 case TX_POWER_AUTOMATIC:
687 return 0; 680 return 0;
681 case TX_POWER_FIXED:
682 if (!test_bit(IWM_STATUS_READY, &iwm->status))
683 return 0;
684
685 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
686 CFG_TX_PWR_LIMIT_USR, dbm * 2);
687 if (ret < 0)
688 return ret;
689
690 return iwm_tx_power_trigger(iwm);
688 default: 691 default:
692 IWM_ERR(iwm, "Unsupported power type: %d\n", type);
689 return -EOPNOTSUPP; 693 return -EOPNOTSUPP;
690 } 694 }
691 695
@@ -696,7 +700,7 @@ static int iwm_cfg80211_get_txpower(struct wiphy *wiphy, int *dbm)
696{ 700{
697 struct iwm_priv *iwm = wiphy_to_iwm(wiphy); 701 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
698 702
699 *dbm = iwm->txpower; 703 *dbm = iwm->txpower >> 1;
700 704
701 return 0; 705 return 0;
702} 706}
@@ -722,6 +726,33 @@ static int iwm_cfg80211_set_power_mgmt(struct wiphy *wiphy,
722 CFG_POWER_INDEX, iwm->conf.power_index); 726 CFG_POWER_INDEX, iwm->conf.power_index);
723} 727}
724 728
729int iwm_cfg80211_set_pmksa(struct wiphy *wiphy, struct net_device *netdev,
730 struct cfg80211_pmksa *pmksa)
731{
732 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
733
734 return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_ADD);
735}
736
737int iwm_cfg80211_del_pmksa(struct wiphy *wiphy, struct net_device *netdev,
738 struct cfg80211_pmksa *pmksa)
739{
740 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
741
742 return iwm_send_pmkid_update(iwm, pmksa, IWM_CMD_PMKID_DEL);
743}
744
745int iwm_cfg80211_flush_pmksa(struct wiphy *wiphy, struct net_device *netdev)
746{
747 struct iwm_priv *iwm = wiphy_to_iwm(wiphy);
748 struct cfg80211_pmksa pmksa;
749
750 memset(&pmksa, 0, sizeof(struct cfg80211_pmksa));
751
752 return iwm_send_pmkid_update(iwm, &pmksa, IWM_CMD_PMKID_FLUSH);
753}
754
755
725static struct cfg80211_ops iwm_cfg80211_ops = { 756static struct cfg80211_ops iwm_cfg80211_ops = {
726 .change_virtual_intf = iwm_cfg80211_change_iface, 757 .change_virtual_intf = iwm_cfg80211_change_iface,
727 .add_key = iwm_cfg80211_add_key, 758 .add_key = iwm_cfg80211_add_key,
@@ -738,6 +769,9 @@ static struct cfg80211_ops iwm_cfg80211_ops = {
738 .set_tx_power = iwm_cfg80211_set_txpower, 769 .set_tx_power = iwm_cfg80211_set_txpower,
739 .get_tx_power = iwm_cfg80211_get_txpower, 770 .get_tx_power = iwm_cfg80211_get_txpower,
740 .set_power_mgmt = iwm_cfg80211_set_power_mgmt, 771 .set_power_mgmt = iwm_cfg80211_set_power_mgmt,
772 .set_pmksa = iwm_cfg80211_set_pmksa,
773 .del_pmksa = iwm_cfg80211_del_pmksa,
774 .flush_pmksa = iwm_cfg80211_flush_pmksa,
741}; 775};
742 776
743static const u32 cipher_suites[] = { 777static const u32 cipher_suites[] = {
@@ -783,6 +817,7 @@ struct wireless_dev *iwm_wdev_alloc(int sizeof_bus, struct device *dev)
783 817
784 set_wiphy_dev(wdev->wiphy, dev); 818 set_wiphy_dev(wdev->wiphy, dev);
785 wdev->wiphy->max_scan_ssids = UMAC_WIFI_IF_PROBE_OPTION_MAX; 819 wdev->wiphy->max_scan_ssids = UMAC_WIFI_IF_PROBE_OPTION_MAX;
820 wdev->wiphy->max_num_pmkids = UMAC_MAX_NUM_PMKIDS;
786 wdev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | 821 wdev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
787 BIT(NL80211_IFTYPE_ADHOC); 822 BIT(NL80211_IFTYPE_ADHOC);
788 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &iwm_band_2ghz; 823 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &iwm_band_2ghz;
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.c b/drivers/net/wireless/iwmc3200wifi/commands.c
index 84158b6d35d8..42df7262f9f7 100644
--- a/drivers/net/wireless/iwmc3200wifi/commands.c
+++ b/drivers/net/wireless/iwmc3200wifi/commands.c
@@ -41,6 +41,7 @@
41#include <linux/etherdevice.h> 41#include <linux/etherdevice.h>
42#include <linux/ieee80211.h> 42#include <linux/ieee80211.h>
43#include <linux/sched.h> 43#include <linux/sched.h>
44#include <linux/slab.h>
44 45
45#include "iwm.h" 46#include "iwm.h"
46#include "bus.h" 47#include "bus.h"
@@ -77,6 +78,11 @@ int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size,
77 int ret; 78 int ret;
78 u8 oid = hdr->oid; 79 u8 oid = hdr->oid;
79 80
81 if (!test_bit(IWM_STATUS_READY, &iwm->status)) {
82 IWM_ERR(iwm, "Interface is not ready yet");
83 return -EAGAIN;
84 }
85
80 umac_cmd.id = UMAC_CMD_OPCODE_WIFI_IF_WRAPPER; 86 umac_cmd.id = UMAC_CMD_OPCODE_WIFI_IF_WRAPPER;
81 umac_cmd.resp = resp; 87 umac_cmd.resp = resp;
82 88
@@ -94,6 +100,10 @@ int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size,
94 return ret; 100 return ret;
95} 101}
96 102
103static int modparam_wiwi = COEX_MODE_CM;
104module_param_named(wiwi, modparam_wiwi, int, 0644);
105MODULE_PARM_DESC(wiwi, "Wifi-WiMAX coexistence: 1=SA, 2=XOR, 3=CM (default)");
106
97static struct coex_event iwm_sta_xor_prio_tbl[COEX_EVENTS_NUM] = 107static struct coex_event iwm_sta_xor_prio_tbl[COEX_EVENTS_NUM] =
98{ 108{
99 {4, 3, 0, COEX_UNASSOC_IDLE_FLAGS}, 109 {4, 3, 0, COEX_UNASSOC_IDLE_FLAGS},
@@ -117,18 +127,18 @@ static struct coex_event iwm_sta_xor_prio_tbl[COEX_EVENTS_NUM] =
117static struct coex_event iwm_sta_cm_prio_tbl[COEX_EVENTS_NUM] = 127static struct coex_event iwm_sta_cm_prio_tbl[COEX_EVENTS_NUM] =
118{ 128{
119 {1, 1, 0, COEX_UNASSOC_IDLE_FLAGS}, 129 {1, 1, 0, COEX_UNASSOC_IDLE_FLAGS},
120 {4, 3, 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS}, 130 {4, 4, 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
121 {3, 3, 0, COEX_UNASSOC_AUTO_SCAN_FLAGS}, 131 {3, 3, 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
122 {5, 5, 0, COEX_CALIBRATION_FLAGS}, 132 {6, 6, 0, COEX_CALIBRATION_FLAGS},
123 {3, 3, 0, COEX_PERIODIC_CALIBRATION_FLAGS}, 133 {3, 3, 0, COEX_PERIODIC_CALIBRATION_FLAGS},
124 {5, 4, 0, COEX_CONNECTION_ESTAB_FLAGS}, 134 {6, 5, 0, COEX_CONNECTION_ESTAB_FLAGS},
125 {4, 4, 0, COEX_ASSOCIATED_IDLE_FLAGS}, 135 {4, 4, 0, COEX_ASSOCIATED_IDLE_FLAGS},
126 {4, 4, 0, COEX_ASSOC_MANUAL_SCAN_FLAGS}, 136 {4, 4, 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
127 {4, 4, 0, COEX_ASSOC_AUTO_SCAN_FLAGS}, 137 {4, 4, 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
128 {4, 4, 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS}, 138 {4, 4, 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
129 {1, 1, 0, COEX_RF_ON_FLAGS}, 139 {1, 1, 0, COEX_RF_ON_FLAGS},
130 {1, 1, 0, COEX_RF_OFF_FLAGS}, 140 {1, 1, 0, COEX_RF_OFF_FLAGS},
131 {6, 6, 0, COEX_STAND_ALONE_DEBUG_FLAGS}, 141 {7, 7, 0, COEX_STAND_ALONE_DEBUG_FLAGS},
132 {5, 4, 0, COEX_IPAN_ASSOC_LEVEL_FLAGS}, 142 {5, 4, 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
133 {1, 1, 0, COEX_RSRVD1_FLAGS}, 143 {1, 1, 0, COEX_RSRVD1_FLAGS},
134 {1, 1, 0, COEX_RSRVD2_FLAGS} 144 {1, 1, 0, COEX_RSRVD2_FLAGS}
@@ -143,7 +153,7 @@ int iwm_send_prio_table(struct iwm_priv *iwm)
143 153
144 coex_table_cmd.flags = COEX_FLAGS_STA_TABLE_VALID_MSK; 154 coex_table_cmd.flags = COEX_FLAGS_STA_TABLE_VALID_MSK;
145 155
146 switch (iwm->conf.coexist_mode) { 156 switch (modparam_wiwi) {
147 case COEX_MODE_XOR: 157 case COEX_MODE_XOR:
148 case COEX_MODE_CM: 158 case COEX_MODE_CM:
149 coex_enabled = 1; 159 coex_enabled = 1;
@@ -168,7 +178,7 @@ int iwm_send_prio_table(struct iwm_priv *iwm)
168 COEX_FLAGS_ASSOC_WAKEUP_UMASK_MSK | 178 COEX_FLAGS_ASSOC_WAKEUP_UMASK_MSK |
169 COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK; 179 COEX_FLAGS_UNASSOC_WAKEUP_UMASK_MSK;
170 180
171 switch (iwm->conf.coexist_mode) { 181 switch (modparam_wiwi) {
172 case COEX_MODE_XOR: 182 case COEX_MODE_XOR:
173 memcpy(coex_table_cmd.sta_prio, iwm_sta_xor_prio_tbl, 183 memcpy(coex_table_cmd.sta_prio, iwm_sta_xor_prio_tbl,
174 sizeof(iwm_sta_xor_prio_tbl)); 184 sizeof(iwm_sta_xor_prio_tbl));
@@ -179,7 +189,7 @@ int iwm_send_prio_table(struct iwm_priv *iwm)
179 break; 189 break;
180 default: 190 default:
181 IWM_ERR(iwm, "Invalid coex_mode 0x%x\n", 191 IWM_ERR(iwm, "Invalid coex_mode 0x%x\n",
182 iwm->conf.coexist_mode); 192 modparam_wiwi);
183 break; 193 break;
184 } 194 }
185 } else 195 } else
@@ -187,7 +197,7 @@ int iwm_send_prio_table(struct iwm_priv *iwm)
187 197
188 return iwm_send_lmac_ptrough_cmd(iwm, COEX_PRIORITY_TABLE_CMD, 198 return iwm_send_lmac_ptrough_cmd(iwm, COEX_PRIORITY_TABLE_CMD,
189 &coex_table_cmd, 199 &coex_table_cmd,
190 sizeof(struct iwm_coex_prio_table_cmd), 1); 200 sizeof(struct iwm_coex_prio_table_cmd), 0);
191} 201}
192 202
193int iwm_send_init_calib_cfg(struct iwm_priv *iwm, u8 calib_requested) 203int iwm_send_init_calib_cfg(struct iwm_priv *iwm, u8 calib_requested)
@@ -275,6 +285,17 @@ int iwm_send_calib_results(struct iwm_priv *iwm)
275 return ret; 285 return ret;
276} 286}
277 287
288int iwm_send_ct_kill_cfg(struct iwm_priv *iwm, u8 entry, u8 exit)
289{
290 struct iwm_ct_kill_cfg_cmd cmd;
291
292 cmd.entry_threshold = entry;
293 cmd.exit_threshold = exit;
294
295 return iwm_send_lmac_ptrough_cmd(iwm, REPLY_CT_KILL_CONFIG_CMD, &cmd,
296 sizeof(struct iwm_ct_kill_cfg_cmd), 0);
297}
298
278int iwm_send_umac_reset(struct iwm_priv *iwm, __le32 reset_flags, bool resp) 299int iwm_send_umac_reset(struct iwm_priv *iwm, __le32 reset_flags, bool resp)
279{ 300{
280 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT; 301 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
@@ -380,7 +401,7 @@ int iwm_send_umac_config(struct iwm_priv *iwm, __le32 reset_flags)
380 return ret; 401 return ret;
381 402
382 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX, 403 ret = iwm_umac_set_config_fix(iwm, UMAC_PARAM_TBL_CFG_FIX,
383 CFG_COEX_MODE, iwm->conf.coexist_mode); 404 CFG_COEX_MODE, modparam_wiwi);
384 if (ret < 0) 405 if (ret < 0)
385 return ret; 406 return ret;
386 407
@@ -778,11 +799,24 @@ int iwm_invalidate_mlme_profile(struct iwm_priv *iwm)
778 return ret; 799 return ret;
779 800
780 ret = wait_event_interruptible_timeout(iwm->mlme_queue, 801 ret = wait_event_interruptible_timeout(iwm->mlme_queue,
781 (iwm->umac_profile_active == 0), 2 * HZ); 802 (iwm->umac_profile_active == 0), 5 * HZ);
782 803
783 return ret ? 0 : -EBUSY; 804 return ret ? 0 : -EBUSY;
784} 805}
785 806
807int iwm_tx_power_trigger(struct iwm_priv *iwm)
808{
809 struct iwm_umac_pwr_trigger pwr_trigger;
810
811 pwr_trigger.hdr.oid = UMAC_WIFI_IF_CMD_TX_PWR_TRIGGER;
812 pwr_trigger.hdr.buf_size =
813 cpu_to_le16(sizeof(struct iwm_umac_pwr_trigger) -
814 sizeof(struct iwm_umac_wifi_if));
815
816
817 return iwm_send_wifi_if_cmd(iwm, &pwr_trigger, sizeof(pwr_trigger), 1);
818}
819
786int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags) 820int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags)
787{ 821{
788 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT; 822 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
@@ -900,3 +934,62 @@ int iwm_target_reset(struct iwm_priv *iwm)
900 934
901 return iwm_hal_send_target_cmd(iwm, &target_cmd, NULL); 935 return iwm_hal_send_target_cmd(iwm, &target_cmd, NULL);
902} 936}
937
938int iwm_send_umac_stop_resume_tx(struct iwm_priv *iwm,
939 struct iwm_umac_notif_stop_resume_tx *ntf)
940{
941 struct iwm_udma_wifi_cmd udma_cmd = UDMA_UMAC_INIT;
942 struct iwm_umac_cmd umac_cmd;
943 struct iwm_umac_cmd_stop_resume_tx stp_res_cmd;
944 struct iwm_sta_info *sta_info;
945 u8 sta_id = STA_ID_N_COLOR_ID(ntf->sta_id);
946 int i;
947
948 sta_info = &iwm->sta_table[sta_id];
949 if (!sta_info->valid) {
950 IWM_ERR(iwm, "Invalid STA: %d\n", sta_id);
951 return -EINVAL;
952 }
953
954 umac_cmd.id = UMAC_CMD_OPCODE_STOP_RESUME_STA_TX;
955 umac_cmd.resp = 0;
956
957 stp_res_cmd.flags = ntf->flags;
958 stp_res_cmd.sta_id = ntf->sta_id;
959 stp_res_cmd.stop_resume_tid_msk = ntf->stop_resume_tid_msk;
960 for (i = 0; i < IWM_UMAC_TID_NR; i++)
961 stp_res_cmd.last_seq_num[i] =
962 sta_info->tid_info[i].last_seq_num;
963
964 return iwm_hal_send_umac_cmd(iwm, &udma_cmd, &umac_cmd, &stp_res_cmd,
965 sizeof(struct iwm_umac_cmd_stop_resume_tx));
966
967}
968
969int iwm_send_pmkid_update(struct iwm_priv *iwm,
970 struct cfg80211_pmksa *pmksa, u32 command)
971{
972 struct iwm_umac_pmkid_update update;
973 int ret;
974
975 memset(&update, 0, sizeof(struct iwm_umac_pmkid_update));
976
977 update.hdr.oid = UMAC_WIFI_IF_CMD_PMKID_UPDATE;
978 update.hdr.buf_size = cpu_to_le16(sizeof(struct iwm_umac_pmkid_update) -
979 sizeof(struct iwm_umac_wifi_if));
980
981 update.command = cpu_to_le32(command);
982 if (pmksa->bssid)
983 memcpy(&update.bssid, pmksa->bssid, ETH_ALEN);
984 if (pmksa->pmkid)
985 memcpy(&update.pmkid, pmksa->pmkid, WLAN_PMKID_LEN);
986
987 ret = iwm_send_wifi_if_cmd(iwm, &update,
988 sizeof(struct iwm_umac_pmkid_update), 0);
989 if (ret) {
990 IWM_ERR(iwm, "PMKID update command failed\n");
991 return ret;
992 }
993
994 return 0;
995}
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.h b/drivers/net/wireless/iwmc3200wifi/commands.h
index e24d5b633997..3dfd9f0e9003 100644
--- a/drivers/net/wireless/iwmc3200wifi/commands.h
+++ b/drivers/net/wireless/iwmc3200wifi/commands.h
@@ -102,7 +102,6 @@ enum {
102 CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN, 102 CFG_SCAN_NUM_PASSIVE_CHAN_PER_PARTIAL_SCAN,
103 CFG_TLC_SUPPORTED_TX_HT_RATES, 103 CFG_TLC_SUPPORTED_TX_HT_RATES,
104 CFG_TLC_SUPPORTED_TX_RATES, 104 CFG_TLC_SUPPORTED_TX_RATES,
105 CFG_TLC_VALID_ANTENNA,
106 CFG_TLC_SPATIAL_STREAM_SUPPORTED, 105 CFG_TLC_SPATIAL_STREAM_SUPPORTED,
107 CFG_TLC_RETRY_PER_RATE, 106 CFG_TLC_RETRY_PER_RATE,
108 CFG_TLC_RETRY_PER_HT_RATE, 107 CFG_TLC_RETRY_PER_HT_RATE,
@@ -136,6 +135,10 @@ enum {
136 CFG_TLC_RENEW_ADDBA_DELAY, 135 CFG_TLC_RENEW_ADDBA_DELAY,
137 CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD, 136 CFG_TLC_NUM_OF_MULTISEC_TO_COUN_LOAD,
138 CFG_TLC_IS_STABLE_IN_HT, 137 CFG_TLC_IS_STABLE_IN_HT,
138 CFG_TLC_SR_SIC_1ST_FAIL,
139 CFG_TLC_SR_SIC_1ST_PASS,
140 CFG_TLC_SR_SIC_TOTAL_FAIL,
141 CFG_TLC_SR_SIC_TOTAL_PASS,
139 CFG_RLC_CHAIN_CTRL, 142 CFG_RLC_CHAIN_CTRL,
140 CFG_TRK_TABLE_OP_MODE, 143 CFG_TRK_TABLE_OP_MODE,
141 CFG_TRK_TABLE_RSSI_THRESHOLD, 144 CFG_TRK_TABLE_RSSI_THRESHOLD,
@@ -147,6 +150,58 @@ enum {
147 CFG_MLME_DBG_NOTIF_BLOCK, 150 CFG_MLME_DBG_NOTIF_BLOCK,
148 CFG_BT_OFF_BECONS_INTERVALS, 151 CFG_BT_OFF_BECONS_INTERVALS,
149 CFG_BT_FRAG_DURATION, 152 CFG_BT_FRAG_DURATION,
153 CFG_ACTIVE_CHAINS,
154 CFG_CALIB_CTRL,
155 CFG_CAPABILITY_SUPPORTED_HT_RATES,
156 CFG_HT_MAC_PARAM_INFO,
157 CFG_MIMO_PS_MODE,
158 CFG_HT_DEFAULT_CAPABILIES_INFO,
159 CFG_LED_SC_RESOLUTION_FACTOR,
160 CFG_PTAM_ENERGY_CCK_DET_DEFAULT,
161 CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_DEFAULT,
162 CFG_PTAM_CORR40_4_TH_ADD_MIN_DEFAULT,
163 CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_DEFAULT,
164 CFG_PTAM_CORR32_4_TH_ADD_MIN_DEFAULT,
165 CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_DEFAULT,
166 CFG_PTAM_CORR32_1_TH_ADD_MIN_DEFAULT,
167 CFG_PTAM_ENERGY_CCK_DET_MIN_VAL,
168 CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MIN_VAL,
169 CFG_PTAM_CORR40_4_TH_ADD_MIN_MIN_VAL,
170 CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MIN_VAL,
171 CFG_PTAM_CORR32_4_TH_ADD_MIN_MIN_VAL,
172 CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MIN_VAL,
173 CFG_PTAM_CORR32_1_TH_ADD_MIN_MIN_VAL,
174 CFG_PTAM_ENERGY_CCK_DET_MAX_VAL,
175 CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_MAX_VAL,
176 CFG_PTAM_CORR40_4_TH_ADD_MIN_MAX_VAL,
177 CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_MAX_VAL,
178 CFG_PTAM_CORR32_4_TH_ADD_MIN_MAX_VAL,
179 CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_MAX_VAL,
180 CFG_PTAM_CORR32_1_TH_ADD_MIN_MAX_VAL,
181 CFG_PTAM_ENERGY_CCK_DET_STEP_VAL,
182 CFG_PTAM_CORR40_4_TH_ADD_MIN_MRC_STEP_VAL,
183 CFG_PTAM_CORR40_4_TH_ADD_MIN_STEP_VAL,
184 CFG_PTAM_CORR32_4_TH_ADD_MIN_MRC_STEP_VAL,
185 CFG_PTAM_CORR32_4_TH_ADD_MIN_STEP_VAL,
186 CFG_PTAM_CORR32_1_TH_ADD_MIN_MRC_STEP_VAL,
187 CFG_PTAM_CORR32_1_TH_ADD_MIN_STEP_VAL,
188 CFG_PTAM_LINK_SENS_FA_OFDM_MAX,
189 CFG_PTAM_LINK_SENS_FA_OFDM_MIN,
190 CFG_PTAM_LINK_SENS_FA_CCK_MAX,
191 CFG_PTAM_LINK_SENS_FA_CCK_MIN,
192 CFG_PTAM_LINK_SENS_NRG_DIFF,
193 CFG_PTAM_LINK_SENS_NRG_MARGIN,
194 CFG_PTAM_LINK_SENS_MAX_NUMBER_OF_TIMES_IN_CCK_NO_FA,
195 CFG_PTAM_LINK_SENS_AUTO_CORR_MAX_TH_CCK,
196 CFG_AGG_MGG_TID_LOAD_ADDBA_THRESHOLD,
197 CFG_AGG_MGG_TID_LOAD_DELBA_THRESHOLD,
198 CFG_AGG_MGG_ADDBA_BUF_SIZE,
199 CFG_AGG_MGG_ADDBA_INACTIVE_TIMEOUT,
200 CFG_AGG_MGG_ADDBA_DEBUG_FLAGS,
201 CFG_SCAN_PERIODIC_RSSI_HIGH_THRESHOLD,
202 CFG_SCAN_PERIODIC_COEF_RSSI_HIGH,
203 CFG_11D_ENABLED,
204 CFG_11H_FEATURE_FLAGS,
150 205
151 /* <-- LAST --> */ 206 /* <-- LAST --> */
152 CFG_TBL_FIX_LAST 207 CFG_TBL_FIX_LAST
@@ -155,7 +210,8 @@ enum {
155/* variable size table */ 210/* variable size table */
156enum { 211enum {
157 CFG_NET_ADDR = 0, 212 CFG_NET_ADDR = 0,
158 CFG_PROFILE, 213 CFG_LED_PATTERN_TABLE,
214
159 /* <-- LAST --> */ 215 /* <-- LAST --> */
160 CFG_TBL_VAR_LAST 216 CFG_TBL_VAR_LAST
161}; 217};
@@ -288,6 +344,9 @@ struct iwm_umac_cmd_scan_request {
288/* iwm_umac_security.flag is WSC mode on -- bits [2:2] */ 344/* iwm_umac_security.flag is WSC mode on -- bits [2:2] */
289#define UMAC_SEC_FLG_WSC_ON_POS 2 345#define UMAC_SEC_FLG_WSC_ON_POS 2
290#define UMAC_SEC_FLG_WSC_ON_SEED 1 346#define UMAC_SEC_FLG_WSC_ON_SEED 1
347#define UMAC_SEC_FLG_WSC_ON_MSK (UMAC_SEC_FLG_WSC_ON_SEED << \
348 UMAC_SEC_FLG_WSC_ON_POS)
349
291 350
292/* Legacy profile can use only WEP40 and WEP104 for encryption and 351/* Legacy profile can use only WEP40 and WEP104 for encryption and
293 * OPEN or PSK for authentication */ 352 * OPEN or PSK for authentication */
@@ -382,10 +441,35 @@ struct iwm_umac_tx_key_id {
382 u8 reserved[3]; 441 u8 reserved[3];
383} __attribute__ ((packed)); 442} __attribute__ ((packed));
384 443
444struct iwm_umac_pwr_trigger {
445 struct iwm_umac_wifi_if hdr;
446 __le32 reseved;
447} __attribute__ ((packed));
448
385struct iwm_umac_cmd_stats_req { 449struct iwm_umac_cmd_stats_req {
386 __le32 flags; 450 __le32 flags;
387} __attribute__ ((packed)); 451} __attribute__ ((packed));
388 452
453struct iwm_umac_cmd_stop_resume_tx {
454 u8 flags;
455 u8 sta_id;
456 __le16 stop_resume_tid_msk;
457 __le16 last_seq_num[IWM_UMAC_TID_NR];
458 u16 reserved;
459} __attribute__ ((packed));
460
461#define IWM_CMD_PMKID_ADD 1
462#define IWM_CMD_PMKID_DEL 2
463#define IWM_CMD_PMKID_FLUSH 3
464
465struct iwm_umac_pmkid_update {
466 struct iwm_umac_wifi_if hdr;
467 __le32 command;
468 u8 bssid[ETH_ALEN];
469 __le16 reserved;
470 u8 pmkid[WLAN_PMKID_LEN];
471} __attribute__ ((packed));
472
389/* LMAC commands */ 473/* LMAC commands */
390int iwm_read_mac(struct iwm_priv *iwm, u8 *mac); 474int iwm_read_mac(struct iwm_priv *iwm, u8 *mac);
391int iwm_send_prio_table(struct iwm_priv *iwm); 475int iwm_send_prio_table(struct iwm_priv *iwm);
@@ -393,6 +477,7 @@ int iwm_send_init_calib_cfg(struct iwm_priv *iwm, u8 calib_requested);
393int iwm_send_periodic_calib_cfg(struct iwm_priv *iwm, u8 calib_requested); 477int iwm_send_periodic_calib_cfg(struct iwm_priv *iwm, u8 calib_requested);
394int iwm_send_calib_results(struct iwm_priv *iwm); 478int iwm_send_calib_results(struct iwm_priv *iwm);
395int iwm_store_rxiq_calib_result(struct iwm_priv *iwm); 479int iwm_store_rxiq_calib_result(struct iwm_priv *iwm);
480int iwm_send_ct_kill_cfg(struct iwm_priv *iwm, u8 entry, u8 exit);
396 481
397/* UMAC commands */ 482/* UMAC commands */
398int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size, 483int iwm_send_wifi_if_cmd(struct iwm_priv *iwm, void *payload, u16 payload_size,
@@ -407,11 +492,16 @@ int iwm_invalidate_mlme_profile(struct iwm_priv *iwm);
407int iwm_send_packet(struct iwm_priv *iwm, struct sk_buff *skb, int pool_id); 492int iwm_send_packet(struct iwm_priv *iwm, struct sk_buff *skb, int pool_id);
408int iwm_set_tx_key(struct iwm_priv *iwm, u8 key_idx); 493int iwm_set_tx_key(struct iwm_priv *iwm, u8 key_idx);
409int iwm_set_key(struct iwm_priv *iwm, bool remove, struct iwm_key *key); 494int iwm_set_key(struct iwm_priv *iwm, bool remove, struct iwm_key *key);
495int iwm_tx_power_trigger(struct iwm_priv *iwm);
410int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags); 496int iwm_send_umac_stats_req(struct iwm_priv *iwm, u32 flags);
411int iwm_send_umac_channel_list(struct iwm_priv *iwm); 497int iwm_send_umac_channel_list(struct iwm_priv *iwm);
412int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids, 498int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids,
413 int ssid_num); 499 int ssid_num);
414int iwm_scan_one_ssid(struct iwm_priv *iwm, u8 *ssid, int ssid_len); 500int iwm_scan_one_ssid(struct iwm_priv *iwm, u8 *ssid, int ssid_len);
501int iwm_send_umac_stop_resume_tx(struct iwm_priv *iwm,
502 struct iwm_umac_notif_stop_resume_tx *ntf);
503int iwm_send_pmkid_update(struct iwm_priv *iwm,
504 struct cfg80211_pmksa *pmksa, u32 command);
415 505
416/* UDMA commands */ 506/* UDMA commands */
417int iwm_target_reset(struct iwm_priv *iwm); 507int iwm_target_reset(struct iwm_priv *iwm);
diff --git a/drivers/net/wireless/iwmc3200wifi/debugfs.c b/drivers/net/wireless/iwmc3200wifi/debugfs.c
index 1465379f900a..cbb81befdb55 100644
--- a/drivers/net/wireless/iwmc3200wifi/debugfs.c
+++ b/drivers/net/wireless/iwmc3200wifi/debugfs.c
@@ -21,6 +21,7 @@
21 * 21 *
22 */ 22 */
23 23
24#include <linux/slab.h>
24#include <linux/kernel.h> 25#include <linux/kernel.h>
25#include <linux/bitops.h> 26#include <linux/bitops.h>
26#include <linux/debugfs.h> 27#include <linux/debugfs.h>
@@ -89,7 +90,7 @@ static int iwm_debugfs_dbg_modules_write(void *data, u64 val)
89 for (i = 0; i < __IWM_DM_NR; i++) 90 for (i = 0; i < __IWM_DM_NR; i++)
90 iwm->dbg.dbg_module[i] = 0; 91 iwm->dbg.dbg_module[i] = 0;
91 92
92 for_each_bit(bit, &iwm->dbg.dbg_modules, __IWM_DM_NR) 93 for_each_set_bit(bit, &iwm->dbg.dbg_modules, __IWM_DM_NR)
93 iwm->dbg.dbg_module[bit] = iwm->dbg.dbg_level; 94 iwm->dbg.dbg_module[bit] = iwm->dbg.dbg_level;
94 95
95 return 0; 96 return 0;
@@ -158,6 +159,29 @@ static ssize_t iwm_debugfs_txq_read(struct file *filp, char __user *buffer,
158 } 159 }
159 160
160 spin_unlock_irqrestore(&txq->queue.lock, flags); 161 spin_unlock_irqrestore(&txq->queue.lock, flags);
162
163 spin_lock_irqsave(&txq->stopped_queue.lock, flags);
164
165 len += snprintf(buf + len, buf_len - len,
166 "\tStopped Queue len: %d\n",
167 skb_queue_len(&txq->stopped_queue));
168 for (j = 0; j < skb_queue_len(&txq->stopped_queue); j++) {
169 struct iwm_tx_info *tx_info;
170
171 skb = skb->next;
172 tx_info = skb_to_tx_info(skb);
173
174 len += snprintf(buf + len, buf_len - len,
175 "\tSKB #%d\n", j);
176 len += snprintf(buf + len, buf_len - len,
177 "\t\tsta: %d\n", tx_info->sta);
178 len += snprintf(buf + len, buf_len - len,
179 "\t\tcolor: %d\n", tx_info->color);
180 len += snprintf(buf + len, buf_len - len,
181 "\t\ttid: %d\n", tx_info->tid);
182 }
183
184 spin_unlock_irqrestore(&txq->stopped_queue.lock, flags);
161 } 185 }
162 186
163 ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len); 187 ret = simple_read_from_buffer(buffer, len, ppos, buf, buf_len);
diff --git a/drivers/net/wireless/iwmc3200wifi/eeprom.c b/drivers/net/wireless/iwmc3200wifi/eeprom.c
index 365910fbe01e..e80e776b74f7 100644
--- a/drivers/net/wireless/iwmc3200wifi/eeprom.c
+++ b/drivers/net/wireless/iwmc3200wifi/eeprom.c
@@ -37,6 +37,7 @@
37 */ 37 */
38 38
39#include <linux/kernel.h> 39#include <linux/kernel.h>
40#include <linux/slab.h>
40 41
41#include "iwm.h" 42#include "iwm.h"
42#include "umac.h" 43#include "umac.h"
@@ -66,6 +67,10 @@ static struct iwm_eeprom_entry eeprom_map[] = {
66 [IWM_EEPROM_SKU_CAP] = 67 [IWM_EEPROM_SKU_CAP] =
67 {"SKU capabilities", IWM_EEPROM_SKU_CAP_OFF, IWM_EEPROM_SKU_CAP_LEN}, 68 {"SKU capabilities", IWM_EEPROM_SKU_CAP_OFF, IWM_EEPROM_SKU_CAP_LEN},
68 69
70 [IWM_EEPROM_FAT_CHANNELS_CAP] =
71 {"HT channels capabilities", IWM_EEPROM_FAT_CHANNELS_CAP_OFF,
72 IWM_EEPROM_FAT_CHANNELS_CAP_LEN},
73
69 [IWM_EEPROM_CALIB_RXIQ_OFFSET] = 74 [IWM_EEPROM_CALIB_RXIQ_OFFSET] =
70 {"RX IQ offset", IWM_EEPROM_CALIB_RXIQ_OFF, IWM_EEPROM_INDIRECT_LEN}, 75 {"RX IQ offset", IWM_EEPROM_CALIB_RXIQ_OFF, IWM_EEPROM_INDIRECT_LEN},
71 76
@@ -146,6 +151,52 @@ u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id)
146 return iwm->eeprom + eeprom_map[eeprom_id].offset; 151 return iwm->eeprom + eeprom_map[eeprom_id].offset;
147} 152}
148 153
154int iwm_eeprom_fat_channels(struct iwm_priv *iwm)
155{
156 struct wiphy *wiphy = iwm_to_wiphy(iwm);
157 struct ieee80211_supported_band *band;
158 u16 *channels, i;
159
160 channels = (u16 *)iwm_eeprom_access(iwm, IWM_EEPROM_FAT_CHANNELS_CAP);
161 if (IS_ERR(channels))
162 return PTR_ERR(channels);
163
164 band = wiphy->bands[IEEE80211_BAND_2GHZ];
165 band->ht_cap.ht_supported = true;
166
167 for (i = 0; i < IWM_EEPROM_FAT_CHANNELS_24; i++)
168 if (!(channels[i] & IWM_EEPROM_FAT_CHANNEL_ENABLED))
169 band->ht_cap.ht_supported = false;
170
171 band = wiphy->bands[IEEE80211_BAND_5GHZ];
172 band->ht_cap.ht_supported = true;
173 for (i = IWM_EEPROM_FAT_CHANNELS_24; i < IWM_EEPROM_FAT_CHANNELS; i++)
174 if (!(channels[i] & IWM_EEPROM_FAT_CHANNEL_ENABLED))
175 band->ht_cap.ht_supported = false;
176
177 return 0;
178}
179
180u32 iwm_eeprom_wireless_mode(struct iwm_priv *iwm)
181{
182 u16 sku_cap;
183 u32 wireless_mode = 0;
184
185 sku_cap = *((u16 *)iwm_eeprom_access(iwm, IWM_EEPROM_SKU_CAP));
186
187 if (sku_cap & IWM_EEPROM_SKU_CAP_BAND_24GHZ)
188 wireless_mode |= WIRELESS_MODE_11G;
189
190 if (sku_cap & IWM_EEPROM_SKU_CAP_BAND_52GHZ)
191 wireless_mode |= WIRELESS_MODE_11A;
192
193 if (sku_cap & IWM_EEPROM_SKU_CAP_11N_ENABLE)
194 wireless_mode |= WIRELESS_MODE_11N;
195
196 return wireless_mode;
197}
198
199
149int iwm_eeprom_init(struct iwm_priv *iwm) 200int iwm_eeprom_init(struct iwm_priv *iwm)
150{ 201{
151 int i, ret = 0; 202 int i, ret = 0;
diff --git a/drivers/net/wireless/iwmc3200wifi/eeprom.h b/drivers/net/wireless/iwmc3200wifi/eeprom.h
index cdb31a6a1f5f..4e3a3fdab0d3 100644
--- a/drivers/net/wireless/iwmc3200wifi/eeprom.h
+++ b/drivers/net/wireless/iwmc3200wifi/eeprom.h
@@ -48,6 +48,7 @@ enum {
48 IWM_EEPROM_CARD_ID, 48 IWM_EEPROM_CARD_ID,
49 IWM_EEPROM_RADIO_CONF, 49 IWM_EEPROM_RADIO_CONF,
50 IWM_EEPROM_SKU_CAP, 50 IWM_EEPROM_SKU_CAP,
51 IWM_EEPROM_FAT_CHANNELS_CAP,
51 52
52 IWM_EEPROM_INDIRECT_OFFSET, 53 IWM_EEPROM_INDIRECT_OFFSET,
53 IWM_EEPROM_CALIB_RXIQ_OFFSET = IWM_EEPROM_INDIRECT_OFFSET, 54 IWM_EEPROM_CALIB_RXIQ_OFFSET = IWM_EEPROM_INDIRECT_OFFSET,
@@ -58,14 +59,15 @@ enum {
58 IWM_EEPROM_LAST, 59 IWM_EEPROM_LAST,
59}; 60};
60 61
61#define IWM_EEPROM_SIG_OFF 0x00 62#define IWM_EEPROM_SIG_OFF 0x00
62#define IWM_EEPROM_VERSION_OFF (0x54 << 1) 63#define IWM_EEPROM_VERSION_OFF (0x54 << 1)
63#define IWM_EEPROM_OEM_HW_VERSION_OFF (0x56 << 1) 64#define IWM_EEPROM_OEM_HW_VERSION_OFF (0x56 << 1)
64#define IWM_EEPROM_MAC_VERSION_OFF (0x30 << 1) 65#define IWM_EEPROM_MAC_VERSION_OFF (0x30 << 1)
65#define IWM_EEPROM_CARD_ID_OFF (0x5d << 1) 66#define IWM_EEPROM_CARD_ID_OFF (0x5d << 1)
66#define IWM_EEPROM_RADIO_CONF_OFF (0x58 << 1) 67#define IWM_EEPROM_RADIO_CONF_OFF (0x58 << 1)
67#define IWM_EEPROM_SKU_CAP_OFF (0x55 << 1) 68#define IWM_EEPROM_SKU_CAP_OFF (0x55 << 1)
68#define IWM_EEPROM_CALIB_CONFIG_OFF (0x7c << 1) 69#define IWM_EEPROM_CALIB_CONFIG_OFF (0x7c << 1)
70#define IWM_EEPROM_FAT_CHANNELS_CAP_OFF (0xde << 1)
69 71
70#define IWM_EEPROM_SIG_LEN 4 72#define IWM_EEPROM_SIG_LEN 4
71#define IWM_EEPROM_VERSION_LEN 2 73#define IWM_EEPROM_VERSION_LEN 2
@@ -74,6 +76,7 @@ enum {
74#define IWM_EEPROM_CARD_ID_LEN 2 76#define IWM_EEPROM_CARD_ID_LEN 2
75#define IWM_EEPROM_RADIO_CONF_LEN 2 77#define IWM_EEPROM_RADIO_CONF_LEN 2
76#define IWM_EEPROM_SKU_CAP_LEN 2 78#define IWM_EEPROM_SKU_CAP_LEN 2
79#define IWM_EEPROM_FAT_CHANNELS_CAP_LEN 40
77#define IWM_EEPROM_INDIRECT_LEN 2 80#define IWM_EEPROM_INDIRECT_LEN 2
78 81
79#define IWM_MAX_EEPROM_DATA_LEN 240 82#define IWM_MAX_EEPROM_DATA_LEN 240
@@ -87,6 +90,14 @@ enum {
87#define IWM_EEPROM_SKU_CAP_BAND_52GHZ (1 << 5) 90#define IWM_EEPROM_SKU_CAP_BAND_52GHZ (1 << 5)
88#define IWM_EEPROM_SKU_CAP_11N_ENABLE (1 << 6) 91#define IWM_EEPROM_SKU_CAP_11N_ENABLE (1 << 6)
89 92
93#define IWM_EEPROM_FAT_CHANNELS 20
94/* 2.4 gHz FAT primary channels: 1, 2, 3, 4, 5, 6, 7, 8, 9 */
95#define IWM_EEPROM_FAT_CHANNELS_24 9
96/* 5.2 gHz FAT primary channels: 36,44,52,60,100,108,116,124,132,149,157 */
97#define IWM_EEPROM_FAT_CHANNELS_52 11
98
99#define IWM_EEPROM_FAT_CHANNEL_ENABLED (1 << 0)
100
90enum { 101enum {
91 IWM_EEPROM_CALIB_CAL_HDR, 102 IWM_EEPROM_CALIB_CAL_HDR,
92 IWM_EEPROM_CALIB_TX_POWER, 103 IWM_EEPROM_CALIB_TX_POWER,
@@ -110,5 +121,7 @@ struct iwm_eeprom_entry {
110int iwm_eeprom_init(struct iwm_priv *iwm); 121int iwm_eeprom_init(struct iwm_priv *iwm);
111void iwm_eeprom_exit(struct iwm_priv *iwm); 122void iwm_eeprom_exit(struct iwm_priv *iwm);
112u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id); 123u8 *iwm_eeprom_access(struct iwm_priv *iwm, u8 eeprom_id);
124int iwm_eeprom_fat_channels(struct iwm_priv *iwm);
125u32 iwm_eeprom_wireless_mode(struct iwm_priv *iwm);
113 126
114#endif 127#endif
diff --git a/drivers/net/wireless/iwmc3200wifi/fw.c b/drivers/net/wireless/iwmc3200wifi/fw.c
index 6b0bcad758ca..49067092d336 100644
--- a/drivers/net/wireless/iwmc3200wifi/fw.c
+++ b/drivers/net/wireless/iwmc3200wifi/fw.c
@@ -217,6 +217,13 @@ static int iwm_load_img(struct iwm_priv *iwm, const char *img_name)
217 IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date), 217 IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date),
218 IWM_BUILD_DAY(build_date)); 218 IWM_BUILD_DAY(build_date));
219 219
220 if (!strcmp(img_name, iwm->bus_ops->umac_name))
221 sprintf(iwm->umac_version, "%02X.%02X",
222 ver->major, ver->minor);
223
224 if (!strcmp(img_name, iwm->bus_ops->lmac_name))
225 sprintf(iwm->lmac_version, "%02X.%02X",
226 ver->major, ver->minor);
220 227
221 err_release_fw: 228 err_release_fw:
222 release_firmware(fw); 229 release_firmware(fw);
@@ -398,6 +405,8 @@ int iwm_load_fw(struct iwm_priv *iwm)
398 iwm_send_prio_table(iwm); 405 iwm_send_prio_table(iwm);
399 iwm_send_calib_results(iwm); 406 iwm_send_calib_results(iwm);
400 iwm_send_periodic_calib_cfg(iwm, periodic_calib_map); 407 iwm_send_periodic_calib_cfg(iwm, periodic_calib_map);
408 iwm_send_ct_kill_cfg(iwm, iwm->conf.ct_kill_entry,
409 iwm->conf.ct_kill_exit);
401 410
402 return 0; 411 return 0;
403 412
diff --git a/drivers/net/wireless/iwmc3200wifi/hal.c b/drivers/net/wireless/iwmc3200wifi/hal.c
index c430418248b4..229de990379c 100644
--- a/drivers/net/wireless/iwmc3200wifi/hal.c
+++ b/drivers/net/wireless/iwmc3200wifi/hal.c
@@ -98,6 +98,7 @@
98 */ 98 */
99#include <linux/kernel.h> 99#include <linux/kernel.h>
100#include <linux/netdevice.h> 100#include <linux/netdevice.h>
101#include <linux/slab.h>
101 102
102#include "iwm.h" 103#include "iwm.h"
103#include "bus.h" 104#include "bus.h"
@@ -411,7 +412,7 @@ static void iwm_build_lmac_hdr(struct iwm_priv *iwm, struct iwm_lmac_hdr *hdr,
411/* 412/*
412 * iwm_hal_send_host_cmd(): sends commands to the UMAC or the LMAC. 413 * iwm_hal_send_host_cmd(): sends commands to the UMAC or the LMAC.
413 * Sending command to the LMAC is equivalent to sending a 414 * Sending command to the LMAC is equivalent to sending a
414 * regular UMAC command with the LMAC passtrough or the LMAC 415 * regular UMAC command with the LMAC passthrough or the LMAC
415 * wrapper UMAC command IDs. 416 * wrapper UMAC command IDs.
416 */ 417 */
417int iwm_hal_send_host_cmd(struct iwm_priv *iwm, 418int iwm_hal_send_host_cmd(struct iwm_priv *iwm,
diff --git a/drivers/net/wireless/iwmc3200wifi/iwm.h b/drivers/net/wireless/iwmc3200wifi/iwm.h
index 1b02a4e2a1ac..79ffa3b98d73 100644
--- a/drivers/net/wireless/iwmc3200wifi/iwm.h
+++ b/drivers/net/wireless/iwmc3200wifi/iwm.h
@@ -65,6 +65,8 @@ struct iwm_conf {
65 u32 sdio_ior_timeout; 65 u32 sdio_ior_timeout;
66 unsigned long calib_map; 66 unsigned long calib_map;
67 unsigned long expected_calib_map; 67 unsigned long expected_calib_map;
68 u8 ct_kill_entry;
69 u8 ct_kill_exit;
68 bool reset_on_fatal_err; 70 bool reset_on_fatal_err;
69 bool auto_connect; 71 bool auto_connect;
70 bool wimax_not_present; 72 bool wimax_not_present;
@@ -79,7 +81,6 @@ struct iwm_conf {
79 u32 assoc_timeout; 81 u32 assoc_timeout;
80 u32 roam_timeout; 82 u32 roam_timeout;
81 u32 wireless_mode; 83 u32 wireless_mode;
82 u32 coexist_mode;
83 84
84 u8 ibss_band; 85 u8 ibss_band;
85 u8 ibss_channel; 86 u8 ibss_channel;
@@ -129,11 +130,18 @@ struct iwm_notif {
129 unsigned long buf_size; 130 unsigned long buf_size;
130}; 131};
131 132
133struct iwm_tid_info {
134 __le16 last_seq_num;
135 bool stopped;
136 struct mutex mutex;
137};
138
132struct iwm_sta_info { 139struct iwm_sta_info {
133 u8 addr[ETH_ALEN]; 140 u8 addr[ETH_ALEN];
134 bool valid; 141 bool valid;
135 bool qos; 142 bool qos;
136 u8 color; 143 u8 color;
144 struct iwm_tid_info tid_info[IWM_UMAC_TID_NR];
137}; 145};
138 146
139struct iwm_tx_info { 147struct iwm_tx_info {
@@ -183,6 +191,8 @@ struct iwm_key {
183struct iwm_tx_queue { 191struct iwm_tx_queue {
184 int id; 192 int id;
185 struct sk_buff_head queue; 193 struct sk_buff_head queue;
194 struct sk_buff_head stopped_queue;
195 spinlock_t lock;
186 struct workqueue_struct *wq; 196 struct workqueue_struct *wq;
187 struct work_struct worker; 197 struct work_struct worker;
188 u8 concat_buf[IWM_HAL_CONCATENATE_BUF_SIZE]; 198 u8 concat_buf[IWM_HAL_CONCATENATE_BUF_SIZE];
@@ -276,12 +286,14 @@ struct iwm_priv {
276 struct iw_statistics wstats; 286 struct iw_statistics wstats;
277 struct delayed_work stats_request; 287 struct delayed_work stats_request;
278 struct delayed_work disconnect; 288 struct delayed_work disconnect;
289 struct delayed_work ct_kill_delay;
279 290
280 struct iwm_debugfs dbg; 291 struct iwm_debugfs dbg;
281 292
282 u8 *eeprom; 293 u8 *eeprom;
283 struct timer_list watchdog; 294 struct timer_list watchdog;
284 struct work_struct reset_worker; 295 struct work_struct reset_worker;
296 struct work_struct auth_retry_worker;
285 struct mutex mutex; 297 struct mutex mutex;
286 298
287 u8 *req_ie; 299 u8 *req_ie;
@@ -290,6 +302,8 @@ struct iwm_priv {
290 int resp_ie_len; 302 int resp_ie_len;
291 303
292 struct iwm_fw_error_hdr *last_fw_err; 304 struct iwm_fw_error_hdr *last_fw_err;
305 char umac_version[8];
306 char lmac_version[8];
293 307
294 char private[0] __attribute__((__aligned__(NETDEV_ALIGN))); 308 char private[0] __attribute__((__aligned__(NETDEV_ALIGN)));
295}; 309};
@@ -335,6 +349,7 @@ int iwm_up(struct iwm_priv *iwm);
335int iwm_down(struct iwm_priv *iwm); 349int iwm_down(struct iwm_priv *iwm);
336 350
337/* TX API */ 351/* TX API */
352int iwm_tid_to_queue(u16 tid);
338void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages); 353void iwm_tx_credit_inc(struct iwm_priv *iwm, int id, int total_freed_pages);
339void iwm_tx_worker(struct work_struct *work); 354void iwm_tx_worker(struct work_struct *work);
340int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev); 355int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
diff --git a/drivers/net/wireless/iwmc3200wifi/lmac.h b/drivers/net/wireless/iwmc3200wifi/lmac.h
index 6c1a14c4480f..a855a99e49b8 100644
--- a/drivers/net/wireless/iwmc3200wifi/lmac.h
+++ b/drivers/net/wireless/iwmc3200wifi/lmac.h
@@ -187,6 +187,14 @@ struct iwm_coex_prio_table_cmd {
187 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \ 187 COEX_EVT_FLAG_MEDIUM_ACTV_NTFY_MSK | \
188 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK) 188 COEX_EVT_FLAG_DELAY_MEDIUM_FREE_NTFY_MSK)
189 189
190/* CT kill config command */
191struct iwm_ct_kill_cfg_cmd {
192 u32 exit_threshold;
193 u32 reserved;
194 u32 entry_threshold;
195} __attribute__ ((packed));
196
197
190/* LMAC OP CODES */ 198/* LMAC OP CODES */
191#define REPLY_PAD 0x0 199#define REPLY_PAD 0x0
192#define REPLY_ALIVE 0x1 200#define REPLY_ALIVE 0x1
@@ -254,7 +262,7 @@ struct iwm_coex_prio_table_cmd {
254 262
255/* Power Management */ 263/* Power Management */
256#define POWER_TABLE_CMD 0x77 264#define POWER_TABLE_CMD 0x77
257#define SAVE_RESTORE_ADRESS_CMD 0x78 265#define SAVE_RESTORE_ADDRESS_CMD 0x78
258#define REPLY_WATERMARK_CMD 0x79 266#define REPLY_WATERMARK_CMD 0x79
259#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B 267#define PM_DEBUG_STATISTIC_NOTIFIC 0x7B
260#define PD_FLUSH_N_NOTIFICATION 0x7C 268#define PD_FLUSH_N_NOTIFICATION 0x7C
diff --git a/drivers/net/wireless/iwmc3200wifi/main.c b/drivers/net/wireless/iwmc3200wifi/main.c
index 222eb2cf1b30..23856d359e12 100644
--- a/drivers/net/wireless/iwmc3200wifi/main.c
+++ b/drivers/net/wireless/iwmc3200wifi/main.c
@@ -41,6 +41,7 @@
41#include <linux/sched.h> 41#include <linux/sched.h>
42#include <linux/ieee80211.h> 42#include <linux/ieee80211.h>
43#include <linux/wireless.h> 43#include <linux/wireless.h>
44#include <linux/slab.h>
44 45
45#include "iwm.h" 46#include "iwm.h"
46#include "debug.h" 47#include "debug.h"
@@ -64,9 +65,10 @@ static struct iwm_conf def_iwm_conf = {
64 BIT(PHY_CALIBRATE_TX_IQ_CMD) | 65 BIT(PHY_CALIBRATE_TX_IQ_CMD) |
65 BIT(PHY_CALIBRATE_RX_IQ_CMD) | 66 BIT(PHY_CALIBRATE_RX_IQ_CMD) |
66 BIT(SHILOH_PHY_CALIBRATE_BASE_BAND_CMD), 67 BIT(SHILOH_PHY_CALIBRATE_BASE_BAND_CMD),
68 .ct_kill_entry = 110,
69 .ct_kill_exit = 110,
67 .reset_on_fatal_err = 1, 70 .reset_on_fatal_err = 1,
68 .auto_connect = 1, 71 .auto_connect = 1,
69 .wimax_not_present = 0,
70 .enable_qos = 1, 72 .enable_qos = 1,
71 .mode = UMAC_MODE_BSS, 73 .mode = UMAC_MODE_BSS,
72 74
@@ -78,8 +80,8 @@ static struct iwm_conf def_iwm_conf = {
78 80
79 .assoc_timeout = 2, 81 .assoc_timeout = 2,
80 .roam_timeout = 10, 82 .roam_timeout = 10,
81 .wireless_mode = WIRELESS_MODE_11A | WIRELESS_MODE_11G, 83 .wireless_mode = WIRELESS_MODE_11A | WIRELESS_MODE_11G |
82 .coexist_mode = COEX_MODE_CM, 84 WIRELESS_MODE_11N,
83 85
84 /* IBSS */ 86 /* IBSS */
85 .ibss_band = UMAC_BAND_2GHZ, 87 .ibss_band = UMAC_BAND_2GHZ,
@@ -92,6 +94,10 @@ static int modparam_reset;
92module_param_named(reset, modparam_reset, bool, 0644); 94module_param_named(reset, modparam_reset, bool, 0644);
93MODULE_PARM_DESC(reset, "reset on firmware errors (default 0 [not reset])"); 95MODULE_PARM_DESC(reset, "reset on firmware errors (default 0 [not reset])");
94 96
97static int modparam_wimax_enable = 1;
98module_param_named(wimax_enable, modparam_wimax_enable, bool, 0644);
99MODULE_PARM_DESC(wimax_enable, "Enable wimax core (default 1 [wimax enabled])");
100
95int iwm_mode_to_nl80211_iftype(int mode) 101int iwm_mode_to_nl80211_iftype(int mode)
96{ 102{
97 switch (mode) { 103 switch (mode) {
@@ -134,6 +140,17 @@ static void iwm_disconnect_work(struct work_struct *work)
134 cfg80211_disconnected(iwm_to_ndev(iwm), 0, NULL, 0, GFP_KERNEL); 140 cfg80211_disconnected(iwm_to_ndev(iwm), 0, NULL, 0, GFP_KERNEL);
135} 141}
136 142
143static void iwm_ct_kill_work(struct work_struct *work)
144{
145 struct iwm_priv *iwm =
146 container_of(work, struct iwm_priv, ct_kill_delay.work);
147 struct wiphy *wiphy = iwm_to_wiphy(iwm);
148
149 IWM_INFO(iwm, "CT kill delay timeout\n");
150
151 wiphy_rfkill_set_hw_state(wiphy, false);
152}
153
137static int __iwm_up(struct iwm_priv *iwm); 154static int __iwm_up(struct iwm_priv *iwm);
138static int __iwm_down(struct iwm_priv *iwm); 155static int __iwm_down(struct iwm_priv *iwm);
139 156
@@ -195,6 +212,33 @@ static void iwm_reset_worker(struct work_struct *work)
195 mutex_unlock(&iwm->mutex); 212 mutex_unlock(&iwm->mutex);
196} 213}
197 214
215static void iwm_auth_retry_worker(struct work_struct *work)
216{
217 struct iwm_priv *iwm;
218 int i, ret;
219
220 iwm = container_of(work, struct iwm_priv, auth_retry_worker);
221 if (iwm->umac_profile_active) {
222 ret = iwm_invalidate_mlme_profile(iwm);
223 if (ret < 0)
224 return;
225 }
226
227 iwm->umac_profile->sec.auth_type = UMAC_AUTH_TYPE_LEGACY_PSK;
228
229 ret = iwm_send_mlme_profile(iwm);
230 if (ret < 0)
231 return;
232
233 for (i = 0; i < IWM_NUM_KEYS; i++)
234 if (iwm->keys[i].key_len)
235 iwm_set_key(iwm, 0, &iwm->keys[i]);
236
237 iwm_set_tx_key(iwm, iwm->default_key);
238}
239
240
241
198static void iwm_watchdog(unsigned long data) 242static void iwm_watchdog(unsigned long data)
199{ 243{
200 struct iwm_priv *iwm = (struct iwm_priv *)data; 244 struct iwm_priv *iwm = (struct iwm_priv *)data;
@@ -207,7 +251,7 @@ static void iwm_watchdog(unsigned long data)
207 251
208int iwm_priv_init(struct iwm_priv *iwm) 252int iwm_priv_init(struct iwm_priv *iwm)
209{ 253{
210 int i; 254 int i, j;
211 char name[32]; 255 char name[32];
212 256
213 iwm->status = 0; 257 iwm->status = 0;
@@ -226,7 +270,9 @@ int iwm_priv_init(struct iwm_priv *iwm)
226 iwm->scan_id = 1; 270 iwm->scan_id = 1;
227 INIT_DELAYED_WORK(&iwm->stats_request, iwm_statistics_request); 271 INIT_DELAYED_WORK(&iwm->stats_request, iwm_statistics_request);
228 INIT_DELAYED_WORK(&iwm->disconnect, iwm_disconnect_work); 272 INIT_DELAYED_WORK(&iwm->disconnect, iwm_disconnect_work);
273 INIT_DELAYED_WORK(&iwm->ct_kill_delay, iwm_ct_kill_work);
229 INIT_WORK(&iwm->reset_worker, iwm_reset_worker); 274 INIT_WORK(&iwm->reset_worker, iwm_reset_worker);
275 INIT_WORK(&iwm->auth_retry_worker, iwm_auth_retry_worker);
230 INIT_LIST_HEAD(&iwm->bss_list); 276 INIT_LIST_HEAD(&iwm->bss_list);
231 277
232 skb_queue_head_init(&iwm->rx_list); 278 skb_queue_head_init(&iwm->rx_list);
@@ -249,6 +295,8 @@ int iwm_priv_init(struct iwm_priv *iwm)
249 return -EAGAIN; 295 return -EAGAIN;
250 296
251 skb_queue_head_init(&iwm->txq[i].queue); 297 skb_queue_head_init(&iwm->txq[i].queue);
298 skb_queue_head_init(&iwm->txq[i].stopped_queue);
299 spin_lock_init(&iwm->txq[i].lock);
252 } 300 }
253 301
254 for (i = 0; i < IWM_NUM_KEYS; i++) 302 for (i = 0; i < IWM_NUM_KEYS; i++)
@@ -256,6 +304,12 @@ int iwm_priv_init(struct iwm_priv *iwm)
256 304
257 iwm->default_key = -1; 305 iwm->default_key = -1;
258 306
307 for (i = 0; i < IWM_STA_TABLE_NUM; i++)
308 for (j = 0; j < IWM_UMAC_TID_NR; j++) {
309 mutex_init(&iwm->sta_table[i].tid_info[j].mutex);
310 iwm->sta_table[i].tid_info[j].stopped = false;
311 }
312
259 init_timer(&iwm->watchdog); 313 init_timer(&iwm->watchdog);
260 iwm->watchdog.function = iwm_watchdog; 314 iwm->watchdog.function = iwm_watchdog;
261 iwm->watchdog.data = (unsigned long)iwm; 315 iwm->watchdog.data = (unsigned long)iwm;
@@ -436,7 +490,7 @@ static int iwm_config_boot_params(struct iwm_priv *iwm)
436 int ret; 490 int ret;
437 491
438 /* check Wimax is off and config debug monitor */ 492 /* check Wimax is off and config debug monitor */
439 if (iwm->conf.wimax_not_present) { 493 if (!modparam_wimax_enable) {
440 u32 data1 = 0x1f; 494 u32 data1 = 0x1f;
441 u32 addr1 = 0x606BE258; 495 u32 addr1 = 0x606BE258;
442 496
@@ -529,6 +583,7 @@ void iwm_link_off(struct iwm_priv *iwm)
529 583
530 for (i = 0; i < IWM_TX_QUEUES; i++) { 584 for (i = 0; i < IWM_TX_QUEUES; i++) {
531 skb_queue_purge(&iwm->txq[i].queue); 585 skb_queue_purge(&iwm->txq[i].queue);
586 skb_queue_purge(&iwm->txq[i].stopped_queue);
532 587
533 iwm->txq[i].concat_count = 0; 588 iwm->txq[i].concat_count = 0;
534 iwm->txq[i].concat_ptr = iwm->txq[i].concat_buf; 589 iwm->txq[i].concat_ptr = iwm->txq[i].concat_buf;
@@ -587,6 +642,8 @@ static int __iwm_up(struct iwm_priv *iwm)
587{ 642{
588 int ret; 643 int ret;
589 struct iwm_notif *notif_reboot, *notif_ack = NULL; 644 struct iwm_notif *notif_reboot, *notif_ack = NULL;
645 struct wiphy *wiphy = iwm_to_wiphy(iwm);
646 u32 wireless_mode;
590 647
591 ret = iwm_bus_enable(iwm); 648 ret = iwm_bus_enable(iwm);
592 if (ret) { 649 if (ret) {
@@ -638,6 +695,8 @@ static int __iwm_up(struct iwm_priv *iwm)
638 IWM_ERR(iwm, "MAC reading failed\n"); 695 IWM_ERR(iwm, "MAC reading failed\n");
639 goto err_disable; 696 goto err_disable;
640 } 697 }
698 memcpy(iwm_to_ndev(iwm)->perm_addr, iwm_to_ndev(iwm)->dev_addr,
699 ETH_ALEN);
641 700
642 /* We can load the FWs */ 701 /* We can load the FWs */
643 ret = iwm_load_fw(iwm); 702 ret = iwm_load_fw(iwm);
@@ -646,6 +705,30 @@ static int __iwm_up(struct iwm_priv *iwm)
646 goto err_disable; 705 goto err_disable;
647 } 706 }
648 707
708 ret = iwm_eeprom_fat_channels(iwm);
709 if (ret) {
710 IWM_ERR(iwm, "Couldnt read HT channels EEPROM entries\n");
711 goto err_fw;
712 }
713
714 /*
715 * Read our SKU capabilities.
716 * If it's valid, we AND the configured wireless mode with the
717 * device EEPROM value as the current profile wireless mode.
718 */
719 wireless_mode = iwm_eeprom_wireless_mode(iwm);
720 if (wireless_mode) {
721 iwm->conf.wireless_mode &= wireless_mode;
722 if (iwm->umac_profile)
723 iwm->umac_profile->wireless_mode =
724 iwm->conf.wireless_mode;
725 } else
726 IWM_ERR(iwm, "Wrong SKU capabilities: 0x%x\n",
727 *((u16 *)iwm_eeprom_access(iwm, IWM_EEPROM_SKU_CAP)));
728
729 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "L%s_U%s",
730 iwm->lmac_version, iwm->umac_version);
731
649 /* We configure the UMAC and enable the wifi module */ 732 /* We configure the UMAC and enable the wifi module */
650 ret = iwm_send_umac_config(iwm, 733 ret = iwm_send_umac_config(iwm,
651 cpu_to_le32(UMAC_RST_CTRL_FLG_WIFI_CORE_EN) | 734 cpu_to_le32(UMAC_RST_CTRL_FLG_WIFI_CORE_EN) |
diff --git a/drivers/net/wireless/iwmc3200wifi/netdev.c b/drivers/net/wireless/iwmc3200wifi/netdev.c
index 35ec006c2d2c..13a69ebf2a94 100644
--- a/drivers/net/wireless/iwmc3200wifi/netdev.c
+++ b/drivers/net/wireless/iwmc3200wifi/netdev.c
@@ -46,6 +46,7 @@
46 * -> sdio_disable_func() 46 * -> sdio_disable_func()
47 */ 47 */
48#include <linux/netdevice.h> 48#include <linux/netdevice.h>
49#include <linux/slab.h>
49 50
50#include "iwm.h" 51#include "iwm.h"
51#include "commands.h" 52#include "commands.h"
@@ -76,6 +77,14 @@ static int iwm_stop(struct net_device *ndev)
76 */ 77 */
77static const u16 iwm_1d_to_queue[8] = { 1, 0, 0, 1, 2, 2, 3, 3 }; 78static const u16 iwm_1d_to_queue[8] = { 1, 0, 0, 1, 2, 2, 3, 3 };
78 79
80int iwm_tid_to_queue(u16 tid)
81{
82 if (tid > IWM_UMAC_TID_NR - 2)
83 return -EINVAL;
84
85 return iwm_1d_to_queue[tid];
86}
87
79static u16 iwm_select_queue(struct net_device *dev, struct sk_buff *skb) 88static u16 iwm_select_queue(struct net_device *dev, struct sk_buff *skb)
80{ 89{
81 skb->priority = cfg80211_classify8021d(skb); 90 skb->priority = cfg80211_classify8021d(skb);
@@ -152,6 +161,7 @@ void iwm_if_free(struct iwm_priv *iwm)
152 if (!iwm_to_ndev(iwm)) 161 if (!iwm_to_ndev(iwm))
153 return; 162 return;
154 163
164 cancel_delayed_work_sync(&iwm->ct_kill_delay);
155 free_netdev(iwm_to_ndev(iwm)); 165 free_netdev(iwm_to_ndev(iwm));
156 iwm_priv_deinit(iwm); 166 iwm_priv_deinit(iwm);
157 kfree(iwm->umac_profile); 167 kfree(iwm->umac_profile);
diff --git a/drivers/net/wireless/iwmc3200wifi/rx.c b/drivers/net/wireless/iwmc3200wifi/rx.c
index 771a301003c9..3257d4fad835 100644
--- a/drivers/net/wireless/iwmc3200wifi/rx.c
+++ b/drivers/net/wireless/iwmc3200wifi/rx.c
@@ -44,6 +44,7 @@
44#include <linux/ieee80211.h> 44#include <linux/ieee80211.h>
45#include <linux/if_arp.h> 45#include <linux/if_arp.h>
46#include <linux/list.h> 46#include <linux/list.h>
47#include <linux/slab.h>
47#include <net/iw_handler.h> 48#include <net/iw_handler.h>
48 49
49#include "iwm.h" 50#include "iwm.h"
@@ -423,7 +424,9 @@ static int iwm_ntf_rx_ticket(struct iwm_priv *iwm, u8 *buf,
423 if (IS_ERR(ticket_node)) 424 if (IS_ERR(ticket_node))
424 return PTR_ERR(ticket_node); 425 return PTR_ERR(ticket_node);
425 426
426 IWM_DBG_RX(iwm, DBG, "TICKET RELEASE(%d)\n", 427 IWM_DBG_RX(iwm, DBG, "TICKET %s(%d)\n",
428 ticket->action == IWM_RX_TICKET_RELEASE ?
429 "RELEASE" : "DROP",
427 ticket->id); 430 ticket->id);
428 list_add_tail(&ticket_node->node, &iwm->rx_tickets); 431 list_add_tail(&ticket_node->node, &iwm->rx_tickets);
429 432
@@ -500,6 +503,18 @@ static int iwm_mlme_assoc_start(struct iwm_priv *iwm, u8 *buf,
500 return 0; 503 return 0;
501} 504}
502 505
506static u8 iwm_is_open_wep_profile(struct iwm_priv *iwm)
507{
508 if ((iwm->umac_profile->sec.ucast_cipher == UMAC_CIPHER_TYPE_WEP_40 ||
509 iwm->umac_profile->sec.ucast_cipher == UMAC_CIPHER_TYPE_WEP_104) &&
510 (iwm->umac_profile->sec.ucast_cipher ==
511 iwm->umac_profile->sec.mcast_cipher) &&
512 (iwm->umac_profile->sec.auth_type == UMAC_AUTH_TYPE_OPEN))
513 return 1;
514
515 return 0;
516}
517
503static int iwm_mlme_assoc_complete(struct iwm_priv *iwm, u8 *buf, 518static int iwm_mlme_assoc_complete(struct iwm_priv *iwm, u8 *buf,
504 unsigned long buf_size, 519 unsigned long buf_size,
505 struct iwm_wifi_cmd *cmd) 520 struct iwm_wifi_cmd *cmd)
@@ -565,11 +580,17 @@ static int iwm_mlme_assoc_complete(struct iwm_priv *iwm, u8 *buf,
565 goto ibss; 580 goto ibss;
566 581
567 if (!test_bit(IWM_STATUS_RESETTING, &iwm->status)) 582 if (!test_bit(IWM_STATUS_RESETTING, &iwm->status))
568 cfg80211_connect_result(iwm_to_ndev(iwm), 583 if (!iwm_is_open_wep_profile(iwm)) {
569 complete->bssid, 584 cfg80211_connect_result(iwm_to_ndev(iwm),
570 NULL, 0, NULL, 0, 585 complete->bssid,
571 WLAN_STATUS_UNSPECIFIED_FAILURE, 586 NULL, 0, NULL, 0,
572 GFP_KERNEL); 587 WLAN_STATUS_UNSPECIFIED_FAILURE,
588 GFP_KERNEL);
589 } else {
590 /* Let's try shared WEP auth */
591 IWM_ERR(iwm, "Trying WEP shared auth\n");
592 schedule_work(&iwm->auth_retry_worker);
593 }
573 else 594 else
574 cfg80211_disconnected(iwm_to_ndev(iwm), 0, NULL, 0, 595 cfg80211_disconnected(iwm_to_ndev(iwm), 0, NULL, 0,
575 GFP_KERNEL); 596 GFP_KERNEL);
@@ -713,6 +734,19 @@ static int iwm_mlme_update_sta_table(struct iwm_priv *iwm, u8 *buf,
713 return 0; 734 return 0;
714} 735}
715 736
737static int iwm_mlme_medium_lost(struct iwm_priv *iwm, u8 *buf,
738 unsigned long buf_size,
739 struct iwm_wifi_cmd *cmd)
740{
741 struct wiphy *wiphy = iwm_to_wiphy(iwm);
742
743 IWM_DBG_NTF(iwm, DBG, "WiFi/WiMax coexistence radio is OFF\n");
744
745 wiphy_rfkill_set_hw_state(wiphy, true);
746
747 return 0;
748}
749
716static int iwm_mlme_update_bss_table(struct iwm_priv *iwm, u8 *buf, 750static int iwm_mlme_update_bss_table(struct iwm_priv *iwm, u8 *buf,
717 unsigned long buf_size, 751 unsigned long buf_size,
718 struct iwm_wifi_cmd *cmd) 752 struct iwm_wifi_cmd *cmd)
@@ -761,7 +795,7 @@ static int iwm_mlme_update_bss_table(struct iwm_priv *iwm, u8 *buf,
761 } 795 }
762 796
763 bss->bss = kzalloc(bss_len, GFP_KERNEL); 797 bss->bss = kzalloc(bss_len, GFP_KERNEL);
764 if (!bss) { 798 if (!bss->bss) {
765 kfree(bss); 799 kfree(bss);
766 IWM_ERR(iwm, "Couldn't allocate bss\n"); 800 IWM_ERR(iwm, "Couldn't allocate bss\n");
767 return -ENOMEM; 801 return -ENOMEM;
@@ -835,36 +869,35 @@ static int iwm_mlme_mgt_frame(struct iwm_priv *iwm, u8 *buf,
835 struct iwm_umac_notif_mgt_frame *mgt_frame = 869 struct iwm_umac_notif_mgt_frame *mgt_frame =
836 (struct iwm_umac_notif_mgt_frame *)buf; 870 (struct iwm_umac_notif_mgt_frame *)buf;
837 struct ieee80211_mgmt *mgt = (struct ieee80211_mgmt *)mgt_frame->frame; 871 struct ieee80211_mgmt *mgt = (struct ieee80211_mgmt *)mgt_frame->frame;
838 u8 *ie;
839 872
840 IWM_HEXDUMP(iwm, DBG, MLME, "MGT: ", mgt_frame->frame, 873 IWM_HEXDUMP(iwm, DBG, MLME, "MGT: ", mgt_frame->frame,
841 le16_to_cpu(mgt_frame->len)); 874 le16_to_cpu(mgt_frame->len));
842 875
843 if (ieee80211_is_assoc_req(mgt->frame_control)) { 876 if (ieee80211_is_assoc_req(mgt->frame_control)) {
844 ie = mgt->u.assoc_req.variable;; 877 iwm->req_ie_len = le16_to_cpu(mgt_frame->len)
845 iwm->req_ie_len = 878 - offsetof(struct ieee80211_mgmt,
846 le16_to_cpu(mgt_frame->len) - (ie - (u8 *)mgt); 879 u.assoc_req.variable);
847 kfree(iwm->req_ie); 880 kfree(iwm->req_ie);
848 iwm->req_ie = kmemdup(mgt->u.assoc_req.variable, 881 iwm->req_ie = kmemdup(mgt->u.assoc_req.variable,
849 iwm->req_ie_len, GFP_KERNEL); 882 iwm->req_ie_len, GFP_KERNEL);
850 } else if (ieee80211_is_reassoc_req(mgt->frame_control)) { 883 } else if (ieee80211_is_reassoc_req(mgt->frame_control)) {
851 ie = mgt->u.reassoc_req.variable;; 884 iwm->req_ie_len = le16_to_cpu(mgt_frame->len)
852 iwm->req_ie_len = 885 - offsetof(struct ieee80211_mgmt,
853 le16_to_cpu(mgt_frame->len) - (ie - (u8 *)mgt); 886 u.reassoc_req.variable);
854 kfree(iwm->req_ie); 887 kfree(iwm->req_ie);
855 iwm->req_ie = kmemdup(mgt->u.reassoc_req.variable, 888 iwm->req_ie = kmemdup(mgt->u.reassoc_req.variable,
856 iwm->req_ie_len, GFP_KERNEL); 889 iwm->req_ie_len, GFP_KERNEL);
857 } else if (ieee80211_is_assoc_resp(mgt->frame_control)) { 890 } else if (ieee80211_is_assoc_resp(mgt->frame_control)) {
858 ie = mgt->u.assoc_resp.variable;; 891 iwm->resp_ie_len = le16_to_cpu(mgt_frame->len)
859 iwm->resp_ie_len = 892 - offsetof(struct ieee80211_mgmt,
860 le16_to_cpu(mgt_frame->len) - (ie - (u8 *)mgt); 893 u.assoc_resp.variable);
861 kfree(iwm->resp_ie); 894 kfree(iwm->resp_ie);
862 iwm->resp_ie = kmemdup(mgt->u.assoc_resp.variable, 895 iwm->resp_ie = kmemdup(mgt->u.assoc_resp.variable,
863 iwm->resp_ie_len, GFP_KERNEL); 896 iwm->resp_ie_len, GFP_KERNEL);
864 } else if (ieee80211_is_reassoc_resp(mgt->frame_control)) { 897 } else if (ieee80211_is_reassoc_resp(mgt->frame_control)) {
865 ie = mgt->u.reassoc_resp.variable;; 898 iwm->resp_ie_len = le16_to_cpu(mgt_frame->len)
866 iwm->resp_ie_len = 899 - offsetof(struct ieee80211_mgmt,
867 le16_to_cpu(mgt_frame->len) - (ie - (u8 *)mgt); 900 u.reassoc_resp.variable);
868 kfree(iwm->resp_ie); 901 kfree(iwm->resp_ie);
869 iwm->resp_ie = kmemdup(mgt->u.reassoc_resp.variable, 902 iwm->resp_ie = kmemdup(mgt->u.reassoc_resp.variable,
870 iwm->resp_ie_len, GFP_KERNEL); 903 iwm->resp_ie_len, GFP_KERNEL);
@@ -899,6 +932,8 @@ static int iwm_ntf_mlme(struct iwm_priv *iwm, u8 *buf,
899 case WIFI_IF_NTFY_EXTENDED_IE_REQUIRED: 932 case WIFI_IF_NTFY_EXTENDED_IE_REQUIRED:
900 IWM_DBG_MLME(iwm, DBG, "Extended IE required\n"); 933 IWM_DBG_MLME(iwm, DBG, "Extended IE required\n");
901 break; 934 break;
935 case WIFI_IF_NTFY_RADIO_PREEMPTION:
936 return iwm_mlme_medium_lost(iwm, buf, buf_size, cmd);
902 case WIFI_IF_NTFY_BSS_TRK_TABLE_CHANGED: 937 case WIFI_IF_NTFY_BSS_TRK_TABLE_CHANGED:
903 return iwm_mlme_update_bss_table(iwm, buf, buf_size, cmd); 938 return iwm_mlme_update_bss_table(iwm, buf, buf_size, cmd);
904 case WIFI_IF_NTFY_BSS_TRK_ENTRIES_REMOVED: 939 case WIFI_IF_NTFY_BSS_TRK_ENTRIES_REMOVED:
@@ -1052,12 +1087,83 @@ static int iwm_ntf_channel_info_list(struct iwm_priv *iwm, u8 *buf,
1052 return 0; 1087 return 0;
1053} 1088}
1054 1089
1090static int iwm_ntf_stop_resume_tx(struct iwm_priv *iwm, u8 *buf,
1091 unsigned long buf_size,
1092 struct iwm_wifi_cmd *cmd)
1093{
1094 struct iwm_umac_notif_stop_resume_tx *stp_res_tx =
1095 (struct iwm_umac_notif_stop_resume_tx *)buf;
1096 struct iwm_sta_info *sta_info;
1097 struct iwm_tid_info *tid_info;
1098 u8 sta_id = STA_ID_N_COLOR_ID(stp_res_tx->sta_id);
1099 u16 tid_msk = le16_to_cpu(stp_res_tx->stop_resume_tid_msk);
1100 int bit, ret = 0;
1101 bool stop = false;
1102
1103 IWM_DBG_NTF(iwm, DBG, "stop/resume notification:\n"
1104 "\tflags: 0x%x\n"
1105 "\tSTA id: %d\n"
1106 "\tTID bitmask: 0x%x\n",
1107 stp_res_tx->flags, stp_res_tx->sta_id,
1108 stp_res_tx->stop_resume_tid_msk);
1109
1110 if (stp_res_tx->flags & UMAC_STOP_TX_FLAG)
1111 stop = true;
1112
1113 sta_info = &iwm->sta_table[sta_id];
1114 if (!sta_info->valid) {
1115 IWM_ERR(iwm, "Stoping an invalid STA: %d %d\n",
1116 sta_id, stp_res_tx->sta_id);
1117 return -EINVAL;
1118 }
1119
1120 for_each_set_bit(bit, (unsigned long *)&tid_msk, IWM_UMAC_TID_NR) {
1121 tid_info = &sta_info->tid_info[bit];
1122
1123 mutex_lock(&tid_info->mutex);
1124 tid_info->stopped = stop;
1125 mutex_unlock(&tid_info->mutex);
1126
1127 if (!stop) {
1128 struct iwm_tx_queue *txq;
1129 int queue = iwm_tid_to_queue(bit);
1130
1131 if (queue < 0)
1132 continue;
1133
1134 txq = &iwm->txq[queue];
1135 /*
1136 * If we resume, we have to move our SKBs
1137 * back to the tx queue and queue some work.
1138 */
1139 spin_lock_bh(&txq->lock);
1140 skb_queue_splice_init(&txq->queue, &txq->stopped_queue);
1141 spin_unlock_bh(&txq->lock);
1142
1143 queue_work(txq->wq, &txq->worker);
1144 }
1145
1146 }
1147
1148 /* We send an ACK only for the stop case */
1149 if (stop)
1150 ret = iwm_send_umac_stop_resume_tx(iwm, stp_res_tx);
1151
1152 return ret;
1153}
1154
1055static int iwm_ntf_wifi_if_wrapper(struct iwm_priv *iwm, u8 *buf, 1155static int iwm_ntf_wifi_if_wrapper(struct iwm_priv *iwm, u8 *buf,
1056 unsigned long buf_size, 1156 unsigned long buf_size,
1057 struct iwm_wifi_cmd *cmd) 1157 struct iwm_wifi_cmd *cmd)
1058{ 1158{
1059 struct iwm_umac_wifi_if *hdr = 1159 struct iwm_umac_wifi_if *hdr;
1060 (struct iwm_umac_wifi_if *)cmd->buf.payload; 1160
1161 if (cmd == NULL) {
1162 IWM_ERR(iwm, "Couldn't find expected wifi command\n");
1163 return -EINVAL;
1164 }
1165
1166 hdr = (struct iwm_umac_wifi_if *)cmd->buf.payload;
1061 1167
1062 IWM_DBG_NTF(iwm, DBG, "WIFI_IF_WRAPPER cmd is delivered to UMAC: " 1168 IWM_DBG_NTF(iwm, DBG, "WIFI_IF_WRAPPER cmd is delivered to UMAC: "
1063 "oid is 0x%x\n", hdr->oid); 1169 "oid is 0x%x\n", hdr->oid);
@@ -1079,6 +1185,7 @@ static int iwm_ntf_wifi_if_wrapper(struct iwm_priv *iwm, u8 *buf,
1079 return 0; 1185 return 0;
1080} 1186}
1081 1187
1188#define CT_KILL_DELAY (30 * HZ)
1082static int iwm_ntf_card_state(struct iwm_priv *iwm, u8 *buf, 1189static int iwm_ntf_card_state(struct iwm_priv *iwm, u8 *buf,
1083 unsigned long buf_size, struct iwm_wifi_cmd *cmd) 1190 unsigned long buf_size, struct iwm_wifi_cmd *cmd)
1084{ 1191{
@@ -1091,7 +1198,20 @@ static int iwm_ntf_card_state(struct iwm_priv *iwm, u8 *buf,
1091 flags & IWM_CARD_STATE_HW_DISABLED ? "ON" : "OFF", 1198 flags & IWM_CARD_STATE_HW_DISABLED ? "ON" : "OFF",
1092 flags & IWM_CARD_STATE_CTKILL_DISABLED ? "ON" : "OFF"); 1199 flags & IWM_CARD_STATE_CTKILL_DISABLED ? "ON" : "OFF");
1093 1200
1094 wiphy_rfkill_set_hw_state(wiphy, flags & IWM_CARD_STATE_HW_DISABLED); 1201 if (flags & IWM_CARD_STATE_CTKILL_DISABLED) {
1202 /*
1203 * We got a CTKILL event: We bring the interface down in
1204 * oder to cool the device down, and try to bring it up
1205 * 30 seconds later. If it's still too hot, we'll go through
1206 * this code path again.
1207 */
1208 cancel_delayed_work_sync(&iwm->ct_kill_delay);
1209 schedule_delayed_work(&iwm->ct_kill_delay, CT_KILL_DELAY);
1210 }
1211
1212 wiphy_rfkill_set_hw_state(wiphy, flags &
1213 (IWM_CARD_STATE_HW_DISABLED |
1214 IWM_CARD_STATE_CTKILL_DISABLED));
1095 1215
1096 return 0; 1216 return 0;
1097} 1217}
@@ -1282,6 +1402,14 @@ int iwm_rx_handle(struct iwm_priv *iwm, u8 *buf, unsigned long buf_size)
1282 1402
1283 switch (le32_to_cpu(hdr->cmd)) { 1403 switch (le32_to_cpu(hdr->cmd)) {
1284 case UMAC_REBOOT_BARKER: 1404 case UMAC_REBOOT_BARKER:
1405 if (test_bit(IWM_STATUS_READY, &iwm->status)) {
1406 IWM_ERR(iwm, "Unexpected BARKER\n");
1407
1408 schedule_work(&iwm->reset_worker);
1409
1410 return 0;
1411 }
1412
1285 return iwm_notif_send(iwm, NULL, IWM_BARKER_REBOOT_NOTIFICATION, 1413 return iwm_notif_send(iwm, NULL, IWM_BARKER_REBOOT_NOTIFICATION,
1286 IWM_SRC_UDMA, buf, buf_size); 1414 IWM_SRC_UDMA, buf, buf_size);
1287 case UMAC_ACK_BARKER: 1415 case UMAC_ACK_BARKER:
@@ -1308,6 +1436,7 @@ static const iwm_handler iwm_umac_handlers[] =
1308 [UMAC_NOTIFY_OPCODE_STATS] = iwm_ntf_statistics, 1436 [UMAC_NOTIFY_OPCODE_STATS] = iwm_ntf_statistics,
1309 [UMAC_CMD_OPCODE_EEPROM_PROXY] = iwm_ntf_eeprom_proxy, 1437 [UMAC_CMD_OPCODE_EEPROM_PROXY] = iwm_ntf_eeprom_proxy,
1310 [UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST] = iwm_ntf_channel_info_list, 1438 [UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST] = iwm_ntf_channel_info_list,
1439 [UMAC_CMD_OPCODE_STOP_RESUME_STA_TX] = iwm_ntf_stop_resume_tx,
1311 [REPLY_RX_MPDU_CMD] = iwm_ntf_rx_packet, 1440 [REPLY_RX_MPDU_CMD] = iwm_ntf_rx_packet,
1312 [UMAC_CMD_OPCODE_WIFI_IF_WRAPPER] = iwm_ntf_wifi_if_wrapper, 1441 [UMAC_CMD_OPCODE_WIFI_IF_WRAPPER] = iwm_ntf_wifi_if_wrapper,
1313}; 1442};
@@ -1405,6 +1534,33 @@ static void classify8023(struct sk_buff *skb)
1405 } 1534 }
1406} 1535}
1407 1536
1537static void iwm_rx_process_amsdu(struct iwm_priv *iwm, struct sk_buff *skb)
1538{
1539 struct wireless_dev *wdev = iwm_to_wdev(iwm);
1540 struct net_device *ndev = iwm_to_ndev(iwm);
1541 struct sk_buff_head list;
1542 struct sk_buff *frame;
1543
1544 IWM_HEXDUMP(iwm, DBG, RX, "A-MSDU: ", skb->data, skb->len);
1545
1546 __skb_queue_head_init(&list);
1547 ieee80211_amsdu_to_8023s(skb, &list, ndev->dev_addr, wdev->iftype, 0);
1548
1549 while ((frame = __skb_dequeue(&list))) {
1550 ndev->stats.rx_packets++;
1551 ndev->stats.rx_bytes += frame->len;
1552
1553 frame->protocol = eth_type_trans(frame, ndev);
1554 frame->ip_summed = CHECKSUM_NONE;
1555 memset(frame->cb, 0, sizeof(frame->cb));
1556
1557 if (netif_rx_ni(frame) == NET_RX_DROP) {
1558 IWM_ERR(iwm, "Packet dropped\n");
1559 ndev->stats.rx_dropped++;
1560 }
1561 }
1562}
1563
1408static void iwm_rx_process_packet(struct iwm_priv *iwm, 1564static void iwm_rx_process_packet(struct iwm_priv *iwm,
1409 struct iwm_rx_packet *packet, 1565 struct iwm_rx_packet *packet,
1410 struct iwm_rx_ticket_node *ticket_node) 1566 struct iwm_rx_ticket_node *ticket_node)
@@ -1419,36 +1575,46 @@ static void iwm_rx_process_packet(struct iwm_priv *iwm,
1419 switch (le16_to_cpu(ticket_node->ticket->action)) { 1575 switch (le16_to_cpu(ticket_node->ticket->action)) {
1420 case IWM_RX_TICKET_RELEASE: 1576 case IWM_RX_TICKET_RELEASE:
1421 IWM_DBG_RX(iwm, DBG, "RELEASE packet\n"); 1577 IWM_DBG_RX(iwm, DBG, "RELEASE packet\n");
1422 classify8023(skb); 1578
1423 iwm_rx_adjust_packet(iwm, packet, ticket_node); 1579 iwm_rx_adjust_packet(iwm, packet, ticket_node);
1580 skb->dev = iwm_to_ndev(iwm);
1581 classify8023(skb);
1582
1583 if (le16_to_cpu(ticket_node->ticket->flags) &
1584 IWM_RX_TICKET_AMSDU_MSK) {
1585 iwm_rx_process_amsdu(iwm, skb);
1586 break;
1587 }
1588
1424 ret = ieee80211_data_to_8023(skb, ndev->dev_addr, wdev->iftype); 1589 ret = ieee80211_data_to_8023(skb, ndev->dev_addr, wdev->iftype);
1425 if (ret < 0) { 1590 if (ret < 0) {
1426 IWM_DBG_RX(iwm, DBG, "Couldn't convert 802.11 header - " 1591 IWM_DBG_RX(iwm, DBG, "Couldn't convert 802.11 header - "
1427 "%d\n", ret); 1592 "%d\n", ret);
1593 kfree_skb(packet->skb);
1428 break; 1594 break;
1429 } 1595 }
1430 1596
1431 IWM_HEXDUMP(iwm, DBG, RX, "802.3: ", skb->data, skb->len); 1597 IWM_HEXDUMP(iwm, DBG, RX, "802.3: ", skb->data, skb->len);
1432 1598
1433 skb->dev = iwm_to_ndev(iwm); 1599 ndev->stats.rx_packets++;
1600 ndev->stats.rx_bytes += skb->len;
1601
1434 skb->protocol = eth_type_trans(skb, ndev); 1602 skb->protocol = eth_type_trans(skb, ndev);
1435 skb->ip_summed = CHECKSUM_NONE; 1603 skb->ip_summed = CHECKSUM_NONE;
1436 memset(skb->cb, 0, sizeof(skb->cb)); 1604 memset(skb->cb, 0, sizeof(skb->cb));
1437 1605
1438 ndev->stats.rx_packets++;
1439 ndev->stats.rx_bytes += skb->len;
1440
1441 if (netif_rx_ni(skb) == NET_RX_DROP) { 1606 if (netif_rx_ni(skb) == NET_RX_DROP) {
1442 IWM_ERR(iwm, "Packet dropped\n"); 1607 IWM_ERR(iwm, "Packet dropped\n");
1443 ndev->stats.rx_dropped++; 1608 ndev->stats.rx_dropped++;
1444 } 1609 }
1445 break; 1610 break;
1446 case IWM_RX_TICKET_DROP: 1611 case IWM_RX_TICKET_DROP:
1447 IWM_DBG_RX(iwm, DBG, "DROP packet\n"); 1612 IWM_DBG_RX(iwm, DBG, "DROP packet: 0x%x\n",
1613 le16_to_cpu(ticket_node->ticket->flags));
1448 kfree_skb(packet->skb); 1614 kfree_skb(packet->skb);
1449 break; 1615 break;
1450 default: 1616 default:
1451 IWM_ERR(iwm, "Unknow ticket action: %d\n", 1617 IWM_ERR(iwm, "Unknown ticket action: %d\n",
1452 le16_to_cpu(ticket_node->ticket->action)); 1618 le16_to_cpu(ticket_node->ticket->action));
1453 kfree_skb(packet->skb); 1619 kfree_skb(packet->skb);
1454 } 1620 }
diff --git a/drivers/net/wireless/iwmc3200wifi/sdio.c b/drivers/net/wireless/iwmc3200wifi/sdio.c
index 8b1de84003ca..1eafd6dec3fd 100644
--- a/drivers/net/wireless/iwmc3200wifi/sdio.c
+++ b/drivers/net/wireless/iwmc3200wifi/sdio.c
@@ -63,6 +63,7 @@
63 */ 63 */
64 64
65#include <linux/kernel.h> 65#include <linux/kernel.h>
66#include <linux/slab.h>
66#include <linux/netdevice.h> 67#include <linux/netdevice.h>
67#include <linux/debugfs.h> 68#include <linux/debugfs.h>
68#include <linux/mmc/sdio_ids.h> 69#include <linux/mmc/sdio_ids.h>
@@ -224,8 +225,6 @@ static int if_sdio_disable(struct iwm_priv *iwm)
224 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm); 225 struct iwm_sdio_priv *hw = iwm_to_if_sdio(iwm);
225 int ret; 226 int ret;
226 227
227 iwm_reset(iwm);
228
229 sdio_claim_host(hw->func); 228 sdio_claim_host(hw->func);
230 sdio_writeb(hw->func, 0, IWM_SDIO_INTR_ENABLE_ADDR, &ret); 229 sdio_writeb(hw->func, 0, IWM_SDIO_INTR_ENABLE_ADDR, &ret);
231 if (ret < 0) 230 if (ret < 0)
@@ -237,6 +236,8 @@ static int if_sdio_disable(struct iwm_priv *iwm)
237 236
238 iwm_sdio_rx_free(hw); 237 iwm_sdio_rx_free(hw);
239 238
239 iwm_reset(iwm);
240
240 IWM_DBG_SDIO(iwm, INFO, "IWM SDIO disable\n"); 241 IWM_DBG_SDIO(iwm, INFO, "IWM SDIO disable\n");
241 242
242 return 0; 243 return 0;
@@ -399,6 +400,9 @@ static struct iwm_if_ops if_sdio_ops = {
399 .calib_lmac_name = "iwmc3200wifi-calib-sdio.bin", 400 .calib_lmac_name = "iwmc3200wifi-calib-sdio.bin",
400 .lmac_name = "iwmc3200wifi-lmac-sdio.bin", 401 .lmac_name = "iwmc3200wifi-lmac-sdio.bin",
401}; 402};
403MODULE_FIRMWARE("iwmc3200wifi-umac-sdio.bin");
404MODULE_FIRMWARE("iwmc3200wifi-calib-sdio.bin");
405MODULE_FIRMWARE("iwmc3200wifi-lmac-sdio.bin");
402 406
403static int iwm_sdio_probe(struct sdio_func *func, 407static int iwm_sdio_probe(struct sdio_func *func,
404 const struct sdio_device_id *id) 408 const struct sdio_device_id *id)
@@ -493,8 +497,10 @@ static void iwm_sdio_remove(struct sdio_func *func)
493} 497}
494 498
495static const struct sdio_device_id iwm_sdio_ids[] = { 499static const struct sdio_device_id iwm_sdio_ids[] = {
496 { SDIO_DEVICE(SDIO_VENDOR_ID_INTEL, 500 /* Global/AGN SKU */
497 SDIO_DEVICE_ID_INTEL_IWMC3200WIFI) }, 501 { SDIO_DEVICE(SDIO_VENDOR_ID_INTEL, 0x1403) },
502 /* BGN SKU */
503 { SDIO_DEVICE(SDIO_VENDOR_ID_INTEL, 0x1408) },
498 { /* end: all zeroes */ }, 504 { /* end: all zeroes */ },
499}; 505};
500MODULE_DEVICE_TABLE(sdio, iwm_sdio_ids); 506MODULE_DEVICE_TABLE(sdio, iwm_sdio_ids);
diff --git a/drivers/net/wireless/iwmc3200wifi/tx.c b/drivers/net/wireless/iwmc3200wifi/tx.c
index e3b4f7902daf..f6a02f123f31 100644
--- a/drivers/net/wireless/iwmc3200wifi/tx.c
+++ b/drivers/net/wireless/iwmc3200wifi/tx.c
@@ -64,6 +64,7 @@
64 * (i.e. half of the max size). [iwm_tx_worker] 64 * (i.e. half of the max size). [iwm_tx_worker]
65 */ 65 */
66 66
67#include <linux/slab.h>
67#include <linux/skbuff.h> 68#include <linux/skbuff.h>
68#include <linux/netdevice.h> 69#include <linux/netdevice.h>
69#include <linux/ieee80211.h> 70#include <linux/ieee80211.h>
@@ -329,7 +330,7 @@ static int iwm_tx_build_packet(struct iwm_priv *iwm, struct sk_buff *skb,
329 330
330 memcpy(buf + sizeof(*hdr), skb->data, skb->len); 331 memcpy(buf + sizeof(*hdr), skb->data, skb->len);
331 332
332 return 0; 333 return umac_cmd.seq_num;
333} 334}
334 335
335static int iwm_tx_send_concat_packets(struct iwm_priv *iwm, 336static int iwm_tx_send_concat_packets(struct iwm_priv *iwm,
@@ -354,16 +355,15 @@ static int iwm_tx_send_concat_packets(struct iwm_priv *iwm,
354 return ret; 355 return ret;
355} 356}
356 357
357#define CONFIG_IWM_TX_CONCATENATED 1
358
359void iwm_tx_worker(struct work_struct *work) 358void iwm_tx_worker(struct work_struct *work)
360{ 359{
361 struct iwm_priv *iwm; 360 struct iwm_priv *iwm;
362 struct iwm_tx_info *tx_info = NULL; 361 struct iwm_tx_info *tx_info = NULL;
363 struct sk_buff *skb; 362 struct sk_buff *skb;
364 int cmdlen, ret;
365 struct iwm_tx_queue *txq; 363 struct iwm_tx_queue *txq;
366 int pool_id; 364 struct iwm_sta_info *sta_info;
365 struct iwm_tid_info *tid_info;
366 int cmdlen, ret, pool_id;
367 367
368 txq = container_of(work, struct iwm_tx_queue, worker); 368 txq = container_of(work, struct iwm_tx_queue, worker);
369 iwm = container_of(txq, struct iwm_priv, txq[txq->id]); 369 iwm = container_of(txq, struct iwm_priv, txq[txq->id]);
@@ -373,19 +373,46 @@ void iwm_tx_worker(struct work_struct *work)
373 while (!test_bit(pool_id, &iwm->tx_credit.full_pools_map) && 373 while (!test_bit(pool_id, &iwm->tx_credit.full_pools_map) &&
374 !skb_queue_empty(&txq->queue)) { 374 !skb_queue_empty(&txq->queue)) {
375 375
376 spin_lock_bh(&txq->lock);
376 skb = skb_dequeue(&txq->queue); 377 skb = skb_dequeue(&txq->queue);
378 spin_unlock_bh(&txq->lock);
379
377 tx_info = skb_to_tx_info(skb); 380 tx_info = skb_to_tx_info(skb);
381 sta_info = &iwm->sta_table[tx_info->sta];
382 if (!sta_info->valid) {
383 IWM_ERR(iwm, "Trying to send a frame to unknown STA\n");
384 kfree_skb(skb);
385 continue;
386 }
387
388 tid_info = &sta_info->tid_info[tx_info->tid];
389
390 mutex_lock(&tid_info->mutex);
391
392 /*
393 * If the RAxTID is stopped, we queue the skb to the stopped
394 * queue.
395 * Whenever we'll get a UMAC notification to resume the tx flow
396 * for this RAxTID, we'll merge back the stopped queue into the
397 * regular queue. See iwm_ntf_stop_resume_tx() from rx.c.
398 */
399 if (tid_info->stopped) {
400 IWM_DBG_TX(iwm, DBG, "%dx%d stopped\n",
401 tx_info->sta, tx_info->tid);
402 spin_lock_bh(&txq->lock);
403 skb_queue_tail(&txq->stopped_queue, skb);
404 spin_unlock_bh(&txq->lock);
405
406 mutex_unlock(&tid_info->mutex);
407 continue;
408 }
409
378 cmdlen = IWM_UDMA_HDR_LEN + skb->len; 410 cmdlen = IWM_UDMA_HDR_LEN + skb->len;
379 411
380 IWM_DBG_TX(iwm, DBG, "Tx frame on queue %d: skb: 0x%p, sta: " 412 IWM_DBG_TX(iwm, DBG, "Tx frame on queue %d: skb: 0x%p, sta: "
381 "%d, color: %d\n", txq->id, skb, tx_info->sta, 413 "%d, color: %d\n", txq->id, skb, tx_info->sta,
382 tx_info->color); 414 tx_info->color);
383 415
384#if !CONFIG_IWM_TX_CONCATENATED
385 /* temporarily keep this to comparing the performance */
386 ret = iwm_send_packet(iwm, skb, pool_id);
387#else
388
389 if (txq->concat_count + cmdlen > IWM_HAL_CONCATENATE_BUF_SIZE) 416 if (txq->concat_count + cmdlen > IWM_HAL_CONCATENATE_BUF_SIZE)
390 iwm_tx_send_concat_packets(iwm, txq); 417 iwm_tx_send_concat_packets(iwm, txq);
391 418
@@ -393,14 +420,21 @@ void iwm_tx_worker(struct work_struct *work)
393 if (ret) { 420 if (ret) {
394 IWM_DBG_TX(iwm, DBG, "not enough tx_credit for queue " 421 IWM_DBG_TX(iwm, DBG, "not enough tx_credit for queue "
395 "%d, Tx worker stopped\n", txq->id); 422 "%d, Tx worker stopped\n", txq->id);
423 spin_lock_bh(&txq->lock);
396 skb_queue_head(&txq->queue, skb); 424 skb_queue_head(&txq->queue, skb);
425 spin_unlock_bh(&txq->lock);
426
427 mutex_unlock(&tid_info->mutex);
397 break; 428 break;
398 } 429 }
399 430
400 txq->concat_ptr = txq->concat_buf + txq->concat_count; 431 txq->concat_ptr = txq->concat_buf + txq->concat_count;
401 iwm_tx_build_packet(iwm, skb, pool_id, txq->concat_ptr); 432 tid_info->last_seq_num =
433 iwm_tx_build_packet(iwm, skb, pool_id, txq->concat_ptr);
402 txq->concat_count += ALIGN(cmdlen, 16); 434 txq->concat_count += ALIGN(cmdlen, 16);
403#endif 435
436 mutex_unlock(&tid_info->mutex);
437
404 kfree_skb(skb); 438 kfree_skb(skb);
405 } 439 }
406 440
@@ -419,14 +453,14 @@ int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
419 struct iwm_priv *iwm = ndev_to_iwm(netdev); 453 struct iwm_priv *iwm = ndev_to_iwm(netdev);
420 struct net_device *ndev = iwm_to_ndev(iwm); 454 struct net_device *ndev = iwm_to_ndev(iwm);
421 struct wireless_dev *wdev = iwm_to_wdev(iwm); 455 struct wireless_dev *wdev = iwm_to_wdev(iwm);
422 u8 *dst_addr;
423 struct iwm_tx_info *tx_info; 456 struct iwm_tx_info *tx_info;
424 struct iwm_tx_queue *txq; 457 struct iwm_tx_queue *txq;
425 struct iwm_sta_info *sta_info; 458 struct iwm_sta_info *sta_info;
426 u8 sta_id; 459 u8 *dst_addr, sta_id;
427 u16 queue; 460 u16 queue;
428 int ret; 461 int ret;
429 462
463
430 if (!test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)) { 464 if (!test_bit(IWM_STATUS_ASSOCIATED, &iwm->status)) {
431 IWM_DBG_TX(iwm, DBG, "LINK: stop netif_all_queues: " 465 IWM_DBG_TX(iwm, DBG, "LINK: stop netif_all_queues: "
432 "not associated\n"); 466 "not associated\n");
@@ -440,7 +474,8 @@ int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
440 txq = &iwm->txq[queue]; 474 txq = &iwm->txq[queue];
441 475
442 /* No free space for Tx, tx_worker is too slow */ 476 /* No free space for Tx, tx_worker is too slow */
443 if (skb_queue_len(&txq->queue) > IWM_TX_LIST_SIZE) { 477 if ((skb_queue_len(&txq->queue) > IWM_TX_LIST_SIZE) ||
478 (skb_queue_len(&txq->stopped_queue) > IWM_TX_LIST_SIZE)) {
444 IWM_DBG_TX(iwm, DBG, "LINK: stop netif_subqueue[%d]\n", queue); 479 IWM_DBG_TX(iwm, DBG, "LINK: stop netif_subqueue[%d]\n", queue);
445 netif_stop_subqueue(netdev, queue); 480 netif_stop_subqueue(netdev, queue);
446 return NETDEV_TX_BUSY; 481 return NETDEV_TX_BUSY;
@@ -477,7 +512,9 @@ int iwm_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
477 else 512 else
478 tx_info->tid = IWM_UMAC_MGMT_TID; 513 tx_info->tid = IWM_UMAC_MGMT_TID;
479 514
515 spin_lock_bh(&iwm->txq[queue].lock);
480 skb_queue_tail(&iwm->txq[queue].queue, skb); 516 skb_queue_tail(&iwm->txq[queue].queue, skb);
517 spin_unlock_bh(&iwm->txq[queue].lock);
481 518
482 queue_work(iwm->txq[queue].wq, &iwm->txq[queue].worker); 519 queue_work(iwm->txq[queue].wq, &iwm->txq[queue].worker);
483 520
diff --git a/drivers/net/wireless/iwmc3200wifi/umac.h b/drivers/net/wireless/iwmc3200wifi/umac.h
index c5a14ae3160a..7f54a145ca65 100644
--- a/drivers/net/wireless/iwmc3200wifi/umac.h
+++ b/drivers/net/wireless/iwmc3200wifi/umac.h
@@ -83,6 +83,20 @@ struct iwm_udma_out_wifi_hdr {
83 ((UMAC_HDI_ACT_TBL_IDX_RA_UMAC << UMAC_HDI_ACT_TBL_IDX_RA_POS) |\ 83 ((UMAC_HDI_ACT_TBL_IDX_RA_UMAC << UMAC_HDI_ACT_TBL_IDX_RA_POS) |\
84 (UMAC_HDI_ACT_TBL_IDX_TID_LMAC << UMAC_HDI_ACT_TBL_IDX_TID_POS)) 84 (UMAC_HDI_ACT_TBL_IDX_TID_LMAC << UMAC_HDI_ACT_TBL_IDX_TID_POS))
85 85
86/* STA ID and color */
87#define STA_ID_SEED (0x0f)
88#define STA_ID_POS (0)
89#define STA_ID_MSK (STA_ID_SEED << STA_ID_POS)
90
91#define STA_COLOR_SEED (0x7)
92#define STA_COLOR_POS (4)
93#define STA_COLOR_MSK (STA_COLOR_SEED << STA_COLOR_POS)
94
95#define STA_ID_N_COLOR_COLOR(id_n_color) \
96 (((id_n_color) & STA_COLOR_MSK) >> STA_COLOR_POS)
97#define STA_ID_N_COLOR_ID(id_n_color) \
98 (((id_n_color) & STA_ID_MSK) >> STA_ID_POS)
99
86/* iwm_umac_notif_alive.page_grp_state Group number -- bits [3:0] */ 100/* iwm_umac_notif_alive.page_grp_state Group number -- bits [3:0] */
87#define UMAC_ALIVE_PAGE_STS_GRP_NUM_POS 0 101#define UMAC_ALIVE_PAGE_STS_GRP_NUM_POS 0
88#define UMAC_ALIVE_PAGE_STS_GRP_NUM_SEED 0xF 102#define UMAC_ALIVE_PAGE_STS_GRP_NUM_SEED 0xF
@@ -260,6 +274,9 @@ struct iwm_udma_out_wifi_hdr {
260#define UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST 0x16 274#define UMAC_CMD_OPCODE_GET_CHAN_INFO_LIST 0x16
261#define UMAC_CMD_OPCODE_SET_PARAM_LIST 0x17 275#define UMAC_CMD_OPCODE_SET_PARAM_LIST 0x17
262#define UMAC_CMD_OPCODE_GET_PARAM_LIST 0x18 276#define UMAC_CMD_OPCODE_GET_PARAM_LIST 0x18
277#define UMAC_CMD_OPCODE_STOP_RESUME_STA_TX 0x19
278#define UMAC_CMD_OPCODE_TEST_BLOCK_ACK 0x1A
279
263#define UMAC_CMD_OPCODE_BASE_WRAPPER 0xFA 280#define UMAC_CMD_OPCODE_BASE_WRAPPER 0xFA
264#define UMAC_CMD_OPCODE_LMAC_WRAPPER 0xFB 281#define UMAC_CMD_OPCODE_LMAC_WRAPPER 0xFB
265#define UMAC_CMD_OPCODE_HW_TEST_WRAPPER 0xFC 282#define UMAC_CMD_OPCODE_HW_TEST_WRAPPER 0xFC
@@ -281,6 +298,7 @@ struct iwm_udma_out_wifi_hdr {
281#define UMAC_WIFI_IF_CMD_GLOBAL_TX_KEY_ID 0x1B 298#define UMAC_WIFI_IF_CMD_GLOBAL_TX_KEY_ID 0x1B
282#define UMAC_WIFI_IF_CMD_SET_HOST_EXTENDED_IE 0x1C 299#define UMAC_WIFI_IF_CMD_SET_HOST_EXTENDED_IE 0x1C
283#define UMAC_WIFI_IF_CMD_GET_SUPPORTED_CHANNELS 0x1E 300#define UMAC_WIFI_IF_CMD_GET_SUPPORTED_CHANNELS 0x1E
301#define UMAC_WIFI_IF_CMD_PMKID_UPDATE 0x1F
284#define UMAC_WIFI_IF_CMD_TX_PWR_TRIGGER 0x20 302#define UMAC_WIFI_IF_CMD_TX_PWR_TRIGGER 0x20
285 303
286/* UMAC WiFi interface ports */ 304/* UMAC WiFi interface ports */
@@ -687,19 +705,24 @@ struct iwm_umac_notif_rx_ticket {
687/* Tx/Rx rates window (number of max of last update window per second) */ 705/* Tx/Rx rates window (number of max of last update window per second) */
688#define UMAC_NTF_RATE_SAMPLE_NR 4 706#define UMAC_NTF_RATE_SAMPLE_NR 4
689 707
708/* Max numbers of bits required to go through all antennae in bitmasks */
709#define UMAC_PHY_NUM_CHAINS 3
710
690#define IWM_UMAC_MGMT_TID 8 711#define IWM_UMAC_MGMT_TID 8
691#define IWM_UMAC_TID_NR 8 712#define IWM_UMAC_TID_NR 9 /* 8 TIDs + MGMT */
692 713
693struct iwm_umac_notif_stats { 714struct iwm_umac_notif_stats {
694 struct iwm_umac_wifi_in_hdr hdr; 715 struct iwm_umac_wifi_in_hdr hdr;
695 __le32 flags; 716 __le32 flags;
696 __le32 timestamp; 717 __le32 timestamp;
697 __le16 tid_load[IWM_UMAC_TID_NR + 2]; /* 1 non-QoS + 1 dword align */ 718 __le16 tid_load[IWM_UMAC_TID_NR + 1]; /* 1 non-QoS + 1 dword align */
698 __le16 tx_rate[UMAC_NTF_RATE_SAMPLE_NR]; 719 __le16 tx_rate[UMAC_NTF_RATE_SAMPLE_NR];
699 __le16 rx_rate[UMAC_NTF_RATE_SAMPLE_NR]; 720 __le16 rx_rate[UMAC_NTF_RATE_SAMPLE_NR];
721 __le32 chain_energy[UMAC_PHY_NUM_CHAINS];
700 s32 rssi_dbm; 722 s32 rssi_dbm;
701 s32 noise_dbm; 723 s32 noise_dbm;
702 __le32 supp_rates; 724 __le32 supp_rates;
725 __le32 supp_ht_rates;
703 __le32 missed_beacons; 726 __le32 missed_beacons;
704 __le32 rx_beacons; 727 __le32 rx_beacons;
705 __le32 rx_dir_pkts; 728 __le32 rx_dir_pkts;
@@ -737,6 +760,20 @@ struct iwm_umac_notif_stats {
737 __le32 roam_ap_loadblance; 760 __le32 roam_ap_loadblance;
738} __attribute__ ((packed)); 761} __attribute__ ((packed));
739 762
763#define UMAC_STOP_TX_FLAG 0x1
764#define UMAC_RESUME_TX_FLAG 0x2
765
766#define LAST_SEQ_NUM_INVALID 0xFFFF
767
768struct iwm_umac_notif_stop_resume_tx {
769 struct iwm_umac_wifi_in_hdr hdr;
770 u8 flags; /* UMAC_*_TX_FLAG_* */
771 u8 sta_id;
772 __le16 stop_resume_tid_msk; /* tid bitmask */
773} __attribute__ ((packed));
774
775#define UMAC_MAX_NUM_PMKIDS 4
776
740/* WiFi interface wrapper header */ 777/* WiFi interface wrapper header */
741struct iwm_umac_wifi_if { 778struct iwm_umac_wifi_if {
742 u8 oid; 779 u8 oid;
diff --git a/drivers/net/wireless/libertas/11d.c b/drivers/net/wireless/libertas/11d.c
deleted file mode 100644
index 5c6968101f0d..000000000000
--- a/drivers/net/wireless/libertas/11d.c
+++ /dev/null
@@ -1,696 +0,0 @@
1/**
2 * This file contains functions for 802.11D.
3 */
4#include <linux/ctype.h>
5#include <linux/kernel.h>
6#include <linux/wireless.h>
7
8#include "host.h"
9#include "decl.h"
10#include "11d.h"
11#include "dev.h"
12#include "wext.h"
13
14#define TX_PWR_DEFAULT 10
15
16static struct region_code_mapping region_code_mapping[] = {
17 {"US ", 0x10}, /* US FCC */
18 {"CA ", 0x10}, /* IC Canada */
19 {"SG ", 0x10}, /* Singapore */
20 {"EU ", 0x30}, /* ETSI */
21 {"AU ", 0x30}, /* Australia */
22 {"KR ", 0x30}, /* Republic Of Korea */
23 {"ES ", 0x31}, /* Spain */
24 {"FR ", 0x32}, /* France */
25 {"JP ", 0x40}, /* Japan */
26};
27
28/* Following 2 structure defines the supported channels */
29static struct chan_freq_power channel_freq_power_UN_BG[] = {
30 {1, 2412, TX_PWR_DEFAULT},
31 {2, 2417, TX_PWR_DEFAULT},
32 {3, 2422, TX_PWR_DEFAULT},
33 {4, 2427, TX_PWR_DEFAULT},
34 {5, 2432, TX_PWR_DEFAULT},
35 {6, 2437, TX_PWR_DEFAULT},
36 {7, 2442, TX_PWR_DEFAULT},
37 {8, 2447, TX_PWR_DEFAULT},
38 {9, 2452, TX_PWR_DEFAULT},
39 {10, 2457, TX_PWR_DEFAULT},
40 {11, 2462, TX_PWR_DEFAULT},
41 {12, 2467, TX_PWR_DEFAULT},
42 {13, 2472, TX_PWR_DEFAULT},
43 {14, 2484, TX_PWR_DEFAULT}
44};
45
46static u8 lbs_region_2_code(u8 *region)
47{
48 u8 i;
49
50 for (i = 0; i < COUNTRY_CODE_LEN && region[i]; i++)
51 region[i] = toupper(region[i]);
52
53 for (i = 0; i < ARRAY_SIZE(region_code_mapping); i++) {
54 if (!memcmp(region, region_code_mapping[i].region,
55 COUNTRY_CODE_LEN))
56 return (region_code_mapping[i].code);
57 }
58
59 /* default is US */
60 return (region_code_mapping[0].code);
61}
62
63static u8 *lbs_code_2_region(u8 code)
64{
65 u8 i;
66
67 for (i = 0; i < ARRAY_SIZE(region_code_mapping); i++) {
68 if (region_code_mapping[i].code == code)
69 return (region_code_mapping[i].region);
70 }
71 /* default is US */
72 return (region_code_mapping[0].region);
73}
74
75/**
76 * @brief This function finds the nrchan-th chan after the firstchan
77 * @param band band
78 * @param firstchan first channel number
79 * @param nrchan number of channels
80 * @return the nrchan-th chan number
81*/
82static u8 lbs_get_chan_11d(u8 firstchan, u8 nrchan, u8 *chan)
83/*find the nrchan-th chan after the firstchan*/
84{
85 u8 i;
86 struct chan_freq_power *cfp;
87 u8 cfp_no;
88
89 cfp = channel_freq_power_UN_BG;
90 cfp_no = ARRAY_SIZE(channel_freq_power_UN_BG);
91
92 for (i = 0; i < cfp_no; i++) {
93 if ((cfp + i)->channel == firstchan) {
94 lbs_deb_11d("firstchan found\n");
95 break;
96 }
97 }
98
99 if (i < cfp_no) {
100 /*if beyond the boundary */
101 if (i + nrchan < cfp_no) {
102 *chan = (cfp + i + nrchan)->channel;
103 return 1;
104 }
105 }
106
107 return 0;
108}
109
110/**
111 * @brief This function Checks if chan txpwr is learned from AP/IBSS
112 * @param chan chan number
113 * @param parsed_region_chan pointer to parsed_region_chan_11d
114 * @return TRUE; FALSE
115*/
116static u8 lbs_channel_known_11d(u8 chan,
117 struct parsed_region_chan_11d * parsed_region_chan)
118{
119 struct chan_power_11d *chanpwr = parsed_region_chan->chanpwr;
120 u8 nr_chan = parsed_region_chan->nr_chan;
121 u8 i = 0;
122
123 lbs_deb_hex(LBS_DEB_11D, "parsed_region_chan", (char *)chanpwr,
124 sizeof(struct chan_power_11d) * nr_chan);
125
126 for (i = 0; i < nr_chan; i++) {
127 if (chan == chanpwr[i].chan) {
128 lbs_deb_11d("found chan %d\n", chan);
129 return 1;
130 }
131 }
132
133 lbs_deb_11d("chan %d not found\n", chan);
134 return 0;
135}
136
137u32 lbs_chan_2_freq(u8 chan)
138{
139 struct chan_freq_power *cf;
140 u16 i;
141 u32 freq = 0;
142
143 cf = channel_freq_power_UN_BG;
144
145 for (i = 0; i < ARRAY_SIZE(channel_freq_power_UN_BG); i++) {
146 if (chan == cf[i].channel)
147 freq = cf[i].freq;
148 }
149
150 return freq;
151}
152
153static int generate_domain_info_11d(struct parsed_region_chan_11d
154 *parsed_region_chan,
155 struct lbs_802_11d_domain_reg *domaininfo)
156{
157 u8 nr_subband = 0;
158
159 u8 nr_chan = parsed_region_chan->nr_chan;
160 u8 nr_parsedchan = 0;
161
162 u8 firstchan = 0, nextchan = 0, maxpwr = 0;
163
164 u8 i, flag = 0;
165
166 memcpy(domaininfo->countrycode, parsed_region_chan->countrycode,
167 COUNTRY_CODE_LEN);
168
169 lbs_deb_11d("nrchan %d\n", nr_chan);
170 lbs_deb_hex(LBS_DEB_11D, "parsed_region_chan", (char *)parsed_region_chan,
171 sizeof(struct parsed_region_chan_11d));
172
173 for (i = 0; i < nr_chan; i++) {
174 if (!flag) {
175 flag = 1;
176 nextchan = firstchan =
177 parsed_region_chan->chanpwr[i].chan;
178 maxpwr = parsed_region_chan->chanpwr[i].pwr;
179 nr_parsedchan = 1;
180 continue;
181 }
182
183 if (parsed_region_chan->chanpwr[i].chan == nextchan + 1 &&
184 parsed_region_chan->chanpwr[i].pwr == maxpwr) {
185 nextchan++;
186 nr_parsedchan++;
187 } else {
188 domaininfo->subband[nr_subband].firstchan = firstchan;
189 domaininfo->subband[nr_subband].nrchan =
190 nr_parsedchan;
191 domaininfo->subband[nr_subband].maxtxpwr = maxpwr;
192 nr_subband++;
193 nextchan = firstchan =
194 parsed_region_chan->chanpwr[i].chan;
195 maxpwr = parsed_region_chan->chanpwr[i].pwr;
196 }
197 }
198
199 if (flag) {
200 domaininfo->subband[nr_subband].firstchan = firstchan;
201 domaininfo->subband[nr_subband].nrchan = nr_parsedchan;
202 domaininfo->subband[nr_subband].maxtxpwr = maxpwr;
203 nr_subband++;
204 }
205 domaininfo->nr_subband = nr_subband;
206
207 lbs_deb_11d("nr_subband=%x\n", domaininfo->nr_subband);
208 lbs_deb_hex(LBS_DEB_11D, "domaininfo", (char *)domaininfo,
209 COUNTRY_CODE_LEN + 1 +
210 sizeof(struct ieee_subbandset) * nr_subband);
211 return 0;
212}
213
214/**
215 * @brief This function generates parsed_region_chan from Domain Info learned from AP/IBSS
216 * @param region_chan pointer to struct region_channel
217 * @param *parsed_region_chan pointer to parsed_region_chan_11d
218 * @return N/A
219*/
220static void lbs_generate_parsed_region_chan_11d(struct region_channel *region_chan,
221 struct parsed_region_chan_11d *
222 parsed_region_chan)
223{
224 u8 i;
225 struct chan_freq_power *cfp;
226
227 if (region_chan == NULL) {
228 lbs_deb_11d("region_chan is NULL\n");
229 return;
230 }
231
232 cfp = region_chan->CFP;
233 if (cfp == NULL) {
234 lbs_deb_11d("cfp is NULL \n");
235 return;
236 }
237
238 parsed_region_chan->band = region_chan->band;
239 parsed_region_chan->region = region_chan->region;
240 memcpy(parsed_region_chan->countrycode,
241 lbs_code_2_region(region_chan->region), COUNTRY_CODE_LEN);
242
243 lbs_deb_11d("region 0x%x, band %d\n", parsed_region_chan->region,
244 parsed_region_chan->band);
245
246 for (i = 0; i < region_chan->nrcfp; i++, cfp++) {
247 parsed_region_chan->chanpwr[i].chan = cfp->channel;
248 parsed_region_chan->chanpwr[i].pwr = cfp->maxtxpower;
249 lbs_deb_11d("chan %d, pwr %d\n",
250 parsed_region_chan->chanpwr[i].chan,
251 parsed_region_chan->chanpwr[i].pwr);
252 }
253 parsed_region_chan->nr_chan = region_chan->nrcfp;
254
255 lbs_deb_11d("nrchan %d\n", parsed_region_chan->nr_chan);
256
257 return;
258}
259
260/**
261 * @brief generate parsed_region_chan from Domain Info learned from AP/IBSS
262 * @param region region ID
263 * @param band band
264 * @param chan chan
265 * @return TRUE;FALSE
266*/
267static u8 lbs_region_chan_supported_11d(u8 region, u8 chan)
268{
269 struct chan_freq_power *cfp;
270 int cfp_no;
271 u8 idx;
272 int ret = 0;
273
274 lbs_deb_enter(LBS_DEB_11D);
275
276 cfp = lbs_get_region_cfp_table(region, &cfp_no);
277 if (cfp == NULL)
278 return 0;
279
280 for (idx = 0; idx < cfp_no; idx++) {
281 if (chan == (cfp + idx)->channel) {
282 /* If Mrvl Chip Supported? */
283 if ((cfp + idx)->unsupported) {
284 ret = 0;
285 } else {
286 ret = 1;
287 }
288 goto done;
289 }
290 }
291
292 /*chan is not in the region table */
293
294done:
295 lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
296 return ret;
297}
298
299/**
300 * @brief This function checks if chan txpwr is learned from AP/IBSS
301 * @param chan chan number
302 * @param parsed_region_chan pointer to parsed_region_chan_11d
303 * @return 0
304*/
305static int parse_domain_info_11d(struct ieee_ie_country_info_full_set *countryinfo,
306 u8 band,
307 struct parsed_region_chan_11d *parsed_region_chan)
308{
309 u8 nr_subband, nrchan;
310 u8 lastchan, firstchan;
311 u8 region;
312 u8 curchan = 0;
313
314 u8 idx = 0; /*chan index in parsed_region_chan */
315
316 u8 j, i;
317
318 lbs_deb_enter(LBS_DEB_11D);
319
320 /*validation Rules:
321 1. valid region Code
322 2. First Chan increment
323 3. channel range no overlap
324 4. channel is valid?
325 5. channel is supported by region?
326 6. Others
327 */
328
329 lbs_deb_hex(LBS_DEB_11D, "countryinfo", (u8 *) countryinfo, 30);
330
331 if ((*(countryinfo->countrycode)) == 0
332 || (countryinfo->header.len <= COUNTRY_CODE_LEN)) {
333 /* No region Info or Wrong region info: treat as No 11D info */
334 goto done;
335 }
336
337 /*Step1: check region_code */
338 parsed_region_chan->region = region =
339 lbs_region_2_code(countryinfo->countrycode);
340
341 lbs_deb_11d("regioncode=%x\n", (u8) parsed_region_chan->region);
342 lbs_deb_hex(LBS_DEB_11D, "countrycode", (char *)countryinfo->countrycode,
343 COUNTRY_CODE_LEN);
344
345 parsed_region_chan->band = band;
346
347 memcpy(parsed_region_chan->countrycode, countryinfo->countrycode,
348 COUNTRY_CODE_LEN);
349
350 nr_subband = (countryinfo->header.len - COUNTRY_CODE_LEN) /
351 sizeof(struct ieee_subbandset);
352
353 for (j = 0, lastchan = 0; j < nr_subband; j++) {
354
355 if (countryinfo->subband[j].firstchan <= lastchan) {
356 /*Step2&3. Check First Chan Num increment and no overlap */
357 lbs_deb_11d("chan %d>%d, overlap\n",
358 countryinfo->subband[j].firstchan, lastchan);
359 continue;
360 }
361
362 firstchan = countryinfo->subband[j].firstchan;
363 nrchan = countryinfo->subband[j].nrchan;
364
365 for (i = 0; idx < MAX_NO_OF_CHAN && i < nrchan; i++) {
366 /*step4: channel is supported? */
367
368 if (!lbs_get_chan_11d(firstchan, i, &curchan)) {
369 /* Chan is not found in UN table */
370 lbs_deb_11d("chan is not supported: %d \n", i);
371 break;
372 }
373
374 lastchan = curchan;
375
376 if (lbs_region_chan_supported_11d(region, curchan)) {
377 /*step5: Check if curchan is supported by mrvl in region */
378 parsed_region_chan->chanpwr[idx].chan = curchan;
379 parsed_region_chan->chanpwr[idx].pwr =
380 countryinfo->subband[j].maxtxpwr;
381 idx++;
382 } else {
383 /*not supported and ignore the chan */
384 lbs_deb_11d(
385 "i %d, chan %d unsupported in region %x, band %d\n",
386 i, curchan, region, band);
387 }
388 }
389
390 /*Step6: Add other checking if any */
391
392 }
393
394 parsed_region_chan->nr_chan = idx;
395
396 lbs_deb_11d("nrchan=%x\n", parsed_region_chan->nr_chan);
397 lbs_deb_hex(LBS_DEB_11D, "parsed_region_chan", (u8 *) parsed_region_chan,
398 2 + COUNTRY_CODE_LEN + sizeof(struct parsed_region_chan_11d) * idx);
399
400done:
401 lbs_deb_enter(LBS_DEB_11D);
402 return 0;
403}
404
405/**
406 * @brief This function calculates the scan type for channels
407 * @param chan chan number
408 * @param parsed_region_chan pointer to parsed_region_chan_11d
409 * @return PASSIVE if chan is unknown; ACTIVE if chan is known
410*/
411u8 lbs_get_scan_type_11d(u8 chan,
412 struct parsed_region_chan_11d * parsed_region_chan)
413{
414 u8 scan_type = CMD_SCAN_TYPE_PASSIVE;
415
416 lbs_deb_enter(LBS_DEB_11D);
417
418 if (lbs_channel_known_11d(chan, parsed_region_chan)) {
419 lbs_deb_11d("found, do active scan\n");
420 scan_type = CMD_SCAN_TYPE_ACTIVE;
421 } else {
422 lbs_deb_11d("not found, do passive scan\n");
423 }
424
425 lbs_deb_leave_args(LBS_DEB_11D, "ret scan_type %d", scan_type);
426 return scan_type;
427
428}
429
430void lbs_init_11d(struct lbs_private *priv)
431{
432 priv->enable11d = 0;
433 memset(&(priv->parsed_region_chan), 0,
434 sizeof(struct parsed_region_chan_11d));
435 return;
436}
437
438/**
439 * @brief This function sets DOMAIN INFO to FW
440 * @param priv pointer to struct lbs_private
441 * @return 0; -1
442*/
443static int set_domain_info_11d(struct lbs_private *priv)
444{
445 int ret;
446
447 if (!priv->enable11d) {
448 lbs_deb_11d("dnld domain Info with 11d disabled\n");
449 return 0;
450 }
451
452 ret = lbs_prepare_and_send_command(priv, CMD_802_11D_DOMAIN_INFO,
453 CMD_ACT_SET,
454 CMD_OPTION_WAITFORRSP, 0, NULL);
455 if (ret)
456 lbs_deb_11d("fail to dnld domain info\n");
457
458 return ret;
459}
460
461/**
462 * @brief This function setups scan channels
463 * @param priv pointer to struct lbs_private
464 * @param band band
465 * @return 0
466*/
467int lbs_set_universaltable(struct lbs_private *priv, u8 band)
468{
469 u16 size = sizeof(struct chan_freq_power);
470 u16 i = 0;
471
472 memset(priv->universal_channel, 0,
473 sizeof(priv->universal_channel));
474
475 priv->universal_channel[i].nrcfp =
476 sizeof(channel_freq_power_UN_BG) / size;
477 lbs_deb_11d("BG-band nrcfp %d\n",
478 priv->universal_channel[i].nrcfp);
479
480 priv->universal_channel[i].CFP = channel_freq_power_UN_BG;
481 priv->universal_channel[i].valid = 1;
482 priv->universal_channel[i].region = UNIVERSAL_REGION_CODE;
483 priv->universal_channel[i].band = band;
484 i++;
485
486 return 0;
487}
488
489/**
490 * @brief This function implements command CMD_802_11D_DOMAIN_INFO
491 * @param priv pointer to struct lbs_private
492 * @param cmd pointer to cmd buffer
493 * @param cmdno cmd ID
494 * @param cmdOption cmd action
495 * @return 0
496*/
497int lbs_cmd_802_11d_domain_info(struct lbs_private *priv,
498 struct cmd_ds_command *cmd, u16 cmdno,
499 u16 cmdoption)
500{
501 struct cmd_ds_802_11d_domain_info *pdomaininfo =
502 &cmd->params.domaininfo;
503 struct mrvl_ie_domain_param_set *domain = &pdomaininfo->domain;
504 u8 nr_subband = priv->domainreg.nr_subband;
505
506 lbs_deb_enter(LBS_DEB_11D);
507
508 lbs_deb_11d("nr_subband=%x\n", nr_subband);
509
510 cmd->command = cpu_to_le16(cmdno);
511 pdomaininfo->action = cpu_to_le16(cmdoption);
512 if (cmdoption == CMD_ACT_GET) {
513 cmd->size =
514 cpu_to_le16(sizeof(pdomaininfo->action) + S_DS_GEN);
515 lbs_deb_hex(LBS_DEB_11D, "802_11D_DOMAIN_INFO", (u8 *) cmd,
516 le16_to_cpu(cmd->size));
517 goto done;
518 }
519
520 domain->header.type = cpu_to_le16(TLV_TYPE_DOMAIN);
521 memcpy(domain->countrycode, priv->domainreg.countrycode,
522 sizeof(domain->countrycode));
523
524 domain->header.len =
525 cpu_to_le16(nr_subband * sizeof(struct ieee_subbandset) +
526 sizeof(domain->countrycode));
527
528 if (nr_subband) {
529 memcpy(domain->subband, priv->domainreg.subband,
530 nr_subband * sizeof(struct ieee_subbandset));
531
532 cmd->size = cpu_to_le16(sizeof(pdomaininfo->action) +
533 le16_to_cpu(domain->header.len) +
534 sizeof(struct mrvl_ie_header) +
535 S_DS_GEN);
536 } else {
537 cmd->size =
538 cpu_to_le16(sizeof(pdomaininfo->action) + S_DS_GEN);
539 }
540
541 lbs_deb_hex(LBS_DEB_11D, "802_11D_DOMAIN_INFO", (u8 *) cmd, le16_to_cpu(cmd->size));
542
543done:
544 lbs_deb_enter(LBS_DEB_11D);
545 return 0;
546}
547
548/**
549 * @brief This function parses countryinfo from AP and download country info to FW
550 * @param priv pointer to struct lbs_private
551 * @param resp pointer to command response buffer
552 * @return 0; -1
553 */
554int lbs_ret_802_11d_domain_info(struct cmd_ds_command *resp)
555{
556 struct cmd_ds_802_11d_domain_info *domaininfo = &resp->params.domaininforesp;
557 struct mrvl_ie_domain_param_set *domain = &domaininfo->domain;
558 u16 action = le16_to_cpu(domaininfo->action);
559 s16 ret = 0;
560 u8 nr_subband = 0;
561
562 lbs_deb_enter(LBS_DEB_11D);
563
564 lbs_deb_hex(LBS_DEB_11D, "domain info resp", (u8 *) resp,
565 (int)le16_to_cpu(resp->size));
566
567 nr_subband = (le16_to_cpu(domain->header.len) - COUNTRY_CODE_LEN) /
568 sizeof(struct ieee_subbandset);
569
570 lbs_deb_11d("domain info resp: nr_subband %d\n", nr_subband);
571
572 if (nr_subband > MRVDRV_MAX_SUBBAND_802_11D) {
573 lbs_deb_11d("Invalid Numrer of Subband returned!!\n");
574 return -1;
575 }
576
577 switch (action) {
578 case CMD_ACT_SET: /*Proc Set action */
579 break;
580
581 case CMD_ACT_GET:
582 break;
583 default:
584 lbs_deb_11d("Invalid action:%d\n", domaininfo->action);
585 ret = -1;
586 break;
587 }
588
589 lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
590 return ret;
591}
592
593/**
594 * @brief This function parses countryinfo from AP and download country info to FW
595 * @param priv pointer to struct lbs_private
596 * @return 0; -1
597 */
598int lbs_parse_dnld_countryinfo_11d(struct lbs_private *priv,
599 struct bss_descriptor * bss)
600{
601 int ret;
602
603 lbs_deb_enter(LBS_DEB_11D);
604 if (priv->enable11d) {
605 memset(&priv->parsed_region_chan, 0,
606 sizeof(struct parsed_region_chan_11d));
607 ret = parse_domain_info_11d(&bss->countryinfo, 0,
608 &priv->parsed_region_chan);
609
610 if (ret == -1) {
611 lbs_deb_11d("error parsing domain_info from AP\n");
612 goto done;
613 }
614
615 memset(&priv->domainreg, 0,
616 sizeof(struct lbs_802_11d_domain_reg));
617 generate_domain_info_11d(&priv->parsed_region_chan,
618 &priv->domainreg);
619
620 ret = set_domain_info_11d(priv);
621
622 if (ret) {
623 lbs_deb_11d("error setting domain info\n");
624 goto done;
625 }
626 }
627 ret = 0;
628
629done:
630 lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
631 return ret;
632}
633
634/**
635 * @brief This function generates 11D info from user specified regioncode and download to FW
636 * @param priv pointer to struct lbs_private
637 * @return 0; -1
638 */
639int lbs_create_dnld_countryinfo_11d(struct lbs_private *priv)
640{
641 int ret;
642 struct region_channel *region_chan;
643 u8 j;
644
645 lbs_deb_enter(LBS_DEB_11D);
646 lbs_deb_11d("curbssparams.band %d\n", priv->curbssparams.band);
647
648 if (priv->enable11d) {
649 /* update parsed_region_chan_11; dnld domaininf to FW */
650
651 for (j = 0; j < ARRAY_SIZE(priv->region_channel); j++) {
652 region_chan = &priv->region_channel[j];
653
654 lbs_deb_11d("%d region_chan->band %d\n", j,
655 region_chan->band);
656
657 if (!region_chan || !region_chan->valid
658 || !region_chan->CFP)
659 continue;
660 if (region_chan->band != priv->curbssparams.band)
661 continue;
662 break;
663 }
664
665 if (j >= ARRAY_SIZE(priv->region_channel)) {
666 lbs_deb_11d("region_chan not found, band %d\n",
667 priv->curbssparams.band);
668 ret = -1;
669 goto done;
670 }
671
672 memset(&priv->parsed_region_chan, 0,
673 sizeof(struct parsed_region_chan_11d));
674 lbs_generate_parsed_region_chan_11d(region_chan,
675 &priv->
676 parsed_region_chan);
677
678 memset(&priv->domainreg, 0,
679 sizeof(struct lbs_802_11d_domain_reg));
680 generate_domain_info_11d(&priv->parsed_region_chan,
681 &priv->domainreg);
682
683 ret = set_domain_info_11d(priv);
684
685 if (ret) {
686 lbs_deb_11d("error setting domain info\n");
687 goto done;
688 }
689
690 }
691 ret = 0;
692
693done:
694 lbs_deb_leave_args(LBS_DEB_11D, "ret %d", ret);
695 return ret;
696}
diff --git a/drivers/net/wireless/libertas/11d.h b/drivers/net/wireless/libertas/11d.h
deleted file mode 100644
index fb75d3e321a0..000000000000
--- a/drivers/net/wireless/libertas/11d.h
+++ /dev/null
@@ -1,105 +0,0 @@
1/**
2 * This header file contains data structures and
3 * function declarations of 802.11d
4 */
5#ifndef _LBS_11D_
6#define _LBS_11D_
7
8#include "types.h"
9#include "defs.h"
10
11#define UNIVERSAL_REGION_CODE 0xff
12
13/** (Beaconsize(256)-5(IEId,len,contrystr(3))/3(FirstChan,NoOfChan,MaxPwr)
14 */
15#define MRVDRV_MAX_SUBBAND_802_11D 83
16
17#define COUNTRY_CODE_LEN 3
18#define MAX_NO_OF_CHAN 40
19
20struct cmd_ds_command;
21
22/** Data structure for Country IE*/
23struct ieee_subbandset {
24 u8 firstchan;
25 u8 nrchan;
26 u8 maxtxpwr;
27} __attribute__ ((packed));
28
29struct ieee_ie_country_info_set {
30 struct ieee_ie_header header;
31
32 u8 countrycode[COUNTRY_CODE_LEN];
33 struct ieee_subbandset subband[1];
34};
35
36struct ieee_ie_country_info_full_set {
37 struct ieee_ie_header header;
38
39 u8 countrycode[COUNTRY_CODE_LEN];
40 struct ieee_subbandset subband[MRVDRV_MAX_SUBBAND_802_11D];
41} __attribute__ ((packed));
42
43struct mrvl_ie_domain_param_set {
44 struct mrvl_ie_header header;
45
46 u8 countrycode[COUNTRY_CODE_LEN];
47 struct ieee_subbandset subband[1];
48} __attribute__ ((packed));
49
50struct cmd_ds_802_11d_domain_info {
51 __le16 action;
52 struct mrvl_ie_domain_param_set domain;
53} __attribute__ ((packed));
54
55/** domain regulatory information */
56struct lbs_802_11d_domain_reg {
57 /** country Code*/
58 u8 countrycode[COUNTRY_CODE_LEN];
59 /** No. of subband*/
60 u8 nr_subband;
61 struct ieee_subbandset subband[MRVDRV_MAX_SUBBAND_802_11D];
62};
63
64struct chan_power_11d {
65 u8 chan;
66 u8 pwr;
67} __attribute__ ((packed));
68
69struct parsed_region_chan_11d {
70 u8 band;
71 u8 region;
72 s8 countrycode[COUNTRY_CODE_LEN];
73 struct chan_power_11d chanpwr[MAX_NO_OF_CHAN];
74 u8 nr_chan;
75} __attribute__ ((packed));
76
77struct region_code_mapping {
78 u8 region[COUNTRY_CODE_LEN];
79 u8 code;
80};
81
82struct lbs_private;
83
84u8 lbs_get_scan_type_11d(u8 chan,
85 struct parsed_region_chan_11d *parsed_region_chan);
86
87u32 lbs_chan_2_freq(u8 chan);
88
89void lbs_init_11d(struct lbs_private *priv);
90
91int lbs_set_universaltable(struct lbs_private *priv, u8 band);
92
93int lbs_cmd_802_11d_domain_info(struct lbs_private *priv,
94 struct cmd_ds_command *cmd, u16 cmdno,
95 u16 cmdOption);
96
97int lbs_ret_802_11d_domain_info(struct cmd_ds_command *resp);
98
99struct bss_descriptor;
100int lbs_parse_dnld_countryinfo_11d(struct lbs_private *priv,
101 struct bss_descriptor * bss);
102
103int lbs_create_dnld_countryinfo_11d(struct lbs_private *priv);
104
105#endif
diff --git a/drivers/net/wireless/libertas/Kconfig b/drivers/net/wireless/libertas/Kconfig
new file mode 100644
index 000000000000..0485c9957575
--- /dev/null
+++ b/drivers/net/wireless/libertas/Kconfig
@@ -0,0 +1,45 @@
1config LIBERTAS
2 tristate "Marvell 8xxx Libertas WLAN driver support"
3 depends on CFG80211
4 select WIRELESS_EXT
5 select WEXT_SPY
6 select LIB80211
7 select FW_LOADER
8 ---help---
9 A library for Marvell Libertas 8xxx devices.
10
11config LIBERTAS_USB
12 tristate "Marvell Libertas 8388 USB 802.11b/g cards"
13 depends on LIBERTAS && USB
14 ---help---
15 A driver for Marvell Libertas 8388 USB devices.
16
17config LIBERTAS_CS
18 tristate "Marvell Libertas 8385 CompactFlash 802.11b/g cards"
19 depends on LIBERTAS && PCMCIA
20 ---help---
21 A driver for Marvell Libertas 8385 CompactFlash devices.
22
23config LIBERTAS_SDIO
24 tristate "Marvell Libertas 8385/8686/8688 SDIO 802.11b/g cards"
25 depends on LIBERTAS && MMC
26 ---help---
27 A driver for Marvell Libertas 8385/8686/8688 SDIO devices.
28
29config LIBERTAS_SPI
30 tristate "Marvell Libertas 8686 SPI 802.11b/g cards"
31 depends on LIBERTAS && SPI
32 ---help---
33 A driver for Marvell Libertas 8686 SPI devices.
34
35config LIBERTAS_DEBUG
36 bool "Enable full debugging output in the Libertas module."
37 depends on LIBERTAS
38 ---help---
39 Debugging support.
40
41config LIBERTAS_MESH
42 bool "Enable mesh support"
43 depends on LIBERTAS
44 help
45 This enables Libertas' MESH support, used by e.g. the OLPC people.
diff --git a/drivers/net/wireless/libertas/Makefile b/drivers/net/wireless/libertas/Makefile
index 0b6918584503..45e870e33117 100644
--- a/drivers/net/wireless/libertas/Makefile
+++ b/drivers/net/wireless/libertas/Makefile
@@ -1,5 +1,15 @@
1libertas-objs := main.o wext.o rx.o tx.o cmd.o cmdresp.o scan.o 11d.o \ 1libertas-y += assoc.o
2 debugfs.o persistcfg.o ethtool.o assoc.o 2libertas-y += cfg.o
3libertas-y += cmd.o
4libertas-y += cmdresp.o
5libertas-y += debugfs.o
6libertas-y += ethtool.o
7libertas-y += main.o
8libertas-y += rx.o
9libertas-y += scan.o
10libertas-y += tx.o
11libertas-y += wext.o
12libertas-$(CONFIG_LIBERTAS_MESH) += mesh.o
3 13
4usb8xxx-objs += if_usb.o 14usb8xxx-objs += if_usb.o
5libertas_cs-objs += if_cs.o 15libertas_cs-objs += if_cs.o
diff --git a/drivers/net/wireless/libertas/README b/drivers/net/wireless/libertas/README
index ab6a2d518af0..2726c044430f 100644
--- a/drivers/net/wireless/libertas/README
+++ b/drivers/net/wireless/libertas/README
@@ -1,5 +1,5 @@
1================================================================================ 1================================================================================
2 README for USB8388 2 README for Libertas
3 3
4 (c) Copyright © 2003-2006, Marvell International Ltd. 4 (c) Copyright © 2003-2006, Marvell International Ltd.
5 All Rights Reserved 5 All Rights Reserved
@@ -226,4 +226,28 @@ setuserscan
226 All entries in the scan table (not just the new scan data when keep=1) 226 All entries in the scan table (not just the new scan data when keep=1)
227 will be displayed upon completion by use of the getscantable ioctl. 227 will be displayed upon completion by use of the getscantable ioctl.
228 228
229========================
230IWCONFIG COMMANDS
231========================
232power period
233
234 This command is used to configure the station in deep sleep mode /
235 auto deep sleep mode.
236
237 The timer is implemented to monitor the activities (command, event,
238 etc.). When an activity is detected station will exit from deep
239 sleep mode automatically and restart the timer. At timer expiry
240 (no activity for defined time period) the deep sleep mode is entered
241 automatically.
242
243 Note: this command is for SDIO interface only.
244
245 Usage:
246 To enable deep sleep mode do:
247 iwconfig wlan0 power period 0
248 To enable auto deep sleep mode with idle time period 5 seconds do:
249 iwconfig wlan0 power period 5
250 To disable deep sleep/auto deep sleep mode do:
251 iwconfig wlan0 power period -1
252
229============================================================================== 253==============================================================================
diff --git a/drivers/net/wireless/libertas/assoc.c b/drivers/net/wireless/libertas/assoc.c
index dd8732611ba9..12a2ef9dacea 100644
--- a/drivers/net/wireless/libertas/assoc.c
+++ b/drivers/net/wireless/libertas/assoc.c
@@ -4,6 +4,7 @@
4#include <linux/etherdevice.h> 4#include <linux/etherdevice.h>
5#include <linux/ieee80211.h> 5#include <linux/ieee80211.h>
6#include <linux/if_arp.h> 6#include <linux/if_arp.h>
7#include <linux/slab.h>
7#include <net/lib80211.h> 8#include <net/lib80211.h>
8 9
9#include "assoc.h" 10#include "assoc.h"
@@ -23,6 +24,13 @@ static const u8 bssid_off[ETH_ALEN] __attribute__ ((aligned (2))) =
23 */ 24 */
24#define CAPINFO_MASK (~(0xda00)) 25#define CAPINFO_MASK (~(0xda00))
25 26
27/**
28 * 802.11b/g supported bitrates (in 500Kb/s units)
29 */
30u8 lbs_bg_rates[MAX_RATES] =
31 { 0x02, 0x04, 0x0b, 0x16, 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c,
320x00, 0x00 };
33
26 34
27/** 35/**
28 * @brief This function finds common rates between rates and card rates. 36 * @brief This function finds common rates between rates and card rates.
@@ -147,6 +155,395 @@ static int lbs_set_authentication(struct lbs_private *priv, u8 bssid[6], u8 auth
147} 155}
148 156
149 157
158int lbs_cmd_802_11_set_wep(struct lbs_private *priv, uint16_t cmd_action,
159 struct assoc_request *assoc)
160{
161 struct cmd_ds_802_11_set_wep cmd;
162 int ret = 0;
163
164 lbs_deb_enter(LBS_DEB_CMD);
165
166 memset(&cmd, 0, sizeof(cmd));
167 cmd.hdr.command = cpu_to_le16(CMD_802_11_SET_WEP);
168 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
169
170 cmd.action = cpu_to_le16(cmd_action);
171
172 if (cmd_action == CMD_ACT_ADD) {
173 int i;
174
175 /* default tx key index */
176 cmd.keyindex = cpu_to_le16(assoc->wep_tx_keyidx &
177 CMD_WEP_KEY_INDEX_MASK);
178
179 /* Copy key types and material to host command structure */
180 for (i = 0; i < 4; i++) {
181 struct enc_key *pkey = &assoc->wep_keys[i];
182
183 switch (pkey->len) {
184 case KEY_LEN_WEP_40:
185 cmd.keytype[i] = CMD_TYPE_WEP_40_BIT;
186 memmove(cmd.keymaterial[i], pkey->key, pkey->len);
187 lbs_deb_cmd("SET_WEP: add key %d (40 bit)\n", i);
188 break;
189 case KEY_LEN_WEP_104:
190 cmd.keytype[i] = CMD_TYPE_WEP_104_BIT;
191 memmove(cmd.keymaterial[i], pkey->key, pkey->len);
192 lbs_deb_cmd("SET_WEP: add key %d (104 bit)\n", i);
193 break;
194 case 0:
195 break;
196 default:
197 lbs_deb_cmd("SET_WEP: invalid key %d, length %d\n",
198 i, pkey->len);
199 ret = -1;
200 goto done;
201 break;
202 }
203 }
204 } else if (cmd_action == CMD_ACT_REMOVE) {
205 /* ACT_REMOVE clears _all_ WEP keys */
206
207 /* default tx key index */
208 cmd.keyindex = cpu_to_le16(priv->wep_tx_keyidx &
209 CMD_WEP_KEY_INDEX_MASK);
210 lbs_deb_cmd("SET_WEP: remove key %d\n", priv->wep_tx_keyidx);
211 }
212
213 ret = lbs_cmd_with_response(priv, CMD_802_11_SET_WEP, &cmd);
214done:
215 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
216 return ret;
217}
218
219int lbs_cmd_802_11_enable_rsn(struct lbs_private *priv, uint16_t cmd_action,
220 uint16_t *enable)
221{
222 struct cmd_ds_802_11_enable_rsn cmd;
223 int ret;
224
225 lbs_deb_enter(LBS_DEB_CMD);
226
227 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
228 cmd.action = cpu_to_le16(cmd_action);
229
230 if (cmd_action == CMD_ACT_GET)
231 cmd.enable = 0;
232 else {
233 if (*enable)
234 cmd.enable = cpu_to_le16(CMD_ENABLE_RSN);
235 else
236 cmd.enable = cpu_to_le16(CMD_DISABLE_RSN);
237 lbs_deb_cmd("ENABLE_RSN: %d\n", *enable);
238 }
239
240 ret = lbs_cmd_with_response(priv, CMD_802_11_ENABLE_RSN, &cmd);
241 if (!ret && cmd_action == CMD_ACT_GET)
242 *enable = le16_to_cpu(cmd.enable);
243
244 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
245 return ret;
246}
247
248static void set_one_wpa_key(struct MrvlIEtype_keyParamSet *keyparam,
249 struct enc_key *key)
250{
251 lbs_deb_enter(LBS_DEB_CMD);
252
253 if (key->flags & KEY_INFO_WPA_ENABLED)
254 keyparam->keyinfo |= cpu_to_le16(KEY_INFO_WPA_ENABLED);
255 if (key->flags & KEY_INFO_WPA_UNICAST)
256 keyparam->keyinfo |= cpu_to_le16(KEY_INFO_WPA_UNICAST);
257 if (key->flags & KEY_INFO_WPA_MCAST)
258 keyparam->keyinfo |= cpu_to_le16(KEY_INFO_WPA_MCAST);
259
260 keyparam->type = cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
261 keyparam->keytypeid = cpu_to_le16(key->type);
262 keyparam->keylen = cpu_to_le16(key->len);
263 memcpy(keyparam->key, key->key, key->len);
264
265 /* Length field doesn't include the {type,length} header */
266 keyparam->length = cpu_to_le16(sizeof(*keyparam) - 4);
267 lbs_deb_leave(LBS_DEB_CMD);
268}
269
270int lbs_cmd_802_11_key_material(struct lbs_private *priv, uint16_t cmd_action,
271 struct assoc_request *assoc)
272{
273 struct cmd_ds_802_11_key_material cmd;
274 int ret = 0;
275 int index = 0;
276
277 lbs_deb_enter(LBS_DEB_CMD);
278
279 cmd.action = cpu_to_le16(cmd_action);
280 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
281
282 if (cmd_action == CMD_ACT_GET) {
283 cmd.hdr.size = cpu_to_le16(sizeof(struct cmd_header) + 2);
284 } else {
285 memset(cmd.keyParamSet, 0, sizeof(cmd.keyParamSet));
286
287 if (test_bit(ASSOC_FLAG_WPA_UCAST_KEY, &assoc->flags)) {
288 set_one_wpa_key(&cmd.keyParamSet[index],
289 &assoc->wpa_unicast_key);
290 index++;
291 }
292
293 if (test_bit(ASSOC_FLAG_WPA_MCAST_KEY, &assoc->flags)) {
294 set_one_wpa_key(&cmd.keyParamSet[index],
295 &assoc->wpa_mcast_key);
296 index++;
297 }
298
299 /* The common header and as many keys as we included */
300 cmd.hdr.size = cpu_to_le16(offsetof(typeof(cmd),
301 keyParamSet[index]));
302 }
303 ret = lbs_cmd_with_response(priv, CMD_802_11_KEY_MATERIAL, &cmd);
304 /* Copy the returned key to driver private data */
305 if (!ret && cmd_action == CMD_ACT_GET) {
306 void *buf_ptr = cmd.keyParamSet;
307 void *resp_end = &(&cmd)[1];
308
309 while (buf_ptr < resp_end) {
310 struct MrvlIEtype_keyParamSet *keyparam = buf_ptr;
311 struct enc_key *key;
312 uint16_t param_set_len = le16_to_cpu(keyparam->length);
313 uint16_t key_len = le16_to_cpu(keyparam->keylen);
314 uint16_t key_flags = le16_to_cpu(keyparam->keyinfo);
315 uint16_t key_type = le16_to_cpu(keyparam->keytypeid);
316 void *end;
317
318 end = (void *)keyparam + sizeof(keyparam->type)
319 + sizeof(keyparam->length) + param_set_len;
320
321 /* Make sure we don't access past the end of the IEs */
322 if (end > resp_end)
323 break;
324
325 if (key_flags & KEY_INFO_WPA_UNICAST)
326 key = &priv->wpa_unicast_key;
327 else if (key_flags & KEY_INFO_WPA_MCAST)
328 key = &priv->wpa_mcast_key;
329 else
330 break;
331
332 /* Copy returned key into driver */
333 memset(key, 0, sizeof(struct enc_key));
334 if (key_len > sizeof(key->key))
335 break;
336 key->type = key_type;
337 key->flags = key_flags;
338 key->len = key_len;
339 memcpy(key->key, keyparam->key, key->len);
340
341 buf_ptr = end + 1;
342 }
343 }
344
345 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
346 return ret;
347}
348
349static __le16 lbs_rate_to_fw_bitmap(int rate, int lower_rates_ok)
350{
351/* Bit Rate
352* 15:13 Reserved
353* 12 54 Mbps
354* 11 48 Mbps
355* 10 36 Mbps
356* 9 24 Mbps
357* 8 18 Mbps
358* 7 12 Mbps
359* 6 9 Mbps
360* 5 6 Mbps
361* 4 Reserved
362* 3 11 Mbps
363* 2 5.5 Mbps
364* 1 2 Mbps
365* 0 1 Mbps
366**/
367
368 uint16_t ratemask;
369 int i = lbs_data_rate_to_fw_index(rate);
370 if (lower_rates_ok)
371 ratemask = (0x1fef >> (12 - i));
372 else
373 ratemask = (1 << i);
374 return cpu_to_le16(ratemask);
375}
376
377int lbs_cmd_802_11_rate_adapt_rateset(struct lbs_private *priv,
378 uint16_t cmd_action)
379{
380 struct cmd_ds_802_11_rate_adapt_rateset cmd;
381 int ret;
382
383 lbs_deb_enter(LBS_DEB_CMD);
384
385 if (!priv->cur_rate && !priv->enablehwauto)
386 return -EINVAL;
387
388 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
389
390 cmd.action = cpu_to_le16(cmd_action);
391 cmd.enablehwauto = cpu_to_le16(priv->enablehwauto);
392 cmd.bitmap = lbs_rate_to_fw_bitmap(priv->cur_rate, priv->enablehwauto);
393 ret = lbs_cmd_with_response(priv, CMD_802_11_RATE_ADAPT_RATESET, &cmd);
394 if (!ret && cmd_action == CMD_ACT_GET)
395 priv->enablehwauto = le16_to_cpu(cmd.enablehwauto);
396
397 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
398 return ret;
399}
400
401/**
402 * @brief Set the data rate
403 *
404 * @param priv A pointer to struct lbs_private structure
405 * @param rate The desired data rate, or 0 to clear a locked rate
406 *
407 * @return 0 on success, error on failure
408 */
409int lbs_set_data_rate(struct lbs_private *priv, u8 rate)
410{
411 struct cmd_ds_802_11_data_rate cmd;
412 int ret = 0;
413
414 lbs_deb_enter(LBS_DEB_CMD);
415
416 memset(&cmd, 0, sizeof(cmd));
417 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
418
419 if (rate > 0) {
420 cmd.action = cpu_to_le16(CMD_ACT_SET_TX_FIX_RATE);
421 cmd.rates[0] = lbs_data_rate_to_fw_index(rate);
422 if (cmd.rates[0] == 0) {
423 lbs_deb_cmd("DATA_RATE: invalid requested rate of"
424 " 0x%02X\n", rate);
425 ret = 0;
426 goto out;
427 }
428 lbs_deb_cmd("DATA_RATE: set fixed 0x%02X\n", cmd.rates[0]);
429 } else {
430 cmd.action = cpu_to_le16(CMD_ACT_SET_TX_AUTO);
431 lbs_deb_cmd("DATA_RATE: setting auto\n");
432 }
433
434 ret = lbs_cmd_with_response(priv, CMD_802_11_DATA_RATE, &cmd);
435 if (ret)
436 goto out;
437
438 lbs_deb_hex(LBS_DEB_CMD, "DATA_RATE_RESP", (u8 *) &cmd, sizeof(cmd));
439
440 /* FIXME: get actual rates FW can do if this command actually returns
441 * all data rates supported.
442 */
443 priv->cur_rate = lbs_fw_index_to_data_rate(cmd.rates[0]);
444 lbs_deb_cmd("DATA_RATE: current rate is 0x%02x\n", priv->cur_rate);
445
446out:
447 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
448 return ret;
449}
450
451
452int lbs_cmd_802_11_rssi(struct lbs_private *priv,
453 struct cmd_ds_command *cmd)
454{
455
456 lbs_deb_enter(LBS_DEB_CMD);
457 cmd->command = cpu_to_le16(CMD_802_11_RSSI);
458 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_802_11_rssi) +
459 sizeof(struct cmd_header));
460 cmd->params.rssi.N = cpu_to_le16(DEFAULT_BCN_AVG_FACTOR);
461
462 /* reset Beacon SNR/NF/RSSI values */
463 priv->SNR[TYPE_BEACON][TYPE_NOAVG] = 0;
464 priv->SNR[TYPE_BEACON][TYPE_AVG] = 0;
465 priv->NF[TYPE_BEACON][TYPE_NOAVG] = 0;
466 priv->NF[TYPE_BEACON][TYPE_AVG] = 0;
467 priv->RSSI[TYPE_BEACON][TYPE_NOAVG] = 0;
468 priv->RSSI[TYPE_BEACON][TYPE_AVG] = 0;
469
470 lbs_deb_leave(LBS_DEB_CMD);
471 return 0;
472}
473
474int lbs_ret_802_11_rssi(struct lbs_private *priv,
475 struct cmd_ds_command *resp)
476{
477 struct cmd_ds_802_11_rssi_rsp *rssirsp = &resp->params.rssirsp;
478
479 lbs_deb_enter(LBS_DEB_CMD);
480
481 /* store the non average value */
482 priv->SNR[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->SNR);
483 priv->NF[TYPE_BEACON][TYPE_NOAVG] =
484 get_unaligned_le16(&rssirsp->noisefloor);
485
486 priv->SNR[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgSNR);
487 priv->NF[TYPE_BEACON][TYPE_AVG] =
488 get_unaligned_le16(&rssirsp->avgnoisefloor);
489
490 priv->RSSI[TYPE_BEACON][TYPE_NOAVG] =
491 CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_NOAVG],
492 priv->NF[TYPE_BEACON][TYPE_NOAVG]);
493
494 priv->RSSI[TYPE_BEACON][TYPE_AVG] =
495 CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_AVG] / AVG_SCALE,
496 priv->NF[TYPE_BEACON][TYPE_AVG] / AVG_SCALE);
497
498 lbs_deb_cmd("RSSI: beacon %d, avg %d\n",
499 priv->RSSI[TYPE_BEACON][TYPE_NOAVG],
500 priv->RSSI[TYPE_BEACON][TYPE_AVG]);
501
502 lbs_deb_leave(LBS_DEB_CMD);
503 return 0;
504}
505
506
507int lbs_cmd_bcn_ctrl(struct lbs_private *priv,
508 struct cmd_ds_command *cmd,
509 u16 cmd_action)
510{
511 struct cmd_ds_802_11_beacon_control
512 *bcn_ctrl = &cmd->params.bcn_ctrl;
513
514 lbs_deb_enter(LBS_DEB_CMD);
515 cmd->size =
516 cpu_to_le16(sizeof(struct cmd_ds_802_11_beacon_control)
517 + sizeof(struct cmd_header));
518 cmd->command = cpu_to_le16(CMD_802_11_BEACON_CTRL);
519
520 bcn_ctrl->action = cpu_to_le16(cmd_action);
521 bcn_ctrl->beacon_enable = cpu_to_le16(priv->beacon_enable);
522 bcn_ctrl->beacon_period = cpu_to_le16(priv->beacon_period);
523
524 lbs_deb_leave(LBS_DEB_CMD);
525 return 0;
526}
527
528int lbs_ret_802_11_bcn_ctrl(struct lbs_private *priv,
529 struct cmd_ds_command *resp)
530{
531 struct cmd_ds_802_11_beacon_control *bcn_ctrl =
532 &resp->params.bcn_ctrl;
533
534 lbs_deb_enter(LBS_DEB_CMD);
535
536 if (bcn_ctrl->action == CMD_ACT_GET) {
537 priv->beacon_enable = (u8) le16_to_cpu(bcn_ctrl->beacon_enable);
538 priv->beacon_period = le16_to_cpu(bcn_ctrl->beacon_period);
539 }
540
541 lbs_deb_enter(LBS_DEB_CMD);
542 return 0;
543}
544
545
546
150static int lbs_assoc_post(struct lbs_private *priv, 547static int lbs_assoc_post(struct lbs_private *priv,
151 struct cmd_ds_802_11_associate_response *resp) 548 struct cmd_ds_802_11_associate_response *resp)
152{ 549{
@@ -226,7 +623,7 @@ static int lbs_assoc_post(struct lbs_private *priv,
226 priv->connect_status = LBS_CONNECTED; 623 priv->connect_status = LBS_CONNECTED;
227 624
228 /* Update current SSID and BSSID */ 625 /* Update current SSID and BSSID */
229 memcpy(&priv->curbssparams.ssid, &bss->ssid, IW_ESSID_MAX_SIZE); 626 memcpy(&priv->curbssparams.ssid, &bss->ssid, IEEE80211_MAX_SSID_LEN);
230 priv->curbssparams.ssid_len = bss->ssid_len; 627 priv->curbssparams.ssid_len = bss->ssid_len;
231 memcpy(priv->curbssparams.bssid, bss->bssid, ETH_ALEN); 628 memcpy(priv->curbssparams.bssid, bss->bssid, ETH_ALEN);
232 629
@@ -369,12 +766,7 @@ static int lbs_associate(struct lbs_private *priv,
369 (u16)(pos - (u8 *) &cmd.iebuf)); 766 (u16)(pos - (u8 *) &cmd.iebuf));
370 767
371 /* update curbssparams */ 768 /* update curbssparams */
372 priv->curbssparams.channel = bss->phy.ds.channel; 769 priv->channel = bss->phy.ds.channel;
373
374 if (lbs_parse_dnld_countryinfo_11d(priv, bss)) {
375 ret = -1;
376 goto done;
377 }
378 770
379 ret = lbs_cmd_with_response(priv, command, &cmd); 771 ret = lbs_cmd_with_response(priv, command, &cmd);
380 if (ret == 0) { 772 if (ret == 0) {
@@ -414,8 +806,7 @@ static int lbs_try_associate(struct lbs_private *priv,
414 } 806 }
415 807
416 /* Use short preamble only when both the BSS and firmware support it */ 808 /* Use short preamble only when both the BSS and firmware support it */
417 if ((priv->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && 809 if (assoc_req->bss.capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
418 (assoc_req->bss.capability & WLAN_CAPABILITY_SHORT_PREAMBLE))
419 preamble = RADIO_PREAMBLE_SHORT; 810 preamble = RADIO_PREAMBLE_SHORT;
420 811
421 ret = lbs_set_radio(priv, preamble, 1); 812 ret = lbs_set_radio(priv, preamble, 1);
@@ -472,7 +863,7 @@ static int lbs_adhoc_post(struct lbs_private *priv,
472 memcpy(&priv->curbssparams.bssid, bss->bssid, ETH_ALEN); 863 memcpy(&priv->curbssparams.bssid, bss->bssid, ETH_ALEN);
473 864
474 /* Set the new SSID to current SSID */ 865 /* Set the new SSID to current SSID */
475 memcpy(&priv->curbssparams.ssid, &bss->ssid, IW_ESSID_MAX_SIZE); 866 memcpy(&priv->curbssparams.ssid, &bss->ssid, IEEE80211_MAX_SSID_LEN);
476 priv->curbssparams.ssid_len = bss->ssid_len; 867 priv->curbssparams.ssid_len = bss->ssid_len;
477 868
478 netif_carrier_on(priv->dev); 869 netif_carrier_on(priv->dev);
@@ -487,7 +878,7 @@ static int lbs_adhoc_post(struct lbs_private *priv,
487 lbs_deb_join("ADHOC_RESP: Joined/started '%s', BSSID %pM, channel %d\n", 878 lbs_deb_join("ADHOC_RESP: Joined/started '%s', BSSID %pM, channel %d\n",
488 print_ssid(ssid, bss->ssid, bss->ssid_len), 879 print_ssid(ssid, bss->ssid, bss->ssid_len),
489 priv->curbssparams.bssid, 880 priv->curbssparams.bssid,
490 priv->curbssparams.channel); 881 priv->channel);
491 882
492done: 883done:
493 lbs_deb_leave_args(LBS_DEB_JOIN, "ret %d", ret); 884 lbs_deb_leave_args(LBS_DEB_JOIN, "ret %d", ret);
@@ -546,8 +937,7 @@ static int lbs_adhoc_join(struct lbs_private *priv,
546 } 937 }
547 938
548 /* Use short preamble only when both the BSS and firmware support it */ 939 /* Use short preamble only when both the BSS and firmware support it */
549 if ((priv->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) && 940 if (bss->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) {
550 (bss->capability & WLAN_CAPABILITY_SHORT_PREAMBLE)) {
551 lbs_deb_join("AdhocJoin: Short preamble\n"); 941 lbs_deb_join("AdhocJoin: Short preamble\n");
552 preamble = RADIO_PREAMBLE_SHORT; 942 preamble = RADIO_PREAMBLE_SHORT;
553 } 943 }
@@ -560,7 +950,7 @@ static int lbs_adhoc_join(struct lbs_private *priv,
560 lbs_deb_join("AdhocJoin: band = %c\n", assoc_req->band); 950 lbs_deb_join("AdhocJoin: band = %c\n", assoc_req->band);
561 951
562 priv->adhoccreate = 0; 952 priv->adhoccreate = 0;
563 priv->curbssparams.channel = bss->channel; 953 priv->channel = bss->channel;
564 954
565 /* Build the join command */ 955 /* Build the join command */
566 memset(&cmd, 0, sizeof(cmd)); 956 memset(&cmd, 0, sizeof(cmd));
@@ -633,11 +1023,6 @@ static int lbs_adhoc_join(struct lbs_private *priv,
633 } 1023 }
634 } 1024 }
635 1025
636 if (lbs_parse_dnld_countryinfo_11d(priv, bss)) {
637 ret = -1;
638 goto out;
639 }
640
641 ret = lbs_cmd_with_response(priv, CMD_802_11_AD_HOC_JOIN, &cmd); 1026 ret = lbs_cmd_with_response(priv, CMD_802_11_AD_HOC_JOIN, &cmd);
642 if (ret == 0) { 1027 if (ret == 0) {
643 ret = lbs_adhoc_post(priv, 1028 ret = lbs_adhoc_post(priv,
@@ -661,7 +1046,7 @@ static int lbs_adhoc_start(struct lbs_private *priv,
661 struct assoc_request *assoc_req) 1046 struct assoc_request *assoc_req)
662{ 1047{
663 struct cmd_ds_802_11_ad_hoc_start cmd; 1048 struct cmd_ds_802_11_ad_hoc_start cmd;
664 u8 preamble = RADIO_PREAMBLE_LONG; 1049 u8 preamble = RADIO_PREAMBLE_SHORT;
665 size_t ratesize = 0; 1050 size_t ratesize = 0;
666 u16 tmpcap = 0; 1051 u16 tmpcap = 0;
667 int ret = 0; 1052 int ret = 0;
@@ -669,11 +1054,6 @@ static int lbs_adhoc_start(struct lbs_private *priv,
669 1054
670 lbs_deb_enter(LBS_DEB_ASSOC); 1055 lbs_deb_enter(LBS_DEB_ASSOC);
671 1056
672 if (priv->capability & WLAN_CAPABILITY_SHORT_PREAMBLE) {
673 lbs_deb_join("ADHOC_START: Will use short preamble\n");
674 preamble = RADIO_PREAMBLE_SHORT;
675 }
676
677 ret = lbs_set_radio(priv, preamble, 1); 1057 ret = lbs_set_radio(priv, preamble, 1);
678 if (ret) 1058 if (ret)
679 goto out; 1059 goto out;
@@ -737,12 +1117,6 @@ static int lbs_adhoc_start(struct lbs_private *priv,
737 lbs_deb_join("ADHOC_START: rates=%02x %02x %02x %02x\n", 1117 lbs_deb_join("ADHOC_START: rates=%02x %02x %02x %02x\n",
738 cmd.rates[0], cmd.rates[1], cmd.rates[2], cmd.rates[3]); 1118 cmd.rates[0], cmd.rates[1], cmd.rates[2], cmd.rates[3]);
739 1119
740 if (lbs_create_dnld_countryinfo_11d(priv)) {
741 lbs_deb_join("ADHOC_START: dnld_countryinfo_11d failed\n");
742 ret = -1;
743 goto out;
744 }
745
746 lbs_deb_join("ADHOC_START: Starting Ad-Hoc BSS on channel %d, band %d\n", 1120 lbs_deb_join("ADHOC_START: Starting Ad-Hoc BSS on channel %d, band %d\n",
747 assoc_req->channel, assoc_req->band); 1121 assoc_req->channel, assoc_req->band);
748 1122
@@ -787,11 +1161,11 @@ int lbs_adhoc_stop(struct lbs_private *priv)
787static inline int match_bss_no_security(struct lbs_802_11_security *secinfo, 1161static inline int match_bss_no_security(struct lbs_802_11_security *secinfo,
788 struct bss_descriptor *match_bss) 1162 struct bss_descriptor *match_bss)
789{ 1163{
790 if (!secinfo->wep_enabled && !secinfo->WPAenabled 1164 if (!secinfo->wep_enabled &&
791 && !secinfo->WPA2enabled 1165 !secinfo->WPAenabled && !secinfo->WPA2enabled &&
792 && match_bss->wpa_ie[0] != WLAN_EID_GENERIC 1166 match_bss->wpa_ie[0] != WLAN_EID_GENERIC &&
793 && match_bss->rsn_ie[0] != WLAN_EID_RSN 1167 match_bss->rsn_ie[0] != WLAN_EID_RSN &&
794 && !(match_bss->capability & WLAN_CAPABILITY_PRIVACY)) 1168 !(match_bss->capability & WLAN_CAPABILITY_PRIVACY))
795 return 1; 1169 return 1;
796 else 1170 else
797 return 0; 1171 return 0;
@@ -800,9 +1174,9 @@ static inline int match_bss_no_security(struct lbs_802_11_security *secinfo,
800static inline int match_bss_static_wep(struct lbs_802_11_security *secinfo, 1174static inline int match_bss_static_wep(struct lbs_802_11_security *secinfo,
801 struct bss_descriptor *match_bss) 1175 struct bss_descriptor *match_bss)
802{ 1176{
803 if (secinfo->wep_enabled && !secinfo->WPAenabled 1177 if (secinfo->wep_enabled &&
804 && !secinfo->WPA2enabled 1178 !secinfo->WPAenabled && !secinfo->WPA2enabled &&
805 && (match_bss->capability & WLAN_CAPABILITY_PRIVACY)) 1179 (match_bss->capability & WLAN_CAPABILITY_PRIVACY))
806 return 1; 1180 return 1;
807 else 1181 else
808 return 0; 1182 return 0;
@@ -811,8 +1185,8 @@ static inline int match_bss_static_wep(struct lbs_802_11_security *secinfo,
811static inline int match_bss_wpa(struct lbs_802_11_security *secinfo, 1185static inline int match_bss_wpa(struct lbs_802_11_security *secinfo,
812 struct bss_descriptor *match_bss) 1186 struct bss_descriptor *match_bss)
813{ 1187{
814 if (!secinfo->wep_enabled && secinfo->WPAenabled 1188 if (!secinfo->wep_enabled && secinfo->WPAenabled &&
815 && (match_bss->wpa_ie[0] == WLAN_EID_GENERIC) 1189 (match_bss->wpa_ie[0] == WLAN_EID_GENERIC)
816 /* privacy bit may NOT be set in some APs like LinkSys WRT54G 1190 /* privacy bit may NOT be set in some APs like LinkSys WRT54G
817 && (match_bss->capability & WLAN_CAPABILITY_PRIVACY) */ 1191 && (match_bss->capability & WLAN_CAPABILITY_PRIVACY) */
818 ) 1192 )
@@ -837,11 +1211,11 @@ static inline int match_bss_wpa2(struct lbs_802_11_security *secinfo,
837static inline int match_bss_dynamic_wep(struct lbs_802_11_security *secinfo, 1211static inline int match_bss_dynamic_wep(struct lbs_802_11_security *secinfo,
838 struct bss_descriptor *match_bss) 1212 struct bss_descriptor *match_bss)
839{ 1213{
840 if (!secinfo->wep_enabled && !secinfo->WPAenabled 1214 if (!secinfo->wep_enabled &&
841 && !secinfo->WPA2enabled 1215 !secinfo->WPAenabled && !secinfo->WPA2enabled &&
842 && (match_bss->wpa_ie[0] != WLAN_EID_GENERIC) 1216 (match_bss->wpa_ie[0] != WLAN_EID_GENERIC) &&
843 && (match_bss->rsn_ie[0] != WLAN_EID_RSN) 1217 (match_bss->rsn_ie[0] != WLAN_EID_RSN) &&
844 && (match_bss->capability & WLAN_CAPABILITY_PRIVACY)) 1218 (match_bss->capability & WLAN_CAPABILITY_PRIVACY))
845 return 1; 1219 return 1;
846 else 1220 else
847 return 0; 1221 return 0;
@@ -1099,7 +1473,7 @@ static int assoc_helper_essid(struct lbs_private *priv,
1099 /* else send START command */ 1473 /* else send START command */
1100 lbs_deb_assoc("SSID not found, creating adhoc network\n"); 1474 lbs_deb_assoc("SSID not found, creating adhoc network\n");
1101 memcpy(&assoc_req->bss.ssid, &assoc_req->ssid, 1475 memcpy(&assoc_req->bss.ssid, &assoc_req->ssid,
1102 IW_ESSID_MAX_SIZE); 1476 IEEE80211_MAX_SSID_LEN);
1103 assoc_req->bss.ssid_len = assoc_req->ssid_len; 1477 assoc_req->bss.ssid_len = assoc_req->ssid_len;
1104 lbs_adhoc_start(priv, assoc_req); 1478 lbs_adhoc_start(priv, assoc_req);
1105 } 1479 }
@@ -1152,8 +1526,8 @@ static int assoc_helper_associate(struct lbs_private *priv,
1152 /* If we're given and 'any' BSSID, try associating based on SSID */ 1526 /* If we're given and 'any' BSSID, try associating based on SSID */
1153 1527
1154 if (test_bit(ASSOC_FLAG_BSSID, &assoc_req->flags)) { 1528 if (test_bit(ASSOC_FLAG_BSSID, &assoc_req->flags)) {
1155 if (compare_ether_addr(bssid_any, assoc_req->bssid) 1529 if (compare_ether_addr(bssid_any, assoc_req->bssid) &&
1156 && compare_ether_addr(bssid_off, assoc_req->bssid)) { 1530 compare_ether_addr(bssid_off, assoc_req->bssid)) {
1157 ret = assoc_helper_bssid(priv, assoc_req); 1531 ret = assoc_helper_bssid(priv, assoc_req);
1158 done = 1; 1532 done = 1;
1159 } 1533 }
@@ -1185,7 +1559,8 @@ static int assoc_helper_mode(struct lbs_private *priv,
1185 } 1559 }
1186 1560
1187 priv->mode = assoc_req->mode; 1561 priv->mode = assoc_req->mode;
1188 ret = lbs_set_snmp_mib(priv, SNMP_MIB_OID_BSS_TYPE, assoc_req->mode); 1562 ret = lbs_set_snmp_mib(priv, SNMP_MIB_OID_BSS_TYPE,
1563 assoc_req->mode == IW_MODE_ADHOC ? 2 : 1);
1189 1564
1190done: 1565done:
1191 lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret); 1566 lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret);
@@ -1205,7 +1580,7 @@ static int assoc_helper_channel(struct lbs_private *priv,
1205 goto done; 1580 goto done;
1206 } 1581 }
1207 1582
1208 if (assoc_req->channel == priv->curbssparams.channel) 1583 if (assoc_req->channel == priv->channel)
1209 goto done; 1584 goto done;
1210 1585
1211 if (priv->mesh_dev) { 1586 if (priv->mesh_dev) {
@@ -1217,7 +1592,7 @@ static int assoc_helper_channel(struct lbs_private *priv,
1217 } 1592 }
1218 1593
1219 lbs_deb_assoc("ASSOC: channel: %d -> %d\n", 1594 lbs_deb_assoc("ASSOC: channel: %d -> %d\n",
1220 priv->curbssparams.channel, assoc_req->channel); 1595 priv->channel, assoc_req->channel);
1221 1596
1222 ret = lbs_set_channel(priv, assoc_req->channel); 1597 ret = lbs_set_channel(priv, assoc_req->channel);
1223 if (ret < 0) 1598 if (ret < 0)
@@ -1232,17 +1607,15 @@ static int assoc_helper_channel(struct lbs_private *priv,
1232 goto done; 1607 goto done;
1233 } 1608 }
1234 1609
1235 if (assoc_req->channel != priv->curbssparams.channel) { 1610 if (assoc_req->channel != priv->channel) {
1236 lbs_deb_assoc("ASSOC: channel: failed to update channel to %d\n", 1611 lbs_deb_assoc("ASSOC: channel: failed to update channel to %d\n",
1237 assoc_req->channel); 1612 assoc_req->channel);
1238 goto restore_mesh; 1613 goto restore_mesh;
1239 } 1614 }
1240 1615
1241 if ( assoc_req->secinfo.wep_enabled 1616 if (assoc_req->secinfo.wep_enabled &&
1242 && (assoc_req->wep_keys[0].len 1617 (assoc_req->wep_keys[0].len || assoc_req->wep_keys[1].len ||
1243 || assoc_req->wep_keys[1].len 1618 assoc_req->wep_keys[2].len || assoc_req->wep_keys[3].len)) {
1244 || assoc_req->wep_keys[2].len
1245 || assoc_req->wep_keys[3].len)) {
1246 /* Make sure WEP keys are re-sent to firmware */ 1619 /* Make sure WEP keys are re-sent to firmware */
1247 set_bit(ASSOC_FLAG_WEP_KEYS, &assoc_req->flags); 1620 set_bit(ASSOC_FLAG_WEP_KEYS, &assoc_req->flags);
1248 } 1621 }
@@ -1253,7 +1626,7 @@ static int assoc_helper_channel(struct lbs_private *priv,
1253 restore_mesh: 1626 restore_mesh:
1254 if (priv->mesh_dev) 1627 if (priv->mesh_dev)
1255 lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START, 1628 lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1256 priv->curbssparams.channel); 1629 priv->channel);
1257 1630
1258 done: 1631 done:
1259 lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret); 1632 lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret);
@@ -1475,7 +1848,7 @@ static int should_stop_adhoc(struct lbs_private *priv,
1475 } 1848 }
1476 1849
1477 if (test_bit(ASSOC_FLAG_CHANNEL, &assoc_req->flags)) { 1850 if (test_bit(ASSOC_FLAG_CHANNEL, &assoc_req->flags)) {
1478 if (assoc_req->channel != priv->curbssparams.channel) 1851 if (assoc_req->channel != priv->channel)
1479 return 1; 1852 return 1;
1480 } 1853 }
1481 1854
@@ -1557,7 +1930,7 @@ static int lbs_find_best_network_ssid(struct lbs_private *priv,
1557 1930
1558 found = lbs_find_best_ssid_in_list(priv, preferred_mode); 1931 found = lbs_find_best_ssid_in_list(priv, preferred_mode);
1559 if (found && (found->ssid_len > 0)) { 1932 if (found && (found->ssid_len > 0)) {
1560 memcpy(out_ssid, &found->ssid, IW_ESSID_MAX_SIZE); 1933 memcpy(out_ssid, &found->ssid, IEEE80211_MAX_SSID_LEN);
1561 *out_ssid_len = found->ssid_len; 1934 *out_ssid_len = found->ssid_len;
1562 *out_mode = found->mode; 1935 *out_mode = found->mode;
1563 ret = 0; 1936 ret = 0;
@@ -1609,14 +1982,14 @@ void lbs_association_worker(struct work_struct *work)
1609 assoc_req->secinfo.auth_mode); 1982 assoc_req->secinfo.auth_mode);
1610 1983
1611 /* If 'any' SSID was specified, find an SSID to associate with */ 1984 /* If 'any' SSID was specified, find an SSID to associate with */
1612 if (test_bit(ASSOC_FLAG_SSID, &assoc_req->flags) 1985 if (test_bit(ASSOC_FLAG_SSID, &assoc_req->flags) &&
1613 && !assoc_req->ssid_len) 1986 !assoc_req->ssid_len)
1614 find_any_ssid = 1; 1987 find_any_ssid = 1;
1615 1988
1616 /* But don't use 'any' SSID if there's a valid locked BSSID to use */ 1989 /* But don't use 'any' SSID if there's a valid locked BSSID to use */
1617 if (test_bit(ASSOC_FLAG_BSSID, &assoc_req->flags)) { 1990 if (test_bit(ASSOC_FLAG_BSSID, &assoc_req->flags)) {
1618 if (compare_ether_addr(assoc_req->bssid, bssid_any) 1991 if (compare_ether_addr(assoc_req->bssid, bssid_any) &&
1619 && compare_ether_addr(assoc_req->bssid, bssid_off)) 1992 compare_ether_addr(assoc_req->bssid, bssid_off))
1620 find_any_ssid = 0; 1993 find_any_ssid = 0;
1621 } 1994 }
1622 1995
@@ -1678,13 +2051,6 @@ void lbs_association_worker(struct work_struct *work)
1678 goto out; 2051 goto out;
1679 } 2052 }
1680 2053
1681 if ( test_bit(ASSOC_FLAG_WEP_KEYS, &assoc_req->flags)
1682 || test_bit(ASSOC_FLAG_WEP_TX_KEYIDX, &assoc_req->flags)) {
1683 ret = assoc_helper_wep_keys(priv, assoc_req);
1684 if (ret)
1685 goto out;
1686 }
1687
1688 if (test_bit(ASSOC_FLAG_SECINFO, &assoc_req->flags)) { 2054 if (test_bit(ASSOC_FLAG_SECINFO, &assoc_req->flags)) {
1689 ret = assoc_helper_secinfo(priv, assoc_req); 2055 ret = assoc_helper_secinfo(priv, assoc_req);
1690 if (ret) 2056 if (ret)
@@ -1697,18 +2063,31 @@ void lbs_association_worker(struct work_struct *work)
1697 goto out; 2063 goto out;
1698 } 2064 }
1699 2065
1700 if (test_bit(ASSOC_FLAG_WPA_MCAST_KEY, &assoc_req->flags) 2066 /*
1701 || test_bit(ASSOC_FLAG_WPA_UCAST_KEY, &assoc_req->flags)) { 2067 * v10 FW wants WPA keys to be set/cleared before WEP key operations,
2068 * otherwise it will fail to correctly associate to WEP networks.
2069 * Other firmware versions don't appear to care.
2070 */
2071 if (test_bit(ASSOC_FLAG_WPA_MCAST_KEY, &assoc_req->flags) ||
2072 test_bit(ASSOC_FLAG_WPA_UCAST_KEY, &assoc_req->flags)) {
1702 ret = assoc_helper_wpa_keys(priv, assoc_req); 2073 ret = assoc_helper_wpa_keys(priv, assoc_req);
1703 if (ret) 2074 if (ret)
1704 goto out; 2075 goto out;
1705 } 2076 }
1706 2077
2078 if (test_bit(ASSOC_FLAG_WEP_KEYS, &assoc_req->flags) ||
2079 test_bit(ASSOC_FLAG_WEP_TX_KEYIDX, &assoc_req->flags)) {
2080 ret = assoc_helper_wep_keys(priv, assoc_req);
2081 if (ret)
2082 goto out;
2083 }
2084
2085
1707 /* SSID/BSSID should be the _last_ config option set, because they 2086 /* SSID/BSSID should be the _last_ config option set, because they
1708 * trigger the association attempt. 2087 * trigger the association attempt.
1709 */ 2088 */
1710 if (test_bit(ASSOC_FLAG_BSSID, &assoc_req->flags) 2089 if (test_bit(ASSOC_FLAG_BSSID, &assoc_req->flags) ||
1711 || test_bit(ASSOC_FLAG_SSID, &assoc_req->flags)) { 2090 test_bit(ASSOC_FLAG_SSID, &assoc_req->flags)) {
1712 int success = 1; 2091 int success = 1;
1713 2092
1714 ret = assoc_helper_associate(priv, assoc_req); 2093 ret = assoc_helper_associate(priv, assoc_req);
@@ -1775,12 +2154,12 @@ struct assoc_request *lbs_get_association_request(struct lbs_private *priv)
1775 assoc_req = priv->pending_assoc_req; 2154 assoc_req = priv->pending_assoc_req;
1776 if (!test_bit(ASSOC_FLAG_SSID, &assoc_req->flags)) { 2155 if (!test_bit(ASSOC_FLAG_SSID, &assoc_req->flags)) {
1777 memcpy(&assoc_req->ssid, &priv->curbssparams.ssid, 2156 memcpy(&assoc_req->ssid, &priv->curbssparams.ssid,
1778 IW_ESSID_MAX_SIZE); 2157 IEEE80211_MAX_SSID_LEN);
1779 assoc_req->ssid_len = priv->curbssparams.ssid_len; 2158 assoc_req->ssid_len = priv->curbssparams.ssid_len;
1780 } 2159 }
1781 2160
1782 if (!test_bit(ASSOC_FLAG_CHANNEL, &assoc_req->flags)) 2161 if (!test_bit(ASSOC_FLAG_CHANNEL, &assoc_req->flags))
1783 assoc_req->channel = priv->curbssparams.channel; 2162 assoc_req->channel = priv->channel;
1784 2163
1785 if (!test_bit(ASSOC_FLAG_BAND, &assoc_req->flags)) 2164 if (!test_bit(ASSOC_FLAG_BAND, &assoc_req->flags))
1786 assoc_req->band = priv->curbssparams.band; 2165 assoc_req->band = priv->curbssparams.band;
diff --git a/drivers/net/wireless/libertas/assoc.h b/drivers/net/wireless/libertas/assoc.h
index 6e765e9f91a3..40621b789fc5 100644
--- a/drivers/net/wireless/libertas/assoc.h
+++ b/drivers/net/wireless/libertas/assoc.h
@@ -3,7 +3,126 @@
3#ifndef _LBS_ASSOC_H_ 3#ifndef _LBS_ASSOC_H_
4#define _LBS_ASSOC_H_ 4#define _LBS_ASSOC_H_
5 5
6#include "dev.h" 6
7#include "defs.h"
8#include "host.h"
9
10
11struct lbs_private;
12
13/*
14 * In theory, the IE is limited to the IE length, 255,
15 * but in practice 64 bytes are enough.
16 */
17#define MAX_WPA_IE_LEN 64
18
19
20
21struct lbs_802_11_security {
22 u8 WPAenabled;
23 u8 WPA2enabled;
24 u8 wep_enabled;
25 u8 auth_mode;
26 u32 key_mgmt;
27};
28
29/** Current Basic Service Set State Structure */
30struct current_bss_params {
31 /** bssid */
32 u8 bssid[ETH_ALEN];
33 /** ssid */
34 u8 ssid[IEEE80211_MAX_SSID_LEN + 1];
35 u8 ssid_len;
36
37 /** band */
38 u8 band;
39 /** channel is directly in priv->channel */
40 /** zero-terminated array of supported data rates */
41 u8 rates[MAX_RATES + 1];
42};
43
44/**
45 * @brief Structure used to store information for each beacon/probe response
46 */
47struct bss_descriptor {
48 u8 bssid[ETH_ALEN];
49
50 u8 ssid[IEEE80211_MAX_SSID_LEN + 1];
51 u8 ssid_len;
52
53 u16 capability;
54 u32 rssi;
55 u32 channel;
56 u16 beaconperiod;
57 __le16 atimwindow;
58
59 /* IW_MODE_AUTO, IW_MODE_ADHOC, IW_MODE_INFRA */
60 u8 mode;
61
62 /* zero-terminated array of supported data rates */
63 u8 rates[MAX_RATES + 1];
64
65 unsigned long last_scanned;
66
67 union ieee_phy_param_set phy;
68 union ieee_ss_param_set ss;
69
70 u8 wpa_ie[MAX_WPA_IE_LEN];
71 size_t wpa_ie_len;
72 u8 rsn_ie[MAX_WPA_IE_LEN];
73 size_t rsn_ie_len;
74
75 u8 mesh;
76
77 struct list_head list;
78};
79
80/** Association request
81 *
82 * Encapsulates all the options that describe a specific assocation request
83 * or configuration of the wireless card's radio, mode, and security settings.
84 */
85struct assoc_request {
86#define ASSOC_FLAG_SSID 1
87#define ASSOC_FLAG_CHANNEL 2
88#define ASSOC_FLAG_BAND 3
89#define ASSOC_FLAG_MODE 4
90#define ASSOC_FLAG_BSSID 5
91#define ASSOC_FLAG_WEP_KEYS 6
92#define ASSOC_FLAG_WEP_TX_KEYIDX 7
93#define ASSOC_FLAG_WPA_MCAST_KEY 8
94#define ASSOC_FLAG_WPA_UCAST_KEY 9
95#define ASSOC_FLAG_SECINFO 10
96#define ASSOC_FLAG_WPA_IE 11
97 unsigned long flags;
98
99 u8 ssid[IEEE80211_MAX_SSID_LEN + 1];
100 u8 ssid_len;
101 u8 channel;
102 u8 band;
103 u8 mode;
104 u8 bssid[ETH_ALEN] __attribute__ ((aligned (2)));
105
106 /** WEP keys */
107 struct enc_key wep_keys[4];
108 u16 wep_tx_keyidx;
109
110 /** WPA keys */
111 struct enc_key wpa_mcast_key;
112 struct enc_key wpa_unicast_key;
113
114 struct lbs_802_11_security secinfo;
115
116 /** WPA Information Elements*/
117 u8 wpa_ie[MAX_WPA_IE_LEN];
118 u8 wpa_ie_len;
119
120 /* BSS to associate with for infrastructure of Ad-Hoc join */
121 struct bss_descriptor bss;
122};
123
124
125extern u8 lbs_bg_rates[MAX_RATES];
7 126
8void lbs_association_worker(struct work_struct *work); 127void lbs_association_worker(struct work_struct *work);
9struct assoc_request *lbs_get_association_request(struct lbs_private *priv); 128struct assoc_request *lbs_get_association_request(struct lbs_private *priv);
@@ -13,4 +132,24 @@ int lbs_adhoc_stop(struct lbs_private *priv);
13int lbs_cmd_80211_deauthenticate(struct lbs_private *priv, 132int lbs_cmd_80211_deauthenticate(struct lbs_private *priv,
14 u8 bssid[ETH_ALEN], u16 reason); 133 u8 bssid[ETH_ALEN], u16 reason);
15 134
135int lbs_cmd_802_11_rssi(struct lbs_private *priv,
136 struct cmd_ds_command *cmd);
137int lbs_ret_802_11_rssi(struct lbs_private *priv,
138 struct cmd_ds_command *resp);
139
140int lbs_cmd_bcn_ctrl(struct lbs_private *priv,
141 struct cmd_ds_command *cmd,
142 u16 cmd_action);
143int lbs_ret_802_11_bcn_ctrl(struct lbs_private *priv,
144 struct cmd_ds_command *resp);
145
146int lbs_cmd_802_11_set_wep(struct lbs_private *priv, uint16_t cmd_action,
147 struct assoc_request *assoc);
148
149int lbs_cmd_802_11_enable_rsn(struct lbs_private *priv, uint16_t cmd_action,
150 uint16_t *enable);
151
152int lbs_cmd_802_11_key_material(struct lbs_private *priv, uint16_t cmd_action,
153 struct assoc_request *assoc);
154
16#endif /* _LBS_ASSOC_H */ 155#endif /* _LBS_ASSOC_H */
diff --git a/drivers/net/wireless/libertas/cfg.c b/drivers/net/wireless/libertas/cfg.c
new file mode 100644
index 000000000000..ce7bec402a33
--- /dev/null
+++ b/drivers/net/wireless/libertas/cfg.c
@@ -0,0 +1,203 @@
1/*
2 * Implement cfg80211 ("iw") support.
3 *
4 * Copyright (C) 2009 M&N Solutions GmbH, 61191 Rosbach, Germany
5 * Holger Schurig <hs4233@mail.mn-solutions.de>
6 *
7 */
8
9#include <linux/slab.h>
10#include <net/cfg80211.h>
11
12#include "cfg.h"
13#include "cmd.h"
14
15
16#define CHAN2G(_channel, _freq, _flags) { \
17 .band = IEEE80211_BAND_2GHZ, \
18 .center_freq = (_freq), \
19 .hw_value = (_channel), \
20 .flags = (_flags), \
21 .max_antenna_gain = 0, \
22 .max_power = 30, \
23}
24
25static struct ieee80211_channel lbs_2ghz_channels[] = {
26 CHAN2G(1, 2412, 0),
27 CHAN2G(2, 2417, 0),
28 CHAN2G(3, 2422, 0),
29 CHAN2G(4, 2427, 0),
30 CHAN2G(5, 2432, 0),
31 CHAN2G(6, 2437, 0),
32 CHAN2G(7, 2442, 0),
33 CHAN2G(8, 2447, 0),
34 CHAN2G(9, 2452, 0),
35 CHAN2G(10, 2457, 0),
36 CHAN2G(11, 2462, 0),
37 CHAN2G(12, 2467, 0),
38 CHAN2G(13, 2472, 0),
39 CHAN2G(14, 2484, 0),
40};
41
42#define RATETAB_ENT(_rate, _rateid, _flags) { \
43 .bitrate = (_rate), \
44 .hw_value = (_rateid), \
45 .flags = (_flags), \
46}
47
48
49static struct ieee80211_rate lbs_rates[] = {
50 RATETAB_ENT(10, 0x1, 0),
51 RATETAB_ENT(20, 0x2, 0),
52 RATETAB_ENT(55, 0x4, 0),
53 RATETAB_ENT(110, 0x8, 0),
54 RATETAB_ENT(60, 0x10, 0),
55 RATETAB_ENT(90, 0x20, 0),
56 RATETAB_ENT(120, 0x40, 0),
57 RATETAB_ENT(180, 0x80, 0),
58 RATETAB_ENT(240, 0x100, 0),
59 RATETAB_ENT(360, 0x200, 0),
60 RATETAB_ENT(480, 0x400, 0),
61 RATETAB_ENT(540, 0x800, 0),
62};
63
64static struct ieee80211_supported_band lbs_band_2ghz = {
65 .channels = lbs_2ghz_channels,
66 .n_channels = ARRAY_SIZE(lbs_2ghz_channels),
67 .bitrates = lbs_rates,
68 .n_bitrates = ARRAY_SIZE(lbs_rates),
69};
70
71
72static const u32 cipher_suites[] = {
73 WLAN_CIPHER_SUITE_WEP40,
74 WLAN_CIPHER_SUITE_WEP104,
75 WLAN_CIPHER_SUITE_TKIP,
76 WLAN_CIPHER_SUITE_CCMP,
77};
78
79
80
81static int lbs_cfg_set_channel(struct wiphy *wiphy,
82 struct ieee80211_channel *chan,
83 enum nl80211_channel_type channel_type)
84{
85 struct lbs_private *priv = wiphy_priv(wiphy);
86 int ret = -ENOTSUPP;
87
88 lbs_deb_enter_args(LBS_DEB_CFG80211, "freq %d, type %d", chan->center_freq, channel_type);
89
90 if (channel_type != NL80211_CHAN_NO_HT)
91 goto out;
92
93 ret = lbs_set_channel(priv, chan->hw_value);
94
95 out:
96 lbs_deb_leave_args(LBS_DEB_CFG80211, "ret %d", ret);
97 return ret;
98}
99
100
101
102
103static struct cfg80211_ops lbs_cfg80211_ops = {
104 .set_channel = lbs_cfg_set_channel,
105};
106
107
108/*
109 * At this time lbs_private *priv doesn't even exist, so we just allocate
110 * memory and don't initialize the wiphy further. This is postponed until we
111 * can talk to the firmware and happens at registration time in
112 * lbs_cfg_wiphy_register().
113 */
114struct wireless_dev *lbs_cfg_alloc(struct device *dev)
115{
116 int ret = 0;
117 struct wireless_dev *wdev;
118
119 lbs_deb_enter(LBS_DEB_CFG80211);
120
121 wdev = kzalloc(sizeof(struct wireless_dev), GFP_KERNEL);
122 if (!wdev) {
123 dev_err(dev, "cannot allocate wireless device\n");
124 return ERR_PTR(-ENOMEM);
125 }
126
127 wdev->wiphy = wiphy_new(&lbs_cfg80211_ops, sizeof(struct lbs_private));
128 if (!wdev->wiphy) {
129 dev_err(dev, "cannot allocate wiphy\n");
130 ret = -ENOMEM;
131 goto err_wiphy_new;
132 }
133
134 lbs_deb_leave(LBS_DEB_CFG80211);
135 return wdev;
136
137 err_wiphy_new:
138 kfree(wdev);
139 lbs_deb_leave_args(LBS_DEB_CFG80211, "ret %d", ret);
140 return ERR_PTR(ret);
141}
142
143
144/*
145 * This function get's called after lbs_setup_firmware() determined the
146 * firmware capabities. So we can setup the wiphy according to our
147 * hardware/firmware.
148 */
149int lbs_cfg_register(struct lbs_private *priv)
150{
151 struct wireless_dev *wdev = priv->wdev;
152 int ret;
153
154 lbs_deb_enter(LBS_DEB_CFG80211);
155
156 wdev->wiphy->max_scan_ssids = 1;
157 wdev->wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
158
159 /* TODO: BIT(NL80211_IFTYPE_ADHOC); */
160 wdev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
161
162 /* TODO: honor priv->regioncode */
163 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = &lbs_band_2ghz;
164
165 /*
166 * We could check priv->fwcapinfo && FW_CAPINFO_WPA, but I have
167 * never seen a firmware without WPA
168 */
169 wdev->wiphy->cipher_suites = cipher_suites;
170 wdev->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
171
172 ret = wiphy_register(wdev->wiphy);
173 if (ret < 0)
174 lbs_pr_err("cannot register wiphy device\n");
175
176 priv->wiphy_registered = true;
177
178 ret = register_netdev(priv->dev);
179 if (ret)
180 lbs_pr_err("cannot register network device\n");
181
182 lbs_deb_leave_args(LBS_DEB_CFG80211, "ret %d", ret);
183 return ret;
184}
185
186
187void lbs_cfg_free(struct lbs_private *priv)
188{
189 struct wireless_dev *wdev = priv->wdev;
190
191 lbs_deb_enter(LBS_DEB_CFG80211);
192
193 if (!wdev)
194 return;
195
196 if (priv->wiphy_registered)
197 wiphy_unregister(wdev->wiphy);
198
199 if (wdev->wiphy)
200 wiphy_free(wdev->wiphy);
201
202 kfree(wdev);
203}
diff --git a/drivers/net/wireless/libertas/cfg.h b/drivers/net/wireless/libertas/cfg.h
new file mode 100644
index 000000000000..e09a193a34d6
--- /dev/null
+++ b/drivers/net/wireless/libertas/cfg.h
@@ -0,0 +1,16 @@
1#ifndef __LBS_CFG80211_H__
2#define __LBS_CFG80211_H__
3
4#include "dev.h"
5
6struct wireless_dev *lbs_cfg_alloc(struct device *dev);
7int lbs_cfg_register(struct lbs_private *priv);
8void lbs_cfg_free(struct lbs_private *priv);
9
10int lbs_send_specific_ssid_scan(struct lbs_private *priv, u8 *ssid,
11 u8 ssid_len);
12int lbs_scan_networks(struct lbs_private *priv, int full_scan);
13void lbs_cfg_scan_worker(struct work_struct *work);
14
15
16#endif
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c
index 0a324dcd264c..cdb9b9650d73 100644
--- a/drivers/net/wireless/libertas/cmd.c
+++ b/drivers/net/wireless/libertas/cmd.c
@@ -3,21 +3,21 @@
3 * It prepares command and sends it to firmware when it is ready. 3 * It prepares command and sends it to firmware when it is ready.
4 */ 4 */
5 5
6#include <net/iw_handler.h>
7#include <net/lib80211.h>
8#include <linux/kfifo.h> 6#include <linux/kfifo.h>
9#include <linux/sched.h> 7#include <linux/sched.h>
8#include <linux/slab.h>
9
10#include "host.h" 10#include "host.h"
11#include "hostcmd.h"
12#include "decl.h" 11#include "decl.h"
13#include "defs.h" 12#include "defs.h"
14#include "dev.h" 13#include "dev.h"
15#include "assoc.h" 14#include "assoc.h"
16#include "wext.h" 15#include "wext.h"
16#include "scan.h"
17#include "cmd.h" 17#include "cmd.h"
18 18
19static struct cmd_ctrl_node *lbs_get_cmd_ctrl_node(struct lbs_private *priv);
20 19
20static struct cmd_ctrl_node *lbs_get_cmd_ctrl_node(struct lbs_private *priv);
21 21
22/** 22/**
23 * @brief Simple callback that copies response back into command 23 * @brief Simple callback that copies response back into command
@@ -77,6 +77,30 @@ static u8 is_command_allowed_in_ps(u16 cmd)
77} 77}
78 78
79/** 79/**
80 * @brief This function checks if the command is allowed.
81 *
82 * @param priv A pointer to lbs_private structure
83 * @return allowed or not allowed.
84 */
85
86static int lbs_is_cmd_allowed(struct lbs_private *priv)
87{
88 int ret = 1;
89
90 lbs_deb_enter(LBS_DEB_CMD);
91
92 if (!priv->is_auto_deep_sleep_enabled) {
93 if (priv->is_deep_sleep) {
94 lbs_deb_cmd("command not allowed in deep sleep\n");
95 ret = 0;
96 }
97 }
98
99 lbs_deb_leave(LBS_DEB_CMD);
100 return ret;
101}
102
103/**
80 * @brief Updates the hardware details like MAC address and regulatory region 104 * @brief Updates the hardware details like MAC address and regulatory region
81 * 105 *
82 * @param priv A pointer to struct lbs_private structure 106 * @param priv A pointer to struct lbs_private structure
@@ -120,19 +144,6 @@ int lbs_update_hw_spec(struct lbs_private *priv)
120 lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n", 144 lbs_deb_cmd("GET_HW_SPEC: hardware interface 0x%x, hardware spec 0x%04x\n",
121 cmd.hwifversion, cmd.version); 145 cmd.hwifversion, cmd.version);
122 146
123 /* Determine mesh_fw_ver from fwrelease and fwcapinfo */
124 /* 5.0.16p0 9.0.0.p0 is known to NOT support any mesh */
125 /* 5.110.22 have mesh command with 0xa3 command id */
126 /* 10.0.0.p0 FW brings in mesh config command with different id */
127 /* Check FW version MSB and initialize mesh_fw_ver */
128 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V5)
129 priv->mesh_fw_ver = MESH_FW_OLD;
130 else if ((MRVL_FW_MAJOR_REV(priv->fwrelease) >= MRVL_FW_V10) &&
131 (priv->fwcapinfo & MESH_CAPINFO_ENABLE_MASK))
132 priv->mesh_fw_ver = MESH_FW_NEW;
133 else
134 priv->mesh_fw_ver = MESH_NONE;
135
136 /* Clamp region code to 8-bit since FW spec indicates that it should 147 /* Clamp region code to 8-bit since FW spec indicates that it should
137 * only ever be 8-bit, even though the field size is 16-bit. Some firmware 148 * only ever be 8-bit, even though the field size is 16-bit. Some firmware
138 * returns non-zero high 8 bits here. 149 * returns non-zero high 8 bits here.
@@ -169,11 +180,6 @@ int lbs_update_hw_spec(struct lbs_private *priv)
169 goto out; 180 goto out;
170 } 181 }
171 182
172 if (lbs_set_universaltable(priv, 0)) {
173 ret = -1;
174 goto out;
175 }
176
177out: 183out:
178 lbs_deb_leave(LBS_DEB_CMD); 184 lbs_deb_leave(LBS_DEB_CMD);
179 return ret; 185 return ret;
@@ -222,7 +228,7 @@ static int lbs_cmd_802_11_ps_mode(struct cmd_ds_command *cmd,
222 228
223 cmd->command = cpu_to_le16(CMD_802_11_PS_MODE); 229 cmd->command = cpu_to_le16(CMD_802_11_PS_MODE);
224 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_802_11_ps_mode) + 230 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_802_11_ps_mode) +
225 S_DS_GEN); 231 sizeof(struct cmd_header));
226 psm->action = cpu_to_le16(cmd_action); 232 psm->action = cpu_to_le16(cmd_action);
227 psm->multipledtim = 0; 233 psm->multipledtim = 0;
228 switch (cmd_action) { 234 switch (cmd_action) {
@@ -251,33 +257,6 @@ static int lbs_cmd_802_11_ps_mode(struct cmd_ds_command *cmd,
251 return 0; 257 return 0;
252} 258}
253 259
254int lbs_cmd_802_11_inactivity_timeout(struct lbs_private *priv,
255 uint16_t cmd_action, uint16_t *timeout)
256{
257 struct cmd_ds_802_11_inactivity_timeout cmd;
258 int ret;
259
260 lbs_deb_enter(LBS_DEB_CMD);
261
262 cmd.hdr.command = cpu_to_le16(CMD_802_11_INACTIVITY_TIMEOUT);
263 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
264
265 cmd.action = cpu_to_le16(cmd_action);
266
267 if (cmd_action == CMD_ACT_SET)
268 cmd.timeout = cpu_to_le16(*timeout);
269 else
270 cmd.timeout = 0;
271
272 ret = lbs_cmd_with_response(priv, CMD_802_11_INACTIVITY_TIMEOUT, &cmd);
273
274 if (!ret)
275 *timeout = le16_to_cpu(cmd.timeout);
276
277 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
278 return 0;
279}
280
281int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action, 260int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action,
282 struct sleep_params *sp) 261 struct sleep_params *sp)
283{ 262{
@@ -320,190 +299,53 @@ int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action,
320 return 0; 299 return 0;
321} 300}
322 301
323int lbs_cmd_802_11_set_wep(struct lbs_private *priv, uint16_t cmd_action, 302static int lbs_wait_for_ds_awake(struct lbs_private *priv)
324 struct assoc_request *assoc)
325{ 303{
326 struct cmd_ds_802_11_set_wep cmd;
327 int ret = 0; 304 int ret = 0;
328 305
329 lbs_deb_enter(LBS_DEB_CMD); 306 lbs_deb_enter(LBS_DEB_CMD);
330 307
331 memset(&cmd, 0, sizeof(cmd)); 308 if (priv->is_deep_sleep) {
332 cmd.hdr.command = cpu_to_le16(CMD_802_11_SET_WEP); 309 if (!wait_event_interruptible_timeout(priv->ds_awake_q,
333 cmd.hdr.size = cpu_to_le16(sizeof(cmd)); 310 !priv->is_deep_sleep, (10 * HZ))) {
334 311 lbs_pr_err("ds_awake_q: timer expired\n");
335 cmd.action = cpu_to_le16(cmd_action); 312 ret = -1;
336
337 if (cmd_action == CMD_ACT_ADD) {
338 int i;
339
340 /* default tx key index */
341 cmd.keyindex = cpu_to_le16(assoc->wep_tx_keyidx &
342 CMD_WEP_KEY_INDEX_MASK);
343
344 /* Copy key types and material to host command structure */
345 for (i = 0; i < 4; i++) {
346 struct enc_key *pkey = &assoc->wep_keys[i];
347
348 switch (pkey->len) {
349 case KEY_LEN_WEP_40:
350 cmd.keytype[i] = CMD_TYPE_WEP_40_BIT;
351 memmove(cmd.keymaterial[i], pkey->key, pkey->len);
352 lbs_deb_cmd("SET_WEP: add key %d (40 bit)\n", i);
353 break;
354 case KEY_LEN_WEP_104:
355 cmd.keytype[i] = CMD_TYPE_WEP_104_BIT;
356 memmove(cmd.keymaterial[i], pkey->key, pkey->len);
357 lbs_deb_cmd("SET_WEP: add key %d (104 bit)\n", i);
358 break;
359 case 0:
360 break;
361 default:
362 lbs_deb_cmd("SET_WEP: invalid key %d, length %d\n",
363 i, pkey->len);
364 ret = -1;
365 goto done;
366 break;
367 }
368 } 313 }
369 } else if (cmd_action == CMD_ACT_REMOVE) {
370 /* ACT_REMOVE clears _all_ WEP keys */
371
372 /* default tx key index */
373 cmd.keyindex = cpu_to_le16(priv->wep_tx_keyidx &
374 CMD_WEP_KEY_INDEX_MASK);
375 lbs_deb_cmd("SET_WEP: remove key %d\n", priv->wep_tx_keyidx);
376 }
377
378 ret = lbs_cmd_with_response(priv, CMD_802_11_SET_WEP, &cmd);
379done:
380 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
381 return ret;
382}
383
384int lbs_cmd_802_11_enable_rsn(struct lbs_private *priv, uint16_t cmd_action,
385 uint16_t *enable)
386{
387 struct cmd_ds_802_11_enable_rsn cmd;
388 int ret;
389
390 lbs_deb_enter(LBS_DEB_CMD);
391
392 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
393 cmd.action = cpu_to_le16(cmd_action);
394
395 if (cmd_action == CMD_ACT_GET)
396 cmd.enable = 0;
397 else {
398 if (*enable)
399 cmd.enable = cpu_to_le16(CMD_ENABLE_RSN);
400 else
401 cmd.enable = cpu_to_le16(CMD_DISABLE_RSN);
402 lbs_deb_cmd("ENABLE_RSN: %d\n", *enable);
403 } 314 }
404 315
405 ret = lbs_cmd_with_response(priv, CMD_802_11_ENABLE_RSN, &cmd);
406 if (!ret && cmd_action == CMD_ACT_GET)
407 *enable = le16_to_cpu(cmd.enable);
408
409 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); 316 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
410 return ret; 317 return ret;
411} 318}
412 319
413static void set_one_wpa_key(struct MrvlIEtype_keyParamSet *keyparam, 320int lbs_set_deep_sleep(struct lbs_private *priv, int deep_sleep)
414 struct enc_key *key)
415{ 321{
416 lbs_deb_enter(LBS_DEB_CMD); 322 int ret = 0;
417
418 if (key->flags & KEY_INFO_WPA_ENABLED)
419 keyparam->keyinfo |= cpu_to_le16(KEY_INFO_WPA_ENABLED);
420 if (key->flags & KEY_INFO_WPA_UNICAST)
421 keyparam->keyinfo |= cpu_to_le16(KEY_INFO_WPA_UNICAST);
422 if (key->flags & KEY_INFO_WPA_MCAST)
423 keyparam->keyinfo |= cpu_to_le16(KEY_INFO_WPA_MCAST);
424
425 keyparam->type = cpu_to_le16(TLV_TYPE_KEY_MATERIAL);
426 keyparam->keytypeid = cpu_to_le16(key->type);
427 keyparam->keylen = cpu_to_le16(key->len);
428 memcpy(keyparam->key, key->key, key->len);
429
430 /* Length field doesn't include the {type,length} header */
431 keyparam->length = cpu_to_le16(sizeof(*keyparam) - 4);
432 lbs_deb_leave(LBS_DEB_CMD);
433}
434
435int lbs_cmd_802_11_key_material(struct lbs_private *priv, uint16_t cmd_action,
436 struct assoc_request *assoc)
437{
438 struct cmd_ds_802_11_key_material cmd;
439 int ret = 0;
440 int index = 0;
441 323
442 lbs_deb_enter(LBS_DEB_CMD); 324 lbs_deb_enter(LBS_DEB_CMD);
443 325
444 cmd.action = cpu_to_le16(cmd_action); 326 if (deep_sleep) {
445 cmd.hdr.size = cpu_to_le16(sizeof(cmd)); 327 if (priv->is_deep_sleep != 1) {
446 328 lbs_deb_cmd("deep sleep: sleep\n");
447 if (cmd_action == CMD_ACT_GET) { 329 BUG_ON(!priv->enter_deep_sleep);
448 cmd.hdr.size = cpu_to_le16(S_DS_GEN + 2); 330 ret = priv->enter_deep_sleep(priv);
449 } else { 331 if (!ret) {
450 memset(cmd.keyParamSet, 0, sizeof(cmd.keyParamSet)); 332 netif_stop_queue(priv->dev);
451 333 netif_carrier_off(priv->dev);
452 if (test_bit(ASSOC_FLAG_WPA_UCAST_KEY, &assoc->flags)) { 334 }
453 set_one_wpa_key(&cmd.keyParamSet[index], 335 } else {
454 &assoc->wpa_unicast_key); 336 lbs_pr_err("deep sleep: already enabled\n");
455 index++;
456 }
457
458 if (test_bit(ASSOC_FLAG_WPA_MCAST_KEY, &assoc->flags)) {
459 set_one_wpa_key(&cmd.keyParamSet[index],
460 &assoc->wpa_mcast_key);
461 index++;
462 } 337 }
463 338 } else {
464 /* The common header and as many keys as we included */ 339 if (priv->is_deep_sleep) {
465 cmd.hdr.size = cpu_to_le16(offsetof(typeof(cmd), 340 lbs_deb_cmd("deep sleep: wakeup\n");
466 keyParamSet[index])); 341 BUG_ON(!priv->exit_deep_sleep);
467 } 342 ret = priv->exit_deep_sleep(priv);
468 ret = lbs_cmd_with_response(priv, CMD_802_11_KEY_MATERIAL, &cmd); 343 if (!ret) {
469 /* Copy the returned key to driver private data */ 344 ret = lbs_wait_for_ds_awake(priv);
470 if (!ret && cmd_action == CMD_ACT_GET) { 345 if (ret)
471 void *buf_ptr = cmd.keyParamSet; 346 lbs_pr_err("deep sleep: wakeup"
472 void *resp_end = &(&cmd)[1]; 347 "failed\n");
473 348 }
474 while (buf_ptr < resp_end) {
475 struct MrvlIEtype_keyParamSet *keyparam = buf_ptr;
476 struct enc_key *key;
477 uint16_t param_set_len = le16_to_cpu(keyparam->length);
478 uint16_t key_len = le16_to_cpu(keyparam->keylen);
479 uint16_t key_flags = le16_to_cpu(keyparam->keyinfo);
480 uint16_t key_type = le16_to_cpu(keyparam->keytypeid);
481 void *end;
482
483 end = (void *)keyparam + sizeof(keyparam->type)
484 + sizeof(keyparam->length) + param_set_len;
485
486 /* Make sure we don't access past the end of the IEs */
487 if (end > resp_end)
488 break;
489
490 if (key_flags & KEY_INFO_WPA_UNICAST)
491 key = &priv->wpa_unicast_key;
492 else if (key_flags & KEY_INFO_WPA_MCAST)
493 key = &priv->wpa_mcast_key;
494 else
495 break;
496
497 /* Copy returned key into driver */
498 memset(key, 0, sizeof(struct enc_key));
499 if (key_len > sizeof(key->key))
500 break;
501 key->type = key_type;
502 key->flags = key_flags;
503 key->len = key_len;
504 memcpy(key->key, keyparam->key, key->len);
505
506 buf_ptr = end + 1;
507 } 349 }
508 } 350 }
509 351
@@ -535,7 +377,7 @@ int lbs_set_snmp_mib(struct lbs_private *priv, u32 oid, u16 val)
535 switch (oid) { 377 switch (oid) {
536 case SNMP_MIB_OID_BSS_TYPE: 378 case SNMP_MIB_OID_BSS_TYPE:
537 cmd.bufsize = cpu_to_le16(sizeof(u8)); 379 cmd.bufsize = cpu_to_le16(sizeof(u8));
538 cmd.value[0] = (val == IW_MODE_ADHOC) ? 2 : 1; 380 cmd.value[0] = val;
539 break; 381 break;
540 case SNMP_MIB_OID_11D_ENABLE: 382 case SNMP_MIB_OID_11D_ENABLE:
541 case SNMP_MIB_OID_FRAG_THRESHOLD: 383 case SNMP_MIB_OID_FRAG_THRESHOLD:
@@ -588,13 +430,7 @@ int lbs_get_snmp_mib(struct lbs_private *priv, u32 oid, u16 *out_val)
588 430
589 switch (le16_to_cpu(cmd.bufsize)) { 431 switch (le16_to_cpu(cmd.bufsize)) {
590 case sizeof(u8): 432 case sizeof(u8):
591 if (oid == SNMP_MIB_OID_BSS_TYPE) { 433 *out_val = cmd.value[0];
592 if (cmd.value[0] == 2)
593 *out_val = IW_MODE_ADHOC;
594 else
595 *out_val = IW_MODE_INFRA;
596 } else
597 *out_val = cmd.value[0];
598 break; 434 break;
599 case sizeof(u16): 435 case sizeof(u16):
600 *out_val = le16_to_cpu(*((__le16 *)(&cmd.value))); 436 *out_val = le16_to_cpu(*((__le16 *)(&cmd.value)));
@@ -681,7 +517,7 @@ static int lbs_cmd_802_11_monitor_mode(struct cmd_ds_command *cmd,
681 cmd->command = cpu_to_le16(CMD_802_11_MONITOR_MODE); 517 cmd->command = cpu_to_le16(CMD_802_11_MONITOR_MODE);
682 cmd->size = 518 cmd->size =
683 cpu_to_le16(sizeof(struct cmd_ds_802_11_monitor_mode) + 519 cpu_to_le16(sizeof(struct cmd_ds_802_11_monitor_mode) +
684 S_DS_GEN); 520 sizeof(struct cmd_header));
685 521
686 monitor->action = cpu_to_le16(cmd_action); 522 monitor->action = cpu_to_le16(cmd_action);
687 if (cmd_action == CMD_ACT_SET) { 523 if (cmd_action == CMD_ACT_SET) {
@@ -692,111 +528,6 @@ static int lbs_cmd_802_11_monitor_mode(struct cmd_ds_command *cmd,
692 return 0; 528 return 0;
693} 529}
694 530
695static __le16 lbs_rate_to_fw_bitmap(int rate, int lower_rates_ok)
696{
697/* Bit Rate
698* 15:13 Reserved
699* 12 54 Mbps
700* 11 48 Mbps
701* 10 36 Mbps
702* 9 24 Mbps
703* 8 18 Mbps
704* 7 12 Mbps
705* 6 9 Mbps
706* 5 6 Mbps
707* 4 Reserved
708* 3 11 Mbps
709* 2 5.5 Mbps
710* 1 2 Mbps
711* 0 1 Mbps
712**/
713
714 uint16_t ratemask;
715 int i = lbs_data_rate_to_fw_index(rate);
716 if (lower_rates_ok)
717 ratemask = (0x1fef >> (12 - i));
718 else
719 ratemask = (1 << i);
720 return cpu_to_le16(ratemask);
721}
722
723int lbs_cmd_802_11_rate_adapt_rateset(struct lbs_private *priv,
724 uint16_t cmd_action)
725{
726 struct cmd_ds_802_11_rate_adapt_rateset cmd;
727 int ret;
728
729 lbs_deb_enter(LBS_DEB_CMD);
730
731 if (!priv->cur_rate && !priv->enablehwauto)
732 return -EINVAL;
733
734 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
735
736 cmd.action = cpu_to_le16(cmd_action);
737 cmd.enablehwauto = cpu_to_le16(priv->enablehwauto);
738 cmd.bitmap = lbs_rate_to_fw_bitmap(priv->cur_rate, priv->enablehwauto);
739 ret = lbs_cmd_with_response(priv, CMD_802_11_RATE_ADAPT_RATESET, &cmd);
740 if (!ret && cmd_action == CMD_ACT_GET) {
741 priv->ratebitmap = le16_to_cpu(cmd.bitmap);
742 priv->enablehwauto = le16_to_cpu(cmd.enablehwauto);
743 }
744
745 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
746 return ret;
747}
748EXPORT_SYMBOL_GPL(lbs_cmd_802_11_rate_adapt_rateset);
749
750/**
751 * @brief Set the data rate
752 *
753 * @param priv A pointer to struct lbs_private structure
754 * @param rate The desired data rate, or 0 to clear a locked rate
755 *
756 * @return 0 on success, error on failure
757 */
758int lbs_set_data_rate(struct lbs_private *priv, u8 rate)
759{
760 struct cmd_ds_802_11_data_rate cmd;
761 int ret = 0;
762
763 lbs_deb_enter(LBS_DEB_CMD);
764
765 memset(&cmd, 0, sizeof(cmd));
766 cmd.hdr.size = cpu_to_le16(sizeof(cmd));
767
768 if (rate > 0) {
769 cmd.action = cpu_to_le16(CMD_ACT_SET_TX_FIX_RATE);
770 cmd.rates[0] = lbs_data_rate_to_fw_index(rate);
771 if (cmd.rates[0] == 0) {
772 lbs_deb_cmd("DATA_RATE: invalid requested rate of"
773 " 0x%02X\n", rate);
774 ret = 0;
775 goto out;
776 }
777 lbs_deb_cmd("DATA_RATE: set fixed 0x%02X\n", cmd.rates[0]);
778 } else {
779 cmd.action = cpu_to_le16(CMD_ACT_SET_TX_AUTO);
780 lbs_deb_cmd("DATA_RATE: setting auto\n");
781 }
782
783 ret = lbs_cmd_with_response(priv, CMD_802_11_DATA_RATE, &cmd);
784 if (ret)
785 goto out;
786
787 lbs_deb_hex(LBS_DEB_CMD, "DATA_RATE_RESP", (u8 *) &cmd, sizeof (cmd));
788
789 /* FIXME: get actual rates FW can do if this command actually returns
790 * all data rates supported.
791 */
792 priv->cur_rate = lbs_fw_index_to_data_rate(cmd.rates[0]);
793 lbs_deb_cmd("DATA_RATE: current rate is 0x%02x\n", priv->cur_rate);
794
795out:
796 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
797 return ret;
798}
799
800/** 531/**
801 * @brief Get the radio channel 532 * @brief Get the radio channel
802 * 533 *
@@ -804,7 +535,7 @@ out:
804 * 535 *
805 * @return The channel on success, error on failure 536 * @return The channel on success, error on failure
806 */ 537 */
807int lbs_get_channel(struct lbs_private *priv) 538static int lbs_get_channel(struct lbs_private *priv)
808{ 539{
809 struct cmd_ds_802_11_rf_channel cmd; 540 struct cmd_ds_802_11_rf_channel cmd;
810 int ret = 0; 541 int ret = 0;
@@ -836,7 +567,7 @@ int lbs_update_channel(struct lbs_private *priv)
836 567
837 ret = lbs_get_channel(priv); 568 ret = lbs_get_channel(priv);
838 if (ret > 0) { 569 if (ret > 0) {
839 priv->curbssparams.channel = ret; 570 priv->channel = ret;
840 ret = 0; 571 ret = 0;
841 } 572 }
842 lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret); 573 lbs_deb_leave_args(LBS_DEB_ASSOC, "ret %d", ret);
@@ -855,7 +586,7 @@ int lbs_set_channel(struct lbs_private *priv, u8 channel)
855{ 586{
856 struct cmd_ds_802_11_rf_channel cmd; 587 struct cmd_ds_802_11_rf_channel cmd;
857#ifdef DEBUG 588#ifdef DEBUG
858 u8 old_channel = priv->curbssparams.channel; 589 u8 old_channel = priv->channel;
859#endif 590#endif
860 int ret = 0; 591 int ret = 0;
861 592
@@ -870,36 +601,15 @@ int lbs_set_channel(struct lbs_private *priv, u8 channel)
870 if (ret) 601 if (ret)
871 goto out; 602 goto out;
872 603
873 priv->curbssparams.channel = (uint8_t) le16_to_cpu(cmd.channel); 604 priv->channel = (uint8_t) le16_to_cpu(cmd.channel);
874 lbs_deb_cmd("channel switch from %d to %d\n", old_channel, 605 lbs_deb_cmd("channel switch from %d to %d\n", old_channel,
875 priv->curbssparams.channel); 606 priv->channel);
876 607
877out: 608out:
878 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret); 609 lbs_deb_leave_args(LBS_DEB_CMD, "ret %d", ret);
879 return ret; 610 return ret;
880} 611}
881 612
882static int lbs_cmd_802_11_rssi(struct lbs_private *priv,
883 struct cmd_ds_command *cmd)
884{
885
886 lbs_deb_enter(LBS_DEB_CMD);
887 cmd->command = cpu_to_le16(CMD_802_11_RSSI);
888 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_802_11_rssi) + S_DS_GEN);
889 cmd->params.rssi.N = cpu_to_le16(DEFAULT_BCN_AVG_FACTOR);
890
891 /* reset Beacon SNR/NF/RSSI values */
892 priv->SNR[TYPE_BEACON][TYPE_NOAVG] = 0;
893 priv->SNR[TYPE_BEACON][TYPE_AVG] = 0;
894 priv->NF[TYPE_BEACON][TYPE_NOAVG] = 0;
895 priv->NF[TYPE_BEACON][TYPE_AVG] = 0;
896 priv->RSSI[TYPE_BEACON][TYPE_NOAVG] = 0;
897 priv->RSSI[TYPE_BEACON][TYPE_AVG] = 0;
898
899 lbs_deb_leave(LBS_DEB_CMD);
900 return 0;
901}
902
903static int lbs_cmd_reg_access(struct cmd_ds_command *cmdptr, 613static int lbs_cmd_reg_access(struct cmd_ds_command *cmdptr,
904 u8 cmd_action, void *pdata_buf) 614 u8 cmd_action, void *pdata_buf)
905{ 615{
@@ -916,7 +626,7 @@ static int lbs_cmd_reg_access(struct cmd_ds_command *cmdptr,
916 626
917 cmdptr->size = 627 cmdptr->size =
918 cpu_to_le16(sizeof (struct cmd_ds_mac_reg_access) 628 cpu_to_le16(sizeof (struct cmd_ds_mac_reg_access)
919 + S_DS_GEN); 629 + sizeof(struct cmd_header));
920 macreg = 630 macreg =
921 (struct cmd_ds_mac_reg_access *)&cmdptr->params. 631 (struct cmd_ds_mac_reg_access *)&cmdptr->params.
922 macreg; 632 macreg;
@@ -935,7 +645,7 @@ static int lbs_cmd_reg_access(struct cmd_ds_command *cmdptr,
935 cmdptr->size = 645 cmdptr->size =
936 cpu_to_le16(sizeof 646 cpu_to_le16(sizeof
937 (struct cmd_ds_bbp_reg_access) 647 (struct cmd_ds_bbp_reg_access)
938 + S_DS_GEN); 648 + sizeof(struct cmd_header));
939 bbpreg = 649 bbpreg =
940 (struct cmd_ds_bbp_reg_access *)&cmdptr->params. 650 (struct cmd_ds_bbp_reg_access *)&cmdptr->params.
941 bbpreg; 651 bbpreg;
@@ -954,7 +664,7 @@ static int lbs_cmd_reg_access(struct cmd_ds_command *cmdptr,
954 cmdptr->size = 664 cmdptr->size =
955 cpu_to_le16(sizeof 665 cpu_to_le16(sizeof
956 (struct cmd_ds_rf_reg_access) + 666 (struct cmd_ds_rf_reg_access) +
957 S_DS_GEN); 667 sizeof(struct cmd_header));
958 rfreg = 668 rfreg =
959 (struct cmd_ds_rf_reg_access *)&cmdptr->params. 669 (struct cmd_ds_rf_reg_access *)&cmdptr->params.
960 rfreg; 670 rfreg;
@@ -974,192 +684,6 @@ static int lbs_cmd_reg_access(struct cmd_ds_command *cmdptr,
974 return 0; 684 return 0;
975} 685}
976 686
977static int lbs_cmd_bt_access(struct cmd_ds_command *cmd,
978 u16 cmd_action, void *pdata_buf)
979{
980 struct cmd_ds_bt_access *bt_access = &cmd->params.bt;
981 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
982
983 cmd->command = cpu_to_le16(CMD_BT_ACCESS);
984 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_bt_access) + S_DS_GEN);
985 cmd->result = 0;
986 bt_access->action = cpu_to_le16(cmd_action);
987
988 switch (cmd_action) {
989 case CMD_ACT_BT_ACCESS_ADD:
990 memcpy(bt_access->addr1, pdata_buf, 2 * ETH_ALEN);
991 lbs_deb_hex(LBS_DEB_MESH, "BT_ADD: blinded MAC addr", bt_access->addr1, 6);
992 break;
993 case CMD_ACT_BT_ACCESS_DEL:
994 memcpy(bt_access->addr1, pdata_buf, 1 * ETH_ALEN);
995 lbs_deb_hex(LBS_DEB_MESH, "BT_DEL: blinded MAC addr", bt_access->addr1, 6);
996 break;
997 case CMD_ACT_BT_ACCESS_LIST:
998 bt_access->id = cpu_to_le32(*(u32 *) pdata_buf);
999 break;
1000 case CMD_ACT_BT_ACCESS_RESET:
1001 break;
1002 case CMD_ACT_BT_ACCESS_SET_INVERT:
1003 bt_access->id = cpu_to_le32(*(u32 *) pdata_buf);
1004 break;
1005 case CMD_ACT_BT_ACCESS_GET_INVERT:
1006 break;
1007 default:
1008 break;
1009 }
1010 lbs_deb_leave(LBS_DEB_CMD);
1011 return 0;
1012}
1013
1014static int lbs_cmd_fwt_access(struct cmd_ds_command *cmd,
1015 u16 cmd_action, void *pdata_buf)
1016{
1017 struct cmd_ds_fwt_access *fwt_access = &cmd->params.fwt;
1018 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
1019
1020 cmd->command = cpu_to_le16(CMD_FWT_ACCESS);
1021 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_fwt_access) + S_DS_GEN);
1022 cmd->result = 0;
1023
1024 if (pdata_buf)
1025 memcpy(fwt_access, pdata_buf, sizeof(*fwt_access));
1026 else
1027 memset(fwt_access, 0, sizeof(*fwt_access));
1028
1029 fwt_access->action = cpu_to_le16(cmd_action);
1030
1031 lbs_deb_leave(LBS_DEB_CMD);
1032 return 0;
1033}
1034
1035int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
1036 struct cmd_ds_mesh_access *cmd)
1037{
1038 int ret;
1039
1040 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
1041
1042 cmd->hdr.command = cpu_to_le16(CMD_MESH_ACCESS);
1043 cmd->hdr.size = cpu_to_le16(sizeof(*cmd));
1044 cmd->hdr.result = 0;
1045
1046 cmd->action = cpu_to_le16(cmd_action);
1047
1048 ret = lbs_cmd_with_response(priv, CMD_MESH_ACCESS, cmd);
1049
1050 lbs_deb_leave(LBS_DEB_CMD);
1051 return ret;
1052}
1053
1054static int __lbs_mesh_config_send(struct lbs_private *priv,
1055 struct cmd_ds_mesh_config *cmd,
1056 uint16_t action, uint16_t type)
1057{
1058 int ret;
1059 u16 command = CMD_MESH_CONFIG_OLD;
1060
1061 lbs_deb_enter(LBS_DEB_CMD);
1062
1063 /*
1064 * Command id is 0xac for v10 FW along with mesh interface
1065 * id in bits 14-13-12.
1066 */
1067 if (priv->mesh_fw_ver == MESH_FW_NEW)
1068 command = CMD_MESH_CONFIG |
1069 (MESH_IFACE_ID << MESH_IFACE_BIT_OFFSET);
1070
1071 cmd->hdr.command = cpu_to_le16(command);
1072 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_mesh_config));
1073 cmd->hdr.result = 0;
1074
1075 cmd->type = cpu_to_le16(type);
1076 cmd->action = cpu_to_le16(action);
1077
1078 ret = lbs_cmd_with_response(priv, command, cmd);
1079
1080 lbs_deb_leave(LBS_DEB_CMD);
1081 return ret;
1082}
1083
1084int lbs_mesh_config_send(struct lbs_private *priv,
1085 struct cmd_ds_mesh_config *cmd,
1086 uint16_t action, uint16_t type)
1087{
1088 int ret;
1089
1090 if (!(priv->fwcapinfo & FW_CAPINFO_PERSISTENT_CONFIG))
1091 return -EOPNOTSUPP;
1092
1093 ret = __lbs_mesh_config_send(priv, cmd, action, type);
1094 return ret;
1095}
1096
1097/* This function is the CMD_MESH_CONFIG legacy function. It only handles the
1098 * START and STOP actions. The extended actions supported by CMD_MESH_CONFIG
1099 * are all handled by preparing a struct cmd_ds_mesh_config and passing it to
1100 * lbs_mesh_config_send.
1101 */
1102int lbs_mesh_config(struct lbs_private *priv, uint16_t action, uint16_t chan)
1103{
1104 struct cmd_ds_mesh_config cmd;
1105 struct mrvl_meshie *ie;
1106 DECLARE_SSID_BUF(ssid);
1107
1108 memset(&cmd, 0, sizeof(cmd));
1109 cmd.channel = cpu_to_le16(chan);
1110 ie = (struct mrvl_meshie *)cmd.data;
1111
1112 switch (action) {
1113 case CMD_ACT_MESH_CONFIG_START:
1114 ie->id = WLAN_EID_GENERIC;
1115 ie->val.oui[0] = 0x00;
1116 ie->val.oui[1] = 0x50;
1117 ie->val.oui[2] = 0x43;
1118 ie->val.type = MARVELL_MESH_IE_TYPE;
1119 ie->val.subtype = MARVELL_MESH_IE_SUBTYPE;
1120 ie->val.version = MARVELL_MESH_IE_VERSION;
1121 ie->val.active_protocol_id = MARVELL_MESH_PROTO_ID_HWMP;
1122 ie->val.active_metric_id = MARVELL_MESH_METRIC_ID;
1123 ie->val.mesh_capability = MARVELL_MESH_CAPABILITY;
1124 ie->val.mesh_id_len = priv->mesh_ssid_len;
1125 memcpy(ie->val.mesh_id, priv->mesh_ssid, priv->mesh_ssid_len);
1126 ie->len = sizeof(struct mrvl_meshie_val) -
1127 IW_ESSID_MAX_SIZE + priv->mesh_ssid_len;
1128 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie_val));
1129 break;
1130 case CMD_ACT_MESH_CONFIG_STOP:
1131 break;
1132 default:
1133 return -1;
1134 }
1135 lbs_deb_cmd("mesh config action %d type %x channel %d SSID %s\n",
1136 action, priv->mesh_tlv, chan,
1137 print_ssid(ssid, priv->mesh_ssid, priv->mesh_ssid_len));
1138
1139 return __lbs_mesh_config_send(priv, &cmd, action, priv->mesh_tlv);
1140}
1141
1142static int lbs_cmd_bcn_ctrl(struct lbs_private * priv,
1143 struct cmd_ds_command *cmd,
1144 u16 cmd_action)
1145{
1146 struct cmd_ds_802_11_beacon_control
1147 *bcn_ctrl = &cmd->params.bcn_ctrl;
1148
1149 lbs_deb_enter(LBS_DEB_CMD);
1150 cmd->size =
1151 cpu_to_le16(sizeof(struct cmd_ds_802_11_beacon_control)
1152 + S_DS_GEN);
1153 cmd->command = cpu_to_le16(CMD_802_11_BEACON_CTRL);
1154
1155 bcn_ctrl->action = cpu_to_le16(cmd_action);
1156 bcn_ctrl->beacon_enable = cpu_to_le16(priv->beacon_enable);
1157 bcn_ctrl->beacon_period = cpu_to_le16(priv->beacon_period);
1158
1159 lbs_deb_leave(LBS_DEB_CMD);
1160 return 0;
1161}
1162
1163static void lbs_queue_cmd(struct lbs_private *priv, 687static void lbs_queue_cmd(struct lbs_private *priv,
1164 struct cmd_ctrl_node *cmdnode) 688 struct cmd_ctrl_node *cmdnode)
1165{ 689{
@@ -1243,8 +767,17 @@ static void lbs_submit_command(struct lbs_private *priv,
1243 timeo = HZ/4; 767 timeo = HZ/4;
1244 } 768 }
1245 769
1246 /* Setup the timer after transmit command */ 770 if (command == CMD_802_11_DEEP_SLEEP) {
1247 mod_timer(&priv->command_timer, jiffies + timeo); 771 if (priv->is_auto_deep_sleep_enabled) {
772 priv->wakeup_dev_required = 1;
773 priv->dnld_sent = 0;
774 }
775 priv->is_deep_sleep = 1;
776 lbs_complete_command(priv, cmdnode, 0);
777 } else {
778 /* Setup the timer after transmit command */
779 mod_timer(&priv->command_timer, jiffies + timeo);
780 }
1248 781
1249 lbs_deb_leave(LBS_DEB_HOST); 782 lbs_deb_leave(LBS_DEB_HOST);
1250} 783}
@@ -1310,9 +843,6 @@ int lbs_set_radio(struct lbs_private *priv, u8 preamble, u8 radio_on)
1310 if (priv->fwrelease < 0x09000000) { 843 if (priv->fwrelease < 0x09000000) {
1311 switch (preamble) { 844 switch (preamble) {
1312 case RADIO_PREAMBLE_SHORT: 845 case RADIO_PREAMBLE_SHORT:
1313 if (!(priv->capability & WLAN_CAPABILITY_SHORT_PREAMBLE))
1314 goto out;
1315 /* Fall through */
1316 case RADIO_PREAMBLE_AUTO: 846 case RADIO_PREAMBLE_AUTO:
1317 case RADIO_PREAMBLE_LONG: 847 case RADIO_PREAMBLE_LONG:
1318 cmd.control = cpu_to_le16(preamble); 848 cmd.control = cpu_to_le16(preamble);
@@ -1391,6 +921,11 @@ int lbs_prepare_and_send_command(struct lbs_private *priv,
1391 goto done; 921 goto done;
1392 } 922 }
1393 923
924 if (!lbs_is_cmd_allowed(priv)) {
925 ret = -EBUSY;
926 goto done;
927 }
928
1394 cmdnode = lbs_get_cmd_ctrl_node(priv); 929 cmdnode = lbs_get_cmd_ctrl_node(priv);
1395 930
1396 if (cmdnode == NULL) { 931 if (cmdnode == NULL) {
@@ -1441,7 +976,7 @@ int lbs_prepare_and_send_command(struct lbs_private *priv,
1441 976
1442 cmdptr->command = cpu_to_le16(cmd_no); 977 cmdptr->command = cpu_to_le16(cmd_no);
1443 cmdptr->size = cpu_to_le16(sizeof(struct cmd_ds_802_11_afc) + 978 cmdptr->size = cpu_to_le16(sizeof(struct cmd_ds_802_11_afc) +
1444 S_DS_GEN); 979 sizeof(struct cmd_header));
1445 980
1446 memmove(&cmdptr->params.afc, 981 memmove(&cmdptr->params.afc,
1447 pdata_buf, sizeof(struct cmd_ds_802_11_afc)); 982 pdata_buf, sizeof(struct cmd_ds_802_11_afc));
@@ -1449,45 +984,19 @@ int lbs_prepare_and_send_command(struct lbs_private *priv,
1449 ret = 0; 984 ret = 0;
1450 goto done; 985 goto done;
1451 986
1452 case CMD_802_11D_DOMAIN_INFO:
1453 ret = lbs_cmd_802_11d_domain_info(priv, cmdptr,
1454 cmd_no, cmd_action);
1455 break;
1456
1457 case CMD_802_11_TPC_CFG: 987 case CMD_802_11_TPC_CFG:
1458 cmdptr->command = cpu_to_le16(CMD_802_11_TPC_CFG); 988 cmdptr->command = cpu_to_le16(CMD_802_11_TPC_CFG);
1459 cmdptr->size = 989 cmdptr->size =
1460 cpu_to_le16(sizeof(struct cmd_ds_802_11_tpc_cfg) + 990 cpu_to_le16(sizeof(struct cmd_ds_802_11_tpc_cfg) +
1461 S_DS_GEN); 991 sizeof(struct cmd_header));
1462 992
1463 memmove(&cmdptr->params.tpccfg, 993 memmove(&cmdptr->params.tpccfg,
1464 pdata_buf, sizeof(struct cmd_ds_802_11_tpc_cfg)); 994 pdata_buf, sizeof(struct cmd_ds_802_11_tpc_cfg));
1465 995
1466 ret = 0; 996 ret = 0;
1467 break; 997 break;
1468 case CMD_802_11_LED_GPIO_CTRL:
1469 {
1470 struct mrvl_ie_ledgpio *gpio =
1471 (struct mrvl_ie_ledgpio*)
1472 cmdptr->params.ledgpio.data;
1473
1474 memmove(&cmdptr->params.ledgpio,
1475 pdata_buf,
1476 sizeof(struct cmd_ds_802_11_led_ctrl));
1477 998
1478 cmdptr->command = 999#ifdef CONFIG_LIBERTAS_MESH
1479 cpu_to_le16(CMD_802_11_LED_GPIO_CTRL);
1480
1481#define ACTION_NUMLED_TLVTYPE_LEN_FIELDS_LEN 8
1482 cmdptr->size =
1483 cpu_to_le16(le16_to_cpu(gpio->header.len)
1484 + S_DS_GEN
1485 + ACTION_NUMLED_TLVTYPE_LEN_FIELDS_LEN);
1486 gpio->header.len = gpio->header.len;
1487
1488 ret = 0;
1489 break;
1490 }
1491 1000
1492 case CMD_BT_ACCESS: 1001 case CMD_BT_ACCESS:
1493 ret = lbs_cmd_bt_access(cmdptr, cmd_action, pdata_buf); 1002 ret = lbs_cmd_bt_access(cmdptr, cmd_action, pdata_buf);
@@ -1497,15 +1006,15 @@ int lbs_prepare_and_send_command(struct lbs_private *priv,
1497 ret = lbs_cmd_fwt_access(cmdptr, cmd_action, pdata_buf); 1006 ret = lbs_cmd_fwt_access(cmdptr, cmd_action, pdata_buf);
1498 break; 1007 break;
1499 1008
1500 case CMD_GET_TSF: 1009#endif
1501 cmdptr->command = cpu_to_le16(CMD_GET_TSF); 1010
1502 cmdptr->size = cpu_to_le16(sizeof(struct cmd_ds_get_tsf) +
1503 S_DS_GEN);
1504 ret = 0;
1505 break;
1506 case CMD_802_11_BEACON_CTRL: 1011 case CMD_802_11_BEACON_CTRL:
1507 ret = lbs_cmd_bcn_ctrl(priv, cmdptr, cmd_action); 1012 ret = lbs_cmd_bcn_ctrl(priv, cmdptr, cmd_action);
1508 break; 1013 break;
1014 case CMD_802_11_DEEP_SLEEP:
1015 cmdptr->command = cpu_to_le16(CMD_802_11_DEEP_SLEEP);
1016 cmdptr->size = cpu_to_le16(sizeof(struct cmd_header));
1017 break;
1509 default: 1018 default:
1510 lbs_pr_err("PREP_CMD: unknown command 0x%04x\n", cmd_no); 1019 lbs_pr_err("PREP_CMD: unknown command 0x%04x\n", cmd_no);
1511 ret = -1; 1020 ret = -1;
@@ -1797,7 +1306,7 @@ int lbs_execute_next_command(struct lbs_private *priv)
1797 if ((priv->psmode != LBS802_11POWERMODECAM) && 1306 if ((priv->psmode != LBS802_11POWERMODECAM) &&
1798 (priv->psstate == PS_STATE_FULL_POWER) && 1307 (priv->psstate == PS_STATE_FULL_POWER) &&
1799 ((priv->connect_status == LBS_CONNECTED) || 1308 ((priv->connect_status == LBS_CONNECTED) ||
1800 (priv->mesh_connect_status == LBS_CONNECTED))) { 1309 lbs_mesh_connected(priv))) {
1801 if (priv->secinfo.WPAenabled || 1310 if (priv->secinfo.WPAenabled ||
1802 priv->secinfo.WPA2enabled) { 1311 priv->secinfo.WPA2enabled) {
1803 /* check for valid WPA group keys */ 1312 /* check for valid WPA group keys */
@@ -1823,30 +1332,6 @@ done:
1823 return ret; 1332 return ret;
1824} 1333}
1825 1334
1826void lbs_send_iwevcustom_event(struct lbs_private *priv, s8 *str)
1827{
1828 union iwreq_data iwrq;
1829 u8 buf[50];
1830
1831 lbs_deb_enter(LBS_DEB_WEXT);
1832
1833 memset(&iwrq, 0, sizeof(union iwreq_data));
1834 memset(buf, 0, sizeof(buf));
1835
1836 snprintf(buf, sizeof(buf) - 1, "%s", str);
1837
1838 iwrq.data.length = strlen(buf) + 1 + IW_EV_LCP_LEN;
1839
1840 /* Send Event to upper layer */
1841 lbs_deb_wext("event indication string %s\n", (char *)buf);
1842 lbs_deb_wext("event indication length %d\n", iwrq.data.length);
1843 lbs_deb_wext("sending wireless event IWEVCUSTOM for %s\n", str);
1844
1845 wireless_send_event(priv->dev, IWEVCUSTOM, &iwrq, buf);
1846
1847 lbs_deb_leave(LBS_DEB_WEXT);
1848}
1849
1850static void lbs_send_confirmsleep(struct lbs_private *priv) 1335static void lbs_send_confirmsleep(struct lbs_private *priv)
1851{ 1336{
1852 unsigned long flags; 1337 unsigned long flags;
@@ -1869,7 +1354,7 @@ static void lbs_send_confirmsleep(struct lbs_private *priv)
1869 priv->dnld_sent = DNLD_RES_RECEIVED; 1354 priv->dnld_sent = DNLD_RES_RECEIVED;
1870 1355
1871 /* If nothing to do, go back to sleep (?) */ 1356 /* If nothing to do, go back to sleep (?) */
1872 if (!__kfifo_len(priv->event_fifo) && !priv->resp_len[priv->resp_idx]) 1357 if (!kfifo_len(&priv->event_fifo) && !priv->resp_len[priv->resp_idx])
1873 priv->psstate = PS_STATE_SLEEP; 1358 priv->psstate = PS_STATE_SLEEP;
1874 1359
1875 spin_unlock_irqrestore(&priv->driver_lock, flags); 1360 spin_unlock_irqrestore(&priv->driver_lock, flags);
@@ -1943,7 +1428,7 @@ void lbs_ps_confirm_sleep(struct lbs_private *priv)
1943 } 1428 }
1944 1429
1945 /* Pending events or command responses? */ 1430 /* Pending events or command responses? */
1946 if (__kfifo_len(priv->event_fifo) || priv->resp_len[priv->resp_idx]) { 1431 if (kfifo_len(&priv->event_fifo) || priv->resp_len[priv->resp_idx]) {
1947 allowed = 0; 1432 allowed = 0;
1948 lbs_deb_host("pending events or command responses\n"); 1433 lbs_deb_host("pending events or command responses\n");
1949 } 1434 }
@@ -2024,7 +1509,7 @@ int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0,
2024} 1509}
2025 1510
2026 1511
2027static struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv, 1512struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv,
2028 uint16_t command, struct cmd_header *in_cmd, int in_cmd_size, 1513 uint16_t command, struct cmd_header *in_cmd, int in_cmd_size,
2029 int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), 1514 int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *),
2030 unsigned long callback_arg) 1515 unsigned long callback_arg)
@@ -2039,6 +1524,11 @@ static struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv,
2039 goto done; 1524 goto done;
2040 } 1525 }
2041 1526
1527 if (!lbs_is_cmd_allowed(priv)) {
1528 cmdnode = ERR_PTR(-EBUSY);
1529 goto done;
1530 }
1531
2042 cmdnode = lbs_get_cmd_ctrl_node(priv); 1532 cmdnode = lbs_get_cmd_ctrl_node(priv);
2043 if (cmdnode == NULL) { 1533 if (cmdnode == NULL) {
2044 lbs_deb_host("PREP_CMD: cmdnode is NULL\n"); 1534 lbs_deb_host("PREP_CMD: cmdnode is NULL\n");
@@ -2117,5 +1607,3 @@ done:
2117 return ret; 1607 return ret;
2118} 1608}
2119EXPORT_SYMBOL_GPL(__lbs_cmd); 1609EXPORT_SYMBOL_GPL(__lbs_cmd);
2120
2121
diff --git a/drivers/net/wireless/libertas/cmd.h b/drivers/net/wireless/libertas/cmd.h
index 392e578ca095..cb4138a55fdf 100644
--- a/drivers/net/wireless/libertas/cmd.h
+++ b/drivers/net/wireless/libertas/cmd.h
@@ -3,11 +3,30 @@
3#ifndef _LBS_CMD_H_ 3#ifndef _LBS_CMD_H_
4#define _LBS_CMD_H_ 4#define _LBS_CMD_H_
5 5
6#include "hostcmd.h" 6#include "host.h"
7#include "dev.h" 7#include "dev.h"
8 8
9
10/* Command & response transfer between host and card */
11
12struct cmd_ctrl_node {
13 struct list_head list;
14 int result;
15 /* command response */
16 int (*callback)(struct lbs_private *,
17 unsigned long,
18 struct cmd_header *);
19 unsigned long callback_arg;
20 /* command data */
21 struct cmd_header *cmdbuf;
22 /* wait queue */
23 u16 cmdwaitqwoken;
24 wait_queue_head_t cmdwait_q;
25};
26
27
9/* lbs_cmd() infers the size of the buffer to copy data back into, from 28/* lbs_cmd() infers the size of the buffer to copy data back into, from
10 the size of the target of the pointer. Since the command to be sent 29 the size of the target of the pointer. Since the command to be sent
11 may often be smaller, that size is set in cmd->size by the caller.*/ 30 may often be smaller, that size is set in cmd->size by the caller.*/
12#define lbs_cmd(priv, cmdnr, cmd, cb, cb_arg) ({ \ 31#define lbs_cmd(priv, cmdnr, cmd, cb, cb_arg) ({ \
13 uint16_t __sz = le16_to_cpu((cmd)->hdr.size); \ 32 uint16_t __sz = le16_to_cpu((cmd)->hdr.size); \
@@ -18,6 +37,11 @@
18#define lbs_cmd_with_response(priv, cmdnr, cmd) \ 37#define lbs_cmd_with_response(priv, cmdnr, cmd) \
19 lbs_cmd(priv, cmdnr, cmd, lbs_cmd_copyback, (unsigned long) (cmd)) 38 lbs_cmd(priv, cmdnr, cmd, lbs_cmd_copyback, (unsigned long) (cmd))
20 39
40int lbs_prepare_and_send_command(struct lbs_private *priv,
41 u16 cmd_no,
42 u16 cmd_action,
43 u16 wait_option, u32 cmd_oid, void *pdata_buf);
44
21void lbs_cmd_async(struct lbs_private *priv, uint16_t command, 45void lbs_cmd_async(struct lbs_private *priv, uint16_t command,
22 struct cmd_header *in_cmd, int in_cmd_size); 46 struct cmd_header *in_cmd, int in_cmd_size);
23 47
@@ -26,62 +50,81 @@ int __lbs_cmd(struct lbs_private *priv, uint16_t command,
26 int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *), 50 int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *),
27 unsigned long callback_arg); 51 unsigned long callback_arg);
28 52
29int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0, 53struct cmd_ctrl_node *__lbs_cmd_async(struct lbs_private *priv,
30 int8_t p1, int8_t p2); 54 uint16_t command, struct cmd_header *in_cmd, int in_cmd_size,
55 int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *),
56 unsigned long callback_arg);
31 57
32int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1, 58int lbs_cmd_copyback(struct lbs_private *priv, unsigned long extra,
33 int8_t p2, int usesnr); 59 struct cmd_header *resp);
34 60
35int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0, 61int lbs_allocate_cmd_buffer(struct lbs_private *priv);
36 int8_t p1, int8_t p2); 62int lbs_free_cmd_buffer(struct lbs_private *priv);
37 63
38int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1, 64int lbs_execute_next_command(struct lbs_private *priv);
39 int8_t p2, int usesnr); 65void lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd,
66 int result);
67int lbs_process_command_response(struct lbs_private *priv, u8 *data, u32 len);
40 68
41int lbs_cmd_copyback(struct lbs_private *priv, unsigned long extra,
42 struct cmd_header *resp);
43 69
44int lbs_update_hw_spec(struct lbs_private *priv); 70/* From cmdresp.c */
45 71
46int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action, 72void lbs_mac_event_disconnected(struct lbs_private *priv);
47 struct cmd_ds_mesh_access *cmd);
48 73
49int lbs_set_data_rate(struct lbs_private *priv, u8 rate);
50 74
51int lbs_get_channel(struct lbs_private *priv); 75
76/* Events */
77
78int lbs_process_event(struct lbs_private *priv, u32 event);
79
80
81/* Actual commands */
82
83int lbs_update_hw_spec(struct lbs_private *priv);
84
52int lbs_set_channel(struct lbs_private *priv, u8 channel); 85int lbs_set_channel(struct lbs_private *priv, u8 channel);
53 86
54int lbs_mesh_config_send(struct lbs_private *priv, 87int lbs_update_channel(struct lbs_private *priv);
55 struct cmd_ds_mesh_config *cmd,
56 uint16_t action, uint16_t type);
57int lbs_mesh_config(struct lbs_private *priv, uint16_t enable, uint16_t chan);
58 88
59int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria, 89int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria,
60 struct wol_config *p_wol_config); 90 struct wol_config *p_wol_config);
61int lbs_suspend(struct lbs_private *priv);
62void lbs_resume(struct lbs_private *priv);
63 91
64int lbs_cmd_802_11_rate_adapt_rateset(struct lbs_private *priv,
65 uint16_t cmd_action);
66int lbs_cmd_802_11_inactivity_timeout(struct lbs_private *priv,
67 uint16_t cmd_action, uint16_t *timeout);
68int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action, 92int lbs_cmd_802_11_sleep_params(struct lbs_private *priv, uint16_t cmd_action,
69 struct sleep_params *sp); 93 struct sleep_params *sp);
70int lbs_cmd_802_11_set_wep(struct lbs_private *priv, uint16_t cmd_action,
71 struct assoc_request *assoc);
72int lbs_cmd_802_11_enable_rsn(struct lbs_private *priv, uint16_t cmd_action,
73 uint16_t *enable);
74int lbs_cmd_802_11_key_material(struct lbs_private *priv, uint16_t cmd_action,
75 struct assoc_request *assoc);
76 94
77int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel, 95void lbs_ps_sleep(struct lbs_private *priv, int wait_option);
78 s16 *maxlevel); 96
79int lbs_set_tx_power(struct lbs_private *priv, s16 dbm); 97void lbs_ps_wakeup(struct lbs_private *priv, int wait_option);
98
99void lbs_ps_confirm_sleep(struct lbs_private *priv);
80 100
81int lbs_set_radio(struct lbs_private *priv, u8 preamble, u8 radio_on); 101int lbs_set_radio(struct lbs_private *priv, u8 preamble, u8 radio_on);
82 102
103void lbs_set_mac_control(struct lbs_private *priv);
104
105int lbs_get_tx_power(struct lbs_private *priv, s16 *curlevel, s16 *minlevel,
106 s16 *maxlevel);
107
83int lbs_set_snmp_mib(struct lbs_private *priv, u32 oid, u16 val); 108int lbs_set_snmp_mib(struct lbs_private *priv, u32 oid, u16 val);
84 109
85int lbs_get_snmp_mib(struct lbs_private *priv, u32 oid, u16 *out_val); 110int lbs_get_snmp_mib(struct lbs_private *priv, u32 oid, u16 *out_val);
86 111
112
113/* Commands only used in wext.c, assoc. and scan.c */
114
115int lbs_set_power_adapt_cfg(struct lbs_private *priv, int enable, int8_t p0,
116 int8_t p1, int8_t p2);
117
118int lbs_set_tpc_cfg(struct lbs_private *priv, int enable, int8_t p0, int8_t p1,
119 int8_t p2, int usesnr);
120
121int lbs_set_data_rate(struct lbs_private *priv, u8 rate);
122
123int lbs_cmd_802_11_rate_adapt_rateset(struct lbs_private *priv,
124 uint16_t cmd_action);
125
126int lbs_set_tx_power(struct lbs_private *priv, s16 dbm);
127
128int lbs_set_deep_sleep(struct lbs_private *priv, int deep_sleep);
129
87#endif /* _LBS_CMD_H */ 130#endif /* _LBS_CMD_H */
diff --git a/drivers/net/wireless/libertas/cmdresp.c b/drivers/net/wireless/libertas/cmdresp.c
index 23f684337fdd..88f7131d66e9 100644
--- a/drivers/net/wireless/libertas/cmdresp.c
+++ b/drivers/net/wireless/libertas/cmdresp.c
@@ -2,6 +2,7 @@
2 * This file contains the handling of command 2 * This file contains the handling of command
3 * responses as well as events generated by firmware. 3 * responses as well as events generated by firmware.
4 */ 4 */
5#include <linux/slab.h>
5#include <linux/delay.h> 6#include <linux/delay.h>
6#include <linux/sched.h> 7#include <linux/sched.h>
7#include <linux/if_arp.h> 8#include <linux/if_arp.h>
@@ -11,6 +12,7 @@
11 12
12#include "host.h" 13#include "host.h"
13#include "decl.h" 14#include "decl.h"
15#include "cmd.h"
14#include "defs.h" 16#include "defs.h"
15#include "dev.h" 17#include "dev.h"
16#include "assoc.h" 18#include "assoc.h"
@@ -26,23 +28,17 @@
26 */ 28 */
27void lbs_mac_event_disconnected(struct lbs_private *priv) 29void lbs_mac_event_disconnected(struct lbs_private *priv)
28{ 30{
29 union iwreq_data wrqu;
30
31 if (priv->connect_status != LBS_CONNECTED) 31 if (priv->connect_status != LBS_CONNECTED)
32 return; 32 return;
33 33
34 lbs_deb_enter(LBS_DEB_ASSOC); 34 lbs_deb_enter(LBS_DEB_ASSOC);
35 35
36 memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN);
37 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
38
39 /* 36 /*
40 * Cisco AP sends EAP failure and de-auth in less than 0.5 ms. 37 * Cisco AP sends EAP failure and de-auth in less than 0.5 ms.
41 * It causes problem in the Supplicant 38 * It causes problem in the Supplicant
42 */ 39 */
43
44 msleep_interruptible(1000); 40 msleep_interruptible(1000);
45 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL); 41 lbs_send_disconnect_notification(priv);
46 42
47 /* report disconnect to upper layer */ 43 /* report disconnect to upper layer */
48 netif_stop_queue(priv->dev); 44 netif_stop_queue(priv->dev);
@@ -67,7 +63,7 @@ void lbs_mac_event_disconnected(struct lbs_private *priv)
67 * no longer valid. 63 * no longer valid.
68 */ 64 */
69 memset(&priv->curbssparams.bssid, 0, ETH_ALEN); 65 memset(&priv->curbssparams.bssid, 0, ETH_ALEN);
70 memset(&priv->curbssparams.ssid, 0, IW_ESSID_MAX_SIZE); 66 memset(&priv->curbssparams.ssid, 0, IEEE80211_MAX_SSID_LEN);
71 priv->curbssparams.ssid_len = 0; 67 priv->curbssparams.ssid_len = 0;
72 68
73 if (priv->psstate != PS_STATE_FULL_POWER) { 69 if (priv->psstate != PS_STATE_FULL_POWER) {
@@ -78,32 +74,6 @@ void lbs_mac_event_disconnected(struct lbs_private *priv)
78 lbs_deb_leave(LBS_DEB_ASSOC); 74 lbs_deb_leave(LBS_DEB_ASSOC);
79} 75}
80 76
81/**
82 * @brief This function handles MIC failure event.
83 *
84 * @param priv A pointer to struct lbs_private structure
85 * @para event the event id
86 * @return n/a
87 */
88static void handle_mic_failureevent(struct lbs_private *priv, u32 event)
89{
90 char buf[50];
91
92 lbs_deb_enter(LBS_DEB_CMD);
93 memset(buf, 0, sizeof(buf));
94
95 sprintf(buf, "%s", "MLME-MICHAELMICFAILURE.indication ");
96
97 if (event == MACREG_INT_CODE_MIC_ERR_UNICAST) {
98 strcat(buf, "unicast ");
99 } else {
100 strcat(buf, "multicast ");
101 }
102
103 lbs_send_iwevcustom_event(priv, buf);
104 lbs_deb_leave(LBS_DEB_CMD);
105}
106
107static int lbs_ret_reg_access(struct lbs_private *priv, 77static int lbs_ret_reg_access(struct lbs_private *priv,
108 u16 type, struct cmd_ds_command *resp) 78 u16 type, struct cmd_ds_command *resp)
109{ 79{
@@ -147,53 +117,6 @@ static int lbs_ret_reg_access(struct lbs_private *priv,
147 return ret; 117 return ret;
148} 118}
149 119
150static int lbs_ret_802_11_rssi(struct lbs_private *priv,
151 struct cmd_ds_command *resp)
152{
153 struct cmd_ds_802_11_rssi_rsp *rssirsp = &resp->params.rssirsp;
154
155 lbs_deb_enter(LBS_DEB_CMD);
156
157 /* store the non average value */
158 priv->SNR[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->SNR);
159 priv->NF[TYPE_BEACON][TYPE_NOAVG] = get_unaligned_le16(&rssirsp->noisefloor);
160
161 priv->SNR[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgSNR);
162 priv->NF[TYPE_BEACON][TYPE_AVG] = get_unaligned_le16(&rssirsp->avgnoisefloor);
163
164 priv->RSSI[TYPE_BEACON][TYPE_NOAVG] =
165 CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_NOAVG],
166 priv->NF[TYPE_BEACON][TYPE_NOAVG]);
167
168 priv->RSSI[TYPE_BEACON][TYPE_AVG] =
169 CAL_RSSI(priv->SNR[TYPE_BEACON][TYPE_AVG] / AVG_SCALE,
170 priv->NF[TYPE_BEACON][TYPE_AVG] / AVG_SCALE);
171
172 lbs_deb_cmd("RSSI: beacon %d, avg %d\n",
173 priv->RSSI[TYPE_BEACON][TYPE_NOAVG],
174 priv->RSSI[TYPE_BEACON][TYPE_AVG]);
175
176 lbs_deb_leave(LBS_DEB_CMD);
177 return 0;
178}
179
180static int lbs_ret_802_11_bcn_ctrl(struct lbs_private * priv,
181 struct cmd_ds_command *resp)
182{
183 struct cmd_ds_802_11_beacon_control *bcn_ctrl =
184 &resp->params.bcn_ctrl;
185
186 lbs_deb_enter(LBS_DEB_CMD);
187
188 if (bcn_ctrl->action == CMD_ACT_GET) {
189 priv->beacon_enable = (u8) le16_to_cpu(bcn_ctrl->beacon_enable);
190 priv->beacon_period = le16_to_cpu(bcn_ctrl->beacon_period);
191 }
192
193 lbs_deb_enter(LBS_DEB_CMD);
194 return 0;
195}
196
197static inline int handle_cmd_response(struct lbs_private *priv, 120static inline int handle_cmd_response(struct lbs_private *priv,
198 struct cmd_header *cmd_response) 121 struct cmd_header *cmd_response)
199{ 122{
@@ -227,29 +150,13 @@ static inline int handle_cmd_response(struct lbs_private *priv,
227 ret = lbs_ret_802_11_rssi(priv, resp); 150 ret = lbs_ret_802_11_rssi(priv, resp);
228 break; 151 break;
229 152
230 case CMD_RET(CMD_802_11D_DOMAIN_INFO):
231 ret = lbs_ret_802_11d_domain_info(resp);
232 break;
233
234 case CMD_RET(CMD_802_11_TPC_CFG): 153 case CMD_RET(CMD_802_11_TPC_CFG):
235 spin_lock_irqsave(&priv->driver_lock, flags); 154 spin_lock_irqsave(&priv->driver_lock, flags);
236 memmove((void *)priv->cur_cmd->callback_arg, &resp->params.tpccfg, 155 memmove((void *)priv->cur_cmd->callback_arg, &resp->params.tpccfg,
237 sizeof(struct cmd_ds_802_11_tpc_cfg)); 156 sizeof(struct cmd_ds_802_11_tpc_cfg));
238 spin_unlock_irqrestore(&priv->driver_lock, flags); 157 spin_unlock_irqrestore(&priv->driver_lock, flags);
239 break; 158 break;
240 case CMD_RET(CMD_802_11_LED_GPIO_CTRL):
241 spin_lock_irqsave(&priv->driver_lock, flags);
242 memmove((void *)priv->cur_cmd->callback_arg, &resp->params.ledgpio,
243 sizeof(struct cmd_ds_802_11_led_ctrl));
244 spin_unlock_irqrestore(&priv->driver_lock, flags);
245 break;
246 159
247 case CMD_RET(CMD_GET_TSF):
248 spin_lock_irqsave(&priv->driver_lock, flags);
249 memcpy((void *)priv->cur_cmd->callback_arg,
250 &resp->params.gettsf.tsfvalue, sizeof(u64));
251 spin_unlock_irqrestore(&priv->driver_lock, flags);
252 break;
253 case CMD_RET(CMD_BT_ACCESS): 160 case CMD_RET(CMD_BT_ACCESS):
254 spin_lock_irqsave(&priv->driver_lock, flags); 161 spin_lock_irqsave(&priv->driver_lock, flags);
255 if (priv->cur_cmd->callback_arg) 162 if (priv->cur_cmd->callback_arg)
@@ -334,11 +241,6 @@ int lbs_process_command_response(struct lbs_private *priv, u8 *data, u32 len)
334 /* Now we got response from FW, cancel the command timer */ 241 /* Now we got response from FW, cancel the command timer */
335 del_timer(&priv->command_timer); 242 del_timer(&priv->command_timer);
336 priv->cmd_timed_out = 0; 243 priv->cmd_timed_out = 0;
337 if (priv->nr_retries) {
338 lbs_pr_info("Received result %x to command %x after %d retries\n",
339 result, curcmd, priv->nr_retries);
340 priv->nr_retries = 0;
341 }
342 244
343 /* Store the response code to cur_cmd_retcode. */ 245 /* Store the response code to cur_cmd_retcode. */
344 priv->cur_cmd_retcode = result; 246 priv->cur_cmd_retcode = result;
@@ -505,9 +407,21 @@ int lbs_process_event(struct lbs_private *priv, u32 event)
505 407
506 case MACREG_INT_CODE_HOST_AWAKE: 408 case MACREG_INT_CODE_HOST_AWAKE:
507 lbs_deb_cmd("EVENT: host awake\n"); 409 lbs_deb_cmd("EVENT: host awake\n");
410 if (priv->reset_deep_sleep_wakeup)
411 priv->reset_deep_sleep_wakeup(priv);
412 priv->is_deep_sleep = 0;
508 lbs_send_confirmwake(priv); 413 lbs_send_confirmwake(priv);
509 break; 414 break;
510 415
416 case MACREG_INT_CODE_DEEP_SLEEP_AWAKE:
417 if (priv->reset_deep_sleep_wakeup)
418 priv->reset_deep_sleep_wakeup(priv);
419 lbs_deb_cmd("EVENT: ds awake\n");
420 priv->is_deep_sleep = 0;
421 priv->wakeup_dev_required = 0;
422 wake_up_interruptible(&priv->ds_awake_q);
423 break;
424
511 case MACREG_INT_CODE_PS_AWAKE: 425 case MACREG_INT_CODE_PS_AWAKE:
512 lbs_deb_cmd("EVENT: ps awake\n"); 426 lbs_deb_cmd("EVENT: ps awake\n");
513 /* handle unexpected PS AWAKE event */ 427 /* handle unexpected PS AWAKE event */
@@ -533,12 +447,12 @@ int lbs_process_event(struct lbs_private *priv, u32 event)
533 447
534 case MACREG_INT_CODE_MIC_ERR_UNICAST: 448 case MACREG_INT_CODE_MIC_ERR_UNICAST:
535 lbs_deb_cmd("EVENT: UNICAST MIC ERROR\n"); 449 lbs_deb_cmd("EVENT: UNICAST MIC ERROR\n");
536 handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_UNICAST); 450 lbs_send_mic_failureevent(priv, event);
537 break; 451 break;
538 452
539 case MACREG_INT_CODE_MIC_ERR_MULTICAST: 453 case MACREG_INT_CODE_MIC_ERR_MULTICAST:
540 lbs_deb_cmd("EVENT: MULTICAST MIC ERROR\n"); 454 lbs_deb_cmd("EVENT: MULTICAST MIC ERROR\n");
541 handle_mic_failureevent(priv, MACREG_INT_CODE_MIC_ERR_MULTICAST); 455 lbs_send_mic_failureevent(priv, event);
542 break; 456 break;
543 457
544 case MACREG_INT_CODE_MIB_CHANGED: 458 case MACREG_INT_CODE_MIB_CHANGED:
@@ -567,20 +481,8 @@ int lbs_process_event(struct lbs_private *priv, u32 event)
567 break; 481 break;
568 482
569 case MACREG_INT_CODE_MESH_AUTO_STARTED: 483 case MACREG_INT_CODE_MESH_AUTO_STARTED:
570 /* Ignore spurious autostart events if autostart is disabled */ 484 /* Ignore spurious autostart events */
571 if (!priv->mesh_autostart_enabled) { 485 lbs_pr_info("EVENT: MESH_AUTO_STARTED (ignoring)\n");
572 lbs_pr_info("EVENT: MESH_AUTO_STARTED (ignoring)\n");
573 break;
574 }
575 lbs_pr_info("EVENT: MESH_AUTO_STARTED\n");
576 priv->mesh_connect_status = LBS_CONNECTED;
577 if (priv->mesh_open) {
578 netif_carrier_on(priv->mesh_dev);
579 if (!priv->tx_pending_len)
580 netif_wake_queue(priv->mesh_dev);
581 }
582 priv->mode = IW_MODE_ADHOC;
583 schedule_work(&priv->sync_channel);
584 break; 486 break;
585 487
586 default: 488 default:
diff --git a/drivers/net/wireless/libertas/debugfs.c b/drivers/net/wireless/libertas/debugfs.c
index 893a55ca344a..a48ccaffb288 100644
--- a/drivers/net/wireless/libertas/debugfs.c
+++ b/drivers/net/wireless/libertas/debugfs.c
@@ -4,6 +4,7 @@
4#include <linux/delay.h> 4#include <linux/delay.h>
5#include <linux/mm.h> 5#include <linux/mm.h>
6#include <linux/string.h> 6#include <linux/string.h>
7#include <linux/slab.h>
7#include <net/iw_handler.h> 8#include <net/iw_handler.h>
8#include <net/lib80211.h> 9#include <net/lib80211.h>
9 10
@@ -451,10 +452,12 @@ static ssize_t lbs_rdmac_read(struct file *file, char __user *userbuf,
451 CMD_MAC_REG_ACCESS, 0, 452 CMD_MAC_REG_ACCESS, 0,
452 CMD_OPTION_WAITFORRSP, 0, &offval); 453 CMD_OPTION_WAITFORRSP, 0, &offval);
453 mdelay(10); 454 mdelay(10);
454 pos += snprintf(buf+pos, len-pos, "MAC[0x%x] = 0x%08x\n", 455 if (!ret) {
456 pos += snprintf(buf+pos, len-pos, "MAC[0x%x] = 0x%08x\n",
455 priv->mac_offset, priv->offsetvalue.value); 457 priv->mac_offset, priv->offsetvalue.value);
456 458
457 ret = simple_read_from_buffer(userbuf, count, ppos, buf, pos); 459 ret = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
460 }
458 free_page(addr); 461 free_page(addr);
459 return ret; 462 return ret;
460} 463}
@@ -514,7 +517,8 @@ static ssize_t lbs_wrmac_write(struct file *file,
514 CMD_OPTION_WAITFORRSP, 0, &offval); 517 CMD_OPTION_WAITFORRSP, 0, &offval);
515 mdelay(10); 518 mdelay(10);
516 519
517 res = count; 520 if (!res)
521 res = count;
518out_unlock: 522out_unlock:
519 free_page(addr); 523 free_page(addr);
520 return res; 524 return res;
@@ -539,10 +543,12 @@ static ssize_t lbs_rdbbp_read(struct file *file, char __user *userbuf,
539 CMD_BBP_REG_ACCESS, 0, 543 CMD_BBP_REG_ACCESS, 0,
540 CMD_OPTION_WAITFORRSP, 0, &offval); 544 CMD_OPTION_WAITFORRSP, 0, &offval);
541 mdelay(10); 545 mdelay(10);
542 pos += snprintf(buf+pos, len-pos, "BBP[0x%x] = 0x%08x\n", 546 if (!ret) {
547 pos += snprintf(buf+pos, len-pos, "BBP[0x%x] = 0x%08x\n",
543 priv->bbp_offset, priv->offsetvalue.value); 548 priv->bbp_offset, priv->offsetvalue.value);
544 549
545 ret = simple_read_from_buffer(userbuf, count, ppos, buf, pos); 550 ret = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
551 }
546 free_page(addr); 552 free_page(addr);
547 553
548 return ret; 554 return ret;
@@ -603,7 +609,8 @@ static ssize_t lbs_wrbbp_write(struct file *file,
603 CMD_OPTION_WAITFORRSP, 0, &offval); 609 CMD_OPTION_WAITFORRSP, 0, &offval);
604 mdelay(10); 610 mdelay(10);
605 611
606 res = count; 612 if (!res)
613 res = count;
607out_unlock: 614out_unlock:
608 free_page(addr); 615 free_page(addr);
609 return res; 616 return res;
@@ -628,10 +635,12 @@ static ssize_t lbs_rdrf_read(struct file *file, char __user *userbuf,
628 CMD_RF_REG_ACCESS, 0, 635 CMD_RF_REG_ACCESS, 0,
629 CMD_OPTION_WAITFORRSP, 0, &offval); 636 CMD_OPTION_WAITFORRSP, 0, &offval);
630 mdelay(10); 637 mdelay(10);
631 pos += snprintf(buf+pos, len-pos, "RF[0x%x] = 0x%08x\n", 638 if (!ret) {
639 pos += snprintf(buf+pos, len-pos, "RF[0x%x] = 0x%08x\n",
632 priv->rf_offset, priv->offsetvalue.value); 640 priv->rf_offset, priv->offsetvalue.value);
633 641
634 ret = simple_read_from_buffer(userbuf, count, ppos, buf, pos); 642 ret = simple_read_from_buffer(userbuf, count, ppos, buf, pos);
643 }
635 free_page(addr); 644 free_page(addr);
636 645
637 return ret; 646 return ret;
@@ -692,7 +701,8 @@ static ssize_t lbs_wrrf_write(struct file *file,
692 CMD_OPTION_WAITFORRSP, 0, &offval); 701 CMD_OPTION_WAITFORRSP, 0, &offval);
693 mdelay(10); 702 mdelay(10);
694 703
695 res = count; 704 if (!res)
705 res = count;
696out_unlock: 706out_unlock:
697 free_page(addr); 707 free_page(addr);
698 return res; 708 return res;
diff --git a/drivers/net/wireless/libertas/decl.h b/drivers/net/wireless/libertas/decl.h
index 8b15380ae6e1..709ffcad22ad 100644
--- a/drivers/net/wireless/libertas/decl.h
+++ b/drivers/net/wireless/libertas/decl.h
@@ -8,71 +8,46 @@
8 8
9#include <linux/netdevice.h> 9#include <linux/netdevice.h>
10 10
11#include "defs.h"
12 11
13/** Function Prototype Declaration */
14struct lbs_private; 12struct lbs_private;
15struct sk_buff; 13struct sk_buff;
16struct net_device; 14struct net_device;
17struct cmd_ctrl_node;
18struct cmd_ds_command;
19 15
20void lbs_set_mac_control(struct lbs_private *priv);
21 16
22void lbs_send_tx_feedback(struct lbs_private *priv, u32 try_count); 17/* ethtool.c */
23 18extern const struct ethtool_ops lbs_ethtool_ops;
24int lbs_free_cmd_buffer(struct lbs_private *priv);
25
26int lbs_prepare_and_send_command(struct lbs_private *priv,
27 u16 cmd_no,
28 u16 cmd_action,
29 u16 wait_option, u32 cmd_oid, void *pdata_buf);
30 19
31int lbs_allocate_cmd_buffer(struct lbs_private *priv);
32int lbs_execute_next_command(struct lbs_private *priv);
33int lbs_process_event(struct lbs_private *priv, u32 event);
34void lbs_queue_event(struct lbs_private *priv, u32 event);
35void lbs_notify_command_response(struct lbs_private *priv, u8 resp_idx);
36 20
37u32 lbs_fw_index_to_data_rate(u8 index); 21/* tx.c */
38u8 lbs_data_rate_to_fw_index(u32 rate); 22void lbs_send_tx_feedback(struct lbs_private *priv, u32 try_count);
39
40/** The proc fs interface */
41int lbs_process_command_response(struct lbs_private *priv, u8 *data, u32 len);
42void lbs_complete_command(struct lbs_private *priv, struct cmd_ctrl_node *cmd,
43 int result);
44netdev_tx_t lbs_hard_start_xmit(struct sk_buff *skb, 23netdev_tx_t lbs_hard_start_xmit(struct sk_buff *skb,
45 struct net_device *dev); 24 struct net_device *dev);
46int lbs_set_regiontable(struct lbs_private *priv, u8 region, u8 band);
47 25
26/* rx.c */
48int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *); 27int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *);
49 28
50void lbs_ps_sleep(struct lbs_private *priv, int wait_option);
51void lbs_ps_confirm_sleep(struct lbs_private *priv);
52void lbs_ps_wakeup(struct lbs_private *priv, int wait_option);
53
54struct chan_freq_power *lbs_find_cfp_by_band_and_channel(
55 struct lbs_private *priv,
56 u8 band,
57 u16 channel);
58
59void lbs_mac_event_disconnected(struct lbs_private *priv);
60
61void lbs_send_iwevcustom_event(struct lbs_private *priv, s8 *str);
62
63/* persistcfg.c */
64void lbs_persist_config_init(struct net_device *net);
65void lbs_persist_config_remove(struct net_device *net);
66 29
67/* main.c */ 30/* main.c */
68struct chan_freq_power *lbs_get_region_cfp_table(u8 region,
69 int *cfp_no);
70struct lbs_private *lbs_add_card(void *card, struct device *dmdev); 31struct lbs_private *lbs_add_card(void *card, struct device *dmdev);
71void lbs_remove_card(struct lbs_private *priv); 32void lbs_remove_card(struct lbs_private *priv);
72int lbs_start_card(struct lbs_private *priv); 33int lbs_start_card(struct lbs_private *priv);
73void lbs_stop_card(struct lbs_private *priv); 34void lbs_stop_card(struct lbs_private *priv);
74void lbs_host_to_card_done(struct lbs_private *priv); 35void lbs_host_to_card_done(struct lbs_private *priv);
75 36
76int lbs_update_channel(struct lbs_private *priv); 37int lbs_set_mac_address(struct net_device *dev, void *addr);
38void lbs_set_multicast_list(struct net_device *dev);
39
40int lbs_suspend(struct lbs_private *priv);
41void lbs_resume(struct lbs_private *priv);
42
43void lbs_queue_event(struct lbs_private *priv, u32 event);
44void lbs_notify_command_response(struct lbs_private *priv, u8 resp_idx);
45
46int lbs_enter_auto_deep_sleep(struct lbs_private *priv);
47int lbs_exit_auto_deep_sleep(struct lbs_private *priv);
48
49u32 lbs_fw_index_to_data_rate(u8 index);
50u8 lbs_data_rate_to_fw_index(u32 rate);
51
77 52
78#endif 53#endif
diff --git a/drivers/net/wireless/libertas/defs.h b/drivers/net/wireless/libertas/defs.h
index 72f3479a4d70..ea3f10ef4e00 100644
--- a/drivers/net/wireless/libertas/defs.h
+++ b/drivers/net/wireless/libertas/defs.h
@@ -42,6 +42,7 @@
42#define LBS_DEB_SDIO 0x00400000 42#define LBS_DEB_SDIO 0x00400000
43#define LBS_DEB_SYSFS 0x00800000 43#define LBS_DEB_SYSFS 0x00800000
44#define LBS_DEB_SPI 0x01000000 44#define LBS_DEB_SPI 0x01000000
45#define LBS_DEB_CFG80211 0x02000000
45 46
46extern unsigned int lbs_debug; 47extern unsigned int lbs_debug;
47 48
@@ -86,6 +87,7 @@ do { if ((lbs_debug & (grp)) == (grp)) \
86#define lbs_deb_sdio(fmt, args...) LBS_DEB_LL(LBS_DEB_SDIO, " sdio", fmt, ##args) 87#define lbs_deb_sdio(fmt, args...) LBS_DEB_LL(LBS_DEB_SDIO, " sdio", fmt, ##args)
87#define lbs_deb_sysfs(fmt, args...) LBS_DEB_LL(LBS_DEB_SYSFS, " sysfs", fmt, ##args) 88#define lbs_deb_sysfs(fmt, args...) LBS_DEB_LL(LBS_DEB_SYSFS, " sysfs", fmt, ##args)
88#define lbs_deb_spi(fmt, args...) LBS_DEB_LL(LBS_DEB_SPI, " spi", fmt, ##args) 89#define lbs_deb_spi(fmt, args...) LBS_DEB_LL(LBS_DEB_SPI, " spi", fmt, ##args)
90#define lbs_deb_cfg80211(fmt, args...) LBS_DEB_LL(LBS_DEB_CFG80211, " cfg80211", fmt, ##args)
89 91
90#define lbs_pr_info(format, args...) \ 92#define lbs_pr_info(format, args...) \
91 printk(KERN_INFO DRV_NAME": " format, ## args) 93 printk(KERN_INFO DRV_NAME": " format, ## args)
@@ -320,7 +322,6 @@ static inline void lbs_deb_hex(unsigned int grp, const char *prompt, u8 *buf, in
320extern const char lbs_driver_version[]; 322extern const char lbs_driver_version[];
321extern u16 lbs_region_code_to_index[MRVDRV_MAX_REGION_CODE]; 323extern u16 lbs_region_code_to_index[MRVDRV_MAX_REGION_CODE];
322 324
323extern u8 lbs_bg_rates[MAX_RATES];
324 325
325/** ENUM definition*/ 326/** ENUM definition*/
326/** SNRNF_TYPE */ 327/** SNRNF_TYPE */
@@ -396,13 +397,6 @@ enum KEY_INFO_WPA {
396 KEY_INFO_WPA_ENABLED = 0x04 397 KEY_INFO_WPA_ENABLED = 0x04
397}; 398};
398 399
399/** mesh_fw_ver */
400enum _mesh_fw_ver {
401 MESH_NONE = 0, /* MESH is not supported */
402 MESH_FW_OLD, /* MESH is supported in FW V5 */
403 MESH_FW_NEW, /* MESH is supported in FW V10 and newer */
404};
405
406/* Default values for fwt commands. */ 400/* Default values for fwt commands. */
407#define FWT_DEFAULT_METRIC 0 401#define FWT_DEFAULT_METRIC 0
408#define FWT_DEFAULT_DIR 1 402#define FWT_DEFAULT_DIR 1
diff --git a/drivers/net/wireless/libertas/dev.h b/drivers/net/wireless/libertas/dev.h
index d3b69a4b4b5e..6875e1498bd5 100644
--- a/drivers/net/wireless/libertas/dev.h
+++ b/drivers/net/wireless/libertas/dev.h
@@ -6,75 +6,11 @@
6#ifndef _LBS_DEV_H_ 6#ifndef _LBS_DEV_H_
7#define _LBS_DEV_H_ 7#define _LBS_DEV_H_
8 8
9#include <linux/netdevice.h> 9#include "mesh.h"
10#include <linux/wireless.h> 10#include "scan.h"
11#include <linux/ethtool.h> 11#include "assoc.h"
12#include <linux/debugfs.h>
13 12
14#include "defs.h" 13#include <linux/kfifo.h>
15#include "hostcmd.h"
16
17extern const struct ethtool_ops lbs_ethtool_ops;
18
19#define MAX_BSSID_PER_CHANNEL 16
20
21#define NR_TX_QUEUE 3
22
23/* For the extended Scan */
24#define MAX_EXTENDED_SCAN_BSSID_LIST MAX_BSSID_PER_CHANNEL * \
25 MRVDRV_MAX_CHANNEL_SIZE + 1
26
27#define MAX_REGION_CHANNEL_NUM 2
28
29/** Chan-freq-TxPower mapping table*/
30struct chan_freq_power {
31 /** channel Number */
32 u16 channel;
33 /** frequency of this channel */
34 u32 freq;
35 /** Max allowed Tx power level */
36 u16 maxtxpower;
37 /** TRUE:channel unsupported; FLASE:supported*/
38 u8 unsupported;
39};
40
41/** region-band mapping table*/
42struct region_channel {
43 /** TRUE if this entry is valid */
44 u8 valid;
45 /** region code for US, Japan ... */
46 u8 region;
47 /** band B/G/A, used for BAND_CONFIG cmd */
48 u8 band;
49 /** Actual No. of elements in the array below */
50 u8 nrcfp;
51 /** chan-freq-txpower mapping table*/
52 struct chan_freq_power *CFP;
53};
54
55struct lbs_802_11_security {
56 u8 WPAenabled;
57 u8 WPA2enabled;
58 u8 wep_enabled;
59 u8 auth_mode;
60 u32 key_mgmt;
61};
62
63/** Current Basic Service Set State Structure */
64struct current_bss_params {
65 /** bssid */
66 u8 bssid[ETH_ALEN];
67 /** ssid */
68 u8 ssid[IW_ESSID_MAX_SIZE + 1];
69 u8 ssid_len;
70
71 /** band */
72 u8 band;
73 /** channel */
74 u8 channel;
75 /** zero-terminated array of supported data rates */
76 u8 rates[MAX_RATES + 1];
77};
78 14
79/** sleep_params */ 15/** sleep_params */
80struct sleep_params { 16struct sleep_params {
@@ -86,205 +22,173 @@ struct sleep_params {
86 uint16_t sp_reserved; 22 uint16_t sp_reserved;
87}; 23};
88 24
89/* Mesh statistics */
90struct lbs_mesh_stats {
91 u32 fwd_bcast_cnt; /* Fwd: Broadcast counter */
92 u32 fwd_unicast_cnt; /* Fwd: Unicast counter */
93 u32 fwd_drop_ttl; /* Fwd: TTL zero */
94 u32 fwd_drop_rbt; /* Fwd: Recently Broadcasted */
95 u32 fwd_drop_noroute; /* Fwd: No route to Destination */
96 u32 fwd_drop_nobuf; /* Fwd: Run out of internal buffers */
97 u32 drop_blind; /* Rx: Dropped by blinding table */
98 u32 tx_failed_cnt; /* Tx: Failed transmissions */
99};
100 25
101/** Private structure for the MV device */ 26/** Private structure for the MV device */
102struct lbs_private { 27struct lbs_private {
103 int mesh_open;
104 int mesh_fw_ver;
105 int infra_open;
106 int mesh_autostart_enabled;
107
108 char name[DEV_NAME_LEN];
109 28
110 void *card; 29 /* Basic networking */
111 struct net_device *dev; 30 struct net_device *dev;
31 u32 connect_status;
32 int infra_open;
33 struct work_struct mcast_work;
34 u32 nr_of_multicastmacaddr;
35 u8 multicastlist[MRVDRV_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
36
37 /* CFG80211 */
38 struct wireless_dev *wdev;
39 bool wiphy_registered;
112 40
41 /* Mesh */
113 struct net_device *mesh_dev; /* Virtual device */ 42 struct net_device *mesh_dev; /* Virtual device */
43#ifdef CONFIG_LIBERTAS_MESH
44 u32 mesh_connect_status;
45 struct lbs_mesh_stats mstats;
46 int mesh_open;
47 uint16_t mesh_tlv;
48 u8 mesh_ssid[IEEE80211_MAX_SSID_LEN + 1];
49 u8 mesh_ssid_len;
50#endif
51
52 /* Monitor mode */
114 struct net_device *rtap_net_dev; 53 struct net_device *rtap_net_dev;
54 u32 monitormode;
115 55
116 struct iw_statistics wstats; 56 /* Debugfs */
117 struct lbs_mesh_stats mstats;
118 struct dentry *debugfs_dir; 57 struct dentry *debugfs_dir;
119 struct dentry *debugfs_debug; 58 struct dentry *debugfs_debug;
120 struct dentry *debugfs_files[6]; 59 struct dentry *debugfs_files[6];
121
122 struct dentry *events_dir; 60 struct dentry *events_dir;
123 struct dentry *debugfs_events_files[6]; 61 struct dentry *debugfs_events_files[6];
124
125 struct dentry *regs_dir; 62 struct dentry *regs_dir;
126 struct dentry *debugfs_regs_files[6]; 63 struct dentry *debugfs_regs_files[6];
127 64
65 /* Hardware debugging */
128 u32 mac_offset; 66 u32 mac_offset;
129 u32 bbp_offset; 67 u32 bbp_offset;
130 u32 rf_offset; 68 u32 rf_offset;
69 struct lbs_offset_value offsetvalue;
131 70
132 /* Download sent: 71 /* Power management */
133 bit0 1/0=data_sent/data_tx_done, 72 u16 psmode;
134 bit1 1/0=cmd_sent/cmd_tx_done, 73 u32 psstate;
135 all other bits reserved 0 */ 74 u8 needtowakeup;
136 u8 dnld_sent;
137
138 /** thread to service interrupts */
139 struct task_struct *main_thread;
140 wait_queue_head_t waitq;
141 struct workqueue_struct *work_thread;
142 75
143 struct work_struct mcast_work; 76 /* Deep sleep */
77 int is_deep_sleep;
78 int is_auto_deep_sleep_enabled;
79 int wakeup_dev_required;
80 int is_activity_detected;
81 int auto_deep_sleep_timeout; /* in ms */
82 wait_queue_head_t ds_awake_q;
83 struct timer_list auto_deepsleep_timer;
144 84
145 /** Scanning */ 85 /* Hardware access */
146 struct delayed_work scan_work; 86 void *card;
147 struct delayed_work assoc_work; 87 u8 fw_ready;
148 struct work_struct sync_channel; 88 u8 surpriseremoved;
149 /* remember which channel was scanned last, != 0 if currently scanning */
150 int scan_channel;
151 u8 scan_ssid[IW_ESSID_MAX_SIZE + 1];
152 u8 scan_ssid_len;
153
154 /** Hardware access */
155 int (*hw_host_to_card) (struct lbs_private *priv, u8 type, u8 *payload, u16 nb); 89 int (*hw_host_to_card) (struct lbs_private *priv, u8 type, u8 *payload, u16 nb);
156 void (*reset_card) (struct lbs_private *priv); 90 void (*reset_card) (struct lbs_private *priv);
91 int (*enter_deep_sleep) (struct lbs_private *priv);
92 int (*exit_deep_sleep) (struct lbs_private *priv);
93 int (*reset_deep_sleep_wakeup) (struct lbs_private *priv);
157 94
158 /* Wake On LAN */ 95 /* Adapter info (from EEPROM) */
159 uint32_t wol_criteria;
160 uint8_t wol_gpio;
161 uint8_t wol_gap;
162
163 /** Wlan adapter data structure*/
164 /** STATUS variables */
165 u32 fwrelease; 96 u32 fwrelease;
166 u32 fwcapinfo; 97 u32 fwcapinfo;
98 u16 regioncode;
99 u8 current_addr[ETH_ALEN];
167 100
168 struct mutex lock; 101 /* Command download */
169 102 u8 dnld_sent;
170 /* TX packet ready to be sent... */ 103 /* bit0 1/0=data_sent/data_tx_done,
171 int tx_pending_len; /* -1 while building packet */ 104 bit1 1/0=cmd_sent/cmd_tx_done,
172 105 all other bits reserved 0 */
173 u8 tx_pending_buf[LBS_UPLD_SIZE];
174 /* protected by hard_start_xmit serialization */
175
176 /** command-related variables */
177 u16 seqnum; 106 u16 seqnum;
178
179 struct cmd_ctrl_node *cmd_array; 107 struct cmd_ctrl_node *cmd_array;
180 /** Current command */
181 struct cmd_ctrl_node *cur_cmd; 108 struct cmd_ctrl_node *cur_cmd;
182 int cur_cmd_retcode; 109 struct list_head cmdfreeq; /* free command buffers */
183 /** command Queues */ 110 struct list_head cmdpendingq; /* pending command buffers */
184 /** Free command buffers */
185 struct list_head cmdfreeq;
186 /** Pending command buffers */
187 struct list_head cmdpendingq;
188
189 wait_queue_head_t cmd_pending; 111 wait_queue_head_t cmd_pending;
112 struct timer_list command_timer;
113 int cmd_timed_out;
190 114
191 /* Command responses sent from the hardware to the driver */ 115 /* Command responses sent from the hardware to the driver */
116 int cur_cmd_retcode;
192 u8 resp_idx; 117 u8 resp_idx;
193 u8 resp_buf[2][LBS_UPLD_SIZE]; 118 u8 resp_buf[2][LBS_UPLD_SIZE];
194 u32 resp_len[2]; 119 u32 resp_len[2];
195 120
196 /* Events sent from hardware to driver */ 121 /* Events sent from hardware to driver */
197 struct kfifo *event_fifo; 122 struct kfifo event_fifo;
198
199 /* nickname */
200 u8 nodename[16];
201
202 /** spin locks */
203 spinlock_t driver_lock;
204
205 /** Timers */
206 struct timer_list command_timer;
207 int nr_retries;
208 int cmd_timed_out;
209
210 /** current ssid/bssid related parameters*/
211 struct current_bss_params curbssparams;
212 123
213 uint16_t mesh_tlv; 124 /** thread to service interrupts */
214 u8 mesh_ssid[IW_ESSID_MAX_SIZE + 1]; 125 struct task_struct *main_thread;
215 u8 mesh_ssid_len; 126 wait_queue_head_t waitq;
216 127 struct workqueue_struct *work_thread;
217 /* IW_MODE_* */
218 u8 mode;
219
220 /* Scan results list */
221 struct list_head network_list;
222 struct list_head network_free_list;
223 struct bss_descriptor *networks;
224
225 u16 beacon_period;
226 u8 beacon_enable;
227 u8 adhoccreate;
228
229 /** capability Info used in Association, start, join */
230 u16 capability;
231
232 /** MAC address information */
233 u8 current_addr[ETH_ALEN];
234 u8 multicastlist[MRVDRV_MAX_MULTICAST_LIST_SIZE][ETH_ALEN];
235 u32 nr_of_multicastmacaddr;
236 128
237 /** 802.11 statistics */ 129 /** Encryption stuff */
238// struct cmd_DS_802_11_GET_STAT wlan802_11Stat; 130 struct lbs_802_11_security secinfo;
131 struct enc_key wpa_mcast_key;
132 struct enc_key wpa_unicast_key;
133 u8 wpa_ie[MAX_WPA_IE_LEN];
134 u8 wpa_ie_len;
135 u16 wep_tx_keyidx;
136 struct enc_key wep_keys[4];
239 137
240 uint16_t enablehwauto; 138 /* Wake On LAN */
241 uint16_t ratebitmap; 139 uint32_t wol_criteria;
140 uint8_t wol_gpio;
141 uint8_t wol_gap;
242 142
143 /* Transmitting */
144 int tx_pending_len; /* -1 while building packet */
145 u8 tx_pending_buf[LBS_UPLD_SIZE];
146 /* protected by hard_start_xmit serialization */
243 u8 txretrycount; 147 u8 txretrycount;
244
245 /** Tx-related variables (for single packet tx) */
246 struct sk_buff *currenttxskb; 148 struct sk_buff *currenttxskb;
247 149
248 /** NIC Operation characteristics */ 150 /* Locks */
151 struct mutex lock;
152 spinlock_t driver_lock;
153
154 /* NIC/link operation characteristics */
249 u16 mac_control; 155 u16 mac_control;
250 u32 connect_status; 156 u8 radio_on;
251 u32 mesh_connect_status; 157 u8 channel;
252 u16 regioncode;
253 s16 txpower_cur; 158 s16 txpower_cur;
254 s16 txpower_min; 159 s16 txpower_min;
255 s16 txpower_max; 160 s16 txpower_max;
256 161
257 /** POWER MANAGEMENT AND PnP SUPPORT */ 162 /** Scanning */
258 u8 surpriseremoved; 163 struct delayed_work scan_work;
259 164 int scan_channel;
260 u16 psmode; /* Wlan802_11PowermodeCAM=disable 165 /* remember which channel was scanned last, != 0 if currently scanning */
261 Wlan802_11PowermodeMAX_PSP=enable */ 166 u8 scan_ssid[IEEE80211_MAX_SSID_LEN + 1];
262 u32 psstate; 167 u8 scan_ssid_len;
263 u8 needtowakeup;
264 168
169 /* Associating */
170 struct delayed_work assoc_work;
171 struct current_bss_params curbssparams;
172 u8 mode;
173 struct list_head network_list;
174 struct list_head network_free_list;
175 struct bss_descriptor *networks;
265 struct assoc_request * pending_assoc_req; 176 struct assoc_request * pending_assoc_req;
266 struct assoc_request * in_progress_assoc_req; 177 struct assoc_request * in_progress_assoc_req;
178 uint16_t enablehwauto;
267 179
268 /** Encryption parameter */ 180 /* ADHOC */
269 struct lbs_802_11_security secinfo; 181 u16 beacon_period;
270 182 u8 beacon_enable;
271 /** WEP keys */ 183 u8 adhoccreate;
272 struct enc_key wep_keys[4];
273 u16 wep_tx_keyidx;
274
275 /** WPA keys */
276 struct enc_key wpa_mcast_key;
277 struct enc_key wpa_unicast_key;
278
279/*
280 * In theory, the IE is limited to the IE length, 255,
281 * but in practice 64 bytes are enough.
282 */
283#define MAX_WPA_IE_LEN 64
284 184
285 /** WPA Information Elements*/ 185 /* WEXT */
286 u8 wpa_ie[MAX_WPA_IE_LEN]; 186 char name[DEV_NAME_LEN];
287 u8 wpa_ie_len; 187 u8 nodename[16];
188 struct iw_statistics wstats;
189 u8 cur_rate;
190#define MAX_REGION_CHANNEL_NUM 2
191 struct region_channel region_channel[MAX_REGION_CHANNEL_NUM];
288 192
289 /** Requested Signal Strength*/ 193 /** Requested Signal Strength*/
290 u16 SNR[MAX_TYPE_B][MAX_TYPE_AVG]; 194 u16 SNR[MAX_TYPE_B][MAX_TYPE_AVG];
@@ -294,116 +198,8 @@ struct lbs_private {
294 u8 rawNF[DEFAULT_DATA_AVG_FACTOR]; 198 u8 rawNF[DEFAULT_DATA_AVG_FACTOR];
295 u16 nextSNRNF; 199 u16 nextSNRNF;
296 u16 numSNRNF; 200 u16 numSNRNF;
297
298 u8 radio_on;
299
300 /** data rate stuff */
301 u8 cur_rate;
302
303 /** RF calibration data */
304
305#define MAX_REGION_CHANNEL_NUM 2
306 /** region channel data */
307 struct region_channel region_channel[MAX_REGION_CHANNEL_NUM];
308
309 struct region_channel universal_channel[MAX_REGION_CHANNEL_NUM];
310
311 /** 11D and Domain Regulatory Data */
312 struct lbs_802_11d_domain_reg domainreg;
313 struct parsed_region_chan_11d parsed_region_chan;
314
315 /** FSM variable for 11d support */
316 u32 enable11d;
317
318 /** MISCELLANEOUS */
319 struct lbs_offset_value offsetvalue;
320
321 u32 monitormode;
322 u8 fw_ready;
323}; 201};
324 202
325extern struct cmd_confirm_sleep confirm_sleep; 203extern struct cmd_confirm_sleep confirm_sleep;
326 204
327/**
328 * @brief Structure used to store information for each beacon/probe response
329 */
330struct bss_descriptor {
331 u8 bssid[ETH_ALEN];
332
333 u8 ssid[IW_ESSID_MAX_SIZE + 1];
334 u8 ssid_len;
335
336 u16 capability;
337 u32 rssi;
338 u32 channel;
339 u16 beaconperiod;
340 __le16 atimwindow;
341
342 /* IW_MODE_AUTO, IW_MODE_ADHOC, IW_MODE_INFRA */
343 u8 mode;
344
345 /* zero-terminated array of supported data rates */
346 u8 rates[MAX_RATES + 1];
347
348 unsigned long last_scanned;
349
350 union ieee_phy_param_set phy;
351 union ieee_ss_param_set ss;
352
353 struct ieee_ie_country_info_full_set countryinfo;
354
355 u8 wpa_ie[MAX_WPA_IE_LEN];
356 size_t wpa_ie_len;
357 u8 rsn_ie[MAX_WPA_IE_LEN];
358 size_t rsn_ie_len;
359
360 u8 mesh;
361
362 struct list_head list;
363};
364
365/** Association request
366 *
367 * Encapsulates all the options that describe a specific assocation request
368 * or configuration of the wireless card's radio, mode, and security settings.
369 */
370struct assoc_request {
371#define ASSOC_FLAG_SSID 1
372#define ASSOC_FLAG_CHANNEL 2
373#define ASSOC_FLAG_BAND 3
374#define ASSOC_FLAG_MODE 4
375#define ASSOC_FLAG_BSSID 5
376#define ASSOC_FLAG_WEP_KEYS 6
377#define ASSOC_FLAG_WEP_TX_KEYIDX 7
378#define ASSOC_FLAG_WPA_MCAST_KEY 8
379#define ASSOC_FLAG_WPA_UCAST_KEY 9
380#define ASSOC_FLAG_SECINFO 10
381#define ASSOC_FLAG_WPA_IE 11
382 unsigned long flags;
383
384 u8 ssid[IW_ESSID_MAX_SIZE + 1];
385 u8 ssid_len;
386 u8 channel;
387 u8 band;
388 u8 mode;
389 u8 bssid[ETH_ALEN] __attribute__ ((aligned (2)));
390
391 /** WEP keys */
392 struct enc_key wep_keys[4];
393 u16 wep_tx_keyidx;
394
395 /** WPA keys */
396 struct enc_key wpa_mcast_key;
397 struct enc_key wpa_unicast_key;
398
399 struct lbs_802_11_security secinfo;
400
401 /** WPA Information Elements*/
402 u8 wpa_ie[MAX_WPA_IE_LEN];
403 u8 wpa_ie_len;
404
405 /* BSS to associate with for infrastructure of Ad-Hoc join */
406 struct bss_descriptor bss;
407};
408
409#endif 205#endif
diff --git a/drivers/net/wireless/libertas/ethtool.c b/drivers/net/wireless/libertas/ethtool.c
index 53d56ab83c03..3804a58d7f4e 100644
--- a/drivers/net/wireless/libertas/ethtool.c
+++ b/drivers/net/wireless/libertas/ethtool.c
@@ -8,17 +8,8 @@
8#include "dev.h" 8#include "dev.h"
9#include "wext.h" 9#include "wext.h"
10#include "cmd.h" 10#include "cmd.h"
11#include "mesh.h"
11 12
12static const char * mesh_stat_strings[]= {
13 "drop_duplicate_bcast",
14 "drop_ttl_zero",
15 "drop_no_fwd_route",
16 "drop_no_buffers",
17 "fwded_unicast_cnt",
18 "fwded_bcast_cnt",
19 "drop_blind_table",
20 "tx_failed_cnt"
21};
22 13
23static void lbs_ethtool_get_drvinfo(struct net_device *dev, 14static void lbs_ethtool_get_drvinfo(struct net_device *dev,
24 struct ethtool_drvinfo *info) 15 struct ethtool_drvinfo *info)
@@ -73,73 +64,6 @@ out:
73 return ret; 64 return ret;
74} 65}
75 66
76static void lbs_ethtool_get_stats(struct net_device *dev,
77 struct ethtool_stats *stats, uint64_t *data)
78{
79 struct lbs_private *priv = dev->ml_priv;
80 struct cmd_ds_mesh_access mesh_access;
81 int ret;
82
83 lbs_deb_enter(LBS_DEB_ETHTOOL);
84
85 /* Get Mesh Statistics */
86 ret = lbs_mesh_access(priv, CMD_ACT_MESH_GET_STATS, &mesh_access);
87
88 if (ret) {
89 memset(data, 0, MESH_STATS_NUM*(sizeof(uint64_t)));
90 return;
91 }
92
93 priv->mstats.fwd_drop_rbt = le32_to_cpu(mesh_access.data[0]);
94 priv->mstats.fwd_drop_ttl = le32_to_cpu(mesh_access.data[1]);
95 priv->mstats.fwd_drop_noroute = le32_to_cpu(mesh_access.data[2]);
96 priv->mstats.fwd_drop_nobuf = le32_to_cpu(mesh_access.data[3]);
97 priv->mstats.fwd_unicast_cnt = le32_to_cpu(mesh_access.data[4]);
98 priv->mstats.fwd_bcast_cnt = le32_to_cpu(mesh_access.data[5]);
99 priv->mstats.drop_blind = le32_to_cpu(mesh_access.data[6]);
100 priv->mstats.tx_failed_cnt = le32_to_cpu(mesh_access.data[7]);
101
102 data[0] = priv->mstats.fwd_drop_rbt;
103 data[1] = priv->mstats.fwd_drop_ttl;
104 data[2] = priv->mstats.fwd_drop_noroute;
105 data[3] = priv->mstats.fwd_drop_nobuf;
106 data[4] = priv->mstats.fwd_unicast_cnt;
107 data[5] = priv->mstats.fwd_bcast_cnt;
108 data[6] = priv->mstats.drop_blind;
109 data[7] = priv->mstats.tx_failed_cnt;
110
111 lbs_deb_enter(LBS_DEB_ETHTOOL);
112}
113
114static int lbs_ethtool_get_sset_count(struct net_device *dev, int sset)
115{
116 struct lbs_private *priv = dev->ml_priv;
117
118 if (sset == ETH_SS_STATS && dev == priv->mesh_dev)
119 return MESH_STATS_NUM;
120
121 return -EOPNOTSUPP;
122}
123
124static void lbs_ethtool_get_strings(struct net_device *dev,
125 uint32_t stringset, uint8_t *s)
126{
127 int i;
128
129 lbs_deb_enter(LBS_DEB_ETHTOOL);
130
131 switch (stringset) {
132 case ETH_SS_STATS:
133 for (i=0; i < MESH_STATS_NUM; i++) {
134 memcpy(s + i * ETH_GSTRING_LEN,
135 mesh_stat_strings[i],
136 ETH_GSTRING_LEN);
137 }
138 break;
139 }
140 lbs_deb_enter(LBS_DEB_ETHTOOL);
141}
142
143static void lbs_ethtool_get_wol(struct net_device *dev, 67static void lbs_ethtool_get_wol(struct net_device *dev,
144 struct ethtool_wolinfo *wol) 68 struct ethtool_wolinfo *wol)
145{ 69{
@@ -190,9 +114,11 @@ const struct ethtool_ops lbs_ethtool_ops = {
190 .get_drvinfo = lbs_ethtool_get_drvinfo, 114 .get_drvinfo = lbs_ethtool_get_drvinfo,
191 .get_eeprom = lbs_ethtool_get_eeprom, 115 .get_eeprom = lbs_ethtool_get_eeprom,
192 .get_eeprom_len = lbs_ethtool_get_eeprom_len, 116 .get_eeprom_len = lbs_ethtool_get_eeprom_len,
193 .get_sset_count = lbs_ethtool_get_sset_count, 117#ifdef CONFIG_LIBERTAS_MESH
194 .get_ethtool_stats = lbs_ethtool_get_stats, 118 .get_sset_count = lbs_mesh_ethtool_get_sset_count,
195 .get_strings = lbs_ethtool_get_strings, 119 .get_ethtool_stats = lbs_mesh_ethtool_get_stats,
120 .get_strings = lbs_mesh_ethtool_get_strings,
121#endif
196 .get_wol = lbs_ethtool_get_wol, 122 .get_wol = lbs_ethtool_get_wol,
197 .set_wol = lbs_ethtool_set_wol, 123 .set_wol = lbs_ethtool_set_wol,
198}; 124};
diff --git a/drivers/net/wireless/libertas/host.h b/drivers/net/wireless/libertas/host.h
index fe8f0cb737bc..3809c0b49464 100644
--- a/drivers/net/wireless/libertas/host.h
+++ b/drivers/net/wireless/libertas/host.h
@@ -1,201 +1,190 @@
1/** 1/**
2 * This file contains definitions of WLAN commands. 2 * This file function prototypes, data structure
3 * and definitions for all the host/station commands
3 */ 4 */
4 5
5#ifndef _LBS_HOST_H_ 6#ifndef _LBS_HOST_H_
6#define _LBS_HOST_H_ 7#define _LBS_HOST_H_
7 8
8/** PUBLIC DEFINITIONS */ 9#include "types.h"
9#define DEFAULT_AD_HOC_CHANNEL 6 10#include "defs.h"
10#define DEFAULT_AD_HOC_CHANNEL_A 36
11 11
12#define CMD_OPTION_WAITFORRSP 0x0002 12#define DEFAULT_AD_HOC_CHANNEL 6
13
14#define CMD_OPTION_WAITFORRSP 0x0002
13 15
14/** Host command IDs */ 16/** Host command IDs */
15 17
16/* Return command are almost always the same as the host command, but with 18/* Return command are almost always the same as the host command, but with
17 * bit 15 set high. There are a few exceptions, though... 19 * bit 15 set high. There are a few exceptions, though...
18 */ 20 */
19#define CMD_RET(cmd) (0x8000 | cmd) 21#define CMD_RET(cmd) (0x8000 | cmd)
20 22
21/* Return command convention exceptions: */ 23/* Return command convention exceptions: */
22#define CMD_RET_802_11_ASSOCIATE 0x8012 24#define CMD_RET_802_11_ASSOCIATE 0x8012
23 25
24/* Command codes */ 26/* Command codes */
25#define CMD_GET_HW_SPEC 0x0003 27#define CMD_GET_HW_SPEC 0x0003
26#define CMD_EEPROM_UPDATE 0x0004 28#define CMD_EEPROM_UPDATE 0x0004
27#define CMD_802_11_RESET 0x0005 29#define CMD_802_11_RESET 0x0005
28#define CMD_802_11_SCAN 0x0006 30#define CMD_802_11_SCAN 0x0006
29#define CMD_802_11_GET_LOG 0x000b 31#define CMD_802_11_GET_LOG 0x000b
30#define CMD_MAC_MULTICAST_ADR 0x0010 32#define CMD_MAC_MULTICAST_ADR 0x0010
31#define CMD_802_11_AUTHENTICATE 0x0011 33#define CMD_802_11_AUTHENTICATE 0x0011
32#define CMD_802_11_EEPROM_ACCESS 0x0059 34#define CMD_802_11_EEPROM_ACCESS 0x0059
33#define CMD_802_11_ASSOCIATE 0x0050 35#define CMD_802_11_ASSOCIATE 0x0050
34#define CMD_802_11_SET_WEP 0x0013 36#define CMD_802_11_SET_WEP 0x0013
35#define CMD_802_11_GET_STAT 0x0014 37#define CMD_802_11_GET_STAT 0x0014
36#define CMD_802_3_GET_STAT 0x0015 38#define CMD_802_3_GET_STAT 0x0015
37#define CMD_802_11_SNMP_MIB 0x0016 39#define CMD_802_11_SNMP_MIB 0x0016
38#define CMD_MAC_REG_MAP 0x0017 40#define CMD_MAC_REG_MAP 0x0017
39#define CMD_BBP_REG_MAP 0x0018 41#define CMD_BBP_REG_MAP 0x0018
40#define CMD_MAC_REG_ACCESS 0x0019 42#define CMD_MAC_REG_ACCESS 0x0019
41#define CMD_BBP_REG_ACCESS 0x001a 43#define CMD_BBP_REG_ACCESS 0x001a
42#define CMD_RF_REG_ACCESS 0x001b 44#define CMD_RF_REG_ACCESS 0x001b
43#define CMD_802_11_RADIO_CONTROL 0x001c 45#define CMD_802_11_RADIO_CONTROL 0x001c
44#define CMD_802_11_RF_CHANNEL 0x001d 46#define CMD_802_11_RF_CHANNEL 0x001d
45#define CMD_802_11_RF_TX_POWER 0x001e 47#define CMD_802_11_RF_TX_POWER 0x001e
46#define CMD_802_11_RSSI 0x001f 48#define CMD_802_11_RSSI 0x001f
47#define CMD_802_11_RF_ANTENNA 0x0020 49#define CMD_802_11_RF_ANTENNA 0x0020
48#define CMD_802_11_PS_MODE 0x0021 50#define CMD_802_11_PS_MODE 0x0021
49#define CMD_802_11_DATA_RATE 0x0022 51#define CMD_802_11_DATA_RATE 0x0022
50#define CMD_RF_REG_MAP 0x0023 52#define CMD_RF_REG_MAP 0x0023
51#define CMD_802_11_DEAUTHENTICATE 0x0024 53#define CMD_802_11_DEAUTHENTICATE 0x0024
52#define CMD_802_11_REASSOCIATE 0x0025 54#define CMD_802_11_REASSOCIATE 0x0025
53#define CMD_MAC_CONTROL 0x0028 55#define CMD_MAC_CONTROL 0x0028
54#define CMD_802_11_AD_HOC_START 0x002b 56#define CMD_802_11_AD_HOC_START 0x002b
55#define CMD_802_11_AD_HOC_JOIN 0x002c 57#define CMD_802_11_AD_HOC_JOIN 0x002c
56#define CMD_802_11_QUERY_TKIP_REPLY_CNTRS 0x002e 58#define CMD_802_11_QUERY_TKIP_REPLY_CNTRS 0x002e
57#define CMD_802_11_ENABLE_RSN 0x002f 59#define CMD_802_11_ENABLE_RSN 0x002f
58#define CMD_802_11_SET_AFC 0x003c 60#define CMD_802_11_SET_AFC 0x003c
59#define CMD_802_11_GET_AFC 0x003d 61#define CMD_802_11_GET_AFC 0x003d
60#define CMD_802_11_AD_HOC_STOP 0x0040 62#define CMD_802_11_DEEP_SLEEP 0x003e
61#define CMD_802_11_HOST_SLEEP_CFG 0x0043 63#define CMD_802_11_AD_HOC_STOP 0x0040
62#define CMD_802_11_WAKEUP_CONFIRM 0x0044 64#define CMD_802_11_HOST_SLEEP_CFG 0x0043
63#define CMD_802_11_HOST_SLEEP_ACTIVATE 0x0045 65#define CMD_802_11_WAKEUP_CONFIRM 0x0044
64#define CMD_802_11_BEACON_STOP 0x0049 66#define CMD_802_11_HOST_SLEEP_ACTIVATE 0x0045
65#define CMD_802_11_MAC_ADDRESS 0x004d 67#define CMD_802_11_BEACON_STOP 0x0049
66#define CMD_802_11_LED_GPIO_CTRL 0x004e 68#define CMD_802_11_MAC_ADDRESS 0x004d
67#define CMD_802_11_EEPROM_ACCESS 0x0059 69#define CMD_802_11_LED_GPIO_CTRL 0x004e
68#define CMD_802_11_BAND_CONFIG 0x0058 70#define CMD_802_11_EEPROM_ACCESS 0x0059
69#define CMD_GSPI_BUS_CONFIG 0x005a 71#define CMD_802_11_BAND_CONFIG 0x0058
70#define CMD_802_11D_DOMAIN_INFO 0x005b 72#define CMD_GSPI_BUS_CONFIG 0x005a
71#define CMD_802_11_KEY_MATERIAL 0x005e 73#define CMD_802_11D_DOMAIN_INFO 0x005b
72#define CMD_802_11_SLEEP_PARAMS 0x0066 74#define CMD_802_11_KEY_MATERIAL 0x005e
73#define CMD_802_11_INACTIVITY_TIMEOUT 0x0067 75#define CMD_802_11_SLEEP_PARAMS 0x0066
74#define CMD_802_11_SLEEP_PERIOD 0x0068 76#define CMD_802_11_INACTIVITY_TIMEOUT 0x0067
75#define CMD_802_11_TPC_CFG 0x0072 77#define CMD_802_11_SLEEP_PERIOD 0x0068
76#define CMD_802_11_PA_CFG 0x0073 78#define CMD_802_11_TPC_CFG 0x0072
77#define CMD_802_11_FW_WAKE_METHOD 0x0074 79#define CMD_802_11_PA_CFG 0x0073
78#define CMD_802_11_SUBSCRIBE_EVENT 0x0075 80#define CMD_802_11_FW_WAKE_METHOD 0x0074
79#define CMD_802_11_RATE_ADAPT_RATESET 0x0076 81#define CMD_802_11_SUBSCRIBE_EVENT 0x0075
80#define CMD_802_11_TX_RATE_QUERY 0x007f 82#define CMD_802_11_RATE_ADAPT_RATESET 0x0076
81#define CMD_GET_TSF 0x0080 83#define CMD_802_11_TX_RATE_QUERY 0x007f
82#define CMD_BT_ACCESS 0x0087 84#define CMD_GET_TSF 0x0080
83#define CMD_FWT_ACCESS 0x0095 85#define CMD_BT_ACCESS 0x0087
84#define CMD_802_11_MONITOR_MODE 0x0098 86#define CMD_FWT_ACCESS 0x0095
85#define CMD_MESH_ACCESS 0x009b 87#define CMD_802_11_MONITOR_MODE 0x0098
86#define CMD_MESH_CONFIG_OLD 0x00a3 88#define CMD_MESH_ACCESS 0x009b
87#define CMD_MESH_CONFIG 0x00ac 89#define CMD_MESH_CONFIG_OLD 0x00a3
88#define CMD_SET_BOOT2_VER 0x00a5 90#define CMD_MESH_CONFIG 0x00ac
89#define CMD_FUNC_INIT 0x00a9 91#define CMD_SET_BOOT2_VER 0x00a5
90#define CMD_FUNC_SHUTDOWN 0x00aa 92#define CMD_FUNC_INIT 0x00a9
91#define CMD_802_11_BEACON_CTRL 0x00b0 93#define CMD_FUNC_SHUTDOWN 0x00aa
94#define CMD_802_11_BEACON_CTRL 0x00b0
92 95
93/* For the IEEE Power Save */ 96/* For the IEEE Power Save */
94#define CMD_SUBCMD_ENTER_PS 0x0030 97#define CMD_SUBCMD_ENTER_PS 0x0030
95#define CMD_SUBCMD_EXIT_PS 0x0031 98#define CMD_SUBCMD_EXIT_PS 0x0031
96#define CMD_SUBCMD_SLEEP_CONFIRMED 0x0034 99#define CMD_SUBCMD_SLEEP_CONFIRMED 0x0034
97#define CMD_SUBCMD_FULL_POWERDOWN 0x0035 100#define CMD_SUBCMD_FULL_POWERDOWN 0x0035
98#define CMD_SUBCMD_FULL_POWERUP 0x0036 101#define CMD_SUBCMD_FULL_POWERUP 0x0036
99 102
100#define CMD_ENABLE_RSN 0x0001 103#define CMD_ENABLE_RSN 0x0001
101#define CMD_DISABLE_RSN 0x0000 104#define CMD_DISABLE_RSN 0x0000
102 105
103#define CMD_ACT_GET 0x0000 106#define CMD_ACT_GET 0x0000
104#define CMD_ACT_SET 0x0001 107#define CMD_ACT_SET 0x0001
105#define CMD_ACT_GET_AES 0x0002
106#define CMD_ACT_SET_AES 0x0003
107#define CMD_ACT_REMOVE_AES 0x0004
108 108
109/* Define action or option for CMD_802_11_SET_WEP */ 109/* Define action or option for CMD_802_11_SET_WEP */
110#define CMD_ACT_ADD 0x0002 110#define CMD_ACT_ADD 0x0002
111#define CMD_ACT_REMOVE 0x0004 111#define CMD_ACT_REMOVE 0x0004
112#define CMD_ACT_USE_DEFAULT 0x0008
113
114#define CMD_TYPE_WEP_40_BIT 0x01
115#define CMD_TYPE_WEP_104_BIT 0x02
116 112
117#define CMD_NUM_OF_WEP_KEYS 4 113#define CMD_TYPE_WEP_40_BIT 0x01
114#define CMD_TYPE_WEP_104_BIT 0x02
118 115
119#define CMD_WEP_KEY_INDEX_MASK 0x3fff 116#define CMD_NUM_OF_WEP_KEYS 4
120 117
121/* Define action or option for CMD_802_11_RESET */ 118#define CMD_WEP_KEY_INDEX_MASK 0x3fff
122#define CMD_ACT_HALT 0x0003
123 119
124/* Define action or option for CMD_802_11_SCAN */ 120/* Define action or option for CMD_802_11_SCAN */
125#define CMD_BSS_TYPE_BSS 0x0001 121#define CMD_BSS_TYPE_BSS 0x0001
126#define CMD_BSS_TYPE_IBSS 0x0002 122#define CMD_BSS_TYPE_IBSS 0x0002
127#define CMD_BSS_TYPE_ANY 0x0003 123#define CMD_BSS_TYPE_ANY 0x0003
128 124
129/* Define action or option for CMD_802_11_SCAN */ 125/* Define action or option for CMD_802_11_SCAN */
130#define CMD_SCAN_TYPE_ACTIVE 0x0000 126#define CMD_SCAN_TYPE_ACTIVE 0x0000
131#define CMD_SCAN_TYPE_PASSIVE 0x0001 127#define CMD_SCAN_TYPE_PASSIVE 0x0001
132 128
133#define CMD_SCAN_RADIO_TYPE_BG 0 129#define CMD_SCAN_RADIO_TYPE_BG 0
134 130
135#define CMD_SCAN_PROBE_DELAY_TIME 0 131#define CMD_SCAN_PROBE_DELAY_TIME 0
136 132
137/* Define action or option for CMD_MAC_CONTROL */ 133/* Define action or option for CMD_MAC_CONTROL */
138#define CMD_ACT_MAC_RX_ON 0x0001 134#define CMD_ACT_MAC_RX_ON 0x0001
139#define CMD_ACT_MAC_TX_ON 0x0002 135#define CMD_ACT_MAC_TX_ON 0x0002
140#define CMD_ACT_MAC_LOOPBACK_ON 0x0004 136#define CMD_ACT_MAC_LOOPBACK_ON 0x0004
141#define CMD_ACT_MAC_WEP_ENABLE 0x0008 137#define CMD_ACT_MAC_WEP_ENABLE 0x0008
142#define CMD_ACT_MAC_INT_ENABLE 0x0010 138#define CMD_ACT_MAC_INT_ENABLE 0x0010
143#define CMD_ACT_MAC_MULTICAST_ENABLE 0x0020 139#define CMD_ACT_MAC_MULTICAST_ENABLE 0x0020
144#define CMD_ACT_MAC_BROADCAST_ENABLE 0x0040 140#define CMD_ACT_MAC_BROADCAST_ENABLE 0x0040
145#define CMD_ACT_MAC_PROMISCUOUS_ENABLE 0x0080 141#define CMD_ACT_MAC_PROMISCUOUS_ENABLE 0x0080
146#define CMD_ACT_MAC_ALL_MULTICAST_ENABLE 0x0100 142#define CMD_ACT_MAC_ALL_MULTICAST_ENABLE 0x0100
147#define CMD_ACT_MAC_STRICT_PROTECTION_ENABLE 0x0400 143#define CMD_ACT_MAC_STRICT_PROTECTION_ENABLE 0x0400
148 144
149/* Event flags for CMD_802_11_SUBSCRIBE_EVENT */ 145/* Event flags for CMD_802_11_SUBSCRIBE_EVENT */
150#define CMD_SUBSCRIBE_RSSI_LOW 0x0001 146#define CMD_SUBSCRIBE_RSSI_LOW 0x0001
151#define CMD_SUBSCRIBE_SNR_LOW 0x0002 147#define CMD_SUBSCRIBE_SNR_LOW 0x0002
152#define CMD_SUBSCRIBE_FAILCOUNT 0x0004 148#define CMD_SUBSCRIBE_FAILCOUNT 0x0004
153#define CMD_SUBSCRIBE_BCNMISS 0x0008 149#define CMD_SUBSCRIBE_BCNMISS 0x0008
154#define CMD_SUBSCRIBE_RSSI_HIGH 0x0010 150#define CMD_SUBSCRIBE_RSSI_HIGH 0x0010
155#define CMD_SUBSCRIBE_SNR_HIGH 0x0020 151#define CMD_SUBSCRIBE_SNR_HIGH 0x0020
156 152
157#define RADIO_PREAMBLE_LONG 0x00 153#define RADIO_PREAMBLE_LONG 0x00
158#define RADIO_PREAMBLE_SHORT 0x02 154#define RADIO_PREAMBLE_SHORT 0x02
159#define RADIO_PREAMBLE_AUTO 0x04 155#define RADIO_PREAMBLE_AUTO 0x04
160 156
161/* Define action or option for CMD_802_11_RF_CHANNEL */ 157/* Define action or option for CMD_802_11_RF_CHANNEL */
162#define CMD_OPT_802_11_RF_CHANNEL_GET 0x00 158#define CMD_OPT_802_11_RF_CHANNEL_GET 0x00
163#define CMD_OPT_802_11_RF_CHANNEL_SET 0x01 159#define CMD_OPT_802_11_RF_CHANNEL_SET 0x01
164 160
165/* Define action or option for CMD_802_11_DATA_RATE */ 161/* Define action or option for CMD_802_11_DATA_RATE */
166#define CMD_ACT_SET_TX_AUTO 0x0000 162#define CMD_ACT_SET_TX_AUTO 0x0000
167#define CMD_ACT_SET_TX_FIX_RATE 0x0001 163#define CMD_ACT_SET_TX_FIX_RATE 0x0001
168#define CMD_ACT_GET_TX_RATE 0x0002 164#define CMD_ACT_GET_TX_RATE 0x0002
169
170#define CMD_ACT_SET_RX 0x0001
171#define CMD_ACT_SET_TX 0x0002
172#define CMD_ACT_SET_BOTH 0x0003
173#define CMD_ACT_GET_RX 0x0004
174#define CMD_ACT_GET_TX 0x0008
175#define CMD_ACT_GET_BOTH 0x000c
176 165
177/* Define action or option for CMD_802_11_PS_MODE */ 166/* Define action or option for CMD_802_11_PS_MODE */
178#define CMD_TYPE_CAM 0x0000 167#define CMD_TYPE_CAM 0x0000
179#define CMD_TYPE_MAX_PSP 0x0001 168#define CMD_TYPE_MAX_PSP 0x0001
180#define CMD_TYPE_FAST_PSP 0x0002 169#define CMD_TYPE_FAST_PSP 0x0002
181 170
182/* Options for CMD_802_11_FW_WAKE_METHOD */ 171/* Options for CMD_802_11_FW_WAKE_METHOD */
183#define CMD_WAKE_METHOD_UNCHANGED 0x0000 172#define CMD_WAKE_METHOD_UNCHANGED 0x0000
184#define CMD_WAKE_METHOD_COMMAND_INT 0x0001 173#define CMD_WAKE_METHOD_COMMAND_INT 0x0001
185#define CMD_WAKE_METHOD_GPIO 0x0002 174#define CMD_WAKE_METHOD_GPIO 0x0002
186 175
187/* Object IDs for CMD_802_11_SNMP_MIB */ 176/* Object IDs for CMD_802_11_SNMP_MIB */
188#define SNMP_MIB_OID_BSS_TYPE 0x0000 177#define SNMP_MIB_OID_BSS_TYPE 0x0000
189#define SNMP_MIB_OID_OP_RATE_SET 0x0001 178#define SNMP_MIB_OID_OP_RATE_SET 0x0001
190#define SNMP_MIB_OID_BEACON_PERIOD 0x0002 /* Reserved on v9+ */ 179#define SNMP_MIB_OID_BEACON_PERIOD 0x0002 /* Reserved on v9+ */
191#define SNMP_MIB_OID_DTIM_PERIOD 0x0003 /* Reserved on v9+ */ 180#define SNMP_MIB_OID_DTIM_PERIOD 0x0003 /* Reserved on v9+ */
192#define SNMP_MIB_OID_ASSOC_TIMEOUT 0x0004 /* Reserved on v9+ */ 181#define SNMP_MIB_OID_ASSOC_TIMEOUT 0x0004 /* Reserved on v9+ */
193#define SNMP_MIB_OID_RTS_THRESHOLD 0x0005 182#define SNMP_MIB_OID_RTS_THRESHOLD 0x0005
194#define SNMP_MIB_OID_SHORT_RETRY_LIMIT 0x0006 183#define SNMP_MIB_OID_SHORT_RETRY_LIMIT 0x0006
195#define SNMP_MIB_OID_LONG_RETRY_LIMIT 0x0007 184#define SNMP_MIB_OID_LONG_RETRY_LIMIT 0x0007
196#define SNMP_MIB_OID_FRAG_THRESHOLD 0x0008 185#define SNMP_MIB_OID_FRAG_THRESHOLD 0x0008
197#define SNMP_MIB_OID_11D_ENABLE 0x0009 186#define SNMP_MIB_OID_11D_ENABLE 0x0009
198#define SNMP_MIB_OID_11H_ENABLE 0x000A 187#define SNMP_MIB_OID_11H_ENABLE 0x000A
199 188
200/* Define action or option for CMD_BT_ACCESS */ 189/* Define action or option for CMD_BT_ACCESS */
201enum cmd_bt_access_opts { 190enum cmd_bt_access_opts {
@@ -302,4 +291,672 @@ enum cmd_mesh_config_types {
302#define MACREG_INT_CODE_MESH_AUTO_STARTED 35 291#define MACREG_INT_CODE_MESH_AUTO_STARTED 35
303#define MACREG_INT_CODE_FIRMWARE_READY 48 292#define MACREG_INT_CODE_FIRMWARE_READY 48
304 293
294
295/* 802.11-related definitions */
296
297/* TxPD descriptor */
298struct txpd {
299 /* union to cope up with later FW revisions */
300 union {
301 /* Current Tx packet status */
302 __le32 tx_status;
303 struct {
304 /* BSS type: client, AP, etc. */
305 u8 bss_type;
306 /* BSS number */
307 u8 bss_num;
308 /* Reserved */
309 __le16 reserved;
310 } bss;
311 } u;
312 /* Tx control */
313 __le32 tx_control;
314 __le32 tx_packet_location;
315 /* Tx packet length */
316 __le16 tx_packet_length;
317 /* First 2 byte of destination MAC address */
318 u8 tx_dest_addr_high[2];
319 /* Last 4 byte of destination MAC address */
320 u8 tx_dest_addr_low[4];
321 /* Pkt Priority */
322 u8 priority;
323 /* Pkt Trasnit Power control */
324 u8 powermgmt;
325 /* Amount of time the packet has been queued (units = 2ms) */
326 u8 pktdelay_2ms;
327 /* reserved */
328 u8 reserved1;
329} __attribute__ ((packed));
330
331/* RxPD Descriptor */
332struct rxpd {
333 /* union to cope up with later FW revisions */
334 union {
335 /* Current Rx packet status */
336 __le16 status;
337 struct {
338 /* BSS type: client, AP, etc. */
339 u8 bss_type;
340 /* BSS number */
341 u8 bss_num;
342 } __attribute__ ((packed)) bss;
343 } __attribute__ ((packed)) u;
344
345 /* SNR */
346 u8 snr;
347
348 /* Tx control */
349 u8 rx_control;
350
351 /* Pkt length */
352 __le16 pkt_len;
353
354 /* Noise Floor */
355 u8 nf;
356
357 /* Rx Packet Rate */
358 u8 rx_rate;
359
360 /* Pkt addr */
361 __le32 pkt_ptr;
362
363 /* Next Rx RxPD addr */
364 __le32 next_rxpd_ptr;
365
366 /* Pkt Priority */
367 u8 priority;
368 u8 reserved[3];
369} __attribute__ ((packed));
370
371struct cmd_header {
372 __le16 command;
373 __le16 size;
374 __le16 seqnum;
375 __le16 result;
376} __attribute__ ((packed));
377
378/* Generic structure to hold all key types. */
379struct enc_key {
380 u16 len;
381 u16 flags; /* KEY_INFO_* from defs.h */
382 u16 type; /* KEY_TYPE_* from defs.h */
383 u8 key[32];
384};
385
386/* lbs_offset_value */
387struct lbs_offset_value {
388 u32 offset;
389 u32 value;
390} __attribute__ ((packed));
391
392/*
393 * Define data structure for CMD_GET_HW_SPEC
394 * This structure defines the response for the GET_HW_SPEC command
395 */
396struct cmd_ds_get_hw_spec {
397 struct cmd_header hdr;
398
399 /* HW Interface version number */
400 __le16 hwifversion;
401 /* HW version number */
402 __le16 version;
403 /* Max number of TxPD FW can handle */
404 __le16 nr_txpd;
405 /* Max no of Multicast address */
406 __le16 nr_mcast_adr;
407 /* MAC address */
408 u8 permanentaddr[6];
409
410 /* region Code */
411 __le16 regioncode;
412
413 /* Number of antenna used */
414 __le16 nr_antenna;
415
416 /* FW release number, example 0x01030304 = 2.3.4p1 */
417 __le32 fwrelease;
418
419 /* Base Address of TxPD queue */
420 __le32 wcb_base;
421 /* Read Pointer of RxPd queue */
422 __le32 rxpd_rdptr;
423
424 /* Write Pointer of RxPd queue */
425 __le32 rxpd_wrptr;
426
427 /*FW/HW capability */
428 __le32 fwcapinfo;
429} __attribute__ ((packed));
430
431struct cmd_ds_802_11_subscribe_event {
432 struct cmd_header hdr;
433
434 __le16 action;
435 __le16 events;
436
437 /* A TLV to the CMD_802_11_SUBSCRIBE_EVENT command can contain a
438 * number of TLVs. From the v5.1 manual, those TLVs would add up to
439 * 40 bytes. However, future firmware might add additional TLVs, so I
440 * bump this up a bit.
441 */
442 uint8_t tlv[128];
443} __attribute__ ((packed));
444
445/*
446 * This scan handle Country Information IE(802.11d compliant)
447 * Define data structure for CMD_802_11_SCAN
448 */
449struct cmd_ds_802_11_scan {
450 struct cmd_header hdr;
451
452 uint8_t bsstype;
453 uint8_t bssid[ETH_ALEN];
454 uint8_t tlvbuffer[0];
455} __attribute__ ((packed));
456
457struct cmd_ds_802_11_scan_rsp {
458 struct cmd_header hdr;
459
460 __le16 bssdescriptsize;
461 uint8_t nr_sets;
462 uint8_t bssdesc_and_tlvbuffer[0];
463} __attribute__ ((packed));
464
465struct cmd_ds_802_11_get_log {
466 struct cmd_header hdr;
467
468 __le32 mcasttxframe;
469 __le32 failed;
470 __le32 retry;
471 __le32 multiretry;
472 __le32 framedup;
473 __le32 rtssuccess;
474 __le32 rtsfailure;
475 __le32 ackfailure;
476 __le32 rxfrag;
477 __le32 mcastrxframe;
478 __le32 fcserror;
479 __le32 txframe;
480 __le32 wepundecryptable;
481} __attribute__ ((packed));
482
483struct cmd_ds_mac_control {
484 struct cmd_header hdr;
485 __le16 action;
486 u16 reserved;
487} __attribute__ ((packed));
488
489struct cmd_ds_mac_multicast_adr {
490 struct cmd_header hdr;
491 __le16 action;
492 __le16 nr_of_adrs;
493 u8 maclist[ETH_ALEN * MRVDRV_MAX_MULTICAST_LIST_SIZE];
494} __attribute__ ((packed));
495
496struct cmd_ds_802_11_authenticate {
497 struct cmd_header hdr;
498
499 u8 bssid[ETH_ALEN];
500 u8 authtype;
501 u8 reserved[10];
502} __attribute__ ((packed));
503
504struct cmd_ds_802_11_deauthenticate {
505 struct cmd_header hdr;
506
507 u8 macaddr[ETH_ALEN];
508 __le16 reasoncode;
509} __attribute__ ((packed));
510
511struct cmd_ds_802_11_associate {
512 struct cmd_header hdr;
513
514 u8 bssid[6];
515 __le16 capability;
516 __le16 listeninterval;
517 __le16 bcnperiod;
518 u8 dtimperiod;
519 u8 iebuf[512]; /* Enough for required and most optional IEs */
520} __attribute__ ((packed));
521
522struct cmd_ds_802_11_associate_response {
523 struct cmd_header hdr;
524
525 __le16 capability;
526 __le16 statuscode;
527 __le16 aid;
528 u8 iebuf[512];
529} __attribute__ ((packed));
530
531struct cmd_ds_802_11_set_wep {
532 struct cmd_header hdr;
533
534 /* ACT_ADD, ACT_REMOVE or ACT_ENABLE */
535 __le16 action;
536
537 /* key Index selected for Tx */
538 __le16 keyindex;
539
540 /* 40, 128bit or TXWEP */
541 uint8_t keytype[4];
542 uint8_t keymaterial[4][16];
543} __attribute__ ((packed));
544
545struct cmd_ds_802_11_snmp_mib {
546 struct cmd_header hdr;
547
548 __le16 action;
549 __le16 oid;
550 __le16 bufsize;
551 u8 value[128];
552} __attribute__ ((packed));
553
554struct cmd_ds_mac_reg_access {
555 __le16 action;
556 __le16 offset;
557 __le32 value;
558} __attribute__ ((packed));
559
560struct cmd_ds_bbp_reg_access {
561 __le16 action;
562 __le16 offset;
563 u8 value;
564 u8 reserved[3];
565} __attribute__ ((packed));
566
567struct cmd_ds_rf_reg_access {
568 __le16 action;
569 __le16 offset;
570 u8 value;
571 u8 reserved[3];
572} __attribute__ ((packed));
573
574struct cmd_ds_802_11_radio_control {
575 struct cmd_header hdr;
576
577 __le16 action;
578 __le16 control;
579} __attribute__ ((packed));
580
581struct cmd_ds_802_11_beacon_control {
582 __le16 action;
583 __le16 beacon_enable;
584 __le16 beacon_period;
585} __attribute__ ((packed));
586
587struct cmd_ds_802_11_sleep_params {
588 struct cmd_header hdr;
589
590 /* ACT_GET/ACT_SET */
591 __le16 action;
592
593 /* Sleep clock error in ppm */
594 __le16 error;
595
596 /* Wakeup offset in usec */
597 __le16 offset;
598
599 /* Clock stabilization time in usec */
600 __le16 stabletime;
601
602 /* control periodic calibration */
603 uint8_t calcontrol;
604
605 /* control the use of external sleep clock */
606 uint8_t externalsleepclk;
607
608 /* reserved field, should be set to zero */
609 __le16 reserved;
610} __attribute__ ((packed));
611
612struct cmd_ds_802_11_rf_channel {
613 struct cmd_header hdr;
614
615 __le16 action;
616 __le16 channel;
617 __le16 rftype; /* unused */
618 __le16 reserved; /* unused */
619 u8 channellist[32]; /* unused */
620} __attribute__ ((packed));
621
622struct cmd_ds_802_11_rssi {
623 /* weighting factor */
624 __le16 N;
625
626 __le16 reserved_0;
627 __le16 reserved_1;
628 __le16 reserved_2;
629} __attribute__ ((packed));
630
631struct cmd_ds_802_11_rssi_rsp {
632 __le16 SNR;
633 __le16 noisefloor;
634 __le16 avgSNR;
635 __le16 avgnoisefloor;
636} __attribute__ ((packed));
637
638struct cmd_ds_802_11_mac_address {
639 struct cmd_header hdr;
640
641 __le16 action;
642 u8 macadd[ETH_ALEN];
643} __attribute__ ((packed));
644
645struct cmd_ds_802_11_rf_tx_power {
646 struct cmd_header hdr;
647
648 __le16 action;
649 __le16 curlevel;
650 s8 maxlevel;
651 s8 minlevel;
652} __attribute__ ((packed));
653
654struct cmd_ds_802_11_monitor_mode {
655 __le16 action;
656 __le16 mode;
657} __attribute__ ((packed));
658
659struct cmd_ds_set_boot2_ver {
660 struct cmd_header hdr;
661
662 __le16 action;
663 __le16 version;
664} __attribute__ ((packed));
665
666struct cmd_ds_802_11_fw_wake_method {
667 struct cmd_header hdr;
668
669 __le16 action;
670 __le16 method;
671} __attribute__ ((packed));
672
673struct cmd_ds_802_11_ps_mode {
674 __le16 action;
675 __le16 nullpktinterval;
676 __le16 multipledtim;
677 __le16 reserved;
678 __le16 locallisteninterval;
679} __attribute__ ((packed));
680
681struct cmd_confirm_sleep {
682 struct cmd_header hdr;
683
684 __le16 action;
685 __le16 nullpktinterval;
686 __le16 multipledtim;
687 __le16 reserved;
688 __le16 locallisteninterval;
689} __attribute__ ((packed));
690
691struct cmd_ds_802_11_data_rate {
692 struct cmd_header hdr;
693
694 __le16 action;
695 __le16 reserved;
696 u8 rates[MAX_RATES];
697} __attribute__ ((packed));
698
699struct cmd_ds_802_11_rate_adapt_rateset {
700 struct cmd_header hdr;
701 __le16 action;
702 __le16 enablehwauto;
703 __le16 bitmap;
704} __attribute__ ((packed));
705
706struct cmd_ds_802_11_ad_hoc_start {
707 struct cmd_header hdr;
708
709 u8 ssid[IEEE80211_MAX_SSID_LEN];
710 u8 bsstype;
711 __le16 beaconperiod;
712 u8 dtimperiod; /* Reserved on v9 and later */
713 struct ieee_ie_ibss_param_set ibss;
714 u8 reserved1[4];
715 struct ieee_ie_ds_param_set ds;
716 u8 reserved2[4];
717 __le16 probedelay; /* Reserved on v9 and later */
718 __le16 capability;
719 u8 rates[MAX_RATES];
720 u8 tlv_memory_size_pad[100];
721} __attribute__ ((packed));
722
723struct cmd_ds_802_11_ad_hoc_result {
724 struct cmd_header hdr;
725
726 u8 pad[3];
727 u8 bssid[ETH_ALEN];
728} __attribute__ ((packed));
729
730struct adhoc_bssdesc {
731 u8 bssid[ETH_ALEN];
732 u8 ssid[IEEE80211_MAX_SSID_LEN];
733 u8 type;
734 __le16 beaconperiod;
735 u8 dtimperiod;
736 __le64 timestamp;
737 __le64 localtime;
738 struct ieee_ie_ds_param_set ds;
739 u8 reserved1[4];
740 struct ieee_ie_ibss_param_set ibss;
741 u8 reserved2[4];
742 __le16 capability;
743 u8 rates[MAX_RATES];
744
745 /* DO NOT ADD ANY FIELDS TO THIS STRUCTURE. It is used below in the
746 * Adhoc join command and will cause a binary layout mismatch with
747 * the firmware
748 */
749} __attribute__ ((packed));
750
751struct cmd_ds_802_11_ad_hoc_join {
752 struct cmd_header hdr;
753
754 struct adhoc_bssdesc bss;
755 __le16 failtimeout; /* Reserved on v9 and later */
756 __le16 probedelay; /* Reserved on v9 and later */
757} __attribute__ ((packed));
758
759struct cmd_ds_802_11_ad_hoc_stop {
760 struct cmd_header hdr;
761} __attribute__ ((packed));
762
763struct cmd_ds_802_11_enable_rsn {
764 struct cmd_header hdr;
765
766 __le16 action;
767 __le16 enable;
768} __attribute__ ((packed));
769
770struct MrvlIEtype_keyParamSet {
771 /* type ID */
772 __le16 type;
773
774 /* length of Payload */
775 __le16 length;
776
777 /* type of key: WEP=0, TKIP=1, AES=2 */
778 __le16 keytypeid;
779
780 /* key control Info specific to a keytypeid */
781 __le16 keyinfo;
782
783 /* length of key */
784 __le16 keylen;
785
786 /* key material of size keylen */
787 u8 key[32];
788} __attribute__ ((packed));
789
790#define MAX_WOL_RULES 16
791
792struct host_wol_rule {
793 uint8_t rule_no;
794 uint8_t rule_ops;
795 __le16 sig_offset;
796 __le16 sig_length;
797 __le16 reserve;
798 __be32 sig_mask;
799 __be32 signature;
800} __attribute__ ((packed));
801
802struct wol_config {
803 uint8_t action;
804 uint8_t pattern;
805 uint8_t no_rules_in_cmd;
806 uint8_t result;
807 struct host_wol_rule rule[MAX_WOL_RULES];
808} __attribute__ ((packed));
809
810struct cmd_ds_host_sleep {
811 struct cmd_header hdr;
812 __le32 criteria;
813 uint8_t gpio;
814 uint16_t gap;
815 struct wol_config wol_conf;
816} __attribute__ ((packed));
817
818
819
820struct cmd_ds_802_11_key_material {
821 struct cmd_header hdr;
822
823 __le16 action;
824 struct MrvlIEtype_keyParamSet keyParamSet[2];
825} __attribute__ ((packed));
826
827struct cmd_ds_802_11_eeprom_access {
828 struct cmd_header hdr;
829 __le16 action;
830 __le16 offset;
831 __le16 len;
832 /* firmware says it returns a maximum of 20 bytes */
833#define LBS_EEPROM_READ_LEN 20
834 u8 value[LBS_EEPROM_READ_LEN];
835} __attribute__ ((packed));
836
837struct cmd_ds_802_11_tpc_cfg {
838 struct cmd_header hdr;
839
840 __le16 action;
841 uint8_t enable;
842 int8_t P0;
843 int8_t P1;
844 int8_t P2;
845 uint8_t usesnr;
846} __attribute__ ((packed));
847
848
849struct cmd_ds_802_11_pa_cfg {
850 struct cmd_header hdr;
851
852 __le16 action;
853 uint8_t enable;
854 int8_t P0;
855 int8_t P1;
856 int8_t P2;
857} __attribute__ ((packed));
858
859
860struct cmd_ds_802_11_led_ctrl {
861 __le16 action;
862 __le16 numled;
863 u8 data[256];
864} __attribute__ ((packed));
865
866struct cmd_ds_802_11_afc {
867 __le16 afc_auto;
868 union {
869 struct {
870 __le16 threshold;
871 __le16 period;
872 };
873 struct {
874 __le16 timing_offset; /* signed */
875 __le16 carrier_offset; /* signed */
876 };
877 };
878} __attribute__ ((packed));
879
880struct cmd_tx_rate_query {
881 __le16 txrate;
882} __attribute__ ((packed));
883
884struct cmd_ds_get_tsf {
885 __le64 tsfvalue;
886} __attribute__ ((packed));
887
888struct cmd_ds_bt_access {
889 __le16 action;
890 __le32 id;
891 u8 addr1[ETH_ALEN];
892 u8 addr2[ETH_ALEN];
893} __attribute__ ((packed));
894
895struct cmd_ds_fwt_access {
896 __le16 action;
897 __le32 id;
898 u8 valid;
899 u8 da[ETH_ALEN];
900 u8 dir;
901 u8 ra[ETH_ALEN];
902 __le32 ssn;
903 __le32 dsn;
904 __le32 metric;
905 u8 rate;
906 u8 hopcount;
907 u8 ttl;
908 __le32 expiration;
909 u8 sleepmode;
910 __le32 snr;
911 __le32 references;
912 u8 prec[ETH_ALEN];
913} __attribute__ ((packed));
914
915struct cmd_ds_mesh_config {
916 struct cmd_header hdr;
917
918 __le16 action;
919 __le16 channel;
920 __le16 type;
921 __le16 length;
922 u8 data[128]; /* last position reserved */
923} __attribute__ ((packed));
924
925struct cmd_ds_mesh_access {
926 struct cmd_header hdr;
927
928 __le16 action;
929 __le32 data[32]; /* last position reserved */
930} __attribute__ ((packed));
931
932/* Number of stats counters returned by the firmware */
933#define MESH_STATS_NUM 8
934
935struct cmd_ds_command {
936 /* command header */
937 __le16 command;
938 __le16 size;
939 __le16 seqnum;
940 __le16 result;
941
942 /* command Body */
943 union {
944 struct cmd_ds_802_11_ps_mode psmode;
945 struct cmd_ds_802_11_monitor_mode monitor;
946 struct cmd_ds_802_11_rssi rssi;
947 struct cmd_ds_802_11_rssi_rsp rssirsp;
948 struct cmd_ds_mac_reg_access macreg;
949 struct cmd_ds_bbp_reg_access bbpreg;
950 struct cmd_ds_rf_reg_access rfreg;
951
952 struct cmd_ds_802_11_tpc_cfg tpccfg;
953 struct cmd_ds_802_11_afc afc;
954 struct cmd_ds_802_11_led_ctrl ledgpio;
955
956 struct cmd_ds_bt_access bt;
957 struct cmd_ds_fwt_access fwt;
958 struct cmd_ds_802_11_beacon_control bcn_ctrl;
959 } params;
960} __attribute__ ((packed));
961
305#endif 962#endif
diff --git a/drivers/net/wireless/libertas/hostcmd.h b/drivers/net/wireless/libertas/hostcmd.h
deleted file mode 100644
index c8a1998d4744..000000000000
--- a/drivers/net/wireless/libertas/hostcmd.h
+++ /dev/null
@@ -1,800 +0,0 @@
1/*
2 * This file contains the function prototypes, data structure
3 * and defines for all the host/station commands
4 */
5#ifndef _LBS_HOSTCMD_H
6#define _LBS_HOSTCMD_H
7
8#include <linux/wireless.h>
9#include "11d.h"
10#include "types.h"
11
12/* 802.11-related definitions */
13
14/* TxPD descriptor */
15struct txpd {
16 /* union to cope up with later FW revisions */
17 union {
18 /* Current Tx packet status */
19 __le32 tx_status;
20 struct {
21 /* BSS type: client, AP, etc. */
22 u8 bss_type;
23 /* BSS number */
24 u8 bss_num;
25 /* Reserved */
26 __le16 reserved;
27 } bss;
28 } u;
29 /* Tx control */
30 __le32 tx_control;
31 __le32 tx_packet_location;
32 /* Tx packet length */
33 __le16 tx_packet_length;
34 /* First 2 byte of destination MAC address */
35 u8 tx_dest_addr_high[2];
36 /* Last 4 byte of destination MAC address */
37 u8 tx_dest_addr_low[4];
38 /* Pkt Priority */
39 u8 priority;
40 /* Pkt Trasnit Power control */
41 u8 powermgmt;
42 /* Amount of time the packet has been queued in the driver (units = 2ms) */
43 u8 pktdelay_2ms;
44 /* reserved */
45 u8 reserved1;
46} __attribute__ ((packed));
47
48/* RxPD Descriptor */
49struct rxpd {
50 /* union to cope up with later FW revisions */
51 union {
52 /* Current Rx packet status */
53 __le16 status;
54 struct {
55 /* BSS type: client, AP, etc. */
56 u8 bss_type;
57 /* BSS number */
58 u8 bss_num;
59 } __attribute__ ((packed)) bss;
60 } __attribute__ ((packed)) u;
61
62 /* SNR */
63 u8 snr;
64
65 /* Tx control */
66 u8 rx_control;
67
68 /* Pkt length */
69 __le16 pkt_len;
70
71 /* Noise Floor */
72 u8 nf;
73
74 /* Rx Packet Rate */
75 u8 rx_rate;
76
77 /* Pkt addr */
78 __le32 pkt_ptr;
79
80 /* Next Rx RxPD addr */
81 __le32 next_rxpd_ptr;
82
83 /* Pkt Priority */
84 u8 priority;
85 u8 reserved[3];
86} __attribute__ ((packed));
87
88struct cmd_header {
89 __le16 command;
90 __le16 size;
91 __le16 seqnum;
92 __le16 result;
93} __attribute__ ((packed));
94
95struct cmd_ctrl_node {
96 struct list_head list;
97 int result;
98 /* command response */
99 int (*callback)(struct lbs_private *, unsigned long, struct cmd_header *);
100 unsigned long callback_arg;
101 /* command data */
102 struct cmd_header *cmdbuf;
103 /* wait queue */
104 u16 cmdwaitqwoken;
105 wait_queue_head_t cmdwait_q;
106};
107
108/* Generic structure to hold all key types. */
109struct enc_key {
110 u16 len;
111 u16 flags; /* KEY_INFO_* from defs.h */
112 u16 type; /* KEY_TYPE_* from defs.h */
113 u8 key[32];
114};
115
116/* lbs_offset_value */
117struct lbs_offset_value {
118 u32 offset;
119 u32 value;
120} __attribute__ ((packed));
121
122/* Define general data structure */
123/* cmd_DS_GEN */
124struct cmd_ds_gen {
125 __le16 command;
126 __le16 size;
127 __le16 seqnum;
128 __le16 result;
129 void *cmdresp[0];
130} __attribute__ ((packed));
131
132#define S_DS_GEN sizeof(struct cmd_ds_gen)
133
134
135/*
136 * Define data structure for CMD_GET_HW_SPEC
137 * This structure defines the response for the GET_HW_SPEC command
138 */
139struct cmd_ds_get_hw_spec {
140 struct cmd_header hdr;
141
142 /* HW Interface version number */
143 __le16 hwifversion;
144 /* HW version number */
145 __le16 version;
146 /* Max number of TxPD FW can handle */
147 __le16 nr_txpd;
148 /* Max no of Multicast address */
149 __le16 nr_mcast_adr;
150 /* MAC address */
151 u8 permanentaddr[6];
152
153 /* region Code */
154 __le16 regioncode;
155
156 /* Number of antenna used */
157 __le16 nr_antenna;
158
159 /* FW release number, example 0x01030304 = 2.3.4p1 */
160 __le32 fwrelease;
161
162 /* Base Address of TxPD queue */
163 __le32 wcb_base;
164 /* Read Pointer of RxPd queue */
165 __le32 rxpd_rdptr;
166
167 /* Write Pointer of RxPd queue */
168 __le32 rxpd_wrptr;
169
170 /*FW/HW capability */
171 __le32 fwcapinfo;
172} __attribute__ ((packed));
173
174struct cmd_ds_802_11_subscribe_event {
175 struct cmd_header hdr;
176
177 __le16 action;
178 __le16 events;
179
180 /* A TLV to the CMD_802_11_SUBSCRIBE_EVENT command can contain a
181 * number of TLVs. From the v5.1 manual, those TLVs would add up to
182 * 40 bytes. However, future firmware might add additional TLVs, so I
183 * bump this up a bit.
184 */
185 uint8_t tlv[128];
186} __attribute__ ((packed));
187
188/*
189 * This scan handle Country Information IE(802.11d compliant)
190 * Define data structure for CMD_802_11_SCAN
191 */
192struct cmd_ds_802_11_scan {
193 struct cmd_header hdr;
194
195 uint8_t bsstype;
196 uint8_t bssid[ETH_ALEN];
197 uint8_t tlvbuffer[0];
198#if 0
199 mrvlietypes_ssidparamset_t ssidParamSet;
200 mrvlietypes_chanlistparamset_t ChanListParamSet;
201 mrvlietypes_ratesparamset_t OpRateSet;
202#endif
203} __attribute__ ((packed));
204
205struct cmd_ds_802_11_scan_rsp {
206 struct cmd_header hdr;
207
208 __le16 bssdescriptsize;
209 uint8_t nr_sets;
210 uint8_t bssdesc_and_tlvbuffer[0];
211} __attribute__ ((packed));
212
213struct cmd_ds_802_11_get_log {
214 struct cmd_header hdr;
215
216 __le32 mcasttxframe;
217 __le32 failed;
218 __le32 retry;
219 __le32 multiretry;
220 __le32 framedup;
221 __le32 rtssuccess;
222 __le32 rtsfailure;
223 __le32 ackfailure;
224 __le32 rxfrag;
225 __le32 mcastrxframe;
226 __le32 fcserror;
227 __le32 txframe;
228 __le32 wepundecryptable;
229} __attribute__ ((packed));
230
231struct cmd_ds_mac_control {
232 struct cmd_header hdr;
233 __le16 action;
234 u16 reserved;
235} __attribute__ ((packed));
236
237struct cmd_ds_mac_multicast_adr {
238 struct cmd_header hdr;
239 __le16 action;
240 __le16 nr_of_adrs;
241 u8 maclist[ETH_ALEN * MRVDRV_MAX_MULTICAST_LIST_SIZE];
242} __attribute__ ((packed));
243
244struct cmd_ds_gspi_bus_config {
245 struct cmd_header hdr;
246 __le16 action;
247 __le16 bus_delay_mode;
248 __le16 host_time_delay_to_read_port;
249 __le16 host_time_delay_to_read_register;
250} __attribute__ ((packed));
251
252struct cmd_ds_802_11_authenticate {
253 struct cmd_header hdr;
254
255 u8 bssid[ETH_ALEN];
256 u8 authtype;
257 u8 reserved[10];
258} __attribute__ ((packed));
259
260struct cmd_ds_802_11_deauthenticate {
261 struct cmd_header hdr;
262
263 u8 macaddr[ETH_ALEN];
264 __le16 reasoncode;
265} __attribute__ ((packed));
266
267struct cmd_ds_802_11_associate {
268 struct cmd_header hdr;
269
270 u8 bssid[6];
271 __le16 capability;
272 __le16 listeninterval;
273 __le16 bcnperiod;
274 u8 dtimperiod;
275 u8 iebuf[512]; /* Enough for required and most optional IEs */
276} __attribute__ ((packed));
277
278struct cmd_ds_802_11_associate_response {
279 struct cmd_header hdr;
280
281 __le16 capability;
282 __le16 statuscode;
283 __le16 aid;
284 u8 iebuf[512];
285} __attribute__ ((packed));
286
287struct cmd_ds_802_11_set_wep {
288 struct cmd_header hdr;
289
290 /* ACT_ADD, ACT_REMOVE or ACT_ENABLE */
291 __le16 action;
292
293 /* key Index selected for Tx */
294 __le16 keyindex;
295
296 /* 40, 128bit or TXWEP */
297 uint8_t keytype[4];
298 uint8_t keymaterial[4][16];
299} __attribute__ ((packed));
300
301struct cmd_ds_802_3_get_stat {
302 __le32 xmitok;
303 __le32 rcvok;
304 __le32 xmiterror;
305 __le32 rcverror;
306 __le32 rcvnobuffer;
307 __le32 rcvcrcerror;
308} __attribute__ ((packed));
309
310struct cmd_ds_802_11_get_stat {
311 __le32 txfragmentcnt;
312 __le32 mcasttxframecnt;
313 __le32 failedcnt;
314 __le32 retrycnt;
315 __le32 Multipleretrycnt;
316 __le32 rtssuccesscnt;
317 __le32 rtsfailurecnt;
318 __le32 ackfailurecnt;
319 __le32 frameduplicatecnt;
320 __le32 rxfragmentcnt;
321 __le32 mcastrxframecnt;
322 __le32 fcserrorcnt;
323 __le32 bcasttxframecnt;
324 __le32 bcastrxframecnt;
325 __le32 txbeacon;
326 __le32 rxbeacon;
327 __le32 wepundecryptable;
328} __attribute__ ((packed));
329
330struct cmd_ds_802_11_snmp_mib {
331 struct cmd_header hdr;
332
333 __le16 action;
334 __le16 oid;
335 __le16 bufsize;
336 u8 value[128];
337} __attribute__ ((packed));
338
339struct cmd_ds_mac_reg_map {
340 __le16 buffersize;
341 u8 regmap[128];
342 __le16 reserved;
343} __attribute__ ((packed));
344
345struct cmd_ds_bbp_reg_map {
346 __le16 buffersize;
347 u8 regmap[128];
348 __le16 reserved;
349} __attribute__ ((packed));
350
351struct cmd_ds_rf_reg_map {
352 __le16 buffersize;
353 u8 regmap[64];
354 __le16 reserved;
355} __attribute__ ((packed));
356
357struct cmd_ds_mac_reg_access {
358 __le16 action;
359 __le16 offset;
360 __le32 value;
361} __attribute__ ((packed));
362
363struct cmd_ds_bbp_reg_access {
364 __le16 action;
365 __le16 offset;
366 u8 value;
367 u8 reserved[3];
368} __attribute__ ((packed));
369
370struct cmd_ds_rf_reg_access {
371 __le16 action;
372 __le16 offset;
373 u8 value;
374 u8 reserved[3];
375} __attribute__ ((packed));
376
377struct cmd_ds_802_11_radio_control {
378 struct cmd_header hdr;
379
380 __le16 action;
381 __le16 control;
382} __attribute__ ((packed));
383
384struct cmd_ds_802_11_beacon_control {
385 __le16 action;
386 __le16 beacon_enable;
387 __le16 beacon_period;
388} __attribute__ ((packed));
389
390struct cmd_ds_802_11_sleep_params {
391 struct cmd_header hdr;
392
393 /* ACT_GET/ACT_SET */
394 __le16 action;
395
396 /* Sleep clock error in ppm */
397 __le16 error;
398
399 /* Wakeup offset in usec */
400 __le16 offset;
401
402 /* Clock stabilization time in usec */
403 __le16 stabletime;
404
405 /* control periodic calibration */
406 uint8_t calcontrol;
407
408 /* control the use of external sleep clock */
409 uint8_t externalsleepclk;
410
411 /* reserved field, should be set to zero */
412 __le16 reserved;
413} __attribute__ ((packed));
414
415struct cmd_ds_802_11_inactivity_timeout {
416 struct cmd_header hdr;
417
418 /* ACT_GET/ACT_SET */
419 __le16 action;
420
421 /* Inactivity timeout in msec */
422 __le16 timeout;
423} __attribute__ ((packed));
424
425struct cmd_ds_802_11_rf_channel {
426 struct cmd_header hdr;
427
428 __le16 action;
429 __le16 channel;
430 __le16 rftype; /* unused */
431 __le16 reserved; /* unused */
432 u8 channellist[32]; /* unused */
433} __attribute__ ((packed));
434
435struct cmd_ds_802_11_rssi {
436 /* weighting factor */
437 __le16 N;
438
439 __le16 reserved_0;
440 __le16 reserved_1;
441 __le16 reserved_2;
442} __attribute__ ((packed));
443
444struct cmd_ds_802_11_rssi_rsp {
445 __le16 SNR;
446 __le16 noisefloor;
447 __le16 avgSNR;
448 __le16 avgnoisefloor;
449} __attribute__ ((packed));
450
451struct cmd_ds_802_11_mac_address {
452 struct cmd_header hdr;
453
454 __le16 action;
455 u8 macadd[ETH_ALEN];
456} __attribute__ ((packed));
457
458struct cmd_ds_802_11_rf_tx_power {
459 struct cmd_header hdr;
460
461 __le16 action;
462 __le16 curlevel;
463 s8 maxlevel;
464 s8 minlevel;
465} __attribute__ ((packed));
466
467struct cmd_ds_802_11_rf_antenna {
468 __le16 action;
469
470 /* Number of antennas or 0xffff(diversity) */
471 __le16 antennamode;
472
473} __attribute__ ((packed));
474
475struct cmd_ds_802_11_monitor_mode {
476 __le16 action;
477 __le16 mode;
478} __attribute__ ((packed));
479
480struct cmd_ds_set_boot2_ver {
481 struct cmd_header hdr;
482
483 __le16 action;
484 __le16 version;
485} __attribute__ ((packed));
486
487struct cmd_ds_802_11_fw_wake_method {
488 struct cmd_header hdr;
489
490 __le16 action;
491 __le16 method;
492} __attribute__ ((packed));
493
494struct cmd_ds_802_11_sleep_period {
495 struct cmd_header hdr;
496
497 __le16 action;
498 __le16 period;
499} __attribute__ ((packed));
500
501struct cmd_ds_802_11_ps_mode {
502 __le16 action;
503 __le16 nullpktinterval;
504 __le16 multipledtim;
505 __le16 reserved;
506 __le16 locallisteninterval;
507} __attribute__ ((packed));
508
509struct cmd_confirm_sleep {
510 struct cmd_header hdr;
511
512 __le16 action;
513 __le16 nullpktinterval;
514 __le16 multipledtim;
515 __le16 reserved;
516 __le16 locallisteninterval;
517} __attribute__ ((packed));
518
519struct cmd_ds_802_11_data_rate {
520 struct cmd_header hdr;
521
522 __le16 action;
523 __le16 reserved;
524 u8 rates[MAX_RATES];
525} __attribute__ ((packed));
526
527struct cmd_ds_802_11_rate_adapt_rateset {
528 struct cmd_header hdr;
529 __le16 action;
530 __le16 enablehwauto;
531 __le16 bitmap;
532} __attribute__ ((packed));
533
534struct cmd_ds_802_11_ad_hoc_start {
535 struct cmd_header hdr;
536
537 u8 ssid[IW_ESSID_MAX_SIZE];
538 u8 bsstype;
539 __le16 beaconperiod;
540 u8 dtimperiod; /* Reserved on v9 and later */
541 struct ieee_ie_ibss_param_set ibss;
542 u8 reserved1[4];
543 struct ieee_ie_ds_param_set ds;
544 u8 reserved2[4];
545 __le16 probedelay; /* Reserved on v9 and later */
546 __le16 capability;
547 u8 rates[MAX_RATES];
548 u8 tlv_memory_size_pad[100];
549} __attribute__ ((packed));
550
551struct cmd_ds_802_11_ad_hoc_result {
552 struct cmd_header hdr;
553
554 u8 pad[3];
555 u8 bssid[ETH_ALEN];
556} __attribute__ ((packed));
557
558struct adhoc_bssdesc {
559 u8 bssid[ETH_ALEN];
560 u8 ssid[IW_ESSID_MAX_SIZE];
561 u8 type;
562 __le16 beaconperiod;
563 u8 dtimperiod;
564 __le64 timestamp;
565 __le64 localtime;
566 struct ieee_ie_ds_param_set ds;
567 u8 reserved1[4];
568 struct ieee_ie_ibss_param_set ibss;
569 u8 reserved2[4];
570 __le16 capability;
571 u8 rates[MAX_RATES];
572
573 /* DO NOT ADD ANY FIELDS TO THIS STRUCTURE. It is used below in the
574 * Adhoc join command and will cause a binary layout mismatch with
575 * the firmware
576 */
577} __attribute__ ((packed));
578
579struct cmd_ds_802_11_ad_hoc_join {
580 struct cmd_header hdr;
581
582 struct adhoc_bssdesc bss;
583 __le16 failtimeout; /* Reserved on v9 and later */
584 __le16 probedelay; /* Reserved on v9 and later */
585} __attribute__ ((packed));
586
587struct cmd_ds_802_11_ad_hoc_stop {
588 struct cmd_header hdr;
589} __attribute__ ((packed));
590
591struct cmd_ds_802_11_enable_rsn {
592 struct cmd_header hdr;
593
594 __le16 action;
595 __le16 enable;
596} __attribute__ ((packed));
597
598struct MrvlIEtype_keyParamSet {
599 /* type ID */
600 __le16 type;
601
602 /* length of Payload */
603 __le16 length;
604
605 /* type of key: WEP=0, TKIP=1, AES=2 */
606 __le16 keytypeid;
607
608 /* key control Info specific to a keytypeid */
609 __le16 keyinfo;
610
611 /* length of key */
612 __le16 keylen;
613
614 /* key material of size keylen */
615 u8 key[32];
616} __attribute__ ((packed));
617
618#define MAX_WOL_RULES 16
619
620struct host_wol_rule {
621 uint8_t rule_no;
622 uint8_t rule_ops;
623 __le16 sig_offset;
624 __le16 sig_length;
625 __le16 reserve;
626 __be32 sig_mask;
627 __be32 signature;
628} __attribute__ ((packed));
629
630struct wol_config {
631 uint8_t action;
632 uint8_t pattern;
633 uint8_t no_rules_in_cmd;
634 uint8_t result;
635 struct host_wol_rule rule[MAX_WOL_RULES];
636} __attribute__ ((packed));
637
638struct cmd_ds_host_sleep {
639 struct cmd_header hdr;
640 __le32 criteria;
641 uint8_t gpio;
642 uint16_t gap;
643 struct wol_config wol_conf;
644} __attribute__ ((packed));
645
646
647
648struct cmd_ds_802_11_key_material {
649 struct cmd_header hdr;
650
651 __le16 action;
652 struct MrvlIEtype_keyParamSet keyParamSet[2];
653} __attribute__ ((packed));
654
655struct cmd_ds_802_11_eeprom_access {
656 struct cmd_header hdr;
657 __le16 action;
658 __le16 offset;
659 __le16 len;
660 /* firmware says it returns a maximum of 20 bytes */
661#define LBS_EEPROM_READ_LEN 20
662 u8 value[LBS_EEPROM_READ_LEN];
663} __attribute__ ((packed));
664
665struct cmd_ds_802_11_tpc_cfg {
666 struct cmd_header hdr;
667
668 __le16 action;
669 uint8_t enable;
670 int8_t P0;
671 int8_t P1;
672 int8_t P2;
673 uint8_t usesnr;
674} __attribute__ ((packed));
675
676
677struct cmd_ds_802_11_pa_cfg {
678 struct cmd_header hdr;
679
680 __le16 action;
681 uint8_t enable;
682 int8_t P0;
683 int8_t P1;
684 int8_t P2;
685} __attribute__ ((packed));
686
687
688struct cmd_ds_802_11_led_ctrl {
689 __le16 action;
690 __le16 numled;
691 u8 data[256];
692} __attribute__ ((packed));
693
694struct cmd_ds_802_11_afc {
695 __le16 afc_auto;
696 union {
697 struct {
698 __le16 threshold;
699 __le16 period;
700 };
701 struct {
702 __le16 timing_offset; /* signed */
703 __le16 carrier_offset; /* signed */
704 };
705 };
706} __attribute__ ((packed));
707
708struct cmd_tx_rate_query {
709 __le16 txrate;
710} __attribute__ ((packed));
711
712struct cmd_ds_get_tsf {
713 __le64 tsfvalue;
714} __attribute__ ((packed));
715
716struct cmd_ds_bt_access {
717 __le16 action;
718 __le32 id;
719 u8 addr1[ETH_ALEN];
720 u8 addr2[ETH_ALEN];
721} __attribute__ ((packed));
722
723struct cmd_ds_fwt_access {
724 __le16 action;
725 __le32 id;
726 u8 valid;
727 u8 da[ETH_ALEN];
728 u8 dir;
729 u8 ra[ETH_ALEN];
730 __le32 ssn;
731 __le32 dsn;
732 __le32 metric;
733 u8 rate;
734 u8 hopcount;
735 u8 ttl;
736 __le32 expiration;
737 u8 sleepmode;
738 __le32 snr;
739 __le32 references;
740 u8 prec[ETH_ALEN];
741} __attribute__ ((packed));
742
743
744struct cmd_ds_mesh_config {
745 struct cmd_header hdr;
746
747 __le16 action;
748 __le16 channel;
749 __le16 type;
750 __le16 length;
751 u8 data[128]; /* last position reserved */
752} __attribute__ ((packed));
753
754
755struct cmd_ds_mesh_access {
756 struct cmd_header hdr;
757
758 __le16 action;
759 __le32 data[32]; /* last position reserved */
760} __attribute__ ((packed));
761
762/* Number of stats counters returned by the firmware */
763#define MESH_STATS_NUM 8
764
765struct cmd_ds_command {
766 /* command header */
767 __le16 command;
768 __le16 size;
769 __le16 seqnum;
770 __le16 result;
771
772 /* command Body */
773 union {
774 struct cmd_ds_802_11_ps_mode psmode;
775 struct cmd_ds_802_11_get_stat gstat;
776 struct cmd_ds_802_3_get_stat gstat_8023;
777 struct cmd_ds_802_11_rf_antenna rant;
778 struct cmd_ds_802_11_monitor_mode monitor;
779 struct cmd_ds_802_11_rssi rssi;
780 struct cmd_ds_802_11_rssi_rsp rssirsp;
781 struct cmd_ds_mac_reg_access macreg;
782 struct cmd_ds_bbp_reg_access bbpreg;
783 struct cmd_ds_rf_reg_access rfreg;
784
785 struct cmd_ds_802_11d_domain_info domaininfo;
786 struct cmd_ds_802_11d_domain_info domaininforesp;
787
788 struct cmd_ds_802_11_tpc_cfg tpccfg;
789 struct cmd_ds_802_11_afc afc;
790 struct cmd_ds_802_11_led_ctrl ledgpio;
791
792 struct cmd_tx_rate_query txrate;
793 struct cmd_ds_bt_access bt;
794 struct cmd_ds_fwt_access fwt;
795 struct cmd_ds_get_tsf gettsf;
796 struct cmd_ds_802_11_beacon_control bcn_ctrl;
797 } params;
798} __attribute__ ((packed));
799
800#endif
diff --git a/drivers/net/wireless/libertas/if_cs.c b/drivers/net/wireless/libertas/if_cs.c
index 62381768f2d5..6d55439a7b97 100644
--- a/drivers/net/wireless/libertas/if_cs.c
+++ b/drivers/net/wireless/libertas/if_cs.c
@@ -22,6 +22,7 @@
22*/ 22*/
23 23
24#include <linux/module.h> 24#include <linux/module.h>
25#include <linux/slab.h>
25#include <linux/delay.h> 26#include <linux/delay.h>
26#include <linux/moduleparam.h> 27#include <linux/moduleparam.h>
27#include <linux/firmware.h> 28#include <linux/firmware.h>
@@ -48,6 +49,7 @@
48MODULE_AUTHOR("Holger Schurig <hs4233@mail.mn-solutions.de>"); 49MODULE_AUTHOR("Holger Schurig <hs4233@mail.mn-solutions.de>");
49MODULE_DESCRIPTION("Driver for Marvell 83xx compact flash WLAN cards"); 50MODULE_DESCRIPTION("Driver for Marvell 83xx compact flash WLAN cards");
50MODULE_LICENSE("GPL"); 51MODULE_LICENSE("GPL");
52MODULE_FIRMWARE("libertas_cs_helper.fw");
51 53
52 54
53 55
@@ -590,7 +592,7 @@ static int if_cs_prog_helper(struct if_cs_card *card)
590 592
591 /* TODO: make firmware file configurable */ 593 /* TODO: make firmware file configurable */
592 ret = request_firmware(&fw, "libertas_cs_helper.fw", 594 ret = request_firmware(&fw, "libertas_cs_helper.fw",
593 &handle_to_dev(card->p_dev)); 595 &card->p_dev->dev);
594 if (ret) { 596 if (ret) {
595 lbs_pr_err("can't load helper firmware\n"); 597 lbs_pr_err("can't load helper firmware\n");
596 ret = -ENODEV; 598 ret = -ENODEV;
@@ -663,7 +665,7 @@ static int if_cs_prog_real(struct if_cs_card *card)
663 665
664 /* TODO: make firmware file configurable */ 666 /* TODO: make firmware file configurable */
665 ret = request_firmware(&fw, "libertas_cs.fw", 667 ret = request_firmware(&fw, "libertas_cs.fw",
666 &handle_to_dev(card->p_dev)); 668 &card->p_dev->dev);
667 if (ret) { 669 if (ret) {
668 lbs_pr_err("can't load firmware\n"); 670 lbs_pr_err("can't load firmware\n");
669 ret = -ENODEV; 671 ret = -ENODEV;
@@ -793,18 +795,37 @@ static void if_cs_release(struct pcmcia_device *p_dev)
793 * configure the card at this point -- we wait until we receive a card 795 * configure the card at this point -- we wait until we receive a card
794 * insertion event. 796 * insertion event.
795 */ 797 */
798
799static int if_cs_ioprobe(struct pcmcia_device *p_dev,
800 cistpl_cftable_entry_t *cfg,
801 cistpl_cftable_entry_t *dflt,
802 unsigned int vcc,
803 void *priv_data)
804{
805 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
806 p_dev->io.BasePort1 = cfg->io.win[0].base;
807 p_dev->io.NumPorts1 = cfg->io.win[0].len;
808
809 /* Do we need to allocate an interrupt? */
810 if (cfg->irq.IRQInfo1)
811 p_dev->conf.Attributes |= CONF_ENABLE_IRQ;
812
813 /* IO window settings */
814 if (cfg->io.nwin != 1) {
815 lbs_pr_err("wrong CIS (check number of IO windows)\n");
816 return -ENODEV;
817 }
818
819 /* This reserves IO space but doesn't actually enable it */
820 return pcmcia_request_io(p_dev, &p_dev->io);
821}
822
796static int if_cs_probe(struct pcmcia_device *p_dev) 823static int if_cs_probe(struct pcmcia_device *p_dev)
797{ 824{
798 int ret = -ENOMEM; 825 int ret = -ENOMEM;
799 unsigned int prod_id; 826 unsigned int prod_id;
800 struct lbs_private *priv; 827 struct lbs_private *priv;
801 struct if_cs_card *card; 828 struct if_cs_card *card;
802 /* CIS parsing */
803 tuple_t tuple;
804 cisparse_t parse;
805 cistpl_cftable_entry_t *cfg = &parse.cftable_entry;
806 cistpl_io_t *io = &cfg->io;
807 u_char buf[64];
808 829
809 lbs_deb_enter(LBS_DEB_CS); 830 lbs_deb_enter(LBS_DEB_CS);
810 831
@@ -818,48 +839,15 @@ static int if_cs_probe(struct pcmcia_device *p_dev)
818 839
819 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING; 840 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
820 p_dev->irq.Handler = NULL; 841 p_dev->irq.Handler = NULL;
821 p_dev->irq.IRQInfo1 = IRQ_INFO2_VALID | IRQ_LEVEL_ID;
822 842
823 p_dev->conf.Attributes = 0; 843 p_dev->conf.Attributes = 0;
824 p_dev->conf.IntType = INT_MEMORY_AND_IO; 844 p_dev->conf.IntType = INT_MEMORY_AND_IO;
825 845
826 tuple.Attributes = 0; 846 if (pcmcia_loop_config(p_dev, if_cs_ioprobe, NULL)) {
827 tuple.TupleData = buf; 847 lbs_pr_err("error in pcmcia_loop_config\n");
828 tuple.TupleDataMax = sizeof(buf);
829 tuple.TupleOffset = 0;
830
831 tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
832 if ((ret = pcmcia_get_first_tuple(p_dev, &tuple)) != 0 ||
833 (ret = pcmcia_get_tuple_data(p_dev, &tuple)) != 0 ||
834 (ret = pcmcia_parse_tuple(&tuple, &parse)) != 0)
835 {
836 lbs_pr_err("error in pcmcia_get_first_tuple etc\n");
837 goto out1;
838 }
839
840 p_dev->conf.ConfigIndex = cfg->index;
841
842 /* Do we need to allocate an interrupt? */
843 if (cfg->irq.IRQInfo1) {
844 p_dev->conf.Attributes |= CONF_ENABLE_IRQ;
845 }
846
847 /* IO window settings */
848 if (cfg->io.nwin != 1) {
849 lbs_pr_err("wrong CIS (check number of IO windows)\n");
850 ret = -ENODEV;
851 goto out1; 848 goto out1;
852 } 849 }
853 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
854 p_dev->io.BasePort1 = io->win[0].base;
855 p_dev->io.NumPorts1 = io->win[0].len;
856 850
857 /* This reserves IO space but doesn't actually enable it */
858 ret = pcmcia_request_io(p_dev, &p_dev->io);
859 if (ret) {
860 lbs_pr_err("error in pcmcia_request_io\n");
861 goto out1;
862 }
863 851
864 /* 852 /*
865 * Allocate an interrupt line. Note that this does not assign 853 * Allocate an interrupt line. Note that this does not assign
@@ -946,6 +934,9 @@ static int if_cs_probe(struct pcmcia_device *p_dev)
946 card->priv = priv; 934 card->priv = priv;
947 priv->card = card; 935 priv->card = card;
948 priv->hw_host_to_card = if_cs_host_to_card; 936 priv->hw_host_to_card = if_cs_host_to_card;
937 priv->enter_deep_sleep = NULL;
938 priv->exit_deep_sleep = NULL;
939 priv->reset_deep_sleep_wakeup = NULL;
949 priv->fw_ready = 1; 940 priv->fw_ready = 1;
950 941
951 /* Now actually get the IRQ */ 942 /* Now actually get the IRQ */
diff --git a/drivers/net/wireless/libertas/if_sdio.c b/drivers/net/wireless/libertas/if_sdio.c
index 485a8d406525..7d1a3c6b6ce0 100644
--- a/drivers/net/wireless/libertas/if_sdio.c
+++ b/drivers/net/wireless/libertas/if_sdio.c
@@ -28,6 +28,7 @@
28 28
29#include <linux/kernel.h> 29#include <linux/kernel.h>
30#include <linux/moduleparam.h> 30#include <linux/moduleparam.h>
31#include <linux/slab.h>
31#include <linux/firmware.h> 32#include <linux/firmware.h>
32#include <linux/netdevice.h> 33#include <linux/netdevice.h>
33#include <linux/delay.h> 34#include <linux/delay.h>
@@ -99,6 +100,12 @@ static struct if_sdio_model if_sdio_models[] = {
99 .firmware = "sd8688.bin", 100 .firmware = "sd8688.bin",
100 }, 101 },
101}; 102};
103MODULE_FIRMWARE("sd8385_helper.bin");
104MODULE_FIRMWARE("sd8385.bin");
105MODULE_FIRMWARE("sd8686_helper.bin");
106MODULE_FIRMWARE("sd8686.bin");
107MODULE_FIRMWARE("sd8688_helper.bin");
108MODULE_FIRMWARE("sd8688.bin");
102 109
103struct if_sdio_packet { 110struct if_sdio_packet {
104 struct if_sdio_packet *next; 111 struct if_sdio_packet *next;
@@ -831,6 +838,58 @@ out:
831 return ret; 838 return ret;
832} 839}
833 840
841static int if_sdio_enter_deep_sleep(struct lbs_private *priv)
842{
843 int ret = -1;
844 struct cmd_header cmd;
845
846 memset(&cmd, 0, sizeof(cmd));
847
848 lbs_deb_sdio("send DEEP_SLEEP command\n");
849 ret = __lbs_cmd(priv, CMD_802_11_DEEP_SLEEP, &cmd, sizeof(cmd),
850 lbs_cmd_copyback, (unsigned long) &cmd);
851 if (ret)
852 lbs_pr_err("DEEP_SLEEP cmd failed\n");
853
854 mdelay(200);
855 return ret;
856}
857
858static int if_sdio_exit_deep_sleep(struct lbs_private *priv)
859{
860 struct if_sdio_card *card = priv->card;
861 int ret = -1;
862
863 lbs_deb_enter(LBS_DEB_SDIO);
864 sdio_claim_host(card->func);
865
866 sdio_writeb(card->func, HOST_POWER_UP, CONFIGURATION_REG, &ret);
867 if (ret)
868 lbs_pr_err("sdio_writeb failed!\n");
869
870 sdio_release_host(card->func);
871 lbs_deb_leave_args(LBS_DEB_SDIO, "ret %d", ret);
872 return ret;
873}
874
875static int if_sdio_reset_deep_sleep_wakeup(struct lbs_private *priv)
876{
877 struct if_sdio_card *card = priv->card;
878 int ret = -1;
879
880 lbs_deb_enter(LBS_DEB_SDIO);
881 sdio_claim_host(card->func);
882
883 sdio_writeb(card->func, 0, CONFIGURATION_REG, &ret);
884 if (ret)
885 lbs_pr_err("sdio_writeb failed!\n");
886
887 sdio_release_host(card->func);
888 lbs_deb_leave_args(LBS_DEB_SDIO, "ret %d", ret);
889 return ret;
890
891}
892
834/*******************************************************************/ 893/*******************************************************************/
835/* SDIO callbacks */ 894/* SDIO callbacks */
836/*******************************************************************/ 895/*******************************************************************/
@@ -859,6 +918,7 @@ static void if_sdio_interrupt(struct sdio_func *func)
859 * Ignore the define name, this really means the card has 918 * Ignore the define name, this really means the card has
860 * successfully received the command. 919 * successfully received the command.
861 */ 920 */
921 card->priv->is_activity_detected = 1;
862 if (cause & IF_SDIO_H_INT_DNLD) 922 if (cause & IF_SDIO_H_INT_DNLD)
863 lbs_host_to_card_done(card->priv); 923 lbs_host_to_card_done(card->priv);
864 924
@@ -934,7 +994,7 @@ static int if_sdio_probe(struct sdio_func *func,
934 } 994 }
935 995
936 if (i == ARRAY_SIZE(if_sdio_models)) { 996 if (i == ARRAY_SIZE(if_sdio_models)) {
937 lbs_pr_err("unkown card model 0x%x\n", card->model); 997 lbs_pr_err("unknown card model 0x%x\n", card->model);
938 ret = -ENODEV; 998 ret = -ENODEV;
939 goto free; 999 goto free;
940 } 1000 }
@@ -998,6 +1058,9 @@ static int if_sdio_probe(struct sdio_func *func,
998 1058
999 priv->card = card; 1059 priv->card = card;
1000 priv->hw_host_to_card = if_sdio_host_to_card; 1060 priv->hw_host_to_card = if_sdio_host_to_card;
1061 priv->enter_deep_sleep = if_sdio_enter_deep_sleep;
1062 priv->exit_deep_sleep = if_sdio_exit_deep_sleep;
1063 priv->reset_deep_sleep_wakeup = if_sdio_reset_deep_sleep_wakeup;
1001 1064
1002 priv->fw_ready = 1; 1065 priv->fw_ready = 1;
1003 1066
diff --git a/drivers/net/wireless/libertas/if_sdio.h b/drivers/net/wireless/libertas/if_sdio.h
index 60c9b2fcef03..12179c1dc9c9 100644
--- a/drivers/net/wireless/libertas/if_sdio.h
+++ b/drivers/net/wireless/libertas/if_sdio.h
@@ -51,5 +51,6 @@
51#define IF_SDIO_EVENT 0x80fc 51#define IF_SDIO_EVENT 0x80fc
52 52
53#define IF_SDIO_BLOCK_SIZE 256 53#define IF_SDIO_BLOCK_SIZE 256
54 54#define CONFIGURATION_REG 0x03
55#define HOST_POWER_UP (0x1U << 1)
55#endif 56#endif
diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c
index 5b3672c4d0cc..fe3f08028eb3 100644
--- a/drivers/net/wireless/libertas/if_spi.c
+++ b/drivers/net/wireless/libertas/if_spi.c
@@ -23,6 +23,8 @@
23#include <linux/kthread.h> 23#include <linux/kthread.h>
24#include <linux/list.h> 24#include <linux/list.h>
25#include <linux/netdevice.h> 25#include <linux/netdevice.h>
26#include <linux/semaphore.h>
27#include <linux/slab.h>
26#include <linux/spi/libertas_spi.h> 28#include <linux/spi/libertas_spi.h>
27#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
28 30
@@ -32,12 +34,6 @@
32#include "dev.h" 34#include "dev.h"
33#include "if_spi.h" 35#include "if_spi.h"
34 36
35struct if_spi_packet {
36 struct list_head list;
37 u16 blen;
38 u8 buffer[0] __attribute__((aligned(4)));
39};
40
41struct if_spi_card { 37struct if_spi_card {
42 struct spi_device *spi; 38 struct spi_device *spi;
43 struct lbs_private *priv; 39 struct lbs_private *priv;
@@ -66,33 +62,10 @@ struct if_spi_card {
66 struct semaphore spi_thread_terminated; 62 struct semaphore spi_thread_terminated;
67 63
68 u8 cmd_buffer[IF_SPI_CMD_BUF_SIZE]; 64 u8 cmd_buffer[IF_SPI_CMD_BUF_SIZE];
69
70 /* A buffer of incoming packets from libertas core.
71 * Since we can't sleep in hw_host_to_card, we have to buffer
72 * them. */
73 struct list_head cmd_packet_list;
74 struct list_head data_packet_list;
75
76 /* Protects cmd_packet_list and data_packet_list */
77 spinlock_t buffer_lock;
78}; 65};
79 66
80static void free_if_spi_card(struct if_spi_card *card) 67static void free_if_spi_card(struct if_spi_card *card)
81{ 68{
82 struct list_head *cursor, *next;
83 struct if_spi_packet *packet;
84
85 BUG_ON(card->run_thread);
86 list_for_each_safe(cursor, next, &card->cmd_packet_list) {
87 packet = container_of(cursor, struct if_spi_packet, list);
88 list_del(&packet->list);
89 kfree(packet);
90 }
91 list_for_each_safe(cursor, next, &card->data_packet_list) {
92 packet = container_of(cursor, struct if_spi_packet, list);
93 list_del(&packet->list);
94 kfree(packet);
95 }
96 spi_set_drvdata(card->spi, NULL); 69 spi_set_drvdata(card->spi, NULL);
97 kfree(card); 70 kfree(card);
98} 71}
@@ -774,40 +747,6 @@ out:
774 return err; 747 return err;
775} 748}
776 749
777/* Move data or a command from the host to the card. */
778static void if_spi_h2c(struct if_spi_card *card,
779 struct if_spi_packet *packet, int type)
780{
781 int err = 0;
782 u16 int_type, port_reg;
783
784 switch (type) {
785 case MVMS_DAT:
786 int_type = IF_SPI_CIC_TX_DOWNLOAD_OVER;
787 port_reg = IF_SPI_DATA_RDWRPORT_REG;
788 break;
789 case MVMS_CMD:
790 int_type = IF_SPI_CIC_CMD_DOWNLOAD_OVER;
791 port_reg = IF_SPI_CMD_RDWRPORT_REG;
792 break;
793 default:
794 lbs_pr_err("can't transfer buffer of type %d\n", type);
795 err = -EINVAL;
796 goto out;
797 }
798
799 /* Write the data to the card */
800 err = spu_write(card, port_reg, packet->buffer, packet->blen);
801 if (err)
802 goto out;
803
804out:
805 kfree(packet);
806
807 if (err)
808 lbs_pr_err("%s: error %d\n", __func__, err);
809}
810
811/* Inform the host about a card event */ 750/* Inform the host about a card event */
812static void if_spi_e2h(struct if_spi_card *card) 751static void if_spi_e2h(struct if_spi_card *card)
813{ 752{
@@ -837,8 +776,6 @@ static int lbs_spi_thread(void *data)
837 int err; 776 int err;
838 struct if_spi_card *card = data; 777 struct if_spi_card *card = data;
839 u16 hiStatus; 778 u16 hiStatus;
840 unsigned long flags;
841 struct if_spi_packet *packet;
842 779
843 while (1) { 780 while (1) {
844 /* Wait to be woken up by one of two things. First, our ISR 781 /* Wait to be woken up by one of two things. First, our ISR
@@ -877,43 +814,9 @@ static int lbs_spi_thread(void *data)
877 if (hiStatus & IF_SPI_HIST_CMD_DOWNLOAD_RDY || 814 if (hiStatus & IF_SPI_HIST_CMD_DOWNLOAD_RDY ||
878 (card->priv->psstate != PS_STATE_FULL_POWER && 815 (card->priv->psstate != PS_STATE_FULL_POWER &&
879 (hiStatus & IF_SPI_HIST_TX_DOWNLOAD_RDY))) { 816 (hiStatus & IF_SPI_HIST_TX_DOWNLOAD_RDY))) {
880 /* This means two things. First of all,
881 * if there was a previous command sent, the card has
882 * successfully received it.
883 * Secondly, it is now ready to download another
884 * command.
885 */
886 lbs_host_to_card_done(card->priv); 817 lbs_host_to_card_done(card->priv);
887
888 /* Do we have any command packets from the host to
889 * send? */
890 packet = NULL;
891 spin_lock_irqsave(&card->buffer_lock, flags);
892 if (!list_empty(&card->cmd_packet_list)) {
893 packet = (struct if_spi_packet *)(card->
894 cmd_packet_list.next);
895 list_del(&packet->list);
896 }
897 spin_unlock_irqrestore(&card->buffer_lock, flags);
898
899 if (packet)
900 if_spi_h2c(card, packet, MVMS_CMD);
901 } 818 }
902 if (hiStatus & IF_SPI_HIST_TX_DOWNLOAD_RDY) {
903 /* Do we have any data packets from the host to
904 * send? */
905 packet = NULL;
906 spin_lock_irqsave(&card->buffer_lock, flags);
907 if (!list_empty(&card->data_packet_list)) {
908 packet = (struct if_spi_packet *)(card->
909 data_packet_list.next);
910 list_del(&packet->list);
911 }
912 spin_unlock_irqrestore(&card->buffer_lock, flags);
913 819
914 if (packet)
915 if_spi_h2c(card, packet, MVMS_DAT);
916 }
917 if (hiStatus & IF_SPI_HIST_CARD_EVENT) 820 if (hiStatus & IF_SPI_HIST_CARD_EVENT)
918 if_spi_e2h(card); 821 if_spi_e2h(card);
919 822
@@ -942,40 +845,18 @@ static int if_spi_host_to_card(struct lbs_private *priv,
942 u8 type, u8 *buf, u16 nb) 845 u8 type, u8 *buf, u16 nb)
943{ 846{
944 int err = 0; 847 int err = 0;
945 unsigned long flags;
946 struct if_spi_card *card = priv->card; 848 struct if_spi_card *card = priv->card;
947 struct if_spi_packet *packet;
948 u16 blen;
949 849
950 lbs_deb_enter_args(LBS_DEB_SPI, "type %d, bytes %d", type, nb); 850 lbs_deb_enter_args(LBS_DEB_SPI, "type %d, bytes %d", type, nb);
951 851
952 if (nb == 0) { 852 nb = ALIGN(nb, 4);
953 lbs_pr_err("%s: invalid size requested: %d\n", __func__, nb);
954 err = -EINVAL;
955 goto out;
956 }
957 blen = ALIGN(nb, 4);
958 packet = kzalloc(sizeof(struct if_spi_packet) + blen, GFP_ATOMIC);
959 if (!packet) {
960 err = -ENOMEM;
961 goto out;
962 }
963 packet->blen = blen;
964 memcpy(packet->buffer, buf, nb);
965 memset(packet->buffer + nb, 0, blen - nb);
966 853
967 switch (type) { 854 switch (type) {
968 case MVMS_CMD: 855 case MVMS_CMD:
969 priv->dnld_sent = DNLD_CMD_SENT; 856 err = spu_write(card, IF_SPI_CMD_RDWRPORT_REG, buf, nb);
970 spin_lock_irqsave(&card->buffer_lock, flags);
971 list_add_tail(&packet->list, &card->cmd_packet_list);
972 spin_unlock_irqrestore(&card->buffer_lock, flags);
973 break; 857 break;
974 case MVMS_DAT: 858 case MVMS_DAT:
975 priv->dnld_sent = DNLD_DATA_SENT; 859 err = spu_write(card, IF_SPI_DATA_RDWRPORT_REG, buf, nb);
976 spin_lock_irqsave(&card->buffer_lock, flags);
977 list_add_tail(&packet->list, &card->data_packet_list);
978 spin_unlock_irqrestore(&card->buffer_lock, flags);
979 break; 860 break;
980 default: 861 default:
981 lbs_pr_err("can't transfer buffer of type %d", type); 862 lbs_pr_err("can't transfer buffer of type %d", type);
@@ -983,9 +864,6 @@ static int if_spi_host_to_card(struct lbs_private *priv,
983 break; 864 break;
984 } 865 }
985 866
986 /* Wake up the spi thread */
987 up(&card->spi_ready);
988out:
989 lbs_deb_leave_args(LBS_DEB_SPI, "err=%d", err); 867 lbs_deb_leave_args(LBS_DEB_SPI, "err=%d", err);
990 return err; 868 return err;
991} 869}
@@ -1026,6 +904,10 @@ static int if_spi_calculate_fw_names(u16 card_id,
1026 chip_id_to_device_name[i].name); 904 chip_id_to_device_name[i].name);
1027 return 0; 905 return 0;
1028} 906}
907MODULE_FIRMWARE("libertas/gspi8385_hlp.bin");
908MODULE_FIRMWARE("libertas/gspi8385.bin");
909MODULE_FIRMWARE("libertas/gspi8686_hlp.bin");
910MODULE_FIRMWARE("libertas/gspi8686.bin");
1029 911
1030static int __devinit if_spi_probe(struct spi_device *spi) 912static int __devinit if_spi_probe(struct spi_device *spi)
1031{ 913{
@@ -1062,9 +944,6 @@ static int __devinit if_spi_probe(struct spi_device *spi)
1062 944
1063 sema_init(&card->spi_ready, 0); 945 sema_init(&card->spi_ready, 0);
1064 sema_init(&card->spi_thread_terminated, 0); 946 sema_init(&card->spi_thread_terminated, 0);
1065 INIT_LIST_HEAD(&card->cmd_packet_list);
1066 INIT_LIST_HEAD(&card->data_packet_list);
1067 spin_lock_init(&card->buffer_lock);
1068 947
1069 /* Initialize the SPI Interface Unit */ 948 /* Initialize the SPI Interface Unit */
1070 err = spu_init(card, pdata->use_dummy_writes); 949 err = spu_init(card, pdata->use_dummy_writes);
@@ -1117,6 +996,9 @@ static int __devinit if_spi_probe(struct spi_device *spi)
1117 card->priv = priv; 996 card->priv = priv;
1118 priv->card = card; 997 priv->card = card;
1119 priv->hw_host_to_card = if_spi_host_to_card; 998 priv->hw_host_to_card = if_spi_host_to_card;
999 priv->enter_deep_sleep = NULL;
1000 priv->exit_deep_sleep = NULL;
1001 priv->reset_deep_sleep_wakeup = NULL;
1120 priv->fw_ready = 1; 1002 priv->fw_ready = 1;
1121 1003
1122 /* Initialize interrupt handling stuff. */ 1004 /* Initialize interrupt handling stuff. */
@@ -1138,6 +1020,9 @@ static int __devinit if_spi_probe(struct spi_device *spi)
1138 goto terminate_thread; 1020 goto terminate_thread;
1139 } 1021 }
1140 1022
1023 /* poke the IRQ handler so that we don't miss the first interrupt */
1024 up(&card->spi_ready);
1025
1141 /* Start the card. 1026 /* Start the card.
1142 * This will call register_netdev, and we'll start 1027 * This will call register_netdev, and we'll start
1143 * getting interrupts... */ 1028 * getting interrupts... */
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c
index 3fac4efa5ac8..fcea5741ba62 100644
--- a/drivers/net/wireless/libertas/if_usb.c
+++ b/drivers/net/wireless/libertas/if_usb.c
@@ -5,6 +5,7 @@
5#include <linux/moduleparam.h> 5#include <linux/moduleparam.h>
6#include <linux/firmware.h> 6#include <linux/firmware.h>
7#include <linux/netdevice.h> 7#include <linux/netdevice.h>
8#include <linux/slab.h>
8#include <linux/usb.h> 9#include <linux/usb.h>
9 10
10#ifdef CONFIG_OLPC 11#ifdef CONFIG_OLPC
@@ -28,6 +29,8 @@
28static char *lbs_fw_name = "usb8388.bin"; 29static char *lbs_fw_name = "usb8388.bin";
29module_param_named(fw_name, lbs_fw_name, charp, 0644); 30module_param_named(fw_name, lbs_fw_name, charp, 0644);
30 31
32MODULE_FIRMWARE("usb8388.bin");
33
31static struct usb_device_id if_usb_table[] = { 34static struct usb_device_id if_usb_table[] = {
32 /* Enter the device signature inside */ 35 /* Enter the device signature inside */
33 { USB_DEVICE(0x1286, 0x2001) }, 36 { USB_DEVICE(0x1286, 0x2001) },
@@ -300,6 +303,9 @@ static int if_usb_probe(struct usb_interface *intf,
300 cardp->priv->fw_ready = 1; 303 cardp->priv->fw_ready = 1;
301 304
302 priv->hw_host_to_card = if_usb_host_to_card; 305 priv->hw_host_to_card = if_usb_host_to_card;
306 priv->enter_deep_sleep = NULL;
307 priv->exit_deep_sleep = NULL;
308 priv->reset_deep_sleep_wakeup = NULL;
303#ifdef CONFIG_OLPC 309#ifdef CONFIG_OLPC
304 if (machine_is_olpc()) 310 if (machine_is_olpc())
305 priv->reset_card = if_usb_reset_olpc_card; 311 priv->reset_card = if_usb_reset_olpc_card;
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c
index 87b4e497faa2..598080414b17 100644
--- a/drivers/net/wireless/libertas/main.c
+++ b/drivers/net/wireless/libertas/main.c
@@ -13,12 +13,15 @@
13#include <linux/kfifo.h> 13#include <linux/kfifo.h>
14#include <linux/stddef.h> 14#include <linux/stddef.h>
15#include <linux/ieee80211.h> 15#include <linux/ieee80211.h>
16#include <linux/slab.h>
16#include <net/iw_handler.h> 17#include <net/iw_handler.h>
18#include <net/cfg80211.h>
17 19
18#include "host.h" 20#include "host.h"
19#include "decl.h" 21#include "decl.h"
20#include "dev.h" 22#include "dev.h"
21#include "wext.h" 23#include "wext.h"
24#include "cfg.h"
22#include "debugfs.h" 25#include "debugfs.h"
23#include "scan.h" 26#include "scan.h"
24#include "assoc.h" 27#include "assoc.h"
@@ -43,119 +46,6 @@ module_param_named(libertas_debug, lbs_debug, int, 0644);
43struct cmd_confirm_sleep confirm_sleep; 46struct cmd_confirm_sleep confirm_sleep;
44 47
45 48
46#define LBS_TX_PWR_DEFAULT 20 /*100mW */
47#define LBS_TX_PWR_US_DEFAULT 20 /*100mW */
48#define LBS_TX_PWR_JP_DEFAULT 16 /*50mW */
49#define LBS_TX_PWR_FR_DEFAULT 20 /*100mW */
50#define LBS_TX_PWR_EMEA_DEFAULT 20 /*100mW */
51
52/* Format { channel, frequency (MHz), maxtxpower } */
53/* band: 'B/G', region: USA FCC/Canada IC */
54static struct chan_freq_power channel_freq_power_US_BG[] = {
55 {1, 2412, LBS_TX_PWR_US_DEFAULT},
56 {2, 2417, LBS_TX_PWR_US_DEFAULT},
57 {3, 2422, LBS_TX_PWR_US_DEFAULT},
58 {4, 2427, LBS_TX_PWR_US_DEFAULT},
59 {5, 2432, LBS_TX_PWR_US_DEFAULT},
60 {6, 2437, LBS_TX_PWR_US_DEFAULT},
61 {7, 2442, LBS_TX_PWR_US_DEFAULT},
62 {8, 2447, LBS_TX_PWR_US_DEFAULT},
63 {9, 2452, LBS_TX_PWR_US_DEFAULT},
64 {10, 2457, LBS_TX_PWR_US_DEFAULT},
65 {11, 2462, LBS_TX_PWR_US_DEFAULT}
66};
67
68/* band: 'B/G', region: Europe ETSI */
69static struct chan_freq_power channel_freq_power_EU_BG[] = {
70 {1, 2412, LBS_TX_PWR_EMEA_DEFAULT},
71 {2, 2417, LBS_TX_PWR_EMEA_DEFAULT},
72 {3, 2422, LBS_TX_PWR_EMEA_DEFAULT},
73 {4, 2427, LBS_TX_PWR_EMEA_DEFAULT},
74 {5, 2432, LBS_TX_PWR_EMEA_DEFAULT},
75 {6, 2437, LBS_TX_PWR_EMEA_DEFAULT},
76 {7, 2442, LBS_TX_PWR_EMEA_DEFAULT},
77 {8, 2447, LBS_TX_PWR_EMEA_DEFAULT},
78 {9, 2452, LBS_TX_PWR_EMEA_DEFAULT},
79 {10, 2457, LBS_TX_PWR_EMEA_DEFAULT},
80 {11, 2462, LBS_TX_PWR_EMEA_DEFAULT},
81 {12, 2467, LBS_TX_PWR_EMEA_DEFAULT},
82 {13, 2472, LBS_TX_PWR_EMEA_DEFAULT}
83};
84
85/* band: 'B/G', region: Spain */
86static struct chan_freq_power channel_freq_power_SPN_BG[] = {
87 {10, 2457, LBS_TX_PWR_DEFAULT},
88 {11, 2462, LBS_TX_PWR_DEFAULT}
89};
90
91/* band: 'B/G', region: France */
92static struct chan_freq_power channel_freq_power_FR_BG[] = {
93 {10, 2457, LBS_TX_PWR_FR_DEFAULT},
94 {11, 2462, LBS_TX_PWR_FR_DEFAULT},
95 {12, 2467, LBS_TX_PWR_FR_DEFAULT},
96 {13, 2472, LBS_TX_PWR_FR_DEFAULT}
97};
98
99/* band: 'B/G', region: Japan */
100static struct chan_freq_power channel_freq_power_JPN_BG[] = {
101 {1, 2412, LBS_TX_PWR_JP_DEFAULT},
102 {2, 2417, LBS_TX_PWR_JP_DEFAULT},
103 {3, 2422, LBS_TX_PWR_JP_DEFAULT},
104 {4, 2427, LBS_TX_PWR_JP_DEFAULT},
105 {5, 2432, LBS_TX_PWR_JP_DEFAULT},
106 {6, 2437, LBS_TX_PWR_JP_DEFAULT},
107 {7, 2442, LBS_TX_PWR_JP_DEFAULT},
108 {8, 2447, LBS_TX_PWR_JP_DEFAULT},
109 {9, 2452, LBS_TX_PWR_JP_DEFAULT},
110 {10, 2457, LBS_TX_PWR_JP_DEFAULT},
111 {11, 2462, LBS_TX_PWR_JP_DEFAULT},
112 {12, 2467, LBS_TX_PWR_JP_DEFAULT},
113 {13, 2472, LBS_TX_PWR_JP_DEFAULT},
114 {14, 2484, LBS_TX_PWR_JP_DEFAULT}
115};
116
117/**
118 * the structure for channel, frequency and power
119 */
120struct region_cfp_table {
121 u8 region;
122 struct chan_freq_power *cfp_BG;
123 int cfp_no_BG;
124};
125
126/**
127 * the structure for the mapping between region and CFP
128 */
129static struct region_cfp_table region_cfp_table[] = {
130 {0x10, /*US FCC */
131 channel_freq_power_US_BG,
132 ARRAY_SIZE(channel_freq_power_US_BG),
133 }
134 ,
135 {0x20, /*CANADA IC */
136 channel_freq_power_US_BG,
137 ARRAY_SIZE(channel_freq_power_US_BG),
138 }
139 ,
140 {0x30, /*EU*/ channel_freq_power_EU_BG,
141 ARRAY_SIZE(channel_freq_power_EU_BG),
142 }
143 ,
144 {0x31, /*SPAIN*/ channel_freq_power_SPN_BG,
145 ARRAY_SIZE(channel_freq_power_SPN_BG),
146 }
147 ,
148 {0x32, /*FRANCE*/ channel_freq_power_FR_BG,
149 ARRAY_SIZE(channel_freq_power_FR_BG),
150 }
151 ,
152 {0x40, /*JAPAN*/ channel_freq_power_JPN_BG,
153 ARRAY_SIZE(channel_freq_power_JPN_BG),
154 }
155 ,
156/*Add new region here */
157};
158
159/** 49/**
160 * the table to keep region code 50 * the table to keep region code
161 */ 51 */
@@ -163,13 +53,6 @@ u16 lbs_region_code_to_index[MRVDRV_MAX_REGION_CODE] =
163 { 0x10, 0x20, 0x30, 0x31, 0x32, 0x40 }; 53 { 0x10, 0x20, 0x30, 0x31, 0x32, 0x40 };
164 54
165/** 55/**
166 * 802.11b/g supported bitrates (in 500Kb/s units)
167 */
168u8 lbs_bg_rates[MAX_RATES] =
169 { 0x02, 0x04, 0x0b, 0x16, 0x0c, 0x12, 0x18, 0x24, 0x30, 0x48, 0x60, 0x6c,
1700x00, 0x00 };
171
172/**
173 * FW rate table. FW refers to rates by their index in this table, not by the 56 * FW rate table. FW refers to rates by their index in this table, not by the
174 * rate value itself. Values of 0x00 are 57 * rate value itself. Values of 0x00 are
175 * reserved positions. 58 * reserved positions.
@@ -212,107 +95,9 @@ u8 lbs_data_rate_to_fw_index(u32 rate)
212 return 0; 95 return 0;
213} 96}
214 97
215/**
216 * Attributes exported through sysfs
217 */
218
219/**
220 * @brief Get function for sysfs attribute anycast_mask
221 */
222static ssize_t lbs_anycast_get(struct device *dev,
223 struct device_attribute *attr, char * buf)
224{
225 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
226 struct cmd_ds_mesh_access mesh_access;
227 int ret;
228
229 memset(&mesh_access, 0, sizeof(mesh_access));
230
231 ret = lbs_mesh_access(priv, CMD_ACT_MESH_GET_ANYCAST, &mesh_access);
232 if (ret)
233 return ret;
234
235 return snprintf(buf, 12, "0x%X\n", le32_to_cpu(mesh_access.data[0]));
236}
237
238/**
239 * @brief Set function for sysfs attribute anycast_mask
240 */
241static ssize_t lbs_anycast_set(struct device *dev,
242 struct device_attribute *attr, const char * buf, size_t count)
243{
244 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
245 struct cmd_ds_mesh_access mesh_access;
246 uint32_t datum;
247 int ret;
248
249 memset(&mesh_access, 0, sizeof(mesh_access));
250 sscanf(buf, "%x", &datum);
251 mesh_access.data[0] = cpu_to_le32(datum);
252
253 ret = lbs_mesh_access(priv, CMD_ACT_MESH_SET_ANYCAST, &mesh_access);
254 if (ret)
255 return ret;
256
257 return strlen(buf);
258}
259
260/**
261 * @brief Get function for sysfs attribute prb_rsp_limit
262 */
263static ssize_t lbs_prb_rsp_limit_get(struct device *dev,
264 struct device_attribute *attr, char *buf)
265{
266 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
267 struct cmd_ds_mesh_access mesh_access;
268 int ret;
269 u32 retry_limit;
270
271 memset(&mesh_access, 0, sizeof(mesh_access));
272 mesh_access.data[0] = cpu_to_le32(CMD_ACT_GET);
273
274 ret = lbs_mesh_access(priv, CMD_ACT_MESH_SET_GET_PRB_RSP_LIMIT,
275 &mesh_access);
276 if (ret)
277 return ret;
278
279 retry_limit = le32_to_cpu(mesh_access.data[1]);
280 return snprintf(buf, 10, "%d\n", retry_limit);
281}
282
283/**
284 * @brief Set function for sysfs attribute prb_rsp_limit
285 */
286static ssize_t lbs_prb_rsp_limit_set(struct device *dev,
287 struct device_attribute *attr, const char *buf, size_t count)
288{
289 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
290 struct cmd_ds_mesh_access mesh_access;
291 int ret;
292 unsigned long retry_limit;
293
294 memset(&mesh_access, 0, sizeof(mesh_access));
295 mesh_access.data[0] = cpu_to_le32(CMD_ACT_SET);
296
297 if (!strict_strtoul(buf, 10, &retry_limit))
298 return -ENOTSUPP;
299 if (retry_limit > 15)
300 return -ENOTSUPP;
301
302 mesh_access.data[1] = cpu_to_le32(retry_limit);
303
304 ret = lbs_mesh_access(priv, CMD_ACT_MESH_SET_GET_PRB_RSP_LIMIT,
305 &mesh_access);
306 if (ret)
307 return ret;
308
309 return strlen(buf);
310}
311 98
312static int lbs_add_rtap(struct lbs_private *priv); 99static int lbs_add_rtap(struct lbs_private *priv);
313static void lbs_remove_rtap(struct lbs_private *priv); 100static void lbs_remove_rtap(struct lbs_private *priv);
314static int lbs_add_mesh(struct lbs_private *priv);
315static void lbs_remove_mesh(struct lbs_private *priv);
316 101
317 102
318/** 103/**
@@ -339,7 +124,7 @@ static ssize_t lbs_rtap_set(struct device *dev,
339 if (priv->monitormode == monitor_mode) 124 if (priv->monitormode == monitor_mode)
340 return strlen(buf); 125 return strlen(buf);
341 if (!priv->monitormode) { 126 if (!priv->monitormode) {
342 if (priv->infra_open || priv->mesh_open) 127 if (priv->infra_open || lbs_mesh_open(priv))
343 return -EBUSY; 128 return -EBUSY;
344 if (priv->mode == IW_MODE_INFRA) 129 if (priv->mode == IW_MODE_INFRA)
345 lbs_cmd_80211_deauthenticate(priv, 130 lbs_cmd_80211_deauthenticate(priv,
@@ -378,74 +163,7 @@ static ssize_t lbs_rtap_set(struct device *dev,
378static DEVICE_ATTR(lbs_rtap, 0644, lbs_rtap_get, lbs_rtap_set ); 163static DEVICE_ATTR(lbs_rtap, 0644, lbs_rtap_get, lbs_rtap_set );
379 164
380/** 165/**
381 * Get function for sysfs attribute mesh 166 * @brief This function opens the ethX interface
382 */
383static ssize_t lbs_mesh_get(struct device *dev,
384 struct device_attribute *attr, char * buf)
385{
386 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
387 return snprintf(buf, 5, "0x%X\n", !!priv->mesh_dev);
388}
389
390/**
391 * Set function for sysfs attribute mesh
392 */
393static ssize_t lbs_mesh_set(struct device *dev,
394 struct device_attribute *attr, const char * buf, size_t count)
395{
396 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
397 int enable;
398 int ret, action = CMD_ACT_MESH_CONFIG_STOP;
399
400 sscanf(buf, "%x", &enable);
401 enable = !!enable;
402 if (enable == !!priv->mesh_dev)
403 return count;
404 if (enable)
405 action = CMD_ACT_MESH_CONFIG_START;
406 ret = lbs_mesh_config(priv, action, priv->curbssparams.channel);
407 if (ret)
408 return ret;
409
410 if (enable)
411 lbs_add_mesh(priv);
412 else
413 lbs_remove_mesh(priv);
414
415 return count;
416}
417
418/**
419 * lbs_mesh attribute to be exported per ethX interface
420 * through sysfs (/sys/class/net/ethX/lbs_mesh)
421 */
422static DEVICE_ATTR(lbs_mesh, 0644, lbs_mesh_get, lbs_mesh_set);
423
424/**
425 * anycast_mask attribute to be exported per mshX interface
426 * through sysfs (/sys/class/net/mshX/anycast_mask)
427 */
428static DEVICE_ATTR(anycast_mask, 0644, lbs_anycast_get, lbs_anycast_set);
429
430/**
431 * prb_rsp_limit attribute to be exported per mshX interface
432 * through sysfs (/sys/class/net/mshX/prb_rsp_limit)
433 */
434static DEVICE_ATTR(prb_rsp_limit, 0644, lbs_prb_rsp_limit_get,
435 lbs_prb_rsp_limit_set);
436
437static struct attribute *lbs_mesh_sysfs_entries[] = {
438 &dev_attr_anycast_mask.attr,
439 &dev_attr_prb_rsp_limit.attr,
440 NULL,
441};
442
443static struct attribute_group lbs_mesh_attr_group = {
444 .attrs = lbs_mesh_sysfs_entries,
445};
446
447/**
448 * @brief This function opens the ethX or mshX interface
449 * 167 *
450 * @param dev A pointer to net_device structure 168 * @param dev A pointer to net_device structure
451 * @return 0 or -EBUSY if monitor mode active 169 * @return 0 or -EBUSY if monitor mode active
@@ -464,18 +182,12 @@ static int lbs_dev_open(struct net_device *dev)
464 goto out; 182 goto out;
465 } 183 }
466 184
467 if (dev == priv->mesh_dev) { 185 priv->infra_open = 1;
468 priv->mesh_open = 1;
469 priv->mesh_connect_status = LBS_CONNECTED;
470 netif_carrier_on(dev);
471 } else {
472 priv->infra_open = 1;
473 186
474 if (priv->connect_status == LBS_CONNECTED) 187 if (priv->connect_status == LBS_CONNECTED)
475 netif_carrier_on(dev); 188 netif_carrier_on(dev);
476 else 189 else
477 netif_carrier_off(dev); 190 netif_carrier_off(dev);
478 }
479 191
480 if (!priv->tx_pending_len) 192 if (!priv->tx_pending_len)
481 netif_wake_queue(dev); 193 netif_wake_queue(dev);
@@ -487,33 +199,6 @@ static int lbs_dev_open(struct net_device *dev)
487} 199}
488 200
489/** 201/**
490 * @brief This function closes the mshX interface
491 *
492 * @param dev A pointer to net_device structure
493 * @return 0
494 */
495static int lbs_mesh_stop(struct net_device *dev)
496{
497 struct lbs_private *priv = dev->ml_priv;
498
499 lbs_deb_enter(LBS_DEB_MESH);
500 spin_lock_irq(&priv->driver_lock);
501
502 priv->mesh_open = 0;
503 priv->mesh_connect_status = LBS_DISCONNECTED;
504
505 netif_stop_queue(dev);
506 netif_carrier_off(dev);
507
508 spin_unlock_irq(&priv->driver_lock);
509
510 schedule_work(&priv->mcast_work);
511
512 lbs_deb_leave(LBS_DEB_MESH);
513 return 0;
514}
515
516/**
517 * @brief This function closes the ethX interface 202 * @brief This function closes the ethX interface
518 * 203 *
519 * @param dev A pointer to net_device structure 204 * @param dev A pointer to net_device structure
@@ -574,15 +259,17 @@ void lbs_host_to_card_done(struct lbs_private *priv)
574 priv->dnld_sent = DNLD_RES_RECEIVED; 259 priv->dnld_sent = DNLD_RES_RECEIVED;
575 260
576 /* Wake main thread if commands are pending */ 261 /* Wake main thread if commands are pending */
577 if (!priv->cur_cmd || priv->tx_pending_len > 0) 262 if (!priv->cur_cmd || priv->tx_pending_len > 0) {
578 wake_up_interruptible(&priv->waitq); 263 if (!priv->wakeup_dev_required)
264 wake_up_interruptible(&priv->waitq);
265 }
579 266
580 spin_unlock_irqrestore(&priv->driver_lock, flags); 267 spin_unlock_irqrestore(&priv->driver_lock, flags);
581 lbs_deb_leave(LBS_DEB_THREAD); 268 lbs_deb_leave(LBS_DEB_THREAD);
582} 269}
583EXPORT_SYMBOL_GPL(lbs_host_to_card_done); 270EXPORT_SYMBOL_GPL(lbs_host_to_card_done);
584 271
585static int lbs_set_mac_address(struct net_device *dev, void *addr) 272int lbs_set_mac_address(struct net_device *dev, void *addr)
586{ 273{
587 int ret = 0; 274 int ret = 0;
588 struct lbs_private *priv = dev->ml_priv; 275 struct lbs_private *priv = dev->ml_priv;
@@ -633,15 +320,18 @@ static int lbs_add_mcast_addrs(struct cmd_ds_mac_multicast_adr *cmd,
633{ 320{
634 int i = nr_addrs; 321 int i = nr_addrs;
635 struct dev_mc_list *mc_list; 322 struct dev_mc_list *mc_list;
323 int cnt;
636 324
637 if ((dev->flags & (IFF_UP|IFF_MULTICAST)) != (IFF_UP|IFF_MULTICAST)) 325 if ((dev->flags & (IFF_UP|IFF_MULTICAST)) != (IFF_UP|IFF_MULTICAST))
638 return nr_addrs; 326 return nr_addrs;
639 327
640 netif_addr_lock_bh(dev); 328 netif_addr_lock_bh(dev);
641 for (mc_list = dev->mc_list; mc_list; mc_list = mc_list->next) { 329 cnt = netdev_mc_count(dev);
330 netdev_for_each_mc_addr(mc_list, dev) {
642 if (mac_in_list(cmd->maclist, nr_addrs, mc_list->dmi_addr)) { 331 if (mac_in_list(cmd->maclist, nr_addrs, mc_list->dmi_addr)) {
643 lbs_deb_net("mcast address %s:%pM skipped\n", dev->name, 332 lbs_deb_net("mcast address %s:%pM skipped\n", dev->name,
644 mc_list->dmi_addr); 333 mc_list->dmi_addr);
334 cnt--;
645 continue; 335 continue;
646 } 336 }
647 337
@@ -651,9 +341,10 @@ static int lbs_add_mcast_addrs(struct cmd_ds_mac_multicast_adr *cmd,
651 lbs_deb_net("mcast address %s:%pM added to filter\n", dev->name, 341 lbs_deb_net("mcast address %s:%pM added to filter\n", dev->name,
652 mc_list->dmi_addr); 342 mc_list->dmi_addr);
653 i++; 343 i++;
344 cnt--;
654 } 345 }
655 netif_addr_unlock_bh(dev); 346 netif_addr_unlock_bh(dev);
656 if (mc_list) 347 if (cnt)
657 return -EOVERFLOW; 348 return -EOVERFLOW;
658 349
659 return i; 350 return i;
@@ -716,7 +407,7 @@ static void lbs_set_mcast_worker(struct work_struct *work)
716 lbs_deb_leave(LBS_DEB_NET); 407 lbs_deb_leave(LBS_DEB_NET);
717} 408}
718 409
719static void lbs_set_multicast_list(struct net_device *dev) 410void lbs_set_multicast_list(struct net_device *dev)
720{ 411{
721 struct lbs_private *priv = dev->ml_priv; 412 struct lbs_private *priv = dev->ml_priv;
722 413
@@ -770,9 +461,10 @@ static int lbs_thread(void *data)
770 shouldsleep = 0; /* We have a command response */ 461 shouldsleep = 0; /* We have a command response */
771 else if (priv->cur_cmd) 462 else if (priv->cur_cmd)
772 shouldsleep = 1; /* Can't send a command; one already running */ 463 shouldsleep = 1; /* Can't send a command; one already running */
773 else if (!list_empty(&priv->cmdpendingq)) 464 else if (!list_empty(&priv->cmdpendingq) &&
465 !(priv->wakeup_dev_required))
774 shouldsleep = 0; /* We have a command to send */ 466 shouldsleep = 0; /* We have a command to send */
775 else if (__kfifo_len(priv->event_fifo)) 467 else if (kfifo_len(&priv->event_fifo))
776 shouldsleep = 0; /* We have an event to process */ 468 shouldsleep = 0; /* We have an event to process */
777 else 469 else
778 shouldsleep = 1; /* No command */ 470 shouldsleep = 1; /* No command */
@@ -822,46 +514,41 @@ static int lbs_thread(void *data)
822 } 514 }
823 spin_unlock_irq(&priv->driver_lock); 515 spin_unlock_irq(&priv->driver_lock);
824 516
825 /* command timeout stuff */
826 if (priv->cmd_timed_out && priv->cur_cmd) {
827 struct cmd_ctrl_node *cmdnode = priv->cur_cmd;
828
829 if (++priv->nr_retries > 3) {
830 lbs_pr_info("Excessive timeouts submitting "
831 "command 0x%04x\n",
832 le16_to_cpu(cmdnode->cmdbuf->command));
833 lbs_complete_command(priv, cmdnode, -ETIMEDOUT);
834 priv->nr_retries = 0;
835 if (priv->reset_card)
836 priv->reset_card(priv);
837 } else {
838 priv->cur_cmd = NULL;
839 priv->dnld_sent = DNLD_RES_RECEIVED;
840 lbs_pr_info("requeueing command 0x%04x due "
841 "to timeout (#%d)\n",
842 le16_to_cpu(cmdnode->cmdbuf->command),
843 priv->nr_retries);
844
845 /* Stick it back at the _top_ of the pending queue
846 for immediate resubmission */
847 list_add(&cmdnode->list, &priv->cmdpendingq);
848 }
849 }
850 priv->cmd_timed_out = 0;
851
852 /* Process hardware events, e.g. card removed, link lost */ 517 /* Process hardware events, e.g. card removed, link lost */
853 spin_lock_irq(&priv->driver_lock); 518 spin_lock_irq(&priv->driver_lock);
854 while (__kfifo_len(priv->event_fifo)) { 519 while (kfifo_len(&priv->event_fifo)) {
855 u32 event; 520 u32 event;
856 521
857 __kfifo_get(priv->event_fifo, (unsigned char *) &event, 522 if (kfifo_out(&priv->event_fifo,
858 sizeof(event)); 523 (unsigned char *) &event, sizeof(event)) !=
524 sizeof(event))
525 break;
859 spin_unlock_irq(&priv->driver_lock); 526 spin_unlock_irq(&priv->driver_lock);
860 lbs_process_event(priv, event); 527 lbs_process_event(priv, event);
861 spin_lock_irq(&priv->driver_lock); 528 spin_lock_irq(&priv->driver_lock);
862 } 529 }
863 spin_unlock_irq(&priv->driver_lock); 530 spin_unlock_irq(&priv->driver_lock);
864 531
532 if (priv->wakeup_dev_required) {
533 lbs_deb_thread("Waking up device...\n");
534 /* Wake up device */
535 if (priv->exit_deep_sleep(priv))
536 lbs_deb_thread("Wakeup device failed\n");
537 continue;
538 }
539
540 /* command timeout stuff */
541 if (priv->cmd_timed_out && priv->cur_cmd) {
542 struct cmd_ctrl_node *cmdnode = priv->cur_cmd;
543
544 lbs_pr_info("Timeout submitting command 0x%04x\n",
545 le16_to_cpu(cmdnode->cmdbuf->command));
546 lbs_complete_command(priv, cmdnode, -ETIMEDOUT);
547 if (priv->reset_card)
548 priv->reset_card(priv);
549 }
550 priv->cmd_timed_out = 0;
551
865 if (!priv->fw_ready) 552 if (!priv->fw_ready)
866 continue; 553 continue;
867 554
@@ -894,6 +581,9 @@ static int lbs_thread(void *data)
894 (priv->psstate == PS_STATE_PRE_SLEEP)) 581 (priv->psstate == PS_STATE_PRE_SLEEP))
895 continue; 582 continue;
896 583
584 if (priv->is_deep_sleep)
585 continue;
586
897 /* Execute the next command */ 587 /* Execute the next command */
898 if (!priv->dnld_sent && !priv->cur_cmd) 588 if (!priv->dnld_sent && !priv->cur_cmd)
899 lbs_execute_next_command(priv); 589 lbs_execute_next_command(priv);
@@ -920,7 +610,7 @@ static int lbs_thread(void *data)
920 if (priv->connect_status == LBS_CONNECTED) 610 if (priv->connect_status == LBS_CONNECTED)
921 netif_wake_queue(priv->dev); 611 netif_wake_queue(priv->dev);
922 if (priv->mesh_dev && 612 if (priv->mesh_dev &&
923 priv->mesh_connect_status == LBS_CONNECTED) 613 lbs_mesh_connected(priv))
924 netif_wake_queue(priv->mesh_dev); 614 netif_wake_queue(priv->mesh_dev);
925 } 615 }
926 } 616 }
@@ -928,6 +618,7 @@ static int lbs_thread(void *data)
928 } 618 }
929 619
930 del_timer(&priv->command_timer); 620 del_timer(&priv->command_timer);
621 del_timer(&priv->auto_deepsleep_timer);
931 wake_up_all(&priv->cmd_pending); 622 wake_up_all(&priv->cmd_pending);
932 623
933 lbs_deb_leave(LBS_DEB_THREAD); 624 lbs_deb_leave(LBS_DEB_THREAD);
@@ -1029,7 +720,7 @@ done:
1029 * This function handles the timeout of command sending. 720 * This function handles the timeout of command sending.
1030 * It will re-send the same command again. 721 * It will re-send the same command again.
1031 */ 722 */
1032static void command_timer_fn(unsigned long data) 723static void lbs_cmd_timeout_handler(unsigned long data)
1033{ 724{
1034 struct lbs_private *priv = (struct lbs_private *)data; 725 struct lbs_private *priv = (struct lbs_private *)data;
1035 unsigned long flags; 726 unsigned long flags;
@@ -1050,17 +741,61 @@ out:
1050 lbs_deb_leave(LBS_DEB_CMD); 741 lbs_deb_leave(LBS_DEB_CMD);
1051} 742}
1052 743
1053static void lbs_sync_channel_worker(struct work_struct *work) 744/**
745 * This function put the device back to deep sleep mode when timer expires
746 * and no activity (command, event, data etc.) is detected.
747 */
748static void auto_deepsleep_timer_fn(unsigned long data)
1054{ 749{
1055 struct lbs_private *priv = container_of(work, struct lbs_private, 750 struct lbs_private *priv = (struct lbs_private *)data;
1056 sync_channel); 751 int ret;
1057 752
1058 lbs_deb_enter(LBS_DEB_MAIN); 753 lbs_deb_enter(LBS_DEB_CMD);
1059 if (lbs_update_channel(priv)) 754
1060 lbs_pr_info("Channel synchronization failed."); 755 if (priv->is_activity_detected) {
1061 lbs_deb_leave(LBS_DEB_MAIN); 756 priv->is_activity_detected = 0;
757 } else {
758 if (priv->is_auto_deep_sleep_enabled &&
759 (!priv->wakeup_dev_required) &&
760 (priv->connect_status != LBS_CONNECTED)) {
761 lbs_deb_main("Entering auto deep sleep mode...\n");
762 ret = lbs_prepare_and_send_command(priv,
763 CMD_802_11_DEEP_SLEEP, 0,
764 0, 0, NULL);
765 if (ret)
766 lbs_pr_err("Enter Deep Sleep command failed\n");
767 }
768 }
769 mod_timer(&priv->auto_deepsleep_timer , jiffies +
770 (priv->auto_deep_sleep_timeout * HZ)/1000);
771 lbs_deb_leave(LBS_DEB_CMD);
772}
773
774int lbs_enter_auto_deep_sleep(struct lbs_private *priv)
775{
776 lbs_deb_enter(LBS_DEB_SDIO);
777
778 priv->is_auto_deep_sleep_enabled = 1;
779 if (priv->is_deep_sleep)
780 priv->wakeup_dev_required = 1;
781 mod_timer(&priv->auto_deepsleep_timer ,
782 jiffies + (priv->auto_deep_sleep_timeout * HZ)/1000);
783
784 lbs_deb_leave(LBS_DEB_SDIO);
785 return 0;
1062} 786}
1063 787
788int lbs_exit_auto_deep_sleep(struct lbs_private *priv)
789{
790 lbs_deb_enter(LBS_DEB_SDIO);
791
792 priv->is_auto_deep_sleep_enabled = 0;
793 priv->auto_deep_sleep_timeout = 0;
794 del_timer(&priv->auto_deepsleep_timer);
795
796 lbs_deb_leave(LBS_DEB_SDIO);
797 return 0;
798}
1064 799
1065static int lbs_init_adapter(struct lbs_private *priv) 800static int lbs_init_adapter(struct lbs_private *priv)
1066{ 801{
@@ -1089,21 +824,25 @@ static int lbs_init_adapter(struct lbs_private *priv)
1089 memset(priv->current_addr, 0xff, ETH_ALEN); 824 memset(priv->current_addr, 0xff, ETH_ALEN);
1090 825
1091 priv->connect_status = LBS_DISCONNECTED; 826 priv->connect_status = LBS_DISCONNECTED;
1092 priv->mesh_connect_status = LBS_DISCONNECTED;
1093 priv->secinfo.auth_mode = IW_AUTH_ALG_OPEN_SYSTEM; 827 priv->secinfo.auth_mode = IW_AUTH_ALG_OPEN_SYSTEM;
1094 priv->mode = IW_MODE_INFRA; 828 priv->mode = IW_MODE_INFRA;
1095 priv->curbssparams.channel = DEFAULT_AD_HOC_CHANNEL; 829 priv->channel = DEFAULT_AD_HOC_CHANNEL;
1096 priv->mac_control = CMD_ACT_MAC_RX_ON | CMD_ACT_MAC_TX_ON; 830 priv->mac_control = CMD_ACT_MAC_RX_ON | CMD_ACT_MAC_TX_ON;
1097 priv->radio_on = 1; 831 priv->radio_on = 1;
1098 priv->enablehwauto = 1; 832 priv->enablehwauto = 1;
1099 priv->capability = WLAN_CAPABILITY_SHORT_PREAMBLE;
1100 priv->psmode = LBS802_11POWERMODECAM; 833 priv->psmode = LBS802_11POWERMODECAM;
1101 priv->psstate = PS_STATE_FULL_POWER; 834 priv->psstate = PS_STATE_FULL_POWER;
835 priv->is_deep_sleep = 0;
836 priv->is_auto_deep_sleep_enabled = 0;
837 priv->wakeup_dev_required = 0;
838 init_waitqueue_head(&priv->ds_awake_q);
1102 839
1103 mutex_init(&priv->lock); 840 mutex_init(&priv->lock);
1104 841
1105 setup_timer(&priv->command_timer, command_timer_fn, 842 setup_timer(&priv->command_timer, lbs_cmd_timeout_handler,
1106 (unsigned long)priv); 843 (unsigned long)priv);
844 setup_timer(&priv->auto_deepsleep_timer, auto_deepsleep_timer_fn,
845 (unsigned long)priv);
1107 846
1108 INIT_LIST_HEAD(&priv->cmdfreeq); 847 INIT_LIST_HEAD(&priv->cmdfreeq);
1109 INIT_LIST_HEAD(&priv->cmdpendingq); 848 INIT_LIST_HEAD(&priv->cmdpendingq);
@@ -1121,10 +860,9 @@ static int lbs_init_adapter(struct lbs_private *priv)
1121 priv->resp_len[0] = priv->resp_len[1] = 0; 860 priv->resp_len[0] = priv->resp_len[1] = 0;
1122 861
1123 /* Create the event FIFO */ 862 /* Create the event FIFO */
1124 priv->event_fifo = kfifo_alloc(sizeof(u32) * 16, GFP_KERNEL, NULL); 863 ret = kfifo_alloc(&priv->event_fifo, sizeof(u32) * 16, GFP_KERNEL);
1125 if (IS_ERR(priv->event_fifo)) { 864 if (ret) {
1126 lbs_pr_err("Out of memory allocating event FIFO buffer\n"); 865 lbs_pr_err("Out of memory allocating event FIFO buffer\n");
1127 ret = -ENOMEM;
1128 goto out; 866 goto out;
1129 } 867 }
1130 868
@@ -1139,9 +877,9 @@ static void lbs_free_adapter(struct lbs_private *priv)
1139 lbs_deb_enter(LBS_DEB_MAIN); 877 lbs_deb_enter(LBS_DEB_MAIN);
1140 878
1141 lbs_free_cmd_buffer(priv); 879 lbs_free_cmd_buffer(priv);
1142 if (priv->event_fifo) 880 kfifo_free(&priv->event_fifo);
1143 kfifo_free(priv->event_fifo);
1144 del_timer(&priv->command_timer); 881 del_timer(&priv->command_timer);
882 del_timer(&priv->auto_deepsleep_timer);
1145 kfree(priv->networks); 883 kfree(priv->networks);
1146 priv->networks = NULL; 884 priv->networks = NULL;
1147 885
@@ -1168,31 +906,41 @@ static const struct net_device_ops lbs_netdev_ops = {
1168 */ 906 */
1169struct lbs_private *lbs_add_card(void *card, struct device *dmdev) 907struct lbs_private *lbs_add_card(void *card, struct device *dmdev)
1170{ 908{
1171 struct net_device *dev = NULL; 909 struct net_device *dev;
910 struct wireless_dev *wdev;
1172 struct lbs_private *priv = NULL; 911 struct lbs_private *priv = NULL;
1173 912
1174 lbs_deb_enter(LBS_DEB_MAIN); 913 lbs_deb_enter(LBS_DEB_MAIN);
1175 914
1176 /* Allocate an Ethernet device and register it */ 915 /* Allocate an Ethernet device and register it */
1177 dev = alloc_etherdev(sizeof(struct lbs_private)); 916 wdev = lbs_cfg_alloc(dmdev);
1178 if (!dev) { 917 if (IS_ERR(wdev)) {
1179 lbs_pr_err("init wlanX device failed\n"); 918 lbs_pr_err("cfg80211 init failed\n");
1180 goto done; 919 goto done;
1181 } 920 }
1182 priv = netdev_priv(dev); 921 /* TODO? */
1183 dev->ml_priv = priv; 922 wdev->iftype = NL80211_IFTYPE_STATION;
923 priv = wdev_priv(wdev);
924 priv->wdev = wdev;
1184 925
1185 if (lbs_init_adapter(priv)) { 926 if (lbs_init_adapter(priv)) {
1186 lbs_pr_err("failed to initialize adapter structure.\n"); 927 lbs_pr_err("failed to initialize adapter structure.\n");
1187 goto err_init_adapter; 928 goto err_wdev;
1188 } 929 }
1189 930
931 //TODO? dev = alloc_netdev_mq(0, "wlan%d", ether_setup, IWM_TX_QUEUES);
932 dev = alloc_netdev(0, "wlan%d", ether_setup);
933 if (!dev) {
934 dev_err(dmdev, "no memory for network device instance\n");
935 goto err_adapter;
936 }
937
938 dev->ieee80211_ptr = wdev;
939 dev->ml_priv = priv;
940 SET_NETDEV_DEV(dev, dmdev);
941 wdev->netdev = dev;
1190 priv->dev = dev; 942 priv->dev = dev;
1191 priv->card = card;
1192 priv->mesh_open = 0;
1193 priv->infra_open = 0;
1194 943
1195 /* Setup the OS Interface to our functions */
1196 dev->netdev_ops = &lbs_netdev_ops; 944 dev->netdev_ops = &lbs_netdev_ops;
1197 dev->watchdog_timeo = 5 * HZ; 945 dev->watchdog_timeo = 5 * HZ;
1198 dev->ethtool_ops = &lbs_ethtool_ops; 946 dev->ethtool_ops = &lbs_ethtool_ops;
@@ -1201,7 +949,13 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev)
1201#endif 949#endif
1202 dev->flags |= IFF_BROADCAST | IFF_MULTICAST; 950 dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
1203 951
1204 SET_NETDEV_DEV(dev, dmdev); 952
953 // TODO: kzalloc + iwm_init_default_profile(iwm, iwm->umac_profile); ??
954
955
956 priv->card = card;
957 priv->infra_open = 0;
958
1205 959
1206 priv->rtap_net_dev = NULL; 960 priv->rtap_net_dev = NULL;
1207 strcpy(dev->name, "wlan%d"); 961 strcpy(dev->name, "wlan%d");
@@ -1211,26 +965,28 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev)
1211 priv->main_thread = kthread_run(lbs_thread, dev, "lbs_main"); 965 priv->main_thread = kthread_run(lbs_thread, dev, "lbs_main");
1212 if (IS_ERR(priv->main_thread)) { 966 if (IS_ERR(priv->main_thread)) {
1213 lbs_deb_thread("Error creating main thread.\n"); 967 lbs_deb_thread("Error creating main thread.\n");
1214 goto err_init_adapter; 968 goto err_ndev;
1215 } 969 }
1216 970
1217 priv->work_thread = create_singlethread_workqueue("lbs_worker"); 971 priv->work_thread = create_singlethread_workqueue("lbs_worker");
1218 INIT_DELAYED_WORK(&priv->assoc_work, lbs_association_worker); 972 INIT_DELAYED_WORK(&priv->assoc_work, lbs_association_worker);
1219 INIT_DELAYED_WORK(&priv->scan_work, lbs_scan_worker); 973 INIT_DELAYED_WORK(&priv->scan_work, lbs_scan_worker);
1220 INIT_WORK(&priv->mcast_work, lbs_set_mcast_worker); 974 INIT_WORK(&priv->mcast_work, lbs_set_mcast_worker);
1221 INIT_WORK(&priv->sync_channel, lbs_sync_channel_worker);
1222
1223 sprintf(priv->mesh_ssid, "mesh");
1224 priv->mesh_ssid_len = 4;
1225 975
1226 priv->wol_criteria = 0xffffffff; 976 priv->wol_criteria = 0xffffffff;
1227 priv->wol_gpio = 0xff; 977 priv->wol_gpio = 0xff;
1228 978
1229 goto done; 979 goto done;
1230 980
1231err_init_adapter: 981 err_ndev:
1232 lbs_free_adapter(priv);
1233 free_netdev(dev); 982 free_netdev(dev);
983
984 err_adapter:
985 lbs_free_adapter(priv);
986
987 err_wdev:
988 lbs_cfg_free(priv);
989
1234 priv = NULL; 990 priv = NULL;
1235 991
1236done: 992done:
@@ -1243,7 +999,6 @@ EXPORT_SYMBOL_GPL(lbs_add_card);
1243void lbs_remove_card(struct lbs_private *priv) 999void lbs_remove_card(struct lbs_private *priv)
1244{ 1000{
1245 struct net_device *dev = priv->dev; 1001 struct net_device *dev = priv->dev;
1246 union iwreq_data wrqu;
1247 1002
1248 lbs_deb_enter(LBS_DEB_MAIN); 1003 lbs_deb_enter(LBS_DEB_MAIN);
1249 1004
@@ -1268,15 +1023,19 @@ void lbs_remove_card(struct lbs_private *priv)
1268 lbs_ps_wakeup(priv, CMD_OPTION_WAITFORRSP); 1023 lbs_ps_wakeup(priv, CMD_OPTION_WAITFORRSP);
1269 } 1024 }
1270 1025
1271 memset(wrqu.ap_addr.sa_data, 0xaa, ETH_ALEN); 1026 lbs_send_disconnect_notification(priv);
1272 wrqu.ap_addr.sa_family = ARPHRD_ETHER; 1027
1273 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL); 1028 if (priv->is_deep_sleep) {
1029 priv->is_deep_sleep = 0;
1030 wake_up_interruptible(&priv->ds_awake_q);
1031 }
1274 1032
1275 /* Stop the thread servicing the interrupts */ 1033 /* Stop the thread servicing the interrupts */
1276 priv->surpriseremoved = 1; 1034 priv->surpriseremoved = 1;
1277 kthread_stop(priv->main_thread); 1035 kthread_stop(priv->main_thread);
1278 1036
1279 lbs_free_adapter(priv); 1037 lbs_free_adapter(priv);
1038 lbs_cfg_free(priv);
1280 1039
1281 priv->dev = NULL; 1040 priv->dev = NULL;
1282 free_netdev(dev); 1041 free_netdev(dev);
@@ -1286,6 +1045,17 @@ void lbs_remove_card(struct lbs_private *priv)
1286EXPORT_SYMBOL_GPL(lbs_remove_card); 1045EXPORT_SYMBOL_GPL(lbs_remove_card);
1287 1046
1288 1047
1048static int lbs_rtap_supported(struct lbs_private *priv)
1049{
1050 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V5)
1051 return 1;
1052
1053 /* newer firmware use a capability mask */
1054 return ((MRVL_FW_MAJOR_REV(priv->fwrelease) >= MRVL_FW_V10) &&
1055 (priv->fwcapinfo & MESH_CAPINFO_ENABLE_MASK));
1056}
1057
1058
1289int lbs_start_card(struct lbs_private *priv) 1059int lbs_start_card(struct lbs_private *priv)
1290{ 1060{
1291 struct net_device *dev = priv->dev; 1061 struct net_device *dev = priv->dev;
@@ -1298,60 +1068,21 @@ int lbs_start_card(struct lbs_private *priv)
1298 if (ret) 1068 if (ret)
1299 goto done; 1069 goto done;
1300 1070
1301 /* init 802.11d */ 1071 if (lbs_cfg_register(priv)) {
1302 lbs_init_11d(priv); 1072 lbs_pr_err("cannot register device\n");
1303
1304 if (register_netdev(dev)) {
1305 lbs_pr_err("cannot register ethX device\n");
1306 goto done; 1073 goto done;
1307 } 1074 }
1308 1075
1309 lbs_update_channel(priv); 1076 lbs_update_channel(priv);
1310 1077
1311 /* Check mesh FW version and appropriately send the mesh start 1078 lbs_init_mesh(priv);
1312 * command
1313 */
1314 if (priv->mesh_fw_ver == MESH_FW_OLD) {
1315 /* Enable mesh, if supported, and work out which TLV it uses.
1316 0x100 + 291 is an unofficial value used in 5.110.20.pXX
1317 0x100 + 37 is the official value used in 5.110.21.pXX
1318 but we check them in that order because 20.pXX doesn't
1319 give an error -- it just silently fails. */
1320
1321 /* 5.110.20.pXX firmware will fail the command if the channel
1322 doesn't match the existing channel. But only if the TLV
1323 is correct. If the channel is wrong, _BOTH_ versions will
1324 give an error to 0x100+291, and allow 0x100+37 to succeed.
1325 It's just that 5.110.20.pXX will not have done anything
1326 useful */
1327
1328 priv->mesh_tlv = TLV_TYPE_OLD_MESH_ID;
1329 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1330 priv->curbssparams.channel)) {
1331 priv->mesh_tlv = TLV_TYPE_MESH_ID;
1332 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1333 priv->curbssparams.channel))
1334 priv->mesh_tlv = 0;
1335 }
1336 } else if (priv->mesh_fw_ver == MESH_FW_NEW) {
1337 /* 10.0.0.pXX new firmwares should succeed with TLV
1338 * 0x100+37; Do not invoke command with old TLV.
1339 */
1340 priv->mesh_tlv = TLV_TYPE_MESH_ID;
1341 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
1342 priv->curbssparams.channel))
1343 priv->mesh_tlv = 0;
1344 }
1345 if (priv->mesh_tlv) {
1346 lbs_add_mesh(priv);
1347
1348 if (device_create_file(&dev->dev, &dev_attr_lbs_mesh))
1349 lbs_pr_err("cannot register lbs_mesh attribute\n");
1350 1079
1351 /* While rtap isn't related to mesh, only mesh-enabled 1080 /*
1352 * firmware implements the rtap functionality via 1081 * While rtap isn't related to mesh, only mesh-enabled
1353 * CMD_802_11_MONITOR_MODE. 1082 * firmware implements the rtap functionality via
1354 */ 1083 * CMD_802_11_MONITOR_MODE.
1084 */
1085 if (lbs_rtap_supported(priv)) {
1355 if (device_create_file(&dev->dev, &dev_attr_lbs_rtap)) 1086 if (device_create_file(&dev->dev, &dev_attr_lbs_rtap))
1356 lbs_pr_err("cannot register lbs_rtap attribute\n"); 1087 lbs_pr_err("cannot register lbs_rtap attribute\n");
1357 } 1088 }
@@ -1385,13 +1116,14 @@ void lbs_stop_card(struct lbs_private *priv)
1385 netif_carrier_off(dev); 1116 netif_carrier_off(dev);
1386 1117
1387 lbs_debugfs_remove_one(priv); 1118 lbs_debugfs_remove_one(priv);
1388 if (priv->mesh_tlv) { 1119 lbs_deinit_mesh(priv);
1389 device_remove_file(&dev->dev, &dev_attr_lbs_mesh); 1120
1121 if (lbs_rtap_supported(priv))
1390 device_remove_file(&dev->dev, &dev_attr_lbs_rtap); 1122 device_remove_file(&dev->dev, &dev_attr_lbs_rtap);
1391 }
1392 1123
1393 /* Delete the timeout of the currently processing command */ 1124 /* Delete the timeout of the currently processing command */
1394 del_timer_sync(&priv->command_timer); 1125 del_timer_sync(&priv->command_timer);
1126 del_timer_sync(&priv->auto_deepsleep_timer);
1395 1127
1396 /* Flush pending command nodes */ 1128 /* Flush pending command nodes */
1397 spin_lock_irqsave(&priv->driver_lock, flags); 1129 spin_lock_irqsave(&priv->driver_lock, flags);
@@ -1420,157 +1152,6 @@ out:
1420EXPORT_SYMBOL_GPL(lbs_stop_card); 1152EXPORT_SYMBOL_GPL(lbs_stop_card);
1421 1153
1422 1154
1423static const struct net_device_ops mesh_netdev_ops = {
1424 .ndo_open = lbs_dev_open,
1425 .ndo_stop = lbs_mesh_stop,
1426 .ndo_start_xmit = lbs_hard_start_xmit,
1427 .ndo_set_mac_address = lbs_set_mac_address,
1428 .ndo_set_multicast_list = lbs_set_multicast_list,
1429};
1430
1431/**
1432 * @brief This function adds mshX interface
1433 *
1434 * @param priv A pointer to the struct lbs_private structure
1435 * @return 0 if successful, -X otherwise
1436 */
1437static int lbs_add_mesh(struct lbs_private *priv)
1438{
1439 struct net_device *mesh_dev = NULL;
1440 int ret = 0;
1441
1442 lbs_deb_enter(LBS_DEB_MESH);
1443
1444 /* Allocate a virtual mesh device */
1445 if (!(mesh_dev = alloc_netdev(0, "msh%d", ether_setup))) {
1446 lbs_deb_mesh("init mshX device failed\n");
1447 ret = -ENOMEM;
1448 goto done;
1449 }
1450 mesh_dev->ml_priv = priv;
1451 priv->mesh_dev = mesh_dev;
1452
1453 mesh_dev->netdev_ops = &mesh_netdev_ops;
1454 mesh_dev->ethtool_ops = &lbs_ethtool_ops;
1455 memcpy(mesh_dev->dev_addr, priv->dev->dev_addr,
1456 sizeof(priv->dev->dev_addr));
1457
1458 SET_NETDEV_DEV(priv->mesh_dev, priv->dev->dev.parent);
1459
1460#ifdef WIRELESS_EXT
1461 mesh_dev->wireless_handlers = (struct iw_handler_def *)&mesh_handler_def;
1462#endif
1463 mesh_dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
1464 /* Register virtual mesh interface */
1465 ret = register_netdev(mesh_dev);
1466 if (ret) {
1467 lbs_pr_err("cannot register mshX virtual interface\n");
1468 goto err_free;
1469 }
1470
1471 ret = sysfs_create_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
1472 if (ret)
1473 goto err_unregister;
1474
1475 lbs_persist_config_init(mesh_dev);
1476
1477 /* Everything successful */
1478 ret = 0;
1479 goto done;
1480
1481err_unregister:
1482 unregister_netdev(mesh_dev);
1483
1484err_free:
1485 free_netdev(mesh_dev);
1486
1487done:
1488 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
1489 return ret;
1490}
1491
1492static void lbs_remove_mesh(struct lbs_private *priv)
1493{
1494 struct net_device *mesh_dev;
1495
1496
1497 mesh_dev = priv->mesh_dev;
1498 if (!mesh_dev)
1499 return;
1500
1501 lbs_deb_enter(LBS_DEB_MESH);
1502 netif_stop_queue(mesh_dev);
1503 netif_carrier_off(mesh_dev);
1504 sysfs_remove_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
1505 lbs_persist_config_remove(mesh_dev);
1506 unregister_netdev(mesh_dev);
1507 priv->mesh_dev = NULL;
1508 free_netdev(mesh_dev);
1509 lbs_deb_leave(LBS_DEB_MESH);
1510}
1511
1512/**
1513 * @brief This function finds the CFP in
1514 * region_cfp_table based on region and band parameter.
1515 *
1516 * @param region The region code
1517 * @param band The band
1518 * @param cfp_no A pointer to CFP number
1519 * @return A pointer to CFP
1520 */
1521struct chan_freq_power *lbs_get_region_cfp_table(u8 region, int *cfp_no)
1522{
1523 int i, end;
1524
1525 lbs_deb_enter(LBS_DEB_MAIN);
1526
1527 end = ARRAY_SIZE(region_cfp_table);
1528
1529 for (i = 0; i < end ; i++) {
1530 lbs_deb_main("region_cfp_table[i].region=%d\n",
1531 region_cfp_table[i].region);
1532 if (region_cfp_table[i].region == region) {
1533 *cfp_no = region_cfp_table[i].cfp_no_BG;
1534 lbs_deb_leave(LBS_DEB_MAIN);
1535 return region_cfp_table[i].cfp_BG;
1536 }
1537 }
1538
1539 lbs_deb_leave_args(LBS_DEB_MAIN, "ret NULL");
1540 return NULL;
1541}
1542
1543int lbs_set_regiontable(struct lbs_private *priv, u8 region, u8 band)
1544{
1545 int ret = 0;
1546 int i = 0;
1547
1548 struct chan_freq_power *cfp;
1549 int cfp_no;
1550
1551 lbs_deb_enter(LBS_DEB_MAIN);
1552
1553 memset(priv->region_channel, 0, sizeof(priv->region_channel));
1554
1555 cfp = lbs_get_region_cfp_table(region, &cfp_no);
1556 if (cfp != NULL) {
1557 priv->region_channel[i].nrcfp = cfp_no;
1558 priv->region_channel[i].CFP = cfp;
1559 } else {
1560 lbs_deb_main("wrong region code %#x in band B/G\n",
1561 region);
1562 ret = -1;
1563 goto out;
1564 }
1565 priv->region_channel[i].valid = 1;
1566 priv->region_channel[i].region = region;
1567 priv->region_channel[i].band = band;
1568 i++;
1569out:
1570 lbs_deb_leave_args(LBS_DEB_MAIN, "ret %d", ret);
1571 return ret;
1572}
1573
1574void lbs_queue_event(struct lbs_private *priv, u32 event) 1155void lbs_queue_event(struct lbs_private *priv, u32 event)
1575{ 1156{
1576 unsigned long flags; 1157 unsigned long flags;
@@ -1581,7 +1162,7 @@ void lbs_queue_event(struct lbs_private *priv, u32 event)
1581 if (priv->psstate == PS_STATE_SLEEP) 1162 if (priv->psstate == PS_STATE_SLEEP)
1582 priv->psstate = PS_STATE_AWAKE; 1163 priv->psstate = PS_STATE_AWAKE;
1583 1164
1584 __kfifo_put(priv->event_fifo, (unsigned char *) &event, sizeof(u32)); 1165 kfifo_in(&priv->event_fifo, (unsigned char *) &event, sizeof(u32));
1585 1166
1586 wake_up_interruptible(&priv->waitq); 1167 wake_up_interruptible(&priv->waitq);
1587 1168
diff --git a/drivers/net/wireless/libertas/mesh.c b/drivers/net/wireless/libertas/mesh.c
new file mode 100644
index 000000000000..e385af1f4583
--- /dev/null
+++ b/drivers/net/wireless/libertas/mesh.c
@@ -0,0 +1,1154 @@
1#include <linux/delay.h>
2#include <linux/etherdevice.h>
3#include <linux/netdevice.h>
4#include <linux/if_ether.h>
5#include <linux/if_arp.h>
6#include <linux/kthread.h>
7#include <linux/kfifo.h>
8
9#include "mesh.h"
10#include "decl.h"
11#include "cmd.h"
12
13
14/***************************************************************************
15 * Mesh sysfs support
16 */
17
18/**
19 * Attributes exported through sysfs
20 */
21
22/**
23 * @brief Get function for sysfs attribute anycast_mask
24 */
25static ssize_t lbs_anycast_get(struct device *dev,
26 struct device_attribute *attr, char * buf)
27{
28 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
29 struct cmd_ds_mesh_access mesh_access;
30 int ret;
31
32 memset(&mesh_access, 0, sizeof(mesh_access));
33
34 ret = lbs_mesh_access(priv, CMD_ACT_MESH_GET_ANYCAST, &mesh_access);
35 if (ret)
36 return ret;
37
38 return snprintf(buf, 12, "0x%X\n", le32_to_cpu(mesh_access.data[0]));
39}
40
41/**
42 * @brief Set function for sysfs attribute anycast_mask
43 */
44static ssize_t lbs_anycast_set(struct device *dev,
45 struct device_attribute *attr, const char * buf, size_t count)
46{
47 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
48 struct cmd_ds_mesh_access mesh_access;
49 uint32_t datum;
50 int ret;
51
52 memset(&mesh_access, 0, sizeof(mesh_access));
53 sscanf(buf, "%x", &datum);
54 mesh_access.data[0] = cpu_to_le32(datum);
55
56 ret = lbs_mesh_access(priv, CMD_ACT_MESH_SET_ANYCAST, &mesh_access);
57 if (ret)
58 return ret;
59
60 return strlen(buf);
61}
62
63/**
64 * @brief Get function for sysfs attribute prb_rsp_limit
65 */
66static ssize_t lbs_prb_rsp_limit_get(struct device *dev,
67 struct device_attribute *attr, char *buf)
68{
69 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
70 struct cmd_ds_mesh_access mesh_access;
71 int ret;
72 u32 retry_limit;
73
74 memset(&mesh_access, 0, sizeof(mesh_access));
75 mesh_access.data[0] = cpu_to_le32(CMD_ACT_GET);
76
77 ret = lbs_mesh_access(priv, CMD_ACT_MESH_SET_GET_PRB_RSP_LIMIT,
78 &mesh_access);
79 if (ret)
80 return ret;
81
82 retry_limit = le32_to_cpu(mesh_access.data[1]);
83 return snprintf(buf, 10, "%d\n", retry_limit);
84}
85
86/**
87 * @brief Set function for sysfs attribute prb_rsp_limit
88 */
89static ssize_t lbs_prb_rsp_limit_set(struct device *dev,
90 struct device_attribute *attr, const char *buf, size_t count)
91{
92 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
93 struct cmd_ds_mesh_access mesh_access;
94 int ret;
95 unsigned long retry_limit;
96
97 memset(&mesh_access, 0, sizeof(mesh_access));
98 mesh_access.data[0] = cpu_to_le32(CMD_ACT_SET);
99
100 if (!strict_strtoul(buf, 10, &retry_limit))
101 return -ENOTSUPP;
102 if (retry_limit > 15)
103 return -ENOTSUPP;
104
105 mesh_access.data[1] = cpu_to_le32(retry_limit);
106
107 ret = lbs_mesh_access(priv, CMD_ACT_MESH_SET_GET_PRB_RSP_LIMIT,
108 &mesh_access);
109 if (ret)
110 return ret;
111
112 return strlen(buf);
113}
114
115/**
116 * Get function for sysfs attribute mesh
117 */
118static ssize_t lbs_mesh_get(struct device *dev,
119 struct device_attribute *attr, char * buf)
120{
121 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
122 return snprintf(buf, 5, "0x%X\n", !!priv->mesh_dev);
123}
124
125/**
126 * Set function for sysfs attribute mesh
127 */
128static ssize_t lbs_mesh_set(struct device *dev,
129 struct device_attribute *attr, const char * buf, size_t count)
130{
131 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
132 int enable;
133 int ret, action = CMD_ACT_MESH_CONFIG_STOP;
134
135 sscanf(buf, "%x", &enable);
136 enable = !!enable;
137 if (enable == !!priv->mesh_dev)
138 return count;
139 if (enable)
140 action = CMD_ACT_MESH_CONFIG_START;
141 ret = lbs_mesh_config(priv, action, priv->channel);
142 if (ret)
143 return ret;
144
145 if (enable)
146 lbs_add_mesh(priv);
147 else
148 lbs_remove_mesh(priv);
149
150 return count;
151}
152
153/**
154 * lbs_mesh attribute to be exported per ethX interface
155 * through sysfs (/sys/class/net/ethX/lbs_mesh)
156 */
157static DEVICE_ATTR(lbs_mesh, 0644, lbs_mesh_get, lbs_mesh_set);
158
159/**
160 * anycast_mask attribute to be exported per mshX interface
161 * through sysfs (/sys/class/net/mshX/anycast_mask)
162 */
163static DEVICE_ATTR(anycast_mask, 0644, lbs_anycast_get, lbs_anycast_set);
164
165/**
166 * prb_rsp_limit attribute to be exported per mshX interface
167 * through sysfs (/sys/class/net/mshX/prb_rsp_limit)
168 */
169static DEVICE_ATTR(prb_rsp_limit, 0644, lbs_prb_rsp_limit_get,
170 lbs_prb_rsp_limit_set);
171
172static struct attribute *lbs_mesh_sysfs_entries[] = {
173 &dev_attr_anycast_mask.attr,
174 &dev_attr_prb_rsp_limit.attr,
175 NULL,
176};
177
178static struct attribute_group lbs_mesh_attr_group = {
179 .attrs = lbs_mesh_sysfs_entries,
180};
181
182
183
184/***************************************************************************
185 * Initializing and starting, stopping mesh
186 */
187
188/*
189 * Check mesh FW version and appropriately send the mesh start
190 * command
191 */
192int lbs_init_mesh(struct lbs_private *priv)
193{
194 struct net_device *dev = priv->dev;
195 int ret = 0;
196
197 lbs_deb_enter(LBS_DEB_MESH);
198
199 priv->mesh_connect_status = LBS_DISCONNECTED;
200
201 /* Determine mesh_fw_ver from fwrelease and fwcapinfo */
202 /* 5.0.16p0 9.0.0.p0 is known to NOT support any mesh */
203 /* 5.110.22 have mesh command with 0xa3 command id */
204 /* 10.0.0.p0 FW brings in mesh config command with different id */
205 /* Check FW version MSB and initialize mesh_fw_ver */
206 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V5) {
207 /* Enable mesh, if supported, and work out which TLV it uses.
208 0x100 + 291 is an unofficial value used in 5.110.20.pXX
209 0x100 + 37 is the official value used in 5.110.21.pXX
210 but we check them in that order because 20.pXX doesn't
211 give an error -- it just silently fails. */
212
213 /* 5.110.20.pXX firmware will fail the command if the channel
214 doesn't match the existing channel. But only if the TLV
215 is correct. If the channel is wrong, _BOTH_ versions will
216 give an error to 0x100+291, and allow 0x100+37 to succeed.
217 It's just that 5.110.20.pXX will not have done anything
218 useful */
219
220 priv->mesh_tlv = TLV_TYPE_OLD_MESH_ID;
221 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
222 priv->channel)) {
223 priv->mesh_tlv = TLV_TYPE_MESH_ID;
224 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
225 priv->channel))
226 priv->mesh_tlv = 0;
227 }
228 } else
229 if ((MRVL_FW_MAJOR_REV(priv->fwrelease) >= MRVL_FW_V10) &&
230 (priv->fwcapinfo & MESH_CAPINFO_ENABLE_MASK)) {
231 /* 10.0.0.pXX new firmwares should succeed with TLV
232 * 0x100+37; Do not invoke command with old TLV.
233 */
234 priv->mesh_tlv = TLV_TYPE_MESH_ID;
235 if (lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
236 priv->channel))
237 priv->mesh_tlv = 0;
238 }
239
240
241 if (priv->mesh_tlv) {
242 sprintf(priv->mesh_ssid, "mesh");
243 priv->mesh_ssid_len = 4;
244
245 lbs_add_mesh(priv);
246
247 if (device_create_file(&dev->dev, &dev_attr_lbs_mesh))
248 lbs_pr_err("cannot register lbs_mesh attribute\n");
249
250 ret = 1;
251 }
252
253 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
254 return ret;
255}
256
257
258int lbs_deinit_mesh(struct lbs_private *priv)
259{
260 struct net_device *dev = priv->dev;
261 int ret = 0;
262
263 lbs_deb_enter(LBS_DEB_MESH);
264
265 if (priv->mesh_tlv) {
266 device_remove_file(&dev->dev, &dev_attr_lbs_mesh);
267 ret = 1;
268 }
269
270 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
271 return ret;
272}
273
274
275/**
276 * @brief This function closes the mshX interface
277 *
278 * @param dev A pointer to net_device structure
279 * @return 0
280 */
281static int lbs_mesh_stop(struct net_device *dev)
282{
283 struct lbs_private *priv = dev->ml_priv;
284
285 lbs_deb_enter(LBS_DEB_MESH);
286 spin_lock_irq(&priv->driver_lock);
287
288 priv->mesh_open = 0;
289 priv->mesh_connect_status = LBS_DISCONNECTED;
290
291 netif_stop_queue(dev);
292 netif_carrier_off(dev);
293
294 spin_unlock_irq(&priv->driver_lock);
295
296 schedule_work(&priv->mcast_work);
297
298 lbs_deb_leave(LBS_DEB_MESH);
299 return 0;
300}
301
302/**
303 * @brief This function opens the mshX interface
304 *
305 * @param dev A pointer to net_device structure
306 * @return 0 or -EBUSY if monitor mode active
307 */
308static int lbs_mesh_dev_open(struct net_device *dev)
309{
310 struct lbs_private *priv = dev->ml_priv;
311 int ret = 0;
312
313 lbs_deb_enter(LBS_DEB_NET);
314
315 spin_lock_irq(&priv->driver_lock);
316
317 if (priv->monitormode) {
318 ret = -EBUSY;
319 goto out;
320 }
321
322 priv->mesh_open = 1;
323 priv->mesh_connect_status = LBS_CONNECTED;
324 netif_carrier_on(dev);
325
326 if (!priv->tx_pending_len)
327 netif_wake_queue(dev);
328 out:
329
330 spin_unlock_irq(&priv->driver_lock);
331 lbs_deb_leave_args(LBS_DEB_NET, "ret %d", ret);
332 return ret;
333}
334
335static const struct net_device_ops mesh_netdev_ops = {
336 .ndo_open = lbs_mesh_dev_open,
337 .ndo_stop = lbs_mesh_stop,
338 .ndo_start_xmit = lbs_hard_start_xmit,
339 .ndo_set_mac_address = lbs_set_mac_address,
340 .ndo_set_multicast_list = lbs_set_multicast_list,
341};
342
343/**
344 * @brief This function adds mshX interface
345 *
346 * @param priv A pointer to the struct lbs_private structure
347 * @return 0 if successful, -X otherwise
348 */
349int lbs_add_mesh(struct lbs_private *priv)
350{
351 struct net_device *mesh_dev = NULL;
352 int ret = 0;
353
354 lbs_deb_enter(LBS_DEB_MESH);
355
356 /* Allocate a virtual mesh device */
357 mesh_dev = alloc_netdev(0, "msh%d", ether_setup);
358 if (!mesh_dev) {
359 lbs_deb_mesh("init mshX device failed\n");
360 ret = -ENOMEM;
361 goto done;
362 }
363 mesh_dev->ml_priv = priv;
364 priv->mesh_dev = mesh_dev;
365
366 mesh_dev->netdev_ops = &mesh_netdev_ops;
367 mesh_dev->ethtool_ops = &lbs_ethtool_ops;
368 memcpy(mesh_dev->dev_addr, priv->dev->dev_addr, ETH_ALEN);
369
370 SET_NETDEV_DEV(priv->mesh_dev, priv->dev->dev.parent);
371
372#ifdef WIRELESS_EXT
373 mesh_dev->wireless_handlers = &mesh_handler_def;
374#endif
375 mesh_dev->flags |= IFF_BROADCAST | IFF_MULTICAST;
376 /* Register virtual mesh interface */
377 ret = register_netdev(mesh_dev);
378 if (ret) {
379 lbs_pr_err("cannot register mshX virtual interface\n");
380 goto err_free;
381 }
382
383 ret = sysfs_create_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
384 if (ret)
385 goto err_unregister;
386
387 lbs_persist_config_init(mesh_dev);
388
389 /* Everything successful */
390 ret = 0;
391 goto done;
392
393err_unregister:
394 unregister_netdev(mesh_dev);
395
396err_free:
397 free_netdev(mesh_dev);
398
399done:
400 lbs_deb_leave_args(LBS_DEB_MESH, "ret %d", ret);
401 return ret;
402}
403
404void lbs_remove_mesh(struct lbs_private *priv)
405{
406 struct net_device *mesh_dev;
407
408 mesh_dev = priv->mesh_dev;
409 if (!mesh_dev)
410 return;
411
412 lbs_deb_enter(LBS_DEB_MESH);
413 netif_stop_queue(mesh_dev);
414 netif_carrier_off(mesh_dev);
415 sysfs_remove_group(&(mesh_dev->dev.kobj), &lbs_mesh_attr_group);
416 lbs_persist_config_remove(mesh_dev);
417 unregister_netdev(mesh_dev);
418 priv->mesh_dev = NULL;
419 free_netdev(mesh_dev);
420 lbs_deb_leave(LBS_DEB_MESH);
421}
422
423
424
425/***************************************************************************
426 * Sending and receiving
427 */
428struct net_device *lbs_mesh_set_dev(struct lbs_private *priv,
429 struct net_device *dev, struct rxpd *rxpd)
430{
431 if (priv->mesh_dev) {
432 if (priv->mesh_tlv == TLV_TYPE_OLD_MESH_ID) {
433 if (rxpd->rx_control & RxPD_MESH_FRAME)
434 dev = priv->mesh_dev;
435 } else if (priv->mesh_tlv == TLV_TYPE_MESH_ID) {
436 if (rxpd->u.bss.bss_num == MESH_IFACE_ID)
437 dev = priv->mesh_dev;
438 }
439 }
440 return dev;
441}
442
443
444void lbs_mesh_set_txpd(struct lbs_private *priv,
445 struct net_device *dev, struct txpd *txpd)
446{
447 if (dev == priv->mesh_dev) {
448 if (priv->mesh_tlv == TLV_TYPE_OLD_MESH_ID)
449 txpd->tx_control |= cpu_to_le32(TxPD_MESH_FRAME);
450 else if (priv->mesh_tlv == TLV_TYPE_MESH_ID)
451 txpd->u.bss.bss_num = MESH_IFACE_ID;
452 }
453}
454
455
456/***************************************************************************
457 * Mesh command handling
458 */
459
460int lbs_cmd_bt_access(struct cmd_ds_command *cmd,
461 u16 cmd_action, void *pdata_buf)
462{
463 struct cmd_ds_bt_access *bt_access = &cmd->params.bt;
464 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
465
466 cmd->command = cpu_to_le16(CMD_BT_ACCESS);
467 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_bt_access) +
468 sizeof(struct cmd_header));
469 cmd->result = 0;
470 bt_access->action = cpu_to_le16(cmd_action);
471
472 switch (cmd_action) {
473 case CMD_ACT_BT_ACCESS_ADD:
474 memcpy(bt_access->addr1, pdata_buf, 2 * ETH_ALEN);
475 lbs_deb_hex(LBS_DEB_MESH, "BT_ADD: blinded MAC addr",
476 bt_access->addr1, 6);
477 break;
478 case CMD_ACT_BT_ACCESS_DEL:
479 memcpy(bt_access->addr1, pdata_buf, 1 * ETH_ALEN);
480 lbs_deb_hex(LBS_DEB_MESH, "BT_DEL: blinded MAC addr",
481 bt_access->addr1, 6);
482 break;
483 case CMD_ACT_BT_ACCESS_LIST:
484 bt_access->id = cpu_to_le32(*(u32 *) pdata_buf);
485 break;
486 case CMD_ACT_BT_ACCESS_RESET:
487 break;
488 case CMD_ACT_BT_ACCESS_SET_INVERT:
489 bt_access->id = cpu_to_le32(*(u32 *) pdata_buf);
490 break;
491 case CMD_ACT_BT_ACCESS_GET_INVERT:
492 break;
493 default:
494 break;
495 }
496 lbs_deb_leave(LBS_DEB_CMD);
497 return 0;
498}
499
500int lbs_cmd_fwt_access(struct cmd_ds_command *cmd,
501 u16 cmd_action, void *pdata_buf)
502{
503 struct cmd_ds_fwt_access *fwt_access = &cmd->params.fwt;
504 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
505
506 cmd->command = cpu_to_le16(CMD_FWT_ACCESS);
507 cmd->size = cpu_to_le16(sizeof(struct cmd_ds_fwt_access) +
508 sizeof(struct cmd_header));
509 cmd->result = 0;
510
511 if (pdata_buf)
512 memcpy(fwt_access, pdata_buf, sizeof(*fwt_access));
513 else
514 memset(fwt_access, 0, sizeof(*fwt_access));
515
516 fwt_access->action = cpu_to_le16(cmd_action);
517
518 lbs_deb_leave(LBS_DEB_CMD);
519 return 0;
520}
521
522int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
523 struct cmd_ds_mesh_access *cmd)
524{
525 int ret;
526
527 lbs_deb_enter_args(LBS_DEB_CMD, "action %d", cmd_action);
528
529 cmd->hdr.command = cpu_to_le16(CMD_MESH_ACCESS);
530 cmd->hdr.size = cpu_to_le16(sizeof(*cmd));
531 cmd->hdr.result = 0;
532
533 cmd->action = cpu_to_le16(cmd_action);
534
535 ret = lbs_cmd_with_response(priv, CMD_MESH_ACCESS, cmd);
536
537 lbs_deb_leave(LBS_DEB_CMD);
538 return ret;
539}
540
541static int __lbs_mesh_config_send(struct lbs_private *priv,
542 struct cmd_ds_mesh_config *cmd,
543 uint16_t action, uint16_t type)
544{
545 int ret;
546 u16 command = CMD_MESH_CONFIG_OLD;
547
548 lbs_deb_enter(LBS_DEB_CMD);
549
550 /*
551 * Command id is 0xac for v10 FW along with mesh interface
552 * id in bits 14-13-12.
553 */
554 if (priv->mesh_tlv == TLV_TYPE_MESH_ID)
555 command = CMD_MESH_CONFIG |
556 (MESH_IFACE_ID << MESH_IFACE_BIT_OFFSET);
557
558 cmd->hdr.command = cpu_to_le16(command);
559 cmd->hdr.size = cpu_to_le16(sizeof(struct cmd_ds_mesh_config));
560 cmd->hdr.result = 0;
561
562 cmd->type = cpu_to_le16(type);
563 cmd->action = cpu_to_le16(action);
564
565 ret = lbs_cmd_with_response(priv, command, cmd);
566
567 lbs_deb_leave(LBS_DEB_CMD);
568 return ret;
569}
570
571int lbs_mesh_config_send(struct lbs_private *priv,
572 struct cmd_ds_mesh_config *cmd,
573 uint16_t action, uint16_t type)
574{
575 int ret;
576
577 if (!(priv->fwcapinfo & FW_CAPINFO_PERSISTENT_CONFIG))
578 return -EOPNOTSUPP;
579
580 ret = __lbs_mesh_config_send(priv, cmd, action, type);
581 return ret;
582}
583
584/* This function is the CMD_MESH_CONFIG legacy function. It only handles the
585 * START and STOP actions. The extended actions supported by CMD_MESH_CONFIG
586 * are all handled by preparing a struct cmd_ds_mesh_config and passing it to
587 * lbs_mesh_config_send.
588 */
589int lbs_mesh_config(struct lbs_private *priv, uint16_t action, uint16_t chan)
590{
591 struct cmd_ds_mesh_config cmd;
592 struct mrvl_meshie *ie;
593 DECLARE_SSID_BUF(ssid);
594
595 memset(&cmd, 0, sizeof(cmd));
596 cmd.channel = cpu_to_le16(chan);
597 ie = (struct mrvl_meshie *)cmd.data;
598
599 switch (action) {
600 case CMD_ACT_MESH_CONFIG_START:
601 ie->id = WLAN_EID_GENERIC;
602 ie->val.oui[0] = 0x00;
603 ie->val.oui[1] = 0x50;
604 ie->val.oui[2] = 0x43;
605 ie->val.type = MARVELL_MESH_IE_TYPE;
606 ie->val.subtype = MARVELL_MESH_IE_SUBTYPE;
607 ie->val.version = MARVELL_MESH_IE_VERSION;
608 ie->val.active_protocol_id = MARVELL_MESH_PROTO_ID_HWMP;
609 ie->val.active_metric_id = MARVELL_MESH_METRIC_ID;
610 ie->val.mesh_capability = MARVELL_MESH_CAPABILITY;
611 ie->val.mesh_id_len = priv->mesh_ssid_len;
612 memcpy(ie->val.mesh_id, priv->mesh_ssid, priv->mesh_ssid_len);
613 ie->len = sizeof(struct mrvl_meshie_val) -
614 IEEE80211_MAX_SSID_LEN + priv->mesh_ssid_len;
615 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie_val));
616 break;
617 case CMD_ACT_MESH_CONFIG_STOP:
618 break;
619 default:
620 return -1;
621 }
622 lbs_deb_cmd("mesh config action %d type %x channel %d SSID %s\n",
623 action, priv->mesh_tlv, chan,
624 print_ssid(ssid, priv->mesh_ssid, priv->mesh_ssid_len));
625
626 return __lbs_mesh_config_send(priv, &cmd, action, priv->mesh_tlv);
627}
628
629
630
631/***************************************************************************
632 * Persistent configuration support
633 */
634
635static int mesh_get_default_parameters(struct device *dev,
636 struct mrvl_mesh_defaults *defs)
637{
638 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
639 struct cmd_ds_mesh_config cmd;
640 int ret;
641
642 memset(&cmd, 0, sizeof(struct cmd_ds_mesh_config));
643 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_GET,
644 CMD_TYPE_MESH_GET_DEFAULTS);
645
646 if (ret)
647 return -EOPNOTSUPP;
648
649 memcpy(defs, &cmd.data[0], sizeof(struct mrvl_mesh_defaults));
650
651 return 0;
652}
653
654/**
655 * @brief Get function for sysfs attribute bootflag
656 */
657static ssize_t bootflag_get(struct device *dev,
658 struct device_attribute *attr, char *buf)
659{
660 struct mrvl_mesh_defaults defs;
661 int ret;
662
663 ret = mesh_get_default_parameters(dev, &defs);
664
665 if (ret)
666 return ret;
667
668 return snprintf(buf, 12, "%d\n", le32_to_cpu(defs.bootflag));
669}
670
671/**
672 * @brief Set function for sysfs attribute bootflag
673 */
674static ssize_t bootflag_set(struct device *dev, struct device_attribute *attr,
675 const char *buf, size_t count)
676{
677 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
678 struct cmd_ds_mesh_config cmd;
679 uint32_t datum;
680 int ret;
681
682 memset(&cmd, 0, sizeof(cmd));
683 ret = sscanf(buf, "%d", &datum);
684 if ((ret != 1) || (datum > 1))
685 return -EINVAL;
686
687 *((__le32 *)&cmd.data[0]) = cpu_to_le32(!!datum);
688 cmd.length = cpu_to_le16(sizeof(uint32_t));
689 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
690 CMD_TYPE_MESH_SET_BOOTFLAG);
691 if (ret)
692 return ret;
693
694 return strlen(buf);
695}
696
697/**
698 * @brief Get function for sysfs attribute boottime
699 */
700static ssize_t boottime_get(struct device *dev,
701 struct device_attribute *attr, char *buf)
702{
703 struct mrvl_mesh_defaults defs;
704 int ret;
705
706 ret = mesh_get_default_parameters(dev, &defs);
707
708 if (ret)
709 return ret;
710
711 return snprintf(buf, 12, "%d\n", defs.boottime);
712}
713
714/**
715 * @brief Set function for sysfs attribute boottime
716 */
717static ssize_t boottime_set(struct device *dev,
718 struct device_attribute *attr, const char *buf, size_t count)
719{
720 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
721 struct cmd_ds_mesh_config cmd;
722 uint32_t datum;
723 int ret;
724
725 memset(&cmd, 0, sizeof(cmd));
726 ret = sscanf(buf, "%d", &datum);
727 if ((ret != 1) || (datum > 255))
728 return -EINVAL;
729
730 /* A too small boot time will result in the device booting into
731 * standalone (no-host) mode before the host can take control of it,
732 * so the change will be hard to revert. This may be a desired
733 * feature (e.g to configure a very fast boot time for devices that
734 * will not be attached to a host), but dangerous. So I'm enforcing a
735 * lower limit of 20 seconds: remove and recompile the driver if this
736 * does not work for you.
737 */
738 datum = (datum < 20) ? 20 : datum;
739 cmd.data[0] = datum;
740 cmd.length = cpu_to_le16(sizeof(uint8_t));
741 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
742 CMD_TYPE_MESH_SET_BOOTTIME);
743 if (ret)
744 return ret;
745
746 return strlen(buf);
747}
748
749/**
750 * @brief Get function for sysfs attribute channel
751 */
752static ssize_t channel_get(struct device *dev,
753 struct device_attribute *attr, char *buf)
754{
755 struct mrvl_mesh_defaults defs;
756 int ret;
757
758 ret = mesh_get_default_parameters(dev, &defs);
759
760 if (ret)
761 return ret;
762
763 return snprintf(buf, 12, "%d\n", le16_to_cpu(defs.channel));
764}
765
766/**
767 * @brief Set function for sysfs attribute channel
768 */
769static ssize_t channel_set(struct device *dev, struct device_attribute *attr,
770 const char *buf, size_t count)
771{
772 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
773 struct cmd_ds_mesh_config cmd;
774 uint32_t datum;
775 int ret;
776
777 memset(&cmd, 0, sizeof(cmd));
778 ret = sscanf(buf, "%d", &datum);
779 if (ret != 1 || datum < 1 || datum > 11)
780 return -EINVAL;
781
782 *((__le16 *)&cmd.data[0]) = cpu_to_le16(datum);
783 cmd.length = cpu_to_le16(sizeof(uint16_t));
784 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
785 CMD_TYPE_MESH_SET_DEF_CHANNEL);
786 if (ret)
787 return ret;
788
789 return strlen(buf);
790}
791
792/**
793 * @brief Get function for sysfs attribute mesh_id
794 */
795static ssize_t mesh_id_get(struct device *dev, struct device_attribute *attr,
796 char *buf)
797{
798 struct mrvl_mesh_defaults defs;
799 int maxlen;
800 int ret;
801
802 ret = mesh_get_default_parameters(dev, &defs);
803
804 if (ret)
805 return ret;
806
807 if (defs.meshie.val.mesh_id_len > IEEE80211_MAX_SSID_LEN) {
808 lbs_pr_err("inconsistent mesh ID length");
809 defs.meshie.val.mesh_id_len = IEEE80211_MAX_SSID_LEN;
810 }
811
812 /* SSID not null terminated: reserve room for \0 + \n */
813 maxlen = defs.meshie.val.mesh_id_len + 2;
814 maxlen = (PAGE_SIZE > maxlen) ? maxlen : PAGE_SIZE;
815
816 defs.meshie.val.mesh_id[defs.meshie.val.mesh_id_len] = '\0';
817
818 return snprintf(buf, maxlen, "%s\n", defs.meshie.val.mesh_id);
819}
820
821/**
822 * @brief Set function for sysfs attribute mesh_id
823 */
824static ssize_t mesh_id_set(struct device *dev, struct device_attribute *attr,
825 const char *buf, size_t count)
826{
827 struct cmd_ds_mesh_config cmd;
828 struct mrvl_mesh_defaults defs;
829 struct mrvl_meshie *ie;
830 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
831 int len;
832 int ret;
833
834 if (count < 2 || count > IEEE80211_MAX_SSID_LEN + 1)
835 return -EINVAL;
836
837 memset(&cmd, 0, sizeof(struct cmd_ds_mesh_config));
838 ie = (struct mrvl_meshie *) &cmd.data[0];
839
840 /* fetch all other Information Element parameters */
841 ret = mesh_get_default_parameters(dev, &defs);
842
843 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
844
845 /* transfer IE elements */
846 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
847
848 len = count - 1;
849 memcpy(ie->val.mesh_id, buf, len);
850 /* SSID len */
851 ie->val.mesh_id_len = len;
852 /* IE len */
853 ie->len = sizeof(struct mrvl_meshie_val) - IEEE80211_MAX_SSID_LEN + len;
854
855 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
856 CMD_TYPE_MESH_SET_MESH_IE);
857 if (ret)
858 return ret;
859
860 return strlen(buf);
861}
862
863/**
864 * @brief Get function for sysfs attribute protocol_id
865 */
866static ssize_t protocol_id_get(struct device *dev,
867 struct device_attribute *attr, char *buf)
868{
869 struct mrvl_mesh_defaults defs;
870 int ret;
871
872 ret = mesh_get_default_parameters(dev, &defs);
873
874 if (ret)
875 return ret;
876
877 return snprintf(buf, 5, "%d\n", defs.meshie.val.active_protocol_id);
878}
879
880/**
881 * @brief Set function for sysfs attribute protocol_id
882 */
883static ssize_t protocol_id_set(struct device *dev,
884 struct device_attribute *attr, const char *buf, size_t count)
885{
886 struct cmd_ds_mesh_config cmd;
887 struct mrvl_mesh_defaults defs;
888 struct mrvl_meshie *ie;
889 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
890 uint32_t datum;
891 int ret;
892
893 memset(&cmd, 0, sizeof(cmd));
894 ret = sscanf(buf, "%d", &datum);
895 if ((ret != 1) || (datum > 255))
896 return -EINVAL;
897
898 /* fetch all other Information Element parameters */
899 ret = mesh_get_default_parameters(dev, &defs);
900
901 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
902
903 /* transfer IE elements */
904 ie = (struct mrvl_meshie *) &cmd.data[0];
905 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
906 /* update protocol id */
907 ie->val.active_protocol_id = datum;
908
909 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
910 CMD_TYPE_MESH_SET_MESH_IE);
911 if (ret)
912 return ret;
913
914 return strlen(buf);
915}
916
917/**
918 * @brief Get function for sysfs attribute metric_id
919 */
920static ssize_t metric_id_get(struct device *dev,
921 struct device_attribute *attr, char *buf)
922{
923 struct mrvl_mesh_defaults defs;
924 int ret;
925
926 ret = mesh_get_default_parameters(dev, &defs);
927
928 if (ret)
929 return ret;
930
931 return snprintf(buf, 5, "%d\n", defs.meshie.val.active_metric_id);
932}
933
934/**
935 * @brief Set function for sysfs attribute metric_id
936 */
937static ssize_t metric_id_set(struct device *dev, struct device_attribute *attr,
938 const char *buf, size_t count)
939{
940 struct cmd_ds_mesh_config cmd;
941 struct mrvl_mesh_defaults defs;
942 struct mrvl_meshie *ie;
943 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
944 uint32_t datum;
945 int ret;
946
947 memset(&cmd, 0, sizeof(cmd));
948 ret = sscanf(buf, "%d", &datum);
949 if ((ret != 1) || (datum > 255))
950 return -EINVAL;
951
952 /* fetch all other Information Element parameters */
953 ret = mesh_get_default_parameters(dev, &defs);
954
955 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
956
957 /* transfer IE elements */
958 ie = (struct mrvl_meshie *) &cmd.data[0];
959 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
960 /* update metric id */
961 ie->val.active_metric_id = datum;
962
963 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
964 CMD_TYPE_MESH_SET_MESH_IE);
965 if (ret)
966 return ret;
967
968 return strlen(buf);
969}
970
971/**
972 * @brief Get function for sysfs attribute capability
973 */
974static ssize_t capability_get(struct device *dev,
975 struct device_attribute *attr, char *buf)
976{
977 struct mrvl_mesh_defaults defs;
978 int ret;
979
980 ret = mesh_get_default_parameters(dev, &defs);
981
982 if (ret)
983 return ret;
984
985 return snprintf(buf, 5, "%d\n", defs.meshie.val.mesh_capability);
986}
987
988/**
989 * @brief Set function for sysfs attribute capability
990 */
991static ssize_t capability_set(struct device *dev, struct device_attribute *attr,
992 const char *buf, size_t count)
993{
994 struct cmd_ds_mesh_config cmd;
995 struct mrvl_mesh_defaults defs;
996 struct mrvl_meshie *ie;
997 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
998 uint32_t datum;
999 int ret;
1000
1001 memset(&cmd, 0, sizeof(cmd));
1002 ret = sscanf(buf, "%d", &datum);
1003 if ((ret != 1) || (datum > 255))
1004 return -EINVAL;
1005
1006 /* fetch all other Information Element parameters */
1007 ret = mesh_get_default_parameters(dev, &defs);
1008
1009 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
1010
1011 /* transfer IE elements */
1012 ie = (struct mrvl_meshie *) &cmd.data[0];
1013 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
1014 /* update value */
1015 ie->val.mesh_capability = datum;
1016
1017 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
1018 CMD_TYPE_MESH_SET_MESH_IE);
1019 if (ret)
1020 return ret;
1021
1022 return strlen(buf);
1023}
1024
1025
1026static DEVICE_ATTR(bootflag, 0644, bootflag_get, bootflag_set);
1027static DEVICE_ATTR(boottime, 0644, boottime_get, boottime_set);
1028static DEVICE_ATTR(channel, 0644, channel_get, channel_set);
1029static DEVICE_ATTR(mesh_id, 0644, mesh_id_get, mesh_id_set);
1030static DEVICE_ATTR(protocol_id, 0644, protocol_id_get, protocol_id_set);
1031static DEVICE_ATTR(metric_id, 0644, metric_id_get, metric_id_set);
1032static DEVICE_ATTR(capability, 0644, capability_get, capability_set);
1033
1034static struct attribute *boot_opts_attrs[] = {
1035 &dev_attr_bootflag.attr,
1036 &dev_attr_boottime.attr,
1037 &dev_attr_channel.attr,
1038 NULL
1039};
1040
1041static struct attribute_group boot_opts_group = {
1042 .name = "boot_options",
1043 .attrs = boot_opts_attrs,
1044};
1045
1046static struct attribute *mesh_ie_attrs[] = {
1047 &dev_attr_mesh_id.attr,
1048 &dev_attr_protocol_id.attr,
1049 &dev_attr_metric_id.attr,
1050 &dev_attr_capability.attr,
1051 NULL
1052};
1053
1054static struct attribute_group mesh_ie_group = {
1055 .name = "mesh_ie",
1056 .attrs = mesh_ie_attrs,
1057};
1058
1059void lbs_persist_config_init(struct net_device *dev)
1060{
1061 int ret;
1062 ret = sysfs_create_group(&(dev->dev.kobj), &boot_opts_group);
1063 ret = sysfs_create_group(&(dev->dev.kobj), &mesh_ie_group);
1064}
1065
1066void lbs_persist_config_remove(struct net_device *dev)
1067{
1068 sysfs_remove_group(&(dev->dev.kobj), &boot_opts_group);
1069 sysfs_remove_group(&(dev->dev.kobj), &mesh_ie_group);
1070}
1071
1072
1073
1074/***************************************************************************
1075 * Ethtool related
1076 */
1077
1078static const char *mesh_stat_strings[] = {
1079 "drop_duplicate_bcast",
1080 "drop_ttl_zero",
1081 "drop_no_fwd_route",
1082 "drop_no_buffers",
1083 "fwded_unicast_cnt",
1084 "fwded_bcast_cnt",
1085 "drop_blind_table",
1086 "tx_failed_cnt"
1087};
1088
1089void lbs_mesh_ethtool_get_stats(struct net_device *dev,
1090 struct ethtool_stats *stats, uint64_t *data)
1091{
1092 struct lbs_private *priv = dev->ml_priv;
1093 struct cmd_ds_mesh_access mesh_access;
1094 int ret;
1095
1096 lbs_deb_enter(LBS_DEB_ETHTOOL);
1097
1098 /* Get Mesh Statistics */
1099 ret = lbs_mesh_access(priv, CMD_ACT_MESH_GET_STATS, &mesh_access);
1100
1101 if (ret) {
1102 memset(data, 0, MESH_STATS_NUM*(sizeof(uint64_t)));
1103 return;
1104 }
1105
1106 priv->mstats.fwd_drop_rbt = le32_to_cpu(mesh_access.data[0]);
1107 priv->mstats.fwd_drop_ttl = le32_to_cpu(mesh_access.data[1]);
1108 priv->mstats.fwd_drop_noroute = le32_to_cpu(mesh_access.data[2]);
1109 priv->mstats.fwd_drop_nobuf = le32_to_cpu(mesh_access.data[3]);
1110 priv->mstats.fwd_unicast_cnt = le32_to_cpu(mesh_access.data[4]);
1111 priv->mstats.fwd_bcast_cnt = le32_to_cpu(mesh_access.data[5]);
1112 priv->mstats.drop_blind = le32_to_cpu(mesh_access.data[6]);
1113 priv->mstats.tx_failed_cnt = le32_to_cpu(mesh_access.data[7]);
1114
1115 data[0] = priv->mstats.fwd_drop_rbt;
1116 data[1] = priv->mstats.fwd_drop_ttl;
1117 data[2] = priv->mstats.fwd_drop_noroute;
1118 data[3] = priv->mstats.fwd_drop_nobuf;
1119 data[4] = priv->mstats.fwd_unicast_cnt;
1120 data[5] = priv->mstats.fwd_bcast_cnt;
1121 data[6] = priv->mstats.drop_blind;
1122 data[7] = priv->mstats.tx_failed_cnt;
1123
1124 lbs_deb_enter(LBS_DEB_ETHTOOL);
1125}
1126
1127int lbs_mesh_ethtool_get_sset_count(struct net_device *dev, int sset)
1128{
1129 struct lbs_private *priv = dev->ml_priv;
1130
1131 if (sset == ETH_SS_STATS && dev == priv->mesh_dev)
1132 return MESH_STATS_NUM;
1133
1134 return -EOPNOTSUPP;
1135}
1136
1137void lbs_mesh_ethtool_get_strings(struct net_device *dev,
1138 uint32_t stringset, uint8_t *s)
1139{
1140 int i;
1141
1142 lbs_deb_enter(LBS_DEB_ETHTOOL);
1143
1144 switch (stringset) {
1145 case ETH_SS_STATS:
1146 for (i = 0; i < MESH_STATS_NUM; i++) {
1147 memcpy(s + i * ETH_GSTRING_LEN,
1148 mesh_stat_strings[i],
1149 ETH_GSTRING_LEN);
1150 }
1151 break;
1152 }
1153 lbs_deb_enter(LBS_DEB_ETHTOOL);
1154}
diff --git a/drivers/net/wireless/libertas/mesh.h b/drivers/net/wireless/libertas/mesh.h
new file mode 100644
index 000000000000..e2573303a328
--- /dev/null
+++ b/drivers/net/wireless/libertas/mesh.h
@@ -0,0 +1,110 @@
1/**
2 * Contains all definitions needed for the Libertas' MESH implementation.
3 */
4#ifndef _LBS_MESH_H_
5#define _LBS_MESH_H_
6
7
8#include <net/iw_handler.h>
9#include <net/lib80211.h>
10
11
12#ifdef CONFIG_LIBERTAS_MESH
13
14/* Mesh statistics */
15struct lbs_mesh_stats {
16 u32 fwd_bcast_cnt; /* Fwd: Broadcast counter */
17 u32 fwd_unicast_cnt; /* Fwd: Unicast counter */
18 u32 fwd_drop_ttl; /* Fwd: TTL zero */
19 u32 fwd_drop_rbt; /* Fwd: Recently Broadcasted */
20 u32 fwd_drop_noroute; /* Fwd: No route to Destination */
21 u32 fwd_drop_nobuf; /* Fwd: Run out of internal buffers */
22 u32 drop_blind; /* Rx: Dropped by blinding table */
23 u32 tx_failed_cnt; /* Tx: Failed transmissions */
24};
25
26
27struct net_device;
28struct lbs_private;
29
30int lbs_init_mesh(struct lbs_private *priv);
31int lbs_deinit_mesh(struct lbs_private *priv);
32
33int lbs_add_mesh(struct lbs_private *priv);
34void lbs_remove_mesh(struct lbs_private *priv);
35
36
37/* Sending / Receiving */
38
39struct rxpd;
40struct txpd;
41
42struct net_device *lbs_mesh_set_dev(struct lbs_private *priv,
43 struct net_device *dev, struct rxpd *rxpd);
44void lbs_mesh_set_txpd(struct lbs_private *priv,
45 struct net_device *dev, struct txpd *txpd);
46
47
48/* Command handling */
49
50struct cmd_ds_command;
51struct cmd_ds_mesh_access;
52struct cmd_ds_mesh_config;
53
54int lbs_cmd_bt_access(struct cmd_ds_command *cmd,
55 u16 cmd_action, void *pdata_buf);
56int lbs_cmd_fwt_access(struct cmd_ds_command *cmd,
57 u16 cmd_action, void *pdata_buf);
58int lbs_mesh_access(struct lbs_private *priv, uint16_t cmd_action,
59 struct cmd_ds_mesh_access *cmd);
60int lbs_mesh_config_send(struct lbs_private *priv,
61 struct cmd_ds_mesh_config *cmd,
62 uint16_t action, uint16_t type);
63int lbs_mesh_config(struct lbs_private *priv, uint16_t enable, uint16_t chan);
64
65
66
67/* Persistent configuration */
68
69void lbs_persist_config_init(struct net_device *net);
70void lbs_persist_config_remove(struct net_device *net);
71
72
73/* WEXT handler */
74
75extern struct iw_handler_def mesh_handler_def;
76
77
78/* Ethtool statistics */
79
80struct ethtool_stats;
81
82void lbs_mesh_ethtool_get_stats(struct net_device *dev,
83 struct ethtool_stats *stats, uint64_t *data);
84int lbs_mesh_ethtool_get_sset_count(struct net_device *dev, int sset);
85void lbs_mesh_ethtool_get_strings(struct net_device *dev,
86 uint32_t stringset, uint8_t *s);
87
88
89/* Accessors */
90
91#define lbs_mesh_open(priv) (priv->mesh_open)
92#define lbs_mesh_connected(priv) (priv->mesh_connect_status == LBS_CONNECTED)
93
94#else
95
96#define lbs_init_mesh(priv)
97#define lbs_deinit_mesh(priv)
98#define lbs_add_mesh(priv)
99#define lbs_remove_mesh(priv)
100#define lbs_mesh_set_dev(priv, dev, rxpd) (dev)
101#define lbs_mesh_set_txpd(priv, dev, txpd)
102#define lbs_mesh_config(priv, enable, chan)
103#define lbs_mesh_open(priv) (0)
104#define lbs_mesh_connected(priv) (0)
105
106#endif
107
108
109
110#endif
diff --git a/drivers/net/wireless/libertas/persistcfg.c b/drivers/net/wireless/libertas/persistcfg.c
deleted file mode 100644
index 18fe29faf99b..000000000000
--- a/drivers/net/wireless/libertas/persistcfg.c
+++ /dev/null
@@ -1,453 +0,0 @@
1#include <linux/moduleparam.h>
2#include <linux/delay.h>
3#include <linux/etherdevice.h>
4#include <linux/netdevice.h>
5#include <linux/if_arp.h>
6#include <linux/kthread.h>
7#include <linux/kfifo.h>
8
9#include "host.h"
10#include "decl.h"
11#include "dev.h"
12#include "wext.h"
13#include "debugfs.h"
14#include "scan.h"
15#include "assoc.h"
16#include "cmd.h"
17
18static int mesh_get_default_parameters(struct device *dev,
19 struct mrvl_mesh_defaults *defs)
20{
21 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
22 struct cmd_ds_mesh_config cmd;
23 int ret;
24
25 memset(&cmd, 0, sizeof(struct cmd_ds_mesh_config));
26 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_GET,
27 CMD_TYPE_MESH_GET_DEFAULTS);
28
29 if (ret)
30 return -EOPNOTSUPP;
31
32 memcpy(defs, &cmd.data[0], sizeof(struct mrvl_mesh_defaults));
33
34 return 0;
35}
36
37/**
38 * @brief Get function for sysfs attribute bootflag
39 */
40static ssize_t bootflag_get(struct device *dev,
41 struct device_attribute *attr, char *buf)
42{
43 struct mrvl_mesh_defaults defs;
44 int ret;
45
46 ret = mesh_get_default_parameters(dev, &defs);
47
48 if (ret)
49 return ret;
50
51 return snprintf(buf, 12, "%d\n", le32_to_cpu(defs.bootflag));
52}
53
54/**
55 * @brief Set function for sysfs attribute bootflag
56 */
57static ssize_t bootflag_set(struct device *dev, struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
61 struct cmd_ds_mesh_config cmd;
62 uint32_t datum;
63 int ret;
64
65 memset(&cmd, 0, sizeof(cmd));
66 ret = sscanf(buf, "%d", &datum);
67 if ((ret != 1) || (datum > 1))
68 return -EINVAL;
69
70 *((__le32 *)&cmd.data[0]) = cpu_to_le32(!!datum);
71 cmd.length = cpu_to_le16(sizeof(uint32_t));
72 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
73 CMD_TYPE_MESH_SET_BOOTFLAG);
74 if (ret)
75 return ret;
76
77 return strlen(buf);
78}
79
80/**
81 * @brief Get function for sysfs attribute boottime
82 */
83static ssize_t boottime_get(struct device *dev,
84 struct device_attribute *attr, char *buf)
85{
86 struct mrvl_mesh_defaults defs;
87 int ret;
88
89 ret = mesh_get_default_parameters(dev, &defs);
90
91 if (ret)
92 return ret;
93
94 return snprintf(buf, 12, "%d\n", defs.boottime);
95}
96
97/**
98 * @brief Set function for sysfs attribute boottime
99 */
100static ssize_t boottime_set(struct device *dev,
101 struct device_attribute *attr, const char *buf, size_t count)
102{
103 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
104 struct cmd_ds_mesh_config cmd;
105 uint32_t datum;
106 int ret;
107
108 memset(&cmd, 0, sizeof(cmd));
109 ret = sscanf(buf, "%d", &datum);
110 if ((ret != 1) || (datum > 255))
111 return -EINVAL;
112
113 /* A too small boot time will result in the device booting into
114 * standalone (no-host) mode before the host can take control of it,
115 * so the change will be hard to revert. This may be a desired
116 * feature (e.g to configure a very fast boot time for devices that
117 * will not be attached to a host), but dangerous. So I'm enforcing a
118 * lower limit of 20 seconds: remove and recompile the driver if this
119 * does not work for you.
120 */
121 datum = (datum < 20) ? 20 : datum;
122 cmd.data[0] = datum;
123 cmd.length = cpu_to_le16(sizeof(uint8_t));
124 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
125 CMD_TYPE_MESH_SET_BOOTTIME);
126 if (ret)
127 return ret;
128
129 return strlen(buf);
130}
131
132/**
133 * @brief Get function for sysfs attribute channel
134 */
135static ssize_t channel_get(struct device *dev,
136 struct device_attribute *attr, char *buf)
137{
138 struct mrvl_mesh_defaults defs;
139 int ret;
140
141 ret = mesh_get_default_parameters(dev, &defs);
142
143 if (ret)
144 return ret;
145
146 return snprintf(buf, 12, "%d\n", le16_to_cpu(defs.channel));
147}
148
149/**
150 * @brief Set function for sysfs attribute channel
151 */
152static ssize_t channel_set(struct device *dev, struct device_attribute *attr,
153 const char *buf, size_t count)
154{
155 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
156 struct cmd_ds_mesh_config cmd;
157 uint32_t datum;
158 int ret;
159
160 memset(&cmd, 0, sizeof(cmd));
161 ret = sscanf(buf, "%d", &datum);
162 if (ret != 1 || datum < 1 || datum > 11)
163 return -EINVAL;
164
165 *((__le16 *)&cmd.data[0]) = cpu_to_le16(datum);
166 cmd.length = cpu_to_le16(sizeof(uint16_t));
167 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
168 CMD_TYPE_MESH_SET_DEF_CHANNEL);
169 if (ret)
170 return ret;
171
172 return strlen(buf);
173}
174
175/**
176 * @brief Get function for sysfs attribute mesh_id
177 */
178static ssize_t mesh_id_get(struct device *dev, struct device_attribute *attr,
179 char *buf)
180{
181 struct mrvl_mesh_defaults defs;
182 int maxlen;
183 int ret;
184
185 ret = mesh_get_default_parameters(dev, &defs);
186
187 if (ret)
188 return ret;
189
190 if (defs.meshie.val.mesh_id_len > IW_ESSID_MAX_SIZE) {
191 lbs_pr_err("inconsistent mesh ID length");
192 defs.meshie.val.mesh_id_len = IW_ESSID_MAX_SIZE;
193 }
194
195 /* SSID not null terminated: reserve room for \0 + \n */
196 maxlen = defs.meshie.val.mesh_id_len + 2;
197 maxlen = (PAGE_SIZE > maxlen) ? maxlen : PAGE_SIZE;
198
199 defs.meshie.val.mesh_id[defs.meshie.val.mesh_id_len] = '\0';
200
201 return snprintf(buf, maxlen, "%s\n", defs.meshie.val.mesh_id);
202}
203
204/**
205 * @brief Set function for sysfs attribute mesh_id
206 */
207static ssize_t mesh_id_set(struct device *dev, struct device_attribute *attr,
208 const char *buf, size_t count)
209{
210 struct cmd_ds_mesh_config cmd;
211 struct mrvl_mesh_defaults defs;
212 struct mrvl_meshie *ie;
213 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
214 int len;
215 int ret;
216
217 if (count < 2 || count > IW_ESSID_MAX_SIZE + 1)
218 return -EINVAL;
219
220 memset(&cmd, 0, sizeof(struct cmd_ds_mesh_config));
221 ie = (struct mrvl_meshie *) &cmd.data[0];
222
223 /* fetch all other Information Element parameters */
224 ret = mesh_get_default_parameters(dev, &defs);
225
226 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
227
228 /* transfer IE elements */
229 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
230
231 len = count - 1;
232 memcpy(ie->val.mesh_id, buf, len);
233 /* SSID len */
234 ie->val.mesh_id_len = len;
235 /* IE len */
236 ie->len = sizeof(struct mrvl_meshie_val) - IW_ESSID_MAX_SIZE + len;
237
238 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
239 CMD_TYPE_MESH_SET_MESH_IE);
240 if (ret)
241 return ret;
242
243 return strlen(buf);
244}
245
246/**
247 * @brief Get function for sysfs attribute protocol_id
248 */
249static ssize_t protocol_id_get(struct device *dev,
250 struct device_attribute *attr, char *buf)
251{
252 struct mrvl_mesh_defaults defs;
253 int ret;
254
255 ret = mesh_get_default_parameters(dev, &defs);
256
257 if (ret)
258 return ret;
259
260 return snprintf(buf, 5, "%d\n", defs.meshie.val.active_protocol_id);
261}
262
263/**
264 * @brief Set function for sysfs attribute protocol_id
265 */
266static ssize_t protocol_id_set(struct device *dev,
267 struct device_attribute *attr, const char *buf, size_t count)
268{
269 struct cmd_ds_mesh_config cmd;
270 struct mrvl_mesh_defaults defs;
271 struct mrvl_meshie *ie;
272 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
273 uint32_t datum;
274 int ret;
275
276 memset(&cmd, 0, sizeof(cmd));
277 ret = sscanf(buf, "%d", &datum);
278 if ((ret != 1) || (datum > 255))
279 return -EINVAL;
280
281 /* fetch all other Information Element parameters */
282 ret = mesh_get_default_parameters(dev, &defs);
283
284 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
285
286 /* transfer IE elements */
287 ie = (struct mrvl_meshie *) &cmd.data[0];
288 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
289 /* update protocol id */
290 ie->val.active_protocol_id = datum;
291
292 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
293 CMD_TYPE_MESH_SET_MESH_IE);
294 if (ret)
295 return ret;
296
297 return strlen(buf);
298}
299
300/**
301 * @brief Get function for sysfs attribute metric_id
302 */
303static ssize_t metric_id_get(struct device *dev,
304 struct device_attribute *attr, char *buf)
305{
306 struct mrvl_mesh_defaults defs;
307 int ret;
308
309 ret = mesh_get_default_parameters(dev, &defs);
310
311 if (ret)
312 return ret;
313
314 return snprintf(buf, 5, "%d\n", defs.meshie.val.active_metric_id);
315}
316
317/**
318 * @brief Set function for sysfs attribute metric_id
319 */
320static ssize_t metric_id_set(struct device *dev, struct device_attribute *attr,
321 const char *buf, size_t count)
322{
323 struct cmd_ds_mesh_config cmd;
324 struct mrvl_mesh_defaults defs;
325 struct mrvl_meshie *ie;
326 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
327 uint32_t datum;
328 int ret;
329
330 memset(&cmd, 0, sizeof(cmd));
331 ret = sscanf(buf, "%d", &datum);
332 if ((ret != 1) || (datum > 255))
333 return -EINVAL;
334
335 /* fetch all other Information Element parameters */
336 ret = mesh_get_default_parameters(dev, &defs);
337
338 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
339
340 /* transfer IE elements */
341 ie = (struct mrvl_meshie *) &cmd.data[0];
342 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
343 /* update metric id */
344 ie->val.active_metric_id = datum;
345
346 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
347 CMD_TYPE_MESH_SET_MESH_IE);
348 if (ret)
349 return ret;
350
351 return strlen(buf);
352}
353
354/**
355 * @brief Get function for sysfs attribute capability
356 */
357static ssize_t capability_get(struct device *dev,
358 struct device_attribute *attr, char *buf)
359{
360 struct mrvl_mesh_defaults defs;
361 int ret;
362
363 ret = mesh_get_default_parameters(dev, &defs);
364
365 if (ret)
366 return ret;
367
368 return snprintf(buf, 5, "%d\n", defs.meshie.val.mesh_capability);
369}
370
371/**
372 * @brief Set function for sysfs attribute capability
373 */
374static ssize_t capability_set(struct device *dev, struct device_attribute *attr,
375 const char *buf, size_t count)
376{
377 struct cmd_ds_mesh_config cmd;
378 struct mrvl_mesh_defaults defs;
379 struct mrvl_meshie *ie;
380 struct lbs_private *priv = to_net_dev(dev)->ml_priv;
381 uint32_t datum;
382 int ret;
383
384 memset(&cmd, 0, sizeof(cmd));
385 ret = sscanf(buf, "%d", &datum);
386 if ((ret != 1) || (datum > 255))
387 return -EINVAL;
388
389 /* fetch all other Information Element parameters */
390 ret = mesh_get_default_parameters(dev, &defs);
391
392 cmd.length = cpu_to_le16(sizeof(struct mrvl_meshie));
393
394 /* transfer IE elements */
395 ie = (struct mrvl_meshie *) &cmd.data[0];
396 memcpy(ie, &defs.meshie, sizeof(struct mrvl_meshie));
397 /* update value */
398 ie->val.mesh_capability = datum;
399
400 ret = lbs_mesh_config_send(priv, &cmd, CMD_ACT_MESH_CONFIG_SET,
401 CMD_TYPE_MESH_SET_MESH_IE);
402 if (ret)
403 return ret;
404
405 return strlen(buf);
406}
407
408
409static DEVICE_ATTR(bootflag, 0644, bootflag_get, bootflag_set);
410static DEVICE_ATTR(boottime, 0644, boottime_get, boottime_set);
411static DEVICE_ATTR(channel, 0644, channel_get, channel_set);
412static DEVICE_ATTR(mesh_id, 0644, mesh_id_get, mesh_id_set);
413static DEVICE_ATTR(protocol_id, 0644, protocol_id_get, protocol_id_set);
414static DEVICE_ATTR(metric_id, 0644, metric_id_get, metric_id_set);
415static DEVICE_ATTR(capability, 0644, capability_get, capability_set);
416
417static struct attribute *boot_opts_attrs[] = {
418 &dev_attr_bootflag.attr,
419 &dev_attr_boottime.attr,
420 &dev_attr_channel.attr,
421 NULL
422};
423
424static struct attribute_group boot_opts_group = {
425 .name = "boot_options",
426 .attrs = boot_opts_attrs,
427};
428
429static struct attribute *mesh_ie_attrs[] = {
430 &dev_attr_mesh_id.attr,
431 &dev_attr_protocol_id.attr,
432 &dev_attr_metric_id.attr,
433 &dev_attr_capability.attr,
434 NULL
435};
436
437static struct attribute_group mesh_ie_group = {
438 .name = "mesh_ie",
439 .attrs = mesh_ie_attrs,
440};
441
442void lbs_persist_config_init(struct net_device *dev)
443{
444 int ret;
445 ret = sysfs_create_group(&(dev->dev.kobj), &boot_opts_group);
446 ret = sysfs_create_group(&(dev->dev.kobj), &mesh_ie_group);
447}
448
449void lbs_persist_config_remove(struct net_device *dev)
450{
451 sysfs_remove_group(&(dev->dev.kobj), &boot_opts_group);
452 sysfs_remove_group(&(dev->dev.kobj), &mesh_ie_group);
453}
diff --git a/drivers/net/wireless/libertas/rx.c b/drivers/net/wireless/libertas/rx.c
index 65f02cc6752f..784dae714705 100644
--- a/drivers/net/wireless/libertas/rx.c
+++ b/drivers/net/wireless/libertas/rx.c
@@ -2,9 +2,10 @@
2 * This file contains the handling of RX in wlan driver. 2 * This file contains the handling of RX in wlan driver.
3 */ 3 */
4#include <linux/etherdevice.h> 4#include <linux/etherdevice.h>
5#include <linux/slab.h>
5#include <linux/types.h> 6#include <linux/types.h>
6 7
7#include "hostcmd.h" 8#include "host.h"
8#include "radiotap.h" 9#include "radiotap.h"
9#include "decl.h" 10#include "decl.h"
10#include "dev.h" 11#include "dev.h"
@@ -160,15 +161,8 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb)
160 p_rx_pd = (struct rxpd *) skb->data; 161 p_rx_pd = (struct rxpd *) skb->data;
161 p_rx_pkt = (struct rxpackethdr *) ((u8 *)p_rx_pd + 162 p_rx_pkt = (struct rxpackethdr *) ((u8 *)p_rx_pd +
162 le32_to_cpu(p_rx_pd->pkt_ptr)); 163 le32_to_cpu(p_rx_pd->pkt_ptr));
163 if (priv->mesh_dev) { 164
164 if (priv->mesh_fw_ver == MESH_FW_OLD) { 165 dev = lbs_mesh_set_dev(priv, dev, p_rx_pd);
165 if (p_rx_pd->rx_control & RxPD_MESH_FRAME)
166 dev = priv->mesh_dev;
167 } else if (priv->mesh_fw_ver == MESH_FW_NEW) {
168 if (p_rx_pd->u.bss.bss_num == MESH_IFACE_ID)
169 dev = priv->mesh_dev;
170 }
171 }
172 166
173 lbs_deb_hex(LBS_DEB_RX, "RX Data: Before chop rxpd", skb->data, 167 lbs_deb_hex(LBS_DEB_RX, "RX Data: Before chop rxpd", skb->data,
174 min_t(unsigned int, skb->len, 100)); 168 min_t(unsigned int, skb->len, 100));
diff --git a/drivers/net/wireless/libertas/scan.c b/drivers/net/wireless/libertas/scan.c
index 6c95af3023cc..24cd54b3a806 100644
--- a/drivers/net/wireless/libertas/scan.c
+++ b/drivers/net/wireless/libertas/scan.c
@@ -4,6 +4,7 @@
4 * IOCTL handlers as well as command preperation and response routines 4 * IOCTL handlers as well as command preperation and response routines
5 * for sending scan commands to the firmware. 5 * for sending scan commands to the firmware.
6 */ 6 */
7#include <linux/slab.h>
7#include <linux/types.h> 8#include <linux/types.h>
8#include <linux/kernel.h> 9#include <linux/kernel.h>
9#include <linux/etherdevice.h> 10#include <linux/etherdevice.h>
@@ -12,18 +13,19 @@
12#include <net/lib80211.h> 13#include <net/lib80211.h>
13 14
14#include "host.h" 15#include "host.h"
15#include "decl.h"
16#include "dev.h" 16#include "dev.h"
17#include "scan.h" 17#include "scan.h"
18#include "assoc.h"
19#include "wext.h"
18#include "cmd.h" 20#include "cmd.h"
19 21
20//! Approximate amount of data needed to pass a scan result back to iwlist 22//! Approximate amount of data needed to pass a scan result back to iwlist
21#define MAX_SCAN_CELL_SIZE (IW_EV_ADDR_LEN \ 23#define MAX_SCAN_CELL_SIZE (IW_EV_ADDR_LEN \
22 + IW_ESSID_MAX_SIZE \ 24 + IEEE80211_MAX_SSID_LEN \
23 + IW_EV_UINT_LEN \ 25 + IW_EV_UINT_LEN \
24 + IW_EV_FREQ_LEN \ 26 + IW_EV_FREQ_LEN \
25 + IW_EV_QUAL_LEN \ 27 + IW_EV_QUAL_LEN \
26 + IW_ESSID_MAX_SIZE \ 28 + IEEE80211_MAX_SSID_LEN \
27 + IW_EV_PARAM_LEN \ 29 + IW_EV_PARAM_LEN \
28 + 40) /* 40 for WPAIE */ 30 + 40) /* 40 for WPAIE */
29 31
@@ -121,6 +123,189 @@ static inline int is_same_network(struct bss_descriptor *src,
121 123
122 124
123 125
126/*********************************************************************/
127/* */
128/* Region channel support */
129/* */
130/*********************************************************************/
131
132#define LBS_TX_PWR_DEFAULT 20 /*100mW */
133#define LBS_TX_PWR_US_DEFAULT 20 /*100mW */
134#define LBS_TX_PWR_JP_DEFAULT 16 /*50mW */
135#define LBS_TX_PWR_FR_DEFAULT 20 /*100mW */
136#define LBS_TX_PWR_EMEA_DEFAULT 20 /*100mW */
137
138/* Format { channel, frequency (MHz), maxtxpower } */
139/* band: 'B/G', region: USA FCC/Canada IC */
140static struct chan_freq_power channel_freq_power_US_BG[] = {
141 {1, 2412, LBS_TX_PWR_US_DEFAULT},
142 {2, 2417, LBS_TX_PWR_US_DEFAULT},
143 {3, 2422, LBS_TX_PWR_US_DEFAULT},
144 {4, 2427, LBS_TX_PWR_US_DEFAULT},
145 {5, 2432, LBS_TX_PWR_US_DEFAULT},
146 {6, 2437, LBS_TX_PWR_US_DEFAULT},
147 {7, 2442, LBS_TX_PWR_US_DEFAULT},
148 {8, 2447, LBS_TX_PWR_US_DEFAULT},
149 {9, 2452, LBS_TX_PWR_US_DEFAULT},
150 {10, 2457, LBS_TX_PWR_US_DEFAULT},
151 {11, 2462, LBS_TX_PWR_US_DEFAULT}
152};
153
154/* band: 'B/G', region: Europe ETSI */
155static struct chan_freq_power channel_freq_power_EU_BG[] = {
156 {1, 2412, LBS_TX_PWR_EMEA_DEFAULT},
157 {2, 2417, LBS_TX_PWR_EMEA_DEFAULT},
158 {3, 2422, LBS_TX_PWR_EMEA_DEFAULT},
159 {4, 2427, LBS_TX_PWR_EMEA_DEFAULT},
160 {5, 2432, LBS_TX_PWR_EMEA_DEFAULT},
161 {6, 2437, LBS_TX_PWR_EMEA_DEFAULT},
162 {7, 2442, LBS_TX_PWR_EMEA_DEFAULT},
163 {8, 2447, LBS_TX_PWR_EMEA_DEFAULT},
164 {9, 2452, LBS_TX_PWR_EMEA_DEFAULT},
165 {10, 2457, LBS_TX_PWR_EMEA_DEFAULT},
166 {11, 2462, LBS_TX_PWR_EMEA_DEFAULT},
167 {12, 2467, LBS_TX_PWR_EMEA_DEFAULT},
168 {13, 2472, LBS_TX_PWR_EMEA_DEFAULT}
169};
170
171/* band: 'B/G', region: Spain */
172static struct chan_freq_power channel_freq_power_SPN_BG[] = {
173 {10, 2457, LBS_TX_PWR_DEFAULT},
174 {11, 2462, LBS_TX_PWR_DEFAULT}
175};
176
177/* band: 'B/G', region: France */
178static struct chan_freq_power channel_freq_power_FR_BG[] = {
179 {10, 2457, LBS_TX_PWR_FR_DEFAULT},
180 {11, 2462, LBS_TX_PWR_FR_DEFAULT},
181 {12, 2467, LBS_TX_PWR_FR_DEFAULT},
182 {13, 2472, LBS_TX_PWR_FR_DEFAULT}
183};
184
185/* band: 'B/G', region: Japan */
186static struct chan_freq_power channel_freq_power_JPN_BG[] = {
187 {1, 2412, LBS_TX_PWR_JP_DEFAULT},
188 {2, 2417, LBS_TX_PWR_JP_DEFAULT},
189 {3, 2422, LBS_TX_PWR_JP_DEFAULT},
190 {4, 2427, LBS_TX_PWR_JP_DEFAULT},
191 {5, 2432, LBS_TX_PWR_JP_DEFAULT},
192 {6, 2437, LBS_TX_PWR_JP_DEFAULT},
193 {7, 2442, LBS_TX_PWR_JP_DEFAULT},
194 {8, 2447, LBS_TX_PWR_JP_DEFAULT},
195 {9, 2452, LBS_TX_PWR_JP_DEFAULT},
196 {10, 2457, LBS_TX_PWR_JP_DEFAULT},
197 {11, 2462, LBS_TX_PWR_JP_DEFAULT},
198 {12, 2467, LBS_TX_PWR_JP_DEFAULT},
199 {13, 2472, LBS_TX_PWR_JP_DEFAULT},
200 {14, 2484, LBS_TX_PWR_JP_DEFAULT}
201};
202
203/**
204 * the structure for channel, frequency and power
205 */
206struct region_cfp_table {
207 u8 region;
208 struct chan_freq_power *cfp_BG;
209 int cfp_no_BG;
210};
211
212/**
213 * the structure for the mapping between region and CFP
214 */
215static struct region_cfp_table region_cfp_table[] = {
216 {0x10, /*US FCC */
217 channel_freq_power_US_BG,
218 ARRAY_SIZE(channel_freq_power_US_BG),
219 }
220 ,
221 {0x20, /*CANADA IC */
222 channel_freq_power_US_BG,
223 ARRAY_SIZE(channel_freq_power_US_BG),
224 }
225 ,
226 {0x30, /*EU*/ channel_freq_power_EU_BG,
227 ARRAY_SIZE(channel_freq_power_EU_BG),
228 }
229 ,
230 {0x31, /*SPAIN*/ channel_freq_power_SPN_BG,
231 ARRAY_SIZE(channel_freq_power_SPN_BG),
232 }
233 ,
234 {0x32, /*FRANCE*/ channel_freq_power_FR_BG,
235 ARRAY_SIZE(channel_freq_power_FR_BG),
236 }
237 ,
238 {0x40, /*JAPAN*/ channel_freq_power_JPN_BG,
239 ARRAY_SIZE(channel_freq_power_JPN_BG),
240 }
241 ,
242/*Add new region here */
243};
244
245/**
246 * @brief This function finds the CFP in
247 * region_cfp_table based on region and band parameter.
248 *
249 * @param region The region code
250 * @param band The band
251 * @param cfp_no A pointer to CFP number
252 * @return A pointer to CFP
253 */
254static struct chan_freq_power *lbs_get_region_cfp_table(u8 region, int *cfp_no)
255{
256 int i, end;
257
258 lbs_deb_enter(LBS_DEB_MAIN);
259
260 end = ARRAY_SIZE(region_cfp_table);
261
262 for (i = 0; i < end ; i++) {
263 lbs_deb_main("region_cfp_table[i].region=%d\n",
264 region_cfp_table[i].region);
265 if (region_cfp_table[i].region == region) {
266 *cfp_no = region_cfp_table[i].cfp_no_BG;
267 lbs_deb_leave(LBS_DEB_MAIN);
268 return region_cfp_table[i].cfp_BG;
269 }
270 }
271
272 lbs_deb_leave_args(LBS_DEB_MAIN, "ret NULL");
273 return NULL;
274}
275
276int lbs_set_regiontable(struct lbs_private *priv, u8 region, u8 band)
277{
278 int ret = 0;
279 int i = 0;
280
281 struct chan_freq_power *cfp;
282 int cfp_no;
283
284 lbs_deb_enter(LBS_DEB_MAIN);
285
286 memset(priv->region_channel, 0, sizeof(priv->region_channel));
287
288 cfp = lbs_get_region_cfp_table(region, &cfp_no);
289 if (cfp != NULL) {
290 priv->region_channel[i].nrcfp = cfp_no;
291 priv->region_channel[i].CFP = cfp;
292 } else {
293 lbs_deb_main("wrong region code %#x in band B/G\n",
294 region);
295 ret = -1;
296 goto out;
297 }
298 priv->region_channel[i].valid = 1;
299 priv->region_channel[i].region = region;
300 priv->region_channel[i].band = band;
301 i++;
302out:
303 lbs_deb_leave_args(LBS_DEB_MAIN, "ret %d", ret);
304 return ret;
305}
306
307
308
124 309
125/*********************************************************************/ 310/*********************************************************************/
126/* */ 311/* */
@@ -161,31 +346,15 @@ static int lbs_scan_create_channel_list(struct lbs_private *priv,
161 scantype = CMD_SCAN_TYPE_ACTIVE; 346 scantype = CMD_SCAN_TYPE_ACTIVE;
162 347
163 for (rgnidx = 0; rgnidx < ARRAY_SIZE(priv->region_channel); rgnidx++) { 348 for (rgnidx = 0; rgnidx < ARRAY_SIZE(priv->region_channel); rgnidx++) {
164 if (priv->enable11d && (priv->connect_status != LBS_CONNECTED) 349 if (!priv->region_channel[rgnidx].valid)
165 && (priv->mesh_connect_status != LBS_CONNECTED)) { 350 continue;
166 /* Scan all the supported chan for the first scan */ 351 scanregion = &priv->region_channel[rgnidx];
167 if (!priv->universal_channel[rgnidx].valid)
168 continue;
169 scanregion = &priv->universal_channel[rgnidx];
170
171 /* clear the parsed_region_chan for the first scan */
172 memset(&priv->parsed_region_chan, 0x00,
173 sizeof(priv->parsed_region_chan));
174 } else {
175 if (!priv->region_channel[rgnidx].valid)
176 continue;
177 scanregion = &priv->region_channel[rgnidx];
178 }
179 352
180 for (nextchan = 0; nextchan < scanregion->nrcfp; nextchan++, chanidx++) { 353 for (nextchan = 0; nextchan < scanregion->nrcfp; nextchan++, chanidx++) {
181 struct chanscanparamset *chan = &scanchanlist[chanidx]; 354 struct chanscanparamset *chan = &scanchanlist[chanidx];
182 355
183 cfp = scanregion->CFP + nextchan; 356 cfp = scanregion->CFP + nextchan;
184 357
185 if (priv->enable11d)
186 scantype = lbs_get_scan_type_11d(cfp->channel,
187 &priv->parsed_region_chan);
188
189 if (scanregion->band == BAND_B || scanregion->band == BAND_G) 358 if (scanregion->band == BAND_B || scanregion->band == BAND_G)
190 chan->radiotype = CMD_SCAN_RADIO_TYPE_BG; 359 chan->radiotype = CMD_SCAN_RADIO_TYPE_BG;
191 360
@@ -399,11 +568,8 @@ int lbs_scan_networks(struct lbs_private *priv, int full_scan)
399 chan_count = lbs_scan_create_channel_list(priv, chan_list); 568 chan_count = lbs_scan_create_channel_list(priv, chan_list);
400 569
401 netif_stop_queue(priv->dev); 570 netif_stop_queue(priv->dev);
402 netif_carrier_off(priv->dev); 571 if (priv->mesh_dev)
403 if (priv->mesh_dev) {
404 netif_stop_queue(priv->mesh_dev); 572 netif_stop_queue(priv->mesh_dev);
405 netif_carrier_off(priv->mesh_dev);
406 }
407 573
408 /* Prepare to continue an interrupted scan */ 574 /* Prepare to continue an interrupted scan */
409 lbs_deb_scan("chan_count %d, scan_channel %d\n", 575 lbs_deb_scan("chan_count %d, scan_channel %d\n",
@@ -467,16 +633,13 @@ out2:
467 priv->scan_channel = 0; 633 priv->scan_channel = 0;
468 634
469out: 635out:
470 if (priv->connect_status == LBS_CONNECTED) { 636 if (priv->connect_status == LBS_CONNECTED && !priv->tx_pending_len)
471 netif_carrier_on(priv->dev); 637 netif_wake_queue(priv->dev);
472 if (!priv->tx_pending_len) 638
473 netif_wake_queue(priv->dev); 639 if (priv->mesh_dev && lbs_mesh_connected(priv) &&
474 } 640 !priv->tx_pending_len)
475 if (priv->mesh_dev && (priv->mesh_connect_status == LBS_CONNECTED)) { 641 netif_wake_queue(priv->mesh_dev);
476 netif_carrier_on(priv->mesh_dev); 642
477 if (!priv->tx_pending_len)
478 netif_wake_queue(priv->mesh_dev);
479 }
480 kfree(chan_list); 643 kfree(chan_list);
481 644
482 lbs_deb_leave_args(LBS_DEB_SCAN, "ret %d", ret); 645 lbs_deb_leave_args(LBS_DEB_SCAN, "ret %d", ret);
@@ -519,7 +682,6 @@ static int lbs_process_bss(struct bss_descriptor *bss,
519 struct ieee_ie_cf_param_set *cf; 682 struct ieee_ie_cf_param_set *cf;
520 struct ieee_ie_ibss_param_set *ibss; 683 struct ieee_ie_ibss_param_set *ibss;
521 DECLARE_SSID_BUF(ssid); 684 DECLARE_SSID_BUF(ssid);
522 struct ieee_ie_country_info_set *pcountryinfo;
523 uint8_t *pos, *end, *p; 685 uint8_t *pos, *end, *p;
524 uint8_t n_ex_rates = 0, got_basic_rates = 0, n_basic_rates = 0; 686 uint8_t n_ex_rates = 0, got_basic_rates = 0, n_basic_rates = 0;
525 uint16_t beaconsize = 0; 687 uint16_t beaconsize = 0;
@@ -642,26 +804,6 @@ static int lbs_process_bss(struct bss_descriptor *bss,
642 lbs_deb_scan("got IBSS IE\n"); 804 lbs_deb_scan("got IBSS IE\n");
643 break; 805 break;
644 806
645 case WLAN_EID_COUNTRY:
646 pcountryinfo = (struct ieee_ie_country_info_set *) pos;
647 lbs_deb_scan("got COUNTRY IE\n");
648 if (pcountryinfo->header.len < sizeof(pcountryinfo->countrycode)
649 || pcountryinfo->header.len > 254) {
650 lbs_deb_scan("%s: 11D- Err CountryInfo len %d, min %zd, max 254\n",
651 __func__,
652 pcountryinfo->header.len,
653 sizeof(pcountryinfo->countrycode));
654 ret = -1;
655 goto done;
656 }
657
658 memcpy(&bss->countryinfo, pcountryinfo,
659 pcountryinfo->header.len + 2);
660 lbs_deb_hex(LBS_DEB_SCAN, "process_bss: 11d countryinfo",
661 (uint8_t *) pcountryinfo,
662 (int) (pcountryinfo->header.len + 2));
663 break;
664
665 case WLAN_EID_EXT_SUPP_RATES: 807 case WLAN_EID_EXT_SUPP_RATES:
666 /* only process extended supported rate if data rate is 808 /* only process extended supported rate if data rate is
667 * already found. Data rate IE should come before 809 * already found. Data rate IE should come before
@@ -812,7 +954,7 @@ static inline char *lbs_translate_scan(struct lbs_private *priv,
812 /* SSID */ 954 /* SSID */
813 iwe.cmd = SIOCGIWESSID; 955 iwe.cmd = SIOCGIWESSID;
814 iwe.u.data.flags = 1; 956 iwe.u.data.flags = 1;
815 iwe.u.data.length = min((uint32_t) bss->ssid_len, (uint32_t) IW_ESSID_MAX_SIZE); 957 iwe.u.data.length = min((uint32_t) bss->ssid_len, (uint32_t) IEEE80211_MAX_SSID_LEN);
816 start = iwe_stream_add_point(info, start, stop, &iwe, bss->ssid); 958 start = iwe_stream_add_point(info, start, stop, &iwe, bss->ssid);
817 959
818 /* Mode */ 960 /* Mode */
@@ -1022,9 +1164,12 @@ int lbs_get_scan(struct net_device *dev, struct iw_request_info *info,
1022 return -EAGAIN; 1164 return -EAGAIN;
1023 1165
1024 /* Update RSSI if current BSS is a locally created ad-hoc BSS */ 1166 /* Update RSSI if current BSS is a locally created ad-hoc BSS */
1025 if ((priv->mode == IW_MODE_ADHOC) && priv->adhoccreate) 1167 if ((priv->mode == IW_MODE_ADHOC) && priv->adhoccreate) {
1026 lbs_prepare_and_send_command(priv, CMD_802_11_RSSI, 0, 1168 err = lbs_prepare_and_send_command(priv, CMD_802_11_RSSI, 0,
1027 CMD_OPTION_WAITFORRSP, 0, NULL); 1169 CMD_OPTION_WAITFORRSP, 0, NULL);
1170 if (err)
1171 goto out;
1172 }
1028 1173
1029 mutex_lock(&priv->lock); 1174 mutex_lock(&priv->lock);
1030 list_for_each_entry_safe (iter_bss, safe, &priv->network_list, list) { 1175 list_for_each_entry_safe (iter_bss, safe, &priv->network_list, list) {
@@ -1058,7 +1203,7 @@ int lbs_get_scan(struct net_device *dev, struct iw_request_info *info,
1058 1203
1059 dwrq->length = (ev - extra); 1204 dwrq->length = (ev - extra);
1060 dwrq->flags = 0; 1205 dwrq->flags = 0;
1061 1206out:
1062 lbs_deb_leave_args(LBS_DEB_WEXT, "ret %d", err); 1207 lbs_deb_leave_args(LBS_DEB_WEXT, "ret %d", err);
1063 return err; 1208 return err;
1064} 1209}
@@ -1141,11 +1286,11 @@ static int lbs_ret_80211_scan(struct lbs_private *priv, unsigned long dummy,
1141 /* The size of the TLV buffer is equal to the entire command response 1286 /* The size of the TLV buffer is equal to the entire command response
1142 * size (scanrespsize) minus the fixed fields (sizeof()'s), the 1287 * size (scanrespsize) minus the fixed fields (sizeof()'s), the
1143 * BSS Descriptions (bssdescriptsize as bytesLef) and the command 1288 * BSS Descriptions (bssdescriptsize as bytesLef) and the command
1144 * response header (S_DS_GEN) 1289 * response header (sizeof(struct cmd_header))
1145 */ 1290 */
1146 tlvbufsize = scanrespsize - (bytesleft + sizeof(scanresp->bssdescriptsize) 1291 tlvbufsize = scanrespsize - (bytesleft + sizeof(scanresp->bssdescriptsize)
1147 + sizeof(scanresp->nr_sets) 1292 + sizeof(scanresp->nr_sets)
1148 + S_DS_GEN); 1293 + sizeof(struct cmd_header));
1149 1294
1150 /* 1295 /*
1151 * Process each scan response returned (scanresp->nr_sets). Save 1296 * Process each scan response returned (scanresp->nr_sets). Save
diff --git a/drivers/net/wireless/libertas/scan.h b/drivers/net/wireless/libertas/scan.h
index fab7d5d097fc..8fb1706d7526 100644
--- a/drivers/net/wireless/libertas/scan.h
+++ b/drivers/net/wireless/libertas/scan.h
@@ -9,8 +9,36 @@
9 9
10#include <net/iw_handler.h> 10#include <net/iw_handler.h>
11 11
12struct lbs_private;
13
12#define MAX_NETWORK_COUNT 128 14#define MAX_NETWORK_COUNT 128
13 15
16/** Chan-freq-TxPower mapping table*/
17struct chan_freq_power {
18 /** channel Number */
19 u16 channel;
20 /** frequency of this channel */
21 u32 freq;
22 /** Max allowed Tx power level */
23 u16 maxtxpower;
24 /** TRUE:channel unsupported; FLASE:supported*/
25 u8 unsupported;
26};
27
28/** region-band mapping table*/
29struct region_channel {
30 /** TRUE if this entry is valid */
31 u8 valid;
32 /** region code for US, Japan ... */
33 u8 region;
34 /** band B/G/A, used for BAND_CONFIG cmd */
35 u8 band;
36 /** Actual No. of elements in the array below */
37 u8 nrcfp;
38 /** chan-freq-txpower mapping table*/
39 struct chan_freq_power *CFP;
40};
41
14/** 42/**
15 * @brief Maximum number of channels that can be sent in a setuserscan ioctl 43 * @brief Maximum number of channels that can be sent in a setuserscan ioctl
16 */ 44 */
@@ -18,6 +46,8 @@
18 46
19int lbs_ssid_cmp(u8 *ssid1, u8 ssid1_len, u8 *ssid2, u8 ssid2_len); 47int lbs_ssid_cmp(u8 *ssid1, u8 ssid1_len, u8 *ssid2, u8 ssid2_len);
20 48
49int lbs_set_regiontable(struct lbs_private *priv, u8 region, u8 band);
50
21int lbs_send_specific_ssid_scan(struct lbs_private *priv, u8 *ssid, 51int lbs_send_specific_ssid_scan(struct lbs_private *priv, u8 *ssid,
22 u8 ssid_len); 52 u8 ssid_len);
23 53
diff --git a/drivers/net/wireless/libertas/tx.c b/drivers/net/wireless/libertas/tx.c
index 8c3766a6e8e7..52d244ea3d97 100644
--- a/drivers/net/wireless/libertas/tx.c
+++ b/drivers/net/wireless/libertas/tx.c
@@ -5,7 +5,7 @@
5#include <linux/etherdevice.h> 5#include <linux/etherdevice.h>
6#include <linux/sched.h> 6#include <linux/sched.h>
7 7
8#include "hostcmd.h" 8#include "host.h"
9#include "radiotap.h" 9#include "radiotap.h"
10#include "decl.h" 10#include "decl.h"
11#include "defs.h" 11#include "defs.h"
@@ -131,12 +131,7 @@ netdev_tx_t lbs_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
131 txpd->tx_packet_length = cpu_to_le16(pkt_len); 131 txpd->tx_packet_length = cpu_to_le16(pkt_len);
132 txpd->tx_packet_location = cpu_to_le32(sizeof(struct txpd)); 132 txpd->tx_packet_location = cpu_to_le32(sizeof(struct txpd));
133 133
134 if (dev == priv->mesh_dev) { 134 lbs_mesh_set_txpd(priv, dev, txpd);
135 if (priv->mesh_fw_ver == MESH_FW_OLD)
136 txpd->tx_control |= cpu_to_le32(TxPD_MESH_FRAME);
137 else if (priv->mesh_fw_ver == MESH_FW_NEW)
138 txpd->u.bss.bss_num = MESH_IFACE_ID;
139 }
140 135
141 lbs_deb_hex(LBS_DEB_TX, "txpd", (u8 *) &txpd, sizeof(struct txpd)); 136 lbs_deb_hex(LBS_DEB_TX, "txpd", (u8 *) &txpd, sizeof(struct txpd));
142 137
@@ -203,7 +198,7 @@ void lbs_send_tx_feedback(struct lbs_private *priv, u32 try_count)
203 if (priv->connect_status == LBS_CONNECTED) 198 if (priv->connect_status == LBS_CONNECTED)
204 netif_wake_queue(priv->dev); 199 netif_wake_queue(priv->dev);
205 200
206 if (priv->mesh_dev && (priv->mesh_connect_status == LBS_CONNECTED)) 201 if (priv->mesh_dev && lbs_mesh_connected(priv))
207 netif_wake_queue(priv->mesh_dev); 202 netif_wake_queue(priv->mesh_dev);
208} 203}
209EXPORT_SYMBOL_GPL(lbs_send_tx_feedback); 204EXPORT_SYMBOL_GPL(lbs_send_tx_feedback);
diff --git a/drivers/net/wireless/libertas/types.h b/drivers/net/wireless/libertas/types.h
index 99905df65b25..3e72c86ceca8 100644
--- a/drivers/net/wireless/libertas/types.h
+++ b/drivers/net/wireless/libertas/types.h
@@ -5,8 +5,8 @@
5#define _LBS_TYPES_H_ 5#define _LBS_TYPES_H_
6 6
7#include <linux/if_ether.h> 7#include <linux/if_ether.h>
8#include <linux/ieee80211.h>
8#include <asm/byteorder.h> 9#include <asm/byteorder.h>
9#include <linux/wireless.h>
10 10
11struct ieee_ie_header { 11struct ieee_ie_header {
12 u8 id; 12 u8 id;
@@ -247,7 +247,7 @@ struct mrvl_meshie_val {
247 uint8_t active_metric_id; 247 uint8_t active_metric_id;
248 uint8_t mesh_capability; 248 uint8_t mesh_capability;
249 uint8_t mesh_id_len; 249 uint8_t mesh_id_len;
250 uint8_t mesh_id[IW_ESSID_MAX_SIZE]; 250 uint8_t mesh_id[IEEE80211_MAX_SSID_LEN];
251} __attribute__ ((packed)); 251} __attribute__ ((packed));
252 252
253struct mrvl_meshie { 253struct mrvl_meshie {
diff --git a/drivers/net/wireless/libertas/wext.c b/drivers/net/wireless/libertas/wext.c
index be837a0d2517..9b555884b08a 100644
--- a/drivers/net/wireless/libertas/wext.c
+++ b/drivers/net/wireless/libertas/wext.c
@@ -2,6 +2,7 @@
2 * This file contains ioctl functions 2 * This file contains ioctl functions
3 */ 3 */
4#include <linux/ctype.h> 4#include <linux/ctype.h>
5#include <linux/slab.h>
5#include <linux/delay.h> 6#include <linux/delay.h>
6#include <linux/if.h> 7#include <linux/if.h>
7#include <linux/if_arp.h> 8#include <linux/if_arp.h>
@@ -45,6 +46,63 @@ static inline void lbs_cancel_association_work(struct lbs_private *priv)
45 priv->pending_assoc_req = NULL; 46 priv->pending_assoc_req = NULL;
46} 47}
47 48
49void lbs_send_disconnect_notification(struct lbs_private *priv)
50{
51 union iwreq_data wrqu;
52
53 memset(wrqu.ap_addr.sa_data, 0x00, ETH_ALEN);
54 wrqu.ap_addr.sa_family = ARPHRD_ETHER;
55 wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
56}
57
58static void lbs_send_iwevcustom_event(struct lbs_private *priv, s8 *str)
59{
60 union iwreq_data iwrq;
61 u8 buf[50];
62
63 lbs_deb_enter(LBS_DEB_WEXT);
64
65 memset(&iwrq, 0, sizeof(union iwreq_data));
66 memset(buf, 0, sizeof(buf));
67
68 snprintf(buf, sizeof(buf) - 1, "%s", str);
69
70 iwrq.data.length = strlen(buf) + 1 + IW_EV_LCP_LEN;
71
72 /* Send Event to upper layer */
73 lbs_deb_wext("event indication string %s\n", (char *)buf);
74 lbs_deb_wext("event indication length %d\n", iwrq.data.length);
75 lbs_deb_wext("sending wireless event IWEVCUSTOM for %s\n", str);
76
77 wireless_send_event(priv->dev, IWEVCUSTOM, &iwrq, buf);
78
79 lbs_deb_leave(LBS_DEB_WEXT);
80}
81
82/**
83 * @brief This function handles MIC failure event.
84 *
85 * @param priv A pointer to struct lbs_private structure
86 * @para event the event id
87 * @return n/a
88 */
89void lbs_send_mic_failureevent(struct lbs_private *priv, u32 event)
90{
91 char buf[50];
92
93 lbs_deb_enter(LBS_DEB_CMD);
94 memset(buf, 0, sizeof(buf));
95
96 sprintf(buf, "%s", "MLME-MICHAELMICFAILURE.indication ");
97
98 if (event == MACREG_INT_CODE_MIC_ERR_UNICAST)
99 strcat(buf, "unicast ");
100 else
101 strcat(buf, "multicast ");
102
103 lbs_send_iwevcustom_event(priv, buf);
104 lbs_deb_leave(LBS_DEB_CMD);
105}
48 106
49/** 107/**
50 * @brief Find the channel frequency power info with specific channel 108 * @brief Find the channel frequency power info with specific channel
@@ -66,8 +124,6 @@ struct chan_freq_power *lbs_find_cfp_by_band_and_channel(
66 for (j = 0; !cfp && (j < ARRAY_SIZE(priv->region_channel)); j++) { 124 for (j = 0; !cfp && (j < ARRAY_SIZE(priv->region_channel)); j++) {
67 rc = &priv->region_channel[j]; 125 rc = &priv->region_channel[j];
68 126
69 if (priv->enable11d)
70 rc = &priv->universal_channel[j];
71 if (!rc->valid || !rc->CFP) 127 if (!rc->valid || !rc->CFP)
72 continue; 128 continue;
73 if (rc->band != band) 129 if (rc->band != band)
@@ -107,8 +163,6 @@ static struct chan_freq_power *find_cfp_by_band_and_freq(
107 for (j = 0; !cfp && (j < ARRAY_SIZE(priv->region_channel)); j++) { 163 for (j = 0; !cfp && (j < ARRAY_SIZE(priv->region_channel)); j++) {
108 rc = &priv->region_channel[j]; 164 rc = &priv->region_channel[j];
109 165
110 if (priv->enable11d)
111 rc = &priv->universal_channel[j];
112 if (!rc->valid || !rc->CFP) 166 if (!rc->valid || !rc->CFP)
113 continue; 167 continue;
114 if (rc->band != band) 168 if (rc->band != band)
@@ -139,7 +193,7 @@ static void copy_active_data_rates(struct lbs_private *priv, u8 *rates)
139 lbs_deb_enter(LBS_DEB_WEXT); 193 lbs_deb_enter(LBS_DEB_WEXT);
140 194
141 if ((priv->connect_status != LBS_CONNECTED) && 195 if ((priv->connect_status != LBS_CONNECTED) &&
142 (priv->mesh_connect_status != LBS_CONNECTED)) 196 !lbs_mesh_connected(priv))
143 memcpy(rates, lbs_bg_rates, MAX_RATES); 197 memcpy(rates, lbs_bg_rates, MAX_RATES);
144 else 198 else
145 memcpy(rates, priv->curbssparams.rates, MAX_RATES); 199 memcpy(rates, priv->curbssparams.rates, MAX_RATES);
@@ -169,12 +223,12 @@ static int lbs_get_freq(struct net_device *dev, struct iw_request_info *info,
169 lbs_deb_enter(LBS_DEB_WEXT); 223 lbs_deb_enter(LBS_DEB_WEXT);
170 224
171 cfp = lbs_find_cfp_by_band_and_channel(priv, 0, 225 cfp = lbs_find_cfp_by_band_and_channel(priv, 0,
172 priv->curbssparams.channel); 226 priv->channel);
173 227
174 if (!cfp) { 228 if (!cfp) {
175 if (priv->curbssparams.channel) 229 if (priv->channel)
176 lbs_deb_wext("invalid channel %d\n", 230 lbs_deb_wext("invalid channel %d\n",
177 priv->curbssparams.channel); 231 priv->channel);
178 return -EINVAL; 232 return -EINVAL;
179 } 233 }
180 234
@@ -245,6 +299,7 @@ static int lbs_get_nick(struct net_device *dev, struct iw_request_info *info,
245 return 0; 299 return 0;
246} 300}
247 301
302#ifdef CONFIG_LIBERTAS_MESH
248static int mesh_get_nick(struct net_device *dev, struct iw_request_info *info, 303static int mesh_get_nick(struct net_device *dev, struct iw_request_info *info,
249 struct iw_point *dwrq, char *extra) 304 struct iw_point *dwrq, char *extra)
250{ 305{
@@ -254,7 +309,7 @@ static int mesh_get_nick(struct net_device *dev, struct iw_request_info *info,
254 309
255 /* Use nickname to indicate that mesh is on */ 310 /* Use nickname to indicate that mesh is on */
256 311
257 if (priv->mesh_connect_status == LBS_CONNECTED) { 312 if (lbs_mesh_connected(priv)) {
258 strncpy(extra, "Mesh", 12); 313 strncpy(extra, "Mesh", 12);
259 extra[12] = '\0'; 314 extra[12] = '\0';
260 dwrq->length = strlen(extra); 315 dwrq->length = strlen(extra);
@@ -268,6 +323,7 @@ static int mesh_get_nick(struct net_device *dev, struct iw_request_info *info,
268 lbs_deb_leave(LBS_DEB_WEXT); 323 lbs_deb_leave(LBS_DEB_WEXT);
269 return 0; 324 return 0;
270} 325}
326#endif
271 327
272static int lbs_set_rts(struct net_device *dev, struct iw_request_info *info, 328static int lbs_set_rts(struct net_device *dev, struct iw_request_info *info,
273 struct iw_param *vwrq, char *extra) 329 struct iw_param *vwrq, char *extra)
@@ -369,6 +425,7 @@ static int lbs_get_mode(struct net_device *dev,
369 return 0; 425 return 0;
370} 426}
371 427
428#ifdef CONFIG_LIBERTAS_MESH
372static int mesh_wlan_get_mode(struct net_device *dev, 429static int mesh_wlan_get_mode(struct net_device *dev,
373 struct iw_request_info *info, u32 * uwrq, 430 struct iw_request_info *info, u32 * uwrq,
374 char *extra) 431 char *extra)
@@ -380,6 +437,7 @@ static int mesh_wlan_get_mode(struct net_device *dev,
380 lbs_deb_leave(LBS_DEB_WEXT); 437 lbs_deb_leave(LBS_DEB_WEXT);
381 return 0; 438 return 0;
382} 439}
440#endif
383 441
384static int lbs_get_txpow(struct net_device *dev, 442static int lbs_get_txpow(struct net_device *dev,
385 struct iw_request_info *info, 443 struct iw_request_info *info,
@@ -547,8 +605,6 @@ static int lbs_get_range(struct net_device *dev, struct iw_request_info *info,
547 struct chan_freq_power *cfp; 605 struct chan_freq_power *cfp;
548 u8 rates[MAX_RATES + 1]; 606 u8 rates[MAX_RATES + 1];
549 607
550 u8 flag = 0;
551
552 lbs_deb_enter(LBS_DEB_WEXT); 608 lbs_deb_enter(LBS_DEB_WEXT);
553 609
554 dwrq->length = sizeof(struct iw_range); 610 dwrq->length = sizeof(struct iw_range);
@@ -570,52 +626,21 @@ static int lbs_get_range(struct net_device *dev, struct iw_request_info *info,
570 626
571 range->scan_capa = IW_SCAN_CAPA_ESSID; 627 range->scan_capa = IW_SCAN_CAPA_ESSID;
572 628
573 if (priv->enable11d && 629 for (j = 0; (range->num_frequency < IW_MAX_FREQUENCIES)
574 (priv->connect_status == LBS_CONNECTED || 630 && (j < ARRAY_SIZE(priv->region_channel)); j++) {
575 priv->mesh_connect_status == LBS_CONNECTED)) { 631 cfp = priv->region_channel[j].CFP;
576 u8 chan_no;
577 u8 band;
578
579 struct parsed_region_chan_11d *parsed_region_chan =
580 &priv->parsed_region_chan;
581
582 if (parsed_region_chan == NULL) {
583 lbs_deb_wext("11d: parsed_region_chan is NULL\n");
584 goto out;
585 }
586 band = parsed_region_chan->band;
587 lbs_deb_wext("band %d, nr_char %d\n", band,
588 parsed_region_chan->nr_chan);
589
590 for (i = 0; (range->num_frequency < IW_MAX_FREQUENCIES) 632 for (i = 0; (range->num_frequency < IW_MAX_FREQUENCIES)
591 && (i < parsed_region_chan->nr_chan); i++) { 633 && priv->region_channel[j].valid
592 chan_no = parsed_region_chan->chanpwr[i].chan; 634 && cfp
593 lbs_deb_wext("chan_no %d\n", chan_no); 635 && (i < priv->region_channel[j].nrcfp); i++) {
594 range->freq[range->num_frequency].i = (long)chan_no; 636 range->freq[range->num_frequency].i =
637 (long)cfp->channel;
595 range->freq[range->num_frequency].m = 638 range->freq[range->num_frequency].m =
596 (long)lbs_chan_2_freq(chan_no) * 100000; 639 (long)cfp->freq * 100000;
597 range->freq[range->num_frequency].e = 1; 640 range->freq[range->num_frequency].e = 1;
641 cfp++;
598 range->num_frequency++; 642 range->num_frequency++;
599 } 643 }
600 flag = 1;
601 }
602 if (!flag) {
603 for (j = 0; (range->num_frequency < IW_MAX_FREQUENCIES)
604 && (j < ARRAY_SIZE(priv->region_channel)); j++) {
605 cfp = priv->region_channel[j].CFP;
606 for (i = 0; (range->num_frequency < IW_MAX_FREQUENCIES)
607 && priv->region_channel[j].valid
608 && cfp
609 && (i < priv->region_channel[j].nrcfp); i++) {
610 range->freq[range->num_frequency].i =
611 (long)cfp->channel;
612 range->freq[range->num_frequency].m =
613 (long)cfp->freq * 100000;
614 range->freq[range->num_frequency].e = 1;
615 cfp++;
616 range->num_frequency++;
617 }
618 }
619 } 644 }
620 645
621 lbs_deb_wext("IW_MAX_FREQUENCIES %d, num_frequency %d\n", 646 lbs_deb_wext("IW_MAX_FREQUENCIES %d, num_frequency %d\n",
@@ -700,7 +725,6 @@ static int lbs_get_range(struct net_device *dev, struct iw_request_info *info,
700 | IW_ENC_CAPA_CIPHER_CCMP; 725 | IW_ENC_CAPA_CIPHER_CCMP;
701 } 726 }
702 727
703out:
704 lbs_deb_leave(LBS_DEB_WEXT); 728 lbs_deb_leave(LBS_DEB_WEXT);
705 return 0; 729 return 0;
706} 730}
@@ -709,6 +733,7 @@ static int lbs_set_power(struct net_device *dev, struct iw_request_info *info,
709 struct iw_param *vwrq, char *extra) 733 struct iw_param *vwrq, char *extra)
710{ 734{
711 struct lbs_private *priv = dev->ml_priv; 735 struct lbs_private *priv = dev->ml_priv;
736 int ret = 0;
712 737
713 lbs_deb_enter(LBS_DEB_WEXT); 738 lbs_deb_enter(LBS_DEB_WEXT);
714 739
@@ -737,8 +762,54 @@ static int lbs_set_power(struct net_device *dev, struct iw_request_info *info,
737 "setting power timeout is not supported\n"); 762 "setting power timeout is not supported\n");
738 return -EINVAL; 763 return -EINVAL;
739 } else if ((vwrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) { 764 } else if ((vwrq->flags & IW_POWER_TYPE) == IW_POWER_PERIOD) {
740 lbs_deb_wext("setting power period not supported\n"); 765 vwrq->value = vwrq->value / 1000;
741 return -EINVAL; 766 if (!priv->enter_deep_sleep) {
767 lbs_pr_err("deep sleep feature is not implemented "
768 "for this interface driver\n");
769 return -EINVAL;
770 }
771
772 if (priv->connect_status == LBS_CONNECTED) {
773 if ((priv->is_auto_deep_sleep_enabled) &&
774 (vwrq->value == -1000)) {
775 lbs_exit_auto_deep_sleep(priv);
776 return 0;
777 } else {
778 lbs_pr_err("can't use deep sleep cmd in "
779 "connected state\n");
780 return -EINVAL;
781 }
782 }
783
784 if ((vwrq->value < 0) && (vwrq->value != -1000)) {
785 lbs_pr_err("unknown option\n");
786 return -EINVAL;
787 }
788
789 if (vwrq->value > 0) {
790 if (!priv->is_auto_deep_sleep_enabled) {
791 priv->is_activity_detected = 0;
792 priv->auto_deep_sleep_timeout = vwrq->value;
793 lbs_enter_auto_deep_sleep(priv);
794 } else {
795 priv->auto_deep_sleep_timeout = vwrq->value;
796 lbs_deb_debugfs("auto deep sleep: "
797 "already enabled\n");
798 }
799 return 0;
800 } else {
801 if (priv->is_auto_deep_sleep_enabled) {
802 lbs_exit_auto_deep_sleep(priv);
803 /* Try to exit deep sleep if auto */
804 /*deep sleep disabled */
805 ret = lbs_set_deep_sleep(priv, 0);
806 }
807 if (vwrq->value == 0)
808 ret = lbs_set_deep_sleep(priv, 1);
809 else if (vwrq->value == -1000)
810 ret = lbs_set_deep_sleep(priv, 0);
811 return ret;
812 }
742 } 813 }
743 814
744 if (priv->psmode != LBS802_11POWERMODECAM) { 815 if (priv->psmode != LBS802_11POWERMODECAM) {
@@ -752,6 +823,7 @@ static int lbs_set_power(struct net_device *dev, struct iw_request_info *info,
752 } 823 }
753 824
754 lbs_deb_leave(LBS_DEB_WEXT); 825 lbs_deb_leave(LBS_DEB_WEXT);
826
755 return 0; 827 return 0;
756} 828}
757 829
@@ -785,7 +857,7 @@ static struct iw_statistics *lbs_get_wireless_stats(struct net_device *dev)
785 u32 rssi_qual; 857 u32 rssi_qual;
786 u32 tx_qual; 858 u32 tx_qual;
787 u32 quality = 0; 859 u32 quality = 0;
788 int stats_valid = 0; 860 int ret, stats_valid = 0;
789 u8 rssi; 861 u8 rssi;
790 u32 tx_retries; 862 u32 tx_retries;
791 struct cmd_ds_802_11_get_log log; 863 struct cmd_ds_802_11_get_log log;
@@ -796,7 +868,7 @@ static struct iw_statistics *lbs_get_wireless_stats(struct net_device *dev)
796 868
797 /* If we're not associated, all quality values are meaningless */ 869 /* If we're not associated, all quality values are meaningless */
798 if ((priv->connect_status != LBS_CONNECTED) && 870 if ((priv->connect_status != LBS_CONNECTED) &&
799 (priv->mesh_connect_status != LBS_CONNECTED)) 871 !lbs_mesh_connected(priv))
800 goto out; 872 goto out;
801 873
802 /* Quality by RSSI */ 874 /* Quality by RSSI */
@@ -834,7 +906,9 @@ static struct iw_statistics *lbs_get_wireless_stats(struct net_device *dev)
834 906
835 memset(&log, 0, sizeof(log)); 907 memset(&log, 0, sizeof(log));
836 log.hdr.size = cpu_to_le16(sizeof(log)); 908 log.hdr.size = cpu_to_le16(sizeof(log));
837 lbs_cmd_with_response(priv, CMD_802_11_GET_LOG, &log); 909 ret = lbs_cmd_with_response(priv, CMD_802_11_GET_LOG, &log);
910 if (ret)
911 goto out;
838 912
839 tx_retries = le32_to_cpu(log.retry); 913 tx_retries = le32_to_cpu(log.retry);
840 914
@@ -862,8 +936,10 @@ static struct iw_statistics *lbs_get_wireless_stats(struct net_device *dev)
862 stats_valid = 1; 936 stats_valid = 1;
863 937
864 /* update stats asynchronously for future calls */ 938 /* update stats asynchronously for future calls */
865 lbs_prepare_and_send_command(priv, CMD_802_11_RSSI, 0, 939 ret = lbs_prepare_and_send_command(priv, CMD_802_11_RSSI, 0,
866 0, 0, NULL); 940 0, 0, NULL);
941 if (ret)
942 lbs_pr_err("RSSI command failed\n");
867out: 943out:
868 if (!stats_valid) { 944 if (!stats_valid) {
869 priv->wstats.miss.beacon = 0; 945 priv->wstats.miss.beacon = 0;
@@ -939,6 +1015,7 @@ out:
939 return ret; 1015 return ret;
940} 1016}
941 1017
1018#ifdef CONFIG_LIBERTAS_MESH
942static int lbs_mesh_set_freq(struct net_device *dev, 1019static int lbs_mesh_set_freq(struct net_device *dev,
943 struct iw_request_info *info, 1020 struct iw_request_info *info,
944 struct iw_freq *fwrq, char *extra) 1021 struct iw_freq *fwrq, char *extra)
@@ -973,7 +1050,7 @@ static int lbs_mesh_set_freq(struct net_device *dev,
973 goto out; 1050 goto out;
974 } 1051 }
975 1052
976 if (fwrq->m != priv->curbssparams.channel) { 1053 if (fwrq->m != priv->channel) {
977 lbs_deb_wext("mesh channel change forces eth disconnect\n"); 1054 lbs_deb_wext("mesh channel change forces eth disconnect\n");
978 if (priv->mode == IW_MODE_INFRA) 1055 if (priv->mode == IW_MODE_INFRA)
979 lbs_cmd_80211_deauthenticate(priv, 1056 lbs_cmd_80211_deauthenticate(priv,
@@ -990,6 +1067,7 @@ out:
990 lbs_deb_leave_args(LBS_DEB_WEXT, "ret %d", ret); 1067 lbs_deb_leave_args(LBS_DEB_WEXT, "ret %d", ret);
991 return ret; 1068 return ret;
992} 1069}
1070#endif
993 1071
994static int lbs_set_rate(struct net_device *dev, struct iw_request_info *info, 1072static int lbs_set_rate(struct net_device *dev, struct iw_request_info *info,
995 struct iw_param *vwrq, char *extra) 1073 struct iw_param *vwrq, char *extra)
@@ -1000,6 +1078,7 @@ static int lbs_set_rate(struct net_device *dev, struct iw_request_info *info,
1000 u8 rates[MAX_RATES + 1]; 1078 u8 rates[MAX_RATES + 1];
1001 1079
1002 lbs_deb_enter(LBS_DEB_WEXT); 1080 lbs_deb_enter(LBS_DEB_WEXT);
1081
1003 lbs_deb_wext("vwrq->value %d\n", vwrq->value); 1082 lbs_deb_wext("vwrq->value %d\n", vwrq->value);
1004 lbs_deb_wext("vwrq->fixed %d\n", vwrq->fixed); 1083 lbs_deb_wext("vwrq->fixed %d\n", vwrq->fixed);
1005 1084
@@ -1953,10 +2032,8 @@ static int lbs_get_essid(struct net_device *dev, struct iw_request_info *info,
1953 if (priv->connect_status == LBS_CONNECTED) { 2032 if (priv->connect_status == LBS_CONNECTED) {
1954 memcpy(extra, priv->curbssparams.ssid, 2033 memcpy(extra, priv->curbssparams.ssid,
1955 priv->curbssparams.ssid_len); 2034 priv->curbssparams.ssid_len);
1956 extra[priv->curbssparams.ssid_len] = '\0';
1957 } else { 2035 } else {
1958 memset(extra, 0, 32); 2036 memset(extra, 0, 32);
1959 extra[priv->curbssparams.ssid_len] = '\0';
1960 } 2037 }
1961 /* 2038 /*
1962 * If none, we may want to get the one that was set 2039 * If none, we may want to get the one that was set
@@ -1975,7 +2052,7 @@ static int lbs_set_essid(struct net_device *dev, struct iw_request_info *info,
1975{ 2052{
1976 struct lbs_private *priv = dev->ml_priv; 2053 struct lbs_private *priv = dev->ml_priv;
1977 int ret = 0; 2054 int ret = 0;
1978 u8 ssid[IW_ESSID_MAX_SIZE]; 2055 u8 ssid[IEEE80211_MAX_SSID_LEN];
1979 u8 ssid_len = 0; 2056 u8 ssid_len = 0;
1980 struct assoc_request * assoc_req; 2057 struct assoc_request * assoc_req;
1981 int in_ssid_len = dwrq->length; 2058 int in_ssid_len = dwrq->length;
@@ -1989,7 +2066,7 @@ static int lbs_set_essid(struct net_device *dev, struct iw_request_info *info,
1989 } 2066 }
1990 2067
1991 /* Check the size of the string */ 2068 /* Check the size of the string */
1992 if (in_ssid_len > IW_ESSID_MAX_SIZE) { 2069 if (in_ssid_len > IEEE80211_MAX_SSID_LEN) {
1993 ret = -E2BIG; 2070 ret = -E2BIG;
1994 goto out; 2071 goto out;
1995 } 2072 }
@@ -2020,7 +2097,7 @@ out:
2020 ret = -ENOMEM; 2097 ret = -ENOMEM;
2021 } else { 2098 } else {
2022 /* Copy the SSID to the association request */ 2099 /* Copy the SSID to the association request */
2023 memcpy(&assoc_req->ssid, &ssid, IW_ESSID_MAX_SIZE); 2100 memcpy(&assoc_req->ssid, &ssid, IEEE80211_MAX_SSID_LEN);
2024 assoc_req->ssid_len = ssid_len; 2101 assoc_req->ssid_len = ssid_len;
2025 set_bit(ASSOC_FLAG_SSID, &assoc_req->flags); 2102 set_bit(ASSOC_FLAG_SSID, &assoc_req->flags);
2026 lbs_postpone_association_work(priv); 2103 lbs_postpone_association_work(priv);
@@ -2038,6 +2115,7 @@ out:
2038 return ret; 2115 return ret;
2039} 2116}
2040 2117
2118#ifdef CONFIG_LIBERTAS_MESH
2041static int lbs_mesh_get_essid(struct net_device *dev, 2119static int lbs_mesh_get_essid(struct net_device *dev,
2042 struct iw_request_info *info, 2120 struct iw_request_info *info,
2043 struct iw_point *dwrq, char *extra) 2121 struct iw_point *dwrq, char *extra)
@@ -2071,7 +2149,7 @@ static int lbs_mesh_set_essid(struct net_device *dev,
2071 } 2149 }
2072 2150
2073 /* Check the size of the string */ 2151 /* Check the size of the string */
2074 if (dwrq->length > IW_ESSID_MAX_SIZE) { 2152 if (dwrq->length > IEEE80211_MAX_SSID_LEN) {
2075 ret = -E2BIG; 2153 ret = -E2BIG;
2076 goto out; 2154 goto out;
2077 } 2155 }
@@ -2086,11 +2164,12 @@ static int lbs_mesh_set_essid(struct net_device *dev,
2086 } 2164 }
2087 2165
2088 lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START, 2166 lbs_mesh_config(priv, CMD_ACT_MESH_CONFIG_START,
2089 priv->curbssparams.channel); 2167 priv->channel);
2090 out: 2168 out:
2091 lbs_deb_leave_args(LBS_DEB_WEXT, "ret %d", ret); 2169 lbs_deb_leave_args(LBS_DEB_WEXT, "ret %d", ret);
2092 return ret; 2170 return ret;
2093} 2171}
2172#endif
2094 2173
2095/** 2174/**
2096 * @brief Connect to the AP or Ad-hoc Network with specific bssid 2175 * @brief Connect to the AP or Ad-hoc Network with specific bssid
@@ -2197,7 +2276,13 @@ static const iw_handler lbs_handler[] = {
2197 (iw_handler) lbs_get_encodeext,/* SIOCGIWENCODEEXT */ 2276 (iw_handler) lbs_get_encodeext,/* SIOCGIWENCODEEXT */
2198 (iw_handler) NULL, /* SIOCSIWPMKSA */ 2277 (iw_handler) NULL, /* SIOCSIWPMKSA */
2199}; 2278};
2279struct iw_handler_def lbs_handler_def = {
2280 .num_standard = ARRAY_SIZE(lbs_handler),
2281 .standard = (iw_handler *) lbs_handler,
2282 .get_wireless_stats = lbs_get_wireless_stats,
2283};
2200 2284
2285#ifdef CONFIG_LIBERTAS_MESH
2201static const iw_handler mesh_wlan_handler[] = { 2286static const iw_handler mesh_wlan_handler[] = {
2202 (iw_handler) NULL, /* SIOCSIWCOMMIT */ 2287 (iw_handler) NULL, /* SIOCSIWCOMMIT */
2203 (iw_handler) lbs_get_name, /* SIOCGIWNAME */ 2288 (iw_handler) lbs_get_name, /* SIOCGIWNAME */
@@ -2255,14 +2340,10 @@ static const iw_handler mesh_wlan_handler[] = {
2255 (iw_handler) lbs_get_encodeext,/* SIOCGIWENCODEEXT */ 2340 (iw_handler) lbs_get_encodeext,/* SIOCGIWENCODEEXT */
2256 (iw_handler) NULL, /* SIOCSIWPMKSA */ 2341 (iw_handler) NULL, /* SIOCSIWPMKSA */
2257}; 2342};
2258struct iw_handler_def lbs_handler_def = {
2259 .num_standard = ARRAY_SIZE(lbs_handler),
2260 .standard = (iw_handler *) lbs_handler,
2261 .get_wireless_stats = lbs_get_wireless_stats,
2262};
2263 2343
2264struct iw_handler_def mesh_handler_def = { 2344struct iw_handler_def mesh_handler_def = {
2265 .num_standard = ARRAY_SIZE(mesh_wlan_handler), 2345 .num_standard = ARRAY_SIZE(mesh_wlan_handler),
2266 .standard = (iw_handler *) mesh_wlan_handler, 2346 .standard = (iw_handler *) mesh_wlan_handler,
2267 .get_wireless_stats = lbs_get_wireless_stats, 2347 .get_wireless_stats = lbs_get_wireless_stats,
2268}; 2348};
2349#endif
diff --git a/drivers/net/wireless/libertas/wext.h b/drivers/net/wireless/libertas/wext.h
index 4c08db497606..f3f19fe8c6c6 100644
--- a/drivers/net/wireless/libertas/wext.h
+++ b/drivers/net/wireless/libertas/wext.h
@@ -4,7 +4,14 @@
4#ifndef _LBS_WEXT_H_ 4#ifndef _LBS_WEXT_H_
5#define _LBS_WEXT_H_ 5#define _LBS_WEXT_H_
6 6
7void lbs_send_disconnect_notification(struct lbs_private *priv);
8void lbs_send_mic_failureevent(struct lbs_private *priv, u32 event);
9
10struct chan_freq_power *lbs_find_cfp_by_band_and_channel(
11 struct lbs_private *priv,
12 u8 band,
13 u16 channel);
14
7extern struct iw_handler_def lbs_handler_def; 15extern struct iw_handler_def lbs_handler_def;
8extern struct iw_handler_def mesh_handler_def;
9 16
10#endif 17#endif
diff --git a/drivers/net/wireless/libertas_tf/cmd.c b/drivers/net/wireless/libertas_tf/cmd.c
index 28790e03dc43..b620daf59ef7 100644
--- a/drivers/net/wireless/libertas_tf/cmd.c
+++ b/drivers/net/wireless/libertas_tf/cmd.c
@@ -7,6 +7,8 @@
7 * the Free Software Foundation; either version 2 of the License, or (at 7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version. 8 * your option) any later version.
9 */ 9 */
10#include <linux/slab.h>
11
10#include "libertas_tf.h" 12#include "libertas_tf.h"
11 13
12static const struct channel_range channel_ranges[] = { 14static const struct channel_range channel_ranges[] = {
diff --git a/drivers/net/wireless/libertas_tf/if_usb.c b/drivers/net/wireless/libertas_tf/if_usb.c
index 392337b37b1d..8cc9db60c14b 100644
--- a/drivers/net/wireless/libertas_tf/if_usb.c
+++ b/drivers/net/wireless/libertas_tf/if_usb.c
@@ -11,6 +11,7 @@
11#include <linux/moduleparam.h> 11#include <linux/moduleparam.h>
12#include <linux/firmware.h> 12#include <linux/firmware.h>
13#include <linux/netdevice.h> 13#include <linux/netdevice.h>
14#include <linux/slab.h>
14#include <linux/usb.h> 15#include <linux/usb.h>
15 16
16#define DRV_NAME "lbtf_usb" 17#define DRV_NAME "lbtf_usb"
@@ -23,6 +24,8 @@
23static char *lbtf_fw_name = "lbtf_usb.bin"; 24static char *lbtf_fw_name = "lbtf_usb.bin";
24module_param_named(fw_name, lbtf_fw_name, charp, 0644); 25module_param_named(fw_name, lbtf_fw_name, charp, 0644);
25 26
27MODULE_FIRMWARE("lbtf_usb.bin");
28
26static struct usb_device_id if_usb_table[] = { 29static struct usb_device_id if_usb_table[] = {
27 /* Enter the device signature inside */ 30 /* Enter the device signature inside */
28 { USB_DEVICE(0x1286, 0x2001) }, 31 { USB_DEVICE(0x1286, 0x2001) },
diff --git a/drivers/net/wireless/libertas_tf/main.c b/drivers/net/wireless/libertas_tf/main.c
index 019431d2f8a9..7945ff5aa334 100644
--- a/drivers/net/wireless/libertas_tf/main.c
+++ b/drivers/net/wireless/libertas_tf/main.c
@@ -7,6 +7,8 @@
7 * the Free Software Foundation; either version 2 of the License, or (at 7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version. 8 * your option) any later version.
9 */ 9 */
10#include <linux/slab.h>
11
10#include "libertas_tf.h" 12#include "libertas_tf.h"
11#include "linux/etherdevice.h" 13#include "linux/etherdevice.h"
12 14
@@ -318,14 +320,14 @@ static void lbtf_op_stop(struct ieee80211_hw *hw)
318} 320}
319 321
320static int lbtf_op_add_interface(struct ieee80211_hw *hw, 322static int lbtf_op_add_interface(struct ieee80211_hw *hw,
321 struct ieee80211_if_init_conf *conf) 323 struct ieee80211_vif *vif)
322{ 324{
323 struct lbtf_private *priv = hw->priv; 325 struct lbtf_private *priv = hw->priv;
324 if (priv->vif != NULL) 326 if (priv->vif != NULL)
325 return -EOPNOTSUPP; 327 return -EOPNOTSUPP;
326 328
327 priv->vif = conf->vif; 329 priv->vif = vif;
328 switch (conf->type) { 330 switch (vif->type) {
329 case NL80211_IFTYPE_MESH_POINT: 331 case NL80211_IFTYPE_MESH_POINT:
330 case NL80211_IFTYPE_AP: 332 case NL80211_IFTYPE_AP:
331 lbtf_set_mode(priv, LBTF_AP_MODE); 333 lbtf_set_mode(priv, LBTF_AP_MODE);
@@ -337,12 +339,12 @@ static int lbtf_op_add_interface(struct ieee80211_hw *hw,
337 priv->vif = NULL; 339 priv->vif = NULL;
338 return -EOPNOTSUPP; 340 return -EOPNOTSUPP;
339 } 341 }
340 lbtf_set_mac_address(priv, (u8 *) conf->mac_addr); 342 lbtf_set_mac_address(priv, (u8 *) vif->addr);
341 return 0; 343 return 0;
342} 344}
343 345
344static void lbtf_op_remove_interface(struct ieee80211_hw *hw, 346static void lbtf_op_remove_interface(struct ieee80211_hw *hw,
345 struct ieee80211_if_init_conf *conf) 347 struct ieee80211_vif *vif)
346{ 348{
347 struct lbtf_private *priv = hw->priv; 349 struct lbtf_private *priv = hw->priv;
348 350
@@ -495,7 +497,6 @@ int lbtf_rx(struct lbtf_private *priv, struct sk_buff *skb)
495 stats.band = IEEE80211_BAND_2GHZ; 497 stats.band = IEEE80211_BAND_2GHZ;
496 stats.signal = prxpd->snr; 498 stats.signal = prxpd->snr;
497 stats.noise = prxpd->nf; 499 stats.noise = prxpd->nf;
498 stats.qual = prxpd->snr - prxpd->nf;
499 /* Marvell rate index has a hole at value 4 */ 500 /* Marvell rate index has a hole at value 4 */
500 if (prxpd->rx_rate > 4) 501 if (prxpd->rx_rate > 4)
501 --prxpd->rx_rate; 502 --prxpd->rx_rate;
@@ -556,6 +557,9 @@ struct lbtf_private *lbtf_add_card(void *card, struct device *dmdev)
556 priv->band.n_channels = ARRAY_SIZE(lbtf_channels); 557 priv->band.n_channels = ARRAY_SIZE(lbtf_channels);
557 priv->band.channels = priv->channels; 558 priv->band.channels = priv->channels;
558 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; 559 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
560 hw->wiphy->interface_modes =
561 BIT(NL80211_IFTYPE_STATION) |
562 BIT(NL80211_IFTYPE_ADHOC);
559 skb_queue_head_init(&priv->bc_ps_buf); 563 skb_queue_head_init(&priv->bc_ps_buf);
560 564
561 SET_IEEE80211_DEV(hw, dmdev); 565 SET_IEEE80211_DEV(hw, dmdev);
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index 38cfd79e0590..7cd5f56662fc 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -14,6 +14,7 @@
14 */ 14 */
15 15
16#include <linux/list.h> 16#include <linux/list.h>
17#include <linux/slab.h>
17#include <linux/spinlock.h> 18#include <linux/spinlock.h>
18#include <net/dst.h> 19#include <net/dst.h>
19#include <net/xfrm.h> 20#include <net/xfrm.h>
@@ -32,6 +33,10 @@ static int radios = 2;
32module_param(radios, int, 0444); 33module_param(radios, int, 0444);
33MODULE_PARM_DESC(radios, "Number of simulated radios"); 34MODULE_PARM_DESC(radios, "Number of simulated radios");
34 35
36static bool fake_hw_scan;
37module_param(fake_hw_scan, bool, 0444);
38MODULE_PARM_DESC(fake_hw_scan, "Install fake (no-op) hw-scan handler");
39
35/** 40/**
36 * enum hwsim_regtest - the type of regulatory tests we offer 41 * enum hwsim_regtest - the type of regulatory tests we offer
37 * 42 *
@@ -281,10 +286,12 @@ struct mac80211_hwsim_data {
281 struct ieee80211_channel channels_5ghz[ARRAY_SIZE(hwsim_channels_5ghz)]; 286 struct ieee80211_channel channels_5ghz[ARRAY_SIZE(hwsim_channels_5ghz)];
282 struct ieee80211_rate rates[ARRAY_SIZE(hwsim_rates)]; 287 struct ieee80211_rate rates[ARRAY_SIZE(hwsim_rates)];
283 288
289 struct mac_address addresses[2];
290
284 struct ieee80211_channel *channel; 291 struct ieee80211_channel *channel;
285 unsigned long beacon_int; /* in jiffies unit */ 292 unsigned long beacon_int; /* in jiffies unit */
286 unsigned int rx_filter; 293 unsigned int rx_filter;
287 int started; 294 bool started, idle;
288 struct timer_list beacon_timer; 295 struct timer_list beacon_timer;
289 enum ps_mode { 296 enum ps_mode {
290 PS_DISABLED, PS_ENABLED, PS_AUTO_POLL, PS_MANUAL_POLL 297 PS_DISABLED, PS_ENABLED, PS_AUTO_POLL, PS_MANUAL_POLL
@@ -365,6 +372,49 @@ static void mac80211_hwsim_monitor_rx(struct ieee80211_hw *hw,
365} 372}
366 373
367 374
375static void mac80211_hwsim_monitor_ack(struct ieee80211_hw *hw, const u8 *addr)
376{
377 struct mac80211_hwsim_data *data = hw->priv;
378 struct sk_buff *skb;
379 struct hwsim_radiotap_hdr *hdr;
380 u16 flags;
381 struct ieee80211_hdr *hdr11;
382
383 if (!netif_running(hwsim_mon))
384 return;
385
386 skb = dev_alloc_skb(100);
387 if (skb == NULL)
388 return;
389
390 hdr = (struct hwsim_radiotap_hdr *) skb_put(skb, sizeof(*hdr));
391 hdr->hdr.it_version = PKTHDR_RADIOTAP_VERSION;
392 hdr->hdr.it_pad = 0;
393 hdr->hdr.it_len = cpu_to_le16(sizeof(*hdr));
394 hdr->hdr.it_present = cpu_to_le32((1 << IEEE80211_RADIOTAP_FLAGS) |
395 (1 << IEEE80211_RADIOTAP_CHANNEL));
396 hdr->rt_flags = 0;
397 hdr->rt_rate = 0;
398 hdr->rt_channel = cpu_to_le16(data->channel->center_freq);
399 flags = IEEE80211_CHAN_2GHZ;
400 hdr->rt_chbitmask = cpu_to_le16(flags);
401
402 hdr11 = (struct ieee80211_hdr *) skb_put(skb, 10);
403 hdr11->frame_control = cpu_to_le16(IEEE80211_FTYPE_CTL |
404 IEEE80211_STYPE_ACK);
405 hdr11->duration_id = cpu_to_le16(0);
406 memcpy(hdr11->addr1, addr, ETH_ALEN);
407
408 skb->dev = hwsim_mon;
409 skb_set_mac_header(skb, 0);
410 skb->ip_summed = CHECKSUM_UNNECESSARY;
411 skb->pkt_type = PACKET_OTHERHOST;
412 skb->protocol = htons(ETH_P_802_2);
413 memset(skb->cb, 0, sizeof(skb->cb));
414 netif_rx(skb);
415}
416
417
368static bool hwsim_ps_rx_ok(struct mac80211_hwsim_data *data, 418static bool hwsim_ps_rx_ok(struct mac80211_hwsim_data *data,
369 struct sk_buff *skb) 419 struct sk_buff *skb)
370{ 420{
@@ -393,6 +443,38 @@ static bool hwsim_ps_rx_ok(struct mac80211_hwsim_data *data,
393} 443}
394 444
395 445
446struct mac80211_hwsim_addr_match_data {
447 bool ret;
448 const u8 *addr;
449};
450
451static void mac80211_hwsim_addr_iter(void *data, u8 *mac,
452 struct ieee80211_vif *vif)
453{
454 struct mac80211_hwsim_addr_match_data *md = data;
455 if (memcmp(mac, md->addr, ETH_ALEN) == 0)
456 md->ret = true;
457}
458
459
460static bool mac80211_hwsim_addr_match(struct mac80211_hwsim_data *data,
461 const u8 *addr)
462{
463 struct mac80211_hwsim_addr_match_data md;
464
465 if (memcmp(addr, data->hw->wiphy->perm_addr, ETH_ALEN) == 0)
466 return true;
467
468 md.ret = false;
469 md.addr = addr;
470 ieee80211_iterate_active_interfaces_atomic(data->hw,
471 mac80211_hwsim_addr_iter,
472 &md);
473
474 return md.ret;
475}
476
477
396static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw, 478static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
397 struct sk_buff *skb) 479 struct sk_buff *skb)
398{ 480{
@@ -402,6 +484,12 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
402 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 484 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
403 struct ieee80211_rx_status rx_status; 485 struct ieee80211_rx_status rx_status;
404 486
487 if (data->idle) {
488 printk(KERN_DEBUG "%s: Trying to TX when idle - reject\n",
489 wiphy_name(hw->wiphy));
490 return false;
491 }
492
405 memset(&rx_status, 0, sizeof(rx_status)); 493 memset(&rx_status, 0, sizeof(rx_status));
406 /* TODO: set mactime */ 494 /* TODO: set mactime */
407 rx_status.freq = data->channel->center_freq; 495 rx_status.freq = data->channel->center_freq;
@@ -428,7 +516,8 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
428 if (data == data2) 516 if (data == data2)
429 continue; 517 continue;
430 518
431 if (!data2->started || !hwsim_ps_rx_ok(data2, skb) || 519 if (data2->idle || !data2->started ||
520 !hwsim_ps_rx_ok(data2, skb) ||
432 !data->channel || !data2->channel || 521 !data->channel || !data2->channel ||
433 data->channel->center_freq != data2->channel->center_freq || 522 data->channel->center_freq != data2->channel->center_freq ||
434 !(data->group & data2->group)) 523 !(data->group & data2->group))
@@ -438,8 +527,7 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw,
438 if (nskb == NULL) 527 if (nskb == NULL)
439 continue; 528 continue;
440 529
441 if (memcmp(hdr->addr1, data2->hw->wiphy->perm_addr, 530 if (mac80211_hwsim_addr_match(data2, hdr->addr1))
442 ETH_ALEN) == 0)
443 ack = true; 531 ack = true;
444 memcpy(IEEE80211_SKB_RXCB(nskb), &rx_status, sizeof(rx_status)); 532 memcpy(IEEE80211_SKB_RXCB(nskb), &rx_status, sizeof(rx_status));
445 ieee80211_rx_irqsafe(data2->hw, nskb); 533 ieee80211_rx_irqsafe(data2->hw, nskb);
@@ -464,6 +552,10 @@ static int mac80211_hwsim_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
464 } 552 }
465 553
466 ack = mac80211_hwsim_tx_frame(hw, skb); 554 ack = mac80211_hwsim_tx_frame(hw, skb);
555 if (ack && skb->len >= 16) {
556 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
557 mac80211_hwsim_monitor_ack(hw, hdr->addr2);
558 }
467 559
468 txi = IEEE80211_SKB_CB(skb); 560 txi = IEEE80211_SKB_CB(skb);
469 561
@@ -499,24 +591,24 @@ static void mac80211_hwsim_stop(struct ieee80211_hw *hw)
499 591
500 592
501static int mac80211_hwsim_add_interface(struct ieee80211_hw *hw, 593static int mac80211_hwsim_add_interface(struct ieee80211_hw *hw,
502 struct ieee80211_if_init_conf *conf) 594 struct ieee80211_vif *vif)
503{ 595{
504 printk(KERN_DEBUG "%s:%s (type=%d mac_addr=%pM)\n", 596 printk(KERN_DEBUG "%s:%s (type=%d mac_addr=%pM)\n",
505 wiphy_name(hw->wiphy), __func__, conf->type, 597 wiphy_name(hw->wiphy), __func__, vif->type,
506 conf->mac_addr); 598 vif->addr);
507 hwsim_set_magic(conf->vif); 599 hwsim_set_magic(vif);
508 return 0; 600 return 0;
509} 601}
510 602
511 603
512static void mac80211_hwsim_remove_interface( 604static void mac80211_hwsim_remove_interface(
513 struct ieee80211_hw *hw, struct ieee80211_if_init_conf *conf) 605 struct ieee80211_hw *hw, struct ieee80211_vif *vif)
514{ 606{
515 printk(KERN_DEBUG "%s:%s (type=%d mac_addr=%pM)\n", 607 printk(KERN_DEBUG "%s:%s (type=%d mac_addr=%pM)\n",
516 wiphy_name(hw->wiphy), __func__, conf->type, 608 wiphy_name(hw->wiphy), __func__, vif->type,
517 conf->mac_addr); 609 vif->addr);
518 hwsim_check_magic(conf->vif); 610 hwsim_check_magic(vif);
519 hwsim_clear_magic(conf->vif); 611 hwsim_clear_magic(vif);
520} 612}
521 613
522 614
@@ -564,12 +656,28 @@ static int mac80211_hwsim_config(struct ieee80211_hw *hw, u32 changed)
564{ 656{
565 struct mac80211_hwsim_data *data = hw->priv; 657 struct mac80211_hwsim_data *data = hw->priv;
566 struct ieee80211_conf *conf = &hw->conf; 658 struct ieee80211_conf *conf = &hw->conf;
567 659 static const char *chantypes[4] = {
568 printk(KERN_DEBUG "%s:%s (freq=%d idle=%d ps=%d)\n", 660 [NL80211_CHAN_NO_HT] = "noht",
661 [NL80211_CHAN_HT20] = "ht20",
662 [NL80211_CHAN_HT40MINUS] = "ht40-",
663 [NL80211_CHAN_HT40PLUS] = "ht40+",
664 };
665 static const char *smps_modes[IEEE80211_SMPS_NUM_MODES] = {
666 [IEEE80211_SMPS_AUTOMATIC] = "auto",
667 [IEEE80211_SMPS_OFF] = "off",
668 [IEEE80211_SMPS_STATIC] = "static",
669 [IEEE80211_SMPS_DYNAMIC] = "dynamic",
670 };
671
672 printk(KERN_DEBUG "%s:%s (freq=%d/%s idle=%d ps=%d smps=%s)\n",
569 wiphy_name(hw->wiphy), __func__, 673 wiphy_name(hw->wiphy), __func__,
570 conf->channel->center_freq, 674 conf->channel->center_freq,
675 chantypes[conf->channel_type],
571 !!(conf->flags & IEEE80211_CONF_IDLE), 676 !!(conf->flags & IEEE80211_CONF_IDLE),
572 !!(conf->flags & IEEE80211_CONF_PS)); 677 !!(conf->flags & IEEE80211_CONF_PS),
678 smps_modes[conf->smps_mode]);
679
680 data->idle = !!(conf->flags & IEEE80211_CONF_IDLE);
573 681
574 data->channel = conf->channel; 682 data->channel = conf->channel;
575 if (!data->started || !data->beacon_int) 683 if (!data->started || !data->beacon_int)
@@ -664,23 +772,41 @@ static void mac80211_hwsim_bss_info_changed(struct ieee80211_hw *hw,
664 } 772 }
665} 773}
666 774
775static int mac80211_hwsim_sta_add(struct ieee80211_hw *hw,
776 struct ieee80211_vif *vif,
777 struct ieee80211_sta *sta)
778{
779 hwsim_check_magic(vif);
780 hwsim_set_sta_magic(sta);
781
782 return 0;
783}
784
785static int mac80211_hwsim_sta_remove(struct ieee80211_hw *hw,
786 struct ieee80211_vif *vif,
787 struct ieee80211_sta *sta)
788{
789 hwsim_check_magic(vif);
790 hwsim_clear_sta_magic(sta);
791
792 return 0;
793}
794
667static void mac80211_hwsim_sta_notify(struct ieee80211_hw *hw, 795static void mac80211_hwsim_sta_notify(struct ieee80211_hw *hw,
668 struct ieee80211_vif *vif, 796 struct ieee80211_vif *vif,
669 enum sta_notify_cmd cmd, 797 enum sta_notify_cmd cmd,
670 struct ieee80211_sta *sta) 798 struct ieee80211_sta *sta)
671{ 799{
672 hwsim_check_magic(vif); 800 hwsim_check_magic(vif);
801
673 switch (cmd) { 802 switch (cmd) {
674 case STA_NOTIFY_ADD:
675 hwsim_set_sta_magic(sta);
676 break;
677 case STA_NOTIFY_REMOVE:
678 hwsim_clear_sta_magic(sta);
679 break;
680 case STA_NOTIFY_SLEEP: 803 case STA_NOTIFY_SLEEP:
681 case STA_NOTIFY_AWAKE: 804 case STA_NOTIFY_AWAKE:
682 /* TODO: make good use of these flags */ 805 /* TODO: make good use of these flags */
683 break; 806 break;
807 default:
808 WARN(1, "Invalid sta notify: %d\n", cmd);
809 break;
684 } 810 }
685} 811}
686 812
@@ -771,7 +897,77 @@ static int mac80211_hwsim_testmode_cmd(struct ieee80211_hw *hw,
771} 897}
772#endif 898#endif
773 899
774static const struct ieee80211_ops mac80211_hwsim_ops = 900static int mac80211_hwsim_ampdu_action(struct ieee80211_hw *hw,
901 struct ieee80211_vif *vif,
902 enum ieee80211_ampdu_mlme_action action,
903 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
904{
905 switch (action) {
906 case IEEE80211_AMPDU_TX_START:
907 ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
908 break;
909 case IEEE80211_AMPDU_TX_STOP:
910 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
911 break;
912 case IEEE80211_AMPDU_TX_OPERATIONAL:
913 break;
914 case IEEE80211_AMPDU_RX_START:
915 case IEEE80211_AMPDU_RX_STOP:
916 break;
917 default:
918 return -EOPNOTSUPP;
919 }
920
921 return 0;
922}
923
924static void mac80211_hwsim_flush(struct ieee80211_hw *hw, bool drop)
925{
926 /*
927 * In this special case, there's nothing we need to
928 * do because hwsim does transmission synchronously.
929 * In the future, when it does transmissions via
930 * userspace, we may need to do something.
931 */
932}
933
934struct hw_scan_done {
935 struct delayed_work w;
936 struct ieee80211_hw *hw;
937};
938
939static void hw_scan_done(struct work_struct *work)
940{
941 struct hw_scan_done *hsd =
942 container_of(work, struct hw_scan_done, w.work);
943
944 ieee80211_scan_completed(hsd->hw, false);
945 kfree(hsd);
946}
947
948static int mac80211_hwsim_hw_scan(struct ieee80211_hw *hw,
949 struct cfg80211_scan_request *req)
950{
951 struct hw_scan_done *hsd = kzalloc(sizeof(*hsd), GFP_KERNEL);
952 int i;
953
954 if (!hsd)
955 return -ENOMEM;
956
957 hsd->hw = hw;
958 INIT_DELAYED_WORK(&hsd->w, hw_scan_done);
959
960 printk(KERN_DEBUG "hwsim scan request\n");
961 for (i = 0; i < req->n_channels; i++)
962 printk(KERN_DEBUG "hwsim scan freq %d\n",
963 req->channels[i]->center_freq);
964
965 ieee80211_queue_delayed_work(hw, &hsd->w, 2 * HZ);
966
967 return 0;
968}
969
970static struct ieee80211_ops mac80211_hwsim_ops =
775{ 971{
776 .tx = mac80211_hwsim_tx, 972 .tx = mac80211_hwsim_tx,
777 .start = mac80211_hwsim_start, 973 .start = mac80211_hwsim_start,
@@ -781,10 +977,14 @@ static const struct ieee80211_ops mac80211_hwsim_ops =
781 .config = mac80211_hwsim_config, 977 .config = mac80211_hwsim_config,
782 .configure_filter = mac80211_hwsim_configure_filter, 978 .configure_filter = mac80211_hwsim_configure_filter,
783 .bss_info_changed = mac80211_hwsim_bss_info_changed, 979 .bss_info_changed = mac80211_hwsim_bss_info_changed,
980 .sta_add = mac80211_hwsim_sta_add,
981 .sta_remove = mac80211_hwsim_sta_remove,
784 .sta_notify = mac80211_hwsim_sta_notify, 982 .sta_notify = mac80211_hwsim_sta_notify,
785 .set_tim = mac80211_hwsim_set_tim, 983 .set_tim = mac80211_hwsim_set_tim,
786 .conf_tx = mac80211_hwsim_conf_tx, 984 .conf_tx = mac80211_hwsim_conf_tx,
787 CFG80211_TESTMODE_CMD(mac80211_hwsim_testmode_cmd) 985 CFG80211_TESTMODE_CMD(mac80211_hwsim_testmode_cmd)
986 .ampdu_action = mac80211_hwsim_ampdu_action,
987 .flush = mac80211_hwsim_flush,
788}; 988};
789 989
790 990
@@ -979,6 +1179,9 @@ static int __init init_mac80211_hwsim(void)
979 if (radios < 1 || radios > 100) 1179 if (radios < 1 || radios > 100)
980 return -EINVAL; 1180 return -EINVAL;
981 1181
1182 if (fake_hw_scan)
1183 mac80211_hwsim_ops.hw_scan = mac80211_hwsim_hw_scan;
1184
982 spin_lock_init(&hwsim_radio_lock); 1185 spin_lock_init(&hwsim_radio_lock);
983 INIT_LIST_HEAD(&hwsim_radios); 1186 INIT_LIST_HEAD(&hwsim_radios);
984 1187
@@ -1016,7 +1219,11 @@ static int __init init_mac80211_hwsim(void)
1016 SET_IEEE80211_DEV(hw, data->dev); 1219 SET_IEEE80211_DEV(hw, data->dev);
1017 addr[3] = i >> 8; 1220 addr[3] = i >> 8;
1018 addr[4] = i; 1221 addr[4] = i;
1019 SET_IEEE80211_PERM_ADDR(hw, addr); 1222 memcpy(data->addresses[0].addr, addr, ETH_ALEN);
1223 memcpy(data->addresses[1].addr, addr, ETH_ALEN);
1224 data->addresses[1].addr[0] |= 0x40;
1225 hw->wiphy->n_addresses = 2;
1226 hw->wiphy->addresses = data->addresses;
1020 1227
1021 hw->channel_change_time = 1; 1228 hw->channel_change_time = 1;
1022 hw->queues = 4; 1229 hw->queues = 4;
@@ -1026,7 +1233,9 @@ static int __init init_mac80211_hwsim(void)
1026 BIT(NL80211_IFTYPE_MESH_POINT); 1233 BIT(NL80211_IFTYPE_MESH_POINT);
1027 1234
1028 hw->flags = IEEE80211_HW_MFP_CAPABLE | 1235 hw->flags = IEEE80211_HW_MFP_CAPABLE |
1029 IEEE80211_HW_SIGNAL_DBM; 1236 IEEE80211_HW_SIGNAL_DBM |
1237 IEEE80211_HW_SUPPORTS_STATIC_SMPS |
1238 IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS;
1030 1239
1031 /* ask mac80211 to reserve space for magic */ 1240 /* ask mac80211 to reserve space for magic */
1032 hw->vif_data_size = sizeof(struct hwsim_vif_priv); 1241 hw->vif_data_size = sizeof(struct hwsim_vif_priv);
@@ -1045,19 +1254,20 @@ static int __init init_mac80211_hwsim(void)
1045 sband->channels = data->channels_2ghz; 1254 sband->channels = data->channels_2ghz;
1046 sband->n_channels = 1255 sband->n_channels =
1047 ARRAY_SIZE(hwsim_channels_2ghz); 1256 ARRAY_SIZE(hwsim_channels_2ghz);
1257 sband->bitrates = data->rates;
1258 sband->n_bitrates = ARRAY_SIZE(hwsim_rates);
1048 break; 1259 break;
1049 case IEEE80211_BAND_5GHZ: 1260 case IEEE80211_BAND_5GHZ:
1050 sband->channels = data->channels_5ghz; 1261 sband->channels = data->channels_5ghz;
1051 sband->n_channels = 1262 sband->n_channels =
1052 ARRAY_SIZE(hwsim_channels_5ghz); 1263 ARRAY_SIZE(hwsim_channels_5ghz);
1264 sband->bitrates = data->rates + 4;
1265 sband->n_bitrates = ARRAY_SIZE(hwsim_rates) - 4;
1053 break; 1266 break;
1054 default: 1267 default:
1055 break; 1268 break;
1056 } 1269 }
1057 1270
1058 sband->bitrates = data->rates;
1059 sband->n_bitrates = ARRAY_SIZE(hwsim_rates);
1060
1061 sband->ht_cap.ht_supported = true; 1271 sband->ht_cap.ht_supported = true;
1062 sband->ht_cap.cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 | 1272 sband->ht_cap.cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
1063 IEEE80211_HT_CAP_GRN_FLD | 1273 IEEE80211_HT_CAP_GRN_FLD |
@@ -1089,46 +1299,46 @@ static int __init init_mac80211_hwsim(void)
1089 break; 1299 break;
1090 case HWSIM_REGTEST_WORLD_ROAM: 1300 case HWSIM_REGTEST_WORLD_ROAM:
1091 if (i == 0) { 1301 if (i == 0) {
1092 hw->wiphy->custom_regulatory = true; 1302 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
1093 wiphy_apply_custom_regulatory(hw->wiphy, 1303 wiphy_apply_custom_regulatory(hw->wiphy,
1094 &hwsim_world_regdom_custom_01); 1304 &hwsim_world_regdom_custom_01);
1095 } 1305 }
1096 break; 1306 break;
1097 case HWSIM_REGTEST_CUSTOM_WORLD: 1307 case HWSIM_REGTEST_CUSTOM_WORLD:
1098 hw->wiphy->custom_regulatory = true; 1308 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
1099 wiphy_apply_custom_regulatory(hw->wiphy, 1309 wiphy_apply_custom_regulatory(hw->wiphy,
1100 &hwsim_world_regdom_custom_01); 1310 &hwsim_world_regdom_custom_01);
1101 break; 1311 break;
1102 case HWSIM_REGTEST_CUSTOM_WORLD_2: 1312 case HWSIM_REGTEST_CUSTOM_WORLD_2:
1103 if (i == 0) { 1313 if (i == 0) {
1104 hw->wiphy->custom_regulatory = true; 1314 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
1105 wiphy_apply_custom_regulatory(hw->wiphy, 1315 wiphy_apply_custom_regulatory(hw->wiphy,
1106 &hwsim_world_regdom_custom_01); 1316 &hwsim_world_regdom_custom_01);
1107 } else if (i == 1) { 1317 } else if (i == 1) {
1108 hw->wiphy->custom_regulatory = true; 1318 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
1109 wiphy_apply_custom_regulatory(hw->wiphy, 1319 wiphy_apply_custom_regulatory(hw->wiphy,
1110 &hwsim_world_regdom_custom_02); 1320 &hwsim_world_regdom_custom_02);
1111 } 1321 }
1112 break; 1322 break;
1113 case HWSIM_REGTEST_STRICT_ALL: 1323 case HWSIM_REGTEST_STRICT_ALL:
1114 hw->wiphy->strict_regulatory = true; 1324 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY;
1115 break; 1325 break;
1116 case HWSIM_REGTEST_STRICT_FOLLOW: 1326 case HWSIM_REGTEST_STRICT_FOLLOW:
1117 case HWSIM_REGTEST_STRICT_AND_DRIVER_REG: 1327 case HWSIM_REGTEST_STRICT_AND_DRIVER_REG:
1118 if (i == 0) 1328 if (i == 0)
1119 hw->wiphy->strict_regulatory = true; 1329 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY;
1120 break; 1330 break;
1121 case HWSIM_REGTEST_ALL: 1331 case HWSIM_REGTEST_ALL:
1122 if (i == 0) { 1332 if (i == 0) {
1123 hw->wiphy->custom_regulatory = true; 1333 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
1124 wiphy_apply_custom_regulatory(hw->wiphy, 1334 wiphy_apply_custom_regulatory(hw->wiphy,
1125 &hwsim_world_regdom_custom_01); 1335 &hwsim_world_regdom_custom_01);
1126 } else if (i == 1) { 1336 } else if (i == 1) {
1127 hw->wiphy->custom_regulatory = true; 1337 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY;
1128 wiphy_apply_custom_regulatory(hw->wiphy, 1338 wiphy_apply_custom_regulatory(hw->wiphy,
1129 &hwsim_world_regdom_custom_02); 1339 &hwsim_world_regdom_custom_02);
1130 } else if (i == 4) 1340 } else if (i == 4)
1131 hw->wiphy->strict_regulatory = true; 1341 hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY;
1132 break; 1342 break;
1133 default: 1343 default:
1134 break; 1344 break;
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c
index 746532ebe5a8..12fdcb25fd38 100644
--- a/drivers/net/wireless/mwl8k.c
+++ b/drivers/net/wireless/mwl8k.c
@@ -2,7 +2,7 @@
2 * drivers/net/wireless/mwl8k.c 2 * drivers/net/wireless/mwl8k.c
3 * Driver for Marvell TOPDOG 802.11 Wireless cards 3 * Driver for Marvell TOPDOG 802.11 Wireless cards
4 * 4 *
5 * Copyright (C) 2008-2009 Marvell Semiconductor Inc. 5 * Copyright (C) 2008, 2009, 2010 Marvell Semiconductor Inc.
6 * 6 *
7 * This file is licensed under the terms of the GNU General Public 7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any 8 * License version 2. This program is licensed "as is" without any
@@ -12,12 +12,14 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/module.h> 13#include <linux/module.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/sched.h>
15#include <linux/spinlock.h> 16#include <linux/spinlock.h>
16#include <linux/list.h> 17#include <linux/list.h>
17#include <linux/pci.h> 18#include <linux/pci.h>
18#include <linux/delay.h> 19#include <linux/delay.h>
19#include <linux/completion.h> 20#include <linux/completion.h>
20#include <linux/etherdevice.h> 21#include <linux/etherdevice.h>
22#include <linux/slab.h>
21#include <net/mac80211.h> 23#include <net/mac80211.h>
22#include <linux/moduleparam.h> 24#include <linux/moduleparam.h>
23#include <linux/firmware.h> 25#include <linux/firmware.h>
@@ -25,19 +27,7 @@
25 27
26#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver" 28#define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
27#define MWL8K_NAME KBUILD_MODNAME 29#define MWL8K_NAME KBUILD_MODNAME
28#define MWL8K_VERSION "0.10" 30#define MWL8K_VERSION "0.12"
29
30MODULE_DESCRIPTION(MWL8K_DESC);
31MODULE_VERSION(MWL8K_VERSION);
32MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
33MODULE_LICENSE("GPL");
34
35static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
36 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
37 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
38 { }
39};
40MODULE_DEVICE_TABLE(pci, mwl8k_table);
41 31
42/* Register definitions */ 32/* Register definitions */
43#define MWL8K_HIU_GEN_PTR 0x00000c10 33#define MWL8K_HIU_GEN_PTR 0x00000c10
@@ -88,75 +78,94 @@ MODULE_DEVICE_TABLE(pci, mwl8k_table);
88 MWL8K_A2H_INT_RX_READY | \ 78 MWL8K_A2H_INT_RX_READY | \
89 MWL8K_A2H_INT_TX_DONE) 79 MWL8K_A2H_INT_TX_DONE)
90 80
91/* WME stream classes */
92#define WME_AC_BE 0 /* best effort */
93#define WME_AC_BK 1 /* background */
94#define WME_AC_VI 2 /* video */
95#define WME_AC_VO 3 /* voice */
96
97#define MWL8K_RX_QUEUES 1 81#define MWL8K_RX_QUEUES 1
98#define MWL8K_TX_QUEUES 4 82#define MWL8K_TX_QUEUES 4
99 83
84struct rxd_ops {
85 int rxd_size;
86 void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
87 void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
88 int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
89 __le16 *qos);
90};
91
92struct mwl8k_device_info {
93 char *part_name;
94 char *helper_image;
95 char *fw_image;
96 struct rxd_ops *ap_rxd_ops;
97};
98
100struct mwl8k_rx_queue { 99struct mwl8k_rx_queue {
101 int rx_desc_count; 100 int rxd_count;
102 101
103 /* hw receives here */ 102 /* hw receives here */
104 int rx_head; 103 int head;
105 104
106 /* refill descs here */ 105 /* refill descs here */
107 int rx_tail; 106 int tail;
108 107
109 struct mwl8k_rx_desc *rx_desc_area; 108 void *rxd;
110 dma_addr_t rx_desc_dma; 109 dma_addr_t rxd_dma;
111 struct sk_buff **rx_skb; 110 struct {
111 struct sk_buff *skb;
112 DECLARE_PCI_UNMAP_ADDR(dma)
113 } *buf;
112}; 114};
113 115
114struct mwl8k_tx_queue { 116struct mwl8k_tx_queue {
115 /* hw transmits here */ 117 /* hw transmits here */
116 int tx_head; 118 int head;
117 119
118 /* sw appends here */ 120 /* sw appends here */
119 int tx_tail; 121 int tail;
120 122
121 struct ieee80211_tx_queue_stats tx_stats; 123 unsigned int len;
122 struct mwl8k_tx_desc *tx_desc_area; 124 struct mwl8k_tx_desc *txd;
123 dma_addr_t tx_desc_dma; 125 dma_addr_t txd_dma;
124 struct sk_buff **tx_skb; 126 struct sk_buff **skb;
125};
126
127/* Pointers to the firmware data and meta information about it. */
128struct mwl8k_firmware {
129 /* Microcode */
130 struct firmware *ucode;
131
132 /* Boot helper code */
133 struct firmware *helper;
134}; 127};
135 128
136struct mwl8k_priv { 129struct mwl8k_priv {
137 void __iomem *regs;
138 struct ieee80211_hw *hw; 130 struct ieee80211_hw *hw;
139
140 struct pci_dev *pdev; 131 struct pci_dev *pdev;
141 u8 name[16];
142 132
143 /* firmware files and meta data */ 133 struct mwl8k_device_info *device_info;
144 struct mwl8k_firmware fw; 134
145 u32 part_num; 135 void __iomem *sram;
136 void __iomem *regs;
137
138 /* firmware */
139 struct firmware *fw_helper;
140 struct firmware *fw_ucode;
141
142 /* hardware/firmware parameters */
143 bool ap_fw;
144 struct rxd_ops *rxd_ops;
145 struct ieee80211_supported_band band_24;
146 struct ieee80211_channel channels_24[14];
147 struct ieee80211_rate rates_24[14];
148 struct ieee80211_supported_band band_50;
149 struct ieee80211_channel channels_50[4];
150 struct ieee80211_rate rates_50[9];
151 u32 ap_macids_supported;
152 u32 sta_macids_supported;
146 153
147 /* firmware access */ 154 /* firmware access */
148 struct mutex fw_mutex; 155 struct mutex fw_mutex;
149 struct task_struct *fw_mutex_owner; 156 struct task_struct *fw_mutex_owner;
150 int fw_mutex_depth; 157 int fw_mutex_depth;
151 struct completion *tx_wait;
152 struct completion *hostcmd_wait; 158 struct completion *hostcmd_wait;
153 159
154 /* lock held over TX and TX reap */ 160 /* lock held over TX and TX reap */
155 spinlock_t tx_lock; 161 spinlock_t tx_lock;
156 162
157 struct ieee80211_vif *vif; 163 /* TX quiesce completion, protected by fw_mutex and tx_lock */
164 struct completion *tx_wait;
158 165
159 struct ieee80211_channel *current_channel; 166 /* List of interfaces. */
167 u32 macids_used;
168 struct list_head vif_list;
160 169
161 /* power management status cookie from firmware */ 170 /* power management status cookie from firmware */
162 u32 *cookie; 171 u32 *cookie;
@@ -175,13 +184,9 @@ struct mwl8k_priv {
175 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES]; 184 struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
176 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES]; 185 struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
177 186
178 /* PHY parameters */
179 struct ieee80211_supported_band band;
180 struct ieee80211_channel channels[14];
181 struct ieee80211_rate rates[12];
182
183 bool radio_on; 187 bool radio_on;
184 bool radio_short_preamble; 188 bool radio_short_preamble;
189 bool sniffer_enabled;
185 bool wmm_enabled; 190 bool wmm_enabled;
186 191
187 /* XXX need to convert this to handle multiple interfaces */ 192 /* XXX need to convert this to handle multiple interfaces */
@@ -197,44 +202,33 @@ struct mwl8k_priv {
197 */ 202 */
198 struct work_struct finalize_join_worker; 203 struct work_struct finalize_join_worker;
199 204
200 /* Tasklet to reclaim TX descriptors and buffers after tx */ 205 /* Tasklet to perform TX reclaim. */
201 struct tasklet_struct tx_reclaim_task; 206 struct tasklet_struct poll_tx_task;
202 207
203 /* Work thread to serialize configuration requests */ 208 /* Tasklet to perform RX. */
204 struct workqueue_struct *config_wq; 209 struct tasklet_struct poll_rx_task;
205}; 210};
206 211
207/* Per interface specific private data */ 212/* Per interface specific private data */
208struct mwl8k_vif { 213struct mwl8k_vif {
209 /* backpointer to parent config block */ 214 struct list_head list;
210 struct mwl8k_priv *priv; 215 struct ieee80211_vif *vif;
211
212 /* BSS config of AP or IBSS from mac80211*/
213 struct ieee80211_bss_conf bss_info;
214
215 /* BSSID of AP or IBSS */
216 u8 bssid[ETH_ALEN];
217 u8 mac_addr[ETH_ALEN];
218
219 /*
220 * Subset of supported legacy rates.
221 * Intersection of AP and STA supported rates.
222 */
223 struct ieee80211_rate legacy_rates[12];
224
225 /* number of supported legacy rates */
226 u8 legacy_nrates;
227 216
228 /* Index into station database.Returned by update_sta_db call */ 217 /* Firmware macid for this vif. */
229 u8 peer_id; 218 int macid;
230 219
231 /* Non AMPDU sequence number assigned by driver */ 220 /* Non AMPDU sequence number assigned by driver. */
232 u16 seqno; 221 u16 seqno;
233}; 222};
234
235#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv)) 223#define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
236 224
237static const struct ieee80211_channel mwl8k_channels[] = { 225struct mwl8k_sta {
226 /* Index into station database. Returned by UPDATE_STADB. */
227 u8 peer_id;
228};
229#define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
230
231static const struct ieee80211_channel mwl8k_channels_24[] = {
238 { .center_freq = 2412, .hw_value = 1, }, 232 { .center_freq = 2412, .hw_value = 1, },
239 { .center_freq = 2417, .hw_value = 2, }, 233 { .center_freq = 2417, .hw_value = 2, },
240 { .center_freq = 2422, .hw_value = 3, }, 234 { .center_freq = 2422, .hw_value = 3, },
@@ -246,21 +240,45 @@ static const struct ieee80211_channel mwl8k_channels[] = {
246 { .center_freq = 2452, .hw_value = 9, }, 240 { .center_freq = 2452, .hw_value = 9, },
247 { .center_freq = 2457, .hw_value = 10, }, 241 { .center_freq = 2457, .hw_value = 10, },
248 { .center_freq = 2462, .hw_value = 11, }, 242 { .center_freq = 2462, .hw_value = 11, },
243 { .center_freq = 2467, .hw_value = 12, },
244 { .center_freq = 2472, .hw_value = 13, },
245 { .center_freq = 2484, .hw_value = 14, },
249}; 246};
250 247
251static const struct ieee80211_rate mwl8k_rates[] = { 248static const struct ieee80211_rate mwl8k_rates_24[] = {
252 { .bitrate = 10, .hw_value = 2, }, 249 { .bitrate = 10, .hw_value = 2, },
253 { .bitrate = 20, .hw_value = 4, }, 250 { .bitrate = 20, .hw_value = 4, },
254 { .bitrate = 55, .hw_value = 11, }, 251 { .bitrate = 55, .hw_value = 11, },
252 { .bitrate = 110, .hw_value = 22, },
253 { .bitrate = 220, .hw_value = 44, },
255 { .bitrate = 60, .hw_value = 12, }, 254 { .bitrate = 60, .hw_value = 12, },
256 { .bitrate = 90, .hw_value = 18, }, 255 { .bitrate = 90, .hw_value = 18, },
257 { .bitrate = 110, .hw_value = 22, },
258 { .bitrate = 120, .hw_value = 24, }, 256 { .bitrate = 120, .hw_value = 24, },
259 { .bitrate = 180, .hw_value = 36, }, 257 { .bitrate = 180, .hw_value = 36, },
260 { .bitrate = 240, .hw_value = 48, }, 258 { .bitrate = 240, .hw_value = 48, },
261 { .bitrate = 360, .hw_value = 72, }, 259 { .bitrate = 360, .hw_value = 72, },
262 { .bitrate = 480, .hw_value = 96, }, 260 { .bitrate = 480, .hw_value = 96, },
263 { .bitrate = 540, .hw_value = 108, }, 261 { .bitrate = 540, .hw_value = 108, },
262 { .bitrate = 720, .hw_value = 144, },
263};
264
265static const struct ieee80211_channel mwl8k_channels_50[] = {
266 { .center_freq = 5180, .hw_value = 36, },
267 { .center_freq = 5200, .hw_value = 40, },
268 { .center_freq = 5220, .hw_value = 44, },
269 { .center_freq = 5240, .hw_value = 48, },
270};
271
272static const struct ieee80211_rate mwl8k_rates_50[] = {
273 { .bitrate = 60, .hw_value = 12, },
274 { .bitrate = 90, .hw_value = 18, },
275 { .bitrate = 120, .hw_value = 24, },
276 { .bitrate = 180, .hw_value = 36, },
277 { .bitrate = 240, .hw_value = 48, },
278 { .bitrate = 360, .hw_value = 72, },
279 { .bitrate = 480, .hw_value = 96, },
280 { .bitrate = 540, .hw_value = 108, },
281 { .bitrate = 720, .hw_value = 144, },
264}; 282};
265 283
266/* Set or get info from Firmware */ 284/* Set or get info from Firmware */
@@ -270,10 +288,13 @@ static const struct ieee80211_rate mwl8k_rates[] = {
270/* Firmware command codes */ 288/* Firmware command codes */
271#define MWL8K_CMD_CODE_DNLD 0x0001 289#define MWL8K_CMD_CODE_DNLD 0x0001
272#define MWL8K_CMD_GET_HW_SPEC 0x0003 290#define MWL8K_CMD_GET_HW_SPEC 0x0003
291#define MWL8K_CMD_SET_HW_SPEC 0x0004
273#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010 292#define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
274#define MWL8K_CMD_GET_STAT 0x0014 293#define MWL8K_CMD_GET_STAT 0x0014
275#define MWL8K_CMD_RADIO_CONTROL 0x001c 294#define MWL8K_CMD_RADIO_CONTROL 0x001c
276#define MWL8K_CMD_RF_TX_POWER 0x001e 295#define MWL8K_CMD_RF_TX_POWER 0x001e
296#define MWL8K_CMD_RF_ANTENNA 0x0020
297#define MWL8K_CMD_SET_BEACON 0x0100 /* per-vif */
277#define MWL8K_CMD_SET_PRE_SCAN 0x0107 298#define MWL8K_CMD_SET_PRE_SCAN 0x0107
278#define MWL8K_CMD_SET_POST_SCAN 0x0108 299#define MWL8K_CMD_SET_POST_SCAN 0x0108
279#define MWL8K_CMD_SET_RF_CHANNEL 0x010a 300#define MWL8K_CMD_SET_RF_CHANNEL 0x010a
@@ -287,7 +308,10 @@ static const struct ieee80211_rate mwl8k_rates[] = {
287#define MWL8K_CMD_MIMO_CONFIG 0x0125 308#define MWL8K_CMD_MIMO_CONFIG 0x0125
288#define MWL8K_CMD_USE_FIXED_RATE 0x0126 309#define MWL8K_CMD_USE_FIXED_RATE 0x0126
289#define MWL8K_CMD_ENABLE_SNIFFER 0x0150 310#define MWL8K_CMD_ENABLE_SNIFFER 0x0150
311#define MWL8K_CMD_SET_MAC_ADDR 0x0202 /* per-vif */
290#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203 312#define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
313#define MWL8K_CMD_BSS_START 0x1100 /* per-vif */
314#define MWL8K_CMD_SET_NEW_STN 0x1111 /* per-vif */
291#define MWL8K_CMD_UPDATE_STADB 0x1123 315#define MWL8K_CMD_UPDATE_STADB 0x1123
292 316
293static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize) 317static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
@@ -299,10 +323,13 @@ static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
299 switch (cmd & ~0x8000) { 323 switch (cmd & ~0x8000) {
300 MWL8K_CMDNAME(CODE_DNLD); 324 MWL8K_CMDNAME(CODE_DNLD);
301 MWL8K_CMDNAME(GET_HW_SPEC); 325 MWL8K_CMDNAME(GET_HW_SPEC);
326 MWL8K_CMDNAME(SET_HW_SPEC);
302 MWL8K_CMDNAME(MAC_MULTICAST_ADR); 327 MWL8K_CMDNAME(MAC_MULTICAST_ADR);
303 MWL8K_CMDNAME(GET_STAT); 328 MWL8K_CMDNAME(GET_STAT);
304 MWL8K_CMDNAME(RADIO_CONTROL); 329 MWL8K_CMDNAME(RADIO_CONTROL);
305 MWL8K_CMDNAME(RF_TX_POWER); 330 MWL8K_CMDNAME(RF_TX_POWER);
331 MWL8K_CMDNAME(RF_ANTENNA);
332 MWL8K_CMDNAME(SET_BEACON);
306 MWL8K_CMDNAME(SET_PRE_SCAN); 333 MWL8K_CMDNAME(SET_PRE_SCAN);
307 MWL8K_CMDNAME(SET_POST_SCAN); 334 MWL8K_CMDNAME(SET_POST_SCAN);
308 MWL8K_CMDNAME(SET_RF_CHANNEL); 335 MWL8K_CMDNAME(SET_RF_CHANNEL);
@@ -316,7 +343,10 @@ static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
316 MWL8K_CMDNAME(MIMO_CONFIG); 343 MWL8K_CMDNAME(MIMO_CONFIG);
317 MWL8K_CMDNAME(USE_FIXED_RATE); 344 MWL8K_CMDNAME(USE_FIXED_RATE);
318 MWL8K_CMDNAME(ENABLE_SNIFFER); 345 MWL8K_CMDNAME(ENABLE_SNIFFER);
346 MWL8K_CMDNAME(SET_MAC_ADDR);
319 MWL8K_CMDNAME(SET_RATEADAPT_MODE); 347 MWL8K_CMDNAME(SET_RATEADAPT_MODE);
348 MWL8K_CMDNAME(BSS_START);
349 MWL8K_CMDNAME(SET_NEW_STN);
320 MWL8K_CMDNAME(UPDATE_STADB); 350 MWL8K_CMDNAME(UPDATE_STADB);
321 default: 351 default:
322 snprintf(buf, bufsize, "0x%x", cmd); 352 snprintf(buf, bufsize, "0x%x", cmd);
@@ -347,48 +377,42 @@ static void mwl8k_release_fw(struct firmware **fw)
347 377
348static void mwl8k_release_firmware(struct mwl8k_priv *priv) 378static void mwl8k_release_firmware(struct mwl8k_priv *priv)
349{ 379{
350 mwl8k_release_fw(&priv->fw.ucode); 380 mwl8k_release_fw(&priv->fw_ucode);
351 mwl8k_release_fw(&priv->fw.helper); 381 mwl8k_release_fw(&priv->fw_helper);
352} 382}
353 383
354/* Request fw image */ 384/* Request fw image */
355static int mwl8k_request_fw(struct mwl8k_priv *priv, 385static int mwl8k_request_fw(struct mwl8k_priv *priv,
356 const char *fname, struct firmware **fw) 386 const char *fname, struct firmware **fw)
357{ 387{
358 /* release current image */ 388 /* release current image */
359 if (*fw != NULL) 389 if (*fw != NULL)
360 mwl8k_release_fw(fw); 390 mwl8k_release_fw(fw);
361 391
362 return request_firmware((const struct firmware **)fw, 392 return request_firmware((const struct firmware **)fw,
363 fname, &priv->pdev->dev); 393 fname, &priv->pdev->dev);
364} 394}
365 395
366static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num) 396static int mwl8k_request_firmware(struct mwl8k_priv *priv)
367{ 397{
368 u8 filename[64]; 398 struct mwl8k_device_info *di = priv->device_info;
369 int rc; 399 int rc;
370 400
371 priv->part_num = part_num; 401 if (di->helper_image != NULL) {
372 402 rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
373 snprintf(filename, sizeof(filename), 403 if (rc) {
374 "mwl8k/helper_%u.fw", priv->part_num); 404 printk(KERN_ERR "%s: Error requesting helper "
375 405 "firmware file %s\n", pci_name(priv->pdev),
376 rc = mwl8k_request_fw(priv, filename, &priv->fw.helper); 406 di->helper_image);
377 if (rc) { 407 return rc;
378 printk(KERN_ERR 408 }
379 "%s Error requesting helper firmware file %s\n",
380 pci_name(priv->pdev), filename);
381 return rc;
382 } 409 }
383 410
384 snprintf(filename, sizeof(filename), 411 rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
385 "mwl8k/fmimage_%u.fw", priv->part_num);
386
387 rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
388 if (rc) { 412 if (rc) {
389 printk(KERN_ERR "%s Error requesting firmware file %s\n", 413 printk(KERN_ERR "%s: Error requesting firmware file %s\n",
390 pci_name(priv->pdev), filename); 414 pci_name(priv->pdev), di->fw_image);
391 mwl8k_release_fw(&priv->fw.helper); 415 mwl8k_release_fw(&priv->fw_helper);
392 return rc; 416 return rc;
393 } 417 }
394 418
@@ -398,7 +422,8 @@ static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
398struct mwl8k_cmd_pkt { 422struct mwl8k_cmd_pkt {
399 __le16 code; 423 __le16 code;
400 __le16 length; 424 __le16 length;
401 __le16 seq_num; 425 __u8 seq_num;
426 __u8 macid;
402 __le16 result; 427 __le16 result;
403 char payload[0]; 428 char payload[0];
404} __attribute__((packed)); 429} __attribute__((packed));
@@ -434,6 +459,7 @@ mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
434 break; 459 break;
435 } 460 }
436 461
462 cond_resched();
437 udelay(1); 463 udelay(1);
438 } while (--loops); 464 } while (--loops);
439 465
@@ -455,6 +481,7 @@ static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
455 481
456 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD); 482 cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
457 cmd->seq_num = 0; 483 cmd->seq_num = 0;
484 cmd->macid = 0;
458 cmd->result = 0; 485 cmd->result = 0;
459 486
460 done = 0; 487 done = 0;
@@ -542,43 +569,57 @@ static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
542 return rc; 569 return rc;
543} 570}
544 571
545static int mwl8k_load_firmware(struct mwl8k_priv *priv) 572static int mwl8k_load_firmware(struct ieee80211_hw *hw)
546{ 573{
547 int loops, rc; 574 struct mwl8k_priv *priv = hw->priv;
575 struct firmware *fw = priv->fw_ucode;
576 int rc;
577 int loops;
548 578
549 const u8 *ucode = priv->fw.ucode->data; 579 if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
550 size_t ucode_len = priv->fw.ucode->size; 580 struct firmware *helper = priv->fw_helper;
551 const u8 *helper = priv->fw.helper->data;
552 size_t helper_len = priv->fw.helper->size;
553 581
554 if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) { 582 if (helper == NULL) {
555 rc = mwl8k_load_fw_image(priv, helper, helper_len); 583 printk(KERN_ERR "%s: helper image needed but none "
584 "given\n", pci_name(priv->pdev));
585 return -EINVAL;
586 }
587
588 rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
556 if (rc) { 589 if (rc) {
557 printk(KERN_ERR "%s: unable to load firmware " 590 printk(KERN_ERR "%s: unable to load firmware "
558 "helper image\n", pci_name(priv->pdev)); 591 "helper image\n", pci_name(priv->pdev));
559 return rc; 592 return rc;
560 } 593 }
561 msleep(1); 594 msleep(5);
562 595
563 rc = mwl8k_feed_fw_image(priv, ucode, ucode_len); 596 rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
564 } else { 597 } else {
565 rc = mwl8k_load_fw_image(priv, ucode, ucode_len); 598 rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
566 } 599 }
567 600
568 if (rc) { 601 if (rc) {
569 printk(KERN_ERR "%s: unable to load firmware data\n", 602 printk(KERN_ERR "%s: unable to load firmware image\n",
570 pci_name(priv->pdev)); 603 pci_name(priv->pdev));
571 return rc; 604 return rc;
572 } 605 }
573 606
574 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR); 607 iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
575 msleep(1);
576 608
577 loops = 200000; 609 loops = 500000;
578 do { 610 do {
579 if (ioread32(priv->regs + MWL8K_HIU_INT_CODE) 611 u32 ready_code;
580 == MWL8K_FWSTA_READY) 612
613 ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
614 if (ready_code == MWL8K_FWAP_READY) {
615 priv->ap_fw = 1;
581 break; 616 break;
617 } else if (ready_code == MWL8K_FWSTA_READY) {
618 priv->ap_fw = 0;
619 break;
620 }
621
622 cond_resched();
582 udelay(1); 623 udelay(1);
583 } while (--loops); 624 } while (--loops);
584 625
@@ -586,161 +627,177 @@ static int mwl8k_load_firmware(struct mwl8k_priv *priv)
586} 627}
587 628
588 629
589/* 630/* DMA header used by firmware and hardware. */
590 * Defines shared between transmission and reception. 631struct mwl8k_dma_data {
591 */ 632 __le16 fwlen;
592/* HT control fields for firmware */ 633 struct ieee80211_hdr wh;
593struct ewc_ht_info { 634 char data[0];
594 __le16 control1;
595 __le16 control2;
596 __le16 control3;
597} __attribute__((packed)); 635} __attribute__((packed));
598 636
599/* Firmware Station database operations */ 637/* Routines to add/remove DMA header from skb. */
600#define MWL8K_STA_DB_ADD_ENTRY 0 638static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
601#define MWL8K_STA_DB_MODIFY_ENTRY 1 639{
602#define MWL8K_STA_DB_DEL_ENTRY 2 640 struct mwl8k_dma_data *tr;
603#define MWL8K_STA_DB_FLUSH 3 641 int hdrlen;
604 642
605/* Peer Entry flags - used to define the type of the peer node */ 643 tr = (struct mwl8k_dma_data *)skb->data;
606#define MWL8K_PEER_TYPE_ACCESSPOINT 2 644 hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
607 645
608#define MWL8K_IEEE_LEGACY_DATA_RATES 12 646 if (hdrlen != sizeof(tr->wh)) {
609#define MWL8K_MCS_BITMAP_SIZE 16 647 if (ieee80211_is_data_qos(tr->wh.frame_control)) {
648 memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
649 *((__le16 *)(tr->data - 2)) = qos;
650 } else {
651 memmove(tr->data - hdrlen, &tr->wh, hdrlen);
652 }
653 }
610 654
611struct peer_capability_info { 655 if (hdrlen != sizeof(*tr))
612 /* Peer type - AP vs. STA. */ 656 skb_pull(skb, sizeof(*tr) - hdrlen);
613 __u8 peer_type; 657}
614 658
615 /* Basic 802.11 capabilities from assoc resp. */ 659static inline void mwl8k_add_dma_header(struct sk_buff *skb)
616 __le16 basic_caps; 660{
661 struct ieee80211_hdr *wh;
662 int hdrlen;
663 struct mwl8k_dma_data *tr;
617 664
618 /* Set if peer supports 802.11n high throughput (HT). */ 665 /*
619 __u8 ht_support; 666 * Add a firmware DMA header; the firmware requires that we
667 * present a 2-byte payload length followed by a 4-address
668 * header (without QoS field), followed (optionally) by any
669 * WEP/ExtIV header (but only filled in for CCMP).
670 */
671 wh = (struct ieee80211_hdr *)skb->data;
620 672
621 /* Valid if HT is supported. */ 673 hdrlen = ieee80211_hdrlen(wh->frame_control);
622 __le16 ht_caps; 674 if (hdrlen != sizeof(*tr))
623 __u8 extended_ht_caps; 675 skb_push(skb, sizeof(*tr) - hdrlen);
624 struct ewc_ht_info ewc_info;
625 676
626 /* Legacy rate table. Intersection of our rates and peer rates. */ 677 if (ieee80211_is_data_qos(wh->frame_control))
627 __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES]; 678 hdrlen -= 2;
628 679
629 /* HT rate table. Intersection of our rates and peer rates. */ 680 tr = (struct mwl8k_dma_data *)skb->data;
630 __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE]; 681 if (wh != &tr->wh)
631 __u8 pad[16]; 682 memmove(&tr->wh, wh, hdrlen);
683 if (hdrlen != sizeof(tr->wh))
684 memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
632 685
633 /* If set, interoperability mode, no proprietary extensions. */ 686 /*
634 __u8 interop; 687 * Firmware length is the length of the fully formed "802.11
635 __u8 pad2; 688 * payload". That is, everything except for the 802.11 header.
636 __u8 station_id; 689 * This includes all crypto material including the MIC.
637 __le16 amsdu_enabled; 690 */
638} __attribute__((packed)); 691 tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
692}
639 693
640/* Inline functions to manipulate QoS field in data descriptor. */
641static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
642{
643 u16 val_mask = 1 << 4;
644 694
645 /* End of Service Period Bit 4 */ 695/*
646 return qos | val_mask; 696 * Packet reception for 88w8366 AP firmware.
647} 697 */
698struct mwl8k_rxd_8366_ap {
699 __le16 pkt_len;
700 __u8 sq2;
701 __u8 rate;
702 __le32 pkt_phys_addr;
703 __le32 next_rxd_phys_addr;
704 __le16 qos_control;
705 __le16 htsig2;
706 __le32 hw_rssi_info;
707 __le32 hw_noise_floor_info;
708 __u8 noise_floor;
709 __u8 pad0[3];
710 __u8 rssi;
711 __u8 rx_status;
712 __u8 channel;
713 __u8 rx_ctrl;
714} __attribute__((packed));
648 715
649static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy) 716#define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
650{ 717#define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
651 u16 val_mask = 0x3; 718#define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
652 u8 shift = 5;
653 u16 qos_mask = ~(val_mask << shift);
654 719
655 /* Ack Policy Bit 5-6 */ 720#define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
656 return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
657}
658 721
659static inline u16 mwl8k_qos_setbit_amsdu(u16 qos) 722static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
660{ 723{
661 u16 val_mask = 1 << 7; 724 struct mwl8k_rxd_8366_ap *rxd = _rxd;
662 725
663 /* AMSDU present Bit 7 */ 726 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
664 return qos | val_mask; 727 rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
665} 728}
666 729
667static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len) 730static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
668{ 731{
669 u16 val_mask = 0xff; 732 struct mwl8k_rxd_8366_ap *rxd = _rxd;
670 u8 shift = 8;
671 u16 qos_mask = ~(val_mask << shift);
672 733
673 /* Queue Length Bits 8-15 */ 734 rxd->pkt_len = cpu_to_le16(len);
674 return (qos & qos_mask) | ((len & val_mask) << shift); 735 rxd->pkt_phys_addr = cpu_to_le32(addr);
736 wmb();
737 rxd->rx_ctrl = 0;
675} 738}
676 739
677/* DMA header used by firmware and hardware. */ 740static int
678struct mwl8k_dma_data { 741mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
679 __le16 fwlen; 742 __le16 *qos)
680 struct ieee80211_hdr wh;
681} __attribute__((packed));
682
683/* Routines to add/remove DMA header from skb. */
684static inline void mwl8k_remove_dma_header(struct sk_buff *skb)
685{ 743{
686 struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)skb->data; 744 struct mwl8k_rxd_8366_ap *rxd = _rxd;
687 void *dst, *src = &tr->wh;
688 int hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
689 u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
690 745
691 dst = (void *)tr + space; 746 if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
692 if (dst != src) { 747 return -1;
693 memmove(dst, src, hdrlen); 748 rmb();
694 skb_pull(skb, space);
695 }
696}
697 749
698static inline void mwl8k_add_dma_header(struct sk_buff *skb) 750 memset(status, 0, sizeof(*status));
699{
700 struct ieee80211_hdr *wh;
701 u32 hdrlen, pktlen;
702 struct mwl8k_dma_data *tr;
703 751
704 wh = (struct ieee80211_hdr *)skb->data; 752 status->signal = -rxd->rssi;
705 hdrlen = ieee80211_hdrlen(wh->frame_control); 753 status->noise = -rxd->noise_floor;
706 pktlen = skb->len;
707 754
708 /* 755 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
709 * Copy up/down the 802.11 header; the firmware requires 756 status->flag |= RX_FLAG_HT;
710 * we present a 2-byte payload length followed by a 757 if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
711 * 4-address header (w/o QoS), followed (optionally) by 758 status->flag |= RX_FLAG_40MHZ;
712 * any WEP/ExtIV header (but only filled in for CCMP). 759 status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
713 */ 760 } else {
714 if (hdrlen != sizeof(struct mwl8k_dma_data)) 761 int i;
715 skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
716 762
717 tr = (struct mwl8k_dma_data *)skb->data; 763 for (i = 0; i < ARRAY_SIZE(mwl8k_rates_24); i++) {
718 if (wh != &tr->wh) 764 if (mwl8k_rates_24[i].hw_value == rxd->rate) {
719 memmove(&tr->wh, wh, hdrlen); 765 status->rate_idx = i;
766 break;
767 }
768 }
769 }
720 770
721 /* Clear addr4 */ 771 if (rxd->channel > 14) {
722 memset(tr->wh.addr4, 0, ETH_ALEN); 772 status->band = IEEE80211_BAND_5GHZ;
773 if (!(status->flag & RX_FLAG_HT))
774 status->rate_idx -= 5;
775 } else {
776 status->band = IEEE80211_BAND_2GHZ;
777 }
778 status->freq = ieee80211_channel_to_frequency(rxd->channel);
723 779
724 /* 780 *qos = rxd->qos_control;
725 * Firmware length is the length of the fully formed "802.11 781
726 * payload". That is, everything except for the 802.11 header. 782 return le16_to_cpu(rxd->pkt_len);
727 * This includes all crypto material including the MIC.
728 */
729 tr->fwlen = cpu_to_le16(pktlen - hdrlen);
730} 783}
731 784
785static struct rxd_ops rxd_8366_ap_ops = {
786 .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
787 .rxd_init = mwl8k_rxd_8366_ap_init,
788 .rxd_refill = mwl8k_rxd_8366_ap_refill,
789 .rxd_process = mwl8k_rxd_8366_ap_process,
790};
732 791
733/* 792/*
734 * Packet reception. 793 * Packet reception for STA firmware.
735 */ 794 */
736#define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02 795struct mwl8k_rxd_sta {
737
738struct mwl8k_rx_desc {
739 __le16 pkt_len; 796 __le16 pkt_len;
740 __u8 link_quality; 797 __u8 link_quality;
741 __u8 noise_level; 798 __u8 noise_level;
742 __le32 pkt_phys_addr; 799 __le32 pkt_phys_addr;
743 __le32 next_rx_desc_phys_addr; 800 __le32 next_rxd_phys_addr;
744 __le16 qos_control; 801 __le16 qos_control;
745 __le16 rate_info; 802 __le16 rate_info;
746 __le32 pad0[4]; 803 __le32 pad0[4];
@@ -752,6 +809,84 @@ struct mwl8k_rx_desc {
752 __u8 pad2[2]; 809 __u8 pad2[2];
753} __attribute__((packed)); 810} __attribute__((packed));
754 811
812#define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
813#define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
814#define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
815#define MWL8K_STA_RATE_INFO_40MHZ 0x0004
816#define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
817#define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
818
819#define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
820
821static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
822{
823 struct mwl8k_rxd_sta *rxd = _rxd;
824
825 rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
826 rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
827}
828
829static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
830{
831 struct mwl8k_rxd_sta *rxd = _rxd;
832
833 rxd->pkt_len = cpu_to_le16(len);
834 rxd->pkt_phys_addr = cpu_to_le32(addr);
835 wmb();
836 rxd->rx_ctrl = 0;
837}
838
839static int
840mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
841 __le16 *qos)
842{
843 struct mwl8k_rxd_sta *rxd = _rxd;
844 u16 rate_info;
845
846 if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
847 return -1;
848 rmb();
849
850 rate_info = le16_to_cpu(rxd->rate_info);
851
852 memset(status, 0, sizeof(*status));
853
854 status->signal = -rxd->rssi;
855 status->noise = -rxd->noise_level;
856 status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
857 status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
858
859 if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
860 status->flag |= RX_FLAG_SHORTPRE;
861 if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
862 status->flag |= RX_FLAG_40MHZ;
863 if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
864 status->flag |= RX_FLAG_SHORT_GI;
865 if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
866 status->flag |= RX_FLAG_HT;
867
868 if (rxd->channel > 14) {
869 status->band = IEEE80211_BAND_5GHZ;
870 if (!(status->flag & RX_FLAG_HT))
871 status->rate_idx -= 5;
872 } else {
873 status->band = IEEE80211_BAND_2GHZ;
874 }
875 status->freq = ieee80211_channel_to_frequency(rxd->channel);
876
877 *qos = rxd->qos_control;
878
879 return le16_to_cpu(rxd->pkt_len);
880}
881
882static struct rxd_ops rxd_sta_ops = {
883 .rxd_size = sizeof(struct mwl8k_rxd_sta),
884 .rxd_init = mwl8k_rxd_sta_init,
885 .rxd_refill = mwl8k_rxd_sta_refill,
886 .rxd_process = mwl8k_rxd_sta_process,
887};
888
889
755#define MWL8K_RX_DESCS 256 890#define MWL8K_RX_DESCS 256
756#define MWL8K_RX_MAXSZ 3800 891#define MWL8K_RX_MAXSZ 3800
757 892
@@ -762,43 +897,44 @@ static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
762 int size; 897 int size;
763 int i; 898 int i;
764 899
765 rxq->rx_desc_count = 0; 900 rxq->rxd_count = 0;
766 rxq->rx_head = 0; 901 rxq->head = 0;
767 rxq->rx_tail = 0; 902 rxq->tail = 0;
768 903
769 size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc); 904 size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
770 905
771 rxq->rx_desc_area = 906 rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
772 pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma); 907 if (rxq->rxd == NULL) {
773 if (rxq->rx_desc_area == NULL) {
774 printk(KERN_ERR "%s: failed to alloc RX descriptors\n", 908 printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
775 priv->name); 909 wiphy_name(hw->wiphy));
776 return -ENOMEM; 910 return -ENOMEM;
777 } 911 }
778 memset(rxq->rx_desc_area, 0, size); 912 memset(rxq->rxd, 0, size);
779 913
780 rxq->rx_skb = kmalloc(MWL8K_RX_DESCS * 914 rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
781 sizeof(*rxq->rx_skb), GFP_KERNEL); 915 if (rxq->buf == NULL) {
782 if (rxq->rx_skb == NULL) {
783 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n", 916 printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
784 priv->name); 917 wiphy_name(hw->wiphy));
785 pci_free_consistent(priv->pdev, size, 918 pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
786 rxq->rx_desc_area, rxq->rx_desc_dma);
787 return -ENOMEM; 919 return -ENOMEM;
788 } 920 }
789 memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb)); 921 memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
790 922
791 for (i = 0; i < MWL8K_RX_DESCS; i++) { 923 for (i = 0; i < MWL8K_RX_DESCS; i++) {
792 struct mwl8k_rx_desc *rx_desc; 924 int desc_size;
925 void *rxd;
793 int nexti; 926 int nexti;
927 dma_addr_t next_dma_addr;
794 928
795 rx_desc = rxq->rx_desc_area + i; 929 desc_size = priv->rxd_ops->rxd_size;
796 nexti = (i + 1) % MWL8K_RX_DESCS; 930 rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
797 931
798 rx_desc->next_rx_desc_phys_addr = 932 nexti = i + 1;
799 cpu_to_le32(rxq->rx_desc_dma 933 if (nexti == MWL8K_RX_DESCS)
800 + nexti * sizeof(*rx_desc)); 934 nexti = 0;
801 rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST; 935 next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
936
937 priv->rxd_ops->rxd_init(rxd, next_dma_addr);
802 } 938 }
803 939
804 return 0; 940 return 0;
@@ -811,27 +947,28 @@ static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
811 int refilled; 947 int refilled;
812 948
813 refilled = 0; 949 refilled = 0;
814 while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) { 950 while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
815 struct sk_buff *skb; 951 struct sk_buff *skb;
952 dma_addr_t addr;
816 int rx; 953 int rx;
954 void *rxd;
817 955
818 skb = dev_alloc_skb(MWL8K_RX_MAXSZ); 956 skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
819 if (skb == NULL) 957 if (skb == NULL)
820 break; 958 break;
821 959
822 rxq->rx_desc_count++; 960 addr = pci_map_single(priv->pdev, skb->data,
823 961 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
824 rx = rxq->rx_tail;
825 rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
826 962
827 rxq->rx_desc_area[rx].pkt_phys_addr = 963 rxq->rxd_count++;
828 cpu_to_le32(pci_map_single(priv->pdev, skb->data, 964 rx = rxq->tail++;
829 MWL8K_RX_MAXSZ, DMA_FROM_DEVICE)); 965 if (rxq->tail == MWL8K_RX_DESCS)
966 rxq->tail = 0;
967 rxq->buf[rx].skb = skb;
968 pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
830 969
831 rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ); 970 rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
832 rxq->rx_skb[rx] = skb; 971 priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
833 wmb();
834 rxq->rx_desc_area[rx].rx_ctrl = 0;
835 972
836 refilled++; 973 refilled++;
837 } 974 }
@@ -847,24 +984,24 @@ static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
847 int i; 984 int i;
848 985
849 for (i = 0; i < MWL8K_RX_DESCS; i++) { 986 for (i = 0; i < MWL8K_RX_DESCS; i++) {
850 if (rxq->rx_skb[i] != NULL) { 987 if (rxq->buf[i].skb != NULL) {
851 unsigned long addr; 988 pci_unmap_single(priv->pdev,
852 989 pci_unmap_addr(&rxq->buf[i], dma),
853 addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr); 990 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
854 pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ, 991 pci_unmap_addr_set(&rxq->buf[i], dma, 0);
855 PCI_DMA_FROMDEVICE); 992
856 kfree_skb(rxq->rx_skb[i]); 993 kfree_skb(rxq->buf[i].skb);
857 rxq->rx_skb[i] = NULL; 994 rxq->buf[i].skb = NULL;
858 } 995 }
859 } 996 }
860 997
861 kfree(rxq->rx_skb); 998 kfree(rxq->buf);
862 rxq->rx_skb = NULL; 999 rxq->buf = NULL;
863 1000
864 pci_free_consistent(priv->pdev, 1001 pci_free_consistent(priv->pdev,
865 MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc), 1002 MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
866 rxq->rx_desc_area, rxq->rx_desc_dma); 1003 rxq->rxd, rxq->rxd_dma);
867 rxq->rx_desc_area = NULL; 1004 rxq->rxd = NULL;
868} 1005}
869 1006
870 1007
@@ -880,9 +1017,11 @@ mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
880 !compare_ether_addr(wh->addr3, priv->capture_bssid); 1017 !compare_ether_addr(wh->addr3, priv->capture_bssid);
881} 1018}
882 1019
883static inline void mwl8k_save_beacon(struct mwl8k_priv *priv, 1020static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
884 struct sk_buff *skb) 1021 struct sk_buff *skb)
885{ 1022{
1023 struct mwl8k_priv *priv = hw->priv;
1024
886 priv->capture_beacon = false; 1025 priv->capture_beacon = false;
887 memset(priv->capture_bssid, 0, ETH_ALEN); 1026 memset(priv->capture_bssid, 0, ETH_ALEN);
888 1027
@@ -893,8 +1032,7 @@ static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
893 */ 1032 */
894 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC); 1033 priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
895 if (priv->beacon_skb != NULL) 1034 if (priv->beacon_skb != NULL)
896 queue_work(priv->config_wq, 1035 ieee80211_queue_work(hw, &priv->finalize_join_worker);
897 &priv->finalize_join_worker);
898} 1036}
899 1037
900static int rxq_process(struct ieee80211_hw *hw, int index, int limit) 1038static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
@@ -904,53 +1042,47 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
904 int processed; 1042 int processed;
905 1043
906 processed = 0; 1044 processed = 0;
907 while (rxq->rx_desc_count && limit--) { 1045 while (rxq->rxd_count && limit--) {
908 struct mwl8k_rx_desc *rx_desc;
909 struct sk_buff *skb; 1046 struct sk_buff *skb;
1047 void *rxd;
1048 int pkt_len;
910 struct ieee80211_rx_status status; 1049 struct ieee80211_rx_status status;
911 unsigned long addr; 1050 __le16 qos;
912 struct ieee80211_hdr *wh;
913 1051
914 rx_desc = rxq->rx_desc_area + rxq->rx_head; 1052 skb = rxq->buf[rxq->head].skb;
915 if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST)) 1053 if (skb == NULL)
916 break; 1054 break;
917 rmb();
918 1055
919 skb = rxq->rx_skb[rxq->rx_head]; 1056 rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
920 if (skb == NULL) 1057
1058 pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
1059 if (pkt_len < 0)
921 break; 1060 break;
922 rxq->rx_skb[rxq->rx_head] = NULL;
923 1061
924 rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS; 1062 rxq->buf[rxq->head].skb = NULL;
925 rxq->rx_desc_count--; 1063
1064 pci_unmap_single(priv->pdev,
1065 pci_unmap_addr(&rxq->buf[rxq->head], dma),
1066 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
1067 pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
926 1068
927 addr = le32_to_cpu(rx_desc->pkt_phys_addr); 1069 rxq->head++;
928 pci_unmap_single(priv->pdev, addr, 1070 if (rxq->head == MWL8K_RX_DESCS)
929 MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE); 1071 rxq->head = 0;
930 1072
931 skb_put(skb, le16_to_cpu(rx_desc->pkt_len)); 1073 rxq->rxd_count--;
932 mwl8k_remove_dma_header(skb);
933 1074
934 wh = (struct ieee80211_hdr *)skb->data; 1075 skb_put(skb, pkt_len);
1076 mwl8k_remove_dma_header(skb, qos);
935 1077
936 /* 1078 /*
937 * Check for pending join operation. save a copy of 1079 * Check for a pending join operation. Save a
938 * the beacon and schedule a tasklet to send finalize 1080 * copy of the beacon and schedule a tasklet to
939 * join command to the firmware. 1081 * send a FINALIZE_JOIN command to the firmware.
940 */ 1082 */
941 if (mwl8k_capture_bssid(priv, wh)) 1083 if (mwl8k_capture_bssid(priv, (void *)skb->data))
942 mwl8k_save_beacon(priv, skb); 1084 mwl8k_save_beacon(hw, skb);
943 1085
944 memset(&status, 0, sizeof(status));
945 status.mactime = 0;
946 status.signal = -rx_desc->rssi;
947 status.noise = -rx_desc->noise_level;
948 status.qual = rx_desc->link_quality;
949 status.antenna = 1;
950 status.rate_idx = 1;
951 status.flag = 0;
952 status.band = IEEE80211_BAND_2GHZ;
953 status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
954 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 1086 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
955 ieee80211_rx_irqsafe(hw, skb); 1087 ieee80211_rx_irqsafe(hw, skb);
956 1088
@@ -965,30 +1097,18 @@ static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
965 * Packet transmission. 1097 * Packet transmission.
966 */ 1098 */
967 1099
968/* Transmit queue assignment. */
969enum {
970 MWL8K_WME_AC_BK = 0, /* background access */
971 MWL8K_WME_AC_BE = 1, /* best effort access */
972 MWL8K_WME_AC_VI = 2, /* video access */
973 MWL8K_WME_AC_VO = 3, /* voice access */
974};
975
976/* Transmit packet ACK policy */
977#define MWL8K_TXD_ACK_POLICY_NORMAL 0
978#define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
979
980#define GET_TXQ(_ac) (\
981 ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
982 ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
983 ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
984 MWL8K_WME_AC_BE)
985
986#define MWL8K_TXD_STATUS_OK 0x00000001 1100#define MWL8K_TXD_STATUS_OK 0x00000001
987#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002 1101#define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
988#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004 1102#define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
989#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008 1103#define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
990#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000 1104#define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
991 1105
1106#define MWL8K_QOS_QLEN_UNSPEC 0xff00
1107#define MWL8K_QOS_ACK_POLICY_MASK 0x0060
1108#define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
1109#define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
1110#define MWL8K_QOS_EOSP 0x0010
1111
992struct mwl8k_tx_desc { 1112struct mwl8k_tx_desc {
993 __le32 status; 1113 __le32 status;
994 __u8 data_rate; 1114 __u8 data_rate;
@@ -997,7 +1117,7 @@ struct mwl8k_tx_desc {
997 __le32 pkt_phys_addr; 1117 __le32 pkt_phys_addr;
998 __le16 pkt_len; 1118 __le16 pkt_len;
999 __u8 dest_MAC_addr[ETH_ALEN]; 1119 __u8 dest_MAC_addr[ETH_ALEN];
1000 __le32 next_tx_desc_phys_addr; 1120 __le32 next_txd_phys_addr;
1001 __le32 reserved; 1121 __le32 reserved;
1002 __le16 rate_info; 1122 __le16 rate_info;
1003 __u8 peer_id; 1123 __u8 peer_id;
@@ -1013,44 +1133,39 @@ static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
1013 int size; 1133 int size;
1014 int i; 1134 int i;
1015 1135
1016 memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats)); 1136 txq->len = 0;
1017 txq->tx_stats.limit = MWL8K_TX_DESCS; 1137 txq->head = 0;
1018 txq->tx_head = 0; 1138 txq->tail = 0;
1019 txq->tx_tail = 0;
1020 1139
1021 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc); 1140 size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
1022 1141
1023 txq->tx_desc_area = 1142 txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
1024 pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma); 1143 if (txq->txd == NULL) {
1025 if (txq->tx_desc_area == NULL) {
1026 printk(KERN_ERR "%s: failed to alloc TX descriptors\n", 1144 printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
1027 priv->name); 1145 wiphy_name(hw->wiphy));
1028 return -ENOMEM; 1146 return -ENOMEM;
1029 } 1147 }
1030 memset(txq->tx_desc_area, 0, size); 1148 memset(txq->txd, 0, size);
1031 1149
1032 txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb), 1150 txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
1033 GFP_KERNEL); 1151 if (txq->skb == NULL) {
1034 if (txq->tx_skb == NULL) {
1035 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n", 1152 printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
1036 priv->name); 1153 wiphy_name(hw->wiphy));
1037 pci_free_consistent(priv->pdev, size, 1154 pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
1038 txq->tx_desc_area, txq->tx_desc_dma);
1039 return -ENOMEM; 1155 return -ENOMEM;
1040 } 1156 }
1041 memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb)); 1157 memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
1042 1158
1043 for (i = 0; i < MWL8K_TX_DESCS; i++) { 1159 for (i = 0; i < MWL8K_TX_DESCS; i++) {
1044 struct mwl8k_tx_desc *tx_desc; 1160 struct mwl8k_tx_desc *tx_desc;
1045 int nexti; 1161 int nexti;
1046 1162
1047 tx_desc = txq->tx_desc_area + i; 1163 tx_desc = txq->txd + i;
1048 nexti = (i + 1) % MWL8K_TX_DESCS; 1164 nexti = (i + 1) % MWL8K_TX_DESCS;
1049 1165
1050 tx_desc->status = 0; 1166 tx_desc->status = 0;
1051 tx_desc->next_tx_desc_phys_addr = 1167 tx_desc->next_txd_phys_addr =
1052 cpu_to_le32(txq->tx_desc_dma + 1168 cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
1053 nexti * sizeof(*tx_desc));
1054 } 1169 }
1055 1170
1056 return 0; 1171 return 0;
@@ -1065,109 +1180,106 @@ static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
1065 ioread32(priv->regs + MWL8K_HIU_INT_CODE); 1180 ioread32(priv->regs + MWL8K_HIU_INT_CODE);
1066} 1181}
1067 1182
1068static inline int mwl8k_txq_busy(struct mwl8k_priv *priv) 1183static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
1069{ 1184{
1070 return priv->pending_tx_pkts; 1185 struct mwl8k_priv *priv = hw->priv;
1071} 1186 int i;
1072
1073struct mwl8k_txq_info {
1074 u32 fw_owned;
1075 u32 drv_owned;
1076 u32 unused;
1077 u32 len;
1078 u32 head;
1079 u32 tail;
1080};
1081
1082static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
1083 struct mwl8k_txq_info *txinfo)
1084{
1085 int count, desc, status;
1086 struct mwl8k_tx_queue *txq;
1087 struct mwl8k_tx_desc *tx_desc;
1088 int ndescs = 0;
1089 1187
1090 memset(txinfo, 0, MWL8K_TX_QUEUES * sizeof(struct mwl8k_txq_info)); 1188 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
1189 struct mwl8k_tx_queue *txq = priv->txq + i;
1190 int fw_owned = 0;
1191 int drv_owned = 0;
1192 int unused = 0;
1193 int desc;
1091 1194
1092 spin_lock_bh(&priv->tx_lock);
1093 for (count = 0; count < MWL8K_TX_QUEUES; count++) {
1094 txq = priv->txq + count;
1095 txinfo[count].len = txq->tx_stats.len;
1096 txinfo[count].head = txq->tx_head;
1097 txinfo[count].tail = txq->tx_tail;
1098 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) { 1195 for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
1099 tx_desc = txq->tx_desc_area + desc; 1196 struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
1100 status = le32_to_cpu(tx_desc->status); 1197 u32 status;
1101 1198
1199 status = le32_to_cpu(tx_desc->status);
1102 if (status & MWL8K_TXD_STATUS_FW_OWNED) 1200 if (status & MWL8K_TXD_STATUS_FW_OWNED)
1103 txinfo[count].fw_owned++; 1201 fw_owned++;
1104 else 1202 else
1105 txinfo[count].drv_owned++; 1203 drv_owned++;
1106 1204
1107 if (tx_desc->pkt_len == 0) 1205 if (tx_desc->pkt_len == 0)
1108 txinfo[count].unused++; 1206 unused++;
1109 } 1207 }
1110 }
1111 spin_unlock_bh(&priv->tx_lock);
1112 1208
1113 return ndescs; 1209 printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
1210 "fw_owned=%d drv_owned=%d unused=%d\n",
1211 wiphy_name(hw->wiphy), i,
1212 txq->len, txq->head, txq->tail,
1213 fw_owned, drv_owned, unused);
1214 }
1114} 1215}
1115 1216
1116/* 1217/*
1117 * Must be called with hw->fw_mutex held and tx queues stopped. 1218 * Must be called with priv->fw_mutex held and tx queues stopped.
1118 */ 1219 */
1220#define MWL8K_TX_WAIT_TIMEOUT_MS 5000
1221
1119static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw) 1222static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1120{ 1223{
1121 struct mwl8k_priv *priv = hw->priv; 1224 struct mwl8k_priv *priv = hw->priv;
1122 DECLARE_COMPLETION_ONSTACK(cmd_wait); 1225 DECLARE_COMPLETION_ONSTACK(tx_wait);
1123 u32 count; 1226 int retry;
1124 unsigned long timeout; 1227 int rc;
1125 1228
1126 might_sleep(); 1229 might_sleep();
1127 1230
1128 spin_lock_bh(&priv->tx_lock); 1231 /*
1129 count = mwl8k_txq_busy(priv); 1232 * The TX queues are stopped at this point, so this test
1130 if (count) { 1233 * doesn't need to take ->tx_lock.
1131 priv->tx_wait = &cmd_wait; 1234 */
1132 if (priv->radio_on) 1235 if (!priv->pending_tx_pkts)
1133 mwl8k_tx_start(priv); 1236 return 0;
1134 }
1135 spin_unlock_bh(&priv->tx_lock);
1136 1237
1137 if (count) { 1238 retry = 0;
1138 struct mwl8k_txq_info txinfo[MWL8K_TX_QUEUES]; 1239 rc = 0;
1139 int index;
1140 int newcount;
1141 1240
1142 timeout = wait_for_completion_timeout(&cmd_wait, 1241 spin_lock_bh(&priv->tx_lock);
1143 msecs_to_jiffies(5000)); 1242 priv->tx_wait = &tx_wait;
1144 if (timeout) 1243 while (!rc) {
1145 return 0; 1244 int oldcount;
1245 unsigned long timeout;
1246
1247 oldcount = priv->pending_tx_pkts;
1146 1248
1147 spin_lock_bh(&priv->tx_lock);
1148 priv->tx_wait = NULL;
1149 newcount = mwl8k_txq_busy(priv);
1150 spin_unlock_bh(&priv->tx_lock); 1249 spin_unlock_bh(&priv->tx_lock);
1250 timeout = wait_for_completion_timeout(&tx_wait,
1251 msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
1252 spin_lock_bh(&priv->tx_lock);
1253
1254 if (timeout) {
1255 WARN_ON(priv->pending_tx_pkts);
1256 if (retry) {
1257 printk(KERN_NOTICE "%s: tx rings drained\n",
1258 wiphy_name(hw->wiphy));
1259 }
1260 break;
1261 }
1262
1263 if (priv->pending_tx_pkts < oldcount) {
1264 printk(KERN_NOTICE "%s: waiting for tx rings "
1265 "to drain (%d -> %d pkts)\n",
1266 wiphy_name(hw->wiphy), oldcount,
1267 priv->pending_tx_pkts);
1268 retry = 1;
1269 continue;
1270 }
1151 1271
1152 printk(KERN_ERR "%s(%u) TIMEDOUT:5000ms Pend:%u-->%u\n", 1272 priv->tx_wait = NULL;
1153 __func__, __LINE__, count, newcount);
1154 1273
1155 mwl8k_scan_tx_ring(priv, txinfo); 1274 printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
1156 for (index = 0; index < MWL8K_TX_QUEUES; index++) 1275 wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
1157 printk(KERN_ERR 1276 mwl8k_dump_tx_rings(hw);
1158 "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
1159 index,
1160 txinfo[index].len,
1161 txinfo[index].head,
1162 txinfo[index].tail,
1163 txinfo[index].fw_owned,
1164 txinfo[index].drv_owned,
1165 txinfo[index].unused);
1166 1277
1167 return -ETIMEDOUT; 1278 rc = -ETIMEDOUT;
1168 } 1279 }
1280 spin_unlock_bh(&priv->tx_lock);
1169 1281
1170 return 0; 1282 return rc;
1171} 1283}
1172 1284
1173#define MWL8K_TXD_SUCCESS(status) \ 1285#define MWL8K_TXD_SUCCESS(status) \
@@ -1175,13 +1287,15 @@ static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
1175 MWL8K_TXD_STATUS_OK_RETRY | \ 1287 MWL8K_TXD_STATUS_OK_RETRY | \
1176 MWL8K_TXD_STATUS_OK_MORE_RETRY)) 1288 MWL8K_TXD_STATUS_OK_MORE_RETRY))
1177 1289
1178static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force) 1290static int
1291mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
1179{ 1292{
1180 struct mwl8k_priv *priv = hw->priv; 1293 struct mwl8k_priv *priv = hw->priv;
1181 struct mwl8k_tx_queue *txq = priv->txq + index; 1294 struct mwl8k_tx_queue *txq = priv->txq + index;
1182 int wake = 0; 1295 int processed;
1183 1296
1184 while (txq->tx_stats.len > 0) { 1297 processed = 0;
1298 while (txq->len > 0 && limit--) {
1185 int tx; 1299 int tx;
1186 struct mwl8k_tx_desc *tx_desc; 1300 struct mwl8k_tx_desc *tx_desc;
1187 unsigned long addr; 1301 unsigned long addr;
@@ -1190,8 +1304,8 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1190 struct ieee80211_tx_info *info; 1304 struct ieee80211_tx_info *info;
1191 u32 status; 1305 u32 status;
1192 1306
1193 tx = txq->tx_head; 1307 tx = txq->head;
1194 tx_desc = txq->tx_desc_area + tx; 1308 tx_desc = txq->txd + tx;
1195 1309
1196 status = le32_to_cpu(tx_desc->status); 1310 status = le32_to_cpu(tx_desc->status);
1197 1311
@@ -1202,20 +1316,20 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1202 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED); 1316 ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
1203 } 1317 }
1204 1318
1205 txq->tx_head = (tx + 1) % MWL8K_TX_DESCS; 1319 txq->head = (tx + 1) % MWL8K_TX_DESCS;
1206 BUG_ON(txq->tx_stats.len == 0); 1320 BUG_ON(txq->len == 0);
1207 txq->tx_stats.len--; 1321 txq->len--;
1208 priv->pending_tx_pkts--; 1322 priv->pending_tx_pkts--;
1209 1323
1210 addr = le32_to_cpu(tx_desc->pkt_phys_addr); 1324 addr = le32_to_cpu(tx_desc->pkt_phys_addr);
1211 size = le16_to_cpu(tx_desc->pkt_len); 1325 size = le16_to_cpu(tx_desc->pkt_len);
1212 skb = txq->tx_skb[tx]; 1326 skb = txq->skb[tx];
1213 txq->tx_skb[tx] = NULL; 1327 txq->skb[tx] = NULL;
1214 1328
1215 BUG_ON(skb == NULL); 1329 BUG_ON(skb == NULL);
1216 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE); 1330 pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
1217 1331
1218 mwl8k_remove_dma_header(skb); 1332 mwl8k_remove_dma_header(skb, tx_desc->qos_control);
1219 1333
1220 /* Mark descriptor as unused */ 1334 /* Mark descriptor as unused */
1221 tx_desc->pkt_phys_addr = 0; 1335 tx_desc->pkt_phys_addr = 0;
@@ -1228,11 +1342,13 @@ static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
1228 1342
1229 ieee80211_tx_status_irqsafe(hw, skb); 1343 ieee80211_tx_status_irqsafe(hw, skb);
1230 1344
1231 wake = 1; 1345 processed++;
1232 } 1346 }
1233 1347
1234 if (wake && priv->radio_on && !mutex_is_locked(&priv->fw_mutex)) 1348 if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
1235 ieee80211_wake_queue(hw, index); 1349 ieee80211_wake_queue(hw, index);
1350
1351 return processed;
1236} 1352}
1237 1353
1238/* must be called only when the card's transmit is completely halted */ 1354/* must be called only when the card's transmit is completely halted */
@@ -1241,15 +1357,15 @@ static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
1241 struct mwl8k_priv *priv = hw->priv; 1357 struct mwl8k_priv *priv = hw->priv;
1242 struct mwl8k_tx_queue *txq = priv->txq + index; 1358 struct mwl8k_tx_queue *txq = priv->txq + index;
1243 1359
1244 mwl8k_txq_reclaim(hw, index, 1); 1360 mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
1245 1361
1246 kfree(txq->tx_skb); 1362 kfree(txq->skb);
1247 txq->tx_skb = NULL; 1363 txq->skb = NULL;
1248 1364
1249 pci_free_consistent(priv->pdev, 1365 pci_free_consistent(priv->pdev,
1250 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc), 1366 MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
1251 txq->tx_desc_area, txq->tx_desc_dma); 1367 txq->txd, txq->txd_dma);
1252 txq->tx_desc_area = NULL; 1368 txq->txd = NULL;
1253} 1369}
1254 1370
1255static int 1371static int
@@ -1279,11 +1395,9 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1279 mwl8k_vif = MWL8K_VIF(tx_info->control.vif); 1395 mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
1280 1396
1281 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 1397 if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
1282 u16 seqno = mwl8k_vif->seqno;
1283
1284 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 1398 wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
1285 wh->seq_ctrl |= cpu_to_le16(seqno << 4); 1399 wh->seq_ctrl |= cpu_to_le16(mwl8k_vif->seqno);
1286 mwl8k_vif->seqno = seqno++ % 4096; 1400 mwl8k_vif->seqno += 0x10;
1287 } 1401 }
1288 1402
1289 /* Setup firmware control bit fields for each frame type. */ 1403 /* Setup firmware control bit fields for each frame type. */
@@ -1292,24 +1406,17 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1292 if (ieee80211_is_mgmt(wh->frame_control) || 1406 if (ieee80211_is_mgmt(wh->frame_control) ||
1293 ieee80211_is_ctl(wh->frame_control)) { 1407 ieee80211_is_ctl(wh->frame_control)) {
1294 txdatarate = 0; 1408 txdatarate = 0;
1295 qos = mwl8k_qos_setbit_eosp(qos); 1409 qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
1296 /* Set Queue size to unspecified */
1297 qos = mwl8k_qos_setbit_qlen(qos, 0xff);
1298 } else if (ieee80211_is_data(wh->frame_control)) { 1410 } else if (ieee80211_is_data(wh->frame_control)) {
1299 txdatarate = 1; 1411 txdatarate = 1;
1300 if (is_multicast_ether_addr(wh->addr1)) 1412 if (is_multicast_ether_addr(wh->addr1))
1301 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX; 1413 txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
1302 1414
1303 /* Send pkt in an aggregate if AMPDU frame. */ 1415 qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
1304 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) 1416 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
1305 qos = mwl8k_qos_setbit_ack(qos, 1417 qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
1306 MWL8K_TXD_ACK_POLICY_BLOCKACK);
1307 else 1418 else
1308 qos = mwl8k_qos_setbit_ack(qos, 1419 qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
1309 MWL8K_TXD_ACK_POLICY_NORMAL);
1310
1311 if (qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT)
1312 qos = mwl8k_qos_setbit_amsdu(qos);
1313 } 1420 }
1314 1421
1315 dma = pci_map_single(priv->pdev, skb->data, 1422 dma = pci_map_single(priv->pdev, skb->data,
@@ -1317,7 +1424,7 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1317 1424
1318 if (pci_dma_mapping_error(priv->pdev, dma)) { 1425 if (pci_dma_mapping_error(priv->pdev, dma)) {
1319 printk(KERN_DEBUG "%s: failed to dma map skb, " 1426 printk(KERN_DEBUG "%s: failed to dma map skb, "
1320 "dropping TX frame.\n", priv->name); 1427 "dropping TX frame.\n", wiphy_name(hw->wiphy));
1321 dev_kfree_skb(skb); 1428 dev_kfree_skb(skb);
1322 return NETDEV_TX_OK; 1429 return NETDEV_TX_OK;
1323 } 1430 }
@@ -1326,29 +1433,31 @@ mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
1326 1433
1327 txq = priv->txq + index; 1434 txq = priv->txq + index;
1328 1435
1329 BUG_ON(txq->tx_skb[txq->tx_tail] != NULL); 1436 BUG_ON(txq->skb[txq->tail] != NULL);
1330 txq->tx_skb[txq->tx_tail] = skb; 1437 txq->skb[txq->tail] = skb;
1331 1438
1332 tx = txq->tx_desc_area + txq->tx_tail; 1439 tx = txq->txd + txq->tail;
1333 tx->data_rate = txdatarate; 1440 tx->data_rate = txdatarate;
1334 tx->tx_priority = index; 1441 tx->tx_priority = index;
1335 tx->qos_control = cpu_to_le16(qos); 1442 tx->qos_control = cpu_to_le16(qos);
1336 tx->pkt_phys_addr = cpu_to_le32(dma); 1443 tx->pkt_phys_addr = cpu_to_le32(dma);
1337 tx->pkt_len = cpu_to_le16(skb->len); 1444 tx->pkt_len = cpu_to_le16(skb->len);
1338 tx->rate_info = 0; 1445 tx->rate_info = 0;
1339 tx->peer_id = mwl8k_vif->peer_id; 1446 if (!priv->ap_fw && tx_info->control.sta != NULL)
1447 tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
1448 else
1449 tx->peer_id = 0;
1340 wmb(); 1450 wmb();
1341 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus); 1451 tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
1342 1452
1343 txq->tx_stats.count++; 1453 txq->len++;
1344 txq->tx_stats.len++;
1345 priv->pending_tx_pkts++; 1454 priv->pending_tx_pkts++;
1346 1455
1347 txq->tx_tail++; 1456 txq->tail++;
1348 if (txq->tx_tail == MWL8K_TX_DESCS) 1457 if (txq->tail == MWL8K_TX_DESCS)
1349 txq->tx_tail = 0; 1458 txq->tail = 0;
1350 1459
1351 if (txq->tx_head == txq->tx_tail) 1460 if (txq->head == txq->tail)
1352 ieee80211_stop_queue(hw, index); 1461 ieee80211_stop_queue(hw, index);
1353 1462
1354 mwl8k_tx_start(priv); 1463 mwl8k_tx_start(priv);
@@ -1417,8 +1526,8 @@ static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
1417 * Command processing. 1526 * Command processing.
1418 */ 1527 */
1419 1528
1420/* Timeout firmware commands after 2000ms */ 1529/* Timeout firmware commands after 10s */
1421#define MWL8K_CMD_TIMEOUT_MS 2000 1530#define MWL8K_CMD_TIMEOUT_MS 10000
1422 1531
1423static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) 1532static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1424{ 1533{
@@ -1431,7 +1540,7 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1431 unsigned long timeout = 0; 1540 unsigned long timeout = 0;
1432 u8 buf[32]; 1541 u8 buf[32];
1433 1542
1434 cmd->result = 0xFFFF; 1543 cmd->result = 0xffff;
1435 dma_size = le16_to_cpu(cmd->length); 1544 dma_size = le16_to_cpu(cmd->length);
1436 dma_addr = pci_map_single(priv->pdev, cmd, dma_size, 1545 dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
1437 PCI_DMA_BIDIRECTIONAL); 1546 PCI_DMA_BIDIRECTIONAL);
@@ -1464,26 +1573,85 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
1464 1573
1465 if (!timeout) { 1574 if (!timeout) {
1466 printk(KERN_ERR "%s: Command %s timeout after %u ms\n", 1575 printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
1467 priv->name, 1576 wiphy_name(hw->wiphy),
1468 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), 1577 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1469 MWL8K_CMD_TIMEOUT_MS); 1578 MWL8K_CMD_TIMEOUT_MS);
1470 rc = -ETIMEDOUT; 1579 rc = -ETIMEDOUT;
1471 } else { 1580 } else {
1581 int ms;
1582
1583 ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
1584
1472 rc = cmd->result ? -EINVAL : 0; 1585 rc = cmd->result ? -EINVAL : 0;
1473 if (rc) 1586 if (rc)
1474 printk(KERN_ERR "%s: Command %s error 0x%x\n", 1587 printk(KERN_ERR "%s: Command %s error 0x%x\n",
1475 priv->name, 1588 wiphy_name(hw->wiphy),
1476 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), 1589 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1477 le16_to_cpu(cmd->result)); 1590 le16_to_cpu(cmd->result));
1591 else if (ms > 2000)
1592 printk(KERN_NOTICE "%s: Command %s took %d ms\n",
1593 wiphy_name(hw->wiphy),
1594 mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
1595 ms);
1478 } 1596 }
1479 1597
1480 return rc; 1598 return rc;
1481} 1599}
1482 1600
1601static int mwl8k_post_pervif_cmd(struct ieee80211_hw *hw,
1602 struct ieee80211_vif *vif,
1603 struct mwl8k_cmd_pkt *cmd)
1604{
1605 if (vif != NULL)
1606 cmd->macid = MWL8K_VIF(vif)->macid;
1607 return mwl8k_post_cmd(hw, cmd);
1608}
1609
1483/* 1610/*
1484 * GET_HW_SPEC. 1611 * Setup code shared between STA and AP firmware images.
1485 */ 1612 */
1486struct mwl8k_cmd_get_hw_spec { 1613static void mwl8k_setup_2ghz_band(struct ieee80211_hw *hw)
1614{
1615 struct mwl8k_priv *priv = hw->priv;
1616
1617 BUILD_BUG_ON(sizeof(priv->channels_24) != sizeof(mwl8k_channels_24));
1618 memcpy(priv->channels_24, mwl8k_channels_24, sizeof(mwl8k_channels_24));
1619
1620 BUILD_BUG_ON(sizeof(priv->rates_24) != sizeof(mwl8k_rates_24));
1621 memcpy(priv->rates_24, mwl8k_rates_24, sizeof(mwl8k_rates_24));
1622
1623 priv->band_24.band = IEEE80211_BAND_2GHZ;
1624 priv->band_24.channels = priv->channels_24;
1625 priv->band_24.n_channels = ARRAY_SIZE(mwl8k_channels_24);
1626 priv->band_24.bitrates = priv->rates_24;
1627 priv->band_24.n_bitrates = ARRAY_SIZE(mwl8k_rates_24);
1628
1629 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band_24;
1630}
1631
1632static void mwl8k_setup_5ghz_band(struct ieee80211_hw *hw)
1633{
1634 struct mwl8k_priv *priv = hw->priv;
1635
1636 BUILD_BUG_ON(sizeof(priv->channels_50) != sizeof(mwl8k_channels_50));
1637 memcpy(priv->channels_50, mwl8k_channels_50, sizeof(mwl8k_channels_50));
1638
1639 BUILD_BUG_ON(sizeof(priv->rates_50) != sizeof(mwl8k_rates_50));
1640 memcpy(priv->rates_50, mwl8k_rates_50, sizeof(mwl8k_rates_50));
1641
1642 priv->band_50.band = IEEE80211_BAND_5GHZ;
1643 priv->band_50.channels = priv->channels_50;
1644 priv->band_50.n_channels = ARRAY_SIZE(mwl8k_channels_50);
1645 priv->band_50.bitrates = priv->rates_50;
1646 priv->band_50.n_bitrates = ARRAY_SIZE(mwl8k_rates_50);
1647
1648 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->band_50;
1649}
1650
1651/*
1652 * CMD_GET_HW_SPEC (STA version).
1653 */
1654struct mwl8k_cmd_get_hw_spec_sta {
1487 struct mwl8k_cmd_pkt header; 1655 struct mwl8k_cmd_pkt header;
1488 __u8 hw_rev; 1656 __u8 hw_rev;
1489 __u8 host_interface; 1657 __u8 host_interface;
@@ -1499,13 +1667,96 @@ struct mwl8k_cmd_get_hw_spec {
1499 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES]; 1667 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1500 __le32 caps2; 1668 __le32 caps2;
1501 __le32 num_tx_desc_per_queue; 1669 __le32 num_tx_desc_per_queue;
1502 __le32 total_rx_desc; 1670 __le32 total_rxd;
1503} __attribute__((packed)); 1671} __attribute__((packed));
1504 1672
1505static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw) 1673#define MWL8K_CAP_MAX_AMSDU 0x20000000
1674#define MWL8K_CAP_GREENFIELD 0x08000000
1675#define MWL8K_CAP_AMPDU 0x04000000
1676#define MWL8K_CAP_RX_STBC 0x01000000
1677#define MWL8K_CAP_TX_STBC 0x00800000
1678#define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
1679#define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
1680#define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
1681#define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
1682#define MWL8K_CAP_DELAY_BA 0x00003000
1683#define MWL8K_CAP_MIMO 0x00000200
1684#define MWL8K_CAP_40MHZ 0x00000100
1685#define MWL8K_CAP_BAND_MASK 0x00000007
1686#define MWL8K_CAP_5GHZ 0x00000004
1687#define MWL8K_CAP_2GHZ4 0x00000001
1688
1689static void
1690mwl8k_set_ht_caps(struct ieee80211_hw *hw,
1691 struct ieee80211_supported_band *band, u32 cap)
1692{
1693 int rx_streams;
1694 int tx_streams;
1695
1696 band->ht_cap.ht_supported = 1;
1697
1698 if (cap & MWL8K_CAP_MAX_AMSDU)
1699 band->ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
1700 if (cap & MWL8K_CAP_GREENFIELD)
1701 band->ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
1702 if (cap & MWL8K_CAP_AMPDU) {
1703 hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
1704 band->ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
1705 band->ht_cap.ampdu_density = IEEE80211_HT_MPDU_DENSITY_NONE;
1706 }
1707 if (cap & MWL8K_CAP_RX_STBC)
1708 band->ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
1709 if (cap & MWL8K_CAP_TX_STBC)
1710 band->ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
1711 if (cap & MWL8K_CAP_SHORTGI_40MHZ)
1712 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
1713 if (cap & MWL8K_CAP_SHORTGI_20MHZ)
1714 band->ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
1715 if (cap & MWL8K_CAP_DELAY_BA)
1716 band->ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
1717 if (cap & MWL8K_CAP_40MHZ)
1718 band->ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
1719
1720 rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
1721 tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
1722
1723 band->ht_cap.mcs.rx_mask[0] = 0xff;
1724 if (rx_streams >= 2)
1725 band->ht_cap.mcs.rx_mask[1] = 0xff;
1726 if (rx_streams >= 3)
1727 band->ht_cap.mcs.rx_mask[2] = 0xff;
1728 band->ht_cap.mcs.rx_mask[4] = 0x01;
1729 band->ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
1730
1731 if (rx_streams != tx_streams) {
1732 band->ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
1733 band->ht_cap.mcs.tx_params |= (tx_streams - 1) <<
1734 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1735 }
1736}
1737
1738static void
1739mwl8k_set_caps(struct ieee80211_hw *hw, u32 caps)
1506{ 1740{
1507 struct mwl8k_priv *priv = hw->priv; 1741 struct mwl8k_priv *priv = hw->priv;
1508 struct mwl8k_cmd_get_hw_spec *cmd; 1742
1743 if ((caps & MWL8K_CAP_2GHZ4) || !(caps & MWL8K_CAP_BAND_MASK)) {
1744 mwl8k_setup_2ghz_band(hw);
1745 if (caps & MWL8K_CAP_MIMO)
1746 mwl8k_set_ht_caps(hw, &priv->band_24, caps);
1747 }
1748
1749 if (caps & MWL8K_CAP_5GHZ) {
1750 mwl8k_setup_5ghz_band(hw);
1751 if (caps & MWL8K_CAP_MIMO)
1752 mwl8k_set_ht_caps(hw, &priv->band_50, caps);
1753 }
1754}
1755
1756static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
1757{
1758 struct mwl8k_priv *priv = hw->priv;
1759 struct mwl8k_cmd_get_hw_spec_sta *cmd;
1509 int rc; 1760 int rc;
1510 int i; 1761 int i;
1511 1762
@@ -1518,20 +1769,97 @@ static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1518 1769
1519 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr)); 1770 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1520 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma); 1771 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1521 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma); 1772 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1522 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES); 1773 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1523 for (i = 0; i < MWL8K_TX_QUEUES; i++) 1774 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1524 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma); 1775 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1525 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS); 1776 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1526 cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS); 1777 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1778
1779 rc = mwl8k_post_cmd(hw, &cmd->header);
1780
1781 if (!rc) {
1782 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1783 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1784 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1785 priv->hw_rev = cmd->hw_rev;
1786 mwl8k_set_caps(hw, le32_to_cpu(cmd->caps));
1787 priv->ap_macids_supported = 0x00000000;
1788 priv->sta_macids_supported = 0x00000001;
1789 }
1790
1791 kfree(cmd);
1792 return rc;
1793}
1794
1795/*
1796 * CMD_GET_HW_SPEC (AP version).
1797 */
1798struct mwl8k_cmd_get_hw_spec_ap {
1799 struct mwl8k_cmd_pkt header;
1800 __u8 hw_rev;
1801 __u8 host_interface;
1802 __le16 num_wcb;
1803 __le16 num_mcaddrs;
1804 __u8 perm_addr[ETH_ALEN];
1805 __le16 region_code;
1806 __le16 num_antenna;
1807 __le32 fw_rev;
1808 __le32 wcbbase0;
1809 __le32 rxwrptr;
1810 __le32 rxrdptr;
1811 __le32 ps_cookie;
1812 __le32 wcbbase1;
1813 __le32 wcbbase2;
1814 __le32 wcbbase3;
1815} __attribute__((packed));
1816
1817static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
1818{
1819 struct mwl8k_priv *priv = hw->priv;
1820 struct mwl8k_cmd_get_hw_spec_ap *cmd;
1821 int rc;
1822
1823 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1824 if (cmd == NULL)
1825 return -ENOMEM;
1826
1827 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
1828 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1829
1830 memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
1831 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1527 1832
1528 rc = mwl8k_post_cmd(hw, &cmd->header); 1833 rc = mwl8k_post_cmd(hw, &cmd->header);
1529 1834
1530 if (!rc) { 1835 if (!rc) {
1836 int off;
1837
1531 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr); 1838 SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
1532 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs); 1839 priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
1533 priv->fw_rev = le32_to_cpu(cmd->fw_rev); 1840 priv->fw_rev = le32_to_cpu(cmd->fw_rev);
1534 priv->hw_rev = cmd->hw_rev; 1841 priv->hw_rev = cmd->hw_rev;
1842 mwl8k_setup_2ghz_band(hw);
1843 priv->ap_macids_supported = 0x000000ff;
1844 priv->sta_macids_supported = 0x00000000;
1845
1846 off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
1847 iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
1848
1849 off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
1850 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1851
1852 off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
1853 iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
1854
1855 off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
1856 iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
1857
1858 off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
1859 iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
1860
1861 off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
1862 iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
1535 } 1863 }
1536 1864
1537 kfree(cmd); 1865 kfree(cmd);
@@ -1539,6 +1867,62 @@ static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
1539} 1867}
1540 1868
1541/* 1869/*
1870 * CMD_SET_HW_SPEC.
1871 */
1872struct mwl8k_cmd_set_hw_spec {
1873 struct mwl8k_cmd_pkt header;
1874 __u8 hw_rev;
1875 __u8 host_interface;
1876 __le16 num_mcaddrs;
1877 __u8 perm_addr[ETH_ALEN];
1878 __le16 region_code;
1879 __le32 fw_rev;
1880 __le32 ps_cookie;
1881 __le32 caps;
1882 __le32 rx_queue_ptr;
1883 __le32 num_tx_queues;
1884 __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
1885 __le32 flags;
1886 __le32 num_tx_desc_per_queue;
1887 __le32 total_rxd;
1888} __attribute__((packed));
1889
1890#define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
1891#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
1892#define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
1893
1894static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
1895{
1896 struct mwl8k_priv *priv = hw->priv;
1897 struct mwl8k_cmd_set_hw_spec *cmd;
1898 int rc;
1899 int i;
1900
1901 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1902 if (cmd == NULL)
1903 return -ENOMEM;
1904
1905 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
1906 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1907
1908 cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
1909 cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
1910 cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
1911 for (i = 0; i < MWL8K_TX_QUEUES; i++)
1912 cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
1913 cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
1914 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
1915 MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
1916 cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
1917 cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
1918
1919 rc = mwl8k_post_cmd(hw, &cmd->header);
1920 kfree(cmd);
1921
1922 return rc;
1923}
1924
1925/*
1542 * CMD_MAC_MULTICAST_ADR. 1926 * CMD_MAC_MULTICAST_ADR.
1543 */ 1927 */
1544struct mwl8k_cmd_mac_multicast_adr { 1928struct mwl8k_cmd_mac_multicast_adr {
@@ -1548,19 +1932,23 @@ struct mwl8k_cmd_mac_multicast_adr {
1548 __u8 addr[0][ETH_ALEN]; 1932 __u8 addr[0][ETH_ALEN];
1549}; 1933};
1550 1934
1551#define MWL8K_ENABLE_RX_MULTICAST 0x000F 1935#define MWL8K_ENABLE_RX_DIRECTED 0x0001
1936#define MWL8K_ENABLE_RX_MULTICAST 0x0002
1937#define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
1938#define MWL8K_ENABLE_RX_BROADCAST 0x0008
1552 1939
1553static struct mwl8k_cmd_pkt * 1940static struct mwl8k_cmd_pkt *
1554__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, 1941__mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
1555 int mc_count, struct dev_addr_list *mclist) 1942 int mc_count, struct dev_addr_list *mclist)
1556{ 1943{
1557 struct mwl8k_priv *priv = hw->priv; 1944 struct mwl8k_priv *priv = hw->priv;
1558 struct mwl8k_cmd_mac_multicast_adr *cmd; 1945 struct mwl8k_cmd_mac_multicast_adr *cmd;
1559 int size; 1946 int size;
1560 int i;
1561 1947
1562 if (mc_count > priv->num_mcaddrs) 1948 if (allmulti || mc_count > priv->num_mcaddrs) {
1563 mc_count = priv->num_mcaddrs; 1949 allmulti = 1;
1950 mc_count = 0;
1951 }
1564 1952
1565 size = sizeof(*cmd) + mc_count * ETH_ALEN; 1953 size = sizeof(*cmd) + mc_count * ETH_ALEN;
1566 1954
@@ -1570,27 +1958,34 @@ __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
1570 1958
1571 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR); 1959 cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
1572 cmd->header.length = cpu_to_le16(size); 1960 cmd->header.length = cpu_to_le16(size);
1573 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST); 1961 cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
1574 cmd->numaddr = cpu_to_le16(mc_count); 1962 MWL8K_ENABLE_RX_BROADCAST);
1575 1963
1576 for (i = 0; i < mc_count && mclist; i++) { 1964 if (allmulti) {
1577 if (mclist->da_addrlen != ETH_ALEN) { 1965 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
1578 kfree(cmd); 1966 } else if (mc_count) {
1579 return NULL; 1967 int i;
1968
1969 cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
1970 cmd->numaddr = cpu_to_le16(mc_count);
1971 for (i = 0; i < mc_count && mclist; i++) {
1972 if (mclist->da_addrlen != ETH_ALEN) {
1973 kfree(cmd);
1974 return NULL;
1975 }
1976 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1977 mclist = mclist->next;
1580 } 1978 }
1581 memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
1582 mclist = mclist->next;
1583 } 1979 }
1584 1980
1585 return &cmd->header; 1981 return &cmd->header;
1586} 1982}
1587 1983
1588/* 1984/*
1589 * CMD_802_11_GET_STAT. 1985 * CMD_GET_STAT.
1590 */ 1986 */
1591struct mwl8k_cmd_802_11_get_stat { 1987struct mwl8k_cmd_get_stat {
1592 struct mwl8k_cmd_pkt header; 1988 struct mwl8k_cmd_pkt header;
1593 __le16 action;
1594 __le32 stats[64]; 1989 __le32 stats[64];
1595} __attribute__((packed)); 1990} __attribute__((packed));
1596 1991
@@ -1599,10 +1994,10 @@ struct mwl8k_cmd_802_11_get_stat {
1599#define MWL8K_STAT_FCS_ERROR 24 1994#define MWL8K_STAT_FCS_ERROR 24
1600#define MWL8K_STAT_RTS_SUCCESS 11 1995#define MWL8K_STAT_RTS_SUCCESS 11
1601 1996
1602static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw, 1997static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
1603 struct ieee80211_low_level_stats *stats) 1998 struct ieee80211_low_level_stats *stats)
1604{ 1999{
1605 struct mwl8k_cmd_802_11_get_stat *cmd; 2000 struct mwl8k_cmd_get_stat *cmd;
1606 int rc; 2001 int rc;
1607 2002
1608 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2003 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
@@ -1611,7 +2006,6 @@ static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1611 2006
1612 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT); 2007 cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
1613 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2008 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1614 cmd->action = cpu_to_le16(MWL8K_CMD_GET);
1615 2009
1616 rc = mwl8k_post_cmd(hw, &cmd->header); 2010 rc = mwl8k_post_cmd(hw, &cmd->header);
1617 if (!rc) { 2011 if (!rc) {
@@ -1630,9 +2024,9 @@ static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
1630} 2024}
1631 2025
1632/* 2026/*
1633 * CMD_802_11_RADIO_CONTROL. 2027 * CMD_RADIO_CONTROL.
1634 */ 2028 */
1635struct mwl8k_cmd_802_11_radio_control { 2029struct mwl8k_cmd_radio_control {
1636 struct mwl8k_cmd_pkt header; 2030 struct mwl8k_cmd_pkt header;
1637 __le16 action; 2031 __le16 action;
1638 __le16 control; 2032 __le16 control;
@@ -1640,10 +2034,10 @@ struct mwl8k_cmd_802_11_radio_control {
1640} __attribute__((packed)); 2034} __attribute__((packed));
1641 2035
1642static int 2036static int
1643mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force) 2037mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1644{ 2038{
1645 struct mwl8k_priv *priv = hw->priv; 2039 struct mwl8k_priv *priv = hw->priv;
1646 struct mwl8k_cmd_802_11_radio_control *cmd; 2040 struct mwl8k_cmd_radio_control *cmd;
1647 int rc; 2041 int rc;
1648 2042
1649 if (enable == priv->radio_on && !force) 2043 if (enable == priv->radio_on && !force)
@@ -1668,36 +2062,32 @@ mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
1668 return rc; 2062 return rc;
1669} 2063}
1670 2064
1671static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw) 2065static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
1672{ 2066{
1673 return mwl8k_cmd_802_11_radio_control(hw, 0, 0); 2067 return mwl8k_cmd_radio_control(hw, 0, 0);
1674} 2068}
1675 2069
1676static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw) 2070static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
1677{ 2071{
1678 return mwl8k_cmd_802_11_radio_control(hw, 1, 0); 2072 return mwl8k_cmd_radio_control(hw, 1, 0);
1679} 2073}
1680 2074
1681static int 2075static int
1682mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble) 2076mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
1683{ 2077{
1684 struct mwl8k_priv *priv; 2078 struct mwl8k_priv *priv = hw->priv;
1685
1686 if (hw == NULL || hw->priv == NULL)
1687 return -EINVAL;
1688 priv = hw->priv;
1689 2079
1690 priv->radio_short_preamble = short_preamble; 2080 priv->radio_short_preamble = short_preamble;
1691 2081
1692 return mwl8k_cmd_802_11_radio_control(hw, 1, 1); 2082 return mwl8k_cmd_radio_control(hw, 1, 1);
1693} 2083}
1694 2084
1695/* 2085/*
1696 * CMD_802_11_RF_TX_POWER. 2086 * CMD_RF_TX_POWER.
1697 */ 2087 */
1698#define MWL8K_TX_POWER_LEVEL_TOTAL 8 2088#define MWL8K_TX_POWER_LEVEL_TOTAL 8
1699 2089
1700struct mwl8k_cmd_802_11_rf_tx_power { 2090struct mwl8k_cmd_rf_tx_power {
1701 struct mwl8k_cmd_pkt header; 2091 struct mwl8k_cmd_pkt header;
1702 __le16 action; 2092 __le16 action;
1703 __le16 support_level; 2093 __le16 support_level;
@@ -1706,9 +2096,9 @@ struct mwl8k_cmd_802_11_rf_tx_power {
1706 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL]; 2096 __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
1707} __attribute__((packed)); 2097} __attribute__((packed));
1708 2098
1709static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm) 2099static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1710{ 2100{
1711 struct mwl8k_cmd_802_11_rf_tx_power *cmd; 2101 struct mwl8k_cmd_rf_tx_power *cmd;
1712 int rc; 2102 int rc;
1713 2103
1714 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2104 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
@@ -1727,6 +2117,69 @@ static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
1727} 2117}
1728 2118
1729/* 2119/*
2120 * CMD_RF_ANTENNA.
2121 */
2122struct mwl8k_cmd_rf_antenna {
2123 struct mwl8k_cmd_pkt header;
2124 __le16 antenna;
2125 __le16 mode;
2126} __attribute__((packed));
2127
2128#define MWL8K_RF_ANTENNA_RX 1
2129#define MWL8K_RF_ANTENNA_TX 2
2130
2131static int
2132mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
2133{
2134 struct mwl8k_cmd_rf_antenna *cmd;
2135 int rc;
2136
2137 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2138 if (cmd == NULL)
2139 return -ENOMEM;
2140
2141 cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
2142 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2143 cmd->antenna = cpu_to_le16(antenna);
2144 cmd->mode = cpu_to_le16(mask);
2145
2146 rc = mwl8k_post_cmd(hw, &cmd->header);
2147 kfree(cmd);
2148
2149 return rc;
2150}
2151
2152/*
2153 * CMD_SET_BEACON.
2154 */
2155struct mwl8k_cmd_set_beacon {
2156 struct mwl8k_cmd_pkt header;
2157 __le16 beacon_len;
2158 __u8 beacon[0];
2159};
2160
2161static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw,
2162 struct ieee80211_vif *vif, u8 *beacon, int len)
2163{
2164 struct mwl8k_cmd_set_beacon *cmd;
2165 int rc;
2166
2167 cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
2168 if (cmd == NULL)
2169 return -ENOMEM;
2170
2171 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
2172 cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
2173 cmd->beacon_len = cpu_to_le16(len);
2174 memcpy(cmd->beacon, beacon, len);
2175
2176 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2177 kfree(cmd);
2178
2179 return rc;
2180}
2181
2182/*
1730 * CMD_SET_PRE_SCAN. 2183 * CMD_SET_PRE_SCAN.
1731 */ 2184 */
1732struct mwl8k_cmd_set_pre_scan { 2185struct mwl8k_cmd_set_pre_scan {
@@ -1761,7 +2214,7 @@ struct mwl8k_cmd_set_post_scan {
1761} __attribute__((packed)); 2214} __attribute__((packed));
1762 2215
1763static int 2216static int
1764mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac) 2217mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
1765{ 2218{
1766 struct mwl8k_cmd_set_post_scan *cmd; 2219 struct mwl8k_cmd_set_post_scan *cmd;
1767 int rc; 2220 int rc;
@@ -1792,8 +2245,9 @@ struct mwl8k_cmd_set_rf_channel {
1792} __attribute__((packed)); 2245} __attribute__((packed));
1793 2246
1794static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw, 2247static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1795 struct ieee80211_channel *channel) 2248 struct ieee80211_conf *conf)
1796{ 2249{
2250 struct ieee80211_channel *channel = conf->channel;
1797 struct mwl8k_cmd_set_rf_channel *cmd; 2251 struct mwl8k_cmd_set_rf_channel *cmd;
1798 int rc; 2252 int rc;
1799 2253
@@ -1805,10 +2259,19 @@ static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1805 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2259 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1806 cmd->action = cpu_to_le16(MWL8K_CMD_SET); 2260 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1807 cmd->current_channel = channel->hw_value; 2261 cmd->current_channel = channel->hw_value;
2262
1808 if (channel->band == IEEE80211_BAND_2GHZ) 2263 if (channel->band == IEEE80211_BAND_2GHZ)
1809 cmd->channel_flags = cpu_to_le32(0x00000081); 2264 cmd->channel_flags |= cpu_to_le32(0x00000001);
1810 else 2265 else if (channel->band == IEEE80211_BAND_5GHZ)
1811 cmd->channel_flags = cpu_to_le32(0x00000000); 2266 cmd->channel_flags |= cpu_to_le32(0x00000004);
2267
2268 if (conf->channel_type == NL80211_CHAN_NO_HT ||
2269 conf->channel_type == NL80211_CHAN_HT20)
2270 cmd->channel_flags |= cpu_to_le32(0x00000080);
2271 else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
2272 cmd->channel_flags |= cpu_to_le32(0x000001900);
2273 else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
2274 cmd->channel_flags |= cpu_to_le32(0x000000900);
1812 2275
1813 rc = mwl8k_post_cmd(hw, &cmd->header); 2276 rc = mwl8k_post_cmd(hw, &cmd->header);
1814 kfree(cmd); 2277 kfree(cmd);
@@ -1817,58 +2280,75 @@ static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
1817} 2280}
1818 2281
1819/* 2282/*
1820 * CMD_SET_SLOT. 2283 * CMD_SET_AID.
1821 */ 2284 */
1822struct mwl8k_cmd_set_slot { 2285#define MWL8K_FRAME_PROT_DISABLED 0x00
1823 struct mwl8k_cmd_pkt header; 2286#define MWL8K_FRAME_PROT_11G 0x07
1824 __le16 action; 2287#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
1825 __u8 short_slot; 2288#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
1826} __attribute__((packed));
1827 2289
1828static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time) 2290struct mwl8k_cmd_update_set_aid {
1829{ 2291 struct mwl8k_cmd_pkt header;
1830 struct mwl8k_cmd_set_slot *cmd; 2292 __le16 aid;
1831 int rc;
1832 2293
1833 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2294 /* AP's MAC address (BSSID) */
1834 if (cmd == NULL) 2295 __u8 bssid[ETH_ALEN];
1835 return -ENOMEM; 2296 __le16 protection_mode;
2297 __u8 supp_rates[14];
2298} __attribute__((packed));
1836 2299
1837 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT); 2300static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
1838 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2301{
1839 cmd->action = cpu_to_le16(MWL8K_CMD_SET); 2302 int i;
1840 cmd->short_slot = short_slot_time; 2303 int j;
1841 2304
1842 rc = mwl8k_post_cmd(hw, &cmd->header); 2305 /*
1843 kfree(cmd); 2306 * Clear nonstandard rates 4 and 13.
2307 */
2308 mask &= 0x1fef;
1844 2309
1845 return rc; 2310 for (i = 0, j = 0; i < 14; i++) {
2311 if (mask & (1 << i))
2312 rates[j++] = mwl8k_rates_24[i].hw_value;
2313 }
1846} 2314}
1847 2315
1848/* 2316static int
1849 * CMD_MIMO_CONFIG. 2317mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
1850 */ 2318 struct ieee80211_vif *vif, u32 legacy_rate_mask)
1851struct mwl8k_cmd_mimo_config {
1852 struct mwl8k_cmd_pkt header;
1853 __le32 action;
1854 __u8 rx_antenna_map;
1855 __u8 tx_antenna_map;
1856} __attribute__((packed));
1857
1858static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1859{ 2319{
1860 struct mwl8k_cmd_mimo_config *cmd; 2320 struct mwl8k_cmd_update_set_aid *cmd;
2321 u16 prot_mode;
1861 int rc; 2322 int rc;
1862 2323
1863 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2324 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1864 if (cmd == NULL) 2325 if (cmd == NULL)
1865 return -ENOMEM; 2326 return -ENOMEM;
1866 2327
1867 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG); 2328 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
1868 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2329 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1869 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET); 2330 cmd->aid = cpu_to_le16(vif->bss_conf.aid);
1870 cmd->rx_antenna_map = rx; 2331 memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
1871 cmd->tx_antenna_map = tx; 2332
2333 if (vif->bss_conf.use_cts_prot) {
2334 prot_mode = MWL8K_FRAME_PROT_11G;
2335 } else {
2336 switch (vif->bss_conf.ht_operation_mode &
2337 IEEE80211_HT_OP_MODE_PROTECTION) {
2338 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2339 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2340 break;
2341 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2342 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2343 break;
2344 default:
2345 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2346 break;
2347 }
2348 }
2349 cmd->protection_mode = cpu_to_le16(prot_mode);
2350
2351 legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
1872 2352
1873 rc = mwl8k_post_cmd(hw, &cmd->header); 2353 rc = mwl8k_post_cmd(hw, &cmd->header);
1874 kfree(cmd); 2354 kfree(cmd);
@@ -1877,25 +2357,32 @@ static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
1877} 2357}
1878 2358
1879/* 2359/*
1880 * CMD_ENABLE_SNIFFER. 2360 * CMD_SET_RATE.
1881 */ 2361 */
1882struct mwl8k_cmd_enable_sniffer { 2362struct mwl8k_cmd_set_rate {
1883 struct mwl8k_cmd_pkt header; 2363 struct mwl8k_cmd_pkt header;
1884 __le32 action; 2364 __u8 legacy_rates[14];
2365
2366 /* Bitmap for supported MCS codes. */
2367 __u8 mcs_set[16];
2368 __u8 reserved[16];
1885} __attribute__((packed)); 2369} __attribute__((packed));
1886 2370
1887static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable) 2371static int
2372mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2373 u32 legacy_rate_mask, u8 *mcs_rates)
1888{ 2374{
1889 struct mwl8k_cmd_enable_sniffer *cmd; 2375 struct mwl8k_cmd_set_rate *cmd;
1890 int rc; 2376 int rc;
1891 2377
1892 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2378 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1893 if (cmd == NULL) 2379 if (cmd == NULL)
1894 return -ENOMEM; 2380 return -ENOMEM;
1895 2381
1896 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER); 2382 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
1897 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2383 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1898 cmd->action = cpu_to_le32(!!enable); 2384 legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
2385 memcpy(cmd->mcs_set, mcs_rates, 16);
1899 2386
1900 rc = mwl8k_post_cmd(hw, &cmd->header); 2387 rc = mwl8k_post_cmd(hw, &cmd->header);
1901 kfree(cmd); 2388 kfree(cmd);
@@ -1904,27 +2391,39 @@ static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
1904} 2391}
1905 2392
1906/* 2393/*
1907 * CMD_SET_RATEADAPT_MODE. 2394 * CMD_FINALIZE_JOIN.
1908 */ 2395 */
1909struct mwl8k_cmd_set_rate_adapt_mode { 2396#define MWL8K_FJ_BEACON_MAXLEN 128
2397
2398struct mwl8k_cmd_finalize_join {
1910 struct mwl8k_cmd_pkt header; 2399 struct mwl8k_cmd_pkt header;
1911 __le16 action; 2400 __le32 sleep_interval; /* Number of beacon periods to sleep */
1912 __le16 mode; 2401 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
1913} __attribute__((packed)); 2402} __attribute__((packed));
1914 2403
1915static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode) 2404static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
2405 int framelen, int dtim)
1916{ 2406{
1917 struct mwl8k_cmd_set_rate_adapt_mode *cmd; 2407 struct mwl8k_cmd_finalize_join *cmd;
2408 struct ieee80211_mgmt *payload = frame;
2409 int payload_len;
1918 int rc; 2410 int rc;
1919 2411
1920 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2412 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1921 if (cmd == NULL) 2413 if (cmd == NULL)
1922 return -ENOMEM; 2414 return -ENOMEM;
1923 2415
1924 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE); 2416 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
1925 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2417 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1926 cmd->action = cpu_to_le16(MWL8K_CMD_SET); 2418 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
1927 cmd->mode = cpu_to_le16(mode); 2419
2420 payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
2421 if (payload_len < 0)
2422 payload_len = 0;
2423 else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
2424 payload_len = MWL8K_FJ_BEACON_MAXLEN;
2425
2426 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
1928 2427
1929 rc = mwl8k_post_cmd(hw, &cmd->header); 2428 rc = mwl8k_post_cmd(hw, &cmd->header);
1930 kfree(cmd); 2429 kfree(cmd);
@@ -1933,59 +2432,57 @@ static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
1933} 2432}
1934 2433
1935/* 2434/*
1936 * CMD_SET_WMM_MODE. 2435 * CMD_SET_RTS_THRESHOLD.
1937 */ 2436 */
1938struct mwl8k_cmd_set_wmm { 2437struct mwl8k_cmd_set_rts_threshold {
1939 struct mwl8k_cmd_pkt header; 2438 struct mwl8k_cmd_pkt header;
1940 __le16 action; 2439 __le16 action;
2440 __le16 threshold;
1941} __attribute__((packed)); 2441} __attribute__((packed));
1942 2442
1943static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable) 2443static int
2444mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
1944{ 2445{
1945 struct mwl8k_priv *priv = hw->priv; 2446 struct mwl8k_cmd_set_rts_threshold *cmd;
1946 struct mwl8k_cmd_set_wmm *cmd;
1947 int rc; 2447 int rc;
1948 2448
1949 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2449 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1950 if (cmd == NULL) 2450 if (cmd == NULL)
1951 return -ENOMEM; 2451 return -ENOMEM;
1952 2452
1953 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE); 2453 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
1954 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2454 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1955 cmd->action = cpu_to_le16(!!enable); 2455 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2456 cmd->threshold = cpu_to_le16(rts_thresh);
1956 2457
1957 rc = mwl8k_post_cmd(hw, &cmd->header); 2458 rc = mwl8k_post_cmd(hw, &cmd->header);
1958 kfree(cmd); 2459 kfree(cmd);
1959 2460
1960 if (!rc)
1961 priv->wmm_enabled = enable;
1962
1963 return rc; 2461 return rc;
1964} 2462}
1965 2463
1966/* 2464/*
1967 * CMD_SET_RTS_THRESHOLD. 2465 * CMD_SET_SLOT.
1968 */ 2466 */
1969struct mwl8k_cmd_rts_threshold { 2467struct mwl8k_cmd_set_slot {
1970 struct mwl8k_cmd_pkt header; 2468 struct mwl8k_cmd_pkt header;
1971 __le16 action; 2469 __le16 action;
1972 __le16 threshold; 2470 __u8 short_slot;
1973} __attribute__((packed)); 2471} __attribute__((packed));
1974 2472
1975static int mwl8k_rts_threshold(struct ieee80211_hw *hw, 2473static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
1976 u16 action, u16 threshold)
1977{ 2474{
1978 struct mwl8k_cmd_rts_threshold *cmd; 2475 struct mwl8k_cmd_set_slot *cmd;
1979 int rc; 2476 int rc;
1980 2477
1981 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2478 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
1982 if (cmd == NULL) 2479 if (cmd == NULL)
1983 return -ENOMEM; 2480 return -ENOMEM;
1984 2481
1985 cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD); 2482 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
1986 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2483 cmd->header.length = cpu_to_le16(sizeof(*cmd));
1987 cmd->action = cpu_to_le16(action); 2484 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
1988 cmd->threshold = cpu_to_le16(threshold); 2485 cmd->short_slot = short_slot_time;
1989 2486
1990 rc = mwl8k_post_cmd(hw, &cmd->header); 2487 rc = mwl8k_post_cmd(hw, &cmd->header);
1991 kfree(cmd); 2488 kfree(cmd);
@@ -2005,17 +2502,34 @@ struct mwl8k_cmd_set_edca_params {
2005 /* TX opportunity in units of 32 us */ 2502 /* TX opportunity in units of 32 us */
2006 __le16 txop; 2503 __le16 txop;
2007 2504
2008 /* Log exponent of max contention period: 0...15*/ 2505 union {
2009 __u8 log_cw_max; 2506 struct {
2507 /* Log exponent of max contention period: 0...15 */
2508 __le32 log_cw_max;
2010 2509
2011 /* Log exponent of min contention period: 0...15 */ 2510 /* Log exponent of min contention period: 0...15 */
2012 __u8 log_cw_min; 2511 __le32 log_cw_min;
2013 2512
2014 /* Adaptive interframe spacing in units of 32us */ 2513 /* Adaptive interframe spacing in units of 32us */
2015 __u8 aifs; 2514 __u8 aifs;
2016 2515
2017 /* TX queue to configure */ 2516 /* TX queue to configure */
2018 __u8 txq; 2517 __u8 txq;
2518 } ap;
2519 struct {
2520 /* Log exponent of max contention period: 0...15 */
2521 __u8 log_cw_max;
2522
2523 /* Log exponent of min contention period: 0...15 */
2524 __u8 log_cw_min;
2525
2526 /* Adaptive interframe spacing in units of 32us */
2527 __u8 aifs;
2528
2529 /* TX queue to configure */
2530 __u8 txq;
2531 } sta;
2532 };
2019} __attribute__((packed)); 2533} __attribute__((packed));
2020 2534
2021#define MWL8K_SET_EDCA_CW 0x01 2535#define MWL8K_SET_EDCA_CW 0x01
@@ -2027,10 +2541,11 @@ struct mwl8k_cmd_set_edca_params {
2027 MWL8K_SET_EDCA_AIFS) 2541 MWL8K_SET_EDCA_AIFS)
2028 2542
2029static int 2543static int
2030mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum, 2544mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2031 __u16 cw_min, __u16 cw_max, 2545 __u16 cw_min, __u16 cw_max,
2032 __u8 aifs, __u16 txop) 2546 __u8 aifs, __u16 txop)
2033{ 2547{
2548 struct mwl8k_priv *priv = hw->priv;
2034 struct mwl8k_cmd_set_edca_params *cmd; 2549 struct mwl8k_cmd_set_edca_params *cmd;
2035 int rc; 2550 int rc;
2036 2551
@@ -2042,10 +2557,17 @@ mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2042 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2557 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2043 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL); 2558 cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
2044 cmd->txop = cpu_to_le16(txop); 2559 cmd->txop = cpu_to_le16(txop);
2045 cmd->log_cw_max = (u8)ilog2(cw_max + 1); 2560 if (priv->ap_fw) {
2046 cmd->log_cw_min = (u8)ilog2(cw_min + 1); 2561 cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
2047 cmd->aifs = aifs; 2562 cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
2048 cmd->txq = qnum; 2563 cmd->ap.aifs = aifs;
2564 cmd->ap.txq = qnum;
2565 } else {
2566 cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
2567 cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
2568 cmd->sta.aifs = aifs;
2569 cmd->sta.txq = qnum;
2570 }
2049 2571
2050 rc = mwl8k_post_cmd(hw, &cmd->header); 2572 rc = mwl8k_post_cmd(hw, &cmd->header);
2051 kfree(cmd); 2573 kfree(cmd);
@@ -2054,313 +2576,516 @@ mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
2054} 2576}
2055 2577
2056/* 2578/*
2057 * CMD_FINALIZE_JOIN. 2579 * CMD_SET_WMM_MODE.
2058 */ 2580 */
2059 2581struct mwl8k_cmd_set_wmm_mode {
2060/* FJ beacon buffer size is compiled into the firmware. */
2061#define MWL8K_FJ_BEACON_MAXLEN 128
2062
2063struct mwl8k_cmd_finalize_join {
2064 struct mwl8k_cmd_pkt header; 2582 struct mwl8k_cmd_pkt header;
2065 __le32 sleep_interval; /* Number of beacon periods to sleep */ 2583 __le16 action;
2066 __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
2067} __attribute__((packed)); 2584} __attribute__((packed));
2068 2585
2069static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame, 2586static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
2070 __u16 framelen, __u16 dtim)
2071{ 2587{
2072 struct mwl8k_cmd_finalize_join *cmd; 2588 struct mwl8k_priv *priv = hw->priv;
2073 struct ieee80211_mgmt *payload = frame; 2589 struct mwl8k_cmd_set_wmm_mode *cmd;
2074 u16 hdrlen;
2075 u32 payload_len;
2076 int rc; 2590 int rc;
2077 2591
2078 if (frame == NULL)
2079 return -EINVAL;
2080
2081 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2592 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2082 if (cmd == NULL) 2593 if (cmd == NULL)
2083 return -ENOMEM; 2594 return -ENOMEM;
2084 2595
2085 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN); 2596 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
2086 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2597 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2087 cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1); 2598 cmd->action = cpu_to_le16(!!enable);
2088 2599
2089 hdrlen = ieee80211_hdrlen(payload->frame_control); 2600 rc = mwl8k_post_cmd(hw, &cmd->header);
2601 kfree(cmd);
2090 2602
2091 payload_len = framelen > hdrlen ? framelen - hdrlen : 0; 2603 if (!rc)
2604 priv->wmm_enabled = enable;
2092 2605
2093 /* XXX TBD Might just have to abort and return an error */ 2606 return rc;
2094 if (payload_len > MWL8K_FJ_BEACON_MAXLEN) 2607}
2095 printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
2096 "sent to firmware. Sz=%u MAX=%u\n", __func__,
2097 payload_len, MWL8K_FJ_BEACON_MAXLEN);
2098 2608
2099 if (payload_len > MWL8K_FJ_BEACON_MAXLEN) 2609/*
2100 payload_len = MWL8K_FJ_BEACON_MAXLEN; 2610 * CMD_MIMO_CONFIG.
2611 */
2612struct mwl8k_cmd_mimo_config {
2613 struct mwl8k_cmd_pkt header;
2614 __le32 action;
2615 __u8 rx_antenna_map;
2616 __u8 tx_antenna_map;
2617} __attribute__((packed));
2618
2619static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
2620{
2621 struct mwl8k_cmd_mimo_config *cmd;
2622 int rc;
2101 2623
2102 if (payload && payload_len) 2624 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2103 memcpy(cmd->beacon_data, &payload->u.beacon, payload_len); 2625 if (cmd == NULL)
2626 return -ENOMEM;
2627
2628 cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
2629 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2630 cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
2631 cmd->rx_antenna_map = rx;
2632 cmd->tx_antenna_map = tx;
2104 2633
2105 rc = mwl8k_post_cmd(hw, &cmd->header); 2634 rc = mwl8k_post_cmd(hw, &cmd->header);
2106 kfree(cmd); 2635 kfree(cmd);
2636
2107 return rc; 2637 return rc;
2108} 2638}
2109 2639
2110/* 2640/*
2111 * CMD_UPDATE_STADB. 2641 * CMD_USE_FIXED_RATE (STA version).
2112 */ 2642 */
2113struct mwl8k_cmd_update_sta_db { 2643struct mwl8k_cmd_use_fixed_rate_sta {
2114 struct mwl8k_cmd_pkt header; 2644 struct mwl8k_cmd_pkt header;
2645 __le32 action;
2646 __le32 allow_rate_drop;
2647 __le32 num_rates;
2648 struct {
2649 __le32 is_ht_rate;
2650 __le32 enable_retry;
2651 __le32 rate;
2652 __le32 retry_count;
2653 } rate_entry[8];
2654 __le32 rate_type;
2655 __le32 reserved1;
2656 __le32 reserved2;
2657} __attribute__((packed));
2115 2658
2116 /* See STADB_ACTION_TYPE */ 2659#define MWL8K_USE_AUTO_RATE 0x0002
2117 __le32 action; 2660#define MWL8K_UCAST_RATE 0
2118 2661
2119 /* Peer MAC address */ 2662static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
2120 __u8 peer_addr[ETH_ALEN]; 2663{
2664 struct mwl8k_cmd_use_fixed_rate_sta *cmd;
2665 int rc;
2121 2666
2122 __le32 reserved; 2667 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2668 if (cmd == NULL)
2669 return -ENOMEM;
2123 2670
2124 /* Peer info - valid during add/update. */ 2671 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2125 struct peer_capability_info peer_info; 2672 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2673 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2674 cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
2675
2676 rc = mwl8k_post_cmd(hw, &cmd->header);
2677 kfree(cmd);
2678
2679 return rc;
2680}
2681
2682/*
2683 * CMD_USE_FIXED_RATE (AP version).
2684 */
2685struct mwl8k_cmd_use_fixed_rate_ap {
2686 struct mwl8k_cmd_pkt header;
2687 __le32 action;
2688 __le32 allow_rate_drop;
2689 __le32 num_rates;
2690 struct mwl8k_rate_entry_ap {
2691 __le32 is_ht_rate;
2692 __le32 enable_retry;
2693 __le32 rate;
2694 __le32 retry_count;
2695 } rate_entry[4];
2696 u8 multicast_rate;
2697 u8 multicast_rate_type;
2698 u8 management_rate;
2126} __attribute__((packed)); 2699} __attribute__((packed));
2127 2700
2128static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw, 2701static int
2129 struct ieee80211_vif *vif, __u32 action) 2702mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
2130{ 2703{
2131 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif); 2704 struct mwl8k_cmd_use_fixed_rate_ap *cmd;
2132 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2133 struct mwl8k_cmd_update_sta_db *cmd;
2134 struct peer_capability_info *peer_info;
2135 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2136 int rc; 2705 int rc;
2137 __u8 count, *rates;
2138 2706
2139 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2707 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2140 if (cmd == NULL) 2708 if (cmd == NULL)
2141 return -ENOMEM; 2709 return -ENOMEM;
2142 2710
2143 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB); 2711 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
2144 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2712 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2713 cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
2714 cmd->multicast_rate = mcast;
2715 cmd->management_rate = mgmt;
2145 2716
2146 cmd->action = cpu_to_le32(action); 2717 rc = mwl8k_post_cmd(hw, &cmd->header);
2147 peer_info = &cmd->peer_info; 2718 kfree(cmd);
2148 memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
2149 2719
2150 switch (action) { 2720 return rc;
2151 case MWL8K_STA_DB_ADD_ENTRY: 2721}
2152 case MWL8K_STA_DB_MODIFY_ENTRY:
2153 /* Build peer_info block */
2154 peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
2155 peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
2156 peer_info->interop = 1;
2157 peer_info->amsdu_enabled = 0;
2158
2159 rates = peer_info->legacy_rates;
2160 for (count = 0; count < mv_vif->legacy_nrates; count++)
2161 rates[count] = bitrates[count].hw_value;
2162
2163 rc = mwl8k_post_cmd(hw, &cmd->header);
2164 if (rc == 0)
2165 mv_vif->peer_id = peer_info->station_id;
2166 2722
2167 break; 2723/*
2724 * CMD_ENABLE_SNIFFER.
2725 */
2726struct mwl8k_cmd_enable_sniffer {
2727 struct mwl8k_cmd_pkt header;
2728 __le32 action;
2729} __attribute__((packed));
2168 2730
2169 case MWL8K_STA_DB_DEL_ENTRY: 2731static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
2170 case MWL8K_STA_DB_FLUSH: 2732{
2171 default: 2733 struct mwl8k_cmd_enable_sniffer *cmd;
2172 rc = mwl8k_post_cmd(hw, &cmd->header); 2734 int rc;
2173 if (rc == 0) 2735
2174 mv_vif->peer_id = 0; 2736 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2175 break; 2737 if (cmd == NULL)
2176 } 2738 return -ENOMEM;
2739
2740 cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
2741 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2742 cmd->action = cpu_to_le32(!!enable);
2743
2744 rc = mwl8k_post_cmd(hw, &cmd->header);
2177 kfree(cmd); 2745 kfree(cmd);
2178 2746
2179 return rc; 2747 return rc;
2180} 2748}
2181 2749
2182/* 2750/*
2183 * CMD_SET_AID. 2751 * CMD_SET_MAC_ADDR.
2184 */ 2752 */
2185#define MWL8K_RATE_INDEX_MAX_ARRAY 14 2753struct mwl8k_cmd_set_mac_addr {
2754 struct mwl8k_cmd_pkt header;
2755 union {
2756 struct {
2757 __le16 mac_type;
2758 __u8 mac_addr[ETH_ALEN];
2759 } mbss;
2760 __u8 mac_addr[ETH_ALEN];
2761 };
2762} __attribute__((packed));
2186 2763
2187#define MWL8K_FRAME_PROT_DISABLED 0x00 2764#define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
2188#define MWL8K_FRAME_PROT_11G 0x07 2765#define MWL8K_MAC_TYPE_SECONDARY_CLIENT 1
2189#define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02 2766#define MWL8K_MAC_TYPE_PRIMARY_AP 2
2190#define MWL8K_FRAME_PROT_11N_HT_ALL 0x06 2767#define MWL8K_MAC_TYPE_SECONDARY_AP 3
2191 2768
2192struct mwl8k_cmd_update_set_aid { 2769static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw,
2193 struct mwl8k_cmd_pkt header; 2770 struct ieee80211_vif *vif, u8 *mac)
2194 __le16 aid; 2771{
2772 struct mwl8k_priv *priv = hw->priv;
2773 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2774 struct mwl8k_cmd_set_mac_addr *cmd;
2775 int mac_type;
2776 int rc;
2195 2777
2196 /* AP's MAC address (BSSID) */ 2778 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2197 __u8 bssid[ETH_ALEN]; 2779 if (vif != NULL && vif->type == NL80211_IFTYPE_STATION) {
2198 __le16 protection_mode; 2780 if (mwl8k_vif->macid + 1 == ffs(priv->sta_macids_supported))
2199 __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY]; 2781 mac_type = MWL8K_MAC_TYPE_PRIMARY_CLIENT;
2782 else
2783 mac_type = MWL8K_MAC_TYPE_SECONDARY_CLIENT;
2784 } else if (vif != NULL && vif->type == NL80211_IFTYPE_AP) {
2785 if (mwl8k_vif->macid + 1 == ffs(priv->ap_macids_supported))
2786 mac_type = MWL8K_MAC_TYPE_PRIMARY_AP;
2787 else
2788 mac_type = MWL8K_MAC_TYPE_SECONDARY_AP;
2789 }
2790
2791 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2792 if (cmd == NULL)
2793 return -ENOMEM;
2794
2795 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
2796 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2797 if (priv->ap_fw) {
2798 cmd->mbss.mac_type = cpu_to_le16(mac_type);
2799 memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
2800 } else {
2801 memcpy(cmd->mac_addr, mac, ETH_ALEN);
2802 }
2803
2804 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2805 kfree(cmd);
2806
2807 return rc;
2808}
2809
2810/*
2811 * CMD_SET_RATEADAPT_MODE.
2812 */
2813struct mwl8k_cmd_set_rate_adapt_mode {
2814 struct mwl8k_cmd_pkt header;
2815 __le16 action;
2816 __le16 mode;
2200} __attribute__((packed)); 2817} __attribute__((packed));
2201 2818
2202static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw, 2819static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
2203 struct ieee80211_vif *vif)
2204{ 2820{
2205 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif); 2821 struct mwl8k_cmd_set_rate_adapt_mode *cmd;
2206 struct ieee80211_bss_conf *info = &mv_vif->bss_info;
2207 struct mwl8k_cmd_update_set_aid *cmd;
2208 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2209 int count;
2210 u16 prot_mode;
2211 int rc; 2822 int rc;
2212 2823
2213 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2824 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2214 if (cmd == NULL) 2825 if (cmd == NULL)
2215 return -ENOMEM; 2826 return -ENOMEM;
2216 2827
2217 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID); 2828 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
2218 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2829 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2219 cmd->aid = cpu_to_le16(info->aid); 2830 cmd->action = cpu_to_le16(MWL8K_CMD_SET);
2831 cmd->mode = cpu_to_le16(mode);
2220 2832
2221 memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN); 2833 rc = mwl8k_post_cmd(hw, &cmd->header);
2834 kfree(cmd);
2222 2835
2223 if (info->use_cts_prot) { 2836 return rc;
2224 prot_mode = MWL8K_FRAME_PROT_11G; 2837}
2225 } else {
2226 switch (info->ht_operation_mode &
2227 IEEE80211_HT_OP_MODE_PROTECTION) {
2228 case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
2229 prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
2230 break;
2231 case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
2232 prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
2233 break;
2234 default:
2235 prot_mode = MWL8K_FRAME_PROT_DISABLED;
2236 break;
2237 }
2238 }
2239 cmd->protection_mode = cpu_to_le16(prot_mode);
2240 2838
2241 for (count = 0; count < mv_vif->legacy_nrates; count++) 2839/*
2242 cmd->supp_rates[count] = bitrates[count].hw_value; 2840 * CMD_BSS_START.
2841 */
2842struct mwl8k_cmd_bss_start {
2843 struct mwl8k_cmd_pkt header;
2844 __le32 enable;
2845} __attribute__((packed));
2243 2846
2244 rc = mwl8k_post_cmd(hw, &cmd->header); 2847static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw,
2848 struct ieee80211_vif *vif, int enable)
2849{
2850 struct mwl8k_cmd_bss_start *cmd;
2851 int rc;
2852
2853 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2854 if (cmd == NULL)
2855 return -ENOMEM;
2856
2857 cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
2858 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2859 cmd->enable = cpu_to_le32(enable);
2860
2861 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2245 kfree(cmd); 2862 kfree(cmd);
2246 2863
2247 return rc; 2864 return rc;
2248} 2865}
2249 2866
2250/* 2867/*
2251 * CMD_SET_RATE. 2868 * CMD_SET_NEW_STN.
2252 */ 2869 */
2253struct mwl8k_cmd_update_rateset { 2870struct mwl8k_cmd_set_new_stn {
2254 struct mwl8k_cmd_pkt header; 2871 struct mwl8k_cmd_pkt header;
2255 __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY]; 2872 __le16 aid;
2256 2873 __u8 mac_addr[6];
2257 /* Bitmap for supported MCS codes. */ 2874 __le16 stn_id;
2258 __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES]; 2875 __le16 action;
2259 __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES]; 2876 __le16 rsvd;
2877 __le32 legacy_rates;
2878 __u8 ht_rates[4];
2879 __le16 cap_info;
2880 __le16 ht_capabilities_info;
2881 __u8 mac_ht_param_info;
2882 __u8 rev;
2883 __u8 control_channel;
2884 __u8 add_channel;
2885 __le16 op_mode;
2886 __le16 stbc;
2887 __u8 add_qos_info;
2888 __u8 is_qos_sta;
2889 __le32 fw_sta_ptr;
2260} __attribute__((packed)); 2890} __attribute__((packed));
2261 2891
2262static int mwl8k_update_rateset(struct ieee80211_hw *hw, 2892#define MWL8K_STA_ACTION_ADD 0
2263 struct ieee80211_vif *vif) 2893#define MWL8K_STA_ACTION_REMOVE 2
2894
2895static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
2896 struct ieee80211_vif *vif,
2897 struct ieee80211_sta *sta)
2264{ 2898{
2265 struct mwl8k_vif *mv_vif = MWL8K_VIF(vif); 2899 struct mwl8k_cmd_set_new_stn *cmd;
2266 struct mwl8k_cmd_update_rateset *cmd; 2900 u32 rates;
2267 struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
2268 int count;
2269 int rc; 2901 int rc;
2270 2902
2271 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 2903 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2272 if (cmd == NULL) 2904 if (cmd == NULL)
2273 return -ENOMEM; 2905 return -ENOMEM;
2274 2906
2275 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE); 2907 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2908 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2909 cmd->aid = cpu_to_le16(sta->aid);
2910 memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
2911 cmd->stn_id = cpu_to_le16(sta->aid);
2912 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
2913 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
2914 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
2915 else
2916 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
2917 cmd->legacy_rates = cpu_to_le32(rates);
2918 if (sta->ht_cap.ht_supported) {
2919 cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
2920 cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
2921 cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
2922 cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
2923 cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
2924 cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
2925 ((sta->ht_cap.ampdu_density & 7) << 2);
2926 cmd->is_qos_sta = 1;
2927 }
2928
2929 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2930 kfree(cmd);
2931
2932 return rc;
2933}
2934
2935static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
2936 struct ieee80211_vif *vif)
2937{
2938 struct mwl8k_cmd_set_new_stn *cmd;
2939 int rc;
2940
2941 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2942 if (cmd == NULL)
2943 return -ENOMEM;
2944
2945 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2276 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 2946 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2947 memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
2277 2948
2278 for (count = 0; count < mv_vif->legacy_nrates; count++) 2949 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2279 cmd->legacy_rates[count] = bitrates[count].hw_value; 2950 kfree(cmd);
2280 2951
2281 rc = mwl8k_post_cmd(hw, &cmd->header); 2952 return rc;
2953}
2954
2955static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
2956 struct ieee80211_vif *vif, u8 *addr)
2957{
2958 struct mwl8k_cmd_set_new_stn *cmd;
2959 int rc;
2960
2961 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2962 if (cmd == NULL)
2963 return -ENOMEM;
2964
2965 cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
2966 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2967 memcpy(cmd->mac_addr, addr, ETH_ALEN);
2968 cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
2969
2970 rc = mwl8k_post_pervif_cmd(hw, vif, &cmd->header);
2282 kfree(cmd); 2971 kfree(cmd);
2283 2972
2284 return rc; 2973 return rc;
2285} 2974}
2286 2975
2287/* 2976/*
2288 * CMD_USE_FIXED_RATE. 2977 * CMD_UPDATE_STADB.
2289 */ 2978 */
2290#define MWL8K_RATE_TABLE_SIZE 8 2979struct ewc_ht_info {
2291#define MWL8K_UCAST_RATE 0 2980 __le16 control1;
2292#define MWL8K_USE_AUTO_RATE 0x0002 2981 __le16 control2;
2982 __le16 control3;
2983} __attribute__((packed));
2984
2985struct peer_capability_info {
2986 /* Peer type - AP vs. STA. */
2987 __u8 peer_type;
2293 2988
2294struct mwl8k_rate_entry { 2989 /* Basic 802.11 capabilities from assoc resp. */
2295 /* Set to 1 if HT rate, 0 if legacy. */ 2990 __le16 basic_caps;
2296 __le32 is_ht_rate;
2297 2991
2298 /* Set to 1 to use retry_count field. */ 2992 /* Set if peer supports 802.11n high throughput (HT). */
2299 __le32 enable_retry; 2993 __u8 ht_support;
2300 2994
2301 /* Specified legacy rate or MCS. */ 2995 /* Valid if HT is supported. */
2302 __le32 rate; 2996 __le16 ht_caps;
2997 __u8 extended_ht_caps;
2998 struct ewc_ht_info ewc_info;
2303 2999
2304 /* Number of allowed retries. */ 3000 /* Legacy rate table. Intersection of our rates and peer rates. */
2305 __le32 retry_count; 3001 __u8 legacy_rates[12];
2306} __attribute__((packed));
2307 3002
2308struct mwl8k_rate_table { 3003 /* HT rate table. Intersection of our rates and peer rates. */
2309 /* 1 to allow specified rate and below */ 3004 __u8 ht_rates[16];
2310 __le32 allow_rate_drop; 3005 __u8 pad[16];
2311 __le32 num_rates; 3006
2312 struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE]; 3007 /* If set, interoperability mode, no proprietary extensions. */
3008 __u8 interop;
3009 __u8 pad2;
3010 __u8 station_id;
3011 __le16 amsdu_enabled;
2313} __attribute__((packed)); 3012} __attribute__((packed));
2314 3013
2315struct mwl8k_cmd_use_fixed_rate { 3014struct mwl8k_cmd_update_stadb {
2316 struct mwl8k_cmd_pkt header; 3015 struct mwl8k_cmd_pkt header;
3016
3017 /* See STADB_ACTION_TYPE */
2317 __le32 action; 3018 __le32 action;
2318 struct mwl8k_rate_table rate_table;
2319 3019
2320 /* Unicast, Broadcast or Multicast */ 3020 /* Peer MAC address */
2321 __le32 rate_type; 3021 __u8 peer_addr[ETH_ALEN];
2322 __le32 reserved1; 3022
2323 __le32 reserved2; 3023 __le32 reserved;
3024
3025 /* Peer info - valid during add/update. */
3026 struct peer_capability_info peer_info;
2324} __attribute__((packed)); 3027} __attribute__((packed));
2325 3028
2326static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw, 3029#define MWL8K_STA_DB_MODIFY_ENTRY 1
2327 u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table) 3030#define MWL8K_STA_DB_DEL_ENTRY 2
3031
3032/* Peer Entry flags - used to define the type of the peer node */
3033#define MWL8K_PEER_TYPE_ACCESSPOINT 2
3034
3035static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
3036 struct ieee80211_vif *vif,
3037 struct ieee80211_sta *sta)
2328{ 3038{
2329 struct mwl8k_cmd_use_fixed_rate *cmd; 3039 struct mwl8k_cmd_update_stadb *cmd;
2330 int count; 3040 struct peer_capability_info *p;
3041 u32 rates;
2331 int rc; 3042 int rc;
2332 3043
2333 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL); 3044 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2334 if (cmd == NULL) 3045 if (cmd == NULL)
2335 return -ENOMEM; 3046 return -ENOMEM;
2336 3047
2337 cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE); 3048 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2338 cmd->header.length = cpu_to_le16(sizeof(*cmd)); 3049 cmd->header.length = cpu_to_le16(sizeof(*cmd));
3050 cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
3051 memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
3052
3053 p = &cmd->peer_info;
3054 p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
3055 p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
3056 p->ht_support = sta->ht_cap.ht_supported;
3057 p->ht_caps = sta->ht_cap.cap;
3058 p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
3059 ((sta->ht_cap.ampdu_density & 7) << 2);
3060 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3061 rates = sta->supp_rates[IEEE80211_BAND_2GHZ];
3062 else
3063 rates = sta->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3064 legacy_rate_mask_to_array(p->legacy_rates, rates);
3065 memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
3066 p->interop = 1;
3067 p->amsdu_enabled = 0;
2339 3068
2340 cmd->action = cpu_to_le32(action); 3069 rc = mwl8k_post_cmd(hw, &cmd->header);
2341 cmd->rate_type = cpu_to_le32(rate_type); 3070 kfree(cmd);
2342 3071
2343 if (rate_table != NULL) { 3072 return rc ? rc : p->station_id;
2344 /* Copy over each field manually so 3073}
2345 * that bitflipping can be done 3074
2346 */ 3075static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
2347 cmd->rate_table.allow_rate_drop = 3076 struct ieee80211_vif *vif, u8 *addr)
2348 cpu_to_le32(rate_table->allow_rate_drop); 3077{
2349 cmd->rate_table.num_rates = 3078 struct mwl8k_cmd_update_stadb *cmd;
2350 cpu_to_le32(rate_table->num_rates); 3079 int rc;
2351 3080
2352 for (count = 0; count < rate_table->num_rates; count++) { 3081 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
2353 struct mwl8k_rate_entry *dst = 3082 if (cmd == NULL)
2354 &cmd->rate_table.rate_entry[count]; 3083 return -ENOMEM;
2355 struct mwl8k_rate_entry *src = 3084
2356 &rate_table->rate_entry[count]; 3085 cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
2357 3086 cmd->header.length = cpu_to_le16(sizeof(*cmd));
2358 dst->is_ht_rate = cpu_to_le32(src->is_ht_rate); 3087 cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
2359 dst->enable_retry = cpu_to_le32(src->enable_retry); 3088 memcpy(cmd->peer_addr, addr, ETH_ALEN);
2360 dst->rate = cpu_to_le32(src->rate);
2361 dst->retry_count = cpu_to_le32(src->retry_count);
2362 }
2363 }
2364 3089
2365 rc = mwl8k_post_cmd(hw, &cmd->header); 3090 rc = mwl8k_post_cmd(hw, &cmd->header);
2366 kfree(cmd); 3091 kfree(cmd);
@@ -2379,19 +3104,22 @@ static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2379 u32 status; 3104 u32 status;
2380 3105
2381 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); 3106 status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2382 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2383
2384 if (!status) 3107 if (!status)
2385 return IRQ_NONE; 3108 return IRQ_NONE;
2386 3109
2387 if (status & MWL8K_A2H_INT_TX_DONE) 3110 if (status & MWL8K_A2H_INT_TX_DONE) {
2388 tasklet_schedule(&priv->tx_reclaim_task); 3111 status &= ~MWL8K_A2H_INT_TX_DONE;
3112 tasklet_schedule(&priv->poll_tx_task);
3113 }
2389 3114
2390 if (status & MWL8K_A2H_INT_RX_READY) { 3115 if (status & MWL8K_A2H_INT_RX_READY) {
2391 while (rxq_process(hw, 0, 1)) 3116 status &= ~MWL8K_A2H_INT_RX_READY;
2392 rxq_refill(hw, 0, 1); 3117 tasklet_schedule(&priv->poll_rx_task);
2393 } 3118 }
2394 3119
3120 if (status)
3121 iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3122
2395 if (status & MWL8K_A2H_INT_OPC_DONE) { 3123 if (status & MWL8K_A2H_INT_OPC_DONE) {
2396 if (priv->hostcmd_wait != NULL) 3124 if (priv->hostcmd_wait != NULL)
2397 complete(priv->hostcmd_wait); 3125 complete(priv->hostcmd_wait);
@@ -2399,13 +3127,60 @@ static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
2399 3127
2400 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) { 3128 if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
2401 if (!mutex_is_locked(&priv->fw_mutex) && 3129 if (!mutex_is_locked(&priv->fw_mutex) &&
2402 priv->radio_on && mwl8k_txq_busy(priv)) 3130 priv->radio_on && priv->pending_tx_pkts)
2403 mwl8k_tx_start(priv); 3131 mwl8k_tx_start(priv);
2404 } 3132 }
2405 3133
2406 return IRQ_HANDLED; 3134 return IRQ_HANDLED;
2407} 3135}
2408 3136
3137static void mwl8k_tx_poll(unsigned long data)
3138{
3139 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3140 struct mwl8k_priv *priv = hw->priv;
3141 int limit;
3142 int i;
3143
3144 limit = 32;
3145
3146 spin_lock_bh(&priv->tx_lock);
3147
3148 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3149 limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
3150
3151 if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
3152 complete(priv->tx_wait);
3153 priv->tx_wait = NULL;
3154 }
3155
3156 spin_unlock_bh(&priv->tx_lock);
3157
3158 if (limit) {
3159 writel(~MWL8K_A2H_INT_TX_DONE,
3160 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3161 } else {
3162 tasklet_schedule(&priv->poll_tx_task);
3163 }
3164}
3165
3166static void mwl8k_rx_poll(unsigned long data)
3167{
3168 struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
3169 struct mwl8k_priv *priv = hw->priv;
3170 int limit;
3171
3172 limit = 32;
3173 limit -= rxq_process(hw, 0, limit);
3174 limit -= rxq_refill(hw, 0, limit);
3175
3176 if (limit) {
3177 writel(~MWL8K_A2H_INT_RX_READY,
3178 priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
3179 } else {
3180 tasklet_schedule(&priv->poll_rx_task);
3181 }
3182}
3183
2409 3184
2410/* 3185/*
2411 * Core driver operations. 3186 * Core driver operations.
@@ -2416,9 +3191,9 @@ static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2416 int index = skb_get_queue_mapping(skb); 3191 int index = skb_get_queue_mapping(skb);
2417 int rc; 3192 int rc;
2418 3193
2419 if (priv->current_channel == NULL) { 3194 if (!priv->radio_on) {
2420 printk(KERN_DEBUG "%s: dropped TX frame since radio " 3195 printk(KERN_DEBUG "%s: dropped TX frame since radio "
2421 "disabled\n", priv->name); 3196 "disabled\n", wiphy_name(hw->wiphy));
2422 dev_kfree_skb(skb); 3197 dev_kfree_skb(skb);
2423 return NETDEV_TX_OK; 3198 return NETDEV_TX_OK;
2424 } 3199 }
@@ -2433,39 +3208,42 @@ static int mwl8k_start(struct ieee80211_hw *hw)
2433 struct mwl8k_priv *priv = hw->priv; 3208 struct mwl8k_priv *priv = hw->priv;
2434 int rc; 3209 int rc;
2435 3210
2436 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt, 3211 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2437 IRQF_SHARED, MWL8K_NAME, hw); 3212 IRQF_SHARED, MWL8K_NAME, hw);
2438 if (rc) { 3213 if (rc) {
2439 printk(KERN_ERR "%s: failed to register IRQ handler\n", 3214 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2440 priv->name); 3215 wiphy_name(hw->wiphy));
2441 return -EIO; 3216 return -EIO;
2442 } 3217 }
2443 3218
2444 /* Enable tx reclaim tasklet */ 3219 /* Enable TX reclaim and RX tasklets. */
2445 tasklet_enable(&priv->tx_reclaim_task); 3220 tasklet_enable(&priv->poll_tx_task);
3221 tasklet_enable(&priv->poll_rx_task);
2446 3222
2447 /* Enable interrupts */ 3223 /* Enable interrupts */
2448 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); 3224 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2449 3225
2450 rc = mwl8k_fw_lock(hw); 3226 rc = mwl8k_fw_lock(hw);
2451 if (!rc) { 3227 if (!rc) {
2452 rc = mwl8k_cmd_802_11_radio_enable(hw); 3228 rc = mwl8k_cmd_radio_enable(hw);
2453 3229
2454 if (!rc) 3230 if (!priv->ap_fw) {
2455 rc = mwl8k_cmd_set_pre_scan(hw); 3231 if (!rc)
3232 rc = mwl8k_cmd_enable_sniffer(hw, 0);
2456 3233
2457 if (!rc) 3234 if (!rc)
2458 rc = mwl8k_cmd_set_post_scan(hw, 3235 rc = mwl8k_cmd_set_pre_scan(hw);
2459 "\x00\x00\x00\x00\x00\x00");
2460 3236
2461 if (!rc) 3237 if (!rc)
2462 rc = mwl8k_cmd_setrateadaptmode(hw, 0); 3238 rc = mwl8k_cmd_set_post_scan(hw,
3239 "\x00\x00\x00\x00\x00\x00");
3240 }
2463 3241
2464 if (!rc) 3242 if (!rc)
2465 rc = mwl8k_set_wmm(hw, 0); 3243 rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
2466 3244
2467 if (!rc) 3245 if (!rc)
2468 rc = mwl8k_enable_sniffer(hw, 0); 3246 rc = mwl8k_cmd_set_wmm_mode(hw, 0);
2469 3247
2470 mwl8k_fw_unlock(hw); 3248 mwl8k_fw_unlock(hw);
2471 } 3249 }
@@ -2473,7 +3251,8 @@ static int mwl8k_start(struct ieee80211_hw *hw)
2473 if (rc) { 3251 if (rc) {
2474 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); 3252 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2475 free_irq(priv->pdev->irq, hw); 3253 free_irq(priv->pdev->irq, hw);
2476 tasklet_disable(&priv->tx_reclaim_task); 3254 tasklet_disable(&priv->poll_tx_task);
3255 tasklet_disable(&priv->poll_rx_task);
2477 } 3256 }
2478 3257
2479 return rc; 3258 return rc;
@@ -2484,7 +3263,7 @@ static void mwl8k_stop(struct ieee80211_hw *hw)
2484 struct mwl8k_priv *priv = hw->priv; 3263 struct mwl8k_priv *priv = hw->priv;
2485 int i; 3264 int i;
2486 3265
2487 mwl8k_cmd_802_11_radio_disable(hw); 3266 mwl8k_cmd_radio_disable(hw);
2488 3267
2489 ieee80211_stop_queues(hw); 3268 ieee80211_stop_queues(hw);
2490 3269
@@ -2497,68 +3276,83 @@ static void mwl8k_stop(struct ieee80211_hw *hw)
2497 if (priv->beacon_skb != NULL) 3276 if (priv->beacon_skb != NULL)
2498 dev_kfree_skb(priv->beacon_skb); 3277 dev_kfree_skb(priv->beacon_skb);
2499 3278
2500 /* Stop tx reclaim tasklet */ 3279 /* Stop TX reclaim and RX tasklets. */
2501 tasklet_disable(&priv->tx_reclaim_task); 3280 tasklet_disable(&priv->poll_tx_task);
2502 3281 tasklet_disable(&priv->poll_rx_task);
2503 /* Stop config thread */
2504 flush_workqueue(priv->config_wq);
2505 3282
2506 /* Return all skbs to mac80211 */ 3283 /* Return all skbs to mac80211 */
2507 for (i = 0; i < MWL8K_TX_QUEUES; i++) 3284 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2508 mwl8k_txq_reclaim(hw, i, 1); 3285 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
2509} 3286}
2510 3287
2511static int mwl8k_add_interface(struct ieee80211_hw *hw, 3288static int mwl8k_add_interface(struct ieee80211_hw *hw,
2512 struct ieee80211_if_init_conf *conf) 3289 struct ieee80211_vif *vif)
2513{ 3290{
2514 struct mwl8k_priv *priv = hw->priv; 3291 struct mwl8k_priv *priv = hw->priv;
2515 struct mwl8k_vif *mwl8k_vif; 3292 struct mwl8k_vif *mwl8k_vif;
3293 u32 macids_supported;
3294 int macid;
2516 3295
2517 /* 3296 /*
2518 * We only support one active interface at a time. 3297 * Reject interface creation if sniffer mode is active, as
3298 * STA operation is mutually exclusive with hardware sniffer
3299 * mode. (Sniffer mode is only used on STA firmware.)
2519 */ 3300 */
2520 if (priv->vif != NULL) 3301 if (priv->sniffer_enabled) {
2521 return -EBUSY; 3302 printk(KERN_INFO "%s: unable to create STA "
2522 3303 "interface due to sniffer mode being enabled\n",
2523 /* 3304 wiphy_name(hw->wiphy));
2524 * We only support managed interfaces for now.
2525 */
2526 if (conf->type != NL80211_IFTYPE_STATION)
2527 return -EINVAL; 3305 return -EINVAL;
3306 }
2528 3307
2529 /* Clean out driver private area */
2530 mwl8k_vif = MWL8K_VIF(conf->vif);
2531 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
2532
2533 /* Save the mac address */
2534 memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
2535 3308
2536 /* Back pointer to parent config block */ 3309 switch (vif->type) {
2537 mwl8k_vif->priv = priv; 3310 case NL80211_IFTYPE_AP:
3311 macids_supported = priv->ap_macids_supported;
3312 break;
3313 case NL80211_IFTYPE_STATION:
3314 macids_supported = priv->sta_macids_supported;
3315 break;
3316 default:
3317 return -EINVAL;
3318 }
2538 3319
2539 /* Setup initial PHY parameters */ 3320 macid = ffs(macids_supported & ~priv->macids_used);
2540 memcpy(mwl8k_vif->legacy_rates, 3321 if (!macid--)
2541 priv->rates, sizeof(mwl8k_vif->legacy_rates)); 3322 return -EBUSY;
2542 mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
2543 3323
2544 /* Set Initial sequence number to zero */ 3324 /* Setup driver private area. */
3325 mwl8k_vif = MWL8K_VIF(vif);
3326 memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
3327 mwl8k_vif->vif = vif;
3328 mwl8k_vif->macid = macid;
2545 mwl8k_vif->seqno = 0; 3329 mwl8k_vif->seqno = 0;
2546 3330
2547 priv->vif = conf->vif; 3331 /* Set the mac address. */
2548 priv->current_channel = NULL; 3332 mwl8k_cmd_set_mac_addr(hw, vif, vif->addr);
3333
3334 if (priv->ap_fw)
3335 mwl8k_cmd_set_new_stn_add_self(hw, vif);
3336
3337 priv->macids_used |= 1 << mwl8k_vif->macid;
3338 list_add_tail(&mwl8k_vif->list, &priv->vif_list);
2549 3339
2550 return 0; 3340 return 0;
2551} 3341}
2552 3342
2553static void mwl8k_remove_interface(struct ieee80211_hw *hw, 3343static void mwl8k_remove_interface(struct ieee80211_hw *hw,
2554 struct ieee80211_if_init_conf *conf) 3344 struct ieee80211_vif *vif)
2555{ 3345{
2556 struct mwl8k_priv *priv = hw->priv; 3346 struct mwl8k_priv *priv = hw->priv;
3347 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
2557 3348
2558 if (priv->vif == NULL) 3349 if (priv->ap_fw)
2559 return; 3350 mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
3351
3352 mwl8k_cmd_set_mac_addr(hw, vif, "\x00\x00\x00\x00\x00\x00");
2560 3353
2561 priv->vif = NULL; 3354 priv->macids_used &= ~(1 << mwl8k_vif->macid);
3355 list_del(&mwl8k_vif->list);
2562} 3356}
2563 3357
2564static int mwl8k_config(struct ieee80211_hw *hw, u32 changed) 3358static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
@@ -2568,8 +3362,7 @@ static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2568 int rc; 3362 int rc;
2569 3363
2570 if (conf->flags & IEEE80211_CONF_IDLE) { 3364 if (conf->flags & IEEE80211_CONF_IDLE) {
2571 mwl8k_cmd_802_11_radio_disable(hw); 3365 mwl8k_cmd_radio_disable(hw);
2572 priv->current_channel = NULL;
2573 return 0; 3366 return 0;
2574 } 3367 }
2575 3368
@@ -2577,24 +3370,27 @@ static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
2577 if (rc) 3370 if (rc)
2578 return rc; 3371 return rc;
2579 3372
2580 rc = mwl8k_cmd_802_11_radio_enable(hw); 3373 rc = mwl8k_cmd_radio_enable(hw);
2581 if (rc) 3374 if (rc)
2582 goto out; 3375 goto out;
2583 3376
2584 rc = mwl8k_cmd_set_rf_channel(hw, conf->channel); 3377 rc = mwl8k_cmd_set_rf_channel(hw, conf);
2585 if (rc) 3378 if (rc)
2586 goto out; 3379 goto out;
2587 3380
2588 priv->current_channel = conf->channel;
2589
2590 if (conf->power_level > 18) 3381 if (conf->power_level > 18)
2591 conf->power_level = 18; 3382 conf->power_level = 18;
2592 rc = mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level); 3383 rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
2593 if (rc) 3384 if (rc)
2594 goto out; 3385 goto out;
2595 3386
2596 if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7)) 3387 if (priv->ap_fw) {
2597 rc = -EINVAL; 3388 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
3389 if (!rc)
3390 rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
3391 } else {
3392 rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
3393 }
2598 3394
2599out: 3395out:
2600 mwl8k_fw_unlock(hw); 3396 mwl8k_fw_unlock(hw);
@@ -2602,122 +3398,301 @@ out:
2602 return rc; 3398 return rc;
2603} 3399}
2604 3400
2605static void mwl8k_bss_info_changed(struct ieee80211_hw *hw, 3401static void
2606 struct ieee80211_vif *vif, 3402mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2607 struct ieee80211_bss_conf *info, 3403 struct ieee80211_bss_conf *info, u32 changed)
2608 u32 changed)
2609{ 3404{
2610 struct mwl8k_priv *priv = hw->priv; 3405 struct mwl8k_priv *priv = hw->priv;
2611 struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif); 3406 u32 ap_legacy_rates;
3407 u8 ap_mcs_rates[16];
2612 int rc; 3408 int rc;
2613 3409
2614 if (changed & BSS_CHANGED_BSSID) 3410 if (mwl8k_fw_lock(hw))
2615 memcpy(mwl8k_vif->bssid, info->bssid, ETH_ALEN);
2616
2617 if ((changed & BSS_CHANGED_ASSOC) == 0)
2618 return; 3411 return;
2619 3412
2620 priv->capture_beacon = false; 3413 /*
3414 * No need to capture a beacon if we're no longer associated.
3415 */
3416 if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
3417 priv->capture_beacon = false;
2621 3418
2622 rc = mwl8k_fw_lock(hw); 3419 /*
2623 if (rc) 3420 * Get the AP's legacy and MCS rates.
2624 return; 3421 */
3422 if (vif->bss_conf.assoc) {
3423 struct ieee80211_sta *ap;
2625 3424
2626 if (info->assoc) { 3425 rcu_read_lock();
2627 memcpy(&mwl8k_vif->bss_info, info,
2628 sizeof(struct ieee80211_bss_conf));
2629 3426
2630 /* Install rates */ 3427 ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
2631 rc = mwl8k_update_rateset(hw, vif); 3428 if (ap == NULL) {
2632 if (rc) 3429 rcu_read_unlock();
2633 goto out; 3430 goto out;
3431 }
2634 3432
2635 /* Turn on rate adaptation */ 3433 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ) {
2636 rc = mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE, 3434 ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
2637 MWL8K_UCAST_RATE, NULL); 3435 } else {
3436 ap_legacy_rates =
3437 ap->supp_rates[IEEE80211_BAND_5GHZ] << 5;
3438 }
3439 memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
3440
3441 rcu_read_unlock();
3442 }
3443
3444 if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
3445 rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
2638 if (rc) 3446 if (rc)
2639 goto out; 3447 goto out;
2640 3448
2641 /* Set radio preamble */ 3449 rc = mwl8k_cmd_use_fixed_rate_sta(hw);
2642 rc = mwl8k_set_radio_preamble(hw, info->use_short_preamble);
2643 if (rc) 3450 if (rc)
2644 goto out; 3451 goto out;
3452 }
2645 3453
2646 /* Set slot time */ 3454 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
2647 rc = mwl8k_cmd_set_slot(hw, info->use_short_slot); 3455 rc = mwl8k_set_radio_preamble(hw,
3456 vif->bss_conf.use_short_preamble);
2648 if (rc) 3457 if (rc)
2649 goto out; 3458 goto out;
3459 }
2650 3460
2651 /* Update peer rate info */ 3461 if (changed & BSS_CHANGED_ERP_SLOT) {
2652 rc = mwl8k_cmd_update_sta_db(hw, vif, 3462 rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
2653 MWL8K_STA_DB_MODIFY_ENTRY);
2654 if (rc) 3463 if (rc)
2655 goto out; 3464 goto out;
3465 }
2656 3466
2657 /* Set AID */ 3467 if (vif->bss_conf.assoc &&
2658 rc = mwl8k_cmd_set_aid(hw, vif); 3468 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_ERP_CTS_PROT |
3469 BSS_CHANGED_HT))) {
3470 rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
2659 if (rc) 3471 if (rc)
2660 goto out; 3472 goto out;
3473 }
2661 3474
3475 if (vif->bss_conf.assoc &&
3476 (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
2662 /* 3477 /*
2663 * Finalize the join. Tell rx handler to process 3478 * Finalize the join. Tell rx handler to process
2664 * next beacon from our BSSID. 3479 * next beacon from our BSSID.
2665 */ 3480 */
2666 memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN); 3481 memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
2667 priv->capture_beacon = true; 3482 priv->capture_beacon = true;
2668 } else {
2669 rc = mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
2670 memset(&mwl8k_vif->bss_info, 0,
2671 sizeof(struct ieee80211_bss_conf));
2672 memset(mwl8k_vif->bssid, 0, ETH_ALEN);
2673 } 3483 }
2674 3484
2675out: 3485out:
2676 mwl8k_fw_unlock(hw); 3486 mwl8k_fw_unlock(hw);
2677} 3487}
2678 3488
3489static void
3490mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3491 struct ieee80211_bss_conf *info, u32 changed)
3492{
3493 int rc;
3494
3495 if (mwl8k_fw_lock(hw))
3496 return;
3497
3498 if (changed & BSS_CHANGED_ERP_PREAMBLE) {
3499 rc = mwl8k_set_radio_preamble(hw,
3500 vif->bss_conf.use_short_preamble);
3501 if (rc)
3502 goto out;
3503 }
3504
3505 if (changed & BSS_CHANGED_BASIC_RATES) {
3506 int idx;
3507 int rate;
3508
3509 /*
3510 * Use lowest supported basic rate for multicasts
3511 * and management frames (such as probe responses --
3512 * beacons will always go out at 1 Mb/s).
3513 */
3514 idx = ffs(vif->bss_conf.basic_rates);
3515 if (idx)
3516 idx--;
3517
3518 if (hw->conf.channel->band == IEEE80211_BAND_2GHZ)
3519 rate = mwl8k_rates_24[idx].hw_value;
3520 else
3521 rate = mwl8k_rates_50[idx].hw_value;
3522
3523 mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
3524 }
3525
3526 if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
3527 struct sk_buff *skb;
3528
3529 skb = ieee80211_beacon_get(hw, vif);
3530 if (skb != NULL) {
3531 mwl8k_cmd_set_beacon(hw, vif, skb->data, skb->len);
3532 kfree_skb(skb);
3533 }
3534 }
3535
3536 if (changed & BSS_CHANGED_BEACON_ENABLED)
3537 mwl8k_cmd_bss_start(hw, vif, info->enable_beacon);
3538
3539out:
3540 mwl8k_fw_unlock(hw);
3541}
3542
3543static void
3544mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3545 struct ieee80211_bss_conf *info, u32 changed)
3546{
3547 struct mwl8k_priv *priv = hw->priv;
3548
3549 if (!priv->ap_fw)
3550 mwl8k_bss_info_changed_sta(hw, vif, info, changed);
3551 else
3552 mwl8k_bss_info_changed_ap(hw, vif, info, changed);
3553}
3554
2679static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw, 3555static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
2680 int mc_count, struct dev_addr_list *mclist) 3556 int mc_count, struct dev_addr_list *mclist)
2681{ 3557{
2682 struct mwl8k_cmd_pkt *cmd; 3558 struct mwl8k_cmd_pkt *cmd;
2683 3559
2684 cmd = __mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist); 3560 /*
3561 * Synthesize and return a command packet that programs the
3562 * hardware multicast address filter. At this point we don't
3563 * know whether FIF_ALLMULTI is being requested, but if it is,
3564 * we'll end up throwing this packet away and creating a new
3565 * one in mwl8k_configure_filter().
3566 */
3567 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
2685 3568
2686 return (unsigned long)cmd; 3569 return (unsigned long)cmd;
2687} 3570}
2688 3571
3572static int
3573mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
3574 unsigned int changed_flags,
3575 unsigned int *total_flags)
3576{
3577 struct mwl8k_priv *priv = hw->priv;
3578
3579 /*
3580 * Hardware sniffer mode is mutually exclusive with STA
3581 * operation, so refuse to enable sniffer mode if a STA
3582 * interface is active.
3583 */
3584 if (!list_empty(&priv->vif_list)) {
3585 if (net_ratelimit())
3586 printk(KERN_INFO "%s: not enabling sniffer "
3587 "mode because STA interface is active\n",
3588 wiphy_name(hw->wiphy));
3589 return 0;
3590 }
3591
3592 if (!priv->sniffer_enabled) {
3593 if (mwl8k_cmd_enable_sniffer(hw, 1))
3594 return 0;
3595 priv->sniffer_enabled = true;
3596 }
3597
3598 *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
3599 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
3600 FIF_OTHER_BSS;
3601
3602 return 1;
3603}
3604
3605static struct mwl8k_vif *mwl8k_first_vif(struct mwl8k_priv *priv)
3606{
3607 if (!list_empty(&priv->vif_list))
3608 return list_entry(priv->vif_list.next, struct mwl8k_vif, list);
3609
3610 return NULL;
3611}
3612
2689static void mwl8k_configure_filter(struct ieee80211_hw *hw, 3613static void mwl8k_configure_filter(struct ieee80211_hw *hw,
2690 unsigned int changed_flags, 3614 unsigned int changed_flags,
2691 unsigned int *total_flags, 3615 unsigned int *total_flags,
2692 u64 multicast) 3616 u64 multicast)
2693{ 3617{
2694 struct mwl8k_priv *priv = hw->priv; 3618 struct mwl8k_priv *priv = hw->priv;
2695 struct mwl8k_cmd_pkt *multicast_adr_cmd; 3619 struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
3620
3621 /*
3622 * AP firmware doesn't allow fine-grained control over
3623 * the receive filter.
3624 */
3625 if (priv->ap_fw) {
3626 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
3627 kfree(cmd);
3628 return;
3629 }
3630
3631 /*
3632 * Enable hardware sniffer mode if FIF_CONTROL or
3633 * FIF_OTHER_BSS is requested.
3634 */
3635 if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
3636 mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
3637 kfree(cmd);
3638 return;
3639 }
2696 3640
2697 /* Clear unsupported feature flags */ 3641 /* Clear unsupported feature flags */
2698 *total_flags &= FIF_BCN_PRBRESP_PROMISC; 3642 *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
2699 3643
2700 if (mwl8k_fw_lock(hw)) 3644 if (mwl8k_fw_lock(hw)) {
3645 kfree(cmd);
2701 return; 3646 return;
3647 }
3648
3649 if (priv->sniffer_enabled) {
3650 mwl8k_cmd_enable_sniffer(hw, 0);
3651 priv->sniffer_enabled = false;
3652 }
2702 3653
2703 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) { 3654 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
2704 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) 3655 if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
3656 /*
3657 * Disable the BSS filter.
3658 */
2705 mwl8k_cmd_set_pre_scan(hw); 3659 mwl8k_cmd_set_pre_scan(hw);
2706 else { 3660 } else {
2707 u8 *bssid; 3661 struct mwl8k_vif *mwl8k_vif;
2708 3662 const u8 *bssid;
2709 bssid = "\x00\x00\x00\x00\x00\x00"; 3663
2710 if (priv->vif != NULL) 3664 /*
2711 bssid = MWL8K_VIF(priv->vif)->bssid; 3665 * Enable the BSS filter.
3666 *
3667 * If there is an active STA interface, use that
3668 * interface's BSSID, otherwise use a dummy one
3669 * (where the OUI part needs to be nonzero for
3670 * the BSSID to be accepted by POST_SCAN).
3671 */
3672 mwl8k_vif = mwl8k_first_vif(priv);
3673 if (mwl8k_vif != NULL)
3674 bssid = mwl8k_vif->vif->bss_conf.bssid;
3675 else
3676 bssid = "\x01\x00\x00\x00\x00\x00";
2712 3677
2713 mwl8k_cmd_set_post_scan(hw, bssid); 3678 mwl8k_cmd_set_post_scan(hw, bssid);
2714 } 3679 }
2715 } 3680 }
2716 3681
2717 multicast_adr_cmd = (void *)(unsigned long)multicast; 3682 /*
2718 if (multicast_adr_cmd != NULL) { 3683 * If FIF_ALLMULTI is being requested, throw away the command
2719 mwl8k_post_cmd(hw, multicast_adr_cmd); 3684 * packet that ->prepare_multicast() built and replace it with
2720 kfree(multicast_adr_cmd); 3685 * a command packet that enables reception of all multicast
3686 * packets.
3687 */
3688 if (*total_flags & FIF_ALLMULTI) {
3689 kfree(cmd);
3690 cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
3691 }
3692
3693 if (cmd != NULL) {
3694 mwl8k_post_cmd(hw, cmd);
3695 kfree(cmd);
2721 } 3696 }
2722 3697
2723 mwl8k_fw_unlock(hw); 3698 mwl8k_fw_unlock(hw);
@@ -2725,7 +3700,39 @@ static void mwl8k_configure_filter(struct ieee80211_hw *hw,
2725 3700
2726static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 3701static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2727{ 3702{
2728 return mwl8k_rts_threshold(hw, MWL8K_CMD_SET, value); 3703 return mwl8k_cmd_set_rts_threshold(hw, value);
3704}
3705
3706static int mwl8k_sta_remove(struct ieee80211_hw *hw,
3707 struct ieee80211_vif *vif,
3708 struct ieee80211_sta *sta)
3709{
3710 struct mwl8k_priv *priv = hw->priv;
3711
3712 if (priv->ap_fw)
3713 return mwl8k_cmd_set_new_stn_del(hw, vif, sta->addr);
3714 else
3715 return mwl8k_cmd_update_stadb_del(hw, vif, sta->addr);
3716}
3717
3718static int mwl8k_sta_add(struct ieee80211_hw *hw,
3719 struct ieee80211_vif *vif,
3720 struct ieee80211_sta *sta)
3721{
3722 struct mwl8k_priv *priv = hw->priv;
3723 int ret;
3724
3725 if (!priv->ap_fw) {
3726 ret = mwl8k_cmd_update_stadb_add(hw, vif, sta);
3727 if (ret >= 0) {
3728 MWL8K_STA(sta)->peer_id = ret;
3729 return 0;
3730 }
3731
3732 return ret;
3733 }
3734
3735 return mwl8k_cmd_set_new_stn_add(hw, vif, sta);
2729} 3736}
2730 3737
2731static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue, 3738static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
@@ -2737,14 +3744,14 @@ static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2737 rc = mwl8k_fw_lock(hw); 3744 rc = mwl8k_fw_lock(hw);
2738 if (!rc) { 3745 if (!rc) {
2739 if (!priv->wmm_enabled) 3746 if (!priv->wmm_enabled)
2740 rc = mwl8k_set_wmm(hw, 1); 3747 rc = mwl8k_cmd_set_wmm_mode(hw, 1);
2741 3748
2742 if (!rc) 3749 if (!rc)
2743 rc = mwl8k_set_edca_params(hw, queue, 3750 rc = mwl8k_cmd_set_edca_params(hw, queue,
2744 params->cw_min, 3751 params->cw_min,
2745 params->cw_max, 3752 params->cw_max,
2746 params->aifs, 3753 params->aifs,
2747 params->txop); 3754 params->txop);
2748 3755
2749 mwl8k_fw_unlock(hw); 3756 mwl8k_fw_unlock(hw);
2750 } 3757 }
@@ -2752,28 +3759,26 @@ static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
2752 return rc; 3759 return rc;
2753} 3760}
2754 3761
2755static int mwl8k_get_tx_stats(struct ieee80211_hw *hw, 3762static int mwl8k_get_stats(struct ieee80211_hw *hw,
2756 struct ieee80211_tx_queue_stats *stats) 3763 struct ieee80211_low_level_stats *stats)
2757{ 3764{
2758 struct mwl8k_priv *priv = hw->priv; 3765 return mwl8k_cmd_get_stat(hw, stats);
2759 struct mwl8k_tx_queue *txq;
2760 int index;
2761
2762 spin_lock_bh(&priv->tx_lock);
2763 for (index = 0; index < MWL8K_TX_QUEUES; index++) {
2764 txq = priv->txq + index;
2765 memcpy(&stats[index], &txq->tx_stats,
2766 sizeof(struct ieee80211_tx_queue_stats));
2767 }
2768 spin_unlock_bh(&priv->tx_lock);
2769
2770 return 0;
2771} 3766}
2772 3767
2773static int mwl8k_get_stats(struct ieee80211_hw *hw, 3768static int
2774 struct ieee80211_low_level_stats *stats) 3769mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
3770 enum ieee80211_ampdu_mlme_action action,
3771 struct ieee80211_sta *sta, u16 tid, u16 *ssn)
2775{ 3772{
2776 return mwl8k_cmd_802_11_get_stat(hw, stats); 3773 switch (action) {
3774 case IEEE80211_AMPDU_RX_START:
3775 case IEEE80211_AMPDU_RX_STOP:
3776 if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
3777 return -ENOTSUPP;
3778 return 0;
3779 default:
3780 return -ENOTSUPP;
3781 }
2777} 3782}
2778 3783
2779static const struct ieee80211_ops mwl8k_ops = { 3784static const struct ieee80211_ops mwl8k_ops = {
@@ -2787,41 +3792,77 @@ static const struct ieee80211_ops mwl8k_ops = {
2787 .prepare_multicast = mwl8k_prepare_multicast, 3792 .prepare_multicast = mwl8k_prepare_multicast,
2788 .configure_filter = mwl8k_configure_filter, 3793 .configure_filter = mwl8k_configure_filter,
2789 .set_rts_threshold = mwl8k_set_rts_threshold, 3794 .set_rts_threshold = mwl8k_set_rts_threshold,
3795 .sta_add = mwl8k_sta_add,
3796 .sta_remove = mwl8k_sta_remove,
2790 .conf_tx = mwl8k_conf_tx, 3797 .conf_tx = mwl8k_conf_tx,
2791 .get_tx_stats = mwl8k_get_tx_stats,
2792 .get_stats = mwl8k_get_stats, 3798 .get_stats = mwl8k_get_stats,
3799 .ampdu_action = mwl8k_ampdu_action,
2793}; 3800};
2794 3801
2795static void mwl8k_tx_reclaim_handler(unsigned long data)
2796{
2797 int i;
2798 struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
2799 struct mwl8k_priv *priv = hw->priv;
2800
2801 spin_lock_bh(&priv->tx_lock);
2802 for (i = 0; i < MWL8K_TX_QUEUES; i++)
2803 mwl8k_txq_reclaim(hw, i, 0);
2804
2805 if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
2806 complete(priv->tx_wait);
2807 priv->tx_wait = NULL;
2808 }
2809 spin_unlock_bh(&priv->tx_lock);
2810}
2811
2812static void mwl8k_finalize_join_worker(struct work_struct *work) 3802static void mwl8k_finalize_join_worker(struct work_struct *work)
2813{ 3803{
2814 struct mwl8k_priv *priv = 3804 struct mwl8k_priv *priv =
2815 container_of(work, struct mwl8k_priv, finalize_join_worker); 3805 container_of(work, struct mwl8k_priv, finalize_join_worker);
2816 struct sk_buff *skb = priv->beacon_skb; 3806 struct sk_buff *skb = priv->beacon_skb;
2817 u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period; 3807 struct ieee80211_mgmt *mgmt = (void *)skb->data;
3808 int len = skb->len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
3809 const u8 *tim = cfg80211_find_ie(WLAN_EID_TIM,
3810 mgmt->u.beacon.variable, len);
3811 int dtim_period = 1;
2818 3812
2819 mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim); 3813 if (tim && tim[1] >= 2)
2820 dev_kfree_skb(skb); 3814 dtim_period = tim[3];
3815
3816 mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len, dtim_period);
2821 3817
3818 dev_kfree_skb(skb);
2822 priv->beacon_skb = NULL; 3819 priv->beacon_skb = NULL;
2823} 3820}
2824 3821
3822enum {
3823 MWL8363 = 0,
3824 MWL8687,
3825 MWL8366,
3826};
3827
3828static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
3829 [MWL8363] = {
3830 .part_name = "88w8363",
3831 .helper_image = "mwl8k/helper_8363.fw",
3832 .fw_image = "mwl8k/fmimage_8363.fw",
3833 },
3834 [MWL8687] = {
3835 .part_name = "88w8687",
3836 .helper_image = "mwl8k/helper_8687.fw",
3837 .fw_image = "mwl8k/fmimage_8687.fw",
3838 },
3839 [MWL8366] = {
3840 .part_name = "88w8366",
3841 .helper_image = "mwl8k/helper_8366.fw",
3842 .fw_image = "mwl8k/fmimage_8366.fw",
3843 .ap_rxd_ops = &rxd_8366_ap_ops,
3844 },
3845};
3846
3847MODULE_FIRMWARE("mwl8k/helper_8363.fw");
3848MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
3849MODULE_FIRMWARE("mwl8k/helper_8687.fw");
3850MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
3851MODULE_FIRMWARE("mwl8k/helper_8366.fw");
3852MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
3853
3854static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
3855 { PCI_VDEVICE(MARVELL, 0x2a0a), .driver_data = MWL8363, },
3856 { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
3857 { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
3858 { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
3859 { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
3860 { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
3861 { PCI_VDEVICE(MARVELL, 0x2a43), .driver_data = MWL8366, },
3862 { },
3863};
3864MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
3865
2825static int __devinit mwl8k_probe(struct pci_dev *pdev, 3866static int __devinit mwl8k_probe(struct pci_dev *pdev,
2826 const struct pci_device_id *id) 3867 const struct pci_device_id *id)
2827{ 3868{
@@ -2836,6 +3877,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
2836 printed_version = 1; 3877 printed_version = 1;
2837 } 3878 }
2838 3879
3880
2839 rc = pci_enable_device(pdev); 3881 rc = pci_enable_device(pdev);
2840 if (rc) { 3882 if (rc) {
2841 printk(KERN_ERR "%s: Cannot enable new PCI device\n", 3883 printk(KERN_ERR "%s: Cannot enable new PCI device\n",
@@ -2847,11 +3889,12 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
2847 if (rc) { 3889 if (rc) {
2848 printk(KERN_ERR "%s: Cannot obtain PCI resources\n", 3890 printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
2849 MWL8K_NAME); 3891 MWL8K_NAME);
2850 return rc; 3892 goto err_disable_device;
2851 } 3893 }
2852 3894
2853 pci_set_master(pdev); 3895 pci_set_master(pdev);
2854 3896
3897
2855 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops); 3898 hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
2856 if (hw == NULL) { 3899 if (hw == NULL) {
2857 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME); 3900 printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
@@ -2859,32 +3902,76 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
2859 goto err_free_reg; 3902 goto err_free_reg;
2860 } 3903 }
2861 3904
3905 SET_IEEE80211_DEV(hw, &pdev->dev);
3906 pci_set_drvdata(pdev, hw);
3907
2862 priv = hw->priv; 3908 priv = hw->priv;
2863 priv->hw = hw; 3909 priv->hw = hw;
2864 priv->pdev = pdev; 3910 priv->pdev = pdev;
2865 priv->wmm_enabled = false; 3911 priv->device_info = &mwl8k_info_tbl[id->driver_data];
2866 priv->pending_tx_pkts = 0;
2867 strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
2868 3912
2869 SET_IEEE80211_DEV(hw, &pdev->dev);
2870 pci_set_drvdata(pdev, hw);
2871 3913
3914 priv->sram = pci_iomap(pdev, 0, 0x10000);
3915 if (priv->sram == NULL) {
3916 printk(KERN_ERR "%s: Cannot map device SRAM\n",
3917 wiphy_name(hw->wiphy));
3918 goto err_iounmap;
3919 }
3920
3921 /*
3922 * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
3923 * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
3924 */
2872 priv->regs = pci_iomap(pdev, 1, 0x10000); 3925 priv->regs = pci_iomap(pdev, 1, 0x10000);
2873 if (priv->regs == NULL) { 3926 if (priv->regs == NULL) {
2874 printk(KERN_ERR "%s: Cannot map device memory\n", priv->name); 3927 priv->regs = pci_iomap(pdev, 2, 0x10000);
2875 goto err_iounmap; 3928 if (priv->regs == NULL) {
3929 printk(KERN_ERR "%s: Cannot map device registers\n",
3930 wiphy_name(hw->wiphy));
3931 goto err_iounmap;
3932 }
3933 }
3934
3935
3936 /* Reset firmware and hardware */
3937 mwl8k_hw_reset(priv);
3938
3939 /* Ask userland hotplug daemon for the device firmware */
3940 rc = mwl8k_request_firmware(priv);
3941 if (rc) {
3942 printk(KERN_ERR "%s: Firmware files not found\n",
3943 wiphy_name(hw->wiphy));
3944 goto err_stop_firmware;
2876 } 3945 }
2877 3946
2878 memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels)); 3947 /* Load firmware into hardware */
2879 priv->band.band = IEEE80211_BAND_2GHZ; 3948 rc = mwl8k_load_firmware(hw);
2880 priv->band.channels = priv->channels; 3949 if (rc) {
2881 priv->band.n_channels = ARRAY_SIZE(mwl8k_channels); 3950 printk(KERN_ERR "%s: Cannot start firmware\n",
2882 priv->band.bitrates = priv->rates; 3951 wiphy_name(hw->wiphy));
2883 priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates); 3952 goto err_stop_firmware;
2884 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; 3953 }
3954
3955 /* Reclaim memory once firmware is successfully loaded */
3956 mwl8k_release_firmware(priv);
3957
3958
3959 if (priv->ap_fw) {
3960 priv->rxd_ops = priv->device_info->ap_rxd_ops;
3961 if (priv->rxd_ops == NULL) {
3962 printk(KERN_ERR "%s: Driver does not have AP "
3963 "firmware image support for this hardware\n",
3964 wiphy_name(hw->wiphy));
3965 goto err_stop_firmware;
3966 }
3967 } else {
3968 priv->rxd_ops = &rxd_sta_ops;
3969 }
3970
3971 priv->sniffer_enabled = false;
3972 priv->wmm_enabled = false;
3973 priv->pending_tx_pkts = 0;
2885 3974
2886 BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
2887 memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
2888 3975
2889 /* 3976 /*
2890 * Extra headroom is the size of the required DMA header 3977 * Extra headroom is the size of the required DMA header
@@ -2897,12 +3984,13 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
2897 3984
2898 hw->queues = MWL8K_TX_QUEUES; 3985 hw->queues = MWL8K_TX_QUEUES;
2899 3986
2900 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2901
2902 /* Set rssi and noise values to dBm */ 3987 /* Set rssi and noise values to dBm */
2903 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM; 3988 hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
2904 hw->vif_data_size = sizeof(struct mwl8k_vif); 3989 hw->vif_data_size = sizeof(struct mwl8k_vif);
2905 priv->vif = NULL; 3990 hw->sta_data_size = sizeof(struct mwl8k_sta);
3991
3992 priv->macids_used = 0;
3993 INIT_LIST_HEAD(&priv->vif_list);
2906 3994
2907 /* Set default radio state and preamble */ 3995 /* Set default radio state and preamble */
2908 priv->radio_on = 0; 3996 priv->radio_on = 0;
@@ -2911,34 +3999,31 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
2911 /* Finalize join worker */ 3999 /* Finalize join worker */
2912 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker); 4000 INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
2913 4001
2914 /* TX reclaim tasklet */ 4002 /* TX reclaim and RX tasklets. */
2915 tasklet_init(&priv->tx_reclaim_task, 4003 tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
2916 mwl8k_tx_reclaim_handler, (unsigned long)hw); 4004 tasklet_disable(&priv->poll_tx_task);
2917 tasklet_disable(&priv->tx_reclaim_task); 4005 tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
2918 4006 tasklet_disable(&priv->poll_rx_task);
2919 /* Config workthread */
2920 priv->config_wq = create_singlethread_workqueue("mwl8k_config");
2921 if (priv->config_wq == NULL)
2922 goto err_iounmap;
2923 4007
2924 /* Power management cookie */ 4008 /* Power management cookie */
2925 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma); 4009 priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
2926 if (priv->cookie == NULL) 4010 if (priv->cookie == NULL)
2927 goto err_iounmap; 4011 goto err_stop_firmware;
2928 4012
2929 rc = mwl8k_rxq_init(hw, 0); 4013 rc = mwl8k_rxq_init(hw, 0);
2930 if (rc) 4014 if (rc)
2931 goto err_iounmap; 4015 goto err_free_cookie;
2932 rxq_refill(hw, 0, INT_MAX); 4016 rxq_refill(hw, 0, INT_MAX);
2933 4017
2934 mutex_init(&priv->fw_mutex); 4018 mutex_init(&priv->fw_mutex);
2935 priv->fw_mutex_owner = NULL; 4019 priv->fw_mutex_owner = NULL;
2936 priv->fw_mutex_depth = 0; 4020 priv->fw_mutex_depth = 0;
2937 priv->tx_wait = NULL;
2938 priv->hostcmd_wait = NULL; 4021 priv->hostcmd_wait = NULL;
2939 4022
2940 spin_lock_init(&priv->tx_lock); 4023 spin_lock_init(&priv->tx_lock);
2941 4024
4025 priv->tx_wait = NULL;
4026
2942 for (i = 0; i < MWL8K_TX_QUEUES; i++) { 4027 for (i = 0; i < MWL8K_TX_QUEUES; i++) {
2943 rc = mwl8k_txq_init(hw, i); 4028 rc = mwl8k_txq_init(hw, i);
2944 if (rc) 4029 if (rc)
@@ -2947,56 +4032,59 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
2947 4032
2948 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS); 4033 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
2949 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); 4034 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2950 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL); 4035 iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
4036 priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
2951 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK); 4037 iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
2952 4038
2953 rc = request_irq(priv->pdev->irq, &mwl8k_interrupt, 4039 rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
2954 IRQF_SHARED, MWL8K_NAME, hw); 4040 IRQF_SHARED, MWL8K_NAME, hw);
2955 if (rc) { 4041 if (rc) {
2956 printk(KERN_ERR "%s: failed to register IRQ handler\n", 4042 printk(KERN_ERR "%s: failed to register IRQ handler\n",
2957 priv->name); 4043 wiphy_name(hw->wiphy));
2958 goto err_free_queues; 4044 goto err_free_queues;
2959 } 4045 }
2960 4046
2961 /* Reset firmware and hardware */
2962 mwl8k_hw_reset(priv);
2963
2964 /* Ask userland hotplug daemon for the device firmware */
2965 rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
2966 if (rc) {
2967 printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
2968 goto err_free_irq;
2969 }
2970
2971 /* Load firmware into hardware */
2972 rc = mwl8k_load_firmware(priv);
2973 if (rc) {
2974 printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
2975 goto err_stop_firmware;
2976 }
2977
2978 /* Reclaim memory once firmware is successfully loaded */
2979 mwl8k_release_firmware(priv);
2980
2981 /* 4047 /*
2982 * Temporarily enable interrupts. Initial firmware host 4048 * Temporarily enable interrupts. Initial firmware host
2983 * commands use interrupts and avoids polling. Disable 4049 * commands use interrupts and avoid polling. Disable
2984 * interrupts when done. 4050 * interrupts when done.
2985 */ 4051 */
2986 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); 4052 iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
2987 4053
2988 /* Get config data, mac addrs etc */ 4054 /* Get config data, mac addrs etc */
2989 rc = mwl8k_cmd_get_hw_spec(hw); 4055 if (priv->ap_fw) {
4056 rc = mwl8k_cmd_get_hw_spec_ap(hw);
4057 if (!rc)
4058 rc = mwl8k_cmd_set_hw_spec(hw);
4059 } else {
4060 rc = mwl8k_cmd_get_hw_spec_sta(hw);
4061 }
2990 if (rc) { 4062 if (rc) {
2991 printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name); 4063 printk(KERN_ERR "%s: Cannot initialise firmware\n",
2992 goto err_stop_firmware; 4064 wiphy_name(hw->wiphy));
4065 goto err_free_irq;
2993 } 4066 }
2994 4067
4068 hw->wiphy->interface_modes = 0;
4069 if (priv->ap_macids_supported)
4070 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_AP);
4071 if (priv->sta_macids_supported)
4072 hw->wiphy->interface_modes |= BIT(NL80211_IFTYPE_STATION);
4073
4074
2995 /* Turn radio off */ 4075 /* Turn radio off */
2996 rc = mwl8k_cmd_802_11_radio_disable(hw); 4076 rc = mwl8k_cmd_radio_disable(hw);
2997 if (rc) { 4077 if (rc) {
2998 printk(KERN_ERR "%s: Cannot disable\n", priv->name); 4078 printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
2999 goto err_stop_firmware; 4079 goto err_free_irq;
4080 }
4081
4082 /* Clear MAC address */
4083 rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00");
4084 if (rc) {
4085 printk(KERN_ERR "%s: Cannot clear MAC address\n",
4086 wiphy_name(hw->wiphy));
4087 goto err_free_irq;
3000 } 4088 }
3001 4089
3002 /* Disable interrupts */ 4090 /* Disable interrupts */
@@ -3005,22 +4093,20 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev,
3005 4093
3006 rc = ieee80211_register_hw(hw); 4094 rc = ieee80211_register_hw(hw);
3007 if (rc) { 4095 if (rc) {
3008 printk(KERN_ERR "%s: Cannot register device\n", priv->name); 4096 printk(KERN_ERR "%s: Cannot register device\n",
3009 goto err_stop_firmware; 4097 wiphy_name(hw->wiphy));
4098 goto err_free_queues;
3010 } 4099 }
3011 4100
3012 printk(KERN_INFO "%s: 88w%u v%d, %pM, firmware version %u.%u.%u.%u\n", 4101 printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
3013 wiphy_name(hw->wiphy), priv->part_num, priv->hw_rev, 4102 wiphy_name(hw->wiphy), priv->device_info->part_name,
3014 hw->wiphy->perm_addr, 4103 priv->hw_rev, hw->wiphy->perm_addr,
4104 priv->ap_fw ? "AP" : "STA",
3015 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff, 4105 (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
3016 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff); 4106 (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
3017 4107
3018 return 0; 4108 return 0;
3019 4109
3020err_stop_firmware:
3021 mwl8k_hw_reset(priv);
3022 mwl8k_release_firmware(priv);
3023
3024err_free_irq: 4110err_free_irq:
3025 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK); 4111 iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
3026 free_irq(priv->pdev->irq, hw); 4112 free_irq(priv->pdev->irq, hw);
@@ -3030,22 +4116,29 @@ err_free_queues:
3030 mwl8k_txq_deinit(hw, i); 4116 mwl8k_txq_deinit(hw, i);
3031 mwl8k_rxq_deinit(hw, 0); 4117 mwl8k_rxq_deinit(hw, 0);
3032 4118
3033err_iounmap: 4119err_free_cookie:
3034 if (priv->cookie != NULL) 4120 if (priv->cookie != NULL)
3035 pci_free_consistent(priv->pdev, 4, 4121 pci_free_consistent(priv->pdev, 4,
3036 priv->cookie, priv->cookie_dma); 4122 priv->cookie, priv->cookie_dma);
3037 4123
4124err_stop_firmware:
4125 mwl8k_hw_reset(priv);
4126 mwl8k_release_firmware(priv);
4127
4128err_iounmap:
3038 if (priv->regs != NULL) 4129 if (priv->regs != NULL)
3039 pci_iounmap(pdev, priv->regs); 4130 pci_iounmap(pdev, priv->regs);
3040 4131
3041 if (priv->config_wq != NULL) 4132 if (priv->sram != NULL)
3042 destroy_workqueue(priv->config_wq); 4133 pci_iounmap(pdev, priv->sram);
3043 4134
3044 pci_set_drvdata(pdev, NULL); 4135 pci_set_drvdata(pdev, NULL);
3045 ieee80211_free_hw(hw); 4136 ieee80211_free_hw(hw);
3046 4137
3047err_free_reg: 4138err_free_reg:
3048 pci_release_regions(pdev); 4139 pci_release_regions(pdev);
4140
4141err_disable_device:
3049 pci_disable_device(pdev); 4142 pci_disable_device(pdev);
3050 4143
3051 return rc; 4144 return rc;
@@ -3070,28 +4163,26 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev)
3070 4163
3071 ieee80211_unregister_hw(hw); 4164 ieee80211_unregister_hw(hw);
3072 4165
3073 /* Remove tx reclaim tasklet */ 4166 /* Remove TX reclaim and RX tasklets. */
3074 tasklet_kill(&priv->tx_reclaim_task); 4167 tasklet_kill(&priv->poll_tx_task);
3075 4168 tasklet_kill(&priv->poll_rx_task);
3076 /* Stop config thread */
3077 destroy_workqueue(priv->config_wq);
3078 4169
3079 /* Stop hardware */ 4170 /* Stop hardware */
3080 mwl8k_hw_reset(priv); 4171 mwl8k_hw_reset(priv);
3081 4172
3082 /* Return all skbs to mac80211 */ 4173 /* Return all skbs to mac80211 */
3083 for (i = 0; i < MWL8K_TX_QUEUES; i++) 4174 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3084 mwl8k_txq_reclaim(hw, i, 1); 4175 mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
3085 4176
3086 for (i = 0; i < MWL8K_TX_QUEUES; i++) 4177 for (i = 0; i < MWL8K_TX_QUEUES; i++)
3087 mwl8k_txq_deinit(hw, i); 4178 mwl8k_txq_deinit(hw, i);
3088 4179
3089 mwl8k_rxq_deinit(hw, 0); 4180 mwl8k_rxq_deinit(hw, 0);
3090 4181
3091 pci_free_consistent(priv->pdev, 4, 4182 pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
3092 priv->cookie, priv->cookie_dma);
3093 4183
3094 pci_iounmap(pdev, priv->regs); 4184 pci_iounmap(pdev, priv->regs);
4185 pci_iounmap(pdev, priv->sram);
3095 pci_set_drvdata(pdev, NULL); 4186 pci_set_drvdata(pdev, NULL);
3096 ieee80211_free_hw(hw); 4187 ieee80211_free_hw(hw);
3097 pci_release_regions(pdev); 4188 pci_release_regions(pdev);
@@ -3100,7 +4191,7 @@ static void __devexit mwl8k_remove(struct pci_dev *pdev)
3100 4191
3101static struct pci_driver mwl8k_driver = { 4192static struct pci_driver mwl8k_driver = {
3102 .name = MWL8K_NAME, 4193 .name = MWL8K_NAME,
3103 .id_table = mwl8k_table, 4194 .id_table = mwl8k_pci_id_table,
3104 .probe = mwl8k_probe, 4195 .probe = mwl8k_probe,
3105 .remove = __devexit_p(mwl8k_remove), 4196 .remove = __devexit_p(mwl8k_remove),
3106 .shutdown = __devexit_p(mwl8k_shutdown), 4197 .shutdown = __devexit_p(mwl8k_shutdown),
@@ -3118,3 +4209,8 @@ static void __exit mwl8k_exit(void)
3118 4209
3119module_init(mwl8k_init); 4210module_init(mwl8k_init);
3120module_exit(mwl8k_exit); 4211module_exit(mwl8k_exit);
4212
4213MODULE_DESCRIPTION(MWL8K_DESC);
4214MODULE_VERSION(MWL8K_VERSION);
4215MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
4216MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/netwave_cs.c b/drivers/net/wireless/netwave_cs.c
deleted file mode 100644
index 9498b46c99a4..000000000000
--- a/drivers/net/wireless/netwave_cs.c
+++ /dev/null
@@ -1,1389 +0,0 @@
1/*********************************************************************
2 *
3 * Filename: netwave_cs.c
4 * Version: 0.4.1
5 * Description: Netwave AirSurfer Wireless LAN PC Card driver
6 * Status: Experimental.
7 * Authors: John Markus Bjørndalen <johnm@cs.uit.no>
8 * Dag Brattli <dagb@cs.uit.no>
9 * David Hinds <dahinds@users.sourceforge.net>
10 * Created at: A long time ago!
11 * Modified at: Mon Nov 10 11:54:37 1997
12 * Modified by: Dag Brattli <dagb@cs.uit.no>
13 *
14 * Copyright (c) 1997 University of Tromsø, Norway
15 *
16 * Revision History:
17 *
18 * 08-Nov-97 15:14:47 John Markus Bjørndalen <johnm@cs.uit.no>
19 * - Fixed some bugs in netwave_rx and cleaned it up a bit.
20 * (One of the bugs would have destroyed packets when receiving
21 * multiple packets per interrupt).
22 * - Cleaned up parts of newave_hw_xmit.
23 * - A few general cleanups.
24 * 24-Oct-97 13:17:36 Dag Brattli <dagb@cs.uit.no>
25 * - Fixed netwave_rx receive function (got updated docs)
26 * Others:
27 * - Changed name from xircnw to netwave, take a look at
28 * http://www.netwave-wireless.com
29 * - Some reorganizing of the code
30 * - Removed possible race condition between interrupt handler and transmit
31 * function
32 * - Started to add wireless extensions, but still needs some coding
33 * - Added watchdog for better handling of transmission timeouts
34 * (hopefully this works better)
35 ********************************************************************/
36
37/* To have statistics (just packets sent) define this */
38#undef NETWAVE_STATS
39
40#include <linux/module.h>
41#include <linux/kernel.h>
42#include <linux/init.h>
43#include <linux/types.h>
44#include <linux/fcntl.h>
45#include <linux/interrupt.h>
46#include <linux/ptrace.h>
47#include <linux/ioport.h>
48#include <linux/in.h>
49#include <linux/slab.h>
50#include <linux/string.h>
51#include <linux/timer.h>
52#include <linux/errno.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
55#include <linux/skbuff.h>
56#include <linux/bitops.h>
57#include <linux/wireless.h>
58#include <net/iw_handler.h>
59
60#include <pcmcia/cs_types.h>
61#include <pcmcia/cs.h>
62#include <pcmcia/cistpl.h>
63#include <pcmcia/cisreg.h>
64#include <pcmcia/ds.h>
65#include <pcmcia/mem_op.h>
66
67#include <asm/system.h>
68#include <asm/io.h>
69#include <asm/dma.h>
70
71#define NETWAVE_REGOFF 0x8000
72/* The Netwave IO registers, offsets to iobase */
73#define NETWAVE_REG_COR 0x0
74#define NETWAVE_REG_CCSR 0x2
75#define NETWAVE_REG_ASR 0x4
76#define NETWAVE_REG_IMR 0xa
77#define NETWAVE_REG_PMR 0xc
78#define NETWAVE_REG_IOLOW 0x6
79#define NETWAVE_REG_IOHI 0x7
80#define NETWAVE_REG_IOCONTROL 0x8
81#define NETWAVE_REG_DATA 0xf
82/* The Netwave Extended IO registers, offsets to RamBase */
83#define NETWAVE_EREG_ASCC 0x114
84#define NETWAVE_EREG_RSER 0x120
85#define NETWAVE_EREG_RSERW 0x124
86#define NETWAVE_EREG_TSER 0x130
87#define NETWAVE_EREG_TSERW 0x134
88#define NETWAVE_EREG_CB 0x100
89#define NETWAVE_EREG_SPCQ 0x154
90#define NETWAVE_EREG_SPU 0x155
91#define NETWAVE_EREG_LIF 0x14e
92#define NETWAVE_EREG_ISPLQ 0x156
93#define NETWAVE_EREG_HHC 0x158
94#define NETWAVE_EREG_NI 0x16e
95#define NETWAVE_EREG_MHS 0x16b
96#define NETWAVE_EREG_TDP 0x140
97#define NETWAVE_EREG_RDP 0x150
98#define NETWAVE_EREG_PA 0x160
99#define NETWAVE_EREG_EC 0x180
100#define NETWAVE_EREG_CRBP 0x17a
101#define NETWAVE_EREG_ARW 0x166
102
103/*
104 * Commands used in the extended command buffer
105 * NETWAVE_EREG_CB (0x100-0x10F)
106 */
107#define NETWAVE_CMD_NOP 0x00
108#define NETWAVE_CMD_SRC 0x01
109#define NETWAVE_CMD_STC 0x02
110#define NETWAVE_CMD_AMA 0x03
111#define NETWAVE_CMD_DMA 0x04
112#define NETWAVE_CMD_SAMA 0x05
113#define NETWAVE_CMD_ER 0x06
114#define NETWAVE_CMD_DR 0x07
115#define NETWAVE_CMD_TL 0x08
116#define NETWAVE_CMD_SRP 0x09
117#define NETWAVE_CMD_SSK 0x0a
118#define NETWAVE_CMD_SMD 0x0b
119#define NETWAVE_CMD_SAPD 0x0c
120#define NETWAVE_CMD_SSS 0x11
121/* End of Command marker */
122#define NETWAVE_CMD_EOC 0x00
123
124/* ASR register bits */
125#define NETWAVE_ASR_RXRDY 0x80
126#define NETWAVE_ASR_TXBA 0x01
127
128#define TX_TIMEOUT ((32*HZ)/100)
129
130static const unsigned int imrConfRFU1 = 0x10; /* RFU interrupt mask, keep high */
131static const unsigned int imrConfIENA = 0x02; /* Interrupt enable */
132
133static const unsigned int corConfIENA = 0x01; /* Interrupt enable */
134static const unsigned int corConfLVLREQ = 0x40; /* Keep high */
135
136static const unsigned int rxConfRxEna = 0x80; /* Receive Enable */
137static const unsigned int rxConfMAC = 0x20; /* MAC host receive mode*/
138static const unsigned int rxConfPro = 0x10; /* Promiscuous */
139static const unsigned int rxConfAMP = 0x08; /* Accept Multicast Packets */
140static const unsigned int rxConfBcast = 0x04; /* Accept Broadcast Packets */
141
142static const unsigned int txConfTxEna = 0x80; /* Transmit Enable */
143static const unsigned int txConfMAC = 0x20; /* Host sends MAC mode */
144static const unsigned int txConfEUD = 0x10; /* Enable Uni-Data packets */
145static const unsigned int txConfKey = 0x02; /* Scramble data packets */
146static const unsigned int txConfLoop = 0x01; /* Loopback mode */
147
148/*
149 All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
150 you do not define PCMCIA_DEBUG at all, all the debug code will be
151 left out. If you compile with PCMCIA_DEBUG=0, the debug code will
152 be present but disabled -- but it can then be enabled for specific
153 modules at load time with a 'pc_debug=#' option to insmod.
154*/
155
156#ifdef PCMCIA_DEBUG
157static int pc_debug = PCMCIA_DEBUG;
158module_param(pc_debug, int, 0);
159#define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args)
160static char *version =
161"netwave_cs.c 0.3.0 Thu Jul 17 14:36:02 1997 (John Markus Bjørndalen)\n";
162#else
163#define DEBUG(n, args...)
164#endif
165
166/*====================================================================*/
167
168/* Parameters that can be set with 'insmod' */
169
170/* Choose the domain, default is 0x100 */
171static u_int domain = 0x100;
172
173/* Scramble key, range from 0x0 to 0xffff.
174 * 0x0 is no scrambling.
175 */
176static u_int scramble_key = 0x0;
177
178/* Shared memory speed, in ns. The documentation states that
179 * the card should not be read faster than every 400ns.
180 * This timing should be provided by the HBA. If it becomes a
181 * problem, try setting mem_speed to 400.
182 */
183static int mem_speed;
184
185module_param(domain, int, 0);
186module_param(scramble_key, int, 0);
187module_param(mem_speed, int, 0);
188
189/*====================================================================*/
190
191/* PCMCIA (Card Services) related functions */
192static void netwave_release(struct pcmcia_device *link); /* Card removal */
193static int netwave_pcmcia_config(struct pcmcia_device *arg); /* Runs after card
194 insertion */
195static void netwave_detach(struct pcmcia_device *p_dev); /* Destroy instance */
196
197/* Hardware configuration */
198static void netwave_doreset(unsigned int iobase, u_char __iomem *ramBase);
199static void netwave_reset(struct net_device *dev);
200
201/* Misc device stuff */
202static int netwave_open(struct net_device *dev); /* Open the device */
203static int netwave_close(struct net_device *dev); /* Close the device */
204
205/* Packet transmission and Packet reception */
206static netdev_tx_t netwave_start_xmit( struct sk_buff *skb,
207 struct net_device *dev);
208static int netwave_rx( struct net_device *dev);
209
210/* Interrupt routines */
211static irqreturn_t netwave_interrupt(int irq, void *dev_id);
212static void netwave_watchdog(struct net_device *);
213
214/* Wireless extensions */
215static struct iw_statistics* netwave_get_wireless_stats(struct net_device *dev);
216
217static void set_multicast_list(struct net_device *dev);
218
219/*
220 A struct pcmcia_device structure has fields for most things that are needed
221 to keep track of a socket, but there will usually be some device
222 specific information that also needs to be kept track of. The
223 'priv' pointer in a struct pcmcia_device structure can be used to point to
224 a device-specific private data structure, like this.
225
226 A driver needs to provide a dev_node_t structure for each device
227 on a card. In some cases, there is only one device per card (for
228 example, ethernet cards, modems). In other cases, there may be
229 many actual or logical devices (SCSI adapters, memory cards with
230 multiple partitions). The dev_node_t structures need to be kept
231 in a linked list starting at the 'dev' field of a struct pcmcia_device
232 structure. We allocate them in the card's private data structure,
233 because they generally can't be allocated dynamically.
234*/
235
236static const struct iw_handler_def netwave_handler_def;
237
238#define SIOCGIPSNAP SIOCIWFIRSTPRIV + 1 /* Site Survey Snapshot */
239
240#define MAX_ESA 10
241
242typedef struct net_addr {
243 u_char addr48[6];
244} net_addr;
245
246struct site_survey {
247 u_short length;
248 u_char struct_revision;
249 u_char roaming_state;
250
251 u_char sp_existsFlag;
252 u_char sp_link_quality;
253 u_char sp_max_link_quality;
254 u_char linkQualityGoodFairBoundary;
255 u_char linkQualityFairPoorBoundary;
256 u_char sp_utilization;
257 u_char sp_goodness;
258 u_char sp_hotheadcount;
259 u_char roaming_condition;
260
261 net_addr sp;
262 u_char numAPs;
263 net_addr nearByAccessPoints[MAX_ESA];
264};
265
266typedef struct netwave_private {
267 struct pcmcia_device *p_dev;
268 spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
269 dev_node_t node;
270 u_char __iomem *ramBase;
271 int timeoutCounter;
272 int lastExec;
273 struct timer_list watchdog; /* To avoid blocking state */
274 struct site_survey nss;
275 struct iw_statistics iw_stats; /* Wireless stats */
276} netwave_private;
277
278/*
279 * The Netwave card is little-endian, so won't work for big endian
280 * systems.
281 */
282static inline unsigned short get_uint16(u_char __iomem *staddr)
283{
284 return readw(staddr); /* Return only 16 bits */
285}
286
287static inline short get_int16(u_char __iomem * staddr)
288{
289 return readw(staddr);
290}
291
292/*
293 * Wait until the WOC (Write Operation Complete) bit in the
294 * ASR (Adapter Status Register) is asserted.
295 * This should have aborted if it takes too long time.
296 */
297static inline void wait_WOC(unsigned int iobase)
298{
299 /* Spin lock */
300 while ((inb(iobase + NETWAVE_REG_ASR) & 0x8) != 0x8) ;
301}
302
303static void netwave_snapshot(netwave_private *priv, u_char __iomem *ramBase,
304 unsigned int iobase) {
305 u_short resultBuffer;
306
307 /* if time since last snapshot is > 1 sec. (100 jiffies?) then take
308 * new snapshot, else return cached data. This is the recommended rate.
309 */
310 if ( jiffies - priv->lastExec > 100) {
311 /* Take site survey snapshot */
312 /*printk( KERN_DEBUG "Taking new snapshot. %ld\n", jiffies -
313 priv->lastExec); */
314 wait_WOC(iobase);
315 writeb(NETWAVE_CMD_SSS, ramBase + NETWAVE_EREG_CB + 0);
316 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
317 wait_WOC(iobase);
318
319 /* Get result and copy to cach */
320 resultBuffer = readw(ramBase + NETWAVE_EREG_CRBP);
321 copy_from_pc( &priv->nss, ramBase+resultBuffer,
322 sizeof(struct site_survey));
323 }
324}
325
326/*
327 * Function netwave_get_wireless_stats (dev)
328 *
329 * Wireless extensions statistics
330 *
331 */
332static struct iw_statistics *netwave_get_wireless_stats(struct net_device *dev)
333{
334 unsigned long flags;
335 unsigned int iobase = dev->base_addr;
336 netwave_private *priv = netdev_priv(dev);
337 u_char __iomem *ramBase = priv->ramBase;
338 struct iw_statistics* wstats;
339
340 wstats = &priv->iw_stats;
341
342 spin_lock_irqsave(&priv->spinlock, flags);
343
344 netwave_snapshot( priv, ramBase, iobase);
345
346 wstats->status = priv->nss.roaming_state;
347 wstats->qual.qual = readb( ramBase + NETWAVE_EREG_SPCQ);
348 wstats->qual.level = readb( ramBase + NETWAVE_EREG_ISPLQ);
349 wstats->qual.noise = readb( ramBase + NETWAVE_EREG_SPU) & 0x3f;
350 wstats->discard.nwid = 0L;
351 wstats->discard.code = 0L;
352 wstats->discard.misc = 0L;
353
354 spin_unlock_irqrestore(&priv->spinlock, flags);
355
356 return &priv->iw_stats;
357}
358
359static const struct net_device_ops netwave_netdev_ops = {
360 .ndo_open = netwave_open,
361 .ndo_stop = netwave_close,
362 .ndo_start_xmit = netwave_start_xmit,
363 .ndo_set_multicast_list = set_multicast_list,
364 .ndo_tx_timeout = netwave_watchdog,
365 .ndo_change_mtu = eth_change_mtu,
366 .ndo_set_mac_address = eth_mac_addr,
367 .ndo_validate_addr = eth_validate_addr,
368};
369
370/*
371 * Function netwave_attach (void)
372 *
373 * Creates an "instance" of the driver, allocating local data
374 * structures for one device. The device is registered with Card
375 * Services.
376 *
377 * The dev_link structure is initialized, but we don't actually
378 * configure the card at this point -- we wait until we receive a
379 * card insertion event.
380 */
381static int netwave_probe(struct pcmcia_device *link)
382{
383 struct net_device *dev;
384 netwave_private *priv;
385
386 DEBUG(0, "netwave_attach()\n");
387
388 /* Initialize the struct pcmcia_device structure */
389 dev = alloc_etherdev(sizeof(netwave_private));
390 if (!dev)
391 return -ENOMEM;
392 priv = netdev_priv(dev);
393 priv->p_dev = link;
394 link->priv = dev;
395
396 /* The io structure describes IO port mapping */
397 link->io.NumPorts1 = 16;
398 link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
399 /* link->io.NumPorts2 = 16;
400 link->io.Attributes2 = IO_DATA_PATH_WIDTH_16; */
401 link->io.IOAddrLines = 5;
402
403 /* Interrupt setup */
404 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT;
405 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
406 link->irq.Handler = &netwave_interrupt;
407
408 /* General socket configuration */
409 link->conf.Attributes = CONF_ENABLE_IRQ;
410 link->conf.IntType = INT_MEMORY_AND_IO;
411 link->conf.ConfigIndex = 1;
412
413 /* Netwave private struct init. link/dev/node already taken care of,
414 * other stuff zero'd - Jean II */
415 spin_lock_init(&priv->spinlock);
416
417 /* Netwave specific entries in the device structure */
418 dev->netdev_ops = &netwave_netdev_ops;
419 /* wireless extensions */
420 dev->wireless_handlers = &netwave_handler_def;
421
422 dev->watchdog_timeo = TX_TIMEOUT;
423
424 link->irq.Instance = dev;
425
426 return netwave_pcmcia_config( link);
427} /* netwave_attach */
428
429/*
430 * Function netwave_detach (link)
431 *
432 * This deletes a driver "instance". The device is de-registered
433 * with Card Services. If it has been released, all local data
434 * structures are freed. Otherwise, the structures will be freed
435 * when the device is released.
436 */
437static void netwave_detach(struct pcmcia_device *link)
438{
439 struct net_device *dev = link->priv;
440
441 DEBUG(0, "netwave_detach(0x%p)\n", link);
442
443 netwave_release(link);
444
445 if (link->dev_node)
446 unregister_netdev(dev);
447
448 free_netdev(dev);
449} /* netwave_detach */
450
451/*
452 * Wireless Handler : get protocol name
453 */
454static int netwave_get_name(struct net_device *dev,
455 struct iw_request_info *info,
456 union iwreq_data *wrqu,
457 char *extra)
458{
459 strcpy(wrqu->name, "Netwave");
460 return 0;
461}
462
463/*
464 * Wireless Handler : set Network ID
465 */
466static int netwave_set_nwid(struct net_device *dev,
467 struct iw_request_info *info,
468 union iwreq_data *wrqu,
469 char *extra)
470{
471 unsigned long flags;
472 unsigned int iobase = dev->base_addr;
473 netwave_private *priv = netdev_priv(dev);
474 u_char __iomem *ramBase = priv->ramBase;
475
476 /* Disable interrupts & save flags */
477 spin_lock_irqsave(&priv->spinlock, flags);
478
479 if(!wrqu->nwid.disabled) {
480 domain = wrqu->nwid.value;
481 printk( KERN_DEBUG "Setting domain to 0x%x%02x\n",
482 (domain >> 8) & 0x01, domain & 0xff);
483 wait_WOC(iobase);
484 writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0);
485 writeb( domain & 0xff, ramBase + NETWAVE_EREG_CB + 1);
486 writeb((domain >>8 ) & 0x01,ramBase + NETWAVE_EREG_CB+2);
487 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
488 }
489
490 /* ReEnable interrupts & restore flags */
491 spin_unlock_irqrestore(&priv->spinlock, flags);
492
493 return 0;
494}
495
496/*
497 * Wireless Handler : get Network ID
498 */
499static int netwave_get_nwid(struct net_device *dev,
500 struct iw_request_info *info,
501 union iwreq_data *wrqu,
502 char *extra)
503{
504 wrqu->nwid.value = domain;
505 wrqu->nwid.disabled = 0;
506 wrqu->nwid.fixed = 1;
507 return 0;
508}
509
510/*
511 * Wireless Handler : set scramble key
512 */
513static int netwave_set_scramble(struct net_device *dev,
514 struct iw_request_info *info,
515 union iwreq_data *wrqu,
516 char *key)
517{
518 unsigned long flags;
519 unsigned int iobase = dev->base_addr;
520 netwave_private *priv = netdev_priv(dev);
521 u_char __iomem *ramBase = priv->ramBase;
522
523 /* Disable interrupts & save flags */
524 spin_lock_irqsave(&priv->spinlock, flags);
525
526 scramble_key = (key[0] << 8) | key[1];
527 wait_WOC(iobase);
528 writeb(NETWAVE_CMD_SSK, ramBase + NETWAVE_EREG_CB + 0);
529 writeb(scramble_key & 0xff, ramBase + NETWAVE_EREG_CB + 1);
530 writeb((scramble_key>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
531 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
532
533 /* ReEnable interrupts & restore flags */
534 spin_unlock_irqrestore(&priv->spinlock, flags);
535
536 return 0;
537}
538
539/*
540 * Wireless Handler : get scramble key
541 */
542static int netwave_get_scramble(struct net_device *dev,
543 struct iw_request_info *info,
544 union iwreq_data *wrqu,
545 char *key)
546{
547 key[1] = scramble_key & 0xff;
548 key[0] = (scramble_key>>8) & 0xff;
549 wrqu->encoding.flags = IW_ENCODE_ENABLED;
550 wrqu->encoding.length = 2;
551 return 0;
552}
553
554/*
555 * Wireless Handler : get mode
556 */
557static int netwave_get_mode(struct net_device *dev,
558 struct iw_request_info *info,
559 union iwreq_data *wrqu,
560 char *extra)
561{
562 if(domain & 0x100)
563 wrqu->mode = IW_MODE_INFRA;
564 else
565 wrqu->mode = IW_MODE_ADHOC;
566
567 return 0;
568}
569
570/*
571 * Wireless Handler : get range info
572 */
573static int netwave_get_range(struct net_device *dev,
574 struct iw_request_info *info,
575 union iwreq_data *wrqu,
576 char *extra)
577{
578 struct iw_range *range = (struct iw_range *) extra;
579 int ret = 0;
580
581 /* Set the length (very important for backward compatibility) */
582 wrqu->data.length = sizeof(struct iw_range);
583
584 /* Set all the info we don't care or don't know about to zero */
585 memset(range, 0, sizeof(struct iw_range));
586
587 /* Set the Wireless Extension versions */
588 range->we_version_compiled = WIRELESS_EXT;
589 range->we_version_source = 9; /* Nothing for us in v10 and v11 */
590
591 /* Set information in the range struct */
592 range->throughput = 450 * 1000; /* don't argue on this ! */
593 range->min_nwid = 0x0000;
594 range->max_nwid = 0x01FF;
595
596 range->num_channels = range->num_frequency = 0;
597
598 range->sensitivity = 0x3F;
599 range->max_qual.qual = 255;
600 range->max_qual.level = 255;
601 range->max_qual.noise = 0;
602
603 range->num_bitrates = 1;
604 range->bitrate[0] = 1000000; /* 1 Mb/s */
605
606 range->encoding_size[0] = 2; /* 16 bits scrambling */
607 range->num_encoding_sizes = 1;
608 range->max_encoding_tokens = 1; /* Only one key possible */
609
610 return ret;
611}
612
613/*
614 * Wireless Private Handler : get snapshot
615 */
616static int netwave_get_snap(struct net_device *dev,
617 struct iw_request_info *info,
618 union iwreq_data *wrqu,
619 char *extra)
620{
621 unsigned long flags;
622 unsigned int iobase = dev->base_addr;
623 netwave_private *priv = netdev_priv(dev);
624 u_char __iomem *ramBase = priv->ramBase;
625
626 /* Disable interrupts & save flags */
627 spin_lock_irqsave(&priv->spinlock, flags);
628
629 /* Take snapshot of environment */
630 netwave_snapshot( priv, ramBase, iobase);
631 wrqu->data.length = priv->nss.length;
632 memcpy(extra, (u_char *) &priv->nss, sizeof( struct site_survey));
633
634 priv->lastExec = jiffies;
635
636 /* ReEnable interrupts & restore flags */
637 spin_unlock_irqrestore(&priv->spinlock, flags);
638
639 return(0);
640}
641
642/*
643 * Structures to export the Wireless Handlers
644 * This is the stuff that are treated the wireless extensions (iwconfig)
645 */
646
647static const struct iw_priv_args netwave_private_args[] = {
648/*{ cmd, set_args, get_args, name } */
649 { SIOCGIPSNAP, 0,
650 IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | sizeof(struct site_survey),
651 "getsitesurvey" },
652};
653
654static const iw_handler netwave_handler[] =
655{
656 NULL, /* SIOCSIWNAME */
657 netwave_get_name, /* SIOCGIWNAME */
658 netwave_set_nwid, /* SIOCSIWNWID */
659 netwave_get_nwid, /* SIOCGIWNWID */
660 NULL, /* SIOCSIWFREQ */
661 NULL, /* SIOCGIWFREQ */
662 NULL, /* SIOCSIWMODE */
663 netwave_get_mode, /* SIOCGIWMODE */
664 NULL, /* SIOCSIWSENS */
665 NULL, /* SIOCGIWSENS */
666 NULL, /* SIOCSIWRANGE */
667 netwave_get_range, /* SIOCGIWRANGE */
668 NULL, /* SIOCSIWPRIV */
669 NULL, /* SIOCGIWPRIV */
670 NULL, /* SIOCSIWSTATS */
671 NULL, /* SIOCGIWSTATS */
672 NULL, /* SIOCSIWSPY */
673 NULL, /* SIOCGIWSPY */
674 NULL, /* -- hole -- */
675 NULL, /* -- hole -- */
676 NULL, /* SIOCSIWAP */
677 NULL, /* SIOCGIWAP */
678 NULL, /* -- hole -- */
679 NULL, /* SIOCGIWAPLIST */
680 NULL, /* -- hole -- */
681 NULL, /* -- hole -- */
682 NULL, /* SIOCSIWESSID */
683 NULL, /* SIOCGIWESSID */
684 NULL, /* SIOCSIWNICKN */
685 NULL, /* SIOCGIWNICKN */
686 NULL, /* -- hole -- */
687 NULL, /* -- hole -- */
688 NULL, /* SIOCSIWRATE */
689 NULL, /* SIOCGIWRATE */
690 NULL, /* SIOCSIWRTS */
691 NULL, /* SIOCGIWRTS */
692 NULL, /* SIOCSIWFRAG */
693 NULL, /* SIOCGIWFRAG */
694 NULL, /* SIOCSIWTXPOW */
695 NULL, /* SIOCGIWTXPOW */
696 NULL, /* SIOCSIWRETRY */
697 NULL, /* SIOCGIWRETRY */
698 netwave_set_scramble, /* SIOCSIWENCODE */
699 netwave_get_scramble, /* SIOCGIWENCODE */
700};
701
702static const iw_handler netwave_private_handler[] =
703{
704 NULL, /* SIOCIWFIRSTPRIV */
705 netwave_get_snap, /* SIOCIWFIRSTPRIV + 1 */
706};
707
708static const struct iw_handler_def netwave_handler_def =
709{
710 .num_standard = ARRAY_SIZE(netwave_handler),
711 .num_private = ARRAY_SIZE(netwave_private_handler),
712 .num_private_args = ARRAY_SIZE(netwave_private_args),
713 .standard = (iw_handler *) netwave_handler,
714 .private = (iw_handler *) netwave_private_handler,
715 .private_args = (struct iw_priv_args *) netwave_private_args,
716 .get_wireless_stats = netwave_get_wireless_stats,
717};
718
719/*
720 * Function netwave_pcmcia_config (link)
721 *
722 * netwave_pcmcia_config() is scheduled to run after a CARD_INSERTION
723 * event is received, to configure the PCMCIA socket, and to make the
724 * device available to the system.
725 *
726 */
727
728#define CS_CHECK(fn, ret) \
729do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
730
731static int netwave_pcmcia_config(struct pcmcia_device *link) {
732 struct net_device *dev = link->priv;
733 netwave_private *priv = netdev_priv(dev);
734 int i, j, last_ret, last_fn;
735 win_req_t req;
736 memreq_t mem;
737 u_char __iomem *ramBase = NULL;
738
739 DEBUG(0, "netwave_pcmcia_config(0x%p)\n", link);
740
741 /*
742 * Try allocating IO ports. This tries a few fixed addresses.
743 * If you want, you can also read the card's config table to
744 * pick addresses -- see the serial driver for an example.
745 */
746 for (i = j = 0x0; j < 0x400; j += 0x20) {
747 link->io.BasePort1 = j ^ 0x300;
748 i = pcmcia_request_io(link, &link->io);
749 if (i == 0)
750 break;
751 }
752 if (i != 0) {
753 cs_error(link, RequestIO, i);
754 goto failed;
755 }
756
757 /*
758 * Now allocate an interrupt line. Note that this does not
759 * actually assign a handler to the interrupt.
760 */
761 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
762
763 /*
764 * This actually configures the PCMCIA socket -- setting up
765 * the I/O windows and the interrupt mapping.
766 */
767 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
768
769 /*
770 * Allocate a 32K memory window. Note that the struct pcmcia_device
771 * structure provides space for one window handle -- if your
772 * device needs several windows, you'll need to keep track of
773 * the handles in your private data structure, dev->priv.
774 */
775 DEBUG(1, "Setting mem speed of %d\n", mem_speed);
776
777 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_CM|WIN_ENABLE;
778 req.Base = 0; req.Size = 0x8000;
779 req.AccessSpeed = mem_speed;
780 CS_CHECK(RequestWindow, pcmcia_request_window(&link, &req, &link->win));
781 mem.CardOffset = 0x20000; mem.Page = 0;
782 CS_CHECK(MapMemPage, pcmcia_map_mem_page(link->win, &mem));
783
784 /* Store base address of the common window frame */
785 ramBase = ioremap(req.Base, 0x8000);
786 priv->ramBase = ramBase;
787
788 dev->irq = link->irq.AssignedIRQ;
789 dev->base_addr = link->io.BasePort1;
790 SET_NETDEV_DEV(dev, &handle_to_dev(link));
791
792 if (register_netdev(dev) != 0) {
793 printk(KERN_DEBUG "netwave_cs: register_netdev() failed\n");
794 goto failed;
795 }
796
797 strcpy(priv->node.dev_name, dev->name);
798 link->dev_node = &priv->node;
799
800 /* Reset card before reading physical address */
801 netwave_doreset(dev->base_addr, ramBase);
802
803 /* Read the ethernet address and fill in the Netwave registers. */
804 for (i = 0; i < 6; i++)
805 dev->dev_addr[i] = readb(ramBase + NETWAVE_EREG_PA + i);
806
807 printk(KERN_INFO "%s: Netwave: port %#3lx, irq %d, mem %lx, "
808 "id %c%c, hw_addr %pM\n",
809 dev->name, dev->base_addr, dev->irq,
810 (u_long) ramBase,
811 (int) readb(ramBase+NETWAVE_EREG_NI),
812 (int) readb(ramBase+NETWAVE_EREG_NI+1),
813 dev->dev_addr);
814
815 /* get revision words */
816 printk(KERN_DEBUG "Netwave_reset: revision %04x %04x\n",
817 get_uint16(ramBase + NETWAVE_EREG_ARW),
818 get_uint16(ramBase + NETWAVE_EREG_ARW+2));
819 return 0;
820
821cs_failed:
822 cs_error(link, last_fn, last_ret);
823failed:
824 netwave_release(link);
825 return -ENODEV;
826} /* netwave_pcmcia_config */
827
828/*
829 * Function netwave_release (arg)
830 *
831 * After a card is removed, netwave_release() will unregister the net
832 * device, and release the PCMCIA configuration. If the device is
833 * still open, this will be postponed until it is closed.
834 */
835static void netwave_release(struct pcmcia_device *link)
836{
837 struct net_device *dev = link->priv;
838 netwave_private *priv = netdev_priv(dev);
839
840 DEBUG(0, "netwave_release(0x%p)\n", link);
841
842 pcmcia_disable_device(link);
843 if (link->win)
844 iounmap(priv->ramBase);
845}
846
847static int netwave_suspend(struct pcmcia_device *link)
848{
849 struct net_device *dev = link->priv;
850
851 if (link->open)
852 netif_device_detach(dev);
853
854 return 0;
855}
856
857static int netwave_resume(struct pcmcia_device *link)
858{
859 struct net_device *dev = link->priv;
860
861 if (link->open) {
862 netwave_reset(dev);
863 netif_device_attach(dev);
864 }
865
866 return 0;
867}
868
869
870/*
871 * Function netwave_doreset (ioBase, ramBase)
872 *
873 * Proper hardware reset of the card.
874 */
875static void netwave_doreset(unsigned int ioBase, u_char __iomem *ramBase)
876{
877 /* Reset card */
878 wait_WOC(ioBase);
879 outb(0x80, ioBase + NETWAVE_REG_PMR);
880 writeb(0x08, ramBase + NETWAVE_EREG_ASCC); /* Bit 3 is WOC */
881 outb(0x0, ioBase + NETWAVE_REG_PMR); /* release reset */
882}
883
884/*
885 * Function netwave_reset (dev)
886 *
887 * Reset and restore all of the netwave registers
888 */
889static void netwave_reset(struct net_device *dev) {
890 /* u_char state; */
891 netwave_private *priv = netdev_priv(dev);
892 u_char __iomem *ramBase = priv->ramBase;
893 unsigned int iobase = dev->base_addr;
894
895 DEBUG(0, "netwave_reset: Done with hardware reset\n");
896
897 priv->timeoutCounter = 0;
898
899 /* Reset card */
900 netwave_doreset(iobase, ramBase);
901 printk(KERN_DEBUG "netwave_reset: Done with hardware reset\n");
902
903 /* Write a NOP to check the card */
904 wait_WOC(iobase);
905 writeb(NETWAVE_CMD_NOP, ramBase + NETWAVE_EREG_CB + 0);
906 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
907
908 /* Set receive conf */
909 wait_WOC(iobase);
910 writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0);
911 writeb(rxConfRxEna + rxConfBcast, ramBase + NETWAVE_EREG_CB + 1);
912 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
913
914 /* Set transmit conf */
915 wait_WOC(iobase);
916 writeb(NETWAVE_CMD_STC, ramBase + NETWAVE_EREG_CB + 0);
917 writeb(txConfTxEna, ramBase + NETWAVE_EREG_CB + 1);
918 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
919
920 /* Now set the MU Domain */
921 printk(KERN_DEBUG "Setting domain to 0x%x%02x\n", (domain >> 8) & 0x01, domain & 0xff);
922 wait_WOC(iobase);
923 writeb(NETWAVE_CMD_SMD, ramBase + NETWAVE_EREG_CB + 0);
924 writeb(domain & 0xff, ramBase + NETWAVE_EREG_CB + 1);
925 writeb((domain>>8) & 0x01, ramBase + NETWAVE_EREG_CB + 2);
926 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
927
928 /* Set scramble key */
929 printk(KERN_DEBUG "Setting scramble key to 0x%x\n", scramble_key);
930 wait_WOC(iobase);
931 writeb(NETWAVE_CMD_SSK, ramBase + NETWAVE_EREG_CB + 0);
932 writeb(scramble_key & 0xff, ramBase + NETWAVE_EREG_CB + 1);
933 writeb((scramble_key>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
934 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
935
936 /* Enable interrupts, bit 4 high to keep unused
937 * source from interrupting us, bit 2 high to
938 * set interrupt enable, 567 to enable TxDN,
939 * RxErr and RxRdy
940 */
941 wait_WOC(iobase);
942 outb(imrConfIENA+imrConfRFU1, iobase + NETWAVE_REG_IMR);
943
944 /* Hent 4 bytes fra 0x170. Skal vaere 0a,29,88,36
945 * waitWOC
946 * skriv 80 til d000:3688
947 * sjekk om det ble 80
948 */
949
950 /* Enable Receiver */
951 wait_WOC(iobase);
952 writeb(NETWAVE_CMD_ER, ramBase + NETWAVE_EREG_CB + 0);
953 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
954
955 /* Set the IENA bit in COR */
956 wait_WOC(iobase);
957 outb(corConfIENA + corConfLVLREQ, iobase + NETWAVE_REG_COR);
958}
959
960/*
961 * Function netwave_hw_xmit (data, len, dev)
962 */
963static int netwave_hw_xmit(unsigned char* data, int len,
964 struct net_device* dev) {
965 unsigned long flags;
966 unsigned int TxFreeList,
967 curBuff,
968 MaxData,
969 DataOffset;
970 int tmpcount;
971
972 netwave_private *priv = netdev_priv(dev);
973 u_char __iomem * ramBase = priv->ramBase;
974 unsigned int iobase = dev->base_addr;
975
976 /* Disable interrupts & save flags */
977 spin_lock_irqsave(&priv->spinlock, flags);
978
979 /* Check if there are transmit buffers available */
980 wait_WOC(iobase);
981 if ((inb(iobase+NETWAVE_REG_ASR) & NETWAVE_ASR_TXBA) == 0) {
982 /* No buffers available */
983 printk(KERN_DEBUG "netwave_hw_xmit: %s - no xmit buffers available.\n",
984 dev->name);
985 spin_unlock_irqrestore(&priv->spinlock, flags);
986 return 1;
987 }
988
989 dev->stats.tx_bytes += len;
990
991 DEBUG(3, "Transmitting with SPCQ %x SPU %x LIF %x ISPLQ %x\n",
992 readb(ramBase + NETWAVE_EREG_SPCQ),
993 readb(ramBase + NETWAVE_EREG_SPU),
994 readb(ramBase + NETWAVE_EREG_LIF),
995 readb(ramBase + NETWAVE_EREG_ISPLQ));
996
997 /* Now try to insert it into the adapters free memory */
998 wait_WOC(iobase);
999 TxFreeList = get_uint16(ramBase + NETWAVE_EREG_TDP);
1000 MaxData = get_uint16(ramBase + NETWAVE_EREG_TDP+2);
1001 DataOffset = get_uint16(ramBase + NETWAVE_EREG_TDP+4);
1002
1003 DEBUG(3, "TxFreeList %x, MaxData %x, DataOffset %x\n",
1004 TxFreeList, MaxData, DataOffset);
1005
1006 /* Copy packet to the adapter fragment buffers */
1007 curBuff = TxFreeList;
1008 tmpcount = 0;
1009 while (tmpcount < len) {
1010 int tmplen = len - tmpcount;
1011 copy_to_pc(ramBase + curBuff + DataOffset, data + tmpcount,
1012 (tmplen < MaxData) ? tmplen : MaxData);
1013 tmpcount += MaxData;
1014
1015 /* Advance to next buffer */
1016 curBuff = get_uint16(ramBase + curBuff);
1017 }
1018
1019 /* Now issue transmit list */
1020 wait_WOC(iobase);
1021 writeb(NETWAVE_CMD_TL, ramBase + NETWAVE_EREG_CB + 0);
1022 writeb(len & 0xff, ramBase + NETWAVE_EREG_CB + 1);
1023 writeb((len>>8) & 0xff, ramBase + NETWAVE_EREG_CB + 2);
1024 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 3);
1025
1026 spin_unlock_irqrestore(&priv->spinlock, flags);
1027 return 0;
1028}
1029
1030static netdev_tx_t netwave_start_xmit(struct sk_buff *skb,
1031 struct net_device *dev) {
1032 /* This flag indicate that the hardware can't perform a transmission.
1033 * Theoritically, NET3 check it before sending a packet to the driver,
1034 * but in fact it never do that and pool continuously.
1035 * As the watchdog will abort too long transmissions, we are quite safe...
1036 */
1037
1038 netif_stop_queue(dev);
1039
1040 {
1041 short length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1042 unsigned char* buf = skb->data;
1043
1044 if (netwave_hw_xmit( buf, length, dev) == 1) {
1045 /* Some error, let's make them call us another time? */
1046 netif_start_queue(dev);
1047 }
1048 dev->trans_start = jiffies;
1049 }
1050 dev_kfree_skb(skb);
1051
1052 return NETDEV_TX_OK;
1053} /* netwave_start_xmit */
1054
1055/*
1056 * Function netwave_interrupt (irq, dev_id)
1057 *
1058 * This function is the interrupt handler for the Netwave card. This
1059 * routine will be called whenever:
1060 * 1. A packet is received.
1061 * 2. A packet has successfully been transferred and the unit is
1062 * ready to transmit another packet.
1063 * 3. A command has completed execution.
1064 */
1065static irqreturn_t netwave_interrupt(int irq, void* dev_id)
1066{
1067 unsigned int iobase;
1068 u_char __iomem *ramBase;
1069 struct net_device *dev = (struct net_device *)dev_id;
1070 struct netwave_private *priv = netdev_priv(dev);
1071 struct pcmcia_device *link = priv->p_dev;
1072 int i;
1073
1074 if (!netif_device_present(dev))
1075 return IRQ_NONE;
1076
1077 iobase = dev->base_addr;
1078 ramBase = priv->ramBase;
1079
1080 /* Now find what caused the interrupt, check while interrupts ready */
1081 for (i = 0; i < 10; i++) {
1082 u_char status;
1083
1084 wait_WOC(iobase);
1085 if (!(inb(iobase+NETWAVE_REG_CCSR) & 0x02))
1086 break; /* None of the interrupt sources asserted (normal exit) */
1087
1088 status = inb(iobase + NETWAVE_REG_ASR);
1089
1090 if (!pcmcia_dev_present(link)) {
1091 DEBUG(1, "netwave_interrupt: Interrupt with status 0x%x "
1092 "from removed or suspended card!\n", status);
1093 break;
1094 }
1095
1096 /* RxRdy */
1097 if (status & 0x80) {
1098 netwave_rx(dev);
1099 /* wait_WOC(iobase); */
1100 /* RxRdy cannot be reset directly by the host */
1101 }
1102 /* RxErr */
1103 if (status & 0x40) {
1104 u_char rser;
1105
1106 rser = readb(ramBase + NETWAVE_EREG_RSER);
1107
1108 if (rser & 0x04) {
1109 ++dev->stats.rx_dropped;
1110 ++dev->stats.rx_crc_errors;
1111 }
1112 if (rser & 0x02)
1113 ++dev->stats.rx_frame_errors;
1114
1115 /* Clear the RxErr bit in RSER. RSER+4 is the
1116 * write part. Also clear the RxCRC (0x04) and
1117 * RxBig (0x02) bits if present */
1118 wait_WOC(iobase);
1119 writeb(0x40 | (rser & 0x06), ramBase + NETWAVE_EREG_RSER + 4);
1120
1121 /* Write bit 6 high to ASCC to clear RxErr in ASR,
1122 * WOC must be set first!
1123 */
1124 wait_WOC(iobase);
1125 writeb(0x40, ramBase + NETWAVE_EREG_ASCC);
1126
1127 /* Remember to count up dev->stats on error packets */
1128 ++dev->stats.rx_errors;
1129 }
1130 /* TxDN */
1131 if (status & 0x20) {
1132 int txStatus;
1133
1134 txStatus = readb(ramBase + NETWAVE_EREG_TSER);
1135 DEBUG(3, "Transmit done. TSER = %x id %x\n",
1136 txStatus, readb(ramBase + NETWAVE_EREG_TSER + 1));
1137
1138 if (txStatus & 0x20) {
1139 /* Transmitting was okay, clear bits */
1140 wait_WOC(iobase);
1141 writeb(0x2f, ramBase + NETWAVE_EREG_TSER + 4);
1142 ++dev->stats.tx_packets;
1143 }
1144
1145 if (txStatus & 0xd0) {
1146 if (txStatus & 0x80) {
1147 ++dev->stats.collisions; /* Because of /proc/net/dev*/
1148 /* ++dev->stats.tx_aborted_errors; */
1149 /* printk("Collision. %ld\n", jiffies - dev->trans_start); */
1150 }
1151 if (txStatus & 0x40)
1152 ++dev->stats.tx_carrier_errors;
1153 /* 0x80 TxGU Transmit giveup - nine times and no luck
1154 * 0x40 TxNOAP No access point. Discarded packet.
1155 * 0x10 TxErr Transmit error. Always set when
1156 * TxGU and TxNOAP is set. (Those are the only ones
1157 * to set TxErr).
1158 */
1159 DEBUG(3, "netwave_interrupt: TxDN with error status %x\n",
1160 txStatus);
1161
1162 /* Clear out TxGU, TxNOAP, TxErr and TxTrys */
1163 wait_WOC(iobase);
1164 writeb(0xdf & txStatus, ramBase+NETWAVE_EREG_TSER+4);
1165 ++dev->stats.tx_errors;
1166 }
1167 DEBUG(3, "New status is TSER %x ASR %x\n",
1168 readb(ramBase + NETWAVE_EREG_TSER),
1169 inb(iobase + NETWAVE_REG_ASR));
1170
1171 netif_wake_queue(dev);
1172 }
1173 /* TxBA, this would trigger on all error packets received */
1174 /* if (status & 0x01) {
1175 DEBUG(4, "Transmit buffers available, %x\n", status);
1176 }
1177 */
1178 }
1179 /* Handled if we looped at least one time - Jean II */
1180 return IRQ_RETVAL(i);
1181} /* netwave_interrupt */
1182
1183/*
1184 * Function netwave_watchdog (a)
1185 *
1186 * Watchdog : when we start a transmission, we set a timer in the
1187 * kernel. If the transmission complete, this timer is disabled. If
1188 * it expire, we reset the card.
1189 *
1190 */
1191static void netwave_watchdog(struct net_device *dev) {
1192
1193 DEBUG(1, "%s: netwave_watchdog: watchdog timer expired\n", dev->name);
1194 netwave_reset(dev);
1195 dev->trans_start = jiffies;
1196 netif_wake_queue(dev);
1197} /* netwave_watchdog */
1198
1199static int netwave_rx(struct net_device *dev)
1200{
1201 netwave_private *priv = netdev_priv(dev);
1202 u_char __iomem *ramBase = priv->ramBase;
1203 unsigned int iobase = dev->base_addr;
1204 u_char rxStatus;
1205 struct sk_buff *skb = NULL;
1206 unsigned int curBuffer,
1207 rcvList;
1208 int rcvLen;
1209 int tmpcount = 0;
1210 int dataCount, dataOffset;
1211 int i;
1212 u_char *ptr;
1213
1214 DEBUG(3, "xinw_rx: Receiving ... \n");
1215
1216 /* Receive max 10 packets for now. */
1217 for (i = 0; i < 10; i++) {
1218 /* Any packets? */
1219 wait_WOC(iobase);
1220 rxStatus = readb(ramBase + NETWAVE_EREG_RSER);
1221 if ( !( rxStatus & 0x80)) /* No more packets */
1222 break;
1223
1224 /* Check if multicast/broadcast or other */
1225 /* multicast = (rxStatus & 0x20); */
1226
1227 /* The receive list pointer and length of the packet */
1228 wait_WOC(iobase);
1229 rcvLen = get_int16( ramBase + NETWAVE_EREG_RDP);
1230 rcvList = get_uint16( ramBase + NETWAVE_EREG_RDP + 2);
1231
1232 if (rcvLen < 0) {
1233 printk(KERN_DEBUG "netwave_rx: Receive packet with len %d\n",
1234 rcvLen);
1235 return 0;
1236 }
1237
1238 skb = dev_alloc_skb(rcvLen+5);
1239 if (skb == NULL) {
1240 DEBUG(1, "netwave_rx: Could not allocate an sk_buff of "
1241 "length %d\n", rcvLen);
1242 ++dev->stats.rx_dropped;
1243 /* Tell the adapter to skip the packet */
1244 wait_WOC(iobase);
1245 writeb(NETWAVE_CMD_SRP, ramBase + NETWAVE_EREG_CB + 0);
1246 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
1247 return 0;
1248 }
1249
1250 skb_reserve( skb, 2); /* Align IP on 16 byte */
1251 skb_put( skb, rcvLen);
1252
1253 /* Copy packet fragments to the skb data area */
1254 ptr = (u_char*) skb->data;
1255 curBuffer = rcvList;
1256 tmpcount = 0;
1257 while ( tmpcount < rcvLen) {
1258 /* Get length and offset of current buffer */
1259 dataCount = get_uint16( ramBase+curBuffer+2);
1260 dataOffset = get_uint16( ramBase+curBuffer+4);
1261
1262 copy_from_pc( ptr + tmpcount,
1263 ramBase+curBuffer+dataOffset, dataCount);
1264
1265 tmpcount += dataCount;
1266
1267 /* Point to next buffer */
1268 curBuffer = get_uint16(ramBase + curBuffer);
1269 }
1270
1271 skb->protocol = eth_type_trans(skb,dev);
1272 /* Queue packet for network layer */
1273 netif_rx(skb);
1274
1275 dev->stats.rx_packets++;
1276 dev->stats.rx_bytes += rcvLen;
1277
1278 /* Got the packet, tell the adapter to skip it */
1279 wait_WOC(iobase);
1280 writeb(NETWAVE_CMD_SRP, ramBase + NETWAVE_EREG_CB + 0);
1281 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 1);
1282 DEBUG(3, "Packet reception ok\n");
1283 }
1284 return 0;
1285}
1286
1287static int netwave_open(struct net_device *dev) {
1288 netwave_private *priv = netdev_priv(dev);
1289 struct pcmcia_device *link = priv->p_dev;
1290
1291 DEBUG(1, "netwave_open: starting.\n");
1292
1293 if (!pcmcia_dev_present(link))
1294 return -ENODEV;
1295
1296 link->open++;
1297
1298 netif_start_queue(dev);
1299 netwave_reset(dev);
1300
1301 return 0;
1302}
1303
1304static int netwave_close(struct net_device *dev) {
1305 netwave_private *priv = netdev_priv(dev);
1306 struct pcmcia_device *link = priv->p_dev;
1307
1308 DEBUG(1, "netwave_close: finishing.\n");
1309
1310 link->open--;
1311 netif_stop_queue(dev);
1312
1313 return 0;
1314}
1315
1316static struct pcmcia_device_id netwave_ids[] = {
1317 PCMCIA_DEVICE_PROD_ID12("Xircom", "CreditCard Netwave", 0x2e3ee845, 0x54e28a28),
1318 PCMCIA_DEVICE_NULL,
1319};
1320MODULE_DEVICE_TABLE(pcmcia, netwave_ids);
1321
1322static struct pcmcia_driver netwave_driver = {
1323 .owner = THIS_MODULE,
1324 .drv = {
1325 .name = "netwave_cs",
1326 },
1327 .probe = netwave_probe,
1328 .remove = netwave_detach,
1329 .id_table = netwave_ids,
1330 .suspend = netwave_suspend,
1331 .resume = netwave_resume,
1332};
1333
1334static int __init init_netwave_cs(void)
1335{
1336 return pcmcia_register_driver(&netwave_driver);
1337}
1338
1339static void __exit exit_netwave_cs(void)
1340{
1341 pcmcia_unregister_driver(&netwave_driver);
1342}
1343
1344module_init(init_netwave_cs);
1345module_exit(exit_netwave_cs);
1346
1347/* Set or clear the multicast filter for this adaptor.
1348 num_addrs == -1 Promiscuous mode, receive all packets
1349 num_addrs == 0 Normal mode, clear multicast list
1350 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
1351 best-effort filtering.
1352 */
1353static void set_multicast_list(struct net_device *dev)
1354{
1355 unsigned int iobase = dev->base_addr;
1356 netwave_private *priv = netdev_priv(dev);
1357 u_char __iomem * ramBase = priv->ramBase;
1358 u_char rcvMode = 0;
1359
1360#ifdef PCMCIA_DEBUG
1361 if (pc_debug > 2) {
1362 static int old;
1363 if (old != dev->mc_count) {
1364 old = dev->mc_count;
1365 DEBUG(0, "%s: setting Rx mode to %d addresses.\n",
1366 dev->name, dev->mc_count);
1367 }
1368 }
1369#endif
1370
1371 if (dev->mc_count || (dev->flags & IFF_ALLMULTI)) {
1372 /* Multicast Mode */
1373 rcvMode = rxConfRxEna + rxConfAMP + rxConfBcast;
1374 } else if (dev->flags & IFF_PROMISC) {
1375 /* Promiscous mode */
1376 rcvMode = rxConfRxEna + rxConfPro + rxConfAMP + rxConfBcast;
1377 } else {
1378 /* Normal mode */
1379 rcvMode = rxConfRxEna + rxConfBcast;
1380 }
1381
1382 /* printk("netwave set_multicast_list: rcvMode to %x\n", rcvMode);*/
1383 /* Now set receive mode */
1384 wait_WOC(iobase);
1385 writeb(NETWAVE_CMD_SRC, ramBase + NETWAVE_EREG_CB + 0);
1386 writeb(rcvMode, ramBase + NETWAVE_EREG_CB + 1);
1387 writeb(NETWAVE_CMD_EOC, ramBase + NETWAVE_EREG_CB + 2);
1388}
1389MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/orinoco/Kconfig b/drivers/net/wireless/orinoco/Kconfig
index 83b635fd7784..e2a2c18920aa 100644
--- a/drivers/net/wireless/orinoco/Kconfig
+++ b/drivers/net/wireless/orinoco/Kconfig
@@ -1,8 +1,10 @@
1config HERMES 1config HERMES
2 tristate "Hermes chipset 802.11b support (Orinoco/Prism2/Symbol)" 2 tristate "Hermes chipset 802.11b support (Orinoco/Prism2/Symbol)"
3 depends on (PPC_PMAC || PCI || PCMCIA) && WLAN_80211 3 depends on (PPC_PMAC || PCI || PCMCIA)
4 depends on CFG80211 4 depends on CFG80211 && CFG80211_WEXT
5 select WIRELESS_EXT 5 select WIRELESS_EXT
6 select WEXT_SPY
7 select WEXT_PRIV
6 select FW_LOADER 8 select FW_LOADER
7 select CRYPTO 9 select CRYPTO
8 select CRYPTO_MICHAEL_MIC 10 select CRYPTO_MICHAEL_MIC
diff --git a/drivers/net/wireless/orinoco/fw.c b/drivers/net/wireless/orinoco/fw.c
index 1257250a1e22..5ea0f7cf85b1 100644
--- a/drivers/net/wireless/orinoco/fw.c
+++ b/drivers/net/wireless/orinoco/fw.c
@@ -3,6 +3,7 @@
3 * See copyright notice in main.c 3 * See copyright notice in main.c
4 */ 4 */
5#include <linux/kernel.h> 5#include <linux/kernel.h>
6#include <linux/slab.h>
6#include <linux/firmware.h> 7#include <linux/firmware.h>
7#include <linux/device.h> 8#include <linux/device.h>
8 9
@@ -28,6 +29,12 @@ static const struct fw_info orinoco_fw[] = {
28 { NULL, "prism_sta_fw.bin", "prism_ap_fw.bin", 0, 1024 }, 29 { NULL, "prism_sta_fw.bin", "prism_ap_fw.bin", 0, 1024 },
29 { "symbol_sp24t_prim_fw", "symbol_sp24t_sec_fw", NULL, 0x00003100, 512 } 30 { "symbol_sp24t_prim_fw", "symbol_sp24t_sec_fw", NULL, 0x00003100, 512 }
30}; 31};
32MODULE_FIRMWARE("agere_sta_fw.bin");
33MODULE_FIRMWARE("agere_ap_fw.bin");
34MODULE_FIRMWARE("prism_sta_fw.bin");
35MODULE_FIRMWARE("prism_ap_fw.bin");
36MODULE_FIRMWARE("symbol_sp24t_prim_fw");
37MODULE_FIRMWARE("symbol_sp24t_sec_fw");
31 38
32/* Structure used to access fields in FW 39/* Structure used to access fields in FW
33 * Make sure LE decoding macros are used 40 * Make sure LE decoding macros are used
diff --git a/drivers/net/wireless/orinoco/hermes_dld.c b/drivers/net/wireless/orinoco/hermes_dld.c
index a3eefe109df4..fb157eb889ca 100644
--- a/drivers/net/wireless/orinoco/hermes_dld.c
+++ b/drivers/net/wireless/orinoco/hermes_dld.c
@@ -427,7 +427,7 @@ int hermesi_program_init(hermes_t *hw, u32 offset)
427 if (err) 427 if (err)
428 return err; 428 return err;
429 429
430 pr_debug(KERN_DEBUG PFX "Enabling volatile, EP 0x%08x\n", offset); 430 pr_debug(PFX "Enabling volatile, EP 0x%08x\n", offset);
431 err = hermes_doicmd_wait(hw, 431 err = hermes_doicmd_wait(hw,
432 HERMES_PROGRAM_ENABLE_VOLATILE, 432 HERMES_PROGRAM_ENABLE_VOLATILE,
433 offset & 0xFFFFu, 433 offset & 0xFFFFu,
@@ -550,7 +550,7 @@ static const struct { \
550 550
551#define DEFAULT_PDR(pid) default_pdr_data_##pid 551#define DEFAULT_PDR(pid) default_pdr_data_##pid
552 552
553/* HWIF Compatiblity */ 553/* HWIF Compatibility */
554DEFINE_DEFAULT_PDR(0x0005, 10, "\x00\x00\x06\x00\x01\x00\x01\x00\x01\x00"); 554DEFINE_DEFAULT_PDR(0x0005, 10, "\x00\x00\x06\x00\x01\x00\x01\x00\x01\x00");
555 555
556/* PPPPSign */ 556/* PPPPSign */
@@ -656,7 +656,7 @@ int hermes_apply_pda_with_defaults(hermes_t *hw,
656 record_id + 1, pdi); 656 record_id + 1, pdi);
657 } 657 }
658 break; 658 break;
659 case 0x5: /* HWIF Compatiblity */ 659 case 0x5: /* HWIF Compatibility */
660 default_pdi = (struct pdi *) &DEFAULT_PDR(0x0005); 660 default_pdi = (struct pdi *) &DEFAULT_PDR(0x0005);
661 break; 661 break;
662 case 0x108: /* PPPPSign */ 662 case 0x108: /* PPPPSign */
diff --git a/drivers/net/wireless/orinoco/hw.c b/drivers/net/wireless/orinoco/hw.c
index 359652d35e63..e6369242e49c 100644
--- a/drivers/net/wireless/orinoco/hw.c
+++ b/drivers/net/wireless/orinoco/hw.c
@@ -60,8 +60,15 @@ static inline fwtype_t determine_firmware_type(struct comp_id *nic_id)
60/* Set priv->firmware type, determine firmware properties 60/* Set priv->firmware type, determine firmware properties
61 * This function can be called before we have registerred with netdev, 61 * This function can be called before we have registerred with netdev,
62 * so all errors go out with dev_* rather than printk 62 * so all errors go out with dev_* rather than printk
63 *
64 * If non-NULL stores a firmware description in fw_name.
65 * If non-NULL stores a HW version in hw_ver
66 *
67 * These are output via generic cfg80211 ethtool support.
63 */ 68 */
64int determine_fw_capabilities(struct orinoco_private *priv) 69int determine_fw_capabilities(struct orinoco_private *priv,
70 char *fw_name, size_t fw_name_len,
71 u32 *hw_ver)
65{ 72{
66 struct device *dev = priv->dev; 73 struct device *dev = priv->dev;
67 hermes_t *hw = &priv->hw; 74 hermes_t *hw = &priv->hw;
@@ -85,6 +92,12 @@ int determine_fw_capabilities(struct orinoco_private *priv)
85 dev_info(dev, "Hardware identity %04x:%04x:%04x:%04x\n", 92 dev_info(dev, "Hardware identity %04x:%04x:%04x:%04x\n",
86 nic_id.id, nic_id.variant, nic_id.major, nic_id.minor); 93 nic_id.id, nic_id.variant, nic_id.major, nic_id.minor);
87 94
95 if (hw_ver)
96 *hw_ver = (((nic_id.id & 0xff) << 24) |
97 ((nic_id.variant & 0xff) << 16) |
98 ((nic_id.major & 0xff) << 8) |
99 (nic_id.minor & 0xff));
100
88 priv->firmware_type = determine_firmware_type(&nic_id); 101 priv->firmware_type = determine_firmware_type(&nic_id);
89 102
90 /* Get the firmware version */ 103 /* Get the firmware version */
@@ -135,8 +148,9 @@ int determine_fw_capabilities(struct orinoco_private *priv)
135 case FIRMWARE_TYPE_AGERE: 148 case FIRMWARE_TYPE_AGERE:
136 /* Lucent Wavelan IEEE, Lucent Orinoco, Cabletron RoamAbout, 149 /* Lucent Wavelan IEEE, Lucent Orinoco, Cabletron RoamAbout,
137 ELSA, Melco, HP, IBM, Dell 1150, Compaq 110/210 */ 150 ELSA, Melco, HP, IBM, Dell 1150, Compaq 110/210 */
138 snprintf(priv->fw_name, sizeof(priv->fw_name) - 1, 151 if (fw_name)
139 "Lucent/Agere %d.%02d", sta_id.major, sta_id.minor); 152 snprintf(fw_name, fw_name_len, "Lucent/Agere %d.%02d",
153 sta_id.major, sta_id.minor);
140 154
141 firmver = ((unsigned long)sta_id.major << 16) | sta_id.minor; 155 firmver = ((unsigned long)sta_id.major << 16) | sta_id.minor;
142 156
@@ -185,8 +199,8 @@ int determine_fw_capabilities(struct orinoco_private *priv)
185 tmp[SYMBOL_MAX_VER_LEN] = '\0'; 199 tmp[SYMBOL_MAX_VER_LEN] = '\0';
186 } 200 }
187 201
188 snprintf(priv->fw_name, sizeof(priv->fw_name) - 1, 202 if (fw_name)
189 "Symbol %s", tmp); 203 snprintf(fw_name, fw_name_len, "Symbol %s", tmp);
190 204
191 priv->has_ibss = (firmver >= 0x20000); 205 priv->has_ibss = (firmver >= 0x20000);
192 priv->has_wep = (firmver >= 0x15012); 206 priv->has_wep = (firmver >= 0x15012);
@@ -224,9 +238,9 @@ int determine_fw_capabilities(struct orinoco_private *priv)
224 * different and less well tested */ 238 * different and less well tested */
225 /* D-Link MAC : 00:40:05:* */ 239 /* D-Link MAC : 00:40:05:* */
226 /* Addtron MAC : 00:90:D1:* */ 240 /* Addtron MAC : 00:90:D1:* */
227 snprintf(priv->fw_name, sizeof(priv->fw_name) - 1, 241 if (fw_name)
228 "Intersil %d.%d.%d", sta_id.major, sta_id.minor, 242 snprintf(fw_name, fw_name_len, "Intersil %d.%d.%d",
229 sta_id.variant); 243 sta_id.major, sta_id.minor, sta_id.variant);
230 244
231 firmver = ((unsigned long)sta_id.major << 16) | 245 firmver = ((unsigned long)sta_id.major << 16) |
232 ((unsigned long)sta_id.minor << 8) | sta_id.variant; 246 ((unsigned long)sta_id.minor << 8) | sta_id.variant;
@@ -245,7 +259,8 @@ int determine_fw_capabilities(struct orinoco_private *priv)
245 } 259 }
246 break; 260 break;
247 } 261 }
248 dev_info(dev, "Firmware determined as %s\n", priv->fw_name); 262 if (fw_name)
263 dev_info(dev, "Firmware determined as %s\n", fw_name);
249 264
250 return 0; 265 return 0;
251} 266}
@@ -1013,7 +1028,7 @@ int orinoco_clear_tkip_key(struct orinoco_private *priv, int key_idx)
1013} 1028}
1014 1029
1015int __orinoco_hw_set_multicast_list(struct orinoco_private *priv, 1030int __orinoco_hw_set_multicast_list(struct orinoco_private *priv,
1016 struct dev_addr_list *mc_list, 1031 struct net_device *dev,
1017 int mc_count, int promisc) 1032 int mc_count, int promisc)
1018{ 1033{
1019 hermes_t *hw = &priv->hw; 1034 hermes_t *hw = &priv->hw;
@@ -1034,24 +1049,16 @@ int __orinoco_hw_set_multicast_list(struct orinoco_private *priv,
1034 * group address if either we want to multicast, or if we were 1049 * group address if either we want to multicast, or if we were
1035 * multicasting and want to stop */ 1050 * multicasting and want to stop */
1036 if (!promisc && (mc_count || priv->mc_count)) { 1051 if (!promisc && (mc_count || priv->mc_count)) {
1037 struct dev_mc_list *p = mc_list; 1052 struct dev_mc_list *p;
1038 struct hermes_multicast mclist; 1053 struct hermes_multicast mclist;
1039 int i; 1054 int i = 0;
1040 1055
1041 for (i = 0; i < mc_count; i++) { 1056 netdev_for_each_mc_addr(p, dev) {
1042 /* paranoia: is list shorter than mc_count? */ 1057 if (i == mc_count)
1043 BUG_ON(!p); 1058 break;
1044 /* paranoia: bad address size in list? */ 1059 memcpy(mclist.addr[i++], p->dmi_addr, ETH_ALEN);
1045 BUG_ON(p->dmi_addrlen != ETH_ALEN);
1046
1047 memcpy(mclist.addr[i], p->dmi_addr, ETH_ALEN);
1048 p = p->next;
1049 } 1060 }
1050 1061
1051 if (p)
1052 printk(KERN_WARNING "%s: Multicast list is "
1053 "longer than mc_count\n", priv->ndev->name);
1054
1055 err = hermes_write_ltv(hw, USER_BAP, 1062 err = hermes_write_ltv(hw, USER_BAP,
1056 HERMES_RID_CNFGROUPADDRESSES, 1063 HERMES_RID_CNFGROUPADDRESSES,
1057 HERMES_BYTES_TO_RECLEN(mc_count * ETH_ALEN), 1064 HERMES_BYTES_TO_RECLEN(mc_count * ETH_ALEN),
diff --git a/drivers/net/wireless/orinoco/hw.h b/drivers/net/wireless/orinoco/hw.h
index 8df6e8752be6..9799a1d14a63 100644
--- a/drivers/net/wireless/orinoco/hw.h
+++ b/drivers/net/wireless/orinoco/hw.h
@@ -24,7 +24,8 @@
24struct orinoco_private; 24struct orinoco_private;
25struct dev_addr_list; 25struct dev_addr_list;
26 26
27int determine_fw_capabilities(struct orinoco_private *priv); 27int determine_fw_capabilities(struct orinoco_private *priv, char *fw_name,
28 size_t fw_name_len, u32 *hw_ver);
28int orinoco_hw_read_card_settings(struct orinoco_private *priv, u8 *dev_addr); 29int orinoco_hw_read_card_settings(struct orinoco_private *priv, u8 *dev_addr);
29int orinoco_hw_allocate_fid(struct orinoco_private *priv); 30int orinoco_hw_allocate_fid(struct orinoco_private *priv);
30int orinoco_get_bitratemode(int bitrate, int automatic); 31int orinoco_get_bitratemode(int bitrate, int automatic);
@@ -42,7 +43,7 @@ int __orinoco_hw_set_tkip_key(struct orinoco_private *priv, int key_idx,
42 u8 *tsc, size_t tsc_len); 43 u8 *tsc, size_t tsc_len);
43int orinoco_clear_tkip_key(struct orinoco_private *priv, int key_idx); 44int orinoco_clear_tkip_key(struct orinoco_private *priv, int key_idx);
44int __orinoco_hw_set_multicast_list(struct orinoco_private *priv, 45int __orinoco_hw_set_multicast_list(struct orinoco_private *priv,
45 struct dev_addr_list *mc_list, 46 struct net_device *dev,
46 int mc_count, int promisc); 47 int mc_count, int promisc);
47int orinoco_hw_get_essid(struct orinoco_private *priv, int *active, 48int orinoco_hw_get_essid(struct orinoco_private *priv, int *active,
48 char buf[IW_ESSID_MAX_SIZE+1]); 49 char buf[IW_ESSID_MAX_SIZE+1]);
diff --git a/drivers/net/wireless/orinoco/main.c b/drivers/net/wireless/orinoco/main.c
index 7a32bcb0c037..413e9ab6cab3 100644
--- a/drivers/net/wireless/orinoco/main.c
+++ b/drivers/net/wireless/orinoco/main.c
@@ -78,12 +78,12 @@
78 78
79#include <linux/module.h> 79#include <linux/module.h>
80#include <linux/kernel.h> 80#include <linux/kernel.h>
81#include <linux/slab.h>
81#include <linux/init.h> 82#include <linux/init.h>
82#include <linux/delay.h> 83#include <linux/delay.h>
83#include <linux/device.h> 84#include <linux/device.h>
84#include <linux/netdevice.h> 85#include <linux/netdevice.h>
85#include <linux/etherdevice.h> 86#include <linux/etherdevice.h>
86#include <linux/ethtool.h>
87#include <linux/suspend.h> 87#include <linux/suspend.h>
88#include <linux/if_arp.h> 88#include <linux/if_arp.h>
89#include <linux/wireless.h> 89#include <linux/wireless.h>
@@ -162,8 +162,6 @@ static const u8 encaps_hdr[] = {0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00};
162 | HERMES_EV_WTERR | HERMES_EV_INFO \ 162 | HERMES_EV_WTERR | HERMES_EV_INFO \
163 | HERMES_EV_INFDROP) 163 | HERMES_EV_INFDROP)
164 164
165static const struct ethtool_ops orinoco_ethtool_ops;
166
167/********************************************************************/ 165/********************************************************************/
168/* Data types */ 166/* Data types */
169/********************************************************************/ 167/********************************************************************/
@@ -1671,16 +1669,15 @@ __orinoco_set_multicast_list(struct net_device *dev)
1671 /* The Hermes doesn't seem to have an allmulti mode, so we go 1669 /* The Hermes doesn't seem to have an allmulti mode, so we go
1672 * into promiscuous mode and let the upper levels deal. */ 1670 * into promiscuous mode and let the upper levels deal. */
1673 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) || 1671 if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
1674 (dev->mc_count > MAX_MULTICAST(priv))) { 1672 (netdev_mc_count(dev) > MAX_MULTICAST(priv))) {
1675 promisc = 1; 1673 promisc = 1;
1676 mc_count = 0; 1674 mc_count = 0;
1677 } else { 1675 } else {
1678 promisc = 0; 1676 promisc = 0;
1679 mc_count = dev->mc_count; 1677 mc_count = netdev_mc_count(dev);
1680 } 1678 }
1681 1679
1682 err = __orinoco_hw_set_multicast_list(priv, dev->mc_list, mc_count, 1680 err = __orinoco_hw_set_multicast_list(priv, dev, mc_count, promisc);
1683 promisc);
1684 1681
1685 return err; 1682 return err;
1686} 1683}
@@ -1994,7 +1991,9 @@ int orinoco_init(struct orinoco_private *priv)
1994 goto out; 1991 goto out;
1995 } 1992 }
1996 1993
1997 err = determine_fw_capabilities(priv); 1994 err = determine_fw_capabilities(priv, wiphy->fw_version,
1995 sizeof(wiphy->fw_version),
1996 &wiphy->hw_version);
1998 if (err != 0) { 1997 if (err != 0) {
1999 dev_err(dev, "Incompatible firmware, aborting\n"); 1998 dev_err(dev, "Incompatible firmware, aborting\n");
2000 goto out; 1999 goto out;
@@ -2010,7 +2009,9 @@ int orinoco_init(struct orinoco_private *priv)
2010 priv->do_fw_download = 0; 2009 priv->do_fw_download = 0;
2011 2010
2012 /* Check firmware version again */ 2011 /* Check firmware version again */
2013 err = determine_fw_capabilities(priv); 2012 err = determine_fw_capabilities(priv, wiphy->fw_version,
2013 sizeof(wiphy->fw_version),
2014 &wiphy->hw_version);
2014 if (err != 0) { 2015 if (err != 0) {
2015 dev_err(dev, "Incompatible firmware, aborting\n"); 2016 dev_err(dev, "Incompatible firmware, aborting\n");
2016 goto out; 2017 goto out;
@@ -2212,7 +2213,6 @@ int orinoco_if_add(struct orinoco_private *priv,
2212 dev->ieee80211_ptr = wdev; 2213 dev->ieee80211_ptr = wdev;
2213 dev->netdev_ops = &orinoco_netdev_ops; 2214 dev->netdev_ops = &orinoco_netdev_ops;
2214 dev->watchdog_timeo = HZ; /* 1 second timeout */ 2215 dev->watchdog_timeo = HZ; /* 1 second timeout */
2215 dev->ethtool_ops = &orinoco_ethtool_ops;
2216 dev->wireless_handlers = &orinoco_handler_def; 2216 dev->wireless_handlers = &orinoco_handler_def;
2217#ifdef WIRELESS_SPY 2217#ifdef WIRELESS_SPY
2218 dev->wireless_data = &priv->wireless_data; 2218 dev->wireless_data = &priv->wireless_data;
@@ -2225,6 +2225,7 @@ int orinoco_if_add(struct orinoco_private *priv,
2225 netif_carrier_off(dev); 2225 netif_carrier_off(dev);
2226 2226
2227 memcpy(dev->dev_addr, wiphy->perm_addr, ETH_ALEN); 2227 memcpy(dev->dev_addr, wiphy->perm_addr, ETH_ALEN);
2228 memcpy(dev->perm_addr, wiphy->perm_addr, ETH_ALEN);
2228 2229
2229 dev->base_addr = base_addr; 2230 dev->base_addr = base_addr;
2230 dev->irq = irq; 2231 dev->irq = irq;
@@ -2348,27 +2349,6 @@ void orinoco_down(struct orinoco_private *priv)
2348} 2349}
2349EXPORT_SYMBOL(orinoco_down); 2350EXPORT_SYMBOL(orinoco_down);
2350 2351
2351static void orinoco_get_drvinfo(struct net_device *dev,
2352 struct ethtool_drvinfo *info)
2353{
2354 struct orinoco_private *priv = ndev_priv(dev);
2355
2356 strncpy(info->driver, DRIVER_NAME, sizeof(info->driver) - 1);
2357 strncpy(info->version, DRIVER_VERSION, sizeof(info->version) - 1);
2358 strncpy(info->fw_version, priv->fw_name, sizeof(info->fw_version) - 1);
2359 if (dev->dev.parent)
2360 strncpy(info->bus_info, dev_name(dev->dev.parent),
2361 sizeof(info->bus_info) - 1);
2362 else
2363 snprintf(info->bus_info, sizeof(info->bus_info) - 1,
2364 "PCMCIA %p", priv->hw.iobase);
2365}
2366
2367static const struct ethtool_ops orinoco_ethtool_ops = {
2368 .get_drvinfo = orinoco_get_drvinfo,
2369 .get_link = ethtool_op_get_link,
2370};
2371
2372/********************************************************************/ 2352/********************************************************************/
2373/* Module initialization */ 2353/* Module initialization */
2374/********************************************************************/ 2354/********************************************************************/
diff --git a/drivers/net/wireless/orinoco/orinoco.h b/drivers/net/wireless/orinoco/orinoco.h
index 9ac6f1dda4b0..665ef56f8382 100644
--- a/drivers/net/wireless/orinoco/orinoco.h
+++ b/drivers/net/wireless/orinoco/orinoco.h
@@ -93,7 +93,6 @@ struct orinoco_private {
93 93
94 /* Capabilities of the hardware/firmware */ 94 /* Capabilities of the hardware/firmware */
95 fwtype_t firmware_type; 95 fwtype_t firmware_type;
96 char fw_name[32];
97 int ibss_port; 96 int ibss_port;
98 int nicbuf_size; 97 int nicbuf_size;
99 u16 channel_mask; 98 u16 channel_mask;
diff --git a/drivers/net/wireless/orinoco/orinoco_cs.c b/drivers/net/wireless/orinoco/orinoco_cs.c
index 38c1c9d2abb8..1d4ada188eda 100644
--- a/drivers/net/wireless/orinoco/orinoco_cs.c
+++ b/drivers/net/wireless/orinoco/orinoco_cs.c
@@ -109,7 +109,7 @@ orinoco_cs_probe(struct pcmcia_device *link)
109 struct orinoco_private *priv; 109 struct orinoco_private *priv;
110 struct orinoco_pccard *card; 110 struct orinoco_pccard *card;
111 111
112 priv = alloc_orinocodev(sizeof(*card), &handle_to_dev(link), 112 priv = alloc_orinocodev(sizeof(*card), &link->dev,
113 orinoco_cs_hard_reset, NULL); 113 orinoco_cs_hard_reset, NULL);
114 if (!priv) 114 if (!priv)
115 return -ENOMEM; 115 return -ENOMEM;
@@ -120,10 +120,8 @@ orinoco_cs_probe(struct pcmcia_device *link)
120 link->priv = priv; 120 link->priv = priv;
121 121
122 /* Interrupt setup */ 122 /* Interrupt setup */
123 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT; 123 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
124 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
125 link->irq.Handler = orinoco_interrupt; 124 link->irq.Handler = orinoco_interrupt;
126 link->irq.Instance = priv;
127 125
128 /* General socket configuration defaults can go here. In this 126 /* General socket configuration defaults can go here. In this
129 * client, we assume very little, and rely on the CIS for 127 * client, we assume very little, and rely on the CIS for
@@ -160,12 +158,6 @@ static void orinoco_cs_detach(struct pcmcia_device *link)
160 * device available to the system. 158 * device available to the system.
161 */ 159 */
162 160
163#define CS_CHECK(fn, ret) do { \
164 last_fn = (fn); \
165 if ((last_ret = (ret)) != 0) \
166 goto cs_failed; \
167} while (0)
168
169static int orinoco_cs_config_check(struct pcmcia_device *p_dev, 161static int orinoco_cs_config_check(struct pcmcia_device *p_dev,
170 cistpl_cftable_entry_t *cfg, 162 cistpl_cftable_entry_t *cfg,
171 cistpl_cftable_entry_t *dflt, 163 cistpl_cftable_entry_t *dflt,
@@ -240,7 +232,7 @@ orinoco_cs_config(struct pcmcia_device *link)
240 struct orinoco_private *priv = link->priv; 232 struct orinoco_private *priv = link->priv;
241 struct orinoco_pccard *card = priv->card; 233 struct orinoco_pccard *card = priv->card;
242 hermes_t *hw = &priv->hw; 234 hermes_t *hw = &priv->hw;
243 int last_fn, last_ret; 235 int ret;
244 void __iomem *mem; 236 void __iomem *mem;
245 237
246 /* 238 /*
@@ -257,13 +249,12 @@ orinoco_cs_config(struct pcmcia_device *link)
257 * and most client drivers will only use the CIS to fill in 249 * and most client drivers will only use the CIS to fill in
258 * implementation-defined details. 250 * implementation-defined details.
259 */ 251 */
260 last_ret = pcmcia_loop_config(link, orinoco_cs_config_check, NULL); 252 ret = pcmcia_loop_config(link, orinoco_cs_config_check, NULL);
261 if (last_ret) { 253 if (ret) {
262 if (!ignore_cis_vcc) 254 if (!ignore_cis_vcc)
263 printk(KERN_ERR PFX "GetNextTuple(): No matching " 255 printk(KERN_ERR PFX "GetNextTuple(): No matching "
264 "CIS configuration. Maybe you need the " 256 "CIS configuration. Maybe you need the "
265 "ignore_cis_vcc=1 parameter.\n"); 257 "ignore_cis_vcc=1 parameter.\n");
266 cs_error(link, RequestIO, last_ret);
267 goto failed; 258 goto failed;
268 } 259 }
269 260
@@ -272,14 +263,16 @@ orinoco_cs_config(struct pcmcia_device *link)
272 * a handler to the interrupt, unless the 'Handler' member of 263 * a handler to the interrupt, unless the 'Handler' member of
273 * the irq structure is initialized. 264 * the irq structure is initialized.
274 */ 265 */
275 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); 266 ret = pcmcia_request_irq(link, &link->irq);
267 if (ret)
268 goto failed;
276 269
277 /* We initialize the hermes structure before completing PCMCIA 270 /* We initialize the hermes structure before completing PCMCIA
278 * configuration just in case the interrupt handler gets 271 * configuration just in case the interrupt handler gets
279 * called. */ 272 * called. */
280 mem = ioport_map(link->io.BasePort1, link->io.NumPorts1); 273 mem = ioport_map(link->io.BasePort1, link->io.NumPorts1);
281 if (!mem) 274 if (!mem)
282 goto cs_failed; 275 goto failed;
283 276
284 hermes_struct_init(hw, mem, HERMES_16BIT_REGSPACING); 277 hermes_struct_init(hw, mem, HERMES_16BIT_REGSPACING);
285 278
@@ -288,8 +281,9 @@ orinoco_cs_config(struct pcmcia_device *link)
288 * the I/O windows and the interrupt mapping, and putting the 281 * the I/O windows and the interrupt mapping, and putting the
289 * card and host interface into "Memory and IO" mode. 282 * card and host interface into "Memory and IO" mode.
290 */ 283 */
291 CS_CHECK(RequestConfiguration, 284 ret = pcmcia_request_configuration(link, &link->conf);
292 pcmcia_request_configuration(link, &link->conf)); 285 if (ret)
286 goto failed;
293 287
294 /* Ok, we have the configuration, prepare to register the netdev */ 288 /* Ok, we have the configuration, prepare to register the netdev */
295 card->node.major = card->node.minor = 0; 289 card->node.major = card->node.minor = 0;
@@ -315,9 +309,6 @@ orinoco_cs_config(struct pcmcia_device *link)
315 * net_device has been registered */ 309 * net_device has been registered */
316 return 0; 310 return 0;
317 311
318 cs_failed:
319 cs_error(link, last_fn, last_ret);
320
321 failed: 312 failed:
322 orinoco_cs_release(link); 313 orinoco_cs_release(link);
323 return -ENODEV; 314 return -ENODEV;
@@ -416,7 +407,6 @@ static struct pcmcia_device_id orinoco_cs_ids[] = {
416 PCMCIA_DEVICE_PROD_ID12("3Com", "3CRWE737A AirConnect Wireless LAN PC Card", 0x41240e5b, 0x56010af3), 407 PCMCIA_DEVICE_PROD_ID12("3Com", "3CRWE737A AirConnect Wireless LAN PC Card", 0x41240e5b, 0x56010af3),
417 PCMCIA_DEVICE_PROD_ID12("ACTIONTEC", "PRISM Wireless LAN PC Card", 0x393089da, 0xa71e69d5), 408 PCMCIA_DEVICE_PROD_ID12("ACTIONTEC", "PRISM Wireless LAN PC Card", 0x393089da, 0xa71e69d5),
418 PCMCIA_DEVICE_PROD_ID12("Addtron", "AWP-100 Wireless PCMCIA", 0xe6ec52ce, 0x08649af2), 409 PCMCIA_DEVICE_PROD_ID12("Addtron", "AWP-100 Wireless PCMCIA", 0xe6ec52ce, 0x08649af2),
419 PCMCIA_DEVICE_PROD_ID123("AIRVAST", "IEEE 802.11b Wireless PCMCIA Card", "HFA3863", 0xea569531, 0x4bcb9645, 0x355cb092),
420 PCMCIA_DEVICE_PROD_ID12("Allied Telesyn", "AT-WCL452 Wireless PCMCIA Radio", 0x5cd01705, 0x4271660f), 410 PCMCIA_DEVICE_PROD_ID12("Allied Telesyn", "AT-WCL452 Wireless PCMCIA Radio", 0x5cd01705, 0x4271660f),
421 PCMCIA_DEVICE_PROD_ID12("ASUS", "802_11b_PC_CARD_25", 0x78fc06ee, 0xdb9aa842), 411 PCMCIA_DEVICE_PROD_ID12("ASUS", "802_11b_PC_CARD_25", 0x78fc06ee, 0xdb9aa842),
422 PCMCIA_DEVICE_PROD_ID12("ASUS", "802_11B_CF_CARD_25", 0x78fc06ee, 0x45a50c1e), 412 PCMCIA_DEVICE_PROD_ID12("ASUS", "802_11B_CF_CARD_25", 0x78fc06ee, 0x45a50c1e),
@@ -426,7 +416,6 @@ static struct pcmcia_device_id orinoco_cs_ids[] = {
426 PCMCIA_DEVICE_PROD_ID12("BUFFALO", "WLI-CF-S11G", 0x2decece3, 0x82067c18), 416 PCMCIA_DEVICE_PROD_ID12("BUFFALO", "WLI-CF-S11G", 0x2decece3, 0x82067c18),
427 PCMCIA_DEVICE_PROD_ID12("Cabletron", "RoamAbout 802.11 DS", 0x32d445f5, 0xedeffd90), 417 PCMCIA_DEVICE_PROD_ID12("Cabletron", "RoamAbout 802.11 DS", 0x32d445f5, 0xedeffd90),
428 PCMCIA_DEVICE_PROD_ID12("Compaq", "WL200_11Mbps_Wireless_PCI_Card", 0x54f7c49c, 0x15a75e5b), 418 PCMCIA_DEVICE_PROD_ID12("Compaq", "WL200_11Mbps_Wireless_PCI_Card", 0x54f7c49c, 0x15a75e5b),
429 PCMCIA_DEVICE_PROD_ID123("corega", "WL PCCL-11", "ISL37300P", 0x0a21501a, 0x59868926, 0xc9049a39),
430 PCMCIA_DEVICE_PROD_ID12("corega K.K.", "Wireless LAN PCC-11", 0x5261440f, 0xa6405584), 419 PCMCIA_DEVICE_PROD_ID12("corega K.K.", "Wireless LAN PCC-11", 0x5261440f, 0xa6405584),
431 PCMCIA_DEVICE_PROD_ID12("corega K.K.", "Wireless LAN PCCA-11", 0x5261440f, 0xdf6115f9), 420 PCMCIA_DEVICE_PROD_ID12("corega K.K.", "Wireless LAN PCCA-11", 0x5261440f, 0xdf6115f9),
432 PCMCIA_DEVICE_PROD_ID12("corega_K.K.", "Wireless_LAN_PCCB-11", 0x29e33311, 0xee7a27ae), 421 PCMCIA_DEVICE_PROD_ID12("corega_K.K.", "Wireless_LAN_PCCB-11", 0x29e33311, 0xee7a27ae),
@@ -441,7 +430,6 @@ static struct pcmcia_device_id orinoco_cs_ids[] = {
441 PCMCIA_DEVICE_PROD_ID12("INTERSIL", "HFA384x/IEEE", 0x74c5e40d, 0xdb472a18), 430 PCMCIA_DEVICE_PROD_ID12("INTERSIL", "HFA384x/IEEE", 0x74c5e40d, 0xdb472a18),
442 PCMCIA_DEVICE_PROD_ID12("INTERSIL", "I-GATE 11M PC Card / PC Card plus", 0x74c5e40d, 0x8304ff77), 431 PCMCIA_DEVICE_PROD_ID12("INTERSIL", "I-GATE 11M PC Card / PC Card plus", 0x74c5e40d, 0x8304ff77),
443 PCMCIA_DEVICE_PROD_ID12("Intersil", "PRISM 2_5 PCMCIA ADAPTER", 0x4b801a17, 0x6345a0bf), 432 PCMCIA_DEVICE_PROD_ID12("Intersil", "PRISM 2_5 PCMCIA ADAPTER", 0x4b801a17, 0x6345a0bf),
444 PCMCIA_DEVICE_PROD_ID123("Intersil", "PRISM Freedom PCMCIA Adapter", "ISL37100P", 0x4b801a17, 0xf222ec2d, 0x630d52b2),
445 PCMCIA_DEVICE_PROD_ID12("LeArtery", "SYNCBYAIR 11Mbps Wireless LAN PC Card", 0x7e3b326a, 0x49893e92), 433 PCMCIA_DEVICE_PROD_ID12("LeArtery", "SYNCBYAIR 11Mbps Wireless LAN PC Card", 0x7e3b326a, 0x49893e92),
446 PCMCIA_DEVICE_PROD_ID12("Linksys", "Wireless CompactFlash Card", 0x0733cc81, 0x0c52f395), 434 PCMCIA_DEVICE_PROD_ID12("Linksys", "Wireless CompactFlash Card", 0x0733cc81, 0x0c52f395),
447 PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/IEEE", 0x23eb9949, 0xc562e72a), 435 PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/IEEE", 0x23eb9949, 0xc562e72a),
@@ -454,7 +442,6 @@ static struct pcmcia_device_id orinoco_cs_ids[] = {
454 PCMCIA_DEVICE_PROD_ID12("Nortel Networks", "emobility 802.11 Wireless LAN PC Card", 0x2d617ea0, 0x88cd5767), 442 PCMCIA_DEVICE_PROD_ID12("Nortel Networks", "emobility 802.11 Wireless LAN PC Card", 0x2d617ea0, 0x88cd5767),
455 PCMCIA_DEVICE_PROD_ID12("OEM", "PRISM2 IEEE 802.11 PC-Card", 0xfea54c90, 0x48f2bdd6), 443 PCMCIA_DEVICE_PROD_ID12("OEM", "PRISM2 IEEE 802.11 PC-Card", 0xfea54c90, 0x48f2bdd6),
456 PCMCIA_DEVICE_PROD_ID12("OTC", "Wireless AirEZY 2411-PCC WLAN Card", 0x4ac44287, 0x235a6bed), 444 PCMCIA_DEVICE_PROD_ID12("OTC", "Wireless AirEZY 2411-PCC WLAN Card", 0x4ac44287, 0x235a6bed),
457 PCMCIA_DEVICE_PROD_ID123("PCMCIA", "11M WLAN Card v2.5", "ISL37300P", 0x281f1c5d, 0x6e440487, 0xc9049a39),
458 PCMCIA_DEVICE_PROD_ID12("PLANEX", "GeoWave/GW-CF110", 0x209f40ab, 0xd9715264), 445 PCMCIA_DEVICE_PROD_ID12("PLANEX", "GeoWave/GW-CF110", 0x209f40ab, 0xd9715264),
459 PCMCIA_DEVICE_PROD_ID12("PLANEX", "GeoWave/GW-NS110", 0x209f40ab, 0x46263178), 446 PCMCIA_DEVICE_PROD_ID12("PLANEX", "GeoWave/GW-NS110", 0x209f40ab, 0x46263178),
460 PCMCIA_DEVICE_PROD_ID12("PROXIM", "LAN PC CARD HARMONY 80211B", 0xc6536a5e, 0x090c3cd9), 447 PCMCIA_DEVICE_PROD_ID12("PROXIM", "LAN PC CARD HARMONY 80211B", 0xc6536a5e, 0x090c3cd9),
@@ -463,8 +450,11 @@ static struct pcmcia_device_id orinoco_cs_ids[] = {
463 PCMCIA_DEVICE_PROD_ID12("SMC", "SMC2532W-B EliteConnect Wireless Adapter", 0xc4f8b18b, 0x196bd757), 450 PCMCIA_DEVICE_PROD_ID12("SMC", "SMC2532W-B EliteConnect Wireless Adapter", 0xc4f8b18b, 0x196bd757),
464 PCMCIA_DEVICE_PROD_ID12("SMC", "SMC2632W", 0xc4f8b18b, 0x474a1f2a), 451 PCMCIA_DEVICE_PROD_ID12("SMC", "SMC2632W", 0xc4f8b18b, 0x474a1f2a),
465 PCMCIA_DEVICE_PROD_ID12("Symbol Technologies", "LA4111 Spectrum24 Wireless LAN PC Card", 0x3f02b4d6, 0x3663cb0e), 452 PCMCIA_DEVICE_PROD_ID12("Symbol Technologies", "LA4111 Spectrum24 Wireless LAN PC Card", 0x3f02b4d6, 0x3663cb0e),
466 PCMCIA_DEVICE_PROD_ID123("The Linksys Group, Inc.", "Instant Wireless Network PC Card", "ISL37300P", 0xa5f472c2, 0x590eb502, 0xc9049a39),
467 PCMCIA_DEVICE_PROD_ID12("ZoomAir 11Mbps High", "Rate wireless Networking", 0x273fe3db, 0x32a1eaee), 453 PCMCIA_DEVICE_PROD_ID12("ZoomAir 11Mbps High", "Rate wireless Networking", 0x273fe3db, 0x32a1eaee),
454 PCMCIA_DEVICE_PROD_ID3("HFA3863", 0x355cb092),
455 PCMCIA_DEVICE_PROD_ID3("ISL37100P", 0x630d52b2),
456 PCMCIA_DEVICE_PROD_ID3("ISL37101P-10", 0xdd97a26b),
457 PCMCIA_DEVICE_PROD_ID3("ISL37300P", 0xc9049a39),
468 PCMCIA_DEVICE_NULL, 458 PCMCIA_DEVICE_NULL,
469}; 459};
470MODULE_DEVICE_TABLE(pcmcia, orinoco_cs_ids); 460MODULE_DEVICE_TABLE(pcmcia, orinoco_cs_ids);
diff --git a/drivers/net/wireless/orinoco/orinoco_nortel.c b/drivers/net/wireless/orinoco/orinoco_nortel.c
index c13a4c383410..075f446b3139 100644
--- a/drivers/net/wireless/orinoco/orinoco_nortel.c
+++ b/drivers/net/wireless/orinoco/orinoco_nortel.c
@@ -274,7 +274,7 @@ static void __devexit orinoco_nortel_remove_one(struct pci_dev *pdev)
274 pci_disable_device(pdev); 274 pci_disable_device(pdev);
275} 275}
276 276
277static struct pci_device_id orinoco_nortel_id_table[] = { 277static DEFINE_PCI_DEVICE_TABLE(orinoco_nortel_id_table) = {
278 /* Nortel emobility PCI */ 278 /* Nortel emobility PCI */
279 {0x126c, 0x8030, PCI_ANY_ID, PCI_ANY_ID,}, 279 {0x126c, 0x8030, PCI_ANY_ID, PCI_ANY_ID,},
280 /* Symbol LA-4123 PCI */ 280 /* Symbol LA-4123 PCI */
diff --git a/drivers/net/wireless/orinoco/orinoco_pci.c b/drivers/net/wireless/orinoco/orinoco_pci.c
index fea7781948e7..bda5317cc596 100644
--- a/drivers/net/wireless/orinoco/orinoco_pci.c
+++ b/drivers/net/wireless/orinoco/orinoco_pci.c
@@ -212,7 +212,7 @@ static void __devexit orinoco_pci_remove_one(struct pci_dev *pdev)
212 pci_disable_device(pdev); 212 pci_disable_device(pdev);
213} 213}
214 214
215static struct pci_device_id orinoco_pci_id_table[] = { 215static DEFINE_PCI_DEVICE_TABLE(orinoco_pci_id_table) = {
216 /* Intersil Prism 3 */ 216 /* Intersil Prism 3 */
217 {0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID,}, 217 {0x1260, 0x3872, PCI_ANY_ID, PCI_ANY_ID,},
218 /* Intersil Prism 2.5 */ 218 /* Intersil Prism 2.5 */
diff --git a/drivers/net/wireless/orinoco/orinoco_plx.c b/drivers/net/wireless/orinoco/orinoco_plx.c
index 3f2942a1e4f5..e0d5874ab42f 100644
--- a/drivers/net/wireless/orinoco/orinoco_plx.c
+++ b/drivers/net/wireless/orinoco/orinoco_plx.c
@@ -310,7 +310,7 @@ static void __devexit orinoco_plx_remove_one(struct pci_dev *pdev)
310 pci_disable_device(pdev); 310 pci_disable_device(pdev);
311} 311}
312 312
313static struct pci_device_id orinoco_plx_id_table[] = { 313static DEFINE_PCI_DEVICE_TABLE(orinoco_plx_id_table) = {
314 {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */ 314 {0x111a, 0x1023, PCI_ANY_ID, PCI_ANY_ID,}, /* Siemens SpeedStream SS1023 */
315 {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */ 315 {0x1385, 0x4100, PCI_ANY_ID, PCI_ANY_ID,}, /* Netgear MA301 */
316 {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */ 316 {0x15e8, 0x0130, PCI_ANY_ID, PCI_ANY_ID,}, /* Correga - does this work? */
diff --git a/drivers/net/wireless/orinoco/orinoco_tmd.c b/drivers/net/wireless/orinoco/orinoco_tmd.c
index d3452548cc71..88cbc7902aa0 100644
--- a/drivers/net/wireless/orinoco/orinoco_tmd.c
+++ b/drivers/net/wireless/orinoco/orinoco_tmd.c
@@ -203,7 +203,7 @@ static void __devexit orinoco_tmd_remove_one(struct pci_dev *pdev)
203 pci_disable_device(pdev); 203 pci_disable_device(pdev);
204} 204}
205 205
206static struct pci_device_id orinoco_tmd_id_table[] = { 206static DEFINE_PCI_DEVICE_TABLE(orinoco_tmd_id_table) = {
207 {0x15e8, 0x0131, PCI_ANY_ID, PCI_ANY_ID,}, /* NDC and OEMs, e.g. pheecom */ 207 {0x15e8, 0x0131, PCI_ANY_ID, PCI_ANY_ID,}, /* NDC and OEMs, e.g. pheecom */
208 {0,}, 208 {0,},
209}; 209};
diff --git a/drivers/net/wireless/orinoco/scan.c b/drivers/net/wireless/orinoco/scan.c
index d2f10e9c2162..330d42d45333 100644
--- a/drivers/net/wireless/orinoco/scan.c
+++ b/drivers/net/wireless/orinoco/scan.c
@@ -3,6 +3,7 @@
3 * See copyright notice in main.c 3 * See copyright notice in main.c
4 */ 4 */
5 5
6#include <linux/gfp.h>
6#include <linux/kernel.h> 7#include <linux/kernel.h>
7#include <linux/string.h> 8#include <linux/string.h>
8#include <linux/ieee80211.h> 9#include <linux/ieee80211.h>
diff --git a/drivers/net/wireless/orinoco/spectrum_cs.c b/drivers/net/wireless/orinoco/spectrum_cs.c
index c361310b885d..59bda240fdc2 100644
--- a/drivers/net/wireless/orinoco/spectrum_cs.c
+++ b/drivers/net/wireless/orinoco/spectrum_cs.c
@@ -73,9 +73,6 @@ static void spectrum_cs_release(struct pcmcia_device *link);
73#define HCR_MEM16 0x10 /* memory width bit, should be preserved */ 73#define HCR_MEM16 0x10 /* memory width bit, should be preserved */
74 74
75 75
76#define CS_CHECK(fn, ret) \
77 do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
78
79/* 76/*
80 * Reset the card using configuration registers COR and CCSR. 77 * Reset the card using configuration registers COR and CCSR.
81 * If IDLE is 1, stop the firmware, so that it can be safely rewritten. 78 * If IDLE is 1, stop the firmware, so that it can be safely rewritten.
@@ -83,7 +80,7 @@ static void spectrum_cs_release(struct pcmcia_device *link);
83static int 80static int
84spectrum_reset(struct pcmcia_device *link, int idle) 81spectrum_reset(struct pcmcia_device *link, int idle)
85{ 82{
86 int last_ret, last_fn; 83 int ret;
87 conf_reg_t reg; 84 conf_reg_t reg;
88 u_int save_cor; 85 u_int save_cor;
89 86
@@ -95,23 +92,26 @@ spectrum_reset(struct pcmcia_device *link, int idle)
95 reg.Function = 0; 92 reg.Function = 0;
96 reg.Action = CS_READ; 93 reg.Action = CS_READ;
97 reg.Offset = CISREG_COR; 94 reg.Offset = CISREG_COR;
98 CS_CHECK(AccessConfigurationRegister, 95 ret = pcmcia_access_configuration_register(link, &reg);
99 pcmcia_access_configuration_register(link, &reg)); 96 if (ret)
97 goto failed;
100 save_cor = reg.Value; 98 save_cor = reg.Value;
101 99
102 /* Soft-Reset card */ 100 /* Soft-Reset card */
103 reg.Action = CS_WRITE; 101 reg.Action = CS_WRITE;
104 reg.Offset = CISREG_COR; 102 reg.Offset = CISREG_COR;
105 reg.Value = (save_cor | COR_SOFT_RESET); 103 reg.Value = (save_cor | COR_SOFT_RESET);
106 CS_CHECK(AccessConfigurationRegister, 104 ret = pcmcia_access_configuration_register(link, &reg);
107 pcmcia_access_configuration_register(link, &reg)); 105 if (ret)
106 goto failed;
108 udelay(1000); 107 udelay(1000);
109 108
110 /* Read CCSR */ 109 /* Read CCSR */
111 reg.Action = CS_READ; 110 reg.Action = CS_READ;
112 reg.Offset = CISREG_CCSR; 111 reg.Offset = CISREG_CCSR;
113 CS_CHECK(AccessConfigurationRegister, 112 ret = pcmcia_access_configuration_register(link, &reg);
114 pcmcia_access_configuration_register(link, &reg)); 113 if (ret)
114 goto failed;
115 115
116 /* 116 /*
117 * Start or stop the firmware. Memory width bit should be 117 * Start or stop the firmware. Memory width bit should be
@@ -120,21 +120,22 @@ spectrum_reset(struct pcmcia_device *link, int idle)
120 reg.Action = CS_WRITE; 120 reg.Action = CS_WRITE;
121 reg.Offset = CISREG_CCSR; 121 reg.Offset = CISREG_CCSR;
122 reg.Value = (idle ? HCR_IDLE : HCR_RUN) | (reg.Value & HCR_MEM16); 122 reg.Value = (idle ? HCR_IDLE : HCR_RUN) | (reg.Value & HCR_MEM16);
123 CS_CHECK(AccessConfigurationRegister, 123 ret = pcmcia_access_configuration_register(link, &reg);
124 pcmcia_access_configuration_register(link, &reg)); 124 if (ret)
125 goto failed;
125 udelay(1000); 126 udelay(1000);
126 127
127 /* Restore original COR configuration index */ 128 /* Restore original COR configuration index */
128 reg.Action = CS_WRITE; 129 reg.Action = CS_WRITE;
129 reg.Offset = CISREG_COR; 130 reg.Offset = CISREG_COR;
130 reg.Value = (save_cor & ~COR_SOFT_RESET); 131 reg.Value = (save_cor & ~COR_SOFT_RESET);
131 CS_CHECK(AccessConfigurationRegister, 132 ret = pcmcia_access_configuration_register(link, &reg);
132 pcmcia_access_configuration_register(link, &reg)); 133 if (ret)
134 goto failed;
133 udelay(1000); 135 udelay(1000);
134 return 0; 136 return 0;
135 137
136cs_failed: 138failed:
137 cs_error(link, last_fn, last_ret);
138 return -ENODEV; 139 return -ENODEV;
139} 140}
140 141
@@ -181,7 +182,7 @@ spectrum_cs_probe(struct pcmcia_device *link)
181 struct orinoco_private *priv; 182 struct orinoco_private *priv;
182 struct orinoco_pccard *card; 183 struct orinoco_pccard *card;
183 184
184 priv = alloc_orinocodev(sizeof(*card), &handle_to_dev(link), 185 priv = alloc_orinocodev(sizeof(*card), &link->dev,
185 spectrum_cs_hard_reset, 186 spectrum_cs_hard_reset,
186 spectrum_cs_stop_firmware); 187 spectrum_cs_stop_firmware);
187 if (!priv) 188 if (!priv)
@@ -193,10 +194,8 @@ spectrum_cs_probe(struct pcmcia_device *link)
193 link->priv = priv; 194 link->priv = priv;
194 195
195 /* Interrupt setup */ 196 /* Interrupt setup */
196 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT; 197 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
197 link->irq.IRQInfo1 = IRQ_LEVEL_ID;
198 link->irq.Handler = orinoco_interrupt; 198 link->irq.Handler = orinoco_interrupt;
199 link->irq.Instance = priv;
200 199
201 /* General socket configuration defaults can go here. In this 200 /* General socket configuration defaults can go here. In this
202 * client, we assume very little, and rely on the CIS for 201 * client, we assume very little, and rely on the CIS for
@@ -307,7 +306,7 @@ spectrum_cs_config(struct pcmcia_device *link)
307 struct orinoco_private *priv = link->priv; 306 struct orinoco_private *priv = link->priv;
308 struct orinoco_pccard *card = priv->card; 307 struct orinoco_pccard *card = priv->card;
309 hermes_t *hw = &priv->hw; 308 hermes_t *hw = &priv->hw;
310 int last_fn, last_ret; 309 int ret;
311 void __iomem *mem; 310 void __iomem *mem;
312 311
313 /* 312 /*
@@ -324,13 +323,12 @@ spectrum_cs_config(struct pcmcia_device *link)
324 * and most client drivers will only use the CIS to fill in 323 * and most client drivers will only use the CIS to fill in
325 * implementation-defined details. 324 * implementation-defined details.
326 */ 325 */
327 last_ret = pcmcia_loop_config(link, spectrum_cs_config_check, NULL); 326 ret = pcmcia_loop_config(link, spectrum_cs_config_check, NULL);
328 if (last_ret) { 327 if (ret) {
329 if (!ignore_cis_vcc) 328 if (!ignore_cis_vcc)
330 printk(KERN_ERR PFX "GetNextTuple(): No matching " 329 printk(KERN_ERR PFX "GetNextTuple(): No matching "
331 "CIS configuration. Maybe you need the " 330 "CIS configuration. Maybe you need the "
332 "ignore_cis_vcc=1 parameter.\n"); 331 "ignore_cis_vcc=1 parameter.\n");
333 cs_error(link, RequestIO, last_ret);
334 goto failed; 332 goto failed;
335 } 333 }
336 334
@@ -339,14 +337,16 @@ spectrum_cs_config(struct pcmcia_device *link)
339 * a handler to the interrupt, unless the 'Handler' member of 337 * a handler to the interrupt, unless the 'Handler' member of
340 * the irq structure is initialized. 338 * the irq structure is initialized.
341 */ 339 */
342 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); 340 ret = pcmcia_request_irq(link, &link->irq);
341 if (ret)
342 goto failed;
343 343
344 /* We initialize the hermes structure before completing PCMCIA 344 /* We initialize the hermes structure before completing PCMCIA
345 * configuration just in case the interrupt handler gets 345 * configuration just in case the interrupt handler gets
346 * called. */ 346 * called. */
347 mem = ioport_map(link->io.BasePort1, link->io.NumPorts1); 347 mem = ioport_map(link->io.BasePort1, link->io.NumPorts1);
348 if (!mem) 348 if (!mem)
349 goto cs_failed; 349 goto failed;
350 350
351 hermes_struct_init(hw, mem, HERMES_16BIT_REGSPACING); 351 hermes_struct_init(hw, mem, HERMES_16BIT_REGSPACING);
352 352
@@ -355,8 +355,9 @@ spectrum_cs_config(struct pcmcia_device *link)
355 * the I/O windows and the interrupt mapping, and putting the 355 * the I/O windows and the interrupt mapping, and putting the
356 * card and host interface into "Memory and IO" mode. 356 * card and host interface into "Memory and IO" mode.
357 */ 357 */
358 CS_CHECK(RequestConfiguration, 358 ret = pcmcia_request_configuration(link, &link->conf);
359 pcmcia_request_configuration(link, &link->conf)); 359 if (ret)
360 goto failed;
360 361
361 /* Ok, we have the configuration, prepare to register the netdev */ 362 /* Ok, we have the configuration, prepare to register the netdev */
362 card->node.major = card->node.minor = 0; 363 card->node.major = card->node.minor = 0;
@@ -386,9 +387,6 @@ spectrum_cs_config(struct pcmcia_device *link)
386 * net_device has been registered */ 387 * net_device has been registered */
387 return 0; 388 return 0;
388 389
389 cs_failed:
390 cs_error(link, last_fn, last_ret);
391
392 failed: 390 failed:
393 spectrum_cs_release(link); 391 spectrum_cs_release(link);
394 return -ENODEV; 392 return -ENODEV;
diff --git a/drivers/net/wireless/orinoco/wext.c b/drivers/net/wireless/orinoco/wext.c
index 7698fdd6a3a2..fbcc6e1a2e1d 100644
--- a/drivers/net/wireless/orinoco/wext.c
+++ b/drivers/net/wireless/orinoco/wext.c
@@ -2,6 +2,7 @@
2 * 2 *
3 * See copyright notice in main.c 3 * See copyright notice in main.c
4 */ 4 */
5#include <linux/slab.h>
5#include <linux/kernel.h> 6#include <linux/kernel.h>
6#include <linux/if_arp.h> 7#include <linux/if_arp.h>
7#include <linux/wireless.h> 8#include <linux/wireless.h>
@@ -23,7 +24,7 @@
23#define MAX_RID_LEN 1024 24#define MAX_RID_LEN 1024
24 25
25/* Helper routine to record keys 26/* Helper routine to record keys
26 * Do not call from interrupt context */ 27 * It is called under orinoco_lock so it may not sleep */
27static int orinoco_set_key(struct orinoco_private *priv, int index, 28static int orinoco_set_key(struct orinoco_private *priv, int index,
28 enum orinoco_alg alg, const u8 *key, int key_len, 29 enum orinoco_alg alg, const u8 *key, int key_len,
29 const u8 *seq, int seq_len) 30 const u8 *seq, int seq_len)
@@ -32,14 +33,14 @@ static int orinoco_set_key(struct orinoco_private *priv, int index,
32 kzfree(priv->keys[index].seq); 33 kzfree(priv->keys[index].seq);
33 34
34 if (key_len) { 35 if (key_len) {
35 priv->keys[index].key = kzalloc(key_len, GFP_KERNEL); 36 priv->keys[index].key = kzalloc(key_len, GFP_ATOMIC);
36 if (!priv->keys[index].key) 37 if (!priv->keys[index].key)
37 goto nomem; 38 goto nomem;
38 } else 39 } else
39 priv->keys[index].key = NULL; 40 priv->keys[index].key = NULL;
40 41
41 if (seq_len) { 42 if (seq_len) {
42 priv->keys[index].seq = kzalloc(seq_len, GFP_KERNEL); 43 priv->keys[index].seq = kzalloc(seq_len, GFP_ATOMIC);
43 if (!priv->keys[index].seq) 44 if (!priv->keys[index].seq)
44 goto free_key; 45 goto free_key;
45 } else 46 } else
diff --git a/drivers/net/wireless/p54/Kconfig b/drivers/net/wireless/p54/Kconfig
index b45d6a4ed1e8..b0342a520bf1 100644
--- a/drivers/net/wireless/p54/Kconfig
+++ b/drivers/net/wireless/p54/Kconfig
@@ -1,6 +1,6 @@
1config P54_COMMON 1config P54_COMMON
2 tristate "Softmac Prism54 support" 2 tristate "Softmac Prism54 support"
3 depends on MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on MAC80211 && EXPERIMENTAL
4 select FW_LOADER 4 select FW_LOADER
5 ---help--- 5 ---help---
6 This is common code for isl38xx/stlc45xx based modules. 6 This is common code for isl38xx/stlc45xx based modules.
diff --git a/drivers/net/wireless/p54/eeprom.c b/drivers/net/wireless/p54/eeprom.c
index 0efe67deedee..187e263b045a 100644
--- a/drivers/net/wireless/p54/eeprom.c
+++ b/drivers/net/wireless/p54/eeprom.c
@@ -20,6 +20,7 @@
20#include <linux/firmware.h> 20#include <linux/firmware.h>
21#include <linux/etherdevice.h> 21#include <linux/etherdevice.h>
22#include <linux/sort.h> 22#include <linux/sort.h>
23#include <linux/slab.h>
23 24
24#include <net/mac80211.h> 25#include <net/mac80211.h>
25 26
@@ -126,7 +127,7 @@ static int p54_generate_band(struct ieee80211_hw *dev,
126 int ret = -ENOMEM; 127 int ret = -ENOMEM;
127 128
128 if ((!list->entries) || (!list->band_channel_num[band])) 129 if ((!list->entries) || (!list->band_channel_num[band]))
129 return 0; 130 return -EINVAL;
130 131
131 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); 132 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
132 if (!tmp) 133 if (!tmp)
@@ -158,6 +159,7 @@ static int p54_generate_band(struct ieee80211_hw *dev,
158 (list->channels[i].data & CHAN_HAS_CURVE ? "" : 159 (list->channels[i].data & CHAN_HAS_CURVE ? "" :
159 " [curve data]"), 160 " [curve data]"),
160 list->channels[i].index, list->channels[i].freq); 161 list->channels[i].index, list->channels[i].freq);
162 continue;
161 } 163 }
162 164
163 tmp->channels[j].band = list->channels[i].band; 165 tmp->channels[j].band = list->channels[i].band;
@@ -165,7 +167,16 @@ static int p54_generate_band(struct ieee80211_hw *dev,
165 j++; 167 j++;
166 } 168 }
167 169
168 tmp->n_channels = list->band_channel_num[band]; 170 if (j == 0) {
171 printk(KERN_ERR "%s: Disabling totally damaged %s band.\n",
172 wiphy_name(dev->wiphy), (band == IEEE80211_BAND_2GHZ) ?
173 "2 GHz" : "5 GHz");
174
175 ret = -ENODATA;
176 goto err_out;
177 }
178
179 tmp->n_channels = j;
169 old = priv->band_table[band]; 180 old = priv->band_table[band];
170 priv->band_table[band] = tmp; 181 priv->band_table[band] = tmp;
171 if (old) { 182 if (old) {
@@ -228,13 +239,13 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
228 struct p54_common *priv = dev->priv; 239 struct p54_common *priv = dev->priv;
229 struct p54_channel_list *list; 240 struct p54_channel_list *list;
230 unsigned int i, j, max_channel_num; 241 unsigned int i, j, max_channel_num;
231 int ret = -ENOMEM; 242 int ret = 0;
232 u16 freq; 243 u16 freq;
233 244
234 if ((priv->iq_autocal_len != priv->curve_data->entries) || 245 if ((priv->iq_autocal_len != priv->curve_data->entries) ||
235 (priv->iq_autocal_len != priv->output_limit->entries)) 246 (priv->iq_autocal_len != priv->output_limit->entries))
236 printk(KERN_ERR "%s: EEPROM is damaged... you may not be able" 247 printk(KERN_ERR "%s: Unsupported or damaged EEPROM detected. "
237 "to use all channels with this device.\n", 248 "You may not be able to use all channels.\n",
238 wiphy_name(dev->wiphy)); 249 wiphy_name(dev->wiphy));
239 250
240 max_channel_num = max_t(unsigned int, priv->output_limit->entries, 251 max_channel_num = max_t(unsigned int, priv->output_limit->entries,
@@ -243,8 +254,10 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
243 priv->curve_data->entries); 254 priv->curve_data->entries);
244 255
245 list = kzalloc(sizeof(*list), GFP_KERNEL); 256 list = kzalloc(sizeof(*list), GFP_KERNEL);
246 if (!list) 257 if (!list) {
258 ret = -ENOMEM;
247 goto free; 259 goto free;
260 }
248 261
249 list->max_entries = max_channel_num; 262 list->max_entries = max_channel_num;
250 list->channels = kzalloc(sizeof(struct p54_channel_entry) * 263 list->channels = kzalloc(sizeof(struct p54_channel_entry) *
@@ -282,13 +295,8 @@ static int p54_generate_channel_lists(struct ieee80211_hw *dev)
282 p54_compare_channels, NULL); 295 p54_compare_channels, NULL);
283 296
284 for (i = 0, j = 0; i < IEEE80211_NUM_BANDS; i++) { 297 for (i = 0, j = 0; i < IEEE80211_NUM_BANDS; i++) {
285 if (list->band_channel_num[i]) { 298 if (p54_generate_band(dev, list, i) == 0)
286 ret = p54_generate_band(dev, list, i);
287 if (ret)
288 goto free;
289
290 j++; 299 j++;
291 }
292 } 300 }
293 if (j == 0) { 301 if (j == 0) {
294 /* no useable band available. */ 302 /* no useable band available. */
diff --git a/drivers/net/wireless/p54/fwio.c b/drivers/net/wireless/p54/fwio.c
index e7b9e9cb39f5..c43a5d461ab2 100644
--- a/drivers/net/wireless/p54/fwio.c
+++ b/drivers/net/wireless/p54/fwio.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/slab.h>
20#include <linux/firmware.h> 21#include <linux/firmware.h>
21#include <linux/etherdevice.h> 22#include <linux/etherdevice.h>
22 23
diff --git a/drivers/net/wireless/p54/main.c b/drivers/net/wireless/p54/main.c
index 4d486bf9f725..a7cb9eb759a1 100644
--- a/drivers/net/wireless/p54/main.c
+++ b/drivers/net/wireless/p54/main.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/init.h> 19#include <linux/init.h>
20#include <linux/slab.h>
20#include <linux/firmware.h> 21#include <linux/firmware.h>
21#include <linux/etherdevice.h> 22#include <linux/etherdevice.h>
22 23
@@ -33,21 +34,29 @@ MODULE_DESCRIPTION("Softmac Prism54 common code");
33MODULE_LICENSE("GPL"); 34MODULE_LICENSE("GPL");
34MODULE_ALIAS("prism54common"); 35MODULE_ALIAS("prism54common");
35 36
37static int p54_sta_add_remove(struct ieee80211_hw *hw,
38 struct ieee80211_vif *vif,
39 struct ieee80211_sta *sta)
40{
41 struct p54_common *priv = hw->priv;
42
43 /*
44 * Notify the firmware that we don't want or we don't
45 * need to buffer frames for this station anymore.
46 */
47
48 p54_sta_unlock(priv, sta->addr);
49
50 return 0;
51}
52
36static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif, 53static void p54_sta_notify(struct ieee80211_hw *dev, struct ieee80211_vif *vif,
37 enum sta_notify_cmd notify_cmd, 54 enum sta_notify_cmd notify_cmd,
38 struct ieee80211_sta *sta) 55 struct ieee80211_sta *sta)
39{ 56{
40 struct p54_common *priv = dev->priv; 57 struct p54_common *priv = dev->priv;
41 switch (notify_cmd) {
42 case STA_NOTIFY_ADD:
43 case STA_NOTIFY_REMOVE:
44 /*
45 * Notify the firmware that we don't want or we don't
46 * need to buffer frames for this station anymore.
47 */
48 58
49 p54_sta_unlock(priv, sta->addr); 59 switch (notify_cmd) {
50 break;
51 case STA_NOTIFY_AWAKE: 60 case STA_NOTIFY_AWAKE:
52 /* update the firmware's filter table */ 61 /* update the firmware's filter table */
53 p54_sta_unlock(priv, sta->addr); 62 p54_sta_unlock(priv, sta->addr);
@@ -216,7 +225,7 @@ static void p54_stop(struct ieee80211_hw *dev)
216} 225}
217 226
218static int p54_add_interface(struct ieee80211_hw *dev, 227static int p54_add_interface(struct ieee80211_hw *dev,
219 struct ieee80211_if_init_conf *conf) 228 struct ieee80211_vif *vif)
220{ 229{
221 struct p54_common *priv = dev->priv; 230 struct p54_common *priv = dev->priv;
222 231
@@ -226,28 +235,28 @@ static int p54_add_interface(struct ieee80211_hw *dev,
226 return -EOPNOTSUPP; 235 return -EOPNOTSUPP;
227 } 236 }
228 237
229 priv->vif = conf->vif; 238 priv->vif = vif;
230 239
231 switch (conf->type) { 240 switch (vif->type) {
232 case NL80211_IFTYPE_STATION: 241 case NL80211_IFTYPE_STATION:
233 case NL80211_IFTYPE_ADHOC: 242 case NL80211_IFTYPE_ADHOC:
234 case NL80211_IFTYPE_AP: 243 case NL80211_IFTYPE_AP:
235 case NL80211_IFTYPE_MESH_POINT: 244 case NL80211_IFTYPE_MESH_POINT:
236 priv->mode = conf->type; 245 priv->mode = vif->type;
237 break; 246 break;
238 default: 247 default:
239 mutex_unlock(&priv->conf_mutex); 248 mutex_unlock(&priv->conf_mutex);
240 return -EOPNOTSUPP; 249 return -EOPNOTSUPP;
241 } 250 }
242 251
243 memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN); 252 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
244 p54_setup_mac(priv); 253 p54_setup_mac(priv);
245 mutex_unlock(&priv->conf_mutex); 254 mutex_unlock(&priv->conf_mutex);
246 return 0; 255 return 0;
247} 256}
248 257
249static void p54_remove_interface(struct ieee80211_hw *dev, 258static void p54_remove_interface(struct ieee80211_hw *dev,
250 struct ieee80211_if_init_conf *conf) 259 struct ieee80211_vif *vif)
251{ 260{
252 struct p54_common *priv = dev->priv; 261 struct p54_common *priv = dev->priv;
253 262
@@ -358,16 +367,6 @@ static int p54_get_stats(struct ieee80211_hw *dev,
358 return 0; 367 return 0;
359} 368}
360 369
361static int p54_get_tx_stats(struct ieee80211_hw *dev,
362 struct ieee80211_tx_queue_stats *stats)
363{
364 struct p54_common *priv = dev->priv;
365
366 memcpy(stats, &priv->tx_stats[P54_QUEUE_DATA],
367 sizeof(stats[0]) * dev->queues);
368 return 0;
369}
370
371static void p54_bss_info_changed(struct ieee80211_hw *dev, 370static void p54_bss_info_changed(struct ieee80211_hw *dev,
372 struct ieee80211_vif *vif, 371 struct ieee80211_vif *vif,
373 struct ieee80211_bss_conf *info, 372 struct ieee80211_bss_conf *info,
@@ -516,13 +515,14 @@ static const struct ieee80211_ops p54_ops = {
516 .remove_interface = p54_remove_interface, 515 .remove_interface = p54_remove_interface,
517 .set_tim = p54_set_tim, 516 .set_tim = p54_set_tim,
518 .sta_notify = p54_sta_notify, 517 .sta_notify = p54_sta_notify,
518 .sta_add = p54_sta_add_remove,
519 .sta_remove = p54_sta_add_remove,
519 .set_key = p54_set_key, 520 .set_key = p54_set_key,
520 .config = p54_config, 521 .config = p54_config,
521 .bss_info_changed = p54_bss_info_changed, 522 .bss_info_changed = p54_bss_info_changed,
522 .configure_filter = p54_configure_filter, 523 .configure_filter = p54_configure_filter,
523 .conf_tx = p54_conf_tx, 524 .conf_tx = p54_conf_tx,
524 .get_stats = p54_get_stats, 525 .get_stats = p54_get_stats,
525 .get_tx_stats = p54_get_tx_stats
526}; 526};
527 527
528struct ieee80211_hw *p54_init_common(size_t priv_data_len) 528struct ieee80211_hw *p54_init_common(size_t priv_data_len)
@@ -579,7 +579,7 @@ struct ieee80211_hw *p54_init_common(size_t priv_data_len)
579 * For now, disable PS by default because it affects 579 * For now, disable PS by default because it affects
580 * link stability significantly. 580 * link stability significantly.
581 */ 581 */
582 dev->wiphy->ps_default = false; 582 dev->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
583 583
584 mutex_init(&priv->conf_mutex); 584 mutex_init(&priv->conf_mutex);
585 mutex_init(&priv->eeprom_mutex); 585 mutex_init(&priv->eeprom_mutex);
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h
index 1afc39410e85..43a3b2ead81a 100644
--- a/drivers/net/wireless/p54/p54.h
+++ b/drivers/net/wireless/p54/p54.h
@@ -157,6 +157,12 @@ struct p54_led_dev {
157 157
158#endif /* CONFIG_P54_LEDS */ 158#endif /* CONFIG_P54_LEDS */
159 159
160struct p54_tx_queue_stats {
161 unsigned int len;
162 unsigned int limit;
163 unsigned int count;
164};
165
160struct p54_common { 166struct p54_common {
161 struct ieee80211_hw *hw; 167 struct ieee80211_hw *hw;
162 struct ieee80211_vif *vif; 168 struct ieee80211_vif *vif;
@@ -183,7 +189,7 @@ struct p54_common {
183 /* (e)DCF / QOS state */ 189 /* (e)DCF / QOS state */
184 bool use_short_slot; 190 bool use_short_slot;
185 spinlock_t tx_stats_lock; 191 spinlock_t tx_stats_lock;
186 struct ieee80211_tx_queue_stats tx_stats[8]; 192 struct p54_tx_queue_stats tx_stats[8];
187 struct p54_edcf_queue_param qos_params[8]; 193 struct p54_edcf_queue_param qos_params[8];
188 194
189 /* Radio data */ 195 /* Radio data */
diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c
index d348c265e867..c24067f1a0cb 100644
--- a/drivers/net/wireless/p54/p54pci.c
+++ b/drivers/net/wireless/p54/p54pci.c
@@ -15,6 +15,7 @@
15 15
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/slab.h>
18#include <linux/firmware.h> 19#include <linux/firmware.h>
19#include <linux/etherdevice.h> 20#include <linux/etherdevice.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
@@ -31,7 +32,7 @@ MODULE_LICENSE("GPL");
31MODULE_ALIAS("prism54pci"); 32MODULE_ALIAS("prism54pci");
32MODULE_FIRMWARE("isl3886pci"); 33MODULE_FIRMWARE("isl3886pci");
33 34
34static struct pci_device_id p54p_table[] __devinitdata = { 35static DEFINE_PCI_DEVICE_TABLE(p54p_table) = {
35 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */ 36 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
36 { PCI_DEVICE(0x1260, 0x3890) }, 37 { PCI_DEVICE(0x1260, 0x3890) },
37 /* 3COM 3CRWE154G72 Wireless LAN adapter */ 38 /* 3COM 3CRWE154G72 Wireless LAN adapter */
@@ -157,6 +158,14 @@ static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
157 skb_tail_pointer(skb), 158 skb_tail_pointer(skb),
158 priv->common.rx_mtu + 32, 159 priv->common.rx_mtu + 32,
159 PCI_DMA_FROMDEVICE); 160 PCI_DMA_FROMDEVICE);
161
162 if (pci_dma_mapping_error(priv->pdev, mapping)) {
163 dev_kfree_skb_any(skb);
164 dev_err(&priv->pdev->dev,
165 "RX DMA Mapping error\n");
166 break;
167 }
168
160 desc->host_addr = cpu_to_le32(mapping); 169 desc->host_addr = cpu_to_le32(mapping);
161 desc->device_addr = 0; // FIXME: necessary? 170 desc->device_addr = 0; // FIXME: necessary?
162 desc->len = cpu_to_le16(priv->common.rx_mtu + 32); 171 desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
@@ -197,6 +206,14 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
197 i %= ring_limit; 206 i %= ring_limit;
198 continue; 207 continue;
199 } 208 }
209
210 if (unlikely(len > priv->common.rx_mtu)) {
211 if (net_ratelimit())
212 dev_err(&priv->pdev->dev, "rx'd frame size "
213 "exceeds length threshold.\n");
214
215 len = priv->common.rx_mtu;
216 }
200 skb_put(skb, len); 217 skb_put(skb, len);
201 218
202 if (p54_rx(dev, skb)) { 219 if (p54_rx(dev, skb)) {
@@ -218,25 +235,24 @@ static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
218 p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf); 235 p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf);
219} 236}
220 237
221/* caller must hold priv->lock */
222static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index, 238static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
223 int ring_index, struct p54p_desc *ring, u32 ring_limit, 239 int ring_index, struct p54p_desc *ring, u32 ring_limit,
224 void **tx_buf) 240 struct sk_buff **tx_buf)
225{ 241{
226 struct p54p_priv *priv = dev->priv; 242 struct p54p_priv *priv = dev->priv;
227 struct p54p_ring_control *ring_control = priv->ring_control; 243 struct p54p_ring_control *ring_control = priv->ring_control;
228 struct p54p_desc *desc; 244 struct p54p_desc *desc;
245 struct sk_buff *skb;
229 u32 idx, i; 246 u32 idx, i;
230 247
231 i = (*index) % ring_limit; 248 i = (*index) % ring_limit;
232 (*index) = idx = le32_to_cpu(ring_control->device_idx[1]); 249 (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
233 idx %= ring_limit; 250 idx %= ring_limit;
234 251
235 while (i != idx) { 252 while (i != idx) {
236 desc = &ring[i]; 253 desc = &ring[i];
237 if (tx_buf[i]) 254
238 if (FREE_AFTER_TX((struct sk_buff *) tx_buf[i])) 255 skb = tx_buf[i];
239 p54_free_skb(dev, tx_buf[i]);
240 tx_buf[i] = NULL; 256 tx_buf[i] = NULL;
241 257
242 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr), 258 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
@@ -247,17 +263,28 @@ static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
247 desc->len = 0; 263 desc->len = 0;
248 desc->flags = 0; 264 desc->flags = 0;
249 265
266 if (skb && FREE_AFTER_TX(skb))
267 p54_free_skb(dev, skb);
268
250 i++; 269 i++;
251 i %= ring_limit; 270 i %= ring_limit;
252 } 271 }
253} 272}
254 273
255static void p54p_rx_tasklet(unsigned long dev_id) 274static void p54p_tasklet(unsigned long dev_id)
256{ 275{
257 struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id; 276 struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
258 struct p54p_priv *priv = dev->priv; 277 struct p54p_priv *priv = dev->priv;
259 struct p54p_ring_control *ring_control = priv->ring_control; 278 struct p54p_ring_control *ring_control = priv->ring_control;
260 279
280 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt,
281 ARRAY_SIZE(ring_control->tx_mgmt),
282 priv->tx_buf_mgmt);
283
284 p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data,
285 ARRAY_SIZE(ring_control->tx_data),
286 priv->tx_buf_data);
287
261 p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt, 288 p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
262 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt); 289 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
263 290
@@ -272,59 +299,49 @@ static irqreturn_t p54p_interrupt(int irq, void *dev_id)
272{ 299{
273 struct ieee80211_hw *dev = dev_id; 300 struct ieee80211_hw *dev = dev_id;
274 struct p54p_priv *priv = dev->priv; 301 struct p54p_priv *priv = dev->priv;
275 struct p54p_ring_control *ring_control = priv->ring_control;
276 __le32 reg; 302 __le32 reg;
277 303
278 spin_lock(&priv->lock);
279 reg = P54P_READ(int_ident); 304 reg = P54P_READ(int_ident);
280 if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) { 305 if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
281 spin_unlock(&priv->lock); 306 goto out;
282 return IRQ_HANDLED;
283 } 307 }
284
285 P54P_WRITE(int_ack, reg); 308 P54P_WRITE(int_ack, reg);
286 309
287 reg &= P54P_READ(int_enable); 310 reg &= P54P_READ(int_enable);
288 311
289 if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) { 312 if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE))
290 p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 313 tasklet_schedule(&priv->tasklet);
291 3, ring_control->tx_mgmt, 314 else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
292 ARRAY_SIZE(ring_control->tx_mgmt),
293 priv->tx_buf_mgmt);
294
295 p54p_check_tx_ring(dev, &priv->tx_idx_data,
296 1, ring_control->tx_data,
297 ARRAY_SIZE(ring_control->tx_data),
298 priv->tx_buf_data);
299
300 tasklet_schedule(&priv->rx_tasklet);
301
302 } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
303 complete(&priv->boot_comp); 315 complete(&priv->boot_comp);
304 316
305 spin_unlock(&priv->lock); 317out:
306
307 return reg ? IRQ_HANDLED : IRQ_NONE; 318 return reg ? IRQ_HANDLED : IRQ_NONE;
308} 319}
309 320
310static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb) 321static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
311{ 322{
323 unsigned long flags;
312 struct p54p_priv *priv = dev->priv; 324 struct p54p_priv *priv = dev->priv;
313 struct p54p_ring_control *ring_control = priv->ring_control; 325 struct p54p_ring_control *ring_control = priv->ring_control;
314 unsigned long flags;
315 struct p54p_desc *desc; 326 struct p54p_desc *desc;
316 dma_addr_t mapping; 327 dma_addr_t mapping;
317 u32 device_idx, idx, i; 328 u32 device_idx, idx, i;
318 329
319 spin_lock_irqsave(&priv->lock, flags); 330 spin_lock_irqsave(&priv->lock, flags);
320
321 device_idx = le32_to_cpu(ring_control->device_idx[1]); 331 device_idx = le32_to_cpu(ring_control->device_idx[1]);
322 idx = le32_to_cpu(ring_control->host_idx[1]); 332 idx = le32_to_cpu(ring_control->host_idx[1]);
323 i = idx % ARRAY_SIZE(ring_control->tx_data); 333 i = idx % ARRAY_SIZE(ring_control->tx_data);
324 334
325 priv->tx_buf_data[i] = skb;
326 mapping = pci_map_single(priv->pdev, skb->data, skb->len, 335 mapping = pci_map_single(priv->pdev, skb->data, skb->len,
327 PCI_DMA_TODEVICE); 336 PCI_DMA_TODEVICE);
337 if (pci_dma_mapping_error(priv->pdev, mapping)) {
338 spin_unlock_irqrestore(&priv->lock, flags);
339 p54_free_skb(dev, skb);
340 dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
341 return ;
342 }
343 priv->tx_buf_data[i] = skb;
344
328 desc = &ring_control->tx_data[i]; 345 desc = &ring_control->tx_data[i];
329 desc->host_addr = cpu_to_le32(mapping); 346 desc->host_addr = cpu_to_le32(mapping);
330 desc->device_addr = ((struct p54_hdr *)skb->data)->req_id; 347 desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
@@ -346,14 +363,14 @@ static void p54p_stop(struct ieee80211_hw *dev)
346 unsigned int i; 363 unsigned int i;
347 struct p54p_desc *desc; 364 struct p54p_desc *desc;
348 365
349 tasklet_kill(&priv->rx_tasklet);
350
351 P54P_WRITE(int_enable, cpu_to_le32(0)); 366 P54P_WRITE(int_enable, cpu_to_le32(0));
352 P54P_READ(int_enable); 367 P54P_READ(int_enable);
353 udelay(10); 368 udelay(10);
354 369
355 free_irq(priv->pdev->irq, dev); 370 free_irq(priv->pdev->irq, dev);
356 371
372 tasklet_kill(&priv->tasklet);
373
357 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET)); 374 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
358 375
359 for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) { 376 for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
@@ -411,7 +428,7 @@ static int p54p_open(struct ieee80211_hw *dev)
411 int err; 428 int err;
412 429
413 init_completion(&priv->boot_comp); 430 init_completion(&priv->boot_comp);
414 err = request_irq(priv->pdev->irq, &p54p_interrupt, 431 err = request_irq(priv->pdev->irq, p54p_interrupt,
415 IRQF_SHARED, "p54pci", dev); 432 IRQF_SHARED, "p54pci", dev);
416 if (err) { 433 if (err) {
417 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n"); 434 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n");
@@ -537,7 +554,7 @@ static int __devinit p54p_probe(struct pci_dev *pdev,
537 priv->common.tx = p54p_tx; 554 priv->common.tx = p54p_tx;
538 555
539 spin_lock_init(&priv->lock); 556 spin_lock_init(&priv->lock);
540 tasklet_init(&priv->rx_tasklet, p54p_rx_tasklet, (unsigned long)dev); 557 tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev);
541 558
542 err = request_firmware(&priv->firmware, "isl3886pci", 559 err = request_firmware(&priv->firmware, "isl3886pci",
543 &priv->pdev->dev); 560 &priv->pdev->dev);
diff --git a/drivers/net/wireless/p54/p54pci.h b/drivers/net/wireless/p54/p54pci.h
index fbb683953fb2..2feead617a3b 100644
--- a/drivers/net/wireless/p54/p54pci.h
+++ b/drivers/net/wireless/p54/p54pci.h
@@ -92,7 +92,7 @@ struct p54p_priv {
92 struct p54_common common; 92 struct p54_common common;
93 struct pci_dev *pdev; 93 struct pci_dev *pdev;
94 struct p54p_csr __iomem *map; 94 struct p54p_csr __iomem *map;
95 struct tasklet_struct rx_tasklet; 95 struct tasklet_struct tasklet;
96 const struct firmware *firmware; 96 const struct firmware *firmware;
97 spinlock_t lock; 97 spinlock_t lock;
98 struct p54p_ring_control *ring_control; 98 struct p54p_ring_control *ring_control;
@@ -101,8 +101,8 @@ struct p54p_priv {
101 u32 rx_idx_mgmt, tx_idx_mgmt; 101 u32 rx_idx_mgmt, tx_idx_mgmt;
102 struct sk_buff *rx_buf_data[8]; 102 struct sk_buff *rx_buf_data[8];
103 struct sk_buff *rx_buf_mgmt[4]; 103 struct sk_buff *rx_buf_mgmt[4];
104 void *tx_buf_data[32]; 104 struct sk_buff *tx_buf_data[32];
105 void *tx_buf_mgmt[4]; 105 struct sk_buff *tx_buf_mgmt[4];
106 struct completion boot_comp; 106 struct completion boot_comp;
107}; 107};
108 108
diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c
index afd26bf06649..c8f09da1f84d 100644
--- a/drivers/net/wireless/p54/p54spi.c
+++ b/drivers/net/wireless/p54/p54spi.c
@@ -29,6 +29,7 @@
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/etherdevice.h> 30#include <linux/etherdevice.h>
31#include <linux/gpio.h> 31#include <linux/gpio.h>
32#include <linux/slab.h>
32 33
33#include "p54spi.h" 34#include "p54spi.h"
34#include "p54spi_eeprom.h" 35#include "p54spi_eeprom.h"
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 92af9b96bb7a..743a6c68b29d 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/usb.h> 16#include <linux/usb.h>
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/slab.h>
18#include <linux/firmware.h> 19#include <linux/firmware.h>
19#include <linux/etherdevice.h> 20#include <linux/etherdevice.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
@@ -35,7 +36,9 @@ MODULE_FIRMWARE("isl3887usb");
35static struct usb_device_id p54u_table[] __devinitdata = { 36static struct usb_device_id p54u_table[] __devinitdata = {
36 /* Version 1 devices (pci chip + net2280) */ 37 /* Version 1 devices (pci chip + net2280) */
37 {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */ 38 {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */
39 {USB_DEVICE(0x06b9, 0x0120)}, /* Thomson SpeedTouch 120g */
38 {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */ 40 {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */
41 {USB_DEVICE(0x07aa, 0x001c)}, /* Corega CG-WLUSB2GT */
39 {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */ 42 {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */
40 {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */ 43 {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */
41 {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */ 44 {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */
@@ -60,6 +63,7 @@ static struct usb_device_id p54u_table[] __devinitdata = {
60 {USB_DEVICE(0x06b9, 0x0121)}, /* Thomson SpeedTouch 121g */ 63 {USB_DEVICE(0x06b9, 0x0121)}, /* Thomson SpeedTouch 121g */
61 {USB_DEVICE(0x0707, 0xee13)}, /* SMC 2862W-G version 2 */ 64 {USB_DEVICE(0x0707, 0xee13)}, /* SMC 2862W-G version 2 */
62 {USB_DEVICE(0x083a, 0x4521)}, /* Siemens Gigaset USB Adapter 54 version 2 */ 65 {USB_DEVICE(0x083a, 0x4521)}, /* Siemens Gigaset USB Adapter 54 version 2 */
66 {USB_DEVICE(0x083a, 0xf503)}, /* Accton FD7050E ver 1010ec */
63 {USB_DEVICE(0x0846, 0x4240)}, /* Netgear WG111 (v2) */ 67 {USB_DEVICE(0x0846, 0x4240)}, /* Netgear WG111 (v2) */
64 {USB_DEVICE(0x0915, 0x2000)}, /* Cohiba Proto board */ 68 {USB_DEVICE(0x0915, 0x2000)}, /* Cohiba Proto board */
65 {USB_DEVICE(0x0915, 0x2002)}, /* Cohiba Proto board */ 69 {USB_DEVICE(0x0915, 0x2002)}, /* Cohiba Proto board */
diff --git a/drivers/net/wireless/p54/txrx.c b/drivers/net/wireless/p54/txrx.c
index b6dda2b27fb5..66057999a93c 100644
--- a/drivers/net/wireless/p54/txrx.c
+++ b/drivers/net/wireless/p54/txrx.c
@@ -183,10 +183,10 @@ static int p54_tx_qos_accounting_alloc(struct p54_common *priv,
183 struct sk_buff *skb, 183 struct sk_buff *skb,
184 const u16 p54_queue) 184 const u16 p54_queue)
185{ 185{
186 struct ieee80211_tx_queue_stats *queue; 186 struct p54_tx_queue_stats *queue;
187 unsigned long flags; 187 unsigned long flags;
188 188
189 if (WARN_ON(p54_queue > P54_QUEUE_NUM)) 189 if (WARN_ON(p54_queue >= P54_QUEUE_NUM))
190 return -EINVAL; 190 return -EINVAL;
191 191
192 queue = &priv->tx_stats[p54_queue]; 192 queue = &priv->tx_stats[p54_queue];
diff --git a/drivers/net/wireless/prism54/isl_ioctl.c b/drivers/net/wireless/prism54/isl_ioctl.c
index bc08464d8323..a45818ebfdfb 100644
--- a/drivers/net/wireless/prism54/isl_ioctl.c
+++ b/drivers/net/wireless/prism54/isl_ioctl.c
@@ -23,6 +23,7 @@
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/if_arp.h> 25#include <linux/if_arp.h>
26#include <linux/slab.h>
26#include <linux/pci.h> 27#include <linux/pci.h>
27 28
28#include <asm/uaccess.h> 29#include <asm/uaccess.h>
@@ -1897,7 +1898,7 @@ prism54_get_mac(struct net_device *ndev, struct iw_request_info *info,
1897 return 0; 1898 return 0;
1898} 1899}
1899 1900
1900/* Setting policy also clears the MAC acl, even if we don't change the defaut 1901/* Setting policy also clears the MAC acl, even if we don't change the default
1901 * policy 1902 * policy
1902 */ 1903 */
1903 1904
@@ -2323,7 +2324,7 @@ prism54_process_trap_helper(islpci_private *priv, enum oid_num_t oid,
2323 2324
2324 case DOT11_OID_BEACON: 2325 case DOT11_OID_BEACON:
2325 send_formatted_event(priv, 2326 send_formatted_event(priv,
2326 "Received a beacon from an unkown AP", 2327 "Received a beacon from an unknown AP",
2327 mlme, 0); 2328 mlme, 0);
2328 break; 2329 break;
2329 2330
diff --git a/drivers/net/wireless/prism54/islpci_dev.c b/drivers/net/wireless/prism54/islpci_dev.c
index 2505be56ae39..689d59a13d5b 100644
--- a/drivers/net/wireless/prism54/islpci_dev.c
+++ b/drivers/net/wireless/prism54/islpci_dev.c
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/slab.h>
22 23
23#include <linux/netdevice.h> 24#include <linux/netdevice.h>
24#include <linux/ethtool.h> 25#include <linux/ethtool.h>
@@ -41,6 +42,9 @@
41#define ISL3877_IMAGE_FILE "isl3877" 42#define ISL3877_IMAGE_FILE "isl3877"
42#define ISL3886_IMAGE_FILE "isl3886" 43#define ISL3886_IMAGE_FILE "isl3886"
43#define ISL3890_IMAGE_FILE "isl3890" 44#define ISL3890_IMAGE_FILE "isl3890"
45MODULE_FIRMWARE(ISL3877_IMAGE_FILE);
46MODULE_FIRMWARE(ISL3886_IMAGE_FILE);
47MODULE_FIRMWARE(ISL3890_IMAGE_FILE);
44 48
45static int prism54_bring_down(islpci_private *); 49static int prism54_bring_down(islpci_private *);
46static int islpci_alloc_memory(islpci_private *); 50static int islpci_alloc_memory(islpci_private *);
diff --git a/drivers/net/wireless/prism54/islpci_eth.c b/drivers/net/wireless/prism54/islpci_eth.c
index 872b64783e78..ac99eaaeabce 100644
--- a/drivers/net/wireless/prism54/islpci_eth.c
+++ b/drivers/net/wireless/prism54/islpci_eth.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/gfp.h>
20 21
21#include <linux/pci.h> 22#include <linux/pci.h>
22#include <linux/delay.h> 23#include <linux/delay.h>
diff --git a/drivers/net/wireless/prism54/islpci_hotplug.c b/drivers/net/wireless/prism54/islpci_hotplug.c
index 83d366258c81..dc14420a9adc 100644
--- a/drivers/net/wireless/prism54/islpci_hotplug.c
+++ b/drivers/net/wireless/prism54/islpci_hotplug.c
@@ -39,7 +39,7 @@ module_param(init_pcitm, int, 0);
39 * driver_data 39 * driver_data
40 * If you have an update for this please contact prism54-devel@prism54.org 40 * If you have an update for this please contact prism54-devel@prism54.org
41 * The latest list can be found at http://prism54.org/supported_cards.php */ 41 * The latest list can be found at http://prism54.org/supported_cards.php */
42static const struct pci_device_id prism54_id_tbl[] = { 42static DEFINE_PCI_DEVICE_TABLE(prism54_id_tbl) = {
43 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */ 43 /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
44 { 44 {
45 0x1260, 0x3890, 45 0x1260, 0x3890,
@@ -181,7 +181,7 @@ prism54_probe(struct pci_dev *pdev, const struct pci_device_id *id)
181 isl38xx_disable_interrupts(priv->device_base); 181 isl38xx_disable_interrupts(priv->device_base);
182 182
183 /* request for the interrupt before uploading the firmware */ 183 /* request for the interrupt before uploading the firmware */
184 rvalue = request_irq(pdev->irq, &islpci_interrupt, 184 rvalue = request_irq(pdev->irq, islpci_interrupt,
185 IRQF_SHARED, ndev->name, priv); 185 IRQF_SHARED, ndev->name, priv);
186 186
187 if (rvalue) { 187 if (rvalue) {
diff --git a/drivers/net/wireless/prism54/islpci_mgt.c b/drivers/net/wireless/prism54/islpci_mgt.c
index 69d2f882fd06..adb289723a96 100644
--- a/drivers/net/wireless/prism54/islpci_mgt.c
+++ b/drivers/net/wireless/prism54/islpci_mgt.c
@@ -21,6 +21,7 @@
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/sched.h> 23#include <linux/sched.h>
24#include <linux/slab.h>
24 25
25#include <asm/io.h> 26#include <asm/io.h>
26#include <asm/system.h> 27#include <asm/system.h>
diff --git a/drivers/net/wireless/prism54/islpci_mgt.h b/drivers/net/wireless/prism54/islpci_mgt.h
index 87a1734663da..0b27e50fe0d5 100644
--- a/drivers/net/wireless/prism54/islpci_mgt.h
+++ b/drivers/net/wireless/prism54/islpci_mgt.h
@@ -22,6 +22,7 @@
22 22
23#include <linux/wireless.h> 23#include <linux/wireless.h>
24#include <linux/skbuff.h> 24#include <linux/skbuff.h>
25#include <linux/slab.h>
25 26
26/* 27/*
27 * Function definitions 28 * Function definitions
diff --git a/drivers/net/wireless/prism54/oid_mgt.c b/drivers/net/wireless/prism54/oid_mgt.c
index 1187e6112a64..d66933d70fb9 100644
--- a/drivers/net/wireless/prism54/oid_mgt.c
+++ b/drivers/net/wireless/prism54/oid_mgt.c
@@ -17,6 +17,7 @@
17 */ 17 */
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/slab.h>
20 21
21#include "prismcompat.h" 22#include "prismcompat.h"
22#include "islpci_dev.h" 23#include "islpci_dev.h"
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c
index 1c88c2ea59aa..11865ea21875 100644
--- a/drivers/net/wireless/ray_cs.c
+++ b/drivers/net/wireless/ray_cs.c
@@ -35,7 +35,6 @@
35#include <linux/proc_fs.h> 35#include <linux/proc_fs.h>
36#include <linux/ptrace.h> 36#include <linux/ptrace.h>
37#include <linux/seq_file.h> 37#include <linux/seq_file.h>
38#include <linux/slab.h>
39#include <linux/string.h> 38#include <linux/string.h>
40#include <linux/timer.h> 39#include <linux/timer.h>
41#include <linux/init.h> 40#include <linux/init.h>
@@ -71,25 +70,7 @@ typedef u_char mac_addr[ETH_ALEN]; /* Hardware address */
71#include "rayctl.h" 70#include "rayctl.h"
72#include "ray_cs.h" 71#include "ray_cs.h"
73 72
74/* All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
75 you do not define PCMCIA_DEBUG at all, all the debug code will be
76 left out. If you compile with PCMCIA_DEBUG=0, the debug code will
77 be present but disabled -- but it can then be enabled for specific
78 modules at load time with a 'pc_debug=#' option to insmod.
79*/
80 73
81#ifdef RAYLINK_DEBUG
82#define PCMCIA_DEBUG RAYLINK_DEBUG
83#endif
84#ifdef PCMCIA_DEBUG
85static int ray_debug;
86static int pc_debug = PCMCIA_DEBUG;
87module_param(pc_debug, int, 0);
88/* #define DEBUG(n, args...) if (pc_debug>(n)) printk(KERN_DEBUG args); */
89#define DEBUG(n, args...) if (pc_debug > (n)) printk(args);
90#else
91#define DEBUG(n, args...)
92#endif
93/** Prototypes based on PCMCIA skeleton driver *******************************/ 74/** Prototypes based on PCMCIA skeleton driver *******************************/
94static int ray_config(struct pcmcia_device *link); 75static int ray_config(struct pcmcia_device *link);
95static void ray_release(struct pcmcia_device *link); 76static void ray_release(struct pcmcia_device *link);
@@ -325,7 +306,7 @@ static int ray_probe(struct pcmcia_device *p_dev)
325 ray_dev_t *local; 306 ray_dev_t *local;
326 struct net_device *dev; 307 struct net_device *dev;
327 308
328 DEBUG(1, "ray_attach()\n"); 309 dev_dbg(&p_dev->dev, "ray_attach()\n");
329 310
330 /* Allocate space for private device-specific data */ 311 /* Allocate space for private device-specific data */
331 dev = alloc_etherdev(sizeof(ray_dev_t)); 312 dev = alloc_etherdev(sizeof(ray_dev_t));
@@ -341,8 +322,7 @@ static int ray_probe(struct pcmcia_device *p_dev)
341 p_dev->io.IOAddrLines = 5; 322 p_dev->io.IOAddrLines = 5;
342 323
343 /* Interrupt setup. For PCMCIA, driver takes what's given */ 324 /* Interrupt setup. For PCMCIA, driver takes what's given */
344 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT; 325 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
345 p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
346 p_dev->irq.Handler = &ray_interrupt; 326 p_dev->irq.Handler = &ray_interrupt;
347 327
348 /* General socket configuration */ 328 /* General socket configuration */
@@ -351,13 +331,12 @@ static int ray_probe(struct pcmcia_device *p_dev)
351 p_dev->conf.ConfigIndex = 1; 331 p_dev->conf.ConfigIndex = 1;
352 332
353 p_dev->priv = dev; 333 p_dev->priv = dev;
354 p_dev->irq.Instance = dev;
355 334
356 local->finder = p_dev; 335 local->finder = p_dev;
357 local->card_status = CARD_INSERTED; 336 local->card_status = CARD_INSERTED;
358 local->authentication_state = UNAUTHENTICATED; 337 local->authentication_state = UNAUTHENTICATED;
359 local->num_multi = 0; 338 local->num_multi = 0;
360 DEBUG(2, "ray_attach p_dev = %p, dev = %p, local = %p, intr = %p\n", 339 dev_dbg(&p_dev->dev, "ray_attach p_dev = %p, dev = %p, local = %p, intr = %p\n",
361 p_dev, dev, local, &ray_interrupt); 340 p_dev, dev, local, &ray_interrupt);
362 341
363 /* Raylink entries in the device structure */ 342 /* Raylink entries in the device structure */
@@ -370,7 +349,7 @@ static int ray_probe(struct pcmcia_device *p_dev)
370#endif /* WIRELESS_SPY */ 349#endif /* WIRELESS_SPY */
371 350
372 351
373 DEBUG(2, "ray_cs ray_attach calling ether_setup.)\n"); 352 dev_dbg(&p_dev->dev, "ray_cs ray_attach calling ether_setup.)\n");
374 netif_stop_queue(dev); 353 netif_stop_queue(dev);
375 354
376 init_timer(&local->timer); 355 init_timer(&local->timer);
@@ -393,7 +372,7 @@ static void ray_detach(struct pcmcia_device *link)
393 struct net_device *dev; 372 struct net_device *dev;
394 ray_dev_t *local; 373 ray_dev_t *local;
395 374
396 DEBUG(1, "ray_detach(0x%p)\n", link); 375 dev_dbg(&link->dev, "ray_detach\n");
397 376
398 this_device = NULL; 377 this_device = NULL;
399 dev = link->priv; 378 dev = link->priv;
@@ -408,7 +387,7 @@ static void ray_detach(struct pcmcia_device *link)
408 unregister_netdev(dev); 387 unregister_netdev(dev);
409 free_netdev(dev); 388 free_netdev(dev);
410 } 389 }
411 DEBUG(2, "ray_cs ray_detach ending\n"); 390 dev_dbg(&link->dev, "ray_cs ray_detach ending\n");
412} /* ray_detach */ 391} /* ray_detach */
413 392
414/*============================================================================= 393/*=============================================================================
@@ -416,19 +395,17 @@ static void ray_detach(struct pcmcia_device *link)
416 is received, to configure the PCMCIA socket, and to make the 395 is received, to configure the PCMCIA socket, and to make the
417 ethernet device available to the system. 396 ethernet device available to the system.
418=============================================================================*/ 397=============================================================================*/
419#define CS_CHECK(fn, ret) \
420do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
421#define MAX_TUPLE_SIZE 128 398#define MAX_TUPLE_SIZE 128
422static int ray_config(struct pcmcia_device *link) 399static int ray_config(struct pcmcia_device *link)
423{ 400{
424 int last_fn = 0, last_ret = 0; 401 int ret = 0;
425 int i; 402 int i;
426 win_req_t req; 403 win_req_t req;
427 memreq_t mem; 404 memreq_t mem;
428 struct net_device *dev = (struct net_device *)link->priv; 405 struct net_device *dev = (struct net_device *)link->priv;
429 ray_dev_t *local = netdev_priv(dev); 406 ray_dev_t *local = netdev_priv(dev);
430 407
431 DEBUG(1, "ray_config(0x%p)\n", link); 408 dev_dbg(&link->dev, "ray_config\n");
432 409
433 /* Determine card type and firmware version */ 410 /* Determine card type and firmware version */
434 printk(KERN_INFO "ray_cs Detected: %s%s%s%s\n", 411 printk(KERN_INFO "ray_cs Detected: %s%s%s%s\n",
@@ -440,14 +417,17 @@ static int ray_config(struct pcmcia_device *link)
440 /* Now allocate an interrupt line. Note that this does not 417 /* Now allocate an interrupt line. Note that this does not
441 actually assign a handler to the interrupt. 418 actually assign a handler to the interrupt.
442 */ 419 */
443 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); 420 ret = pcmcia_request_irq(link, &link->irq);
421 if (ret)
422 goto failed;
444 dev->irq = link->irq.AssignedIRQ; 423 dev->irq = link->irq.AssignedIRQ;
445 424
446 /* This actually configures the PCMCIA socket -- setting up 425 /* This actually configures the PCMCIA socket -- setting up
447 the I/O windows and the interrupt mapping. 426 the I/O windows and the interrupt mapping.
448 */ 427 */
449 CS_CHECK(RequestConfiguration, 428 ret = pcmcia_request_configuration(link, &link->conf);
450 pcmcia_request_configuration(link, &link->conf)); 429 if (ret)
430 goto failed;
451 431
452/*** Set up 32k window for shared memory (transmit and control) ************/ 432/*** Set up 32k window for shared memory (transmit and control) ************/
453 req.Attributes = 433 req.Attributes =
@@ -455,10 +435,14 @@ static int ray_config(struct pcmcia_device *link)
455 req.Base = 0; 435 req.Base = 0;
456 req.Size = 0x8000; 436 req.Size = 0x8000;
457 req.AccessSpeed = ray_mem_speed; 437 req.AccessSpeed = ray_mem_speed;
458 CS_CHECK(RequestWindow, pcmcia_request_window(&link, &req, &link->win)); 438 ret = pcmcia_request_window(link, &req, &link->win);
439 if (ret)
440 goto failed;
459 mem.CardOffset = 0x0000; 441 mem.CardOffset = 0x0000;
460 mem.Page = 0; 442 mem.Page = 0;
461 CS_CHECK(MapMemPage, pcmcia_map_mem_page(link->win, &mem)); 443 ret = pcmcia_map_mem_page(link, link->win, &mem);
444 if (ret)
445 goto failed;
462 local->sram = ioremap(req.Base, req.Size); 446 local->sram = ioremap(req.Base, req.Size);
463 447
464/*** Set up 16k window for shared memory (receive buffer) ***************/ 448/*** Set up 16k window for shared memory (receive buffer) ***************/
@@ -467,11 +451,14 @@ static int ray_config(struct pcmcia_device *link)
467 req.Base = 0; 451 req.Base = 0;
468 req.Size = 0x4000; 452 req.Size = 0x4000;
469 req.AccessSpeed = ray_mem_speed; 453 req.AccessSpeed = ray_mem_speed;
470 CS_CHECK(RequestWindow, 454 ret = pcmcia_request_window(link, &req, &local->rmem_handle);
471 pcmcia_request_window(&link, &req, &local->rmem_handle)); 455 if (ret)
456 goto failed;
472 mem.CardOffset = 0x8000; 457 mem.CardOffset = 0x8000;
473 mem.Page = 0; 458 mem.Page = 0;
474 CS_CHECK(MapMemPage, pcmcia_map_mem_page(local->rmem_handle, &mem)); 459 ret = pcmcia_map_mem_page(link, local->rmem_handle, &mem);
460 if (ret)
461 goto failed;
475 local->rmem = ioremap(req.Base, req.Size); 462 local->rmem = ioremap(req.Base, req.Size);
476 463
477/*** Set up window for attribute memory ***********************************/ 464/*** Set up window for attribute memory ***********************************/
@@ -480,22 +467,25 @@ static int ray_config(struct pcmcia_device *link)
480 req.Base = 0; 467 req.Base = 0;
481 req.Size = 0x1000; 468 req.Size = 0x1000;
482 req.AccessSpeed = ray_mem_speed; 469 req.AccessSpeed = ray_mem_speed;
483 CS_CHECK(RequestWindow, 470 ret = pcmcia_request_window(link, &req, &local->amem_handle);
484 pcmcia_request_window(&link, &req, &local->amem_handle)); 471 if (ret)
472 goto failed;
485 mem.CardOffset = 0x0000; 473 mem.CardOffset = 0x0000;
486 mem.Page = 0; 474 mem.Page = 0;
487 CS_CHECK(MapMemPage, pcmcia_map_mem_page(local->amem_handle, &mem)); 475 ret = pcmcia_map_mem_page(link, local->amem_handle, &mem);
476 if (ret)
477 goto failed;
488 local->amem = ioremap(req.Base, req.Size); 478 local->amem = ioremap(req.Base, req.Size);
489 479
490 DEBUG(3, "ray_config sram=%p\n", local->sram); 480 dev_dbg(&link->dev, "ray_config sram=%p\n", local->sram);
491 DEBUG(3, "ray_config rmem=%p\n", local->rmem); 481 dev_dbg(&link->dev, "ray_config rmem=%p\n", local->rmem);
492 DEBUG(3, "ray_config amem=%p\n", local->amem); 482 dev_dbg(&link->dev, "ray_config amem=%p\n", local->amem);
493 if (ray_init(dev) < 0) { 483 if (ray_init(dev) < 0) {
494 ray_release(link); 484 ray_release(link);
495 return -ENODEV; 485 return -ENODEV;
496 } 486 }
497 487
498 SET_NETDEV_DEV(dev, &handle_to_dev(link)); 488 SET_NETDEV_DEV(dev, &link->dev);
499 i = register_netdev(dev); 489 i = register_netdev(dev);
500 if (i != 0) { 490 if (i != 0) {
501 printk("ray_config register_netdev() failed\n"); 491 printk("ray_config register_netdev() failed\n");
@@ -511,9 +501,7 @@ static int ray_config(struct pcmcia_device *link)
511 501
512 return 0; 502 return 0;
513 503
514cs_failed: 504failed:
515 cs_error(link, last_fn, last_ret);
516
517 ray_release(link); 505 ray_release(link);
518 return -ENODEV; 506 return -ENODEV;
519} /* ray_config */ 507} /* ray_config */
@@ -543,9 +531,9 @@ static int ray_init(struct net_device *dev)
543 struct ccs __iomem *pccs; 531 struct ccs __iomem *pccs;
544 ray_dev_t *local = netdev_priv(dev); 532 ray_dev_t *local = netdev_priv(dev);
545 struct pcmcia_device *link = local->finder; 533 struct pcmcia_device *link = local->finder;
546 DEBUG(1, "ray_init(0x%p)\n", dev); 534 dev_dbg(&link->dev, "ray_init(0x%p)\n", dev);
547 if (!(pcmcia_dev_present(link))) { 535 if (!(pcmcia_dev_present(link))) {
548 DEBUG(0, "ray_init - device not present\n"); 536 dev_dbg(&link->dev, "ray_init - device not present\n");
549 return -1; 537 return -1;
550 } 538 }
551 539
@@ -567,13 +555,13 @@ static int ray_init(struct net_device *dev)
567 local->fw_ver = local->startup_res.firmware_version[0]; 555 local->fw_ver = local->startup_res.firmware_version[0];
568 local->fw_bld = local->startup_res.firmware_version[1]; 556 local->fw_bld = local->startup_res.firmware_version[1];
569 local->fw_var = local->startup_res.firmware_version[2]; 557 local->fw_var = local->startup_res.firmware_version[2];
570 DEBUG(1, "ray_init firmware version %d.%d \n", local->fw_ver, 558 dev_dbg(&link->dev, "ray_init firmware version %d.%d \n", local->fw_ver,
571 local->fw_bld); 559 local->fw_bld);
572 560
573 local->tib_length = 0x20; 561 local->tib_length = 0x20;
574 if ((local->fw_ver == 5) && (local->fw_bld >= 30)) 562 if ((local->fw_ver == 5) && (local->fw_bld >= 30))
575 local->tib_length = local->startup_res.tib_length; 563 local->tib_length = local->startup_res.tib_length;
576 DEBUG(2, "ray_init tib_length = 0x%02x\n", local->tib_length); 564 dev_dbg(&link->dev, "ray_init tib_length = 0x%02x\n", local->tib_length);
577 /* Initialize CCS's to buffer free state */ 565 /* Initialize CCS's to buffer free state */
578 pccs = ccs_base(local); 566 pccs = ccs_base(local);
579 for (i = 0; i < NUMBER_OF_CCS; i++) { 567 for (i = 0; i < NUMBER_OF_CCS; i++) {
@@ -592,7 +580,7 @@ static int ray_init(struct net_device *dev)
592 580
593 clear_interrupt(local); /* Clear any interrupt from the card */ 581 clear_interrupt(local); /* Clear any interrupt from the card */
594 local->card_status = CARD_AWAITING_PARAM; 582 local->card_status = CARD_AWAITING_PARAM;
595 DEBUG(2, "ray_init ending\n"); 583 dev_dbg(&link->dev, "ray_init ending\n");
596 return 0; 584 return 0;
597} /* ray_init */ 585} /* ray_init */
598 586
@@ -605,9 +593,9 @@ static int dl_startup_params(struct net_device *dev)
605 struct ccs __iomem *pccs; 593 struct ccs __iomem *pccs;
606 struct pcmcia_device *link = local->finder; 594 struct pcmcia_device *link = local->finder;
607 595
608 DEBUG(1, "dl_startup_params entered\n"); 596 dev_dbg(&link->dev, "dl_startup_params entered\n");
609 if (!(pcmcia_dev_present(link))) { 597 if (!(pcmcia_dev_present(link))) {
610 DEBUG(2, "ray_cs dl_startup_params - device not present\n"); 598 dev_dbg(&link->dev, "ray_cs dl_startup_params - device not present\n");
611 return -1; 599 return -1;
612 } 600 }
613 601
@@ -625,7 +613,7 @@ static int dl_startup_params(struct net_device *dev)
625 local->dl_param_ccs = ccsindex; 613 local->dl_param_ccs = ccsindex;
626 pccs = ccs_base(local) + ccsindex; 614 pccs = ccs_base(local) + ccsindex;
627 writeb(CCS_DOWNLOAD_STARTUP_PARAMS, &pccs->cmd); 615 writeb(CCS_DOWNLOAD_STARTUP_PARAMS, &pccs->cmd);
628 DEBUG(2, "dl_startup_params start ccsindex = %d\n", 616 dev_dbg(&link->dev, "dl_startup_params start ccsindex = %d\n",
629 local->dl_param_ccs); 617 local->dl_param_ccs);
630 /* Interrupt the firmware to process the command */ 618 /* Interrupt the firmware to process the command */
631 if (interrupt_ecf(local, ccsindex)) { 619 if (interrupt_ecf(local, ccsindex)) {
@@ -641,7 +629,7 @@ static int dl_startup_params(struct net_device *dev)
641 local->timer.data = (long)local; 629 local->timer.data = (long)local;
642 local->timer.function = &verify_dl_startup; 630 local->timer.function = &verify_dl_startup;
643 add_timer(&local->timer); 631 add_timer(&local->timer);
644 DEBUG(2, 632 dev_dbg(&link->dev,
645 "ray_cs dl_startup_params started timer for verify_dl_startup\n"); 633 "ray_cs dl_startup_params started timer for verify_dl_startup\n");
646 return 0; 634 return 0;
647} /* dl_startup_params */ 635} /* dl_startup_params */
@@ -717,11 +705,11 @@ static void verify_dl_startup(u_long data)
717 struct pcmcia_device *link = local->finder; 705 struct pcmcia_device *link = local->finder;
718 706
719 if (!(pcmcia_dev_present(link))) { 707 if (!(pcmcia_dev_present(link))) {
720 DEBUG(2, "ray_cs verify_dl_startup - device not present\n"); 708 dev_dbg(&link->dev, "ray_cs verify_dl_startup - device not present\n");
721 return; 709 return;
722 } 710 }
723#ifdef PCMCIA_DEBUG 711#if 0
724 if (pc_debug > 2) { 712 {
725 int i; 713 int i;
726 printk(KERN_DEBUG 714 printk(KERN_DEBUG
727 "verify_dl_startup parameters sent via ccs %d:\n", 715 "verify_dl_startup parameters sent via ccs %d:\n",
@@ -760,7 +748,7 @@ static void start_net(u_long data)
760 int ccsindex; 748 int ccsindex;
761 struct pcmcia_device *link = local->finder; 749 struct pcmcia_device *link = local->finder;
762 if (!(pcmcia_dev_present(link))) { 750 if (!(pcmcia_dev_present(link))) {
763 DEBUG(2, "ray_cs start_net - device not present\n"); 751 dev_dbg(&link->dev, "ray_cs start_net - device not present\n");
764 return; 752 return;
765 } 753 }
766 /* Fill in the CCS fields for the ECF */ 754 /* Fill in the CCS fields for the ECF */
@@ -771,7 +759,7 @@ static void start_net(u_long data)
771 writeb(0, &pccs->var.start_network.update_param); 759 writeb(0, &pccs->var.start_network.update_param);
772 /* Interrupt the firmware to process the command */ 760 /* Interrupt the firmware to process the command */
773 if (interrupt_ecf(local, ccsindex)) { 761 if (interrupt_ecf(local, ccsindex)) {
774 DEBUG(1, "ray start net failed - card not ready for intr\n"); 762 dev_dbg(&link->dev, "ray start net failed - card not ready for intr\n");
775 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status); 763 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status);
776 return; 764 return;
777 } 765 }
@@ -790,7 +778,7 @@ static void join_net(u_long data)
790 struct pcmcia_device *link = local->finder; 778 struct pcmcia_device *link = local->finder;
791 779
792 if (!(pcmcia_dev_present(link))) { 780 if (!(pcmcia_dev_present(link))) {
793 DEBUG(2, "ray_cs join_net - device not present\n"); 781 dev_dbg(&link->dev, "ray_cs join_net - device not present\n");
794 return; 782 return;
795 } 783 }
796 /* Fill in the CCS fields for the ECF */ 784 /* Fill in the CCS fields for the ECF */
@@ -802,7 +790,7 @@ static void join_net(u_long data)
802 writeb(0, &pccs->var.join_network.net_initiated); 790 writeb(0, &pccs->var.join_network.net_initiated);
803 /* Interrupt the firmware to process the command */ 791 /* Interrupt the firmware to process the command */
804 if (interrupt_ecf(local, ccsindex)) { 792 if (interrupt_ecf(local, ccsindex)) {
805 DEBUG(1, "ray join net failed - card not ready for intr\n"); 793 dev_dbg(&link->dev, "ray join net failed - card not ready for intr\n");
806 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status); 794 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status);
807 return; 795 return;
808 } 796 }
@@ -821,7 +809,7 @@ static void ray_release(struct pcmcia_device *link)
821 ray_dev_t *local = netdev_priv(dev); 809 ray_dev_t *local = netdev_priv(dev);
822 int i; 810 int i;
823 811
824 DEBUG(1, "ray_release(0x%p)\n", link); 812 dev_dbg(&link->dev, "ray_release\n");
825 813
826 del_timer(&local->timer); 814 del_timer(&local->timer);
827 815
@@ -829,15 +817,15 @@ static void ray_release(struct pcmcia_device *link)
829 iounmap(local->rmem); 817 iounmap(local->rmem);
830 iounmap(local->amem); 818 iounmap(local->amem);
831 /* Do bother checking to see if these succeed or not */ 819 /* Do bother checking to see if these succeed or not */
832 i = pcmcia_release_window(local->amem_handle); 820 i = pcmcia_release_window(link, local->amem_handle);
833 if (i != 0) 821 if (i != 0)
834 DEBUG(0, "ReleaseWindow(local->amem) ret = %x\n", i); 822 dev_dbg(&link->dev, "ReleaseWindow(local->amem) ret = %x\n", i);
835 i = pcmcia_release_window(local->rmem_handle); 823 i = pcmcia_release_window(link, local->rmem_handle);
836 if (i != 0) 824 if (i != 0)
837 DEBUG(0, "ReleaseWindow(local->rmem) ret = %x\n", i); 825 dev_dbg(&link->dev, "ReleaseWindow(local->rmem) ret = %x\n", i);
838 pcmcia_disable_device(link); 826 pcmcia_disable_device(link);
839 827
840 DEBUG(2, "ray_release ending\n"); 828 dev_dbg(&link->dev, "ray_release ending\n");
841} 829}
842 830
843static int ray_suspend(struct pcmcia_device *link) 831static int ray_suspend(struct pcmcia_device *link)
@@ -871,9 +859,9 @@ static int ray_dev_init(struct net_device *dev)
871 ray_dev_t *local = netdev_priv(dev); 859 ray_dev_t *local = netdev_priv(dev);
872 struct pcmcia_device *link = local->finder; 860 struct pcmcia_device *link = local->finder;
873 861
874 DEBUG(1, "ray_dev_init(dev=%p)\n", dev); 862 dev_dbg(&link->dev, "ray_dev_init(dev=%p)\n", dev);
875 if (!(pcmcia_dev_present(link))) { 863 if (!(pcmcia_dev_present(link))) {
876 DEBUG(2, "ray_dev_init - device not present\n"); 864 dev_dbg(&link->dev, "ray_dev_init - device not present\n");
877 return -1; 865 return -1;
878 } 866 }
879#ifdef RAY_IMMEDIATE_INIT 867#ifdef RAY_IMMEDIATE_INIT
@@ -887,7 +875,7 @@ static int ray_dev_init(struct net_device *dev)
887 /* Postpone the card init so that we can still configure the card, 875 /* Postpone the card init so that we can still configure the card,
888 * for example using the Wireless Extensions. The init will happen 876 * for example using the Wireless Extensions. The init will happen
889 * in ray_open() - Jean II */ 877 * in ray_open() - Jean II */
890 DEBUG(1, 878 dev_dbg(&link->dev,
891 "ray_dev_init: postponing card init to ray_open() ; Status = %d\n", 879 "ray_dev_init: postponing card init to ray_open() ; Status = %d\n",
892 local->card_status); 880 local->card_status);
893#endif /* RAY_IMMEDIATE_INIT */ 881#endif /* RAY_IMMEDIATE_INIT */
@@ -896,7 +884,7 @@ static int ray_dev_init(struct net_device *dev)
896 memcpy(dev->dev_addr, &local->sparm.b4.a_mac_addr, ADDRLEN); 884 memcpy(dev->dev_addr, &local->sparm.b4.a_mac_addr, ADDRLEN);
897 memset(dev->broadcast, 0xff, ETH_ALEN); 885 memset(dev->broadcast, 0xff, ETH_ALEN);
898 886
899 DEBUG(2, "ray_dev_init ending\n"); 887 dev_dbg(&link->dev, "ray_dev_init ending\n");
900 return 0; 888 return 0;
901} 889}
902 890
@@ -906,9 +894,9 @@ static int ray_dev_config(struct net_device *dev, struct ifmap *map)
906 ray_dev_t *local = netdev_priv(dev); 894 ray_dev_t *local = netdev_priv(dev);
907 struct pcmcia_device *link = local->finder; 895 struct pcmcia_device *link = local->finder;
908 /* Dummy routine to satisfy device structure */ 896 /* Dummy routine to satisfy device structure */
909 DEBUG(1, "ray_dev_config(dev=%p,ifmap=%p)\n", dev, map); 897 dev_dbg(&link->dev, "ray_dev_config(dev=%p,ifmap=%p)\n", dev, map);
910 if (!(pcmcia_dev_present(link))) { 898 if (!(pcmcia_dev_present(link))) {
911 DEBUG(2, "ray_dev_config - device not present\n"); 899 dev_dbg(&link->dev, "ray_dev_config - device not present\n");
912 return -1; 900 return -1;
913 } 901 }
914 902
@@ -924,14 +912,14 @@ static netdev_tx_t ray_dev_start_xmit(struct sk_buff *skb,
924 short length = skb->len; 912 short length = skb->len;
925 913
926 if (!pcmcia_dev_present(link)) { 914 if (!pcmcia_dev_present(link)) {
927 DEBUG(2, "ray_dev_start_xmit - device not present\n"); 915 dev_dbg(&link->dev, "ray_dev_start_xmit - device not present\n");
928 dev_kfree_skb(skb); 916 dev_kfree_skb(skb);
929 return NETDEV_TX_OK; 917 return NETDEV_TX_OK;
930 } 918 }
931 919
932 DEBUG(3, "ray_dev_start_xmit(skb=%p, dev=%p)\n", skb, dev); 920 dev_dbg(&link->dev, "ray_dev_start_xmit(skb=%p, dev=%p)\n", skb, dev);
933 if (local->authentication_state == NEED_TO_AUTH) { 921 if (local->authentication_state == NEED_TO_AUTH) {
934 DEBUG(0, "ray_cs Sending authentication request.\n"); 922 dev_dbg(&link->dev, "ray_cs Sending authentication request.\n");
935 if (!build_auth_frame(local, local->auth_id, OPEN_AUTH_REQUEST)) { 923 if (!build_auth_frame(local, local->auth_id, OPEN_AUTH_REQUEST)) {
936 local->authentication_state = AUTHENTICATED; 924 local->authentication_state = AUTHENTICATED;
937 netif_stop_queue(dev); 925 netif_stop_queue(dev);
@@ -971,7 +959,7 @@ static int ray_hw_xmit(unsigned char *data, int len, struct net_device *dev,
971 struct tx_msg __iomem *ptx; /* Address of xmit buffer in PC space */ 959 struct tx_msg __iomem *ptx; /* Address of xmit buffer in PC space */
972 short int addr; /* Address of xmit buffer in card space */ 960 short int addr; /* Address of xmit buffer in card space */
973 961
974 DEBUG(3, "ray_hw_xmit(data=%p, len=%d, dev=%p)\n", data, len, dev); 962 pr_debug("ray_hw_xmit(data=%p, len=%d, dev=%p)\n", data, len, dev);
975 if (len + TX_HEADER_LENGTH > TX_BUF_SIZE) { 963 if (len + TX_HEADER_LENGTH > TX_BUF_SIZE) {
976 printk(KERN_INFO "ray_hw_xmit packet too large: %d bytes\n", 964 printk(KERN_INFO "ray_hw_xmit packet too large: %d bytes\n",
977 len); 965 len);
@@ -979,9 +967,9 @@ static int ray_hw_xmit(unsigned char *data, int len, struct net_device *dev,
979 } 967 }
980 switch (ccsindex = get_free_tx_ccs(local)) { 968 switch (ccsindex = get_free_tx_ccs(local)) {
981 case ECCSBUSY: 969 case ECCSBUSY:
982 DEBUG(2, "ray_hw_xmit tx_ccs table busy\n"); 970 pr_debug("ray_hw_xmit tx_ccs table busy\n");
983 case ECCSFULL: 971 case ECCSFULL:
984 DEBUG(2, "ray_hw_xmit No free tx ccs\n"); 972 pr_debug("ray_hw_xmit No free tx ccs\n");
985 case ECARDGONE: 973 case ECARDGONE:
986 netif_stop_queue(dev); 974 netif_stop_queue(dev);
987 return XMIT_NO_CCS; 975 return XMIT_NO_CCS;
@@ -1018,12 +1006,12 @@ static int ray_hw_xmit(unsigned char *data, int len, struct net_device *dev,
1018 writeb(PSM_CAM, &pccs->var.tx_request.pow_sav_mode); 1006 writeb(PSM_CAM, &pccs->var.tx_request.pow_sav_mode);
1019 writeb(local->net_default_tx_rate, &pccs->var.tx_request.tx_rate); 1007 writeb(local->net_default_tx_rate, &pccs->var.tx_request.tx_rate);
1020 writeb(0, &pccs->var.tx_request.antenna); 1008 writeb(0, &pccs->var.tx_request.antenna);
1021 DEBUG(3, "ray_hw_xmit default_tx_rate = 0x%x\n", 1009 pr_debug("ray_hw_xmit default_tx_rate = 0x%x\n",
1022 local->net_default_tx_rate); 1010 local->net_default_tx_rate);
1023 1011
1024 /* Interrupt the firmware to process the command */ 1012 /* Interrupt the firmware to process the command */
1025 if (interrupt_ecf(local, ccsindex)) { 1013 if (interrupt_ecf(local, ccsindex)) {
1026 DEBUG(2, "ray_hw_xmit failed - ECF not ready for intr\n"); 1014 pr_debug("ray_hw_xmit failed - ECF not ready for intr\n");
1027/* TBD very inefficient to copy packet to buffer, and then not 1015/* TBD very inefficient to copy packet to buffer, and then not
1028 send it, but the alternative is to queue the messages and that 1016 send it, but the alternative is to queue the messages and that
1029 won't be done for a while. Maybe set tbusy until a CCS is free? 1017 won't be done for a while. Maybe set tbusy until a CCS is free?
@@ -1040,7 +1028,7 @@ static int translate_frame(ray_dev_t *local, struct tx_msg __iomem *ptx,
1040{ 1028{
1041 __be16 proto = ((struct ethhdr *)data)->h_proto; 1029 __be16 proto = ((struct ethhdr *)data)->h_proto;
1042 if (ntohs(proto) >= 1536) { /* DIX II ethernet frame */ 1030 if (ntohs(proto) >= 1536) { /* DIX II ethernet frame */
1043 DEBUG(3, "ray_cs translate_frame DIX II\n"); 1031 pr_debug("ray_cs translate_frame DIX II\n");
1044 /* Copy LLC header to card buffer */ 1032 /* Copy LLC header to card buffer */
1045 memcpy_toio(&ptx->var, eth2_llc, sizeof(eth2_llc)); 1033 memcpy_toio(&ptx->var, eth2_llc, sizeof(eth2_llc));
1046 memcpy_toio(((void __iomem *)&ptx->var) + sizeof(eth2_llc), 1034 memcpy_toio(((void __iomem *)&ptx->var) + sizeof(eth2_llc),
@@ -1056,9 +1044,9 @@ static int translate_frame(ray_dev_t *local, struct tx_msg __iomem *ptx,
1056 len - ETH_HLEN); 1044 len - ETH_HLEN);
1057 return (int)sizeof(struct snaphdr_t) - ETH_HLEN; 1045 return (int)sizeof(struct snaphdr_t) - ETH_HLEN;
1058 } else { /* already 802 type, and proto is length */ 1046 } else { /* already 802 type, and proto is length */
1059 DEBUG(3, "ray_cs translate_frame 802\n"); 1047 pr_debug("ray_cs translate_frame 802\n");
1060 if (proto == htons(0xffff)) { /* evil netware IPX 802.3 without LLC */ 1048 if (proto == htons(0xffff)) { /* evil netware IPX 802.3 without LLC */
1061 DEBUG(3, "ray_cs translate_frame evil IPX\n"); 1049 pr_debug("ray_cs translate_frame evil IPX\n");
1062 memcpy_toio(&ptx->var, data + ETH_HLEN, len - ETH_HLEN); 1050 memcpy_toio(&ptx->var, data + ETH_HLEN, len - ETH_HLEN);
1063 return 0 - ETH_HLEN; 1051 return 0 - ETH_HLEN;
1064 } 1052 }
@@ -1603,7 +1591,7 @@ static int ray_open(struct net_device *dev)
1603 struct pcmcia_device *link; 1591 struct pcmcia_device *link;
1604 link = local->finder; 1592 link = local->finder;
1605 1593
1606 DEBUG(1, "ray_open('%s')\n", dev->name); 1594 dev_dbg(&link->dev, "ray_open('%s')\n", dev->name);
1607 1595
1608 if (link->open == 0) 1596 if (link->open == 0)
1609 local->num_multi = 0; 1597 local->num_multi = 0;
@@ -1613,7 +1601,7 @@ static int ray_open(struct net_device *dev)
1613 if (local->card_status == CARD_AWAITING_PARAM) { 1601 if (local->card_status == CARD_AWAITING_PARAM) {
1614 int i; 1602 int i;
1615 1603
1616 DEBUG(1, "ray_open: doing init now !\n"); 1604 dev_dbg(&link->dev, "ray_open: doing init now !\n");
1617 1605
1618 /* Download startup parameters */ 1606 /* Download startup parameters */
1619 if ((i = dl_startup_params(dev)) < 0) { 1607 if ((i = dl_startup_params(dev)) < 0) {
@@ -1629,7 +1617,7 @@ static int ray_open(struct net_device *dev)
1629 else 1617 else
1630 netif_start_queue(dev); 1618 netif_start_queue(dev);
1631 1619
1632 DEBUG(2, "ray_open ending\n"); 1620 dev_dbg(&link->dev, "ray_open ending\n");
1633 return 0; 1621 return 0;
1634} /* end ray_open */ 1622} /* end ray_open */
1635 1623
@@ -1640,7 +1628,7 @@ static int ray_dev_close(struct net_device *dev)
1640 struct pcmcia_device *link; 1628 struct pcmcia_device *link;
1641 link = local->finder; 1629 link = local->finder;
1642 1630
1643 DEBUG(1, "ray_dev_close('%s')\n", dev->name); 1631 dev_dbg(&link->dev, "ray_dev_close('%s')\n", dev->name);
1644 1632
1645 link->open--; 1633 link->open--;
1646 netif_stop_queue(dev); 1634 netif_stop_queue(dev);
@@ -1656,7 +1644,7 @@ static int ray_dev_close(struct net_device *dev)
1656/*===========================================================================*/ 1644/*===========================================================================*/
1657static void ray_reset(struct net_device *dev) 1645static void ray_reset(struct net_device *dev)
1658{ 1646{
1659 DEBUG(1, "ray_reset entered\n"); 1647 pr_debug("ray_reset entered\n");
1660 return; 1648 return;
1661} 1649}
1662 1650
@@ -1669,17 +1657,17 @@ static int interrupt_ecf(ray_dev_t *local, int ccs)
1669 struct pcmcia_device *link = local->finder; 1657 struct pcmcia_device *link = local->finder;
1670 1658
1671 if (!(pcmcia_dev_present(link))) { 1659 if (!(pcmcia_dev_present(link))) {
1672 DEBUG(2, "ray_cs interrupt_ecf - device not present\n"); 1660 dev_dbg(&link->dev, "ray_cs interrupt_ecf - device not present\n");
1673 return -1; 1661 return -1;
1674 } 1662 }
1675 DEBUG(2, "interrupt_ecf(local=%p, ccs = 0x%x\n", local, ccs); 1663 dev_dbg(&link->dev, "interrupt_ecf(local=%p, ccs = 0x%x\n", local, ccs);
1676 1664
1677 while (i && 1665 while (i &&
1678 (readb(local->amem + CIS_OFFSET + ECF_INTR_OFFSET) & 1666 (readb(local->amem + CIS_OFFSET + ECF_INTR_OFFSET) &
1679 ECF_INTR_SET)) 1667 ECF_INTR_SET))
1680 i--; 1668 i--;
1681 if (i == 0) { 1669 if (i == 0) {
1682 DEBUG(2, "ray_cs interrupt_ecf card not ready for interrupt\n"); 1670 dev_dbg(&link->dev, "ray_cs interrupt_ecf card not ready for interrupt\n");
1683 return -1; 1671 return -1;
1684 } 1672 }
1685 /* Fill the mailbox, then kick the card */ 1673 /* Fill the mailbox, then kick the card */
@@ -1698,12 +1686,12 @@ static int get_free_tx_ccs(ray_dev_t *local)
1698 struct pcmcia_device *link = local->finder; 1686 struct pcmcia_device *link = local->finder;
1699 1687
1700 if (!(pcmcia_dev_present(link))) { 1688 if (!(pcmcia_dev_present(link))) {
1701 DEBUG(2, "ray_cs get_free_tx_ccs - device not present\n"); 1689 dev_dbg(&link->dev, "ray_cs get_free_tx_ccs - device not present\n");
1702 return ECARDGONE; 1690 return ECARDGONE;
1703 } 1691 }
1704 1692
1705 if (test_and_set_bit(0, &local->tx_ccs_lock)) { 1693 if (test_and_set_bit(0, &local->tx_ccs_lock)) {
1706 DEBUG(1, "ray_cs tx_ccs_lock busy\n"); 1694 dev_dbg(&link->dev, "ray_cs tx_ccs_lock busy\n");
1707 return ECCSBUSY; 1695 return ECCSBUSY;
1708 } 1696 }
1709 1697
@@ -1716,7 +1704,7 @@ static int get_free_tx_ccs(ray_dev_t *local)
1716 } 1704 }
1717 } 1705 }
1718 local->tx_ccs_lock = 0; 1706 local->tx_ccs_lock = 0;
1719 DEBUG(2, "ray_cs ERROR no free tx CCS for raylink card\n"); 1707 dev_dbg(&link->dev, "ray_cs ERROR no free tx CCS for raylink card\n");
1720 return ECCSFULL; 1708 return ECCSFULL;
1721} /* get_free_tx_ccs */ 1709} /* get_free_tx_ccs */
1722 1710
@@ -1730,11 +1718,11 @@ static int get_free_ccs(ray_dev_t *local)
1730 struct pcmcia_device *link = local->finder; 1718 struct pcmcia_device *link = local->finder;
1731 1719
1732 if (!(pcmcia_dev_present(link))) { 1720 if (!(pcmcia_dev_present(link))) {
1733 DEBUG(2, "ray_cs get_free_ccs - device not present\n"); 1721 dev_dbg(&link->dev, "ray_cs get_free_ccs - device not present\n");
1734 return ECARDGONE; 1722 return ECARDGONE;
1735 } 1723 }
1736 if (test_and_set_bit(0, &local->ccs_lock)) { 1724 if (test_and_set_bit(0, &local->ccs_lock)) {
1737 DEBUG(1, "ray_cs ccs_lock busy\n"); 1725 dev_dbg(&link->dev, "ray_cs ccs_lock busy\n");
1738 return ECCSBUSY; 1726 return ECCSBUSY;
1739 } 1727 }
1740 1728
@@ -1747,7 +1735,7 @@ static int get_free_ccs(ray_dev_t *local)
1747 } 1735 }
1748 } 1736 }
1749 local->ccs_lock = 0; 1737 local->ccs_lock = 0;
1750 DEBUG(1, "ray_cs ERROR no free CCS for raylink card\n"); 1738 dev_dbg(&link->dev, "ray_cs ERROR no free CCS for raylink card\n");
1751 return ECCSFULL; 1739 return ECCSFULL;
1752} /* get_free_ccs */ 1740} /* get_free_ccs */
1753 1741
@@ -1823,7 +1811,7 @@ static struct net_device_stats *ray_get_stats(struct net_device *dev)
1823 struct pcmcia_device *link = local->finder; 1811 struct pcmcia_device *link = local->finder;
1824 struct status __iomem *p = local->sram + STATUS_BASE; 1812 struct status __iomem *p = local->sram + STATUS_BASE;
1825 if (!(pcmcia_dev_present(link))) { 1813 if (!(pcmcia_dev_present(link))) {
1826 DEBUG(2, "ray_cs net_device_stats - device not present\n"); 1814 dev_dbg(&link->dev, "ray_cs net_device_stats - device not present\n");
1827 return &local->stats; 1815 return &local->stats;
1828 } 1816 }
1829 if (readb(&p->mrx_overflow_for_host)) { 1817 if (readb(&p->mrx_overflow_for_host)) {
@@ -1856,12 +1844,12 @@ static void ray_update_parm(struct net_device *dev, UCHAR objid, UCHAR *value,
1856 struct ccs __iomem *pccs; 1844 struct ccs __iomem *pccs;
1857 1845
1858 if (!(pcmcia_dev_present(link))) { 1846 if (!(pcmcia_dev_present(link))) {
1859 DEBUG(2, "ray_update_parm - device not present\n"); 1847 dev_dbg(&link->dev, "ray_update_parm - device not present\n");
1860 return; 1848 return;
1861 } 1849 }
1862 1850
1863 if ((ccsindex = get_free_ccs(local)) < 0) { 1851 if ((ccsindex = get_free_ccs(local)) < 0) {
1864 DEBUG(0, "ray_update_parm - No free ccs\n"); 1852 dev_dbg(&link->dev, "ray_update_parm - No free ccs\n");
1865 return; 1853 return;
1866 } 1854 }
1867 pccs = ccs_base(local) + ccsindex; 1855 pccs = ccs_base(local) + ccsindex;
@@ -1874,7 +1862,7 @@ static void ray_update_parm(struct net_device *dev, UCHAR objid, UCHAR *value,
1874 } 1862 }
1875 /* Interrupt the firmware to process the command */ 1863 /* Interrupt the firmware to process the command */
1876 if (interrupt_ecf(local, ccsindex)) { 1864 if (interrupt_ecf(local, ccsindex)) {
1877 DEBUG(0, "ray_cs associate failed - ECF not ready for intr\n"); 1865 dev_dbg(&link->dev, "ray_cs associate failed - ECF not ready for intr\n");
1878 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status); 1866 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status);
1879 } 1867 }
1880} 1868}
@@ -1882,21 +1870,19 @@ static void ray_update_parm(struct net_device *dev, UCHAR objid, UCHAR *value,
1882/*===========================================================================*/ 1870/*===========================================================================*/
1883static void ray_update_multi_list(struct net_device *dev, int all) 1871static void ray_update_multi_list(struct net_device *dev, int all)
1884{ 1872{
1885 struct dev_mc_list *dmi, **dmip;
1886 int ccsindex; 1873 int ccsindex;
1887 struct ccs __iomem *pccs; 1874 struct ccs __iomem *pccs;
1888 int i = 0;
1889 ray_dev_t *local = netdev_priv(dev); 1875 ray_dev_t *local = netdev_priv(dev);
1890 struct pcmcia_device *link = local->finder; 1876 struct pcmcia_device *link = local->finder;
1891 void __iomem *p = local->sram + HOST_TO_ECF_BASE; 1877 void __iomem *p = local->sram + HOST_TO_ECF_BASE;
1892 1878
1893 if (!(pcmcia_dev_present(link))) { 1879 if (!(pcmcia_dev_present(link))) {
1894 DEBUG(2, "ray_update_multi_list - device not present\n"); 1880 dev_dbg(&link->dev, "ray_update_multi_list - device not present\n");
1895 return; 1881 return;
1896 } else 1882 } else
1897 DEBUG(2, "ray_update_multi_list(%p)\n", dev); 1883 dev_dbg(&link->dev, "ray_update_multi_list(%p)\n", dev);
1898 if ((ccsindex = get_free_ccs(local)) < 0) { 1884 if ((ccsindex = get_free_ccs(local)) < 0) {
1899 DEBUG(1, "ray_update_multi - No free ccs\n"); 1885 dev_dbg(&link->dev, "ray_update_multi - No free ccs\n");
1900 return; 1886 return;
1901 } 1887 }
1902 pccs = ccs_base(local) + ccsindex; 1888 pccs = ccs_base(local) + ccsindex;
@@ -1906,11 +1892,13 @@ static void ray_update_multi_list(struct net_device *dev, int all)
1906 writeb(0xff, &pccs->var); 1892 writeb(0xff, &pccs->var);
1907 local->num_multi = 0xff; 1893 local->num_multi = 0xff;
1908 } else { 1894 } else {
1895 struct dev_mc_list *dmi;
1896 int i = 0;
1897
1909 /* Copy the kernel's list of MC addresses to card */ 1898 /* Copy the kernel's list of MC addresses to card */
1910 for (dmip = &dev->mc_list; (dmi = *dmip) != NULL; 1899 netdev_for_each_mc_addr(dmi, dev) {
1911 dmip = &dmi->next) {
1912 memcpy_toio(p, dmi->dmi_addr, ETH_ALEN); 1900 memcpy_toio(p, dmi->dmi_addr, ETH_ALEN);
1913 DEBUG(1, 1901 dev_dbg(&link->dev,
1914 "ray_update_multi add addr %02x%02x%02x%02x%02x%02x\n", 1902 "ray_update_multi add addr %02x%02x%02x%02x%02x%02x\n",
1915 dmi->dmi_addr[0], dmi->dmi_addr[1], 1903 dmi->dmi_addr[0], dmi->dmi_addr[1],
1916 dmi->dmi_addr[2], dmi->dmi_addr[3], 1904 dmi->dmi_addr[2], dmi->dmi_addr[3],
@@ -1921,12 +1909,12 @@ static void ray_update_multi_list(struct net_device *dev, int all)
1921 if (i > 256 / ADDRLEN) 1909 if (i > 256 / ADDRLEN)
1922 i = 256 / ADDRLEN; 1910 i = 256 / ADDRLEN;
1923 writeb((UCHAR) i, &pccs->var); 1911 writeb((UCHAR) i, &pccs->var);
1924 DEBUG(1, "ray_cs update_multi %d addresses in list\n", i); 1912 dev_dbg(&link->dev, "ray_cs update_multi %d addresses in list\n", i);
1925 /* Interrupt the firmware to process the command */ 1913 /* Interrupt the firmware to process the command */
1926 local->num_multi = i; 1914 local->num_multi = i;
1927 } 1915 }
1928 if (interrupt_ecf(local, ccsindex)) { 1916 if (interrupt_ecf(local, ccsindex)) {
1929 DEBUG(1, 1917 dev_dbg(&link->dev,
1930 "ray_cs update_multi failed - ECF not ready for intr\n"); 1918 "ray_cs update_multi failed - ECF not ready for intr\n");
1931 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status); 1919 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status);
1932 } 1920 }
@@ -1938,11 +1926,11 @@ static void set_multicast_list(struct net_device *dev)
1938 ray_dev_t *local = netdev_priv(dev); 1926 ray_dev_t *local = netdev_priv(dev);
1939 UCHAR promisc; 1927 UCHAR promisc;
1940 1928
1941 DEBUG(2, "ray_cs set_multicast_list(%p)\n", dev); 1929 pr_debug("ray_cs set_multicast_list(%p)\n", dev);
1942 1930
1943 if (dev->flags & IFF_PROMISC) { 1931 if (dev->flags & IFF_PROMISC) {
1944 if (local->sparm.b5.a_promiscuous_mode == 0) { 1932 if (local->sparm.b5.a_promiscuous_mode == 0) {
1945 DEBUG(1, "ray_cs set_multicast_list promisc on\n"); 1933 pr_debug("ray_cs set_multicast_list promisc on\n");
1946 local->sparm.b5.a_promiscuous_mode = 1; 1934 local->sparm.b5.a_promiscuous_mode = 1;
1947 promisc = 1; 1935 promisc = 1;
1948 ray_update_parm(dev, OBJID_promiscuous_mode, 1936 ray_update_parm(dev, OBJID_promiscuous_mode,
@@ -1950,7 +1938,7 @@ static void set_multicast_list(struct net_device *dev)
1950 } 1938 }
1951 } else { 1939 } else {
1952 if (local->sparm.b5.a_promiscuous_mode == 1) { 1940 if (local->sparm.b5.a_promiscuous_mode == 1) {
1953 DEBUG(1, "ray_cs set_multicast_list promisc off\n"); 1941 pr_debug("ray_cs set_multicast_list promisc off\n");
1954 local->sparm.b5.a_promiscuous_mode = 0; 1942 local->sparm.b5.a_promiscuous_mode = 0;
1955 promisc = 0; 1943 promisc = 0;
1956 ray_update_parm(dev, OBJID_promiscuous_mode, 1944 ray_update_parm(dev, OBJID_promiscuous_mode,
@@ -1961,7 +1949,7 @@ static void set_multicast_list(struct net_device *dev)
1961 if (dev->flags & IFF_ALLMULTI) 1949 if (dev->flags & IFF_ALLMULTI)
1962 ray_update_multi_list(dev, 1); 1950 ray_update_multi_list(dev, 1);
1963 else { 1951 else {
1964 if (local->num_multi != dev->mc_count) 1952 if (local->num_multi != netdev_mc_count(dev))
1965 ray_update_multi_list(dev, 0); 1953 ray_update_multi_list(dev, 0);
1966 } 1954 }
1967} /* end set_multicast_list */ 1955} /* end set_multicast_list */
@@ -1984,19 +1972,19 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
1984 if (dev == NULL) /* Note that we want interrupts with dev->start == 0 */ 1972 if (dev == NULL) /* Note that we want interrupts with dev->start == 0 */
1985 return IRQ_NONE; 1973 return IRQ_NONE;
1986 1974
1987 DEBUG(4, "ray_cs: interrupt for *dev=%p\n", dev); 1975 pr_debug("ray_cs: interrupt for *dev=%p\n", dev);
1988 1976
1989 local = netdev_priv(dev); 1977 local = netdev_priv(dev);
1990 link = (struct pcmcia_device *)local->finder; 1978 link = (struct pcmcia_device *)local->finder;
1991 if (!pcmcia_dev_present(link)) { 1979 if (!pcmcia_dev_present(link)) {
1992 DEBUG(2, 1980 pr_debug(
1993 "ray_cs interrupt from device not present or suspended.\n"); 1981 "ray_cs interrupt from device not present or suspended.\n");
1994 return IRQ_NONE; 1982 return IRQ_NONE;
1995 } 1983 }
1996 rcsindex = readb(&((struct scb __iomem *)(local->sram))->rcs_index); 1984 rcsindex = readb(&((struct scb __iomem *)(local->sram))->rcs_index);
1997 1985
1998 if (rcsindex >= (NUMBER_OF_CCS + NUMBER_OF_RCS)) { 1986 if (rcsindex >= (NUMBER_OF_CCS + NUMBER_OF_RCS)) {
1999 DEBUG(1, "ray_cs interrupt bad rcsindex = 0x%x\n", rcsindex); 1987 dev_dbg(&link->dev, "ray_cs interrupt bad rcsindex = 0x%x\n", rcsindex);
2000 clear_interrupt(local); 1988 clear_interrupt(local);
2001 return IRQ_HANDLED; 1989 return IRQ_HANDLED;
2002 } 1990 }
@@ -2008,33 +1996,33 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2008 case CCS_DOWNLOAD_STARTUP_PARAMS: /* Happens in firmware someday */ 1996 case CCS_DOWNLOAD_STARTUP_PARAMS: /* Happens in firmware someday */
2009 del_timer(&local->timer); 1997 del_timer(&local->timer);
2010 if (status == CCS_COMMAND_COMPLETE) { 1998 if (status == CCS_COMMAND_COMPLETE) {
2011 DEBUG(1, 1999 dev_dbg(&link->dev,
2012 "ray_cs interrupt download_startup_parameters OK\n"); 2000 "ray_cs interrupt download_startup_parameters OK\n");
2013 } else { 2001 } else {
2014 DEBUG(1, 2002 dev_dbg(&link->dev,
2015 "ray_cs interrupt download_startup_parameters fail\n"); 2003 "ray_cs interrupt download_startup_parameters fail\n");
2016 } 2004 }
2017 break; 2005 break;
2018 case CCS_UPDATE_PARAMS: 2006 case CCS_UPDATE_PARAMS:
2019 DEBUG(1, "ray_cs interrupt update params done\n"); 2007 dev_dbg(&link->dev, "ray_cs interrupt update params done\n");
2020 if (status != CCS_COMMAND_COMPLETE) { 2008 if (status != CCS_COMMAND_COMPLETE) {
2021 tmp = 2009 tmp =
2022 readb(&pccs->var.update_param. 2010 readb(&pccs->var.update_param.
2023 failure_cause); 2011 failure_cause);
2024 DEBUG(0, 2012 dev_dbg(&link->dev,
2025 "ray_cs interrupt update params failed - reason %d\n", 2013 "ray_cs interrupt update params failed - reason %d\n",
2026 tmp); 2014 tmp);
2027 } 2015 }
2028 break; 2016 break;
2029 case CCS_REPORT_PARAMS: 2017 case CCS_REPORT_PARAMS:
2030 DEBUG(1, "ray_cs interrupt report params done\n"); 2018 dev_dbg(&link->dev, "ray_cs interrupt report params done\n");
2031 break; 2019 break;
2032 case CCS_UPDATE_MULTICAST_LIST: /* Note that this CCS isn't returned */ 2020 case CCS_UPDATE_MULTICAST_LIST: /* Note that this CCS isn't returned */
2033 DEBUG(1, 2021 dev_dbg(&link->dev,
2034 "ray_cs interrupt CCS Update Multicast List done\n"); 2022 "ray_cs interrupt CCS Update Multicast List done\n");
2035 break; 2023 break;
2036 case CCS_UPDATE_POWER_SAVINGS_MODE: 2024 case CCS_UPDATE_POWER_SAVINGS_MODE:
2037 DEBUG(1, 2025 dev_dbg(&link->dev,
2038 "ray_cs interrupt update power save mode done\n"); 2026 "ray_cs interrupt update power save mode done\n");
2039 break; 2027 break;
2040 case CCS_START_NETWORK: 2028 case CCS_START_NETWORK:
@@ -2043,11 +2031,11 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2043 if (readb 2031 if (readb
2044 (&pccs->var.start_network.net_initiated) == 2032 (&pccs->var.start_network.net_initiated) ==
2045 1) { 2033 1) {
2046 DEBUG(0, 2034 dev_dbg(&link->dev,
2047 "ray_cs interrupt network \"%s\" started\n", 2035 "ray_cs interrupt network \"%s\" started\n",
2048 local->sparm.b4.a_current_ess_id); 2036 local->sparm.b4.a_current_ess_id);
2049 } else { 2037 } else {
2050 DEBUG(0, 2038 dev_dbg(&link->dev,
2051 "ray_cs interrupt network \"%s\" joined\n", 2039 "ray_cs interrupt network \"%s\" joined\n",
2052 local->sparm.b4.a_current_ess_id); 2040 local->sparm.b4.a_current_ess_id);
2053 } 2041 }
@@ -2075,12 +2063,12 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2075 local->timer.expires = jiffies + HZ * 5; 2063 local->timer.expires = jiffies + HZ * 5;
2076 local->timer.data = (long)local; 2064 local->timer.data = (long)local;
2077 if (status == CCS_START_NETWORK) { 2065 if (status == CCS_START_NETWORK) {
2078 DEBUG(0, 2066 dev_dbg(&link->dev,
2079 "ray_cs interrupt network \"%s\" start failed\n", 2067 "ray_cs interrupt network \"%s\" start failed\n",
2080 local->sparm.b4.a_current_ess_id); 2068 local->sparm.b4.a_current_ess_id);
2081 local->timer.function = &start_net; 2069 local->timer.function = &start_net;
2082 } else { 2070 } else {
2083 DEBUG(0, 2071 dev_dbg(&link->dev,
2084 "ray_cs interrupt network \"%s\" join failed\n", 2072 "ray_cs interrupt network \"%s\" join failed\n",
2085 local->sparm.b4.a_current_ess_id); 2073 local->sparm.b4.a_current_ess_id);
2086 local->timer.function = &join_net; 2074 local->timer.function = &join_net;
@@ -2091,19 +2079,19 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2091 case CCS_START_ASSOCIATION: 2079 case CCS_START_ASSOCIATION:
2092 if (status == CCS_COMMAND_COMPLETE) { 2080 if (status == CCS_COMMAND_COMPLETE) {
2093 local->card_status = CARD_ASSOC_COMPLETE; 2081 local->card_status = CARD_ASSOC_COMPLETE;
2094 DEBUG(0, "ray_cs association successful\n"); 2082 dev_dbg(&link->dev, "ray_cs association successful\n");
2095 } else { 2083 } else {
2096 DEBUG(0, "ray_cs association failed,\n"); 2084 dev_dbg(&link->dev, "ray_cs association failed,\n");
2097 local->card_status = CARD_ASSOC_FAILED; 2085 local->card_status = CARD_ASSOC_FAILED;
2098 join_net((u_long) local); 2086 join_net((u_long) local);
2099 } 2087 }
2100 break; 2088 break;
2101 case CCS_TX_REQUEST: 2089 case CCS_TX_REQUEST:
2102 if (status == CCS_COMMAND_COMPLETE) { 2090 if (status == CCS_COMMAND_COMPLETE) {
2103 DEBUG(3, 2091 dev_dbg(&link->dev,
2104 "ray_cs interrupt tx request complete\n"); 2092 "ray_cs interrupt tx request complete\n");
2105 } else { 2093 } else {
2106 DEBUG(1, 2094 dev_dbg(&link->dev,
2107 "ray_cs interrupt tx request failed\n"); 2095 "ray_cs interrupt tx request failed\n");
2108 } 2096 }
2109 if (!sniffer) 2097 if (!sniffer)
@@ -2111,21 +2099,21 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2111 netif_wake_queue(dev); 2099 netif_wake_queue(dev);
2112 break; 2100 break;
2113 case CCS_TEST_MEMORY: 2101 case CCS_TEST_MEMORY:
2114 DEBUG(1, "ray_cs interrupt mem test done\n"); 2102 dev_dbg(&link->dev, "ray_cs interrupt mem test done\n");
2115 break; 2103 break;
2116 case CCS_SHUTDOWN: 2104 case CCS_SHUTDOWN:
2117 DEBUG(1, 2105 dev_dbg(&link->dev,
2118 "ray_cs interrupt Unexpected CCS returned - Shutdown\n"); 2106 "ray_cs interrupt Unexpected CCS returned - Shutdown\n");
2119 break; 2107 break;
2120 case CCS_DUMP_MEMORY: 2108 case CCS_DUMP_MEMORY:
2121 DEBUG(1, "ray_cs interrupt dump memory done\n"); 2109 dev_dbg(&link->dev, "ray_cs interrupt dump memory done\n");
2122 break; 2110 break;
2123 case CCS_START_TIMER: 2111 case CCS_START_TIMER:
2124 DEBUG(2, 2112 dev_dbg(&link->dev,
2125 "ray_cs interrupt DING - raylink timer expired\n"); 2113 "ray_cs interrupt DING - raylink timer expired\n");
2126 break; 2114 break;
2127 default: 2115 default:
2128 DEBUG(1, 2116 dev_dbg(&link->dev,
2129 "ray_cs interrupt Unexpected CCS 0x%x returned 0x%x\n", 2117 "ray_cs interrupt Unexpected CCS 0x%x returned 0x%x\n",
2130 rcsindex, cmd); 2118 rcsindex, cmd);
2131 } 2119 }
@@ -2139,7 +2127,7 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2139 ray_rx(dev, local, prcs); 2127 ray_rx(dev, local, prcs);
2140 break; 2128 break;
2141 case REJOIN_NET_COMPLETE: 2129 case REJOIN_NET_COMPLETE:
2142 DEBUG(1, "ray_cs interrupt rejoin net complete\n"); 2130 dev_dbg(&link->dev, "ray_cs interrupt rejoin net complete\n");
2143 local->card_status = CARD_ACQ_COMPLETE; 2131 local->card_status = CARD_ACQ_COMPLETE;
2144 /* do we need to clear tx buffers CCS's? */ 2132 /* do we need to clear tx buffers CCS's? */
2145 if (local->sparm.b4.a_network_type == ADHOC) { 2133 if (local->sparm.b4.a_network_type == ADHOC) {
@@ -2149,7 +2137,7 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2149 memcpy_fromio(&local->bss_id, 2137 memcpy_fromio(&local->bss_id,
2150 prcs->var.rejoin_net_complete. 2138 prcs->var.rejoin_net_complete.
2151 bssid, ADDRLEN); 2139 bssid, ADDRLEN);
2152 DEBUG(1, 2140 dev_dbg(&link->dev,
2153 "ray_cs new BSSID = %02x%02x%02x%02x%02x%02x\n", 2141 "ray_cs new BSSID = %02x%02x%02x%02x%02x%02x\n",
2154 local->bss_id[0], local->bss_id[1], 2142 local->bss_id[0], local->bss_id[1],
2155 local->bss_id[2], local->bss_id[3], 2143 local->bss_id[2], local->bss_id[3],
@@ -2159,15 +2147,15 @@ static irqreturn_t ray_interrupt(int irq, void *dev_id)
2159 } 2147 }
2160 break; 2148 break;
2161 case ROAMING_INITIATED: 2149 case ROAMING_INITIATED:
2162 DEBUG(1, "ray_cs interrupt roaming initiated\n"); 2150 dev_dbg(&link->dev, "ray_cs interrupt roaming initiated\n");
2163 netif_stop_queue(dev); 2151 netif_stop_queue(dev);
2164 local->card_status = CARD_DOING_ACQ; 2152 local->card_status = CARD_DOING_ACQ;
2165 break; 2153 break;
2166 case JAPAN_CALL_SIGN_RXD: 2154 case JAPAN_CALL_SIGN_RXD:
2167 DEBUG(1, "ray_cs interrupt japan call sign rx\n"); 2155 dev_dbg(&link->dev, "ray_cs interrupt japan call sign rx\n");
2168 break; 2156 break;
2169 default: 2157 default:
2170 DEBUG(1, 2158 dev_dbg(&link->dev,
2171 "ray_cs Unexpected interrupt for RCS 0x%x cmd = 0x%x\n", 2159 "ray_cs Unexpected interrupt for RCS 0x%x cmd = 0x%x\n",
2172 rcsindex, 2160 rcsindex,
2173 (unsigned int)readb(&prcs->interrupt_id)); 2161 (unsigned int)readb(&prcs->interrupt_id));
@@ -2186,7 +2174,7 @@ static void ray_rx(struct net_device *dev, ray_dev_t *local,
2186 int rx_len; 2174 int rx_len;
2187 unsigned int pkt_addr; 2175 unsigned int pkt_addr;
2188 void __iomem *pmsg; 2176 void __iomem *pmsg;
2189 DEBUG(4, "ray_rx process rx packet\n"); 2177 pr_debug("ray_rx process rx packet\n");
2190 2178
2191 /* Calculate address of packet within Rx buffer */ 2179 /* Calculate address of packet within Rx buffer */
2192 pkt_addr = ((readb(&prcs->var.rx_packet.rx_data_ptr[0]) << 8) 2180 pkt_addr = ((readb(&prcs->var.rx_packet.rx_data_ptr[0]) << 8)
@@ -2199,28 +2187,28 @@ static void ray_rx(struct net_device *dev, ray_dev_t *local,
2199 pmsg = local->rmem + pkt_addr; 2187 pmsg = local->rmem + pkt_addr;
2200 switch (readb(pmsg)) { 2188 switch (readb(pmsg)) {
2201 case DATA_TYPE: 2189 case DATA_TYPE:
2202 DEBUG(4, "ray_rx data type\n"); 2190 pr_debug("ray_rx data type\n");
2203 rx_data(dev, prcs, pkt_addr, rx_len); 2191 rx_data(dev, prcs, pkt_addr, rx_len);
2204 break; 2192 break;
2205 case AUTHENTIC_TYPE: 2193 case AUTHENTIC_TYPE:
2206 DEBUG(4, "ray_rx authentic type\n"); 2194 pr_debug("ray_rx authentic type\n");
2207 if (sniffer) 2195 if (sniffer)
2208 rx_data(dev, prcs, pkt_addr, rx_len); 2196 rx_data(dev, prcs, pkt_addr, rx_len);
2209 else 2197 else
2210 rx_authenticate(local, prcs, pkt_addr, rx_len); 2198 rx_authenticate(local, prcs, pkt_addr, rx_len);
2211 break; 2199 break;
2212 case DEAUTHENTIC_TYPE: 2200 case DEAUTHENTIC_TYPE:
2213 DEBUG(4, "ray_rx deauth type\n"); 2201 pr_debug("ray_rx deauth type\n");
2214 if (sniffer) 2202 if (sniffer)
2215 rx_data(dev, prcs, pkt_addr, rx_len); 2203 rx_data(dev, prcs, pkt_addr, rx_len);
2216 else 2204 else
2217 rx_deauthenticate(local, prcs, pkt_addr, rx_len); 2205 rx_deauthenticate(local, prcs, pkt_addr, rx_len);
2218 break; 2206 break;
2219 case NULL_MSG_TYPE: 2207 case NULL_MSG_TYPE:
2220 DEBUG(3, "ray_cs rx NULL msg\n"); 2208 pr_debug("ray_cs rx NULL msg\n");
2221 break; 2209 break;
2222 case BEACON_TYPE: 2210 case BEACON_TYPE:
2223 DEBUG(4, "ray_rx beacon type\n"); 2211 pr_debug("ray_rx beacon type\n");
2224 if (sniffer) 2212 if (sniffer)
2225 rx_data(dev, prcs, pkt_addr, rx_len); 2213 rx_data(dev, prcs, pkt_addr, rx_len);
2226 2214
@@ -2233,7 +2221,7 @@ static void ray_rx(struct net_device *dev, ray_dev_t *local,
2233 ray_get_stats(dev); 2221 ray_get_stats(dev);
2234 break; 2222 break;
2235 default: 2223 default:
2236 DEBUG(0, "ray_cs unknown pkt type %2x\n", 2224 pr_debug("ray_cs unknown pkt type %2x\n",
2237 (unsigned int)readb(pmsg)); 2225 (unsigned int)readb(pmsg));
2238 break; 2226 break;
2239 } 2227 }
@@ -2262,7 +2250,7 @@ static void rx_data(struct net_device *dev, struct rcs __iomem *prcs,
2262 rx_len > 2250 rx_len >
2263 (dev->mtu + RX_MAC_HEADER_LENGTH + ETH_HLEN + 2251 (dev->mtu + RX_MAC_HEADER_LENGTH + ETH_HLEN +
2264 FCS_LEN)) { 2252 FCS_LEN)) {
2265 DEBUG(0, 2253 pr_debug(
2266 "ray_cs invalid packet length %d received \n", 2254 "ray_cs invalid packet length %d received \n",
2267 rx_len); 2255 rx_len);
2268 return; 2256 return;
@@ -2273,17 +2261,17 @@ static void rx_data(struct net_device *dev, struct rcs __iomem *prcs,
2273 rx_len > 2261 rx_len >
2274 (dev->mtu + RX_MAC_HEADER_LENGTH + ETH_HLEN + 2262 (dev->mtu + RX_MAC_HEADER_LENGTH + ETH_HLEN +
2275 FCS_LEN)) { 2263 FCS_LEN)) {
2276 DEBUG(0, 2264 pr_debug(
2277 "ray_cs invalid packet length %d received \n", 2265 "ray_cs invalid packet length %d received \n",
2278 rx_len); 2266 rx_len);
2279 return; 2267 return;
2280 } 2268 }
2281 } 2269 }
2282 } 2270 }
2283 DEBUG(4, "ray_cs rx_data packet\n"); 2271 pr_debug("ray_cs rx_data packet\n");
2284 /* If fragmented packet, verify sizes of fragments add up */ 2272 /* If fragmented packet, verify sizes of fragments add up */
2285 if (readb(&prcs->var.rx_packet.next_frag_rcs_index) != 0xFF) { 2273 if (readb(&prcs->var.rx_packet.next_frag_rcs_index) != 0xFF) {
2286 DEBUG(1, "ray_cs rx'ed fragment\n"); 2274 pr_debug("ray_cs rx'ed fragment\n");
2287 tmp = (readb(&prcs->var.rx_packet.totalpacketlength[0]) << 8) 2275 tmp = (readb(&prcs->var.rx_packet.totalpacketlength[0]) << 8)
2288 + readb(&prcs->var.rx_packet.totalpacketlength[1]); 2276 + readb(&prcs->var.rx_packet.totalpacketlength[1]);
2289 total_len = tmp; 2277 total_len = tmp;
@@ -2301,7 +2289,7 @@ static void rx_data(struct net_device *dev, struct rcs __iomem *prcs,
2301 } while (1); 2289 } while (1);
2302 2290
2303 if (tmp < 0) { 2291 if (tmp < 0) {
2304 DEBUG(0, 2292 pr_debug(
2305 "ray_cs rx_data fragment lengths don't add up\n"); 2293 "ray_cs rx_data fragment lengths don't add up\n");
2306 local->stats.rx_dropped++; 2294 local->stats.rx_dropped++;
2307 release_frag_chain(local, prcs); 2295 release_frag_chain(local, prcs);
@@ -2313,7 +2301,7 @@ static void rx_data(struct net_device *dev, struct rcs __iomem *prcs,
2313 2301
2314 skb = dev_alloc_skb(total_len + 5); 2302 skb = dev_alloc_skb(total_len + 5);
2315 if (skb == NULL) { 2303 if (skb == NULL) {
2316 DEBUG(0, "ray_cs rx_data could not allocate skb\n"); 2304 pr_debug("ray_cs rx_data could not allocate skb\n");
2317 local->stats.rx_dropped++; 2305 local->stats.rx_dropped++;
2318 if (readb(&prcs->var.rx_packet.next_frag_rcs_index) != 0xFF) 2306 if (readb(&prcs->var.rx_packet.next_frag_rcs_index) != 0xFF)
2319 release_frag_chain(local, prcs); 2307 release_frag_chain(local, prcs);
@@ -2321,7 +2309,7 @@ static void rx_data(struct net_device *dev, struct rcs __iomem *prcs,
2321 } 2309 }
2322 skb_reserve(skb, 2); /* Align IP on 16 byte (TBD check this) */ 2310 skb_reserve(skb, 2); /* Align IP on 16 byte (TBD check this) */
2323 2311
2324 DEBUG(4, "ray_cs rx_data total_len = %x, rx_len = %x\n", total_len, 2312 pr_debug("ray_cs rx_data total_len = %x, rx_len = %x\n", total_len,
2325 rx_len); 2313 rx_len);
2326 2314
2327/************************/ 2315/************************/
@@ -2354,7 +2342,7 @@ static void rx_data(struct net_device *dev, struct rcs __iomem *prcs,
2354 tmp = 17; 2342 tmp = 17;
2355 if (readb(&prcs->var.rx_packet.next_frag_rcs_index) != 0xFF) { 2343 if (readb(&prcs->var.rx_packet.next_frag_rcs_index) != 0xFF) {
2356 prcslink = prcs; 2344 prcslink = prcs;
2357 DEBUG(1, "ray_cs rx_data in fragment loop\n"); 2345 pr_debug("ray_cs rx_data in fragment loop\n");
2358 do { 2346 do {
2359 prcslink = rcs_base(local) 2347 prcslink = rcs_base(local)
2360 + 2348 +
@@ -2426,8 +2414,8 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len)
2426 memcpy(destaddr, ieee80211_get_DA(pmac), ADDRLEN); 2414 memcpy(destaddr, ieee80211_get_DA(pmac), ADDRLEN);
2427 memcpy(srcaddr, ieee80211_get_SA(pmac), ADDRLEN); 2415 memcpy(srcaddr, ieee80211_get_SA(pmac), ADDRLEN);
2428 2416
2429#ifdef PCMCIA_DEBUG 2417#if 0
2430 if (pc_debug > 3) { 2418 if {
2431 print_hex_dump(KERN_DEBUG, "skb->data before untranslate: ", 2419 print_hex_dump(KERN_DEBUG, "skb->data before untranslate: ",
2432 DUMP_PREFIX_NONE, 16, 1, 2420 DUMP_PREFIX_NONE, 16, 1,
2433 skb->data, 64, true); 2421 skb->data, 64, true);
@@ -2441,7 +2429,7 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len)
2441 2429
2442 if (psnap->dsap != 0xaa || psnap->ssap != 0xaa || psnap->ctrl != 3) { 2430 if (psnap->dsap != 0xaa || psnap->ssap != 0xaa || psnap->ctrl != 3) {
2443 /* not a snap type so leave it alone */ 2431 /* not a snap type so leave it alone */
2444 DEBUG(3, "ray_cs untranslate NOT SNAP %02x %02x %02x\n", 2432 pr_debug("ray_cs untranslate NOT SNAP %02x %02x %02x\n",
2445 psnap->dsap, psnap->ssap, psnap->ctrl); 2433 psnap->dsap, psnap->ssap, psnap->ctrl);
2446 2434
2447 delta = RX_MAC_HEADER_LENGTH - ETH_HLEN; 2435 delta = RX_MAC_HEADER_LENGTH - ETH_HLEN;
@@ -2450,7 +2438,7 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len)
2450 } else { /* Its a SNAP */ 2438 } else { /* Its a SNAP */
2451 if (memcmp(psnap->org, org_bridge, 3) == 0) { 2439 if (memcmp(psnap->org, org_bridge, 3) == 0) {
2452 /* EtherII and nuke the LLC */ 2440 /* EtherII and nuke the LLC */
2453 DEBUG(3, "ray_cs untranslate Bridge encap\n"); 2441 pr_debug("ray_cs untranslate Bridge encap\n");
2454 delta = RX_MAC_HEADER_LENGTH 2442 delta = RX_MAC_HEADER_LENGTH
2455 + sizeof(struct snaphdr_t) - ETH_HLEN; 2443 + sizeof(struct snaphdr_t) - ETH_HLEN;
2456 peth = (struct ethhdr *)(skb->data + delta); 2444 peth = (struct ethhdr *)(skb->data + delta);
@@ -2459,14 +2447,14 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len)
2459 switch (ntohs(type)) { 2447 switch (ntohs(type)) {
2460 case ETH_P_IPX: 2448 case ETH_P_IPX:
2461 case ETH_P_AARP: 2449 case ETH_P_AARP:
2462 DEBUG(3, "ray_cs untranslate RFC IPX/AARP\n"); 2450 pr_debug("ray_cs untranslate RFC IPX/AARP\n");
2463 delta = RX_MAC_HEADER_LENGTH - ETH_HLEN; 2451 delta = RX_MAC_HEADER_LENGTH - ETH_HLEN;
2464 peth = (struct ethhdr *)(skb->data + delta); 2452 peth = (struct ethhdr *)(skb->data + delta);
2465 peth->h_proto = 2453 peth->h_proto =
2466 htons(len - RX_MAC_HEADER_LENGTH); 2454 htons(len - RX_MAC_HEADER_LENGTH);
2467 break; 2455 break;
2468 default: 2456 default:
2469 DEBUG(3, "ray_cs untranslate RFC default\n"); 2457 pr_debug("ray_cs untranslate RFC default\n");
2470 delta = RX_MAC_HEADER_LENGTH + 2458 delta = RX_MAC_HEADER_LENGTH +
2471 sizeof(struct snaphdr_t) - ETH_HLEN; 2459 sizeof(struct snaphdr_t) - ETH_HLEN;
2472 peth = (struct ethhdr *)(skb->data + delta); 2460 peth = (struct ethhdr *)(skb->data + delta);
@@ -2482,12 +2470,12 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len)
2482 } 2470 }
2483/* TBD reserve skb_reserve(skb, delta); */ 2471/* TBD reserve skb_reserve(skb, delta); */
2484 skb_pull(skb, delta); 2472 skb_pull(skb, delta);
2485 DEBUG(3, "untranslate after skb_pull(%d), skb->data = %p\n", delta, 2473 pr_debug("untranslate after skb_pull(%d), skb->data = %p\n", delta,
2486 skb->data); 2474 skb->data);
2487 memcpy(peth->h_dest, destaddr, ADDRLEN); 2475 memcpy(peth->h_dest, destaddr, ADDRLEN);
2488 memcpy(peth->h_source, srcaddr, ADDRLEN); 2476 memcpy(peth->h_source, srcaddr, ADDRLEN);
2489#ifdef PCMCIA_DEBUG 2477#if 0
2490 if (pc_debug > 3) { 2478 {
2491 int i; 2479 int i;
2492 printk(KERN_DEBUG "skb->data after untranslate:"); 2480 printk(KERN_DEBUG "skb->data after untranslate:");
2493 for (i = 0; i < 64; i++) 2481 for (i = 0; i < 64; i++)
@@ -2529,7 +2517,7 @@ static void release_frag_chain(ray_dev_t *local, struct rcs __iomem *prcs)
2529 while (tmp--) { 2517 while (tmp--) {
2530 writeb(CCS_BUFFER_FREE, &prcslink->buffer_status); 2518 writeb(CCS_BUFFER_FREE, &prcslink->buffer_status);
2531 if (rcsindex >= (NUMBER_OF_CCS + NUMBER_OF_RCS)) { 2519 if (rcsindex >= (NUMBER_OF_CCS + NUMBER_OF_RCS)) {
2532 DEBUG(1, "ray_cs interrupt bad rcsindex = 0x%x\n", 2520 pr_debug("ray_cs interrupt bad rcsindex = 0x%x\n",
2533 rcsindex); 2521 rcsindex);
2534 break; 2522 break;
2535 } 2523 }
@@ -2543,9 +2531,9 @@ static void release_frag_chain(ray_dev_t *local, struct rcs __iomem *prcs)
2543static void authenticate(ray_dev_t *local) 2531static void authenticate(ray_dev_t *local)
2544{ 2532{
2545 struct pcmcia_device *link = local->finder; 2533 struct pcmcia_device *link = local->finder;
2546 DEBUG(0, "ray_cs Starting authentication.\n"); 2534 dev_dbg(&link->dev, "ray_cs Starting authentication.\n");
2547 if (!(pcmcia_dev_present(link))) { 2535 if (!(pcmcia_dev_present(link))) {
2548 DEBUG(2, "ray_cs authenticate - device not present\n"); 2536 dev_dbg(&link->dev, "ray_cs authenticate - device not present\n");
2549 return; 2537 return;
2550 } 2538 }
2551 2539
@@ -2573,11 +2561,11 @@ static void rx_authenticate(ray_dev_t *local, struct rcs __iomem *prcs,
2573 copy_from_rx_buff(local, buff, pkt_addr, rx_len & 0xff); 2561 copy_from_rx_buff(local, buff, pkt_addr, rx_len & 0xff);
2574 /* if we are trying to get authenticated */ 2562 /* if we are trying to get authenticated */
2575 if (local->sparm.b4.a_network_type == ADHOC) { 2563 if (local->sparm.b4.a_network_type == ADHOC) {
2576 DEBUG(1, "ray_cs rx_auth var= %02x %02x %02x %02x %02x %02x\n", 2564 pr_debug("ray_cs rx_auth var= %02x %02x %02x %02x %02x %02x\n",
2577 msg->var[0], msg->var[1], msg->var[2], msg->var[3], 2565 msg->var[0], msg->var[1], msg->var[2], msg->var[3],
2578 msg->var[4], msg->var[5]); 2566 msg->var[4], msg->var[5]);
2579 if (msg->var[2] == 1) { 2567 if (msg->var[2] == 1) {
2580 DEBUG(0, "ray_cs Sending authentication response.\n"); 2568 pr_debug("ray_cs Sending authentication response.\n");
2581 if (!build_auth_frame 2569 if (!build_auth_frame
2582 (local, msg->mac.addr_2, OPEN_AUTH_RESPONSE)) { 2570 (local, msg->mac.addr_2, OPEN_AUTH_RESPONSE)) {
2583 local->authentication_state = NEED_TO_AUTH; 2571 local->authentication_state = NEED_TO_AUTH;
@@ -2591,13 +2579,13 @@ static void rx_authenticate(ray_dev_t *local, struct rcs __iomem *prcs,
2591 /* Verify authentication sequence #2 and success */ 2579 /* Verify authentication sequence #2 and success */
2592 if (msg->var[2] == 2) { 2580 if (msg->var[2] == 2) {
2593 if ((msg->var[3] | msg->var[4]) == 0) { 2581 if ((msg->var[3] | msg->var[4]) == 0) {
2594 DEBUG(1, "Authentication successful\n"); 2582 pr_debug("Authentication successful\n");
2595 local->card_status = CARD_AUTH_COMPLETE; 2583 local->card_status = CARD_AUTH_COMPLETE;
2596 associate(local); 2584 associate(local);
2597 local->authentication_state = 2585 local->authentication_state =
2598 AUTHENTICATED; 2586 AUTHENTICATED;
2599 } else { 2587 } else {
2600 DEBUG(0, "Authentication refused\n"); 2588 pr_debug("Authentication refused\n");
2601 local->card_status = CARD_AUTH_REFUSED; 2589 local->card_status = CARD_AUTH_REFUSED;
2602 join_net((u_long) local); 2590 join_net((u_long) local);
2603 local->authentication_state = 2591 local->authentication_state =
@@ -2617,22 +2605,22 @@ static void associate(ray_dev_t *local)
2617 struct net_device *dev = link->priv; 2605 struct net_device *dev = link->priv;
2618 int ccsindex; 2606 int ccsindex;
2619 if (!(pcmcia_dev_present(link))) { 2607 if (!(pcmcia_dev_present(link))) {
2620 DEBUG(2, "ray_cs associate - device not present\n"); 2608 dev_dbg(&link->dev, "ray_cs associate - device not present\n");
2621 return; 2609 return;
2622 } 2610 }
2623 /* If no tx buffers available, return */ 2611 /* If no tx buffers available, return */
2624 if ((ccsindex = get_free_ccs(local)) < 0) { 2612 if ((ccsindex = get_free_ccs(local)) < 0) {
2625/* TBD should never be here but... what if we are? */ 2613/* TBD should never be here but... what if we are? */
2626 DEBUG(1, "ray_cs associate - No free ccs\n"); 2614 dev_dbg(&link->dev, "ray_cs associate - No free ccs\n");
2627 return; 2615 return;
2628 } 2616 }
2629 DEBUG(1, "ray_cs Starting association with access point\n"); 2617 dev_dbg(&link->dev, "ray_cs Starting association with access point\n");
2630 pccs = ccs_base(local) + ccsindex; 2618 pccs = ccs_base(local) + ccsindex;
2631 /* fill in the CCS */ 2619 /* fill in the CCS */
2632 writeb(CCS_START_ASSOCIATION, &pccs->cmd); 2620 writeb(CCS_START_ASSOCIATION, &pccs->cmd);
2633 /* Interrupt the firmware to process the command */ 2621 /* Interrupt the firmware to process the command */
2634 if (interrupt_ecf(local, ccsindex)) { 2622 if (interrupt_ecf(local, ccsindex)) {
2635 DEBUG(1, "ray_cs associate failed - ECF not ready for intr\n"); 2623 dev_dbg(&link->dev, "ray_cs associate failed - ECF not ready for intr\n");
2636 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status); 2624 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status);
2637 2625
2638 del_timer(&local->timer); 2626 del_timer(&local->timer);
@@ -2655,7 +2643,7 @@ static void rx_deauthenticate(ray_dev_t *local, struct rcs __iomem *prcs,
2655/* UCHAR buff[256]; 2643/* UCHAR buff[256];
2656 struct rx_msg *msg = (struct rx_msg *)buff; 2644 struct rx_msg *msg = (struct rx_msg *)buff;
2657*/ 2645*/
2658 DEBUG(0, "Deauthentication frame received\n"); 2646 pr_debug("Deauthentication frame received\n");
2659 local->authentication_state = UNAUTHENTICATED; 2647 local->authentication_state = UNAUTHENTICATED;
2660 /* Need to reauthenticate or rejoin depending on reason code */ 2648 /* Need to reauthenticate or rejoin depending on reason code */
2661/* copy_from_rx_buff(local, buff, pkt_addr, rx_len & 0xff); 2649/* copy_from_rx_buff(local, buff, pkt_addr, rx_len & 0xff);
@@ -2823,7 +2811,7 @@ static int build_auth_frame(ray_dev_t *local, UCHAR *dest, int auth_type)
2823 2811
2824 /* If no tx buffers available, return */ 2812 /* If no tx buffers available, return */
2825 if ((ccsindex = get_free_tx_ccs(local)) < 0) { 2813 if ((ccsindex = get_free_tx_ccs(local)) < 0) {
2826 DEBUG(1, "ray_cs send authenticate - No free tx ccs\n"); 2814 pr_debug("ray_cs send authenticate - No free tx ccs\n");
2827 return -1; 2815 return -1;
2828 } 2816 }
2829 2817
@@ -2855,7 +2843,7 @@ static int build_auth_frame(ray_dev_t *local, UCHAR *dest, int auth_type)
2855 2843
2856 /* Interrupt the firmware to process the command */ 2844 /* Interrupt the firmware to process the command */
2857 if (interrupt_ecf(local, ccsindex)) { 2845 if (interrupt_ecf(local, ccsindex)) {
2858 DEBUG(1, 2846 pr_debug(
2859 "ray_cs send authentication request failed - ECF not ready for intr\n"); 2847 "ray_cs send authentication request failed - ECF not ready for intr\n");
2860 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status); 2848 writeb(CCS_BUFFER_FREE, &(pccs++)->buffer_status);
2861 return -1; 2849 return -1;
@@ -2865,18 +2853,8 @@ static int build_auth_frame(ray_dev_t *local, UCHAR *dest, int auth_type)
2865 2853
2866/*===========================================================================*/ 2854/*===========================================================================*/
2867#ifdef CONFIG_PROC_FS 2855#ifdef CONFIG_PROC_FS
2868static void raycs_write(const char *name, write_proc_t *w, void *data) 2856static ssize_t ray_cs_essid_proc_write(struct file *file,
2869{ 2857 const char __user *buffer, size_t count, loff_t *pos)
2870 struct proc_dir_entry *entry =
2871 create_proc_entry(name, S_IFREG | S_IWUSR, NULL);
2872 if (entry) {
2873 entry->write_proc = w;
2874 entry->data = data;
2875 }
2876}
2877
2878static int write_essid(struct file *file, const char __user *buffer,
2879 unsigned long count, void *data)
2880{ 2858{
2881 static char proc_essid[33]; 2859 static char proc_essid[33];
2882 unsigned int len = count; 2860 unsigned int len = count;
@@ -2890,8 +2868,13 @@ static int write_essid(struct file *file, const char __user *buffer,
2890 return count; 2868 return count;
2891} 2869}
2892 2870
2893static int write_int(struct file *file, const char __user *buffer, 2871static const struct file_operations ray_cs_essid_proc_fops = {
2894 unsigned long count, void *data) 2872 .owner = THIS_MODULE,
2873 .write = ray_cs_essid_proc_write,
2874};
2875
2876static ssize_t int_proc_write(struct file *file, const char __user *buffer,
2877 size_t count, loff_t *pos)
2895{ 2878{
2896 static char proc_number[10]; 2879 static char proc_number[10];
2897 char *p; 2880 char *p;
@@ -2914,9 +2897,14 @@ static int write_int(struct file *file, const char __user *buffer,
2914 nr = nr * 10 + c; 2897 nr = nr * 10 + c;
2915 p++; 2898 p++;
2916 } while (--len); 2899 } while (--len);
2917 *(int *)data = nr; 2900 *(int *)PDE(file->f_path.dentry->d_inode)->data = nr;
2918 return count; 2901 return count;
2919} 2902}
2903
2904static const struct file_operations int_proc_fops = {
2905 .owner = THIS_MODULE,
2906 .write = int_proc_write,
2907};
2920#endif 2908#endif
2921 2909
2922static struct pcmcia_device_id ray_ids[] = { 2910static struct pcmcia_device_id ray_ids[] = {
@@ -2942,18 +2930,18 @@ static int __init init_ray_cs(void)
2942{ 2930{
2943 int rc; 2931 int rc;
2944 2932
2945 DEBUG(1, "%s\n", rcsid); 2933 pr_debug("%s\n", rcsid);
2946 rc = pcmcia_register_driver(&ray_driver); 2934 rc = pcmcia_register_driver(&ray_driver);
2947 DEBUG(1, "raylink init_module register_pcmcia_driver returns 0x%x\n", 2935 pr_debug("raylink init_module register_pcmcia_driver returns 0x%x\n",
2948 rc); 2936 rc);
2949 2937
2950#ifdef CONFIG_PROC_FS 2938#ifdef CONFIG_PROC_FS
2951 proc_mkdir("driver/ray_cs", NULL); 2939 proc_mkdir("driver/ray_cs", NULL);
2952 2940
2953 proc_create("driver/ray_cs/ray_cs", 0, NULL, &ray_cs_proc_fops); 2941 proc_create("driver/ray_cs/ray_cs", 0, NULL, &ray_cs_proc_fops);
2954 raycs_write("driver/ray_cs/essid", write_essid, NULL); 2942 proc_create("driver/ray_cs/essid", S_IWUSR, NULL, &ray_cs_essid_proc_fops);
2955 raycs_write("driver/ray_cs/net_type", write_int, &net_type); 2943 proc_create_data("driver/ray_cs/net_type", S_IWUSR, NULL, &int_proc_fops, &net_type);
2956 raycs_write("driver/ray_cs/translate", write_int, &translate); 2944 proc_create_data("driver/ray_cs/translate", S_IWUSR, NULL, &int_proc_fops, &translate);
2957#endif 2945#endif
2958 if (translate != 0) 2946 if (translate != 0)
2959 translate = 1; 2947 translate = 1;
@@ -2964,7 +2952,7 @@ static int __init init_ray_cs(void)
2964 2952
2965static void __exit exit_ray_cs(void) 2953static void __exit exit_ray_cs(void)
2966{ 2954{
2967 DEBUG(0, "ray_cs: cleanup_module\n"); 2955 pr_debug("ray_cs: cleanup_module\n");
2968 2956
2969#ifdef CONFIG_PROC_FS 2957#ifdef CONFIG_PROC_FS
2970 remove_proc_entry("driver/ray_cs/ray_cs", NULL); 2958 remove_proc_entry("driver/ray_cs/ray_cs", NULL);
diff --git a/drivers/net/wireless/rndis_wlan.c b/drivers/net/wireless/rndis_wlan.c
index 54175b6fa86c..1de5b22d3efe 100644
--- a/drivers/net/wireless/rndis_wlan.c
+++ b/drivers/net/wireless/rndis_wlan.c
@@ -41,6 +41,7 @@
41#include <linux/if_arp.h> 41#include <linux/if_arp.h>
42#include <linux/ctype.h> 42#include <linux/ctype.h>
43#include <linux/spinlock.h> 43#include <linux/spinlock.h>
44#include <linux/slab.h>
44#include <net/iw_handler.h> 45#include <net/iw_handler.h>
45#include <net/cfg80211.h> 46#include <net/cfg80211.h>
46#include <linux/usb/usbnet.h> 47#include <linux/usb/usbnet.h>
@@ -83,11 +84,11 @@ MODULE_PARM_DESC(roamdelta,
83 "set roaming tendency: 0=aggressive, 1=moderate, " 84 "set roaming tendency: 0=aggressive, 1=moderate, "
84 "2=conservative (default: moderate)"); 85 "2=conservative (default: moderate)");
85 86
86static int modparam_workaround_interval = 500; 87static int modparam_workaround_interval;
87module_param_named(workaround_interval, modparam_workaround_interval, 88module_param_named(workaround_interval, modparam_workaround_interval,
88 int, 0444); 89 int, 0444);
89MODULE_PARM_DESC(workaround_interval, 90MODULE_PARM_DESC(workaround_interval,
90 "set stall workaround interval in msecs (default: 500)"); 91 "set stall workaround interval in msecs (0=disabled) (default: 0)");
91 92
92 93
93/* various RNDIS OID defs */ 94/* various RNDIS OID defs */
@@ -728,21 +729,22 @@ static int rndis_query_oid(struct usbnet *dev, __le32 oid, void *data, int *len)
728 ret = rndis_command(dev, u.header, buflen); 729 ret = rndis_command(dev, u.header, buflen);
729 priv->current_command_oid = 0; 730 priv->current_command_oid = 0;
730 if (ret < 0) 731 if (ret < 0)
731 devdbg(dev, "rndis_query_oid(%s): rndis_command() failed, %d " 732 netdev_dbg(dev->net, "%s(%s): rndis_command() failed, %d (%08x)\n",
732 "(%08x)", oid_to_string(oid), ret, 733 __func__, oid_to_string(oid), ret,
733 le32_to_cpu(u.get_c->status)); 734 le32_to_cpu(u.get_c->status));
734 735
735 if (ret == 0) { 736 if (ret == 0) {
737 memcpy(data, u.buf + le32_to_cpu(u.get_c->offset) + 8, *len);
738
736 ret = le32_to_cpu(u.get_c->len); 739 ret = le32_to_cpu(u.get_c->len);
737 if (ret > *len) 740 if (ret > *len)
738 *len = ret; 741 *len = ret;
739 memcpy(data, u.buf + le32_to_cpu(u.get_c->offset) + 8, *len);
740 ret = rndis_error_status(u.get_c->status);
741 742
743 ret = rndis_error_status(u.get_c->status);
742 if (ret < 0) 744 if (ret < 0)
743 devdbg(dev, "rndis_query_oid(%s): device returned " 745 netdev_dbg(dev->net, "%s(%s): device returned error, 0x%08x (%d)\n",
744 "error, 0x%08x (%d)", oid_to_string(oid), 746 __func__, oid_to_string(oid),
745 le32_to_cpu(u.get_c->status), ret); 747 le32_to_cpu(u.get_c->status), ret);
746 } 748 }
747 749
748 mutex_unlock(&priv->command_lock); 750 mutex_unlock(&priv->command_lock);
@@ -790,17 +792,17 @@ static int rndis_set_oid(struct usbnet *dev, __le32 oid, void *data, int len)
790 ret = rndis_command(dev, u.header, buflen); 792 ret = rndis_command(dev, u.header, buflen);
791 priv->current_command_oid = 0; 793 priv->current_command_oid = 0;
792 if (ret < 0) 794 if (ret < 0)
793 devdbg(dev, "rndis_set_oid(%s): rndis_command() failed, %d " 795 netdev_dbg(dev->net, "%s(%s): rndis_command() failed, %d (%08x)\n",
794 "(%08x)", oid_to_string(oid), ret, 796 __func__, oid_to_string(oid), ret,
795 le32_to_cpu(u.set_c->status)); 797 le32_to_cpu(u.set_c->status));
796 798
797 if (ret == 0) { 799 if (ret == 0) {
798 ret = rndis_error_status(u.set_c->status); 800 ret = rndis_error_status(u.set_c->status);
799 801
800 if (ret < 0) 802 if (ret < 0)
801 devdbg(dev, "rndis_set_oid(%s): device returned error, " 803 netdev_dbg(dev->net, "%s(%s): device returned error, 0x%08x (%d)\n",
802 "0x%08x (%d)", oid_to_string(oid), 804 __func__, oid_to_string(oid),
803 le32_to_cpu(u.set_c->status), ret); 805 le32_to_cpu(u.set_c->status), ret);
804 } 806 }
805 807
806 mutex_unlock(&priv->command_lock); 808 mutex_unlock(&priv->command_lock);
@@ -869,11 +871,11 @@ static int rndis_set_config_parameter(struct usbnet *dev, char *param,
869#endif 871#endif
870 872
871 if (value_type == 2) 873 if (value_type == 2)
872 devdbg(dev, "setting config parameter: %s, value: %s", 874 netdev_dbg(dev->net, "setting config parameter: %s, value: %s\n",
873 param, (u8 *)value); 875 param, (u8 *)value);
874 else 876 else
875 devdbg(dev, "setting config parameter: %s, value: %d", 877 netdev_dbg(dev->net, "setting config parameter: %s, value: %d\n",
876 param, *(u32 *)value); 878 param, *(u32 *)value);
877 879
878 infobuf->name_offs = cpu_to_le32(sizeof(*infobuf)); 880 infobuf->name_offs = cpu_to_le32(sizeof(*infobuf));
879 infobuf->name_length = cpu_to_le32(param_len); 881 infobuf->name_length = cpu_to_le32(param_len);
@@ -896,20 +898,21 @@ static int rndis_set_config_parameter(struct usbnet *dev, char *param,
896 } 898 }
897 899
898#ifdef DEBUG 900#ifdef DEBUG
899 devdbg(dev, "info buffer (len: %d):", info_len); 901 netdev_dbg(dev->net, "info buffer (len: %d)\n", info_len);
900 for (i = 0; i < info_len; i += 12) { 902 for (i = 0; i < info_len; i += 12) {
901 u32 *tmp = (u32 *)((u8 *)infobuf + i); 903 u32 *tmp = (u32 *)((u8 *)infobuf + i);
902 devdbg(dev, "%08X:%08X:%08X", 904 netdev_dbg(dev->net, "%08X:%08X:%08X\n",
903 cpu_to_be32(tmp[0]), 905 cpu_to_be32(tmp[0]),
904 cpu_to_be32(tmp[1]), 906 cpu_to_be32(tmp[1]),
905 cpu_to_be32(tmp[2])); 907 cpu_to_be32(tmp[2]));
906 } 908 }
907#endif 909#endif
908 910
909 ret = rndis_set_oid(dev, OID_GEN_RNDIS_CONFIG_PARAMETER, 911 ret = rndis_set_oid(dev, OID_GEN_RNDIS_CONFIG_PARAMETER,
910 infobuf, info_len); 912 infobuf, info_len);
911 if (ret != 0) 913 if (ret != 0)
912 devdbg(dev, "setting rndis config parameter failed, %d.", ret); 914 netdev_dbg(dev->net, "setting rndis config parameter failed, %d\n",
915 ret);
913 916
914 kfree(infobuf); 917 kfree(infobuf);
915 return ret; 918 return ret;
@@ -944,13 +947,13 @@ static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid)
944 947
945 ret = rndis_set_oid(usbdev, OID_802_11_SSID, ssid, sizeof(*ssid)); 948 ret = rndis_set_oid(usbdev, OID_802_11_SSID, ssid, sizeof(*ssid));
946 if (ret < 0) { 949 if (ret < 0) {
947 devwarn(usbdev, "setting SSID failed (%08X)", ret); 950 netdev_warn(usbdev->net, "setting SSID failed (%08X)\n", ret);
948 return ret; 951 return ret;
949 } 952 }
950 if (ret == 0) { 953 if (ret == 0) {
951 memcpy(&priv->essid, ssid, sizeof(priv->essid)); 954 memcpy(&priv->essid, ssid, sizeof(priv->essid));
952 priv->radio_on = true; 955 priv->radio_on = true;
953 devdbg(usbdev, "set_essid: radio_on = true"); 956 netdev_dbg(usbdev->net, "%s(): radio_on = true\n", __func__);
954 } 957 }
955 958
956 return ret; 959 return ret;
@@ -962,7 +965,8 @@ static int set_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN])
962 965
963 ret = rndis_set_oid(usbdev, OID_802_11_BSSID, bssid, ETH_ALEN); 966 ret = rndis_set_oid(usbdev, OID_802_11_BSSID, bssid, ETH_ALEN);
964 if (ret < 0) { 967 if (ret < 0) {
965 devwarn(usbdev, "setting BSSID[%pM] failed (%08X)", bssid, ret); 968 netdev_warn(usbdev->net, "setting BSSID[%pM] failed (%08X)\n",
969 bssid, ret);
966 return ret; 970 return ret;
967 } 971 }
968 972
@@ -1020,7 +1024,8 @@ static int disassociate(struct usbnet *usbdev, bool reset_ssid)
1020 ret = rndis_set_oid(usbdev, OID_802_11_DISASSOCIATE, NULL, 0); 1024 ret = rndis_set_oid(usbdev, OID_802_11_DISASSOCIATE, NULL, 0);
1021 if (ret == 0) { 1025 if (ret == 0) {
1022 priv->radio_on = false; 1026 priv->radio_on = false;
1023 devdbg(usbdev, "disassociate: radio_on = false"); 1027 netdev_dbg(usbdev->net, "%s(): radio_on = false\n",
1028 __func__);
1024 1029
1025 if (reset_ssid) 1030 if (reset_ssid)
1026 msleep(100); 1031 msleep(100);
@@ -1053,8 +1058,8 @@ static int set_auth_mode(struct usbnet *usbdev, u32 wpa_version,
1053 __le32 tmp; 1058 __le32 tmp;
1054 int auth_mode, ret; 1059 int auth_mode, ret;
1055 1060
1056 devdbg(usbdev, "set_auth_mode: wpa_version=0x%x authalg=0x%x " 1061 netdev_dbg(usbdev->net, "%s(): wpa_version=0x%x authalg=0x%x keymgmt=0x%x\n",
1057 "keymgmt=0x%x", wpa_version, auth_type, keymgmt); 1062 __func__, wpa_version, auth_type, keymgmt);
1058 1063
1059 if (wpa_version & NL80211_WPA_VERSION_2) { 1064 if (wpa_version & NL80211_WPA_VERSION_2) {
1060 if (keymgmt & RNDIS_WLAN_KEY_MGMT_802_1X) 1065 if (keymgmt & RNDIS_WLAN_KEY_MGMT_802_1X)
@@ -1072,6 +1077,8 @@ static int set_auth_mode(struct usbnet *usbdev, u32 wpa_version,
1072 auth_mode = NDIS_80211_AUTH_SHARED; 1077 auth_mode = NDIS_80211_AUTH_SHARED;
1073 else if (auth_type == NL80211_AUTHTYPE_OPEN_SYSTEM) 1078 else if (auth_type == NL80211_AUTHTYPE_OPEN_SYSTEM)
1074 auth_mode = NDIS_80211_AUTH_OPEN; 1079 auth_mode = NDIS_80211_AUTH_OPEN;
1080 else if (auth_type == NL80211_AUTHTYPE_AUTOMATIC)
1081 auth_mode = NDIS_80211_AUTH_AUTO_SWITCH;
1075 else 1082 else
1076 return -ENOTSUPP; 1083 return -ENOTSUPP;
1077 1084
@@ -1079,7 +1086,8 @@ static int set_auth_mode(struct usbnet *usbdev, u32 wpa_version,
1079 ret = rndis_set_oid(usbdev, OID_802_11_AUTHENTICATION_MODE, &tmp, 1086 ret = rndis_set_oid(usbdev, OID_802_11_AUTHENTICATION_MODE, &tmp,
1080 sizeof(tmp)); 1087 sizeof(tmp));
1081 if (ret != 0) { 1088 if (ret != 0) {
1082 devwarn(usbdev, "setting auth mode failed (%08X)", ret); 1089 netdev_warn(usbdev->net, "setting auth mode failed (%08X)\n",
1090 ret);
1083 return ret; 1091 return ret;
1084 } 1092 }
1085 1093
@@ -1095,7 +1103,8 @@ static int set_priv_filter(struct usbnet *usbdev)
1095 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); 1103 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
1096 __le32 tmp; 1104 __le32 tmp;
1097 1105
1098 devdbg(usbdev, "set_priv_filter: wpa_version=0x%x", priv->wpa_version); 1106 netdev_dbg(usbdev->net, "%s(): wpa_version=0x%x\n",
1107 __func__, priv->wpa_version);
1099 1108
1100 if (priv->wpa_version & NL80211_WPA_VERSION_2 || 1109 if (priv->wpa_version & NL80211_WPA_VERSION_2 ||
1101 priv->wpa_version & NL80211_WPA_VERSION_1) 1110 priv->wpa_version & NL80211_WPA_VERSION_1)
@@ -1113,8 +1122,8 @@ static int set_encr_mode(struct usbnet *usbdev, int pairwise, int groupwise)
1113 __le32 tmp; 1122 __le32 tmp;
1114 int encr_mode, ret; 1123 int encr_mode, ret;
1115 1124
1116 devdbg(usbdev, "set_encr_mode: cipher_pair=0x%x cipher_group=0x%x", 1125 netdev_dbg(usbdev->net, "%s(): cipher_pair=0x%x cipher_group=0x%x\n",
1117 pairwise, groupwise); 1126 __func__, pairwise, groupwise);
1118 1127
1119 if (pairwise & RNDIS_WLAN_ALG_CCMP) 1128 if (pairwise & RNDIS_WLAN_ALG_CCMP)
1120 encr_mode = NDIS_80211_ENCR_CCMP_ENABLED; 1129 encr_mode = NDIS_80211_ENCR_CCMP_ENABLED;
@@ -1133,7 +1142,8 @@ static int set_encr_mode(struct usbnet *usbdev, int pairwise, int groupwise)
1133 ret = rndis_set_oid(usbdev, OID_802_11_ENCRYPTION_STATUS, &tmp, 1142 ret = rndis_set_oid(usbdev, OID_802_11_ENCRYPTION_STATUS, &tmp,
1134 sizeof(tmp)); 1143 sizeof(tmp));
1135 if (ret != 0) { 1144 if (ret != 0) {
1136 devwarn(usbdev, "setting encr mode failed (%08X)", ret); 1145 netdev_warn(usbdev->net, "setting encr mode failed (%08X)\n",
1146 ret);
1137 return ret; 1147 return ret;
1138 } 1148 }
1139 1149
@@ -1148,13 +1158,15 @@ static int set_infra_mode(struct usbnet *usbdev, int mode)
1148 __le32 tmp; 1158 __le32 tmp;
1149 int ret; 1159 int ret;
1150 1160
1151 devdbg(usbdev, "set_infra_mode: infra_mode=0x%x", priv->infra_mode); 1161 netdev_dbg(usbdev->net, "%s(): infra_mode=0x%x\n",
1162 __func__, priv->infra_mode);
1152 1163
1153 tmp = cpu_to_le32(mode); 1164 tmp = cpu_to_le32(mode);
1154 ret = rndis_set_oid(usbdev, OID_802_11_INFRASTRUCTURE_MODE, &tmp, 1165 ret = rndis_set_oid(usbdev, OID_802_11_INFRASTRUCTURE_MODE, &tmp,
1155 sizeof(tmp)); 1166 sizeof(tmp));
1156 if (ret != 0) { 1167 if (ret != 0) {
1157 devwarn(usbdev, "setting infra mode failed (%08X)", ret); 1168 netdev_warn(usbdev->net, "setting infra mode failed (%08X)\n",
1169 ret);
1158 return ret; 1170 return ret;
1159 } 1171 }
1160 1172
@@ -1171,7 +1183,7 @@ static int set_rts_threshold(struct usbnet *usbdev, u32 rts_threshold)
1171{ 1183{
1172 __le32 tmp; 1184 __le32 tmp;
1173 1185
1174 devdbg(usbdev, "set_rts_threshold %i", rts_threshold); 1186 netdev_dbg(usbdev->net, "%s(): %i\n", __func__, rts_threshold);
1175 1187
1176 if (rts_threshold < 0 || rts_threshold > 2347) 1188 if (rts_threshold < 0 || rts_threshold > 2347)
1177 rts_threshold = 2347; 1189 rts_threshold = 2347;
@@ -1185,7 +1197,7 @@ static int set_frag_threshold(struct usbnet *usbdev, u32 frag_threshold)
1185{ 1197{
1186 __le32 tmp; 1198 __le32 tmp;
1187 1199
1188 devdbg(usbdev, "set_frag_threshold %i", frag_threshold); 1200 netdev_dbg(usbdev->net, "%s(): %i\n", __func__, frag_threshold);
1189 1201
1190 if (frag_threshold < 256 || frag_threshold > 2346) 1202 if (frag_threshold < 256 || frag_threshold > 2346)
1191 frag_threshold = 2346; 1203 frag_threshold = 2346;
@@ -1219,7 +1231,7 @@ static int set_channel(struct usbnet *usbdev, int channel)
1219 unsigned int dsconfig; 1231 unsigned int dsconfig;
1220 int len, ret; 1232 int len, ret;
1221 1233
1222 devdbg(usbdev, "set_channel(%d)", channel); 1234 netdev_dbg(usbdev->net, "%s(%d)\n", __func__, channel);
1223 1235
1224 /* this OID is valid only when not associated */ 1236 /* this OID is valid only when not associated */
1225 if (is_associated(usbdev)) 1237 if (is_associated(usbdev))
@@ -1230,7 +1242,8 @@ static int set_channel(struct usbnet *usbdev, int channel)
1230 len = sizeof(config); 1242 len = sizeof(config);
1231 ret = rndis_query_oid(usbdev, OID_802_11_CONFIGURATION, &config, &len); 1243 ret = rndis_query_oid(usbdev, OID_802_11_CONFIGURATION, &config, &len);
1232 if (ret < 0) { 1244 if (ret < 0) {
1233 devdbg(usbdev, "set_channel: querying configuration failed"); 1245 netdev_dbg(usbdev->net, "%s(): querying configuration failed\n",
1246 __func__);
1234 return ret; 1247 return ret;
1235 } 1248 }
1236 1249
@@ -1238,7 +1251,7 @@ static int set_channel(struct usbnet *usbdev, int channel)
1238 ret = rndis_set_oid(usbdev, OID_802_11_CONFIGURATION, &config, 1251 ret = rndis_set_oid(usbdev, OID_802_11_CONFIGURATION, &config,
1239 sizeof(config)); 1252 sizeof(config));
1240 1253
1241 devdbg(usbdev, "set_channel: %d -> %d", channel, ret); 1254 netdev_dbg(usbdev->net, "%s(): %d -> %d\n", __func__, channel, ret);
1242 1255
1243 return ret; 1256 return ret;
1244} 1257}
@@ -1252,7 +1265,8 @@ static int add_wep_key(struct usbnet *usbdev, const u8 *key, int key_len,
1252 u32 cipher; 1265 u32 cipher;
1253 int ret; 1266 int ret;
1254 1267
1255 devdbg(usbdev, "add_wep_key(idx: %d, len: %d)", index, key_len); 1268 netdev_dbg(usbdev->net, "%s(idx: %d, len: %d)\n",
1269 __func__, index, key_len);
1256 1270
1257 if ((key_len != 5 && key_len != 13) || index < 0 || index > 3) 1271 if ((key_len != 5 && key_len != 13) || index < 0 || index > 3)
1258 return -EINVAL; 1272 return -EINVAL;
@@ -1274,15 +1288,15 @@ static int add_wep_key(struct usbnet *usbdev, const u8 *key, int key_len,
1274 ret = set_encr_mode(usbdev, RNDIS_WLAN_ALG_WEP, 1288 ret = set_encr_mode(usbdev, RNDIS_WLAN_ALG_WEP,
1275 RNDIS_WLAN_ALG_NONE); 1289 RNDIS_WLAN_ALG_NONE);
1276 if (ret) 1290 if (ret)
1277 devwarn(usbdev, "encryption couldn't be enabled (%08X)", 1291 netdev_warn(usbdev->net, "encryption couldn't be enabled (%08X)\n",
1278 ret); 1292 ret);
1279 } 1293 }
1280 1294
1281 ret = rndis_set_oid(usbdev, OID_802_11_ADD_WEP, &ndis_key, 1295 ret = rndis_set_oid(usbdev, OID_802_11_ADD_WEP, &ndis_key,
1282 sizeof(ndis_key)); 1296 sizeof(ndis_key));
1283 if (ret != 0) { 1297 if (ret != 0) {
1284 devwarn(usbdev, "adding encryption key %d failed (%08X)", 1298 netdev_warn(usbdev->net, "adding encryption key %d failed (%08X)\n",
1285 index+1, ret); 1299 index + 1, ret);
1286 return ret; 1300 return ret;
1287 } 1301 }
1288 1302
@@ -1304,22 +1318,23 @@ static int add_wpa_key(struct usbnet *usbdev, const u8 *key, int key_len,
1304 int ret; 1318 int ret;
1305 1319
1306 if (index < 0 || index >= 4) { 1320 if (index < 0 || index >= 4) {
1307 devdbg(usbdev, "add_wpa_key: index out of range (%i)", index); 1321 netdev_dbg(usbdev->net, "%s(): index out of range (%i)\n",
1322 __func__, index);
1308 return -EINVAL; 1323 return -EINVAL;
1309 } 1324 }
1310 if (key_len > sizeof(ndis_key.material) || key_len < 0) { 1325 if (key_len > sizeof(ndis_key.material) || key_len < 0) {
1311 devdbg(usbdev, "add_wpa_key: key length out of range (%i)", 1326 netdev_dbg(usbdev->net, "%s(): key length out of range (%i)\n",
1312 key_len); 1327 __func__, key_len);
1313 return -EINVAL; 1328 return -EINVAL;
1314 } 1329 }
1315 if (flags & NDIS_80211_ADDKEY_SET_INIT_RECV_SEQ) { 1330 if (flags & NDIS_80211_ADDKEY_SET_INIT_RECV_SEQ) {
1316 if (!rx_seq || seq_len <= 0) { 1331 if (!rx_seq || seq_len <= 0) {
1317 devdbg(usbdev, "add_wpa_key: recv seq flag without" 1332 netdev_dbg(usbdev->net, "%s(): recv seq flag without buffer\n",
1318 "buffer"); 1333 __func__);
1319 return -EINVAL; 1334 return -EINVAL;
1320 } 1335 }
1321 if (rx_seq && seq_len > sizeof(ndis_key.rsc)) { 1336 if (rx_seq && seq_len > sizeof(ndis_key.rsc)) {
1322 devdbg(usbdev, "add_wpa_key: too big recv seq buffer"); 1337 netdev_dbg(usbdev->net, "%s(): too big recv seq buffer\n", __func__);
1323 return -EINVAL; 1338 return -EINVAL;
1324 } 1339 }
1325 } 1340 }
@@ -1327,15 +1342,16 @@ static int add_wpa_key(struct usbnet *usbdev, const u8 *key, int key_len,
1327 is_addr_ok = addr && !is_zero_ether_addr(addr) && 1342 is_addr_ok = addr && !is_zero_ether_addr(addr) &&
1328 !is_broadcast_ether_addr(addr); 1343 !is_broadcast_ether_addr(addr);
1329 if ((flags & NDIS_80211_ADDKEY_PAIRWISE_KEY) && !is_addr_ok) { 1344 if ((flags & NDIS_80211_ADDKEY_PAIRWISE_KEY) && !is_addr_ok) {
1330 devdbg(usbdev, "add_wpa_key: pairwise but bssid invalid (%pM)", 1345 netdev_dbg(usbdev->net, "%s(): pairwise but bssid invalid (%pM)\n",
1331 addr); 1346 __func__, addr);
1332 return -EINVAL; 1347 return -EINVAL;
1333 } 1348 }
1334 1349
1335 devdbg(usbdev, "add_wpa_key(%i): flags:%i%i%i", index, 1350 netdev_dbg(usbdev->net, "%s(%i): flags:%i%i%i\n",
1336 !!(flags & NDIS_80211_ADDKEY_TRANSMIT_KEY), 1351 __func__, index,
1337 !!(flags & NDIS_80211_ADDKEY_PAIRWISE_KEY), 1352 !!(flags & NDIS_80211_ADDKEY_TRANSMIT_KEY),
1338 !!(flags & NDIS_80211_ADDKEY_SET_INIT_RECV_SEQ)); 1353 !!(flags & NDIS_80211_ADDKEY_PAIRWISE_KEY),
1354 !!(flags & NDIS_80211_ADDKEY_SET_INIT_RECV_SEQ));
1339 1355
1340 memset(&ndis_key, 0, sizeof(ndis_key)); 1356 memset(&ndis_key, 0, sizeof(ndis_key));
1341 1357
@@ -1369,7 +1385,8 @@ static int add_wpa_key(struct usbnet *usbdev, const u8 *key, int key_len,
1369 1385
1370 ret = rndis_set_oid(usbdev, OID_802_11_ADD_KEY, &ndis_key, 1386 ret = rndis_set_oid(usbdev, OID_802_11_ADD_KEY, &ndis_key,
1371 le32_to_cpu(ndis_key.size)); 1387 le32_to_cpu(ndis_key.size));
1372 devdbg(usbdev, "add_wpa_key: OID_802_11_ADD_KEY -> %08X", ret); 1388 netdev_dbg(usbdev->net, "%s(): OID_802_11_ADD_KEY -> %08X\n",
1389 __func__, ret);
1373 if (ret != 0) 1390 if (ret != 0)
1374 return ret; 1391 return ret;
1375 1392
@@ -1398,7 +1415,7 @@ static int restore_key(struct usbnet *usbdev, int key_idx)
1398 1415
1399 key = priv->encr_keys[key_idx]; 1416 key = priv->encr_keys[key_idx];
1400 1417
1401 devdbg(usbdev, "restore_key: %i:%i", key_idx, key.len); 1418 netdev_dbg(usbdev->net, "%s(): %i:%i\n", __func__, key_idx, key.len);
1402 1419
1403 if (key.len == 0) 1420 if (key.len == 0)
1404 return 0; 1421 return 0;
@@ -1433,8 +1450,9 @@ static int remove_key(struct usbnet *usbdev, int index, const u8 *bssid)
1433 1450
1434 is_wpa = is_wpa_key(priv, index); 1451 is_wpa = is_wpa_key(priv, index);
1435 1452
1436 devdbg(usbdev, "remove_key: %i:%s:%i", index, is_wpa ? "wpa" : "wep", 1453 netdev_dbg(usbdev->net, "%s(): %i:%s:%i\n",
1437 priv->encr_keys[index].len); 1454 __func__, index, is_wpa ? "wpa" : "wep",
1455 priv->encr_keys[index].len);
1438 1456
1439 clear_key(priv, index); 1457 clear_key(priv, index);
1440 1458
@@ -1461,9 +1479,9 @@ static int remove_key(struct usbnet *usbdev, int index, const u8 *bssid)
1461 ret = rndis_set_oid(usbdev, OID_802_11_REMOVE_WEP, &keyindex, 1479 ret = rndis_set_oid(usbdev, OID_802_11_REMOVE_WEP, &keyindex,
1462 sizeof(keyindex)); 1480 sizeof(keyindex));
1463 if (ret != 0) { 1481 if (ret != 0) {
1464 devwarn(usbdev, 1482 netdev_warn(usbdev->net,
1465 "removing encryption key %d failed (%08X)", 1483 "removing encryption key %d failed (%08X)\n",
1466 index, ret); 1484 index, ret);
1467 return ret; 1485 return ret;
1468 } 1486 }
1469 } 1487 }
@@ -1479,59 +1497,76 @@ static void set_multicast_list(struct usbnet *usbdev)
1479{ 1497{
1480 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); 1498 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
1481 struct dev_mc_list *mclist; 1499 struct dev_mc_list *mclist;
1482 __le32 filter; 1500 __le32 filter, basefilter;
1483 int ret, i, size; 1501 int ret;
1484 char *buf; 1502 char *mc_addrs = NULL;
1503 int mc_count;
1485 1504
1486 filter = RNDIS_PACKET_TYPE_DIRECTED | RNDIS_PACKET_TYPE_BROADCAST; 1505 basefilter = filter = RNDIS_PACKET_TYPE_DIRECTED |
1506 RNDIS_PACKET_TYPE_BROADCAST;
1487 1507
1488 if (usbdev->net->flags & IFF_PROMISC) { 1508 if (usbdev->net->flags & IFF_PROMISC) {
1489 filter |= RNDIS_PACKET_TYPE_PROMISCUOUS | 1509 filter |= RNDIS_PACKET_TYPE_PROMISCUOUS |
1490 RNDIS_PACKET_TYPE_ALL_LOCAL; 1510 RNDIS_PACKET_TYPE_ALL_LOCAL;
1491 } else if (usbdev->net->flags & IFF_ALLMULTI || 1511 } else if (usbdev->net->flags & IFF_ALLMULTI) {
1492 usbdev->net->mc_count > priv->multicast_size) {
1493 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST; 1512 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;
1494 } else if (usbdev->net->mc_count > 0) { 1513 }
1495 size = min(priv->multicast_size, usbdev->net->mc_count); 1514
1496 buf = kmalloc(size * ETH_ALEN, GFP_KERNEL); 1515 if (filter != basefilter)
1497 if (!buf) { 1516 goto set_filter;
1498 devwarn(usbdev, 1517
1499 "couldn't alloc %d bytes of memory", 1518 /*
1500 size * ETH_ALEN); 1519 * mc_list should be accessed holding the lock, so copy addresses to
1520 * local buffer first.
1521 */
1522 netif_addr_lock_bh(usbdev->net);
1523 mc_count = netdev_mc_count(usbdev->net);
1524 if (mc_count > priv->multicast_size) {
1525 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;
1526 } else if (mc_count) {
1527 int i = 0;
1528
1529 mc_addrs = kmalloc(mc_count * ETH_ALEN, GFP_ATOMIC);
1530 if (!mc_addrs) {
1531 netdev_warn(usbdev->net,
1532 "couldn't alloc %d bytes of memory\n",
1533 mc_count * ETH_ALEN);
1534 netif_addr_unlock_bh(usbdev->net);
1501 return; 1535 return;
1502 } 1536 }
1503 1537
1504 mclist = usbdev->net->mc_list; 1538 netdev_for_each_mc_addr(mclist, usbdev->net)
1505 for (i = 0; i < size && mclist; mclist = mclist->next) { 1539 memcpy(mc_addrs + i++ * ETH_ALEN,
1506 if (mclist->dmi_addrlen != ETH_ALEN) 1540 mclist->dmi_addr, ETH_ALEN);
1507 continue; 1541 }
1542 netif_addr_unlock_bh(usbdev->net);
1508 1543
1509 memcpy(buf + i * ETH_ALEN, mclist->dmi_addr, ETH_ALEN); 1544 if (filter != basefilter)
1510 i++; 1545 goto set_filter;
1511 }
1512 1546
1513 ret = rndis_set_oid(usbdev, OID_802_3_MULTICAST_LIST, buf, 1547 if (mc_count) {
1514 i * ETH_ALEN); 1548 ret = rndis_set_oid(usbdev, OID_802_3_MULTICAST_LIST, mc_addrs,
1515 if (ret == 0 && i > 0) 1549 mc_count * ETH_ALEN);
1550 kfree(mc_addrs);
1551 if (ret == 0)
1516 filter |= RNDIS_PACKET_TYPE_MULTICAST; 1552 filter |= RNDIS_PACKET_TYPE_MULTICAST;
1517 else 1553 else
1518 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST; 1554 filter |= RNDIS_PACKET_TYPE_ALL_MULTICAST;
1519 1555
1520 devdbg(usbdev, "OID_802_3_MULTICAST_LIST(%d, max: %d) -> %d", 1556 netdev_dbg(usbdev->net, "OID_802_3_MULTICAST_LIST(%d, max: %d) -> %d\n",
1521 i, priv->multicast_size, ret); 1557 mc_count, priv->multicast_size, ret);
1522
1523 kfree(buf);
1524 } 1558 }
1525 1559
1560set_filter:
1526 ret = rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &filter, 1561 ret = rndis_set_oid(usbdev, OID_GEN_CURRENT_PACKET_FILTER, &filter,
1527 sizeof(filter)); 1562 sizeof(filter));
1528 if (ret < 0) { 1563 if (ret < 0) {
1529 devwarn(usbdev, "couldn't set packet filter: %08x", 1564 netdev_warn(usbdev->net, "couldn't set packet filter: %08x\n",
1530 le32_to_cpu(filter)); 1565 le32_to_cpu(filter));
1531 } 1566 }
1532 1567
1533 devdbg(usbdev, "OID_GEN_CURRENT_PACKET_FILTER(%08x) -> %d", 1568 netdev_dbg(usbdev->net, "OID_GEN_CURRENT_PACKET_FILTER(%08x) -> %d\n",
1534 le32_to_cpu(filter), ret); 1569 le32_to_cpu(filter), ret);
1535} 1570}
1536 1571
1537/* 1572/*
@@ -1589,7 +1624,8 @@ static int rndis_set_tx_power(struct wiphy *wiphy, enum tx_power_setting type,
1589 struct rndis_wlan_private *priv = wiphy_priv(wiphy); 1624 struct rndis_wlan_private *priv = wiphy_priv(wiphy);
1590 struct usbnet *usbdev = priv->usbdev; 1625 struct usbnet *usbdev = priv->usbdev;
1591 1626
1592 devdbg(usbdev, "rndis_set_tx_power type:0x%x dbm:%i", type, dbm); 1627 netdev_dbg(usbdev->net, "%s(): type:0x%x dbm:%i\n",
1628 __func__, type, dbm);
1593 1629
1594 /* Device doesn't support changing txpower after initialization, only 1630 /* Device doesn't support changing txpower after initialization, only
1595 * turn off/on radio. Support 'auto' mode and setting same dBm that is 1631 * turn off/on radio. Support 'auto' mode and setting same dBm that is
@@ -1612,7 +1648,7 @@ static int rndis_get_tx_power(struct wiphy *wiphy, int *dbm)
1612 1648
1613 *dbm = get_bcm4320_power_dbm(priv); 1649 *dbm = get_bcm4320_power_dbm(priv);
1614 1650
1615 devdbg(usbdev, "rndis_get_tx_power dbm:%i", *dbm); 1651 netdev_dbg(usbdev->net, "%s(): dbm:%i\n", __func__, *dbm);
1616 1652
1617 return 0; 1653 return 0;
1618} 1654}
@@ -1626,7 +1662,7 @@ static int rndis_scan(struct wiphy *wiphy, struct net_device *dev,
1626 int ret; 1662 int ret;
1627 __le32 tmp; 1663 __le32 tmp;
1628 1664
1629 devdbg(usbdev, "cfg80211.scan"); 1665 netdev_dbg(usbdev->net, "cfg80211.scan\n");
1630 1666
1631 /* Get current bssid list from device before new scan, as new scan 1667 /* Get current bssid list from device before new scan, as new scan
1632 * clears internal bssid list. 1668 * clears internal bssid list.
@@ -1666,8 +1702,8 @@ static struct cfg80211_bss *rndis_bss_info_update(struct usbnet *usbdev,
1666 int ie_len, bssid_len; 1702 int ie_len, bssid_len;
1667 u8 *ie; 1703 u8 *ie;
1668 1704
1669 devdbg(usbdev, " found bssid: '%.32s' [%pM]", bssid->ssid.essid, 1705 netdev_dbg(usbdev->net, " found bssid: '%.32s' [%pM]\n",
1670 bssid->mac); 1706 bssid->ssid.essid, bssid->mac);
1671 1707
1672 /* parse bssid structure */ 1708 /* parse bssid structure */
1673 bssid_len = le32_to_cpu(bssid->length); 1709 bssid_len = le32_to_cpu(bssid->length);
@@ -1709,7 +1745,7 @@ static int rndis_check_bssid_list(struct usbnet *usbdev)
1709 int ret = -EINVAL, len, count, bssid_len; 1745 int ret = -EINVAL, len, count, bssid_len;
1710 bool resized = false; 1746 bool resized = false;
1711 1747
1712 devdbg(usbdev, "check_bssid_list"); 1748 netdev_dbg(usbdev->net, "check_bssid_list\n");
1713 1749
1714 len = CONTROL_BUFFER_SIZE; 1750 len = CONTROL_BUFFER_SIZE;
1715resize_buf: 1751resize_buf:
@@ -1733,8 +1769,8 @@ resize_buf:
1733 bssid = bssid_list->bssid; 1769 bssid = bssid_list->bssid;
1734 bssid_len = le32_to_cpu(bssid->length); 1770 bssid_len = le32_to_cpu(bssid->length);
1735 count = le32_to_cpu(bssid_list->num_items); 1771 count = le32_to_cpu(bssid_list->num_items);
1736 devdbg(usbdev, "check_bssid_list: %d BSSIDs found (buflen: %d)", count, 1772 netdev_dbg(usbdev->net, "check_bssid_list: %d BSSIDs found (buflen: %d)\n",
1737 len); 1773 count, len);
1738 1774
1739 while (count && ((void *)bssid + bssid_len) <= (buf + len)) { 1775 while (count && ((void *)bssid + bssid_len) <= (buf + len)) {
1740 rndis_bss_info_update(usbdev, bssid); 1776 rndis_bss_info_update(usbdev, bssid);
@@ -1756,7 +1792,7 @@ static void rndis_get_scan_results(struct work_struct *work)
1756 struct usbnet *usbdev = priv->usbdev; 1792 struct usbnet *usbdev = priv->usbdev;
1757 int ret; 1793 int ret;
1758 1794
1759 devdbg(usbdev, "get_scan_results"); 1795 netdev_dbg(usbdev->net, "get_scan_results\n");
1760 1796
1761 if (!priv->scan_request) 1797 if (!priv->scan_request)
1762 return; 1798 return;
@@ -1790,7 +1826,7 @@ static int rndis_connect(struct wiphy *wiphy, struct net_device *dev,
1790 1826
1791 if (sme->crypto.n_ciphers_pairwise > 0 && 1827 if (sme->crypto.n_ciphers_pairwise > 0 &&
1792 pairwise == RNDIS_WLAN_ALG_NONE) { 1828 pairwise == RNDIS_WLAN_ALG_NONE) {
1793 deverr(usbdev, "Unsupported pairwise cipher"); 1829 netdev_err(usbdev->net, "Unsupported pairwise cipher\n");
1794 return -ENOTSUPP; 1830 return -ENOTSUPP;
1795 } 1831 }
1796 1832
@@ -1800,28 +1836,30 @@ static int rndis_connect(struct wiphy *wiphy, struct net_device *dev,
1800 1836
1801 if (sme->crypto.n_akm_suites > 0 && 1837 if (sme->crypto.n_akm_suites > 0 &&
1802 keymgmt == RNDIS_WLAN_KEY_MGMT_NONE) { 1838 keymgmt == RNDIS_WLAN_KEY_MGMT_NONE) {
1803 deverr(usbdev, "Invalid keymgmt"); 1839 netdev_err(usbdev->net, "Invalid keymgmt\n");
1804 return -ENOTSUPP; 1840 return -ENOTSUPP;
1805 } 1841 }
1806 1842
1807 devdbg(usbdev, "cfg80211.connect('%.32s':[%pM]:%d:[%d,0x%x:0x%x]:[0x%x:" 1843 netdev_dbg(usbdev->net, "cfg80211.connect('%.32s':[%pM]:%d:[%d,0x%x:0x%x]:[0x%x:0x%x]:0x%x)\n",
1808 "0x%x]:0x%x)", sme->ssid, sme->bssid, chan, 1844 sme->ssid, sme->bssid, chan,
1809 sme->privacy, sme->crypto.wpa_versions, sme->auth_type, 1845 sme->privacy, sme->crypto.wpa_versions, sme->auth_type,
1810 groupwise, pairwise, keymgmt); 1846 groupwise, pairwise, keymgmt);
1811 1847
1812 if (is_associated(usbdev)) 1848 if (is_associated(usbdev))
1813 disassociate(usbdev, false); 1849 disassociate(usbdev, false);
1814 1850
1815 ret = set_infra_mode(usbdev, NDIS_80211_INFRA_INFRA); 1851 ret = set_infra_mode(usbdev, NDIS_80211_INFRA_INFRA);
1816 if (ret < 0) { 1852 if (ret < 0) {
1817 devdbg(usbdev, "connect: set_infra_mode failed, %d", ret); 1853 netdev_dbg(usbdev->net, "connect: set_infra_mode failed, %d\n",
1854 ret);
1818 goto err_turn_radio_on; 1855 goto err_turn_radio_on;
1819 } 1856 }
1820 1857
1821 ret = set_auth_mode(usbdev, sme->crypto.wpa_versions, sme->auth_type, 1858 ret = set_auth_mode(usbdev, sme->crypto.wpa_versions, sme->auth_type,
1822 keymgmt); 1859 keymgmt);
1823 if (ret < 0) { 1860 if (ret < 0) {
1824 devdbg(usbdev, "connect: set_auth_mode failed, %d", ret); 1861 netdev_dbg(usbdev->net, "connect: set_auth_mode failed, %d\n",
1862 ret);
1825 goto err_turn_radio_on; 1863 goto err_turn_radio_on;
1826 } 1864 }
1827 1865
@@ -1829,14 +1867,16 @@ static int rndis_connect(struct wiphy *wiphy, struct net_device *dev,
1829 1867
1830 ret = set_encr_mode(usbdev, pairwise, groupwise); 1868 ret = set_encr_mode(usbdev, pairwise, groupwise);
1831 if (ret < 0) { 1869 if (ret < 0) {
1832 devdbg(usbdev, "connect: set_encr_mode failed, %d", ret); 1870 netdev_dbg(usbdev->net, "connect: set_encr_mode failed, %d\n",
1871 ret);
1833 goto err_turn_radio_on; 1872 goto err_turn_radio_on;
1834 } 1873 }
1835 1874
1836 if (channel) { 1875 if (channel) {
1837 ret = set_channel(usbdev, chan); 1876 ret = set_channel(usbdev, chan);
1838 if (ret < 0) { 1877 if (ret < 0) {
1839 devdbg(usbdev, "connect: set_channel failed, %d", ret); 1878 netdev_dbg(usbdev->net, "connect: set_channel failed, %d\n",
1879 ret);
1840 goto err_turn_radio_on; 1880 goto err_turn_radio_on;
1841 } 1881 }
1842 } 1882 }
@@ -1845,8 +1885,8 @@ static int rndis_connect(struct wiphy *wiphy, struct net_device *dev,
1845 priv->encr_tx_key_index = sme->key_idx; 1885 priv->encr_tx_key_index = sme->key_idx;
1846 ret = add_wep_key(usbdev, sme->key, sme->key_len, sme->key_idx); 1886 ret = add_wep_key(usbdev, sme->key, sme->key_len, sme->key_idx);
1847 if (ret < 0) { 1887 if (ret < 0) {
1848 devdbg(usbdev, "connect: add_wep_key failed, %d " 1888 netdev_dbg(usbdev->net, "connect: add_wep_key failed, %d (%d, %d)\n",
1849 "(%d, %d)", ret, sme->key_len, sme->key_idx); 1889 ret, sme->key_len, sme->key_idx);
1850 goto err_turn_radio_on; 1890 goto err_turn_radio_on;
1851 } 1891 }
1852 } 1892 }
@@ -1855,7 +1895,8 @@ static int rndis_connect(struct wiphy *wiphy, struct net_device *dev,
1855 !is_broadcast_ether_addr(sme->bssid)) { 1895 !is_broadcast_ether_addr(sme->bssid)) {
1856 ret = set_bssid(usbdev, sme->bssid); 1896 ret = set_bssid(usbdev, sme->bssid);
1857 if (ret < 0) { 1897 if (ret < 0) {
1858 devdbg(usbdev, "connect: set_bssid failed, %d", ret); 1898 netdev_dbg(usbdev->net, "connect: set_bssid failed, %d\n",
1899 ret);
1859 goto err_turn_radio_on; 1900 goto err_turn_radio_on;
1860 } 1901 }
1861 } else 1902 } else
@@ -1877,7 +1918,7 @@ static int rndis_connect(struct wiphy *wiphy, struct net_device *dev,
1877 1918
1878 ret = set_essid(usbdev, &ssid); 1919 ret = set_essid(usbdev, &ssid);
1879 if (ret < 0) 1920 if (ret < 0)
1880 devdbg(usbdev, "connect: set_essid failed, %d", ret); 1921 netdev_dbg(usbdev->net, "connect: set_essid failed, %d\n", ret);
1881 return ret; 1922 return ret;
1882 1923
1883err_turn_radio_on: 1924err_turn_radio_on:
@@ -1892,7 +1933,7 @@ static int rndis_disconnect(struct wiphy *wiphy, struct net_device *dev,
1892 struct rndis_wlan_private *priv = wiphy_priv(wiphy); 1933 struct rndis_wlan_private *priv = wiphy_priv(wiphy);
1893 struct usbnet *usbdev = priv->usbdev; 1934 struct usbnet *usbdev = priv->usbdev;
1894 1935
1895 devdbg(usbdev, "cfg80211.disconnect(%d)", reason_code); 1936 netdev_dbg(usbdev->net, "cfg80211.disconnect(%d)\n", reason_code);
1896 1937
1897 priv->connected = false; 1938 priv->connected = false;
1898 memset(priv->bssid, 0, ETH_ALEN); 1939 memset(priv->bssid, 0, ETH_ALEN);
@@ -1926,21 +1967,23 @@ static int rndis_join_ibss(struct wiphy *wiphy, struct net_device *dev,
1926 alg = RNDIS_WLAN_ALG_NONE; 1967 alg = RNDIS_WLAN_ALG_NONE;
1927 } 1968 }
1928 1969
1929 devdbg(usbdev, "cfg80211.join_ibss('%.32s':[%pM]:%d:%d)", params->ssid, 1970 netdev_dbg(usbdev->net, "cfg80211.join_ibss('%.32s':[%pM]:%d:%d)\n",
1930 params->bssid, chan, params->privacy); 1971 params->ssid, params->bssid, chan, params->privacy);
1931 1972
1932 if (is_associated(usbdev)) 1973 if (is_associated(usbdev))
1933 disassociate(usbdev, false); 1974 disassociate(usbdev, false);
1934 1975
1935 ret = set_infra_mode(usbdev, NDIS_80211_INFRA_ADHOC); 1976 ret = set_infra_mode(usbdev, NDIS_80211_INFRA_ADHOC);
1936 if (ret < 0) { 1977 if (ret < 0) {
1937 devdbg(usbdev, "join_ibss: set_infra_mode failed, %d", ret); 1978 netdev_dbg(usbdev->net, "join_ibss: set_infra_mode failed, %d\n",
1979 ret);
1938 goto err_turn_radio_on; 1980 goto err_turn_radio_on;
1939 } 1981 }
1940 1982
1941 ret = set_auth_mode(usbdev, 0, auth_type, RNDIS_WLAN_KEY_MGMT_NONE); 1983 ret = set_auth_mode(usbdev, 0, auth_type, RNDIS_WLAN_KEY_MGMT_NONE);
1942 if (ret < 0) { 1984 if (ret < 0) {
1943 devdbg(usbdev, "join_ibss: set_auth_mode failed, %d", ret); 1985 netdev_dbg(usbdev->net, "join_ibss: set_auth_mode failed, %d\n",
1986 ret);
1944 goto err_turn_radio_on; 1987 goto err_turn_radio_on;
1945 } 1988 }
1946 1989
@@ -1948,15 +1991,16 @@ static int rndis_join_ibss(struct wiphy *wiphy, struct net_device *dev,
1948 1991
1949 ret = set_encr_mode(usbdev, alg, RNDIS_WLAN_ALG_NONE); 1992 ret = set_encr_mode(usbdev, alg, RNDIS_WLAN_ALG_NONE);
1950 if (ret < 0) { 1993 if (ret < 0) {
1951 devdbg(usbdev, "join_ibss: set_encr_mode failed, %d", ret); 1994 netdev_dbg(usbdev->net, "join_ibss: set_encr_mode failed, %d\n",
1995 ret);
1952 goto err_turn_radio_on; 1996 goto err_turn_radio_on;
1953 } 1997 }
1954 1998
1955 if (channel) { 1999 if (channel) {
1956 ret = set_channel(usbdev, chan); 2000 ret = set_channel(usbdev, chan);
1957 if (ret < 0) { 2001 if (ret < 0) {
1958 devdbg(usbdev, "join_ibss: set_channel failed, %d", 2002 netdev_dbg(usbdev->net, "join_ibss: set_channel failed, %d\n",
1959 ret); 2003 ret);
1960 goto err_turn_radio_on; 2004 goto err_turn_radio_on;
1961 } 2005 }
1962 } 2006 }
@@ -1965,7 +2009,8 @@ static int rndis_join_ibss(struct wiphy *wiphy, struct net_device *dev,
1965 !is_broadcast_ether_addr(params->bssid)) { 2009 !is_broadcast_ether_addr(params->bssid)) {
1966 ret = set_bssid(usbdev, params->bssid); 2010 ret = set_bssid(usbdev, params->bssid);
1967 if (ret < 0) { 2011 if (ret < 0) {
1968 devdbg(usbdev, "join_ibss: set_bssid failed, %d", ret); 2012 netdev_dbg(usbdev->net, "join_ibss: set_bssid failed, %d\n",
2013 ret);
1969 goto err_turn_radio_on; 2014 goto err_turn_radio_on;
1970 } 2015 }
1971 } else 2016 } else
@@ -1985,7 +2030,8 @@ static int rndis_join_ibss(struct wiphy *wiphy, struct net_device *dev,
1985 2030
1986 ret = set_essid(usbdev, &ssid); 2031 ret = set_essid(usbdev, &ssid);
1987 if (ret < 0) 2032 if (ret < 0)
1988 devdbg(usbdev, "join_ibss: set_essid failed, %d", ret); 2033 netdev_dbg(usbdev->net, "join_ibss: set_essid failed, %d\n",
2034 ret);
1989 return ret; 2035 return ret;
1990 2036
1991err_turn_radio_on: 2037err_turn_radio_on:
@@ -1999,7 +2045,7 @@ static int rndis_leave_ibss(struct wiphy *wiphy, struct net_device *dev)
1999 struct rndis_wlan_private *priv = wiphy_priv(wiphy); 2045 struct rndis_wlan_private *priv = wiphy_priv(wiphy);
2000 struct usbnet *usbdev = priv->usbdev; 2046 struct usbnet *usbdev = priv->usbdev;
2001 2047
2002 devdbg(usbdev, "cfg80211.leave_ibss()"); 2048 netdev_dbg(usbdev->net, "cfg80211.leave_ibss()\n");
2003 2049
2004 priv->connected = false; 2050 priv->connected = false;
2005 memset(priv->bssid, 0, ETH_ALEN); 2051 memset(priv->bssid, 0, ETH_ALEN);
@@ -2025,8 +2071,8 @@ static int rndis_add_key(struct wiphy *wiphy, struct net_device *netdev,
2025 struct usbnet *usbdev = priv->usbdev; 2071 struct usbnet *usbdev = priv->usbdev;
2026 __le32 flags; 2072 __le32 flags;
2027 2073
2028 devdbg(usbdev, "rndis_add_key(%i, %pM, %08x)", key_index, mac_addr, 2074 netdev_dbg(usbdev->net, "%s(%i, %pM, %08x)\n",
2029 params->cipher); 2075 __func__, key_index, mac_addr, params->cipher);
2030 2076
2031 switch (params->cipher) { 2077 switch (params->cipher) {
2032 case WLAN_CIPHER_SUITE_WEP40: 2078 case WLAN_CIPHER_SUITE_WEP40:
@@ -2047,8 +2093,8 @@ static int rndis_add_key(struct wiphy *wiphy, struct net_device *netdev,
2047 key_index, mac_addr, params->seq, 2093 key_index, mac_addr, params->seq,
2048 params->seq_len, params->cipher, flags); 2094 params->seq_len, params->cipher, flags);
2049 default: 2095 default:
2050 devdbg(usbdev, "rndis_add_key: unsupported cipher %08x", 2096 netdev_dbg(usbdev->net, "%s(): unsupported cipher %08x\n",
2051 params->cipher); 2097 __func__, params->cipher);
2052 return -ENOTSUPP; 2098 return -ENOTSUPP;
2053 } 2099 }
2054} 2100}
@@ -2059,7 +2105,7 @@ static int rndis_del_key(struct wiphy *wiphy, struct net_device *netdev,
2059 struct rndis_wlan_private *priv = wiphy_priv(wiphy); 2105 struct rndis_wlan_private *priv = wiphy_priv(wiphy);
2060 struct usbnet *usbdev = priv->usbdev; 2106 struct usbnet *usbdev = priv->usbdev;
2061 2107
2062 devdbg(usbdev, "rndis_del_key(%i, %pM)", key_index, mac_addr); 2108 netdev_dbg(usbdev->net, "%s(%i, %pM)\n", __func__, key_index, mac_addr);
2063 2109
2064 return remove_key(usbdev, key_index, mac_addr); 2110 return remove_key(usbdev, key_index, mac_addr);
2065} 2111}
@@ -2071,7 +2117,7 @@ static int rndis_set_default_key(struct wiphy *wiphy, struct net_device *netdev,
2071 struct usbnet *usbdev = priv->usbdev; 2117 struct usbnet *usbdev = priv->usbdev;
2072 struct rndis_wlan_encr_key key; 2118 struct rndis_wlan_encr_key key;
2073 2119
2074 devdbg(usbdev, "rndis_set_default_key(%i)", key_index); 2120 netdev_dbg(usbdev->net, "%s(%i)\n", __func__, key_index);
2075 2121
2076 priv->encr_tx_key_index = key_index; 2122 priv->encr_tx_key_index = key_index;
2077 2123
@@ -2185,7 +2231,8 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev)
2185 if (ret < 0) 2231 if (ret < 0)
2186 memset(bssid, 0, sizeof(bssid)); 2232 memset(bssid, 0, sizeof(bssid));
2187 2233
2188 devdbg(usbdev, "link up work: [%pM] %s", bssid, roamed ? "roamed" : ""); 2234 netdev_dbg(usbdev->net, "link up work: [%pM]%s\n",
2235 bssid, roamed ? " roamed" : "");
2189 2236
2190 /* Internal bss list in device always contains at least the currently 2237 /* Internal bss list in device always contains at least the currently
2191 * connected bss and we can get it to cfg80211 with 2238 * connected bss and we can get it to cfg80211 with
@@ -2267,8 +2314,8 @@ static void rndis_wlan_auth_indication(struct usbnet *usbdev,
2267 /* must have at least one array entry */ 2314 /* must have at least one array entry */
2268 if (len < offsetof(struct ndis_80211_status_indication, u) + 2315 if (len < offsetof(struct ndis_80211_status_indication, u) +
2269 sizeof(struct ndis_80211_auth_request)) { 2316 sizeof(struct ndis_80211_auth_request)) {
2270 devinfo(usbdev, "authentication indication: " 2317 netdev_info(usbdev->net, "authentication indication: too short message (%i)\n",
2271 "too short message (%i)", len); 2318 len);
2272 return; 2319 return;
2273 } 2320 }
2274 2321
@@ -2295,8 +2342,8 @@ static void rndis_wlan_auth_indication(struct usbnet *usbdev,
2295 type = "group_error"; 2342 type = "group_error";
2296 } 2343 }
2297 2344
2298 devinfo(usbdev, "authentication indication: %s (0x%08x)", type, 2345 netdev_info(usbdev->net, "authentication indication: %s (0x%08x)\n",
2299 le32_to_cpu(auth_req->flags)); 2346 type, le32_to_cpu(auth_req->flags));
2300 2347
2301 if (pairwise_error) { 2348 if (pairwise_error) {
2302 key_type = NL80211_KEYTYPE_PAIRWISE; 2349 key_type = NL80211_KEYTYPE_PAIRWISE;
@@ -2332,8 +2379,8 @@ static void rndis_wlan_pmkid_cand_list_indication(struct usbnet *usbdev,
2332 2379
2333 if (len < offsetof(struct ndis_80211_status_indication, u) + 2380 if (len < offsetof(struct ndis_80211_status_indication, u) +
2334 sizeof(struct ndis_80211_pmkid_cand_list)) { 2381 sizeof(struct ndis_80211_pmkid_cand_list)) {
2335 devinfo(usbdev, "pmkid candidate list indication: " 2382 netdev_info(usbdev->net, "pmkid candidate list indication: too short message (%i)\n",
2336 "too short message (%i)", len); 2383 len);
2337 return; 2384 return;
2338 } 2385 }
2339 2386
@@ -2343,18 +2390,16 @@ static void rndis_wlan_pmkid_cand_list_indication(struct usbnet *usbdev,
2343 offsetof(struct ndis_80211_status_indication, u); 2390 offsetof(struct ndis_80211_status_indication, u);
2344 2391
2345 if (len < expected_len) { 2392 if (len < expected_len) {
2346 devinfo(usbdev, "pmkid candidate list indication: " 2393 netdev_info(usbdev->net, "pmkid candidate list indication: list larger than buffer (%i < %i)\n",
2347 "list larger than buffer (%i < %i)", 2394 len, expected_len);
2348 len, expected_len);
2349 return; 2395 return;
2350 } 2396 }
2351 2397
2352 cand_list = &indication->u.cand_list; 2398 cand_list = &indication->u.cand_list;
2353 2399
2354 devinfo(usbdev, "pmkid candidate list indication: " 2400 netdev_info(usbdev->net, "pmkid candidate list indication: version %i, candidates %i\n",
2355 "version %i, candidates %i", 2401 le32_to_cpu(cand_list->version),
2356 le32_to_cpu(cand_list->version), 2402 le32_to_cpu(cand_list->num_candidates));
2357 le32_to_cpu(cand_list->num_candidates));
2358 2403
2359 if (le32_to_cpu(cand_list->version) != 1) 2404 if (le32_to_cpu(cand_list->version) != 1)
2360 return; 2405 return;
@@ -2363,8 +2408,8 @@ static void rndis_wlan_pmkid_cand_list_indication(struct usbnet *usbdev,
2363 struct ndis_80211_pmkid_candidate *cand = 2408 struct ndis_80211_pmkid_candidate *cand =
2364 &cand_list->candidate_list[i]; 2409 &cand_list->candidate_list[i];
2365 2410
2366 devdbg(usbdev, "cand[%i]: flags: 0x%08x, bssid: %pM", 2411 netdev_dbg(usbdev->net, "cand[%i]: flags: 0x%08x, bssid: %pM\n",
2367 i, le32_to_cpu(cand->flags), cand->bssid); 2412 i, le32_to_cpu(cand->flags), cand->bssid);
2368 2413
2369#if 0 2414#if 0
2370 struct iw_pmkid_cand pcand; 2415 struct iw_pmkid_cand pcand;
@@ -2395,15 +2440,14 @@ static void rndis_wlan_media_specific_indication(struct usbnet *usbdev,
2395 len = le32_to_cpu(msg->length); 2440 len = le32_to_cpu(msg->length);
2396 2441
2397 if (len < 8) { 2442 if (len < 8) {
2398 devinfo(usbdev, "media specific indication, " 2443 netdev_info(usbdev->net, "media specific indication, ignore too short message (%i < 8)\n",
2399 "ignore too short message (%i < 8)", len); 2444 len);
2400 return; 2445 return;
2401 } 2446 }
2402 2447
2403 if (offset + len > buflen) { 2448 if (offset + len > buflen) {
2404 devinfo(usbdev, "media specific indication, " 2449 netdev_info(usbdev->net, "media specific indication, too large to fit to buffer (%i > %i)\n",
2405 "too large to fit to buffer (%i > %i)", 2450 offset + len, buflen);
2406 offset + len, buflen);
2407 return; 2451 return;
2408 } 2452 }
2409 2453
@@ -2411,13 +2455,13 @@ static void rndis_wlan_media_specific_indication(struct usbnet *usbdev,
2411 2455
2412 switch (le32_to_cpu(indication->status_type)) { 2456 switch (le32_to_cpu(indication->status_type)) {
2413 case NDIS_80211_STATUSTYPE_RADIOSTATE: 2457 case NDIS_80211_STATUSTYPE_RADIOSTATE:
2414 devinfo(usbdev, "radio state indication: %i", 2458 netdev_info(usbdev->net, "radio state indication: %i\n",
2415 le32_to_cpu(indication->u.radio_status)); 2459 le32_to_cpu(indication->u.radio_status));
2416 return; 2460 return;
2417 2461
2418 case NDIS_80211_STATUSTYPE_MEDIASTREAMMODE: 2462 case NDIS_80211_STATUSTYPE_MEDIASTREAMMODE:
2419 devinfo(usbdev, "media stream mode indication: %i", 2463 netdev_info(usbdev->net, "media stream mode indication: %i\n",
2420 le32_to_cpu(indication->u.media_stream_mode)); 2464 le32_to_cpu(indication->u.media_stream_mode));
2421 return; 2465 return;
2422 2466
2423 case NDIS_80211_STATUSTYPE_AUTHENTICATION: 2467 case NDIS_80211_STATUSTYPE_AUTHENTICATION:
@@ -2429,9 +2473,8 @@ static void rndis_wlan_media_specific_indication(struct usbnet *usbdev,
2429 return; 2473 return;
2430 2474
2431 default: 2475 default:
2432 devinfo(usbdev, "media specific indication: " 2476 netdev_info(usbdev->net, "media specific indication: unknown status type 0x%08x\n",
2433 "unknown status type 0x%08x", 2477 le32_to_cpu(indication->status_type));
2434 le32_to_cpu(indication->status_type));
2435 } 2478 }
2436} 2479}
2437 2480
@@ -2448,14 +2491,13 @@ static void rndis_wlan_indication(struct usbnet *usbdev, void *ind, int buflen)
2448 * and userspace to think that device is 2491 * and userspace to think that device is
2449 * roaming/reassociating when it isn't. 2492 * roaming/reassociating when it isn't.
2450 */ 2493 */
2451 devdbg(usbdev, "ignored OID_802_11_ADD_KEY triggered " 2494 netdev_dbg(usbdev->net, "ignored OID_802_11_ADD_KEY triggered 'media connect'\n");
2452 "'media connect'");
2453 return; 2495 return;
2454 } 2496 }
2455 2497
2456 usbnet_pause_rx(usbdev); 2498 usbnet_pause_rx(usbdev);
2457 2499
2458 devinfo(usbdev, "media connect"); 2500 netdev_info(usbdev->net, "media connect\n");
2459 2501
2460 /* queue work to avoid recursive calls into rndis_command */ 2502 /* queue work to avoid recursive calls into rndis_command */
2461 set_bit(WORK_LINK_UP, &priv->work_pending); 2503 set_bit(WORK_LINK_UP, &priv->work_pending);
@@ -2463,7 +2505,7 @@ static void rndis_wlan_indication(struct usbnet *usbdev, void *ind, int buflen)
2463 break; 2505 break;
2464 2506
2465 case RNDIS_STATUS_MEDIA_DISCONNECT: 2507 case RNDIS_STATUS_MEDIA_DISCONNECT:
2466 devinfo(usbdev, "media disconnect"); 2508 netdev_info(usbdev->net, "media disconnect\n");
2467 2509
2468 /* queue work to avoid recursive calls into rndis_command */ 2510 /* queue work to avoid recursive calls into rndis_command */
2469 set_bit(WORK_LINK_DOWN, &priv->work_pending); 2511 set_bit(WORK_LINK_DOWN, &priv->work_pending);
@@ -2475,8 +2517,8 @@ static void rndis_wlan_indication(struct usbnet *usbdev, void *ind, int buflen)
2475 break; 2517 break;
2476 2518
2477 default: 2519 default:
2478 devinfo(usbdev, "indication: 0x%08x", 2520 netdev_info(usbdev->net, "indication: 0x%08x\n",
2479 le32_to_cpu(msg->status)); 2521 le32_to_cpu(msg->status));
2480 break; 2522 break;
2481 } 2523 }
2482} 2524}
@@ -2541,13 +2583,13 @@ static void rndis_device_poller(struct work_struct *work)
2541 if (ret == 0) 2583 if (ret == 0)
2542 priv->last_qual = level_to_qual(le32_to_cpu(rssi)); 2584 priv->last_qual = level_to_qual(le32_to_cpu(rssi));
2543 2585
2544 devdbg(usbdev, "dev-poller: OID_802_11_RSSI -> %d, rssi:%d, qual: %d", 2586 netdev_dbg(usbdev->net, "dev-poller: OID_802_11_RSSI -> %d, rssi:%d, qual: %d\n",
2545 ret, le32_to_cpu(rssi), level_to_qual(le32_to_cpu(rssi))); 2587 ret, le32_to_cpu(rssi), level_to_qual(le32_to_cpu(rssi)));
2546 2588
2547 /* Workaround transfer stalls on poor quality links. 2589 /* Workaround transfer stalls on poor quality links.
2548 * TODO: find right way to fix these stalls (as stalls do not happen 2590 * TODO: find right way to fix these stalls (as stalls do not happen
2549 * with ndiswrapper/windows driver). */ 2591 * with ndiswrapper/windows driver). */
2550 if (priv->last_qual <= 25) { 2592 if (priv->param_workaround_interval > 0 && priv->last_qual <= 25) {
2551 /* Decrease stats worker interval to catch stalls. 2593 /* Decrease stats worker interval to catch stalls.
2552 * faster. Faster than 400-500ms causes packet loss, 2594 * faster. Faster than 400-500ms causes packet loss,
2553 * Slower doesn't catch stalls fast enough. 2595 * Slower doesn't catch stalls fast enough.
@@ -2591,23 +2633,9 @@ end:
2591/* 2633/*
2592 * driver/device initialization 2634 * driver/device initialization
2593 */ 2635 */
2594static int bcm4320a_early_init(struct usbnet *usbdev) 2636static void rndis_copy_module_params(struct usbnet *usbdev)
2595{
2596 /* bcm4320a doesn't handle configuration parameters well. Try
2597 * set any and you get partially zeroed mac and broken device.
2598 */
2599
2600 return 0;
2601}
2602
2603static int bcm4320b_early_init(struct usbnet *usbdev)
2604{ 2637{
2605 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); 2638 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
2606 char buf[8];
2607
2608 /* Early initialization settings, setting these won't have effect
2609 * if called after generic_rndis_bind().
2610 */
2611 2639
2612 priv->param_country[0] = modparam_country[0]; 2640 priv->param_country[0] = modparam_country[0];
2613 priv->param_country[1] = modparam_country[1]; 2641 priv->param_country[1] = modparam_country[1];
@@ -2649,6 +2677,32 @@ static int bcm4320b_early_init(struct usbnet *usbdev)
2649 priv->param_workaround_interval = 500; 2677 priv->param_workaround_interval = 500;
2650 else 2678 else
2651 priv->param_workaround_interval = modparam_workaround_interval; 2679 priv->param_workaround_interval = modparam_workaround_interval;
2680}
2681
2682static int bcm4320a_early_init(struct usbnet *usbdev)
2683{
2684 /* copy module parameters for bcm4320a so that iwconfig reports txpower
2685 * and workaround parameter is copied to private structure correctly.
2686 */
2687 rndis_copy_module_params(usbdev);
2688
2689 /* bcm4320a doesn't handle configuration parameters well. Try
2690 * set any and you get partially zeroed mac and broken device.
2691 */
2692
2693 return 0;
2694}
2695
2696static int bcm4320b_early_init(struct usbnet *usbdev)
2697{
2698 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
2699 char buf[8];
2700
2701 rndis_copy_module_params(usbdev);
2702
2703 /* Early initialization settings, setting these won't have effect
2704 * if called after generic_rndis_bind().
2705 */
2652 2706
2653 rndis_set_config_parameter_str(usbdev, "Country", priv->param_country); 2707 rndis_set_config_parameter_str(usbdev, "Country", priv->param_country);
2654 rndis_set_config_parameter_str(usbdev, "FrameBursting", 2708 rndis_set_config_parameter_str(usbdev, "FrameBursting",
@@ -2823,11 +2877,11 @@ static int rndis_wlan_reset(struct usbnet *usbdev)
2823 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); 2877 struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
2824 int retval; 2878 int retval;
2825 2879
2826 devdbg(usbdev, "rndis_wlan_reset"); 2880 netdev_dbg(usbdev->net, "%s()\n", __func__);
2827 2881
2828 retval = rndis_reset(usbdev); 2882 retval = rndis_reset(usbdev);
2829 if (retval) 2883 if (retval)
2830 devwarn(usbdev, "rndis_reset() failed: %d", retval); 2884 netdev_warn(usbdev->net, "rndis_reset failed: %d\n", retval);
2831 2885
2832 /* rndis_reset cleared multicast list, so restore here. 2886 /* rndis_reset cleared multicast list, so restore here.
2833 (set_multicast_list() also turns on current packet filter) */ 2887 (set_multicast_list() also turns on current packet filter) */
@@ -2845,7 +2899,7 @@ static int rndis_wlan_stop(struct usbnet *usbdev)
2845 int retval; 2899 int retval;
2846 __le32 filter; 2900 __le32 filter;
2847 2901
2848 devdbg(usbdev, "rndis_wlan_stop"); 2902 netdev_dbg(usbdev->net, "%s()\n", __func__);
2849 2903
2850 retval = disassociate(usbdev, false); 2904 retval = disassociate(usbdev, false);
2851 2905
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig
index ed1f997e3521..5239e082cd0f 100644
--- a/drivers/net/wireless/rt2x00/Kconfig
+++ b/drivers/net/wireless/rt2x00/Kconfig
@@ -1,6 +1,6 @@
1menuconfig RT2X00 1menuconfig RT2X00
2 tristate "Ralink driver support" 2 tristate "Ralink driver support"
3 depends on MAC80211 && WLAN_80211 3 depends on MAC80211
4 ---help--- 4 ---help---
5 This will enable the support for the Ralink drivers, 5 This will enable the support for the Ralink drivers,
6 developed in the rt2x00 project <http://rt2x00.serialmonkey.com>. 6 developed in the rt2x00 project <http://rt2x00.serialmonkey.com>.
@@ -53,6 +53,62 @@ config RT61PCI
53 53
54 When compiled as a module, this driver will be called rt61pci. 54 When compiled as a module, this driver will be called rt61pci.
55 55
56config RT2800PCI_PCI
57 boolean
58 depends on PCI
59 default y
60
61config RT2800PCI_SOC
62 boolean
63 depends on RALINK_RT288X || RALINK_RT305X
64 default y
65
66config RT2800PCI
67 tristate "Ralink rt28xx/rt30xx/rt35xx (PCI/PCIe/PCMCIA) support (EXPERIMENTAL)"
68 depends on (RT2800PCI_PCI || RT2800PCI_SOC) && EXPERIMENTAL
69 select RT2800_LIB
70 select RT2X00_LIB_PCI if RT2800PCI_PCI
71 select RT2X00_LIB_SOC if RT2800PCI_SOC
72 select RT2X00_LIB_HT
73 select RT2X00_LIB_FIRMWARE
74 select RT2X00_LIB_CRYPTO
75 select CRC_CCITT
76 select EEPROM_93CX6
77 ---help---
78 This adds support for rt2800/rt3000/rt3500 wireless chipset family.
79 Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890 & RT3052
80
81 This driver is non-functional at the moment and is intended for
82 developers.
83
84 When compiled as a module, this driver will be called "rt2800pci.ko".
85
86if RT2800PCI
87
88config RT2800PCI_RT30XX
89 bool "rt2800pci - Include support for rt30xx (PCI/PCIe/PCMCIA) devices"
90 default n
91 ---help---
92 This adds support for rt30xx wireless chipset family to the
93 rt2800pci driver.
94 Supported chips: RT3090, RT3091 & RT3092
95
96 Support for these devices is non-functional at the moment and is
97 intended for testers and developers.
98
99config RT2800PCI_RT35XX
100 bool "rt2800pci - Include support for rt35xx (PCI/PCIe/PCMCIA) devices"
101 default n
102 ---help---
103 This adds support for rt35xx wireless chipset family to the
104 rt2800pci driver.
105 Supported chips: RT3060, RT3062, RT3562, RT3592
106
107 Support for these devices is non-functional at the moment and is
108 intended for testers and developers.
109
110endif
111
56config RT2500USB 112config RT2500USB
57 tristate "Ralink rt2500 (USB) support" 113 tristate "Ralink rt2500 (USB) support"
58 depends on USB 114 depends on USB
@@ -78,8 +134,9 @@ config RT73USB
78 When compiled as a module, this driver will be called rt73usb. 134 When compiled as a module, this driver will be called rt73usb.
79 135
80config RT2800USB 136config RT2800USB
81 tristate "Ralink rt2800 (USB) support" 137 tristate "Ralink rt2800 (USB) support (EXPERIMENTAL)"
82 depends on USB && EXPERIMENTAL 138 depends on USB && EXPERIMENTAL
139 select RT2800_LIB
83 select RT2X00_LIB_USB 140 select RT2X00_LIB_USB
84 select RT2X00_LIB_HT 141 select RT2X00_LIB_HT
85 select RT2X00_LIB_FIRMWARE 142 select RT2X00_LIB_FIRMWARE
@@ -89,12 +146,60 @@ config RT2800USB
89 This adds experimental support for rt2800 wireless chipset family. 146 This adds experimental support for rt2800 wireless chipset family.
90 Supported chips: RT2770, RT2870 & RT3070. 147 Supported chips: RT2770, RT2870 & RT3070.
91 148
149 Known issues:
150 - support for RT2870 chips doesn't work with 802.11n APs yet
151 - support for RT3070 chips is non-functional at the moment
152
92 When compiled as a module, this driver will be called "rt2800usb.ko". 153 When compiled as a module, this driver will be called "rt2800usb.ko".
93 154
155if RT2800USB
156
157config RT2800USB_RT30XX
158 bool "rt2800usb - Include support for rt30xx (USB) devices"
159 default n
160 ---help---
161 This adds support for rt30xx wireless chipset family to the
162 rt2800usb driver.
163 Supported chips: RT3070, RT3071 & RT3072
164
165 Support for these devices is non-functional at the moment and is
166 intended for testers and developers.
167
168config RT2800USB_RT35XX
169 bool "rt2800usb - Include support for rt35xx (USB) devices"
170 default n
171 ---help---
172 This adds support for rt35xx wireless chipset family to the
173 rt2800usb driver.
174 Supported chips: RT3572
175
176 Support for these devices is non-functional at the moment and is
177 intended for testers and developers.
178
179config RT2800USB_UNKNOWN
180 bool "rt2800usb - Include support for unknown (USB) devices"
181 default n
182 ---help---
183 This adds support for rt2800 family devices that are known to
184 have a rt2800 family chipset, but for which the exact chipset
185 is unknown.
186
187 Support status for these devices is unknown, and enabling these
188 devices may or may not work.
189
190endif
191
192config RT2800_LIB
193 tristate
194
94config RT2X00_LIB_PCI 195config RT2X00_LIB_PCI
95 tristate 196 tristate
96 select RT2X00_LIB 197 select RT2X00_LIB
97 198
199config RT2X00_LIB_SOC
200 tristate
201 select RT2X00_LIB
202
98config RT2X00_LIB_USB 203config RT2X00_LIB_USB
99 tristate 204 tristate
100 select RT2X00_LIB 205 select RT2X00_LIB
diff --git a/drivers/net/wireless/rt2x00/Makefile b/drivers/net/wireless/rt2x00/Makefile
index 13043ea97667..971339858297 100644
--- a/drivers/net/wireless/rt2x00/Makefile
+++ b/drivers/net/wireless/rt2x00/Makefile
@@ -11,10 +11,13 @@ rt2x00lib-$(CONFIG_RT2X00_LIB_HT) += rt2x00ht.o
11 11
12obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o 12obj-$(CONFIG_RT2X00_LIB) += rt2x00lib.o
13obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o 13obj-$(CONFIG_RT2X00_LIB_PCI) += rt2x00pci.o
14obj-$(CONFIG_RT2X00_LIB_SOC) += rt2x00soc.o
14obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o 15obj-$(CONFIG_RT2X00_LIB_USB) += rt2x00usb.o
16obj-$(CONFIG_RT2800_LIB) += rt2800lib.o
15obj-$(CONFIG_RT2400PCI) += rt2400pci.o 17obj-$(CONFIG_RT2400PCI) += rt2400pci.o
16obj-$(CONFIG_RT2500PCI) += rt2500pci.o 18obj-$(CONFIG_RT2500PCI) += rt2500pci.o
17obj-$(CONFIG_RT61PCI) += rt61pci.o 19obj-$(CONFIG_RT61PCI) += rt61pci.o
20obj-$(CONFIG_RT2800PCI) += rt2800pci.o
18obj-$(CONFIG_RT2500USB) += rt2500usb.o 21obj-$(CONFIG_RT2500USB) += rt2500usb.o
19obj-$(CONFIG_RT73USB) += rt73usb.o 22obj-$(CONFIG_RT73USB) += rt73usb.o
20obj-$(CONFIG_RT2800USB) += rt2800usb.o 23obj-$(CONFIG_RT2800USB) += rt2800usb.o
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 798f625e38f7..5f5204b82891 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -31,6 +31,7 @@
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/pci.h> 32#include <linux/pci.h>
33#include <linux/eeprom_93cx6.h> 33#include <linux/eeprom_93cx6.h>
34#include <linux/slab.h>
34 35
35#include "rt2x00.h" 36#include "rt2x00.h"
36#include "rt2x00pci.h" 37#include "rt2x00pci.h"
@@ -451,7 +452,7 @@ static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
451 /* 452 /*
452 * RF2420 chipset don't need any additional actions. 453 * RF2420 chipset don't need any additional actions.
453 */ 454 */
454 if (rt2x00_rf(&rt2x00dev->chip, RF2420)) 455 if (rt2x00_rf(rt2x00dev, RF2420))
455 return; 456 return;
456 457
457 /* 458 /*
@@ -1340,10 +1341,10 @@ static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
1340 */ 1341 */
1341 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1342 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1342 rt2x00pci_register_read(rt2x00dev, CSR0, &reg); 1343 rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
1343 rt2x00_set_chip_rf(rt2x00dev, value, reg); 1344 rt2x00_set_chip(rt2x00dev, RT2460, value,
1345 rt2x00_get_field32(reg, CSR0_REVISION));
1344 1346
1345 if (!rt2x00_rf(&rt2x00dev->chip, RF2420) && 1347 if (!rt2x00_rf(rt2x00dev, RF2420) && !rt2x00_rf(rt2x00dev, RF2421)) {
1346 !rt2x00_rf(&rt2x00dev->chip, RF2421)) {
1347 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 1348 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1348 return -ENODEV; 1349 return -ENODEV;
1349 } 1350 }
@@ -1431,7 +1432,6 @@ static int rt2400pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1431 IEEE80211_HW_SIGNAL_DBM | 1432 IEEE80211_HW_SIGNAL_DBM |
1432 IEEE80211_HW_SUPPORTS_PS | 1433 IEEE80211_HW_SUPPORTS_PS |
1433 IEEE80211_HW_PS_NULLFUNC_STACK; 1434 IEEE80211_HW_PS_NULLFUNC_STACK;
1434 rt2x00dev->hw->extra_tx_headroom = 0;
1435 1435
1436 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1436 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1437 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1437 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -1562,7 +1562,6 @@ static const struct ieee80211_ops rt2400pci_mac80211_ops = {
1562 .get_stats = rt2x00mac_get_stats, 1562 .get_stats = rt2x00mac_get_stats,
1563 .bss_info_changed = rt2x00mac_bss_info_changed, 1563 .bss_info_changed = rt2x00mac_bss_info_changed,
1564 .conf_tx = rt2400pci_conf_tx, 1564 .conf_tx = rt2400pci_conf_tx,
1565 .get_tx_stats = rt2x00mac_get_tx_stats,
1566 .get_tsf = rt2400pci_get_tsf, 1565 .get_tsf = rt2400pci_get_tsf,
1567 .tx_last_beacon = rt2400pci_tx_last_beacon, 1566 .tx_last_beacon = rt2400pci_tx_last_beacon,
1568 .rfkill_poll = rt2x00mac_rfkill_poll, 1567 .rfkill_poll = rt2x00mac_rfkill_poll,
@@ -1622,27 +1621,28 @@ static const struct data_queue_desc rt2400pci_queue_atim = {
1622}; 1621};
1623 1622
1624static const struct rt2x00_ops rt2400pci_ops = { 1623static const struct rt2x00_ops rt2400pci_ops = {
1625 .name = KBUILD_MODNAME, 1624 .name = KBUILD_MODNAME,
1626 .max_sta_intf = 1, 1625 .max_sta_intf = 1,
1627 .max_ap_intf = 1, 1626 .max_ap_intf = 1,
1628 .eeprom_size = EEPROM_SIZE, 1627 .eeprom_size = EEPROM_SIZE,
1629 .rf_size = RF_SIZE, 1628 .rf_size = RF_SIZE,
1630 .tx_queues = NUM_TX_QUEUES, 1629 .tx_queues = NUM_TX_QUEUES,
1631 .rx = &rt2400pci_queue_rx, 1630 .extra_tx_headroom = 0,
1632 .tx = &rt2400pci_queue_tx, 1631 .rx = &rt2400pci_queue_rx,
1633 .bcn = &rt2400pci_queue_bcn, 1632 .tx = &rt2400pci_queue_tx,
1634 .atim = &rt2400pci_queue_atim, 1633 .bcn = &rt2400pci_queue_bcn,
1635 .lib = &rt2400pci_rt2x00_ops, 1634 .atim = &rt2400pci_queue_atim,
1636 .hw = &rt2400pci_mac80211_ops, 1635 .lib = &rt2400pci_rt2x00_ops,
1636 .hw = &rt2400pci_mac80211_ops,
1637#ifdef CONFIG_RT2X00_LIB_DEBUGFS 1637#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1638 .debugfs = &rt2400pci_rt2x00debug, 1638 .debugfs = &rt2400pci_rt2x00debug,
1639#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1639#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1640}; 1640};
1641 1641
1642/* 1642/*
1643 * RT2400pci module information. 1643 * RT2400pci module information.
1644 */ 1644 */
1645static struct pci_device_id rt2400pci_device_table[] = { 1645static DEFINE_PCI_DEVICE_TABLE(rt2400pci_device_table) = {
1646 { PCI_DEVICE(0x1814, 0x0101), PCI_DEVICE_DATA(&rt2400pci_ops) }, 1646 { PCI_DEVICE(0x1814, 0x0101), PCI_DEVICE_DATA(&rt2400pci_ops) },
1647 { 0, } 1647 { 0, }
1648}; 1648};
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.h b/drivers/net/wireless/rt2x00/rt2400pci.h
index ccd644104ad1..c048b18f4133 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.h
+++ b/drivers/net/wireless/rt2x00/rt2400pci.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -35,7 +35,7 @@
35 35
36/* 36/*
37 * Signal information. 37 * Signal information.
38 * Defaul offset is required for RSSI <-> dBm conversion. 38 * Default offset is required for RSSI <-> dBm conversion.
39 */ 39 */
40#define DEFAULT_RSSI_OFFSET 100 40#define DEFAULT_RSSI_OFFSET 100
41 41
@@ -65,6 +65,7 @@
65 * CSR0: ASIC revision number. 65 * CSR0: ASIC revision number.
66 */ 66 */
67#define CSR0 0x0000 67#define CSR0 0x0000
68#define CSR0_REVISION FIELD32(0x0000ffff)
68 69
69/* 70/*
70 * CSR1: System control register. 71 * CSR1: System control register.
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 2e872ac69826..2a73f593aab0 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -31,6 +31,7 @@
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/pci.h> 32#include <linux/pci.h>
33#include <linux/eeprom_93cx6.h> 33#include <linux/eeprom_93cx6.h>
34#include <linux/slab.h>
34 35
35#include "rt2x00.h" 36#include "rt2x00.h"
36#include "rt2x00pci.h" 37#include "rt2x00pci.h"
@@ -440,8 +441,7 @@ static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
440 /* 441 /*
441 * RT2525E and RT5222 need to flip TX I/Q 442 * RT2525E and RT5222 need to flip TX I/Q
442 */ 443 */
443 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) || 444 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
444 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
445 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); 445 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
446 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1); 446 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);
447 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1); 447 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);
@@ -449,7 +449,7 @@ static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
449 /* 449 /*
450 * RT2525E does not need RX I/Q Flip. 450 * RT2525E does not need RX I/Q Flip.
451 */ 451 */
452 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) 452 if (rt2x00_rf(rt2x00dev, RF2525E))
453 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); 453 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
454 } else { 454 } else {
455 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0); 455 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);
@@ -475,14 +475,14 @@ static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
475 * Switch on tuning bits. 475 * Switch on tuning bits.
476 * For RT2523 devices we do not need to update the R1 register. 476 * For RT2523 devices we do not need to update the R1 register.
477 */ 477 */
478 if (!rt2x00_rf(&rt2x00dev->chip, RF2523)) 478 if (!rt2x00_rf(rt2x00dev, RF2523))
479 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 1); 479 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 1);
480 rt2x00_set_field32(&rf->rf3, RF3_TUNER, 1); 480 rt2x00_set_field32(&rf->rf3, RF3_TUNER, 1);
481 481
482 /* 482 /*
483 * For RT2525 we should first set the channel to half band higher. 483 * For RT2525 we should first set the channel to half band higher.
484 */ 484 */
485 if (rt2x00_rf(&rt2x00dev->chip, RF2525)) { 485 if (rt2x00_rf(rt2x00dev, RF2525)) {
486 static const u32 vals[] = { 486 static const u32 vals[] = {
487 0x00080cbe, 0x00080d02, 0x00080d06, 0x00080d0a, 487 0x00080cbe, 0x00080d02, 0x00080d06, 0x00080d0a,
488 0x00080d0e, 0x00080d12, 0x00080d16, 0x00080d1a, 488 0x00080d0e, 0x00080d12, 0x00080d16, 0x00080d1a,
@@ -516,7 +516,7 @@ static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
516 * Switch off tuning bits. 516 * Switch off tuning bits.
517 * For RT2523 devices we do not need to update the R1 register. 517 * For RT2523 devices we do not need to update the R1 register.
518 */ 518 */
519 if (!rt2x00_rf(&rt2x00dev->chip, RF2523)) { 519 if (!rt2x00_rf(rt2x00dev, RF2523)) {
520 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 0); 520 rt2x00_set_field32(&rf->rf1, RF1_TUNER, 0);
521 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1); 521 rt2500pci_rf_write(rt2x00dev, 1, rf->rf1);
522 } 522 }
@@ -640,7 +640,7 @@ static void rt2500pci_link_tuner(struct rt2x00_dev *rt2x00dev,
640 * up to version C the link tuning should halt after 20 640 * up to version C the link tuning should halt after 20
641 * seconds while being associated. 641 * seconds while being associated.
642 */ 642 */
643 if (rt2x00_rev(&rt2x00dev->chip) < RT2560_VERSION_D && 643 if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D &&
644 rt2x00dev->intf_associated && count > 20) 644 rt2x00dev->intf_associated && count > 20)
645 return; 645 return;
646 646
@@ -650,7 +650,7 @@ static void rt2500pci_link_tuner(struct rt2x00_dev *rt2x00dev,
650 * should go straight to dynamic CCA tuning when they 650 * should go straight to dynamic CCA tuning when they
651 * are not associated. 651 * are not associated.
652 */ 652 */
653 if (rt2x00_rev(&rt2x00dev->chip) < RT2560_VERSION_D || 653 if (rt2x00_rev(rt2x00dev) < RT2560_VERSION_D ||
654 !rt2x00dev->intf_associated) 654 !rt2x00dev->intf_associated)
655 goto dynamic_cca_tune; 655 goto dynamic_cca_tune;
656 656
@@ -1504,14 +1504,15 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
1504 */ 1504 */
1505 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1505 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1506 rt2x00pci_register_read(rt2x00dev, CSR0, &reg); 1506 rt2x00pci_register_read(rt2x00dev, CSR0, &reg);
1507 rt2x00_set_chip_rf(rt2x00dev, value, reg); 1507 rt2x00_set_chip(rt2x00dev, RT2560, value,
1508 1508 rt2x00_get_field32(reg, CSR0_REVISION));
1509 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) && 1509
1510 !rt2x00_rf(&rt2x00dev->chip, RF2523) && 1510 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1511 !rt2x00_rf(&rt2x00dev->chip, RF2524) && 1511 !rt2x00_rf(rt2x00dev, RF2523) &&
1512 !rt2x00_rf(&rt2x00dev->chip, RF2525) && 1512 !rt2x00_rf(rt2x00dev, RF2524) &&
1513 !rt2x00_rf(&rt2x00dev->chip, RF2525E) && 1513 !rt2x00_rf(rt2x00dev, RF2525) &&
1514 !rt2x00_rf(&rt2x00dev->chip, RF5222)) { 1514 !rt2x00_rf(rt2x00dev, RF2525E) &&
1515 !rt2x00_rf(rt2x00dev, RF5222)) {
1515 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 1516 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1516 return -ENODEV; 1517 return -ENODEV;
1517 } 1518 }
@@ -1732,8 +1733,6 @@ static int rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1732 IEEE80211_HW_SUPPORTS_PS | 1733 IEEE80211_HW_SUPPORTS_PS |
1733 IEEE80211_HW_PS_NULLFUNC_STACK; 1734 IEEE80211_HW_PS_NULLFUNC_STACK;
1734 1735
1735 rt2x00dev->hw->extra_tx_headroom = 0;
1736
1737 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1736 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1738 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1737 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1739 rt2x00_eeprom_addr(rt2x00dev, 1738 rt2x00_eeprom_addr(rt2x00dev,
@@ -1745,22 +1744,22 @@ static int rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1745 spec->supported_bands = SUPPORT_BAND_2GHZ; 1744 spec->supported_bands = SUPPORT_BAND_2GHZ;
1746 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 1745 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1747 1746
1748 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) { 1747 if (rt2x00_rf(rt2x00dev, RF2522)) {
1749 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); 1748 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1750 spec->channels = rf_vals_bg_2522; 1749 spec->channels = rf_vals_bg_2522;
1751 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) { 1750 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1752 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); 1751 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1753 spec->channels = rf_vals_bg_2523; 1752 spec->channels = rf_vals_bg_2523;
1754 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) { 1753 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1755 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); 1754 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1756 spec->channels = rf_vals_bg_2524; 1755 spec->channels = rf_vals_bg_2524;
1757 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) { 1756 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1758 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); 1757 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1759 spec->channels = rf_vals_bg_2525; 1758 spec->channels = rf_vals_bg_2525;
1760 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { 1759 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1761 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); 1760 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1762 spec->channels = rf_vals_bg_2525e; 1761 spec->channels = rf_vals_bg_2525e;
1763 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) { 1762 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1764 spec->supported_bands |= SUPPORT_BAND_5GHZ; 1763 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1765 spec->num_channels = ARRAY_SIZE(rf_vals_5222); 1764 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1766 spec->channels = rf_vals_5222; 1765 spec->channels = rf_vals_5222;
@@ -1861,7 +1860,6 @@ static const struct ieee80211_ops rt2500pci_mac80211_ops = {
1861 .get_stats = rt2x00mac_get_stats, 1860 .get_stats = rt2x00mac_get_stats,
1862 .bss_info_changed = rt2x00mac_bss_info_changed, 1861 .bss_info_changed = rt2x00mac_bss_info_changed,
1863 .conf_tx = rt2x00mac_conf_tx, 1862 .conf_tx = rt2x00mac_conf_tx,
1864 .get_tx_stats = rt2x00mac_get_tx_stats,
1865 .get_tsf = rt2500pci_get_tsf, 1863 .get_tsf = rt2500pci_get_tsf,
1866 .tx_last_beacon = rt2500pci_tx_last_beacon, 1864 .tx_last_beacon = rt2500pci_tx_last_beacon,
1867 .rfkill_poll = rt2x00mac_rfkill_poll, 1865 .rfkill_poll = rt2x00mac_rfkill_poll,
@@ -1921,27 +1919,28 @@ static const struct data_queue_desc rt2500pci_queue_atim = {
1921}; 1919};
1922 1920
1923static const struct rt2x00_ops rt2500pci_ops = { 1921static const struct rt2x00_ops rt2500pci_ops = {
1924 .name = KBUILD_MODNAME, 1922 .name = KBUILD_MODNAME,
1925 .max_sta_intf = 1, 1923 .max_sta_intf = 1,
1926 .max_ap_intf = 1, 1924 .max_ap_intf = 1,
1927 .eeprom_size = EEPROM_SIZE, 1925 .eeprom_size = EEPROM_SIZE,
1928 .rf_size = RF_SIZE, 1926 .rf_size = RF_SIZE,
1929 .tx_queues = NUM_TX_QUEUES, 1927 .tx_queues = NUM_TX_QUEUES,
1930 .rx = &rt2500pci_queue_rx, 1928 .extra_tx_headroom = 0,
1931 .tx = &rt2500pci_queue_tx, 1929 .rx = &rt2500pci_queue_rx,
1932 .bcn = &rt2500pci_queue_bcn, 1930 .tx = &rt2500pci_queue_tx,
1933 .atim = &rt2500pci_queue_atim, 1931 .bcn = &rt2500pci_queue_bcn,
1934 .lib = &rt2500pci_rt2x00_ops, 1932 .atim = &rt2500pci_queue_atim,
1935 .hw = &rt2500pci_mac80211_ops, 1933 .lib = &rt2500pci_rt2x00_ops,
1934 .hw = &rt2500pci_mac80211_ops,
1936#ifdef CONFIG_RT2X00_LIB_DEBUGFS 1935#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1937 .debugfs = &rt2500pci_rt2x00debug, 1936 .debugfs = &rt2500pci_rt2x00debug,
1938#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1937#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1939}; 1938};
1940 1939
1941/* 1940/*
1942 * RT2500pci module information. 1941 * RT2500pci module information.
1943 */ 1942 */
1944static struct pci_device_id rt2500pci_device_table[] = { 1943static DEFINE_PCI_DEVICE_TABLE(rt2500pci_device_table) = {
1945 { PCI_DEVICE(0x1814, 0x0201), PCI_DEVICE_DATA(&rt2500pci_ops) }, 1944 { PCI_DEVICE(0x1814, 0x0201), PCI_DEVICE_DATA(&rt2500pci_ops) },
1946 { 0, } 1945 { 0, }
1947}; 1946};
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.h b/drivers/net/wireless/rt2x00/rt2500pci.h
index 54d37957883c..d708031361ac 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.h
+++ b/drivers/net/wireless/rt2x00/rt2500pci.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -46,7 +46,7 @@
46 46
47/* 47/*
48 * Signal information. 48 * Signal information.
49 * Defaul offset is required for RSSI <-> dBm conversion. 49 * Default offset is required for RSSI <-> dBm conversion.
50 */ 50 */
51#define DEFAULT_RSSI_OFFSET 121 51#define DEFAULT_RSSI_OFFSET 121
52 52
@@ -76,6 +76,7 @@
76 * CSR0: ASIC revision number. 76 * CSR0: ASIC revision number.
77 */ 77 */
78#define CSR0 0x0000 78#define CSR0 0x0000
79#define CSR0_REVISION FIELD32(0x0000ffff)
79 80
80/* 81/*
81 * CSR1: System control register. 82 * CSR1: System control register.
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index 22dd6d9e2981..8ebb705fe106 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -29,6 +29,7 @@
29#include <linux/init.h> 29#include <linux/init.h>
30#include <linux/kernel.h> 30#include <linux/kernel.h>
31#include <linux/module.h> 31#include <linux/module.h>
32#include <linux/slab.h>
32#include <linux/usb.h> 33#include <linux/usb.h>
33 34
34#include "rt2x00.h" 35#include "rt2x00.h"
@@ -368,7 +369,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
368 369
369 /* 370 /*
370 * The encryption key doesn't fit within the CSR cache, 371 * The encryption key doesn't fit within the CSR cache,
371 * this means we should allocate it seperately and use 372 * this means we should allocate it separately and use
372 * rt2x00usb_vendor_request() to send the key to the hardware. 373 * rt2x00usb_vendor_request() to send the key to the hardware.
373 */ 374 */
374 reg = KEY_ENTRY(key->hw_key_idx); 375 reg = KEY_ENTRY(key->hw_key_idx);
@@ -382,7 +383,7 @@ static int rt2500usb_config_key(struct rt2x00_dev *rt2x00dev,
382 /* 383 /*
383 * The driver does not support the IV/EIV generation 384 * The driver does not support the IV/EIV generation
384 * in hardware. However it demands the data to be provided 385 * in hardware. However it demands the data to be provided
385 * both seperately as well as inside the frame. 386 * both separately as well as inside the frame.
386 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib 387 * We already provided the CONFIG_CRYPTO_COPY_IV to rt2x00lib
387 * to ensure rt2x00lib will not strip the data from the 388 * to ensure rt2x00lib will not strip the data from the
388 * frame after the copy, now we must tell mac80211 389 * frame after the copy, now we must tell mac80211
@@ -565,8 +566,7 @@ static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
565 /* 566 /*
566 * RT2525E and RT5222 need to flip TX I/Q 567 * RT2525E and RT5222 need to flip TX I/Q
567 */ 568 */
568 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) || 569 if (rt2x00_rf(rt2x00dev, RF2525E) || rt2x00_rf(rt2x00dev, RF5222)) {
569 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
570 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1); 570 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
571 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1); 571 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 1);
572 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1); 572 rt2x00_set_field16(&csr6, PHY_CSR6_OFDM_FLIP, 1);
@@ -574,7 +574,7 @@ static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
574 /* 574 /*
575 * RT2525E does not need RX I/Q Flip. 575 * RT2525E does not need RX I/Q Flip.
576 */ 576 */
577 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) 577 if (rt2x00_rf(rt2x00dev, RF2525E))
578 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0); 578 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
579 } else { 579 } else {
580 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0); 580 rt2x00_set_field16(&csr5, PHY_CSR5_CCK_FLIP, 0);
@@ -598,7 +598,7 @@ static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
598 /* 598 /*
599 * For RT2525E we should first set the channel to half band higher. 599 * For RT2525E we should first set the channel to half band higher.
600 */ 600 */
601 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { 601 if (rt2x00_rf(rt2x00dev, RF2525E)) {
602 static const u32 vals[] = { 602 static const u32 vals[] = {
603 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2, 603 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
604 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba, 604 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
@@ -716,139 +716,6 @@ static void rt2500usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
716} 716}
717 717
718/* 718/*
719 * NOTE: This function is directly ported from legacy driver, but
720 * despite it being declared it was never called. Although link tuning
721 * sounds like a good idea, and usually works well for the other drivers,
722 * it does _not_ work with rt2500usb. Enabling this function will result
723 * in TX capabilities only until association kicks in. Immediately
724 * after the successful association all TX frames will be kept in the
725 * hardware queue and never transmitted.
726 */
727#if 0
728static void rt2500usb_link_tuner(struct rt2x00_dev *rt2x00dev)
729{
730 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
731 u16 bbp_thresh;
732 u16 vgc_bound;
733 u16 sens;
734 u16 r24;
735 u16 r25;
736 u16 r61;
737 u16 r17_sens;
738 u8 r17;
739 u8 up_bound;
740 u8 low_bound;
741
742 /*
743 * Read current r17 value, as well as the sensitivity values
744 * for the r17 register.
745 */
746 rt2500usb_bbp_read(rt2x00dev, 17, &r17);
747 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R17, &r17_sens);
748
749 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_VGC, &vgc_bound);
750 up_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCUPPER);
751 low_bound = rt2x00_get_field16(vgc_bound, EEPROM_BBPTUNE_VGCLOWER);
752
753 /*
754 * If we are not associated, we should go straight to the
755 * dynamic CCA tuning.
756 */
757 if (!rt2x00dev->intf_associated)
758 goto dynamic_cca_tune;
759
760 /*
761 * Determine the BBP tuning threshold and correctly
762 * set BBP 24, 25 and 61.
763 */
764 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE, &bbp_thresh);
765 bbp_thresh = rt2x00_get_field16(bbp_thresh, EEPROM_BBPTUNE_THRESHOLD);
766
767 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R24, &r24);
768 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R25, &r25);
769 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBPTUNE_R61, &r61);
770
771 if ((rssi + bbp_thresh) > 0) {
772 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_HIGH);
773 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_HIGH);
774 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_HIGH);
775 } else {
776 r24 = rt2x00_get_field16(r24, EEPROM_BBPTUNE_R24_LOW);
777 r25 = rt2x00_get_field16(r25, EEPROM_BBPTUNE_R25_LOW);
778 r61 = rt2x00_get_field16(r61, EEPROM_BBPTUNE_R61_LOW);
779 }
780
781 rt2500usb_bbp_write(rt2x00dev, 24, r24);
782 rt2500usb_bbp_write(rt2x00dev, 25, r25);
783 rt2500usb_bbp_write(rt2x00dev, 61, r61);
784
785 /*
786 * A too low RSSI will cause too much false CCA which will
787 * then corrupt the R17 tuning. To remidy this the tuning should
788 * be stopped (While making sure the R17 value will not exceed limits)
789 */
790 if (rssi >= -40) {
791 if (r17 != 0x60)
792 rt2500usb_bbp_write(rt2x00dev, 17, 0x60);
793 return;
794 }
795
796 /*
797 * Special big-R17 for short distance
798 */
799 if (rssi >= -58) {
800 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_LOW);
801 if (r17 != sens)
802 rt2500usb_bbp_write(rt2x00dev, 17, sens);
803 return;
804 }
805
806 /*
807 * Special mid-R17 for middle distance
808 */
809 if (rssi >= -74) {
810 sens = rt2x00_get_field16(r17_sens, EEPROM_BBPTUNE_R17_HIGH);
811 if (r17 != sens)
812 rt2500usb_bbp_write(rt2x00dev, 17, sens);
813 return;
814 }
815
816 /*
817 * Leave short or middle distance condition, restore r17
818 * to the dynamic tuning range.
819 */
820 low_bound = 0x32;
821 if (rssi < -77)
822 up_bound -= (-77 - rssi);
823
824 if (up_bound < low_bound)
825 up_bound = low_bound;
826
827 if (r17 > up_bound) {
828 rt2500usb_bbp_write(rt2x00dev, 17, up_bound);
829 rt2x00dev->link.vgc_level = up_bound;
830 return;
831 }
832
833dynamic_cca_tune:
834
835 /*
836 * R17 is inside the dynamic tuning range,
837 * start tuning the link based on the false cca counter.
838 */
839 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
840 rt2500usb_bbp_write(rt2x00dev, 17, ++r17);
841 rt2x00dev->link.vgc_level = r17;
842 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
843 rt2500usb_bbp_write(rt2x00dev, 17, --r17);
844 rt2x00dev->link.vgc_level = r17;
845 }
846}
847#else
848#define rt2500usb_link_tuner NULL
849#endif
850
851/*
852 * Initialization functions. 719 * Initialization functions.
853 */ 720 */
854static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) 721static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
@@ -926,7 +793,7 @@ static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev)
926 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1); 793 rt2x00_set_field16(&reg, MAC_CSR1_HOST_READY, 1);
927 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg); 794 rt2500usb_register_write(rt2x00dev, MAC_CSR1, reg);
928 795
929 if (rt2x00_rev(&rt2x00dev->chip) >= RT2570_VERSION_C) { 796 if (rt2x00_rev(rt2x00dev) >= RT2570_VERSION_C) {
930 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg); 797 rt2500usb_register_read(rt2x00dev, PHY_CSR2, &reg);
931 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0); 798 rt2x00_set_field16(&reg, PHY_CSR2_LNA, 0);
932 } else { 799 } else {
@@ -1543,19 +1410,17 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1543 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1410 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1544 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1411 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1545 1412
1546 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0) || 1413 if (((reg & 0xfff0) != 0) || ((reg & 0x0000000f) == 0)) {
1547 rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
1548
1549 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1414 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1550 return -ENODEV; 1415 return -ENODEV;
1551 } 1416 }
1552 1417
1553 if (!rt2x00_rf(&rt2x00dev->chip, RF2522) && 1418 if (!rt2x00_rf(rt2x00dev, RF2522) &&
1554 !rt2x00_rf(&rt2x00dev->chip, RF2523) && 1419 !rt2x00_rf(rt2x00dev, RF2523) &&
1555 !rt2x00_rf(&rt2x00dev->chip, RF2524) && 1420 !rt2x00_rf(rt2x00dev, RF2524) &&
1556 !rt2x00_rf(&rt2x00dev->chip, RF2525) && 1421 !rt2x00_rf(rt2x00dev, RF2525) &&
1557 !rt2x00_rf(&rt2x00dev->chip, RF2525E) && 1422 !rt2x00_rf(rt2x00dev, RF2525E) &&
1558 !rt2x00_rf(&rt2x00dev->chip, RF5222)) { 1423 !rt2x00_rf(rt2x00dev, RF5222)) {
1559 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 1424 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1560 return -ENODEV; 1425 return -ENODEV;
1561 } 1426 }
@@ -1779,6 +1644,11 @@ static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1779 unsigned int i; 1644 unsigned int i;
1780 1645
1781 /* 1646 /*
1647 * Disable powersaving as default.
1648 */
1649 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
1650
1651 /*
1782 * Initialize all hw fields. 1652 * Initialize all hw fields.
1783 */ 1653 */
1784 rt2x00dev->hw->flags = 1654 rt2x00dev->hw->flags =
@@ -1788,8 +1658,6 @@ static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1788 IEEE80211_HW_SUPPORTS_PS | 1658 IEEE80211_HW_SUPPORTS_PS |
1789 IEEE80211_HW_PS_NULLFUNC_STACK; 1659 IEEE80211_HW_PS_NULLFUNC_STACK;
1790 1660
1791 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1792
1793 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 1661 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1794 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 1662 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1795 rt2x00_eeprom_addr(rt2x00dev, 1663 rt2x00_eeprom_addr(rt2x00dev,
@@ -1801,22 +1669,22 @@ static int rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1801 spec->supported_bands = SUPPORT_BAND_2GHZ; 1669 spec->supported_bands = SUPPORT_BAND_2GHZ;
1802 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 1670 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1803 1671
1804 if (rt2x00_rf(&rt2x00dev->chip, RF2522)) { 1672 if (rt2x00_rf(rt2x00dev, RF2522)) {
1805 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522); 1673 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2522);
1806 spec->channels = rf_vals_bg_2522; 1674 spec->channels = rf_vals_bg_2522;
1807 } else if (rt2x00_rf(&rt2x00dev->chip, RF2523)) { 1675 } else if (rt2x00_rf(rt2x00dev, RF2523)) {
1808 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523); 1676 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2523);
1809 spec->channels = rf_vals_bg_2523; 1677 spec->channels = rf_vals_bg_2523;
1810 } else if (rt2x00_rf(&rt2x00dev->chip, RF2524)) { 1678 } else if (rt2x00_rf(rt2x00dev, RF2524)) {
1811 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524); 1679 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2524);
1812 spec->channels = rf_vals_bg_2524; 1680 spec->channels = rf_vals_bg_2524;
1813 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525)) { 1681 } else if (rt2x00_rf(rt2x00dev, RF2525)) {
1814 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525); 1682 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525);
1815 spec->channels = rf_vals_bg_2525; 1683 spec->channels = rf_vals_bg_2525;
1816 } else if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) { 1684 } else if (rt2x00_rf(rt2x00dev, RF2525E)) {
1817 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e); 1685 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2525e);
1818 spec->channels = rf_vals_bg_2525e; 1686 spec->channels = rf_vals_bg_2525e;
1819 } else if (rt2x00_rf(&rt2x00dev->chip, RF5222)) { 1687 } else if (rt2x00_rf(rt2x00dev, RF5222)) {
1820 spec->supported_bands |= SUPPORT_BAND_5GHZ; 1688 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1821 spec->num_channels = ARRAY_SIZE(rf_vals_5222); 1689 spec->num_channels = ARRAY_SIZE(rf_vals_5222);
1822 spec->channels = rf_vals_5222; 1690 spec->channels = rf_vals_5222;
@@ -1897,7 +1765,6 @@ static const struct ieee80211_ops rt2500usb_mac80211_ops = {
1897 .get_stats = rt2x00mac_get_stats, 1765 .get_stats = rt2x00mac_get_stats,
1898 .bss_info_changed = rt2x00mac_bss_info_changed, 1766 .bss_info_changed = rt2x00mac_bss_info_changed,
1899 .conf_tx = rt2x00mac_conf_tx, 1767 .conf_tx = rt2x00mac_conf_tx,
1900 .get_tx_stats = rt2x00mac_get_tx_stats,
1901 .rfkill_poll = rt2x00mac_rfkill_poll, 1768 .rfkill_poll = rt2x00mac_rfkill_poll,
1902}; 1769};
1903 1770
@@ -1910,7 +1777,6 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1910 .rfkill_poll = rt2500usb_rfkill_poll, 1777 .rfkill_poll = rt2500usb_rfkill_poll,
1911 .link_stats = rt2500usb_link_stats, 1778 .link_stats = rt2500usb_link_stats,
1912 .reset_tuner = rt2500usb_reset_tuner, 1779 .reset_tuner = rt2500usb_reset_tuner,
1913 .link_tuner = rt2500usb_link_tuner,
1914 .write_tx_desc = rt2500usb_write_tx_desc, 1780 .write_tx_desc = rt2500usb_write_tx_desc,
1915 .write_tx_data = rt2x00usb_write_tx_data, 1781 .write_tx_data = rt2x00usb_write_tx_data,
1916 .write_beacon = rt2500usb_write_beacon, 1782 .write_beacon = rt2500usb_write_beacon,
@@ -1956,20 +1822,21 @@ static const struct data_queue_desc rt2500usb_queue_atim = {
1956}; 1822};
1957 1823
1958static const struct rt2x00_ops rt2500usb_ops = { 1824static const struct rt2x00_ops rt2500usb_ops = {
1959 .name = KBUILD_MODNAME, 1825 .name = KBUILD_MODNAME,
1960 .max_sta_intf = 1, 1826 .max_sta_intf = 1,
1961 .max_ap_intf = 1, 1827 .max_ap_intf = 1,
1962 .eeprom_size = EEPROM_SIZE, 1828 .eeprom_size = EEPROM_SIZE,
1963 .rf_size = RF_SIZE, 1829 .rf_size = RF_SIZE,
1964 .tx_queues = NUM_TX_QUEUES, 1830 .tx_queues = NUM_TX_QUEUES,
1965 .rx = &rt2500usb_queue_rx, 1831 .extra_tx_headroom = TXD_DESC_SIZE,
1966 .tx = &rt2500usb_queue_tx, 1832 .rx = &rt2500usb_queue_rx,
1967 .bcn = &rt2500usb_queue_bcn, 1833 .tx = &rt2500usb_queue_tx,
1968 .atim = &rt2500usb_queue_atim, 1834 .bcn = &rt2500usb_queue_bcn,
1969 .lib = &rt2500usb_rt2x00_ops, 1835 .atim = &rt2500usb_queue_atim,
1970 .hw = &rt2500usb_mac80211_ops, 1836 .lib = &rt2500usb_rt2x00_ops,
1837 .hw = &rt2500usb_mac80211_ops,
1971#ifdef CONFIG_RT2X00_LIB_DEBUGFS 1838#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1972 .debugfs = &rt2500usb_rt2x00debug, 1839 .debugfs = &rt2500usb_rt2x00debug,
1973#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 1840#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1974}; 1841};
1975 1842
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.h b/drivers/net/wireless/rt2x00/rt2500usb.h
index b01edca42583..b493306a7eed 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.h
+++ b/drivers/net/wireless/rt2x00/rt2500usb.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -46,7 +46,7 @@
46 46
47/* 47/*
48 * Signal information. 48 * Signal information.
49 * Defaul offset is required for RSSI <-> dBm conversion. 49 * Default offset is required for RSSI <-> dBm conversion.
50 */ 50 */
51#define DEFAULT_RSSI_OFFSET 120 51#define DEFAULT_RSSI_OFFSET 120
52 52
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
new file mode 100644
index 000000000000..74c0433dba37
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -0,0 +1,1852 @@
1/*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
6 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
7 Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
8 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
9 Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
10 <http://rt2x00.serialmonkey.com>
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the
24 Free Software Foundation, Inc.,
25 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 */
27
28/*
29 Module: rt2800
30 Abstract: Data structures and registers for the rt2800 modules.
31 Supported chipsets: RT2800E, RT2800ED & RT2800U.
32 */
33
34#ifndef RT2800_H
35#define RT2800_H
36
37/*
38 * RF chip defines.
39 *
40 * RF2820 2.4G 2T3R
41 * RF2850 2.4G/5G 2T3R
42 * RF2720 2.4G 1T2R
43 * RF2750 2.4G/5G 1T2R
44 * RF3020 2.4G 1T1R
45 * RF2020 2.4G B/G
46 * RF3021 2.4G 1T2R
47 * RF3022 2.4G 2T2R
48 * RF3052 2.4G 2T2R
49 */
50#define RF2820 0x0001
51#define RF2850 0x0002
52#define RF2720 0x0003
53#define RF2750 0x0004
54#define RF3020 0x0005
55#define RF2020 0x0006
56#define RF3021 0x0007
57#define RF3022 0x0008
58#define RF3052 0x0009
59
60/*
61 * Chipset version.
62 */
63#define RT2860C_VERSION 0x0100
64#define RT2860D_VERSION 0x0101
65#define RT2880E_VERSION 0x0200
66#define RT2883_VERSION 0x0300
67#define RT3070_VERSION 0x0200
68
69/*
70 * Signal information.
71 * Default offset is required for RSSI <-> dBm conversion.
72 */
73#define DEFAULT_RSSI_OFFSET 120 /* FIXME */
74
75/*
76 * Register layout information.
77 */
78#define CSR_REG_BASE 0x1000
79#define CSR_REG_SIZE 0x0800
80#define EEPROM_BASE 0x0000
81#define EEPROM_SIZE 0x0110
82#define BBP_BASE 0x0000
83#define BBP_SIZE 0x0080
84#define RF_BASE 0x0004
85#define RF_SIZE 0x0010
86
87/*
88 * Number of TX queues.
89 */
90#define NUM_TX_QUEUES 4
91
92/*
93 * USB registers.
94 */
95
96/*
97 * INT_SOURCE_CSR: Interrupt source register.
98 * Write one to clear corresponding bit.
99 * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
100 */
101#define INT_SOURCE_CSR 0x0200
102#define INT_SOURCE_CSR_RXDELAYINT FIELD32(0x00000001)
103#define INT_SOURCE_CSR_TXDELAYINT FIELD32(0x00000002)
104#define INT_SOURCE_CSR_RX_DONE FIELD32(0x00000004)
105#define INT_SOURCE_CSR_AC0_DMA_DONE FIELD32(0x00000008)
106#define INT_SOURCE_CSR_AC1_DMA_DONE FIELD32(0x00000010)
107#define INT_SOURCE_CSR_AC2_DMA_DONE FIELD32(0x00000020)
108#define INT_SOURCE_CSR_AC3_DMA_DONE FIELD32(0x00000040)
109#define INT_SOURCE_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
110#define INT_SOURCE_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
111#define INT_SOURCE_CSR_MCU_COMMAND FIELD32(0x00000200)
112#define INT_SOURCE_CSR_RXTX_COHERENT FIELD32(0x00000400)
113#define INT_SOURCE_CSR_TBTT FIELD32(0x00000800)
114#define INT_SOURCE_CSR_PRE_TBTT FIELD32(0x00001000)
115#define INT_SOURCE_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
116#define INT_SOURCE_CSR_AUTO_WAKEUP FIELD32(0x00004000)
117#define INT_SOURCE_CSR_GPTIMER FIELD32(0x00008000)
118#define INT_SOURCE_CSR_RX_COHERENT FIELD32(0x00010000)
119#define INT_SOURCE_CSR_TX_COHERENT FIELD32(0x00020000)
120
121/*
122 * INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF.
123 */
124#define INT_MASK_CSR 0x0204
125#define INT_MASK_CSR_RXDELAYINT FIELD32(0x00000001)
126#define INT_MASK_CSR_TXDELAYINT FIELD32(0x00000002)
127#define INT_MASK_CSR_RX_DONE FIELD32(0x00000004)
128#define INT_MASK_CSR_AC0_DMA_DONE FIELD32(0x00000008)
129#define INT_MASK_CSR_AC1_DMA_DONE FIELD32(0x00000010)
130#define INT_MASK_CSR_AC2_DMA_DONE FIELD32(0x00000020)
131#define INT_MASK_CSR_AC3_DMA_DONE FIELD32(0x00000040)
132#define INT_MASK_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
133#define INT_MASK_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
134#define INT_MASK_CSR_MCU_COMMAND FIELD32(0x00000200)
135#define INT_MASK_CSR_RXTX_COHERENT FIELD32(0x00000400)
136#define INT_MASK_CSR_TBTT FIELD32(0x00000800)
137#define INT_MASK_CSR_PRE_TBTT FIELD32(0x00001000)
138#define INT_MASK_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
139#define INT_MASK_CSR_AUTO_WAKEUP FIELD32(0x00004000)
140#define INT_MASK_CSR_GPTIMER FIELD32(0x00008000)
141#define INT_MASK_CSR_RX_COHERENT FIELD32(0x00010000)
142#define INT_MASK_CSR_TX_COHERENT FIELD32(0x00020000)
143
144/*
145 * WPDMA_GLO_CFG
146 */
147#define WPDMA_GLO_CFG 0x0208
148#define WPDMA_GLO_CFG_ENABLE_TX_DMA FIELD32(0x00000001)
149#define WPDMA_GLO_CFG_TX_DMA_BUSY FIELD32(0x00000002)
150#define WPDMA_GLO_CFG_ENABLE_RX_DMA FIELD32(0x00000004)
151#define WPDMA_GLO_CFG_RX_DMA_BUSY FIELD32(0x00000008)
152#define WPDMA_GLO_CFG_WP_DMA_BURST_SIZE FIELD32(0x00000030)
153#define WPDMA_GLO_CFG_TX_WRITEBACK_DONE FIELD32(0x00000040)
154#define WPDMA_GLO_CFG_BIG_ENDIAN FIELD32(0x00000080)
155#define WPDMA_GLO_CFG_RX_HDR_SCATTER FIELD32(0x0000ff00)
156#define WPDMA_GLO_CFG_HDR_SEG_LEN FIELD32(0xffff0000)
157
158/*
159 * WPDMA_RST_IDX
160 */
161#define WPDMA_RST_IDX 0x020c
162#define WPDMA_RST_IDX_DTX_IDX0 FIELD32(0x00000001)
163#define WPDMA_RST_IDX_DTX_IDX1 FIELD32(0x00000002)
164#define WPDMA_RST_IDX_DTX_IDX2 FIELD32(0x00000004)
165#define WPDMA_RST_IDX_DTX_IDX3 FIELD32(0x00000008)
166#define WPDMA_RST_IDX_DTX_IDX4 FIELD32(0x00000010)
167#define WPDMA_RST_IDX_DTX_IDX5 FIELD32(0x00000020)
168#define WPDMA_RST_IDX_DRX_IDX0 FIELD32(0x00010000)
169
170/*
171 * DELAY_INT_CFG
172 */
173#define DELAY_INT_CFG 0x0210
174#define DELAY_INT_CFG_RXMAX_PTIME FIELD32(0x000000ff)
175#define DELAY_INT_CFG_RXMAX_PINT FIELD32(0x00007f00)
176#define DELAY_INT_CFG_RXDLY_INT_EN FIELD32(0x00008000)
177#define DELAY_INT_CFG_TXMAX_PTIME FIELD32(0x00ff0000)
178#define DELAY_INT_CFG_TXMAX_PINT FIELD32(0x7f000000)
179#define DELAY_INT_CFG_TXDLY_INT_EN FIELD32(0x80000000)
180
181/*
182 * WMM_AIFSN_CFG: Aifsn for each EDCA AC
183 * AIFSN0: AC_BE
184 * AIFSN1: AC_BK
185 * AIFSN2: AC_VI
186 * AIFSN3: AC_VO
187 */
188#define WMM_AIFSN_CFG 0x0214
189#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
190#define WMM_AIFSN_CFG_AIFSN1 FIELD32(0x000000f0)
191#define WMM_AIFSN_CFG_AIFSN2 FIELD32(0x00000f00)
192#define WMM_AIFSN_CFG_AIFSN3 FIELD32(0x0000f000)
193
194/*
195 * WMM_CWMIN_CSR: CWmin for each EDCA AC
196 * CWMIN0: AC_BE
197 * CWMIN1: AC_BK
198 * CWMIN2: AC_VI
199 * CWMIN3: AC_VO
200 */
201#define WMM_CWMIN_CFG 0x0218
202#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
203#define WMM_CWMIN_CFG_CWMIN1 FIELD32(0x000000f0)
204#define WMM_CWMIN_CFG_CWMIN2 FIELD32(0x00000f00)
205#define WMM_CWMIN_CFG_CWMIN3 FIELD32(0x0000f000)
206
207/*
208 * WMM_CWMAX_CSR: CWmax for each EDCA AC
209 * CWMAX0: AC_BE
210 * CWMAX1: AC_BK
211 * CWMAX2: AC_VI
212 * CWMAX3: AC_VO
213 */
214#define WMM_CWMAX_CFG 0x021c
215#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
216#define WMM_CWMAX_CFG_CWMAX1 FIELD32(0x000000f0)
217#define WMM_CWMAX_CFG_CWMAX2 FIELD32(0x00000f00)
218#define WMM_CWMAX_CFG_CWMAX3 FIELD32(0x0000f000)
219
220/*
221 * AC_TXOP0: AC_BK/AC_BE TXOP register
222 * AC0TXOP: AC_BK in unit of 32us
223 * AC1TXOP: AC_BE in unit of 32us
224 */
225#define WMM_TXOP0_CFG 0x0220
226#define WMM_TXOP0_CFG_AC0TXOP FIELD32(0x0000ffff)
227#define WMM_TXOP0_CFG_AC1TXOP FIELD32(0xffff0000)
228
229/*
230 * AC_TXOP1: AC_VO/AC_VI TXOP register
231 * AC2TXOP: AC_VI in unit of 32us
232 * AC3TXOP: AC_VO in unit of 32us
233 */
234#define WMM_TXOP1_CFG 0x0224
235#define WMM_TXOP1_CFG_AC2TXOP FIELD32(0x0000ffff)
236#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
237
238/*
239 * GPIO_CTRL_CFG:
240 */
241#define GPIO_CTRL_CFG 0x0228
242#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001)
243#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002)
244#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004)
245#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008)
246#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010)
247#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020)
248#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040)
249#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080)
250#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00000100)
251
252/*
253 * MCU_CMD_CFG
254 */
255#define MCU_CMD_CFG 0x022c
256
257/*
258 * AC_BK register offsets
259 */
260#define TX_BASE_PTR0 0x0230
261#define TX_MAX_CNT0 0x0234
262#define TX_CTX_IDX0 0x0238
263#define TX_DTX_IDX0 0x023c
264
265/*
266 * AC_BE register offsets
267 */
268#define TX_BASE_PTR1 0x0240
269#define TX_MAX_CNT1 0x0244
270#define TX_CTX_IDX1 0x0248
271#define TX_DTX_IDX1 0x024c
272
273/*
274 * AC_VI register offsets
275 */
276#define TX_BASE_PTR2 0x0250
277#define TX_MAX_CNT2 0x0254
278#define TX_CTX_IDX2 0x0258
279#define TX_DTX_IDX2 0x025c
280
281/*
282 * AC_VO register offsets
283 */
284#define TX_BASE_PTR3 0x0260
285#define TX_MAX_CNT3 0x0264
286#define TX_CTX_IDX3 0x0268
287#define TX_DTX_IDX3 0x026c
288
289/*
290 * HCCA register offsets
291 */
292#define TX_BASE_PTR4 0x0270
293#define TX_MAX_CNT4 0x0274
294#define TX_CTX_IDX4 0x0278
295#define TX_DTX_IDX4 0x027c
296
297/*
298 * MGMT register offsets
299 */
300#define TX_BASE_PTR5 0x0280
301#define TX_MAX_CNT5 0x0284
302#define TX_CTX_IDX5 0x0288
303#define TX_DTX_IDX5 0x028c
304
305/*
306 * RX register offsets
307 */
308#define RX_BASE_PTR 0x0290
309#define RX_MAX_CNT 0x0294
310#define RX_CRX_IDX 0x0298
311#define RX_DRX_IDX 0x029c
312
313/*
314 * PBF_SYS_CTRL
315 * HOST_RAM_WRITE: enable Host program ram write selection
316 */
317#define PBF_SYS_CTRL 0x0400
318#define PBF_SYS_CTRL_READY FIELD32(0x00000080)
319#define PBF_SYS_CTRL_HOST_RAM_WRITE FIELD32(0x00010000)
320
321/*
322 * HOST-MCU shared memory
323 */
324#define HOST_CMD_CSR 0x0404
325#define HOST_CMD_CSR_HOST_COMMAND FIELD32(0x000000ff)
326
327/*
328 * PBF registers
329 * Most are for debug. Driver doesn't touch PBF register.
330 */
331#define PBF_CFG 0x0408
332#define PBF_MAX_PCNT 0x040c
333#define PBF_CTRL 0x0410
334#define PBF_INT_STA 0x0414
335#define PBF_INT_ENA 0x0418
336
337/*
338 * BCN_OFFSET0:
339 */
340#define BCN_OFFSET0 0x042c
341#define BCN_OFFSET0_BCN0 FIELD32(0x000000ff)
342#define BCN_OFFSET0_BCN1 FIELD32(0x0000ff00)
343#define BCN_OFFSET0_BCN2 FIELD32(0x00ff0000)
344#define BCN_OFFSET0_BCN3 FIELD32(0xff000000)
345
346/*
347 * BCN_OFFSET1:
348 */
349#define BCN_OFFSET1 0x0430
350#define BCN_OFFSET1_BCN4 FIELD32(0x000000ff)
351#define BCN_OFFSET1_BCN5 FIELD32(0x0000ff00)
352#define BCN_OFFSET1_BCN6 FIELD32(0x00ff0000)
353#define BCN_OFFSET1_BCN7 FIELD32(0xff000000)
354
355/*
356 * PBF registers
357 * Most are for debug. Driver doesn't touch PBF register.
358 */
359#define TXRXQ_PCNT 0x0438
360#define PBF_DBG 0x043c
361
362/*
363 * RF registers
364 */
365#define RF_CSR_CFG 0x0500
366#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
367#define RF_CSR_CFG_REGNUM FIELD32(0x00001f00)
368#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
369#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
370
371/*
372 * EFUSE_CSR: RT30x0 EEPROM
373 */
374#define EFUSE_CTRL 0x0580
375#define EFUSE_CTRL_ADDRESS_IN FIELD32(0x03fe0000)
376#define EFUSE_CTRL_MODE FIELD32(0x000000c0)
377#define EFUSE_CTRL_KICK FIELD32(0x40000000)
378#define EFUSE_CTRL_PRESENT FIELD32(0x80000000)
379
380/*
381 * EFUSE_DATA0
382 */
383#define EFUSE_DATA0 0x0590
384
385/*
386 * EFUSE_DATA1
387 */
388#define EFUSE_DATA1 0x0594
389
390/*
391 * EFUSE_DATA2
392 */
393#define EFUSE_DATA2 0x0598
394
395/*
396 * EFUSE_DATA3
397 */
398#define EFUSE_DATA3 0x059c
399
400/*
401 * MAC Control/Status Registers(CSR).
402 * Some values are set in TU, whereas 1 TU == 1024 us.
403 */
404
405/*
406 * MAC_CSR0: ASIC revision number.
407 * ASIC_REV: 0
408 * ASIC_VER: 2860 or 2870
409 */
410#define MAC_CSR0 0x1000
411#define MAC_CSR0_REVISION FIELD32(0x0000ffff)
412#define MAC_CSR0_CHIPSET FIELD32(0xffff0000)
413
414/*
415 * MAC_SYS_CTRL:
416 */
417#define MAC_SYS_CTRL 0x1004
418#define MAC_SYS_CTRL_RESET_CSR FIELD32(0x00000001)
419#define MAC_SYS_CTRL_RESET_BBP FIELD32(0x00000002)
420#define MAC_SYS_CTRL_ENABLE_TX FIELD32(0x00000004)
421#define MAC_SYS_CTRL_ENABLE_RX FIELD32(0x00000008)
422#define MAC_SYS_CTRL_CONTINUOUS_TX FIELD32(0x00000010)
423#define MAC_SYS_CTRL_LOOPBACK FIELD32(0x00000020)
424#define MAC_SYS_CTRL_WLAN_HALT FIELD32(0x00000040)
425#define MAC_SYS_CTRL_RX_TIMESTAMP FIELD32(0x00000080)
426
427/*
428 * MAC_ADDR_DW0: STA MAC register 0
429 */
430#define MAC_ADDR_DW0 0x1008
431#define MAC_ADDR_DW0_BYTE0 FIELD32(0x000000ff)
432#define MAC_ADDR_DW0_BYTE1 FIELD32(0x0000ff00)
433#define MAC_ADDR_DW0_BYTE2 FIELD32(0x00ff0000)
434#define MAC_ADDR_DW0_BYTE3 FIELD32(0xff000000)
435
436/*
437 * MAC_ADDR_DW1: STA MAC register 1
438 * UNICAST_TO_ME_MASK:
439 * Used to mask off bits from byte 5 of the MAC address
440 * to determine the UNICAST_TO_ME bit for RX frames.
441 * The full mask is complemented by BSS_ID_MASK:
442 * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
443 */
444#define MAC_ADDR_DW1 0x100c
445#define MAC_ADDR_DW1_BYTE4 FIELD32(0x000000ff)
446#define MAC_ADDR_DW1_BYTE5 FIELD32(0x0000ff00)
447#define MAC_ADDR_DW1_UNICAST_TO_ME_MASK FIELD32(0x00ff0000)
448
449/*
450 * MAC_BSSID_DW0: BSSID register 0
451 */
452#define MAC_BSSID_DW0 0x1010
453#define MAC_BSSID_DW0_BYTE0 FIELD32(0x000000ff)
454#define MAC_BSSID_DW0_BYTE1 FIELD32(0x0000ff00)
455#define MAC_BSSID_DW0_BYTE2 FIELD32(0x00ff0000)
456#define MAC_BSSID_DW0_BYTE3 FIELD32(0xff000000)
457
458/*
459 * MAC_BSSID_DW1: BSSID register 1
460 * BSS_ID_MASK:
461 * 0: 1-BSSID mode (BSS index = 0)
462 * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
463 * 2: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
464 * 3: 8-BSSID mode (BSS index: byte5, bit 0 - 2)
465 * This mask is used to mask off bits 0, 1 and 2 of byte 5 of the
466 * BSSID. This will make sure that those bits will be ignored
467 * when determining the MY_BSS of RX frames.
468 */
469#define MAC_BSSID_DW1 0x1014
470#define MAC_BSSID_DW1_BYTE4 FIELD32(0x000000ff)
471#define MAC_BSSID_DW1_BYTE5 FIELD32(0x0000ff00)
472#define MAC_BSSID_DW1_BSS_ID_MASK FIELD32(0x00030000)
473#define MAC_BSSID_DW1_BSS_BCN_NUM FIELD32(0x001c0000)
474
475/*
476 * MAX_LEN_CFG: Maximum frame length register.
477 * MAX_MPDU: rt2860b max 16k bytes
478 * MAX_PSDU: Maximum PSDU length
479 * (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
480 */
481#define MAX_LEN_CFG 0x1018
482#define MAX_LEN_CFG_MAX_MPDU FIELD32(0x00000fff)
483#define MAX_LEN_CFG_MAX_PSDU FIELD32(0x00003000)
484#define MAX_LEN_CFG_MIN_PSDU FIELD32(0x0000c000)
485#define MAX_LEN_CFG_MIN_MPDU FIELD32(0x000f0000)
486
487/*
488 * BBP_CSR_CFG: BBP serial control register
489 * VALUE: Register value to program into BBP
490 * REG_NUM: Selected BBP register
491 * READ_CONTROL: 0 write BBP, 1 read BBP
492 * BUSY: ASIC is busy executing BBP commands
493 * BBP_PAR_DUR: 0 4 MAC clocks, 1 8 MAC clocks
494 * BBP_RW_MODE: 0 serial, 1 paralell
495 */
496#define BBP_CSR_CFG 0x101c
497#define BBP_CSR_CFG_VALUE FIELD32(0x000000ff)
498#define BBP_CSR_CFG_REGNUM FIELD32(0x0000ff00)
499#define BBP_CSR_CFG_READ_CONTROL FIELD32(0x00010000)
500#define BBP_CSR_CFG_BUSY FIELD32(0x00020000)
501#define BBP_CSR_CFG_BBP_PAR_DUR FIELD32(0x00040000)
502#define BBP_CSR_CFG_BBP_RW_MODE FIELD32(0x00080000)
503
504/*
505 * RF_CSR_CFG0: RF control register
506 * REGID_AND_VALUE: Register value to program into RF
507 * BITWIDTH: Selected RF register
508 * STANDBYMODE: 0 high when standby, 1 low when standby
509 * SEL: 0 RF_LE0 activate, 1 RF_LE1 activate
510 * BUSY: ASIC is busy executing RF commands
511 */
512#define RF_CSR_CFG0 0x1020
513#define RF_CSR_CFG0_REGID_AND_VALUE FIELD32(0x00ffffff)
514#define RF_CSR_CFG0_BITWIDTH FIELD32(0x1f000000)
515#define RF_CSR_CFG0_REG_VALUE_BW FIELD32(0x1fffffff)
516#define RF_CSR_CFG0_STANDBYMODE FIELD32(0x20000000)
517#define RF_CSR_CFG0_SEL FIELD32(0x40000000)
518#define RF_CSR_CFG0_BUSY FIELD32(0x80000000)
519
520/*
521 * RF_CSR_CFG1: RF control register
522 * REGID_AND_VALUE: Register value to program into RF
523 * RFGAP: Gap between BB_CONTROL_RF and RF_LE
524 * 0: 3 system clock cycle (37.5usec)
525 * 1: 5 system clock cycle (62.5usec)
526 */
527#define RF_CSR_CFG1 0x1024
528#define RF_CSR_CFG1_REGID_AND_VALUE FIELD32(0x00ffffff)
529#define RF_CSR_CFG1_RFGAP FIELD32(0x1f000000)
530
531/*
532 * RF_CSR_CFG2: RF control register
533 * VALUE: Register value to program into RF
534 */
535#define RF_CSR_CFG2 0x1028
536#define RF_CSR_CFG2_VALUE FIELD32(0x00ffffff)
537
538/*
539 * LED_CFG: LED control
540 * color LED's:
541 * 0: off
542 * 1: blinking upon TX2
543 * 2: periodic slow blinking
544 * 3: always on
545 * LED polarity:
546 * 0: active low
547 * 1: active high
548 */
549#define LED_CFG 0x102c
550#define LED_CFG_ON_PERIOD FIELD32(0x000000ff)
551#define LED_CFG_OFF_PERIOD FIELD32(0x0000ff00)
552#define LED_CFG_SLOW_BLINK_PERIOD FIELD32(0x003f0000)
553#define LED_CFG_R_LED_MODE FIELD32(0x03000000)
554#define LED_CFG_G_LED_MODE FIELD32(0x0c000000)
555#define LED_CFG_Y_LED_MODE FIELD32(0x30000000)
556#define LED_CFG_LED_POLAR FIELD32(0x40000000)
557
558/*
559 * XIFS_TIME_CFG: MAC timing
560 * CCKM_SIFS_TIME: unit 1us. Applied after CCK RX/TX
561 * OFDM_SIFS_TIME: unit 1us. Applied after OFDM RX/TX
562 * OFDM_XIFS_TIME: unit 1us. Applied after OFDM RX
563 * when MAC doesn't reference BBP signal BBRXEND
564 * EIFS: unit 1us
565 * BB_RXEND_ENABLE: reference RXEND signal to begin XIFS defer
566 *
567 */
568#define XIFS_TIME_CFG 0x1100
569#define XIFS_TIME_CFG_CCKM_SIFS_TIME FIELD32(0x000000ff)
570#define XIFS_TIME_CFG_OFDM_SIFS_TIME FIELD32(0x0000ff00)
571#define XIFS_TIME_CFG_OFDM_XIFS_TIME FIELD32(0x000f0000)
572#define XIFS_TIME_CFG_EIFS FIELD32(0x1ff00000)
573#define XIFS_TIME_CFG_BB_RXEND_ENABLE FIELD32(0x20000000)
574
575/*
576 * BKOFF_SLOT_CFG:
577 */
578#define BKOFF_SLOT_CFG 0x1104
579#define BKOFF_SLOT_CFG_SLOT_TIME FIELD32(0x000000ff)
580#define BKOFF_SLOT_CFG_CC_DELAY_TIME FIELD32(0x0000ff00)
581
582/*
583 * NAV_TIME_CFG:
584 */
585#define NAV_TIME_CFG 0x1108
586#define NAV_TIME_CFG_SIFS FIELD32(0x000000ff)
587#define NAV_TIME_CFG_SLOT_TIME FIELD32(0x0000ff00)
588#define NAV_TIME_CFG_EIFS FIELD32(0x01ff0000)
589#define NAV_TIME_ZERO_SIFS FIELD32(0x02000000)
590
591/*
592 * CH_TIME_CFG: count as channel busy
593 */
594#define CH_TIME_CFG 0x110c
595
596/*
597 * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
598 */
599#define PBF_LIFE_TIMER 0x1110
600
601/*
602 * BCN_TIME_CFG:
603 * BEACON_INTERVAL: in unit of 1/16 TU
604 * TSF_TICKING: Enable TSF auto counting
605 * TSF_SYNC: Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
606 * BEACON_GEN: Enable beacon generator
607 */
608#define BCN_TIME_CFG 0x1114
609#define BCN_TIME_CFG_BEACON_INTERVAL FIELD32(0x0000ffff)
610#define BCN_TIME_CFG_TSF_TICKING FIELD32(0x00010000)
611#define BCN_TIME_CFG_TSF_SYNC FIELD32(0x00060000)
612#define BCN_TIME_CFG_TBTT_ENABLE FIELD32(0x00080000)
613#define BCN_TIME_CFG_BEACON_GEN FIELD32(0x00100000)
614#define BCN_TIME_CFG_TX_TIME_COMPENSATE FIELD32(0xf0000000)
615
616/*
617 * TBTT_SYNC_CFG:
618 */
619#define TBTT_SYNC_CFG 0x1118
620
621/*
622 * TSF_TIMER_DW0: Local lsb TSF timer, read-only
623 */
624#define TSF_TIMER_DW0 0x111c
625#define TSF_TIMER_DW0_LOW_WORD FIELD32(0xffffffff)
626
627/*
628 * TSF_TIMER_DW1: Local msb TSF timer, read-only
629 */
630#define TSF_TIMER_DW1 0x1120
631#define TSF_TIMER_DW1_HIGH_WORD FIELD32(0xffffffff)
632
633/*
634 * TBTT_TIMER: TImer remains till next TBTT, read-only
635 */
636#define TBTT_TIMER 0x1124
637
638/*
639 * INT_TIMER_CFG:
640 */
641#define INT_TIMER_CFG 0x1128
642
643/*
644 * INT_TIMER_EN: GP-timer and pre-tbtt Int enable
645 */
646#define INT_TIMER_EN 0x112c
647
648/*
649 * CH_IDLE_STA: channel idle time
650 */
651#define CH_IDLE_STA 0x1130
652
653/*
654 * CH_BUSY_STA: channel busy time
655 */
656#define CH_BUSY_STA 0x1134
657
658/*
659 * MAC_STATUS_CFG:
660 * BBP_RF_BUSY: When set to 0, BBP and RF are stable.
661 * if 1 or higher one of the 2 registers is busy.
662 */
663#define MAC_STATUS_CFG 0x1200
664#define MAC_STATUS_CFG_BBP_RF_BUSY FIELD32(0x00000003)
665
666/*
667 * PWR_PIN_CFG:
668 */
669#define PWR_PIN_CFG 0x1204
670
671/*
672 * AUTOWAKEUP_CFG: Manual power control / status register
673 * TBCN_BEFORE_WAKE: ForceWake has high privilege than PutToSleep when both set
674 * AUTOWAKE: 0:sleep, 1:awake
675 */
676#define AUTOWAKEUP_CFG 0x1208
677#define AUTOWAKEUP_CFG_AUTO_LEAD_TIME FIELD32(0x000000ff)
678#define AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE FIELD32(0x00007f00)
679#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
680
681/*
682 * EDCA_AC0_CFG:
683 */
684#define EDCA_AC0_CFG 0x1300
685#define EDCA_AC0_CFG_TX_OP FIELD32(0x000000ff)
686#define EDCA_AC0_CFG_AIFSN FIELD32(0x00000f00)
687#define EDCA_AC0_CFG_CWMIN FIELD32(0x0000f000)
688#define EDCA_AC0_CFG_CWMAX FIELD32(0x000f0000)
689
690/*
691 * EDCA_AC1_CFG:
692 */
693#define EDCA_AC1_CFG 0x1304
694#define EDCA_AC1_CFG_TX_OP FIELD32(0x000000ff)
695#define EDCA_AC1_CFG_AIFSN FIELD32(0x00000f00)
696#define EDCA_AC1_CFG_CWMIN FIELD32(0x0000f000)
697#define EDCA_AC1_CFG_CWMAX FIELD32(0x000f0000)
698
699/*
700 * EDCA_AC2_CFG:
701 */
702#define EDCA_AC2_CFG 0x1308
703#define EDCA_AC2_CFG_TX_OP FIELD32(0x000000ff)
704#define EDCA_AC2_CFG_AIFSN FIELD32(0x00000f00)
705#define EDCA_AC2_CFG_CWMIN FIELD32(0x0000f000)
706#define EDCA_AC2_CFG_CWMAX FIELD32(0x000f0000)
707
708/*
709 * EDCA_AC3_CFG:
710 */
711#define EDCA_AC3_CFG 0x130c
712#define EDCA_AC3_CFG_TX_OP FIELD32(0x000000ff)
713#define EDCA_AC3_CFG_AIFSN FIELD32(0x00000f00)
714#define EDCA_AC3_CFG_CWMIN FIELD32(0x0000f000)
715#define EDCA_AC3_CFG_CWMAX FIELD32(0x000f0000)
716
717/*
718 * EDCA_TID_AC_MAP:
719 */
720#define EDCA_TID_AC_MAP 0x1310
721
722/*
723 * TX_PWR_CFG_0:
724 */
725#define TX_PWR_CFG_0 0x1314
726#define TX_PWR_CFG_0_1MBS FIELD32(0x0000000f)
727#define TX_PWR_CFG_0_2MBS FIELD32(0x000000f0)
728#define TX_PWR_CFG_0_55MBS FIELD32(0x00000f00)
729#define TX_PWR_CFG_0_11MBS FIELD32(0x0000f000)
730#define TX_PWR_CFG_0_6MBS FIELD32(0x000f0000)
731#define TX_PWR_CFG_0_9MBS FIELD32(0x00f00000)
732#define TX_PWR_CFG_0_12MBS FIELD32(0x0f000000)
733#define TX_PWR_CFG_0_18MBS FIELD32(0xf0000000)
734
735/*
736 * TX_PWR_CFG_1:
737 */
738#define TX_PWR_CFG_1 0x1318
739#define TX_PWR_CFG_1_24MBS FIELD32(0x0000000f)
740#define TX_PWR_CFG_1_36MBS FIELD32(0x000000f0)
741#define TX_PWR_CFG_1_48MBS FIELD32(0x00000f00)
742#define TX_PWR_CFG_1_54MBS FIELD32(0x0000f000)
743#define TX_PWR_CFG_1_MCS0 FIELD32(0x000f0000)
744#define TX_PWR_CFG_1_MCS1 FIELD32(0x00f00000)
745#define TX_PWR_CFG_1_MCS2 FIELD32(0x0f000000)
746#define TX_PWR_CFG_1_MCS3 FIELD32(0xf0000000)
747
748/*
749 * TX_PWR_CFG_2:
750 */
751#define TX_PWR_CFG_2 0x131c
752#define TX_PWR_CFG_2_MCS4 FIELD32(0x0000000f)
753#define TX_PWR_CFG_2_MCS5 FIELD32(0x000000f0)
754#define TX_PWR_CFG_2_MCS6 FIELD32(0x00000f00)
755#define TX_PWR_CFG_2_MCS7 FIELD32(0x0000f000)
756#define TX_PWR_CFG_2_MCS8 FIELD32(0x000f0000)
757#define TX_PWR_CFG_2_MCS9 FIELD32(0x00f00000)
758#define TX_PWR_CFG_2_MCS10 FIELD32(0x0f000000)
759#define TX_PWR_CFG_2_MCS11 FIELD32(0xf0000000)
760
761/*
762 * TX_PWR_CFG_3:
763 */
764#define TX_PWR_CFG_3 0x1320
765#define TX_PWR_CFG_3_MCS12 FIELD32(0x0000000f)
766#define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0)
767#define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00)
768#define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000)
769#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000)
770#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000)
771#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000)
772#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000)
773
774/*
775 * TX_PWR_CFG_4:
776 */
777#define TX_PWR_CFG_4 0x1324
778#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f)
779#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0)
780#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
781#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
782
783/*
784 * TX_PIN_CFG:
785 */
786#define TX_PIN_CFG 0x1328
787#define TX_PIN_CFG_PA_PE_A0_EN FIELD32(0x00000001)
788#define TX_PIN_CFG_PA_PE_G0_EN FIELD32(0x00000002)
789#define TX_PIN_CFG_PA_PE_A1_EN FIELD32(0x00000004)
790#define TX_PIN_CFG_PA_PE_G1_EN FIELD32(0x00000008)
791#define TX_PIN_CFG_PA_PE_A0_POL FIELD32(0x00000010)
792#define TX_PIN_CFG_PA_PE_G0_POL FIELD32(0x00000020)
793#define TX_PIN_CFG_PA_PE_A1_POL FIELD32(0x00000040)
794#define TX_PIN_CFG_PA_PE_G1_POL FIELD32(0x00000080)
795#define TX_PIN_CFG_LNA_PE_A0_EN FIELD32(0x00000100)
796#define TX_PIN_CFG_LNA_PE_G0_EN FIELD32(0x00000200)
797#define TX_PIN_CFG_LNA_PE_A1_EN FIELD32(0x00000400)
798#define TX_PIN_CFG_LNA_PE_G1_EN FIELD32(0x00000800)
799#define TX_PIN_CFG_LNA_PE_A0_POL FIELD32(0x00001000)
800#define TX_PIN_CFG_LNA_PE_G0_POL FIELD32(0x00002000)
801#define TX_PIN_CFG_LNA_PE_A1_POL FIELD32(0x00004000)
802#define TX_PIN_CFG_LNA_PE_G1_POL FIELD32(0x00008000)
803#define TX_PIN_CFG_RFTR_EN FIELD32(0x00010000)
804#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
805#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
806#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
807
808/*
809 * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
810 */
811#define TX_BAND_CFG 0x132c
812#define TX_BAND_CFG_HT40_PLUS FIELD32(0x00000001)
813#define TX_BAND_CFG_A FIELD32(0x00000002)
814#define TX_BAND_CFG_BG FIELD32(0x00000004)
815
816/*
817 * TX_SW_CFG0:
818 */
819#define TX_SW_CFG0 0x1330
820
821/*
822 * TX_SW_CFG1:
823 */
824#define TX_SW_CFG1 0x1334
825
826/*
827 * TX_SW_CFG2:
828 */
829#define TX_SW_CFG2 0x1338
830
831/*
832 * TXOP_THRES_CFG:
833 */
834#define TXOP_THRES_CFG 0x133c
835
836/*
837 * TXOP_CTRL_CFG:
838 */
839#define TXOP_CTRL_CFG 0x1340
840
841/*
842 * TX_RTS_CFG:
843 * RTS_THRES: unit:byte
844 * RTS_FBK_EN: enable rts rate fallback
845 */
846#define TX_RTS_CFG 0x1344
847#define TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT FIELD32(0x000000ff)
848#define TX_RTS_CFG_RTS_THRES FIELD32(0x00ffff00)
849#define TX_RTS_CFG_RTS_FBK_EN FIELD32(0x01000000)
850
851/*
852 * TX_TIMEOUT_CFG:
853 * MPDU_LIFETIME: expiration time = 2^(9+MPDU LIFE TIME) us
854 * RX_ACK_TIMEOUT: unit:slot. Used for TX procedure
855 * TX_OP_TIMEOUT: TXOP timeout value for TXOP truncation.
856 * it is recommended that:
857 * (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
858 */
859#define TX_TIMEOUT_CFG 0x1348
860#define TX_TIMEOUT_CFG_MPDU_LIFETIME FIELD32(0x000000f0)
861#define TX_TIMEOUT_CFG_RX_ACK_TIMEOUT FIELD32(0x0000ff00)
862#define TX_TIMEOUT_CFG_TX_OP_TIMEOUT FIELD32(0x00ff0000)
863
864/*
865 * TX_RTY_CFG:
866 * SHORT_RTY_LIMIT: short retry limit
867 * LONG_RTY_LIMIT: long retry limit
868 * LONG_RTY_THRE: Long retry threshoold
869 * NON_AGG_RTY_MODE: Non-Aggregate MPDU retry mode
870 * 0:expired by retry limit, 1: expired by mpdu life timer
871 * AGG_RTY_MODE: Aggregate MPDU retry mode
872 * 0:expired by retry limit, 1: expired by mpdu life timer
873 * TX_AUTO_FB_ENABLE: Tx retry PHY rate auto fallback enable
874 */
875#define TX_RTY_CFG 0x134c
876#define TX_RTY_CFG_SHORT_RTY_LIMIT FIELD32(0x000000ff)
877#define TX_RTY_CFG_LONG_RTY_LIMIT FIELD32(0x0000ff00)
878#define TX_RTY_CFG_LONG_RTY_THRE FIELD32(0x0fff0000)
879#define TX_RTY_CFG_NON_AGG_RTY_MODE FIELD32(0x10000000)
880#define TX_RTY_CFG_AGG_RTY_MODE FIELD32(0x20000000)
881#define TX_RTY_CFG_TX_AUTO_FB_ENABLE FIELD32(0x40000000)
882
883/*
884 * TX_LINK_CFG:
885 * REMOTE_MFB_LIFETIME: remote MFB life time. unit: 32us
886 * MFB_ENABLE: TX apply remote MFB 1:enable
887 * REMOTE_UMFS_ENABLE: remote unsolicit MFB enable
888 * 0: not apply remote remote unsolicit (MFS=7)
889 * TX_MRQ_EN: MCS request TX enable
890 * TX_RDG_EN: RDG TX enable
891 * TX_CF_ACK_EN: Piggyback CF-ACK enable
892 * REMOTE_MFB: remote MCS feedback
893 * REMOTE_MFS: remote MCS feedback sequence number
894 */
895#define TX_LINK_CFG 0x1350
896#define TX_LINK_CFG_REMOTE_MFB_LIFETIME FIELD32(0x000000ff)
897#define TX_LINK_CFG_MFB_ENABLE FIELD32(0x00000100)
898#define TX_LINK_CFG_REMOTE_UMFS_ENABLE FIELD32(0x00000200)
899#define TX_LINK_CFG_TX_MRQ_EN FIELD32(0x00000400)
900#define TX_LINK_CFG_TX_RDG_EN FIELD32(0x00000800)
901#define TX_LINK_CFG_TX_CF_ACK_EN FIELD32(0x00001000)
902#define TX_LINK_CFG_REMOTE_MFB FIELD32(0x00ff0000)
903#define TX_LINK_CFG_REMOTE_MFS FIELD32(0xff000000)
904
905/*
906 * HT_FBK_CFG0:
907 */
908#define HT_FBK_CFG0 0x1354
909#define HT_FBK_CFG0_HTMCS0FBK FIELD32(0x0000000f)
910#define HT_FBK_CFG0_HTMCS1FBK FIELD32(0x000000f0)
911#define HT_FBK_CFG0_HTMCS2FBK FIELD32(0x00000f00)
912#define HT_FBK_CFG0_HTMCS3FBK FIELD32(0x0000f000)
913#define HT_FBK_CFG0_HTMCS4FBK FIELD32(0x000f0000)
914#define HT_FBK_CFG0_HTMCS5FBK FIELD32(0x00f00000)
915#define HT_FBK_CFG0_HTMCS6FBK FIELD32(0x0f000000)
916#define HT_FBK_CFG0_HTMCS7FBK FIELD32(0xf0000000)
917
918/*
919 * HT_FBK_CFG1:
920 */
921#define HT_FBK_CFG1 0x1358
922#define HT_FBK_CFG1_HTMCS8FBK FIELD32(0x0000000f)
923#define HT_FBK_CFG1_HTMCS9FBK FIELD32(0x000000f0)
924#define HT_FBK_CFG1_HTMCS10FBK FIELD32(0x00000f00)
925#define HT_FBK_CFG1_HTMCS11FBK FIELD32(0x0000f000)
926#define HT_FBK_CFG1_HTMCS12FBK FIELD32(0x000f0000)
927#define HT_FBK_CFG1_HTMCS13FBK FIELD32(0x00f00000)
928#define HT_FBK_CFG1_HTMCS14FBK FIELD32(0x0f000000)
929#define HT_FBK_CFG1_HTMCS15FBK FIELD32(0xf0000000)
930
931/*
932 * LG_FBK_CFG0:
933 */
934#define LG_FBK_CFG0 0x135c
935#define LG_FBK_CFG0_OFDMMCS0FBK FIELD32(0x0000000f)
936#define LG_FBK_CFG0_OFDMMCS1FBK FIELD32(0x000000f0)
937#define LG_FBK_CFG0_OFDMMCS2FBK FIELD32(0x00000f00)
938#define LG_FBK_CFG0_OFDMMCS3FBK FIELD32(0x0000f000)
939#define LG_FBK_CFG0_OFDMMCS4FBK FIELD32(0x000f0000)
940#define LG_FBK_CFG0_OFDMMCS5FBK FIELD32(0x00f00000)
941#define LG_FBK_CFG0_OFDMMCS6FBK FIELD32(0x0f000000)
942#define LG_FBK_CFG0_OFDMMCS7FBK FIELD32(0xf0000000)
943
944/*
945 * LG_FBK_CFG1:
946 */
947#define LG_FBK_CFG1 0x1360
948#define LG_FBK_CFG0_CCKMCS0FBK FIELD32(0x0000000f)
949#define LG_FBK_CFG0_CCKMCS1FBK FIELD32(0x000000f0)
950#define LG_FBK_CFG0_CCKMCS2FBK FIELD32(0x00000f00)
951#define LG_FBK_CFG0_CCKMCS3FBK FIELD32(0x0000f000)
952
953/*
954 * CCK_PROT_CFG: CCK Protection
955 * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
956 * PROTECT_CTRL: Protection control frame type for CCK TX
957 * 0:none, 1:RTS/CTS, 2:CTS-to-self
958 * PROTECT_NAV: TXOP protection type for CCK TX
959 * 0:none, 1:ShortNAVprotect, 2:LongNAVProtect
960 * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
961 * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
962 * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
963 * TX_OP_ALLOW_MM40: CCK TXOP allowance, 0:disallow
964 * TX_OP_ALLOW_GF20: CCK TXOP allowance, 0:disallow
965 * TX_OP_ALLOW_GF40: CCK TXOP allowance, 0:disallow
966 * RTS_TH_EN: RTS threshold enable on CCK TX
967 */
968#define CCK_PROT_CFG 0x1364
969#define CCK_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
970#define CCK_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
971#define CCK_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
972#define CCK_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
973#define CCK_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
974#define CCK_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
975#define CCK_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
976#define CCK_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
977#define CCK_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
978#define CCK_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
979
980/*
981 * OFDM_PROT_CFG: OFDM Protection
982 */
983#define OFDM_PROT_CFG 0x1368
984#define OFDM_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
985#define OFDM_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
986#define OFDM_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
987#define OFDM_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
988#define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
989#define OFDM_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
990#define OFDM_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
991#define OFDM_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
992#define OFDM_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
993#define OFDM_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
994
995/*
996 * MM20_PROT_CFG: MM20 Protection
997 */
998#define MM20_PROT_CFG 0x136c
999#define MM20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1000#define MM20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1001#define MM20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1002#define MM20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1003#define MM20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1004#define MM20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1005#define MM20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1006#define MM20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1007#define MM20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1008#define MM20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1009
1010/*
1011 * MM40_PROT_CFG: MM40 Protection
1012 */
1013#define MM40_PROT_CFG 0x1370
1014#define MM40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1015#define MM40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1016#define MM40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1017#define MM40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1018#define MM40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1019#define MM40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1020#define MM40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1021#define MM40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1022#define MM40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1023#define MM40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1024
1025/*
1026 * GF20_PROT_CFG: GF20 Protection
1027 */
1028#define GF20_PROT_CFG 0x1374
1029#define GF20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1030#define GF20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1031#define GF20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1032#define GF20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1033#define GF20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1034#define GF20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1035#define GF20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1036#define GF20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1037#define GF20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1038#define GF20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1039
1040/*
1041 * GF40_PROT_CFG: GF40 Protection
1042 */
1043#define GF40_PROT_CFG 0x1378
1044#define GF40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1045#define GF40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1046#define GF40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1047#define GF40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1048#define GF40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1049#define GF40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1050#define GF40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1051#define GF40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1052#define GF40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1053#define GF40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1054
1055/*
1056 * EXP_CTS_TIME:
1057 */
1058#define EXP_CTS_TIME 0x137c
1059
1060/*
1061 * EXP_ACK_TIME:
1062 */
1063#define EXP_ACK_TIME 0x1380
1064
1065/*
1066 * RX_FILTER_CFG: RX configuration register.
1067 */
1068#define RX_FILTER_CFG 0x1400
1069#define RX_FILTER_CFG_DROP_CRC_ERROR FIELD32(0x00000001)
1070#define RX_FILTER_CFG_DROP_PHY_ERROR FIELD32(0x00000002)
1071#define RX_FILTER_CFG_DROP_NOT_TO_ME FIELD32(0x00000004)
1072#define RX_FILTER_CFG_DROP_NOT_MY_BSSD FIELD32(0x00000008)
1073#define RX_FILTER_CFG_DROP_VER_ERROR FIELD32(0x00000010)
1074#define RX_FILTER_CFG_DROP_MULTICAST FIELD32(0x00000020)
1075#define RX_FILTER_CFG_DROP_BROADCAST FIELD32(0x00000040)
1076#define RX_FILTER_CFG_DROP_DUPLICATE FIELD32(0x00000080)
1077#define RX_FILTER_CFG_DROP_CF_END_ACK FIELD32(0x00000100)
1078#define RX_FILTER_CFG_DROP_CF_END FIELD32(0x00000200)
1079#define RX_FILTER_CFG_DROP_ACK FIELD32(0x00000400)
1080#define RX_FILTER_CFG_DROP_CTS FIELD32(0x00000800)
1081#define RX_FILTER_CFG_DROP_RTS FIELD32(0x00001000)
1082#define RX_FILTER_CFG_DROP_PSPOLL FIELD32(0x00002000)
1083#define RX_FILTER_CFG_DROP_BA FIELD32(0x00004000)
1084#define RX_FILTER_CFG_DROP_BAR FIELD32(0x00008000)
1085#define RX_FILTER_CFG_DROP_CNTL FIELD32(0x00010000)
1086
1087/*
1088 * AUTO_RSP_CFG:
1089 * AUTORESPONDER: 0: disable, 1: enable
1090 * BAC_ACK_POLICY: 0:long, 1:short preamble
1091 * CTS_40_MMODE: Response CTS 40MHz duplicate mode
1092 * CTS_40_MREF: Response CTS 40MHz duplicate mode
1093 * AR_PREAMBLE: Auto responder preamble 0:long, 1:short preamble
1094 * DUAL_CTS_EN: Power bit value in control frame
1095 * ACK_CTS_PSM_BIT:Power bit value in control frame
1096 */
1097#define AUTO_RSP_CFG 0x1404
1098#define AUTO_RSP_CFG_AUTORESPONDER FIELD32(0x00000001)
1099#define AUTO_RSP_CFG_BAC_ACK_POLICY FIELD32(0x00000002)
1100#define AUTO_RSP_CFG_CTS_40_MMODE FIELD32(0x00000004)
1101#define AUTO_RSP_CFG_CTS_40_MREF FIELD32(0x00000008)
1102#define AUTO_RSP_CFG_AR_PREAMBLE FIELD32(0x00000010)
1103#define AUTO_RSP_CFG_DUAL_CTS_EN FIELD32(0x00000040)
1104#define AUTO_RSP_CFG_ACK_CTS_PSM_BIT FIELD32(0x00000080)
1105
1106/*
1107 * LEGACY_BASIC_RATE:
1108 */
1109#define LEGACY_BASIC_RATE 0x1408
1110
1111/*
1112 * HT_BASIC_RATE:
1113 */
1114#define HT_BASIC_RATE 0x140c
1115
1116/*
1117 * HT_CTRL_CFG:
1118 */
1119#define HT_CTRL_CFG 0x1410
1120
1121/*
1122 * SIFS_COST_CFG:
1123 */
1124#define SIFS_COST_CFG 0x1414
1125
1126/*
1127 * RX_PARSER_CFG:
1128 * Set NAV for all received frames
1129 */
1130#define RX_PARSER_CFG 0x1418
1131
1132/*
1133 * TX_SEC_CNT0:
1134 */
1135#define TX_SEC_CNT0 0x1500
1136
1137/*
1138 * RX_SEC_CNT0:
1139 */
1140#define RX_SEC_CNT0 0x1504
1141
1142/*
1143 * CCMP_FC_MUTE:
1144 */
1145#define CCMP_FC_MUTE 0x1508
1146
1147/*
1148 * TXOP_HLDR_ADDR0:
1149 */
1150#define TXOP_HLDR_ADDR0 0x1600
1151
1152/*
1153 * TXOP_HLDR_ADDR1:
1154 */
1155#define TXOP_HLDR_ADDR1 0x1604
1156
1157/*
1158 * TXOP_HLDR_ET:
1159 */
1160#define TXOP_HLDR_ET 0x1608
1161
1162/*
1163 * QOS_CFPOLL_RA_DW0:
1164 */
1165#define QOS_CFPOLL_RA_DW0 0x160c
1166
1167/*
1168 * QOS_CFPOLL_RA_DW1:
1169 */
1170#define QOS_CFPOLL_RA_DW1 0x1610
1171
1172/*
1173 * QOS_CFPOLL_QC:
1174 */
1175#define QOS_CFPOLL_QC 0x1614
1176
1177/*
1178 * RX_STA_CNT0: RX PLCP error count & RX CRC error count
1179 */
1180#define RX_STA_CNT0 0x1700
1181#define RX_STA_CNT0_CRC_ERR FIELD32(0x0000ffff)
1182#define RX_STA_CNT0_PHY_ERR FIELD32(0xffff0000)
1183
1184/*
1185 * RX_STA_CNT1: RX False CCA count & RX LONG frame count
1186 */
1187#define RX_STA_CNT1 0x1704
1188#define RX_STA_CNT1_FALSE_CCA FIELD32(0x0000ffff)
1189#define RX_STA_CNT1_PLCP_ERR FIELD32(0xffff0000)
1190
1191/*
1192 * RX_STA_CNT2:
1193 */
1194#define RX_STA_CNT2 0x1708
1195#define RX_STA_CNT2_RX_DUPLI_COUNT FIELD32(0x0000ffff)
1196#define RX_STA_CNT2_RX_FIFO_OVERFLOW FIELD32(0xffff0000)
1197
1198/*
1199 * TX_STA_CNT0: TX Beacon count
1200 */
1201#define TX_STA_CNT0 0x170c
1202#define TX_STA_CNT0_TX_FAIL_COUNT FIELD32(0x0000ffff)
1203#define TX_STA_CNT0_TX_BEACON_COUNT FIELD32(0xffff0000)
1204
1205/*
1206 * TX_STA_CNT1: TX tx count
1207 */
1208#define TX_STA_CNT1 0x1710
1209#define TX_STA_CNT1_TX_SUCCESS FIELD32(0x0000ffff)
1210#define TX_STA_CNT1_TX_RETRANSMIT FIELD32(0xffff0000)
1211
1212/*
1213 * TX_STA_CNT2: TX tx count
1214 */
1215#define TX_STA_CNT2 0x1714
1216#define TX_STA_CNT2_TX_ZERO_LEN_COUNT FIELD32(0x0000ffff)
1217#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
1218
1219/*
1220 * TX_STA_FIFO: TX Result for specific PID status fifo register
1221 */
1222#define TX_STA_FIFO 0x1718
1223#define TX_STA_FIFO_VALID FIELD32(0x00000001)
1224#define TX_STA_FIFO_PID_TYPE FIELD32(0x0000001e)
1225#define TX_STA_FIFO_TX_SUCCESS FIELD32(0x00000020)
1226#define TX_STA_FIFO_TX_AGGRE FIELD32(0x00000040)
1227#define TX_STA_FIFO_TX_ACK_REQUIRED FIELD32(0x00000080)
1228#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
1229#define TX_STA_FIFO_SUCCESS_RATE FIELD32(0xffff0000)
1230#define TX_STA_FIFO_MCS FIELD32(0x007f0000)
1231#define TX_STA_FIFO_PHYMODE FIELD32(0xc0000000)
1232
1233/*
1234 * TX_AGG_CNT: Debug counter
1235 */
1236#define TX_AGG_CNT 0x171c
1237#define TX_AGG_CNT_NON_AGG_TX_COUNT FIELD32(0x0000ffff)
1238#define TX_AGG_CNT_AGG_TX_COUNT FIELD32(0xffff0000)
1239
1240/*
1241 * TX_AGG_CNT0:
1242 */
1243#define TX_AGG_CNT0 0x1720
1244#define TX_AGG_CNT0_AGG_SIZE_1_COUNT FIELD32(0x0000ffff)
1245#define TX_AGG_CNT0_AGG_SIZE_2_COUNT FIELD32(0xffff0000)
1246
1247/*
1248 * TX_AGG_CNT1:
1249 */
1250#define TX_AGG_CNT1 0x1724
1251#define TX_AGG_CNT1_AGG_SIZE_3_COUNT FIELD32(0x0000ffff)
1252#define TX_AGG_CNT1_AGG_SIZE_4_COUNT FIELD32(0xffff0000)
1253
1254/*
1255 * TX_AGG_CNT2:
1256 */
1257#define TX_AGG_CNT2 0x1728
1258#define TX_AGG_CNT2_AGG_SIZE_5_COUNT FIELD32(0x0000ffff)
1259#define TX_AGG_CNT2_AGG_SIZE_6_COUNT FIELD32(0xffff0000)
1260
1261/*
1262 * TX_AGG_CNT3:
1263 */
1264#define TX_AGG_CNT3 0x172c
1265#define TX_AGG_CNT3_AGG_SIZE_7_COUNT FIELD32(0x0000ffff)
1266#define TX_AGG_CNT3_AGG_SIZE_8_COUNT FIELD32(0xffff0000)
1267
1268/*
1269 * TX_AGG_CNT4:
1270 */
1271#define TX_AGG_CNT4 0x1730
1272#define TX_AGG_CNT4_AGG_SIZE_9_COUNT FIELD32(0x0000ffff)
1273#define TX_AGG_CNT4_AGG_SIZE_10_COUNT FIELD32(0xffff0000)
1274
1275/*
1276 * TX_AGG_CNT5:
1277 */
1278#define TX_AGG_CNT5 0x1734
1279#define TX_AGG_CNT5_AGG_SIZE_11_COUNT FIELD32(0x0000ffff)
1280#define TX_AGG_CNT5_AGG_SIZE_12_COUNT FIELD32(0xffff0000)
1281
1282/*
1283 * TX_AGG_CNT6:
1284 */
1285#define TX_AGG_CNT6 0x1738
1286#define TX_AGG_CNT6_AGG_SIZE_13_COUNT FIELD32(0x0000ffff)
1287#define TX_AGG_CNT6_AGG_SIZE_14_COUNT FIELD32(0xffff0000)
1288
1289/*
1290 * TX_AGG_CNT7:
1291 */
1292#define TX_AGG_CNT7 0x173c
1293#define TX_AGG_CNT7_AGG_SIZE_15_COUNT FIELD32(0x0000ffff)
1294#define TX_AGG_CNT7_AGG_SIZE_16_COUNT FIELD32(0xffff0000)
1295
1296/*
1297 * MPDU_DENSITY_CNT:
1298 * TX_ZERO_DEL: TX zero length delimiter count
1299 * RX_ZERO_DEL: RX zero length delimiter count
1300 */
1301#define MPDU_DENSITY_CNT 0x1740
1302#define MPDU_DENSITY_CNT_TX_ZERO_DEL FIELD32(0x0000ffff)
1303#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
1304
1305/*
1306 * Security key table memory.
1307 * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
1308 * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
1309 * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
1310 * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
1311 * SHARED_KEY_TABLE_BASE: 32-byte * 16-entry
1312 * SHARED_KEY_MODE_BASE: 4-byte * 16-entry
1313 */
1314#define MAC_WCID_BASE 0x1800
1315#define PAIRWISE_KEY_TABLE_BASE 0x4000
1316#define MAC_IVEIV_TABLE_BASE 0x6000
1317#define MAC_WCID_ATTRIBUTE_BASE 0x6800
1318#define SHARED_KEY_TABLE_BASE 0x6c00
1319#define SHARED_KEY_MODE_BASE 0x7000
1320
1321#define MAC_WCID_ENTRY(__idx) \
1322 ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
1323#define PAIRWISE_KEY_ENTRY(__idx) \
1324 ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1325#define MAC_IVEIV_ENTRY(__idx) \
1326 ( MAC_IVEIV_TABLE_BASE + ((__idx) * sizeof(struct mac_iveiv_entry)) )
1327#define MAC_WCID_ATTR_ENTRY(__idx) \
1328 ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
1329#define SHARED_KEY_ENTRY(__idx) \
1330 ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1331#define SHARED_KEY_MODE_ENTRY(__idx) \
1332 ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
1333
1334struct mac_wcid_entry {
1335 u8 mac[6];
1336 u8 reserved[2];
1337} __attribute__ ((packed));
1338
1339struct hw_key_entry {
1340 u8 key[16];
1341 u8 tx_mic[8];
1342 u8 rx_mic[8];
1343} __attribute__ ((packed));
1344
1345struct mac_iveiv_entry {
1346 u8 iv[8];
1347} __attribute__ ((packed));
1348
1349/*
1350 * MAC_WCID_ATTRIBUTE:
1351 */
1352#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
1353#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
1354#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
1355#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
1356
1357/*
1358 * SHARED_KEY_MODE:
1359 */
1360#define SHARED_KEY_MODE_BSS0_KEY0 FIELD32(0x00000007)
1361#define SHARED_KEY_MODE_BSS0_KEY1 FIELD32(0x00000070)
1362#define SHARED_KEY_MODE_BSS0_KEY2 FIELD32(0x00000700)
1363#define SHARED_KEY_MODE_BSS0_KEY3 FIELD32(0x00007000)
1364#define SHARED_KEY_MODE_BSS1_KEY0 FIELD32(0x00070000)
1365#define SHARED_KEY_MODE_BSS1_KEY1 FIELD32(0x00700000)
1366#define SHARED_KEY_MODE_BSS1_KEY2 FIELD32(0x07000000)
1367#define SHARED_KEY_MODE_BSS1_KEY3 FIELD32(0x70000000)
1368
1369/*
1370 * HOST-MCU communication
1371 */
1372
1373/*
1374 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
1375 */
1376#define H2M_MAILBOX_CSR 0x7010
1377#define H2M_MAILBOX_CSR_ARG0 FIELD32(0x000000ff)
1378#define H2M_MAILBOX_CSR_ARG1 FIELD32(0x0000ff00)
1379#define H2M_MAILBOX_CSR_CMD_TOKEN FIELD32(0x00ff0000)
1380#define H2M_MAILBOX_CSR_OWNER FIELD32(0xff000000)
1381
1382/*
1383 * H2M_MAILBOX_CID:
1384 */
1385#define H2M_MAILBOX_CID 0x7014
1386#define H2M_MAILBOX_CID_CMD0 FIELD32(0x000000ff)
1387#define H2M_MAILBOX_CID_CMD1 FIELD32(0x0000ff00)
1388#define H2M_MAILBOX_CID_CMD2 FIELD32(0x00ff0000)
1389#define H2M_MAILBOX_CID_CMD3 FIELD32(0xff000000)
1390
1391/*
1392 * H2M_MAILBOX_STATUS:
1393 */
1394#define H2M_MAILBOX_STATUS 0x701c
1395
1396/*
1397 * H2M_INT_SRC:
1398 */
1399#define H2M_INT_SRC 0x7024
1400
1401/*
1402 * H2M_BBP_AGENT:
1403 */
1404#define H2M_BBP_AGENT 0x7028
1405
1406/*
1407 * MCU_LEDCS: LED control for MCU Mailbox.
1408 */
1409#define MCU_LEDCS_LED_MODE FIELD8(0x1f)
1410#define MCU_LEDCS_POLARITY FIELD8(0x01)
1411
1412/*
1413 * HW_CS_CTS_BASE:
1414 * Carrier-sense CTS frame base address.
1415 * It's where mac stores carrier-sense frame for carrier-sense function.
1416 */
1417#define HW_CS_CTS_BASE 0x7700
1418
1419/*
1420 * HW_DFS_CTS_BASE:
1421 * DFS CTS frame base address. It's where mac stores CTS frame for DFS.
1422 */
1423#define HW_DFS_CTS_BASE 0x7780
1424
1425/*
1426 * TXRX control registers - base address 0x3000
1427 */
1428
1429/*
1430 * TXRX_CSR1:
1431 * rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
1432 */
1433#define TXRX_CSR1 0x77d0
1434
1435/*
1436 * HW_DEBUG_SETTING_BASE:
1437 * since NULL frame won't be that long (256 byte)
1438 * We steal 16 tail bytes to save debugging settings
1439 */
1440#define HW_DEBUG_SETTING_BASE 0x77f0
1441#define HW_DEBUG_SETTING_BASE2 0x7770
1442
1443/*
1444 * HW_BEACON_BASE
1445 * In order to support maximum 8 MBSS and its maximum length
1446 * is 512 bytes for each beacon
1447 * Three section discontinue memory segments will be used.
1448 * 1. The original region for BCN 0~3
1449 * 2. Extract memory from FCE table for BCN 4~5
1450 * 3. Extract memory from Pair-wise key table for BCN 6~7
1451 * It occupied those memory of wcid 238~253 for BCN 6
1452 * and wcid 222~237 for BCN 7
1453 *
1454 * IMPORTANT NOTE: Not sure why legacy driver does this,
1455 * but HW_BEACON_BASE7 is 0x0200 bytes below HW_BEACON_BASE6.
1456 */
1457#define HW_BEACON_BASE0 0x7800
1458#define HW_BEACON_BASE1 0x7a00
1459#define HW_BEACON_BASE2 0x7c00
1460#define HW_BEACON_BASE3 0x7e00
1461#define HW_BEACON_BASE4 0x7200
1462#define HW_BEACON_BASE5 0x7400
1463#define HW_BEACON_BASE6 0x5dc0
1464#define HW_BEACON_BASE7 0x5bc0
1465
1466#define HW_BEACON_OFFSET(__index) \
1467 ( ((__index) < 4) ? ( HW_BEACON_BASE0 + (__index * 0x0200) ) : \
1468 (((__index) < 6) ? ( HW_BEACON_BASE4 + ((__index - 4) * 0x0200) ) : \
1469 (HW_BEACON_BASE6 - ((__index - 6) * 0x0200))) )
1470
1471/*
1472 * BBP registers.
1473 * The wordsize of the BBP is 8 bits.
1474 */
1475
1476/*
1477 * BBP 1: TX Antenna
1478 */
1479#define BBP1_TX_POWER FIELD8(0x07)
1480#define BBP1_TX_ANTENNA FIELD8(0x18)
1481
1482/*
1483 * BBP 3: RX Antenna
1484 */
1485#define BBP3_RX_ANTENNA FIELD8(0x18)
1486#define BBP3_HT40_PLUS FIELD8(0x20)
1487
1488/*
1489 * BBP 4: Bandwidth
1490 */
1491#define BBP4_TX_BF FIELD8(0x01)
1492#define BBP4_BANDWIDTH FIELD8(0x18)
1493
1494/*
1495 * RFCSR registers
1496 * The wordsize of the RFCSR is 8 bits.
1497 */
1498
1499/*
1500 * RFCSR 6:
1501 */
1502#define RFCSR6_R FIELD8(0x03)
1503
1504/*
1505 * RFCSR 7:
1506 */
1507#define RFCSR7_RF_TUNING FIELD8(0x01)
1508
1509/*
1510 * RFCSR 12:
1511 */
1512#define RFCSR12_TX_POWER FIELD8(0x1f)
1513
1514/*
1515 * RFCSR 22:
1516 */
1517#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
1518
1519/*
1520 * RFCSR 23:
1521 */
1522#define RFCSR23_FREQ_OFFSET FIELD8(0x7f)
1523
1524/*
1525 * RFCSR 30:
1526 */
1527#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
1528
1529/*
1530 * RF registers
1531 */
1532
1533/*
1534 * RF 2
1535 */
1536#define RF2_ANTENNA_RX2 FIELD32(0x00000040)
1537#define RF2_ANTENNA_TX1 FIELD32(0x00004000)
1538#define RF2_ANTENNA_RX1 FIELD32(0x00020000)
1539
1540/*
1541 * RF 3
1542 */
1543#define RF3_TXPOWER_G FIELD32(0x00003e00)
1544#define RF3_TXPOWER_A_7DBM_BOOST FIELD32(0x00000200)
1545#define RF3_TXPOWER_A FIELD32(0x00003c00)
1546
1547/*
1548 * RF 4
1549 */
1550#define RF4_TXPOWER_G FIELD32(0x000007c0)
1551#define RF4_TXPOWER_A_7DBM_BOOST FIELD32(0x00000040)
1552#define RF4_TXPOWER_A FIELD32(0x00000780)
1553#define RF4_FREQ_OFFSET FIELD32(0x001f8000)
1554#define RF4_HT40 FIELD32(0x00200000)
1555
1556/*
1557 * EEPROM content.
1558 * The wordsize of the EEPROM is 16 bits.
1559 */
1560
1561/*
1562 * EEPROM Version
1563 */
1564#define EEPROM_VERSION 0x0001
1565#define EEPROM_VERSION_FAE FIELD16(0x00ff)
1566#define EEPROM_VERSION_VERSION FIELD16(0xff00)
1567
1568/*
1569 * HW MAC address.
1570 */
1571#define EEPROM_MAC_ADDR_0 0x0002
1572#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
1573#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
1574#define EEPROM_MAC_ADDR_1 0x0003
1575#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
1576#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
1577#define EEPROM_MAC_ADDR_2 0x0004
1578#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
1579#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
1580
1581/*
1582 * EEPROM ANTENNA config
1583 * RXPATH: 1: 1R, 2: 2R, 3: 3R
1584 * TXPATH: 1: 1T, 2: 2T
1585 */
1586#define EEPROM_ANTENNA 0x001a
1587#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f)
1588#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0)
1589#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00)
1590
1591/*
1592 * EEPROM NIC config
1593 * CARDBUS_ACCEL: 0 - enable, 1 - disable
1594 */
1595#define EEPROM_NIC 0x001b
1596#define EEPROM_NIC_HW_RADIO FIELD16(0x0001)
1597#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002)
1598#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004)
1599#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008)
1600#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010)
1601#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020)
1602#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040)
1603#define EEPROM_NIC_WPS_PBC FIELD16(0x0080)
1604#define EEPROM_NIC_BW40M_BG FIELD16(0x0100)
1605#define EEPROM_NIC_BW40M_A FIELD16(0x0200)
1606
1607/*
1608 * EEPROM frequency
1609 */
1610#define EEPROM_FREQ 0x001d
1611#define EEPROM_FREQ_OFFSET FIELD16(0x00ff)
1612#define EEPROM_FREQ_LED_MODE FIELD16(0x7f00)
1613#define EEPROM_FREQ_LED_POLARITY FIELD16(0x1000)
1614
1615/*
1616 * EEPROM LED
1617 * POLARITY_RDY_G: Polarity RDY_G setting.
1618 * POLARITY_RDY_A: Polarity RDY_A setting.
1619 * POLARITY_ACT: Polarity ACT setting.
1620 * POLARITY_GPIO_0: Polarity GPIO0 setting.
1621 * POLARITY_GPIO_1: Polarity GPIO1 setting.
1622 * POLARITY_GPIO_2: Polarity GPIO2 setting.
1623 * POLARITY_GPIO_3: Polarity GPIO3 setting.
1624 * POLARITY_GPIO_4: Polarity GPIO4 setting.
1625 * LED_MODE: Led mode.
1626 */
1627#define EEPROM_LED1 0x001e
1628#define EEPROM_LED2 0x001f
1629#define EEPROM_LED3 0x0020
1630#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
1631#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
1632#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
1633#define EEPROM_LED_POLARITY_GPIO_0 FIELD16(0x0008)
1634#define EEPROM_LED_POLARITY_GPIO_1 FIELD16(0x0010)
1635#define EEPROM_LED_POLARITY_GPIO_2 FIELD16(0x0020)
1636#define EEPROM_LED_POLARITY_GPIO_3 FIELD16(0x0040)
1637#define EEPROM_LED_POLARITY_GPIO_4 FIELD16(0x0080)
1638#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
1639
1640/*
1641 * EEPROM LNA
1642 */
1643#define EEPROM_LNA 0x0022
1644#define EEPROM_LNA_BG FIELD16(0x00ff)
1645#define EEPROM_LNA_A0 FIELD16(0xff00)
1646
1647/*
1648 * EEPROM RSSI BG offset
1649 */
1650#define EEPROM_RSSI_BG 0x0023
1651#define EEPROM_RSSI_BG_OFFSET0 FIELD16(0x00ff)
1652#define EEPROM_RSSI_BG_OFFSET1 FIELD16(0xff00)
1653
1654/*
1655 * EEPROM RSSI BG2 offset
1656 */
1657#define EEPROM_RSSI_BG2 0x0024
1658#define EEPROM_RSSI_BG2_OFFSET2 FIELD16(0x00ff)
1659#define EEPROM_RSSI_BG2_LNA_A1 FIELD16(0xff00)
1660
1661/*
1662 * EEPROM RSSI A offset
1663 */
1664#define EEPROM_RSSI_A 0x0025
1665#define EEPROM_RSSI_A_OFFSET0 FIELD16(0x00ff)
1666#define EEPROM_RSSI_A_OFFSET1 FIELD16(0xff00)
1667
1668/*
1669 * EEPROM RSSI A2 offset
1670 */
1671#define EEPROM_RSSI_A2 0x0026
1672#define EEPROM_RSSI_A2_OFFSET2 FIELD16(0x00ff)
1673#define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00)
1674
1675/*
1676 * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
1677 * This is delta in 40MHZ.
1678 * VALUE: Tx Power dalta value (MAX=4)
1679 * TYPE: 1: Plus the delta value, 0: minus the delta value
1680 * TXPOWER: Enable:
1681 */
1682#define EEPROM_TXPOWER_DELTA 0x0028
1683#define EEPROM_TXPOWER_DELTA_VALUE FIELD16(0x003f)
1684#define EEPROM_TXPOWER_DELTA_TYPE FIELD16(0x0040)
1685#define EEPROM_TXPOWER_DELTA_TXPOWER FIELD16(0x0080)
1686
1687/*
1688 * EEPROM TXPOWER 802.11BG
1689 */
1690#define EEPROM_TXPOWER_BG1 0x0029
1691#define EEPROM_TXPOWER_BG2 0x0030
1692#define EEPROM_TXPOWER_BG_SIZE 7
1693#define EEPROM_TXPOWER_BG_1 FIELD16(0x00ff)
1694#define EEPROM_TXPOWER_BG_2 FIELD16(0xff00)
1695
1696/*
1697 * EEPROM TXPOWER 802.11A
1698 */
1699#define EEPROM_TXPOWER_A1 0x003c
1700#define EEPROM_TXPOWER_A2 0x0053
1701#define EEPROM_TXPOWER_A_SIZE 6
1702#define EEPROM_TXPOWER_A_1 FIELD16(0x00ff)
1703#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
1704
1705/*
1706 * EEPROM TXpower byrate: 20MHZ power
1707 */
1708#define EEPROM_TXPOWER_BYRATE 0x006f
1709
1710/*
1711 * EEPROM BBP.
1712 */
1713#define EEPROM_BBP_START 0x0078
1714#define EEPROM_BBP_SIZE 16
1715#define EEPROM_BBP_VALUE FIELD16(0x00ff)
1716#define EEPROM_BBP_REG_ID FIELD16(0xff00)
1717
1718/*
1719 * MCU mailbox commands.
1720 */
1721#define MCU_SLEEP 0x30
1722#define MCU_WAKEUP 0x31
1723#define MCU_RADIO_OFF 0x35
1724#define MCU_CURRENT 0x36
1725#define MCU_LED 0x50
1726#define MCU_LED_STRENGTH 0x51
1727#define MCU_LED_1 0x52
1728#define MCU_LED_2 0x53
1729#define MCU_LED_3 0x54
1730#define MCU_RADAR 0x60
1731#define MCU_BOOT_SIGNAL 0x72
1732#define MCU_BBP_SIGNAL 0x80
1733#define MCU_POWER_SAVE 0x83
1734
1735/*
1736 * MCU mailbox tokens
1737 */
1738#define TOKEN_WAKUP 3
1739
1740/*
1741 * DMA descriptor defines.
1742 */
1743#define TXWI_DESC_SIZE ( 4 * sizeof(__le32) )
1744#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) )
1745
1746/*
1747 * TX WI structure
1748 */
1749
1750/*
1751 * Word0
1752 * FRAG: 1 To inform TKIP engine this is a fragment.
1753 * MIMO_PS: The remote peer is in dynamic MIMO-PS mode
1754 * TX_OP: 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs
1755 * BW: Channel bandwidth 20MHz or 40 MHz
1756 * STBC: 1: STBC support MCS =0-7, 2,3 : RESERVED
1757 */
1758#define TXWI_W0_FRAG FIELD32(0x00000001)
1759#define TXWI_W0_MIMO_PS FIELD32(0x00000002)
1760#define TXWI_W0_CF_ACK FIELD32(0x00000004)
1761#define TXWI_W0_TS FIELD32(0x00000008)
1762#define TXWI_W0_AMPDU FIELD32(0x00000010)
1763#define TXWI_W0_MPDU_DENSITY FIELD32(0x000000e0)
1764#define TXWI_W0_TX_OP FIELD32(0x00000300)
1765#define TXWI_W0_MCS FIELD32(0x007f0000)
1766#define TXWI_W0_BW FIELD32(0x00800000)
1767#define TXWI_W0_SHORT_GI FIELD32(0x01000000)
1768#define TXWI_W0_STBC FIELD32(0x06000000)
1769#define TXWI_W0_IFS FIELD32(0x08000000)
1770#define TXWI_W0_PHYMODE FIELD32(0xc0000000)
1771
1772/*
1773 * Word1
1774 */
1775#define TXWI_W1_ACK FIELD32(0x00000001)
1776#define TXWI_W1_NSEQ FIELD32(0x00000002)
1777#define TXWI_W1_BW_WIN_SIZE FIELD32(0x000000fc)
1778#define TXWI_W1_WIRELESS_CLI_ID FIELD32(0x0000ff00)
1779#define TXWI_W1_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
1780#define TXWI_W1_PACKETID FIELD32(0xf0000000)
1781
1782/*
1783 * Word2
1784 */
1785#define TXWI_W2_IV FIELD32(0xffffffff)
1786
1787/*
1788 * Word3
1789 */
1790#define TXWI_W3_EIV FIELD32(0xffffffff)
1791
1792/*
1793 * RX WI structure
1794 */
1795
1796/*
1797 * Word0
1798 */
1799#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
1800#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
1801#define RXWI_W0_BSSID FIELD32(0x00001c00)
1802#define RXWI_W0_UDF FIELD32(0x0000e000)
1803#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
1804#define RXWI_W0_TID FIELD32(0xf0000000)
1805
1806/*
1807 * Word1
1808 */
1809#define RXWI_W1_FRAG FIELD32(0x0000000f)
1810#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
1811#define RXWI_W1_MCS FIELD32(0x007f0000)
1812#define RXWI_W1_BW FIELD32(0x00800000)
1813#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
1814#define RXWI_W1_STBC FIELD32(0x06000000)
1815#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
1816
1817/*
1818 * Word2
1819 */
1820#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
1821#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
1822#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
1823
1824/*
1825 * Word3
1826 */
1827#define RXWI_W3_SNR0 FIELD32(0x000000ff)
1828#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
1829
1830/*
1831 * Macros for converting txpower from EEPROM to mac80211 value
1832 * and from mac80211 value to register value.
1833 */
1834#define MIN_G_TXPOWER 0
1835#define MIN_A_TXPOWER -7
1836#define MAX_G_TXPOWER 31
1837#define MAX_A_TXPOWER 15
1838#define DEFAULT_TXPOWER 5
1839
1840#define TXPOWER_G_FROM_DEV(__txpower) \
1841 ((__txpower) > MAX_G_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
1842
1843#define TXPOWER_G_TO_DEV(__txpower) \
1844 clamp_t(char, __txpower, MIN_G_TXPOWER, MAX_G_TXPOWER)
1845
1846#define TXPOWER_A_FROM_DEV(__txpower) \
1847 ((__txpower) > MAX_A_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
1848
1849#define TXPOWER_A_TO_DEV(__txpower) \
1850 clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
1851
1852#endif /* RT2800_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
new file mode 100644
index 000000000000..c015ce9fdd09
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -0,0 +1,2325 @@
1/*
2 Copyright (C) 2009 Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
3 Copyright (C) 2009 Gertjan van Wingerde <gwingerde@gmail.com>
4
5 Based on the original rt2800pci.c and rt2800usb.c.
6 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
7 Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
8 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
9 Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
10 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
11 Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
12 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
13 <http://rt2x00.serialmonkey.com>
14
15 This program is free software; you can redistribute it and/or modify
16 it under the terms of the GNU General Public License as published by
17 the Free Software Foundation; either version 2 of the License, or
18 (at your option) any later version.
19
20 This program is distributed in the hope that it will be useful,
21 but WITHOUT ANY WARRANTY; without even the implied warranty of
22 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 GNU General Public License for more details.
24
25 You should have received a copy of the GNU General Public License
26 along with this program; if not, write to the
27 Free Software Foundation, Inc.,
28 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31/*
32 Module: rt2800lib
33 Abstract: rt2800 generic device routines.
34 */
35
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/slab.h>
39
40#include "rt2x00.h"
41#if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE)
42#include "rt2x00usb.h"
43#endif
44#if defined(CONFIG_RT2X00_LIB_PCI) || defined(CONFIG_RT2X00_LIB_PCI_MODULE)
45#include "rt2x00pci.h"
46#endif
47#include "rt2800lib.h"
48#include "rt2800.h"
49#include "rt2800usb.h"
50
51MODULE_AUTHOR("Bartlomiej Zolnierkiewicz");
52MODULE_DESCRIPTION("rt2800 library");
53MODULE_LICENSE("GPL");
54
55/*
56 * Register access.
57 * All access to the CSR registers will go through the methods
58 * rt2800_register_read and rt2800_register_write.
59 * BBP and RF register require indirect register access,
60 * and use the CSR registers BBPCSR and RFCSR to achieve this.
61 * These indirect registers work with busy bits,
62 * and we will try maximal REGISTER_BUSY_COUNT times to access
63 * the register while taking a REGISTER_BUSY_DELAY us delay
64 * between each attampt. When the busy bit is still set at that time,
65 * the access attempt is considered to have failed,
66 * and we will print an error.
67 * The _lock versions must be used if you already hold the csr_mutex
68 */
69#define WAIT_FOR_BBP(__dev, __reg) \
70 rt2800_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
71#define WAIT_FOR_RFCSR(__dev, __reg) \
72 rt2800_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
73#define WAIT_FOR_RF(__dev, __reg) \
74 rt2800_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
75#define WAIT_FOR_MCU(__dev, __reg) \
76 rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \
77 H2M_MAILBOX_CSR_OWNER, (__reg))
78
79static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev,
80 const unsigned int word, const u8 value)
81{
82 u32 reg;
83
84 mutex_lock(&rt2x00dev->csr_mutex);
85
86 /*
87 * Wait until the BBP becomes available, afterwards we
88 * can safely write the new data into the register.
89 */
90 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
91 reg = 0;
92 rt2x00_set_field32(&reg, BBP_CSR_CFG_VALUE, value);
93 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
94 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
95 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
96 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
97 rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
98
99 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
100 }
101
102 mutex_unlock(&rt2x00dev->csr_mutex);
103}
104
105static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev,
106 const unsigned int word, u8 *value)
107{
108 u32 reg;
109
110 mutex_lock(&rt2x00dev->csr_mutex);
111
112 /*
113 * Wait until the BBP becomes available, afterwards we
114 * can safely write the read request into the register.
115 * After the data has been written, we wait until hardware
116 * returns the correct value, if at any time the register
117 * doesn't become available in time, reg will be 0xffffffff
118 * which means we return 0xff to the caller.
119 */
120 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
121 reg = 0;
122 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
123 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
124 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
125 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
126 rt2x00_set_field32(&reg, BBP_CSR_CFG_BBP_RW_MODE, 1);
127
128 rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
129
130 WAIT_FOR_BBP(rt2x00dev, &reg);
131 }
132
133 *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
134
135 mutex_unlock(&rt2x00dev->csr_mutex);
136}
137
138static void rt2800_rfcsr_write(struct rt2x00_dev *rt2x00dev,
139 const unsigned int word, const u8 value)
140{
141 u32 reg;
142
143 mutex_lock(&rt2x00dev->csr_mutex);
144
145 /*
146 * Wait until the RFCSR becomes available, afterwards we
147 * can safely write the new data into the register.
148 */
149 if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
150 reg = 0;
151 rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
152 rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
153 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
154 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
155
156 rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
157 }
158
159 mutex_unlock(&rt2x00dev->csr_mutex);
160}
161
162static void rt2800_rfcsr_read(struct rt2x00_dev *rt2x00dev,
163 const unsigned int word, u8 *value)
164{
165 u32 reg;
166
167 mutex_lock(&rt2x00dev->csr_mutex);
168
169 /*
170 * Wait until the RFCSR becomes available, afterwards we
171 * can safely write the read request into the register.
172 * After the data has been written, we wait until hardware
173 * returns the correct value, if at any time the register
174 * doesn't become available in time, reg will be 0xffffffff
175 * which means we return 0xff to the caller.
176 */
177 if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
178 reg = 0;
179 rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
180 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
181 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
182
183 rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
184
185 WAIT_FOR_RFCSR(rt2x00dev, &reg);
186 }
187
188 *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
189
190 mutex_unlock(&rt2x00dev->csr_mutex);
191}
192
193static void rt2800_rf_write(struct rt2x00_dev *rt2x00dev,
194 const unsigned int word, const u32 value)
195{
196 u32 reg;
197
198 mutex_lock(&rt2x00dev->csr_mutex);
199
200 /*
201 * Wait until the RF becomes available, afterwards we
202 * can safely write the new data into the register.
203 */
204 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
205 reg = 0;
206 rt2x00_set_field32(&reg, RF_CSR_CFG0_REG_VALUE_BW, value);
207 rt2x00_set_field32(&reg, RF_CSR_CFG0_STANDBYMODE, 0);
208 rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
209 rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
210
211 rt2800_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
212 rt2x00_rf_write(rt2x00dev, word, value);
213 }
214
215 mutex_unlock(&rt2x00dev->csr_mutex);
216}
217
218void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
219 const u8 command, const u8 token,
220 const u8 arg0, const u8 arg1)
221{
222 u32 reg;
223
224 /*
225 * SOC devices don't support MCU requests.
226 */
227 if (rt2x00_is_soc(rt2x00dev))
228 return;
229
230 mutex_lock(&rt2x00dev->csr_mutex);
231
232 /*
233 * Wait until the MCU becomes available, afterwards we
234 * can safely write the new data into the register.
235 */
236 if (WAIT_FOR_MCU(rt2x00dev, &reg)) {
237 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_OWNER, 1);
238 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
239 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
240 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
241 rt2800_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
242
243 reg = 0;
244 rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
245 rt2800_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
246 }
247
248 mutex_unlock(&rt2x00dev->csr_mutex);
249}
250EXPORT_SYMBOL_GPL(rt2800_mcu_request);
251
252int rt2800_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
253{
254 unsigned int i;
255 u32 reg;
256
257 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
258 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
259 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
260 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
261 return 0;
262
263 msleep(1);
264 }
265
266 ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n");
267 return -EACCES;
268}
269EXPORT_SYMBOL_GPL(rt2800_wait_wpdma_ready);
270
271#ifdef CONFIG_RT2X00_LIB_DEBUGFS
272const struct rt2x00debug rt2800_rt2x00debug = {
273 .owner = THIS_MODULE,
274 .csr = {
275 .read = rt2800_register_read,
276 .write = rt2800_register_write,
277 .flags = RT2X00DEBUGFS_OFFSET,
278 .word_base = CSR_REG_BASE,
279 .word_size = sizeof(u32),
280 .word_count = CSR_REG_SIZE / sizeof(u32),
281 },
282 .eeprom = {
283 .read = rt2x00_eeprom_read,
284 .write = rt2x00_eeprom_write,
285 .word_base = EEPROM_BASE,
286 .word_size = sizeof(u16),
287 .word_count = EEPROM_SIZE / sizeof(u16),
288 },
289 .bbp = {
290 .read = rt2800_bbp_read,
291 .write = rt2800_bbp_write,
292 .word_base = BBP_BASE,
293 .word_size = sizeof(u8),
294 .word_count = BBP_SIZE / sizeof(u8),
295 },
296 .rf = {
297 .read = rt2x00_rf_read,
298 .write = rt2800_rf_write,
299 .word_base = RF_BASE,
300 .word_size = sizeof(u32),
301 .word_count = RF_SIZE / sizeof(u32),
302 },
303};
304EXPORT_SYMBOL_GPL(rt2800_rt2x00debug);
305#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
306
307int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev)
308{
309 u32 reg;
310
311 rt2800_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
312 return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
313}
314EXPORT_SYMBOL_GPL(rt2800_rfkill_poll);
315
316#ifdef CONFIG_RT2X00_LIB_LEDS
317static void rt2800_brightness_set(struct led_classdev *led_cdev,
318 enum led_brightness brightness)
319{
320 struct rt2x00_led *led =
321 container_of(led_cdev, struct rt2x00_led, led_dev);
322 unsigned int enabled = brightness != LED_OFF;
323 unsigned int bg_mode =
324 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
325 unsigned int polarity =
326 rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
327 EEPROM_FREQ_LED_POLARITY);
328 unsigned int ledmode =
329 rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
330 EEPROM_FREQ_LED_MODE);
331
332 if (led->type == LED_TYPE_RADIO) {
333 rt2800_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
334 enabled ? 0x20 : 0);
335 } else if (led->type == LED_TYPE_ASSOC) {
336 rt2800_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
337 enabled ? (bg_mode ? 0x60 : 0xa0) : 0x20);
338 } else if (led->type == LED_TYPE_QUALITY) {
339 /*
340 * The brightness is divided into 6 levels (0 - 5),
341 * The specs tell us the following levels:
342 * 0, 1 ,3, 7, 15, 31
343 * to determine the level in a simple way we can simply
344 * work with bitshifting:
345 * (1 << level) - 1
346 */
347 rt2800_mcu_request(led->rt2x00dev, MCU_LED_STRENGTH, 0xff,
348 (1 << brightness / (LED_FULL / 6)) - 1,
349 polarity);
350 }
351}
352
353static int rt2800_blink_set(struct led_classdev *led_cdev,
354 unsigned long *delay_on, unsigned long *delay_off)
355{
356 struct rt2x00_led *led =
357 container_of(led_cdev, struct rt2x00_led, led_dev);
358 u32 reg;
359
360 rt2800_register_read(led->rt2x00dev, LED_CFG, &reg);
361 rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
362 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
363 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
364 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
365 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 3);
366 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
367 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
368 rt2800_register_write(led->rt2x00dev, LED_CFG, reg);
369
370 return 0;
371}
372
373static void rt2800_init_led(struct rt2x00_dev *rt2x00dev,
374 struct rt2x00_led *led, enum led_type type)
375{
376 led->rt2x00dev = rt2x00dev;
377 led->type = type;
378 led->led_dev.brightness_set = rt2800_brightness_set;
379 led->led_dev.blink_set = rt2800_blink_set;
380 led->flags = LED_INITIALIZED;
381}
382#endif /* CONFIG_RT2X00_LIB_LEDS */
383
384/*
385 * Configuration handlers.
386 */
387static void rt2800_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
388 struct rt2x00lib_crypto *crypto,
389 struct ieee80211_key_conf *key)
390{
391 struct mac_wcid_entry wcid_entry;
392 struct mac_iveiv_entry iveiv_entry;
393 u32 offset;
394 u32 reg;
395
396 offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
397
398 rt2800_register_read(rt2x00dev, offset, &reg);
399 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
400 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
401 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
402 (crypto->cmd == SET_KEY) * crypto->cipher);
403 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
404 (crypto->cmd == SET_KEY) * crypto->bssidx);
405 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
406 rt2800_register_write(rt2x00dev, offset, reg);
407
408 offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
409
410 memset(&iveiv_entry, 0, sizeof(iveiv_entry));
411 if ((crypto->cipher == CIPHER_TKIP) ||
412 (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
413 (crypto->cipher == CIPHER_AES))
414 iveiv_entry.iv[3] |= 0x20;
415 iveiv_entry.iv[3] |= key->keyidx << 6;
416 rt2800_register_multiwrite(rt2x00dev, offset,
417 &iveiv_entry, sizeof(iveiv_entry));
418
419 offset = MAC_WCID_ENTRY(key->hw_key_idx);
420
421 memset(&wcid_entry, 0, sizeof(wcid_entry));
422 if (crypto->cmd == SET_KEY)
423 memcpy(&wcid_entry, crypto->address, ETH_ALEN);
424 rt2800_register_multiwrite(rt2x00dev, offset,
425 &wcid_entry, sizeof(wcid_entry));
426}
427
428int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
429 struct rt2x00lib_crypto *crypto,
430 struct ieee80211_key_conf *key)
431{
432 struct hw_key_entry key_entry;
433 struct rt2x00_field32 field;
434 u32 offset;
435 u32 reg;
436
437 if (crypto->cmd == SET_KEY) {
438 key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
439
440 memcpy(key_entry.key, crypto->key,
441 sizeof(key_entry.key));
442 memcpy(key_entry.tx_mic, crypto->tx_mic,
443 sizeof(key_entry.tx_mic));
444 memcpy(key_entry.rx_mic, crypto->rx_mic,
445 sizeof(key_entry.rx_mic));
446
447 offset = SHARED_KEY_ENTRY(key->hw_key_idx);
448 rt2800_register_multiwrite(rt2x00dev, offset,
449 &key_entry, sizeof(key_entry));
450 }
451
452 /*
453 * The cipher types are stored over multiple registers
454 * starting with SHARED_KEY_MODE_BASE each word will have
455 * 32 bits and contains the cipher types for 2 bssidx each.
456 * Using the correct defines correctly will cause overhead,
457 * so just calculate the correct offset.
458 */
459 field.bit_offset = 4 * (key->hw_key_idx % 8);
460 field.bit_mask = 0x7 << field.bit_offset;
461
462 offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
463
464 rt2800_register_read(rt2x00dev, offset, &reg);
465 rt2x00_set_field32(&reg, field,
466 (crypto->cmd == SET_KEY) * crypto->cipher);
467 rt2800_register_write(rt2x00dev, offset, reg);
468
469 /*
470 * Update WCID information
471 */
472 rt2800_config_wcid_attr(rt2x00dev, crypto, key);
473
474 return 0;
475}
476EXPORT_SYMBOL_GPL(rt2800_config_shared_key);
477
478int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
479 struct rt2x00lib_crypto *crypto,
480 struct ieee80211_key_conf *key)
481{
482 struct hw_key_entry key_entry;
483 u32 offset;
484
485 if (crypto->cmd == SET_KEY) {
486 /*
487 * 1 pairwise key is possible per AID, this means that the AID
488 * equals our hw_key_idx. Make sure the WCID starts _after_ the
489 * last possible shared key entry.
490 */
491 if (crypto->aid > (256 - 32))
492 return -ENOSPC;
493
494 key->hw_key_idx = 32 + crypto->aid;
495
496 memcpy(key_entry.key, crypto->key,
497 sizeof(key_entry.key));
498 memcpy(key_entry.tx_mic, crypto->tx_mic,
499 sizeof(key_entry.tx_mic));
500 memcpy(key_entry.rx_mic, crypto->rx_mic,
501 sizeof(key_entry.rx_mic));
502
503 offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
504 rt2800_register_multiwrite(rt2x00dev, offset,
505 &key_entry, sizeof(key_entry));
506 }
507
508 /*
509 * Update WCID information
510 */
511 rt2800_config_wcid_attr(rt2x00dev, crypto, key);
512
513 return 0;
514}
515EXPORT_SYMBOL_GPL(rt2800_config_pairwise_key);
516
517void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
518 const unsigned int filter_flags)
519{
520 u32 reg;
521
522 /*
523 * Start configuration steps.
524 * Note that the version error will always be dropped
525 * and broadcast frames will always be accepted since
526 * there is no filter for it at this time.
527 */
528 rt2800_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
529 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
530 !(filter_flags & FIF_FCSFAIL));
531 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
532 !(filter_flags & FIF_PLCPFAIL));
533 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
534 !(filter_flags & FIF_PROMISC_IN_BSS));
535 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
536 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
537 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
538 !(filter_flags & FIF_ALLMULTI));
539 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
540 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
541 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
542 !(filter_flags & FIF_CONTROL));
543 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
544 !(filter_flags & FIF_CONTROL));
545 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK,
546 !(filter_flags & FIF_CONTROL));
547 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS,
548 !(filter_flags & FIF_CONTROL));
549 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS,
550 !(filter_flags & FIF_CONTROL));
551 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
552 !(filter_flags & FIF_PSPOLL));
553 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
554 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
555 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
556 !(filter_flags & FIF_CONTROL));
557 rt2800_register_write(rt2x00dev, RX_FILTER_CFG, reg);
558}
559EXPORT_SYMBOL_GPL(rt2800_config_filter);
560
561void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
562 struct rt2x00intf_conf *conf, const unsigned int flags)
563{
564 unsigned int beacon_base;
565 u32 reg;
566
567 if (flags & CONFIG_UPDATE_TYPE) {
568 /*
569 * Clear current synchronisation setup.
570 * For the Beacon base registers we only need to clear
571 * the first byte since that byte contains the VALID and OWNER
572 * bits which (when set to 0) will invalidate the entire beacon.
573 */
574 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
575 rt2800_register_write(rt2x00dev, beacon_base, 0);
576
577 /*
578 * Enable synchronisation.
579 */
580 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
581 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
582 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
583 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE,
584 (conf->sync == TSF_SYNC_BEACON));
585 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
586 }
587
588 if (flags & CONFIG_UPDATE_MAC) {
589 reg = le32_to_cpu(conf->mac[1]);
590 rt2x00_set_field32(&reg, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
591 conf->mac[1] = cpu_to_le32(reg);
592
593 rt2800_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
594 conf->mac, sizeof(conf->mac));
595 }
596
597 if (flags & CONFIG_UPDATE_BSSID) {
598 reg = le32_to_cpu(conf->bssid[1]);
599 rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_ID_MASK, 0);
600 rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_BCN_NUM, 0);
601 conf->bssid[1] = cpu_to_le32(reg);
602
603 rt2800_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
604 conf->bssid, sizeof(conf->bssid));
605 }
606}
607EXPORT_SYMBOL_GPL(rt2800_config_intf);
608
609void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp)
610{
611 u32 reg;
612
613 rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
614 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
615 rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
616
617 rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
618 rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
619 !!erp->short_preamble);
620 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
621 !!erp->short_preamble);
622 rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
623
624 rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
625 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
626 erp->cts_protection ? 2 : 0);
627 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
628
629 rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE,
630 erp->basic_rates);
631 rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
632
633 rt2800_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
634 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
635 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
636 rt2800_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
637
638 rt2800_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
639 rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
640 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
641 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
642 rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
643 rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
644 rt2800_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
645
646 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
647 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
648 erp->beacon_int * 16);
649 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
650}
651EXPORT_SYMBOL_GPL(rt2800_config_erp);
652
653void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant)
654{
655 u8 r1;
656 u8 r3;
657
658 rt2800_bbp_read(rt2x00dev, 1, &r1);
659 rt2800_bbp_read(rt2x00dev, 3, &r3);
660
661 /*
662 * Configure the TX antenna.
663 */
664 switch ((int)ant->tx) {
665 case 1:
666 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
667 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
668 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
669 break;
670 case 2:
671 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
672 break;
673 case 3:
674 /* Do nothing */
675 break;
676 }
677
678 /*
679 * Configure the RX antenna.
680 */
681 switch ((int)ant->rx) {
682 case 1:
683 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
684 break;
685 case 2:
686 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 1);
687 break;
688 case 3:
689 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 2);
690 break;
691 }
692
693 rt2800_bbp_write(rt2x00dev, 3, r3);
694 rt2800_bbp_write(rt2x00dev, 1, r1);
695}
696EXPORT_SYMBOL_GPL(rt2800_config_ant);
697
698static void rt2800_config_lna_gain(struct rt2x00_dev *rt2x00dev,
699 struct rt2x00lib_conf *libconf)
700{
701 u16 eeprom;
702 short lna_gain;
703
704 if (libconf->rf.channel <= 14) {
705 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
706 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG);
707 } else if (libconf->rf.channel <= 64) {
708 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
709 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
710 } else if (libconf->rf.channel <= 128) {
711 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
712 lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_BG2_LNA_A1);
713 } else {
714 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &eeprom);
715 lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_A2_LNA_A2);
716 }
717
718 rt2x00dev->lna_gain = lna_gain;
719}
720
721static void rt2800_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
722 struct ieee80211_conf *conf,
723 struct rf_channel *rf,
724 struct channel_info *info)
725{
726 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
727
728 if (rt2x00dev->default_ant.tx == 1)
729 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
730
731 if (rt2x00dev->default_ant.rx == 1) {
732 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
733 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
734 } else if (rt2x00dev->default_ant.rx == 2)
735 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
736
737 if (rf->channel > 14) {
738 /*
739 * When TX power is below 0, we should increase it by 7 to
740 * make it a positive value (Minumum value is -7).
741 * However this means that values between 0 and 7 have
742 * double meaning, and we should set a 7DBm boost flag.
743 */
744 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A_7DBM_BOOST,
745 (info->tx_power1 >= 0));
746
747 if (info->tx_power1 < 0)
748 info->tx_power1 += 7;
749
750 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A,
751 TXPOWER_A_TO_DEV(info->tx_power1));
752
753 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A_7DBM_BOOST,
754 (info->tx_power2 >= 0));
755
756 if (info->tx_power2 < 0)
757 info->tx_power2 += 7;
758
759 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
760 TXPOWER_A_TO_DEV(info->tx_power2));
761 } else {
762 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
763 TXPOWER_G_TO_DEV(info->tx_power1));
764 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
765 TXPOWER_G_TO_DEV(info->tx_power2));
766 }
767
768 rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
769
770 rt2800_rf_write(rt2x00dev, 1, rf->rf1);
771 rt2800_rf_write(rt2x00dev, 2, rf->rf2);
772 rt2800_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
773 rt2800_rf_write(rt2x00dev, 4, rf->rf4);
774
775 udelay(200);
776
777 rt2800_rf_write(rt2x00dev, 1, rf->rf1);
778 rt2800_rf_write(rt2x00dev, 2, rf->rf2);
779 rt2800_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
780 rt2800_rf_write(rt2x00dev, 4, rf->rf4);
781
782 udelay(200);
783
784 rt2800_rf_write(rt2x00dev, 1, rf->rf1);
785 rt2800_rf_write(rt2x00dev, 2, rf->rf2);
786 rt2800_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
787 rt2800_rf_write(rt2x00dev, 4, rf->rf4);
788}
789
790static void rt2800_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
791 struct ieee80211_conf *conf,
792 struct rf_channel *rf,
793 struct channel_info *info)
794{
795 u8 rfcsr;
796
797 rt2800_rfcsr_write(rt2x00dev, 2, rf->rf1);
798 rt2800_rfcsr_write(rt2x00dev, 3, rf->rf3);
799
800 rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr);
801 rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
802 rt2800_rfcsr_write(rt2x00dev, 6, rfcsr);
803
804 rt2800_rfcsr_read(rt2x00dev, 12, &rfcsr);
805 rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER,
806 TXPOWER_G_TO_DEV(info->tx_power1));
807 rt2800_rfcsr_write(rt2x00dev, 12, rfcsr);
808
809 rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr);
810 rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset);
811 rt2800_rfcsr_write(rt2x00dev, 23, rfcsr);
812
813 rt2800_rfcsr_write(rt2x00dev, 24,
814 rt2x00dev->calibration[conf_is_ht40(conf)]);
815
816 rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr);
817 rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
818 rt2800_rfcsr_write(rt2x00dev, 7, rfcsr);
819}
820
821static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
822 struct ieee80211_conf *conf,
823 struct rf_channel *rf,
824 struct channel_info *info)
825{
826 u32 reg;
827 unsigned int tx_pin;
828 u8 bbp;
829
830 if ((rt2x00_rt(rt2x00dev, RT3070) ||
831 rt2x00_rt(rt2x00dev, RT3090)) &&
832 (rt2x00_rf(rt2x00dev, RF2020) ||
833 rt2x00_rf(rt2x00dev, RF3020) ||
834 rt2x00_rf(rt2x00dev, RF3021) ||
835 rt2x00_rf(rt2x00dev, RF3022)))
836 rt2800_config_channel_rt3x(rt2x00dev, conf, rf, info);
837 else
838 rt2800_config_channel_rt2x(rt2x00dev, conf, rf, info);
839
840 /*
841 * Change BBP settings
842 */
843 rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
844 rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
845 rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
846 rt2800_bbp_write(rt2x00dev, 86, 0);
847
848 if (rf->channel <= 14) {
849 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
850 rt2800_bbp_write(rt2x00dev, 82, 0x62);
851 rt2800_bbp_write(rt2x00dev, 75, 0x46);
852 } else {
853 rt2800_bbp_write(rt2x00dev, 82, 0x84);
854 rt2800_bbp_write(rt2x00dev, 75, 0x50);
855 }
856 } else {
857 rt2800_bbp_write(rt2x00dev, 82, 0xf2);
858
859 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
860 rt2800_bbp_write(rt2x00dev, 75, 0x46);
861 else
862 rt2800_bbp_write(rt2x00dev, 75, 0x50);
863 }
864
865 rt2800_register_read(rt2x00dev, TX_BAND_CFG, &reg);
866 rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
867 rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
868 rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
869 rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg);
870
871 tx_pin = 0;
872
873 /* Turn on unused PA or LNA when not using 1T or 1R */
874 if (rt2x00dev->default_ant.tx != 1) {
875 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
876 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
877 }
878
879 /* Turn on unused PA or LNA when not using 1T or 1R */
880 if (rt2x00dev->default_ant.rx != 1) {
881 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
882 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
883 }
884
885 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
886 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
887 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
888 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
889 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
890 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
891
892 rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
893
894 rt2800_bbp_read(rt2x00dev, 4, &bbp);
895 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
896 rt2800_bbp_write(rt2x00dev, 4, bbp);
897
898 rt2800_bbp_read(rt2x00dev, 3, &bbp);
899 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
900 rt2800_bbp_write(rt2x00dev, 3, bbp);
901
902 if (rt2x00_rt(rt2x00dev, RT2860) &&
903 (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
904 if (conf_is_ht40(conf)) {
905 rt2800_bbp_write(rt2x00dev, 69, 0x1a);
906 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
907 rt2800_bbp_write(rt2x00dev, 73, 0x16);
908 } else {
909 rt2800_bbp_write(rt2x00dev, 69, 0x16);
910 rt2800_bbp_write(rt2x00dev, 70, 0x08);
911 rt2800_bbp_write(rt2x00dev, 73, 0x11);
912 }
913 }
914
915 msleep(1);
916}
917
918static void rt2800_config_txpower(struct rt2x00_dev *rt2x00dev,
919 const int txpower)
920{
921 u32 reg;
922 u32 value = TXPOWER_G_TO_DEV(txpower);
923 u8 r1;
924
925 rt2800_bbp_read(rt2x00dev, 1, &r1);
926 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
927 rt2800_bbp_write(rt2x00dev, 1, r1);
928
929 rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
930 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
931 rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
932 rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
933 rt2x00_set_field32(&reg, TX_PWR_CFG_0_11MBS, value);
934 rt2x00_set_field32(&reg, TX_PWR_CFG_0_6MBS, value);
935 rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
936 rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
937 rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
938 rt2800_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
939
940 rt2800_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
941 rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
942 rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
943 rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
944 rt2x00_set_field32(&reg, TX_PWR_CFG_1_54MBS, value);
945 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS0, value);
946 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
947 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
948 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
949 rt2800_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
950
951 rt2800_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
952 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
953 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
954 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
955 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS7, value);
956 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS8, value);
957 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
958 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
959 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
960 rt2800_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
961
962 rt2800_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
963 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
964 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
965 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
966 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS15, value);
967 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN1, value);
968 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
969 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
970 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
971 rt2800_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
972
973 rt2800_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
974 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
975 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
976 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
977 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
978 rt2800_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
979}
980
981static void rt2800_config_retry_limit(struct rt2x00_dev *rt2x00dev,
982 struct rt2x00lib_conf *libconf)
983{
984 u32 reg;
985
986 rt2800_register_read(rt2x00dev, TX_RTY_CFG, &reg);
987 rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
988 libconf->conf->short_frame_max_tx_count);
989 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
990 libconf->conf->long_frame_max_tx_count);
991 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
992 rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
993 rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
994 rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
995 rt2800_register_write(rt2x00dev, TX_RTY_CFG, reg);
996}
997
998static void rt2800_config_ps(struct rt2x00_dev *rt2x00dev,
999 struct rt2x00lib_conf *libconf)
1000{
1001 enum dev_state state =
1002 (libconf->conf->flags & IEEE80211_CONF_PS) ?
1003 STATE_SLEEP : STATE_AWAKE;
1004 u32 reg;
1005
1006 if (state == STATE_SLEEP) {
1007 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
1008
1009 rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
1010 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
1011 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
1012 libconf->conf->listen_interval - 1);
1013 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
1014 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
1015
1016 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
1017 } else {
1018 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
1019
1020 rt2800_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
1021 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
1022 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
1023 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
1024 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
1025 }
1026}
1027
1028void rt2800_config(struct rt2x00_dev *rt2x00dev,
1029 struct rt2x00lib_conf *libconf,
1030 const unsigned int flags)
1031{
1032 /* Always recalculate LNA gain before changing configuration */
1033 rt2800_config_lna_gain(rt2x00dev, libconf);
1034
1035 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
1036 rt2800_config_channel(rt2x00dev, libconf->conf,
1037 &libconf->rf, &libconf->channel);
1038 if (flags & IEEE80211_CONF_CHANGE_POWER)
1039 rt2800_config_txpower(rt2x00dev, libconf->conf->power_level);
1040 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
1041 rt2800_config_retry_limit(rt2x00dev, libconf);
1042 if (flags & IEEE80211_CONF_CHANGE_PS)
1043 rt2800_config_ps(rt2x00dev, libconf);
1044}
1045EXPORT_SYMBOL_GPL(rt2800_config);
1046
1047/*
1048 * Link tuning
1049 */
1050void rt2800_link_stats(struct rt2x00_dev *rt2x00dev, struct link_qual *qual)
1051{
1052 u32 reg;
1053
1054 /*
1055 * Update FCS error count from register.
1056 */
1057 rt2800_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1058 qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
1059}
1060EXPORT_SYMBOL_GPL(rt2800_link_stats);
1061
1062static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
1063{
1064 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
1065 if (rt2x00_is_usb(rt2x00dev) &&
1066 rt2x00_rt(rt2x00dev, RT3070) &&
1067 (rt2x00_rev(rt2x00dev) == RT3070_VERSION))
1068 return 0x1c + (2 * rt2x00dev->lna_gain);
1069 else
1070 return 0x2e + rt2x00dev->lna_gain;
1071 }
1072
1073 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
1074 return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
1075 else
1076 return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
1077}
1078
1079static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev,
1080 struct link_qual *qual, u8 vgc_level)
1081{
1082 if (qual->vgc_level != vgc_level) {
1083 rt2800_bbp_write(rt2x00dev, 66, vgc_level);
1084 qual->vgc_level = vgc_level;
1085 qual->vgc_level_reg = vgc_level;
1086 }
1087}
1088
1089void rt2800_reset_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual)
1090{
1091 rt2800_set_vgc(rt2x00dev, qual, rt2800_get_default_vgc(rt2x00dev));
1092}
1093EXPORT_SYMBOL_GPL(rt2800_reset_tuner);
1094
1095void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
1096 const u32 count)
1097{
1098 if (rt2x00_rt(rt2x00dev, RT2860) &&
1099 (rt2x00_rev(rt2x00dev) == RT2860C_VERSION))
1100 return;
1101
1102 /*
1103 * When RSSI is better then -80 increase VGC level with 0x10
1104 */
1105 rt2800_set_vgc(rt2x00dev, qual,
1106 rt2800_get_default_vgc(rt2x00dev) +
1107 ((qual->rssi > -80) * 0x10));
1108}
1109EXPORT_SYMBOL_GPL(rt2800_link_tuner);
1110
1111/*
1112 * Initialization functions.
1113 */
1114int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
1115{
1116 u32 reg;
1117 unsigned int i;
1118
1119 if (rt2x00_is_usb(rt2x00dev)) {
1120 /*
1121 * Wait until BBP and RF are ready.
1122 */
1123 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1124 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
1125 if (reg && reg != ~0)
1126 break;
1127 msleep(1);
1128 }
1129
1130 if (i == REGISTER_BUSY_COUNT) {
1131 ERROR(rt2x00dev, "Unstable hardware.\n");
1132 return -EBUSY;
1133 }
1134
1135 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1136 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL,
1137 reg & ~0x00002000);
1138 } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
1139 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
1140
1141 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1142 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
1143 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
1144 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1145
1146 if (rt2x00_is_usb(rt2x00dev)) {
1147 rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
1148#if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE)
1149 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
1150 USB_MODE_RESET, REGISTER_TIMEOUT);
1151#endif
1152 }
1153
1154 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1155
1156 rt2800_register_read(rt2x00dev, BCN_OFFSET0, &reg);
1157 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
1158 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
1159 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
1160 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
1161 rt2800_register_write(rt2x00dev, BCN_OFFSET0, reg);
1162
1163 rt2800_register_read(rt2x00dev, BCN_OFFSET1, &reg);
1164 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
1165 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
1166 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
1167 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
1168 rt2800_register_write(rt2x00dev, BCN_OFFSET1, reg);
1169
1170 rt2800_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
1171 rt2800_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
1172
1173 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1174
1175 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
1176 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
1177 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
1178 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
1179 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
1180 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
1181 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
1182 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
1183
1184 if (rt2x00_is_usb(rt2x00dev) &&
1185 rt2x00_rt(rt2x00dev, RT3070) &&
1186 (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
1187 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
1188 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
1189 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
1190 } else {
1191 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
1192 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
1193 }
1194
1195 rt2800_register_read(rt2x00dev, TX_LINK_CFG, &reg);
1196 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
1197 rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
1198 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
1199 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_MRQ_EN, 0);
1200 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_RDG_EN, 0);
1201 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
1202 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
1203 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
1204 rt2800_register_write(rt2x00dev, TX_LINK_CFG, reg);
1205
1206 rt2800_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
1207 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
1208 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
1209 rt2800_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
1210
1211 rt2800_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
1212 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
1213 if ((rt2x00_rt(rt2x00dev, RT2872) &&
1214 (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) ||
1215 rt2x00_rt(rt2x00dev, RT2880) ||
1216 rt2x00_rt(rt2x00dev, RT2883) ||
1217 rt2x00_rt(rt2x00dev, RT2890) ||
1218 rt2x00_rt(rt2x00dev, RT3052) ||
1219 (rt2x00_rt(rt2x00dev, RT3070) &&
1220 (rt2x00_rev(rt2x00dev) < RT3070_VERSION)))
1221 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
1222 else
1223 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
1224 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
1225 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
1226 rt2800_register_write(rt2x00dev, MAX_LEN_CFG, reg);
1227
1228 rt2800_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
1229
1230 rt2800_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
1231 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
1232 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
1233 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
1234 rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
1235 rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
1236 rt2800_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
1237
1238 rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
1239 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
1240 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
1241 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
1242 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1243 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1244 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1245 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1246 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1247 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1248 rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
1249
1250 rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
1251 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
1252 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
1253 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
1254 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1255 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1256 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1257 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1258 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1259 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1260 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
1261
1262 rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
1263 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
1264 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
1265 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
1266 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1267 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1268 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1269 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1270 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1271 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1272 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
1273
1274 rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
1275 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
1276 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
1277 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
1278 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1279 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1280 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1281 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1282 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1283 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1284 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
1285
1286 rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
1287 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
1288 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
1289 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
1290 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1291 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1292 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1293 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1294 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1295 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1296 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
1297
1298 rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
1299 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
1300 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
1301 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
1302 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1303 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1304 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1305 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1306 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1307 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1308 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
1309
1310 if (rt2x00_is_usb(rt2x00dev)) {
1311 rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006);
1312
1313 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1314 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1315 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
1316 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
1317 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
1318 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 3);
1319 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 0);
1320 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
1321 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
1322 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
1323 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1324 }
1325
1326 rt2800_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
1327 rt2800_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
1328
1329 rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
1330 rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
1331 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
1332 IEEE80211_MAX_RTS_THRESHOLD);
1333 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
1334 rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
1335
1336 rt2800_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
1337 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
1338
1339 /*
1340 * ASIC will keep garbage value after boot, clear encryption keys.
1341 */
1342 for (i = 0; i < 4; i++)
1343 rt2800_register_write(rt2x00dev,
1344 SHARED_KEY_MODE_ENTRY(i), 0);
1345
1346 for (i = 0; i < 256; i++) {
1347 u32 wcid[2] = { 0xffffffff, 0x00ffffff };
1348 rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
1349 wcid, sizeof(wcid));
1350
1351 rt2800_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
1352 rt2800_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
1353 }
1354
1355 /*
1356 * Clear all beacons
1357 * For the Beacon base registers we only need to clear
1358 * the first byte since that byte contains the VALID and OWNER
1359 * bits which (when set to 0) will invalidate the entire beacon.
1360 */
1361 rt2800_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1362 rt2800_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1363 rt2800_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1364 rt2800_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1365 rt2800_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
1366 rt2800_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
1367 rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
1368 rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
1369
1370 if (rt2x00_is_usb(rt2x00dev)) {
1371 rt2800_register_read(rt2x00dev, USB_CYC_CFG, &reg);
1372 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
1373 rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg);
1374 }
1375
1376 rt2800_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
1377 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
1378 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
1379 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
1380 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
1381 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
1382 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
1383 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
1384 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
1385 rt2800_register_write(rt2x00dev, HT_FBK_CFG0, reg);
1386
1387 rt2800_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
1388 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
1389 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
1390 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
1391 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
1392 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
1393 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
1394 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
1395 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
1396 rt2800_register_write(rt2x00dev, HT_FBK_CFG1, reg);
1397
1398 rt2800_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
1399 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
1400 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
1401 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9);
1402 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
1403 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
1404 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
1405 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
1406 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
1407 rt2800_register_write(rt2x00dev, LG_FBK_CFG0, reg);
1408
1409 rt2800_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
1410 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
1411 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
1412 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
1413 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
1414 rt2800_register_write(rt2x00dev, LG_FBK_CFG1, reg);
1415
1416 /*
1417 * We must clear the error counters.
1418 * These registers are cleared on read,
1419 * so we may pass a useless variable to store the value.
1420 */
1421 rt2800_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1422 rt2800_register_read(rt2x00dev, RX_STA_CNT1, &reg);
1423 rt2800_register_read(rt2x00dev, RX_STA_CNT2, &reg);
1424 rt2800_register_read(rt2x00dev, TX_STA_CNT0, &reg);
1425 rt2800_register_read(rt2x00dev, TX_STA_CNT1, &reg);
1426 rt2800_register_read(rt2x00dev, TX_STA_CNT2, &reg);
1427
1428 return 0;
1429}
1430EXPORT_SYMBOL_GPL(rt2800_init_registers);
1431
1432static int rt2800_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
1433{
1434 unsigned int i;
1435 u32 reg;
1436
1437 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1438 rt2800_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
1439 if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
1440 return 0;
1441
1442 udelay(REGISTER_BUSY_DELAY);
1443 }
1444
1445 ERROR(rt2x00dev, "BBP/RF register access failed, aborting.\n");
1446 return -EACCES;
1447}
1448
1449static int rt2800_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1450{
1451 unsigned int i;
1452 u8 value;
1453
1454 /*
1455 * BBP was enabled after firmware was loaded,
1456 * but we need to reactivate it now.
1457 */
1458 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1459 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1460 msleep(1);
1461
1462 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1463 rt2800_bbp_read(rt2x00dev, 0, &value);
1464 if ((value != 0xff) && (value != 0x00))
1465 return 0;
1466 udelay(REGISTER_BUSY_DELAY);
1467 }
1468
1469 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1470 return -EACCES;
1471}
1472
1473int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
1474{
1475 unsigned int i;
1476 u16 eeprom;
1477 u8 reg_id;
1478 u8 value;
1479
1480 if (unlikely(rt2800_wait_bbp_rf_ready(rt2x00dev) ||
1481 rt2800_wait_bbp_ready(rt2x00dev)))
1482 return -EACCES;
1483
1484 rt2800_bbp_write(rt2x00dev, 65, 0x2c);
1485 rt2800_bbp_write(rt2x00dev, 66, 0x38);
1486 rt2800_bbp_write(rt2x00dev, 69, 0x12);
1487 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
1488 rt2800_bbp_write(rt2x00dev, 73, 0x10);
1489 rt2800_bbp_write(rt2x00dev, 81, 0x37);
1490 rt2800_bbp_write(rt2x00dev, 82, 0x62);
1491 rt2800_bbp_write(rt2x00dev, 83, 0x6a);
1492 rt2800_bbp_write(rt2x00dev, 84, 0x99);
1493 rt2800_bbp_write(rt2x00dev, 86, 0x00);
1494 rt2800_bbp_write(rt2x00dev, 91, 0x04);
1495 rt2800_bbp_write(rt2x00dev, 92, 0x00);
1496 rt2800_bbp_write(rt2x00dev, 103, 0x00);
1497 rt2800_bbp_write(rt2x00dev, 105, 0x05);
1498
1499 if (rt2x00_rt(rt2x00dev, RT2860) &&
1500 (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) {
1501 rt2800_bbp_write(rt2x00dev, 69, 0x16);
1502 rt2800_bbp_write(rt2x00dev, 73, 0x12);
1503 }
1504
1505 if (rt2x00_rt(rt2x00dev, RT2860) &&
1506 (rt2x00_rev(rt2x00dev) > RT2860D_VERSION))
1507 rt2800_bbp_write(rt2x00dev, 84, 0x19);
1508
1509 if (rt2x00_is_usb(rt2x00dev) &&
1510 rt2x00_rt(rt2x00dev, RT3070) &&
1511 (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) {
1512 rt2800_bbp_write(rt2x00dev, 70, 0x0a);
1513 rt2800_bbp_write(rt2x00dev, 84, 0x99);
1514 rt2800_bbp_write(rt2x00dev, 105, 0x05);
1515 }
1516
1517 if (rt2x00_rt(rt2x00dev, RT3052)) {
1518 rt2800_bbp_write(rt2x00dev, 31, 0x08);
1519 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
1520 rt2800_bbp_write(rt2x00dev, 80, 0x08);
1521 }
1522
1523 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1524 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1525
1526 if (eeprom != 0xffff && eeprom != 0x0000) {
1527 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1528 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1529 rt2800_bbp_write(rt2x00dev, reg_id, value);
1530 }
1531 }
1532
1533 return 0;
1534}
1535EXPORT_SYMBOL_GPL(rt2800_init_bbp);
1536
1537static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev,
1538 bool bw40, u8 rfcsr24, u8 filter_target)
1539{
1540 unsigned int i;
1541 u8 bbp;
1542 u8 rfcsr;
1543 u8 passband;
1544 u8 stopband;
1545 u8 overtuned = 0;
1546
1547 rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
1548
1549 rt2800_bbp_read(rt2x00dev, 4, &bbp);
1550 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
1551 rt2800_bbp_write(rt2x00dev, 4, bbp);
1552
1553 rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
1554 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
1555 rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
1556
1557 /*
1558 * Set power & frequency of passband test tone
1559 */
1560 rt2800_bbp_write(rt2x00dev, 24, 0);
1561
1562 for (i = 0; i < 100; i++) {
1563 rt2800_bbp_write(rt2x00dev, 25, 0x90);
1564 msleep(1);
1565
1566 rt2800_bbp_read(rt2x00dev, 55, &passband);
1567 if (passband)
1568 break;
1569 }
1570
1571 /*
1572 * Set power & frequency of stopband test tone
1573 */
1574 rt2800_bbp_write(rt2x00dev, 24, 0x06);
1575
1576 for (i = 0; i < 100; i++) {
1577 rt2800_bbp_write(rt2x00dev, 25, 0x90);
1578 msleep(1);
1579
1580 rt2800_bbp_read(rt2x00dev, 55, &stopband);
1581
1582 if ((passband - stopband) <= filter_target) {
1583 rfcsr24++;
1584 overtuned += ((passband - stopband) == filter_target);
1585 } else
1586 break;
1587
1588 rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
1589 }
1590
1591 rfcsr24 -= !!overtuned;
1592
1593 rt2800_rfcsr_write(rt2x00dev, 24, rfcsr24);
1594 return rfcsr24;
1595}
1596
1597int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1598{
1599 u8 rfcsr;
1600 u8 bbp;
1601
1602 if (rt2x00_is_usb(rt2x00dev) &&
1603 rt2x00_rt(rt2x00dev, RT3070) &&
1604 (rt2x00_rev(rt2x00dev) != RT3070_VERSION))
1605 return 0;
1606
1607 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
1608 if (!rt2x00_rf(rt2x00dev, RF3020) &&
1609 !rt2x00_rf(rt2x00dev, RF3021) &&
1610 !rt2x00_rf(rt2x00dev, RF3022))
1611 return 0;
1612 }
1613
1614 /*
1615 * Init RF calibration.
1616 */
1617 rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
1618 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
1619 rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
1620 msleep(1);
1621 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
1622 rt2800_rfcsr_write(rt2x00dev, 30, rfcsr);
1623
1624 if (rt2x00_is_usb(rt2x00dev)) {
1625 rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
1626 rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
1627 rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
1628 rt2800_rfcsr_write(rt2x00dev, 7, 0x70);
1629 rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
1630 rt2800_rfcsr_write(rt2x00dev, 10, 0x71);
1631 rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
1632 rt2800_rfcsr_write(rt2x00dev, 12, 0x7b);
1633 rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
1634 rt2800_rfcsr_write(rt2x00dev, 15, 0x58);
1635 rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);
1636 rt2800_rfcsr_write(rt2x00dev, 17, 0x92);
1637 rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);
1638 rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
1639 rt2800_rfcsr_write(rt2x00dev, 20, 0xba);
1640 rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
1641 rt2800_rfcsr_write(rt2x00dev, 24, 0x16);
1642 rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
1643 rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
1644 rt2800_rfcsr_write(rt2x00dev, 29, 0x1f);
1645 } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) {
1646 rt2800_rfcsr_write(rt2x00dev, 0, 0x50);
1647 rt2800_rfcsr_write(rt2x00dev, 1, 0x01);
1648 rt2800_rfcsr_write(rt2x00dev, 2, 0xf7);
1649 rt2800_rfcsr_write(rt2x00dev, 3, 0x75);
1650 rt2800_rfcsr_write(rt2x00dev, 4, 0x40);
1651 rt2800_rfcsr_write(rt2x00dev, 5, 0x03);
1652 rt2800_rfcsr_write(rt2x00dev, 6, 0x02);
1653 rt2800_rfcsr_write(rt2x00dev, 7, 0x50);
1654 rt2800_rfcsr_write(rt2x00dev, 8, 0x39);
1655 rt2800_rfcsr_write(rt2x00dev, 9, 0x0f);
1656 rt2800_rfcsr_write(rt2x00dev, 10, 0x60);
1657 rt2800_rfcsr_write(rt2x00dev, 11, 0x21);
1658 rt2800_rfcsr_write(rt2x00dev, 12, 0x75);
1659 rt2800_rfcsr_write(rt2x00dev, 13, 0x75);
1660 rt2800_rfcsr_write(rt2x00dev, 14, 0x90);
1661 rt2800_rfcsr_write(rt2x00dev, 15, 0x58);
1662 rt2800_rfcsr_write(rt2x00dev, 16, 0xb3);
1663 rt2800_rfcsr_write(rt2x00dev, 17, 0x92);
1664 rt2800_rfcsr_write(rt2x00dev, 18, 0x2c);
1665 rt2800_rfcsr_write(rt2x00dev, 19, 0x02);
1666 rt2800_rfcsr_write(rt2x00dev, 20, 0xba);
1667 rt2800_rfcsr_write(rt2x00dev, 21, 0xdb);
1668 rt2800_rfcsr_write(rt2x00dev, 22, 0x00);
1669 rt2800_rfcsr_write(rt2x00dev, 23, 0x31);
1670 rt2800_rfcsr_write(rt2x00dev, 24, 0x08);
1671 rt2800_rfcsr_write(rt2x00dev, 25, 0x01);
1672 rt2800_rfcsr_write(rt2x00dev, 26, 0x25);
1673 rt2800_rfcsr_write(rt2x00dev, 27, 0x23);
1674 rt2800_rfcsr_write(rt2x00dev, 28, 0x13);
1675 rt2800_rfcsr_write(rt2x00dev, 29, 0x83);
1676 }
1677
1678 /*
1679 * Set RX Filter calibration for 20MHz and 40MHz
1680 */
1681 rt2x00dev->calibration[0] =
1682 rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
1683 rt2x00dev->calibration[1] =
1684 rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
1685
1686 /*
1687 * Set back to initial state
1688 */
1689 rt2800_bbp_write(rt2x00dev, 24, 0);
1690
1691 rt2800_rfcsr_read(rt2x00dev, 22, &rfcsr);
1692 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
1693 rt2800_rfcsr_write(rt2x00dev, 22, rfcsr);
1694
1695 /*
1696 * set BBP back to BW20
1697 */
1698 rt2800_bbp_read(rt2x00dev, 4, &bbp);
1699 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
1700 rt2800_bbp_write(rt2x00dev, 4, bbp);
1701
1702 return 0;
1703}
1704EXPORT_SYMBOL_GPL(rt2800_init_rfcsr);
1705
1706int rt2800_efuse_detect(struct rt2x00_dev *rt2x00dev)
1707{
1708 u32 reg;
1709
1710 rt2800_register_read(rt2x00dev, EFUSE_CTRL, &reg);
1711
1712 return rt2x00_get_field32(reg, EFUSE_CTRL_PRESENT);
1713}
1714EXPORT_SYMBOL_GPL(rt2800_efuse_detect);
1715
1716static void rt2800_efuse_read(struct rt2x00_dev *rt2x00dev, unsigned int i)
1717{
1718 u32 reg;
1719
1720 mutex_lock(&rt2x00dev->csr_mutex);
1721
1722 rt2800_register_read_lock(rt2x00dev, EFUSE_CTRL, &reg);
1723 rt2x00_set_field32(&reg, EFUSE_CTRL_ADDRESS_IN, i);
1724 rt2x00_set_field32(&reg, EFUSE_CTRL_MODE, 0);
1725 rt2x00_set_field32(&reg, EFUSE_CTRL_KICK, 1);
1726 rt2800_register_write_lock(rt2x00dev, EFUSE_CTRL, reg);
1727
1728 /* Wait until the EEPROM has been loaded */
1729 rt2800_regbusy_read(rt2x00dev, EFUSE_CTRL, EFUSE_CTRL_KICK, &reg);
1730
1731 /* Apparently the data is read from end to start */
1732 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA3,
1733 (u32 *)&rt2x00dev->eeprom[i]);
1734 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA2,
1735 (u32 *)&rt2x00dev->eeprom[i + 2]);
1736 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA1,
1737 (u32 *)&rt2x00dev->eeprom[i + 4]);
1738 rt2800_register_read_lock(rt2x00dev, EFUSE_DATA0,
1739 (u32 *)&rt2x00dev->eeprom[i + 6]);
1740
1741 mutex_unlock(&rt2x00dev->csr_mutex);
1742}
1743
1744void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
1745{
1746 unsigned int i;
1747
1748 for (i = 0; i < EEPROM_SIZE / sizeof(u16); i += 8)
1749 rt2800_efuse_read(rt2x00dev, i);
1750}
1751EXPORT_SYMBOL_GPL(rt2800_read_eeprom_efuse);
1752
1753int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1754{
1755 u16 word;
1756 u8 *mac;
1757 u8 default_lna_gain;
1758
1759 /*
1760 * Start validation of the data that has been read.
1761 */
1762 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1763 if (!is_valid_ether_addr(mac)) {
1764 random_ether_addr(mac);
1765 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
1766 }
1767
1768 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1769 if (word == 0xffff) {
1770 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
1771 rt2x00_set_field16(&word, EEPROM_ANTENNA_TXPATH, 1);
1772 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
1773 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1774 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1775 } else if (rt2x00_rt(rt2x00dev, RT2860) ||
1776 rt2x00_rt(rt2x00dev, RT2870) ||
1777 rt2x00_rt(rt2x00dev, RT2872) ||
1778 rt2x00_rt(rt2x00dev, RT2880) ||
1779 (rt2x00_rt(rt2x00dev, RT2883) &&
1780 (rt2x00_rev(rt2x00dev) < RT2883_VERSION))) {
1781 /*
1782 * There is a max of 2 RX streams for RT28x0 series
1783 */
1784 if (rt2x00_get_field16(word, EEPROM_ANTENNA_RXPATH) > 2)
1785 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
1786 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1787 }
1788
1789 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1790 if (word == 0xffff) {
1791 rt2x00_set_field16(&word, EEPROM_NIC_HW_RADIO, 0);
1792 rt2x00_set_field16(&word, EEPROM_NIC_DYNAMIC_TX_AGC, 0);
1793 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0);
1794 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0);
1795 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
1796 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_BG, 0);
1797 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_A, 0);
1798 rt2x00_set_field16(&word, EEPROM_NIC_WPS_PBC, 0);
1799 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_BG, 0);
1800 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_A, 0);
1801 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1802 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1803 }
1804
1805 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1806 if ((word & 0x00ff) == 0x00ff) {
1807 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1808 rt2x00_set_field16(&word, EEPROM_FREQ_LED_MODE,
1809 LED_MODE_TXRX_ACTIVITY);
1810 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0);
1811 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1812 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED1, 0x5555);
1813 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED2, 0x2221);
1814 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED3, 0xa9f8);
1815 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1816 }
1817
1818 /*
1819 * During the LNA validation we are going to use
1820 * lna0 as correct value. Note that EEPROM_LNA
1821 * is never validated.
1822 */
1823 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &word);
1824 default_lna_gain = rt2x00_get_field16(word, EEPROM_LNA_A0);
1825
1826 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG, &word);
1827 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET0)) > 10)
1828 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET0, 0);
1829 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET1)) > 10)
1830 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET1, 0);
1831 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG, word);
1832
1833 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &word);
1834 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10)
1835 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0);
1836 if (rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0x00 ||
1837 rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0xff)
1838 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_LNA_A1,
1839 default_lna_gain);
1840 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG2, word);
1841
1842 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A, &word);
1843 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET0)) > 10)
1844 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET0, 0);
1845 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET1)) > 10)
1846 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET1, 0);
1847 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A, word);
1848
1849 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &word);
1850 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A2_OFFSET2)) > 10)
1851 rt2x00_set_field16(&word, EEPROM_RSSI_A2_OFFSET2, 0);
1852 if (rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0x00 ||
1853 rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0xff)
1854 rt2x00_set_field16(&word, EEPROM_RSSI_A2_LNA_A2,
1855 default_lna_gain);
1856 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A2, word);
1857
1858 return 0;
1859}
1860EXPORT_SYMBOL_GPL(rt2800_validate_eeprom);
1861
1862int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
1863{
1864 u32 reg;
1865 u16 value;
1866 u16 eeprom;
1867
1868 /*
1869 * Read EEPROM word for configuration.
1870 */
1871 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1872
1873 /*
1874 * Identify RF chipset.
1875 */
1876 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1877 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
1878
1879 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
1880 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
1881
1882 if (!rt2x00_rt(rt2x00dev, RT2860) &&
1883 !rt2x00_rt(rt2x00dev, RT2870) &&
1884 !rt2x00_rt(rt2x00dev, RT2872) &&
1885 !rt2x00_rt(rt2x00dev, RT2880) &&
1886 !rt2x00_rt(rt2x00dev, RT2883) &&
1887 !rt2x00_rt(rt2x00dev, RT2890) &&
1888 !rt2x00_rt(rt2x00dev, RT3052) &&
1889 !rt2x00_rt(rt2x00dev, RT3070) &&
1890 !rt2x00_rt(rt2x00dev, RT3071) &&
1891 !rt2x00_rt(rt2x00dev, RT3090) &&
1892 !rt2x00_rt(rt2x00dev, RT3390) &&
1893 !rt2x00_rt(rt2x00dev, RT3572)) {
1894 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1895 return -ENODEV;
1896 }
1897
1898 if (!rt2x00_rf(rt2x00dev, RF2820) &&
1899 !rt2x00_rf(rt2x00dev, RF2850) &&
1900 !rt2x00_rf(rt2x00dev, RF2720) &&
1901 !rt2x00_rf(rt2x00dev, RF2750) &&
1902 !rt2x00_rf(rt2x00dev, RF3020) &&
1903 !rt2x00_rf(rt2x00dev, RF2020) &&
1904 !rt2x00_rf(rt2x00dev, RF3021) &&
1905 !rt2x00_rf(rt2x00dev, RF3022) &&
1906 !rt2x00_rf(rt2x00dev, RF3052)) {
1907 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1908 return -ENODEV;
1909 }
1910
1911 /*
1912 * Identify default antenna configuration.
1913 */
1914 rt2x00dev->default_ant.tx =
1915 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH);
1916 rt2x00dev->default_ant.rx =
1917 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH);
1918
1919 /*
1920 * Read frequency offset and RF programming sequence.
1921 */
1922 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1923 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1924
1925 /*
1926 * Read external LNA informations.
1927 */
1928 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1929
1930 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A))
1931 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1932 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
1933 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1934
1935 /*
1936 * Detect if this device has an hardware controlled radio.
1937 */
1938 if (rt2x00_get_field16(eeprom, EEPROM_NIC_HW_RADIO))
1939 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
1940
1941 /*
1942 * Store led settings, for correct led behaviour.
1943 */
1944#ifdef CONFIG_RT2X00_LIB_LEDS
1945 rt2800_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1946 rt2800_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
1947 rt2800_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
1948
1949 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &rt2x00dev->led_mcu_reg);
1950#endif /* CONFIG_RT2X00_LIB_LEDS */
1951
1952 return 0;
1953}
1954EXPORT_SYMBOL_GPL(rt2800_init_eeprom);
1955
1956/*
1957 * RF value list for rt28x0
1958 * Supports: 2.4 GHz (all) & 5.2 GHz (RF2850 & RF2750)
1959 */
1960static const struct rf_channel rf_vals[] = {
1961 { 1, 0x18402ecc, 0x184c0786, 0x1816b455, 0x1800510b },
1962 { 2, 0x18402ecc, 0x184c0786, 0x18168a55, 0x1800519f },
1963 { 3, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800518b },
1964 { 4, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800519f },
1965 { 5, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800518b },
1966 { 6, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800519f },
1967 { 7, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800518b },
1968 { 8, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800519f },
1969 { 9, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800518b },
1970 { 10, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800519f },
1971 { 11, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800518b },
1972 { 12, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800519f },
1973 { 13, 0x18402ecc, 0x184c079e, 0x18168a55, 0x1800518b },
1974 { 14, 0x18402ecc, 0x184c07a2, 0x18168a55, 0x18005193 },
1975
1976 /* 802.11 UNI / HyperLan 2 */
1977 { 36, 0x18402ecc, 0x184c099a, 0x18158a55, 0x180ed1a3 },
1978 { 38, 0x18402ecc, 0x184c099e, 0x18158a55, 0x180ed193 },
1979 { 40, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed183 },
1980 { 44, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed1a3 },
1981 { 46, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed18b },
1982 { 48, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed19b },
1983 { 52, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed193 },
1984 { 54, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed1a3 },
1985 { 56, 0x18402ec8, 0x184c068e, 0x18158a55, 0x180ed18b },
1986 { 60, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed183 },
1987 { 62, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed193 },
1988 { 64, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed1a3 },
1989
1990 /* 802.11 HyperLan 2 */
1991 { 100, 0x18402ec8, 0x184c06b2, 0x18178a55, 0x180ed783 },
1992 { 102, 0x18402ec8, 0x184c06b2, 0x18578a55, 0x180ed793 },
1993 { 104, 0x18402ec8, 0x185c06b2, 0x18578a55, 0x180ed1a3 },
1994 { 108, 0x18402ecc, 0x185c0a32, 0x18578a55, 0x180ed193 },
1995 { 110, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed183 },
1996 { 112, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed19b },
1997 { 116, 0x18402ecc, 0x184c0a3a, 0x18178a55, 0x180ed1a3 },
1998 { 118, 0x18402ecc, 0x184c0a3e, 0x18178a55, 0x180ed193 },
1999 { 120, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed183 },
2000 { 124, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed193 },
2001 { 126, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed15b },
2002 { 128, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed1a3 },
2003 { 132, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed18b },
2004 { 134, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed193 },
2005 { 136, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed19b },
2006 { 140, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed183 },
2007
2008 /* 802.11 UNII */
2009 { 149, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed1a7 },
2010 { 151, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed187 },
2011 { 153, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed18f },
2012 { 157, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed19f },
2013 { 159, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed1a7 },
2014 { 161, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed187 },
2015 { 165, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed197 },
2016 { 167, 0x18402ec4, 0x184c03d2, 0x18179855, 0x1815531f },
2017 { 169, 0x18402ec4, 0x184c03d2, 0x18179855, 0x18155327 },
2018 { 171, 0x18402ec4, 0x184c03d6, 0x18179855, 0x18155307 },
2019 { 173, 0x18402ec4, 0x184c03d6, 0x18179855, 0x1815530f },
2020
2021 /* 802.11 Japan */
2022 { 184, 0x15002ccc, 0x1500491e, 0x1509be55, 0x150c0a0b },
2023 { 188, 0x15002ccc, 0x15004922, 0x1509be55, 0x150c0a13 },
2024 { 192, 0x15002ccc, 0x15004926, 0x1509be55, 0x150c0a1b },
2025 { 196, 0x15002ccc, 0x1500492a, 0x1509be55, 0x150c0a23 },
2026 { 208, 0x15002ccc, 0x1500493a, 0x1509be55, 0x150c0a13 },
2027 { 212, 0x15002ccc, 0x1500493e, 0x1509be55, 0x150c0a1b },
2028 { 216, 0x15002ccc, 0x15004982, 0x1509be55, 0x150c0a23 },
2029};
2030
2031/*
2032 * RF value list for rt3070
2033 * Supports: 2.4 GHz
2034 */
2035static const struct rf_channel rf_vals_302x[] = {
2036 {1, 241, 2, 2 },
2037 {2, 241, 2, 7 },
2038 {3, 242, 2, 2 },
2039 {4, 242, 2, 7 },
2040 {5, 243, 2, 2 },
2041 {6, 243, 2, 7 },
2042 {7, 244, 2, 2 },
2043 {8, 244, 2, 7 },
2044 {9, 245, 2, 2 },
2045 {10, 245, 2, 7 },
2046 {11, 246, 2, 2 },
2047 {12, 246, 2, 7 },
2048 {13, 247, 2, 2 },
2049 {14, 248, 2, 4 },
2050};
2051
2052int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2053{
2054 struct hw_mode_spec *spec = &rt2x00dev->spec;
2055 struct channel_info *info;
2056 char *tx_power1;
2057 char *tx_power2;
2058 unsigned int i;
2059 u16 eeprom;
2060
2061 /*
2062 * Disable powersaving as default on PCI devices.
2063 */
2064 if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev))
2065 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2066
2067 /*
2068 * Initialize all hw fields.
2069 */
2070 rt2x00dev->hw->flags =
2071 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
2072 IEEE80211_HW_SIGNAL_DBM |
2073 IEEE80211_HW_SUPPORTS_PS |
2074 IEEE80211_HW_PS_NULLFUNC_STACK;
2075
2076 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
2077 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
2078 rt2x00_eeprom_addr(rt2x00dev,
2079 EEPROM_MAC_ADDR_0));
2080
2081 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
2082
2083 /*
2084 * Initialize hw_mode information.
2085 */
2086 spec->supported_bands = SUPPORT_BAND_2GHZ;
2087 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
2088
2089 if (rt2x00_rf(rt2x00dev, RF2820) ||
2090 rt2x00_rf(rt2x00dev, RF2720) ||
2091 rt2x00_rf(rt2x00dev, RF3052)) {
2092 spec->num_channels = 14;
2093 spec->channels = rf_vals;
2094 } else if (rt2x00_rf(rt2x00dev, RF2850) || rt2x00_rf(rt2x00dev, RF2750)) {
2095 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2096 spec->num_channels = ARRAY_SIZE(rf_vals);
2097 spec->channels = rf_vals;
2098 } else if (rt2x00_rf(rt2x00dev, RF3020) ||
2099 rt2x00_rf(rt2x00dev, RF2020) ||
2100 rt2x00_rf(rt2x00dev, RF3021) ||
2101 rt2x00_rf(rt2x00dev, RF3022)) {
2102 spec->num_channels = ARRAY_SIZE(rf_vals_302x);
2103 spec->channels = rf_vals_302x;
2104 }
2105
2106 /*
2107 * Initialize HT information.
2108 */
2109 if (!rt2x00_rf(rt2x00dev, RF2020))
2110 spec->ht.ht_supported = true;
2111 else
2112 spec->ht.ht_supported = false;
2113
2114 spec->ht.cap =
2115 IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
2116 IEEE80211_HT_CAP_GRN_FLD |
2117 IEEE80211_HT_CAP_SGI_20 |
2118 IEEE80211_HT_CAP_SGI_40 |
2119 IEEE80211_HT_CAP_TX_STBC |
2120 IEEE80211_HT_CAP_RX_STBC;
2121 spec->ht.ampdu_factor = 3;
2122 spec->ht.ampdu_density = 4;
2123 spec->ht.mcs.tx_params =
2124 IEEE80211_HT_MCS_TX_DEFINED |
2125 IEEE80211_HT_MCS_TX_RX_DIFF |
2126 ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) <<
2127 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
2128
2129 switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) {
2130 case 3:
2131 spec->ht.mcs.rx_mask[2] = 0xff;
2132 case 2:
2133 spec->ht.mcs.rx_mask[1] = 0xff;
2134 case 1:
2135 spec->ht.mcs.rx_mask[0] = 0xff;
2136 spec->ht.mcs.rx_mask[4] = 0x1; /* MCS32 */
2137 break;
2138 }
2139
2140 /*
2141 * Create channel information array
2142 */
2143 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
2144 if (!info)
2145 return -ENOMEM;
2146
2147 spec->channels_info = info;
2148
2149 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
2150 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
2151
2152 for (i = 0; i < 14; i++) {
2153 info[i].tx_power1 = TXPOWER_G_FROM_DEV(tx_power1[i]);
2154 info[i].tx_power2 = TXPOWER_G_FROM_DEV(tx_power2[i]);
2155 }
2156
2157 if (spec->num_channels > 14) {
2158 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1);
2159 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2);
2160
2161 for (i = 14; i < spec->num_channels; i++) {
2162 info[i].tx_power1 = TXPOWER_A_FROM_DEV(tx_power1[i]);
2163 info[i].tx_power2 = TXPOWER_A_FROM_DEV(tx_power2[i]);
2164 }
2165 }
2166
2167 return 0;
2168}
2169EXPORT_SYMBOL_GPL(rt2800_probe_hw_mode);
2170
2171/*
2172 * IEEE80211 stack callback functions.
2173 */
2174static void rt2800_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
2175 u32 *iv32, u16 *iv16)
2176{
2177 struct rt2x00_dev *rt2x00dev = hw->priv;
2178 struct mac_iveiv_entry iveiv_entry;
2179 u32 offset;
2180
2181 offset = MAC_IVEIV_ENTRY(hw_key_idx);
2182 rt2800_register_multiread(rt2x00dev, offset,
2183 &iveiv_entry, sizeof(iveiv_entry));
2184
2185 memcpy(iv16, &iveiv_entry.iv[0], sizeof(*iv16));
2186 memcpy(iv32, &iveiv_entry.iv[4], sizeof(*iv32));
2187}
2188
2189static int rt2800_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2190{
2191 struct rt2x00_dev *rt2x00dev = hw->priv;
2192 u32 reg;
2193 bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
2194
2195 rt2800_register_read(rt2x00dev, TX_RTS_CFG, &reg);
2196 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
2197 rt2800_register_write(rt2x00dev, TX_RTS_CFG, reg);
2198
2199 rt2800_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
2200 rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
2201 rt2800_register_write(rt2x00dev, CCK_PROT_CFG, reg);
2202
2203 rt2800_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
2204 rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
2205 rt2800_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
2206
2207 rt2800_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
2208 rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
2209 rt2800_register_write(rt2x00dev, MM20_PROT_CFG, reg);
2210
2211 rt2800_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
2212 rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
2213 rt2800_register_write(rt2x00dev, MM40_PROT_CFG, reg);
2214
2215 rt2800_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
2216 rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
2217 rt2800_register_write(rt2x00dev, GF20_PROT_CFG, reg);
2218
2219 rt2800_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
2220 rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
2221 rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg);
2222
2223 return 0;
2224}
2225
2226static int rt2800_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2227 const struct ieee80211_tx_queue_params *params)
2228{
2229 struct rt2x00_dev *rt2x00dev = hw->priv;
2230 struct data_queue *queue;
2231 struct rt2x00_field32 field;
2232 int retval;
2233 u32 reg;
2234 u32 offset;
2235
2236 /*
2237 * First pass the configuration through rt2x00lib, that will
2238 * update the queue settings and validate the input. After that
2239 * we are free to update the registers based on the value
2240 * in the queue parameter.
2241 */
2242 retval = rt2x00mac_conf_tx(hw, queue_idx, params);
2243 if (retval)
2244 return retval;
2245
2246 /*
2247 * We only need to perform additional register initialization
2248 * for WMM queues/
2249 */
2250 if (queue_idx >= 4)
2251 return 0;
2252
2253 queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
2254
2255 /* Update WMM TXOP register */
2256 offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
2257 field.bit_offset = (queue_idx & 1) * 16;
2258 field.bit_mask = 0xffff << field.bit_offset;
2259
2260 rt2800_register_read(rt2x00dev, offset, &reg);
2261 rt2x00_set_field32(&reg, field, queue->txop);
2262 rt2800_register_write(rt2x00dev, offset, reg);
2263
2264 /* Update WMM registers */
2265 field.bit_offset = queue_idx * 4;
2266 field.bit_mask = 0xf << field.bit_offset;
2267
2268 rt2800_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
2269 rt2x00_set_field32(&reg, field, queue->aifs);
2270 rt2800_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
2271
2272 rt2800_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
2273 rt2x00_set_field32(&reg, field, queue->cw_min);
2274 rt2800_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
2275
2276 rt2800_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
2277 rt2x00_set_field32(&reg, field, queue->cw_max);
2278 rt2800_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
2279
2280 /* Update EDCA registers */
2281 offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
2282
2283 rt2800_register_read(rt2x00dev, offset, &reg);
2284 rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
2285 rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
2286 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
2287 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
2288 rt2800_register_write(rt2x00dev, offset, reg);
2289
2290 return 0;
2291}
2292
2293static u64 rt2800_get_tsf(struct ieee80211_hw *hw)
2294{
2295 struct rt2x00_dev *rt2x00dev = hw->priv;
2296 u64 tsf;
2297 u32 reg;
2298
2299 rt2800_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
2300 tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
2301 rt2800_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
2302 tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
2303
2304 return tsf;
2305}
2306
2307const struct ieee80211_ops rt2800_mac80211_ops = {
2308 .tx = rt2x00mac_tx,
2309 .start = rt2x00mac_start,
2310 .stop = rt2x00mac_stop,
2311 .add_interface = rt2x00mac_add_interface,
2312 .remove_interface = rt2x00mac_remove_interface,
2313 .config = rt2x00mac_config,
2314 .configure_filter = rt2x00mac_configure_filter,
2315 .set_tim = rt2x00mac_set_tim,
2316 .set_key = rt2x00mac_set_key,
2317 .get_stats = rt2x00mac_get_stats,
2318 .get_tkip_seq = rt2800_get_tkip_seq,
2319 .set_rts_threshold = rt2800_set_rts_threshold,
2320 .bss_info_changed = rt2x00mac_bss_info_changed,
2321 .conf_tx = rt2800_conf_tx,
2322 .get_tsf = rt2800_get_tsf,
2323 .rfkill_poll = rt2x00mac_rfkill_poll,
2324};
2325EXPORT_SYMBOL_GPL(rt2800_mac80211_ops);
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.h b/drivers/net/wireless/rt2x00/rt2800lib.h
new file mode 100644
index 000000000000..ebabeae62d1b
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800lib.h
@@ -0,0 +1,150 @@
1/*
2 Copyright (C) 2009 Bartlomiej Zolnierkiewicz
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the
16 Free Software Foundation, Inc.,
17 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 */
19
20#ifndef RT2800LIB_H
21#define RT2800LIB_H
22
23struct rt2800_ops {
24 void (*register_read)(struct rt2x00_dev *rt2x00dev,
25 const unsigned int offset, u32 *value);
26 void (*register_read_lock)(struct rt2x00_dev *rt2x00dev,
27 const unsigned int offset, u32 *value);
28 void (*register_write)(struct rt2x00_dev *rt2x00dev,
29 const unsigned int offset, u32 value);
30 void (*register_write_lock)(struct rt2x00_dev *rt2x00dev,
31 const unsigned int offset, u32 value);
32
33 void (*register_multiread)(struct rt2x00_dev *rt2x00dev,
34 const unsigned int offset,
35 void *value, const u32 length);
36 void (*register_multiwrite)(struct rt2x00_dev *rt2x00dev,
37 const unsigned int offset,
38 const void *value, const u32 length);
39
40 int (*regbusy_read)(struct rt2x00_dev *rt2x00dev,
41 const unsigned int offset,
42 const struct rt2x00_field32 field, u32 *reg);
43};
44
45static inline void rt2800_register_read(struct rt2x00_dev *rt2x00dev,
46 const unsigned int offset,
47 u32 *value)
48{
49 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
50
51 rt2800ops->register_read(rt2x00dev, offset, value);
52}
53
54static inline void rt2800_register_read_lock(struct rt2x00_dev *rt2x00dev,
55 const unsigned int offset,
56 u32 *value)
57{
58 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
59
60 rt2800ops->register_read_lock(rt2x00dev, offset, value);
61}
62
63static inline void rt2800_register_write(struct rt2x00_dev *rt2x00dev,
64 const unsigned int offset,
65 u32 value)
66{
67 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
68
69 rt2800ops->register_write(rt2x00dev, offset, value);
70}
71
72static inline void rt2800_register_write_lock(struct rt2x00_dev *rt2x00dev,
73 const unsigned int offset,
74 u32 value)
75{
76 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
77
78 rt2800ops->register_write_lock(rt2x00dev, offset, value);
79}
80
81static inline void rt2800_register_multiread(struct rt2x00_dev *rt2x00dev,
82 const unsigned int offset,
83 void *value, const u32 length)
84{
85 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
86
87 rt2800ops->register_multiread(rt2x00dev, offset, value, length);
88}
89
90static inline void rt2800_register_multiwrite(struct rt2x00_dev *rt2x00dev,
91 const unsigned int offset,
92 const void *value,
93 const u32 length)
94{
95 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
96
97 rt2800ops->register_multiwrite(rt2x00dev, offset, value, length);
98}
99
100static inline int rt2800_regbusy_read(struct rt2x00_dev *rt2x00dev,
101 const unsigned int offset,
102 const struct rt2x00_field32 field,
103 u32 *reg)
104{
105 const struct rt2800_ops *rt2800ops = rt2x00dev->priv;
106
107 return rt2800ops->regbusy_read(rt2x00dev, offset, field, reg);
108}
109
110void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev,
111 const u8 command, const u8 token,
112 const u8 arg0, const u8 arg1);
113
114extern const struct rt2x00debug rt2800_rt2x00debug;
115
116int rt2800_rfkill_poll(struct rt2x00_dev *rt2x00dev);
117int rt2800_config_shared_key(struct rt2x00_dev *rt2x00dev,
118 struct rt2x00lib_crypto *crypto,
119 struct ieee80211_key_conf *key);
120int rt2800_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
121 struct rt2x00lib_crypto *crypto,
122 struct ieee80211_key_conf *key);
123void rt2800_config_filter(struct rt2x00_dev *rt2x00dev,
124 const unsigned int filter_flags);
125void rt2800_config_intf(struct rt2x00_dev *rt2x00dev, struct rt2x00_intf *intf,
126 struct rt2x00intf_conf *conf, const unsigned int flags);
127void rt2800_config_erp(struct rt2x00_dev *rt2x00dev, struct rt2x00lib_erp *erp);
128void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant);
129void rt2800_config(struct rt2x00_dev *rt2x00dev,
130 struct rt2x00lib_conf *libconf,
131 const unsigned int flags);
132void rt2800_link_stats(struct rt2x00_dev *rt2x00dev, struct link_qual *qual);
133void rt2800_reset_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual);
134void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual,
135 const u32 count);
136
137int rt2800_init_registers(struct rt2x00_dev *rt2x00dev);
138int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev);
139int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev);
140int rt2800_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev);
141
142int rt2800_efuse_detect(struct rt2x00_dev *rt2x00dev);
143void rt2800_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev);
144int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev);
145int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev);
146int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev);
147
148extern const struct ieee80211_ops rt2800_mac80211_ops;
149
150#endif /* RT2800LIB_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
new file mode 100644
index 000000000000..91cce2d0f6db
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -0,0 +1,1288 @@
1/*
2 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
6 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
7 Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
8 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
9 Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
10 <http://rt2x00.serialmonkey.com>
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the
24 Free Software Foundation, Inc.,
25 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 */
27
28/*
29 Module: rt2800pci
30 Abstract: rt2800pci device specific routines.
31 Supported chipsets: RT2800E & RT2800ED.
32 */
33
34#include <linux/crc-ccitt.h>
35#include <linux/delay.h>
36#include <linux/etherdevice.h>
37#include <linux/init.h>
38#include <linux/kernel.h>
39#include <linux/module.h>
40#include <linux/pci.h>
41#include <linux/platform_device.h>
42#include <linux/eeprom_93cx6.h>
43
44#include "rt2x00.h"
45#include "rt2x00pci.h"
46#include "rt2x00soc.h"
47#include "rt2800lib.h"
48#include "rt2800.h"
49#include "rt2800pci.h"
50
51/*
52 * Allow hardware encryption to be disabled.
53 */
54static int modparam_nohwcrypt = 1;
55module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
56MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
57
58static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
59{
60 unsigned int i;
61 u32 reg;
62
63 for (i = 0; i < 200; i++) {
64 rt2800_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
65
66 if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
67 (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
68 (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD2) == token) ||
69 (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD3) == token))
70 break;
71
72 udelay(REGISTER_BUSY_DELAY);
73 }
74
75 if (i == 200)
76 ERROR(rt2x00dev, "MCU request failed, no response from hardware\n");
77
78 rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
79 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
80}
81
82#ifdef CONFIG_RT2800PCI_SOC
83static void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev)
84{
85 u32 *base_addr = (u32 *) KSEG1ADDR(0x1F040000); /* XXX for RT3052 */
86
87 memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
88}
89#else
90static inline void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev)
91{
92}
93#endif /* CONFIG_RT2800PCI_SOC */
94
95#ifdef CONFIG_RT2800PCI_PCI
96static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
97{
98 struct rt2x00_dev *rt2x00dev = eeprom->data;
99 u32 reg;
100
101 rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
102
103 eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
104 eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
105 eeprom->reg_data_clock =
106 !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK);
107 eeprom->reg_chip_select =
108 !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT);
109}
110
111static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
112{
113 struct rt2x00_dev *rt2x00dev = eeprom->data;
114 u32 reg = 0;
115
116 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
117 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
118 rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK,
119 !!eeprom->reg_data_clock);
120 rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
121 !!eeprom->reg_chip_select);
122
123 rt2800_register_write(rt2x00dev, E2PROM_CSR, reg);
124}
125
126static void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
127{
128 struct eeprom_93cx6 eeprom;
129 u32 reg;
130
131 rt2800_register_read(rt2x00dev, E2PROM_CSR, &reg);
132
133 eeprom.data = rt2x00dev;
134 eeprom.register_read = rt2800pci_eepromregister_read;
135 eeprom.register_write = rt2800pci_eepromregister_write;
136 eeprom.width = !rt2x00_get_field32(reg, E2PROM_CSR_TYPE) ?
137 PCI_EEPROM_WIDTH_93C46 : PCI_EEPROM_WIDTH_93C66;
138 eeprom.reg_data_in = 0;
139 eeprom.reg_data_out = 0;
140 eeprom.reg_data_clock = 0;
141 eeprom.reg_chip_select = 0;
142
143 eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom,
144 EEPROM_SIZE / sizeof(u16));
145}
146
147static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
148{
149 return rt2800_efuse_detect(rt2x00dev);
150}
151
152static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
153{
154 rt2800_read_eeprom_efuse(rt2x00dev);
155}
156#else
157static inline void rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
158{
159}
160
161static inline int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
162{
163 return 0;
164}
165
166static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
167{
168}
169#endif /* CONFIG_RT2800PCI_PCI */
170
171/*
172 * Firmware functions
173 */
174static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
175{
176 return FIRMWARE_RT2860;
177}
178
179static int rt2800pci_check_firmware(struct rt2x00_dev *rt2x00dev,
180 const u8 *data, const size_t len)
181{
182 u16 fw_crc;
183 u16 crc;
184
185 /*
186 * Only support 8kb firmware files.
187 */
188 if (len != 8192)
189 return FW_BAD_LENGTH;
190
191 /*
192 * The last 2 bytes in the firmware array are the crc checksum itself,
193 * this means that we should never pass those 2 bytes to the crc
194 * algorithm.
195 */
196 fw_crc = (data[len - 2] << 8 | data[len - 1]);
197
198 /*
199 * Use the crc ccitt algorithm.
200 * This will return the same value as the legacy driver which
201 * used bit ordering reversion on the both the firmware bytes
202 * before input input as well as on the final output.
203 * Obviously using crc ccitt directly is much more efficient.
204 */
205 crc = crc_ccitt(~0, data, len - 2);
206
207 /*
208 * There is a small difference between the crc-itu-t + bitrev and
209 * the crc-ccitt crc calculation. In the latter method the 2 bytes
210 * will be swapped, use swab16 to convert the crc to the correct
211 * value.
212 */
213 crc = swab16(crc);
214
215 return (fw_crc == crc) ? FW_OK : FW_BAD_CRC;
216}
217
218static int rt2800pci_load_firmware(struct rt2x00_dev *rt2x00dev,
219 const u8 *data, const size_t len)
220{
221 unsigned int i;
222 u32 reg;
223
224 /*
225 * Wait for stable hardware.
226 */
227 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
228 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
229 if (reg && reg != ~0)
230 break;
231 msleep(1);
232 }
233
234 if (i == REGISTER_BUSY_COUNT) {
235 ERROR(rt2x00dev, "Unstable hardware.\n");
236 return -EBUSY;
237 }
238
239 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000002);
240 rt2800_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0x00000000);
241
242 /*
243 * Disable DMA, will be reenabled later when enabling
244 * the radio.
245 */
246 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
247 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
248 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
249 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
250 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
251 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
252 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
253
254 /*
255 * enable Host program ram write selection
256 */
257 reg = 0;
258 rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
259 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
260
261 /*
262 * Write firmware to device.
263 */
264 rt2800_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
265 data, len);
266
267 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
268 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
269
270 /*
271 * Wait for device to stabilize.
272 */
273 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
274 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
275 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
276 break;
277 msleep(1);
278 }
279
280 if (i == REGISTER_BUSY_COUNT) {
281 ERROR(rt2x00dev, "PBF system register not ready.\n");
282 return -EBUSY;
283 }
284
285 /*
286 * Disable interrupts
287 */
288 rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_IRQ_OFF);
289
290 /*
291 * Initialize BBP R/W access agent
292 */
293 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
294 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
295
296 return 0;
297}
298
299/*
300 * Initialization functions.
301 */
302static bool rt2800pci_get_entry_state(struct queue_entry *entry)
303{
304 struct queue_entry_priv_pci *entry_priv = entry->priv_data;
305 u32 word;
306
307 if (entry->queue->qid == QID_RX) {
308 rt2x00_desc_read(entry_priv->desc, 1, &word);
309
310 return (!rt2x00_get_field32(word, RXD_W1_DMA_DONE));
311 } else {
312 rt2x00_desc_read(entry_priv->desc, 1, &word);
313
314 return (!rt2x00_get_field32(word, TXD_W1_DMA_DONE));
315 }
316}
317
318static void rt2800pci_clear_entry(struct queue_entry *entry)
319{
320 struct queue_entry_priv_pci *entry_priv = entry->priv_data;
321 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
322 u32 word;
323
324 if (entry->queue->qid == QID_RX) {
325 rt2x00_desc_read(entry_priv->desc, 0, &word);
326 rt2x00_set_field32(&word, RXD_W0_SDP0, skbdesc->skb_dma);
327 rt2x00_desc_write(entry_priv->desc, 0, word);
328
329 rt2x00_desc_read(entry_priv->desc, 1, &word);
330 rt2x00_set_field32(&word, RXD_W1_DMA_DONE, 0);
331 rt2x00_desc_write(entry_priv->desc, 1, word);
332 } else {
333 rt2x00_desc_read(entry_priv->desc, 1, &word);
334 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 1);
335 rt2x00_desc_write(entry_priv->desc, 1, word);
336 }
337}
338
339static int rt2800pci_init_queues(struct rt2x00_dev *rt2x00dev)
340{
341 struct queue_entry_priv_pci *entry_priv;
342 u32 reg;
343
344 rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
345 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
346 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
347 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
348 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
349 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
350 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
351 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
352 rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
353
354 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
355 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
356
357 /*
358 * Initialize registers.
359 */
360 entry_priv = rt2x00dev->tx[0].entries[0].priv_data;
361 rt2800_register_write(rt2x00dev, TX_BASE_PTR0, entry_priv->desc_dma);
362 rt2800_register_write(rt2x00dev, TX_MAX_CNT0, rt2x00dev->tx[0].limit);
363 rt2800_register_write(rt2x00dev, TX_CTX_IDX0, 0);
364 rt2800_register_write(rt2x00dev, TX_DTX_IDX0, 0);
365
366 entry_priv = rt2x00dev->tx[1].entries[0].priv_data;
367 rt2800_register_write(rt2x00dev, TX_BASE_PTR1, entry_priv->desc_dma);
368 rt2800_register_write(rt2x00dev, TX_MAX_CNT1, rt2x00dev->tx[1].limit);
369 rt2800_register_write(rt2x00dev, TX_CTX_IDX1, 0);
370 rt2800_register_write(rt2x00dev, TX_DTX_IDX1, 0);
371
372 entry_priv = rt2x00dev->tx[2].entries[0].priv_data;
373 rt2800_register_write(rt2x00dev, TX_BASE_PTR2, entry_priv->desc_dma);
374 rt2800_register_write(rt2x00dev, TX_MAX_CNT2, rt2x00dev->tx[2].limit);
375 rt2800_register_write(rt2x00dev, TX_CTX_IDX2, 0);
376 rt2800_register_write(rt2x00dev, TX_DTX_IDX2, 0);
377
378 entry_priv = rt2x00dev->tx[3].entries[0].priv_data;
379 rt2800_register_write(rt2x00dev, TX_BASE_PTR3, entry_priv->desc_dma);
380 rt2800_register_write(rt2x00dev, TX_MAX_CNT3, rt2x00dev->tx[3].limit);
381 rt2800_register_write(rt2x00dev, TX_CTX_IDX3, 0);
382 rt2800_register_write(rt2x00dev, TX_DTX_IDX3, 0);
383
384 entry_priv = rt2x00dev->rx->entries[0].priv_data;
385 rt2800_register_write(rt2x00dev, RX_BASE_PTR, entry_priv->desc_dma);
386 rt2800_register_write(rt2x00dev, RX_MAX_CNT, rt2x00dev->rx[0].limit);
387 rt2800_register_write(rt2x00dev, RX_CRX_IDX, rt2x00dev->rx[0].limit - 1);
388 rt2800_register_write(rt2x00dev, RX_DRX_IDX, 0);
389
390 /*
391 * Enable global DMA configuration
392 */
393 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
394 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
395 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
396 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
397 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
398
399 rt2800_register_write(rt2x00dev, DELAY_INT_CFG, 0);
400
401 return 0;
402}
403
404/*
405 * Device state switch handlers.
406 */
407static void rt2800pci_toggle_rx(struct rt2x00_dev *rt2x00dev,
408 enum dev_state state)
409{
410 u32 reg;
411
412 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
413 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
414 (state == STATE_RADIO_RX_ON) ||
415 (state == STATE_RADIO_RX_ON_LINK));
416 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
417}
418
419static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
420 enum dev_state state)
421{
422 int mask = (state == STATE_RADIO_IRQ_ON);
423 u32 reg;
424
425 /*
426 * When interrupts are being enabled, the interrupt registers
427 * should clear the register to assure a clean state.
428 */
429 if (state == STATE_RADIO_IRQ_ON) {
430 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
431 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
432 }
433
434 rt2800_register_read(rt2x00dev, INT_MASK_CSR, &reg);
435 rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, mask);
436 rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, mask);
437 rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, mask);
438 rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, mask);
439 rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, mask);
440 rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, mask);
441 rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, mask);
442 rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, mask);
443 rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, mask);
444 rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, mask);
445 rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, mask);
446 rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, mask);
447 rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, mask);
448 rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, mask);
449 rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, mask);
450 rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, mask);
451 rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, mask);
452 rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, mask);
453 rt2800_register_write(rt2x00dev, INT_MASK_CSR, reg);
454}
455
456static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
457{
458 u32 reg;
459 u16 word;
460
461 /*
462 * Initialize all registers.
463 */
464 if (unlikely(rt2800_wait_wpdma_ready(rt2x00dev) ||
465 rt2800pci_init_queues(rt2x00dev) ||
466 rt2800_init_registers(rt2x00dev) ||
467 rt2800_wait_wpdma_ready(rt2x00dev) ||
468 rt2800_init_bbp(rt2x00dev) ||
469 rt2800_init_rfcsr(rt2x00dev)))
470 return -EIO;
471
472 /*
473 * Send signal to firmware during boot time.
474 */
475 rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
476
477 /*
478 * Enable RX.
479 */
480 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
481 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
482 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 0);
483 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
484
485 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
486 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
487 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
488 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 2);
489 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
490 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
491
492 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
493 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
494 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
495 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
496
497 /*
498 * Initialize LED control
499 */
500 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
501 rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
502 word & 0xff, (word >> 8) & 0xff);
503
504 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
505 rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
506 word & 0xff, (word >> 8) & 0xff);
507
508 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
509 rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
510 word & 0xff, (word >> 8) & 0xff);
511
512 return 0;
513}
514
515static void rt2800pci_disable_radio(struct rt2x00_dev *rt2x00dev)
516{
517 u32 reg;
518
519 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
520 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
521 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
522 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
523 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
524 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
525 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
526
527 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
528 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
529 rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
530
531 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001280);
532
533 rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
534 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, 1);
535 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, 1);
536 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, 1);
537 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, 1);
538 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX4, 1);
539 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX5, 1);
540 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DRX_IDX0, 1);
541 rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
542
543 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e1f);
544 rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000e00);
545
546 /* Wait for DMA, ignore error */
547 rt2800_wait_wpdma_ready(rt2x00dev);
548}
549
550static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
551 enum dev_state state)
552{
553 /*
554 * Always put the device to sleep (even when we intend to wakeup!)
555 * if the device is booting and wasn't asleep it will return
556 * failure when attempting to wakeup.
557 */
558 rt2800_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
559
560 if (state == STATE_AWAKE) {
561 rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKUP, 0, 0);
562 rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKUP);
563 }
564
565 return 0;
566}
567
568static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
569 enum dev_state state)
570{
571 int retval = 0;
572
573 switch (state) {
574 case STATE_RADIO_ON:
575 /*
576 * Before the radio can be enabled, the device first has
577 * to be woken up. After that it needs a bit of time
578 * to be fully awake and then the radio can be enabled.
579 */
580 rt2800pci_set_state(rt2x00dev, STATE_AWAKE);
581 msleep(1);
582 retval = rt2800pci_enable_radio(rt2x00dev);
583 break;
584 case STATE_RADIO_OFF:
585 /*
586 * After the radio has been disabled, the device should
587 * be put to sleep for powersaving.
588 */
589 rt2800pci_disable_radio(rt2x00dev);
590 rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
591 break;
592 case STATE_RADIO_RX_ON:
593 case STATE_RADIO_RX_ON_LINK:
594 case STATE_RADIO_RX_OFF:
595 case STATE_RADIO_RX_OFF_LINK:
596 rt2800pci_toggle_rx(rt2x00dev, state);
597 break;
598 case STATE_RADIO_IRQ_ON:
599 case STATE_RADIO_IRQ_OFF:
600 rt2800pci_toggle_irq(rt2x00dev, state);
601 break;
602 case STATE_DEEP_SLEEP:
603 case STATE_SLEEP:
604 case STATE_STANDBY:
605 case STATE_AWAKE:
606 retval = rt2800pci_set_state(rt2x00dev, state);
607 break;
608 default:
609 retval = -ENOTSUPP;
610 break;
611 }
612
613 if (unlikely(retval))
614 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
615 state, retval);
616
617 return retval;
618}
619
620/*
621 * TX descriptor initialization
622 */
623static void rt2800pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
624 struct sk_buff *skb,
625 struct txentry_desc *txdesc)
626{
627 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
628 __le32 *txd = skbdesc->desc;
629 __le32 *txwi = (__le32 *)(skb->data - rt2x00dev->ops->extra_tx_headroom);
630 u32 word;
631
632 /*
633 * Initialize TX Info descriptor
634 */
635 rt2x00_desc_read(txwi, 0, &word);
636 rt2x00_set_field32(&word, TXWI_W0_FRAG,
637 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
638 rt2x00_set_field32(&word, TXWI_W0_MIMO_PS, 0);
639 rt2x00_set_field32(&word, TXWI_W0_CF_ACK, 0);
640 rt2x00_set_field32(&word, TXWI_W0_TS,
641 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
642 rt2x00_set_field32(&word, TXWI_W0_AMPDU,
643 test_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags));
644 rt2x00_set_field32(&word, TXWI_W0_MPDU_DENSITY, txdesc->mpdu_density);
645 rt2x00_set_field32(&word, TXWI_W0_TX_OP, txdesc->ifs);
646 rt2x00_set_field32(&word, TXWI_W0_MCS, txdesc->mcs);
647 rt2x00_set_field32(&word, TXWI_W0_BW,
648 test_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags));
649 rt2x00_set_field32(&word, TXWI_W0_SHORT_GI,
650 test_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags));
651 rt2x00_set_field32(&word, TXWI_W0_STBC, txdesc->stbc);
652 rt2x00_set_field32(&word, TXWI_W0_PHYMODE, txdesc->rate_mode);
653 rt2x00_desc_write(txwi, 0, word);
654
655 rt2x00_desc_read(txwi, 1, &word);
656 rt2x00_set_field32(&word, TXWI_W1_ACK,
657 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
658 rt2x00_set_field32(&word, TXWI_W1_NSEQ,
659 test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags));
660 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size);
661 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
662 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
663 txdesc->key_idx : 0xff);
664 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
665 skb->len - txdesc->l2pad);
666 rt2x00_set_field32(&word, TXWI_W1_PACKETID,
667 skbdesc->entry->queue->qid + 1);
668 rt2x00_desc_write(txwi, 1, word);
669
670 /*
671 * Always write 0 to IV/EIV fields, hardware will insert the IV
672 * from the IVEIV register when TXD_W3_WIV is set to 0.
673 * When TXD_W3_WIV is set to 1 it will use the IV data
674 * from the descriptor. The TXWI_W1_WIRELESS_CLI_ID indicates which
675 * crypto entry in the registers should be used to encrypt the frame.
676 */
677 _rt2x00_desc_write(txwi, 2, 0 /* skbdesc->iv[0] */);
678 _rt2x00_desc_write(txwi, 3, 0 /* skbdesc->iv[1] */);
679
680 /*
681 * The buffers pointed by SD_PTR0/SD_LEN0 and SD_PTR1/SD_LEN1
682 * must contains a TXWI structure + 802.11 header + padding + 802.11
683 * data. We choose to have SD_PTR0/SD_LEN0 only contains TXWI and
684 * SD_PTR1/SD_LEN1 contains 802.11 header + padding + 802.11
685 * data. It means that LAST_SEC0 is always 0.
686 */
687
688 /*
689 * Initialize TX descriptor
690 */
691 rt2x00_desc_read(txd, 0, &word);
692 rt2x00_set_field32(&word, TXD_W0_SD_PTR0, skbdesc->skb_dma);
693 rt2x00_desc_write(txd, 0, word);
694
695 rt2x00_desc_read(txd, 1, &word);
696 rt2x00_set_field32(&word, TXD_W1_SD_LEN1, skb->len);
697 rt2x00_set_field32(&word, TXD_W1_LAST_SEC1,
698 !test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
699 rt2x00_set_field32(&word, TXD_W1_BURST,
700 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
701 rt2x00_set_field32(&word, TXD_W1_SD_LEN0,
702 rt2x00dev->ops->extra_tx_headroom);
703 rt2x00_set_field32(&word, TXD_W1_LAST_SEC0, 0);
704 rt2x00_set_field32(&word, TXD_W1_DMA_DONE, 0);
705 rt2x00_desc_write(txd, 1, word);
706
707 rt2x00_desc_read(txd, 2, &word);
708 rt2x00_set_field32(&word, TXD_W2_SD_PTR1,
709 skbdesc->skb_dma + rt2x00dev->ops->extra_tx_headroom);
710 rt2x00_desc_write(txd, 2, word);
711
712 rt2x00_desc_read(txd, 3, &word);
713 rt2x00_set_field32(&word, TXD_W3_WIV,
714 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
715 rt2x00_set_field32(&word, TXD_W3_QSEL, 2);
716 rt2x00_desc_write(txd, 3, word);
717}
718
719/*
720 * TX data initialization
721 */
722static void rt2800pci_write_beacon(struct queue_entry *entry)
723{
724 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
725 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
726 unsigned int beacon_base;
727 u32 reg;
728
729 /*
730 * Disable beaconing while we are reloading the beacon data,
731 * otherwise we might be sending out invalid data.
732 */
733 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
734 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
735 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
736
737 /*
738 * Write entire beacon with descriptor to register.
739 */
740 beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
741 rt2800_register_multiwrite(rt2x00dev,
742 beacon_base,
743 skbdesc->desc, skbdesc->desc_len);
744 rt2800_register_multiwrite(rt2x00dev,
745 beacon_base + skbdesc->desc_len,
746 entry->skb->data, entry->skb->len);
747
748 /*
749 * Clean up beacon skb.
750 */
751 dev_kfree_skb_any(entry->skb);
752 entry->skb = NULL;
753}
754
755static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
756 const enum data_queue_qid queue_idx)
757{
758 struct data_queue *queue;
759 unsigned int idx, qidx = 0;
760 u32 reg;
761
762 if (queue_idx == QID_BEACON) {
763 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
764 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
765 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
766 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
767 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
768 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
769 }
770 return;
771 }
772
773 if (queue_idx > QID_HCCA && queue_idx != QID_MGMT)
774 return;
775
776 queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
777 idx = queue->index[Q_INDEX];
778
779 if (queue_idx == QID_MGMT)
780 qidx = 5;
781 else
782 qidx = queue_idx;
783
784 rt2800_register_write(rt2x00dev, TX_CTX_IDX(qidx), idx);
785}
786
787static void rt2800pci_kill_tx_queue(struct rt2x00_dev *rt2x00dev,
788 const enum data_queue_qid qid)
789{
790 u32 reg;
791
792 if (qid == QID_BEACON) {
793 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, 0);
794 return;
795 }
796
797 rt2800_register_read(rt2x00dev, WPDMA_RST_IDX, &reg);
798 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX0, (qid == QID_AC_BE));
799 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX1, (qid == QID_AC_BK));
800 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX2, (qid == QID_AC_VI));
801 rt2x00_set_field32(&reg, WPDMA_RST_IDX_DTX_IDX3, (qid == QID_AC_VO));
802 rt2800_register_write(rt2x00dev, WPDMA_RST_IDX, reg);
803}
804
805/*
806 * RX control handlers
807 */
808static void rt2800pci_fill_rxdone(struct queue_entry *entry,
809 struct rxdone_entry_desc *rxdesc)
810{
811 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
812 struct queue_entry_priv_pci *entry_priv = entry->priv_data;
813 __le32 *rxd = entry_priv->desc;
814 __le32 *rxwi = (__le32 *)entry->skb->data;
815 u32 rxd3;
816 u32 rxwi0;
817 u32 rxwi1;
818 u32 rxwi2;
819 u32 rxwi3;
820
821 rt2x00_desc_read(rxd, 3, &rxd3);
822 rt2x00_desc_read(rxwi, 0, &rxwi0);
823 rt2x00_desc_read(rxwi, 1, &rxwi1);
824 rt2x00_desc_read(rxwi, 2, &rxwi2);
825 rt2x00_desc_read(rxwi, 3, &rxwi3);
826
827 if (rt2x00_get_field32(rxd3, RXD_W3_CRC_ERROR))
828 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
829
830 if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
831 /*
832 * Unfortunately we don't know the cipher type used during
833 * decryption. This prevents us from correct providing
834 * correct statistics through debugfs.
835 */
836 rxdesc->cipher = rt2x00_get_field32(rxwi0, RXWI_W0_UDF);
837 rxdesc->cipher_status =
838 rt2x00_get_field32(rxd3, RXD_W3_CIPHER_ERROR);
839 }
840
841 if (rt2x00_get_field32(rxd3, RXD_W3_DECRYPTED)) {
842 /*
843 * Hardware has stripped IV/EIV data from 802.11 frame during
844 * decryption. Unfortunately the descriptor doesn't contain
845 * any fields with the EIV/IV data either, so they can't
846 * be restored by rt2x00lib.
847 */
848 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
849
850 if (rxdesc->cipher_status == RX_CRYPTO_SUCCESS)
851 rxdesc->flags |= RX_FLAG_DECRYPTED;
852 else if (rxdesc->cipher_status == RX_CRYPTO_FAIL_MIC)
853 rxdesc->flags |= RX_FLAG_MMIC_ERROR;
854 }
855
856 if (rt2x00_get_field32(rxd3, RXD_W3_MY_BSS))
857 rxdesc->dev_flags |= RXDONE_MY_BSS;
858
859 if (rt2x00_get_field32(rxd3, RXD_W3_L2PAD))
860 rxdesc->dev_flags |= RXDONE_L2PAD;
861
862 if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
863 rxdesc->flags |= RX_FLAG_SHORT_GI;
864
865 if (rt2x00_get_field32(rxwi1, RXWI_W1_BW))
866 rxdesc->flags |= RX_FLAG_40MHZ;
867
868 /*
869 * Detect RX rate, always use MCS as signal type.
870 */
871 rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
872 rxdesc->rate_mode = rt2x00_get_field32(rxwi1, RXWI_W1_PHYMODE);
873 rxdesc->signal = rt2x00_get_field32(rxwi1, RXWI_W1_MCS);
874
875 /*
876 * Mask of 0x8 bit to remove the short preamble flag.
877 */
878 if (rxdesc->rate_mode == RATE_MODE_CCK)
879 rxdesc->signal &= ~0x8;
880
881 rxdesc->rssi =
882 (rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
883 rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
884
885 rxdesc->noise =
886 (rt2x00_get_field32(rxwi3, RXWI_W3_SNR0) +
887 rt2x00_get_field32(rxwi3, RXWI_W3_SNR1)) / 2;
888
889 rxdesc->size = rt2x00_get_field32(rxwi0, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
890
891 /*
892 * Set RX IDX in register to inform hardware that we have handled
893 * this entry and it is available for reuse again.
894 */
895 rt2800_register_write(rt2x00dev, RX_CRX_IDX, entry->entry_idx);
896
897 /*
898 * Remove TXWI descriptor from start of buffer.
899 */
900 skb_pull(entry->skb, RXWI_DESC_SIZE);
901}
902
903/*
904 * Interrupt functions.
905 */
906static void rt2800pci_txdone(struct rt2x00_dev *rt2x00dev)
907{
908 struct data_queue *queue;
909 struct queue_entry *entry;
910 struct queue_entry *entry_done;
911 struct queue_entry_priv_pci *entry_priv;
912 struct txdone_entry_desc txdesc;
913 u32 word;
914 u32 reg;
915 u32 old_reg;
916 unsigned int type;
917 unsigned int index;
918 u16 mcs, real_mcs;
919
920 /*
921 * During each loop we will compare the freshly read
922 * TX_STA_FIFO register value with the value read from
923 * the previous loop. If the 2 values are equal then
924 * we should stop processing because the chance it
925 * quite big that the device has been unplugged and
926 * we risk going into an endless loop.
927 */
928 old_reg = 0;
929
930 while (1) {
931 rt2800_register_read(rt2x00dev, TX_STA_FIFO, &reg);
932 if (!rt2x00_get_field32(reg, TX_STA_FIFO_VALID))
933 break;
934
935 if (old_reg == reg)
936 break;
937 old_reg = reg;
938
939 /*
940 * Skip this entry when it contains an invalid
941 * queue identication number.
942 */
943 type = rt2x00_get_field32(reg, TX_STA_FIFO_PID_TYPE) - 1;
944 if (type >= QID_RX)
945 continue;
946
947 queue = rt2x00queue_get_queue(rt2x00dev, type);
948 if (unlikely(!queue))
949 continue;
950
951 /*
952 * Skip this entry when it contains an invalid
953 * index number.
954 */
955 index = rt2x00_get_field32(reg, TX_STA_FIFO_WCID) - 1;
956 if (unlikely(index >= queue->limit))
957 continue;
958
959 entry = &queue->entries[index];
960 entry_priv = entry->priv_data;
961 rt2x00_desc_read((__le32 *)entry->skb->data, 0, &word);
962
963 entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
964 while (entry != entry_done) {
965 /*
966 * Catch up.
967 * Just report any entries we missed as failed.
968 */
969 WARNING(rt2x00dev,
970 "TX status report missed for entry %d\n",
971 entry_done->entry_idx);
972
973 txdesc.flags = 0;
974 __set_bit(TXDONE_UNKNOWN, &txdesc.flags);
975 txdesc.retry = 0;
976
977 rt2x00lib_txdone(entry_done, &txdesc);
978 entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
979 }
980
981 /*
982 * Obtain the status about this packet.
983 */
984 txdesc.flags = 0;
985 if (rt2x00_get_field32(reg, TX_STA_FIFO_TX_SUCCESS))
986 __set_bit(TXDONE_SUCCESS, &txdesc.flags);
987 else
988 __set_bit(TXDONE_FAILURE, &txdesc.flags);
989
990 /*
991 * Ralink has a retry mechanism using a global fallback
992 * table. We setup this fallback table to try immediate
993 * lower rate for all rates. In the TX_STA_FIFO,
994 * the MCS field contains the MCS used for the successfull
995 * transmission. If the first transmission succeed,
996 * we have mcs == tx_mcs. On the second transmission,
997 * we have mcs = tx_mcs - 1. So the number of
998 * retry is (tx_mcs - mcs).
999 */
1000 mcs = rt2x00_get_field32(word, TXWI_W0_MCS);
1001 real_mcs = rt2x00_get_field32(reg, TX_STA_FIFO_MCS);
1002 __set_bit(TXDONE_FALLBACK, &txdesc.flags);
1003 txdesc.retry = mcs - min(mcs, real_mcs);
1004
1005 rt2x00lib_txdone(entry, &txdesc);
1006 }
1007}
1008
1009static irqreturn_t rt2800pci_interrupt(int irq, void *dev_instance)
1010{
1011 struct rt2x00_dev *rt2x00dev = dev_instance;
1012 u32 reg;
1013
1014 /* Read status and ACK all interrupts */
1015 rt2800_register_read(rt2x00dev, INT_SOURCE_CSR, &reg);
1016 rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, reg);
1017
1018 if (!reg)
1019 return IRQ_NONE;
1020
1021 if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
1022 return IRQ_HANDLED;
1023
1024 /*
1025 * 1 - Rx ring done interrupt.
1026 */
1027 if (rt2x00_get_field32(reg, INT_SOURCE_CSR_RX_DONE))
1028 rt2x00pci_rxdone(rt2x00dev);
1029
1030 if (rt2x00_get_field32(reg, INT_SOURCE_CSR_TX_FIFO_STATUS))
1031 rt2800pci_txdone(rt2x00dev);
1032
1033 return IRQ_HANDLED;
1034}
1035
1036/*
1037 * Device probe functions.
1038 */
1039static int rt2800pci_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1040{
1041 /*
1042 * Read EEPROM into buffer
1043 */
1044 if (rt2x00_is_soc(rt2x00dev))
1045 rt2800pci_read_eeprom_soc(rt2x00dev);
1046 else if (rt2800pci_efuse_detect(rt2x00dev))
1047 rt2800pci_read_eeprom_efuse(rt2x00dev);
1048 else
1049 rt2800pci_read_eeprom_pci(rt2x00dev);
1050
1051 return rt2800_validate_eeprom(rt2x00dev);
1052}
1053
1054static const struct rt2800_ops rt2800pci_rt2800_ops = {
1055 .register_read = rt2x00pci_register_read,
1056 .register_read_lock = rt2x00pci_register_read, /* same for PCI */
1057 .register_write = rt2x00pci_register_write,
1058 .register_write_lock = rt2x00pci_register_write, /* same for PCI */
1059
1060 .register_multiread = rt2x00pci_register_multiread,
1061 .register_multiwrite = rt2x00pci_register_multiwrite,
1062
1063 .regbusy_read = rt2x00pci_regbusy_read,
1064};
1065
1066static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1067{
1068 int retval;
1069
1070 rt2x00dev->priv = (void *)&rt2800pci_rt2800_ops;
1071
1072 /*
1073 * Allocate eeprom data.
1074 */
1075 retval = rt2800pci_validate_eeprom(rt2x00dev);
1076 if (retval)
1077 return retval;
1078
1079 retval = rt2800_init_eeprom(rt2x00dev);
1080 if (retval)
1081 return retval;
1082
1083 /*
1084 * Initialize hw specifications.
1085 */
1086 retval = rt2800_probe_hw_mode(rt2x00dev);
1087 if (retval)
1088 return retval;
1089
1090 /*
1091 * This device has multiple filters for control frames
1092 * and has a separate filter for PS Poll frames.
1093 */
1094 __set_bit(DRIVER_SUPPORT_CONTROL_FILTERS, &rt2x00dev->flags);
1095 __set_bit(DRIVER_SUPPORT_CONTROL_FILTER_PSPOLL, &rt2x00dev->flags);
1096
1097 /*
1098 * This device requires firmware.
1099 */
1100 if (!rt2x00_is_soc(rt2x00dev))
1101 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1102 __set_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags);
1103 __set_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags);
1104 if (!modparam_nohwcrypt)
1105 __set_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags);
1106
1107 /*
1108 * Set the rssi offset.
1109 */
1110 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1111
1112 return 0;
1113}
1114
1115static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
1116 .irq_handler = rt2800pci_interrupt,
1117 .probe_hw = rt2800pci_probe_hw,
1118 .get_firmware_name = rt2800pci_get_firmware_name,
1119 .check_firmware = rt2800pci_check_firmware,
1120 .load_firmware = rt2800pci_load_firmware,
1121 .initialize = rt2x00pci_initialize,
1122 .uninitialize = rt2x00pci_uninitialize,
1123 .get_entry_state = rt2800pci_get_entry_state,
1124 .clear_entry = rt2800pci_clear_entry,
1125 .set_device_state = rt2800pci_set_device_state,
1126 .rfkill_poll = rt2800_rfkill_poll,
1127 .link_stats = rt2800_link_stats,
1128 .reset_tuner = rt2800_reset_tuner,
1129 .link_tuner = rt2800_link_tuner,
1130 .write_tx_desc = rt2800pci_write_tx_desc,
1131 .write_tx_data = rt2x00pci_write_tx_data,
1132 .write_beacon = rt2800pci_write_beacon,
1133 .kick_tx_queue = rt2800pci_kick_tx_queue,
1134 .kill_tx_queue = rt2800pci_kill_tx_queue,
1135 .fill_rxdone = rt2800pci_fill_rxdone,
1136 .config_shared_key = rt2800_config_shared_key,
1137 .config_pairwise_key = rt2800_config_pairwise_key,
1138 .config_filter = rt2800_config_filter,
1139 .config_intf = rt2800_config_intf,
1140 .config_erp = rt2800_config_erp,
1141 .config_ant = rt2800_config_ant,
1142 .config = rt2800_config,
1143};
1144
1145static const struct data_queue_desc rt2800pci_queue_rx = {
1146 .entry_num = RX_ENTRIES,
1147 .data_size = AGGREGATION_SIZE,
1148 .desc_size = RXD_DESC_SIZE,
1149 .priv_size = sizeof(struct queue_entry_priv_pci),
1150};
1151
1152static const struct data_queue_desc rt2800pci_queue_tx = {
1153 .entry_num = TX_ENTRIES,
1154 .data_size = AGGREGATION_SIZE,
1155 .desc_size = TXD_DESC_SIZE,
1156 .priv_size = sizeof(struct queue_entry_priv_pci),
1157};
1158
1159static const struct data_queue_desc rt2800pci_queue_bcn = {
1160 .entry_num = 8 * BEACON_ENTRIES,
1161 .data_size = 0, /* No DMA required for beacons */
1162 .desc_size = TXWI_DESC_SIZE,
1163 .priv_size = sizeof(struct queue_entry_priv_pci),
1164};
1165
1166static const struct rt2x00_ops rt2800pci_ops = {
1167 .name = KBUILD_MODNAME,
1168 .max_sta_intf = 1,
1169 .max_ap_intf = 8,
1170 .eeprom_size = EEPROM_SIZE,
1171 .rf_size = RF_SIZE,
1172 .tx_queues = NUM_TX_QUEUES,
1173 .extra_tx_headroom = TXWI_DESC_SIZE,
1174 .rx = &rt2800pci_queue_rx,
1175 .tx = &rt2800pci_queue_tx,
1176 .bcn = &rt2800pci_queue_bcn,
1177 .lib = &rt2800pci_rt2x00_ops,
1178 .hw = &rt2800_mac80211_ops,
1179#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1180 .debugfs = &rt2800_rt2x00debug,
1181#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1182};
1183
1184/*
1185 * RT2800pci module information.
1186 */
1187static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
1188 { PCI_DEVICE(0x1814, 0x0601), PCI_DEVICE_DATA(&rt2800pci_ops) },
1189 { PCI_DEVICE(0x1814, 0x0681), PCI_DEVICE_DATA(&rt2800pci_ops) },
1190 { PCI_DEVICE(0x1814, 0x0701), PCI_DEVICE_DATA(&rt2800pci_ops) },
1191 { PCI_DEVICE(0x1814, 0x0781), PCI_DEVICE_DATA(&rt2800pci_ops) },
1192 { PCI_DEVICE(0x1432, 0x7708), PCI_DEVICE_DATA(&rt2800pci_ops) },
1193 { PCI_DEVICE(0x1432, 0x7727), PCI_DEVICE_DATA(&rt2800pci_ops) },
1194 { PCI_DEVICE(0x1432, 0x7728), PCI_DEVICE_DATA(&rt2800pci_ops) },
1195 { PCI_DEVICE(0x1432, 0x7738), PCI_DEVICE_DATA(&rt2800pci_ops) },
1196 { PCI_DEVICE(0x1432, 0x7748), PCI_DEVICE_DATA(&rt2800pci_ops) },
1197 { PCI_DEVICE(0x1432, 0x7758), PCI_DEVICE_DATA(&rt2800pci_ops) },
1198 { PCI_DEVICE(0x1432, 0x7768), PCI_DEVICE_DATA(&rt2800pci_ops) },
1199 { PCI_DEVICE(0x1a3b, 0x1059), PCI_DEVICE_DATA(&rt2800pci_ops) },
1200#ifdef CONFIG_RT2800PCI_RT30XX
1201 { PCI_DEVICE(0x1814, 0x3090), PCI_DEVICE_DATA(&rt2800pci_ops) },
1202 { PCI_DEVICE(0x1814, 0x3091), PCI_DEVICE_DATA(&rt2800pci_ops) },
1203 { PCI_DEVICE(0x1814, 0x3092), PCI_DEVICE_DATA(&rt2800pci_ops) },
1204 { PCI_DEVICE(0x1462, 0x891a), PCI_DEVICE_DATA(&rt2800pci_ops) },
1205#endif
1206#ifdef CONFIG_RT2800PCI_RT35XX
1207 { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) },
1208 { PCI_DEVICE(0x1814, 0x3062), PCI_DEVICE_DATA(&rt2800pci_ops) },
1209 { PCI_DEVICE(0x1814, 0x3562), PCI_DEVICE_DATA(&rt2800pci_ops) },
1210 { PCI_DEVICE(0x1814, 0x3592), PCI_DEVICE_DATA(&rt2800pci_ops) },
1211#endif
1212 { 0, }
1213};
1214
1215MODULE_AUTHOR(DRV_PROJECT);
1216MODULE_VERSION(DRV_VERSION);
1217MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
1218MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards");
1219#ifdef CONFIG_RT2800PCI_PCI
1220MODULE_FIRMWARE(FIRMWARE_RT2860);
1221MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
1222#endif /* CONFIG_RT2800PCI_PCI */
1223MODULE_LICENSE("GPL");
1224
1225#ifdef CONFIG_RT2800PCI_SOC
1226static int rt2800soc_probe(struct platform_device *pdev)
1227{
1228 return rt2x00soc_probe(pdev, &rt2800pci_ops);
1229}
1230
1231static struct platform_driver rt2800soc_driver = {
1232 .driver = {
1233 .name = "rt2800_wmac",
1234 .owner = THIS_MODULE,
1235 .mod_name = KBUILD_MODNAME,
1236 },
1237 .probe = rt2800soc_probe,
1238 .remove = __devexit_p(rt2x00soc_remove),
1239 .suspend = rt2x00soc_suspend,
1240 .resume = rt2x00soc_resume,
1241};
1242#endif /* CONFIG_RT2800PCI_SOC */
1243
1244#ifdef CONFIG_RT2800PCI_PCI
1245static struct pci_driver rt2800pci_driver = {
1246 .name = KBUILD_MODNAME,
1247 .id_table = rt2800pci_device_table,
1248 .probe = rt2x00pci_probe,
1249 .remove = __devexit_p(rt2x00pci_remove),
1250 .suspend = rt2x00pci_suspend,
1251 .resume = rt2x00pci_resume,
1252};
1253#endif /* CONFIG_RT2800PCI_PCI */
1254
1255static int __init rt2800pci_init(void)
1256{
1257 int ret = 0;
1258
1259#ifdef CONFIG_RT2800PCI_SOC
1260 ret = platform_driver_register(&rt2800soc_driver);
1261 if (ret)
1262 return ret;
1263#endif
1264#ifdef CONFIG_RT2800PCI_PCI
1265 ret = pci_register_driver(&rt2800pci_driver);
1266 if (ret) {
1267#ifdef CONFIG_RT2800PCI_SOC
1268 platform_driver_unregister(&rt2800soc_driver);
1269#endif
1270 return ret;
1271 }
1272#endif
1273
1274 return ret;
1275}
1276
1277static void __exit rt2800pci_exit(void)
1278{
1279#ifdef CONFIG_RT2800PCI_PCI
1280 pci_unregister_driver(&rt2800pci_driver);
1281#endif
1282#ifdef CONFIG_RT2800PCI_SOC
1283 platform_driver_unregister(&rt2800soc_driver);
1284#endif
1285}
1286
1287module_init(rt2800pci_init);
1288module_exit(rt2800pci_exit);
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.h b/drivers/net/wireless/rt2x00/rt2800pci.h
new file mode 100644
index 000000000000..afc8e7da27cb
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2800pci.h
@@ -0,0 +1,159 @@
1/*
2 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
6 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
7 Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
8 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
9 Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
10 <http://rt2x00.serialmonkey.com>
11
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2 of the License, or
15 (at your option) any later version.
16
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
21
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the
24 Free Software Foundation, Inc.,
25 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 */
27
28/*
29 Module: rt2800pci
30 Abstract: Data structures and registers for the rt2800pci module.
31 Supported chipsets: RT2800E & RT2800ED.
32 */
33
34#ifndef RT2800PCI_H
35#define RT2800PCI_H
36
37/*
38 * PCI registers.
39 */
40
41/*
42 * E2PROM_CSR: EEPROM control register.
43 * RELOAD: Write 1 to reload eeprom content.
44 * TYPE: 0: 93c46, 1:93c66.
45 * LOAD_STATUS: 1:loading, 0:done.
46 */
47#define E2PROM_CSR 0x0004
48#define E2PROM_CSR_DATA_CLOCK FIELD32(0x00000001)
49#define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002)
50#define E2PROM_CSR_DATA_IN FIELD32(0x00000004)
51#define E2PROM_CSR_DATA_OUT FIELD32(0x00000008)
52#define E2PROM_CSR_TYPE FIELD32(0x00000030)
53#define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040)
54#define E2PROM_CSR_RELOAD FIELD32(0x00000080)
55
56/*
57 * Queue register offset macros
58 */
59#define TX_QUEUE_REG_OFFSET 0x10
60#define TX_BASE_PTR(__x) TX_BASE_PTR0 + ((__x) * TX_QUEUE_REG_OFFSET)
61#define TX_MAX_CNT(__x) TX_MAX_CNT0 + ((__x) * TX_QUEUE_REG_OFFSET)
62#define TX_CTX_IDX(__x) TX_CTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)
63#define TX_DTX_IDX(__x) TX_DTX_IDX0 + ((__x) * TX_QUEUE_REG_OFFSET)
64
65/*
66 * 8051 firmware image.
67 */
68#define FIRMWARE_RT2860 "rt2860.bin"
69#define FIRMWARE_IMAGE_BASE 0x2000
70
71/*
72 * DMA descriptor defines.
73 */
74#define TXD_DESC_SIZE ( 4 * sizeof(__le32) )
75#define RXD_DESC_SIZE ( 4 * sizeof(__le32) )
76
77/*
78 * TX descriptor format for TX, PRIO and Beacon Ring.
79 */
80
81/*
82 * Word0
83 */
84#define TXD_W0_SD_PTR0 FIELD32(0xffffffff)
85
86/*
87 * Word1
88 */
89#define TXD_W1_SD_LEN1 FIELD32(0x00003fff)
90#define TXD_W1_LAST_SEC1 FIELD32(0x00004000)
91#define TXD_W1_BURST FIELD32(0x00008000)
92#define TXD_W1_SD_LEN0 FIELD32(0x3fff0000)
93#define TXD_W1_LAST_SEC0 FIELD32(0x40000000)
94#define TXD_W1_DMA_DONE FIELD32(0x80000000)
95
96/*
97 * Word2
98 */
99#define TXD_W2_SD_PTR1 FIELD32(0xffffffff)
100
101/*
102 * Word3
103 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
104 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
105 * 0:MGMT, 1:HCCA 2:EDCA
106 */
107#define TXD_W3_WIV FIELD32(0x01000000)
108#define TXD_W3_QSEL FIELD32(0x06000000)
109#define TXD_W3_TCO FIELD32(0x20000000)
110#define TXD_W3_UCO FIELD32(0x40000000)
111#define TXD_W3_ICO FIELD32(0x80000000)
112
113/*
114 * RX descriptor format for RX Ring.
115 */
116
117/*
118 * Word0
119 */
120#define RXD_W0_SDP0 FIELD32(0xffffffff)
121
122/*
123 * Word1
124 */
125#define RXD_W1_SDL1 FIELD32(0x00003fff)
126#define RXD_W1_SDL0 FIELD32(0x3fff0000)
127#define RXD_W1_LS0 FIELD32(0x40000000)
128#define RXD_W1_DMA_DONE FIELD32(0x80000000)
129
130/*
131 * Word2
132 */
133#define RXD_W2_SDP1 FIELD32(0xffffffff)
134
135/*
136 * Word3
137 * AMSDU: RX with 802.3 header, not 802.11 header.
138 * DECRYPTED: This frame is being decrypted.
139 */
140#define RXD_W3_BA FIELD32(0x00000001)
141#define RXD_W3_DATA FIELD32(0x00000002)
142#define RXD_W3_NULLDATA FIELD32(0x00000004)
143#define RXD_W3_FRAG FIELD32(0x00000008)
144#define RXD_W3_UNICAST_TO_ME FIELD32(0x00000010)
145#define RXD_W3_MULTICAST FIELD32(0x00000020)
146#define RXD_W3_BROADCAST FIELD32(0x00000040)
147#define RXD_W3_MY_BSS FIELD32(0x00000080)
148#define RXD_W3_CRC_ERROR FIELD32(0x00000100)
149#define RXD_W3_CIPHER_ERROR FIELD32(0x00000600)
150#define RXD_W3_AMSDU FIELD32(0x00000800)
151#define RXD_W3_HTC FIELD32(0x00001000)
152#define RXD_W3_RSSI FIELD32(0x00002000)
153#define RXD_W3_L2PAD FIELD32(0x00004000)
154#define RXD_W3_AMPDU FIELD32(0x00008000)
155#define RXD_W3_DECRYPTED FIELD32(0x00010000)
156#define RXD_W3_PLCP_SIGNAL FIELD32(0x00020000)
157#define RXD_W3_PLCP_RSSI FIELD32(0x00040000)
158
159#endif /* RT2800PCI_H */
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index 9fe770f7d7bb..d27d7d5d850c 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -1,5 +1,9 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
6 Copyright (C) 2009 Axel Kollhofer <rain_maker@root-forum.org>
3 <http://rt2x00.serialmonkey.com> 7 <http://rt2x00.serialmonkey.com>
4 8
5 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
@@ -34,6 +38,8 @@
34 38
35#include "rt2x00.h" 39#include "rt2x00.h"
36#include "rt2x00usb.h" 40#include "rt2x00usb.h"
41#include "rt2800lib.h"
42#include "rt2800.h"
37#include "rt2800usb.h" 43#include "rt2800usb.h"
38 44
39/* 45/*
@@ -44,1027 +50,6 @@ module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
44MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); 50MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
45 51
46/* 52/*
47 * Register access.
48 * All access to the CSR registers will go through the methods
49 * rt2x00usb_register_read and rt2x00usb_register_write.
50 * BBP and RF register require indirect register access,
51 * and use the CSR registers BBPCSR and RFCSR to achieve this.
52 * These indirect registers work with busy bits,
53 * and we will try maximal REGISTER_BUSY_COUNT times to access
54 * the register while taking a REGISTER_BUSY_DELAY us delay
55 * between each attampt. When the busy bit is still set at that time,
56 * the access attempt is considered to have failed,
57 * and we will print an error.
58 * The _lock versions must be used if you already hold the csr_mutex
59 */
60#define WAIT_FOR_BBP(__dev, __reg) \
61 rt2x00usb_regbusy_read((__dev), BBP_CSR_CFG, BBP_CSR_CFG_BUSY, (__reg))
62#define WAIT_FOR_RFCSR(__dev, __reg) \
63 rt2x00usb_regbusy_read((__dev), RF_CSR_CFG, RF_CSR_CFG_BUSY, (__reg))
64#define WAIT_FOR_RF(__dev, __reg) \
65 rt2x00usb_regbusy_read((__dev), RF_CSR_CFG0, RF_CSR_CFG0_BUSY, (__reg))
66#define WAIT_FOR_MCU(__dev, __reg) \
67 rt2x00usb_regbusy_read((__dev), H2M_MAILBOX_CSR, \
68 H2M_MAILBOX_CSR_OWNER, (__reg))
69
70static void rt2800usb_bbp_write(struct rt2x00_dev *rt2x00dev,
71 const unsigned int word, const u8 value)
72{
73 u32 reg;
74
75 mutex_lock(&rt2x00dev->csr_mutex);
76
77 /*
78 * Wait until the BBP becomes available, afterwards we
79 * can safely write the new data into the register.
80 */
81 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
82 reg = 0;
83 rt2x00_set_field32(&reg, BBP_CSR_CFG_VALUE, value);
84 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
85 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
86 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 0);
87
88 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
89 }
90
91 mutex_unlock(&rt2x00dev->csr_mutex);
92}
93
94static void rt2800usb_bbp_read(struct rt2x00_dev *rt2x00dev,
95 const unsigned int word, u8 *value)
96{
97 u32 reg;
98
99 mutex_lock(&rt2x00dev->csr_mutex);
100
101 /*
102 * Wait until the BBP becomes available, afterwards we
103 * can safely write the read request into the register.
104 * After the data has been written, we wait until hardware
105 * returns the correct value, if at any time the register
106 * doesn't become available in time, reg will be 0xffffffff
107 * which means we return 0xff to the caller.
108 */
109 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
110 reg = 0;
111 rt2x00_set_field32(&reg, BBP_CSR_CFG_REGNUM, word);
112 rt2x00_set_field32(&reg, BBP_CSR_CFG_BUSY, 1);
113 rt2x00_set_field32(&reg, BBP_CSR_CFG_READ_CONTROL, 1);
114
115 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
116
117 WAIT_FOR_BBP(rt2x00dev, &reg);
118 }
119
120 *value = rt2x00_get_field32(reg, BBP_CSR_CFG_VALUE);
121
122 mutex_unlock(&rt2x00dev->csr_mutex);
123}
124
125static void rt2800usb_rfcsr_write(struct rt2x00_dev *rt2x00dev,
126 const unsigned int word, const u8 value)
127{
128 u32 reg;
129
130 mutex_lock(&rt2x00dev->csr_mutex);
131
132 /*
133 * Wait until the RFCSR becomes available, afterwards we
134 * can safely write the new data into the register.
135 */
136 if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
137 reg = 0;
138 rt2x00_set_field32(&reg, RF_CSR_CFG_DATA, value);
139 rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
140 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 1);
141 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
142
143 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG, reg);
144 }
145
146 mutex_unlock(&rt2x00dev->csr_mutex);
147}
148
149static void rt2800usb_rfcsr_read(struct rt2x00_dev *rt2x00dev,
150 const unsigned int word, u8 *value)
151{
152 u32 reg;
153
154 mutex_lock(&rt2x00dev->csr_mutex);
155
156 /*
157 * Wait until the RFCSR becomes available, afterwards we
158 * can safely write the read request into the register.
159 * After the data has been written, we wait until hardware
160 * returns the correct value, if at any time the register
161 * doesn't become available in time, reg will be 0xffffffff
162 * which means we return 0xff to the caller.
163 */
164 if (WAIT_FOR_RFCSR(rt2x00dev, &reg)) {
165 reg = 0;
166 rt2x00_set_field32(&reg, RF_CSR_CFG_REGNUM, word);
167 rt2x00_set_field32(&reg, RF_CSR_CFG_WRITE, 0);
168 rt2x00_set_field32(&reg, RF_CSR_CFG_BUSY, 1);
169
170 rt2x00usb_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg);
171
172 WAIT_FOR_RFCSR(rt2x00dev, &reg);
173 }
174
175 *value = rt2x00_get_field32(reg, RF_CSR_CFG_DATA);
176
177 mutex_unlock(&rt2x00dev->csr_mutex);
178}
179
180static void rt2800usb_rf_write(struct rt2x00_dev *rt2x00dev,
181 const unsigned int word, const u32 value)
182{
183 u32 reg;
184
185 mutex_lock(&rt2x00dev->csr_mutex);
186
187 /*
188 * Wait until the RF becomes available, afterwards we
189 * can safely write the new data into the register.
190 */
191 if (WAIT_FOR_RF(rt2x00dev, &reg)) {
192 reg = 0;
193 rt2x00_set_field32(&reg, RF_CSR_CFG0_REG_VALUE_BW, value);
194 rt2x00_set_field32(&reg, RF_CSR_CFG0_STANDBYMODE, 0);
195 rt2x00_set_field32(&reg, RF_CSR_CFG0_SEL, 0);
196 rt2x00_set_field32(&reg, RF_CSR_CFG0_BUSY, 1);
197
198 rt2x00usb_register_write_lock(rt2x00dev, RF_CSR_CFG0, reg);
199 rt2x00_rf_write(rt2x00dev, word, value);
200 }
201
202 mutex_unlock(&rt2x00dev->csr_mutex);
203}
204
205static void rt2800usb_mcu_request(struct rt2x00_dev *rt2x00dev,
206 const u8 command, const u8 token,
207 const u8 arg0, const u8 arg1)
208{
209 u32 reg;
210
211 mutex_lock(&rt2x00dev->csr_mutex);
212
213 /*
214 * Wait until the MCU becomes available, afterwards we
215 * can safely write the new data into the register.
216 */
217 if (WAIT_FOR_MCU(rt2x00dev, &reg)) {
218 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_OWNER, 1);
219 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_CMD_TOKEN, token);
220 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG0, arg0);
221 rt2x00_set_field32(&reg, H2M_MAILBOX_CSR_ARG1, arg1);
222 rt2x00usb_register_write_lock(rt2x00dev, H2M_MAILBOX_CSR, reg);
223
224 reg = 0;
225 rt2x00_set_field32(&reg, HOST_CMD_CSR_HOST_COMMAND, command);
226 rt2x00usb_register_write_lock(rt2x00dev, HOST_CMD_CSR, reg);
227 }
228
229 mutex_unlock(&rt2x00dev->csr_mutex);
230}
231
232#ifdef CONFIG_RT2X00_LIB_DEBUGFS
233static const struct rt2x00debug rt2800usb_rt2x00debug = {
234 .owner = THIS_MODULE,
235 .csr = {
236 .read = rt2x00usb_register_read,
237 .write = rt2x00usb_register_write,
238 .flags = RT2X00DEBUGFS_OFFSET,
239 .word_base = CSR_REG_BASE,
240 .word_size = sizeof(u32),
241 .word_count = CSR_REG_SIZE / sizeof(u32),
242 },
243 .eeprom = {
244 .read = rt2x00_eeprom_read,
245 .write = rt2x00_eeprom_write,
246 .word_base = EEPROM_BASE,
247 .word_size = sizeof(u16),
248 .word_count = EEPROM_SIZE / sizeof(u16),
249 },
250 .bbp = {
251 .read = rt2800usb_bbp_read,
252 .write = rt2800usb_bbp_write,
253 .word_base = BBP_BASE,
254 .word_size = sizeof(u8),
255 .word_count = BBP_SIZE / sizeof(u8),
256 },
257 .rf = {
258 .read = rt2x00_rf_read,
259 .write = rt2800usb_rf_write,
260 .word_base = RF_BASE,
261 .word_size = sizeof(u32),
262 .word_count = RF_SIZE / sizeof(u32),
263 },
264};
265#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
266
267static int rt2800usb_rfkill_poll(struct rt2x00_dev *rt2x00dev)
268{
269 u32 reg;
270
271 rt2x00usb_register_read(rt2x00dev, GPIO_CTRL_CFG, &reg);
272 return rt2x00_get_field32(reg, GPIO_CTRL_CFG_BIT2);
273}
274
275#ifdef CONFIG_RT2X00_LIB_LEDS
276static void rt2800usb_brightness_set(struct led_classdev *led_cdev,
277 enum led_brightness brightness)
278{
279 struct rt2x00_led *led =
280 container_of(led_cdev, struct rt2x00_led, led_dev);
281 unsigned int enabled = brightness != LED_OFF;
282 unsigned int bg_mode =
283 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
284 unsigned int polarity =
285 rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
286 EEPROM_FREQ_LED_POLARITY);
287 unsigned int ledmode =
288 rt2x00_get_field16(led->rt2x00dev->led_mcu_reg,
289 EEPROM_FREQ_LED_MODE);
290
291 if (led->type == LED_TYPE_RADIO) {
292 rt2800usb_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
293 enabled ? 0x20 : 0);
294 } else if (led->type == LED_TYPE_ASSOC) {
295 rt2800usb_mcu_request(led->rt2x00dev, MCU_LED, 0xff, ledmode,
296 enabled ? (bg_mode ? 0x60 : 0xa0) : 0x20);
297 } else if (led->type == LED_TYPE_QUALITY) {
298 /*
299 * The brightness is divided into 6 levels (0 - 5),
300 * The specs tell us the following levels:
301 * 0, 1 ,3, 7, 15, 31
302 * to determine the level in a simple way we can simply
303 * work with bitshifting:
304 * (1 << level) - 1
305 */
306 rt2800usb_mcu_request(led->rt2x00dev, MCU_LED_STRENGTH, 0xff,
307 (1 << brightness / (LED_FULL / 6)) - 1,
308 polarity);
309 }
310}
311
312static int rt2800usb_blink_set(struct led_classdev *led_cdev,
313 unsigned long *delay_on,
314 unsigned long *delay_off)
315{
316 struct rt2x00_led *led =
317 container_of(led_cdev, struct rt2x00_led, led_dev);
318 u32 reg;
319
320 rt2x00usb_register_read(led->rt2x00dev, LED_CFG, &reg);
321 rt2x00_set_field32(&reg, LED_CFG_ON_PERIOD, *delay_on);
322 rt2x00_set_field32(&reg, LED_CFG_OFF_PERIOD, *delay_off);
323 rt2x00_set_field32(&reg, LED_CFG_SLOW_BLINK_PERIOD, 3);
324 rt2x00_set_field32(&reg, LED_CFG_R_LED_MODE, 3);
325 rt2x00_set_field32(&reg, LED_CFG_G_LED_MODE, 12);
326 rt2x00_set_field32(&reg, LED_CFG_Y_LED_MODE, 3);
327 rt2x00_set_field32(&reg, LED_CFG_LED_POLAR, 1);
328 rt2x00usb_register_write(led->rt2x00dev, LED_CFG, reg);
329
330 return 0;
331}
332
333static void rt2800usb_init_led(struct rt2x00_dev *rt2x00dev,
334 struct rt2x00_led *led,
335 enum led_type type)
336{
337 led->rt2x00dev = rt2x00dev;
338 led->type = type;
339 led->led_dev.brightness_set = rt2800usb_brightness_set;
340 led->led_dev.blink_set = rt2800usb_blink_set;
341 led->flags = LED_INITIALIZED;
342}
343#endif /* CONFIG_RT2X00_LIB_LEDS */
344
345/*
346 * Configuration handlers.
347 */
348static void rt2800usb_config_wcid_attr(struct rt2x00_dev *rt2x00dev,
349 struct rt2x00lib_crypto *crypto,
350 struct ieee80211_key_conf *key)
351{
352 struct mac_wcid_entry wcid_entry;
353 struct mac_iveiv_entry iveiv_entry;
354 u32 offset;
355 u32 reg;
356
357 offset = MAC_WCID_ATTR_ENTRY(key->hw_key_idx);
358
359 rt2x00usb_register_read(rt2x00dev, offset, &reg);
360 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_KEYTAB,
361 !!(key->flags & IEEE80211_KEY_FLAG_PAIRWISE));
362 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_CIPHER,
363 (crypto->cmd == SET_KEY) * crypto->cipher);
364 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_BSS_IDX,
365 (crypto->cmd == SET_KEY) * crypto->bssidx);
366 rt2x00_set_field32(&reg, MAC_WCID_ATTRIBUTE_RX_WIUDF, crypto->cipher);
367 rt2x00usb_register_write(rt2x00dev, offset, reg);
368
369 offset = MAC_IVEIV_ENTRY(key->hw_key_idx);
370
371 memset(&iveiv_entry, 0, sizeof(iveiv_entry));
372 if ((crypto->cipher == CIPHER_TKIP) ||
373 (crypto->cipher == CIPHER_TKIP_NO_MIC) ||
374 (crypto->cipher == CIPHER_AES))
375 iveiv_entry.iv[3] |= 0x20;
376 iveiv_entry.iv[3] |= key->keyidx << 6;
377 rt2x00usb_register_multiwrite(rt2x00dev, offset,
378 &iveiv_entry, sizeof(iveiv_entry));
379
380 offset = MAC_WCID_ENTRY(key->hw_key_idx);
381
382 memset(&wcid_entry, 0, sizeof(wcid_entry));
383 if (crypto->cmd == SET_KEY)
384 memcpy(&wcid_entry, crypto->address, ETH_ALEN);
385 rt2x00usb_register_multiwrite(rt2x00dev, offset,
386 &wcid_entry, sizeof(wcid_entry));
387}
388
389static int rt2800usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
390 struct rt2x00lib_crypto *crypto,
391 struct ieee80211_key_conf *key)
392{
393 struct hw_key_entry key_entry;
394 struct rt2x00_field32 field;
395 int timeout;
396 u32 offset;
397 u32 reg;
398
399 if (crypto->cmd == SET_KEY) {
400 key->hw_key_idx = (4 * crypto->bssidx) + key->keyidx;
401
402 memcpy(key_entry.key, crypto->key,
403 sizeof(key_entry.key));
404 memcpy(key_entry.tx_mic, crypto->tx_mic,
405 sizeof(key_entry.tx_mic));
406 memcpy(key_entry.rx_mic, crypto->rx_mic,
407 sizeof(key_entry.rx_mic));
408
409 offset = SHARED_KEY_ENTRY(key->hw_key_idx);
410 timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
411 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
412 USB_VENDOR_REQUEST_OUT,
413 offset, &key_entry,
414 sizeof(key_entry),
415 timeout);
416 }
417
418 /*
419 * The cipher types are stored over multiple registers
420 * starting with SHARED_KEY_MODE_BASE each word will have
421 * 32 bits and contains the cipher types for 2 bssidx each.
422 * Using the correct defines correctly will cause overhead,
423 * so just calculate the correct offset.
424 */
425 field.bit_offset = 4 * (key->hw_key_idx % 8);
426 field.bit_mask = 0x7 << field.bit_offset;
427
428 offset = SHARED_KEY_MODE_ENTRY(key->hw_key_idx / 8);
429
430 rt2x00usb_register_read(rt2x00dev, offset, &reg);
431 rt2x00_set_field32(&reg, field,
432 (crypto->cmd == SET_KEY) * crypto->cipher);
433 rt2x00usb_register_write(rt2x00dev, offset, reg);
434
435 /*
436 * Update WCID information
437 */
438 rt2800usb_config_wcid_attr(rt2x00dev, crypto, key);
439
440 return 0;
441}
442
443static int rt2800usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
444 struct rt2x00lib_crypto *crypto,
445 struct ieee80211_key_conf *key)
446{
447 struct hw_key_entry key_entry;
448 int timeout;
449 u32 offset;
450
451 if (crypto->cmd == SET_KEY) {
452 /*
453 * 1 pairwise key is possible per AID, this means that the AID
454 * equals our hw_key_idx. Make sure the WCID starts _after_ the
455 * last possible shared key entry.
456 */
457 if (crypto->aid > (256 - 32))
458 return -ENOSPC;
459
460 key->hw_key_idx = 32 + crypto->aid;
461
462 memcpy(key_entry.key, crypto->key,
463 sizeof(key_entry.key));
464 memcpy(key_entry.tx_mic, crypto->tx_mic,
465 sizeof(key_entry.tx_mic));
466 memcpy(key_entry.rx_mic, crypto->rx_mic,
467 sizeof(key_entry.rx_mic));
468
469 offset = PAIRWISE_KEY_ENTRY(key->hw_key_idx);
470 timeout = REGISTER_TIMEOUT32(sizeof(key_entry));
471 rt2x00usb_vendor_request_large_buff(rt2x00dev, USB_MULTI_WRITE,
472 USB_VENDOR_REQUEST_OUT,
473 offset, &key_entry,
474 sizeof(key_entry),
475 timeout);
476 }
477
478 /*
479 * Update WCID information
480 */
481 rt2800usb_config_wcid_attr(rt2x00dev, crypto, key);
482
483 return 0;
484}
485
486static void rt2800usb_config_filter(struct rt2x00_dev *rt2x00dev,
487 const unsigned int filter_flags)
488{
489 u32 reg;
490
491 /*
492 * Start configuration steps.
493 * Note that the version error will always be dropped
494 * and broadcast frames will always be accepted since
495 * there is no filter for it at this time.
496 */
497 rt2x00usb_register_read(rt2x00dev, RX_FILTER_CFG, &reg);
498 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CRC_ERROR,
499 !(filter_flags & FIF_FCSFAIL));
500 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PHY_ERROR,
501 !(filter_flags & FIF_PLCPFAIL));
502 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_TO_ME,
503 !(filter_flags & FIF_PROMISC_IN_BSS));
504 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_NOT_MY_BSSD, 0);
505 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_VER_ERROR, 1);
506 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_MULTICAST,
507 !(filter_flags & FIF_ALLMULTI));
508 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BROADCAST, 0);
509 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_DUPLICATE, 1);
510 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END_ACK,
511 !(filter_flags & FIF_CONTROL));
512 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CF_END,
513 !(filter_flags & FIF_CONTROL));
514 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_ACK,
515 !(filter_flags & FIF_CONTROL));
516 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CTS,
517 !(filter_flags & FIF_CONTROL));
518 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_RTS,
519 !(filter_flags & FIF_CONTROL));
520 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_PSPOLL,
521 !(filter_flags & FIF_PSPOLL));
522 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BA, 1);
523 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_BAR, 0);
524 rt2x00_set_field32(&reg, RX_FILTER_CFG_DROP_CNTL,
525 !(filter_flags & FIF_CONTROL));
526 rt2x00usb_register_write(rt2x00dev, RX_FILTER_CFG, reg);
527}
528
529static void rt2800usb_config_intf(struct rt2x00_dev *rt2x00dev,
530 struct rt2x00_intf *intf,
531 struct rt2x00intf_conf *conf,
532 const unsigned int flags)
533{
534 unsigned int beacon_base;
535 u32 reg;
536
537 if (flags & CONFIG_UPDATE_TYPE) {
538 /*
539 * Clear current synchronisation setup.
540 * For the Beacon base registers we only need to clear
541 * the first byte since that byte contains the VALID and OWNER
542 * bits which (when set to 0) will invalidate the entire beacon.
543 */
544 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
545 rt2x00usb_register_write(rt2x00dev, beacon_base, 0);
546
547 /*
548 * Enable synchronisation.
549 */
550 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
551 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
552 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, conf->sync);
553 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
554 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
555 }
556
557 if (flags & CONFIG_UPDATE_MAC) {
558 reg = le32_to_cpu(conf->mac[1]);
559 rt2x00_set_field32(&reg, MAC_ADDR_DW1_UNICAST_TO_ME_MASK, 0xff);
560 conf->mac[1] = cpu_to_le32(reg);
561
562 rt2x00usb_register_multiwrite(rt2x00dev, MAC_ADDR_DW0,
563 conf->mac, sizeof(conf->mac));
564 }
565
566 if (flags & CONFIG_UPDATE_BSSID) {
567 reg = le32_to_cpu(conf->bssid[1]);
568 rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_ID_MASK, 0);
569 rt2x00_set_field32(&reg, MAC_BSSID_DW1_BSS_BCN_NUM, 0);
570 conf->bssid[1] = cpu_to_le32(reg);
571
572 rt2x00usb_register_multiwrite(rt2x00dev, MAC_BSSID_DW0,
573 conf->bssid, sizeof(conf->bssid));
574 }
575}
576
577static void rt2800usb_config_erp(struct rt2x00_dev *rt2x00dev,
578 struct rt2x00lib_erp *erp)
579{
580 u32 reg;
581
582 rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
583 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_RX_ACK_TIMEOUT, 0x20);
584 rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
585
586 rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
587 rt2x00_set_field32(&reg, AUTO_RSP_CFG_BAC_ACK_POLICY,
588 !!erp->short_preamble);
589 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AR_PREAMBLE,
590 !!erp->short_preamble);
591 rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
592
593 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
594 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL,
595 erp->cts_protection ? 2 : 0);
596 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
597
598 rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE,
599 erp->basic_rates);
600 rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
601
602 rt2x00usb_register_read(rt2x00dev, BKOFF_SLOT_CFG, &reg);
603 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_SLOT_TIME, erp->slot_time);
604 rt2x00_set_field32(&reg, BKOFF_SLOT_CFG_CC_DELAY_TIME, 2);
605 rt2x00usb_register_write(rt2x00dev, BKOFF_SLOT_CFG, reg);
606
607 rt2x00usb_register_read(rt2x00dev, XIFS_TIME_CFG, &reg);
608 rt2x00_set_field32(&reg, XIFS_TIME_CFG_CCKM_SIFS_TIME, erp->sifs);
609 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_SIFS_TIME, erp->sifs);
610 rt2x00_set_field32(&reg, XIFS_TIME_CFG_OFDM_XIFS_TIME, 4);
611 rt2x00_set_field32(&reg, XIFS_TIME_CFG_EIFS, erp->eifs);
612 rt2x00_set_field32(&reg, XIFS_TIME_CFG_BB_RXEND_ENABLE, 1);
613 rt2x00usb_register_write(rt2x00dev, XIFS_TIME_CFG, reg);
614
615 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
616 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL,
617 erp->beacon_int * 16);
618 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
619}
620
621static void rt2800usb_config_ant(struct rt2x00_dev *rt2x00dev,
622 struct antenna_setup *ant)
623{
624 u8 r1;
625 u8 r3;
626
627 rt2800usb_bbp_read(rt2x00dev, 1, &r1);
628 rt2800usb_bbp_read(rt2x00dev, 3, &r3);
629
630 /*
631 * Configure the TX antenna.
632 */
633 switch ((int)ant->tx) {
634 case 1:
635 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0);
636 break;
637 case 2:
638 rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2);
639 break;
640 case 3:
641 /* Do nothing */
642 break;
643 }
644
645 /*
646 * Configure the RX antenna.
647 */
648 switch ((int)ant->rx) {
649 case 1:
650 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0);
651 break;
652 case 2:
653 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 1);
654 break;
655 case 3:
656 rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 2);
657 break;
658 }
659
660 rt2800usb_bbp_write(rt2x00dev, 3, r3);
661 rt2800usb_bbp_write(rt2x00dev, 1, r1);
662}
663
664static void rt2800usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
665 struct rt2x00lib_conf *libconf)
666{
667 u16 eeprom;
668 short lna_gain;
669
670 if (libconf->rf.channel <= 14) {
671 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
672 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_BG);
673 } else if (libconf->rf.channel <= 64) {
674 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &eeprom);
675 lna_gain = rt2x00_get_field16(eeprom, EEPROM_LNA_A0);
676 } else if (libconf->rf.channel <= 128) {
677 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &eeprom);
678 lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_BG2_LNA_A1);
679 } else {
680 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &eeprom);
681 lna_gain = rt2x00_get_field16(eeprom, EEPROM_RSSI_A2_LNA_A2);
682 }
683
684 rt2x00dev->lna_gain = lna_gain;
685}
686
687static void rt2800usb_config_channel_rt2x(struct rt2x00_dev *rt2x00dev,
688 struct ieee80211_conf *conf,
689 struct rf_channel *rf,
690 struct channel_info *info)
691{
692 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
693
694 if (rt2x00dev->default_ant.tx == 1)
695 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_TX1, 1);
696
697 if (rt2x00dev->default_ant.rx == 1) {
698 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX1, 1);
699 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
700 } else if (rt2x00dev->default_ant.rx == 2)
701 rt2x00_set_field32(&rf->rf2, RF2_ANTENNA_RX2, 1);
702
703 if (rf->channel > 14) {
704 /*
705 * When TX power is below 0, we should increase it by 7 to
706 * make it a positive value (Minumum value is -7).
707 * However this means that values between 0 and 7 have
708 * double meaning, and we should set a 7DBm boost flag.
709 */
710 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A_7DBM_BOOST,
711 (info->tx_power1 >= 0));
712
713 if (info->tx_power1 < 0)
714 info->tx_power1 += 7;
715
716 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_A,
717 TXPOWER_A_TO_DEV(info->tx_power1));
718
719 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A_7DBM_BOOST,
720 (info->tx_power2 >= 0));
721
722 if (info->tx_power2 < 0)
723 info->tx_power2 += 7;
724
725 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_A,
726 TXPOWER_A_TO_DEV(info->tx_power2));
727 } else {
728 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER_G,
729 TXPOWER_G_TO_DEV(info->tx_power1));
730 rt2x00_set_field32(&rf->rf4, RF4_TXPOWER_G,
731 TXPOWER_G_TO_DEV(info->tx_power2));
732 }
733
734 rt2x00_set_field32(&rf->rf4, RF4_HT40, conf_is_ht40(conf));
735
736 rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
737 rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
738 rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
739 rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
740
741 udelay(200);
742
743 rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
744 rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
745 rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
746 rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
747
748 udelay(200);
749
750 rt2800usb_rf_write(rt2x00dev, 1, rf->rf1);
751 rt2800usb_rf_write(rt2x00dev, 2, rf->rf2);
752 rt2800usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
753 rt2800usb_rf_write(rt2x00dev, 4, rf->rf4);
754}
755
756static void rt2800usb_config_channel_rt3x(struct rt2x00_dev *rt2x00dev,
757 struct ieee80211_conf *conf,
758 struct rf_channel *rf,
759 struct channel_info *info)
760{
761 u8 rfcsr;
762
763 rt2800usb_rfcsr_write(rt2x00dev, 2, rf->rf1);
764 rt2800usb_rfcsr_write(rt2x00dev, 2, rf->rf3);
765
766 rt2800usb_rfcsr_read(rt2x00dev, 6, &rfcsr);
767 rt2x00_set_field8(&rfcsr, RFCSR6_R, rf->rf2);
768 rt2800usb_rfcsr_write(rt2x00dev, 6, rfcsr);
769
770 rt2800usb_rfcsr_read(rt2x00dev, 12, &rfcsr);
771 rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER,
772 TXPOWER_G_TO_DEV(info->tx_power1));
773 rt2800usb_rfcsr_write(rt2x00dev, 12, rfcsr);
774
775 rt2800usb_rfcsr_read(rt2x00dev, 23, &rfcsr);
776 rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset);
777 rt2800usb_rfcsr_write(rt2x00dev, 23, rfcsr);
778
779 rt2800usb_rfcsr_write(rt2x00dev, 24,
780 rt2x00dev->calibration[conf_is_ht40(conf)]);
781
782 rt2800usb_rfcsr_read(rt2x00dev, 23, &rfcsr);
783 rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1);
784 rt2800usb_rfcsr_write(rt2x00dev, 23, rfcsr);
785}
786
787static void rt2800usb_config_channel(struct rt2x00_dev *rt2x00dev,
788 struct ieee80211_conf *conf,
789 struct rf_channel *rf,
790 struct channel_info *info)
791{
792 u32 reg;
793 unsigned int tx_pin;
794 u8 bbp;
795
796 if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
797 rt2800usb_config_channel_rt2x(rt2x00dev, conf, rf, info);
798 else
799 rt2800usb_config_channel_rt3x(rt2x00dev, conf, rf, info);
800
801 /*
802 * Change BBP settings
803 */
804 rt2800usb_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain);
805 rt2800usb_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain);
806 rt2800usb_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain);
807 rt2800usb_bbp_write(rt2x00dev, 86, 0);
808
809 if (rf->channel <= 14) {
810 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
811 rt2800usb_bbp_write(rt2x00dev, 82, 0x62);
812 rt2800usb_bbp_write(rt2x00dev, 75, 0x46);
813 } else {
814 rt2800usb_bbp_write(rt2x00dev, 82, 0x84);
815 rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
816 }
817 } else {
818 rt2800usb_bbp_write(rt2x00dev, 82, 0xf2);
819
820 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
821 rt2800usb_bbp_write(rt2x00dev, 75, 0x46);
822 else
823 rt2800usb_bbp_write(rt2x00dev, 75, 0x50);
824 }
825
826 rt2x00usb_register_read(rt2x00dev, TX_BAND_CFG, &reg);
827 rt2x00_set_field32(&reg, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf));
828 rt2x00_set_field32(&reg, TX_BAND_CFG_A, rf->channel > 14);
829 rt2x00_set_field32(&reg, TX_BAND_CFG_BG, rf->channel <= 14);
830 rt2x00usb_register_write(rt2x00dev, TX_BAND_CFG, reg);
831
832 tx_pin = 0;
833
834 /* Turn on unused PA or LNA when not using 1T or 1R */
835 if (rt2x00dev->default_ant.tx != 1) {
836 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A1_EN, 1);
837 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G1_EN, 1);
838 }
839
840 /* Turn on unused PA or LNA when not using 1T or 1R */
841 if (rt2x00dev->default_ant.rx != 1) {
842 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A1_EN, 1);
843 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G1_EN, 1);
844 }
845
846 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_A0_EN, 1);
847 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_LNA_PE_G0_EN, 1);
848 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_RFTR_EN, 1);
849 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_TRSW_EN, 1);
850 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, rf->channel <= 14);
851 rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, rf->channel > 14);
852
853 rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, tx_pin);
854
855 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
856 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
857 rt2800usb_bbp_write(rt2x00dev, 4, bbp);
858
859 rt2800usb_bbp_read(rt2x00dev, 3, &bbp);
860 rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf));
861 rt2800usb_bbp_write(rt2x00dev, 3, bbp);
862
863 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
864 if (conf_is_ht40(conf)) {
865 rt2800usb_bbp_write(rt2x00dev, 69, 0x1a);
866 rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
867 rt2800usb_bbp_write(rt2x00dev, 73, 0x16);
868 } else {
869 rt2800usb_bbp_write(rt2x00dev, 69, 0x16);
870 rt2800usb_bbp_write(rt2x00dev, 70, 0x08);
871 rt2800usb_bbp_write(rt2x00dev, 73, 0x11);
872 }
873 }
874
875 msleep(1);
876}
877
878static void rt2800usb_config_txpower(struct rt2x00_dev *rt2x00dev,
879 const int txpower)
880{
881 u32 reg;
882 u32 value = TXPOWER_G_TO_DEV(txpower);
883 u8 r1;
884
885 rt2800usb_bbp_read(rt2x00dev, 1, &r1);
886 rt2x00_set_field8(&reg, BBP1_TX_POWER, 0);
887 rt2800usb_bbp_write(rt2x00dev, 1, r1);
888
889 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_0, &reg);
890 rt2x00_set_field32(&reg, TX_PWR_CFG_0_1MBS, value);
891 rt2x00_set_field32(&reg, TX_PWR_CFG_0_2MBS, value);
892 rt2x00_set_field32(&reg, TX_PWR_CFG_0_55MBS, value);
893 rt2x00_set_field32(&reg, TX_PWR_CFG_0_11MBS, value);
894 rt2x00_set_field32(&reg, TX_PWR_CFG_0_6MBS, value);
895 rt2x00_set_field32(&reg, TX_PWR_CFG_0_9MBS, value);
896 rt2x00_set_field32(&reg, TX_PWR_CFG_0_12MBS, value);
897 rt2x00_set_field32(&reg, TX_PWR_CFG_0_18MBS, value);
898 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_0, reg);
899
900 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_1, &reg);
901 rt2x00_set_field32(&reg, TX_PWR_CFG_1_24MBS, value);
902 rt2x00_set_field32(&reg, TX_PWR_CFG_1_36MBS, value);
903 rt2x00_set_field32(&reg, TX_PWR_CFG_1_48MBS, value);
904 rt2x00_set_field32(&reg, TX_PWR_CFG_1_54MBS, value);
905 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS0, value);
906 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS1, value);
907 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS2, value);
908 rt2x00_set_field32(&reg, TX_PWR_CFG_1_MCS3, value);
909 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_1, reg);
910
911 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_2, &reg);
912 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS4, value);
913 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS5, value);
914 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS6, value);
915 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS7, value);
916 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS8, value);
917 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS9, value);
918 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS10, value);
919 rt2x00_set_field32(&reg, TX_PWR_CFG_2_MCS11, value);
920 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_2, reg);
921
922 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_3, &reg);
923 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS12, value);
924 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS13, value);
925 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS14, value);
926 rt2x00_set_field32(&reg, TX_PWR_CFG_3_MCS15, value);
927 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN1, value);
928 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN2, value);
929 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN3, value);
930 rt2x00_set_field32(&reg, TX_PWR_CFG_3_UKNOWN4, value);
931 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_3, reg);
932
933 rt2x00usb_register_read(rt2x00dev, TX_PWR_CFG_4, &reg);
934 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN5, value);
935 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN6, value);
936 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN7, value);
937 rt2x00_set_field32(&reg, TX_PWR_CFG_4_UKNOWN8, value);
938 rt2x00usb_register_write(rt2x00dev, TX_PWR_CFG_4, reg);
939}
940
941static void rt2800usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
942 struct rt2x00lib_conf *libconf)
943{
944 u32 reg;
945
946 rt2x00usb_register_read(rt2x00dev, TX_RTY_CFG, &reg);
947 rt2x00_set_field32(&reg, TX_RTY_CFG_SHORT_RTY_LIMIT,
948 libconf->conf->short_frame_max_tx_count);
949 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_LIMIT,
950 libconf->conf->long_frame_max_tx_count);
951 rt2x00_set_field32(&reg, TX_RTY_CFG_LONG_RTY_THRE, 2000);
952 rt2x00_set_field32(&reg, TX_RTY_CFG_NON_AGG_RTY_MODE, 0);
953 rt2x00_set_field32(&reg, TX_RTY_CFG_AGG_RTY_MODE, 0);
954 rt2x00_set_field32(&reg, TX_RTY_CFG_TX_AUTO_FB_ENABLE, 1);
955 rt2x00usb_register_write(rt2x00dev, TX_RTY_CFG, reg);
956}
957
958static void rt2800usb_config_ps(struct rt2x00_dev *rt2x00dev,
959 struct rt2x00lib_conf *libconf)
960{
961 enum dev_state state =
962 (libconf->conf->flags & IEEE80211_CONF_PS) ?
963 STATE_SLEEP : STATE_AWAKE;
964 u32 reg;
965
966 if (state == STATE_SLEEP) {
967 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, 0);
968
969 rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
970 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 5);
971 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE,
972 libconf->conf->listen_interval - 1);
973 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 1);
974 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
975
976 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
977 } else {
978 rt2x00dev->ops->lib->set_device_state(rt2x00dev, state);
979
980 rt2x00usb_register_read(rt2x00dev, AUTOWAKEUP_CFG, &reg);
981 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTO_LEAD_TIME, 0);
982 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE, 0);
983 rt2x00_set_field32(&reg, AUTOWAKEUP_CFG_AUTOWAKE, 0);
984 rt2x00usb_register_write(rt2x00dev, AUTOWAKEUP_CFG, reg);
985 }
986}
987
988static void rt2800usb_config(struct rt2x00_dev *rt2x00dev,
989 struct rt2x00lib_conf *libconf,
990 const unsigned int flags)
991{
992 /* Always recalculate LNA gain before changing configuration */
993 rt2800usb_config_lna_gain(rt2x00dev, libconf);
994
995 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
996 rt2800usb_config_channel(rt2x00dev, libconf->conf,
997 &libconf->rf, &libconf->channel);
998 if (flags & IEEE80211_CONF_CHANGE_POWER)
999 rt2800usb_config_txpower(rt2x00dev, libconf->conf->power_level);
1000 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
1001 rt2800usb_config_retry_limit(rt2x00dev, libconf);
1002 if (flags & IEEE80211_CONF_CHANGE_PS)
1003 rt2800usb_config_ps(rt2x00dev, libconf);
1004}
1005
1006/*
1007 * Link tuning
1008 */
1009static void rt2800usb_link_stats(struct rt2x00_dev *rt2x00dev,
1010 struct link_qual *qual)
1011{
1012 u32 reg;
1013
1014 /*
1015 * Update FCS error count from register.
1016 */
1017 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1018 qual->rx_failed = rt2x00_get_field32(reg, RX_STA_CNT0_CRC_ERR);
1019}
1020
1021static u8 rt2800usb_get_default_vgc(struct rt2x00_dev *rt2x00dev)
1022{
1023 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
1024 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION)
1025 return 0x1c + (2 * rt2x00dev->lna_gain);
1026 else
1027 return 0x2e + rt2x00dev->lna_gain;
1028 }
1029
1030 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
1031 return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
1032 else
1033 return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
1034}
1035
1036static inline void rt2800usb_set_vgc(struct rt2x00_dev *rt2x00dev,
1037 struct link_qual *qual, u8 vgc_level)
1038{
1039 if (qual->vgc_level != vgc_level) {
1040 rt2800usb_bbp_write(rt2x00dev, 66, vgc_level);
1041 qual->vgc_level = vgc_level;
1042 qual->vgc_level_reg = vgc_level;
1043 }
1044}
1045
1046static void rt2800usb_reset_tuner(struct rt2x00_dev *rt2x00dev,
1047 struct link_qual *qual)
1048{
1049 rt2800usb_set_vgc(rt2x00dev, qual,
1050 rt2800usb_get_default_vgc(rt2x00dev));
1051}
1052
1053static void rt2800usb_link_tuner(struct rt2x00_dev *rt2x00dev,
1054 struct link_qual *qual, const u32 count)
1055{
1056 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION)
1057 return;
1058
1059 /*
1060 * When RSSI is better then -80 increase VGC level with 0x10
1061 */
1062 rt2800usb_set_vgc(rt2x00dev, qual,
1063 rt2800usb_get_default_vgc(rt2x00dev) +
1064 ((qual->rssi > -80) * 0x10));
1065}
1066
1067/*
1068 * Firmware functions 53 * Firmware functions
1069 */ 54 */
1070static char *rt2800usb_get_firmware_name(struct rt2x00_dev *rt2x00dev) 55static char *rt2800usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
@@ -1107,7 +92,6 @@ static bool rt2800usb_check_crc(const u8 *data, const size_t len)
1107static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev, 92static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
1108 const u8 *data, const size_t len) 93 const u8 *data, const size_t len)
1109{ 94{
1110 u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
1111 size_t offset = 0; 95 size_t offset = 0;
1112 96
1113 /* 97 /*
@@ -1115,7 +99,7 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
1115 * There are 2 variations of the rt2870 firmware. 99 * There are 2 variations of the rt2870 firmware.
1116 * a) size: 4kb 100 * a) size: 4kb
1117 * b) size: 8kb 101 * b) size: 8kb
1118 * Note that (b) contains 2 seperate firmware blobs of 4k 102 * Note that (b) contains 2 separate firmware blobs of 4k
1119 * within the file. The first blob is the same firmware as (a), 103 * within the file. The first blob is the same firmware as (a),
1120 * but the second blob is for the additional chipsets. 104 * but the second blob is for the additional chipsets.
1121 */ 105 */
@@ -1126,14 +110,14 @@ static int rt2800usb_check_firmware(struct rt2x00_dev *rt2x00dev,
1126 * Check if we need the upper 4kb firmware data or not. 110 * Check if we need the upper 4kb firmware data or not.
1127 */ 111 */
1128 if ((len == 4096) && 112 if ((len == 4096) &&
1129 (chipset != 0x2860) && 113 !rt2x00_rt(rt2x00dev, RT2860) &&
1130 (chipset != 0x2872) && 114 !rt2x00_rt(rt2x00dev, RT2872) &&
1131 (chipset != 0x3070)) 115 !rt2x00_rt(rt2x00dev, RT3070))
1132 return FW_BAD_VERSION; 116 return FW_BAD_VERSION;
1133 117
1134 /* 118 /*
1135 * 8kb firmware files must be checked as if it were 119 * 8kb firmware files must be checked as if it were
1136 * 2 seperate firmware files. 120 * 2 separate firmware files.
1137 */ 121 */
1138 while (offset < len) { 122 while (offset < len) {
1139 if (!rt2800usb_check_crc(data + offset, 4096)) 123 if (!rt2800usb_check_crc(data + offset, 4096))
@@ -1153,14 +137,13 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1153 u32 reg; 137 u32 reg;
1154 u32 offset; 138 u32 offset;
1155 u32 length; 139 u32 length;
1156 u16 chipset = (rt2x00_rev(&rt2x00dev->chip) >> 16) & 0xffff;
1157 140
1158 /* 141 /*
1159 * Check which section of the firmware we need. 142 * Check which section of the firmware we need.
1160 */ 143 */
1161 if ((chipset == 0x2860) || 144 if (rt2x00_rt(rt2x00dev, RT2860) ||
1162 (chipset == 0x2872) || 145 rt2x00_rt(rt2x00dev, RT2872) ||
1163 (chipset == 0x3070)) { 146 rt2x00_rt(rt2x00dev, RT3070)) {
1164 offset = 0; 147 offset = 0;
1165 length = 4096; 148 length = 4096;
1166 } else { 149 } else {
@@ -1172,7 +155,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1172 * Wait for stable hardware. 155 * Wait for stable hardware.
1173 */ 156 */
1174 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 157 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1175 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg); 158 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
1176 if (reg && reg != ~0) 159 if (reg && reg != ~0)
1177 break; 160 break;
1178 msleep(1); 161 msleep(1);
@@ -1192,8 +175,8 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1192 data + offset, length, 175 data + offset, length,
1193 REGISTER_TIMEOUT32(length)); 176 REGISTER_TIMEOUT32(length));
1194 177
1195 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); 178 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
1196 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0); 179 rt2800_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
1197 180
1198 /* 181 /*
1199 * Send firmware request to device to load firmware, 182 * Send firmware request to device to load firmware,
@@ -1208,18 +191,18 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1208 } 191 }
1209 192
1210 msleep(10); 193 msleep(10);
1211 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); 194 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1212 195
1213 /* 196 /*
1214 * Send signal to firmware during boot time. 197 * Send signal to firmware during boot time.
1215 */ 198 */
1216 rt2800usb_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0); 199 rt2800_mcu_request(rt2x00dev, MCU_BOOT_SIGNAL, 0xff, 0, 0);
1217 200
1218 if ((chipset == 0x3070) || 201 if (rt2x00_rt(rt2x00dev, RT3070) ||
1219 (chipset == 0x3071) || 202 rt2x00_rt(rt2x00dev, RT3071) ||
1220 (chipset == 0x3572)) { 203 rt2x00_rt(rt2x00dev, RT3572)) {
1221 udelay(200); 204 udelay(200);
1222 rt2800usb_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0); 205 rt2800_mcu_request(rt2x00dev, MCU_CURRENT, 0, 0, 0);
1223 udelay(10); 206 udelay(10);
1224 } 207 }
1225 208
@@ -1227,7 +210,7 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1227 * Wait for device to stabilize. 210 * Wait for device to stabilize.
1228 */ 211 */
1229 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 212 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1230 rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg); 213 rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1231 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY)) 214 if (rt2x00_get_field32(reg, PBF_SYS_CTRL_READY))
1232 break; 215 break;
1233 msleep(1); 216 msleep(1);
@@ -1241,536 +224,14 @@ static int rt2800usb_load_firmware(struct rt2x00_dev *rt2x00dev,
1241 /* 224 /*
1242 * Initialize firmware. 225 * Initialize firmware.
1243 */ 226 */
1244 rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0); 227 rt2800_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1245 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0); 228 rt2800_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1246 msleep(1); 229 msleep(1);
1247 230
1248 return 0; 231 return 0;
1249} 232}
1250 233
1251/* 234/*
1252 * Initialization functions.
1253 */
1254static int rt2800usb_init_registers(struct rt2x00_dev *rt2x00dev)
1255{
1256 u32 reg;
1257 unsigned int i;
1258
1259 /*
1260 * Wait untill BBP and RF are ready.
1261 */
1262 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1263 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1264 if (reg && reg != ~0)
1265 break;
1266 msleep(1);
1267 }
1268
1269 if (i == REGISTER_BUSY_COUNT) {
1270 ERROR(rt2x00dev, "Unstable hardware.\n");
1271 return -EBUSY;
1272 }
1273
1274 rt2x00usb_register_read(rt2x00dev, PBF_SYS_CTRL, &reg);
1275 rt2x00usb_register_write(rt2x00dev, PBF_SYS_CTRL, reg & ~0x00002000);
1276
1277 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1278 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_CSR, 1);
1279 rt2x00_set_field32(&reg, MAC_SYS_CTRL_RESET_BBP, 1);
1280 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1281
1282 rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000);
1283
1284 rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0,
1285 USB_MODE_RESET, REGISTER_TIMEOUT);
1286
1287 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1288
1289 rt2x00usb_register_read(rt2x00dev, BCN_OFFSET0, &reg);
1290 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN0, 0xe0); /* 0x3800 */
1291 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN1, 0xe8); /* 0x3a00 */
1292 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN2, 0xf0); /* 0x3c00 */
1293 rt2x00_set_field32(&reg, BCN_OFFSET0_BCN3, 0xf8); /* 0x3e00 */
1294 rt2x00usb_register_write(rt2x00dev, BCN_OFFSET0, reg);
1295
1296 rt2x00usb_register_read(rt2x00dev, BCN_OFFSET1, &reg);
1297 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN4, 0xc8); /* 0x3200 */
1298 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN5, 0xd0); /* 0x3400 */
1299 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN6, 0x77); /* 0x1dc0 */
1300 rt2x00_set_field32(&reg, BCN_OFFSET1_BCN7, 0x6f); /* 0x1bc0 */
1301 rt2x00usb_register_write(rt2x00dev, BCN_OFFSET1, reg);
1302
1303 rt2x00usb_register_write(rt2x00dev, LEGACY_BASIC_RATE, 0x0000013f);
1304 rt2x00usb_register_write(rt2x00dev, HT_BASIC_RATE, 0x00008003);
1305
1306 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0x00000000);
1307
1308 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
1309 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_INTERVAL, 0);
1310 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 0);
1311 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_SYNC, 0);
1312 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 0);
1313 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
1314 rt2x00_set_field32(&reg, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0);
1315 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg);
1316
1317 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
1318 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
1319 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000);
1320 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
1321 } else {
1322 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
1323 rt2x00usb_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
1324 }
1325
1326 rt2x00usb_register_read(rt2x00dev, TX_LINK_CFG, &reg);
1327 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB_LIFETIME, 32);
1328 rt2x00_set_field32(&reg, TX_LINK_CFG_MFB_ENABLE, 0);
1329 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_UMFS_ENABLE, 0);
1330 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_MRQ_EN, 0);
1331 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_RDG_EN, 0);
1332 rt2x00_set_field32(&reg, TX_LINK_CFG_TX_CF_ACK_EN, 1);
1333 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFB, 0);
1334 rt2x00_set_field32(&reg, TX_LINK_CFG_REMOTE_MFS, 0);
1335 rt2x00usb_register_write(rt2x00dev, TX_LINK_CFG, reg);
1336
1337 rt2x00usb_register_read(rt2x00dev, TX_TIMEOUT_CFG, &reg);
1338 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_MPDU_LIFETIME, 9);
1339 rt2x00_set_field32(&reg, TX_TIMEOUT_CFG_TX_OP_TIMEOUT, 10);
1340 rt2x00usb_register_write(rt2x00dev, TX_TIMEOUT_CFG, reg);
1341
1342 rt2x00usb_register_read(rt2x00dev, MAX_LEN_CFG, &reg);
1343 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE);
1344 if (rt2x00_rev(&rt2x00dev->chip) >= RT2880E_VERSION &&
1345 rt2x00_rev(&rt2x00dev->chip) < RT3070_VERSION)
1346 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 2);
1347 else
1348 rt2x00_set_field32(&reg, MAX_LEN_CFG_MAX_PSDU, 1);
1349 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_PSDU, 0);
1350 rt2x00_set_field32(&reg, MAX_LEN_CFG_MIN_MPDU, 0);
1351 rt2x00usb_register_write(rt2x00dev, MAX_LEN_CFG, reg);
1352
1353 rt2x00usb_register_write(rt2x00dev, PBF_MAX_PCNT, 0x1f3fbf9f);
1354
1355 rt2x00usb_register_read(rt2x00dev, AUTO_RSP_CFG, &reg);
1356 rt2x00_set_field32(&reg, AUTO_RSP_CFG_AUTORESPONDER, 1);
1357 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MMODE, 0);
1358 rt2x00_set_field32(&reg, AUTO_RSP_CFG_CTS_40_MREF, 0);
1359 rt2x00_set_field32(&reg, AUTO_RSP_CFG_DUAL_CTS_EN, 0);
1360 rt2x00_set_field32(&reg, AUTO_RSP_CFG_ACK_CTS_PSM_BIT, 0);
1361 rt2x00usb_register_write(rt2x00dev, AUTO_RSP_CFG, reg);
1362
1363 rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
1364 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_RATE, 8);
1365 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_CTRL, 0);
1366 rt2x00_set_field32(&reg, CCK_PROT_CFG_PROTECT_NAV, 1);
1367 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1368 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1369 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1370 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1371 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1372 rt2x00_set_field32(&reg, CCK_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1373 rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
1374
1375 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
1376 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_RATE, 8);
1377 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_CTRL, 0);
1378 rt2x00_set_field32(&reg, OFDM_PROT_CFG_PROTECT_NAV, 1);
1379 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1380 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1381 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1382 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1383 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1384 rt2x00_set_field32(&reg, OFDM_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1385 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
1386
1387 rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
1388 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_RATE, 0x4004);
1389 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_CTRL, 0);
1390 rt2x00_set_field32(&reg, MM20_PROT_CFG_PROTECT_NAV, 1);
1391 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1392 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1393 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1394 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1395 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1396 rt2x00_set_field32(&reg, MM20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1397 rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
1398
1399 rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
1400 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_RATE, 0x4084);
1401 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_CTRL, 0);
1402 rt2x00_set_field32(&reg, MM40_PROT_CFG_PROTECT_NAV, 1);
1403 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1404 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1405 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1406 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1407 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1408 rt2x00_set_field32(&reg, MM40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1409 rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
1410
1411 rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
1412 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_RATE, 0x4004);
1413 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_CTRL, 0);
1414 rt2x00_set_field32(&reg, GF20_PROT_CFG_PROTECT_NAV, 1);
1415 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1416 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1417 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1418 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_MM40, 0);
1419 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1420 rt2x00_set_field32(&reg, GF20_PROT_CFG_TX_OP_ALLOW_GF40, 0);
1421 rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
1422
1423 rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
1424 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_RATE, 0x4084);
1425 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_CTRL, 0);
1426 rt2x00_set_field32(&reg, GF40_PROT_CFG_PROTECT_NAV, 1);
1427 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_CCK, 1);
1428 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_OFDM, 1);
1429 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM20, 1);
1430 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_MM40, 1);
1431 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF20, 1);
1432 rt2x00_set_field32(&reg, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1);
1433 rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
1434
1435 rt2x00usb_register_write(rt2x00dev, PBF_CFG, 0xf40006);
1436
1437 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1438 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1439 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_DMA_BUSY, 0);
1440 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
1441 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_DMA_BUSY, 0);
1442 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_WP_DMA_BURST_SIZE, 3);
1443 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 0);
1444 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_BIG_ENDIAN, 0);
1445 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_RX_HDR_SCATTER, 0);
1446 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_HDR_SEG_LEN, 0);
1447 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1448
1449 rt2x00usb_register_write(rt2x00dev, TXOP_CTRL_CFG, 0x0000583f);
1450 rt2x00usb_register_write(rt2x00dev, TXOP_HLDR_ET, 0x00000002);
1451
1452 rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg);
1453 rt2x00_set_field32(&reg, TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT, 32);
1454 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES,
1455 IEEE80211_MAX_RTS_THRESHOLD);
1456 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_FBK_EN, 0);
1457 rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
1458
1459 rt2x00usb_register_write(rt2x00dev, EXP_ACK_TIME, 0x002400ca);
1460 rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003);
1461
1462 /*
1463 * ASIC will keep garbage value after boot, clear encryption keys.
1464 */
1465 for (i = 0; i < 4; i++)
1466 rt2x00usb_register_write(rt2x00dev,
1467 SHARED_KEY_MODE_ENTRY(i), 0);
1468
1469 for (i = 0; i < 256; i++) {
1470 u32 wcid[2] = { 0xffffffff, 0x00ffffff };
1471 rt2x00usb_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
1472 wcid, sizeof(wcid));
1473
1474 rt2x00usb_register_write(rt2x00dev, MAC_WCID_ATTR_ENTRY(i), 1);
1475 rt2x00usb_register_write(rt2x00dev, MAC_IVEIV_ENTRY(i), 0);
1476 }
1477
1478 /*
1479 * Clear all beacons
1480 * For the Beacon base registers we only need to clear
1481 * the first byte since that byte contains the VALID and OWNER
1482 * bits which (when set to 0) will invalidate the entire beacon.
1483 */
1484 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1485 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1486 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1487 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1488 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE4, 0);
1489 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE5, 0);
1490 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE6, 0);
1491 rt2x00usb_register_write(rt2x00dev, HW_BEACON_BASE7, 0);
1492
1493 rt2x00usb_register_read(rt2x00dev, USB_CYC_CFG, &reg);
1494 rt2x00_set_field32(&reg, USB_CYC_CFG_CLOCK_CYCLE, 30);
1495 rt2x00usb_register_write(rt2x00dev, USB_CYC_CFG, reg);
1496
1497 rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG0, &reg);
1498 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS0FBK, 0);
1499 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS1FBK, 0);
1500 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS2FBK, 1);
1501 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS3FBK, 2);
1502 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS4FBK, 3);
1503 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS5FBK, 4);
1504 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS6FBK, 5);
1505 rt2x00_set_field32(&reg, HT_FBK_CFG0_HTMCS7FBK, 6);
1506 rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG0, reg);
1507
1508 rt2x00usb_register_read(rt2x00dev, HT_FBK_CFG1, &reg);
1509 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS8FBK, 8);
1510 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS9FBK, 8);
1511 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS10FBK, 9);
1512 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS11FBK, 10);
1513 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS12FBK, 11);
1514 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS13FBK, 12);
1515 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS14FBK, 13);
1516 rt2x00_set_field32(&reg, HT_FBK_CFG1_HTMCS15FBK, 14);
1517 rt2x00usb_register_write(rt2x00dev, HT_FBK_CFG1, reg);
1518
1519 rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG0, &reg);
1520 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS0FBK, 8);
1521 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS1FBK, 8);
1522 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS2FBK, 9);
1523 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS3FBK, 10);
1524 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS4FBK, 11);
1525 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS5FBK, 12);
1526 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS6FBK, 13);
1527 rt2x00_set_field32(&reg, LG_FBK_CFG0_OFDMMCS7FBK, 14);
1528 rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG0, reg);
1529
1530 rt2x00usb_register_read(rt2x00dev, LG_FBK_CFG1, &reg);
1531 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS0FBK, 0);
1532 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS1FBK, 0);
1533 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS2FBK, 1);
1534 rt2x00_set_field32(&reg, LG_FBK_CFG0_CCKMCS3FBK, 2);
1535 rt2x00usb_register_write(rt2x00dev, LG_FBK_CFG1, reg);
1536
1537 /*
1538 * We must clear the error counters.
1539 * These registers are cleared on read,
1540 * so we may pass a useless variable to store the value.
1541 */
1542 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT0, &reg);
1543 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT1, &reg);
1544 rt2x00usb_register_read(rt2x00dev, RX_STA_CNT2, &reg);
1545 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT0, &reg);
1546 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT1, &reg);
1547 rt2x00usb_register_read(rt2x00dev, TX_STA_CNT2, &reg);
1548
1549 return 0;
1550}
1551
1552static int rt2800usb_wait_bbp_rf_ready(struct rt2x00_dev *rt2x00dev)
1553{
1554 unsigned int i;
1555 u32 reg;
1556
1557 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1558 rt2x00usb_register_read(rt2x00dev, MAC_STATUS_CFG, &reg);
1559 if (!rt2x00_get_field32(reg, MAC_STATUS_CFG_BBP_RF_BUSY))
1560 return 0;
1561
1562 udelay(REGISTER_BUSY_DELAY);
1563 }
1564
1565 ERROR(rt2x00dev, "BBP/RF register access failed, aborting.\n");
1566 return -EACCES;
1567}
1568
1569static int rt2800usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1570{
1571 unsigned int i;
1572 u8 value;
1573
1574 /*
1575 * BBP was enabled after firmware was loaded,
1576 * but we need to reactivate it now.
1577 */
1578 rt2x00usb_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
1579 rt2x00usb_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
1580 msleep(1);
1581
1582 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1583 rt2800usb_bbp_read(rt2x00dev, 0, &value);
1584 if ((value != 0xff) && (value != 0x00))
1585 return 0;
1586 udelay(REGISTER_BUSY_DELAY);
1587 }
1588
1589 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1590 return -EACCES;
1591}
1592
1593static int rt2800usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1594{
1595 unsigned int i;
1596 u16 eeprom;
1597 u8 reg_id;
1598 u8 value;
1599
1600 if (unlikely(rt2800usb_wait_bbp_rf_ready(rt2x00dev) ||
1601 rt2800usb_wait_bbp_ready(rt2x00dev)))
1602 return -EACCES;
1603
1604 rt2800usb_bbp_write(rt2x00dev, 65, 0x2c);
1605 rt2800usb_bbp_write(rt2x00dev, 66, 0x38);
1606 rt2800usb_bbp_write(rt2x00dev, 69, 0x12);
1607 rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
1608 rt2800usb_bbp_write(rt2x00dev, 73, 0x10);
1609 rt2800usb_bbp_write(rt2x00dev, 81, 0x37);
1610 rt2800usb_bbp_write(rt2x00dev, 82, 0x62);
1611 rt2800usb_bbp_write(rt2x00dev, 83, 0x6a);
1612 rt2800usb_bbp_write(rt2x00dev, 84, 0x99);
1613 rt2800usb_bbp_write(rt2x00dev, 86, 0x00);
1614 rt2800usb_bbp_write(rt2x00dev, 91, 0x04);
1615 rt2800usb_bbp_write(rt2x00dev, 92, 0x00);
1616 rt2800usb_bbp_write(rt2x00dev, 103, 0x00);
1617 rt2800usb_bbp_write(rt2x00dev, 105, 0x05);
1618
1619 if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) {
1620 rt2800usb_bbp_write(rt2x00dev, 69, 0x16);
1621 rt2800usb_bbp_write(rt2x00dev, 73, 0x12);
1622 }
1623
1624 if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION) {
1625 rt2800usb_bbp_write(rt2x00dev, 84, 0x19);
1626 }
1627
1628 if (rt2x00_rev(&rt2x00dev->chip) == RT3070_VERSION) {
1629 rt2800usb_bbp_write(rt2x00dev, 70, 0x0a);
1630 rt2800usb_bbp_write(rt2x00dev, 84, 0x99);
1631 rt2800usb_bbp_write(rt2x00dev, 105, 0x05);
1632 }
1633
1634 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1635 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1636
1637 if (eeprom != 0xffff && eeprom != 0x0000) {
1638 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1639 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1640 rt2800usb_bbp_write(rt2x00dev, reg_id, value);
1641 }
1642 }
1643
1644 return 0;
1645}
1646
1647static u8 rt2800usb_init_rx_filter(struct rt2x00_dev *rt2x00dev,
1648 bool bw40, u8 rfcsr24, u8 filter_target)
1649{
1650 unsigned int i;
1651 u8 bbp;
1652 u8 rfcsr;
1653 u8 passband;
1654 u8 stopband;
1655 u8 overtuned = 0;
1656
1657 rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
1658
1659 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
1660 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40);
1661 rt2800usb_bbp_write(rt2x00dev, 4, bbp);
1662
1663 rt2800usb_rfcsr_read(rt2x00dev, 22, &rfcsr);
1664 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1);
1665 rt2800usb_rfcsr_write(rt2x00dev, 22, rfcsr);
1666
1667 /*
1668 * Set power & frequency of passband test tone
1669 */
1670 rt2800usb_bbp_write(rt2x00dev, 24, 0);
1671
1672 for (i = 0; i < 100; i++) {
1673 rt2800usb_bbp_write(rt2x00dev, 25, 0x90);
1674 msleep(1);
1675
1676 rt2800usb_bbp_read(rt2x00dev, 55, &passband);
1677 if (passband)
1678 break;
1679 }
1680
1681 /*
1682 * Set power & frequency of stopband test tone
1683 */
1684 rt2800usb_bbp_write(rt2x00dev, 24, 0x06);
1685
1686 for (i = 0; i < 100; i++) {
1687 rt2800usb_bbp_write(rt2x00dev, 25, 0x90);
1688 msleep(1);
1689
1690 rt2800usb_bbp_read(rt2x00dev, 55, &stopband);
1691
1692 if ((passband - stopband) <= filter_target) {
1693 rfcsr24++;
1694 overtuned += ((passband - stopband) == filter_target);
1695 } else
1696 break;
1697
1698 rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
1699 }
1700
1701 rfcsr24 -= !!overtuned;
1702
1703 rt2800usb_rfcsr_write(rt2x00dev, 24, rfcsr24);
1704 return rfcsr24;
1705}
1706
1707static int rt2800usb_init_rfcsr(struct rt2x00_dev *rt2x00dev)
1708{
1709 u8 rfcsr;
1710 u8 bbp;
1711
1712 if (rt2x00_rev(&rt2x00dev->chip) != RT3070_VERSION)
1713 return 0;
1714
1715 /*
1716 * Init RF calibration.
1717 */
1718 rt2800usb_rfcsr_read(rt2x00dev, 30, &rfcsr);
1719 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1);
1720 rt2800usb_rfcsr_write(rt2x00dev, 30, rfcsr);
1721 msleep(1);
1722 rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0);
1723 rt2800usb_rfcsr_write(rt2x00dev, 30, rfcsr);
1724
1725 rt2800usb_rfcsr_write(rt2x00dev, 4, 0x40);
1726 rt2800usb_rfcsr_write(rt2x00dev, 5, 0x03);
1727 rt2800usb_rfcsr_write(rt2x00dev, 6, 0x02);
1728 rt2800usb_rfcsr_write(rt2x00dev, 7, 0x70);
1729 rt2800usb_rfcsr_write(rt2x00dev, 9, 0x0f);
1730 rt2800usb_rfcsr_write(rt2x00dev, 10, 0x71);
1731 rt2800usb_rfcsr_write(rt2x00dev, 11, 0x21);
1732 rt2800usb_rfcsr_write(rt2x00dev, 12, 0x7b);
1733 rt2800usb_rfcsr_write(rt2x00dev, 14, 0x90);
1734 rt2800usb_rfcsr_write(rt2x00dev, 15, 0x58);
1735 rt2800usb_rfcsr_write(rt2x00dev, 16, 0xb3);
1736 rt2800usb_rfcsr_write(rt2x00dev, 17, 0x92);
1737 rt2800usb_rfcsr_write(rt2x00dev, 18, 0x2c);
1738 rt2800usb_rfcsr_write(rt2x00dev, 19, 0x02);
1739 rt2800usb_rfcsr_write(rt2x00dev, 20, 0xba);
1740 rt2800usb_rfcsr_write(rt2x00dev, 21, 0xdb);
1741 rt2800usb_rfcsr_write(rt2x00dev, 24, 0x16);
1742 rt2800usb_rfcsr_write(rt2x00dev, 25, 0x01);
1743 rt2800usb_rfcsr_write(rt2x00dev, 27, 0x03);
1744 rt2800usb_rfcsr_write(rt2x00dev, 29, 0x1f);
1745
1746 /*
1747 * Set RX Filter calibration for 20MHz and 40MHz
1748 */
1749 rt2x00dev->calibration[0] =
1750 rt2800usb_init_rx_filter(rt2x00dev, false, 0x07, 0x16);
1751 rt2x00dev->calibration[1] =
1752 rt2800usb_init_rx_filter(rt2x00dev, true, 0x27, 0x19);
1753
1754 /*
1755 * Set back to initial state
1756 */
1757 rt2800usb_bbp_write(rt2x00dev, 24, 0);
1758
1759 rt2800usb_rfcsr_read(rt2x00dev, 22, &rfcsr);
1760 rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0);
1761 rt2800usb_rfcsr_write(rt2x00dev, 22, rfcsr);
1762
1763 /*
1764 * set BBP back to BW20
1765 */
1766 rt2800usb_bbp_read(rt2x00dev, 4, &bbp);
1767 rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0);
1768 rt2800usb_bbp_write(rt2x00dev, 4, bbp);
1769
1770 return 0;
1771}
1772
1773/*
1774 * Device state switch handlers. 235 * Device state switch handlers.
1775 */ 236 */
1776static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev, 237static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
@@ -1778,29 +239,11 @@ static void rt2800usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1778{ 239{
1779 u32 reg; 240 u32 reg;
1780 241
1781 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 242 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1782 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 243 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX,
1783 (state == STATE_RADIO_RX_ON) || 244 (state == STATE_RADIO_RX_ON) ||
1784 (state == STATE_RADIO_RX_ON_LINK)); 245 (state == STATE_RADIO_RX_ON_LINK));
1785 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 246 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1786}
1787
1788static int rt2800usb_wait_wpdma_ready(struct rt2x00_dev *rt2x00dev)
1789{
1790 unsigned int i;
1791 u32 reg;
1792
1793 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1794 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1795 if (!rt2x00_get_field32(reg, WPDMA_GLO_CFG_TX_DMA_BUSY) &&
1796 !rt2x00_get_field32(reg, WPDMA_GLO_CFG_RX_DMA_BUSY))
1797 return 0;
1798
1799 msleep(1);
1800 }
1801
1802 ERROR(rt2x00dev, "WPDMA TX/RX busy, aborting.\n");
1803 return -EACCES;
1804} 247}
1805 248
1806static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev) 249static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
@@ -1811,30 +254,28 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1811 /* 254 /*
1812 * Initialize all registers. 255 * Initialize all registers.
1813 */ 256 */
1814 if (unlikely(rt2800usb_wait_wpdma_ready(rt2x00dev) || 257 if (unlikely(rt2800_wait_wpdma_ready(rt2x00dev) ||
1815 rt2800usb_init_registers(rt2x00dev) || 258 rt2800_init_registers(rt2x00dev) ||
1816 rt2800usb_init_bbp(rt2x00dev) || 259 rt2800_init_bbp(rt2x00dev) ||
1817 rt2800usb_init_rfcsr(rt2x00dev))) 260 rt2800_init_rfcsr(rt2x00dev)))
1818 return -EIO; 261 return -EIO;
1819 262
1820 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 263 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1821 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1); 264 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
1822 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 265 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1823 266
1824 udelay(50); 267 udelay(50);
1825 268
1826 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 269 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1827 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1); 270 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_TX_WRITEBACK_DONE, 1);
1828 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1); 271 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 1);
1829 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1); 272 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 1);
1830 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); 273 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1831 274
1832 275
1833 rt2x00usb_register_read(rt2x00dev, USB_DMA_CFG, &reg); 276 rt2800_register_read(rt2x00dev, USB_DMA_CFG, &reg);
1834 rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0); 277 rt2x00_set_field32(&reg, USB_DMA_CFG_PHY_CLEAR, 0);
1835 /* Don't use bulk in aggregation when working with USB 1.1 */ 278 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN, 0);
1836 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_EN,
1837 (rt2x00dev->rx->usb_maxpacket == 512));
1838 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_TIMEOUT, 128); 279 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_AGG_TIMEOUT, 128);
1839 /* 280 /*
1840 * Total room for RX frames in kilobytes, PBF might still exceed 281 * Total room for RX frames in kilobytes, PBF might still exceed
@@ -1844,26 +285,26 @@ static int rt2800usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1844 ((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3); 285 ((RX_ENTRIES * DATA_FRAME_SIZE) / 1024) - 3);
1845 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1); 286 rt2x00_set_field32(&reg, USB_DMA_CFG_RX_BULK_EN, 1);
1846 rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1); 287 rt2x00_set_field32(&reg, USB_DMA_CFG_TX_BULK_EN, 1);
1847 rt2x00usb_register_write(rt2x00dev, USB_DMA_CFG, reg); 288 rt2800_register_write(rt2x00dev, USB_DMA_CFG, reg);
1848 289
1849 rt2x00usb_register_read(rt2x00dev, MAC_SYS_CTRL, &reg); 290 rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, &reg);
1850 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1); 291 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_TX, 1);
1851 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1); 292 rt2x00_set_field32(&reg, MAC_SYS_CTRL_ENABLE_RX, 1);
1852 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, reg); 293 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg);
1853 294
1854 /* 295 /*
1855 * Initialize LED control 296 * Initialize LED control
1856 */ 297 */
1857 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word); 298 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED1, &word);
1858 rt2800usb_mcu_request(rt2x00dev, MCU_LED_1, 0xff, 299 rt2800_mcu_request(rt2x00dev, MCU_LED_1, 0xff,
1859 word & 0xff, (word >> 8) & 0xff); 300 word & 0xff, (word >> 8) & 0xff);
1860 301
1861 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word); 302 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED2, &word);
1862 rt2800usb_mcu_request(rt2x00dev, MCU_LED_2, 0xff, 303 rt2800_mcu_request(rt2x00dev, MCU_LED_2, 0xff,
1863 word & 0xff, (word >> 8) & 0xff); 304 word & 0xff, (word >> 8) & 0xff);
1864 305
1865 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word); 306 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED3, &word);
1866 rt2800usb_mcu_request(rt2x00dev, MCU_LED_3, 0xff, 307 rt2800_mcu_request(rt2x00dev, MCU_LED_3, 0xff,
1867 word & 0xff, (word >> 8) & 0xff); 308 word & 0xff, (word >> 8) & 0xff);
1868 309
1869 return 0; 310 return 0;
@@ -1873,17 +314,17 @@ static void rt2800usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1873{ 314{
1874 u32 reg; 315 u32 reg;
1875 316
1876 rt2x00usb_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg); 317 rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, &reg);
1877 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0); 318 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_TX_DMA, 0);
1878 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0); 319 rt2x00_set_field32(&reg, WPDMA_GLO_CFG_ENABLE_RX_DMA, 0);
1879 rt2x00usb_register_write(rt2x00dev, WPDMA_GLO_CFG, reg); 320 rt2800_register_write(rt2x00dev, WPDMA_GLO_CFG, reg);
1880 321
1881 rt2x00usb_register_write(rt2x00dev, MAC_SYS_CTRL, 0); 322 rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, 0);
1882 rt2x00usb_register_write(rt2x00dev, PWR_PIN_CFG, 0); 323 rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0);
1883 rt2x00usb_register_write(rt2x00dev, TX_PIN_CFG, 0); 324 rt2800_register_write(rt2x00dev, TX_PIN_CFG, 0);
1884 325
1885 /* Wait for DMA, ignore error */ 326 /* Wait for DMA, ignore error */
1886 rt2800usb_wait_wpdma_ready(rt2x00dev); 327 rt2800_wait_wpdma_ready(rt2x00dev);
1887 328
1888 rt2x00usb_disable_radio(rt2x00dev); 329 rt2x00usb_disable_radio(rt2x00dev);
1889} 330}
@@ -1892,9 +333,9 @@ static int rt2800usb_set_state(struct rt2x00_dev *rt2x00dev,
1892 enum dev_state state) 333 enum dev_state state)
1893{ 334{
1894 if (state == STATE_AWAKE) 335 if (state == STATE_AWAKE)
1895 rt2800usb_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0); 336 rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0);
1896 else 337 else
1897 rt2800usb_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2); 338 rt2800_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 2);
1898 339
1899 return 0; 340 return 0;
1900} 341}
@@ -2048,9 +489,9 @@ static void rt2800usb_write_beacon(struct queue_entry *entry)
2048 * Disable beaconing while we are reloading the beacon data, 489 * Disable beaconing while we are reloading the beacon data,
2049 * otherwise we might be sending out invalid data. 490 * otherwise we might be sending out invalid data.
2050 */ 491 */
2051 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 492 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
2052 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0); 493 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 0);
2053 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 494 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
2054 495
2055 /* 496 /*
2056 * Write entire beacon with descriptor to register. 497 * Write entire beacon with descriptor to register.
@@ -2093,12 +534,12 @@ static void rt2800usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
2093 return; 534 return;
2094 } 535 }
2095 536
2096 rt2x00usb_register_read(rt2x00dev, BCN_TIME_CFG, &reg); 537 rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
2097 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) { 538 if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
2098 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1); 539 rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
2099 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1); 540 rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
2100 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1); 541 rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
2101 rt2x00usb_register_write(rt2x00dev, BCN_TIME_CFG, reg); 542 rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
2102 } 543 }
2103} 544}
2104 545
@@ -2110,30 +551,46 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
2110{ 551{
2111 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; 552 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
2112 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); 553 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
2113 __le32 *rxd = (__le32 *)entry->skb->data; 554 __le32 *rxi = (__le32 *)entry->skb->data;
2114 __le32 *rxwi; 555 __le32 *rxwi;
2115 u32 rxd0; 556 __le32 *rxd;
557 u32 rxi0;
2116 u32 rxwi0; 558 u32 rxwi0;
2117 u32 rxwi1; 559 u32 rxwi1;
2118 u32 rxwi2; 560 u32 rxwi2;
2119 u32 rxwi3; 561 u32 rxwi3;
562 u32 rxd0;
563 int rx_pkt_len;
564
565 /*
566 * RX frame format is :
567 * | RXINFO | RXWI | header | L2 pad | payload | pad | RXD | USB pad |
568 * |<------------ rx_pkt_len -------------->|
569 */
570 rt2x00_desc_read(rxi, 0, &rxi0);
571 rx_pkt_len = rt2x00_get_field32(rxi0, RXINFO_W0_USB_DMA_RX_PKT_LEN);
572
573 rxwi = (__le32 *)(entry->skb->data + RXINFO_DESC_SIZE);
574
575 /*
576 * FIXME : we need to check for rx_pkt_len validity
577 */
578 rxd = (__le32 *)(entry->skb->data + RXINFO_DESC_SIZE + rx_pkt_len);
2120 579
2121 /* 580 /*
2122 * Copy descriptor to the skbdesc->desc buffer, making it safe from 581 * Copy descriptor to the skbdesc->desc buffer, making it safe from
2123 * moving of frame data in rt2x00usb. 582 * moving of frame data in rt2x00usb.
2124 */ 583 */
2125 memcpy(skbdesc->desc, rxd, skbdesc->desc_len); 584 memcpy(skbdesc->desc, rxi, skbdesc->desc_len);
2126 rxd = (__le32 *)skbdesc->desc;
2127 rxwi = &rxd[RXD_DESC_SIZE / sizeof(__le32)];
2128 585
2129 /* 586 /*
2130 * It is now safe to read the descriptor on all architectures. 587 * It is now safe to read the descriptor on all architectures.
2131 */ 588 */
2132 rt2x00_desc_read(rxd, 0, &rxd0);
2133 rt2x00_desc_read(rxwi, 0, &rxwi0); 589 rt2x00_desc_read(rxwi, 0, &rxwi0);
2134 rt2x00_desc_read(rxwi, 1, &rxwi1); 590 rt2x00_desc_read(rxwi, 1, &rxwi1);
2135 rt2x00_desc_read(rxwi, 2, &rxwi2); 591 rt2x00_desc_read(rxwi, 2, &rxwi2);
2136 rt2x00_desc_read(rxwi, 3, &rxwi3); 592 rt2x00_desc_read(rxwi, 3, &rxwi3);
593 rt2x00_desc_read(rxd, 0, &rxd0);
2137 594
2138 if (rt2x00_get_field32(rxd0, RXD_W0_CRC_ERROR)) 595 if (rt2x00_get_field32(rxd0, RXD_W0_CRC_ERROR))
2139 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; 596 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
@@ -2162,10 +619,8 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
2162 if (rt2x00_get_field32(rxd0, RXD_W0_MY_BSS)) 619 if (rt2x00_get_field32(rxd0, RXD_W0_MY_BSS))
2163 rxdesc->dev_flags |= RXDONE_MY_BSS; 620 rxdesc->dev_flags |= RXDONE_MY_BSS;
2164 621
2165 if (rt2x00_get_field32(rxd0, RXD_W0_L2PAD)) { 622 if (rt2x00_get_field32(rxd0, RXD_W0_L2PAD))
2166 rxdesc->dev_flags |= RXDONE_L2PAD; 623 rxdesc->dev_flags |= RXDONE_L2PAD;
2167 skbdesc->flags |= SKBDESC_L2_PADDED;
2168 }
2169 624
2170 if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI)) 625 if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
2171 rxdesc->flags |= RX_FLAG_SHORT_GI; 626 rxdesc->flags |= RX_FLAG_SHORT_GI;
@@ -2200,7 +655,6 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
2200 * Remove RXWI descriptor from start of buffer. 655 * Remove RXWI descriptor from start of buffer.
2201 */ 656 */
2202 skb_pull(entry->skb, skbdesc->desc_len); 657 skb_pull(entry->skb, skbdesc->desc_len);
2203 skb_trim(entry->skb, rxdesc->size);
2204} 658}
2205 659
2206/* 660/*
@@ -2208,402 +662,33 @@ static void rt2800usb_fill_rxdone(struct queue_entry *entry,
2208 */ 662 */
2209static int rt2800usb_validate_eeprom(struct rt2x00_dev *rt2x00dev) 663static int rt2800usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
2210{ 664{
2211 u16 word; 665 if (rt2800_efuse_detect(rt2x00dev))
2212 u8 *mac; 666 rt2800_read_eeprom_efuse(rt2x00dev);
2213 u8 default_lna_gain; 667 else
2214 668 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom,
2215 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE); 669 EEPROM_SIZE);
2216
2217 /*
2218 * Start validation of the data that has been read.
2219 */
2220 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
2221 if (!is_valid_ether_addr(mac)) {
2222 random_ether_addr(mac);
2223 EEPROM(rt2x00dev, "MAC: %pM\n", mac);
2224 }
2225
2226 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
2227 if (word == 0xffff) {
2228 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
2229 rt2x00_set_field16(&word, EEPROM_ANTENNA_TXPATH, 1);
2230 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820);
2231 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
2232 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
2233 } else if (rt2x00_rev(&rt2x00dev->chip) < RT2883_VERSION) {
2234 /*
2235 * There is a max of 2 RX streams for RT2870 series
2236 */
2237 if (rt2x00_get_field16(word, EEPROM_ANTENNA_RXPATH) > 2)
2238 rt2x00_set_field16(&word, EEPROM_ANTENNA_RXPATH, 2);
2239 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
2240 }
2241
2242 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
2243 if (word == 0xffff) {
2244 rt2x00_set_field16(&word, EEPROM_NIC_HW_RADIO, 0);
2245 rt2x00_set_field16(&word, EEPROM_NIC_DYNAMIC_TX_AGC, 0);
2246 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0);
2247 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0);
2248 rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0);
2249 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_BG, 0);
2250 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_SB_A, 0);
2251 rt2x00_set_field16(&word, EEPROM_NIC_WPS_PBC, 0);
2252 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_BG, 0);
2253 rt2x00_set_field16(&word, EEPROM_NIC_BW40M_A, 0);
2254 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
2255 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
2256 }
2257
2258 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
2259 if ((word & 0x00ff) == 0x00ff) {
2260 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
2261 rt2x00_set_field16(&word, EEPROM_FREQ_LED_MODE,
2262 LED_MODE_TXRX_ACTIVITY);
2263 rt2x00_set_field16(&word, EEPROM_FREQ_LED_POLARITY, 0);
2264 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
2265 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED1, 0x5555);
2266 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED2, 0x2221);
2267 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED3, 0xa9f8);
2268 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
2269 }
2270
2271 /*
2272 * During the LNA validation we are going to use
2273 * lna0 as correct value. Note that EEPROM_LNA
2274 * is never validated.
2275 */
2276 rt2x00_eeprom_read(rt2x00dev, EEPROM_LNA, &word);
2277 default_lna_gain = rt2x00_get_field16(word, EEPROM_LNA_A0);
2278
2279 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG, &word);
2280 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET0)) > 10)
2281 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET0, 0);
2282 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG_OFFSET1)) > 10)
2283 rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET1, 0);
2284 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG, word);
2285
2286 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &word);
2287 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10)
2288 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0);
2289 if (rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0x00 ||
2290 rt2x00_get_field16(word, EEPROM_RSSI_BG2_LNA_A1) == 0xff)
2291 rt2x00_set_field16(&word, EEPROM_RSSI_BG2_LNA_A1,
2292 default_lna_gain);
2293 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG2, word);
2294
2295 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A, &word);
2296 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET0)) > 10)
2297 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET0, 0);
2298 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET1)) > 10)
2299 rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET1, 0);
2300 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A, word);
2301
2302 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A2, &word);
2303 if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A2_OFFSET2)) > 10)
2304 rt2x00_set_field16(&word, EEPROM_RSSI_A2_OFFSET2, 0);
2305 if (rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0x00 ||
2306 rt2x00_get_field16(word, EEPROM_RSSI_A2_LNA_A2) == 0xff)
2307 rt2x00_set_field16(&word, EEPROM_RSSI_A2_LNA_A2,
2308 default_lna_gain);
2309 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_A2, word);
2310 670
2311 return 0; 671 return rt2800_validate_eeprom(rt2x00dev);
2312} 672}
2313 673
2314static int rt2800usb_init_eeprom(struct rt2x00_dev *rt2x00dev) 674static const struct rt2800_ops rt2800usb_rt2800_ops = {
2315{ 675 .register_read = rt2x00usb_register_read,
2316 u32 reg; 676 .register_read_lock = rt2x00usb_register_read_lock,
2317 u16 value; 677 .register_write = rt2x00usb_register_write,
2318 u16 eeprom; 678 .register_write_lock = rt2x00usb_register_write_lock,
2319
2320 /*
2321 * Read EEPROM word for configuration.
2322 */
2323 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
2324
2325 /*
2326 * Identify RF chipset.
2327 */
2328 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
2329 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
2330 rt2x00_set_chip(rt2x00dev, RT2870, value, reg);
2331
2332 /*
2333 * The check for rt2860 is not a typo, some rt2870 hardware
2334 * identifies itself as rt2860 in the CSR register.
2335 */
2336 if (!rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28600000) &&
2337 !rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28700000) &&
2338 !rt2x00_check_rev(&rt2x00dev->chip, 0xfff00000, 0x28800000) &&
2339 !rt2x00_check_rev(&rt2x00dev->chip, 0xffff0000, 0x30700000)) {
2340 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
2341 return -ENODEV;
2342 }
2343
2344 if (!rt2x00_rf(&rt2x00dev->chip, RF2820) &&
2345 !rt2x00_rf(&rt2x00dev->chip, RF2850) &&
2346 !rt2x00_rf(&rt2x00dev->chip, RF2720) &&
2347 !rt2x00_rf(&rt2x00dev->chip, RF2750) &&
2348 !rt2x00_rf(&rt2x00dev->chip, RF3020) &&
2349 !rt2x00_rf(&rt2x00dev->chip, RF2020)) {
2350 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
2351 return -ENODEV;
2352 }
2353
2354 /*
2355 * Identify default antenna configuration.
2356 */
2357 rt2x00dev->default_ant.tx =
2358 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH);
2359 rt2x00dev->default_ant.rx =
2360 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH);
2361
2362 /*
2363 * Read frequency offset and RF programming sequence.
2364 */
2365 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
2366 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
2367
2368 /*
2369 * Read external LNA informations.
2370 */
2371 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
2372
2373 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_A))
2374 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
2375 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA_BG))
2376 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
2377
2378 /*
2379 * Detect if this device has an hardware controlled radio.
2380 */
2381 if (rt2x00_get_field16(eeprom, EEPROM_NIC_HW_RADIO))
2382 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
2383
2384 /*
2385 * Store led settings, for correct led behaviour.
2386 */
2387#ifdef CONFIG_RT2X00_LIB_LEDS
2388 rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
2389 rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
2390 rt2800usb_init_led(rt2x00dev, &rt2x00dev->led_qual, LED_TYPE_QUALITY);
2391 679
2392 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, 680 .register_multiread = rt2x00usb_register_multiread,
2393 &rt2x00dev->led_mcu_reg); 681 .register_multiwrite = rt2x00usb_register_multiwrite,
2394#endif /* CONFIG_RT2X00_LIB_LEDS */
2395 682
2396 return 0; 683 .regbusy_read = rt2x00usb_regbusy_read,
2397}
2398
2399/*
2400 * RF value list for rt2870
2401 * Supports: 2.4 GHz (all) & 5.2 GHz (RF2850 & RF2750)
2402 */
2403static const struct rf_channel rf_vals[] = {
2404 { 1, 0x18402ecc, 0x184c0786, 0x1816b455, 0x1800510b },
2405 { 2, 0x18402ecc, 0x184c0786, 0x18168a55, 0x1800519f },
2406 { 3, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800518b },
2407 { 4, 0x18402ecc, 0x184c078a, 0x18168a55, 0x1800519f },
2408 { 5, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800518b },
2409 { 6, 0x18402ecc, 0x184c078e, 0x18168a55, 0x1800519f },
2410 { 7, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800518b },
2411 { 8, 0x18402ecc, 0x184c0792, 0x18168a55, 0x1800519f },
2412 { 9, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800518b },
2413 { 10, 0x18402ecc, 0x184c0796, 0x18168a55, 0x1800519f },
2414 { 11, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800518b },
2415 { 12, 0x18402ecc, 0x184c079a, 0x18168a55, 0x1800519f },
2416 { 13, 0x18402ecc, 0x184c079e, 0x18168a55, 0x1800518b },
2417 { 14, 0x18402ecc, 0x184c07a2, 0x18168a55, 0x18005193 },
2418
2419 /* 802.11 UNI / HyperLan 2 */
2420 { 36, 0x18402ecc, 0x184c099a, 0x18158a55, 0x180ed1a3 },
2421 { 38, 0x18402ecc, 0x184c099e, 0x18158a55, 0x180ed193 },
2422 { 40, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed183 },
2423 { 44, 0x18402ec8, 0x184c0682, 0x18158a55, 0x180ed1a3 },
2424 { 46, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed18b },
2425 { 48, 0x18402ec8, 0x184c0686, 0x18158a55, 0x180ed19b },
2426 { 52, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed193 },
2427 { 54, 0x18402ec8, 0x184c068a, 0x18158a55, 0x180ed1a3 },
2428 { 56, 0x18402ec8, 0x184c068e, 0x18158a55, 0x180ed18b },
2429 { 60, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed183 },
2430 { 62, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed193 },
2431 { 64, 0x18402ec8, 0x184c0692, 0x18158a55, 0x180ed1a3 },
2432
2433 /* 802.11 HyperLan 2 */
2434 { 100, 0x18402ec8, 0x184c06b2, 0x18178a55, 0x180ed783 },
2435 { 102, 0x18402ec8, 0x184c06b2, 0x18578a55, 0x180ed793 },
2436 { 104, 0x18402ec8, 0x185c06b2, 0x18578a55, 0x180ed1a3 },
2437 { 108, 0x18402ecc, 0x185c0a32, 0x18578a55, 0x180ed193 },
2438 { 110, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed183 },
2439 { 112, 0x18402ecc, 0x184c0a36, 0x18178a55, 0x180ed19b },
2440 { 116, 0x18402ecc, 0x184c0a3a, 0x18178a55, 0x180ed1a3 },
2441 { 118, 0x18402ecc, 0x184c0a3e, 0x18178a55, 0x180ed193 },
2442 { 120, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed183 },
2443 { 124, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed193 },
2444 { 126, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed15b },
2445 { 128, 0x18402ec4, 0x184c0382, 0x18178a55, 0x180ed1a3 },
2446 { 132, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed18b },
2447 { 134, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed193 },
2448 { 136, 0x18402ec4, 0x184c0386, 0x18178a55, 0x180ed19b },
2449 { 140, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed183 },
2450
2451 /* 802.11 UNII */
2452 { 149, 0x18402ec4, 0x184c038a, 0x18178a55, 0x180ed1a7 },
2453 { 151, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed187 },
2454 { 153, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed18f },
2455 { 157, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed19f },
2456 { 159, 0x18402ec4, 0x184c038e, 0x18178a55, 0x180ed1a7 },
2457 { 161, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed187 },
2458 { 165, 0x18402ec4, 0x184c0392, 0x18178a55, 0x180ed197 },
2459 { 167, 0x18402ec4, 0x184c03d2, 0x18179855, 0x1815531f },
2460 { 169, 0x18402ec4, 0x184c03d2, 0x18179855, 0x18155327 },
2461 { 171, 0x18402ec4, 0x184c03d6, 0x18179855, 0x18155307 },
2462 { 173, 0x18402ec4, 0x184c03d6, 0x18179855, 0x1815530f },
2463
2464 /* 802.11 Japan */
2465 { 184, 0x15002ccc, 0x1500491e, 0x1509be55, 0x150c0a0b },
2466 { 188, 0x15002ccc, 0x15004922, 0x1509be55, 0x150c0a13 },
2467 { 192, 0x15002ccc, 0x15004926, 0x1509be55, 0x150c0a1b },
2468 { 196, 0x15002ccc, 0x1500492a, 0x1509be55, 0x150c0a23 },
2469 { 208, 0x15002ccc, 0x1500493a, 0x1509be55, 0x150c0a13 },
2470 { 212, 0x15002ccc, 0x1500493e, 0x1509be55, 0x150c0a1b },
2471 { 216, 0x15002ccc, 0x15004982, 0x1509be55, 0x150c0a23 },
2472}; 684};
2473 685
2474/*
2475 * RF value list for rt3070
2476 * Supports: 2.4 GHz
2477 */
2478static const struct rf_channel rf_vals_3070[] = {
2479 {1, 241, 2, 2 },
2480 {2, 241, 2, 7 },
2481 {3, 242, 2, 2 },
2482 {4, 242, 2, 7 },
2483 {5, 243, 2, 2 },
2484 {6, 243, 2, 7 },
2485 {7, 244, 2, 2 },
2486 {8, 244, 2, 7 },
2487 {9, 245, 2, 2 },
2488 {10, 245, 2, 7 },
2489 {11, 246, 2, 2 },
2490 {12, 246, 2, 7 },
2491 {13, 247, 2, 2 },
2492 {14, 248, 2, 4 },
2493};
2494
2495static int rt2800usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2496{
2497 struct hw_mode_spec *spec = &rt2x00dev->spec;
2498 struct channel_info *info;
2499 char *tx_power1;
2500 char *tx_power2;
2501 unsigned int i;
2502 u16 eeprom;
2503
2504 /*
2505 * Initialize all hw fields.
2506 */
2507 rt2x00dev->hw->flags =
2508 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
2509 IEEE80211_HW_SIGNAL_DBM |
2510 IEEE80211_HW_SUPPORTS_PS |
2511 IEEE80211_HW_PS_NULLFUNC_STACK;
2512 rt2x00dev->hw->extra_tx_headroom = TXINFO_DESC_SIZE + TXWI_DESC_SIZE;
2513
2514 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
2515 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
2516 rt2x00_eeprom_addr(rt2x00dev,
2517 EEPROM_MAC_ADDR_0));
2518
2519 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
2520
2521 /*
2522 * Initialize HT information.
2523 */
2524 spec->ht.ht_supported = true;
2525 spec->ht.cap =
2526 IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
2527 IEEE80211_HT_CAP_GRN_FLD |
2528 IEEE80211_HT_CAP_SGI_20 |
2529 IEEE80211_HT_CAP_SGI_40 |
2530 IEEE80211_HT_CAP_TX_STBC |
2531 IEEE80211_HT_CAP_RX_STBC |
2532 IEEE80211_HT_CAP_PSMP_SUPPORT;
2533 spec->ht.ampdu_factor = 3;
2534 spec->ht.ampdu_density = 4;
2535 spec->ht.mcs.tx_params =
2536 IEEE80211_HT_MCS_TX_DEFINED |
2537 IEEE80211_HT_MCS_TX_RX_DIFF |
2538 ((rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TXPATH) - 1) <<
2539 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
2540
2541 switch (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RXPATH)) {
2542 case 3:
2543 spec->ht.mcs.rx_mask[2] = 0xff;
2544 case 2:
2545 spec->ht.mcs.rx_mask[1] = 0xff;
2546 case 1:
2547 spec->ht.mcs.rx_mask[0] = 0xff;
2548 spec->ht.mcs.rx_mask[4] = 0x1; /* MCS32 */
2549 break;
2550 }
2551
2552 /*
2553 * Initialize hw_mode information.
2554 */
2555 spec->supported_bands = SUPPORT_BAND_2GHZ;
2556 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
2557
2558 if (rt2x00_rf(&rt2x00dev->chip, RF2820) ||
2559 rt2x00_rf(&rt2x00dev->chip, RF2720)) {
2560 spec->num_channels = 14;
2561 spec->channels = rf_vals;
2562 } else if (rt2x00_rf(&rt2x00dev->chip, RF2850) ||
2563 rt2x00_rf(&rt2x00dev->chip, RF2750)) {
2564 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2565 spec->num_channels = ARRAY_SIZE(rf_vals);
2566 spec->channels = rf_vals;
2567 } else if (rt2x00_rf(&rt2x00dev->chip, RF3020) ||
2568 rt2x00_rf(&rt2x00dev->chip, RF2020)) {
2569 spec->num_channels = ARRAY_SIZE(rf_vals_3070);
2570 spec->channels = rf_vals_3070;
2571 }
2572
2573 /*
2574 * Create channel information array
2575 */
2576 info = kzalloc(spec->num_channels * sizeof(*info), GFP_KERNEL);
2577 if (!info)
2578 return -ENOMEM;
2579
2580 spec->channels_info = info;
2581
2582 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG1);
2583 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_BG2);
2584
2585 for (i = 0; i < 14; i++) {
2586 info[i].tx_power1 = TXPOWER_G_FROM_DEV(tx_power1[i]);
2587 info[i].tx_power2 = TXPOWER_G_FROM_DEV(tx_power2[i]);
2588 }
2589
2590 if (spec->num_channels > 14) {
2591 tx_power1 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A1);
2592 tx_power2 = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A2);
2593
2594 for (i = 14; i < spec->num_channels; i++) {
2595 info[i].tx_power1 = TXPOWER_A_FROM_DEV(tx_power1[i]);
2596 info[i].tx_power2 = TXPOWER_A_FROM_DEV(tx_power2[i]);
2597 }
2598 }
2599
2600 return 0;
2601}
2602
2603static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev) 686static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2604{ 687{
2605 int retval; 688 int retval;
2606 689
690 rt2x00dev->priv = (void *)&rt2800usb_rt2800_ops;
691
2607 /* 692 /*
2608 * Allocate eeprom data. 693 * Allocate eeprom data.
2609 */ 694 */
@@ -2611,14 +696,14 @@ static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2611 if (retval) 696 if (retval)
2612 return retval; 697 return retval;
2613 698
2614 retval = rt2800usb_init_eeprom(rt2x00dev); 699 retval = rt2800_init_eeprom(rt2x00dev);
2615 if (retval) 700 if (retval)
2616 return retval; 701 return retval;
2617 702
2618 /* 703 /*
2619 * Initialize hw specifications. 704 * Initialize hw specifications.
2620 */ 705 */
2621 retval = rt2800usb_probe_hw_mode(rt2x00dev); 706 retval = rt2800_probe_hw_mode(rt2x00dev);
2622 if (retval) 707 if (retval)
2623 return retval; 708 return retval;
2624 709
@@ -2645,162 +730,6 @@ static int rt2800usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2645 return 0; 730 return 0;
2646} 731}
2647 732
2648/*
2649 * IEEE80211 stack callback functions.
2650 */
2651static void rt2800usb_get_tkip_seq(struct ieee80211_hw *hw, u8 hw_key_idx,
2652 u32 *iv32, u16 *iv16)
2653{
2654 struct rt2x00_dev *rt2x00dev = hw->priv;
2655 struct mac_iveiv_entry iveiv_entry;
2656 u32 offset;
2657
2658 offset = MAC_IVEIV_ENTRY(hw_key_idx);
2659 rt2x00usb_register_multiread(rt2x00dev, offset,
2660 &iveiv_entry, sizeof(iveiv_entry));
2661
2662 memcpy(&iveiv_entry.iv[0], iv16, sizeof(iv16));
2663 memcpy(&iveiv_entry.iv[4], iv32, sizeof(iv32));
2664}
2665
2666static int rt2800usb_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
2667{
2668 struct rt2x00_dev *rt2x00dev = hw->priv;
2669 u32 reg;
2670 bool enabled = (value < IEEE80211_MAX_RTS_THRESHOLD);
2671
2672 rt2x00usb_register_read(rt2x00dev, TX_RTS_CFG, &reg);
2673 rt2x00_set_field32(&reg, TX_RTS_CFG_RTS_THRES, value);
2674 rt2x00usb_register_write(rt2x00dev, TX_RTS_CFG, reg);
2675
2676 rt2x00usb_register_read(rt2x00dev, CCK_PROT_CFG, &reg);
2677 rt2x00_set_field32(&reg, CCK_PROT_CFG_RTS_TH_EN, enabled);
2678 rt2x00usb_register_write(rt2x00dev, CCK_PROT_CFG, reg);
2679
2680 rt2x00usb_register_read(rt2x00dev, OFDM_PROT_CFG, &reg);
2681 rt2x00_set_field32(&reg, OFDM_PROT_CFG_RTS_TH_EN, enabled);
2682 rt2x00usb_register_write(rt2x00dev, OFDM_PROT_CFG, reg);
2683
2684 rt2x00usb_register_read(rt2x00dev, MM20_PROT_CFG, &reg);
2685 rt2x00_set_field32(&reg, MM20_PROT_CFG_RTS_TH_EN, enabled);
2686 rt2x00usb_register_write(rt2x00dev, MM20_PROT_CFG, reg);
2687
2688 rt2x00usb_register_read(rt2x00dev, MM40_PROT_CFG, &reg);
2689 rt2x00_set_field32(&reg, MM40_PROT_CFG_RTS_TH_EN, enabled);
2690 rt2x00usb_register_write(rt2x00dev, MM40_PROT_CFG, reg);
2691
2692 rt2x00usb_register_read(rt2x00dev, GF20_PROT_CFG, &reg);
2693 rt2x00_set_field32(&reg, GF20_PROT_CFG_RTS_TH_EN, enabled);
2694 rt2x00usb_register_write(rt2x00dev, GF20_PROT_CFG, reg);
2695
2696 rt2x00usb_register_read(rt2x00dev, GF40_PROT_CFG, &reg);
2697 rt2x00_set_field32(&reg, GF40_PROT_CFG_RTS_TH_EN, enabled);
2698 rt2x00usb_register_write(rt2x00dev, GF40_PROT_CFG, reg);
2699
2700 return 0;
2701}
2702
2703static int rt2800usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2704 const struct ieee80211_tx_queue_params *params)
2705{
2706 struct rt2x00_dev *rt2x00dev = hw->priv;
2707 struct data_queue *queue;
2708 struct rt2x00_field32 field;
2709 int retval;
2710 u32 reg;
2711 u32 offset;
2712
2713 /*
2714 * First pass the configuration through rt2x00lib, that will
2715 * update the queue settings and validate the input. After that
2716 * we are free to update the registers based on the value
2717 * in the queue parameter.
2718 */
2719 retval = rt2x00mac_conf_tx(hw, queue_idx, params);
2720 if (retval)
2721 return retval;
2722
2723 /*
2724 * We only need to perform additional register initialization
2725 * for WMM queues/
2726 */
2727 if (queue_idx >= 4)
2728 return 0;
2729
2730 queue = rt2x00queue_get_queue(rt2x00dev, queue_idx);
2731
2732 /* Update WMM TXOP register */
2733 offset = WMM_TXOP0_CFG + (sizeof(u32) * (!!(queue_idx & 2)));
2734 field.bit_offset = (queue_idx & 1) * 16;
2735 field.bit_mask = 0xffff << field.bit_offset;
2736
2737 rt2x00usb_register_read(rt2x00dev, offset, &reg);
2738 rt2x00_set_field32(&reg, field, queue->txop);
2739 rt2x00usb_register_write(rt2x00dev, offset, reg);
2740
2741 /* Update WMM registers */
2742 field.bit_offset = queue_idx * 4;
2743 field.bit_mask = 0xf << field.bit_offset;
2744
2745 rt2x00usb_register_read(rt2x00dev, WMM_AIFSN_CFG, &reg);
2746 rt2x00_set_field32(&reg, field, queue->aifs);
2747 rt2x00usb_register_write(rt2x00dev, WMM_AIFSN_CFG, reg);
2748
2749 rt2x00usb_register_read(rt2x00dev, WMM_CWMIN_CFG, &reg);
2750 rt2x00_set_field32(&reg, field, queue->cw_min);
2751 rt2x00usb_register_write(rt2x00dev, WMM_CWMIN_CFG, reg);
2752
2753 rt2x00usb_register_read(rt2x00dev, WMM_CWMAX_CFG, &reg);
2754 rt2x00_set_field32(&reg, field, queue->cw_max);
2755 rt2x00usb_register_write(rt2x00dev, WMM_CWMAX_CFG, reg);
2756
2757 /* Update EDCA registers */
2758 offset = EDCA_AC0_CFG + (sizeof(u32) * queue_idx);
2759
2760 rt2x00usb_register_read(rt2x00dev, offset, &reg);
2761 rt2x00_set_field32(&reg, EDCA_AC0_CFG_TX_OP, queue->txop);
2762 rt2x00_set_field32(&reg, EDCA_AC0_CFG_AIFSN, queue->aifs);
2763 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMIN, queue->cw_min);
2764 rt2x00_set_field32(&reg, EDCA_AC0_CFG_CWMAX, queue->cw_max);
2765 rt2x00usb_register_write(rt2x00dev, offset, reg);
2766
2767 return 0;
2768}
2769
2770static u64 rt2800usb_get_tsf(struct ieee80211_hw *hw)
2771{
2772 struct rt2x00_dev *rt2x00dev = hw->priv;
2773 u64 tsf;
2774 u32 reg;
2775
2776 rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW1, &reg);
2777 tsf = (u64) rt2x00_get_field32(reg, TSF_TIMER_DW1_HIGH_WORD) << 32;
2778 rt2x00usb_register_read(rt2x00dev, TSF_TIMER_DW0, &reg);
2779 tsf |= rt2x00_get_field32(reg, TSF_TIMER_DW0_LOW_WORD);
2780
2781 return tsf;
2782}
2783
2784static const struct ieee80211_ops rt2800usb_mac80211_ops = {
2785 .tx = rt2x00mac_tx,
2786 .start = rt2x00mac_start,
2787 .stop = rt2x00mac_stop,
2788 .add_interface = rt2x00mac_add_interface,
2789 .remove_interface = rt2x00mac_remove_interface,
2790 .config = rt2x00mac_config,
2791 .configure_filter = rt2x00mac_configure_filter,
2792 .set_tim = rt2x00mac_set_tim,
2793 .set_key = rt2x00mac_set_key,
2794 .get_stats = rt2x00mac_get_stats,
2795 .get_tkip_seq = rt2800usb_get_tkip_seq,
2796 .set_rts_threshold = rt2800usb_set_rts_threshold,
2797 .bss_info_changed = rt2x00mac_bss_info_changed,
2798 .conf_tx = rt2800usb_conf_tx,
2799 .get_tx_stats = rt2x00mac_get_tx_stats,
2800 .get_tsf = rt2800usb_get_tsf,
2801 .rfkill_poll = rt2x00mac_rfkill_poll,
2802};
2803
2804static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = { 733static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
2805 .probe_hw = rt2800usb_probe_hw, 734 .probe_hw = rt2800usb_probe_hw,
2806 .get_firmware_name = rt2800usb_get_firmware_name, 735 .get_firmware_name = rt2800usb_get_firmware_name,
@@ -2810,10 +739,10 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
2810 .uninitialize = rt2x00usb_uninitialize, 739 .uninitialize = rt2x00usb_uninitialize,
2811 .clear_entry = rt2x00usb_clear_entry, 740 .clear_entry = rt2x00usb_clear_entry,
2812 .set_device_state = rt2800usb_set_device_state, 741 .set_device_state = rt2800usb_set_device_state,
2813 .rfkill_poll = rt2800usb_rfkill_poll, 742 .rfkill_poll = rt2800_rfkill_poll,
2814 .link_stats = rt2800usb_link_stats, 743 .link_stats = rt2800_link_stats,
2815 .reset_tuner = rt2800usb_reset_tuner, 744 .reset_tuner = rt2800_reset_tuner,
2816 .link_tuner = rt2800usb_link_tuner, 745 .link_tuner = rt2800_link_tuner,
2817 .write_tx_desc = rt2800usb_write_tx_desc, 746 .write_tx_desc = rt2800usb_write_tx_desc,
2818 .write_tx_data = rt2x00usb_write_tx_data, 747 .write_tx_data = rt2x00usb_write_tx_data,
2819 .write_beacon = rt2800usb_write_beacon, 748 .write_beacon = rt2800usb_write_beacon,
@@ -2821,19 +750,19 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
2821 .kick_tx_queue = rt2800usb_kick_tx_queue, 750 .kick_tx_queue = rt2800usb_kick_tx_queue,
2822 .kill_tx_queue = rt2x00usb_kill_tx_queue, 751 .kill_tx_queue = rt2x00usb_kill_tx_queue,
2823 .fill_rxdone = rt2800usb_fill_rxdone, 752 .fill_rxdone = rt2800usb_fill_rxdone,
2824 .config_shared_key = rt2800usb_config_shared_key, 753 .config_shared_key = rt2800_config_shared_key,
2825 .config_pairwise_key = rt2800usb_config_pairwise_key, 754 .config_pairwise_key = rt2800_config_pairwise_key,
2826 .config_filter = rt2800usb_config_filter, 755 .config_filter = rt2800_config_filter,
2827 .config_intf = rt2800usb_config_intf, 756 .config_intf = rt2800_config_intf,
2828 .config_erp = rt2800usb_config_erp, 757 .config_erp = rt2800_config_erp,
2829 .config_ant = rt2800usb_config_ant, 758 .config_ant = rt2800_config_ant,
2830 .config = rt2800usb_config, 759 .config = rt2800_config,
2831}; 760};
2832 761
2833static const struct data_queue_desc rt2800usb_queue_rx = { 762static const struct data_queue_desc rt2800usb_queue_rx = {
2834 .entry_num = RX_ENTRIES, 763 .entry_num = RX_ENTRIES,
2835 .data_size = AGGREGATION_SIZE, 764 .data_size = AGGREGATION_SIZE,
2836 .desc_size = RXD_DESC_SIZE + RXWI_DESC_SIZE, 765 .desc_size = RXINFO_DESC_SIZE + RXWI_DESC_SIZE,
2837 .priv_size = sizeof(struct queue_entry_priv_usb), 766 .priv_size = sizeof(struct queue_entry_priv_usb),
2838}; 767};
2839 768
@@ -2852,19 +781,20 @@ static const struct data_queue_desc rt2800usb_queue_bcn = {
2852}; 781};
2853 782
2854static const struct rt2x00_ops rt2800usb_ops = { 783static const struct rt2x00_ops rt2800usb_ops = {
2855 .name = KBUILD_MODNAME, 784 .name = KBUILD_MODNAME,
2856 .max_sta_intf = 1, 785 .max_sta_intf = 1,
2857 .max_ap_intf = 8, 786 .max_ap_intf = 8,
2858 .eeprom_size = EEPROM_SIZE, 787 .eeprom_size = EEPROM_SIZE,
2859 .rf_size = RF_SIZE, 788 .rf_size = RF_SIZE,
2860 .tx_queues = NUM_TX_QUEUES, 789 .tx_queues = NUM_TX_QUEUES,
2861 .rx = &rt2800usb_queue_rx, 790 .extra_tx_headroom = TXINFO_DESC_SIZE + TXWI_DESC_SIZE,
2862 .tx = &rt2800usb_queue_tx, 791 .rx = &rt2800usb_queue_rx,
2863 .bcn = &rt2800usb_queue_bcn, 792 .tx = &rt2800usb_queue_tx,
2864 .lib = &rt2800usb_rt2x00_ops, 793 .bcn = &rt2800usb_queue_bcn,
2865 .hw = &rt2800usb_mac80211_ops, 794 .lib = &rt2800usb_rt2x00_ops,
795 .hw = &rt2800_mac80211_ops,
2866#ifdef CONFIG_RT2X00_LIB_DEBUGFS 796#ifdef CONFIG_RT2X00_LIB_DEBUGFS
2867 .debugfs = &rt2800usb_rt2x00debug, 797 .debugfs = &rt2800_rt2x00debug,
2868#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 798#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2869}; 799};
2870 800
@@ -2875,43 +805,27 @@ static struct usb_device_id rt2800usb_device_table[] = {
2875 /* Abocom */ 805 /* Abocom */
2876 { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, 806 { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
2877 { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, 807 { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
2878 { USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
2879 { USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
2880 { USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
2881 { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, 808 { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
2882 /* AirTies */
2883 { USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) },
2884 /* Amigo */
2885 { USB_DEVICE(0x0e0b, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
2886 { USB_DEVICE(0x0e0b, 0x9041), USB_DEVICE_DATA(&rt2800usb_ops) },
2887 /* Amit */ 809 /* Amit */
2888 { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) }, 810 { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
811 /* Askey */
812 { USB_DEVICE(0x1690, 0x0740), USB_DEVICE_DATA(&rt2800usb_ops) },
2889 /* ASUS */ 813 /* ASUS */
2890 { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) }, 814 { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) },
2891 { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) }, 815 { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) },
2892 { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) }, 816 { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) },
2893 { USB_DEVICE(0x0b05, 0x1760), USB_DEVICE_DATA(&rt2800usb_ops) },
2894 { USB_DEVICE(0x0b05, 0x1761), USB_DEVICE_DATA(&rt2800usb_ops) },
2895 /* AzureWave */ 817 /* AzureWave */
2896 { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) }, 818 { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) },
2897 { USB_DEVICE(0x13d3, 0x3262), USB_DEVICE_DATA(&rt2800usb_ops) },
2898 { USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) },
2899 { USB_DEVICE(0x13d3, 0x3284), USB_DEVICE_DATA(&rt2800usb_ops) },
2900 /* Belkin */ 819 /* Belkin */
2901 { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) }, 820 { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) },
2902 { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) }, 821 { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) },
2903 { USB_DEVICE(0x050d, 0x815c), USB_DEVICE_DATA(&rt2800usb_ops) }, 822 { USB_DEVICE(0x050d, 0x815c), USB_DEVICE_DATA(&rt2800usb_ops) },
2904 { USB_DEVICE(0x050d, 0x825a), USB_DEVICE_DATA(&rt2800usb_ops) },
2905 /* Buffalo */ 823 /* Buffalo */
2906 { USB_DEVICE(0x0411, 0x00e8), USB_DEVICE_DATA(&rt2800usb_ops) }, 824 { USB_DEVICE(0x0411, 0x00e8), USB_DEVICE_DATA(&rt2800usb_ops) },
2907 { USB_DEVICE(0x0411, 0x012e), USB_DEVICE_DATA(&rt2800usb_ops) },
2908 /* Conceptronic */ 825 /* Conceptronic */
2909 { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) }, 826 { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) },
2910 { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) }, 827 { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) },
2911 { USB_DEVICE(0x14b2, 0x3c08), USB_DEVICE_DATA(&rt2800usb_ops) },
2912 { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, 828 { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
2913 { USB_DEVICE(0x14b2, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
2914 { USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) },
2915 { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) }, 829 { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) },
2916 { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) }, 830 { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) },
2917 { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) }, 831 { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) },
@@ -2920,83 +834,38 @@ static struct usb_device_id rt2800usb_device_table[] = {
2920 { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) }, 834 { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) },
2921 { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) }, 835 { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
2922 { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, 836 { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
2923 { USB_DEVICE(0x18c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
2924 { USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) },
2925 /* D-Link */ 837 /* D-Link */
2926 { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, 838 { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
2927 { USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) },
2928 { USB_DEVICE(0x07d1, 0x3c0b), USB_DEVICE_DATA(&rt2800usb_ops) },
2929 { USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) },
2930 { USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) },
2931 { USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) },
2932 { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) }, 839 { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
2933 { USB_DEVICE(0x07d1, 0x3c13), USB_DEVICE_DATA(&rt2800usb_ops) },
2934 /* Edimax */ 840 /* Edimax */
2935 { USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) },
2936 { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) }, 841 { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) },
2937 { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) }, 842 { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) },
2938 /* Encore */
2939 { USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) },
2940 /* EnGenius */ 843 /* EnGenius */
2941 { USB_DEVICE(0X1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) }, 844 { USB_DEVICE(0X1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) },
2942 { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) }, 845 { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) },
2943 { USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) },
2944 { USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) },
2945 { USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) },
2946 { USB_DEVICE(0x1740, 0x9801), USB_DEVICE_DATA(&rt2800usb_ops) },
2947 /* Gemtek */
2948 { USB_DEVICE(0x15a9, 0x0010), USB_DEVICE_DATA(&rt2800usb_ops) },
2949 /* Gigabyte */ 846 /* Gigabyte */
2950 { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) }, 847 { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) },
2951 { USB_DEVICE(0x1044, 0x800c), USB_DEVICE_DATA(&rt2800usb_ops) },
2952 { USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) },
2953 /* Hawking */ 848 /* Hawking */
2954 { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) }, 849 { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) },
2955 { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) }, 850 { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) },
2956 { USB_DEVICE(0x0e66, 0x0009), USB_DEVICE_DATA(&rt2800usb_ops) },
2957 { USB_DEVICE(0x0e66, 0x000b), USB_DEVICE_DATA(&rt2800usb_ops) },
2958 /* I-O DATA */
2959 { USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) },
2960 /* LevelOne */
2961 { USB_DEVICE(0x1740, 0x0605), USB_DEVICE_DATA(&rt2800usb_ops) },
2962 { USB_DEVICE(0x1740, 0x0615), USB_DEVICE_DATA(&rt2800usb_ops) },
2963 /* Linksys */ 851 /* Linksys */
2964 { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) }, 852 { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) },
2965 { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) }, 853 { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) },
2966 { USB_DEVICE(0x1737, 0x0077), USB_DEVICE_DATA(&rt2800usb_ops) },
2967 /* Logitec */ 854 /* Logitec */
2968 { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) }, 855 { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) },
2969 { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) }, 856 { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) },
2970 { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) }, 857 { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) },
2971 /* Motorola */ 858 /* Motorola */
2972 { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) }, 859 { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
2973 { USB_DEVICE(0x100d, 0x9032), USB_DEVICE_DATA(&rt2800usb_ops) }, 860 /* MSI */
2974 /* Ovislink */ 861 { USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) },
2975 { USB_DEVICE(0x1b75, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
2976 /* Pegatron */
2977 { USB_DEVICE(0x1d4d, 0x0002), USB_DEVICE_DATA(&rt2800usb_ops) },
2978 { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) },
2979 { USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) },
2980 /* Philips */ 862 /* Philips */
2981 { USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) }, 863 { USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) },
2982 /* Planex */ 864 /* Planex */
2983 { USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) }, 865 { USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) },
2984 { USB_DEVICE(0x2019, 0xab24), USB_DEVICE_DATA(&rt2800usb_ops) },
2985 { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) },
2986 /* Qcom */
2987 { USB_DEVICE(0x18e8, 0x6259), USB_DEVICE_DATA(&rt2800usb_ops) },
2988 /* Quanta */
2989 { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) },
2990 /* Ralink */ 866 /* Ralink */
2991 { USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) },
2992 { USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) },
2993 { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
2994 { USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, 867 { USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
2995 { USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, 868 { USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
2996 { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
2997 { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
2998 { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
2999 { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) },
3000 /* Samsung */ 869 /* Samsung */
3001 { USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) }, 870 { USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) },
3002 /* Siemens */ 871 /* Siemens */
@@ -3007,29 +876,18 @@ static struct usb_device_id rt2800usb_device_table[] = {
3007 { USB_DEVICE(0x0df6, 0x002c), USB_DEVICE_DATA(&rt2800usb_ops) }, 876 { USB_DEVICE(0x0df6, 0x002c), USB_DEVICE_DATA(&rt2800usb_ops) },
3008 { USB_DEVICE(0x0df6, 0x002d), USB_DEVICE_DATA(&rt2800usb_ops) }, 877 { USB_DEVICE(0x0df6, 0x002d), USB_DEVICE_DATA(&rt2800usb_ops) },
3009 { USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) }, 878 { USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) },
3010 { USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) },
3011 { USB_DEVICE(0x0df6, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
3012 { USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) },
3013 { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) },
3014 { USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, 879 { USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
3015 { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) },
3016 { USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) },
3017 /* SMC */ 880 /* SMC */
3018 { USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) }, 881 { USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) },
3019 { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) },
3020 { USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) }, 882 { USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) },
3021 { USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) }, 883 { USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) },
3022 { USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) }, 884 { USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) },
3023 { USB_DEVICE(0x083a, 0xa512), USB_DEVICE_DATA(&rt2800usb_ops) },
3024 { USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) }, 885 { USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) },
3025 { USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) }, 886 { USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) },
3026 { USB_DEVICE(0x083a, 0xc522), USB_DEVICE_DATA(&rt2800usb_ops) },
3027 /* Sparklan */ 887 /* Sparklan */
3028 { USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) }, 888 { USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) },
3029 /* Sweex */ 889 /* Sweex */
3030 { USB_DEVICE(0x177f, 0x0153), USB_DEVICE_DATA(&rt2800usb_ops) },
3031 { USB_DEVICE(0x177f, 0x0302), USB_DEVICE_DATA(&rt2800usb_ops) }, 890 { USB_DEVICE(0x177f, 0x0302), USB_DEVICE_DATA(&rt2800usb_ops) },
3032 { USB_DEVICE(0x177f, 0x0313), USB_DEVICE_DATA(&rt2800usb_ops) },
3033 /* U-Media*/ 891 /* U-Media*/
3034 { USB_DEVICE(0x157e, 0x300e), USB_DEVICE_DATA(&rt2800usb_ops) }, 892 { USB_DEVICE(0x157e, 0x300e), USB_DEVICE_DATA(&rt2800usb_ops) },
3035 /* ZCOM */ 893 /* ZCOM */
@@ -3038,11 +896,195 @@ static struct usb_device_id rt2800usb_device_table[] = {
3038 /* Zinwell */ 896 /* Zinwell */
3039 { USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) }, 897 { USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) },
3040 { USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) }, 898 { USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) },
899 /* Zyxel */
900 { USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) },
901#ifdef CONFIG_RT2800USB_RT30XX
902 /* Abocom */
903 { USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
904 { USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
905 { USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
906 /* AirTies */
907 { USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) },
908 /* AzureWave */
909 { USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) },
910 /* Conceptronic */
911 { USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) },
912 /* Corega */
913 { USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) },
914 /* D-Link */
915 { USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) },
916 { USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) },
917 { USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) },
918 { USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) },
919 /* Edimax */
920 { USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) },
921 /* Encore */
922 { USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) },
923 /* EnGenius */
924 { USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) },
925 { USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) },
926 { USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) },
927 /* Gigabyte */
928 { USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) },
929 /* I-O DATA */
930 { USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) },
931 /* MSI */
932 { USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) },
933 /* Pegatron */
934 { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) },
935 { USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) },
936 /* Planex */
937 { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) },
938 /* Quanta */
939 { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) },
940 /* Ralink */
941 { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
942 { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
943 { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
944 { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
945 /* Sitecom */
946 { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) },
947 { USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) },
948 /* SMC */
949 { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) },
950 /* Zinwell */
3041 { USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) }, 951 { USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) },
3042 { USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) }, 952 { USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) },
953#endif
954#ifdef CONFIG_RT2800USB_RT35XX
955 /* Askey */
956 { USB_DEVICE(0x1690, 0x0744), USB_DEVICE_DATA(&rt2800usb_ops) },
957 /* Cisco */
958 { USB_DEVICE(0x167b, 0x4001), USB_DEVICE_DATA(&rt2800usb_ops) },
959 /* EnGenius */
960 { USB_DEVICE(0x1740, 0x9801), USB_DEVICE_DATA(&rt2800usb_ops) },
961 /* I-O DATA */
962 { USB_DEVICE(0x04bb, 0x0944), USB_DEVICE_DATA(&rt2800usb_ops) },
963 /* Ralink */
964 { USB_DEVICE(0x148f, 0x3370), USB_DEVICE_DATA(&rt2800usb_ops) },
965 { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) },
966 { USB_DEVICE(0x148f, 0x8070), USB_DEVICE_DATA(&rt2800usb_ops) },
967 /* Sitecom */
968 { USB_DEVICE(0x0df6, 0x0041), USB_DEVICE_DATA(&rt2800usb_ops) },
969 /* Zinwell */
970 { USB_DEVICE(0x5a57, 0x0284), USB_DEVICE_DATA(&rt2800usb_ops) },
971#endif
972#ifdef CONFIG_RT2800USB_UNKNOWN
973 /*
974 * Unclear what kind of devices these are (they aren't supported by the
975 * vendor driver).
976 */
977 /* Allwin */
978 { USB_DEVICE(0x8516, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
979 { USB_DEVICE(0x8516, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
980 { USB_DEVICE(0x8516, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
981 { USB_DEVICE(0x8516, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
982 { USB_DEVICE(0x8516, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
983 { USB_DEVICE(0x8516, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
984 { USB_DEVICE(0x8516, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) },
985 /* Amigo */
986 { USB_DEVICE(0x0e0b, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
987 { USB_DEVICE(0x0e0b, 0x9041), USB_DEVICE_DATA(&rt2800usb_ops) },
988 /* Askey */
989 { USB_DEVICE(0x0930, 0x0a07), USB_DEVICE_DATA(&rt2800usb_ops) },
990 /* ASUS */
991 { USB_DEVICE(0x0b05, 0x1760), USB_DEVICE_DATA(&rt2800usb_ops) },
992 { USB_DEVICE(0x0b05, 0x1761), USB_DEVICE_DATA(&rt2800usb_ops) },
993 { USB_DEVICE(0x0b05, 0x1784), USB_DEVICE_DATA(&rt2800usb_ops) },
994 { USB_DEVICE(0x0b05, 0x1790), USB_DEVICE_DATA(&rt2800usb_ops) },
995 { USB_DEVICE(0x1761, 0x0b05), USB_DEVICE_DATA(&rt2800usb_ops) },
996 /* AzureWave */
997 { USB_DEVICE(0x13d3, 0x3262), USB_DEVICE_DATA(&rt2800usb_ops) },
998 { USB_DEVICE(0x13d3, 0x3284), USB_DEVICE_DATA(&rt2800usb_ops) },
999 { USB_DEVICE(0x13d3, 0x3305), USB_DEVICE_DATA(&rt2800usb_ops) },
1000 /* Belkin */
1001 { USB_DEVICE(0x050d, 0x825a), USB_DEVICE_DATA(&rt2800usb_ops) },
1002 /* Buffalo */
1003 { USB_DEVICE(0x0411, 0x012e), USB_DEVICE_DATA(&rt2800usb_ops) },
1004 { USB_DEVICE(0x0411, 0x0148), USB_DEVICE_DATA(&rt2800usb_ops) },
1005 { USB_DEVICE(0x0411, 0x0150), USB_DEVICE_DATA(&rt2800usb_ops) },
1006 { USB_DEVICE(0x0411, 0x015d), USB_DEVICE_DATA(&rt2800usb_ops) },
1007 /* Conceptronic */
1008 { USB_DEVICE(0x14b2, 0x3c08), USB_DEVICE_DATA(&rt2800usb_ops) },
1009 { USB_DEVICE(0x14b2, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
1010 /* Corega */
1011 { USB_DEVICE(0x07aa, 0x0041), USB_DEVICE_DATA(&rt2800usb_ops) },
1012 { USB_DEVICE(0x07aa, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) },
1013 { USB_DEVICE(0x18c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
1014 /* D-Link */
1015 { USB_DEVICE(0x07d1, 0x3c0b), USB_DEVICE_DATA(&rt2800usb_ops) },
1016 { USB_DEVICE(0x07d1, 0x3c13), USB_DEVICE_DATA(&rt2800usb_ops) },
1017 { USB_DEVICE(0x07d1, 0x3c15), USB_DEVICE_DATA(&rt2800usb_ops) },
1018 { USB_DEVICE(0x07d1, 0x3c16), USB_DEVICE_DATA(&rt2800usb_ops) },
1019 /* Encore */
1020 { USB_DEVICE(0x203d, 0x14a1), USB_DEVICE_DATA(&rt2800usb_ops) },
1021 { USB_DEVICE(0x203d, 0x14a9), USB_DEVICE_DATA(&rt2800usb_ops) },
1022 /* EnGenius */
1023 { USB_DEVICE(0x1740, 0x9707), USB_DEVICE_DATA(&rt2800usb_ops) },
1024 { USB_DEVICE(0x1740, 0x9708), USB_DEVICE_DATA(&rt2800usb_ops) },
1025 { USB_DEVICE(0x1740, 0x9709), USB_DEVICE_DATA(&rt2800usb_ops) },
1026 /* Gemtek */
1027 { USB_DEVICE(0x15a9, 0x0010), USB_DEVICE_DATA(&rt2800usb_ops) },
1028 /* Gigabyte */
1029 { USB_DEVICE(0x1044, 0x800c), USB_DEVICE_DATA(&rt2800usb_ops) },
1030 /* Hawking */
1031 { USB_DEVICE(0x0e66, 0x0009), USB_DEVICE_DATA(&rt2800usb_ops) },
1032 { USB_DEVICE(0x0e66, 0x000b), USB_DEVICE_DATA(&rt2800usb_ops) },
1033 /* I-O DATA */
1034 { USB_DEVICE(0x04bb, 0x0947), USB_DEVICE_DATA(&rt2800usb_ops) },
1035 { USB_DEVICE(0x04bb, 0x0948), USB_DEVICE_DATA(&rt2800usb_ops) },
1036 /* LevelOne */
1037 { USB_DEVICE(0x1740, 0x0605), USB_DEVICE_DATA(&rt2800usb_ops) },
1038 { USB_DEVICE(0x1740, 0x0615), USB_DEVICE_DATA(&rt2800usb_ops) },
1039 /* Linksys */
1040 { USB_DEVICE(0x1737, 0x0077), USB_DEVICE_DATA(&rt2800usb_ops) },
1041 { USB_DEVICE(0x1737, 0x0078), USB_DEVICE_DATA(&rt2800usb_ops) },
1042 { USB_DEVICE(0x1737, 0x0079), USB_DEVICE_DATA(&rt2800usb_ops) },
1043 /* Motorola */
1044 { USB_DEVICE(0x100d, 0x9032), USB_DEVICE_DATA(&rt2800usb_ops) },
1045 /* MSI */
1046 { USB_DEVICE(0x0db0, 0x3821), USB_DEVICE_DATA(&rt2800usb_ops) },
1047 { USB_DEVICE(0x0db0, 0x3822), USB_DEVICE_DATA(&rt2800usb_ops) },
1048 { USB_DEVICE(0x0db0, 0x3870), USB_DEVICE_DATA(&rt2800usb_ops) },
1049 { USB_DEVICE(0x0db0, 0x3871), USB_DEVICE_DATA(&rt2800usb_ops) },
1050 { USB_DEVICE(0x0db0, 0x821a), USB_DEVICE_DATA(&rt2800usb_ops) },
1051 { USB_DEVICE(0x0db0, 0x822a), USB_DEVICE_DATA(&rt2800usb_ops) },
1052 { USB_DEVICE(0x0db0, 0x870a), USB_DEVICE_DATA(&rt2800usb_ops) },
1053 { USB_DEVICE(0x0db0, 0x871a), USB_DEVICE_DATA(&rt2800usb_ops) },
1054 { USB_DEVICE(0x0db0, 0x899a), USB_DEVICE_DATA(&rt2800usb_ops) },
1055 /* Ovislink */
1056 { USB_DEVICE(0x1b75, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
1057 /* Para */
1058 { USB_DEVICE(0x20b8, 0x8888), USB_DEVICE_DATA(&rt2800usb_ops) },
1059 /* Pegatron */
1060 { USB_DEVICE(0x05a6, 0x0101), USB_DEVICE_DATA(&rt2800usb_ops) },
1061 { USB_DEVICE(0x1d4d, 0x0002), USB_DEVICE_DATA(&rt2800usb_ops) },
1062 { USB_DEVICE(0x1d4d, 0x0010), USB_DEVICE_DATA(&rt2800usb_ops) },
1063 /* Planex */
1064 { USB_DEVICE(0x2019, 0xab24), USB_DEVICE_DATA(&rt2800usb_ops) },
1065 /* Qcom */
1066 { USB_DEVICE(0x18e8, 0x6259), USB_DEVICE_DATA(&rt2800usb_ops) },
1067 /* Sitecom */
1068 { USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) },
1069 { USB_DEVICE(0x0df6, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
1070 { USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) },
1071 { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) },
1072 { USB_DEVICE(0x0df6, 0x0047), USB_DEVICE_DATA(&rt2800usb_ops) },
1073 { USB_DEVICE(0x0df6, 0x0048), USB_DEVICE_DATA(&rt2800usb_ops) },
1074 { USB_DEVICE(0x0df6, 0x004a), USB_DEVICE_DATA(&rt2800usb_ops) },
1075 { USB_DEVICE(0x0df6, 0x004d), USB_DEVICE_DATA(&rt2800usb_ops) },
1076 /* SMC */
1077 { USB_DEVICE(0x083a, 0xa512), USB_DEVICE_DATA(&rt2800usb_ops) },
1078 { USB_DEVICE(0x083a, 0xa701), USB_DEVICE_DATA(&rt2800usb_ops) },
1079 { USB_DEVICE(0x083a, 0xa702), USB_DEVICE_DATA(&rt2800usb_ops) },
1080 { USB_DEVICE(0x083a, 0xc522), USB_DEVICE_DATA(&rt2800usb_ops) },
1081 { USB_DEVICE(0x083a, 0xd522), USB_DEVICE_DATA(&rt2800usb_ops) },
1082 /* Sweex */
1083 { USB_DEVICE(0x177f, 0x0153), USB_DEVICE_DATA(&rt2800usb_ops) },
1084 { USB_DEVICE(0x177f, 0x0313), USB_DEVICE_DATA(&rt2800usb_ops) },
3043 /* Zyxel */ 1085 /* Zyxel */
3044 { USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) },
3045 { USB_DEVICE(0x0586, 0x341a), USB_DEVICE_DATA(&rt2800usb_ops) }, 1086 { USB_DEVICE(0x0586, 0x341a), USB_DEVICE_DATA(&rt2800usb_ops) },
1087#endif
3046 { 0, } 1088 { 0, }
3047}; 1089};
3048 1090
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.h b/drivers/net/wireless/rt2x00/rt2800usb.h
index 4d9991c9a51c..d1d8ae94b4d4 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.h
+++ b/drivers/net/wireless/rt2x00/rt2800usb.h
@@ -1,5 +1,9 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
4 Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
5 Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
6 Copyright (C) 2009 Axel Kollhofer <rain_maker@root-forum.org>
3 <http://rt2x00.serialmonkey.com> 7 <http://rt2x00.serialmonkey.com>
4 8
5 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
@@ -28,288 +32,10 @@
28#define RT2800USB_H 32#define RT2800USB_H
29 33
30/* 34/*
31 * RF chip defines.
32 *
33 * RF2820 2.4G 2T3R
34 * RF2850 2.4G/5G 2T3R
35 * RF2720 2.4G 1T2R
36 * RF2750 2.4G/5G 1T2R
37 * RF3020 2.4G 1T1R
38 * RF2020 2.4G B/G
39 * RF3021 2.4G 1T2R
40 * RF3022 2.4G 2T2R
41 * RF3052 2.4G 2T2R
42 */
43#define RF2820 0x0001
44#define RF2850 0x0002
45#define RF2720 0x0003
46#define RF2750 0x0004
47#define RF3020 0x0005
48#define RF2020 0x0006
49#define RF3021 0x0007
50#define RF3022 0x0008
51#define RF3052 0x0009
52
53/*
54 * RT2870 version
55 */
56#define RT2860C_VERSION 0x28600100
57#define RT2860D_VERSION 0x28600101
58#define RT2880E_VERSION 0x28720200
59#define RT2883_VERSION 0x28830300
60#define RT3070_VERSION 0x30700200
61
62/*
63 * Signal information.
64 * Defaul offset is required for RSSI <-> dBm conversion.
65 */
66#define DEFAULT_RSSI_OFFSET 120 /* FIXME */
67
68/*
69 * Register layout information.
70 */
71#define CSR_REG_BASE 0x1000
72#define CSR_REG_SIZE 0x0800
73#define EEPROM_BASE 0x0000
74#define EEPROM_SIZE 0x0110
75#define BBP_BASE 0x0000
76#define BBP_SIZE 0x0080
77#define RF_BASE 0x0004
78#define RF_SIZE 0x0010
79
80/*
81 * Number of TX queues.
82 */
83#define NUM_TX_QUEUES 4
84
85/*
86 * USB registers. 35 * USB registers.
87 */ 36 */
88 37
89/* 38/*
90 * HOST-MCU shared memory
91 */
92#define HOST_CMD_CSR 0x0404
93#define HOST_CMD_CSR_HOST_COMMAND FIELD32(0x000000ff)
94
95/*
96 * INT_SOURCE_CSR: Interrupt source register.
97 * Write one to clear corresponding bit.
98 * TX_FIFO_STATUS: FIFO Statistics is full, sw should read 0x171c
99 */
100#define INT_SOURCE_CSR 0x0200
101#define INT_SOURCE_CSR_RXDELAYINT FIELD32(0x00000001)
102#define INT_SOURCE_CSR_TXDELAYINT FIELD32(0x00000002)
103#define INT_SOURCE_CSR_RX_DONE FIELD32(0x00000004)
104#define INT_SOURCE_CSR_AC0_DMA_DONE FIELD32(0x00000008)
105#define INT_SOURCE_CSR_AC1_DMA_DONE FIELD32(0x00000010)
106#define INT_SOURCE_CSR_AC2_DMA_DONE FIELD32(0x00000020)
107#define INT_SOURCE_CSR_AC3_DMA_DONE FIELD32(0x00000040)
108#define INT_SOURCE_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
109#define INT_SOURCE_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
110#define INT_SOURCE_CSR_MCU_COMMAND FIELD32(0x00000200)
111#define INT_SOURCE_CSR_RXTX_COHERENT FIELD32(0x00000400)
112#define INT_SOURCE_CSR_TBTT FIELD32(0x00000800)
113#define INT_SOURCE_CSR_PRE_TBTT FIELD32(0x00001000)
114#define INT_SOURCE_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
115#define INT_SOURCE_CSR_AUTO_WAKEUP FIELD32(0x00004000)
116#define INT_SOURCE_CSR_GPTIMER FIELD32(0x00008000)
117#define INT_SOURCE_CSR_RX_COHERENT FIELD32(0x00010000)
118#define INT_SOURCE_CSR_TX_COHERENT FIELD32(0x00020000)
119
120/*
121 * INT_MASK_CSR: Interrupt MASK register. 1: the interrupt is mask OFF.
122 */
123#define INT_MASK_CSR 0x0204
124#define INT_MASK_CSR_RXDELAYINT FIELD32(0x00000001)
125#define INT_MASK_CSR_TXDELAYINT FIELD32(0x00000002)
126#define INT_MASK_CSR_RX_DONE FIELD32(0x00000004)
127#define INT_MASK_CSR_AC0_DMA_DONE FIELD32(0x00000008)
128#define INT_MASK_CSR_AC1_DMA_DONE FIELD32(0x00000010)
129#define INT_MASK_CSR_AC2_DMA_DONE FIELD32(0x00000020)
130#define INT_MASK_CSR_AC3_DMA_DONE FIELD32(0x00000040)
131#define INT_MASK_CSR_HCCA_DMA_DONE FIELD32(0x00000080)
132#define INT_MASK_CSR_MGMT_DMA_DONE FIELD32(0x00000100)
133#define INT_MASK_CSR_MCU_COMMAND FIELD32(0x00000200)
134#define INT_MASK_CSR_RXTX_COHERENT FIELD32(0x00000400)
135#define INT_MASK_CSR_TBTT FIELD32(0x00000800)
136#define INT_MASK_CSR_PRE_TBTT FIELD32(0x00001000)
137#define INT_MASK_CSR_TX_FIFO_STATUS FIELD32(0x00002000)
138#define INT_MASK_CSR_AUTO_WAKEUP FIELD32(0x00004000)
139#define INT_MASK_CSR_GPTIMER FIELD32(0x00008000)
140#define INT_MASK_CSR_RX_COHERENT FIELD32(0x00010000)
141#define INT_MASK_CSR_TX_COHERENT FIELD32(0x00020000)
142
143/*
144 * WPDMA_GLO_CFG
145 */
146#define WPDMA_GLO_CFG 0x0208
147#define WPDMA_GLO_CFG_ENABLE_TX_DMA FIELD32(0x00000001)
148#define WPDMA_GLO_CFG_TX_DMA_BUSY FIELD32(0x00000002)
149#define WPDMA_GLO_CFG_ENABLE_RX_DMA FIELD32(0x00000004)
150#define WPDMA_GLO_CFG_RX_DMA_BUSY FIELD32(0x00000008)
151#define WPDMA_GLO_CFG_WP_DMA_BURST_SIZE FIELD32(0x00000030)
152#define WPDMA_GLO_CFG_TX_WRITEBACK_DONE FIELD32(0x00000040)
153#define WPDMA_GLO_CFG_BIG_ENDIAN FIELD32(0x00000080)
154#define WPDMA_GLO_CFG_RX_HDR_SCATTER FIELD32(0x0000ff00)
155#define WPDMA_GLO_CFG_HDR_SEG_LEN FIELD32(0xffff0000)
156
157/*
158 * WPDMA_RST_IDX
159 */
160#define WPDMA_RST_IDX 0x020c
161#define WPDMA_RST_IDX_DTX_IDX0 FIELD32(0x00000001)
162#define WPDMA_RST_IDX_DTX_IDX1 FIELD32(0x00000002)
163#define WPDMA_RST_IDX_DTX_IDX2 FIELD32(0x00000004)
164#define WPDMA_RST_IDX_DTX_IDX3 FIELD32(0x00000008)
165#define WPDMA_RST_IDX_DTX_IDX4 FIELD32(0x00000010)
166#define WPDMA_RST_IDX_DTX_IDX5 FIELD32(0x00000020)
167#define WPDMA_RST_IDX_DRX_IDX0 FIELD32(0x00010000)
168
169/*
170 * DELAY_INT_CFG
171 */
172#define DELAY_INT_CFG 0x0210
173#define DELAY_INT_CFG_RXMAX_PTIME FIELD32(0x000000ff)
174#define DELAY_INT_CFG_RXMAX_PINT FIELD32(0x00007f00)
175#define DELAY_INT_CFG_RXDLY_INT_EN FIELD32(0x00008000)
176#define DELAY_INT_CFG_TXMAX_PTIME FIELD32(0x00ff0000)
177#define DELAY_INT_CFG_TXMAX_PINT FIELD32(0x7f000000)
178#define DELAY_INT_CFG_TXDLY_INT_EN FIELD32(0x80000000)
179
180/*
181 * WMM_AIFSN_CFG: Aifsn for each EDCA AC
182 * AIFSN0: AC_BE
183 * AIFSN1: AC_BK
184 * AIFSN1: AC_VI
185 * AIFSN1: AC_VO
186 */
187#define WMM_AIFSN_CFG 0x0214
188#define WMM_AIFSN_CFG_AIFSN0 FIELD32(0x0000000f)
189#define WMM_AIFSN_CFG_AIFSN1 FIELD32(0x000000f0)
190#define WMM_AIFSN_CFG_AIFSN2 FIELD32(0x00000f00)
191#define WMM_AIFSN_CFG_AIFSN3 FIELD32(0x0000f000)
192
193/*
194 * WMM_CWMIN_CSR: CWmin for each EDCA AC
195 * CWMIN0: AC_BE
196 * CWMIN1: AC_BK
197 * CWMIN1: AC_VI
198 * CWMIN1: AC_VO
199 */
200#define WMM_CWMIN_CFG 0x0218
201#define WMM_CWMIN_CFG_CWMIN0 FIELD32(0x0000000f)
202#define WMM_CWMIN_CFG_CWMIN1 FIELD32(0x000000f0)
203#define WMM_CWMIN_CFG_CWMIN2 FIELD32(0x00000f00)
204#define WMM_CWMIN_CFG_CWMIN3 FIELD32(0x0000f000)
205
206/*
207 * WMM_CWMAX_CSR: CWmax for each EDCA AC
208 * CWMAX0: AC_BE
209 * CWMAX1: AC_BK
210 * CWMAX1: AC_VI
211 * CWMAX1: AC_VO
212 */
213#define WMM_CWMAX_CFG 0x021c
214#define WMM_CWMAX_CFG_CWMAX0 FIELD32(0x0000000f)
215#define WMM_CWMAX_CFG_CWMAX1 FIELD32(0x000000f0)
216#define WMM_CWMAX_CFG_CWMAX2 FIELD32(0x00000f00)
217#define WMM_CWMAX_CFG_CWMAX3 FIELD32(0x0000f000)
218
219/*
220 * AC_TXOP0: AC_BK/AC_BE TXOP register
221 * AC0TXOP: AC_BK in unit of 32us
222 * AC1TXOP: AC_BE in unit of 32us
223 */
224#define WMM_TXOP0_CFG 0x0220
225#define WMM_TXOP0_CFG_AC0TXOP FIELD32(0x0000ffff)
226#define WMM_TXOP0_CFG_AC1TXOP FIELD32(0xffff0000)
227
228/*
229 * AC_TXOP1: AC_VO/AC_VI TXOP register
230 * AC2TXOP: AC_VI in unit of 32us
231 * AC3TXOP: AC_VO in unit of 32us
232 */
233#define WMM_TXOP1_CFG 0x0224
234#define WMM_TXOP1_CFG_AC2TXOP FIELD32(0x0000ffff)
235#define WMM_TXOP1_CFG_AC3TXOP FIELD32(0xffff0000)
236
237/*
238 * GPIO_CTRL_CFG:
239 */
240#define GPIO_CTRL_CFG 0x0228
241#define GPIO_CTRL_CFG_BIT0 FIELD32(0x00000001)
242#define GPIO_CTRL_CFG_BIT1 FIELD32(0x00000002)
243#define GPIO_CTRL_CFG_BIT2 FIELD32(0x00000004)
244#define GPIO_CTRL_CFG_BIT3 FIELD32(0x00000008)
245#define GPIO_CTRL_CFG_BIT4 FIELD32(0x00000010)
246#define GPIO_CTRL_CFG_BIT5 FIELD32(0x00000020)
247#define GPIO_CTRL_CFG_BIT6 FIELD32(0x00000040)
248#define GPIO_CTRL_CFG_BIT7 FIELD32(0x00000080)
249#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00000100)
250
251/*
252 * MCU_CMD_CFG
253 */
254#define MCU_CMD_CFG 0x022c
255
256/*
257 * AC_BK register offsets
258 */
259#define TX_BASE_PTR0 0x0230
260#define TX_MAX_CNT0 0x0234
261#define TX_CTX_IDX0 0x0238
262#define TX_DTX_IDX0 0x023c
263
264/*
265 * AC_BE register offsets
266 */
267#define TX_BASE_PTR1 0x0240
268#define TX_MAX_CNT1 0x0244
269#define TX_CTX_IDX1 0x0248
270#define TX_DTX_IDX1 0x024c
271
272/*
273 * AC_VI register offsets
274 */
275#define TX_BASE_PTR2 0x0250
276#define TX_MAX_CNT2 0x0254
277#define TX_CTX_IDX2 0x0258
278#define TX_DTX_IDX2 0x025c
279
280/*
281 * AC_VO register offsets
282 */
283#define TX_BASE_PTR3 0x0260
284#define TX_MAX_CNT3 0x0264
285#define TX_CTX_IDX3 0x0268
286#define TX_DTX_IDX3 0x026c
287
288/*
289 * HCCA register offsets
290 */
291#define TX_BASE_PTR4 0x0270
292#define TX_MAX_CNT4 0x0274
293#define TX_CTX_IDX4 0x0278
294#define TX_DTX_IDX4 0x027c
295
296/*
297 * MGMT register offsets
298 */
299#define TX_BASE_PTR5 0x0280
300#define TX_MAX_CNT5 0x0284
301#define TX_CTX_IDX5 0x0288
302#define TX_DTX_IDX5 0x028c
303
304/*
305 * RX register offsets
306 */
307#define RX_BASE_PTR 0x0290
308#define RX_MAX_CNT 0x0294
309#define RX_CRX_IDX 0x0298
310#define RX_DRX_IDX 0x029c
311
312/*
313 * USB_DMA_CFG 39 * USB_DMA_CFG
314 * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns. 40 * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
315 * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes. 41 * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
@@ -343,1448 +69,18 @@
343#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff) 69#define USB_CYC_CFG_CLOCK_CYCLE FIELD32(0x000000ff)
344 70
345/* 71/*
346 * PBF_SYS_CTRL
347 * HOST_RAM_WRITE: enable Host program ram write selection
348 */
349#define PBF_SYS_CTRL 0x0400
350#define PBF_SYS_CTRL_READY FIELD32(0x00000080)
351#define PBF_SYS_CTRL_HOST_RAM_WRITE FIELD32(0x00010000)
352
353/*
354 * PBF registers
355 * Most are for debug. Driver doesn't touch PBF register.
356 */
357#define PBF_CFG 0x0408
358#define PBF_MAX_PCNT 0x040c
359#define PBF_CTRL 0x0410
360#define PBF_INT_STA 0x0414
361#define PBF_INT_ENA 0x0418
362
363/*
364 * BCN_OFFSET0:
365 */
366#define BCN_OFFSET0 0x042c
367#define BCN_OFFSET0_BCN0 FIELD32(0x000000ff)
368#define BCN_OFFSET0_BCN1 FIELD32(0x0000ff00)
369#define BCN_OFFSET0_BCN2 FIELD32(0x00ff0000)
370#define BCN_OFFSET0_BCN3 FIELD32(0xff000000)
371
372/*
373 * BCN_OFFSET1:
374 */
375#define BCN_OFFSET1 0x0430
376#define BCN_OFFSET1_BCN4 FIELD32(0x000000ff)
377#define BCN_OFFSET1_BCN5 FIELD32(0x0000ff00)
378#define BCN_OFFSET1_BCN6 FIELD32(0x00ff0000)
379#define BCN_OFFSET1_BCN7 FIELD32(0xff000000)
380
381/*
382 * PBF registers
383 * Most are for debug. Driver doesn't touch PBF register.
384 */
385#define TXRXQ_PCNT 0x0438
386#define PBF_DBG 0x043c
387
388/*
389 * RF registers
390 */
391#define RF_CSR_CFG 0x0500
392#define RF_CSR_CFG_DATA FIELD32(0x000000ff)
393#define RF_CSR_CFG_REGNUM FIELD32(0x00001f00)
394#define RF_CSR_CFG_WRITE FIELD32(0x00010000)
395#define RF_CSR_CFG_BUSY FIELD32(0x00020000)
396
397/*
398 * MAC Control/Status Registers(CSR).
399 * Some values are set in TU, whereas 1 TU == 1024 us.
400 */
401
402/*
403 * MAC_CSR0: ASIC revision number.
404 * ASIC_REV: 0
405 * ASIC_VER: 2870
406 */
407#define MAC_CSR0 0x1000
408#define MAC_CSR0_ASIC_REV FIELD32(0x0000ffff)
409#define MAC_CSR0_ASIC_VER FIELD32(0xffff0000)
410
411/*
412 * MAC_SYS_CTRL:
413 */
414#define MAC_SYS_CTRL 0x1004
415#define MAC_SYS_CTRL_RESET_CSR FIELD32(0x00000001)
416#define MAC_SYS_CTRL_RESET_BBP FIELD32(0x00000002)
417#define MAC_SYS_CTRL_ENABLE_TX FIELD32(0x00000004)
418#define MAC_SYS_CTRL_ENABLE_RX FIELD32(0x00000008)
419#define MAC_SYS_CTRL_CONTINUOUS_TX FIELD32(0x00000010)
420#define MAC_SYS_CTRL_LOOPBACK FIELD32(0x00000020)
421#define MAC_SYS_CTRL_WLAN_HALT FIELD32(0x00000040)
422#define MAC_SYS_CTRL_RX_TIMESTAMP FIELD32(0x00000080)
423
424/*
425 * MAC_ADDR_DW0: STA MAC register 0
426 */
427#define MAC_ADDR_DW0 0x1008
428#define MAC_ADDR_DW0_BYTE0 FIELD32(0x000000ff)
429#define MAC_ADDR_DW0_BYTE1 FIELD32(0x0000ff00)
430#define MAC_ADDR_DW0_BYTE2 FIELD32(0x00ff0000)
431#define MAC_ADDR_DW0_BYTE3 FIELD32(0xff000000)
432
433/*
434 * MAC_ADDR_DW1: STA MAC register 1
435 * UNICAST_TO_ME_MASK:
436 * Used to mask off bits from byte 5 of the MAC address
437 * to determine the UNICAST_TO_ME bit for RX frames.
438 * The full mask is complemented by BSS_ID_MASK:
439 * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
440 */
441#define MAC_ADDR_DW1 0x100c
442#define MAC_ADDR_DW1_BYTE4 FIELD32(0x000000ff)
443#define MAC_ADDR_DW1_BYTE5 FIELD32(0x0000ff00)
444#define MAC_ADDR_DW1_UNICAST_TO_ME_MASK FIELD32(0x00ff0000)
445
446/*
447 * MAC_BSSID_DW0: BSSID register 0
448 */
449#define MAC_BSSID_DW0 0x1010
450#define MAC_BSSID_DW0_BYTE0 FIELD32(0x000000ff)
451#define MAC_BSSID_DW0_BYTE1 FIELD32(0x0000ff00)
452#define MAC_BSSID_DW0_BYTE2 FIELD32(0x00ff0000)
453#define MAC_BSSID_DW0_BYTE3 FIELD32(0xff000000)
454
455/*
456 * MAC_BSSID_DW1: BSSID register 1
457 * BSS_ID_MASK:
458 * 0: 1-BSSID mode (BSS index = 0)
459 * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
460 * 2: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
461 * 3: 8-BSSID mode (BSS index: byte5, bit 0 - 2)
462 * This mask is used to mask off bits 0, 1 and 2 of byte 5 of the
463 * BSSID. This will make sure that those bits will be ignored
464 * when determining the MY_BSS of RX frames.
465 */
466#define MAC_BSSID_DW1 0x1014
467#define MAC_BSSID_DW1_BYTE4 FIELD32(0x000000ff)
468#define MAC_BSSID_DW1_BYTE5 FIELD32(0x0000ff00)
469#define MAC_BSSID_DW1_BSS_ID_MASK FIELD32(0x00030000)
470#define MAC_BSSID_DW1_BSS_BCN_NUM FIELD32(0x001c0000)
471
472/*
473 * MAX_LEN_CFG: Maximum frame length register.
474 * MAX_MPDU: rt2860b max 16k bytes
475 * MAX_PSDU: Maximum PSDU length
476 * (power factor) 0:2^13, 1:2^14, 2:2^15, 3:2^16
477 */
478#define MAX_LEN_CFG 0x1018
479#define MAX_LEN_CFG_MAX_MPDU FIELD32(0x00000fff)
480#define MAX_LEN_CFG_MAX_PSDU FIELD32(0x00003000)
481#define MAX_LEN_CFG_MIN_PSDU FIELD32(0x0000c000)
482#define MAX_LEN_CFG_MIN_MPDU FIELD32(0x000f0000)
483
484/*
485 * BBP_CSR_CFG: BBP serial control register
486 * VALUE: Register value to program into BBP
487 * REG_NUM: Selected BBP register
488 * READ_CONTROL: 0 write BBP, 1 read BBP
489 * BUSY: ASIC is busy executing BBP commands
490 * BBP_PAR_DUR: 0 4 MAC clocks, 1 8 MAC clocks
491 * BBP_RW_MODE: 0 serial, 1 paralell
492 */
493#define BBP_CSR_CFG 0x101c
494#define BBP_CSR_CFG_VALUE FIELD32(0x000000ff)
495#define BBP_CSR_CFG_REGNUM FIELD32(0x0000ff00)
496#define BBP_CSR_CFG_READ_CONTROL FIELD32(0x00010000)
497#define BBP_CSR_CFG_BUSY FIELD32(0x00020000)
498#define BBP_CSR_CFG_BBP_PAR_DUR FIELD32(0x00040000)
499#define BBP_CSR_CFG_BBP_RW_MODE FIELD32(0x00080000)
500
501/*
502 * RF_CSR_CFG0: RF control register
503 * REGID_AND_VALUE: Register value to program into RF
504 * BITWIDTH: Selected RF register
505 * STANDBYMODE: 0 high when standby, 1 low when standby
506 * SEL: 0 RF_LE0 activate, 1 RF_LE1 activate
507 * BUSY: ASIC is busy executing RF commands
508 */
509#define RF_CSR_CFG0 0x1020
510#define RF_CSR_CFG0_REGID_AND_VALUE FIELD32(0x00ffffff)
511#define RF_CSR_CFG0_BITWIDTH FIELD32(0x1f000000)
512#define RF_CSR_CFG0_REG_VALUE_BW FIELD32(0x1fffffff)
513#define RF_CSR_CFG0_STANDBYMODE FIELD32(0x20000000)
514#define RF_CSR_CFG0_SEL FIELD32(0x40000000)
515#define RF_CSR_CFG0_BUSY FIELD32(0x80000000)
516
517/*
518 * RF_CSR_CFG1: RF control register
519 * REGID_AND_VALUE: Register value to program into RF
520 * RFGAP: Gap between BB_CONTROL_RF and RF_LE
521 * 0: 3 system clock cycle (37.5usec)
522 * 1: 5 system clock cycle (62.5usec)
523 */
524#define RF_CSR_CFG1 0x1024
525#define RF_CSR_CFG1_REGID_AND_VALUE FIELD32(0x00ffffff)
526#define RF_CSR_CFG1_RFGAP FIELD32(0x1f000000)
527
528/*
529 * RF_CSR_CFG2: RF control register
530 * VALUE: Register value to program into RF
531 * RFGAP: Gap between BB_CONTROL_RF and RF_LE
532 * 0: 3 system clock cycle (37.5usec)
533 * 1: 5 system clock cycle (62.5usec)
534 */
535#define RF_CSR_CFG2 0x1028
536#define RF_CSR_CFG2_VALUE FIELD32(0x00ffffff)
537
538/*
539 * LED_CFG: LED control
540 * color LED's:
541 * 0: off
542 * 1: blinking upon TX2
543 * 2: periodic slow blinking
544 * 3: always on
545 * LED polarity:
546 * 0: active low
547 * 1: active high
548 */
549#define LED_CFG 0x102c
550#define LED_CFG_ON_PERIOD FIELD32(0x000000ff)
551#define LED_CFG_OFF_PERIOD FIELD32(0x0000ff00)
552#define LED_CFG_SLOW_BLINK_PERIOD FIELD32(0x003f0000)
553#define LED_CFG_R_LED_MODE FIELD32(0x03000000)
554#define LED_CFG_G_LED_MODE FIELD32(0x0c000000)
555#define LED_CFG_Y_LED_MODE FIELD32(0x30000000)
556#define LED_CFG_LED_POLAR FIELD32(0x40000000)
557
558/*
559 * XIFS_TIME_CFG: MAC timing
560 * CCKM_SIFS_TIME: unit 1us. Applied after CCK RX/TX
561 * OFDM_SIFS_TIME: unit 1us. Applied after OFDM RX/TX
562 * OFDM_XIFS_TIME: unit 1us. Applied after OFDM RX
563 * when MAC doesn't reference BBP signal BBRXEND
564 * EIFS: unit 1us
565 * BB_RXEND_ENABLE: reference RXEND signal to begin XIFS defer
566 *
567 */
568#define XIFS_TIME_CFG 0x1100
569#define XIFS_TIME_CFG_CCKM_SIFS_TIME FIELD32(0x000000ff)
570#define XIFS_TIME_CFG_OFDM_SIFS_TIME FIELD32(0x0000ff00)
571#define XIFS_TIME_CFG_OFDM_XIFS_TIME FIELD32(0x000f0000)
572#define XIFS_TIME_CFG_EIFS FIELD32(0x1ff00000)
573#define XIFS_TIME_CFG_BB_RXEND_ENABLE FIELD32(0x20000000)
574
575/*
576 * BKOFF_SLOT_CFG:
577 */
578#define BKOFF_SLOT_CFG 0x1104
579#define BKOFF_SLOT_CFG_SLOT_TIME FIELD32(0x000000ff)
580#define BKOFF_SLOT_CFG_CC_DELAY_TIME FIELD32(0x0000ff00)
581
582/*
583 * NAV_TIME_CFG:
584 */
585#define NAV_TIME_CFG 0x1108
586#define NAV_TIME_CFG_SIFS FIELD32(0x000000ff)
587#define NAV_TIME_CFG_SLOT_TIME FIELD32(0x0000ff00)
588#define NAV_TIME_CFG_EIFS FIELD32(0x01ff0000)
589#define NAV_TIME_ZERO_SIFS FIELD32(0x02000000)
590
591/*
592 * CH_TIME_CFG: count as channel busy
593 */
594#define CH_TIME_CFG 0x110c
595
596/*
597 * PBF_LIFE_TIMER: TX/RX MPDU timestamp timer (free run) Unit: 1us
598 */
599#define PBF_LIFE_TIMER 0x1110
600
601/*
602 * BCN_TIME_CFG:
603 * BEACON_INTERVAL: in unit of 1/16 TU
604 * TSF_TICKING: Enable TSF auto counting
605 * TSF_SYNC: Enable TSF sync, 00: disable, 01: infra mode, 10: ad-hoc mode
606 * BEACON_GEN: Enable beacon generator
607 */
608#define BCN_TIME_CFG 0x1114
609#define BCN_TIME_CFG_BEACON_INTERVAL FIELD32(0x0000ffff)
610#define BCN_TIME_CFG_TSF_TICKING FIELD32(0x00010000)
611#define BCN_TIME_CFG_TSF_SYNC FIELD32(0x00060000)
612#define BCN_TIME_CFG_TBTT_ENABLE FIELD32(0x00080000)
613#define BCN_TIME_CFG_BEACON_GEN FIELD32(0x00100000)
614#define BCN_TIME_CFG_TX_TIME_COMPENSATE FIELD32(0xf0000000)
615
616/*
617 * TBTT_SYNC_CFG:
618 */
619#define TBTT_SYNC_CFG 0x1118
620
621/*
622 * TSF_TIMER_DW0: Local lsb TSF timer, read-only
623 */
624#define TSF_TIMER_DW0 0x111c
625#define TSF_TIMER_DW0_LOW_WORD FIELD32(0xffffffff)
626
627/*
628 * TSF_TIMER_DW1: Local msb TSF timer, read-only
629 */
630#define TSF_TIMER_DW1 0x1120
631#define TSF_TIMER_DW1_HIGH_WORD FIELD32(0xffffffff)
632
633/*
634 * TBTT_TIMER: TImer remains till next TBTT, read-only
635 */
636#define TBTT_TIMER 0x1124
637
638/*
639 * INT_TIMER_CFG:
640 */
641#define INT_TIMER_CFG 0x1128
642
643/*
644 * INT_TIMER_EN: GP-timer and pre-tbtt Int enable
645 */
646#define INT_TIMER_EN 0x112c
647
648/*
649 * CH_IDLE_STA: channel idle time
650 */
651#define CH_IDLE_STA 0x1130
652
653/*
654 * CH_BUSY_STA: channel busy time
655 */
656#define CH_BUSY_STA 0x1134
657
658/*
659 * MAC_STATUS_CFG:
660 * BBP_RF_BUSY: When set to 0, BBP and RF are stable.
661 * if 1 or higher one of the 2 registers is busy.
662 */
663#define MAC_STATUS_CFG 0x1200
664#define MAC_STATUS_CFG_BBP_RF_BUSY FIELD32(0x00000003)
665
666/*
667 * PWR_PIN_CFG:
668 */
669#define PWR_PIN_CFG 0x1204
670
671/*
672 * AUTOWAKEUP_CFG: Manual power control / status register
673 * TBCN_BEFORE_WAKE: ForceWake has high privilege than PutToSleep when both set
674 * AUTOWAKE: 0:sleep, 1:awake
675 */
676#define AUTOWAKEUP_CFG 0x1208
677#define AUTOWAKEUP_CFG_AUTO_LEAD_TIME FIELD32(0x000000ff)
678#define AUTOWAKEUP_CFG_TBCN_BEFORE_WAKE FIELD32(0x00007f00)
679#define AUTOWAKEUP_CFG_AUTOWAKE FIELD32(0x00008000)
680
681/*
682 * EDCA_AC0_CFG:
683 */
684#define EDCA_AC0_CFG 0x1300
685#define EDCA_AC0_CFG_TX_OP FIELD32(0x000000ff)
686#define EDCA_AC0_CFG_AIFSN FIELD32(0x00000f00)
687#define EDCA_AC0_CFG_CWMIN FIELD32(0x0000f000)
688#define EDCA_AC0_CFG_CWMAX FIELD32(0x000f0000)
689
690/*
691 * EDCA_AC1_CFG:
692 */
693#define EDCA_AC1_CFG 0x1304
694#define EDCA_AC1_CFG_TX_OP FIELD32(0x000000ff)
695#define EDCA_AC1_CFG_AIFSN FIELD32(0x00000f00)
696#define EDCA_AC1_CFG_CWMIN FIELD32(0x0000f000)
697#define EDCA_AC1_CFG_CWMAX FIELD32(0x000f0000)
698
699/*
700 * EDCA_AC2_CFG:
701 */
702#define EDCA_AC2_CFG 0x1308
703#define EDCA_AC2_CFG_TX_OP FIELD32(0x000000ff)
704#define EDCA_AC2_CFG_AIFSN FIELD32(0x00000f00)
705#define EDCA_AC2_CFG_CWMIN FIELD32(0x0000f000)
706#define EDCA_AC2_CFG_CWMAX FIELD32(0x000f0000)
707
708/*
709 * EDCA_AC3_CFG:
710 */
711#define EDCA_AC3_CFG 0x130c
712#define EDCA_AC3_CFG_TX_OP FIELD32(0x000000ff)
713#define EDCA_AC3_CFG_AIFSN FIELD32(0x00000f00)
714#define EDCA_AC3_CFG_CWMIN FIELD32(0x0000f000)
715#define EDCA_AC3_CFG_CWMAX FIELD32(0x000f0000)
716
717/*
718 * EDCA_TID_AC_MAP:
719 */
720#define EDCA_TID_AC_MAP 0x1310
721
722/*
723 * TX_PWR_CFG_0:
724 */
725#define TX_PWR_CFG_0 0x1314
726#define TX_PWR_CFG_0_1MBS FIELD32(0x0000000f)
727#define TX_PWR_CFG_0_2MBS FIELD32(0x000000f0)
728#define TX_PWR_CFG_0_55MBS FIELD32(0x00000f00)
729#define TX_PWR_CFG_0_11MBS FIELD32(0x0000f000)
730#define TX_PWR_CFG_0_6MBS FIELD32(0x000f0000)
731#define TX_PWR_CFG_0_9MBS FIELD32(0x00f00000)
732#define TX_PWR_CFG_0_12MBS FIELD32(0x0f000000)
733#define TX_PWR_CFG_0_18MBS FIELD32(0xf0000000)
734
735/*
736 * TX_PWR_CFG_1:
737 */
738#define TX_PWR_CFG_1 0x1318
739#define TX_PWR_CFG_1_24MBS FIELD32(0x0000000f)
740#define TX_PWR_CFG_1_36MBS FIELD32(0x000000f0)
741#define TX_PWR_CFG_1_48MBS FIELD32(0x00000f00)
742#define TX_PWR_CFG_1_54MBS FIELD32(0x0000f000)
743#define TX_PWR_CFG_1_MCS0 FIELD32(0x000f0000)
744#define TX_PWR_CFG_1_MCS1 FIELD32(0x00f00000)
745#define TX_PWR_CFG_1_MCS2 FIELD32(0x0f000000)
746#define TX_PWR_CFG_1_MCS3 FIELD32(0xf0000000)
747
748/*
749 * TX_PWR_CFG_2:
750 */
751#define TX_PWR_CFG_2 0x131c
752#define TX_PWR_CFG_2_MCS4 FIELD32(0x0000000f)
753#define TX_PWR_CFG_2_MCS5 FIELD32(0x000000f0)
754#define TX_PWR_CFG_2_MCS6 FIELD32(0x00000f00)
755#define TX_PWR_CFG_2_MCS7 FIELD32(0x0000f000)
756#define TX_PWR_CFG_2_MCS8 FIELD32(0x000f0000)
757#define TX_PWR_CFG_2_MCS9 FIELD32(0x00f00000)
758#define TX_PWR_CFG_2_MCS10 FIELD32(0x0f000000)
759#define TX_PWR_CFG_2_MCS11 FIELD32(0xf0000000)
760
761/*
762 * TX_PWR_CFG_3:
763 */
764#define TX_PWR_CFG_3 0x1320
765#define TX_PWR_CFG_3_MCS12 FIELD32(0x0000000f)
766#define TX_PWR_CFG_3_MCS13 FIELD32(0x000000f0)
767#define TX_PWR_CFG_3_MCS14 FIELD32(0x00000f00)
768#define TX_PWR_CFG_3_MCS15 FIELD32(0x0000f000)
769#define TX_PWR_CFG_3_UKNOWN1 FIELD32(0x000f0000)
770#define TX_PWR_CFG_3_UKNOWN2 FIELD32(0x00f00000)
771#define TX_PWR_CFG_3_UKNOWN3 FIELD32(0x0f000000)
772#define TX_PWR_CFG_3_UKNOWN4 FIELD32(0xf0000000)
773
774/*
775 * TX_PWR_CFG_4:
776 */
777#define TX_PWR_CFG_4 0x1324
778#define TX_PWR_CFG_4_UKNOWN5 FIELD32(0x0000000f)
779#define TX_PWR_CFG_4_UKNOWN6 FIELD32(0x000000f0)
780#define TX_PWR_CFG_4_UKNOWN7 FIELD32(0x00000f00)
781#define TX_PWR_CFG_4_UKNOWN8 FIELD32(0x0000f000)
782
783/*
784 * TX_PIN_CFG:
785 */
786#define TX_PIN_CFG 0x1328
787#define TX_PIN_CFG_PA_PE_A0_EN FIELD32(0x00000001)
788#define TX_PIN_CFG_PA_PE_G0_EN FIELD32(0x00000002)
789#define TX_PIN_CFG_PA_PE_A1_EN FIELD32(0x00000004)
790#define TX_PIN_CFG_PA_PE_G1_EN FIELD32(0x00000008)
791#define TX_PIN_CFG_PA_PE_A0_POL FIELD32(0x00000010)
792#define TX_PIN_CFG_PA_PE_G0_POL FIELD32(0x00000020)
793#define TX_PIN_CFG_PA_PE_A1_POL FIELD32(0x00000040)
794#define TX_PIN_CFG_PA_PE_G1_POL FIELD32(0x00000080)
795#define TX_PIN_CFG_LNA_PE_A0_EN FIELD32(0x00000100)
796#define TX_PIN_CFG_LNA_PE_G0_EN FIELD32(0x00000200)
797#define TX_PIN_CFG_LNA_PE_A1_EN FIELD32(0x00000400)
798#define TX_PIN_CFG_LNA_PE_G1_EN FIELD32(0x00000800)
799#define TX_PIN_CFG_LNA_PE_A0_POL FIELD32(0x00001000)
800#define TX_PIN_CFG_LNA_PE_G0_POL FIELD32(0x00002000)
801#define TX_PIN_CFG_LNA_PE_A1_POL FIELD32(0x00004000)
802#define TX_PIN_CFG_LNA_PE_G1_POL FIELD32(0x00008000)
803#define TX_PIN_CFG_RFTR_EN FIELD32(0x00010000)
804#define TX_PIN_CFG_RFTR_POL FIELD32(0x00020000)
805#define TX_PIN_CFG_TRSW_EN FIELD32(0x00040000)
806#define TX_PIN_CFG_TRSW_POL FIELD32(0x00080000)
807
808/*
809 * TX_BAND_CFG: 0x1 use upper 20MHz, 0x0 use lower 20MHz
810 */
811#define TX_BAND_CFG 0x132c
812#define TX_BAND_CFG_HT40_PLUS FIELD32(0x00000001)
813#define TX_BAND_CFG_A FIELD32(0x00000002)
814#define TX_BAND_CFG_BG FIELD32(0x00000004)
815
816/*
817 * TX_SW_CFG0:
818 */
819#define TX_SW_CFG0 0x1330
820
821/*
822 * TX_SW_CFG1:
823 */
824#define TX_SW_CFG1 0x1334
825
826/*
827 * TX_SW_CFG2:
828 */
829#define TX_SW_CFG2 0x1338
830
831/*
832 * TXOP_THRES_CFG:
833 */
834#define TXOP_THRES_CFG 0x133c
835
836/*
837 * TXOP_CTRL_CFG:
838 */
839#define TXOP_CTRL_CFG 0x1340
840
841/*
842 * TX_RTS_CFG:
843 * RTS_THRES: unit:byte
844 * RTS_FBK_EN: enable rts rate fallback
845 */
846#define TX_RTS_CFG 0x1344
847#define TX_RTS_CFG_AUTO_RTS_RETRY_LIMIT FIELD32(0x000000ff)
848#define TX_RTS_CFG_RTS_THRES FIELD32(0x00ffff00)
849#define TX_RTS_CFG_RTS_FBK_EN FIELD32(0x01000000)
850
851/*
852 * TX_TIMEOUT_CFG:
853 * MPDU_LIFETIME: expiration time = 2^(9+MPDU LIFE TIME) us
854 * RX_ACK_TIMEOUT: unit:slot. Used for TX procedure
855 * TX_OP_TIMEOUT: TXOP timeout value for TXOP truncation.
856 * it is recommended that:
857 * (SLOT_TIME) > (TX_OP_TIMEOUT) > (RX_ACK_TIMEOUT)
858 */
859#define TX_TIMEOUT_CFG 0x1348
860#define TX_TIMEOUT_CFG_MPDU_LIFETIME FIELD32(0x000000f0)
861#define TX_TIMEOUT_CFG_RX_ACK_TIMEOUT FIELD32(0x0000ff00)
862#define TX_TIMEOUT_CFG_TX_OP_TIMEOUT FIELD32(0x00ff0000)
863
864/*
865 * TX_RTY_CFG:
866 * SHORT_RTY_LIMIT: short retry limit
867 * LONG_RTY_LIMIT: long retry limit
868 * LONG_RTY_THRE: Long retry threshoold
869 * NON_AGG_RTY_MODE: Non-Aggregate MPDU retry mode
870 * 0:expired by retry limit, 1: expired by mpdu life timer
871 * AGG_RTY_MODE: Aggregate MPDU retry mode
872 * 0:expired by retry limit, 1: expired by mpdu life timer
873 * TX_AUTO_FB_ENABLE: Tx retry PHY rate auto fallback enable
874 */
875#define TX_RTY_CFG 0x134c
876#define TX_RTY_CFG_SHORT_RTY_LIMIT FIELD32(0x000000ff)
877#define TX_RTY_CFG_LONG_RTY_LIMIT FIELD32(0x0000ff00)
878#define TX_RTY_CFG_LONG_RTY_THRE FIELD32(0x0fff0000)
879#define TX_RTY_CFG_NON_AGG_RTY_MODE FIELD32(0x10000000)
880#define TX_RTY_CFG_AGG_RTY_MODE FIELD32(0x20000000)
881#define TX_RTY_CFG_TX_AUTO_FB_ENABLE FIELD32(0x40000000)
882
883/*
884 * TX_LINK_CFG:
885 * REMOTE_MFB_LIFETIME: remote MFB life time. unit: 32us
886 * MFB_ENABLE: TX apply remote MFB 1:enable
887 * REMOTE_UMFS_ENABLE: remote unsolicit MFB enable
888 * 0: not apply remote remote unsolicit (MFS=7)
889 * TX_MRQ_EN: MCS request TX enable
890 * TX_RDG_EN: RDG TX enable
891 * TX_CF_ACK_EN: Piggyback CF-ACK enable
892 * REMOTE_MFB: remote MCS feedback
893 * REMOTE_MFS: remote MCS feedback sequence number
894 */
895#define TX_LINK_CFG 0x1350
896#define TX_LINK_CFG_REMOTE_MFB_LIFETIME FIELD32(0x000000ff)
897#define TX_LINK_CFG_MFB_ENABLE FIELD32(0x00000100)
898#define TX_LINK_CFG_REMOTE_UMFS_ENABLE FIELD32(0x00000200)
899#define TX_LINK_CFG_TX_MRQ_EN FIELD32(0x00000400)
900#define TX_LINK_CFG_TX_RDG_EN FIELD32(0x00000800)
901#define TX_LINK_CFG_TX_CF_ACK_EN FIELD32(0x00001000)
902#define TX_LINK_CFG_REMOTE_MFB FIELD32(0x00ff0000)
903#define TX_LINK_CFG_REMOTE_MFS FIELD32(0xff000000)
904
905/*
906 * HT_FBK_CFG0:
907 */
908#define HT_FBK_CFG0 0x1354
909#define HT_FBK_CFG0_HTMCS0FBK FIELD32(0x0000000f)
910#define HT_FBK_CFG0_HTMCS1FBK FIELD32(0x000000f0)
911#define HT_FBK_CFG0_HTMCS2FBK FIELD32(0x00000f00)
912#define HT_FBK_CFG0_HTMCS3FBK FIELD32(0x0000f000)
913#define HT_FBK_CFG0_HTMCS4FBK FIELD32(0x000f0000)
914#define HT_FBK_CFG0_HTMCS5FBK FIELD32(0x00f00000)
915#define HT_FBK_CFG0_HTMCS6FBK FIELD32(0x0f000000)
916#define HT_FBK_CFG0_HTMCS7FBK FIELD32(0xf0000000)
917
918/*
919 * HT_FBK_CFG1:
920 */
921#define HT_FBK_CFG1 0x1358
922#define HT_FBK_CFG1_HTMCS8FBK FIELD32(0x0000000f)
923#define HT_FBK_CFG1_HTMCS9FBK FIELD32(0x000000f0)
924#define HT_FBK_CFG1_HTMCS10FBK FIELD32(0x00000f00)
925#define HT_FBK_CFG1_HTMCS11FBK FIELD32(0x0000f000)
926#define HT_FBK_CFG1_HTMCS12FBK FIELD32(0x000f0000)
927#define HT_FBK_CFG1_HTMCS13FBK FIELD32(0x00f00000)
928#define HT_FBK_CFG1_HTMCS14FBK FIELD32(0x0f000000)
929#define HT_FBK_CFG1_HTMCS15FBK FIELD32(0xf0000000)
930
931/*
932 * LG_FBK_CFG0:
933 */
934#define LG_FBK_CFG0 0x135c
935#define LG_FBK_CFG0_OFDMMCS0FBK FIELD32(0x0000000f)
936#define LG_FBK_CFG0_OFDMMCS1FBK FIELD32(0x000000f0)
937#define LG_FBK_CFG0_OFDMMCS2FBK FIELD32(0x00000f00)
938#define LG_FBK_CFG0_OFDMMCS3FBK FIELD32(0x0000f000)
939#define LG_FBK_CFG0_OFDMMCS4FBK FIELD32(0x000f0000)
940#define LG_FBK_CFG0_OFDMMCS5FBK FIELD32(0x00f00000)
941#define LG_FBK_CFG0_OFDMMCS6FBK FIELD32(0x0f000000)
942#define LG_FBK_CFG0_OFDMMCS7FBK FIELD32(0xf0000000)
943
944/*
945 * LG_FBK_CFG1:
946 */
947#define LG_FBK_CFG1 0x1360
948#define LG_FBK_CFG0_CCKMCS0FBK FIELD32(0x0000000f)
949#define LG_FBK_CFG0_CCKMCS1FBK FIELD32(0x000000f0)
950#define LG_FBK_CFG0_CCKMCS2FBK FIELD32(0x00000f00)
951#define LG_FBK_CFG0_CCKMCS3FBK FIELD32(0x0000f000)
952
953/*
954 * CCK_PROT_CFG: CCK Protection
955 * PROTECT_RATE: Protection control frame rate for CCK TX(RTS/CTS/CFEnd)
956 * PROTECT_CTRL: Protection control frame type for CCK TX
957 * 0:none, 1:RTS/CTS, 2:CTS-to-self
958 * PROTECT_NAV: TXOP protection type for CCK TX
959 * 0:none, 1:ShortNAVprotect, 2:LongNAVProtect
960 * TX_OP_ALLOW_CCK: CCK TXOP allowance, 0:disallow
961 * TX_OP_ALLOW_OFDM: CCK TXOP allowance, 0:disallow
962 * TX_OP_ALLOW_MM20: CCK TXOP allowance, 0:disallow
963 * TX_OP_ALLOW_MM40: CCK TXOP allowance, 0:disallow
964 * TX_OP_ALLOW_GF20: CCK TXOP allowance, 0:disallow
965 * TX_OP_ALLOW_GF40: CCK TXOP allowance, 0:disallow
966 * RTS_TH_EN: RTS threshold enable on CCK TX
967 */
968#define CCK_PROT_CFG 0x1364
969#define CCK_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
970#define CCK_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
971#define CCK_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
972#define CCK_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
973#define CCK_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
974#define CCK_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
975#define CCK_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
976#define CCK_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
977#define CCK_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
978#define CCK_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
979
980/*
981 * OFDM_PROT_CFG: OFDM Protection
982 */
983#define OFDM_PROT_CFG 0x1368
984#define OFDM_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
985#define OFDM_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
986#define OFDM_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
987#define OFDM_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
988#define OFDM_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
989#define OFDM_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
990#define OFDM_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
991#define OFDM_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
992#define OFDM_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
993#define OFDM_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
994
995/*
996 * MM20_PROT_CFG: MM20 Protection
997 */
998#define MM20_PROT_CFG 0x136c
999#define MM20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1000#define MM20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1001#define MM20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1002#define MM20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1003#define MM20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1004#define MM20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1005#define MM20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1006#define MM20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1007#define MM20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1008#define MM20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1009
1010/*
1011 * MM40_PROT_CFG: MM40 Protection
1012 */
1013#define MM40_PROT_CFG 0x1370
1014#define MM40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1015#define MM40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1016#define MM40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1017#define MM40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1018#define MM40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1019#define MM40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1020#define MM40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1021#define MM40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1022#define MM40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1023#define MM40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1024
1025/*
1026 * GF20_PROT_CFG: GF20 Protection
1027 */
1028#define GF20_PROT_CFG 0x1374
1029#define GF20_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1030#define GF20_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1031#define GF20_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1032#define GF20_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1033#define GF20_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1034#define GF20_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1035#define GF20_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1036#define GF20_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1037#define GF20_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1038#define GF20_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1039
1040/*
1041 * GF40_PROT_CFG: GF40 Protection
1042 */
1043#define GF40_PROT_CFG 0x1378
1044#define GF40_PROT_CFG_PROTECT_RATE FIELD32(0x0000ffff)
1045#define GF40_PROT_CFG_PROTECT_CTRL FIELD32(0x00030000)
1046#define GF40_PROT_CFG_PROTECT_NAV FIELD32(0x000c0000)
1047#define GF40_PROT_CFG_TX_OP_ALLOW_CCK FIELD32(0x00100000)
1048#define GF40_PROT_CFG_TX_OP_ALLOW_OFDM FIELD32(0x00200000)
1049#define GF40_PROT_CFG_TX_OP_ALLOW_MM20 FIELD32(0x00400000)
1050#define GF40_PROT_CFG_TX_OP_ALLOW_MM40 FIELD32(0x00800000)
1051#define GF40_PROT_CFG_TX_OP_ALLOW_GF20 FIELD32(0x01000000)
1052#define GF40_PROT_CFG_TX_OP_ALLOW_GF40 FIELD32(0x02000000)
1053#define GF40_PROT_CFG_RTS_TH_EN FIELD32(0x04000000)
1054
1055/*
1056 * EXP_CTS_TIME:
1057 */
1058#define EXP_CTS_TIME 0x137c
1059
1060/*
1061 * EXP_ACK_TIME:
1062 */
1063#define EXP_ACK_TIME 0x1380
1064
1065/*
1066 * RX_FILTER_CFG: RX configuration register.
1067 */
1068#define RX_FILTER_CFG 0x1400
1069#define RX_FILTER_CFG_DROP_CRC_ERROR FIELD32(0x00000001)
1070#define RX_FILTER_CFG_DROP_PHY_ERROR FIELD32(0x00000002)
1071#define RX_FILTER_CFG_DROP_NOT_TO_ME FIELD32(0x00000004)
1072#define RX_FILTER_CFG_DROP_NOT_MY_BSSD FIELD32(0x00000008)
1073#define RX_FILTER_CFG_DROP_VER_ERROR FIELD32(0x00000010)
1074#define RX_FILTER_CFG_DROP_MULTICAST FIELD32(0x00000020)
1075#define RX_FILTER_CFG_DROP_BROADCAST FIELD32(0x00000040)
1076#define RX_FILTER_CFG_DROP_DUPLICATE FIELD32(0x00000080)
1077#define RX_FILTER_CFG_DROP_CF_END_ACK FIELD32(0x00000100)
1078#define RX_FILTER_CFG_DROP_CF_END FIELD32(0x00000200)
1079#define RX_FILTER_CFG_DROP_ACK FIELD32(0x00000400)
1080#define RX_FILTER_CFG_DROP_CTS FIELD32(0x00000800)
1081#define RX_FILTER_CFG_DROP_RTS FIELD32(0x00001000)
1082#define RX_FILTER_CFG_DROP_PSPOLL FIELD32(0x00002000)
1083#define RX_FILTER_CFG_DROP_BA FIELD32(0x00004000)
1084#define RX_FILTER_CFG_DROP_BAR FIELD32(0x00008000)
1085#define RX_FILTER_CFG_DROP_CNTL FIELD32(0x00010000)
1086
1087/*
1088 * AUTO_RSP_CFG:
1089 * AUTORESPONDER: 0: disable, 1: enable
1090 * BAC_ACK_POLICY: 0:long, 1:short preamble
1091 * CTS_40_MMODE: Response CTS 40MHz duplicate mode
1092 * CTS_40_MREF: Response CTS 40MHz duplicate mode
1093 * AR_PREAMBLE: Auto responder preamble 0:long, 1:short preamble
1094 * DUAL_CTS_EN: Power bit value in control frame
1095 * ACK_CTS_PSM_BIT:Power bit value in control frame
1096 */
1097#define AUTO_RSP_CFG 0x1404
1098#define AUTO_RSP_CFG_AUTORESPONDER FIELD32(0x00000001)
1099#define AUTO_RSP_CFG_BAC_ACK_POLICY FIELD32(0x00000002)
1100#define AUTO_RSP_CFG_CTS_40_MMODE FIELD32(0x00000004)
1101#define AUTO_RSP_CFG_CTS_40_MREF FIELD32(0x00000008)
1102#define AUTO_RSP_CFG_AR_PREAMBLE FIELD32(0x00000010)
1103#define AUTO_RSP_CFG_DUAL_CTS_EN FIELD32(0x00000040)
1104#define AUTO_RSP_CFG_ACK_CTS_PSM_BIT FIELD32(0x00000080)
1105
1106/*
1107 * LEGACY_BASIC_RATE:
1108 */
1109#define LEGACY_BASIC_RATE 0x1408
1110
1111/*
1112 * HT_BASIC_RATE:
1113 */
1114#define HT_BASIC_RATE 0x140c
1115
1116/*
1117 * HT_CTRL_CFG:
1118 */
1119#define HT_CTRL_CFG 0x1410
1120
1121/*
1122 * SIFS_COST_CFG:
1123 */
1124#define SIFS_COST_CFG 0x1414
1125
1126/*
1127 * RX_PARSER_CFG:
1128 * Set NAV for all received frames
1129 */
1130#define RX_PARSER_CFG 0x1418
1131
1132/*
1133 * TX_SEC_CNT0:
1134 */
1135#define TX_SEC_CNT0 0x1500
1136
1137/*
1138 * RX_SEC_CNT0:
1139 */
1140#define RX_SEC_CNT0 0x1504
1141
1142/*
1143 * CCMP_FC_MUTE:
1144 */
1145#define CCMP_FC_MUTE 0x1508
1146
1147/*
1148 * TXOP_HLDR_ADDR0:
1149 */
1150#define TXOP_HLDR_ADDR0 0x1600
1151
1152/*
1153 * TXOP_HLDR_ADDR1:
1154 */
1155#define TXOP_HLDR_ADDR1 0x1604
1156
1157/*
1158 * TXOP_HLDR_ET:
1159 */
1160#define TXOP_HLDR_ET 0x1608
1161
1162/*
1163 * QOS_CFPOLL_RA_DW0:
1164 */
1165#define QOS_CFPOLL_RA_DW0 0x160c
1166
1167/*
1168 * QOS_CFPOLL_RA_DW1:
1169 */
1170#define QOS_CFPOLL_RA_DW1 0x1610
1171
1172/*
1173 * QOS_CFPOLL_QC:
1174 */
1175#define QOS_CFPOLL_QC 0x1614
1176
1177/*
1178 * RX_STA_CNT0: RX PLCP error count & RX CRC error count
1179 */
1180#define RX_STA_CNT0 0x1700
1181#define RX_STA_CNT0_CRC_ERR FIELD32(0x0000ffff)
1182#define RX_STA_CNT0_PHY_ERR FIELD32(0xffff0000)
1183
1184/*
1185 * RX_STA_CNT1: RX False CCA count & RX LONG frame count
1186 */
1187#define RX_STA_CNT1 0x1704
1188#define RX_STA_CNT1_FALSE_CCA FIELD32(0x0000ffff)
1189#define RX_STA_CNT1_PLCP_ERR FIELD32(0xffff0000)
1190
1191/*
1192 * RX_STA_CNT2:
1193 */
1194#define RX_STA_CNT2 0x1708
1195#define RX_STA_CNT2_RX_DUPLI_COUNT FIELD32(0x0000ffff)
1196#define RX_STA_CNT2_RX_FIFO_OVERFLOW FIELD32(0xffff0000)
1197
1198/*
1199 * TX_STA_CNT0: TX Beacon count
1200 */
1201#define TX_STA_CNT0 0x170c
1202#define TX_STA_CNT0_TX_FAIL_COUNT FIELD32(0x0000ffff)
1203#define TX_STA_CNT0_TX_BEACON_COUNT FIELD32(0xffff0000)
1204
1205/*
1206 * TX_STA_CNT1: TX tx count
1207 */
1208#define TX_STA_CNT1 0x1710
1209#define TX_STA_CNT1_TX_SUCCESS FIELD32(0x0000ffff)
1210#define TX_STA_CNT1_TX_RETRANSMIT FIELD32(0xffff0000)
1211
1212/*
1213 * TX_STA_CNT2: TX tx count
1214 */
1215#define TX_STA_CNT2 0x1714
1216#define TX_STA_CNT2_TX_ZERO_LEN_COUNT FIELD32(0x0000ffff)
1217#define TX_STA_CNT2_TX_UNDER_FLOW_COUNT FIELD32(0xffff0000)
1218
1219/*
1220 * TX_STA_FIFO: TX Result for specific PID status fifo register
1221 */
1222#define TX_STA_FIFO 0x1718
1223#define TX_STA_FIFO_VALID FIELD32(0x00000001)
1224#define TX_STA_FIFO_PID_TYPE FIELD32(0x0000001e)
1225#define TX_STA_FIFO_TX_SUCCESS FIELD32(0x00000020)
1226#define TX_STA_FIFO_TX_AGGRE FIELD32(0x00000040)
1227#define TX_STA_FIFO_TX_ACK_REQUIRED FIELD32(0x00000080)
1228#define TX_STA_FIFO_WCID FIELD32(0x0000ff00)
1229#define TX_STA_FIFO_SUCCESS_RATE FIELD32(0xffff0000)
1230
1231/*
1232 * TX_AGG_CNT: Debug counter
1233 */
1234#define TX_AGG_CNT 0x171c
1235#define TX_AGG_CNT_NON_AGG_TX_COUNT FIELD32(0x0000ffff)
1236#define TX_AGG_CNT_AGG_TX_COUNT FIELD32(0xffff0000)
1237
1238/*
1239 * TX_AGG_CNT0:
1240 */
1241#define TX_AGG_CNT0 0x1720
1242#define TX_AGG_CNT0_AGG_SIZE_1_COUNT FIELD32(0x0000ffff)
1243#define TX_AGG_CNT0_AGG_SIZE_2_COUNT FIELD32(0xffff0000)
1244
1245/*
1246 * TX_AGG_CNT1:
1247 */
1248#define TX_AGG_CNT1 0x1724
1249#define TX_AGG_CNT1_AGG_SIZE_3_COUNT FIELD32(0x0000ffff)
1250#define TX_AGG_CNT1_AGG_SIZE_4_COUNT FIELD32(0xffff0000)
1251
1252/*
1253 * TX_AGG_CNT2:
1254 */
1255#define TX_AGG_CNT2 0x1728
1256#define TX_AGG_CNT2_AGG_SIZE_5_COUNT FIELD32(0x0000ffff)
1257#define TX_AGG_CNT2_AGG_SIZE_6_COUNT FIELD32(0xffff0000)
1258
1259/*
1260 * TX_AGG_CNT3:
1261 */
1262#define TX_AGG_CNT3 0x172c
1263#define TX_AGG_CNT3_AGG_SIZE_7_COUNT FIELD32(0x0000ffff)
1264#define TX_AGG_CNT3_AGG_SIZE_8_COUNT FIELD32(0xffff0000)
1265
1266/*
1267 * TX_AGG_CNT4:
1268 */
1269#define TX_AGG_CNT4 0x1730
1270#define TX_AGG_CNT4_AGG_SIZE_9_COUNT FIELD32(0x0000ffff)
1271#define TX_AGG_CNT4_AGG_SIZE_10_COUNT FIELD32(0xffff0000)
1272
1273/*
1274 * TX_AGG_CNT5:
1275 */
1276#define TX_AGG_CNT5 0x1734
1277#define TX_AGG_CNT5_AGG_SIZE_11_COUNT FIELD32(0x0000ffff)
1278#define TX_AGG_CNT5_AGG_SIZE_12_COUNT FIELD32(0xffff0000)
1279
1280/*
1281 * TX_AGG_CNT6:
1282 */
1283#define TX_AGG_CNT6 0x1738
1284#define TX_AGG_CNT6_AGG_SIZE_13_COUNT FIELD32(0x0000ffff)
1285#define TX_AGG_CNT6_AGG_SIZE_14_COUNT FIELD32(0xffff0000)
1286
1287/*
1288 * TX_AGG_CNT7:
1289 */
1290#define TX_AGG_CNT7 0x173c
1291#define TX_AGG_CNT7_AGG_SIZE_15_COUNT FIELD32(0x0000ffff)
1292#define TX_AGG_CNT7_AGG_SIZE_16_COUNT FIELD32(0xffff0000)
1293
1294/*
1295 * MPDU_DENSITY_CNT:
1296 * TX_ZERO_DEL: TX zero length delimiter count
1297 * RX_ZERO_DEL: RX zero length delimiter count
1298 */
1299#define MPDU_DENSITY_CNT 0x1740
1300#define MPDU_DENSITY_CNT_TX_ZERO_DEL FIELD32(0x0000ffff)
1301#define MPDU_DENSITY_CNT_RX_ZERO_DEL FIELD32(0xffff0000)
1302
1303/*
1304 * Security key table memory.
1305 * MAC_WCID_BASE: 8-bytes (use only 6 bytes) * 256 entry
1306 * PAIRWISE_KEY_TABLE_BASE: 32-byte * 256 entry
1307 * MAC_IVEIV_TABLE_BASE: 8-byte * 256-entry
1308 * MAC_WCID_ATTRIBUTE_BASE: 4-byte * 256-entry
1309 * SHARED_KEY_TABLE_BASE: 32 bytes * 32-entry
1310 * SHARED_KEY_MODE_BASE: 4 bits * 32-entry
1311 */
1312#define MAC_WCID_BASE 0x1800
1313#define PAIRWISE_KEY_TABLE_BASE 0x4000
1314#define MAC_IVEIV_TABLE_BASE 0x6000
1315#define MAC_WCID_ATTRIBUTE_BASE 0x6800
1316#define SHARED_KEY_TABLE_BASE 0x6c00
1317#define SHARED_KEY_MODE_BASE 0x7000
1318
1319#define MAC_WCID_ENTRY(__idx) \
1320 ( MAC_WCID_BASE + ((__idx) * sizeof(struct mac_wcid_entry)) )
1321#define PAIRWISE_KEY_ENTRY(__idx) \
1322 ( PAIRWISE_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1323#define MAC_IVEIV_ENTRY(__idx) \
1324 ( MAC_IVEIV_TABLE_BASE + ((__idx) & sizeof(struct mac_iveiv_entry)) )
1325#define MAC_WCID_ATTR_ENTRY(__idx) \
1326 ( MAC_WCID_ATTRIBUTE_BASE + ((__idx) * sizeof(u32)) )
1327#define SHARED_KEY_ENTRY(__idx) \
1328 ( SHARED_KEY_TABLE_BASE + ((__idx) * sizeof(struct hw_key_entry)) )
1329#define SHARED_KEY_MODE_ENTRY(__idx) \
1330 ( SHARED_KEY_MODE_BASE + ((__idx) * sizeof(u32)) )
1331
1332struct mac_wcid_entry {
1333 u8 mac[6];
1334 u8 reserved[2];
1335} __attribute__ ((packed));
1336
1337struct hw_key_entry {
1338 u8 key[16];
1339 u8 tx_mic[8];
1340 u8 rx_mic[8];
1341} __attribute__ ((packed));
1342
1343struct mac_iveiv_entry {
1344 u8 iv[8];
1345} __attribute__ ((packed));
1346
1347/*
1348 * MAC_WCID_ATTRIBUTE:
1349 */
1350#define MAC_WCID_ATTRIBUTE_KEYTAB FIELD32(0x00000001)
1351#define MAC_WCID_ATTRIBUTE_CIPHER FIELD32(0x0000000e)
1352#define MAC_WCID_ATTRIBUTE_BSS_IDX FIELD32(0x00000070)
1353#define MAC_WCID_ATTRIBUTE_RX_WIUDF FIELD32(0x00000380)
1354
1355/*
1356 * SHARED_KEY_MODE:
1357 */
1358#define SHARED_KEY_MODE_BSS0_KEY0 FIELD32(0x00000007)
1359#define SHARED_KEY_MODE_BSS0_KEY1 FIELD32(0x00000070)
1360#define SHARED_KEY_MODE_BSS0_KEY2 FIELD32(0x00000700)
1361#define SHARED_KEY_MODE_BSS0_KEY3 FIELD32(0x00007000)
1362#define SHARED_KEY_MODE_BSS1_KEY0 FIELD32(0x00070000)
1363#define SHARED_KEY_MODE_BSS1_KEY1 FIELD32(0x00700000)
1364#define SHARED_KEY_MODE_BSS1_KEY2 FIELD32(0x07000000)
1365#define SHARED_KEY_MODE_BSS1_KEY3 FIELD32(0x70000000)
1366
1367/*
1368 * HOST-MCU communication
1369 */
1370
1371/*
1372 * H2M_MAILBOX_CSR: Host-to-MCU Mailbox.
1373 */
1374#define H2M_MAILBOX_CSR 0x7010
1375#define H2M_MAILBOX_CSR_ARG0 FIELD32(0x000000ff)
1376#define H2M_MAILBOX_CSR_ARG1 FIELD32(0x0000ff00)
1377#define H2M_MAILBOX_CSR_CMD_TOKEN FIELD32(0x00ff0000)
1378#define H2M_MAILBOX_CSR_OWNER FIELD32(0xff000000)
1379
1380/*
1381 * H2M_MAILBOX_CID:
1382 */
1383#define H2M_MAILBOX_CID 0x7014
1384#define H2M_MAILBOX_CID_CMD0 FIELD32(0x000000ff)
1385#define H2M_MAILBOX_CID_CMD1 FIELD32(0x0000ff00)
1386#define H2M_MAILBOX_CID_CMD2 FIELD32(0x00ff0000)
1387#define H2M_MAILBOX_CID_CMD3 FIELD32(0xff000000)
1388
1389/*
1390 * H2M_MAILBOX_STATUS:
1391 */
1392#define H2M_MAILBOX_STATUS 0x701c
1393
1394/*
1395 * H2M_INT_SRC:
1396 */
1397#define H2M_INT_SRC 0x7024
1398
1399/*
1400 * H2M_BBP_AGENT:
1401 */
1402#define H2M_BBP_AGENT 0x7028
1403
1404/*
1405 * MCU_LEDCS: LED control for MCU Mailbox.
1406 */
1407#define MCU_LEDCS_LED_MODE FIELD8(0x1f)
1408#define MCU_LEDCS_POLARITY FIELD8(0x01)
1409
1410/*
1411 * HW_CS_CTS_BASE:
1412 * Carrier-sense CTS frame base address.
1413 * It's where mac stores carrier-sense frame for carrier-sense function.
1414 */
1415#define HW_CS_CTS_BASE 0x7700
1416
1417/*
1418 * HW_DFS_CTS_BASE:
1419 * FS CTS frame base address. It's where mac stores CTS frame for DFS.
1420 */
1421#define HW_DFS_CTS_BASE 0x7780
1422
1423/*
1424 * TXRX control registers - base address 0x3000
1425 */
1426
1427/*
1428 * TXRX_CSR1:
1429 * rt2860b UNKNOWN reg use R/O Reg Addr 0x77d0 first..
1430 */
1431#define TXRX_CSR1 0x77d0
1432
1433/*
1434 * HW_DEBUG_SETTING_BASE:
1435 * since NULL frame won't be that long (256 byte)
1436 * We steal 16 tail bytes to save debugging settings
1437 */
1438#define HW_DEBUG_SETTING_BASE 0x77f0
1439#define HW_DEBUG_SETTING_BASE2 0x7770
1440
1441/*
1442 * HW_BEACON_BASE
1443 * In order to support maximum 8 MBSS and its maximum length
1444 * is 512 bytes for each beacon
1445 * Three section discontinue memory segments will be used.
1446 * 1. The original region for BCN 0~3
1447 * 2. Extract memory from FCE table for BCN 4~5
1448 * 3. Extract memory from Pair-wise key table for BCN 6~7
1449 * It occupied those memory of wcid 238~253 for BCN 6
1450 * and wcid 222~237 for BCN 7
1451 *
1452 * IMPORTANT NOTE: Not sure why legacy driver does this,
1453 * but HW_BEACON_BASE7 is 0x0200 bytes below HW_BEACON_BASE6.
1454 */
1455#define HW_BEACON_BASE0 0x7800
1456#define HW_BEACON_BASE1 0x7a00
1457#define HW_BEACON_BASE2 0x7c00
1458#define HW_BEACON_BASE3 0x7e00
1459#define HW_BEACON_BASE4 0x7200
1460#define HW_BEACON_BASE5 0x7400
1461#define HW_BEACON_BASE6 0x5dc0
1462#define HW_BEACON_BASE7 0x5bc0
1463
1464#define HW_BEACON_OFFSET(__index) \
1465 ( ((__index) < 4) ? ( HW_BEACON_BASE0 + (__index * 0x0200) ) : \
1466 (((__index) < 6) ? ( HW_BEACON_BASE4 + ((__index - 4) * 0x0200) ) : \
1467 (HW_BEACON_BASE6 - ((__index - 6) * 0x0200))) )
1468
1469/*
1470 * 8051 firmware image. 72 * 8051 firmware image.
1471 */ 73 */
1472#define FIRMWARE_RT2870 "rt2870.bin" 74#define FIRMWARE_RT2870 "rt2870.bin"
1473#define FIRMWARE_IMAGE_BASE 0x3000 75#define FIRMWARE_IMAGE_BASE 0x3000
1474 76
1475/* 77/*
1476 * BBP registers.
1477 * The wordsize of the BBP is 8 bits.
1478 */
1479
1480/*
1481 * BBP 1: TX Antenna
1482 */
1483#define BBP1_TX_POWER FIELD8(0x07)
1484#define BBP1_TX_ANTENNA FIELD8(0x18)
1485
1486/*
1487 * BBP 3: RX Antenna
1488 */
1489#define BBP3_RX_ANTENNA FIELD8(0x18)
1490#define BBP3_HT40_PLUS FIELD8(0x20)
1491
1492/*
1493 * BBP 4: Bandwidth
1494 */
1495#define BBP4_TX_BF FIELD8(0x01)
1496#define BBP4_BANDWIDTH FIELD8(0x18)
1497
1498/*
1499 * RFCSR registers
1500 * The wordsize of the RFCSR is 8 bits.
1501 */
1502
1503/*
1504 * RFCSR 6:
1505 */
1506#define RFCSR6_R FIELD8(0x03)
1507
1508/*
1509 * RFCSR 7:
1510 */
1511#define RFCSR7_RF_TUNING FIELD8(0x01)
1512
1513/*
1514 * RFCSR 12:
1515 */
1516#define RFCSR12_TX_POWER FIELD8(0x1f)
1517
1518/*
1519 * RFCSR 22:
1520 */
1521#define RFCSR22_BASEBAND_LOOPBACK FIELD8(0x01)
1522
1523/*
1524 * RFCSR 23:
1525 */
1526#define RFCSR23_FREQ_OFFSET FIELD8(0x7f)
1527
1528/*
1529 * RFCSR 30:
1530 */
1531#define RFCSR30_RF_CALIBRATION FIELD8(0x80)
1532
1533/*
1534 * RF registers
1535 */
1536
1537/*
1538 * RF 2
1539 */
1540#define RF2_ANTENNA_RX2 FIELD32(0x00000040)
1541#define RF2_ANTENNA_TX1 FIELD32(0x00004000)
1542#define RF2_ANTENNA_RX1 FIELD32(0x00020000)
1543
1544/*
1545 * RF 3
1546 */
1547#define RF3_TXPOWER_G FIELD32(0x00003e00)
1548#define RF3_TXPOWER_A_7DBM_BOOST FIELD32(0x00000200)
1549#define RF3_TXPOWER_A FIELD32(0x00003c00)
1550
1551/*
1552 * RF 4
1553 */
1554#define RF4_TXPOWER_G FIELD32(0x000007c0)
1555#define RF4_TXPOWER_A_7DBM_BOOST FIELD32(0x00000040)
1556#define RF4_TXPOWER_A FIELD32(0x00000780)
1557#define RF4_FREQ_OFFSET FIELD32(0x001f8000)
1558#define RF4_HT40 FIELD32(0x00200000)
1559
1560/*
1561 * EEPROM content.
1562 * The wordsize of the EEPROM is 16 bits.
1563 */
1564
1565/*
1566 * EEPROM Version
1567 */
1568#define EEPROM_VERSION 0x0001
1569#define EEPROM_VERSION_FAE FIELD16(0x00ff)
1570#define EEPROM_VERSION_VERSION FIELD16(0xff00)
1571
1572/*
1573 * HW MAC address.
1574 */
1575#define EEPROM_MAC_ADDR_0 0x0002
1576#define EEPROM_MAC_ADDR_BYTE0 FIELD16(0x00ff)
1577#define EEPROM_MAC_ADDR_BYTE1 FIELD16(0xff00)
1578#define EEPROM_MAC_ADDR_1 0x0003
1579#define EEPROM_MAC_ADDR_BYTE2 FIELD16(0x00ff)
1580#define EEPROM_MAC_ADDR_BYTE3 FIELD16(0xff00)
1581#define EEPROM_MAC_ADDR_2 0x0004
1582#define EEPROM_MAC_ADDR_BYTE4 FIELD16(0x00ff)
1583#define EEPROM_MAC_ADDR_BYTE5 FIELD16(0xff00)
1584
1585/*
1586 * EEPROM ANTENNA config
1587 * RXPATH: 1: 1R, 2: 2R, 3: 3R
1588 * TXPATH: 1: 1T, 2: 2T
1589 */
1590#define EEPROM_ANTENNA 0x001a
1591#define EEPROM_ANTENNA_RXPATH FIELD16(0x000f)
1592#define EEPROM_ANTENNA_TXPATH FIELD16(0x00f0)
1593#define EEPROM_ANTENNA_RF_TYPE FIELD16(0x0f00)
1594
1595/*
1596 * EEPROM NIC config
1597 * CARDBUS_ACCEL: 0 - enable, 1 - disable
1598 */
1599#define EEPROM_NIC 0x001b
1600#define EEPROM_NIC_HW_RADIO FIELD16(0x0001)
1601#define EEPROM_NIC_DYNAMIC_TX_AGC FIELD16(0x0002)
1602#define EEPROM_NIC_EXTERNAL_LNA_BG FIELD16(0x0004)
1603#define EEPROM_NIC_EXTERNAL_LNA_A FIELD16(0x0008)
1604#define EEPROM_NIC_CARDBUS_ACCEL FIELD16(0x0010)
1605#define EEPROM_NIC_BW40M_SB_BG FIELD16(0x0020)
1606#define EEPROM_NIC_BW40M_SB_A FIELD16(0x0040)
1607#define EEPROM_NIC_WPS_PBC FIELD16(0x0080)
1608#define EEPROM_NIC_BW40M_BG FIELD16(0x0100)
1609#define EEPROM_NIC_BW40M_A FIELD16(0x0200)
1610
1611/*
1612 * EEPROM frequency
1613 */
1614#define EEPROM_FREQ 0x001d
1615#define EEPROM_FREQ_OFFSET FIELD16(0x00ff)
1616#define EEPROM_FREQ_LED_MODE FIELD16(0x7f00)
1617#define EEPROM_FREQ_LED_POLARITY FIELD16(0x1000)
1618
1619/*
1620 * EEPROM LED
1621 * POLARITY_RDY_G: Polarity RDY_G setting.
1622 * POLARITY_RDY_A: Polarity RDY_A setting.
1623 * POLARITY_ACT: Polarity ACT setting.
1624 * POLARITY_GPIO_0: Polarity GPIO0 setting.
1625 * POLARITY_GPIO_1: Polarity GPIO1 setting.
1626 * POLARITY_GPIO_2: Polarity GPIO2 setting.
1627 * POLARITY_GPIO_3: Polarity GPIO3 setting.
1628 * POLARITY_GPIO_4: Polarity GPIO4 setting.
1629 * LED_MODE: Led mode.
1630 */
1631#define EEPROM_LED1 0x001e
1632#define EEPROM_LED2 0x001f
1633#define EEPROM_LED3 0x0020
1634#define EEPROM_LED_POLARITY_RDY_BG FIELD16(0x0001)
1635#define EEPROM_LED_POLARITY_RDY_A FIELD16(0x0002)
1636#define EEPROM_LED_POLARITY_ACT FIELD16(0x0004)
1637#define EEPROM_LED_POLARITY_GPIO_0 FIELD16(0x0008)
1638#define EEPROM_LED_POLARITY_GPIO_1 FIELD16(0x0010)
1639#define EEPROM_LED_POLARITY_GPIO_2 FIELD16(0x0020)
1640#define EEPROM_LED_POLARITY_GPIO_3 FIELD16(0x0040)
1641#define EEPROM_LED_POLARITY_GPIO_4 FIELD16(0x0080)
1642#define EEPROM_LED_LED_MODE FIELD16(0x1f00)
1643
1644/*
1645 * EEPROM LNA
1646 */
1647#define EEPROM_LNA 0x0022
1648#define EEPROM_LNA_BG FIELD16(0x00ff)
1649#define EEPROM_LNA_A0 FIELD16(0xff00)
1650
1651/*
1652 * EEPROM RSSI BG offset
1653 */
1654#define EEPROM_RSSI_BG 0x0023
1655#define EEPROM_RSSI_BG_OFFSET0 FIELD16(0x00ff)
1656#define EEPROM_RSSI_BG_OFFSET1 FIELD16(0xff00)
1657
1658/*
1659 * EEPROM RSSI BG2 offset
1660 */
1661#define EEPROM_RSSI_BG2 0x0024
1662#define EEPROM_RSSI_BG2_OFFSET2 FIELD16(0x00ff)
1663#define EEPROM_RSSI_BG2_LNA_A1 FIELD16(0xff00)
1664
1665/*
1666 * EEPROM RSSI A offset
1667 */
1668#define EEPROM_RSSI_A 0x0025
1669#define EEPROM_RSSI_A_OFFSET0 FIELD16(0x00ff)
1670#define EEPROM_RSSI_A_OFFSET1 FIELD16(0xff00)
1671
1672/*
1673 * EEPROM RSSI A2 offset
1674 */
1675#define EEPROM_RSSI_A2 0x0026
1676#define EEPROM_RSSI_A2_OFFSET2 FIELD16(0x00ff)
1677#define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00)
1678
1679/*
1680 * EEPROM TXpower delta: 20MHZ AND 40 MHZ use different power.
1681 * This is delta in 40MHZ.
1682 * VALUE: Tx Power dalta value (MAX=4)
1683 * TYPE: 1: Plus the delta value, 0: minus the delta value
1684 * TXPOWER: Enable:
1685 */
1686#define EEPROM_TXPOWER_DELTA 0x0028
1687#define EEPROM_TXPOWER_DELTA_VALUE FIELD16(0x003f)
1688#define EEPROM_TXPOWER_DELTA_TYPE FIELD16(0x0040)
1689#define EEPROM_TXPOWER_DELTA_TXPOWER FIELD16(0x0080)
1690
1691/*
1692 * EEPROM TXPOWER 802.11BG
1693 */
1694#define EEPROM_TXPOWER_BG1 0x0029
1695#define EEPROM_TXPOWER_BG2 0x0030
1696#define EEPROM_TXPOWER_BG_SIZE 7
1697#define EEPROM_TXPOWER_BG_1 FIELD16(0x00ff)
1698#define EEPROM_TXPOWER_BG_2 FIELD16(0xff00)
1699
1700/*
1701 * EEPROM TXPOWER 802.11A
1702 */
1703#define EEPROM_TXPOWER_A1 0x003c
1704#define EEPROM_TXPOWER_A2 0x0053
1705#define EEPROM_TXPOWER_A_SIZE 6
1706#define EEPROM_TXPOWER_A_1 FIELD16(0x00ff)
1707#define EEPROM_TXPOWER_A_2 FIELD16(0xff00)
1708
1709/*
1710 * EEPROM TXpower byrate: 20MHZ power
1711 */
1712#define EEPROM_TXPOWER_BYRATE 0x006f
1713
1714/*
1715 * EEPROM BBP.
1716 */
1717#define EEPROM_BBP_START 0x0078
1718#define EEPROM_BBP_SIZE 16
1719#define EEPROM_BBP_VALUE FIELD16(0x00ff)
1720#define EEPROM_BBP_REG_ID FIELD16(0xff00)
1721
1722/*
1723 * MCU mailbox commands.
1724 */
1725#define MCU_SLEEP 0x30
1726#define MCU_WAKEUP 0x31
1727#define MCU_RADIO_OFF 0x35
1728#define MCU_CURRENT 0x36
1729#define MCU_LED 0x50
1730#define MCU_LED_STRENGTH 0x51
1731#define MCU_LED_1 0x52
1732#define MCU_LED_2 0x53
1733#define MCU_LED_3 0x54
1734#define MCU_RADAR 0x60
1735#define MCU_BOOT_SIGNAL 0x72
1736#define MCU_BBP_SIGNAL 0x80
1737#define MCU_POWER_SAVE 0x83
1738
1739/*
1740 * MCU mailbox tokens
1741 */
1742#define TOKEN_WAKUP 3
1743
1744/*
1745 * DMA descriptor defines. 78 * DMA descriptor defines.
1746 */ 79 */
1747#define TXD_DESC_SIZE ( 4 * sizeof(__le32) )
1748#define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) ) 80#define TXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
1749#define TXWI_DESC_SIZE ( 4 * sizeof(__le32) ) 81#define RXINFO_DESC_SIZE ( 1 * sizeof(__le32) )
1750#define RXD_DESC_SIZE ( 1 * sizeof(__le32) )
1751#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) ) 82#define RXWI_DESC_SIZE ( 4 * sizeof(__le32) )
1752 83#define RXD_DESC_SIZE ( 1 * sizeof(__le32) )
1753/*
1754 * TX descriptor format for TX, PRIO and Beacon Ring.
1755 */
1756
1757/*
1758 * Word0
1759 */
1760#define TXD_W0_SD_PTR0 FIELD32(0xffffffff)
1761
1762/*
1763 * Word1
1764 */
1765#define TXD_W1_SD_LEN1 FIELD32(0x00003fff)
1766#define TXD_W1_LAST_SEC1 FIELD32(0x00004000)
1767#define TXD_W1_BURST FIELD32(0x00008000)
1768#define TXD_W1_SD_LEN0 FIELD32(0x3fff0000)
1769#define TXD_W1_LAST_SEC0 FIELD32(0x40000000)
1770#define TXD_W1_DMA_DONE FIELD32(0x80000000)
1771
1772/*
1773 * Word2
1774 */
1775#define TXD_W2_SD_PTR1 FIELD32(0xffffffff)
1776
1777/*
1778 * Word3
1779 * WIV: Wireless Info Valid. 1: Driver filled WI, 0: DMA needs to copy WI
1780 * QSEL: Select on-chip FIFO ID for 2nd-stage output scheduler.
1781 * 0:MGMT, 1:HCCA 2:EDCA
1782 */
1783#define TXD_W3_WIV FIELD32(0x01000000)
1784#define TXD_W3_QSEL FIELD32(0x06000000)
1785#define TXD_W3_TCO FIELD32(0x20000000)
1786#define TXD_W3_UCO FIELD32(0x40000000)
1787#define TXD_W3_ICO FIELD32(0x80000000)
1788 84
1789/* 85/*
1790 * TX Info structure 86 * TX Info structure
@@ -1807,50 +103,52 @@ struct mac_iveiv_entry {
1807#define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000) 103#define TXINFO_W0_USB_DMA_TX_BURST FIELD32(0x80000000)
1808 104
1809/* 105/*
1810 * TX WI structure 106 * RX Info structure
107 */
108
109/*
110 * Word 0
111 */
112
113#define RXINFO_W0_USB_DMA_RX_PKT_LEN FIELD32(0x0000ffff)
114
115/*
116 * RX WI structure
1811 */ 117 */
1812 118
1813/* 119/*
1814 * Word0 120 * Word0
1815 * FRAG: 1 To inform TKIP engine this is a fragment.
1816 * MIMO_PS: The remote peer is in dynamic MIMO-PS mode
1817 * TX_OP: 0:HT TXOP rule , 1:PIFS TX ,2:Backoff, 3:sifs
1818 * BW: Channel bandwidth 20MHz or 40 MHz
1819 * STBC: 1: STBC support MCS =0-7, 2,3 : RESERVED
1820 */ 121 */
1821#define TXWI_W0_FRAG FIELD32(0x00000001) 122#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
1822#define TXWI_W0_MIMO_PS FIELD32(0x00000002) 123#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
1823#define TXWI_W0_CF_ACK FIELD32(0x00000004) 124#define RXWI_W0_BSSID FIELD32(0x00001c00)
1824#define TXWI_W0_TS FIELD32(0x00000008) 125#define RXWI_W0_UDF FIELD32(0x0000e000)
1825#define TXWI_W0_AMPDU FIELD32(0x00000010) 126#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
1826#define TXWI_W0_MPDU_DENSITY FIELD32(0x000000e0) 127#define RXWI_W0_TID FIELD32(0xf0000000)
1827#define TXWI_W0_TX_OP FIELD32(0x00000300)
1828#define TXWI_W0_MCS FIELD32(0x007f0000)
1829#define TXWI_W0_BW FIELD32(0x00800000)
1830#define TXWI_W0_SHORT_GI FIELD32(0x01000000)
1831#define TXWI_W0_STBC FIELD32(0x06000000)
1832#define TXWI_W0_IFS FIELD32(0x08000000)
1833#define TXWI_W0_PHYMODE FIELD32(0xc0000000)
1834 128
1835/* 129/*
1836 * Word1 130 * Word1
1837 */ 131 */
1838#define TXWI_W1_ACK FIELD32(0x00000001) 132#define RXWI_W1_FRAG FIELD32(0x0000000f)
1839#define TXWI_W1_NSEQ FIELD32(0x00000002) 133#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
1840#define TXWI_W1_BW_WIN_SIZE FIELD32(0x000000fc) 134#define RXWI_W1_MCS FIELD32(0x007f0000)
1841#define TXWI_W1_WIRELESS_CLI_ID FIELD32(0x0000ff00) 135#define RXWI_W1_BW FIELD32(0x00800000)
1842#define TXWI_W1_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000) 136#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
1843#define TXWI_W1_PACKETID FIELD32(0xf0000000) 137#define RXWI_W1_STBC FIELD32(0x06000000)
138#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
1844 139
1845/* 140/*
1846 * Word2 141 * Word2
1847 */ 142 */
1848#define TXWI_W2_IV FIELD32(0xffffffff) 143#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
144#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
145#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
1849 146
1850/* 147/*
1851 * Word3 148 * Word3
1852 */ 149 */
1853#define TXWI_W3_EIV FIELD32(0xffffffff) 150#define RXWI_W3_SNR0 FIELD32(0x000000ff)
151#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
1854 152
1855/* 153/*
1856 * RX descriptor format for RX Ring. 154 * RX descriptor format for RX Ring.
@@ -1888,64 +186,4 @@ struct mac_iveiv_entry {
1888#define RXD_W0_LAST_AMSDU FIELD32(0x00080000) 186#define RXD_W0_LAST_AMSDU FIELD32(0x00080000)
1889#define RXD_W0_PLCP_SIGNAL FIELD32(0xfff00000) 187#define RXD_W0_PLCP_SIGNAL FIELD32(0xfff00000)
1890 188
1891/*
1892 * RX WI structure
1893 */
1894
1895/*
1896 * Word0
1897 */
1898#define RXWI_W0_WIRELESS_CLI_ID FIELD32(0x000000ff)
1899#define RXWI_W0_KEY_INDEX FIELD32(0x00000300)
1900#define RXWI_W0_BSSID FIELD32(0x00001c00)
1901#define RXWI_W0_UDF FIELD32(0x0000e000)
1902#define RXWI_W0_MPDU_TOTAL_BYTE_COUNT FIELD32(0x0fff0000)
1903#define RXWI_W0_TID FIELD32(0xf0000000)
1904
1905/*
1906 * Word1
1907 */
1908#define RXWI_W1_FRAG FIELD32(0x0000000f)
1909#define RXWI_W1_SEQUENCE FIELD32(0x0000fff0)
1910#define RXWI_W1_MCS FIELD32(0x007f0000)
1911#define RXWI_W1_BW FIELD32(0x00800000)
1912#define RXWI_W1_SHORT_GI FIELD32(0x01000000)
1913#define RXWI_W1_STBC FIELD32(0x06000000)
1914#define RXWI_W1_PHYMODE FIELD32(0xc0000000)
1915
1916/*
1917 * Word2
1918 */
1919#define RXWI_W2_RSSI0 FIELD32(0x000000ff)
1920#define RXWI_W2_RSSI1 FIELD32(0x0000ff00)
1921#define RXWI_W2_RSSI2 FIELD32(0x00ff0000)
1922
1923/*
1924 * Word3
1925 */
1926#define RXWI_W3_SNR0 FIELD32(0x000000ff)
1927#define RXWI_W3_SNR1 FIELD32(0x0000ff00)
1928
1929/*
1930 * Macros for converting txpower from EEPROM to mac80211 value
1931 * and from mac80211 value to register value.
1932 */
1933#define MIN_G_TXPOWER 0
1934#define MIN_A_TXPOWER -7
1935#define MAX_G_TXPOWER 31
1936#define MAX_A_TXPOWER 15
1937#define DEFAULT_TXPOWER 5
1938
1939#define TXPOWER_G_FROM_DEV(__txpower) \
1940 ((__txpower) > MAX_G_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
1941
1942#define TXPOWER_G_TO_DEV(__txpower) \
1943 clamp_t(char, __txpower, MIN_G_TXPOWER, MAX_G_TXPOWER)
1944
1945#define TXPOWER_A_FROM_DEV(__txpower) \
1946 ((__txpower) > MAX_A_TXPOWER) ? DEFAULT_TXPOWER : (__txpower)
1947
1948#define TXPOWER_A_TO_DEV(__txpower) \
1949 clamp_t(char, __txpower, MIN_A_TXPOWER, MAX_A_TXPOWER)
1950
1951#endif /* RT2800USB_H */ 189#endif /* RT2800USB_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 27bc6b7fbfde..d9daa9c406fa 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -1,5 +1,6 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
3 <http://rt2x00.serialmonkey.com> 4 <http://rt2x00.serialmonkey.com>
4 5
5 This program is free software; you can redistribute it and/or modify 6 This program is free software; you can redistribute it and/or modify
@@ -103,6 +104,12 @@
103#define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate)) 104#define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate))
104 105
105/* 106/*
107 * Determine the number of L2 padding bytes required between the header and
108 * the payload.
109 */
110#define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3)
111
112/*
106 * Determine the alignment requirement, 113 * Determine the alignment requirement,
107 * to make sure the 802.11 payload is padded to a 4-byte boundrary 114 * to make sure the 802.11 payload is padded to a 4-byte boundrary
108 * we must determine the address of the payload and calculate the 115 * we must determine the address of the payload and calculate the
@@ -112,6 +119,12 @@
112 ( ((unsigned long)((__skb)->data + (__header))) & 3 ) 119 ( ((unsigned long)((__skb)->data + (__header))) & 3 )
113 120
114/* 121/*
122 * Constants for extra TX headroom for alignment purposes.
123 */
124#define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */
125#define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */
126
127/*
115 * Standard timing and size defines. 128 * Standard timing and size defines.
116 * These values should follow the ieee80211 specifications. 129 * These values should follow the ieee80211 specifications.
117 */ 130 */
@@ -144,6 +157,12 @@ struct avg_val {
144 int avg_weight; 157 int avg_weight;
145}; 158};
146 159
160enum rt2x00_chip_intf {
161 RT2X00_CHIP_INTF_PCI,
162 RT2X00_CHIP_INTF_USB,
163 RT2X00_CHIP_INTF_SOC,
164};
165
147/* 166/*
148 * Chipset identification 167 * Chipset identification
149 * The chipset on the device is composed of a RT and RF chip. 168 * The chipset on the device is composed of a RT and RF chip.
@@ -151,17 +170,28 @@ struct avg_val {
151 */ 170 */
152struct rt2x00_chip { 171struct rt2x00_chip {
153 u16 rt; 172 u16 rt;
154#define RT2460 0x0101 173#define RT2460 0x2460
155#define RT2560 0x0201 174#define RT2560 0x2560
156#define RT2570 0x1201 175#define RT2570 0x2570
157#define RT2561s 0x0301 /* Turbo */ 176#define RT2661 0x2661
158#define RT2561 0x0302 177#define RT2573 0x2573
159#define RT2661 0x0401 178#define RT2860 0x2860 /* 2.4GHz PCI/CB */
160#define RT2571 0x1300 179#define RT2870 0x2870
161#define RT2870 0x1600 180#define RT2872 0x2872
181#define RT2880 0x2880 /* WSOC */
182#define RT2883 0x2883 /* WSOC */
183#define RT2890 0x2890 /* 2.4GHz PCIe */
184#define RT3052 0x3052 /* WSOC */
185#define RT3070 0x3070
186#define RT3071 0x3071
187#define RT3090 0x3090 /* 2.4GHz PCIe */
188#define RT3390 0x3390
189#define RT3572 0x3572
162 190
163 u16 rf; 191 u16 rf;
164 u32 rev; 192 u16 rev;
193
194 enum rt2x00_chip_intf intf;
165}; 195};
166 196
167/* 197/*
@@ -299,13 +329,6 @@ struct link {
299 struct avg_val avg_rssi; 329 struct avg_val avg_rssi;
300 330
301 /* 331 /*
302 * Currently precalculated percentages of successful
303 * TX and RX frames.
304 */
305 int rx_percentage;
306 int tx_percentage;
307
308 /*
309 * Work structure for scheduling periodic link tuning. 332 * Work structure for scheduling periodic link tuning.
310 */ 333 */
311 struct delayed_work work; 334 struct delayed_work work;
@@ -579,6 +602,7 @@ struct rt2x00_ops {
579 const unsigned int eeprom_size; 602 const unsigned int eeprom_size;
580 const unsigned int rf_size; 603 const unsigned int rf_size;
581 const unsigned int tx_queues; 604 const unsigned int tx_queues;
605 const unsigned int extra_tx_headroom;
582 const struct data_queue_desc *rx; 606 const struct data_queue_desc *rx;
583 const struct data_queue_desc *tx; 607 const struct data_queue_desc *tx;
584 const struct data_queue_desc *bcn; 608 const struct data_queue_desc *bcn;
@@ -835,9 +859,23 @@ struct rt2x00_dev {
835 * Firmware image. 859 * Firmware image.
836 */ 860 */
837 const struct firmware *fw; 861 const struct firmware *fw;
862
863 /*
864 * Driver specific data.
865 */
866 void *priv;
838}; 867};
839 868
840/* 869/*
870 * Register defines.
871 * Some registers require multiple attempts before success,
872 * in those cases REGISTER_BUSY_COUNT attempts should be
873 * taken with a REGISTER_BUSY_DELAY interval.
874 */
875#define REGISTER_BUSY_COUNT 5
876#define REGISTER_BUSY_DELAY 100
877
878/*
841 * Generic RF access. 879 * Generic RF access.
842 * The RF is being accessed by word index. 880 * The RF is being accessed by word index.
843 */ 881 */
@@ -881,48 +919,57 @@ static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
881 * Chipset handlers 919 * Chipset handlers
882 */ 920 */
883static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev, 921static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
884 const u16 rt, const u16 rf, const u32 rev) 922 const u16 rt, const u16 rf, const u16 rev)
885{ 923{
886 INFO(rt2x00dev,
887 "Chipset detected - rt: %04x, rf: %04x, rev: %08x.\n",
888 rt, rf, rev);
889
890 rt2x00dev->chip.rt = rt; 924 rt2x00dev->chip.rt = rt;
891 rt2x00dev->chip.rf = rf; 925 rt2x00dev->chip.rf = rf;
892 rt2x00dev->chip.rev = rev; 926 rt2x00dev->chip.rev = rev;
927
928 INFO(rt2x00dev,
929 "Chipset detected - rt: %04x, rf: %04x, rev: %04x.\n",
930 rt2x00dev->chip.rt, rt2x00dev->chip.rf, rt2x00dev->chip.rev);
893} 931}
894 932
895static inline void rt2x00_set_chip_rt(struct rt2x00_dev *rt2x00dev, 933static inline char rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt)
896 const u16 rt)
897{ 934{
898 rt2x00dev->chip.rt = rt; 935 return (rt2x00dev->chip.rt == rt);
936}
937
938static inline char rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
939{
940 return (rt2x00dev->chip.rf == rf);
941}
942
943static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
944{
945 return rt2x00dev->chip.rev;
899} 946}
900 947
901static inline void rt2x00_set_chip_rf(struct rt2x00_dev *rt2x00dev, 948static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
902 const u16 rf, const u32 rev) 949 enum rt2x00_chip_intf intf)
903{ 950{
904 rt2x00_set_chip(rt2x00dev, rt2x00dev->chip.rt, rf, rev); 951 rt2x00dev->chip.intf = intf;
905} 952}
906 953
907static inline char rt2x00_rt(const struct rt2x00_chip *chipset, const u16 chip) 954static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev,
955 enum rt2x00_chip_intf intf)
908{ 956{
909 return (chipset->rt == chip); 957 return (rt2x00dev->chip.intf == intf);
910} 958}
911 959
912static inline char rt2x00_rf(const struct rt2x00_chip *chipset, const u16 chip) 960static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev)
913{ 961{
914 return (chipset->rf == chip); 962 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
915} 963}
916 964
917static inline u32 rt2x00_rev(const struct rt2x00_chip *chipset) 965static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev)
918{ 966{
919 return chipset->rev; 967 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
920} 968}
921 969
922static inline bool rt2x00_check_rev(const struct rt2x00_chip *chipset, 970static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev)
923 const u32 mask, const u32 rev)
924{ 971{
925 return ((chipset->rev & mask) == rev); 972 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
926} 973}
927 974
928/** 975/**
@@ -964,9 +1011,9 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb);
964int rt2x00mac_start(struct ieee80211_hw *hw); 1011int rt2x00mac_start(struct ieee80211_hw *hw);
965void rt2x00mac_stop(struct ieee80211_hw *hw); 1012void rt2x00mac_stop(struct ieee80211_hw *hw);
966int rt2x00mac_add_interface(struct ieee80211_hw *hw, 1013int rt2x00mac_add_interface(struct ieee80211_hw *hw,
967 struct ieee80211_if_init_conf *conf); 1014 struct ieee80211_vif *vif);
968void rt2x00mac_remove_interface(struct ieee80211_hw *hw, 1015void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
969 struct ieee80211_if_init_conf *conf); 1016 struct ieee80211_vif *vif);
970int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed); 1017int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed);
971void rt2x00mac_configure_filter(struct ieee80211_hw *hw, 1018void rt2x00mac_configure_filter(struct ieee80211_hw *hw,
972 unsigned int changed_flags, 1019 unsigned int changed_flags,
@@ -983,8 +1030,6 @@ int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
983#endif /* CONFIG_RT2X00_LIB_CRYPTO */ 1030#endif /* CONFIG_RT2X00_LIB_CRYPTO */
984int rt2x00mac_get_stats(struct ieee80211_hw *hw, 1031int rt2x00mac_get_stats(struct ieee80211_hw *hw,
985 struct ieee80211_low_level_stats *stats); 1032 struct ieee80211_low_level_stats *stats);
986int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw,
987 struct ieee80211_tx_queue_stats *stats);
988void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, 1033void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
989 struct ieee80211_vif *vif, 1034 struct ieee80211_vif *vif,
990 struct ieee80211_bss_conf *bss_conf, 1035 struct ieee80211_bss_conf *bss_conf,
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c
index 40a201e2e151..098315a271ca 100644
--- a/drivers/net/wireless/rt2x00/rt2x00config.c
+++ b/drivers/net/wireless/rt2x00/rt2x00config.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00crypto.c b/drivers/net/wireless/rt2x00/rt2x00crypto.c
index de36837dcf86..d291c7862e10 100644
--- a/drivers/net/wireless/rt2x00/rt2x00crypto.c
+++ b/drivers/net/wireless/rt2x00/rt2x00crypto.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c
index 68bc9bb1dbf9..9569fb4e5bc5 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.c
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -28,6 +28,7 @@
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/poll.h> 29#include <linux/poll.h>
30#include <linux/sched.h> 30#include <linux/sched.h>
31#include <linux/slab.h>
31#include <linux/uaccess.h> 32#include <linux/uaccess.h>
32 33
33#include "rt2x00.h" 34#include "rt2x00.h"
@@ -109,7 +110,7 @@ struct rt2x00debug_intf {
109 110
110 /* 111 /*
111 * HW crypto statistics. 112 * HW crypto statistics.
112 * All statistics are stored seperately per cipher type. 113 * All statistics are stored separately per cipher type.
113 */ 114 */
114 struct rt2x00debug_crypto crypto_stats[CIPHER_MAX]; 115 struct rt2x00debug_crypto crypto_stats[CIPHER_MAX];
115 116
@@ -184,7 +185,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
184 dump_hdr->data_length = cpu_to_le32(skb->len); 185 dump_hdr->data_length = cpu_to_le32(skb->len);
185 dump_hdr->chip_rt = cpu_to_le16(rt2x00dev->chip.rt); 186 dump_hdr->chip_rt = cpu_to_le16(rt2x00dev->chip.rt);
186 dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf); 187 dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf);
187 dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev); 188 dump_hdr->chip_rev = cpu_to_le16(rt2x00dev->chip.rev);
188 dump_hdr->type = cpu_to_le16(type); 189 dump_hdr->type = cpu_to_le16(type);
189 dump_hdr->queue_index = desc->entry->queue->qid; 190 dump_hdr->queue_index = desc->entry->queue->qid;
190 dump_hdr->entry_index = desc->entry->entry_idx; 191 dump_hdr->entry_index = desc->entry->entry_idx;
@@ -573,7 +574,7 @@ static struct dentry *rt2x00debug_create_file_chipset(const char *name,
573 blob->data = data; 574 blob->data = data;
574 data += sprintf(data, "rt chip:\t%04x\n", intf->rt2x00dev->chip.rt); 575 data += sprintf(data, "rt chip:\t%04x\n", intf->rt2x00dev->chip.rt);
575 data += sprintf(data, "rf chip:\t%04x\n", intf->rt2x00dev->chip.rf); 576 data += sprintf(data, "rf chip:\t%04x\n", intf->rt2x00dev->chip.rf);
576 data += sprintf(data, "revision:\t%08x\n", intf->rt2x00dev->chip.rev); 577 data += sprintf(data, "revision:\t%04x\n", intf->rt2x00dev->chip.rev);
577 data += sprintf(data, "\n"); 578 data += sprintf(data, "\n");
578 data += sprintf(data, "register\tbase\twords\twordsize\n"); 579 data += sprintf(data, "register\tbase\twords\twordsize\n");
579 data += sprintf(data, "csr\t%d\t%d\t%d\n", 580 data += sprintf(data, "csr\t%d\t%d\t%d\n",
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.h b/drivers/net/wireless/rt2x00/rt2x00debug.h
index 035cbc98c593..fa11409cb5c6 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.h
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 73bbec58341e..eda73ba735a6 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -25,6 +25,7 @@
25 25
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/slab.h>
28 29
29#include "rt2x00.h" 30#include "rt2x00.h"
30#include "rt2x00lib.h" 31#include "rt2x00lib.h"
@@ -205,6 +206,7 @@ void rt2x00lib_txdone(struct queue_entry *entry,
205 enum data_queue_qid qid = skb_get_queue_mapping(entry->skb); 206 enum data_queue_qid qid = skb_get_queue_mapping(entry->skb);
206 unsigned int header_length = ieee80211_get_hdrlen_from_skb(entry->skb); 207 unsigned int header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
207 u8 rate_idx, rate_flags, retry_rates; 208 u8 rate_idx, rate_flags, retry_rates;
209 u8 skbdesc_flags = skbdesc->flags;
208 unsigned int i; 210 unsigned int i;
209 bool success; 211 bool success;
210 212
@@ -287,12 +289,12 @@ void rt2x00lib_txdone(struct queue_entry *entry,
287 } 289 }
288 290
289 /* 291 /*
290 * Only send the status report to mac80211 when TX status was 292 * Only send the status report to mac80211 when it's a frame
291 * requested by it. If this was a extra frame coming through 293 * that originated in mac80211. If this was a extra frame coming
292 * a mac80211 library call (RTS/CTS) then we should not send the 294 * through a mac80211 library call (RTS/CTS) then we should not
293 * status report back. 295 * send the status report back.
294 */ 296 */
295 if (tx_info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) 297 if (!(skbdesc_flags & SKBDESC_NOT_MAC80211))
296 ieee80211_tx_status_irqsafe(rt2x00dev->hw, entry->skb); 298 ieee80211_tx_status_irqsafe(rt2x00dev->hw, entry->skb);
297 else 299 else
298 dev_kfree_skb_irq(entry->skb); 300 dev_kfree_skb_irq(entry->skb);
@@ -384,9 +386,6 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
384 memset(&rxdesc, 0, sizeof(rxdesc)); 386 memset(&rxdesc, 0, sizeof(rxdesc));
385 rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); 387 rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc);
386 388
387 /* Trim buffer to correct size */
388 skb_trim(entry->skb, rxdesc.size);
389
390 /* 389 /*
391 * The data behind the ieee80211 header must be 390 * The data behind the ieee80211 header must be
392 * aligned on a 4 byte boundary. 391 * aligned on a 4 byte boundary.
@@ -396,18 +395,23 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
396 /* 395 /*
397 * Hardware might have stripped the IV/EIV/ICV data, 396 * Hardware might have stripped the IV/EIV/ICV data,
398 * in that case it is possible that the data was 397 * in that case it is possible that the data was
399 * provided seperately (through hardware descriptor) 398 * provided separately (through hardware descriptor)
400 * in which case we should reinsert the data into the frame. 399 * in which case we should reinsert the data into the frame.
401 */ 400 */
402 if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) && 401 if ((rxdesc.dev_flags & RXDONE_CRYPTO_IV) &&
403 (rxdesc.flags & RX_FLAG_IV_STRIPPED)) 402 (rxdesc.flags & RX_FLAG_IV_STRIPPED))
404 rt2x00crypto_rx_insert_iv(entry->skb, header_length, 403 rt2x00crypto_rx_insert_iv(entry->skb, header_length,
405 &rxdesc); 404 &rxdesc);
406 else if (rxdesc.dev_flags & RXDONE_L2PAD) 405 else if (header_length &&
406 (rxdesc.size > header_length) &&
407 (rxdesc.dev_flags & RXDONE_L2PAD))
407 rt2x00queue_remove_l2pad(entry->skb, header_length); 408 rt2x00queue_remove_l2pad(entry->skb, header_length);
408 else 409 else
409 rt2x00queue_align_payload(entry->skb, header_length); 410 rt2x00queue_align_payload(entry->skb, header_length);
410 411
412 /* Trim buffer to correct size */
413 skb_trim(entry->skb, rxdesc.size);
414
411 /* 415 /*
412 * Check if the frame was received using HT. In that case, 416 * Check if the frame was received using HT. In that case,
413 * the rate is the MCS index and should be passed to mac80211 417 * the rate is the MCS index and should be passed to mac80211
@@ -430,7 +434,6 @@ void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev,
430 434
431 rx_status->mactime = rxdesc.timestamp; 435 rx_status->mactime = rxdesc.timestamp;
432 rx_status->rate_idx = rate_idx; 436 rx_status->rate_idx = rate_idx;
433 rx_status->qual = rt2x00link_calculate_signal(rt2x00dev, rxdesc.rssi);
434 rx_status->signal = rxdesc.rssi; 437 rx_status->signal = rxdesc.rssi;
435 rx_status->noise = rxdesc.noise; 438 rx_status->noise = rxdesc.noise;
436 rx_status->flag = rxdesc.flags; 439 rx_status->flag = rxdesc.flags;
@@ -684,6 +687,21 @@ static int rt2x00lib_probe_hw(struct rt2x00_dev *rt2x00dev)
684 rt2x00dev->hw->queues = rt2x00dev->ops->tx_queues; 687 rt2x00dev->hw->queues = rt2x00dev->ops->tx_queues;
685 688
686 /* 689 /*
690 * Initialize extra TX headroom required.
691 */
692 rt2x00dev->hw->extra_tx_headroom =
693 max_t(unsigned int, IEEE80211_TX_STATUS_HEADROOM,
694 rt2x00dev->ops->extra_tx_headroom);
695
696 /*
697 * Take TX headroom required for alignment into account.
698 */
699 if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags))
700 rt2x00dev->hw->extra_tx_headroom += RT2X00_L2PAD_SIZE;
701 else if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags))
702 rt2x00dev->hw->extra_tx_headroom += RT2X00_ALIGN_SIZE;
703
704 /*
687 * Register HW. 705 * Register HW.
688 */ 706 */
689 status = ieee80211_register_hw(rt2x00dev->hw); 707 status = ieee80211_register_hw(rt2x00dev->hw);
diff --git a/drivers/net/wireless/rt2x00/rt2x00dump.h b/drivers/net/wireless/rt2x00/rt2x00dump.h
index fdedb5122928..727019a748e7 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dump.h
+++ b/drivers/net/wireless/rt2x00/rt2x00dump.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00firmware.c b/drivers/net/wireless/rt2x00/rt2x00firmware.c
index d2deea2f2679..34beb00c4347 100644
--- a/drivers/net/wireless/rt2x00/rt2x00firmware.c
+++ b/drivers/net/wireless/rt2x00/rt2x00firmware.c
@@ -1,5 +1,6 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
3 <http://rt2x00.serialmonkey.com> 4 <http://rt2x00.serialmonkey.com>
4 5
5 This program is free software; you can redistribute it and/or modify 6 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00ht.c b/drivers/net/wireless/rt2x00/rt2x00ht.c
index e3cec839e540..1056c92143a8 100644
--- a/drivers/net/wireless/rt2x00/rt2x00ht.c
+++ b/drivers/net/wireless/rt2x00/rt2x00ht.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00leds.c b/drivers/net/wireless/rt2x00/rt2x00leds.c
index 49671fed91d7..ca585e34d00e 100644
--- a/drivers/net/wireless/rt2x00/rt2x00leds.c
+++ b/drivers/net/wireless/rt2x00/rt2x00leds.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00leds.h b/drivers/net/wireless/rt2x00/rt2x00leds.h
index 1046977e6a12..3b46f0c3332a 100644
--- a/drivers/net/wireless/rt2x00/rt2x00leds.h
+++ b/drivers/net/wireless/rt2x00/rt2x00leds.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -33,8 +33,6 @@ enum led_type {
33 LED_TYPE_QUALITY, 33 LED_TYPE_QUALITY,
34}; 34};
35 35
36#ifdef CONFIG_RT2X00_LIB_LEDS
37
38struct rt2x00_led { 36struct rt2x00_led {
39 struct rt2x00_dev *rt2x00dev; 37 struct rt2x00_dev *rt2x00dev;
40 struct led_classdev led_dev; 38 struct led_classdev led_dev;
@@ -45,6 +43,4 @@ struct rt2x00_led {
45#define LED_REGISTERED ( 1 << 1 ) 43#define LED_REGISTERED ( 1 << 1 )
46}; 44};
47 45
48#endif /* CONFIG_RT2X00_LIB_LEDS */
49
50#endif /* RT2X00LEDS_H */ 46#endif /* RT2X00LEDS_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h
index 567f029a8cda..be2e37fb4071 100644
--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
@@ -1,5 +1,6 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
3 <http://rt2x00.serialmonkey.com> 4 <http://rt2x00.serialmonkey.com>
4 5
5 This program is free software; you can redistribute it and/or modify 6 This program is free software; you can redistribute it and/or modify
@@ -161,8 +162,10 @@ void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length);
161 * rt2x00queue_write_tx_frame - Write TX frame to hardware 162 * rt2x00queue_write_tx_frame - Write TX frame to hardware
162 * @queue: Queue over which the frame should be send 163 * @queue: Queue over which the frame should be send
163 * @skb: The skb to send 164 * @skb: The skb to send
165 * @local: frame is not from mac80211
164 */ 166 */
165int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb); 167int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
168 bool local);
166 169
167/** 170/**
168 * rt2x00queue_update_beacon - Send new beacon from mac80211 to hardware 171 * rt2x00queue_update_beacon - Send new beacon from mac80211 to hardware
@@ -223,19 +226,6 @@ void rt2x00link_update_stats(struct rt2x00_dev *rt2x00dev,
223 struct rxdone_entry_desc *rxdesc); 226 struct rxdone_entry_desc *rxdesc);
224 227
225/** 228/**
226 * rt2x00link_calculate_signal - Calculate signal quality
227 * @rt2x00dev: Pointer to &struct rt2x00_dev.
228 * @rssi: RX Frame RSSI
229 *
230 * Calculate the signal quality of a frame based on the rssi
231 * measured during the receiving of the frame and the global
232 * link quality statistics measured since the start of the
233 * link tuning. The result is a value between 0 and 100 which
234 * is an indication of the signal quality.
235 */
236int rt2x00link_calculate_signal(struct rt2x00_dev *rt2x00dev, int rssi);
237
238/**
239 * rt2x00link_start_tuner - Start periodic link tuner work 229 * rt2x00link_start_tuner - Start periodic link tuner work
240 * @rt2x00dev: Pointer to &struct rt2x00_dev. 230 * @rt2x00dev: Pointer to &struct rt2x00_dev.
241 * 231 *
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c
index c708d0be9155..0efbf5a6c254 100644
--- a/drivers/net/wireless/rt2x00/rt2x00link.c
+++ b/drivers/net/wireless/rt2x00/rt2x00link.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -36,24 +36,6 @@
36#define DEFAULT_RSSI -128 36#define DEFAULT_RSSI -128
37 37
38/* 38/*
39 * When no TX/RX percentage could be calculated due to lack of
40 * frames on the air, we fallback to a percentage of 50%.
41 * This will assure we will get at least get some decent value
42 * when the link tuner starts.
43 * The value will be dropped and overwritten with the correct (measured)
44 * value anyway during the first run of the link tuner.
45 */
46#define DEFAULT_PERCENTAGE 50
47
48/*
49 * Small helper macro for percentage calculation
50 * This is a very simple macro with the only catch that it will
51 * produce a default value in case no total value was provided.
52 */
53#define PERCENTAGE(__value, __total) \
54 ( (__total) ? (((__value) * 100) / (__total)) : (DEFAULT_PERCENTAGE) )
55
56/*
57 * Helper struct and macro to work with moving/walking averages. 39 * Helper struct and macro to work with moving/walking averages.
58 * When adding a value to the average value the following calculation 40 * When adding a value to the average value the following calculation
59 * is needed: 41 * is needed:
@@ -91,27 +73,6 @@
91 __new; \ 73 __new; \
92}) 74})
93 75
94/*
95 * For calculating the Signal quality we have determined
96 * the total number of success and failed RX and TX frames.
97 * With the addition of the average RSSI value we can determine
98 * the link quality using the following algorithm:
99 *
100 * rssi_percentage = (avg_rssi * 100) / rssi_offset
101 * rx_percentage = (rx_success * 100) / rx_total
102 * tx_percentage = (tx_success * 100) / tx_total
103 * avg_signal = ((WEIGHT_RSSI * avg_rssi) +
104 * (WEIGHT_TX * tx_percentage) +
105 * (WEIGHT_RX * rx_percentage)) / 100
106 *
107 * This value should then be checked to not be greater then 100.
108 * This means the values of WEIGHT_RSSI, WEIGHT_RX, WEIGHT_TX must
109 * sum up to 100 as well.
110 */
111#define WEIGHT_RSSI 20
112#define WEIGHT_RX 40
113#define WEIGHT_TX 40
114
115static int rt2x00link_antenna_get_link_rssi(struct rt2x00_dev *rt2x00dev) 76static int rt2x00link_antenna_get_link_rssi(struct rt2x00_dev *rt2x00dev)
116{ 77{
117 struct link_ant *ant = &rt2x00dev->link.ant; 78 struct link_ant *ant = &rt2x00dev->link.ant;
@@ -304,46 +265,6 @@ void rt2x00link_update_stats(struct rt2x00_dev *rt2x00dev,
304 ant->rssi_ant = MOVING_AVERAGE(ant->rssi_ant, rxdesc->rssi); 265 ant->rssi_ant = MOVING_AVERAGE(ant->rssi_ant, rxdesc->rssi);
305} 266}
306 267
307static void rt2x00link_precalculate_signal(struct rt2x00_dev *rt2x00dev)
308{
309 struct link *link = &rt2x00dev->link;
310 struct link_qual *qual = &rt2x00dev->link.qual;
311
312 link->rx_percentage =
313 PERCENTAGE(qual->rx_success, qual->rx_failed + qual->rx_success);
314 link->tx_percentage =
315 PERCENTAGE(qual->tx_success, qual->tx_failed + qual->tx_success);
316}
317
318int rt2x00link_calculate_signal(struct rt2x00_dev *rt2x00dev, int rssi)
319{
320 struct link *link = &rt2x00dev->link;
321 int rssi_percentage = 0;
322 int signal;
323
324 /*
325 * We need a positive value for the RSSI.
326 */
327 if (rssi < 0)
328 rssi += rt2x00dev->rssi_offset;
329
330 /*
331 * Calculate the different percentages,
332 * which will be used for the signal.
333 */
334 rssi_percentage = PERCENTAGE(rssi, rt2x00dev->rssi_offset);
335
336 /*
337 * Add the individual percentages and use the WEIGHT
338 * defines to calculate the current link signal.
339 */
340 signal = ((WEIGHT_RSSI * rssi_percentage) +
341 (WEIGHT_TX * link->tx_percentage) +
342 (WEIGHT_RX * link->rx_percentage)) / 100;
343
344 return max_t(int, signal, 100);
345}
346
347void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev) 268void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev)
348{ 269{
349 struct link *link = &rt2x00dev->link; 270 struct link *link = &rt2x00dev->link;
@@ -357,9 +278,6 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev)
357 if (!rt2x00dev->intf_ap_count && !rt2x00dev->intf_sta_count) 278 if (!rt2x00dev->intf_ap_count && !rt2x00dev->intf_sta_count)
358 return; 279 return;
359 280
360 link->rx_percentage = DEFAULT_PERCENTAGE;
361 link->tx_percentage = DEFAULT_PERCENTAGE;
362
363 rt2x00link_reset_tuner(rt2x00dev, false); 281 rt2x00link_reset_tuner(rt2x00dev, false);
364 282
365 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) 283 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
@@ -448,12 +366,6 @@ static void rt2x00link_tuner(struct work_struct *work)
448 rt2x00dev->ops->lib->link_tuner(rt2x00dev, qual, link->count); 366 rt2x00dev->ops->lib->link_tuner(rt2x00dev, qual, link->count);
449 367
450 /* 368 /*
451 * Precalculate a portion of the link signal which is
452 * in based on the tx/rx success/failure counters.
453 */
454 rt2x00link_precalculate_signal(rt2x00dev);
455
456 /*
457 * Send a signal to the led to update the led signal strength. 369 * Send a signal to the led to update the led signal strength.
458 */ 370 */
459 rt2x00leds_led_quality(rt2x00dev, qual->rssi); 371 rt2x00leds_led_quality(rt2x00dev, qual->rssi);
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index 929b85f34f38..abbd857ec759 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -66,7 +66,6 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev,
66 rts_info = IEEE80211_SKB_CB(skb); 66 rts_info = IEEE80211_SKB_CB(skb);
67 rts_info->control.rates[0].flags &= ~IEEE80211_TX_RC_USE_RTS_CTS; 67 rts_info->control.rates[0].flags &= ~IEEE80211_TX_RC_USE_RTS_CTS;
68 rts_info->control.rates[0].flags &= ~IEEE80211_TX_RC_USE_CTS_PROTECT; 68 rts_info->control.rates[0].flags &= ~IEEE80211_TX_RC_USE_CTS_PROTECT;
69 rts_info->flags &= ~IEEE80211_TX_CTL_REQ_TX_STATUS;
70 69
71 if (tx_info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) 70 if (tx_info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT)
72 rts_info->flags |= IEEE80211_TX_CTL_NO_ACK; 71 rts_info->flags |= IEEE80211_TX_CTL_NO_ACK;
@@ -91,7 +90,7 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev,
91 frag_skb->data, data_length, tx_info, 90 frag_skb->data, data_length, tx_info,
92 (struct ieee80211_rts *)(skb->data)); 91 (struct ieee80211_rts *)(skb->data));
93 92
94 retval = rt2x00queue_write_tx_frame(queue, skb); 93 retval = rt2x00queue_write_tx_frame(queue, skb, true);
95 if (retval) { 94 if (retval) {
96 dev_kfree_skb_any(skb); 95 dev_kfree_skb_any(skb);
97 WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); 96 WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n");
@@ -104,10 +103,8 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
104{ 103{
105 struct rt2x00_dev *rt2x00dev = hw->priv; 104 struct rt2x00_dev *rt2x00dev = hw->priv;
106 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 105 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
107 struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
108 enum data_queue_qid qid = skb_get_queue_mapping(skb); 106 enum data_queue_qid qid = skb_get_queue_mapping(skb);
109 struct data_queue *queue; 107 struct data_queue *queue;
110 u16 frame_control;
111 108
112 /* 109 /*
113 * Mac80211 might be calling this function while we are trying 110 * Mac80211 might be calling this function while we are trying
@@ -142,7 +139,6 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
142 * either RTS or CTS-to-self frame and handles everything 139 * either RTS or CTS-to-self frame and handles everything
143 * inside the hardware. 140 * inside the hardware.
144 */ 141 */
145 frame_control = le16_to_cpu(ieee80211hdr->frame_control);
146 if ((tx_info->control.rates[0].flags & (IEEE80211_TX_RC_USE_RTS_CTS | 142 if ((tx_info->control.rates[0].flags & (IEEE80211_TX_RC_USE_RTS_CTS |
147 IEEE80211_TX_RC_USE_CTS_PROTECT)) && 143 IEEE80211_TX_RC_USE_CTS_PROTECT)) &&
148 !rt2x00dev->ops->hw->set_rts_threshold) { 144 !rt2x00dev->ops->hw->set_rts_threshold) {
@@ -153,7 +149,7 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
153 goto exit_fail; 149 goto exit_fail;
154 } 150 }
155 151
156 if (rt2x00queue_write_tx_frame(queue, skb)) 152 if (rt2x00queue_write_tx_frame(queue, skb, false))
157 goto exit_fail; 153 goto exit_fail;
158 154
159 if (rt2x00queue_threshold(queue)) 155 if (rt2x00queue_threshold(queue))
@@ -191,10 +187,10 @@ void rt2x00mac_stop(struct ieee80211_hw *hw)
191EXPORT_SYMBOL_GPL(rt2x00mac_stop); 187EXPORT_SYMBOL_GPL(rt2x00mac_stop);
192 188
193int rt2x00mac_add_interface(struct ieee80211_hw *hw, 189int rt2x00mac_add_interface(struct ieee80211_hw *hw,
194 struct ieee80211_if_init_conf *conf) 190 struct ieee80211_vif *vif)
195{ 191{
196 struct rt2x00_dev *rt2x00dev = hw->priv; 192 struct rt2x00_dev *rt2x00dev = hw->priv;
197 struct rt2x00_intf *intf = vif_to_intf(conf->vif); 193 struct rt2x00_intf *intf = vif_to_intf(vif);
198 struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, QID_BEACON); 194 struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, QID_BEACON);
199 struct queue_entry *entry = NULL; 195 struct queue_entry *entry = NULL;
200 unsigned int i; 196 unsigned int i;
@@ -207,7 +203,7 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
207 !test_bit(DEVICE_STATE_STARTED, &rt2x00dev->flags)) 203 !test_bit(DEVICE_STATE_STARTED, &rt2x00dev->flags))
208 return -ENODEV; 204 return -ENODEV;
209 205
210 switch (conf->type) { 206 switch (vif->type) {
211 case NL80211_IFTYPE_AP: 207 case NL80211_IFTYPE_AP:
212 /* 208 /*
213 * We don't support mixed combinations of 209 * We don't support mixed combinations of
@@ -267,7 +263,7 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
267 * increase interface count and start initialization. 263 * increase interface count and start initialization.
268 */ 264 */
269 265
270 if (conf->type == NL80211_IFTYPE_AP) 266 if (vif->type == NL80211_IFTYPE_AP)
271 rt2x00dev->intf_ap_count++; 267 rt2x00dev->intf_ap_count++;
272 else 268 else
273 rt2x00dev->intf_sta_count++; 269 rt2x00dev->intf_sta_count++;
@@ -277,16 +273,16 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
277 mutex_init(&intf->beacon_skb_mutex); 273 mutex_init(&intf->beacon_skb_mutex);
278 intf->beacon = entry; 274 intf->beacon = entry;
279 275
280 if (conf->type == NL80211_IFTYPE_AP) 276 if (vif->type == NL80211_IFTYPE_AP)
281 memcpy(&intf->bssid, conf->mac_addr, ETH_ALEN); 277 memcpy(&intf->bssid, vif->addr, ETH_ALEN);
282 memcpy(&intf->mac, conf->mac_addr, ETH_ALEN); 278 memcpy(&intf->mac, vif->addr, ETH_ALEN);
283 279
284 /* 280 /*
285 * The MAC adddress must be configured after the device 281 * The MAC adddress must be configured after the device
286 * has been initialized. Otherwise the device can reset 282 * has been initialized. Otherwise the device can reset
287 * the MAC registers. 283 * the MAC registers.
288 */ 284 */
289 rt2x00lib_config_intf(rt2x00dev, intf, conf->type, intf->mac, NULL); 285 rt2x00lib_config_intf(rt2x00dev, intf, vif->type, intf->mac, NULL);
290 286
291 /* 287 /*
292 * Some filters depend on the current working mode. We can force 288 * Some filters depend on the current working mode. We can force
@@ -300,10 +296,10 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw,
300EXPORT_SYMBOL_GPL(rt2x00mac_add_interface); 296EXPORT_SYMBOL_GPL(rt2x00mac_add_interface);
301 297
302void rt2x00mac_remove_interface(struct ieee80211_hw *hw, 298void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
303 struct ieee80211_if_init_conf *conf) 299 struct ieee80211_vif *vif)
304{ 300{
305 struct rt2x00_dev *rt2x00dev = hw->priv; 301 struct rt2x00_dev *rt2x00dev = hw->priv;
306 struct rt2x00_intf *intf = vif_to_intf(conf->vif); 302 struct rt2x00_intf *intf = vif_to_intf(vif);
307 303
308 /* 304 /*
309 * Don't allow interfaces to be remove while 305 * Don't allow interfaces to be remove while
@@ -311,11 +307,11 @@ void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
311 * no interface is present. 307 * no interface is present.
312 */ 308 */
313 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) || 309 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags) ||
314 (conf->type == NL80211_IFTYPE_AP && !rt2x00dev->intf_ap_count) || 310 (vif->type == NL80211_IFTYPE_AP && !rt2x00dev->intf_ap_count) ||
315 (conf->type != NL80211_IFTYPE_AP && !rt2x00dev->intf_sta_count)) 311 (vif->type != NL80211_IFTYPE_AP && !rt2x00dev->intf_sta_count))
316 return; 312 return;
317 313
318 if (conf->type == NL80211_IFTYPE_AP) 314 if (vif->type == NL80211_IFTYPE_AP)
319 rt2x00dev->intf_ap_count--; 315 rt2x00dev->intf_ap_count--;
320 else 316 else
321 rt2x00dev->intf_sta_count--; 317 rt2x00dev->intf_sta_count--;
@@ -559,22 +555,6 @@ int rt2x00mac_get_stats(struct ieee80211_hw *hw,
559} 555}
560EXPORT_SYMBOL_GPL(rt2x00mac_get_stats); 556EXPORT_SYMBOL_GPL(rt2x00mac_get_stats);
561 557
562int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw,
563 struct ieee80211_tx_queue_stats *stats)
564{
565 struct rt2x00_dev *rt2x00dev = hw->priv;
566 unsigned int i;
567
568 for (i = 0; i < rt2x00dev->ops->tx_queues; i++) {
569 stats[i].len = rt2x00dev->tx[i].length;
570 stats[i].limit = rt2x00dev->tx[i].limit;
571 stats[i].count = rt2x00dev->tx[i].count;
572 }
573
574 return 0;
575}
576EXPORT_SYMBOL_GPL(rt2x00mac_get_tx_stats);
577
578void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, 558void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
579 struct ieee80211_vif *vif, 559 struct ieee80211_vif *vif,
580 struct ieee80211_bss_conf *bss_conf, 560 struct ieee80211_bss_conf *bss_conf,
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c
index cdd5154bd4c0..cf3f1c0c4382 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.c
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -27,6 +27,7 @@
27#include <linux/kernel.h> 27#include <linux/kernel.h>
28#include <linux/module.h> 28#include <linux/module.h>
29#include <linux/pci.h> 29#include <linux/pci.h>
30#include <linux/slab.h>
30 31
31#include "rt2x00.h" 32#include "rt2x00.h"
32#include "rt2x00pci.h" 33#include "rt2x00pci.h"
@@ -41,6 +42,9 @@ int rt2x00pci_regbusy_read(struct rt2x00_dev *rt2x00dev,
41{ 42{
42 unsigned int i; 43 unsigned int i;
43 44
45 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
46 return 0;
47
44 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 48 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
45 rt2x00pci_register_read(rt2x00dev, offset, reg); 49 rt2x00pci_register_read(rt2x00dev, offset, reg);
46 if (!rt2x00_get_field32(*reg, field)) 50 if (!rt2x00_get_field32(*reg, field))
@@ -269,7 +273,6 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
269 struct ieee80211_hw *hw; 273 struct ieee80211_hw *hw;
270 struct rt2x00_dev *rt2x00dev; 274 struct rt2x00_dev *rt2x00dev;
271 int retval; 275 int retval;
272 u16 chip;
273 276
274 retval = pci_request_regions(pci_dev, pci_name(pci_dev)); 277 retval = pci_request_regions(pci_dev, pci_name(pci_dev));
275 if (retval) { 278 if (retval) {
@@ -310,11 +313,7 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id)
310 rt2x00dev->irq = pci_dev->irq; 313 rt2x00dev->irq = pci_dev->irq;
311 rt2x00dev->name = pci_name(pci_dev); 314 rt2x00dev->name = pci_name(pci_dev);
312 315
313 /* 316 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);
314 * Determine RT chipset by reading PCI header.
315 */
316 pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
317 rt2x00_set_chip_rt(rt2x00dev, chip);
318 317
319 retval = rt2x00pci_alloc_reg(rt2x00dev); 318 retval = rt2x00pci_alloc_reg(rt2x00dev);
320 if (retval) 319 if (retval)
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h
index 15a12487e04b..8149ff68410a 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.h
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -27,6 +27,7 @@
27#define RT2X00PCI_H 27#define RT2X00PCI_H
28 28
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/pci.h>
30 31
31/* 32/*
32 * This variable should be used with the 33 * This variable should be used with the
@@ -35,15 +36,6 @@
35#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops) 36#define PCI_DEVICE_DATA(__ops) .driver_data = (kernel_ulong_t)(__ops)
36 37
37/* 38/*
38 * Register defines.
39 * Some registers require multiple attempts before success,
40 * in those cases REGISTER_BUSY_COUNT attempts should be
41 * taken with a REGISTER_BUSY_DELAY interval.
42 */
43#define REGISTER_BUSY_COUNT 5
44#define REGISTER_BUSY_DELAY 100
45
46/*
47 * Register access. 39 * Register access.
48 */ 40 */
49static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev, 41static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
@@ -53,10 +45,9 @@ static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
53 *value = readl(rt2x00dev->csr.base + offset); 45 *value = readl(rt2x00dev->csr.base + offset);
54} 46}
55 47
56static inline void 48static inline void rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
57rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev, 49 const unsigned int offset,
58 const unsigned int offset, 50 void *value, const u32 length)
59 void *value, const u16 length)
60{ 51{
61 memcpy_fromio(value, rt2x00dev->csr.base + offset, length); 52 memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
62} 53}
@@ -68,10 +59,10 @@ static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
68 writel(value, rt2x00dev->csr.base + offset); 59 writel(value, rt2x00dev->csr.base + offset);
69} 60}
70 61
71static inline void 62static inline void rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
72rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev, 63 const unsigned int offset,
73 const unsigned int offset, 64 const void *value,
74 const void *value, const u16 length) 65 const u32 length)
75{ 66{
76 memcpy_toio(rt2x00dev->csr.base + offset, value, length); 67 memcpy_toio(rt2x00dev->csr.base + offset, value, length);
77} 68}
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c
index 577029efe320..a0bd36fc4d2e 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.c
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
@@ -1,5 +1,6 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
3 <http://rt2x00.serialmonkey.com> 4 <http://rt2x00.serialmonkey.com>
4 5
5 This program is free software; you can redistribute it and/or modify 6 This program is free software; you can redistribute it and/or modify
@@ -23,6 +24,7 @@
23 Abstract: rt2x00 queue specific routines. 24 Abstract: rt2x00 queue specific routines.
24 */ 25 */
25 26
27#include <linux/slab.h>
26#include <linux/kernel.h> 28#include <linux/kernel.h>
27#include <linux/module.h> 29#include <linux/module.h>
28#include <linux/dma-mapping.h> 30#include <linux/dma-mapping.h>
@@ -103,7 +105,7 @@ void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
103 * is also mapped to the DMA so it can be used for transfering 105 * is also mapped to the DMA so it can be used for transfering
104 * additional descriptor information to the hardware. 106 * additional descriptor information to the hardware.
105 */ 107 */
106 skb_push(skb, rt2x00dev->hw->extra_tx_headroom); 108 skb_push(skb, rt2x00dev->ops->extra_tx_headroom);
107 109
108 skbdesc->skb_dma = 110 skbdesc->skb_dma =
109 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE); 111 dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
@@ -111,7 +113,7 @@ void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
111 /* 113 /*
112 * Restore data pointer to original location again. 114 * Restore data pointer to original location again.
113 */ 115 */
114 skb_pull(skb, rt2x00dev->hw->extra_tx_headroom); 116 skb_pull(skb, rt2x00dev->ops->extra_tx_headroom);
115 117
116 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; 118 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
117} 119}
@@ -133,7 +135,7 @@ void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
133 * by the driver, but it was actually mapped to DMA. 135 * by the driver, but it was actually mapped to DMA.
134 */ 136 */
135 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, 137 dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
136 skb->len + rt2x00dev->hw->extra_tx_headroom, 138 skb->len + rt2x00dev->ops->extra_tx_headroom,
137 DMA_TO_DEVICE); 139 DMA_TO_DEVICE);
138 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; 140 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
139 } 141 }
@@ -161,10 +163,10 @@ void rt2x00queue_align_frame(struct sk_buff *skb)
161 skb_trim(skb, frame_length); 163 skb_trim(skb, frame_length);
162} 164}
163 165
164void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_lengt) 166void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_length)
165{ 167{
166 unsigned int frame_length = skb->len; 168 unsigned int frame_length = skb->len;
167 unsigned int align = ALIGN_SIZE(skb, header_lengt); 169 unsigned int align = ALIGN_SIZE(skb, header_length);
168 170
169 if (!align) 171 if (!align)
170 return; 172 return;
@@ -176,55 +178,45 @@ void rt2x00queue_align_payload(struct sk_buff *skb, unsigned int header_lengt)
176 178
177void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length) 179void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
178{ 180{
179 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); 181 unsigned int payload_length = skb->len - header_length;
180 unsigned int frame_length = skb->len;
181 unsigned int header_align = ALIGN_SIZE(skb, 0); 182 unsigned int header_align = ALIGN_SIZE(skb, 0);
182 unsigned int payload_align = ALIGN_SIZE(skb, header_length); 183 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
183 unsigned int l2pad = 4 - (payload_align - header_align); 184 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
184 185
185 if (header_align == payload_align) { 186 /*
186 /* 187 * Adjust the header alignment if the payload needs to be moved more
187 * Both header and payload must be moved the same 188 * than the header.
188 * amount of bytes to align them properly. This means 189 */
189 * we don't use the L2 padding but just move the entire 190 if (payload_align > header_align)
190 * frame. 191 header_align += 4;
191 */
192 rt2x00queue_align_frame(skb);
193 } else if (!payload_align) {
194 /*
195 * Simple L2 padding, only the header needs to be moved,
196 * the payload is already properly aligned.
197 */
198 skb_push(skb, header_align);
199 memmove(skb->data, skb->data + header_align, frame_length);
200 skbdesc->flags |= SKBDESC_L2_PADDED;
201 } else {
202 /*
203 *
204 * Complicated L2 padding, both header and payload need
205 * to be moved. By default we only move to the start
206 * of the buffer, so our header alignment needs to be
207 * increased if there is not enough room for the header
208 * to be moved.
209 */
210 if (payload_align > header_align)
211 header_align += 4;
212 192
213 skb_push(skb, header_align); 193 /* There is nothing to do if no alignment is needed */
214 memmove(skb->data, skb->data + header_align, header_length); 194 if (!header_align)
195 return;
196
197 /* Reserve the amount of space needed in front of the frame */
198 skb_push(skb, header_align);
199
200 /*
201 * Move the header.
202 */
203 memmove(skb->data, skb->data + header_align, header_length);
204
205 /* Move the payload, if present and if required */
206 if (payload_length && payload_align)
215 memmove(skb->data + header_length + l2pad, 207 memmove(skb->data + header_length + l2pad,
216 skb->data + header_length + l2pad + header_align, 208 skb->data + header_length + l2pad + payload_align,
217 frame_length - header_length); 209 payload_length);
218 skbdesc->flags |= SKBDESC_L2_PADDED; 210
219 } 211 /* Trim the skb to the correct size */
212 skb_trim(skb, header_length + l2pad + payload_length);
220} 213}
221 214
222void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length) 215void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
223{ 216{
224 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); 217 unsigned int l2pad = L2PAD_SIZE(header_length);
225 unsigned int l2pad = 4 - (header_length & 3);
226 218
227 if (!l2pad || (skbdesc->flags & SKBDESC_L2_PADDED)) 219 if (!l2pad)
228 return; 220 return;
229 221
230 memmove(skb->data + l2pad, skb->data, header_length); 222 memmove(skb->data + l2pad, skb->data, header_length);
@@ -345,7 +337,9 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
345 * Header and alignment information. 337 * Header and alignment information.
346 */ 338 */
347 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb); 339 txdesc->header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
348 txdesc->l2pad = ALIGN_SIZE(entry->skb, txdesc->header_length); 340 if (test_bit(DRIVER_REQUIRE_L2PAD, &rt2x00dev->flags) &&
341 (entry->skb->len > txdesc->header_length))
342 txdesc->l2pad = L2PAD_SIZE(txdesc->header_length);
349 343
350 /* 344 /*
351 * Check whether this frame is to be acked. 345 * Check whether this frame is to be acked.
@@ -386,10 +380,13 @@ static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
386 380
387 /* 381 /*
388 * Beacons and probe responses require the tsf timestamp 382 * Beacons and probe responses require the tsf timestamp
389 * to be inserted into the frame. 383 * to be inserted into the frame, except for a frame that has been injected
384 * through a monitor interface. This latter is needed for testing a
385 * monitor interface.
390 */ 386 */
391 if (ieee80211_is_beacon(hdr->frame_control) || 387 if ((ieee80211_is_beacon(hdr->frame_control) ||
392 ieee80211_is_probe_resp(hdr->frame_control)) 388 ieee80211_is_probe_resp(hdr->frame_control)) &&
389 (!(tx_info->flags & IEEE80211_TX_CTL_INJECTED)))
393 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags); 390 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
394 391
395 /* 392 /*
@@ -453,7 +450,8 @@ static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
453 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid); 450 rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
454} 451}
455 452
456int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb) 453int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
454 bool local)
457{ 455{
458 struct ieee80211_tx_info *tx_info; 456 struct ieee80211_tx_info *tx_info;
459 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); 457 struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
@@ -494,10 +492,13 @@ int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
494 skbdesc->tx_rate_idx = rate_idx; 492 skbdesc->tx_rate_idx = rate_idx;
495 skbdesc->tx_rate_flags = rate_flags; 493 skbdesc->tx_rate_flags = rate_flags;
496 494
495 if (local)
496 skbdesc->flags |= SKBDESC_NOT_MAC80211;
497
497 /* 498 /*
498 * When hardware encryption is supported, and this frame 499 * When hardware encryption is supported, and this frame
499 * is to be encrypted, we should strip the IV/EIV data from 500 * is to be encrypted, we should strip the IV/EIV data from
500 * the frame so we can provide it to the driver seperately. 501 * the frame so we can provide it to the driver separately.
501 */ 502 */
502 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) && 503 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
503 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) { 504 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h
index a5591fb2b191..c1e482bb37b3 100644
--- a/drivers/net/wireless/rt2x00/rt2x00queue.h
+++ b/drivers/net/wireless/rt2x00/rt2x00queue.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -92,14 +92,14 @@ enum data_queue_qid {
92 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX 92 * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
93 * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by 93 * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by
94 * mac80211 but was stripped for processing by the driver. 94 * mac80211 but was stripped for processing by the driver.
95 * @SKBDESC_L2_PADDED: Payload has been padded for 4-byte alignment, 95 * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211,
96 * the padded bytes are located between header and payload. 96 * don't try to pass it back.
97 */ 97 */
98enum skb_frame_desc_flags { 98enum skb_frame_desc_flags {
99 SKBDESC_DMA_MAPPED_RX = 1 << 0, 99 SKBDESC_DMA_MAPPED_RX = 1 << 0,
100 SKBDESC_DMA_MAPPED_TX = 1 << 1, 100 SKBDESC_DMA_MAPPED_TX = 1 << 1,
101 SKBDESC_IV_STRIPPED = 1 << 2, 101 SKBDESC_IV_STRIPPED = 1 << 2,
102 SKBDESC_L2_PADDED = 1 << 3 102 SKBDESC_NOT_MAC80211 = 1 << 3,
103}; 103};
104 104
105/** 105/**
diff --git a/drivers/net/wireless/rt2x00/rt2x00reg.h b/drivers/net/wireless/rt2x00/rt2x00reg.h
index 983e52e127a7..603bfc0adaa3 100644
--- a/drivers/net/wireless/rt2x00/rt2x00reg.h
+++ b/drivers/net/wireless/rt2x00/rt2x00reg.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
diff --git a/drivers/net/wireless/rt2x00/rt2x00soc.c b/drivers/net/wireless/rt2x00/rt2x00soc.c
new file mode 100644
index 000000000000..fc98063de71d
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2x00soc.c
@@ -0,0 +1,160 @@
1/*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 Copyright (C) 2004 - 2009 Felix Fietkau <nbd@openwrt.org>
4 <http://rt2x00.serialmonkey.com>
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the
18 Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22/*
23 Module: rt2x00soc
24 Abstract: rt2x00 generic soc device routines.
25 */
26
27#include <linux/bug.h>
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/platform_device.h>
31#include <linux/slab.h>
32
33#include "rt2x00.h"
34#include "rt2x00soc.h"
35
36static void rt2x00soc_free_reg(struct rt2x00_dev *rt2x00dev)
37{
38 kfree(rt2x00dev->rf);
39 rt2x00dev->rf = NULL;
40
41 kfree(rt2x00dev->eeprom);
42 rt2x00dev->eeprom = NULL;
43}
44
45static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev)
46{
47 struct platform_device *pdev = to_platform_device(rt2x00dev->dev);
48 struct resource *res;
49
50 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
51 if (!res)
52 return -ENODEV;
53
54 rt2x00dev->csr.base = (void __iomem *)KSEG1ADDR(res->start);
55 if (!rt2x00dev->csr.base)
56 goto exit;
57
58 rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
59 if (!rt2x00dev->eeprom)
60 goto exit;
61
62 rt2x00dev->rf = kzalloc(rt2x00dev->ops->rf_size, GFP_KERNEL);
63 if (!rt2x00dev->rf)
64 goto exit;
65
66 return 0;
67
68exit:
69 ERROR_PROBE("Failed to allocate registers.\n");
70 rt2x00soc_free_reg(rt2x00dev);
71
72 return -ENOMEM;
73}
74
75int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops)
76{
77 struct ieee80211_hw *hw;
78 struct rt2x00_dev *rt2x00dev;
79 int retval;
80
81 hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
82 if (!hw) {
83 ERROR_PROBE("Failed to allocate hardware.\n");
84 return -ENOMEM;
85 }
86
87 platform_set_drvdata(pdev, hw);
88
89 rt2x00dev = hw->priv;
90 rt2x00dev->dev = &pdev->dev;
91 rt2x00dev->ops = ops;
92 rt2x00dev->hw = hw;
93 rt2x00dev->irq = platform_get_irq(pdev, 0);
94 rt2x00dev->name = pdev->dev.driver->name;
95
96 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
97
98 retval = rt2x00soc_alloc_reg(rt2x00dev);
99 if (retval)
100 goto exit_free_device;
101
102 retval = rt2x00lib_probe_dev(rt2x00dev);
103 if (retval)
104 goto exit_free_reg;
105
106 return 0;
107
108exit_free_reg:
109 rt2x00soc_free_reg(rt2x00dev);
110
111exit_free_device:
112 ieee80211_free_hw(hw);
113
114 return retval;
115}
116EXPORT_SYMBOL_GPL(rt2x00soc_probe);
117
118int rt2x00soc_remove(struct platform_device *pdev)
119{
120 struct ieee80211_hw *hw = platform_get_drvdata(pdev);
121 struct rt2x00_dev *rt2x00dev = hw->priv;
122
123 /*
124 * Free all allocated data.
125 */
126 rt2x00lib_remove_dev(rt2x00dev);
127 rt2x00soc_free_reg(rt2x00dev);
128 ieee80211_free_hw(hw);
129
130 return 0;
131}
132EXPORT_SYMBOL_GPL(rt2x00soc_remove);
133
134#ifdef CONFIG_PM
135int rt2x00soc_suspend(struct platform_device *pdev, pm_message_t state)
136{
137 struct ieee80211_hw *hw = platform_get_drvdata(pdev);
138 struct rt2x00_dev *rt2x00dev = hw->priv;
139
140 return rt2x00lib_suspend(rt2x00dev, state);
141}
142EXPORT_SYMBOL_GPL(rt2x00soc_suspend);
143
144int rt2x00soc_resume(struct platform_device *pdev)
145{
146 struct ieee80211_hw *hw = platform_get_drvdata(pdev);
147 struct rt2x00_dev *rt2x00dev = hw->priv;
148
149 return rt2x00lib_resume(rt2x00dev);
150}
151EXPORT_SYMBOL_GPL(rt2x00soc_resume);
152#endif /* CONFIG_PM */
153
154/*
155 * rt2x00soc module information.
156 */
157MODULE_AUTHOR(DRV_PROJECT);
158MODULE_VERSION(DRV_VERSION);
159MODULE_DESCRIPTION("rt2x00 soc library");
160MODULE_LICENSE("GPL");
diff --git a/drivers/net/wireless/rt2x00/rt2x00soc.h b/drivers/net/wireless/rt2x00/rt2x00soc.h
new file mode 100644
index 000000000000..474cbfc1efc7
--- /dev/null
+++ b/drivers/net/wireless/rt2x00/rt2x00soc.h
@@ -0,0 +1,42 @@
1/*
2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com>
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19 */
20
21/*
22 Module: rt2x00soc
23 Abstract: Data structures for the rt2x00soc module.
24 */
25
26#ifndef RT2X00SOC_H
27#define RT2X00SOC_H
28
29/*
30 * SoC driver handlers.
31 */
32int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops);
33int rt2x00soc_remove(struct platform_device *pdev);
34#ifdef CONFIG_PM
35int rt2x00soc_suspend(struct platform_device *pdev, pm_message_t state);
36int rt2x00soc_resume(struct platform_device *pdev);
37#else
38#define rt2x00soc_suspend NULL
39#define rt2x00soc_resume NULL
40#endif /* CONFIG_PM */
41
42#endif /* RT2X00SOC_H */
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index f02b48a90593..f9a7f8b17411 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -25,6 +25,7 @@
25 25
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/slab.h>
28#include <linux/usb.h> 29#include <linux/usb.h>
29#include <linux/bug.h> 30#include <linux/bug.h>
30 31
@@ -160,7 +161,7 @@ EXPORT_SYMBOL_GPL(rt2x00usb_vendor_request_large_buff);
160 161
161int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev, 162int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
162 const unsigned int offset, 163 const unsigned int offset,
163 struct rt2x00_field32 field, 164 const struct rt2x00_field32 field,
164 u32 *reg) 165 u32 *reg)
165{ 166{
166 unsigned int i; 167 unsigned int i;
@@ -653,6 +654,8 @@ int rt2x00usb_probe(struct usb_interface *usb_intf,
653 rt2x00dev->ops = ops; 654 rt2x00dev->ops = ops;
654 rt2x00dev->hw = hw; 655 rt2x00dev->hw = hw;
655 656
657 rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
658
656 retval = rt2x00usb_alloc_reg(rt2x00dev); 659 retval = rt2x00usb_alloc_reg(rt2x00dev);
657 if (retval) 660 if (retval)
658 goto exit_free_device; 661 goto exit_free_device;
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h
index bd2d59c85f1b..3da6841b5d42 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.h
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -26,6 +26,8 @@
26#ifndef RT2X00USB_H 26#ifndef RT2X00USB_H
27#define RT2X00USB_H 27#define RT2X00USB_H
28 28
29#include <linux/usb.h>
30
29#define to_usb_device_intf(d) \ 31#define to_usb_device_intf(d) \
30({ \ 32({ \
31 struct usb_interface *intf = to_usb_interface(d); \ 33 struct usb_interface *intf = to_usb_interface(d); \
@@ -39,17 +41,11 @@
39#define USB_DEVICE_DATA(__ops) .driver_info = (kernel_ulong_t)(__ops) 41#define USB_DEVICE_DATA(__ops) .driver_info = (kernel_ulong_t)(__ops)
40 42
41/* 43/*
42 * Register defines.
43 * Some registers require multiple attempts before success,
44 * in those cases REGISTER_BUSY_COUNT attempts should be
45 * taken with a REGISTER_BUSY_DELAY interval.
46 * For USB vendor requests we need to pass a timeout 44 * For USB vendor requests we need to pass a timeout
47 * time in ms, for this we use the REGISTER_TIMEOUT, 45 * time in ms, for this we use the REGISTER_TIMEOUT,
48 * however when loading firmware a higher value is 46 * however when loading firmware a higher value is
49 * required. In that case we use the REGISTER_TIMEOUT_FIRMWARE. 47 * required. In that case we use the REGISTER_TIMEOUT_FIRMWARE.
50 */ 48 */
51#define REGISTER_BUSY_COUNT 5
52#define REGISTER_BUSY_DELAY 100
53#define REGISTER_TIMEOUT 500 49#define REGISTER_TIMEOUT 500
54#define REGISTER_TIMEOUT_FIRMWARE 1000 50#define REGISTER_TIMEOUT_FIRMWARE 1000
55 51
@@ -232,7 +228,7 @@ static inline int rt2x00usb_eeprom_read(struct rt2x00_dev *rt2x00dev,
232} 228}
233 229
234/** 230/**
235 * rt2x00usb_regbusy_read - Read 32bit register word 231 * rt2x00usb_register_read - Read 32bit register word
236 * @rt2x00dev: Device pointer, see &struct rt2x00_dev. 232 * @rt2x00dev: Device pointer, see &struct rt2x00_dev.
237 * @offset: Register offset 233 * @offset: Register offset
238 * @value: Pointer to where register contents should be stored 234 * @value: Pointer to where register contents should be stored
@@ -340,12 +336,13 @@ static inline void rt2x00usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
340 * through rt2x00usb_vendor_request_buff(). 336 * through rt2x00usb_vendor_request_buff().
341 */ 337 */
342static inline void rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, 338static inline void rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
343 const unsigned int offset, 339 const unsigned int offset,
344 void *value, const u32 length) 340 const void *value,
341 const u32 length)
345{ 342{
346 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, 343 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
347 USB_VENDOR_REQUEST_OUT, offset, 344 USB_VENDOR_REQUEST_OUT, offset,
348 value, length, 345 (void *)value, length,
349 REGISTER_TIMEOUT32(length)); 346 REGISTER_TIMEOUT32(length));
350} 347}
351 348
@@ -364,7 +361,7 @@ static inline void rt2x00usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
364 */ 361 */
365int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev, 362int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
366 const unsigned int offset, 363 const unsigned int offset,
367 struct rt2x00_field32 field, 364 const struct rt2x00_field32 field,
368 u32 *reg); 365 u32 *reg);
369 366
370/* 367/*
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index b20e3eac9d67..432e75f960b7 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -30,6 +30,7 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/slab.h>
33#include <linux/pci.h> 34#include <linux/pci.h>
34#include <linux/eeprom_93cx6.h> 35#include <linux/eeprom_93cx6.h>
35 36
@@ -51,7 +52,7 @@ MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
51 * These indirect registers work with busy bits, 52 * These indirect registers work with busy bits,
52 * and we will try maximal REGISTER_BUSY_COUNT times to access 53 * and we will try maximal REGISTER_BUSY_COUNT times to access
53 * the register while taking a REGISTER_BUSY_DELAY us delay 54 * the register while taking a REGISTER_BUSY_DELAY us delay
54 * between each attampt. When the busy bit is still set at that time, 55 * between each attempt. When the busy bit is still set at that time,
55 * the access attempt is considered to have failed, 56 * the access attempt is considered to have failed,
56 * and we will print an error. 57 * and we will print an error.
57 */ 58 */
@@ -386,7 +387,7 @@ static int rt61pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
386 * The driver does not support the IV/EIV generation 387 * The driver does not support the IV/EIV generation
387 * in hardware. However it doesn't support the IV/EIV 388 * in hardware. However it doesn't support the IV/EIV
388 * inside the ieee80211 frame either, but requires it 389 * inside the ieee80211 frame either, but requires it
389 * to be provided seperately for the descriptor. 390 * to be provided separately for the descriptor.
390 * rt2x00lib will cut the IV/EIV data out of all frames 391 * rt2x00lib will cut the IV/EIV data out of all frames
391 * given to us by mac80211, but we must tell mac80211 392 * given to us by mac80211, but we must tell mac80211
392 * to generate the IV/EIV data. 393 * to generate the IV/EIV data.
@@ -397,7 +398,7 @@ static int rt61pci_config_shared_key(struct rt2x00_dev *rt2x00dev,
397 /* 398 /*
398 * SEC_CSR0 contains only single-bit fields to indicate 399 * SEC_CSR0 contains only single-bit fields to indicate
399 * a particular key is valid. Because using the FIELD32() 400 * a particular key is valid. Because using the FIELD32()
400 * defines directly will cause a lot of overhead we use 401 * defines directly will cause a lot of overhead, we use
401 * a calculation to determine the correct bit directly. 402 * a calculation to determine the correct bit directly.
402 */ 403 */
403 mask = 1 << key->hw_key_idx; 404 mask = 1 << key->hw_key_idx;
@@ -425,11 +426,11 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
425 /* 426 /*
426 * rt2x00lib can't determine the correct free 427 * rt2x00lib can't determine the correct free
427 * key_idx for pairwise keys. We have 2 registers 428 * key_idx for pairwise keys. We have 2 registers
428 * with key valid bits. The goal is simple, read 429 * with key valid bits. The goal is simple: read
429 * the first register, if that is full move to 430 * the first register. If that is full, move to
430 * the next register. 431 * the next register.
431 * When both registers are full, we drop the key, 432 * When both registers are full, we drop the key.
432 * otherwise we use the first invalid entry. 433 * Otherwise, we use the first invalid entry.
433 */ 434 */
434 rt2x00pci_register_read(rt2x00dev, SEC_CSR2, &reg); 435 rt2x00pci_register_read(rt2x00dev, SEC_CSR2, &reg);
435 if (reg && reg == ~0) { 436 if (reg && reg == ~0) {
@@ -464,8 +465,8 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
464 &addr_entry, sizeof(addr_entry)); 465 &addr_entry, sizeof(addr_entry));
465 466
466 /* 467 /*
467 * Enable pairwise lookup table for given BSS idx, 468 * Enable pairwise lookup table for given BSS idx.
468 * without this received frames will not be decrypted 469 * Without this, received frames will not be decrypted
469 * by the hardware. 470 * by the hardware.
470 */ 471 */
471 rt2x00pci_register_read(rt2x00dev, SEC_CSR4, &reg); 472 rt2x00pci_register_read(rt2x00dev, SEC_CSR4, &reg);
@@ -476,7 +477,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
476 * The driver does not support the IV/EIV generation 477 * The driver does not support the IV/EIV generation
477 * in hardware. However it doesn't support the IV/EIV 478 * in hardware. However it doesn't support the IV/EIV
478 * inside the ieee80211 frame either, but requires it 479 * inside the ieee80211 frame either, but requires it
479 * to be provided seperately for the descriptor. 480 * to be provided separately for the descriptor.
480 * rt2x00lib will cut the IV/EIV data out of all frames 481 * rt2x00lib will cut the IV/EIV data out of all frames
481 * given to us by mac80211, but we must tell mac80211 482 * given to us by mac80211, but we must tell mac80211
482 * to generate the IV/EIV data. 483 * to generate the IV/EIV data.
@@ -487,7 +488,7 @@ static int rt61pci_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
487 /* 488 /*
488 * SEC_CSR2 and SEC_CSR3 contain only single-bit fields to indicate 489 * SEC_CSR2 and SEC_CSR3 contain only single-bit fields to indicate
489 * a particular key is valid. Because using the FIELD32() 490 * a particular key is valid. Because using the FIELD32()
490 * defines directly will cause a lot of overhead we use 491 * defines directly will cause a lot of overhead, we use
491 * a calculation to determine the correct bit directly. 492 * a calculation to determine the correct bit directly.
492 */ 493 */
493 if (key->hw_key_idx < 32) { 494 if (key->hw_key_idx < 32) {
@@ -556,7 +557,7 @@ static void rt61pci_config_intf(struct rt2x00_dev *rt2x00dev,
556 if (flags & CONFIG_UPDATE_TYPE) { 557 if (flags & CONFIG_UPDATE_TYPE) {
557 /* 558 /*
558 * Clear current synchronisation setup. 559 * Clear current synchronisation setup.
559 * For the Beacon base registers we only need to clear 560 * For the Beacon base registers, we only need to clear
560 * the first byte since that byte contains the VALID and OWNER 561 * the first byte since that byte contains the VALID and OWNER
561 * bits which (when set to 0) will invalidate the entire beacon. 562 * bits which (when set to 0) will invalidate the entire beacon.
562 */ 563 */
@@ -637,8 +638,7 @@ static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
637 rt61pci_bbp_read(rt2x00dev, 4, &r4); 638 rt61pci_bbp_read(rt2x00dev, 4, &r4);
638 rt61pci_bbp_read(rt2x00dev, 77, &r77); 639 rt61pci_bbp_read(rt2x00dev, 77, &r77);
639 640
640 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 641 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF5325));
641 rt2x00_rf(&rt2x00dev->chip, RF5325));
642 642
643 /* 643 /*
644 * Configure the RX antenna. 644 * Configure the RX antenna.
@@ -684,8 +684,7 @@ static void rt61pci_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
684 rt61pci_bbp_read(rt2x00dev, 4, &r4); 684 rt61pci_bbp_read(rt2x00dev, 4, &r4);
685 rt61pci_bbp_read(rt2x00dev, 77, &r77); 685 rt61pci_bbp_read(rt2x00dev, 77, &r77);
686 686
687 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 687 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, rt2x00_rf(rt2x00dev, RF2529));
688 rt2x00_rf(&rt2x00dev->chip, RF2529));
689 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 688 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
690 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)); 689 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
691 690
@@ -833,12 +832,11 @@ static void rt61pci_config_ant(struct rt2x00_dev *rt2x00dev,
833 832
834 rt2x00pci_register_write(rt2x00dev, PHY_CSR0, reg); 833 rt2x00pci_register_write(rt2x00dev, PHY_CSR0, reg);
835 834
836 if (rt2x00_rf(&rt2x00dev->chip, RF5225) || 835 if (rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF5325))
837 rt2x00_rf(&rt2x00dev->chip, RF5325))
838 rt61pci_config_antenna_5x(rt2x00dev, ant); 836 rt61pci_config_antenna_5x(rt2x00dev, ant);
839 else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) 837 else if (rt2x00_rf(rt2x00dev, RF2527))
840 rt61pci_config_antenna_2x(rt2x00dev, ant); 838 rt61pci_config_antenna_2x(rt2x00dev, ant);
841 else if (rt2x00_rf(&rt2x00dev->chip, RF2529)) { 839 else if (rt2x00_rf(rt2x00dev, RF2529)) {
842 if (test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) 840 if (test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags))
843 rt61pci_config_antenna_2x(rt2x00dev, ant); 841 rt61pci_config_antenna_2x(rt2x00dev, ant);
844 else 842 else
@@ -879,8 +877,7 @@ static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
879 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 877 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
880 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset); 878 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
881 879
882 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) || 880 smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527));
883 rt2x00_rf(&rt2x00dev->chip, RF2527));
884 881
885 rt61pci_bbp_read(rt2x00dev, 3, &r3); 882 rt61pci_bbp_read(rt2x00dev, 3, &r3);
886 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart); 883 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
@@ -1135,16 +1132,18 @@ dynamic_cca_tune:
1135 */ 1132 */
1136static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev) 1133static char *rt61pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
1137{ 1134{
1135 u16 chip;
1138 char *fw_name; 1136 char *fw_name;
1139 1137
1140 switch (rt2x00dev->chip.rt) { 1138 pci_read_config_word(to_pci_dev(rt2x00dev->dev), PCI_DEVICE_ID, &chip);
1141 case RT2561: 1139 switch (chip) {
1140 case RT2561_PCI_ID:
1142 fw_name = FIRMWARE_RT2561; 1141 fw_name = FIRMWARE_RT2561;
1143 break; 1142 break;
1144 case RT2561s: 1143 case RT2561s_PCI_ID:
1145 fw_name = FIRMWARE_RT2561s; 1144 fw_name = FIRMWARE_RT2561s;
1146 break; 1145 break;
1147 case RT2661: 1146 case RT2661_PCI_ID:
1148 fw_name = FIRMWARE_RT2661; 1147 fw_name = FIRMWARE_RT2661;
1149 break; 1148 break;
1150 default: 1149 default:
@@ -1168,8 +1167,8 @@ static int rt61pci_check_firmware(struct rt2x00_dev *rt2x00dev,
1168 return FW_BAD_LENGTH; 1167 return FW_BAD_LENGTH;
1169 1168
1170 /* 1169 /*
1171 * The last 2 bytes in the firmware array are the crc checksum itself, 1170 * The last 2 bytes in the firmware array are the crc checksum itself.
1172 * this means that we should never pass those 2 bytes to the crc 1171 * This means that we should never pass those 2 bytes to the crc
1173 * algorithm. 1172 * algorithm.
1174 */ 1173 */
1175 fw_crc = (data[len - 2] << 8 | data[len - 1]); 1174 fw_crc = (data[len - 2] << 8 | data[len - 1]);
@@ -1986,7 +1985,7 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry,
1986 1985
1987 /* 1986 /*
1988 * Hardware has stripped IV/EIV data from 802.11 frame during 1987 * Hardware has stripped IV/EIV data from 802.11 frame during
1989 * decryption. It has provided the data seperately but rt2x00lib 1988 * decryption. It has provided the data separately but rt2x00lib
1990 * should decide if it should be reinserted. 1989 * should decide if it should be reinserted.
1991 */ 1990 */
1992 rxdesc->flags |= RX_FLAG_IV_STRIPPED; 1991 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
@@ -2042,7 +2041,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
2042 * During each loop we will compare the freshly read 2041 * During each loop we will compare the freshly read
2043 * STA_CSR4 register value with the value read from 2042 * STA_CSR4 register value with the value read from
2044 * the previous loop. If the 2 values are equal then 2043 * the previous loop. If the 2 values are equal then
2045 * we should stop processing because the chance it 2044 * we should stop processing because the chance is
2046 * quite big that the device has been unplugged and 2045 * quite big that the device has been unplugged and
2047 * we risk going into an endless loop. 2046 * we risk going into an endless loop.
2048 */ 2047 */
@@ -2299,12 +2298,13 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2299 */ 2298 */
2300 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 2299 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
2301 rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg); 2300 rt2x00pci_register_read(rt2x00dev, MAC_CSR0, &reg);
2302 rt2x00_set_chip_rf(rt2x00dev, value, reg); 2301 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
2302 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
2303 2303
2304 if (!rt2x00_rf(&rt2x00dev->chip, RF5225) && 2304 if (!rt2x00_rf(rt2x00dev, RF5225) &&
2305 !rt2x00_rf(&rt2x00dev->chip, RF5325) && 2305 !rt2x00_rf(rt2x00dev, RF5325) &&
2306 !rt2x00_rf(&rt2x00dev->chip, RF2527) && 2306 !rt2x00_rf(rt2x00dev, RF2527) &&
2307 !rt2x00_rf(&rt2x00dev->chip, RF2529)) { 2307 !rt2x00_rf(rt2x00dev, RF2529)) {
2308 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 2308 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
2309 return -ENODEV; 2309 return -ENODEV;
2310 } 2310 }
@@ -2330,7 +2330,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2330 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags); 2330 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
2331 2331
2332 /* 2332 /*
2333 * Detect if this device has an hardware controlled radio. 2333 * Detect if this device has a hardware controlled radio.
2334 */ 2334 */
2335 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO)) 2335 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_HARDWARE_RADIO))
2336 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags); 2336 __set_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags);
@@ -2355,11 +2355,11 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev)
2355 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags); 2355 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
2356 2356
2357 /* 2357 /*
2358 * When working with a RF2529 chip without double antenna 2358 * When working with a RF2529 chip without double antenna,
2359 * the antenna settings should be gathered from the NIC 2359 * the antenna settings should be gathered from the NIC
2360 * eeprom word. 2360 * eeprom word.
2361 */ 2361 */
2362 if (rt2x00_rf(&rt2x00dev->chip, RF2529) && 2362 if (rt2x00_rf(rt2x00dev, RF2529) &&
2363 !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) { 2363 !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) {
2364 rt2x00dev->default_ant.rx = 2364 rt2x00dev->default_ant.rx =
2365 ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED); 2365 ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED);
@@ -2538,6 +2538,11 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2538 unsigned int i; 2538 unsigned int i;
2539 2539
2540 /* 2540 /*
2541 * Disable powersaving as default.
2542 */
2543 rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
2544
2545 /*
2541 * Initialize all hw fields. 2546 * Initialize all hw fields.
2542 */ 2547 */
2543 rt2x00dev->hw->flags = 2548 rt2x00dev->hw->flags =
@@ -2545,7 +2550,6 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2545 IEEE80211_HW_SIGNAL_DBM | 2550 IEEE80211_HW_SIGNAL_DBM |
2546 IEEE80211_HW_SUPPORTS_PS | 2551 IEEE80211_HW_SUPPORTS_PS |
2547 IEEE80211_HW_PS_NULLFUNC_STACK; 2552 IEEE80211_HW_PS_NULLFUNC_STACK;
2548 rt2x00dev->hw->extra_tx_headroom = 0;
2549 2553
2550 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 2554 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
2551 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 2555 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -2566,8 +2570,7 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2566 spec->channels = rf_vals_seq; 2570 spec->channels = rf_vals_seq;
2567 } 2571 }
2568 2572
2569 if (rt2x00_rf(&rt2x00dev->chip, RF5225) || 2573 if (rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF5325)) {
2570 rt2x00_rf(&rt2x00dev->chip, RF5325)) {
2571 spec->supported_bands |= SUPPORT_BAND_5GHZ; 2574 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2572 spec->num_channels = ARRAY_SIZE(rf_vals_seq); 2575 spec->num_channels = ARRAY_SIZE(rf_vals_seq);
2573 } 2576 }
@@ -2668,7 +2671,7 @@ static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2668 2671
2669 /* 2672 /*
2670 * We only need to perform additional register initialization 2673 * We only need to perform additional register initialization
2671 * for WMM queues/ 2674 * for WMM queues.
2672 */ 2675 */
2673 if (queue_idx >= 4) 2676 if (queue_idx >= 4)
2674 return 0; 2677 return 0;
@@ -2730,7 +2733,6 @@ static const struct ieee80211_ops rt61pci_mac80211_ops = {
2730 .get_stats = rt2x00mac_get_stats, 2733 .get_stats = rt2x00mac_get_stats,
2731 .bss_info_changed = rt2x00mac_bss_info_changed, 2734 .bss_info_changed = rt2x00mac_bss_info_changed,
2732 .conf_tx = rt61pci_conf_tx, 2735 .conf_tx = rt61pci_conf_tx,
2733 .get_tx_stats = rt2x00mac_get_tx_stats,
2734 .get_tsf = rt61pci_get_tsf, 2736 .get_tsf = rt61pci_get_tsf,
2735 .rfkill_poll = rt2x00mac_rfkill_poll, 2737 .rfkill_poll = rt2x00mac_rfkill_poll,
2736}; 2738};
@@ -2787,26 +2789,27 @@ static const struct data_queue_desc rt61pci_queue_bcn = {
2787}; 2789};
2788 2790
2789static const struct rt2x00_ops rt61pci_ops = { 2791static const struct rt2x00_ops rt61pci_ops = {
2790 .name = KBUILD_MODNAME, 2792 .name = KBUILD_MODNAME,
2791 .max_sta_intf = 1, 2793 .max_sta_intf = 1,
2792 .max_ap_intf = 4, 2794 .max_ap_intf = 4,
2793 .eeprom_size = EEPROM_SIZE, 2795 .eeprom_size = EEPROM_SIZE,
2794 .rf_size = RF_SIZE, 2796 .rf_size = RF_SIZE,
2795 .tx_queues = NUM_TX_QUEUES, 2797 .tx_queues = NUM_TX_QUEUES,
2796 .rx = &rt61pci_queue_rx, 2798 .extra_tx_headroom = 0,
2797 .tx = &rt61pci_queue_tx, 2799 .rx = &rt61pci_queue_rx,
2798 .bcn = &rt61pci_queue_bcn, 2800 .tx = &rt61pci_queue_tx,
2799 .lib = &rt61pci_rt2x00_ops, 2801 .bcn = &rt61pci_queue_bcn,
2800 .hw = &rt61pci_mac80211_ops, 2802 .lib = &rt61pci_rt2x00_ops,
2803 .hw = &rt61pci_mac80211_ops,
2801#ifdef CONFIG_RT2X00_LIB_DEBUGFS 2804#ifdef CONFIG_RT2X00_LIB_DEBUGFS
2802 .debugfs = &rt61pci_rt2x00debug, 2805 .debugfs = &rt61pci_rt2x00debug,
2803#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 2806#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2804}; 2807};
2805 2808
2806/* 2809/*
2807 * RT61pci module information. 2810 * RT61pci module information.
2808 */ 2811 */
2809static struct pci_device_id rt61pci_device_table[] = { 2812static DEFINE_PCI_DEVICE_TABLE(rt61pci_device_table) = {
2810 /* RT2561s */ 2813 /* RT2561s */
2811 { PCI_DEVICE(0x1814, 0x0301), PCI_DEVICE_DATA(&rt61pci_ops) }, 2814 { PCI_DEVICE(0x1814, 0x0301), PCI_DEVICE_DATA(&rt61pci_ops) },
2812 /* RT2561 v2 */ 2815 /* RT2561 v2 */
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 93eb699165cc..df80f1af22a4 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -28,6 +28,13 @@
28#define RT61PCI_H 28#define RT61PCI_H
29 29
30/* 30/*
31 * RT chip PCI IDs.
32 */
33#define RT2561s_PCI_ID 0x0301
34#define RT2561_PCI_ID 0x0302
35#define RT2661_PCI_ID 0x0401
36
37/*
31 * RF chip defines. 38 * RF chip defines.
32 */ 39 */
33#define RF5225 0x0001 40#define RF5225 0x0001
@@ -37,7 +44,7 @@
37 44
38/* 45/*
39 * Signal information. 46 * Signal information.
40 * Defaul offset is required for RSSI <-> dBm conversion. 47 * Default offset is required for RSSI <-> dBm conversion.
41 */ 48 */
42#define DEFAULT_RSSI_OFFSET 120 49#define DEFAULT_RSSI_OFFSET 120
43 50
@@ -225,6 +232,8 @@ struct hw_pairwise_ta_entry {
225 * MAC_CSR0: ASIC revision number. 232 * MAC_CSR0: ASIC revision number.
226 */ 233 */
227#define MAC_CSR0 0x3000 234#define MAC_CSR0 0x3000
235#define MAC_CSR0_REVISION FIELD32(0x0000000f)
236#define MAC_CSR0_CHIPSET FIELD32(0x000ffff0)
228 237
229/* 238/*
230 * MAC_CSR1: System control register. 239 * MAC_CSR1: System control register.
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 14e7bb210075..bb58d797fb72 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -30,6 +30,7 @@
30#include <linux/init.h> 30#include <linux/init.h>
31#include <linux/kernel.h> 31#include <linux/kernel.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/slab.h>
33#include <linux/usb.h> 34#include <linux/usb.h>
34 35
35#include "rt2x00.h" 36#include "rt2x00.h"
@@ -136,8 +137,8 @@ static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
136 * all others contain 20 bits. 137 * all others contain 20 bits.
137 */ 138 */
138 rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS, 139 rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
139 20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) || 140 20 + (rt2x00_rf(rt2x00dev, RF5225) ||
140 rt2x00_rf(&rt2x00dev->chip, RF2527))); 141 rt2x00_rf(rt2x00dev, RF2527)));
141 rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0); 142 rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
142 rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1); 143 rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
143 144
@@ -339,7 +340,7 @@ static int rt73usb_config_shared_key(struct rt2x00_dev *rt2x00dev,
339 * The driver does not support the IV/EIV generation 340 * The driver does not support the IV/EIV generation
340 * in hardware. However it doesn't support the IV/EIV 341 * in hardware. However it doesn't support the IV/EIV
341 * inside the ieee80211 frame either, but requires it 342 * inside the ieee80211 frame either, but requires it
342 * to be provided seperately for the descriptor. 343 * to be provided separately for the descriptor.
343 * rt2x00lib will cut the IV/EIV data out of all frames 344 * rt2x00lib will cut the IV/EIV data out of all frames
344 * given to us by mac80211, but we must tell mac80211 345 * given to us by mac80211, but we must tell mac80211
345 * to generate the IV/EIV data. 346 * to generate the IV/EIV data.
@@ -439,7 +440,7 @@ static int rt73usb_config_pairwise_key(struct rt2x00_dev *rt2x00dev,
439 * The driver does not support the IV/EIV generation 440 * The driver does not support the IV/EIV generation
440 * in hardware. However it doesn't support the IV/EIV 441 * in hardware. However it doesn't support the IV/EIV
441 * inside the ieee80211 frame either, but requires it 442 * inside the ieee80211 frame either, but requires it
442 * to be provided seperately for the descriptor. 443 * to be provided separately for the descriptor.
443 * rt2x00lib will cut the IV/EIV data out of all frames 444 * rt2x00lib will cut the IV/EIV data out of all frames
444 * given to us by mac80211, but we must tell mac80211 445 * given to us by mac80211, but we must tell mac80211
445 * to generate the IV/EIV data. 446 * to generate the IV/EIV data.
@@ -741,11 +742,9 @@ static void rt73usb_config_ant(struct rt2x00_dev *rt2x00dev,
741 742
742 rt2x00usb_register_write(rt2x00dev, PHY_CSR0, reg); 743 rt2x00usb_register_write(rt2x00dev, PHY_CSR0, reg);
743 744
744 if (rt2x00_rf(&rt2x00dev->chip, RF5226) || 745 if (rt2x00_rf(rt2x00dev, RF5226) || rt2x00_rf(rt2x00dev, RF5225))
745 rt2x00_rf(&rt2x00dev->chip, RF5225))
746 rt73usb_config_antenna_5x(rt2x00dev, ant); 746 rt73usb_config_antenna_5x(rt2x00dev, ant);
747 else if (rt2x00_rf(&rt2x00dev->chip, RF2528) || 747 else if (rt2x00_rf(rt2x00dev, RF2528) || rt2x00_rf(rt2x00dev, RF2527))
748 rt2x00_rf(&rt2x00dev->chip, RF2527))
749 rt73usb_config_antenna_2x(rt2x00dev, ant); 748 rt73usb_config_antenna_2x(rt2x00dev, ant);
750} 749}
751 750
@@ -779,8 +778,7 @@ static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
779 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower)); 778 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
780 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset); 779 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
781 780
782 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) || 781 smart = !(rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527));
783 rt2x00_rf(&rt2x00dev->chip, RF2527));
784 782
785 rt73usb_bbp_read(rt2x00dev, 3, &r3); 783 rt73usb_bbp_read(rt2x00dev, 3, &r3);
786 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart); 784 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
@@ -1210,8 +1208,7 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
1210 rt2x00usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000); 1208 rt2x00usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1211 1209
1212 reg = 0x000023b0; 1210 reg = 0x000023b0;
1213 if (rt2x00_rf(&rt2x00dev->chip, RF5225) || 1211 if (rt2x00_rf(rt2x00dev, RF5225) || rt2x00_rf(rt2x00dev, RF2527))
1214 rt2x00_rf(&rt2x00dev->chip, RF2527))
1215 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1); 1212 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1216 rt2x00usb_register_write(rt2x00dev, PHY_CSR1, reg); 1213 rt2x00usb_register_write(rt2x00dev, PHY_CSR1, reg);
1217 1214
@@ -1665,7 +1662,7 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry,
1665 1662
1666 /* 1663 /*
1667 * Hardware has stripped IV/EIV data from 802.11 frame during 1664 * Hardware has stripped IV/EIV data from 802.11 frame during
1668 * decryption. It has provided the data seperately but rt2x00lib 1665 * decryption. It has provided the data separately but rt2x00lib
1669 * should decide if it should be reinserted. 1666 * should decide if it should be reinserted.
1670 */ 1667 */
1671 rxdesc->flags |= RX_FLAG_IV_STRIPPED; 1668 rxdesc->flags |= RX_FLAG_IV_STRIPPED;
@@ -1824,18 +1821,18 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1824 */ 1821 */
1825 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); 1822 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1826 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1823 rt2x00usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1827 rt2x00_set_chip(rt2x00dev, RT2571, value, reg); 1824 rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET),
1825 value, rt2x00_get_field32(reg, MAC_CSR0_REVISION));
1828 1826
1829 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0x25730) || 1827 if (!rt2x00_rt(rt2x00dev, RT2573) || (rt2x00_rev(rt2x00dev) == 0)) {
1830 rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
1831 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1828 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1832 return -ENODEV; 1829 return -ENODEV;
1833 } 1830 }
1834 1831
1835 if (!rt2x00_rf(&rt2x00dev->chip, RF5226) && 1832 if (!rt2x00_rf(rt2x00dev, RF5226) &&
1836 !rt2x00_rf(&rt2x00dev->chip, RF2528) && 1833 !rt2x00_rf(rt2x00dev, RF2528) &&
1837 !rt2x00_rf(&rt2x00dev->chip, RF5225) && 1834 !rt2x00_rf(rt2x00dev, RF5225) &&
1838 !rt2x00_rf(&rt2x00dev->chip, RF2527)) { 1835 !rt2x00_rf(rt2x00dev, RF2527)) {
1839 ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); 1836 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1840 return -ENODEV; 1837 return -ENODEV;
1841 } 1838 }
@@ -2068,7 +2065,6 @@ static int rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2068 IEEE80211_HW_SIGNAL_DBM | 2065 IEEE80211_HW_SIGNAL_DBM |
2069 IEEE80211_HW_SUPPORTS_PS | 2066 IEEE80211_HW_SUPPORTS_PS |
2070 IEEE80211_HW_PS_NULLFUNC_STACK; 2067 IEEE80211_HW_PS_NULLFUNC_STACK;
2071 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
2072 2068
2073 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); 2069 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
2074 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, 2070 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
@@ -2081,17 +2077,17 @@ static int rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
2081 spec->supported_bands = SUPPORT_BAND_2GHZ; 2077 spec->supported_bands = SUPPORT_BAND_2GHZ;
2082 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM; 2078 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
2083 2079
2084 if (rt2x00_rf(&rt2x00dev->chip, RF2528)) { 2080 if (rt2x00_rf(rt2x00dev, RF2528)) {
2085 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528); 2081 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
2086 spec->channels = rf_vals_bg_2528; 2082 spec->channels = rf_vals_bg_2528;
2087 } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) { 2083 } else if (rt2x00_rf(rt2x00dev, RF5226)) {
2088 spec->supported_bands |= SUPPORT_BAND_5GHZ; 2084 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2089 spec->num_channels = ARRAY_SIZE(rf_vals_5226); 2085 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
2090 spec->channels = rf_vals_5226; 2086 spec->channels = rf_vals_5226;
2091 } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) { 2087 } else if (rt2x00_rf(rt2x00dev, RF2527)) {
2092 spec->num_channels = 14; 2088 spec->num_channels = 14;
2093 spec->channels = rf_vals_5225_2527; 2089 spec->channels = rf_vals_5225_2527;
2094 } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) { 2090 } else if (rt2x00_rf(rt2x00dev, RF5225)) {
2095 spec->supported_bands |= SUPPORT_BAND_5GHZ; 2091 spec->supported_bands |= SUPPORT_BAND_5GHZ;
2096 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527); 2092 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
2097 spec->channels = rf_vals_5225_2527; 2093 spec->channels = rf_vals_5225_2527;
@@ -2249,7 +2245,6 @@ static const struct ieee80211_ops rt73usb_mac80211_ops = {
2249 .get_stats = rt2x00mac_get_stats, 2245 .get_stats = rt2x00mac_get_stats,
2250 .bss_info_changed = rt2x00mac_bss_info_changed, 2246 .bss_info_changed = rt2x00mac_bss_info_changed,
2251 .conf_tx = rt73usb_conf_tx, 2247 .conf_tx = rt73usb_conf_tx,
2252 .get_tx_stats = rt2x00mac_get_tx_stats,
2253 .get_tsf = rt73usb_get_tsf, 2248 .get_tsf = rt73usb_get_tsf,
2254 .rfkill_poll = rt2x00mac_rfkill_poll, 2249 .rfkill_poll = rt2x00mac_rfkill_poll,
2255}; 2250};
@@ -2305,19 +2300,20 @@ static const struct data_queue_desc rt73usb_queue_bcn = {
2305}; 2300};
2306 2301
2307static const struct rt2x00_ops rt73usb_ops = { 2302static const struct rt2x00_ops rt73usb_ops = {
2308 .name = KBUILD_MODNAME, 2303 .name = KBUILD_MODNAME,
2309 .max_sta_intf = 1, 2304 .max_sta_intf = 1,
2310 .max_ap_intf = 4, 2305 .max_ap_intf = 4,
2311 .eeprom_size = EEPROM_SIZE, 2306 .eeprom_size = EEPROM_SIZE,
2312 .rf_size = RF_SIZE, 2307 .rf_size = RF_SIZE,
2313 .tx_queues = NUM_TX_QUEUES, 2308 .tx_queues = NUM_TX_QUEUES,
2314 .rx = &rt73usb_queue_rx, 2309 .extra_tx_headroom = TXD_DESC_SIZE,
2315 .tx = &rt73usb_queue_tx, 2310 .rx = &rt73usb_queue_rx,
2316 .bcn = &rt73usb_queue_bcn, 2311 .tx = &rt73usb_queue_tx,
2317 .lib = &rt73usb_rt2x00_ops, 2312 .bcn = &rt73usb_queue_bcn,
2318 .hw = &rt73usb_mac80211_ops, 2313 .lib = &rt73usb_rt2x00_ops,
2314 .hw = &rt73usb_mac80211_ops,
2319#ifdef CONFIG_RT2X00_LIB_DEBUGFS 2315#ifdef CONFIG_RT2X00_LIB_DEBUGFS
2320 .debugfs = &rt73usb_rt2x00debug, 2316 .debugfs = &rt73usb_rt2x00debug,
2321#endif /* CONFIG_RT2X00_LIB_DEBUGFS */ 2317#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2322}; 2318};
2323 2319
@@ -2353,9 +2349,12 @@ static struct usb_device_id rt73usb_device_table[] = {
2353 { USB_DEVICE(0x08dd, 0x0120), USB_DEVICE_DATA(&rt73usb_ops) }, 2349 { USB_DEVICE(0x08dd, 0x0120), USB_DEVICE_DATA(&rt73usb_ops) },
2354 /* Buffalo */ 2350 /* Buffalo */
2355 { USB_DEVICE(0x0411, 0x00d8), USB_DEVICE_DATA(&rt73usb_ops) }, 2351 { USB_DEVICE(0x0411, 0x00d8), USB_DEVICE_DATA(&rt73usb_ops) },
2352 { USB_DEVICE(0x0411, 0x00d9), USB_DEVICE_DATA(&rt73usb_ops) },
2356 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) }, 2353 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2357 { USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) }, 2354 { USB_DEVICE(0x0411, 0x0116), USB_DEVICE_DATA(&rt73usb_ops) },
2358 { USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) }, 2355 { USB_DEVICE(0x0411, 0x0119), USB_DEVICE_DATA(&rt73usb_ops) },
2356 /* CEIVA */
2357 { USB_DEVICE(0x178d, 0x02be), USB_DEVICE_DATA(&rt73usb_ops) },
2359 /* CNet */ 2358 /* CNet */
2360 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) }, 2359 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2361 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) }, 2360 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h
index 81fe0be51c42..7abe7eb14555 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.h
+++ b/drivers/net/wireless/rt2x00/rt73usb.h
@@ -1,5 +1,5 @@
1/* 1/*
2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
3 <http://rt2x00.serialmonkey.com> 3 <http://rt2x00.serialmonkey.com>
4 4
5 This program is free software; you can redistribute it and/or modify 5 This program is free software; you can redistribute it and/or modify
@@ -37,7 +37,7 @@
37 37
38/* 38/*
39 * Signal information. 39 * Signal information.
40 * Defaul offset is required for RSSI <-> dBm conversion. 40 * Default offset is required for RSSI <-> dBm conversion.
41 */ 41 */
42#define DEFAULT_RSSI_OFFSET 120 42#define DEFAULT_RSSI_OFFSET 120
43 43
@@ -142,6 +142,8 @@ struct hw_pairwise_ta_entry {
142 * MAC_CSR0: ASIC revision number. 142 * MAC_CSR0: ASIC revision number.
143 */ 143 */
144#define MAC_CSR0 0x3000 144#define MAC_CSR0 0x3000
145#define MAC_CSR0_REVISION FIELD32(0x0000000f)
146#define MAC_CSR0_CHIPSET FIELD32(0x000ffff0)
145 147
146/* 148/*
147 * MAC_CSR1: System control register. 149 * MAC_CSR1: System control register.
diff --git a/drivers/net/wireless/rtl818x/rtl8180.h b/drivers/net/wireless/rtl818x/rtl8180.h
index 8721282a8185..de3844fe06d8 100644
--- a/drivers/net/wireless/rtl818x/rtl8180.h
+++ b/drivers/net/wireless/rtl818x/rtl8180.h
@@ -60,7 +60,6 @@ struct rtl8180_priv {
60 struct rtl818x_csr __iomem *map; 60 struct rtl818x_csr __iomem *map;
61 const struct rtl818x_rf_ops *rf; 61 const struct rtl818x_rf_ops *rf;
62 struct ieee80211_vif *vif; 62 struct ieee80211_vif *vif;
63 int mode;
64 63
65 /* rtl8180 driver specific */ 64 /* rtl8180 driver specific */
66 spinlock_t lock; 65 spinlock_t lock;
diff --git a/drivers/net/wireless/rtl818x/rtl8180_dev.c b/drivers/net/wireless/rtl818x/rtl8180_dev.c
index 16429c49139c..2131a442831a 100644
--- a/drivers/net/wireless/rtl818x/rtl8180_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8180_dev.c
@@ -17,6 +17,7 @@
17 17
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/pci.h> 19#include <linux/pci.h>
20#include <linux/slab.h>
20#include <linux/delay.h> 21#include <linux/delay.h>
21#include <linux/etherdevice.h> 22#include <linux/etherdevice.h>
22#include <linux/eeprom_93cx6.h> 23#include <linux/eeprom_93cx6.h>
@@ -33,7 +34,7 @@ MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
33MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver"); 34MODULE_DESCRIPTION("RTL8180 / RTL8185 PCI wireless driver");
34MODULE_LICENSE("GPL"); 35MODULE_LICENSE("GPL");
35 36
36static struct pci_device_id rtl8180_table[] __devinitdata = { 37static DEFINE_PCI_DEVICE_TABLE(rtl8180_table) = {
37 /* rtl8185 */ 38 /* rtl8185 */
38 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) }, 39 { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8185) },
39 { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) }, 40 { PCI_DEVICE(PCI_VENDOR_ID_BELKIN, 0x700f) },
@@ -82,8 +83,6 @@ static const struct ieee80211_channel rtl818x_channels[] = {
82}; 83};
83 84
84 85
85
86
87void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data) 86void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
88{ 87{
89 struct rtl8180_priv *priv = dev->priv; 88 struct rtl8180_priv *priv = dev->priv;
@@ -132,7 +131,6 @@ static void rtl8180_handle_rx(struct ieee80211_hw *dev)
132 131
133 rx_status.antenna = (flags2 >> 15) & 1; 132 rx_status.antenna = (flags2 >> 15) & 1;
134 /* TODO: improve signal/rssi reporting */ 133 /* TODO: improve signal/rssi reporting */
135 rx_status.qual = flags2 & 0xFF;
136 rx_status.signal = (flags2 >> 8) & 0x7F; 134 rx_status.signal = (flags2 >> 8) & 0x7F;
137 /* XXX: is this correct? */ 135 /* XXX: is this correct? */
138 rx_status.rate_idx = (flags >> 20) & 0xF; 136 rx_status.rate_idx = (flags >> 20) & 0xF;
@@ -548,7 +546,7 @@ static int rtl8180_start(struct ieee80211_hw *dev)
548 rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma); 546 rtl818x_iowrite32(priv, &priv->map->TNPDA, priv->tx_ring[1].dma);
549 rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma); 547 rtl818x_iowrite32(priv, &priv->map->TLPDA, priv->tx_ring[0].dma);
550 548
551 ret = request_irq(priv->pdev->irq, &rtl8180_interrupt, 549 ret = request_irq(priv->pdev->irq, rtl8180_interrupt,
552 IRQF_SHARED, KBUILD_MODNAME, dev); 550 IRQF_SHARED, KBUILD_MODNAME, dev);
553 if (ret) { 551 if (ret) {
554 printk(KERN_ERR "%s: failed to register IRQ handler\n", 552 printk(KERN_ERR "%s: failed to register IRQ handler\n",
@@ -616,7 +614,6 @@ static int rtl8180_start(struct ieee80211_hw *dev)
616 reg |= RTL818X_CMD_TX_ENABLE; 614 reg |= RTL818X_CMD_TX_ENABLE;
617 rtl818x_iowrite8(priv, &priv->map->CMD, reg); 615 rtl818x_iowrite8(priv, &priv->map->CMD, reg);
618 616
619 priv->mode = NL80211_IFTYPE_MONITOR;
620 return 0; 617 return 0;
621 618
622 err_free_rings: 619 err_free_rings:
@@ -634,8 +631,6 @@ static void rtl8180_stop(struct ieee80211_hw *dev)
634 u8 reg; 631 u8 reg;
635 int i; 632 int i;
636 633
637 priv->mode = NL80211_IFTYPE_UNSPECIFIED;
638
639 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0); 634 rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
640 635
641 reg = rtl818x_ioread8(priv, &priv->map->CMD); 636 reg = rtl818x_ioread8(priv, &priv->map->CMD);
@@ -658,38 +653,39 @@ static void rtl8180_stop(struct ieee80211_hw *dev)
658} 653}
659 654
660static int rtl8180_add_interface(struct ieee80211_hw *dev, 655static int rtl8180_add_interface(struct ieee80211_hw *dev,
661 struct ieee80211_if_init_conf *conf) 656 struct ieee80211_vif *vif)
662{ 657{
663 struct rtl8180_priv *priv = dev->priv; 658 struct rtl8180_priv *priv = dev->priv;
664 659
665 if (priv->mode != NL80211_IFTYPE_MONITOR) 660 /*
666 return -EOPNOTSUPP; 661 * We only support one active interface at a time.
662 */
663 if (priv->vif)
664 return -EBUSY;
667 665
668 switch (conf->type) { 666 switch (vif->type) {
669 case NL80211_IFTYPE_STATION: 667 case NL80211_IFTYPE_STATION:
670 priv->mode = conf->type;
671 break; 668 break;
672 default: 669 default:
673 return -EOPNOTSUPP; 670 return -EOPNOTSUPP;
674 } 671 }
675 672
676 priv->vif = conf->vif; 673 priv->vif = vif;
677 674
678 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 675 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
679 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0], 676 rtl818x_iowrite32(priv, (__le32 __iomem *)&priv->map->MAC[0],
680 le32_to_cpu(*(__le32 *)conf->mac_addr)); 677 le32_to_cpu(*(__le32 *)vif->addr));
681 rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4], 678 rtl818x_iowrite16(priv, (__le16 __iomem *)&priv->map->MAC[4],
682 le16_to_cpu(*(__le16 *)(conf->mac_addr + 4))); 679 le16_to_cpu(*(__le16 *)(vif->addr + 4)));
683 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 680 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
684 681
685 return 0; 682 return 0;
686} 683}
687 684
688static void rtl8180_remove_interface(struct ieee80211_hw *dev, 685static void rtl8180_remove_interface(struct ieee80211_hw *dev,
689 struct ieee80211_if_init_conf *conf) 686 struct ieee80211_vif *vif)
690{ 687{
691 struct rtl8180_priv *priv = dev->priv; 688 struct rtl8180_priv *priv = dev->priv;
692 priv->mode = NL80211_IFTYPE_MONITOR;
693 priv->vif = NULL; 689 priv->vif = NULL;
694} 690}
695 691
@@ -766,6 +762,14 @@ static void rtl8180_configure_filter(struct ieee80211_hw *dev,
766 rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf); 762 rtl818x_iowrite32(priv, &priv->map->RX_CONF, priv->rx_conf);
767} 763}
768 764
765static u64 rtl8180_get_tsf(struct ieee80211_hw *dev)
766{
767 struct rtl8180_priv *priv = dev->priv;
768
769 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
770 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
771}
772
769static const struct ieee80211_ops rtl8180_ops = { 773static const struct ieee80211_ops rtl8180_ops = {
770 .tx = rtl8180_tx, 774 .tx = rtl8180_tx,
771 .start = rtl8180_start, 775 .start = rtl8180_start,
@@ -776,6 +780,7 @@ static const struct ieee80211_ops rtl8180_ops = {
776 .bss_info_changed = rtl8180_bss_info_changed, 780 .bss_info_changed = rtl8180_bss_info_changed,
777 .prepare_multicast = rtl8180_prepare_multicast, 781 .prepare_multicast = rtl8180_prepare_multicast,
778 .configure_filter = rtl8180_configure_filter, 782 .configure_filter = rtl8180_configure_filter,
783 .get_tsf = rtl8180_get_tsf,
779}; 784};
780 785
781static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom) 786static void rtl8180_eeprom_register_read(struct eeprom_93cx6 *eeprom)
diff --git a/drivers/net/wireless/rtl818x/rtl8187.h b/drivers/net/wireless/rtl818x/rtl8187.h
index bf9175a8c1f4..6bb32112e65c 100644
--- a/drivers/net/wireless/rtl818x/rtl8187.h
+++ b/drivers/net/wireless/rtl818x/rtl8187.h
@@ -23,6 +23,7 @@
23#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */ 23#define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
24#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */ 24#define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
25#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */ 25#define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
26#define RTL8187_EEPROM_SELECT_GPIO 0x3B
26 27
27#define RTL8187_REQT_READ 0xC0 28#define RTL8187_REQT_READ 0xC0
28#define RTL8187_REQT_WRITE 0x40 29#define RTL8187_REQT_WRITE 0x40
@@ -31,6 +32,9 @@
31 32
32#define RTL8187_MAX_RX 0x9C4 33#define RTL8187_MAX_RX 0x9C4
33 34
35#define RFKILL_MASK_8187_89_97 0x2
36#define RFKILL_MASK_8198 0x4
37
34struct rtl8187_rx_info { 38struct rtl8187_rx_info {
35 struct urb *urb; 39 struct urb *urb;
36 struct ieee80211_hw *dev; 40 struct ieee80211_hw *dev;
@@ -88,7 +92,7 @@ struct rtl8187_priv {
88 struct rtl818x_csr *map; 92 struct rtl818x_csr *map;
89 const struct rtl818x_rf_ops *rf; 93 const struct rtl818x_rf_ops *rf;
90 struct ieee80211_vif *vif; 94 struct ieee80211_vif *vif;
91 int mode; 95
92 /* The mutex protects the TX loopback state. 96 /* The mutex protects the TX loopback state.
93 * Any attempt to set channels concurrently locks the device. 97 * Any attempt to set channels concurrently locks the device.
94 */ 98 */
@@ -104,6 +108,7 @@ struct rtl8187_priv {
104 struct delayed_work work; 108 struct delayed_work work;
105 struct ieee80211_hw *dev; 109 struct ieee80211_hw *dev;
106#ifdef CONFIG_RTL8187_LEDS 110#ifdef CONFIG_RTL8187_LEDS
111 struct rtl8187_led led_radio;
107 struct rtl8187_led led_tx; 112 struct rtl8187_led led_tx;
108 struct rtl8187_led led_rx; 113 struct rtl8187_led led_rx;
109 struct delayed_work led_on; 114 struct delayed_work led_on;
@@ -119,10 +124,10 @@ struct rtl8187_priv {
119 } hw_rev; 124 } hw_rev;
120 struct sk_buff_head rx_queue; 125 struct sk_buff_head rx_queue;
121 u8 signal; 126 u8 signal;
122 u8 quality;
123 u8 noise; 127 u8 noise;
124 u8 slot_time; 128 u8 slot_time;
125 u8 aifsn[4]; 129 u8 aifsn[4];
130 u8 rfkill_mask;
126 struct { 131 struct {
127 __le64 buf; 132 __le64 buf;
128 struct sk_buff_head queue; 133 struct sk_buff_head queue;
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c
index 2017ccc00145..1d30792973f5 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/usb.h> 24#include <linux/usb.h>
25#include <linux/slab.h>
25#include <linux/delay.h> 26#include <linux/delay.h>
26#include <linux/etherdevice.h> 27#include <linux/etherdevice.h>
27#include <linux/eeprom_93cx6.h> 28#include <linux/eeprom_93cx6.h>
@@ -65,6 +66,7 @@ static struct usb_device_id rtl8187_table[] __devinitdata = {
65 /* Sitecom */ 66 /* Sitecom */
66 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187}, 67 {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
67 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B}, 68 {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
69 {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
68 /* Sphairon Access Systems GmbH */ 70 /* Sphairon Access Systems GmbH */
69 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187}, 71 {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
70 /* Dick Smith Electronics */ 72 /* Dick Smith Electronics */
@@ -320,7 +322,6 @@ static void rtl8187_rx_cb(struct urb *urb)
320 struct ieee80211_rx_status rx_status = { 0 }; 322 struct ieee80211_rx_status rx_status = { 0 };
321 int rate, signal; 323 int rate, signal;
322 u32 flags; 324 u32 flags;
323 u32 quality;
324 unsigned long f; 325 unsigned long f;
325 326
326 spin_lock_irqsave(&priv->rx_queue.lock, f); 327 spin_lock_irqsave(&priv->rx_queue.lock, f);
@@ -338,10 +339,9 @@ static void rtl8187_rx_cb(struct urb *urb)
338 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr)); 339 (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
339 flags = le32_to_cpu(hdr->flags); 340 flags = le32_to_cpu(hdr->flags);
340 /* As with the RTL8187B below, the AGC is used to calculate 341 /* As with the RTL8187B below, the AGC is used to calculate
341 * signal strength and quality. In this case, the scaling 342 * signal strength. In this case, the scaling
342 * constants are derived from the output of p54usb. 343 * constants are derived from the output of p54usb.
343 */ 344 */
344 quality = 130 - ((41 * hdr->agc) >> 6);
345 signal = -4 - ((27 * hdr->agc) >> 6); 345 signal = -4 - ((27 * hdr->agc) >> 6);
346 rx_status.antenna = (hdr->signal >> 7) & 1; 346 rx_status.antenna = (hdr->signal >> 7) & 1;
347 rx_status.mactime = le64_to_cpu(hdr->mac_time); 347 rx_status.mactime = le64_to_cpu(hdr->mac_time);
@@ -354,23 +354,18 @@ static void rtl8187_rx_cb(struct urb *urb)
354 * In testing, none of these quantities show qualitative 354 * In testing, none of these quantities show qualitative
355 * agreement with AP signal strength, except for the AGC, 355 * agreement with AP signal strength, except for the AGC,
356 * which is inversely proportional to the strength of the 356 * which is inversely proportional to the strength of the
357 * signal. In the following, the quality and signal strength 357 * signal. In the following, the signal strength
358 * are derived from the AGC. The arbitrary scaling constants 358 * is derived from the AGC. The arbitrary scaling constants
359 * are chosen to make the results close to the values obtained 359 * are chosen to make the results close to the values obtained
360 * for a BCM4312 using b43 as the driver. The noise is ignored 360 * for a BCM4312 using b43 as the driver. The noise is ignored
361 * for now. 361 * for now.
362 */ 362 */
363 flags = le32_to_cpu(hdr->flags); 363 flags = le32_to_cpu(hdr->flags);
364 quality = 170 - hdr->agc;
365 signal = 14 - hdr->agc / 2; 364 signal = 14 - hdr->agc / 2;
366 rx_status.antenna = (hdr->rssi >> 7) & 1; 365 rx_status.antenna = (hdr->rssi >> 7) & 1;
367 rx_status.mactime = le64_to_cpu(hdr->mac_time); 366 rx_status.mactime = le64_to_cpu(hdr->mac_time);
368 } 367 }
369 368
370 if (quality > 100)
371 quality = 100;
372 rx_status.qual = quality;
373 priv->quality = quality;
374 rx_status.signal = signal; 369 rx_status.signal = signal;
375 priv->signal = signal; 370 priv->signal = signal;
376 rate = (flags >> 20) & 0xF; 371 rate = (flags >> 20) & 0xF;
@@ -1025,31 +1020,30 @@ static void rtl8187_stop(struct ieee80211_hw *dev)
1025} 1020}
1026 1021
1027static int rtl8187_add_interface(struct ieee80211_hw *dev, 1022static int rtl8187_add_interface(struct ieee80211_hw *dev,
1028 struct ieee80211_if_init_conf *conf) 1023 struct ieee80211_vif *vif)
1029{ 1024{
1030 struct rtl8187_priv *priv = dev->priv; 1025 struct rtl8187_priv *priv = dev->priv;
1031 int i; 1026 int i;
1032 int ret = -EOPNOTSUPP; 1027 int ret = -EOPNOTSUPP;
1033 1028
1034 mutex_lock(&priv->conf_mutex); 1029 mutex_lock(&priv->conf_mutex);
1035 if (priv->mode != NL80211_IFTYPE_MONITOR) 1030 if (priv->vif)
1036 goto exit; 1031 goto exit;
1037 1032
1038 switch (conf->type) { 1033 switch (vif->type) {
1039 case NL80211_IFTYPE_STATION: 1034 case NL80211_IFTYPE_STATION:
1040 priv->mode = conf->type;
1041 break; 1035 break;
1042 default: 1036 default:
1043 goto exit; 1037 goto exit;
1044 } 1038 }
1045 1039
1046 ret = 0; 1040 ret = 0;
1047 priv->vif = conf->vif; 1041 priv->vif = vif;
1048 1042
1049 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 1043 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1050 for (i = 0; i < ETH_ALEN; i++) 1044 for (i = 0; i < ETH_ALEN; i++)
1051 rtl818x_iowrite8(priv, &priv->map->MAC[i], 1045 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1052 ((u8 *)conf->mac_addr)[i]); 1046 ((u8 *)vif->addr)[i]);
1053 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 1047 rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1054 1048
1055exit: 1049exit:
@@ -1058,11 +1052,10 @@ exit:
1058} 1052}
1059 1053
1060static void rtl8187_remove_interface(struct ieee80211_hw *dev, 1054static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1061 struct ieee80211_if_init_conf *conf) 1055 struct ieee80211_vif *vif)
1062{ 1056{
1063 struct rtl8187_priv *priv = dev->priv; 1057 struct rtl8187_priv *priv = dev->priv;
1064 mutex_lock(&priv->conf_mutex); 1058 mutex_lock(&priv->conf_mutex);
1065 priv->mode = NL80211_IFTYPE_MONITOR;
1066 priv->vif = NULL; 1059 priv->vif = NULL;
1067 mutex_unlock(&priv->conf_mutex); 1060 mutex_unlock(&priv->conf_mutex);
1068} 1061}
@@ -1274,6 +1267,14 @@ static int rtl8187_conf_tx(struct ieee80211_hw *dev, u16 queue,
1274 return 0; 1267 return 0;
1275} 1268}
1276 1269
1270static u64 rtl8187_get_tsf(struct ieee80211_hw *dev)
1271{
1272 struct rtl8187_priv *priv = dev->priv;
1273
1274 return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1275 (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1276}
1277
1277static const struct ieee80211_ops rtl8187_ops = { 1278static const struct ieee80211_ops rtl8187_ops = {
1278 .tx = rtl8187_tx, 1279 .tx = rtl8187_tx,
1279 .start = rtl8187_start, 1280 .start = rtl8187_start,
@@ -1285,7 +1286,8 @@ static const struct ieee80211_ops rtl8187_ops = {
1285 .prepare_multicast = rtl8187_prepare_multicast, 1286 .prepare_multicast = rtl8187_prepare_multicast,
1286 .configure_filter = rtl8187_configure_filter, 1287 .configure_filter = rtl8187_configure_filter,
1287 .conf_tx = rtl8187_conf_tx, 1288 .conf_tx = rtl8187_conf_tx,
1288 .rfkill_poll = rtl8187_rfkill_poll 1289 .rfkill_poll = rtl8187_rfkill_poll,
1290 .get_tsf = rtl8187_get_tsf,
1289}; 1291};
1290 1292
1291static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom) 1293static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
@@ -1329,6 +1331,7 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
1329 struct ieee80211_channel *channel; 1331 struct ieee80211_channel *channel;
1330 const char *chip_name; 1332 const char *chip_name;
1331 u16 txpwr, reg; 1333 u16 txpwr, reg;
1334 u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1332 int err, i; 1335 int err, i;
1333 1336
1334 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops); 1337 dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
@@ -1371,7 +1374,6 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
1371 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band; 1374 dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1372 1375
1373 1376
1374 priv->mode = NL80211_IFTYPE_MONITOR;
1375 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | 1377 dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1376 IEEE80211_HW_SIGNAL_DBM | 1378 IEEE80211_HW_SIGNAL_DBM |
1377 IEEE80211_HW_RX_INCLUDES_FCS; 1379 IEEE80211_HW_RX_INCLUDES_FCS;
@@ -1488,6 +1490,13 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
1488 (*channel++).hw_value = txpwr & 0xFF; 1490 (*channel++).hw_value = txpwr & 0xFF;
1489 (*channel++).hw_value = txpwr >> 8; 1491 (*channel++).hw_value = txpwr >> 8;
1490 } 1492 }
1493 /* Handle the differing rfkill GPIO bit in different models */
1494 priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1495 if (product_id == 0x8197 || product_id == 0x8198) {
1496 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1497 if (reg & 0xFF00)
1498 priv->rfkill_mask = RFKILL_MASK_8198;
1499 }
1491 1500
1492 /* 1501 /*
1493 * XXX: Once this driver supports anything that requires 1502 * XXX: Once this driver supports anything that requires
@@ -1516,9 +1525,9 @@ static int __devinit rtl8187_probe(struct usb_interface *intf,
1516 mutex_init(&priv->conf_mutex); 1525 mutex_init(&priv->conf_mutex);
1517 skb_queue_head_init(&priv->b_tx_status.queue); 1526 skb_queue_head_init(&priv->b_tx_status.queue);
1518 1527
1519 printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s\n", 1528 printk(KERN_INFO "%s: hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1520 wiphy_name(dev->wiphy), dev->wiphy->perm_addr, 1529 wiphy_name(dev->wiphy), dev->wiphy->perm_addr,
1521 chip_name, priv->asic_rev, priv->rf->name); 1530 chip_name, priv->asic_rev, priv->rf->name, priv->rfkill_mask);
1522 1531
1523#ifdef CONFIG_RTL8187_LEDS 1532#ifdef CONFIG_RTL8187_LEDS
1524 eeprom_93cx6_read(&eeprom, 0x3F, &reg); 1533 eeprom_93cx6_read(&eeprom, 0x3F, &reg);
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c
index cf8a4a40fdf6..4637337d5ce6 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_leds.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c
@@ -33,7 +33,7 @@ static void led_turn_on(struct work_struct *work)
33 struct rtl8187_led *led = &priv->led_tx; 33 struct rtl8187_led *led = &priv->led_tx;
34 34
35 /* Don't change the LED, when the device is down. */ 35 /* Don't change the LED, when the device is down. */
36 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED) 36 if (!priv->vif || priv->vif->type == NL80211_IFTYPE_UNSPECIFIED)
37 return ; 37 return ;
38 38
39 /* Skip if the LED is not registered. */ 39 /* Skip if the LED is not registered. */
@@ -71,7 +71,7 @@ static void led_turn_off(struct work_struct *work)
71 struct rtl8187_led *led = &priv->led_tx; 71 struct rtl8187_led *led = &priv->led_tx;
72 72
73 /* Don't change the LED, when the device is down. */ 73 /* Don't change the LED, when the device is down. */
74 if (priv->mode == NL80211_IFTYPE_UNSPECIFIED) 74 if (!priv->vif || priv->vif->type == NL80211_IFTYPE_UNSPECIFIED)
75 return ; 75 return ;
76 76
77 /* Skip if the LED is not registered. */ 77 /* Skip if the LED is not registered. */
@@ -105,19 +105,36 @@ static void rtl8187_led_brightness_set(struct led_classdev *led_dev,
105 struct rtl8187_led *led = container_of(led_dev, struct rtl8187_led, 105 struct rtl8187_led *led = container_of(led_dev, struct rtl8187_led,
106 led_dev); 106 led_dev);
107 struct ieee80211_hw *hw = led->dev; 107 struct ieee80211_hw *hw = led->dev;
108 struct rtl8187_priv *priv = hw->priv; 108 struct rtl8187_priv *priv;
109 static bool radio_on;
109 110
110 if (brightness == LED_OFF) { 111 if (!hw)
111 ieee80211_queue_delayed_work(hw, &priv->led_off, 0); 112 return;
112 /* The LED is off for 1/20 sec so that it just blinks. */ 113 priv = hw->priv;
113 ieee80211_queue_delayed_work(hw, &priv->led_on, HZ / 20); 114 if (led->is_radio) {
114 } else 115 if (brightness == LED_FULL) {
115 ieee80211_queue_delayed_work(hw, &priv->led_on, 0); 116 ieee80211_queue_delayed_work(hw, &priv->led_on, 0);
117 radio_on = true;
118 } else if (radio_on) {
119 radio_on = false;
120 cancel_delayed_work_sync(&priv->led_on);
121 ieee80211_queue_delayed_work(hw, &priv->led_off, 0);
122 }
123 } else if (radio_on) {
124 if (brightness == LED_OFF) {
125 ieee80211_queue_delayed_work(hw, &priv->led_off, 0);
126 /* The LED is off for 1/20 sec - it just blinks. */
127 ieee80211_queue_delayed_work(hw, &priv->led_on,
128 HZ / 20);
129 } else
130 ieee80211_queue_delayed_work(hw, &priv->led_on, 0);
131 }
116} 132}
117 133
118static int rtl8187_register_led(struct ieee80211_hw *dev, 134static int rtl8187_register_led(struct ieee80211_hw *dev,
119 struct rtl8187_led *led, const char *name, 135 struct rtl8187_led *led, const char *name,
120 const char *default_trigger, u8 ledpin) 136 const char *default_trigger, u8 ledpin,
137 bool is_radio)
121{ 138{
122 int err; 139 int err;
123 struct rtl8187_priv *priv = dev->priv; 140 struct rtl8187_priv *priv = dev->priv;
@@ -128,6 +145,7 @@ static int rtl8187_register_led(struct ieee80211_hw *dev,
128 return -EINVAL; 145 return -EINVAL;
129 led->dev = dev; 146 led->dev = dev;
130 led->ledpin = ledpin; 147 led->ledpin = ledpin;
148 led->is_radio = is_radio;
131 strncpy(led->name, name, sizeof(led->name)); 149 strncpy(led->name, name, sizeof(led->name));
132 150
133 led->led_dev.name = led->name; 151 led->led_dev.name = led->name;
@@ -145,7 +163,11 @@ static int rtl8187_register_led(struct ieee80211_hw *dev,
145 163
146static void rtl8187_unregister_led(struct rtl8187_led *led) 164static void rtl8187_unregister_led(struct rtl8187_led *led)
147{ 165{
166 struct ieee80211_hw *hw = led->dev;
167 struct rtl8187_priv *priv = hw->priv;
168
148 led_classdev_unregister(&led->led_dev); 169 led_classdev_unregister(&led->led_dev);
170 flush_delayed_work(&priv->led_off);
149 led->dev = NULL; 171 led->dev = NULL;
150} 172}
151 173
@@ -183,37 +205,41 @@ void rtl8187_leds_init(struct ieee80211_hw *dev, u16 custid)
183 INIT_DELAYED_WORK(&priv->led_off, led_turn_off); 205 INIT_DELAYED_WORK(&priv->led_off, led_turn_off);
184 206
185 snprintf(name, sizeof(name), 207 snprintf(name, sizeof(name),
208 "rtl8187-%s::radio", wiphy_name(dev->wiphy));
209 err = rtl8187_register_led(dev, &priv->led_radio, name,
210 ieee80211_get_radio_led_name(dev), ledpin, true);
211 if (err)
212 return;
213
214 snprintf(name, sizeof(name),
186 "rtl8187-%s::tx", wiphy_name(dev->wiphy)); 215 "rtl8187-%s::tx", wiphy_name(dev->wiphy));
187 err = rtl8187_register_led(dev, &priv->led_tx, name, 216 err = rtl8187_register_led(dev, &priv->led_tx, name,
188 ieee80211_get_tx_led_name(dev), ledpin); 217 ieee80211_get_tx_led_name(dev), ledpin, false);
189 if (err) 218 if (err)
190 goto error; 219 goto err_tx;
220
191 snprintf(name, sizeof(name), 221 snprintf(name, sizeof(name),
192 "rtl8187-%s::rx", wiphy_name(dev->wiphy)); 222 "rtl8187-%s::rx", wiphy_name(dev->wiphy));
193 err = rtl8187_register_led(dev, &priv->led_rx, name, 223 err = rtl8187_register_led(dev, &priv->led_rx, name,
194 ieee80211_get_rx_led_name(dev), ledpin); 224 ieee80211_get_rx_led_name(dev), ledpin, false);
195 if (!err) { 225 if (!err)
196 ieee80211_queue_delayed_work(dev, &priv->led_on, 0);
197 return; 226 return;
198 } 227
199 /* registration of RX LED failed - unregister TX */ 228 /* registration of RX LED failed - unregister */
200 rtl8187_unregister_led(&priv->led_tx); 229 rtl8187_unregister_led(&priv->led_tx);
201error: 230err_tx:
202 /* If registration of either failed, cancel delayed work */ 231 rtl8187_unregister_led(&priv->led_radio);
203 cancel_delayed_work_sync(&priv->led_off);
204 cancel_delayed_work_sync(&priv->led_on);
205} 232}
206 233
207void rtl8187_leds_exit(struct ieee80211_hw *dev) 234void rtl8187_leds_exit(struct ieee80211_hw *dev)
208{ 235{
209 struct rtl8187_priv *priv = dev->priv; 236 struct rtl8187_priv *priv = dev->priv;
210 237
211 /* turn the LED off before exiting */ 238 rtl8187_unregister_led(&priv->led_radio);
212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0);
213 rtl8187_unregister_led(&priv->led_rx); 239 rtl8187_unregister_led(&priv->led_rx);
214 rtl8187_unregister_led(&priv->led_tx); 240 rtl8187_unregister_led(&priv->led_tx);
215 cancel_delayed_work_sync(&priv->led_off); 241 cancel_delayed_work_sync(&priv->led_off);
216 cancel_delayed_work_sync(&priv->led_on); 242 cancel_delayed_work_sync(&priv->led_on);
217} 243}
218#endif /* def CONFIG_RTL8187_LED */ 244#endif /* def CONFIG_RTL8187_LEDS */
219 245
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.h b/drivers/net/wireless/rtl818x/rtl8187_leds.h
index a0332027aead..d743c96d4a20 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_leds.h
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.h
@@ -47,11 +47,13 @@ struct rtl8187_led {
47 u8 ledpin; 47 u8 ledpin;
48 /* The unique name string for this LED device. */ 48 /* The unique name string for this LED device. */
49 char name[RTL8187_LED_MAX_NAME_LEN + 1]; 49 char name[RTL8187_LED_MAX_NAME_LEN + 1];
50 /* If the LED is radio or tx/rx */
51 bool is_radio;
50}; 52};
51 53
52void rtl8187_leds_init(struct ieee80211_hw *dev, u16 code); 54void rtl8187_leds_init(struct ieee80211_hw *dev, u16 code);
53void rtl8187_leds_exit(struct ieee80211_hw *dev); 55void rtl8187_leds_exit(struct ieee80211_hw *dev);
54 56
55#endif /* def CONFIG_RTL8187_LED */ 57#endif /* def CONFIG_RTL8187_LEDS */
56 58
57#endif /* RTL8187_LED_H */ 59#endif /* RTL8187_LED_H */
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
index cad8037ab2af..03555e1e0cab 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
@@ -25,10 +25,10 @@ static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv)
25 u8 gpio; 25 u8 gpio;
26 26
27 gpio = rtl818x_ioread8(priv, &priv->map->GPIO0); 27 gpio = rtl818x_ioread8(priv, &priv->map->GPIO0);
28 rtl818x_iowrite8(priv, &priv->map->GPIO0, gpio & ~0x02); 28 rtl818x_iowrite8(priv, &priv->map->GPIO0, gpio & ~priv->rfkill_mask);
29 gpio = rtl818x_ioread8(priv, &priv->map->GPIO1); 29 gpio = rtl818x_ioread8(priv, &priv->map->GPIO1);
30 30
31 return gpio & 0x02; 31 return gpio & priv->rfkill_mask;
32} 32}
33 33
34void rtl8187_rfkill_init(struct ieee80211_hw *hw) 34void rtl8187_rfkill_init(struct ieee80211_hw *hw)
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c
deleted file mode 100644
index ea6a87c19319..000000000000
--- a/drivers/net/wireless/strip.c
+++ /dev/null
@@ -1,2805 +0,0 @@
1/*
2 * Copyright 1996 The Board of Trustees of The Leland Stanford
3 * Junior University. All Rights Reserved.
4 *
5 * Permission to use, copy, modify, and distribute this
6 * software and its documentation for any purpose and without
7 * fee is hereby granted, provided that the above copyright
8 * notice appear in all copies. Stanford University
9 * makes no representations about the suitability of this
10 * software for any purpose. It is provided "as is" without
11 * express or implied warranty.
12 *
13 * strip.c This module implements Starmode Radio IP (STRIP)
14 * for kernel-based devices like TTY. It interfaces between a
15 * raw TTY, and the kernel's INET protocol layers (via DDI).
16 *
17 * Version: @(#)strip.c 1.3 July 1997
18 *
19 * Author: Stuart Cheshire <cheshire@cs.stanford.edu>
20 *
21 * Fixes: v0.9 12th Feb 1996 (SC)
22 * New byte stuffing (2+6 run-length encoding)
23 * New watchdog timer task
24 * New Protocol key (SIP0)
25 *
26 * v0.9.1 3rd March 1996 (SC)
27 * Changed to dynamic device allocation -- no more compile
28 * time (or boot time) limit on the number of STRIP devices.
29 *
30 * v0.9.2 13th March 1996 (SC)
31 * Uses arp cache lookups (but doesn't send arp packets yet)
32 *
33 * v0.9.3 17th April 1996 (SC)
34 * Fixed bug where STR_ERROR flag was getting set unneccessarily
35 * (causing otherwise good packets to be unneccessarily dropped)
36 *
37 * v0.9.4 27th April 1996 (SC)
38 * First attempt at using "&COMMAND" Starmode AT commands
39 *
40 * v0.9.5 29th May 1996 (SC)
41 * First attempt at sending (unicast) ARP packets
42 *
43 * v0.9.6 5th June 1996 (Elliot)
44 * Put "message level" tags in every "printk" statement
45 *
46 * v0.9.7 13th June 1996 (laik)
47 * Added support for the /proc fs
48 *
49 * v0.9.8 July 1996 (Mema)
50 * Added packet logging
51 *
52 * v1.0 November 1996 (SC)
53 * Fixed (severe) memory leaks in the /proc fs code
54 * Fixed race conditions in the logging code
55 *
56 * v1.1 January 1997 (SC)
57 * Deleted packet logging (use tcpdump instead)
58 * Added support for Metricom Firmware v204 features
59 * (like message checksums)
60 *
61 * v1.2 January 1997 (SC)
62 * Put portables list back in
63 *
64 * v1.3 July 1997 (SC)
65 * Made STRIP driver set the radio's baud rate automatically.
66 * It is no longer necessarily to manually set the radio's
67 * rate permanently to 115200 -- the driver handles setting
68 * the rate automatically.
69 */
70
71#ifdef MODULE
72static const char StripVersion[] = "1.3A-STUART.CHESHIRE-MODULAR";
73#else
74static const char StripVersion[] = "1.3A-STUART.CHESHIRE";
75#endif
76
77#define TICKLE_TIMERS 0
78#define EXT_COUNTERS 1
79
80
81/************************************************************************/
82/* Header files */
83
84#include <linux/kernel.h>
85#include <linux/module.h>
86#include <linux/init.h>
87#include <linux/bitops.h>
88#include <asm/system.h>
89#include <asm/uaccess.h>
90
91# include <linux/ctype.h>
92#include <linux/string.h>
93#include <linux/mm.h>
94#include <linux/interrupt.h>
95#include <linux/in.h>
96#include <linux/tty.h>
97#include <linux/errno.h>
98#include <linux/netdevice.h>
99#include <linux/inetdevice.h>
100#include <linux/etherdevice.h>
101#include <linux/skbuff.h>
102#include <linux/if_arp.h>
103#include <linux/if_strip.h>
104#include <linux/proc_fs.h>
105#include <linux/seq_file.h>
106#include <linux/serial.h>
107#include <linux/serialP.h>
108#include <linux/rcupdate.h>
109#include <net/arp.h>
110#include <net/net_namespace.h>
111
112#include <linux/ip.h>
113#include <linux/tcp.h>
114#include <linux/time.h>
115#include <linux/jiffies.h>
116
117/************************************************************************/
118/* Useful structures and definitions */
119
120/*
121 * A MetricomKey identifies the protocol being carried inside a Metricom
122 * Starmode packet.
123 */
124
125typedef union {
126 __u8 c[4];
127 __u32 l;
128} MetricomKey;
129
130/*
131 * An IP address can be viewed as four bytes in memory (which is what it is) or as
132 * a single 32-bit long (which is convenient for assignment, equality testing etc.)
133 */
134
135typedef union {
136 __u8 b[4];
137 __u32 l;
138} IPaddr;
139
140/*
141 * A MetricomAddressString is used to hold a printable representation of
142 * a Metricom address.
143 */
144
145typedef struct {
146 __u8 c[24];
147} MetricomAddressString;
148
149/* Encapsulation can expand packet of size x to 65/64x + 1
150 * Sent packet looks like "<CR>*<address>*<key><encaps payload><CR>"
151 * 1 1 1-18 1 4 ? 1
152 * eg. <CR>*0000-1234*SIP0<encaps payload><CR>
153 * We allow 31 bytes for the stars, the key, the address and the <CR>s
154 */
155#define STRIP_ENCAP_SIZE(X) (32 + (X)*65L/64L)
156
157/*
158 * A STRIP_Header is never really sent over the radio, but making a dummy
159 * header for internal use within the kernel that looks like an Ethernet
160 * header makes certain other software happier. For example, tcpdump
161 * already understands Ethernet headers.
162 */
163
164typedef struct {
165 MetricomAddress dst_addr; /* Destination address, e.g. "0000-1234" */
166 MetricomAddress src_addr; /* Source address, e.g. "0000-5678" */
167 unsigned short protocol; /* The protocol type, using Ethernet codes */
168} STRIP_Header;
169
170typedef struct {
171 char c[60];
172} MetricomNode;
173
174#define NODE_TABLE_SIZE 32
175typedef struct {
176 struct timeval timestamp;
177 int num_nodes;
178 MetricomNode node[NODE_TABLE_SIZE];
179} MetricomNodeTable;
180
181enum { FALSE = 0, TRUE = 1 };
182
183/*
184 * Holds the radio's firmware version.
185 */
186typedef struct {
187 char c[50];
188} FirmwareVersion;
189
190/*
191 * Holds the radio's serial number.
192 */
193typedef struct {
194 char c[18];
195} SerialNumber;
196
197/*
198 * Holds the radio's battery voltage.
199 */
200typedef struct {
201 char c[11];
202} BatteryVoltage;
203
204typedef struct {
205 char c[8];
206} char8;
207
208enum {
209 NoStructure = 0, /* Really old firmware */
210 StructuredMessages = 1, /* Parsable AT response msgs */
211 ChecksummedMessages = 2 /* Parsable AT response msgs with checksums */
212};
213
214struct strip {
215 int magic;
216 /*
217 * These are pointers to the malloc()ed frame buffers.
218 */
219
220 unsigned char *rx_buff; /* buffer for received IP packet */
221 unsigned char *sx_buff; /* buffer for received serial data */
222 int sx_count; /* received serial data counter */
223 int sx_size; /* Serial buffer size */
224 unsigned char *tx_buff; /* transmitter buffer */
225 unsigned char *tx_head; /* pointer to next byte to XMIT */
226 int tx_left; /* bytes left in XMIT queue */
227 int tx_size; /* Serial buffer size */
228
229 /*
230 * STRIP interface statistics.
231 */
232
233 unsigned long rx_packets; /* inbound frames counter */
234 unsigned long tx_packets; /* outbound frames counter */
235 unsigned long rx_errors; /* Parity, etc. errors */
236 unsigned long tx_errors; /* Planned stuff */
237 unsigned long rx_dropped; /* No memory for skb */
238 unsigned long tx_dropped; /* When MTU change */
239 unsigned long rx_over_errors; /* Frame bigger than STRIP buf. */
240
241 unsigned long pps_timer; /* Timer to determine pps */
242 unsigned long rx_pps_count; /* Counter to determine pps */
243 unsigned long tx_pps_count; /* Counter to determine pps */
244 unsigned long sx_pps_count; /* Counter to determine pps */
245 unsigned long rx_average_pps; /* rx packets per second * 8 */
246 unsigned long tx_average_pps; /* tx packets per second * 8 */
247 unsigned long sx_average_pps; /* sent packets per second * 8 */
248
249#ifdef EXT_COUNTERS
250 unsigned long rx_bytes; /* total received bytes */
251 unsigned long tx_bytes; /* total received bytes */
252 unsigned long rx_rbytes; /* bytes thru radio i/f */
253 unsigned long tx_rbytes; /* bytes thru radio i/f */
254 unsigned long rx_sbytes; /* tot bytes thru serial i/f */
255 unsigned long tx_sbytes; /* tot bytes thru serial i/f */
256 unsigned long rx_ebytes; /* tot stat/err bytes */
257 unsigned long tx_ebytes; /* tot stat/err bytes */
258#endif
259
260 /*
261 * Internal variables.
262 */
263
264 struct list_head list; /* Linked list of devices */
265
266 int discard; /* Set if serial error */
267 int working; /* Is radio working correctly? */
268 int firmware_level; /* Message structuring level */
269 int next_command; /* Next periodic command */
270 unsigned int user_baud; /* The user-selected baud rate */
271 int mtu; /* Our mtu (to spot changes!) */
272 long watchdog_doprobe; /* Next time to test the radio */
273 long watchdog_doreset; /* Time to do next reset */
274 long gratuitous_arp; /* Time to send next ARP refresh */
275 long arp_interval; /* Next ARP interval */
276 struct timer_list idle_timer; /* For periodic wakeup calls */
277 MetricomAddress true_dev_addr; /* True address of radio */
278 int manual_dev_addr; /* Hack: See note below */
279
280 FirmwareVersion firmware_version; /* The radio's firmware version */
281 SerialNumber serial_number; /* The radio's serial number */
282 BatteryVoltage battery_voltage; /* The radio's battery voltage */
283
284 /*
285 * Other useful structures.
286 */
287
288 struct tty_struct *tty; /* ptr to TTY structure */
289 struct net_device *dev; /* Our device structure */
290
291 /*
292 * Neighbour radio records
293 */
294
295 MetricomNodeTable portables;
296 MetricomNodeTable poletops;
297};
298
299/*
300 * Note: manual_dev_addr hack
301 *
302 * It is not possible to change the hardware address of a Metricom radio,
303 * or to send packets with a user-specified hardware source address, thus
304 * trying to manually set a hardware source address is a questionable
305 * thing to do. However, if the user *does* manually set the hardware
306 * source address of a STRIP interface, then the kernel will believe it,
307 * and use it in certain places. For example, the hardware address listed
308 * by ifconfig will be the manual address, not the true one.
309 * (Both addresses are listed in /proc/net/strip.)
310 * Also, ARP packets will be sent out giving the user-specified address as
311 * the source address, not the real address. This is dangerous, because
312 * it means you won't receive any replies -- the ARP replies will go to
313 * the specified address, which will be some other radio. The case where
314 * this is useful is when that other radio is also connected to the same
315 * machine. This allows you to connect a pair of radios to one machine,
316 * and to use one exclusively for inbound traffic, and the other
317 * exclusively for outbound traffic. Pretty neat, huh?
318 *
319 * Here's the full procedure to set this up:
320 *
321 * 1. "slattach" two interfaces, e.g. st0 for outgoing packets,
322 * and st1 for incoming packets
323 *
324 * 2. "ifconfig" st0 (outbound radio) to have the hardware address
325 * which is the real hardware address of st1 (inbound radio).
326 * Now when it sends out packets, it will masquerade as st1, and
327 * replies will be sent to that radio, which is exactly what we want.
328 *
329 * 3. Set the route table entry ("route add default ..." or
330 * "route add -net ...", as appropriate) to send packets via the st0
331 * interface (outbound radio). Do not add any route which sends packets
332 * out via the st1 interface -- that radio is for inbound traffic only.
333 *
334 * 4. "ifconfig" st1 (inbound radio) to have hardware address zero.
335 * This tells the STRIP driver to "shut down" that interface and not
336 * send any packets through it. In particular, it stops sending the
337 * periodic gratuitous ARP packets that a STRIP interface normally sends.
338 * Also, when packets arrive on that interface, it will search the
339 * interface list to see if there is another interface who's manual
340 * hardware address matches its own real address (i.e. st0 in this
341 * example) and if so it will transfer ownership of the skbuff to
342 * that interface, so that it looks to the kernel as if the packet
343 * arrived on that interface. This is necessary because when the
344 * kernel sends an ARP packet on st0, it expects to get a reply on
345 * st0, and if it sees the reply come from st1 then it will ignore
346 * it (to be accurate, it puts the entry in the ARP table, but
347 * labelled in such a way that st0 can't use it).
348 *
349 * Thanks to Petros Maniatis for coming up with the idea of splitting
350 * inbound and outbound traffic between two interfaces, which turned
351 * out to be really easy to implement, even if it is a bit of a hack.
352 *
353 * Having set a manual address on an interface, you can restore it
354 * to automatic operation (where the address is automatically kept
355 * consistent with the real address of the radio) by setting a manual
356 * address of all ones, e.g. "ifconfig st0 hw strip FFFFFFFFFFFF"
357 * This 'turns off' manual override mode for the device address.
358 *
359 * Note: The IEEE 802 headers reported in tcpdump will show the *real*
360 * radio addresses the packets were sent and received from, so that you
361 * can see what is really going on with packets, and which interfaces
362 * they are really going through.
363 */
364
365
366/************************************************************************/
367/* Constants */
368
369/*
370 * CommandString1 works on all radios
371 * Other CommandStrings are only used with firmware that provides structured responses.
372 *
373 * ats319=1 Enables Info message for node additions and deletions
374 * ats319=2 Enables Info message for a new best node
375 * ats319=4 Enables checksums
376 * ats319=8 Enables ACK messages
377 */
378
379static const int MaxCommandStringLength = 32;
380static const int CompatibilityCommand = 1;
381
382static const char CommandString0[] = "*&COMMAND*ATS319=7"; /* Turn on checksums & info messages */
383static const char CommandString1[] = "*&COMMAND*ATS305?"; /* Query radio name */
384static const char CommandString2[] = "*&COMMAND*ATS325?"; /* Query battery voltage */
385static const char CommandString3[] = "*&COMMAND*ATS300?"; /* Query version information */
386static const char CommandString4[] = "*&COMMAND*ATS311?"; /* Query poletop list */
387static const char CommandString5[] = "*&COMMAND*AT~LA"; /* Query portables list */
388typedef struct {
389 const char *string;
390 long length;
391} StringDescriptor;
392
393static const StringDescriptor CommandString[] = {
394 {CommandString0, sizeof(CommandString0) - 1},
395 {CommandString1, sizeof(CommandString1) - 1},
396 {CommandString2, sizeof(CommandString2) - 1},
397 {CommandString3, sizeof(CommandString3) - 1},
398 {CommandString4, sizeof(CommandString4) - 1},
399 {CommandString5, sizeof(CommandString5) - 1}
400};
401
402#define GOT_ALL_RADIO_INFO(S) \
403 ((S)->firmware_version.c[0] && \
404 (S)->battery_voltage.c[0] && \
405 memcmp(&(S)->true_dev_addr, zero_address.c, sizeof(zero_address)))
406
407static const char hextable[16] = "0123456789ABCDEF";
408
409static const MetricomAddress zero_address;
410static const MetricomAddress broadcast_address =
411 { {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF} };
412
413static const MetricomKey SIP0Key = { "SIP0" };
414static const MetricomKey ARP0Key = { "ARP0" };
415static const MetricomKey ATR_Key = { "ATR " };
416static const MetricomKey ACK_Key = { "ACK_" };
417static const MetricomKey INF_Key = { "INF_" };
418static const MetricomKey ERR_Key = { "ERR_" };
419
420static const long MaxARPInterval = 60 * HZ; /* One minute */
421
422/*
423 * Maximum Starmode packet length is 1183 bytes. Allowing 4 bytes for
424 * protocol key, 4 bytes for checksum, one byte for CR, and 65/64 expansion
425 * for STRIP encoding, that translates to a maximum payload MTU of 1155.
426 * Note: A standard NFS 1K data packet is a total of 0x480 (1152) bytes
427 * long, including IP header, UDP header, and NFS header. Setting the STRIP
428 * MTU to 1152 allows us to send default sized NFS packets without fragmentation.
429 */
430static const unsigned short MAX_SEND_MTU = 1152;
431static const unsigned short MAX_RECV_MTU = 1500; /* Hoping for Ethernet sized packets in the future! */
432static const unsigned short DEFAULT_STRIP_MTU = 1152;
433static const int STRIP_MAGIC = 0x5303;
434static const long LongTime = 0x7FFFFFFF;
435
436/************************************************************************/
437/* Global variables */
438
439static LIST_HEAD(strip_list);
440static DEFINE_SPINLOCK(strip_lock);
441
442/************************************************************************/
443/* Macros */
444
445/* Returns TRUE if text T begins with prefix P */
446#define has_prefix(T,L,P) (((L) >= sizeof(P)-1) && !strncmp((T), (P), sizeof(P)-1))
447
448/* Returns TRUE if text T of length L is equal to string S */
449#define text_equal(T,L,S) (((L) == sizeof(S)-1) && !strncmp((T), (S), sizeof(S)-1))
450
451#define READHEX(X) ((X)>='0' && (X)<='9' ? (X)-'0' : \
452 (X)>='a' && (X)<='f' ? (X)-'a'+10 : \
453 (X)>='A' && (X)<='F' ? (X)-'A'+10 : 0 )
454
455#define READHEX16(X) ((__u16)(READHEX(X)))
456
457#define READDEC(X) ((X)>='0' && (X)<='9' ? (X)-'0' : 0)
458
459#define ARRAY_END(X) (&((X)[ARRAY_SIZE(X)]))
460
461#define JIFFIE_TO_SEC(X) ((X) / HZ)
462
463
464/************************************************************************/
465/* Utility routines */
466
467static int arp_query(unsigned char *haddr, u32 paddr,
468 struct net_device *dev)
469{
470 struct neighbour *neighbor_entry;
471 int ret = 0;
472
473 neighbor_entry = neigh_lookup(&arp_tbl, &paddr, dev);
474
475 if (neighbor_entry != NULL) {
476 neighbor_entry->used = jiffies;
477 if (neighbor_entry->nud_state & NUD_VALID) {
478 memcpy(haddr, neighbor_entry->ha, dev->addr_len);
479 ret = 1;
480 }
481 neigh_release(neighbor_entry);
482 }
483 return ret;
484}
485
486static void DumpData(char *msg, struct strip *strip_info, __u8 * ptr,
487 __u8 * end)
488{
489 static const int MAX_DumpData = 80;
490 __u8 pkt_text[MAX_DumpData], *p = pkt_text;
491
492 *p++ = '\"';
493
494 while (ptr < end && p < &pkt_text[MAX_DumpData - 4]) {
495 if (*ptr == '\\') {
496 *p++ = '\\';
497 *p++ = '\\';
498 } else {
499 if (*ptr >= 32 && *ptr <= 126) {
500 *p++ = *ptr;
501 } else {
502 sprintf(p, "\\%02X", *ptr);
503 p += 3;
504 }
505 }
506 ptr++;
507 }
508
509 if (ptr == end)
510 *p++ = '\"';
511 *p++ = 0;
512
513 printk(KERN_INFO "%s: %-13s%s\n", strip_info->dev->name, msg, pkt_text);
514}
515
516
517/************************************************************************/
518/* Byte stuffing/unstuffing routines */
519
520/* Stuffing scheme:
521 * 00 Unused (reserved character)
522 * 01-3F Run of 2-64 different characters
523 * 40-7F Run of 1-64 different characters plus a single zero at the end
524 * 80-BF Run of 1-64 of the same character
525 * C0-FF Run of 1-64 zeroes (ASCII 0)
526 */
527
528typedef enum {
529 Stuff_Diff = 0x00,
530 Stuff_DiffZero = 0x40,
531 Stuff_Same = 0x80,
532 Stuff_Zero = 0xC0,
533 Stuff_NoCode = 0xFF, /* Special code, meaning no code selected */
534
535 Stuff_CodeMask = 0xC0,
536 Stuff_CountMask = 0x3F,
537 Stuff_MaxCount = 0x3F,
538 Stuff_Magic = 0x0D /* The value we are eliminating */
539} StuffingCode;
540
541/* StuffData encodes the data starting at "src" for "length" bytes.
542 * It writes it to the buffer pointed to by "dst" (which must be at least
543 * as long as 1 + 65/64 of the input length). The output may be up to 1.6%
544 * larger than the input for pathological input, but will usually be smaller.
545 * StuffData returns the new value of the dst pointer as its result.
546 * "code_ptr_ptr" points to a "__u8 *" which is used to hold encoding state
547 * between calls, allowing an encoded packet to be incrementally built up
548 * from small parts. On the first call, the "__u8 *" pointed to should be
549 * initialized to NULL; between subsequent calls the calling routine should
550 * leave the value alone and simply pass it back unchanged so that the
551 * encoder can recover its current state.
552 */
553
554#define StuffData_FinishBlock(X) \
555(*code_ptr = (X) ^ Stuff_Magic, code = Stuff_NoCode)
556
557static __u8 *StuffData(__u8 * src, __u32 length, __u8 * dst,
558 __u8 ** code_ptr_ptr)
559{
560 __u8 *end = src + length;
561 __u8 *code_ptr = *code_ptr_ptr;
562 __u8 code = Stuff_NoCode, count = 0;
563
564 if (!length)
565 return (dst);
566
567 if (code_ptr) {
568 /*
569 * Recover state from last call, if applicable
570 */
571 code = (*code_ptr ^ Stuff_Magic) & Stuff_CodeMask;
572 count = (*code_ptr ^ Stuff_Magic) & Stuff_CountMask;
573 }
574
575 while (src < end) {
576 switch (code) {
577 /* Stuff_NoCode: If no current code, select one */
578 case Stuff_NoCode:
579 /* Record where we're going to put this code */
580 code_ptr = dst++;
581 count = 0; /* Reset the count (zero means one instance) */
582 /* Tentatively start a new block */
583 if (*src == 0) {
584 code = Stuff_Zero;
585 src++;
586 } else {
587 code = Stuff_Same;
588 *dst++ = *src++ ^ Stuff_Magic;
589 }
590 /* Note: We optimistically assume run of same -- */
591 /* which will be fixed later in Stuff_Same */
592 /* if it turns out not to be true. */
593 break;
594
595 /* Stuff_Zero: We already have at least one zero encoded */
596 case Stuff_Zero:
597 /* If another zero, count it, else finish this code block */
598 if (*src == 0) {
599 count++;
600 src++;
601 } else {
602 StuffData_FinishBlock(Stuff_Zero + count);
603 }
604 break;
605
606 /* Stuff_Same: We already have at least one byte encoded */
607 case Stuff_Same:
608 /* If another one the same, count it */
609 if ((*src ^ Stuff_Magic) == code_ptr[1]) {
610 count++;
611 src++;
612 break;
613 }
614 /* else, this byte does not match this block. */
615 /* If we already have two or more bytes encoded, finish this code block */
616 if (count) {
617 StuffData_FinishBlock(Stuff_Same + count);
618 break;
619 }
620 /* else, we only have one so far, so switch to Stuff_Diff code */
621 code = Stuff_Diff;
622 /* and fall through to Stuff_Diff case below
623 * Note cunning cleverness here: case Stuff_Diff compares
624 * the current character with the previous two to see if it
625 * has a run of three the same. Won't this be an error if
626 * there aren't two previous characters stored to compare with?
627 * No. Because we know the current character is *not* the same
628 * as the previous one, the first test below will necessarily
629 * fail and the send half of the "if" won't be executed.
630 */
631
632 /* Stuff_Diff: We have at least two *different* bytes encoded */
633 case Stuff_Diff:
634 /* If this is a zero, must encode a Stuff_DiffZero, and begin a new block */
635 if (*src == 0) {
636 StuffData_FinishBlock(Stuff_DiffZero +
637 count);
638 }
639 /* else, if we have three in a row, it is worth starting a Stuff_Same block */
640 else if ((*src ^ Stuff_Magic) == dst[-1]
641 && dst[-1] == dst[-2]) {
642 /* Back off the last two characters we encoded */
643 code += count - 2;
644 /* Note: "Stuff_Diff + 0" is an illegal code */
645 if (code == Stuff_Diff + 0) {
646 code = Stuff_Same + 0;
647 }
648 StuffData_FinishBlock(code);
649 code_ptr = dst - 2;
650 /* dst[-1] already holds the correct value */
651 count = 2; /* 2 means three bytes encoded */
652 code = Stuff_Same;
653 }
654 /* else, another different byte, so add it to the block */
655 else {
656 *dst++ = *src ^ Stuff_Magic;
657 count++;
658 }
659 src++; /* Consume the byte */
660 break;
661 }
662 if (count == Stuff_MaxCount) {
663 StuffData_FinishBlock(code + count);
664 }
665 }
666 if (code == Stuff_NoCode) {
667 *code_ptr_ptr = NULL;
668 } else {
669 *code_ptr_ptr = code_ptr;
670 StuffData_FinishBlock(code + count);
671 }
672 return (dst);
673}
674
675/*
676 * UnStuffData decodes the data at "src", up to (but not including) "end".
677 * It writes the decoded data into the buffer pointed to by "dst", up to a
678 * maximum of "dst_length", and returns the new value of "src" so that a
679 * follow-on call can read more data, continuing from where the first left off.
680 *
681 * There are three types of results:
682 * 1. The source data runs out before extracting "dst_length" bytes:
683 * UnStuffData returns NULL to indicate failure.
684 * 2. The source data produces exactly "dst_length" bytes:
685 * UnStuffData returns new_src = end to indicate that all bytes were consumed.
686 * 3. "dst_length" bytes are extracted, with more remaining.
687 * UnStuffData returns new_src < end to indicate that there are more bytes
688 * to be read.
689 *
690 * Note: The decoding may be destructive, in that it may alter the source
691 * data in the process of decoding it (this is necessary to allow a follow-on
692 * call to resume correctly).
693 */
694
695static __u8 *UnStuffData(__u8 * src, __u8 * end, __u8 * dst,
696 __u32 dst_length)
697{
698 __u8 *dst_end = dst + dst_length;
699 /* Sanity check */
700 if (!src || !end || !dst || !dst_length)
701 return (NULL);
702 while (src < end && dst < dst_end) {
703 int count = (*src ^ Stuff_Magic) & Stuff_CountMask;
704 switch ((*src ^ Stuff_Magic) & Stuff_CodeMask) {
705 case Stuff_Diff:
706 if (src + 1 + count >= end)
707 return (NULL);
708 do {
709 *dst++ = *++src ^ Stuff_Magic;
710 }
711 while (--count >= 0 && dst < dst_end);
712 if (count < 0)
713 src += 1;
714 else {
715 if (count == 0)
716 *src = Stuff_Same ^ Stuff_Magic;
717 else
718 *src =
719 (Stuff_Diff +
720 count) ^ Stuff_Magic;
721 }
722 break;
723 case Stuff_DiffZero:
724 if (src + 1 + count >= end)
725 return (NULL);
726 do {
727 *dst++ = *++src ^ Stuff_Magic;
728 }
729 while (--count >= 0 && dst < dst_end);
730 if (count < 0)
731 *src = Stuff_Zero ^ Stuff_Magic;
732 else
733 *src =
734 (Stuff_DiffZero + count) ^ Stuff_Magic;
735 break;
736 case Stuff_Same:
737 if (src + 1 >= end)
738 return (NULL);
739 do {
740 *dst++ = src[1] ^ Stuff_Magic;
741 }
742 while (--count >= 0 && dst < dst_end);
743 if (count < 0)
744 src += 2;
745 else
746 *src = (Stuff_Same + count) ^ Stuff_Magic;
747 break;
748 case Stuff_Zero:
749 do {
750 *dst++ = 0;
751 }
752 while (--count >= 0 && dst < dst_end);
753 if (count < 0)
754 src += 1;
755 else
756 *src = (Stuff_Zero + count) ^ Stuff_Magic;
757 break;
758 }
759 }
760 if (dst < dst_end)
761 return (NULL);
762 else
763 return (src);
764}
765
766
767/************************************************************************/
768/* General routines for STRIP */
769
770/*
771 * set_baud sets the baud rate to the rate defined by baudcode
772 */
773static void set_baud(struct tty_struct *tty, speed_t baudrate)
774{
775 struct ktermios old_termios;
776
777 mutex_lock(&tty->termios_mutex);
778 old_termios =*(tty->termios);
779 tty_encode_baud_rate(tty, baudrate, baudrate);
780 tty->ops->set_termios(tty, &old_termios);
781 mutex_unlock(&tty->termios_mutex);
782}
783
784/*
785 * Convert a string to a Metricom Address.
786 */
787
788#define IS_RADIO_ADDRESS(p) ( \
789 isdigit((p)[0]) && isdigit((p)[1]) && isdigit((p)[2]) && isdigit((p)[3]) && \
790 (p)[4] == '-' && \
791 isdigit((p)[5]) && isdigit((p)[6]) && isdigit((p)[7]) && isdigit((p)[8]) )
792
793static int string_to_radio_address(MetricomAddress * addr, __u8 * p)
794{
795 if (!IS_RADIO_ADDRESS(p))
796 return (1);
797 addr->c[0] = 0;
798 addr->c[1] = 0;
799 addr->c[2] = READHEX(p[0]) << 4 | READHEX(p[1]);
800 addr->c[3] = READHEX(p[2]) << 4 | READHEX(p[3]);
801 addr->c[4] = READHEX(p[5]) << 4 | READHEX(p[6]);
802 addr->c[5] = READHEX(p[7]) << 4 | READHEX(p[8]);
803 return (0);
804}
805
806/*
807 * Convert a Metricom Address to a string.
808 */
809
810static __u8 *radio_address_to_string(const MetricomAddress * addr,
811 MetricomAddressString * p)
812{
813 sprintf(p->c, "%02X%02X-%02X%02X", addr->c[2], addr->c[3],
814 addr->c[4], addr->c[5]);
815 return (p->c);
816}
817
818/*
819 * Note: Must make sure sx_size is big enough to receive a stuffed
820 * MAX_RECV_MTU packet. Additionally, we also want to ensure that it's
821 * big enough to receive a large radio neighbour list (currently 4K).
822 */
823
824static int allocate_buffers(struct strip *strip_info, int mtu)
825{
826 struct net_device *dev = strip_info->dev;
827 int sx_size = max_t(int, STRIP_ENCAP_SIZE(MAX_RECV_MTU), 4096);
828 int tx_size = STRIP_ENCAP_SIZE(mtu) + MaxCommandStringLength;
829 __u8 *r = kmalloc(MAX_RECV_MTU, GFP_ATOMIC);
830 __u8 *s = kmalloc(sx_size, GFP_ATOMIC);
831 __u8 *t = kmalloc(tx_size, GFP_ATOMIC);
832 if (r && s && t) {
833 strip_info->rx_buff = r;
834 strip_info->sx_buff = s;
835 strip_info->tx_buff = t;
836 strip_info->sx_size = sx_size;
837 strip_info->tx_size = tx_size;
838 strip_info->mtu = dev->mtu = mtu;
839 return (1);
840 }
841 kfree(r);
842 kfree(s);
843 kfree(t);
844 return (0);
845}
846
847/*
848 * MTU has been changed by the IP layer.
849 * We could be in
850 * an upcall from the tty driver, or in an ip packet queue.
851 */
852static int strip_change_mtu(struct net_device *dev, int new_mtu)
853{
854 struct strip *strip_info = netdev_priv(dev);
855 int old_mtu = strip_info->mtu;
856 unsigned char *orbuff = strip_info->rx_buff;
857 unsigned char *osbuff = strip_info->sx_buff;
858 unsigned char *otbuff = strip_info->tx_buff;
859
860 if (new_mtu > MAX_SEND_MTU) {
861 printk(KERN_ERR
862 "%s: MTU exceeds maximum allowable (%d), MTU change cancelled.\n",
863 strip_info->dev->name, MAX_SEND_MTU);
864 return -EINVAL;
865 }
866
867 spin_lock_bh(&strip_lock);
868 if (!allocate_buffers(strip_info, new_mtu)) {
869 printk(KERN_ERR "%s: unable to grow strip buffers, MTU change cancelled.\n",
870 strip_info->dev->name);
871 spin_unlock_bh(&strip_lock);
872 return -ENOMEM;
873 }
874
875 if (strip_info->sx_count) {
876 if (strip_info->sx_count <= strip_info->sx_size)
877 memcpy(strip_info->sx_buff, osbuff,
878 strip_info->sx_count);
879 else {
880 strip_info->discard = strip_info->sx_count;
881 strip_info->rx_over_errors++;
882 }
883 }
884
885 if (strip_info->tx_left) {
886 if (strip_info->tx_left <= strip_info->tx_size)
887 memcpy(strip_info->tx_buff, strip_info->tx_head,
888 strip_info->tx_left);
889 else {
890 strip_info->tx_left = 0;
891 strip_info->tx_dropped++;
892 }
893 }
894 strip_info->tx_head = strip_info->tx_buff;
895 spin_unlock_bh(&strip_lock);
896
897 printk(KERN_NOTICE "%s: strip MTU changed fom %d to %d.\n",
898 strip_info->dev->name, old_mtu, strip_info->mtu);
899
900 kfree(orbuff);
901 kfree(osbuff);
902 kfree(otbuff);
903 return 0;
904}
905
906static void strip_unlock(struct strip *strip_info)
907{
908 /*
909 * Set the timer to go off in one second.
910 */
911 strip_info->idle_timer.expires = jiffies + 1 * HZ;
912 add_timer(&strip_info->idle_timer);
913 netif_wake_queue(strip_info->dev);
914}
915
916
917
918/*
919 * If the time is in the near future, time_delta prints the number of
920 * seconds to go into the buffer and returns the address of the buffer.
921 * If the time is not in the near future, it returns the address of the
922 * string "Not scheduled" The buffer must be long enough to contain the
923 * ascii representation of the number plus 9 charactes for the " seconds"
924 * and the null character.
925 */
926#ifdef CONFIG_PROC_FS
927static char *time_delta(char buffer[], long time)
928{
929 time -= jiffies;
930 if (time > LongTime / 2)
931 return ("Not scheduled");
932 if (time < 0)
933 time = 0; /* Don't print negative times */
934 sprintf(buffer, "%ld seconds", time / HZ);
935 return (buffer);
936}
937
938/* get Nth element of the linked list */
939static struct strip *strip_get_idx(loff_t pos)
940{
941 struct strip *str;
942 int i = 0;
943
944 list_for_each_entry_rcu(str, &strip_list, list) {
945 if (pos == i)
946 return str;
947 ++i;
948 }
949 return NULL;
950}
951
952static void *strip_seq_start(struct seq_file *seq, loff_t *pos)
953 __acquires(RCU)
954{
955 rcu_read_lock();
956 return *pos ? strip_get_idx(*pos - 1) : SEQ_START_TOKEN;
957}
958
959static void *strip_seq_next(struct seq_file *seq, void *v, loff_t *pos)
960{
961 struct list_head *l;
962 struct strip *s;
963
964 ++*pos;
965 if (v == SEQ_START_TOKEN)
966 return strip_get_idx(1);
967
968 s = v;
969 l = &s->list;
970 list_for_each_continue_rcu(l, &strip_list) {
971 return list_entry(l, struct strip, list);
972 }
973 return NULL;
974}
975
976static void strip_seq_stop(struct seq_file *seq, void *v)
977 __releases(RCU)
978{
979 rcu_read_unlock();
980}
981
982static void strip_seq_neighbours(struct seq_file *seq,
983 const MetricomNodeTable * table,
984 const char *title)
985{
986 /* We wrap this in a do/while loop, so if the table changes */
987 /* while we're reading it, we just go around and try again. */
988 struct timeval t;
989
990 do {
991 int i;
992 t = table->timestamp;
993 if (table->num_nodes)
994 seq_printf(seq, "\n %s\n", title);
995 for (i = 0; i < table->num_nodes; i++) {
996 MetricomNode node;
997
998 spin_lock_bh(&strip_lock);
999 node = table->node[i];
1000 spin_unlock_bh(&strip_lock);
1001 seq_printf(seq, " %s\n", node.c);
1002 }
1003 } while (table->timestamp.tv_sec != t.tv_sec
1004 || table->timestamp.tv_usec != t.tv_usec);
1005}
1006
1007/*
1008 * This function prints radio status information via the seq_file
1009 * interface. The interface takes care of buffer size and over
1010 * run issues.
1011 *
1012 * The buffer in seq_file is PAGESIZE (4K)
1013 * so this routine should never print more or it will get truncated.
1014 * With the maximum of 32 portables and 32 poletops
1015 * reported, the routine outputs 3107 bytes into the buffer.
1016 */
1017static void strip_seq_status_info(struct seq_file *seq,
1018 const struct strip *strip_info)
1019{
1020 char temp[32];
1021 MetricomAddressString addr_string;
1022
1023 /* First, we must copy all of our data to a safe place, */
1024 /* in case a serial interrupt comes in and changes it. */
1025 int tx_left = strip_info->tx_left;
1026 unsigned long rx_average_pps = strip_info->rx_average_pps;
1027 unsigned long tx_average_pps = strip_info->tx_average_pps;
1028 unsigned long sx_average_pps = strip_info->sx_average_pps;
1029 int working = strip_info->working;
1030 int firmware_level = strip_info->firmware_level;
1031 long watchdog_doprobe = strip_info->watchdog_doprobe;
1032 long watchdog_doreset = strip_info->watchdog_doreset;
1033 long gratuitous_arp = strip_info->gratuitous_arp;
1034 long arp_interval = strip_info->arp_interval;
1035 FirmwareVersion firmware_version = strip_info->firmware_version;
1036 SerialNumber serial_number = strip_info->serial_number;
1037 BatteryVoltage battery_voltage = strip_info->battery_voltage;
1038 char *if_name = strip_info->dev->name;
1039 MetricomAddress true_dev_addr = strip_info->true_dev_addr;
1040 MetricomAddress dev_dev_addr =
1041 *(MetricomAddress *) strip_info->dev->dev_addr;
1042 int manual_dev_addr = strip_info->manual_dev_addr;
1043#ifdef EXT_COUNTERS
1044 unsigned long rx_bytes = strip_info->rx_bytes;
1045 unsigned long tx_bytes = strip_info->tx_bytes;
1046 unsigned long rx_rbytes = strip_info->rx_rbytes;
1047 unsigned long tx_rbytes = strip_info->tx_rbytes;
1048 unsigned long rx_sbytes = strip_info->rx_sbytes;
1049 unsigned long tx_sbytes = strip_info->tx_sbytes;
1050 unsigned long rx_ebytes = strip_info->rx_ebytes;
1051 unsigned long tx_ebytes = strip_info->tx_ebytes;
1052#endif
1053
1054 seq_printf(seq, "\nInterface name\t\t%s\n", if_name);
1055 seq_printf(seq, " Radio working:\t\t%s\n", working ? "Yes" : "No");
1056 radio_address_to_string(&true_dev_addr, &addr_string);
1057 seq_printf(seq, " Radio address:\t\t%s\n", addr_string.c);
1058 if (manual_dev_addr) {
1059 radio_address_to_string(&dev_dev_addr, &addr_string);
1060 seq_printf(seq, " Device address:\t%s\n", addr_string.c);
1061 }
1062 seq_printf(seq, " Firmware version:\t%s", !working ? "Unknown" :
1063 !firmware_level ? "Should be upgraded" :
1064 firmware_version.c);
1065 if (firmware_level >= ChecksummedMessages)
1066 seq_printf(seq, " (Checksums Enabled)");
1067 seq_printf(seq, "\n");
1068 seq_printf(seq, " Serial number:\t\t%s\n", serial_number.c);
1069 seq_printf(seq, " Battery voltage:\t%s\n", battery_voltage.c);
1070 seq_printf(seq, " Transmit queue (bytes):%d\n", tx_left);
1071 seq_printf(seq, " Receive packet rate: %ld packets per second\n",
1072 rx_average_pps / 8);
1073 seq_printf(seq, " Transmit packet rate: %ld packets per second\n",
1074 tx_average_pps / 8);
1075 seq_printf(seq, " Sent packet rate: %ld packets per second\n",
1076 sx_average_pps / 8);
1077 seq_printf(seq, " Next watchdog probe:\t%s\n",
1078 time_delta(temp, watchdog_doprobe));
1079 seq_printf(seq, " Next watchdog reset:\t%s\n",
1080 time_delta(temp, watchdog_doreset));
1081 seq_printf(seq, " Next gratuitous ARP:\t");
1082
1083 if (!memcmp
1084 (strip_info->dev->dev_addr, zero_address.c,
1085 sizeof(zero_address)))
1086 seq_printf(seq, "Disabled\n");
1087 else {
1088 seq_printf(seq, "%s\n", time_delta(temp, gratuitous_arp));
1089 seq_printf(seq, " Next ARP interval:\t%ld seconds\n",
1090 JIFFIE_TO_SEC(arp_interval));
1091 }
1092
1093 if (working) {
1094#ifdef EXT_COUNTERS
1095 seq_printf(seq, "\n");
1096 seq_printf(seq,
1097 " Total bytes: \trx:\t%lu\ttx:\t%lu\n",
1098 rx_bytes, tx_bytes);
1099 seq_printf(seq,
1100 " thru radio: \trx:\t%lu\ttx:\t%lu\n",
1101 rx_rbytes, tx_rbytes);
1102 seq_printf(seq,
1103 " thru serial port: \trx:\t%lu\ttx:\t%lu\n",
1104 rx_sbytes, tx_sbytes);
1105 seq_printf(seq,
1106 " Total stat/err bytes:\trx:\t%lu\ttx:\t%lu\n",
1107 rx_ebytes, tx_ebytes);
1108#endif
1109 strip_seq_neighbours(seq, &strip_info->poletops,
1110 "Poletops:");
1111 strip_seq_neighbours(seq, &strip_info->portables,
1112 "Portables:");
1113 }
1114}
1115
1116/*
1117 * This function is exports status information from the STRIP driver through
1118 * the /proc file system.
1119 */
1120static int strip_seq_show(struct seq_file *seq, void *v)
1121{
1122 if (v == SEQ_START_TOKEN)
1123 seq_printf(seq, "strip_version: %s\n", StripVersion);
1124 else
1125 strip_seq_status_info(seq, (const struct strip *)v);
1126 return 0;
1127}
1128
1129
1130static const struct seq_operations strip_seq_ops = {
1131 .start = strip_seq_start,
1132 .next = strip_seq_next,
1133 .stop = strip_seq_stop,
1134 .show = strip_seq_show,
1135};
1136
1137static int strip_seq_open(struct inode *inode, struct file *file)
1138{
1139 return seq_open(file, &strip_seq_ops);
1140}
1141
1142static const struct file_operations strip_seq_fops = {
1143 .owner = THIS_MODULE,
1144 .open = strip_seq_open,
1145 .read = seq_read,
1146 .llseek = seq_lseek,
1147 .release = seq_release,
1148};
1149#endif
1150
1151
1152
1153/************************************************************************/
1154/* Sending routines */
1155
1156static void ResetRadio(struct strip *strip_info)
1157{
1158 struct tty_struct *tty = strip_info->tty;
1159 static const char init[] = "ate0q1dt**starmode\r**";
1160 StringDescriptor s = { init, sizeof(init) - 1 };
1161
1162 /*
1163 * If the radio isn't working anymore,
1164 * we should clear the old status information.
1165 */
1166 if (strip_info->working) {
1167 printk(KERN_INFO "%s: No response: Resetting radio.\n",
1168 strip_info->dev->name);
1169 strip_info->firmware_version.c[0] = '\0';
1170 strip_info->serial_number.c[0] = '\0';
1171 strip_info->battery_voltage.c[0] = '\0';
1172 strip_info->portables.num_nodes = 0;
1173 do_gettimeofday(&strip_info->portables.timestamp);
1174 strip_info->poletops.num_nodes = 0;
1175 do_gettimeofday(&strip_info->poletops.timestamp);
1176 }
1177
1178 strip_info->pps_timer = jiffies;
1179 strip_info->rx_pps_count = 0;
1180 strip_info->tx_pps_count = 0;
1181 strip_info->sx_pps_count = 0;
1182 strip_info->rx_average_pps = 0;
1183 strip_info->tx_average_pps = 0;
1184 strip_info->sx_average_pps = 0;
1185
1186 /* Mark radio address as unknown */
1187 *(MetricomAddress *) & strip_info->true_dev_addr = zero_address;
1188 if (!strip_info->manual_dev_addr)
1189 *(MetricomAddress *) strip_info->dev->dev_addr =
1190 zero_address;
1191 strip_info->working = FALSE;
1192 strip_info->firmware_level = NoStructure;
1193 strip_info->next_command = CompatibilityCommand;
1194 strip_info->watchdog_doprobe = jiffies + 10 * HZ;
1195 strip_info->watchdog_doreset = jiffies + 1 * HZ;
1196
1197 /* If the user has selected a baud rate above 38.4 see what magic we have to do */
1198 if (strip_info->user_baud > 38400) {
1199 /*
1200 * Subtle stuff: Pay attention :-)
1201 * If the serial port is currently at the user's selected (>38.4) rate,
1202 * then we temporarily switch to 19.2 and issue the ATS304 command
1203 * to tell the radio to switch to the user's selected rate.
1204 * If the serial port is not currently at that rate, that means we just
1205 * issued the ATS304 command last time through, so this time we restore
1206 * the user's selected rate and issue the normal starmode reset string.
1207 */
1208 if (strip_info->user_baud == tty_get_baud_rate(tty)) {
1209 static const char b0[] = "ate0q1s304=57600\r";
1210 static const char b1[] = "ate0q1s304=115200\r";
1211 static const StringDescriptor baudstring[2] =
1212 { {b0, sizeof(b0) - 1}
1213 , {b1, sizeof(b1) - 1}
1214 };
1215 set_baud(tty, 19200);
1216 if (strip_info->user_baud == 57600)
1217 s = baudstring[0];
1218 else if (strip_info->user_baud == 115200)
1219 s = baudstring[1];
1220 else
1221 s = baudstring[1]; /* For now */
1222 } else
1223 set_baud(tty, strip_info->user_baud);
1224 }
1225
1226 tty->ops->write(tty, s.string, s.length);
1227#ifdef EXT_COUNTERS
1228 strip_info->tx_ebytes += s.length;
1229#endif
1230}
1231
1232/*
1233 * Called by the driver when there's room for more data. If we have
1234 * more packets to send, we send them here.
1235 */
1236
1237static void strip_write_some_more(struct tty_struct *tty)
1238{
1239 struct strip *strip_info = tty->disc_data;
1240
1241 /* First make sure we're connected. */
1242 if (!strip_info || strip_info->magic != STRIP_MAGIC ||
1243 !netif_running(strip_info->dev))
1244 return;
1245
1246 if (strip_info->tx_left > 0) {
1247 int num_written =
1248 tty->ops->write(tty, strip_info->tx_head,
1249 strip_info->tx_left);
1250 strip_info->tx_left -= num_written;
1251 strip_info->tx_head += num_written;
1252#ifdef EXT_COUNTERS
1253 strip_info->tx_sbytes += num_written;
1254#endif
1255 } else { /* Else start transmission of another packet */
1256
1257 clear_bit(TTY_DO_WRITE_WAKEUP, &tty->flags);
1258 strip_unlock(strip_info);
1259 }
1260}
1261
1262static __u8 *add_checksum(__u8 * buffer, __u8 * end)
1263{
1264 __u16 sum = 0;
1265 __u8 *p = buffer;
1266 while (p < end)
1267 sum += *p++;
1268 end[3] = hextable[sum & 0xF];
1269 sum >>= 4;
1270 end[2] = hextable[sum & 0xF];
1271 sum >>= 4;
1272 end[1] = hextable[sum & 0xF];
1273 sum >>= 4;
1274 end[0] = hextable[sum & 0xF];
1275 return (end + 4);
1276}
1277
1278static unsigned char *strip_make_packet(unsigned char *buffer,
1279 struct strip *strip_info,
1280 struct sk_buff *skb)
1281{
1282 __u8 *ptr = buffer;
1283 __u8 *stuffstate = NULL;
1284 STRIP_Header *header = (STRIP_Header *) skb->data;
1285 MetricomAddress haddr = header->dst_addr;
1286 int len = skb->len - sizeof(STRIP_Header);
1287 MetricomKey key;
1288
1289 /*HexDump("strip_make_packet", strip_info, skb->data, skb->data + skb->len); */
1290
1291 if (header->protocol == htons(ETH_P_IP))
1292 key = SIP0Key;
1293 else if (header->protocol == htons(ETH_P_ARP))
1294 key = ARP0Key;
1295 else {
1296 printk(KERN_ERR
1297 "%s: strip_make_packet: Unknown packet type 0x%04X\n",
1298 strip_info->dev->name, ntohs(header->protocol));
1299 return (NULL);
1300 }
1301
1302 if (len > strip_info->mtu) {
1303 printk(KERN_ERR
1304 "%s: Dropping oversized transmit packet: %d bytes\n",
1305 strip_info->dev->name, len);
1306 return (NULL);
1307 }
1308
1309 /*
1310 * If we're sending to ourselves, discard the packet.
1311 * (Metricom radios choke if they try to send a packet to their own address.)
1312 */
1313 if (!memcmp(haddr.c, strip_info->true_dev_addr.c, sizeof(haddr))) {
1314 printk(KERN_ERR "%s: Dropping packet addressed to self\n",
1315 strip_info->dev->name);
1316 return (NULL);
1317 }
1318
1319 /*
1320 * If this is a broadcast packet, send it to our designated Metricom
1321 * 'broadcast hub' radio (First byte of address being 0xFF means broadcast)
1322 */
1323 if (haddr.c[0] == 0xFF) {
1324 __be32 brd = 0;
1325 struct in_device *in_dev;
1326
1327 rcu_read_lock();
1328 in_dev = __in_dev_get_rcu(strip_info->dev);
1329 if (in_dev == NULL) {
1330 rcu_read_unlock();
1331 return NULL;
1332 }
1333 if (in_dev->ifa_list)
1334 brd = in_dev->ifa_list->ifa_broadcast;
1335 rcu_read_unlock();
1336
1337 /* arp_query returns 1 if it succeeds in looking up the address, 0 if it fails */
1338 if (!arp_query(haddr.c, brd, strip_info->dev)) {
1339 printk(KERN_ERR
1340 "%s: Unable to send packet (no broadcast hub configured)\n",
1341 strip_info->dev->name);
1342 return (NULL);
1343 }
1344 /*
1345 * If we are the broadcast hub, don't bother sending to ourselves.
1346 * (Metricom radios choke if they try to send a packet to their own address.)
1347 */
1348 if (!memcmp
1349 (haddr.c, strip_info->true_dev_addr.c, sizeof(haddr)))
1350 return (NULL);
1351 }
1352
1353 *ptr++ = 0x0D;
1354 *ptr++ = '*';
1355 *ptr++ = hextable[haddr.c[2] >> 4];
1356 *ptr++ = hextable[haddr.c[2] & 0xF];
1357 *ptr++ = hextable[haddr.c[3] >> 4];
1358 *ptr++ = hextable[haddr.c[3] & 0xF];
1359 *ptr++ = '-';
1360 *ptr++ = hextable[haddr.c[4] >> 4];
1361 *ptr++ = hextable[haddr.c[4] & 0xF];
1362 *ptr++ = hextable[haddr.c[5] >> 4];
1363 *ptr++ = hextable[haddr.c[5] & 0xF];
1364 *ptr++ = '*';
1365 *ptr++ = key.c[0];
1366 *ptr++ = key.c[1];
1367 *ptr++ = key.c[2];
1368 *ptr++ = key.c[3];
1369
1370 ptr =
1371 StuffData(skb->data + sizeof(STRIP_Header), len, ptr,
1372 &stuffstate);
1373
1374 if (strip_info->firmware_level >= ChecksummedMessages)
1375 ptr = add_checksum(buffer + 1, ptr);
1376
1377 *ptr++ = 0x0D;
1378 return (ptr);
1379}
1380
1381static void strip_send(struct strip *strip_info, struct sk_buff *skb)
1382{
1383 MetricomAddress haddr;
1384 unsigned char *ptr = strip_info->tx_buff;
1385 int doreset = (long) jiffies - strip_info->watchdog_doreset >= 0;
1386 int doprobe = (long) jiffies - strip_info->watchdog_doprobe >= 0
1387 && !doreset;
1388 __be32 addr, brd;
1389
1390 /*
1391 * 1. If we have a packet, encapsulate it and put it in the buffer
1392 */
1393 if (skb) {
1394 char *newptr = strip_make_packet(ptr, strip_info, skb);
1395 strip_info->tx_pps_count++;
1396 if (!newptr)
1397 strip_info->tx_dropped++;
1398 else {
1399 ptr = newptr;
1400 strip_info->sx_pps_count++;
1401 strip_info->tx_packets++; /* Count another successful packet */
1402#ifdef EXT_COUNTERS
1403 strip_info->tx_bytes += skb->len;
1404 strip_info->tx_rbytes += ptr - strip_info->tx_buff;
1405#endif
1406 /*DumpData("Sending:", strip_info, strip_info->tx_buff, ptr); */
1407 /*HexDump("Sending", strip_info, strip_info->tx_buff, ptr); */
1408 }
1409 }
1410
1411 /*
1412 * 2. If it is time for another tickle, tack it on, after the packet
1413 */
1414 if (doprobe) {
1415 StringDescriptor ts = CommandString[strip_info->next_command];
1416#if TICKLE_TIMERS
1417 {
1418 struct timeval tv;
1419 do_gettimeofday(&tv);
1420 printk(KERN_INFO "**** Sending tickle string %d at %02d.%06d\n",
1421 strip_info->next_command, tv.tv_sec % 100,
1422 tv.tv_usec);
1423 }
1424#endif
1425 if (ptr == strip_info->tx_buff)
1426 *ptr++ = 0x0D;
1427
1428 *ptr++ = '*'; /* First send "**" to provoke an error message */
1429 *ptr++ = '*';
1430
1431 /* Then add the command */
1432 memcpy(ptr, ts.string, ts.length);
1433
1434 /* Add a checksum ? */
1435 if (strip_info->firmware_level < ChecksummedMessages)
1436 ptr += ts.length;
1437 else
1438 ptr = add_checksum(ptr, ptr + ts.length);
1439
1440 *ptr++ = 0x0D; /* Terminate the command with a <CR> */
1441
1442 /* Cycle to next periodic command? */
1443 if (strip_info->firmware_level >= StructuredMessages)
1444 if (++strip_info->next_command >=
1445 ARRAY_SIZE(CommandString))
1446 strip_info->next_command = 0;
1447#ifdef EXT_COUNTERS
1448 strip_info->tx_ebytes += ts.length;
1449#endif
1450 strip_info->watchdog_doprobe = jiffies + 10 * HZ;
1451 strip_info->watchdog_doreset = jiffies + 1 * HZ;
1452 /*printk(KERN_INFO "%s: Routine radio test.\n", strip_info->dev->name); */
1453 }
1454
1455 /*
1456 * 3. Set up the strip_info ready to send the data (if any).
1457 */
1458 strip_info->tx_head = strip_info->tx_buff;
1459 strip_info->tx_left = ptr - strip_info->tx_buff;
1460 set_bit(TTY_DO_WRITE_WAKEUP, &strip_info->tty->flags);
1461 /*
1462 * 4. Debugging check to make sure we're not overflowing the buffer.
1463 */
1464 if (strip_info->tx_size - strip_info->tx_left < 20)
1465 printk(KERN_ERR "%s: Sending%5d bytes;%5d bytes free.\n",
1466 strip_info->dev->name, strip_info->tx_left,
1467 strip_info->tx_size - strip_info->tx_left);
1468
1469 /*
1470 * 5. If watchdog has expired, reset the radio. Note: if there's data waiting in
1471 * the buffer, strip_write_some_more will send it after the reset has finished
1472 */
1473 if (doreset) {
1474 ResetRadio(strip_info);
1475 return;
1476 }
1477
1478 if (1) {
1479 struct in_device *in_dev;
1480
1481 brd = addr = 0;
1482 rcu_read_lock();
1483 in_dev = __in_dev_get_rcu(strip_info->dev);
1484 if (in_dev) {
1485 if (in_dev->ifa_list) {
1486 brd = in_dev->ifa_list->ifa_broadcast;
1487 addr = in_dev->ifa_list->ifa_local;
1488 }
1489 }
1490 rcu_read_unlock();
1491 }
1492
1493
1494 /*
1495 * 6. If it is time for a periodic ARP, queue one up to be sent.
1496 * We only do this if:
1497 * 1. The radio is working
1498 * 2. It's time to send another periodic ARP
1499 * 3. We really know what our address is (and it is not manually set to zero)
1500 * 4. We have a designated broadcast address configured
1501 * If we queue up an ARP packet when we don't have a designated broadcast
1502 * address configured, then the packet will just have to be discarded in
1503 * strip_make_packet. This is not fatal, but it causes misleading information
1504 * to be displayed in tcpdump. tcpdump will report that periodic APRs are
1505 * being sent, when in fact they are not, because they are all being dropped
1506 * in the strip_make_packet routine.
1507 */
1508 if (strip_info->working
1509 && (long) jiffies - strip_info->gratuitous_arp >= 0
1510 && memcmp(strip_info->dev->dev_addr, zero_address.c,
1511 sizeof(zero_address))
1512 && arp_query(haddr.c, brd, strip_info->dev)) {
1513 /*printk(KERN_INFO "%s: Sending gratuitous ARP with interval %ld\n",
1514 strip_info->dev->name, strip_info->arp_interval / HZ); */
1515 strip_info->gratuitous_arp =
1516 jiffies + strip_info->arp_interval;
1517 strip_info->arp_interval *= 2;
1518 if (strip_info->arp_interval > MaxARPInterval)
1519 strip_info->arp_interval = MaxARPInterval;
1520 if (addr)
1521 arp_send(ARPOP_REPLY, ETH_P_ARP, addr, /* Target address of ARP packet is our address */
1522 strip_info->dev, /* Device to send packet on */
1523 addr, /* Source IP address this ARP packet comes from */
1524 NULL, /* Destination HW address is NULL (broadcast it) */
1525 strip_info->dev->dev_addr, /* Source HW address is our HW address */
1526 strip_info->dev->dev_addr); /* Target HW address is our HW address (redundant) */
1527 }
1528
1529 /*
1530 * 7. All ready. Start the transmission
1531 */
1532 strip_write_some_more(strip_info->tty);
1533}
1534
1535/* Encapsulate a datagram and kick it into a TTY queue. */
1536static netdev_tx_t strip_xmit(struct sk_buff *skb, struct net_device *dev)
1537{
1538 struct strip *strip_info = netdev_priv(dev);
1539
1540 if (!netif_running(dev)) {
1541 printk(KERN_ERR "%s: xmit call when iface is down\n",
1542 dev->name);
1543 return NETDEV_TX_BUSY;
1544 }
1545
1546 netif_stop_queue(dev);
1547
1548 del_timer(&strip_info->idle_timer);
1549
1550
1551 if (time_after(jiffies, strip_info->pps_timer + HZ)) {
1552 unsigned long t = jiffies - strip_info->pps_timer;
1553 unsigned long rx_pps_count =
1554 DIV_ROUND_CLOSEST(strip_info->rx_pps_count*HZ*8, t);
1555 unsigned long tx_pps_count =
1556 DIV_ROUND_CLOSEST(strip_info->tx_pps_count*HZ*8, t);
1557 unsigned long sx_pps_count =
1558 DIV_ROUND_CLOSEST(strip_info->sx_pps_count*HZ*8, t);
1559
1560 strip_info->pps_timer = jiffies;
1561 strip_info->rx_pps_count = 0;
1562 strip_info->tx_pps_count = 0;
1563 strip_info->sx_pps_count = 0;
1564
1565 strip_info->rx_average_pps = (strip_info->rx_average_pps + rx_pps_count + 1) / 2;
1566 strip_info->tx_average_pps = (strip_info->tx_average_pps + tx_pps_count + 1) / 2;
1567 strip_info->sx_average_pps = (strip_info->sx_average_pps + sx_pps_count + 1) / 2;
1568
1569 if (rx_pps_count / 8 >= 10)
1570 printk(KERN_INFO "%s: WARNING: Receiving %ld packets per second.\n",
1571 strip_info->dev->name, rx_pps_count / 8);
1572 if (tx_pps_count / 8 >= 10)
1573 printk(KERN_INFO "%s: WARNING: Tx %ld packets per second.\n",
1574 strip_info->dev->name, tx_pps_count / 8);
1575 if (sx_pps_count / 8 >= 10)
1576 printk(KERN_INFO "%s: WARNING: Sending %ld packets per second.\n",
1577 strip_info->dev->name, sx_pps_count / 8);
1578 }
1579
1580 spin_lock_bh(&strip_lock);
1581
1582 strip_send(strip_info, skb);
1583
1584 spin_unlock_bh(&strip_lock);
1585
1586 if (skb)
1587 dev_kfree_skb(skb);
1588 return NETDEV_TX_OK;
1589}
1590
1591/*
1592 * IdleTask periodically calls strip_xmit, so even when we have no IP packets
1593 * to send for an extended period of time, the watchdog processing still gets
1594 * done to ensure that the radio stays in Starmode
1595 */
1596
1597static void strip_IdleTask(unsigned long parameter)
1598{
1599 strip_xmit(NULL, (struct net_device *) parameter);
1600}
1601
1602/*
1603 * Create the MAC header for an arbitrary protocol layer
1604 *
1605 * saddr!=NULL means use this specific address (n/a for Metricom)
1606 * saddr==NULL means use default device source address
1607 * daddr!=NULL means use this destination address
1608 * daddr==NULL means leave destination address alone
1609 * (e.g. unresolved arp -- kernel will call
1610 * rebuild_header later to fill in the address)
1611 */
1612
1613static int strip_header(struct sk_buff *skb, struct net_device *dev,
1614 unsigned short type, const void *daddr,
1615 const void *saddr, unsigned len)
1616{
1617 struct strip *strip_info = netdev_priv(dev);
1618 STRIP_Header *header = (STRIP_Header *) skb_push(skb, sizeof(STRIP_Header));
1619
1620 /*printk(KERN_INFO "%s: strip_header 0x%04X %s\n", dev->name, type,
1621 type == ETH_P_IP ? "IP" : type == ETH_P_ARP ? "ARP" : ""); */
1622
1623 header->src_addr = strip_info->true_dev_addr;
1624 header->protocol = htons(type);
1625
1626 /*HexDump("strip_header", netdev_priv(dev), skb->data, skb->data + skb->len); */
1627
1628 if (!daddr)
1629 return (-dev->hard_header_len);
1630
1631 header->dst_addr = *(MetricomAddress *) daddr;
1632 return (dev->hard_header_len);
1633}
1634
1635/*
1636 * Rebuild the MAC header. This is called after an ARP
1637 * (or in future other address resolution) has completed on this
1638 * sk_buff. We now let ARP fill in the other fields.
1639 * I think this should return zero if packet is ready to send,
1640 * or non-zero if it needs more time to do an address lookup
1641 */
1642
1643static int strip_rebuild_header(struct sk_buff *skb)
1644{
1645#ifdef CONFIG_INET
1646 STRIP_Header *header = (STRIP_Header *) skb->data;
1647
1648 /* Arp find returns zero if if knows the address, */
1649 /* or if it doesn't know the address it sends an ARP packet and returns non-zero */
1650 return arp_find(header->dst_addr.c, skb) ? 1 : 0;
1651#else
1652 return 0;
1653#endif
1654}
1655
1656
1657/************************************************************************/
1658/* Receiving routines */
1659
1660/*
1661 * This function parses the response to the ATS300? command,
1662 * extracting the radio version and serial number.
1663 */
1664static void get_radio_version(struct strip *strip_info, __u8 * ptr, __u8 * end)
1665{
1666 __u8 *p, *value_begin, *value_end;
1667 int len;
1668
1669 /* Determine the beginning of the second line of the payload */
1670 p = ptr;
1671 while (p < end && *p != 10)
1672 p++;
1673 if (p >= end)
1674 return;
1675 p++;
1676 value_begin = p;
1677
1678 /* Determine the end of line */
1679 while (p < end && *p != 10)
1680 p++;
1681 if (p >= end)
1682 return;
1683 value_end = p;
1684 p++;
1685
1686 len = value_end - value_begin;
1687 len = min_t(int, len, sizeof(FirmwareVersion) - 1);
1688 if (strip_info->firmware_version.c[0] == 0)
1689 printk(KERN_INFO "%s: Radio Firmware: %.*s\n",
1690 strip_info->dev->name, len, value_begin);
1691 sprintf(strip_info->firmware_version.c, "%.*s", len, value_begin);
1692
1693 /* Look for the first colon */
1694 while (p < end && *p != ':')
1695 p++;
1696 if (p >= end)
1697 return;
1698 /* Skip over the space */
1699 p += 2;
1700 len = sizeof(SerialNumber) - 1;
1701 if (p + len <= end) {
1702 sprintf(strip_info->serial_number.c, "%.*s", len, p);
1703 } else {
1704 printk(KERN_DEBUG
1705 "STRIP: radio serial number shorter (%zd) than expected (%d)\n",
1706 end - p, len);
1707 }
1708}
1709
1710/*
1711 * This function parses the response to the ATS325? command,
1712 * extracting the radio battery voltage.
1713 */
1714static void get_radio_voltage(struct strip *strip_info, __u8 * ptr, __u8 * end)
1715{
1716 int len;
1717
1718 len = sizeof(BatteryVoltage) - 1;
1719 if (ptr + len <= end) {
1720 sprintf(strip_info->battery_voltage.c, "%.*s", len, ptr);
1721 } else {
1722 printk(KERN_DEBUG
1723 "STRIP: radio voltage string shorter (%zd) than expected (%d)\n",
1724 end - ptr, len);
1725 }
1726}
1727
1728/*
1729 * This function parses the responses to the AT~LA and ATS311 commands,
1730 * which list the radio's neighbours.
1731 */
1732static void get_radio_neighbours(MetricomNodeTable * table, __u8 * ptr, __u8 * end)
1733{
1734 table->num_nodes = 0;
1735 while (ptr < end && table->num_nodes < NODE_TABLE_SIZE) {
1736 MetricomNode *node = &table->node[table->num_nodes++];
1737 char *dst = node->c, *limit = dst + sizeof(*node) - 1;
1738 while (ptr < end && *ptr <= 32)
1739 ptr++;
1740 while (ptr < end && dst < limit && *ptr != 10)
1741 *dst++ = *ptr++;
1742 *dst++ = 0;
1743 while (ptr < end && ptr[-1] != 10)
1744 ptr++;
1745 }
1746 do_gettimeofday(&table->timestamp);
1747}
1748
1749static int get_radio_address(struct strip *strip_info, __u8 * p)
1750{
1751 MetricomAddress addr;
1752
1753 if (string_to_radio_address(&addr, p))
1754 return (1);
1755
1756 /* See if our radio address has changed */
1757 if (memcmp(strip_info->true_dev_addr.c, addr.c, sizeof(addr))) {
1758 MetricomAddressString addr_string;
1759 radio_address_to_string(&addr, &addr_string);
1760 printk(KERN_INFO "%s: Radio address = %s\n",
1761 strip_info->dev->name, addr_string.c);
1762 strip_info->true_dev_addr = addr;
1763 if (!strip_info->manual_dev_addr)
1764 *(MetricomAddress *) strip_info->dev->dev_addr =
1765 addr;
1766 /* Give the radio a few seconds to get its head straight, then send an arp */
1767 strip_info->gratuitous_arp = jiffies + 15 * HZ;
1768 strip_info->arp_interval = 1 * HZ;
1769 }
1770 return (0);
1771}
1772
1773static int verify_checksum(struct strip *strip_info)
1774{
1775 __u8 *p = strip_info->sx_buff;
1776 __u8 *end = strip_info->sx_buff + strip_info->sx_count - 4;
1777 u_short sum =
1778 (READHEX16(end[0]) << 12) | (READHEX16(end[1]) << 8) |
1779 (READHEX16(end[2]) << 4) | (READHEX16(end[3]));
1780 while (p < end)
1781 sum -= *p++;
1782 if (sum == 0 && strip_info->firmware_level == StructuredMessages) {
1783 strip_info->firmware_level = ChecksummedMessages;
1784 printk(KERN_INFO "%s: Radio provides message checksums\n",
1785 strip_info->dev->name);
1786 }
1787 return (sum == 0);
1788}
1789
1790static void RecvErr(char *msg, struct strip *strip_info)
1791{
1792 __u8 *ptr = strip_info->sx_buff;
1793 __u8 *end = strip_info->sx_buff + strip_info->sx_count;
1794 DumpData(msg, strip_info, ptr, end);
1795 strip_info->rx_errors++;
1796}
1797
1798static void RecvErr_Message(struct strip *strip_info, __u8 * sendername,
1799 const __u8 * msg, u_long len)
1800{
1801 if (has_prefix(msg, len, "001")) { /* Not in StarMode! */
1802 RecvErr("Error Msg:", strip_info);
1803 printk(KERN_INFO "%s: Radio %s is not in StarMode\n",
1804 strip_info->dev->name, sendername);
1805 }
1806
1807 else if (has_prefix(msg, len, "002")) { /* Remap handle */
1808 /* We ignore "Remap handle" messages for now */
1809 }
1810
1811 else if (has_prefix(msg, len, "003")) { /* Can't resolve name */
1812 RecvErr("Error Msg:", strip_info);
1813 printk(KERN_INFO "%s: Destination radio name is unknown\n",
1814 strip_info->dev->name);
1815 }
1816
1817 else if (has_prefix(msg, len, "004")) { /* Name too small or missing */
1818 strip_info->watchdog_doreset = jiffies + LongTime;
1819#if TICKLE_TIMERS
1820 {
1821 struct timeval tv;
1822 do_gettimeofday(&tv);
1823 printk(KERN_INFO
1824 "**** Got ERR_004 response at %02d.%06d\n",
1825 tv.tv_sec % 100, tv.tv_usec);
1826 }
1827#endif
1828 if (!strip_info->working) {
1829 strip_info->working = TRUE;
1830 printk(KERN_INFO "%s: Radio now in starmode\n",
1831 strip_info->dev->name);
1832 /*
1833 * If the radio has just entered a working state, we should do our first
1834 * probe ASAP, so that we find out our radio address etc. without delay.
1835 */
1836 strip_info->watchdog_doprobe = jiffies;
1837 }
1838 if (strip_info->firmware_level == NoStructure && sendername) {
1839 strip_info->firmware_level = StructuredMessages;
1840 strip_info->next_command = 0; /* Try to enable checksums ASAP */
1841 printk(KERN_INFO
1842 "%s: Radio provides structured messages\n",
1843 strip_info->dev->name);
1844 }
1845 if (strip_info->firmware_level >= StructuredMessages) {
1846 /*
1847 * If this message has a valid checksum on the end, then the call to verify_checksum
1848 * will elevate the firmware_level to ChecksummedMessages for us. (The actual return
1849 * code from verify_checksum is ignored here.)
1850 */
1851 verify_checksum(strip_info);
1852 /*
1853 * If the radio has structured messages but we don't yet have all our information about it,
1854 * we should do probes without delay, until we have gathered all the information
1855 */
1856 if (!GOT_ALL_RADIO_INFO(strip_info))
1857 strip_info->watchdog_doprobe = jiffies;
1858 }
1859 }
1860
1861 else if (has_prefix(msg, len, "005")) /* Bad count specification */
1862 RecvErr("Error Msg:", strip_info);
1863
1864 else if (has_prefix(msg, len, "006")) /* Header too big */
1865 RecvErr("Error Msg:", strip_info);
1866
1867 else if (has_prefix(msg, len, "007")) { /* Body too big */
1868 RecvErr("Error Msg:", strip_info);
1869 printk(KERN_ERR
1870 "%s: Error! Packet size too big for radio.\n",
1871 strip_info->dev->name);
1872 }
1873
1874 else if (has_prefix(msg, len, "008")) { /* Bad character in name */
1875 RecvErr("Error Msg:", strip_info);
1876 printk(KERN_ERR
1877 "%s: Radio name contains illegal character\n",
1878 strip_info->dev->name);
1879 }
1880
1881 else if (has_prefix(msg, len, "009")) /* No count or line terminator */
1882 RecvErr("Error Msg:", strip_info);
1883
1884 else if (has_prefix(msg, len, "010")) /* Invalid checksum */
1885 RecvErr("Error Msg:", strip_info);
1886
1887 else if (has_prefix(msg, len, "011")) /* Checksum didn't match */
1888 RecvErr("Error Msg:", strip_info);
1889
1890 else if (has_prefix(msg, len, "012")) /* Failed to transmit packet */
1891 RecvErr("Error Msg:", strip_info);
1892
1893 else
1894 RecvErr("Error Msg:", strip_info);
1895}
1896
1897static void process_AT_response(struct strip *strip_info, __u8 * ptr,
1898 __u8 * end)
1899{
1900 u_long len;
1901 __u8 *p = ptr;
1902 while (p < end && p[-1] != 10)
1903 p++; /* Skip past first newline character */
1904 /* Now ptr points to the AT command, and p points to the text of the response. */
1905 len = p - ptr;
1906
1907#if TICKLE_TIMERS
1908 {
1909 struct timeval tv;
1910 do_gettimeofday(&tv);
1911 printk(KERN_INFO "**** Got AT response %.7s at %02d.%06d\n",
1912 ptr, tv.tv_sec % 100, tv.tv_usec);
1913 }
1914#endif
1915
1916 if (has_prefix(ptr, len, "ATS300?"))
1917 get_radio_version(strip_info, p, end);
1918 else if (has_prefix(ptr, len, "ATS305?"))
1919 get_radio_address(strip_info, p);
1920 else if (has_prefix(ptr, len, "ATS311?"))
1921 get_radio_neighbours(&strip_info->poletops, p, end);
1922 else if (has_prefix(ptr, len, "ATS319=7"))
1923 verify_checksum(strip_info);
1924 else if (has_prefix(ptr, len, "ATS325?"))
1925 get_radio_voltage(strip_info, p, end);
1926 else if (has_prefix(ptr, len, "AT~LA"))
1927 get_radio_neighbours(&strip_info->portables, p, end);
1928 else
1929 RecvErr("Unknown AT Response:", strip_info);
1930}
1931
1932static void process_ACK(struct strip *strip_info, __u8 * ptr, __u8 * end)
1933{
1934 /* Currently we don't do anything with ACKs from the radio */
1935}
1936
1937static void process_Info(struct strip *strip_info, __u8 * ptr, __u8 * end)
1938{
1939 if (ptr + 16 > end)
1940 RecvErr("Bad Info Msg:", strip_info);
1941}
1942
1943static struct net_device *get_strip_dev(struct strip *strip_info)
1944{
1945 /* If our hardware address is *manually set* to zero, and we know our */
1946 /* real radio hardware address, try to find another strip device that has been */
1947 /* manually set to that address that we can 'transfer ownership' of this packet to */
1948 if (strip_info->manual_dev_addr &&
1949 !memcmp(strip_info->dev->dev_addr, zero_address.c,
1950 sizeof(zero_address))
1951 && memcmp(&strip_info->true_dev_addr, zero_address.c,
1952 sizeof(zero_address))) {
1953 struct net_device *dev;
1954 read_lock_bh(&dev_base_lock);
1955 for_each_netdev(&init_net, dev) {
1956 if (dev->type == strip_info->dev->type &&
1957 !memcmp(dev->dev_addr,
1958 &strip_info->true_dev_addr,
1959 sizeof(MetricomAddress))) {
1960 printk(KERN_INFO
1961 "%s: Transferred packet ownership to %s.\n",
1962 strip_info->dev->name, dev->name);
1963 read_unlock_bh(&dev_base_lock);
1964 return (dev);
1965 }
1966 }
1967 read_unlock_bh(&dev_base_lock);
1968 }
1969 return (strip_info->dev);
1970}
1971
1972/*
1973 * Send one completely decapsulated datagram to the next layer.
1974 */
1975
1976static void deliver_packet(struct strip *strip_info, STRIP_Header * header,
1977 __u16 packetlen)
1978{
1979 struct sk_buff *skb = dev_alloc_skb(sizeof(STRIP_Header) + packetlen);
1980 if (!skb) {
1981 printk(KERN_ERR "%s: memory squeeze, dropping packet.\n",
1982 strip_info->dev->name);
1983 strip_info->rx_dropped++;
1984 } else {
1985 memcpy(skb_put(skb, sizeof(STRIP_Header)), header,
1986 sizeof(STRIP_Header));
1987 memcpy(skb_put(skb, packetlen), strip_info->rx_buff,
1988 packetlen);
1989 skb->dev = get_strip_dev(strip_info);
1990 skb->protocol = header->protocol;
1991 skb_reset_mac_header(skb);
1992
1993 /* Having put a fake header on the front of the sk_buff for the */
1994 /* benefit of tools like tcpdump, skb_pull now 'consumes' that */
1995 /* fake header before we hand the packet up to the next layer. */
1996 skb_pull(skb, sizeof(STRIP_Header));
1997
1998 /* Finally, hand the packet up to the next layer (e.g. IP or ARP, etc.) */
1999 strip_info->rx_packets++;
2000 strip_info->rx_pps_count++;
2001#ifdef EXT_COUNTERS
2002 strip_info->rx_bytes += packetlen;
2003#endif
2004 netif_rx(skb);
2005 }
2006}
2007
2008static void process_IP_packet(struct strip *strip_info,
2009 STRIP_Header * header, __u8 * ptr,
2010 __u8 * end)
2011{
2012 __u16 packetlen;
2013
2014 /* Decode start of the IP packet header */
2015 ptr = UnStuffData(ptr, end, strip_info->rx_buff, 4);
2016 if (!ptr) {
2017 RecvErr("IP Packet too short", strip_info);
2018 return;
2019 }
2020
2021 packetlen = ((__u16) strip_info->rx_buff[2] << 8) | strip_info->rx_buff[3];
2022
2023 if (packetlen > MAX_RECV_MTU) {
2024 printk(KERN_INFO "%s: Dropping oversized received IP packet: %d bytes\n",
2025 strip_info->dev->name, packetlen);
2026 strip_info->rx_dropped++;
2027 return;
2028 }
2029
2030 /*printk(KERN_INFO "%s: Got %d byte IP packet\n", strip_info->dev->name, packetlen); */
2031
2032 /* Decode remainder of the IP packet */
2033 ptr =
2034 UnStuffData(ptr, end, strip_info->rx_buff + 4, packetlen - 4);
2035 if (!ptr) {
2036 RecvErr("IP Packet too short", strip_info);
2037 return;
2038 }
2039
2040 if (ptr < end) {
2041 RecvErr("IP Packet too long", strip_info);
2042 return;
2043 }
2044
2045 header->protocol = htons(ETH_P_IP);
2046
2047 deliver_packet(strip_info, header, packetlen);
2048}
2049
2050static void process_ARP_packet(struct strip *strip_info,
2051 STRIP_Header * header, __u8 * ptr,
2052 __u8 * end)
2053{
2054 __u16 packetlen;
2055 struct arphdr *arphdr = (struct arphdr *) strip_info->rx_buff;
2056
2057 /* Decode start of the ARP packet */
2058 ptr = UnStuffData(ptr, end, strip_info->rx_buff, 8);
2059 if (!ptr) {
2060 RecvErr("ARP Packet too short", strip_info);
2061 return;
2062 }
2063
2064 packetlen = 8 + (arphdr->ar_hln + arphdr->ar_pln) * 2;
2065
2066 if (packetlen > MAX_RECV_MTU) {
2067 printk(KERN_INFO
2068 "%s: Dropping oversized received ARP packet: %d bytes\n",
2069 strip_info->dev->name, packetlen);
2070 strip_info->rx_dropped++;
2071 return;
2072 }
2073
2074 /*printk(KERN_INFO "%s: Got %d byte ARP %s\n",
2075 strip_info->dev->name, packetlen,
2076 ntohs(arphdr->ar_op) == ARPOP_REQUEST ? "request" : "reply"); */
2077
2078 /* Decode remainder of the ARP packet */
2079 ptr =
2080 UnStuffData(ptr, end, strip_info->rx_buff + 8, packetlen - 8);
2081 if (!ptr) {
2082 RecvErr("ARP Packet too short", strip_info);
2083 return;
2084 }
2085
2086 if (ptr < end) {
2087 RecvErr("ARP Packet too long", strip_info);
2088 return;
2089 }
2090
2091 header->protocol = htons(ETH_P_ARP);
2092
2093 deliver_packet(strip_info, header, packetlen);
2094}
2095
2096/*
2097 * process_text_message processes a <CR>-terminated block of data received
2098 * from the radio that doesn't begin with a '*' character. All normal
2099 * Starmode communication messages with the radio begin with a '*',
2100 * so any text that does not indicates a serial port error, a radio that
2101 * is in Hayes command mode instead of Starmode, or a radio with really
2102 * old firmware that doesn't frame its Starmode responses properly.
2103 */
2104static void process_text_message(struct strip *strip_info)
2105{
2106 __u8 *msg = strip_info->sx_buff;
2107 int len = strip_info->sx_count;
2108
2109 /* Check for anything that looks like it might be our radio name */
2110 /* (This is here for backwards compatibility with old firmware) */
2111 if (len == 9 && get_radio_address(strip_info, msg) == 0)
2112 return;
2113
2114 if (text_equal(msg, len, "OK"))
2115 return; /* Ignore 'OK' responses from prior commands */
2116 if (text_equal(msg, len, "ERROR"))
2117 return; /* Ignore 'ERROR' messages */
2118 if (has_prefix(msg, len, "ate0q1"))
2119 return; /* Ignore character echo back from the radio */
2120
2121 /* Catch other error messages */
2122 /* (This is here for backwards compatibility with old firmware) */
2123 if (has_prefix(msg, len, "ERR_")) {
2124 RecvErr_Message(strip_info, NULL, &msg[4], len - 4);
2125 return;
2126 }
2127
2128 RecvErr("No initial *", strip_info);
2129}
2130
2131/*
2132 * process_message processes a <CR>-terminated block of data received
2133 * from the radio. If the radio is not in Starmode or has old firmware,
2134 * it may be a line of text in response to an AT command. Ideally, with
2135 * a current radio that's properly in Starmode, all data received should
2136 * be properly framed and checksummed radio message blocks, containing
2137 * either a starmode packet, or a other communication from the radio
2138 * firmware, like "INF_" Info messages and &COMMAND responses.
2139 */
2140static void process_message(struct strip *strip_info)
2141{
2142 STRIP_Header header = { zero_address, zero_address, 0 };
2143 __u8 *ptr = strip_info->sx_buff;
2144 __u8 *end = strip_info->sx_buff + strip_info->sx_count;
2145 __u8 sendername[32], *sptr = sendername;
2146 MetricomKey key;
2147
2148 /*HexDump("Receiving", strip_info, ptr, end); */
2149
2150 /* Check for start of address marker, and then skip over it */
2151 if (*ptr == '*')
2152 ptr++;
2153 else {
2154 process_text_message(strip_info);
2155 return;
2156 }
2157
2158 /* Copy out the return address */
2159 while (ptr < end && *ptr != '*'
2160 && sptr < ARRAY_END(sendername) - 1)
2161 *sptr++ = *ptr++;
2162 *sptr = 0; /* Null terminate the sender name */
2163
2164 /* Check for end of address marker, and skip over it */
2165 if (ptr >= end || *ptr != '*') {
2166 RecvErr("No second *", strip_info);
2167 return;
2168 }
2169 ptr++; /* Skip the second '*' */
2170
2171 /* If the sender name is "&COMMAND", ignore this 'packet' */
2172 /* (This is here for backwards compatibility with old firmware) */
2173 if (!strcmp(sendername, "&COMMAND")) {
2174 strip_info->firmware_level = NoStructure;
2175 strip_info->next_command = CompatibilityCommand;
2176 return;
2177 }
2178
2179 if (ptr + 4 > end) {
2180 RecvErr("No proto key", strip_info);
2181 return;
2182 }
2183
2184 /* Get the protocol key out of the buffer */
2185 key.c[0] = *ptr++;
2186 key.c[1] = *ptr++;
2187 key.c[2] = *ptr++;
2188 key.c[3] = *ptr++;
2189
2190 /* If we're using checksums, verify the checksum at the end of the packet */
2191 if (strip_info->firmware_level >= ChecksummedMessages) {
2192 end -= 4; /* Chop the last four bytes off the packet (they're the checksum) */
2193 if (ptr > end) {
2194 RecvErr("Missing Checksum", strip_info);
2195 return;
2196 }
2197 if (!verify_checksum(strip_info)) {
2198 RecvErr("Bad Checksum", strip_info);
2199 return;
2200 }
2201 }
2202
2203 /*printk(KERN_INFO "%s: Got packet from \"%s\".\n", strip_info->dev->name, sendername); */
2204
2205 /*
2206 * Fill in (pseudo) source and destination addresses in the packet.
2207 * We assume that the destination address was our address (the radio does not
2208 * tell us this). If the radio supplies a source address, then we use it.
2209 */
2210 header.dst_addr = strip_info->true_dev_addr;
2211 string_to_radio_address(&header.src_addr, sendername);
2212
2213#ifdef EXT_COUNTERS
2214 if (key.l == SIP0Key.l) {
2215 strip_info->rx_rbytes += (end - ptr);
2216 process_IP_packet(strip_info, &header, ptr, end);
2217 } else if (key.l == ARP0Key.l) {
2218 strip_info->rx_rbytes += (end - ptr);
2219 process_ARP_packet(strip_info, &header, ptr, end);
2220 } else if (key.l == ATR_Key.l) {
2221 strip_info->rx_ebytes += (end - ptr);
2222 process_AT_response(strip_info, ptr, end);
2223 } else if (key.l == ACK_Key.l) {
2224 strip_info->rx_ebytes += (end - ptr);
2225 process_ACK(strip_info, ptr, end);
2226 } else if (key.l == INF_Key.l) {
2227 strip_info->rx_ebytes += (end - ptr);
2228 process_Info(strip_info, ptr, end);
2229 } else if (key.l == ERR_Key.l) {
2230 strip_info->rx_ebytes += (end - ptr);
2231 RecvErr_Message(strip_info, sendername, ptr, end - ptr);
2232 } else
2233 RecvErr("Unrecognized protocol key", strip_info);
2234#else
2235 if (key.l == SIP0Key.l)
2236 process_IP_packet(strip_info, &header, ptr, end);
2237 else if (key.l == ARP0Key.l)
2238 process_ARP_packet(strip_info, &header, ptr, end);
2239 else if (key.l == ATR_Key.l)
2240 process_AT_response(strip_info, ptr, end);
2241 else if (key.l == ACK_Key.l)
2242 process_ACK(strip_info, ptr, end);
2243 else if (key.l == INF_Key.l)
2244 process_Info(strip_info, ptr, end);
2245 else if (key.l == ERR_Key.l)
2246 RecvErr_Message(strip_info, sendername, ptr, end - ptr);
2247 else
2248 RecvErr("Unrecognized protocol key", strip_info);
2249#endif
2250}
2251
2252#define TTYERROR(X) ((X) == TTY_BREAK ? "Break" : \
2253 (X) == TTY_FRAME ? "Framing Error" : \
2254 (X) == TTY_PARITY ? "Parity Error" : \
2255 (X) == TTY_OVERRUN ? "Hardware Overrun" : "Unknown Error")
2256
2257/*
2258 * Handle the 'receiver data ready' interrupt.
2259 * This function is called by the 'tty_io' module in the kernel when
2260 * a block of STRIP data has been received, which can now be decapsulated
2261 * and sent on to some IP layer for further processing.
2262 */
2263
2264static void strip_receive_buf(struct tty_struct *tty, const unsigned char *cp,
2265 char *fp, int count)
2266{
2267 struct strip *strip_info = tty->disc_data;
2268 const unsigned char *end = cp + count;
2269
2270 if (!strip_info || strip_info->magic != STRIP_MAGIC
2271 || !netif_running(strip_info->dev))
2272 return;
2273
2274 spin_lock_bh(&strip_lock);
2275#if 0
2276 {
2277 struct timeval tv;
2278 do_gettimeofday(&tv);
2279 printk(KERN_INFO
2280 "**** strip_receive_buf: %3d bytes at %02d.%06d\n",
2281 count, tv.tv_sec % 100, tv.tv_usec);
2282 }
2283#endif
2284
2285#ifdef EXT_COUNTERS
2286 strip_info->rx_sbytes += count;
2287#endif
2288
2289 /* Read the characters out of the buffer */
2290 while (cp < end) {
2291 if (fp && *fp)
2292 printk(KERN_INFO "%s: %s on serial port\n",
2293 strip_info->dev->name, TTYERROR(*fp));
2294 if (fp && *fp++ && !strip_info->discard) { /* If there's a serial error, record it */
2295 /* If we have some characters in the buffer, discard them */
2296 strip_info->discard = strip_info->sx_count;
2297 strip_info->rx_errors++;
2298 }
2299
2300 /* Leading control characters (CR, NL, Tab, etc.) are ignored */
2301 if (strip_info->sx_count > 0 || *cp >= ' ') {
2302 if (*cp == 0x0D) { /* If end of packet, decide what to do with it */
2303 if (strip_info->sx_count > 3000)
2304 printk(KERN_INFO
2305 "%s: Cut a %d byte packet (%zd bytes remaining)%s\n",
2306 strip_info->dev->name,
2307 strip_info->sx_count,
2308 end - cp - 1,
2309 strip_info->
2310 discard ? " (discarded)" :
2311 "");
2312 if (strip_info->sx_count >
2313 strip_info->sx_size) {
2314 strip_info->rx_over_errors++;
2315 printk(KERN_INFO
2316 "%s: sx_buff overflow (%d bytes total)\n",
2317 strip_info->dev->name,
2318 strip_info->sx_count);
2319 } else if (strip_info->discard)
2320 printk(KERN_INFO
2321 "%s: Discarding bad packet (%d/%d)\n",
2322 strip_info->dev->name,
2323 strip_info->discard,
2324 strip_info->sx_count);
2325 else
2326 process_message(strip_info);
2327 strip_info->discard = 0;
2328 strip_info->sx_count = 0;
2329 } else {
2330 /* Make sure we have space in the buffer */
2331 if (strip_info->sx_count <
2332 strip_info->sx_size)
2333 strip_info->sx_buff[strip_info->
2334 sx_count] =
2335 *cp;
2336 strip_info->sx_count++;
2337 }
2338 }
2339 cp++;
2340 }
2341 spin_unlock_bh(&strip_lock);
2342}
2343
2344
2345/************************************************************************/
2346/* General control routines */
2347
2348static int set_mac_address(struct strip *strip_info,
2349 MetricomAddress * addr)
2350{
2351 /*
2352 * We're using a manually specified address if the address is set
2353 * to anything other than all ones. Setting the address to all ones
2354 * disables manual mode and goes back to automatic address determination
2355 * (tracking the true address that the radio has).
2356 */
2357 strip_info->manual_dev_addr =
2358 memcmp(addr->c, broadcast_address.c,
2359 sizeof(broadcast_address));
2360 if (strip_info->manual_dev_addr)
2361 *(MetricomAddress *) strip_info->dev->dev_addr = *addr;
2362 else
2363 *(MetricomAddress *) strip_info->dev->dev_addr =
2364 strip_info->true_dev_addr;
2365 return 0;
2366}
2367
2368static int strip_set_mac_address(struct net_device *dev, void *addr)
2369{
2370 struct strip *strip_info = netdev_priv(dev);
2371 struct sockaddr *sa = addr;
2372 printk(KERN_INFO "%s: strip_set_dev_mac_address called\n", dev->name);
2373 set_mac_address(strip_info, (MetricomAddress *) sa->sa_data);
2374 return 0;
2375}
2376
2377static struct net_device_stats *strip_get_stats(struct net_device *dev)
2378{
2379 struct strip *strip_info = netdev_priv(dev);
2380 static struct net_device_stats stats;
2381
2382 memset(&stats, 0, sizeof(struct net_device_stats));
2383
2384 stats.rx_packets = strip_info->rx_packets;
2385 stats.tx_packets = strip_info->tx_packets;
2386 stats.rx_dropped = strip_info->rx_dropped;
2387 stats.tx_dropped = strip_info->tx_dropped;
2388 stats.tx_errors = strip_info->tx_errors;
2389 stats.rx_errors = strip_info->rx_errors;
2390 stats.rx_over_errors = strip_info->rx_over_errors;
2391 return (&stats);
2392}
2393
2394
2395/************************************************************************/
2396/* Opening and closing */
2397
2398/*
2399 * Here's the order things happen:
2400 * When the user runs "slattach -p strip ..."
2401 * 1. The TTY module calls strip_open;;
2402 * 2. strip_open calls strip_alloc
2403 * 3. strip_alloc calls register_netdev
2404 * 4. register_netdev calls strip_dev_init
2405 * 5. then strip_open finishes setting up the strip_info
2406 *
2407 * When the user runs "ifconfig st<x> up address netmask ..."
2408 * 6. strip_open_low gets called
2409 *
2410 * When the user runs "ifconfig st<x> down"
2411 * 7. strip_close_low gets called
2412 *
2413 * When the user kills the slattach process
2414 * 8. strip_close gets called
2415 * 9. strip_close calls dev_close
2416 * 10. if the device is still up, then dev_close calls strip_close_low
2417 * 11. strip_close calls strip_free
2418 */
2419
2420/* Open the low-level part of the STRIP channel. Easy! */
2421
2422static int strip_open_low(struct net_device *dev)
2423{
2424 struct strip *strip_info = netdev_priv(dev);
2425
2426 if (strip_info->tty == NULL)
2427 return (-ENODEV);
2428
2429 if (!allocate_buffers(strip_info, dev->mtu))
2430 return (-ENOMEM);
2431
2432 strip_info->sx_count = 0;
2433 strip_info->tx_left = 0;
2434
2435 strip_info->discard = 0;
2436 strip_info->working = FALSE;
2437 strip_info->firmware_level = NoStructure;
2438 strip_info->next_command = CompatibilityCommand;
2439 strip_info->user_baud = tty_get_baud_rate(strip_info->tty);
2440
2441 printk(KERN_INFO "%s: Initializing Radio.\n",
2442 strip_info->dev->name);
2443 ResetRadio(strip_info);
2444 strip_info->idle_timer.expires = jiffies + 1 * HZ;
2445 add_timer(&strip_info->idle_timer);
2446 netif_wake_queue(dev);
2447 return (0);
2448}
2449
2450
2451/*
2452 * Close the low-level part of the STRIP channel. Easy!
2453 */
2454
2455static int strip_close_low(struct net_device *dev)
2456{
2457 struct strip *strip_info = netdev_priv(dev);
2458
2459 if (strip_info->tty == NULL)
2460 return -EBUSY;
2461 clear_bit(TTY_DO_WRITE_WAKEUP, &strip_info->tty->flags);
2462 netif_stop_queue(dev);
2463
2464 /*
2465 * Free all STRIP frame buffers.
2466 */
2467 kfree(strip_info->rx_buff);
2468 strip_info->rx_buff = NULL;
2469 kfree(strip_info->sx_buff);
2470 strip_info->sx_buff = NULL;
2471 kfree(strip_info->tx_buff);
2472 strip_info->tx_buff = NULL;
2473
2474 del_timer(&strip_info->idle_timer);
2475 return 0;
2476}
2477
2478static const struct header_ops strip_header_ops = {
2479 .create = strip_header,
2480 .rebuild = strip_rebuild_header,
2481};
2482
2483
2484static const struct net_device_ops strip_netdev_ops = {
2485 .ndo_open = strip_open_low,
2486 .ndo_stop = strip_close_low,
2487 .ndo_start_xmit = strip_xmit,
2488 .ndo_set_mac_address = strip_set_mac_address,
2489 .ndo_get_stats = strip_get_stats,
2490 .ndo_change_mtu = strip_change_mtu,
2491};
2492
2493/*
2494 * This routine is called by DDI when the
2495 * (dynamically assigned) device is registered
2496 */
2497
2498static void strip_dev_setup(struct net_device *dev)
2499{
2500 /*
2501 * Finish setting up the DEVICE info.
2502 */
2503
2504 dev->trans_start = 0;
2505 dev->tx_queue_len = 30; /* Drop after 30 frames queued */
2506
2507 dev->flags = 0;
2508 dev->mtu = DEFAULT_STRIP_MTU;
2509 dev->type = ARPHRD_METRICOM; /* dtang */
2510 dev->hard_header_len = sizeof(STRIP_Header);
2511 /*
2512 * netdev_priv(dev) Already holds a pointer to our struct strip
2513 */
2514
2515 *(MetricomAddress *)dev->broadcast = broadcast_address;
2516 dev->dev_addr[0] = 0;
2517 dev->addr_len = sizeof(MetricomAddress);
2518
2519 dev->header_ops = &strip_header_ops,
2520 dev->netdev_ops = &strip_netdev_ops;
2521}
2522
2523/*
2524 * Free a STRIP channel.
2525 */
2526
2527static void strip_free(struct strip *strip_info)
2528{
2529 spin_lock_bh(&strip_lock);
2530 list_del_rcu(&strip_info->list);
2531 spin_unlock_bh(&strip_lock);
2532
2533 strip_info->magic = 0;
2534
2535 free_netdev(strip_info->dev);
2536}
2537
2538
2539/*
2540 * Allocate a new free STRIP channel
2541 */
2542static struct strip *strip_alloc(void)
2543{
2544 struct list_head *n;
2545 struct net_device *dev;
2546 struct strip *strip_info;
2547
2548 dev = alloc_netdev(sizeof(struct strip), "st%d",
2549 strip_dev_setup);
2550
2551 if (!dev)
2552 return NULL; /* If no more memory, return */
2553
2554
2555 strip_info = netdev_priv(dev);
2556 strip_info->dev = dev;
2557
2558 strip_info->magic = STRIP_MAGIC;
2559 strip_info->tty = NULL;
2560
2561 strip_info->gratuitous_arp = jiffies + LongTime;
2562 strip_info->arp_interval = 0;
2563 init_timer(&strip_info->idle_timer);
2564 strip_info->idle_timer.data = (long) dev;
2565 strip_info->idle_timer.function = strip_IdleTask;
2566
2567
2568 spin_lock_bh(&strip_lock);
2569 rescan:
2570 /*
2571 * Search the list to find where to put our new entry
2572 * (and in the process decide what channel number it is
2573 * going to be)
2574 */
2575 list_for_each(n, &strip_list) {
2576 struct strip *s = hlist_entry(n, struct strip, list);
2577
2578 if (s->dev->base_addr == dev->base_addr) {
2579 ++dev->base_addr;
2580 goto rescan;
2581 }
2582 }
2583
2584 sprintf(dev->name, "st%ld", dev->base_addr);
2585
2586 list_add_tail_rcu(&strip_info->list, &strip_list);
2587 spin_unlock_bh(&strip_lock);
2588
2589 return strip_info;
2590}
2591
2592/*
2593 * Open the high-level part of the STRIP channel.
2594 * This function is called by the TTY module when the
2595 * STRIP line discipline is called for. Because we are
2596 * sure the tty line exists, we only have to link it to
2597 * a free STRIP channel...
2598 */
2599
2600static int strip_open(struct tty_struct *tty)
2601{
2602 struct strip *strip_info = tty->disc_data;
2603
2604 /*
2605 * First make sure we're not already connected.
2606 */
2607
2608 if (strip_info && strip_info->magic == STRIP_MAGIC)
2609 return -EEXIST;
2610
2611 /*
2612 * We need a write method.
2613 */
2614
2615 if (tty->ops->write == NULL || tty->ops->set_termios == NULL)
2616 return -EOPNOTSUPP;
2617
2618 /*
2619 * OK. Find a free STRIP channel to use.
2620 */
2621 if ((strip_info = strip_alloc()) == NULL)
2622 return -ENFILE;
2623
2624 /*
2625 * Register our newly created device so it can be ifconfig'd
2626 * strip_dev_init() will be called as a side-effect
2627 */
2628
2629 if (register_netdev(strip_info->dev) != 0) {
2630 printk(KERN_ERR "strip: register_netdev() failed.\n");
2631 strip_free(strip_info);
2632 return -ENFILE;
2633 }
2634
2635 strip_info->tty = tty;
2636 tty->disc_data = strip_info;
2637 tty->receive_room = 65536;
2638
2639 tty_driver_flush_buffer(tty);
2640
2641 /*
2642 * Restore default settings
2643 */
2644
2645 strip_info->dev->type = ARPHRD_METRICOM; /* dtang */
2646
2647 /*
2648 * Set tty options
2649 */
2650
2651 tty->termios->c_iflag |= IGNBRK | IGNPAR; /* Ignore breaks and parity errors. */
2652 tty->termios->c_cflag |= CLOCAL; /* Ignore modem control signals. */
2653 tty->termios->c_cflag &= ~HUPCL; /* Don't close on hup */
2654
2655 printk(KERN_INFO "STRIP: device \"%s\" activated\n",
2656 strip_info->dev->name);
2657
2658 /*
2659 * Done. We have linked the TTY line to a channel.
2660 */
2661 return (strip_info->dev->base_addr);
2662}
2663
2664/*
2665 * Close down a STRIP channel.
2666 * This means flushing out any pending queues, and then restoring the
2667 * TTY line discipline to what it was before it got hooked to STRIP
2668 * (which usually is TTY again).
2669 */
2670
2671static void strip_close(struct tty_struct *tty)
2672{
2673 struct strip *strip_info = tty->disc_data;
2674
2675 /*
2676 * First make sure we're connected.
2677 */
2678
2679 if (!strip_info || strip_info->magic != STRIP_MAGIC)
2680 return;
2681
2682 unregister_netdev(strip_info->dev);
2683
2684 tty->disc_data = NULL;
2685 strip_info->tty = NULL;
2686 printk(KERN_INFO "STRIP: device \"%s\" closed down\n",
2687 strip_info->dev->name);
2688 strip_free(strip_info);
2689 tty->disc_data = NULL;
2690}
2691
2692
2693/************************************************************************/
2694/* Perform I/O control calls on an active STRIP channel. */
2695
2696static int strip_ioctl(struct tty_struct *tty, struct file *file,
2697 unsigned int cmd, unsigned long arg)
2698{
2699 struct strip *strip_info = tty->disc_data;
2700
2701 /*
2702 * First make sure we're connected.
2703 */
2704
2705 if (!strip_info || strip_info->magic != STRIP_MAGIC)
2706 return -EINVAL;
2707
2708 switch (cmd) {
2709 case SIOCGIFNAME:
2710 if(copy_to_user((void __user *) arg, strip_info->dev->name, strlen(strip_info->dev->name) + 1))
2711 return -EFAULT;
2712 break;
2713 case SIOCSIFHWADDR:
2714 {
2715 MetricomAddress addr;
2716 //printk(KERN_INFO "%s: SIOCSIFHWADDR\n", strip_info->dev->name);
2717 if(copy_from_user(&addr, (void __user *) arg, sizeof(MetricomAddress)))
2718 return -EFAULT;
2719 return set_mac_address(strip_info, &addr);
2720 }
2721 default:
2722 return tty_mode_ioctl(tty, file, cmd, arg);
2723 break;
2724 }
2725 return 0;
2726}
2727
2728
2729/************************************************************************/
2730/* Initialization */
2731
2732static struct tty_ldisc_ops strip_ldisc = {
2733 .magic = TTY_LDISC_MAGIC,
2734 .name = "strip",
2735 .owner = THIS_MODULE,
2736 .open = strip_open,
2737 .close = strip_close,
2738 .ioctl = strip_ioctl,
2739 .receive_buf = strip_receive_buf,
2740 .write_wakeup = strip_write_some_more,
2741};
2742
2743/*
2744 * Initialize the STRIP driver.
2745 * This routine is called at boot time, to bootstrap the multi-channel
2746 * STRIP driver
2747 */
2748
2749static char signon[] __initdata =
2750 KERN_INFO "STRIP: Version %s (unlimited channels)\n";
2751
2752static int __init strip_init_driver(void)
2753{
2754 int status;
2755
2756 printk(signon, StripVersion);
2757
2758
2759 /*
2760 * Fill in our line protocol discipline, and register it
2761 */
2762 if ((status = tty_register_ldisc(N_STRIP, &strip_ldisc)))
2763 printk(KERN_ERR "STRIP: can't register line discipline (err = %d)\n",
2764 status);
2765
2766 /*
2767 * Register the status file with /proc
2768 */
2769 proc_net_fops_create(&init_net, "strip", S_IFREG | S_IRUGO, &strip_seq_fops);
2770
2771 return status;
2772}
2773
2774module_init(strip_init_driver);
2775
2776static const char signoff[] __exitdata =
2777 KERN_INFO "STRIP: Module Unloaded\n";
2778
2779static void __exit strip_exit_driver(void)
2780{
2781 int i;
2782 struct list_head *p,*n;
2783
2784 /* module ref count rules assure that all entries are unregistered */
2785 list_for_each_safe(p, n, &strip_list) {
2786 struct strip *s = list_entry(p, struct strip, list);
2787 strip_free(s);
2788 }
2789
2790 /* Unregister with the /proc/net file here. */
2791 proc_net_remove(&init_net, "strip");
2792
2793 if ((i = tty_unregister_ldisc(N_STRIP)))
2794 printk(KERN_ERR "STRIP: can't unregister line discipline (err = %d)\n", i);
2795
2796 printk(signoff);
2797}
2798
2799module_exit(strip_exit_driver);
2800
2801MODULE_AUTHOR("Stuart Cheshire <cheshire@cs.stanford.edu>");
2802MODULE_DESCRIPTION("Starmode Radio IP (STRIP) Device Driver");
2803MODULE_LICENSE("Dual BSD/GPL");
2804
2805MODULE_SUPPORTED_DEVICE("Starmode Radio IP (STRIP) modem");
diff --git a/drivers/net/wireless/wavelan.c b/drivers/net/wireless/wavelan.c
deleted file mode 100644
index d634b2da3b84..000000000000
--- a/drivers/net/wireless/wavelan.c
+++ /dev/null
@@ -1,4383 +0,0 @@
1/*
2 * WaveLAN ISA driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 * Original copyright follows (also see the end of this file).
8 * See wavelan.p.h for details.
9 *
10 *
11 *
12 * AT&T GIS (nee NCR) WaveLAN card:
13 * An Ethernet-like radio transceiver
14 * controlled by an Intel 82586 coprocessor.
15 */
16
17#include "wavelan.p.h" /* Private header */
18
19/************************* MISC SUBROUTINES **************************/
20/*
21 * Subroutines which won't fit in one of the following category
22 * (WaveLAN modem or i82586)
23 */
24
25/*------------------------------------------------------------------*/
26/*
27 * Translate irq number to PSA irq parameter
28 */
29static u8 wv_irq_to_psa(int irq)
30{
31 if (irq < 0 || irq >= ARRAY_SIZE(irqvals))
32 return 0;
33
34 return irqvals[irq];
35}
36
37/*------------------------------------------------------------------*/
38/*
39 * Translate PSA irq parameter to irq number
40 */
41static int __init wv_psa_to_irq(u8 irqval)
42{
43 int i;
44
45 for (i = 0; i < ARRAY_SIZE(irqvals); i++)
46 if (irqvals[i] == irqval)
47 return i;
48
49 return -1;
50}
51
52/********************* HOST ADAPTER SUBROUTINES *********************/
53/*
54 * Useful subroutines to manage the WaveLAN ISA interface
55 *
56 * One major difference with the PCMCIA hardware (except the port mapping)
57 * is that we have to keep the state of the Host Control Register
58 * because of the interrupt enable & bus size flags.
59 */
60
61/*------------------------------------------------------------------*/
62/*
63 * Read from card's Host Adaptor Status Register.
64 */
65static inline u16 hasr_read(unsigned long ioaddr)
66{
67 return (inw(HASR(ioaddr)));
68} /* hasr_read */
69
70/*------------------------------------------------------------------*/
71/*
72 * Write to card's Host Adapter Command Register.
73 */
74static inline void hacr_write(unsigned long ioaddr, u16 hacr)
75{
76 outw(hacr, HACR(ioaddr));
77} /* hacr_write */
78
79/*------------------------------------------------------------------*/
80/*
81 * Write to card's Host Adapter Command Register. Include a delay for
82 * those times when it is needed.
83 */
84static void hacr_write_slow(unsigned long ioaddr, u16 hacr)
85{
86 hacr_write(ioaddr, hacr);
87 /* delay might only be needed sometimes */
88 mdelay(1);
89} /* hacr_write_slow */
90
91/*------------------------------------------------------------------*/
92/*
93 * Set the channel attention bit.
94 */
95static inline void set_chan_attn(unsigned long ioaddr, u16 hacr)
96{
97 hacr_write(ioaddr, hacr | HACR_CA);
98} /* set_chan_attn */
99
100/*------------------------------------------------------------------*/
101/*
102 * Reset, and then set host adaptor into default mode.
103 */
104static inline void wv_hacr_reset(unsigned long ioaddr)
105{
106 hacr_write_slow(ioaddr, HACR_RESET);
107 hacr_write(ioaddr, HACR_DEFAULT);
108} /* wv_hacr_reset */
109
110/*------------------------------------------------------------------*/
111/*
112 * Set the I/O transfer over the ISA bus to 8-bit mode
113 */
114static inline void wv_16_off(unsigned long ioaddr, u16 hacr)
115{
116 hacr &= ~HACR_16BITS;
117 hacr_write(ioaddr, hacr);
118} /* wv_16_off */
119
120/*------------------------------------------------------------------*/
121/*
122 * Set the I/O transfer over the ISA bus to 8-bit mode
123 */
124static inline void wv_16_on(unsigned long ioaddr, u16 hacr)
125{
126 hacr |= HACR_16BITS;
127 hacr_write(ioaddr, hacr);
128} /* wv_16_on */
129
130/*------------------------------------------------------------------*/
131/*
132 * Disable interrupts on the WaveLAN hardware.
133 * (called by wv_82586_stop())
134 */
135static inline void wv_ints_off(struct net_device * dev)
136{
137 net_local *lp = netdev_priv(dev);
138 unsigned long ioaddr = dev->base_addr;
139
140 lp->hacr &= ~HACR_INTRON;
141 hacr_write(ioaddr, lp->hacr);
142} /* wv_ints_off */
143
144/*------------------------------------------------------------------*/
145/*
146 * Enable interrupts on the WaveLAN hardware.
147 * (called by wv_hw_reset())
148 */
149static inline void wv_ints_on(struct net_device * dev)
150{
151 net_local *lp = netdev_priv(dev);
152 unsigned long ioaddr = dev->base_addr;
153
154 lp->hacr |= HACR_INTRON;
155 hacr_write(ioaddr, lp->hacr);
156} /* wv_ints_on */
157
158/******************* MODEM MANAGEMENT SUBROUTINES *******************/
159/*
160 * Useful subroutines to manage the modem of the WaveLAN
161 */
162
163/*------------------------------------------------------------------*/
164/*
165 * Read the Parameter Storage Area from the WaveLAN card's memory
166 */
167/*
168 * Read bytes from the PSA.
169 */
170static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */
171 u8 * b, /* buffer to fill */
172 int n)
173{ /* size to read */
174 wv_16_off(ioaddr, hacr);
175
176 while (n-- > 0) {
177 outw(o, PIOR2(ioaddr));
178 o++;
179 *b++ = inb(PIOP2(ioaddr));
180 }
181
182 wv_16_on(ioaddr, hacr);
183} /* psa_read */
184
185/*------------------------------------------------------------------*/
186/*
187 * Write the Parameter Storage Area to the WaveLAN card's memory.
188 */
189static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */
190 u8 * b, /* Buffer in memory */
191 int n)
192{ /* Length of buffer */
193 int count = 0;
194
195 wv_16_off(ioaddr, hacr);
196
197 while (n-- > 0) {
198 outw(o, PIOR2(ioaddr));
199 o++;
200
201 outb(*b, PIOP2(ioaddr));
202 b++;
203
204 /* Wait for the memory to finish its write cycle */
205 count = 0;
206 while ((count++ < 100) &&
207 (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1);
208 }
209
210 wv_16_on(ioaddr, hacr);
211} /* psa_write */
212
213#ifdef SET_PSA_CRC
214/*------------------------------------------------------------------*/
215/*
216 * Calculate the PSA CRC
217 * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
218 * NOTE: By specifying a length including the CRC position the
219 * returned value should be zero. (i.e. a correct checksum in the PSA)
220 *
221 * The Windows drivers don't use the CRC, but the AP and the PtP tool
222 * depend on it.
223 */
224static u16 psa_crc(u8 * psa, /* The PSA */
225 int size)
226{ /* Number of short for CRC */
227 int byte_cnt; /* Loop on the PSA */
228 u16 crc_bytes = 0; /* Data in the PSA */
229 int bit_cnt; /* Loop on the bits of the short */
230
231 for (byte_cnt = 0; byte_cnt < size; byte_cnt++) {
232 crc_bytes ^= psa[byte_cnt]; /* Its an xor */
233
234 for (bit_cnt = 1; bit_cnt < 9; bit_cnt++) {
235 if (crc_bytes & 0x0001)
236 crc_bytes = (crc_bytes >> 1) ^ 0xA001;
237 else
238 crc_bytes >>= 1;
239 }
240 }
241
242 return crc_bytes;
243} /* psa_crc */
244#endif /* SET_PSA_CRC */
245
246/*------------------------------------------------------------------*/
247/*
248 * update the checksum field in the Wavelan's PSA
249 */
250static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr)
251{
252#ifdef SET_PSA_CRC
253 psa_t psa;
254 u16 crc;
255
256 /* read the parameter storage area */
257 psa_read(ioaddr, hacr, 0, (unsigned char *) &psa, sizeof(psa));
258
259 /* update the checksum */
260 crc = psa_crc((unsigned char *) &psa,
261 sizeof(psa) - sizeof(psa.psa_crc[0]) -
262 sizeof(psa.psa_crc[1])
263 - sizeof(psa.psa_crc_status));
264
265 psa.psa_crc[0] = crc & 0xFF;
266 psa.psa_crc[1] = (crc & 0xFF00) >> 8;
267
268 /* Write it ! */
269 psa_write(ioaddr, hacr, (char *) &psa.psa_crc - (char *) &psa,
270 (unsigned char *) &psa.psa_crc, 2);
271
272#ifdef DEBUG_IOCTL_INFO
273 printk(KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
274 dev->name, psa.psa_crc[0], psa.psa_crc[1]);
275
276 /* Check again (luxury !) */
277 crc = psa_crc((unsigned char *) &psa,
278 sizeof(psa) - sizeof(psa.psa_crc_status));
279
280 if (crc != 0)
281 printk(KERN_WARNING
282 "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n",
283 dev->name);
284#endif /* DEBUG_IOCTL_INFO */
285#endif /* SET_PSA_CRC */
286} /* update_psa_checksum */
287
288/*------------------------------------------------------------------*/
289/*
290 * Write 1 byte to the MMC.
291 */
292static void mmc_out(unsigned long ioaddr, u16 o, u8 d)
293{
294 int count = 0;
295
296 /* Wait for MMC to go idle */
297 while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
298 udelay(10);
299
300 outw((u16) (((u16) d << 8) | (o << 1) | 1), MMCR(ioaddr));
301}
302
303/*------------------------------------------------------------------*/
304/*
305 * Routine to write bytes to the Modem Management Controller.
306 * We start at the end because it is the way it should be!
307 */
308static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n)
309{
310 o += n;
311 b += n;
312
313 while (n-- > 0)
314 mmc_out(ioaddr, --o, *(--b));
315} /* mmc_write */
316
317/*------------------------------------------------------------------*/
318/*
319 * Read a byte from the MMC.
320 * Optimised version for 1 byte, avoid using memory.
321 */
322static u8 mmc_in(unsigned long ioaddr, u16 o)
323{
324 int count = 0;
325
326 while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
327 udelay(10);
328 outw(o << 1, MMCR(ioaddr));
329
330 while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
331 udelay(10);
332 return (u8) (inw(MMCR(ioaddr)) >> 8);
333}
334
335/*------------------------------------------------------------------*/
336/*
337 * Routine to read bytes from the Modem Management Controller.
338 * The implementation is complicated by a lack of address lines,
339 * which prevents decoding of the low-order bit.
340 * (code has just been moved in the above function)
341 * We start at the end because it is the way it should be!
342 */
343static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n)
344{
345 o += n;
346 b += n;
347
348 while (n-- > 0)
349 *(--b) = mmc_in(ioaddr, --o);
350} /* mmc_read */
351
352/*------------------------------------------------------------------*/
353/*
354 * Get the type of encryption available.
355 */
356static inline int mmc_encr(unsigned long ioaddr)
357{ /* I/O port of the card */
358 int temp;
359
360 temp = mmc_in(ioaddr, mmroff(0, mmr_des_avail));
361 if ((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
362 return 0;
363 else
364 return temp;
365}
366
367/*------------------------------------------------------------------*/
368/*
369 * Wait for the frequency EEPROM to complete a command.
370 * I hope this one will be optimally inlined.
371 */
372static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */
373 int delay, /* Base delay to wait for */
374 int number)
375{ /* Number of time to wait */
376 int count = 0; /* Wait only a limited time */
377
378 while ((count++ < number) &&
379 (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
380 MMR_FEE_STATUS_BUSY)) udelay(delay);
381}
382
383/*------------------------------------------------------------------*/
384/*
385 * Read bytes from the Frequency EEPROM (frequency select cards).
386 */
387static void fee_read(unsigned long ioaddr, /* I/O port of the card */
388 u16 o, /* destination offset */
389 u16 * b, /* data buffer */
390 int n)
391{ /* number of registers */
392 b += n; /* Position at the end of the area */
393
394 /* Write the address */
395 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
396
397 /* Loop on all buffer */
398 while (n-- > 0) {
399 /* Write the read command */
400 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
401 MMW_FEE_CTRL_READ);
402
403 /* Wait until EEPROM is ready (should be quick). */
404 fee_wait(ioaddr, 10, 100);
405
406 /* Read the value. */
407 *--b = ((mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)) << 8) |
408 mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
409 }
410}
411
412
413/*------------------------------------------------------------------*/
414/*
415 * Write bytes from the Frequency EEPROM (frequency select cards).
416 * This is a bit complicated, because the frequency EEPROM has to
417 * be unprotected and the write enabled.
418 * Jean II
419 */
420static void fee_write(unsigned long ioaddr, /* I/O port of the card */
421 u16 o, /* destination offset */
422 u16 * b, /* data buffer */
423 int n)
424{ /* number of registers */
425 b += n; /* Position at the end of the area. */
426
427#ifdef EEPROM_IS_PROTECTED /* disabled */
428#ifdef DOESNT_SEEM_TO_WORK /* disabled */
429 /* Ask to read the protected register */
430 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
431
432 fee_wait(ioaddr, 10, 100);
433
434 /* Read the protected register. */
435 printk("Protected 2: %02X-%02X\n",
436 mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)),
437 mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
438#endif /* DOESNT_SEEM_TO_WORK */
439
440 /* Enable protected register. */
441 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
442 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
443
444 fee_wait(ioaddr, 10, 100);
445
446 /* Unprotect area. */
447 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n);
448 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
449#ifdef DOESNT_SEEM_TO_WORK /* disabled */
450 /* or use: */
451 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
452#endif /* DOESNT_SEEM_TO_WORK */
453
454 fee_wait(ioaddr, 10, 100);
455#endif /* EEPROM_IS_PROTECTED */
456
457 /* Write enable. */
458 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
459 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
460
461 fee_wait(ioaddr, 10, 100);
462
463 /* Write the EEPROM address. */
464 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
465
466 /* Loop on all buffer */
467 while (n-- > 0) {
468 /* Write the value. */
469 mmc_out(ioaddr, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
470 mmc_out(ioaddr, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
471
472 /* Write the write command. */
473 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
474 MMW_FEE_CTRL_WRITE);
475
476 /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */
477 mdelay(10);
478 fee_wait(ioaddr, 10, 100);
479 }
480
481 /* Write disable. */
482 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
483 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
484
485 fee_wait(ioaddr, 10, 100);
486
487#ifdef EEPROM_IS_PROTECTED /* disabled */
488 /* Reprotect EEPROM. */
489 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x00);
490 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
491
492 fee_wait(ioaddr, 10, 100);
493#endif /* EEPROM_IS_PROTECTED */
494}
495
496/************************ I82586 SUBROUTINES *************************/
497/*
498 * Useful subroutines to manage the Ethernet controller
499 */
500
501/*------------------------------------------------------------------*/
502/*
503 * Read bytes from the on-board RAM.
504 * Why does inlining this function make it fail?
505 */
506static /*inline */ void obram_read(unsigned long ioaddr,
507 u16 o, u8 * b, int n)
508{
509 outw(o, PIOR1(ioaddr));
510 insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
511}
512
513/*------------------------------------------------------------------*/
514/*
515 * Write bytes to the on-board RAM.
516 */
517static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n)
518{
519 outw(o, PIOR1(ioaddr));
520 outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
521}
522
523/*------------------------------------------------------------------*/
524/*
525 * Acknowledge the reading of the status issued by the i82586.
526 */
527static void wv_ack(struct net_device * dev)
528{
529 net_local *lp = netdev_priv(dev);
530 unsigned long ioaddr = dev->base_addr;
531 u16 scb_cs;
532 int i;
533
534 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
535 (unsigned char *) &scb_cs, sizeof(scb_cs));
536 scb_cs &= SCB_ST_INT;
537
538 if (scb_cs == 0)
539 return;
540
541 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
542 (unsigned char *) &scb_cs, sizeof(scb_cs));
543
544 set_chan_attn(ioaddr, lp->hacr);
545
546 for (i = 1000; i > 0; i--) {
547 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
548 (unsigned char *) &scb_cs, sizeof(scb_cs));
549 if (scb_cs == 0)
550 break;
551
552 udelay(10);
553 }
554 udelay(100);
555
556#ifdef DEBUG_CONFIG_ERROR
557 if (i <= 0)
558 printk(KERN_INFO
559 "%s: wv_ack(): board not accepting command.\n",
560 dev->name);
561#endif
562}
563
564/*------------------------------------------------------------------*/
565/*
566 * Set channel attention bit and busy wait until command has
567 * completed, then acknowledge completion of the command.
568 */
569static int wv_synchronous_cmd(struct net_device * dev, const char *str)
570{
571 net_local *lp = netdev_priv(dev);
572 unsigned long ioaddr = dev->base_addr;
573 u16 scb_cmd;
574 ach_t cb;
575 int i;
576
577 scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
578 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
579 (unsigned char *) &scb_cmd, sizeof(scb_cmd));
580
581 set_chan_attn(ioaddr, lp->hacr);
582
583 for (i = 1000; i > 0; i--) {
584 obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb,
585 sizeof(cb));
586 if (cb.ac_status & AC_SFLD_C)
587 break;
588
589 udelay(10);
590 }
591 udelay(100);
592
593 if (i <= 0 || !(cb.ac_status & AC_SFLD_OK)) {
594#ifdef DEBUG_CONFIG_ERROR
595 printk(KERN_INFO "%s: %s failed; status = 0x%x\n",
596 dev->name, str, cb.ac_status);
597#endif
598#ifdef DEBUG_I82586_SHOW
599 wv_scb_show(ioaddr);
600#endif
601 return -1;
602 }
603
604 /* Ack the status */
605 wv_ack(dev);
606
607 return 0;
608}
609
610/*------------------------------------------------------------------*/
611/*
612 * Configuration commands completion interrupt.
613 * Check if done, and if OK.
614 */
615static int
616wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
617{
618 unsigned short mcs_addr;
619 unsigned short status;
620 int ret;
621
622#ifdef DEBUG_INTERRUPT_TRACE
623 printk(KERN_DEBUG "%s: ->wv_config_complete()\n", dev->name);
624#endif
625
626 mcs_addr = lp->tx_first_in_use + sizeof(ac_tx_t) + sizeof(ac_nop_t)
627 + sizeof(tbd_t) + sizeof(ac_cfg_t) + sizeof(ac_ias_t);
628
629 /* Read the status of the last command (set mc list). */
630 obram_read(ioaddr, acoff(mcs_addr, ac_status),
631 (unsigned char *) &status, sizeof(status));
632
633 /* If not completed -> exit */
634 if ((status & AC_SFLD_C) == 0)
635 ret = 0; /* Not ready to be scrapped */
636 else {
637#ifdef DEBUG_CONFIG_ERROR
638 unsigned short cfg_addr;
639 unsigned short ias_addr;
640
641 /* Check mc_config command */
642 if ((status & AC_SFLD_OK) != AC_SFLD_OK)
643 printk(KERN_INFO
644 "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n",
645 dev->name, status);
646
647 /* check ia-config command */
648 ias_addr = mcs_addr - sizeof(ac_ias_t);
649 obram_read(ioaddr, acoff(ias_addr, ac_status),
650 (unsigned char *) &status, sizeof(status));
651 if ((status & AC_SFLD_OK) != AC_SFLD_OK)
652 printk(KERN_INFO
653 "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n",
654 dev->name, status);
655
656 /* Check config command. */
657 cfg_addr = ias_addr - sizeof(ac_cfg_t);
658 obram_read(ioaddr, acoff(cfg_addr, ac_status),
659 (unsigned char *) &status, sizeof(status));
660 if ((status & AC_SFLD_OK) != AC_SFLD_OK)
661 printk(KERN_INFO
662 "%s: wv_config_complete(): configure failed; status = 0x%x\n",
663 dev->name, status);
664#endif /* DEBUG_CONFIG_ERROR */
665
666 ret = 1; /* Ready to be scrapped */
667 }
668
669#ifdef DEBUG_INTERRUPT_TRACE
670 printk(KERN_DEBUG "%s: <-wv_config_complete() - %d\n", dev->name,
671 ret);
672#endif
673 return ret;
674}
675
676/*------------------------------------------------------------------*/
677/*
678 * Command completion interrupt.
679 * Reclaim as many freed tx buffers as we can.
680 * (called in wavelan_interrupt()).
681 * Note : the spinlock is already grabbed for us.
682 */
683static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
684{
685 int nreaped = 0;
686
687#ifdef DEBUG_INTERRUPT_TRACE
688 printk(KERN_DEBUG "%s: ->wv_complete()\n", dev->name);
689#endif
690
691 /* Loop on all the transmit buffers */
692 while (lp->tx_first_in_use != I82586NULL) {
693 unsigned short tx_status;
694
695 /* Read the first transmit buffer */
696 obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status),
697 (unsigned char *) &tx_status,
698 sizeof(tx_status));
699
700 /* If not completed -> exit */
701 if ((tx_status & AC_SFLD_C) == 0)
702 break;
703
704 /* Hack for reconfiguration */
705 if (tx_status == 0xFFFF)
706 if (!wv_config_complete(dev, ioaddr, lp))
707 break; /* Not completed */
708
709 /* We now remove this buffer */
710 nreaped++;
711 --lp->tx_n_in_use;
712
713/*
714if (lp->tx_n_in_use > 0)
715 printk("%c", "0123456789abcdefghijk"[lp->tx_n_in_use]);
716*/
717
718 /* Was it the last one? */
719 if (lp->tx_n_in_use <= 0)
720 lp->tx_first_in_use = I82586NULL;
721 else {
722 /* Next one in the chain */
723 lp->tx_first_in_use += TXBLOCKZ;
724 if (lp->tx_first_in_use >=
725 OFFSET_CU +
726 NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -=
727 NTXBLOCKS * TXBLOCKZ;
728 }
729
730 /* Hack for reconfiguration */
731 if (tx_status == 0xFFFF)
732 continue;
733
734 /* Now, check status of the finished command */
735 if (tx_status & AC_SFLD_OK) {
736 int ncollisions;
737
738 dev->stats.tx_packets++;
739 ncollisions = tx_status & AC_SFLD_MAXCOL;
740 dev->stats.collisions += ncollisions;
741#ifdef DEBUG_TX_INFO
742 if (ncollisions > 0)
743 printk(KERN_DEBUG
744 "%s: wv_complete(): tx completed after %d collisions.\n",
745 dev->name, ncollisions);
746#endif
747 } else {
748 dev->stats.tx_errors++;
749 if (tx_status & AC_SFLD_S10) {
750 dev->stats.tx_carrier_errors++;
751#ifdef DEBUG_TX_FAIL
752 printk(KERN_DEBUG
753 "%s: wv_complete(): tx error: no CS.\n",
754 dev->name);
755#endif
756 }
757 if (tx_status & AC_SFLD_S9) {
758 dev->stats.tx_carrier_errors++;
759#ifdef DEBUG_TX_FAIL
760 printk(KERN_DEBUG
761 "%s: wv_complete(): tx error: lost CTS.\n",
762 dev->name);
763#endif
764 }
765 if (tx_status & AC_SFLD_S8) {
766 dev->stats.tx_fifo_errors++;
767#ifdef DEBUG_TX_FAIL
768 printk(KERN_DEBUG
769 "%s: wv_complete(): tx error: slow DMA.\n",
770 dev->name);
771#endif
772 }
773 if (tx_status & AC_SFLD_S6) {
774 dev->stats.tx_heartbeat_errors++;
775#ifdef DEBUG_TX_FAIL
776 printk(KERN_DEBUG
777 "%s: wv_complete(): tx error: heart beat.\n",
778 dev->name);
779#endif
780 }
781 if (tx_status & AC_SFLD_S5) {
782 dev->stats.tx_aborted_errors++;
783#ifdef DEBUG_TX_FAIL
784 printk(KERN_DEBUG
785 "%s: wv_complete(): tx error: too many collisions.\n",
786 dev->name);
787#endif
788 }
789 }
790
791#ifdef DEBUG_TX_INFO
792 printk(KERN_DEBUG
793 "%s: wv_complete(): tx completed, tx_status 0x%04x\n",
794 dev->name, tx_status);
795#endif
796 }
797
798#ifdef DEBUG_INTERRUPT_INFO
799 if (nreaped > 1)
800 printk(KERN_DEBUG "%s: wv_complete(): reaped %d\n",
801 dev->name, nreaped);
802#endif
803
804 /*
805 * Inform upper layers.
806 */
807 if (lp->tx_n_in_use < NTXBLOCKS - 1) {
808 netif_wake_queue(dev);
809 }
810#ifdef DEBUG_INTERRUPT_TRACE
811 printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name);
812#endif
813 return nreaped;
814}
815
816/*------------------------------------------------------------------*/
817/*
818 * Reconfigure the i82586, or at least ask for it.
819 * Because wv_82586_config uses a transmission buffer, we must do it
820 * when we are sure that there is one left, so we do it now
821 * or in wavelan_packet_xmit() (I can't find any better place,
822 * wavelan_interrupt is not an option), so you may experience
823 * delays sometimes.
824 */
825static void wv_82586_reconfig(struct net_device * dev)
826{
827 net_local *lp = netdev_priv(dev);
828 unsigned long flags;
829
830 /* Arm the flag, will be cleard in wv_82586_config() */
831 lp->reconfig_82586 = 1;
832
833 /* Check if we can do it now ! */
834 if((netif_running(dev)) && !(netif_queue_stopped(dev))) {
835 spin_lock_irqsave(&lp->spinlock, flags);
836 /* May fail */
837 wv_82586_config(dev);
838 spin_unlock_irqrestore(&lp->spinlock, flags);
839 }
840 else {
841#ifdef DEBUG_CONFIG_INFO
842 printk(KERN_DEBUG
843 "%s: wv_82586_reconfig(): delayed (state = %lX)\n",
844 dev->name, dev->state);
845#endif
846 }
847}
848
849/********************* DEBUG & INFO SUBROUTINES *********************/
850/*
851 * This routine is used in the code to show information for debugging.
852 * Most of the time, it dumps the contents of hardware structures.
853 */
854
855#ifdef DEBUG_PSA_SHOW
856/*------------------------------------------------------------------*/
857/*
858 * Print the formatted contents of the Parameter Storage Area.
859 */
860static void wv_psa_show(psa_t * p)
861{
862 printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n");
863 printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
864 p->psa_io_base_addr_1,
865 p->psa_io_base_addr_2,
866 p->psa_io_base_addr_3, p->psa_io_base_addr_4);
867 printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
868 p->psa_rem_boot_addr_1,
869 p->psa_rem_boot_addr_2, p->psa_rem_boot_addr_3);
870 printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
871 printk("psa_int_req_no: %d\n", p->psa_int_req_no);
872#ifdef DEBUG_SHOW_UNUSED
873 printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
874#endif /* DEBUG_SHOW_UNUSED */
875 printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
876 printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
877 printk(KERN_DEBUG "psa_univ_local_sel: %d, ",
878 p->psa_univ_local_sel);
879 printk("psa_comp_number: %d, ", p->psa_comp_number);
880 printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
881 printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
882 p->psa_feature_select);
883 printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
884 printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
885 printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
886 printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0],
887 p->psa_nwid[1]);
888 printk("psa_nwid_select: %d\n", p->psa_nwid_select);
889 printk(KERN_DEBUG "psa_encryption_select: %d, ",
890 p->psa_encryption_select);
891 printk
892 ("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
893 p->psa_encryption_key[0], p->psa_encryption_key[1],
894 p->psa_encryption_key[2], p->psa_encryption_key[3],
895 p->psa_encryption_key[4], p->psa_encryption_key[5],
896 p->psa_encryption_key[6], p->psa_encryption_key[7]);
897 printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
898 printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
899 p->psa_call_code[0]);
900 printk
901 ("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
902 p->psa_call_code[0], p->psa_call_code[1], p->psa_call_code[2],
903 p->psa_call_code[3], p->psa_call_code[4], p->psa_call_code[5],
904 p->psa_call_code[6], p->psa_call_code[7]);
905#ifdef DEBUG_SHOW_UNUSED
906 printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
907 p->psa_reserved[0],
908 p->psa_reserved[1]);
909#endif /* DEBUG_SHOW_UNUSED */
910 printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
911 printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
912 printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
913} /* wv_psa_show */
914#endif /* DEBUG_PSA_SHOW */
915
916#ifdef DEBUG_MMC_SHOW
917/*------------------------------------------------------------------*/
918/*
919 * Print the formatted status of the Modem Management Controller.
920 * This function needs to be completed.
921 */
922static void wv_mmc_show(struct net_device * dev)
923{
924 unsigned long ioaddr = dev->base_addr;
925 net_local *lp = netdev_priv(dev);
926 mmr_t m;
927
928 /* Basic check */
929 if (hasr_read(ioaddr) & HASR_NO_CLK) {
930 printk(KERN_WARNING
931 "%s: wv_mmc_show: modem not connected\n",
932 dev->name);
933 return;
934 }
935
936 /* Read the mmc */
937 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
938 mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m));
939 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
940
941 /* Don't forget to update statistics */
942 lp->wstats.discard.nwid +=
943 (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
944
945 printk(KERN_DEBUG "##### WaveLAN modem status registers: #####\n");
946#ifdef DEBUG_SHOW_UNUSED
947 printk(KERN_DEBUG
948 "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
949 m.mmr_unused0[0], m.mmr_unused0[1], m.mmr_unused0[2],
950 m.mmr_unused0[3], m.mmr_unused0[4], m.mmr_unused0[5],
951 m.mmr_unused0[6], m.mmr_unused0[7]);
952#endif /* DEBUG_SHOW_UNUSED */
953 printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
954 m.mmr_des_avail, m.mmr_des_status);
955#ifdef DEBUG_SHOW_UNUSED
956 printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
957 m.mmr_unused1[0],
958 m.mmr_unused1[1],
959 m.mmr_unused1[2], m.mmr_unused1[3], m.mmr_unused1[4]);
960#endif /* DEBUG_SHOW_UNUSED */
961 printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
962 m.mmr_dce_status,
963 (m.
964 mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ?
965 "energy detected," : "",
966 (m.
967 mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
968 "loop test indicated," : "",
969 (m.
970 mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ?
971 "transmitter on," : "",
972 (m.
973 mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
974 "jabber timer expired," : "");
975 printk(KERN_DEBUG "Dsp ID: %02X\n", m.mmr_dsp_id);
976#ifdef DEBUG_SHOW_UNUSED
977 printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
978 m.mmr_unused2[0], m.mmr_unused2[1]);
979#endif /* DEBUG_SHOW_UNUSED */
980 printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
981 (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
982 (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
983 printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
984 m.mmr_thr_pre_set & MMR_THR_PRE_SET,
985 (m.
986 mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" :
987 "below");
988 printk(KERN_DEBUG "signal_lvl: %d [%s], ",
989 m.mmr_signal_lvl & MMR_SIGNAL_LVL,
990 (m.
991 mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" :
992 "no new msg");
993 printk("silence_lvl: %d [%s], ",
994 m.mmr_silence_lvl & MMR_SILENCE_LVL,
995 (m.
996 mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" :
997 "no new update");
998 printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
999 (m.
1000 mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" :
1001 "Antenna 0");
1002#ifdef DEBUG_SHOW_UNUSED
1003 printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
1004#endif /* DEBUG_SHOW_UNUSED */
1005} /* wv_mmc_show */
1006#endif /* DEBUG_MMC_SHOW */
1007
1008#ifdef DEBUG_I82586_SHOW
1009/*------------------------------------------------------------------*/
1010/*
1011 * Print the last block of the i82586 memory.
1012 */
1013static void wv_scb_show(unsigned long ioaddr)
1014{
1015 scb_t scb;
1016
1017 obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
1018 sizeof(scb));
1019
1020 printk(KERN_DEBUG "##### WaveLAN system control block: #####\n");
1021
1022 printk(KERN_DEBUG "status: ");
1023 printk("stat 0x%x[%s%s%s%s] ",
1024 (scb.
1025 scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA |
1026 SCB_ST_RNR)) >> 12,
1027 (scb.
1028 scb_status & SCB_ST_CX) ? "command completion interrupt," :
1029 "", (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
1030 (scb.
1031 scb_status & SCB_ST_CNA) ? "command unit not active," : "",
1032 (scb.
1033 scb_status & SCB_ST_RNR) ? "receiving unit not ready," :
1034 "");
1035 printk("cus 0x%x[%s%s%s] ", (scb.scb_status & SCB_ST_CUS) >> 8,
1036 ((scb.scb_status & SCB_ST_CUS) ==
1037 SCB_ST_CUS_IDLE) ? "idle" : "",
1038 ((scb.scb_status & SCB_ST_CUS) ==
1039 SCB_ST_CUS_SUSP) ? "suspended" : "",
1040 ((scb.scb_status & SCB_ST_CUS) ==
1041 SCB_ST_CUS_ACTV) ? "active" : "");
1042 printk("rus 0x%x[%s%s%s%s]\n", (scb.scb_status & SCB_ST_RUS) >> 4,
1043 ((scb.scb_status & SCB_ST_RUS) ==
1044 SCB_ST_RUS_IDLE) ? "idle" : "",
1045 ((scb.scb_status & SCB_ST_RUS) ==
1046 SCB_ST_RUS_SUSP) ? "suspended" : "",
1047 ((scb.scb_status & SCB_ST_RUS) ==
1048 SCB_ST_RUS_NRES) ? "no resources" : "",
1049 ((scb.scb_status & SCB_ST_RUS) ==
1050 SCB_ST_RUS_RDY) ? "ready" : "");
1051
1052 printk(KERN_DEBUG "command: ");
1053 printk("ack 0x%x[%s%s%s%s] ",
1054 (scb.
1055 scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR |
1056 SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
1057 (scb.
1058 scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
1059 (scb.
1060 scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
1061 (scb.
1062 scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
1063 (scb.
1064 scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : "");
1065 printk("cuc 0x%x[%s%s%s%s%s] ",
1066 (scb.scb_command & SCB_CMD_CUC) >> 8,
1067 ((scb.scb_command & SCB_CMD_CUC) ==
1068 SCB_CMD_CUC_NOP) ? "nop" : "",
1069 ((scb.scb_command & SCB_CMD_CUC) ==
1070 SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
1071 ((scb.scb_command & SCB_CMD_CUC) ==
1072 SCB_CMD_CUC_RES) ? "resume execution" : "",
1073 ((scb.scb_command & SCB_CMD_CUC) ==
1074 SCB_CMD_CUC_SUS) ? "suspend execution" : "",
1075 ((scb.scb_command & SCB_CMD_CUC) ==
1076 SCB_CMD_CUC_ABT) ? "abort execution" : "");
1077 printk("ruc 0x%x[%s%s%s%s%s]\n",
1078 (scb.scb_command & SCB_CMD_RUC) >> 4,
1079 ((scb.scb_command & SCB_CMD_RUC) ==
1080 SCB_CMD_RUC_NOP) ? "nop" : "",
1081 ((scb.scb_command & SCB_CMD_RUC) ==
1082 SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
1083 ((scb.scb_command & SCB_CMD_RUC) ==
1084 SCB_CMD_RUC_RES) ? "resume reception" : "",
1085 ((scb.scb_command & SCB_CMD_RUC) ==
1086 SCB_CMD_RUC_SUS) ? "suspend reception" : "",
1087 ((scb.scb_command & SCB_CMD_RUC) ==
1088 SCB_CMD_RUC_ABT) ? "abort reception" : "");
1089
1090 printk(KERN_DEBUG "cbl_offset 0x%x ", scb.scb_cbl_offset);
1091 printk("rfa_offset 0x%x\n", scb.scb_rfa_offset);
1092
1093 printk(KERN_DEBUG "crcerrs %d ", scb.scb_crcerrs);
1094 printk("alnerrs %d ", scb.scb_alnerrs);
1095 printk("rscerrs %d ", scb.scb_rscerrs);
1096 printk("ovrnerrs %d\n", scb.scb_ovrnerrs);
1097}
1098
1099/*------------------------------------------------------------------*/
1100/*
1101 * Print the formatted status of the i82586's receive unit.
1102 */
1103static void wv_ru_show(struct net_device * dev)
1104{
1105 printk(KERN_DEBUG
1106 "##### WaveLAN i82586 receiver unit status: #####\n");
1107 printk(KERN_DEBUG "ru:");
1108 /*
1109 * Not implemented yet
1110 */
1111 printk("\n");
1112} /* wv_ru_show */
1113
1114/*------------------------------------------------------------------*/
1115/*
1116 * Display info about one control block of the i82586 memory.
1117 */
1118static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p)
1119{
1120 unsigned long ioaddr;
1121 ac_tx_t actx;
1122
1123 ioaddr = dev->base_addr;
1124
1125 printk("%d: 0x%x:", i, p);
1126
1127 obram_read(ioaddr, p, (unsigned char *) &actx, sizeof(actx));
1128 printk(" status=0x%x,", actx.tx_h.ac_status);
1129 printk(" command=0x%x,", actx.tx_h.ac_command);
1130
1131 /*
1132 {
1133 tbd_t tbd;
1134
1135 obram_read(ioaddr, actx.tx_tbd_offset, (unsigned char *)&tbd, sizeof(tbd));
1136 printk(" tbd_status=0x%x,", tbd.tbd_status);
1137 }
1138 */
1139
1140 printk("|");
1141}
1142
1143/*------------------------------------------------------------------*/
1144/*
1145 * Print status of the command unit of the i82586.
1146 */
1147static void wv_cu_show(struct net_device * dev)
1148{
1149 net_local *lp = netdev_priv(dev);
1150 unsigned int i;
1151 u16 p;
1152
1153 printk(KERN_DEBUG
1154 "##### WaveLAN i82586 command unit status: #####\n");
1155
1156 printk(KERN_DEBUG);
1157 for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++) {
1158 wv_cu_show_one(dev, lp, i, p);
1159
1160 p += TXBLOCKZ;
1161 if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
1162 p -= NTXBLOCKS * TXBLOCKZ;
1163 }
1164 printk("\n");
1165}
1166#endif /* DEBUG_I82586_SHOW */
1167
1168#ifdef DEBUG_DEVICE_SHOW
1169/*------------------------------------------------------------------*/
1170/*
1171 * Print the formatted status of the WaveLAN PCMCIA device driver.
1172 */
1173static void wv_dev_show(struct net_device * dev)
1174{
1175 printk(KERN_DEBUG "dev:");
1176 printk(" state=%lX,", dev->state);
1177 printk(" trans_start=%ld,", dev->trans_start);
1178 printk(" flags=0x%x,", dev->flags);
1179 printk("\n");
1180} /* wv_dev_show */
1181
1182/*------------------------------------------------------------------*/
1183/*
1184 * Print the formatted status of the WaveLAN PCMCIA device driver's
1185 * private information.
1186 */
1187static void wv_local_show(struct net_device * dev)
1188{
1189 net_local *lp;
1190
1191 lp = netdev_priv(dev);
1192
1193 printk(KERN_DEBUG "local:");
1194 printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
1195 printk(" hacr=0x%x,", lp->hacr);
1196 printk(" rx_head=0x%x,", lp->rx_head);
1197 printk(" rx_last=0x%x,", lp->rx_last);
1198 printk(" tx_first_free=0x%x,", lp->tx_first_free);
1199 printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
1200 printk("\n");
1201} /* wv_local_show */
1202#endif /* DEBUG_DEVICE_SHOW */
1203
1204#if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
1205/*------------------------------------------------------------------*/
1206/*
1207 * Dump packet header (and content if necessary) on the screen
1208 */
1209static inline void wv_packet_info(u8 * p, /* Packet to dump */
1210 int length, /* Length of the packet */
1211 char *msg1, /* Name of the device */
1212 char *msg2)
1213{ /* Name of the function */
1214 int i;
1215 int maxi;
1216
1217 printk(KERN_DEBUG
1218 "%s: %s(): dest %pM, length %d\n",
1219 msg1, msg2, p, length);
1220 printk(KERN_DEBUG
1221 "%s: %s(): src %pM, type 0x%02X%02X\n",
1222 msg1, msg2, &p[6], p[12], p[13]);
1223
1224#ifdef DEBUG_PACKET_DUMP
1225
1226 printk(KERN_DEBUG "data=\"");
1227
1228 if ((maxi = length) > DEBUG_PACKET_DUMP)
1229 maxi = DEBUG_PACKET_DUMP;
1230 for (i = 14; i < maxi; i++)
1231 if (p[i] >= ' ' && p[i] <= '~')
1232 printk(" %c", p[i]);
1233 else
1234 printk("%02X", p[i]);
1235 if (maxi < length)
1236 printk("..");
1237 printk("\"\n");
1238 printk(KERN_DEBUG "\n");
1239#endif /* DEBUG_PACKET_DUMP */
1240}
1241#endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
1242
1243/*------------------------------------------------------------------*/
1244/*
1245 * This is the information which is displayed by the driver at startup.
1246 * There are lots of flags for configuring it to your liking.
1247 */
1248static void wv_init_info(struct net_device * dev)
1249{
1250 short ioaddr = dev->base_addr;
1251 net_local *lp = netdev_priv(dev);
1252 psa_t psa;
1253
1254 /* Read the parameter storage area */
1255 psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
1256
1257#ifdef DEBUG_PSA_SHOW
1258 wv_psa_show(&psa);
1259#endif
1260#ifdef DEBUG_MMC_SHOW
1261 wv_mmc_show(dev);
1262#endif
1263#ifdef DEBUG_I82586_SHOW
1264 wv_cu_show(dev);
1265#endif
1266
1267#ifdef DEBUG_BASIC_SHOW
1268 /* Now, let's go for the basic stuff. */
1269 printk(KERN_NOTICE "%s: WaveLAN at %#x, %pM, IRQ %d",
1270 dev->name, ioaddr, dev->dev_addr, dev->irq);
1271
1272 /* Print current network ID. */
1273 if (psa.psa_nwid_select)
1274 printk(", nwid 0x%02X-%02X", psa.psa_nwid[0],
1275 psa.psa_nwid[1]);
1276 else
1277 printk(", nwid off");
1278
1279 /* If 2.00 card */
1280 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
1281 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
1282 unsigned short freq;
1283
1284 /* Ask the EEPROM to read the frequency from the first area. */
1285 fee_read(ioaddr, 0x00, &freq, 1);
1286
1287 /* Print frequency */
1288 printk(", 2.00, %ld", (freq >> 6) + 2400L);
1289
1290 /* Hack! */
1291 if (freq & 0x20)
1292 printk(".5");
1293 } else {
1294 printk(", PC");
1295 switch (psa.psa_comp_number) {
1296 case PSA_COMP_PC_AT_915:
1297 case PSA_COMP_PC_AT_2400:
1298 printk("-AT");
1299 break;
1300 case PSA_COMP_PC_MC_915:
1301 case PSA_COMP_PC_MC_2400:
1302 printk("-MC");
1303 break;
1304 case PSA_COMP_PCMCIA_915:
1305 printk("MCIA");
1306 break;
1307 default:
1308 printk("?");
1309 }
1310 printk(", ");
1311 switch (psa.psa_subband) {
1312 case PSA_SUBBAND_915:
1313 printk("915");
1314 break;
1315 case PSA_SUBBAND_2425:
1316 printk("2425");
1317 break;
1318 case PSA_SUBBAND_2460:
1319 printk("2460");
1320 break;
1321 case PSA_SUBBAND_2484:
1322 printk("2484");
1323 break;
1324 case PSA_SUBBAND_2430_5:
1325 printk("2430.5");
1326 break;
1327 default:
1328 printk("?");
1329 }
1330 }
1331
1332 printk(" MHz\n");
1333#endif /* DEBUG_BASIC_SHOW */
1334
1335#ifdef DEBUG_VERSION_SHOW
1336 /* Print version information */
1337 printk(KERN_NOTICE "%s", version);
1338#endif
1339} /* wv_init_info */
1340
1341/********************* IOCTL, STATS & RECONFIG *********************/
1342/*
1343 * We found here routines that are called by Linux on different
1344 * occasions after the configuration and not for transmitting data
1345 * These may be called when the user use ifconfig, /proc/net/dev
1346 * or wireless extensions
1347 */
1348
1349
1350/*------------------------------------------------------------------*/
1351/*
1352 * Set or clear the multicast filter for this adaptor.
1353 * num_addrs == -1 Promiscuous mode, receive all packets
1354 * num_addrs == 0 Normal mode, clear multicast list
1355 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1356 * and do best-effort filtering.
1357 */
1358static void wavelan_set_multicast_list(struct net_device * dev)
1359{
1360 net_local *lp = netdev_priv(dev);
1361
1362#ifdef DEBUG_IOCTL_TRACE
1363 printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n",
1364 dev->name);
1365#endif
1366
1367#ifdef DEBUG_IOCTL_INFO
1368 printk(KERN_DEBUG
1369 "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
1370 dev->name, dev->flags, dev->mc_count);
1371#endif
1372
1373 /* Are we asking for promiscuous mode,
1374 * or all multicast addresses (we don't have that!)
1375 * or too many multicast addresses for the hardware filter? */
1376 if ((dev->flags & IFF_PROMISC) ||
1377 (dev->flags & IFF_ALLMULTI) ||
1378 (dev->mc_count > I82586_MAX_MULTICAST_ADDRESSES)) {
1379 /*
1380 * Enable promiscuous mode: receive all packets.
1381 */
1382 if (!lp->promiscuous) {
1383 lp->promiscuous = 1;
1384 lp->mc_count = 0;
1385
1386 wv_82586_reconfig(dev);
1387 }
1388 } else
1389 /* Are there multicast addresses to send? */
1390 if (dev->mc_list != (struct dev_mc_list *) NULL) {
1391 /*
1392 * Disable promiscuous mode, but receive all packets
1393 * in multicast list
1394 */
1395#ifdef MULTICAST_AVOID
1396 if (lp->promiscuous || (dev->mc_count != lp->mc_count))
1397#endif
1398 {
1399 lp->promiscuous = 0;
1400 lp->mc_count = dev->mc_count;
1401
1402 wv_82586_reconfig(dev);
1403 }
1404 } else {
1405 /*
1406 * Switch to normal mode: disable promiscuous mode and
1407 * clear the multicast list.
1408 */
1409 if (lp->promiscuous || lp->mc_count == 0) {
1410 lp->promiscuous = 0;
1411 lp->mc_count = 0;
1412
1413 wv_82586_reconfig(dev);
1414 }
1415 }
1416#ifdef DEBUG_IOCTL_TRACE
1417 printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n",
1418 dev->name);
1419#endif
1420}
1421
1422/*------------------------------------------------------------------*/
1423/*
1424 * This function doesn't exist.
1425 * (Note : it was a nice way to test the reconfigure stuff...)
1426 */
1427#ifdef SET_MAC_ADDRESS
1428static int wavelan_set_mac_address(struct net_device * dev, void *addr)
1429{
1430 struct sockaddr *mac = addr;
1431
1432 /* Copy the address. */
1433 memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
1434
1435 /* Reconfigure the beast. */
1436 wv_82586_reconfig(dev);
1437
1438 return 0;
1439}
1440#endif /* SET_MAC_ADDRESS */
1441
1442
1443/*------------------------------------------------------------------*/
1444/*
1445 * Frequency setting (for hardware capable of it)
1446 * It's a bit complicated and you don't really want to look into it.
1447 * (called in wavelan_ioctl)
1448 */
1449static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */
1450 iw_freq * frequency)
1451{
1452 const int BAND_NUM = 10; /* Number of bands */
1453 long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
1454#ifdef DEBUG_IOCTL_INFO
1455 int i;
1456#endif
1457
1458 /* Setting by frequency */
1459 /* Theoretically, you may set any frequency between
1460 * the two limits with a 0.5 MHz precision. In practice,
1461 * I don't want you to have trouble with local regulations.
1462 */
1463 if ((frequency->e == 1) &&
1464 (frequency->m >= (int) 2.412e8)
1465 && (frequency->m <= (int) 2.487e8)) {
1466 freq = ((frequency->m / 10000) - 24000L) / 5;
1467 }
1468
1469 /* Setting by channel (same as wfreqsel) */
1470 /* Warning: each channel is 22 MHz wide, so some of the channels
1471 * will interfere. */
1472 if ((frequency->e == 0) && (frequency->m < BAND_NUM)) {
1473 /* Get frequency offset. */
1474 freq = channel_bands[frequency->m] >> 1;
1475 }
1476
1477 /* Verify that the frequency is allowed. */
1478 if (freq != 0L) {
1479 u16 table[10]; /* Authorized frequency table */
1480
1481 /* Read the frequency table. */
1482 fee_read(ioaddr, 0x71, table, 10);
1483
1484#ifdef DEBUG_IOCTL_INFO
1485 printk(KERN_DEBUG "Frequency table: ");
1486 for (i = 0; i < 10; i++) {
1487 printk(" %04X", table[i]);
1488 }
1489 printk("\n");
1490#endif
1491
1492 /* Look in the table to see whether the frequency is allowed. */
1493 if (!(table[9 - ((freq - 24) / 16)] &
1494 (1 << ((freq - 24) % 16)))) return -EINVAL; /* not allowed */
1495 } else
1496 return -EINVAL;
1497
1498 /* if we get a usable frequency */
1499 if (freq != 0L) {
1500 unsigned short area[16];
1501 unsigned short dac[2];
1502 unsigned short area_verify[16];
1503 unsigned short dac_verify[2];
1504 /* Corresponding gain (in the power adjust value table)
1505 * See AT&T WaveLAN Data Manual, REF 407-024689/E, page 3-8
1506 * and WCIN062D.DOC, page 6.2.9. */
1507 unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
1508 int power_band = 0; /* Selected band */
1509 unsigned short power_adjust; /* Correct value */
1510
1511 /* Search for the gain. */
1512 power_band = 0;
1513 while ((freq > power_limit[power_band]) &&
1514 (power_limit[++power_band] != 0));
1515
1516 /* Read the first area. */
1517 fee_read(ioaddr, 0x00, area, 16);
1518
1519 /* Read the DAC. */
1520 fee_read(ioaddr, 0x60, dac, 2);
1521
1522 /* Read the new power adjust value. */
1523 fee_read(ioaddr, 0x6B - (power_band >> 1), &power_adjust,
1524 1);
1525 if (power_band & 0x1)
1526 power_adjust >>= 8;
1527 else
1528 power_adjust &= 0xFF;
1529
1530#ifdef DEBUG_IOCTL_INFO
1531 printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
1532 for (i = 0; i < 16; i++) {
1533 printk(" %04X", area[i]);
1534 }
1535 printk("\n");
1536
1537 printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
1538 dac[0], dac[1]);
1539#endif
1540
1541 /* Frequency offset (for info only) */
1542 area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
1543
1544 /* Receiver Principle main divider coefficient */
1545 area[3] = (freq >> 1) + 2400L - 352L;
1546 area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1547
1548 /* Transmitter Main divider coefficient */
1549 area[13] = (freq >> 1) + 2400L;
1550 area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1551
1552 /* Other parts of the area are flags, bit streams or unused. */
1553
1554 /* Set the value in the DAC. */
1555 dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
1556 dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
1557
1558 /* Write the first area. */
1559 fee_write(ioaddr, 0x00, area, 16);
1560
1561 /* Write the DAC. */
1562 fee_write(ioaddr, 0x60, dac, 2);
1563
1564 /* We now should verify here that the writing of the EEPROM went OK. */
1565
1566 /* Reread the first area. */
1567 fee_read(ioaddr, 0x00, area_verify, 16);
1568
1569 /* Reread the DAC. */
1570 fee_read(ioaddr, 0x60, dac_verify, 2);
1571
1572 /* Compare. */
1573 if (memcmp(area, area_verify, 16 * 2) ||
1574 memcmp(dac, dac_verify, 2 * 2)) {
1575#ifdef DEBUG_IOCTL_ERROR
1576 printk(KERN_INFO
1577 "WaveLAN: wv_set_frequency: unable to write new frequency to EEPROM(?).\n");
1578#endif
1579 return -EOPNOTSUPP;
1580 }
1581
1582 /* We must download the frequency parameters to the
1583 * synthesizers (from the EEPROM - area 1)
1584 * Note: as the EEPROM is automatically decremented, we set the end
1585 * if the area... */
1586 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x0F);
1587 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
1588 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1589
1590 /* Wait until the download is finished. */
1591 fee_wait(ioaddr, 100, 100);
1592
1593 /* We must now download the power adjust value (gain) to
1594 * the synthesizers (from the EEPROM - area 7 - DAC). */
1595 mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x61);
1596 mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
1597 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1598
1599 /* Wait for the download to finish. */
1600 fee_wait(ioaddr, 100, 100);
1601
1602#ifdef DEBUG_IOCTL_INFO
1603 /* Verification of what we have done */
1604
1605 printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
1606 for (i = 0; i < 16; i++) {
1607 printk(" %04X", area_verify[i]);
1608 }
1609 printk("\n");
1610
1611 printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
1612 dac_verify[0], dac_verify[1]);
1613#endif
1614
1615 return 0;
1616 } else
1617 return -EINVAL; /* Bah, never get there... */
1618}
1619
1620/*------------------------------------------------------------------*/
1621/*
1622 * Give the list of available frequencies.
1623 */
1624static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */
1625 iw_freq * list, /* List of frequencies to fill */
1626 int max)
1627{ /* Maximum number of frequencies */
1628 u16 table[10]; /* Authorized frequency table */
1629 long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
1630 int i; /* index in the table */
1631 int c = 0; /* Channel number */
1632
1633 /* Read the frequency table. */
1634 fee_read(ioaddr, 0x71 /* frequency table */ , table, 10);
1635
1636 /* Check all frequencies. */
1637 i = 0;
1638 for (freq = 0; freq < 150; freq++)
1639 /* Look in the table if the frequency is allowed */
1640 if (table[9 - (freq / 16)] & (1 << (freq % 16))) {
1641 /* Compute approximate channel number */
1642 while ((c < ARRAY_SIZE(channel_bands)) &&
1643 (((channel_bands[c] >> 1) - 24) < freq))
1644 c++;
1645 list[i].i = c; /* Set the list index */
1646
1647 /* put in the list */
1648 list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
1649 list[i++].e = 1;
1650
1651 /* Check number. */
1652 if (i >= max)
1653 return (i);
1654 }
1655
1656 return (i);
1657}
1658
1659#ifdef IW_WIRELESS_SPY
1660/*------------------------------------------------------------------*/
1661/*
1662 * Gather wireless spy statistics: for each packet, compare the source
1663 * address with our list, and if they match, get the statistics.
1664 * Sorry, but this function really needs the wireless extensions.
1665 */
1666static inline void wl_spy_gather(struct net_device * dev,
1667 u8 * mac, /* MAC address */
1668 u8 * stats) /* Statistics to gather */
1669{
1670 struct iw_quality wstats;
1671
1672 wstats.qual = stats[2] & MMR_SGNL_QUAL;
1673 wstats.level = stats[0] & MMR_SIGNAL_LVL;
1674 wstats.noise = stats[1] & MMR_SILENCE_LVL;
1675 wstats.updated = 0x7;
1676
1677 /* Update spy records */
1678 wireless_spy_update(dev, mac, &wstats);
1679}
1680#endif /* IW_WIRELESS_SPY */
1681
1682#ifdef HISTOGRAM
1683/*------------------------------------------------------------------*/
1684/*
1685 * This function calculates a histogram of the signal level.
1686 * As the noise is quite constant, it's like doing it on the SNR.
1687 * We have defined a set of interval (lp->his_range), and each time
1688 * the level goes in that interval, we increment the count (lp->his_sum).
1689 * With this histogram you may detect if one WaveLAN is really weak,
1690 * or you may also calculate the mean and standard deviation of the level.
1691 */
1692static inline void wl_his_gather(struct net_device * dev, u8 * stats)
1693{ /* Statistics to gather */
1694 net_local *lp = netdev_priv(dev);
1695 u8 level = stats[0] & MMR_SIGNAL_LVL;
1696 int i;
1697
1698 /* Find the correct interval. */
1699 i = 0;
1700 while ((i < (lp->his_number - 1))
1701 && (level >= lp->his_range[i++]));
1702
1703 /* Increment interval counter. */
1704 (lp->his_sum[i])++;
1705}
1706#endif /* HISTOGRAM */
1707
1708/*------------------------------------------------------------------*/
1709/*
1710 * Wireless Handler : get protocol name
1711 */
1712static int wavelan_get_name(struct net_device *dev,
1713 struct iw_request_info *info,
1714 union iwreq_data *wrqu,
1715 char *extra)
1716{
1717 strcpy(wrqu->name, "WaveLAN");
1718 return 0;
1719}
1720
1721/*------------------------------------------------------------------*/
1722/*
1723 * Wireless Handler : set NWID
1724 */
1725static int wavelan_set_nwid(struct net_device *dev,
1726 struct iw_request_info *info,
1727 union iwreq_data *wrqu,
1728 char *extra)
1729{
1730 unsigned long ioaddr = dev->base_addr;
1731 net_local *lp = netdev_priv(dev); /* lp is not unused */
1732 psa_t psa;
1733 mm_t m;
1734 unsigned long flags;
1735 int ret = 0;
1736
1737 /* Disable interrupts and save flags. */
1738 spin_lock_irqsave(&lp->spinlock, flags);
1739
1740 /* Set NWID in WaveLAN. */
1741 if (!wrqu->nwid.disabled) {
1742 /* Set NWID in psa */
1743 psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
1744 psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
1745 psa.psa_nwid_select = 0x01;
1746 psa_write(ioaddr, lp->hacr,
1747 (char *) psa.psa_nwid - (char *) &psa,
1748 (unsigned char *) psa.psa_nwid, 3);
1749
1750 /* Set NWID in mmc. */
1751 m.w.mmw_netw_id_l = psa.psa_nwid[1];
1752 m.w.mmw_netw_id_h = psa.psa_nwid[0];
1753 mmc_write(ioaddr,
1754 (char *) &m.w.mmw_netw_id_l -
1755 (char *) &m,
1756 (unsigned char *) &m.w.mmw_netw_id_l, 2);
1757 mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), 0x00);
1758 } else {
1759 /* Disable NWID in the psa. */
1760 psa.psa_nwid_select = 0x00;
1761 psa_write(ioaddr, lp->hacr,
1762 (char *) &psa.psa_nwid_select -
1763 (char *) &psa,
1764 (unsigned char *) &psa.psa_nwid_select,
1765 1);
1766
1767 /* Disable NWID in the mmc (no filtering). */
1768 mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel),
1769 MMW_LOOPT_SEL_DIS_NWID);
1770 }
1771 /* update the Wavelan checksum */
1772 update_psa_checksum(dev, ioaddr, lp->hacr);
1773
1774 /* Enable interrupts and restore flags. */
1775 spin_unlock_irqrestore(&lp->spinlock, flags);
1776
1777 return ret;
1778}
1779
1780/*------------------------------------------------------------------*/
1781/*
1782 * Wireless Handler : get NWID
1783 */
1784static int wavelan_get_nwid(struct net_device *dev,
1785 struct iw_request_info *info,
1786 union iwreq_data *wrqu,
1787 char *extra)
1788{
1789 unsigned long ioaddr = dev->base_addr;
1790 net_local *lp = netdev_priv(dev); /* lp is not unused */
1791 psa_t psa;
1792 unsigned long flags;
1793 int ret = 0;
1794
1795 /* Disable interrupts and save flags. */
1796 spin_lock_irqsave(&lp->spinlock, flags);
1797
1798 /* Read the NWID. */
1799 psa_read(ioaddr, lp->hacr,
1800 (char *) psa.psa_nwid - (char *) &psa,
1801 (unsigned char *) psa.psa_nwid, 3);
1802 wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
1803 wrqu->nwid.disabled = !(psa.psa_nwid_select);
1804 wrqu->nwid.fixed = 1; /* Superfluous */
1805
1806 /* Enable interrupts and restore flags. */
1807 spin_unlock_irqrestore(&lp->spinlock, flags);
1808
1809 return ret;
1810}
1811
1812/*------------------------------------------------------------------*/
1813/*
1814 * Wireless Handler : set frequency
1815 */
1816static int wavelan_set_freq(struct net_device *dev,
1817 struct iw_request_info *info,
1818 union iwreq_data *wrqu,
1819 char *extra)
1820{
1821 unsigned long ioaddr = dev->base_addr;
1822 net_local *lp = netdev_priv(dev); /* lp is not unused */
1823 unsigned long flags;
1824 int ret;
1825
1826 /* Disable interrupts and save flags. */
1827 spin_lock_irqsave(&lp->spinlock, flags);
1828
1829 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
1830 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
1831 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
1832 ret = wv_set_frequency(ioaddr, &(wrqu->freq));
1833 else
1834 ret = -EOPNOTSUPP;
1835
1836 /* Enable interrupts and restore flags. */
1837 spin_unlock_irqrestore(&lp->spinlock, flags);
1838
1839 return ret;
1840}
1841
1842/*------------------------------------------------------------------*/
1843/*
1844 * Wireless Handler : get frequency
1845 */
1846static int wavelan_get_freq(struct net_device *dev,
1847 struct iw_request_info *info,
1848 union iwreq_data *wrqu,
1849 char *extra)
1850{
1851 unsigned long ioaddr = dev->base_addr;
1852 net_local *lp = netdev_priv(dev); /* lp is not unused */
1853 psa_t psa;
1854 unsigned long flags;
1855 int ret = 0;
1856
1857 /* Disable interrupts and save flags. */
1858 spin_lock_irqsave(&lp->spinlock, flags);
1859
1860 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
1861 * Does it work for everybody, especially old cards? */
1862 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
1863 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
1864 unsigned short freq;
1865
1866 /* Ask the EEPROM to read the frequency from the first area. */
1867 fee_read(ioaddr, 0x00, &freq, 1);
1868 wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
1869 wrqu->freq.e = 1;
1870 } else {
1871 psa_read(ioaddr, lp->hacr,
1872 (char *) &psa.psa_subband - (char *) &psa,
1873 (unsigned char *) &psa.psa_subband, 1);
1874
1875 if (psa.psa_subband <= 4) {
1876 wrqu->freq.m = fixed_bands[psa.psa_subband];
1877 wrqu->freq.e = (psa.psa_subband != 0);
1878 } else
1879 ret = -EOPNOTSUPP;
1880 }
1881
1882 /* Enable interrupts and restore flags. */
1883 spin_unlock_irqrestore(&lp->spinlock, flags);
1884
1885 return ret;
1886}
1887
1888/*------------------------------------------------------------------*/
1889/*
1890 * Wireless Handler : set level threshold
1891 */
1892static int wavelan_set_sens(struct net_device *dev,
1893 struct iw_request_info *info,
1894 union iwreq_data *wrqu,
1895 char *extra)
1896{
1897 unsigned long ioaddr = dev->base_addr;
1898 net_local *lp = netdev_priv(dev); /* lp is not unused */
1899 psa_t psa;
1900 unsigned long flags;
1901 int ret = 0;
1902
1903 /* Disable interrupts and save flags. */
1904 spin_lock_irqsave(&lp->spinlock, flags);
1905
1906 /* Set the level threshold. */
1907 /* We should complain loudly if wrqu->sens.fixed = 0, because we
1908 * can't set auto mode... */
1909 psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
1910 psa_write(ioaddr, lp->hacr,
1911 (char *) &psa.psa_thr_pre_set - (char *) &psa,
1912 (unsigned char *) &psa.psa_thr_pre_set, 1);
1913 /* update the Wavelan checksum */
1914 update_psa_checksum(dev, ioaddr, lp->hacr);
1915 mmc_out(ioaddr, mmwoff(0, mmw_thr_pre_set),
1916 psa.psa_thr_pre_set);
1917
1918 /* Enable interrupts and restore flags. */
1919 spin_unlock_irqrestore(&lp->spinlock, flags);
1920
1921 return ret;
1922}
1923
1924/*------------------------------------------------------------------*/
1925/*
1926 * Wireless Handler : get level threshold
1927 */
1928static int wavelan_get_sens(struct net_device *dev,
1929 struct iw_request_info *info,
1930 union iwreq_data *wrqu,
1931 char *extra)
1932{
1933 unsigned long ioaddr = dev->base_addr;
1934 net_local *lp = netdev_priv(dev); /* lp is not unused */
1935 psa_t psa;
1936 unsigned long flags;
1937 int ret = 0;
1938
1939 /* Disable interrupts and save flags. */
1940 spin_lock_irqsave(&lp->spinlock, flags);
1941
1942 /* Read the level threshold. */
1943 psa_read(ioaddr, lp->hacr,
1944 (char *) &psa.psa_thr_pre_set - (char *) &psa,
1945 (unsigned char *) &psa.psa_thr_pre_set, 1);
1946 wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
1947 wrqu->sens.fixed = 1;
1948
1949 /* Enable interrupts and restore flags. */
1950 spin_unlock_irqrestore(&lp->spinlock, flags);
1951
1952 return ret;
1953}
1954
1955/*------------------------------------------------------------------*/
1956/*
1957 * Wireless Handler : set encryption key
1958 */
1959static int wavelan_set_encode(struct net_device *dev,
1960 struct iw_request_info *info,
1961 union iwreq_data *wrqu,
1962 char *extra)
1963{
1964 unsigned long ioaddr = dev->base_addr;
1965 net_local *lp = netdev_priv(dev); /* lp is not unused */
1966 unsigned long flags;
1967 psa_t psa;
1968 int ret = 0;
1969
1970 /* Disable interrupts and save flags. */
1971 spin_lock_irqsave(&lp->spinlock, flags);
1972
1973 /* Check if capable of encryption */
1974 if (!mmc_encr(ioaddr)) {
1975 ret = -EOPNOTSUPP;
1976 }
1977
1978 /* Check the size of the key */
1979 if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
1980 ret = -EINVAL;
1981 }
1982
1983 if(!ret) {
1984 /* Basic checking... */
1985 if (wrqu->encoding.length == 8) {
1986 /* Copy the key in the driver */
1987 memcpy(psa.psa_encryption_key, extra,
1988 wrqu->encoding.length);
1989 psa.psa_encryption_select = 1;
1990
1991 psa_write(ioaddr, lp->hacr,
1992 (char *) &psa.psa_encryption_select -
1993 (char *) &psa,
1994 (unsigned char *) &psa.
1995 psa_encryption_select, 8 + 1);
1996
1997 mmc_out(ioaddr, mmwoff(0, mmw_encr_enable),
1998 MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
1999 mmc_write(ioaddr, mmwoff(0, mmw_encr_key),
2000 (unsigned char *) &psa.
2001 psa_encryption_key, 8);
2002 }
2003
2004 /* disable encryption */
2005 if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
2006 psa.psa_encryption_select = 0;
2007 psa_write(ioaddr, lp->hacr,
2008 (char *) &psa.psa_encryption_select -
2009 (char *) &psa,
2010 (unsigned char *) &psa.
2011 psa_encryption_select, 1);
2012
2013 mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), 0);
2014 }
2015 /* update the Wavelan checksum */
2016 update_psa_checksum(dev, ioaddr, lp->hacr);
2017 }
2018
2019 /* Enable interrupts and restore flags. */
2020 spin_unlock_irqrestore(&lp->spinlock, flags);
2021
2022 return ret;
2023}
2024
2025/*------------------------------------------------------------------*/
2026/*
2027 * Wireless Handler : get encryption key
2028 */
2029static int wavelan_get_encode(struct net_device *dev,
2030 struct iw_request_info *info,
2031 union iwreq_data *wrqu,
2032 char *extra)
2033{
2034 unsigned long ioaddr = dev->base_addr;
2035 net_local *lp = netdev_priv(dev); /* lp is not unused */
2036 psa_t psa;
2037 unsigned long flags;
2038 int ret = 0;
2039
2040 /* Disable interrupts and save flags. */
2041 spin_lock_irqsave(&lp->spinlock, flags);
2042
2043 /* Check if encryption is available */
2044 if (!mmc_encr(ioaddr)) {
2045 ret = -EOPNOTSUPP;
2046 } else {
2047 /* Read the encryption key */
2048 psa_read(ioaddr, lp->hacr,
2049 (char *) &psa.psa_encryption_select -
2050 (char *) &psa,
2051 (unsigned char *) &psa.
2052 psa_encryption_select, 1 + 8);
2053
2054 /* encryption is enabled ? */
2055 if (psa.psa_encryption_select)
2056 wrqu->encoding.flags = IW_ENCODE_ENABLED;
2057 else
2058 wrqu->encoding.flags = IW_ENCODE_DISABLED;
2059 wrqu->encoding.flags |= mmc_encr(ioaddr);
2060
2061 /* Copy the key to the user buffer */
2062 wrqu->encoding.length = 8;
2063 memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
2064 }
2065
2066 /* Enable interrupts and restore flags. */
2067 spin_unlock_irqrestore(&lp->spinlock, flags);
2068
2069 return ret;
2070}
2071
2072/*------------------------------------------------------------------*/
2073/*
2074 * Wireless Handler : get range info
2075 */
2076static int wavelan_get_range(struct net_device *dev,
2077 struct iw_request_info *info,
2078 union iwreq_data *wrqu,
2079 char *extra)
2080{
2081 unsigned long ioaddr = dev->base_addr;
2082 net_local *lp = netdev_priv(dev); /* lp is not unused */
2083 struct iw_range *range = (struct iw_range *) extra;
2084 unsigned long flags;
2085 int ret = 0;
2086
2087 /* Set the length (very important for backward compatibility) */
2088 wrqu->data.length = sizeof(struct iw_range);
2089
2090 /* Set all the info we don't care or don't know about to zero */
2091 memset(range, 0, sizeof(struct iw_range));
2092
2093 /* Set the Wireless Extension versions */
2094 range->we_version_compiled = WIRELESS_EXT;
2095 range->we_version_source = 9;
2096
2097 /* Set information in the range struct. */
2098 range->throughput = 1.6 * 1000 * 1000; /* don't argue on this ! */
2099 range->min_nwid = 0x0000;
2100 range->max_nwid = 0xFFFF;
2101
2102 range->sensitivity = 0x3F;
2103 range->max_qual.qual = MMR_SGNL_QUAL;
2104 range->max_qual.level = MMR_SIGNAL_LVL;
2105 range->max_qual.noise = MMR_SILENCE_LVL;
2106 range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
2107 /* Need to get better values for those two */
2108 range->avg_qual.level = 30;
2109 range->avg_qual.noise = 8;
2110
2111 range->num_bitrates = 1;
2112 range->bitrate[0] = 2000000; /* 2 Mb/s */
2113
2114 /* Event capability (kernel + driver) */
2115 range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
2116 IW_EVENT_CAPA_MASK(0x8B04));
2117 range->event_capa[1] = IW_EVENT_CAPA_K_1;
2118
2119 /* Disable interrupts and save flags. */
2120 spin_lock_irqsave(&lp->spinlock, flags);
2121
2122 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
2123 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
2124 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
2125 range->num_channels = 10;
2126 range->num_frequency = wv_frequency_list(ioaddr, range->freq,
2127 IW_MAX_FREQUENCIES);
2128 } else
2129 range->num_channels = range->num_frequency = 0;
2130
2131 /* Encryption supported ? */
2132 if (mmc_encr(ioaddr)) {
2133 range->encoding_size[0] = 8; /* DES = 64 bits key */
2134 range->num_encoding_sizes = 1;
2135 range->max_encoding_tokens = 1; /* Only one key possible */
2136 } else {
2137 range->num_encoding_sizes = 0;
2138 range->max_encoding_tokens = 0;
2139 }
2140
2141 /* Enable interrupts and restore flags. */
2142 spin_unlock_irqrestore(&lp->spinlock, flags);
2143
2144 return ret;
2145}
2146
2147/*------------------------------------------------------------------*/
2148/*
2149 * Wireless Private Handler : set quality threshold
2150 */
2151static int wavelan_set_qthr(struct net_device *dev,
2152 struct iw_request_info *info,
2153 union iwreq_data *wrqu,
2154 char *extra)
2155{
2156 unsigned long ioaddr = dev->base_addr;
2157 net_local *lp = netdev_priv(dev); /* lp is not unused */
2158 psa_t psa;
2159 unsigned long flags;
2160
2161 /* Disable interrupts and save flags. */
2162 spin_lock_irqsave(&lp->spinlock, flags);
2163
2164 psa.psa_quality_thr = *(extra) & 0x0F;
2165 psa_write(ioaddr, lp->hacr,
2166 (char *) &psa.psa_quality_thr - (char *) &psa,
2167 (unsigned char *) &psa.psa_quality_thr, 1);
2168 /* update the Wavelan checksum */
2169 update_psa_checksum(dev, ioaddr, lp->hacr);
2170 mmc_out(ioaddr, mmwoff(0, mmw_quality_thr),
2171 psa.psa_quality_thr);
2172
2173 /* Enable interrupts and restore flags. */
2174 spin_unlock_irqrestore(&lp->spinlock, flags);
2175
2176 return 0;
2177}
2178
2179/*------------------------------------------------------------------*/
2180/*
2181 * Wireless Private Handler : get quality threshold
2182 */
2183static int wavelan_get_qthr(struct net_device *dev,
2184 struct iw_request_info *info,
2185 union iwreq_data *wrqu,
2186 char *extra)
2187{
2188 unsigned long ioaddr = dev->base_addr;
2189 net_local *lp = netdev_priv(dev); /* lp is not unused */
2190 psa_t psa;
2191 unsigned long flags;
2192
2193 /* Disable interrupts and save flags. */
2194 spin_lock_irqsave(&lp->spinlock, flags);
2195
2196 psa_read(ioaddr, lp->hacr,
2197 (char *) &psa.psa_quality_thr - (char *) &psa,
2198 (unsigned char *) &psa.psa_quality_thr, 1);
2199 *(extra) = psa.psa_quality_thr & 0x0F;
2200
2201 /* Enable interrupts and restore flags. */
2202 spin_unlock_irqrestore(&lp->spinlock, flags);
2203
2204 return 0;
2205}
2206
2207#ifdef HISTOGRAM
2208/*------------------------------------------------------------------*/
2209/*
2210 * Wireless Private Handler : set histogram
2211 */
2212static int wavelan_set_histo(struct net_device *dev,
2213 struct iw_request_info *info,
2214 union iwreq_data *wrqu,
2215 char *extra)
2216{
2217 net_local *lp = netdev_priv(dev); /* lp is not unused */
2218
2219 /* Check the number of intervals. */
2220 if (wrqu->data.length > 16) {
2221 return(-E2BIG);
2222 }
2223
2224 /* Disable histo while we copy the addresses.
2225 * As we don't disable interrupts, we need to do this */
2226 lp->his_number = 0;
2227
2228 /* Are there ranges to copy? */
2229 if (wrqu->data.length > 0) {
2230 /* Copy interval ranges to the driver */
2231 memcpy(lp->his_range, extra, wrqu->data.length);
2232
2233 {
2234 int i;
2235 printk(KERN_DEBUG "Histo :");
2236 for(i = 0; i < wrqu->data.length; i++)
2237 printk(" %d", lp->his_range[i]);
2238 printk("\n");
2239 }
2240
2241 /* Reset result structure. */
2242 memset(lp->his_sum, 0x00, sizeof(long) * 16);
2243 }
2244
2245 /* Now we can set the number of ranges */
2246 lp->his_number = wrqu->data.length;
2247
2248 return(0);
2249}
2250
2251/*------------------------------------------------------------------*/
2252/*
2253 * Wireless Private Handler : get histogram
2254 */
2255static int wavelan_get_histo(struct net_device *dev,
2256 struct iw_request_info *info,
2257 union iwreq_data *wrqu,
2258 char *extra)
2259{
2260 net_local *lp = netdev_priv(dev); /* lp is not unused */
2261
2262 /* Set the number of intervals. */
2263 wrqu->data.length = lp->his_number;
2264
2265 /* Give back the distribution statistics */
2266 if(lp->his_number > 0)
2267 memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
2268
2269 return(0);
2270}
2271#endif /* HISTOGRAM */
2272
2273/*------------------------------------------------------------------*/
2274/*
2275 * Structures to export the Wireless Handlers
2276 */
2277
2278static const iw_handler wavelan_handler[] =
2279{
2280 NULL, /* SIOCSIWNAME */
2281 wavelan_get_name, /* SIOCGIWNAME */
2282 wavelan_set_nwid, /* SIOCSIWNWID */
2283 wavelan_get_nwid, /* SIOCGIWNWID */
2284 wavelan_set_freq, /* SIOCSIWFREQ */
2285 wavelan_get_freq, /* SIOCGIWFREQ */
2286 NULL, /* SIOCSIWMODE */
2287 NULL, /* SIOCGIWMODE */
2288 wavelan_set_sens, /* SIOCSIWSENS */
2289 wavelan_get_sens, /* SIOCGIWSENS */
2290 NULL, /* SIOCSIWRANGE */
2291 wavelan_get_range, /* SIOCGIWRANGE */
2292 NULL, /* SIOCSIWPRIV */
2293 NULL, /* SIOCGIWPRIV */
2294 NULL, /* SIOCSIWSTATS */
2295 NULL, /* SIOCGIWSTATS */
2296 iw_handler_set_spy, /* SIOCSIWSPY */
2297 iw_handler_get_spy, /* SIOCGIWSPY */
2298 iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
2299 iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
2300 NULL, /* SIOCSIWAP */
2301 NULL, /* SIOCGIWAP */
2302 NULL, /* -- hole -- */
2303 NULL, /* SIOCGIWAPLIST */
2304 NULL, /* -- hole -- */
2305 NULL, /* -- hole -- */
2306 NULL, /* SIOCSIWESSID */
2307 NULL, /* SIOCGIWESSID */
2308 NULL, /* SIOCSIWNICKN */
2309 NULL, /* SIOCGIWNICKN */
2310 NULL, /* -- hole -- */
2311 NULL, /* -- hole -- */
2312 NULL, /* SIOCSIWRATE */
2313 NULL, /* SIOCGIWRATE */
2314 NULL, /* SIOCSIWRTS */
2315 NULL, /* SIOCGIWRTS */
2316 NULL, /* SIOCSIWFRAG */
2317 NULL, /* SIOCGIWFRAG */
2318 NULL, /* SIOCSIWTXPOW */
2319 NULL, /* SIOCGIWTXPOW */
2320 NULL, /* SIOCSIWRETRY */
2321 NULL, /* SIOCGIWRETRY */
2322 /* Bummer ! Why those are only at the end ??? */
2323 wavelan_set_encode, /* SIOCSIWENCODE */
2324 wavelan_get_encode, /* SIOCGIWENCODE */
2325};
2326
2327static const iw_handler wavelan_private_handler[] =
2328{
2329 wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
2330 wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
2331#ifdef HISTOGRAM
2332 wavelan_set_histo, /* SIOCIWFIRSTPRIV + 2 */
2333 wavelan_get_histo, /* SIOCIWFIRSTPRIV + 3 */
2334#endif /* HISTOGRAM */
2335};
2336
2337static const struct iw_priv_args wavelan_private_args[] = {
2338/*{ cmd, set_args, get_args, name } */
2339 { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
2340 { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
2341 { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
2342 { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
2343};
2344
2345static const struct iw_handler_def wavelan_handler_def =
2346{
2347 .num_standard = ARRAY_SIZE(wavelan_handler),
2348 .num_private = ARRAY_SIZE(wavelan_private_handler),
2349 .num_private_args = ARRAY_SIZE(wavelan_private_args),
2350 .standard = wavelan_handler,
2351 .private = wavelan_private_handler,
2352 .private_args = wavelan_private_args,
2353 .get_wireless_stats = wavelan_get_wireless_stats,
2354};
2355
2356/*------------------------------------------------------------------*/
2357/*
2358 * Get wireless statistics.
2359 * Called by /proc/net/wireless
2360 */
2361static iw_stats *wavelan_get_wireless_stats(struct net_device * dev)
2362{
2363 unsigned long ioaddr = dev->base_addr;
2364 net_local *lp = netdev_priv(dev);
2365 mmr_t m;
2366 iw_stats *wstats;
2367 unsigned long flags;
2368
2369#ifdef DEBUG_IOCTL_TRACE
2370 printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n",
2371 dev->name);
2372#endif
2373
2374 /* Check */
2375 if (lp == (net_local *) NULL)
2376 return (iw_stats *) NULL;
2377
2378 /* Disable interrupts and save flags. */
2379 spin_lock_irqsave(&lp->spinlock, flags);
2380
2381 wstats = &lp->wstats;
2382
2383 /* Get data from the mmc. */
2384 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
2385
2386 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
2387 mmc_read(ioaddr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l,
2388 2);
2389 mmc_read(ioaddr, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set,
2390 4);
2391
2392 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
2393
2394 /* Copy data to wireless stuff. */
2395 wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
2396 wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
2397 wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
2398 wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
2399 wstats->qual.updated = (((m. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7)
2400 | ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6)
2401 | ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
2402 wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2403 wstats->discard.code = 0L;
2404 wstats->discard.misc = 0L;
2405
2406 /* Enable interrupts and restore flags. */
2407 spin_unlock_irqrestore(&lp->spinlock, flags);
2408
2409#ifdef DEBUG_IOCTL_TRACE
2410 printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n",
2411 dev->name);
2412#endif
2413 return &lp->wstats;
2414}
2415
2416/************************* PACKET RECEPTION *************************/
2417/*
2418 * This part deals with receiving the packets.
2419 * The interrupt handler gets an interrupt when a packet has been
2420 * successfully received and calls this part.
2421 */
2422
2423/*------------------------------------------------------------------*/
2424/*
2425 * This routine does the actual copying of data (including the Ethernet
2426 * header structure) from the WaveLAN card to an sk_buff chain that
2427 * will be passed up to the network interface layer. NOTE: we
2428 * currently don't handle trailer protocols (neither does the rest of
2429 * the network interface), so if that is needed, it will (at least in
2430 * part) be added here. The contents of the receive ring buffer are
2431 * copied to a message chain that is then passed to the kernel.
2432 *
2433 * Note: if any errors occur, the packet is "dropped on the floor".
2434 * (called by wv_packet_rcv())
2435 */
2436static void
2437wv_packet_read(struct net_device * dev, u16 buf_off, int sksize)
2438{
2439 net_local *lp = netdev_priv(dev);
2440 unsigned long ioaddr = dev->base_addr;
2441 struct sk_buff *skb;
2442
2443#ifdef DEBUG_RX_TRACE
2444 printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
2445 dev->name, buf_off, sksize);
2446#endif
2447
2448 /* Allocate buffer for the data */
2449 if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *) NULL) {
2450#ifdef DEBUG_RX_ERROR
2451 printk(KERN_INFO
2452 "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC).\n",
2453 dev->name, sksize);
2454#endif
2455 dev->stats.rx_dropped++;
2456 return;
2457 }
2458
2459 /* Copy the packet to the buffer. */
2460 obram_read(ioaddr, buf_off, skb_put(skb, sksize), sksize);
2461 skb->protocol = eth_type_trans(skb, dev);
2462
2463#ifdef DEBUG_RX_INFO
2464 wv_packet_info(skb_mac_header(skb), sksize, dev->name,
2465 "wv_packet_read");
2466#endif /* DEBUG_RX_INFO */
2467
2468 /* Statistics-gathering and associated stuff.
2469 * It seem a bit messy with all the define, but it's really
2470 * simple... */
2471 if (
2472#ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
2473 (lp->spy_data.spy_number > 0) ||
2474#endif /* IW_WIRELESS_SPY */
2475#ifdef HISTOGRAM
2476 (lp->his_number > 0) ||
2477#endif /* HISTOGRAM */
2478 0) {
2479 u8 stats[3]; /* signal level, noise level, signal quality */
2480
2481 /* Read signal level, silence level and signal quality bytes */
2482 /* Note: in the PCMCIA hardware, these are part of the frame.
2483 * It seems that for the ISA hardware, it's nowhere to be
2484 * found in the frame, so I'm obliged to do this (it has a
2485 * side effect on /proc/net/wireless).
2486 * Any ideas?
2487 */
2488 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
2489 mmc_read(ioaddr, mmroff(0, mmr_signal_lvl), stats, 3);
2490 mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
2491
2492#ifdef DEBUG_RX_INFO
2493 printk(KERN_DEBUG
2494 "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
2495 dev->name, stats[0] & 0x3F, stats[1] & 0x3F,
2496 stats[2] & 0x0F);
2497#endif
2498
2499 /* Spying stuff */
2500#ifdef IW_WIRELESS_SPY
2501 wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE,
2502 stats);
2503#endif /* IW_WIRELESS_SPY */
2504#ifdef HISTOGRAM
2505 wl_his_gather(dev, stats);
2506#endif /* HISTOGRAM */
2507 }
2508
2509 /*
2510 * Hand the packet to the network module.
2511 */
2512 netif_rx(skb);
2513
2514 /* Keep statistics up to date */
2515 dev->stats.rx_packets++;
2516 dev->stats.rx_bytes += sksize;
2517
2518#ifdef DEBUG_RX_TRACE
2519 printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
2520#endif
2521}
2522
2523/*------------------------------------------------------------------*/
2524/*
2525 * Transfer as many packets as we can
2526 * from the device RAM.
2527 * (called in wavelan_interrupt()).
2528 * Note : the spinlock is already grabbed for us.
2529 */
2530static void wv_receive(struct net_device * dev)
2531{
2532 unsigned long ioaddr = dev->base_addr;
2533 net_local *lp = netdev_priv(dev);
2534 fd_t fd;
2535 rbd_t rbd;
2536 int nreaped = 0;
2537
2538#ifdef DEBUG_RX_TRACE
2539 printk(KERN_DEBUG "%s: ->wv_receive()\n", dev->name);
2540#endif
2541
2542 /* Loop on each received packet. */
2543 for (;;) {
2544 obram_read(ioaddr, lp->rx_head, (unsigned char *) &fd,
2545 sizeof(fd));
2546
2547 /* Note about the status :
2548 * It start up to be 0 (the value we set). Then, when the RU
2549 * grab the buffer to prepare for reception, it sets the
2550 * FD_STATUS_B flag. When the RU has finished receiving the
2551 * frame, it clears FD_STATUS_B, set FD_STATUS_C to indicate
2552 * completion and set the other flags to indicate the eventual
2553 * errors. FD_STATUS_OK indicates that the reception was OK.
2554 */
2555
2556 /* If the current frame is not complete, we have reached the end. */
2557 if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
2558 break; /* This is how we exit the loop. */
2559
2560 nreaped++;
2561
2562 /* Check whether frame was correctly received. */
2563 if ((fd.fd_status & FD_STATUS_OK) == FD_STATUS_OK) {
2564 /* Does the frame contain a pointer to the data? Let's check. */
2565 if (fd.fd_rbd_offset != I82586NULL) {
2566 /* Read the receive buffer descriptor */
2567 obram_read(ioaddr, fd.fd_rbd_offset,
2568 (unsigned char *) &rbd,
2569 sizeof(rbd));
2570
2571#ifdef DEBUG_RX_ERROR
2572 if ((rbd.rbd_status & RBD_STATUS_EOF) !=
2573 RBD_STATUS_EOF) printk(KERN_INFO
2574 "%s: wv_receive(): missing EOF flag.\n",
2575 dev->name);
2576
2577 if ((rbd.rbd_status & RBD_STATUS_F) !=
2578 RBD_STATUS_F) printk(KERN_INFO
2579 "%s: wv_receive(): missing F flag.\n",
2580 dev->name);
2581#endif /* DEBUG_RX_ERROR */
2582
2583 /* Read the packet and transmit to Linux */
2584 wv_packet_read(dev, rbd.rbd_bufl,
2585 rbd.
2586 rbd_status &
2587 RBD_STATUS_ACNT);
2588 }
2589#ifdef DEBUG_RX_ERROR
2590 else /* if frame has no data */
2591 printk(KERN_INFO
2592 "%s: wv_receive(): frame has no data.\n",
2593 dev->name);
2594#endif
2595 } else { /* If reception was no successful */
2596
2597 dev->stats.rx_errors++;
2598
2599#ifdef DEBUG_RX_INFO
2600 printk(KERN_DEBUG
2601 "%s: wv_receive(): frame not received successfully (%X).\n",
2602 dev->name, fd.fd_status);
2603#endif
2604
2605#ifdef DEBUG_RX_ERROR
2606 if ((fd.fd_status & FD_STATUS_S6) != 0)
2607 printk(KERN_INFO
2608 "%s: wv_receive(): no EOF flag.\n",
2609 dev->name);
2610#endif
2611
2612 if ((fd.fd_status & FD_STATUS_S7) != 0) {
2613 dev->stats.rx_length_errors++;
2614#ifdef DEBUG_RX_FAIL
2615 printk(KERN_DEBUG
2616 "%s: wv_receive(): frame too short.\n",
2617 dev->name);
2618#endif
2619 }
2620
2621 if ((fd.fd_status & FD_STATUS_S8) != 0) {
2622 dev->stats.rx_over_errors++;
2623#ifdef DEBUG_RX_FAIL
2624 printk(KERN_DEBUG
2625 "%s: wv_receive(): rx DMA overrun.\n",
2626 dev->name);
2627#endif
2628 }
2629
2630 if ((fd.fd_status & FD_STATUS_S9) != 0) {
2631 dev->stats.rx_fifo_errors++;
2632#ifdef DEBUG_RX_FAIL
2633 printk(KERN_DEBUG
2634 "%s: wv_receive(): ran out of resources.\n",
2635 dev->name);
2636#endif
2637 }
2638
2639 if ((fd.fd_status & FD_STATUS_S10) != 0) {
2640 dev->stats.rx_frame_errors++;
2641#ifdef DEBUG_RX_FAIL
2642 printk(KERN_DEBUG
2643 "%s: wv_receive(): alignment error.\n",
2644 dev->name);
2645#endif
2646 }
2647
2648 if ((fd.fd_status & FD_STATUS_S11) != 0) {
2649 dev->stats.rx_crc_errors++;
2650#ifdef DEBUG_RX_FAIL
2651 printk(KERN_DEBUG
2652 "%s: wv_receive(): CRC error.\n",
2653 dev->name);
2654#endif
2655 }
2656 }
2657
2658 fd.fd_status = 0;
2659 obram_write(ioaddr, fdoff(lp->rx_head, fd_status),
2660 (unsigned char *) &fd.fd_status,
2661 sizeof(fd.fd_status));
2662
2663 fd.fd_command = FD_COMMAND_EL;
2664 obram_write(ioaddr, fdoff(lp->rx_head, fd_command),
2665 (unsigned char *) &fd.fd_command,
2666 sizeof(fd.fd_command));
2667
2668 fd.fd_command = 0;
2669 obram_write(ioaddr, fdoff(lp->rx_last, fd_command),
2670 (unsigned char *) &fd.fd_command,
2671 sizeof(fd.fd_command));
2672
2673 lp->rx_last = lp->rx_head;
2674 lp->rx_head = fd.fd_link_offset;
2675 } /* for(;;) -> loop on all frames */
2676
2677#ifdef DEBUG_RX_INFO
2678 if (nreaped > 1)
2679 printk(KERN_DEBUG "%s: wv_receive(): reaped %d\n",
2680 dev->name, nreaped);
2681#endif
2682#ifdef DEBUG_RX_TRACE
2683 printk(KERN_DEBUG "%s: <-wv_receive()\n", dev->name);
2684#endif
2685}
2686
2687/*********************** PACKET TRANSMISSION ***********************/
2688/*
2689 * This part deals with sending packets through the WaveLAN.
2690 *
2691 */
2692
2693/*------------------------------------------------------------------*/
2694/*
2695 * This routine fills in the appropriate registers and memory
2696 * locations on the WaveLAN card and starts the card off on
2697 * the transmit.
2698 *
2699 * The principle:
2700 * Each block contains a transmit command, a NOP command,
2701 * a transmit block descriptor and a buffer.
2702 * The CU read the transmit block which point to the tbd,
2703 * read the tbd and the content of the buffer.
2704 * When it has finish with it, it goes to the next command
2705 * which in our case is the NOP. The NOP points on itself,
2706 * so the CU stop here.
2707 * When we add the next block, we modify the previous nop
2708 * to make it point on the new tx command.
2709 * Simple, isn't it ?
2710 *
2711 * (called in wavelan_packet_xmit())
2712 */
2713static int wv_packet_write(struct net_device * dev, void *buf, short length)
2714{
2715 net_local *lp = netdev_priv(dev);
2716 unsigned long ioaddr = dev->base_addr;
2717 unsigned short txblock;
2718 unsigned short txpred;
2719 unsigned short tx_addr;
2720 unsigned short nop_addr;
2721 unsigned short tbd_addr;
2722 unsigned short buf_addr;
2723 ac_tx_t tx;
2724 ac_nop_t nop;
2725 tbd_t tbd;
2726 int clen = length;
2727 unsigned long flags;
2728
2729#ifdef DEBUG_TX_TRACE
2730 printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name,
2731 length);
2732#endif
2733
2734 spin_lock_irqsave(&lp->spinlock, flags);
2735
2736 /* Check nothing bad has happened */
2737 if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
2738#ifdef DEBUG_TX_ERROR
2739 printk(KERN_INFO "%s: wv_packet_write(): Tx queue full.\n",
2740 dev->name);
2741#endif
2742 spin_unlock_irqrestore(&lp->spinlock, flags);
2743 return 1;
2744 }
2745
2746 /* Calculate addresses of next block and previous block. */
2747 txblock = lp->tx_first_free;
2748 txpred = txblock - TXBLOCKZ;
2749 if (txpred < OFFSET_CU)
2750 txpred += NTXBLOCKS * TXBLOCKZ;
2751 lp->tx_first_free += TXBLOCKZ;
2752 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
2753 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
2754
2755 lp->tx_n_in_use++;
2756
2757 /* Calculate addresses of the different parts of the block. */
2758 tx_addr = txblock;
2759 nop_addr = tx_addr + sizeof(tx);
2760 tbd_addr = nop_addr + sizeof(nop);
2761 buf_addr = tbd_addr + sizeof(tbd);
2762
2763 /*
2764 * Transmit command
2765 */
2766 tx.tx_h.ac_status = 0;
2767 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
2768 (unsigned char *) &tx.tx_h.ac_status,
2769 sizeof(tx.tx_h.ac_status));
2770
2771 /*
2772 * NOP command
2773 */
2774 nop.nop_h.ac_status = 0;
2775 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
2776 (unsigned char *) &nop.nop_h.ac_status,
2777 sizeof(nop.nop_h.ac_status));
2778 nop.nop_h.ac_link = nop_addr;
2779 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
2780 (unsigned char *) &nop.nop_h.ac_link,
2781 sizeof(nop.nop_h.ac_link));
2782
2783 /*
2784 * Transmit buffer descriptor
2785 */
2786 tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & clen);
2787 tbd.tbd_next_bd_offset = I82586NULL;
2788 tbd.tbd_bufl = buf_addr;
2789 tbd.tbd_bufh = 0;
2790 obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, sizeof(tbd));
2791
2792 /*
2793 * Data
2794 */
2795 obram_write(ioaddr, buf_addr, buf, length);
2796
2797 /*
2798 * Overwrite the predecessor NOP link
2799 * so that it points to this txblock.
2800 */
2801 nop_addr = txpred + sizeof(tx);
2802 nop.nop_h.ac_status = 0;
2803 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
2804 (unsigned char *) &nop.nop_h.ac_status,
2805 sizeof(nop.nop_h.ac_status));
2806 nop.nop_h.ac_link = txblock;
2807 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
2808 (unsigned char *) &nop.nop_h.ac_link,
2809 sizeof(nop.nop_h.ac_link));
2810
2811 /* Make sure the watchdog will keep quiet for a while */
2812 dev->trans_start = jiffies;
2813
2814 /* Keep stats up to date. */
2815 dev->stats.tx_bytes += length;
2816
2817 if (lp->tx_first_in_use == I82586NULL)
2818 lp->tx_first_in_use = txblock;
2819
2820 if (lp->tx_n_in_use < NTXBLOCKS - 1)
2821 netif_wake_queue(dev);
2822
2823 spin_unlock_irqrestore(&lp->spinlock, flags);
2824
2825#ifdef DEBUG_TX_INFO
2826 wv_packet_info((u8 *) buf, length, dev->name,
2827 "wv_packet_write");
2828#endif /* DEBUG_TX_INFO */
2829
2830#ifdef DEBUG_TX_TRACE
2831 printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
2832#endif
2833
2834 return 0;
2835}
2836
2837/*------------------------------------------------------------------*/
2838/*
2839 * This routine is called when we want to send a packet (NET3 callback)
2840 * In this routine, we check if the harware is ready to accept
2841 * the packet. We also prevent reentrance. Then we call the function
2842 * to send the packet.
2843 */
2844static netdev_tx_t wavelan_packet_xmit(struct sk_buff *skb,
2845 struct net_device * dev)
2846{
2847 net_local *lp = netdev_priv(dev);
2848 unsigned long flags;
2849 char data[ETH_ZLEN];
2850
2851#ifdef DEBUG_TX_TRACE
2852 printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
2853 (unsigned) skb);
2854#endif
2855
2856 /*
2857 * Block a timer-based transmit from overlapping.
2858 * In other words, prevent reentering this routine.
2859 */
2860 netif_stop_queue(dev);
2861
2862 /* If somebody has asked to reconfigure the controller,
2863 * we can do it now.
2864 */
2865 if (lp->reconfig_82586) {
2866 spin_lock_irqsave(&lp->spinlock, flags);
2867 wv_82586_config(dev);
2868 spin_unlock_irqrestore(&lp->spinlock, flags);
2869 /* Check that we can continue */
2870 if (lp->tx_n_in_use == (NTXBLOCKS - 1))
2871 return NETDEV_TX_BUSY;
2872 }
2873
2874 /* Do we need some padding? */
2875 /* Note : on wireless the propagation time is in the order of 1us,
2876 * and we don't have the Ethernet specific requirement of beeing
2877 * able to detect collisions, therefore in theory we don't really
2878 * need to pad. Jean II */
2879 if (skb->len < ETH_ZLEN) {
2880 memset(data, 0, ETH_ZLEN);
2881 skb_copy_from_linear_data(skb, data, skb->len);
2882 /* Write packet on the card */
2883 if(wv_packet_write(dev, data, ETH_ZLEN))
2884 return NETDEV_TX_BUSY; /* We failed */
2885 }
2886 else if(wv_packet_write(dev, skb->data, skb->len))
2887 return NETDEV_TX_BUSY; /* We failed */
2888
2889
2890 dev_kfree_skb(skb);
2891
2892#ifdef DEBUG_TX_TRACE
2893 printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
2894#endif
2895 return NETDEV_TX_OK;
2896}
2897
2898/*********************** HARDWARE CONFIGURATION ***********************/
2899/*
2900 * This part does the real job of starting and configuring the hardware.
2901 */
2902
2903/*--------------------------------------------------------------------*/
2904/*
2905 * Routine to initialize the Modem Management Controller.
2906 * (called by wv_hw_reset())
2907 */
2908static int wv_mmc_init(struct net_device * dev)
2909{
2910 unsigned long ioaddr = dev->base_addr;
2911 net_local *lp = netdev_priv(dev);
2912 psa_t psa;
2913 mmw_t m;
2914 int configured;
2915
2916#ifdef DEBUG_CONFIG_TRACE
2917 printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
2918#endif
2919
2920 /* Read the parameter storage area. */
2921 psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
2922
2923#ifdef USE_PSA_CONFIG
2924 configured = psa.psa_conf_status & 1;
2925#else
2926 configured = 0;
2927#endif
2928
2929 /* Is the PSA is not configured */
2930 if (!configured) {
2931 /* User will be able to configure NWID later (with iwconfig). */
2932 psa.psa_nwid[0] = 0;
2933 psa.psa_nwid[1] = 0;
2934
2935 /* no NWID checking since NWID is not set */
2936 psa.psa_nwid_select = 0;
2937
2938 /* Disable encryption */
2939 psa.psa_encryption_select = 0;
2940
2941 /* Set to standard values:
2942 * 0x04 for AT,
2943 * 0x01 for MCA,
2944 * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
2945 */
2946 if (psa.psa_comp_number & 1)
2947 psa.psa_thr_pre_set = 0x01;
2948 else
2949 psa.psa_thr_pre_set = 0x04;
2950 psa.psa_quality_thr = 0x03;
2951
2952 /* It is configured */
2953 psa.psa_conf_status |= 1;
2954
2955#ifdef USE_PSA_CONFIG
2956 /* Write the psa. */
2957 psa_write(ioaddr, lp->hacr,
2958 (char *) psa.psa_nwid - (char *) &psa,
2959 (unsigned char *) psa.psa_nwid, 4);
2960 psa_write(ioaddr, lp->hacr,
2961 (char *) &psa.psa_thr_pre_set - (char *) &psa,
2962 (unsigned char *) &psa.psa_thr_pre_set, 1);
2963 psa_write(ioaddr, lp->hacr,
2964 (char *) &psa.psa_quality_thr - (char *) &psa,
2965 (unsigned char *) &psa.psa_quality_thr, 1);
2966 psa_write(ioaddr, lp->hacr,
2967 (char *) &psa.psa_conf_status - (char *) &psa,
2968 (unsigned char *) &psa.psa_conf_status, 1);
2969 /* update the Wavelan checksum */
2970 update_psa_checksum(dev, ioaddr, lp->hacr);
2971#endif
2972 }
2973
2974 /* Zero the mmc structure. */
2975 memset(&m, 0x00, sizeof(m));
2976
2977 /* Copy PSA info to the mmc. */
2978 m.mmw_netw_id_l = psa.psa_nwid[1];
2979 m.mmw_netw_id_h = psa.psa_nwid[0];
2980
2981 if (psa.psa_nwid_select & 1)
2982 m.mmw_loopt_sel = 0x00;
2983 else
2984 m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
2985
2986 memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
2987 sizeof(m.mmw_encr_key));
2988
2989 if (psa.psa_encryption_select)
2990 m.mmw_encr_enable =
2991 MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
2992 else
2993 m.mmw_encr_enable = 0;
2994
2995 m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
2996 m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
2997
2998 /*
2999 * Set default modem control parameters.
3000 * See NCR document 407-0024326 Rev. A.
3001 */
3002 m.mmw_jabber_enable = 0x01;
3003 m.mmw_freeze = 0;
3004 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
3005 m.mmw_ifs = 0x20;
3006 m.mmw_mod_delay = 0x04;
3007 m.mmw_jam_time = 0x38;
3008
3009 m.mmw_des_io_invert = 0;
3010 m.mmw_decay_prm = 0;
3011 m.mmw_decay_updat_prm = 0;
3012
3013 /* Write all info to MMC. */
3014 mmc_write(ioaddr, 0, (u8 *) & m, sizeof(m));
3015
3016 /* The following code starts the modem of the 2.00 frequency
3017 * selectable cards at power on. It's not strictly needed for the
3018 * following boots.
3019 * The original patch was by Joe Finney for the PCMCIA driver, but
3020 * I've cleaned it up a bit and added documentation.
3021 * Thanks to Loeke Brederveld from Lucent for the info.
3022 */
3023
3024 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
3025 * Does it work for everybody, especially old cards? */
3026 /* Note: WFREQSEL verifies that it is able to read a sensible
3027 * frequency from EEPROM (address 0x00) and that MMR_FEE_STATUS_ID
3028 * is 0xA (Xilinx version) or 0xB (Ariadne version).
3029 * My test is more crude but does work. */
3030 if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
3031 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
3032 /* We must download the frequency parameters to the
3033 * synthesizers (from the EEPROM - area 1)
3034 * Note: as the EEPROM is automatically decremented, we set the end
3035 * if the area... */
3036 m.mmw_fee_addr = 0x0F;
3037 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3038 mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
3039 (unsigned char *) &m.mmw_fee_ctrl, 2);
3040
3041 /* Wait until the download is finished. */
3042 fee_wait(ioaddr, 100, 100);
3043
3044#ifdef DEBUG_CONFIG_INFO
3045 /* The frequency was in the last word downloaded. */
3046 mmc_read(ioaddr, (char *) &m.mmw_fee_data_l - (char *) &m,
3047 (unsigned char *) &m.mmw_fee_data_l, 2);
3048
3049 /* Print some info for the user. */
3050 printk(KERN_DEBUG
3051 "%s: WaveLAN 2.00 recognised (frequency select). Current frequency = %ld\n",
3052 dev->name,
3053 ((m.
3054 mmw_fee_data_h << 4) | (m.mmw_fee_data_l >> 4)) *
3055 5 / 2 + 24000L);
3056#endif
3057
3058 /* We must now download the power adjust value (gain) to
3059 * the synthesizers (from the EEPROM - area 7 - DAC). */
3060 m.mmw_fee_addr = 0x61;
3061 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3062 mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
3063 (unsigned char *) &m.mmw_fee_ctrl, 2);
3064
3065 /* Wait until the download is finished. */
3066 }
3067 /* if 2.00 card */
3068#ifdef DEBUG_CONFIG_TRACE
3069 printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
3070#endif
3071 return 0;
3072}
3073
3074/*------------------------------------------------------------------*/
3075/*
3076 * Construct the fd and rbd structures.
3077 * Start the receive unit.
3078 * (called by wv_hw_reset())
3079 */
3080static int wv_ru_start(struct net_device * dev)
3081{
3082 net_local *lp = netdev_priv(dev);
3083 unsigned long ioaddr = dev->base_addr;
3084 u16 scb_cs;
3085 fd_t fd;
3086 rbd_t rbd;
3087 u16 rx;
3088 u16 rx_next;
3089 int i;
3090
3091#ifdef DEBUG_CONFIG_TRACE
3092 printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
3093#endif
3094
3095 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
3096 (unsigned char *) &scb_cs, sizeof(scb_cs));
3097 if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
3098 return 0;
3099
3100 lp->rx_head = OFFSET_RU;
3101
3102 for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next) {
3103 rx_next =
3104 (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
3105
3106 fd.fd_status = 0;
3107 fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
3108 fd.fd_link_offset = rx_next;
3109 fd.fd_rbd_offset = rx + sizeof(fd);
3110 obram_write(ioaddr, rx, (unsigned char *) &fd, sizeof(fd));
3111
3112 rbd.rbd_status = 0;
3113 rbd.rbd_next_rbd_offset = I82586NULL;
3114 rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
3115 rbd.rbd_bufh = 0;
3116 rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
3117 obram_write(ioaddr, rx + sizeof(fd),
3118 (unsigned char *) &rbd, sizeof(rbd));
3119
3120 lp->rx_last = rx;
3121 }
3122
3123 obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset),
3124 (unsigned char *) &lp->rx_head, sizeof(lp->rx_head));
3125
3126 scb_cs = SCB_CMD_RUC_GO;
3127 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3128 (unsigned char *) &scb_cs, sizeof(scb_cs));
3129
3130 set_chan_attn(ioaddr, lp->hacr);
3131
3132 for (i = 1000; i > 0; i--) {
3133 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
3134 (unsigned char *) &scb_cs, sizeof(scb_cs));
3135 if (scb_cs == 0)
3136 break;
3137
3138 udelay(10);
3139 }
3140
3141 if (i <= 0) {
3142#ifdef DEBUG_CONFIG_ERROR
3143 printk(KERN_INFO
3144 "%s: wavelan_ru_start(): board not accepting command.\n",
3145 dev->name);
3146#endif
3147 return -1;
3148 }
3149#ifdef DEBUG_CONFIG_TRACE
3150 printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
3151#endif
3152 return 0;
3153}
3154
3155/*------------------------------------------------------------------*/
3156/*
3157 * Initialise the transmit blocks.
3158 * Start the command unit executing the NOP
3159 * self-loop of the first transmit block.
3160 *
3161 * Here we create the list of send buffers used to transmit packets
3162 * between the PC and the command unit. For each buffer, we create a
3163 * buffer descriptor (pointing on the buffer), a transmit command
3164 * (pointing to the buffer descriptor) and a NOP command.
3165 * The transmit command is linked to the NOP, and the NOP to itself.
3166 * When we will have finished executing the transmit command, we will
3167 * then loop on the NOP. By releasing the NOP link to a new command,
3168 * we may send another buffer.
3169 *
3170 * (called by wv_hw_reset())
3171 */
3172static int wv_cu_start(struct net_device * dev)
3173{
3174 net_local *lp = netdev_priv(dev);
3175 unsigned long ioaddr = dev->base_addr;
3176 int i;
3177 u16 txblock;
3178 u16 first_nop;
3179 u16 scb_cs;
3180
3181#ifdef DEBUG_CONFIG_TRACE
3182 printk(KERN_DEBUG "%s: ->wv_cu_start()\n", dev->name);
3183#endif
3184
3185 lp->tx_first_free = OFFSET_CU;
3186 lp->tx_first_in_use = I82586NULL;
3187
3188 for (i = 0, txblock = OFFSET_CU;
3189 i < NTXBLOCKS; i++, txblock += TXBLOCKZ) {
3190 ac_tx_t tx;
3191 ac_nop_t nop;
3192 tbd_t tbd;
3193 unsigned short tx_addr;
3194 unsigned short nop_addr;
3195 unsigned short tbd_addr;
3196 unsigned short buf_addr;
3197
3198 tx_addr = txblock;
3199 nop_addr = tx_addr + sizeof(tx);
3200 tbd_addr = nop_addr + sizeof(nop);
3201 buf_addr = tbd_addr + sizeof(tbd);
3202
3203 tx.tx_h.ac_status = 0;
3204 tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
3205 tx.tx_h.ac_link = nop_addr;
3206 tx.tx_tbd_offset = tbd_addr;
3207 obram_write(ioaddr, tx_addr, (unsigned char *) &tx,
3208 sizeof(tx));
3209
3210 nop.nop_h.ac_status = 0;
3211 nop.nop_h.ac_command = acmd_nop;
3212 nop.nop_h.ac_link = nop_addr;
3213 obram_write(ioaddr, nop_addr, (unsigned char *) &nop,
3214 sizeof(nop));
3215
3216 tbd.tbd_status = TBD_STATUS_EOF;
3217 tbd.tbd_next_bd_offset = I82586NULL;
3218 tbd.tbd_bufl = buf_addr;
3219 tbd.tbd_bufh = 0;
3220 obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd,
3221 sizeof(tbd));
3222 }
3223
3224 first_nop =
3225 OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
3226 obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset),
3227 (unsigned char *) &first_nop, sizeof(first_nop));
3228
3229 scb_cs = SCB_CMD_CUC_GO;
3230 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3231 (unsigned char *) &scb_cs, sizeof(scb_cs));
3232
3233 set_chan_attn(ioaddr, lp->hacr);
3234
3235 for (i = 1000; i > 0; i--) {
3236 obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
3237 (unsigned char *) &scb_cs, sizeof(scb_cs));
3238 if (scb_cs == 0)
3239 break;
3240
3241 udelay(10);
3242 }
3243
3244 if (i <= 0) {
3245#ifdef DEBUG_CONFIG_ERROR
3246 printk(KERN_INFO
3247 "%s: wavelan_cu_start(): board not accepting command.\n",
3248 dev->name);
3249#endif
3250 return -1;
3251 }
3252
3253 lp->tx_n_in_use = 0;
3254 netif_start_queue(dev);
3255#ifdef DEBUG_CONFIG_TRACE
3256 printk(KERN_DEBUG "%s: <-wv_cu_start()\n", dev->name);
3257#endif
3258 return 0;
3259}
3260
3261/*------------------------------------------------------------------*/
3262/*
3263 * This routine does a standard configuration of the WaveLAN
3264 * controller (i82586).
3265 *
3266 * It initialises the scp, iscp and scb structure
3267 * The first two are just pointers to the next.
3268 * The last one is used for basic configuration and for basic
3269 * communication (interrupt status).
3270 *
3271 * (called by wv_hw_reset())
3272 */
3273static int wv_82586_start(struct net_device * dev)
3274{
3275 net_local *lp = netdev_priv(dev);
3276 unsigned long ioaddr = dev->base_addr;
3277 scp_t scp; /* system configuration pointer */
3278 iscp_t iscp; /* intermediate scp */
3279 scb_t scb; /* system control block */
3280 ach_t cb; /* Action command header */
3281 u8 zeroes[512];
3282 int i;
3283
3284#ifdef DEBUG_CONFIG_TRACE
3285 printk(KERN_DEBUG "%s: ->wv_82586_start()\n", dev->name);
3286#endif
3287
3288 /*
3289 * Clear the onboard RAM.
3290 */
3291 memset(&zeroes[0], 0x00, sizeof(zeroes));
3292 for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
3293 obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
3294
3295 /*
3296 * Construct the command unit structures:
3297 * scp, iscp, scb, cb.
3298 */
3299 memset(&scp, 0x00, sizeof(scp));
3300 scp.scp_sysbus = SCP_SY_16BBUS;
3301 scp.scp_iscpl = OFFSET_ISCP;
3302 obram_write(ioaddr, OFFSET_SCP, (unsigned char *) &scp,
3303 sizeof(scp));
3304
3305 memset(&iscp, 0x00, sizeof(iscp));
3306 iscp.iscp_busy = 1;
3307 iscp.iscp_offset = OFFSET_SCB;
3308 obram_write(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
3309 sizeof(iscp));
3310
3311 /* Our first command is to reset the i82586. */
3312 memset(&scb, 0x00, sizeof(scb));
3313 scb.scb_command = SCB_CMD_RESET;
3314 scb.scb_cbl_offset = OFFSET_CU;
3315 scb.scb_rfa_offset = OFFSET_RU;
3316 obram_write(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
3317 sizeof(scb));
3318
3319 set_chan_attn(ioaddr, lp->hacr);
3320
3321 /* Wait for command to finish. */
3322 for (i = 1000; i > 0; i--) {
3323 obram_read(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
3324 sizeof(iscp));
3325
3326 if (iscp.iscp_busy == (unsigned short) 0)
3327 break;
3328
3329 udelay(10);
3330 }
3331
3332 if (i <= 0) {
3333#ifdef DEBUG_CONFIG_ERROR
3334 printk(KERN_INFO
3335 "%s: wv_82586_start(): iscp_busy timeout.\n",
3336 dev->name);
3337#endif
3338 return -1;
3339 }
3340
3341 /* Check command completion. */
3342 for (i = 15; i > 0; i--) {
3343 obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
3344 sizeof(scb));
3345
3346 if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
3347 break;
3348
3349 udelay(10);
3350 }
3351
3352 if (i <= 0) {
3353#ifdef DEBUG_CONFIG_ERROR
3354 printk(KERN_INFO
3355 "%s: wv_82586_start(): status: expected 0x%02x, got 0x%02x.\n",
3356 dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
3357#endif
3358 return -1;
3359 }
3360
3361 wv_ack(dev);
3362
3363 /* Set the action command header. */
3364 memset(&cb, 0x00, sizeof(cb));
3365 cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
3366 cb.ac_link = OFFSET_CU;
3367 obram_write(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
3368
3369 if (wv_synchronous_cmd(dev, "diag()") == -1)
3370 return -1;
3371
3372 obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
3373 if (cb.ac_status & AC_SFLD_FAIL) {
3374#ifdef DEBUG_CONFIG_ERROR
3375 printk(KERN_INFO
3376 "%s: wv_82586_start(): i82586 Self Test failed.\n",
3377 dev->name);
3378#endif
3379 return -1;
3380 }
3381#ifdef DEBUG_I82586_SHOW
3382 wv_scb_show(ioaddr);
3383#endif
3384
3385#ifdef DEBUG_CONFIG_TRACE
3386 printk(KERN_DEBUG "%s: <-wv_82586_start()\n", dev->name);
3387#endif
3388 return 0;
3389}
3390
3391/*------------------------------------------------------------------*/
3392/*
3393 * This routine does a standard configuration of the WaveLAN
3394 * controller (i82586).
3395 *
3396 * This routine is a violent hack. We use the first free transmit block
3397 * to make our configuration. In the buffer area, we create the three
3398 * configuration commands (linked). We make the previous NOP point to
3399 * the beginning of the buffer instead of the tx command. After, we go
3400 * as usual to the NOP command.
3401 * Note that only the last command (mc_set) will generate an interrupt.
3402 *
3403 * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit())
3404 */
3405static void wv_82586_config(struct net_device * dev)
3406{
3407 net_local *lp = netdev_priv(dev);
3408 unsigned long ioaddr = dev->base_addr;
3409 unsigned short txblock;
3410 unsigned short txpred;
3411 unsigned short tx_addr;
3412 unsigned short nop_addr;
3413 unsigned short tbd_addr;
3414 unsigned short cfg_addr;
3415 unsigned short ias_addr;
3416 unsigned short mcs_addr;
3417 ac_tx_t tx;
3418 ac_nop_t nop;
3419 ac_cfg_t cfg; /* Configure action */
3420 ac_ias_t ias; /* IA-setup action */
3421 ac_mcs_t mcs; /* Multicast setup */
3422 struct dev_mc_list *dmi;
3423
3424#ifdef DEBUG_CONFIG_TRACE
3425 printk(KERN_DEBUG "%s: ->wv_82586_config()\n", dev->name);
3426#endif
3427
3428 /* Check nothing bad has happened */
3429 if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
3430#ifdef DEBUG_CONFIG_ERROR
3431 printk(KERN_INFO "%s: wv_82586_config(): Tx queue full.\n",
3432 dev->name);
3433#endif
3434 return;
3435 }
3436
3437 /* Calculate addresses of next block and previous block. */
3438 txblock = lp->tx_first_free;
3439 txpred = txblock - TXBLOCKZ;
3440 if (txpred < OFFSET_CU)
3441 txpred += NTXBLOCKS * TXBLOCKZ;
3442 lp->tx_first_free += TXBLOCKZ;
3443 if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
3444 lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
3445
3446 lp->tx_n_in_use++;
3447
3448 /* Calculate addresses of the different parts of the block. */
3449 tx_addr = txblock;
3450 nop_addr = tx_addr + sizeof(tx);
3451 tbd_addr = nop_addr + sizeof(nop);
3452 cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */
3453 ias_addr = cfg_addr + sizeof(cfg);
3454 mcs_addr = ias_addr + sizeof(ias);
3455
3456 /*
3457 * Transmit command
3458 */
3459 tx.tx_h.ac_status = 0xFFFF; /* Fake completion value */
3460 obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
3461 (unsigned char *) &tx.tx_h.ac_status,
3462 sizeof(tx.tx_h.ac_status));
3463
3464 /*
3465 * NOP command
3466 */
3467 nop.nop_h.ac_status = 0;
3468 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
3469 (unsigned char *) &nop.nop_h.ac_status,
3470 sizeof(nop.nop_h.ac_status));
3471 nop.nop_h.ac_link = nop_addr;
3472 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
3473 (unsigned char *) &nop.nop_h.ac_link,
3474 sizeof(nop.nop_h.ac_link));
3475
3476 /* Create a configure action. */
3477 memset(&cfg, 0x00, sizeof(cfg));
3478
3479 /*
3480 * For Linux we invert AC_CFG_ALOC() so as to conform
3481 * to the way that net packets reach us from above.
3482 * (See also ac_tx_t.)
3483 *
3484 * Updated from Wavelan Manual WCIN085B
3485 */
3486 cfg.cfg_byte_cnt =
3487 AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
3488 cfg.cfg_fifolim = AC_CFG_FIFOLIM(4);
3489 cfg.cfg_byte8 = AC_CFG_SAV_BF(1) | AC_CFG_SRDY(0);
3490 cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
3491 AC_CFG_ILPBCK(0) |
3492 AC_CFG_PRELEN(AC_CFG_PLEN_2) |
3493 AC_CFG_ALOC(1) | AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
3494 cfg.cfg_byte10 = AC_CFG_BOFMET(1) |
3495 AC_CFG_ACR(6) | AC_CFG_LINPRIO(0);
3496 cfg.cfg_ifs = 0x20;
3497 cfg.cfg_slotl = 0x0C;
3498 cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) | AC_CFG_SLTTMHI(0);
3499 cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
3500 AC_CFG_BTSTF(0) |
3501 AC_CFG_CRC16(0) |
3502 AC_CFG_NCRC(0) |
3503 AC_CFG_TNCRS(1) |
3504 AC_CFG_MANCH(0) |
3505 AC_CFG_BCDIS(0) | AC_CFG_PRM(lp->promiscuous);
3506 cfg.cfg_byte15 = AC_CFG_ICDS(0) |
3507 AC_CFG_CDTF(0) | AC_CFG_ICSS(0) | AC_CFG_CSTF(0);
3508/*
3509 cfg.cfg_min_frm_len = AC_CFG_MNFRM(64);
3510*/
3511 cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
3512
3513 cfg.cfg_h.ac_command = (AC_CFLD_CMD & acmd_configure);
3514 cfg.cfg_h.ac_link = ias_addr;
3515 obram_write(ioaddr, cfg_addr, (unsigned char *) &cfg, sizeof(cfg));
3516
3517 /* Set up the MAC address */
3518 memset(&ias, 0x00, sizeof(ias));
3519 ias.ias_h.ac_command = (AC_CFLD_CMD & acmd_ia_setup);
3520 ias.ias_h.ac_link = mcs_addr;
3521 memcpy(&ias.ias_addr[0], (unsigned char *) &dev->dev_addr[0],
3522 sizeof(ias.ias_addr));
3523 obram_write(ioaddr, ias_addr, (unsigned char *) &ias, sizeof(ias));
3524
3525 /* Initialize adapter's Ethernet multicast addresses */
3526 memset(&mcs, 0x00, sizeof(mcs));
3527 mcs.mcs_h.ac_command = AC_CFLD_I | (AC_CFLD_CMD & acmd_mc_setup);
3528 mcs.mcs_h.ac_link = nop_addr;
3529 mcs.mcs_cnt = WAVELAN_ADDR_SIZE * lp->mc_count;
3530 obram_write(ioaddr, mcs_addr, (unsigned char *) &mcs, sizeof(mcs));
3531
3532 /* Any address to set? */
3533 if (lp->mc_count) {
3534 for (dmi = dev->mc_list; dmi; dmi = dmi->next)
3535 outsw(PIOP1(ioaddr), (u16 *) dmi->dmi_addr,
3536 WAVELAN_ADDR_SIZE >> 1);
3537
3538#ifdef DEBUG_CONFIG_INFO
3539 printk(KERN_DEBUG
3540 "%s: wv_82586_config(): set %d multicast addresses:\n",
3541 dev->name, lp->mc_count);
3542 for (dmi = dev->mc_list; dmi; dmi = dmi->next)
3543 printk(KERN_DEBUG " %pM\n", dmi->dmi_addr);
3544#endif
3545 }
3546
3547 /*
3548 * Overwrite the predecessor NOP link
3549 * so that it points to the configure action.
3550 */
3551 nop_addr = txpred + sizeof(tx);
3552 nop.nop_h.ac_status = 0;
3553 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
3554 (unsigned char *) &nop.nop_h.ac_status,
3555 sizeof(nop.nop_h.ac_status));
3556 nop.nop_h.ac_link = cfg_addr;
3557 obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
3558 (unsigned char *) &nop.nop_h.ac_link,
3559 sizeof(nop.nop_h.ac_link));
3560
3561 /* Job done, clear the flag */
3562 lp->reconfig_82586 = 0;
3563
3564 if (lp->tx_first_in_use == I82586NULL)
3565 lp->tx_first_in_use = txblock;
3566
3567 if (lp->tx_n_in_use == (NTXBLOCKS - 1))
3568 netif_stop_queue(dev);
3569
3570#ifdef DEBUG_CONFIG_TRACE
3571 printk(KERN_DEBUG "%s: <-wv_82586_config()\n", dev->name);
3572#endif
3573}
3574
3575/*------------------------------------------------------------------*/
3576/*
3577 * This routine, called by wavelan_close(), gracefully stops the
3578 * WaveLAN controller (i82586).
3579 * (called by wavelan_close())
3580 */
3581static void wv_82586_stop(struct net_device * dev)
3582{
3583 net_local *lp = netdev_priv(dev);
3584 unsigned long ioaddr = dev->base_addr;
3585 u16 scb_cmd;
3586
3587#ifdef DEBUG_CONFIG_TRACE
3588 printk(KERN_DEBUG "%s: ->wv_82586_stop()\n", dev->name);
3589#endif
3590
3591 /* Suspend both command unit and receive unit. */
3592 scb_cmd =
3593 (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC &
3594 SCB_CMD_RUC_SUS);
3595 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3596 (unsigned char *) &scb_cmd, sizeof(scb_cmd));
3597 set_chan_attn(ioaddr, lp->hacr);
3598
3599 /* No more interrupts */
3600 wv_ints_off(dev);
3601
3602#ifdef DEBUG_CONFIG_TRACE
3603 printk(KERN_DEBUG "%s: <-wv_82586_stop()\n", dev->name);
3604#endif
3605}
3606
3607/*------------------------------------------------------------------*/
3608/*
3609 * Totally reset the WaveLAN and restart it.
3610 * Performs the following actions:
3611 * 1. A power reset (reset DMA)
3612 * 2. Initialize the radio modem (using wv_mmc_init)
3613 * 3. Reset & Configure LAN controller (using wv_82586_start)
3614 * 4. Start the LAN controller's command unit
3615 * 5. Start the LAN controller's receive unit
3616 * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open())
3617 */
3618static int wv_hw_reset(struct net_device * dev)
3619{
3620 net_local *lp = netdev_priv(dev);
3621 unsigned long ioaddr = dev->base_addr;
3622
3623#ifdef DEBUG_CONFIG_TRACE
3624 printk(KERN_DEBUG "%s: ->wv_hw_reset(dev=0x%x)\n", dev->name,
3625 (unsigned int) dev);
3626#endif
3627
3628 /* Increase the number of resets done. */
3629 lp->nresets++;
3630
3631 wv_hacr_reset(ioaddr);
3632 lp->hacr = HACR_DEFAULT;
3633
3634 if ((wv_mmc_init(dev) < 0) || (wv_82586_start(dev) < 0))
3635 return -1;
3636
3637 /* Enable the card to send interrupts. */
3638 wv_ints_on(dev);
3639
3640 /* Start card functions */
3641 if (wv_cu_start(dev) < 0)
3642 return -1;
3643
3644 /* Setup the controller and parameters */
3645 wv_82586_config(dev);
3646
3647 /* Finish configuration with the receive unit */
3648 if (wv_ru_start(dev) < 0)
3649 return -1;
3650
3651#ifdef DEBUG_CONFIG_TRACE
3652 printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
3653#endif
3654 return 0;
3655}
3656
3657/*------------------------------------------------------------------*/
3658/*
3659 * Check if there is a WaveLAN at the specific base address.
3660 * As a side effect, this reads the MAC address.
3661 * (called in wavelan_probe() and init_module())
3662 */
3663static int wv_check_ioaddr(unsigned long ioaddr, u8 * mac)
3664{
3665 int i; /* Loop counter */
3666
3667 /* Check if the base address if available. */
3668 if (!request_region(ioaddr, sizeof(ha_t), "wavelan probe"))
3669 return -EBUSY; /* ioaddr already used */
3670
3671 /* Reset host interface */
3672 wv_hacr_reset(ioaddr);
3673
3674 /* Read the MAC address from the parameter storage area. */
3675 psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_univ_mac_addr),
3676 mac, 6);
3677
3678 release_region(ioaddr, sizeof(ha_t));
3679
3680 /*
3681 * Check the first three octets of the address for the manufacturer's code.
3682 * Note: if this can't find your WaveLAN card, you've got a
3683 * non-NCR/AT&T/Lucent ISA card. See wavelan.p.h for detail on
3684 * how to configure your card.
3685 */
3686 for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
3687 if ((mac[0] == MAC_ADDRESSES[i][0]) &&
3688 (mac[1] == MAC_ADDRESSES[i][1]) &&
3689 (mac[2] == MAC_ADDRESSES[i][2]))
3690 return 0;
3691
3692#ifdef DEBUG_CONFIG_INFO
3693 printk(KERN_WARNING
3694 "WaveLAN (0x%3X): your MAC address might be %02X:%02X:%02X.\n",
3695 ioaddr, mac[0], mac[1], mac[2]);
3696#endif
3697 return -ENODEV;
3698}
3699
3700/************************ INTERRUPT HANDLING ************************/
3701
3702/*
3703 * This function is the interrupt handler for the WaveLAN card. This
3704 * routine will be called whenever:
3705 */
3706static irqreturn_t wavelan_interrupt(int irq, void *dev_id)
3707{
3708 struct net_device *dev;
3709 unsigned long ioaddr;
3710 net_local *lp;
3711 u16 hasr;
3712 u16 status;
3713 u16 ack_cmd;
3714
3715 dev = dev_id;
3716
3717#ifdef DEBUG_INTERRUPT_TRACE
3718 printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
3719#endif
3720
3721 lp = netdev_priv(dev);
3722 ioaddr = dev->base_addr;
3723
3724#ifdef DEBUG_INTERRUPT_INFO
3725 /* Check state of our spinlock */
3726 if(spin_is_locked(&lp->spinlock))
3727 printk(KERN_DEBUG
3728 "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
3729 dev->name);
3730#endif
3731
3732 /* Prevent reentrancy. We need to do that because we may have
3733 * multiple interrupt handler running concurrently.
3734 * It is safe because interrupts are disabled before acquiring
3735 * the spinlock. */
3736 spin_lock(&lp->spinlock);
3737
3738 /* We always had spurious interrupts at startup, but lately I
3739 * saw them comming *between* the request_irq() and the
3740 * spin_lock_irqsave() in wavelan_open(), so the spinlock
3741 * protection is no enough.
3742 * So, we also check lp->hacr that will tell us is we enabled
3743 * irqs or not (see wv_ints_on()).
3744 * We can't use netif_running(dev) because we depend on the
3745 * proper processing of the irq generated during the config. */
3746
3747 /* Which interrupt it is ? */
3748 hasr = hasr_read(ioaddr);
3749
3750#ifdef DEBUG_INTERRUPT_INFO
3751 printk(KERN_INFO
3752 "%s: wavelan_interrupt(): hasr 0x%04x; hacr 0x%04x.\n",
3753 dev->name, hasr, lp->hacr);
3754#endif
3755
3756 /* Check modem interrupt */
3757 if ((hasr & HASR_MMC_INTR) && (lp->hacr & HACR_MMC_INT_ENABLE)) {
3758 u8 dce_status;
3759
3760 /*
3761 * Interrupt from the modem management controller.
3762 * This will clear it -- ignored for now.
3763 */
3764 mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status,
3765 sizeof(dce_status));
3766
3767#ifdef DEBUG_INTERRUPT_ERROR
3768 printk(KERN_INFO
3769 "%s: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n",
3770 dev->name, dce_status);
3771#endif
3772 }
3773
3774 /* Check if not controller interrupt */
3775 if (((hasr & HASR_82586_INTR) == 0) ||
3776 ((lp->hacr & HACR_82586_INT_ENABLE) == 0)) {
3777#ifdef DEBUG_INTERRUPT_ERROR
3778 printk(KERN_INFO
3779 "%s: wavelan_interrupt(): interrupt not coming from i82586 - hasr 0x%04x.\n",
3780 dev->name, hasr);
3781#endif
3782 spin_unlock (&lp->spinlock);
3783 return IRQ_NONE;
3784 }
3785
3786 /* Read interrupt data. */
3787 obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
3788 (unsigned char *) &status, sizeof(status));
3789
3790 /*
3791 * Acknowledge the interrupt(s).
3792 */
3793 ack_cmd = status & SCB_ST_INT;
3794 obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
3795 (unsigned char *) &ack_cmd, sizeof(ack_cmd));
3796 set_chan_attn(ioaddr, lp->hacr);
3797
3798#ifdef DEBUG_INTERRUPT_INFO
3799 printk(KERN_DEBUG "%s: wavelan_interrupt(): status 0x%04x.\n",
3800 dev->name, status);
3801#endif
3802
3803 /* Command completed. */
3804 if ((status & SCB_ST_CX) == SCB_ST_CX) {
3805#ifdef DEBUG_INTERRUPT_INFO
3806 printk(KERN_DEBUG
3807 "%s: wavelan_interrupt(): command completed.\n",
3808 dev->name);
3809#endif
3810 wv_complete(dev, ioaddr, lp);
3811 }
3812
3813 /* Frame received. */
3814 if ((status & SCB_ST_FR) == SCB_ST_FR) {
3815#ifdef DEBUG_INTERRUPT_INFO
3816 printk(KERN_DEBUG
3817 "%s: wavelan_interrupt(): received packet.\n",
3818 dev->name);
3819#endif
3820 wv_receive(dev);
3821 }
3822
3823 /* Check the state of the command unit. */
3824 if (((status & SCB_ST_CNA) == SCB_ST_CNA) ||
3825 (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) &&
3826 (netif_running(dev)))) {
3827#ifdef DEBUG_INTERRUPT_ERROR
3828 printk(KERN_INFO
3829 "%s: wavelan_interrupt(): CU inactive -- restarting\n",
3830 dev->name);
3831#endif
3832 wv_hw_reset(dev);
3833 }
3834
3835 /* Check the state of the command unit. */
3836 if (((status & SCB_ST_RNR) == SCB_ST_RNR) ||
3837 (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) &&
3838 (netif_running(dev)))) {
3839#ifdef DEBUG_INTERRUPT_ERROR
3840 printk(KERN_INFO
3841 "%s: wavelan_interrupt(): RU not ready -- restarting\n",
3842 dev->name);
3843#endif
3844 wv_hw_reset(dev);
3845 }
3846
3847 /* Release spinlock */
3848 spin_unlock (&lp->spinlock);
3849
3850#ifdef DEBUG_INTERRUPT_TRACE
3851 printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
3852#endif
3853 return IRQ_HANDLED;
3854}
3855
3856/*------------------------------------------------------------------*/
3857/*
3858 * Watchdog: when we start a transmission, a timer is set for us in the
3859 * kernel. If the transmission completes, this timer is disabled. If
3860 * the timer expires, we are called and we try to unlock the hardware.
3861 */
3862static void wavelan_watchdog(struct net_device * dev)
3863{
3864 net_local *lp = netdev_priv(dev);
3865 u_long ioaddr = dev->base_addr;
3866 unsigned long flags;
3867 unsigned int nreaped;
3868
3869#ifdef DEBUG_INTERRUPT_TRACE
3870 printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
3871#endif
3872
3873#ifdef DEBUG_INTERRUPT_ERROR
3874 printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
3875 dev->name);
3876#endif
3877
3878 /* Check that we came here for something */
3879 if (lp->tx_n_in_use <= 0) {
3880 return;
3881 }
3882
3883 spin_lock_irqsave(&lp->spinlock, flags);
3884
3885 /* Try to see if some buffers are not free (in case we missed
3886 * an interrupt */
3887 nreaped = wv_complete(dev, ioaddr, lp);
3888
3889#ifdef DEBUG_INTERRUPT_INFO
3890 printk(KERN_DEBUG
3891 "%s: wavelan_watchdog(): %d reaped, %d remain.\n",
3892 dev->name, nreaped, lp->tx_n_in_use);
3893#endif
3894
3895#ifdef DEBUG_PSA_SHOW
3896 {
3897 psa_t psa;
3898 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
3899 wv_psa_show(&psa);
3900 }
3901#endif
3902#ifdef DEBUG_MMC_SHOW
3903 wv_mmc_show(dev);
3904#endif
3905#ifdef DEBUG_I82586_SHOW
3906 wv_cu_show(dev);
3907#endif
3908
3909 /* If no buffer has been freed */
3910 if (nreaped == 0) {
3911#ifdef DEBUG_INTERRUPT_ERROR
3912 printk(KERN_INFO
3913 "%s: wavelan_watchdog(): cleanup failed, trying reset\n",
3914 dev->name);
3915#endif
3916 wv_hw_reset(dev);
3917 }
3918
3919 /* At this point, we should have some free Tx buffer ;-) */
3920 if (lp->tx_n_in_use < NTXBLOCKS - 1)
3921 netif_wake_queue(dev);
3922
3923 spin_unlock_irqrestore(&lp->spinlock, flags);
3924
3925#ifdef DEBUG_INTERRUPT_TRACE
3926 printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
3927#endif
3928}
3929
3930/********************* CONFIGURATION CALLBACKS *********************/
3931/*
3932 * Here are the functions called by the Linux networking code (NET3)
3933 * for initialization, configuration and deinstallations of the
3934 * WaveLAN ISA hardware.
3935 */
3936
3937/*------------------------------------------------------------------*/
3938/*
3939 * Configure and start up the WaveLAN PCMCIA adaptor.
3940 * Called by NET3 when it "opens" the device.
3941 */
3942static int wavelan_open(struct net_device * dev)
3943{
3944 net_local *lp = netdev_priv(dev);
3945 unsigned long flags;
3946
3947#ifdef DEBUG_CALLBACK_TRACE
3948 printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
3949 (unsigned int) dev);
3950#endif
3951
3952 /* Check irq */
3953 if (dev->irq == 0) {
3954#ifdef DEBUG_CONFIG_ERROR
3955 printk(KERN_WARNING "%s: wavelan_open(): no IRQ\n",
3956 dev->name);
3957#endif
3958 return -ENXIO;
3959 }
3960
3961 if (request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN", dev) != 0)
3962 {
3963#ifdef DEBUG_CONFIG_ERROR
3964 printk(KERN_WARNING "%s: wavelan_open(): invalid IRQ\n",
3965 dev->name);
3966#endif
3967 return -EAGAIN;
3968 }
3969
3970 spin_lock_irqsave(&lp->spinlock, flags);
3971
3972 if (wv_hw_reset(dev) != -1) {
3973 netif_start_queue(dev);
3974 } else {
3975 free_irq(dev->irq, dev);
3976#ifdef DEBUG_CONFIG_ERROR
3977 printk(KERN_INFO
3978 "%s: wavelan_open(): impossible to start the card\n",
3979 dev->name);
3980#endif
3981 spin_unlock_irqrestore(&lp->spinlock, flags);
3982 return -EAGAIN;
3983 }
3984 spin_unlock_irqrestore(&lp->spinlock, flags);
3985
3986#ifdef DEBUG_CALLBACK_TRACE
3987 printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
3988#endif
3989 return 0;
3990}
3991
3992/*------------------------------------------------------------------*/
3993/*
3994 * Shut down the WaveLAN ISA card.
3995 * Called by NET3 when it "closes" the device.
3996 */
3997static int wavelan_close(struct net_device * dev)
3998{
3999 net_local *lp = netdev_priv(dev);
4000 unsigned long flags;
4001
4002#ifdef DEBUG_CALLBACK_TRACE
4003 printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
4004 (unsigned int) dev);
4005#endif
4006
4007 netif_stop_queue(dev);
4008
4009 /*
4010 * Flush the Tx and disable Rx.
4011 */
4012 spin_lock_irqsave(&lp->spinlock, flags);
4013 wv_82586_stop(dev);
4014 spin_unlock_irqrestore(&lp->spinlock, flags);
4015
4016 free_irq(dev->irq, dev);
4017
4018#ifdef DEBUG_CALLBACK_TRACE
4019 printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
4020#endif
4021 return 0;
4022}
4023
4024static const struct net_device_ops wavelan_netdev_ops = {
4025 .ndo_open = wavelan_open,
4026 .ndo_stop = wavelan_close,
4027 .ndo_start_xmit = wavelan_packet_xmit,
4028 .ndo_set_multicast_list = wavelan_set_multicast_list,
4029 .ndo_tx_timeout = wavelan_watchdog,
4030 .ndo_change_mtu = eth_change_mtu,
4031 .ndo_validate_addr = eth_validate_addr,
4032#ifdef SET_MAC_ADDRESS
4033 .ndo_set_mac_address = wavelan_set_mac_address
4034#else
4035 .ndo_set_mac_address = eth_mac_addr,
4036#endif
4037};
4038
4039
4040/*------------------------------------------------------------------*/
4041/*
4042 * Probe an I/O address, and if the WaveLAN is there configure the
4043 * device structure
4044 * (called by wavelan_probe() and via init_module()).
4045 */
4046static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr)
4047{
4048 u8 irq_mask;
4049 int irq;
4050 net_local *lp;
4051 mac_addr mac;
4052 int err;
4053
4054 if (!request_region(ioaddr, sizeof(ha_t), "wavelan"))
4055 return -EADDRINUSE;
4056
4057 err = wv_check_ioaddr(ioaddr, mac);
4058 if (err)
4059 goto out;
4060
4061 memcpy(dev->dev_addr, mac, 6);
4062
4063 dev->base_addr = ioaddr;
4064
4065#ifdef DEBUG_CALLBACK_TRACE
4066 printk(KERN_DEBUG "%s: ->wavelan_config(dev=0x%x, ioaddr=0x%lx)\n",
4067 dev->name, (unsigned int) dev, ioaddr);
4068#endif
4069
4070 /* Check IRQ argument on command line. */
4071 if (dev->irq != 0) {
4072 irq_mask = wv_irq_to_psa(dev->irq);
4073
4074 if (irq_mask == 0) {
4075#ifdef DEBUG_CONFIG_ERROR
4076 printk(KERN_WARNING
4077 "%s: wavelan_config(): invalid IRQ %d ignored.\n",
4078 dev->name, dev->irq);
4079#endif
4080 dev->irq = 0;
4081 } else {
4082#ifdef DEBUG_CONFIG_INFO
4083 printk(KERN_DEBUG
4084 "%s: wavelan_config(): changing IRQ to %d\n",
4085 dev->name, dev->irq);
4086#endif
4087 psa_write(ioaddr, HACR_DEFAULT,
4088 psaoff(0, psa_int_req_no), &irq_mask, 1);
4089 /* update the Wavelan checksum */
4090 update_psa_checksum(dev, ioaddr, HACR_DEFAULT);
4091 wv_hacr_reset(ioaddr);
4092 }
4093 }
4094
4095 psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_int_req_no),
4096 &irq_mask, 1);
4097 if ((irq = wv_psa_to_irq(irq_mask)) == -1) {
4098#ifdef DEBUG_CONFIG_ERROR
4099 printk(KERN_INFO
4100 "%s: wavelan_config(): could not wavelan_map_irq(%d).\n",
4101 dev->name, irq_mask);
4102#endif
4103 err = -EAGAIN;
4104 goto out;
4105 }
4106
4107 dev->irq = irq;
4108
4109 dev->mem_start = 0x0000;
4110 dev->mem_end = 0x0000;
4111 dev->if_port = 0;
4112
4113 /* Initialize device structures */
4114 memset(netdev_priv(dev), 0, sizeof(net_local));
4115 lp = netdev_priv(dev);
4116
4117 /* Back link to the device structure. */
4118 lp->dev = dev;
4119 /* Add the device at the beginning of the linked list. */
4120 lp->next = wavelan_list;
4121 wavelan_list = lp;
4122
4123 lp->hacr = HACR_DEFAULT;
4124
4125 /* Multicast stuff */
4126 lp->promiscuous = 0;
4127 lp->mc_count = 0;
4128
4129 /* Init spinlock */
4130 spin_lock_init(&lp->spinlock);
4131
4132 dev->netdev_ops = &wavelan_netdev_ops;
4133 dev->watchdog_timeo = WATCHDOG_JIFFIES;
4134 dev->wireless_handlers = &wavelan_handler_def;
4135 lp->wireless_data.spy_data = &lp->spy_data;
4136 dev->wireless_data = &lp->wireless_data;
4137
4138 dev->mtu = WAVELAN_MTU;
4139
4140 /* Display nice information. */
4141 wv_init_info(dev);
4142
4143#ifdef DEBUG_CALLBACK_TRACE
4144 printk(KERN_DEBUG "%s: <-wavelan_config()\n", dev->name);
4145#endif
4146 return 0;
4147out:
4148 release_region(ioaddr, sizeof(ha_t));
4149 return err;
4150}
4151
4152/*------------------------------------------------------------------*/
4153/*
4154 * Check for a network adaptor of this type. Return '0' iff one
4155 * exists. There seem to be different interpretations of
4156 * the initial value of dev->base_addr.
4157 * We follow the example in drivers/net/ne.c.
4158 * (called in "Space.c")
4159 */
4160struct net_device * __init wavelan_probe(int unit)
4161{
4162 struct net_device *dev;
4163 short base_addr;
4164 int def_irq;
4165 int i;
4166 int r = 0;
4167
4168 /* compile-time check the sizes of structures */
4169 BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
4170 BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
4171 BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
4172 BUILD_BUG_ON(sizeof(ha_t) != HA_SIZE);
4173
4174 dev = alloc_etherdev(sizeof(net_local));
4175 if (!dev)
4176 return ERR_PTR(-ENOMEM);
4177
4178 sprintf(dev->name, "eth%d", unit);
4179 netdev_boot_setup_check(dev);
4180 base_addr = dev->base_addr;
4181 def_irq = dev->irq;
4182
4183#ifdef DEBUG_CALLBACK_TRACE
4184 printk(KERN_DEBUG
4185 "%s: ->wavelan_probe(dev=%p (base_addr=0x%x))\n",
4186 dev->name, dev, (unsigned int) dev->base_addr);
4187#endif
4188
4189 /* Don't probe at all. */
4190 if (base_addr < 0) {
4191#ifdef DEBUG_CONFIG_ERROR
4192 printk(KERN_WARNING
4193 "%s: wavelan_probe(): invalid base address\n",
4194 dev->name);
4195#endif
4196 r = -ENXIO;
4197 } else if (base_addr > 0x100) { /* Check a single specified location. */
4198 r = wavelan_config(dev, base_addr);
4199#ifdef DEBUG_CONFIG_INFO
4200 if (r != 0)
4201 printk(KERN_DEBUG
4202 "%s: wavelan_probe(): no device at specified base address (0x%X) or address already in use\n",
4203 dev->name, base_addr);
4204#endif
4205
4206#ifdef DEBUG_CALLBACK_TRACE
4207 printk(KERN_DEBUG "%s: <-wavelan_probe()\n", dev->name);
4208#endif
4209 } else { /* Scan all possible addresses of the WaveLAN hardware. */
4210 for (i = 0; i < ARRAY_SIZE(iobase); i++) {
4211 dev->irq = def_irq;
4212 if (wavelan_config(dev, iobase[i]) == 0) {
4213#ifdef DEBUG_CALLBACK_TRACE
4214 printk(KERN_DEBUG
4215 "%s: <-wavelan_probe()\n",
4216 dev->name);
4217#endif
4218 break;
4219 }
4220 }
4221 if (i == ARRAY_SIZE(iobase))
4222 r = -ENODEV;
4223 }
4224 if (r)
4225 goto out;
4226 r = register_netdev(dev);
4227 if (r)
4228 goto out1;
4229 return dev;
4230out1:
4231 release_region(dev->base_addr, sizeof(ha_t));
4232 wavelan_list = wavelan_list->next;
4233out:
4234 free_netdev(dev);
4235 return ERR_PTR(r);
4236}
4237
4238/****************************** MODULE ******************************/
4239/*
4240 * Module entry point: insertion and removal
4241 */
4242
4243#ifdef MODULE
4244/*------------------------------------------------------------------*/
4245/*
4246 * Insertion of the module
4247 * I'm now quite proud of the multi-device support.
4248 */
4249int __init init_module(void)
4250{
4251 int ret = -EIO; /* Return error if no cards found */
4252 int i;
4253
4254#ifdef DEBUG_MODULE_TRACE
4255 printk(KERN_DEBUG "-> init_module()\n");
4256#endif
4257
4258 /* If probing is asked */
4259 if (io[0] == 0) {
4260#ifdef DEBUG_CONFIG_ERROR
4261 printk(KERN_WARNING
4262 "WaveLAN init_module(): doing device probing (bad !)\n");
4263 printk(KERN_WARNING
4264 "Specify base addresses while loading module to correct the problem\n");
4265#endif
4266
4267 /* Copy the basic set of address to be probed. */
4268 for (i = 0; i < ARRAY_SIZE(iobase); i++)
4269 io[i] = iobase[i];
4270 }
4271
4272
4273 /* Loop on all possible base addresses. */
4274 for (i = 0; i < ARRAY_SIZE(io) && io[i] != 0; i++) {
4275 struct net_device *dev = alloc_etherdev(sizeof(net_local));
4276 if (!dev)
4277 break;
4278 if (name[i])
4279 strcpy(dev->name, name[i]); /* Copy name */
4280 dev->base_addr = io[i];
4281 dev->irq = irq[i];
4282
4283 /* Check if there is something at this base address. */
4284 if (wavelan_config(dev, io[i]) == 0) {
4285 if (register_netdev(dev) != 0) {
4286 release_region(dev->base_addr, sizeof(ha_t));
4287 wavelan_list = wavelan_list->next;
4288 } else {
4289 ret = 0;
4290 continue;
4291 }
4292 }
4293 free_netdev(dev);
4294 }
4295
4296#ifdef DEBUG_CONFIG_ERROR
4297 if (!wavelan_list)
4298 printk(KERN_WARNING
4299 "WaveLAN init_module(): no device found\n");
4300#endif
4301
4302#ifdef DEBUG_MODULE_TRACE
4303 printk(KERN_DEBUG "<- init_module()\n");
4304#endif
4305 return ret;
4306}
4307
4308/*------------------------------------------------------------------*/
4309/*
4310 * Removal of the module
4311 */
4312void cleanup_module(void)
4313{
4314#ifdef DEBUG_MODULE_TRACE
4315 printk(KERN_DEBUG "-> cleanup_module()\n");
4316#endif
4317
4318 /* Loop on all devices and release them. */
4319 while (wavelan_list) {
4320 struct net_device *dev = wavelan_list->dev;
4321
4322#ifdef DEBUG_CONFIG_INFO
4323 printk(KERN_DEBUG
4324 "%s: cleanup_module(): removing device at 0x%x\n",
4325 dev->name, (unsigned int) dev);
4326#endif
4327 unregister_netdev(dev);
4328
4329 release_region(dev->base_addr, sizeof(ha_t));
4330 wavelan_list = wavelan_list->next;
4331
4332 free_netdev(dev);
4333 }
4334
4335#ifdef DEBUG_MODULE_TRACE
4336 printk(KERN_DEBUG "<- cleanup_module()\n");
4337#endif
4338}
4339#endif /* MODULE */
4340MODULE_LICENSE("GPL");
4341
4342/*
4343 * This software may only be used and distributed
4344 * according to the terms of the GNU General Public License.
4345 *
4346 * This software was developed as a component of the
4347 * Linux operating system.
4348 * It is based on other device drivers and information
4349 * either written or supplied by:
4350 * Ajay Bakre (bakre@paul.rutgers.edu),
4351 * Donald Becker (becker@scyld.com),
4352 * Loeke Brederveld (Loeke.Brederveld@Utrecht.NCR.com),
4353 * Anders Klemets (klemets@it.kth.se),
4354 * Vladimir V. Kolpakov (w@stier.koenig.ru),
4355 * Marc Meertens (Marc.Meertens@Utrecht.NCR.com),
4356 * Pauline Middelink (middelin@polyware.iaf.nl),
4357 * Robert Morris (rtm@das.harvard.edu),
4358 * Jean Tourrilhes (jt@hplb.hpl.hp.com),
4359 * Girish Welling (welling@paul.rutgers.edu),
4360 *
4361 * Thanks go also to:
4362 * James Ashton (jaa101@syseng.anu.edu.au),
4363 * Alan Cox (alan@lxorguk.ukuu.org.uk),
4364 * Allan Creighton (allanc@cs.usyd.edu.au),
4365 * Matthew Geier (matthew@cs.usyd.edu.au),
4366 * Remo di Giovanni (remo@cs.usyd.edu.au),
4367 * Eckhard Grah (grah@wrcs1.urz.uni-wuppertal.de),
4368 * Vipul Gupta (vgupta@cs.binghamton.edu),
4369 * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
4370 * Tim Nicholson (tim@cs.usyd.edu.au),
4371 * Ian Parkin (ian@cs.usyd.edu.au),
4372 * John Rosenberg (johnr@cs.usyd.edu.au),
4373 * George Rossi (george@phm.gov.au),
4374 * Arthur Scott (arthur@cs.usyd.edu.au),
4375 * Peter Storey,
4376 * for their assistance and advice.
4377 *
4378 * Please send bug reports, updates, comments to:
4379 *
4380 * Bruce Janson Email: bruce@cs.usyd.edu.au
4381 * Basser Department of Computer Science Phone: +61-2-9351-3423
4382 * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838
4383 */
diff --git a/drivers/net/wireless/wavelan.h b/drivers/net/wireless/wavelan.h
deleted file mode 100644
index 9ab360558ffd..000000000000
--- a/drivers/net/wireless/wavelan.h
+++ /dev/null
@@ -1,370 +0,0 @@
1/*
2 * WaveLAN ISA driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 * Original copyright follows. See wavelan.p.h for details.
8 *
9 * This file contains the declarations for the WaveLAN hardware. Note that
10 * the WaveLAN ISA includes a i82586 controller (see definitions in
11 * file i82586.h).
12 *
13 * The main difference between the ISA hardware and the PCMCIA one is
14 * the Ethernet controller (i82586 instead of i82593).
15 * The i82586 allows multiple transmit buffers. The PSA needs to be accessed
16 * through the host interface.
17 */
18
19#ifndef _WAVELAN_H
20#define _WAVELAN_H
21
22/************************** MAGIC NUMBERS ***************************/
23
24/* Detection of the WaveLAN card is done by reading the MAC
25 * address from the card and checking it. If you have a non-AT&T
26 * product (OEM, like DEC RoamAbout, Digital Ocean, or Epson),
27 * you might need to modify this part to accommodate your hardware.
28 */
29static const char MAC_ADDRESSES[][3] =
30{
31 { 0x08, 0x00, 0x0E }, /* AT&T WaveLAN (standard) & DEC RoamAbout */
32 { 0x08, 0x00, 0x6A }, /* AT&T WaveLAN (alternate) */
33 { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */
34 { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */
35 /* Add your card here and send me the patch! */
36};
37
38#define WAVELAN_ADDR_SIZE 6 /* Size of a MAC address */
39
40#define WAVELAN_MTU 1500 /* Maximum size of WaveLAN packet */
41
42#define MAXDATAZ (WAVELAN_ADDR_SIZE + WAVELAN_ADDR_SIZE + 2 + WAVELAN_MTU)
43
44/*
45 * Constants used to convert channels to frequencies
46 */
47
48/* Frequency available in the 2.0 modem, in units of 250 kHz
49 * (as read in the offset register of the dac area).
50 * Used to map channel numbers used by `wfreqsel' to frequencies
51 */
52static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
53 0xD0, 0xF0, 0xF8, 0x150 };
54
55/* Frequencies of the 1.0 modem (fixed frequencies).
56 * Use to map the PSA `subband' to a frequency
57 * Note : all frequencies apart from the first one need to be multiplied by 10
58 */
59static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
60
61
62
63/*************************** PC INTERFACE ****************************/
64
65/*
66 * Host Adaptor structure.
67 * (base is board port address).
68 */
69typedef union hacs_u hacs_u;
70union hacs_u
71{
72 unsigned short hu_command; /* Command register */
73#define HACR_RESET 0x0001 /* Reset board */
74#define HACR_CA 0x0002 /* Set Channel Attention for 82586 */
75#define HACR_16BITS 0x0004 /* 16-bit operation (0 => 8bits) */
76#define HACR_OUT0 0x0008 /* General purpose output pin 0 */
77 /* not used - must be 1 */
78#define HACR_OUT1 0x0010 /* General purpose output pin 1 */
79 /* not used - must be 1 */
80#define HACR_82586_INT_ENABLE 0x0020 /* Enable 82586 interrupts */
81#define HACR_MMC_INT_ENABLE 0x0040 /* Enable MMC interrupts */
82#define HACR_INTR_CLR_ENABLE 0x0080 /* Enable interrupt status read/clear */
83 unsigned short hu_status; /* Status Register */
84#define HASR_82586_INTR 0x0001 /* Interrupt request from 82586 */
85#define HASR_MMC_INTR 0x0002 /* Interrupt request from MMC */
86#define HASR_MMC_BUSY 0x0004 /* MMC busy indication */
87#define HASR_PSA_BUSY 0x0008 /* LAN parameter storage area busy */
88} __attribute__ ((packed));
89
90typedef struct ha_t ha_t;
91struct ha_t
92{
93 hacs_u ha_cs; /* Command and status registers */
94#define ha_command ha_cs.hu_command
95#define ha_status ha_cs.hu_status
96 unsigned short ha_mmcr; /* Modem Management Ctrl Register */
97 unsigned short ha_pior0; /* Program I/O Address Register Port 0 */
98 unsigned short ha_piop0; /* Program I/O Port 0 */
99 unsigned short ha_pior1; /* Program I/O Address Register Port 1 */
100 unsigned short ha_piop1; /* Program I/O Port 1 */
101 unsigned short ha_pior2; /* Program I/O Address Register Port 2 */
102 unsigned short ha_piop2; /* Program I/O Port 2 */
103};
104
105#define HA_SIZE 16
106
107#define hoff(p,f) (unsigned short)((void *)(&((ha_t *)((void *)0 + (p)))->f) - (void *)0)
108#define HACR(p) hoff(p, ha_command)
109#define HASR(p) hoff(p, ha_status)
110#define MMCR(p) hoff(p, ha_mmcr)
111#define PIOR0(p) hoff(p, ha_pior0)
112#define PIOP0(p) hoff(p, ha_piop0)
113#define PIOR1(p) hoff(p, ha_pior1)
114#define PIOP1(p) hoff(p, ha_piop1)
115#define PIOR2(p) hoff(p, ha_pior2)
116#define PIOP2(p) hoff(p, ha_piop2)
117
118/*
119 * Program I/O Mode Register values.
120 */
121#define STATIC_PIO 0 /* Mode 1: static mode */
122 /* RAM access ??? */
123#define AUTOINCR_PIO 1 /* Mode 2: auto increment mode */
124 /* RAM access ??? */
125#define AUTODECR_PIO 2 /* Mode 3: auto decrement mode */
126 /* RAM access ??? */
127#define PARAM_ACCESS_PIO 3 /* Mode 4: LAN parameter access mode */
128 /* Parameter access. */
129#define PIO_MASK 3 /* register mask */
130#define PIOM(cmd,piono) ((u_short)cmd << 10 << (piono * 2))
131
132#define HACR_DEFAULT (HACR_OUT0 | HACR_OUT1 | HACR_16BITS | PIOM(STATIC_PIO, 0) | PIOM(AUTOINCR_PIO, 1) | PIOM(PARAM_ACCESS_PIO, 2))
133#define HACR_INTRON (HACR_82586_INT_ENABLE | HACR_MMC_INT_ENABLE | HACR_INTR_CLR_ENABLE)
134
135/************************** MEMORY LAYOUT **************************/
136
137/*
138 * Onboard 64 k RAM layout.
139 * (Offsets from 0x0000.)
140 */
141#define OFFSET_RU 0x0000 /* 75% memory */
142#define OFFSET_CU 0xC000 /* 25% memory */
143#define OFFSET_SCB (OFFSET_ISCP - sizeof(scb_t))
144#define OFFSET_ISCP (OFFSET_SCP - sizeof(iscp_t))
145#define OFFSET_SCP I82586_SCP_ADDR
146
147#define RXBLOCKZ (sizeof(fd_t) + sizeof(rbd_t) + MAXDATAZ)
148#define TXBLOCKZ (sizeof(ac_tx_t) + sizeof(ac_nop_t) + sizeof(tbd_t) + MAXDATAZ)
149
150#define NRXBLOCKS ((OFFSET_CU - OFFSET_RU) / RXBLOCKZ)
151#define NTXBLOCKS ((OFFSET_SCB - OFFSET_CU) / TXBLOCKZ)
152
153/********************** PARAMETER STORAGE AREA **********************/
154
155/*
156 * Parameter Storage Area (PSA).
157 */
158typedef struct psa_t psa_t;
159struct psa_t
160{
161 unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
162 unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
163 unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
164 unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
165 unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
166 unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
167 unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
168 unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
169 unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
170 unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
171
172 unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
173 unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
174 unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
175#define PSA_UNIVERSAL 0 /* Universal (factory) */
176#define PSA_LOCAL 1 /* Local */
177 unsigned char psa_comp_number; /* [0x1D] Compatibility Number: */
178#define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
179#define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
180#define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
181#define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
182#define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
183 unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
184 unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
185#define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
186 unsigned char psa_subband; /* [0x20] Subband */
187#define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
188#define PSA_SUBBAND_2425 1 /* 2425 MHz */
189#define PSA_SUBBAND_2460 2 /* 2460 MHz */
190#define PSA_SUBBAND_2484 3 /* 2484 MHz */
191#define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
192 unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
193 unsigned char psa_mod_delay; /* [0x22] Modem Delay (?) (reserved) */
194 unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
195 unsigned char psa_nwid_select; /* [0x25] Network ID Select On/Off */
196 unsigned char psa_encryption_select; /* [0x26] Encryption On/Off */
197 unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
198 unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
199 unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
200 unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
201 unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
202 unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
203 unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
204 unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
205};
206
207#define PSA_SIZE 64
208
209/* Calculate offset of a field in the above structure.
210 * Warning: only even addresses are used. */
211#define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
212
213/******************** MODEM MANAGEMENT INTERFACE ********************/
214
215/*
216 * Modem Management Controller (MMC) write structure.
217 */
218typedef struct mmw_t mmw_t;
219struct mmw_t
220{
221 unsigned char mmw_encr_key[8]; /* encryption key */
222 unsigned char mmw_encr_enable; /* Enable or disable encryption. */
223#define MMW_ENCR_ENABLE_MODE 0x02 /* mode of security option */
224#define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option. */
225 unsigned char mmw_unused0[1]; /* unused */
226 unsigned char mmw_des_io_invert; /* encryption option */
227#define MMW_DES_IO_INVERT_RES 0x0F /* reserved */
228#define MMW_DES_IO_INVERT_CTRL 0xF0 /* control (?) (set to 0) */
229 unsigned char mmw_unused1[5]; /* unused */
230 unsigned char mmw_loopt_sel; /* looptest selection */
231#define MMW_LOOPT_SEL_DIS_NWID 0x40 /* Disable NWID filtering. */
232#define MMW_LOOPT_SEL_INT 0x20 /* Activate Attention Request. */
233#define MMW_LOOPT_SEL_LS 0x10 /* looptest, no collision avoidance */
234#define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
235#define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
236#define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
237#define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
238 unsigned char mmw_jabber_enable; /* jabber timer enable */
239 /* Abort transmissions > 200 ms */
240 unsigned char mmw_freeze; /* freeze or unfreeze signal level */
241 /* 0 : signal level & qual updated for every new message, 1 : frozen */
242 unsigned char mmw_anten_sel; /* antenna selection */
243#define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
244#define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
245 unsigned char mmw_ifs; /* inter frame spacing */
246 /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
247 unsigned char mmw_mod_delay; /* modem delay (synchro) */
248 unsigned char mmw_jam_time; /* jamming time (after collision) */
249 unsigned char mmw_unused2[1]; /* unused */
250 unsigned char mmw_thr_pre_set; /* level threshold preset */
251 /* Discard all packet with signal < this value (4) */
252 unsigned char mmw_decay_prm; /* decay parameters */
253 unsigned char mmw_decay_updat_prm; /* decay update parameters */
254 unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
255 /* Discard all packet with quality < this value (3) */
256 unsigned char mmw_netw_id_l; /* NWID low order byte */
257 unsigned char mmw_netw_id_h; /* NWID high order byte */
258 /* Network ID or Domain : create virtual net on the air */
259
260 /* 2.0 Hardware extension - frequency selection support */
261 unsigned char mmw_mode_select; /* for analog tests (set to 0) */
262 unsigned char mmw_unused3[1]; /* unused */
263 unsigned char mmw_fee_ctrl; /* frequency EEPROM control */
264#define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions. */
265#define MMW_FEE_CTRL_DWLD 0x08 /* Download EEPROM to mmc. */
266#define MMW_FEE_CTRL_CMD 0x07 /* EEPROM commands: */
267#define MMW_FEE_CTRL_READ 0x06 /* Read */
268#define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
269#define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address. */
270#define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses. */
271#define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
272#define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
273#define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
274#define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers. */
275#define MMW_FEE_CTRL_PRWRITE 0x15 /* Write address in protect register */
276#define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
277 /* Never issue the PRDS command: it's irreversible! */
278
279 unsigned char mmw_fee_addr; /* EEPROM address */
280#define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel. */
281#define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
282#define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
283#define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
284#define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
285#define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
286
287 unsigned char mmw_fee_data_l; /* Write data to EEPROM. */
288 unsigned char mmw_fee_data_h; /* high octet */
289 unsigned char mmw_ext_ant; /* Setting for external antenna */
290#define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
291#define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
292#define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
293#define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
294#define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
295} __attribute__ ((packed));
296
297#define MMW_SIZE 37
298
299#define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
300
301/*
302 * Modem Management Controller (MMC) read structure.
303 */
304typedef struct mmr_t mmr_t;
305struct mmr_t
306{
307 unsigned char mmr_unused0[8]; /* unused */
308 unsigned char mmr_des_status; /* encryption status */
309 unsigned char mmr_des_avail; /* encryption available (0x55 read) */
310#define MMR_DES_AVAIL_DES 0x55 /* DES available */
311#define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
312 unsigned char mmr_des_io_invert; /* des I/O invert register */
313 unsigned char mmr_unused1[5]; /* unused */
314 unsigned char mmr_dce_status; /* DCE status */
315#define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
316#define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
317#define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
318#define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
319#define MMR_DCE_STATUS 0x0F /* mask to get the bits */
320 unsigned char mmr_dsp_id; /* DSP ID (AA = Daedalus rev A) */
321 unsigned char mmr_unused2[2]; /* unused */
322 unsigned char mmr_correct_nwid_l; /* # of correct NWIDs rxd (low) */
323 unsigned char mmr_correct_nwid_h; /* # of correct NWIDs rxd (high) */
324 /* Warning: read high-order octet first! */
325 unsigned char mmr_wrong_nwid_l; /* # of wrong NWIDs rxd (low) */
326 unsigned char mmr_wrong_nwid_h; /* # of wrong NWIDs rxd (high) */
327 unsigned char mmr_thr_pre_set; /* level threshold preset */
328#define MMR_THR_PRE_SET 0x3F /* level threshold preset */
329#define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
330 unsigned char mmr_signal_lvl; /* signal level */
331#define MMR_SIGNAL_LVL 0x3F /* signal level */
332#define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
333 unsigned char mmr_silence_lvl; /* silence level (noise) */
334#define MMR_SILENCE_LVL 0x3F /* silence level */
335#define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
336 unsigned char mmr_sgnl_qual; /* signal quality */
337#define MMR_SGNL_QUAL 0x0F /* signal quality */
338#define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
339 unsigned char mmr_netw_id_l; /* NWID low order byte (?) */
340 unsigned char mmr_unused3[3]; /* unused */
341
342 /* 2.0 Hardware extension - frequency selection support */
343 unsigned char mmr_fee_status; /* Status of frequency EEPROM */
344#define MMR_FEE_STATUS_ID 0xF0 /* Modem revision ID */
345#define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
346#define MMR_FEE_STATUS_BUSY 0x04 /* EEPROM busy */
347 unsigned char mmr_unused4[1]; /* unused */
348 unsigned char mmr_fee_data_l; /* Read data from EEPROM (low) */
349 unsigned char mmr_fee_data_h; /* Read data from EEPROM (high) */
350} __attribute__ ((packed));
351
352#define MMR_SIZE 36
353
354#define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
355
356/* Make the two above structures one */
357typedef union mm_t
358{
359 struct mmw_t w; /* Write to the mmc */
360 struct mmr_t r; /* Read from the mmc */
361} mm_t;
362
363#endif /* _WAVELAN_H */
364
365/*
366 * This software may only be used and distributed
367 * according to the terms of the GNU General Public License.
368 *
369 * For more details, see wavelan.c.
370 */
diff --git a/drivers/net/wireless/wavelan.p.h b/drivers/net/wireless/wavelan.p.h
deleted file mode 100644
index dbe8de6e5f52..000000000000
--- a/drivers/net/wireless/wavelan.p.h
+++ /dev/null
@@ -1,696 +0,0 @@
1/*
2 * WaveLAN ISA driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 *
8 * This file contains all definitions and declarations necessary for the
9 * WaveLAN ISA driver. This file is a private header, so it should
10 * be included only in wavelan.c!
11 */
12
13#ifndef WAVELAN_P_H
14#define WAVELAN_P_H
15
16/************************** DOCUMENTATION ***************************/
17/*
18 * This driver provides a Linux interface to the WaveLAN ISA hardware.
19 * The WaveLAN is a product of Lucent (http://www.wavelan.com/).
20 * This division was formerly part of NCR and then AT&T.
21 * WaveLANs are also distributed by DEC (RoamAbout DS) and Digital Ocean.
22 *
23 * To learn how to use this driver, read the NET3 HOWTO.
24 * If you want to exploit the many other functionalities, read the comments
25 * in the code.
26 *
27 * This driver is the result of the effort of many people (see below).
28 */
29
30/* ------------------------ SPECIFIC NOTES ------------------------ */
31/*
32 * Web page
33 * --------
34 * I try to maintain a web page with the Wireless LAN Howto at :
35 * http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
36 *
37 * SMP
38 * ---
39 * We now are SMP compliant (I eventually fixed the remaining bugs).
40 * The driver has been tested on a dual P6-150 and survived my usual
41 * set of torture tests.
42 * Anyway, I spent enough time chasing interrupt re-entrancy during
43 * errors or reconfigure, and I designed the locked/unlocked sections
44 * of the driver with great care, and with the recent addition of
45 * the spinlock (thanks to the new API), we should be quite close to
46 * the truth.
47 * The SMP/IRQ locking is quite coarse and conservative (i.e. not fast),
48 * but better safe than sorry (especially at 2 Mb/s ;-).
49 *
50 * I have also looked into disabling only our interrupt on the card
51 * (via HACR) instead of all interrupts in the processor (via cli),
52 * so that other driver are not impacted, and it look like it's
53 * possible, but it's very tricky to do right (full of races). As
54 * the gain would be mostly for SMP systems, it can wait...
55 *
56 * Debugging and options
57 * ---------------------
58 * You will find below a set of '#define" allowing a very fine control
59 * on the driver behaviour and the debug messages printed.
60 * The main options are :
61 * o SET_PSA_CRC, to have your card correctly recognised by
62 * an access point and the Point-to-Point diagnostic tool.
63 * o USE_PSA_CONFIG, to read configuration from the PSA (EEprom)
64 * (otherwise we always start afresh with some defaults)
65 *
66 * wavelan.o is too darned big
67 * ---------------------------
68 * That's true! There is a very simple way to reduce the driver
69 * object by 33%! Comment out the following line:
70 * #include <linux/wireless.h>
71 * Other compile options can also reduce the size of it...
72 *
73 * MAC address and hardware detection:
74 * -----------------------------------
75 * The detection code for the WaveLAN checks that the first three
76 * octets of the MAC address fit the company code. This type of
77 * detection works well for AT&T cards (because the AT&T code is
78 * hardcoded in wavelan.h), but of course will fail for other
79 * manufacturers.
80 *
81 * If you are sure that your card is derived from the WaveLAN,
82 * here is the way to configure it:
83 * 1) Get your MAC address
84 * a) With your card utilities (wfreqsel, instconf, etc.)
85 * b) With the driver:
86 * o compile the kernel with DEBUG_CONFIG_INFO enabled
87 * o Boot and look the card messages
88 * 2) Set your MAC code (3 octets) in MAC_ADDRESSES[][3] (wavelan.h)
89 * 3) Compile and verify
90 * 4) Send me the MAC code. I will include it in the next version.
91 *
92 */
93
94/* --------------------- WIRELESS EXTENSIONS --------------------- */
95/*
96 * This driver is the first to support "wireless extensions".
97 * This set of extensions provides a standard way to control the wireless
98 * characteristics of the hardware. Applications such as mobile IP may
99 * take advantage of it.
100 *
101 * It might be a good idea as well to fetch the wireless tools to
102 * configure the device and play a bit.
103 */
104
105/* ---------------------------- FILES ---------------------------- */
106/*
107 * wavelan.c: actual code for the driver: C functions
108 *
109 * wavelan.p.h: private header: local types and variables for driver
110 *
111 * wavelan.h: description of the hardware interface and structs
112 *
113 * i82586.h: description of the Ethernet controller
114 */
115
116/* --------------------------- HISTORY --------------------------- */
117/*
118 * This is based on information in the drivers' headers. It may not be
119 * accurate, and I guarantee only my best effort.
120 *
121 * The history of the WaveLAN drivers is as complicated as the history of
122 * the WaveLAN itself (NCR -> AT&T -> Lucent).
123 *
124 * It all started with Anders Klemets <klemets@paul.rutgers.edu>
125 * writing a WaveLAN ISA driver for the Mach microkernel. Girish
126 * Welling <welling@paul.rutgers.edu> had also worked on it.
127 * Keith Moore modified this for the PCMCIA hardware.
128 *
129 * Robert Morris <rtm@das.harvard.edu> ported these two drivers to BSDI
130 * and added specific PCMCIA support (there is currently no equivalent
131 * of the PCMCIA package under BSD).
132 *
133 * Jim Binkley <jrb@cs.pdx.edu> ported both BSDI drivers to FreeBSD.
134 *
135 * Bruce Janson <bruce@cs.usyd.edu.au> ported the BSDI ISA driver to Linux.
136 *
137 * Anthony D. Joseph <adj@lcs.mit.edu> started to modify Bruce's driver
138 * (with help of the BSDI PCMCIA driver) for PCMCIA.
139 * Yunzhou Li <yunzhou@strat.iol.unh.edu> finished this work.
140 * Joe Finney <joe@comp.lancs.ac.uk> patched the driver to start
141 * 2.00 cards correctly (2.4 GHz with frequency selection).
142 * David Hinds <dahinds@users.sourceforge.net> integrated the whole in his
143 * PCMCIA package (and bug corrections).
144 *
145 * I (Jean Tourrilhes - jt@hplb.hpl.hp.com) then started to make some
146 * patches to the PCMCIA driver. Later, I added code in the ISA driver
147 * for Wireless Extensions and full support of frequency selection
148 * cards. Then, I did the same to the PCMCIA driver, and did some
149 * reorganisation. Finally, I came back to the ISA driver to
150 * upgrade it at the same level as the PCMCIA one and reorganise
151 * the code.
152 * Loeke Brederveld <lbrederv@wavelan.com> from Lucent has given me
153 * much needed information on the WaveLAN hardware.
154 */
155
156/* The original copyrights and literature mention others' names and
157 * credits. I don't know what their part in this development was.
158 */
159
160/* By the way, for the copyright and legal stuff:
161 * almost everybody wrote code under the GNU or BSD license (or similar),
162 * and want their original copyright to remain somewhere in the
163 * code (for myself, I go with the GPL).
164 * Nobody wants to take responsibility for anything, except the fame.
165 */
166
167/* --------------------------- CREDITS --------------------------- */
168/*
169 * This software was developed as a component of the
170 * Linux operating system.
171 * It is based on other device drivers and information
172 * either written or supplied by:
173 * Ajay Bakre <bakre@paul.rutgers.edu>,
174 * Donald Becker <becker@cesdis.gsfc.nasa.gov>,
175 * Loeke Brederveld <Loeke.Brederveld@Utrecht.NCR.com>,
176 * Brent Elphick <belphick@uwaterloo.ca>,
177 * Anders Klemets <klemets@it.kth.se>,
178 * Vladimir V. Kolpakov <w@stier.koenig.ru>,
179 * Marc Meertens <Marc.Meertens@Utrecht.NCR.com>,
180 * Pauline Middelink <middelin@polyware.iaf.nl>,
181 * Robert Morris <rtm@das.harvard.edu>,
182 * Jean Tourrilhes <jt@hpl.hp.com>,
183 * Girish Welling <welling@paul.rutgers.edu>,
184 * Clark Woodworth <clark@hiway1.exit109.com>
185 * Yongguang Zhang <ygz@isl.hrl.hac.com>
186 *
187 * Thanks go also to:
188 * James Ashton <jaa101@syseng.anu.edu.au>,
189 * Alan Cox <alan@lxorguk.ukuu.org.uk>,
190 * Allan Creighton <allanc@cs.usyd.edu.au>,
191 * Matthew Geier <matthew@cs.usyd.edu.au>,
192 * Remo di Giovanni <remo@cs.usyd.edu.au>,
193 * Eckhard Grah <grah@wrcs1.urz.uni-wuppertal.de>,
194 * Vipul Gupta <vgupta@cs.binghamton.edu>,
195 * Mark Hagan <mhagan@wtcpost.daytonoh.NCR.COM>,
196 * Tim Nicholson <tim@cs.usyd.edu.au>,
197 * Ian Parkin <ian@cs.usyd.edu.au>,
198 * John Rosenberg <johnr@cs.usyd.edu.au>,
199 * George Rossi <george@phm.gov.au>,
200 * Arthur Scott <arthur@cs.usyd.edu.au>,
201 * Stanislav Sinyagin <stas@isf.ru>
202 * and Peter Storey for their assistance and advice.
203 *
204 * Additional Credits:
205 *
206 * My development has been done initially under Debian 1.1 (Linux 2.0.x)
207 * and now under Debian 2.2, initially with an HP Vectra XP/60, and now
208 * an HP Vectra XP/90.
209 *
210 */
211
212/* ------------------------- IMPROVEMENTS ------------------------- */
213/*
214 * I proudly present:
215 *
216 * Changes made in first pre-release:
217 * ----------------------------------
218 * - reorganisation of the code, function name change
219 * - creation of private header (wavelan.p.h)
220 * - reorganised debug messages
221 * - more comments, history, etc.
222 * - mmc_init: configure the PSA if not done
223 * - mmc_init: correct default value of level threshold for PCMCIA
224 * - mmc_init: 2.00 detection better code for 2.00 initialization
225 * - better info at startup
226 * - IRQ setting (note: this setting is permanent)
227 * - watchdog: change strategy (and solve module removal problems)
228 * - add wireless extensions (ioctl and get_wireless_stats)
229 * get/set nwid/frequency on fly, info for /proc/net/wireless
230 * - more wireless extensions: SETSPY and GETSPY
231 * - make wireless extensions optional
232 * - private ioctl to set/get quality and level threshold, histogram
233 * - remove /proc/net/wavelan
234 * - suppress useless stuff from lp (net_local)
235 * - kernel 2.1 support (copy_to/from_user instead of memcpy_to/fromfs)
236 * - add message level (debug stuff in /var/adm/debug and errors not
237 * displayed at console and still in /var/adm/messages)
238 * - multi device support
239 * - start fixing the probe (init code)
240 * - more inlines
241 * - man page
242 * - many other minor details and cleanups
243 *
244 * Changes made in second pre-release:
245 * -----------------------------------
246 * - clean up init code (probe and module init)
247 * - better multiple device support (module)
248 * - name assignment (module)
249 *
250 * Changes made in third pre-release:
251 * ----------------------------------
252 * - be more conservative on timers
253 * - preliminary support for multicast (I still lack some details)
254 *
255 * Changes made in fourth pre-release:
256 * -----------------------------------
257 * - multicast (revisited and finished)
258 * - avoid reset in set_multicast_list (a really big hack)
259 * if somebody could apply this code for other i82586 based drivers
260 * - share onboard memory 75% RU and 25% CU (instead of 50/50)
261 *
262 * Changes made for release in 2.1.15:
263 * -----------------------------------
264 * - change the detection code for multi manufacturer code support
265 *
266 * Changes made for release in 2.1.17:
267 * -----------------------------------
268 * - update to wireless extensions changes
269 * - silly bug in card initial configuration (psa_conf_status)
270 *
271 * Changes made for release in 2.1.27 & 2.0.30:
272 * --------------------------------------------
273 * - small bug in debug code (probably not the last one...)
274 * - remove extern keyword for wavelan_probe()
275 * - level threshold is now a standard wireless extension (version 4 !)
276 * - modules parameters types (new module interface)
277 *
278 * Changes made for release in 2.1.36:
279 * -----------------------------------
280 * - byte count stats (courtesy of David Hinds)
281 * - remove dev_tint stuff (courtesy of David Hinds)
282 * - encryption setting from Brent Elphick (thanks a lot!)
283 * - 'ioaddr' to 'u_long' for the Alpha (thanks to Stanislav Sinyagin)
284 *
285 * Other changes (not by me) :
286 * -------------------------
287 * - Spelling and gramar "rectification".
288 *
289 * Changes made for release in 2.0.37 & 2.2.2 :
290 * ------------------------------------------
291 * - Correct status in /proc/net/wireless
292 * - Set PSA CRC to make PtP diagnostic tool happy (Bob Gray)
293 * - Module init code don't fail if we found at least one card in
294 * the address list (Karlis Peisenieks)
295 * - Missing parenthesis (Christopher Peterson)
296 * - Correct i82586 configuration parameters
297 * - Encryption initialisation bug (Robert McCormack)
298 * - New mac addresses detected in the probe
299 * - Increase watchdog for busy environments
300 *
301 * Changes made for release in 2.0.38 & 2.2.7 :
302 * ------------------------------------------
303 * - Correct the reception logic to better report errors and avoid
304 * sending bogus packet up the stack
305 * - Delay RU config to avoid corrupting first received packet
306 * - Change config completion code (to actually check something)
307 * - Avoid reading out of bound in skbuf to transmit
308 * - Rectify a lot of (useless) debugging code
309 * - Change the way to `#ifdef SET_PSA_CRC'
310 *
311 * Changes made for release in 2.2.11 & 2.3.13 :
312 * -------------------------------------------
313 * - Change e-mail and web page addresses
314 * - Watchdog timer is now correctly expressed in HZ, not in jiffies
315 * - Add channel number to the list of frequencies in range
316 * - Add the (short) list of bit-rates in range
317 * - Developp a new sensitivity... (sens.value & sens.fixed)
318 *
319 * Changes made for release in 2.2.14 & 2.3.23 :
320 * -------------------------------------------
321 * - Fix check for root permission (break instead of exit)
322 * - New nwid & encoding setting (Wireless Extension 9)
323 *
324 * Changes made for release in 2.3.49 :
325 * ----------------------------------
326 * - Indentation reformating (Alan)
327 * - Update to new network API (softnet - 2.3.43) :
328 * o replace dev->tbusy (Alan)
329 * o replace dev->tstart (Alan)
330 * o remove dev->interrupt (Alan)
331 * o add SMP locking via spinlock in splxx (me)
332 * o add spinlock in interrupt handler (me)
333 * o use kernel watchdog instead of ours (me)
334 * o increase watchdog timeout (kernel is more sensitive) (me)
335 * o verify that all the changes make sense and work (me)
336 * - Fixup a potential gotcha when reconfiguring and thighten a bit
337 * the interactions with Tx queue.
338 *
339 * Changes made for release in 2.4.0 :
340 * ---------------------------------
341 * - Fix spinlock stupid bugs that I left in. The driver is now SMP
342 * compliant and doesn't lockup at startup.
343 *
344 * Changes made for release in 2.5.2 :
345 * ---------------------------------
346 * - Use new driver API for Wireless Extensions :
347 * o got rid of wavelan_ioctl()
348 * o use a bunch of iw_handler instead
349 *
350 * Changes made for release in 2.5.35 :
351 * ----------------------------------
352 * - Set dev->trans_start to avoid filling the logs
353 * - Handle better spurious/bogus interrupt
354 * - Avoid deadlocks in mmc_out()/mmc_in()
355 *
356 * Wishes & dreams:
357 * ----------------
358 * - roaming (see Pcmcia driver)
359 */
360
361/***************************** INCLUDES *****************************/
362
363#include <linux/module.h>
364
365#include <linux/kernel.h>
366#include <linux/sched.h>
367#include <linux/types.h>
368#include <linux/fcntl.h>
369#include <linux/interrupt.h>
370#include <linux/stat.h>
371#include <linux/ptrace.h>
372#include <linux/ioport.h>
373#include <linux/in.h>
374#include <linux/string.h>
375#include <linux/delay.h>
376#include <linux/bitops.h>
377#include <asm/system.h>
378#include <asm/io.h>
379#include <asm/dma.h>
380#include <asm/uaccess.h>
381#include <linux/errno.h>
382#include <linux/netdevice.h>
383#include <linux/etherdevice.h>
384#include <linux/skbuff.h>
385#include <linux/slab.h>
386#include <linux/timer.h>
387#include <linux/init.h>
388
389#include <linux/wireless.h> /* Wireless extensions */
390#include <net/iw_handler.h> /* Wireless handlers */
391
392/* WaveLAN declarations */
393#include "i82586.h"
394#include "wavelan.h"
395
396/************************** DRIVER OPTIONS **************************/
397/*
398 * `#define' or `#undef' the following constant to change the behaviour
399 * of the driver...
400 */
401#undef SET_PSA_CRC /* Calculate and set the CRC on PSA (slower) */
402#define USE_PSA_CONFIG /* Use info from the PSA. */
403#undef EEPROM_IS_PROTECTED /* doesn't seem to be necessary */
404#define MULTICAST_AVOID /* Avoid extra multicast (I'm sceptical). */
405#undef SET_MAC_ADDRESS /* Experimental */
406
407/* Warning: this stuff will slow down the driver. */
408#define WIRELESS_SPY /* Enable spying addresses. */
409#undef HISTOGRAM /* Enable histogram of signal level. */
410
411/****************************** DEBUG ******************************/
412
413#undef DEBUG_MODULE_TRACE /* module insertion/removal */
414#undef DEBUG_CALLBACK_TRACE /* calls made by Linux */
415#undef DEBUG_INTERRUPT_TRACE /* calls to handler */
416#undef DEBUG_INTERRUPT_INFO /* type of interrupt and so on */
417#define DEBUG_INTERRUPT_ERROR /* problems */
418#undef DEBUG_CONFIG_TRACE /* Trace the config functions. */
419#undef DEBUG_CONFIG_INFO /* what's going on */
420#define DEBUG_CONFIG_ERROR /* errors on configuration */
421#undef DEBUG_TX_TRACE /* transmission calls */
422#undef DEBUG_TX_INFO /* header of the transmitted packet */
423#undef DEBUG_TX_FAIL /* Normal failure conditions */
424#define DEBUG_TX_ERROR /* Unexpected conditions */
425#undef DEBUG_RX_TRACE /* transmission calls */
426#undef DEBUG_RX_INFO /* header of the received packet */
427#undef DEBUG_RX_FAIL /* Normal failure conditions */
428#define DEBUG_RX_ERROR /* Unexpected conditions */
429
430#undef DEBUG_PACKET_DUMP /* Dump packet on the screen if defined to 32. */
431#undef DEBUG_IOCTL_TRACE /* misc. call by Linux */
432#undef DEBUG_IOCTL_INFO /* various debugging info */
433#define DEBUG_IOCTL_ERROR /* what's going wrong */
434#define DEBUG_BASIC_SHOW /* Show basic startup info. */
435#undef DEBUG_VERSION_SHOW /* Print version info. */
436#undef DEBUG_PSA_SHOW /* Dump PSA to screen. */
437#undef DEBUG_MMC_SHOW /* Dump mmc to screen. */
438#undef DEBUG_SHOW_UNUSED /* Show unused fields too. */
439#undef DEBUG_I82586_SHOW /* Show i82586 status. */
440#undef DEBUG_DEVICE_SHOW /* Show device parameters. */
441
442/************************ CONSTANTS & MACROS ************************/
443
444#ifdef DEBUG_VERSION_SHOW
445static const char *version = "wavelan.c : v24 (SMP + wireless extensions) 11/12/01\n";
446#endif
447
448/* Watchdog temporisation */
449#define WATCHDOG_JIFFIES (512*HZ/100)
450
451/* ------------------------ PRIVATE IOCTL ------------------------ */
452
453#define SIOCSIPQTHR SIOCIWFIRSTPRIV /* Set quality threshold */
454#define SIOCGIPQTHR SIOCIWFIRSTPRIV + 1 /* Get quality threshold */
455
456#define SIOCSIPHISTO SIOCIWFIRSTPRIV + 2 /* Set histogram ranges */
457#define SIOCGIPHISTO SIOCIWFIRSTPRIV + 3 /* Get histogram values */
458
459/****************************** TYPES ******************************/
460
461/* Shortcuts */
462typedef struct iw_statistics iw_stats;
463typedef struct iw_quality iw_qual;
464typedef struct iw_freq iw_freq;typedef struct net_local net_local;
465typedef struct timer_list timer_list;
466
467/* Basic types */
468typedef u_char mac_addr[WAVELAN_ADDR_SIZE]; /* Hardware address */
469
470/*
471 * Static specific data for the interface.
472 *
473 * For each network interface, Linux keeps data in two structures: "device"
474 * keeps the generic data (same format for everybody) and "net_local" keeps
475 * additional specific data.
476 */
477struct net_local
478{
479 net_local * next; /* linked list of the devices */
480 struct net_device * dev; /* reverse link */
481 spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
482 int nresets; /* number of hardware resets */
483 u_char reconfig_82586; /* We need to reconfigure the controller. */
484 u_char promiscuous; /* promiscuous mode */
485 int mc_count; /* number of multicast addresses */
486 u_short hacr; /* current host interface state */
487
488 int tx_n_in_use;
489 u_short rx_head;
490 u_short rx_last;
491 u_short tx_first_free;
492 u_short tx_first_in_use;
493
494 iw_stats wstats; /* Wireless-specific statistics */
495
496 struct iw_spy_data spy_data;
497 struct iw_public_data wireless_data;
498
499#ifdef HISTOGRAM
500 int his_number; /* number of intervals */
501 u_char his_range[16]; /* boundaries of interval ]n-1; n] */
502 u_long his_sum[16]; /* sum in interval */
503#endif /* HISTOGRAM */
504};
505
506/**************************** PROTOTYPES ****************************/
507
508/* ----------------------- MISC. SUBROUTINES ------------------------ */
509static u_char
510 wv_irq_to_psa(int);
511static int
512 wv_psa_to_irq(u_char);
513/* ------------------- HOST ADAPTER SUBROUTINES ------------------- */
514static inline u_short /* data */
515 hasr_read(u_long); /* Read the host interface: base address */
516static inline void
517 hacr_write(u_long, /* Write to host interface: base address */
518 u_short), /* data */
519 hacr_write_slow(u_long,
520 u_short),
521 set_chan_attn(u_long, /* ioaddr */
522 u_short), /* hacr */
523 wv_hacr_reset(u_long), /* ioaddr */
524 wv_16_off(u_long, /* ioaddr */
525 u_short), /* hacr */
526 wv_16_on(u_long, /* ioaddr */
527 u_short), /* hacr */
528 wv_ints_off(struct net_device *),
529 wv_ints_on(struct net_device *);
530/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
531static void
532 psa_read(u_long, /* Read the Parameter Storage Area. */
533 u_short, /* hacr */
534 int, /* offset in PSA */
535 u_char *, /* buffer to fill */
536 int), /* size to read */
537 psa_write(u_long, /* Write to the PSA. */
538 u_short, /* hacr */
539 int, /* offset in PSA */
540 u_char *, /* buffer in memory */
541 int); /* length of buffer */
542static inline void
543 mmc_out(u_long, /* Write 1 byte to the Modem Manag Control. */
544 u_short,
545 u_char),
546 mmc_write(u_long, /* Write n bytes to the MMC. */
547 u_char,
548 u_char *,
549 int);
550static inline u_char /* Read 1 byte from the MMC. */
551 mmc_in(u_long,
552 u_short);
553static inline void
554 mmc_read(u_long, /* Read n bytes from the MMC. */
555 u_char,
556 u_char *,
557 int),
558 fee_wait(u_long, /* Wait for frequency EEPROM: base address */
559 int, /* base delay to wait for */
560 int); /* time to wait */
561static void
562 fee_read(u_long, /* Read the frequency EEPROM: base address */
563 u_short, /* destination offset */
564 u_short *, /* data buffer */
565 int); /* number of registers */
566/* ---------------------- I82586 SUBROUTINES ----------------------- */
567static /*inline*/ void
568 obram_read(u_long, /* ioaddr */
569 u_short, /* o */
570 u_char *, /* b */
571 int); /* n */
572static inline void
573 obram_write(u_long, /* ioaddr */
574 u_short, /* o */
575 u_char *, /* b */
576 int); /* n */
577static void
578 wv_ack(struct net_device *);
579static inline int
580 wv_synchronous_cmd(struct net_device *,
581 const char *),
582 wv_config_complete(struct net_device *,
583 u_long,
584 net_local *);
585static int
586 wv_complete(struct net_device *,
587 u_long,
588 net_local *);
589static inline void
590 wv_82586_reconfig(struct net_device *);
591/* ------------------- DEBUG & INFO SUBROUTINES ------------------- */
592#ifdef DEBUG_I82586_SHOW
593static void
594 wv_scb_show(unsigned short);
595#endif
596static inline void
597 wv_init_info(struct net_device *); /* display startup info */
598/* ------------------- IOCTL, STATS & RECONFIG ------------------- */
599static iw_stats *
600 wavelan_get_wireless_stats(struct net_device *);
601static void
602 wavelan_set_multicast_list(struct net_device *);
603/* ----------------------- PACKET RECEPTION ----------------------- */
604static inline void
605 wv_packet_read(struct net_device *, /* Read a packet from a frame. */
606 u_short,
607 int),
608 wv_receive(struct net_device *); /* Read all packets waiting. */
609/* --------------------- PACKET TRANSMISSION --------------------- */
610static inline int
611 wv_packet_write(struct net_device *, /* Write a packet to the Tx buffer. */
612 void *,
613 short);
614static netdev_tx_t
615 wavelan_packet_xmit(struct sk_buff *, /* Send a packet. */
616 struct net_device *);
617/* -------------------- HARDWARE CONFIGURATION -------------------- */
618static inline int
619 wv_mmc_init(struct net_device *), /* Initialize the modem. */
620 wv_ru_start(struct net_device *), /* Start the i82586 receiver unit. */
621 wv_cu_start(struct net_device *), /* Start the i82586 command unit. */
622 wv_82586_start(struct net_device *); /* Start the i82586. */
623static void
624 wv_82586_config(struct net_device *); /* Configure the i82586. */
625static inline void
626 wv_82586_stop(struct net_device *);
627static int
628 wv_hw_reset(struct net_device *), /* Reset the WaveLAN hardware. */
629 wv_check_ioaddr(u_long, /* ioaddr */
630 u_char *); /* mac address (read) */
631/* ---------------------- INTERRUPT HANDLING ---------------------- */
632static irqreturn_t
633 wavelan_interrupt(int, /* interrupt handler */
634 void *);
635static void
636 wavelan_watchdog(struct net_device *); /* transmission watchdog */
637/* ------------------- CONFIGURATION CALLBACKS ------------------- */
638static int
639 wavelan_open(struct net_device *), /* Open the device. */
640 wavelan_close(struct net_device *), /* Close the device. */
641 wavelan_config(struct net_device *, unsigned short);/* Configure one device. */
642extern struct net_device *wavelan_probe(int unit); /* See Space.c. */
643
644/**************************** VARIABLES ****************************/
645
646/*
647 * This is the root of the linked list of WaveLAN drivers
648 * It is use to verify that we don't reuse the same base address
649 * for two different drivers and to clean up when removing the module.
650 */
651static net_local * wavelan_list = (net_local *) NULL;
652
653/*
654 * This table is used to translate the PSA value to IRQ number
655 * and vice versa.
656 */
657static u_char irqvals[] =
658{
659 0, 0, 0, 0x01,
660 0x02, 0x04, 0, 0x08,
661 0, 0, 0x10, 0x20,
662 0x40, 0, 0, 0x80,
663};
664
665/*
666 * Table of the available I/O addresses (base addresses) for WaveLAN
667 */
668static unsigned short iobase[] =
669{
670#if 0
671 /* Leave out 0x3C0 for now -- seems to clash with some video
672 * controllers.
673 * Leave out the others too -- we will always use 0x390 and leave
674 * 0x300 for the Ethernet device.
675 * Jean II: 0x3E0 is fine as well.
676 */
677 0x300, 0x390, 0x3E0, 0x3C0
678#endif /* 0 */
679 0x390, 0x3E0
680};
681
682#ifdef MODULE
683/* Parameters set by insmod */
684static int io[4];
685static int irq[4];
686static char *name[4];
687module_param_array(io, int, NULL, 0);
688module_param_array(irq, int, NULL, 0);
689module_param_array(name, charp, NULL, 0);
690
691MODULE_PARM_DESC(io, "WaveLAN I/O base address(es),required");
692MODULE_PARM_DESC(irq, "WaveLAN IRQ number(s)");
693MODULE_PARM_DESC(name, "WaveLAN interface neme(s)");
694#endif /* MODULE */
695
696#endif /* WAVELAN_P_H */
diff --git a/drivers/net/wireless/wavelan_cs.c b/drivers/net/wireless/wavelan_cs.c
deleted file mode 100644
index 431a20ec6db6..000000000000
--- a/drivers/net/wireless/wavelan_cs.c
+++ /dev/null
@@ -1,4635 +0,0 @@
1/*
2 * Wavelan Pcmcia driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 * Original copyright follow. See wavelan_cs.p.h for details.
8 *
9 * This code is derived from Anthony D. Joseph's code and all the changes here
10 * are also under the original copyright below.
11 *
12 * This code supports version 2.00 of WaveLAN/PCMCIA cards (2.4GHz), and
13 * can work on Linux 2.0.36 with support of David Hinds' PCMCIA Card Services
14 *
15 * Joe Finney (joe@comp.lancs.ac.uk) at Lancaster University in UK added
16 * critical code in the routine to initialize the Modem Management Controller.
17 *
18 * Thanks to Alan Cox and Bruce Janson for their advice.
19 *
20 * -- Yunzhou Li (scip4166@nus.sg)
21 *
22#ifdef WAVELAN_ROAMING
23 * Roaming support added 07/22/98 by Justin Seger (jseger@media.mit.edu)
24 * based on patch by Joe Finney from Lancaster University.
25#endif
26 *
27 * Lucent (formerly AT&T GIS, formerly NCR) WaveLAN PCMCIA card: An
28 * Ethernet-like radio transceiver controlled by an Intel 82593 coprocessor.
29 *
30 * A non-shared memory PCMCIA ethernet driver for linux
31 *
32 * ISA version modified to support PCMCIA by Anthony Joseph (adj@lcs.mit.edu)
33 *
34 *
35 * Joseph O'Sullivan & John Langford (josullvn@cs.cmu.edu & jcl@cs.cmu.edu)
36 *
37 * Apr 2 '98 made changes to bring the i82593 control/int handling in line
38 * with offical specs...
39 *
40 ****************************************************************************
41 * Copyright 1995
42 * Anthony D. Joseph
43 * Massachusetts Institute of Technology
44 *
45 * Permission to use, copy, modify, and distribute this program
46 * for any purpose and without fee is hereby granted, provided
47 * that this copyright and permission notice appear on all copies
48 * and supporting documentation, the name of M.I.T. not be used
49 * in advertising or publicity pertaining to distribution of the
50 * program without specific prior permission, and notice be given
51 * in supporting documentation that copying and distribution is
52 * by permission of M.I.T. M.I.T. makes no representations about
53 * the suitability of this software for any purpose. It is pro-
54 * vided "as is" without express or implied warranty.
55 ****************************************************************************
56 *
57 */
58
59/* Do *NOT* add other headers here, you are guaranteed to be wrong - Jean II */
60#include "wavelan_cs.p.h" /* Private header */
61
62#ifdef WAVELAN_ROAMING
63static void wl_cell_expiry(unsigned long data);
64static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp);
65static void wv_nwid_filter(unsigned char mode, net_local *lp);
66#endif /* WAVELAN_ROAMING */
67
68/************************* MISC SUBROUTINES **************************/
69/*
70 * Subroutines which won't fit in one of the following category
71 * (wavelan modem or i82593)
72 */
73
74/******************* MODEM MANAGEMENT SUBROUTINES *******************/
75/*
76 * Useful subroutines to manage the modem of the wavelan
77 */
78
79/*------------------------------------------------------------------*/
80/*
81 * Read from card's Host Adaptor Status Register.
82 */
83static inline u_char
84hasr_read(u_long base)
85{
86 return(inb(HASR(base)));
87} /* hasr_read */
88
89/*------------------------------------------------------------------*/
90/*
91 * Write to card's Host Adapter Command Register.
92 */
93static inline void
94hacr_write(u_long base,
95 u_char hacr)
96{
97 outb(hacr, HACR(base));
98} /* hacr_write */
99
100/*------------------------------------------------------------------*/
101/*
102 * Write to card's Host Adapter Command Register. Include a delay for
103 * those times when it is needed.
104 */
105static void
106hacr_write_slow(u_long base,
107 u_char hacr)
108{
109 hacr_write(base, hacr);
110 /* delay might only be needed sometimes */
111 mdelay(1);
112} /* hacr_write_slow */
113
114/*------------------------------------------------------------------*/
115/*
116 * Read the Parameter Storage Area from the WaveLAN card's memory
117 */
118static void
119psa_read(struct net_device * dev,
120 int o, /* offset in PSA */
121 u_char * b, /* buffer to fill */
122 int n) /* size to read */
123{
124 net_local *lp = netdev_priv(dev);
125 u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
126
127 while(n-- > 0)
128 {
129 *b++ = readb(ptr);
130 /* Due to a lack of address decode pins, the WaveLAN PCMCIA card
131 * only supports reading even memory addresses. That means the
132 * increment here MUST be two.
133 * Because of that, we can't use memcpy_fromio()...
134 */
135 ptr += 2;
136 }
137} /* psa_read */
138
139/*------------------------------------------------------------------*/
140/*
141 * Write the Parameter Storage Area to the WaveLAN card's memory
142 */
143static void
144psa_write(struct net_device * dev,
145 int o, /* Offset in psa */
146 u_char * b, /* Buffer in memory */
147 int n) /* Length of buffer */
148{
149 net_local *lp = netdev_priv(dev);
150 u_char __iomem *ptr = lp->mem + PSA_ADDR + (o << 1);
151 int count = 0;
152 unsigned int base = dev->base_addr;
153 /* As there seem to have no flag PSA_BUSY as in the ISA model, we are
154 * oblige to verify this address to know when the PSA is ready... */
155 volatile u_char __iomem *verify = lp->mem + PSA_ADDR +
156 (psaoff(0, psa_comp_number) << 1);
157
158 /* Authorize writing to PSA */
159 hacr_write(base, HACR_PWR_STAT | HACR_ROM_WEN);
160
161 while(n-- > 0)
162 {
163 /* write to PSA */
164 writeb(*b++, ptr);
165 ptr += 2;
166
167 /* I don't have the spec, so I don't know what the correct
168 * sequence to write is. This hack seem to work for me... */
169 count = 0;
170 while((readb(verify) != PSA_COMP_PCMCIA_915) && (count++ < 100))
171 mdelay(1);
172 }
173
174 /* Put the host interface back in standard state */
175 hacr_write(base, HACR_DEFAULT);
176} /* psa_write */
177
178#ifdef SET_PSA_CRC
179/*------------------------------------------------------------------*/
180/*
181 * Calculate the PSA CRC
182 * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
183 * NOTE: By specifying a length including the CRC position the
184 * returned value should be zero. (i.e. a correct checksum in the PSA)
185 *
186 * The Windows drivers don't use the CRC, but the AP and the PtP tool
187 * depend on it.
188 */
189static u_short
190psa_crc(unsigned char * psa, /* The PSA */
191 int size) /* Number of short for CRC */
192{
193 int byte_cnt; /* Loop on the PSA */
194 u_short crc_bytes = 0; /* Data in the PSA */
195 int bit_cnt; /* Loop on the bits of the short */
196
197 for(byte_cnt = 0; byte_cnt < size; byte_cnt++ )
198 {
199 crc_bytes ^= psa[byte_cnt]; /* Its an xor */
200
201 for(bit_cnt = 1; bit_cnt < 9; bit_cnt++ )
202 {
203 if(crc_bytes & 0x0001)
204 crc_bytes = (crc_bytes >> 1) ^ 0xA001;
205 else
206 crc_bytes >>= 1 ;
207 }
208 }
209
210 return crc_bytes;
211} /* psa_crc */
212#endif /* SET_PSA_CRC */
213
214/*------------------------------------------------------------------*/
215/*
216 * update the checksum field in the Wavelan's PSA
217 */
218static void
219update_psa_checksum(struct net_device * dev)
220{
221#ifdef SET_PSA_CRC
222 psa_t psa;
223 u_short crc;
224
225 /* read the parameter storage area */
226 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
227
228 /* update the checksum */
229 crc = psa_crc((unsigned char *) &psa,
230 sizeof(psa) - sizeof(psa.psa_crc[0]) - sizeof(psa.psa_crc[1])
231 - sizeof(psa.psa_crc_status));
232
233 psa.psa_crc[0] = crc & 0xFF;
234 psa.psa_crc[1] = (crc & 0xFF00) >> 8;
235
236 /* Write it ! */
237 psa_write(dev, (char *)&psa.psa_crc - (char *)&psa,
238 (unsigned char *)&psa.psa_crc, 2);
239
240#ifdef DEBUG_IOCTL_INFO
241 printk (KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
242 dev->name, psa.psa_crc[0], psa.psa_crc[1]);
243
244 /* Check again (luxury !) */
245 crc = psa_crc((unsigned char *) &psa,
246 sizeof(psa) - sizeof(psa.psa_crc_status));
247
248 if(crc != 0)
249 printk(KERN_WARNING "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n", dev->name);
250#endif /* DEBUG_IOCTL_INFO */
251#endif /* SET_PSA_CRC */
252} /* update_psa_checksum */
253
254/*------------------------------------------------------------------*/
255/*
256 * Write 1 byte to the MMC.
257 */
258static void
259mmc_out(u_long base,
260 u_short o,
261 u_char d)
262{
263 int count = 0;
264
265 /* Wait for MMC to go idle */
266 while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
267 udelay(10);
268
269 outb((u_char)((o << 1) | MMR_MMI_WR), MMR(base));
270 outb(d, MMD(base));
271}
272
273/*------------------------------------------------------------------*/
274/*
275 * Routine to write bytes to the Modem Management Controller.
276 * We start by the end because it is the way it should be !
277 */
278static void
279mmc_write(u_long base,
280 u_char o,
281 u_char * b,
282 int n)
283{
284 o += n;
285 b += n;
286
287 while(n-- > 0 )
288 mmc_out(base, --o, *(--b));
289} /* mmc_write */
290
291/*------------------------------------------------------------------*/
292/*
293 * Read 1 byte from the MMC.
294 * Optimised version for 1 byte, avoid using memory...
295 */
296static u_char
297mmc_in(u_long base,
298 u_short o)
299{
300 int count = 0;
301
302 while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
303 udelay(10);
304 outb(o << 1, MMR(base)); /* Set the read address */
305
306 outb(0, MMD(base)); /* Required dummy write */
307
308 while((count++ < 100) && (inb(HASR(base)) & HASR_MMI_BUSY))
309 udelay(10);
310 return (u_char) (inb(MMD(base))); /* Now do the actual read */
311}
312
313/*------------------------------------------------------------------*/
314/*
315 * Routine to read bytes from the Modem Management Controller.
316 * The implementation is complicated by a lack of address lines,
317 * which prevents decoding of the low-order bit.
318 * (code has just been moved in the above function)
319 * We start by the end because it is the way it should be !
320 */
321static void
322mmc_read(u_long base,
323 u_char o,
324 u_char * b,
325 int n)
326{
327 o += n;
328 b += n;
329
330 while(n-- > 0)
331 *(--b) = mmc_in(base, --o);
332} /* mmc_read */
333
334/*------------------------------------------------------------------*/
335/*
336 * Get the type of encryption available...
337 */
338static inline int
339mmc_encr(u_long base) /* i/o port of the card */
340{
341 int temp;
342
343 temp = mmc_in(base, mmroff(0, mmr_des_avail));
344 if((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
345 return 0;
346 else
347 return temp;
348}
349
350/*------------------------------------------------------------------*/
351/*
352 * Wait for the frequency EEprom to complete a command...
353 */
354static void
355fee_wait(u_long base, /* i/o port of the card */
356 int delay, /* Base delay to wait for */
357 int number) /* Number of time to wait */
358{
359 int count = 0; /* Wait only a limited time */
360
361 while((count++ < number) &&
362 (mmc_in(base, mmroff(0, mmr_fee_status)) & MMR_FEE_STATUS_BUSY))
363 udelay(delay);
364}
365
366/*------------------------------------------------------------------*/
367/*
368 * Read bytes from the Frequency EEprom (frequency select cards).
369 */
370static void
371fee_read(u_long base, /* i/o port of the card */
372 u_short o, /* destination offset */
373 u_short * b, /* data buffer */
374 int n) /* number of registers */
375{
376 b += n; /* Position at the end of the area */
377
378 /* Write the address */
379 mmc_out(base, mmwoff(0, mmw_fee_addr), o + n - 1);
380
381 /* Loop on all buffer */
382 while(n-- > 0)
383 {
384 /* Write the read command */
385 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_READ);
386
387 /* Wait until EEprom is ready (should be quick !) */
388 fee_wait(base, 10, 100);
389
390 /* Read the value */
391 *--b = ((mmc_in(base, mmroff(0, mmr_fee_data_h)) << 8) |
392 mmc_in(base, mmroff(0, mmr_fee_data_l)));
393 }
394}
395
396
397/*------------------------------------------------------------------*/
398/*
399 * Write bytes from the Frequency EEprom (frequency select cards).
400 * This is a bit complicated, because the frequency eeprom has to
401 * be unprotected and the write enabled.
402 * Jean II
403 */
404static void
405fee_write(u_long base, /* i/o port of the card */
406 u_short o, /* destination offset */
407 u_short * b, /* data buffer */
408 int n) /* number of registers */
409{
410 b += n; /* Position at the end of the area */
411
412#ifdef EEPROM_IS_PROTECTED /* disabled */
413#ifdef DOESNT_SEEM_TO_WORK /* disabled */
414 /* Ask to read the protected register */
415 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
416
417 fee_wait(base, 10, 100);
418
419 /* Read the protected register */
420 printk("Protected 2 : %02X-%02X\n",
421 mmc_in(base, mmroff(0, mmr_fee_data_h)),
422 mmc_in(base, mmroff(0, mmr_fee_data_l)));
423#endif /* DOESNT_SEEM_TO_WORK */
424
425 /* Enable protected register */
426 mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
427 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
428
429 fee_wait(base, 10, 100);
430
431 /* Unprotect area */
432 mmc_out(base, mmwoff(0, mmw_fee_addr), o + n);
433 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
434#ifdef DOESNT_SEEM_TO_WORK /* disabled */
435 /* Or use : */
436 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
437#endif /* DOESNT_SEEM_TO_WORK */
438
439 fee_wait(base, 10, 100);
440#endif /* EEPROM_IS_PROTECTED */
441
442 /* Write enable */
443 mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
444 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
445
446 fee_wait(base, 10, 100);
447
448 /* Write the EEprom address */
449 mmc_out(base, mmwoff(0, mmw_fee_addr), o + n - 1);
450
451 /* Loop on all buffer */
452 while(n-- > 0)
453 {
454 /* Write the value */
455 mmc_out(base, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
456 mmc_out(base, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
457
458 /* Write the write command */
459 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WRITE);
460
461 /* Wavelan doc says : wait at least 10 ms for EEBUSY = 0 */
462 mdelay(10);
463 fee_wait(base, 10, 100);
464 }
465
466 /* Write disable */
467 mmc_out(base, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
468 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
469
470 fee_wait(base, 10, 100);
471
472#ifdef EEPROM_IS_PROTECTED /* disabled */
473 /* Reprotect EEprom */
474 mmc_out(base, mmwoff(0, mmw_fee_addr), 0x00);
475 mmc_out(base, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
476
477 fee_wait(base, 10, 100);
478#endif /* EEPROM_IS_PROTECTED */
479}
480
481/******************* WaveLAN Roaming routines... ********************/
482
483#ifdef WAVELAN_ROAMING /* Conditional compile, see wavelan_cs.h */
484
485static unsigned char WAVELAN_BEACON_ADDRESS[] = {0x09,0x00,0x0e,0x20,0x03,0x00};
486
487static void wv_roam_init(struct net_device *dev)
488{
489 net_local *lp= netdev_priv(dev);
490
491 /* Do not remove this unless you have a good reason */
492 printk(KERN_NOTICE "%s: Warning, you have enabled roaming on"
493 " device %s !\n", dev->name, dev->name);
494 printk(KERN_NOTICE "Roaming is currently an experimental unsupported feature"
495 " of the Wavelan driver.\n");
496 printk(KERN_NOTICE "It may work, but may also make the driver behave in"
497 " erratic ways or crash.\n");
498
499 lp->wavepoint_table.head=NULL; /* Initialise WavePoint table */
500 lp->wavepoint_table.num_wavepoints=0;
501 lp->wavepoint_table.locked=0;
502 lp->curr_point=NULL; /* No default WavePoint */
503 lp->cell_search=0;
504
505 lp->cell_timer.data=(long)lp; /* Start cell expiry timer */
506 lp->cell_timer.function=wl_cell_expiry;
507 lp->cell_timer.expires=jiffies+CELL_TIMEOUT;
508 add_timer(&lp->cell_timer);
509
510 wv_nwid_filter(NWID_PROMISC,lp) ; /* Enter NWID promiscuous mode */
511 /* to build up a good WavePoint */
512 /* table... */
513 printk(KERN_DEBUG "WaveLAN: Roaming enabled on device %s\n",dev->name);
514}
515
516static void wv_roam_cleanup(struct net_device *dev)
517{
518 wavepoint_history *ptr,*old_ptr;
519 net_local *lp= netdev_priv(dev);
520
521 printk(KERN_DEBUG "WaveLAN: Roaming Disabled on device %s\n",dev->name);
522
523 /* Fixme : maybe we should check that the timer exist before deleting it */
524 del_timer(&lp->cell_timer); /* Remove cell expiry timer */
525 ptr=lp->wavepoint_table.head; /* Clear device's WavePoint table */
526 while(ptr!=NULL)
527 {
528 old_ptr=ptr;
529 ptr=ptr->next;
530 wl_del_wavepoint(old_ptr,lp);
531 }
532}
533
534/* Enable/Disable NWID promiscuous mode on a given device */
535static void wv_nwid_filter(unsigned char mode, net_local *lp)
536{
537 mm_t m;
538 unsigned long flags;
539
540#ifdef WAVELAN_ROAMING_DEBUG
541 printk(KERN_DEBUG "WaveLAN: NWID promisc %s, device %s\n",(mode==NWID_PROMISC) ? "on" : "off", lp->dev->name);
542#endif
543
544 /* Disable interrupts & save flags */
545 spin_lock_irqsave(&lp->spinlock, flags);
546
547 m.w.mmw_loopt_sel = (mode==NWID_PROMISC) ? MMW_LOOPT_SEL_DIS_NWID : 0x00;
548 mmc_write(lp->dev->base_addr, (char *)&m.w.mmw_loopt_sel - (char *)&m, (unsigned char *)&m.w.mmw_loopt_sel, 1);
549
550 if(mode==NWID_PROMISC)
551 lp->cell_search=1;
552 else
553 lp->cell_search=0;
554
555 /* ReEnable interrupts & restore flags */
556 spin_unlock_irqrestore(&lp->spinlock, flags);
557}
558
559/* Find a record in the WavePoint table matching a given NWID */
560static wavepoint_history *wl_roam_check(unsigned short nwid, net_local *lp)
561{
562 wavepoint_history *ptr=lp->wavepoint_table.head;
563
564 while(ptr!=NULL){
565 if(ptr->nwid==nwid)
566 return ptr;
567 ptr=ptr->next;
568 }
569 return NULL;
570}
571
572/* Create a new wavepoint table entry */
573static wavepoint_history *wl_new_wavepoint(unsigned short nwid, unsigned char seq, net_local* lp)
574{
575 wavepoint_history *new_wavepoint;
576
577#ifdef WAVELAN_ROAMING_DEBUG
578 printk(KERN_DEBUG "WaveLAN: New Wavepoint, NWID:%.4X\n",nwid);
579#endif
580
581 if(lp->wavepoint_table.num_wavepoints==MAX_WAVEPOINTS)
582 return NULL;
583
584 new_wavepoint = kmalloc(sizeof(wavepoint_history),GFP_ATOMIC);
585 if(new_wavepoint==NULL)
586 return NULL;
587
588 new_wavepoint->nwid=nwid; /* New WavePoints NWID */
589 new_wavepoint->average_fast=0; /* Running Averages..*/
590 new_wavepoint->average_slow=0;
591 new_wavepoint->qualptr=0; /* Start of ringbuffer */
592 new_wavepoint->last_seq=seq-1; /* Last sequence no.seen */
593 memset(new_wavepoint->sigqual,0,WAVEPOINT_HISTORY);/* Empty ringbuffer */
594
595 new_wavepoint->next=lp->wavepoint_table.head;/* Add to wavepoint table */
596 new_wavepoint->prev=NULL;
597
598 if(lp->wavepoint_table.head!=NULL)
599 lp->wavepoint_table.head->prev=new_wavepoint;
600
601 lp->wavepoint_table.head=new_wavepoint;
602
603 lp->wavepoint_table.num_wavepoints++; /* no. of visible wavepoints */
604
605 return new_wavepoint;
606}
607
608/* Remove a wavepoint entry from WavePoint table */
609static void wl_del_wavepoint(wavepoint_history *wavepoint, struct net_local *lp)
610{
611 if(wavepoint==NULL)
612 return;
613
614 if(lp->curr_point==wavepoint)
615 lp->curr_point=NULL;
616
617 if(wavepoint->prev!=NULL)
618 wavepoint->prev->next=wavepoint->next;
619
620 if(wavepoint->next!=NULL)
621 wavepoint->next->prev=wavepoint->prev;
622
623 if(lp->wavepoint_table.head==wavepoint)
624 lp->wavepoint_table.head=wavepoint->next;
625
626 lp->wavepoint_table.num_wavepoints--;
627 kfree(wavepoint);
628}
629
630/* Timer callback function - checks WavePoint table for stale entries */
631static void wl_cell_expiry(unsigned long data)
632{
633 net_local *lp=(net_local *)data;
634 wavepoint_history *wavepoint=lp->wavepoint_table.head,*old_point;
635
636#if WAVELAN_ROAMING_DEBUG > 1
637 printk(KERN_DEBUG "WaveLAN: Wavepoint timeout, dev %s\n",lp->dev->name);
638#endif
639
640 if(lp->wavepoint_table.locked)
641 {
642#if WAVELAN_ROAMING_DEBUG > 1
643 printk(KERN_DEBUG "WaveLAN: Wavepoint table locked...\n");
644#endif
645
646 lp->cell_timer.expires=jiffies+1; /* If table in use, come back later */
647 add_timer(&lp->cell_timer);
648 return;
649 }
650
651 while(wavepoint!=NULL)
652 {
653 if(time_after(jiffies, wavepoint->last_seen + CELL_TIMEOUT))
654 {
655#ifdef WAVELAN_ROAMING_DEBUG
656 printk(KERN_DEBUG "WaveLAN: Bye bye %.4X\n",wavepoint->nwid);
657#endif
658
659 old_point=wavepoint;
660 wavepoint=wavepoint->next;
661 wl_del_wavepoint(old_point,lp);
662 }
663 else
664 wavepoint=wavepoint->next;
665 }
666 lp->cell_timer.expires=jiffies+CELL_TIMEOUT;
667 add_timer(&lp->cell_timer);
668}
669
670/* Update SNR history of a wavepoint */
671static void wl_update_history(wavepoint_history *wavepoint, unsigned char sigqual, unsigned char seq)
672{
673 int i=0,num_missed=0,ptr=0;
674 int average_fast=0,average_slow=0;
675
676 num_missed=(seq-wavepoint->last_seq)%WAVEPOINT_HISTORY;/* Have we missed
677 any beacons? */
678 if(num_missed)
679 for(i=0;i<num_missed;i++)
680 {
681 wavepoint->sigqual[wavepoint->qualptr++]=0; /* If so, enter them as 0's */
682 wavepoint->qualptr %=WAVEPOINT_HISTORY; /* in the ringbuffer. */
683 }
684 wavepoint->last_seen=jiffies; /* Add beacon to history */
685 wavepoint->last_seq=seq;
686 wavepoint->sigqual[wavepoint->qualptr++]=sigqual;
687 wavepoint->qualptr %=WAVEPOINT_HISTORY;
688 ptr=(wavepoint->qualptr-WAVEPOINT_FAST_HISTORY+WAVEPOINT_HISTORY)%WAVEPOINT_HISTORY;
689
690 for(i=0;i<WAVEPOINT_FAST_HISTORY;i++) /* Update running averages */
691 {
692 average_fast+=wavepoint->sigqual[ptr++];
693 ptr %=WAVEPOINT_HISTORY;
694 }
695
696 average_slow=average_fast;
697 for(i=WAVEPOINT_FAST_HISTORY;i<WAVEPOINT_HISTORY;i++)
698 {
699 average_slow+=wavepoint->sigqual[ptr++];
700 ptr %=WAVEPOINT_HISTORY;
701 }
702
703 wavepoint->average_fast=average_fast/WAVEPOINT_FAST_HISTORY;
704 wavepoint->average_slow=average_slow/WAVEPOINT_HISTORY;
705}
706
707/* Perform a handover to a new WavePoint */
708static void wv_roam_handover(wavepoint_history *wavepoint, net_local *lp)
709{
710 unsigned int base = lp->dev->base_addr;
711 mm_t m;
712 unsigned long flags;
713
714 if(wavepoint==lp->curr_point) /* Sanity check... */
715 {
716 wv_nwid_filter(!NWID_PROMISC,lp);
717 return;
718 }
719
720#ifdef WAVELAN_ROAMING_DEBUG
721 printk(KERN_DEBUG "WaveLAN: Doing handover to %.4X, dev %s\n",wavepoint->nwid,lp->dev->name);
722#endif
723
724 /* Disable interrupts & save flags */
725 spin_lock_irqsave(&lp->spinlock, flags);
726
727 m.w.mmw_netw_id_l = wavepoint->nwid & 0xFF;
728 m.w.mmw_netw_id_h = (wavepoint->nwid & 0xFF00) >> 8;
729
730 mmc_write(base, (char *)&m.w.mmw_netw_id_l - (char *)&m, (unsigned char *)&m.w.mmw_netw_id_l, 2);
731
732 /* ReEnable interrupts & restore flags */
733 spin_unlock_irqrestore(&lp->spinlock, flags);
734
735 wv_nwid_filter(!NWID_PROMISC,lp);
736 lp->curr_point=wavepoint;
737}
738
739/* Called when a WavePoint beacon is received */
740static void wl_roam_gather(struct net_device * dev,
741 u_char * hdr, /* Beacon header */
742 u_char * stats) /* SNR, Signal quality
743 of packet */
744{
745 wavepoint_beacon *beacon= (wavepoint_beacon *)hdr; /* Rcvd. Beacon */
746 unsigned short nwid=ntohs(beacon->nwid);
747 unsigned short sigqual=stats[2] & MMR_SGNL_QUAL; /* SNR of beacon */
748 wavepoint_history *wavepoint=NULL; /* WavePoint table entry */
749 net_local *lp = netdev_priv(dev); /* Device info */
750
751#ifdef I_NEED_THIS_FEATURE
752 /* Some people don't need this, some other may need it */
753 nwid=nwid^ntohs(beacon->domain_id);
754#endif
755
756#if WAVELAN_ROAMING_DEBUG > 1
757 printk(KERN_DEBUG "WaveLAN: beacon, dev %s:\n",dev->name);
758 printk(KERN_DEBUG "Domain: %.4X NWID: %.4X SigQual=%d\n",ntohs(beacon->domain_id),nwid,sigqual);
759#endif
760
761 lp->wavepoint_table.locked=1; /* <Mutex> */
762
763 wavepoint=wl_roam_check(nwid,lp); /* Find WavePoint table entry */
764 if(wavepoint==NULL) /* If no entry, Create a new one... */
765 {
766 wavepoint=wl_new_wavepoint(nwid,beacon->seq,lp);
767 if(wavepoint==NULL)
768 goto out;
769 }
770 if(lp->curr_point==NULL) /* If this is the only WavePoint, */
771 wv_roam_handover(wavepoint, lp); /* Jump on it! */
772
773 wl_update_history(wavepoint, sigqual, beacon->seq); /* Update SNR history
774 stats. */
775
776 if(lp->curr_point->average_slow < SEARCH_THRESH_LOW) /* If our current */
777 if(!lp->cell_search) /* WavePoint is getting faint, */
778 wv_nwid_filter(NWID_PROMISC,lp); /* start looking for a new one */
779
780 if(wavepoint->average_slow >
781 lp->curr_point->average_slow + WAVELAN_ROAMING_DELTA)
782 wv_roam_handover(wavepoint, lp); /* Handover to a better WavePoint */
783
784 if(lp->curr_point->average_slow > SEARCH_THRESH_HIGH) /* If our SNR is */
785 if(lp->cell_search) /* getting better, drop out of cell search mode */
786 wv_nwid_filter(!NWID_PROMISC,lp);
787
788out:
789 lp->wavepoint_table.locked=0; /* </MUTEX> :-) */
790}
791
792/* Test this MAC frame a WavePoint beacon */
793static inline int WAVELAN_BEACON(unsigned char *data)
794{
795 wavepoint_beacon *beacon= (wavepoint_beacon *)data;
796 static const wavepoint_beacon beacon_template={0xaa,0xaa,0x03,0x08,0x00,0x0e,0x20,0x03,0x00};
797
798 if(memcmp(beacon,&beacon_template,9)==0)
799 return 1;
800 else
801 return 0;
802}
803#endif /* WAVELAN_ROAMING */
804
805/************************ I82593 SUBROUTINES *************************/
806/*
807 * Useful subroutines to manage the Ethernet controller
808 */
809
810/*------------------------------------------------------------------*/
811/*
812 * Routine to synchronously send a command to the i82593 chip.
813 * Should be called with interrupts disabled.
814 * (called by wv_packet_write(), wv_ru_stop(), wv_ru_start(),
815 * wv_82593_config() & wv_diag())
816 */
817static int
818wv_82593_cmd(struct net_device * dev,
819 char * str,
820 int cmd,
821 int result)
822{
823 unsigned int base = dev->base_addr;
824 int status;
825 int wait_completed;
826 long spin;
827
828 /* Spin until the chip finishes executing its current command (if any) */
829 spin = 1000;
830 do
831 {
832 /* Time calibration of the loop */
833 udelay(10);
834
835 /* Read the interrupt register */
836 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
837 status = inb(LCSR(base));
838 }
839 while(((status & SR3_EXEC_STATE_MASK) != SR3_EXEC_IDLE) && (spin-- > 0));
840
841 /* If the interrupt hasn't been posted */
842 if (spin < 0) {
843#ifdef DEBUG_INTERRUPT_ERROR
844 printk(KERN_INFO "wv_82593_cmd: %s timeout (previous command), status 0x%02x\n",
845 str, status);
846#endif
847 return(FALSE);
848 }
849
850 /* Issue the command to the controller */
851 outb(cmd, LCCR(base));
852
853 /* If we don't have to check the result of the command
854 * Note : this mean that the irq handler will deal with that */
855 if(result == SR0_NO_RESULT)
856 return(TRUE);
857
858 /* We are waiting for command completion */
859 wait_completed = TRUE;
860
861 /* Busy wait while the LAN controller executes the command. */
862 spin = 1000;
863 do
864 {
865 /* Time calibration of the loop */
866 udelay(10);
867
868 /* Read the interrupt register */
869 outb(CR0_STATUS_0 | OP0_NOP, LCCR(base));
870 status = inb(LCSR(base));
871
872 /* Check if there was an interrupt posted */
873 if((status & SR0_INTERRUPT))
874 {
875 /* Acknowledge the interrupt */
876 outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
877
878 /* Check if interrupt is a command completion */
879 if(((status & SR0_BOTH_RX_TX) != SR0_BOTH_RX_TX) &&
880 ((status & SR0_BOTH_RX_TX) != 0x0) &&
881 !(status & SR0_RECEPTION))
882 {
883 /* Signal command completion */
884 wait_completed = FALSE;
885 }
886 else
887 {
888 /* Note : Rx interrupts will be handled later, because we can
889 * handle multiple Rx packets at once */
890#ifdef DEBUG_INTERRUPT_INFO
891 printk(KERN_INFO "wv_82593_cmd: not our interrupt\n");
892#endif
893 }
894 }
895 }
896 while(wait_completed && (spin-- > 0));
897
898 /* If the interrupt hasn't be posted */
899 if(wait_completed)
900 {
901#ifdef DEBUG_INTERRUPT_ERROR
902 printk(KERN_INFO "wv_82593_cmd: %s timeout, status 0x%02x\n",
903 str, status);
904#endif
905 return(FALSE);
906 }
907
908 /* Check the return code returned by the card (see above) against
909 * the expected return code provided by the caller */
910 if((status & SR0_EVENT_MASK) != result)
911 {
912#ifdef DEBUG_INTERRUPT_ERROR
913 printk(KERN_INFO "wv_82593_cmd: %s failed, status = 0x%x\n",
914 str, status);
915#endif
916 return(FALSE);
917 }
918
919 return(TRUE);
920} /* wv_82593_cmd */
921
922/*------------------------------------------------------------------*/
923/*
924 * This routine does a 593 op-code number 7, and obtains the diagnose
925 * status for the WaveLAN.
926 */
927static inline int
928wv_diag(struct net_device * dev)
929{
930 return(wv_82593_cmd(dev, "wv_diag(): diagnose",
931 OP0_DIAGNOSE, SR0_DIAGNOSE_PASSED));
932} /* wv_diag */
933
934/*------------------------------------------------------------------*/
935/*
936 * Routine to read len bytes from the i82593's ring buffer, starting at
937 * chip address addr. The results read from the chip are stored in buf.
938 * The return value is the address to use for next the call.
939 */
940static int
941read_ringbuf(struct net_device * dev,
942 int addr,
943 char * buf,
944 int len)
945{
946 unsigned int base = dev->base_addr;
947 int ring_ptr = addr;
948 int chunk_len;
949 char * buf_ptr = buf;
950
951 /* Get all the buffer */
952 while(len > 0)
953 {
954 /* Position the Program I/O Register at the ring buffer pointer */
955 outb(ring_ptr & 0xff, PIORL(base));
956 outb(((ring_ptr >> 8) & PIORH_MASK), PIORH(base));
957
958 /* First, determine how much we can read without wrapping around the
959 ring buffer */
960 if((addr + len) < (RX_BASE + RX_SIZE))
961 chunk_len = len;
962 else
963 chunk_len = RX_BASE + RX_SIZE - addr;
964 insb(PIOP(base), buf_ptr, chunk_len);
965 buf_ptr += chunk_len;
966 len -= chunk_len;
967 ring_ptr = (ring_ptr - RX_BASE + chunk_len) % RX_SIZE + RX_BASE;
968 }
969 return(ring_ptr);
970} /* read_ringbuf */
971
972/*------------------------------------------------------------------*/
973/*
974 * Reconfigure the i82593, or at least ask for it...
975 * Because wv_82593_config use the transmission buffer, we must do it
976 * when we are sure that there is no transmission, so we do it now
977 * or in wavelan_packet_xmit() (I can't find any better place,
978 * wavelan_interrupt is not an option...), so you may experience
979 * some delay sometime...
980 */
981static void
982wv_82593_reconfig(struct net_device * dev)
983{
984 net_local * lp = netdev_priv(dev);
985 struct pcmcia_device * link = lp->link;
986 unsigned long flags;
987
988 /* Arm the flag, will be cleard in wv_82593_config() */
989 lp->reconfig_82593 = TRUE;
990
991 /* Check if we can do it now ! */
992 if((link->open) && (netif_running(dev)) && !(netif_queue_stopped(dev)))
993 {
994 spin_lock_irqsave(&lp->spinlock, flags); /* Disable interrupts */
995 wv_82593_config(dev);
996 spin_unlock_irqrestore(&lp->spinlock, flags); /* Re-enable interrupts */
997 }
998 else
999 {
1000#ifdef DEBUG_IOCTL_INFO
1001 printk(KERN_DEBUG
1002 "%s: wv_82593_reconfig(): delayed (state = %lX, link = %d)\n",
1003 dev->name, dev->state, link->open);
1004#endif
1005 }
1006}
1007
1008/********************* DEBUG & INFO SUBROUTINES *********************/
1009/*
1010 * This routines are used in the code to show debug informations.
1011 * Most of the time, it dump the content of hardware structures...
1012 */
1013
1014#ifdef DEBUG_PSA_SHOW
1015/*------------------------------------------------------------------*/
1016/*
1017 * Print the formatted contents of the Parameter Storage Area.
1018 */
1019static void
1020wv_psa_show(psa_t * p)
1021{
1022 printk(KERN_DEBUG "##### wavelan psa contents: #####\n");
1023 printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
1024 p->psa_io_base_addr_1,
1025 p->psa_io_base_addr_2,
1026 p->psa_io_base_addr_3,
1027 p->psa_io_base_addr_4);
1028 printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
1029 p->psa_rem_boot_addr_1,
1030 p->psa_rem_boot_addr_2,
1031 p->psa_rem_boot_addr_3);
1032 printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
1033 printk("psa_int_req_no: %d\n", p->psa_int_req_no);
1034#ifdef DEBUG_SHOW_UNUSED
1035 printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
1036#endif /* DEBUG_SHOW_UNUSED */
1037 printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
1038 printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
1039 printk(KERN_DEBUG "psa_univ_local_sel: %d, ", p->psa_univ_local_sel);
1040 printk("psa_comp_number: %d, ", p->psa_comp_number);
1041 printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
1042 printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
1043 p->psa_feature_select);
1044 printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
1045 printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
1046 printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
1047 printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0], p->psa_nwid[1]);
1048 printk("psa_nwid_select: %d\n", p->psa_nwid_select);
1049 printk(KERN_DEBUG "psa_encryption_select: %d, ", p->psa_encryption_select);
1050 printk("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
1051 p->psa_encryption_key[0],
1052 p->psa_encryption_key[1],
1053 p->psa_encryption_key[2],
1054 p->psa_encryption_key[3],
1055 p->psa_encryption_key[4],
1056 p->psa_encryption_key[5],
1057 p->psa_encryption_key[6],
1058 p->psa_encryption_key[7]);
1059 printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
1060 printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
1061 p->psa_call_code[0]);
1062 printk("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
1063 p->psa_call_code[0],
1064 p->psa_call_code[1],
1065 p->psa_call_code[2],
1066 p->psa_call_code[3],
1067 p->psa_call_code[4],
1068 p->psa_call_code[5],
1069 p->psa_call_code[6],
1070 p->psa_call_code[7]);
1071#ifdef DEBUG_SHOW_UNUSED
1072 printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
1073 p->psa_reserved[0],
1074 p->psa_reserved[1]);
1075#endif /* DEBUG_SHOW_UNUSED */
1076 printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
1077 printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
1078 printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
1079} /* wv_psa_show */
1080#endif /* DEBUG_PSA_SHOW */
1081
1082#ifdef DEBUG_MMC_SHOW
1083/*------------------------------------------------------------------*/
1084/*
1085 * Print the formatted status of the Modem Management Controller.
1086 * This function need to be completed...
1087 */
1088static void
1089wv_mmc_show(struct net_device * dev)
1090{
1091 unsigned int base = dev->base_addr;
1092 net_local * lp = netdev_priv(dev);
1093 mmr_t m;
1094
1095 /* Basic check */
1096 if(hasr_read(base) & HASR_NO_CLK)
1097 {
1098 printk(KERN_WARNING "%s: wv_mmc_show: modem not connected\n",
1099 dev->name);
1100 return;
1101 }
1102
1103 spin_lock_irqsave(&lp->spinlock, flags);
1104
1105 /* Read the mmc */
1106 mmc_out(base, mmwoff(0, mmw_freeze), 1);
1107 mmc_read(base, 0, (u_char *)&m, sizeof(m));
1108 mmc_out(base, mmwoff(0, mmw_freeze), 0);
1109
1110 /* Don't forget to update statistics */
1111 lp->wstats.discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
1112
1113 spin_unlock_irqrestore(&lp->spinlock, flags);
1114
1115 printk(KERN_DEBUG "##### wavelan modem status registers: #####\n");
1116#ifdef DEBUG_SHOW_UNUSED
1117 printk(KERN_DEBUG "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
1118 m.mmr_unused0[0],
1119 m.mmr_unused0[1],
1120 m.mmr_unused0[2],
1121 m.mmr_unused0[3],
1122 m.mmr_unused0[4],
1123 m.mmr_unused0[5],
1124 m.mmr_unused0[6],
1125 m.mmr_unused0[7]);
1126#endif /* DEBUG_SHOW_UNUSED */
1127 printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
1128 m.mmr_des_avail, m.mmr_des_status);
1129#ifdef DEBUG_SHOW_UNUSED
1130 printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
1131 m.mmr_unused1[0],
1132 m.mmr_unused1[1],
1133 m.mmr_unused1[2],
1134 m.mmr_unused1[3],
1135 m.mmr_unused1[4]);
1136#endif /* DEBUG_SHOW_UNUSED */
1137 printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
1138 m.mmr_dce_status,
1139 (m.mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ? "energy detected,":"",
1140 (m.mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
1141 "loop test indicated," : "",
1142 (m.mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ? "transmitter on," : "",
1143 (m.mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
1144 "jabber timer expired," : "");
1145 printk(KERN_DEBUG "Dsp ID: %02X\n",
1146 m.mmr_dsp_id);
1147#ifdef DEBUG_SHOW_UNUSED
1148 printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
1149 m.mmr_unused2[0],
1150 m.mmr_unused2[1]);
1151#endif /* DEBUG_SHOW_UNUSED */
1152 printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
1153 (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
1154 (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
1155 printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
1156 m.mmr_thr_pre_set & MMR_THR_PRE_SET,
1157 (m.mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" : "below");
1158 printk(KERN_DEBUG "signal_lvl: %d [%s], ",
1159 m.mmr_signal_lvl & MMR_SIGNAL_LVL,
1160 (m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" : "no new msg");
1161 printk("silence_lvl: %d [%s], ", m.mmr_silence_lvl & MMR_SILENCE_LVL,
1162 (m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" : "no new update");
1163 printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
1164 (m.mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" : "Antenna 0");
1165#ifdef DEBUG_SHOW_UNUSED
1166 printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
1167#endif /* DEBUG_SHOW_UNUSED */
1168} /* wv_mmc_show */
1169#endif /* DEBUG_MMC_SHOW */
1170
1171#ifdef DEBUG_I82593_SHOW
1172/*------------------------------------------------------------------*/
1173/*
1174 * Print the formatted status of the i82593's receive unit.
1175 */
1176static void
1177wv_ru_show(struct net_device * dev)
1178{
1179 net_local *lp = netdev_priv(dev);
1180
1181 printk(KERN_DEBUG "##### wavelan i82593 receiver status: #####\n");
1182 printk(KERN_DEBUG "ru: rfp %d stop %d", lp->rfp, lp->stop);
1183 /*
1184 * Not implemented yet...
1185 */
1186 printk("\n");
1187} /* wv_ru_show */
1188#endif /* DEBUG_I82593_SHOW */
1189
1190#ifdef DEBUG_DEVICE_SHOW
1191/*------------------------------------------------------------------*/
1192/*
1193 * Print the formatted status of the WaveLAN PCMCIA device driver.
1194 */
1195static void
1196wv_dev_show(struct net_device * dev)
1197{
1198 printk(KERN_DEBUG "dev:");
1199 printk(" state=%lX,", dev->state);
1200 printk(" trans_start=%ld,", dev->trans_start);
1201 printk(" flags=0x%x,", dev->flags);
1202 printk("\n");
1203} /* wv_dev_show */
1204
1205/*------------------------------------------------------------------*/
1206/*
1207 * Print the formatted status of the WaveLAN PCMCIA device driver's
1208 * private information.
1209 */
1210static void
1211wv_local_show(struct net_device * dev)
1212{
1213 net_local *lp = netdev_priv(dev);
1214
1215 printk(KERN_DEBUG "local:");
1216 /*
1217 * Not implemented yet...
1218 */
1219 printk("\n");
1220} /* wv_local_show */
1221#endif /* DEBUG_DEVICE_SHOW */
1222
1223#if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
1224/*------------------------------------------------------------------*/
1225/*
1226 * Dump packet header (and content if necessary) on the screen
1227 */
1228static void
1229wv_packet_info(u_char * p, /* Packet to dump */
1230 int length, /* Length of the packet */
1231 char * msg1, /* Name of the device */
1232 char * msg2) /* Name of the function */
1233{
1234 int i;
1235 int maxi;
1236
1237 printk(KERN_DEBUG "%s: %s(): dest %pM, length %d\n",
1238 msg1, msg2, p, length);
1239 printk(KERN_DEBUG "%s: %s(): src %pM, type 0x%02X%02X\n",
1240 msg1, msg2, &p[6], p[12], p[13]);
1241
1242#ifdef DEBUG_PACKET_DUMP
1243
1244 printk(KERN_DEBUG "data=\"");
1245
1246 if((maxi = length) > DEBUG_PACKET_DUMP)
1247 maxi = DEBUG_PACKET_DUMP;
1248 for(i = 14; i < maxi; i++)
1249 if(p[i] >= ' ' && p[i] <= '~')
1250 printk(" %c", p[i]);
1251 else
1252 printk("%02X", p[i]);
1253 if(maxi < length)
1254 printk("..");
1255 printk("\"\n");
1256 printk(KERN_DEBUG "\n");
1257#endif /* DEBUG_PACKET_DUMP */
1258}
1259#endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
1260
1261/*------------------------------------------------------------------*/
1262/*
1263 * This is the information which is displayed by the driver at startup
1264 * There is a lot of flag to configure it at your will...
1265 */
1266static void
1267wv_init_info(struct net_device * dev)
1268{
1269 unsigned int base = dev->base_addr;
1270 psa_t psa;
1271
1272 /* Read the parameter storage area */
1273 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
1274
1275#ifdef DEBUG_PSA_SHOW
1276 wv_psa_show(&psa);
1277#endif
1278#ifdef DEBUG_MMC_SHOW
1279 wv_mmc_show(dev);
1280#endif
1281#ifdef DEBUG_I82593_SHOW
1282 wv_ru_show(dev);
1283#endif
1284
1285#ifdef DEBUG_BASIC_SHOW
1286 /* Now, let's go for the basic stuff */
1287 printk(KERN_NOTICE "%s: WaveLAN: port %#x, irq %d, hw_addr %pM",
1288 dev->name, base, dev->irq, dev->dev_addr);
1289
1290 /* Print current network id */
1291 if(psa.psa_nwid_select)
1292 printk(", nwid 0x%02X-%02X", psa.psa_nwid[0], psa.psa_nwid[1]);
1293 else
1294 printk(", nwid off");
1295
1296 /* If 2.00 card */
1297 if(!(mmc_in(base, mmroff(0, mmr_fee_status)) &
1298 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
1299 {
1300 unsigned short freq;
1301
1302 /* Ask the EEprom to read the frequency from the first area */
1303 fee_read(base, 0x00 /* 1st area - frequency... */,
1304 &freq, 1);
1305
1306 /* Print frequency */
1307 printk(", 2.00, %ld", (freq >> 6) + 2400L);
1308
1309 /* Hack !!! */
1310 if(freq & 0x20)
1311 printk(".5");
1312 }
1313 else
1314 {
1315 printk(", PCMCIA, ");
1316 switch (psa.psa_subband)
1317 {
1318 case PSA_SUBBAND_915:
1319 printk("915");
1320 break;
1321 case PSA_SUBBAND_2425:
1322 printk("2425");
1323 break;
1324 case PSA_SUBBAND_2460:
1325 printk("2460");
1326 break;
1327 case PSA_SUBBAND_2484:
1328 printk("2484");
1329 break;
1330 case PSA_SUBBAND_2430_5:
1331 printk("2430.5");
1332 break;
1333 default:
1334 printk("unknown");
1335 }
1336 }
1337
1338 printk(" MHz\n");
1339#endif /* DEBUG_BASIC_SHOW */
1340
1341#ifdef DEBUG_VERSION_SHOW
1342 /* Print version information */
1343 printk(KERN_NOTICE "%s", version);
1344#endif
1345} /* wv_init_info */
1346
1347/********************* IOCTL, STATS & RECONFIG *********************/
1348/*
1349 * We found here routines that are called by Linux on differents
1350 * occasions after the configuration and not for transmitting data
1351 * These may be called when the user use ifconfig, /proc/net/dev
1352 * or wireless extensions
1353 */
1354
1355
1356/*------------------------------------------------------------------*/
1357/*
1358 * Set or clear the multicast filter for this adaptor.
1359 * num_addrs == -1 Promiscuous mode, receive all packets
1360 * num_addrs == 0 Normal mode, clear multicast list
1361 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1362 * and do best-effort filtering.
1363 */
1364
1365static void
1366wavelan_set_multicast_list(struct net_device * dev)
1367{
1368 net_local * lp = netdev_priv(dev);
1369
1370#ifdef DEBUG_IOCTL_TRACE
1371 printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n", dev->name);
1372#endif
1373
1374#ifdef DEBUG_IOCTL_INFO
1375 printk(KERN_DEBUG "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
1376 dev->name, dev->flags, dev->mc_count);
1377#endif
1378
1379 if(dev->flags & IFF_PROMISC)
1380 {
1381 /*
1382 * Enable promiscuous mode: receive all packets.
1383 */
1384 if(!lp->promiscuous)
1385 {
1386 lp->promiscuous = 1;
1387 lp->allmulticast = 0;
1388 lp->mc_count = 0;
1389
1390 wv_82593_reconfig(dev);
1391 }
1392 }
1393 else
1394 /* If all multicast addresses
1395 * or too much multicast addresses for the hardware filter */
1396 if((dev->flags & IFF_ALLMULTI) ||
1397 (dev->mc_count > I82593_MAX_MULTICAST_ADDRESSES))
1398 {
1399 /*
1400 * Disable promiscuous mode, but active the all multicast mode
1401 */
1402 if(!lp->allmulticast)
1403 {
1404 lp->promiscuous = 0;
1405 lp->allmulticast = 1;
1406 lp->mc_count = 0;
1407
1408 wv_82593_reconfig(dev);
1409 }
1410 }
1411 else
1412 /* If there is some multicast addresses to send */
1413 if(dev->mc_list != (struct dev_mc_list *) NULL)
1414 {
1415 /*
1416 * Disable promiscuous mode, but receive all packets
1417 * in multicast list
1418 */
1419#ifdef MULTICAST_AVOID
1420 if(lp->promiscuous || lp->allmulticast ||
1421 (dev->mc_count != lp->mc_count))
1422#endif
1423 {
1424 lp->promiscuous = 0;
1425 lp->allmulticast = 0;
1426 lp->mc_count = dev->mc_count;
1427
1428 wv_82593_reconfig(dev);
1429 }
1430 }
1431 else
1432 {
1433 /*
1434 * Switch to normal mode: disable promiscuous mode and
1435 * clear the multicast list.
1436 */
1437 if(lp->promiscuous || lp->mc_count == 0)
1438 {
1439 lp->promiscuous = 0;
1440 lp->allmulticast = 0;
1441 lp->mc_count = 0;
1442
1443 wv_82593_reconfig(dev);
1444 }
1445 }
1446#ifdef DEBUG_IOCTL_TRACE
1447 printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n", dev->name);
1448#endif
1449}
1450
1451/*------------------------------------------------------------------*/
1452/*
1453 * This function doesn't exist...
1454 * (Note : it was a nice way to test the reconfigure stuff...)
1455 */
1456#ifdef SET_MAC_ADDRESS
1457static int
1458wavelan_set_mac_address(struct net_device * dev,
1459 void * addr)
1460{
1461 struct sockaddr * mac = addr;
1462
1463 /* Copy the address */
1464 memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
1465
1466 /* Reconfig the beast */
1467 wv_82593_reconfig(dev);
1468
1469 return 0;
1470}
1471#endif /* SET_MAC_ADDRESS */
1472
1473
1474/*------------------------------------------------------------------*/
1475/*
1476 * Frequency setting (for hardware able of it)
1477 * It's a bit complicated and you don't really want to look into it...
1478 */
1479static int
1480wv_set_frequency(u_long base, /* i/o port of the card */
1481 iw_freq * frequency)
1482{
1483 const int BAND_NUM = 10; /* Number of bands */
1484 long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
1485#ifdef DEBUG_IOCTL_INFO
1486 int i;
1487#endif
1488
1489 /* Setting by frequency */
1490 /* Theoritically, you may set any frequency between
1491 * the two limits with a 0.5 MHz precision. In practice,
1492 * I don't want you to have trouble with local
1493 * regulations... */
1494 if((frequency->e == 1) &&
1495 (frequency->m >= (int) 2.412e8) && (frequency->m <= (int) 2.487e8))
1496 {
1497 freq = ((frequency->m / 10000) - 24000L) / 5;
1498 }
1499
1500 /* Setting by channel (same as wfreqsel) */
1501 /* Warning : each channel is 22MHz wide, so some of the channels
1502 * will interfere... */
1503 if((frequency->e == 0) &&
1504 (frequency->m >= 0) && (frequency->m < BAND_NUM))
1505 {
1506 /* Get frequency offset. */
1507 freq = channel_bands[frequency->m] >> 1;
1508 }
1509
1510 /* Verify if the frequency is allowed */
1511 if(freq != 0L)
1512 {
1513 u_short table[10]; /* Authorized frequency table */
1514
1515 /* Read the frequency table */
1516 fee_read(base, 0x71 /* frequency table */,
1517 table, 10);
1518
1519#ifdef DEBUG_IOCTL_INFO
1520 printk(KERN_DEBUG "Frequency table :");
1521 for(i = 0; i < 10; i++)
1522 {
1523 printk(" %04X",
1524 table[i]);
1525 }
1526 printk("\n");
1527#endif
1528
1529 /* Look in the table if the frequency is allowed */
1530 if(!(table[9 - ((freq - 24) / 16)] &
1531 (1 << ((freq - 24) % 16))))
1532 return -EINVAL; /* not allowed */
1533 }
1534 else
1535 return -EINVAL;
1536
1537 /* If we get a usable frequency */
1538 if(freq != 0L)
1539 {
1540 unsigned short area[16];
1541 unsigned short dac[2];
1542 unsigned short area_verify[16];
1543 unsigned short dac_verify[2];
1544 /* Corresponding gain (in the power adjust value table)
1545 * see AT&T Wavelan Data Manual, REF 407-024689/E, page 3-8
1546 * & WCIN062D.DOC, page 6.2.9 */
1547 unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
1548 int power_band = 0; /* Selected band */
1549 unsigned short power_adjust; /* Correct value */
1550
1551 /* Search for the gain */
1552 power_band = 0;
1553 while((freq > power_limit[power_band]) &&
1554 (power_limit[++power_band] != 0))
1555 ;
1556
1557 /* Read the first area */
1558 fee_read(base, 0x00,
1559 area, 16);
1560
1561 /* Read the DAC */
1562 fee_read(base, 0x60,
1563 dac, 2);
1564
1565 /* Read the new power adjust value */
1566 fee_read(base, 0x6B - (power_band >> 1),
1567 &power_adjust, 1);
1568 if(power_band & 0x1)
1569 power_adjust >>= 8;
1570 else
1571 power_adjust &= 0xFF;
1572
1573#ifdef DEBUG_IOCTL_INFO
1574 printk(KERN_DEBUG "Wavelan EEprom Area 1 :");
1575 for(i = 0; i < 16; i++)
1576 {
1577 printk(" %04X",
1578 area[i]);
1579 }
1580 printk("\n");
1581
1582 printk(KERN_DEBUG "Wavelan EEprom DAC : %04X %04X\n",
1583 dac[0], dac[1]);
1584#endif
1585
1586 /* Frequency offset (for info only...) */
1587 area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
1588
1589 /* Receiver Principle main divider coefficient */
1590 area[3] = (freq >> 1) + 2400L - 352L;
1591 area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1592
1593 /* Transmitter Main divider coefficient */
1594 area[13] = (freq >> 1) + 2400L;
1595 area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
1596
1597 /* Others part of the area are flags, bit streams or unused... */
1598
1599 /* Set the value in the DAC */
1600 dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
1601 dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
1602
1603 /* Write the first area */
1604 fee_write(base, 0x00,
1605 area, 16);
1606
1607 /* Write the DAC */
1608 fee_write(base, 0x60,
1609 dac, 2);
1610
1611 /* We now should verify here that the EEprom writing was ok */
1612
1613 /* ReRead the first area */
1614 fee_read(base, 0x00,
1615 area_verify, 16);
1616
1617 /* ReRead the DAC */
1618 fee_read(base, 0x60,
1619 dac_verify, 2);
1620
1621 /* Compare */
1622 if(memcmp(area, area_verify, 16 * 2) ||
1623 memcmp(dac, dac_verify, 2 * 2))
1624 {
1625#ifdef DEBUG_IOCTL_ERROR
1626 printk(KERN_INFO "Wavelan: wv_set_frequency : unable to write new frequency to EEprom (?)\n");
1627#endif
1628 return -EOPNOTSUPP;
1629 }
1630
1631 /* We must download the frequency parameters to the
1632 * synthetisers (from the EEprom - area 1)
1633 * Note : as the EEprom is auto decremented, we set the end
1634 * if the area... */
1635 mmc_out(base, mmwoff(0, mmw_fee_addr), 0x0F);
1636 mmc_out(base, mmwoff(0, mmw_fee_ctrl),
1637 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1638
1639 /* Wait until the download is finished */
1640 fee_wait(base, 100, 100);
1641
1642 /* We must now download the power adjust value (gain) to
1643 * the synthetisers (from the EEprom - area 7 - DAC) */
1644 mmc_out(base, mmwoff(0, mmw_fee_addr), 0x61);
1645 mmc_out(base, mmwoff(0, mmw_fee_ctrl),
1646 MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
1647
1648 /* Wait until the download is finished */
1649 fee_wait(base, 100, 100);
1650
1651#ifdef DEBUG_IOCTL_INFO
1652 /* Verification of what we have done... */
1653
1654 printk(KERN_DEBUG "Wavelan EEprom Area 1 :");
1655 for(i = 0; i < 16; i++)
1656 {
1657 printk(" %04X",
1658 area_verify[i]);
1659 }
1660 printk("\n");
1661
1662 printk(KERN_DEBUG "Wavelan EEprom DAC : %04X %04X\n",
1663 dac_verify[0], dac_verify[1]);
1664#endif
1665
1666 return 0;
1667 }
1668 else
1669 return -EINVAL; /* Bah, never get there... */
1670}
1671
1672/*------------------------------------------------------------------*/
1673/*
1674 * Give the list of available frequencies
1675 */
1676static int
1677wv_frequency_list(u_long base, /* i/o port of the card */
1678 iw_freq * list, /* List of frequency to fill */
1679 int max) /* Maximum number of frequencies */
1680{
1681 u_short table[10]; /* Authorized frequency table */
1682 long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
1683 int i; /* index in the table */
1684 const int BAND_NUM = 10; /* Number of bands */
1685 int c = 0; /* Channel number */
1686
1687 /* Read the frequency table */
1688 fee_read(base, 0x71 /* frequency table */,
1689 table, 10);
1690
1691 /* Look all frequencies */
1692 i = 0;
1693 for(freq = 0; freq < 150; freq++)
1694 /* Look in the table if the frequency is allowed */
1695 if(table[9 - (freq / 16)] & (1 << (freq % 16)))
1696 {
1697 /* Compute approximate channel number */
1698 while((((channel_bands[c] >> 1) - 24) < freq) &&
1699 (c < BAND_NUM))
1700 c++;
1701 list[i].i = c; /* Set the list index */
1702
1703 /* put in the list */
1704 list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
1705 list[i++].e = 1;
1706
1707 /* Check number */
1708 if(i >= max)
1709 return(i);
1710 }
1711
1712 return(i);
1713}
1714
1715#ifdef IW_WIRELESS_SPY
1716/*------------------------------------------------------------------*/
1717/*
1718 * Gather wireless spy statistics : for each packet, compare the source
1719 * address with out list, and if match, get the stats...
1720 * Sorry, but this function really need wireless extensions...
1721 */
1722static inline void
1723wl_spy_gather(struct net_device * dev,
1724 u_char * mac, /* MAC address */
1725 u_char * stats) /* Statistics to gather */
1726{
1727 struct iw_quality wstats;
1728
1729 wstats.qual = stats[2] & MMR_SGNL_QUAL;
1730 wstats.level = stats[0] & MMR_SIGNAL_LVL;
1731 wstats.noise = stats[1] & MMR_SILENCE_LVL;
1732 wstats.updated = 0x7;
1733
1734 /* Update spy records */
1735 wireless_spy_update(dev, mac, &wstats);
1736}
1737#endif /* IW_WIRELESS_SPY */
1738
1739#ifdef HISTOGRAM
1740/*------------------------------------------------------------------*/
1741/*
1742 * This function calculate an histogram on the signal level.
1743 * As the noise is quite constant, it's like doing it on the SNR.
1744 * We have defined a set of interval (lp->his_range), and each time
1745 * the level goes in that interval, we increment the count (lp->his_sum).
1746 * With this histogram you may detect if one wavelan is really weak,
1747 * or you may also calculate the mean and standard deviation of the level...
1748 */
1749static inline void
1750wl_his_gather(struct net_device * dev,
1751 u_char * stats) /* Statistics to gather */
1752{
1753 net_local * lp = netdev_priv(dev);
1754 u_char level = stats[0] & MMR_SIGNAL_LVL;
1755 int i;
1756
1757 /* Find the correct interval */
1758 i = 0;
1759 while((i < (lp->his_number - 1)) && (level >= lp->his_range[i++]))
1760 ;
1761
1762 /* Increment interval counter */
1763 (lp->his_sum[i])++;
1764}
1765#endif /* HISTOGRAM */
1766
1767static void wl_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1768{
1769 strncpy(info->driver, "wavelan_cs", sizeof(info->driver)-1);
1770}
1771
1772static const struct ethtool_ops ops = {
1773 .get_drvinfo = wl_get_drvinfo
1774};
1775
1776/*------------------------------------------------------------------*/
1777/*
1778 * Wireless Handler : get protocol name
1779 */
1780static int wavelan_get_name(struct net_device *dev,
1781 struct iw_request_info *info,
1782 union iwreq_data *wrqu,
1783 char *extra)
1784{
1785 strcpy(wrqu->name, "WaveLAN");
1786 return 0;
1787}
1788
1789/*------------------------------------------------------------------*/
1790/*
1791 * Wireless Handler : set NWID
1792 */
1793static int wavelan_set_nwid(struct net_device *dev,
1794 struct iw_request_info *info,
1795 union iwreq_data *wrqu,
1796 char *extra)
1797{
1798 unsigned int base = dev->base_addr;
1799 net_local *lp = netdev_priv(dev);
1800 psa_t psa;
1801 mm_t m;
1802 unsigned long flags;
1803 int ret = 0;
1804
1805 /* Disable interrupts and save flags. */
1806 spin_lock_irqsave(&lp->spinlock, flags);
1807
1808 /* Set NWID in WaveLAN. */
1809 if (!wrqu->nwid.disabled) {
1810 /* Set NWID in psa */
1811 psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
1812 psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
1813 psa.psa_nwid_select = 0x01;
1814 psa_write(dev,
1815 (char *) psa.psa_nwid - (char *) &psa,
1816 (unsigned char *) psa.psa_nwid, 3);
1817
1818 /* Set NWID in mmc. */
1819 m.w.mmw_netw_id_l = psa.psa_nwid[1];
1820 m.w.mmw_netw_id_h = psa.psa_nwid[0];
1821 mmc_write(base,
1822 (char *) &m.w.mmw_netw_id_l -
1823 (char *) &m,
1824 (unsigned char *) &m.w.mmw_netw_id_l, 2);
1825 mmc_out(base, mmwoff(0, mmw_loopt_sel), 0x00);
1826 } else {
1827 /* Disable NWID in the psa. */
1828 psa.psa_nwid_select = 0x00;
1829 psa_write(dev,
1830 (char *) &psa.psa_nwid_select -
1831 (char *) &psa,
1832 (unsigned char *) &psa.psa_nwid_select,
1833 1);
1834
1835 /* Disable NWID in the mmc (no filtering). */
1836 mmc_out(base, mmwoff(0, mmw_loopt_sel),
1837 MMW_LOOPT_SEL_DIS_NWID);
1838 }
1839 /* update the Wavelan checksum */
1840 update_psa_checksum(dev);
1841
1842 /* Enable interrupts and restore flags. */
1843 spin_unlock_irqrestore(&lp->spinlock, flags);
1844
1845 return ret;
1846}
1847
1848/*------------------------------------------------------------------*/
1849/*
1850 * Wireless Handler : get NWID
1851 */
1852static int wavelan_get_nwid(struct net_device *dev,
1853 struct iw_request_info *info,
1854 union iwreq_data *wrqu,
1855 char *extra)
1856{
1857 net_local *lp = netdev_priv(dev);
1858 psa_t psa;
1859 unsigned long flags;
1860 int ret = 0;
1861
1862 /* Disable interrupts and save flags. */
1863 spin_lock_irqsave(&lp->spinlock, flags);
1864
1865 /* Read the NWID. */
1866 psa_read(dev,
1867 (char *) psa.psa_nwid - (char *) &psa,
1868 (unsigned char *) psa.psa_nwid, 3);
1869 wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
1870 wrqu->nwid.disabled = !(psa.psa_nwid_select);
1871 wrqu->nwid.fixed = 1; /* Superfluous */
1872
1873 /* Enable interrupts and restore flags. */
1874 spin_unlock_irqrestore(&lp->spinlock, flags);
1875
1876 return ret;
1877}
1878
1879/*------------------------------------------------------------------*/
1880/*
1881 * Wireless Handler : set frequency
1882 */
1883static int wavelan_set_freq(struct net_device *dev,
1884 struct iw_request_info *info,
1885 union iwreq_data *wrqu,
1886 char *extra)
1887{
1888 unsigned int base = dev->base_addr;
1889 net_local *lp = netdev_priv(dev);
1890 unsigned long flags;
1891 int ret;
1892
1893 /* Disable interrupts and save flags. */
1894 spin_lock_irqsave(&lp->spinlock, flags);
1895
1896 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
1897 if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
1898 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
1899 ret = wv_set_frequency(base, &(wrqu->freq));
1900 else
1901 ret = -EOPNOTSUPP;
1902
1903 /* Enable interrupts and restore flags. */
1904 spin_unlock_irqrestore(&lp->spinlock, flags);
1905
1906 return ret;
1907}
1908
1909/*------------------------------------------------------------------*/
1910/*
1911 * Wireless Handler : get frequency
1912 */
1913static int wavelan_get_freq(struct net_device *dev,
1914 struct iw_request_info *info,
1915 union iwreq_data *wrqu,
1916 char *extra)
1917{
1918 unsigned int base = dev->base_addr;
1919 net_local *lp = netdev_priv(dev);
1920 psa_t psa;
1921 unsigned long flags;
1922 int ret = 0;
1923
1924 /* Disable interrupts and save flags. */
1925 spin_lock_irqsave(&lp->spinlock, flags);
1926
1927 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
1928 * Does it work for everybody, especially old cards? */
1929 if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
1930 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
1931 unsigned short freq;
1932
1933 /* Ask the EEPROM to read the frequency from the first area. */
1934 fee_read(base, 0x00, &freq, 1);
1935 wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
1936 wrqu->freq.e = 1;
1937 } else {
1938 psa_read(dev,
1939 (char *) &psa.psa_subband - (char *) &psa,
1940 (unsigned char *) &psa.psa_subband, 1);
1941
1942 if (psa.psa_subband <= 4) {
1943 wrqu->freq.m = fixed_bands[psa.psa_subband];
1944 wrqu->freq.e = (psa.psa_subband != 0);
1945 } else
1946 ret = -EOPNOTSUPP;
1947 }
1948
1949 /* Enable interrupts and restore flags. */
1950 spin_unlock_irqrestore(&lp->spinlock, flags);
1951
1952 return ret;
1953}
1954
1955/*------------------------------------------------------------------*/
1956/*
1957 * Wireless Handler : set level threshold
1958 */
1959static int wavelan_set_sens(struct net_device *dev,
1960 struct iw_request_info *info,
1961 union iwreq_data *wrqu,
1962 char *extra)
1963{
1964 unsigned int base = dev->base_addr;
1965 net_local *lp = netdev_priv(dev);
1966 psa_t psa;
1967 unsigned long flags;
1968 int ret = 0;
1969
1970 /* Disable interrupts and save flags. */
1971 spin_lock_irqsave(&lp->spinlock, flags);
1972
1973 /* Set the level threshold. */
1974 /* We should complain loudly if wrqu->sens.fixed = 0, because we
1975 * can't set auto mode... */
1976 psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
1977 psa_write(dev,
1978 (char *) &psa.psa_thr_pre_set - (char *) &psa,
1979 (unsigned char *) &psa.psa_thr_pre_set, 1);
1980 /* update the Wavelan checksum */
1981 update_psa_checksum(dev);
1982 mmc_out(base, mmwoff(0, mmw_thr_pre_set),
1983 psa.psa_thr_pre_set);
1984
1985 /* Enable interrupts and restore flags. */
1986 spin_unlock_irqrestore(&lp->spinlock, flags);
1987
1988 return ret;
1989}
1990
1991/*------------------------------------------------------------------*/
1992/*
1993 * Wireless Handler : get level threshold
1994 */
1995static int wavelan_get_sens(struct net_device *dev,
1996 struct iw_request_info *info,
1997 union iwreq_data *wrqu,
1998 char *extra)
1999{
2000 net_local *lp = netdev_priv(dev);
2001 psa_t psa;
2002 unsigned long flags;
2003 int ret = 0;
2004
2005 /* Disable interrupts and save flags. */
2006 spin_lock_irqsave(&lp->spinlock, flags);
2007
2008 /* Read the level threshold. */
2009 psa_read(dev,
2010 (char *) &psa.psa_thr_pre_set - (char *) &psa,
2011 (unsigned char *) &psa.psa_thr_pre_set, 1);
2012 wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
2013 wrqu->sens.fixed = 1;
2014
2015 /* Enable interrupts and restore flags. */
2016 spin_unlock_irqrestore(&lp->spinlock, flags);
2017
2018 return ret;
2019}
2020
2021/*------------------------------------------------------------------*/
2022/*
2023 * Wireless Handler : set encryption key
2024 */
2025static int wavelan_set_encode(struct net_device *dev,
2026 struct iw_request_info *info,
2027 union iwreq_data *wrqu,
2028 char *extra)
2029{
2030 unsigned int base = dev->base_addr;
2031 net_local *lp = netdev_priv(dev);
2032 unsigned long flags;
2033 psa_t psa;
2034 int ret = 0;
2035
2036 /* Disable interrupts and save flags. */
2037 spin_lock_irqsave(&lp->spinlock, flags);
2038
2039 /* Check if capable of encryption */
2040 if (!mmc_encr(base)) {
2041 ret = -EOPNOTSUPP;
2042 }
2043
2044 /* Check the size of the key */
2045 if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
2046 ret = -EINVAL;
2047 }
2048
2049 if(!ret) {
2050 /* Basic checking... */
2051 if (wrqu->encoding.length == 8) {
2052 /* Copy the key in the driver */
2053 memcpy(psa.psa_encryption_key, extra,
2054 wrqu->encoding.length);
2055 psa.psa_encryption_select = 1;
2056
2057 psa_write(dev,
2058 (char *) &psa.psa_encryption_select -
2059 (char *) &psa,
2060 (unsigned char *) &psa.
2061 psa_encryption_select, 8 + 1);
2062
2063 mmc_out(base, mmwoff(0, mmw_encr_enable),
2064 MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
2065 mmc_write(base, mmwoff(0, mmw_encr_key),
2066 (unsigned char *) &psa.
2067 psa_encryption_key, 8);
2068 }
2069
2070 /* disable encryption */
2071 if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
2072 psa.psa_encryption_select = 0;
2073 psa_write(dev,
2074 (char *) &psa.psa_encryption_select -
2075 (char *) &psa,
2076 (unsigned char *) &psa.
2077 psa_encryption_select, 1);
2078
2079 mmc_out(base, mmwoff(0, mmw_encr_enable), 0);
2080 }
2081 /* update the Wavelan checksum */
2082 update_psa_checksum(dev);
2083 }
2084
2085 /* Enable interrupts and restore flags. */
2086 spin_unlock_irqrestore(&lp->spinlock, flags);
2087
2088 return ret;
2089}
2090
2091/*------------------------------------------------------------------*/
2092/*
2093 * Wireless Handler : get encryption key
2094 */
2095static int wavelan_get_encode(struct net_device *dev,
2096 struct iw_request_info *info,
2097 union iwreq_data *wrqu,
2098 char *extra)
2099{
2100 unsigned int base = dev->base_addr;
2101 net_local *lp = netdev_priv(dev);
2102 psa_t psa;
2103 unsigned long flags;
2104 int ret = 0;
2105
2106 /* Disable interrupts and save flags. */
2107 spin_lock_irqsave(&lp->spinlock, flags);
2108
2109 /* Check if encryption is available */
2110 if (!mmc_encr(base)) {
2111 ret = -EOPNOTSUPP;
2112 } else {
2113 /* Read the encryption key */
2114 psa_read(dev,
2115 (char *) &psa.psa_encryption_select -
2116 (char *) &psa,
2117 (unsigned char *) &psa.
2118 psa_encryption_select, 1 + 8);
2119
2120 /* encryption is enabled ? */
2121 if (psa.psa_encryption_select)
2122 wrqu->encoding.flags = IW_ENCODE_ENABLED;
2123 else
2124 wrqu->encoding.flags = IW_ENCODE_DISABLED;
2125 wrqu->encoding.flags |= mmc_encr(base);
2126
2127 /* Copy the key to the user buffer */
2128 wrqu->encoding.length = 8;
2129 memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
2130 }
2131
2132 /* Enable interrupts and restore flags. */
2133 spin_unlock_irqrestore(&lp->spinlock, flags);
2134
2135 return ret;
2136}
2137
2138#ifdef WAVELAN_ROAMING_EXT
2139/*------------------------------------------------------------------*/
2140/*
2141 * Wireless Handler : set ESSID (domain)
2142 */
2143static int wavelan_set_essid(struct net_device *dev,
2144 struct iw_request_info *info,
2145 union iwreq_data *wrqu,
2146 char *extra)
2147{
2148 net_local *lp = netdev_priv(dev);
2149 unsigned long flags;
2150 int ret = 0;
2151
2152 /* Disable interrupts and save flags. */
2153 spin_lock_irqsave(&lp->spinlock, flags);
2154
2155 /* Check if disable */
2156 if(wrqu->data.flags == 0)
2157 lp->filter_domains = 0;
2158 else {
2159 char essid[IW_ESSID_MAX_SIZE + 1];
2160 char * endp;
2161
2162 /* Terminate the string */
2163 memcpy(essid, extra, wrqu->data.length);
2164 essid[IW_ESSID_MAX_SIZE] = '\0';
2165
2166#ifdef DEBUG_IOCTL_INFO
2167 printk(KERN_DEBUG "SetEssid : ``%s''\n", essid);
2168#endif /* DEBUG_IOCTL_INFO */
2169
2170 /* Convert to a number (note : Wavelan specific) */
2171 lp->domain_id = simple_strtoul(essid, &endp, 16);
2172 /* Has it worked ? */
2173 if(endp > essid)
2174 lp->filter_domains = 1;
2175 else {
2176 lp->filter_domains = 0;
2177 ret = -EINVAL;
2178 }
2179 }
2180
2181 /* Enable interrupts and restore flags. */
2182 spin_unlock_irqrestore(&lp->spinlock, flags);
2183
2184 return ret;
2185}
2186
2187/*------------------------------------------------------------------*/
2188/*
2189 * Wireless Handler : get ESSID (domain)
2190 */
2191static int wavelan_get_essid(struct net_device *dev,
2192 struct iw_request_info *info,
2193 union iwreq_data *wrqu,
2194 char *extra)
2195{
2196 net_local *lp = netdev_priv(dev);
2197
2198 /* Is the domain ID active ? */
2199 wrqu->data.flags = lp->filter_domains;
2200
2201 /* Copy Domain ID into a string (Wavelan specific) */
2202 /* Sound crazy, be we can't have a snprintf in the kernel !!! */
2203 sprintf(extra, "%lX", lp->domain_id);
2204 extra[IW_ESSID_MAX_SIZE] = '\0';
2205
2206 /* Set the length */
2207 wrqu->data.length = strlen(extra);
2208
2209 return 0;
2210}
2211
2212/*------------------------------------------------------------------*/
2213/*
2214 * Wireless Handler : set AP address
2215 */
2216static int wavelan_set_wap(struct net_device *dev,
2217 struct iw_request_info *info,
2218 union iwreq_data *wrqu,
2219 char *extra)
2220{
2221#ifdef DEBUG_IOCTL_INFO
2222 printk(KERN_DEBUG "Set AP to : %pM\n", wrqu->ap_addr.sa_data);
2223#endif /* DEBUG_IOCTL_INFO */
2224
2225 return -EOPNOTSUPP;
2226}
2227
2228/*------------------------------------------------------------------*/
2229/*
2230 * Wireless Handler : get AP address
2231 */
2232static int wavelan_get_wap(struct net_device *dev,
2233 struct iw_request_info *info,
2234 union iwreq_data *wrqu,
2235 char *extra)
2236{
2237 /* Should get the real McCoy instead of own Ethernet address */
2238 memcpy(wrqu->ap_addr.sa_data, dev->dev_addr, WAVELAN_ADDR_SIZE);
2239 wrqu->ap_addr.sa_family = ARPHRD_ETHER;
2240
2241 return -EOPNOTSUPP;
2242}
2243#endif /* WAVELAN_ROAMING_EXT */
2244
2245#ifdef WAVELAN_ROAMING
2246/*------------------------------------------------------------------*/
2247/*
2248 * Wireless Handler : set mode
2249 */
2250static int wavelan_set_mode(struct net_device *dev,
2251 struct iw_request_info *info,
2252 union iwreq_data *wrqu,
2253 char *extra)
2254{
2255 net_local *lp = netdev_priv(dev);
2256 unsigned long flags;
2257 int ret = 0;
2258
2259 /* Disable interrupts and save flags. */
2260 spin_lock_irqsave(&lp->spinlock, flags);
2261
2262 /* Check mode */
2263 switch(wrqu->mode) {
2264 case IW_MODE_ADHOC:
2265 if(do_roaming) {
2266 wv_roam_cleanup(dev);
2267 do_roaming = 0;
2268 }
2269 break;
2270 case IW_MODE_INFRA:
2271 if(!do_roaming) {
2272 wv_roam_init(dev);
2273 do_roaming = 1;
2274 }
2275 break;
2276 default:
2277 ret = -EINVAL;
2278 }
2279
2280 /* Enable interrupts and restore flags. */
2281 spin_unlock_irqrestore(&lp->spinlock, flags);
2282
2283 return ret;
2284}
2285
2286/*------------------------------------------------------------------*/
2287/*
2288 * Wireless Handler : get mode
2289 */
2290static int wavelan_get_mode(struct net_device *dev,
2291 struct iw_request_info *info,
2292 union iwreq_data *wrqu,
2293 char *extra)
2294{
2295 if(do_roaming)
2296 wrqu->mode = IW_MODE_INFRA;
2297 else
2298 wrqu->mode = IW_MODE_ADHOC;
2299
2300 return 0;
2301}
2302#endif /* WAVELAN_ROAMING */
2303
2304/*------------------------------------------------------------------*/
2305/*
2306 * Wireless Handler : get range info
2307 */
2308static int wavelan_get_range(struct net_device *dev,
2309 struct iw_request_info *info,
2310 union iwreq_data *wrqu,
2311 char *extra)
2312{
2313 unsigned int base = dev->base_addr;
2314 net_local *lp = netdev_priv(dev);
2315 struct iw_range *range = (struct iw_range *) extra;
2316 unsigned long flags;
2317 int ret = 0;
2318
2319 /* Set the length (very important for backward compatibility) */
2320 wrqu->data.length = sizeof(struct iw_range);
2321
2322 /* Set all the info we don't care or don't know about to zero */
2323 memset(range, 0, sizeof(struct iw_range));
2324
2325 /* Set the Wireless Extension versions */
2326 range->we_version_compiled = WIRELESS_EXT;
2327 range->we_version_source = 9;
2328
2329 /* Set information in the range struct. */
2330 range->throughput = 1.4 * 1000 * 1000; /* don't argue on this ! */
2331 range->min_nwid = 0x0000;
2332 range->max_nwid = 0xFFFF;
2333
2334 range->sensitivity = 0x3F;
2335 range->max_qual.qual = MMR_SGNL_QUAL;
2336 range->max_qual.level = MMR_SIGNAL_LVL;
2337 range->max_qual.noise = MMR_SILENCE_LVL;
2338 range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
2339 /* Need to get better values for those two */
2340 range->avg_qual.level = 30;
2341 range->avg_qual.noise = 8;
2342
2343 range->num_bitrates = 1;
2344 range->bitrate[0] = 2000000; /* 2 Mb/s */
2345
2346 /* Event capability (kernel + driver) */
2347 range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
2348 IW_EVENT_CAPA_MASK(0x8B04) |
2349 IW_EVENT_CAPA_MASK(0x8B06));
2350 range->event_capa[1] = IW_EVENT_CAPA_K_1;
2351
2352 /* Disable interrupts and save flags. */
2353 spin_lock_irqsave(&lp->spinlock, flags);
2354
2355 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
2356 if (!(mmc_in(base, mmroff(0, mmr_fee_status)) &
2357 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
2358 range->num_channels = 10;
2359 range->num_frequency = wv_frequency_list(base, range->freq,
2360 IW_MAX_FREQUENCIES);
2361 } else
2362 range->num_channels = range->num_frequency = 0;
2363
2364 /* Encryption supported ? */
2365 if (mmc_encr(base)) {
2366 range->encoding_size[0] = 8; /* DES = 64 bits key */
2367 range->num_encoding_sizes = 1;
2368 range->max_encoding_tokens = 1; /* Only one key possible */
2369 } else {
2370 range->num_encoding_sizes = 0;
2371 range->max_encoding_tokens = 0;
2372 }
2373
2374 /* Enable interrupts and restore flags. */
2375 spin_unlock_irqrestore(&lp->spinlock, flags);
2376
2377 return ret;
2378}
2379
2380/*------------------------------------------------------------------*/
2381/*
2382 * Wireless Private Handler : set quality threshold
2383 */
2384static int wavelan_set_qthr(struct net_device *dev,
2385 struct iw_request_info *info,
2386 union iwreq_data *wrqu,
2387 char *extra)
2388{
2389 unsigned int base = dev->base_addr;
2390 net_local *lp = netdev_priv(dev);
2391 psa_t psa;
2392 unsigned long flags;
2393
2394 /* Disable interrupts and save flags. */
2395 spin_lock_irqsave(&lp->spinlock, flags);
2396
2397 psa.psa_quality_thr = *(extra) & 0x0F;
2398 psa_write(dev,
2399 (char *) &psa.psa_quality_thr - (char *) &psa,
2400 (unsigned char *) &psa.psa_quality_thr, 1);
2401 /* update the Wavelan checksum */
2402 update_psa_checksum(dev);
2403 mmc_out(base, mmwoff(0, mmw_quality_thr),
2404 psa.psa_quality_thr);
2405
2406 /* Enable interrupts and restore flags. */
2407 spin_unlock_irqrestore(&lp->spinlock, flags);
2408
2409 return 0;
2410}
2411
2412/*------------------------------------------------------------------*/
2413/*
2414 * Wireless Private Handler : get quality threshold
2415 */
2416static int wavelan_get_qthr(struct net_device *dev,
2417 struct iw_request_info *info,
2418 union iwreq_data *wrqu,
2419 char *extra)
2420{
2421 net_local *lp = netdev_priv(dev);
2422 psa_t psa;
2423 unsigned long flags;
2424
2425 /* Disable interrupts and save flags. */
2426 spin_lock_irqsave(&lp->spinlock, flags);
2427
2428 psa_read(dev,
2429 (char *) &psa.psa_quality_thr - (char *) &psa,
2430 (unsigned char *) &psa.psa_quality_thr, 1);
2431 *(extra) = psa.psa_quality_thr & 0x0F;
2432
2433 /* Enable interrupts and restore flags. */
2434 spin_unlock_irqrestore(&lp->spinlock, flags);
2435
2436 return 0;
2437}
2438
2439#ifdef WAVELAN_ROAMING
2440/*------------------------------------------------------------------*/
2441/*
2442 * Wireless Private Handler : set roaming
2443 */
2444static int wavelan_set_roam(struct net_device *dev,
2445 struct iw_request_info *info,
2446 union iwreq_data *wrqu,
2447 char *extra)
2448{
2449 net_local *lp = netdev_priv(dev);
2450 unsigned long flags;
2451
2452 /* Disable interrupts and save flags. */
2453 spin_lock_irqsave(&lp->spinlock, flags);
2454
2455 /* Note : should check if user == root */
2456 if(do_roaming && (*extra)==0)
2457 wv_roam_cleanup(dev);
2458 else if(do_roaming==0 && (*extra)!=0)
2459 wv_roam_init(dev);
2460
2461 do_roaming = (*extra);
2462
2463 /* Enable interrupts and restore flags. */
2464 spin_unlock_irqrestore(&lp->spinlock, flags);
2465
2466 return 0;
2467}
2468
2469/*------------------------------------------------------------------*/
2470/*
2471 * Wireless Private Handler : get quality threshold
2472 */
2473static int wavelan_get_roam(struct net_device *dev,
2474 struct iw_request_info *info,
2475 union iwreq_data *wrqu,
2476 char *extra)
2477{
2478 *(extra) = do_roaming;
2479
2480 return 0;
2481}
2482#endif /* WAVELAN_ROAMING */
2483
2484#ifdef HISTOGRAM
2485/*------------------------------------------------------------------*/
2486/*
2487 * Wireless Private Handler : set histogram
2488 */
2489static int wavelan_set_histo(struct net_device *dev,
2490 struct iw_request_info *info,
2491 union iwreq_data *wrqu,
2492 char *extra)
2493{
2494 net_local *lp = netdev_priv(dev);
2495
2496 /* Check the number of intervals. */
2497 if (wrqu->data.length > 16) {
2498 return(-E2BIG);
2499 }
2500
2501 /* Disable histo while we copy the addresses.
2502 * As we don't disable interrupts, we need to do this */
2503 lp->his_number = 0;
2504
2505 /* Are there ranges to copy? */
2506 if (wrqu->data.length > 0) {
2507 /* Copy interval ranges to the driver */
2508 memcpy(lp->his_range, extra, wrqu->data.length);
2509
2510 {
2511 int i;
2512 printk(KERN_DEBUG "Histo :");
2513 for(i = 0; i < wrqu->data.length; i++)
2514 printk(" %d", lp->his_range[i]);
2515 printk("\n");
2516 }
2517
2518 /* Reset result structure. */
2519 memset(lp->his_sum, 0x00, sizeof(long) * 16);
2520 }
2521
2522 /* Now we can set the number of ranges */
2523 lp->his_number = wrqu->data.length;
2524
2525 return(0);
2526}
2527
2528/*------------------------------------------------------------------*/
2529/*
2530 * Wireless Private Handler : get histogram
2531 */
2532static int wavelan_get_histo(struct net_device *dev,
2533 struct iw_request_info *info,
2534 union iwreq_data *wrqu,
2535 char *extra)
2536{
2537 net_local *lp = netdev_priv(dev);
2538
2539 /* Set the number of intervals. */
2540 wrqu->data.length = lp->his_number;
2541
2542 /* Give back the distribution statistics */
2543 if(lp->his_number > 0)
2544 memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
2545
2546 return(0);
2547}
2548#endif /* HISTOGRAM */
2549
2550/*------------------------------------------------------------------*/
2551/*
2552 * Structures to export the Wireless Handlers
2553 */
2554
2555static const struct iw_priv_args wavelan_private_args[] = {
2556/*{ cmd, set_args, get_args, name } */
2557 { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
2558 { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
2559 { SIOCSIPROAM, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setroam" },
2560 { SIOCGIPROAM, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getroam" },
2561 { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
2562 { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
2563};
2564
2565static const iw_handler wavelan_handler[] =
2566{
2567 NULL, /* SIOCSIWNAME */
2568 wavelan_get_name, /* SIOCGIWNAME */
2569 wavelan_set_nwid, /* SIOCSIWNWID */
2570 wavelan_get_nwid, /* SIOCGIWNWID */
2571 wavelan_set_freq, /* SIOCSIWFREQ */
2572 wavelan_get_freq, /* SIOCGIWFREQ */
2573#ifdef WAVELAN_ROAMING
2574 wavelan_set_mode, /* SIOCSIWMODE */
2575 wavelan_get_mode, /* SIOCGIWMODE */
2576#else /* WAVELAN_ROAMING */
2577 NULL, /* SIOCSIWMODE */
2578 NULL, /* SIOCGIWMODE */
2579#endif /* WAVELAN_ROAMING */
2580 wavelan_set_sens, /* SIOCSIWSENS */
2581 wavelan_get_sens, /* SIOCGIWSENS */
2582 NULL, /* SIOCSIWRANGE */
2583 wavelan_get_range, /* SIOCGIWRANGE */
2584 NULL, /* SIOCSIWPRIV */
2585 NULL, /* SIOCGIWPRIV */
2586 NULL, /* SIOCSIWSTATS */
2587 NULL, /* SIOCGIWSTATS */
2588 iw_handler_set_spy, /* SIOCSIWSPY */
2589 iw_handler_get_spy, /* SIOCGIWSPY */
2590 iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
2591 iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
2592#ifdef WAVELAN_ROAMING_EXT
2593 wavelan_set_wap, /* SIOCSIWAP */
2594 wavelan_get_wap, /* SIOCGIWAP */
2595 NULL, /* -- hole -- */
2596 NULL, /* SIOCGIWAPLIST */
2597 NULL, /* -- hole -- */
2598 NULL, /* -- hole -- */
2599 wavelan_set_essid, /* SIOCSIWESSID */
2600 wavelan_get_essid, /* SIOCGIWESSID */
2601#else /* WAVELAN_ROAMING_EXT */
2602 NULL, /* SIOCSIWAP */
2603 NULL, /* SIOCGIWAP */
2604 NULL, /* -- hole -- */
2605 NULL, /* SIOCGIWAPLIST */
2606 NULL, /* -- hole -- */
2607 NULL, /* -- hole -- */
2608 NULL, /* SIOCSIWESSID */
2609 NULL, /* SIOCGIWESSID */
2610#endif /* WAVELAN_ROAMING_EXT */
2611 NULL, /* SIOCSIWNICKN */
2612 NULL, /* SIOCGIWNICKN */
2613 NULL, /* -- hole -- */
2614 NULL, /* -- hole -- */
2615 NULL, /* SIOCSIWRATE */
2616 NULL, /* SIOCGIWRATE */
2617 NULL, /* SIOCSIWRTS */
2618 NULL, /* SIOCGIWRTS */
2619 NULL, /* SIOCSIWFRAG */
2620 NULL, /* SIOCGIWFRAG */
2621 NULL, /* SIOCSIWTXPOW */
2622 NULL, /* SIOCGIWTXPOW */
2623 NULL, /* SIOCSIWRETRY */
2624 NULL, /* SIOCGIWRETRY */
2625 wavelan_set_encode, /* SIOCSIWENCODE */
2626 wavelan_get_encode, /* SIOCGIWENCODE */
2627};
2628
2629static const iw_handler wavelan_private_handler[] =
2630{
2631 wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
2632 wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
2633#ifdef WAVELAN_ROAMING
2634 wavelan_set_roam, /* SIOCIWFIRSTPRIV + 2 */
2635 wavelan_get_roam, /* SIOCIWFIRSTPRIV + 3 */
2636#else /* WAVELAN_ROAMING */
2637 NULL, /* SIOCIWFIRSTPRIV + 2 */
2638 NULL, /* SIOCIWFIRSTPRIV + 3 */
2639#endif /* WAVELAN_ROAMING */
2640#ifdef HISTOGRAM
2641 wavelan_set_histo, /* SIOCIWFIRSTPRIV + 4 */
2642 wavelan_get_histo, /* SIOCIWFIRSTPRIV + 5 */
2643#endif /* HISTOGRAM */
2644};
2645
2646static const struct iw_handler_def wavelan_handler_def =
2647{
2648 .num_standard = ARRAY_SIZE(wavelan_handler),
2649 .num_private = ARRAY_SIZE(wavelan_private_handler),
2650 .num_private_args = ARRAY_SIZE(wavelan_private_args),
2651 .standard = wavelan_handler,
2652 .private = wavelan_private_handler,
2653 .private_args = wavelan_private_args,
2654 .get_wireless_stats = wavelan_get_wireless_stats,
2655};
2656
2657/*------------------------------------------------------------------*/
2658/*
2659 * Get wireless statistics
2660 * Called by /proc/net/wireless...
2661 */
2662static iw_stats *
2663wavelan_get_wireless_stats(struct net_device * dev)
2664{
2665 unsigned int base = dev->base_addr;
2666 net_local * lp = netdev_priv(dev);
2667 mmr_t m;
2668 iw_stats * wstats;
2669 unsigned long flags;
2670
2671#ifdef DEBUG_IOCTL_TRACE
2672 printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n", dev->name);
2673#endif
2674
2675 /* Disable interrupts & save flags */
2676 spin_lock_irqsave(&lp->spinlock, flags);
2677
2678 wstats = &lp->wstats;
2679
2680 /* Get data from the mmc */
2681 mmc_out(base, mmwoff(0, mmw_freeze), 1);
2682
2683 mmc_read(base, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
2684 mmc_read(base, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l, 2);
2685 mmc_read(base, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set, 4);
2686
2687 mmc_out(base, mmwoff(0, mmw_freeze), 0);
2688
2689 /* Copy data to wireless stuff */
2690 wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
2691 wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
2692 wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
2693 wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
2694 wstats->qual.updated = (((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7) |
2695 ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6) |
2696 ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
2697 wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
2698 wstats->discard.code = 0L;
2699 wstats->discard.misc = 0L;
2700
2701 /* ReEnable interrupts & restore flags */
2702 spin_unlock_irqrestore(&lp->spinlock, flags);
2703
2704#ifdef DEBUG_IOCTL_TRACE
2705 printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n", dev->name);
2706#endif
2707 return &lp->wstats;
2708}
2709
2710/************************* PACKET RECEPTION *************************/
2711/*
2712 * This part deal with receiving the packets.
2713 * The interrupt handler get an interrupt when a packet has been
2714 * successfully received and called this part...
2715 */
2716
2717/*------------------------------------------------------------------*/
2718/*
2719 * Calculate the starting address of the frame pointed to by the receive
2720 * frame pointer and verify that the frame seem correct
2721 * (called by wv_packet_rcv())
2722 */
2723static int
2724wv_start_of_frame(struct net_device * dev,
2725 int rfp, /* end of frame */
2726 int wrap) /* start of buffer */
2727{
2728 unsigned int base = dev->base_addr;
2729 int rp;
2730 int len;
2731
2732 rp = (rfp - 5 + RX_SIZE) % RX_SIZE;
2733 outb(rp & 0xff, PIORL(base));
2734 outb(((rp >> 8) & PIORH_MASK), PIORH(base));
2735 len = inb(PIOP(base));
2736 len |= inb(PIOP(base)) << 8;
2737
2738 /* Sanity checks on size */
2739 /* Frame too big */
2740 if(len > MAXDATAZ + 100)
2741 {
2742#ifdef DEBUG_RX_ERROR
2743 printk(KERN_INFO "%s: wv_start_of_frame: Received frame too large, rfp %d len 0x%x\n",
2744 dev->name, rfp, len);
2745#endif
2746 return(-1);
2747 }
2748
2749 /* Frame too short */
2750 if(len < 7)
2751 {
2752#ifdef DEBUG_RX_ERROR
2753 printk(KERN_INFO "%s: wv_start_of_frame: Received null frame, rfp %d len 0x%x\n",
2754 dev->name, rfp, len);
2755#endif
2756 return(-1);
2757 }
2758
2759 /* Wrap around buffer */
2760 if(len > ((wrap - (rfp - len) + RX_SIZE) % RX_SIZE)) /* magic formula ! */
2761 {
2762#ifdef DEBUG_RX_ERROR
2763 printk(KERN_INFO "%s: wv_start_of_frame: wrap around buffer, wrap %d rfp %d len 0x%x\n",
2764 dev->name, wrap, rfp, len);
2765#endif
2766 return(-1);
2767 }
2768
2769 return((rp - len + RX_SIZE) % RX_SIZE);
2770} /* wv_start_of_frame */
2771
2772/*------------------------------------------------------------------*/
2773/*
2774 * This routine does the actual copy of data (including the ethernet
2775 * header structure) from the WaveLAN card to an sk_buff chain that
2776 * will be passed up to the network interface layer. NOTE: We
2777 * currently don't handle trailer protocols (neither does the rest of
2778 * the network interface), so if that is needed, it will (at least in
2779 * part) be added here. The contents of the receive ring buffer are
2780 * copied to a message chain that is then passed to the kernel.
2781 *
2782 * Note: if any errors occur, the packet is "dropped on the floor"
2783 * (called by wv_packet_rcv())
2784 */
2785static void
2786wv_packet_read(struct net_device * dev,
2787 int fd_p,
2788 int sksize)
2789{
2790 net_local * lp = netdev_priv(dev);
2791 struct sk_buff * skb;
2792
2793#ifdef DEBUG_RX_TRACE
2794 printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
2795 dev->name, fd_p, sksize);
2796#endif
2797
2798 /* Allocate some buffer for the new packet */
2799 if((skb = dev_alloc_skb(sksize+2)) == (struct sk_buff *) NULL)
2800 {
2801#ifdef DEBUG_RX_ERROR
2802 printk(KERN_INFO "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC)\n",
2803 dev->name, sksize);
2804#endif
2805 dev->stats.rx_dropped++;
2806 /*
2807 * Not only do we want to return here, but we also need to drop the
2808 * packet on the floor to clear the interrupt.
2809 */
2810 return;
2811 }
2812
2813 skb_reserve(skb, 2);
2814 fd_p = read_ringbuf(dev, fd_p, (char *) skb_put(skb, sksize), sksize);
2815 skb->protocol = eth_type_trans(skb, dev);
2816
2817#ifdef DEBUG_RX_INFO
2818 wv_packet_info(skb_mac_header(skb), sksize, dev->name, "wv_packet_read");
2819#endif /* DEBUG_RX_INFO */
2820
2821 /* Statistics gathering & stuff associated.
2822 * It seem a bit messy with all the define, but it's really simple... */
2823 if(
2824#ifdef IW_WIRELESS_SPY
2825 (lp->spy_data.spy_number > 0) ||
2826#endif /* IW_WIRELESS_SPY */
2827#ifdef HISTOGRAM
2828 (lp->his_number > 0) ||
2829#endif /* HISTOGRAM */
2830#ifdef WAVELAN_ROAMING
2831 (do_roaming) ||
2832#endif /* WAVELAN_ROAMING */
2833 0)
2834 {
2835 u_char stats[3]; /* Signal level, Noise level, Signal quality */
2836
2837 /* read signal level, silence level and signal quality bytes */
2838 fd_p = read_ringbuf(dev, (fd_p + 4) % RX_SIZE + RX_BASE,
2839 stats, 3);
2840#ifdef DEBUG_RX_INFO
2841 printk(KERN_DEBUG "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
2842 dev->name, stats[0] & 0x3F, stats[1] & 0x3F, stats[2] & 0x0F);
2843#endif
2844
2845#ifdef WAVELAN_ROAMING
2846 if(do_roaming)
2847 if(WAVELAN_BEACON(skb->data))
2848 wl_roam_gather(dev, skb->data, stats);
2849#endif /* WAVELAN_ROAMING */
2850
2851#ifdef WIRELESS_SPY
2852 wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE, stats);
2853#endif /* WIRELESS_SPY */
2854#ifdef HISTOGRAM
2855 wl_his_gather(dev, stats);
2856#endif /* HISTOGRAM */
2857 }
2858
2859 /*
2860 * Hand the packet to the Network Module
2861 */
2862 netif_rx(skb);
2863
2864 /* Keep stats up to date */
2865 dev->stats.rx_packets++;
2866 dev->stats.rx_bytes += sksize;
2867
2868#ifdef DEBUG_RX_TRACE
2869 printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
2870#endif
2871 return;
2872}
2873
2874/*------------------------------------------------------------------*/
2875/*
2876 * This routine is called by the interrupt handler to initiate a
2877 * packet transfer from the card to the network interface layer above
2878 * this driver. This routine checks if a buffer has been successfully
2879 * received by the WaveLAN card. If so, the routine wv_packet_read is
2880 * called to do the actual transfer of the card's data including the
2881 * ethernet header into a packet consisting of an sk_buff chain.
2882 * (called by wavelan_interrupt())
2883 * Note : the spinlock is already grabbed for us and irq are disabled.
2884 */
2885static void
2886wv_packet_rcv(struct net_device * dev)
2887{
2888 unsigned int base = dev->base_addr;
2889 net_local * lp = netdev_priv(dev);
2890 int newrfp;
2891 int rp;
2892 int len;
2893 int f_start;
2894 int status;
2895 int i593_rfp;
2896 int stat_ptr;
2897 u_char c[4];
2898
2899#ifdef DEBUG_RX_TRACE
2900 printk(KERN_DEBUG "%s: ->wv_packet_rcv()\n", dev->name);
2901#endif
2902
2903 /* Get the new receive frame pointer from the i82593 chip */
2904 outb(CR0_STATUS_2 | OP0_NOP, LCCR(base));
2905 i593_rfp = inb(LCSR(base));
2906 i593_rfp |= inb(LCSR(base)) << 8;
2907 i593_rfp %= RX_SIZE;
2908
2909 /* Get the new receive frame pointer from the WaveLAN card.
2910 * It is 3 bytes more than the increment of the i82593 receive
2911 * frame pointer, for each packet. This is because it includes the
2912 * 3 roaming bytes added by the mmc.
2913 */
2914 newrfp = inb(RPLL(base));
2915 newrfp |= inb(RPLH(base)) << 8;
2916 newrfp %= RX_SIZE;
2917
2918#ifdef DEBUG_RX_INFO
2919 printk(KERN_DEBUG "%s: wv_packet_rcv(): i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
2920 dev->name, i593_rfp, lp->stop, newrfp, lp->rfp);
2921#endif
2922
2923#ifdef DEBUG_RX_ERROR
2924 /* If no new frame pointer... */
2925 if(lp->overrunning || newrfp == lp->rfp)
2926 printk(KERN_INFO "%s: wv_packet_rcv(): no new frame: i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
2927 dev->name, i593_rfp, lp->stop, newrfp, lp->rfp);
2928#endif
2929
2930 /* Read all frames (packets) received */
2931 while(newrfp != lp->rfp)
2932 {
2933 /* A frame is composed of the packet, followed by a status word,
2934 * the length of the frame (word) and the mmc info (SNR & qual).
2935 * It's because the length is at the end that we can only scan
2936 * frames backward. */
2937
2938 /* Find the first frame by skipping backwards over the frames */
2939 rp = newrfp; /* End of last frame */
2940 while(((f_start = wv_start_of_frame(dev, rp, newrfp)) != lp->rfp) &&
2941 (f_start != -1))
2942 rp = f_start;
2943
2944 /* If we had a problem */
2945 if(f_start == -1)
2946 {
2947#ifdef DEBUG_RX_ERROR
2948 printk(KERN_INFO "wavelan_cs: cannot find start of frame ");
2949 printk(" i593_rfp %d stop %d newrfp %d lp->rfp %d\n",
2950 i593_rfp, lp->stop, newrfp, lp->rfp);
2951#endif
2952 lp->rfp = rp; /* Get to the last usable frame */
2953 continue;
2954 }
2955
2956 /* f_start point to the beggining of the first frame received
2957 * and rp to the beggining of the next one */
2958
2959 /* Read status & length of the frame */
2960 stat_ptr = (rp - 7 + RX_SIZE) % RX_SIZE;
2961 stat_ptr = read_ringbuf(dev, stat_ptr, c, 4);
2962 status = c[0] | (c[1] << 8);
2963 len = c[2] | (c[3] << 8);
2964
2965 /* Check status */
2966 if((status & RX_RCV_OK) != RX_RCV_OK)
2967 {
2968 dev->stats.rx_errors++;
2969 if(status & RX_NO_SFD)
2970 dev->stats.rx_frame_errors++;
2971 if(status & RX_CRC_ERR)
2972 dev->stats.rx_crc_errors++;
2973 if(status & RX_OVRRUN)
2974 dev->stats.rx_over_errors++;
2975
2976#ifdef DEBUG_RX_FAIL
2977 printk(KERN_DEBUG "%s: wv_packet_rcv(): packet not received ok, status = 0x%x\n",
2978 dev->name, status);
2979#endif
2980 }
2981 else
2982 /* Read the packet and transmit to Linux */
2983 wv_packet_read(dev, f_start, len - 2);
2984
2985 /* One frame has been processed, skip it */
2986 lp->rfp = rp;
2987 }
2988
2989 /*
2990 * Update the frame stop register, but set it to less than
2991 * the full 8K to allow space for 3 bytes of signal strength
2992 * per packet.
2993 */
2994 lp->stop = (i593_rfp + RX_SIZE - ((RX_SIZE / 64) * 3)) % RX_SIZE;
2995 outb(OP0_SWIT_TO_PORT_1 | CR0_CHNL, LCCR(base));
2996 outb(CR1_STOP_REG_UPDATE | (lp->stop >> RX_SIZE_SHIFT), LCCR(base));
2997 outb(OP1_SWIT_TO_PORT_0, LCCR(base));
2998
2999#ifdef DEBUG_RX_TRACE
3000 printk(KERN_DEBUG "%s: <-wv_packet_rcv()\n", dev->name);
3001#endif
3002}
3003
3004/*********************** PACKET TRANSMISSION ***********************/
3005/*
3006 * This part deal with sending packet through the wavelan
3007 * We copy the packet to the send buffer and then issue the send
3008 * command to the i82593. The result of this operation will be
3009 * checked in wavelan_interrupt()
3010 */
3011
3012/*------------------------------------------------------------------*/
3013/*
3014 * This routine fills in the appropriate registers and memory
3015 * locations on the WaveLAN card and starts the card off on
3016 * the transmit.
3017 * (called in wavelan_packet_xmit())
3018 */
3019static void
3020wv_packet_write(struct net_device * dev,
3021 void * buf,
3022 short length)
3023{
3024 net_local * lp = netdev_priv(dev);
3025 unsigned int base = dev->base_addr;
3026 unsigned long flags;
3027 int clen = length;
3028 register u_short xmtdata_base = TX_BASE;
3029
3030#ifdef DEBUG_TX_TRACE
3031 printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name, length);
3032#endif
3033
3034 spin_lock_irqsave(&lp->spinlock, flags);
3035
3036 /* Write the length of data buffer followed by the buffer */
3037 outb(xmtdata_base & 0xff, PIORL(base));
3038 outb(((xmtdata_base >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3039 outb(clen & 0xff, PIOP(base)); /* lsb */
3040 outb(clen >> 8, PIOP(base)); /* msb */
3041
3042 /* Send the data */
3043 outsb(PIOP(base), buf, clen);
3044
3045 /* Indicate end of transmit chain */
3046 outb(OP0_NOP, PIOP(base));
3047 /* josullvn@cs.cmu.edu: need to send a second NOP for alignment... */
3048 outb(OP0_NOP, PIOP(base));
3049
3050 /* Reset the transmit DMA pointer */
3051 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3052 hacr_write(base, HACR_DEFAULT);
3053 /* Send the transmit command */
3054 wv_82593_cmd(dev, "wv_packet_write(): transmit",
3055 OP0_TRANSMIT, SR0_NO_RESULT);
3056
3057 /* Make sure the watchdog will keep quiet for a while */
3058 dev->trans_start = jiffies;
3059
3060 /* Keep stats up to date */
3061 dev->stats.tx_bytes += length;
3062
3063 spin_unlock_irqrestore(&lp->spinlock, flags);
3064
3065#ifdef DEBUG_TX_INFO
3066 wv_packet_info((u_char *) buf, length, dev->name, "wv_packet_write");
3067#endif /* DEBUG_TX_INFO */
3068
3069#ifdef DEBUG_TX_TRACE
3070 printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
3071#endif
3072}
3073
3074/*------------------------------------------------------------------*/
3075/*
3076 * This routine is called when we want to send a packet (NET3 callback)
3077 * In this routine, we check if the harware is ready to accept
3078 * the packet. We also prevent reentrance. Then, we call the function
3079 * to send the packet...
3080 */
3081static netdev_tx_t
3082wavelan_packet_xmit(struct sk_buff * skb,
3083 struct net_device * dev)
3084{
3085 net_local * lp = netdev_priv(dev);
3086 unsigned long flags;
3087
3088#ifdef DEBUG_TX_TRACE
3089 printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
3090 (unsigned) skb);
3091#endif
3092
3093 /*
3094 * Block a timer-based transmit from overlapping a previous transmit.
3095 * In other words, prevent reentering this routine.
3096 */
3097 netif_stop_queue(dev);
3098
3099 /* If somebody has asked to reconfigure the controller,
3100 * we can do it now */
3101 if(lp->reconfig_82593)
3102 {
3103 spin_lock_irqsave(&lp->spinlock, flags); /* Disable interrupts */
3104 wv_82593_config(dev);
3105 spin_unlock_irqrestore(&lp->spinlock, flags); /* Re-enable interrupts */
3106 /* Note : the configure procedure was totally synchronous,
3107 * so the Tx buffer is now free */
3108 }
3109
3110 /* Check if we need some padding */
3111 /* Note : on wireless the propagation time is in the order of 1us,
3112 * and we don't have the Ethernet specific requirement of beeing
3113 * able to detect collisions, therefore in theory we don't really
3114 * need to pad. Jean II */
3115 if (skb_padto(skb, ETH_ZLEN))
3116 return NETDEV_TX_OK;
3117
3118 wv_packet_write(dev, skb->data, skb->len);
3119
3120 dev_kfree_skb(skb);
3121
3122#ifdef DEBUG_TX_TRACE
3123 printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
3124#endif
3125 return NETDEV_TX_OK;
3126}
3127
3128/********************** HARDWARE CONFIGURATION **********************/
3129/*
3130 * This part do the real job of starting and configuring the hardware.
3131 */
3132
3133/*------------------------------------------------------------------*/
3134/*
3135 * Routine to initialize the Modem Management Controller.
3136 * (called by wv_hw_config())
3137 */
3138static int
3139wv_mmc_init(struct net_device * dev)
3140{
3141 unsigned int base = dev->base_addr;
3142 psa_t psa;
3143 mmw_t m;
3144 int configured;
3145 int i; /* Loop counter */
3146
3147#ifdef DEBUG_CONFIG_TRACE
3148 printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
3149#endif
3150
3151 /* Read the parameter storage area */
3152 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
3153
3154 /*
3155 * Check the first three octets of the MAC addr for the manufacturer's code.
3156 * Note: If you get the error message below, you've got a
3157 * non-NCR/AT&T/Lucent PCMCIA cards, see wavelan_cs.h for detail on
3158 * how to configure your card...
3159 */
3160 for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
3161 if ((psa.psa_univ_mac_addr[0] == MAC_ADDRESSES[i][0]) &&
3162 (psa.psa_univ_mac_addr[1] == MAC_ADDRESSES[i][1]) &&
3163 (psa.psa_univ_mac_addr[2] == MAC_ADDRESSES[i][2]))
3164 break;
3165
3166 /* If we have not found it... */
3167 if (i == ARRAY_SIZE(MAC_ADDRESSES))
3168 {
3169#ifdef DEBUG_CONFIG_ERRORS
3170 printk(KERN_WARNING "%s: wv_mmc_init(): Invalid MAC address: %02X:%02X:%02X:...\n",
3171 dev->name, psa.psa_univ_mac_addr[0],
3172 psa.psa_univ_mac_addr[1], psa.psa_univ_mac_addr[2]);
3173#endif
3174 return FALSE;
3175 }
3176
3177 /* Get the MAC address */
3178 memcpy(&dev->dev_addr[0], &psa.psa_univ_mac_addr[0], WAVELAN_ADDR_SIZE);
3179
3180#ifdef USE_PSA_CONFIG
3181 configured = psa.psa_conf_status & 1;
3182#else
3183 configured = 0;
3184#endif
3185
3186 /* Is the PSA is not configured */
3187 if(!configured)
3188 {
3189 /* User will be able to configure NWID after (with iwconfig) */
3190 psa.psa_nwid[0] = 0;
3191 psa.psa_nwid[1] = 0;
3192
3193 /* As NWID is not set : no NWID checking */
3194 psa.psa_nwid_select = 0;
3195
3196 /* Disable encryption */
3197 psa.psa_encryption_select = 0;
3198
3199 /* Set to standard values
3200 * 0x04 for AT,
3201 * 0x01 for MCA,
3202 * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
3203 */
3204 if (psa.psa_comp_number & 1)
3205 psa.psa_thr_pre_set = 0x01;
3206 else
3207 psa.psa_thr_pre_set = 0x04;
3208 psa.psa_quality_thr = 0x03;
3209
3210 /* It is configured */
3211 psa.psa_conf_status |= 1;
3212
3213#ifdef USE_PSA_CONFIG
3214 /* Write the psa */
3215 psa_write(dev, (char *)psa.psa_nwid - (char *)&psa,
3216 (unsigned char *)psa.psa_nwid, 4);
3217 psa_write(dev, (char *)&psa.psa_thr_pre_set - (char *)&psa,
3218 (unsigned char *)&psa.psa_thr_pre_set, 1);
3219 psa_write(dev, (char *)&psa.psa_quality_thr - (char *)&psa,
3220 (unsigned char *)&psa.psa_quality_thr, 1);
3221 psa_write(dev, (char *)&psa.psa_conf_status - (char *)&psa,
3222 (unsigned char *)&psa.psa_conf_status, 1);
3223 /* update the Wavelan checksum */
3224 update_psa_checksum(dev);
3225#endif /* USE_PSA_CONFIG */
3226 }
3227
3228 /* Zero the mmc structure */
3229 memset(&m, 0x00, sizeof(m));
3230
3231 /* Copy PSA info to the mmc */
3232 m.mmw_netw_id_l = psa.psa_nwid[1];
3233 m.mmw_netw_id_h = psa.psa_nwid[0];
3234
3235 if(psa.psa_nwid_select & 1)
3236 m.mmw_loopt_sel = 0x00;
3237 else
3238 m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
3239
3240 memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
3241 sizeof(m.mmw_encr_key));
3242
3243 if(psa.psa_encryption_select)
3244 m.mmw_encr_enable = MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
3245 else
3246 m.mmw_encr_enable = 0;
3247
3248 m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
3249 m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
3250
3251 /*
3252 * Set default modem control parameters.
3253 * See NCR document 407-0024326 Rev. A.
3254 */
3255 m.mmw_jabber_enable = 0x01;
3256 m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
3257 m.mmw_ifs = 0x20;
3258 m.mmw_mod_delay = 0x04;
3259 m.mmw_jam_time = 0x38;
3260
3261 m.mmw_des_io_invert = 0;
3262 m.mmw_freeze = 0;
3263 m.mmw_decay_prm = 0;
3264 m.mmw_decay_updat_prm = 0;
3265
3266 /* Write all info to mmc */
3267 mmc_write(base, 0, (u_char *)&m, sizeof(m));
3268
3269 /* The following code start the modem of the 2.00 frequency
3270 * selectable cards at power on. It's not strictly needed for the
3271 * following boots...
3272 * The original patch was by Joe Finney for the PCMCIA driver, but
3273 * I've cleaned it a bit and add documentation.
3274 * Thanks to Loeke Brederveld from Lucent for the info.
3275 */
3276
3277 /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
3278 * (does it work for everybody ? - especially old cards...) */
3279 /* Note : WFREQSEL verify that it is able to read from EEprom
3280 * a sensible frequency (address 0x00) + that MMR_FEE_STATUS_ID
3281 * is 0xA (Xilinx version) or 0xB (Ariadne version).
3282 * My test is more crude but do work... */
3283 if(!(mmc_in(base, mmroff(0, mmr_fee_status)) &
3284 (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
3285 {
3286 /* We must download the frequency parameters to the
3287 * synthetisers (from the EEprom - area 1)
3288 * Note : as the EEprom is auto decremented, we set the end
3289 * if the area... */
3290 m.mmw_fee_addr = 0x0F;
3291 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3292 mmc_write(base, (char *)&m.mmw_fee_ctrl - (char *)&m,
3293 (unsigned char *)&m.mmw_fee_ctrl, 2);
3294
3295 /* Wait until the download is finished */
3296 fee_wait(base, 100, 100);
3297
3298#ifdef DEBUG_CONFIG_INFO
3299 /* The frequency was in the last word downloaded... */
3300 mmc_read(base, (char *)&m.mmw_fee_data_l - (char *)&m,
3301 (unsigned char *)&m.mmw_fee_data_l, 2);
3302
3303 /* Print some info for the user */
3304 printk(KERN_DEBUG "%s: Wavelan 2.00 recognised (frequency select) : Current frequency = %ld\n",
3305 dev->name,
3306 ((m.mmw_fee_data_h << 4) |
3307 (m.mmw_fee_data_l >> 4)) * 5 / 2 + 24000L);
3308#endif
3309
3310 /* We must now download the power adjust value (gain) to
3311 * the synthetisers (from the EEprom - area 7 - DAC) */
3312 m.mmw_fee_addr = 0x61;
3313 m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
3314 mmc_write(base, (char *)&m.mmw_fee_ctrl - (char *)&m,
3315 (unsigned char *)&m.mmw_fee_ctrl, 2);
3316
3317 /* Wait until the download is finished */
3318 } /* if 2.00 card */
3319
3320#ifdef DEBUG_CONFIG_TRACE
3321 printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
3322#endif
3323 return TRUE;
3324}
3325
3326/*------------------------------------------------------------------*/
3327/*
3328 * Routine to gracefully turn off reception, and wait for any commands
3329 * to complete.
3330 * (called in wv_ru_start() and wavelan_close() and wavelan_event())
3331 */
3332static int
3333wv_ru_stop(struct net_device * dev)
3334{
3335 unsigned int base = dev->base_addr;
3336 net_local * lp = netdev_priv(dev);
3337 unsigned long flags;
3338 int status;
3339 int spin;
3340
3341#ifdef DEBUG_CONFIG_TRACE
3342 printk(KERN_DEBUG "%s: ->wv_ru_stop()\n", dev->name);
3343#endif
3344
3345 spin_lock_irqsave(&lp->spinlock, flags);
3346
3347 /* First, send the LAN controller a stop receive command */
3348 wv_82593_cmd(dev, "wv_graceful_shutdown(): stop-rcv",
3349 OP0_STOP_RCV, SR0_NO_RESULT);
3350
3351 /* Then, spin until the receive unit goes idle */
3352 spin = 300;
3353 do
3354 {
3355 udelay(10);
3356 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
3357 status = inb(LCSR(base));
3358 }
3359 while(((status & SR3_RCV_STATE_MASK) != SR3_RCV_IDLE) && (spin-- > 0));
3360
3361 /* Now, spin until the chip finishes executing its current command */
3362 do
3363 {
3364 udelay(10);
3365 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
3366 status = inb(LCSR(base));
3367 }
3368 while(((status & SR3_EXEC_STATE_MASK) != SR3_EXEC_IDLE) && (spin-- > 0));
3369
3370 spin_unlock_irqrestore(&lp->spinlock, flags);
3371
3372 /* If there was a problem */
3373 if(spin <= 0)
3374 {
3375#ifdef DEBUG_CONFIG_ERRORS
3376 printk(KERN_INFO "%s: wv_ru_stop(): The chip doesn't want to stop...\n",
3377 dev->name);
3378#endif
3379 return FALSE;
3380 }
3381
3382#ifdef DEBUG_CONFIG_TRACE
3383 printk(KERN_DEBUG "%s: <-wv_ru_stop()\n", dev->name);
3384#endif
3385 return TRUE;
3386} /* wv_ru_stop */
3387
3388/*------------------------------------------------------------------*/
3389/*
3390 * This routine starts the receive unit running. First, it checks if
3391 * the card is actually ready. Then the card is instructed to receive
3392 * packets again.
3393 * (called in wv_hw_reset() & wavelan_open())
3394 */
3395static int
3396wv_ru_start(struct net_device * dev)
3397{
3398 unsigned int base = dev->base_addr;
3399 net_local * lp = netdev_priv(dev);
3400 unsigned long flags;
3401
3402#ifdef DEBUG_CONFIG_TRACE
3403 printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
3404#endif
3405
3406 /*
3407 * We need to start from a quiescent state. To do so, we could check
3408 * if the card is already running, but instead we just try to shut
3409 * it down. First, we disable reception (in case it was already enabled).
3410 */
3411 if(!wv_ru_stop(dev))
3412 return FALSE;
3413
3414 spin_lock_irqsave(&lp->spinlock, flags);
3415
3416 /* Now we know that no command is being executed. */
3417
3418 /* Set the receive frame pointer and stop pointer */
3419 lp->rfp = 0;
3420 outb(OP0_SWIT_TO_PORT_1 | CR0_CHNL, LCCR(base));
3421
3422 /* Reset ring management. This sets the receive frame pointer to 1 */
3423 outb(OP1_RESET_RING_MNGMT, LCCR(base));
3424
3425#if 0
3426 /* XXX the i82593 manual page 6-4 seems to indicate that the stop register
3427 should be set as below */
3428 /* outb(CR1_STOP_REG_UPDATE|((RX_SIZE - 0x40)>> RX_SIZE_SHIFT),LCCR(base));*/
3429#elif 0
3430 /* but I set it 0 instead */
3431 lp->stop = 0;
3432#else
3433 /* but I set it to 3 bytes per packet less than 8K */
3434 lp->stop = (0 + RX_SIZE - ((RX_SIZE / 64) * 3)) % RX_SIZE;
3435#endif
3436 outb(CR1_STOP_REG_UPDATE | (lp->stop >> RX_SIZE_SHIFT), LCCR(base));
3437 outb(OP1_INT_ENABLE, LCCR(base));
3438 outb(OP1_SWIT_TO_PORT_0, LCCR(base));
3439
3440 /* Reset receive DMA pointer */
3441 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3442 hacr_write_slow(base, HACR_DEFAULT);
3443
3444 /* Receive DMA on channel 1 */
3445 wv_82593_cmd(dev, "wv_ru_start(): rcv-enable",
3446 CR0_CHNL | OP0_RCV_ENABLE, SR0_NO_RESULT);
3447
3448#ifdef DEBUG_I82593_SHOW
3449 {
3450 int status;
3451 int opri;
3452 int spin = 10000;
3453
3454 /* spin until the chip starts receiving */
3455 do
3456 {
3457 outb(OP0_NOP | CR0_STATUS_3, LCCR(base));
3458 status = inb(LCSR(base));
3459 if(spin-- <= 0)
3460 break;
3461 }
3462 while(((status & SR3_RCV_STATE_MASK) != SR3_RCV_ACTIVE) &&
3463 ((status & SR3_RCV_STATE_MASK) != SR3_RCV_READY));
3464 printk(KERN_DEBUG "rcv status is 0x%x [i:%d]\n",
3465 (status & SR3_RCV_STATE_MASK), i);
3466 }
3467#endif
3468
3469 spin_unlock_irqrestore(&lp->spinlock, flags);
3470
3471#ifdef DEBUG_CONFIG_TRACE
3472 printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
3473#endif
3474 return TRUE;
3475}
3476
3477/*------------------------------------------------------------------*/
3478/*
3479 * This routine does a standard config of the WaveLAN controller (i82593).
3480 * In the ISA driver, this is integrated in wavelan_hardware_reset()
3481 * (called by wv_hw_config(), wv_82593_reconfig() & wavelan_packet_xmit())
3482 */
3483static int
3484wv_82593_config(struct net_device * dev)
3485{
3486 unsigned int base = dev->base_addr;
3487 net_local * lp = netdev_priv(dev);
3488 struct i82593_conf_block cfblk;
3489 int ret = TRUE;
3490
3491#ifdef DEBUG_CONFIG_TRACE
3492 printk(KERN_DEBUG "%s: ->wv_82593_config()\n", dev->name);
3493#endif
3494
3495 /* Create & fill i82593 config block
3496 *
3497 * Now conform to Wavelan document WCIN085B
3498 */
3499 memset(&cfblk, 0x00, sizeof(struct i82593_conf_block));
3500 cfblk.d6mod = FALSE; /* Run in i82593 advanced mode */
3501 cfblk.fifo_limit = 5; /* = 56 B rx and 40 B tx fifo thresholds */
3502 cfblk.forgnesi = FALSE; /* 0=82C501, 1=AMD7992B compatibility */
3503 cfblk.fifo_32 = 1;
3504 cfblk.throttle_enb = FALSE;
3505 cfblk.contin = TRUE; /* enable continuous mode */
3506 cfblk.cntrxint = FALSE; /* enable continuous mode receive interrupts */
3507 cfblk.addr_len = WAVELAN_ADDR_SIZE;
3508 cfblk.acloc = TRUE; /* Disable source addr insertion by i82593 */
3509 cfblk.preamb_len = 0; /* 2 bytes preamble (SFD) */
3510 cfblk.loopback = FALSE;
3511 cfblk.lin_prio = 0; /* conform to 802.3 backoff algorithm */
3512 cfblk.exp_prio = 5; /* conform to 802.3 backoff algorithm */
3513 cfblk.bof_met = 1; /* conform to 802.3 backoff algorithm */
3514 cfblk.ifrm_spc = 0x20 >> 4; /* 32 bit times interframe spacing */
3515 cfblk.slottim_low = 0x20 >> 5; /* 32 bit times slot time */
3516 cfblk.slottim_hi = 0x0;
3517 cfblk.max_retr = 15;
3518 cfblk.prmisc = ((lp->promiscuous) ? TRUE: FALSE); /* Promiscuous mode */
3519 cfblk.bc_dis = FALSE; /* Enable broadcast reception */
3520 cfblk.crs_1 = TRUE; /* Transmit without carrier sense */
3521 cfblk.nocrc_ins = FALSE; /* i82593 generates CRC */
3522 cfblk.crc_1632 = FALSE; /* 32-bit Autodin-II CRC */
3523 cfblk.crs_cdt = FALSE; /* CD not to be interpreted as CS */
3524 cfblk.cs_filter = 0; /* CS is recognized immediately */
3525 cfblk.crs_src = FALSE; /* External carrier sense */
3526 cfblk.cd_filter = 0; /* CD is recognized immediately */
3527 cfblk.min_fr_len = ETH_ZLEN >> 2; /* Minimum frame length 64 bytes */
3528 cfblk.lng_typ = FALSE; /* Length field > 1500 = type field */
3529 cfblk.lng_fld = TRUE; /* Disable 802.3 length field check */
3530 cfblk.rxcrc_xf = TRUE; /* Don't transfer CRC to memory */
3531 cfblk.artx = TRUE; /* Disable automatic retransmission */
3532 cfblk.sarec = TRUE; /* Disable source addr trig of CD */
3533 cfblk.tx_jabber = TRUE; /* Disable jabber jam sequence */
3534 cfblk.hash_1 = FALSE; /* Use bits 0-5 in mc address hash */
3535 cfblk.lbpkpol = TRUE; /* Loopback pin active high */
3536 cfblk.fdx = FALSE; /* Disable full duplex operation */
3537 cfblk.dummy_6 = 0x3f; /* all ones */
3538 cfblk.mult_ia = FALSE; /* No multiple individual addresses */
3539 cfblk.dis_bof = FALSE; /* Disable the backoff algorithm ?! */
3540 cfblk.dummy_1 = TRUE; /* set to 1 */
3541 cfblk.tx_ifs_retrig = 3; /* Hmm... Disabled */
3542#ifdef MULTICAST_ALL
3543 cfblk.mc_all = (lp->allmulticast ? TRUE: FALSE); /* Allow all multicasts */
3544#else
3545 cfblk.mc_all = FALSE; /* No multicast all mode */
3546#endif
3547 cfblk.rcv_mon = 0; /* Monitor mode disabled */
3548 cfblk.frag_acpt = TRUE; /* Do not accept fragments */
3549 cfblk.tstrttrs = FALSE; /* No start transmission threshold */
3550 cfblk.fretx = TRUE; /* FIFO automatic retransmission */
3551 cfblk.syncrqs = FALSE; /* Synchronous DRQ deassertion... */
3552 cfblk.sttlen = TRUE; /* 6 byte status registers */
3553 cfblk.rx_eop = TRUE; /* Signal EOP on packet reception */
3554 cfblk.tx_eop = TRUE; /* Signal EOP on packet transmission */
3555 cfblk.rbuf_size = RX_SIZE>>11; /* Set receive buffer size */
3556 cfblk.rcvstop = TRUE; /* Enable Receive Stop Register */
3557
3558#ifdef DEBUG_I82593_SHOW
3559 print_hex_dump(KERN_DEBUG, "wavelan_cs: config block: ", DUMP_PREFIX_NONE,
3560 16, 1, &cfblk, sizeof(struct i82593_conf_block), false);
3561#endif
3562
3563 /* Copy the config block to the i82593 */
3564 outb(TX_BASE & 0xff, PIORL(base));
3565 outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3566 outb(sizeof(struct i82593_conf_block) & 0xff, PIOP(base)); /* lsb */
3567 outb(sizeof(struct i82593_conf_block) >> 8, PIOP(base)); /* msb */
3568 outsb(PIOP(base), (char *) &cfblk, sizeof(struct i82593_conf_block));
3569
3570 /* reset transmit DMA pointer */
3571 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3572 hacr_write(base, HACR_DEFAULT);
3573 if(!wv_82593_cmd(dev, "wv_82593_config(): configure",
3574 OP0_CONFIGURE, SR0_CONFIGURE_DONE))
3575 ret = FALSE;
3576
3577 /* Initialize adapter's ethernet MAC address */
3578 outb(TX_BASE & 0xff, PIORL(base));
3579 outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3580 outb(WAVELAN_ADDR_SIZE, PIOP(base)); /* byte count lsb */
3581 outb(0, PIOP(base)); /* byte count msb */
3582 outsb(PIOP(base), &dev->dev_addr[0], WAVELAN_ADDR_SIZE);
3583
3584 /* reset transmit DMA pointer */
3585 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3586 hacr_write(base, HACR_DEFAULT);
3587 if(!wv_82593_cmd(dev, "wv_82593_config(): ia-setup",
3588 OP0_IA_SETUP, SR0_IA_SETUP_DONE))
3589 ret = FALSE;
3590
3591#ifdef WAVELAN_ROAMING
3592 /* If roaming is enabled, join the "Beacon Request" multicast group... */
3593 /* But only if it's not in there already! */
3594 if(do_roaming)
3595 dev_mc_add(dev,WAVELAN_BEACON_ADDRESS, WAVELAN_ADDR_SIZE, 1);
3596#endif /* WAVELAN_ROAMING */
3597
3598 /* If any multicast address to set */
3599 if(lp->mc_count)
3600 {
3601 struct dev_mc_list * dmi;
3602 int addrs_len = WAVELAN_ADDR_SIZE * lp->mc_count;
3603
3604#ifdef DEBUG_CONFIG_INFO
3605 printk(KERN_DEBUG "%s: wv_hw_config(): set %d multicast addresses:\n",
3606 dev->name, lp->mc_count);
3607 for(dmi=dev->mc_list; dmi; dmi=dmi->next)
3608 printk(KERN_DEBUG " %pM\n", dmi->dmi_addr);
3609#endif
3610
3611 /* Initialize adapter's ethernet multicast addresses */
3612 outb(TX_BASE & 0xff, PIORL(base));
3613 outb(((TX_BASE >> 8) & PIORH_MASK) | PIORH_SEL_TX, PIORH(base));
3614 outb(addrs_len & 0xff, PIOP(base)); /* byte count lsb */
3615 outb((addrs_len >> 8), PIOP(base)); /* byte count msb */
3616 for(dmi=dev->mc_list; dmi; dmi=dmi->next)
3617 outsb(PIOP(base), dmi->dmi_addr, dmi->dmi_addrlen);
3618
3619 /* reset transmit DMA pointer */
3620 hacr_write_slow(base, HACR_PWR_STAT | HACR_TX_DMA_RESET);
3621 hacr_write(base, HACR_DEFAULT);
3622 if(!wv_82593_cmd(dev, "wv_82593_config(): mc-setup",
3623 OP0_MC_SETUP, SR0_MC_SETUP_DONE))
3624 ret = FALSE;
3625 lp->mc_count = dev->mc_count; /* remember to avoid repeated reset */
3626 }
3627
3628 /* Job done, clear the flag */
3629 lp->reconfig_82593 = FALSE;
3630
3631#ifdef DEBUG_CONFIG_TRACE
3632 printk(KERN_DEBUG "%s: <-wv_82593_config()\n", dev->name);
3633#endif
3634 return(ret);
3635}
3636
3637/*------------------------------------------------------------------*/
3638/*
3639 * Read the Access Configuration Register, perform a software reset,
3640 * and then re-enable the card's software.
3641 *
3642 * If I understand correctly : reset the pcmcia interface of the
3643 * wavelan.
3644 * (called by wv_config())
3645 */
3646static int
3647wv_pcmcia_reset(struct net_device * dev)
3648{
3649 int i;
3650 conf_reg_t reg = { 0, CS_READ, CISREG_COR, 0 };
3651 struct pcmcia_device * link = ((net_local *)netdev_priv(dev))->link;
3652
3653#ifdef DEBUG_CONFIG_TRACE
3654 printk(KERN_DEBUG "%s: ->wv_pcmcia_reset()\n", dev->name);
3655#endif
3656
3657 i = pcmcia_access_configuration_register(link, &reg);
3658 if (i != 0)
3659 {
3660 cs_error(link, AccessConfigurationRegister, i);
3661 return FALSE;
3662 }
3663
3664#ifdef DEBUG_CONFIG_INFO
3665 printk(KERN_DEBUG "%s: wavelan_pcmcia_reset(): Config reg is 0x%x\n",
3666 dev->name, (u_int) reg.Value);
3667#endif
3668
3669 reg.Action = CS_WRITE;
3670 reg.Value = reg.Value | COR_SW_RESET;
3671 i = pcmcia_access_configuration_register(link, &reg);
3672 if (i != 0)
3673 {
3674 cs_error(link, AccessConfigurationRegister, i);
3675 return FALSE;
3676 }
3677
3678 reg.Action = CS_WRITE;
3679 reg.Value = COR_LEVEL_IRQ | COR_CONFIG;
3680 i = pcmcia_access_configuration_register(link, &reg);
3681 if (i != 0)
3682 {
3683 cs_error(link, AccessConfigurationRegister, i);
3684 return FALSE;
3685 }
3686
3687#ifdef DEBUG_CONFIG_TRACE
3688 printk(KERN_DEBUG "%s: <-wv_pcmcia_reset()\n", dev->name);
3689#endif
3690 return TRUE;
3691}
3692
3693/*------------------------------------------------------------------*/
3694/*
3695 * wavelan_hw_config() is called after a CARD_INSERTION event is
3696 * received, to configure the wavelan hardware.
3697 * Note that the reception will be enabled in wavelan->open(), so the
3698 * device is configured but idle...
3699 * Performs the following actions:
3700 * 1. A pcmcia software reset (using wv_pcmcia_reset())
3701 * 2. A power reset (reset DMA)
3702 * 3. Reset the LAN controller
3703 * 4. Initialize the radio modem (using wv_mmc_init)
3704 * 5. Configure LAN controller (using wv_82593_config)
3705 * 6. Perform a diagnostic on the LAN controller
3706 * (called by wavelan_event() & wv_hw_reset())
3707 */
3708static int
3709wv_hw_config(struct net_device * dev)
3710{
3711 net_local * lp = netdev_priv(dev);
3712 unsigned int base = dev->base_addr;
3713 unsigned long flags;
3714 int ret = FALSE;
3715
3716#ifdef DEBUG_CONFIG_TRACE
3717 printk(KERN_DEBUG "%s: ->wv_hw_config()\n", dev->name);
3718#endif
3719
3720 /* compile-time check the sizes of structures */
3721 BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
3722 BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
3723 BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
3724
3725 /* Reset the pcmcia interface */
3726 if(wv_pcmcia_reset(dev) == FALSE)
3727 return FALSE;
3728
3729 /* Disable interrupts */
3730 spin_lock_irqsave(&lp->spinlock, flags);
3731
3732 /* Disguised goto ;-) */
3733 do
3734 {
3735 /* Power UP the module + reset the modem + reset host adapter
3736 * (in fact, reset DMA channels) */
3737 hacr_write_slow(base, HACR_RESET);
3738 hacr_write(base, HACR_DEFAULT);
3739
3740 /* Check if the module has been powered up... */
3741 if(hasr_read(base) & HASR_NO_CLK)
3742 {
3743#ifdef DEBUG_CONFIG_ERRORS
3744 printk(KERN_WARNING "%s: wv_hw_config(): modem not connected or not a wavelan card\n",
3745 dev->name);
3746#endif
3747 break;
3748 }
3749
3750 /* initialize the modem */
3751 if(wv_mmc_init(dev) == FALSE)
3752 {
3753#ifdef DEBUG_CONFIG_ERRORS
3754 printk(KERN_WARNING "%s: wv_hw_config(): Can't configure the modem\n",
3755 dev->name);
3756#endif
3757 break;
3758 }
3759
3760 /* reset the LAN controller (i82593) */
3761 outb(OP0_RESET, LCCR(base));
3762 mdelay(1); /* A bit crude ! */
3763
3764 /* Initialize the LAN controller */
3765 if(wv_82593_config(dev) == FALSE)
3766 {
3767#ifdef DEBUG_CONFIG_ERRORS
3768 printk(KERN_INFO "%s: wv_hw_config(): i82593 init failed\n",
3769 dev->name);
3770#endif
3771 break;
3772 }
3773
3774 /* Diagnostic */
3775 if(wv_diag(dev) == FALSE)
3776 {
3777#ifdef DEBUG_CONFIG_ERRORS
3778 printk(KERN_INFO "%s: wv_hw_config(): i82593 diagnostic failed\n",
3779 dev->name);
3780#endif
3781 break;
3782 }
3783
3784 /*
3785 * insert code for loopback test here
3786 */
3787
3788 /* The device is now configured */
3789 lp->configured = 1;
3790 ret = TRUE;
3791 }
3792 while(0);
3793
3794 /* Re-enable interrupts */
3795 spin_unlock_irqrestore(&lp->spinlock, flags);
3796
3797#ifdef DEBUG_CONFIG_TRACE
3798 printk(KERN_DEBUG "%s: <-wv_hw_config()\n", dev->name);
3799#endif
3800 return(ret);
3801}
3802
3803/*------------------------------------------------------------------*/
3804/*
3805 * Totally reset the wavelan and restart it.
3806 * Performs the following actions:
3807 * 1. Call wv_hw_config()
3808 * 2. Start the LAN controller's receive unit
3809 * (called by wavelan_event(), wavelan_watchdog() and wavelan_open())
3810 */
3811static void
3812wv_hw_reset(struct net_device * dev)
3813{
3814 net_local * lp = netdev_priv(dev);
3815
3816#ifdef DEBUG_CONFIG_TRACE
3817 printk(KERN_DEBUG "%s: ->wv_hw_reset()\n", dev->name);
3818#endif
3819
3820 lp->nresets++;
3821 lp->configured = 0;
3822
3823 /* Call wv_hw_config() for most of the reset & init stuff */
3824 if(wv_hw_config(dev) == FALSE)
3825 return;
3826
3827 /* start receive unit */
3828 wv_ru_start(dev);
3829
3830#ifdef DEBUG_CONFIG_TRACE
3831 printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
3832#endif
3833}
3834
3835/*------------------------------------------------------------------*/
3836/*
3837 * wv_pcmcia_config() is called after a CARD_INSERTION event is
3838 * received, to configure the PCMCIA socket, and to make the ethernet
3839 * device available to the system.
3840 * (called by wavelan_event())
3841 */
3842static int
3843wv_pcmcia_config(struct pcmcia_device * link)
3844{
3845 struct net_device * dev = (struct net_device *) link->priv;
3846 int i;
3847 win_req_t req;
3848 memreq_t mem;
3849 net_local * lp = netdev_priv(dev);
3850
3851
3852#ifdef DEBUG_CONFIG_TRACE
3853 printk(KERN_DEBUG "->wv_pcmcia_config(0x%p)\n", link);
3854#endif
3855
3856 do
3857 {
3858 i = pcmcia_request_io(link, &link->io);
3859 if (i != 0)
3860 {
3861 cs_error(link, RequestIO, i);
3862 break;
3863 }
3864
3865 /*
3866 * Now allocate an interrupt line. Note that this does not
3867 * actually assign a handler to the interrupt.
3868 */
3869 i = pcmcia_request_irq(link, &link->irq);
3870 if (i != 0)
3871 {
3872 cs_error(link, RequestIRQ, i);
3873 break;
3874 }
3875
3876 /*
3877 * This actually configures the PCMCIA socket -- setting up
3878 * the I/O windows and the interrupt mapping.
3879 */
3880 link->conf.ConfigIndex = 1;
3881 i = pcmcia_request_configuration(link, &link->conf);
3882 if (i != 0)
3883 {
3884 cs_error(link, RequestConfiguration, i);
3885 break;
3886 }
3887
3888 /*
3889 * Allocate a small memory window. Note that the struct pcmcia_device
3890 * structure provides space for one window handle -- if your
3891 * device needs several windows, you'll need to keep track of
3892 * the handles in your private data structure, link->priv.
3893 */
3894 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
3895 req.Base = req.Size = 0;
3896 req.AccessSpeed = mem_speed;
3897 i = pcmcia_request_window(&link, &req, &link->win);
3898 if (i != 0)
3899 {
3900 cs_error(link, RequestWindow, i);
3901 break;
3902 }
3903
3904 lp->mem = ioremap(req.Base, req.Size);
3905 dev->mem_start = (u_long)lp->mem;
3906 dev->mem_end = dev->mem_start + req.Size;
3907
3908 mem.CardOffset = 0; mem.Page = 0;
3909 i = pcmcia_map_mem_page(link->win, &mem);
3910 if (i != 0)
3911 {
3912 cs_error(link, MapMemPage, i);
3913 break;
3914 }
3915
3916 /* Feed device with this info... */
3917 dev->irq = link->irq.AssignedIRQ;
3918 dev->base_addr = link->io.BasePort1;
3919 netif_start_queue(dev);
3920
3921#ifdef DEBUG_CONFIG_INFO
3922 printk(KERN_DEBUG "wv_pcmcia_config: MEMSTART %p IRQ %d IOPORT 0x%x\n",
3923 lp->mem, dev->irq, (u_int) dev->base_addr);
3924#endif
3925
3926 SET_NETDEV_DEV(dev, &handle_to_dev(link));
3927 i = register_netdev(dev);
3928 if(i != 0)
3929 {
3930#ifdef DEBUG_CONFIG_ERRORS
3931 printk(KERN_INFO "wv_pcmcia_config(): register_netdev() failed\n");
3932#endif
3933 break;
3934 }
3935 }
3936 while(0); /* Humm... Disguised goto !!! */
3937
3938 /* If any step failed, release any partially configured state */
3939 if(i != 0)
3940 {
3941 wv_pcmcia_release(link);
3942 return FALSE;
3943 }
3944
3945 strcpy(((net_local *) netdev_priv(dev))->node.dev_name, dev->name);
3946 link->dev_node = &((net_local *) netdev_priv(dev))->node;
3947
3948#ifdef DEBUG_CONFIG_TRACE
3949 printk(KERN_DEBUG "<-wv_pcmcia_config()\n");
3950#endif
3951 return TRUE;
3952}
3953
3954/*------------------------------------------------------------------*/
3955/*
3956 * After a card is removed, wv_pcmcia_release() will unregister the net
3957 * device, and release the PCMCIA configuration. If the device is
3958 * still open, this will be postponed until it is closed.
3959 */
3960static void
3961wv_pcmcia_release(struct pcmcia_device *link)
3962{
3963 struct net_device * dev = (struct net_device *) link->priv;
3964 net_local * lp = netdev_priv(dev);
3965
3966#ifdef DEBUG_CONFIG_TRACE
3967 printk(KERN_DEBUG "%s: -> wv_pcmcia_release(0x%p)\n", dev->name, link);
3968#endif
3969
3970 iounmap(lp->mem);
3971 pcmcia_disable_device(link);
3972
3973#ifdef DEBUG_CONFIG_TRACE
3974 printk(KERN_DEBUG "%s: <- wv_pcmcia_release()\n", dev->name);
3975#endif
3976}
3977
3978/************************ INTERRUPT HANDLING ************************/
3979
3980/*
3981 * This function is the interrupt handler for the WaveLAN card. This
3982 * routine will be called whenever:
3983 * 1. A packet is received.
3984 * 2. A packet has successfully been transferred and the unit is
3985 * ready to transmit another packet.
3986 * 3. A command has completed execution.
3987 */
3988static irqreturn_t
3989wavelan_interrupt(int irq,
3990 void * dev_id)
3991{
3992 struct net_device * dev = dev_id;
3993 net_local * lp;
3994 unsigned int base;
3995 int status0;
3996 u_int tx_status;
3997
3998#ifdef DEBUG_INTERRUPT_TRACE
3999 printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
4000#endif
4001
4002 lp = netdev_priv(dev);
4003 base = dev->base_addr;
4004
4005#ifdef DEBUG_INTERRUPT_INFO
4006 /* Check state of our spinlock (it should be cleared) */
4007 if(spin_is_locked(&lp->spinlock))
4008 printk(KERN_DEBUG
4009 "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
4010 dev->name);
4011#endif
4012
4013 /* Prevent reentrancy. We need to do that because we may have
4014 * multiple interrupt handler running concurently.
4015 * It is safe because interrupts are disabled before aquiring
4016 * the spinlock. */
4017 spin_lock(&lp->spinlock);
4018
4019 /* Treat all pending interrupts */
4020 while(1)
4021 {
4022 /* ---------------- INTERRUPT CHECKING ---------------- */
4023 /*
4024 * Look for the interrupt and verify the validity
4025 */
4026 outb(CR0_STATUS_0 | OP0_NOP, LCCR(base));
4027 status0 = inb(LCSR(base));
4028
4029#ifdef DEBUG_INTERRUPT_INFO
4030 printk(KERN_DEBUG "status0 0x%x [%s => 0x%x]", status0,
4031 (status0&SR0_INTERRUPT)?"int":"no int",status0&~SR0_INTERRUPT);
4032 if(status0&SR0_INTERRUPT)
4033 {
4034 printk(" [%s => %d]\n", (status0 & SR0_CHNL) ? "chnl" :
4035 ((status0 & SR0_EXECUTION) ? "cmd" :
4036 ((status0 & SR0_RECEPTION) ? "recv" : "unknown")),
4037 (status0 & SR0_EVENT_MASK));
4038 }
4039 else
4040 printk("\n");
4041#endif
4042
4043 /* Return if no actual interrupt from i82593 (normal exit) */
4044 if(!(status0 & SR0_INTERRUPT))
4045 break;
4046
4047 /* If interrupt is both Rx and Tx or none...
4048 * This code in fact is there to catch the spurious interrupt
4049 * when you remove the wavelan pcmcia card from the socket */
4050 if(((status0 & SR0_BOTH_RX_TX) == SR0_BOTH_RX_TX) ||
4051 ((status0 & SR0_BOTH_RX_TX) == 0x0))
4052 {
4053#ifdef DEBUG_INTERRUPT_INFO
4054 printk(KERN_INFO "%s: wv_interrupt(): bogus interrupt (or from dead card) : %X\n",
4055 dev->name, status0);
4056#endif
4057 /* Acknowledge the interrupt */
4058 outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
4059 break;
4060 }
4061
4062 /* ----------------- RECEIVING PACKET ----------------- */
4063 /*
4064 * When the wavelan signal the reception of a new packet,
4065 * we call wv_packet_rcv() to copy if from the buffer and
4066 * send it to NET3
4067 */
4068 if(status0 & SR0_RECEPTION)
4069 {
4070#ifdef DEBUG_INTERRUPT_INFO
4071 printk(KERN_DEBUG "%s: wv_interrupt(): receive\n", dev->name);
4072#endif
4073
4074 if((status0 & SR0_EVENT_MASK) == SR0_STOP_REG_HIT)
4075 {
4076#ifdef DEBUG_INTERRUPT_ERROR
4077 printk(KERN_INFO "%s: wv_interrupt(): receive buffer overflow\n",
4078 dev->name);
4079#endif
4080 dev->stats.rx_over_errors++;
4081 lp->overrunning = 1;
4082 }
4083
4084 /* Get the packet */
4085 wv_packet_rcv(dev);
4086 lp->overrunning = 0;
4087
4088 /* Acknowledge the interrupt */
4089 outb(CR0_INT_ACK | OP0_NOP, LCCR(base));
4090 continue;
4091 }
4092
4093 /* ---------------- COMMAND COMPLETION ---------------- */
4094 /*
4095 * Interrupts issued when the i82593 has completed a command.
4096 * Most likely : transmission done
4097 */
4098
4099 /* If a transmission has been done */
4100 if((status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_DONE ||
4101 (status0 & SR0_EVENT_MASK) == SR0_RETRANSMIT_DONE ||
4102 (status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_NO_CRC_DONE)
4103 {
4104#ifdef DEBUG_TX_ERROR
4105 if((status0 & SR0_EVENT_MASK) == SR0_TRANSMIT_NO_CRC_DONE)
4106 printk(KERN_INFO "%s: wv_interrupt(): packet transmitted without CRC.\n",
4107 dev->name);
4108#endif
4109
4110 /* Get transmission status */
4111 tx_status = inb(LCSR(base));
4112 tx_status |= (inb(LCSR(base)) << 8);
4113#ifdef DEBUG_INTERRUPT_INFO
4114 printk(KERN_DEBUG "%s: wv_interrupt(): transmission done\n",
4115 dev->name);
4116 {
4117 u_int rcv_bytes;
4118 u_char status3;
4119 rcv_bytes = inb(LCSR(base));
4120 rcv_bytes |= (inb(LCSR(base)) << 8);
4121 status3 = inb(LCSR(base));
4122 printk(KERN_DEBUG "tx_status 0x%02x rcv_bytes 0x%02x status3 0x%x\n",
4123 tx_status, rcv_bytes, (u_int) status3);
4124 }
4125#endif
4126 /* Check for possible errors */
4127 if((tx_status & TX_OK) != TX_OK)
4128 {
4129 dev->stats.tx_errors++;
4130
4131 if(tx_status & TX_FRTL)
4132 {
4133#ifdef DEBUG_TX_ERROR
4134 printk(KERN_INFO "%s: wv_interrupt(): frame too long\n",
4135 dev->name);
4136#endif
4137 }
4138 if(tx_status & TX_UND_RUN)
4139 {
4140#ifdef DEBUG_TX_FAIL
4141 printk(KERN_DEBUG "%s: wv_interrupt(): DMA underrun\n",
4142 dev->name);
4143#endif
4144 dev->stats.tx_aborted_errors++;
4145 }
4146 if(tx_status & TX_LOST_CTS)
4147 {
4148#ifdef DEBUG_TX_FAIL
4149 printk(KERN_DEBUG "%s: wv_interrupt(): no CTS\n", dev->name);
4150#endif
4151 dev->stats.tx_carrier_errors++;
4152 }
4153 if(tx_status & TX_LOST_CRS)
4154 {
4155#ifdef DEBUG_TX_FAIL
4156 printk(KERN_DEBUG "%s: wv_interrupt(): no carrier\n",
4157 dev->name);
4158#endif
4159 dev->stats.tx_carrier_errors++;
4160 }
4161 if(tx_status & TX_HRT_BEAT)
4162 {
4163#ifdef DEBUG_TX_FAIL
4164 printk(KERN_DEBUG "%s: wv_interrupt(): heart beat\n", dev->name);
4165#endif
4166 dev->stats.tx_heartbeat_errors++;
4167 }
4168 if(tx_status & TX_DEFER)
4169 {
4170#ifdef DEBUG_TX_FAIL
4171 printk(KERN_DEBUG "%s: wv_interrupt(): channel jammed\n",
4172 dev->name);
4173#endif
4174 }
4175 /* Ignore late collisions since they're more likely to happen
4176 * here (the WaveLAN design prevents the LAN controller from
4177 * receiving while it is transmitting). We take action only when
4178 * the maximum retransmit attempts is exceeded.
4179 */
4180 if(tx_status & TX_COLL)
4181 {
4182 if(tx_status & TX_MAX_COL)
4183 {
4184#ifdef DEBUG_TX_FAIL
4185 printk(KERN_DEBUG "%s: wv_interrupt(): channel congestion\n",
4186 dev->name);
4187#endif
4188 if(!(tx_status & TX_NCOL_MASK))
4189 {
4190 dev->stats.collisions += 0x10;
4191 }
4192 }
4193 }
4194 } /* if(!(tx_status & TX_OK)) */
4195
4196 dev->stats.collisions += (tx_status & TX_NCOL_MASK);
4197 dev->stats.tx_packets++;
4198
4199 netif_wake_queue(dev);
4200 outb(CR0_INT_ACK | OP0_NOP, LCCR(base)); /* Acknowledge the interrupt */
4201 }
4202 else /* if interrupt = transmit done or retransmit done */
4203 {
4204#ifdef DEBUG_INTERRUPT_ERROR
4205 printk(KERN_INFO "wavelan_cs: unknown interrupt, status0 = %02x\n",
4206 status0);
4207#endif
4208 outb(CR0_INT_ACK | OP0_NOP, LCCR(base)); /* Acknowledge the interrupt */
4209 }
4210 } /* while(1) */
4211
4212 spin_unlock(&lp->spinlock);
4213
4214#ifdef DEBUG_INTERRUPT_TRACE
4215 printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
4216#endif
4217
4218 /* We always return IRQ_HANDLED, because we will receive empty
4219 * interrupts under normal operations. Anyway, it doesn't matter
4220 * as we are dealing with an ISA interrupt that can't be shared.
4221 *
4222 * Explanation : under heavy receive, the following happens :
4223 * ->wavelan_interrupt()
4224 * (status0 & SR0_INTERRUPT) != 0
4225 * ->wv_packet_rcv()
4226 * (status0 & SR0_INTERRUPT) != 0
4227 * ->wv_packet_rcv()
4228 * (status0 & SR0_INTERRUPT) == 0 // i.e. no more event
4229 * <-wavelan_interrupt()
4230 * ->wavelan_interrupt()
4231 * (status0 & SR0_INTERRUPT) == 0 // i.e. empty interrupt
4232 * <-wavelan_interrupt()
4233 * Jean II */
4234 return IRQ_HANDLED;
4235} /* wv_interrupt */
4236
4237/*------------------------------------------------------------------*/
4238/*
4239 * Watchdog: when we start a transmission, a timer is set for us in the
4240 * kernel. If the transmission completes, this timer is disabled. If
4241 * the timer expires, we are called and we try to unlock the hardware.
4242 *
4243 * Note : This watchdog is move clever than the one in the ISA driver,
4244 * because it try to abort the current command before reseting
4245 * everything...
4246 * On the other hand, it's a bit simpler, because we don't have to
4247 * deal with the multiple Tx buffers...
4248 */
4249static void
4250wavelan_watchdog(struct net_device * dev)
4251{
4252 net_local * lp = netdev_priv(dev);
4253 unsigned int base = dev->base_addr;
4254 unsigned long flags;
4255 int aborted = FALSE;
4256
4257#ifdef DEBUG_INTERRUPT_TRACE
4258 printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
4259#endif
4260
4261#ifdef DEBUG_INTERRUPT_ERROR
4262 printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
4263 dev->name);
4264#endif
4265
4266 spin_lock_irqsave(&lp->spinlock, flags);
4267
4268 /* Ask to abort the current command */
4269 outb(OP0_ABORT, LCCR(base));
4270
4271 /* Wait for the end of the command (a bit hackish) */
4272 if(wv_82593_cmd(dev, "wavelan_watchdog(): abort",
4273 OP0_NOP | CR0_STATUS_3, SR0_EXECUTION_ABORTED))
4274 aborted = TRUE;
4275
4276 /* Release spinlock here so that wv_hw_reset() can grab it */
4277 spin_unlock_irqrestore(&lp->spinlock, flags);
4278
4279 /* Check if we were successful in aborting it */
4280 if(!aborted)
4281 {
4282 /* It seem that it wasn't enough */
4283#ifdef DEBUG_INTERRUPT_ERROR
4284 printk(KERN_INFO "%s: wavelan_watchdog: abort failed, trying reset\n",
4285 dev->name);
4286#endif
4287 wv_hw_reset(dev);
4288 }
4289
4290#ifdef DEBUG_PSA_SHOW
4291 {
4292 psa_t psa;
4293 psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
4294 wv_psa_show(&psa);
4295 }
4296#endif
4297#ifdef DEBUG_MMC_SHOW
4298 wv_mmc_show(dev);
4299#endif
4300#ifdef DEBUG_I82593_SHOW
4301 wv_ru_show(dev);
4302#endif
4303
4304 /* We are no more waiting for something... */
4305 netif_wake_queue(dev);
4306
4307#ifdef DEBUG_INTERRUPT_TRACE
4308 printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
4309#endif
4310}
4311
4312/********************* CONFIGURATION CALLBACKS *********************/
4313/*
4314 * Here are the functions called by the pcmcia package (cardmgr) and
4315 * linux networking (NET3) for initialization, configuration and
4316 * deinstallations of the Wavelan Pcmcia Hardware.
4317 */
4318
4319/*------------------------------------------------------------------*/
4320/*
4321 * Configure and start up the WaveLAN PCMCIA adaptor.
4322 * Called by NET3 when it "open" the device.
4323 */
4324static int
4325wavelan_open(struct net_device * dev)
4326{
4327 net_local * lp = netdev_priv(dev);
4328 struct pcmcia_device * link = lp->link;
4329 unsigned int base = dev->base_addr;
4330
4331#ifdef DEBUG_CALLBACK_TRACE
4332 printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
4333 (unsigned int) dev);
4334#endif
4335
4336 /* Check if the modem is powered up (wavelan_close() power it down */
4337 if(hasr_read(base) & HASR_NO_CLK)
4338 {
4339 /* Power up (power up time is 250us) */
4340 hacr_write(base, HACR_DEFAULT);
4341
4342 /* Check if the module has been powered up... */
4343 if(hasr_read(base) & HASR_NO_CLK)
4344 {
4345#ifdef DEBUG_CONFIG_ERRORS
4346 printk(KERN_WARNING "%s: wavelan_open(): modem not connected\n",
4347 dev->name);
4348#endif
4349 return FALSE;
4350 }
4351 }
4352
4353 /* Start reception and declare the driver ready */
4354 if(!lp->configured)
4355 return FALSE;
4356 if(!wv_ru_start(dev))
4357 wv_hw_reset(dev); /* If problem : reset */
4358 netif_start_queue(dev);
4359
4360 /* Mark the device as used */
4361 link->open++;
4362
4363#ifdef WAVELAN_ROAMING
4364 if(do_roaming)
4365 wv_roam_init(dev);
4366#endif /* WAVELAN_ROAMING */
4367
4368#ifdef DEBUG_CALLBACK_TRACE
4369 printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
4370#endif
4371 return 0;
4372}
4373
4374/*------------------------------------------------------------------*/
4375/*
4376 * Shutdown the WaveLAN PCMCIA adaptor.
4377 * Called by NET3 when it "close" the device.
4378 */
4379static int
4380wavelan_close(struct net_device * dev)
4381{
4382 struct pcmcia_device * link = ((net_local *)netdev_priv(dev))->link;
4383 unsigned int base = dev->base_addr;
4384
4385#ifdef DEBUG_CALLBACK_TRACE
4386 printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
4387 (unsigned int) dev);
4388#endif
4389
4390 /* If the device isn't open, then nothing to do */
4391 if(!link->open)
4392 {
4393#ifdef DEBUG_CONFIG_INFO
4394 printk(KERN_DEBUG "%s: wavelan_close(): device not open\n", dev->name);
4395#endif
4396 return 0;
4397 }
4398
4399#ifdef WAVELAN_ROAMING
4400 /* Cleanup of roaming stuff... */
4401 if(do_roaming)
4402 wv_roam_cleanup(dev);
4403#endif /* WAVELAN_ROAMING */
4404
4405 link->open--;
4406
4407 /* If the card is still present */
4408 if(netif_running(dev))
4409 {
4410 netif_stop_queue(dev);
4411
4412 /* Stop receiving new messages and wait end of transmission */
4413 wv_ru_stop(dev);
4414
4415 /* Power down the module */
4416 hacr_write(base, HACR_DEFAULT & (~HACR_PWR_STAT));
4417 }
4418
4419#ifdef DEBUG_CALLBACK_TRACE
4420 printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
4421#endif
4422 return 0;
4423}
4424
4425static const struct net_device_ops wavelan_netdev_ops = {
4426 .ndo_open = wavelan_open,
4427 .ndo_stop = wavelan_close,
4428 .ndo_start_xmit = wavelan_packet_xmit,
4429 .ndo_set_multicast_list = wavelan_set_multicast_list,
4430#ifdef SET_MAC_ADDRESS
4431 .ndo_set_mac_address = wavelan_set_mac_address,
4432#endif
4433 .ndo_tx_timeout = wavelan_watchdog,
4434 .ndo_change_mtu = eth_change_mtu,
4435 .ndo_validate_addr = eth_validate_addr,
4436};
4437
4438/*------------------------------------------------------------------*/
4439/*
4440 * wavelan_attach() creates an "instance" of the driver, allocating
4441 * local data structures for one device (one interface). The device
4442 * is registered with Card Services.
4443 *
4444 * The dev_link structure is initialized, but we don't actually
4445 * configure the card at this point -- we wait until we receive a
4446 * card insertion event.
4447 */
4448static int
4449wavelan_probe(struct pcmcia_device *p_dev)
4450{
4451 struct net_device * dev; /* Interface generic data */
4452 net_local * lp; /* Interface specific data */
4453 int ret;
4454
4455#ifdef DEBUG_CALLBACK_TRACE
4456 printk(KERN_DEBUG "-> wavelan_attach()\n");
4457#endif
4458
4459 /* The io structure describes IO port mapping */
4460 p_dev->io.NumPorts1 = 8;
4461 p_dev->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
4462 p_dev->io.IOAddrLines = 3;
4463
4464 /* Interrupt setup */
4465 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT;
4466 p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
4467 p_dev->irq.Handler = wavelan_interrupt;
4468
4469 /* General socket configuration */
4470 p_dev->conf.Attributes = CONF_ENABLE_IRQ;
4471 p_dev->conf.IntType = INT_MEMORY_AND_IO;
4472
4473 /* Allocate the generic data structure */
4474 dev = alloc_etherdev(sizeof(net_local));
4475 if (!dev)
4476 return -ENOMEM;
4477
4478 p_dev->priv = p_dev->irq.Instance = dev;
4479
4480 lp = netdev_priv(dev);
4481
4482 /* Init specific data */
4483 lp->configured = 0;
4484 lp->reconfig_82593 = FALSE;
4485 lp->nresets = 0;
4486 /* Multicast stuff */
4487 lp->promiscuous = 0;
4488 lp->allmulticast = 0;
4489 lp->mc_count = 0;
4490
4491 /* Init spinlock */
4492 spin_lock_init(&lp->spinlock);
4493
4494 /* back links */
4495 lp->dev = dev;
4496
4497 /* wavelan NET3 callbacks */
4498 dev->netdev_ops = &wavelan_netdev_ops;
4499 dev->watchdog_timeo = WATCHDOG_JIFFIES;
4500 SET_ETHTOOL_OPS(dev, &ops);
4501
4502 dev->wireless_handlers = &wavelan_handler_def;
4503 lp->wireless_data.spy_data = &lp->spy_data;
4504 dev->wireless_data = &lp->wireless_data;
4505
4506 /* Other specific data */
4507 dev->mtu = WAVELAN_MTU;
4508
4509 ret = wv_pcmcia_config(p_dev);
4510 if (ret)
4511 return ret;
4512
4513 ret = wv_hw_config(dev);
4514 if (ret) {
4515 dev->irq = 0;
4516 pcmcia_disable_device(p_dev);
4517 return ret;
4518 }
4519
4520 wv_init_info(dev);
4521
4522#ifdef DEBUG_CALLBACK_TRACE
4523 printk(KERN_DEBUG "<- wavelan_attach()\n");
4524#endif
4525
4526 return 0;
4527}
4528
4529/*------------------------------------------------------------------*/
4530/*
4531 * This deletes a driver "instance". The device is de-registered with
4532 * Card Services. If it has been released, all local data structures
4533 * are freed. Otherwise, the structures will be freed when the device
4534 * is released.
4535 */
4536static void
4537wavelan_detach(struct pcmcia_device *link)
4538{
4539#ifdef DEBUG_CALLBACK_TRACE
4540 printk(KERN_DEBUG "-> wavelan_detach(0x%p)\n", link);
4541#endif
4542
4543 /* Some others haven't done their job : give them another chance */
4544 wv_pcmcia_release(link);
4545
4546 /* Free pieces */
4547 if(link->priv)
4548 {
4549 struct net_device * dev = (struct net_device *) link->priv;
4550
4551 /* Remove ourselves from the kernel list of ethernet devices */
4552 /* Warning : can't be called from interrupt, timer or wavelan_close() */
4553 if (link->dev_node)
4554 unregister_netdev(dev);
4555 link->dev_node = NULL;
4556 ((net_local *)netdev_priv(dev))->link = NULL;
4557 ((net_local *)netdev_priv(dev))->dev = NULL;
4558 free_netdev(dev);
4559 }
4560
4561#ifdef DEBUG_CALLBACK_TRACE
4562 printk(KERN_DEBUG "<- wavelan_detach()\n");
4563#endif
4564}
4565
4566static int wavelan_suspend(struct pcmcia_device *link)
4567{
4568 struct net_device * dev = (struct net_device *) link->priv;
4569
4570 /* NB: wavelan_close will be called, but too late, so we are
4571 * obliged to close nicely the wavelan here. David, could you
4572 * close the device before suspending them ? And, by the way,
4573 * could you, on resume, add a "route add -net ..." after the
4574 * ifconfig up ? Thanks... */
4575
4576 /* Stop receiving new messages and wait end of transmission */
4577 wv_ru_stop(dev);
4578
4579 if (link->open)
4580 netif_device_detach(dev);
4581
4582 /* Power down the module */
4583 hacr_write(dev->base_addr, HACR_DEFAULT & (~HACR_PWR_STAT));
4584
4585 return 0;
4586}
4587
4588static int wavelan_resume(struct pcmcia_device *link)
4589{
4590 struct net_device * dev = (struct net_device *) link->priv;
4591
4592 if (link->open) {
4593 wv_hw_reset(dev);
4594 netif_device_attach(dev);
4595 }
4596
4597 return 0;
4598}
4599
4600
4601static struct pcmcia_device_id wavelan_ids[] = {
4602 PCMCIA_DEVICE_PROD_ID12("AT&T","WaveLAN/PCMCIA", 0xe7c5affd, 0x1bc50975),
4603 PCMCIA_DEVICE_PROD_ID12("Digital", "RoamAbout/DS", 0x9999ab35, 0x00d05e06),
4604 PCMCIA_DEVICE_PROD_ID12("Lucent Technologies", "WaveLAN/PCMCIA", 0x23eb9949, 0x1bc50975),
4605 PCMCIA_DEVICE_PROD_ID12("NCR", "WaveLAN/PCMCIA", 0x24358cd4, 0x1bc50975),
4606 PCMCIA_DEVICE_NULL,
4607};
4608MODULE_DEVICE_TABLE(pcmcia, wavelan_ids);
4609
4610static struct pcmcia_driver wavelan_driver = {
4611 .owner = THIS_MODULE,
4612 .drv = {
4613 .name = "wavelan_cs",
4614 },
4615 .probe = wavelan_probe,
4616 .remove = wavelan_detach,
4617 .id_table = wavelan_ids,
4618 .suspend = wavelan_suspend,
4619 .resume = wavelan_resume,
4620};
4621
4622static int __init
4623init_wavelan_cs(void)
4624{
4625 return pcmcia_register_driver(&wavelan_driver);
4626}
4627
4628static void __exit
4629exit_wavelan_cs(void)
4630{
4631 pcmcia_unregister_driver(&wavelan_driver);
4632}
4633
4634module_init(init_wavelan_cs);
4635module_exit(exit_wavelan_cs);
diff --git a/drivers/net/wireless/wavelan_cs.h b/drivers/net/wireless/wavelan_cs.h
deleted file mode 100644
index 2e4bfe4147c6..000000000000
--- a/drivers/net/wireless/wavelan_cs.h
+++ /dev/null
@@ -1,386 +0,0 @@
1/*
2 * Wavelan Pcmcia driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganization and extension of the driver.
7 * Original copyright follow. See wavelan_cs.h for details.
8 *
9 * This file contain the declarations of the Wavelan hardware. Note that
10 * the Pcmcia Wavelan include a i82593 controller (see definitions in
11 * file i82593.h).
12 *
13 * The main difference between the pcmcia hardware and the ISA one is
14 * the Ethernet Controller (i82593 instead of i82586). The i82593 allow
15 * only one send buffer. The PSA (Parameter Storage Area : EEprom for
16 * permanent storage of various info) is memory mapped, but not the
17 * MMI (Modem Management Interface).
18 */
19
20/*
21 * Definitions for the AT&T GIS (formerly NCR) WaveLAN PCMCIA card:
22 * An Ethernet-like radio transceiver controlled by an Intel 82593
23 * coprocessor.
24 *
25 *
26 ****************************************************************************
27 * Copyright 1995
28 * Anthony D. Joseph
29 * Massachusetts Institute of Technology
30 *
31 * Permission to use, copy, modify, and distribute this program
32 * for any purpose and without fee is hereby granted, provided
33 * that this copyright and permission notice appear on all copies
34 * and supporting documentation, the name of M.I.T. not be used
35 * in advertising or publicity pertaining to distribution of the
36 * program without specific prior permission, and notice be given
37 * in supporting documentation that copying and distribution is
38 * by permission of M.I.T. M.I.T. makes no representations about
39 * the suitability of this software for any purpose. It is pro-
40 * vided "as is" without express or implied warranty.
41 ****************************************************************************
42 *
43 *
44 * Credits:
45 * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht for
46 * providing extremely useful information about WaveLAN PCMCIA hardware
47 *
48 * This driver is based upon several other drivers, in particular:
49 * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
50 * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
51 * Anders Klemets' PCMCIA WaveLAN adapter driver
52 * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
53 */
54
55#ifndef _WAVELAN_CS_H
56#define _WAVELAN_CS_H
57
58/************************** MAGIC NUMBERS ***************************/
59
60/* The detection of the wavelan card is made by reading the MAC address
61 * from the card and checking it. If you have a non AT&T product (OEM,
62 * like DEC RoamAbout, or Digital Ocean, Epson, ...), you must modify this
63 * part to accommodate your hardware...
64 */
65static const unsigned char MAC_ADDRESSES[][3] =
66{
67 { 0x08, 0x00, 0x0E }, /* AT&T Wavelan (standard) & DEC RoamAbout */
68 { 0x08, 0x00, 0x6A }, /* AT&T Wavelan (alternate) */
69 { 0x00, 0x00, 0xE1 }, /* Hitachi Wavelan */
70 { 0x00, 0x60, 0x1D } /* Lucent Wavelan (another one) */
71 /* Add your card here and send me the patch ! */
72};
73
74/*
75 * Constants used to convert channels to frequencies
76 */
77
78/* Frequency available in the 2.0 modem, in units of 250 kHz
79 * (as read in the offset register of the dac area).
80 * Used to map channel numbers used by `wfreqsel' to frequencies
81 */
82static const short channel_bands[] = { 0x30, 0x58, 0x64, 0x7A, 0x80, 0xA8,
83 0xD0, 0xF0, 0xF8, 0x150 };
84
85/* Frequencies of the 1.0 modem (fixed frequencies).
86 * Use to map the PSA `subband' to a frequency
87 * Note : all frequencies apart from the first one need to be multiplied by 10
88 */
89static const int fixed_bands[] = { 915e6, 2.425e8, 2.46e8, 2.484e8, 2.4305e8 };
90
91
92/*************************** PC INTERFACE ****************************/
93
94/* WaveLAN host interface definitions */
95
96#define LCCR(base) (base) /* LAN Controller Command Register */
97#define LCSR(base) (base) /* LAN Controller Status Register */
98#define HACR(base) (base+0x1) /* Host Adapter Command Register */
99#define HASR(base) (base+0x1) /* Host Adapter Status Register */
100#define PIORL(base) (base+0x2) /* Program I/O Register Low */
101#define RPLL(base) (base+0x2) /* Receive Pointer Latched Low */
102#define PIORH(base) (base+0x3) /* Program I/O Register High */
103#define RPLH(base) (base+0x3) /* Receive Pointer Latched High */
104#define PIOP(base) (base+0x4) /* Program I/O Port */
105#define MMR(base) (base+0x6) /* MMI Address Register */
106#define MMD(base) (base+0x7) /* MMI Data Register */
107
108/* Host Adaptor Command Register bit definitions */
109
110#define HACR_LOF (1 << 3) /* Lock Out Flag, toggle every 250ms */
111#define HACR_PWR_STAT (1 << 4) /* Power State, 1=active, 0=sleep */
112#define HACR_TX_DMA_RESET (1 << 5) /* Reset transmit DMA ptr on high */
113#define HACR_RX_DMA_RESET (1 << 6) /* Reset receive DMA ptr on high */
114#define HACR_ROM_WEN (1 << 7) /* EEPROM write enabled when true */
115
116#define HACR_RESET (HACR_TX_DMA_RESET | HACR_RX_DMA_RESET)
117#define HACR_DEFAULT (HACR_PWR_STAT)
118
119/* Host Adapter Status Register bit definitions */
120
121#define HASR_MMI_BUSY (1 << 2) /* MMI is busy when true */
122#define HASR_LOF (1 << 3) /* Lock out flag status */
123#define HASR_NO_CLK (1 << 4) /* active when modem not connected */
124
125/* Miscellaneous bit definitions */
126
127#define PIORH_SEL_TX (1 << 5) /* PIOR points to 0=rx/1=tx buffer */
128#define MMR_MMI_WR (1 << 0) /* Next MMI cycle is 0=read, 1=write */
129#define PIORH_MASK 0x1f /* only low 5 bits are significant */
130#define RPLH_MASK 0x1f /* only low 5 bits are significant */
131#define MMI_ADDR_MASK 0x7e /* Bits 1-6 of MMR are significant */
132
133/* Attribute Memory map */
134
135#define CIS_ADDR 0x0000 /* Card Information Status Register */
136#define PSA_ADDR 0x0e00 /* Parameter Storage Area address */
137#define EEPROM_ADDR 0x1000 /* EEPROM address (unused ?) */
138#define COR_ADDR 0x4000 /* Configuration Option Register */
139
140/* Configuration Option Register bit definitions */
141
142#define COR_CONFIG (1 << 0) /* Config Index, 0 when unconfigured */
143#define COR_SW_RESET (1 << 7) /* Software Reset on true */
144#define COR_LEVEL_IRQ (1 << 6) /* Level IRQ */
145
146/* Local Memory map */
147
148#define RX_BASE 0x0000 /* Receive memory, 8 kB */
149#define TX_BASE 0x2000 /* Transmit memory, 2 kB */
150#define UNUSED_BASE 0x2800 /* Unused, 22 kB */
151#define RX_SIZE (TX_BASE-RX_BASE) /* Size of receive area */
152#define RX_SIZE_SHIFT 6 /* Bits to shift in stop register */
153
154#define TRUE 1
155#define FALSE 0
156
157#define MOD_ENAL 1
158#define MOD_PROM 2
159
160/* Size of a MAC address */
161#define WAVELAN_ADDR_SIZE 6
162
163/* Maximum size of Wavelan packet */
164#define WAVELAN_MTU 1500
165
166#define MAXDATAZ (6 + 6 + 2 + WAVELAN_MTU)
167
168/********************** PARAMETER STORAGE AREA **********************/
169
170/*
171 * Parameter Storage Area (PSA).
172 */
173typedef struct psa_t psa_t;
174struct psa_t
175{
176 /* For the PCMCIA Adapter, locations 0x00-0x0F are unused and fixed at 00 */
177 unsigned char psa_io_base_addr_1; /* [0x00] Base address 1 ??? */
178 unsigned char psa_io_base_addr_2; /* [0x01] Base address 2 */
179 unsigned char psa_io_base_addr_3; /* [0x02] Base address 3 */
180 unsigned char psa_io_base_addr_4; /* [0x03] Base address 4 */
181 unsigned char psa_rem_boot_addr_1; /* [0x04] Remote Boot Address 1 */
182 unsigned char psa_rem_boot_addr_2; /* [0x05] Remote Boot Address 2 */
183 unsigned char psa_rem_boot_addr_3; /* [0x06] Remote Boot Address 3 */
184 unsigned char psa_holi_params; /* [0x07] HOst Lan Interface (HOLI) Parameters */
185 unsigned char psa_int_req_no; /* [0x08] Interrupt Request Line */
186 unsigned char psa_unused0[7]; /* [0x09-0x0F] unused */
187
188 unsigned char psa_univ_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x10-0x15] Universal (factory) MAC Address */
189 unsigned char psa_local_mac_addr[WAVELAN_ADDR_SIZE]; /* [0x16-1B] Local MAC Address */
190 unsigned char psa_univ_local_sel; /* [0x1C] Universal Local Selection */
191#define PSA_UNIVERSAL 0 /* Universal (factory) */
192#define PSA_LOCAL 1 /* Local */
193 unsigned char psa_comp_number; /* [0x1D] Compatability Number: */
194#define PSA_COMP_PC_AT_915 0 /* PC-AT 915 MHz */
195#define PSA_COMP_PC_MC_915 1 /* PC-MC 915 MHz */
196#define PSA_COMP_PC_AT_2400 2 /* PC-AT 2.4 GHz */
197#define PSA_COMP_PC_MC_2400 3 /* PC-MC 2.4 GHz */
198#define PSA_COMP_PCMCIA_915 4 /* PCMCIA 915 MHz or 2.0 */
199 unsigned char psa_thr_pre_set; /* [0x1E] Modem Threshold Preset */
200 unsigned char psa_feature_select; /* [0x1F] Call code required (1=on) */
201#define PSA_FEATURE_CALL_CODE 0x01 /* Call code required (Japan) */
202 unsigned char psa_subband; /* [0x20] Subband */
203#define PSA_SUBBAND_915 0 /* 915 MHz or 2.0 */
204#define PSA_SUBBAND_2425 1 /* 2425 MHz */
205#define PSA_SUBBAND_2460 2 /* 2460 MHz */
206#define PSA_SUBBAND_2484 3 /* 2484 MHz */
207#define PSA_SUBBAND_2430_5 4 /* 2430.5 MHz */
208 unsigned char psa_quality_thr; /* [0x21] Modem Quality Threshold */
209 unsigned char psa_mod_delay; /* [0x22] Modem Delay ??? (reserved) */
210 unsigned char psa_nwid[2]; /* [0x23-0x24] Network ID */
211 unsigned char psa_nwid_select; /* [0x25] Network ID Select On Off */
212 unsigned char psa_encryption_select; /* [0x26] Encryption On Off */
213 unsigned char psa_encryption_key[8]; /* [0x27-0x2E] Encryption Key */
214 unsigned char psa_databus_width; /* [0x2F] AT bus width select 8/16 */
215 unsigned char psa_call_code[8]; /* [0x30-0x37] (Japan) Call Code */
216 unsigned char psa_nwid_prefix[2]; /* [0x38-0x39] Roaming domain */
217 unsigned char psa_reserved[2]; /* [0x3A-0x3B] Reserved - fixed 00 */
218 unsigned char psa_conf_status; /* [0x3C] Conf Status, bit 0=1:config*/
219 unsigned char psa_crc[2]; /* [0x3D] CRC-16 over PSA */
220 unsigned char psa_crc_status; /* [0x3F] CRC Valid Flag */
221};
222
223/* Size for structure checking (if padding is correct) */
224#define PSA_SIZE 64
225
226/* Calculate offset of a field in the above structure
227 * Warning : only even addresses are used */
228#define psaoff(p,f) ((unsigned short) ((void *)(&((psa_t *) ((void *) NULL + (p)))->f) - (void *) NULL))
229
230/******************** MODEM MANAGEMENT INTERFACE ********************/
231
232/*
233 * Modem Management Controller (MMC) write structure.
234 */
235typedef struct mmw_t mmw_t;
236struct mmw_t
237{
238 unsigned char mmw_encr_key[8]; /* encryption key */
239 unsigned char mmw_encr_enable; /* enable/disable encryption */
240#define MMW_ENCR_ENABLE_MODE 0x02 /* Mode of security option */
241#define MMW_ENCR_ENABLE_EN 0x01 /* Enable security option */
242 unsigned char mmw_unused0[1]; /* unused */
243 unsigned char mmw_des_io_invert; /* Encryption option */
244#define MMW_DES_IO_INVERT_RES 0x0F /* Reserved */
245#define MMW_DES_IO_INVERT_CTRL 0xF0 /* Control ??? (set to 0) */
246 unsigned char mmw_unused1[5]; /* unused */
247 unsigned char mmw_loopt_sel; /* looptest selection */
248#define MMW_LOOPT_SEL_DIS_NWID 0x40 /* disable NWID filtering */
249#define MMW_LOOPT_SEL_INT 0x20 /* activate Attention Request */
250#define MMW_LOOPT_SEL_LS 0x10 /* looptest w/o collision avoidance */
251#define MMW_LOOPT_SEL_LT3A 0x08 /* looptest 3a */
252#define MMW_LOOPT_SEL_LT3B 0x04 /* looptest 3b */
253#define MMW_LOOPT_SEL_LT3C 0x02 /* looptest 3c */
254#define MMW_LOOPT_SEL_LT3D 0x01 /* looptest 3d */
255 unsigned char mmw_jabber_enable; /* jabber timer enable */
256 /* Abort transmissions > 200 ms */
257 unsigned char mmw_freeze; /* freeze / unfreeeze signal level */
258 /* 0 : signal level & qual updated for every new message, 1 : frozen */
259 unsigned char mmw_anten_sel; /* antenna selection */
260#define MMW_ANTEN_SEL_SEL 0x01 /* direct antenna selection */
261#define MMW_ANTEN_SEL_ALG_EN 0x02 /* antenna selection algo. enable */
262 unsigned char mmw_ifs; /* inter frame spacing */
263 /* min time between transmission in bit periods (.5 us) - bit 0 ignored */
264 unsigned char mmw_mod_delay; /* modem delay (synchro) */
265 unsigned char mmw_jam_time; /* jamming time (after collision) */
266 unsigned char mmw_unused2[1]; /* unused */
267 unsigned char mmw_thr_pre_set; /* level threshold preset */
268 /* Discard all packet with signal < this value (4) */
269 unsigned char mmw_decay_prm; /* decay parameters */
270 unsigned char mmw_decay_updat_prm; /* decay update parameterz */
271 unsigned char mmw_quality_thr; /* quality (z-quotient) threshold */
272 /* Discard all packet with quality < this value (3) */
273 unsigned char mmw_netw_id_l; /* NWID low order byte */
274 unsigned char mmw_netw_id_h; /* NWID high order byte */
275 /* Network ID or Domain : create virtual net on the air */
276
277 /* 2.0 Hardware extension - frequency selection support */
278 unsigned char mmw_mode_select; /* for analog tests (set to 0) */
279 unsigned char mmw_unused3[1]; /* unused */
280 unsigned char mmw_fee_ctrl; /* frequency eeprom control */
281#define MMW_FEE_CTRL_PRE 0x10 /* Enable protected instructions */
282#define MMW_FEE_CTRL_DWLD 0x08 /* Download eeprom to mmc */
283#define MMW_FEE_CTRL_CMD 0x07 /* EEprom commands : */
284#define MMW_FEE_CTRL_READ 0x06 /* Read */
285#define MMW_FEE_CTRL_WREN 0x04 /* Write enable */
286#define MMW_FEE_CTRL_WRITE 0x05 /* Write data to address */
287#define MMW_FEE_CTRL_WRALL 0x04 /* Write data to all addresses */
288#define MMW_FEE_CTRL_WDS 0x04 /* Write disable */
289#define MMW_FEE_CTRL_PRREAD 0x16 /* Read addr from protect register */
290#define MMW_FEE_CTRL_PREN 0x14 /* Protect register enable */
291#define MMW_FEE_CTRL_PRCLEAR 0x17 /* Unprotect all registers */
292#define MMW_FEE_CTRL_PRWRITE 0x15 /* Write addr in protect register */
293#define MMW_FEE_CTRL_PRDS 0x14 /* Protect register disable */
294 /* Never issue this command (PRDS) : it's irreversible !!! */
295
296 unsigned char mmw_fee_addr; /* EEprom address */
297#define MMW_FEE_ADDR_CHANNEL 0xF0 /* Select the channel */
298#define MMW_FEE_ADDR_OFFSET 0x0F /* Offset in channel data */
299#define MMW_FEE_ADDR_EN 0xC0 /* FEE_CTRL enable operations */
300#define MMW_FEE_ADDR_DS 0x00 /* FEE_CTRL disable operations */
301#define MMW_FEE_ADDR_ALL 0x40 /* FEE_CTRL all operations */
302#define MMW_FEE_ADDR_CLEAR 0xFF /* FEE_CTRL clear operations */
303
304 unsigned char mmw_fee_data_l; /* Write data to EEprom */
305 unsigned char mmw_fee_data_h; /* high octet */
306 unsigned char mmw_ext_ant; /* Setting for external antenna */
307#define MMW_EXT_ANT_EXTANT 0x01 /* Select external antenna */
308#define MMW_EXT_ANT_POL 0x02 /* Polarity of the antenna */
309#define MMW_EXT_ANT_INTERNAL 0x00 /* Internal antenna */
310#define MMW_EXT_ANT_EXTERNAL 0x03 /* External antenna */
311#define MMW_EXT_ANT_IQ_TEST 0x1C /* IQ test pattern (set to 0) */
312} __attribute__((packed));
313
314/* Size for structure checking (if padding is correct) */
315#define MMW_SIZE 37
316
317/* Calculate offset of a field in the above structure */
318#define mmwoff(p,f) (unsigned short)((void *)(&((mmw_t *)((void *)0 + (p)))->f) - (void *)0)
319
320
321/*
322 * Modem Management Controller (MMC) read structure.
323 */
324typedef struct mmr_t mmr_t;
325struct mmr_t
326{
327 unsigned char mmr_unused0[8]; /* unused */
328 unsigned char mmr_des_status; /* encryption status */
329 unsigned char mmr_des_avail; /* encryption available (0x55 read) */
330#define MMR_DES_AVAIL_DES 0x55 /* DES available */
331#define MMR_DES_AVAIL_AES 0x33 /* AES (AT&T) available */
332 unsigned char mmr_des_io_invert; /* des I/O invert register */
333 unsigned char mmr_unused1[5]; /* unused */
334 unsigned char mmr_dce_status; /* DCE status */
335#define MMR_DCE_STATUS_RX_BUSY 0x01 /* receiver busy */
336#define MMR_DCE_STATUS_LOOPT_IND 0x02 /* loop test indicated */
337#define MMR_DCE_STATUS_TX_BUSY 0x04 /* transmitter on */
338#define MMR_DCE_STATUS_JBR_EXPIRED 0x08 /* jabber timer expired */
339#define MMR_DCE_STATUS 0x0F /* mask to get the bits */
340 unsigned char mmr_dsp_id; /* DSP id (AA = Daedalus rev A) */
341 unsigned char mmr_unused2[2]; /* unused */
342 unsigned char mmr_correct_nwid_l; /* # of correct NWID's rxd (low) */
343 unsigned char mmr_correct_nwid_h; /* # of correct NWID's rxd (high) */
344 /* Warning : Read high order octet first !!! */
345 unsigned char mmr_wrong_nwid_l; /* # of wrong NWID's rxd (low) */
346 unsigned char mmr_wrong_nwid_h; /* # of wrong NWID's rxd (high) */
347 unsigned char mmr_thr_pre_set; /* level threshold preset */
348#define MMR_THR_PRE_SET 0x3F /* level threshold preset */
349#define MMR_THR_PRE_SET_CUR 0x80 /* Current signal above it */
350 unsigned char mmr_signal_lvl; /* signal level */
351#define MMR_SIGNAL_LVL 0x3F /* signal level */
352#define MMR_SIGNAL_LVL_VALID 0x80 /* Updated since last read */
353 unsigned char mmr_silence_lvl; /* silence level (noise) */
354#define MMR_SILENCE_LVL 0x3F /* silence level */
355#define MMR_SILENCE_LVL_VALID 0x80 /* Updated since last read */
356 unsigned char mmr_sgnl_qual; /* signal quality */
357#define MMR_SGNL_QUAL 0x0F /* signal quality */
358#define MMR_SGNL_QUAL_ANT 0x80 /* current antenna used */
359 unsigned char mmr_netw_id_l; /* NWID low order byte ??? */
360 unsigned char mmr_unused3[3]; /* unused */
361
362 /* 2.0 Hardware extension - frequency selection support */
363 unsigned char mmr_fee_status; /* Status of frequency eeprom */
364#define MMR_FEE_STATUS_ID 0xF0 /* Modem revision id */
365#define MMR_FEE_STATUS_DWLD 0x08 /* Download in progress */
366#define MMR_FEE_STATUS_BUSY 0x04 /* EEprom busy */
367 unsigned char mmr_unused4[1]; /* unused */
368 unsigned char mmr_fee_data_l; /* Read data from eeprom (low) */
369 unsigned char mmr_fee_data_h; /* Read data from eeprom (high) */
370};
371
372/* Size for structure checking (if padding is correct) */
373#define MMR_SIZE 36
374
375/* Calculate offset of a field in the above structure */
376#define mmroff(p,f) (unsigned short)((void *)(&((mmr_t *)((void *)0 + (p)))->f) - (void *)0)
377
378
379/* Make the two above structures one */
380typedef union mm_t
381{
382 struct mmw_t w; /* Write to the mmc */
383 struct mmr_t r; /* Read from the mmc */
384} mm_t;
385
386#endif /* _WAVELAN_CS_H */
diff --git a/drivers/net/wireless/wavelan_cs.p.h b/drivers/net/wireless/wavelan_cs.p.h
deleted file mode 100644
index 81d91531c4f9..000000000000
--- a/drivers/net/wireless/wavelan_cs.p.h
+++ /dev/null
@@ -1,766 +0,0 @@
1/*
2 * Wavelan Pcmcia driver
3 *
4 * Jean II - HPLB '96
5 *
6 * Reorganisation and extension of the driver.
7 *
8 * This file contain all definition and declarations necessary for the
9 * wavelan pcmcia driver. This file is a private header, so it should
10 * be included only on wavelan_cs.c !!!
11 */
12
13#ifndef WAVELAN_CS_P_H
14#define WAVELAN_CS_P_H
15
16/************************** DOCUMENTATION **************************/
17/*
18 * This driver provide a Linux interface to the Wavelan Pcmcia hardware
19 * The Wavelan is a product of Lucent (http://www.wavelan.com/).
20 * This division was formerly part of NCR and then AT&T.
21 * Wavelan are also distributed by DEC (RoamAbout DS)...
22 *
23 * To know how to use this driver, read the PCMCIA HOWTO.
24 * If you want to exploit the many other fonctionalities, look comments
25 * in the code...
26 *
27 * This driver is the result of the effort of many peoples (see below).
28 */
29
30/* ------------------------ SPECIFIC NOTES ------------------------ */
31/*
32 * Web page
33 * --------
34 * I try to maintain a web page with the Wireless LAN Howto at :
35 * http://www.hpl.hp.com/personal/Jean_Tourrilhes/Linux/Wavelan.html
36 *
37 * SMP
38 * ---
39 * We now are SMP compliant (I eventually fixed the remaining bugs).
40 * The driver has been tested on a dual P6-150 and survived my usual
41 * set of torture tests.
42 * Anyway, I spent enough time chasing interrupt re-entrancy during
43 * errors or reconfigure, and I designed the locked/unlocked sections
44 * of the driver with great care, and with the recent addition of
45 * the spinlock (thanks to the new API), we should be quite close to
46 * the truth.
47 * The SMP/IRQ locking is quite coarse and conservative (i.e. not fast),
48 * but better safe than sorry (especially at 2 Mb/s ;-).
49 *
50 * I have also looked into disabling only our interrupt on the card
51 * (via HACR) instead of all interrupts in the processor (via cli),
52 * so that other driver are not impacted, and it look like it's
53 * possible, but it's very tricky to do right (full of races). As
54 * the gain would be mostly for SMP systems, it can wait...
55 *
56 * Debugging and options
57 * ---------------------
58 * You will find below a set of '#define" allowing a very fine control
59 * on the driver behaviour and the debug messages printed.
60 * The main options are :
61 * o WAVELAN_ROAMING, for the experimental roaming support.
62 * o SET_PSA_CRC, to have your card correctly recognised by
63 * an access point and the Point-to-Point diagnostic tool.
64 * o USE_PSA_CONFIG, to read configuration from the PSA (EEprom)
65 * (otherwise we always start afresh with some defaults)
66 *
67 * wavelan_cs.o is darn too big
68 * -------------------------
69 * That's true ! There is a very simple way to reduce the driver
70 * object by 33% (yes !). Comment out the following line :
71 * #include <linux/wireless.h>
72 * Other compile options can also reduce the size of it...
73 *
74 * MAC address and hardware detection :
75 * ----------------------------------
76 * The detection code of the wavelan chech that the first 3
77 * octets of the MAC address fit the company code. This type of
78 * detection work well for AT&T cards (because the AT&T code is
79 * hardcoded in wavelan_cs.h), but of course will fail for other
80 * manufacturer.
81 *
82 * If you are sure that your card is derived from the wavelan,
83 * here is the way to configure it :
84 * 1) Get your MAC address
85 * a) With your card utilities (wfreqsel, instconf, ...)
86 * b) With the driver :
87 * o compile the kernel with DEBUG_CONFIG_INFO enabled
88 * o Boot and look the card messages
89 * 2) Set your MAC code (3 octets) in MAC_ADDRESSES[][3] (wavelan_cs.h)
90 * 3) Compile & verify
91 * 4) Send me the MAC code - I will include it in the next version...
92 *
93 */
94
95/* --------------------- WIRELESS EXTENSIONS --------------------- */
96/*
97 * This driver is the first one to support "wireless extensions".
98 * This set of extensions provide you some way to control the wireless
99 * caracteristics of the hardware in a standard way and support for
100 * applications for taking advantage of it (like Mobile IP).
101 *
102 * It might be a good idea as well to fetch the wireless tools to
103 * configure the device and play a bit.
104 */
105
106/* ---------------------------- FILES ---------------------------- */
107/*
108 * wavelan_cs.c : The actual code for the driver - C functions
109 *
110 * wavelan_cs.p.h : Private header : local types / vars for the driver
111 *
112 * wavelan_cs.h : Description of the hardware interface & structs
113 *
114 * i82593.h : Description if the Ethernet controller
115 */
116
117/* --------------------------- HISTORY --------------------------- */
118/*
119 * The history of the Wavelan drivers is as complicated as history of
120 * the Wavelan itself (NCR -> AT&T -> Lucent).
121 *
122 * All started with Anders Klemets <klemets@paul.rutgers.edu>,
123 * writing a Wavelan ISA driver for the MACH microkernel. Girish
124 * Welling <welling@paul.rutgers.edu> had also worked on it.
125 * Keith Moore modify this for the Pcmcia hardware.
126 *
127 * Robert Morris <rtm@das.harvard.edu> port these two drivers to BSDI
128 * and add specific Pcmcia support (there is currently no equivalent
129 * of the PCMCIA package under BSD...).
130 *
131 * Jim Binkley <jrb@cs.pdx.edu> port both BSDI drivers to FreeBSD.
132 *
133 * Bruce Janson <bruce@cs.usyd.edu.au> port the BSDI ISA driver to Linux.
134 *
135 * Anthony D. Joseph <adj@lcs.mit.edu> started modify Bruce driver
136 * (with help of the BSDI PCMCIA driver) for PCMCIA.
137 * Yunzhou Li <yunzhou@strat.iol.unh.edu> finished is work.
138 * Joe Finney <joe@comp.lancs.ac.uk> patched the driver to start
139 * correctly 2.00 cards (2.4 GHz with frequency selection).
140 * David Hinds <dahinds@users.sourceforge.net> integrated the whole in his
141 * Pcmcia package (+ bug corrections).
142 *
143 * I (Jean Tourrilhes - jt@hplb.hpl.hp.com) then started to make some
144 * patchs to the Pcmcia driver. After, I added code in the ISA driver
145 * for Wireless Extensions and full support of frequency selection
146 * cards. Now, I'm doing the same to the Pcmcia driver + some
147 * reorganisation.
148 * Loeke Brederveld <lbrederv@wavelan.com> from Lucent has given me
149 * much needed informations on the Wavelan hardware.
150 */
151
152/* By the way : for the copyright & legal stuff :
153 * Almost everybody wrote code under GNU or BSD license (or alike),
154 * and want that their original copyright remain somewhere in the
155 * code (for myself, I go with the GPL).
156 * Nobody want to take responsibility for anything, except the fame...
157 */
158
159/* --------------------------- CREDITS --------------------------- */
160/*
161 * Credits:
162 * Special thanks to Jan Hoogendoorn of AT&T GIS Utrecht and
163 * Loeke Brederveld of Lucent for providing extremely useful
164 * information about WaveLAN PCMCIA hardware
165 *
166 * This driver is based upon several other drivers, in particular:
167 * David Hinds' Linux driver for the PCMCIA 3c589 ethernet adapter
168 * Bruce Janson's Linux driver for the AT-bus WaveLAN adapter
169 * Anders Klemets' PCMCIA WaveLAN adapter driver
170 * Robert Morris' BSDI driver for the PCMCIA WaveLAN adapter
171 *
172 * Additional Credits:
173 *
174 * This software was originally developed under Linux 1.2.3
175 * (Slackware 2.0 distribution).
176 * And then under Linux 2.0.x (Debian 1.1 -> 2.2 - pcmcia 2.8.18+)
177 * with an HP OmniBook 4000 and then a 5500.
178 *
179 * It is based on other device drivers and information either written
180 * or supplied by:
181 * James Ashton (jaa101@syseng.anu.edu.au),
182 * Ajay Bakre (bakre@paul.rutgers.edu),
183 * Donald Becker (becker@super.org),
184 * Jim Binkley <jrb@cs.pdx.edu>,
185 * Loeke Brederveld <lbrederv@wavelan.com>,
186 * Allan Creighton (allanc@cs.su.oz.au),
187 * Brent Elphick <belphick@uwaterloo.ca>,
188 * Joe Finney <joe@comp.lancs.ac.uk>,
189 * Matthew Geier (matthew@cs.su.oz.au),
190 * Remo di Giovanni (remo@cs.su.oz.au),
191 * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
192 * David Hinds <dahinds@users.sourceforge.net>,
193 * Jan Hoogendoorn (c/o marteijn@lucent.com),
194 * Bruce Janson <bruce@cs.usyd.edu.au>,
195 * Anthony D. Joseph <adj@lcs.mit.edu>,
196 * Anders Klemets (klemets@paul.rutgers.edu),
197 * Yunzhou Li <yunzhou@strat.iol.unh.edu>,
198 * Marc Meertens (mmeertens@lucent.com),
199 * Keith Moore,
200 * Robert Morris (rtm@das.harvard.edu),
201 * Ian Parkin (ian@cs.su.oz.au),
202 * John Rosenberg (johnr@cs.su.oz.au),
203 * George Rossi (george@phm.gov.au),
204 * Arthur Scott (arthur@cs.su.oz.au),
205 * Stanislav Sinyagin <stas@isf.ru>
206 * Peter Storey,
207 * Jean Tourrilhes <jt@hpl.hp.com>,
208 * Girish Welling (welling@paul.rutgers.edu)
209 * Clark Woodworth <clark@hiway1.exit109.com>
210 * Yongguang Zhang <ygz@isl.hrl.hac.com>...
211 */
212
213/* ------------------------- IMPROVEMENTS ------------------------- */
214/*
215 * I proudly present :
216 *
217 * Changes made in 2.8.22 :
218 * ----------------------
219 * - improved wv_set_multicast_list
220 * - catch spurious interrupt
221 * - correct release of the device
222 *
223 * Changes mades in release :
224 * ------------------------
225 * - Reorganisation of the code, function name change
226 * - Creation of private header (wavelan_cs.h)
227 * - Reorganised debug messages
228 * - More comments, history, ...
229 * - Configure earlier (in "insert" instead of "open")
230 * and do things only once
231 * - mmc_init : configure the PSA if not done
232 * - mmc_init : 2.00 detection better code for 2.00 init
233 * - better info at startup
234 * - Correct a HUGE bug (volatile & uncalibrated busy loop)
235 * in wv_82593_cmd => config speedup
236 * - Stop receiving & power down on close (and power up on open)
237 * use "ifconfig down" & "ifconfig up ; route add -net ..."
238 * - Send packets : add watchdog instead of pooling
239 * - Receive : check frame wrap around & try to recover some frames
240 * - wavelan_set_multicast_list : avoid reset
241 * - add wireless extensions (ioctl & get_wireless_stats)
242 * get/set nwid/frequency on fly, info for /proc/net/wireless
243 * - Suppress useless stuff from lp (net_local), but add link
244 * - More inlines
245 * - Lot of others minor details & cleanups
246 *
247 * Changes made in second release :
248 * ------------------------------
249 * - Optimise wv_85893_reconfig stuff, fix potential problems
250 * - Change error values for ioctl
251 * - Non blocking wv_ru_stop() + call wv_reset() in case of problems
252 * - Remove development printk from wavelan_watchdog()
253 * - Remove of the watchdog to wavelan_close instead of wavelan_release
254 * fix potential problems...
255 * - Start debugging suspend stuff (but it's still a bit weird)
256 * - Debug & optimize dump header/packet in Rx & Tx (debug)
257 * - Use "readb" and "writeb" to be kernel 2.1 compliant
258 * - Better handling of bogus interrupts
259 * - Wireless extension : SETSPY and GETSPY
260 * - Remove old stuff (stats - for those needing it, just ask me...)
261 * - Make wireless extensions optional
262 *
263 * Changes made in third release :
264 * -----------------------------
265 * - cleanups & typos
266 * - modif wireless ext (spy -> only one pointer)
267 * - new private ioctl to set/get quality & level threshold
268 * - Init : correct default value of level threshold for pcmcia
269 * - kill watchdog in hw_reset
270 * - more 2.1 support (copy_to/from_user instead of memcpy_to/fromfs)
271 * - Add message level (debug stuff in /var/adm/debug & errors not
272 * displayed at console and still in /var/adm/messages)
273 *
274 * Changes made in fourth release :
275 * ------------------------------
276 * - multicast support (yes !) thanks to Yongguang Zhang.
277 *
278 * Changes made in fifth release (2.9.0) :
279 * -------------------------------------
280 * - Revisited multicast code (it was mostly wrong).
281 * - protect code in wv_82593_reconfig with dev->tbusy (oups !)
282 *
283 * Changes made in sixth release (2.9.1a) :
284 * --------------------------------------
285 * - Change the detection code for multi manufacturer code support
286 * - Correct bug (hang kernel) in init when we were "rejecting" a card
287 *
288 * Changes made in seventh release (2.9.1b) :
289 * ----------------------------------------
290 * - Update to wireless extensions changes
291 * - Silly bug in card initial configuration (psa_conf_status)
292 *
293 * Changes made in eigth release :
294 * -----------------------------
295 * - Small bug in debug code (probably not the last one...)
296 * - 1.2.13 support (thanks to Clark Woodworth)
297 *
298 * Changes made for release in 2.9.2b :
299 * ----------------------------------
300 * - Level threshold is now a standard wireless extension (version 4 !)
301 * - modules parameters types for kernel > 2.1.17
302 * - updated man page
303 * - Others cleanup from David Hinds
304 *
305 * Changes made for release in 2.9.5 :
306 * ---------------------------------
307 * - byte count stats (courtesy of David Hinds)
308 * - Remove dev_tint stuff (courtesy of David Hinds)
309 * - Others cleanup from David Hinds
310 * - Encryption setting from Brent Elphick (thanks a lot !)
311 * - 'base' to 'u_long' for the Alpha (thanks to Stanislav Sinyagin)
312 *
313 * Changes made for release in 2.9.6 :
314 * ---------------------------------
315 * - fix bug : no longuer disable watchdog in case of bogus interrupt
316 * - increase timeout in config code for picky hardware
317 * - mask unused bits in status (Wireless Extensions)
318 *
319 * Changes integrated by Justin Seger <jseger@MIT.EDU> & David Hinds :
320 * -----------------------------------------------------------------
321 * - Roaming "hack" from Joe Finney <joe@comp.lancs.ac.uk>
322 * - PSA CRC code from Bob Gray <rgray@bald.cs.dartmouth.edu>
323 * - Better initialisation of the i82593 controller
324 * from Joseph K. O'Sullivan <josullvn+@cs.cmu.edu>
325 *
326 * Changes made for release in 3.0.10 :
327 * ----------------------------------
328 * - Fix eject "hang" of the driver under 2.2.X :
329 * o create wv_flush_stale_links()
330 * o Rename wavelan_release to wv_pcmcia_release & move up
331 * o move unregister_netdev to wavelan_detach()
332 * o wavelan_release() no longer call wavelan_detach()
333 * o Suppress "release" timer
334 * o Other cleanups & fixes
335 * - New MAC address in the probe
336 * - Reorg PSA_CRC code (endian neutral & cleaner)
337 * - Correct initialisation of the i82593 from Lucent manual
338 * - Put back the watchdog, with larger timeout
339 * - TRANSMIT_NO_CRC is a "normal" error, so recover from it
340 * from Derrick J Brashear <shadow@dementia.org>
341 * - Better handling of TX and RX normal failure conditions
342 * - #ifdef out all the roaming code
343 * - Add ESSID & "AP current address" ioctl stubs
344 * - General cleanup of the code
345 *
346 * Changes made for release in 3.0.13 :
347 * ----------------------------------
348 * - Re-enable compilation of roaming code by default, but with
349 * do_roaming = 0
350 * - Nuke `nwid=nwid^ntohs(beacon->domain_id)' in wl_roam_gather
351 * at the demand of John Carol Langford <jcl@gs176.sp.cs.cmu.edu>
352 * - Introduced WAVELAN_ROAMING_EXT for incomplete ESSID stuff.
353 *
354 * Changes made for release in 3.0.15 :
355 * ----------------------------------
356 * - Change e-mail and web page addresses
357 * - Watchdog timer is now correctly expressed in HZ, not in jiffies
358 * - Add channel number to the list of frequencies in range
359 * - Add the (short) list of bit-rates in range
360 * - Developp a new sensitivity... (sens.value & sens.fixed)
361 *
362 * Changes made for release in 3.1.2 :
363 * ---------------------------------
364 * - Fix check for root permission (break instead of exit)
365 * - New nwid & encoding setting (Wireless Extension 9)
366 *
367 * Changes made for release in 3.1.12 :
368 * ----------------------------------
369 * - reworked wv_82593_cmd to avoid using the IRQ handler and doing
370 * ugly things with interrupts.
371 * - Add IRQ protection in 82593_config/ru_start/ru_stop/watchdog
372 * - Update to new network API (softnet - 2.3.43) :
373 * o replace dev->tbusy (David + me)
374 * o replace dev->tstart (David + me)
375 * o remove dev->interrupt (David)
376 * o add SMP locking via spinlock in splxx (me)
377 * o add spinlock in interrupt handler (me)
378 * o use kernel watchdog instead of ours (me)
379 * o verify that all the changes make sense and work (me)
380 * - Re-sync kernel/pcmcia versions (not much actually)
381 * - A few other cleanups (David & me)...
382 *
383 * Changes made for release in 3.1.22 :
384 * ----------------------------------
385 * - Check that SMP works, remove annoying log message
386 *
387 * Changes made for release in 3.1.24 :
388 * ----------------------------------
389 * - Fix unfrequent card lockup when watchdog was reseting the hardware :
390 * o control first busy loop in wv_82593_cmd()
391 * o Extend spinlock protection in wv_hw_config()
392 *
393 * Changes made for release in 3.1.33 :
394 * ----------------------------------
395 * - Optional use new driver API for Wireless Extensions :
396 * o got rid of wavelan_ioctl()
397 * o use a bunch of iw_handler instead
398 *
399 * Changes made for release in 3.2.1 :
400 * ---------------------------------
401 * - Set dev->trans_start to avoid filling the logs
402 * (and generating useless abort commands)
403 * - Avoid deadlocks in mmc_out()/mmc_in()
404 *
405 * Wishes & dreams:
406 * ----------------
407 * - Cleanup and integrate the roaming code
408 * (std debug, set DomainID, decay avg and co...)
409 */
410
411/***************************** INCLUDES *****************************/
412
413/* Linux headers that we need */
414#include <linux/module.h>
415#include <linux/kernel.h>
416#include <linux/init.h>
417#include <linux/sched.h>
418#include <linux/ptrace.h>
419#include <linux/slab.h>
420#include <linux/string.h>
421#include <linux/timer.h>
422#include <linux/interrupt.h>
423#include <linux/spinlock.h>
424#include <linux/in.h>
425#include <linux/delay.h>
426#include <linux/bitops.h>
427#include <asm/uaccess.h>
428#include <asm/io.h>
429#include <asm/system.h>
430
431#include <linux/netdevice.h>
432#include <linux/etherdevice.h>
433#include <linux/skbuff.h>
434#include <linux/if_arp.h>
435#include <linux/ioport.h>
436#include <linux/fcntl.h>
437#include <linux/ethtool.h>
438#include <linux/wireless.h> /* Wireless extensions */
439#include <net/iw_handler.h> /* New driver API */
440
441/* Pcmcia headers that we need */
442#include <pcmcia/cs_types.h>
443#include <pcmcia/cs.h>
444#include <pcmcia/cistpl.h>
445#include <pcmcia/cisreg.h>
446#include <pcmcia/ds.h>
447
448/* Wavelan declarations */
449#include "i82593.h" /* Definitions for the Intel chip */
450
451#include "wavelan_cs.h" /* Others bits of the hardware */
452
453/************************** DRIVER OPTIONS **************************/
454/*
455 * `#define' or `#undef' the following constant to change the behaviour
456 * of the driver...
457 */
458#define WAVELAN_ROAMING /* Include experimental roaming code */
459#undef WAVELAN_ROAMING_EXT /* Enable roaming wireless extensions */
460#undef SET_PSA_CRC /* Set the CRC in PSA (slower) */
461#define USE_PSA_CONFIG /* Use info from the PSA */
462#undef EEPROM_IS_PROTECTED /* Doesn't seem to be necessary */
463#define MULTICAST_AVOID /* Avoid extra multicast (I'm sceptical) */
464#undef SET_MAC_ADDRESS /* Experimental */
465
466/* Warning : these stuff will slow down the driver... */
467#define WIRELESS_SPY /* Enable spying addresses */
468#undef HISTOGRAM /* Enable histogram of sig level... */
469
470/****************************** DEBUG ******************************/
471
472#undef DEBUG_MODULE_TRACE /* Module insertion/removal */
473#undef DEBUG_CALLBACK_TRACE /* Calls made by Linux */
474#undef DEBUG_INTERRUPT_TRACE /* Calls to handler */
475#undef DEBUG_INTERRUPT_INFO /* type of interrupt & so on */
476#define DEBUG_INTERRUPT_ERROR /* problems */
477#undef DEBUG_CONFIG_TRACE /* Trace the config functions */
478#undef DEBUG_CONFIG_INFO /* What's going on... */
479#define DEBUG_CONFIG_ERRORS /* Errors on configuration */
480#undef DEBUG_TX_TRACE /* Transmission calls */
481#undef DEBUG_TX_INFO /* Header of the transmitted packet */
482#undef DEBUG_TX_FAIL /* Normal failure conditions */
483#define DEBUG_TX_ERROR /* Unexpected conditions */
484#undef DEBUG_RX_TRACE /* Transmission calls */
485#undef DEBUG_RX_INFO /* Header of the transmitted packet */
486#undef DEBUG_RX_FAIL /* Normal failure conditions */
487#define DEBUG_RX_ERROR /* Unexpected conditions */
488#undef DEBUG_PACKET_DUMP /* Dump packet on the screen */
489#undef DEBUG_IOCTL_TRACE /* Misc call by Linux */
490#undef DEBUG_IOCTL_INFO /* Various debug info */
491#define DEBUG_IOCTL_ERROR /* What's going wrong */
492#define DEBUG_BASIC_SHOW /* Show basic startup info */
493#undef DEBUG_VERSION_SHOW /* Print version info */
494#undef DEBUG_PSA_SHOW /* Dump psa to screen */
495#undef DEBUG_MMC_SHOW /* Dump mmc to screen */
496#undef DEBUG_SHOW_UNUSED /* Show also unused fields */
497#undef DEBUG_I82593_SHOW /* Show i82593 status */
498#undef DEBUG_DEVICE_SHOW /* Show device parameters */
499
500/************************ CONSTANTS & MACROS ************************/
501
502#ifdef DEBUG_VERSION_SHOW
503static const char *version = "wavelan_cs.c : v24 (SMP + wireless extensions) 11/1/02\n";
504#endif
505
506/* Watchdog temporisation */
507#define WATCHDOG_JIFFIES (256*HZ/100)
508
509/* Fix a bug in some old wireless extension definitions */
510#ifndef IW_ESSID_MAX_SIZE
511#define IW_ESSID_MAX_SIZE 32
512#endif
513
514/* ------------------------ PRIVATE IOCTL ------------------------ */
515
516#define SIOCSIPQTHR SIOCIWFIRSTPRIV /* Set quality threshold */
517#define SIOCGIPQTHR SIOCIWFIRSTPRIV + 1 /* Get quality threshold */
518#define SIOCSIPROAM SIOCIWFIRSTPRIV + 2 /* Set roaming state */
519#define SIOCGIPROAM SIOCIWFIRSTPRIV + 3 /* Get roaming state */
520
521#define SIOCSIPHISTO SIOCIWFIRSTPRIV + 4 /* Set histogram ranges */
522#define SIOCGIPHISTO SIOCIWFIRSTPRIV + 5 /* Get histogram values */
523
524/*************************** WaveLAN Roaming **************************/
525#ifdef WAVELAN_ROAMING /* Conditional compile, see above in options */
526
527#define WAVELAN_ROAMING_DEBUG 0 /* 1 = Trace of handover decisions */
528 /* 2 = Info on each beacon rcvd... */
529#define MAX_WAVEPOINTS 7 /* Max visible at one time */
530#define WAVEPOINT_HISTORY 5 /* SNR sample history slow search */
531#define WAVEPOINT_FAST_HISTORY 2 /* SNR sample history fast search */
532#define SEARCH_THRESH_LOW 10 /* SNR to enter cell search */
533#define SEARCH_THRESH_HIGH 13 /* SNR to leave cell search */
534#define WAVELAN_ROAMING_DELTA 1 /* Hysteresis value (+/- SNR) */
535#define CELL_TIMEOUT 2*HZ /* in jiffies */
536
537#define FAST_CELL_SEARCH 1 /* Boolean values... */
538#define NWID_PROMISC 1 /* for code clarity. */
539
540typedef struct wavepoint_beacon
541{
542 unsigned char dsap, /* Unused */
543 ssap, /* Unused */
544 ctrl, /* Unused */
545 O,U,I, /* Unused */
546 spec_id1, /* Unused */
547 spec_id2, /* Unused */
548 pdu_type, /* Unused */
549 seq; /* WavePoint beacon sequence number */
550 __be16 domain_id, /* WavePoint Domain ID */
551 nwid; /* WavePoint NWID */
552} wavepoint_beacon;
553
554typedef struct wavepoint_history
555{
556 unsigned short nwid; /* WavePoint's NWID */
557 int average_slow; /* SNR running average */
558 int average_fast; /* SNR running average */
559 unsigned char sigqual[WAVEPOINT_HISTORY]; /* Ringbuffer of recent SNR's */
560 unsigned char qualptr; /* Index into ringbuffer */
561 unsigned char last_seq; /* Last seq. no seen for WavePoint */
562 struct wavepoint_history *next; /* Next WavePoint in table */
563 struct wavepoint_history *prev; /* Previous WavePoint in table */
564 unsigned long last_seen; /* Time of last beacon recvd, jiffies */
565} wavepoint_history;
566
567struct wavepoint_table
568{
569 wavepoint_history *head; /* Start of ringbuffer */
570 int num_wavepoints; /* No. of WavePoints visible */
571 unsigned char locked; /* Table lock */
572};
573
574#endif /* WAVELAN_ROAMING */
575
576/****************************** TYPES ******************************/
577
578/* Shortcuts */
579typedef struct iw_statistics iw_stats;
580typedef struct iw_quality iw_qual;
581typedef struct iw_freq iw_freq;
582typedef struct net_local net_local;
583typedef struct timer_list timer_list;
584
585/* Basic types */
586typedef u_char mac_addr[WAVELAN_ADDR_SIZE]; /* Hardware address */
587
588/*
589 * Static specific data for the interface.
590 *
591 * For each network interface, Linux keep data in two structure. "device"
592 * keep the generic data (same format for everybody) and "net_local" keep
593 * the additional specific data.
594 */
595struct net_local
596{
597 dev_node_t node; /* ???? What is this stuff ???? */
598 struct net_device * dev; /* Reverse link... */
599 spinlock_t spinlock; /* Serialize access to the hardware (SMP) */
600 struct pcmcia_device * link; /* pcmcia structure */
601 int nresets; /* Number of hw resets */
602 u_char configured; /* If it is configured */
603 u_char reconfig_82593; /* Need to reconfigure the controller */
604 u_char promiscuous; /* Promiscuous mode */
605 u_char allmulticast; /* All Multicast mode */
606 int mc_count; /* Number of multicast addresses */
607
608 int stop; /* Current i82593 Stop Hit Register */
609 int rfp; /* Last DMA machine receive pointer */
610 int overrunning; /* Receiver overrun flag */
611
612 iw_stats wstats; /* Wireless specific stats */
613
614 struct iw_spy_data spy_data;
615 struct iw_public_data wireless_data;
616
617#ifdef HISTOGRAM
618 int his_number; /* Number of intervals */
619 u_char his_range[16]; /* Boundaries of interval ]n-1; n] */
620 u_long his_sum[16]; /* Sum in interval */
621#endif /* HISTOGRAM */
622#ifdef WAVELAN_ROAMING
623 u_long domain_id; /* Domain ID we lock on for roaming */
624 int filter_domains; /* Check Domain ID of beacon found */
625 struct wavepoint_table wavepoint_table; /* Table of visible WavePoints*/
626 wavepoint_history * curr_point; /* Current wavepoint */
627 int cell_search; /* Searching for new cell? */
628 struct timer_list cell_timer; /* Garbage collection */
629#endif /* WAVELAN_ROAMING */
630 void __iomem *mem;
631};
632
633/* ----------------- MODEM MANAGEMENT SUBROUTINES ----------------- */
634static inline u_char /* data */
635 hasr_read(u_long); /* Read the host interface : base address */
636static void
637 hacr_write(u_long, /* Write to host interface : base address */
638 u_char), /* data */
639 hacr_write_slow(u_long,
640 u_char);
641static void
642 psa_read(struct net_device *, /* Read the Parameter Storage Area */
643 int, /* offset in PSA */
644 u_char *, /* buffer to fill */
645 int), /* size to read */
646 psa_write(struct net_device *, /* Write to the PSA */
647 int, /* Offset in psa */
648 u_char *, /* Buffer in memory */
649 int); /* Length of buffer */
650static void
651 mmc_out(u_long, /* Write 1 byte to the Modem Manag Control */
652 u_short,
653 u_char),
654 mmc_write(u_long, /* Write n bytes to the MMC */
655 u_char,
656 u_char *,
657 int);
658static u_char /* Read 1 byte from the MMC */
659 mmc_in(u_long,
660 u_short);
661static void
662 mmc_read(u_long, /* Read n bytes from the MMC */
663 u_char,
664 u_char *,
665 int),
666 fee_wait(u_long, /* Wait for frequency EEprom : base address */
667 int, /* Base delay to wait for */
668 int); /* Number of time to wait */
669static void
670 fee_read(u_long, /* Read the frequency EEprom : base address */
671 u_short, /* destination offset */
672 u_short *, /* data buffer */
673 int); /* number of registers */
674/* ---------------------- I82593 SUBROUTINES ----------------------- */
675static int
676 wv_82593_cmd(struct net_device *, /* synchronously send a command to i82593 */
677 char *,
678 int,
679 int);
680static inline int
681 wv_diag(struct net_device *); /* Diagnostique the i82593 */
682static int
683 read_ringbuf(struct net_device *, /* Read a receive buffer */
684 int,
685 char *,
686 int);
687static void
688 wv_82593_reconfig(struct net_device *); /* Reconfigure the controller */
689/* ------------------- DEBUG & INFO SUBROUTINES ------------------- */
690static void
691 wv_init_info(struct net_device *); /* display startup info */
692/* ------------------- IOCTL, STATS & RECONFIG ------------------- */
693static iw_stats *
694 wavelan_get_wireless_stats(struct net_device *);
695/* ----------------------- PACKET RECEPTION ----------------------- */
696static int
697 wv_start_of_frame(struct net_device *, /* Seek beggining of current frame */
698 int, /* end of frame */
699 int); /* start of buffer */
700static void
701 wv_packet_read(struct net_device *, /* Read a packet from a frame */
702 int,
703 int),
704 wv_packet_rcv(struct net_device *); /* Read all packets waiting */
705/* --------------------- PACKET TRANSMISSION --------------------- */
706static void
707 wv_packet_write(struct net_device *, /* Write a packet to the Tx buffer */
708 void *,
709 short);
710static netdev_tx_t
711 wavelan_packet_xmit(struct sk_buff *, /* Send a packet */
712 struct net_device *);
713/* -------------------- HARDWARE CONFIGURATION -------------------- */
714static int
715 wv_mmc_init(struct net_device *); /* Initialize the modem */
716static int
717 wv_ru_stop(struct net_device *), /* Stop the i82593 receiver unit */
718 wv_ru_start(struct net_device *); /* Start the i82593 receiver unit */
719static int
720 wv_82593_config(struct net_device *); /* Configure the i82593 */
721static int
722 wv_pcmcia_reset(struct net_device *); /* Reset the pcmcia interface */
723static int
724 wv_hw_config(struct net_device *); /* Reset & configure the whole hardware */
725static void
726 wv_hw_reset(struct net_device *); /* Same, + start receiver unit */
727static int
728 wv_pcmcia_config(struct pcmcia_device *); /* Configure the pcmcia interface */
729static void
730 wv_pcmcia_release(struct pcmcia_device *);/* Remove a device */
731/* ---------------------- INTERRUPT HANDLING ---------------------- */
732static irqreturn_t
733 wavelan_interrupt(int, /* Interrupt handler */
734 void *);
735static void
736 wavelan_watchdog(struct net_device *); /* Transmission watchdog */
737/* ------------------- CONFIGURATION CALLBACKS ------------------- */
738static int
739 wavelan_open(struct net_device *), /* Open the device */
740 wavelan_close(struct net_device *); /* Close the device */
741static void
742 wavelan_detach(struct pcmcia_device *p_dev); /* Destroy a removed device */
743
744/**************************** VARIABLES ****************************/
745
746/*
747 * Parameters that can be set with 'insmod'
748 * The exact syntax is 'insmod wavelan_cs.o <var>=<value>'
749 */
750
751/* Shared memory speed, in ns */
752static int mem_speed = 0;
753
754/* New module interface */
755module_param(mem_speed, int, 0);
756
757#ifdef WAVELAN_ROAMING /* Conditional compile, see above in options */
758/* Enable roaming mode ? No ! Please keep this to 0 */
759static int do_roaming = 0;
760module_param(do_roaming, bool, 0);
761#endif /* WAVELAN_ROAMING */
762
763MODULE_LICENSE("GPL");
764
765#endif /* WAVELAN_CS_P_H */
766
diff --git a/drivers/net/wireless/wl12xx/Kconfig b/drivers/net/wireless/wl12xx/Kconfig
index 88060e117541..785e0244e305 100644
--- a/drivers/net/wireless/wl12xx/Kconfig
+++ b/drivers/net/wireless/wl12xx/Kconfig
@@ -1,6 +1,6 @@
1menuconfig WL12XX 1menuconfig WL12XX
2 tristate "TI wl12xx driver support" 2 tristate "TI wl12xx driver support"
3 depends on MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on MAC80211 && EXPERIMENTAL
4 ---help--- 4 ---help---
5 This will enable TI wl12xx driver support. The drivers make 5 This will enable TI wl12xx driver support. The drivers make
6 use of the mac80211 stack. 6 use of the mac80211 stack.
@@ -42,6 +42,7 @@ config WL1251_SDIO
42config WL1271 42config WL1271
43 tristate "TI wl1271 support" 43 tristate "TI wl1271 support"
44 depends on WL12XX && SPI_MASTER && GENERIC_HARDIRQS 44 depends on WL12XX && SPI_MASTER && GENERIC_HARDIRQS
45 depends on INET
45 select FW_LOADER 46 select FW_LOADER
46 select CRC7 47 select CRC7
47 ---help--- 48 ---help---
diff --git a/drivers/net/wireless/wl12xx/Makefile b/drivers/net/wireless/wl12xx/Makefile
index 62e37ad01cc0..f47ec94c16dc 100644
--- a/drivers/net/wireless/wl12xx/Makefile
+++ b/drivers/net/wireless/wl12xx/Makefile
@@ -10,5 +10,7 @@ obj-$(CONFIG_WL1251_SDIO) += wl1251_sdio.o
10wl1271-objs = wl1271_main.o wl1271_spi.o wl1271_cmd.o \ 10wl1271-objs = wl1271_main.o wl1271_spi.o wl1271_cmd.o \
11 wl1271_event.o wl1271_tx.o wl1271_rx.o \ 11 wl1271_event.o wl1271_tx.o wl1271_rx.o \
12 wl1271_ps.o wl1271_acx.o wl1271_boot.o \ 12 wl1271_ps.o wl1271_acx.o wl1271_boot.o \
13 wl1271_init.o wl1271_debugfs.o 13 wl1271_init.o wl1271_debugfs.o wl1271_io.o
14
15wl1271-$(CONFIG_NL80211_TESTMODE) += wl1271_testmode.o
14obj-$(CONFIG_WL1271) += wl1271.o 16obj-$(CONFIG_WL1271) += wl1271.o
diff --git a/drivers/net/wireless/wl12xx/wl1251.h b/drivers/net/wireless/wl12xx/wl1251.h
index 998e4b6252bd..37c61c19cae5 100644
--- a/drivers/net/wireless/wl12xx/wl1251.h
+++ b/drivers/net/wireless/wl12xx/wl1251.h
@@ -247,6 +247,7 @@ struct wl1251_debugfs {
247 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data; 247 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
248 248
249 struct dentry *tx_queue_len; 249 struct dentry *tx_queue_len;
250 struct dentry *tx_queue_status;
250 251
251 struct dentry *retry_count; 252 struct dentry *retry_count;
252 struct dentry *excessive_retries; 253 struct dentry *excessive_retries;
@@ -269,6 +270,7 @@ struct wl1251 {
269 270
270 void (*set_power)(bool enable); 271 void (*set_power)(bool enable);
271 int irq; 272 int irq;
273 bool use_eeprom;
272 274
273 enum wl1251_state state; 275 enum wl1251_state state;
274 struct mutex mutex; 276 struct mutex mutex;
@@ -339,9 +341,6 @@ struct wl1251 {
339 /* Are we currently scanning */ 341 /* Are we currently scanning */
340 bool scanning; 342 bool scanning;
341 343
342 /* Our association ID */
343 u16 aid;
344
345 /* Default key (for WEP) */ 344 /* Default key (for WEP) */
346 u32 default_key; 345 u32 default_key;
347 346
@@ -354,6 +353,8 @@ struct wl1251 {
354 /* is firmware in elp mode */ 353 /* is firmware in elp mode */
355 bool elp; 354 bool elp;
356 355
356 struct delayed_work elp_work;
357
357 /* we can be in psm, but not in elp, we have to differentiate */ 358 /* we can be in psm, but not in elp, we have to differentiate */
358 bool psm; 359 bool psm;
359 360
@@ -374,6 +375,8 @@ struct wl1251 {
374 u8 buffer_busyword[WL1251_BUSY_WORD_LEN]; 375 u8 buffer_busyword[WL1251_BUSY_WORD_LEN];
375 struct wl1251_rx_descriptor *rx_descriptor; 376 struct wl1251_rx_descriptor *rx_descriptor;
376 377
378 struct ieee80211_vif *vif;
379
377 u32 chip_id; 380 u32 chip_id;
378 char fw_ver[21]; 381 char fw_ver[21];
379}; 382};
diff --git a/drivers/net/wireless/wl12xx/wl1251_acx.c b/drivers/net/wireless/wl12xx/wl1251_acx.c
index 10b26c4532c9..91891f928070 100644
--- a/drivers/net/wireless/wl12xx/wl1251_acx.c
+++ b/drivers/net/wireless/wl12xx/wl1251_acx.c
@@ -1,6 +1,7 @@
1#include "wl1251_acx.h" 1#include "wl1251_acx.h"
2 2
3#include <linux/module.h> 3#include <linux/module.h>
4#include <linux/slab.h>
4#include <linux/crc7.h> 5#include <linux/crc7.h>
5 6
6#include "wl1251.h" 7#include "wl1251.h"
@@ -494,7 +495,7 @@ out:
494 return ret; 495 return ret;
495} 496}
496 497
497int wl1251_acx_beacon_filter_opt(struct wl1251 *wl) 498int wl1251_acx_beacon_filter_opt(struct wl1251 *wl, bool enable_filter)
498{ 499{
499 struct acx_beacon_filter_option *beacon_filter; 500 struct acx_beacon_filter_option *beacon_filter;
500 int ret; 501 int ret;
@@ -507,7 +508,7 @@ int wl1251_acx_beacon_filter_opt(struct wl1251 *wl)
507 goto out; 508 goto out;
508 } 509 }
509 510
510 beacon_filter->enable = 0; 511 beacon_filter->enable = enable_filter;
511 beacon_filter->max_num_beacons = 0; 512 beacon_filter->max_num_beacons = 0;
512 513
513 ret = wl1251_cmd_configure(wl, ACX_BEACON_FILTER_OPT, 514 ret = wl1251_cmd_configure(wl, ACX_BEACON_FILTER_OPT,
@@ -525,6 +526,7 @@ out:
525int wl1251_acx_beacon_filter_table(struct wl1251 *wl) 526int wl1251_acx_beacon_filter_table(struct wl1251 *wl)
526{ 527{
527 struct acx_beacon_filter_ie_table *ie_table; 528 struct acx_beacon_filter_ie_table *ie_table;
529 int idx = 0;
528 int ret; 530 int ret;
529 531
530 wl1251_debug(DEBUG_ACX, "acx beacon filter table"); 532 wl1251_debug(DEBUG_ACX, "acx beacon filter table");
@@ -535,8 +537,10 @@ int wl1251_acx_beacon_filter_table(struct wl1251 *wl)
535 goto out; 537 goto out;
536 } 538 }
537 539
538 ie_table->num_ie = 0; 540 /* configure default beacon pass-through rules */
539 memset(ie_table->table, 0, BEACON_FILTER_TABLE_MAX_SIZE); 541 ie_table->num_ie = 1;
542 ie_table->table[idx++] = BEACON_FILTER_IE_ID_CHANNEL_SWITCH_ANN;
543 ie_table->table[idx++] = BEACON_RULE_PASS_ON_APPEARANCE;
540 544
541 ret = wl1251_cmd_configure(wl, ACX_BEACON_FILTER_TABLE, 545 ret = wl1251_cmd_configure(wl, ACX_BEACON_FILTER_TABLE,
542 ie_table, sizeof(*ie_table)); 546 ie_table, sizeof(*ie_table));
@@ -550,6 +554,35 @@ out:
550 return ret; 554 return ret;
551} 555}
552 556
557int wl1251_acx_conn_monit_params(struct wl1251 *wl)
558{
559 struct acx_conn_monit_params *acx;
560 int ret;
561
562 wl1251_debug(DEBUG_ACX, "acx connection monitor parameters");
563
564 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
565 if (!acx) {
566 ret = -ENOMEM;
567 goto out;
568 }
569
570 acx->synch_fail_thold = SYNCH_FAIL_DEFAULT_THRESHOLD;
571 acx->bss_lose_timeout = NO_BEACON_DEFAULT_TIMEOUT;
572
573 ret = wl1251_cmd_configure(wl, ACX_CONN_MONIT_PARAMS,
574 acx, sizeof(*acx));
575 if (ret < 0) {
576 wl1251_warning("failed to set connection monitor "
577 "parameters: %d", ret);
578 goto out;
579 }
580
581out:
582 kfree(acx);
583 return ret;
584}
585
553int wl1251_acx_sg_enable(struct wl1251 *wl) 586int wl1251_acx_sg_enable(struct wl1251 *wl)
554{ 587{
555 struct acx_bt_wlan_coex *pta; 588 struct acx_bt_wlan_coex *pta;
@@ -916,3 +949,100 @@ out:
916 kfree(mem_conf); 949 kfree(mem_conf);
917 return ret; 950 return ret;
918} 951}
952
953int wl1251_acx_wr_tbtt_and_dtim(struct wl1251 *wl, u16 tbtt, u8 dtim)
954{
955 struct wl1251_acx_wr_tbtt_and_dtim *acx;
956 int ret;
957
958 wl1251_debug(DEBUG_ACX, "acx tbtt and dtim");
959
960 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
961 if (!acx) {
962 ret = -ENOMEM;
963 goto out;
964 }
965
966 acx->tbtt = tbtt;
967 acx->dtim = dtim;
968
969 ret = wl1251_cmd_configure(wl, ACX_WR_TBTT_AND_DTIM,
970 acx, sizeof(*acx));
971 if (ret < 0) {
972 wl1251_warning("failed to set tbtt and dtim: %d", ret);
973 goto out;
974 }
975
976out:
977 kfree(acx);
978 return ret;
979}
980
981int wl1251_acx_ac_cfg(struct wl1251 *wl, u8 ac, u8 cw_min, u16 cw_max,
982 u8 aifs, u16 txop)
983{
984 struct wl1251_acx_ac_cfg *acx;
985 int ret = 0;
986
987 wl1251_debug(DEBUG_ACX, "acx ac cfg %d cw_ming %d cw_max %d "
988 "aifs %d txop %d", ac, cw_min, cw_max, aifs, txop);
989
990 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
991
992 if (!acx) {
993 ret = -ENOMEM;
994 goto out;
995 }
996
997 acx->ac = ac;
998 acx->cw_min = cw_min;
999 acx->cw_max = cw_max;
1000 acx->aifsn = aifs;
1001 acx->txop_limit = txop;
1002
1003 ret = wl1251_cmd_configure(wl, ACX_AC_CFG, acx, sizeof(*acx));
1004 if (ret < 0) {
1005 wl1251_warning("acx ac cfg failed: %d", ret);
1006 goto out;
1007 }
1008
1009out:
1010 kfree(acx);
1011 return ret;
1012}
1013
1014int wl1251_acx_tid_cfg(struct wl1251 *wl, u8 queue,
1015 enum wl1251_acx_channel_type type,
1016 u8 tsid, enum wl1251_acx_ps_scheme ps_scheme,
1017 enum wl1251_acx_ack_policy ack_policy)
1018{
1019 struct wl1251_acx_tid_cfg *acx;
1020 int ret = 0;
1021
1022 wl1251_debug(DEBUG_ACX, "acx tid cfg %d type %d tsid %d "
1023 "ps_scheme %d ack_policy %d", queue, type, tsid,
1024 ps_scheme, ack_policy);
1025
1026 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
1027
1028 if (!acx) {
1029 ret = -ENOMEM;
1030 goto out;
1031 }
1032
1033 acx->queue = queue;
1034 acx->type = type;
1035 acx->tsid = tsid;
1036 acx->ps_scheme = ps_scheme;
1037 acx->ack_policy = ack_policy;
1038
1039 ret = wl1251_cmd_configure(wl, ACX_TID_CFG, acx, sizeof(*acx));
1040 if (ret < 0) {
1041 wl1251_warning("acx tid cfg failed: %d", ret);
1042 goto out;
1043 }
1044
1045out:
1046 kfree(acx);
1047 return ret;
1048}
diff --git a/drivers/net/wireless/wl12xx/wl1251_acx.h b/drivers/net/wireless/wl12xx/wl1251_acx.h
index cafb91459504..26160c45784c 100644
--- a/drivers/net/wireless/wl12xx/wl1251_acx.h
+++ b/drivers/net/wireless/wl12xx/wl1251_acx.h
@@ -450,6 +450,11 @@ struct acx_beacon_filter_option {
450 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \ 450 (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
451 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE)) 451 BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
452 452
453#define BEACON_RULE_PASS_ON_CHANGE BIT(0)
454#define BEACON_RULE_PASS_ON_APPEARANCE BIT(1)
455
456#define BEACON_FILTER_IE_ID_CHANNEL_SWITCH_ANN (37)
457
453struct acx_beacon_filter_ie_table { 458struct acx_beacon_filter_ie_table {
454 struct acx_header header; 459 struct acx_header header;
455 460
@@ -458,6 +463,16 @@ struct acx_beacon_filter_ie_table {
458 u8 pad[3]; 463 u8 pad[3];
459} __attribute__ ((packed)); 464} __attribute__ ((packed));
460 465
466#define SYNCH_FAIL_DEFAULT_THRESHOLD 10 /* number of beacons */
467#define NO_BEACON_DEFAULT_TIMEOUT (500) /* in microseconds */
468
469struct acx_conn_monit_params {
470 struct acx_header header;
471
472 u32 synch_fail_thold; /* number of beacons missed */
473 u32 bss_lose_timeout; /* number of TU's from synch fail */
474};
475
461enum { 476enum {
462 SG_ENABLE = 0, 477 SG_ENABLE = 0,
463 SG_DISABLE, 478 SG_DISABLE,
@@ -1134,6 +1149,104 @@ struct wl1251_acx_mem_map {
1134 u32 num_rx_mem_blocks; 1149 u32 num_rx_mem_blocks;
1135} __attribute__ ((packed)); 1150} __attribute__ ((packed));
1136 1151
1152
1153struct wl1251_acx_wr_tbtt_and_dtim {
1154
1155 struct acx_header header;
1156
1157 /* Time in TUs between two consecutive beacons */
1158 u16 tbtt;
1159
1160 /*
1161 * DTIM period
1162 * For BSS: Number of TBTTs in a DTIM period (range: 1-10)
1163 * For IBSS: value shall be set to 1
1164 */
1165 u8 dtim;
1166 u8 padding;
1167} __attribute__ ((packed));
1168
1169struct wl1251_acx_ac_cfg {
1170 struct acx_header header;
1171
1172 /*
1173 * Access Category - The TX queue's access category
1174 * (refer to AccessCategory_enum)
1175 */
1176 u8 ac;
1177
1178 /*
1179 * The contention window minimum size (in slots) for
1180 * the access class.
1181 */
1182 u8 cw_min;
1183
1184 /*
1185 * The contention window maximum size (in slots) for
1186 * the access class.
1187 */
1188 u16 cw_max;
1189
1190 /* The AIF value (in slots) for the access class. */
1191 u8 aifsn;
1192
1193 u8 reserved;
1194
1195 /* The TX Op Limit (in microseconds) for the access class. */
1196 u16 txop_limit;
1197} __attribute__ ((packed));
1198
1199
1200enum wl1251_acx_channel_type {
1201 CHANNEL_TYPE_DCF = 0,
1202 CHANNEL_TYPE_EDCF = 1,
1203 CHANNEL_TYPE_HCCA = 2,
1204};
1205
1206enum wl1251_acx_ps_scheme {
1207 /* regular ps: simple sending of packets */
1208 WL1251_ACX_PS_SCHEME_LEGACY = 0,
1209
1210 /* sending a packet triggers a unscheduled apsd downstream */
1211 WL1251_ACX_PS_SCHEME_UPSD_TRIGGER = 1,
1212
1213 /* a pspoll packet will be sent before every data packet */
1214 WL1251_ACX_PS_SCHEME_LEGACY_PSPOLL = 2,
1215
1216 /* scheduled apsd mode */
1217 WL1251_ACX_PS_SCHEME_SAPSD = 3,
1218};
1219
1220enum wl1251_acx_ack_policy {
1221 WL1251_ACX_ACK_POLICY_LEGACY = 0,
1222 WL1251_ACX_ACK_POLICY_NO_ACK = 1,
1223 WL1251_ACX_ACK_POLICY_BLOCK = 2,
1224};
1225
1226struct wl1251_acx_tid_cfg {
1227 struct acx_header header;
1228
1229 /* tx queue id number (0-7) */
1230 u8 queue;
1231
1232 /* channel access type for the queue, enum wl1251_acx_channel_type */
1233 u8 type;
1234
1235 /* EDCA: ac index (0-3), HCCA: traffic stream id (8-15) */
1236 u8 tsid;
1237
1238 /* ps scheme of the specified queue, enum wl1251_acx_ps_scheme */
1239 u8 ps_scheme;
1240
1241 /* the tx queue ack policy, enum wl1251_acx_ack_policy */
1242 u8 ack_policy;
1243
1244 u8 padding[3];
1245
1246 /* not supported */
1247 u32 apsdconf[2];
1248} __attribute__ ((packed));
1249
1137/************************************************************************* 1250/*************************************************************************
1138 1251
1139 Host Interrupt Register (WiLink -> Host) 1252 Host Interrupt Register (WiLink -> Host)
@@ -1273,8 +1386,9 @@ int wl1251_acx_slot(struct wl1251 *wl, enum acx_slot_type slot_time);
1273int wl1251_acx_group_address_tbl(struct wl1251 *wl); 1386int wl1251_acx_group_address_tbl(struct wl1251 *wl);
1274int wl1251_acx_service_period_timeout(struct wl1251 *wl); 1387int wl1251_acx_service_period_timeout(struct wl1251 *wl);
1275int wl1251_acx_rts_threshold(struct wl1251 *wl, u16 rts_threshold); 1388int wl1251_acx_rts_threshold(struct wl1251 *wl, u16 rts_threshold);
1276int wl1251_acx_beacon_filter_opt(struct wl1251 *wl); 1389int wl1251_acx_beacon_filter_opt(struct wl1251 *wl, bool enable_filter);
1277int wl1251_acx_beacon_filter_table(struct wl1251 *wl); 1390int wl1251_acx_beacon_filter_table(struct wl1251 *wl);
1391int wl1251_acx_conn_monit_params(struct wl1251 *wl);
1278int wl1251_acx_sg_enable(struct wl1251 *wl); 1392int wl1251_acx_sg_enable(struct wl1251 *wl);
1279int wl1251_acx_sg_cfg(struct wl1251 *wl); 1393int wl1251_acx_sg_cfg(struct wl1251 *wl);
1280int wl1251_acx_cca_threshold(struct wl1251 *wl); 1394int wl1251_acx_cca_threshold(struct wl1251 *wl);
@@ -1288,5 +1402,12 @@ int wl1251_acx_statistics(struct wl1251 *wl, struct acx_statistics *stats);
1288int wl1251_acx_tsf_info(struct wl1251 *wl, u64 *mactime); 1402int wl1251_acx_tsf_info(struct wl1251 *wl, u64 *mactime);
1289int wl1251_acx_rate_policies(struct wl1251 *wl); 1403int wl1251_acx_rate_policies(struct wl1251 *wl);
1290int wl1251_acx_mem_cfg(struct wl1251 *wl); 1404int wl1251_acx_mem_cfg(struct wl1251 *wl);
1405int wl1251_acx_wr_tbtt_and_dtim(struct wl1251 *wl, u16 tbtt, u8 dtim);
1406int wl1251_acx_ac_cfg(struct wl1251 *wl, u8 ac, u8 cw_min, u16 cw_max,
1407 u8 aifs, u16 txop);
1408int wl1251_acx_tid_cfg(struct wl1251 *wl, u8 queue,
1409 enum wl1251_acx_channel_type type,
1410 u8 tsid, enum wl1251_acx_ps_scheme ps_scheme,
1411 enum wl1251_acx_ack_policy ack_policy);
1291 1412
1292#endif /* __WL1251_ACX_H__ */ 1413#endif /* __WL1251_ACX_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1251_boot.c b/drivers/net/wireless/wl12xx/wl1251_boot.c
index 452d748e42c6..d5ac79aeaa73 100644
--- a/drivers/net/wireless/wl12xx/wl1251_boot.c
+++ b/drivers/net/wireless/wl12xx/wl1251_boot.c
@@ -22,6 +22,7 @@
22 */ 22 */
23 23
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/slab.h>
25 26
26#include "wl1251_reg.h" 27#include "wl1251_reg.h"
27#include "wl1251_boot.h" 28#include "wl1251_boot.h"
@@ -256,7 +257,7 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
256 } 257 }
257 } 258 }
258 259
259 if (loop >= INIT_LOOP) { 260 if (loop > INIT_LOOP) {
260 wl1251_error("timeout waiting for the hardware to " 261 wl1251_error("timeout waiting for the hardware to "
261 "complete initialization"); 262 "complete initialization");
262 return -EIO; 263 return -EIO;
@@ -296,8 +297,12 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
296 WL1251_ACX_INTR_INIT_COMPLETE; 297 WL1251_ACX_INTR_INIT_COMPLETE;
297 wl1251_boot_target_enable_interrupts(wl); 298 wl1251_boot_target_enable_interrupts(wl);
298 299
299 /* unmask all mbox events */ 300 wl->event_mask = SCAN_COMPLETE_EVENT_ID | BSS_LOSE_EVENT_ID |
300 wl->event_mask = 0xffffffff; 301 SYNCHRONIZATION_TIMEOUT_EVENT_ID |
302 ROAMING_TRIGGER_LOW_RSSI_EVENT_ID |
303 ROAMING_TRIGGER_REGAINED_RSSI_EVENT_ID |
304 REGAINED_BSS_EVENT_ID | BT_PTA_SENSE_EVENT_ID |
305 BT_PTA_PREDICTION_EVENT_ID;
301 306
302 ret = wl1251_event_unmask(wl); 307 ret = wl1251_event_unmask(wl);
303 if (ret < 0) { 308 if (ret < 0) {
@@ -314,8 +319,8 @@ int wl1251_boot_run_firmware(struct wl1251 *wl)
314static int wl1251_boot_upload_firmware(struct wl1251 *wl) 319static int wl1251_boot_upload_firmware(struct wl1251 *wl)
315{ 320{
316 int addr, chunk_num, partition_limit; 321 int addr, chunk_num, partition_limit;
317 size_t fw_data_len; 322 size_t fw_data_len, len;
318 u8 *p; 323 u8 *p, *buf;
319 324
320 /* whal_FwCtrl_LoadFwImageSm() */ 325 /* whal_FwCtrl_LoadFwImageSm() */
321 326
@@ -334,6 +339,12 @@ static int wl1251_boot_upload_firmware(struct wl1251 *wl)
334 return -EIO; 339 return -EIO;
335 } 340 }
336 341
342 buf = kmalloc(CHUNK_SIZE, GFP_KERNEL);
343 if (!buf) {
344 wl1251_error("allocation for firmware upload chunk failed");
345 return -ENOMEM;
346 }
347
337 wl1251_set_partition(wl, WL1251_PART_DOWN_MEM_START, 348 wl1251_set_partition(wl, WL1251_PART_DOWN_MEM_START,
338 WL1251_PART_DOWN_MEM_SIZE, 349 WL1251_PART_DOWN_MEM_SIZE,
339 WL1251_PART_DOWN_REG_START, 350 WL1251_PART_DOWN_REG_START,
@@ -364,7 +375,11 @@ static int wl1251_boot_upload_firmware(struct wl1251 *wl)
364 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE; 375 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
365 wl1251_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x", 376 wl1251_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
366 p, addr); 377 p, addr);
367 wl1251_mem_write(wl, addr, p, CHUNK_SIZE); 378
379 /* need to copy the chunk for dma */
380 len = CHUNK_SIZE;
381 memcpy(buf, p, len);
382 wl1251_mem_write(wl, addr, buf, len);
368 383
369 chunk_num++; 384 chunk_num++;
370 } 385 }
@@ -372,9 +387,16 @@ static int wl1251_boot_upload_firmware(struct wl1251 *wl)
372 /* 10.4 upload the last chunk */ 387 /* 10.4 upload the last chunk */
373 addr = WL1251_PART_DOWN_MEM_START + chunk_num * CHUNK_SIZE; 388 addr = WL1251_PART_DOWN_MEM_START + chunk_num * CHUNK_SIZE;
374 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE; 389 p = wl->fw + FW_HDR_SIZE + chunk_num * CHUNK_SIZE;
390
391 /* need to copy the chunk for dma */
392 len = fw_data_len % CHUNK_SIZE;
393 memcpy(buf, p, len);
394
375 wl1251_debug(DEBUG_BOOT, "uploading fw last chunk (%zu B) 0x%p to 0x%x", 395 wl1251_debug(DEBUG_BOOT, "uploading fw last chunk (%zu B) 0x%p to 0x%x",
376 fw_data_len % CHUNK_SIZE, p, addr); 396 len, p, addr);
377 wl1251_mem_write(wl, addr, p, fw_data_len % CHUNK_SIZE); 397 wl1251_mem_write(wl, addr, buf, len);
398
399 kfree(buf);
378 400
379 return 0; 401 return 0;
380} 402}
@@ -473,13 +495,19 @@ int wl1251_boot(struct wl1251 *wl)
473 goto out; 495 goto out;
474 496
475 /* 2. start processing NVS file */ 497 /* 2. start processing NVS file */
476 ret = wl1251_boot_upload_nvs(wl); 498 if (wl->use_eeprom) {
477 if (ret < 0) 499 wl1251_reg_write32(wl, ACX_REG_EE_START, START_EEPROM_MGR);
478 goto out; 500 msleep(4000);
479 501 wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, USE_EEPROM);
480 /* write firmware's last address (ie. it's length) to 502 } else {
481 * ACX_EEPROMLESS_IND_REG */ 503 ret = wl1251_boot_upload_nvs(wl);
482 wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, wl->fw_len); 504 if (ret < 0)
505 goto out;
506
507 /* write firmware's last address (ie. it's length) to
508 * ACX_EEPROMLESS_IND_REG */
509 wl1251_reg_write32(wl, ACX_EEPROMLESS_IND_REG, wl->fw_len);
510 }
483 511
484 /* 6. read the EEPROM parameters */ 512 /* 6. read the EEPROM parameters */
485 tmp = wl1251_reg_read32(wl, SCR_PAD2); 513 tmp = wl1251_reg_read32(wl, SCR_PAD2);
diff --git a/drivers/net/wireless/wl12xx/wl1251_cmd.c b/drivers/net/wireless/wl12xx/wl1251_cmd.c
index 770f260726bd..a37b30cef489 100644
--- a/drivers/net/wireless/wl12xx/wl1251_cmd.c
+++ b/drivers/net/wireless/wl12xx/wl1251_cmd.c
@@ -1,6 +1,7 @@
1#include "wl1251_cmd.h" 1#include "wl1251_cmd.h"
2 2
3#include <linux/module.h> 3#include <linux/module.h>
4#include <linux/slab.h>
4#include <linux/crc7.h> 5#include <linux/crc7.h>
5 6
6#include "wl1251.h" 7#include "wl1251.h"
@@ -410,3 +411,86 @@ out:
410 kfree(cmd); 411 kfree(cmd);
411 return ret; 412 return ret;
412} 413}
414
415int wl1251_cmd_scan(struct wl1251 *wl, u8 *ssid, size_t ssid_len,
416 struct ieee80211_channel *channels[],
417 unsigned int n_channels, unsigned int n_probes)
418{
419 struct wl1251_cmd_scan *cmd;
420 int i, ret = 0;
421
422 wl1251_debug(DEBUG_CMD, "cmd scan");
423
424 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
425 if (!cmd)
426 return -ENOMEM;
427
428 cmd->params.rx_config_options = cpu_to_le32(CFG_RX_ALL_GOOD);
429 cmd->params.rx_filter_options = cpu_to_le32(CFG_RX_PRSP_EN |
430 CFG_RX_MGMT_EN |
431 CFG_RX_BCN_EN);
432 cmd->params.scan_options = 0;
433 cmd->params.num_channels = n_channels;
434 cmd->params.num_probe_requests = n_probes;
435 cmd->params.tx_rate = cpu_to_le16(1 << 1); /* 2 Mbps */
436 cmd->params.tid_trigger = 0;
437
438 for (i = 0; i < n_channels; i++) {
439 cmd->channels[i].min_duration =
440 cpu_to_le32(WL1251_SCAN_MIN_DURATION);
441 cmd->channels[i].max_duration =
442 cpu_to_le32(WL1251_SCAN_MAX_DURATION);
443 memset(&cmd->channels[i].bssid_lsb, 0xff, 4);
444 memset(&cmd->channels[i].bssid_msb, 0xff, 2);
445 cmd->channels[i].early_termination = 0;
446 cmd->channels[i].tx_power_att = 0;
447 cmd->channels[i].channel = channels[i]->hw_value;
448 }
449
450 cmd->params.ssid_len = ssid_len;
451 if (ssid)
452 memcpy(cmd->params.ssid, ssid, ssid_len);
453
454 ret = wl1251_cmd_send(wl, CMD_SCAN, cmd, sizeof(*cmd));
455 if (ret < 0) {
456 wl1251_error("cmd scan failed: %d", ret);
457 goto out;
458 }
459
460 wl1251_mem_read(wl, wl->cmd_box_addr, cmd, sizeof(*cmd));
461
462 if (cmd->header.status != CMD_STATUS_SUCCESS) {
463 wl1251_error("cmd scan status wasn't success: %d",
464 cmd->header.status);
465 ret = -EIO;
466 goto out;
467 }
468
469out:
470 kfree(cmd);
471 return ret;
472}
473
474int wl1251_cmd_trigger_scan_to(struct wl1251 *wl, u32 timeout)
475{
476 struct wl1251_cmd_trigger_scan_to *cmd;
477 int ret;
478
479 wl1251_debug(DEBUG_CMD, "cmd trigger scan to");
480
481 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
482 if (!cmd)
483 return -ENOMEM;
484
485 cmd->timeout = timeout;
486
487 ret = wl1251_cmd_send(wl, CMD_SCAN, cmd, sizeof(*cmd));
488 if (ret < 0) {
489 wl1251_error("cmd trigger scan to failed: %d", ret);
490 goto out;
491 }
492
493out:
494 kfree(cmd);
495 return ret;
496}
diff --git a/drivers/net/wireless/wl12xx/wl1251_cmd.h b/drivers/net/wireless/wl12xx/wl1251_cmd.h
index dff798ad0ef5..4ad67cae94d2 100644
--- a/drivers/net/wireless/wl12xx/wl1251_cmd.h
+++ b/drivers/net/wireless/wl12xx/wl1251_cmd.h
@@ -27,6 +27,8 @@
27 27
28#include "wl1251.h" 28#include "wl1251.h"
29 29
30#include <net/cfg80211.h>
31
30struct acx_header; 32struct acx_header;
31 33
32int wl1251_cmd_send(struct wl1251 *wl, u16 type, void *buf, size_t buf_len); 34int wl1251_cmd_send(struct wl1251 *wl, u16 type, void *buf, size_t buf_len);
@@ -43,6 +45,10 @@ int wl1251_cmd_read_memory(struct wl1251 *wl, u32 addr, void *answer,
43 size_t len); 45 size_t len);
44int wl1251_cmd_template_set(struct wl1251 *wl, u16 cmd_id, 46int wl1251_cmd_template_set(struct wl1251 *wl, u16 cmd_id,
45 void *buf, size_t buf_len); 47 void *buf, size_t buf_len);
48int wl1251_cmd_scan(struct wl1251 *wl, u8 *ssid, size_t ssid_len,
49 struct ieee80211_channel *channels[],
50 unsigned int n_channels, unsigned int n_probes);
51int wl1251_cmd_trigger_scan_to(struct wl1251 *wl, u32 timeout);
46 52
47/* unit ms */ 53/* unit ms */
48#define WL1251_COMMAND_TIMEOUT 2000 54#define WL1251_COMMAND_TIMEOUT 2000
@@ -163,8 +169,12 @@ struct cmd_read_write_memory {
163#define CMDMBOX_HEADER_LEN 4 169#define CMDMBOX_HEADER_LEN 4
164#define CMDMBOX_INFO_ELEM_HEADER_LEN 4 170#define CMDMBOX_INFO_ELEM_HEADER_LEN 4
165 171
172#define WL1251_SCAN_MIN_DURATION 30000
173#define WL1251_SCAN_MAX_DURATION 60000
174
175#define WL1251_SCAN_NUM_PROBES 3
166 176
167struct basic_scan_parameters { 177struct wl1251_scan_parameters {
168 u32 rx_config_options; 178 u32 rx_config_options;
169 u32 rx_filter_options; 179 u32 rx_filter_options;
170 180
@@ -189,11 +199,11 @@ struct basic_scan_parameters {
189 199
190 u8 tid_trigger; 200 u8 tid_trigger;
191 u8 ssid_len; 201 u8 ssid_len;
192 u32 ssid[8]; 202 u8 ssid[32];
193 203
194} __attribute__ ((packed)); 204} __attribute__ ((packed));
195 205
196struct basic_scan_channel_parameters { 206struct wl1251_scan_ch_parameters {
197 u32 min_duration; /* in TU */ 207 u32 min_duration; /* in TU */
198 u32 max_duration; /* in TU */ 208 u32 max_duration; /* in TU */
199 u32 bssid_lsb; 209 u32 bssid_lsb;
@@ -213,11 +223,11 @@ struct basic_scan_channel_parameters {
213/* SCAN parameters */ 223/* SCAN parameters */
214#define SCAN_MAX_NUM_OF_CHANNELS 16 224#define SCAN_MAX_NUM_OF_CHANNELS 16
215 225
216struct cmd_scan { 226struct wl1251_cmd_scan {
217 struct wl1251_cmd_header header; 227 struct wl1251_cmd_header header;
218 228
219 struct basic_scan_parameters params; 229 struct wl1251_scan_parameters params;
220 struct basic_scan_channel_parameters channels[SCAN_MAX_NUM_OF_CHANNELS]; 230 struct wl1251_scan_ch_parameters channels[SCAN_MAX_NUM_OF_CHANNELS];
221} __attribute__ ((packed)); 231} __attribute__ ((packed));
222 232
223enum { 233enum {
diff --git a/drivers/net/wireless/wl12xx/wl1251_debugfs.c b/drivers/net/wireless/wl12xx/wl1251_debugfs.c
index a00723059f83..5e4465ac08fa 100644
--- a/drivers/net/wireless/wl12xx/wl1251_debugfs.c
+++ b/drivers/net/wireless/wl12xx/wl1251_debugfs.c
@@ -24,6 +24,7 @@
24#include "wl1251_debugfs.h" 24#include "wl1251_debugfs.h"
25 25
26#include <linux/skbuff.h> 26#include <linux/skbuff.h>
27#include <linux/slab.h>
27 28
28#include "wl1251.h" 29#include "wl1251.h"
29#include "wl1251_acx.h" 30#include "wl1251_acx.h"
@@ -237,6 +238,27 @@ static const struct file_operations tx_queue_len_ops = {
237 .open = wl1251_open_file_generic, 238 .open = wl1251_open_file_generic,
238}; 239};
239 240
241static ssize_t tx_queue_status_read(struct file *file, char __user *userbuf,
242 size_t count, loff_t *ppos)
243{
244 struct wl1251 *wl = file->private_data;
245 char buf[3], status;
246 int len;
247
248 if (wl->tx_queue_stopped)
249 status = 's';
250 else
251 status = 'r';
252
253 len = scnprintf(buf, sizeof(buf), "%c\n", status);
254 return simple_read_from_buffer(userbuf, count, ppos, buf, len);
255}
256
257static const struct file_operations tx_queue_status_ops = {
258 .read = tx_queue_status_read,
259 .open = wl1251_open_file_generic,
260};
261
240static void wl1251_debugfs_delete_files(struct wl1251 *wl) 262static void wl1251_debugfs_delete_files(struct wl1251 *wl)
241{ 263{
242 DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow); 264 DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow);
@@ -331,6 +353,7 @@ static void wl1251_debugfs_delete_files(struct wl1251 *wl)
331 DEBUGFS_FWSTATS_DEL(rxpipe, tx_xfr_host_int_trig_rx_data); 353 DEBUGFS_FWSTATS_DEL(rxpipe, tx_xfr_host_int_trig_rx_data);
332 354
333 DEBUGFS_DEL(tx_queue_len); 355 DEBUGFS_DEL(tx_queue_len);
356 DEBUGFS_DEL(tx_queue_status);
334 DEBUGFS_DEL(retry_count); 357 DEBUGFS_DEL(retry_count);
335 DEBUGFS_DEL(excessive_retries); 358 DEBUGFS_DEL(excessive_retries);
336} 359}
@@ -431,6 +454,7 @@ static int wl1251_debugfs_add_files(struct wl1251 *wl)
431 DEBUGFS_FWSTATS_ADD(rxpipe, tx_xfr_host_int_trig_rx_data); 454 DEBUGFS_FWSTATS_ADD(rxpipe, tx_xfr_host_int_trig_rx_data);
432 455
433 DEBUGFS_ADD(tx_queue_len, wl->debugfs.rootdir); 456 DEBUGFS_ADD(tx_queue_len, wl->debugfs.rootdir);
457 DEBUGFS_ADD(tx_queue_status, wl->debugfs.rootdir);
434 DEBUGFS_ADD(retry_count, wl->debugfs.rootdir); 458 DEBUGFS_ADD(retry_count, wl->debugfs.rootdir);
435 DEBUGFS_ADD(excessive_retries, wl->debugfs.rootdir); 459 DEBUGFS_ADD(excessive_retries, wl->debugfs.rootdir);
436 460
@@ -443,7 +467,8 @@ out:
443 467
444void wl1251_debugfs_reset(struct wl1251 *wl) 468void wl1251_debugfs_reset(struct wl1251 *wl)
445{ 469{
446 memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats)); 470 if (wl->stats.fw_stats != NULL)
471 memset(wl->stats.fw_stats, 0, sizeof(*wl->stats.fw_stats));
447 wl->stats.retry_count = 0; 472 wl->stats.retry_count = 0;
448 wl->stats.excessive_retries = 0; 473 wl->stats.excessive_retries = 0;
449} 474}
diff --git a/drivers/net/wireless/wl12xx/wl1251_event.c b/drivers/net/wireless/wl12xx/wl1251_event.c
index 00076c4a8a21..020d764f9c13 100644
--- a/drivers/net/wireless/wl12xx/wl1251_event.c
+++ b/drivers/net/wireless/wl12xx/wl1251_event.c
@@ -79,6 +79,21 @@ static int wl1251_event_process(struct wl1251 *wl, struct event_mailbox *mbox)
79 } 79 }
80 } 80 }
81 81
82 if (vector & SYNCHRONIZATION_TIMEOUT_EVENT_ID && wl->psm) {
83 wl1251_debug(DEBUG_EVENT, "SYNCHRONIZATION_TIMEOUT_EVENT");
84
85 /* indicate to the stack, that beacons have been lost */
86 ieee80211_beacon_loss(wl->vif);
87 }
88
89 if (vector & REGAINED_BSS_EVENT_ID) {
90 if (wl->psm_requested) {
91 ret = wl1251_ps_set_mode(wl, STATION_POWER_SAVE_MODE);
92 if (ret < 0)
93 return ret;
94 }
95 }
96
82 return 0; 97 return 0;
83} 98}
84 99
diff --git a/drivers/net/wireless/wl12xx/wl1251_init.c b/drivers/net/wireless/wl12xx/wl1251_init.c
index b2ee4f468fc4..b538bdd7b320 100644
--- a/drivers/net/wireless/wl12xx/wl1251_init.c
+++ b/drivers/net/wireless/wl12xx/wl1251_init.c
@@ -23,6 +23,7 @@
23 23
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/slab.h>
26 27
27#include "wl1251_init.h" 28#include "wl1251_init.h"
28#include "wl12xx_80211.h" 29#include "wl12xx_80211.h"
@@ -147,7 +148,8 @@ int wl1251_hw_init_beacon_filter(struct wl1251 *wl)
147{ 148{
148 int ret; 149 int ret;
149 150
150 ret = wl1251_acx_beacon_filter_opt(wl); 151 /* disable beacon filtering at this stage */
152 ret = wl1251_acx_beacon_filter_opt(wl, false);
151 if (ret < 0) 153 if (ret < 0)
152 return ret; 154 return ret;
153 155
@@ -293,6 +295,11 @@ static int wl1251_hw_init_tx_queue_config(struct wl1251 *wl)
293 goto out; 295 goto out;
294 } 296 }
295 297
298 wl1251_acx_ac_cfg(wl, AC_BE, CWMIN_BE, CWMAX_BE, AIFS_DIFS, TXOP_BE);
299 wl1251_acx_ac_cfg(wl, AC_BK, CWMIN_BK, CWMAX_BK, AIFS_DIFS, TXOP_BK);
300 wl1251_acx_ac_cfg(wl, AC_VI, CWMIN_VI, CWMAX_VI, AIFS_DIFS, TXOP_VI);
301 wl1251_acx_ac_cfg(wl, AC_VO, CWMIN_VO, CWMAX_VO, AIFS_DIFS, TXOP_VO);
302
296out: 303out:
297 kfree(config); 304 kfree(config);
298 return ret; 305 return ret;
@@ -364,6 +371,11 @@ int wl1251_hw_init(struct wl1251 *wl)
364 if (ret < 0) 371 if (ret < 0)
365 goto out_free_data_path; 372 goto out_free_data_path;
366 373
374 /* Initialize connection monitoring thresholds */
375 ret = wl1251_acx_conn_monit_params(wl);
376 if (ret < 0)
377 goto out_free_data_path;
378
367 /* Beacon filtering */ 379 /* Beacon filtering */
368 ret = wl1251_hw_init_beacon_filter(wl); 380 ret = wl1251_hw_init_beacon_filter(wl);
369 if (ret < 0) 381 if (ret < 0)
diff --git a/drivers/net/wireless/wl12xx/wl1251_init.h b/drivers/net/wireless/wl12xx/wl1251_init.h
index b3b25ec885ea..269cefb3e7d4 100644
--- a/drivers/net/wireless/wl12xx/wl1251_init.h
+++ b/drivers/net/wireless/wl12xx/wl1251_init.h
@@ -26,6 +26,53 @@
26 26
27#include "wl1251.h" 27#include "wl1251.h"
28 28
29enum {
30 /* best effort/legacy */
31 AC_BE = 0,
32
33 /* background */
34 AC_BK = 1,
35
36 /* video */
37 AC_VI = 2,
38
39 /* voice */
40 AC_VO = 3,
41
42 /* broadcast dummy access category */
43 AC_BCAST = 4,
44
45 NUM_ACCESS_CATEGORIES = 4
46};
47
48/* following are defult values for the IE fields*/
49#define CWMIN_BK 15
50#define CWMIN_BE 15
51#define CWMIN_VI 7
52#define CWMIN_VO 3
53#define CWMAX_BK 1023
54#define CWMAX_BE 63
55#define CWMAX_VI 15
56#define CWMAX_VO 7
57
58/* slot number setting to start transmission at PIFS interval */
59#define AIFS_PIFS 1
60
61/*
62 * slot number setting to start transmission at DIFS interval - normal DCF
63 * access
64 */
65#define AIFS_DIFS 2
66
67#define AIFSN_BK 7
68#define AIFSN_BE 3
69#define AIFSN_VI AIFS_PIFS
70#define AIFSN_VO AIFS_PIFS
71#define TXOP_BK 0
72#define TXOP_BE 0
73#define TXOP_VI 3008
74#define TXOP_VO 1504
75
29int wl1251_hw_init_hwenc_config(struct wl1251 *wl); 76int wl1251_hw_init_hwenc_config(struct wl1251 *wl);
30int wl1251_hw_init_templates_config(struct wl1251 *wl); 77int wl1251_hw_init_templates_config(struct wl1251 *wl);
31int wl1251_hw_init_rx_config(struct wl1251 *wl, u32 config, u32 filter); 78int wl1251_hw_init_rx_config(struct wl1251 *wl, u32 config, u32 filter);
diff --git a/drivers/net/wireless/wl12xx/wl1251_main.c b/drivers/net/wireless/wl12xx/wl1251_main.c
index 1103256ad989..1c8226eee409 100644
--- a/drivers/net/wireless/wl12xx/wl1251_main.c
+++ b/drivers/net/wireless/wl12xx/wl1251_main.c
@@ -28,6 +28,8 @@
28#include <linux/irq.h> 28#include <linux/irq.h>
29#include <linux/crc32.h> 29#include <linux/crc32.h>
30#include <linux/etherdevice.h> 30#include <linux/etherdevice.h>
31#include <linux/vmalloc.h>
32#include <linux/slab.h>
31 33
32#include "wl1251.h" 34#include "wl1251.h"
33#include "wl12xx_80211.h" 35#include "wl12xx_80211.h"
@@ -83,7 +85,7 @@ static int wl1251_fetch_firmware(struct wl1251 *wl)
83 } 85 }
84 86
85 wl->fw_len = fw->size; 87 wl->fw_len = fw->size;
86 wl->fw = kmalloc(wl->fw_len, GFP_KERNEL); 88 wl->fw = vmalloc(wl->fw_len);
87 89
88 if (!wl->fw) { 90 if (!wl->fw) {
89 wl1251_error("could not allocate memory for the firmware"); 91 wl1251_error("could not allocate memory for the firmware");
@@ -183,8 +185,11 @@ static int wl1251_chip_wakeup(struct wl1251 *wl)
183 wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG12)", 185 wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG12)",
184 wl->chip_id); 186 wl->chip_id);
185 break; 187 break;
186 case CHIP_ID_1251_PG10:
187 case CHIP_ID_1251_PG11: 188 case CHIP_ID_1251_PG11:
189 wl1251_debug(DEBUG_BOOT, "chip id 0x%x (1251 PG11)",
190 wl->chip_id);
191 break;
192 case CHIP_ID_1251_PG10:
188 default: 193 default:
189 wl1251_error("unsupported chip id: 0x%x", wl->chip_id); 194 wl1251_error("unsupported chip id: 0x%x", wl->chip_id);
190 ret = -ENODEV; 195 ret = -ENODEV;
@@ -208,9 +213,10 @@ out:
208 return ret; 213 return ret;
209} 214}
210 215
216#define WL1251_IRQ_LOOP_COUNT 10
211static void wl1251_irq_work(struct work_struct *work) 217static void wl1251_irq_work(struct work_struct *work)
212{ 218{
213 u32 intr; 219 u32 intr, ctr = WL1251_IRQ_LOOP_COUNT;
214 struct wl1251 *wl = 220 struct wl1251 *wl =
215 container_of(work, struct wl1251, irq_work); 221 container_of(work, struct wl1251, irq_work);
216 int ret; 222 int ret;
@@ -231,78 +237,86 @@ static void wl1251_irq_work(struct work_struct *work)
231 intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR); 237 intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
232 wl1251_debug(DEBUG_IRQ, "intr: 0x%x", intr); 238 wl1251_debug(DEBUG_IRQ, "intr: 0x%x", intr);
233 239
234 if (wl->data_path) { 240 do {
235 wl->rx_counter = 241 if (wl->data_path) {
236 wl1251_mem_read32(wl, wl->data_path->rx_control_addr); 242 wl->rx_counter = wl1251_mem_read32(
237 243 wl, wl->data_path->rx_control_addr);
238 /* We handle a frmware bug here */ 244
239 switch ((wl->rx_counter - wl->rx_handled) & 0xf) { 245 /* We handle a frmware bug here */
240 case 0: 246 switch ((wl->rx_counter - wl->rx_handled) & 0xf) {
241 wl1251_debug(DEBUG_IRQ, "RX: FW and host in sync"); 247 case 0:
242 intr &= ~WL1251_ACX_INTR_RX0_DATA; 248 wl1251_debug(DEBUG_IRQ,
243 intr &= ~WL1251_ACX_INTR_RX1_DATA; 249 "RX: FW and host in sync");
244 break; 250 intr &= ~WL1251_ACX_INTR_RX0_DATA;
245 case 1: 251 intr &= ~WL1251_ACX_INTR_RX1_DATA;
246 wl1251_debug(DEBUG_IRQ, "RX: FW +1"); 252 break;
247 intr |= WL1251_ACX_INTR_RX0_DATA; 253 case 1:
248 intr &= ~WL1251_ACX_INTR_RX1_DATA; 254 wl1251_debug(DEBUG_IRQ, "RX: FW +1");
249 break; 255 intr |= WL1251_ACX_INTR_RX0_DATA;
250 case 2: 256 intr &= ~WL1251_ACX_INTR_RX1_DATA;
251 wl1251_debug(DEBUG_IRQ, "RX: FW +2"); 257 break;
252 intr |= WL1251_ACX_INTR_RX0_DATA; 258 case 2:
253 intr |= WL1251_ACX_INTR_RX1_DATA; 259 wl1251_debug(DEBUG_IRQ, "RX: FW +2");
254 break; 260 intr |= WL1251_ACX_INTR_RX0_DATA;
255 default: 261 intr |= WL1251_ACX_INTR_RX1_DATA;
256 wl1251_warning("RX: FW and host out of sync: %d", 262 break;
257 wl->rx_counter - wl->rx_handled); 263 default:
258 break; 264 wl1251_warning(
259 } 265 "RX: FW and host out of sync: %d",
260 266 wl->rx_counter - wl->rx_handled);
261 wl->rx_handled = wl->rx_counter; 267 break;
268 }
262 269
270 wl->rx_handled = wl->rx_counter;
263 271
264 wl1251_debug(DEBUG_IRQ, "RX counter: %d", wl->rx_counter); 272 wl1251_debug(DEBUG_IRQ, "RX counter: %d",
265 } 273 wl->rx_counter);
274 }
266 275
267 intr &= wl->intr_mask; 276 intr &= wl->intr_mask;
268 277
269 if (intr == 0) { 278 if (intr == 0) {
270 wl1251_debug(DEBUG_IRQ, "INTR is 0"); 279 wl1251_debug(DEBUG_IRQ, "INTR is 0");
271 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, 280 goto out_sleep;
272 ~(wl->intr_mask)); 281 }
273 282
274 goto out_sleep; 283 if (intr & WL1251_ACX_INTR_RX0_DATA) {
275 } 284 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX0_DATA");
285 wl1251_rx(wl);
286 }
276 287
277 if (intr & WL1251_ACX_INTR_RX0_DATA) { 288 if (intr & WL1251_ACX_INTR_RX1_DATA) {
278 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX0_DATA"); 289 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX1_DATA");
279 wl1251_rx(wl); 290 wl1251_rx(wl);
280 } 291 }
281 292
282 if (intr & WL1251_ACX_INTR_RX1_DATA) { 293 if (intr & WL1251_ACX_INTR_TX_RESULT) {
283 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_RX1_DATA"); 294 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_TX_RESULT");
284 wl1251_rx(wl); 295 wl1251_tx_complete(wl);
285 } 296 }
286 297
287 if (intr & WL1251_ACX_INTR_TX_RESULT) { 298 if (intr & (WL1251_ACX_INTR_EVENT_A |
288 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_TX_RESULT"); 299 WL1251_ACX_INTR_EVENT_B)) {
289 wl1251_tx_complete(wl); 300 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_EVENT (0x%x)",
290 } 301 intr);
302 if (intr & WL1251_ACX_INTR_EVENT_A)
303 wl1251_event_handle(wl, 0);
304 else
305 wl1251_event_handle(wl, 1);
306 }
291 307
292 if (intr & (WL1251_ACX_INTR_EVENT_A | WL1251_ACX_INTR_EVENT_B)) { 308 if (intr & WL1251_ACX_INTR_INIT_COMPLETE)
293 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_EVENT (0x%x)", intr); 309 wl1251_debug(DEBUG_IRQ,
294 if (intr & WL1251_ACX_INTR_EVENT_A) 310 "WL1251_ACX_INTR_INIT_COMPLETE");
295 wl1251_event_handle(wl, 0);
296 else
297 wl1251_event_handle(wl, 1);
298 }
299 311
300 if (intr & WL1251_ACX_INTR_INIT_COMPLETE) 312 if (--ctr == 0)
301 wl1251_debug(DEBUG_IRQ, "WL1251_ACX_INTR_INIT_COMPLETE"); 313 break;
302 314
303 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask)); 315 intr = wl1251_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
316 } while (intr);
304 317
305out_sleep: 318out_sleep:
319 wl1251_reg_write32(wl, ACX_REG_INTERRUPT_MASK, ~(wl->intr_mask));
306 wl1251_ps_elp_sleep(wl); 320 wl1251_ps_elp_sleep(wl);
307 321
308out: 322out:
@@ -382,6 +396,7 @@ static int wl1251_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
382 * the queue here, otherwise the queue will get too long. 396 * the queue here, otherwise the queue will get too long.
383 */ 397 */
384 if (skb_queue_len(&wl->tx_queue) >= WL1251_TX_QUEUE_MAX_LENGTH) { 398 if (skb_queue_len(&wl->tx_queue) >= WL1251_TX_QUEUE_MAX_LENGTH) {
399 wl1251_debug(DEBUG_TX, "op_tx: tx_queue full, stop queues");
385 ieee80211_stop_queues(wl->hw); 400 ieee80211_stop_queues(wl->hw);
386 401
387 /* 402 /*
@@ -497,17 +512,23 @@ static void wl1251_op_stop(struct ieee80211_hw *hw)
497} 512}
498 513
499static int wl1251_op_add_interface(struct ieee80211_hw *hw, 514static int wl1251_op_add_interface(struct ieee80211_hw *hw,
500 struct ieee80211_if_init_conf *conf) 515 struct ieee80211_vif *vif)
501{ 516{
502 struct wl1251 *wl = hw->priv; 517 struct wl1251 *wl = hw->priv;
503 int ret = 0; 518 int ret = 0;
504 519
505 wl1251_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM", 520 wl1251_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM",
506 conf->type, conf->mac_addr); 521 vif->type, vif->addr);
507 522
508 mutex_lock(&wl->mutex); 523 mutex_lock(&wl->mutex);
524 if (wl->vif) {
525 ret = -EBUSY;
526 goto out;
527 }
528
529 wl->vif = vif;
509 530
510 switch (conf->type) { 531 switch (vif->type) {
511 case NL80211_IFTYPE_STATION: 532 case NL80211_IFTYPE_STATION:
512 wl->bss_type = BSS_TYPE_STA_BSS; 533 wl->bss_type = BSS_TYPE_STA_BSS;
513 break; 534 break;
@@ -519,8 +540,8 @@ static int wl1251_op_add_interface(struct ieee80211_hw *hw,
519 goto out; 540 goto out;
520 } 541 }
521 542
522 if (memcmp(wl->mac_addr, conf->mac_addr, ETH_ALEN)) { 543 if (memcmp(wl->mac_addr, vif->addr, ETH_ALEN)) {
523 memcpy(wl->mac_addr, conf->mac_addr, ETH_ALEN); 544 memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
524 SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr); 545 SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
525 ret = wl1251_acx_station_id(wl); 546 ret = wl1251_acx_station_id(wl);
526 if (ret < 0) 547 if (ret < 0)
@@ -533,44 +554,35 @@ out:
533} 554}
534 555
535static void wl1251_op_remove_interface(struct ieee80211_hw *hw, 556static void wl1251_op_remove_interface(struct ieee80211_hw *hw,
536 struct ieee80211_if_init_conf *conf) 557 struct ieee80211_vif *vif)
537{ 558{
559 struct wl1251 *wl = hw->priv;
560
561 mutex_lock(&wl->mutex);
538 wl1251_debug(DEBUG_MAC80211, "mac80211 remove interface"); 562 wl1251_debug(DEBUG_MAC80211, "mac80211 remove interface");
563 wl->vif = NULL;
564 mutex_unlock(&wl->mutex);
539} 565}
540 566
541static int wl1251_build_null_data(struct wl1251 *wl) 567static int wl1251_build_qos_null_data(struct wl1251 *wl)
542{ 568{
543 struct wl12xx_null_data_template template; 569 struct ieee80211_qos_hdr template;
544 570
545 if (!is_zero_ether_addr(wl->bssid)) { 571 memset(&template, 0, sizeof(template));
546 memcpy(template.header.da, wl->bssid, ETH_ALEN);
547 memcpy(template.header.bssid, wl->bssid, ETH_ALEN);
548 } else {
549 memset(template.header.da, 0xff, ETH_ALEN);
550 memset(template.header.bssid, 0xff, ETH_ALEN);
551 }
552
553 memcpy(template.header.sa, wl->mac_addr, ETH_ALEN);
554 template.header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA |
555 IEEE80211_STYPE_NULLFUNC);
556 572
557 return wl1251_cmd_template_set(wl, CMD_NULL_DATA, &template, 573 memcpy(template.addr1, wl->bssid, ETH_ALEN);
558 sizeof(template)); 574 memcpy(template.addr2, wl->mac_addr, ETH_ALEN);
559 575 memcpy(template.addr3, wl->bssid, ETH_ALEN);
560}
561 576
562static int wl1251_build_ps_poll(struct wl1251 *wl, u16 aid) 577 template.frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA |
563{ 578 IEEE80211_STYPE_QOS_NULLFUNC |
564 struct wl12xx_ps_poll_template template; 579 IEEE80211_FCTL_TODS);
565 580
566 memcpy(template.bssid, wl->bssid, ETH_ALEN); 581 /* FIXME: not sure what priority to use here */
567 memcpy(template.ta, wl->mac_addr, ETH_ALEN); 582 template.qos_ctrl = cpu_to_le16(0);
568 template.aid = aid;
569 template.fc = cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL);
570 583
571 return wl1251_cmd_template_set(wl, CMD_PS_POLL, &template, 584 return wl1251_cmd_template_set(wl, CMD_QOS_NULL_DATA, &template,
572 sizeof(template)); 585 sizeof(template));
573
574} 586}
575 587
576static int wl1251_op_config(struct ieee80211_hw *hw, u32 changed) 588static int wl1251_op_config(struct ieee80211_hw *hw, u32 changed)
@@ -601,35 +613,39 @@ static int wl1251_op_config(struct ieee80211_hw *hw, u32 changed)
601 goto out_sleep; 613 goto out_sleep;
602 } 614 }
603 615
604 ret = wl1251_build_null_data(wl);
605 if (ret < 0)
606 goto out_sleep;
607
608 if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) { 616 if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) {
609 wl1251_debug(DEBUG_PSM, "psm enabled"); 617 wl1251_debug(DEBUG_PSM, "psm enabled");
610 618
611 wl->psm_requested = true; 619 wl->psm_requested = true;
612 620
621 wl->dtim_period = conf->ps_dtim_period;
622
623 ret = wl1251_acx_wr_tbtt_and_dtim(wl, wl->beacon_int,
624 wl->dtim_period);
625
613 /* 626 /*
614 * We enter PSM only if we're already associated. 627 * mac80211 enables PSM only if we're already associated.
615 * If we're not, we'll enter it when joining an SSID,
616 * through the bss_info_changed() hook.
617 */ 628 */
618 ret = wl1251_ps_set_mode(wl, STATION_POWER_SAVE_MODE); 629 ret = wl1251_ps_set_mode(wl, STATION_POWER_SAVE_MODE);
630 if (ret < 0)
631 goto out_sleep;
619 } else if (!(conf->flags & IEEE80211_CONF_PS) && 632 } else if (!(conf->flags & IEEE80211_CONF_PS) &&
620 wl->psm_requested) { 633 wl->psm_requested) {
621 wl1251_debug(DEBUG_PSM, "psm disabled"); 634 wl1251_debug(DEBUG_PSM, "psm disabled");
622 635
623 wl->psm_requested = false; 636 wl->psm_requested = false;
624 637
625 if (wl->psm) 638 if (wl->psm) {
626 ret = wl1251_ps_set_mode(wl, STATION_ACTIVE_MODE); 639 ret = wl1251_ps_set_mode(wl, STATION_ACTIVE_MODE);
640 if (ret < 0)
641 goto out_sleep;
642 }
627 } 643 }
628 644
629 if (conf->power_level != wl->power_level) { 645 if (conf->power_level != wl->power_level) {
630 ret = wl1251_acx_tx_power(wl, conf->power_level); 646 ret = wl1251_acx_tx_power(wl, conf->power_level);
631 if (ret < 0) 647 if (ret < 0)
632 goto out; 648 goto out_sleep;
633 649
634 wl->power_level = conf->power_level; 650 wl->power_level = conf->power_level;
635 } 651 }
@@ -840,199 +856,61 @@ out:
840 return ret; 856 return ret;
841} 857}
842 858
843static int wl1251_build_basic_rates(char *rates) 859static int wl1251_op_hw_scan(struct ieee80211_hw *hw,
844{ 860 struct cfg80211_scan_request *req)
845 u8 index = 0;
846
847 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
848 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
849 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
850 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
851
852 return index;
853}
854
855static int wl1251_build_extended_rates(char *rates)
856{ 861{
857 u8 index = 0; 862 struct wl1251 *wl = hw->priv;
858 863 struct sk_buff *skb;
859 rates[index++] = IEEE80211_OFDM_RATE_6MB; 864 size_t ssid_len = 0;
860 rates[index++] = IEEE80211_OFDM_RATE_9MB; 865 u8 *ssid = NULL;
861 rates[index++] = IEEE80211_OFDM_RATE_12MB; 866 int ret;
862 rates[index++] = IEEE80211_OFDM_RATE_18MB;
863 rates[index++] = IEEE80211_OFDM_RATE_24MB;
864 rates[index++] = IEEE80211_OFDM_RATE_36MB;
865 rates[index++] = IEEE80211_OFDM_RATE_48MB;
866 rates[index++] = IEEE80211_OFDM_RATE_54MB;
867
868 return index;
869}
870
871 867
872static int wl1251_build_probe_req(struct wl1251 *wl, u8 *ssid, size_t ssid_len) 868 wl1251_debug(DEBUG_MAC80211, "mac80211 hw scan");
873{
874 struct wl12xx_probe_req_template template;
875 struct wl12xx_ie_rates *rates;
876 char *ptr;
877 u16 size;
878
879 ptr = (char *)&template;
880 size = sizeof(struct ieee80211_header);
881
882 memset(template.header.da, 0xff, ETH_ALEN);
883 memset(template.header.bssid, 0xff, ETH_ALEN);
884 memcpy(template.header.sa, wl->mac_addr, ETH_ALEN);
885 template.header.frame_ctl = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
886
887 /* IEs */
888 /* SSID */
889 template.ssid.header.id = WLAN_EID_SSID;
890 template.ssid.header.len = ssid_len;
891 if (ssid_len && ssid)
892 memcpy(template.ssid.ssid, ssid, ssid_len);
893 size += sizeof(struct wl12xx_ie_header) + ssid_len;
894 ptr += size;
895
896 /* Basic Rates */
897 rates = (struct wl12xx_ie_rates *)ptr;
898 rates->header.id = WLAN_EID_SUPP_RATES;
899 rates->header.len = wl1251_build_basic_rates(rates->rates);
900 size += sizeof(struct wl12xx_ie_header) + rates->header.len;
901 ptr += sizeof(struct wl12xx_ie_header) + rates->header.len;
902
903 /* Extended rates */
904 rates = (struct wl12xx_ie_rates *)ptr;
905 rates->header.id = WLAN_EID_EXT_SUPP_RATES;
906 rates->header.len = wl1251_build_extended_rates(rates->rates);
907 size += sizeof(struct wl12xx_ie_header) + rates->header.len;
908
909 wl1251_dump(DEBUG_SCAN, "PROBE REQ: ", &template, size);
910
911 return wl1251_cmd_template_set(wl, CMD_PROBE_REQ, &template,
912 size);
913}
914 869
915static int wl1251_hw_scan(struct wl1251 *wl, u8 *ssid, size_t len, 870 if (req->n_ssids) {
916 u8 active_scan, u8 high_prio, u8 num_channels, 871 ssid = req->ssids[0].ssid;
917 u8 probe_requests) 872 ssid_len = req->ssids[0].ssid_len;
918{
919 struct wl1251_cmd_trigger_scan_to *trigger = NULL;
920 struct cmd_scan *params = NULL;
921 int i, ret;
922 u16 scan_options = 0;
923
924 if (wl->scanning)
925 return -EINVAL;
926
927 params = kzalloc(sizeof(*params), GFP_KERNEL);
928 if (!params)
929 return -ENOMEM;
930
931 params->params.rx_config_options = cpu_to_le32(CFG_RX_ALL_GOOD);
932 params->params.rx_filter_options =
933 cpu_to_le32(CFG_RX_PRSP_EN | CFG_RX_MGMT_EN | CFG_RX_BCN_EN);
934
935 /* High priority scan */
936 if (!active_scan)
937 scan_options |= SCAN_PASSIVE;
938 if (high_prio)
939 scan_options |= SCAN_PRIORITY_HIGH;
940 params->params.scan_options = scan_options;
941
942 params->params.num_channels = num_channels;
943 params->params.num_probe_requests = probe_requests;
944 params->params.tx_rate = cpu_to_le16(1 << 1); /* 2 Mbps */
945 params->params.tid_trigger = 0;
946
947 for (i = 0; i < num_channels; i++) {
948 params->channels[i].min_duration = cpu_to_le32(30000);
949 params->channels[i].max_duration = cpu_to_le32(60000);
950 memset(&params->channels[i].bssid_lsb, 0xff, 4);
951 memset(&params->channels[i].bssid_msb, 0xff, 2);
952 params->channels[i].early_termination = 0;
953 params->channels[i].tx_power_att = 0;
954 params->channels[i].channel = i + 1;
955 memset(params->channels[i].pad, 0, 3);
956 } 873 }
957 874
958 for (i = num_channels; i < SCAN_MAX_NUM_OF_CHANNELS; i++) 875 mutex_lock(&wl->mutex);
959 memset(&params->channels[i], 0,
960 sizeof(struct basic_scan_channel_parameters));
961
962 if (len && ssid) {
963 params->params.ssid_len = len;
964 memcpy(params->params.ssid, ssid, len);
965 } else {
966 params->params.ssid_len = 0;
967 memset(params->params.ssid, 0, 32);
968 }
969 876
970 ret = wl1251_build_probe_req(wl, ssid, len); 877 if (wl->scanning) {
971 if (ret < 0) { 878 wl1251_debug(DEBUG_SCAN, "scan already in progress");
972 wl1251_error("PROBE request template failed"); 879 ret = -EINVAL;
973 goto out; 880 goto out;
974 } 881 }
975 882
976 trigger = kzalloc(sizeof(*trigger), GFP_KERNEL); 883 ret = wl1251_ps_elp_wakeup(wl);
977 if (!trigger) 884 if (ret < 0)
978 goto out; 885 goto out;
979 886
980 trigger->timeout = 0; 887 skb = ieee80211_probereq_get(wl->hw, wl->vif, ssid, ssid_len,
981 888 req->ie, req->ie_len);
982 ret = wl1251_cmd_send(wl, CMD_TRIGGER_SCAN_TO, trigger, 889 if (!skb) {
983 sizeof(*trigger)); 890 ret = -ENOMEM;
984 if (ret < 0) {
985 wl1251_error("trigger scan to failed for hw scan");
986 goto out; 891 goto out;
987 } 892 }
988 893
989 wl1251_dump(DEBUG_SCAN, "SCAN: ", params, sizeof(*params)); 894 ret = wl1251_cmd_template_set(wl, CMD_PROBE_REQ, skb->data,
990 895 skb->len);
991 wl->scanning = true; 896 dev_kfree_skb(skb);
897 if (ret < 0)
898 goto out_sleep;
992 899
993 ret = wl1251_cmd_send(wl, CMD_SCAN, params, sizeof(*params)); 900 ret = wl1251_cmd_trigger_scan_to(wl, 0);
994 if (ret < 0) 901 if (ret < 0)
995 wl1251_error("SCAN failed"); 902 goto out_sleep;
996 903
997 wl1251_mem_read(wl, wl->cmd_box_addr, params, sizeof(*params)); 904 wl->scanning = true;
998 905
999 if (params->header.status != CMD_STATUS_SUCCESS) { 906 ret = wl1251_cmd_scan(wl, ssid, ssid_len, req->channels,
1000 wl1251_error("TEST command answer error: %d", 907 req->n_channels, WL1251_SCAN_NUM_PROBES);
1001 params->header.status); 908 if (ret < 0) {
1002 wl->scanning = false; 909 wl->scanning = false;
1003 ret = -EIO; 910 goto out_sleep;
1004 goto out;
1005 }
1006
1007out:
1008 kfree(params);
1009 return ret;
1010
1011}
1012
1013static int wl1251_op_hw_scan(struct ieee80211_hw *hw,
1014 struct cfg80211_scan_request *req)
1015{
1016 struct wl1251 *wl = hw->priv;
1017 int ret;
1018 u8 *ssid = NULL;
1019 size_t ssid_len = 0;
1020
1021 wl1251_debug(DEBUG_MAC80211, "mac80211 hw scan");
1022
1023 if (req->n_ssids) {
1024 ssid = req->ssids[0].ssid;
1025 ssid_len = req->ssids[0].ssid_len;
1026 } 911 }
1027 912
1028 mutex_lock(&wl->mutex); 913out_sleep:
1029
1030 ret = wl1251_ps_elp_wakeup(wl);
1031 if (ret < 0)
1032 goto out;
1033
1034 ret = wl1251_hw_scan(hw->priv, ssid, ssid_len, 1, 0, 13, 3);
1035
1036 wl1251_ps_elp_sleep(wl); 914 wl1251_ps_elp_sleep(wl);
1037 915
1038out: 916out:
@@ -1069,9 +947,8 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1069 struct ieee80211_bss_conf *bss_conf, 947 struct ieee80211_bss_conf *bss_conf,
1070 u32 changed) 948 u32 changed)
1071{ 949{
1072 enum wl1251_cmd_ps_mode mode;
1073 struct wl1251 *wl = hw->priv; 950 struct wl1251 *wl = hw->priv;
1074 struct sk_buff *beacon; 951 struct sk_buff *beacon, *skb;
1075 int ret; 952 int ret;
1076 953
1077 wl1251_debug(DEBUG_MAC80211, "mac80211 bss info changed"); 954 wl1251_debug(DEBUG_MAC80211, "mac80211 bss info changed");
@@ -1082,30 +959,49 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1082 if (ret < 0) 959 if (ret < 0)
1083 goto out; 960 goto out;
1084 961
962 if (changed & BSS_CHANGED_BSSID) {
963 memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN);
964
965 skb = ieee80211_nullfunc_get(wl->hw, wl->vif);
966 if (!skb)
967 goto out_sleep;
968
969 ret = wl1251_cmd_template_set(wl, CMD_NULL_DATA,
970 skb->data, skb->len);
971 dev_kfree_skb(skb);
972 if (ret < 0)
973 goto out_sleep;
974
975 ret = wl1251_build_qos_null_data(wl);
976 if (ret < 0)
977 goto out;
978
979 if (wl->bss_type != BSS_TYPE_IBSS) {
980 ret = wl1251_join(wl, wl->bss_type, wl->channel,
981 wl->beacon_int, wl->dtim_period);
982 if (ret < 0)
983 goto out_sleep;
984 }
985 }
986
1085 if (changed & BSS_CHANGED_ASSOC) { 987 if (changed & BSS_CHANGED_ASSOC) {
1086 if (bss_conf->assoc) { 988 if (bss_conf->assoc) {
1087 wl->beacon_int = bss_conf->beacon_int; 989 wl->beacon_int = bss_conf->beacon_int;
1088 wl->dtim_period = bss_conf->dtim_period;
1089
1090 /* FIXME: call join */
1091 990
1092 wl->aid = bss_conf->aid; 991 skb = ieee80211_pspoll_get(wl->hw, wl->vif);
992 if (!skb)
993 goto out_sleep;
1093 994
1094 ret = wl1251_build_ps_poll(wl, wl->aid); 995 ret = wl1251_cmd_template_set(wl, CMD_PS_POLL,
996 skb->data,
997 skb->len);
998 dev_kfree_skb(skb);
1095 if (ret < 0) 999 if (ret < 0)
1096 goto out_sleep; 1000 goto out_sleep;
1097 1001
1098 ret = wl1251_acx_aid(wl, wl->aid); 1002 ret = wl1251_acx_aid(wl, bss_conf->aid);
1099 if (ret < 0) 1003 if (ret < 0)
1100 goto out_sleep; 1004 goto out_sleep;
1101
1102 /* If we want to go in PSM but we're not there yet */
1103 if (wl->psm_requested && !wl->psm) {
1104 mode = STATION_POWER_SAVE_MODE;
1105 ret = wl1251_ps_set_mode(wl, mode);
1106 if (ret < 0)
1107 goto out_sleep;
1108 }
1109 } else { 1005 } else {
1110 /* use defaults when not associated */ 1006 /* use defaults when not associated */
1111 wl->beacon_int = WL1251_DEFAULT_BEACON_INT; 1007 wl->beacon_int = WL1251_DEFAULT_BEACON_INT;
@@ -1137,23 +1033,6 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1137 ret = wl1251_acx_cts_protect(wl, CTSPROTECT_DISABLE); 1033 ret = wl1251_acx_cts_protect(wl, CTSPROTECT_DISABLE);
1138 if (ret < 0) { 1034 if (ret < 0) {
1139 wl1251_warning("Set ctsprotect failed %d", ret); 1035 wl1251_warning("Set ctsprotect failed %d", ret);
1140 goto out;
1141 }
1142 }
1143
1144 if (changed & BSS_CHANGED_BSSID) {
1145 memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN);
1146
1147 ret = wl1251_build_null_data(wl);
1148 if (ret < 0)
1149 goto out;
1150
1151 if (wl->bss_type != BSS_TYPE_IBSS) {
1152 ret = wl1251_join(wl, wl->bss_type, wl->channel,
1153 wl->beacon_int, wl->dtim_period);
1154 if (ret < 0)
1155 goto out_sleep;
1156 wl1251_warning("Set ctsprotect failed %d", ret);
1157 goto out_sleep; 1036 goto out_sleep;
1158 } 1037 }
1159 } 1038 }
@@ -1165,7 +1044,7 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1165 1044
1166 if (ret < 0) { 1045 if (ret < 0) {
1167 dev_kfree_skb(beacon); 1046 dev_kfree_skb(beacon);
1168 goto out; 1047 goto out_sleep;
1169 } 1048 }
1170 1049
1171 ret = wl1251_cmd_template_set(wl, CMD_PROBE_RESP, beacon->data, 1050 ret = wl1251_cmd_template_set(wl, CMD_PROBE_RESP, beacon->data,
@@ -1174,13 +1053,13 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw,
1174 dev_kfree_skb(beacon); 1053 dev_kfree_skb(beacon);
1175 1054
1176 if (ret < 0) 1055 if (ret < 0)
1177 goto out; 1056 goto out_sleep;
1178 1057
1179 ret = wl1251_join(wl, wl->bss_type, wl->beacon_int, 1058 ret = wl1251_join(wl, wl->bss_type, wl->beacon_int,
1180 wl->channel, wl->dtim_period); 1059 wl->channel, wl->dtim_period);
1181 1060
1182 if (ret < 0) 1061 if (ret < 0)
1183 goto out; 1062 goto out_sleep;
1184 } 1063 }
1185 1064
1186out_sleep: 1065out_sleep:
@@ -1251,6 +1130,49 @@ static struct ieee80211_channel wl1251_channels[] = {
1251 { .hw_value = 13, .center_freq = 2472}, 1130 { .hw_value = 13, .center_freq = 2472},
1252}; 1131};
1253 1132
1133static int wl1251_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
1134 const struct ieee80211_tx_queue_params *params)
1135{
1136 enum wl1251_acx_ps_scheme ps_scheme;
1137 struct wl1251 *wl = hw->priv;
1138 int ret;
1139
1140 mutex_lock(&wl->mutex);
1141
1142 wl1251_debug(DEBUG_MAC80211, "mac80211 conf tx %d", queue);
1143
1144 ret = wl1251_ps_elp_wakeup(wl);
1145 if (ret < 0)
1146 goto out;
1147
1148 /* mac80211 uses units of 32 usec */
1149 ret = wl1251_acx_ac_cfg(wl, wl1251_tx_get_queue(queue),
1150 params->cw_min, params->cw_max,
1151 params->aifs, params->txop * 32);
1152 if (ret < 0)
1153 goto out_sleep;
1154
1155 if (params->uapsd)
1156 ps_scheme = WL1251_ACX_PS_SCHEME_UPSD_TRIGGER;
1157 else
1158 ps_scheme = WL1251_ACX_PS_SCHEME_LEGACY;
1159
1160 ret = wl1251_acx_tid_cfg(wl, wl1251_tx_get_queue(queue),
1161 CHANNEL_TYPE_EDCF,
1162 wl1251_tx_get_queue(queue), ps_scheme,
1163 WL1251_ACX_ACK_POLICY_LEGACY);
1164 if (ret < 0)
1165 goto out_sleep;
1166
1167out_sleep:
1168 wl1251_ps_elp_sleep(wl);
1169
1170out:
1171 mutex_unlock(&wl->mutex);
1172
1173 return ret;
1174}
1175
1254/* can't be const, mac80211 writes to this */ 1176/* can't be const, mac80211 writes to this */
1255static struct ieee80211_supported_band wl1251_band_2ghz = { 1177static struct ieee80211_supported_band wl1251_band_2ghz = {
1256 .channels = wl1251_channels, 1178 .channels = wl1251_channels,
@@ -1271,6 +1193,7 @@ static const struct ieee80211_ops wl1251_ops = {
1271 .hw_scan = wl1251_op_hw_scan, 1193 .hw_scan = wl1251_op_hw_scan,
1272 .bss_info_changed = wl1251_op_bss_info_changed, 1194 .bss_info_changed = wl1251_op_bss_info_changed,
1273 .set_rts_threshold = wl1251_op_set_rts_threshold, 1195 .set_rts_threshold = wl1251_op_set_rts_threshold,
1196 .conf_tx = wl1251_op_conf_tx,
1274}; 1197};
1275 1198
1276static int wl1251_register_hw(struct wl1251 *wl) 1199static int wl1251_register_hw(struct wl1251 *wl)
@@ -1308,12 +1231,17 @@ int wl1251_init_ieee80211(struct wl1251 *wl)
1308 wl->hw->channel_change_time = 10000; 1231 wl->hw->channel_change_time = 10000;
1309 1232
1310 wl->hw->flags = IEEE80211_HW_SIGNAL_DBM | 1233 wl->hw->flags = IEEE80211_HW_SIGNAL_DBM |
1311 IEEE80211_HW_NOISE_DBM; 1234 IEEE80211_HW_NOISE_DBM |
1235 IEEE80211_HW_SUPPORTS_PS |
1236 IEEE80211_HW_BEACON_FILTER |
1237 IEEE80211_HW_SUPPORTS_UAPSD;
1312 1238
1313 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 1239 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1314 wl->hw->wiphy->max_scan_ssids = 1; 1240 wl->hw->wiphy->max_scan_ssids = 1;
1315 wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl1251_band_2ghz; 1241 wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl1251_band_2ghz;
1316 1242
1243 wl->hw->queues = 4;
1244
1317 ret = wl1251_register_hw(wl); 1245 ret = wl1251_register_hw(wl);
1318 if (ret) 1246 if (ret)
1319 goto out; 1247 goto out;
@@ -1351,6 +1279,7 @@ struct ieee80211_hw *wl1251_alloc_hw(void)
1351 skb_queue_head_init(&wl->tx_queue); 1279 skb_queue_head_init(&wl->tx_queue);
1352 1280
1353 INIT_WORK(&wl->filter_work, wl1251_filter_work); 1281 INIT_WORK(&wl->filter_work, wl1251_filter_work);
1282 INIT_DELAYED_WORK(&wl->elp_work, wl1251_elp_work);
1354 wl->channel = WL1251_DEFAULT_CHANNEL; 1283 wl->channel = WL1251_DEFAULT_CHANNEL;
1355 wl->scanning = false; 1284 wl->scanning = false;
1356 wl->default_key = 0; 1285 wl->default_key = 0;
@@ -1368,6 +1297,7 @@ struct ieee80211_hw *wl1251_alloc_hw(void)
1368 wl->power_level = WL1251_DEFAULT_POWER_LEVEL; 1297 wl->power_level = WL1251_DEFAULT_POWER_LEVEL;
1369 wl->beacon_int = WL1251_DEFAULT_BEACON_INT; 1298 wl->beacon_int = WL1251_DEFAULT_BEACON_INT;
1370 wl->dtim_period = WL1251_DEFAULT_DTIM_PERIOD; 1299 wl->dtim_period = WL1251_DEFAULT_DTIM_PERIOD;
1300 wl->vif = NULL;
1371 1301
1372 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++) 1302 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
1373 wl->tx_frames[i] = NULL; 1303 wl->tx_frames[i] = NULL;
@@ -1409,7 +1339,7 @@ int wl1251_free_hw(struct wl1251 *wl)
1409 1339
1410 kfree(wl->target_mem_map); 1340 kfree(wl->target_mem_map);
1411 kfree(wl->data_path); 1341 kfree(wl->data_path);
1412 kfree(wl->fw); 1342 vfree(wl->fw);
1413 wl->fw = NULL; 1343 wl->fw = NULL;
1414 kfree(wl->nvs); 1344 kfree(wl->nvs);
1415 wl->nvs = NULL; 1345 wl->nvs = NULL;
@@ -1426,4 +1356,5 @@ EXPORT_SYMBOL_GPL(wl1251_free_hw);
1426MODULE_DESCRIPTION("TI wl1251 Wireles LAN Driver Core"); 1356MODULE_DESCRIPTION("TI wl1251 Wireles LAN Driver Core");
1427MODULE_LICENSE("GPL"); 1357MODULE_LICENSE("GPL");
1428MODULE_AUTHOR("Kalle Valo <kalle.valo@nokia.com>"); 1358MODULE_AUTHOR("Kalle Valo <kalle.valo@nokia.com>");
1429MODULE_ALIAS("spi:wl12xx"); 1359MODULE_ALIAS("spi:wl1251");
1360MODULE_FIRMWARE(WL1251_FW_NAME);
diff --git a/drivers/net/wireless/wl12xx/wl1251_ps.c b/drivers/net/wireless/wl12xx/wl1251_ps.c
index c53e28727ed4..851dfb65e474 100644
--- a/drivers/net/wireless/wl12xx/wl1251_ps.c
+++ b/drivers/net/wireless/wl12xx/wl1251_ps.c
@@ -26,24 +26,49 @@
26#include "wl1251_cmd.h" 26#include "wl1251_cmd.h"
27#include "wl1251_io.h" 27#include "wl1251_io.h"
28 28
29#define WL1251_WAKEUP_TIMEOUT 2000 29/* in ms */
30#define WL1251_WAKEUP_TIMEOUT 100
30 31
31/* Routines to toggle sleep mode while in ELP */ 32void wl1251_elp_work(struct work_struct *work)
32void wl1251_ps_elp_sleep(struct wl1251 *wl)
33{ 33{
34 struct delayed_work *dwork;
35 struct wl1251 *wl;
36
37 dwork = container_of(work, struct delayed_work, work);
38 wl = container_of(dwork, struct wl1251, elp_work);
39
40 wl1251_debug(DEBUG_PSM, "elp work");
41
42 mutex_lock(&wl->mutex);
43
34 if (wl->elp || !wl->psm) 44 if (wl->elp || !wl->psm)
35 return; 45 goto out;
36 46
37 wl1251_debug(DEBUG_PSM, "chip to elp"); 47 wl1251_debug(DEBUG_PSM, "chip to elp");
38
39 wl1251_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP); 48 wl1251_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);
40
41 wl->elp = true; 49 wl->elp = true;
50
51out:
52 mutex_unlock(&wl->mutex);
53}
54
55#define ELP_ENTRY_DELAY 5
56
57/* Routines to toggle sleep mode while in ELP */
58void wl1251_ps_elp_sleep(struct wl1251 *wl)
59{
60 unsigned long delay;
61
62 if (wl->psm) {
63 cancel_delayed_work(&wl->elp_work);
64 delay = msecs_to_jiffies(ELP_ENTRY_DELAY);
65 ieee80211_queue_delayed_work(wl->hw, &wl->elp_work, delay);
66 }
42} 67}
43 68
44int wl1251_ps_elp_wakeup(struct wl1251 *wl) 69int wl1251_ps_elp_wakeup(struct wl1251 *wl)
45{ 70{
46 unsigned long timeout; 71 unsigned long timeout, start;
47 u32 elp_reg; 72 u32 elp_reg;
48 73
49 if (!wl->elp) 74 if (!wl->elp)
@@ -51,6 +76,7 @@ int wl1251_ps_elp_wakeup(struct wl1251 *wl)
51 76
52 wl1251_debug(DEBUG_PSM, "waking up chip from elp"); 77 wl1251_debug(DEBUG_PSM, "waking up chip from elp");
53 78
79 start = jiffies;
54 timeout = jiffies + msecs_to_jiffies(WL1251_WAKEUP_TIMEOUT); 80 timeout = jiffies + msecs_to_jiffies(WL1251_WAKEUP_TIMEOUT);
55 81
56 wl1251_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP); 82 wl1251_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP);
@@ -71,8 +97,7 @@ int wl1251_ps_elp_wakeup(struct wl1251 *wl)
71 } 97 }
72 98
73 wl1251_debug(DEBUG_PSM, "wakeup time: %u ms", 99 wl1251_debug(DEBUG_PSM, "wakeup time: %u ms",
74 jiffies_to_msecs(jiffies) - 100 jiffies_to_msecs(jiffies - start));
75 (jiffies_to_msecs(timeout) - WL1251_WAKEUP_TIMEOUT));
76 101
77 wl->elp = false; 102 wl->elp = false;
78 103
@@ -119,6 +144,11 @@ int wl1251_ps_set_mode(struct wl1251 *wl, enum wl1251_cmd_ps_mode mode)
119 case STATION_POWER_SAVE_MODE: 144 case STATION_POWER_SAVE_MODE:
120 wl1251_debug(DEBUG_PSM, "entering psm"); 145 wl1251_debug(DEBUG_PSM, "entering psm");
121 146
147 /* enable beacon filtering */
148 ret = wl1251_acx_beacon_filter_opt(wl, true);
149 if (ret < 0)
150 return ret;
151
122 ret = wl1251_acx_wake_up_conditions(wl, 152 ret = wl1251_acx_wake_up_conditions(wl,
123 WAKE_UP_EVENT_DTIM_BITMAP, 153 WAKE_UP_EVENT_DTIM_BITMAP,
124 wl->listen_int); 154 wl->listen_int);
@@ -142,6 +172,11 @@ int wl1251_ps_set_mode(struct wl1251 *wl, enum wl1251_cmd_ps_mode mode)
142 if (ret < 0) 172 if (ret < 0)
143 return ret; 173 return ret;
144 174
175 /* disable beacon filtering */
176 ret = wl1251_acx_beacon_filter_opt(wl, false);
177 if (ret < 0)
178 return ret;
179
145 ret = wl1251_acx_wake_up_conditions(wl, 180 ret = wl1251_acx_wake_up_conditions(wl,
146 WAKE_UP_EVENT_DTIM_BITMAP, 181 WAKE_UP_EVENT_DTIM_BITMAP,
147 wl->listen_int); 182 wl->listen_int);
diff --git a/drivers/net/wireless/wl12xx/wl1251_ps.h b/drivers/net/wireless/wl12xx/wl1251_ps.h
index db036fe12f25..c688ac57aee4 100644
--- a/drivers/net/wireless/wl12xx/wl1251_ps.h
+++ b/drivers/net/wireless/wl12xx/wl1251_ps.h
@@ -31,6 +31,7 @@
31int wl1251_ps_set_mode(struct wl1251 *wl, enum wl1251_cmd_ps_mode mode); 31int wl1251_ps_set_mode(struct wl1251 *wl, enum wl1251_cmd_ps_mode mode);
32void wl1251_ps_elp_sleep(struct wl1251 *wl); 32void wl1251_ps_elp_sleep(struct wl1251 *wl);
33int wl1251_ps_elp_wakeup(struct wl1251 *wl); 33int wl1251_ps_elp_wakeup(struct wl1251 *wl);
34void wl1251_elp_work(struct work_struct *work);
34 35
35 36
36#endif /* __WL1251_PS_H__ */ 37#endif /* __WL1251_PS_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1251_reg.h b/drivers/net/wireless/wl12xx/wl1251_reg.h
index 06e1bd94a739..0ca3b4326056 100644
--- a/drivers/net/wireless/wl12xx/wl1251_reg.h
+++ b/drivers/net/wireless/wl12xx/wl1251_reg.h
@@ -370,6 +370,7 @@ enum wl12xx_acx_int_reg {
370 EEPROM location specified in the EE_ADDR register. 370 EEPROM location specified in the EE_ADDR register.
371 The Wlan hardware hardware clears this bit automatically. 371 The Wlan hardware hardware clears this bit automatically.
372*===============================================*/ 372*===============================================*/
373#define EE_CTL (REGISTERS_BASE + 0x2000)
373#define ACX_EE_CTL_REG EE_CTL 374#define ACX_EE_CTL_REG EE_CTL
374#define EE_WRITE 0x00000001ul 375#define EE_WRITE 0x00000001ul
375#define EE_READ 0x00000002ul 376#define EE_READ 0x00000002ul
@@ -380,6 +381,7 @@ enum wl12xx_acx_int_reg {
380 This register specifies the address 381 This register specifies the address
381 within the EEPROM from/to which to read/write data. 382 within the EEPROM from/to which to read/write data.
382 ===============================================*/ 383 ===============================================*/
384#define EE_ADDR (REGISTERS_BASE + 0x2008)
383#define ACX_EE_ADDR_REG EE_ADDR 385#define ACX_EE_ADDR_REG EE_ADDR
384 386
385/*=============================================== 387/*===============================================
@@ -389,8 +391,12 @@ enum wl12xx_acx_int_reg {
389 data from the EEPROM or the write data 391 data from the EEPROM or the write data
390 to be written to the EEPROM. 392 to be written to the EEPROM.
391 ===============================================*/ 393 ===============================================*/
394#define EE_DATA (REGISTERS_BASE + 0x2004)
392#define ACX_EE_DATA_REG EE_DATA 395#define ACX_EE_DATA_REG EE_DATA
393 396
397#define EEPROM_ACCESS_TO 10000 /* timeout counter */
398#define START_EEPROM_MGR 0x00000001
399
394/*=============================================== 400/*===============================================
395 EEPROM Base Address - 32bit RW 401 EEPROM Base Address - 32bit RW
396 ------------------------------------------ 402 ------------------------------------------
diff --git a/drivers/net/wireless/wl12xx/wl1251_rx.c b/drivers/net/wireless/wl12xx/wl1251_rx.c
index 17c54b59ef86..6f229e0990f4 100644
--- a/drivers/net/wireless/wl12xx/wl1251_rx.c
+++ b/drivers/net/wireless/wl12xx/wl1251_rx.c
@@ -23,6 +23,7 @@
23 */ 23 */
24 24
25#include <linux/skbuff.h> 25#include <linux/skbuff.h>
26#include <linux/gfp.h>
26#include <net/mac80211.h> 27#include <net/mac80211.h>
27 28
28#include "wl1251.h" 29#include "wl1251.h"
@@ -72,10 +73,6 @@ static void wl1251_rx_status(struct wl1251 *wl,
72 } 73 }
73 74
74 status->signal = desc->rssi; 75 status->signal = desc->rssi;
75 status->qual = (desc->rssi - WL1251_RX_MIN_RSSI) * 100 /
76 (WL1251_RX_MAX_RSSI - WL1251_RX_MIN_RSSI);
77 status->qual = min(status->qual, 100);
78 status->qual = max(status->qual, 0);
79 76
80 /* 77 /*
81 * FIXME: guessing that snr needs to be divided by two, otherwise 78 * FIXME: guessing that snr needs to be divided by two, otherwise
@@ -130,7 +127,7 @@ static void wl1251_rx_body(struct wl1251 *wl,
130 if (wl->rx_current_buffer) 127 if (wl->rx_current_buffer)
131 rx_packet_ring_addr += wl->data_path->rx_packet_ring_chunk_size; 128 rx_packet_ring_addr += wl->data_path->rx_packet_ring_chunk_size;
132 129
133 skb = dev_alloc_skb(length); 130 skb = __dev_alloc_skb(length, GFP_KERNEL);
134 if (!skb) { 131 if (!skb) {
135 wl1251_error("Couldn't allocate RX frame"); 132 wl1251_error("Couldn't allocate RX frame");
136 return; 133 return;
@@ -153,7 +150,7 @@ static void wl1251_rx_body(struct wl1251 *wl,
153 beacon ? "beacon" : ""); 150 beacon ? "beacon" : "");
154 151
155 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 152 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
156 ieee80211_rx(wl->hw, skb); 153 ieee80211_rx_ni(wl->hw, skb);
157} 154}
158 155
159static void wl1251_rx_ack(struct wl1251 *wl) 156static void wl1251_rx_ack(struct wl1251 *wl)
diff --git a/drivers/net/wireless/wl12xx/wl1251_spi.c b/drivers/net/wireless/wl12xx/wl1251_spi.c
index 14eff2b3d4c6..3bfb59bd4635 100644
--- a/drivers/net/wireless/wl12xx/wl1251_spi.c
+++ b/drivers/net/wireless/wl12xx/wl1251_spi.c
@@ -23,6 +23,7 @@
23 23
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/slab.h>
26#include <linux/crc7.h> 27#include <linux/crc7.h>
27#include <linux/spi/spi.h> 28#include <linux/spi/spi.h>
28#include <linux/spi/wl12xx.h> 29#include <linux/spi/wl12xx.h>
@@ -270,6 +271,8 @@ static int __devinit wl1251_spi_probe(struct spi_device *spi)
270 return -ENODEV; 271 return -ENODEV;
271 } 272 }
272 273
274 wl->use_eeprom = pdata->use_eeprom;
275
273 ret = request_irq(wl->irq, wl1251_irq, 0, DRIVER_NAME, wl); 276 ret = request_irq(wl->irq, wl1251_irq, 0, DRIVER_NAME, wl);
274 if (ret < 0) { 277 if (ret < 0) {
275 wl1251_error("request_irq() failed: %d", ret); 278 wl1251_error("request_irq() failed: %d", ret);
@@ -307,7 +310,7 @@ static int __devexit wl1251_spi_remove(struct spi_device *spi)
307 310
308static struct spi_driver wl1251_spi_driver = { 311static struct spi_driver wl1251_spi_driver = {
309 .driver = { 312 .driver = {
310 .name = "wl12xx", 313 .name = "wl1251",
311 .bus = &spi_bus_type, 314 .bus = &spi_bus_type,
312 .owner = THIS_MODULE, 315 .owner = THIS_MODULE,
313 }, 316 },
diff --git a/drivers/net/wireless/wl12xx/wl1251_tx.c b/drivers/net/wireless/wl12xx/wl1251_tx.c
index f85970615849..c8223185efd2 100644
--- a/drivers/net/wireless/wl12xx/wl1251_tx.c
+++ b/drivers/net/wireless/wl12xx/wl1251_tx.c
@@ -167,8 +167,7 @@ static int wl1251_tx_fill_hdr(struct wl1251 *wl, struct sk_buff *skb,
167 tx_hdr->expiry_time = cpu_to_le32(1 << 16); 167 tx_hdr->expiry_time = cpu_to_le32(1 << 16);
168 tx_hdr->id = id; 168 tx_hdr->id = id;
169 169
170 /* FIXME: how to get the correct queue id? */ 170 tx_hdr->xmit_queue = wl1251_tx_get_queue(skb_get_queue_mapping(skb));
171 tx_hdr->xmit_queue = 0;
172 171
173 wl1251_tx_control(tx_hdr, control, fc); 172 wl1251_tx_control(tx_hdr, control, fc);
174 wl1251_tx_frag_block_num(tx_hdr); 173 wl1251_tx_frag_block_num(tx_hdr);
@@ -220,6 +219,7 @@ static int wl1251_tx_send_packet(struct wl1251 *wl, struct sk_buff *skb,
220 /* align the buffer on a 4-byte boundary */ 219 /* align the buffer on a 4-byte boundary */
221 skb_reserve(skb, offset); 220 skb_reserve(skb, offset);
222 memmove(skb->data, src, skb->len); 221 memmove(skb->data, src, skb->len);
222 tx_hdr = (struct tx_double_buffer_desc *) skb->data;
223 } else { 223 } else {
224 wl1251_info("No handler, fixme!"); 224 wl1251_info("No handler, fixme!");
225 return -EINVAL; 225 return -EINVAL;
@@ -237,8 +237,9 @@ static int wl1251_tx_send_packet(struct wl1251 *wl, struct sk_buff *skb,
237 237
238 wl1251_mem_write(wl, addr, skb->data, len); 238 wl1251_mem_write(wl, addr, skb->data, len);
239 239
240 wl1251_debug(DEBUG_TX, "tx id %u skb 0x%p payload %u rate 0x%x", 240 wl1251_debug(DEBUG_TX, "tx id %u skb 0x%p payload %u rate 0x%x "
241 tx_hdr->id, skb, tx_hdr->length, tx_hdr->rate); 241 "queue %d", tx_hdr->id, skb, tx_hdr->length,
242 tx_hdr->rate, tx_hdr->xmit_queue);
242 243
243 return 0; 244 return 0;
244} 245}
diff --git a/drivers/net/wireless/wl12xx/wl1251_tx.h b/drivers/net/wireless/wl12xx/wl1251_tx.h
index 7c1c1665c810..55856c6bb97a 100644
--- a/drivers/net/wireless/wl12xx/wl1251_tx.h
+++ b/drivers/net/wireless/wl12xx/wl1251_tx.h
@@ -26,6 +26,7 @@
26#define __WL1251_TX_H__ 26#define __WL1251_TX_H__
27 27
28#include <linux/bitops.h> 28#include <linux/bitops.h>
29#include "wl1251_acx.h"
29 30
30/* 31/*
31 * 32 *
@@ -209,6 +210,22 @@ struct tx_result {
209 u8 done_2; 210 u8 done_2;
210} __attribute__ ((packed)); 211} __attribute__ ((packed));
211 212
213static inline int wl1251_tx_get_queue(int queue)
214{
215 switch (queue) {
216 case 0:
217 return QOS_AC_VO;
218 case 1:
219 return QOS_AC_VI;
220 case 2:
221 return QOS_AC_BE;
222 case 3:
223 return QOS_AC_BK;
224 default:
225 return QOS_AC_BE;
226 }
227}
228
212void wl1251_tx_work(struct work_struct *work); 229void wl1251_tx_work(struct work_struct *work);
213void wl1251_tx_complete(struct wl1251 *wl); 230void wl1251_tx_complete(struct wl1251 *wl);
214void wl1251_tx_flush(struct wl1251 *wl); 231void wl1251_tx_flush(struct wl1251 *wl);
diff --git a/drivers/net/wireless/wl12xx/wl1271.h b/drivers/net/wireless/wl12xx/wl1271.h
index 55818f94017b..97ea5096bc8c 100644
--- a/drivers/net/wireless/wl12xx/wl1271.h
+++ b/drivers/net/wireless/wl12xx/wl1271.h
@@ -32,6 +32,8 @@
32#include <linux/bitops.h> 32#include <linux/bitops.h>
33#include <net/mac80211.h> 33#include <net/mac80211.h>
34 34
35#include "wl1271_conf.h"
36
35#define DRIVER_NAME "wl1271" 37#define DRIVER_NAME "wl1271"
36#define DRIVER_PREFIX DRIVER_NAME ": " 38#define DRIVER_PREFIX DRIVER_NAME ": "
37 39
@@ -41,7 +43,7 @@ enum {
41 DEBUG_SPI = BIT(1), 43 DEBUG_SPI = BIT(1),
42 DEBUG_BOOT = BIT(2), 44 DEBUG_BOOT = BIT(2),
43 DEBUG_MAILBOX = BIT(3), 45 DEBUG_MAILBOX = BIT(3),
44 DEBUG_NETLINK = BIT(4), 46 DEBUG_TESTMODE = BIT(4),
45 DEBUG_EVENT = BIT(5), 47 DEBUG_EVENT = BIT(5),
46 DEBUG_TX = BIT(6), 48 DEBUG_TX = BIT(6),
47 DEBUG_RX = BIT(7), 49 DEBUG_RX = BIT(7),
@@ -97,7 +99,8 @@ enum {
97 } while (0) 99 } while (0)
98 100
99#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \ 101#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
100 CFG_BSSID_FILTER_EN) 102 CFG_BSSID_FILTER_EN | \
103 CFG_MC_FILTER_EN)
101 104
102#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \ 105#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
103 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \ 106 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
@@ -107,11 +110,56 @@ enum {
107#define WL1271_FW_NAME "wl1271-fw.bin" 110#define WL1271_FW_NAME "wl1271-fw.bin"
108#define WL1271_NVS_NAME "wl1271-nvs.bin" 111#define WL1271_NVS_NAME "wl1271-nvs.bin"
109 112
110#define WL1271_BUSY_WORD_LEN 8 113/* NVS data structure */
114#define WL1271_NVS_SECTION_SIZE 468
115
116#define WL1271_NVS_GENERAL_PARAMS_SIZE 57
117#define WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED \
118 (WL1271_NVS_GENERAL_PARAMS_SIZE + 1)
119#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE 17
120#define WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED \
121 (WL1271_NVS_STAT_RADIO_PARAMS_SIZE + 1)
122#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE 65
123#define WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED \
124 (WL1271_NVS_DYN_RADIO_PARAMS_SIZE + 1)
125#define WL1271_NVS_FEM_COUNT 2
126#define WL1271_NVS_INI_SPARE_SIZE 124
127
128struct wl1271_nvs_file {
129 /* NVS section */
130 u8 nvs[WL1271_NVS_SECTION_SIZE];
131
132 /* INI section */
133 u8 general_params[WL1271_NVS_GENERAL_PARAMS_SIZE_PADDED];
134 u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE_PADDED];
135 u8 dyn_radio_params[WL1271_NVS_FEM_COUNT]
136 [WL1271_NVS_DYN_RADIO_PARAMS_SIZE_PADDED];
137 u8 ini_spare[WL1271_NVS_INI_SPARE_SIZE];
138} __attribute__ ((packed));
139
140/*
141 * Enable/disable 802.11a support for WL1273
142 */
143#undef WL1271_80211A_ENABLED
144
145/*
146 * FIXME: for the wl1271, a busy word count of 1 here will result in a more
147 * optimal SPI interface. There is some SPI bug however, causing RXS time outs
148 * with this mode occasionally on boot, so lets have three for now. A value of
149 * three should make sure, that the chipset will always be ready, though this
150 * will impact throughput and latencies slightly.
151 */
152#define WL1271_BUSY_WORD_CNT 3
153#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
111 154
112#define WL1271_ELP_HW_STATE_ASLEEP 0 155#define WL1271_ELP_HW_STATE_ASLEEP 0
113#define WL1271_ELP_HW_STATE_IRQ 1 156#define WL1271_ELP_HW_STATE_IRQ 1
114 157
158#define WL1271_DEFAULT_BEACON_INT 100
159#define WL1271_DEFAULT_DTIM_PERIOD 1
160
161#define ACX_TX_DESCRIPTORS 32
162
115enum wl1271_state { 163enum wl1271_state {
116 WL1271_STATE_OFF, 164 WL1271_STATE_OFF,
117 WL1271_STATE_ON, 165 WL1271_STATE_ON,
@@ -134,6 +182,8 @@ struct wl1271_partition {
134struct wl1271_partition_set { 182struct wl1271_partition_set {
135 struct wl1271_partition mem; 183 struct wl1271_partition mem;
136 struct wl1271_partition reg; 184 struct wl1271_partition reg;
185 struct wl1271_partition mem2;
186 struct wl1271_partition mem3;
137}; 187};
138 188
139struct wl1271; 189struct wl1271;
@@ -251,6 +301,7 @@ struct wl1271_debugfs {
251 301
252 struct dentry *retry_count; 302 struct dentry *retry_count;
253 struct dentry *excessive_retries; 303 struct dentry *excessive_retries;
304 struct dentry *gpio_power;
254}; 305};
255 306
256#define NUM_TX_QUEUES 4 307#define NUM_TX_QUEUES 4
@@ -258,15 +309,15 @@ struct wl1271_debugfs {
258 309
259/* FW status registers */ 310/* FW status registers */
260struct wl1271_fw_status { 311struct wl1271_fw_status {
261 u32 intr; 312 __le32 intr;
262 u8 fw_rx_counter; 313 u8 fw_rx_counter;
263 u8 drv_rx_counter; 314 u8 drv_rx_counter;
264 u8 reserved; 315 u8 reserved;
265 u8 tx_results_counter; 316 u8 tx_results_counter;
266 u32 rx_pkt_descs[NUM_RX_PKT_DESC]; 317 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
267 u32 tx_released_blks[NUM_TX_QUEUES]; 318 __le32 tx_released_blks[NUM_TX_QUEUES];
268 u32 fw_localtime; 319 __le32 fw_localtime;
269 u32 padding[2]; 320 __le32 padding[2];
270} __attribute__ ((packed)); 321} __attribute__ ((packed));
271 322
272struct wl1271_rx_mem_pool_addr { 323struct wl1271_rx_mem_pool_addr {
@@ -274,6 +325,15 @@ struct wl1271_rx_mem_pool_addr {
274 u32 addr_extra; 325 u32 addr_extra;
275}; 326};
276 327
328struct wl1271_scan {
329 u8 state;
330 u8 ssid[IW_ESSID_MAX_SIZE+1];
331 size_t ssid_len;
332 u8 active;
333 u8 high_prio;
334 u8 probe_requests;
335};
336
277struct wl1271 { 337struct wl1271 {
278 struct ieee80211_hw *hw; 338 struct ieee80211_hw *hw;
279 bool mac80211_registered; 339 bool mac80211_registered;
@@ -288,10 +348,18 @@ struct wl1271 {
288 enum wl1271_state state; 348 enum wl1271_state state;
289 struct mutex mutex; 349 struct mutex mutex;
290 350
291 int physical_mem_addr; 351#define WL1271_FLAG_STA_RATES_CHANGED (0)
292 int physical_reg_addr; 352#define WL1271_FLAG_STA_ASSOCIATED (1)
293 int virtual_mem_addr; 353#define WL1271_FLAG_JOINED (2)
294 int virtual_reg_addr; 354#define WL1271_FLAG_GPIO_POWER (3)
355#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
356#define WL1271_FLAG_SCANNING (5)
357#define WL1271_FLAG_IN_ELP (6)
358#define WL1271_FLAG_PSM (7)
359#define WL1271_FLAG_PSM_REQUESTED (8)
360 unsigned long flags;
361
362 struct wl1271_partition_set part;
295 363
296 struct wl1271_chip chip; 364 struct wl1271_chip chip;
297 365
@@ -300,15 +368,13 @@ struct wl1271 {
300 368
301 u8 *fw; 369 u8 *fw;
302 size_t fw_len; 370 size_t fw_len;
303 u8 *nvs; 371 struct wl1271_nvs_file *nvs;
304 size_t nvs_len;
305 372
306 u8 bssid[ETH_ALEN]; 373 u8 bssid[ETH_ALEN];
307 u8 mac_addr[ETH_ALEN]; 374 u8 mac_addr[ETH_ALEN];
308 u8 bss_type; 375 u8 bss_type;
309 u8 ssid[IW_ESSID_MAX_SIZE + 1]; 376 u8 ssid[IW_ESSID_MAX_SIZE + 1];
310 u8 ssid_len; 377 u8 ssid_len;
311 u8 listen_int;
312 int channel; 378 int channel;
313 379
314 struct wl1271_acx_mem_map *target_mem_map; 380 struct wl1271_acx_mem_map *target_mem_map;
@@ -329,13 +395,16 @@ struct wl1271 {
329 395
330 /* Frames scheduled for transmission, not handled yet */ 396 /* Frames scheduled for transmission, not handled yet */
331 struct sk_buff_head tx_queue; 397 struct sk_buff_head tx_queue;
332 bool tx_queue_stopped;
333 398
334 struct work_struct tx_work; 399 struct work_struct tx_work;
335 struct work_struct filter_work;
336 400
337 /* Pending TX frames */ 401 /* Pending TX frames */
338 struct sk_buff *tx_frames[16]; 402 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
403
404 /* Security sequence number counters */
405 u8 tx_security_last_seq;
406 u16 tx_security_seq_16;
407 u32 tx_security_seq_32;
339 408
340 /* FW Rx counter */ 409 /* FW Rx counter */
341 u32 rx_counter; 410 u32 rx_counter;
@@ -353,27 +422,30 @@ struct wl1271 {
353 u32 mbox_ptr[2]; 422 u32 mbox_ptr[2];
354 423
355 /* Are we currently scanning */ 424 /* Are we currently scanning */
356 bool scanning; 425 struct wl1271_scan scan;
357 426
358 /* Our association ID */ 427 /* Our association ID */
359 u16 aid; 428 u16 aid;
360 429
430 /* currently configured rate set */
431 u32 sta_rate_set;
432 u32 basic_rate_set;
433 u32 rate_set;
434
435 /* The current band */
436 enum ieee80211_band band;
437
361 /* Default key (for WEP) */ 438 /* Default key (for WEP) */
362 u32 default_key; 439 u32 default_key;
363 440
364 unsigned int rx_config; 441 unsigned int rx_config;
365 unsigned int rx_filter; 442 unsigned int rx_filter;
366 443
367 /* is firmware in elp mode */
368 bool elp;
369
370 struct completion *elp_compl; 444 struct completion *elp_compl;
445 struct delayed_work elp_work;
371 446
372 /* we can be in psm, but not in elp, we have to differentiate */ 447 /* retry counter for PSM entries */
373 bool psm; 448 u8 psm_entry_retry;
374
375 /* PSM mode requested */
376 bool psm_requested;
377 449
378 /* in dBm */ 450 /* in dBm */
379 int power_level; 451 int power_level;
@@ -383,11 +455,17 @@ struct wl1271 {
383 455
384 u32 buffer_32; 456 u32 buffer_32;
385 u32 buffer_cmd; 457 u32 buffer_cmd;
386 u8 buffer_busyword[WL1271_BUSY_WORD_LEN]; 458 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
387 struct wl1271_rx_descriptor *rx_descriptor;
388 459
389 struct wl1271_fw_status *fw_status; 460 struct wl1271_fw_status *fw_status;
390 struct wl1271_tx_hw_res_if *tx_res_if; 461 struct wl1271_tx_hw_res_if *tx_res_if;
462
463 struct ieee80211_vif *vif;
464
465 /* Current chipset configuration */
466 struct conf_drv_settings conf;
467
468 struct list_head list;
391}; 469};
392 470
393int wl1271_plt_start(struct wl1271 *wl); 471int wl1271_plt_start(struct wl1271 *wl);
@@ -401,7 +479,19 @@ int wl1271_plt_stop(struct wl1271 *wl);
401 479
402#define WL1271_TX_QUEUE_MAX_LENGTH 20 480#define WL1271_TX_QUEUE_MAX_LENGTH 20
403 481
404/* WL1271 needs a 200ms sleep after power on */ 482/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
483 on in case is has been shut down shortly before */
484#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
405#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */ 485#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
406 486
487static inline bool wl1271_11a_enabled(void)
488{
489 /* FIXME: this could be determined based on the NVS-INI file */
490#ifdef WL1271_80211A_ENABLED
491 return true;
492#else
493 return false;
494#endif
495}
496
407#endif 497#endif
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.c b/drivers/net/wireless/wl12xx/wl1271_acx.c
index f622a4092615..308782421fce 100644
--- a/drivers/net/wireless/wl12xx/wl1271_acx.c
+++ b/drivers/net/wireless/wl12xx/wl1271_acx.c
@@ -27,6 +27,7 @@
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/crc7.h> 28#include <linux/crc7.h>
29#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
30#include <linux/slab.h>
30 31
31#include "wl1271.h" 32#include "wl1271.h"
32#include "wl12xx_80211.h" 33#include "wl12xx_80211.h"
@@ -34,8 +35,7 @@
34#include "wl1271_spi.h" 35#include "wl1271_spi.h"
35#include "wl1271_ps.h" 36#include "wl1271_ps.h"
36 37
37int wl1271_acx_wake_up_conditions(struct wl1271 *wl, u8 wake_up_event, 38int wl1271_acx_wake_up_conditions(struct wl1271 *wl)
38 u8 listen_interval)
39{ 39{
40 struct acx_wake_up_condition *wake_up; 40 struct acx_wake_up_condition *wake_up;
41 int ret; 41 int ret;
@@ -48,8 +48,8 @@ int wl1271_acx_wake_up_conditions(struct wl1271 *wl, u8 wake_up_event,
48 goto out; 48 goto out;
49 } 49 }
50 50
51 wake_up->wake_up_event = wake_up_event; 51 wake_up->wake_up_event = wl->conf.conn.wake_up_event;
52 wake_up->listen_interval = listen_interval; 52 wake_up->listen_interval = wl->conf.conn.listen_interval;
53 53
54 ret = wl1271_cmd_configure(wl, ACX_WAKE_UP_CONDITIONS, 54 ret = wl1271_cmd_configure(wl, ACX_WAKE_UP_CONDITIONS,
55 wake_up, sizeof(*wake_up)); 55 wake_up, sizeof(*wake_up));
@@ -137,7 +137,12 @@ int wl1271_acx_tx_power(struct wl1271 *wl, int power)
137 goto out; 137 goto out;
138 } 138 }
139 139
140 acx->current_tx_power = power * 10; 140 /*
141 * FIXME: This is a workaround needed while we don't the correct
142 * calibration, to avoid distortions
143 */
144 /* acx->current_tx_power = power * 10; */
145 acx->current_tx_power = 120;
141 146
142 ret = wl1271_cmd_configure(wl, DOT11_CUR_TX_PWR, acx, sizeof(*acx)); 147 ret = wl1271_cmd_configure(wl, DOT11_CUR_TX_PWR, acx, sizeof(*acx));
143 if (ret < 0) { 148 if (ret < 0) {
@@ -193,7 +198,7 @@ int wl1271_acx_mem_map(struct wl1271 *wl, struct acx_header *mem_map,
193 return 0; 198 return 0;
194} 199}
195 200
196int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl, u32 life_time) 201int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl)
197{ 202{
198 struct acx_rx_msdu_lifetime *acx; 203 struct acx_rx_msdu_lifetime *acx;
199 int ret; 204 int ret;
@@ -206,7 +211,7 @@ int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl, u32 life_time)
206 goto out; 211 goto out;
207 } 212 }
208 213
209 acx->lifetime = life_time; 214 acx->lifetime = cpu_to_le32(wl->conf.rx.rx_msdu_life_time);
210 ret = wl1271_cmd_configure(wl, DOT11_RX_MSDU_LIFE_TIME, 215 ret = wl1271_cmd_configure(wl, DOT11_RX_MSDU_LIFE_TIME,
211 acx, sizeof(*acx)); 216 acx, sizeof(*acx));
212 if (ret < 0) { 217 if (ret < 0) {
@@ -232,8 +237,8 @@ int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter)
232 goto out; 237 goto out;
233 } 238 }
234 239
235 rx_config->config_options = config; 240 rx_config->config_options = cpu_to_le32(config);
236 rx_config->filter_options = filter; 241 rx_config->filter_options = cpu_to_le32(filter);
237 242
238 ret = wl1271_cmd_configure(wl, ACX_RX_CFG, 243 ret = wl1271_cmd_configure(wl, ACX_RX_CFG,
239 rx_config, sizeof(*rx_config)); 244 rx_config, sizeof(*rx_config));
@@ -260,7 +265,7 @@ int wl1271_acx_pd_threshold(struct wl1271 *wl)
260 goto out; 265 goto out;
261 } 266 }
262 267
263 /* FIXME: threshold value not set */ 268 pd->threshold = cpu_to_le32(wl->conf.rx.packet_detection_threshold);
264 269
265 ret = wl1271_cmd_configure(wl, ACX_PD_THRESHOLD, pd, sizeof(*pd)); 270 ret = wl1271_cmd_configure(wl, ACX_PD_THRESHOLD, pd, sizeof(*pd));
266 if (ret < 0) { 271 if (ret < 0) {
@@ -300,7 +305,8 @@ out:
300 return ret; 305 return ret;
301} 306}
302 307
303int wl1271_acx_group_address_tbl(struct wl1271 *wl) 308int wl1271_acx_group_address_tbl(struct wl1271 *wl, bool enable,
309 void *mc_list, u32 mc_list_len)
304{ 310{
305 struct acx_dot11_grp_addr_tbl *acx; 311 struct acx_dot11_grp_addr_tbl *acx;
306 int ret; 312 int ret;
@@ -314,9 +320,9 @@ int wl1271_acx_group_address_tbl(struct wl1271 *wl)
314 } 320 }
315 321
316 /* MAC filtering */ 322 /* MAC filtering */
317 acx->enabled = 0; 323 acx->enabled = enable;
318 acx->num_groups = 0; 324 acx->num_groups = mc_list_len;
319 memset(acx->mac_table, 0, ADDRESS_GROUP_MAX_LEN); 325 memcpy(acx->mac_table, mc_list, mc_list_len * ETH_ALEN);
320 326
321 ret = wl1271_cmd_configure(wl, DOT11_GROUP_ADDRESS_TBL, 327 ret = wl1271_cmd_configure(wl, DOT11_GROUP_ADDRESS_TBL,
322 acx, sizeof(*acx)); 328 acx, sizeof(*acx));
@@ -343,8 +349,8 @@ int wl1271_acx_service_period_timeout(struct wl1271 *wl)
343 349
344 wl1271_debug(DEBUG_ACX, "acx service period timeout"); 350 wl1271_debug(DEBUG_ACX, "acx service period timeout");
345 351
346 rx_timeout->ps_poll_timeout = RX_TIMEOUT_PS_POLL_DEF; 352 rx_timeout->ps_poll_timeout = cpu_to_le16(wl->conf.rx.ps_poll_timeout);
347 rx_timeout->upsd_timeout = RX_TIMEOUT_UPSD_DEF; 353 rx_timeout->upsd_timeout = cpu_to_le16(wl->conf.rx.upsd_timeout);
348 354
349 ret = wl1271_cmd_configure(wl, ACX_SERVICE_PERIOD_TIMEOUT, 355 ret = wl1271_cmd_configure(wl, ACX_SERVICE_PERIOD_TIMEOUT,
350 rx_timeout, sizeof(*rx_timeout)); 356 rx_timeout, sizeof(*rx_timeout));
@@ -372,7 +378,7 @@ int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold)
372 goto out; 378 goto out;
373 } 379 }
374 380
375 rts->threshold = rts_threshold; 381 rts->threshold = cpu_to_le16(rts_threshold);
376 382
377 ret = wl1271_cmd_configure(wl, DOT11_RTS_THRESHOLD, rts, sizeof(*rts)); 383 ret = wl1271_cmd_configure(wl, DOT11_RTS_THRESHOLD, rts, sizeof(*rts));
378 if (ret < 0) { 384 if (ret < 0) {
@@ -385,20 +391,58 @@ out:
385 return ret; 391 return ret;
386} 392}
387 393
388int wl1271_acx_beacon_filter_opt(struct wl1271 *wl) 394int wl1271_acx_dco_itrim_params(struct wl1271 *wl)
389{ 395{
390 struct acx_beacon_filter_option *beacon_filter; 396 struct acx_dco_itrim_params *dco;
397 struct conf_itrim_settings *c = &wl->conf.itrim;
391 int ret; 398 int ret;
392 399
400 wl1271_debug(DEBUG_ACX, "acx dco itrim parameters");
401
402 dco = kzalloc(sizeof(*dco), GFP_KERNEL);
403 if (!dco) {
404 ret = -ENOMEM;
405 goto out;
406 }
407
408 dco->enable = c->enable;
409 dco->timeout = cpu_to_le32(c->timeout);
410
411 ret = wl1271_cmd_configure(wl, ACX_SET_DCO_ITRIM_PARAMS,
412 dco, sizeof(*dco));
413 if (ret < 0) {
414 wl1271_warning("failed to set dco itrim parameters: %d", ret);
415 goto out;
416 }
417
418out:
419 kfree(dco);
420 return ret;
421}
422
423int wl1271_acx_beacon_filter_opt(struct wl1271 *wl, bool enable_filter)
424{
425 struct acx_beacon_filter_option *beacon_filter = NULL;
426 int ret = 0;
427
393 wl1271_debug(DEBUG_ACX, "acx beacon filter opt"); 428 wl1271_debug(DEBUG_ACX, "acx beacon filter opt");
394 429
430 if (enable_filter &&
431 wl->conf.conn.bcn_filt_mode == CONF_BCN_FILT_MODE_DISABLED)
432 goto out;
433
395 beacon_filter = kzalloc(sizeof(*beacon_filter), GFP_KERNEL); 434 beacon_filter = kzalloc(sizeof(*beacon_filter), GFP_KERNEL);
396 if (!beacon_filter) { 435 if (!beacon_filter) {
397 ret = -ENOMEM; 436 ret = -ENOMEM;
398 goto out; 437 goto out;
399 } 438 }
400 439
401 beacon_filter->enable = 0; 440 beacon_filter->enable = enable_filter;
441
442 /*
443 * When set to zero, and the filter is enabled, beacons
444 * without the unicast TIM bit set are dropped.
445 */
402 beacon_filter->max_num_beacons = 0; 446 beacon_filter->max_num_beacons = 0;
403 447
404 ret = wl1271_cmd_configure(wl, ACX_BEACON_FILTER_OPT, 448 ret = wl1271_cmd_configure(wl, ACX_BEACON_FILTER_OPT,
@@ -416,7 +460,9 @@ out:
416int wl1271_acx_beacon_filter_table(struct wl1271 *wl) 460int wl1271_acx_beacon_filter_table(struct wl1271 *wl)
417{ 461{
418 struct acx_beacon_filter_ie_table *ie_table; 462 struct acx_beacon_filter_ie_table *ie_table;
463 int i, idx = 0;
419 int ret; 464 int ret;
465 bool vendor_spec = false;
420 466
421 wl1271_debug(DEBUG_ACX, "acx beacon filter table"); 467 wl1271_debug(DEBUG_ACX, "acx beacon filter table");
422 468
@@ -426,8 +472,32 @@ int wl1271_acx_beacon_filter_table(struct wl1271 *wl)
426 goto out; 472 goto out;
427 } 473 }
428 474
475 /* configure default beacon pass-through rules */
429 ie_table->num_ie = 0; 476 ie_table->num_ie = 0;
430 memset(ie_table->table, 0, BEACON_FILTER_TABLE_MAX_SIZE); 477 for (i = 0; i < wl->conf.conn.bcn_filt_ie_count; i++) {
478 struct conf_bcn_filt_rule *r = &(wl->conf.conn.bcn_filt_ie[i]);
479 ie_table->table[idx++] = r->ie;
480 ie_table->table[idx++] = r->rule;
481
482 if (r->ie == WLAN_EID_VENDOR_SPECIFIC) {
483 /* only one vendor specific ie allowed */
484 if (vendor_spec)
485 continue;
486
487 /* for vendor specific rules configure the
488 additional fields */
489 memcpy(&(ie_table->table[idx]), r->oui,
490 CONF_BCN_IE_OUI_LEN);
491 idx += CONF_BCN_IE_OUI_LEN;
492 ie_table->table[idx++] = r->type;
493 memcpy(&(ie_table->table[idx]), r->version,
494 CONF_BCN_IE_VER_LEN);
495 idx += CONF_BCN_IE_VER_LEN;
496 vendor_spec = true;
497 }
498
499 ie_table->num_ie++;
500 }
431 501
432 ret = wl1271_cmd_configure(wl, ACX_BEACON_FILTER_TABLE, 502 ret = wl1271_cmd_configure(wl, ACX_BEACON_FILTER_TABLE,
433 ie_table, sizeof(*ie_table)); 503 ie_table, sizeof(*ie_table));
@@ -441,6 +511,36 @@ out:
441 return ret; 511 return ret;
442} 512}
443 513
514int wl1271_acx_conn_monit_params(struct wl1271 *wl)
515{
516 struct acx_conn_monit_params *acx;
517 int ret;
518
519 wl1271_debug(DEBUG_ACX, "acx connection monitor parameters");
520
521 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
522 if (!acx) {
523 ret = -ENOMEM;
524 goto out;
525 }
526
527 acx->synch_fail_thold = cpu_to_le32(wl->conf.conn.synch_fail_thold);
528 acx->bss_lose_timeout = cpu_to_le32(wl->conf.conn.bss_lose_timeout);
529
530 ret = wl1271_cmd_configure(wl, ACX_CONN_MONIT_PARAMS,
531 acx, sizeof(*acx));
532 if (ret < 0) {
533 wl1271_warning("failed to set connection monitor "
534 "parameters: %d", ret);
535 goto out;
536 }
537
538out:
539 kfree(acx);
540 return ret;
541}
542
543
444int wl1271_acx_sg_enable(struct wl1271 *wl) 544int wl1271_acx_sg_enable(struct wl1271 *wl)
445{ 545{
446 struct acx_bt_wlan_coex *pta; 546 struct acx_bt_wlan_coex *pta;
@@ -470,6 +570,7 @@ out:
470int wl1271_acx_sg_cfg(struct wl1271 *wl) 570int wl1271_acx_sg_cfg(struct wl1271 *wl)
471{ 571{
472 struct acx_bt_wlan_coex_param *param; 572 struct acx_bt_wlan_coex_param *param;
573 struct conf_sg_settings *c = &wl->conf.sg;
473 int ret; 574 int ret;
474 575
475 wl1271_debug(DEBUG_ACX, "acx sg cfg"); 576 wl1271_debug(DEBUG_ACX, "acx sg cfg");
@@ -481,34 +582,19 @@ int wl1271_acx_sg_cfg(struct wl1271 *wl)
481 } 582 }
482 583
483 /* BT-WLAN coext parameters */ 584 /* BT-WLAN coext parameters */
484 param->min_rate = RATE_INDEX_24MBPS; 585 param->per_threshold = cpu_to_le32(c->per_threshold);
485 param->bt_hp_max_time = PTA_BT_HP_MAXTIME_DEF; 586 param->max_scan_compensation_time =
486 param->wlan_hp_max_time = PTA_WLAN_HP_MAX_TIME_DEF; 587 cpu_to_le32(c->max_scan_compensation_time);
487 param->sense_disable_timer = PTA_SENSE_DISABLE_TIMER_DEF; 588 param->nfs_sample_interval = cpu_to_le16(c->nfs_sample_interval);
488 param->rx_time_bt_hp = PTA_PROTECTIVE_RX_TIME_DEF; 589 param->load_ratio = c->load_ratio;
489 param->tx_time_bt_hp = PTA_PROTECTIVE_TX_TIME_DEF; 590 param->auto_ps_mode = c->auto_ps_mode;
490 param->rx_time_bt_hp_fast = PTA_PROTECTIVE_RX_TIME_FAST_DEF; 591 param->probe_req_compensation = c->probe_req_compensation;
491 param->tx_time_bt_hp_fast = PTA_PROTECTIVE_TX_TIME_FAST_DEF; 592 param->scan_window_compensation = c->scan_window_compensation;
492 param->wlan_cycle_fast = PTA_CYCLE_TIME_FAST_DEF; 593 param->antenna_config = c->antenna_config;
493 param->bt_anti_starvation_period = PTA_ANTI_STARVE_PERIOD_DEF; 594 param->beacon_miss_threshold = c->beacon_miss_threshold;
494 param->next_bt_lp_packet = PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF; 595 param->rate_adaptation_threshold =
495 param->wake_up_beacon = PTA_TIME_BEFORE_BEACON_DEF; 596 cpu_to_le32(c->rate_adaptation_threshold);
496 param->hp_dm_max_guard_time = PTA_HPDM_MAX_TIME_DEF; 597 param->rate_adaptation_snr = c->rate_adaptation_snr;
497 param->next_wlan_packet = PTA_TIME_OUT_NEXT_WLAN_DEF;
498 param->antenna_type = PTA_ANTENNA_TYPE_DEF;
499 param->signal_type = PTA_SIGNALING_TYPE_DEF;
500 param->afh_leverage_on = PTA_AFH_LEVERAGE_ON_DEF;
501 param->quiet_cycle_num = PTA_NUMBER_QUIET_CYCLE_DEF;
502 param->max_cts = PTA_MAX_NUM_CTS_DEF;
503 param->wlan_packets_num = PTA_NUMBER_OF_WLAN_PACKETS_DEF;
504 param->bt_packets_num = PTA_NUMBER_OF_BT_PACKETS_DEF;
505 param->missed_rx_avalanche = PTA_RX_FOR_AVALANCHE_DEF;
506 param->wlan_elp_hp = PTA_ELP_HP_DEF;
507 param->bt_anti_starvation_cycles = PTA_ANTI_STARVE_NUM_CYCLE_DEF;
508 param->ack_mode_dual_ant = PTA_ACK_MODE_DEF;
509 param->pa_sd_enable = PTA_ALLOW_PA_SD_DEF;
510 param->pta_auto_mode_enable = PTA_AUTO_MODE_NO_CTS_DEF;
511 param->bt_hp_respected_num = PTA_BT_HP_RESPECTED_DEF;
512 598
513 ret = wl1271_cmd_configure(wl, ACX_SG_CFG, param, sizeof(*param)); 599 ret = wl1271_cmd_configure(wl, ACX_SG_CFG, param, sizeof(*param));
514 if (ret < 0) { 600 if (ret < 0) {
@@ -534,8 +620,8 @@ int wl1271_acx_cca_threshold(struct wl1271 *wl)
534 goto out; 620 goto out;
535 } 621 }
536 622
537 detection->rx_cca_threshold = CCA_THRSH_DISABLE_ENERGY_D; 623 detection->rx_cca_threshold = cpu_to_le16(wl->conf.rx.rx_cca_threshold);
538 detection->tx_energy_detection = 0; 624 detection->tx_energy_detection = wl->conf.tx.tx_energy_detection;
539 625
540 ret = wl1271_cmd_configure(wl, ACX_CCA_THRESHOLD, 626 ret = wl1271_cmd_configure(wl, ACX_CCA_THRESHOLD,
541 detection, sizeof(*detection)); 627 detection, sizeof(*detection));
@@ -562,10 +648,10 @@ int wl1271_acx_bcn_dtim_options(struct wl1271 *wl)
562 goto out; 648 goto out;
563 } 649 }
564 650
565 bb->beacon_rx_timeout = BCN_RX_TIMEOUT_DEF_VALUE; 651 bb->beacon_rx_timeout = cpu_to_le16(wl->conf.conn.beacon_rx_timeout);
566 bb->broadcast_timeout = BROADCAST_RX_TIMEOUT_DEF_VALUE; 652 bb->broadcast_timeout = cpu_to_le16(wl->conf.conn.broadcast_timeout);
567 bb->rx_broadcast_in_ps = RX_BROADCAST_IN_PS_DEF_VALUE; 653 bb->rx_broadcast_in_ps = wl->conf.conn.rx_broadcast_in_ps;
568 bb->ps_poll_threshold = CONSECUTIVE_PS_POLL_FAILURE_DEF; 654 bb->ps_poll_threshold = wl->conf.conn.ps_poll_threshold;
569 655
570 ret = wl1271_cmd_configure(wl, ACX_BCN_DTIM_OPTIONS, bb, sizeof(*bb)); 656 ret = wl1271_cmd_configure(wl, ACX_BCN_DTIM_OPTIONS, bb, sizeof(*bb));
571 if (ret < 0) { 657 if (ret < 0) {
@@ -591,7 +677,7 @@ int wl1271_acx_aid(struct wl1271 *wl, u16 aid)
591 goto out; 677 goto out;
592 } 678 }
593 679
594 acx_aid->aid = aid; 680 acx_aid->aid = cpu_to_le16(aid);
595 681
596 ret = wl1271_cmd_configure(wl, ACX_AID, acx_aid, sizeof(*acx_aid)); 682 ret = wl1271_cmd_configure(wl, ACX_AID, acx_aid, sizeof(*acx_aid));
597 if (ret < 0) { 683 if (ret < 0) {
@@ -618,9 +704,8 @@ int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask)
618 } 704 }
619 705
620 /* high event mask is unused */ 706 /* high event mask is unused */
621 mask->high_event_mask = 0xffffffff; 707 mask->high_event_mask = cpu_to_le32(0xffffffff);
622 708 mask->event_mask = cpu_to_le32(event_mask);
623 mask->event_mask = event_mask;
624 709
625 ret = wl1271_cmd_configure(wl, ACX_EVENT_MBOX_MASK, 710 ret = wl1271_cmd_configure(wl, ACX_EVENT_MBOX_MASK,
626 mask, sizeof(*mask)); 711 mask, sizeof(*mask));
@@ -706,6 +791,8 @@ int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats)
706int wl1271_acx_rate_policies(struct wl1271 *wl) 791int wl1271_acx_rate_policies(struct wl1271 *wl)
707{ 792{
708 struct acx_rate_policy *acx; 793 struct acx_rate_policy *acx;
794 struct conf_tx_rate_class *c = &wl->conf.tx.rc_conf;
795 int idx = 0;
709 int ret = 0; 796 int ret = 0;
710 797
711 wl1271_debug(DEBUG_ACX, "acx rate policies"); 798 wl1271_debug(DEBUG_ACX, "acx rate policies");
@@ -717,12 +804,21 @@ int wl1271_acx_rate_policies(struct wl1271 *wl)
717 goto out; 804 goto out;
718 } 805 }
719 806
720 /* configure one default (one-size-fits-all) rate class */ 807 /* configure one basic rate class */
721 acx->rate_class_cnt = 1; 808 idx = ACX_TX_BASIC_RATE;
722 acx->rate_class[0].enabled_rates = ACX_RATE_MASK_ALL; 809 acx->rate_class[idx].enabled_rates = cpu_to_le32(wl->basic_rate_set);
723 acx->rate_class[0].short_retry_limit = ACX_RATE_RETRY_LIMIT; 810 acx->rate_class[idx].short_retry_limit = c->short_retry_limit;
724 acx->rate_class[0].long_retry_limit = ACX_RATE_RETRY_LIMIT; 811 acx->rate_class[idx].long_retry_limit = c->long_retry_limit;
725 acx->rate_class[0].aflags = 0; 812 acx->rate_class[idx].aflags = c->aflags;
813
814 /* configure one AP supported rate class */
815 idx = ACX_TX_AP_FULL_RATE;
816 acx->rate_class[idx].enabled_rates = cpu_to_le32(wl->rate_set);
817 acx->rate_class[idx].short_retry_limit = c->short_retry_limit;
818 acx->rate_class[idx].long_retry_limit = c->long_retry_limit;
819 acx->rate_class[idx].aflags = c->aflags;
820
821 acx->rate_class_cnt = cpu_to_le32(ACX_TX_RATE_POLICY_CNT);
726 822
727 ret = wl1271_cmd_configure(wl, ACX_RATE_POLICY, acx, sizeof(*acx)); 823 ret = wl1271_cmd_configure(wl, ACX_RATE_POLICY, acx, sizeof(*acx));
728 if (ret < 0) { 824 if (ret < 0) {
@@ -735,12 +831,14 @@ out:
735 return ret; 831 return ret;
736} 832}
737 833
738int wl1271_acx_ac_cfg(struct wl1271 *wl) 834int wl1271_acx_ac_cfg(struct wl1271 *wl, u8 ac, u8 cw_min, u16 cw_max,
835 u8 aifsn, u16 txop)
739{ 836{
740 struct acx_ac_cfg *acx; 837 struct acx_ac_cfg *acx;
741 int i, ret = 0; 838 int ret = 0;
742 839
743 wl1271_debug(DEBUG_ACX, "acx access category config"); 840 wl1271_debug(DEBUG_ACX, "acx ac cfg %d cw_ming %d cw_max %d "
841 "aifs %d txop %d", ac, cw_min, cw_max, aifsn, txop);
744 842
745 acx = kzalloc(sizeof(*acx), GFP_KERNEL); 843 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
746 844
@@ -749,29 +847,16 @@ int wl1271_acx_ac_cfg(struct wl1271 *wl)
749 goto out; 847 goto out;
750 } 848 }
751 849
752 /* 850 acx->ac = ac;
753 * FIXME: Configure each AC with appropriate values (most suitable 851 acx->cw_min = cw_min;
754 * values will probably be different for each AC. 852 acx->cw_max = cpu_to_le16(cw_max);
755 */ 853 acx->aifsn = aifsn;
756 for (i = 0; i < WL1271_ACX_AC_COUNT; i++) { 854 acx->tx_op_limit = cpu_to_le16(txop);
757 acx->ac = i; 855
758 856 ret = wl1271_cmd_configure(wl, ACX_AC_CFG, acx, sizeof(*acx));
759 /* 857 if (ret < 0) {
760 * FIXME: The following default values originate from 858 wl1271_warning("acx ac cfg failed: %d", ret);
761 * the TI reference driver. What do they mean? 859 goto out;
762 */
763 acx->cw_min = 15;
764 acx->cw_max = 63;
765 acx->aifsn = 3;
766 acx->reserved = 0;
767 acx->tx_op_limit = 0;
768
769 ret = wl1271_cmd_configure(wl, ACX_AC_CFG, acx, sizeof(*acx));
770 if (ret < 0) {
771 wl1271_warning("Setting of access category "
772 "config: %d", ret);
773 goto out;
774 }
775 } 860 }
776 861
777out: 862out:
@@ -779,10 +864,12 @@ out:
779 return ret; 864 return ret;
780} 865}
781 866
782int wl1271_acx_tid_cfg(struct wl1271 *wl) 867int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type,
868 u8 tsid, u8 ps_scheme, u8 ack_policy,
869 u32 apsd_conf0, u32 apsd_conf1)
783{ 870{
784 struct acx_tid_config *acx; 871 struct acx_tid_config *acx;
785 int i, ret = 0; 872 int ret = 0;
786 873
787 wl1271_debug(DEBUG_ACX, "acx tid config"); 874 wl1271_debug(DEBUG_ACX, "acx tid config");
788 875
@@ -793,18 +880,18 @@ int wl1271_acx_tid_cfg(struct wl1271 *wl)
793 goto out; 880 goto out;
794 } 881 }
795 882
796 /* FIXME: configure each TID with a different AC reference */ 883 acx->queue_id = queue_id;
797 for (i = 0; i < WL1271_ACX_TID_COUNT; i++) { 884 acx->channel_type = channel_type;
798 acx->queue_id = i; 885 acx->tsid = tsid;
799 acx->tsid = WL1271_ACX_AC_BE; 886 acx->ps_scheme = ps_scheme;
800 acx->ps_scheme = WL1271_ACX_PS_SCHEME_LEGACY; 887 acx->ack_policy = ack_policy;
801 acx->ack_policy = WL1271_ACX_ACK_POLICY_LEGACY; 888 acx->apsd_conf[0] = cpu_to_le32(apsd_conf0);
889 acx->apsd_conf[1] = cpu_to_le32(apsd_conf1);
802 890
803 ret = wl1271_cmd_configure(wl, ACX_TID_CFG, acx, sizeof(*acx)); 891 ret = wl1271_cmd_configure(wl, ACX_TID_CFG, acx, sizeof(*acx));
804 if (ret < 0) { 892 if (ret < 0) {
805 wl1271_warning("Setting of tid config failed: %d", ret); 893 wl1271_warning("Setting of tid config failed: %d", ret);
806 goto out; 894 goto out;
807 }
808 } 895 }
809 896
810out: 897out:
@@ -826,7 +913,7 @@ int wl1271_acx_frag_threshold(struct wl1271 *wl)
826 goto out; 913 goto out;
827 } 914 }
828 915
829 acx->frag_threshold = IEEE80211_MAX_FRAG_THRESHOLD; 916 acx->frag_threshold = cpu_to_le16(wl->conf.tx.frag_threshold);
830 ret = wl1271_cmd_configure(wl, ACX_FRAG_CFG, acx, sizeof(*acx)); 917 ret = wl1271_cmd_configure(wl, ACX_FRAG_CFG, acx, sizeof(*acx));
831 if (ret < 0) { 918 if (ret < 0) {
832 wl1271_warning("Setting of frag threshold failed: %d", ret); 919 wl1271_warning("Setting of frag threshold failed: %d", ret);
@@ -852,8 +939,8 @@ int wl1271_acx_tx_config_options(struct wl1271 *wl)
852 goto out; 939 goto out;
853 } 940 }
854 941
855 acx->tx_compl_timeout = WL1271_ACX_TX_COMPL_TIMEOUT; 942 acx->tx_compl_timeout = cpu_to_le16(wl->conf.tx.tx_compl_timeout);
856 acx->tx_compl_threshold = WL1271_ACX_TX_COMPL_THRESHOLD; 943 acx->tx_compl_threshold = cpu_to_le16(wl->conf.tx.tx_compl_threshold);
857 ret = wl1271_cmd_configure(wl, ACX_TX_CONFIG_OPT, acx, sizeof(*acx)); 944 ret = wl1271_cmd_configure(wl, ACX_TX_CONFIG_OPT, acx, sizeof(*acx));
858 if (ret < 0) { 945 if (ret < 0) {
859 wl1271_warning("Setting of tx options failed: %d", ret); 946 wl1271_warning("Setting of tx options failed: %d", ret);
@@ -879,11 +966,11 @@ int wl1271_acx_mem_cfg(struct wl1271 *wl)
879 } 966 }
880 967
881 /* memory config */ 968 /* memory config */
882 mem_conf->num_stations = cpu_to_le16(DEFAULT_NUM_STATIONS); 969 mem_conf->num_stations = DEFAULT_NUM_STATIONS;
883 mem_conf->rx_mem_block_num = ACX_RX_MEM_BLOCKS; 970 mem_conf->rx_mem_block_num = ACX_RX_MEM_BLOCKS;
884 mem_conf->tx_min_mem_block_num = ACX_TX_MIN_MEM_BLOCKS; 971 mem_conf->tx_min_mem_block_num = ACX_TX_MIN_MEM_BLOCKS;
885 mem_conf->num_ssid_profiles = ACX_NUM_SSID_PROFILES; 972 mem_conf->num_ssid_profiles = ACX_NUM_SSID_PROFILES;
886 mem_conf->total_tx_descriptors = ACX_TX_DESCRIPTORS; 973 mem_conf->total_tx_descriptors = cpu_to_le32(ACX_TX_DESCRIPTORS);
887 974
888 ret = wl1271_cmd_configure(wl, ACX_MEM_CFG, mem_conf, 975 ret = wl1271_cmd_configure(wl, ACX_MEM_CFG, mem_conf,
889 sizeof(*mem_conf)); 976 sizeof(*mem_conf));
@@ -906,7 +993,7 @@ int wl1271_acx_init_mem_config(struct wl1271 *wl)
906 return ret; 993 return ret;
907 994
908 wl->target_mem_map = kzalloc(sizeof(struct wl1271_acx_mem_map), 995 wl->target_mem_map = kzalloc(sizeof(struct wl1271_acx_mem_map),
909 GFP_KERNEL); 996 GFP_KERNEL);
910 if (!wl->target_mem_map) { 997 if (!wl->target_mem_map) {
911 wl1271_error("couldn't allocate target memory map"); 998 wl1271_error("couldn't allocate target memory map");
912 return -ENOMEM; 999 return -ENOMEM;
@@ -923,7 +1010,8 @@ int wl1271_acx_init_mem_config(struct wl1271 *wl)
923 } 1010 }
924 1011
925 /* initialize TX block book keeping */ 1012 /* initialize TX block book keeping */
926 wl->tx_blocks_available = wl->target_mem_map->num_tx_mem_blocks; 1013 wl->tx_blocks_available =
1014 le32_to_cpu(wl->target_mem_map->num_tx_mem_blocks);
927 wl1271_debug(DEBUG_TX, "available tx blocks: %d", 1015 wl1271_debug(DEBUG_TX, "available tx blocks: %d",
928 wl->tx_blocks_available); 1016 wl->tx_blocks_available);
929 1017
@@ -943,10 +1031,10 @@ int wl1271_acx_init_rx_interrupt(struct wl1271 *wl)
943 goto out; 1031 goto out;
944 } 1032 }
945 1033
946 rx_conf->threshold = WL1271_RX_INTR_THRESHOLD_DEF; 1034 rx_conf->threshold = cpu_to_le16(wl->conf.rx.irq_pkt_threshold);
947 rx_conf->timeout = WL1271_RX_INTR_TIMEOUT_DEF; 1035 rx_conf->timeout = cpu_to_le16(wl->conf.rx.irq_timeout);
948 rx_conf->mblk_threshold = USHORT_MAX; /* Disabled */ 1036 rx_conf->mblk_threshold = cpu_to_le16(wl->conf.rx.irq_blk_threshold);
949 rx_conf->queue_type = RX_QUEUE_TYPE_RX_LOW_PRIORITY; 1037 rx_conf->queue_type = wl->conf.rx.queue_type;
950 1038
951 ret = wl1271_cmd_configure(wl, ACX_RX_CONFIG_OPT, rx_conf, 1039 ret = wl1271_cmd_configure(wl, ACX_RX_CONFIG_OPT, rx_conf,
952 sizeof(*rx_conf)); 1040 sizeof(*rx_conf));
@@ -959,3 +1047,99 @@ out:
959 kfree(rx_conf); 1047 kfree(rx_conf);
960 return ret; 1048 return ret;
961} 1049}
1050
1051int wl1271_acx_bet_enable(struct wl1271 *wl, bool enable)
1052{
1053 struct wl1271_acx_bet_enable *acx = NULL;
1054 int ret = 0;
1055
1056 wl1271_debug(DEBUG_ACX, "acx bet enable");
1057
1058 if (enable && wl->conf.conn.bet_enable == CONF_BET_MODE_DISABLE)
1059 goto out;
1060
1061 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
1062 if (!acx) {
1063 ret = -ENOMEM;
1064 goto out;
1065 }
1066
1067 acx->enable = enable ? CONF_BET_MODE_ENABLE : CONF_BET_MODE_DISABLE;
1068 acx->max_consecutive = wl->conf.conn.bet_max_consecutive;
1069
1070 ret = wl1271_cmd_configure(wl, ACX_BET_ENABLE, acx, sizeof(*acx));
1071 if (ret < 0) {
1072 wl1271_warning("acx bet enable failed: %d", ret);
1073 goto out;
1074 }
1075
1076out:
1077 kfree(acx);
1078 return ret;
1079}
1080
1081int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, u8 *address,
1082 u8 version)
1083{
1084 struct wl1271_acx_arp_filter *acx;
1085 int ret;
1086
1087 wl1271_debug(DEBUG_ACX, "acx arp ip filter, enable: %d", enable);
1088
1089 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
1090 if (!acx) {
1091 ret = -ENOMEM;
1092 goto out;
1093 }
1094
1095 acx->version = version;
1096 acx->enable = enable;
1097
1098 if (enable == true) {
1099 if (version == ACX_IPV4_VERSION)
1100 memcpy(acx->address, address, ACX_IPV4_ADDR_SIZE);
1101 else if (version == ACX_IPV6_VERSION)
1102 memcpy(acx->address, address, sizeof(acx->address));
1103 else
1104 wl1271_error("Invalid IP version");
1105 }
1106
1107 ret = wl1271_cmd_configure(wl, ACX_ARP_IP_FILTER,
1108 acx, sizeof(*acx));
1109 if (ret < 0) {
1110 wl1271_warning("failed to set arp ip filter: %d", ret);
1111 goto out;
1112 }
1113
1114out:
1115 kfree(acx);
1116 return ret;
1117}
1118
1119int wl1271_acx_pm_config(struct wl1271 *wl)
1120{
1121 struct wl1271_acx_pm_config *acx = NULL;
1122 struct conf_pm_config_settings *c = &wl->conf.pm_config;
1123 int ret = 0;
1124
1125 wl1271_debug(DEBUG_ACX, "acx pm config");
1126
1127 acx = kzalloc(sizeof(*acx), GFP_KERNEL);
1128 if (!acx) {
1129 ret = -ENOMEM;
1130 goto out;
1131 }
1132
1133 acx->host_clk_settling_time = cpu_to_le32(c->host_clk_settling_time);
1134 acx->host_fast_wakeup_support = c->host_fast_wakeup_support;
1135
1136 ret = wl1271_cmd_configure(wl, ACX_PM_CONFIG, acx, sizeof(*acx));
1137 if (ret < 0) {
1138 wl1271_warning("acx pm config failed: %d", ret);
1139 goto out;
1140 }
1141
1142out:
1143 kfree(acx);
1144 return ret;
1145}
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.h b/drivers/net/wireless/wl12xx/wl1271_acx.h
index 9068daaf0ddf..aeccc98581eb 100644
--- a/drivers/net/wireless/wl12xx/wl1271_acx.h
+++ b/drivers/net/wireless/wl12xx/wl1271_acx.h
@@ -2,7 +2,7 @@
2 * This file is part of wl1271 2 * This file is part of wl1271
3 * 3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved. 4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation 5 * Copyright (C) 2008-2010 Nokia Corporation
6 * 6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com> 7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 * 8 *
@@ -61,8 +61,9 @@
61 WL1271_ACX_INTR_HW_AVAILABLE | \ 61 WL1271_ACX_INTR_HW_AVAILABLE | \
62 WL1271_ACX_INTR_DATA) 62 WL1271_ACX_INTR_DATA)
63 63
64#define WL1271_INTR_MASK (WL1271_ACX_INTR_EVENT_A | \ 64#define WL1271_INTR_MASK (WL1271_ACX_INTR_EVENT_A | \
65 WL1271_ACX_INTR_EVENT_B | \ 65 WL1271_ACX_INTR_EVENT_B | \
66 WL1271_ACX_INTR_HW_AVAILABLE | \
66 WL1271_ACX_INTR_DATA) 67 WL1271_ACX_INTR_DATA)
67 68
68/* Target's information element */ 69/* Target's information element */
@@ -70,11 +71,11 @@ struct acx_header {
70 struct wl1271_cmd_header cmd; 71 struct wl1271_cmd_header cmd;
71 72
72 /* acx (or information element) header */ 73 /* acx (or information element) header */
73 u16 id; 74 __le16 id;
74 75
75 /* payload length (not including headers */ 76 /* payload length (not including headers */
76 u16 len; 77 __le16 len;
77}; 78} __attribute__ ((packed));
78 79
79struct acx_error_counter { 80struct acx_error_counter {
80 struct acx_header header; 81 struct acx_header header;
@@ -82,21 +83,21 @@ struct acx_error_counter {
82 /* The number of PLCP errors since the last time this */ 83 /* The number of PLCP errors since the last time this */
83 /* information element was interrogated. This field is */ 84 /* information element was interrogated. This field is */
84 /* automatically cleared when it is interrogated.*/ 85 /* automatically cleared when it is interrogated.*/
85 u32 PLCP_error; 86 __le32 PLCP_error;
86 87
87 /* The number of FCS errors since the last time this */ 88 /* The number of FCS errors since the last time this */
88 /* information element was interrogated. This field is */ 89 /* information element was interrogated. This field is */
89 /* automatically cleared when it is interrogated.*/ 90 /* automatically cleared when it is interrogated.*/
90 u32 FCS_error; 91 __le32 FCS_error;
91 92
92 /* The number of MPDUs without PLCP header errors received*/ 93 /* The number of MPDUs without PLCP header errors received*/
93 /* since the last time this information element was interrogated. */ 94 /* since the last time this information element was interrogated. */
94 /* This field is automatically cleared when it is interrogated.*/ 95 /* This field is automatically cleared when it is interrogated.*/
95 u32 valid_frame; 96 __le32 valid_frame;
96 97
97 /* the number of missed sequence numbers in the squentially */ 98 /* the number of missed sequence numbers in the squentially */
98 /* values of frames seq numbers */ 99 /* values of frames seq numbers */
99 u32 seq_num_miss; 100 __le32 seq_num_miss;
100} __attribute__ ((packed)); 101} __attribute__ ((packed));
101 102
102struct acx_revision { 103struct acx_revision {
@@ -125,7 +126,7 @@ struct acx_revision {
125 * (1 = first spin, 2 = second spin, and so on). 126 * (1 = first spin, 2 = second spin, and so on).
126 * bits 24 - 31: Chip ID - The WiLink chip ID. 127 * bits 24 - 31: Chip ID - The WiLink chip ID.
127 */ 128 */
128 u32 hw_version; 129 __le32 hw_version;
129} __attribute__ ((packed)); 130} __attribute__ ((packed));
130 131
131enum wl1271_psm_mode { 132enum wl1271_psm_mode {
@@ -170,7 +171,6 @@ enum {
170#define DP_RX_PACKET_RING_CHUNK_NUM 2 171#define DP_RX_PACKET_RING_CHUNK_NUM 2
171#define DP_TX_PACKET_RING_CHUNK_NUM 2 172#define DP_TX_PACKET_RING_CHUNK_NUM 2
172#define DP_TX_COMPLETE_TIME_OUT 20 173#define DP_TX_COMPLETE_TIME_OUT 20
173#define FW_TX_CMPLT_BLOCK_SIZE 16
174 174
175#define TX_MSDU_LIFETIME_MIN 0 175#define TX_MSDU_LIFETIME_MIN 0
176#define TX_MSDU_LIFETIME_MAX 3000 176#define TX_MSDU_LIFETIME_MAX 3000
@@ -186,7 +186,7 @@ struct acx_rx_msdu_lifetime {
186 * The maximum amount of time, in TU, before the 186 * The maximum amount of time, in TU, before the
187 * firmware discards the MSDU. 187 * firmware discards the MSDU.
188 */ 188 */
189 u32 lifetime; 189 __le32 lifetime;
190} __attribute__ ((packed)); 190} __attribute__ ((packed));
191 191
192/* 192/*
@@ -273,14 +273,14 @@ struct acx_rx_msdu_lifetime {
273struct acx_rx_config { 273struct acx_rx_config {
274 struct acx_header header; 274 struct acx_header header;
275 275
276 u32 config_options; 276 __le32 config_options;
277 u32 filter_options; 277 __le32 filter_options;
278} __attribute__ ((packed)); 278} __attribute__ ((packed));
279 279
280struct acx_packet_detection { 280struct acx_packet_detection {
281 struct acx_header header; 281 struct acx_header header;
282 282
283 u32 threshold; 283 __le32 threshold;
284} __attribute__ ((packed)); 284} __attribute__ ((packed));
285 285
286 286
@@ -302,8 +302,8 @@ struct acx_slot {
302} __attribute__ ((packed)); 302} __attribute__ ((packed));
303 303
304 304
305#define ADDRESS_GROUP_MAX (8) 305#define ACX_MC_ADDRESS_GROUP_MAX (8)
306#define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ADDRESS_GROUP_MAX) 306#define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ACX_MC_ADDRESS_GROUP_MAX)
307 307
308struct acx_dot11_grp_addr_tbl { 308struct acx_dot11_grp_addr_tbl {
309 struct acx_header header; 309 struct acx_header header;
@@ -314,40 +314,17 @@ struct acx_dot11_grp_addr_tbl {
314 u8 mac_table[ADDRESS_GROUP_MAX_LEN]; 314 u8 mac_table[ADDRESS_GROUP_MAX_LEN];
315} __attribute__ ((packed)); 315} __attribute__ ((packed));
316 316
317
318#define RX_TIMEOUT_PS_POLL_MIN 0
319#define RX_TIMEOUT_PS_POLL_MAX (200000)
320#define RX_TIMEOUT_PS_POLL_DEF (15)
321#define RX_TIMEOUT_UPSD_MIN 0
322#define RX_TIMEOUT_UPSD_MAX (200000)
323#define RX_TIMEOUT_UPSD_DEF (15)
324
325struct acx_rx_timeout { 317struct acx_rx_timeout {
326 struct acx_header header; 318 struct acx_header header;
327 319
328 /* 320 __le16 ps_poll_timeout;
329 * The longest time the STA will wait to receive 321 __le16 upsd_timeout;
330 * traffic from the AP after a PS-poll has been
331 * transmitted.
332 */
333 u16 ps_poll_timeout;
334
335 /*
336 * The longest time the STA will wait to receive
337 * traffic from the AP after a frame has been sent
338 * from an UPSD enabled queue.
339 */
340 u16 upsd_timeout;
341} __attribute__ ((packed)); 322} __attribute__ ((packed));
342 323
343#define RTS_THRESHOLD_MIN 0
344#define RTS_THRESHOLD_MAX 4096
345#define RTS_THRESHOLD_DEF 2347
346
347struct acx_rts_threshold { 324struct acx_rts_threshold {
348 struct acx_header header; 325 struct acx_header header;
349 326
350 u16 threshold; 327 __le16 threshold;
351 u8 pad[2]; 328 u8 pad[2];
352} __attribute__ ((packed)); 329} __attribute__ ((packed));
353 330
@@ -371,7 +348,7 @@ struct acx_beacon_filter_option {
371 * ACXBeaconFilterEntry (not 221) 348 * ACXBeaconFilterEntry (not 221)
372 * Byte Offset Size (Bytes) Definition 349 * Byte Offset Size (Bytes) Definition
373 * =========== ============ ========== 350 * =========== ============ ==========
374 * 0 1 IE identifier 351 * 0 1 IE identifier
375 * 1 1 Treatment bit mask 352 * 1 1 Treatment bit mask
376 * 353 *
377 * ACXBeaconFilterEntry (221) 354 * ACXBeaconFilterEntry (221)
@@ -404,8 +381,15 @@ struct acx_beacon_filter_ie_table {
404 struct acx_header header; 381 struct acx_header header;
405 382
406 u8 num_ie; 383 u8 num_ie;
407 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
408 u8 pad[3]; 384 u8 pad[3];
385 u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
386} __attribute__ ((packed));
387
388struct acx_conn_monit_params {
389 struct acx_header header;
390
391 __le32 synch_fail_thold; /* number of beacons missed */
392 __le32 bss_lose_timeout; /* number of TU's from synch fail */
409} __attribute__ ((packed)); 393} __attribute__ ((packed));
410 394
411enum { 395enum {
@@ -431,6 +415,14 @@ struct acx_bt_wlan_coex {
431 u8 pad[3]; 415 u8 pad[3];
432} __attribute__ ((packed)); 416} __attribute__ ((packed));
433 417
418struct acx_dco_itrim_params {
419 struct acx_header header;
420
421 u8 enable;
422 u8 padding[3];
423 __le32 timeout;
424} __attribute__ ((packed));
425
434#define PTA_ANTENNA_TYPE_DEF (0) 426#define PTA_ANTENNA_TYPE_DEF (0)
435#define PTA_BT_HP_MAXTIME_DEF (2000) 427#define PTA_BT_HP_MAXTIME_DEF (2000)
436#define PTA_WLAN_HP_MAX_TIME_DEF (5000) 428#define PTA_WLAN_HP_MAX_TIME_DEF (5000)
@@ -463,150 +455,34 @@ struct acx_bt_wlan_coex {
463struct acx_bt_wlan_coex_param { 455struct acx_bt_wlan_coex_param {
464 struct acx_header header; 456 struct acx_header header;
465 457
466 /* 458 __le32 per_threshold;
467 * The minimum rate of a received WLAN packet in the STA, 459 __le32 max_scan_compensation_time;
468 * during protective mode, of which a new BT-HP request 460 __le16 nfs_sample_interval;
469 * during this Rx will always be respected and gain the antenna. 461 u8 load_ratio;
470 */ 462 u8 auto_ps_mode;
471 u32 min_rate; 463 u8 probe_req_compensation;
472 464 u8 scan_window_compensation;
473 /* Max time the BT HP will be respected. */ 465 u8 antenna_config;
474 u16 bt_hp_max_time; 466 u8 beacon_miss_threshold;
475 467 __le32 rate_adaptation_threshold;
476 /* Max time the WLAN HP will be respected. */ 468 s8 rate_adaptation_snr;
477 u16 wlan_hp_max_time; 469 u8 padding[3];
478
479 /*
480 * The time between the last BT activity
481 * and the moment when the sense mode returns
482 * to SENSE_INACTIVE.
483 */
484 u16 sense_disable_timer;
485
486 /* Time before the next BT HP instance */
487 u16 rx_time_bt_hp;
488 u16 tx_time_bt_hp;
489
490 /* range: 10-20000 default: 1500 */
491 u16 rx_time_bt_hp_fast;
492 u16 tx_time_bt_hp_fast;
493
494 /* range: 2000-65535 default: 8700 */
495 u16 wlan_cycle_fast;
496
497 /* range: 0 - 15000 (Msec) default: 1000 */
498 u16 bt_anti_starvation_period;
499
500 /* range 400-10000(Usec) default: 3000 */
501 u16 next_bt_lp_packet;
502
503 /* Deafult: worst case for BT DH5 traffic */
504 u16 wake_up_beacon;
505
506 /* range: 0-50000(Usec) default: 1050 */
507 u16 hp_dm_max_guard_time;
508
509 /*
510 * This is to prevent both BT & WLAN antenna
511 * starvation.
512 * Range: 100-50000(Usec) default:2550
513 */
514 u16 next_wlan_packet;
515
516 /* 0 -> shared antenna */
517 u8 antenna_type;
518
519 /*
520 * 0 -> TI legacy
521 * 1 -> Palau
522 */
523 u8 signal_type;
524
525 /*
526 * BT AFH status
527 * 0 -> no AFH
528 * 1 -> from dedicated GPIO
529 * 2 -> AFH on (from host)
530 */
531 u8 afh_leverage_on;
532
533 /*
534 * The number of cycles during which no
535 * TX will be sent after 1 cycle of RX
536 * transaction in protective mode
537 */
538 u8 quiet_cycle_num;
539
540 /*
541 * The maximum number of CTSs that will
542 * be sent for receiving RX packet in
543 * protective mode
544 */
545 u8 max_cts;
546
547 /*
548 * The number of WLAN packets
549 * transferred in common mode before
550 * switching to BT.
551 */
552 u8 wlan_packets_num;
553
554 /*
555 * The number of BT packets
556 * transferred in common mode before
557 * switching to WLAN.
558 */
559 u8 bt_packets_num;
560
561 /* range: 1-255 default: 5 */
562 u8 missed_rx_avalanche;
563
564 /* range: 0-1 default: 1 */
565 u8 wlan_elp_hp;
566
567 /* range: 0 - 15 default: 4 */
568 u8 bt_anti_starvation_cycles;
569
570 u8 ack_mode_dual_ant;
571
572 /*
573 * Allow PA_SD assertion/de-assertion
574 * during enabled BT activity.
575 */
576 u8 pa_sd_enable;
577
578 /*
579 * Enable/Disable PTA in auto mode:
580 * Support Both Active & P.S modes
581 */
582 u8 pta_auto_mode_enable;
583
584 /* range: 0 - 20 default: 1 */
585 u8 bt_hp_respected_num;
586} __attribute__ ((packed)); 470} __attribute__ ((packed));
587 471
588#define CCA_THRSH_ENABLE_ENERGY_D 0x140A
589#define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF
590
591struct acx_energy_detection { 472struct acx_energy_detection {
592 struct acx_header header; 473 struct acx_header header;
593 474
594 /* The RX Clear Channel Assessment threshold in the PHY */ 475 /* The RX Clear Channel Assessment threshold in the PHY */
595 u16 rx_cca_threshold; 476 __le16 rx_cca_threshold;
596 u8 tx_energy_detection; 477 u8 tx_energy_detection;
597 u8 pad; 478 u8 pad;
598} __attribute__ ((packed)); 479} __attribute__ ((packed));
599 480
600#define BCN_RX_TIMEOUT_DEF_VALUE 10000
601#define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000
602#define RX_BROADCAST_IN_PS_DEF_VALUE 1
603#define CONSECUTIVE_PS_POLL_FAILURE_DEF 4
604
605struct acx_beacon_broadcast { 481struct acx_beacon_broadcast {
606 struct acx_header header; 482 struct acx_header header;
607 483
608 u16 beacon_rx_timeout; 484 __le16 beacon_rx_timeout;
609 u16 broadcast_timeout; 485 __le16 broadcast_timeout;
610 486
611 /* Enables receiving of broadcast packets in PS mode */ 487 /* Enables receiving of broadcast packets in PS mode */
612 u8 rx_broadcast_in_ps; 488 u8 rx_broadcast_in_ps;
@@ -619,8 +495,8 @@ struct acx_beacon_broadcast {
619struct acx_event_mask { 495struct acx_event_mask {
620 struct acx_header header; 496 struct acx_header header;
621 497
622 u32 event_mask; 498 __le32 event_mask;
623 u32 high_event_mask; /* Unused */ 499 __le32 high_event_mask; /* Unused */
624} __attribute__ ((packed)); 500} __attribute__ ((packed));
625 501
626#define CFG_RX_FCS BIT(2) 502#define CFG_RX_FCS BIT(2)
@@ -657,11 +533,15 @@ struct acx_event_mask {
657#define SCAN_TRIGGERED BIT(2) 533#define SCAN_TRIGGERED BIT(2)
658#define SCAN_PRIORITY_HIGH BIT(3) 534#define SCAN_PRIORITY_HIGH BIT(3)
659 535
536/* When set, disable HW encryption */
537#define DF_ENCRYPTION_DISABLE 0x01
538#define DF_SNIFF_MODE_ENABLE 0x80
539
660struct acx_feature_config { 540struct acx_feature_config {
661 struct acx_header header; 541 struct acx_header header;
662 542
663 u32 options; 543 __le32 options;
664 u32 data_flow_options; 544 __le32 data_flow_options;
665} __attribute__ ((packed)); 545} __attribute__ ((packed));
666 546
667struct acx_current_tx_power { 547struct acx_current_tx_power {
@@ -671,14 +551,6 @@ struct acx_current_tx_power {
671 u8 padding[3]; 551 u8 padding[3];
672} __attribute__ ((packed)); 552} __attribute__ ((packed));
673 553
674enum acx_wake_up_event {
675 WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/
676 WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/
677 WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM */
678 WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon */
679 WAKE_UP_EVENT_BITS_MASK = 0x0F
680};
681
682struct acx_wake_up_condition { 554struct acx_wake_up_condition {
683 struct acx_header header; 555 struct acx_header header;
684 556
@@ -693,7 +565,7 @@ struct acx_aid {
693 /* 565 /*
694 * To be set when associated with an AP. 566 * To be set when associated with an AP.
695 */ 567 */
696 u16 aid; 568 __le16 aid;
697 u8 pad[2]; 569 u8 pad[2];
698} __attribute__ ((packed)); 570} __attribute__ ((packed));
699 571
@@ -725,152 +597,152 @@ struct acx_ctsprotect {
725} __attribute__ ((packed)); 597} __attribute__ ((packed));
726 598
727struct acx_tx_statistics { 599struct acx_tx_statistics {
728 u32 internal_desc_overflow; 600 __le32 internal_desc_overflow;
729} __attribute__ ((packed)); 601} __attribute__ ((packed));
730 602
731struct acx_rx_statistics { 603struct acx_rx_statistics {
732 u32 out_of_mem; 604 __le32 out_of_mem;
733 u32 hdr_overflow; 605 __le32 hdr_overflow;
734 u32 hw_stuck; 606 __le32 hw_stuck;
735 u32 dropped; 607 __le32 dropped;
736 u32 fcs_err; 608 __le32 fcs_err;
737 u32 xfr_hint_trig; 609 __le32 xfr_hint_trig;
738 u32 path_reset; 610 __le32 path_reset;
739 u32 reset_counter; 611 __le32 reset_counter;
740} __attribute__ ((packed)); 612} __attribute__ ((packed));
741 613
742struct acx_dma_statistics { 614struct acx_dma_statistics {
743 u32 rx_requested; 615 __le32 rx_requested;
744 u32 rx_errors; 616 __le32 rx_errors;
745 u32 tx_requested; 617 __le32 tx_requested;
746 u32 tx_errors; 618 __le32 tx_errors;
747} __attribute__ ((packed)); 619} __attribute__ ((packed));
748 620
749struct acx_isr_statistics { 621struct acx_isr_statistics {
750 /* host command complete */ 622 /* host command complete */
751 u32 cmd_cmplt; 623 __le32 cmd_cmplt;
752 624
753 /* fiqisr() */ 625 /* fiqisr() */
754 u32 fiqs; 626 __le32 fiqs;
755 627
756 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */ 628 /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
757 u32 rx_headers; 629 __le32 rx_headers;
758 630
759 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */ 631 /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
760 u32 rx_completes; 632 __le32 rx_completes;
761 633
762 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */ 634 /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
763 u32 rx_mem_overflow; 635 __le32 rx_mem_overflow;
764 636
765 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */ 637 /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
766 u32 rx_rdys; 638 __le32 rx_rdys;
767 639
768 /* irqisr() */ 640 /* irqisr() */
769 u32 irqs; 641 __le32 irqs;
770 642
771 /* (INT_STS_ND & INT_TRIG_TX_PROC) */ 643 /* (INT_STS_ND & INT_TRIG_TX_PROC) */
772 u32 tx_procs; 644 __le32 tx_procs;
773 645
774 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */ 646 /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
775 u32 decrypt_done; 647 __le32 decrypt_done;
776 648
777 /* (INT_STS_ND & INT_TRIG_DMA0) */ 649 /* (INT_STS_ND & INT_TRIG_DMA0) */
778 u32 dma0_done; 650 __le32 dma0_done;
779 651
780 /* (INT_STS_ND & INT_TRIG_DMA1) */ 652 /* (INT_STS_ND & INT_TRIG_DMA1) */
781 u32 dma1_done; 653 __le32 dma1_done;
782 654
783 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */ 655 /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
784 u32 tx_exch_complete; 656 __le32 tx_exch_complete;
785 657
786 /* (INT_STS_ND & INT_TRIG_COMMAND) */ 658 /* (INT_STS_ND & INT_TRIG_COMMAND) */
787 u32 commands; 659 __le32 commands;
788 660
789 /* (INT_STS_ND & INT_TRIG_RX_PROC) */ 661 /* (INT_STS_ND & INT_TRIG_RX_PROC) */
790 u32 rx_procs; 662 __le32 rx_procs;
791 663
792 /* (INT_STS_ND & INT_TRIG_PM_802) */ 664 /* (INT_STS_ND & INT_TRIG_PM_802) */
793 u32 hw_pm_mode_changes; 665 __le32 hw_pm_mode_changes;
794 666
795 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */ 667 /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
796 u32 host_acknowledges; 668 __le32 host_acknowledges;
797 669
798 /* (INT_STS_ND & INT_TRIG_PM_PCI) */ 670 /* (INT_STS_ND & INT_TRIG_PM_PCI) */
799 u32 pci_pm; 671 __le32 pci_pm;
800 672
801 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */ 673 /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
802 u32 wakeups; 674 __le32 wakeups;
803 675
804 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ 676 /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
805 u32 low_rssi; 677 __le32 low_rssi;
806} __attribute__ ((packed)); 678} __attribute__ ((packed));
807 679
808struct acx_wep_statistics { 680struct acx_wep_statistics {
809 /* WEP address keys configured */ 681 /* WEP address keys configured */
810 u32 addr_key_count; 682 __le32 addr_key_count;
811 683
812 /* default keys configured */ 684 /* default keys configured */
813 u32 default_key_count; 685 __le32 default_key_count;
814 686
815 u32 reserved; 687 __le32 reserved;
816 688
817 /* number of times that WEP key not found on lookup */ 689 /* number of times that WEP key not found on lookup */
818 u32 key_not_found; 690 __le32 key_not_found;
819 691
820 /* number of times that WEP key decryption failed */ 692 /* number of times that WEP key decryption failed */
821 u32 decrypt_fail; 693 __le32 decrypt_fail;
822 694
823 /* WEP packets decrypted */ 695 /* WEP packets decrypted */
824 u32 packets; 696 __le32 packets;
825 697
826 /* WEP decrypt interrupts */ 698 /* WEP decrypt interrupts */
827 u32 interrupt; 699 __le32 interrupt;
828} __attribute__ ((packed)); 700} __attribute__ ((packed));
829 701
830#define ACX_MISSED_BEACONS_SPREAD 10 702#define ACX_MISSED_BEACONS_SPREAD 10
831 703
832struct acx_pwr_statistics { 704struct acx_pwr_statistics {
833 /* the amount of enters into power save mode (both PD & ELP) */ 705 /* the amount of enters into power save mode (both PD & ELP) */
834 u32 ps_enter; 706 __le32 ps_enter;
835 707
836 /* the amount of enters into ELP mode */ 708 /* the amount of enters into ELP mode */
837 u32 elp_enter; 709 __le32 elp_enter;
838 710
839 /* the amount of missing beacon interrupts to the host */ 711 /* the amount of missing beacon interrupts to the host */
840 u32 missing_bcns; 712 __le32 missing_bcns;
841 713
842 /* the amount of wake on host-access times */ 714 /* the amount of wake on host-access times */
843 u32 wake_on_host; 715 __le32 wake_on_host;
844 716
845 /* the amount of wake on timer-expire */ 717 /* the amount of wake on timer-expire */
846 u32 wake_on_timer_exp; 718 __le32 wake_on_timer_exp;
847 719
848 /* the number of packets that were transmitted with PS bit set */ 720 /* the number of packets that were transmitted with PS bit set */
849 u32 tx_with_ps; 721 __le32 tx_with_ps;
850 722
851 /* the number of packets that were transmitted with PS bit clear */ 723 /* the number of packets that were transmitted with PS bit clear */
852 u32 tx_without_ps; 724 __le32 tx_without_ps;
853 725
854 /* the number of received beacons */ 726 /* the number of received beacons */
855 u32 rcvd_beacons; 727 __le32 rcvd_beacons;
856 728
857 /* the number of entering into PowerOn (power save off) */ 729 /* the number of entering into PowerOn (power save off) */
858 u32 power_save_off; 730 __le32 power_save_off;
859 731
860 /* the number of entries into power save mode */ 732 /* the number of entries into power save mode */
861 u16 enable_ps; 733 __le16 enable_ps;
862 734
863 /* 735 /*
864 * the number of exits from power save, not including failed PS 736 * the number of exits from power save, not including failed PS
865 * transitions 737 * transitions
866 */ 738 */
867 u16 disable_ps; 739 __le16 disable_ps;
868 740
869 /* 741 /*
870 * the number of times the TSF counter was adjusted because 742 * the number of times the TSF counter was adjusted because
871 * of drift 743 * of drift
872 */ 744 */
873 u32 fix_tsf_ps; 745 __le32 fix_tsf_ps;
874 746
875 /* Gives statistics about the spread continuous missed beacons. 747 /* Gives statistics about the spread continuous missed beacons.
876 * The 16 LSB are dedicated for the PS mode. 748 * The 16 LSB are dedicated for the PS mode.
@@ -881,53 +753,53 @@ struct acx_pwr_statistics {
881 * ... 753 * ...
882 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons. 754 * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
883 */ 755 */
884 u32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD]; 756 __le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
885 757
886 /* the number of beacons in awake mode */ 758 /* the number of beacons in awake mode */
887 u32 rcvd_awake_beacons; 759 __le32 rcvd_awake_beacons;
888} __attribute__ ((packed)); 760} __attribute__ ((packed));
889 761
890struct acx_mic_statistics { 762struct acx_mic_statistics {
891 u32 rx_pkts; 763 __le32 rx_pkts;
892 u32 calc_failure; 764 __le32 calc_failure;
893} __attribute__ ((packed)); 765} __attribute__ ((packed));
894 766
895struct acx_aes_statistics { 767struct acx_aes_statistics {
896 u32 encrypt_fail; 768 __le32 encrypt_fail;
897 u32 decrypt_fail; 769 __le32 decrypt_fail;
898 u32 encrypt_packets; 770 __le32 encrypt_packets;
899 u32 decrypt_packets; 771 __le32 decrypt_packets;
900 u32 encrypt_interrupt; 772 __le32 encrypt_interrupt;
901 u32 decrypt_interrupt; 773 __le32 decrypt_interrupt;
902} __attribute__ ((packed)); 774} __attribute__ ((packed));
903 775
904struct acx_event_statistics { 776struct acx_event_statistics {
905 u32 heart_beat; 777 __le32 heart_beat;
906 u32 calibration; 778 __le32 calibration;
907 u32 rx_mismatch; 779 __le32 rx_mismatch;
908 u32 rx_mem_empty; 780 __le32 rx_mem_empty;
909 u32 rx_pool; 781 __le32 rx_pool;
910 u32 oom_late; 782 __le32 oom_late;
911 u32 phy_transmit_error; 783 __le32 phy_transmit_error;
912 u32 tx_stuck; 784 __le32 tx_stuck;
913} __attribute__ ((packed)); 785} __attribute__ ((packed));
914 786
915struct acx_ps_statistics { 787struct acx_ps_statistics {
916 u32 pspoll_timeouts; 788 __le32 pspoll_timeouts;
917 u32 upsd_timeouts; 789 __le32 upsd_timeouts;
918 u32 upsd_max_sptime; 790 __le32 upsd_max_sptime;
919 u32 upsd_max_apturn; 791 __le32 upsd_max_apturn;
920 u32 pspoll_max_apturn; 792 __le32 pspoll_max_apturn;
921 u32 pspoll_utilization; 793 __le32 pspoll_utilization;
922 u32 upsd_utilization; 794 __le32 upsd_utilization;
923} __attribute__ ((packed)); 795} __attribute__ ((packed));
924 796
925struct acx_rxpipe_statistics { 797struct acx_rxpipe_statistics {
926 u32 rx_prep_beacon_drop; 798 __le32 rx_prep_beacon_drop;
927 u32 descr_host_int_trig_rx_data; 799 __le32 descr_host_int_trig_rx_data;
928 u32 beacon_buffer_thres_host_int_trig_rx_data; 800 __le32 beacon_buffer_thres_host_int_trig_rx_data;
929 u32 missed_beacon_host_int_trig_rx_data; 801 __le32 missed_beacon_host_int_trig_rx_data;
930 u32 tx_xfr_host_int_trig_rx_data; 802 __le32 tx_xfr_host_int_trig_rx_data;
931} __attribute__ ((packed)); 803} __attribute__ ((packed));
932 804
933struct acx_statistics { 805struct acx_statistics {
@@ -946,63 +818,34 @@ struct acx_statistics {
946 struct acx_rxpipe_statistics rxpipe; 818 struct acx_rxpipe_statistics rxpipe;
947} __attribute__ ((packed)); 819} __attribute__ ((packed));
948 820
949#define ACX_MAX_RATE_CLASSES 8
950#define ACX_RATE_MASK_UNSPECIFIED 0
951#define ACX_RATE_MASK_ALL 0x1eff
952#define ACX_RATE_RETRY_LIMIT 10
953
954struct acx_rate_class { 821struct acx_rate_class {
955 u32 enabled_rates; 822 __le32 enabled_rates;
956 u8 short_retry_limit; 823 u8 short_retry_limit;
957 u8 long_retry_limit; 824 u8 long_retry_limit;
958 u8 aflags; 825 u8 aflags;
959 u8 reserved; 826 u8 reserved;
960}; 827};
961 828
829#define ACX_TX_BASIC_RATE 0
830#define ACX_TX_AP_FULL_RATE 1
831#define ACX_TX_RATE_POLICY_CNT 2
962struct acx_rate_policy { 832struct acx_rate_policy {
963 struct acx_header header; 833 struct acx_header header;
964 834
965 u32 rate_class_cnt; 835 __le32 rate_class_cnt;
966 struct acx_rate_class rate_class[ACX_MAX_RATE_CLASSES]; 836 struct acx_rate_class rate_class[CONF_TX_MAX_RATE_CLASSES];
967} __attribute__ ((packed)); 837} __attribute__ ((packed));
968 838
969#define WL1271_ACX_AC_COUNT 4
970
971struct acx_ac_cfg { 839struct acx_ac_cfg {
972 struct acx_header header; 840 struct acx_header header;
973 u8 ac; 841 u8 ac;
974 u8 cw_min; 842 u8 cw_min;
975 u16 cw_max; 843 __le16 cw_max;
976 u8 aifsn; 844 u8 aifsn;
977 u8 reserved; 845 u8 reserved;
978 u16 tx_op_limit; 846 __le16 tx_op_limit;
979} __attribute__ ((packed)); 847} __attribute__ ((packed));
980 848
981enum wl1271_acx_ac {
982 WL1271_ACX_AC_BE = 0,
983 WL1271_ACX_AC_BK = 1,
984 WL1271_ACX_AC_VI = 2,
985 WL1271_ACX_AC_VO = 3,
986 WL1271_ACX_AC_CTS2SELF = 4,
987 WL1271_ACX_AC_ANY_TID = 0x1F,
988 WL1271_ACX_AC_INVALID = 0xFF,
989};
990
991enum wl1271_acx_ps_scheme {
992 WL1271_ACX_PS_SCHEME_LEGACY = 0,
993 WL1271_ACX_PS_SCHEME_UPSD_TRIGGER = 1,
994 WL1271_ACX_PS_SCHEME_LEGACY_PSPOLL = 2,
995 WL1271_ACX_PS_SCHEME_SAPSD = 3,
996};
997
998enum wl1271_acx_ack_policy {
999 WL1271_ACX_ACK_POLICY_LEGACY = 0,
1000 WL1271_ACX_ACK_POLICY_NO_ACK = 1,
1001 WL1271_ACX_ACK_POLICY_BLOCK = 2,
1002};
1003
1004#define WL1271_ACX_TID_COUNT 7
1005
1006struct acx_tid_config { 849struct acx_tid_config {
1007 struct acx_header header; 850 struct acx_header header;
1008 u8 queue_id; 851 u8 queue_id;
@@ -1011,26 +854,23 @@ struct acx_tid_config {
1011 u8 ps_scheme; 854 u8 ps_scheme;
1012 u8 ack_policy; 855 u8 ack_policy;
1013 u8 padding[3]; 856 u8 padding[3];
1014 u32 apsd_conf[2]; 857 __le32 apsd_conf[2];
1015} __attribute__ ((packed)); 858} __attribute__ ((packed));
1016 859
1017struct acx_frag_threshold { 860struct acx_frag_threshold {
1018 struct acx_header header; 861 struct acx_header header;
1019 u16 frag_threshold; 862 __le16 frag_threshold;
1020 u8 padding[2]; 863 u8 padding[2];
1021} __attribute__ ((packed)); 864} __attribute__ ((packed));
1022 865
1023#define WL1271_ACX_TX_COMPL_TIMEOUT 5
1024#define WL1271_ACX_TX_COMPL_THRESHOLD 5
1025
1026struct acx_tx_config_options { 866struct acx_tx_config_options {
1027 struct acx_header header; 867 struct acx_header header;
1028 u16 tx_compl_timeout; /* msec */ 868 __le16 tx_compl_timeout; /* msec */
1029 u16 tx_compl_threshold; /* number of packets */ 869 __le16 tx_compl_threshold; /* number of packets */
1030} __attribute__ ((packed)); 870} __attribute__ ((packed));
1031 871
1032#define ACX_RX_MEM_BLOCKS 64 872#define ACX_RX_MEM_BLOCKS 70
1033#define ACX_TX_MIN_MEM_BLOCKS 64 873#define ACX_TX_MIN_MEM_BLOCKS 40
1034#define ACX_TX_DESCRIPTORS 32 874#define ACX_TX_DESCRIPTORS 32
1035#define ACX_NUM_SSID_PROFILES 1 875#define ACX_NUM_SSID_PROFILES 1
1036 876
@@ -1041,79 +881,94 @@ struct wl1271_acx_config_memory {
1041 u8 tx_min_mem_block_num; 881 u8 tx_min_mem_block_num;
1042 u8 num_stations; 882 u8 num_stations;
1043 u8 num_ssid_profiles; 883 u8 num_ssid_profiles;
1044 u32 total_tx_descriptors; 884 __le32 total_tx_descriptors;
1045} __attribute__ ((packed)); 885} __attribute__ ((packed));
1046 886
1047struct wl1271_acx_mem_map { 887struct wl1271_acx_mem_map {
1048 struct acx_header header; 888 struct acx_header header;
1049 889
1050 void *code_start; 890 __le32 code_start;
1051 void *code_end; 891 __le32 code_end;
1052 892
1053 void *wep_defkey_start; 893 __le32 wep_defkey_start;
1054 void *wep_defkey_end; 894 __le32 wep_defkey_end;
1055 895
1056 void *sta_table_start; 896 __le32 sta_table_start;
1057 void *sta_table_end; 897 __le32 sta_table_end;
1058 898
1059 void *packet_template_start; 899 __le32 packet_template_start;
1060 void *packet_template_end; 900 __le32 packet_template_end;
1061 901
1062 /* Address of the TX result interface (control block) */ 902 /* Address of the TX result interface (control block) */
1063 u32 tx_result; 903 __le32 tx_result;
1064 u32 tx_result_queue_start; 904 __le32 tx_result_queue_start;
1065 905
1066 void *queue_memory_start; 906 __le32 queue_memory_start;
1067 void *queue_memory_end; 907 __le32 queue_memory_end;
1068 908
1069 u32 packet_memory_pool_start; 909 __le32 packet_memory_pool_start;
1070 u32 packet_memory_pool_end; 910 __le32 packet_memory_pool_end;
1071 911
1072 void *debug_buffer1_start; 912 __le32 debug_buffer1_start;
1073 void *debug_buffer1_end; 913 __le32 debug_buffer1_end;
1074 914
1075 void *debug_buffer2_start; 915 __le32 debug_buffer2_start;
1076 void *debug_buffer2_end; 916 __le32 debug_buffer2_end;
1077 917
1078 /* Number of blocks FW allocated for TX packets */ 918 /* Number of blocks FW allocated for TX packets */
1079 u32 num_tx_mem_blocks; 919 __le32 num_tx_mem_blocks;
1080 920
1081 /* Number of blocks FW allocated for RX packets */ 921 /* Number of blocks FW allocated for RX packets */
1082 u32 num_rx_mem_blocks; 922 __le32 num_rx_mem_blocks;
1083 923
1084 /* the following 4 fields are valid in SLAVE mode only */ 924 /* the following 4 fields are valid in SLAVE mode only */
1085 u8 *tx_cbuf; 925 u8 *tx_cbuf;
1086 u8 *rx_cbuf; 926 u8 *rx_cbuf;
1087 void *rx_ctrl; 927 __le32 rx_ctrl;
1088 void *tx_ctrl; 928 __le32 tx_ctrl;
1089} __attribute__ ((packed)); 929} __attribute__ ((packed));
1090 930
1091enum wl1271_acx_rx_queue_type {
1092 RX_QUEUE_TYPE_RX_LOW_PRIORITY, /* All except the high priority */
1093 RX_QUEUE_TYPE_RX_HIGH_PRIORITY, /* Management and voice packets */
1094 RX_QUEUE_TYPE_NUM,
1095 RX_QUEUE_TYPE_MAX = USHORT_MAX
1096};
1097
1098#define WL1271_RX_INTR_THRESHOLD_DEF 0 /* no pacing, send interrupt on
1099 * every event */
1100#define WL1271_RX_INTR_THRESHOLD_MIN 0
1101#define WL1271_RX_INTR_THRESHOLD_MAX 15
1102
1103#define WL1271_RX_INTR_TIMEOUT_DEF 5
1104#define WL1271_RX_INTR_TIMEOUT_MIN 1
1105#define WL1271_RX_INTR_TIMEOUT_MAX 100
1106
1107struct wl1271_acx_rx_config_opt { 931struct wl1271_acx_rx_config_opt {
1108 struct acx_header header; 932 struct acx_header header;
1109 933
1110 u16 mblk_threshold; 934 __le16 mblk_threshold;
1111 u16 threshold; 935 __le16 threshold;
1112 u16 timeout; 936 __le16 timeout;
1113 u8 queue_type; 937 u8 queue_type;
1114 u8 reserved; 938 u8 reserved;
1115} __attribute__ ((packed)); 939} __attribute__ ((packed));
1116 940
941
942struct wl1271_acx_bet_enable {
943 struct acx_header header;
944
945 u8 enable;
946 u8 max_consecutive;
947 u8 padding[2];
948} __attribute__ ((packed));
949
950#define ACX_IPV4_VERSION 4
951#define ACX_IPV6_VERSION 6
952#define ACX_IPV4_ADDR_SIZE 4
953struct wl1271_acx_arp_filter {
954 struct acx_header header;
955 u8 version; /* ACX_IPV4_VERSION, ACX_IPV6_VERSION */
956 u8 enable; /* 1 to enable ARP filtering, 0 to disable */
957 u8 padding[2];
958 u8 address[16]; /* The configured device IP address - all ARP
959 requests directed to this IP address will pass
960 through. For IPv4, the first four bytes are
961 used. */
962} __attribute__((packed));
963
964struct wl1271_acx_pm_config {
965 struct acx_header header;
966
967 __le32 host_clk_settling_time;
968 u8 host_fast_wakeup_support;
969 u8 padding[3];
970} __attribute__ ((packed));
971
1117enum { 972enum {
1118 ACX_WAKE_UP_CONDITIONS = 0x0002, 973 ACX_WAKE_UP_CONDITIONS = 0x0002,
1119 ACX_MEM_CFG = 0x0003, 974 ACX_MEM_CFG = 0x0003,
@@ -1170,11 +1025,14 @@ enum {
1170 ACX_PEER_HT_CAP = 0x0057, 1025 ACX_PEER_HT_CAP = 0x0057,
1171 ACX_HT_BSS_OPERATION = 0x0058, 1026 ACX_HT_BSS_OPERATION = 0x0058,
1172 ACX_COEX_ACTIVITY = 0x0059, 1027 ACX_COEX_ACTIVITY = 0x0059,
1028 ACX_SET_SMART_REFLEX_DEBUG = 0x005A,
1029 ACX_SET_DCO_ITRIM_PARAMS = 0x0061,
1173 DOT11_RX_MSDU_LIFE_TIME = 0x1004, 1030 DOT11_RX_MSDU_LIFE_TIME = 0x1004,
1174 DOT11_CUR_TX_PWR = 0x100D, 1031 DOT11_CUR_TX_PWR = 0x100D,
1175 DOT11_RX_DOT11_MODE = 0x1012, 1032 DOT11_RX_DOT11_MODE = 0x1012,
1176 DOT11_RTS_THRESHOLD = 0x1013, 1033 DOT11_RTS_THRESHOLD = 0x1013,
1177 DOT11_GROUP_ADDRESS_TBL = 0x1014, 1034 DOT11_GROUP_ADDRESS_TBL = 0x1014,
1035 ACX_PM_CONFIG = 0x1016,
1178 1036
1179 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL, 1037 MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
1180 1038
@@ -1182,23 +1040,25 @@ enum {
1182}; 1040};
1183 1041
1184 1042
1185int wl1271_acx_wake_up_conditions(struct wl1271 *wl, u8 wake_up_event, 1043int wl1271_acx_wake_up_conditions(struct wl1271 *wl);
1186 u8 listen_interval);
1187int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth); 1044int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth);
1188int wl1271_acx_fw_version(struct wl1271 *wl, char *buf, size_t len); 1045int wl1271_acx_fw_version(struct wl1271 *wl, char *buf, size_t len);
1189int wl1271_acx_tx_power(struct wl1271 *wl, int power); 1046int wl1271_acx_tx_power(struct wl1271 *wl, int power);
1190int wl1271_acx_feature_cfg(struct wl1271 *wl); 1047int wl1271_acx_feature_cfg(struct wl1271 *wl);
1191int wl1271_acx_mem_map(struct wl1271 *wl, 1048int wl1271_acx_mem_map(struct wl1271 *wl,
1192 struct acx_header *mem_map, size_t len); 1049 struct acx_header *mem_map, size_t len);
1193int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl, u32 life_time); 1050int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl);
1194int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter); 1051int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter);
1195int wl1271_acx_pd_threshold(struct wl1271 *wl); 1052int wl1271_acx_pd_threshold(struct wl1271 *wl);
1196int wl1271_acx_slot(struct wl1271 *wl, enum acx_slot_type slot_time); 1053int wl1271_acx_slot(struct wl1271 *wl, enum acx_slot_type slot_time);
1197int wl1271_acx_group_address_tbl(struct wl1271 *wl); 1054int wl1271_acx_group_address_tbl(struct wl1271 *wl, bool enable,
1055 void *mc_list, u32 mc_list_len);
1198int wl1271_acx_service_period_timeout(struct wl1271 *wl); 1056int wl1271_acx_service_period_timeout(struct wl1271 *wl);
1199int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold); 1057int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold);
1200int wl1271_acx_beacon_filter_opt(struct wl1271 *wl); 1058int wl1271_acx_dco_itrim_params(struct wl1271 *wl);
1059int wl1271_acx_beacon_filter_opt(struct wl1271 *wl, bool enable_filter);
1201int wl1271_acx_beacon_filter_table(struct wl1271 *wl); 1060int wl1271_acx_beacon_filter_table(struct wl1271 *wl);
1061int wl1271_acx_conn_monit_params(struct wl1271 *wl);
1202int wl1271_acx_sg_enable(struct wl1271 *wl); 1062int wl1271_acx_sg_enable(struct wl1271 *wl);
1203int wl1271_acx_sg_cfg(struct wl1271 *wl); 1063int wl1271_acx_sg_cfg(struct wl1271 *wl);
1204int wl1271_acx_cca_threshold(struct wl1271 *wl); 1064int wl1271_acx_cca_threshold(struct wl1271 *wl);
@@ -1207,15 +1067,23 @@ int wl1271_acx_aid(struct wl1271 *wl, u16 aid);
1207int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask); 1067int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask);
1208int wl1271_acx_set_preamble(struct wl1271 *wl, enum acx_preamble_type preamble); 1068int wl1271_acx_set_preamble(struct wl1271 *wl, enum acx_preamble_type preamble);
1209int wl1271_acx_cts_protect(struct wl1271 *wl, 1069int wl1271_acx_cts_protect(struct wl1271 *wl,
1210 enum acx_ctsprotect_type ctsprotect); 1070 enum acx_ctsprotect_type ctsprotect);
1211int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats); 1071int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats);
1212int wl1271_acx_rate_policies(struct wl1271 *wl); 1072int wl1271_acx_rate_policies(struct wl1271 *wl);
1213int wl1271_acx_ac_cfg(struct wl1271 *wl); 1073int wl1271_acx_ac_cfg(struct wl1271 *wl, u8 ac, u8 cw_min, u16 cw_max,
1214int wl1271_acx_tid_cfg(struct wl1271 *wl); 1074 u8 aifsn, u16 txop);
1075int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type,
1076 u8 tsid, u8 ps_scheme, u8 ack_policy,
1077 u32 apsd_conf0, u32 apsd_conf1);
1215int wl1271_acx_frag_threshold(struct wl1271 *wl); 1078int wl1271_acx_frag_threshold(struct wl1271 *wl);
1216int wl1271_acx_tx_config_options(struct wl1271 *wl); 1079int wl1271_acx_tx_config_options(struct wl1271 *wl);
1217int wl1271_acx_mem_cfg(struct wl1271 *wl); 1080int wl1271_acx_mem_cfg(struct wl1271 *wl);
1218int wl1271_acx_init_mem_config(struct wl1271 *wl); 1081int wl1271_acx_init_mem_config(struct wl1271 *wl);
1219int wl1271_acx_init_rx_interrupt(struct wl1271 *wl); 1082int wl1271_acx_init_rx_interrupt(struct wl1271 *wl);
1083int wl1271_acx_smart_reflex(struct wl1271 *wl);
1084int wl1271_acx_bet_enable(struct wl1271 *wl, bool enable);
1085int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, u8 *address,
1086 u8 version);
1087int wl1271_acx_pm_config(struct wl1271 *wl);
1220 1088
1221#endif /* __WL1271_ACX_H__ */ 1089#endif /* __WL1271_ACX_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1271_boot.c b/drivers/net/wireless/wl12xx/wl1271_boot.c
index 8228ef474a7e..024356263065 100644
--- a/drivers/net/wireless/wl12xx/wl1271_boot.c
+++ b/drivers/net/wireless/wl12xx/wl1271_boot.c
@@ -22,11 +22,13 @@
22 */ 22 */
23 23
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/slab.h>
25 26
26#include "wl1271_acx.h" 27#include "wl1271_acx.h"
27#include "wl1271_reg.h" 28#include "wl1271_reg.h"
28#include "wl1271_boot.h" 29#include "wl1271_boot.h"
29#include "wl1271_spi.h" 30#include "wl1271_spi.h"
31#include "wl1271_io.h"
30#include "wl1271_event.h" 32#include "wl1271_event.h"
31 33
32static struct wl1271_partition_set part_table[PART_TABLE_LEN] = { 34static struct wl1271_partition_set part_table[PART_TABLE_LEN] = {
@@ -39,6 +41,14 @@ static struct wl1271_partition_set part_table[PART_TABLE_LEN] = {
39 .start = REGISTERS_BASE, 41 .start = REGISTERS_BASE,
40 .size = 0x00008800 42 .size = 0x00008800
41 }, 43 },
44 .mem2 = {
45 .start = 0x00000000,
46 .size = 0x00000000
47 },
48 .mem3 = {
49 .start = 0x00000000,
50 .size = 0x00000000
51 },
42 }, 52 },
43 53
44 [PART_WORK] = { 54 [PART_WORK] = {
@@ -48,7 +58,15 @@ static struct wl1271_partition_set part_table[PART_TABLE_LEN] = {
48 }, 58 },
49 .reg = { 59 .reg = {
50 .start = REGISTERS_BASE, 60 .start = REGISTERS_BASE,
51 .size = 0x0000b000 61 .size = 0x0000a000
62 },
63 .mem2 = {
64 .start = 0x003004f8,
65 .size = 0x00000004
66 },
67 .mem3 = {
68 .start = 0x00040404,
69 .size = 0x00000000
52 }, 70 },
53 }, 71 },
54 72
@@ -60,6 +78,14 @@ static struct wl1271_partition_set part_table[PART_TABLE_LEN] = {
60 .reg = { 78 .reg = {
61 .start = DRPW_BASE, 79 .start = DRPW_BASE,
62 .size = 0x00006000 80 .size = 0x00006000
81 },
82 .mem2 = {
83 .start = 0x00000000,
84 .size = 0x00000000
85 },
86 .mem3 = {
87 .start = 0x00000000,
88 .size = 0x00000000
63 } 89 }
64 } 90 }
65}; 91};
@@ -69,19 +95,19 @@ static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
69 u32 cpu_ctrl; 95 u32 cpu_ctrl;
70 96
71 /* 10.5.0 run the firmware (I) */ 97 /* 10.5.0 run the firmware (I) */
72 cpu_ctrl = wl1271_reg_read32(wl, ACX_REG_ECPU_CONTROL); 98 cpu_ctrl = wl1271_read32(wl, ACX_REG_ECPU_CONTROL);
73 99
74 /* 10.5.1 run the firmware (II) */ 100 /* 10.5.1 run the firmware (II) */
75 cpu_ctrl |= flag; 101 cpu_ctrl |= flag;
76 wl1271_reg_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl); 102 wl1271_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);
77} 103}
78 104
79static void wl1271_boot_fw_version(struct wl1271 *wl) 105static void wl1271_boot_fw_version(struct wl1271 *wl)
80{ 106{
81 struct wl1271_static_data static_data; 107 struct wl1271_static_data static_data;
82 108
83 wl1271_spi_mem_read(wl, wl->cmd_box_addr, 109 wl1271_read(wl, wl->cmd_box_addr, &static_data, sizeof(static_data),
84 &static_data, sizeof(static_data)); 110 false);
85 111
86 strncpy(wl->chip.fw_ver, static_data.fw_version, 112 strncpy(wl->chip.fw_ver, static_data.fw_version,
87 sizeof(wl->chip.fw_ver)); 113 sizeof(wl->chip.fw_ver));
@@ -93,8 +119,9 @@ static void wl1271_boot_fw_version(struct wl1271 *wl)
93static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf, 119static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
94 size_t fw_data_len, u32 dest) 120 size_t fw_data_len, u32 dest)
95{ 121{
122 struct wl1271_partition_set partition;
96 int addr, chunk_num, partition_limit; 123 int addr, chunk_num, partition_limit;
97 u8 *p; 124 u8 *p, *chunk;
98 125
99 /* whal_FwCtrl_LoadFwImageSm() */ 126 /* whal_FwCtrl_LoadFwImageSm() */
100 127
@@ -103,16 +130,20 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
103 wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d", 130 wl1271_debug(DEBUG_BOOT, "fw_data_len %zd chunk_size %d",
104 fw_data_len, CHUNK_SIZE); 131 fw_data_len, CHUNK_SIZE);
105 132
106
107 if ((fw_data_len % 4) != 0) { 133 if ((fw_data_len % 4) != 0) {
108 wl1271_error("firmware length not multiple of four"); 134 wl1271_error("firmware length not multiple of four");
109 return -EIO; 135 return -EIO;
110 } 136 }
111 137
112 wl1271_set_partition(wl, dest, 138 chunk = kmalloc(CHUNK_SIZE, GFP_KERNEL);
113 part_table[PART_DOWN].mem.size, 139 if (!chunk) {
114 part_table[PART_DOWN].reg.start, 140 wl1271_error("allocation for firmware upload chunk failed");
115 part_table[PART_DOWN].reg.size); 141 return -ENOMEM;
142 }
143
144 memcpy(&partition, &part_table[PART_DOWN], sizeof(partition));
145 partition.mem.start = dest;
146 wl1271_set_partition(wl, &partition);
116 147
117 /* 10.1 set partition limit and chunk num */ 148 /* 10.1 set partition limit and chunk num */
118 chunk_num = 0; 149 chunk_num = 0;
@@ -125,21 +156,17 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
125 addr = dest + chunk_num * CHUNK_SIZE; 156 addr = dest + chunk_num * CHUNK_SIZE;
126 partition_limit = chunk_num * CHUNK_SIZE + 157 partition_limit = chunk_num * CHUNK_SIZE +
127 part_table[PART_DOWN].mem.size; 158 part_table[PART_DOWN].mem.size;
128 159 partition.mem.start = addr;
129 /* FIXME: Over 80 chars! */ 160 wl1271_set_partition(wl, &partition);
130 wl1271_set_partition(wl,
131 addr,
132 part_table[PART_DOWN].mem.size,
133 part_table[PART_DOWN].reg.start,
134 part_table[PART_DOWN].reg.size);
135 } 161 }
136 162
137 /* 10.3 upload the chunk */ 163 /* 10.3 upload the chunk */
138 addr = dest + chunk_num * CHUNK_SIZE; 164 addr = dest + chunk_num * CHUNK_SIZE;
139 p = buf + chunk_num * CHUNK_SIZE; 165 p = buf + chunk_num * CHUNK_SIZE;
166 memcpy(chunk, p, CHUNK_SIZE);
140 wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x", 167 wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
141 p, addr); 168 p, addr);
142 wl1271_spi_mem_write(wl, addr, p, CHUNK_SIZE); 169 wl1271_write(wl, addr, chunk, CHUNK_SIZE, false);
143 170
144 chunk_num++; 171 chunk_num++;
145 } 172 }
@@ -147,28 +174,31 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
147 /* 10.4 upload the last chunk */ 174 /* 10.4 upload the last chunk */
148 addr = dest + chunk_num * CHUNK_SIZE; 175 addr = dest + chunk_num * CHUNK_SIZE;
149 p = buf + chunk_num * CHUNK_SIZE; 176 p = buf + chunk_num * CHUNK_SIZE;
177 memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
150 wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x", 178 wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
151 fw_data_len % CHUNK_SIZE, p, addr); 179 fw_data_len % CHUNK_SIZE, p, addr);
152 wl1271_spi_mem_write(wl, addr, p, fw_data_len % CHUNK_SIZE); 180 wl1271_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
153 181
182 kfree(chunk);
154 return 0; 183 return 0;
155} 184}
156 185
157static int wl1271_boot_upload_firmware(struct wl1271 *wl) 186static int wl1271_boot_upload_firmware(struct wl1271 *wl)
158{ 187{
159 u32 chunks, addr, len; 188 u32 chunks, addr, len;
189 int ret = 0;
160 u8 *fw; 190 u8 *fw;
161 191
162 fw = wl->fw; 192 fw = wl->fw;
163 chunks = be32_to_cpup((u32 *) fw); 193 chunks = be32_to_cpup((__be32 *) fw);
164 fw += sizeof(u32); 194 fw += sizeof(u32);
165 195
166 wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks); 196 wl1271_debug(DEBUG_BOOT, "firmware chunks to be uploaded: %u", chunks);
167 197
168 while (chunks--) { 198 while (chunks--) {
169 addr = be32_to_cpup((u32 *) fw); 199 addr = be32_to_cpup((__be32 *) fw);
170 fw += sizeof(u32); 200 fw += sizeof(u32);
171 len = be32_to_cpup((u32 *) fw); 201 len = be32_to_cpup((__be32 *) fw);
172 fw += sizeof(u32); 202 fw += sizeof(u32);
173 203
174 if (len > 300000) { 204 if (len > 300000) {
@@ -177,11 +207,13 @@ static int wl1271_boot_upload_firmware(struct wl1271 *wl)
177 } 207 }
178 wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u", 208 wl1271_debug(DEBUG_BOOT, "chunk %d addr 0x%x len %u",
179 chunks, addr, len); 209 chunks, addr, len);
180 wl1271_boot_upload_firmware_chunk(wl, fw, len, addr); 210 ret = wl1271_boot_upload_firmware_chunk(wl, fw, len, addr);
211 if (ret != 0)
212 break;
181 fw += len; 213 fw += len;
182 } 214 }
183 215
184 return 0; 216 return ret;
185} 217}
186 218
187static int wl1271_boot_upload_nvs(struct wl1271 *wl) 219static int wl1271_boot_upload_nvs(struct wl1271 *wl)
@@ -189,23 +221,14 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
189 size_t nvs_len, burst_len; 221 size_t nvs_len, burst_len;
190 int i; 222 int i;
191 u32 dest_addr, val; 223 u32 dest_addr, val;
192 u8 *nvs_ptr, *nvs, *nvs_aligned; 224 u8 *nvs_ptr, *nvs_aligned;
193 225
194 nvs = wl->nvs; 226 if (wl->nvs == NULL)
195 if (nvs == NULL)
196 return -ENODEV; 227 return -ENODEV;
197 228
198 nvs_ptr = nvs; 229 /* only the first part of the NVS needs to be uploaded */
199 230 nvs_len = sizeof(wl->nvs->nvs);
200 nvs_len = wl->nvs_len; 231 nvs_ptr = (u8 *)wl->nvs->nvs;
201
202 /* Update the device MAC address into the nvs */
203 nvs[11] = wl->mac_addr[0];
204 nvs[10] = wl->mac_addr[1];
205 nvs[6] = wl->mac_addr[2];
206 nvs[5] = wl->mac_addr[3];
207 nvs[4] = wl->mac_addr[4];
208 nvs[3] = wl->mac_addr[5];
209 232
210 /* 233 /*
211 * Layout before the actual NVS tables: 234 * Layout before the actual NVS tables:
@@ -235,7 +258,7 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
235 wl1271_debug(DEBUG_BOOT, 258 wl1271_debug(DEBUG_BOOT,
236 "nvs burst write 0x%x: 0x%x", 259 "nvs burst write 0x%x: 0x%x",
237 dest_addr, val); 260 dest_addr, val);
238 wl1271_reg_write32(wl, dest_addr, val); 261 wl1271_write32(wl, dest_addr, val);
239 262
240 nvs_ptr += 4; 263 nvs_ptr += 4;
241 dest_addr += 4; 264 dest_addr += 4;
@@ -247,26 +270,29 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
247 * is 7 bytes further. 270 * is 7 bytes further.
248 */ 271 */
249 nvs_ptr += 7; 272 nvs_ptr += 7;
250 nvs_len -= nvs_ptr - nvs; 273 nvs_len -= nvs_ptr - (u8 *)wl->nvs->nvs;
251 nvs_len = ALIGN(nvs_len, 4); 274 nvs_len = ALIGN(nvs_len, 4);
252 275
253 /* FIXME: The driver sets the partition here, but this is not needed, 276 /* FIXME: The driver sets the partition here, but this is not needed,
254 since it sets to the same one as currently in use */ 277 since it sets to the same one as currently in use */
255 /* Now we must set the partition correctly */ 278 /* Now we must set the partition correctly */
256 wl1271_set_partition(wl, 279 wl1271_set_partition(wl, &part_table[PART_WORK]);
257 part_table[PART_WORK].mem.start,
258 part_table[PART_WORK].mem.size,
259 part_table[PART_WORK].reg.start,
260 part_table[PART_WORK].reg.size);
261 280
262 /* Copy the NVS tables to a new block to ensure alignment */ 281 /* Copy the NVS tables to a new block to ensure alignment */
263 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL); 282 /* FIXME: We jump 3 more bytes before uploading the NVS. It seems
283 that our NVS files have three extra zeros here. I'm not sure whether
284 the problem is in our NVS generation or we should really jumpt these
285 3 bytes here */
286 nvs_ptr += 3;
287
288 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL); if
289 (!nvs_aligned) return -ENOMEM;
264 290
265 /* And finally we upload the NVS tables */ 291 /* And finally we upload the NVS tables */
266 /* FIXME: In wl1271, we upload everything at once. 292 /* FIXME: In wl1271, we upload everything at once.
267 No endianness handling needed here?! The ref driver doesn't do 293 No endianness handling needed here?! The ref driver doesn't do
268 anything about it at this point */ 294 anything about it at this point */
269 wl1271_spi_mem_write(wl, CMD_MBOX_ADDRESS, nvs_aligned, nvs_len); 295 wl1271_write(wl, CMD_MBOX_ADDRESS, nvs_aligned, nvs_len, false);
270 296
271 kfree(nvs_aligned); 297 kfree(nvs_aligned);
272 return 0; 298 return 0;
@@ -275,9 +301,9 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
275static void wl1271_boot_enable_interrupts(struct wl1271 *wl) 301static void wl1271_boot_enable_interrupts(struct wl1271 *wl)
276{ 302{
277 enable_irq(wl->irq); 303 enable_irq(wl->irq);
278 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_MASK, 304 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,
279 WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK)); 305 WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK));
280 wl1271_reg_write32(wl, HI_CFG, HI_CFG_DEF_VAL); 306 wl1271_write32(wl, HI_CFG, HI_CFG_DEF_VAL);
281} 307}
282 308
283static int wl1271_boot_soft_reset(struct wl1271 *wl) 309static int wl1271_boot_soft_reset(struct wl1271 *wl)
@@ -286,12 +312,12 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
286 u32 boot_data; 312 u32 boot_data;
287 313
288 /* perform soft reset */ 314 /* perform soft reset */
289 wl1271_reg_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT); 315 wl1271_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
290 316
291 /* SOFT_RESET is self clearing */ 317 /* SOFT_RESET is self clearing */
292 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME); 318 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);
293 while (1) { 319 while (1) {
294 boot_data = wl1271_reg_read32(wl, ACX_REG_SLV_SOFT_RESET); 320 boot_data = wl1271_read32(wl, ACX_REG_SLV_SOFT_RESET);
295 wl1271_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data); 321 wl1271_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);
296 if ((boot_data & ACX_SLV_SOFT_RESET_BIT) == 0) 322 if ((boot_data & ACX_SLV_SOFT_RESET_BIT) == 0)
297 break; 323 break;
@@ -307,10 +333,10 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
307 } 333 }
308 334
309 /* disable Rx/Tx */ 335 /* disable Rx/Tx */
310 wl1271_reg_write32(wl, ENABLE, 0x0); 336 wl1271_write32(wl, ENABLE, 0x0);
311 337
312 /* disable auto calibration on start*/ 338 /* disable auto calibration on start*/
313 wl1271_reg_write32(wl, SPARE_A2, 0xffff); 339 wl1271_write32(wl, SPARE_A2, 0xffff);
314 340
315 return 0; 341 return 0;
316} 342}
@@ -322,7 +348,7 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
322 348
323 wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT); 349 wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
324 350
325 chip_id = wl1271_reg_read32(wl, CHIP_ID_B); 351 chip_id = wl1271_read32(wl, CHIP_ID_B);
326 352
327 wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id); 353 wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
328 354
@@ -335,7 +361,7 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
335 loop = 0; 361 loop = 0;
336 while (loop++ < INIT_LOOP) { 362 while (loop++ < INIT_LOOP) {
337 udelay(INIT_LOOP_DELAY); 363 udelay(INIT_LOOP_DELAY);
338 interrupt = wl1271_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR); 364 interrupt = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
339 365
340 if (interrupt == 0xffffffff) { 366 if (interrupt == 0xffffffff) {
341 wl1271_error("error reading hardware complete " 367 wl1271_error("error reading hardware complete "
@@ -344,30 +370,26 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
344 } 370 }
345 /* check that ACX_INTR_INIT_COMPLETE is enabled */ 371 /* check that ACX_INTR_INIT_COMPLETE is enabled */
346 else if (interrupt & WL1271_ACX_INTR_INIT_COMPLETE) { 372 else if (interrupt & WL1271_ACX_INTR_INIT_COMPLETE) {
347 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_ACK, 373 wl1271_write32(wl, ACX_REG_INTERRUPT_ACK,
348 WL1271_ACX_INTR_INIT_COMPLETE); 374 WL1271_ACX_INTR_INIT_COMPLETE);
349 break; 375 break;
350 } 376 }
351 } 377 }
352 378
353 if (loop >= INIT_LOOP) { 379 if (loop > INIT_LOOP) {
354 wl1271_error("timeout waiting for the hardware to " 380 wl1271_error("timeout waiting for the hardware to "
355 "complete initialization"); 381 "complete initialization");
356 return -EIO; 382 return -EIO;
357 } 383 }
358 384
359 /* get hardware config command mail box */ 385 /* get hardware config command mail box */
360 wl->cmd_box_addr = wl1271_reg_read32(wl, REG_COMMAND_MAILBOX_PTR); 386 wl->cmd_box_addr = wl1271_read32(wl, REG_COMMAND_MAILBOX_PTR);
361 387
362 /* get hardware config event mail box */ 388 /* get hardware config event mail box */
363 wl->event_box_addr = wl1271_reg_read32(wl, REG_EVENT_MAILBOX_PTR); 389 wl->event_box_addr = wl1271_read32(wl, REG_EVENT_MAILBOX_PTR);
364 390
365 /* set the working partition to its "running" mode offset */ 391 /* set the working partition to its "running" mode offset */
366 wl1271_set_partition(wl, 392 wl1271_set_partition(wl, &part_table[PART_WORK]);
367 part_table[PART_WORK].mem.start,
368 part_table[PART_WORK].mem.size,
369 part_table[PART_WORK].reg.start,
370 part_table[PART_WORK].reg.size);
371 393
372 wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x", 394 wl1271_debug(DEBUG_MAILBOX, "cmd_box_addr 0x%x event_box_addr 0x%x",
373 wl->cmd_box_addr, wl->event_box_addr); 395 wl->cmd_box_addr, wl->event_box_addr);
@@ -379,11 +401,10 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
379 * ready to receive event from the command mailbox 401 * ready to receive event from the command mailbox
380 */ 402 */
381 403
382 /* enable gpio interrupts */ 404 /* unmask required mbox events */
383 wl1271_boot_enable_interrupts(wl); 405 wl->event_mask = BSS_LOSE_EVENT_ID |
384 406 SCAN_COMPLETE_EVENT_ID |
385 /* unmask all mbox events */ 407 PS_REPORT_EVENT_ID;
386 wl->event_mask = 0xffffffff;
387 408
388 ret = wl1271_event_unmask(wl); 409 ret = wl1271_event_unmask(wl);
389 if (ret < 0) { 410 if (ret < 0) {
@@ -399,34 +420,13 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
399 420
400static int wl1271_boot_write_irq_polarity(struct wl1271 *wl) 421static int wl1271_boot_write_irq_polarity(struct wl1271 *wl)
401{ 422{
402 u32 polarity, status, i; 423 u32 polarity;
403
404 wl1271_reg_write32(wl, OCP_POR_CTR, OCP_REG_POLARITY);
405 wl1271_reg_write32(wl, OCP_CMD, OCP_CMD_READ);
406
407 /* Wait until the command is complete (ie. bit 18 is set) */
408 for (i = 0; i < OCP_CMD_LOOP; i++) {
409 polarity = wl1271_reg_read32(wl, OCP_DATA_READ);
410 if (polarity & OCP_READY_MASK)
411 break;
412 }
413 if (i == OCP_CMD_LOOP) {
414 wl1271_error("OCP command timeout!");
415 return -EIO;
416 }
417 424
418 status = polarity & OCP_STATUS_MASK; 425 polarity = wl1271_top_reg_read(wl, OCP_REG_POLARITY);
419 if (status != OCP_STATUS_OK) {
420 wl1271_error("OCP command failed (%d)", status);
421 return -EIO;
422 }
423 426
424 /* We use HIGH polarity, so unset the LOW bit */ 427 /* We use HIGH polarity, so unset the LOW bit */
425 polarity &= ~POLARITY_LOW; 428 polarity &= ~POLARITY_LOW;
426 429 wl1271_top_reg_write(wl, OCP_REG_POLARITY, polarity);
427 wl1271_reg_write32(wl, OCP_POR_CTR, OCP_REG_POLARITY);
428 wl1271_reg_write32(wl, OCP_DATA_WRITE, polarity);
429 wl1271_reg_write32(wl, OCP_CMD, OCP_CMD_WRITE);
430 430
431 return 0; 431 return 0;
432} 432}
@@ -436,16 +436,32 @@ int wl1271_boot(struct wl1271 *wl)
436 int ret = 0; 436 int ret = 0;
437 u32 tmp, clk, pause; 437 u32 tmp, clk, pause;
438 438
439 if (REF_CLOCK == 0 || REF_CLOCK == 2) 439 if (REF_CLOCK == 0 || REF_CLOCK == 2 || REF_CLOCK == 4)
440 /* ref clk: 19.2/38.4 */ 440 /* ref clk: 19.2/38.4/38.4-XTAL */
441 clk = 0x3; 441 clk = 0x3;
442 else if (REF_CLOCK == 1 || REF_CLOCK == 3) 442 else if (REF_CLOCK == 1 || REF_CLOCK == 3)
443 /* ref clk: 26/52 */ 443 /* ref clk: 26/52 */
444 clk = 0x5; 444 clk = 0x5;
445 445
446 wl1271_reg_write32(wl, PLL_PARAMETERS, clk); 446 if (REF_CLOCK != 0) {
447 u16 val;
448 /* Set clock type */
449 val = wl1271_top_reg_read(wl, OCP_REG_CLK_TYPE);
450 val &= FREF_CLK_TYPE_BITS;
451 val |= CLK_REQ_PRCM;
452 wl1271_top_reg_write(wl, OCP_REG_CLK_TYPE, val);
453 } else {
454 u16 val;
455 /* Set clock polarity */
456 val = wl1271_top_reg_read(wl, OCP_REG_CLK_POLARITY);
457 val &= FREF_CLK_POLARITY_BITS;
458 val |= CLK_REQ_OUTN_SEL;
459 wl1271_top_reg_write(wl, OCP_REG_CLK_POLARITY, val);
460 }
461
462 wl1271_write32(wl, PLL_PARAMETERS, clk);
447 463
448 pause = wl1271_reg_read32(wl, PLL_PARAMETERS); 464 pause = wl1271_read32(wl, PLL_PARAMETERS);
449 465
450 wl1271_debug(DEBUG_BOOT, "pause1 0x%x", pause); 466 wl1271_debug(DEBUG_BOOT, "pause1 0x%x", pause);
451 467
@@ -454,39 +470,31 @@ int wl1271_boot(struct wl1271 *wl)
454 * 0x3ff (magic number ). How does 470 * 0x3ff (magic number ). How does
455 * this work?! */ 471 * this work?! */
456 pause |= WU_COUNTER_PAUSE_VAL; 472 pause |= WU_COUNTER_PAUSE_VAL;
457 wl1271_reg_write32(wl, WU_COUNTER_PAUSE, pause); 473 wl1271_write32(wl, WU_COUNTER_PAUSE, pause);
458 474
459 /* Continue the ELP wake up sequence */ 475 /* Continue the ELP wake up sequence */
460 wl1271_reg_write32(wl, WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); 476 wl1271_write32(wl, WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);
461 udelay(500); 477 udelay(500);
462 478
463 wl1271_set_partition(wl, 479 wl1271_set_partition(wl, &part_table[PART_DRPW]);
464 part_table[PART_DRPW].mem.start,
465 part_table[PART_DRPW].mem.size,
466 part_table[PART_DRPW].reg.start,
467 part_table[PART_DRPW].reg.size);
468 480
469 /* Read-modify-write DRPW_SCRATCH_START register (see next state) 481 /* Read-modify-write DRPW_SCRATCH_START register (see next state)
470 to be used by DRPw FW. The RTRIM value will be added by the FW 482 to be used by DRPw FW. The RTRIM value will be added by the FW
471 before taking DRPw out of reset */ 483 before taking DRPw out of reset */
472 484
473 wl1271_debug(DEBUG_BOOT, "DRPW_SCRATCH_START %08x", DRPW_SCRATCH_START); 485 wl1271_debug(DEBUG_BOOT, "DRPW_SCRATCH_START %08x", DRPW_SCRATCH_START);
474 clk = wl1271_reg_read32(wl, DRPW_SCRATCH_START); 486 clk = wl1271_read32(wl, DRPW_SCRATCH_START);
475 487
476 wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk); 488 wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);
477 489
478 /* 2 */ 490 /* 2 */
479 clk |= (REF_CLOCK << 1) << 4; 491 clk |= (REF_CLOCK << 1) << 4;
480 wl1271_reg_write32(wl, DRPW_SCRATCH_START, clk); 492 wl1271_write32(wl, DRPW_SCRATCH_START, clk);
481 493
482 wl1271_set_partition(wl, 494 wl1271_set_partition(wl, &part_table[PART_WORK]);
483 part_table[PART_WORK].mem.start,
484 part_table[PART_WORK].mem.size,
485 part_table[PART_WORK].reg.start,
486 part_table[PART_WORK].reg.size);
487 495
488 /* Disable interrupts */ 496 /* Disable interrupts */
489 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); 497 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);
490 498
491 ret = wl1271_boot_soft_reset(wl); 499 ret = wl1271_boot_soft_reset(wl);
492 if (ret < 0) 500 if (ret < 0)
@@ -501,22 +509,22 @@ int wl1271_boot(struct wl1271 *wl)
501 * ACX_EEPROMLESS_IND_REG */ 509 * ACX_EEPROMLESS_IND_REG */
502 wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG"); 510 wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG");
503 511
504 wl1271_reg_write32(wl, ACX_EEPROMLESS_IND_REG, ACX_EEPROMLESS_IND_REG); 512 wl1271_write32(wl, ACX_EEPROMLESS_IND_REG, ACX_EEPROMLESS_IND_REG);
505 513
506 tmp = wl1271_reg_read32(wl, CHIP_ID_B); 514 tmp = wl1271_read32(wl, CHIP_ID_B);
507 515
508 wl1271_debug(DEBUG_BOOT, "chip id 0x%x", tmp); 516 wl1271_debug(DEBUG_BOOT, "chip id 0x%x", tmp);
509 517
510 /* 6. read the EEPROM parameters */ 518 /* 6. read the EEPROM parameters */
511 tmp = wl1271_reg_read32(wl, SCR_PAD2); 519 tmp = wl1271_read32(wl, SCR_PAD2);
512 520
513 ret = wl1271_boot_write_irq_polarity(wl); 521 ret = wl1271_boot_write_irq_polarity(wl);
514 if (ret < 0) 522 if (ret < 0)
515 goto out; 523 goto out;
516 524
517 /* FIXME: Need to check whether this is really what we want */ 525 /* FIXME: Need to check whether this is really what we want */
518 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_MASK, 526 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,
519 WL1271_ACX_ALL_EVENTS_VECTOR); 527 WL1271_ACX_ALL_EVENTS_VECTOR);
520 528
521 /* WL1271: The reference driver skips steps 7 to 10 (jumps directly 529 /* WL1271: The reference driver skips steps 7 to 10 (jumps directly
522 * to upload_fw) */ 530 * to upload_fw) */
@@ -530,6 +538,9 @@ int wl1271_boot(struct wl1271 *wl)
530 if (ret < 0) 538 if (ret < 0)
531 goto out; 539 goto out;
532 540
541 /* Enable firmware interrupts now */
542 wl1271_boot_enable_interrupts(wl);
543
533 /* set the wl1271 default filters */ 544 /* set the wl1271 default filters */
534 wl->rx_config = WL1271_DEFAULT_RX_CONFIG; 545 wl->rx_config = WL1271_DEFAULT_RX_CONFIG;
535 wl->rx_filter = WL1271_DEFAULT_RX_FILTER; 546 wl->rx_filter = WL1271_DEFAULT_RX_FILTER;
diff --git a/drivers/net/wireless/wl12xx/wl1271_boot.h b/drivers/net/wireless/wl12xx/wl1271_boot.h
index b0d8fb46a439..412443ee655a 100644
--- a/drivers/net/wireless/wl12xx/wl1271_boot.h
+++ b/drivers/net/wireless/wl12xx/wl1271_boot.h
@@ -50,23 +50,17 @@ struct wl1271_static_data {
50#define WU_COUNTER_PAUSE_VAL 0x3FF 50#define WU_COUNTER_PAUSE_VAL 0x3FF
51#define WELP_ARM_COMMAND_VAL 0x4 51#define WELP_ARM_COMMAND_VAL 0x4
52 52
53#define OCP_CMD_LOOP 32 53#define OCP_REG_POLARITY 0x0064
54 54#define OCP_REG_CLK_TYPE 0x0448
55#define OCP_CMD_WRITE 0x1 55#define OCP_REG_CLK_POLARITY 0x0cb2
56#define OCP_CMD_READ 0x2
57
58#define OCP_READY_MASK BIT(18)
59#define OCP_STATUS_MASK (BIT(16) | BIT(17))
60
61#define OCP_STATUS_NO_RESP 0x00000
62#define OCP_STATUS_OK 0x10000
63#define OCP_STATUS_REQ_FAILED 0x20000
64#define OCP_STATUS_RESP_ERROR 0x30000
65
66#define OCP_REG_POLARITY 0x30032
67 56
68#define CMD_MBOX_ADDRESS 0x407B4 57#define CMD_MBOX_ADDRESS 0x407B4
69 58
70#define POLARITY_LOW BIT(1) 59#define POLARITY_LOW BIT(1)
71 60
61#define FREF_CLK_TYPE_BITS 0xfffffe7f
62#define CLK_REQ_PRCM 0x100
63#define FREF_CLK_POLARITY_BITS 0xfffff8ff
64#define CLK_REQ_OUTN_SEL 0x700
65
72#endif 66#endif
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.c b/drivers/net/wireless/wl12xx/wl1271_cmd.c
index 2a4351ff54dc..e7832f3318eb 100644
--- a/drivers/net/wireless/wl12xx/wl1271_cmd.c
+++ b/drivers/net/wireless/wl12xx/wl1271_cmd.c
@@ -26,10 +26,12 @@
26#include <linux/crc7.h> 26#include <linux/crc7.h>
27#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
28#include <linux/etherdevice.h> 28#include <linux/etherdevice.h>
29#include <linux/slab.h>
29 30
30#include "wl1271.h" 31#include "wl1271.h"
31#include "wl1271_reg.h" 32#include "wl1271_reg.h"
32#include "wl1271_spi.h" 33#include "wl1271_spi.h"
34#include "wl1271_io.h"
33#include "wl1271_acx.h" 35#include "wl1271_acx.h"
34#include "wl12xx_80211.h" 36#include "wl12xx_80211.h"
35#include "wl1271_cmd.h" 37#include "wl1271_cmd.h"
@@ -42,26 +44,28 @@
42 * @buf: buffer containing the command, must work with dma 44 * @buf: buffer containing the command, must work with dma
43 * @len: length of the buffer 45 * @len: length of the buffer
44 */ 46 */
45int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len) 47int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
48 size_t res_len)
46{ 49{
47 struct wl1271_cmd_header *cmd; 50 struct wl1271_cmd_header *cmd;
48 unsigned long timeout; 51 unsigned long timeout;
49 u32 intr; 52 u32 intr;
50 int ret = 0; 53 int ret = 0;
54 u16 status;
51 55
52 cmd = buf; 56 cmd = buf;
53 cmd->id = id; 57 cmd->id = cpu_to_le16(id);
54 cmd->status = 0; 58 cmd->status = 0;
55 59
56 WARN_ON(len % 4 != 0); 60 WARN_ON(len % 4 != 0);
57 61
58 wl1271_spi_mem_write(wl, wl->cmd_box_addr, buf, len); 62 wl1271_write(wl, wl->cmd_box_addr, buf, len, false);
59 63
60 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_CMD); 64 wl1271_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_CMD);
61 65
62 timeout = jiffies + msecs_to_jiffies(WL1271_COMMAND_TIMEOUT); 66 timeout = jiffies + msecs_to_jiffies(WL1271_COMMAND_TIMEOUT);
63 67
64 intr = wl1271_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR); 68 intr = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
65 while (!(intr & WL1271_ACX_INTR_CMD_COMPLETE)) { 69 while (!(intr & WL1271_ACX_INTR_CMD_COMPLETE)) {
66 if (time_after(jiffies, timeout)) { 70 if (time_after(jiffies, timeout)) {
67 wl1271_error("command complete timeout"); 71 wl1271_error("command complete timeout");
@@ -71,17 +75,28 @@ int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len)
71 75
72 msleep(1); 76 msleep(1);
73 77
74 intr = wl1271_reg_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR); 78 intr = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
75 } 79 }
76 80
77 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_ACK, 81 /* read back the status code of the command */
78 WL1271_ACX_INTR_CMD_COMPLETE); 82 if (res_len == 0)
83 res_len = sizeof(struct wl1271_cmd_header);
84 wl1271_read(wl, wl->cmd_box_addr, cmd, res_len, false);
85
86 status = le16_to_cpu(cmd->status);
87 if (status != CMD_STATUS_SUCCESS) {
88 wl1271_error("command execute failure %d", status);
89 ret = -EIO;
90 }
91
92 wl1271_write32(wl, ACX_REG_INTERRUPT_ACK,
93 WL1271_ACX_INTR_CMD_COMPLETE);
79 94
80out: 95out:
81 return ret; 96 return ret;
82} 97}
83 98
84int wl1271_cmd_cal_channel_tune(struct wl1271 *wl) 99static int wl1271_cmd_cal_channel_tune(struct wl1271 *wl)
85{ 100{
86 struct wl1271_cmd_cal_channel_tune *cmd; 101 struct wl1271_cmd_cal_channel_tune *cmd;
87 int ret = 0; 102 int ret = 0;
@@ -104,7 +119,7 @@ int wl1271_cmd_cal_channel_tune(struct wl1271 *wl)
104 return ret; 119 return ret;
105} 120}
106 121
107int wl1271_cmd_cal_update_ref_point(struct wl1271 *wl) 122static int wl1271_cmd_cal_update_ref_point(struct wl1271 *wl)
108{ 123{
109 struct wl1271_cmd_cal_update_ref_point *cmd; 124 struct wl1271_cmd_cal_update_ref_point *cmd;
110 int ret = 0; 125 int ret = 0;
@@ -129,7 +144,7 @@ int wl1271_cmd_cal_update_ref_point(struct wl1271 *wl)
129 return ret; 144 return ret;
130} 145}
131 146
132int wl1271_cmd_cal_p2g(struct wl1271 *wl) 147static int wl1271_cmd_cal_p2g(struct wl1271 *wl)
133{ 148{
134 struct wl1271_cmd_cal_p2g *cmd; 149 struct wl1271_cmd_cal_p2g *cmd;
135 int ret = 0; 150 int ret = 0;
@@ -150,7 +165,7 @@ int wl1271_cmd_cal_p2g(struct wl1271 *wl)
150 return ret; 165 return ret;
151} 166}
152 167
153int wl1271_cmd_cal(struct wl1271 *wl) 168static int wl1271_cmd_cal(struct wl1271 *wl)
154{ 169{
155 /* 170 /*
156 * FIXME: we must make sure that we're not sleeping when calibration 171 * FIXME: we must make sure that we're not sleeping when calibration
@@ -175,11 +190,68 @@ int wl1271_cmd_cal(struct wl1271 *wl)
175 return ret; 190 return ret;
176} 191}
177 192
178int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type, u8 dtim_interval, 193int wl1271_cmd_general_parms(struct wl1271 *wl)
179 u16 beacon_interval, u8 wait) 194{
195 struct wl1271_general_parms_cmd *gen_parms;
196 int ret;
197
198 if (!wl->nvs)
199 return -ENODEV;
200
201 gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);
202 if (!gen_parms)
203 return -ENOMEM;
204
205 gen_parms->test.id = TEST_CMD_INI_FILE_GENERAL_PARAM;
206
207 memcpy(gen_parms->params, wl->nvs->general_params,
208 WL1271_NVS_GENERAL_PARAMS_SIZE);
209
210 ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), 0);
211 if (ret < 0)
212 wl1271_warning("CMD_INI_FILE_GENERAL_PARAM failed");
213
214 kfree(gen_parms);
215 return ret;
216}
217
218int wl1271_cmd_radio_parms(struct wl1271 *wl)
219{
220 struct wl1271_radio_parms_cmd *radio_parms;
221 struct conf_radio_parms *rparam = &wl->conf.init.radioparam;
222 int ret;
223
224 if (!wl->nvs)
225 return -ENODEV;
226
227 radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);
228 if (!radio_parms)
229 return -ENOMEM;
230
231 radio_parms->test.id = TEST_CMD_INI_FILE_RADIO_PARAM;
232
233 memcpy(radio_parms->stat_radio_params, wl->nvs->stat_radio_params,
234 WL1271_NVS_STAT_RADIO_PARAMS_SIZE);
235 memcpy(radio_parms->dyn_radio_params,
236 wl->nvs->dyn_radio_params[rparam->fem],
237 WL1271_NVS_DYN_RADIO_PARAMS_SIZE);
238
239 /* FIXME: current NVS is missing 5GHz parameters */
240
241 wl1271_dump(DEBUG_CMD, "TEST_CMD_INI_FILE_RADIO_PARAM: ",
242 radio_parms, sizeof(*radio_parms));
243
244 ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);
245 if (ret < 0)
246 wl1271_warning("CMD_INI_FILE_RADIO_PARAM failed");
247
248 kfree(radio_parms);
249 return ret;
250}
251
252int wl1271_cmd_join(struct wl1271 *wl)
180{ 253{
181 static bool do_cal = true; 254 static bool do_cal = true;
182 unsigned long timeout;
183 struct wl1271_cmd_join *join; 255 struct wl1271_cmd_join *join;
184 int ret, i; 256 int ret, i;
185 u8 *bssid; 257 u8 *bssid;
@@ -193,7 +265,6 @@ int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type, u8 dtim_interval,
193 do_cal = false; 265 do_cal = false;
194 } 266 }
195 267
196
197 join = kzalloc(sizeof(*join), GFP_KERNEL); 268 join = kzalloc(sizeof(*join), GFP_KERNEL);
198 if (!join) { 269 if (!join) {
199 ret = -ENOMEM; 270 ret = -ENOMEM;
@@ -207,15 +278,34 @@ int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type, u8 dtim_interval,
207 for (i = 0; i < ETH_ALEN; i++) 278 for (i = 0; i < ETH_ALEN; i++)
208 bssid[i] = wl->bssid[ETH_ALEN - i - 1]; 279 bssid[i] = wl->bssid[ETH_ALEN - i - 1];
209 280
210 join->rx_config_options = wl->rx_config; 281 join->rx_config_options = cpu_to_le32(wl->rx_config);
211 join->rx_filter_options = wl->rx_filter; 282 join->rx_filter_options = cpu_to_le32(wl->rx_filter);
283 join->bss_type = wl->bss_type;
284
285 /*
286 * FIXME: disable temporarily all filters because after commit
287 * 9cef8737 "mac80211: fix managed mode BSSID handling" broke
288 * association. The filter logic needs to be implemented properly
289 * and once that is done, this hack can be removed.
290 */
291 join->rx_config_options = cpu_to_le32(0);
292 join->rx_filter_options = cpu_to_le32(WL1271_DEFAULT_RX_FILTER);
293
294 if (wl->band == IEEE80211_BAND_2GHZ)
295 join->basic_rate_set = cpu_to_le32(CONF_HW_BIT_RATE_1MBPS |
296 CONF_HW_BIT_RATE_2MBPS |
297 CONF_HW_BIT_RATE_5_5MBPS |
298 CONF_HW_BIT_RATE_11MBPS);
299 else {
300 join->bss_type |= WL1271_JOIN_CMD_BSS_TYPE_5GHZ;
301 join->basic_rate_set = cpu_to_le32(CONF_HW_BIT_RATE_6MBPS |
302 CONF_HW_BIT_RATE_12MBPS |
303 CONF_HW_BIT_RATE_24MBPS);
304 }
212 305
213 join->basic_rate_set = RATE_MASK_1MBPS | RATE_MASK_2MBPS | 306 join->beacon_interval = cpu_to_le16(WL1271_DEFAULT_BEACON_INT);
214 RATE_MASK_5_5MBPS | RATE_MASK_11MBPS; 307 join->dtim_interval = WL1271_DEFAULT_DTIM_PERIOD;
215 308
216 join->beacon_interval = beacon_interval;
217 join->dtim_interval = dtim_interval;
218 join->bss_type = bss_type;
219 join->channel = wl->channel; 309 join->channel = wl->channel;
220 join->ssid_len = wl->ssid_len; 310 join->ssid_len = wl->ssid_len;
221 memcpy(join->ssid, wl->ssid, wl->ssid_len); 311 memcpy(join->ssid, wl->ssid, wl->ssid_len);
@@ -228,21 +318,22 @@ int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type, u8 dtim_interval,
228 318
229 join->ctrl |= wl->session_counter << WL1271_JOIN_CMD_TX_SESSION_OFFSET; 319 join->ctrl |= wl->session_counter << WL1271_JOIN_CMD_TX_SESSION_OFFSET;
230 320
321 /* reset TX security counters */
322 wl->tx_security_last_seq = 0;
323 wl->tx_security_seq_16 = 0;
324 wl->tx_security_seq_32 = 0;
231 325
232 ret = wl1271_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join)); 326 ret = wl1271_cmd_send(wl, CMD_START_JOIN, join, sizeof(*join), 0);
233 if (ret < 0) { 327 if (ret < 0) {
234 wl1271_error("failed to initiate cmd join"); 328 wl1271_error("failed to initiate cmd join");
235 goto out_free; 329 goto out_free;
236 } 330 }
237 331
238 timeout = msecs_to_jiffies(JOIN_TIMEOUT);
239
240 /* 332 /*
241 * ugly hack: we should wait for JOIN_EVENT_COMPLETE_ID but to 333 * ugly hack: we should wait for JOIN_EVENT_COMPLETE_ID but to
242 * simplify locking we just sleep instead, for now 334 * simplify locking we just sleep instead, for now
243 */ 335 */
244 if (wait) 336 msleep(10);
245 msleep(10);
246 337
247out_free: 338out_free:
248 kfree(join); 339 kfree(join);
@@ -262,34 +353,21 @@ out:
262int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer) 353int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer)
263{ 354{
264 int ret; 355 int ret;
356 size_t res_len = 0;
265 357
266 wl1271_debug(DEBUG_CMD, "cmd test"); 358 wl1271_debug(DEBUG_CMD, "cmd test");
267 359
268 ret = wl1271_cmd_send(wl, CMD_TEST, buf, buf_len); 360 if (answer)
361 res_len = buf_len;
362
363 ret = wl1271_cmd_send(wl, CMD_TEST, buf, buf_len, res_len);
269 364
270 if (ret < 0) { 365 if (ret < 0) {
271 wl1271_warning("TEST command failed"); 366 wl1271_warning("TEST command failed");
272 return ret; 367 return ret;
273 } 368 }
274 369
275 if (answer) { 370 return ret;
276 struct wl1271_command *cmd_answer;
277
278 /*
279 * The test command got in, we can read the answer.
280 * The answer would be a wl1271_command, where the
281 * parameter array contains the actual answer.
282 */
283 wl1271_spi_mem_read(wl, wl->cmd_box_addr, buf, buf_len);
284
285 cmd_answer = buf;
286
287 if (cmd_answer->header.status != CMD_STATUS_SUCCESS)
288 wl1271_error("TEST command answer error: %d",
289 cmd_answer->header.status);
290 }
291
292 return 0;
293} 371}
294 372
295/** 373/**
@@ -307,26 +385,15 @@ int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t len)
307 385
308 wl1271_debug(DEBUG_CMD, "cmd interrogate"); 386 wl1271_debug(DEBUG_CMD, "cmd interrogate");
309 387
310 acx->id = id; 388 acx->id = cpu_to_le16(id);
311 389
312 /* payload length, does not include any headers */ 390 /* payload length, does not include any headers */
313 acx->len = len - sizeof(*acx); 391 acx->len = cpu_to_le16(len - sizeof(*acx));
314 392
315 ret = wl1271_cmd_send(wl, CMD_INTERROGATE, acx, sizeof(*acx)); 393 ret = wl1271_cmd_send(wl, CMD_INTERROGATE, acx, sizeof(*acx), len);
316 if (ret < 0) { 394 if (ret < 0)
317 wl1271_error("INTERROGATE command failed"); 395 wl1271_error("INTERROGATE command failed");
318 goto out;
319 }
320
321 /* the interrogate command got in, we can read the answer */
322 wl1271_spi_mem_read(wl, wl->cmd_box_addr, buf, len);
323
324 acx = buf;
325 if (acx->cmd.status != CMD_STATUS_SUCCESS)
326 wl1271_error("INTERROGATE command error: %d",
327 acx->cmd.status);
328 396
329out:
330 return ret; 397 return ret;
331} 398}
332 399
@@ -345,12 +412,12 @@ int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len)
345 412
346 wl1271_debug(DEBUG_CMD, "cmd configure"); 413 wl1271_debug(DEBUG_CMD, "cmd configure");
347 414
348 acx->id = id; 415 acx->id = cpu_to_le16(id);
349 416
350 /* payload length, does not include any headers */ 417 /* payload length, does not include any headers */
351 acx->len = len - sizeof(*acx); 418 acx->len = cpu_to_le16(len - sizeof(*acx));
352 419
353 ret = wl1271_cmd_send(wl, CMD_CONFIGURE, acx, len); 420 ret = wl1271_cmd_send(wl, CMD_CONFIGURE, acx, len, 0);
354 if (ret < 0) { 421 if (ret < 0) {
355 wl1271_warning("CONFIGURE command NOK"); 422 wl1271_warning("CONFIGURE command NOK");
356 return ret; 423 return ret;
@@ -359,7 +426,7 @@ int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len)
359 return 0; 426 return 0;
360} 427}
361 428
362int wl1271_cmd_data_path(struct wl1271 *wl, u8 channel, bool enable) 429int wl1271_cmd_data_path(struct wl1271 *wl, bool enable)
363{ 430{
364 struct cmd_enabledisable_path *cmd; 431 struct cmd_enabledisable_path *cmd;
365 int ret; 432 int ret;
@@ -373,7 +440,8 @@ int wl1271_cmd_data_path(struct wl1271 *wl, u8 channel, bool enable)
373 goto out; 440 goto out;
374 } 441 }
375 442
376 cmd->channel = channel; 443 /* the channel here is only used for calibration, so hardcoded to 1 */
444 cmd->channel = 1;
377 445
378 if (enable) { 446 if (enable) {
379 cmd_rx = CMD_ENABLE_RX; 447 cmd_rx = CMD_ENABLE_RX;
@@ -383,39 +451,38 @@ int wl1271_cmd_data_path(struct wl1271 *wl, u8 channel, bool enable)
383 cmd_tx = CMD_DISABLE_TX; 451 cmd_tx = CMD_DISABLE_TX;
384 } 452 }
385 453
386 ret = wl1271_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd)); 454 ret = wl1271_cmd_send(wl, cmd_rx, cmd, sizeof(*cmd), 0);
387 if (ret < 0) { 455 if (ret < 0) {
388 wl1271_error("rx %s cmd for channel %d failed", 456 wl1271_error("rx %s cmd for channel %d failed",
389 enable ? "start" : "stop", channel); 457 enable ? "start" : "stop", cmd->channel);
390 goto out; 458 goto out;
391 } 459 }
392 460
393 wl1271_debug(DEBUG_BOOT, "rx %s cmd channel %d", 461 wl1271_debug(DEBUG_BOOT, "rx %s cmd channel %d",
394 enable ? "start" : "stop", channel); 462 enable ? "start" : "stop", cmd->channel);
395 463
396 ret = wl1271_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd)); 464 ret = wl1271_cmd_send(wl, cmd_tx, cmd, sizeof(*cmd), 0);
397 if (ret < 0) { 465 if (ret < 0) {
398 wl1271_error("tx %s cmd for channel %d failed", 466 wl1271_error("tx %s cmd for channel %d failed",
399 enable ? "start" : "stop", channel); 467 enable ? "start" : "stop", cmd->channel);
400 return ret; 468 return ret;
401 } 469 }
402 470
403 wl1271_debug(DEBUG_BOOT, "tx %s cmd channel %d", 471 wl1271_debug(DEBUG_BOOT, "tx %s cmd channel %d",
404 enable ? "start" : "stop", channel); 472 enable ? "start" : "stop", cmd->channel);
405 473
406out: 474out:
407 kfree(cmd); 475 kfree(cmd);
408 return ret; 476 return ret;
409} 477}
410 478
411int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode) 479int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, bool send)
412{ 480{
413 struct wl1271_cmd_ps_params *ps_params = NULL; 481 struct wl1271_cmd_ps_params *ps_params = NULL;
414 int ret = 0; 482 int ret = 0;
415 483
416 /* FIXME: this should be in ps.c */ 484 /* FIXME: this should be in ps.c */
417 ret = wl1271_acx_wake_up_conditions(wl, WAKE_UP_EVENT_DTIM_BITMAP, 485 ret = wl1271_acx_wake_up_conditions(wl);
418 wl->listen_int);
419 if (ret < 0) { 486 if (ret < 0) {
420 wl1271_error("couldn't set wake up conditions"); 487 wl1271_error("couldn't set wake up conditions");
421 goto out; 488 goto out;
@@ -430,13 +497,13 @@ int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode)
430 } 497 }
431 498
432 ps_params->ps_mode = ps_mode; 499 ps_params->ps_mode = ps_mode;
433 ps_params->send_null_data = 1; 500 ps_params->send_null_data = send;
434 ps_params->retries = 5; 501 ps_params->retries = 5;
435 ps_params->hang_over_period = 128; 502 ps_params->hang_over_period = 128;
436 ps_params->null_data_rate = 1; /* 1 Mbps */ 503 ps_params->null_data_rate = cpu_to_le32(1); /* 1 Mbps */
437 504
438 ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params, 505 ret = wl1271_cmd_send(wl, CMD_SET_PS_MODE, ps_params,
439 sizeof(*ps_params)); 506 sizeof(*ps_params), 0);
440 if (ret < 0) { 507 if (ret < 0) {
441 wl1271_error("cmd set_ps_mode failed"); 508 wl1271_error("cmd set_ps_mode failed");
442 goto out; 509 goto out;
@@ -464,22 +531,17 @@ int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer,
464 WARN_ON(len > MAX_READ_SIZE); 531 WARN_ON(len > MAX_READ_SIZE);
465 len = min_t(size_t, len, MAX_READ_SIZE); 532 len = min_t(size_t, len, MAX_READ_SIZE);
466 533
467 cmd->addr = addr; 534 cmd->addr = cpu_to_le32(addr);
468 cmd->size = len; 535 cmd->size = cpu_to_le32(len);
469 536
470 ret = wl1271_cmd_send(wl, CMD_READ_MEMORY, cmd, sizeof(*cmd)); 537 ret = wl1271_cmd_send(wl, CMD_READ_MEMORY, cmd, sizeof(*cmd),
538 sizeof(*cmd));
471 if (ret < 0) { 539 if (ret < 0) {
472 wl1271_error("read memory command failed: %d", ret); 540 wl1271_error("read memory command failed: %d", ret);
473 goto out; 541 goto out;
474 } 542 }
475 543
476 /* the read command got in, we can now read the answer */ 544 /* the read command got in */
477 wl1271_spi_mem_read(wl, wl->cmd_box_addr, cmd, sizeof(*cmd));
478
479 if (cmd->header.status != CMD_STATUS_SUCCESS)
480 wl1271_error("error in read command result: %d",
481 cmd->header.status);
482
483 memcpy(answer, cmd->value, len); 545 memcpy(answer, cmd->value, len);
484 546
485out: 547out:
@@ -488,16 +550,33 @@ out:
488} 550}
489 551
490int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len, 552int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
491 u8 active_scan, u8 high_prio, u8 num_channels, 553 u8 active_scan, u8 high_prio, u8 band,
492 u8 probe_requests) 554 u8 probe_requests)
493{ 555{
494 556
495 struct wl1271_cmd_trigger_scan_to *trigger = NULL; 557 struct wl1271_cmd_trigger_scan_to *trigger = NULL;
496 struct wl1271_cmd_scan *params = NULL; 558 struct wl1271_cmd_scan *params = NULL;
497 int i, ret; 559 struct ieee80211_channel *channels;
560 int i, j, n_ch, ret;
498 u16 scan_options = 0; 561 u16 scan_options = 0;
562 u8 ieee_band;
563
564 if (band == WL1271_SCAN_BAND_2_4_GHZ)
565 ieee_band = IEEE80211_BAND_2GHZ;
566 else if (band == WL1271_SCAN_BAND_DUAL && wl1271_11a_enabled())
567 ieee_band = IEEE80211_BAND_2GHZ;
568 else if (band == WL1271_SCAN_BAND_5_GHZ && wl1271_11a_enabled())
569 ieee_band = IEEE80211_BAND_5GHZ;
570 else
571 return -EINVAL;
572
573 if (wl->hw->wiphy->bands[ieee_band]->channels == NULL)
574 return -EINVAL;
499 575
500 if (wl->scanning) 576 channels = wl->hw->wiphy->bands[ieee_band]->channels;
577 n_ch = wl->hw->wiphy->bands[ieee_band]->n_channels;
578
579 if (test_bit(WL1271_FLAG_SCANNING, &wl->flags))
501 return -EINVAL; 580 return -EINVAL;
502 581
503 params = kzalloc(sizeof(*params), GFP_KERNEL); 582 params = kzalloc(sizeof(*params), GFP_KERNEL);
@@ -512,32 +591,43 @@ int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
512 scan_options |= WL1271_SCAN_OPT_PASSIVE; 591 scan_options |= WL1271_SCAN_OPT_PASSIVE;
513 if (high_prio) 592 if (high_prio)
514 scan_options |= WL1271_SCAN_OPT_PRIORITY_HIGH; 593 scan_options |= WL1271_SCAN_OPT_PRIORITY_HIGH;
515 params->params.scan_options = scan_options; 594 params->params.scan_options = cpu_to_le16(scan_options);
516 595
517 params->params.num_channels = num_channels;
518 params->params.num_probe_requests = probe_requests; 596 params->params.num_probe_requests = probe_requests;
519 params->params.tx_rate = cpu_to_le32(RATE_MASK_2MBPS); 597 /* Let the fw autodetect suitable tx_rate for probes */
598 params->params.tx_rate = 0;
520 params->params.tid_trigger = 0; 599 params->params.tid_trigger = 0;
521 params->params.scan_tag = WL1271_SCAN_DEFAULT_TAG; 600 params->params.scan_tag = WL1271_SCAN_DEFAULT_TAG;
522 601
523 for (i = 0; i < num_channels; i++) { 602 if (band == WL1271_SCAN_BAND_DUAL)
524 params->channels[i].min_duration = 603 params->params.band = WL1271_SCAN_BAND_2_4_GHZ;
525 cpu_to_le32(WL1271_SCAN_CHAN_MIN_DURATION); 604 else
526 params->channels[i].max_duration = 605 params->params.band = band;
527 cpu_to_le32(WL1271_SCAN_CHAN_MAX_DURATION); 606
528 memset(&params->channels[i].bssid_lsb, 0xff, 4); 607 for (i = 0, j = 0; i < n_ch && i < WL1271_SCAN_MAX_CHANNELS; i++) {
529 memset(&params->channels[i].bssid_msb, 0xff, 2); 608 if (!(channels[i].flags & IEEE80211_CHAN_DISABLED)) {
530 params->channels[i].early_termination = 0; 609 params->channels[j].min_duration =
531 params->channels[i].tx_power_att = WL1271_SCAN_CURRENT_TX_PWR; 610 cpu_to_le32(WL1271_SCAN_CHAN_MIN_DURATION);
532 params->channels[i].channel = i + 1; 611 params->channels[j].max_duration =
612 cpu_to_le32(WL1271_SCAN_CHAN_MAX_DURATION);
613 memset(&params->channels[j].bssid_lsb, 0xff, 4);
614 memset(&params->channels[j].bssid_msb, 0xff, 2);
615 params->channels[j].early_termination = 0;
616 params->channels[j].tx_power_att =
617 WL1271_SCAN_CURRENT_TX_PWR;
618 params->channels[j].channel = channels[i].hw_value;
619 j++;
620 }
533 } 621 }
534 622
623 params->params.num_channels = j;
624
535 if (len && ssid) { 625 if (len && ssid) {
536 params->params.ssid_len = len; 626 params->params.ssid_len = len;
537 memcpy(params->params.ssid, ssid, len); 627 memcpy(params->params.ssid, ssid, len);
538 } 628 }
539 629
540 ret = wl1271_cmd_build_probe_req(wl, ssid, len); 630 ret = wl1271_cmd_build_probe_req(wl, ssid, len, ieee_band);
541 if (ret < 0) { 631 if (ret < 0) {
542 wl1271_error("PROBE request template failed"); 632 wl1271_error("PROBE request template failed");
543 goto out; 633 goto out;
@@ -553,7 +643,7 @@ int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
553 trigger->timeout = 0; 643 trigger->timeout = 0;
554 644
555 ret = wl1271_cmd_send(wl, CMD_TRIGGER_SCAN_TO, trigger, 645 ret = wl1271_cmd_send(wl, CMD_TRIGGER_SCAN_TO, trigger,
556 sizeof(*trigger)); 646 sizeof(*trigger), 0);
557 if (ret < 0) { 647 if (ret < 0) {
558 wl1271_error("trigger scan to failed for hw scan"); 648 wl1271_error("trigger scan to failed for hw scan");
559 goto out; 649 goto out;
@@ -561,21 +651,25 @@ int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
561 651
562 wl1271_dump(DEBUG_SCAN, "SCAN: ", params, sizeof(*params)); 652 wl1271_dump(DEBUG_SCAN, "SCAN: ", params, sizeof(*params));
563 653
564 wl->scanning = true; 654 set_bit(WL1271_FLAG_SCANNING, &wl->flags);
655 if (wl1271_11a_enabled()) {
656 wl->scan.state = band;
657 if (band == WL1271_SCAN_BAND_DUAL) {
658 wl->scan.active = active_scan;
659 wl->scan.high_prio = high_prio;
660 wl->scan.probe_requests = probe_requests;
661 if (len && ssid) {
662 wl->scan.ssid_len = len;
663 memcpy(wl->scan.ssid, ssid, len);
664 } else
665 wl->scan.ssid_len = 0;
666 }
667 }
565 668
566 ret = wl1271_cmd_send(wl, CMD_SCAN, params, sizeof(*params)); 669 ret = wl1271_cmd_send(wl, CMD_SCAN, params, sizeof(*params), 0);
567 if (ret < 0) { 670 if (ret < 0) {
568 wl1271_error("SCAN failed"); 671 wl1271_error("SCAN failed");
569 goto out; 672 clear_bit(WL1271_FLAG_SCANNING, &wl->flags);
570 }
571
572 wl1271_spi_mem_read(wl, wl->cmd_box_addr, params, sizeof(*params));
573
574 if (params->header.status != CMD_STATUS_SUCCESS) {
575 wl1271_error("Scan command error: %d",
576 params->header.status);
577 wl->scanning = false;
578 ret = -EIO;
579 goto out; 673 goto out;
580 } 674 }
581 675
@@ -603,14 +697,14 @@ int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id,
603 697
604 cmd->len = cpu_to_le16(buf_len); 698 cmd->len = cpu_to_le16(buf_len);
605 cmd->template_type = template_id; 699 cmd->template_type = template_id;
606 cmd->enabled_rates = ACX_RATE_MASK_UNSPECIFIED; 700 cmd->enabled_rates = cpu_to_le32(wl->conf.tx.rc_conf.enabled_rates);
607 cmd->short_retry_limit = ACX_RATE_RETRY_LIMIT; 701 cmd->short_retry_limit = wl->conf.tx.rc_conf.short_retry_limit;
608 cmd->long_retry_limit = ACX_RATE_RETRY_LIMIT; 702 cmd->long_retry_limit = wl->conf.tx.rc_conf.long_retry_limit;
609 703
610 if (buf) 704 if (buf)
611 memcpy(cmd->template_data, buf, buf_len); 705 memcpy(cmd->template_data, buf, buf_len);
612 706
613 ret = wl1271_cmd_send(wl, CMD_SET_TEMPLATE, cmd, sizeof(*cmd)); 707 ret = wl1271_cmd_send(wl, CMD_SET_TEMPLATE, cmd, sizeof(*cmd), 0);
614 if (ret < 0) { 708 if (ret < 0) {
615 wl1271_warning("cmd set_template failed: %d", ret); 709 wl1271_warning("cmd set_template failed: %d", ret);
616 goto out_free; 710 goto out_free;
@@ -623,30 +717,62 @@ out:
623 return ret; 717 return ret;
624} 718}
625 719
626static int wl1271_build_basic_rates(char *rates) 720static int wl1271_build_basic_rates(u8 *rates, u8 band)
627{ 721{
628 u8 index = 0; 722 u8 index = 0;
629 723
630 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB; 724 if (band == IEEE80211_BAND_2GHZ) {
631 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB; 725 rates[index++] =
632 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB; 726 IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_1MB;
633 rates[index++] = IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB; 727 rates[index++] =
728 IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_2MB;
729 rates[index++] =
730 IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_5MB;
731 rates[index++] =
732 IEEE80211_BASIC_RATE_MASK | IEEE80211_CCK_RATE_11MB;
733 } else if (band == IEEE80211_BAND_5GHZ) {
734 rates[index++] =
735 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_6MB;
736 rates[index++] =
737 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_12MB;
738 rates[index++] =
739 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
740 } else {
741 wl1271_error("build_basic_rates invalid band: %d", band);
742 }
634 743
635 return index; 744 return index;
636} 745}
637 746
638static int wl1271_build_extended_rates(char *rates) 747static int wl1271_build_extended_rates(u8 *rates, u8 band)
639{ 748{
640 u8 index = 0; 749 u8 index = 0;
641 750
642 rates[index++] = IEEE80211_OFDM_RATE_6MB; 751 if (band == IEEE80211_BAND_2GHZ) {
643 rates[index++] = IEEE80211_OFDM_RATE_9MB; 752 rates[index++] = IEEE80211_OFDM_RATE_6MB;
644 rates[index++] = IEEE80211_OFDM_RATE_12MB; 753 rates[index++] = IEEE80211_OFDM_RATE_9MB;
645 rates[index++] = IEEE80211_OFDM_RATE_18MB; 754 rates[index++] = IEEE80211_OFDM_RATE_12MB;
646 rates[index++] = IEEE80211_OFDM_RATE_24MB; 755 rates[index++] = IEEE80211_OFDM_RATE_18MB;
647 rates[index++] = IEEE80211_OFDM_RATE_36MB; 756 rates[index++] = IEEE80211_OFDM_RATE_24MB;
648 rates[index++] = IEEE80211_OFDM_RATE_48MB; 757 rates[index++] = IEEE80211_OFDM_RATE_36MB;
649 rates[index++] = IEEE80211_OFDM_RATE_54MB; 758 rates[index++] = IEEE80211_OFDM_RATE_48MB;
759 rates[index++] = IEEE80211_OFDM_RATE_54MB;
760 } else if (band == IEEE80211_BAND_5GHZ) {
761 rates[index++] =
762 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_9MB;
763 rates[index++] =
764 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_18MB;
765 rates[index++] =
766 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_24MB;
767 rates[index++] =
768 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_36MB;
769 rates[index++] =
770 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_48MB;
771 rates[index++] =
772 IEEE80211_BASIC_RATE_MASK | IEEE80211_OFDM_RATE_54MB;
773 } else {
774 wl1271_error("build_basic_rates invalid band: %d", band);
775 }
650 776
651 return index; 777 return index;
652} 778}
@@ -665,7 +791,8 @@ int wl1271_cmd_build_null_data(struct wl1271 *wl)
665 791
666 memcpy(template.header.sa, wl->mac_addr, ETH_ALEN); 792 memcpy(template.header.sa, wl->mac_addr, ETH_ALEN);
667 template.header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA | 793 template.header.frame_ctl = cpu_to_le16(IEEE80211_FTYPE_DATA |
668 IEEE80211_STYPE_NULLFUNC); 794 IEEE80211_STYPE_NULLFUNC |
795 IEEE80211_FCTL_TODS);
669 796
670 return wl1271_cmd_template_set(wl, CMD_TEMPL_NULL_DATA, &template, 797 return wl1271_cmd_template_set(wl, CMD_TEMPL_NULL_DATA, &template,
671 sizeof(template)); 798 sizeof(template));
@@ -678,7 +805,10 @@ int wl1271_cmd_build_ps_poll(struct wl1271 *wl, u16 aid)
678 805
679 memcpy(template.bssid, wl->bssid, ETH_ALEN); 806 memcpy(template.bssid, wl->bssid, ETH_ALEN);
680 memcpy(template.ta, wl->mac_addr, ETH_ALEN); 807 memcpy(template.ta, wl->mac_addr, ETH_ALEN);
681 template.aid = aid; 808
809 /* aid in PS-Poll has its two MSBs each set to 1 */
810 template.aid = cpu_to_le16(1 << 15 | 1 << 14 | aid);
811
682 template.fc = cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL); 812 template.fc = cpu_to_le16(IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL);
683 813
684 return wl1271_cmd_template_set(wl, CMD_TEMPL_PS_POLL, &template, 814 return wl1271_cmd_template_set(wl, CMD_TEMPL_PS_POLL, &template,
@@ -686,12 +816,14 @@ int wl1271_cmd_build_ps_poll(struct wl1271 *wl, u16 aid)
686 816
687} 817}
688 818
689int wl1271_cmd_build_probe_req(struct wl1271 *wl, u8 *ssid, size_t ssid_len) 819int wl1271_cmd_build_probe_req(struct wl1271 *wl, u8 *ssid, size_t ssid_len,
820 u8 band)
690{ 821{
691 struct wl12xx_probe_req_template template; 822 struct wl12xx_probe_req_template template;
692 struct wl12xx_ie_rates *rates; 823 struct wl12xx_ie_rates *rates;
693 char *ptr; 824 char *ptr;
694 u16 size; 825 u16 size;
826 int ret;
695 827
696 ptr = (char *)&template; 828 ptr = (char *)&template;
697 size = sizeof(struct ieee80211_header); 829 size = sizeof(struct ieee80211_header);
@@ -713,20 +845,25 @@ int wl1271_cmd_build_probe_req(struct wl1271 *wl, u8 *ssid, size_t ssid_len)
713 /* Basic Rates */ 845 /* Basic Rates */
714 rates = (struct wl12xx_ie_rates *)ptr; 846 rates = (struct wl12xx_ie_rates *)ptr;
715 rates->header.id = WLAN_EID_SUPP_RATES; 847 rates->header.id = WLAN_EID_SUPP_RATES;
716 rates->header.len = wl1271_build_basic_rates(rates->rates); 848 rates->header.len = wl1271_build_basic_rates(rates->rates, band);
717 size += sizeof(struct wl12xx_ie_header) + rates->header.len; 849 size += sizeof(struct wl12xx_ie_header) + rates->header.len;
718 ptr += sizeof(struct wl12xx_ie_header) + rates->header.len; 850 ptr += sizeof(struct wl12xx_ie_header) + rates->header.len;
719 851
720 /* Extended rates */ 852 /* Extended rates */
721 rates = (struct wl12xx_ie_rates *)ptr; 853 rates = (struct wl12xx_ie_rates *)ptr;
722 rates->header.id = WLAN_EID_EXT_SUPP_RATES; 854 rates->header.id = WLAN_EID_EXT_SUPP_RATES;
723 rates->header.len = wl1271_build_extended_rates(rates->rates); 855 rates->header.len = wl1271_build_extended_rates(rates->rates, band);
724 size += sizeof(struct wl12xx_ie_header) + rates->header.len; 856 size += sizeof(struct wl12xx_ie_header) + rates->header.len;
725 857
726 wl1271_dump(DEBUG_SCAN, "PROBE REQ: ", &template, size); 858 wl1271_dump(DEBUG_SCAN, "PROBE REQ: ", &template, size);
727 859
728 return wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_2_4, 860 if (band == IEEE80211_BAND_2GHZ)
729 &template, size); 861 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_2_4,
862 &template, size);
863 else
864 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_5,
865 &template, size);
866 return ret;
730} 867}
731 868
732int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id) 869int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id)
@@ -743,10 +880,10 @@ int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id)
743 } 880 }
744 881
745 cmd->id = id; 882 cmd->id = id;
746 cmd->key_action = KEY_SET_ID; 883 cmd->key_action = cpu_to_le16(KEY_SET_ID);
747 cmd->key_type = KEY_WEP; 884 cmd->key_type = KEY_WEP;
748 885
749 ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd)); 886 ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0);
750 if (ret < 0) { 887 if (ret < 0) {
751 wl1271_warning("cmd set_default_wep_key failed: %d", ret); 888 wl1271_warning("cmd set_default_wep_key failed: %d", ret);
752 goto out; 889 goto out;
@@ -759,7 +896,8 @@ out:
759} 896}
760 897
761int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type, 898int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type,
762 u8 key_size, const u8 *key, const u8 *addr) 899 u8 key_size, const u8 *key, const u8 *addr,
900 u32 tx_seq_32, u16 tx_seq_16)
763{ 901{
764 struct wl1271_cmd_set_keys *cmd; 902 struct wl1271_cmd_set_keys *cmd;
765 int ret = 0; 903 int ret = 0;
@@ -773,16 +911,18 @@ int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type,
773 if (key_type != KEY_WEP) 911 if (key_type != KEY_WEP)
774 memcpy(cmd->addr, addr, ETH_ALEN); 912 memcpy(cmd->addr, addr, ETH_ALEN);
775 913
776 cmd->key_action = action; 914 cmd->key_action = cpu_to_le16(action);
777 cmd->key_size = key_size; 915 cmd->key_size = key_size;
778 cmd->key_type = key_type; 916 cmd->key_type = key_type;
779 917
918 cmd->ac_seq_num16[0] = cpu_to_le16(tx_seq_16);
919 cmd->ac_seq_num32[0] = cpu_to_le32(tx_seq_32);
920
780 /* we have only one SSID profile */ 921 /* we have only one SSID profile */
781 cmd->ssid_profile = 0; 922 cmd->ssid_profile = 0;
782 923
783 cmd->id = id; 924 cmd->id = id;
784 925
785 /* FIXME: this is from wl1251, needs to be checked */
786 if (key_type == KEY_TKIP) { 926 if (key_type == KEY_TKIP) {
787 /* 927 /*
788 * We get the key in the following form: 928 * We get the key in the following form:
@@ -800,10 +940,10 @@ int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type,
800 940
801 wl1271_dump(DEBUG_CRYPT, "TARGET KEY: ", cmd, sizeof(*cmd)); 941 wl1271_dump(DEBUG_CRYPT, "TARGET KEY: ", cmd, sizeof(*cmd));
802 942
803 ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd)); 943 ret = wl1271_cmd_send(wl, CMD_SET_KEYS, cmd, sizeof(*cmd), 0);
804 if (ret < 0) { 944 if (ret < 0) {
805 wl1271_warning("could not set keys"); 945 wl1271_warning("could not set keys");
806 goto out; 946 goto out;
807 } 947 }
808 948
809out: 949out:
@@ -811,3 +951,34 @@ out:
811 951
812 return ret; 952 return ret;
813} 953}
954
955int wl1271_cmd_disconnect(struct wl1271 *wl)
956{
957 struct wl1271_cmd_disconnect *cmd;
958 int ret = 0;
959
960 wl1271_debug(DEBUG_CMD, "cmd disconnect");
961
962 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
963 if (!cmd) {
964 ret = -ENOMEM;
965 goto out;
966 }
967
968 cmd->rx_config_options = cpu_to_le32(wl->rx_config);
969 cmd->rx_filter_options = cpu_to_le32(wl->rx_filter);
970 /* disconnect reason is not used in immediate disconnections */
971 cmd->type = DISCONNECT_IMMEDIATE;
972
973 ret = wl1271_cmd_send(wl, CMD_DISCONNECT, cmd, sizeof(*cmd), 0);
974 if (ret < 0) {
975 wl1271_error("failed to send disconnect command");
976 goto out_free;
977 }
978
979out_free:
980 kfree(cmd);
981
982out:
983 return ret;
984}
diff --git a/drivers/net/wireless/wl12xx/wl1271_cmd.h b/drivers/net/wireless/wl12xx/wl1271_cmd.h
index 951a8447a516..2dc06c73532b 100644
--- a/drivers/net/wireless/wl12xx/wl1271_cmd.h
+++ b/drivers/net/wireless/wl12xx/wl1271_cmd.h
@@ -29,27 +29,32 @@
29 29
30struct acx_header; 30struct acx_header;
31 31
32int wl1271_cmd_send(struct wl1271 *wl, u16 type, void *buf, size_t buf_len); 32int wl1271_cmd_send(struct wl1271 *wl, u16 id, void *buf, size_t len,
33int wl1271_cmd_join(struct wl1271 *wl, u8 bss_type, u8 dtim_interval, 33 size_t res_len);
34 u16 beacon_interval, u8 wait); 34int wl1271_cmd_general_parms(struct wl1271 *wl);
35int wl1271_cmd_radio_parms(struct wl1271 *wl);
36int wl1271_cmd_join(struct wl1271 *wl);
35int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer); 37int wl1271_cmd_test(struct wl1271 *wl, void *buf, size_t buf_len, u8 answer);
36int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t len); 38int wl1271_cmd_interrogate(struct wl1271 *wl, u16 id, void *buf, size_t len);
37int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len); 39int wl1271_cmd_configure(struct wl1271 *wl, u16 id, void *buf, size_t len);
38int wl1271_cmd_data_path(struct wl1271 *wl, u8 channel, bool enable); 40int wl1271_cmd_data_path(struct wl1271 *wl, bool enable);
39int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode); 41int wl1271_cmd_ps_mode(struct wl1271 *wl, u8 ps_mode, bool send);
40int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer, 42int wl1271_cmd_read_memory(struct wl1271 *wl, u32 addr, void *answer,
41 size_t len); 43 size_t len);
42int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len, 44int wl1271_cmd_scan(struct wl1271 *wl, u8 *ssid, size_t len,
43 u8 active_scan, u8 high_prio, u8 num_channels, 45 u8 active_scan, u8 high_prio, u8 band,
44 u8 probe_requests); 46 u8 probe_requests);
45int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id, 47int wl1271_cmd_template_set(struct wl1271 *wl, u16 template_id,
46 void *buf, size_t buf_len); 48 void *buf, size_t buf_len);
47int wl1271_cmd_build_null_data(struct wl1271 *wl); 49int wl1271_cmd_build_null_data(struct wl1271 *wl);
48int wl1271_cmd_build_ps_poll(struct wl1271 *wl, u16 aid); 50int wl1271_cmd_build_ps_poll(struct wl1271 *wl, u16 aid);
49int wl1271_cmd_build_probe_req(struct wl1271 *wl, u8 *ssid, size_t ssid_len); 51int wl1271_cmd_build_probe_req(struct wl1271 *wl, u8 *ssid, size_t ssid_len,
52 u8 band);
50int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id); 53int wl1271_cmd_set_default_wep_key(struct wl1271 *wl, u8 id);
51int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type, 54int wl1271_cmd_set_key(struct wl1271 *wl, u16 action, u8 id, u8 key_type,
52 u8 key_size, const u8 *key, const u8 *addr); 55 u8 key_size, const u8 *key, const u8 *addr,
56 u32 tx_seq_32, u16 tx_seq_16);
57int wl1271_cmd_disconnect(struct wl1271 *wl);
53 58
54enum wl1271_commands { 59enum wl1271_commands {
55 CMD_INTERROGATE = 1, /*use this to read information elements*/ 60 CMD_INTERROGATE = 1, /*use this to read information elements*/
@@ -118,8 +123,8 @@ enum cmd_templ {
118#define WL1271_CMD_TEMPL_MAX_SIZE 252 123#define WL1271_CMD_TEMPL_MAX_SIZE 252
119 124
120struct wl1271_cmd_header { 125struct wl1271_cmd_header {
121 u16 id; 126 __le16 id;
122 u16 status; 127 __le16 status;
123 /* payload */ 128 /* payload */
124 u8 data[0]; 129 u8 data[0];
125} __attribute__ ((packed)); 130} __attribute__ ((packed));
@@ -172,17 +177,17 @@ struct cmd_read_write_memory {
172 struct wl1271_cmd_header header; 177 struct wl1271_cmd_header header;
173 178
174 /* The address of the memory to read from or write to.*/ 179 /* The address of the memory to read from or write to.*/
175 u32 addr; 180 __le32 addr;
176 181
177 /* The amount of data in bytes to read from or write to the WiLink 182 /* The amount of data in bytes to read from or write to the WiLink
178 * device.*/ 183 * device.*/
179 u32 size; 184 __le32 size;
180 185
181 /* The actual value read from or written to the Wilink. The source 186 /* The actual value read from or written to the Wilink. The source
182 of this field is the Host in WRITE command or the Wilink in READ 187 of this field is the Host in WRITE command or the Wilink in READ
183 command. */ 188 command. */
184 u8 value[MAX_READ_SIZE]; 189 u8 value[MAX_READ_SIZE];
185}; 190} __attribute__ ((packed));
186 191
187#define CMDMBOX_HEADER_LEN 4 192#define CMDMBOX_HEADER_LEN 4
188#define CMDMBOX_INFO_ELEM_HEADER_LEN 4 193#define CMDMBOX_INFO_ELEM_HEADER_LEN 4
@@ -196,22 +201,23 @@ enum {
196 201
197#define WL1271_JOIN_CMD_CTRL_TX_FLUSH 0x80 /* Firmware flushes all Tx */ 202#define WL1271_JOIN_CMD_CTRL_TX_FLUSH 0x80 /* Firmware flushes all Tx */
198#define WL1271_JOIN_CMD_TX_SESSION_OFFSET 1 203#define WL1271_JOIN_CMD_TX_SESSION_OFFSET 1
204#define WL1271_JOIN_CMD_BSS_TYPE_5GHZ 0x10
199 205
200struct wl1271_cmd_join { 206struct wl1271_cmd_join {
201 struct wl1271_cmd_header header; 207 struct wl1271_cmd_header header;
202 208
203 u32 bssid_lsb; 209 __le32 bssid_lsb;
204 u16 bssid_msb; 210 __le16 bssid_msb;
205 u16 beacon_interval; /* in TBTTs */ 211 __le16 beacon_interval; /* in TBTTs */
206 u32 rx_config_options; 212 __le32 rx_config_options;
207 u32 rx_filter_options; 213 __le32 rx_filter_options;
208 214
209 /* 215 /*
210 * The target uses this field to determine the rate at 216 * The target uses this field to determine the rate at
211 * which to transmit control frame responses (such as 217 * which to transmit control frame responses (such as
212 * ACK or CTS frames). 218 * ACK or CTS frames).
213 */ 219 */
214 u32 basic_rate_set; 220 __le32 basic_rate_set;
215 u8 dtim_interval; 221 u8 dtim_interval;
216 /* 222 /*
217 * bits 0-2: This bitwise field specifies the type 223 * bits 0-2: This bitwise field specifies the type
@@ -240,10 +246,10 @@ struct cmd_enabledisable_path {
240struct wl1271_cmd_template_set { 246struct wl1271_cmd_template_set {
241 struct wl1271_cmd_header header; 247 struct wl1271_cmd_header header;
242 248
243 u16 len; 249 __le16 len;
244 u8 template_type; 250 u8 template_type;
245 u8 index; /* relevant only for KLV_TEMPLATE type */ 251 u8 index; /* relevant only for KLV_TEMPLATE type */
246 u32 enabled_rates; 252 __le32 enabled_rates;
247 u8 short_retry_limit; 253 u8 short_retry_limit;
248 u8 long_retry_limit; 254 u8 long_retry_limit;
249 u8 aflags; 255 u8 aflags;
@@ -280,18 +286,13 @@ struct wl1271_cmd_ps_params {
280 * to power save mode. 286 * to power save mode.
281 */ 287 */
282 u8 hang_over_period; 288 u8 hang_over_period;
283 u32 null_data_rate; 289 __le32 null_data_rate;
284} __attribute__ ((packed)); 290} __attribute__ ((packed));
285 291
286/* HW encryption keys */ 292/* HW encryption keys */
287#define NUM_ACCESS_CATEGORIES_COPY 4 293#define NUM_ACCESS_CATEGORIES_COPY 4
288#define MAX_KEY_SIZE 32 294#define MAX_KEY_SIZE 32
289 295
290/* When set, disable HW encryption */
291#define DF_ENCRYPTION_DISABLE 0x01
292/* When set, disable HW decryption */
293#define DF_SNIFF_MODE_ENABLE 0x80
294
295enum wl1271_cmd_key_action { 296enum wl1271_cmd_key_action {
296 KEY_ADD_OR_REPLACE = 1, 297 KEY_ADD_OR_REPLACE = 1,
297 KEY_REMOVE = 2, 298 KEY_REMOVE = 2,
@@ -316,9 +317,9 @@ struct wl1271_cmd_set_keys {
316 u8 addr[ETH_ALEN]; 317 u8 addr[ETH_ALEN];
317 318
318 /* key_action_e */ 319 /* key_action_e */
319 u16 key_action; 320 __le16 key_action;
320 321
321 u16 reserved_1; 322 __le16 reserved_1;
322 323
323 /* key size in bytes */ 324 /* key size in bytes */
324 u8 key_size; 325 u8 key_size;
@@ -334,8 +335,8 @@ struct wl1271_cmd_set_keys {
334 u8 id; 335 u8 id;
335 u8 reserved_2[6]; 336 u8 reserved_2[6];
336 u8 key[MAX_KEY_SIZE]; 337 u8 key[MAX_KEY_SIZE];
337 u16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY]; 338 __le16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY];
338 u32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY]; 339 __le32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY];
339} __attribute__ ((packed)); 340} __attribute__ ((packed));
340 341
341 342
@@ -347,19 +348,22 @@ struct wl1271_cmd_set_keys {
347#define WL1271_SCAN_OPT_PRIORITY_HIGH 4 348#define WL1271_SCAN_OPT_PRIORITY_HIGH 4
348#define WL1271_SCAN_CHAN_MIN_DURATION 30000 /* TU */ 349#define WL1271_SCAN_CHAN_MIN_DURATION 30000 /* TU */
349#define WL1271_SCAN_CHAN_MAX_DURATION 60000 /* TU */ 350#define WL1271_SCAN_CHAN_MAX_DURATION 60000 /* TU */
351#define WL1271_SCAN_BAND_2_4_GHZ 0
352#define WL1271_SCAN_BAND_5_GHZ 1
353#define WL1271_SCAN_BAND_DUAL 2
350 354
351struct basic_scan_params { 355struct basic_scan_params {
352 u32 rx_config_options; 356 __le32 rx_config_options;
353 u32 rx_filter_options; 357 __le32 rx_filter_options;
354 /* Scan option flags (WL1271_SCAN_OPT_*) */ 358 /* Scan option flags (WL1271_SCAN_OPT_*) */
355 u16 scan_options; 359 __le16 scan_options;
356 /* Number of scan channels in the list (maximum 30) */ 360 /* Number of scan channels in the list (maximum 30) */
357 u8 num_channels; 361 u8 num_channels;
358 /* This field indicates the number of probe requests to send 362 /* This field indicates the number of probe requests to send
359 per channel for an active scan */ 363 per channel for an active scan */
360 u8 num_probe_requests; 364 u8 num_probe_requests;
361 /* Rate bit field for sending the probes */ 365 /* Rate bit field for sending the probes */
362 u32 tx_rate; 366 __le32 tx_rate;
363 u8 tid_trigger; 367 u8 tid_trigger;
364 u8 ssid_len; 368 u8 ssid_len;
365 /* in order to align */ 369 /* in order to align */
@@ -374,10 +378,10 @@ struct basic_scan_params {
374 378
375struct basic_scan_channel_params { 379struct basic_scan_channel_params {
376 /* Duration in TU to wait for frames on a channel for active scan */ 380 /* Duration in TU to wait for frames on a channel for active scan */
377 u32 min_duration; 381 __le32 min_duration;
378 u32 max_duration; 382 __le32 max_duration;
379 u32 bssid_lsb; 383 __le32 bssid_lsb;
380 u16 bssid_msb; 384 __le16 bssid_msb;
381 u8 early_termination; 385 u8 early_termination;
382 u8 tx_power_att; 386 u8 tx_power_att;
383 u8 channel; 387 u8 channel;
@@ -397,13 +401,13 @@ struct wl1271_cmd_scan {
397struct wl1271_cmd_trigger_scan_to { 401struct wl1271_cmd_trigger_scan_to {
398 struct wl1271_cmd_header header; 402 struct wl1271_cmd_header header;
399 403
400 u32 timeout; 404 __le32 timeout;
401}; 405} __attribute__ ((packed));
402 406
403struct wl1271_cmd_test_header { 407struct wl1271_cmd_test_header {
404 u8 id; 408 u8 id;
405 u8 padding[3]; 409 u8 padding[3];
406}; 410} __attribute__ ((packed));
407 411
408enum wl1271_channel_tune_bands { 412enum wl1271_channel_tune_bands {
409 WL1271_CHANNEL_TUNE_BAND_2_4, 413 WL1271_CHANNEL_TUNE_BAND_2_4,
@@ -416,6 +420,33 @@ enum wl1271_channel_tune_bands {
416#define TEST_CMD_P2G_CAL 0x02 420#define TEST_CMD_P2G_CAL 0x02
417#define TEST_CMD_CHANNEL_TUNE 0x0d 421#define TEST_CMD_CHANNEL_TUNE 0x0d
418#define TEST_CMD_UPDATE_PD_REFERENCE_POINT 0x1d 422#define TEST_CMD_UPDATE_PD_REFERENCE_POINT 0x1d
423#define TEST_CMD_INI_FILE_RADIO_PARAM 0x19
424#define TEST_CMD_INI_FILE_GENERAL_PARAM 0x1E
425
426struct wl1271_general_parms_cmd {
427 struct wl1271_cmd_header header;
428
429 struct wl1271_cmd_test_header test;
430
431 u8 params[WL1271_NVS_GENERAL_PARAMS_SIZE];
432 s8 reserved[23];
433} __attribute__ ((packed));
434
435#define WL1271_STAT_RADIO_PARAMS_5_SIZE 29
436#define WL1271_DYN_RADIO_PARAMS_5_SIZE 104
437
438struct wl1271_radio_parms_cmd {
439 struct wl1271_cmd_header header;
440
441 struct wl1271_cmd_test_header test;
442
443 u8 stat_radio_params[WL1271_NVS_STAT_RADIO_PARAMS_SIZE];
444 u8 stat_radio_params_5[WL1271_STAT_RADIO_PARAMS_5_SIZE];
445
446 u8 dyn_radio_params[WL1271_NVS_DYN_RADIO_PARAMS_SIZE];
447 u8 reserved;
448 u8 dyn_radio_params_5[WL1271_DYN_RADIO_PARAMS_5_SIZE];
449} __attribute__ ((packed));
419 450
420struct wl1271_cmd_cal_channel_tune { 451struct wl1271_cmd_cal_channel_tune {
421 struct wl1271_cmd_header header; 452 struct wl1271_cmd_header header;
@@ -425,7 +456,7 @@ struct wl1271_cmd_cal_channel_tune {
425 u8 band; 456 u8 band;
426 u8 channel; 457 u8 channel;
427 458
428 u16 radio_status; 459 __le16 radio_status;
429} __attribute__ ((packed)); 460} __attribute__ ((packed));
430 461
431struct wl1271_cmd_cal_update_ref_point { 462struct wl1271_cmd_cal_update_ref_point {
@@ -433,8 +464,8 @@ struct wl1271_cmd_cal_update_ref_point {
433 464
434 struct wl1271_cmd_test_header test; 465 struct wl1271_cmd_test_header test;
435 466
436 s32 ref_power; 467 __le32 ref_power;
437 s32 ref_detector; 468 __le32 ref_detector;
438 u8 sub_band; 469 u8 sub_band;
439 u8 padding[3]; 470 u8 padding[3];
440} __attribute__ ((packed)); 471} __attribute__ ((packed));
@@ -449,16 +480,42 @@ struct wl1271_cmd_cal_p2g {
449 480
450 struct wl1271_cmd_test_header test; 481 struct wl1271_cmd_test_header test;
451 482
452 u16 len; 483 __le16 len;
453 u8 buf[MAX_TLV_LENGTH]; 484 u8 buf[MAX_TLV_LENGTH];
454 u8 type; 485 u8 type;
455 u8 padding; 486 u8 padding;
456 487
457 s16 radio_status; 488 __le16 radio_status;
458 u8 nvs_version[MAX_NVS_VERSION_LENGTH]; 489 u8 nvs_version[MAX_NVS_VERSION_LENGTH];
459 490
460 u8 sub_band_mask; 491 u8 sub_band_mask;
461 u8 padding2; 492 u8 padding2;
462} __attribute__ ((packed)); 493} __attribute__ ((packed));
463 494
495
496/*
497 * There are three types of disconnections:
498 *
499 * DISCONNECT_IMMEDIATE: the fw doesn't send any frames
500 * DISCONNECT_DEAUTH: the fw generates a DEAUTH request with the reason
501 * we have passed
502 * DISCONNECT_DISASSOC: the fw generates a DESASSOC request with the reason
503 * we have passed
504 */
505enum wl1271_disconnect_type {
506 DISCONNECT_IMMEDIATE,
507 DISCONNECT_DEAUTH,
508 DISCONNECT_DISASSOC
509};
510
511struct wl1271_cmd_disconnect {
512 __le32 rx_config_options;
513 __le32 rx_filter_options;
514
515 __le16 reason;
516 u8 type;
517
518 u8 padding;
519} __attribute__ ((packed));
520
464#endif /* __WL1271_CMD_H__ */ 521#endif /* __WL1271_CMD_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1271_conf.h b/drivers/net/wireless/wl12xx/wl1271_conf.h
new file mode 100644
index 000000000000..6f9e75cc5640
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl1271_conf.h
@@ -0,0 +1,795 @@
1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 *
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#ifndef __WL1271_CONF_H__
25#define __WL1271_CONF_H__
26
27enum {
28 CONF_HW_BIT_RATE_1MBPS = BIT(0),
29 CONF_HW_BIT_RATE_2MBPS = BIT(1),
30 CONF_HW_BIT_RATE_5_5MBPS = BIT(2),
31 CONF_HW_BIT_RATE_6MBPS = BIT(3),
32 CONF_HW_BIT_RATE_9MBPS = BIT(4),
33 CONF_HW_BIT_RATE_11MBPS = BIT(5),
34 CONF_HW_BIT_RATE_12MBPS = BIT(6),
35 CONF_HW_BIT_RATE_18MBPS = BIT(7),
36 CONF_HW_BIT_RATE_22MBPS = BIT(8),
37 CONF_HW_BIT_RATE_24MBPS = BIT(9),
38 CONF_HW_BIT_RATE_36MBPS = BIT(10),
39 CONF_HW_BIT_RATE_48MBPS = BIT(11),
40 CONF_HW_BIT_RATE_54MBPS = BIT(12),
41 CONF_HW_BIT_RATE_MCS_0 = BIT(13),
42 CONF_HW_BIT_RATE_MCS_1 = BIT(14),
43 CONF_HW_BIT_RATE_MCS_2 = BIT(15),
44 CONF_HW_BIT_RATE_MCS_3 = BIT(16),
45 CONF_HW_BIT_RATE_MCS_4 = BIT(17),
46 CONF_HW_BIT_RATE_MCS_5 = BIT(18),
47 CONF_HW_BIT_RATE_MCS_6 = BIT(19),
48 CONF_HW_BIT_RATE_MCS_7 = BIT(20)
49};
50
51enum {
52 CONF_HW_RATE_INDEX_1MBPS = 0,
53 CONF_HW_RATE_INDEX_2MBPS = 1,
54 CONF_HW_RATE_INDEX_5_5MBPS = 2,
55 CONF_HW_RATE_INDEX_6MBPS = 3,
56 CONF_HW_RATE_INDEX_9MBPS = 4,
57 CONF_HW_RATE_INDEX_11MBPS = 5,
58 CONF_HW_RATE_INDEX_12MBPS = 6,
59 CONF_HW_RATE_INDEX_18MBPS = 7,
60 CONF_HW_RATE_INDEX_22MBPS = 8,
61 CONF_HW_RATE_INDEX_24MBPS = 9,
62 CONF_HW_RATE_INDEX_36MBPS = 10,
63 CONF_HW_RATE_INDEX_48MBPS = 11,
64 CONF_HW_RATE_INDEX_54MBPS = 12,
65 CONF_HW_RATE_INDEX_MAX = CONF_HW_RATE_INDEX_54MBPS,
66};
67
68struct conf_sg_settings {
69 /*
70 * Defines the PER threshold in PPM of the BT voice of which reaching
71 * this value will trigger raising the priority of the BT voice by
72 * the BT IP until next NFS sample interval time as defined in
73 * nfs_sample_interval.
74 *
75 * Unit: PER value in PPM (parts per million)
76 * #Error_packets / #Total_packets
77
78 * Range: u32
79 */
80 u32 per_threshold;
81
82 /*
83 * This value is an absolute time in micro-seconds to limit the
84 * maximum scan duration compensation while in SG
85 */
86 u32 max_scan_compensation_time;
87
88 /* Defines the PER threshold of the BT voice of which reaching this
89 * value will trigger raising the priority of the BT voice until next
90 * NFS sample interval time as defined in sample_interval.
91 *
92 * Unit: msec
93 * Range: 1-65000
94 */
95 u16 nfs_sample_interval;
96
97 /*
98 * Defines the load ratio for the BT.
99 * The WLAN ratio is: 100 - load_ratio
100 *
101 * Unit: Percent
102 * Range: 0-100
103 */
104 u8 load_ratio;
105
106 /*
107 * true - Co-ex is allowed to enter/exit P.S automatically and
108 * transparently to the host
109 *
110 * false - Co-ex is disallowed to enter/exit P.S and will trigger an
111 * event to the host to notify for the need to enter/exit P.S
112 * due to BT change state
113 *
114 */
115 u8 auto_ps_mode;
116
117 /*
118 * This parameter defines the compensation percentage of num of probe
119 * requests in case scan is initiated during BT voice/BT ACL
120 * guaranteed link.
121 *
122 * Unit: Percent
123 * Range: 0-255 (0 - No compensation)
124 */
125 u8 probe_req_compensation;
126
127 /*
128 * This parameter defines the compensation percentage of scan window
129 * size in case scan is initiated during BT voice/BT ACL Guaranteed
130 * link.
131 *
132 * Unit: Percent
133 * Range: 0-255 (0 - No compensation)
134 */
135 u8 scan_window_compensation;
136
137 /*
138 * Defines the antenna configuration.
139 *
140 * Range: 0 - Single Antenna; 1 - Dual Antenna
141 */
142 u8 antenna_config;
143
144 /*
145 * The percent out of the Max consecutive beacon miss roaming trigger
146 * which is the threshold for raising the priority of beacon
147 * reception.
148 *
149 * Range: 1-100
150 * N = MaxConsecutiveBeaconMiss
151 * P = coexMaxConsecutiveBeaconMissPrecent
152 * Threshold = MIN( N-1, round(N * P / 100))
153 */
154 u8 beacon_miss_threshold;
155
156 /*
157 * The RX rate threshold below which rate adaptation is assumed to be
158 * occurring at the AP which will raise priority for ACTIVE_RX and RX
159 * SP.
160 *
161 * Range: HW_BIT_RATE_*
162 */
163 u32 rate_adaptation_threshold;
164
165 /*
166 * The SNR above which the RX rate threshold indicating AP rate
167 * adaptation is valid
168 *
169 * Range: -128 - 127
170 */
171 s8 rate_adaptation_snr;
172};
173
174enum conf_rx_queue_type {
175 CONF_RX_QUEUE_TYPE_LOW_PRIORITY, /* All except the high priority */
176 CONF_RX_QUEUE_TYPE_HIGH_PRIORITY, /* Management and voice packets */
177};
178
179struct conf_rx_settings {
180 /*
181 * The maximum amount of time, in TU, before the
182 * firmware discards the MSDU.
183 *
184 * Range: 0 - 0xFFFFFFFF
185 */
186 u32 rx_msdu_life_time;
187
188 /*
189 * Packet detection threshold in the PHY.
190 *
191 * FIXME: details unknown.
192 */
193 u32 packet_detection_threshold;
194
195 /*
196 * The longest time the STA will wait to receive traffic from the AP
197 * after a PS-poll has been transmitted.
198 *
199 * Range: 0 - 200000
200 */
201 u16 ps_poll_timeout;
202 /*
203 * The longest time the STA will wait to receive traffic from the AP
204 * after a frame has been sent from an UPSD enabled queue.
205 *
206 * Range: 0 - 200000
207 */
208 u16 upsd_timeout;
209
210 /*
211 * The number of octets in an MPDU, below which an RTS/CTS
212 * handshake is not performed.
213 *
214 * Range: 0 - 4096
215 */
216 u16 rts_threshold;
217
218 /*
219 * The RX Clear Channel Assessment threshold in the PHY
220 * (the energy threshold).
221 *
222 * Range: ENABLE_ENERGY_D == 0x140A
223 * DISABLE_ENERGY_D == 0xFFEF
224 */
225 u16 rx_cca_threshold;
226
227 /*
228 * Occupied Rx mem-blocks number which requires interrupting the host
229 * (0 = no buffering, 0xffff = disabled).
230 *
231 * Range: u16
232 */
233 u16 irq_blk_threshold;
234
235 /*
236 * Rx packets number which requires interrupting the host
237 * (0 = no buffering).
238 *
239 * Range: u16
240 */
241 u16 irq_pkt_threshold;
242
243 /*
244 * Max time in msec the FW may delay RX-Complete interrupt.
245 *
246 * Range: 1 - 100
247 */
248 u16 irq_timeout;
249
250 /*
251 * The RX queue type.
252 *
253 * Range: RX_QUEUE_TYPE_RX_LOW_PRIORITY, RX_QUEUE_TYPE_RX_HIGH_PRIORITY,
254 */
255 u8 queue_type;
256};
257
258#define CONF_TX_MAX_RATE_CLASSES 8
259
260#define CONF_TX_RATE_MASK_UNSPECIFIED 0
261#define CONF_TX_RATE_MASK_BASIC (CONF_HW_BIT_RATE_1MBPS | \
262 CONF_HW_BIT_RATE_2MBPS)
263#define CONF_TX_RATE_RETRY_LIMIT 10
264
265struct conf_tx_rate_class {
266
267 /*
268 * The rates enabled for this rate class.
269 *
270 * Range: CONF_HW_BIT_RATE_* bit mask
271 */
272 u32 enabled_rates;
273
274 /*
275 * The dot11 short retry limit used for TX retries.
276 *
277 * Range: u8
278 */
279 u8 short_retry_limit;
280
281 /*
282 * The dot11 long retry limit used for TX retries.
283 *
284 * Range: u8
285 */
286 u8 long_retry_limit;
287
288 /*
289 * Flags controlling the attributes of TX transmission.
290 *
291 * Range: bit 0: Truncate - when set, FW attempts to send a frame stop
292 * when the total valid per-rate attempts have
293 * been exhausted; otherwise transmissions
294 * will continue at the lowest available rate
295 * until the appropriate one of the
296 * short_retry_limit, long_retry_limit,
297 * dot11_max_transmit_msdu_life_time, or
298 * max_tx_life_time, is exhausted.
299 * 1: Preamble Override - indicates if the preamble type
300 * should be used in TX.
301 * 2: Preamble Type - the type of the preamble to be used by
302 * the policy (0 - long preamble, 1 - short preamble.
303 */
304 u8 aflags;
305};
306
307#define CONF_TX_MAX_AC_COUNT 4
308
309/* Slot number setting to start transmission at PIFS interval */
310#define CONF_TX_AIFS_PIFS 1
311/* Slot number setting to start transmission at DIFS interval normal
312 * DCF access */
313#define CONF_TX_AIFS_DIFS 2
314
315
316enum conf_tx_ac {
317 CONF_TX_AC_BE = 0, /* best effort / legacy */
318 CONF_TX_AC_BK = 1, /* background */
319 CONF_TX_AC_VI = 2, /* video */
320 CONF_TX_AC_VO = 3, /* voice */
321 CONF_TX_AC_CTS2SELF = 4, /* fictious AC, follows AC_VO */
322 CONF_TX_AC_ANY_TID = 0x1f
323};
324
325struct conf_tx_ac_category {
326 /*
327 * The AC class identifier.
328 *
329 * Range: enum conf_tx_ac
330 */
331 u8 ac;
332
333 /*
334 * The contention window minimum size (in slots) for the access
335 * class.
336 *
337 * Range: u8
338 */
339 u8 cw_min;
340
341 /*
342 * The contention window maximum size (in slots) for the access
343 * class.
344 *
345 * Range: u8
346 */
347 u16 cw_max;
348
349 /*
350 * The AIF value (in slots) for the access class.
351 *
352 * Range: u8
353 */
354 u8 aifsn;
355
356 /*
357 * The TX Op Limit (in microseconds) for the access class.
358 *
359 * Range: u16
360 */
361 u16 tx_op_limit;
362};
363
364#define CONF_TX_MAX_TID_COUNT 7
365
366enum {
367 CONF_CHANNEL_TYPE_DCF = 0, /* DC/LEGACY*/
368 CONF_CHANNEL_TYPE_EDCF = 1, /* EDCA*/
369 CONF_CHANNEL_TYPE_HCCA = 2, /* HCCA*/
370};
371
372enum {
373 CONF_PS_SCHEME_LEGACY = 0,
374 CONF_PS_SCHEME_UPSD_TRIGGER = 1,
375 CONF_PS_SCHEME_LEGACY_PSPOLL = 2,
376 CONF_PS_SCHEME_SAPSD = 3,
377};
378
379enum {
380 CONF_ACK_POLICY_LEGACY = 0,
381 CONF_ACK_POLICY_NO_ACK = 1,
382 CONF_ACK_POLICY_BLOCK = 2,
383};
384
385
386struct conf_tx_tid {
387 u8 queue_id;
388 u8 channel_type;
389 u8 tsid;
390 u8 ps_scheme;
391 u8 ack_policy;
392 u32 apsd_conf[2];
393};
394
395struct conf_tx_settings {
396 /*
397 * The TX ED value for TELEC Enable/Disable.
398 *
399 * Range: 0, 1
400 */
401 u8 tx_energy_detection;
402
403 /*
404 * Configuration for rate classes for TX (currently only one
405 * rate class supported.)
406 */
407 struct conf_tx_rate_class rc_conf;
408
409 /*
410 * Configuration for access categories for TX rate control.
411 */
412 u8 ac_conf_count;
413 struct conf_tx_ac_category ac_conf[CONF_TX_MAX_AC_COUNT];
414
415 /*
416 * Configuration for TID parameters.
417 */
418 u8 tid_conf_count;
419 struct conf_tx_tid tid_conf[CONF_TX_MAX_TID_COUNT];
420
421 /*
422 * The TX fragmentation threshold.
423 *
424 * Range: u16
425 */
426 u16 frag_threshold;
427
428 /*
429 * Max time in msec the FW may delay frame TX-Complete interrupt.
430 *
431 * Range: u16
432 */
433 u16 tx_compl_timeout;
434
435 /*
436 * Completed TX packet count which requires to issue the TX-Complete
437 * interrupt.
438 *
439 * Range: u16
440 */
441 u16 tx_compl_threshold;
442
443};
444
445enum {
446 CONF_WAKE_UP_EVENT_BEACON = 0x01, /* Wake on every Beacon*/
447 CONF_WAKE_UP_EVENT_DTIM = 0x02, /* Wake on every DTIM*/
448 CONF_WAKE_UP_EVENT_N_DTIM = 0x04, /* Wake every Nth DTIM */
449 CONF_WAKE_UP_EVENT_N_BEACONS = 0x08, /* Wake every Nth beacon */
450 CONF_WAKE_UP_EVENT_BITS_MASK = 0x0F
451};
452
453#define CONF_MAX_BCN_FILT_IE_COUNT 32
454
455#define CONF_BCN_RULE_PASS_ON_CHANGE BIT(0)
456#define CONF_BCN_RULE_PASS_ON_APPEARANCE BIT(1)
457
458#define CONF_BCN_IE_OUI_LEN 3
459#define CONF_BCN_IE_VER_LEN 2
460
461struct conf_bcn_filt_rule {
462 /*
463 * IE number to which to associate a rule.
464 *
465 * Range: u8
466 */
467 u8 ie;
468
469 /*
470 * Rule to associate with the specific ie.
471 *
472 * Range: CONF_BCN_RULE_PASS_ON_*
473 */
474 u8 rule;
475
476 /*
477 * OUI for the vendor specifie IE (221)
478 */
479 u8 oui[CONF_BCN_IE_OUI_LEN];
480
481 /*
482 * Type for the vendor specifie IE (221)
483 */
484 u8 type;
485
486 /*
487 * Version for the vendor specifie IE (221)
488 */
489 u8 version[CONF_BCN_IE_VER_LEN];
490};
491
492#define CONF_MAX_RSSI_SNR_TRIGGERS 8
493
494enum {
495 CONF_TRIG_METRIC_RSSI_BEACON = 0,
496 CONF_TRIG_METRIC_RSSI_DATA,
497 CONF_TRIG_METRIC_SNR_BEACON,
498 CONF_TRIG_METRIC_SNR_DATA
499};
500
501enum {
502 CONF_TRIG_EVENT_TYPE_LEVEL = 0,
503 CONF_TRIG_EVENT_TYPE_EDGE
504};
505
506enum {
507 CONF_TRIG_EVENT_DIR_LOW = 0,
508 CONF_TRIG_EVENT_DIR_HIGH,
509 CONF_TRIG_EVENT_DIR_BIDIR
510};
511
512
513struct conf_sig_trigger {
514 /*
515 * The RSSI / SNR threshold value.
516 *
517 * FIXME: what is the range?
518 */
519 s16 threshold;
520
521 /*
522 * Minimum delay between two trigger events for this trigger in ms.
523 *
524 * Range: 0 - 60000
525 */
526 u16 pacing;
527
528 /*
529 * The measurement data source for this trigger.
530 *
531 * Range: CONF_TRIG_METRIC_*
532 */
533 u8 metric;
534
535 /*
536 * The trigger type of this trigger.
537 *
538 * Range: CONF_TRIG_EVENT_TYPE_*
539 */
540 u8 type;
541
542 /*
543 * The direction of the trigger.
544 *
545 * Range: CONF_TRIG_EVENT_DIR_*
546 */
547 u8 direction;
548
549 /*
550 * Hysteresis range of the trigger around the threshold (in dB)
551 *
552 * Range: u8
553 */
554 u8 hysteresis;
555
556 /*
557 * Index of the trigger rule.
558 *
559 * Range: 0 - CONF_MAX_RSSI_SNR_TRIGGERS-1
560 */
561 u8 index;
562
563 /*
564 * Enable / disable this rule (to use for clearing rules.)
565 *
566 * Range: 1 - Enabled, 2 - Not enabled
567 */
568 u8 enable;
569};
570
571struct conf_sig_weights {
572
573 /*
574 * RSSI from beacons average weight.
575 *
576 * Range: u8
577 */
578 u8 rssi_bcn_avg_weight;
579
580 /*
581 * RSSI from data average weight.
582 *
583 * Range: u8
584 */
585 u8 rssi_pkt_avg_weight;
586
587 /*
588 * SNR from beacons average weight.
589 *
590 * Range: u8
591 */
592 u8 snr_bcn_avg_weight;
593
594 /*
595 * SNR from data average weight.
596 *
597 * Range: u8
598 */
599 u8 snr_pkt_avg_weight;
600};
601
602enum conf_bcn_filt_mode {
603 CONF_BCN_FILT_MODE_DISABLED = 0,
604 CONF_BCN_FILT_MODE_ENABLED = 1
605};
606
607enum conf_bet_mode {
608 CONF_BET_MODE_DISABLE = 0,
609 CONF_BET_MODE_ENABLE = 1,
610};
611
612struct conf_conn_settings {
613 /*
614 * Firmware wakeup conditions configuration. The host may set only
615 * one bit.
616 *
617 * Range: CONF_WAKE_UP_EVENT_*
618 */
619 u8 wake_up_event;
620
621 /*
622 * Listen interval for beacons or Dtims.
623 *
624 * Range: 0 for beacon and Dtim wakeup
625 * 1-10 for x Dtims
626 * 1-255 for x beacons
627 */
628 u8 listen_interval;
629
630 /*
631 * Enable or disable the beacon filtering.
632 *
633 * Range: CONF_BCN_FILT_MODE_*
634 */
635 enum conf_bcn_filt_mode bcn_filt_mode;
636
637 /*
638 * Configure Beacon filter pass-thru rules.
639 */
640 u8 bcn_filt_ie_count;
641 struct conf_bcn_filt_rule bcn_filt_ie[CONF_MAX_BCN_FILT_IE_COUNT];
642
643 /*
644 * The number of consequtive beacons to lose, before the firmware
645 * becomes out of synch.
646 *
647 * Range: u32
648 */
649 u32 synch_fail_thold;
650
651 /*
652 * After out-of-synch, the number of TU's to wait without a further
653 * received beacon (or probe response) before issuing the BSS_EVENT_LOSE
654 * event.
655 *
656 * Range: u32
657 */
658 u32 bss_lose_timeout;
659
660 /*
661 * Beacon receive timeout.
662 *
663 * Range: u32
664 */
665 u32 beacon_rx_timeout;
666
667 /*
668 * Broadcast receive timeout.
669 *
670 * Range: u32
671 */
672 u32 broadcast_timeout;
673
674 /*
675 * Enable/disable reception of broadcast packets in power save mode
676 *
677 * Range: 1 - enable, 0 - disable
678 */
679 u8 rx_broadcast_in_ps;
680
681 /*
682 * Consequtive PS Poll failures before sending event to driver
683 *
684 * Range: u8
685 */
686 u8 ps_poll_threshold;
687
688 /*
689 * Configuration of signal (rssi/snr) triggers.
690 */
691 u8 sig_trigger_count;
692 struct conf_sig_trigger sig_trigger[CONF_MAX_RSSI_SNR_TRIGGERS];
693
694 /*
695 * Configuration of signal average weights.
696 */
697 struct conf_sig_weights sig_weights;
698
699 /*
700 * Specifies if beacon early termination procedure is enabled or
701 * disabled.
702 *
703 * Range: CONF_BET_MODE_*
704 */
705 u8 bet_enable;
706
707 /*
708 * Specifies the maximum number of consecutive beacons that may be
709 * early terminated. After this number is reached at least one full
710 * beacon must be correctly received in FW before beacon ET
711 * resumes.
712 *
713 * Range 0 - 255
714 */
715 u8 bet_max_consecutive;
716
717 /*
718 * Specifies the maximum number of times to try PSM entry if it fails
719 * (if sending the appropriate null-func message fails.)
720 *
721 * Range 0 - 255
722 */
723 u8 psm_entry_retries;
724};
725
726enum {
727 CONF_REF_CLK_19_2_E,
728 CONF_REF_CLK_26_E,
729 CONF_REF_CLK_38_4_E,
730 CONF_REF_CLK_52_E
731};
732
733enum single_dual_band_enum {
734 CONF_SINGLE_BAND,
735 CONF_DUAL_BAND
736};
737
738#define CONF_RSSI_AND_PROCESS_COMPENSATION_SIZE 15
739#define CONF_NUMBER_OF_SUB_BANDS_5 7
740#define CONF_NUMBER_OF_RATE_GROUPS 6
741#define CONF_NUMBER_OF_CHANNELS_2_4 14
742#define CONF_NUMBER_OF_CHANNELS_5 35
743
744struct conf_radio_parms {
745 /*
746 * FEM parameter set to use
747 *
748 * Range: 0 or 1
749 */
750 u8 fem;
751};
752
753struct conf_init_settings {
754 /*
755 * Configure radio parameters.
756 */
757 struct conf_radio_parms radioparam;
758
759};
760
761struct conf_itrim_settings {
762 /* enable dco itrim */
763 u8 enable;
764
765 /* moderation timeout in microsecs from the last TX */
766 u32 timeout;
767};
768
769struct conf_pm_config_settings {
770 /*
771 * Host clock settling time
772 *
773 * Range: 0 - 30000 us
774 */
775 u32 host_clk_settling_time;
776
777 /*
778 * Host fast wakeup support
779 *
780 * Range: true, false
781 */
782 bool host_fast_wakeup_support;
783};
784
785struct conf_drv_settings {
786 struct conf_sg_settings sg;
787 struct conf_rx_settings rx;
788 struct conf_tx_settings tx;
789 struct conf_conn_settings conn;
790 struct conf_init_settings init;
791 struct conf_itrim_settings itrim;
792 struct conf_pm_config_settings pm_config;
793};
794
795#endif
diff --git a/drivers/net/wireless/wl12xx/wl1271_debugfs.c b/drivers/net/wireless/wl12xx/wl1271_debugfs.c
index c1805e5f8964..3f7ff8d0cf5a 100644
--- a/drivers/net/wireless/wl12xx/wl1271_debugfs.c
+++ b/drivers/net/wireless/wl12xx/wl1271_debugfs.c
@@ -24,6 +24,7 @@
24#include "wl1271_debugfs.h" 24#include "wl1271_debugfs.h"
25 25
26#include <linux/skbuff.h> 26#include <linux/skbuff.h>
27#include <linux/slab.h>
27 28
28#include "wl1271.h" 29#include "wl1271.h"
29#include "wl1271_acx.h" 30#include "wl1271_acx.h"
@@ -237,6 +238,64 @@ static const struct file_operations tx_queue_len_ops = {
237 .open = wl1271_open_file_generic, 238 .open = wl1271_open_file_generic,
238}; 239};
239 240
241static ssize_t gpio_power_read(struct file *file, char __user *user_buf,
242 size_t count, loff_t *ppos)
243{
244 struct wl1271 *wl = file->private_data;
245 bool state = test_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
246
247 int res;
248 char buf[10];
249
250 res = scnprintf(buf, sizeof(buf), "%d\n", state);
251
252 return simple_read_from_buffer(user_buf, count, ppos, buf, res);
253}
254
255static ssize_t gpio_power_write(struct file *file,
256 const char __user *user_buf,
257 size_t count, loff_t *ppos)
258{
259 struct wl1271 *wl = file->private_data;
260 char buf[10];
261 size_t len;
262 unsigned long value;
263 int ret;
264
265 mutex_lock(&wl->mutex);
266
267 len = min(count, sizeof(buf) - 1);
268 if (copy_from_user(buf, user_buf, len)) {
269 ret = -EFAULT;
270 goto out;
271 }
272 buf[len] = '\0';
273
274 ret = strict_strtoul(buf, 0, &value);
275 if (ret < 0) {
276 wl1271_warning("illegal value in gpio_power");
277 goto out;
278 }
279
280 if (value) {
281 wl->set_power(true);
282 set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
283 } else {
284 wl->set_power(false);
285 clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
286 }
287
288out:
289 mutex_unlock(&wl->mutex);
290 return count;
291}
292
293static const struct file_operations gpio_power_ops = {
294 .read = gpio_power_read,
295 .write = gpio_power_write,
296 .open = wl1271_open_file_generic
297};
298
240static void wl1271_debugfs_delete_files(struct wl1271 *wl) 299static void wl1271_debugfs_delete_files(struct wl1271 *wl)
241{ 300{
242 DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow); 301 DEBUGFS_FWSTATS_DEL(tx, internal_desc_overflow);
@@ -333,6 +392,8 @@ static void wl1271_debugfs_delete_files(struct wl1271 *wl)
333 DEBUGFS_DEL(tx_queue_len); 392 DEBUGFS_DEL(tx_queue_len);
334 DEBUGFS_DEL(retry_count); 393 DEBUGFS_DEL(retry_count);
335 DEBUGFS_DEL(excessive_retries); 394 DEBUGFS_DEL(excessive_retries);
395
396 DEBUGFS_DEL(gpio_power);
336} 397}
337 398
338static int wl1271_debugfs_add_files(struct wl1271 *wl) 399static int wl1271_debugfs_add_files(struct wl1271 *wl)
@@ -434,6 +495,8 @@ static int wl1271_debugfs_add_files(struct wl1271 *wl)
434 DEBUGFS_ADD(retry_count, wl->debugfs.rootdir); 495 DEBUGFS_ADD(retry_count, wl->debugfs.rootdir);
435 DEBUGFS_ADD(excessive_retries, wl->debugfs.rootdir); 496 DEBUGFS_ADD(excessive_retries, wl->debugfs.rootdir);
436 497
498 DEBUGFS_ADD(gpio_power, wl->debugfs.rootdir);
499
437out: 500out:
438 if (ret < 0) 501 if (ret < 0)
439 wl1271_debugfs_delete_files(wl); 502 wl1271_debugfs_delete_files(wl);
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.c b/drivers/net/wireless/wl12xx/wl1271_event.c
index f3afd4a6ff33..7468ef10194b 100644
--- a/drivers/net/wireless/wl12xx/wl1271_event.c
+++ b/drivers/net/wireless/wl12xx/wl1271_event.c
@@ -24,25 +24,125 @@
24#include "wl1271.h" 24#include "wl1271.h"
25#include "wl1271_reg.h" 25#include "wl1271_reg.h"
26#include "wl1271_spi.h" 26#include "wl1271_spi.h"
27#include "wl1271_io.h"
27#include "wl1271_event.h" 28#include "wl1271_event.h"
28#include "wl1271_ps.h" 29#include "wl1271_ps.h"
30#include "wl12xx_80211.h"
29 31
30static int wl1271_event_scan_complete(struct wl1271 *wl, 32static int wl1271_event_scan_complete(struct wl1271 *wl,
31 struct event_mailbox *mbox) 33 struct event_mailbox *mbox)
32{ 34{
35 int size = sizeof(struct wl12xx_probe_req_template);
33 wl1271_debug(DEBUG_EVENT, "status: 0x%x", 36 wl1271_debug(DEBUG_EVENT, "status: 0x%x",
34 mbox->scheduled_scan_status); 37 mbox->scheduled_scan_status);
35 38
36 if (wl->scanning) { 39 if (test_bit(WL1271_FLAG_SCANNING, &wl->flags)) {
37 mutex_unlock(&wl->mutex); 40 if (wl->scan.state == WL1271_SCAN_BAND_DUAL) {
38 ieee80211_scan_completed(wl->hw, false); 41 wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_2_4,
39 mutex_lock(&wl->mutex); 42 NULL, size);
40 wl->scanning = false; 43 /* 2.4 GHz band scanned, scan 5 GHz band, pretend
44 * to the wl1271_cmd_scan function that we are not
45 * scanning as it checks that.
46 */
47 clear_bit(WL1271_FLAG_SCANNING, &wl->flags);
48 wl1271_cmd_scan(wl, wl->scan.ssid, wl->scan.ssid_len,
49 wl->scan.active,
50 wl->scan.high_prio,
51 WL1271_SCAN_BAND_5_GHZ,
52 wl->scan.probe_requests);
53 } else {
54 if (wl->scan.state == WL1271_SCAN_BAND_2_4_GHZ)
55 wl1271_cmd_template_set(wl,
56 CMD_TEMPL_CFG_PROBE_REQ_2_4,
57 NULL, size);
58 else
59 wl1271_cmd_template_set(wl,
60 CMD_TEMPL_CFG_PROBE_REQ_5,
61 NULL, size);
62
63 mutex_unlock(&wl->mutex);
64 ieee80211_scan_completed(wl->hw, false);
65 mutex_lock(&wl->mutex);
66 clear_bit(WL1271_FLAG_SCANNING, &wl->flags);
67 }
41 } 68 }
42
43 return 0; 69 return 0;
44} 70}
45 71
72static int wl1271_event_ps_report(struct wl1271 *wl,
73 struct event_mailbox *mbox,
74 bool *beacon_loss)
75{
76 int ret = 0;
77
78 wl1271_debug(DEBUG_EVENT, "ps_status: 0x%x", mbox->ps_status);
79
80 switch (mbox->ps_status) {
81 case EVENT_ENTER_POWER_SAVE_FAIL:
82 wl1271_debug(DEBUG_PSM, "PSM entry failed");
83
84 if (!test_bit(WL1271_FLAG_PSM, &wl->flags)) {
85 /* remain in active mode */
86 wl->psm_entry_retry = 0;
87 break;
88 }
89
90 if (wl->psm_entry_retry < wl->conf.conn.psm_entry_retries) {
91 wl->psm_entry_retry++;
92 ret = wl1271_ps_set_mode(wl, STATION_POWER_SAVE_MODE,
93 true);
94 } else {
95 wl1271_error("PSM entry failed, giving up.\n");
96 /* FIXME: this may need to be reconsidered. for now it
97 is not possible to indicate to the mac80211
98 afterwards that PSM entry failed. To maximize
99 functionality (receiving data and remaining
100 associated) make sure that we are in sync with the
101 AP in regard of PSM mode. */
102 ret = wl1271_ps_set_mode(wl, STATION_ACTIVE_MODE,
103 false);
104 wl->psm_entry_retry = 0;
105 }
106 break;
107 case EVENT_ENTER_POWER_SAVE_SUCCESS:
108 wl->psm_entry_retry = 0;
109
110 /* enable beacon filtering */
111 ret = wl1271_acx_beacon_filter_opt(wl, true);
112 if (ret < 0)
113 break;
114
115 /* enable beacon early termination */
116 ret = wl1271_acx_bet_enable(wl, true);
117 if (ret < 0)
118 break;
119
120 /* go to extremely low power mode */
121 wl1271_ps_elp_sleep(wl);
122 if (ret < 0)
123 break;
124 break;
125 case EVENT_EXIT_POWER_SAVE_FAIL:
126 wl1271_debug(DEBUG_PSM, "PSM exit failed");
127
128 if (test_bit(WL1271_FLAG_PSM, &wl->flags)) {
129 wl->psm_entry_retry = 0;
130 break;
131 }
132
133 /* make sure the firmware goes to active mode - the frame to
134 be sent next will indicate to the AP, that we are active. */
135 ret = wl1271_ps_set_mode(wl, STATION_ACTIVE_MODE,
136 false);
137 break;
138 case EVENT_EXIT_POWER_SAVE_SUCCESS:
139 default:
140 break;
141 }
142
143 return ret;
144}
145
46static void wl1271_event_mbox_dump(struct event_mailbox *mbox) 146static void wl1271_event_mbox_dump(struct event_mailbox *mbox)
47{ 147{
48 wl1271_debug(DEBUG_EVENT, "MBOX DUMP:"); 148 wl1271_debug(DEBUG_EVENT, "MBOX DUMP:");
@@ -54,10 +154,12 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)
54{ 154{
55 int ret; 155 int ret;
56 u32 vector; 156 u32 vector;
157 bool beacon_loss = false;
57 158
58 wl1271_event_mbox_dump(mbox); 159 wl1271_event_mbox_dump(mbox);
59 160
60 vector = mbox->events_vector & ~(mbox->events_mask); 161 vector = le32_to_cpu(mbox->events_vector);
162 vector &= ~(le32_to_cpu(mbox->events_mask));
61 wl1271_debug(DEBUG_EVENT, "vector: 0x%x", vector); 163 wl1271_debug(DEBUG_EVENT, "vector: 0x%x", vector);
62 164
63 if (vector & SCAN_COMPLETE_EVENT_ID) { 165 if (vector & SCAN_COMPLETE_EVENT_ID) {
@@ -66,14 +168,35 @@ static int wl1271_event_process(struct wl1271 *wl, struct event_mailbox *mbox)
66 return ret; 168 return ret;
67 } 169 }
68 170
69 if (vector & BSS_LOSE_EVENT_ID) { 171 /*
172 * The BSS_LOSE_EVENT_ID is only needed while psm (and hence beacon
173 * filtering) is enabled. Without PSM, the stack will receive all
174 * beacons and can detect beacon loss by itself.
175 */
176 if (vector & BSS_LOSE_EVENT_ID &&
177 test_bit(WL1271_FLAG_PSM, &wl->flags)) {
70 wl1271_debug(DEBUG_EVENT, "BSS_LOSE_EVENT"); 178 wl1271_debug(DEBUG_EVENT, "BSS_LOSE_EVENT");
71 179
72 if (wl->psm_requested && wl->psm) { 180 /* indicate to the stack, that beacons have been lost */
73 ret = wl1271_ps_set_mode(wl, STATION_ACTIVE_MODE); 181 beacon_loss = true;
74 if (ret < 0) 182 }
75 return ret; 183
76 } 184 if (vector & PS_REPORT_EVENT_ID) {
185 wl1271_debug(DEBUG_EVENT, "PS_REPORT_EVENT");
186 ret = wl1271_event_ps_report(wl, mbox, &beacon_loss);
187 if (ret < 0)
188 return ret;
189 }
190
191 if (wl->vif && beacon_loss) {
192 /* Obviously, it's dangerous to release the mutex while
193 we are holding many of the variables in the wl struct.
194 That's why it's done last in the function, and care must
195 be taken that nothing more is done after this function
196 returns. */
197 mutex_unlock(&wl->mutex);
198 ieee80211_beacon_loss(wl->vif);
199 mutex_lock(&wl->mutex);
77 } 200 }
78 201
79 return 0; 202 return 0;
@@ -92,7 +215,7 @@ int wl1271_event_unmask(struct wl1271 *wl)
92 215
93void wl1271_event_mbox_config(struct wl1271 *wl) 216void wl1271_event_mbox_config(struct wl1271 *wl)
94{ 217{
95 wl->mbox_ptr[0] = wl1271_reg_read32(wl, REG_EVENT_MAILBOX_PTR); 218 wl->mbox_ptr[0] = wl1271_read32(wl, REG_EVENT_MAILBOX_PTR);
96 wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox); 219 wl->mbox_ptr[1] = wl->mbox_ptr[0] + sizeof(struct event_mailbox);
97 220
98 wl1271_debug(DEBUG_EVENT, "MBOX ptrs: 0x%x 0x%x", 221 wl1271_debug(DEBUG_EVENT, "MBOX ptrs: 0x%x 0x%x",
@@ -110,8 +233,8 @@ int wl1271_event_handle(struct wl1271 *wl, u8 mbox_num)
110 return -EINVAL; 233 return -EINVAL;
111 234
112 /* first we read the mbox descriptor */ 235 /* first we read the mbox descriptor */
113 wl1271_spi_mem_read(wl, wl->mbox_ptr[mbox_num], &mbox, 236 wl1271_read(wl, wl->mbox_ptr[mbox_num], &mbox,
114 sizeof(struct event_mailbox)); 237 sizeof(struct event_mailbox), false);
115 238
116 /* process the descriptor */ 239 /* process the descriptor */
117 ret = wl1271_event_process(wl, &mbox); 240 ret = wl1271_event_process(wl, &mbox);
@@ -119,7 +242,7 @@ int wl1271_event_handle(struct wl1271 *wl, u8 mbox_num)
119 return ret; 242 return ret;
120 243
121 /* then we let the firmware know it can go on...*/ 244 /* then we let the firmware know it can go on...*/
122 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_EVENT_ACK); 245 wl1271_write32(wl, ACX_REG_INTERRUPT_TRIG, INTR_TRIG_EVENT_ACK);
123 246
124 return 0; 247 return 0;
125} 248}
diff --git a/drivers/net/wireless/wl12xx/wl1271_event.h b/drivers/net/wireless/wl12xx/wl1271_event.h
index 2cdce7c34bf0..278f9206aa56 100644
--- a/drivers/net/wireless/wl12xx/wl1271_event.h
+++ b/drivers/net/wireless/wl12xx/wl1271_event.h
@@ -63,36 +63,43 @@ enum {
63 EVENT_MBOX_ALL_EVENT_ID = 0x7fffffff, 63 EVENT_MBOX_ALL_EVENT_ID = 0x7fffffff,
64}; 64};
65 65
66enum {
67 EVENT_ENTER_POWER_SAVE_FAIL = 0,
68 EVENT_ENTER_POWER_SAVE_SUCCESS,
69 EVENT_EXIT_POWER_SAVE_FAIL,
70 EVENT_EXIT_POWER_SAVE_SUCCESS,
71};
72
66struct event_debug_report { 73struct event_debug_report {
67 u8 debug_event_id; 74 u8 debug_event_id;
68 u8 num_params; 75 u8 num_params;
69 u16 pad; 76 __le16 pad;
70 u32 report_1; 77 __le32 report_1;
71 u32 report_2; 78 __le32 report_2;
72 u32 report_3; 79 __le32 report_3;
73} __attribute__ ((packed)); 80} __attribute__ ((packed));
74 81
75#define NUM_OF_RSSI_SNR_TRIGGERS 8 82#define NUM_OF_RSSI_SNR_TRIGGERS 8
76 83
77struct event_mailbox { 84struct event_mailbox {
78 u32 events_vector; 85 __le32 events_vector;
79 u32 events_mask; 86 __le32 events_mask;
80 u32 reserved_1; 87 __le32 reserved_1;
81 u32 reserved_2; 88 __le32 reserved_2;
82 89
83 u8 dbg_event_id; 90 u8 dbg_event_id;
84 u8 num_relevant_params; 91 u8 num_relevant_params;
85 u16 reserved_3; 92 __le16 reserved_3;
86 u32 event_report_p1; 93 __le32 event_report_p1;
87 u32 event_report_p2; 94 __le32 event_report_p2;
88 u32 event_report_p3; 95 __le32 event_report_p3;
89 96
90 u8 number_of_scan_results; 97 u8 number_of_scan_results;
91 u8 scan_tag; 98 u8 scan_tag;
92 u8 reserved_4[2]; 99 u8 reserved_4[2];
93 u32 compl_scheduled_scan_status; 100 __le32 compl_scheduled_scan_status;
94 101
95 u16 scheduled_scan_attended_channels; 102 __le16 scheduled_scan_attended_channels;
96 u8 soft_gemini_sense_info; 103 u8 soft_gemini_sense_info;
97 u8 soft_gemini_protective_info; 104 u8 soft_gemini_protective_info;
98 s8 rssi_snr_trigger_metric[NUM_OF_RSSI_SNR_TRIGGERS]; 105 s8 rssi_snr_trigger_metric[NUM_OF_RSSI_SNR_TRIGGERS];
diff --git a/drivers/net/wireless/wl12xx/wl1271_init.c b/drivers/net/wireless/wl12xx/wl1271_init.c
index 490df217605a..d189e8fe05a6 100644
--- a/drivers/net/wireless/wl12xx/wl1271_init.c
+++ b/drivers/net/wireless/wl12xx/wl1271_init.c
@@ -23,6 +23,7 @@
23 23
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/module.h> 25#include <linux/module.h>
26#include <linux/slab.h>
26 27
27#include "wl1271_init.h" 28#include "wl1271_init.h"
28#include "wl12xx_80211.h" 29#include "wl12xx_80211.h"
@@ -49,7 +50,7 @@ static int wl1271_init_hwenc_config(struct wl1271 *wl)
49 return 0; 50 return 0;
50} 51}
51 52
52static int wl1271_init_templates_config(struct wl1271 *wl) 53int wl1271_init_templates_config(struct wl1271 *wl)
53{ 54{
54 int ret; 55 int ret;
55 56
@@ -59,6 +60,14 @@ static int wl1271_init_templates_config(struct wl1271 *wl)
59 if (ret < 0) 60 if (ret < 0)
60 return ret; 61 return ret;
61 62
63 if (wl1271_11a_enabled()) {
64 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_CFG_PROBE_REQ_5,
65 NULL,
66 sizeof(struct wl12xx_probe_req_template));
67 if (ret < 0)
68 return ret;
69 }
70
62 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_NULL_DATA, NULL, 71 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_NULL_DATA, NULL,
63 sizeof(struct wl12xx_null_data_template)); 72 sizeof(struct wl12xx_null_data_template));
64 if (ret < 0) 73 if (ret < 0)
@@ -94,7 +103,7 @@ static int wl1271_init_rx_config(struct wl1271 *wl, u32 config, u32 filter)
94{ 103{
95 int ret; 104 int ret;
96 105
97 ret = wl1271_acx_rx_msdu_life_time(wl, RX_MSDU_LIFETIME_DEF); 106 ret = wl1271_acx_rx_msdu_life_time(wl);
98 if (ret < 0) 107 if (ret < 0)
99 return ret; 108 return ret;
100 109
@@ -105,7 +114,7 @@ static int wl1271_init_rx_config(struct wl1271 *wl, u32 config, u32 filter)
105 return 0; 114 return 0;
106} 115}
107 116
108static int wl1271_init_phy_config(struct wl1271 *wl) 117int wl1271_init_phy_config(struct wl1271 *wl)
109{ 118{
110 int ret; 119 int ret;
111 120
@@ -117,7 +126,7 @@ static int wl1271_init_phy_config(struct wl1271 *wl)
117 if (ret < 0) 126 if (ret < 0)
118 return ret; 127 return ret;
119 128
120 ret = wl1271_acx_group_address_tbl(wl); 129 ret = wl1271_acx_group_address_tbl(wl, true, NULL, 0);
121 if (ret < 0) 130 if (ret < 0)
122 return ret; 131 return ret;
123 132
@@ -125,7 +134,7 @@ static int wl1271_init_phy_config(struct wl1271 *wl)
125 if (ret < 0) 134 if (ret < 0)
126 return ret; 135 return ret;
127 136
128 ret = wl1271_acx_rts_threshold(wl, RTS_THRESHOLD_DEF); 137 ret = wl1271_acx_rts_threshold(wl, wl->conf.rx.rts_threshold);
129 if (ret < 0) 138 if (ret < 0)
130 return ret; 139 return ret;
131 140
@@ -136,7 +145,8 @@ static int wl1271_init_beacon_filter(struct wl1271 *wl)
136{ 145{
137 int ret; 146 int ret;
138 147
139 ret = wl1271_acx_beacon_filter_opt(wl); 148 /* disable beacon filtering at this stage */
149 ret = wl1271_acx_beacon_filter_opt(wl, false);
140 if (ret < 0) 150 if (ret < 0)
141 return ret; 151 return ret;
142 152
@@ -147,7 +157,7 @@ static int wl1271_init_beacon_filter(struct wl1271 *wl)
147 return 0; 157 return 0;
148} 158}
149 159
150static int wl1271_init_pta(struct wl1271 *wl) 160int wl1271_init_pta(struct wl1271 *wl)
151{ 161{
152 int ret; 162 int ret;
153 163
@@ -162,7 +172,7 @@ static int wl1271_init_pta(struct wl1271 *wl)
162 return 0; 172 return 0;
163} 173}
164 174
165static int wl1271_init_energy_detection(struct wl1271 *wl) 175int wl1271_init_energy_detection(struct wl1271 *wl)
166{ 176{
167 int ret; 177 int ret;
168 178
@@ -184,118 +194,17 @@ static int wl1271_init_beacon_broadcast(struct wl1271 *wl)
184 return 0; 194 return 0;
185} 195}
186 196
187static int wl1271_init_general_parms(struct wl1271 *wl)
188{
189 struct wl1271_general_parms *gen_parms;
190 int ret;
191
192 gen_parms = kzalloc(sizeof(*gen_parms), GFP_KERNEL);
193 if (!gen_parms)
194 return -ENOMEM;
195
196 gen_parms->id = TEST_CMD_INI_FILE_GENERAL_PARAM;
197
198 gen_parms->ref_clk = REF_CLK_38_4_E;
199 /* FIXME: magic numbers */
200 gen_parms->settling_time = 5;
201 gen_parms->clk_valid_on_wakeup = 0;
202 gen_parms->dc2dcmode = 0;
203 gen_parms->single_dual_band = 0;
204 gen_parms->tx_bip_fem_autodetect = 1;
205 gen_parms->tx_bip_fem_manufacturer = 1;
206 gen_parms->settings = 1;
207
208 ret = wl1271_cmd_test(wl, gen_parms, sizeof(*gen_parms), 0);
209 if (ret < 0) {
210 wl1271_warning("CMD_INI_FILE_GENERAL_PARAM failed");
211 return ret;
212 }
213
214 kfree(gen_parms);
215 return 0;
216}
217
218static int wl1271_init_radio_parms(struct wl1271 *wl)
219{
220 /*
221 * FIXME: All these magic numbers should be moved to some place where
222 * they can be configured (separate file?)
223 */
224
225 struct wl1271_radio_parms *radio_parms;
226 int ret;
227 u8 compensation[] = { 0xec, 0xf6, 0x00, 0x0c, 0x18, 0xf8, 0xfc, 0x00,
228 0x08, 0x10, 0xf0, 0xf8, 0x00, 0x0a, 0x14 };
229
230 u8 tx_rate_limits_normal[] = { 0x1e, 0x1f, 0x22, 0x24, 0x28, 0x29 };
231 u8 tx_rate_limits_degraded[] = { 0x1b, 0x1c, 0x1e, 0x20, 0x24, 0x25 };
232
233 u8 tx_channel_limits_11b[] = { 0x22, 0x50, 0x50, 0x50,
234 0x50, 0x50, 0x50, 0x50,
235 0x50, 0x50, 0x22, 0x50,
236 0x22, 0x50 };
237
238 u8 tx_channel_limits_ofdm[] = { 0x20, 0x50, 0x50, 0x50,
239 0x50, 0x50, 0x50, 0x50,
240 0x50, 0x50, 0x20, 0x50,
241 0x20, 0x50 };
242
243 u8 tx_pdv_rate_offsets[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
244
245 u8 tx_ibias[] = { 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, 0x27 };
246
247 radio_parms = kzalloc(sizeof(*radio_parms), GFP_KERNEL);
248 if (!radio_parms)
249 return -ENOMEM;
250
251 radio_parms->id = TEST_CMD_INI_FILE_RADIO_PARAM;
252
253 /* Static radio parameters */
254 radio_parms->rx_trace_loss = 10;
255 radio_parms->tx_trace_loss = 10;
256 memcpy(radio_parms->rx_rssi_and_proc_compens, compensation,
257 sizeof(compensation));
258
259 /* We don't set the 5GHz -- N/A */
260
261 /* Dynamic radio parameters */
262 radio_parms->tx_ref_pd_voltage = cpu_to_le16(0x24e);
263 radio_parms->tx_ref_power = 0x78;
264 radio_parms->tx_offset_db = 0x0;
265
266 memcpy(radio_parms->tx_rate_limits_normal, tx_rate_limits_normal,
267 sizeof(tx_rate_limits_normal));
268 memcpy(radio_parms->tx_rate_limits_degraded, tx_rate_limits_degraded,
269 sizeof(tx_rate_limits_degraded));
270
271 memcpy(radio_parms->tx_channel_limits_11b, tx_channel_limits_11b,
272 sizeof(tx_channel_limits_11b));
273 memcpy(radio_parms->tx_channel_limits_ofdm, tx_channel_limits_ofdm,
274 sizeof(tx_channel_limits_ofdm));
275 memcpy(radio_parms->tx_pdv_rate_offsets, tx_pdv_rate_offsets,
276 sizeof(tx_pdv_rate_offsets));
277 memcpy(radio_parms->tx_ibias, tx_ibias,
278 sizeof(tx_ibias));
279
280 radio_parms->rx_fem_insertion_loss = 0x14;
281
282 ret = wl1271_cmd_test(wl, radio_parms, sizeof(*radio_parms), 0);
283 if (ret < 0)
284 wl1271_warning("CMD_INI_FILE_RADIO_PARAM failed");
285
286 kfree(radio_parms);
287 return ret;
288}
289
290int wl1271_hw_init(struct wl1271 *wl) 197int wl1271_hw_init(struct wl1271 *wl)
291{ 198{
292 int ret; 199 struct conf_tx_ac_category *conf_ac;
200 struct conf_tx_tid *conf_tid;
201 int ret, i;
293 202
294 ret = wl1271_init_general_parms(wl); 203 ret = wl1271_cmd_general_parms(wl);
295 if (ret < 0) 204 if (ret < 0)
296 return ret; 205 return ret;
297 206
298 ret = wl1271_init_radio_parms(wl); 207 ret = wl1271_cmd_radio_parms(wl);
299 if (ret < 0) 208 if (ret < 0)
300 return ret; 209 return ret;
301 210
@@ -311,8 +220,8 @@ int wl1271_hw_init(struct wl1271 *wl)
311 220
312 /* RX config */ 221 /* RX config */
313 ret = wl1271_init_rx_config(wl, 222 ret = wl1271_init_rx_config(wl,
314 RX_CFG_PROMISCUOUS | RX_CFG_TSF, 223 RX_CFG_PROMISCUOUS | RX_CFG_TSF,
315 RX_FILTER_OPTION_DEF); 224 RX_FILTER_OPTION_DEF);
316 /* RX_CONFIG_OPTION_ANY_DST_ANY_BSS, 225 /* RX_CONFIG_OPTION_ANY_DST_ANY_BSS,
317 RX_FILTER_OPTION_FILTER_ALL); */ 226 RX_FILTER_OPTION_FILTER_ALL); */
318 if (ret < 0) 227 if (ret < 0)
@@ -323,6 +232,15 @@ int wl1271_hw_init(struct wl1271 *wl)
323 if (ret < 0) 232 if (ret < 0)
324 goto out_free_memmap; 233 goto out_free_memmap;
325 234
235 ret = wl1271_acx_dco_itrim_params(wl);
236 if (ret < 0)
237 goto out_free_memmap;
238
239 /* Initialize connection monitoring thresholds */
240 ret = wl1271_acx_conn_monit_params(wl);
241 if (ret < 0)
242 goto out_free_memmap;
243
326 /* Beacon filtering */ 244 /* Beacon filtering */
327 ret = wl1271_init_beacon_filter(wl); 245 ret = wl1271_init_beacon_filter(wl);
328 if (ret < 0) 246 if (ret < 0)
@@ -359,14 +277,28 @@ int wl1271_hw_init(struct wl1271 *wl)
359 goto out_free_memmap; 277 goto out_free_memmap;
360 278
361 /* Default TID configuration */ 279 /* Default TID configuration */
362 ret = wl1271_acx_tid_cfg(wl); 280 for (i = 0; i < wl->conf.tx.tid_conf_count; i++) {
363 if (ret < 0) 281 conf_tid = &wl->conf.tx.tid_conf[i];
364 goto out_free_memmap; 282 ret = wl1271_acx_tid_cfg(wl, conf_tid->queue_id,
283 conf_tid->channel_type,
284 conf_tid->tsid,
285 conf_tid->ps_scheme,
286 conf_tid->ack_policy,
287 conf_tid->apsd_conf[0],
288 conf_tid->apsd_conf[1]);
289 if (ret < 0)
290 goto out_free_memmap;
291 }
365 292
366 /* Default AC configuration */ 293 /* Default AC configuration */
367 ret = wl1271_acx_ac_cfg(wl); 294 for (i = 0; i < wl->conf.tx.ac_conf_count; i++) {
368 if (ret < 0) 295 conf_ac = &wl->conf.tx.ac_conf[i];
369 goto out_free_memmap; 296 ret = wl1271_acx_ac_cfg(wl, conf_ac->ac, conf_ac->cw_min,
297 conf_ac->cw_max, conf_ac->aifsn,
298 conf_ac->tx_op_limit);
299 if (ret < 0)
300 goto out_free_memmap;
301 }
370 302
371 /* Configure TX rate classes */ 303 /* Configure TX rate classes */
372 ret = wl1271_acx_rate_policies(wl); 304 ret = wl1271_acx_rate_policies(wl);
@@ -374,7 +306,7 @@ int wl1271_hw_init(struct wl1271 *wl)
374 goto out_free_memmap; 306 goto out_free_memmap;
375 307
376 /* Enable data path */ 308 /* Enable data path */
377 ret = wl1271_cmd_data_path(wl, wl->channel, 1); 309 ret = wl1271_cmd_data_path(wl, 1);
378 if (ret < 0) 310 if (ret < 0)
379 goto out_free_memmap; 311 goto out_free_memmap;
380 312
@@ -388,10 +320,16 @@ int wl1271_hw_init(struct wl1271 *wl)
388 if (ret < 0) 320 if (ret < 0)
389 goto out_free_memmap; 321 goto out_free_memmap;
390 322
323 /* configure PM */
324 ret = wl1271_acx_pm_config(wl);
325 if (ret < 0)
326 goto out_free_memmap;
327
391 return 0; 328 return 0;
392 329
393 out_free_memmap: 330 out_free_memmap:
394 kfree(wl->target_mem_map); 331 kfree(wl->target_mem_map);
332 wl->target_mem_map = NULL;
395 333
396 return ret; 334 return ret;
397} 335}
diff --git a/drivers/net/wireless/wl12xx/wl1271_init.h b/drivers/net/wireless/wl12xx/wl1271_init.h
index bd8ff0fa2272..bc26f8c53b91 100644
--- a/drivers/net/wireless/wl12xx/wl1271_init.h
+++ b/drivers/net/wireless/wl12xx/wl1271_init.h
@@ -27,89 +27,10 @@
27#include "wl1271.h" 27#include "wl1271.h"
28 28
29int wl1271_hw_init_power_auth(struct wl1271 *wl); 29int wl1271_hw_init_power_auth(struct wl1271 *wl);
30int wl1271_init_templates_config(struct wl1271 *wl);
31int wl1271_init_phy_config(struct wl1271 *wl);
32int wl1271_init_pta(struct wl1271 *wl);
33int wl1271_init_energy_detection(struct wl1271 *wl);
30int wl1271_hw_init(struct wl1271 *wl); 34int wl1271_hw_init(struct wl1271 *wl);
31 35
32/* These are not really a TEST_CMD, but the ref driver uses them as such */
33#define TEST_CMD_INI_FILE_RADIO_PARAM 0x19
34#define TEST_CMD_INI_FILE_GENERAL_PARAM 0x1E
35
36struct wl1271_general_parms {
37 u8 id;
38 u8 padding[3];
39
40 u8 ref_clk;
41 u8 settling_time;
42 u8 clk_valid_on_wakeup;
43 u8 dc2dcmode;
44 u8 single_dual_band;
45
46 u8 tx_bip_fem_autodetect;
47 u8 tx_bip_fem_manufacturer;
48 u8 settings;
49} __attribute__ ((packed));
50
51enum ref_clk_enum {
52 REF_CLK_19_2_E,
53 REF_CLK_26_E,
54 REF_CLK_38_4_E,
55 REF_CLK_52_E
56};
57
58#define RSSI_AND_PROCESS_COMPENSATION_SIZE 15
59#define NUMBER_OF_SUB_BANDS_5 7
60#define NUMBER_OF_RATE_GROUPS 6
61#define NUMBER_OF_CHANNELS_2_4 14
62#define NUMBER_OF_CHANNELS_5 35
63
64struct wl1271_radio_parms {
65 u8 id;
66 u8 padding[3];
67
68 /* Static radio parameters */
69 /* 2.4GHz */
70 u8 rx_trace_loss;
71 u8 tx_trace_loss;
72 s8 rx_rssi_and_proc_compens[RSSI_AND_PROCESS_COMPENSATION_SIZE];
73
74 /* 5GHz */
75 u8 rx_trace_loss_5[NUMBER_OF_SUB_BANDS_5];
76 u8 tx_trace_loss_5[NUMBER_OF_SUB_BANDS_5];
77 s8 rx_rssi_and_proc_compens_5[RSSI_AND_PROCESS_COMPENSATION_SIZE];
78
79 /* Dynamic radio parameters */
80 /* 2.4GHz */
81 s16 tx_ref_pd_voltage;
82 s8 tx_ref_power;
83 s8 tx_offset_db;
84
85 s8 tx_rate_limits_normal[NUMBER_OF_RATE_GROUPS];
86 s8 tx_rate_limits_degraded[NUMBER_OF_RATE_GROUPS];
87
88 s8 tx_channel_limits_11b[NUMBER_OF_CHANNELS_2_4];
89 s8 tx_channel_limits_ofdm[NUMBER_OF_CHANNELS_2_4];
90 s8 tx_pdv_rate_offsets[NUMBER_OF_RATE_GROUPS];
91
92 u8 tx_ibias[NUMBER_OF_RATE_GROUPS];
93 u8 rx_fem_insertion_loss;
94
95 u8 padding2;
96
97 /* 5GHz */
98 s16 tx_ref_pd_voltage_5[NUMBER_OF_SUB_BANDS_5];
99 s8 tx_ref_power_5[NUMBER_OF_SUB_BANDS_5];
100 s8 tx_offset_db_5[NUMBER_OF_SUB_BANDS_5];
101
102 s8 tx_rate_limits_normal_5[NUMBER_OF_RATE_GROUPS];
103 s8 tx_rate_limits_degraded_5[NUMBER_OF_RATE_GROUPS];
104
105 s8 tx_channel_limits_ofdm_5[NUMBER_OF_CHANNELS_5];
106 s8 tx_pdv_rate_offsets_5[NUMBER_OF_RATE_GROUPS];
107
108 /* FIXME: this is inconsistent with the types for 2.4GHz */
109 s8 tx_ibias_5[NUMBER_OF_RATE_GROUPS];
110 s8 rx_fem_insertion_loss_5[NUMBER_OF_SUB_BANDS_5];
111
112 u8 padding3[2];
113} __attribute__ ((packed));
114
115#endif 36#endif
diff --git a/drivers/net/wireless/wl12xx/wl1271_io.c b/drivers/net/wireless/wl12xx/wl1271_io.c
new file mode 100644
index 000000000000..5cd94d5666c2
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl1271_io.c
@@ -0,0 +1,213 @@
1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 2008-2010 Nokia Corporation
5 *
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/module.h>
25#include <linux/platform_device.h>
26#include <linux/crc7.h>
27#include <linux/spi/spi.h>
28
29#include "wl1271.h"
30#include "wl12xx_80211.h"
31#include "wl1271_spi.h"
32#include "wl1271_io.h"
33
34static int wl1271_translate_addr(struct wl1271 *wl, int addr)
35{
36 /*
37 * To translate, first check to which window of addresses the
38 * particular address belongs. Then subtract the starting address
39 * of that window from the address. Then, add offset of the
40 * translated region.
41 *
42 * The translated regions occur next to each other in physical device
43 * memory, so just add the sizes of the preceeding address regions to
44 * get the offset to the new region.
45 *
46 * Currently, only the two first regions are addressed, and the
47 * assumption is that all addresses will fall into either of those
48 * two.
49 */
50 if ((addr >= wl->part.reg.start) &&
51 (addr < wl->part.reg.start + wl->part.reg.size))
52 return addr - wl->part.reg.start + wl->part.mem.size;
53 else
54 return addr - wl->part.mem.start;
55}
56
57/* Set the SPI partitions to access the chip addresses
58 *
59 * To simplify driver code, a fixed (virtual) memory map is defined for
60 * register and memory addresses. Because in the chipset, in different stages
61 * of operation, those addresses will move around, an address translation
62 * mechanism is required.
63 *
64 * There are four partitions (three memory and one register partition),
65 * which are mapped to two different areas of the hardware memory.
66 *
67 * Virtual address
68 * space
69 *
70 * | |
71 * ...+----+--> mem.start
72 * Physical address ... | |
73 * space ... | | [PART_0]
74 * ... | |
75 * 00000000 <--+----+... ...+----+--> mem.start + mem.size
76 * | | ... | |
77 * |MEM | ... | |
78 * | | ... | |
79 * mem.size <--+----+... | | {unused area)
80 * | | ... | |
81 * |REG | ... | |
82 * mem.size | | ... | |
83 * + <--+----+... ...+----+--> reg.start
84 * reg.size | | ... | |
85 * |MEM2| ... | | [PART_1]
86 * | | ... | |
87 * ...+----+--> reg.start + reg.size
88 * | |
89 *
90 */
91int wl1271_set_partition(struct wl1271 *wl,
92 struct wl1271_partition_set *p)
93{
94 /* copy partition info */
95 memcpy(&wl->part, p, sizeof(*p));
96
97 wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
98 p->mem.start, p->mem.size);
99 wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
100 p->reg.start, p->reg.size);
101 wl1271_debug(DEBUG_SPI, "mem2_start %08X mem2_size %08X",
102 p->mem2.start, p->mem2.size);
103 wl1271_debug(DEBUG_SPI, "mem3_start %08X mem3_size %08X",
104 p->mem3.start, p->mem3.size);
105
106 /* write partition info to the chipset */
107 wl1271_raw_write32(wl, HW_PART0_START_ADDR, p->mem.start);
108 wl1271_raw_write32(wl, HW_PART0_SIZE_ADDR, p->mem.size);
109 wl1271_raw_write32(wl, HW_PART1_START_ADDR, p->reg.start);
110 wl1271_raw_write32(wl, HW_PART1_SIZE_ADDR, p->reg.size);
111 wl1271_raw_write32(wl, HW_PART2_START_ADDR, p->mem2.start);
112 wl1271_raw_write32(wl, HW_PART2_SIZE_ADDR, p->mem2.size);
113 wl1271_raw_write32(wl, HW_PART3_START_ADDR, p->mem3.start);
114
115 return 0;
116}
117
118void wl1271_io_reset(struct wl1271 *wl)
119{
120 wl1271_spi_reset(wl);
121}
122
123void wl1271_io_init(struct wl1271 *wl)
124{
125 wl1271_spi_init(wl);
126}
127
128void wl1271_raw_write(struct wl1271 *wl, int addr, void *buf,
129 size_t len, bool fixed)
130{
131 wl1271_spi_raw_write(wl, addr, buf, len, fixed);
132}
133
134void wl1271_raw_read(struct wl1271 *wl, int addr, void *buf,
135 size_t len, bool fixed)
136{
137 wl1271_spi_raw_read(wl, addr, buf, len, fixed);
138}
139
140void wl1271_read(struct wl1271 *wl, int addr, void *buf, size_t len,
141 bool fixed)
142{
143 int physical;
144
145 physical = wl1271_translate_addr(wl, addr);
146
147 wl1271_spi_raw_read(wl, physical, buf, len, fixed);
148}
149
150void wl1271_write(struct wl1271 *wl, int addr, void *buf, size_t len,
151 bool fixed)
152{
153 int physical;
154
155 physical = wl1271_translate_addr(wl, addr);
156
157 wl1271_spi_raw_write(wl, physical, buf, len, fixed);
158}
159
160u32 wl1271_read32(struct wl1271 *wl, int addr)
161{
162 return wl1271_raw_read32(wl, wl1271_translate_addr(wl, addr));
163}
164
165void wl1271_write32(struct wl1271 *wl, int addr, u32 val)
166{
167 wl1271_raw_write32(wl, wl1271_translate_addr(wl, addr), val);
168}
169
170void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val)
171{
172 /* write address >> 1 + 0x30000 to OCP_POR_CTR */
173 addr = (addr >> 1) + 0x30000;
174 wl1271_write32(wl, OCP_POR_CTR, addr);
175
176 /* write value to OCP_POR_WDATA */
177 wl1271_write32(wl, OCP_DATA_WRITE, val);
178
179 /* write 1 to OCP_CMD */
180 wl1271_write32(wl, OCP_CMD, OCP_CMD_WRITE);
181}
182
183u16 wl1271_top_reg_read(struct wl1271 *wl, int addr)
184{
185 u32 val;
186 int timeout = OCP_CMD_LOOP;
187
188 /* write address >> 1 + 0x30000 to OCP_POR_CTR */
189 addr = (addr >> 1) + 0x30000;
190 wl1271_write32(wl, OCP_POR_CTR, addr);
191
192 /* write 2 to OCP_CMD */
193 wl1271_write32(wl, OCP_CMD, OCP_CMD_READ);
194
195 /* poll for data ready */
196 do {
197 val = wl1271_read32(wl, OCP_DATA_READ);
198 } while (!(val & OCP_READY_MASK) && --timeout);
199
200 if (!timeout) {
201 wl1271_warning("Top register access timed out.");
202 return 0xffff;
203 }
204
205 /* check data status and return if OK */
206 if ((val & OCP_STATUS_MASK) == OCP_STATUS_OK)
207 return val & 0xffff;
208 else {
209 wl1271_warning("Top register access returned error.");
210 return 0xffff;
211 }
212}
213
diff --git a/drivers/net/wireless/wl12xx/wl1271_io.h b/drivers/net/wireless/wl12xx/wl1271_io.h
new file mode 100644
index 000000000000..fa9a0b35788f
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl1271_io.h
@@ -0,0 +1,68 @@
1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2010 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL1271_IO_H__
26#define __WL1271_IO_H__
27
28struct wl1271;
29
30void wl1271_io_reset(struct wl1271 *wl);
31void wl1271_io_init(struct wl1271 *wl);
32
33/* Raw target IO, address is not translated */
34void wl1271_raw_write(struct wl1271 *wl, int addr, void *buf,
35 size_t len, bool fixed);
36void wl1271_raw_read(struct wl1271 *wl, int addr, void *buf,
37 size_t len, bool fixed);
38
39/* Translated target IO */
40void wl1271_read(struct wl1271 *wl, int addr, void *buf, size_t len,
41 bool fixed);
42void wl1271_write(struct wl1271 *wl, int addr, void *buf, size_t len,
43 bool fixed);
44u32 wl1271_read32(struct wl1271 *wl, int addr);
45void wl1271_write32(struct wl1271 *wl, int addr, u32 val);
46
47/* Top Register IO */
48void wl1271_top_reg_write(struct wl1271 *wl, int addr, u16 val);
49u16 wl1271_top_reg_read(struct wl1271 *wl, int addr);
50
51int wl1271_set_partition(struct wl1271 *wl,
52 struct wl1271_partition_set *p);
53
54static inline u32 wl1271_raw_read32(struct wl1271 *wl, int addr)
55{
56 wl1271_raw_read(wl, addr, &wl->buffer_32,
57 sizeof(wl->buffer_32), false);
58
59 return wl->buffer_32;
60}
61
62static inline void wl1271_raw_write32(struct wl1271 *wl, int addr, u32 val)
63{
64 wl->buffer_32 = val;
65 wl1271_raw_write(wl, addr, &wl->buffer_32,
66 sizeof(wl->buffer_32), false);
67}
68#endif
diff --git a/drivers/net/wireless/wl12xx/wl1271_main.c b/drivers/net/wireless/wl12xx/wl1271_main.c
index 27298b19d5bd..65a1aeba2419 100644
--- a/drivers/net/wireless/wl12xx/wl1271_main.c
+++ b/drivers/net/wireless/wl12xx/wl1271_main.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * This file is part of wl1271 2 * This file is part of wl1271
3 * 3 *
4 * Copyright (C) 2008-2009 Nokia Corporation 4 * Copyright (C) 2008-2010 Nokia Corporation
5 * 5 *
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com> 6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 * 7 *
@@ -30,12 +30,16 @@
30#include <linux/spi/spi.h> 30#include <linux/spi/spi.h>
31#include <linux/crc32.h> 31#include <linux/crc32.h>
32#include <linux/etherdevice.h> 32#include <linux/etherdevice.h>
33#include <linux/vmalloc.h>
33#include <linux/spi/wl12xx.h> 34#include <linux/spi/wl12xx.h>
35#include <linux/inetdevice.h>
36#include <linux/slab.h>
34 37
35#include "wl1271.h" 38#include "wl1271.h"
36#include "wl12xx_80211.h" 39#include "wl12xx_80211.h"
37#include "wl1271_reg.h" 40#include "wl1271_reg.h"
38#include "wl1271_spi.h" 41#include "wl1271_spi.h"
42#include "wl1271_io.h"
39#include "wl1271_event.h" 43#include "wl1271_event.h"
40#include "wl1271_tx.h" 44#include "wl1271_tx.h"
41#include "wl1271_rx.h" 45#include "wl1271_rx.h"
@@ -44,20 +48,321 @@
44#include "wl1271_debugfs.h" 48#include "wl1271_debugfs.h"
45#include "wl1271_cmd.h" 49#include "wl1271_cmd.h"
46#include "wl1271_boot.h" 50#include "wl1271_boot.h"
51#include "wl1271_testmode.h"
52
53#define WL1271_BOOT_RETRIES 3
54
55static struct conf_drv_settings default_conf = {
56 .sg = {
57 .per_threshold = 7500,
58 .max_scan_compensation_time = 120000,
59 .nfs_sample_interval = 400,
60 .load_ratio = 50,
61 .auto_ps_mode = 0,
62 .probe_req_compensation = 170,
63 .scan_window_compensation = 50,
64 .antenna_config = 0,
65 .beacon_miss_threshold = 60,
66 .rate_adaptation_threshold = CONF_HW_BIT_RATE_12MBPS,
67 .rate_adaptation_snr = 0
68 },
69 .rx = {
70 .rx_msdu_life_time = 512000,
71 .packet_detection_threshold = 0,
72 .ps_poll_timeout = 15,
73 .upsd_timeout = 15,
74 .rts_threshold = 2347,
75 .rx_cca_threshold = 0,
76 .irq_blk_threshold = 0xFFFF,
77 .irq_pkt_threshold = 0,
78 .irq_timeout = 600,
79 .queue_type = CONF_RX_QUEUE_TYPE_LOW_PRIORITY,
80 },
81 .tx = {
82 .tx_energy_detection = 0,
83 .rc_conf = {
84 .enabled_rates = CONF_HW_BIT_RATE_1MBPS |
85 CONF_HW_BIT_RATE_2MBPS,
86 .short_retry_limit = 10,
87 .long_retry_limit = 10,
88 .aflags = 0
89 },
90 .ac_conf_count = 4,
91 .ac_conf = {
92 [0] = {
93 .ac = CONF_TX_AC_BE,
94 .cw_min = 15,
95 .cw_max = 63,
96 .aifsn = 3,
97 .tx_op_limit = 0,
98 },
99 [1] = {
100 .ac = CONF_TX_AC_BK,
101 .cw_min = 15,
102 .cw_max = 63,
103 .aifsn = 7,
104 .tx_op_limit = 0,
105 },
106 [2] = {
107 .ac = CONF_TX_AC_VI,
108 .cw_min = 15,
109 .cw_max = 63,
110 .aifsn = CONF_TX_AIFS_PIFS,
111 .tx_op_limit = 3008,
112 },
113 [3] = {
114 .ac = CONF_TX_AC_VO,
115 .cw_min = 15,
116 .cw_max = 63,
117 .aifsn = CONF_TX_AIFS_PIFS,
118 .tx_op_limit = 1504,
119 },
120 },
121 .tid_conf_count = 7,
122 .tid_conf = {
123 [0] = {
124 .queue_id = 0,
125 .channel_type = CONF_CHANNEL_TYPE_DCF,
126 .tsid = CONF_TX_AC_BE,
127 .ps_scheme = CONF_PS_SCHEME_LEGACY,
128 .ack_policy = CONF_ACK_POLICY_LEGACY,
129 .apsd_conf = {0, 0},
130 },
131 [1] = {
132 .queue_id = 1,
133 .channel_type = CONF_CHANNEL_TYPE_DCF,
134 .tsid = CONF_TX_AC_BE,
135 .ps_scheme = CONF_PS_SCHEME_LEGACY,
136 .ack_policy = CONF_ACK_POLICY_LEGACY,
137 .apsd_conf = {0, 0},
138 },
139 [2] = {
140 .queue_id = 2,
141 .channel_type = CONF_CHANNEL_TYPE_DCF,
142 .tsid = CONF_TX_AC_BE,
143 .ps_scheme = CONF_PS_SCHEME_LEGACY,
144 .ack_policy = CONF_ACK_POLICY_LEGACY,
145 .apsd_conf = {0, 0},
146 },
147 [3] = {
148 .queue_id = 3,
149 .channel_type = CONF_CHANNEL_TYPE_DCF,
150 .tsid = CONF_TX_AC_BE,
151 .ps_scheme = CONF_PS_SCHEME_LEGACY,
152 .ack_policy = CONF_ACK_POLICY_LEGACY,
153 .apsd_conf = {0, 0},
154 },
155 [4] = {
156 .queue_id = 4,
157 .channel_type = CONF_CHANNEL_TYPE_DCF,
158 .tsid = CONF_TX_AC_BE,
159 .ps_scheme = CONF_PS_SCHEME_LEGACY,
160 .ack_policy = CONF_ACK_POLICY_LEGACY,
161 .apsd_conf = {0, 0},
162 },
163 [5] = {
164 .queue_id = 5,
165 .channel_type = CONF_CHANNEL_TYPE_DCF,
166 .tsid = CONF_TX_AC_BE,
167 .ps_scheme = CONF_PS_SCHEME_LEGACY,
168 .ack_policy = CONF_ACK_POLICY_LEGACY,
169 .apsd_conf = {0, 0},
170 },
171 [6] = {
172 .queue_id = 6,
173 .channel_type = CONF_CHANNEL_TYPE_DCF,
174 .tsid = CONF_TX_AC_BE,
175 .ps_scheme = CONF_PS_SCHEME_LEGACY,
176 .ack_policy = CONF_ACK_POLICY_LEGACY,
177 .apsd_conf = {0, 0},
178 }
179 },
180 .frag_threshold = IEEE80211_MAX_FRAG_THRESHOLD,
181 .tx_compl_timeout = 700,
182 .tx_compl_threshold = 4
183 },
184 .conn = {
185 .wake_up_event = CONF_WAKE_UP_EVENT_DTIM,
186 .listen_interval = 0,
187 .bcn_filt_mode = CONF_BCN_FILT_MODE_ENABLED,
188 .bcn_filt_ie_count = 1,
189 .bcn_filt_ie = {
190 [0] = {
191 .ie = WLAN_EID_CHANNEL_SWITCH,
192 .rule = CONF_BCN_RULE_PASS_ON_APPEARANCE,
193 }
194 },
195 .synch_fail_thold = 10,
196 .bss_lose_timeout = 100,
197 .beacon_rx_timeout = 10000,
198 .broadcast_timeout = 20000,
199 .rx_broadcast_in_ps = 1,
200 .ps_poll_threshold = 20,
201 .sig_trigger_count = 2,
202 .sig_trigger = {
203 [0] = {
204 .threshold = -75,
205 .pacing = 500,
206 .metric = CONF_TRIG_METRIC_RSSI_BEACON,
207 .type = CONF_TRIG_EVENT_TYPE_EDGE,
208 .direction = CONF_TRIG_EVENT_DIR_LOW,
209 .hysteresis = 2,
210 .index = 0,
211 .enable = 1
212 },
213 [1] = {
214 .threshold = -75,
215 .pacing = 500,
216 .metric = CONF_TRIG_METRIC_RSSI_BEACON,
217 .type = CONF_TRIG_EVENT_TYPE_EDGE,
218 .direction = CONF_TRIG_EVENT_DIR_HIGH,
219 .hysteresis = 2,
220 .index = 1,
221 .enable = 1
222 }
223 },
224 .sig_weights = {
225 .rssi_bcn_avg_weight = 10,
226 .rssi_pkt_avg_weight = 10,
227 .snr_bcn_avg_weight = 10,
228 .snr_pkt_avg_weight = 10
229 },
230 .bet_enable = CONF_BET_MODE_ENABLE,
231 .bet_max_consecutive = 10,
232 .psm_entry_retries = 3
233 },
234 .init = {
235 .radioparam = {
236 .fem = 1,
237 }
238 },
239 .itrim = {
240 .enable = false,
241 .timeout = 50000,
242 },
243 .pm_config = {
244 .host_clk_settling_time = 5000,
245 .host_fast_wakeup_support = false
246 }
247};
248
249static LIST_HEAD(wl_list);
250
251static void wl1271_conf_init(struct wl1271 *wl)
252{
253
254 /*
255 * This function applies the default configuration to the driver. This
256 * function is invoked upon driver load (spi probe.)
257 *
258 * The configuration is stored in a run-time structure in order to
259 * facilitate for run-time adjustment of any of the parameters. Making
260 * changes to the configuration structure will apply the new values on
261 * the next interface up (wl1271_op_start.)
262 */
263
264 /* apply driver default configuration */
265 memcpy(&wl->conf, &default_conf, sizeof(default_conf));
266}
267
47 268
48static int wl1271_plt_init(struct wl1271 *wl) 269static int wl1271_plt_init(struct wl1271 *wl)
49{ 270{
50 int ret; 271 struct conf_tx_ac_category *conf_ac;
272 struct conf_tx_tid *conf_tid;
273 int ret, i;
51 274
52 ret = wl1271_acx_init_mem_config(wl); 275 ret = wl1271_cmd_general_parms(wl);
276 if (ret < 0)
277 return ret;
278
279 ret = wl1271_cmd_radio_parms(wl);
53 if (ret < 0) 280 if (ret < 0)
54 return ret; 281 return ret;
55 282
56 ret = wl1271_cmd_data_path(wl, wl->channel, 1); 283 ret = wl1271_init_templates_config(wl);
57 if (ret < 0) 284 if (ret < 0)
58 return ret; 285 return ret;
59 286
287 ret = wl1271_acx_init_mem_config(wl);
288 if (ret < 0)
289 return ret;
290
291 /* PHY layer config */
292 ret = wl1271_init_phy_config(wl);
293 if (ret < 0)
294 goto out_free_memmap;
295
296 ret = wl1271_acx_dco_itrim_params(wl);
297 if (ret < 0)
298 goto out_free_memmap;
299
300 /* Initialize connection monitoring thresholds */
301 ret = wl1271_acx_conn_monit_params(wl);
302 if (ret < 0)
303 goto out_free_memmap;
304
305 /* Bluetooth WLAN coexistence */
306 ret = wl1271_init_pta(wl);
307 if (ret < 0)
308 goto out_free_memmap;
309
310 /* Energy detection */
311 ret = wl1271_init_energy_detection(wl);
312 if (ret < 0)
313 goto out_free_memmap;
314
315 /* Default fragmentation threshold */
316 ret = wl1271_acx_frag_threshold(wl);
317 if (ret < 0)
318 goto out_free_memmap;
319
320 /* Default TID configuration */
321 for (i = 0; i < wl->conf.tx.tid_conf_count; i++) {
322 conf_tid = &wl->conf.tx.tid_conf[i];
323 ret = wl1271_acx_tid_cfg(wl, conf_tid->queue_id,
324 conf_tid->channel_type,
325 conf_tid->tsid,
326 conf_tid->ps_scheme,
327 conf_tid->ack_policy,
328 conf_tid->apsd_conf[0],
329 conf_tid->apsd_conf[1]);
330 if (ret < 0)
331 goto out_free_memmap;
332 }
333
334 /* Default AC configuration */
335 for (i = 0; i < wl->conf.tx.ac_conf_count; i++) {
336 conf_ac = &wl->conf.tx.ac_conf[i];
337 ret = wl1271_acx_ac_cfg(wl, conf_ac->ac, conf_ac->cw_min,
338 conf_ac->cw_max, conf_ac->aifsn,
339 conf_ac->tx_op_limit);
340 if (ret < 0)
341 goto out_free_memmap;
342 }
343
344 /* Enable data path */
345 ret = wl1271_cmd_data_path(wl, 1);
346 if (ret < 0)
347 goto out_free_memmap;
348
349 /* Configure for CAM power saving (ie. always active) */
350 ret = wl1271_acx_sleep_auth(wl, WL1271_PSM_CAM);
351 if (ret < 0)
352 goto out_free_memmap;
353
354 /* configure PM */
355 ret = wl1271_acx_pm_config(wl);
356 if (ret < 0)
357 goto out_free_memmap;
358
60 return 0; 359 return 0;
360
361 out_free_memmap:
362 kfree(wl->target_mem_map);
363 wl->target_mem_map = NULL;
364
365 return ret;
61} 366}
62 367
63static void wl1271_disable_interrupts(struct wl1271 *wl) 368static void wl1271_disable_interrupts(struct wl1271 *wl)
@@ -68,27 +373,22 @@ static void wl1271_disable_interrupts(struct wl1271 *wl)
68static void wl1271_power_off(struct wl1271 *wl) 373static void wl1271_power_off(struct wl1271 *wl)
69{ 374{
70 wl->set_power(false); 375 wl->set_power(false);
376 clear_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
71} 377}
72 378
73static void wl1271_power_on(struct wl1271 *wl) 379static void wl1271_power_on(struct wl1271 *wl)
74{ 380{
75 wl->set_power(true); 381 wl->set_power(true);
382 set_bit(WL1271_FLAG_GPIO_POWER, &wl->flags);
76} 383}
77 384
78static void wl1271_fw_status(struct wl1271 *wl, struct wl1271_fw_status *status) 385static void wl1271_fw_status(struct wl1271 *wl,
386 struct wl1271_fw_status *status)
79{ 387{
80 u32 total = 0; 388 u32 total = 0;
81 int i; 389 int i;
82 390
83 /* 391 wl1271_read(wl, FW_STATUS_ADDR, status, sizeof(*status), false);
84 * FIXME: Reading the FW status directly from the registers seems to
85 * be the right thing to do, but it doesn't work. And in the
86 * reference driver, there is a workaround called
87 * USE_SDIO_24M_WORKAROUND, which reads the status from memory
88 * instead, so we do the same here.
89 */
90
91 wl1271_spi_mem_read(wl, STATUS_MEM_ADDRESS, status, sizeof(*status));
92 392
93 wl1271_debug(DEBUG_IRQ, "intr: 0x%x (fw_rx_counter = %d, " 393 wl1271_debug(DEBUG_IRQ, "intr: 0x%x (fw_rx_counter = %d, "
94 "drv_rx_counter = %d, tx_results_counter = %d)", 394 "drv_rx_counter = %d, tx_results_counter = %d)",
@@ -99,25 +399,28 @@ static void wl1271_fw_status(struct wl1271 *wl, struct wl1271_fw_status *status)
99 399
100 /* update number of available TX blocks */ 400 /* update number of available TX blocks */
101 for (i = 0; i < NUM_TX_QUEUES; i++) { 401 for (i = 0; i < NUM_TX_QUEUES; i++) {
102 u32 cnt = status->tx_released_blks[i] - wl->tx_blocks_freed[i]; 402 u32 cnt = le32_to_cpu(status->tx_released_blks[i]) -
103 wl->tx_blocks_freed[i] = status->tx_released_blks[i]; 403 wl->tx_blocks_freed[i];
404
405 wl->tx_blocks_freed[i] =
406 le32_to_cpu(status->tx_released_blks[i]);
104 wl->tx_blocks_available += cnt; 407 wl->tx_blocks_available += cnt;
105 total += cnt; 408 total += cnt;
106 } 409 }
107 410
108 /* if more blocks are available now, schedule some tx work */ 411 /* if more blocks are available now, schedule some tx work */
109 if (total && !skb_queue_empty(&wl->tx_queue)) 412 if (total && !skb_queue_empty(&wl->tx_queue))
110 schedule_work(&wl->tx_work); 413 ieee80211_queue_work(wl->hw, &wl->tx_work);
111 414
112 /* update the host-chipset time offset */ 415 /* update the host-chipset time offset */
113 wl->time_offset = jiffies_to_usecs(jiffies) - status->fw_localtime; 416 wl->time_offset = jiffies_to_usecs(jiffies) -
417 le32_to_cpu(status->fw_localtime);
114} 418}
115 419
116#define WL1271_IRQ_MAX_LOOPS 10
117static void wl1271_irq_work(struct work_struct *work) 420static void wl1271_irq_work(struct work_struct *work)
118{ 421{
119 u32 intr, ctr = WL1271_IRQ_MAX_LOOPS;
120 int ret; 422 int ret;
423 u32 intr;
121 struct wl1271 *wl = 424 struct wl1271 *wl =
122 container_of(work, struct wl1271, irq_work); 425 container_of(work, struct wl1271, irq_work);
123 426
@@ -132,9 +435,10 @@ static void wl1271_irq_work(struct work_struct *work)
132 if (ret < 0) 435 if (ret < 0)
133 goto out; 436 goto out;
134 437
135 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); 438 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);
136 439
137 intr = wl1271_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR); 440 wl1271_fw_status(wl, wl->fw_status);
441 intr = le32_to_cpu(wl->fw_status->intr);
138 if (!intr) { 442 if (!intr) {
139 wl1271_debug(DEBUG_IRQ, "Zero interrupt received."); 443 wl1271_debug(DEBUG_IRQ, "Zero interrupt received.");
140 goto out_sleep; 444 goto out_sleep;
@@ -142,47 +446,39 @@ static void wl1271_irq_work(struct work_struct *work)
142 446
143 intr &= WL1271_INTR_MASK; 447 intr &= WL1271_INTR_MASK;
144 448
145 do { 449 if (intr & WL1271_ACX_INTR_EVENT_A) {
146 wl1271_fw_status(wl, wl->fw_status); 450 wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_EVENT_A");
147 451 wl1271_event_handle(wl, 0);
452 }
148 453
149 if (intr & (WL1271_ACX_INTR_EVENT_A | 454 if (intr & WL1271_ACX_INTR_EVENT_B) {
150 WL1271_ACX_INTR_EVENT_B)) { 455 wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_EVENT_B");
151 wl1271_debug(DEBUG_IRQ, 456 wl1271_event_handle(wl, 1);
152 "WL1271_ACX_INTR_EVENT (0x%x)", intr); 457 }
153 if (intr & WL1271_ACX_INTR_EVENT_A)
154 wl1271_event_handle(wl, 0);
155 else
156 wl1271_event_handle(wl, 1);
157 }
158 458
159 if (intr & WL1271_ACX_INTR_INIT_COMPLETE) 459 if (intr & WL1271_ACX_INTR_INIT_COMPLETE)
160 wl1271_debug(DEBUG_IRQ, 460 wl1271_debug(DEBUG_IRQ,
161 "WL1271_ACX_INTR_INIT_COMPLETE"); 461 "WL1271_ACX_INTR_INIT_COMPLETE");
162 462
163 if (intr & WL1271_ACX_INTR_HW_AVAILABLE) 463 if (intr & WL1271_ACX_INTR_HW_AVAILABLE)
164 wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_HW_AVAILABLE"); 464 wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_HW_AVAILABLE");
165 465
166 if (intr & WL1271_ACX_INTR_DATA) { 466 if (intr & WL1271_ACX_INTR_DATA) {
167 u8 tx_res_cnt = wl->fw_status->tx_results_counter - 467 u8 tx_res_cnt = wl->fw_status->tx_results_counter -
168 wl->tx_results_count; 468 wl->tx_results_count;
169 469
170 wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_DATA"); 470 wl1271_debug(DEBUG_IRQ, "WL1271_ACX_INTR_DATA");
171 471
172 /* check for tx results */ 472 /* check for tx results */
173 if (tx_res_cnt) 473 if (tx_res_cnt)
174 wl1271_tx_complete(wl, tx_res_cnt); 474 wl1271_tx_complete(wl, tx_res_cnt);
175 475
176 wl1271_rx(wl, wl->fw_status); 476 wl1271_rx(wl, wl->fw_status);
177 } 477 }
178
179 intr = wl1271_reg_read32(wl, ACX_REG_INTERRUPT_CLEAR);
180 intr &= WL1271_INTR_MASK;
181 } while (intr && --ctr);
182 478
183out_sleep: 479out_sleep:
184 wl1271_reg_write32(wl, ACX_REG_INTERRUPT_MASK, 480 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,
185 WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK)); 481 WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK));
186 wl1271_ps_elp_sleep(wl); 482 wl1271_ps_elp_sleep(wl);
187 483
188out: 484out:
@@ -205,7 +501,7 @@ static irqreturn_t wl1271_irq(int irq, void *cookie)
205 wl->elp_compl = NULL; 501 wl->elp_compl = NULL;
206 } 502 }
207 503
208 schedule_work(&wl->irq_work); 504 ieee80211_queue_work(wl->hw, &wl->irq_work);
209 spin_unlock_irqrestore(&wl->wl_lock, flags); 505 spin_unlock_irqrestore(&wl->wl_lock, flags);
210 506
211 return IRQ_HANDLED; 507 return IRQ_HANDLED;
@@ -231,7 +527,7 @@ static int wl1271_fetch_firmware(struct wl1271 *wl)
231 } 527 }
232 528
233 wl->fw_len = fw->size; 529 wl->fw_len = fw->size;
234 wl->fw = kmalloc(wl->fw_len, GFP_KERNEL); 530 wl->fw = vmalloc(wl->fw_len);
235 531
236 if (!wl->fw) { 532 if (!wl->fw) {
237 wl1271_error("could not allocate memory for the firmware"); 533 wl1271_error("could not allocate memory for the firmware");
@@ -249,6 +545,40 @@ out:
249 return ret; 545 return ret;
250} 546}
251 547
548static int wl1271_update_mac_addr(struct wl1271 *wl)
549{
550 int ret = 0;
551 u8 *nvs_ptr = (u8 *)wl->nvs->nvs;
552
553 /* get mac address from the NVS */
554 wl->mac_addr[0] = nvs_ptr[11];
555 wl->mac_addr[1] = nvs_ptr[10];
556 wl->mac_addr[2] = nvs_ptr[6];
557 wl->mac_addr[3] = nvs_ptr[5];
558 wl->mac_addr[4] = nvs_ptr[4];
559 wl->mac_addr[5] = nvs_ptr[3];
560
561 /* FIXME: if it is a zero-address, we should bail out. Now, instead,
562 we randomize an address */
563 if (is_zero_ether_addr(wl->mac_addr)) {
564 static const u8 nokia_oui[3] = {0x00, 0x1f, 0xdf};
565 memcpy(wl->mac_addr, nokia_oui, 3);
566 get_random_bytes(wl->mac_addr + 3, 3);
567
568 /* update this address to the NVS */
569 nvs_ptr[11] = wl->mac_addr[0];
570 nvs_ptr[10] = wl->mac_addr[1];
571 nvs_ptr[6] = wl->mac_addr[2];
572 nvs_ptr[5] = wl->mac_addr[3];
573 nvs_ptr[4] = wl->mac_addr[4];
574 nvs_ptr[3] = wl->mac_addr[5];
575 }
576
577 SET_IEEE80211_PERM_ADDR(wl->hw, wl->mac_addr);
578
579 return ret;
580}
581
252static int wl1271_fetch_nvs(struct wl1271 *wl) 582static int wl1271_fetch_nvs(struct wl1271 *wl)
253{ 583{
254 const struct firmware *fw; 584 const struct firmware *fw;
@@ -261,15 +591,14 @@ static int wl1271_fetch_nvs(struct wl1271 *wl)
261 return ret; 591 return ret;
262 } 592 }
263 593
264 if (fw->size % 4) { 594 if (fw->size != sizeof(struct wl1271_nvs_file)) {
265 wl1271_error("nvs size is not multiple of 32 bits: %zu", 595 wl1271_error("nvs size is not as expected: %zu != %zu",
266 fw->size); 596 fw->size, sizeof(struct wl1271_nvs_file));
267 ret = -EILSEQ; 597 ret = -EILSEQ;
268 goto out; 598 goto out;
269 } 599 }
270 600
271 wl->nvs_len = fw->size; 601 wl->nvs = kmalloc(sizeof(struct wl1271_nvs_file), GFP_KERNEL);
272 wl->nvs = kmalloc(wl->nvs_len, GFP_KERNEL);
273 602
274 if (!wl->nvs) { 603 if (!wl->nvs) {
275 wl1271_error("could not allocate memory for the nvs file"); 604 wl1271_error("could not allocate memory for the nvs file");
@@ -277,9 +606,9 @@ static int wl1271_fetch_nvs(struct wl1271 *wl)
277 goto out; 606 goto out;
278 } 607 }
279 608
280 memcpy(wl->nvs, fw->data, wl->nvs_len); 609 memcpy(wl->nvs, fw->data, sizeof(struct wl1271_nvs_file));
281 610
282 ret = 0; 611 ret = wl1271_update_mac_addr(wl);
283 612
284out: 613out:
285 release_firmware(fw); 614 release_firmware(fw);
@@ -292,7 +621,7 @@ static void wl1271_fw_wakeup(struct wl1271 *wl)
292 u32 elp_reg; 621 u32 elp_reg;
293 622
294 elp_reg = ELPCTRL_WAKE_UP; 623 elp_reg = ELPCTRL_WAKE_UP;
295 wl1271_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg); 624 wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, elp_reg);
296} 625}
297 626
298static int wl1271_setup(struct wl1271 *wl) 627static int wl1271_setup(struct wl1271 *wl)
@@ -314,20 +643,21 @@ static int wl1271_setup(struct wl1271 *wl)
314 643
315static int wl1271_chip_wakeup(struct wl1271 *wl) 644static int wl1271_chip_wakeup(struct wl1271 *wl)
316{ 645{
646 struct wl1271_partition_set partition;
317 int ret = 0; 647 int ret = 0;
318 648
649 msleep(WL1271_PRE_POWER_ON_SLEEP);
319 wl1271_power_on(wl); 650 wl1271_power_on(wl);
320 msleep(WL1271_POWER_ON_SLEEP); 651 msleep(WL1271_POWER_ON_SLEEP);
321 wl1271_spi_reset(wl); 652 wl1271_io_reset(wl);
322 wl1271_spi_init(wl); 653 wl1271_io_init(wl);
323 654
324 /* We don't need a real memory partition here, because we only want 655 /* We don't need a real memory partition here, because we only want
325 * to use the registers at this point. */ 656 * to use the registers at this point. */
326 wl1271_set_partition(wl, 657 memset(&partition, 0, sizeof(partition));
327 0x00000000, 658 partition.reg.start = REGISTERS_BASE;
328 0x00000000, 659 partition.reg.size = REGISTERS_DOWN_SIZE;
329 REGISTERS_BASE, 660 wl1271_set_partition(wl, &partition);
330 REGISTERS_DOWN_SIZE);
331 661
332 /* ELP module wake up */ 662 /* ELP module wake up */
333 wl1271_fw_wakeup(wl); 663 wl1271_fw_wakeup(wl);
@@ -335,7 +665,7 @@ static int wl1271_chip_wakeup(struct wl1271 *wl)
335 /* whal_FwCtrl_BootSm() */ 665 /* whal_FwCtrl_BootSm() */
336 666
337 /* 0. read chip id from CHIP_ID */ 667 /* 0. read chip id from CHIP_ID */
338 wl->chip.id = wl1271_reg_read32(wl, CHIP_ID_B); 668 wl->chip.id = wl1271_read32(wl, CHIP_ID_B);
339 669
340 /* 1. check if chip id is valid */ 670 /* 1. check if chip id is valid */
341 671
@@ -357,7 +687,7 @@ static int wl1271_chip_wakeup(struct wl1271 *wl)
357 goto out; 687 goto out;
358 break; 688 break;
359 default: 689 default:
360 wl1271_error("unsupported chip id: 0x%x", wl->chip.id); 690 wl1271_warning("unsupported chip id: 0x%x", wl->chip.id);
361 ret = -ENODEV; 691 ret = -ENODEV;
362 goto out; 692 goto out;
363 } 693 }
@@ -379,35 +709,9 @@ out:
379 return ret; 709 return ret;
380} 710}
381 711
382static void wl1271_filter_work(struct work_struct *work)
383{
384 struct wl1271 *wl =
385 container_of(work, struct wl1271, filter_work);
386 int ret;
387
388 mutex_lock(&wl->mutex);
389
390 if (wl->state == WL1271_STATE_OFF)
391 goto out;
392
393 ret = wl1271_ps_elp_wakeup(wl, false);
394 if (ret < 0)
395 goto out;
396
397 /* FIXME: replace the magic numbers with proper definitions */
398 ret = wl1271_cmd_join(wl, wl->bss_type, 1, 100, 0);
399 if (ret < 0)
400 goto out_sleep;
401
402out_sleep:
403 wl1271_ps_elp_sleep(wl);
404
405out:
406 mutex_unlock(&wl->mutex);
407}
408
409int wl1271_plt_start(struct wl1271 *wl) 712int wl1271_plt_start(struct wl1271 *wl)
410{ 713{
714 int retries = WL1271_BOOT_RETRIES;
411 int ret; 715 int ret;
412 716
413 mutex_lock(&wl->mutex); 717 mutex_lock(&wl->mutex);
@@ -421,22 +725,43 @@ int wl1271_plt_start(struct wl1271 *wl)
421 goto out; 725 goto out;
422 } 726 }
423 727
424 wl->state = WL1271_STATE_PLT; 728 while (retries) {
425 729 retries--;
426 ret = wl1271_chip_wakeup(wl); 730 ret = wl1271_chip_wakeup(wl);
427 if (ret < 0) 731 if (ret < 0)
428 goto out; 732 goto power_off;
429 733
430 ret = wl1271_boot(wl); 734 ret = wl1271_boot(wl);
431 if (ret < 0) 735 if (ret < 0)
432 goto out; 736 goto power_off;
433 737
434 wl1271_notice("firmware booted in PLT mode (%s)", wl->chip.fw_ver); 738 ret = wl1271_plt_init(wl);
739 if (ret < 0)
740 goto irq_disable;
435 741
436 ret = wl1271_plt_init(wl); 742 wl->state = WL1271_STATE_PLT;
437 if (ret < 0) 743 wl1271_notice("firmware booted in PLT mode (%s)",
744 wl->chip.fw_ver);
438 goto out; 745 goto out;
439 746
747irq_disable:
748 wl1271_disable_interrupts(wl);
749 mutex_unlock(&wl->mutex);
750 /* Unlocking the mutex in the middle of handling is
751 inherently unsafe. In this case we deem it safe to do,
752 because we need to let any possibly pending IRQ out of
753 the system (and while we are WL1271_STATE_OFF the IRQ
754 work function will not do anything.) Also, any other
755 possible concurrent operations will fail due to the
756 current state, hence the wl1271 struct should be safe. */
757 cancel_work_sync(&wl->irq_work);
758 mutex_lock(&wl->mutex);
759power_off:
760 wl1271_power_off(wl);
761 }
762
763 wl1271_error("firmware boot in PLT mode failed despite %d retries",
764 WL1271_BOOT_RETRIES);
440out: 765out:
441 mutex_unlock(&wl->mutex); 766 mutex_unlock(&wl->mutex);
442 767
@@ -462,6 +787,7 @@ int wl1271_plt_stop(struct wl1271 *wl)
462 wl1271_power_off(wl); 787 wl1271_power_off(wl);
463 788
464 wl->state = WL1271_STATE_OFF; 789 wl->state = WL1271_STATE_OFF;
790 wl->rx_counter = 0;
465 791
466out: 792out:
467 mutex_unlock(&wl->mutex); 793 mutex_unlock(&wl->mutex);
@@ -473,7 +799,20 @@ out:
473static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 799static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
474{ 800{
475 struct wl1271 *wl = hw->priv; 801 struct wl1271 *wl = hw->priv;
802 struct ieee80211_conf *conf = &hw->conf;
803 struct ieee80211_tx_info *txinfo = IEEE80211_SKB_CB(skb);
804 struct ieee80211_sta *sta = txinfo->control.sta;
805 unsigned long flags;
476 806
807 /* peek into the rates configured in the STA entry */
808 spin_lock_irqsave(&wl->wl_lock, flags);
809 if (sta && sta->supp_rates[conf->channel->band] != wl->sta_rate_set) {
810 wl->sta_rate_set = sta->supp_rates[conf->channel->band];
811 set_bit(WL1271_FLAG_STA_RATES_CHANGED, &wl->flags);
812 }
813 spin_unlock_irqrestore(&wl->wl_lock, flags);
814
815 /* queue the packet */
477 skb_queue_tail(&wl->tx_queue, skb); 816 skb_queue_tail(&wl->tx_queue, skb);
478 817
479 /* 818 /*
@@ -481,7 +820,7 @@ static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
481 * before that, the tx_work will not be initialized! 820 * before that, the tx_work will not be initialized!
482 */ 821 */
483 822
484 schedule_work(&wl->tx_work); 823 ieee80211_queue_work(wl->hw, &wl->tx_work);
485 824
486 /* 825 /*
487 * The workqueue is slow to process the tx_queue and we need stop 826 * The workqueue is slow to process the tx_queue and we need stop
@@ -495,15 +834,103 @@ static int wl1271_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
495 * protected. Maybe fix this by removing the stupid 834 * protected. Maybe fix this by removing the stupid
496 * variable altogether and checking the real queue state? 835 * variable altogether and checking the real queue state?
497 */ 836 */
498 wl->tx_queue_stopped = true; 837 set_bit(WL1271_FLAG_TX_QUEUE_STOPPED, &wl->flags);
499 } 838 }
500 839
501 return NETDEV_TX_OK; 840 return NETDEV_TX_OK;
502} 841}
503 842
843static int wl1271_dev_notify(struct notifier_block *me, unsigned long what,
844 void *arg)
845{
846 struct net_device *dev;
847 struct wireless_dev *wdev;
848 struct wiphy *wiphy;
849 struct ieee80211_hw *hw;
850 struct wl1271 *wl;
851 struct wl1271 *wl_temp;
852 struct in_device *idev;
853 struct in_ifaddr *ifa = arg;
854 int ret = 0;
855
856 /* FIXME: this ugly function should probably be implemented in the
857 * mac80211, and here should only be a simple callback handling actual
858 * setting of the filters. Now we need to dig up references to
859 * various structures to gain access to what we need.
860 * Also, because of this, there is no "initial" setting of the filter
861 * in "op_start", because we don't want to dig up struct net_device
862 * there - the filter will be set upon first change of the interface
863 * IP address. */
864
865 dev = ifa->ifa_dev->dev;
866
867 wdev = dev->ieee80211_ptr;
868 if (wdev == NULL)
869 return NOTIFY_DONE;
870
871 wiphy = wdev->wiphy;
872 if (wiphy == NULL)
873 return NOTIFY_DONE;
874
875 hw = wiphy_priv(wiphy);
876 if (hw == NULL)
877 return NOTIFY_DONE;
878
879 /* Check that the interface is one supported by this driver. */
880 wl_temp = hw->priv;
881 list_for_each_entry(wl, &wl_list, list) {
882 if (wl == wl_temp)
883 break;
884 }
885 if (wl == NULL)
886 return NOTIFY_DONE;
887
888 /* Get the interface IP address for the device. "ifa" will become
889 NULL if:
890 - there is no IPV4 protocol address configured
891 - there are multiple (virtual) IPV4 addresses configured
892 When "ifa" is NULL, filtering will be disabled.
893 */
894 ifa = NULL;
895 idev = dev->ip_ptr;
896 if (idev)
897 ifa = idev->ifa_list;
898
899 if (ifa && ifa->ifa_next)
900 ifa = NULL;
901
902 mutex_lock(&wl->mutex);
903
904 if (wl->state == WL1271_STATE_OFF)
905 goto out;
906
907 ret = wl1271_ps_elp_wakeup(wl, false);
908 if (ret < 0)
909 goto out;
910 if (ifa)
911 ret = wl1271_acx_arp_ip_filter(wl, true,
912 (u8 *)&ifa->ifa_address,
913 ACX_IPV4_VERSION);
914 else
915 ret = wl1271_acx_arp_ip_filter(wl, false, NULL,
916 ACX_IPV4_VERSION);
917 wl1271_ps_elp_sleep(wl);
918
919out:
920 mutex_unlock(&wl->mutex);
921
922 return NOTIFY_OK;
923}
924
925static struct notifier_block wl1271_dev_notifier = {
926 .notifier_call = wl1271_dev_notify,
927};
928
929
504static int wl1271_op_start(struct ieee80211_hw *hw) 930static int wl1271_op_start(struct ieee80211_hw *hw)
505{ 931{
506 struct wl1271 *wl = hw->priv; 932 struct wl1271 *wl = hw->priv;
933 int retries = WL1271_BOOT_RETRIES;
507 int ret = 0; 934 int ret = 0;
508 935
509 wl1271_debug(DEBUG_MAC80211, "mac80211 start"); 936 wl1271_debug(DEBUG_MAC80211, "mac80211 start");
@@ -517,28 +944,50 @@ static int wl1271_op_start(struct ieee80211_hw *hw)
517 goto out; 944 goto out;
518 } 945 }
519 946
520 ret = wl1271_chip_wakeup(wl); 947 while (retries) {
521 if (ret < 0) 948 retries--;
522 goto out; 949 ret = wl1271_chip_wakeup(wl);
523 950 if (ret < 0)
524 ret = wl1271_boot(wl); 951 goto power_off;
525 if (ret < 0)
526 goto out;
527 952
528 ret = wl1271_hw_init(wl); 953 ret = wl1271_boot(wl);
529 if (ret < 0) 954 if (ret < 0)
530 goto out; 955 goto power_off;
531 956
532 wl->state = WL1271_STATE_ON; 957 ret = wl1271_hw_init(wl);
958 if (ret < 0)
959 goto irq_disable;
533 960
534 wl1271_info("firmware booted (%s)", wl->chip.fw_ver); 961 wl->state = WL1271_STATE_ON;
962 wl1271_info("firmware booted (%s)", wl->chip.fw_ver);
963 goto out;
535 964
536out: 965irq_disable:
537 if (ret < 0) 966 wl1271_disable_interrupts(wl);
967 mutex_unlock(&wl->mutex);
968 /* Unlocking the mutex in the middle of handling is
969 inherently unsafe. In this case we deem it safe to do,
970 because we need to let any possibly pending IRQ out of
971 the system (and while we are WL1271_STATE_OFF the IRQ
972 work function will not do anything.) Also, any other
973 possible concurrent operations will fail due to the
974 current state, hence the wl1271 struct should be safe. */
975 cancel_work_sync(&wl->irq_work);
976 mutex_lock(&wl->mutex);
977power_off:
538 wl1271_power_off(wl); 978 wl1271_power_off(wl);
979 }
539 980
981 wl1271_error("firmware boot failed despite %d retries",
982 WL1271_BOOT_RETRIES);
983out:
540 mutex_unlock(&wl->mutex); 984 mutex_unlock(&wl->mutex);
541 985
986 if (!ret) {
987 list_add(&wl->list, &wl_list);
988 register_inetaddr_notifier(&wl1271_dev_notifier);
989 }
990
542 return ret; 991 return ret;
543} 992}
544 993
@@ -551,15 +1000,17 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)
551 1000
552 wl1271_debug(DEBUG_MAC80211, "mac80211 stop"); 1001 wl1271_debug(DEBUG_MAC80211, "mac80211 stop");
553 1002
1003 unregister_inetaddr_notifier(&wl1271_dev_notifier);
1004 list_del(&wl->list);
1005
554 mutex_lock(&wl->mutex); 1006 mutex_lock(&wl->mutex);
555 1007
556 WARN_ON(wl->state != WL1271_STATE_ON); 1008 WARN_ON(wl->state != WL1271_STATE_ON);
557 1009
558 if (wl->scanning) { 1010 if (test_and_clear_bit(WL1271_FLAG_SCANNING, &wl->flags)) {
559 mutex_unlock(&wl->mutex); 1011 mutex_unlock(&wl->mutex);
560 ieee80211_scan_completed(wl->hw, true); 1012 ieee80211_scan_completed(wl->hw, true);
561 mutex_lock(&wl->mutex); 1013 mutex_lock(&wl->mutex);
562 wl->scanning = false;
563 } 1014 }
564 1015
565 wl->state = WL1271_STATE_OFF; 1016 wl->state = WL1271_STATE_OFF;
@@ -570,7 +1021,6 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)
570 1021
571 cancel_work_sync(&wl->irq_work); 1022 cancel_work_sync(&wl->irq_work);
572 cancel_work_sync(&wl->tx_work); 1023 cancel_work_sync(&wl->tx_work);
573 cancel_work_sync(&wl->filter_work);
574 1024
575 mutex_lock(&wl->mutex); 1025 mutex_lock(&wl->mutex);
576 1026
@@ -581,19 +1031,24 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)
581 memset(wl->bssid, 0, ETH_ALEN); 1031 memset(wl->bssid, 0, ETH_ALEN);
582 memset(wl->ssid, 0, IW_ESSID_MAX_SIZE + 1); 1032 memset(wl->ssid, 0, IW_ESSID_MAX_SIZE + 1);
583 wl->ssid_len = 0; 1033 wl->ssid_len = 0;
584 wl->listen_int = 1;
585 wl->bss_type = MAX_BSS_TYPE; 1034 wl->bss_type = MAX_BSS_TYPE;
1035 wl->band = IEEE80211_BAND_2GHZ;
586 1036
587 wl->rx_counter = 0; 1037 wl->rx_counter = 0;
588 wl->elp = false; 1038 wl->psm_entry_retry = 0;
589 wl->psm = 0;
590 wl->tx_queue_stopped = false;
591 wl->power_level = WL1271_DEFAULT_POWER_LEVEL; 1039 wl->power_level = WL1271_DEFAULT_POWER_LEVEL;
592 wl->tx_blocks_available = 0; 1040 wl->tx_blocks_available = 0;
593 wl->tx_results_count = 0; 1041 wl->tx_results_count = 0;
594 wl->tx_packets_count = 0; 1042 wl->tx_packets_count = 0;
1043 wl->tx_security_last_seq = 0;
1044 wl->tx_security_seq_16 = 0;
1045 wl->tx_security_seq_32 = 0;
595 wl->time_offset = 0; 1046 wl->time_offset = 0;
596 wl->session_counter = 0; 1047 wl->session_counter = 0;
1048 wl->rate_set = CONF_TX_RATE_MASK_BASIC;
1049 wl->sta_rate_set = 0;
1050 wl->flags = 0;
1051
597 for (i = 0; i < NUM_TX_QUEUES; i++) 1052 for (i = 0; i < NUM_TX_QUEUES; i++)
598 wl->tx_blocks_freed[i] = 0; 1053 wl->tx_blocks_freed[i] = 0;
599 1054
@@ -602,17 +1057,23 @@ static void wl1271_op_stop(struct ieee80211_hw *hw)
602} 1057}
603 1058
604static int wl1271_op_add_interface(struct ieee80211_hw *hw, 1059static int wl1271_op_add_interface(struct ieee80211_hw *hw,
605 struct ieee80211_if_init_conf *conf) 1060 struct ieee80211_vif *vif)
606{ 1061{
607 struct wl1271 *wl = hw->priv; 1062 struct wl1271 *wl = hw->priv;
608 int ret = 0; 1063 int ret = 0;
609 1064
610 wl1271_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM", 1065 wl1271_debug(DEBUG_MAC80211, "mac80211 add interface type %d mac %pM",
611 conf->type, conf->mac_addr); 1066 vif->type, vif->addr);
612 1067
613 mutex_lock(&wl->mutex); 1068 mutex_lock(&wl->mutex);
1069 if (wl->vif) {
1070 ret = -EBUSY;
1071 goto out;
1072 }
1073
1074 wl->vif = vif;
614 1075
615 switch (conf->type) { 1076 switch (vif->type) {
616 case NL80211_IFTYPE_STATION: 1077 case NL80211_IFTYPE_STATION:
617 wl->bss_type = BSS_TYPE_STA_BSS; 1078 wl->bss_type = BSS_TYPE_STA_BSS;
618 break; 1079 break;
@@ -632,9 +1093,14 @@ out:
632} 1093}
633 1094
634static void wl1271_op_remove_interface(struct ieee80211_hw *hw, 1095static void wl1271_op_remove_interface(struct ieee80211_hw *hw,
635 struct ieee80211_if_init_conf *conf) 1096 struct ieee80211_vif *vif)
636{ 1097{
1098 struct wl1271 *wl = hw->priv;
1099
1100 mutex_lock(&wl->mutex);
637 wl1271_debug(DEBUG_MAC80211, "mac80211 remove interface"); 1101 wl1271_debug(DEBUG_MAC80211, "mac80211 remove interface");
1102 wl->vif = NULL;
1103 mutex_unlock(&wl->mutex);
638} 1104}
639 1105
640#if 0 1106#if 0
@@ -657,23 +1123,24 @@ static int wl1271_op_config_interface(struct ieee80211_hw *hw,
657 if (ret < 0) 1123 if (ret < 0)
658 goto out; 1124 goto out;
659 1125
660 memcpy(wl->bssid, conf->bssid, ETH_ALEN); 1126 if (memcmp(wl->bssid, conf->bssid, ETH_ALEN)) {
1127 wl1271_debug(DEBUG_MAC80211, "bssid changed");
661 1128
662 ret = wl1271_cmd_build_null_data(wl); 1129 memcpy(wl->bssid, conf->bssid, ETH_ALEN);
663 if (ret < 0)
664 goto out_sleep;
665 1130
666 wl->ssid_len = conf->ssid_len; 1131 ret = wl1271_cmd_join(wl);
667 if (wl->ssid_len) 1132 if (ret < 0)
668 memcpy(wl->ssid, conf->ssid, wl->ssid_len); 1133 goto out_sleep;
669 1134
670 if (wl->bss_type != BSS_TYPE_IBSS) { 1135 ret = wl1271_cmd_build_null_data(wl);
671 /* FIXME: replace the magic numbers with proper definitions */
672 ret = wl1271_cmd_join(wl, wl->bss_type, 5, 100, 1);
673 if (ret < 0) 1136 if (ret < 0)
674 goto out_sleep; 1137 goto out_sleep;
675 } 1138 }
676 1139
1140 wl->ssid_len = conf->ssid_len;
1141 if (wl->ssid_len)
1142 memcpy(wl->ssid, conf->ssid, wl->ssid_len);
1143
677 if (conf->changed & IEEE80211_IFCC_BEACON) { 1144 if (conf->changed & IEEE80211_IFCC_BEACON) {
678 beacon = ieee80211_beacon_get(hw, vif); 1145 beacon = ieee80211_beacon_get(hw, vif);
679 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_BEACON, 1146 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_BEACON,
@@ -691,12 +1158,6 @@ static int wl1271_op_config_interface(struct ieee80211_hw *hw,
691 1158
692 if (ret < 0) 1159 if (ret < 0)
693 goto out_sleep; 1160 goto out_sleep;
694
695 /* FIXME: replace the magic numbers with proper definitions */
696 ret = wl1271_cmd_join(wl, wl->bss_type, 1, 100, 0);
697
698 if (ret < 0)
699 goto out_sleep;
700 } 1161 }
701 1162
702out_sleep: 1163out_sleep:
@@ -709,6 +1170,51 @@ out:
709} 1170}
710#endif 1171#endif
711 1172
1173static int wl1271_join_channel(struct wl1271 *wl, int channel)
1174{
1175 int ret = 0;
1176 /* we need to use a dummy BSSID for now */
1177 static const u8 dummy_bssid[ETH_ALEN] = { 0x0b, 0xad, 0xde,
1178 0xad, 0xbe, 0xef };
1179
1180 /* the dummy join is not required for ad-hoc */
1181 if (wl->bss_type == BSS_TYPE_IBSS)
1182 goto out;
1183
1184 /* disable mac filter, so we hear everything */
1185 wl->rx_config &= ~CFG_BSSID_FILTER_EN;
1186
1187 wl->channel = channel;
1188 memcpy(wl->bssid, dummy_bssid, ETH_ALEN);
1189
1190 ret = wl1271_cmd_join(wl);
1191 if (ret < 0)
1192 goto out;
1193
1194 set_bit(WL1271_FLAG_JOINED, &wl->flags);
1195
1196out:
1197 return ret;
1198}
1199
1200static int wl1271_unjoin_channel(struct wl1271 *wl)
1201{
1202 int ret;
1203
1204 /* to stop listening to a channel, we disconnect */
1205 ret = wl1271_cmd_disconnect(wl);
1206 if (ret < 0)
1207 goto out;
1208
1209 clear_bit(WL1271_FLAG_JOINED, &wl->flags);
1210 wl->channel = 0;
1211 memset(wl->bssid, 0, ETH_ALEN);
1212 wl->rx_config = WL1271_DEFAULT_RX_CONFIG;
1213
1214out:
1215 return ret;
1216}
1217
712static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed) 1218static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed)
713{ 1219{
714 struct wl1271 *wl = hw->priv; 1220 struct wl1271 *wl = hw->priv;
@@ -717,58 +1223,75 @@ static int wl1271_op_config(struct ieee80211_hw *hw, u32 changed)
717 1223
718 channel = ieee80211_frequency_to_channel(conf->channel->center_freq); 1224 channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
719 1225
720 wl1271_debug(DEBUG_MAC80211, "mac80211 config ch %d psm %s power %d", 1226 wl1271_debug(DEBUG_MAC80211, "mac80211 config ch %d psm %s power %d %s",
721 channel, 1227 channel,
722 conf->flags & IEEE80211_CONF_PS ? "on" : "off", 1228 conf->flags & IEEE80211_CONF_PS ? "on" : "off",
723 conf->power_level); 1229 conf->power_level,
1230 conf->flags & IEEE80211_CONF_IDLE ? "idle" : "in use");
724 1231
725 mutex_lock(&wl->mutex); 1232 mutex_lock(&wl->mutex);
726 1233
1234 wl->band = conf->channel->band;
1235
727 ret = wl1271_ps_elp_wakeup(wl, false); 1236 ret = wl1271_ps_elp_wakeup(wl, false);
728 if (ret < 0) 1237 if (ret < 0)
729 goto out; 1238 goto out;
730 1239
731 if (channel != wl->channel) { 1240 if (changed & IEEE80211_CONF_CHANGE_IDLE) {
732 u8 old_channel = wl->channel; 1241 if (conf->flags & IEEE80211_CONF_IDLE &&
733 wl->channel = channel; 1242 test_bit(WL1271_FLAG_JOINED, &wl->flags))
734 1243 wl1271_unjoin_channel(wl);
735 /* FIXME: use beacon interval provided by mac80211 */ 1244 else if (!(conf->flags & IEEE80211_CONF_IDLE))
736 ret = wl1271_cmd_join(wl, wl->bss_type, 1, 100, 0); 1245 wl1271_join_channel(wl, channel);
737 if (ret < 0) { 1246
738 wl->channel = old_channel; 1247 if (conf->flags & IEEE80211_CONF_IDLE) {
739 goto out_sleep; 1248 wl->rate_set = CONF_TX_RATE_MASK_BASIC;
1249 wl->sta_rate_set = 0;
1250 wl1271_acx_rate_policies(wl);
740 } 1251 }
741 } 1252 }
742 1253
743 ret = wl1271_cmd_build_null_data(wl); 1254 /* if the channel changes while joined, join again */
744 if (ret < 0) 1255 if (channel != wl->channel &&
745 goto out_sleep; 1256 test_bit(WL1271_FLAG_JOINED, &wl->flags)) {
746 1257 wl->channel = channel;
747 if (conf->flags & IEEE80211_CONF_PS && !wl->psm_requested) { 1258 /* FIXME: maybe use CMD_CHANNEL_SWITCH for this? */
748 wl1271_info("psm enabled"); 1259 ret = wl1271_cmd_join(wl);
1260 if (ret < 0)
1261 wl1271_warning("cmd join to update channel failed %d",
1262 ret);
1263 } else
1264 wl->channel = channel;
749 1265
750 wl->psm_requested = true; 1266 if (conf->flags & IEEE80211_CONF_PS &&
1267 !test_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags)) {
1268 set_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags);
751 1269
752 /* 1270 /*
753 * We enter PSM only if we're already associated. 1271 * We enter PSM only if we're already associated.
754 * If we're not, we'll enter it when joining an SSID, 1272 * If we're not, we'll enter it when joining an SSID,
755 * through the bss_info_changed() hook. 1273 * through the bss_info_changed() hook.
756 */ 1274 */
757 ret = wl1271_ps_set_mode(wl, STATION_POWER_SAVE_MODE); 1275 if (test_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags)) {
1276 wl1271_info("psm enabled");
1277 ret = wl1271_ps_set_mode(wl, STATION_POWER_SAVE_MODE,
1278 true);
1279 }
758 } else if (!(conf->flags & IEEE80211_CONF_PS) && 1280 } else if (!(conf->flags & IEEE80211_CONF_PS) &&
759 wl->psm_requested) { 1281 test_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags)) {
760 wl1271_info("psm disabled"); 1282 wl1271_info("psm disabled");
761 1283
762 wl->psm_requested = false; 1284 clear_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags);
763 1285
764 if (wl->psm) 1286 if (test_bit(WL1271_FLAG_PSM, &wl->flags))
765 ret = wl1271_ps_set_mode(wl, STATION_ACTIVE_MODE); 1287 ret = wl1271_ps_set_mode(wl, STATION_ACTIVE_MODE,
1288 true);
766 } 1289 }
767 1290
768 if (conf->power_level != wl->power_level) { 1291 if (conf->power_level != wl->power_level) {
769 ret = wl1271_acx_tx_power(wl, conf->power_level); 1292 ret = wl1271_acx_tx_power(wl, conf->power_level);
770 if (ret < 0) 1293 if (ret < 0)
771 goto out; 1294 goto out_sleep;
772 1295
773 wl->power_level = conf->power_level; 1296 wl->power_level = conf->power_level;
774 } 1297 }
@@ -782,6 +1305,45 @@ out:
782 return ret; 1305 return ret;
783} 1306}
784 1307
1308struct wl1271_filter_params {
1309 bool enabled;
1310 int mc_list_length;
1311 u8 mc_list[ACX_MC_ADDRESS_GROUP_MAX][ETH_ALEN];
1312};
1313
1314static u64 wl1271_op_prepare_multicast(struct ieee80211_hw *hw, int mc_count,
1315 struct dev_addr_list *mc_list)
1316{
1317 struct wl1271_filter_params *fp;
1318 int i;
1319
1320 fp = kzalloc(sizeof(*fp), GFP_ATOMIC);
1321 if (!fp) {
1322 wl1271_error("Out of memory setting filters.");
1323 return 0;
1324 }
1325
1326 /* update multicast filtering parameters */
1327 fp->enabled = true;
1328 if (mc_count > ACX_MC_ADDRESS_GROUP_MAX) {
1329 mc_count = 0;
1330 fp->enabled = false;
1331 }
1332
1333 fp->mc_list_length = 0;
1334 for (i = 0; i < mc_count; i++) {
1335 if (mc_list->da_addrlen == ETH_ALEN) {
1336 memcpy(fp->mc_list[fp->mc_list_length],
1337 mc_list->da_addr, ETH_ALEN);
1338 fp->mc_list_length++;
1339 } else
1340 wl1271_warning("Unknown mc address length.");
1341 mc_list = mc_list->next;
1342 }
1343
1344 return (u64)(unsigned long)fp;
1345}
1346
785#define WL1271_SUPPORTED_FILTERS (FIF_PROMISC_IN_BSS | \ 1347#define WL1271_SUPPORTED_FILTERS (FIF_PROMISC_IN_BSS | \
786 FIF_ALLMULTI | \ 1348 FIF_ALLMULTI | \
787 FIF_FCSFAIL | \ 1349 FIF_FCSFAIL | \
@@ -791,28 +1353,53 @@ out:
791 1353
792static void wl1271_op_configure_filter(struct ieee80211_hw *hw, 1354static void wl1271_op_configure_filter(struct ieee80211_hw *hw,
793 unsigned int changed, 1355 unsigned int changed,
794 unsigned int *total,u64 multicast) 1356 unsigned int *total, u64 multicast)
795{ 1357{
1358 struct wl1271_filter_params *fp = (void *)(unsigned long)multicast;
796 struct wl1271 *wl = hw->priv; 1359 struct wl1271 *wl = hw->priv;
1360 int ret;
797 1361
798 wl1271_debug(DEBUG_MAC80211, "mac80211 configure filter"); 1362 wl1271_debug(DEBUG_MAC80211, "mac80211 configure filter");
799 1363
1364 mutex_lock(&wl->mutex);
1365
1366 if (wl->state == WL1271_STATE_OFF)
1367 goto out;
1368
1369 ret = wl1271_ps_elp_wakeup(wl, false);
1370 if (ret < 0)
1371 goto out;
1372
800 *total &= WL1271_SUPPORTED_FILTERS; 1373 *total &= WL1271_SUPPORTED_FILTERS;
801 changed &= WL1271_SUPPORTED_FILTERS; 1374 changed &= WL1271_SUPPORTED_FILTERS;
802 1375
1376 if (*total & FIF_ALLMULTI)
1377 ret = wl1271_acx_group_address_tbl(wl, false, NULL, 0);
1378 else if (fp)
1379 ret = wl1271_acx_group_address_tbl(wl, fp->enabled,
1380 fp->mc_list,
1381 fp->mc_list_length);
1382 if (ret < 0)
1383 goto out_sleep;
1384
1385 kfree(fp);
1386
1387 /* FIXME: We still need to set our filters properly */
1388
1389 /* determine, whether supported filter values have changed */
803 if (changed == 0) 1390 if (changed == 0)
804 return; 1391 goto out_sleep;
805 1392
806 /* FIXME: wl->rx_config and wl->rx_filter are not protected */ 1393 /* apply configured filters */
807 wl->rx_config = WL1271_DEFAULT_RX_CONFIG; 1394 ret = wl1271_acx_rx_config(wl, wl->rx_config, wl->rx_filter);
808 wl->rx_filter = WL1271_DEFAULT_RX_FILTER; 1395 if (ret < 0)
1396 goto out_sleep;
809 1397
810 /* 1398out_sleep:
811 * FIXME: workqueues need to be properly cancelled on stop(), for 1399 wl1271_ps_elp_sleep(wl);
812 * now let's just disable changing the filter settings. They will 1400
813 * be updated any on config(). 1401out:
814 */ 1402 mutex_unlock(&wl->mutex);
815 /* schedule_work(&wl->filter_work); */
816} 1403}
817 1404
818static int wl1271_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 1405static int wl1271_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
@@ -823,6 +1410,8 @@ static int wl1271_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
823 struct wl1271 *wl = hw->priv; 1410 struct wl1271 *wl = hw->priv;
824 const u8 *addr; 1411 const u8 *addr;
825 int ret; 1412 int ret;
1413 u32 tx_seq_32 = 0;
1414 u16 tx_seq_16 = 0;
826 u8 key_type; 1415 u8 key_type;
827 1416
828 static const u8 bcast_addr[ETH_ALEN] = 1417 static const u8 bcast_addr[ETH_ALEN] =
@@ -861,11 +1450,15 @@ static int wl1271_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
861 key_type = KEY_TKIP; 1450 key_type = KEY_TKIP;
862 1451
863 key_conf->hw_key_idx = key_conf->keyidx; 1452 key_conf->hw_key_idx = key_conf->keyidx;
1453 tx_seq_32 = wl->tx_security_seq_32;
1454 tx_seq_16 = wl->tx_security_seq_16;
864 break; 1455 break;
865 case ALG_CCMP: 1456 case ALG_CCMP:
866 key_type = KEY_AES; 1457 key_type = KEY_AES;
867 1458
868 key_conf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; 1459 key_conf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1460 tx_seq_32 = wl->tx_security_seq_32;
1461 tx_seq_16 = wl->tx_security_seq_16;
869 break; 1462 break;
870 default: 1463 default:
871 wl1271_error("Unknown key algo 0x%x", key_conf->alg); 1464 wl1271_error("Unknown key algo 0x%x", key_conf->alg);
@@ -879,18 +1472,33 @@ static int wl1271_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
879 ret = wl1271_cmd_set_key(wl, KEY_ADD_OR_REPLACE, 1472 ret = wl1271_cmd_set_key(wl, KEY_ADD_OR_REPLACE,
880 key_conf->keyidx, key_type, 1473 key_conf->keyidx, key_type,
881 key_conf->keylen, key_conf->key, 1474 key_conf->keylen, key_conf->key,
882 addr); 1475 addr, tx_seq_32, tx_seq_16);
883 if (ret < 0) { 1476 if (ret < 0) {
884 wl1271_error("Could not add or replace key"); 1477 wl1271_error("Could not add or replace key");
885 goto out_sleep; 1478 goto out_sleep;
886 } 1479 }
1480
1481 /* the default WEP key needs to be configured at least once */
1482 if (key_type == KEY_WEP) {
1483 ret = wl1271_cmd_set_default_wep_key(wl,
1484 wl->default_key);
1485 if (ret < 0)
1486 goto out_sleep;
1487 }
887 break; 1488 break;
888 1489
889 case DISABLE_KEY: 1490 case DISABLE_KEY:
1491 /* The wl1271 does not allow to remove unicast keys - they
1492 will be cleared automatically on next CMD_JOIN. Ignore the
1493 request silently, as we dont want the mac80211 to emit
1494 an error message. */
1495 if (!is_broadcast_ether_addr(addr))
1496 break;
1497
890 ret = wl1271_cmd_set_key(wl, KEY_REMOVE, 1498 ret = wl1271_cmd_set_key(wl, KEY_REMOVE,
891 key_conf->keyidx, key_type, 1499 key_conf->keyidx, key_type,
892 key_conf->keylen, key_conf->key, 1500 key_conf->keylen, key_conf->key,
893 addr); 1501 addr, 0, 0);
894 if (ret < 0) { 1502 if (ret < 0) {
895 wl1271_error("Could not remove key"); 1503 wl1271_error("Could not remove key");
896 goto out_sleep; 1504 goto out_sleep;
@@ -921,13 +1529,13 @@ static int wl1271_op_hw_scan(struct ieee80211_hw *hw,
921 struct wl1271 *wl = hw->priv; 1529 struct wl1271 *wl = hw->priv;
922 int ret; 1530 int ret;
923 u8 *ssid = NULL; 1531 u8 *ssid = NULL;
924 size_t ssid_len = 0; 1532 size_t len = 0;
925 1533
926 wl1271_debug(DEBUG_MAC80211, "mac80211 hw scan"); 1534 wl1271_debug(DEBUG_MAC80211, "mac80211 hw scan");
927 1535
928 if (req->n_ssids) { 1536 if (req->n_ssids) {
929 ssid = req->ssids[0].ssid; 1537 ssid = req->ssids[0].ssid;
930 ssid_len = req->ssids[0].ssid_len; 1538 len = req->ssids[0].ssid_len;
931 } 1539 }
932 1540
933 mutex_lock(&wl->mutex); 1541 mutex_lock(&wl->mutex);
@@ -936,7 +1544,12 @@ static int wl1271_op_hw_scan(struct ieee80211_hw *hw,
936 if (ret < 0) 1544 if (ret < 0)
937 goto out; 1545 goto out;
938 1546
939 ret = wl1271_cmd_scan(hw->priv, ssid, ssid_len, 1, 0, 13, 3); 1547 if (wl1271_11a_enabled())
1548 ret = wl1271_cmd_scan(hw->priv, ssid, len, 1, 0,
1549 WL1271_SCAN_BAND_DUAL, 3);
1550 else
1551 ret = wl1271_cmd_scan(hw->priv, ssid, len, 1, 0,
1552 WL1271_SCAN_BAND_2_4_GHZ, 3);
940 1553
941 wl1271_ps_elp_sleep(wl); 1554 wl1271_ps_elp_sleep(wl);
942 1555
@@ -969,6 +1582,23 @@ out:
969 return ret; 1582 return ret;
970} 1583}
971 1584
1585static void wl1271_ssid_set(struct wl1271 *wl, struct sk_buff *beacon)
1586{
1587 u8 *ptr = beacon->data +
1588 offsetof(struct ieee80211_mgmt, u.beacon.variable);
1589
1590 /* find the location of the ssid in the beacon */
1591 while (ptr < beacon->data + beacon->len) {
1592 if (ptr[0] == WLAN_EID_SSID) {
1593 wl->ssid_len = ptr[1];
1594 memcpy(wl->ssid, ptr+2, wl->ssid_len);
1595 return;
1596 }
1597 ptr += ptr[1];
1598 }
1599 wl1271_error("ad-hoc beacon template has no SSID!\n");
1600}
1601
972static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw, 1602static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
973 struct ieee80211_vif *vif, 1603 struct ieee80211_vif *vif,
974 struct ieee80211_bss_conf *bss_conf, 1604 struct ieee80211_bss_conf *bss_conf,
@@ -976,6 +1606,7 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
976{ 1606{
977 enum wl1271_cmd_ps_mode mode; 1607 enum wl1271_cmd_ps_mode mode;
978 struct wl1271 *wl = hw->priv; 1608 struct wl1271 *wl = hw->priv;
1609 bool do_join = false;
979 int ret; 1610 int ret;
980 1611
981 wl1271_debug(DEBUG_MAC80211, "mac80211 bss info changed"); 1612 wl1271_debug(DEBUG_MAC80211, "mac80211 bss info changed");
@@ -986,10 +1617,74 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
986 if (ret < 0) 1617 if (ret < 0)
987 goto out; 1618 goto out;
988 1619
1620 if (wl->bss_type == BSS_TYPE_IBSS) {
1621 /* FIXME: This implements rudimentary ad-hoc support -
1622 proper templates are on the wish list and notification
1623 on when they change. This patch will update the templates
1624 on every call to this function. */
1625 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1626
1627 if (beacon) {
1628 struct ieee80211_hdr *hdr;
1629
1630 wl1271_ssid_set(wl, beacon);
1631 ret = wl1271_cmd_template_set(wl, CMD_TEMPL_BEACON,
1632 beacon->data,
1633 beacon->len);
1634
1635 if (ret < 0) {
1636 dev_kfree_skb(beacon);
1637 goto out_sleep;
1638 }
1639
1640 hdr = (struct ieee80211_hdr *) beacon->data;
1641 hdr->frame_control = cpu_to_le16(
1642 IEEE80211_FTYPE_MGMT |
1643 IEEE80211_STYPE_PROBE_RESP);
1644
1645 ret = wl1271_cmd_template_set(wl,
1646 CMD_TEMPL_PROBE_RESPONSE,
1647 beacon->data,
1648 beacon->len);
1649 dev_kfree_skb(beacon);
1650 if (ret < 0)
1651 goto out_sleep;
1652
1653 /* Need to update the SSID (for filtering etc) */
1654 do_join = true;
1655 }
1656 }
1657
1658 if ((changed & BSS_CHANGED_BSSID) &&
1659 /*
1660 * Now we know the correct bssid, so we send a new join command
1661 * and enable the BSSID filter
1662 */
1663 memcmp(wl->bssid, bss_conf->bssid, ETH_ALEN)) {
1664 wl->rx_config |= CFG_BSSID_FILTER_EN;
1665 memcpy(wl->bssid, bss_conf->bssid, ETH_ALEN);
1666 ret = wl1271_cmd_build_null_data(wl);
1667 if (ret < 0) {
1668 wl1271_warning("cmd buld null data failed %d",
1669 ret);
1670 goto out_sleep;
1671 }
1672
1673 /* Need to update the BSSID (for filtering etc) */
1674 do_join = true;
1675 }
1676
989 if (changed & BSS_CHANGED_ASSOC) { 1677 if (changed & BSS_CHANGED_ASSOC) {
990 if (bss_conf->assoc) { 1678 if (bss_conf->assoc) {
991 wl->aid = bss_conf->aid; 1679 wl->aid = bss_conf->aid;
992 1680 set_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags);
1681
1682 /*
1683 * with wl1271, we don't need to update the
1684 * beacon_int and dtim_period, because the firmware
1685 * updates it by itself when the first beacon is
1686 * received after a join.
1687 */
993 ret = wl1271_cmd_build_ps_poll(wl, wl->aid); 1688 ret = wl1271_cmd_build_ps_poll(wl, wl->aid);
994 if (ret < 0) 1689 if (ret < 0)
995 goto out_sleep; 1690 goto out_sleep;
@@ -999,14 +1694,21 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
999 goto out_sleep; 1694 goto out_sleep;
1000 1695
1001 /* If we want to go in PSM but we're not there yet */ 1696 /* If we want to go in PSM but we're not there yet */
1002 if (wl->psm_requested && !wl->psm) { 1697 if (test_bit(WL1271_FLAG_PSM_REQUESTED, &wl->flags) &&
1698 !test_bit(WL1271_FLAG_PSM, &wl->flags)) {
1003 mode = STATION_POWER_SAVE_MODE; 1699 mode = STATION_POWER_SAVE_MODE;
1004 ret = wl1271_ps_set_mode(wl, mode); 1700 ret = wl1271_ps_set_mode(wl, mode, true);
1005 if (ret < 0) 1701 if (ret < 0)
1006 goto out_sleep; 1702 goto out_sleep;
1007 } 1703 }
1704 } else {
1705 /* use defaults when not associated */
1706 clear_bit(WL1271_FLAG_STA_ASSOCIATED, &wl->flags);
1707 wl->aid = 0;
1008 } 1708 }
1709
1009 } 1710 }
1711
1010 if (changed & BSS_CHANGED_ERP_SLOT) { 1712 if (changed & BSS_CHANGED_ERP_SLOT) {
1011 if (bss_conf->use_short_slot) 1713 if (bss_conf->use_short_slot)
1012 ret = wl1271_acx_slot(wl, SLOT_TIME_SHORT); 1714 ret = wl1271_acx_slot(wl, SLOT_TIME_SHORT);
@@ -1036,72 +1738,118 @@ static void wl1271_op_bss_info_changed(struct ieee80211_hw *hw,
1036 } 1738 }
1037 } 1739 }
1038 1740
1741 if (do_join) {
1742 ret = wl1271_cmd_join(wl);
1743 if (ret < 0) {
1744 wl1271_warning("cmd join failed %d", ret);
1745 goto out_sleep;
1746 }
1747 set_bit(WL1271_FLAG_JOINED, &wl->flags);
1748 }
1749
1750out_sleep:
1751 wl1271_ps_elp_sleep(wl);
1752
1753out:
1754 mutex_unlock(&wl->mutex);
1755}
1756
1757static int wl1271_op_conf_tx(struct ieee80211_hw *hw, u16 queue,
1758 const struct ieee80211_tx_queue_params *params)
1759{
1760 struct wl1271 *wl = hw->priv;
1761 int ret;
1762
1763 mutex_lock(&wl->mutex);
1764
1765 wl1271_debug(DEBUG_MAC80211, "mac80211 conf tx %d", queue);
1766
1767 ret = wl1271_ps_elp_wakeup(wl, false);
1768 if (ret < 0)
1769 goto out;
1770
1771 ret = wl1271_acx_ac_cfg(wl, wl1271_tx_get_queue(queue),
1772 params->cw_min, params->cw_max,
1773 params->aifs, params->txop);
1774 if (ret < 0)
1775 goto out_sleep;
1776
1777 ret = wl1271_acx_tid_cfg(wl, wl1271_tx_get_queue(queue),
1778 CONF_CHANNEL_TYPE_EDCF,
1779 wl1271_tx_get_queue(queue),
1780 CONF_PS_SCHEME_LEGACY_PSPOLL,
1781 CONF_ACK_POLICY_LEGACY, 0, 0);
1782 if (ret < 0)
1783 goto out_sleep;
1784
1039out_sleep: 1785out_sleep:
1040 wl1271_ps_elp_sleep(wl); 1786 wl1271_ps_elp_sleep(wl);
1041 1787
1042out: 1788out:
1043 mutex_unlock(&wl->mutex); 1789 mutex_unlock(&wl->mutex);
1790
1791 return ret;
1044} 1792}
1045 1793
1046 1794
1047/* can't be const, mac80211 writes to this */ 1795/* can't be const, mac80211 writes to this */
1048static struct ieee80211_rate wl1271_rates[] = { 1796static struct ieee80211_rate wl1271_rates[] = {
1049 { .bitrate = 10, 1797 { .bitrate = 10,
1050 .hw_value = 0x1, 1798 .hw_value = CONF_HW_BIT_RATE_1MBPS,
1051 .hw_value_short = 0x1, }, 1799 .hw_value_short = CONF_HW_BIT_RATE_1MBPS, },
1052 { .bitrate = 20, 1800 { .bitrate = 20,
1053 .hw_value = 0x2, 1801 .hw_value = CONF_HW_BIT_RATE_2MBPS,
1054 .hw_value_short = 0x2, 1802 .hw_value_short = CONF_HW_BIT_RATE_2MBPS,
1055 .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 1803 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1056 { .bitrate = 55, 1804 { .bitrate = 55,
1057 .hw_value = 0x4, 1805 .hw_value = CONF_HW_BIT_RATE_5_5MBPS,
1058 .hw_value_short = 0x4, 1806 .hw_value_short = CONF_HW_BIT_RATE_5_5MBPS,
1059 .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 1807 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1060 { .bitrate = 110, 1808 { .bitrate = 110,
1061 .hw_value = 0x20, 1809 .hw_value = CONF_HW_BIT_RATE_11MBPS,
1062 .hw_value_short = 0x20, 1810 .hw_value_short = CONF_HW_BIT_RATE_11MBPS,
1063 .flags = IEEE80211_RATE_SHORT_PREAMBLE }, 1811 .flags = IEEE80211_RATE_SHORT_PREAMBLE },
1064 { .bitrate = 60, 1812 { .bitrate = 60,
1065 .hw_value = 0x8, 1813 .hw_value = CONF_HW_BIT_RATE_6MBPS,
1066 .hw_value_short = 0x8, }, 1814 .hw_value_short = CONF_HW_BIT_RATE_6MBPS, },
1067 { .bitrate = 90, 1815 { .bitrate = 90,
1068 .hw_value = 0x10, 1816 .hw_value = CONF_HW_BIT_RATE_9MBPS,
1069 .hw_value_short = 0x10, }, 1817 .hw_value_short = CONF_HW_BIT_RATE_9MBPS, },
1070 { .bitrate = 120, 1818 { .bitrate = 120,
1071 .hw_value = 0x40, 1819 .hw_value = CONF_HW_BIT_RATE_12MBPS,
1072 .hw_value_short = 0x40, }, 1820 .hw_value_short = CONF_HW_BIT_RATE_12MBPS, },
1073 { .bitrate = 180, 1821 { .bitrate = 180,
1074 .hw_value = 0x80, 1822 .hw_value = CONF_HW_BIT_RATE_18MBPS,
1075 .hw_value_short = 0x80, }, 1823 .hw_value_short = CONF_HW_BIT_RATE_18MBPS, },
1076 { .bitrate = 240, 1824 { .bitrate = 240,
1077 .hw_value = 0x200, 1825 .hw_value = CONF_HW_BIT_RATE_24MBPS,
1078 .hw_value_short = 0x200, }, 1826 .hw_value_short = CONF_HW_BIT_RATE_24MBPS, },
1079 { .bitrate = 360, 1827 { .bitrate = 360,
1080 .hw_value = 0x400, 1828 .hw_value = CONF_HW_BIT_RATE_36MBPS,
1081 .hw_value_short = 0x400, }, 1829 .hw_value_short = CONF_HW_BIT_RATE_36MBPS, },
1082 { .bitrate = 480, 1830 { .bitrate = 480,
1083 .hw_value = 0x800, 1831 .hw_value = CONF_HW_BIT_RATE_48MBPS,
1084 .hw_value_short = 0x800, }, 1832 .hw_value_short = CONF_HW_BIT_RATE_48MBPS, },
1085 { .bitrate = 540, 1833 { .bitrate = 540,
1086 .hw_value = 0x1000, 1834 .hw_value = CONF_HW_BIT_RATE_54MBPS,
1087 .hw_value_short = 0x1000, }, 1835 .hw_value_short = CONF_HW_BIT_RATE_54MBPS, },
1088}; 1836};
1089 1837
1090/* can't be const, mac80211 writes to this */ 1838/* can't be const, mac80211 writes to this */
1091static struct ieee80211_channel wl1271_channels[] = { 1839static struct ieee80211_channel wl1271_channels[] = {
1092 { .hw_value = 1, .center_freq = 2412}, 1840 { .hw_value = 1, .center_freq = 2412, .max_power = 25 },
1093 { .hw_value = 2, .center_freq = 2417}, 1841 { .hw_value = 2, .center_freq = 2417, .max_power = 25 },
1094 { .hw_value = 3, .center_freq = 2422}, 1842 { .hw_value = 3, .center_freq = 2422, .max_power = 25 },
1095 { .hw_value = 4, .center_freq = 2427}, 1843 { .hw_value = 4, .center_freq = 2427, .max_power = 25 },
1096 { .hw_value = 5, .center_freq = 2432}, 1844 { .hw_value = 5, .center_freq = 2432, .max_power = 25 },
1097 { .hw_value = 6, .center_freq = 2437}, 1845 { .hw_value = 6, .center_freq = 2437, .max_power = 25 },
1098 { .hw_value = 7, .center_freq = 2442}, 1846 { .hw_value = 7, .center_freq = 2442, .max_power = 25 },
1099 { .hw_value = 8, .center_freq = 2447}, 1847 { .hw_value = 8, .center_freq = 2447, .max_power = 25 },
1100 { .hw_value = 9, .center_freq = 2452}, 1848 { .hw_value = 9, .center_freq = 2452, .max_power = 25 },
1101 { .hw_value = 10, .center_freq = 2457}, 1849 { .hw_value = 10, .center_freq = 2457, .max_power = 25 },
1102 { .hw_value = 11, .center_freq = 2462}, 1850 { .hw_value = 11, .center_freq = 2462, .max_power = 25 },
1103 { .hw_value = 12, .center_freq = 2467}, 1851 { .hw_value = 12, .center_freq = 2467, .max_power = 25 },
1104 { .hw_value = 13, .center_freq = 2472}, 1852 { .hw_value = 13, .center_freq = 2472, .max_power = 25 },
1105}; 1853};
1106 1854
1107/* can't be const, mac80211 writes to this */ 1855/* can't be const, mac80211 writes to this */
@@ -1112,6 +1860,88 @@ static struct ieee80211_supported_band wl1271_band_2ghz = {
1112 .n_bitrates = ARRAY_SIZE(wl1271_rates), 1860 .n_bitrates = ARRAY_SIZE(wl1271_rates),
1113}; 1861};
1114 1862
1863/* 5 GHz data rates for WL1273 */
1864static struct ieee80211_rate wl1271_rates_5ghz[] = {
1865 { .bitrate = 60,
1866 .hw_value = CONF_HW_BIT_RATE_6MBPS,
1867 .hw_value_short = CONF_HW_BIT_RATE_6MBPS, },
1868 { .bitrate = 90,
1869 .hw_value = CONF_HW_BIT_RATE_9MBPS,
1870 .hw_value_short = CONF_HW_BIT_RATE_9MBPS, },
1871 { .bitrate = 120,
1872 .hw_value = CONF_HW_BIT_RATE_12MBPS,
1873 .hw_value_short = CONF_HW_BIT_RATE_12MBPS, },
1874 { .bitrate = 180,
1875 .hw_value = CONF_HW_BIT_RATE_18MBPS,
1876 .hw_value_short = CONF_HW_BIT_RATE_18MBPS, },
1877 { .bitrate = 240,
1878 .hw_value = CONF_HW_BIT_RATE_24MBPS,
1879 .hw_value_short = CONF_HW_BIT_RATE_24MBPS, },
1880 { .bitrate = 360,
1881 .hw_value = CONF_HW_BIT_RATE_36MBPS,
1882 .hw_value_short = CONF_HW_BIT_RATE_36MBPS, },
1883 { .bitrate = 480,
1884 .hw_value = CONF_HW_BIT_RATE_48MBPS,
1885 .hw_value_short = CONF_HW_BIT_RATE_48MBPS, },
1886 { .bitrate = 540,
1887 .hw_value = CONF_HW_BIT_RATE_54MBPS,
1888 .hw_value_short = CONF_HW_BIT_RATE_54MBPS, },
1889};
1890
1891/* 5 GHz band channels for WL1273 */
1892static struct ieee80211_channel wl1271_channels_5ghz[] = {
1893 { .hw_value = 183, .center_freq = 4915},
1894 { .hw_value = 184, .center_freq = 4920},
1895 { .hw_value = 185, .center_freq = 4925},
1896 { .hw_value = 187, .center_freq = 4935},
1897 { .hw_value = 188, .center_freq = 4940},
1898 { .hw_value = 189, .center_freq = 4945},
1899 { .hw_value = 192, .center_freq = 4960},
1900 { .hw_value = 196, .center_freq = 4980},
1901 { .hw_value = 7, .center_freq = 5035},
1902 { .hw_value = 8, .center_freq = 5040},
1903 { .hw_value = 9, .center_freq = 5045},
1904 { .hw_value = 11, .center_freq = 5055},
1905 { .hw_value = 12, .center_freq = 5060},
1906 { .hw_value = 16, .center_freq = 5080},
1907 { .hw_value = 34, .center_freq = 5170},
1908 { .hw_value = 36, .center_freq = 5180},
1909 { .hw_value = 38, .center_freq = 5190},
1910 { .hw_value = 40, .center_freq = 5200},
1911 { .hw_value = 42, .center_freq = 5210},
1912 { .hw_value = 44, .center_freq = 5220},
1913 { .hw_value = 46, .center_freq = 5230},
1914 { .hw_value = 48, .center_freq = 5240},
1915 { .hw_value = 52, .center_freq = 5260},
1916 { .hw_value = 56, .center_freq = 5280},
1917 { .hw_value = 60, .center_freq = 5300},
1918 { .hw_value = 64, .center_freq = 5320},
1919 { .hw_value = 100, .center_freq = 5500},
1920 { .hw_value = 104, .center_freq = 5520},
1921 { .hw_value = 108, .center_freq = 5540},
1922 { .hw_value = 112, .center_freq = 5560},
1923 { .hw_value = 116, .center_freq = 5580},
1924 { .hw_value = 120, .center_freq = 5600},
1925 { .hw_value = 124, .center_freq = 5620},
1926 { .hw_value = 128, .center_freq = 5640},
1927 { .hw_value = 132, .center_freq = 5660},
1928 { .hw_value = 136, .center_freq = 5680},
1929 { .hw_value = 140, .center_freq = 5700},
1930 { .hw_value = 149, .center_freq = 5745},
1931 { .hw_value = 153, .center_freq = 5765},
1932 { .hw_value = 157, .center_freq = 5785},
1933 { .hw_value = 161, .center_freq = 5805},
1934 { .hw_value = 165, .center_freq = 5825},
1935};
1936
1937
1938static struct ieee80211_supported_band wl1271_band_5ghz = {
1939 .channels = wl1271_channels_5ghz,
1940 .n_channels = ARRAY_SIZE(wl1271_channels_5ghz),
1941 .bitrates = wl1271_rates_5ghz,
1942 .n_bitrates = ARRAY_SIZE(wl1271_rates_5ghz),
1943};
1944
1115static const struct ieee80211_ops wl1271_ops = { 1945static const struct ieee80211_ops wl1271_ops = {
1116 .start = wl1271_op_start, 1946 .start = wl1271_op_start,
1117 .stop = wl1271_op_stop, 1947 .stop = wl1271_op_stop,
@@ -1119,12 +1949,15 @@ static const struct ieee80211_ops wl1271_ops = {
1119 .remove_interface = wl1271_op_remove_interface, 1949 .remove_interface = wl1271_op_remove_interface,
1120 .config = wl1271_op_config, 1950 .config = wl1271_op_config,
1121/* .config_interface = wl1271_op_config_interface, */ 1951/* .config_interface = wl1271_op_config_interface, */
1952 .prepare_multicast = wl1271_op_prepare_multicast,
1122 .configure_filter = wl1271_op_configure_filter, 1953 .configure_filter = wl1271_op_configure_filter,
1123 .tx = wl1271_op_tx, 1954 .tx = wl1271_op_tx,
1124 .set_key = wl1271_op_set_key, 1955 .set_key = wl1271_op_set_key,
1125 .hw_scan = wl1271_op_hw_scan, 1956 .hw_scan = wl1271_op_hw_scan,
1126 .bss_info_changed = wl1271_op_bss_info_changed, 1957 .bss_info_changed = wl1271_op_bss_info_changed,
1127 .set_rts_threshold = wl1271_op_set_rts_threshold, 1958 .set_rts_threshold = wl1271_op_set_rts_threshold,
1959 .conf_tx = wl1271_op_conf_tx,
1960 CFG80211_TESTMODE_CMD(wl1271_tm_cmd)
1128}; 1961};
1129 1962
1130static int wl1271_register_hw(struct wl1271 *wl) 1963static int wl1271_register_hw(struct wl1271 *wl)
@@ -1151,24 +1984,27 @@ static int wl1271_register_hw(struct wl1271 *wl)
1151 1984
1152static int wl1271_init_ieee80211(struct wl1271 *wl) 1985static int wl1271_init_ieee80211(struct wl1271 *wl)
1153{ 1986{
1154 /* 1987 /* The tx descriptor buffer and the TKIP space. */
1155 * The tx descriptor buffer and the TKIP space. 1988 wl->hw->extra_tx_headroom = WL1271_TKIP_IV_SPACE +
1156 * 1989 sizeof(struct wl1271_tx_hw_descr);
1157 * FIXME: add correct 1271 descriptor size
1158 */
1159 wl->hw->extra_tx_headroom = WL1271_TKIP_IV_SPACE;
1160 1990
1161 /* unit us */ 1991 /* unit us */
1162 /* FIXME: find a proper value */ 1992 /* FIXME: find a proper value */
1163 wl->hw->channel_change_time = 10000; 1993 wl->hw->channel_change_time = 10000;
1164 1994
1165 wl->hw->flags = IEEE80211_HW_SIGNAL_DBM | 1995 wl->hw->flags = IEEE80211_HW_SIGNAL_DBM |
1166 IEEE80211_HW_NOISE_DBM; 1996 IEEE80211_HW_NOISE_DBM |
1997 IEEE80211_HW_BEACON_FILTER |
1998 IEEE80211_HW_SUPPORTS_PS;
1167 1999
1168 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); 2000 wl->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
2001 BIT(NL80211_IFTYPE_ADHOC);
1169 wl->hw->wiphy->max_scan_ssids = 1; 2002 wl->hw->wiphy->max_scan_ssids = 1;
1170 wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl1271_band_2ghz; 2003 wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wl1271_band_2ghz;
1171 2004
2005 if (wl1271_11a_enabled())
2006 wl->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &wl1271_band_5ghz;
2007
1172 SET_IEEE80211_DEV(wl->hw, &wl->spi->dev); 2008 SET_IEEE80211_DEV(wl->hw, &wl->spi->dev);
1173 2009
1174 return 0; 2010 return 0;
@@ -1190,73 +2026,99 @@ static struct platform_device wl1271_device = {
1190}; 2026};
1191 2027
1192#define WL1271_DEFAULT_CHANNEL 0 2028#define WL1271_DEFAULT_CHANNEL 0
1193static int __devinit wl1271_probe(struct spi_device *spi) 2029
2030static struct ieee80211_hw *wl1271_alloc_hw(void)
1194{ 2031{
1195 struct wl12xx_platform_data *pdata;
1196 struct ieee80211_hw *hw; 2032 struct ieee80211_hw *hw;
1197 struct wl1271 *wl; 2033 struct wl1271 *wl;
1198 int ret, i; 2034 int i;
1199 static const u8 nokia_oui[3] = {0x00, 0x1f, 0xdf};
1200
1201 pdata = spi->dev.platform_data;
1202 if (!pdata) {
1203 wl1271_error("no platform data");
1204 return -ENODEV;
1205 }
1206 2035
1207 hw = ieee80211_alloc_hw(sizeof(*wl), &wl1271_ops); 2036 hw = ieee80211_alloc_hw(sizeof(*wl), &wl1271_ops);
1208 if (!hw) { 2037 if (!hw) {
1209 wl1271_error("could not alloc ieee80211_hw"); 2038 wl1271_error("could not alloc ieee80211_hw");
1210 return -ENOMEM; 2039 return ERR_PTR(-ENOMEM);
1211 } 2040 }
1212 2041
1213 wl = hw->priv; 2042 wl = hw->priv;
1214 memset(wl, 0, sizeof(*wl)); 2043 memset(wl, 0, sizeof(*wl));
1215 2044
2045 INIT_LIST_HEAD(&wl->list);
2046
1216 wl->hw = hw; 2047 wl->hw = hw;
1217 dev_set_drvdata(&spi->dev, wl);
1218 wl->spi = spi;
1219 2048
1220 skb_queue_head_init(&wl->tx_queue); 2049 skb_queue_head_init(&wl->tx_queue);
1221 2050
1222 INIT_WORK(&wl->filter_work, wl1271_filter_work); 2051 INIT_DELAYED_WORK(&wl->elp_work, wl1271_elp_work);
1223 wl->channel = WL1271_DEFAULT_CHANNEL; 2052 wl->channel = WL1271_DEFAULT_CHANNEL;
1224 wl->scanning = false;
1225 wl->default_key = 0; 2053 wl->default_key = 0;
1226 wl->listen_int = 1;
1227 wl->rx_counter = 0; 2054 wl->rx_counter = 0;
1228 wl->rx_config = WL1271_DEFAULT_RX_CONFIG; 2055 wl->rx_config = WL1271_DEFAULT_RX_CONFIG;
1229 wl->rx_filter = WL1271_DEFAULT_RX_FILTER; 2056 wl->rx_filter = WL1271_DEFAULT_RX_FILTER;
1230 wl->elp = false; 2057 wl->psm_entry_retry = 0;
1231 wl->psm = 0;
1232 wl->psm_requested = false;
1233 wl->tx_queue_stopped = false;
1234 wl->power_level = WL1271_DEFAULT_POWER_LEVEL; 2058 wl->power_level = WL1271_DEFAULT_POWER_LEVEL;
1235 2059 wl->basic_rate_set = CONF_TX_RATE_MASK_BASIC;
1236 /* We use the default power on sleep time until we know which chip 2060 wl->rate_set = CONF_TX_RATE_MASK_BASIC;
1237 * we're using */ 2061 wl->sta_rate_set = 0;
1238 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++) 2062 wl->band = IEEE80211_BAND_2GHZ;
2063 wl->vif = NULL;
2064 wl->flags = 0;
2065
2066 for (i = 0; i < ACX_TX_DESCRIPTORS; i++)
1239 wl->tx_frames[i] = NULL; 2067 wl->tx_frames[i] = NULL;
1240 2068
1241 spin_lock_init(&wl->wl_lock); 2069 spin_lock_init(&wl->wl_lock);
1242 2070
1243 /*
1244 * In case our MAC address is not correctly set,
1245 * we use a random but Nokia MAC.
1246 */
1247 memcpy(wl->mac_addr, nokia_oui, 3);
1248 get_random_bytes(wl->mac_addr + 3, 3);
1249
1250 wl->state = WL1271_STATE_OFF; 2071 wl->state = WL1271_STATE_OFF;
1251 mutex_init(&wl->mutex); 2072 mutex_init(&wl->mutex);
1252 2073
1253 wl->rx_descriptor = kmalloc(sizeof(*wl->rx_descriptor), GFP_KERNEL); 2074 /* Apply default driver configuration. */
1254 if (!wl->rx_descriptor) { 2075 wl1271_conf_init(wl);
1255 wl1271_error("could not allocate memory for rx descriptor"); 2076
1256 ret = -ENOMEM; 2077 return hw;
1257 goto out_free; 2078}
2079
2080int wl1271_free_hw(struct wl1271 *wl)
2081{
2082 ieee80211_unregister_hw(wl->hw);
2083
2084 wl1271_debugfs_exit(wl);
2085
2086 kfree(wl->target_mem_map);
2087 vfree(wl->fw);
2088 wl->fw = NULL;
2089 kfree(wl->nvs);
2090 wl->nvs = NULL;
2091
2092 kfree(wl->fw_status);
2093 kfree(wl->tx_res_if);
2094
2095 ieee80211_free_hw(wl->hw);
2096
2097 return 0;
2098}
2099
2100static int __devinit wl1271_probe(struct spi_device *spi)
2101{
2102 struct wl12xx_platform_data *pdata;
2103 struct ieee80211_hw *hw;
2104 struct wl1271 *wl;
2105 int ret;
2106
2107 pdata = spi->dev.platform_data;
2108 if (!pdata) {
2109 wl1271_error("no platform data");
2110 return -ENODEV;
1258 } 2111 }
1259 2112
2113 hw = wl1271_alloc_hw();
2114 if (IS_ERR(hw))
2115 return PTR_ERR(hw);
2116
2117 wl = hw->priv;
2118
2119 dev_set_drvdata(&spi->dev, wl);
2120 wl->spi = spi;
2121
1260 /* This is the only SPI value that we need to set here, the rest 2122 /* This is the only SPI value that we need to set here, the rest
1261 * comes from the board-peripherals file */ 2123 * comes from the board-peripherals file */
1262 spi->bits_per_word = 32; 2124 spi->bits_per_word = 32;
@@ -1319,9 +2181,6 @@ static int __devinit wl1271_probe(struct spi_device *spi)
1319 free_irq(wl->irq, wl); 2181 free_irq(wl->irq, wl);
1320 2182
1321 out_free: 2183 out_free:
1322 kfree(wl->rx_descriptor);
1323 wl->rx_descriptor = NULL;
1324
1325 ieee80211_free_hw(hw); 2184 ieee80211_free_hw(hw);
1326 2185
1327 return ret; 2186 return ret;
@@ -1331,24 +2190,10 @@ static int __devexit wl1271_remove(struct spi_device *spi)
1331{ 2190{
1332 struct wl1271 *wl = dev_get_drvdata(&spi->dev); 2191 struct wl1271 *wl = dev_get_drvdata(&spi->dev);
1333 2192
1334 ieee80211_unregister_hw(wl->hw);
1335
1336 wl1271_debugfs_exit(wl);
1337 platform_device_unregister(&wl1271_device); 2193 platform_device_unregister(&wl1271_device);
1338 free_irq(wl->irq, wl); 2194 free_irq(wl->irq, wl);
1339 kfree(wl->target_mem_map);
1340 kfree(wl->fw);
1341 wl->fw = NULL;
1342 kfree(wl->nvs);
1343 wl->nvs = NULL;
1344
1345 kfree(wl->rx_descriptor);
1346 wl->rx_descriptor = NULL;
1347
1348 kfree(wl->fw_status);
1349 kfree(wl->tx_res_if);
1350 2195
1351 ieee80211_free_hw(wl->hw); 2196 wl1271_free_hw(wl);
1352 2197
1353 return 0; 2198 return 0;
1354} 2199}
@@ -1391,3 +2236,5 @@ module_exit(wl1271_exit);
1391 2236
1392MODULE_LICENSE("GPL"); 2237MODULE_LICENSE("GPL");
1393MODULE_AUTHOR("Luciano Coelho <luciano.coelho@nokia.com>"); 2238MODULE_AUTHOR("Luciano Coelho <luciano.coelho@nokia.com>");
2239MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
2240MODULE_FIRMWARE(WL1271_FW_NAME);
diff --git a/drivers/net/wireless/wl12xx/wl1271_ps.c b/drivers/net/wireless/wl12xx/wl1271_ps.c
index 1dc74b0c7736..e2b1ebf096e8 100644
--- a/drivers/net/wireless/wl12xx/wl1271_ps.c
+++ b/drivers/net/wireless/wl12xx/wl1271_ps.c
@@ -24,28 +24,43 @@
24#include "wl1271_reg.h" 24#include "wl1271_reg.h"
25#include "wl1271_ps.h" 25#include "wl1271_ps.h"
26#include "wl1271_spi.h" 26#include "wl1271_spi.h"
27#include "wl1271_io.h"
27 28
28#define WL1271_WAKEUP_TIMEOUT 500 29#define WL1271_WAKEUP_TIMEOUT 500
29 30
31void wl1271_elp_work(struct work_struct *work)
32{
33 struct delayed_work *dwork;
34 struct wl1271 *wl;
35
36 dwork = container_of(work, struct delayed_work, work);
37 wl = container_of(dwork, struct wl1271, elp_work);
38
39 wl1271_debug(DEBUG_PSM, "elp work");
40
41 mutex_lock(&wl->mutex);
42
43 if (test_bit(WL1271_FLAG_IN_ELP, &wl->flags) ||
44 !test_bit(WL1271_FLAG_PSM, &wl->flags))
45 goto out;
46
47 wl1271_debug(DEBUG_PSM, "chip to elp");
48 wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);
49 set_bit(WL1271_FLAG_IN_ELP, &wl->flags);
50
51out:
52 mutex_unlock(&wl->mutex);
53}
54
55#define ELP_ENTRY_DELAY 5
56
30/* Routines to toggle sleep mode while in ELP */ 57/* Routines to toggle sleep mode while in ELP */
31void wl1271_ps_elp_sleep(struct wl1271 *wl) 58void wl1271_ps_elp_sleep(struct wl1271 *wl)
32{ 59{
33 /* 60 if (test_bit(WL1271_FLAG_PSM, &wl->flags)) {
34 * FIXME: due to a problem in the firmware (causing a firmware 61 cancel_delayed_work(&wl->elp_work);
35 * crash), ELP entry is prevented below. Remove the "true" to 62 ieee80211_queue_delayed_work(wl->hw, &wl->elp_work,
36 * re-enable ELP entry. 63 msecs_to_jiffies(ELP_ENTRY_DELAY));
37 */
38 if (true || wl->elp || !wl->psm)
39 return;
40
41 /*
42 * Go to ELP unless there is work already pending - pending work
43 * will immediately wakeup the chipset anyway.
44 */
45 if (!work_pending(&wl->irq_work) && !work_pending(&wl->tx_work)) {
46 wl1271_debug(DEBUG_PSM, "chip to elp");
47 wl1271_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_SLEEP);
48 wl->elp = true;
49 } 64 }
50} 65}
51 66
@@ -57,7 +72,7 @@ int wl1271_ps_elp_wakeup(struct wl1271 *wl, bool chip_awake)
57 u32 start_time = jiffies; 72 u32 start_time = jiffies;
58 bool pending = false; 73 bool pending = false;
59 74
60 if (!wl->elp) 75 if (!test_bit(WL1271_FLAG_IN_ELP, &wl->flags))
61 return 0; 76 return 0;
62 77
63 wl1271_debug(DEBUG_PSM, "waking up chip from elp"); 78 wl1271_debug(DEBUG_PSM, "waking up chip from elp");
@@ -73,7 +88,7 @@ int wl1271_ps_elp_wakeup(struct wl1271 *wl, bool chip_awake)
73 wl->elp_compl = &compl; 88 wl->elp_compl = &compl;
74 spin_unlock_irqrestore(&wl->wl_lock, flags); 89 spin_unlock_irqrestore(&wl->wl_lock, flags);
75 90
76 wl1271_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP); 91 wl1271_raw_write32(wl, HW_ACCESS_ELP_CTRL_REG_ADDR, ELPCTRL_WAKE_UP);
77 92
78 if (!pending) { 93 if (!pending) {
79 ret = wait_for_completion_timeout( 94 ret = wait_for_completion_timeout(
@@ -88,7 +103,7 @@ int wl1271_ps_elp_wakeup(struct wl1271 *wl, bool chip_awake)
88 } 103 }
89 } 104 }
90 105
91 wl->elp = false; 106 clear_bit(WL1271_FLAG_IN_ELP, &wl->flags);
92 107
93 wl1271_debug(DEBUG_PSM, "wakeup time: %u ms", 108 wl1271_debug(DEBUG_PSM, "wakeup time: %u ms",
94 jiffies_to_msecs(jiffies - start_time)); 109 jiffies_to_msecs(jiffies - start_time));
@@ -104,22 +119,20 @@ out:
104 return 0; 119 return 0;
105} 120}
106 121
107int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode) 122int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode,
123 bool send)
108{ 124{
109 int ret; 125 int ret;
110 126
111 switch (mode) { 127 switch (mode) {
112 case STATION_POWER_SAVE_MODE: 128 case STATION_POWER_SAVE_MODE:
113 wl1271_debug(DEBUG_PSM, "entering psm"); 129 wl1271_debug(DEBUG_PSM, "entering psm");
114 ret = wl1271_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE);
115 if (ret < 0)
116 return ret;
117 130
118 wl1271_ps_elp_sleep(wl); 131 ret = wl1271_cmd_ps_mode(wl, STATION_POWER_SAVE_MODE, send);
119 if (ret < 0) 132 if (ret < 0)
120 return ret; 133 return ret;
121 134
122 wl->psm = 1; 135 set_bit(WL1271_FLAG_PSM, &wl->flags);
123 break; 136 break;
124 case STATION_ACTIVE_MODE: 137 case STATION_ACTIVE_MODE:
125 default: 138 default:
@@ -128,11 +141,21 @@ int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode)
128 if (ret < 0) 141 if (ret < 0)
129 return ret; 142 return ret;
130 143
131 ret = wl1271_cmd_ps_mode(wl, STATION_ACTIVE_MODE); 144 /* disable beacon early termination */
145 ret = wl1271_acx_bet_enable(wl, false);
146 if (ret < 0)
147 return ret;
148
149 /* disable beacon filtering */
150 ret = wl1271_acx_beacon_filter_opt(wl, false);
151 if (ret < 0)
152 return ret;
153
154 ret = wl1271_cmd_ps_mode(wl, STATION_ACTIVE_MODE, send);
132 if (ret < 0) 155 if (ret < 0)
133 return ret; 156 return ret;
134 157
135 wl->psm = 0; 158 clear_bit(WL1271_FLAG_PSM, &wl->flags);
136 break; 159 break;
137 } 160 }
138 161
diff --git a/drivers/net/wireless/wl12xx/wl1271_ps.h b/drivers/net/wireless/wl12xx/wl1271_ps.h
index de2bd3c7dc9c..940276f517a4 100644
--- a/drivers/net/wireless/wl12xx/wl1271_ps.h
+++ b/drivers/net/wireless/wl12xx/wl1271_ps.h
@@ -27,9 +27,10 @@
27#include "wl1271.h" 27#include "wl1271.h"
28#include "wl1271_acx.h" 28#include "wl1271_acx.h"
29 29
30int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode); 30int wl1271_ps_set_mode(struct wl1271 *wl, enum wl1271_cmd_ps_mode mode,
31 bool send);
31void wl1271_ps_elp_sleep(struct wl1271 *wl); 32void wl1271_ps_elp_sleep(struct wl1271 *wl);
32int wl1271_ps_elp_wakeup(struct wl1271 *wl, bool chip_awake); 33int wl1271_ps_elp_wakeup(struct wl1271 *wl, bool chip_awake);
33 34void wl1271_elp_work(struct work_struct *work);
34 35
35#endif /* __WL1271_PS_H__ */ 36#endif /* __WL1271_PS_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1271_reg.h b/drivers/net/wireless/wl12xx/wl1271_reg.h
index f8ed4a4fc691..990960771528 100644
--- a/drivers/net/wireless/wl12xx/wl1271_reg.h
+++ b/drivers/net/wireless/wl12xx/wl1271_reg.h
@@ -34,7 +34,7 @@
34#define REGISTERS_WORK_SIZE 0x0000b000 34#define REGISTERS_WORK_SIZE 0x0000b000
35 35
36#define HW_ACCESS_ELP_CTRL_REG_ADDR 0x1FFFC 36#define HW_ACCESS_ELP_CTRL_REG_ADDR 0x1FFFC
37#define STATUS_MEM_ADDRESS 0x40400 37#define FW_STATUS_ADDR (0x14FC0 + 0xA000)
38 38
39/* ELP register commands */ 39/* ELP register commands */
40#define ELPCTRL_WAKE_UP 0x1 40#define ELPCTRL_WAKE_UP 0x1
@@ -62,73 +62,10 @@
62#define WL1271_SLV_REG_DATA (REGISTERS_BASE + 0x0008) 62#define WL1271_SLV_REG_DATA (REGISTERS_BASE + 0x0008)
63#define WL1271_SLV_REG_ADATA (REGISTERS_BASE + 0x000c) 63#define WL1271_SLV_REG_ADATA (REGISTERS_BASE + 0x000c)
64#define WL1271_SLV_MEM_DATA (REGISTERS_BASE + 0x0018) 64#define WL1271_SLV_MEM_DATA (REGISTERS_BASE + 0x0018)
65/*
66 * Interrupt registers.
67 * 64 bit interrupt sources registers ws ced.
68 * sme interupts were removed and new ones were added.
69 * Order was changed.
70 */
71#define FIQ_MASK (REGISTERS_BASE + 0x0400)
72#define FIQ_MASK_L (REGISTERS_BASE + 0x0400)
73#define FIQ_MASK_H (REGISTERS_BASE + 0x0404)
74#define FIQ_MASK_SET (REGISTERS_BASE + 0x0408)
75#define FIQ_MASK_SET_L (REGISTERS_BASE + 0x0408)
76#define FIQ_MASK_SET_H (REGISTERS_BASE + 0x040C)
77#define FIQ_MASK_CLR (REGISTERS_BASE + 0x0410)
78#define FIQ_MASK_CLR_L (REGISTERS_BASE + 0x0410)
79#define FIQ_MASK_CLR_H (REGISTERS_BASE + 0x0414)
80#define IRQ_MASK (REGISTERS_BASE + 0x0418)
81#define IRQ_MASK_L (REGISTERS_BASE + 0x0418)
82#define IRQ_MASK_H (REGISTERS_BASE + 0x041C)
83#define IRQ_MASK_SET (REGISTERS_BASE + 0x0420)
84#define IRQ_MASK_SET_L (REGISTERS_BASE + 0x0420)
85#define IRQ_MASK_SET_H (REGISTERS_BASE + 0x0424)
86#define IRQ_MASK_CLR (REGISTERS_BASE + 0x0428)
87#define IRQ_MASK_CLR_L (REGISTERS_BASE + 0x0428)
88#define IRQ_MASK_CLR_H (REGISTERS_BASE + 0x042C)
89#define ECPU_MASK (REGISTERS_BASE + 0x0448)
90#define FIQ_STS_L (REGISTERS_BASE + 0x044C)
91#define FIQ_STS_H (REGISTERS_BASE + 0x0450)
92#define IRQ_STS_L (REGISTERS_BASE + 0x0454)
93#define IRQ_STS_H (REGISTERS_BASE + 0x0458)
94#define INT_STS_ND (REGISTERS_BASE + 0x0464)
95#define INT_STS_RAW_L (REGISTERS_BASE + 0x0464)
96#define INT_STS_RAW_H (REGISTERS_BASE + 0x0468)
97#define INT_STS_CLR (REGISTERS_BASE + 0x04B4)
98#define INT_STS_CLR_L (REGISTERS_BASE + 0x04B4)
99#define INT_STS_CLR_H (REGISTERS_BASE + 0x04B8)
100#define INT_ACK (REGISTERS_BASE + 0x046C)
101#define INT_ACK_L (REGISTERS_BASE + 0x046C)
102#define INT_ACK_H (REGISTERS_BASE + 0x0470)
103#define INT_TRIG (REGISTERS_BASE + 0x0474)
104#define INT_TRIG_L (REGISTERS_BASE + 0x0474)
105#define INT_TRIG_H (REGISTERS_BASE + 0x0478)
106#define HOST_STS_L (REGISTERS_BASE + 0x045C)
107#define HOST_STS_H (REGISTERS_BASE + 0x0460)
108#define HOST_MASK (REGISTERS_BASE + 0x0430)
109#define HOST_MASK_L (REGISTERS_BASE + 0x0430)
110#define HOST_MASK_H (REGISTERS_BASE + 0x0434)
111#define HOST_MASK_SET (REGISTERS_BASE + 0x0438)
112#define HOST_MASK_SET_L (REGISTERS_BASE + 0x0438)
113#define HOST_MASK_SET_H (REGISTERS_BASE + 0x043C)
114#define HOST_MASK_CLR (REGISTERS_BASE + 0x0440)
115#define HOST_MASK_CLR_L (REGISTERS_BASE + 0x0440)
116#define HOST_MASK_CLR_H (REGISTERS_BASE + 0x0444)
117 65
118#define ACX_REG_INTERRUPT_TRIG (REGISTERS_BASE + 0x0474) 66#define ACX_REG_INTERRUPT_TRIG (REGISTERS_BASE + 0x0474)
119#define ACX_REG_INTERRUPT_TRIG_H (REGISTERS_BASE + 0x0478) 67#define ACX_REG_INTERRUPT_TRIG_H (REGISTERS_BASE + 0x0478)
120 68
121/* Host Interrupts*/
122#define HINT_MASK (REGISTERS_BASE + 0x0494)
123#define HINT_MASK_SET (REGISTERS_BASE + 0x0498)
124#define HINT_MASK_CLR (REGISTERS_BASE + 0x049C)
125#define HINT_STS_ND_MASKED (REGISTERS_BASE + 0x04A0)
126/*1150 spec calls this HINT_STS_RAW*/
127#define HINT_STS_ND (REGISTERS_BASE + 0x04B0)
128#define HINT_STS_CLR (REGISTERS_BASE + 0x04A4)
129#define HINT_ACK (REGISTERS_BASE + 0x04A8)
130#define HINT_TRIG (REGISTERS_BASE + 0x04AC)
131
132/*============================================= 69/*=============================================
133 Host Interrupt Mask Register - 32bit (RW) 70 Host Interrupt Mask Register - 32bit (RW)
134 ------------------------------------------ 71 ------------------------------------------
@@ -213,7 +150,6 @@
213==============================================*/ 150==============================================*/
214#define ACX_REG_INTERRUPT_ACK (REGISTERS_BASE + 0x04F0) 151#define ACX_REG_INTERRUPT_ACK (REGISTERS_BASE + 0x04F0)
215 152
216#define RX_DRIVER_DUMMY_WRITE_ADDRESS (REGISTERS_BASE + 0x0534)
217#define RX_DRIVER_COUNTER_ADDRESS (REGISTERS_BASE + 0x0538) 153#define RX_DRIVER_COUNTER_ADDRESS (REGISTERS_BASE + 0x0538)
218 154
219/* Device Configuration registers*/ 155/* Device Configuration registers*/
@@ -434,16 +370,6 @@
434 370
435 371
436/*=============================================== 372/*===============================================
437 Phy regs
438 ===============================================*/
439#define ACX_PHY_ADDR_REG SBB_ADDR
440#define ACX_PHY_DATA_REG SBB_DATA
441#define ACX_PHY_CTRL_REG SBB_CTL
442#define ACX_PHY_REG_WR_MASK 0x00000001ul
443#define ACX_PHY_REG_RD_MASK 0x00000002ul
444
445
446/*===============================================
447 EEPROM Read/Write Request 32bit RW 373 EEPROM Read/Write Request 32bit RW
448 ------------------------------------------ 374 ------------------------------------------
449 1 EE_READ - EEPROM Read Request 1 - Setting this bit 375 1 EE_READ - EEPROM Read Request 1 - Setting this bit
@@ -512,28 +438,6 @@
512#define ACX_CONT_WIND_MIN_MASK 0x0000007f 438#define ACX_CONT_WIND_MIN_MASK 0x0000007f
513#define ACX_CONT_WIND_MAX 0x03ff0000 439#define ACX_CONT_WIND_MAX 0x03ff0000
514 440
515/*
516 * Indirect slave register/memory registers
517 * ----------------------------------------
518 */
519#define HW_SLAVE_REG_ADDR_REG 0x00000004
520#define HW_SLAVE_REG_DATA_REG 0x00000008
521#define HW_SLAVE_REG_CTRL_REG 0x0000000c
522
523#define SLAVE_AUTO_INC 0x00010000
524#define SLAVE_NO_AUTO_INC 0x00000000
525#define SLAVE_HOST_LITTLE_ENDIAN 0x00000000
526
527#define HW_SLAVE_MEM_ADDR_REG SLV_MEM_ADDR
528#define HW_SLAVE_MEM_DATA_REG SLV_MEM_DATA
529#define HW_SLAVE_MEM_CTRL_REG SLV_MEM_CTL
530#define HW_SLAVE_MEM_ENDIAN_REG SLV_END_CTL
531
532#define HW_FUNC_EVENT_INT_EN 0x8000
533#define HW_FUNC_EVENT_MASK_REG 0x00000034
534
535#define ACX_MAC_TIMESTAMP_REG (MAC_TIMESTAMP)
536
537/*=============================================== 441/*===============================================
538 HI_CFG Interface Configuration Register Values 442 HI_CFG Interface Configuration Register Values
539 ------------------------------------------ 443 ------------------------------------------
@@ -614,50 +518,6 @@ enum {
614 MAX_RADIO_BANDS = 0xFF 518 MAX_RADIO_BANDS = 0xFF
615}; 519};
616 520
617enum {
618 NO_RATE = 0,
619 RATE_1MBPS = 0x0A,
620 RATE_2MBPS = 0x14,
621 RATE_5_5MBPS = 0x37,
622 RATE_6MBPS = 0x0B,
623 RATE_9MBPS = 0x0F,
624 RATE_11MBPS = 0x6E,
625 RATE_12MBPS = 0x0A,
626 RATE_18MBPS = 0x0E,
627 RATE_22MBPS = 0xDC,
628 RATE_24MBPS = 0x09,
629 RATE_36MBPS = 0x0D,
630 RATE_48MBPS = 0x08,
631 RATE_54MBPS = 0x0C
632};
633
634enum {
635 RATE_INDEX_1MBPS = 0,
636 RATE_INDEX_2MBPS = 1,
637 RATE_INDEX_5_5MBPS = 2,
638 RATE_INDEX_6MBPS = 3,
639 RATE_INDEX_9MBPS = 4,
640 RATE_INDEX_11MBPS = 5,
641 RATE_INDEX_12MBPS = 6,
642 RATE_INDEX_18MBPS = 7,
643 RATE_INDEX_22MBPS = 8,
644 RATE_INDEX_24MBPS = 9,
645 RATE_INDEX_36MBPS = 10,
646 RATE_INDEX_48MBPS = 11,
647 RATE_INDEX_54MBPS = 12,
648 RATE_INDEX_MAX = RATE_INDEX_54MBPS,
649 MAX_RATE_INDEX,
650 INVALID_RATE_INDEX = MAX_RATE_INDEX,
651 RATE_INDEX_ENUM_MAX_SIZE = 0x7FFFFFFF
652};
653
654enum {
655 RATE_MASK_1MBPS = 0x1,
656 RATE_MASK_2MBPS = 0x2,
657 RATE_MASK_5_5MBPS = 0x4,
658 RATE_MASK_11MBPS = 0x20,
659};
660
661#define SHORT_PREAMBLE_BIT BIT(0) /* CCK or Barker depending on the rate */ 521#define SHORT_PREAMBLE_BIT BIT(0) /* CCK or Barker depending on the rate */
662#define OFDM_RATE_BIT BIT(6) 522#define OFDM_RATE_BIT BIT(6)
663#define PBCC_RATE_BIT BIT(7) 523#define PBCC_RATE_BIT BIT(7)
@@ -692,10 +552,6 @@ b12-b0 - Supported Rate indicator bits as defined below.
692******************************************************************************/ 552******************************************************************************/
693 553
694 554
695#define TNETW1251_CHIP_ID_PG1_0 0x07010101
696#define TNETW1251_CHIP_ID_PG1_1 0x07020101
697#define TNETW1251_CHIP_ID_PG1_2 0x07030101
698
699/************************************************************************* 555/*************************************************************************
700 556
701 Interrupt Trigger Register (Host -> WiLink) 557 Interrupt Trigger Register (Host -> WiLink)
diff --git a/drivers/net/wireless/wl12xx/wl1271_rx.c b/drivers/net/wireless/wl12xx/wl1271_rx.c
index ad8b6904c5eb..c723d9c7e131 100644
--- a/drivers/net/wireless/wl12xx/wl1271_rx.c
+++ b/drivers/net/wireless/wl12xx/wl1271_rx.c
@@ -21,23 +21,27 @@
21 * 21 *
22 */ 22 */
23 23
24#include <linux/gfp.h>
25
24#include "wl1271.h" 26#include "wl1271.h"
25#include "wl1271_acx.h" 27#include "wl1271_acx.h"
26#include "wl1271_reg.h" 28#include "wl1271_reg.h"
27#include "wl1271_rx.h" 29#include "wl1271_rx.h"
28#include "wl1271_spi.h" 30#include "wl1271_spi.h"
31#include "wl1271_io.h"
29 32
30static u8 wl1271_rx_get_mem_block(struct wl1271_fw_status *status, 33static u8 wl1271_rx_get_mem_block(struct wl1271_fw_status *status,
31 u32 drv_rx_counter) 34 u32 drv_rx_counter)
32{ 35{
33 return status->rx_pkt_descs[drv_rx_counter] & RX_MEM_BLOCK_MASK; 36 return le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
37 RX_MEM_BLOCK_MASK;
34} 38}
35 39
36static u32 wl1271_rx_get_buf_size(struct wl1271_fw_status *status, 40static u32 wl1271_rx_get_buf_size(struct wl1271_fw_status *status,
37 u32 drv_rx_counter) 41 u32 drv_rx_counter)
38{ 42{
39 return (status->rx_pkt_descs[drv_rx_counter] & RX_BUF_SIZE_MASK) >> 43 return (le32_to_cpu(status->rx_pkt_descs[drv_rx_counter]) &
40 RX_BUF_SIZE_SHIFT_DIV; 44 RX_BUF_SIZE_MASK) >> RX_BUF_SIZE_SHIFT_DIV;
41} 45}
42 46
43/* The values of this table must match the wl1271_rates[] array */ 47/* The values of this table must match the wl1271_rates[] array */
@@ -70,6 +74,36 @@ static u8 wl1271_rx_rate_to_idx[] = {
70 0 /* WL1271_RATE_1 */ 74 0 /* WL1271_RATE_1 */
71}; 75};
72 76
77/* The values of this table must match the wl1271_rates[] array */
78static u8 wl1271_5_ghz_rx_rate_to_idx[] = {
79 /* MCS rates are used only with 11n */
80 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS7 */
81 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS6 */
82 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS5 */
83 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS4 */
84 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS3 */
85 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS2 */
86 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS1 */
87 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_MCS0 */
88
89 7, /* WL1271_RATE_54 */
90 6, /* WL1271_RATE_48 */
91 5, /* WL1271_RATE_36 */
92 4, /* WL1271_RATE_24 */
93
94 /* TI-specific rate */
95 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_22 */
96
97 3, /* WL1271_RATE_18 */
98 2, /* WL1271_RATE_12 */
99 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_11 */
100 1, /* WL1271_RATE_9 */
101 0, /* WL1271_RATE_6 */
102 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_5_5 */
103 WL1271_RX_RATE_UNSUPPORTED, /* WL1271_RATE_2 */
104 WL1271_RX_RATE_UNSUPPORTED /* WL1271_RATE_1 */
105};
106
73static void wl1271_rx_status(struct wl1271 *wl, 107static void wl1271_rx_status(struct wl1271 *wl,
74 struct wl1271_rx_descriptor *desc, 108 struct wl1271_rx_descriptor *desc,
75 struct ieee80211_rx_status *status, 109 struct ieee80211_rx_status *status,
@@ -77,12 +111,21 @@ static void wl1271_rx_status(struct wl1271 *wl,
77{ 111{
78 memset(status, 0, sizeof(struct ieee80211_rx_status)); 112 memset(status, 0, sizeof(struct ieee80211_rx_status));
79 113
80 if ((desc->flags & WL1271_RX_DESC_BAND_MASK) == WL1271_RX_DESC_BAND_BG) 114 if ((desc->flags & WL1271_RX_DESC_BAND_MASK) ==
115 WL1271_RX_DESC_BAND_BG) {
81 status->band = IEEE80211_BAND_2GHZ; 116 status->band = IEEE80211_BAND_2GHZ;
82 else 117 status->rate_idx = wl1271_rx_rate_to_idx[desc->rate];
118 } else if ((desc->flags & WL1271_RX_DESC_BAND_MASK) ==
119 WL1271_RX_DESC_BAND_A) {
120 status->band = IEEE80211_BAND_5GHZ;
121 status->rate_idx = wl1271_5_ghz_rx_rate_to_idx[desc->rate];
122 } else
83 wl1271_warning("unsupported band 0x%x", 123 wl1271_warning("unsupported band 0x%x",
84 desc->flags & WL1271_RX_DESC_BAND_MASK); 124 desc->flags & WL1271_RX_DESC_BAND_MASK);
85 125
126 if (unlikely(status->rate_idx == WL1271_RX_RATE_UNSUPPORTED))
127 wl1271_warning("unsupported rate");
128
86 /* 129 /*
87 * FIXME: Add mactime handling. For IBSS (ad-hoc) we need to get the 130 * FIXME: Add mactime handling. For IBSS (ad-hoc) we need to get the
88 * timestamp from the beacon (acx_tsf_info). In BSS mode (infra) we 131 * timestamp from the beacon (acx_tsf_info). In BSS mode (infra) we
@@ -91,12 +134,6 @@ static void wl1271_rx_status(struct wl1271 *wl,
91 */ 134 */
92 status->signal = desc->rssi; 135 status->signal = desc->rssi;
93 136
94 /* FIXME: Should this be optimized? */
95 status->qual = (desc->rssi - WL1271_RX_MIN_RSSI) * 100 /
96 (WL1271_RX_MAX_RSSI - WL1271_RX_MIN_RSSI);
97 status->qual = min(status->qual, 100);
98 status->qual = max(status->qual, 0);
99
100 /* 137 /*
101 * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we 138 * FIXME: In wl1251, the SNR should be divided by two. In wl1271 we
102 * need to divide by two for now, but TI has been discussing about 139 * need to divide by two for now, but TI has been discussing about
@@ -109,17 +146,11 @@ static void wl1271_rx_status(struct wl1271 *wl,
109 if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) { 146 if (desc->flags & WL1271_RX_DESC_ENCRYPT_MASK) {
110 status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED; 147 status->flag |= RX_FLAG_IV_STRIPPED | RX_FLAG_MMIC_STRIPPED;
111 148
112 if (likely(!(desc->flags & WL1271_RX_DESC_DECRYPT_FAIL))) 149 if (likely(!(desc->status & WL1271_RX_DESC_DECRYPT_FAIL)))
113 status->flag |= RX_FLAG_DECRYPTED; 150 status->flag |= RX_FLAG_DECRYPTED;
114 151 if (unlikely(desc->status & WL1271_RX_DESC_MIC_FAIL))
115 if (unlikely(desc->flags & WL1271_RX_DESC_MIC_FAIL))
116 status->flag |= RX_FLAG_MMIC_ERROR; 152 status->flag |= RX_FLAG_MMIC_ERROR;
117 } 153 }
118
119 status->rate_idx = wl1271_rx_rate_to_idx[desc->rate];
120
121 if (status->rate_idx == WL1271_RX_RATE_UNSUPPORTED)
122 wl1271_warning("unsupported rate");
123} 154}
124 155
125static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length) 156static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
@@ -131,14 +162,14 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
131 u8 *buf; 162 u8 *buf;
132 u8 beacon = 0; 163 u8 beacon = 0;
133 164
134 skb = dev_alloc_skb(length); 165 skb = __dev_alloc_skb(length, GFP_KERNEL);
135 if (!skb) { 166 if (!skb) {
136 wl1271_error("Couldn't allocate RX frame"); 167 wl1271_error("Couldn't allocate RX frame");
137 return; 168 return;
138 } 169 }
139 170
140 buf = skb_put(skb, length); 171 buf = skb_put(skb, length);
141 wl1271_spi_reg_read(wl, WL1271_SLV_MEM_DATA, buf, length, true); 172 wl1271_read(wl, WL1271_SLV_MEM_DATA, buf, length, true);
142 173
143 /* the data read starts with the descriptor */ 174 /* the data read starts with the descriptor */
144 desc = (struct wl1271_rx_descriptor *) buf; 175 desc = (struct wl1271_rx_descriptor *) buf;
@@ -156,7 +187,7 @@ static void wl1271_rx_handle_data(struct wl1271 *wl, u32 length)
156 beacon ? "beacon" : ""); 187 beacon ? "beacon" : "");
157 188
158 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); 189 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
159 ieee80211_rx(wl->hw, skb); 190 ieee80211_rx_ni(wl->hw, skb);
160} 191}
161 192
162void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status) 193void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
@@ -176,25 +207,19 @@ void wl1271_rx(struct wl1271 *wl, struct wl1271_fw_status *status)
176 break; 207 break;
177 } 208 }
178 209
179 wl->rx_mem_pool_addr.addr = 210 wl->rx_mem_pool_addr.addr = (mem_block << 8) +
180 (mem_block << 8) + wl_mem_map->packet_memory_pool_start; 211 le32_to_cpu(wl_mem_map->packet_memory_pool_start);
181 wl->rx_mem_pool_addr.addr_extra = 212 wl->rx_mem_pool_addr.addr_extra =
182 wl->rx_mem_pool_addr.addr + 4; 213 wl->rx_mem_pool_addr.addr + 4;
183 214
184 /* Choose the block we want to read */ 215 /* Choose the block we want to read */
185 wl1271_spi_reg_write(wl, WL1271_SLV_REG_DATA, 216 wl1271_write(wl, WL1271_SLV_REG_DATA, &wl->rx_mem_pool_addr,
186 &wl->rx_mem_pool_addr, 217 sizeof(wl->rx_mem_pool_addr), false);
187 sizeof(wl->rx_mem_pool_addr), false);
188 218
189 wl1271_rx_handle_data(wl, buf_size); 219 wl1271_rx_handle_data(wl, buf_size);
190 220
191 wl->rx_counter++; 221 wl->rx_counter++;
192 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK; 222 drv_rx_counter = wl->rx_counter & NUM_RX_PKT_DESC_MOD_MASK;
223 wl1271_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
193 } 224 }
194
195 wl1271_reg_write32(wl, RX_DRIVER_COUNTER_ADDRESS, wl->rx_counter);
196
197 /* This is a workaround for some problems in the chip */
198 wl1271_reg_write32(wl, RX_DRIVER_DUMMY_WRITE_ADDRESS, 0x1);
199
200} 225}
diff --git a/drivers/net/wireless/wl12xx/wl1271_rx.h b/drivers/net/wireless/wl12xx/wl1271_rx.h
index d1ca60e43a25..1ae6d1783ed4 100644
--- a/drivers/net/wireless/wl12xx/wl1271_rx.h
+++ b/drivers/net/wireless/wl12xx/wl1271_rx.h
@@ -102,14 +102,14 @@
102#define RX_BUF_SIZE_SHIFT_DIV 6 102#define RX_BUF_SIZE_SHIFT_DIV 6
103 103
104struct wl1271_rx_descriptor { 104struct wl1271_rx_descriptor {
105 u16 length; 105 __le16 length;
106 u8 status; 106 u8 status;
107 u8 flags; 107 u8 flags;
108 u8 rate; 108 u8 rate;
109 u8 channel; 109 u8 channel;
110 s8 rssi; 110 s8 rssi;
111 u8 snr; 111 u8 snr;
112 u32 timestamp; 112 __le32 timestamp;
113 u8 packet_class; 113 u8 packet_class;
114 u8 process_id; 114 u8 process_id;
115 u8 pad_len; 115 u8 pad_len;
diff --git a/drivers/net/wireless/wl12xx/wl1271_spi.c b/drivers/net/wireless/wl12xx/wl1271_spi.c
index 4a12880c16a8..053c84aceb49 100644
--- a/drivers/net/wireless/wl12xx/wl1271_spi.c
+++ b/drivers/net/wireless/wl12xx/wl1271_spi.c
@@ -25,21 +25,12 @@
25#include <linux/platform_device.h> 25#include <linux/platform_device.h>
26#include <linux/crc7.h> 26#include <linux/crc7.h>
27#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
28#include <linux/slab.h>
28 29
29#include "wl1271.h" 30#include "wl1271.h"
30#include "wl12xx_80211.h" 31#include "wl12xx_80211.h"
31#include "wl1271_spi.h" 32#include "wl1271_spi.h"
32 33
33static int wl1271_translate_reg_addr(struct wl1271 *wl, int addr)
34{
35 return addr - wl->physical_reg_addr + wl->virtual_reg_addr;
36}
37
38static int wl1271_translate_mem_addr(struct wl1271 *wl, int addr)
39{
40 return addr - wl->physical_mem_addr + wl->virtual_mem_addr;
41}
42
43 34
44void wl1271_spi_reset(struct wl1271 *wl) 35void wl1271_spi_reset(struct wl1271 *wl)
45{ 36{
@@ -121,135 +112,78 @@ void wl1271_spi_init(struct wl1271 *wl)
121 wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN); 112 wl1271_dump(DEBUG_SPI, "spi init -> ", cmd, WSPI_INIT_CMD_LEN);
122} 113}
123 114
124/* Set the SPI partitions to access the chip addresses 115#define WL1271_BUSY_WORD_TIMEOUT 1000
125 * 116
126 * There are two VIRTUAL (SPI) partitions (the memory partition and the 117/* FIXME: Check busy words, removed due to SPI bug */
127 * registers partition), which are mapped to two different areas of the 118#if 0
128 * PHYSICAL (hardware) memory. This function also makes other checks to 119static void wl1271_spi_read_busy(struct wl1271 *wl, void *buf, size_t len)
129 * ensure that the partitions are not overlapping. In the diagram below, the
130 * memory partition comes before the register partition, but the opposite is
131 * also supported.
132 *
133 * PHYSICAL address
134 * space
135 *
136 * | |
137 * ...+----+--> mem_start
138 * VIRTUAL address ... | |
139 * space ... | | [PART_0]
140 * ... | |
141 * 0x00000000 <--+----+... ...+----+--> mem_start + mem_size
142 * | | ... | |
143 * |MEM | ... | |
144 * | | ... | |
145 * part_size <--+----+... | | {unused area)
146 * | | ... | |
147 * |REG | ... | |
148 * part_size | | ... | |
149 * + <--+----+... ...+----+--> reg_start
150 * reg_size ... | |
151 * ... | | [PART_1]
152 * ... | |
153 * ...+----+--> reg_start + reg_size
154 * | |
155 *
156 */
157int wl1271_set_partition(struct wl1271 *wl,
158 u32 mem_start, u32 mem_size,
159 u32 reg_start, u32 reg_size)
160{ 120{
161 struct wl1271_partition *partition; 121 struct spi_transfer t[1];
162 struct spi_transfer t;
163 struct spi_message m; 122 struct spi_message m;
164 size_t len, cmd_len; 123 u32 *busy_buf;
165 u32 *cmd; 124 int num_busy_bytes = 0;
166 int addr;
167
168 cmd_len = sizeof(u32) + 2 * sizeof(struct wl1271_partition);
169 cmd = kzalloc(cmd_len, GFP_KERNEL);
170 if (!cmd)
171 return -ENOMEM;
172
173 spi_message_init(&m);
174 memset(&t, 0, sizeof(t));
175 125
176 partition = (struct wl1271_partition *) (cmd + 1); 126 wl1271_info("spi read BUSY!");
177 addr = HW_ACCESS_PART0_SIZE_ADDR;
178 len = 2 * sizeof(struct wl1271_partition);
179 127
180 *cmd |= WSPI_CMD_WRITE; 128 /*
181 *cmd |= (len << WSPI_CMD_BYTE_LENGTH_OFFSET) & WSPI_CMD_BYTE_LENGTH; 129 * Look for the non-busy word in the read buffer, and if found,
182 *cmd |= addr & WSPI_CMD_BYTE_ADDR; 130 * read in the remaining data into the buffer.
183 131 */
184 wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X", 132 busy_buf = (u32 *)buf;
185 mem_start, mem_size); 133 for (; (u32)busy_buf < (u32)buf + len; busy_buf++) {
186 wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X", 134 num_busy_bytes += sizeof(u32);
187 reg_start, reg_size); 135 if (*busy_buf & 0x1) {
188 136 spi_message_init(&m);
189 /* Make sure that the two partitions together don't exceed the 137 memset(t, 0, sizeof(t));
190 * address range */ 138 memmove(buf, busy_buf, len - num_busy_bytes);
191 if ((mem_size + reg_size) > HW_ACCESS_MEMORY_MAX_RANGE) { 139 t[0].rx_buf = buf + (len - num_busy_bytes);
192 wl1271_debug(DEBUG_SPI, "Total size exceeds maximum virtual" 140 t[0].len = num_busy_bytes;
193 " address range. Truncating partition[0]."); 141 spi_message_add_tail(&t[0], &m);
194 mem_size = HW_ACCESS_MEMORY_MAX_RANGE - reg_size; 142 spi_sync(wl->spi, &m);
195 wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X", 143 return;
196 mem_start, mem_size); 144 }
197 wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
198 reg_start, reg_size);
199 }
200
201 if ((mem_start < reg_start) &&
202 ((mem_start + mem_size) > reg_start)) {
203 /* Guarantee that the memory partition doesn't overlap the
204 * registers partition */
205 wl1271_debug(DEBUG_SPI, "End of partition[0] is "
206 "overlapping partition[1]. Adjusted.");
207 mem_size = reg_start - mem_start;
208 wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
209 mem_start, mem_size);
210 wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
211 reg_start, reg_size);
212 } else if ((reg_start < mem_start) &&
213 ((reg_start + reg_size) > mem_start)) {
214 /* Guarantee that the register partition doesn't overlap the
215 * memory partition */
216 wl1271_debug(DEBUG_SPI, "End of partition[1] is"
217 " overlapping partition[0]. Adjusted.");
218 reg_size = mem_start - reg_start;
219 wl1271_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
220 mem_start, mem_size);
221 wl1271_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
222 reg_start, reg_size);
223 } 145 }
224 146
225 partition[0].start = mem_start; 147 /*
226 partition[0].size = mem_size; 148 * Read further busy words from SPI until a non-busy word is
227 partition[1].start = reg_start; 149 * encountered, then read the data itself into the buffer.
228 partition[1].size = reg_size; 150 */
229 151 wl1271_info("spi read BUSY-polling needed!");
230 wl->physical_mem_addr = mem_start;
231 wl->physical_reg_addr = reg_start;
232
233 wl->virtual_mem_addr = 0;
234 wl->virtual_reg_addr = mem_size;
235
236 t.tx_buf = cmd;
237 t.len = cmd_len;
238 spi_message_add_tail(&t, &m);
239
240 spi_sync(wl->spi, &m);
241 152
242 kfree(cmd); 153 num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
154 busy_buf = wl->buffer_busyword;
155 while (num_busy_bytes) {
156 num_busy_bytes--;
157 spi_message_init(&m);
158 memset(t, 0, sizeof(t));
159 t[0].rx_buf = busy_buf;
160 t[0].len = sizeof(u32);
161 spi_message_add_tail(&t[0], &m);
162 spi_sync(wl->spi, &m);
163
164 if (*busy_buf & 0x1) {
165 spi_message_init(&m);
166 memset(t, 0, sizeof(t));
167 t[0].rx_buf = buf;
168 t[0].len = len;
169 spi_message_add_tail(&t[0], &m);
170 spi_sync(wl->spi, &m);
171 return;
172 }
173 }
243 174
244 return 0; 175 /* The SPI bus is unresponsive, the read failed. */
176 memset(buf, 0, len);
177 wl1271_error("SPI read busy-word timeout!\n");
245} 178}
179#endif
246 180
247void wl1271_spi_read(struct wl1271 *wl, int addr, void *buf, 181void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
248 size_t len, bool fixed) 182 size_t len, bool fixed)
249{ 183{
250 struct spi_transfer t[3]; 184 struct spi_transfer t[3];
251 struct spi_message m; 185 struct spi_message m;
252 u8 *busy_buf; 186 u32 *busy_buf;
253 u32 *cmd; 187 u32 *cmd;
254 188
255 cmd = &wl->buffer_cmd; 189 cmd = &wl->buffer_cmd;
@@ -281,14 +215,16 @@ void wl1271_spi_read(struct wl1271 *wl, int addr, void *buf,
281 215
282 spi_sync(wl->spi, &m); 216 spi_sync(wl->spi, &m);
283 217
284 /* FIXME: check busy words */ 218 /* FIXME: Check busy words, removed due to SPI bug */
219 /* if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1))
220 wl1271_spi_read_busy(wl, buf, len); */
285 221
286 wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd)); 222 wl1271_dump(DEBUG_SPI, "spi_read cmd -> ", cmd, sizeof(*cmd));
287 wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, len); 223 wl1271_dump(DEBUG_SPI, "spi_read buf <- ", buf, len);
288} 224}
289 225
290void wl1271_spi_write(struct wl1271 *wl, int addr, void *buf, 226void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
291 size_t len, bool fixed) 227 size_t len, bool fixed)
292{ 228{
293 struct spi_transfer t[2]; 229 struct spi_transfer t[2];
294 struct spi_message m; 230 struct spi_message m;
@@ -320,63 +256,3 @@ void wl1271_spi_write(struct wl1271 *wl, int addr, void *buf,
320 wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd)); 256 wl1271_dump(DEBUG_SPI, "spi_write cmd -> ", cmd, sizeof(*cmd));
321 wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, len); 257 wl1271_dump(DEBUG_SPI, "spi_write buf -> ", buf, len);
322} 258}
323
324void wl1271_spi_mem_read(struct wl1271 *wl, int addr, void *buf,
325 size_t len)
326{
327 int physical;
328
329 physical = wl1271_translate_mem_addr(wl, addr);
330
331 wl1271_spi_read(wl, physical, buf, len, false);
332}
333
334void wl1271_spi_mem_write(struct wl1271 *wl, int addr, void *buf,
335 size_t len)
336{
337 int physical;
338
339 physical = wl1271_translate_mem_addr(wl, addr);
340
341 wl1271_spi_write(wl, physical, buf, len, false);
342}
343
344void wl1271_spi_reg_read(struct wl1271 *wl, int addr, void *buf, size_t len,
345 bool fixed)
346{
347 int physical;
348
349 physical = wl1271_translate_reg_addr(wl, addr);
350
351 wl1271_spi_read(wl, physical, buf, len, fixed);
352}
353
354void wl1271_spi_reg_write(struct wl1271 *wl, int addr, void *buf, size_t len,
355 bool fixed)
356{
357 int physical;
358
359 physical = wl1271_translate_reg_addr(wl, addr);
360
361 wl1271_spi_write(wl, physical, buf, len, fixed);
362}
363
364u32 wl1271_mem_read32(struct wl1271 *wl, int addr)
365{
366 return wl1271_read32(wl, wl1271_translate_mem_addr(wl, addr));
367}
368
369void wl1271_mem_write32(struct wl1271 *wl, int addr, u32 val)
370{
371 wl1271_write32(wl, wl1271_translate_mem_addr(wl, addr), val);
372}
373
374u32 wl1271_reg_read32(struct wl1271 *wl, int addr)
375{
376 return wl1271_read32(wl, wl1271_translate_reg_addr(wl, addr));
377}
378
379void wl1271_reg_write32(struct wl1271 *wl, int addr, u32 val)
380{
381 wl1271_write32(wl, wl1271_translate_reg_addr(wl, addr), val);
382}
diff --git a/drivers/net/wireless/wl12xx/wl1271_spi.h b/drivers/net/wireless/wl12xx/wl1271_spi.h
index 2c9968458646..a803596dad4a 100644
--- a/drivers/net/wireless/wl12xx/wl1271_spi.h
+++ b/drivers/net/wireless/wl12xx/wl1271_spi.h
@@ -29,10 +29,14 @@
29 29
30#define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0 30#define HW_ACCESS_MEMORY_MAX_RANGE 0x1FFC0
31 31
32#define HW_ACCESS_PART0_SIZE_ADDR 0x1FFC0 32#define HW_PARTITION_REGISTERS_ADDR 0x1ffc0
33#define HW_ACCESS_PART0_START_ADDR 0x1FFC4 33#define HW_PART0_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR)
34#define HW_ACCESS_PART1_SIZE_ADDR 0x1FFC8 34#define HW_PART0_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 4)
35#define HW_ACCESS_PART1_START_ADDR 0x1FFCC 35#define HW_PART1_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 8)
36#define HW_PART1_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 12)
37#define HW_PART2_SIZE_ADDR (HW_PARTITION_REGISTERS_ADDR + 16)
38#define HW_PART2_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 20)
39#define HW_PART3_START_ADDR (HW_PARTITION_REGISTERS_ADDR + 24)
36 40
37#define HW_ACCESS_REGISTER_SIZE 4 41#define HW_ACCESS_REGISTER_SIZE 4
38 42
@@ -67,47 +71,26 @@
67 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32)) 71 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
68#define HW_ACCESS_WSPI_INIT_CMD_MASK 0 72#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
69 73
74#define OCP_CMD_LOOP 32
75
76#define OCP_CMD_WRITE 0x1
77#define OCP_CMD_READ 0x2
78
79#define OCP_READY_MASK BIT(18)
80#define OCP_STATUS_MASK (BIT(16) | BIT(17))
81
82#define OCP_STATUS_NO_RESP 0x00000
83#define OCP_STATUS_OK 0x10000
84#define OCP_STATUS_REQ_FAILED 0x20000
85#define OCP_STATUS_RESP_ERROR 0x30000
70 86
71/* Raw target IO, address is not translated */ 87/* Raw target IO, address is not translated */
72void wl1271_spi_write(struct wl1271 *wl, int addr, void *buf, 88void wl1271_spi_raw_write(struct wl1271 *wl, int addr, void *buf,
73 size_t len, bool fixed); 89 size_t len, bool fixed);
74void wl1271_spi_read(struct wl1271 *wl, int addr, void *buf, 90void wl1271_spi_raw_read(struct wl1271 *wl, int addr, void *buf,
75 size_t len, bool fixed); 91 size_t len, bool fixed);
76 92
77/* Memory target IO, address is tranlated to partition 0 */
78void wl1271_spi_mem_read(struct wl1271 *wl, int addr, void *buf, size_t len);
79void wl1271_spi_mem_write(struct wl1271 *wl, int addr, void *buf, size_t len);
80u32 wl1271_mem_read32(struct wl1271 *wl, int addr);
81void wl1271_mem_write32(struct wl1271 *wl, int addr, u32 val);
82
83/* Registers IO */
84void wl1271_spi_reg_read(struct wl1271 *wl, int addr, void *buf, size_t len,
85 bool fixed);
86void wl1271_spi_reg_write(struct wl1271 *wl, int addr, void *buf, size_t len,
87 bool fixed);
88u32 wl1271_reg_read32(struct wl1271 *wl, int addr);
89void wl1271_reg_write32(struct wl1271 *wl, int addr, u32 val);
90
91/* INIT and RESET words */ 93/* INIT and RESET words */
92void wl1271_spi_reset(struct wl1271 *wl); 94void wl1271_spi_reset(struct wl1271 *wl);
93void wl1271_spi_init(struct wl1271 *wl); 95void wl1271_spi_init(struct wl1271 *wl);
94int wl1271_set_partition(struct wl1271 *wl,
95 u32 part_start, u32 part_size,
96 u32 reg_start, u32 reg_size);
97
98static inline u32 wl1271_read32(struct wl1271 *wl, int addr)
99{
100 wl1271_spi_read(wl, addr, &wl->buffer_32,
101 sizeof(wl->buffer_32), false);
102
103 return wl->buffer_32;
104}
105
106static inline void wl1271_write32(struct wl1271 *wl, int addr, u32 val)
107{
108 wl->buffer_32 = val;
109 wl1271_spi_write(wl, addr, &wl->buffer_32,
110 sizeof(wl->buffer_32), false);
111}
112
113#endif /* __WL1271_SPI_H__ */ 96#endif /* __WL1271_SPI_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1271_testmode.c b/drivers/net/wireless/wl12xx/wl1271_testmode.c
new file mode 100644
index 000000000000..5c1c4f565fd8
--- /dev/null
+++ b/drivers/net/wireless/wl12xx/wl1271_testmode.c
@@ -0,0 +1,284 @@
1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 2010 Nokia Corporation
5 *
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23#include "wl1271_testmode.h"
24
25#include <linux/slab.h>
26#include <net/genetlink.h>
27
28#include "wl1271.h"
29#include "wl1271_spi.h"
30#include "wl1271_acx.h"
31
32#define WL1271_TM_MAX_DATA_LENGTH 1024
33
34enum wl1271_tm_commands {
35 WL1271_TM_CMD_UNSPEC,
36 WL1271_TM_CMD_TEST,
37 WL1271_TM_CMD_INTERROGATE,
38 WL1271_TM_CMD_CONFIGURE,
39 WL1271_TM_CMD_NVS_PUSH,
40 WL1271_TM_CMD_SET_PLT_MODE,
41
42 __WL1271_TM_CMD_AFTER_LAST
43};
44#define WL1271_TM_CMD_MAX (__WL1271_TM_CMD_AFTER_LAST - 1)
45
46enum wl1271_tm_attrs {
47 WL1271_TM_ATTR_UNSPEC,
48 WL1271_TM_ATTR_CMD_ID,
49 WL1271_TM_ATTR_ANSWER,
50 WL1271_TM_ATTR_DATA,
51 WL1271_TM_ATTR_IE_ID,
52 WL1271_TM_ATTR_PLT_MODE,
53
54 __WL1271_TM_ATTR_AFTER_LAST
55};
56#define WL1271_TM_ATTR_MAX (__WL1271_TM_ATTR_AFTER_LAST - 1)
57
58static struct nla_policy wl1271_tm_policy[WL1271_TM_ATTR_MAX + 1] = {
59 [WL1271_TM_ATTR_CMD_ID] = { .type = NLA_U32 },
60 [WL1271_TM_ATTR_ANSWER] = { .type = NLA_U8 },
61 [WL1271_TM_ATTR_DATA] = { .type = NLA_BINARY,
62 .len = WL1271_TM_MAX_DATA_LENGTH },
63 [WL1271_TM_ATTR_IE_ID] = { .type = NLA_U32 },
64 [WL1271_TM_ATTR_PLT_MODE] = { .type = NLA_U32 },
65};
66
67
68static int wl1271_tm_cmd_test(struct wl1271 *wl, struct nlattr *tb[])
69{
70 int buf_len, ret, len;
71 struct sk_buff *skb;
72 void *buf;
73 u8 answer = 0;
74
75 wl1271_debug(DEBUG_TESTMODE, "testmode cmd test");
76
77 if (!tb[WL1271_TM_ATTR_DATA])
78 return -EINVAL;
79
80 buf = nla_data(tb[WL1271_TM_ATTR_DATA]);
81 buf_len = nla_len(tb[WL1271_TM_ATTR_DATA]);
82
83 if (tb[WL1271_TM_ATTR_ANSWER])
84 answer = nla_get_u8(tb[WL1271_TM_ATTR_ANSWER]);
85
86 if (buf_len > sizeof(struct wl1271_command))
87 return -EMSGSIZE;
88
89 mutex_lock(&wl->mutex);
90 ret = wl1271_cmd_test(wl, buf, buf_len, answer);
91 mutex_unlock(&wl->mutex);
92
93 if (ret < 0) {
94 wl1271_warning("testmode cmd test failed: %d", ret);
95 return ret;
96 }
97
98 if (answer) {
99 len = nla_total_size(buf_len);
100 skb = cfg80211_testmode_alloc_reply_skb(wl->hw->wiphy, len);
101 if (!skb)
102 return -ENOMEM;
103
104 NLA_PUT(skb, WL1271_TM_ATTR_DATA, buf_len, buf);
105 ret = cfg80211_testmode_reply(skb);
106 if (ret < 0)
107 return ret;
108 }
109
110 return 0;
111
112nla_put_failure:
113 kfree_skb(skb);
114 return -EMSGSIZE;
115}
116
117static int wl1271_tm_cmd_interrogate(struct wl1271 *wl, struct nlattr *tb[])
118{
119 int ret;
120 struct wl1271_command *cmd;
121 struct sk_buff *skb;
122 u8 ie_id;
123
124 wl1271_debug(DEBUG_TESTMODE, "testmode cmd interrogate");
125
126 if (!tb[WL1271_TM_ATTR_IE_ID])
127 return -EINVAL;
128
129 ie_id = nla_get_u8(tb[WL1271_TM_ATTR_IE_ID]);
130
131 cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
132 if (!cmd)
133 return -ENOMEM;
134
135 mutex_lock(&wl->mutex);
136 ret = wl1271_cmd_interrogate(wl, ie_id, cmd, sizeof(*cmd));
137 mutex_unlock(&wl->mutex);
138
139 if (ret < 0) {
140 wl1271_warning("testmode cmd interrogate failed: %d", ret);
141 return ret;
142 }
143
144 skb = cfg80211_testmode_alloc_reply_skb(wl->hw->wiphy, sizeof(*cmd));
145 if (!skb)
146 return -ENOMEM;
147
148 NLA_PUT(skb, WL1271_TM_ATTR_DATA, sizeof(*cmd), cmd);
149
150 return 0;
151
152nla_put_failure:
153 kfree_skb(skb);
154 return -EMSGSIZE;
155}
156
157static int wl1271_tm_cmd_configure(struct wl1271 *wl, struct nlattr *tb[])
158{
159 int buf_len, ret;
160 void *buf;
161 u8 ie_id;
162
163 wl1271_debug(DEBUG_TESTMODE, "testmode cmd configure");
164
165 if (!tb[WL1271_TM_ATTR_DATA])
166 return -EINVAL;
167 if (!tb[WL1271_TM_ATTR_IE_ID])
168 return -EINVAL;
169
170 ie_id = nla_get_u8(tb[WL1271_TM_ATTR_IE_ID]);
171 buf = nla_data(tb[WL1271_TM_ATTR_DATA]);
172 buf_len = nla_len(tb[WL1271_TM_ATTR_DATA]);
173
174 if (buf_len > sizeof(struct wl1271_command))
175 return -EMSGSIZE;
176
177 mutex_lock(&wl->mutex);
178 ret = wl1271_cmd_configure(wl, ie_id, buf, buf_len);
179 mutex_unlock(&wl->mutex);
180
181 if (ret < 0) {
182 wl1271_warning("testmode cmd configure failed: %d", ret);
183 return ret;
184 }
185
186 return 0;
187}
188
189static int wl1271_tm_cmd_nvs_push(struct wl1271 *wl, struct nlattr *tb[])
190{
191 int ret = 0;
192 size_t len;
193 void *buf;
194
195 wl1271_debug(DEBUG_TESTMODE, "testmode cmd nvs push");
196
197 if (!tb[WL1271_TM_ATTR_DATA])
198 return -EINVAL;
199
200 buf = nla_data(tb[WL1271_TM_ATTR_DATA]);
201 len = nla_len(tb[WL1271_TM_ATTR_DATA]);
202
203 if (len != sizeof(struct wl1271_nvs_file)) {
204 wl1271_error("nvs size is not as expected: %zu != %zu",
205 len, sizeof(struct wl1271_nvs_file));
206 return -EMSGSIZE;
207 }
208
209 mutex_lock(&wl->mutex);
210
211 kfree(wl->nvs);
212
213 wl->nvs = kmalloc(sizeof(struct wl1271_nvs_file), GFP_KERNEL);
214 if (!wl->nvs) {
215 wl1271_error("could not allocate memory for the nvs file");
216 ret = -ENOMEM;
217 goto out;
218 }
219
220 memcpy(wl->nvs, buf, len);
221
222 wl1271_debug(DEBUG_TESTMODE, "testmode pushed nvs");
223
224out:
225 mutex_unlock(&wl->mutex);
226
227 return ret;
228}
229
230static int wl1271_tm_cmd_set_plt_mode(struct wl1271 *wl, struct nlattr *tb[])
231{
232 u32 val;
233 int ret;
234
235 wl1271_debug(DEBUG_TESTMODE, "testmode cmd set plt mode");
236
237 if (!tb[WL1271_TM_ATTR_PLT_MODE])
238 return -EINVAL;
239
240 val = nla_get_u32(tb[WL1271_TM_ATTR_PLT_MODE]);
241
242 switch (val) {
243 case 0:
244 ret = wl1271_plt_stop(wl);
245 break;
246 case 1:
247 ret = wl1271_plt_start(wl);
248 break;
249 default:
250 ret = -EINVAL;
251 break;
252 }
253
254 return ret;
255}
256
257int wl1271_tm_cmd(struct ieee80211_hw *hw, void *data, int len)
258{
259 struct wl1271 *wl = hw->priv;
260 struct nlattr *tb[WL1271_TM_ATTR_MAX + 1];
261 int err;
262
263 err = nla_parse(tb, WL1271_TM_ATTR_MAX, data, len, wl1271_tm_policy);
264 if (err)
265 return err;
266
267 if (!tb[WL1271_TM_ATTR_CMD_ID])
268 return -EINVAL;
269
270 switch (nla_get_u32(tb[WL1271_TM_ATTR_CMD_ID])) {
271 case WL1271_TM_CMD_TEST:
272 return wl1271_tm_cmd_test(wl, tb);
273 case WL1271_TM_CMD_INTERROGATE:
274 return wl1271_tm_cmd_interrogate(wl, tb);
275 case WL1271_TM_CMD_CONFIGURE:
276 return wl1271_tm_cmd_configure(wl, tb);
277 case WL1271_TM_CMD_NVS_PUSH:
278 return wl1271_tm_cmd_nvs_push(wl, tb);
279 case WL1271_TM_CMD_SET_PLT_MODE:
280 return wl1271_tm_cmd_set_plt_mode(wl, tb);
281 default:
282 return -EOPNOTSUPP;
283 }
284}
diff --git a/drivers/net/wireless/wl12xx/wl1251_netlink.h b/drivers/net/wireless/wl12xx/wl1271_testmode.h
index ee36695e134e..c196d28f9d9d 100644
--- a/drivers/net/wireless/wl12xx/wl1251_netlink.h
+++ b/drivers/net/wireless/wl12xx/wl1271_testmode.h
@@ -1,9 +1,9 @@
1/* 1/*
2 * This file is part of wl1251 2 * This file is part of wl1271
3 * 3 *
4 * Copyright (C) 2009 Nokia Corporation 4 * Copyright (C) 2010 Nokia Corporation
5 * 5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com> 6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 * 7 *
8 * This program is free software; you can redistribute it and/or 8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License 9 * modify it under the terms of the GNU General Public License
@@ -21,10 +21,11 @@
21 * 21 *
22 */ 22 */
23 23
24#ifndef __WL1251_NETLINK_H__ 24#ifndef __WL1271_TESTMODE_H__
25#define __WL1251_NETLINK_H__ 25#define __WL1271_TESTMODE_H__
26 26
27int wl1251_nl_register(void); 27#include <net/mac80211.h>
28void wl1251_nl_unregister(void);
29 28
30#endif /* __WL1251_NETLINK_H__ */ 29int wl1271_tm_cmd(struct ieee80211_hw *hw, void *data, int len);
30
31#endif /* __WL1271_TESTMODE_H__ */
diff --git a/drivers/net/wireless/wl12xx/wl1271_tx.c b/drivers/net/wireless/wl12xx/wl1271_tx.c
index ff221258b941..811e739d05bf 100644
--- a/drivers/net/wireless/wl12xx/wl1271_tx.c
+++ b/drivers/net/wireless/wl12xx/wl1271_tx.c
@@ -26,6 +26,7 @@
26 26
27#include "wl1271.h" 27#include "wl1271.h"
28#include "wl1271_spi.h" 28#include "wl1271_spi.h"
29#include "wl1271_io.h"
29#include "wl1271_reg.h" 30#include "wl1271_reg.h"
30#include "wl1271_ps.h" 31#include "wl1271_ps.h"
31#include "wl1271_tx.h" 32#include "wl1271_tx.h"
@@ -33,8 +34,7 @@
33static int wl1271_tx_id(struct wl1271 *wl, struct sk_buff *skb) 34static int wl1271_tx_id(struct wl1271 *wl, struct sk_buff *skb)
34{ 35{
35 int i; 36 int i;
36 37 for (i = 0; i < ACX_TX_DESCRIPTORS; i++)
37 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++)
38 if (wl->tx_frames[i] == NULL) { 38 if (wl->tx_frames[i] == NULL) {
39 wl->tx_frames[i] = skb; 39 wl->tx_frames[i] = skb;
40 return i; 40 return i;
@@ -58,8 +58,8 @@ static int wl1271_tx_allocate(struct wl1271 *wl, struct sk_buff *skb, u32 extra)
58 /* approximate the number of blocks required for this packet 58 /* approximate the number of blocks required for this packet
59 in the firmware */ 59 in the firmware */
60 /* FIXME: try to figure out what is done here and make it cleaner */ 60 /* FIXME: try to figure out what is done here and make it cleaner */
61 total_blocks = (skb->len) >> TX_HW_BLOCK_SHIFT_DIV; 61 total_blocks = (total_len + 20) >> TX_HW_BLOCK_SHIFT_DIV;
62 excluded = (total_blocks << 2) + (skb->len & 0xff) + 34; 62 excluded = (total_blocks << 2) + ((total_len + 20) & 0xff) + 34;
63 total_blocks += (excluded > 252) ? 2 : 1; 63 total_blocks += (excluded > 252) ? 2 : 1;
64 total_blocks += TX_HW_BLOCK_SPARE; 64 total_blocks += TX_HW_BLOCK_SPARE;
65 65
@@ -88,29 +88,48 @@ static int wl1271_tx_fill_hdr(struct wl1271 *wl, struct sk_buff *skb,
88 u32 extra, struct ieee80211_tx_info *control) 88 u32 extra, struct ieee80211_tx_info *control)
89{ 89{
90 struct wl1271_tx_hw_descr *desc; 90 struct wl1271_tx_hw_descr *desc;
91 int pad; 91 int pad, ac;
92 u16 tx_attr;
92 93
93 desc = (struct wl1271_tx_hw_descr *) skb->data; 94 desc = (struct wl1271_tx_hw_descr *) skb->data;
94 95
96 /* relocate space for security header */
97 if (extra) {
98 void *framestart = skb->data + sizeof(*desc);
99 u16 fc = *(u16 *)(framestart + extra);
100 int hdrlen = ieee80211_hdrlen(cpu_to_le16(fc));
101 memmove(framestart, framestart + extra, hdrlen);
102 }
103
95 /* configure packet life time */ 104 /* configure packet life time */
96 desc->start_time = jiffies_to_usecs(jiffies) - wl->time_offset; 105 desc->start_time = cpu_to_le32(jiffies_to_usecs(jiffies) -
97 desc->life_time = TX_HW_MGMT_PKT_LIFETIME_TU; 106 wl->time_offset);
107 desc->life_time = cpu_to_le16(TX_HW_MGMT_PKT_LIFETIME_TU);
98 108
99 /* configure the tx attributes */ 109 /* configure the tx attributes */
100 desc->tx_attr = wl->session_counter << TX_HW_ATTR_OFST_SESSION_COUNTER; 110 tx_attr = wl->session_counter << TX_HW_ATTR_OFST_SESSION_COUNTER;
101 /* FIXME: do we know the packet priority? can we identify mgmt 111
102 packets, and use max prio for them at least? */ 112 /* queue */
103 desc->tid = 0; 113 ac = wl1271_tx_get_queue(skb_get_queue_mapping(skb));
114 desc->tid = wl1271_tx_ac_to_tid(ac);
115
104 desc->aid = TX_HW_DEFAULT_AID; 116 desc->aid = TX_HW_DEFAULT_AID;
105 desc->reserved = 0; 117 desc->reserved = 0;
106 118
107 /* align the length (and store in terms of words) */ 119 /* align the length (and store in terms of words) */
108 pad = WL1271_TX_ALIGN(skb->len); 120 pad = WL1271_TX_ALIGN(skb->len);
109 desc->length = pad >> 2; 121 desc->length = cpu_to_le16(pad >> 2);
110 122
111 /* calculate number of padding bytes */ 123 /* calculate number of padding bytes */
112 pad = pad - skb->len; 124 pad = pad - skb->len;
113 desc->tx_attr |= pad << TX_HW_ATTR_OFST_LAST_WORD_PAD; 125 tx_attr |= pad << TX_HW_ATTR_OFST_LAST_WORD_PAD;
126
127 /* if the packets are destined for AP (have a STA entry) send them
128 with AP rate policies, otherwise use default basic rates */
129 if (control->control.sta)
130 tx_attr |= ACX_TX_AP_FULL_RATE << TX_HW_ATTR_OFST_RATE_POLICY;
131
132 desc->tx_attr = cpu_to_le16(tx_attr);
114 133
115 wl1271_debug(DEBUG_TX, "tx_fill_hdr: pad: %d", pad); 134 wl1271_debug(DEBUG_TX, "tx_fill_hdr: pad: %d", pad);
116 return 0; 135 return 0;
@@ -147,11 +166,11 @@ static int wl1271_tx_send_packet(struct wl1271 *wl, struct sk_buff *skb,
147 len = WL1271_TX_ALIGN(skb->len); 166 len = WL1271_TX_ALIGN(skb->len);
148 167
149 /* perform a fixed address block write with the packet */ 168 /* perform a fixed address block write with the packet */
150 wl1271_spi_reg_write(wl, WL1271_SLV_MEM_DATA, skb->data, len, true); 169 wl1271_write(wl, WL1271_SLV_MEM_DATA, skb->data, len, true);
151 170
152 /* write packet new counter into the write access register */ 171 /* write packet new counter into the write access register */
153 wl->tx_packets_count++; 172 wl->tx_packets_count++;
154 wl1271_reg_write32(wl, WL1271_HOST_WR_ACCESS, wl->tx_packets_count); 173 wl1271_write32(wl, WL1271_HOST_WR_ACCESS, wl->tx_packets_count);
155 174
156 desc = (struct wl1271_tx_hw_descr *) skb->data; 175 desc = (struct wl1271_tx_hw_descr *) skb->data;
157 wl1271_debug(DEBUG_TX, "tx id %u skb 0x%p payload %u (%u words)", 176 wl1271_debug(DEBUG_TX, "tx id %u skb 0x%p payload %u (%u words)",
@@ -185,6 +204,7 @@ static int wl1271_tx_frame(struct wl1271 *wl, struct sk_buff *skb)
185 ret = wl1271_cmd_set_default_wep_key(wl, idx); 204 ret = wl1271_cmd_set_default_wep_key(wl, idx);
186 if (ret < 0) 205 if (ret < 0)
187 return ret; 206 return ret;
207 wl->default_key = idx;
188 } 208 }
189 } 209 }
190 210
@@ -203,18 +223,50 @@ static int wl1271_tx_frame(struct wl1271 *wl, struct sk_buff *skb)
203 return ret; 223 return ret;
204} 224}
205 225
226static u32 wl1271_tx_enabled_rates_get(struct wl1271 *wl, u32 rate_set)
227{
228 struct ieee80211_supported_band *band;
229 u32 enabled_rates = 0;
230 int bit;
231
232 band = wl->hw->wiphy->bands[wl->band];
233 for (bit = 0; bit < band->n_bitrates; bit++) {
234 if (rate_set & 0x1)
235 enabled_rates |= band->bitrates[bit].hw_value;
236 rate_set >>= 1;
237 }
238
239 return enabled_rates;
240}
241
206void wl1271_tx_work(struct work_struct *work) 242void wl1271_tx_work(struct work_struct *work)
207{ 243{
208 struct wl1271 *wl = container_of(work, struct wl1271, tx_work); 244 struct wl1271 *wl = container_of(work, struct wl1271, tx_work);
209 struct sk_buff *skb; 245 struct sk_buff *skb;
210 bool woken_up = false; 246 bool woken_up = false;
247 u32 sta_rates = 0;
211 int ret; 248 int ret;
212 249
250 /* check if the rates supported by the AP have changed */
251 if (unlikely(test_and_clear_bit(WL1271_FLAG_STA_RATES_CHANGED,
252 &wl->flags))) {
253 unsigned long flags;
254 spin_lock_irqsave(&wl->wl_lock, flags);
255 sta_rates = wl->sta_rate_set;
256 spin_unlock_irqrestore(&wl->wl_lock, flags);
257 }
258
213 mutex_lock(&wl->mutex); 259 mutex_lock(&wl->mutex);
214 260
215 if (unlikely(wl->state == WL1271_STATE_OFF)) 261 if (unlikely(wl->state == WL1271_STATE_OFF))
216 goto out; 262 goto out;
217 263
264 /* if rates have changed, re-configure the rate policy */
265 if (unlikely(sta_rates)) {
266 wl->rate_set = wl1271_tx_enabled_rates_get(wl, sta_rates);
267 wl1271_acx_rate_policies(wl);
268 }
269
218 while ((skb = skb_dequeue(&wl->tx_queue))) { 270 while ((skb = skb_dequeue(&wl->tx_queue))) {
219 if (!woken_up) { 271 if (!woken_up) {
220 ret = wl1271_ps_elp_wakeup(wl, false); 272 ret = wl1271_ps_elp_wakeup(wl, false);
@@ -229,18 +281,18 @@ void wl1271_tx_work(struct work_struct *work)
229 wl1271_debug(DEBUG_TX, "tx_work: fw buffer full, " 281 wl1271_debug(DEBUG_TX, "tx_work: fw buffer full, "
230 "stop queues"); 282 "stop queues");
231 ieee80211_stop_queues(wl->hw); 283 ieee80211_stop_queues(wl->hw);
232 wl->tx_queue_stopped = true; 284 set_bit(WL1271_FLAG_TX_QUEUE_STOPPED, &wl->flags);
233 skb_queue_head(&wl->tx_queue, skb); 285 skb_queue_head(&wl->tx_queue, skb);
234 goto out; 286 goto out;
235 } else if (ret < 0) { 287 } else if (ret < 0) {
236 dev_kfree_skb(skb); 288 dev_kfree_skb(skb);
237 goto out; 289 goto out;
238 } else if (wl->tx_queue_stopped) { 290 } else if (test_and_clear_bit(WL1271_FLAG_TX_QUEUE_STOPPED,
291 &wl->flags)) {
239 /* firmware buffer has space, restart queues */ 292 /* firmware buffer has space, restart queues */
240 wl1271_debug(DEBUG_TX, 293 wl1271_debug(DEBUG_TX,
241 "complete_packet: waking queues"); 294 "complete_packet: waking queues");
242 ieee80211_wake_queues(wl->hw); 295 ieee80211_wake_queues(wl->hw);
243 wl->tx_queue_stopped = false;
244 } 296 }
245 } 297 }
246 298
@@ -254,14 +306,13 @@ out:
254static void wl1271_tx_complete_packet(struct wl1271 *wl, 306static void wl1271_tx_complete_packet(struct wl1271 *wl,
255 struct wl1271_tx_hw_res_descr *result) 307 struct wl1271_tx_hw_res_descr *result)
256{ 308{
257
258 struct ieee80211_tx_info *info; 309 struct ieee80211_tx_info *info;
259 struct sk_buff *skb; 310 struct sk_buff *skb;
260 u32 header_len; 311 u16 seq;
261 int id = result->id; 312 int id = result->id;
262 313
263 /* check for id legality */ 314 /* check for id legality */
264 if (id >= TX_HW_RESULT_QUEUE_LEN || wl->tx_frames[id] == NULL) { 315 if (id >= ACX_TX_DESCRIPTORS || wl->tx_frames[id] == NULL) {
265 wl1271_warning("TX result illegal id: %d", id); 316 wl1271_warning("TX result illegal id: %d", id);
266 return; 317 return;
267 } 318 }
@@ -284,22 +335,32 @@ static void wl1271_tx_complete_packet(struct wl1271 *wl,
284 /* info->status.retry_count = result->ack_failures; */ 335 /* info->status.retry_count = result->ack_failures; */
285 wl->stats.retry_count += result->ack_failures; 336 wl->stats.retry_count += result->ack_failures;
286 337
287 /* get header len */ 338 /* update security sequence number */
339 seq = wl->tx_security_seq_16 +
340 (result->lsb_security_sequence_number -
341 wl->tx_security_last_seq);
342 wl->tx_security_last_seq = result->lsb_security_sequence_number;
343
344 if (seq < wl->tx_security_seq_16)
345 wl->tx_security_seq_32++;
346 wl->tx_security_seq_16 = seq;
347
348 /* remove private header from packet */
349 skb_pull(skb, sizeof(struct wl1271_tx_hw_descr));
350
351 /* remove TKIP header space if present */
288 if (info->control.hw_key && 352 if (info->control.hw_key &&
289 info->control.hw_key->alg == ALG_TKIP) 353 info->control.hw_key->alg == ALG_TKIP) {
290 header_len = WL1271_TKIP_IV_SPACE + 354 int hdrlen = ieee80211_get_hdrlen_from_skb(skb);
291 sizeof(struct wl1271_tx_hw_descr); 355 memmove(skb->data + WL1271_TKIP_IV_SPACE, skb->data, hdrlen);
292 else 356 skb_pull(skb, WL1271_TKIP_IV_SPACE);
293 header_len = sizeof(struct wl1271_tx_hw_descr); 357 }
294 358
295 wl1271_debug(DEBUG_TX, "tx status id %u skb 0x%p failures %u rate 0x%x" 359 wl1271_debug(DEBUG_TX, "tx status id %u skb 0x%p failures %u rate 0x%x"
296 " status 0x%x", 360 " status 0x%x",
297 result->id, skb, result->ack_failures, 361 result->id, skb, result->ack_failures,
298 result->rate_class_index, result->status); 362 result->rate_class_index, result->status);
299 363
300 /* remove private header from packet */
301 skb_pull(skb, header_len);
302
303 /* return the packet to the stack */ 364 /* return the packet to the stack */
304 ieee80211_tx_status(wl->hw, skb); 365 ieee80211_tx_status(wl->hw, skb);
305 wl->tx_frames[result->id] = NULL; 366 wl->tx_frames[result->id] = NULL;
@@ -315,8 +376,8 @@ void wl1271_tx_complete(struct wl1271 *wl, u32 count)
315 wl1271_debug(DEBUG_TX, "tx_complete received, packets: %d", count); 376 wl1271_debug(DEBUG_TX, "tx_complete received, packets: %d", count);
316 377
317 /* read the tx results from the chipset */ 378 /* read the tx results from the chipset */
318 wl1271_spi_mem_read(wl, memmap->tx_result, 379 wl1271_read(wl, le32_to_cpu(memmap->tx_result),
319 wl->tx_res_if, sizeof(*wl->tx_res_if)); 380 wl->tx_res_if, sizeof(*wl->tx_res_if), false);
320 381
321 /* verify that the result buffer is not getting overrun */ 382 /* verify that the result buffer is not getting overrun */
322 if (count > TX_HW_RESULT_QUEUE_LEN) { 383 if (count > TX_HW_RESULT_QUEUE_LEN) {
@@ -337,10 +398,10 @@ void wl1271_tx_complete(struct wl1271 *wl, u32 count)
337 } 398 }
338 399
339 /* write host counter to chipset (to ack) */ 400 /* write host counter to chipset (to ack) */
340 wl1271_mem_write32(wl, memmap->tx_result + 401 wl1271_write32(wl, le32_to_cpu(memmap->tx_result) +
341 offsetof(struct wl1271_tx_hw_res_if, 402 offsetof(struct wl1271_tx_hw_res_if,
342 tx_result_host_counter), 403 tx_result_host_counter),
343 wl->tx_res_if->tx_result_fw_counter); 404 le32_to_cpu(wl->tx_res_if->tx_result_fw_counter));
344} 405}
345 406
346/* caller must hold wl->mutex */ 407/* caller must hold wl->mutex */
@@ -364,7 +425,7 @@ void wl1271_tx_flush(struct wl1271 *wl)
364 ieee80211_tx_status(wl->hw, skb); 425 ieee80211_tx_status(wl->hw, skb);
365 } 426 }
366 427
367 for (i = 0; i < FW_TX_CMPLT_BLOCK_SIZE; i++) 428 for (i = 0; i < ACX_TX_DESCRIPTORS; i++)
368 if (wl->tx_frames[i] != NULL) { 429 if (wl->tx_frames[i] != NULL) {
369 skb = wl->tx_frames[i]; 430 skb = wl->tx_frames[i];
370 info = IEEE80211_SKB_CB(skb); 431 info = IEEE80211_SKB_CB(skb);
diff --git a/drivers/net/wireless/wl12xx/wl1271_tx.h b/drivers/net/wireless/wl12xx/wl1271_tx.h
index 4a614067ddba..17e405a09caa 100644
--- a/drivers/net/wireless/wl12xx/wl1271_tx.h
+++ b/drivers/net/wireless/wl12xx/wl1271_tx.h
@@ -58,7 +58,7 @@
58 58
59struct wl1271_tx_hw_descr { 59struct wl1271_tx_hw_descr {
60 /* Length of packet in words, including descriptor+header+data */ 60 /* Length of packet in words, including descriptor+header+data */
61 u16 length; 61 __le16 length;
62 /* Number of extra memory blocks to allocate for this packet in 62 /* Number of extra memory blocks to allocate for this packet in
63 addition to the number of blocks derived from the packet length */ 63 addition to the number of blocks derived from the packet length */
64 u8 extra_mem_blocks; 64 u8 extra_mem_blocks;
@@ -67,12 +67,12 @@ struct wl1271_tx_hw_descr {
67 HW!! */ 67 HW!! */
68 u8 total_mem_blocks; 68 u8 total_mem_blocks;
69 /* Device time (in us) when the packet arrived to the driver */ 69 /* Device time (in us) when the packet arrived to the driver */
70 u32 start_time; 70 __le32 start_time;
71 /* Max delay in TUs until transmission. The last device time the 71 /* Max delay in TUs until transmission. The last device time the
72 packet can be transmitted is: startTime+(1024*LifeTime) */ 72 packet can be transmitted is: startTime+(1024*LifeTime) */
73 u16 life_time; 73 __le16 life_time;
74 /* Bitwise fields - see TX_ATTR... definitions above. */ 74 /* Bitwise fields - see TX_ATTR... definitions above. */
75 u16 tx_attr; 75 __le16 tx_attr;
76 /* Packet identifier used also in the Tx-Result. */ 76 /* Packet identifier used also in the Tx-Result. */
77 u8 id; 77 u8 id;
78 /* The packet TID value (as User-Priority) */ 78 /* The packet TID value (as User-Priority) */
@@ -100,12 +100,12 @@ struct wl1271_tx_hw_res_descr {
100 several possible reasons for failure. */ 100 several possible reasons for failure. */
101 u8 status; 101 u8 status;
102 /* Total air access duration including all retrys and overheads.*/ 102 /* Total air access duration including all retrys and overheads.*/
103 u16 medium_usage; 103 __le16 medium_usage;
104 /* The time passed from host xfer to Tx-complete.*/ 104 /* The time passed from host xfer to Tx-complete.*/
105 u32 fw_handling_time; 105 __le32 fw_handling_time;
106 /* Total media delay 106 /* Total media delay
107 (from 1st EDCA AIFS counter until TX Complete). */ 107 (from 1st EDCA AIFS counter until TX Complete). */
108 u32 medium_delay; 108 __le32 medium_delay;
109 /* LS-byte of last TKIP seq-num (saved per AC for recovery). */ 109 /* LS-byte of last TKIP seq-num (saved per AC for recovery). */
110 u8 lsb_security_sequence_number; 110 u8 lsb_security_sequence_number;
111 /* Retry count - number of transmissions without successful ACK.*/ 111 /* Retry count - number of transmissions without successful ACK.*/
@@ -118,11 +118,47 @@ struct wl1271_tx_hw_res_descr {
118} __attribute__ ((packed)); 118} __attribute__ ((packed));
119 119
120struct wl1271_tx_hw_res_if { 120struct wl1271_tx_hw_res_if {
121 u32 tx_result_fw_counter; 121 __le32 tx_result_fw_counter;
122 u32 tx_result_host_counter; 122 __le32 tx_result_host_counter;
123 struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN]; 123 struct wl1271_tx_hw_res_descr tx_results_queue[TX_HW_RESULT_QUEUE_LEN];
124} __attribute__ ((packed)); 124} __attribute__ ((packed));
125 125
126static inline int wl1271_tx_get_queue(int queue)
127{
128 /* FIXME: use best effort until WMM is enabled */
129 return CONF_TX_AC_BE;
130
131 switch (queue) {
132 case 0:
133 return CONF_TX_AC_VO;
134 case 1:
135 return CONF_TX_AC_VI;
136 case 2:
137 return CONF_TX_AC_BE;
138 case 3:
139 return CONF_TX_AC_BK;
140 default:
141 return CONF_TX_AC_BE;
142 }
143}
144
145/* wl1271 tx descriptor needs the tid and we need to convert it from ac */
146static inline int wl1271_tx_ac_to_tid(int ac)
147{
148 switch (ac) {
149 case 0:
150 return 0;
151 case 1:
152 return 2;
153 case 2:
154 return 4;
155 case 3:
156 return 6;
157 default:
158 return 0;
159 }
160}
161
126void wl1271_tx_work(struct work_struct *work); 162void wl1271_tx_work(struct work_struct *work);
127void wl1271_tx_complete(struct wl1271 *wl, u32 count); 163void wl1271_tx_complete(struct wl1271 *wl, u32 count);
128void wl1271_tx_flush(struct wl1271 *wl); 164void wl1271_tx_flush(struct wl1271 *wl);
diff --git a/drivers/net/wireless/wl12xx/wl12xx_80211.h b/drivers/net/wireless/wl12xx/wl12xx_80211.h
index 657c2dbcb7d3..055d7bc6f592 100644
--- a/drivers/net/wireless/wl12xx/wl12xx_80211.h
+++ b/drivers/net/wireless/wl12xx/wl12xx_80211.h
@@ -122,8 +122,8 @@ struct wl12xx_null_data_template {
122} __attribute__ ((packed)); 122} __attribute__ ((packed));
123 123
124struct wl12xx_ps_poll_template { 124struct wl12xx_ps_poll_template {
125 u16 fc; 125 __le16 fc;
126 u16 aid; 126 __le16 aid;
127 u8 bssid[ETH_ALEN]; 127 u8 bssid[ETH_ALEN];
128 u8 ta[ETH_ALEN]; 128 u8 ta[ETH_ALEN];
129} __attribute__ ((packed)); 129} __attribute__ ((packed));
diff --git a/drivers/net/wireless/wl3501_cs.c b/drivers/net/wireless/wl3501_cs.c
index 4f1e0cfe609b..7b9621de239f 100644
--- a/drivers/net/wireless/wl3501_cs.c
+++ b/drivers/net/wireless/wl3501_cs.c
@@ -67,23 +67,7 @@
67/* For rough constant delay */ 67/* For rough constant delay */
68#define WL3501_NOPLOOP(n) { int x = 0; while (x++ < n) slow_down_io(); } 68#define WL3501_NOPLOOP(n) { int x = 0; while (x++ < n) slow_down_io(); }
69 69
70/* 70
71 * All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If you do not
72 * define PCMCIA_DEBUG at all, all the debug code will be left out. If you
73 * compile with PCMCIA_DEBUG=0, the debug code will be present but disabled --
74 * but it can then be enabled for specific modules at load time with a
75 * 'pc_debug=#' option to insmod.
76 */
77#define PCMCIA_DEBUG 0
78#ifdef PCMCIA_DEBUG
79static int pc_debug = PCMCIA_DEBUG;
80module_param(pc_debug, int, 0);
81#define dprintk(n, format, args...) \
82 { if (pc_debug > (n)) \
83 printk(KERN_INFO "%s: " format "\n", __func__ , ##args); }
84#else
85#define dprintk(n, format, args...)
86#endif
87 71
88#define wl3501_outb(a, b) { outb(a, b); slow_down_io(); } 72#define wl3501_outb(a, b) { outb(a, b); slow_down_io(); }
89#define wl3501_outb_p(a, b) { outb_p(a, b); slow_down_io(); } 73#define wl3501_outb_p(a, b) { outb_p(a, b); slow_down_io(); }
@@ -381,7 +365,7 @@ static void wl3501_free_tx_buffer(struct wl3501_card *this, u16 ptr)
381 365
382static int wl3501_esbq_req_test(struct wl3501_card *this) 366static int wl3501_esbq_req_test(struct wl3501_card *this)
383{ 367{
384 u8 tmp; 368 u8 tmp = 0;
385 369
386 wl3501_get_from_wla(this, this->esbq_req_head + 3, &tmp, sizeof(tmp)); 370 wl3501_get_from_wla(this, this->esbq_req_head + 3, &tmp, sizeof(tmp));
387 return tmp & 0x80; 371 return tmp & 0x80;
@@ -684,10 +668,10 @@ static void wl3501_mgmt_scan_confirm(struct wl3501_card *this, u16 addr)
684 int matchflag = 0; 668 int matchflag = 0;
685 struct wl3501_scan_confirm sig; 669 struct wl3501_scan_confirm sig;
686 670
687 dprintk(3, "entry"); 671 pr_debug("entry");
688 wl3501_get_from_wla(this, addr, &sig, sizeof(sig)); 672 wl3501_get_from_wla(this, addr, &sig, sizeof(sig));
689 if (sig.status == WL3501_STATUS_SUCCESS) { 673 if (sig.status == WL3501_STATUS_SUCCESS) {
690 dprintk(3, "success"); 674 pr_debug("success");
691 if ((this->net_type == IW_MODE_INFRA && 675 if ((this->net_type == IW_MODE_INFRA &&
692 (sig.cap_info & WL3501_MGMT_CAPABILITY_ESS)) || 676 (sig.cap_info & WL3501_MGMT_CAPABILITY_ESS)) ||
693 (this->net_type == IW_MODE_ADHOC && 677 (this->net_type == IW_MODE_ADHOC &&
@@ -722,7 +706,7 @@ static void wl3501_mgmt_scan_confirm(struct wl3501_card *this, u16 addr)
722 } 706 }
723 } 707 }
724 } else if (sig.status == WL3501_STATUS_TIMEOUT) { 708 } else if (sig.status == WL3501_STATUS_TIMEOUT) {
725 dprintk(3, "timeout"); 709 pr_debug("timeout");
726 this->join_sta_bss = 0; 710 this->join_sta_bss = 0;
727 for (i = this->join_sta_bss; i < this->bss_cnt; i++) 711 for (i = this->join_sta_bss; i < this->bss_cnt; i++)
728 if (!wl3501_mgmt_join(this, i)) 712 if (!wl3501_mgmt_join(this, i))
@@ -879,7 +863,7 @@ static int wl3501_mgmt_auth(struct wl3501_card *this)
879 .timeout = 1000, 863 .timeout = 1000,
880 }; 864 };
881 865
882 dprintk(3, "entry"); 866 pr_debug("entry");
883 memcpy(sig.mac_addr, this->bssid, ETH_ALEN); 867 memcpy(sig.mac_addr, this->bssid, ETH_ALEN);
884 return wl3501_esbq_exec(this, &sig, sizeof(sig)); 868 return wl3501_esbq_exec(this, &sig, sizeof(sig));
885} 869}
@@ -893,7 +877,7 @@ static int wl3501_mgmt_association(struct wl3501_card *this)
893 .cap_info = this->cap_info, 877 .cap_info = this->cap_info,
894 }; 878 };
895 879
896 dprintk(3, "entry"); 880 pr_debug("entry");
897 memcpy(sig.mac_addr, this->bssid, ETH_ALEN); 881 memcpy(sig.mac_addr, this->bssid, ETH_ALEN);
898 return wl3501_esbq_exec(this, &sig, sizeof(sig)); 882 return wl3501_esbq_exec(this, &sig, sizeof(sig));
899} 883}
@@ -903,7 +887,7 @@ static void wl3501_mgmt_join_confirm(struct net_device *dev, u16 addr)
903 struct wl3501_card *this = netdev_priv(dev); 887 struct wl3501_card *this = netdev_priv(dev);
904 struct wl3501_join_confirm sig; 888 struct wl3501_join_confirm sig;
905 889
906 dprintk(3, "entry"); 890 pr_debug("entry");
907 wl3501_get_from_wla(this, addr, &sig, sizeof(sig)); 891 wl3501_get_from_wla(this, addr, &sig, sizeof(sig));
908 if (sig.status == WL3501_STATUS_SUCCESS) { 892 if (sig.status == WL3501_STATUS_SUCCESS) {
909 if (this->net_type == IW_MODE_INFRA) { 893 if (this->net_type == IW_MODE_INFRA) {
@@ -962,7 +946,7 @@ static inline void wl3501_md_confirm_interrupt(struct net_device *dev,
962{ 946{
963 struct wl3501_md_confirm sig; 947 struct wl3501_md_confirm sig;
964 948
965 dprintk(3, "entry"); 949 pr_debug("entry");
966 wl3501_get_from_wla(this, addr, &sig, sizeof(sig)); 950 wl3501_get_from_wla(this, addr, &sig, sizeof(sig));
967 wl3501_free_tx_buffer(this, sig.data); 951 wl3501_free_tx_buffer(this, sig.data);
968 if (netif_queue_stopped(dev)) 952 if (netif_queue_stopped(dev))
@@ -1017,7 +1001,7 @@ static inline void wl3501_md_ind_interrupt(struct net_device *dev,
1017static inline void wl3501_get_confirm_interrupt(struct wl3501_card *this, 1001static inline void wl3501_get_confirm_interrupt(struct wl3501_card *this,
1018 u16 addr, void *sig, int size) 1002 u16 addr, void *sig, int size)
1019{ 1003{
1020 dprintk(3, "entry"); 1004 pr_debug("entry");
1021 wl3501_get_from_wla(this, addr, &this->sig_get_confirm, 1005 wl3501_get_from_wla(this, addr, &this->sig_get_confirm,
1022 sizeof(this->sig_get_confirm)); 1006 sizeof(this->sig_get_confirm));
1023 wake_up(&this->wait); 1007 wake_up(&this->wait);
@@ -1029,7 +1013,7 @@ static inline void wl3501_start_confirm_interrupt(struct net_device *dev,
1029{ 1013{
1030 struct wl3501_start_confirm sig; 1014 struct wl3501_start_confirm sig;
1031 1015
1032 dprintk(3, "entry"); 1016 pr_debug("entry");
1033 wl3501_get_from_wla(this, addr, &sig, sizeof(sig)); 1017 wl3501_get_from_wla(this, addr, &sig, sizeof(sig));
1034 if (sig.status == WL3501_STATUS_SUCCESS) 1018 if (sig.status == WL3501_STATUS_SUCCESS)
1035 netif_wake_queue(dev); 1019 netif_wake_queue(dev);
@@ -1041,7 +1025,7 @@ static inline void wl3501_assoc_confirm_interrupt(struct net_device *dev,
1041 struct wl3501_card *this = netdev_priv(dev); 1025 struct wl3501_card *this = netdev_priv(dev);
1042 struct wl3501_assoc_confirm sig; 1026 struct wl3501_assoc_confirm sig;
1043 1027
1044 dprintk(3, "entry"); 1028 pr_debug("entry");
1045 wl3501_get_from_wla(this, addr, &sig, sizeof(sig)); 1029 wl3501_get_from_wla(this, addr, &sig, sizeof(sig));
1046 1030
1047 if (sig.status == WL3501_STATUS_SUCCESS) 1031 if (sig.status == WL3501_STATUS_SUCCESS)
@@ -1053,7 +1037,7 @@ static inline void wl3501_auth_confirm_interrupt(struct wl3501_card *this,
1053{ 1037{
1054 struct wl3501_auth_confirm sig; 1038 struct wl3501_auth_confirm sig;
1055 1039
1056 dprintk(3, "entry"); 1040 pr_debug("entry");
1057 wl3501_get_from_wla(this, addr, &sig, sizeof(sig)); 1041 wl3501_get_from_wla(this, addr, &sig, sizeof(sig));
1058 1042
1059 if (sig.status == WL3501_STATUS_SUCCESS) 1043 if (sig.status == WL3501_STATUS_SUCCESS)
@@ -1069,7 +1053,7 @@ static inline void wl3501_rx_interrupt(struct net_device *dev)
1069 u8 sig_id; 1053 u8 sig_id;
1070 struct wl3501_card *this = netdev_priv(dev); 1054 struct wl3501_card *this = netdev_priv(dev);
1071 1055
1072 dprintk(3, "entry"); 1056 pr_debug("entry");
1073loop: 1057loop:
1074 morepkts = 0; 1058 morepkts = 0;
1075 if (!wl3501_esbq_confirm(this)) 1059 if (!wl3501_esbq_confirm(this))
@@ -1302,7 +1286,7 @@ static int wl3501_reset(struct net_device *dev)
1302 wl3501_ack_interrupt(this); 1286 wl3501_ack_interrupt(this);
1303 wl3501_unblock_interrupt(this); 1287 wl3501_unblock_interrupt(this);
1304 wl3501_mgmt_scan(this, 100); 1288 wl3501_mgmt_scan(this, 100);
1305 dprintk(1, "%s: device reset", dev->name); 1289 pr_debug("%s: device reset", dev->name);
1306 rc = 0; 1290 rc = 0;
1307out: 1291out:
1308 return rc; 1292 return rc;
@@ -1376,7 +1360,7 @@ static int wl3501_open(struct net_device *dev)
1376 link->open++; 1360 link->open++;
1377 1361
1378 /* Initial WL3501 firmware */ 1362 /* Initial WL3501 firmware */
1379 dprintk(1, "%s: Initialize WL3501 firmware...", dev->name); 1363 pr_debug("%s: Initialize WL3501 firmware...", dev->name);
1380 if (wl3501_init_firmware(this)) 1364 if (wl3501_init_firmware(this))
1381 goto fail; 1365 goto fail;
1382 /* Initial device variables */ 1366 /* Initial device variables */
@@ -1388,7 +1372,7 @@ static int wl3501_open(struct net_device *dev)
1388 wl3501_unblock_interrupt(this); 1372 wl3501_unblock_interrupt(this);
1389 wl3501_mgmt_scan(this, 100); 1373 wl3501_mgmt_scan(this, 100);
1390 rc = 0; 1374 rc = 0;
1391 dprintk(1, "%s: WL3501 opened", dev->name); 1375 pr_debug("%s: WL3501 opened", dev->name);
1392 printk(KERN_INFO "%s: Card Name: %s\n" 1376 printk(KERN_INFO "%s: Card Name: %s\n"
1393 "%s: Firmware Date: %s\n", 1377 "%s: Firmware Date: %s\n",
1394 dev->name, this->card_name, 1378 dev->name, this->card_name,
@@ -1914,8 +1898,7 @@ static int wl3501_probe(struct pcmcia_device *p_dev)
1914 p_dev->io.IOAddrLines = 5; 1898 p_dev->io.IOAddrLines = 5;
1915 1899
1916 /* Interrupt setup */ 1900 /* Interrupt setup */
1917 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING | IRQ_HANDLE_PRESENT; 1901 p_dev->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
1918 p_dev->irq.IRQInfo1 = IRQ_LEVEL_ID;
1919 p_dev->irq.Handler = wl3501_interrupt; 1902 p_dev->irq.Handler = wl3501_interrupt;
1920 1903
1921 /* General socket configuration */ 1904 /* General socket configuration */
@@ -1938,16 +1921,13 @@ static int wl3501_probe(struct pcmcia_device *p_dev)
1938 dev->wireless_handlers = &wl3501_handler_def; 1921 dev->wireless_handlers = &wl3501_handler_def;
1939 SET_ETHTOOL_OPS(dev, &ops); 1922 SET_ETHTOOL_OPS(dev, &ops);
1940 netif_stop_queue(dev); 1923 netif_stop_queue(dev);
1941 p_dev->priv = p_dev->irq.Instance = dev; 1924 p_dev->priv = dev;
1942 1925
1943 return wl3501_config(p_dev); 1926 return wl3501_config(p_dev);
1944out_link: 1927out_link:
1945 return -ENOMEM; 1928 return -ENOMEM;
1946} 1929}
1947 1930
1948#define CS_CHECK(fn, ret) \
1949do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
1950
1951/** 1931/**
1952 * wl3501_config - configure the PCMCIA socket and make eth device available 1932 * wl3501_config - configure the PCMCIA socket and make eth device available
1953 * @link - FILL_IN 1933 * @link - FILL_IN
@@ -1959,7 +1939,7 @@ do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
1959static int wl3501_config(struct pcmcia_device *link) 1939static int wl3501_config(struct pcmcia_device *link)
1960{ 1940{
1961 struct net_device *dev = link->priv; 1941 struct net_device *dev = link->priv;
1962 int i = 0, j, last_fn, last_ret; 1942 int i = 0, j, ret;
1963 struct wl3501_card *this; 1943 struct wl3501_card *this;
1964 1944
1965 /* Try allocating IO ports. This tries a few fixed addresses. If you 1945 /* Try allocating IO ports. This tries a few fixed addresses. If you
@@ -1975,24 +1955,26 @@ static int wl3501_config(struct pcmcia_device *link)
1975 if (i == 0) 1955 if (i == 0)
1976 break; 1956 break;
1977 } 1957 }
1978 if (i != 0) { 1958 if (i != 0)
1979 cs_error(link, RequestIO, i);
1980 goto failed; 1959 goto failed;
1981 }
1982 1960
1983 /* Now allocate an interrupt line. Note that this does not actually 1961 /* Now allocate an interrupt line. Note that this does not actually
1984 * assign a handler to the interrupt. */ 1962 * assign a handler to the interrupt. */
1985 1963
1986 CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq)); 1964 ret = pcmcia_request_irq(link, &link->irq);
1965 if (ret)
1966 goto failed;
1987 1967
1988 /* This actually configures the PCMCIA socket -- setting up the I/O 1968 /* This actually configures the PCMCIA socket -- setting up the I/O
1989 * windows and the interrupt mapping. */ 1969 * windows and the interrupt mapping. */
1990 1970
1991 CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf)); 1971 ret = pcmcia_request_configuration(link, &link->conf);
1972 if (ret)
1973 goto failed;
1992 1974
1993 dev->irq = link->irq.AssignedIRQ; 1975 dev->irq = link->irq.AssignedIRQ;
1994 dev->base_addr = link->io.BasePort1; 1976 dev->base_addr = link->io.BasePort1;
1995 SET_NETDEV_DEV(dev, &handle_to_dev(link)); 1977 SET_NETDEV_DEV(dev, &link->dev);
1996 if (register_netdev(dev)) { 1978 if (register_netdev(dev)) {
1997 printk(KERN_NOTICE "wl3501_cs: register_netdev() failed\n"); 1979 printk(KERN_NOTICE "wl3501_cs: register_netdev() failed\n");
1998 goto failed; 1980 goto failed;
@@ -2041,8 +2023,6 @@ static int wl3501_config(struct pcmcia_device *link)
2041 netif_start_queue(dev); 2023 netif_start_queue(dev);
2042 return 0; 2024 return 0;
2043 2025
2044cs_failed:
2045 cs_error(link, last_fn, last_ret);
2046failed: 2026failed:
2047 wl3501_release(link); 2027 wl3501_release(link);
2048 return -ENODEV; 2028 return -ENODEV;
diff --git a/drivers/net/wireless/zd1201.c b/drivers/net/wireless/zd1201.c
index bc81974a2bc7..9d1277874645 100644
--- a/drivers/net/wireless/zd1201.c
+++ b/drivers/net/wireless/zd1201.c
@@ -14,6 +14,7 @@
14 14
15#include <linux/module.h> 15#include <linux/module.h>
16#include <linux/usb.h> 16#include <linux/usb.h>
17#include <linux/slab.h>
17#include <linux/netdevice.h> 18#include <linux/netdevice.h>
18#include <linux/etherdevice.h> 19#include <linux/etherdevice.h>
19#include <linux/wireless.h> 20#include <linux/wireless.h>
@@ -112,6 +113,9 @@ exit:
112 return err; 113 return err;
113} 114}
114 115
116MODULE_FIRMWARE("zd1201-ap.fw");
117MODULE_FIRMWARE("zd1201.fw");
118
115static void zd1201_usbfree(struct urb *urb) 119static void zd1201_usbfree(struct urb *urb)
116{ 120{
117 struct zd1201 *zd = urb->context; 121 struct zd1201 *zd = urb->context;
@@ -872,20 +876,18 @@ static struct iw_statistics *zd1201_get_wireless_stats(struct net_device *dev)
872static void zd1201_set_multicast(struct net_device *dev) 876static void zd1201_set_multicast(struct net_device *dev)
873{ 877{
874 struct zd1201 *zd = netdev_priv(dev); 878 struct zd1201 *zd = netdev_priv(dev);
875 struct dev_mc_list *mc = dev->mc_list; 879 struct dev_mc_list *mc;
876 unsigned char reqbuf[ETH_ALEN*ZD1201_MAXMULTI]; 880 unsigned char reqbuf[ETH_ALEN*ZD1201_MAXMULTI];
877 int i; 881 int i;
878 882
879 if (dev->mc_count > ZD1201_MAXMULTI) 883 if (netdev_mc_count(dev) > ZD1201_MAXMULTI)
880 return; 884 return;
881 885
882 for (i=0; i<dev->mc_count; i++) { 886 i = 0;
883 memcpy(reqbuf+i*ETH_ALEN, mc->dmi_addr, ETH_ALEN); 887 netdev_for_each_mc_addr(mc, dev)
884 mc = mc->next; 888 memcpy(reqbuf + i++ * ETH_ALEN, mc->dmi_addr, ETH_ALEN);
885 }
886 zd1201_setconfig(zd, ZD1201_RID_CNFGROUPADDRESS, reqbuf, 889 zd1201_setconfig(zd, ZD1201_RID_CNFGROUPADDRESS, reqbuf,
887 dev->mc_count*ETH_ALEN, 0); 890 netdev_mc_count(dev) * ETH_ALEN, 0);
888
889} 891}
890 892
891static int zd1201_config_commit(struct net_device *dev, 893static int zd1201_config_commit(struct net_device *dev,
diff --git a/drivers/net/wireless/zd1211rw/Kconfig b/drivers/net/wireless/zd1211rw/Kconfig
index 74b31eafe72d..5f809695f71a 100644
--- a/drivers/net/wireless/zd1211rw/Kconfig
+++ b/drivers/net/wireless/zd1211rw/Kconfig
@@ -1,6 +1,6 @@
1config ZD1211RW 1config ZD1211RW
2 tristate "ZyDAS ZD1211/ZD1211B USB-wireless support" 2 tristate "ZyDAS ZD1211/ZD1211B USB-wireless support"
3 depends on USB && MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on USB && MAC80211 && EXPERIMENTAL
4 select FW_LOADER 4 select FW_LOADER
5 ---help--- 5 ---help---
6 This is an experimental driver for the ZyDAS ZD1211/ZD1211B wireless 6 This is an experimental driver for the ZyDAS ZD1211/ZD1211B wireless
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index 4e79a9800134..b2af3c549bb3 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -25,6 +25,7 @@
25 25
26#include <linux/kernel.h> 26#include <linux/kernel.h>
27#include <linux/errno.h> 27#include <linux/errno.h>
28#include <linux/slab.h>
28 29
29#include "zd_def.h" 30#include "zd_def.h"
30#include "zd_chip.h" 31#include "zd_chip.h"
@@ -755,7 +756,7 @@ static int hw_reset_phy(struct zd_chip *chip)
755static int zd1211_hw_init_hmac(struct zd_chip *chip) 756static int zd1211_hw_init_hmac(struct zd_chip *chip)
756{ 757{
757 static const struct zd_ioreq32 ioreqs[] = { 758 static const struct zd_ioreq32 ioreqs[] = {
758 { CR_ZD1211_RETRY_MAX, 0x2 }, 759 { CR_ZD1211_RETRY_MAX, ZD1211_RETRY_COUNT },
759 { CR_RX_THRESHOLD, 0x000c0640 }, 760 { CR_RX_THRESHOLD, 0x000c0640 },
760 }; 761 };
761 762
@@ -767,7 +768,7 @@ static int zd1211_hw_init_hmac(struct zd_chip *chip)
767static int zd1211b_hw_init_hmac(struct zd_chip *chip) 768static int zd1211b_hw_init_hmac(struct zd_chip *chip)
768{ 769{
769 static const struct zd_ioreq32 ioreqs[] = { 770 static const struct zd_ioreq32 ioreqs[] = {
770 { CR_ZD1211B_RETRY_MAX, 0x02020202 }, 771 { CR_ZD1211B_RETRY_MAX, ZD1211B_RETRY_COUNT },
771 { CR_ZD1211B_CWIN_MAX_MIN_AC0, 0x007f003f }, 772 { CR_ZD1211B_CWIN_MAX_MIN_AC0, 0x007f003f },
772 { CR_ZD1211B_CWIN_MAX_MIN_AC1, 0x007f003f }, 773 { CR_ZD1211B_CWIN_MAX_MIN_AC1, 0x007f003f },
773 { CR_ZD1211B_CWIN_MAX_MIN_AC2, 0x003f001f }, 774 { CR_ZD1211B_CWIN_MAX_MIN_AC2, 0x003f001f },
@@ -1325,151 +1326,11 @@ int zd_chip_set_basic_rates(struct zd_chip *chip, u16 cr_rates)
1325 return r; 1326 return r;
1326} 1327}
1327 1328
1328static int ofdm_qual_db(u8 status_quality, u8 zd_rate, unsigned int size)
1329{
1330 static const u16 constants[] = {
1331 715, 655, 585, 540, 470, 410, 360, 315,
1332 270, 235, 205, 175, 150, 125, 105, 85,
1333 65, 50, 40, 25, 15
1334 };
1335
1336 int i;
1337 u32 x;
1338
1339 /* It seems that their quality parameter is somehow per signal
1340 * and is now transferred per bit.
1341 */
1342 switch (zd_rate) {
1343 case ZD_OFDM_RATE_6M:
1344 case ZD_OFDM_RATE_12M:
1345 case ZD_OFDM_RATE_24M:
1346 size *= 2;
1347 break;
1348 case ZD_OFDM_RATE_9M:
1349 case ZD_OFDM_RATE_18M:
1350 case ZD_OFDM_RATE_36M:
1351 case ZD_OFDM_RATE_54M:
1352 size *= 4;
1353 size /= 3;
1354 break;
1355 case ZD_OFDM_RATE_48M:
1356 size *= 3;
1357 size /= 2;
1358 break;
1359 default:
1360 return -EINVAL;
1361 }
1362
1363 x = (10000 * status_quality)/size;
1364 for (i = 0; i < ARRAY_SIZE(constants); i++) {
1365 if (x > constants[i])
1366 break;
1367 }
1368
1369 switch (zd_rate) {
1370 case ZD_OFDM_RATE_6M:
1371 case ZD_OFDM_RATE_9M:
1372 i += 3;
1373 break;
1374 case ZD_OFDM_RATE_12M:
1375 case ZD_OFDM_RATE_18M:
1376 i += 5;
1377 break;
1378 case ZD_OFDM_RATE_24M:
1379 case ZD_OFDM_RATE_36M:
1380 i += 9;
1381 break;
1382 case ZD_OFDM_RATE_48M:
1383 case ZD_OFDM_RATE_54M:
1384 i += 15;
1385 break;
1386 default:
1387 return -EINVAL;
1388 }
1389
1390 return i;
1391}
1392
1393static int ofdm_qual_percent(u8 status_quality, u8 zd_rate, unsigned int size)
1394{
1395 int r;
1396
1397 r = ofdm_qual_db(status_quality, zd_rate, size);
1398 ZD_ASSERT(r >= 0);
1399 if (r < 0)
1400 r = 0;
1401
1402 r = (r * 100)/29;
1403 return r <= 100 ? r : 100;
1404}
1405
1406static unsigned int log10times100(unsigned int x)
1407{
1408 static const u8 log10[] = {
1409 0,
1410 0, 30, 47, 60, 69, 77, 84, 90, 95, 100,
1411 104, 107, 111, 114, 117, 120, 123, 125, 127, 130,
1412 132, 134, 136, 138, 139, 141, 143, 144, 146, 147,
1413 149, 150, 151, 153, 154, 155, 156, 157, 159, 160,
1414 161, 162, 163, 164, 165, 166, 167, 168, 169, 169,
1415 170, 171, 172, 173, 174, 174, 175, 176, 177, 177,
1416 178, 179, 179, 180, 181, 181, 182, 183, 183, 184,
1417 185, 185, 186, 186, 187, 188, 188, 189, 189, 190,
1418 190, 191, 191, 192, 192, 193, 193, 194, 194, 195,
1419 195, 196, 196, 197, 197, 198, 198, 199, 199, 200,
1420 200, 200, 201, 201, 202, 202, 202, 203, 203, 204,
1421 204, 204, 205, 205, 206, 206, 206, 207, 207, 207,
1422 208, 208, 208, 209, 209, 210, 210, 210, 211, 211,
1423 211, 212, 212, 212, 213, 213, 213, 213, 214, 214,
1424 214, 215, 215, 215, 216, 216, 216, 217, 217, 217,
1425 217, 218, 218, 218, 219, 219, 219, 219, 220, 220,
1426 220, 220, 221, 221, 221, 222, 222, 222, 222, 223,
1427 223, 223, 223, 224, 224, 224, 224,
1428 };
1429
1430 return x < ARRAY_SIZE(log10) ? log10[x] : 225;
1431}
1432
1433enum {
1434 MAX_CCK_EVM_DB = 45,
1435};
1436
1437static int cck_evm_db(u8 status_quality)
1438{
1439 return (20 * log10times100(status_quality)) / 100;
1440}
1441
1442static int cck_snr_db(u8 status_quality)
1443{
1444 int r = MAX_CCK_EVM_DB - cck_evm_db(status_quality);
1445 ZD_ASSERT(r >= 0);
1446 return r;
1447}
1448
1449static int cck_qual_percent(u8 status_quality)
1450{
1451 int r;
1452
1453 r = cck_snr_db(status_quality);
1454 r = (100*r)/17;
1455 return r <= 100 ? r : 100;
1456}
1457
1458static inline u8 zd_rate_from_ofdm_plcp_header(const void *rx_frame) 1329static inline u8 zd_rate_from_ofdm_plcp_header(const void *rx_frame)
1459{ 1330{
1460 return ZD_OFDM | zd_ofdm_plcp_header_rate(rx_frame); 1331 return ZD_OFDM | zd_ofdm_plcp_header_rate(rx_frame);
1461} 1332}
1462 1333
1463u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
1464 const struct rx_status *status)
1465{
1466 return (status->frame_status&ZD_RX_OFDM) ?
1467 ofdm_qual_percent(status->signal_quality_ofdm,
1468 zd_rate_from_ofdm_plcp_header(rx_frame),
1469 size) :
1470 cck_qual_percent(status->signal_quality_cck);
1471}
1472
1473/** 1334/**
1474 * zd_rx_rate - report zd-rate 1335 * zd_rx_rate - report zd-rate
1475 * @rx_frame - received frame 1336 * @rx_frame - received frame
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index 678c139a840c..f8bbf7d302ae 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -642,13 +642,29 @@ enum {
642#define CR_ZD1211B_TXOP CTL_REG(0x0b20) 642#define CR_ZD1211B_TXOP CTL_REG(0x0b20)
643#define CR_ZD1211B_RETRY_MAX CTL_REG(0x0b28) 643#define CR_ZD1211B_RETRY_MAX CTL_REG(0x0b28)
644 644
645/* Value for CR_ZD1211_RETRY_MAX & CR_ZD1211B_RETRY_MAX. Vendor driver uses 2,
646 * we use 0. The first rate is tried (count+2), then all next rates are tried
647 * twice, until 1 Mbits is tried. */
648#define ZD1211_RETRY_COUNT 0
649#define ZD1211B_RETRY_COUNT \
650 (ZD1211_RETRY_COUNT << 0)| \
651 (ZD1211_RETRY_COUNT << 8)| \
652 (ZD1211_RETRY_COUNT << 16)| \
653 (ZD1211_RETRY_COUNT << 24)
654
645/* Used to detect PLL lock */ 655/* Used to detect PLL lock */
646#define UW2453_INTR_REG ((zd_addr_t)0x85c1) 656#define UW2453_INTR_REG ((zd_addr_t)0x85c1)
647 657
648#define CWIN_SIZE 0x007f043f 658#define CWIN_SIZE 0x007f043f
649 659
650 660
651#define HWINT_ENABLED 0x004f0000 661#define HWINT_ENABLED \
662 (INT_TX_COMPLETE_EN| \
663 INT_RX_COMPLETE_EN| \
664 INT_RETRY_FAIL_EN| \
665 INT_WAKEUP_EN| \
666 INT_CFG_NEXT_BCN_EN)
667
652#define HWINT_DISABLED 0 668#define HWINT_DISABLED 0
653 669
654#define E2P_PWR_INT_GUARD 8 670#define E2P_PWR_INT_GUARD 8
@@ -913,9 +929,6 @@ static inline int zd_get_beacon_interval(struct zd_chip *chip, u32 *interval)
913 929
914struct rx_status; 930struct rx_status;
915 931
916u8 zd_rx_qual_percent(const void *rx_frame, unsigned int size,
917 const struct rx_status *status);
918
919u8 zd_rx_rate(const void *rx_frame, const struct rx_status *status); 932u8 zd_rx_rate(const void *rx_frame, const struct rx_status *status);
920 933
921struct zd_mc_hash { 934struct zd_mc_hash {
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index 6d666359a42f..16fa289ad77b 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -22,6 +22,7 @@
22 22
23#include <linux/netdevice.h> 23#include <linux/netdevice.h>
24#include <linux/etherdevice.h> 24#include <linux/etherdevice.h>
25#include <linux/slab.h>
25#include <linux/usb.h> 26#include <linux/usb.h>
26#include <linux/jiffies.h> 27#include <linux/jiffies.h>
27#include <net/ieee80211_radiotap.h> 28#include <net/ieee80211_radiotap.h>
@@ -88,6 +89,34 @@ static const struct ieee80211_rate zd_rates[] = {
88 .flags = 0 }, 89 .flags = 0 },
89}; 90};
90 91
92/*
93 * Zydas retry rates table. Each line is listed in the same order as
94 * in zd_rates[] and contains all the rate used when a packet is sent
95 * starting with a given rates. Let's consider an example :
96 *
97 * "11 Mbits : 4, 3, 2, 1, 0" means :
98 * - packet is sent using 4 different rates
99 * - 1st rate is index 3 (ie 11 Mbits)
100 * - 2nd rate is index 2 (ie 5.5 Mbits)
101 * - 3rd rate is index 1 (ie 2 Mbits)
102 * - 4th rate is index 0 (ie 1 Mbits)
103 */
104
105static const struct tx_retry_rate zd_retry_rates[] = {
106 { /* 1 Mbits */ 1, { 0 }},
107 { /* 2 Mbits */ 2, { 1, 0 }},
108 { /* 5.5 Mbits */ 3, { 2, 1, 0 }},
109 { /* 11 Mbits */ 4, { 3, 2, 1, 0 }},
110 { /* 6 Mbits */ 5, { 4, 3, 2, 1, 0 }},
111 { /* 9 Mbits */ 6, { 5, 4, 3, 2, 1, 0}},
112 { /* 12 Mbits */ 5, { 6, 3, 2, 1, 0 }},
113 { /* 18 Mbits */ 6, { 7, 6, 3, 2, 1, 0 }},
114 { /* 24 Mbits */ 6, { 8, 6, 3, 2, 1, 0 }},
115 { /* 36 Mbits */ 7, { 9, 8, 6, 3, 2, 1, 0 }},
116 { /* 48 Mbits */ 8, {10, 9, 8, 6, 3, 2, 1, 0 }},
117 { /* 54 Mbits */ 9, {11, 10, 9, 8, 6, 3, 2, 1, 0 }}
118};
119
91static const struct ieee80211_channel zd_channels[] = { 120static const struct ieee80211_channel zd_channels[] = {
92 { .center_freq = 2412, .hw_value = 1 }, 121 { .center_freq = 2412, .hw_value = 1 },
93 { .center_freq = 2417, .hw_value = 2 }, 122 { .center_freq = 2417, .hw_value = 2 },
@@ -282,7 +311,7 @@ static void zd_op_stop(struct ieee80211_hw *hw)
282} 311}
283 312
284/** 313/**
285 * tx_status - reports tx status of a packet if required 314 * zd_mac_tx_status - reports tx status of a packet if required
286 * @hw - a &struct ieee80211_hw pointer 315 * @hw - a &struct ieee80211_hw pointer
287 * @skb - a sk-buffer 316 * @skb - a sk-buffer
288 * @flags: extra flags to set in the TX status info 317 * @flags: extra flags to set in the TX status info
@@ -295,15 +324,49 @@ static void zd_op_stop(struct ieee80211_hw *hw)
295 * 324 *
296 * If no status information has been requested, the skb is freed. 325 * If no status information has been requested, the skb is freed.
297 */ 326 */
298static void tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, 327static void zd_mac_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
299 int ackssi, bool success) 328 int ackssi, struct tx_status *tx_status)
300{ 329{
301 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 330 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
331 int i;
332 int success = 1, retry = 1;
333 int first_idx;
334 const struct tx_retry_rate *retries;
302 335
303 ieee80211_tx_info_clear_status(info); 336 ieee80211_tx_info_clear_status(info);
304 337
305 if (success) 338 if (tx_status) {
339 success = !tx_status->failure;
340 retry = tx_status->retry + success;
341 }
342
343 if (success) {
344 /* success */
306 info->flags |= IEEE80211_TX_STAT_ACK; 345 info->flags |= IEEE80211_TX_STAT_ACK;
346 } else {
347 /* failure */
348 info->flags &= ~IEEE80211_TX_STAT_ACK;
349 }
350
351 first_idx = info->status.rates[0].idx;
352 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates));
353 retries = &zd_retry_rates[first_idx];
354 ZD_ASSERT(1 <= retry && retry <= retries->count);
355
356 info->status.rates[0].idx = retries->rate[0];
357 info->status.rates[0].count = 1; // (retry > 1 ? 2 : 1);
358
359 for (i=1; i<IEEE80211_TX_MAX_RATES-1 && i<retry; i++) {
360 info->status.rates[i].idx = retries->rate[i];
361 info->status.rates[i].count = 1; // ((i==retry-1) && success ? 1:2);
362 }
363 for (; i<IEEE80211_TX_MAX_RATES && i<retry; i++) {
364 info->status.rates[i].idx = retries->rate[retry - 1];
365 info->status.rates[i].count = 1; // (success ? 1:2);
366 }
367 if (i<IEEE80211_TX_MAX_RATES)
368 info->status.rates[i].idx = -1; /* terminate */
369
307 info->status.ack_signal = ackssi; 370 info->status.ack_signal = ackssi;
308 ieee80211_tx_status_irqsafe(hw, skb); 371 ieee80211_tx_status_irqsafe(hw, skb);
309} 372}
@@ -312,20 +375,81 @@ static void tx_status(struct ieee80211_hw *hw, struct sk_buff *skb,
312 * zd_mac_tx_failed - callback for failed frames 375 * zd_mac_tx_failed - callback for failed frames
313 * @dev: the mac80211 wireless device 376 * @dev: the mac80211 wireless device
314 * 377 *
315 * This function is called if a frame couldn't be succesfully be 378 * This function is called if a frame couldn't be successfully
316 * transferred. The first frame from the tx queue, will be selected and 379 * transferred. The first frame from the tx queue, will be selected and
317 * reported as error to the upper layers. 380 * reported as error to the upper layers.
318 */ 381 */
319void zd_mac_tx_failed(struct ieee80211_hw *hw) 382void zd_mac_tx_failed(struct urb *urb)
320{ 383{
321 struct sk_buff_head *q = &zd_hw_mac(hw)->ack_wait_queue; 384 struct ieee80211_hw * hw = zd_usb_to_hw(urb->context);
385 struct zd_mac *mac = zd_hw_mac(hw);
386 struct sk_buff_head *q = &mac->ack_wait_queue;
322 struct sk_buff *skb; 387 struct sk_buff *skb;
388 struct tx_status *tx_status = (struct tx_status *)urb->transfer_buffer;
389 unsigned long flags;
390 int success = !tx_status->failure;
391 int retry = tx_status->retry + success;
392 int found = 0;
393 int i, position = 0;
323 394
324 skb = skb_dequeue(q); 395 q = &mac->ack_wait_queue;
325 if (skb == NULL) 396 spin_lock_irqsave(&q->lock, flags);
326 return; 397
398 skb_queue_walk(q, skb) {
399 struct ieee80211_hdr *tx_hdr;
400 struct ieee80211_tx_info *info;
401 int first_idx, final_idx;
402 const struct tx_retry_rate *retries;
403 u8 final_rate;
404
405 position ++;
406
407 /* if the hardware reports a failure and we had a 802.11 ACK
408 * pending, then we skip the first skb when searching for a
409 * matching frame */
410 if (tx_status->failure && mac->ack_pending &&
411 skb_queue_is_first(q, skb)) {
412 continue;
413 }
414
415 tx_hdr = (struct ieee80211_hdr *)skb->data;
416
417 /* we skip all frames not matching the reported destination */
418 if (unlikely(memcmp(tx_hdr->addr1, tx_status->mac, ETH_ALEN))) {
419 continue;
420 }
421
422 /* we skip all frames not matching the reported final rate */
423
424 info = IEEE80211_SKB_CB(skb);
425 first_idx = info->status.rates[0].idx;
426 ZD_ASSERT(0<=first_idx && first_idx<ARRAY_SIZE(zd_retry_rates));
427 retries = &zd_retry_rates[first_idx];
428 if (retry <= 0 || retry > retries->count)
429 continue;
430
431 final_idx = retries->rate[retry - 1];
432 final_rate = zd_rates[final_idx].hw_value;
327 433
328 tx_status(hw, skb, 0, 0); 434 if (final_rate != tx_status->rate) {
435 continue;
436 }
437
438 found = 1;
439 break;
440 }
441
442 if (found) {
443 for (i=1; i<=position; i++) {
444 skb = __skb_dequeue(q);
445 zd_mac_tx_status(hw, skb,
446 mac->ack_pending ? mac->ack_signal : 0,
447 i == position ? tx_status : NULL);
448 mac->ack_pending = 0;
449 }
450 }
451
452 spin_unlock_irqrestore(&q->lock, flags);
329} 453}
330 454
331/** 455/**
@@ -342,18 +466,27 @@ void zd_mac_tx_to_dev(struct sk_buff *skb, int error)
342{ 466{
343 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 467 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
344 struct ieee80211_hw *hw = info->rate_driver_data[0]; 468 struct ieee80211_hw *hw = info->rate_driver_data[0];
469 struct zd_mac *mac = zd_hw_mac(hw);
470
471 ieee80211_tx_info_clear_status(info);
345 472
346 skb_pull(skb, sizeof(struct zd_ctrlset)); 473 skb_pull(skb, sizeof(struct zd_ctrlset));
347 if (unlikely(error || 474 if (unlikely(error ||
348 (info->flags & IEEE80211_TX_CTL_NO_ACK))) { 475 (info->flags & IEEE80211_TX_CTL_NO_ACK))) {
349 tx_status(hw, skb, 0, !error); 476 /*
477 * FIXME : do we need to fill in anything ?
478 */
479 ieee80211_tx_status_irqsafe(hw, skb);
350 } else { 480 } else {
351 struct sk_buff_head *q = 481 struct sk_buff_head *q = &mac->ack_wait_queue;
352 &zd_hw_mac(hw)->ack_wait_queue;
353 482
354 skb_queue_tail(q, skb); 483 skb_queue_tail(q, skb);
355 while (skb_queue_len(q) > ZD_MAC_MAX_ACK_WAITERS) 484 while (skb_queue_len(q) > ZD_MAC_MAX_ACK_WAITERS) {
356 zd_mac_tx_failed(hw); 485 zd_mac_tx_status(hw, skb_dequeue(q),
486 mac->ack_pending ? mac->ack_signal : 0,
487 NULL);
488 mac->ack_pending = 0;
489 }
357 } 490 }
358} 491}
359 492
@@ -606,27 +739,47 @@ fail:
606static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr, 739static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr,
607 struct ieee80211_rx_status *stats) 740 struct ieee80211_rx_status *stats)
608{ 741{
742 struct zd_mac *mac = zd_hw_mac(hw);
609 struct sk_buff *skb; 743 struct sk_buff *skb;
610 struct sk_buff_head *q; 744 struct sk_buff_head *q;
611 unsigned long flags; 745 unsigned long flags;
746 int found = 0;
747 int i, position = 0;
612 748
613 if (!ieee80211_is_ack(rx_hdr->frame_control)) 749 if (!ieee80211_is_ack(rx_hdr->frame_control))
614 return 0; 750 return 0;
615 751
616 q = &zd_hw_mac(hw)->ack_wait_queue; 752 q = &mac->ack_wait_queue;
617 spin_lock_irqsave(&q->lock, flags); 753 spin_lock_irqsave(&q->lock, flags);
618 skb_queue_walk(q, skb) { 754 skb_queue_walk(q, skb) {
619 struct ieee80211_hdr *tx_hdr; 755 struct ieee80211_hdr *tx_hdr;
620 756
757 position ++;
758
759 if (mac->ack_pending && skb_queue_is_first(q, skb))
760 continue;
761
621 tx_hdr = (struct ieee80211_hdr *)skb->data; 762 tx_hdr = (struct ieee80211_hdr *)skb->data;
622 if (likely(!memcmp(tx_hdr->addr2, rx_hdr->addr1, ETH_ALEN))) 763 if (likely(!memcmp(tx_hdr->addr2, rx_hdr->addr1, ETH_ALEN)))
623 { 764 {
624 __skb_unlink(skb, q); 765 found = 1;
625 tx_status(hw, skb, stats->signal, 1); 766 break;
626 goto out;
627 } 767 }
628 } 768 }
629out: 769
770 if (found) {
771 for (i=1; i<position; i++) {
772 skb = __skb_dequeue(q);
773 zd_mac_tx_status(hw, skb,
774 mac->ack_pending ? mac->ack_signal : 0,
775 NULL);
776 mac->ack_pending = 0;
777 }
778
779 mac->ack_pending = 1;
780 mac->ack_signal = stats->signal;
781 }
782
630 spin_unlock_irqrestore(&q->lock, flags); 783 spin_unlock_irqrestore(&q->lock, flags);
631 return 1; 784 return 1;
632} 785}
@@ -674,9 +827,6 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
674 stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq; 827 stats.freq = zd_channels[_zd_chip_get_channel(&mac->chip) - 1].center_freq;
675 stats.band = IEEE80211_BAND_2GHZ; 828 stats.band = IEEE80211_BAND_2GHZ;
676 stats.signal = status->signal_strength; 829 stats.signal = status->signal_strength;
677 stats.qual = zd_rx_qual_percent(buffer,
678 length - sizeof(struct rx_status),
679 status);
680 830
681 rate = zd_rx_rate(buffer, status); 831 rate = zd_rx_rate(buffer, status);
682 832
@@ -709,6 +859,7 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
709 skb_reserve(skb, 2); 859 skb_reserve(skb, 2);
710 } 860 }
711 861
862 /* FIXME : could we avoid this big memcpy ? */
712 memcpy(skb_put(skb, length), buffer, length); 863 memcpy(skb_put(skb, length), buffer, length);
713 864
714 memcpy(IEEE80211_SKB_RXCB(skb), &stats, sizeof(stats)); 865 memcpy(IEEE80211_SKB_RXCB(skb), &stats, sizeof(stats));
@@ -717,7 +868,7 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
717} 868}
718 869
719static int zd_op_add_interface(struct ieee80211_hw *hw, 870static int zd_op_add_interface(struct ieee80211_hw *hw,
720 struct ieee80211_if_init_conf *conf) 871 struct ieee80211_vif *vif)
721{ 872{
722 struct zd_mac *mac = zd_hw_mac(hw); 873 struct zd_mac *mac = zd_hw_mac(hw);
723 874
@@ -725,22 +876,22 @@ static int zd_op_add_interface(struct ieee80211_hw *hw,
725 if (mac->type != NL80211_IFTYPE_UNSPECIFIED) 876 if (mac->type != NL80211_IFTYPE_UNSPECIFIED)
726 return -EOPNOTSUPP; 877 return -EOPNOTSUPP;
727 878
728 switch (conf->type) { 879 switch (vif->type) {
729 case NL80211_IFTYPE_MONITOR: 880 case NL80211_IFTYPE_MONITOR:
730 case NL80211_IFTYPE_MESH_POINT: 881 case NL80211_IFTYPE_MESH_POINT:
731 case NL80211_IFTYPE_STATION: 882 case NL80211_IFTYPE_STATION:
732 case NL80211_IFTYPE_ADHOC: 883 case NL80211_IFTYPE_ADHOC:
733 mac->type = conf->type; 884 mac->type = vif->type;
734 break; 885 break;
735 default: 886 default:
736 return -EOPNOTSUPP; 887 return -EOPNOTSUPP;
737 } 888 }
738 889
739 return zd_write_mac_addr(&mac->chip, conf->mac_addr); 890 return zd_write_mac_addr(&mac->chip, vif->addr);
740} 891}
741 892
742static void zd_op_remove_interface(struct ieee80211_hw *hw, 893static void zd_op_remove_interface(struct ieee80211_hw *hw,
743 struct ieee80211_if_init_conf *conf) 894 struct ieee80211_vif *vif)
744{ 895{
745 struct zd_mac *mac = zd_hw_mac(hw); 896 struct zd_mac *mac = zd_hw_mac(hw);
746 mac->type = NL80211_IFTYPE_UNSPECIFIED; 897 mac->type = NL80211_IFTYPE_UNSPECIFIED;
@@ -835,12 +986,13 @@ static void zd_op_configure_filter(struct ieee80211_hw *hw,
835 changed_flags &= SUPPORTED_FIF_FLAGS; 986 changed_flags &= SUPPORTED_FIF_FLAGS;
836 *new_flags &= SUPPORTED_FIF_FLAGS; 987 *new_flags &= SUPPORTED_FIF_FLAGS;
837 988
838 /* changed_flags is always populated but this driver 989 /*
839 * doesn't support all FIF flags so its possible we don't 990 * If multicast parameter (as returned by zd_op_prepare_multicast)
840 * need to do anything */ 991 * has changed, no bit in changed_flags is set. To handle this
841 if (!changed_flags) 992 * situation, we do not return if changed_flags is 0. If we do so,
842 return; 993 * we will have some issue with IPv6 which uses multicast for link
843 994 * layer address resolution.
995 */
844 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI)) 996 if (*new_flags & (FIF_PROMISC_IN_BSS | FIF_ALLMULTI))
845 zd_mc_add_all(&hash); 997 zd_mc_add_all(&hash);
846 998
@@ -999,7 +1151,14 @@ struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf)
999 hw->queues = 1; 1151 hw->queues = 1;
1000 hw->extra_tx_headroom = sizeof(struct zd_ctrlset); 1152 hw->extra_tx_headroom = sizeof(struct zd_ctrlset);
1001 1153
1154 /*
1155 * Tell mac80211 that we support multi rate retries
1156 */
1157 hw->max_rates = IEEE80211_TX_MAX_RATES;
1158 hw->max_rate_tries = 18; /* 9 rates * 2 retries/rate */
1159
1002 skb_queue_head_init(&mac->ack_wait_queue); 1160 skb_queue_head_init(&mac->ack_wait_queue);
1161 mac->ack_pending = 0;
1003 1162
1004 zd_chip_init(&mac->chip, hw, intf); 1163 zd_chip_init(&mac->chip, hw, intf);
1005 housekeeping_init(mac); 1164 housekeeping_init(mac);
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.h b/drivers/net/wireless/zd1211rw/zd_mac.h
index 7c2759118d13..630c298a730e 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.h
+++ b/drivers/net/wireless/zd1211rw/zd_mac.h
@@ -140,6 +140,21 @@ struct rx_status {
140#define ZD_RX_CRC16_ERROR 0x40 140#define ZD_RX_CRC16_ERROR 0x40
141#define ZD_RX_ERROR 0x80 141#define ZD_RX_ERROR 0x80
142 142
143struct tx_retry_rate {
144 int count; /* number of valid element in rate[] array */
145 int rate[10]; /* retry rates, described by an index in zd_rates[] */
146};
147
148struct tx_status {
149 u8 type; /* must always be 0x01 : USB_INT_TYPE */
150 u8 id; /* must always be 0xa0 : USB_INT_ID_RETRY_FAILED */
151 u8 rate;
152 u8 pad;
153 u8 mac[ETH_ALEN];
154 u8 retry;
155 u8 failure;
156} __attribute__((packed));
157
143enum mac_flags { 158enum mac_flags {
144 MAC_FIXED_CHANNEL = 0x01, 159 MAC_FIXED_CHANNEL = 0x01,
145}; 160};
@@ -150,7 +165,7 @@ struct housekeeping {
150 165
151#define ZD_MAC_STATS_BUFFER_SIZE 16 166#define ZD_MAC_STATS_BUFFER_SIZE 16
152 167
153#define ZD_MAC_MAX_ACK_WAITERS 10 168#define ZD_MAC_MAX_ACK_WAITERS 50
154 169
155struct zd_mac { 170struct zd_mac {
156 struct zd_chip chip; 171 struct zd_chip chip;
@@ -184,6 +199,12 @@ struct zd_mac {
184 199
185 /* whether to pass control frames to stack */ 200 /* whether to pass control frames to stack */
186 unsigned int pass_ctrl:1; 201 unsigned int pass_ctrl:1;
202
203 /* whether we have received a 802.11 ACK that is pending */
204 unsigned int ack_pending:1;
205
206 /* signal strength of the last 802.11 ACK received */
207 int ack_signal;
187}; 208};
188 209
189#define ZD_REGDOMAIN_FCC 0x10 210#define ZD_REGDOMAIN_FCC 0x10
@@ -279,7 +300,7 @@ int zd_mac_preinit_hw(struct ieee80211_hw *hw);
279int zd_mac_init_hw(struct ieee80211_hw *hw); 300int zd_mac_init_hw(struct ieee80211_hw *hw);
280 301
281int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length); 302int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length);
282void zd_mac_tx_failed(struct ieee80211_hw *hw); 303void zd_mac_tx_failed(struct urb *urb);
283void zd_mac_tx_to_dev(struct sk_buff *skb, int error); 304void zd_mac_tx_to_dev(struct sk_buff *skb, int error);
284 305
285#ifdef DEBUG 306#ifdef DEBUG
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c b/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
index 439799b84876..9e74eb1b67d5 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/slab.h>
22 23
23#include "zd_rf.h" 24#include "zd_rf.h"
24#include "zd_usb.h" 25#include "zd_usb.h"
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index 23a6a6d4863b..d91ad1a612af 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -24,6 +24,7 @@
24#include <linux/firmware.h> 24#include <linux/firmware.h>
25#include <linux/device.h> 25#include <linux/device.h>
26#include <linux/errno.h> 26#include <linux/errno.h>
27#include <linux/slab.h>
27#include <linux/skbuff.h> 28#include <linux/skbuff.h>
28#include <linux/usb.h> 29#include <linux/usb.h>
29#include <linux/workqueue.h> 30#include <linux/workqueue.h>
@@ -62,6 +63,7 @@ static struct usb_device_id usb_ids[] = {
62 { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 }, 63 { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 },
63 /* ZD1211B */ 64 /* ZD1211B */
64 { USB_DEVICE(0x0053, 0x5301), .driver_info = DEVICE_ZD1211B }, 65 { USB_DEVICE(0x0053, 0x5301), .driver_info = DEVICE_ZD1211B },
66 { USB_DEVICE(0x0409, 0x0248), .driver_info = DEVICE_ZD1211B },
65 { USB_DEVICE(0x0411, 0x00da), .driver_info = DEVICE_ZD1211B }, 67 { USB_DEVICE(0x0411, 0x00da), .driver_info = DEVICE_ZD1211B },
66 { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B }, 68 { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B },
67 { USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B }, 69 { USB_DEVICE(0x0471, 0x1237), .driver_info = DEVICE_ZD1211B },
@@ -318,6 +320,13 @@ error:
318 return r; 320 return r;
319} 321}
320 322
323MODULE_FIRMWARE(FW_ZD1211B_PREFIX "ur");
324MODULE_FIRMWARE(FW_ZD1211_PREFIX "ur");
325MODULE_FIRMWARE(FW_ZD1211B_PREFIX "ub");
326MODULE_FIRMWARE(FW_ZD1211_PREFIX "ub");
327MODULE_FIRMWARE(FW_ZD1211B_PREFIX "uphr");
328MODULE_FIRMWARE(FW_ZD1211_PREFIX "uphr");
329
321/* Read data from device address space using "firmware interface" which does 330/* Read data from device address space using "firmware interface" which does
322 * not require firmware to be loaded. */ 331 * not require firmware to be loaded. */
323int zd_usb_read_fw(struct zd_usb *usb, zd_addr_t addr, u8 *data, u16 len) 332int zd_usb_read_fw(struct zd_usb *usb, zd_addr_t addr, u8 *data, u16 len)
@@ -419,7 +428,7 @@ static void int_urb_complete(struct urb *urb)
419 handle_regs_int(urb); 428 handle_regs_int(urb);
420 break; 429 break;
421 case USB_INT_ID_RETRY_FAILED: 430 case USB_INT_ID_RETRY_FAILED:
422 zd_mac_tx_failed(zd_usb_to_hw(urb->context)); 431 zd_mac_tx_failed(urb);
423 break; 432 break;
424 default: 433 default:
425 dev_dbg_f(urb_dev(urb), "error: urb %p unknown id %x\n", urb, 434 dev_dbg_f(urb_dev(urb), "error: urb %p unknown id %x\n", urb,
@@ -553,6 +562,8 @@ static void handle_rx_packet(struct zd_usb *usb, const u8 *buffer,
553 562
554 if (length < sizeof(struct rx_length_info)) { 563 if (length < sizeof(struct rx_length_info)) {
555 /* It's not a complete packet anyhow. */ 564 /* It's not a complete packet anyhow. */
565 printk("%s: invalid, small RX packet : %d\n",
566 __func__, length);
556 return; 567 return;
557 } 568 }
558 length_info = (struct rx_length_info *) 569 length_info = (struct rx_length_info *)
@@ -1069,11 +1080,15 @@ static int eject_installer(struct usb_interface *intf)
1069 int r; 1080 int r;
1070 1081
1071 /* Find bulk out endpoint */ 1082 /* Find bulk out endpoint */
1072 endpoint = &iface_desc->endpoint[1].desc; 1083 for (r = 1; r >= 0; r--) {
1073 if (usb_endpoint_dir_out(endpoint) && 1084 endpoint = &iface_desc->endpoint[r].desc;
1074 usb_endpoint_xfer_bulk(endpoint)) { 1085 if (usb_endpoint_dir_out(endpoint) &&
1075 bulk_out_ep = endpoint->bEndpointAddress; 1086 usb_endpoint_xfer_bulk(endpoint)) {
1076 } else { 1087 bulk_out_ep = endpoint->bEndpointAddress;
1088 break;
1089 }
1090 }
1091 if (r == -1) {
1077 dev_err(&udev->dev, 1092 dev_err(&udev->dev,
1078 "zd1211rw: Could not find bulk out endpoint\n"); 1093 "zd1211rw: Could not find bulk out endpoint\n");
1079 return -ENODEV; 1094 return -ENODEV;