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-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.c126
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h158
-rw-r--r--drivers/net/wireless/zd1211rw/zd_def.h2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_ieee80211.h1
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf.h2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_types.h71
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.c128
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.h6
8 files changed, 172 insertions, 322 deletions
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index 78ea72fb8f0c..12dfc0b6efe6 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -84,6 +84,18 @@ static void print_id(struct zd_chip *chip)
84 dev_info(zd_chip_dev(chip), "%s\n", buffer); 84 dev_info(zd_chip_dev(chip), "%s\n", buffer);
85} 85}
86 86
87static zd_addr_t inc_addr(zd_addr_t addr)
88{
89 u16 a = (u16)addr;
90 /* Control registers use byte addressing, but everything else uses word
91 * addressing. */
92 if ((a & 0xf000) == CR_START)
93 a += 2;
94 else
95 a += 1;
96 return (zd_addr_t)a;
97}
98
87/* Read a variable number of 32-bit values. Parameter count is not allowed to 99/* Read a variable number of 32-bit values. Parameter count is not allowed to
88 * exceed USB_MAX_IOREAD32_COUNT. 100 * exceed USB_MAX_IOREAD32_COUNT.
89 */ 101 */
@@ -114,7 +126,7 @@ int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr
114 for (i = 0; i < count; i++) { 126 for (i = 0; i < count; i++) {
115 int j = 2*i; 127 int j = 2*i;
116 /* We read the high word always first. */ 128 /* We read the high word always first. */
117 a16[j] = zd_inc_word(addr[i]); 129 a16[j] = inc_addr(addr[i]);
118 a16[j+1] = addr[i]; 130 a16[j+1] = addr[i];
119 } 131 }
120 132
@@ -163,7 +175,7 @@ int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
163 j = 2*i; 175 j = 2*i;
164 /* We write the high word always first. */ 176 /* We write the high word always first. */
165 ioreqs16[j].value = ioreqs[i].value >> 16; 177 ioreqs16[j].value = ioreqs[i].value >> 16;
166 ioreqs16[j].addr = zd_inc_word(ioreqs[i].addr); 178 ioreqs16[j].addr = inc_addr(ioreqs[i].addr);
167 ioreqs16[j+1].value = ioreqs[i].value; 179 ioreqs16[j+1].value = ioreqs[i].value;
168 ioreqs16[j+1].addr = ioreqs[i].addr; 180 ioreqs16[j+1].addr = ioreqs[i].addr;
169 } 181 }
@@ -466,7 +478,8 @@ static int read_values(struct zd_chip *chip, u8 *values, size_t count,
466 478
467 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 479 ZD_ASSERT(mutex_is_locked(&chip->mutex));
468 for (i = 0;;) { 480 for (i = 0;;) {
469 r = zd_ioread32_locked(chip, &v, e2p_addr+i/2); 481 r = zd_ioread32_locked(chip, &v,
482 (zd_addr_t)((u16)e2p_addr+i/2));
470 if (r) 483 if (r)
471 return r; 484 return r;
472 v -= guard; 485 v -= guard;
@@ -798,47 +811,18 @@ static int hw_reset_phy(struct zd_chip *chip)
798static int zd1211_hw_init_hmac(struct zd_chip *chip) 811static int zd1211_hw_init_hmac(struct zd_chip *chip)
799{ 812{
800 static const struct zd_ioreq32 ioreqs[] = { 813 static const struct zd_ioreq32 ioreqs[] = {
801 { CR_ACK_TIMEOUT_EXT, 0x20 },
802 { CR_ADDA_MBIAS_WARMTIME, 0x30000808 },
803 { CR_ZD1211_RETRY_MAX, 0x2 }, 814 { CR_ZD1211_RETRY_MAX, 0x2 },
804 { CR_SNIFFER_ON, 0 },
805 { CR_RX_FILTER, STA_RX_FILTER },
806 { CR_GROUP_HASH_P1, 0x00 },
807 { CR_GROUP_HASH_P2, 0x80000000 },
808 { CR_REG1, 0xa4 },
809 { CR_ADDA_PWR_DWN, 0x7f },
810 { CR_BCN_PLCP_CFG, 0x00f00401 },
811 { CR_PHY_DELAY, 0x00 },
812 { CR_ACK_TIMEOUT_EXT, 0x80 },
813 { CR_ADDA_PWR_DWN, 0x00 },
814 { CR_ACK_TIME_80211, 0x100 },
815 { CR_RX_PE_DELAY, 0x70 },
816 { CR_PS_CTRL, 0x10000000 },
817 { CR_RTS_CTS_RATE, 0x02030203 },
818 { CR_RX_THRESHOLD, 0x000c0640 }, 815 { CR_RX_THRESHOLD, 0x000c0640 },
819 { CR_AFTER_PNP, 0x1 },
820 { CR_WEP_PROTECT, 0x114 },
821 }; 816 };
822 817
823 int r;
824
825 dev_dbg_f(zd_chip_dev(chip), "\n"); 818 dev_dbg_f(zd_chip_dev(chip), "\n");
826 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 819 ZD_ASSERT(mutex_is_locked(&chip->mutex));
827 r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 820 return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
828#ifdef DEBUG
829 if (r) {
830 dev_err(zd_chip_dev(chip),
831 "error in zd_iowrite32a_locked. Error number %d\n", r);
832 }
833#endif /* DEBUG */
834 return r;
835} 821}
836 822
837static int zd1211b_hw_init_hmac(struct zd_chip *chip) 823static int zd1211b_hw_init_hmac(struct zd_chip *chip)
838{ 824{
839 static const struct zd_ioreq32 ioreqs[] = { 825 static const struct zd_ioreq32 ioreqs[] = {
840 { CR_ACK_TIMEOUT_EXT, 0x20 },
841 { CR_ADDA_MBIAS_WARMTIME, 0x30000808 },
842 { CR_ZD1211B_RETRY_MAX, 0x02020202 }, 826 { CR_ZD1211B_RETRY_MAX, 0x02020202 },
843 { CR_ZD1211B_TX_PWR_CTL4, 0x007f003f }, 827 { CR_ZD1211B_TX_PWR_CTL4, 0x007f003f },
844 { CR_ZD1211B_TX_PWR_CTL3, 0x007f003f }, 828 { CR_ZD1211B_TX_PWR_CTL3, 0x007f003f },
@@ -847,6 +831,20 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
847 { CR_ZD1211B_AIFS_CTL1, 0x00280028 }, 831 { CR_ZD1211B_AIFS_CTL1, 0x00280028 },
848 { CR_ZD1211B_AIFS_CTL2, 0x008C003C }, 832 { CR_ZD1211B_AIFS_CTL2, 0x008C003C },
849 { CR_ZD1211B_TXOP, 0x01800824 }, 833 { CR_ZD1211B_TXOP, 0x01800824 },
834 { CR_RX_THRESHOLD, 0x000c0eff, },
835 };
836
837 dev_dbg_f(zd_chip_dev(chip), "\n");
838 ZD_ASSERT(mutex_is_locked(&chip->mutex));
839 return zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
840}
841
842static int hw_init_hmac(struct zd_chip *chip)
843{
844 int r;
845 static const struct zd_ioreq32 ioreqs[] = {
846 { CR_ACK_TIMEOUT_EXT, 0x20 },
847 { CR_ADDA_MBIAS_WARMTIME, 0x30000808 },
850 { CR_SNIFFER_ON, 0 }, 848 { CR_SNIFFER_ON, 0 },
851 { CR_RX_FILTER, STA_RX_FILTER }, 849 { CR_RX_FILTER, STA_RX_FILTER },
852 { CR_GROUP_HASH_P1, 0x00 }, 850 { CR_GROUP_HASH_P1, 0x00 },
@@ -861,25 +859,16 @@ static int zd1211b_hw_init_hmac(struct zd_chip *chip)
861 { CR_RX_PE_DELAY, 0x70 }, 859 { CR_RX_PE_DELAY, 0x70 },
862 { CR_PS_CTRL, 0x10000000 }, 860 { CR_PS_CTRL, 0x10000000 },
863 { CR_RTS_CTS_RATE, 0x02030203 }, 861 { CR_RTS_CTS_RATE, 0x02030203 },
864 { CR_RX_THRESHOLD, 0x000c0eff, },
865 { CR_AFTER_PNP, 0x1 }, 862 { CR_AFTER_PNP, 0x1 },
866 { CR_WEP_PROTECT, 0x114 }, 863 { CR_WEP_PROTECT, 0x114 },
864 { CR_IFS_VALUE, IFS_VALUE_DEFAULT },
867 }; 865 };
868 866
869 int r;
870
871 dev_dbg_f(zd_chip_dev(chip), "\n");
872 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 867 ZD_ASSERT(mutex_is_locked(&chip->mutex));
873 r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 868 r = zd_iowrite32a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
874 if (r) { 869 if (r)
875 dev_dbg_f(zd_chip_dev(chip), 870 return r;
876 "error in zd_iowrite32a_locked. Error number %d\n", r);
877 }
878 return r;
879}
880 871
881static int hw_init_hmac(struct zd_chip *chip)
882{
883 return chip->is_zd1211b ? 872 return chip->is_zd1211b ?
884 zd1211b_hw_init_hmac(chip) : zd1211_hw_init_hmac(chip); 873 zd1211b_hw_init_hmac(chip) : zd1211_hw_init_hmac(chip);
885} 874}
@@ -974,16 +963,14 @@ static int hw_init(struct zd_chip *chip)
974 if (r) 963 if (r)
975 return r; 964 return r;
976 965
977 /* Although the vendor driver defaults to a different value during
978 * init, it overwrites the IFS value with the following every time
979 * the channel changes. We should aim to be more intelligent... */
980 r = zd_iowrite32_locked(chip, IFS_VALUE_DEFAULT, CR_IFS_VALUE);
981 if (r)
982 return r;
983
984 return set_beacon_interval(chip, 100); 966 return set_beacon_interval(chip, 100);
985} 967}
986 968
969static zd_addr_t fw_reg_addr(struct zd_chip *chip, u16 offset)
970{
971 return (zd_addr_t)((u16)chip->fw_regs_base + offset);
972}
973
987#ifdef DEBUG 974#ifdef DEBUG
988static int dump_cr(struct zd_chip *chip, const zd_addr_t addr, 975static int dump_cr(struct zd_chip *chip, const zd_addr_t addr,
989 const char *addr_string) 976 const char *addr_string)
@@ -1018,9 +1005,11 @@ static int test_init(struct zd_chip *chip)
1018 1005
1019static void dump_fw_registers(struct zd_chip *chip) 1006static void dump_fw_registers(struct zd_chip *chip)
1020{ 1007{
1021 static const zd_addr_t addr[4] = { 1008 const zd_addr_t addr[4] = {
1022 FW_FIRMWARE_VER, FW_USB_SPEED, FW_FIX_TX_RATE, 1009 fw_reg_addr(chip, FW_REG_FIRMWARE_VER),
1023 FW_LINK_STATUS 1010 fw_reg_addr(chip, FW_REG_USB_SPEED),
1011 fw_reg_addr(chip, FW_REG_FIX_TX_RATE),
1012 fw_reg_addr(chip, FW_REG_LED_LINK_STATUS),
1024 }; 1013 };
1025 1014
1026 int r; 1015 int r;
@@ -1046,7 +1035,8 @@ static int print_fw_version(struct zd_chip *chip)
1046 int r; 1035 int r;
1047 u16 version; 1036 u16 version;
1048 1037
1049 r = zd_ioread16_locked(chip, &version, FW_FIRMWARE_VER); 1038 r = zd_ioread16_locked(chip, &version,
1039 fw_reg_addr(chip, FW_REG_FIRMWARE_VER));
1050 if (r) 1040 if (r)
1051 return r; 1041 return r;
1052 1042
@@ -1126,6 +1116,22 @@ int zd_chip_disable_hwint(struct zd_chip *chip)
1126 return r; 1116 return r;
1127} 1117}
1128 1118
1119static int read_fw_regs_offset(struct zd_chip *chip)
1120{
1121 int r;
1122
1123 ZD_ASSERT(mutex_is_locked(&chip->mutex));
1124 r = zd_ioread16_locked(chip, (u16*)&chip->fw_regs_base,
1125 FWRAW_REGS_ADDR);
1126 if (r)
1127 return r;
1128 dev_dbg_f(zd_chip_dev(chip), "fw_regs_base: %#06hx\n",
1129 (u16)chip->fw_regs_base);
1130
1131 return 0;
1132}
1133
1134
1129int zd_chip_init_hw(struct zd_chip *chip, u8 device_type) 1135int zd_chip_init_hw(struct zd_chip *chip, u8 device_type)
1130{ 1136{
1131 int r; 1137 int r;
@@ -1145,7 +1151,7 @@ int zd_chip_init_hw(struct zd_chip *chip, u8 device_type)
1145 if (r) 1151 if (r)
1146 goto out; 1152 goto out;
1147 1153
1148 r = zd_usb_init_hw(&chip->usb); 1154 r = read_fw_regs_offset(chip);
1149 if (r) 1155 if (r)
1150 goto out; 1156 goto out;
1151 1157
@@ -1325,15 +1331,15 @@ u8 zd_chip_get_channel(struct zd_chip *chip)
1325 1331
1326int zd_chip_control_leds(struct zd_chip *chip, enum led_status status) 1332int zd_chip_control_leds(struct zd_chip *chip, enum led_status status)
1327{ 1333{
1328 static const zd_addr_t a[] = { 1334 const zd_addr_t a[] = {
1329 FW_LINK_STATUS, 1335 fw_reg_addr(chip, FW_REG_LED_LINK_STATUS),
1330 CR_LED, 1336 CR_LED,
1331 }; 1337 };
1332 1338
1333 int r; 1339 int r;
1334 u16 v[ARRAY_SIZE(a)]; 1340 u16 v[ARRAY_SIZE(a)];
1335 struct zd_ioreq16 ioreqs[ARRAY_SIZE(a)] = { 1341 struct zd_ioreq16 ioreqs[ARRAY_SIZE(a)] = {
1336 [0] = { FW_LINK_STATUS }, 1342 [0] = { fw_reg_addr(chip, FW_REG_LED_LINK_STATUS) },
1337 [1] = { CR_LED }, 1343 [1] = { CR_LED },
1338 }; 1344 };
1339 u16 other_led; 1345 u16 other_led;
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index a4e3cee9b59d..b07569e391ee 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -18,7 +18,6 @@
18#ifndef _ZD_CHIP_H 18#ifndef _ZD_CHIP_H
19#define _ZD_CHIP_H 19#define _ZD_CHIP_H
20 20
21#include "zd_types.h"
22#include "zd_rf.h" 21#include "zd_rf.h"
23#include "zd_usb.h" 22#include "zd_usb.h"
24 23
@@ -27,6 +26,37 @@
27 * adds a processor for handling the USB protocol. 26 * adds a processor for handling the USB protocol.
28 */ 27 */
29 28
29/* Address space */
30enum {
31 /* CONTROL REGISTERS */
32 CR_START = 0x9000,
33
34
35 /* FIRMWARE */
36 FW_START = 0xee00,
37
38
39 /* EEPROM */
40 E2P_START = 0xf800,
41 E2P_LEN = 0x800,
42
43 /* EEPROM layout */
44 E2P_LOAD_CODE_LEN = 0xe, /* base 0xf800 */
45 E2P_LOAD_VECT_LEN = 0x9, /* base 0xf80e */
46 /* E2P_DATA indexes into this */
47 E2P_DATA_LEN = 0x7e, /* base 0xf817 */
48 E2P_BOOT_CODE_LEN = 0x760, /* base 0xf895 */
49 E2P_INTR_VECT_LEN = 0xb, /* base 0xfff5 */
50
51 /* Some precomputed offsets into the EEPROM */
52 E2P_DATA_OFFSET = E2P_LOAD_CODE_LEN + E2P_LOAD_VECT_LEN,
53 E2P_BOOT_CODE_OFFSET = E2P_DATA_OFFSET + E2P_DATA_LEN,
54};
55
56#define CTL_REG(offset) ((zd_addr_t)(CR_START + (offset)))
57#define E2P_DATA(offset) ((zd_addr_t)(E2P_START + E2P_DATA_OFFSET + (offset)))
58#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset)))
59
30/* 8-bit hardware registers */ 60/* 8-bit hardware registers */
31#define CR0 CTL_REG(0x0000) 61#define CR0 CTL_REG(0x0000)
32#define CR1 CTL_REG(0x0004) 62#define CR1 CTL_REG(0x0004)
@@ -302,7 +332,7 @@
302 332
303#define CR_MAX_PHY_REG 255 333#define CR_MAX_PHY_REG 255
304 334
305/* Taken from the ZYDAS driver, not all of them are relevant for the ZSD1211 335/* Taken from the ZYDAS driver, not all of them are relevant for the ZD1211
306 * driver. 336 * driver.
307 */ 337 */
308 338
@@ -594,81 +624,71 @@
594/* 624/*
595 * Upper 16 bit contains the regulatory domain. 625 * Upper 16 bit contains the regulatory domain.
596 */ 626 */
597#define E2P_SUBID E2P_REG(0x00) 627#define E2P_SUBID E2P_DATA(0x00)
598#define E2P_POD E2P_REG(0x02) 628#define E2P_POD E2P_DATA(0x02)
599#define E2P_MAC_ADDR_P1 E2P_REG(0x04) 629#define E2P_MAC_ADDR_P1 E2P_DATA(0x04)
600#define E2P_MAC_ADDR_P2 E2P_REG(0x06) 630#define E2P_MAC_ADDR_P2 E2P_DATA(0x06)
601#define E2P_PWR_CAL_VALUE1 E2P_REG(0x08) 631#define E2P_PWR_CAL_VALUE1 E2P_DATA(0x08)
602#define E2P_PWR_CAL_VALUE2 E2P_REG(0x0a) 632#define E2P_PWR_CAL_VALUE2 E2P_DATA(0x0a)
603#define E2P_PWR_CAL_VALUE3 E2P_REG(0x0c) 633#define E2P_PWR_CAL_VALUE3 E2P_DATA(0x0c)
604#define E2P_PWR_CAL_VALUE4 E2P_REG(0x0e) 634#define E2P_PWR_CAL_VALUE4 E2P_DATA(0x0e)
605#define E2P_PWR_INT_VALUE1 E2P_REG(0x10) 635#define E2P_PWR_INT_VALUE1 E2P_DATA(0x10)
606#define E2P_PWR_INT_VALUE2 E2P_REG(0x12) 636#define E2P_PWR_INT_VALUE2 E2P_DATA(0x12)
607#define E2P_PWR_INT_VALUE3 E2P_REG(0x14) 637#define E2P_PWR_INT_VALUE3 E2P_DATA(0x14)
608#define E2P_PWR_INT_VALUE4 E2P_REG(0x16) 638#define E2P_PWR_INT_VALUE4 E2P_DATA(0x16)
609 639
610/* Contains a bit for each allowed channel. It gives for Europe (ETSI 0x30) 640/* Contains a bit for each allowed channel. It gives for Europe (ETSI 0x30)
611 * also only 11 channels. */ 641 * also only 11 channels. */
612#define E2P_ALLOWED_CHANNEL E2P_REG(0x18) 642#define E2P_ALLOWED_CHANNEL E2P_DATA(0x18)
613 643
614#define E2P_PHY_REG E2P_REG(0x1a) 644#define E2P_PHY_REG E2P_DATA(0x1a)
615#define E2P_DEVICE_VER E2P_REG(0x20) 645#define E2P_DEVICE_VER E2P_DATA(0x20)
616#define E2P_36M_CAL_VALUE1 E2P_REG(0x28) 646#define E2P_36M_CAL_VALUE1 E2P_DATA(0x28)
617#define E2P_36M_CAL_VALUE2 E2P_REG(0x2a) 647#define E2P_36M_CAL_VALUE2 E2P_DATA(0x2a)
618#define E2P_36M_CAL_VALUE3 E2P_REG(0x2c) 648#define E2P_36M_CAL_VALUE3 E2P_DATA(0x2c)
619#define E2P_36M_CAL_VALUE4 E2P_REG(0x2e) 649#define E2P_36M_CAL_VALUE4 E2P_DATA(0x2e)
620#define E2P_11A_INT_VALUE1 E2P_REG(0x30) 650#define E2P_11A_INT_VALUE1 E2P_DATA(0x30)
621#define E2P_11A_INT_VALUE2 E2P_REG(0x32) 651#define E2P_11A_INT_VALUE2 E2P_DATA(0x32)
622#define E2P_11A_INT_VALUE3 E2P_REG(0x34) 652#define E2P_11A_INT_VALUE3 E2P_DATA(0x34)
623#define E2P_11A_INT_VALUE4 E2P_REG(0x36) 653#define E2P_11A_INT_VALUE4 E2P_DATA(0x36)
624#define E2P_48M_CAL_VALUE1 E2P_REG(0x38) 654#define E2P_48M_CAL_VALUE1 E2P_DATA(0x38)
625#define E2P_48M_CAL_VALUE2 E2P_REG(0x3a) 655#define E2P_48M_CAL_VALUE2 E2P_DATA(0x3a)
626#define E2P_48M_CAL_VALUE3 E2P_REG(0x3c) 656#define E2P_48M_CAL_VALUE3 E2P_DATA(0x3c)
627#define E2P_48M_CAL_VALUE4 E2P_REG(0x3e) 657#define E2P_48M_CAL_VALUE4 E2P_DATA(0x3e)
628#define E2P_48M_INT_VALUE1 E2P_REG(0x40) 658#define E2P_48M_INT_VALUE1 E2P_DATA(0x40)
629#define E2P_48M_INT_VALUE2 E2P_REG(0x42) 659#define E2P_48M_INT_VALUE2 E2P_DATA(0x42)
630#define E2P_48M_INT_VALUE3 E2P_REG(0x44) 660#define E2P_48M_INT_VALUE3 E2P_DATA(0x44)
631#define E2P_48M_INT_VALUE4 E2P_REG(0x46) 661#define E2P_48M_INT_VALUE4 E2P_DATA(0x46)
632#define E2P_54M_CAL_VALUE1 E2P_REG(0x48) /* ??? */ 662#define E2P_54M_CAL_VALUE1 E2P_DATA(0x48) /* ??? */
633#define E2P_54M_CAL_VALUE2 E2P_REG(0x4a) 663#define E2P_54M_CAL_VALUE2 E2P_DATA(0x4a)
634#define E2P_54M_CAL_VALUE3 E2P_REG(0x4c) 664#define E2P_54M_CAL_VALUE3 E2P_DATA(0x4c)
635#define E2P_54M_CAL_VALUE4 E2P_REG(0x4e) 665#define E2P_54M_CAL_VALUE4 E2P_DATA(0x4e)
636#define E2P_54M_INT_VALUE1 E2P_REG(0x50) 666#define E2P_54M_INT_VALUE1 E2P_DATA(0x50)
637#define E2P_54M_INT_VALUE2 E2P_REG(0x52) 667#define E2P_54M_INT_VALUE2 E2P_DATA(0x52)
638#define E2P_54M_INT_VALUE3 E2P_REG(0x54) 668#define E2P_54M_INT_VALUE3 E2P_DATA(0x54)
639#define E2P_54M_INT_VALUE4 E2P_REG(0x56) 669#define E2P_54M_INT_VALUE4 E2P_DATA(0x56)
640 670
641/* All 16 bit values */ 671/* This word contains the base address of the FW_REG_ registers below */
642#define FW_FIRMWARE_VER FW_REG(0) 672#define FWRAW_REGS_ADDR FWRAW_DATA(0x1d)
643/* non-zero if USB high speed connection */ 673
644#define FW_USB_SPEED FW_REG(1) 674/* All 16 bit values, offset from the address in FWRAW_REGS_ADDR */
645#define FW_FIX_TX_RATE FW_REG(2) 675enum {
646/* Seems to be able to control LEDs over the firmware */ 676 FW_REG_FIRMWARE_VER = 0,
647#define FW_LINK_STATUS FW_REG(3) 677 /* non-zero if USB high speed connection */
648#define FW_SOFT_RESET FW_REG(4) 678 FW_REG_USB_SPEED = 1,
649#define FW_FLASH_CHK FW_REG(5) 679 FW_REG_FIX_TX_RATE = 2,
680 /* Seems to be able to control LEDs over the firmware */
681 FW_REG_LED_LINK_STATUS = 3,
682 FW_REG_SOFT_RESET = 4,
683 FW_REG_FLASH_CHK = 5,
684};
650 685
686/* Values for FW_LINK_STATUS */
651#define FW_LINK_OFF 0x0 687#define FW_LINK_OFF 0x0
652#define FW_LINK_TX 0x1 688#define FW_LINK_TX 0x1
653/* 0x2 - link led on? */ 689/* 0x2 - link led on? */
654 690
655enum { 691enum {
656 CR_BASE_OFFSET = 0x9000,
657 FW_START_OFFSET = 0xee00,
658 FW_BASE_ADDR_OFFSET = FW_START_OFFSET + 0x1d,
659 EEPROM_START_OFFSET = 0xf800,
660 EEPROM_SIZE = 0x800, /* words */
661 LOAD_CODE_SIZE = 0xe, /* words */
662 LOAD_VECT_SIZE = 0x10000 - 0xfff7, /* words */
663 EEPROM_REGS_OFFSET = LOAD_CODE_SIZE + LOAD_VECT_SIZE,
664 EEPROM_REGS_SIZE = 0x7e, /* words */
665 E2P_BASE_OFFSET = EEPROM_START_OFFSET +
666 EEPROM_REGS_OFFSET,
667};
668
669#define FW_REG_TABLE_ADDR USB_ADDR(FW_START_OFFSET + 0x1d)
670
671enum {
672 /* indices for ofdm_cal_values */ 692 /* indices for ofdm_cal_values */
673 OFDM_36M_INDEX = 0, 693 OFDM_36M_INDEX = 0,
674 OFDM_48M_INDEX = 1, 694 OFDM_48M_INDEX = 1,
@@ -679,6 +699,8 @@ struct zd_chip {
679 struct zd_usb usb; 699 struct zd_usb usb;
680 struct zd_rf rf; 700 struct zd_rf rf;
681 struct mutex mutex; 701 struct mutex mutex;
702 /* Base address of FW_REG_ registers */
703 zd_addr_t fw_regs_base;
682 u8 e2p_mac[ETH_ALEN]; 704 u8 e2p_mac[ETH_ALEN];
683 /* EepSetPoint in the vendor driver */ 705 /* EepSetPoint in the vendor driver */
684 u8 pwr_cal_values[E2P_CHANNEL_COUNT]; 706 u8 pwr_cal_values[E2P_CHANNEL_COUNT];
diff --git a/drivers/net/wireless/zd1211rw/zd_def.h b/drivers/net/wireless/zd1211rw/zd_def.h
index fb22f62cf1f3..deb99d1eaa77 100644
--- a/drivers/net/wireless/zd1211rw/zd_def.h
+++ b/drivers/net/wireless/zd1211rw/zd_def.h
@@ -23,6 +23,8 @@
23#include <linux/device.h> 23#include <linux/device.h>
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25 25
26typedef u16 __nocast zd_addr_t;
27
26#define dev_printk_f(level, dev, fmt, args...) \ 28#define dev_printk_f(level, dev, fmt, args...) \
27 dev_printk(level, dev, "%s() " fmt, __func__, ##args) 29 dev_printk(level, dev, "%s() " fmt, __func__, ##args)
28 30
diff --git a/drivers/net/wireless/zd1211rw/zd_ieee80211.h b/drivers/net/wireless/zd1211rw/zd_ieee80211.h
index 26b8298dff8c..c4f36d39642b 100644
--- a/drivers/net/wireless/zd1211rw/zd_ieee80211.h
+++ b/drivers/net/wireless/zd1211rw/zd_ieee80211.h
@@ -2,7 +2,6 @@
2#define _ZD_IEEE80211_H 2#define _ZD_IEEE80211_H
3 3
4#include <net/ieee80211.h> 4#include <net/ieee80211.h>
5#include "zd_types.h"
6 5
7/* Additional definitions from the standards. 6/* Additional definitions from the standards.
8 */ 7 */
diff --git a/drivers/net/wireless/zd1211rw/zd_rf.h b/drivers/net/wireless/zd1211rw/zd_rf.h
index 676b3734f1ed..a57732eb69e1 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf.h
+++ b/drivers/net/wireless/zd1211rw/zd_rf.h
@@ -18,8 +18,6 @@
18#ifndef _ZD_RF_H 18#ifndef _ZD_RF_H
19#define _ZD_RF_H 19#define _ZD_RF_H
20 20
21#include "zd_types.h"
22
23#define UW2451_RF 0x2 21#define UW2451_RF 0x2
24#define UCHIP_RF 0x3 22#define UCHIP_RF 0x3
25#define AL2230_RF 0x4 23#define AL2230_RF 0x4
diff --git a/drivers/net/wireless/zd1211rw/zd_types.h b/drivers/net/wireless/zd1211rw/zd_types.h
deleted file mode 100644
index 0155a1584ed3..000000000000
--- a/drivers/net/wireless/zd1211rw/zd_types.h
+++ /dev/null
@@ -1,71 +0,0 @@
1/* zd_types.h
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16 */
17
18#ifndef _ZD_TYPES_H
19#define _ZD_TYPES_H
20
21#include <linux/types.h>
22
23/* We have three register spaces mapped into the overall USB address space of
24 * 64K words (16-bit values). There is the control register space of
25 * double-word registers, the eeprom register space and the firmware register
26 * space. The control register space is byte mapped, the others are word
27 * mapped.
28 *
29 * For that reason, we are using byte offsets for control registers and word
30 * offsets for everything else.
31 */
32
33typedef u32 __nocast zd_addr_t;
34
35enum {
36 ADDR_BASE_MASK = 0xff000000,
37 ADDR_OFFSET_MASK = 0x0000ffff,
38 ADDR_ZERO_MASK = 0x00ff0000,
39 NULL_BASE = 0x00000000,
40 USB_BASE = 0x01000000,
41 CR_BASE = 0x02000000,
42 CR_MAX_OFFSET = 0x0b30,
43 E2P_BASE = 0x03000000,
44 E2P_MAX_OFFSET = 0x007e,
45 FW_BASE = 0x04000000,
46 FW_MAX_OFFSET = 0x0005,
47};
48
49#define ZD_ADDR_BASE(addr) ((u32)(addr) & ADDR_BASE_MASK)
50#define ZD_OFFSET(addr) ((u32)(addr) & ADDR_OFFSET_MASK)
51
52#define ZD_ADDR(base, offset) \
53 ((zd_addr_t)(((base) & ADDR_BASE_MASK) | ((offset) & ADDR_OFFSET_MASK)))
54
55#define ZD_NULL_ADDR ((zd_addr_t)0)
56#define USB_REG(offset) ZD_ADDR(USB_BASE, offset) /* word addressing */
57#define CTL_REG(offset) ZD_ADDR(CR_BASE, offset) /* byte addressing */
58#define E2P_REG(offset) ZD_ADDR(E2P_BASE, offset) /* word addressing */
59#define FW_REG(offset) ZD_ADDR(FW_BASE, offset) /* word addressing */
60
61static inline zd_addr_t zd_inc_word(zd_addr_t addr)
62{
63 u32 base = ZD_ADDR_BASE(addr);
64 u32 offset = ZD_OFFSET(addr);
65
66 offset += base == CR_BASE ? 2 : 1;
67
68 return base | offset;
69}
70
71#endif /* _ZD_TYPES_H */
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index a3217a8d37c4..aac8a1c5ba08 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -58,6 +58,10 @@ static struct usb_device_id usb_ids[] = {
58 { USB_DEVICE(0x079b, 0x0062), .driver_info = DEVICE_ZD1211B }, 58 { USB_DEVICE(0x079b, 0x0062), .driver_info = DEVICE_ZD1211B },
59 { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B }, 59 { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B },
60 { USB_DEVICE(0x050d, 0x705c), .driver_info = DEVICE_ZD1211B }, 60 { USB_DEVICE(0x050d, 0x705c), .driver_info = DEVICE_ZD1211B },
61 { USB_DEVICE(0x083a, 0x4505), .driver_info = DEVICE_ZD1211B },
62 { USB_DEVICE(0x0471, 0x1236), .driver_info = DEVICE_ZD1211B },
63 { USB_DEVICE(0x13b1, 0x0024), .driver_info = DEVICE_ZD1211B },
64 { USB_DEVICE(0x0586, 0x340f), .driver_info = DEVICE_ZD1211B },
61 /* "Driverless" devices that need ejecting */ 65 /* "Driverless" devices that need ejecting */
62 { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER }, 66 { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER },
63 {} 67 {}
@@ -73,96 +77,6 @@ MODULE_DEVICE_TABLE(usb, usb_ids);
73#define FW_ZD1211_PREFIX "zd1211/zd1211_" 77#define FW_ZD1211_PREFIX "zd1211/zd1211_"
74#define FW_ZD1211B_PREFIX "zd1211/zd1211b_" 78#define FW_ZD1211B_PREFIX "zd1211/zd1211b_"
75 79
76/* register address handling */
77
78#ifdef DEBUG
79static int check_addr(struct zd_usb *usb, zd_addr_t addr)
80{
81 u32 base = ZD_ADDR_BASE(addr);
82 u32 offset = ZD_OFFSET(addr);
83
84 if ((u32)addr & ADDR_ZERO_MASK)
85 goto invalid_address;
86 switch (base) {
87 case USB_BASE:
88 break;
89 case CR_BASE:
90 if (offset > CR_MAX_OFFSET) {
91 dev_dbg(zd_usb_dev(usb),
92 "CR offset %#010x larger than"
93 " CR_MAX_OFFSET %#10x\n",
94 offset, CR_MAX_OFFSET);
95 goto invalid_address;
96 }
97 if (offset & 1) {
98 dev_dbg(zd_usb_dev(usb),
99 "CR offset %#010x is not a multiple of 2\n",
100 offset);
101 goto invalid_address;
102 }
103 break;
104 case E2P_BASE:
105 if (offset > E2P_MAX_OFFSET) {
106 dev_dbg(zd_usb_dev(usb),
107 "E2P offset %#010x larger than"
108 " E2P_MAX_OFFSET %#010x\n",
109 offset, E2P_MAX_OFFSET);
110 goto invalid_address;
111 }
112 break;
113 case FW_BASE:
114 if (!usb->fw_base_offset) {
115 dev_dbg(zd_usb_dev(usb),
116 "ERROR: fw base offset has not been set\n");
117 return -EAGAIN;
118 }
119 if (offset > FW_MAX_OFFSET) {
120 dev_dbg(zd_usb_dev(usb),
121 "FW offset %#10x is larger than"
122 " FW_MAX_OFFSET %#010x\n",
123 offset, FW_MAX_OFFSET);
124 goto invalid_address;
125 }
126 break;
127 default:
128 dev_dbg(zd_usb_dev(usb),
129 "address has unsupported base %#010x\n", addr);
130 goto invalid_address;
131 }
132
133 return 0;
134invalid_address:
135 dev_dbg(zd_usb_dev(usb),
136 "ERROR: invalid address: %#010x\n", addr);
137 return -EINVAL;
138}
139#endif /* DEBUG */
140
141static u16 usb_addr(struct zd_usb *usb, zd_addr_t addr)
142{
143 u32 base;
144 u16 offset;
145
146 base = ZD_ADDR_BASE(addr);
147 offset = ZD_OFFSET(addr);
148
149 ZD_ASSERT(check_addr(usb, addr) == 0);
150
151 switch (base) {
152 case CR_BASE:
153 offset += CR_BASE_OFFSET;
154 break;
155 case E2P_BASE:
156 offset += E2P_BASE_OFFSET;
157 break;
158 case FW_BASE:
159 offset += usb->fw_base_offset;
160 break;
161 }
162
163 return offset;
164}
165
166/* USB device initialization */ 80/* USB device initialization */
167 81
168static int request_fw_file( 82static int request_fw_file(
@@ -295,14 +209,13 @@ static int handle_version_mismatch(struct usb_device *udev, u8 device_type,
295 if (r) 209 if (r)
296 goto error; 210 goto error;
297 211
298 r = upload_code(udev, ur_fw->data, ur_fw->size, FW_START_OFFSET, 212 r = upload_code(udev, ur_fw->data, ur_fw->size, FW_START, REBOOT);
299 REBOOT);
300 if (r) 213 if (r)
301 goto error; 214 goto error;
302 215
303 offset = ((EEPROM_REGS_OFFSET + EEPROM_REGS_SIZE) * sizeof(u16)); 216 offset = (E2P_BOOT_CODE_OFFSET * sizeof(u16));
304 r = upload_code(udev, ub_fw->data + offset, ub_fw->size - offset, 217 r = upload_code(udev, ub_fw->data + offset, ub_fw->size - offset,
305 E2P_BASE_OFFSET + EEPROM_REGS_SIZE, REBOOT); 218 E2P_START + E2P_BOOT_CODE_OFFSET, REBOOT);
306 219
307 /* At this point, the vendor driver downloads the whole firmware 220 /* At this point, the vendor driver downloads the whole firmware
308 * image, hacks around with version IDs, and uploads it again, 221 * image, hacks around with version IDs, and uploads it again,
@@ -331,7 +244,7 @@ static int upload_firmware(struct usb_device *udev, u8 device_type)
331 if (r) 244 if (r)
332 goto error; 245 goto error;
333 246
334 fw_bcdDevice = get_word(ub_fw->data, EEPROM_REGS_OFFSET); 247 fw_bcdDevice = get_word(ub_fw->data, E2P_DATA_OFFSET);
335 248
336 if (fw_bcdDevice != bcdDevice) { 249 if (fw_bcdDevice != bcdDevice) {
337 dev_info(&udev->dev, 250 dev_info(&udev->dev,
@@ -357,8 +270,7 @@ static int upload_firmware(struct usb_device *udev, u8 device_type)
357 if (r) 270 if (r)
358 goto error; 271 goto error;
359 272
360 r = upload_code(udev, uph_fw->data, uph_fw->size, FW_START_OFFSET, 273 r = upload_code(udev, uph_fw->data, uph_fw->size, FW_START, REBOOT);
361 REBOOT);
362 if (r) { 274 if (r) {
363 dev_err(&udev->dev, 275 dev_err(&udev->dev,
364 "Could not upload firmware code uph. Error number %d\n", 276 "Could not upload firmware code uph. Error number %d\n",
@@ -867,7 +779,7 @@ static inline void init_usb_interrupt(struct zd_usb *usb)
867 spin_lock_init(&intr->lock); 779 spin_lock_init(&intr->lock);
868 intr->interval = int_urb_interval(zd_usb_to_usbdev(usb)); 780 intr->interval = int_urb_interval(zd_usb_to_usbdev(usb));
869 init_completion(&intr->read_regs.completion); 781 init_completion(&intr->read_regs.completion);
870 intr->read_regs.cr_int_addr = cpu_to_le16(usb_addr(usb, CR_INTERRUPT)); 782 intr->read_regs.cr_int_addr = cpu_to_le16((u16)CR_INTERRUPT);
871} 783}
872 784
873static inline void init_usb_rx(struct zd_usb *usb) 785static inline void init_usb_rx(struct zd_usb *usb)
@@ -899,22 +811,6 @@ void zd_usb_init(struct zd_usb *usb, struct net_device *netdev,
899 init_usb_rx(usb); 811 init_usb_rx(usb);
900} 812}
901 813
902int zd_usb_init_hw(struct zd_usb *usb)
903{
904 int r;
905 struct zd_chip *chip = zd_usb_to_chip(usb);
906
907 ZD_ASSERT(mutex_is_locked(&chip->mutex));
908 r = zd_ioread16_locked(chip, &usb->fw_base_offset,
909 USB_REG((u16)FW_BASE_ADDR_OFFSET));
910 if (r)
911 return r;
912 dev_dbg_f(zd_usb_dev(usb), "fw_base_offset: %#06hx\n",
913 usb->fw_base_offset);
914
915 return 0;
916}
917
918void zd_usb_clear(struct zd_usb *usb) 814void zd_usb_clear(struct zd_usb *usb)
919{ 815{
920 usb_set_intfdata(usb->intf, NULL); 816 usb_set_intfdata(usb->intf, NULL);
@@ -1265,7 +1161,7 @@ int zd_usb_ioread16v(struct zd_usb *usb, u16 *values,
1265 return -ENOMEM; 1161 return -ENOMEM;
1266 req->id = cpu_to_le16(USB_REQ_READ_REGS); 1162 req->id = cpu_to_le16(USB_REQ_READ_REGS);
1267 for (i = 0; i < count; i++) 1163 for (i = 0; i < count; i++)
1268 req->addr[i] = cpu_to_le16(usb_addr(usb, addresses[i])); 1164 req->addr[i] = cpu_to_le16((u16)addresses[i]);
1269 1165
1270 udev = zd_usb_to_usbdev(usb); 1166 udev = zd_usb_to_usbdev(usb);
1271 prepare_read_regs_int(usb); 1167 prepare_read_regs_int(usb);
@@ -1330,7 +1226,7 @@ int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
1330 req->id = cpu_to_le16(USB_REQ_WRITE_REGS); 1226 req->id = cpu_to_le16(USB_REQ_WRITE_REGS);
1331 for (i = 0; i < count; i++) { 1227 for (i = 0; i < count; i++) {
1332 struct reg_data *rw = &req->reg_writes[i]; 1228 struct reg_data *rw = &req->reg_writes[i];
1333 rw->addr = cpu_to_le16(usb_addr(usb, ioreqs[i].addr)); 1229 rw->addr = cpu_to_le16((u16)ioreqs[i].addr);
1334 rw->value = cpu_to_le16(ioreqs[i].value); 1230 rw->value = cpu_to_le16(ioreqs[i].value);
1335 } 1231 }
1336 1232
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.h b/drivers/net/wireless/zd1211rw/zd_usb.h
index 317d37c36679..506ea6a74393 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.h
+++ b/drivers/net/wireless/zd1211rw/zd_usb.h
@@ -25,7 +25,6 @@
25#include <linux/usb.h> 25#include <linux/usb.h>
26 26
27#include "zd_def.h" 27#include "zd_def.h"
28#include "zd_types.h"
29 28
30enum devicetype { 29enum devicetype {
31 DEVICE_ZD1211 = 0, 30 DEVICE_ZD1211 = 0,
@@ -181,15 +180,14 @@ struct zd_usb_tx {
181 spinlock_t lock; 180 spinlock_t lock;
182}; 181};
183 182
184/* Contains the usb parts. The structure doesn't require a lock, because intf 183/* Contains the usb parts. The structure doesn't require a lock because intf
185 * and fw_base_offset, will not be changed after initialization. 184 * will not be changed after initialization.
186 */ 185 */
187struct zd_usb { 186struct zd_usb {
188 struct zd_usb_interrupt intr; 187 struct zd_usb_interrupt intr;
189 struct zd_usb_rx rx; 188 struct zd_usb_rx rx;
190 struct zd_usb_tx tx; 189 struct zd_usb_tx tx;
191 struct usb_interface *intf; 190 struct usb_interface *intf;
192 u16 fw_base_offset;
193}; 191};
194 192
195#define zd_usb_dev(usb) (&usb->intf->dev) 193#define zd_usb_dev(usb) (&usb->intf->dev)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-23 20:32:27 -0500