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diff --git a/drivers/net/wireless/wl12xx/wl12xx.h b/drivers/net/wireless/wl12xx/wl12xx.h
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1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 1998-2009 Texas Instruments. All rights reserved.
5 * Copyright (C) 2008-2009 Nokia Corporation
6 *
7 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
21 * 02110-1301 USA
22 *
23 */
24
25#ifndef __WL12XX_H__
26#define __WL12XX_H__
27
28#include <linux/mutex.h>
29#include <linux/completion.h>
30#include <linux/spinlock.h>
31#include <linux/list.h>
32#include <linux/bitops.h>
33#include <net/mac80211.h>
34
35#include "conf.h"
36#include "ini.h"
37
38#define DRIVER_NAME "wl1271"
39#define DRIVER_PREFIX DRIVER_NAME ": "
40
41enum {
42 DEBUG_NONE = 0,
43 DEBUG_IRQ = BIT(0),
44 DEBUG_SPI = BIT(1),
45 DEBUG_BOOT = BIT(2),
46 DEBUG_MAILBOX = BIT(3),
47 DEBUG_TESTMODE = BIT(4),
48 DEBUG_EVENT = BIT(5),
49 DEBUG_TX = BIT(6),
50 DEBUG_RX = BIT(7),
51 DEBUG_SCAN = BIT(8),
52 DEBUG_CRYPT = BIT(9),
53 DEBUG_PSM = BIT(10),
54 DEBUG_MAC80211 = BIT(11),
55 DEBUG_CMD = BIT(12),
56 DEBUG_ACX = BIT(13),
57 DEBUG_SDIO = BIT(14),
58 DEBUG_FILTERS = BIT(15),
59 DEBUG_ADHOC = BIT(16),
60 DEBUG_ALL = ~0,
61};
62
63#define DEBUG_LEVEL (DEBUG_NONE)
64
65#define DEBUG_DUMP_LIMIT 1024
66
67#define wl1271_error(fmt, arg...) \
68 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
69
70#define wl1271_warning(fmt, arg...) \
71 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
72
73#define wl1271_notice(fmt, arg...) \
74 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
75
76#define wl1271_info(fmt, arg...) \
77 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg)
78
79#define wl1271_debug(level, fmt, arg...) \
80 do { \
81 if (level & DEBUG_LEVEL) \
82 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
83 } while (0)
84
85#define wl1271_dump(level, prefix, buf, len) \
86 do { \
87 if (level & DEBUG_LEVEL) \
88 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
89 DUMP_PREFIX_OFFSET, 16, 1, \
90 buf, \
91 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
92 0); \
93 } while (0)
94
95#define wl1271_dump_ascii(level, prefix, buf, len) \
96 do { \
97 if (level & DEBUG_LEVEL) \
98 print_hex_dump(KERN_DEBUG, DRIVER_PREFIX prefix, \
99 DUMP_PREFIX_OFFSET, 16, 1, \
100 buf, \
101 min_t(size_t, len, DEBUG_DUMP_LIMIT), \
102 true); \
103 } while (0)
104
105#define WL1271_DEFAULT_RX_CONFIG (CFG_UNI_FILTER_EN | \
106 CFG_BSSID_FILTER_EN | \
107 CFG_MC_FILTER_EN)
108
109#define WL1271_DEFAULT_RX_FILTER (CFG_RX_RCTS_ACK | CFG_RX_PRSP_EN | \
110 CFG_RX_MGMT_EN | CFG_RX_DATA_EN | \
111 CFG_RX_CTL_EN | CFG_RX_BCN_EN | \
112 CFG_RX_AUTH_EN | CFG_RX_ASSOC_EN)
113
114#define WL1271_FW_NAME "wl1271-fw.bin"
115#define WL1271_NVS_NAME "wl1271-nvs.bin"
116
117#define WL1271_TX_SECURITY_LO16(s) ((u16)((s) & 0xffff))
118#define WL1271_TX_SECURITY_HI32(s) ((u32)(((s) >> 16) & 0xffffffff))
119
120#define WL1271_CIPHER_SUITE_GEM 0x00147201
121
122#define WL1271_BUSY_WORD_CNT 1
123#define WL1271_BUSY_WORD_LEN (WL1271_BUSY_WORD_CNT * sizeof(u32))
124
125#define WL1271_ELP_HW_STATE_ASLEEP 0
126#define WL1271_ELP_HW_STATE_IRQ 1
127
128#define WL1271_DEFAULT_BEACON_INT 100
129#define WL1271_DEFAULT_DTIM_PERIOD 1
130
131#define ACX_TX_DESCRIPTORS 32
132
133#define WL1271_AGGR_BUFFER_SIZE (4 * PAGE_SIZE)
134
135enum wl1271_state {
136 WL1271_STATE_OFF,
137 WL1271_STATE_ON,
138 WL1271_STATE_PLT,
139};
140
141enum wl1271_partition_type {
142 PART_DOWN,
143 PART_WORK,
144 PART_DRPW,
145
146 PART_TABLE_LEN
147};
148
149struct wl1271_partition {
150 u32 size;
151 u32 start;
152};
153
154struct wl1271_partition_set {
155 struct wl1271_partition mem;
156 struct wl1271_partition reg;
157 struct wl1271_partition mem2;
158 struct wl1271_partition mem3;
159};
160
161struct wl1271;
162
163/* FIXME: I'm not sure about this structure name */
164struct wl1271_chip {
165 u32 id;
166 char fw_ver[21];
167};
168
169struct wl1271_stats {
170 struct acx_statistics *fw_stats;
171 unsigned long fw_stats_update;
172
173 unsigned int retry_count;
174 unsigned int excessive_retries;
175};
176
177struct wl1271_debugfs {
178 struct dentry *rootdir;
179 struct dentry *fw_statistics;
180
181 struct dentry *tx_internal_desc_overflow;
182
183 struct dentry *rx_out_of_mem;
184 struct dentry *rx_hdr_overflow;
185 struct dentry *rx_hw_stuck;
186 struct dentry *rx_dropped;
187 struct dentry *rx_fcs_err;
188 struct dentry *rx_xfr_hint_trig;
189 struct dentry *rx_path_reset;
190 struct dentry *rx_reset_counter;
191
192 struct dentry *dma_rx_requested;
193 struct dentry *dma_rx_errors;
194 struct dentry *dma_tx_requested;
195 struct dentry *dma_tx_errors;
196
197 struct dentry *isr_cmd_cmplt;
198 struct dentry *isr_fiqs;
199 struct dentry *isr_rx_headers;
200 struct dentry *isr_rx_mem_overflow;
201 struct dentry *isr_rx_rdys;
202 struct dentry *isr_irqs;
203 struct dentry *isr_tx_procs;
204 struct dentry *isr_decrypt_done;
205 struct dentry *isr_dma0_done;
206 struct dentry *isr_dma1_done;
207 struct dentry *isr_tx_exch_complete;
208 struct dentry *isr_commands;
209 struct dentry *isr_rx_procs;
210 struct dentry *isr_hw_pm_mode_changes;
211 struct dentry *isr_host_acknowledges;
212 struct dentry *isr_pci_pm;
213 struct dentry *isr_wakeups;
214 struct dentry *isr_low_rssi;
215
216 struct dentry *wep_addr_key_count;
217 struct dentry *wep_default_key_count;
218 /* skipping wep.reserved */
219 struct dentry *wep_key_not_found;
220 struct dentry *wep_decrypt_fail;
221 struct dentry *wep_packets;
222 struct dentry *wep_interrupt;
223
224 struct dentry *pwr_ps_enter;
225 struct dentry *pwr_elp_enter;
226 struct dentry *pwr_missing_bcns;
227 struct dentry *pwr_wake_on_host;
228 struct dentry *pwr_wake_on_timer_exp;
229 struct dentry *pwr_tx_with_ps;
230 struct dentry *pwr_tx_without_ps;
231 struct dentry *pwr_rcvd_beacons;
232 struct dentry *pwr_power_save_off;
233 struct dentry *pwr_enable_ps;
234 struct dentry *pwr_disable_ps;
235 struct dentry *pwr_fix_tsf_ps;
236 /* skipping cont_miss_bcns_spread for now */
237 struct dentry *pwr_rcvd_awake_beacons;
238
239 struct dentry *mic_rx_pkts;
240 struct dentry *mic_calc_failure;
241
242 struct dentry *aes_encrypt_fail;
243 struct dentry *aes_decrypt_fail;
244 struct dentry *aes_encrypt_packets;
245 struct dentry *aes_decrypt_packets;
246 struct dentry *aes_encrypt_interrupt;
247 struct dentry *aes_decrypt_interrupt;
248
249 struct dentry *event_heart_beat;
250 struct dentry *event_calibration;
251 struct dentry *event_rx_mismatch;
252 struct dentry *event_rx_mem_empty;
253 struct dentry *event_rx_pool;
254 struct dentry *event_oom_late;
255 struct dentry *event_phy_transmit_error;
256 struct dentry *event_tx_stuck;
257
258 struct dentry *ps_pspoll_timeouts;
259 struct dentry *ps_upsd_timeouts;
260 struct dentry *ps_upsd_max_sptime;
261 struct dentry *ps_upsd_max_apturn;
262 struct dentry *ps_pspoll_max_apturn;
263 struct dentry *ps_pspoll_utilization;
264 struct dentry *ps_upsd_utilization;
265
266 struct dentry *rxpipe_rx_prep_beacon_drop;
267 struct dentry *rxpipe_descr_host_int_trig_rx_data;
268 struct dentry *rxpipe_beacon_buffer_thres_host_int_trig_rx_data;
269 struct dentry *rxpipe_missed_beacon_host_int_trig_rx_data;
270 struct dentry *rxpipe_tx_xfr_host_int_trig_rx_data;
271
272 struct dentry *tx_queue_len;
273
274 struct dentry *retry_count;
275 struct dentry *excessive_retries;
276 struct dentry *gpio_power;
277};
278
279#define NUM_TX_QUEUES 4
280#define NUM_RX_PKT_DESC 8
281
282/* FW status registers */
283struct wl1271_fw_status {
284 __le32 intr;
285 u8 fw_rx_counter;
286 u8 drv_rx_counter;
287 u8 reserved;
288 u8 tx_results_counter;
289 __le32 rx_pkt_descs[NUM_RX_PKT_DESC];
290 __le32 tx_released_blks[NUM_TX_QUEUES];
291 __le32 fw_localtime;
292 __le32 padding[2];
293} __packed;
294
295struct wl1271_rx_mem_pool_addr {
296 u32 addr;
297 u32 addr_extra;
298};
299
300struct wl1271_scan {
301 struct cfg80211_scan_request *req;
302 bool *scanned_ch;
303 bool failed;
304 u8 state;
305 u8 ssid[IW_ESSID_MAX_SIZE+1];
306 size_t ssid_len;
307};
308
309struct wl1271_if_operations {
310 void (*read)(struct wl1271 *wl, int addr, void *buf, size_t len,
311 bool fixed);
312 void (*write)(struct wl1271 *wl, int addr, void *buf, size_t len,
313 bool fixed);
314 void (*reset)(struct wl1271 *wl);
315 void (*init)(struct wl1271 *wl);
316 int (*power)(struct wl1271 *wl, bool enable);
317 struct device* (*dev)(struct wl1271 *wl);
318 void (*enable_irq)(struct wl1271 *wl);
319 void (*disable_irq)(struct wl1271 *wl);
320};
321
322struct wl1271 {
323 struct platform_device *plat_dev;
324 struct ieee80211_hw *hw;
325 bool mac80211_registered;
326
327 void *if_priv;
328
329 struct wl1271_if_operations *if_ops;
330
331 void (*set_power)(bool enable);
332 int irq;
333 int ref_clock;
334
335 spinlock_t wl_lock;
336
337 enum wl1271_state state;
338 struct mutex mutex;
339
340#define WL1271_FLAG_STA_RATES_CHANGED (0)
341#define WL1271_FLAG_STA_ASSOCIATED (1)
342#define WL1271_FLAG_JOINED (2)
343#define WL1271_FLAG_GPIO_POWER (3)
344#define WL1271_FLAG_TX_QUEUE_STOPPED (4)
345#define WL1271_FLAG_IN_ELP (5)
346#define WL1271_FLAG_PSM (6)
347#define WL1271_FLAG_PSM_REQUESTED (7)
348#define WL1271_FLAG_IRQ_PENDING (8)
349#define WL1271_FLAG_IRQ_RUNNING (9)
350#define WL1271_FLAG_IDLE (10)
351#define WL1271_FLAG_IDLE_REQUESTED (11)
352#define WL1271_FLAG_PSPOLL_FAILURE (12)
353#define WL1271_FLAG_STA_STATE_SENT (13)
354#define WL1271_FLAG_FW_TX_BUSY (14)
355 unsigned long flags;
356
357 struct wl1271_partition_set part;
358
359 struct wl1271_chip chip;
360
361 int cmd_box_addr;
362 int event_box_addr;
363
364 u8 *fw;
365 size_t fw_len;
366 struct wl1271_nvs_file *nvs;
367 size_t nvs_len;
368
369 s8 hw_pg_ver;
370
371 u8 bssid[ETH_ALEN];
372 u8 mac_addr[ETH_ALEN];
373 u8 bss_type;
374 u8 set_bss_type;
375 u8 ssid[IW_ESSID_MAX_SIZE + 1];
376 u8 ssid_len;
377 int channel;
378
379 struct wl1271_acx_mem_map *target_mem_map;
380
381 /* Accounting for allocated / available TX blocks on HW */
382 u32 tx_blocks_freed[NUM_TX_QUEUES];
383 u32 tx_blocks_available;
384 u32 tx_results_count;
385
386 /* Transmitted TX packets counter for chipset interface */
387 u32 tx_packets_count;
388
389 /* Time-offset between host and chipset clocks */
390 s64 time_offset;
391
392 /* Session counter for the chipset */
393 int session_counter;
394
395 /* Frames scheduled for transmission, not handled yet */
396 struct sk_buff_head tx_queue;
397
398 struct work_struct tx_work;
399
400 /* Pending TX frames */
401 unsigned long tx_frames_map[BITS_TO_LONGS(ACX_TX_DESCRIPTORS)];
402 struct sk_buff *tx_frames[ACX_TX_DESCRIPTORS];
403 int tx_frames_cnt;
404
405 /* Security sequence number counters */
406 u8 tx_security_last_seq;
407 s64 tx_security_seq;
408
409 /* FW Rx counter */
410 u32 rx_counter;
411
412 /* Rx memory pool address */
413 struct wl1271_rx_mem_pool_addr rx_mem_pool_addr;
414
415 /* Intermediate buffer, used for packet aggregation */
416 u8 *aggr_buf;
417
418 /* The target interrupt mask */
419 struct work_struct irq_work;
420
421 /* Hardware recovery work */
422 struct work_struct recovery_work;
423
424 /* The mbox event mask */
425 u32 event_mask;
426
427 /* Mailbox pointers */
428 u32 mbox_ptr[2];
429
430 /* Are we currently scanning */
431 struct wl1271_scan scan;
432 struct delayed_work scan_complete_work;
433
434 /* Our association ID */
435 u16 aid;
436
437 /*
438 * currently configured rate set:
439 * bits 0-15 - 802.11abg rates
440 * bits 16-23 - 802.11n MCS index mask
441 * support only 1 stream, thus only 8 bits for the MCS rates (0-7).
442 */
443 u32 sta_rate_set;
444 u32 basic_rate_set;
445 u32 basic_rate;
446 u32 rate_set;
447
448 /* The current band */
449 enum ieee80211_band band;
450
451 /* Beaconing interval (needed for ad-hoc) */
452 u32 beacon_int;
453
454 /* Default key (for WEP) */
455 u32 default_key;
456
457 unsigned int filters;
458 unsigned int rx_config;
459 unsigned int rx_filter;
460
461 struct completion *elp_compl;
462 struct delayed_work elp_work;
463 struct delayed_work pspoll_work;
464
465 /* counter for ps-poll delivery failures */
466 int ps_poll_failures;
467
468 /* retry counter for PSM entries */
469 u8 psm_entry_retry;
470
471 /* in dBm */
472 int power_level;
473
474 int rssi_thold;
475 int last_rssi_event;
476
477 struct wl1271_stats stats;
478 struct wl1271_debugfs debugfs;
479
480 __le32 buffer_32;
481 u32 buffer_cmd;
482 u32 buffer_busyword[WL1271_BUSY_WORD_CNT];
483
484 struct wl1271_fw_status *fw_status;
485 struct wl1271_tx_hw_res_if *tx_res_if;
486
487 struct ieee80211_vif *vif;
488
489 /* Current chipset configuration */
490 struct conf_drv_settings conf;
491
492 bool sg_enabled;
493
494 bool enable_11a;
495
496 struct list_head list;
497
498 /* Most recently reported noise in dBm */
499 s8 noise;
500};
501
502int wl1271_plt_start(struct wl1271 *wl);
503int wl1271_plt_stop(struct wl1271 *wl);
504
505#define JOIN_TIMEOUT 5000 /* 5000 milliseconds to join */
506
507#define SESSION_COUNTER_MAX 7 /* maximum value for the session counter */
508
509#define WL1271_DEFAULT_POWER_LEVEL 0
510
511#define WL1271_TX_QUEUE_LOW_WATERMARK 10
512#define WL1271_TX_QUEUE_HIGH_WATERMARK 25
513
514/* WL1271 needs a 200ms sleep after power on, and a 20ms sleep before power
515 on in case is has been shut down shortly before */
516#define WL1271_PRE_POWER_ON_SLEEP 20 /* in miliseconds */
517#define WL1271_POWER_ON_SLEEP 200 /* in miliseconds */
518
519/* Macros to handle wl1271.sta_rate_set */
520#define HW_BG_RATES_MASK 0xffff
521#define HW_HT_RATES_OFFSET 16
522
523#endif