diff options
Diffstat (limited to 'drivers/net/wireless/wl12xx/tx.h')
-rw-r--r-- | drivers/net/wireless/wl12xx/tx.h | 215 |
1 files changed, 215 insertions, 0 deletions
diff --git a/drivers/net/wireless/wl12xx/tx.h b/drivers/net/wireless/wl12xx/tx.h new file mode 100644 index 000000000000..dc82691f4c14 --- /dev/null +++ b/drivers/net/wireless/wl12xx/tx.h | |||
@@ -0,0 +1,215 @@ | |||
1 | /* | ||
2 | * This file is part of wl12xx | ||
3 | * | ||
4 | * Copyright (c) 1998-2007 Texas Instruments Incorporated | ||
5 | * Copyright (C) 2008 Nokia Corporation | ||
6 | * | ||
7 | * Contact: Kalle Valo <kalle.valo@nokia.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * version 2 as published by the Free Software Foundation. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, but | ||
14 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
16 | * General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
21 | * 02110-1301 USA | ||
22 | * | ||
23 | */ | ||
24 | |||
25 | #ifndef __WL12XX_TX_H__ | ||
26 | #define __WL12XX_TX_H__ | ||
27 | |||
28 | #include <linux/bitops.h> | ||
29 | |||
30 | /* | ||
31 | * | ||
32 | * TX PATH | ||
33 | * | ||
34 | * The Tx path uses a double buffer and a tx_control structure, each located | ||
35 | * at a fixed address in the device's memory. On startup, the host retrieves | ||
36 | * the pointers to these addresses. A double buffer allows for continuous data | ||
37 | * flow towards the device. The host keeps track of which buffer is available | ||
38 | * and alternates between these two buffers on a per packet basis. | ||
39 | * | ||
40 | * The size of each of the two buffers is large enough to hold the longest | ||
41 | * 802.3 packet - maximum size Ethernet packet + header + descriptor. | ||
42 | * TX complete indication will be received a-synchronously in a TX done cyclic | ||
43 | * buffer which is composed of 16 tx_result descriptors structures and is used | ||
44 | * in a cyclic manner. | ||
45 | * | ||
46 | * The TX (HOST) procedure is as follows: | ||
47 | * 1. Read the Tx path status, that will give the data_out_count. | ||
48 | * 2. goto 1, if not possible. | ||
49 | * i.e. if data_in_count - data_out_count >= HwBuffer size (2 for double | ||
50 | * buffer). | ||
51 | * 3. Copy the packet (preceded by double_buffer_desc), if possible. | ||
52 | * i.e. if data_in_count - data_out_count < HwBuffer size (2 for double | ||
53 | * buffer). | ||
54 | * 4. increment data_in_count. | ||
55 | * 5. Inform the firmware by generating a firmware internal interrupt. | ||
56 | * 6. FW will increment data_out_count after it reads the buffer. | ||
57 | * | ||
58 | * The TX Complete procedure: | ||
59 | * 1. To get a TX complete indication the host enables the tx_complete flag in | ||
60 | * the TX descriptor Structure. | ||
61 | * 2. For each packet with a Tx Complete field set, the firmware adds the | ||
62 | * transmit results to the cyclic buffer (txDoneRing) and sets both done_1 | ||
63 | * and done_2 to 1 to indicate driver ownership. | ||
64 | * 3. The firmware sends a Tx Complete interrupt to the host to trigger the | ||
65 | * host to process the new data. Note: interrupt will be send per packet if | ||
66 | * TX complete indication was requested in tx_control or per crossing | ||
67 | * aggregation threshold. | ||
68 | * 4. After receiving the Tx Complete interrupt, the host reads the | ||
69 | * TxDescriptorDone information in a cyclic manner and clears both done_1 | ||
70 | * and done_2 fields. | ||
71 | * | ||
72 | */ | ||
73 | |||
74 | #define TX_COMPLETE_REQUIRED_BIT 0x80 | ||
75 | #define TX_STATUS_DATA_OUT_COUNT_MASK 0xf | ||
76 | #define WL12XX_TX_ALIGN_TO 4 | ||
77 | #define WL12XX_TX_ALIGN(len) (((len) + WL12XX_TX_ALIGN_TO - 1) & \ | ||
78 | ~(WL12XX_TX_ALIGN_TO - 1)) | ||
79 | #define WL12XX_TKIP_IV_SPACE 4 | ||
80 | |||
81 | struct tx_control { | ||
82 | /* Rate Policy (class) index */ | ||
83 | unsigned rate_policy:3; | ||
84 | |||
85 | /* When set, no ack policy is expected */ | ||
86 | unsigned ack_policy:1; | ||
87 | |||
88 | /* | ||
89 | * Packet type: | ||
90 | * 0 -> 802.11 | ||
91 | * 1 -> 802.3 | ||
92 | * 2 -> IP | ||
93 | * 3 -> raw codec | ||
94 | */ | ||
95 | unsigned packet_type:2; | ||
96 | |||
97 | /* If set, this is a QoS-Null or QoS-Data frame */ | ||
98 | unsigned qos:1; | ||
99 | |||
100 | /* | ||
101 | * If set, the target triggers the tx complete INT | ||
102 | * upon frame sending completion. | ||
103 | */ | ||
104 | unsigned tx_complete:1; | ||
105 | |||
106 | /* 2 bytes padding before packet header */ | ||
107 | unsigned xfer_pad:1; | ||
108 | |||
109 | unsigned reserved:7; | ||
110 | } __attribute__ ((packed)); | ||
111 | |||
112 | |||
113 | struct tx_double_buffer_desc { | ||
114 | /* Length of payload, including headers. */ | ||
115 | u16 length; | ||
116 | |||
117 | /* | ||
118 | * A bit mask that specifies the initial rate to be used | ||
119 | * Possible values are: | ||
120 | * 0x0001 - 1Mbits | ||
121 | * 0x0002 - 2Mbits | ||
122 | * 0x0004 - 5.5Mbits | ||
123 | * 0x0008 - 6Mbits | ||
124 | * 0x0010 - 9Mbits | ||
125 | * 0x0020 - 11Mbits | ||
126 | * 0x0040 - 12Mbits | ||
127 | * 0x0080 - 18Mbits | ||
128 | * 0x0100 - 22Mbits | ||
129 | * 0x0200 - 24Mbits | ||
130 | * 0x0400 - 36Mbits | ||
131 | * 0x0800 - 48Mbits | ||
132 | * 0x1000 - 54Mbits | ||
133 | */ | ||
134 | u16 rate; | ||
135 | |||
136 | /* Time in us that a packet can spend in the target */ | ||
137 | u32 expiry_time; | ||
138 | |||
139 | /* index of the TX queue used for this packet */ | ||
140 | u8 xmit_queue; | ||
141 | |||
142 | /* Used to identify a packet */ | ||
143 | u8 id; | ||
144 | |||
145 | struct tx_control control; | ||
146 | |||
147 | /* | ||
148 | * The FW should cut the packet into fragments | ||
149 | * of this size. | ||
150 | */ | ||
151 | u16 frag_threshold; | ||
152 | |||
153 | /* Numbers of HW queue blocks to be allocated */ | ||
154 | u8 num_mem_blocks; | ||
155 | |||
156 | u8 reserved; | ||
157 | } __attribute__ ((packed)); | ||
158 | |||
159 | enum { | ||
160 | TX_SUCCESS = 0, | ||
161 | TX_DMA_ERROR = BIT(7), | ||
162 | TX_DISABLED = BIT(6), | ||
163 | TX_RETRY_EXCEEDED = BIT(5), | ||
164 | TX_TIMEOUT = BIT(4), | ||
165 | TX_KEY_NOT_FOUND = BIT(3), | ||
166 | TX_ENCRYPT_FAIL = BIT(2), | ||
167 | TX_UNAVAILABLE_PRIORITY = BIT(1), | ||
168 | }; | ||
169 | |||
170 | struct tx_result { | ||
171 | /* | ||
172 | * Ownership synchronization between the host and | ||
173 | * the firmware. If done_1 and done_2 are cleared, | ||
174 | * owned by the FW (no info ready). | ||
175 | */ | ||
176 | u8 done_1; | ||
177 | |||
178 | /* same as double_buffer_desc->id */ | ||
179 | u8 id; | ||
180 | |||
181 | /* | ||
182 | * Total air access duration consumed by this | ||
183 | * packet, including all retries and overheads. | ||
184 | */ | ||
185 | u16 medium_usage; | ||
186 | |||
187 | /* Total media delay (from 1st EDCA AIFS counter until TX Complete). */ | ||
188 | u32 medium_delay; | ||
189 | |||
190 | /* Time between host xfer and tx complete */ | ||
191 | u32 fw_hnadling_time; | ||
192 | |||
193 | /* The LS-byte of the last TKIP sequence number. */ | ||
194 | u8 lsb_seq_num; | ||
195 | |||
196 | /* Retry count */ | ||
197 | u8 ack_failures; | ||
198 | |||
199 | /* At which rate we got a ACK */ | ||
200 | u16 rate; | ||
201 | |||
202 | u16 reserved; | ||
203 | |||
204 | /* TX_* */ | ||
205 | u8 status; | ||
206 | |||
207 | /* See done_1 */ | ||
208 | u8 done_2; | ||
209 | } __attribute__ ((packed)); | ||
210 | |||
211 | void wl12xx_tx_work(struct work_struct *work); | ||
212 | void wl12xx_tx_complete(struct wl12xx *wl); | ||
213 | void wl12xx_tx_flush(struct wl12xx *wl); | ||
214 | |||
215 | #endif | ||