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path: root/drivers/net/wireless/rtlwifi/rtl8723be/pwrseqcmd.c
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Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8723be/pwrseqcmd.c')
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8723be/pwrseqcmd.c140
1 files changed, 140 insertions, 0 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8723be/pwrseqcmd.c b/drivers/net/wireless/rtlwifi/rtl8723be/pwrseqcmd.c
new file mode 100644
index 000000000000..e4a507a756fb
--- /dev/null
+++ b/drivers/net/wireless/rtlwifi/rtl8723be/pwrseqcmd.c
@@ -0,0 +1,140 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2009-2014 Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * The full GNU General Public License is included in this distribution in the
15 * file called LICENSE.
16 *
17 * Contact Information:
18 * wlanfae <wlanfae@realtek.com>
19 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20 * Hsinchu 300, Taiwan.
21 *
22 * Larry Finger <Larry.Finger@lwfinger.net>
23 *
24 *****************************************************************************/
25
26#include "pwrseq.h"
27
28/* Description:
29 * This routine deal with the Power Configuration CMDs
30 * parsing for RTL8723/RTL8188E Series IC.
31 * Assumption:
32 * We should follow specific format which was released from HW SD.
33 *
34 * 2011.07.07, added by Roger.
35 */
36bool rtlbe_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
37 u8 fab_version, u8 interface_type,
38 struct wlan_pwr_cfg pwrcfgcmd[])
39
40{
41 struct wlan_pwr_cfg pwr_cfg_cmd = {0};
42 bool b_polling_bit = false;
43 u32 ary_idx = 0;
44 u8 value = 0;
45 u32 offset = 0;
46 u32 polling_count = 0;
47 u32 max_polling_cnt = 5000;
48
49 do {
50 pwr_cfg_cmd = pwrcfgcmd[ary_idx];
51 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
52 "rtlbe_hal_pwrseqcmdparsing(): "
53 "offset(%#x),cut_msk(%#x), fab_msk(%#x),"
54 "interface_msk(%#x), base(%#x), "
55 "cmd(%#x), msk(%#x), value(%#x)\n",
56 GET_PWR_CFG_OFFSET(pwr_cfg_cmd),
57 GET_PWR_CFG_CUT_MASK(pwr_cfg_cmd),
58 GET_PWR_CFG_FAB_MASK(pwr_cfg_cmd),
59 GET_PWR_CFG_INTF_MASK(pwr_cfg_cmd),
60 GET_PWR_CFG_BASE(pwr_cfg_cmd),
61 GET_PWR_CFG_CMD(pwr_cfg_cmd),
62 GET_PWR_CFG_MASK(pwr_cfg_cmd),
63 GET_PWR_CFG_VALUE(pwr_cfg_cmd));
64
65 if ((GET_PWR_CFG_FAB_MASK(pwr_cfg_cmd)&fab_version) &&
66 (GET_PWR_CFG_CUT_MASK(pwr_cfg_cmd)&cut_version) &&
67 (GET_PWR_CFG_INTF_MASK(pwr_cfg_cmd)&interface_type)) {
68 switch (GET_PWR_CFG_CMD(pwr_cfg_cmd)) {
69 case PWR_CMD_READ:
70 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
71 "rtlbe_hal_pwrseqcmdparsing(): "
72 "PWR_CMD_READ\n");
73 break;
74 case PWR_CMD_WRITE:
75 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
76 "rtlbe_hal_pwrseqcmdparsing(): "
77 "PWR_CMD_WRITE\n");
78 offset = GET_PWR_CFG_OFFSET(pwr_cfg_cmd);
79
80 /*Read the value from system register*/
81 value = rtl_read_byte(rtlpriv, offset);
82 value &= (~(GET_PWR_CFG_MASK(pwr_cfg_cmd)));
83 value = value | (GET_PWR_CFG_VALUE(pwr_cfg_cmd)
84 & GET_PWR_CFG_MASK(pwr_cfg_cmd));
85
86 /*Write the value back to sytem register*/
87 rtl_write_byte(rtlpriv, offset, value);
88 break;
89 case PWR_CMD_POLLING:
90 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
91 "rtlbe_hal_pwrseqcmdparsing(): "
92 "PWR_CMD_POLLING\n");
93 b_polling_bit = false;
94 offset = GET_PWR_CFG_OFFSET(pwr_cfg_cmd);
95
96 do {
97 value = rtl_read_byte(rtlpriv, offset);
98
99 value &= GET_PWR_CFG_MASK(pwr_cfg_cmd);
100 if (value ==
101 (GET_PWR_CFG_VALUE(pwr_cfg_cmd) &
102 GET_PWR_CFG_MASK(pwr_cfg_cmd)))
103 b_polling_bit = true;
104 else
105 udelay(10);
106
107 if (polling_count++ > max_polling_cnt)
108 return false;
109
110 } while (!b_polling_bit);
111 break;
112 case PWR_CMD_DELAY:
113 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
114 "rtlbe_hal_pwrseqcmdparsing(): "
115 "PWR_CMD_DELAY\n");
116 if (GET_PWR_CFG_VALUE(pwr_cfg_cmd) ==
117 PWRSEQ_DELAY_US)
118 udelay(GET_PWR_CFG_OFFSET(pwr_cfg_cmd));
119 else
120 mdelay(GET_PWR_CFG_OFFSET(pwr_cfg_cmd));
121 break;
122 case PWR_CMD_END:
123 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
124 "rtlbe_hal_pwrseqcmdparsing(): "
125 "PWR_CMD_END\n");
126 return true;
127 break;
128 default:
129 RT_ASSERT(false,
130 "rtlbe_hal_pwrseqcmdparsing(): "
131 "Unknown CMD!!\n");
132 break;
133 }
134 }
135
136 ary_idx++;
137 } while (1);
138
139 return true;
140}