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path: root/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c
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Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8723ae/hw.c')
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8723ae/hw.c127
1 files changed, 67 insertions, 60 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c b/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c
index c333dfd116b8..65c9e80e1f78 100644
--- a/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c
+++ b/drivers/net/wireless/rtlwifi/rtl8723ae/hw.c
@@ -38,10 +38,11 @@
38#include "def.h" 38#include "def.h"
39#include "phy.h" 39#include "phy.h"
40#include "dm.h" 40#include "dm.h"
41#include "../rtl8723com/dm_common.h"
41#include "fw.h" 42#include "fw.h"
43#include "../rtl8723com/fw_common.h"
42#include "led.h" 44#include "led.h"
43#include "hw.h" 45#include "hw.h"
44#include "pwrseqcmd.h"
45#include "pwrseq.h" 46#include "pwrseq.h"
46#include "btc.h" 47#include "btc.h"
47 48
@@ -206,14 +207,13 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
206 rtl_write_byte(rtlpriv, REG_SLOT, val[0]); 207 rtl_write_byte(rtlpriv, REG_SLOT, val[0]);
207 208
208 for (e_aci = 0; e_aci < AC_MAX; e_aci++) { 209 for (e_aci = 0; e_aci < AC_MAX; e_aci++) {
209 rtlpriv->cfg->ops->set_hw_reg(hw, 210 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
210 HW_VAR_AC_PARAM, 211 &e_aci);
211 (u8 *) (&e_aci));
212 } 212 }
213 break; } 213 break; }
214 case HW_VAR_ACK_PREAMBLE:{ 214 case HW_VAR_ACK_PREAMBLE:{
215 u8 reg_tmp; 215 u8 reg_tmp;
216 u8 short_preamble = (bool) (*(u8 *) val); 216 u8 short_preamble = (bool)*val;
217 reg_tmp = (mac->cur_40_prime_sc) << 5; 217 reg_tmp = (mac->cur_40_prime_sc) << 5;
218 if (short_preamble) 218 if (short_preamble)
219 reg_tmp |= 0x80; 219 reg_tmp |= 0x80;
@@ -224,7 +224,7 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
224 u8 min_spacing_to_set; 224 u8 min_spacing_to_set;
225 u8 sec_min_space; 225 u8 sec_min_space;
226 226
227 min_spacing_to_set = *((u8 *) val); 227 min_spacing_to_set = *val;
228 if (min_spacing_to_set <= 7) { 228 if (min_spacing_to_set <= 7) {
229 sec_min_space = 0; 229 sec_min_space = 0;
230 230
@@ -248,7 +248,7 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
248 case HW_VAR_SHORTGI_DENSITY:{ 248 case HW_VAR_SHORTGI_DENSITY:{
249 u8 density_to_set; 249 u8 density_to_set;
250 250
251 density_to_set = *((u8 *) val); 251 density_to_set = *val;
252 mac->min_space_cfg |= (density_to_set << 3); 252 mac->min_space_cfg |= (density_to_set << 3);
253 253
254 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD, 254 RT_TRACE(rtlpriv, COMP_MLME, DBG_LOUD,
@@ -272,7 +272,7 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
272 else 272 else
273 p_regtoset = regtoset_normal; 273 p_regtoset = regtoset_normal;
274 274
275 factor_toset = *((u8 *) val); 275 factor_toset = *val;
276 if (factor_toset <= 3) { 276 if (factor_toset <= 3) {
277 factor_toset = (1 << (factor_toset + 2)); 277 factor_toset = (1 << (factor_toset + 2));
278 if (factor_toset > 0xf) 278 if (factor_toset > 0xf)
@@ -303,16 +303,15 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
303 } 303 }
304 break; } 304 break; }
305 case HW_VAR_AC_PARAM:{ 305 case HW_VAR_AC_PARAM:{
306 u8 e_aci = *((u8 *) val); 306 u8 e_aci = *val;
307 rtl8723ae_dm_init_edca_turbo(hw); 307 rtl8723_dm_init_edca_turbo(hw);
308 308
309 if (rtlpci->acm_method != eAcmWay2_SW) 309 if (rtlpci->acm_method != EACMWAY2_SW)
310 rtlpriv->cfg->ops->set_hw_reg(hw, 310 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_ACM_CTRL,
311 HW_VAR_ACM_CTRL, 311 &e_aci);
312 (u8 *) (&e_aci));
313 break; } 312 break; }
314 case HW_VAR_ACM_CTRL:{ 313 case HW_VAR_ACM_CTRL:{
315 u8 e_aci = *((u8 *) val); 314 u8 e_aci = *val;
316 union aci_aifsn *p_aci_aifsn = 315 union aci_aifsn *p_aci_aifsn =
317 (union aci_aifsn *)(&(mac->ac[0].aifs)); 316 (union aci_aifsn *)(&(mac->ac[0].aifs));
318 u8 acm = p_aci_aifsn->f.acm; 317 u8 acm = p_aci_aifsn->f.acm;
@@ -365,7 +364,7 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
365 rtlpci->receive_config = ((u32 *) (val))[0]; 364 rtlpci->receive_config = ((u32 *) (val))[0];
366 break; 365 break;
367 case HW_VAR_RETRY_LIMIT:{ 366 case HW_VAR_RETRY_LIMIT:{
368 u8 retry_limit = ((u8 *) (val))[0]; 367 u8 retry_limit = *val;
369 368
370 rtl_write_word(rtlpriv, REG_RL, 369 rtl_write_word(rtlpriv, REG_RL,
371 retry_limit << RETRY_LIMIT_SHORT_SHIFT | 370 retry_limit << RETRY_LIMIT_SHORT_SHIFT |
@@ -378,13 +377,13 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
378 rtlefuse->efuse_usedbytes = *((u16 *) val); 377 rtlefuse->efuse_usedbytes = *((u16 *) val);
379 break; 378 break;
380 case HW_VAR_EFUSE_USAGE: 379 case HW_VAR_EFUSE_USAGE:
381 rtlefuse->efuse_usedpercentage = *((u8 *) val); 380 rtlefuse->efuse_usedpercentage = *val;
382 break; 381 break;
383 case HW_VAR_IO_CMD: 382 case HW_VAR_IO_CMD:
384 rtl8723ae_phy_set_io_cmd(hw, (*(enum io_type *)val)); 383 rtl8723ae_phy_set_io_cmd(hw, (*(enum io_type *)val));
385 break; 384 break;
386 case HW_VAR_WPA_CONFIG: 385 case HW_VAR_WPA_CONFIG:
387 rtl_write_byte(rtlpriv, REG_SECCFG, *((u8 *) val)); 386 rtl_write_byte(rtlpriv, REG_SECCFG, *val);
388 break; 387 break;
389 case HW_VAR_SET_RPWM:{ 388 case HW_VAR_SET_RPWM:{
390 u8 rpwm_val; 389 u8 rpwm_val;
@@ -393,27 +392,25 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
393 udelay(1); 392 udelay(1);
394 393
395 if (rpwm_val & BIT(7)) { 394 if (rpwm_val & BIT(7)) {
396 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, 395 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val);
397 (*(u8 *) val));
398 } else { 396 } else {
399 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, 397 rtl_write_byte(rtlpriv, REG_PCIE_HRPWM, *val | BIT(7));
400 ((*(u8 *) val) | BIT(7)));
401 } 398 }
402 399
403 break; } 400 break; }
404 case HW_VAR_H2C_FW_PWRMODE:{ 401 case HW_VAR_H2C_FW_PWRMODE:{
405 u8 psmode = (*(u8 *) val); 402 u8 psmode = *val;
406 403
407 if (psmode != FW_PS_ACTIVE_MODE) 404 if (psmode != FW_PS_ACTIVE_MODE)
408 rtl8723ae_dm_rf_saving(hw, true); 405 rtl8723ae_dm_rf_saving(hw, true);
409 406
410 rtl8723ae_set_fw_pwrmode_cmd(hw, (*(u8 *) val)); 407 rtl8723ae_set_fw_pwrmode_cmd(hw, *val);
411 break; } 408 break; }
412 case HW_VAR_FW_PSMODE_STATUS: 409 case HW_VAR_FW_PSMODE_STATUS:
413 ppsc->fw_current_inpsmode = *((bool *) val); 410 ppsc->fw_current_inpsmode = *((bool *) val);
414 break; 411 break;
415 case HW_VAR_H2C_FW_JOINBSSRPT:{ 412 case HW_VAR_H2C_FW_JOINBSSRPT:{
416 u8 mstatus = (*(u8 *) val); 413 u8 mstatus = *val;
417 u8 tmp_regcr, tmp_reg422; 414 u8 tmp_regcr, tmp_reg422;
418 bool recover = false; 415 bool recover = false;
419 416
@@ -446,11 +443,11 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
446 rtl_write_byte(rtlpriv, REG_CR + 1, 443 rtl_write_byte(rtlpriv, REG_CR + 1,
447 (tmp_regcr & ~(BIT(0)))); 444 (tmp_regcr & ~(BIT(0))));
448 } 445 }
449 rtl8723ae_set_fw_joinbss_report_cmd(hw, (*(u8 *) val)); 446 rtl8723ae_set_fw_joinbss_report_cmd(hw, *val);
450 447
451 break; } 448 break; }
452 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD: 449 case HW_VAR_H2C_FW_P2P_PS_OFFLOAD:
453 rtl8723ae_set_p2p_ps_offload_cmd(hw, (*(u8 *)val)); 450 rtl8723ae_set_p2p_ps_offload_cmd(hw, *val);
454 break; 451 break;
455 case HW_VAR_AID:{ 452 case HW_VAR_AID:{
456 u16 u2btmp; 453 u16 u2btmp;
@@ -460,7 +457,7 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
460 mac->assoc_id)); 457 mac->assoc_id));
461 break; } 458 break; }
462 case HW_VAR_CORRECT_TSF:{ 459 case HW_VAR_CORRECT_TSF:{
463 u8 btype_ibss = ((u8 *) (val))[0]; 460 u8 btype_ibss = *val;
464 461
465 if (btype_ibss == true) 462 if (btype_ibss == true)
466 _rtl8723ae_stop_tx_beacon(hw); 463 _rtl8723ae_stop_tx_beacon(hw);
@@ -490,20 +487,18 @@ void rtl8723ae_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val)
490 (u8 *)(&fw_current_inps)); 487 (u8 *)(&fw_current_inps));
491 rtlpriv->cfg->ops->set_hw_reg(hw, 488 rtlpriv->cfg->ops->set_hw_reg(hw,
492 HW_VAR_H2C_FW_PWRMODE, 489 HW_VAR_H2C_FW_PWRMODE,
493 (u8 *)(&ppsc->fwctrl_psmode)); 490 &ppsc->fwctrl_psmode);
494 491
495 rtlpriv->cfg->ops->set_hw_reg(hw, 492 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM,
496 HW_VAR_SET_RPWM, 493 &rpwm_val);
497 (u8 *)(&rpwm_val));
498 } else { 494 } else {
499 rpwm_val = 0x0C; /* RF on */ 495 rpwm_val = 0x0C; /* RF on */
500 fw_pwrmode = FW_PS_ACTIVE_MODE; 496 fw_pwrmode = FW_PS_ACTIVE_MODE;
501 fw_current_inps = false; 497 fw_current_inps = false;
502 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM, 498 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SET_RPWM,
503 (u8 *)(&rpwm_val)); 499 &rpwm_val);
504 rtlpriv->cfg->ops->set_hw_reg(hw, 500 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_H2C_FW_PWRMODE,
505 HW_VAR_H2C_FW_PWRMODE, 501 &fw_pwrmode);
506 (u8 *)(&fw_pwrmode));
507 502
508 rtlpriv->cfg->ops->set_hw_reg(hw, 503 rtlpriv->cfg->ops->set_hw_reg(hw,
509 HW_VAR_FW_PSMODE_STATUS, 504 HW_VAR_FW_PSMODE_STATUS,
@@ -880,23 +875,33 @@ int rtl8723ae_hw_init(struct ieee80211_hw *hw)
880 bool rtstatus = true; 875 bool rtstatus = true;
881 int err; 876 int err;
882 u8 tmp_u1b; 877 u8 tmp_u1b;
878 unsigned long flags;
883 879
884 rtlpriv->rtlhal.being_init_adapter = true; 880 rtlpriv->rtlhal.being_init_adapter = true;
881 /* As this function can take a very long time (up to 350 ms)
882 * and can be called with irqs disabled, reenable the irqs
883 * to let the other devices continue being serviced.
884 *
885 * It is safe doing so since our own interrupts will only be enabled
886 * in a subsequent step.
887 */
888 local_save_flags(flags);
889 local_irq_enable();
890
885 rtlpriv->intf_ops->disable_aspm(hw); 891 rtlpriv->intf_ops->disable_aspm(hw);
886 rtstatus = _rtl8712e_init_mac(hw); 892 rtstatus = _rtl8712e_init_mac(hw);
887 if (rtstatus != true) { 893 if (rtstatus != true) {
888 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n"); 894 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG, "Init MAC failed\n");
889 err = 1; 895 err = 1;
890 return err; 896 goto exit;
891 } 897 }
892 898
893 err = rtl8723ae_download_fw(hw); 899 err = rtl8723_download_fw(hw, false);
894 if (err) { 900 if (err) {
895 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, 901 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
896 "Failed to download FW. Init HW without FW now..\n"); 902 "Failed to download FW. Init HW without FW now..\n");
897 err = 1; 903 err = 1;
898 rtlhal->fw_ready = false; 904 goto exit;
899 return err;
900 } else { 905 } else {
901 rtlhal->fw_ready = true; 906 rtlhal->fw_ready = true;
902 } 907 }
@@ -971,6 +976,8 @@ int rtl8723ae_hw_init(struct ieee80211_hw *hw)
971 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n"); 976 RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "under 1.5V\n");
972 } 977 }
973 rtl8723ae_dm_init(hw); 978 rtl8723ae_dm_init(hw);
979exit:
980 local_irq_restore(flags);
974 rtlpriv->rtlhal.being_init_adapter = false; 981 rtlpriv->rtlhal.being_init_adapter = false;
975 return err; 982 return err;
976} 983}
@@ -1112,12 +1119,13 @@ static int _rtl8723ae_set_media_status(struct ieee80211_hw *hw,
1112void rtl8723ae_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid) 1119void rtl8723ae_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid)
1113{ 1120{
1114 struct rtl_priv *rtlpriv = rtl_priv(hw); 1121 struct rtl_priv *rtlpriv = rtl_priv(hw);
1115 struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); 1122 u32 reg_rcr;
1116 u32 reg_rcr = rtlpci->receive_config;
1117 1123
1118 if (rtlpriv->psc.rfpwr_state != ERFON) 1124 if (rtlpriv->psc.rfpwr_state != ERFON)
1119 return; 1125 return;
1120 1126
1127 rtlpriv->cfg->ops->get_hw_reg(hw, HW_VAR_RCR, (u8 *)(&reg_rcr));
1128
1121 if (check_bssid == true) { 1129 if (check_bssid == true) {
1122 reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN); 1130 reg_rcr |= (RCR_CBSSID_DATA | RCR_CBSSID_BCN);
1123 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR, 1131 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_RCR,
@@ -1153,7 +1161,7 @@ void rtl8723ae_set_qos(struct ieee80211_hw *hw, int aci)
1153{ 1161{
1154 struct rtl_priv *rtlpriv = rtl_priv(hw); 1162 struct rtl_priv *rtlpriv = rtl_priv(hw);
1155 1163
1156 rtl8723ae_dm_init_edca_turbo(hw); 1164 rtl8723_dm_init_edca_turbo(hw);
1157 switch (aci) { 1165 switch (aci) {
1158 case AC1_BK: 1166 case AC1_BK:
1159 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f); 1167 rtl_write_dword(rtlpriv, REG_EDCA_BK_PARAM, 0xa44f);
@@ -1614,10 +1622,10 @@ static void _rtl8723ae_read_adapter_info(struct ieee80211_hw *hw,
1614 rtl8723ae_read_bt_coexist_info_from_hwpg(hw, 1622 rtl8723ae_read_bt_coexist_info_from_hwpg(hw,
1615 rtlefuse->autoload_failflag, hwinfo); 1623 rtlefuse->autoload_failflag, hwinfo);
1616 1624
1617 rtlefuse->eeprom_channelplan = *(u8 *)&hwinfo[EEPROM_CHANNELPLAN]; 1625 rtlefuse->eeprom_channelplan = hwinfo[EEPROM_CHANNELPLAN];
1618 rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION]; 1626 rtlefuse->eeprom_version = *(u16 *)&hwinfo[EEPROM_VERSION];
1619 rtlefuse->txpwr_fromeprom = true; 1627 rtlefuse->txpwr_fromeprom = true;
1620 rtlefuse->eeprom_oemid = *(u8 *)&hwinfo[EEPROM_CUSTOMER_ID]; 1628 rtlefuse->eeprom_oemid = hwinfo[EEPROM_CUSTOMER_ID];
1621 1629
1622 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, 1630 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1623 "EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid); 1631 "EEPROM Customer ID: 0x%2x\n", rtlefuse->eeprom_oemid);
@@ -1655,7 +1663,7 @@ static void _rtl8723ae_read_adapter_info(struct ieee80211_hw *hw,
1655 CHK_SVID_SMID(0x10EC, 0x9185)) 1663 CHK_SVID_SMID(0x10EC, 0x9185))
1656 rtlhal->oem_id = RT_CID_TOSHIBA; 1664 rtlhal->oem_id = RT_CID_TOSHIBA;
1657 else if (rtlefuse->eeprom_svid == 0x1025) 1665 else if (rtlefuse->eeprom_svid == 0x1025)
1658 rtlhal->oem_id = RT_CID_819x_Acer; 1666 rtlhal->oem_id = RT_CID_819X_ACER;
1659 else if (CHK_SVID_SMID(0x10EC, 0x6191) || 1667 else if (CHK_SVID_SMID(0x10EC, 0x6191) ||
1660 CHK_SVID_SMID(0x10EC, 0x6192) || 1668 CHK_SVID_SMID(0x10EC, 0x6192) ||
1661 CHK_SVID_SMID(0x10EC, 0x6193) || 1669 CHK_SVID_SMID(0x10EC, 0x6193) ||
@@ -1665,7 +1673,7 @@ static void _rtl8723ae_read_adapter_info(struct ieee80211_hw *hw,
1665 CHK_SVID_SMID(0x10EC, 0x8191) || 1673 CHK_SVID_SMID(0x10EC, 0x8191) ||
1666 CHK_SVID_SMID(0x10EC, 0x8192) || 1674 CHK_SVID_SMID(0x10EC, 0x8192) ||
1667 CHK_SVID_SMID(0x10EC, 0x8193)) 1675 CHK_SVID_SMID(0x10EC, 0x8193))
1668 rtlhal->oem_id = RT_CID_819x_SAMSUNG; 1676 rtlhal->oem_id = RT_CID_819X_SAMSUNG;
1669 else if (CHK_SVID_SMID(0x10EC, 0x8195) || 1677 else if (CHK_SVID_SMID(0x10EC, 0x8195) ||
1670 CHK_SVID_SMID(0x10EC, 0x9195) || 1678 CHK_SVID_SMID(0x10EC, 0x9195) ||
1671 CHK_SVID_SMID(0x10EC, 0x7194) || 1679 CHK_SVID_SMID(0x10EC, 0x7194) ||
@@ -1673,24 +1681,24 @@ static void _rtl8723ae_read_adapter_info(struct ieee80211_hw *hw,
1673 CHK_SVID_SMID(0x10EC, 0x8201) || 1681 CHK_SVID_SMID(0x10EC, 0x8201) ||
1674 CHK_SVID_SMID(0x10EC, 0x8202) || 1682 CHK_SVID_SMID(0x10EC, 0x8202) ||
1675 CHK_SVID_SMID(0x10EC, 0x9200)) 1683 CHK_SVID_SMID(0x10EC, 0x9200))
1676 rtlhal->oem_id = RT_CID_819x_Lenovo; 1684 rtlhal->oem_id = RT_CID_819X_LENOVO;
1677 else if (CHK_SVID_SMID(0x10EC, 0x8197) || 1685 else if (CHK_SVID_SMID(0x10EC, 0x8197) ||
1678 CHK_SVID_SMID(0x10EC, 0x9196)) 1686 CHK_SVID_SMID(0x10EC, 0x9196))
1679 rtlhal->oem_id = RT_CID_819x_CLEVO; 1687 rtlhal->oem_id = RT_CID_819X_CLEVO;
1680 else if (CHK_SVID_SMID(0x1028, 0x8194) || 1688 else if (CHK_SVID_SMID(0x1028, 0x8194) ||
1681 CHK_SVID_SMID(0x1028, 0x8198) || 1689 CHK_SVID_SMID(0x1028, 0x8198) ||
1682 CHK_SVID_SMID(0x1028, 0x9197) || 1690 CHK_SVID_SMID(0x1028, 0x9197) ||
1683 CHK_SVID_SMID(0x1028, 0x9198)) 1691 CHK_SVID_SMID(0x1028, 0x9198))
1684 rtlhal->oem_id = RT_CID_819x_DELL; 1692 rtlhal->oem_id = RT_CID_819X_DELL;
1685 else if (CHK_SVID_SMID(0x103C, 0x1629)) 1693 else if (CHK_SVID_SMID(0x103C, 0x1629))
1686 rtlhal->oem_id = RT_CID_819x_HP; 1694 rtlhal->oem_id = RT_CID_819X_HP;
1687 else if (CHK_SVID_SMID(0x1A32, 0x2315)) 1695 else if (CHK_SVID_SMID(0x1A32, 0x2315))
1688 rtlhal->oem_id = RT_CID_819x_QMI; 1696 rtlhal->oem_id = RT_CID_819X_QMI;
1689 else if (CHK_SVID_SMID(0x10EC, 0x8203)) 1697 else if (CHK_SVID_SMID(0x10EC, 0x8203))
1690 rtlhal->oem_id = RT_CID_819x_PRONETS; 1698 rtlhal->oem_id = RT_CID_819X_PRONETS;
1691 else if (CHK_SVID_SMID(0x1043, 0x84B5)) 1699 else if (CHK_SVID_SMID(0x1043, 0x84B5))
1692 rtlhal->oem_id = 1700 rtlhal->oem_id =
1693 RT_CID_819x_Edimax_ASUS; 1701 RT_CID_819X_EDIMAX_ASUS;
1694 else 1702 else
1695 rtlhal->oem_id = RT_CID_DEFAULT; 1703 rtlhal->oem_id = RT_CID_DEFAULT;
1696 } else if (rtlefuse->eeprom_did == 0x8178) { 1704 } else if (rtlefuse->eeprom_did == 0x8178) {
@@ -1712,12 +1720,12 @@ static void _rtl8723ae_read_adapter_info(struct ieee80211_hw *hw,
1712 CHK_SVID_SMID(0x10EC, 0x9185)) 1720 CHK_SVID_SMID(0x10EC, 0x9185))
1713 rtlhal->oem_id = RT_CID_TOSHIBA; 1721 rtlhal->oem_id = RT_CID_TOSHIBA;
1714 else if (rtlefuse->eeprom_svid == 0x1025) 1722 else if (rtlefuse->eeprom_svid == 0x1025)
1715 rtlhal->oem_id = RT_CID_819x_Acer; 1723 rtlhal->oem_id = RT_CID_819X_ACER;
1716 else if (CHK_SVID_SMID(0x10EC, 0x8186)) 1724 else if (CHK_SVID_SMID(0x10EC, 0x8186))
1717 rtlhal->oem_id = RT_CID_819x_PRONETS; 1725 rtlhal->oem_id = RT_CID_819X_PRONETS;
1718 else if (CHK_SVID_SMID(0x1043, 0x8486)) 1726 else if (CHK_SVID_SMID(0x1043, 0x8486))
1719 rtlhal->oem_id = 1727 rtlhal->oem_id =
1720 RT_CID_819x_Edimax_ASUS; 1728 RT_CID_819X_EDIMAX_ASUS;
1721 else 1729 else
1722 rtlhal->oem_id = RT_CID_DEFAULT; 1730 rtlhal->oem_id = RT_CID_DEFAULT;
1723 } else { 1731 } else {
@@ -1731,7 +1739,7 @@ static void _rtl8723ae_read_adapter_info(struct ieee80211_hw *hw,
1731 rtlhal->oem_id = RT_CID_CCX; 1739 rtlhal->oem_id = RT_CID_CCX;
1732 break; 1740 break;
1733 case EEPROM_CID_QMI: 1741 case EEPROM_CID_QMI:
1734 rtlhal->oem_id = RT_CID_819x_QMI; 1742 rtlhal->oem_id = RT_CID_819X_QMI;
1735 break; 1743 break;
1736 case EEPROM_CID_WHQL: 1744 case EEPROM_CID_WHQL:
1737 break; 1745 break;
@@ -2037,8 +2045,7 @@ void rtl8723ae_update_channel_access_setting(struct ieee80211_hw *hw)
2037 struct rtl_mac *mac = rtl_mac(rtl_priv(hw)); 2045 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
2038 u16 sifs_timer; 2046 u16 sifs_timer;
2039 2047
2040 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, 2048 rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_SLOT_TIME, &mac->slot_time);
2041 (u8 *)&mac->slot_time);
2042 if (!mac->ht_enable) 2049 if (!mac->ht_enable)
2043 sifs_timer = 0x0a0a; 2050 sifs_timer = 0x0a0a;
2044 else 2051 else
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-21 10:00:56 -0500