diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00')
26 files changed, 1990 insertions, 1988 deletions
diff --git a/drivers/net/wireless/rt2x00/Kconfig b/drivers/net/wireless/rt2x00/Kconfig index 2d611876bbe0..d485a86bba75 100644 --- a/drivers/net/wireless/rt2x00/Kconfig +++ b/drivers/net/wireless/rt2x00/Kconfig | |||
@@ -5,12 +5,16 @@ config RT2X00 | |||
5 | This will enable the experimental support for the Ralink drivers, | 5 | This will enable the experimental support for the Ralink drivers, |
6 | developed in the rt2x00 project <http://rt2x00.serialmonkey.com>. | 6 | developed in the rt2x00 project <http://rt2x00.serialmonkey.com>. |
7 | 7 | ||
8 | These drivers will make use of the mac80211 stack. | 8 | These drivers make use of the mac80211 stack. |
9 | 9 | ||
10 | When building one of the individual drivers, the rt2x00 library | 10 | When building one of the individual drivers, the rt2x00 library |
11 | will also be created. That library (when the driver is built as | 11 | will also be created. That library (when the driver is built as |
12 | a module) will be called "rt2x00lib.ko". | 12 | a module) will be called "rt2x00lib.ko". |
13 | 13 | ||
14 | Additionally PCI and USB libraries will also be build depending | ||
15 | on the types of drivers being selected, these libraries will be | ||
16 | called "rt2x00pci.ko" and "rt2x00usb.ko". | ||
17 | |||
14 | if RT2X00 | 18 | if RT2X00 |
15 | 19 | ||
16 | config RT2X00_LIB | 20 | config RT2X00_LIB |
@@ -32,35 +36,34 @@ config RT2X00_LIB_FIRMWARE | |||
32 | config RT2X00_LIB_RFKILL | 36 | config RT2X00_LIB_RFKILL |
33 | boolean | 37 | boolean |
34 | depends on RT2X00_LIB | 38 | depends on RT2X00_LIB |
35 | depends on INPUT | ||
36 | select RFKILL | 39 | select RFKILL |
37 | select INPUT_POLLDEV | ||
38 | 40 | ||
39 | config RT2X00_LIB_LEDS | 41 | config RT2X00_LIB_LEDS |
40 | boolean | 42 | boolean |
41 | depends on RT2X00_LIB && NEW_LEDS | 43 | depends on RT2X00_LIB && NEW_LEDS |
42 | 44 | ||
43 | config RT2400PCI | 45 | config RT2400PCI |
44 | tristate "Ralink rt2400 pci/pcmcia support" | 46 | tristate "Ralink rt2400 (PCI/PCMCIA) support" |
45 | depends on PCI | 47 | depends on PCI |
46 | select RT2X00_LIB_PCI | 48 | select RT2X00_LIB_PCI |
47 | select EEPROM_93CX6 | 49 | select EEPROM_93CX6 |
48 | ---help--- | 50 | ---help--- |
49 | This is an experimental driver for the Ralink rt2400 wireless chip. | 51 | This adds support for rt2400 wireless chipset family. |
52 | Supported chips: RT2460. | ||
50 | 53 | ||
51 | When compiled as a module, this driver will be called "rt2400pci.ko". | 54 | When compiled as a module, this driver will be called "rt2400pci.ko". |
52 | 55 | ||
53 | config RT2400PCI_RFKILL | 56 | config RT2400PCI_RFKILL |
54 | bool "RT2400 rfkill support" | 57 | bool "Ralink rt2400 rfkill support" |
55 | depends on RT2400PCI && INPUT | 58 | depends on RT2400PCI |
56 | select RT2X00_LIB_RFKILL | 59 | select RT2X00_LIB_RFKILL |
57 | ---help--- | 60 | ---help--- |
58 | This adds support for integrated rt2400 devices that feature a | 61 | This adds support for integrated rt2400 hardware that features a |
59 | hardware button to control the radio state. | 62 | hardware button to control the radio state. |
60 | This feature depends on the RF switch subsystem rfkill. | 63 | This feature depends on the RF switch subsystem rfkill. |
61 | 64 | ||
62 | config RT2400PCI_LEDS | 65 | config RT2400PCI_LEDS |
63 | bool "RT2400 leds support" | 66 | bool "Ralink rt2400 leds support" |
64 | depends on RT2400PCI && NEW_LEDS | 67 | depends on RT2400PCI && NEW_LEDS |
65 | select LEDS_CLASS | 68 | select LEDS_CLASS |
66 | select RT2X00_LIB_LEDS | 69 | select RT2X00_LIB_LEDS |
@@ -68,26 +71,27 @@ config RT2400PCI_LEDS | |||
68 | This adds support for led triggers provided my mac80211. | 71 | This adds support for led triggers provided my mac80211. |
69 | 72 | ||
70 | config RT2500PCI | 73 | config RT2500PCI |
71 | tristate "Ralink rt2500 pci/pcmcia support" | 74 | tristate "Ralink rt2500 (PCI/PCMCIA) support" |
72 | depends on PCI | 75 | depends on PCI |
73 | select RT2X00_LIB_PCI | 76 | select RT2X00_LIB_PCI |
74 | select EEPROM_93CX6 | 77 | select EEPROM_93CX6 |
75 | ---help--- | 78 | ---help--- |
76 | This is an experimental driver for the Ralink rt2500 wireless chip. | 79 | This adds support for rt2500 wireless chipset family. |
80 | Supported chips: RT2560. | ||
77 | 81 | ||
78 | When compiled as a module, this driver will be called "rt2500pci.ko". | 82 | When compiled as a module, this driver will be called "rt2500pci.ko". |
79 | 83 | ||
80 | config RT2500PCI_RFKILL | 84 | config RT2500PCI_RFKILL |
81 | bool "RT2500 rfkill support" | 85 | bool "Ralink rt2500 rfkill support" |
82 | depends on RT2500PCI && INPUT | 86 | depends on RT2500PCI |
83 | select RT2X00_LIB_RFKILL | 87 | select RT2X00_LIB_RFKILL |
84 | ---help--- | 88 | ---help--- |
85 | This adds support for integrated rt2500 devices that feature a | 89 | This adds support for integrated rt2500 hardware that features a |
86 | hardware button to control the radio state. | 90 | hardware button to control the radio state. |
87 | This feature depends on the RF switch subsystem rfkill. | 91 | This feature depends on the RF switch subsystem rfkill. |
88 | 92 | ||
89 | config RT2500PCI_LEDS | 93 | config RT2500PCI_LEDS |
90 | bool "RT2500 leds support" | 94 | bool "Ralink rt2500 leds support" |
91 | depends on RT2500PCI && NEW_LEDS | 95 | depends on RT2500PCI && NEW_LEDS |
92 | select LEDS_CLASS | 96 | select LEDS_CLASS |
93 | select RT2X00_LIB_LEDS | 97 | select RT2X00_LIB_LEDS |
@@ -95,28 +99,29 @@ config RT2500PCI_LEDS | |||
95 | This adds support for led triggers provided my mac80211. | 99 | This adds support for led triggers provided my mac80211. |
96 | 100 | ||
97 | config RT61PCI | 101 | config RT61PCI |
98 | tristate "Ralink rt61 pci/pcmcia support" | 102 | tristate "Ralink rt2501/rt61 (PCI/PCMCIA) support" |
99 | depends on PCI | 103 | depends on PCI |
100 | select RT2X00_LIB_PCI | 104 | select RT2X00_LIB_PCI |
101 | select RT2X00_LIB_FIRMWARE | 105 | select RT2X00_LIB_FIRMWARE |
102 | select CRC_ITU_T | 106 | select CRC_ITU_T |
103 | select EEPROM_93CX6 | 107 | select EEPROM_93CX6 |
104 | ---help--- | 108 | ---help--- |
105 | This is an experimental driver for the Ralink rt61 wireless chip. | 109 | This adds support for rt2501 wireless chipset family. |
110 | Supported chips: RT2561, RT2561S & RT2661. | ||
106 | 111 | ||
107 | When compiled as a module, this driver will be called "rt61pci.ko". | 112 | When compiled as a module, this driver will be called "rt61pci.ko". |
108 | 113 | ||
109 | config RT61PCI_RFKILL | 114 | config RT61PCI_RFKILL |
110 | bool "RT61 rfkill support" | 115 | bool "Ralink rt2501/rt61 rfkill support" |
111 | depends on RT61PCI && INPUT | 116 | depends on RT61PCI |
112 | select RT2X00_LIB_RFKILL | 117 | select RT2X00_LIB_RFKILL |
113 | ---help--- | 118 | ---help--- |
114 | This adds support for integrated rt61 devices that feature a | 119 | This adds support for integrated rt61 hardware that features a |
115 | hardware button to control the radio state. | 120 | hardware button to control the radio state. |
116 | This feature depends on the RF switch subsystem rfkill. | 121 | This feature depends on the RF switch subsystem rfkill. |
117 | 122 | ||
118 | config RT61PCI_LEDS | 123 | config RT61PCI_LEDS |
119 | bool "RT61 leds support" | 124 | bool "Ralink rt2501/rt61 leds support" |
120 | depends on RT61PCI && NEW_LEDS | 125 | depends on RT61PCI && NEW_LEDS |
121 | select LEDS_CLASS | 126 | select LEDS_CLASS |
122 | select RT2X00_LIB_LEDS | 127 | select RT2X00_LIB_LEDS |
@@ -124,16 +129,17 @@ config RT61PCI_LEDS | |||
124 | This adds support for led triggers provided my mac80211. | 129 | This adds support for led triggers provided my mac80211. |
125 | 130 | ||
126 | config RT2500USB | 131 | config RT2500USB |
127 | tristate "Ralink rt2500 usb support" | 132 | tristate "Ralink rt2500 (USB) support" |
128 | depends on USB | 133 | depends on USB |
129 | select RT2X00_LIB_USB | 134 | select RT2X00_LIB_USB |
130 | ---help--- | 135 | ---help--- |
131 | This is an experimental driver for the Ralink rt2500 wireless chip. | 136 | This adds support for rt2500 wireless chipset family. |
137 | Supported chips: RT2571 & RT2572. | ||
132 | 138 | ||
133 | When compiled as a module, this driver will be called "rt2500usb.ko". | 139 | When compiled as a module, this driver will be called "rt2500usb.ko". |
134 | 140 | ||
135 | config RT2500USB_LEDS | 141 | config RT2500USB_LEDS |
136 | bool "RT2500 leds support" | 142 | bool "Ralink rt2500 leds support" |
137 | depends on RT2500USB && NEW_LEDS | 143 | depends on RT2500USB && NEW_LEDS |
138 | select LEDS_CLASS | 144 | select LEDS_CLASS |
139 | select RT2X00_LIB_LEDS | 145 | select RT2X00_LIB_LEDS |
@@ -141,18 +147,19 @@ config RT2500USB_LEDS | |||
141 | This adds support for led triggers provided my mac80211. | 147 | This adds support for led triggers provided my mac80211. |
142 | 148 | ||
143 | config RT73USB | 149 | config RT73USB |
144 | tristate "Ralink rt73 usb support" | 150 | tristate "Ralink rt2501/rt73 (USB) support" |
145 | depends on USB | 151 | depends on USB |
146 | select RT2X00_LIB_USB | 152 | select RT2X00_LIB_USB |
147 | select RT2X00_LIB_FIRMWARE | 153 | select RT2X00_LIB_FIRMWARE |
148 | select CRC_ITU_T | 154 | select CRC_ITU_T |
149 | ---help--- | 155 | ---help--- |
150 | This is an experimental driver for the Ralink rt73 wireless chip. | 156 | This adds support for rt2501 wireless chipset family. |
157 | Supported chips: RT2571W, RT2573 & RT2671. | ||
151 | 158 | ||
152 | When compiled as a module, this driver will be called "rt73usb.ko". | 159 | When compiled as a module, this driver will be called "rt73usb.ko". |
153 | 160 | ||
154 | config RT73USB_LEDS | 161 | config RT73USB_LEDS |
155 | bool "RT73 leds support" | 162 | bool "Ralink rt2501/rt73 leds support" |
156 | depends on RT73USB && NEW_LEDS | 163 | depends on RT73USB && NEW_LEDS |
157 | select LEDS_CLASS | 164 | select LEDS_CLASS |
158 | select RT2X00_LIB_LEDS | 165 | select RT2X00_LIB_LEDS |
@@ -165,7 +172,7 @@ config RT2X00_LIB_DEBUGFS | |||
165 | ---help--- | 172 | ---help--- |
166 | Enable creation of debugfs files for the rt2x00 drivers. | 173 | Enable creation of debugfs files for the rt2x00 drivers. |
167 | These debugfs files support both reading and writing of the | 174 | These debugfs files support both reading and writing of the |
168 | most important register types of the rt2x00 devices. | 175 | most important register types of the rt2x00 hardware. |
169 | 176 | ||
170 | config RT2X00_DEBUG | 177 | config RT2X00_DEBUG |
171 | bool "Ralink debug output" | 178 | bool "Ralink debug output" |
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c index b36ed1c6c746..4c0538d6099b 100644 --- a/drivers/net/wireless/rt2x00/rt2400pci.c +++ b/drivers/net/wireless/rt2x00/rt2400pci.c | |||
@@ -277,6 +277,17 @@ static int rt2400pci_blink_set(struct led_classdev *led_cdev, | |||
277 | 277 | ||
278 | return 0; | 278 | return 0; |
279 | } | 279 | } |
280 | |||
281 | static void rt2400pci_init_led(struct rt2x00_dev *rt2x00dev, | ||
282 | struct rt2x00_led *led, | ||
283 | enum led_type type) | ||
284 | { | ||
285 | led->rt2x00dev = rt2x00dev; | ||
286 | led->type = type; | ||
287 | led->led_dev.brightness_set = rt2400pci_brightness_set; | ||
288 | led->led_dev.blink_set = rt2400pci_blink_set; | ||
289 | led->flags = LED_INITIALIZED; | ||
290 | } | ||
280 | #endif /* CONFIG_RT2400PCI_LEDS */ | 291 | #endif /* CONFIG_RT2400PCI_LEDS */ |
281 | 292 | ||
282 | /* | 293 | /* |
@@ -620,48 +631,38 @@ static void rt2400pci_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
620 | static void rt2400pci_init_rxentry(struct rt2x00_dev *rt2x00dev, | 631 | static void rt2400pci_init_rxentry(struct rt2x00_dev *rt2x00dev, |
621 | struct queue_entry *entry) | 632 | struct queue_entry *entry) |
622 | { | 633 | { |
623 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; | 634 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
635 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
624 | u32 word; | 636 | u32 word; |
625 | 637 | ||
626 | rt2x00_desc_read(priv_rx->desc, 2, &word); | 638 | rt2x00_desc_read(entry_priv->desc, 2, &word); |
627 | rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH, | 639 | rt2x00_set_field32(&word, RXD_W2_BUFFER_LENGTH, entry->skb->len); |
628 | entry->queue->data_size); | 640 | rt2x00_desc_write(entry_priv->desc, 2, word); |
629 | rt2x00_desc_write(priv_rx->desc, 2, word); | ||
630 | 641 | ||
631 | rt2x00_desc_read(priv_rx->desc, 1, &word); | 642 | rt2x00_desc_read(entry_priv->desc, 1, &word); |
632 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->data_dma); | 643 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); |
633 | rt2x00_desc_write(priv_rx->desc, 1, word); | 644 | rt2x00_desc_write(entry_priv->desc, 1, word); |
634 | 645 | ||
635 | rt2x00_desc_read(priv_rx->desc, 0, &word); | 646 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
636 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); | 647 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); |
637 | rt2x00_desc_write(priv_rx->desc, 0, word); | 648 | rt2x00_desc_write(entry_priv->desc, 0, word); |
638 | } | 649 | } |
639 | 650 | ||
640 | static void rt2400pci_init_txentry(struct rt2x00_dev *rt2x00dev, | 651 | static void rt2400pci_init_txentry(struct rt2x00_dev *rt2x00dev, |
641 | struct queue_entry *entry) | 652 | struct queue_entry *entry) |
642 | { | 653 | { |
643 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; | 654 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
644 | u32 word; | 655 | u32 word; |
645 | 656 | ||
646 | rt2x00_desc_read(priv_tx->desc, 1, &word); | 657 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
647 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->data_dma); | ||
648 | rt2x00_desc_write(priv_tx->desc, 1, word); | ||
649 | |||
650 | rt2x00_desc_read(priv_tx->desc, 2, &word); | ||
651 | rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, | ||
652 | entry->queue->data_size); | ||
653 | rt2x00_desc_write(priv_tx->desc, 2, word); | ||
654 | |||
655 | rt2x00_desc_read(priv_tx->desc, 0, &word); | ||
656 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); | 658 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); |
657 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); | 659 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); |
658 | rt2x00_desc_write(priv_tx->desc, 0, word); | 660 | rt2x00_desc_write(entry_priv->desc, 0, word); |
659 | } | 661 | } |
660 | 662 | ||
661 | static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev) | 663 | static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev) |
662 | { | 664 | { |
663 | struct queue_entry_priv_pci_rx *priv_rx; | 665 | struct queue_entry_priv_pci *entry_priv; |
664 | struct queue_entry_priv_pci_tx *priv_tx; | ||
665 | u32 reg; | 666 | u32 reg; |
666 | 667 | ||
667 | /* | 668 | /* |
@@ -674,28 +675,28 @@ static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev) | |||
674 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); | 675 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); |
675 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); | 676 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); |
676 | 677 | ||
677 | priv_tx = rt2x00dev->tx[1].entries[0].priv_data; | 678 | entry_priv = rt2x00dev->tx[1].entries[0].priv_data; |
678 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); | 679 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); |
679 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, | 680 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, |
680 | priv_tx->desc_dma); | 681 | entry_priv->desc_dma); |
681 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); | 682 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); |
682 | 683 | ||
683 | priv_tx = rt2x00dev->tx[0].entries[0].priv_data; | 684 | entry_priv = rt2x00dev->tx[0].entries[0].priv_data; |
684 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); | 685 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); |
685 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, | 686 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, |
686 | priv_tx->desc_dma); | 687 | entry_priv->desc_dma); |
687 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); | 688 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); |
688 | 689 | ||
689 | priv_tx = rt2x00dev->bcn[1].entries[0].priv_data; | 690 | entry_priv = rt2x00dev->bcn[1].entries[0].priv_data; |
690 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); | 691 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); |
691 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, | 692 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, |
692 | priv_tx->desc_dma); | 693 | entry_priv->desc_dma); |
693 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); | 694 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); |
694 | 695 | ||
695 | priv_tx = rt2x00dev->bcn[0].entries[0].priv_data; | 696 | entry_priv = rt2x00dev->bcn[0].entries[0].priv_data; |
696 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); | 697 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); |
697 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, | 698 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, |
698 | priv_tx->desc_dma); | 699 | entry_priv->desc_dma); |
699 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); | 700 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); |
700 | 701 | ||
701 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); | 702 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); |
@@ -703,9 +704,10 @@ static int rt2400pci_init_queues(struct rt2x00_dev *rt2x00dev) | |||
703 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); | 704 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); |
704 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); | 705 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); |
705 | 706 | ||
706 | priv_rx = rt2x00dev->rx->entries[0].priv_data; | 707 | entry_priv = rt2x00dev->rx->entries[0].priv_data; |
707 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); | 708 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); |
708 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_rx->desc_dma); | 709 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, |
710 | entry_priv->desc_dma); | ||
709 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); | 711 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); |
710 | 712 | ||
711 | return 0; | 713 | return 0; |
@@ -801,25 +803,32 @@ static int rt2400pci_init_registers(struct rt2x00_dev *rt2x00dev) | |||
801 | return 0; | 803 | return 0; |
802 | } | 804 | } |
803 | 805 | ||
804 | static int rt2400pci_init_bbp(struct rt2x00_dev *rt2x00dev) | 806 | static int rt2400pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
805 | { | 807 | { |
806 | unsigned int i; | 808 | unsigned int i; |
807 | u16 eeprom; | ||
808 | u8 reg_id; | ||
809 | u8 value; | 809 | u8 value; |
810 | 810 | ||
811 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 811 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
812 | rt2400pci_bbp_read(rt2x00dev, 0, &value); | 812 | rt2400pci_bbp_read(rt2x00dev, 0, &value); |
813 | if ((value != 0xff) && (value != 0x00)) | 813 | if ((value != 0xff) && (value != 0x00)) |
814 | goto continue_csr_init; | 814 | return 0; |
815 | NOTICE(rt2x00dev, "Waiting for BBP register.\n"); | ||
816 | udelay(REGISTER_BUSY_DELAY); | 815 | udelay(REGISTER_BUSY_DELAY); |
817 | } | 816 | } |
818 | 817 | ||
819 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | 818 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); |
820 | return -EACCES; | 819 | return -EACCES; |
820 | } | ||
821 | |||
822 | static int rt2400pci_init_bbp(struct rt2x00_dev *rt2x00dev) | ||
823 | { | ||
824 | unsigned int i; | ||
825 | u16 eeprom; | ||
826 | u8 reg_id; | ||
827 | u8 value; | ||
828 | |||
829 | if (unlikely(rt2400pci_wait_bbp_ready(rt2x00dev))) | ||
830 | return -EACCES; | ||
821 | 831 | ||
822 | continue_csr_init: | ||
823 | rt2400pci_bbp_write(rt2x00dev, 1, 0x00); | 832 | rt2400pci_bbp_write(rt2x00dev, 1, 0x00); |
824 | rt2400pci_bbp_write(rt2x00dev, 3, 0x27); | 833 | rt2400pci_bbp_write(rt2x00dev, 3, 0x27); |
825 | rt2400pci_bbp_write(rt2x00dev, 4, 0x08); | 834 | rt2400pci_bbp_write(rt2x00dev, 4, 0x08); |
@@ -858,7 +867,8 @@ static void rt2400pci_toggle_rx(struct rt2x00_dev *rt2x00dev, | |||
858 | 867 | ||
859 | rt2x00pci_register_read(rt2x00dev, RXCSR0, ®); | 868 | rt2x00pci_register_read(rt2x00dev, RXCSR0, ®); |
860 | rt2x00_set_field32(®, RXCSR0_DISABLE_RX, | 869 | rt2x00_set_field32(®, RXCSR0_DISABLE_RX, |
861 | state == STATE_RADIO_RX_OFF); | 870 | (state == STATE_RADIO_RX_OFF) || |
871 | (state == STATE_RADIO_RX_OFF_LINK)); | ||
862 | rt2x00pci_register_write(rt2x00dev, RXCSR0, reg); | 872 | rt2x00pci_register_write(rt2x00dev, RXCSR0, reg); |
863 | } | 873 | } |
864 | 874 | ||
@@ -895,17 +905,10 @@ static int rt2400pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
895 | /* | 905 | /* |
896 | * Initialize all registers. | 906 | * Initialize all registers. |
897 | */ | 907 | */ |
898 | if (rt2400pci_init_queues(rt2x00dev) || | 908 | if (unlikely(rt2400pci_init_queues(rt2x00dev) || |
899 | rt2400pci_init_registers(rt2x00dev) || | 909 | rt2400pci_init_registers(rt2x00dev) || |
900 | rt2400pci_init_bbp(rt2x00dev)) { | 910 | rt2400pci_init_bbp(rt2x00dev))) |
901 | ERROR(rt2x00dev, "Register initialization failed.\n"); | ||
902 | return -EIO; | 911 | return -EIO; |
903 | } | ||
904 | |||
905 | /* | ||
906 | * Enable interrupts. | ||
907 | */ | ||
908 | rt2400pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_ON); | ||
909 | 912 | ||
910 | return 0; | 913 | return 0; |
911 | } | 914 | } |
@@ -927,11 +930,6 @@ static void rt2400pci_disable_radio(struct rt2x00_dev *rt2x00dev) | |||
927 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); | 930 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); |
928 | rt2x00_set_field32(®, TXCSR0_ABORT, 1); | 931 | rt2x00_set_field32(®, TXCSR0_ABORT, 1); |
929 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); | 932 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); |
930 | |||
931 | /* | ||
932 | * Disable interrupts. | ||
933 | */ | ||
934 | rt2400pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_OFF); | ||
935 | } | 933 | } |
936 | 934 | ||
937 | static int rt2400pci_set_state(struct rt2x00_dev *rt2x00dev, | 935 | static int rt2400pci_set_state(struct rt2x00_dev *rt2x00dev, |
@@ -966,10 +964,6 @@ static int rt2400pci_set_state(struct rt2x00_dev *rt2x00dev, | |||
966 | msleep(10); | 964 | msleep(10); |
967 | } | 965 | } |
968 | 966 | ||
969 | NOTICE(rt2x00dev, "Device failed to enter state %d, " | ||
970 | "current device state: bbp %d and rf %d.\n", | ||
971 | state, bbp_state, rf_state); | ||
972 | |||
973 | return -EBUSY; | 967 | return -EBUSY; |
974 | } | 968 | } |
975 | 969 | ||
@@ -987,11 +981,13 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
987 | break; | 981 | break; |
988 | case STATE_RADIO_RX_ON: | 982 | case STATE_RADIO_RX_ON: |
989 | case STATE_RADIO_RX_ON_LINK: | 983 | case STATE_RADIO_RX_ON_LINK: |
990 | rt2400pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); | ||
991 | break; | ||
992 | case STATE_RADIO_RX_OFF: | 984 | case STATE_RADIO_RX_OFF: |
993 | case STATE_RADIO_RX_OFF_LINK: | 985 | case STATE_RADIO_RX_OFF_LINK: |
994 | rt2400pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); | 986 | rt2400pci_toggle_rx(rt2x00dev, state); |
987 | break; | ||
988 | case STATE_RADIO_IRQ_ON: | ||
989 | case STATE_RADIO_IRQ_OFF: | ||
990 | rt2400pci_toggle_irq(rt2x00dev, state); | ||
995 | break; | 991 | break; |
996 | case STATE_DEEP_SLEEP: | 992 | case STATE_DEEP_SLEEP: |
997 | case STATE_SLEEP: | 993 | case STATE_SLEEP: |
@@ -1004,6 +1000,10 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1004 | break; | 1000 | break; |
1005 | } | 1001 | } |
1006 | 1002 | ||
1003 | if (unlikely(retval)) | ||
1004 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | ||
1005 | state, retval); | ||
1006 | |||
1007 | return retval; | 1007 | return retval; |
1008 | } | 1008 | } |
1009 | 1009 | ||
@@ -1012,18 +1012,23 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1012 | */ | 1012 | */ |
1013 | static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1013 | static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1014 | struct sk_buff *skb, | 1014 | struct sk_buff *skb, |
1015 | struct txentry_desc *txdesc, | 1015 | struct txentry_desc *txdesc) |
1016 | struct ieee80211_tx_control *control) | ||
1017 | { | 1016 | { |
1018 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1017 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1018 | struct queue_entry_priv_pci *entry_priv = skbdesc->entry->priv_data; | ||
1019 | __le32 *txd = skbdesc->desc; | 1019 | __le32 *txd = skbdesc->desc; |
1020 | u32 word; | 1020 | u32 word; |
1021 | 1021 | ||
1022 | /* | 1022 | /* |
1023 | * Start writing the descriptor words. | 1023 | * Start writing the descriptor words. |
1024 | */ | 1024 | */ |
1025 | rt2x00_desc_read(entry_priv->desc, 1, &word); | ||
1026 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); | ||
1027 | rt2x00_desc_write(entry_priv->desc, 1, word); | ||
1028 | |||
1025 | rt2x00_desc_read(txd, 2, &word); | 1029 | rt2x00_desc_read(txd, 2, &word); |
1026 | rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, skbdesc->data_len); | 1030 | rt2x00_set_field32(&word, TXD_W2_BUFFER_LENGTH, skb->len); |
1031 | rt2x00_set_field32(&word, TXD_W2_DATABYTE_COUNT, skb->len); | ||
1027 | rt2x00_desc_write(txd, 2, word); | 1032 | rt2x00_desc_write(txd, 2, word); |
1028 | 1033 | ||
1029 | rt2x00_desc_read(txd, 3, &word); | 1034 | rt2x00_desc_read(txd, 3, &word); |
@@ -1057,20 +1062,53 @@ static void rt2400pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1057 | test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)); | 1062 | test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)); |
1058 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1063 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1059 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1064 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1060 | !!(control->flags & | 1065 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); |
1061 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | ||
1062 | rt2x00_desc_write(txd, 0, word); | 1066 | rt2x00_desc_write(txd, 0, word); |
1063 | } | 1067 | } |
1064 | 1068 | ||
1065 | /* | 1069 | /* |
1066 | * TX data initialization | 1070 | * TX data initialization |
1067 | */ | 1071 | */ |
1072 | static void rt2400pci_write_beacon(struct queue_entry *entry) | ||
1073 | { | ||
1074 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
1075 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; | ||
1076 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1077 | u32 word; | ||
1078 | u32 reg; | ||
1079 | |||
1080 | /* | ||
1081 | * Disable beaconing while we are reloading the beacon data, | ||
1082 | * otherwise we might be sending out invalid data. | ||
1083 | */ | ||
1084 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | ||
1085 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 0); | ||
1086 | rt2x00_set_field32(®, CSR14_TBCN, 0); | ||
1087 | rt2x00_set_field32(®, CSR14_BEACON_GEN, 0); | ||
1088 | rt2x00pci_register_write(rt2x00dev, CSR14, reg); | ||
1089 | |||
1090 | /* | ||
1091 | * Replace rt2x00lib allocated descriptor with the | ||
1092 | * pointer to the _real_ hardware descriptor. | ||
1093 | * After that, map the beacon to DMA and update the | ||
1094 | * descriptor. | ||
1095 | */ | ||
1096 | memcpy(entry_priv->desc, skbdesc->desc, skbdesc->desc_len); | ||
1097 | skbdesc->desc = entry_priv->desc; | ||
1098 | |||
1099 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); | ||
1100 | |||
1101 | rt2x00_desc_read(entry_priv->desc, 1, &word); | ||
1102 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); | ||
1103 | rt2x00_desc_write(entry_priv->desc, 1, word); | ||
1104 | } | ||
1105 | |||
1068 | static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | 1106 | static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
1069 | const unsigned int queue) | 1107 | const enum data_queue_qid queue) |
1070 | { | 1108 | { |
1071 | u32 reg; | 1109 | u32 reg; |
1072 | 1110 | ||
1073 | if (queue == RT2X00_BCN_QUEUE_BEACON) { | 1111 | if (queue == QID_BEACON) { |
1074 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | 1112 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); |
1075 | if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) { | 1113 | if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) { |
1076 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 1); | 1114 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 1); |
@@ -1082,12 +1120,9 @@ static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1082 | } | 1120 | } |
1083 | 1121 | ||
1084 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); | 1122 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); |
1085 | rt2x00_set_field32(®, TXCSR0_KICK_PRIO, | 1123 | rt2x00_set_field32(®, TXCSR0_KICK_PRIO, (queue == QID_AC_BE)); |
1086 | (queue == IEEE80211_TX_QUEUE_DATA0)); | 1124 | rt2x00_set_field32(®, TXCSR0_KICK_TX, (queue == QID_AC_BK)); |
1087 | rt2x00_set_field32(®, TXCSR0_KICK_TX, | 1125 | rt2x00_set_field32(®, TXCSR0_KICK_ATIM, (queue == QID_ATIM)); |
1088 | (queue == IEEE80211_TX_QUEUE_DATA1)); | ||
1089 | rt2x00_set_field32(®, TXCSR0_KICK_ATIM, | ||
1090 | (queue == RT2X00_BCN_QUEUE_ATIM)); | ||
1091 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); | 1126 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); |
1092 | } | 1127 | } |
1093 | 1128 | ||
@@ -1097,32 +1132,54 @@ static void rt2400pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1097 | static void rt2400pci_fill_rxdone(struct queue_entry *entry, | 1132 | static void rt2400pci_fill_rxdone(struct queue_entry *entry, |
1098 | struct rxdone_entry_desc *rxdesc) | 1133 | struct rxdone_entry_desc *rxdesc) |
1099 | { | 1134 | { |
1100 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; | 1135 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
1136 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; | ||
1101 | u32 word0; | 1137 | u32 word0; |
1102 | u32 word2; | 1138 | u32 word2; |
1103 | u32 word3; | 1139 | u32 word3; |
1140 | u32 word4; | ||
1141 | u64 tsf; | ||
1142 | u32 rx_low; | ||
1143 | u32 rx_high; | ||
1104 | 1144 | ||
1105 | rt2x00_desc_read(priv_rx->desc, 0, &word0); | 1145 | rt2x00_desc_read(entry_priv->desc, 0, &word0); |
1106 | rt2x00_desc_read(priv_rx->desc, 2, &word2); | 1146 | rt2x00_desc_read(entry_priv->desc, 2, &word2); |
1107 | rt2x00_desc_read(priv_rx->desc, 3, &word3); | 1147 | rt2x00_desc_read(entry_priv->desc, 3, &word3); |
1148 | rt2x00_desc_read(entry_priv->desc, 4, &word4); | ||
1108 | 1149 | ||
1109 | rxdesc->flags = 0; | ||
1110 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1150 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1111 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1151 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1112 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) | 1152 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
1113 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; | 1153 | rxdesc->flags |= RX_FLAG_FAILED_PLCP_CRC; |
1114 | 1154 | ||
1115 | /* | 1155 | /* |
1156 | * We only get the lower 32bits from the timestamp, | ||
1157 | * to get the full 64bits we must complement it with | ||
1158 | * the timestamp from get_tsf(). | ||
1159 | * Note that when a wraparound of the lower 32bits | ||
1160 | * has occurred between the frame arrival and the get_tsf() | ||
1161 | * call, we must decrease the higher 32bits with 1 to get | ||
1162 | * to correct value. | ||
1163 | */ | ||
1164 | tsf = rt2x00dev->ops->hw->get_tsf(rt2x00dev->hw); | ||
1165 | rx_low = rt2x00_get_field32(word4, RXD_W4_RX_END_TIME); | ||
1166 | rx_high = upper_32_bits(tsf); | ||
1167 | |||
1168 | if ((u32)tsf <= rx_low) | ||
1169 | rx_high--; | ||
1170 | |||
1171 | /* | ||
1116 | * Obtain the status about this packet. | 1172 | * Obtain the status about this packet. |
1117 | * The signal is the PLCP value, and needs to be stripped | 1173 | * The signal is the PLCP value, and needs to be stripped |
1118 | * of the preamble bit (0x08). | 1174 | * of the preamble bit (0x08). |
1119 | */ | 1175 | */ |
1176 | rxdesc->timestamp = ((u64)rx_high << 32) | rx_low; | ||
1120 | rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL) & ~0x08; | 1177 | rxdesc->signal = rt2x00_get_field32(word2, RXD_W2_SIGNAL) & ~0x08; |
1121 | rxdesc->rssi = rt2x00_get_field32(word2, RXD_W3_RSSI) - | 1178 | rxdesc->rssi = rt2x00_get_field32(word2, RXD_W3_RSSI) - |
1122 | entry->queue->rt2x00dev->rssi_offset; | 1179 | entry->queue->rt2x00dev->rssi_offset; |
1123 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1180 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1124 | 1181 | ||
1125 | rxdesc->dev_flags = RXDONE_SIGNAL_PLCP; | 1182 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; |
1126 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) | 1183 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
1127 | rxdesc->dev_flags |= RXDONE_MY_BSS; | 1184 | rxdesc->dev_flags |= RXDONE_MY_BSS; |
1128 | } | 1185 | } |
@@ -1131,18 +1188,18 @@ static void rt2400pci_fill_rxdone(struct queue_entry *entry, | |||
1131 | * Interrupt functions. | 1188 | * Interrupt functions. |
1132 | */ | 1189 | */ |
1133 | static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, | 1190 | static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, |
1134 | const enum ieee80211_tx_queue queue_idx) | 1191 | const enum data_queue_qid queue_idx) |
1135 | { | 1192 | { |
1136 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); | 1193 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); |
1137 | struct queue_entry_priv_pci_tx *priv_tx; | 1194 | struct queue_entry_priv_pci *entry_priv; |
1138 | struct queue_entry *entry; | 1195 | struct queue_entry *entry; |
1139 | struct txdone_entry_desc txdesc; | 1196 | struct txdone_entry_desc txdesc; |
1140 | u32 word; | 1197 | u32 word; |
1141 | 1198 | ||
1142 | while (!rt2x00queue_empty(queue)) { | 1199 | while (!rt2x00queue_empty(queue)) { |
1143 | entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); | 1200 | entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
1144 | priv_tx = entry->priv_data; | 1201 | entry_priv = entry->priv_data; |
1145 | rt2x00_desc_read(priv_tx->desc, 0, &word); | 1202 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
1146 | 1203 | ||
1147 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || | 1204 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || |
1148 | !rt2x00_get_field32(word, TXD_W0_VALID)) | 1205 | !rt2x00_get_field32(word, TXD_W0_VALID)) |
@@ -1151,10 +1208,21 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev, | |||
1151 | /* | 1208 | /* |
1152 | * Obtain the status about this packet. | 1209 | * Obtain the status about this packet. |
1153 | */ | 1210 | */ |
1154 | txdesc.status = rt2x00_get_field32(word, TXD_W0_RESULT); | 1211 | txdesc.flags = 0; |
1212 | switch (rt2x00_get_field32(word, TXD_W0_RESULT)) { | ||
1213 | case 0: /* Success */ | ||
1214 | case 1: /* Success with retry */ | ||
1215 | __set_bit(TXDONE_SUCCESS, &txdesc.flags); | ||
1216 | break; | ||
1217 | case 2: /* Failure, excessive retries */ | ||
1218 | __set_bit(TXDONE_EXCESSIVE_RETRY, &txdesc.flags); | ||
1219 | /* Don't break, this is a failed frame! */ | ||
1220 | default: /* Failure */ | ||
1221 | __set_bit(TXDONE_FAILURE, &txdesc.flags); | ||
1222 | } | ||
1155 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); | 1223 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); |
1156 | 1224 | ||
1157 | rt2x00pci_txdone(rt2x00dev, entry, &txdesc); | 1225 | rt2x00lib_txdone(entry, &txdesc); |
1158 | } | 1226 | } |
1159 | } | 1227 | } |
1160 | 1228 | ||
@@ -1198,19 +1266,19 @@ static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance) | |||
1198 | * 3 - Atim ring transmit done interrupt. | 1266 | * 3 - Atim ring transmit done interrupt. |
1199 | */ | 1267 | */ |
1200 | if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING)) | 1268 | if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING)) |
1201 | rt2400pci_txdone(rt2x00dev, RT2X00_BCN_QUEUE_ATIM); | 1269 | rt2400pci_txdone(rt2x00dev, QID_ATIM); |
1202 | 1270 | ||
1203 | /* | 1271 | /* |
1204 | * 4 - Priority ring transmit done interrupt. | 1272 | * 4 - Priority ring transmit done interrupt. |
1205 | */ | 1273 | */ |
1206 | if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING)) | 1274 | if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING)) |
1207 | rt2400pci_txdone(rt2x00dev, IEEE80211_TX_QUEUE_DATA0); | 1275 | rt2400pci_txdone(rt2x00dev, QID_AC_BE); |
1208 | 1276 | ||
1209 | /* | 1277 | /* |
1210 | * 5 - Tx ring transmit done interrupt. | 1278 | * 5 - Tx ring transmit done interrupt. |
1211 | */ | 1279 | */ |
1212 | if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) | 1280 | if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) |
1213 | rt2400pci_txdone(rt2x00dev, IEEE80211_TX_QUEUE_DATA1); | 1281 | rt2400pci_txdone(rt2x00dev, QID_AC_BK); |
1214 | 1282 | ||
1215 | return IRQ_HANDLED; | 1283 | return IRQ_HANDLED; |
1216 | } | 1284 | } |
@@ -1309,23 +1377,10 @@ static int rt2400pci_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1309 | #ifdef CONFIG_RT2400PCI_LEDS | 1377 | #ifdef CONFIG_RT2400PCI_LEDS |
1310 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); | 1378 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
1311 | 1379 | ||
1312 | rt2x00dev->led_radio.rt2x00dev = rt2x00dev; | 1380 | rt2400pci_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
1313 | rt2x00dev->led_radio.type = LED_TYPE_RADIO; | 1381 | if (value == LED_MODE_TXRX_ACTIVITY) |
1314 | rt2x00dev->led_radio.led_dev.brightness_set = | 1382 | rt2400pci_init_led(rt2x00dev, &rt2x00dev->led_qual, |
1315 | rt2400pci_brightness_set; | 1383 | LED_TYPE_ACTIVITY); |
1316 | rt2x00dev->led_radio.led_dev.blink_set = | ||
1317 | rt2400pci_blink_set; | ||
1318 | rt2x00dev->led_radio.flags = LED_INITIALIZED; | ||
1319 | |||
1320 | if (value == LED_MODE_TXRX_ACTIVITY) { | ||
1321 | rt2x00dev->led_qual.rt2x00dev = rt2x00dev; | ||
1322 | rt2x00dev->led_qual.type = LED_TYPE_ACTIVITY; | ||
1323 | rt2x00dev->led_qual.led_dev.brightness_set = | ||
1324 | rt2400pci_brightness_set; | ||
1325 | rt2x00dev->led_qual.led_dev.blink_set = | ||
1326 | rt2400pci_blink_set; | ||
1327 | rt2x00dev->led_qual.flags = LED_INITIALIZED; | ||
1328 | } | ||
1329 | #endif /* CONFIG_RT2400PCI_LEDS */ | 1384 | #endif /* CONFIG_RT2400PCI_LEDS */ |
1330 | 1385 | ||
1331 | /* | 1386 | /* |
@@ -1375,13 +1430,11 @@ static void rt2400pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
1375 | /* | 1430 | /* |
1376 | * Initialize all hw fields. | 1431 | * Initialize all hw fields. |
1377 | */ | 1432 | */ |
1378 | rt2x00dev->hw->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; | 1433 | rt2x00dev->hw->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1434 | IEEE80211_HW_SIGNAL_DBM; | ||
1379 | rt2x00dev->hw->extra_tx_headroom = 0; | 1435 | rt2x00dev->hw->extra_tx_headroom = 0; |
1380 | rt2x00dev->hw->max_signal = MAX_SIGNAL; | ||
1381 | rt2x00dev->hw->max_rssi = MAX_RX_SSI; | ||
1382 | rt2x00dev->hw->queues = 2; | ||
1383 | 1436 | ||
1384 | SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_pci(rt2x00dev)->dev); | 1437 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
1385 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, | 1438 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
1386 | rt2x00_eeprom_addr(rt2x00dev, | 1439 | rt2x00_eeprom_addr(rt2x00dev, |
1387 | EEPROM_MAC_ADDR_0)); | 1440 | EEPROM_MAC_ADDR_0)); |
@@ -1427,9 +1480,10 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1427 | rt2400pci_probe_hw_mode(rt2x00dev); | 1480 | rt2400pci_probe_hw_mode(rt2x00dev); |
1428 | 1481 | ||
1429 | /* | 1482 | /* |
1430 | * This device requires the atim queue | 1483 | * This device requires the atim queue and DMA-mapped skbs. |
1431 | */ | 1484 | */ |
1432 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | 1485 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1486 | __set_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags); | ||
1433 | 1487 | ||
1434 | /* | 1488 | /* |
1435 | * Set the rssi offset. | 1489 | * Set the rssi offset. |
@@ -1456,8 +1510,7 @@ static int rt2400pci_set_retry_limit(struct ieee80211_hw *hw, | |||
1456 | return 0; | 1510 | return 0; |
1457 | } | 1511 | } |
1458 | 1512 | ||
1459 | static int rt2400pci_conf_tx(struct ieee80211_hw *hw, | 1513 | static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue, |
1460 | int queue, | ||
1461 | const struct ieee80211_tx_queue_params *params) | 1514 | const struct ieee80211_tx_queue_params *params) |
1462 | { | 1515 | { |
1463 | struct rt2x00_dev *rt2x00dev = hw->priv; | 1516 | struct rt2x00_dev *rt2x00dev = hw->priv; |
@@ -1467,7 +1520,7 @@ static int rt2400pci_conf_tx(struct ieee80211_hw *hw, | |||
1467 | * per queue. So by default we only configure the TX queue, | 1520 | * per queue. So by default we only configure the TX queue, |
1468 | * and ignore all other configurations. | 1521 | * and ignore all other configurations. |
1469 | */ | 1522 | */ |
1470 | if (queue != IEEE80211_TX_QUEUE_DATA0) | 1523 | if (queue != 0) |
1471 | return -EINVAL; | 1524 | return -EINVAL; |
1472 | 1525 | ||
1473 | if (rt2x00mac_conf_tx(hw, queue, params)) | 1526 | if (rt2x00mac_conf_tx(hw, queue, params)) |
@@ -1496,60 +1549,6 @@ static u64 rt2400pci_get_tsf(struct ieee80211_hw *hw) | |||
1496 | return tsf; | 1549 | return tsf; |
1497 | } | 1550 | } |
1498 | 1551 | ||
1499 | static int rt2400pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | ||
1500 | struct ieee80211_tx_control *control) | ||
1501 | { | ||
1502 | struct rt2x00_dev *rt2x00dev = hw->priv; | ||
1503 | struct rt2x00_intf *intf = vif_to_intf(control->vif); | ||
1504 | struct queue_entry_priv_pci_tx *priv_tx; | ||
1505 | struct skb_frame_desc *skbdesc; | ||
1506 | u32 reg; | ||
1507 | |||
1508 | if (unlikely(!intf->beacon)) | ||
1509 | return -ENOBUFS; | ||
1510 | priv_tx = intf->beacon->priv_data; | ||
1511 | |||
1512 | /* | ||
1513 | * Fill in skb descriptor | ||
1514 | */ | ||
1515 | skbdesc = get_skb_frame_desc(skb); | ||
1516 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
1517 | skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED; | ||
1518 | skbdesc->data = skb->data; | ||
1519 | skbdesc->data_len = skb->len; | ||
1520 | skbdesc->desc = priv_tx->desc; | ||
1521 | skbdesc->desc_len = intf->beacon->queue->desc_size; | ||
1522 | skbdesc->entry = intf->beacon; | ||
1523 | |||
1524 | /* | ||
1525 | * Disable beaconing while we are reloading the beacon data, | ||
1526 | * otherwise we might be sending out invalid data. | ||
1527 | */ | ||
1528 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | ||
1529 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 0); | ||
1530 | rt2x00_set_field32(®, CSR14_TBCN, 0); | ||
1531 | rt2x00_set_field32(®, CSR14_BEACON_GEN, 0); | ||
1532 | rt2x00pci_register_write(rt2x00dev, CSR14, reg); | ||
1533 | |||
1534 | /* | ||
1535 | * mac80211 doesn't provide the control->queue variable | ||
1536 | * for beacons. Set our own queue identification so | ||
1537 | * it can be used during descriptor initialization. | ||
1538 | */ | ||
1539 | control->queue = RT2X00_BCN_QUEUE_BEACON; | ||
1540 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
1541 | |||
1542 | /* | ||
1543 | * Enable beacon generation. | ||
1544 | * Write entire beacon with descriptor to register, | ||
1545 | * and kick the beacon generator. | ||
1546 | */ | ||
1547 | memcpy(priv_tx->data, skb->data, skb->len); | ||
1548 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue); | ||
1549 | |||
1550 | return 0; | ||
1551 | } | ||
1552 | |||
1553 | static int rt2400pci_tx_last_beacon(struct ieee80211_hw *hw) | 1552 | static int rt2400pci_tx_last_beacon(struct ieee80211_hw *hw) |
1554 | { | 1553 | { |
1555 | struct rt2x00_dev *rt2x00dev = hw->priv; | 1554 | struct rt2x00_dev *rt2x00dev = hw->priv; |
@@ -1574,7 +1573,6 @@ static const struct ieee80211_ops rt2400pci_mac80211_ops = { | |||
1574 | .conf_tx = rt2400pci_conf_tx, | 1573 | .conf_tx = rt2400pci_conf_tx, |
1575 | .get_tx_stats = rt2x00mac_get_tx_stats, | 1574 | .get_tx_stats = rt2x00mac_get_tx_stats, |
1576 | .get_tsf = rt2400pci_get_tsf, | 1575 | .get_tsf = rt2400pci_get_tsf, |
1577 | .beacon_update = rt2400pci_beacon_update, | ||
1578 | .tx_last_beacon = rt2400pci_tx_last_beacon, | 1576 | .tx_last_beacon = rt2400pci_tx_last_beacon, |
1579 | }; | 1577 | }; |
1580 | 1578 | ||
@@ -1592,6 +1590,7 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = { | |||
1592 | .link_tuner = rt2400pci_link_tuner, | 1590 | .link_tuner = rt2400pci_link_tuner, |
1593 | .write_tx_desc = rt2400pci_write_tx_desc, | 1591 | .write_tx_desc = rt2400pci_write_tx_desc, |
1594 | .write_tx_data = rt2x00pci_write_tx_data, | 1592 | .write_tx_data = rt2x00pci_write_tx_data, |
1593 | .write_beacon = rt2400pci_write_beacon, | ||
1595 | .kick_tx_queue = rt2400pci_kick_tx_queue, | 1594 | .kick_tx_queue = rt2400pci_kick_tx_queue, |
1596 | .fill_rxdone = rt2400pci_fill_rxdone, | 1595 | .fill_rxdone = rt2400pci_fill_rxdone, |
1597 | .config_filter = rt2400pci_config_filter, | 1596 | .config_filter = rt2400pci_config_filter, |
@@ -1604,28 +1603,28 @@ static const struct data_queue_desc rt2400pci_queue_rx = { | |||
1604 | .entry_num = RX_ENTRIES, | 1603 | .entry_num = RX_ENTRIES, |
1605 | .data_size = DATA_FRAME_SIZE, | 1604 | .data_size = DATA_FRAME_SIZE, |
1606 | .desc_size = RXD_DESC_SIZE, | 1605 | .desc_size = RXD_DESC_SIZE, |
1607 | .priv_size = sizeof(struct queue_entry_priv_pci_rx), | 1606 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1608 | }; | 1607 | }; |
1609 | 1608 | ||
1610 | static const struct data_queue_desc rt2400pci_queue_tx = { | 1609 | static const struct data_queue_desc rt2400pci_queue_tx = { |
1611 | .entry_num = TX_ENTRIES, | 1610 | .entry_num = TX_ENTRIES, |
1612 | .data_size = DATA_FRAME_SIZE, | 1611 | .data_size = DATA_FRAME_SIZE, |
1613 | .desc_size = TXD_DESC_SIZE, | 1612 | .desc_size = TXD_DESC_SIZE, |
1614 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 1613 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1615 | }; | 1614 | }; |
1616 | 1615 | ||
1617 | static const struct data_queue_desc rt2400pci_queue_bcn = { | 1616 | static const struct data_queue_desc rt2400pci_queue_bcn = { |
1618 | .entry_num = BEACON_ENTRIES, | 1617 | .entry_num = BEACON_ENTRIES, |
1619 | .data_size = MGMT_FRAME_SIZE, | 1618 | .data_size = MGMT_FRAME_SIZE, |
1620 | .desc_size = TXD_DESC_SIZE, | 1619 | .desc_size = TXD_DESC_SIZE, |
1621 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 1620 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1622 | }; | 1621 | }; |
1623 | 1622 | ||
1624 | static const struct data_queue_desc rt2400pci_queue_atim = { | 1623 | static const struct data_queue_desc rt2400pci_queue_atim = { |
1625 | .entry_num = ATIM_ENTRIES, | 1624 | .entry_num = ATIM_ENTRIES, |
1626 | .data_size = DATA_FRAME_SIZE, | 1625 | .data_size = DATA_FRAME_SIZE, |
1627 | .desc_size = TXD_DESC_SIZE, | 1626 | .desc_size = TXD_DESC_SIZE, |
1628 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 1627 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1629 | }; | 1628 | }; |
1630 | 1629 | ||
1631 | static const struct rt2x00_ops rt2400pci_ops = { | 1630 | static const struct rt2x00_ops rt2400pci_ops = { |
@@ -1634,6 +1633,7 @@ static const struct rt2x00_ops rt2400pci_ops = { | |||
1634 | .max_ap_intf = 1, | 1633 | .max_ap_intf = 1, |
1635 | .eeprom_size = EEPROM_SIZE, | 1634 | .eeprom_size = EEPROM_SIZE, |
1636 | .rf_size = RF_SIZE, | 1635 | .rf_size = RF_SIZE, |
1636 | .tx_queues = NUM_TX_QUEUES, | ||
1637 | .rx = &rt2400pci_queue_rx, | 1637 | .rx = &rt2400pci_queue_rx, |
1638 | .tx = &rt2400pci_queue_tx, | 1638 | .tx = &rt2400pci_queue_tx, |
1639 | .bcn = &rt2400pci_queue_bcn, | 1639 | .bcn = &rt2400pci_queue_bcn, |
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.h b/drivers/net/wireless/rt2x00/rt2400pci.h index a5210f9a3360..bc5564258228 100644 --- a/drivers/net/wireless/rt2x00/rt2400pci.h +++ b/drivers/net/wireless/rt2x00/rt2400pci.h | |||
@@ -37,8 +37,6 @@ | |||
37 | * Signal information. | 37 | * Signal information. |
38 | * Defaul offset is required for RSSI <-> dBm conversion. | 38 | * Defaul offset is required for RSSI <-> dBm conversion. |
39 | */ | 39 | */ |
40 | #define MAX_SIGNAL 100 | ||
41 | #define MAX_RX_SSI -1 | ||
42 | #define DEFAULT_RSSI_OFFSET 100 | 40 | #define DEFAULT_RSSI_OFFSET 100 |
43 | 41 | ||
44 | /* | 42 | /* |
@@ -52,6 +50,11 @@ | |||
52 | #define RF_SIZE 0x0010 | 50 | #define RF_SIZE 0x0010 |
53 | 51 | ||
54 | /* | 52 | /* |
53 | * Number of TX queues. | ||
54 | */ | ||
55 | #define NUM_TX_QUEUES 2 | ||
56 | |||
57 | /* | ||
55 | * Control/Status Registers(CSR). | 58 | * Control/Status Registers(CSR). |
56 | * Some values are set in TU, whereas 1 TU == 1024 us. | 59 | * Some values are set in TU, whereas 1 TU == 1024 us. |
57 | */ | 60 | */ |
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c index f7731fb82555..aa6dfb811c71 100644 --- a/drivers/net/wireless/rt2x00/rt2500pci.c +++ b/drivers/net/wireless/rt2x00/rt2500pci.c | |||
@@ -277,6 +277,17 @@ static int rt2500pci_blink_set(struct led_classdev *led_cdev, | |||
277 | 277 | ||
278 | return 0; | 278 | return 0; |
279 | } | 279 | } |
280 | |||
281 | static void rt2500pci_init_led(struct rt2x00_dev *rt2x00dev, | ||
282 | struct rt2x00_led *led, | ||
283 | enum led_type type) | ||
284 | { | ||
285 | led->rt2x00dev = rt2x00dev; | ||
286 | led->type = type; | ||
287 | led->led_dev.brightness_set = rt2500pci_brightness_set; | ||
288 | led->led_dev.blink_set = rt2500pci_blink_set; | ||
289 | led->flags = LED_INITIALIZED; | ||
290 | } | ||
280 | #endif /* CONFIG_RT2500PCI_LEDS */ | 291 | #endif /* CONFIG_RT2500PCI_LEDS */ |
281 | 292 | ||
282 | /* | 293 | /* |
@@ -317,8 +328,7 @@ static void rt2500pci_config_intf(struct rt2x00_dev *rt2x00dev, | |||
317 | struct rt2x00intf_conf *conf, | 328 | struct rt2x00intf_conf *conf, |
318 | const unsigned int flags) | 329 | const unsigned int flags) |
319 | { | 330 | { |
320 | struct data_queue *queue = | 331 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, QID_BEACON); |
321 | rt2x00queue_get_queue(rt2x00dev, RT2X00_BCN_QUEUE_BEACON); | ||
322 | unsigned int bcn_preload; | 332 | unsigned int bcn_preload; |
323 | u32 reg; | 333 | u32 reg; |
324 | 334 | ||
@@ -716,38 +726,34 @@ dynamic_cca_tune: | |||
716 | static void rt2500pci_init_rxentry(struct rt2x00_dev *rt2x00dev, | 726 | static void rt2500pci_init_rxentry(struct rt2x00_dev *rt2x00dev, |
717 | struct queue_entry *entry) | 727 | struct queue_entry *entry) |
718 | { | 728 | { |
719 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; | 729 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
730 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
720 | u32 word; | 731 | u32 word; |
721 | 732 | ||
722 | rt2x00_desc_read(priv_rx->desc, 1, &word); | 733 | rt2x00_desc_read(entry_priv->desc, 1, &word); |
723 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, priv_rx->data_dma); | 734 | rt2x00_set_field32(&word, RXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); |
724 | rt2x00_desc_write(priv_rx->desc, 1, word); | 735 | rt2x00_desc_write(entry_priv->desc, 1, word); |
725 | 736 | ||
726 | rt2x00_desc_read(priv_rx->desc, 0, &word); | 737 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
727 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); | 738 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); |
728 | rt2x00_desc_write(priv_rx->desc, 0, word); | 739 | rt2x00_desc_write(entry_priv->desc, 0, word); |
729 | } | 740 | } |
730 | 741 | ||
731 | static void rt2500pci_init_txentry(struct rt2x00_dev *rt2x00dev, | 742 | static void rt2500pci_init_txentry(struct rt2x00_dev *rt2x00dev, |
732 | struct queue_entry *entry) | 743 | struct queue_entry *entry) |
733 | { | 744 | { |
734 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; | 745 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
735 | u32 word; | 746 | u32 word; |
736 | 747 | ||
737 | rt2x00_desc_read(priv_tx->desc, 1, &word); | 748 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
738 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, priv_tx->data_dma); | ||
739 | rt2x00_desc_write(priv_tx->desc, 1, word); | ||
740 | |||
741 | rt2x00_desc_read(priv_tx->desc, 0, &word); | ||
742 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); | 749 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); |
743 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); | 750 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); |
744 | rt2x00_desc_write(priv_tx->desc, 0, word); | 751 | rt2x00_desc_write(entry_priv->desc, 0, word); |
745 | } | 752 | } |
746 | 753 | ||
747 | static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) | 754 | static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) |
748 | { | 755 | { |
749 | struct queue_entry_priv_pci_rx *priv_rx; | 756 | struct queue_entry_priv_pci *entry_priv; |
750 | struct queue_entry_priv_pci_tx *priv_tx; | ||
751 | u32 reg; | 757 | u32 reg; |
752 | 758 | ||
753 | /* | 759 | /* |
@@ -760,28 +766,28 @@ static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) | |||
760 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); | 766 | rt2x00_set_field32(®, TXCSR2_NUM_PRIO, rt2x00dev->tx[0].limit); |
761 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); | 767 | rt2x00pci_register_write(rt2x00dev, TXCSR2, reg); |
762 | 768 | ||
763 | priv_tx = rt2x00dev->tx[1].entries[0].priv_data; | 769 | entry_priv = rt2x00dev->tx[1].entries[0].priv_data; |
764 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); | 770 | rt2x00pci_register_read(rt2x00dev, TXCSR3, ®); |
765 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, | 771 | rt2x00_set_field32(®, TXCSR3_TX_RING_REGISTER, |
766 | priv_tx->desc_dma); | 772 | entry_priv->desc_dma); |
767 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); | 773 | rt2x00pci_register_write(rt2x00dev, TXCSR3, reg); |
768 | 774 | ||
769 | priv_tx = rt2x00dev->tx[0].entries[0].priv_data; | 775 | entry_priv = rt2x00dev->tx[0].entries[0].priv_data; |
770 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); | 776 | rt2x00pci_register_read(rt2x00dev, TXCSR5, ®); |
771 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, | 777 | rt2x00_set_field32(®, TXCSR5_PRIO_RING_REGISTER, |
772 | priv_tx->desc_dma); | 778 | entry_priv->desc_dma); |
773 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); | 779 | rt2x00pci_register_write(rt2x00dev, TXCSR5, reg); |
774 | 780 | ||
775 | priv_tx = rt2x00dev->bcn[1].entries[0].priv_data; | 781 | entry_priv = rt2x00dev->bcn[1].entries[0].priv_data; |
776 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); | 782 | rt2x00pci_register_read(rt2x00dev, TXCSR4, ®); |
777 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, | 783 | rt2x00_set_field32(®, TXCSR4_ATIM_RING_REGISTER, |
778 | priv_tx->desc_dma); | 784 | entry_priv->desc_dma); |
779 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); | 785 | rt2x00pci_register_write(rt2x00dev, TXCSR4, reg); |
780 | 786 | ||
781 | priv_tx = rt2x00dev->bcn[0].entries[0].priv_data; | 787 | entry_priv = rt2x00dev->bcn[0].entries[0].priv_data; |
782 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); | 788 | rt2x00pci_register_read(rt2x00dev, TXCSR6, ®); |
783 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, | 789 | rt2x00_set_field32(®, TXCSR6_BEACON_RING_REGISTER, |
784 | priv_tx->desc_dma); | 790 | entry_priv->desc_dma); |
785 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); | 791 | rt2x00pci_register_write(rt2x00dev, TXCSR6, reg); |
786 | 792 | ||
787 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); | 793 | rt2x00pci_register_read(rt2x00dev, RXCSR1, ®); |
@@ -789,9 +795,10 @@ static int rt2500pci_init_queues(struct rt2x00_dev *rt2x00dev) | |||
789 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); | 795 | rt2x00_set_field32(®, RXCSR1_NUM_RXD, rt2x00dev->rx->limit); |
790 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); | 796 | rt2x00pci_register_write(rt2x00dev, RXCSR1, reg); |
791 | 797 | ||
792 | priv_rx = rt2x00dev->rx->entries[0].priv_data; | 798 | entry_priv = rt2x00dev->rx->entries[0].priv_data; |
793 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); | 799 | rt2x00pci_register_read(rt2x00dev, RXCSR2, ®); |
794 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, priv_rx->desc_dma); | 800 | rt2x00_set_field32(®, RXCSR2_RX_RING_REGISTER, |
801 | entry_priv->desc_dma); | ||
795 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); | 802 | rt2x00pci_register_write(rt2x00dev, RXCSR2, reg); |
796 | 803 | ||
797 | return 0; | 804 | return 0; |
@@ -940,25 +947,32 @@ static int rt2500pci_init_registers(struct rt2x00_dev *rt2x00dev) | |||
940 | return 0; | 947 | return 0; |
941 | } | 948 | } |
942 | 949 | ||
943 | static int rt2500pci_init_bbp(struct rt2x00_dev *rt2x00dev) | 950 | static int rt2500pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
944 | { | 951 | { |
945 | unsigned int i; | 952 | unsigned int i; |
946 | u16 eeprom; | ||
947 | u8 reg_id; | ||
948 | u8 value; | 953 | u8 value; |
949 | 954 | ||
950 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 955 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
951 | rt2500pci_bbp_read(rt2x00dev, 0, &value); | 956 | rt2500pci_bbp_read(rt2x00dev, 0, &value); |
952 | if ((value != 0xff) && (value != 0x00)) | 957 | if ((value != 0xff) && (value != 0x00)) |
953 | goto continue_csr_init; | 958 | return 0; |
954 | NOTICE(rt2x00dev, "Waiting for BBP register.\n"); | ||
955 | udelay(REGISTER_BUSY_DELAY); | 959 | udelay(REGISTER_BUSY_DELAY); |
956 | } | 960 | } |
957 | 961 | ||
958 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | 962 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); |
959 | return -EACCES; | 963 | return -EACCES; |
964 | } | ||
965 | |||
966 | static int rt2500pci_init_bbp(struct rt2x00_dev *rt2x00dev) | ||
967 | { | ||
968 | unsigned int i; | ||
969 | u16 eeprom; | ||
970 | u8 reg_id; | ||
971 | u8 value; | ||
972 | |||
973 | if (unlikely(rt2500pci_wait_bbp_ready(rt2x00dev))) | ||
974 | return -EACCES; | ||
960 | 975 | ||
961 | continue_csr_init: | ||
962 | rt2500pci_bbp_write(rt2x00dev, 3, 0x02); | 976 | rt2500pci_bbp_write(rt2x00dev, 3, 0x02); |
963 | rt2500pci_bbp_write(rt2x00dev, 4, 0x19); | 977 | rt2500pci_bbp_write(rt2x00dev, 4, 0x19); |
964 | rt2500pci_bbp_write(rt2x00dev, 14, 0x1c); | 978 | rt2500pci_bbp_write(rt2x00dev, 14, 0x1c); |
@@ -1013,7 +1027,8 @@ static void rt2500pci_toggle_rx(struct rt2x00_dev *rt2x00dev, | |||
1013 | 1027 | ||
1014 | rt2x00pci_register_read(rt2x00dev, RXCSR0, ®); | 1028 | rt2x00pci_register_read(rt2x00dev, RXCSR0, ®); |
1015 | rt2x00_set_field32(®, RXCSR0_DISABLE_RX, | 1029 | rt2x00_set_field32(®, RXCSR0_DISABLE_RX, |
1016 | state == STATE_RADIO_RX_OFF); | 1030 | (state == STATE_RADIO_RX_OFF) || |
1031 | (state == STATE_RADIO_RX_OFF_LINK)); | ||
1017 | rt2x00pci_register_write(rt2x00dev, RXCSR0, reg); | 1032 | rt2x00pci_register_write(rt2x00dev, RXCSR0, reg); |
1018 | } | 1033 | } |
1019 | 1034 | ||
@@ -1050,17 +1065,10 @@ static int rt2500pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
1050 | /* | 1065 | /* |
1051 | * Initialize all registers. | 1066 | * Initialize all registers. |
1052 | */ | 1067 | */ |
1053 | if (rt2500pci_init_queues(rt2x00dev) || | 1068 | if (unlikely(rt2500pci_init_queues(rt2x00dev) || |
1054 | rt2500pci_init_registers(rt2x00dev) || | 1069 | rt2500pci_init_registers(rt2x00dev) || |
1055 | rt2500pci_init_bbp(rt2x00dev)) { | 1070 | rt2500pci_init_bbp(rt2x00dev))) |
1056 | ERROR(rt2x00dev, "Register initialization failed.\n"); | ||
1057 | return -EIO; | 1071 | return -EIO; |
1058 | } | ||
1059 | |||
1060 | /* | ||
1061 | * Enable interrupts. | ||
1062 | */ | ||
1063 | rt2500pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_ON); | ||
1064 | 1072 | ||
1065 | return 0; | 1073 | return 0; |
1066 | } | 1074 | } |
@@ -1082,11 +1090,6 @@ static void rt2500pci_disable_radio(struct rt2x00_dev *rt2x00dev) | |||
1082 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); | 1090 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); |
1083 | rt2x00_set_field32(®, TXCSR0_ABORT, 1); | 1091 | rt2x00_set_field32(®, TXCSR0_ABORT, 1); |
1084 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); | 1092 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); |
1085 | |||
1086 | /* | ||
1087 | * Disable interrupts. | ||
1088 | */ | ||
1089 | rt2500pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_OFF); | ||
1090 | } | 1093 | } |
1091 | 1094 | ||
1092 | static int rt2500pci_set_state(struct rt2x00_dev *rt2x00dev, | 1095 | static int rt2500pci_set_state(struct rt2x00_dev *rt2x00dev, |
@@ -1121,10 +1124,6 @@ static int rt2500pci_set_state(struct rt2x00_dev *rt2x00dev, | |||
1121 | msleep(10); | 1124 | msleep(10); |
1122 | } | 1125 | } |
1123 | 1126 | ||
1124 | NOTICE(rt2x00dev, "Device failed to enter state %d, " | ||
1125 | "current device state: bbp %d and rf %d.\n", | ||
1126 | state, bbp_state, rf_state); | ||
1127 | |||
1128 | return -EBUSY; | 1127 | return -EBUSY; |
1129 | } | 1128 | } |
1130 | 1129 | ||
@@ -1142,11 +1141,13 @@ static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1142 | break; | 1141 | break; |
1143 | case STATE_RADIO_RX_ON: | 1142 | case STATE_RADIO_RX_ON: |
1144 | case STATE_RADIO_RX_ON_LINK: | 1143 | case STATE_RADIO_RX_ON_LINK: |
1145 | rt2500pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); | ||
1146 | break; | ||
1147 | case STATE_RADIO_RX_OFF: | 1144 | case STATE_RADIO_RX_OFF: |
1148 | case STATE_RADIO_RX_OFF_LINK: | 1145 | case STATE_RADIO_RX_OFF_LINK: |
1149 | rt2500pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); | 1146 | rt2500pci_toggle_rx(rt2x00dev, state); |
1147 | break; | ||
1148 | case STATE_RADIO_IRQ_ON: | ||
1149 | case STATE_RADIO_IRQ_OFF: | ||
1150 | rt2500pci_toggle_irq(rt2x00dev, state); | ||
1150 | break; | 1151 | break; |
1151 | case STATE_DEEP_SLEEP: | 1152 | case STATE_DEEP_SLEEP: |
1152 | case STATE_SLEEP: | 1153 | case STATE_SLEEP: |
@@ -1159,6 +1160,10 @@ static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1159 | break; | 1160 | break; |
1160 | } | 1161 | } |
1161 | 1162 | ||
1163 | if (unlikely(retval)) | ||
1164 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | ||
1165 | state, retval); | ||
1166 | |||
1162 | return retval; | 1167 | return retval; |
1163 | } | 1168 | } |
1164 | 1169 | ||
@@ -1167,16 +1172,20 @@ static int rt2500pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1167 | */ | 1172 | */ |
1168 | static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1173 | static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1169 | struct sk_buff *skb, | 1174 | struct sk_buff *skb, |
1170 | struct txentry_desc *txdesc, | 1175 | struct txentry_desc *txdesc) |
1171 | struct ieee80211_tx_control *control) | ||
1172 | { | 1176 | { |
1173 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1177 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1178 | struct queue_entry_priv_pci *entry_priv = skbdesc->entry->priv_data; | ||
1174 | __le32 *txd = skbdesc->desc; | 1179 | __le32 *txd = skbdesc->desc; |
1175 | u32 word; | 1180 | u32 word; |
1176 | 1181 | ||
1177 | /* | 1182 | /* |
1178 | * Start writing the descriptor words. | 1183 | * Start writing the descriptor words. |
1179 | */ | 1184 | */ |
1185 | rt2x00_desc_read(entry_priv->desc, 1, &word); | ||
1186 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); | ||
1187 | rt2x00_desc_write(entry_priv->desc, 1, word); | ||
1188 | |||
1180 | rt2x00_desc_read(txd, 2, &word); | 1189 | rt2x00_desc_read(txd, 2, &word); |
1181 | rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER); | 1190 | rt2x00_set_field32(&word, TXD_W2_IV_OFFSET, IEEE80211_HEADER); |
1182 | rt2x00_set_field32(&word, TXD_W2_AIFS, txdesc->aifs); | 1191 | rt2x00_set_field32(&word, TXD_W2_AIFS, txdesc->aifs); |
@@ -1210,9 +1219,7 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1210 | rt2x00_set_field32(&word, TXD_W0_CIPHER_OWNER, 1); | 1219 | rt2x00_set_field32(&word, TXD_W0_CIPHER_OWNER, 1); |
1211 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1220 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1212 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1221 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1213 | !!(control->flags & | 1222 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); |
1214 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | ||
1215 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | ||
1216 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); | 1223 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); |
1217 | rt2x00_desc_write(txd, 0, word); | 1224 | rt2x00_desc_write(txd, 0, word); |
1218 | } | 1225 | } |
@@ -1220,12 +1227,46 @@ static void rt2500pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1220 | /* | 1227 | /* |
1221 | * TX data initialization | 1228 | * TX data initialization |
1222 | */ | 1229 | */ |
1230 | static void rt2500pci_write_beacon(struct queue_entry *entry) | ||
1231 | { | ||
1232 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
1233 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; | ||
1234 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1235 | u32 word; | ||
1236 | u32 reg; | ||
1237 | |||
1238 | /* | ||
1239 | * Disable beaconing while we are reloading the beacon data, | ||
1240 | * otherwise we might be sending out invalid data. | ||
1241 | */ | ||
1242 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | ||
1243 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 0); | ||
1244 | rt2x00_set_field32(®, CSR14_TBCN, 0); | ||
1245 | rt2x00_set_field32(®, CSR14_BEACON_GEN, 0); | ||
1246 | rt2x00pci_register_write(rt2x00dev, CSR14, reg); | ||
1247 | |||
1248 | /* | ||
1249 | * Replace rt2x00lib allocated descriptor with the | ||
1250 | * pointer to the _real_ hardware descriptor. | ||
1251 | * After that, map the beacon to DMA and update the | ||
1252 | * descriptor. | ||
1253 | */ | ||
1254 | memcpy(entry_priv->desc, skbdesc->desc, skbdesc->desc_len); | ||
1255 | skbdesc->desc = entry_priv->desc; | ||
1256 | |||
1257 | rt2x00queue_map_txskb(rt2x00dev, entry->skb); | ||
1258 | |||
1259 | rt2x00_desc_read(entry_priv->desc, 1, &word); | ||
1260 | rt2x00_set_field32(&word, TXD_W1_BUFFER_ADDRESS, skbdesc->skb_dma); | ||
1261 | rt2x00_desc_write(entry_priv->desc, 1, word); | ||
1262 | } | ||
1263 | |||
1223 | static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | 1264 | static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
1224 | const unsigned int queue) | 1265 | const enum data_queue_qid queue) |
1225 | { | 1266 | { |
1226 | u32 reg; | 1267 | u32 reg; |
1227 | 1268 | ||
1228 | if (queue == RT2X00_BCN_QUEUE_BEACON) { | 1269 | if (queue == QID_BEACON) { |
1229 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | 1270 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); |
1230 | if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) { | 1271 | if (!rt2x00_get_field32(reg, CSR14_BEACON_GEN)) { |
1231 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 1); | 1272 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 1); |
@@ -1237,12 +1278,9 @@ static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1237 | } | 1278 | } |
1238 | 1279 | ||
1239 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); | 1280 | rt2x00pci_register_read(rt2x00dev, TXCSR0, ®); |
1240 | rt2x00_set_field32(®, TXCSR0_KICK_PRIO, | 1281 | rt2x00_set_field32(®, TXCSR0_KICK_PRIO, (queue == QID_AC_BE)); |
1241 | (queue == IEEE80211_TX_QUEUE_DATA0)); | 1282 | rt2x00_set_field32(®, TXCSR0_KICK_TX, (queue == QID_AC_BK)); |
1242 | rt2x00_set_field32(®, TXCSR0_KICK_TX, | 1283 | rt2x00_set_field32(®, TXCSR0_KICK_ATIM, (queue == QID_ATIM)); |
1243 | (queue == IEEE80211_TX_QUEUE_DATA1)); | ||
1244 | rt2x00_set_field32(®, TXCSR0_KICK_ATIM, | ||
1245 | (queue == RT2X00_BCN_QUEUE_ATIM)); | ||
1246 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); | 1284 | rt2x00pci_register_write(rt2x00dev, TXCSR0, reg); |
1247 | } | 1285 | } |
1248 | 1286 | ||
@@ -1252,14 +1290,13 @@ static void rt2500pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1252 | static void rt2500pci_fill_rxdone(struct queue_entry *entry, | 1290 | static void rt2500pci_fill_rxdone(struct queue_entry *entry, |
1253 | struct rxdone_entry_desc *rxdesc) | 1291 | struct rxdone_entry_desc *rxdesc) |
1254 | { | 1292 | { |
1255 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; | 1293 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
1256 | u32 word0; | 1294 | u32 word0; |
1257 | u32 word2; | 1295 | u32 word2; |
1258 | 1296 | ||
1259 | rt2x00_desc_read(priv_rx->desc, 0, &word0); | 1297 | rt2x00_desc_read(entry_priv->desc, 0, &word0); |
1260 | rt2x00_desc_read(priv_rx->desc, 2, &word2); | 1298 | rt2x00_desc_read(entry_priv->desc, 2, &word2); |
1261 | 1299 | ||
1262 | rxdesc->flags = 0; | ||
1263 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1300 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1264 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1301 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1265 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) | 1302 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
@@ -1276,7 +1313,6 @@ static void rt2500pci_fill_rxdone(struct queue_entry *entry, | |||
1276 | entry->queue->rt2x00dev->rssi_offset; | 1313 | entry->queue->rt2x00dev->rssi_offset; |
1277 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1314 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1278 | 1315 | ||
1279 | rxdesc->dev_flags = 0; | ||
1280 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) | 1316 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
1281 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; | 1317 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; |
1282 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) | 1318 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
@@ -1287,18 +1323,18 @@ static void rt2500pci_fill_rxdone(struct queue_entry *entry, | |||
1287 | * Interrupt functions. | 1323 | * Interrupt functions. |
1288 | */ | 1324 | */ |
1289 | static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, | 1325 | static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, |
1290 | const enum ieee80211_tx_queue queue_idx) | 1326 | const enum data_queue_qid queue_idx) |
1291 | { | 1327 | { |
1292 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); | 1328 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); |
1293 | struct queue_entry_priv_pci_tx *priv_tx; | 1329 | struct queue_entry_priv_pci *entry_priv; |
1294 | struct queue_entry *entry; | 1330 | struct queue_entry *entry; |
1295 | struct txdone_entry_desc txdesc; | 1331 | struct txdone_entry_desc txdesc; |
1296 | u32 word; | 1332 | u32 word; |
1297 | 1333 | ||
1298 | while (!rt2x00queue_empty(queue)) { | 1334 | while (!rt2x00queue_empty(queue)) { |
1299 | entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); | 1335 | entry = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
1300 | priv_tx = entry->priv_data; | 1336 | entry_priv = entry->priv_data; |
1301 | rt2x00_desc_read(priv_tx->desc, 0, &word); | 1337 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
1302 | 1338 | ||
1303 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || | 1339 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || |
1304 | !rt2x00_get_field32(word, TXD_W0_VALID)) | 1340 | !rt2x00_get_field32(word, TXD_W0_VALID)) |
@@ -1307,10 +1343,21 @@ static void rt2500pci_txdone(struct rt2x00_dev *rt2x00dev, | |||
1307 | /* | 1343 | /* |
1308 | * Obtain the status about this packet. | 1344 | * Obtain the status about this packet. |
1309 | */ | 1345 | */ |
1310 | txdesc.status = rt2x00_get_field32(word, TXD_W0_RESULT); | 1346 | txdesc.flags = 0; |
1347 | switch (rt2x00_get_field32(word, TXD_W0_RESULT)) { | ||
1348 | case 0: /* Success */ | ||
1349 | case 1: /* Success with retry */ | ||
1350 | __set_bit(TXDONE_SUCCESS, &txdesc.flags); | ||
1351 | break; | ||
1352 | case 2: /* Failure, excessive retries */ | ||
1353 | __set_bit(TXDONE_EXCESSIVE_RETRY, &txdesc.flags); | ||
1354 | /* Don't break, this is a failed frame! */ | ||
1355 | default: /* Failure */ | ||
1356 | __set_bit(TXDONE_FAILURE, &txdesc.flags); | ||
1357 | } | ||
1311 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); | 1358 | txdesc.retry = rt2x00_get_field32(word, TXD_W0_RETRY_COUNT); |
1312 | 1359 | ||
1313 | rt2x00pci_txdone(rt2x00dev, entry, &txdesc); | 1360 | rt2x00lib_txdone(entry, &txdesc); |
1314 | } | 1361 | } |
1315 | } | 1362 | } |
1316 | 1363 | ||
@@ -1354,19 +1401,19 @@ static irqreturn_t rt2500pci_interrupt(int irq, void *dev_instance) | |||
1354 | * 3 - Atim ring transmit done interrupt. | 1401 | * 3 - Atim ring transmit done interrupt. |
1355 | */ | 1402 | */ |
1356 | if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING)) | 1403 | if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING)) |
1357 | rt2500pci_txdone(rt2x00dev, RT2X00_BCN_QUEUE_ATIM); | 1404 | rt2500pci_txdone(rt2x00dev, QID_ATIM); |
1358 | 1405 | ||
1359 | /* | 1406 | /* |
1360 | * 4 - Priority ring transmit done interrupt. | 1407 | * 4 - Priority ring transmit done interrupt. |
1361 | */ | 1408 | */ |
1362 | if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING)) | 1409 | if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING)) |
1363 | rt2500pci_txdone(rt2x00dev, IEEE80211_TX_QUEUE_DATA0); | 1410 | rt2500pci_txdone(rt2x00dev, QID_AC_BE); |
1364 | 1411 | ||
1365 | /* | 1412 | /* |
1366 | * 5 - Tx ring transmit done interrupt. | 1413 | * 5 - Tx ring transmit done interrupt. |
1367 | */ | 1414 | */ |
1368 | if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) | 1415 | if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) |
1369 | rt2500pci_txdone(rt2x00dev, IEEE80211_TX_QUEUE_DATA1); | 1416 | rt2500pci_txdone(rt2x00dev, QID_AC_BK); |
1370 | 1417 | ||
1371 | return IRQ_HANDLED; | 1418 | return IRQ_HANDLED; |
1372 | } | 1419 | } |
@@ -1486,23 +1533,10 @@ static int rt2500pci_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1486 | #ifdef CONFIG_RT2500PCI_LEDS | 1533 | #ifdef CONFIG_RT2500PCI_LEDS |
1487 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); | 1534 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
1488 | 1535 | ||
1489 | rt2x00dev->led_radio.rt2x00dev = rt2x00dev; | 1536 | rt2500pci_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
1490 | rt2x00dev->led_radio.type = LED_TYPE_RADIO; | 1537 | if (value == LED_MODE_TXRX_ACTIVITY) |
1491 | rt2x00dev->led_radio.led_dev.brightness_set = | 1538 | rt2500pci_init_led(rt2x00dev, &rt2x00dev->led_qual, |
1492 | rt2500pci_brightness_set; | 1539 | LED_TYPE_ACTIVITY); |
1493 | rt2x00dev->led_radio.led_dev.blink_set = | ||
1494 | rt2500pci_blink_set; | ||
1495 | rt2x00dev->led_radio.flags = LED_INITIALIZED; | ||
1496 | |||
1497 | if (value == LED_MODE_TXRX_ACTIVITY) { | ||
1498 | rt2x00dev->led_qual.rt2x00dev = rt2x00dev; | ||
1499 | rt2x00dev->led_qual.type = LED_TYPE_ACTIVITY; | ||
1500 | rt2x00dev->led_qual.led_dev.brightness_set = | ||
1501 | rt2500pci_brightness_set; | ||
1502 | rt2x00dev->led_qual.led_dev.blink_set = | ||
1503 | rt2500pci_blink_set; | ||
1504 | rt2x00dev->led_qual.flags = LED_INITIALIZED; | ||
1505 | } | ||
1506 | #endif /* CONFIG_RT2500PCI_LEDS */ | 1540 | #endif /* CONFIG_RT2500PCI_LEDS */ |
1507 | 1541 | ||
1508 | /* | 1542 | /* |
@@ -1695,13 +1729,12 @@ static void rt2500pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
1695 | /* | 1729 | /* |
1696 | * Initialize all hw fields. | 1730 | * Initialize all hw fields. |
1697 | */ | 1731 | */ |
1698 | rt2x00dev->hw->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; | 1732 | rt2x00dev->hw->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1733 | IEEE80211_HW_SIGNAL_DBM; | ||
1734 | |||
1699 | rt2x00dev->hw->extra_tx_headroom = 0; | 1735 | rt2x00dev->hw->extra_tx_headroom = 0; |
1700 | rt2x00dev->hw->max_signal = MAX_SIGNAL; | ||
1701 | rt2x00dev->hw->max_rssi = MAX_RX_SSI; | ||
1702 | rt2x00dev->hw->queues = 2; | ||
1703 | 1736 | ||
1704 | SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_pci(rt2x00dev)->dev); | 1737 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
1705 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, | 1738 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
1706 | rt2x00_eeprom_addr(rt2x00dev, | 1739 | rt2x00_eeprom_addr(rt2x00dev, |
1707 | EEPROM_MAC_ADDR_0)); | 1740 | EEPROM_MAC_ADDR_0)); |
@@ -1765,9 +1798,10 @@ static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1765 | rt2500pci_probe_hw_mode(rt2x00dev); | 1798 | rt2500pci_probe_hw_mode(rt2x00dev); |
1766 | 1799 | ||
1767 | /* | 1800 | /* |
1768 | * This device requires the atim queue | 1801 | * This device requires the atim queue and DMA-mapped skbs. |
1769 | */ | 1802 | */ |
1770 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | 1803 | __set_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
1804 | __set_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags); | ||
1771 | 1805 | ||
1772 | /* | 1806 | /* |
1773 | * Set the rssi offset. | 1807 | * Set the rssi offset. |
@@ -1808,61 +1842,6 @@ static u64 rt2500pci_get_tsf(struct ieee80211_hw *hw) | |||
1808 | return tsf; | 1842 | return tsf; |
1809 | } | 1843 | } |
1810 | 1844 | ||
1811 | static int rt2500pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | ||
1812 | struct ieee80211_tx_control *control) | ||
1813 | { | ||
1814 | struct rt2x00_dev *rt2x00dev = hw->priv; | ||
1815 | struct rt2x00_intf *intf = vif_to_intf(control->vif); | ||
1816 | struct queue_entry_priv_pci_tx *priv_tx; | ||
1817 | struct skb_frame_desc *skbdesc; | ||
1818 | u32 reg; | ||
1819 | |||
1820 | if (unlikely(!intf->beacon)) | ||
1821 | return -ENOBUFS; | ||
1822 | |||
1823 | priv_tx = intf->beacon->priv_data; | ||
1824 | |||
1825 | /* | ||
1826 | * Fill in skb descriptor | ||
1827 | */ | ||
1828 | skbdesc = get_skb_frame_desc(skb); | ||
1829 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
1830 | skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED; | ||
1831 | skbdesc->data = skb->data; | ||
1832 | skbdesc->data_len = skb->len; | ||
1833 | skbdesc->desc = priv_tx->desc; | ||
1834 | skbdesc->desc_len = intf->beacon->queue->desc_size; | ||
1835 | skbdesc->entry = intf->beacon; | ||
1836 | |||
1837 | /* | ||
1838 | * Disable beaconing while we are reloading the beacon data, | ||
1839 | * otherwise we might be sending out invalid data. | ||
1840 | */ | ||
1841 | rt2x00pci_register_read(rt2x00dev, CSR14, ®); | ||
1842 | rt2x00_set_field32(®, CSR14_TSF_COUNT, 0); | ||
1843 | rt2x00_set_field32(®, CSR14_TBCN, 0); | ||
1844 | rt2x00_set_field32(®, CSR14_BEACON_GEN, 0); | ||
1845 | rt2x00pci_register_write(rt2x00dev, CSR14, reg); | ||
1846 | |||
1847 | /* | ||
1848 | * mac80211 doesn't provide the control->queue variable | ||
1849 | * for beacons. Set our own queue identification so | ||
1850 | * it can be used during descriptor initialization. | ||
1851 | */ | ||
1852 | control->queue = RT2X00_BCN_QUEUE_BEACON; | ||
1853 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
1854 | |||
1855 | /* | ||
1856 | * Enable beacon generation. | ||
1857 | * Write entire beacon with descriptor to register, | ||
1858 | * and kick the beacon generator. | ||
1859 | */ | ||
1860 | memcpy(priv_tx->data, skb->data, skb->len); | ||
1861 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue); | ||
1862 | |||
1863 | return 0; | ||
1864 | } | ||
1865 | |||
1866 | static int rt2500pci_tx_last_beacon(struct ieee80211_hw *hw) | 1845 | static int rt2500pci_tx_last_beacon(struct ieee80211_hw *hw) |
1867 | { | 1846 | { |
1868 | struct rt2x00_dev *rt2x00dev = hw->priv; | 1847 | struct rt2x00_dev *rt2x00dev = hw->priv; |
@@ -1887,7 +1866,6 @@ static const struct ieee80211_ops rt2500pci_mac80211_ops = { | |||
1887 | .conf_tx = rt2x00mac_conf_tx, | 1866 | .conf_tx = rt2x00mac_conf_tx, |
1888 | .get_tx_stats = rt2x00mac_get_tx_stats, | 1867 | .get_tx_stats = rt2x00mac_get_tx_stats, |
1889 | .get_tsf = rt2500pci_get_tsf, | 1868 | .get_tsf = rt2500pci_get_tsf, |
1890 | .beacon_update = rt2500pci_beacon_update, | ||
1891 | .tx_last_beacon = rt2500pci_tx_last_beacon, | 1869 | .tx_last_beacon = rt2500pci_tx_last_beacon, |
1892 | }; | 1870 | }; |
1893 | 1871 | ||
@@ -1905,6 +1883,7 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = { | |||
1905 | .link_tuner = rt2500pci_link_tuner, | 1883 | .link_tuner = rt2500pci_link_tuner, |
1906 | .write_tx_desc = rt2500pci_write_tx_desc, | 1884 | .write_tx_desc = rt2500pci_write_tx_desc, |
1907 | .write_tx_data = rt2x00pci_write_tx_data, | 1885 | .write_tx_data = rt2x00pci_write_tx_data, |
1886 | .write_beacon = rt2500pci_write_beacon, | ||
1908 | .kick_tx_queue = rt2500pci_kick_tx_queue, | 1887 | .kick_tx_queue = rt2500pci_kick_tx_queue, |
1909 | .fill_rxdone = rt2500pci_fill_rxdone, | 1888 | .fill_rxdone = rt2500pci_fill_rxdone, |
1910 | .config_filter = rt2500pci_config_filter, | 1889 | .config_filter = rt2500pci_config_filter, |
@@ -1917,28 +1896,28 @@ static const struct data_queue_desc rt2500pci_queue_rx = { | |||
1917 | .entry_num = RX_ENTRIES, | 1896 | .entry_num = RX_ENTRIES, |
1918 | .data_size = DATA_FRAME_SIZE, | 1897 | .data_size = DATA_FRAME_SIZE, |
1919 | .desc_size = RXD_DESC_SIZE, | 1898 | .desc_size = RXD_DESC_SIZE, |
1920 | .priv_size = sizeof(struct queue_entry_priv_pci_rx), | 1899 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1921 | }; | 1900 | }; |
1922 | 1901 | ||
1923 | static const struct data_queue_desc rt2500pci_queue_tx = { | 1902 | static const struct data_queue_desc rt2500pci_queue_tx = { |
1924 | .entry_num = TX_ENTRIES, | 1903 | .entry_num = TX_ENTRIES, |
1925 | .data_size = DATA_FRAME_SIZE, | 1904 | .data_size = DATA_FRAME_SIZE, |
1926 | .desc_size = TXD_DESC_SIZE, | 1905 | .desc_size = TXD_DESC_SIZE, |
1927 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 1906 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1928 | }; | 1907 | }; |
1929 | 1908 | ||
1930 | static const struct data_queue_desc rt2500pci_queue_bcn = { | 1909 | static const struct data_queue_desc rt2500pci_queue_bcn = { |
1931 | .entry_num = BEACON_ENTRIES, | 1910 | .entry_num = BEACON_ENTRIES, |
1932 | .data_size = MGMT_FRAME_SIZE, | 1911 | .data_size = MGMT_FRAME_SIZE, |
1933 | .desc_size = TXD_DESC_SIZE, | 1912 | .desc_size = TXD_DESC_SIZE, |
1934 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 1913 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1935 | }; | 1914 | }; |
1936 | 1915 | ||
1937 | static const struct data_queue_desc rt2500pci_queue_atim = { | 1916 | static const struct data_queue_desc rt2500pci_queue_atim = { |
1938 | .entry_num = ATIM_ENTRIES, | 1917 | .entry_num = ATIM_ENTRIES, |
1939 | .data_size = DATA_FRAME_SIZE, | 1918 | .data_size = DATA_FRAME_SIZE, |
1940 | .desc_size = TXD_DESC_SIZE, | 1919 | .desc_size = TXD_DESC_SIZE, |
1941 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 1920 | .priv_size = sizeof(struct queue_entry_priv_pci), |
1942 | }; | 1921 | }; |
1943 | 1922 | ||
1944 | static const struct rt2x00_ops rt2500pci_ops = { | 1923 | static const struct rt2x00_ops rt2500pci_ops = { |
@@ -1947,6 +1926,7 @@ static const struct rt2x00_ops rt2500pci_ops = { | |||
1947 | .max_ap_intf = 1, | 1926 | .max_ap_intf = 1, |
1948 | .eeprom_size = EEPROM_SIZE, | 1927 | .eeprom_size = EEPROM_SIZE, |
1949 | .rf_size = RF_SIZE, | 1928 | .rf_size = RF_SIZE, |
1929 | .tx_queues = NUM_TX_QUEUES, | ||
1950 | .rx = &rt2500pci_queue_rx, | 1930 | .rx = &rt2500pci_queue_rx, |
1951 | .tx = &rt2500pci_queue_tx, | 1931 | .tx = &rt2500pci_queue_tx, |
1952 | .bcn = &rt2500pci_queue_bcn, | 1932 | .bcn = &rt2500pci_queue_bcn, |
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.h b/drivers/net/wireless/rt2x00/rt2500pci.h index 13899550465a..42f376929ea9 100644 --- a/drivers/net/wireless/rt2x00/rt2500pci.h +++ b/drivers/net/wireless/rt2x00/rt2500pci.h | |||
@@ -48,8 +48,6 @@ | |||
48 | * Signal information. | 48 | * Signal information. |
49 | * Defaul offset is required for RSSI <-> dBm conversion. | 49 | * Defaul offset is required for RSSI <-> dBm conversion. |
50 | */ | 50 | */ |
51 | #define MAX_SIGNAL 100 | ||
52 | #define MAX_RX_SSI -1 | ||
53 | #define DEFAULT_RSSI_OFFSET 121 | 51 | #define DEFAULT_RSSI_OFFSET 121 |
54 | 52 | ||
55 | /* | 53 | /* |
@@ -63,6 +61,11 @@ | |||
63 | #define RF_SIZE 0x0014 | 61 | #define RF_SIZE 0x0014 |
64 | 62 | ||
65 | /* | 63 | /* |
64 | * Number of TX queues. | ||
65 | */ | ||
66 | #define NUM_TX_QUEUES 2 | ||
67 | |||
68 | /* | ||
66 | * Control/Status Registers(CSR). | 69 | * Control/Status Registers(CSR). |
67 | * Some values are set in TU, whereas 1 TU == 1024 us. | 70 | * Some values are set in TU, whereas 1 TU == 1024 us. |
68 | */ | 71 | */ |
@@ -748,7 +751,7 @@ | |||
748 | #define LEDCSR_LED_DEFAULT FIELD32(0x00100000) | 751 | #define LEDCSR_LED_DEFAULT FIELD32(0x00100000) |
749 | 752 | ||
750 | /* | 753 | /* |
751 | * AES control register. | 754 | * SECCSR3: AES control register. |
752 | */ | 755 | */ |
753 | #define SECCSR3 0x00fc | 756 | #define SECCSR3 0x00fc |
754 | 757 | ||
@@ -892,7 +895,7 @@ | |||
892 | #define ARTCSR2_ACK_CTS_54MBS FIELD32(0xff000000) | 895 | #define ARTCSR2_ACK_CTS_54MBS FIELD32(0xff000000) |
893 | 896 | ||
894 | /* | 897 | /* |
895 | * SECCSR1_RT2509: WEP control register. | 898 | * SECCSR1: WEP control register. |
896 | * KICK_ENCRYPT: Kick encryption engine, self-clear. | 899 | * KICK_ENCRYPT: Kick encryption engine, self-clear. |
897 | * ONE_SHOT: 0: ring mode, 1: One shot only mode. | 900 | * ONE_SHOT: 0: ring mode, 1: One shot only mode. |
898 | * DESC_ADDRESS: Descriptor physical address of frame. | 901 | * DESC_ADDRESS: Descriptor physical address of frame. |
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c index d90512f97b39..3558cb210747 100644 --- a/drivers/net/wireless/rt2x00/rt2500usb.c +++ b/drivers/net/wireless/rt2x00/rt2500usb.c | |||
@@ -76,10 +76,10 @@ static inline void rt2500usb_register_multiread(struct rt2x00_dev *rt2x00dev, | |||
76 | const unsigned int offset, | 76 | const unsigned int offset, |
77 | void *value, const u16 length) | 77 | void *value, const u16 length) |
78 | { | 78 | { |
79 | int timeout = REGISTER_TIMEOUT * (length / sizeof(u16)); | ||
80 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, | 79 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
81 | USB_VENDOR_REQUEST_IN, offset, | 80 | USB_VENDOR_REQUEST_IN, offset, |
82 | value, length, timeout); | 81 | value, length, |
82 | REGISTER_TIMEOUT16(length)); | ||
83 | } | 83 | } |
84 | 84 | ||
85 | static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, | 85 | static inline void rt2500usb_register_write(struct rt2x00_dev *rt2x00dev, |
@@ -106,10 +106,10 @@ static inline void rt2500usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, | |||
106 | const unsigned int offset, | 106 | const unsigned int offset, |
107 | void *value, const u16 length) | 107 | void *value, const u16 length) |
108 | { | 108 | { |
109 | int timeout = REGISTER_TIMEOUT * (length / sizeof(u16)); | ||
110 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, | 109 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
111 | USB_VENDOR_REQUEST_OUT, offset, | 110 | USB_VENDOR_REQUEST_OUT, offset, |
112 | value, length, timeout); | 111 | value, length, |
112 | REGISTER_TIMEOUT16(length)); | ||
113 | } | 113 | } |
114 | 114 | ||
115 | static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev) | 115 | static u16 rt2500usb_bbp_check(struct rt2x00_dev *rt2x00dev) |
@@ -322,6 +322,17 @@ static int rt2500usb_blink_set(struct led_classdev *led_cdev, | |||
322 | 322 | ||
323 | return 0; | 323 | return 0; |
324 | } | 324 | } |
325 | |||
326 | static void rt2500usb_init_led(struct rt2x00_dev *rt2x00dev, | ||
327 | struct rt2x00_led *led, | ||
328 | enum led_type type) | ||
329 | { | ||
330 | led->rt2x00dev = rt2x00dev; | ||
331 | led->type = type; | ||
332 | led->led_dev.brightness_set = rt2500usb_brightness_set; | ||
333 | led->led_dev.blink_set = rt2500usb_blink_set; | ||
334 | led->flags = LED_INITIALIZED; | ||
335 | } | ||
325 | #endif /* CONFIG_RT2500USB_LEDS */ | 336 | #endif /* CONFIG_RT2500USB_LEDS */ |
326 | 337 | ||
327 | /* | 338 | /* |
@@ -860,25 +871,32 @@ static int rt2500usb_init_registers(struct rt2x00_dev *rt2x00dev) | |||
860 | return 0; | 871 | return 0; |
861 | } | 872 | } |
862 | 873 | ||
863 | static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) | 874 | static int rt2500usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
864 | { | 875 | { |
865 | unsigned int i; | 876 | unsigned int i; |
866 | u16 eeprom; | ||
867 | u8 value; | 877 | u8 value; |
868 | u8 reg_id; | ||
869 | 878 | ||
870 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 879 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
871 | rt2500usb_bbp_read(rt2x00dev, 0, &value); | 880 | rt2500usb_bbp_read(rt2x00dev, 0, &value); |
872 | if ((value != 0xff) && (value != 0x00)) | 881 | if ((value != 0xff) && (value != 0x00)) |
873 | goto continue_csr_init; | 882 | return 0; |
874 | NOTICE(rt2x00dev, "Waiting for BBP register.\n"); | ||
875 | udelay(REGISTER_BUSY_DELAY); | 883 | udelay(REGISTER_BUSY_DELAY); |
876 | } | 884 | } |
877 | 885 | ||
878 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | 886 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); |
879 | return -EACCES; | 887 | return -EACCES; |
888 | } | ||
889 | |||
890 | static int rt2500usb_init_bbp(struct rt2x00_dev *rt2x00dev) | ||
891 | { | ||
892 | unsigned int i; | ||
893 | u16 eeprom; | ||
894 | u8 value; | ||
895 | u8 reg_id; | ||
896 | |||
897 | if (unlikely(rt2500usb_wait_bbp_ready(rt2x00dev))) | ||
898 | return -EACCES; | ||
880 | 899 | ||
881 | continue_csr_init: | ||
882 | rt2500usb_bbp_write(rt2x00dev, 3, 0x02); | 900 | rt2500usb_bbp_write(rt2x00dev, 3, 0x02); |
883 | rt2500usb_bbp_write(rt2x00dev, 4, 0x19); | 901 | rt2500usb_bbp_write(rt2x00dev, 4, 0x19); |
884 | rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); | 902 | rt2500usb_bbp_write(rt2x00dev, 14, 0x1c); |
@@ -934,7 +952,8 @@ static void rt2500usb_toggle_rx(struct rt2x00_dev *rt2x00dev, | |||
934 | 952 | ||
935 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); | 953 | rt2500usb_register_read(rt2x00dev, TXRX_CSR2, ®); |
936 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, | 954 | rt2x00_set_field16(®, TXRX_CSR2_DISABLE_RX, |
937 | state == STATE_RADIO_RX_OFF); | 955 | (state == STATE_RADIO_RX_OFF) || |
956 | (state == STATE_RADIO_RX_OFF_LINK)); | ||
938 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); | 957 | rt2500usb_register_write(rt2x00dev, TXRX_CSR2, reg); |
939 | } | 958 | } |
940 | 959 | ||
@@ -943,11 +962,9 @@ static int rt2500usb_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
943 | /* | 962 | /* |
944 | * Initialize all registers. | 963 | * Initialize all registers. |
945 | */ | 964 | */ |
946 | if (rt2500usb_init_registers(rt2x00dev) || | 965 | if (unlikely(rt2500usb_init_registers(rt2x00dev) || |
947 | rt2500usb_init_bbp(rt2x00dev)) { | 966 | rt2500usb_init_bbp(rt2x00dev))) |
948 | ERROR(rt2x00dev, "Register initialization failed.\n"); | ||
949 | return -EIO; | 967 | return -EIO; |
950 | } | ||
951 | 968 | ||
952 | return 0; | 969 | return 0; |
953 | } | 970 | } |
@@ -1000,10 +1017,6 @@ static int rt2500usb_set_state(struct rt2x00_dev *rt2x00dev, | |||
1000 | msleep(30); | 1017 | msleep(30); |
1001 | } | 1018 | } |
1002 | 1019 | ||
1003 | NOTICE(rt2x00dev, "Device failed to enter state %d, " | ||
1004 | "current device state: bbp %d and rf %d.\n", | ||
1005 | state, bbp_state, rf_state); | ||
1006 | |||
1007 | return -EBUSY; | 1020 | return -EBUSY; |
1008 | } | 1021 | } |
1009 | 1022 | ||
@@ -1021,11 +1034,13 @@ static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1021 | break; | 1034 | break; |
1022 | case STATE_RADIO_RX_ON: | 1035 | case STATE_RADIO_RX_ON: |
1023 | case STATE_RADIO_RX_ON_LINK: | 1036 | case STATE_RADIO_RX_ON_LINK: |
1024 | rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); | ||
1025 | break; | ||
1026 | case STATE_RADIO_RX_OFF: | 1037 | case STATE_RADIO_RX_OFF: |
1027 | case STATE_RADIO_RX_OFF_LINK: | 1038 | case STATE_RADIO_RX_OFF_LINK: |
1028 | rt2500usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); | 1039 | rt2500usb_toggle_rx(rt2x00dev, state); |
1040 | break; | ||
1041 | case STATE_RADIO_IRQ_ON: | ||
1042 | case STATE_RADIO_IRQ_OFF: | ||
1043 | /* No support, but no error either */ | ||
1029 | break; | 1044 | break; |
1030 | case STATE_DEEP_SLEEP: | 1045 | case STATE_DEEP_SLEEP: |
1031 | case STATE_SLEEP: | 1046 | case STATE_SLEEP: |
@@ -1038,6 +1053,10 @@ static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1038 | break; | 1053 | break; |
1039 | } | 1054 | } |
1040 | 1055 | ||
1056 | if (unlikely(retval)) | ||
1057 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | ||
1058 | state, retval); | ||
1059 | |||
1041 | return retval; | 1060 | return retval; |
1042 | } | 1061 | } |
1043 | 1062 | ||
@@ -1046,8 +1065,7 @@ static int rt2500usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1046 | */ | 1065 | */ |
1047 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1066 | static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1048 | struct sk_buff *skb, | 1067 | struct sk_buff *skb, |
1049 | struct txentry_desc *txdesc, | 1068 | struct txentry_desc *txdesc) |
1050 | struct ieee80211_tx_control *control) | ||
1051 | { | 1069 | { |
1052 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1070 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1053 | __le32 *txd = skbdesc->desc; | 1071 | __le32 *txd = skbdesc->desc; |
@@ -1071,7 +1089,7 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1071 | rt2x00_desc_write(txd, 2, word); | 1089 | rt2x00_desc_write(txd, 2, word); |
1072 | 1090 | ||
1073 | rt2x00_desc_read(txd, 0, &word); | 1091 | rt2x00_desc_read(txd, 0, &word); |
1074 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, control->retry_limit); | 1092 | rt2x00_set_field32(&word, TXD_W0_RETRY_LIMIT, txdesc->retry_limit); |
1075 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, | 1093 | rt2x00_set_field32(&word, TXD_W0_MORE_FRAG, |
1076 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); | 1094 | test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags)); |
1077 | rt2x00_set_field32(&word, TXD_W0_ACK, | 1095 | rt2x00_set_field32(&word, TXD_W0_ACK, |
@@ -1081,13 +1099,73 @@ static void rt2500usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1081 | rt2x00_set_field32(&word, TXD_W0_OFDM, | 1099 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
1082 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); | 1100 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1083 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, | 1101 | rt2x00_set_field32(&word, TXD_W0_NEW_SEQ, |
1084 | !!(control->flags & IEEE80211_TXCTL_FIRST_FRAGMENT)); | 1102 | test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags)); |
1085 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1103 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1086 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | 1104 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, |
1105 | skb->len - skbdesc->desc_len); | ||
1087 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); | 1106 | rt2x00_set_field32(&word, TXD_W0_CIPHER, CIPHER_NONE); |
1088 | rt2x00_desc_write(txd, 0, word); | 1107 | rt2x00_desc_write(txd, 0, word); |
1089 | } | 1108 | } |
1090 | 1109 | ||
1110 | /* | ||
1111 | * TX data initialization | ||
1112 | */ | ||
1113 | static void rt2500usb_beacondone(struct urb *urb); | ||
1114 | |||
1115 | static void rt2500usb_write_beacon(struct queue_entry *entry) | ||
1116 | { | ||
1117 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
1118 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); | ||
1119 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; | ||
1120 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1121 | int pipe = usb_sndbulkpipe(usb_dev, 1); | ||
1122 | int length; | ||
1123 | u16 reg; | ||
1124 | |||
1125 | /* | ||
1126 | * Add the descriptor in front of the skb. | ||
1127 | */ | ||
1128 | skb_push(entry->skb, entry->queue->desc_size); | ||
1129 | memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len); | ||
1130 | skbdesc->desc = entry->skb->data; | ||
1131 | |||
1132 | /* | ||
1133 | * Disable beaconing while we are reloading the beacon data, | ||
1134 | * otherwise we might be sending out invalid data. | ||
1135 | */ | ||
1136 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | ||
1137 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); | ||
1138 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); | ||
1139 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); | ||
1140 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | ||
1141 | |||
1142 | /* | ||
1143 | * USB devices cannot blindly pass the skb->len as the | ||
1144 | * length of the data to usb_fill_bulk_urb. Pass the skb | ||
1145 | * to the driver to determine what the length should be. | ||
1146 | */ | ||
1147 | length = rt2x00dev->ops->lib->get_tx_data_len(rt2x00dev, entry->skb); | ||
1148 | |||
1149 | usb_fill_bulk_urb(bcn_priv->urb, usb_dev, pipe, | ||
1150 | entry->skb->data, length, rt2500usb_beacondone, | ||
1151 | entry); | ||
1152 | |||
1153 | /* | ||
1154 | * Second we need to create the guardian byte. | ||
1155 | * We only need a single byte, so lets recycle | ||
1156 | * the 'flags' field we are not using for beacons. | ||
1157 | */ | ||
1158 | bcn_priv->guardian_data = 0; | ||
1159 | usb_fill_bulk_urb(bcn_priv->guardian_urb, usb_dev, pipe, | ||
1160 | &bcn_priv->guardian_data, 1, rt2500usb_beacondone, | ||
1161 | entry); | ||
1162 | |||
1163 | /* | ||
1164 | * Send out the guardian byte. | ||
1165 | */ | ||
1166 | usb_submit_urb(bcn_priv->guardian_urb, GFP_ATOMIC); | ||
1167 | } | ||
1168 | |||
1091 | static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, | 1169 | static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, |
1092 | struct sk_buff *skb) | 1170 | struct sk_buff *skb) |
1093 | { | 1171 | { |
@@ -1103,16 +1181,15 @@ static int rt2500usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, | |||
1103 | return length; | 1181 | return length; |
1104 | } | 1182 | } |
1105 | 1183 | ||
1106 | /* | ||
1107 | * TX data initialization | ||
1108 | */ | ||
1109 | static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | 1184 | static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
1110 | const unsigned int queue) | 1185 | const enum data_queue_qid queue) |
1111 | { | 1186 | { |
1112 | u16 reg; | 1187 | u16 reg; |
1113 | 1188 | ||
1114 | if (queue != RT2X00_BCN_QUEUE_BEACON) | 1189 | if (queue != QID_BEACON) { |
1190 | rt2x00usb_kick_tx_queue(rt2x00dev, queue); | ||
1115 | return; | 1191 | return; |
1192 | } | ||
1116 | 1193 | ||
1117 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | 1194 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); |
1118 | if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) { | 1195 | if (!rt2x00_get_field16(reg, TXRX_CSR19_BEACON_GEN)) { |
@@ -1138,30 +1215,28 @@ static void rt2500usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1138 | static void rt2500usb_fill_rxdone(struct queue_entry *entry, | 1215 | static void rt2500usb_fill_rxdone(struct queue_entry *entry, |
1139 | struct rxdone_entry_desc *rxdesc) | 1216 | struct rxdone_entry_desc *rxdesc) |
1140 | { | 1217 | { |
1141 | struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data; | 1218 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
1142 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | 1219 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1143 | __le32 *rxd = | 1220 | __le32 *rxd = |
1144 | (__le32 *)(entry->skb->data + | 1221 | (__le32 *)(entry->skb->data + |
1145 | (priv_rx->urb->actual_length - entry->queue->desc_size)); | 1222 | (entry_priv->urb->actual_length - |
1146 | unsigned int offset = entry->queue->desc_size + 2; | 1223 | entry->queue->desc_size)); |
1147 | u32 word0; | 1224 | u32 word0; |
1148 | u32 word1; | 1225 | u32 word1; |
1149 | 1226 | ||
1150 | /* | 1227 | /* |
1151 | * Copy descriptor to the available headroom inside the skbuffer. | 1228 | * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of |
1229 | * frame data in rt2x00usb. | ||
1152 | */ | 1230 | */ |
1153 | skb_push(entry->skb, offset); | 1231 | memcpy(skbdesc->desc, rxd, skbdesc->desc_len); |
1154 | memcpy(entry->skb->data, rxd, entry->queue->desc_size); | 1232 | rxd = (__le32 *)skbdesc->desc; |
1155 | rxd = (__le32 *)entry->skb->data; | ||
1156 | 1233 | ||
1157 | /* | 1234 | /* |
1158 | * The descriptor is now aligned to 4 bytes and thus it is | 1235 | * It is now safe to read the descriptor on all architectures. |
1159 | * now safe to read it on all architectures. | ||
1160 | */ | 1236 | */ |
1161 | rt2x00_desc_read(rxd, 0, &word0); | 1237 | rt2x00_desc_read(rxd, 0, &word0); |
1162 | rt2x00_desc_read(rxd, 1, &word1); | 1238 | rt2x00_desc_read(rxd, 1, &word1); |
1163 | 1239 | ||
1164 | rxdesc->flags = 0; | ||
1165 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1240 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1166 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1241 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1167 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) | 1242 | if (rt2x00_get_field32(word0, RXD_W0_PHYSICAL_ERROR)) |
@@ -1178,7 +1253,6 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry, | |||
1178 | entry->queue->rt2x00dev->rssi_offset; | 1253 | entry->queue->rt2x00dev->rssi_offset; |
1179 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1254 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1180 | 1255 | ||
1181 | rxdesc->dev_flags = 0; | ||
1182 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) | 1256 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
1183 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; | 1257 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; |
1184 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) | 1258 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
@@ -1187,16 +1261,7 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry, | |||
1187 | /* | 1261 | /* |
1188 | * Adjust the skb memory window to the frame boundaries. | 1262 | * Adjust the skb memory window to the frame boundaries. |
1189 | */ | 1263 | */ |
1190 | skb_pull(entry->skb, offset); | ||
1191 | skb_trim(entry->skb, rxdesc->size); | 1264 | skb_trim(entry->skb, rxdesc->size); |
1192 | |||
1193 | /* | ||
1194 | * Set descriptor and data pointer. | ||
1195 | */ | ||
1196 | skbdesc->data = entry->skb->data; | ||
1197 | skbdesc->data_len = rxdesc->size; | ||
1198 | skbdesc->desc = rxd; | ||
1199 | skbdesc->desc_len = entry->queue->desc_size; | ||
1200 | } | 1265 | } |
1201 | 1266 | ||
1202 | /* | 1267 | /* |
@@ -1205,7 +1270,7 @@ static void rt2500usb_fill_rxdone(struct queue_entry *entry, | |||
1205 | static void rt2500usb_beacondone(struct urb *urb) | 1270 | static void rt2500usb_beacondone(struct urb *urb) |
1206 | { | 1271 | { |
1207 | struct queue_entry *entry = (struct queue_entry *)urb->context; | 1272 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
1208 | struct queue_entry_priv_usb_bcn *priv_bcn = entry->priv_data; | 1273 | struct queue_entry_priv_usb_bcn *bcn_priv = entry->priv_data; |
1209 | 1274 | ||
1210 | if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) | 1275 | if (!test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) |
1211 | return; | 1276 | return; |
@@ -1216,9 +1281,9 @@ static void rt2500usb_beacondone(struct urb *urb) | |||
1216 | * Otherwise we should free the sk_buffer, the device | 1281 | * Otherwise we should free the sk_buffer, the device |
1217 | * should be doing the rest of the work now. | 1282 | * should be doing the rest of the work now. |
1218 | */ | 1283 | */ |
1219 | if (priv_bcn->guardian_urb == urb) { | 1284 | if (bcn_priv->guardian_urb == urb) { |
1220 | usb_submit_urb(priv_bcn->urb, GFP_ATOMIC); | 1285 | usb_submit_urb(bcn_priv->urb, GFP_ATOMIC); |
1221 | } else if (priv_bcn->urb == urb) { | 1286 | } else if (bcn_priv->urb == urb) { |
1222 | dev_kfree_skb(entry->skb); | 1287 | dev_kfree_skb(entry->skb); |
1223 | entry->skb = NULL; | 1288 | entry->skb = NULL; |
1224 | } | 1289 | } |
@@ -1397,23 +1462,10 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1397 | #ifdef CONFIG_RT2500USB_LEDS | 1462 | #ifdef CONFIG_RT2500USB_LEDS |
1398 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); | 1463 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_LED_MODE); |
1399 | 1464 | ||
1400 | rt2x00dev->led_radio.rt2x00dev = rt2x00dev; | 1465 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
1401 | rt2x00dev->led_radio.type = LED_TYPE_RADIO; | 1466 | if (value == LED_MODE_TXRX_ACTIVITY) |
1402 | rt2x00dev->led_radio.led_dev.brightness_set = | 1467 | rt2500usb_init_led(rt2x00dev, &rt2x00dev->led_qual, |
1403 | rt2500usb_brightness_set; | 1468 | LED_TYPE_ACTIVITY); |
1404 | rt2x00dev->led_radio.led_dev.blink_set = | ||
1405 | rt2500usb_blink_set; | ||
1406 | rt2x00dev->led_radio.flags = LED_INITIALIZED; | ||
1407 | |||
1408 | if (value == LED_MODE_TXRX_ACTIVITY) { | ||
1409 | rt2x00dev->led_qual.rt2x00dev = rt2x00dev; | ||
1410 | rt2x00dev->led_qual.type = LED_TYPE_ACTIVITY; | ||
1411 | rt2x00dev->led_qual.led_dev.brightness_set = | ||
1412 | rt2500usb_brightness_set; | ||
1413 | rt2x00dev->led_qual.led_dev.blink_set = | ||
1414 | rt2500usb_blink_set; | ||
1415 | rt2x00dev->led_qual.flags = LED_INITIALIZED; | ||
1416 | } | ||
1417 | #endif /* CONFIG_RT2500USB_LEDS */ | 1469 | #endif /* CONFIG_RT2500USB_LEDS */ |
1418 | 1470 | ||
1419 | /* | 1471 | /* |
@@ -1600,13 +1652,12 @@ static void rt2500usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
1600 | rt2x00dev->hw->flags = | 1652 | rt2x00dev->hw->flags = |
1601 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 1653 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | |
1602 | IEEE80211_HW_RX_INCLUDES_FCS | | 1654 | IEEE80211_HW_RX_INCLUDES_FCS | |
1603 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; | 1655 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1656 | IEEE80211_HW_SIGNAL_DBM; | ||
1657 | |||
1604 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; | 1658 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; |
1605 | rt2x00dev->hw->max_signal = MAX_SIGNAL; | ||
1606 | rt2x00dev->hw->max_rssi = MAX_RX_SSI; | ||
1607 | rt2x00dev->hw->queues = 2; | ||
1608 | 1659 | ||
1609 | SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev); | 1660 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
1610 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, | 1661 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
1611 | rt2x00_eeprom_addr(rt2x00dev, | 1662 | rt2x00_eeprom_addr(rt2x00dev, |
1612 | EEPROM_MAC_ADDR_0)); | 1663 | EEPROM_MAC_ADDR_0)); |
@@ -1684,97 +1735,6 @@ static int rt2500usb_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1684 | return 0; | 1735 | return 0; |
1685 | } | 1736 | } |
1686 | 1737 | ||
1687 | /* | ||
1688 | * IEEE80211 stack callback functions. | ||
1689 | */ | ||
1690 | static int rt2500usb_beacon_update(struct ieee80211_hw *hw, | ||
1691 | struct sk_buff *skb, | ||
1692 | struct ieee80211_tx_control *control) | ||
1693 | { | ||
1694 | struct rt2x00_dev *rt2x00dev = hw->priv; | ||
1695 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); | ||
1696 | struct rt2x00_intf *intf = vif_to_intf(control->vif); | ||
1697 | struct queue_entry_priv_usb_bcn *priv_bcn; | ||
1698 | struct skb_frame_desc *skbdesc; | ||
1699 | int pipe = usb_sndbulkpipe(usb_dev, 1); | ||
1700 | int length; | ||
1701 | u16 reg; | ||
1702 | |||
1703 | if (unlikely(!intf->beacon)) | ||
1704 | return -ENOBUFS; | ||
1705 | |||
1706 | priv_bcn = intf->beacon->priv_data; | ||
1707 | |||
1708 | /* | ||
1709 | * Add the descriptor in front of the skb. | ||
1710 | */ | ||
1711 | skb_push(skb, intf->beacon->queue->desc_size); | ||
1712 | memset(skb->data, 0, intf->beacon->queue->desc_size); | ||
1713 | |||
1714 | /* | ||
1715 | * Fill in skb descriptor | ||
1716 | */ | ||
1717 | skbdesc = get_skb_frame_desc(skb); | ||
1718 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
1719 | skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED; | ||
1720 | skbdesc->data = skb->data + intf->beacon->queue->desc_size; | ||
1721 | skbdesc->data_len = skb->len - intf->beacon->queue->desc_size; | ||
1722 | skbdesc->desc = skb->data; | ||
1723 | skbdesc->desc_len = intf->beacon->queue->desc_size; | ||
1724 | skbdesc->entry = intf->beacon; | ||
1725 | |||
1726 | /* | ||
1727 | * Disable beaconing while we are reloading the beacon data, | ||
1728 | * otherwise we might be sending out invalid data. | ||
1729 | */ | ||
1730 | rt2500usb_register_read(rt2x00dev, TXRX_CSR19, ®); | ||
1731 | rt2x00_set_field16(®, TXRX_CSR19_TSF_COUNT, 0); | ||
1732 | rt2x00_set_field16(®, TXRX_CSR19_TBCN, 0); | ||
1733 | rt2x00_set_field16(®, TXRX_CSR19_BEACON_GEN, 0); | ||
1734 | rt2500usb_register_write(rt2x00dev, TXRX_CSR19, reg); | ||
1735 | |||
1736 | /* | ||
1737 | * mac80211 doesn't provide the control->queue variable | ||
1738 | * for beacons. Set our own queue identification so | ||
1739 | * it can be used during descriptor initialization. | ||
1740 | */ | ||
1741 | control->queue = RT2X00_BCN_QUEUE_BEACON; | ||
1742 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
1743 | |||
1744 | /* | ||
1745 | * USB devices cannot blindly pass the skb->len as the | ||
1746 | * length of the data to usb_fill_bulk_urb. Pass the skb | ||
1747 | * to the driver to determine what the length should be. | ||
1748 | */ | ||
1749 | length = rt2500usb_get_tx_data_len(rt2x00dev, skb); | ||
1750 | |||
1751 | usb_fill_bulk_urb(priv_bcn->urb, usb_dev, pipe, | ||
1752 | skb->data, length, rt2500usb_beacondone, | ||
1753 | intf->beacon); | ||
1754 | |||
1755 | /* | ||
1756 | * Second we need to create the guardian byte. | ||
1757 | * We only need a single byte, so lets recycle | ||
1758 | * the 'flags' field we are not using for beacons. | ||
1759 | */ | ||
1760 | priv_bcn->guardian_data = 0; | ||
1761 | usb_fill_bulk_urb(priv_bcn->guardian_urb, usb_dev, pipe, | ||
1762 | &priv_bcn->guardian_data, 1, rt2500usb_beacondone, | ||
1763 | intf->beacon); | ||
1764 | |||
1765 | /* | ||
1766 | * Send out the guardian byte. | ||
1767 | */ | ||
1768 | usb_submit_urb(priv_bcn->guardian_urb, GFP_ATOMIC); | ||
1769 | |||
1770 | /* | ||
1771 | * Enable beacon generation. | ||
1772 | */ | ||
1773 | rt2500usb_kick_tx_queue(rt2x00dev, control->queue); | ||
1774 | |||
1775 | return 0; | ||
1776 | } | ||
1777 | |||
1778 | static const struct ieee80211_ops rt2500usb_mac80211_ops = { | 1738 | static const struct ieee80211_ops rt2500usb_mac80211_ops = { |
1779 | .tx = rt2x00mac_tx, | 1739 | .tx = rt2x00mac_tx, |
1780 | .start = rt2x00mac_start, | 1740 | .start = rt2x00mac_start, |
@@ -1788,7 +1748,6 @@ static const struct ieee80211_ops rt2500usb_mac80211_ops = { | |||
1788 | .bss_info_changed = rt2x00mac_bss_info_changed, | 1748 | .bss_info_changed = rt2x00mac_bss_info_changed, |
1789 | .conf_tx = rt2x00mac_conf_tx, | 1749 | .conf_tx = rt2x00mac_conf_tx, |
1790 | .get_tx_stats = rt2x00mac_get_tx_stats, | 1750 | .get_tx_stats = rt2x00mac_get_tx_stats, |
1791 | .beacon_update = rt2500usb_beacon_update, | ||
1792 | }; | 1751 | }; |
1793 | 1752 | ||
1794 | static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { | 1753 | static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { |
@@ -1803,6 +1762,7 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = { | |||
1803 | .link_tuner = rt2500usb_link_tuner, | 1762 | .link_tuner = rt2500usb_link_tuner, |
1804 | .write_tx_desc = rt2500usb_write_tx_desc, | 1763 | .write_tx_desc = rt2500usb_write_tx_desc, |
1805 | .write_tx_data = rt2x00usb_write_tx_data, | 1764 | .write_tx_data = rt2x00usb_write_tx_data, |
1765 | .write_beacon = rt2500usb_write_beacon, | ||
1806 | .get_tx_data_len = rt2500usb_get_tx_data_len, | 1766 | .get_tx_data_len = rt2500usb_get_tx_data_len, |
1807 | .kick_tx_queue = rt2500usb_kick_tx_queue, | 1767 | .kick_tx_queue = rt2500usb_kick_tx_queue, |
1808 | .fill_rxdone = rt2500usb_fill_rxdone, | 1768 | .fill_rxdone = rt2500usb_fill_rxdone, |
@@ -1816,14 +1776,14 @@ static const struct data_queue_desc rt2500usb_queue_rx = { | |||
1816 | .entry_num = RX_ENTRIES, | 1776 | .entry_num = RX_ENTRIES, |
1817 | .data_size = DATA_FRAME_SIZE, | 1777 | .data_size = DATA_FRAME_SIZE, |
1818 | .desc_size = RXD_DESC_SIZE, | 1778 | .desc_size = RXD_DESC_SIZE, |
1819 | .priv_size = sizeof(struct queue_entry_priv_usb_rx), | 1779 | .priv_size = sizeof(struct queue_entry_priv_usb), |
1820 | }; | 1780 | }; |
1821 | 1781 | ||
1822 | static const struct data_queue_desc rt2500usb_queue_tx = { | 1782 | static const struct data_queue_desc rt2500usb_queue_tx = { |
1823 | .entry_num = TX_ENTRIES, | 1783 | .entry_num = TX_ENTRIES, |
1824 | .data_size = DATA_FRAME_SIZE, | 1784 | .data_size = DATA_FRAME_SIZE, |
1825 | .desc_size = TXD_DESC_SIZE, | 1785 | .desc_size = TXD_DESC_SIZE, |
1826 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | 1786 | .priv_size = sizeof(struct queue_entry_priv_usb), |
1827 | }; | 1787 | }; |
1828 | 1788 | ||
1829 | static const struct data_queue_desc rt2500usb_queue_bcn = { | 1789 | static const struct data_queue_desc rt2500usb_queue_bcn = { |
@@ -1837,7 +1797,7 @@ static const struct data_queue_desc rt2500usb_queue_atim = { | |||
1837 | .entry_num = ATIM_ENTRIES, | 1797 | .entry_num = ATIM_ENTRIES, |
1838 | .data_size = DATA_FRAME_SIZE, | 1798 | .data_size = DATA_FRAME_SIZE, |
1839 | .desc_size = TXD_DESC_SIZE, | 1799 | .desc_size = TXD_DESC_SIZE, |
1840 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | 1800 | .priv_size = sizeof(struct queue_entry_priv_usb), |
1841 | }; | 1801 | }; |
1842 | 1802 | ||
1843 | static const struct rt2x00_ops rt2500usb_ops = { | 1803 | static const struct rt2x00_ops rt2500usb_ops = { |
@@ -1846,6 +1806,7 @@ static const struct rt2x00_ops rt2500usb_ops = { | |||
1846 | .max_ap_intf = 1, | 1806 | .max_ap_intf = 1, |
1847 | .eeprom_size = EEPROM_SIZE, | 1807 | .eeprom_size = EEPROM_SIZE, |
1848 | .rf_size = RF_SIZE, | 1808 | .rf_size = RF_SIZE, |
1809 | .tx_queues = NUM_TX_QUEUES, | ||
1849 | .rx = &rt2500usb_queue_rx, | 1810 | .rx = &rt2500usb_queue_rx, |
1850 | .tx = &rt2500usb_queue_tx, | 1811 | .tx = &rt2500usb_queue_tx, |
1851 | .bcn = &rt2500usb_queue_bcn, | 1812 | .bcn = &rt2500usb_queue_bcn, |
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.h b/drivers/net/wireless/rt2x00/rt2500usb.h index a37a068d0c71..4769ffeb4cc6 100644 --- a/drivers/net/wireless/rt2x00/rt2500usb.h +++ b/drivers/net/wireless/rt2x00/rt2500usb.h | |||
@@ -48,8 +48,6 @@ | |||
48 | * Signal information. | 48 | * Signal information. |
49 | * Defaul offset is required for RSSI <-> dBm conversion. | 49 | * Defaul offset is required for RSSI <-> dBm conversion. |
50 | */ | 50 | */ |
51 | #define MAX_SIGNAL 100 | ||
52 | #define MAX_RX_SSI -1 | ||
53 | #define DEFAULT_RSSI_OFFSET 120 | 51 | #define DEFAULT_RSSI_OFFSET 120 |
54 | 52 | ||
55 | /* | 53 | /* |
@@ -63,6 +61,11 @@ | |||
63 | #define RF_SIZE 0x0014 | 61 | #define RF_SIZE 0x0014 |
64 | 62 | ||
65 | /* | 63 | /* |
64 | * Number of TX queues. | ||
65 | */ | ||
66 | #define NUM_TX_QUEUES 2 | ||
67 | |||
68 | /* | ||
66 | * Control/Status Registers(CSR). | 69 | * Control/Status Registers(CSR). |
67 | * Some values are set in TU, whereas 1 TU == 1024 us. | 70 | * Some values are set in TU, whereas 1 TU == 1024 us. |
68 | */ | 71 | */ |
@@ -206,7 +209,7 @@ | |||
206 | #define MAC_CSR21_OFF_PERIOD FIELD16(0xff00) | 209 | #define MAC_CSR21_OFF_PERIOD FIELD16(0xff00) |
207 | 210 | ||
208 | /* | 211 | /* |
209 | * Collision window control register. | 212 | * MAC_CSR22: Collision window control register. |
210 | */ | 213 | */ |
211 | #define MAC_CSR22 0x042c | 214 | #define MAC_CSR22 0x042c |
212 | 215 | ||
@@ -293,7 +296,7 @@ | |||
293 | #define TXRX_CSR7_BBP_ID1_VALID FIELD16(0x8000) | 296 | #define TXRX_CSR7_BBP_ID1_VALID FIELD16(0x8000) |
294 | 297 | ||
295 | /* | 298 | /* |
296 | * TXRX_CSR5: OFDM TX BBP ID1. | 299 | * TXRX_CSR8: OFDM TX BBP ID1. |
297 | */ | 300 | */ |
298 | #define TXRX_CSR8 0x0450 | 301 | #define TXRX_CSR8 0x0450 |
299 | #define TXRX_CSR8_BBP_ID0 FIELD16(0x007f) | 302 | #define TXRX_CSR8_BBP_ID0 FIELD16(0x007f) |
@@ -367,7 +370,14 @@ | |||
367 | */ | 370 | */ |
368 | 371 | ||
369 | /* | 372 | /* |
370 | * SEC_CSR0-SEC_CSR7: Shared key 0, word 0-7 | 373 | * SEC_CSR0: Shared key 0, word 0 |
374 | * SEC_CSR1: Shared key 0, word 1 | ||
375 | * SEC_CSR2: Shared key 0, word 2 | ||
376 | * SEC_CSR3: Shared key 0, word 3 | ||
377 | * SEC_CSR4: Shared key 0, word 4 | ||
378 | * SEC_CSR5: Shared key 0, word 5 | ||
379 | * SEC_CSR6: Shared key 0, word 6 | ||
380 | * SEC_CSR7: Shared key 0, word 7 | ||
371 | */ | 381 | */ |
372 | #define SEC_CSR0 0x0480 | 382 | #define SEC_CSR0 0x0480 |
373 | #define SEC_CSR1 0x0482 | 383 | #define SEC_CSR1 0x0482 |
@@ -379,7 +389,14 @@ | |||
379 | #define SEC_CSR7 0x048e | 389 | #define SEC_CSR7 0x048e |
380 | 390 | ||
381 | /* | 391 | /* |
382 | * SEC_CSR8-SEC_CSR15: Shared key 1, word 0-7 | 392 | * SEC_CSR8: Shared key 1, word 0 |
393 | * SEC_CSR9: Shared key 1, word 1 | ||
394 | * SEC_CSR10: Shared key 1, word 2 | ||
395 | * SEC_CSR11: Shared key 1, word 3 | ||
396 | * SEC_CSR12: Shared key 1, word 4 | ||
397 | * SEC_CSR13: Shared key 1, word 5 | ||
398 | * SEC_CSR14: Shared key 1, word 6 | ||
399 | * SEC_CSR15: Shared key 1, word 7 | ||
383 | */ | 400 | */ |
384 | #define SEC_CSR8 0x0490 | 401 | #define SEC_CSR8 0x0490 |
385 | #define SEC_CSR9 0x0492 | 402 | #define SEC_CSR9 0x0492 |
@@ -391,7 +408,14 @@ | |||
391 | #define SEC_CSR15 0x049e | 408 | #define SEC_CSR15 0x049e |
392 | 409 | ||
393 | /* | 410 | /* |
394 | * SEC_CSR16-SEC_CSR23: Shared key 2, word 0-7 | 411 | * SEC_CSR16: Shared key 2, word 0 |
412 | * SEC_CSR17: Shared key 2, word 1 | ||
413 | * SEC_CSR18: Shared key 2, word 2 | ||
414 | * SEC_CSR19: Shared key 2, word 3 | ||
415 | * SEC_CSR20: Shared key 2, word 4 | ||
416 | * SEC_CSR21: Shared key 2, word 5 | ||
417 | * SEC_CSR22: Shared key 2, word 6 | ||
418 | * SEC_CSR23: Shared key 2, word 7 | ||
395 | */ | 419 | */ |
396 | #define SEC_CSR16 0x04a0 | 420 | #define SEC_CSR16 0x04a0 |
397 | #define SEC_CSR17 0x04a2 | 421 | #define SEC_CSR17 0x04a2 |
@@ -403,7 +427,14 @@ | |||
403 | #define SEC_CSR23 0x04ae | 427 | #define SEC_CSR23 0x04ae |
404 | 428 | ||
405 | /* | 429 | /* |
406 | * SEC_CSR24-SEC_CSR31: Shared key 3, word 0-7 | 430 | * SEC_CSR24: Shared key 3, word 0 |
431 | * SEC_CSR25: Shared key 3, word 1 | ||
432 | * SEC_CSR26: Shared key 3, word 2 | ||
433 | * SEC_CSR27: Shared key 3, word 3 | ||
434 | * SEC_CSR28: Shared key 3, word 4 | ||
435 | * SEC_CSR29: Shared key 3, word 5 | ||
436 | * SEC_CSR30: Shared key 3, word 6 | ||
437 | * SEC_CSR31: Shared key 3, word 7 | ||
407 | */ | 438 | */ |
408 | #define SEC_CSR24 0x04b0 | 439 | #define SEC_CSR24 0x04b0 |
409 | #define SEC_CSR25 0x04b2 | 440 | #define SEC_CSR25 0x04b2 |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index a74e1a5c56fd..07b03b3c7ef1 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -44,7 +44,7 @@ | |||
44 | /* | 44 | /* |
45 | * Module information. | 45 | * Module information. |
46 | */ | 46 | */ |
47 | #define DRV_VERSION "2.1.4" | 47 | #define DRV_VERSION "2.1.8" |
48 | #define DRV_PROJECT "http://rt2x00.serialmonkey.com" | 48 | #define DRV_PROJECT "http://rt2x00.serialmonkey.com" |
49 | 49 | ||
50 | /* | 50 | /* |
@@ -111,33 +111,6 @@ | |||
111 | #define EIFS ( SIFS + (8 * (IEEE80211_HEADER + ACK_SIZE)) ) | 111 | #define EIFS ( SIFS + (8 * (IEEE80211_HEADER + ACK_SIZE)) ) |
112 | 112 | ||
113 | /* | 113 | /* |
114 | * IEEE802.11 header defines | ||
115 | */ | ||
116 | static inline int is_rts_frame(u16 fc) | ||
117 | { | ||
118 | return (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_CTL) && | ||
119 | ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_RTS)); | ||
120 | } | ||
121 | |||
122 | static inline int is_cts_frame(u16 fc) | ||
123 | { | ||
124 | return (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_CTL) && | ||
125 | ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_CTS)); | ||
126 | } | ||
127 | |||
128 | static inline int is_probe_resp(u16 fc) | ||
129 | { | ||
130 | return (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) && | ||
131 | ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_PROBE_RESP)); | ||
132 | } | ||
133 | |||
134 | static inline int is_beacon(u16 fc) | ||
135 | { | ||
136 | return (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) && | ||
137 | ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_BEACON)); | ||
138 | } | ||
139 | |||
140 | /* | ||
141 | * Chipset identification | 114 | * Chipset identification |
142 | * The chipset on the device is composed of a RT and RF chip. | 115 | * The chipset on the device is composed of a RT and RF chip. |
143 | * The chipset combination is important for determining device capabilities. | 116 | * The chipset combination is important for determining device capabilities. |
@@ -391,6 +364,8 @@ struct rt2x00_intf { | |||
391 | #define DELAYED_UPDATE_BEACON 0x00000001 | 364 | #define DELAYED_UPDATE_BEACON 0x00000001 |
392 | #define DELAYED_CONFIG_ERP 0x00000002 | 365 | #define DELAYED_CONFIG_ERP 0x00000002 |
393 | #define DELAYED_LED_ASSOC 0x00000004 | 366 | #define DELAYED_LED_ASSOC 0x00000004 |
367 | |||
368 | u16 seqno; | ||
394 | }; | 369 | }; |
395 | 370 | ||
396 | static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) | 371 | static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) |
@@ -409,7 +384,7 @@ static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif) | |||
409 | * @supported_rates: Rate types which are supported (CCK, OFDM). | 384 | * @supported_rates: Rate types which are supported (CCK, OFDM). |
410 | * @num_channels: Number of supported channels. This is used as array size | 385 | * @num_channels: Number of supported channels. This is used as array size |
411 | * for @tx_power_a, @tx_power_bg and @channels. | 386 | * for @tx_power_a, @tx_power_bg and @channels. |
412 | * channels: Device/chipset specific channel values (See &struct rf_channel). | 387 | * @channels: Device/chipset specific channel values (See &struct rf_channel). |
413 | * @tx_power_a: TX power values for all 5.2GHz channels (may be NULL). | 388 | * @tx_power_a: TX power values for all 5.2GHz channels (may be NULL). |
414 | * @tx_power_bg: TX power values for all 2.4GHz channels (may be NULL). | 389 | * @tx_power_bg: TX power values for all 2.4GHz channels (may be NULL). |
415 | * @tx_power_default: Default TX power value to use when either | 390 | * @tx_power_default: Default TX power value to use when either |
@@ -461,6 +436,7 @@ struct rt2x00lib_conf { | |||
461 | */ | 436 | */ |
462 | struct rt2x00lib_erp { | 437 | struct rt2x00lib_erp { |
463 | int short_preamble; | 438 | int short_preamble; |
439 | int cts_protection; | ||
464 | 440 | ||
465 | int ack_timeout; | 441 | int ack_timeout; |
466 | int ack_consume_time; | 442 | int ack_consume_time; |
@@ -545,15 +521,13 @@ struct rt2x00lib_ops { | |||
545 | */ | 521 | */ |
546 | void (*write_tx_desc) (struct rt2x00_dev *rt2x00dev, | 522 | void (*write_tx_desc) (struct rt2x00_dev *rt2x00dev, |
547 | struct sk_buff *skb, | 523 | struct sk_buff *skb, |
548 | struct txentry_desc *txdesc, | 524 | struct txentry_desc *txdesc); |
549 | struct ieee80211_tx_control *control); | 525 | int (*write_tx_data) (struct queue_entry *entry); |
550 | int (*write_tx_data) (struct rt2x00_dev *rt2x00dev, | 526 | void (*write_beacon) (struct queue_entry *entry); |
551 | struct data_queue *queue, struct sk_buff *skb, | ||
552 | struct ieee80211_tx_control *control); | ||
553 | int (*get_tx_data_len) (struct rt2x00_dev *rt2x00dev, | 527 | int (*get_tx_data_len) (struct rt2x00_dev *rt2x00dev, |
554 | struct sk_buff *skb); | 528 | struct sk_buff *skb); |
555 | void (*kick_tx_queue) (struct rt2x00_dev *rt2x00dev, | 529 | void (*kick_tx_queue) (struct rt2x00_dev *rt2x00dev, |
556 | const unsigned int queue); | 530 | const enum data_queue_qid queue); |
557 | 531 | ||
558 | /* | 532 | /* |
559 | * RX control handlers | 533 | * RX control handlers |
@@ -597,6 +571,7 @@ struct rt2x00_ops { | |||
597 | const unsigned int max_ap_intf; | 571 | const unsigned int max_ap_intf; |
598 | const unsigned int eeprom_size; | 572 | const unsigned int eeprom_size; |
599 | const unsigned int rf_size; | 573 | const unsigned int rf_size; |
574 | const unsigned int tx_queues; | ||
600 | const struct data_queue_desc *rx; | 575 | const struct data_queue_desc *rx; |
601 | const struct data_queue_desc *tx; | 576 | const struct data_queue_desc *tx; |
602 | const struct data_queue_desc *bcn; | 577 | const struct data_queue_desc *bcn; |
@@ -626,11 +601,11 @@ enum rt2x00_flags { | |||
626 | /* | 601 | /* |
627 | * Driver features | 602 | * Driver features |
628 | */ | 603 | */ |
629 | DRIVER_SUPPORT_MIXED_INTERFACES, | ||
630 | DRIVER_REQUIRE_FIRMWARE, | 604 | DRIVER_REQUIRE_FIRMWARE, |
631 | DRIVER_REQUIRE_BEACON_GUARD, | 605 | DRIVER_REQUIRE_BEACON_GUARD, |
632 | DRIVER_REQUIRE_ATIM_QUEUE, | 606 | DRIVER_REQUIRE_ATIM_QUEUE, |
633 | DRIVER_REQUIRE_SCHEDULED, | 607 | DRIVER_REQUIRE_SCHEDULED, |
608 | DRIVER_REQUIRE_DMA, | ||
634 | 609 | ||
635 | /* | 610 | /* |
636 | * Driver configuration | 611 | * Driver configuration |
@@ -655,11 +630,7 @@ struct rt2x00_dev { | |||
655 | * When accessing this variable, the rt2x00dev_{pci,usb} | 630 | * When accessing this variable, the rt2x00dev_{pci,usb} |
656 | * macro's should be used for correct typecasting. | 631 | * macro's should be used for correct typecasting. |
657 | */ | 632 | */ |
658 | void *dev; | 633 | struct device *dev; |
659 | #define rt2x00dev_pci(__dev) ( (struct pci_dev *)(__dev)->dev ) | ||
660 | #define rt2x00dev_usb(__dev) ( (struct usb_interface *)(__dev)->dev ) | ||
661 | #define rt2x00dev_usb_dev(__dev)\ | ||
662 | ( (struct usb_device *)interface_to_usbdev(rt2x00dev_usb(__dev)) ) | ||
663 | 634 | ||
664 | /* | 635 | /* |
665 | * Callback functions. | 636 | * Callback functions. |
@@ -682,7 +653,7 @@ struct rt2x00_dev { | |||
682 | #define RFKILL_STATE_ALLOCATED 1 | 653 | #define RFKILL_STATE_ALLOCATED 1 |
683 | #define RFKILL_STATE_REGISTERED 2 | 654 | #define RFKILL_STATE_REGISTERED 2 |
684 | struct rfkill *rfkill; | 655 | struct rfkill *rfkill; |
685 | struct input_polled_dev *poll_dev; | 656 | struct delayed_work rfkill_work; |
686 | #endif /* CONFIG_RT2X00_LIB_RFKILL */ | 657 | #endif /* CONFIG_RT2X00_LIB_RFKILL */ |
687 | 658 | ||
688 | /* | 659 | /* |
@@ -820,8 +791,10 @@ struct rt2x00_dev { | |||
820 | 791 | ||
821 | /* | 792 | /* |
822 | * Scheduled work. | 793 | * Scheduled work. |
794 | * NOTE: intf_work will use ieee80211_iterate_active_interfaces() | ||
795 | * which means it cannot be placed on the hw->workqueue | ||
796 | * due to RTNL locking requirements. | ||
823 | */ | 797 | */ |
824 | struct workqueue_struct *workqueue; | ||
825 | struct work_struct intf_work; | 798 | struct work_struct intf_work; |
826 | struct work_struct filter_work; | 799 | struct work_struct filter_work; |
827 | 800 | ||
@@ -830,7 +803,7 @@ struct rt2x00_dev { | |||
830 | * The Beacon array also contains the Atim queue | 803 | * The Beacon array also contains the Atim queue |
831 | * if that is supported by the device. | 804 | * if that is supported by the device. |
832 | */ | 805 | */ |
833 | int data_queues; | 806 | unsigned int data_queues; |
834 | struct data_queue *rx; | 807 | struct data_queue *rx; |
835 | struct data_queue *tx; | 808 | struct data_queue *tx; |
836 | struct data_queue *bcn; | 809 | struct data_queue *bcn; |
@@ -934,55 +907,41 @@ static inline u16 get_duration_res(const unsigned int size, const u8 rate) | |||
934 | } | 907 | } |
935 | 908 | ||
936 | /** | 909 | /** |
937 | * rt2x00queue_get_queue - Convert mac80211 queue index to rt2x00 queue | 910 | * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes. |
938 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | 911 | * @rt2x00dev: Pointer to &struct rt2x00_dev. |
939 | * @queue: mac80211/rt2x00 queue index | 912 | * @skb: The skb to map. |
940 | * (see &enum ieee80211_tx_queue and &enum rt2x00_bcn_queue). | 913 | */ |
914 | void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
915 | |||
916 | /** | ||
917 | * rt2x00queue_get_queue - Convert queue index to queue pointer | ||
918 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
919 | * @queue: rt2x00 queue index (see &enum data_queue_qid). | ||
941 | */ | 920 | */ |
942 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, | 921 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, |
943 | const unsigned int queue); | 922 | const enum data_queue_qid queue); |
944 | 923 | ||
945 | /** | 924 | /** |
946 | * rt2x00queue_get_entry - Get queue entry where the given index points to. | 925 | * rt2x00queue_get_entry - Get queue entry where the given index points to. |
947 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | 926 | * @queue: Pointer to &struct data_queue from where we obtain the entry. |
948 | * @index: Index identifier for obtaining the correct index. | 927 | * @index: Index identifier for obtaining the correct index. |
949 | */ | 928 | */ |
950 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, | 929 | struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue, |
951 | enum queue_index index); | 930 | enum queue_index index); |
952 | 931 | ||
953 | /** | ||
954 | * rt2x00queue_index_inc - Index incrementation function | ||
955 | * @queue: Queue (&struct data_queue) to perform the action on. | ||
956 | * @action: Index type (&enum queue_index) to perform the action on. | ||
957 | * | ||
958 | * This function will increase the requested index on the queue, | ||
959 | * it will grab the appropriate locks and handle queue overflow events by | ||
960 | * resetting the index to the start of the queue. | ||
961 | */ | ||
962 | void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index); | ||
963 | |||
964 | |||
965 | /* | 932 | /* |
966 | * Interrupt context handlers. | 933 | * Interrupt context handlers. |
967 | */ | 934 | */ |
968 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); | 935 | void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev); |
969 | void rt2x00lib_txdone(struct queue_entry *entry, | 936 | void rt2x00lib_txdone(struct queue_entry *entry, |
970 | struct txdone_entry_desc *txdesc); | 937 | struct txdone_entry_desc *txdesc); |
971 | void rt2x00lib_rxdone(struct queue_entry *entry, | 938 | void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev, |
972 | struct rxdone_entry_desc *rxdesc); | 939 | struct queue_entry *entry); |
973 | |||
974 | /* | ||
975 | * TX descriptor initializer | ||
976 | */ | ||
977 | void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | ||
978 | struct sk_buff *skb, | ||
979 | struct ieee80211_tx_control *control); | ||
980 | 940 | ||
981 | /* | 941 | /* |
982 | * mac80211 handlers. | 942 | * mac80211 handlers. |
983 | */ | 943 | */ |
984 | int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, | 944 | int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb); |
985 | struct ieee80211_tx_control *control); | ||
986 | int rt2x00mac_start(struct ieee80211_hw *hw); | 945 | int rt2x00mac_start(struct ieee80211_hw *hw); |
987 | void rt2x00mac_stop(struct ieee80211_hw *hw); | 946 | void rt2x00mac_stop(struct ieee80211_hw *hw); |
988 | int rt2x00mac_add_interface(struct ieee80211_hw *hw, | 947 | int rt2x00mac_add_interface(struct ieee80211_hw *hw, |
@@ -1005,7 +964,7 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, | |||
1005 | struct ieee80211_vif *vif, | 964 | struct ieee80211_vif *vif, |
1006 | struct ieee80211_bss_conf *bss_conf, | 965 | struct ieee80211_bss_conf *bss_conf, |
1007 | u32 changes); | 966 | u32 changes); |
1008 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue, | 967 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, u16 queue, |
1009 | const struct ieee80211_tx_queue_params *params); | 968 | const struct ieee80211_tx_queue_params *params); |
1010 | 969 | ||
1011 | /* | 970 | /* |
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c index 48608e8cc8b4..f20ca712504f 100644 --- a/drivers/net/wireless/rt2x00/rt2x00config.c +++ b/drivers/net/wireless/rt2x00/rt2x00config.c | |||
@@ -84,6 +84,8 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev, | |||
84 | memset(&erp, 0, sizeof(erp)); | 84 | memset(&erp, 0, sizeof(erp)); |
85 | 85 | ||
86 | erp.short_preamble = bss_conf->use_short_preamble; | 86 | erp.short_preamble = bss_conf->use_short_preamble; |
87 | erp.cts_protection = bss_conf->use_cts_prot; | ||
88 | |||
87 | erp.ack_timeout = PLCP + get_duration(ACK_SIZE, 10); | 89 | erp.ack_timeout = PLCP + get_duration(ACK_SIZE, 10); |
88 | erp.ack_consume_time = SIFS + PLCP + get_duration(ACK_SIZE, 10); | 90 | erp.ack_consume_time = SIFS + PLCP + get_duration(ACK_SIZE, 10); |
89 | 91 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c index bfab3b8780d6..300cf061035f 100644 --- a/drivers/net/wireless/rt2x00/rt2x00debug.c +++ b/drivers/net/wireless/rt2x00/rt2x00debug.c | |||
@@ -115,7 +115,7 @@ struct rt2x00debug_intf { | |||
115 | }; | 115 | }; |
116 | 116 | ||
117 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | 117 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, |
118 | struct sk_buff *skb) | 118 | enum rt2x00_dump_type type, struct sk_buff *skb) |
119 | { | 119 | { |
120 | struct rt2x00debug_intf *intf = rt2x00dev->debugfs_intf; | 120 | struct rt2x00debug_intf *intf = rt2x00dev->debugfs_intf; |
121 | struct skb_frame_desc *desc = get_skb_frame_desc(skb); | 121 | struct skb_frame_desc *desc = get_skb_frame_desc(skb); |
@@ -133,7 +133,7 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |||
133 | return; | 133 | return; |
134 | } | 134 | } |
135 | 135 | ||
136 | skbcopy = alloc_skb(sizeof(*dump_hdr) + desc->desc_len + desc->data_len, | 136 | skbcopy = alloc_skb(sizeof(*dump_hdr) + desc->desc_len + skb->len, |
137 | GFP_ATOMIC); | 137 | GFP_ATOMIC); |
138 | if (!skbcopy) { | 138 | if (!skbcopy) { |
139 | DEBUG(rt2x00dev, "Failed to copy skb for dump.\n"); | 139 | DEBUG(rt2x00dev, "Failed to copy skb for dump.\n"); |
@@ -144,18 +144,18 @@ void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | |||
144 | dump_hdr->version = cpu_to_le32(DUMP_HEADER_VERSION); | 144 | dump_hdr->version = cpu_to_le32(DUMP_HEADER_VERSION); |
145 | dump_hdr->header_length = cpu_to_le32(sizeof(*dump_hdr)); | 145 | dump_hdr->header_length = cpu_to_le32(sizeof(*dump_hdr)); |
146 | dump_hdr->desc_length = cpu_to_le32(desc->desc_len); | 146 | dump_hdr->desc_length = cpu_to_le32(desc->desc_len); |
147 | dump_hdr->data_length = cpu_to_le32(desc->data_len); | 147 | dump_hdr->data_length = cpu_to_le32(skb->len); |
148 | dump_hdr->chip_rt = cpu_to_le16(rt2x00dev->chip.rt); | 148 | dump_hdr->chip_rt = cpu_to_le16(rt2x00dev->chip.rt); |
149 | dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf); | 149 | dump_hdr->chip_rf = cpu_to_le16(rt2x00dev->chip.rf); |
150 | dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev); | 150 | dump_hdr->chip_rev = cpu_to_le32(rt2x00dev->chip.rev); |
151 | dump_hdr->type = cpu_to_le16(desc->frame_type); | 151 | dump_hdr->type = cpu_to_le16(type); |
152 | dump_hdr->queue_index = desc->entry->queue->qid; | 152 | dump_hdr->queue_index = desc->entry->queue->qid; |
153 | dump_hdr->entry_index = desc->entry->entry_idx; | 153 | dump_hdr->entry_index = desc->entry->entry_idx; |
154 | dump_hdr->timestamp_sec = cpu_to_le32(timestamp.tv_sec); | 154 | dump_hdr->timestamp_sec = cpu_to_le32(timestamp.tv_sec); |
155 | dump_hdr->timestamp_usec = cpu_to_le32(timestamp.tv_usec); | 155 | dump_hdr->timestamp_usec = cpu_to_le32(timestamp.tv_usec); |
156 | 156 | ||
157 | memcpy(skb_put(skbcopy, desc->desc_len), desc->desc, desc->desc_len); | 157 | memcpy(skb_put(skbcopy, desc->desc_len), desc->desc, desc->desc_len); |
158 | memcpy(skb_put(skbcopy, desc->data_len), desc->data, desc->data_len); | 158 | memcpy(skb_put(skbcopy, skb->len), skb->data, skb->len); |
159 | 159 | ||
160 | skb_queue_tail(&intf->frame_dump_skbqueue, skbcopy); | 160 | skb_queue_tail(&intf->frame_dump_skbqueue, skbcopy); |
161 | wake_up_interruptible(&intf->frame_dump_waitqueue); | 161 | wake_up_interruptible(&intf->frame_dump_waitqueue); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index c997d4f28ab3..8c93eb8353b0 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -28,7 +28,6 @@ | |||
28 | 28 | ||
29 | #include "rt2x00.h" | 29 | #include "rt2x00.h" |
30 | #include "rt2x00lib.h" | 30 | #include "rt2x00lib.h" |
31 | #include "rt2x00dump.h" | ||
32 | 31 | ||
33 | /* | 32 | /* |
34 | * Link tuning handlers | 33 | * Link tuning handlers |
@@ -75,7 +74,7 @@ static void rt2x00lib_start_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
75 | 74 | ||
76 | rt2x00lib_reset_link_tuner(rt2x00dev); | 75 | rt2x00lib_reset_link_tuner(rt2x00dev); |
77 | 76 | ||
78 | queue_delayed_work(rt2x00dev->workqueue, | 77 | queue_delayed_work(rt2x00dev->hw->workqueue, |
79 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); | 78 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); |
80 | } | 79 | } |
81 | 80 | ||
@@ -113,6 +112,8 @@ int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
113 | if (status) | 112 | if (status) |
114 | return status; | 113 | return status; |
115 | 114 | ||
115 | rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_IRQ_ON); | ||
116 | |||
116 | rt2x00leds_led_radio(rt2x00dev, true); | 117 | rt2x00leds_led_radio(rt2x00dev, true); |
117 | rt2x00led_led_activity(rt2x00dev, true); | 118 | rt2x00led_led_activity(rt2x00dev, true); |
118 | 119 | ||
@@ -126,7 +127,7 @@ int rt2x00lib_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
126 | /* | 127 | /* |
127 | * Start the TX queues. | 128 | * Start the TX queues. |
128 | */ | 129 | */ |
129 | ieee80211_start_queues(rt2x00dev->hw); | 130 | ieee80211_wake_queues(rt2x00dev->hw); |
130 | 131 | ||
131 | return 0; | 132 | return 0; |
132 | } | 133 | } |
@@ -150,6 +151,7 @@ void rt2x00lib_disable_radio(struct rt2x00_dev *rt2x00dev) | |||
150 | * Disable radio. | 151 | * Disable radio. |
151 | */ | 152 | */ |
152 | rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_OFF); | 153 | rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_OFF); |
154 | rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_RADIO_IRQ_OFF); | ||
153 | rt2x00led_led_activity(rt2x00dev, false); | 155 | rt2x00led_led_activity(rt2x00dev, false); |
154 | rt2x00leds_led_radio(rt2x00dev, false); | 156 | rt2x00leds_led_radio(rt2x00dev, false); |
155 | } | 157 | } |
@@ -390,7 +392,7 @@ static void rt2x00lib_link_tuner(struct work_struct *work) | |||
390 | * Increase tuner counter, and reschedule the next link tuner run. | 392 | * Increase tuner counter, and reschedule the next link tuner run. |
391 | */ | 393 | */ |
392 | rt2x00dev->link.count++; | 394 | rt2x00dev->link.count++; |
393 | queue_delayed_work(rt2x00dev->workqueue, | 395 | queue_delayed_work(rt2x00dev->hw->workqueue, |
394 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); | 396 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); |
395 | } | 397 | } |
396 | 398 | ||
@@ -407,8 +409,6 @@ static void rt2x00lib_intf_scheduled_iter(void *data, u8 *mac, | |||
407 | { | 409 | { |
408 | struct rt2x00_dev *rt2x00dev = data; | 410 | struct rt2x00_dev *rt2x00dev = data; |
409 | struct rt2x00_intf *intf = vif_to_intf(vif); | 411 | struct rt2x00_intf *intf = vif_to_intf(vif); |
410 | struct sk_buff *skb; | ||
411 | struct ieee80211_tx_control control; | ||
412 | struct ieee80211_bss_conf conf; | 412 | struct ieee80211_bss_conf conf; |
413 | int delayed_flags; | 413 | int delayed_flags; |
414 | 414 | ||
@@ -434,12 +434,8 @@ static void rt2x00lib_intf_scheduled_iter(void *data, u8 *mac, | |||
434 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags)) | 434 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags)) |
435 | return; | 435 | return; |
436 | 436 | ||
437 | if (delayed_flags & DELAYED_UPDATE_BEACON) { | 437 | if (delayed_flags & DELAYED_UPDATE_BEACON) |
438 | skb = ieee80211_beacon_get(rt2x00dev->hw, vif, &control); | 438 | rt2x00queue_update_beacon(rt2x00dev, vif); |
439 | if (skb && rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, | ||
440 | skb, &control)) | ||
441 | dev_kfree_skb(skb); | ||
442 | } | ||
443 | 439 | ||
444 | if (delayed_flags & DELAYED_CONFIG_ERP) | 440 | if (delayed_flags & DELAYED_CONFIG_ERP) |
445 | rt2x00lib_config_erp(rt2x00dev, intf, &conf); | 441 | rt2x00lib_config_erp(rt2x00dev, intf, &conf); |
@@ -468,12 +464,19 @@ static void rt2x00lib_intf_scheduled(struct work_struct *work) | |||
468 | static void rt2x00lib_beacondone_iter(void *data, u8 *mac, | 464 | static void rt2x00lib_beacondone_iter(void *data, u8 *mac, |
469 | struct ieee80211_vif *vif) | 465 | struct ieee80211_vif *vif) |
470 | { | 466 | { |
467 | struct rt2x00_dev *rt2x00dev = data; | ||
471 | struct rt2x00_intf *intf = vif_to_intf(vif); | 468 | struct rt2x00_intf *intf = vif_to_intf(vif); |
472 | 469 | ||
473 | if (vif->type != IEEE80211_IF_TYPE_AP && | 470 | if (vif->type != IEEE80211_IF_TYPE_AP && |
474 | vif->type != IEEE80211_IF_TYPE_IBSS) | 471 | vif->type != IEEE80211_IF_TYPE_IBSS) |
475 | return; | 472 | return; |
476 | 473 | ||
474 | /* | ||
475 | * Clean up the beacon skb. | ||
476 | */ | ||
477 | rt2x00queue_free_skb(rt2x00dev, intf->beacon->skb); | ||
478 | intf->beacon->skb = NULL; | ||
479 | |||
477 | spin_lock(&intf->lock); | 480 | spin_lock(&intf->lock); |
478 | intf->delayed_flags |= DELAYED_UPDATE_BEACON; | 481 | intf->delayed_flags |= DELAYED_UPDATE_BEACON; |
479 | spin_unlock(&intf->lock); | 482 | spin_unlock(&intf->lock); |
@@ -488,7 +491,7 @@ void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev) | |||
488 | rt2x00lib_beacondone_iter, | 491 | rt2x00lib_beacondone_iter, |
489 | rt2x00dev); | 492 | rt2x00dev); |
490 | 493 | ||
491 | queue_work(rt2x00dev->workqueue, &rt2x00dev->intf_work); | 494 | schedule_work(&rt2x00dev->intf_work); |
492 | } | 495 | } |
493 | EXPORT_SYMBOL_GPL(rt2x00lib_beacondone); | 496 | EXPORT_SYMBOL_GPL(rt2x00lib_beacondone); |
494 | 497 | ||
@@ -496,79 +499,132 @@ void rt2x00lib_txdone(struct queue_entry *entry, | |||
496 | struct txdone_entry_desc *txdesc) | 499 | struct txdone_entry_desc *txdesc) |
497 | { | 500 | { |
498 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 501 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
499 | struct skb_frame_desc *skbdesc; | 502 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); |
500 | struct ieee80211_tx_status tx_status; | 503 | enum data_queue_qid qid = skb_get_queue_mapping(entry->skb); |
501 | int success = !!(txdesc->status == TX_SUCCESS || | 504 | |
502 | txdesc->status == TX_SUCCESS_RETRY); | 505 | /* |
503 | int fail = !!(txdesc->status == TX_FAIL_RETRY || | 506 | * Unmap the skb. |
504 | txdesc->status == TX_FAIL_INVALID || | 507 | */ |
505 | txdesc->status == TX_FAIL_OTHER); | 508 | rt2x00queue_unmap_skb(rt2x00dev, entry->skb); |
509 | |||
510 | /* | ||
511 | * Send frame to debugfs immediately, after this call is completed | ||
512 | * we are going to overwrite the skb->cb array. | ||
513 | */ | ||
514 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TXDONE, entry->skb); | ||
506 | 515 | ||
507 | /* | 516 | /* |
508 | * Update TX statistics. | 517 | * Update TX statistics. |
509 | */ | 518 | */ |
510 | rt2x00dev->link.qual.tx_success += success; | 519 | rt2x00dev->link.qual.tx_success += |
511 | rt2x00dev->link.qual.tx_failed += fail; | 520 | test_bit(TXDONE_SUCCESS, &txdesc->flags); |
521 | rt2x00dev->link.qual.tx_failed += | ||
522 | test_bit(TXDONE_FAILURE, &txdesc->flags); | ||
512 | 523 | ||
513 | /* | 524 | /* |
514 | * Initialize TX status | 525 | * Initialize TX status |
515 | */ | 526 | */ |
516 | tx_status.flags = 0; | 527 | memset(&tx_info->status, 0, sizeof(tx_info->status)); |
517 | tx_status.ack_signal = 0; | 528 | tx_info->status.ack_signal = 0; |
518 | tx_status.excessive_retries = (txdesc->status == TX_FAIL_RETRY); | 529 | tx_info->status.excessive_retries = |
519 | tx_status.retry_count = txdesc->retry; | 530 | test_bit(TXDONE_EXCESSIVE_RETRY, &txdesc->flags); |
520 | memcpy(&tx_status.control, txdesc->control, sizeof(*txdesc->control)); | 531 | tx_info->status.retry_count = txdesc->retry; |
521 | 532 | ||
522 | if (!(tx_status.control.flags & IEEE80211_TXCTL_NO_ACK)) { | 533 | if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) { |
523 | if (success) | 534 | if (test_bit(TXDONE_SUCCESS, &txdesc->flags)) |
524 | tx_status.flags |= IEEE80211_TX_STATUS_ACK; | 535 | tx_info->flags |= IEEE80211_TX_STAT_ACK; |
525 | else | 536 | else if (test_bit(TXDONE_FAILURE, &txdesc->flags)) |
526 | rt2x00dev->low_level_stats.dot11ACKFailureCount++; | 537 | rt2x00dev->low_level_stats.dot11ACKFailureCount++; |
527 | } | 538 | } |
528 | 539 | ||
529 | tx_status.queue_length = entry->queue->limit; | 540 | if (tx_info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) { |
530 | tx_status.queue_number = tx_status.control.queue; | 541 | if (test_bit(TXDONE_SUCCESS, &txdesc->flags)) |
531 | |||
532 | if (tx_status.control.flags & IEEE80211_TXCTL_USE_RTS_CTS) { | ||
533 | if (success) | ||
534 | rt2x00dev->low_level_stats.dot11RTSSuccessCount++; | 542 | rt2x00dev->low_level_stats.dot11RTSSuccessCount++; |
535 | else | 543 | else if (test_bit(TXDONE_FAILURE, &txdesc->flags)) |
536 | rt2x00dev->low_level_stats.dot11RTSFailureCount++; | 544 | rt2x00dev->low_level_stats.dot11RTSFailureCount++; |
537 | } | 545 | } |
538 | 546 | ||
539 | /* | 547 | /* |
540 | * Send the tx_status to debugfs. Only send the status report | 548 | * Only send the status report to mac80211 when TX status was |
541 | * to mac80211 when the frame originated from there. If this was | 549 | * requested by it. If this was a extra frame coming through |
542 | * a extra frame coming through a mac80211 library call (RTS/CTS) | 550 | * a mac80211 library call (RTS/CTS) then we should not send the |
543 | * then we should not send the status report back. | 551 | * status report back. |
544 | * If send to mac80211, mac80211 will clean up the skb structure, | ||
545 | * otherwise we have to do it ourself. | ||
546 | */ | 552 | */ |
547 | skbdesc = get_skb_frame_desc(entry->skb); | 553 | if (tx_info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) |
548 | skbdesc->frame_type = DUMP_FRAME_TXDONE; | 554 | ieee80211_tx_status_irqsafe(rt2x00dev->hw, entry->skb); |
549 | |||
550 | rt2x00debug_dump_frame(rt2x00dev, entry->skb); | ||
551 | |||
552 | if (!(skbdesc->flags & FRAME_DESC_DRIVER_GENERATED)) | ||
553 | ieee80211_tx_status_irqsafe(rt2x00dev->hw, | ||
554 | entry->skb, &tx_status); | ||
555 | else | 555 | else |
556 | dev_kfree_skb(entry->skb); | 556 | dev_kfree_skb_irq(entry->skb); |
557 | |||
558 | /* | ||
559 | * Make this entry available for reuse. | ||
560 | */ | ||
557 | entry->skb = NULL; | 561 | entry->skb = NULL; |
562 | entry->flags = 0; | ||
563 | |||
564 | rt2x00dev->ops->lib->init_txentry(rt2x00dev, entry); | ||
565 | |||
566 | __clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); | ||
567 | rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE); | ||
568 | |||
569 | /* | ||
570 | * If the data queue was below the threshold before the txdone | ||
571 | * handler we must make sure the packet queue in the mac80211 stack | ||
572 | * is reenabled when the txdone handler has finished. | ||
573 | */ | ||
574 | if (!rt2x00queue_threshold(entry->queue)) | ||
575 | ieee80211_wake_queue(rt2x00dev->hw, qid); | ||
558 | } | 576 | } |
559 | EXPORT_SYMBOL_GPL(rt2x00lib_txdone); | 577 | EXPORT_SYMBOL_GPL(rt2x00lib_txdone); |
560 | 578 | ||
561 | void rt2x00lib_rxdone(struct queue_entry *entry, | 579 | void rt2x00lib_rxdone(struct rt2x00_dev *rt2x00dev, |
562 | struct rxdone_entry_desc *rxdesc) | 580 | struct queue_entry *entry) |
563 | { | 581 | { |
564 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 582 | struct rxdone_entry_desc rxdesc; |
583 | struct sk_buff *skb; | ||
565 | struct ieee80211_rx_status *rx_status = &rt2x00dev->rx_status; | 584 | struct ieee80211_rx_status *rx_status = &rt2x00dev->rx_status; |
566 | struct ieee80211_supported_band *sband; | 585 | struct ieee80211_supported_band *sband; |
567 | struct ieee80211_hdr *hdr; | 586 | struct ieee80211_hdr *hdr; |
568 | const struct rt2x00_rate *rate; | 587 | const struct rt2x00_rate *rate; |
588 | unsigned int header_size; | ||
589 | unsigned int align; | ||
569 | unsigned int i; | 590 | unsigned int i; |
570 | int idx = -1; | 591 | int idx = -1; |
571 | u16 fc; | 592 | |
593 | /* | ||
594 | * Allocate a new sk_buffer. If no new buffer available, drop the | ||
595 | * received frame and reuse the existing buffer. | ||
596 | */ | ||
597 | skb = rt2x00queue_alloc_rxskb(rt2x00dev, entry); | ||
598 | if (!skb) | ||
599 | return; | ||
600 | |||
601 | /* | ||
602 | * Unmap the skb. | ||
603 | */ | ||
604 | rt2x00queue_unmap_skb(rt2x00dev, entry->skb); | ||
605 | |||
606 | /* | ||
607 | * Extract the RXD details. | ||
608 | */ | ||
609 | memset(&rxdesc, 0, sizeof(rxdesc)); | ||
610 | rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); | ||
611 | |||
612 | /* | ||
613 | * The data behind the ieee80211 header must be | ||
614 | * aligned on a 4 byte boundary. | ||
615 | */ | ||
616 | header_size = ieee80211_get_hdrlen_from_skb(entry->skb); | ||
617 | align = ((unsigned long)(entry->skb->data + header_size)) & 3; | ||
618 | |||
619 | if (align) { | ||
620 | skb_push(entry->skb, align); | ||
621 | /* Move entire frame in 1 command */ | ||
622 | memmove(entry->skb->data, entry->skb->data + align, | ||
623 | rxdesc.size); | ||
624 | } | ||
625 | |||
626 | /* Update data pointers, trim buffer to correct size */ | ||
627 | skb_trim(entry->skb, rxdesc.size); | ||
572 | 628 | ||
573 | /* | 629 | /* |
574 | * Update RX statistics. | 630 | * Update RX statistics. |
@@ -577,10 +633,10 @@ void rt2x00lib_rxdone(struct queue_entry *entry, | |||
577 | for (i = 0; i < sband->n_bitrates; i++) { | 633 | for (i = 0; i < sband->n_bitrates; i++) { |
578 | rate = rt2x00_get_rate(sband->bitrates[i].hw_value); | 634 | rate = rt2x00_get_rate(sband->bitrates[i].hw_value); |
579 | 635 | ||
580 | if (((rxdesc->dev_flags & RXDONE_SIGNAL_PLCP) && | 636 | if (((rxdesc.dev_flags & RXDONE_SIGNAL_PLCP) && |
581 | (rate->plcp == rxdesc->signal)) || | 637 | (rate->plcp == rxdesc.signal)) || |
582 | (!(rxdesc->dev_flags & RXDONE_SIGNAL_PLCP) && | 638 | (!(rxdesc.dev_flags & RXDONE_SIGNAL_PLCP) && |
583 | (rate->bitrate == rxdesc->signal))) { | 639 | (rate->bitrate == rxdesc.signal))) { |
584 | idx = i; | 640 | idx = i; |
585 | break; | 641 | break; |
586 | } | 642 | } |
@@ -588,8 +644,8 @@ void rt2x00lib_rxdone(struct queue_entry *entry, | |||
588 | 644 | ||
589 | if (idx < 0) { | 645 | if (idx < 0) { |
590 | WARNING(rt2x00dev, "Frame received with unrecognized signal," | 646 | WARNING(rt2x00dev, "Frame received with unrecognized signal," |
591 | "signal=0x%.2x, plcp=%d.\n", rxdesc->signal, | 647 | "signal=0x%.2x, plcp=%d.\n", rxdesc.signal, |
592 | !!(rxdesc->dev_flags & RXDONE_SIGNAL_PLCP)); | 648 | !!(rxdesc.dev_flags & RXDONE_SIGNAL_PLCP)); |
593 | idx = 0; | 649 | idx = 0; |
594 | } | 650 | } |
595 | 651 | ||
@@ -597,170 +653,38 @@ void rt2x00lib_rxdone(struct queue_entry *entry, | |||
597 | * Only update link status if this is a beacon frame carrying our bssid. | 653 | * Only update link status if this is a beacon frame carrying our bssid. |
598 | */ | 654 | */ |
599 | hdr = (struct ieee80211_hdr *)entry->skb->data; | 655 | hdr = (struct ieee80211_hdr *)entry->skb->data; |
600 | fc = le16_to_cpu(hdr->frame_control); | 656 | if (ieee80211_is_beacon(hdr->frame_control) && |
601 | if (is_beacon(fc) && (rxdesc->dev_flags & RXDONE_MY_BSS)) | 657 | (rxdesc.dev_flags & RXDONE_MY_BSS)) |
602 | rt2x00lib_update_link_stats(&rt2x00dev->link, rxdesc->rssi); | 658 | rt2x00lib_update_link_stats(&rt2x00dev->link, rxdesc.rssi); |
603 | 659 | ||
604 | rt2x00dev->link.qual.rx_success++; | 660 | rt2x00dev->link.qual.rx_success++; |
605 | 661 | ||
662 | rx_status->mactime = rxdesc.timestamp; | ||
606 | rx_status->rate_idx = idx; | 663 | rx_status->rate_idx = idx; |
607 | rx_status->signal = | 664 | rx_status->qual = |
608 | rt2x00lib_calculate_link_signal(rt2x00dev, rxdesc->rssi); | 665 | rt2x00lib_calculate_link_signal(rt2x00dev, rxdesc.rssi); |
609 | rx_status->ssi = rxdesc->rssi; | 666 | rx_status->signal = rxdesc.rssi; |
610 | rx_status->flag = rxdesc->flags; | 667 | rx_status->flag = rxdesc.flags; |
611 | rx_status->antenna = rt2x00dev->link.ant.active.rx; | 668 | rx_status->antenna = rt2x00dev->link.ant.active.rx; |
612 | 669 | ||
613 | /* | 670 | /* |
614 | * Send frame to mac80211 & debugfs. | 671 | * Send frame to mac80211 & debugfs. |
615 | * mac80211 will clean up the skb structure. | 672 | * mac80211 will clean up the skb structure. |
616 | */ | 673 | */ |
617 | get_skb_frame_desc(entry->skb)->frame_type = DUMP_FRAME_RXDONE; | 674 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_RXDONE, entry->skb); |
618 | rt2x00debug_dump_frame(rt2x00dev, entry->skb); | ||
619 | ieee80211_rx_irqsafe(rt2x00dev->hw, entry->skb, rx_status); | 675 | ieee80211_rx_irqsafe(rt2x00dev->hw, entry->skb, rx_status); |
620 | entry->skb = NULL; | ||
621 | } | ||
622 | EXPORT_SYMBOL_GPL(rt2x00lib_rxdone); | ||
623 | |||
624 | /* | ||
625 | * TX descriptor initializer | ||
626 | */ | ||
627 | void rt2x00lib_write_tx_desc(struct rt2x00_dev *rt2x00dev, | ||
628 | struct sk_buff *skb, | ||
629 | struct ieee80211_tx_control *control) | ||
630 | { | ||
631 | struct txentry_desc txdesc; | ||
632 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | ||
633 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skbdesc->data; | ||
634 | const struct rt2x00_rate *rate; | ||
635 | int tx_rate; | ||
636 | int length; | ||
637 | int duration; | ||
638 | int residual; | ||
639 | u16 frame_control; | ||
640 | u16 seq_ctrl; | ||
641 | |||
642 | memset(&txdesc, 0, sizeof(txdesc)); | ||
643 | |||
644 | txdesc.queue = skbdesc->entry->queue->qid; | ||
645 | txdesc.cw_min = skbdesc->entry->queue->cw_min; | ||
646 | txdesc.cw_max = skbdesc->entry->queue->cw_max; | ||
647 | txdesc.aifs = skbdesc->entry->queue->aifs; | ||
648 | |||
649 | /* | ||
650 | * Read required fields from ieee80211 header. | ||
651 | */ | ||
652 | frame_control = le16_to_cpu(hdr->frame_control); | ||
653 | seq_ctrl = le16_to_cpu(hdr->seq_ctrl); | ||
654 | |||
655 | tx_rate = control->tx_rate->hw_value; | ||
656 | 676 | ||
657 | /* | 677 | /* |
658 | * Check whether this frame is to be acked | 678 | * Replace the skb with the freshly allocated one. |
659 | */ | 679 | */ |
660 | if (!(control->flags & IEEE80211_TXCTL_NO_ACK)) | 680 | entry->skb = skb; |
661 | __set_bit(ENTRY_TXD_ACK, &txdesc.flags); | 681 | entry->flags = 0; |
662 | |||
663 | /* | ||
664 | * Check if this is a RTS/CTS frame | ||
665 | */ | ||
666 | if (is_rts_frame(frame_control) || is_cts_frame(frame_control)) { | ||
667 | __set_bit(ENTRY_TXD_BURST, &txdesc.flags); | ||
668 | if (is_rts_frame(frame_control)) { | ||
669 | __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc.flags); | ||
670 | __set_bit(ENTRY_TXD_ACK, &txdesc.flags); | ||
671 | } else | ||
672 | __clear_bit(ENTRY_TXD_ACK, &txdesc.flags); | ||
673 | if (control->rts_cts_rate) | ||
674 | tx_rate = control->rts_cts_rate->hw_value; | ||
675 | } | ||
676 | |||
677 | rate = rt2x00_get_rate(tx_rate); | ||
678 | |||
679 | /* | ||
680 | * Check if more fragments are pending | ||
681 | */ | ||
682 | if (ieee80211_get_morefrag(hdr)) { | ||
683 | __set_bit(ENTRY_TXD_BURST, &txdesc.flags); | ||
684 | __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc.flags); | ||
685 | } | ||
686 | |||
687 | /* | ||
688 | * Beacons and probe responses require the tsf timestamp | ||
689 | * to be inserted into the frame. | ||
690 | */ | ||
691 | if (control->queue == RT2X00_BCN_QUEUE_BEACON || | ||
692 | is_probe_resp(frame_control)) | ||
693 | __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc.flags); | ||
694 | |||
695 | /* | ||
696 | * Determine with what IFS priority this frame should be send. | ||
697 | * Set ifs to IFS_SIFS when the this is not the first fragment, | ||
698 | * or this fragment came after RTS/CTS. | ||
699 | */ | ||
700 | if ((seq_ctrl & IEEE80211_SCTL_FRAG) > 0 || | ||
701 | test_bit(ENTRY_TXD_RTS_FRAME, &txdesc.flags)) | ||
702 | txdesc.ifs = IFS_SIFS; | ||
703 | else | ||
704 | txdesc.ifs = IFS_BACKOFF; | ||
705 | |||
706 | /* | ||
707 | * PLCP setup | ||
708 | * Length calculation depends on OFDM/CCK rate. | ||
709 | */ | ||
710 | txdesc.signal = rate->plcp; | ||
711 | txdesc.service = 0x04; | ||
712 | |||
713 | length = skbdesc->data_len + FCS_LEN; | ||
714 | if (rate->flags & DEV_RATE_OFDM) { | ||
715 | __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc.flags); | ||
716 | |||
717 | txdesc.length_high = (length >> 6) & 0x3f; | ||
718 | txdesc.length_low = length & 0x3f; | ||
719 | } else { | ||
720 | /* | ||
721 | * Convert length to microseconds. | ||
722 | */ | ||
723 | residual = get_duration_res(length, rate->bitrate); | ||
724 | duration = get_duration(length, rate->bitrate); | ||
725 | |||
726 | if (residual != 0) { | ||
727 | duration++; | ||
728 | |||
729 | /* | ||
730 | * Check if we need to set the Length Extension | ||
731 | */ | ||
732 | if (rate->bitrate == 110 && residual <= 30) | ||
733 | txdesc.service |= 0x80; | ||
734 | } | ||
735 | |||
736 | txdesc.length_high = (duration >> 8) & 0xff; | ||
737 | txdesc.length_low = duration & 0xff; | ||
738 | |||
739 | /* | ||
740 | * When preamble is enabled we should set the | ||
741 | * preamble bit for the signal. | ||
742 | */ | ||
743 | if (rt2x00_get_rate_preamble(tx_rate)) | ||
744 | txdesc.signal |= 0x08; | ||
745 | } | ||
746 | |||
747 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, skb, &txdesc, control); | ||
748 | 682 | ||
749 | /* | 683 | rt2x00dev->ops->lib->init_rxentry(rt2x00dev, entry); |
750 | * Update queue entry. | ||
751 | */ | ||
752 | skbdesc->entry->skb = skb; | ||
753 | 684 | ||
754 | /* | 685 | rt2x00queue_index_inc(entry->queue, Q_INDEX); |
755 | * The frame has been completely initialized and ready | ||
756 | * for sending to the device. The caller will push the | ||
757 | * frame to the device, but we are going to push the | ||
758 | * frame to debugfs here. | ||
759 | */ | ||
760 | skbdesc->frame_type = DUMP_FRAME_TX; | ||
761 | rt2x00debug_dump_frame(rt2x00dev, skb); | ||
762 | } | 686 | } |
763 | EXPORT_SYMBOL_GPL(rt2x00lib_write_tx_desc); | 687 | EXPORT_SYMBOL_GPL(rt2x00lib_rxdone); |
764 | 688 | ||
765 | /* | 689 | /* |
766 | * Driver initialization handlers. | 690 | * Driver initialization handlers. |
@@ -978,6 +902,11 @@ static int rt2x00lib_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
978 | return status; | 902 | return status; |
979 | 903 | ||
980 | /* | 904 | /* |
905 | * Initialize HW fields. | ||
906 | */ | ||
907 | rt2x00dev->hw->queues = rt2x00dev->ops->tx_queues; | ||
908 | |||
909 | /* | ||
981 | * Register HW. | 910 | * Register HW. |
982 | */ | 911 | */ |
983 | status = ieee80211_register_hw(rt2x00dev->hw); | 912 | status = ieee80211_register_hw(rt2x00dev->hw); |
@@ -1131,10 +1060,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
1131 | /* | 1060 | /* |
1132 | * Initialize configuration work. | 1061 | * Initialize configuration work. |
1133 | */ | 1062 | */ |
1134 | rt2x00dev->workqueue = create_singlethread_workqueue("rt2x00lib"); | ||
1135 | if (!rt2x00dev->workqueue) | ||
1136 | goto exit; | ||
1137 | |||
1138 | INIT_WORK(&rt2x00dev->intf_work, rt2x00lib_intf_scheduled); | 1063 | INIT_WORK(&rt2x00dev->intf_work, rt2x00lib_intf_scheduled); |
1139 | INIT_WORK(&rt2x00dev->filter_work, rt2x00lib_packetfilter_scheduled); | 1064 | INIT_WORK(&rt2x00dev->filter_work, rt2x00lib_packetfilter_scheduled); |
1140 | INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00lib_link_tuner); | 1065 | INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00lib_link_tuner); |
@@ -1195,13 +1120,6 @@ void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev) | |||
1195 | rt2x00leds_unregister(rt2x00dev); | 1120 | rt2x00leds_unregister(rt2x00dev); |
1196 | 1121 | ||
1197 | /* | 1122 | /* |
1198 | * Stop all queued work. Note that most tasks will already be halted | ||
1199 | * during rt2x00lib_disable_radio() and rt2x00lib_uninitialize(). | ||
1200 | */ | ||
1201 | flush_workqueue(rt2x00dev->workqueue); | ||
1202 | destroy_workqueue(rt2x00dev->workqueue); | ||
1203 | |||
1204 | /* | ||
1205 | * Free ieee80211_hw memory. | 1123 | * Free ieee80211_hw memory. |
1206 | */ | 1124 | */ |
1207 | rt2x00lib_remove_hw(rt2x00dev); | 1125 | rt2x00lib_remove_hw(rt2x00dev); |
@@ -1246,7 +1164,6 @@ int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state) | |||
1246 | * Suspend/disable extra components. | 1164 | * Suspend/disable extra components. |
1247 | */ | 1165 | */ |
1248 | rt2x00leds_suspend(rt2x00dev); | 1166 | rt2x00leds_suspend(rt2x00dev); |
1249 | rt2x00rfkill_suspend(rt2x00dev); | ||
1250 | rt2x00debug_deregister(rt2x00dev); | 1167 | rt2x00debug_deregister(rt2x00dev); |
1251 | 1168 | ||
1252 | exit: | 1169 | exit: |
@@ -1302,7 +1219,6 @@ int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev) | |||
1302 | * Restore/enable extra components. | 1219 | * Restore/enable extra components. |
1303 | */ | 1220 | */ |
1304 | rt2x00debug_register(rt2x00dev); | 1221 | rt2x00debug_register(rt2x00dev); |
1305 | rt2x00rfkill_resume(rt2x00dev); | ||
1306 | rt2x00leds_resume(rt2x00dev); | 1222 | rt2x00leds_resume(rt2x00dev); |
1307 | 1223 | ||
1308 | /* | 1224 | /* |
@@ -1343,7 +1259,7 @@ int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev) | |||
1343 | * In that case we have disabled the TX queue and should | 1259 | * In that case we have disabled the TX queue and should |
1344 | * now enable it again | 1260 | * now enable it again |
1345 | */ | 1261 | */ |
1346 | ieee80211_start_queues(rt2x00dev->hw); | 1262 | ieee80211_wake_queues(rt2x00dev->hw); |
1347 | 1263 | ||
1348 | /* | 1264 | /* |
1349 | * During interface iteration we might have changed the | 1265 | * During interface iteration we might have changed the |
diff --git a/drivers/net/wireless/rt2x00/rt2x00firmware.c b/drivers/net/wireless/rt2x00/rt2x00firmware.c index b971bc6e7ee2..bab05a56e7a0 100644 --- a/drivers/net/wireless/rt2x00/rt2x00firmware.c +++ b/drivers/net/wireless/rt2x00/rt2x00firmware.c | |||
@@ -100,6 +100,14 @@ int rt2x00lib_load_firmware(struct rt2x00_dev *rt2x00dev) | |||
100 | retval = rt2x00dev->ops->lib->load_firmware(rt2x00dev, | 100 | retval = rt2x00dev->ops->lib->load_firmware(rt2x00dev, |
101 | rt2x00dev->fw->data, | 101 | rt2x00dev->fw->data, |
102 | rt2x00dev->fw->size); | 102 | rt2x00dev->fw->size); |
103 | |||
104 | /* | ||
105 | * When the firmware is uploaded to the hardware the LED | ||
106 | * association status might have been triggered, for correct | ||
107 | * LED handling it should now be reset. | ||
108 | */ | ||
109 | rt2x00leds_led_assoc(rt2x00dev, false); | ||
110 | |||
103 | return retval; | 111 | return retval; |
104 | } | 112 | } |
105 | 113 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h index 41ee02cd2825..f2c9b0e79b5f 100644 --- a/drivers/net/wireless/rt2x00/rt2x00lib.h +++ b/drivers/net/wireless/rt2x00/rt2x00lib.h | |||
@@ -26,12 +26,14 @@ | |||
26 | #ifndef RT2X00LIB_H | 26 | #ifndef RT2X00LIB_H |
27 | #define RT2X00LIB_H | 27 | #define RT2X00LIB_H |
28 | 28 | ||
29 | #include "rt2x00dump.h" | ||
30 | |||
29 | /* | 31 | /* |
30 | * Interval defines | 32 | * Interval defines |
31 | * Both the link tuner as the rfkill will be called once per second. | 33 | * Both the link tuner as the rfkill will be called once per second. |
32 | */ | 34 | */ |
33 | #define LINK_TUNE_INTERVAL ( round_jiffies_relative(HZ) ) | 35 | #define LINK_TUNE_INTERVAL ( round_jiffies_relative(HZ) ) |
34 | #define RFKILL_POLL_INTERVAL ( 1000 ) | 36 | #define RFKILL_POLL_INTERVAL ( round_jiffies_relative(HZ) ) |
35 | 37 | ||
36 | /* | 38 | /* |
37 | * rt2x00_rate: Per rate device information | 39 | * rt2x00_rate: Per rate device information |
@@ -96,9 +98,65 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev, | |||
96 | void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, | 98 | void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, |
97 | struct ieee80211_conf *conf, const int force_config); | 99 | struct ieee80211_conf *conf, const int force_config); |
98 | 100 | ||
99 | /* | 101 | /** |
100 | * Queue handlers. | 102 | * DOC: Queue handlers |
103 | */ | ||
104 | |||
105 | /** | ||
106 | * rt2x00queue_alloc_rxskb - allocate a skb for RX purposes. | ||
107 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
108 | * @queue: The queue for which the skb will be applicable. | ||
109 | */ | ||
110 | struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev, | ||
111 | struct queue_entry *entry); | ||
112 | |||
113 | /** | ||
114 | * rt2x00queue_unmap_skb - Unmap a skb from DMA. | ||
115 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
116 | * @skb: The skb to unmap. | ||
117 | */ | ||
118 | void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
119 | |||
120 | /** | ||
121 | * rt2x00queue_free_skb - free a skb | ||
122 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
123 | * @skb: The skb to free. | ||
124 | */ | ||
125 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
126 | |||
127 | /** | ||
128 | * rt2x00queue_free_skb - free a skb | ||
129 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
130 | * @skb: The skb to free. | ||
131 | */ | ||
132 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | ||
133 | |||
134 | /** | ||
135 | * rt2x00queue_write_tx_frame - Write TX frame to hardware | ||
136 | * @queue: Queue over which the frame should be send | ||
137 | * @skb: The skb to send | ||
138 | */ | ||
139 | int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb); | ||
140 | |||
141 | /** | ||
142 | * rt2x00queue_update_beacon - Send new beacon from mac80211 to hardware | ||
143 | * @rt2x00dev: Pointer to &struct rt2x00_dev. | ||
144 | * @vif: Interface for which the beacon should be updated. | ||
101 | */ | 145 | */ |
146 | int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev, | ||
147 | struct ieee80211_vif *vif); | ||
148 | |||
149 | /** | ||
150 | * rt2x00queue_index_inc - Index incrementation function | ||
151 | * @queue: Queue (&struct data_queue) to perform the action on. | ||
152 | * @index: Index type (&enum queue_index) to perform the action on. | ||
153 | * | ||
154 | * This function will increase the requested index on the queue, | ||
155 | * it will grab the appropriate locks and handle queue overflow events by | ||
156 | * resetting the index to the start of the queue. | ||
157 | */ | ||
158 | void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index); | ||
159 | |||
102 | void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev); | 160 | void rt2x00queue_init_rx(struct rt2x00_dev *rt2x00dev); |
103 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev); | 161 | void rt2x00queue_init_tx(struct rt2x00_dev *rt2x00dev); |
104 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev); | 162 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev); |
@@ -128,7 +186,8 @@ static inline void rt2x00lib_free_firmware(struct rt2x00_dev *rt2x00dev) | |||
128 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS | 186 | #ifdef CONFIG_RT2X00_LIB_DEBUGFS |
129 | void rt2x00debug_register(struct rt2x00_dev *rt2x00dev); | 187 | void rt2x00debug_register(struct rt2x00_dev *rt2x00dev); |
130 | void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev); | 188 | void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev); |
131 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb); | 189 | void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, |
190 | enum rt2x00_dump_type type, struct sk_buff *skb); | ||
132 | #else | 191 | #else |
133 | static inline void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) | 192 | static inline void rt2x00debug_register(struct rt2x00_dev *rt2x00dev) |
134 | { | 193 | { |
@@ -139,6 +198,7 @@ static inline void rt2x00debug_deregister(struct rt2x00_dev *rt2x00dev) | |||
139 | } | 198 | } |
140 | 199 | ||
141 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, | 200 | static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev, |
201 | enum rt2x00_dump_type type, | ||
142 | struct sk_buff *skb) | 202 | struct sk_buff *skb) |
143 | { | 203 | { |
144 | } | 204 | } |
@@ -152,8 +212,6 @@ void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev); | |||
152 | void rt2x00rfkill_unregister(struct rt2x00_dev *rt2x00dev); | 212 | void rt2x00rfkill_unregister(struct rt2x00_dev *rt2x00dev); |
153 | void rt2x00rfkill_allocate(struct rt2x00_dev *rt2x00dev); | 213 | void rt2x00rfkill_allocate(struct rt2x00_dev *rt2x00dev); |
154 | void rt2x00rfkill_free(struct rt2x00_dev *rt2x00dev); | 214 | void rt2x00rfkill_free(struct rt2x00_dev *rt2x00dev); |
155 | void rt2x00rfkill_suspend(struct rt2x00_dev *rt2x00dev); | ||
156 | void rt2x00rfkill_resume(struct rt2x00_dev *rt2x00dev); | ||
157 | #else | 215 | #else |
158 | static inline void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev) | 216 | static inline void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev) |
159 | { | 217 | { |
@@ -170,14 +228,6 @@ static inline void rt2x00rfkill_allocate(struct rt2x00_dev *rt2x00dev) | |||
170 | static inline void rt2x00rfkill_free(struct rt2x00_dev *rt2x00dev) | 228 | static inline void rt2x00rfkill_free(struct rt2x00_dev *rt2x00dev) |
171 | { | 229 | { |
172 | } | 230 | } |
173 | |||
174 | static inline void rt2x00rfkill_suspend(struct rt2x00_dev *rt2x00dev) | ||
175 | { | ||
176 | } | ||
177 | |||
178 | static inline void rt2x00rfkill_resume(struct rt2x00_dev *rt2x00dev) | ||
179 | { | ||
180 | } | ||
181 | #endif /* CONFIG_RT2X00_LIB_RFKILL */ | 231 | #endif /* CONFIG_RT2X00_LIB_RFKILL */ |
182 | 232 | ||
183 | /* | 233 | /* |
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c index 9cb023edd2e9..f1dcbaa80c3c 100644 --- a/drivers/net/wireless/rt2x00/rt2x00mac.c +++ b/drivers/net/wireless/rt2x00/rt2x00mac.c | |||
@@ -31,14 +31,14 @@ | |||
31 | 31 | ||
32 | static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | 32 | static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, |
33 | struct data_queue *queue, | 33 | struct data_queue *queue, |
34 | struct sk_buff *frag_skb, | 34 | struct sk_buff *frag_skb) |
35 | struct ieee80211_tx_control *control) | ||
36 | { | 35 | { |
37 | struct skb_frame_desc *skbdesc; | 36 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(frag_skb); |
37 | struct ieee80211_tx_info *rts_info; | ||
38 | struct sk_buff *skb; | 38 | struct sk_buff *skb; |
39 | int size; | 39 | int size; |
40 | 40 | ||
41 | if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) | 41 | if (tx_info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) |
42 | size = sizeof(struct ieee80211_cts); | 42 | size = sizeof(struct ieee80211_cts); |
43 | else | 43 | else |
44 | size = sizeof(struct ieee80211_rts); | 44 | size = sizeof(struct ieee80211_rts); |
@@ -52,23 +52,37 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | |||
52 | skb_reserve(skb, rt2x00dev->hw->extra_tx_headroom); | 52 | skb_reserve(skb, rt2x00dev->hw->extra_tx_headroom); |
53 | skb_put(skb, size); | 53 | skb_put(skb, size); |
54 | 54 | ||
55 | if (control->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) | 55 | /* |
56 | ieee80211_ctstoself_get(rt2x00dev->hw, control->vif, | 56 | * Copy TX information over from original frame to |
57 | frag_skb->data, frag_skb->len, control, | 57 | * RTS/CTS frame. Note that we set the no encryption flag |
58 | * since we don't want this frame to be encrypted. | ||
59 | * RTS frames should be acked, while CTS-to-self frames | ||
60 | * should not. The ready for TX flag is cleared to prevent | ||
61 | * it being automatically send when the descriptor is | ||
62 | * written to the hardware. | ||
63 | */ | ||
64 | memcpy(skb->cb, frag_skb->cb, sizeof(skb->cb)); | ||
65 | rts_info = IEEE80211_SKB_CB(skb); | ||
66 | rts_info->flags |= IEEE80211_TX_CTL_DO_NOT_ENCRYPT; | ||
67 | rts_info->flags &= ~IEEE80211_TX_CTL_USE_RTS_CTS; | ||
68 | rts_info->flags &= ~IEEE80211_TX_CTL_USE_CTS_PROTECT; | ||
69 | rts_info->flags &= ~IEEE80211_TX_CTL_REQ_TX_STATUS; | ||
70 | |||
71 | if (tx_info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) | ||
72 | rts_info->flags |= IEEE80211_TX_CTL_NO_ACK; | ||
73 | else | ||
74 | rts_info->flags &= ~IEEE80211_TX_CTL_NO_ACK; | ||
75 | |||
76 | if (tx_info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) | ||
77 | ieee80211_ctstoself_get(rt2x00dev->hw, tx_info->control.vif, | ||
78 | frag_skb->data, size, tx_info, | ||
58 | (struct ieee80211_cts *)(skb->data)); | 79 | (struct ieee80211_cts *)(skb->data)); |
59 | else | 80 | else |
60 | ieee80211_rts_get(rt2x00dev->hw, control->vif, | 81 | ieee80211_rts_get(rt2x00dev->hw, tx_info->control.vif, |
61 | frag_skb->data, frag_skb->len, control, | 82 | frag_skb->data, size, tx_info, |
62 | (struct ieee80211_rts *)(skb->data)); | 83 | (struct ieee80211_rts *)(skb->data)); |
63 | 84 | ||
64 | /* | 85 | if (rt2x00queue_write_tx_frame(queue, skb)) { |
65 | * Initialize skb descriptor | ||
66 | */ | ||
67 | skbdesc = get_skb_frame_desc(skb); | ||
68 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
69 | skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED; | ||
70 | |||
71 | if (rt2x00dev->ops->lib->write_tx_data(rt2x00dev, queue, skb, control)) { | ||
72 | WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); | 86 | WARNING(rt2x00dev, "Failed to send RTS/CTS frame.\n"); |
73 | return NETDEV_TX_BUSY; | 87 | return NETDEV_TX_BUSY; |
74 | } | 88 | } |
@@ -76,13 +90,14 @@ static int rt2x00mac_tx_rts_cts(struct rt2x00_dev *rt2x00dev, | |||
76 | return NETDEV_TX_OK; | 90 | return NETDEV_TX_OK; |
77 | } | 91 | } |
78 | 92 | ||
79 | int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, | 93 | int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) |
80 | struct ieee80211_tx_control *control) | ||
81 | { | 94 | { |
82 | struct rt2x00_dev *rt2x00dev = hw->priv; | 95 | struct rt2x00_dev *rt2x00dev = hw->priv; |
96 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | ||
83 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; | 97 | struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data; |
98 | enum data_queue_qid qid = skb_get_queue_mapping(skb); | ||
99 | struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif); | ||
84 | struct data_queue *queue; | 100 | struct data_queue *queue; |
85 | struct skb_frame_desc *skbdesc; | ||
86 | u16 frame_control; | 101 | u16 frame_control; |
87 | 102 | ||
88 | /* | 103 | /* |
@@ -100,57 +115,62 @@ int rt2x00mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb, | |||
100 | /* | 115 | /* |
101 | * Determine which queue to put packet on. | 116 | * Determine which queue to put packet on. |
102 | */ | 117 | */ |
103 | if (control->flags & IEEE80211_TXCTL_SEND_AFTER_DTIM && | 118 | if (tx_info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM && |
104 | test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) | 119 | test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) |
105 | queue = rt2x00queue_get_queue(rt2x00dev, RT2X00_BCN_QUEUE_ATIM); | 120 | queue = rt2x00queue_get_queue(rt2x00dev, QID_ATIM); |
106 | else | 121 | else |
107 | queue = rt2x00queue_get_queue(rt2x00dev, control->queue); | 122 | queue = rt2x00queue_get_queue(rt2x00dev, qid); |
108 | if (unlikely(!queue)) { | 123 | if (unlikely(!queue)) { |
109 | ERROR(rt2x00dev, | 124 | ERROR(rt2x00dev, |
110 | "Attempt to send packet over invalid queue %d.\n" | 125 | "Attempt to send packet over invalid queue %d.\n" |
111 | "Please file bug report to %s.\n", | 126 | "Please file bug report to %s.\n", qid, DRV_PROJECT); |
112 | control->queue, DRV_PROJECT); | ||
113 | dev_kfree_skb_any(skb); | 127 | dev_kfree_skb_any(skb); |
114 | return NETDEV_TX_OK; | 128 | return NETDEV_TX_OK; |
115 | } | 129 | } |
116 | 130 | ||
117 | /* | 131 | /* |
118 | * If CTS/RTS is required. and this frame is not CTS or RTS, | 132 | * If CTS/RTS is required. create and queue that frame first. |
119 | * create and queue that frame first. But make sure we have | 133 | * Make sure we have at least enough entries available to send |
120 | * at least enough entries available to send this CTS/RTS | 134 | * this CTS/RTS frame as well as the data frame. |
121 | * frame as well as the data frame. | 135 | * Note that when the driver has set the set_rts_threshold() |
136 | * callback function it doesn't need software generation of | ||
137 | * either RTS or CTS-to-self frame and handles everything | ||
138 | * inside the hardware. | ||
122 | */ | 139 | */ |
123 | frame_control = le16_to_cpu(ieee80211hdr->frame_control); | 140 | frame_control = le16_to_cpu(ieee80211hdr->frame_control); |
124 | if (!is_rts_frame(frame_control) && !is_cts_frame(frame_control) && | 141 | if ((tx_info->flags & (IEEE80211_TX_CTL_USE_RTS_CTS | |
125 | (control->flags & (IEEE80211_TXCTL_USE_RTS_CTS | | 142 | IEEE80211_TX_CTL_USE_CTS_PROTECT)) && |
126 | IEEE80211_TXCTL_USE_CTS_PROTECT))) { | 143 | !rt2x00dev->ops->hw->set_rts_threshold) { |
127 | if (rt2x00queue_available(queue) <= 1) { | 144 | if (rt2x00queue_available(queue) <= 1) { |
128 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 145 | ieee80211_stop_queue(rt2x00dev->hw, qid); |
129 | return NETDEV_TX_BUSY; | 146 | return NETDEV_TX_BUSY; |
130 | } | 147 | } |
131 | 148 | ||
132 | if (rt2x00mac_tx_rts_cts(rt2x00dev, queue, skb, control)) { | 149 | if (rt2x00mac_tx_rts_cts(rt2x00dev, queue, skb)) { |
133 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 150 | ieee80211_stop_queue(rt2x00dev->hw, qid); |
134 | return NETDEV_TX_BUSY; | 151 | return NETDEV_TX_BUSY; |
135 | } | 152 | } |
136 | } | 153 | } |
137 | 154 | ||
138 | /* | 155 | /* |
139 | * Initialize skb descriptor | 156 | * XXX: This is as wrong as the old mac80211 code was, |
157 | * due to beacons not getting sequence numbers assigned | ||
158 | * properly. | ||
140 | */ | 159 | */ |
141 | skbdesc = get_skb_frame_desc(skb); | 160 | if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { |
142 | memset(skbdesc, 0, sizeof(*skbdesc)); | 161 | if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) |
162 | intf->seqno += 0x10; | ||
163 | ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
164 | ieee80211hdr->seq_ctrl |= cpu_to_le16(intf->seqno); | ||
165 | } | ||
143 | 166 | ||
144 | if (rt2x00dev->ops->lib->write_tx_data(rt2x00dev, queue, skb, control)) { | 167 | if (rt2x00queue_write_tx_frame(queue, skb)) { |
145 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 168 | ieee80211_stop_queue(rt2x00dev->hw, qid); |
146 | return NETDEV_TX_BUSY; | 169 | return NETDEV_TX_BUSY; |
147 | } | 170 | } |
148 | 171 | ||
149 | if (rt2x00queue_full(queue)) | 172 | if (rt2x00queue_threshold(queue)) |
150 | ieee80211_stop_queue(rt2x00dev->hw, control->queue); | 173 | ieee80211_stop_queue(rt2x00dev->hw, qid); |
151 | |||
152 | if (rt2x00dev->ops->lib->kick_tx_queue) | ||
153 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, control->queue); | ||
154 | 174 | ||
155 | return NETDEV_TX_OK; | 175 | return NETDEV_TX_OK; |
156 | } | 176 | } |
@@ -183,8 +203,7 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |||
183 | { | 203 | { |
184 | struct rt2x00_dev *rt2x00dev = hw->priv; | 204 | struct rt2x00_dev *rt2x00dev = hw->priv; |
185 | struct rt2x00_intf *intf = vif_to_intf(conf->vif); | 205 | struct rt2x00_intf *intf = vif_to_intf(conf->vif); |
186 | struct data_queue *queue = | 206 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, QID_BEACON); |
187 | rt2x00queue_get_queue(rt2x00dev, RT2X00_BCN_QUEUE_BEACON); | ||
188 | struct queue_entry *entry = NULL; | 207 | struct queue_entry *entry = NULL; |
189 | unsigned int i; | 208 | unsigned int i; |
190 | 209 | ||
@@ -197,13 +216,12 @@ int rt2x00mac_add_interface(struct ieee80211_hw *hw, | |||
197 | return -ENODEV; | 216 | return -ENODEV; |
198 | 217 | ||
199 | /* | 218 | /* |
200 | * When we don't support mixed interfaces (a combination | 219 | * We don't support mixed combinations of sta and ap virtual |
201 | * of sta and ap virtual interfaces) then we can only | 220 | * interfaces. We can only add this interface when the rival |
202 | * add this interface when the rival interface count is 0. | 221 | * interface count is 0. |
203 | */ | 222 | */ |
204 | if (!test_bit(DRIVER_SUPPORT_MIXED_INTERFACES, &rt2x00dev->flags) && | 223 | if ((conf->type == IEEE80211_IF_TYPE_AP && rt2x00dev->intf_sta_count) || |
205 | ((conf->type == IEEE80211_IF_TYPE_AP && rt2x00dev->intf_sta_count) || | 224 | (conf->type != IEEE80211_IF_TYPE_AP && rt2x00dev->intf_ap_count)) |
206 | (conf->type != IEEE80211_IF_TYPE_AP && rt2x00dev->intf_ap_count))) | ||
207 | return -ENOBUFS; | 225 | return -ENOBUFS; |
208 | 226 | ||
209 | /* | 227 | /* |
@@ -343,7 +361,8 @@ int rt2x00mac_config_interface(struct ieee80211_hw *hw, | |||
343 | { | 361 | { |
344 | struct rt2x00_dev *rt2x00dev = hw->priv; | 362 | struct rt2x00_dev *rt2x00dev = hw->priv; |
345 | struct rt2x00_intf *intf = vif_to_intf(vif); | 363 | struct rt2x00_intf *intf = vif_to_intf(vif); |
346 | int status; | 364 | int update_bssid = 0; |
365 | int status = 0; | ||
347 | 366 | ||
348 | /* | 367 | /* |
349 | * Mac80211 might be calling this function while we are trying | 368 | * Mac80211 might be calling this function while we are trying |
@@ -355,12 +374,13 @@ int rt2x00mac_config_interface(struct ieee80211_hw *hw, | |||
355 | spin_lock(&intf->lock); | 374 | spin_lock(&intf->lock); |
356 | 375 | ||
357 | /* | 376 | /* |
358 | * If the interface does not work in master mode, | 377 | * conf->bssid can be NULL if coming from the internal |
359 | * then the bssid value in the interface structure | 378 | * beacon update routine. |
360 | * should now be set. | ||
361 | */ | 379 | */ |
362 | if (conf->type != IEEE80211_IF_TYPE_AP) | 380 | if (conf->changed & IEEE80211_IFCC_BSSID && conf->bssid) { |
381 | update_bssid = 1; | ||
363 | memcpy(&intf->bssid, conf->bssid, ETH_ALEN); | 382 | memcpy(&intf->bssid, conf->bssid, ETH_ALEN); |
383 | } | ||
364 | 384 | ||
365 | spin_unlock(&intf->lock); | 385 | spin_unlock(&intf->lock); |
366 | 386 | ||
@@ -370,19 +390,14 @@ int rt2x00mac_config_interface(struct ieee80211_hw *hw, | |||
370 | * values as arguments we make keep access to rt2x00_intf thread safe | 390 | * values as arguments we make keep access to rt2x00_intf thread safe |
371 | * even without the lock. | 391 | * even without the lock. |
372 | */ | 392 | */ |
373 | rt2x00lib_config_intf(rt2x00dev, intf, conf->type, NULL, conf->bssid); | 393 | rt2x00lib_config_intf(rt2x00dev, intf, vif->type, NULL, |
394 | update_bssid ? conf->bssid : NULL); | ||
374 | 395 | ||
375 | /* | 396 | /* |
376 | * We only need to initialize the beacon when master mode is enabled. | 397 | * Update the beacon. |
377 | */ | 398 | */ |
378 | if (conf->type != IEEE80211_IF_TYPE_AP || !conf->beacon) | 399 | if (conf->changed & IEEE80211_IFCC_BEACON) |
379 | return 0; | 400 | status = rt2x00queue_update_beacon(rt2x00dev, vif); |
380 | |||
381 | status = rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, | ||
382 | conf->beacon, | ||
383 | conf->beacon_control); | ||
384 | if (status) | ||
385 | dev_kfree_skb(conf->beacon); | ||
386 | 401 | ||
387 | return status; | 402 | return status; |
388 | } | 403 | } |
@@ -428,7 +443,7 @@ void rt2x00mac_configure_filter(struct ieee80211_hw *hw, | |||
428 | if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags)) | 443 | if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags)) |
429 | rt2x00dev->ops->lib->config_filter(rt2x00dev, *total_flags); | 444 | rt2x00dev->ops->lib->config_filter(rt2x00dev, *total_flags); |
430 | else | 445 | else |
431 | queue_work(rt2x00dev->workqueue, &rt2x00dev->filter_work); | 446 | queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work); |
432 | } | 447 | } |
433 | EXPORT_SYMBOL_GPL(rt2x00mac_configure_filter); | 448 | EXPORT_SYMBOL_GPL(rt2x00mac_configure_filter); |
434 | 449 | ||
@@ -454,10 +469,10 @@ int rt2x00mac_get_tx_stats(struct ieee80211_hw *hw, | |||
454 | struct rt2x00_dev *rt2x00dev = hw->priv; | 469 | struct rt2x00_dev *rt2x00dev = hw->priv; |
455 | unsigned int i; | 470 | unsigned int i; |
456 | 471 | ||
457 | for (i = 0; i < hw->queues; i++) { | 472 | for (i = 0; i < rt2x00dev->ops->tx_queues; i++) { |
458 | stats->data[i].len = rt2x00dev->tx[i].length; | 473 | stats[i].len = rt2x00dev->tx[i].length; |
459 | stats->data[i].limit = rt2x00dev->tx[i].limit; | 474 | stats[i].limit = rt2x00dev->tx[i].limit; |
460 | stats->data[i].count = rt2x00dev->tx[i].count; | 475 | stats[i].count = rt2x00dev->tx[i].count; |
461 | } | 476 | } |
462 | 477 | ||
463 | return 0; | 478 | return 0; |
@@ -498,7 +513,7 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, | |||
498 | * When the erp information has changed, we should perform | 513 | * When the erp information has changed, we should perform |
499 | * additional configuration steps. For all other changes we are done. | 514 | * additional configuration steps. For all other changes we are done. |
500 | */ | 515 | */ |
501 | if (changes & BSS_CHANGED_ERP_PREAMBLE) { | 516 | if (changes & (BSS_CHANGED_ERP_PREAMBLE | BSS_CHANGED_ERP_CTS_PROT)) { |
502 | if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags)) | 517 | if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags)) |
503 | rt2x00lib_config_erp(rt2x00dev, intf, bss_conf); | 518 | rt2x00lib_config_erp(rt2x00dev, intf, bss_conf); |
504 | else | 519 | else |
@@ -509,13 +524,13 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, | |||
509 | memcpy(&intf->conf, bss_conf, sizeof(*bss_conf)); | 524 | memcpy(&intf->conf, bss_conf, sizeof(*bss_conf)); |
510 | if (delayed) { | 525 | if (delayed) { |
511 | intf->delayed_flags |= delayed; | 526 | intf->delayed_flags |= delayed; |
512 | queue_work(rt2x00dev->workqueue, &rt2x00dev->intf_work); | 527 | schedule_work(&rt2x00dev->intf_work); |
513 | } | 528 | } |
514 | spin_unlock(&intf->lock); | 529 | spin_unlock(&intf->lock); |
515 | } | 530 | } |
516 | EXPORT_SYMBOL_GPL(rt2x00mac_bss_info_changed); | 531 | EXPORT_SYMBOL_GPL(rt2x00mac_bss_info_changed); |
517 | 532 | ||
518 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue_idx, | 533 | int rt2x00mac_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, |
519 | const struct ieee80211_tx_queue_params *params) | 534 | const struct ieee80211_tx_queue_params *params) |
520 | { | 535 | { |
521 | struct rt2x00_dev *rt2x00dev = hw->priv; | 536 | struct rt2x00_dev *rt2x00dev = hw->priv; |
@@ -539,10 +554,7 @@ int rt2x00mac_conf_tx(struct ieee80211_hw *hw, int queue_idx, | |||
539 | else | 554 | else |
540 | queue->cw_max = 10; /* cw_min: 2^10 = 1024. */ | 555 | queue->cw_max = 10; /* cw_min: 2^10 = 1024. */ |
541 | 556 | ||
542 | if (params->aifs >= 0) | 557 | queue->aifs = params->aifs; |
543 | queue->aifs = params->aifs; | ||
544 | else | ||
545 | queue->aifs = 2; | ||
546 | 558 | ||
547 | INFO(rt2x00dev, | 559 | INFO(rt2x00dev, |
548 | "Configured TX queue %d - CWmin: %d, CWmax: %d, Aifs: %d.\n", | 560 | "Configured TX queue %d - CWmin: %d, CWmax: %d, Aifs: %d.\n", |
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.c b/drivers/net/wireless/rt2x00/rt2x00pci.c index 60893de3bf8f..adf2876ed8ab 100644 --- a/drivers/net/wireless/rt2x00/rt2x00pci.c +++ b/drivers/net/wireless/rt2x00/rt2x00pci.c | |||
@@ -34,44 +34,34 @@ | |||
34 | /* | 34 | /* |
35 | * TX data handlers. | 35 | * TX data handlers. |
36 | */ | 36 | */ |
37 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, | 37 | int rt2x00pci_write_tx_data(struct queue_entry *entry) |
38 | struct data_queue *queue, struct sk_buff *skb, | ||
39 | struct ieee80211_tx_control *control) | ||
40 | { | 38 | { |
41 | struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); | 39 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
42 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; | ||
43 | struct skb_frame_desc *skbdesc; | 40 | struct skb_frame_desc *skbdesc; |
44 | u32 word; | 41 | u32 word; |
45 | 42 | ||
46 | if (rt2x00queue_full(queue)) | 43 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
47 | return -EINVAL; | ||
48 | |||
49 | rt2x00_desc_read(priv_tx->desc, 0, &word); | ||
50 | 44 | ||
51 | if (rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) || | 45 | /* |
52 | rt2x00_get_field32(word, TXD_ENTRY_VALID)) { | 46 | * This should not happen, we already checked the entry |
53 | ERROR(rt2x00dev, | 47 | * was ours. When the hardware disagrees there has been |
54 | "Arrived at non-free entry in the non-full queue %d.\n" | 48 | * a queue corruption! |
49 | */ | ||
50 | if (unlikely(rt2x00_get_field32(word, TXD_ENTRY_OWNER_NIC) || | ||
51 | rt2x00_get_field32(word, TXD_ENTRY_VALID))) { | ||
52 | ERROR(entry->queue->rt2x00dev, | ||
53 | "Corrupt queue %d, accessing entry which is not ours.\n" | ||
55 | "Please file bug report to %s.\n", | 54 | "Please file bug report to %s.\n", |
56 | control->queue, DRV_PROJECT); | 55 | entry->queue->qid, DRV_PROJECT); |
57 | return -EINVAL; | 56 | return -EINVAL; |
58 | } | 57 | } |
59 | 58 | ||
60 | /* | 59 | /* |
61 | * Fill in skb descriptor | 60 | * Fill in skb descriptor |
62 | */ | 61 | */ |
63 | skbdesc = get_skb_frame_desc(skb); | 62 | skbdesc = get_skb_frame_desc(entry->skb); |
64 | skbdesc->data = skb->data; | 63 | skbdesc->desc = entry_priv->desc; |
65 | skbdesc->data_len = skb->len; | 64 | skbdesc->desc_len = entry->queue->desc_size; |
66 | skbdesc->desc = priv_tx->desc; | ||
67 | skbdesc->desc_len = queue->desc_size; | ||
68 | skbdesc->entry = entry; | ||
69 | |||
70 | memcpy(&priv_tx->control, control, sizeof(priv_tx->control)); | ||
71 | memcpy(priv_tx->data, skb->data, skb->len); | ||
72 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
73 | |||
74 | rt2x00queue_index_inc(queue, Q_INDEX); | ||
75 | 65 | ||
76 | return 0; | 66 | return 0; |
77 | } | 67 | } |
@@ -84,180 +74,62 @@ void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev) | |||
84 | { | 74 | { |
85 | struct data_queue *queue = rt2x00dev->rx; | 75 | struct data_queue *queue = rt2x00dev->rx; |
86 | struct queue_entry *entry; | 76 | struct queue_entry *entry; |
87 | struct queue_entry_priv_pci_rx *priv_rx; | 77 | struct queue_entry_priv_pci *entry_priv; |
88 | struct ieee80211_hdr *hdr; | ||
89 | struct skb_frame_desc *skbdesc; | 78 | struct skb_frame_desc *skbdesc; |
90 | struct rxdone_entry_desc rxdesc; | ||
91 | int header_size; | ||
92 | int align; | ||
93 | u32 word; | 79 | u32 word; |
94 | 80 | ||
95 | while (1) { | 81 | while (1) { |
96 | entry = rt2x00queue_get_entry(queue, Q_INDEX); | 82 | entry = rt2x00queue_get_entry(queue, Q_INDEX); |
97 | priv_rx = entry->priv_data; | 83 | entry_priv = entry->priv_data; |
98 | rt2x00_desc_read(priv_rx->desc, 0, &word); | 84 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
99 | 85 | ||
100 | if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC)) | 86 | if (rt2x00_get_field32(word, RXD_ENTRY_OWNER_NIC)) |
101 | break; | 87 | break; |
102 | 88 | ||
103 | memset(&rxdesc, 0, sizeof(rxdesc)); | ||
104 | rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); | ||
105 | |||
106 | hdr = (struct ieee80211_hdr *)priv_rx->data; | ||
107 | header_size = | ||
108 | ieee80211_get_hdrlen(le16_to_cpu(hdr->frame_control)); | ||
109 | |||
110 | /* | 89 | /* |
111 | * The data behind the ieee80211 header must be | 90 | * Fill in desc fields of the skb descriptor |
112 | * aligned on a 4 byte boundary. | ||
113 | */ | ||
114 | align = header_size % 4; | ||
115 | |||
116 | /* | ||
117 | * Allocate the sk_buffer, initialize it and copy | ||
118 | * all data into it. | ||
119 | */ | ||
120 | entry->skb = dev_alloc_skb(rxdesc.size + align); | ||
121 | if (!entry->skb) | ||
122 | return; | ||
123 | |||
124 | skb_reserve(entry->skb, align); | ||
125 | memcpy(skb_put(entry->skb, rxdesc.size), | ||
126 | priv_rx->data, rxdesc.size); | ||
127 | |||
128 | /* | ||
129 | * Fill in skb descriptor | ||
130 | */ | 91 | */ |
131 | skbdesc = get_skb_frame_desc(entry->skb); | 92 | skbdesc = get_skb_frame_desc(entry->skb); |
132 | memset(skbdesc, 0, sizeof(*skbdesc)); | 93 | skbdesc->desc = entry_priv->desc; |
133 | skbdesc->data = entry->skb->data; | 94 | skbdesc->desc_len = entry->queue->desc_size; |
134 | skbdesc->data_len = entry->skb->len; | ||
135 | skbdesc->desc = priv_rx->desc; | ||
136 | skbdesc->desc_len = queue->desc_size; | ||
137 | skbdesc->entry = entry; | ||
138 | 95 | ||
139 | /* | 96 | /* |
140 | * Send the frame to rt2x00lib for further processing. | 97 | * Send the frame to rt2x00lib for further processing. |
141 | */ | 98 | */ |
142 | rt2x00lib_rxdone(entry, &rxdesc); | 99 | rt2x00lib_rxdone(rt2x00dev, entry); |
143 | |||
144 | if (test_bit(DEVICE_ENABLED_RADIO, &queue->rt2x00dev->flags)) { | ||
145 | rt2x00_set_field32(&word, RXD_ENTRY_OWNER_NIC, 1); | ||
146 | rt2x00_desc_write(priv_rx->desc, 0, word); | ||
147 | } | ||
148 | |||
149 | rt2x00queue_index_inc(queue, Q_INDEX); | ||
150 | } | 100 | } |
151 | } | 101 | } |
152 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); | 102 | EXPORT_SYMBOL_GPL(rt2x00pci_rxdone); |
153 | 103 | ||
154 | void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry, | ||
155 | struct txdone_entry_desc *txdesc) | ||
156 | { | ||
157 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; | ||
158 | u32 word; | ||
159 | |||
160 | txdesc->control = &priv_tx->control; | ||
161 | rt2x00lib_txdone(entry, txdesc); | ||
162 | |||
163 | /* | ||
164 | * Make this entry available for reuse. | ||
165 | */ | ||
166 | entry->flags = 0; | ||
167 | |||
168 | rt2x00_desc_read(priv_tx->desc, 0, &word); | ||
169 | rt2x00_set_field32(&word, TXD_ENTRY_OWNER_NIC, 0); | ||
170 | rt2x00_set_field32(&word, TXD_ENTRY_VALID, 0); | ||
171 | rt2x00_desc_write(priv_tx->desc, 0, word); | ||
172 | |||
173 | rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE); | ||
174 | |||
175 | /* | ||
176 | * If the data queue was full before the txdone handler | ||
177 | * we must make sure the packet queue in the mac80211 stack | ||
178 | * is reenabled when the txdone handler has finished. | ||
179 | */ | ||
180 | if (!rt2x00queue_full(entry->queue)) | ||
181 | ieee80211_wake_queue(rt2x00dev->hw, priv_tx->control.queue); | ||
182 | |||
183 | } | ||
184 | EXPORT_SYMBOL_GPL(rt2x00pci_txdone); | ||
185 | |||
186 | /* | 104 | /* |
187 | * Device initialization handlers. | 105 | * Device initialization handlers. |
188 | */ | 106 | */ |
189 | #define desc_size(__queue) \ | ||
190 | ({ \ | ||
191 | ((__queue)->limit * (__queue)->desc_size);\ | ||
192 | }) | ||
193 | |||
194 | #define data_size(__queue) \ | ||
195 | ({ \ | ||
196 | ((__queue)->limit * (__queue)->data_size);\ | ||
197 | }) | ||
198 | |||
199 | #define dma_size(__queue) \ | ||
200 | ({ \ | ||
201 | data_size(__queue) + desc_size(__queue);\ | ||
202 | }) | ||
203 | |||
204 | #define desc_offset(__queue, __base, __i) \ | ||
205 | ({ \ | ||
206 | (__base) + data_size(__queue) + \ | ||
207 | ((__i) * (__queue)->desc_size); \ | ||
208 | }) | ||
209 | |||
210 | #define data_offset(__queue, __base, __i) \ | ||
211 | ({ \ | ||
212 | (__base) + \ | ||
213 | ((__i) * (__queue)->data_size); \ | ||
214 | }) | ||
215 | |||
216 | static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev, | 107 | static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev, |
217 | struct data_queue *queue) | 108 | struct data_queue *queue) |
218 | { | 109 | { |
219 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); | 110 | struct queue_entry_priv_pci *entry_priv; |
220 | struct queue_entry_priv_pci_rx *priv_rx; | ||
221 | struct queue_entry_priv_pci_tx *priv_tx; | ||
222 | void *addr; | 111 | void *addr; |
223 | dma_addr_t dma; | 112 | dma_addr_t dma; |
224 | void *desc_addr; | ||
225 | dma_addr_t desc_dma; | ||
226 | void *data_addr; | ||
227 | dma_addr_t data_dma; | ||
228 | unsigned int i; | 113 | unsigned int i; |
229 | 114 | ||
230 | /* | 115 | /* |
231 | * Allocate DMA memory for descriptor and buffer. | 116 | * Allocate DMA memory for descriptor and buffer. |
232 | */ | 117 | */ |
233 | addr = pci_alloc_consistent(pci_dev, dma_size(queue), &dma); | 118 | addr = dma_alloc_coherent(rt2x00dev->dev, |
119 | queue->limit * queue->desc_size, | ||
120 | &dma, GFP_KERNEL | GFP_DMA); | ||
234 | if (!addr) | 121 | if (!addr) |
235 | return -ENOMEM; | 122 | return -ENOMEM; |
236 | 123 | ||
237 | memset(addr, 0, dma_size(queue)); | 124 | memset(addr, 0, queue->limit * queue->desc_size); |
238 | 125 | ||
239 | /* | 126 | /* |
240 | * Initialize all queue entries to contain valid addresses. | 127 | * Initialize all queue entries to contain valid addresses. |
241 | */ | 128 | */ |
242 | for (i = 0; i < queue->limit; i++) { | 129 | for (i = 0; i < queue->limit; i++) { |
243 | desc_addr = desc_offset(queue, addr, i); | 130 | entry_priv = queue->entries[i].priv_data; |
244 | desc_dma = desc_offset(queue, dma, i); | 131 | entry_priv->desc = addr + i * queue->desc_size; |
245 | data_addr = data_offset(queue, addr, i); | 132 | entry_priv->desc_dma = dma + i * queue->desc_size; |
246 | data_dma = data_offset(queue, dma, i); | ||
247 | |||
248 | if (queue->qid == QID_RX) { | ||
249 | priv_rx = queue->entries[i].priv_data; | ||
250 | priv_rx->desc = desc_addr; | ||
251 | priv_rx->desc_dma = desc_dma; | ||
252 | priv_rx->data = data_addr; | ||
253 | priv_rx->data_dma = data_dma; | ||
254 | } else { | ||
255 | priv_tx = queue->entries[i].priv_data; | ||
256 | priv_tx->desc = desc_addr; | ||
257 | priv_tx->desc_dma = desc_dma; | ||
258 | priv_tx->data = data_addr; | ||
259 | priv_tx->data_dma = data_dma; | ||
260 | } | ||
261 | } | 133 | } |
262 | 134 | ||
263 | return 0; | 135 | return 0; |
@@ -266,34 +138,19 @@ static int rt2x00pci_alloc_queue_dma(struct rt2x00_dev *rt2x00dev, | |||
266 | static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev, | 138 | static void rt2x00pci_free_queue_dma(struct rt2x00_dev *rt2x00dev, |
267 | struct data_queue *queue) | 139 | struct data_queue *queue) |
268 | { | 140 | { |
269 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); | 141 | struct queue_entry_priv_pci *entry_priv = |
270 | struct queue_entry_priv_pci_rx *priv_rx; | 142 | queue->entries[0].priv_data; |
271 | struct queue_entry_priv_pci_tx *priv_tx; | 143 | |
272 | void *data_addr; | 144 | if (entry_priv->desc) |
273 | dma_addr_t data_dma; | 145 | dma_free_coherent(rt2x00dev->dev, |
274 | 146 | queue->limit * queue->desc_size, | |
275 | if (queue->qid == QID_RX) { | 147 | entry_priv->desc, entry_priv->desc_dma); |
276 | priv_rx = queue->entries[0].priv_data; | 148 | entry_priv->desc = NULL; |
277 | data_addr = priv_rx->data; | ||
278 | data_dma = priv_rx->data_dma; | ||
279 | |||
280 | priv_rx->data = NULL; | ||
281 | } else { | ||
282 | priv_tx = queue->entries[0].priv_data; | ||
283 | data_addr = priv_tx->data; | ||
284 | data_dma = priv_tx->data_dma; | ||
285 | |||
286 | priv_tx->data = NULL; | ||
287 | } | ||
288 | |||
289 | if (data_addr) | ||
290 | pci_free_consistent(pci_dev, dma_size(queue), | ||
291 | data_addr, data_dma); | ||
292 | } | 149 | } |
293 | 150 | ||
294 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) | 151 | int rt2x00pci_initialize(struct rt2x00_dev *rt2x00dev) |
295 | { | 152 | { |
296 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); | 153 | struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev); |
297 | struct data_queue *queue; | 154 | struct data_queue *queue; |
298 | int status; | 155 | int status; |
299 | 156 | ||
@@ -334,7 +191,7 @@ void rt2x00pci_uninitialize(struct rt2x00_dev *rt2x00dev) | |||
334 | /* | 191 | /* |
335 | * Free irq line. | 192 | * Free irq line. |
336 | */ | 193 | */ |
337 | free_irq(rt2x00dev_pci(rt2x00dev)->irq, rt2x00dev); | 194 | free_irq(to_pci_dev(rt2x00dev->dev)->irq, rt2x00dev); |
338 | 195 | ||
339 | /* | 196 | /* |
340 | * Free DMA | 197 | * Free DMA |
@@ -363,7 +220,7 @@ static void rt2x00pci_free_reg(struct rt2x00_dev *rt2x00dev) | |||
363 | 220 | ||
364 | static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev) | 221 | static int rt2x00pci_alloc_reg(struct rt2x00_dev *rt2x00dev) |
365 | { | 222 | { |
366 | struct pci_dev *pci_dev = rt2x00dev_pci(rt2x00dev); | 223 | struct pci_dev *pci_dev = to_pci_dev(rt2x00dev->dev); |
367 | 224 | ||
368 | rt2x00dev->csr.base = ioremap(pci_resource_start(pci_dev, 0), | 225 | rt2x00dev->csr.base = ioremap(pci_resource_start(pci_dev, 0), |
369 | pci_resource_len(pci_dev, 0)); | 226 | pci_resource_len(pci_dev, 0)); |
@@ -412,7 +269,7 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |||
412 | if (pci_set_mwi(pci_dev)) | 269 | if (pci_set_mwi(pci_dev)) |
413 | ERROR_PROBE("MWI not available.\n"); | 270 | ERROR_PROBE("MWI not available.\n"); |
414 | 271 | ||
415 | if (pci_set_dma_mask(pci_dev, DMA_32BIT_MASK)) { | 272 | if (dma_set_mask(&pci_dev->dev, DMA_32BIT_MASK)) { |
416 | ERROR_PROBE("PCI DMA not supported.\n"); | 273 | ERROR_PROBE("PCI DMA not supported.\n"); |
417 | retval = -EIO; | 274 | retval = -EIO; |
418 | goto exit_disable_device; | 275 | goto exit_disable_device; |
@@ -428,7 +285,7 @@ int rt2x00pci_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) | |||
428 | pci_set_drvdata(pci_dev, hw); | 285 | pci_set_drvdata(pci_dev, hw); |
429 | 286 | ||
430 | rt2x00dev = hw->priv; | 287 | rt2x00dev = hw->priv; |
431 | rt2x00dev->dev = pci_dev; | 288 | rt2x00dev->dev = &pci_dev->dev; |
432 | rt2x00dev->ops = ops; | 289 | rt2x00dev->ops = ops; |
433 | rt2x00dev->hw = hw; | 290 | rt2x00dev->hw = hw; |
434 | 291 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h index b41967ecbf6d..80bf97c03e2d 100644 --- a/drivers/net/wireless/rt2x00/rt2x00pci.h +++ b/drivers/net/wireless/rt2x00/rt2x00pci.h | |||
@@ -87,44 +87,26 @@ rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev, | |||
87 | memcpy_toio(rt2x00dev->csr.base + offset, value, length); | 87 | memcpy_toio(rt2x00dev->csr.base + offset, value, length); |
88 | } | 88 | } |
89 | 89 | ||
90 | /* | ||
91 | * TX data handlers. | ||
92 | */ | ||
93 | int rt2x00pci_write_tx_data(struct rt2x00_dev *rt2x00dev, | ||
94 | struct data_queue *queue, struct sk_buff *skb, | ||
95 | struct ieee80211_tx_control *control); | ||
96 | |||
97 | /** | 90 | /** |
98 | * struct queue_entry_priv_pci_rx: Per RX entry PCI specific information | 91 | * rt2x00pci_write_tx_data - Initialize data for TX operation |
92 | * @entry: The entry where the frame is located | ||
99 | * | 93 | * |
100 | * @desc: Pointer to device descriptor. | 94 | * This function will initialize the DMA and skb descriptor |
101 | * @data: Pointer to device's entry memory. | 95 | * to prepare the entry for the actual TX operation. |
102 | * @dma: DMA pointer to &data. | ||
103 | */ | 96 | */ |
104 | struct queue_entry_priv_pci_rx { | 97 | int rt2x00pci_write_tx_data(struct queue_entry *entry); |
105 | __le32 *desc; | ||
106 | dma_addr_t desc_dma; | ||
107 | |||
108 | void *data; | ||
109 | dma_addr_t data_dma; | ||
110 | }; | ||
111 | 98 | ||
112 | /** | 99 | /** |
113 | * struct queue_entry_priv_pci_tx: Per TX entry PCI specific information | 100 | * struct queue_entry_priv_pci: Per entry PCI specific information |
114 | * | 101 | * |
115 | * @desc: Pointer to device descriptor | 102 | * @desc: Pointer to device descriptor |
103 | * @desc_dma: DMA pointer to &desc. | ||
116 | * @data: Pointer to device's entry memory. | 104 | * @data: Pointer to device's entry memory. |
117 | * @dma: DMA pointer to &data. | 105 | * @data_dma: DMA pointer to &data. |
118 | * @control: mac80211 control structure used to transmit data. | ||
119 | */ | 106 | */ |
120 | struct queue_entry_priv_pci_tx { | 107 | struct queue_entry_priv_pci { |
121 | __le32 *desc; | 108 | __le32 *desc; |
122 | dma_addr_t desc_dma; | 109 | dma_addr_t desc_dma; |
123 | |||
124 | void *data; | ||
125 | dma_addr_t data_dma; | ||
126 | |||
127 | struct ieee80211_tx_control control; | ||
128 | }; | 110 | }; |
129 | 111 | ||
130 | /** | 112 | /** |
@@ -133,15 +115,6 @@ struct queue_entry_priv_pci_tx { | |||
133 | */ | 115 | */ |
134 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev); | 116 | void rt2x00pci_rxdone(struct rt2x00_dev *rt2x00dev); |
135 | 117 | ||
136 | /** | ||
137 | * rt2x00pci_txdone - Handle TX done events | ||
138 | * @rt2x00dev: Device pointer, see &struct rt2x00_dev. | ||
139 | * @entry: Entry which has completed the transmission of a frame. | ||
140 | * @desc: TX done descriptor | ||
141 | */ | ||
142 | void rt2x00pci_txdone(struct rt2x00_dev *rt2x00dev, struct queue_entry *entry, | ||
143 | struct txdone_entry_desc *desc); | ||
144 | |||
145 | /* | 118 | /* |
146 | * Device initialization handlers. | 119 | * Device initialization handlers. |
147 | */ | 120 | */ |
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.c b/drivers/net/wireless/rt2x00/rt2x00queue.c index 659e9f44c40c..7f442030f5ad 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c | |||
@@ -25,24 +25,370 @@ | |||
25 | 25 | ||
26 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
27 | #include <linux/module.h> | 27 | #include <linux/module.h> |
28 | #include <linux/dma-mapping.h> | ||
28 | 29 | ||
29 | #include "rt2x00.h" | 30 | #include "rt2x00.h" |
30 | #include "rt2x00lib.h" | 31 | #include "rt2x00lib.h" |
31 | 32 | ||
33 | struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev, | ||
34 | struct queue_entry *entry) | ||
35 | { | ||
36 | unsigned int frame_size; | ||
37 | unsigned int reserved_size; | ||
38 | struct sk_buff *skb; | ||
39 | struct skb_frame_desc *skbdesc; | ||
40 | |||
41 | /* | ||
42 | * The frame size includes descriptor size, because the | ||
43 | * hardware directly receive the frame into the skbuffer. | ||
44 | */ | ||
45 | frame_size = entry->queue->data_size + entry->queue->desc_size; | ||
46 | |||
47 | /* | ||
48 | * The payload should be aligned to a 4-byte boundary, | ||
49 | * this means we need at least 3 bytes for moving the frame | ||
50 | * into the correct offset. | ||
51 | */ | ||
52 | reserved_size = 4; | ||
53 | |||
54 | /* | ||
55 | * Allocate skbuffer. | ||
56 | */ | ||
57 | skb = dev_alloc_skb(frame_size + reserved_size); | ||
58 | if (!skb) | ||
59 | return NULL; | ||
60 | |||
61 | skb_reserve(skb, reserved_size); | ||
62 | skb_put(skb, frame_size); | ||
63 | |||
64 | /* | ||
65 | * Populate skbdesc. | ||
66 | */ | ||
67 | skbdesc = get_skb_frame_desc(skb); | ||
68 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
69 | skbdesc->entry = entry; | ||
70 | |||
71 | if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) { | ||
72 | skbdesc->skb_dma = dma_map_single(rt2x00dev->dev, | ||
73 | skb->data, | ||
74 | skb->len, | ||
75 | DMA_FROM_DEVICE); | ||
76 | skbdesc->flags |= SKBDESC_DMA_MAPPED_RX; | ||
77 | } | ||
78 | |||
79 | return skb; | ||
80 | } | ||
81 | |||
82 | void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) | ||
83 | { | ||
84 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | ||
85 | |||
86 | skbdesc->skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len, | ||
87 | DMA_TO_DEVICE); | ||
88 | skbdesc->flags |= SKBDESC_DMA_MAPPED_TX; | ||
89 | } | ||
90 | EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb); | ||
91 | |||
92 | void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) | ||
93 | { | ||
94 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | ||
95 | |||
96 | if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) { | ||
97 | dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len, | ||
98 | DMA_FROM_DEVICE); | ||
99 | skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX; | ||
100 | } | ||
101 | |||
102 | if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) { | ||
103 | dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len, | ||
104 | DMA_TO_DEVICE); | ||
105 | skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX; | ||
106 | } | ||
107 | } | ||
108 | |||
109 | void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb) | ||
110 | { | ||
111 | if (!skb) | ||
112 | return; | ||
113 | |||
114 | rt2x00queue_unmap_skb(rt2x00dev, skb); | ||
115 | dev_kfree_skb_any(skb); | ||
116 | } | ||
117 | |||
118 | static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry, | ||
119 | struct txentry_desc *txdesc) | ||
120 | { | ||
121 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
122 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); | ||
123 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data; | ||
124 | struct ieee80211_rate *rate = | ||
125 | ieee80211_get_tx_rate(rt2x00dev->hw, tx_info); | ||
126 | const struct rt2x00_rate *hwrate; | ||
127 | unsigned int data_length; | ||
128 | unsigned int duration; | ||
129 | unsigned int residual; | ||
130 | |||
131 | memset(txdesc, 0, sizeof(*txdesc)); | ||
132 | |||
133 | /* | ||
134 | * Initialize information from queue | ||
135 | */ | ||
136 | txdesc->queue = entry->queue->qid; | ||
137 | txdesc->cw_min = entry->queue->cw_min; | ||
138 | txdesc->cw_max = entry->queue->cw_max; | ||
139 | txdesc->aifs = entry->queue->aifs; | ||
140 | |||
141 | /* Data length should be extended with 4 bytes for CRC */ | ||
142 | data_length = entry->skb->len + 4; | ||
143 | |||
144 | /* | ||
145 | * Check whether this frame is to be acked. | ||
146 | */ | ||
147 | if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK)) | ||
148 | __set_bit(ENTRY_TXD_ACK, &txdesc->flags); | ||
149 | |||
150 | /* | ||
151 | * Check if this is a RTS/CTS frame | ||
152 | */ | ||
153 | if (ieee80211_is_rts(hdr->frame_control) || | ||
154 | ieee80211_is_cts(hdr->frame_control)) { | ||
155 | __set_bit(ENTRY_TXD_BURST, &txdesc->flags); | ||
156 | if (ieee80211_is_rts(hdr->frame_control)) | ||
157 | __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags); | ||
158 | else | ||
159 | __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags); | ||
160 | if (tx_info->control.rts_cts_rate_idx >= 0) | ||
161 | rate = | ||
162 | ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info); | ||
163 | } | ||
164 | |||
165 | /* | ||
166 | * Determine retry information. | ||
167 | */ | ||
168 | txdesc->retry_limit = tx_info->control.retry_limit; | ||
169 | if (tx_info->flags & IEEE80211_TX_CTL_LONG_RETRY_LIMIT) | ||
170 | __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags); | ||
171 | |||
172 | /* | ||
173 | * Check if more fragments are pending | ||
174 | */ | ||
175 | if (ieee80211_has_morefrags(hdr->frame_control)) { | ||
176 | __set_bit(ENTRY_TXD_BURST, &txdesc->flags); | ||
177 | __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags); | ||
178 | } | ||
179 | |||
180 | /* | ||
181 | * Beacons and probe responses require the tsf timestamp | ||
182 | * to be inserted into the frame. | ||
183 | */ | ||
184 | if (ieee80211_is_beacon(hdr->frame_control) || | ||
185 | ieee80211_is_probe_resp(hdr->frame_control)) | ||
186 | __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags); | ||
187 | |||
188 | /* | ||
189 | * Determine with what IFS priority this frame should be send. | ||
190 | * Set ifs to IFS_SIFS when the this is not the first fragment, | ||
191 | * or this fragment came after RTS/CTS. | ||
192 | */ | ||
193 | if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) { | ||
194 | txdesc->ifs = IFS_SIFS; | ||
195 | } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) { | ||
196 | __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags); | ||
197 | txdesc->ifs = IFS_BACKOFF; | ||
198 | } else { | ||
199 | txdesc->ifs = IFS_SIFS; | ||
200 | } | ||
201 | |||
202 | /* | ||
203 | * PLCP setup | ||
204 | * Length calculation depends on OFDM/CCK rate. | ||
205 | */ | ||
206 | hwrate = rt2x00_get_rate(rate->hw_value); | ||
207 | txdesc->signal = hwrate->plcp; | ||
208 | txdesc->service = 0x04; | ||
209 | |||
210 | if (hwrate->flags & DEV_RATE_OFDM) { | ||
211 | __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags); | ||
212 | |||
213 | txdesc->length_high = (data_length >> 6) & 0x3f; | ||
214 | txdesc->length_low = data_length & 0x3f; | ||
215 | } else { | ||
216 | /* | ||
217 | * Convert length to microseconds. | ||
218 | */ | ||
219 | residual = get_duration_res(data_length, hwrate->bitrate); | ||
220 | duration = get_duration(data_length, hwrate->bitrate); | ||
221 | |||
222 | if (residual != 0) { | ||
223 | duration++; | ||
224 | |||
225 | /* | ||
226 | * Check if we need to set the Length Extension | ||
227 | */ | ||
228 | if (hwrate->bitrate == 110 && residual <= 30) | ||
229 | txdesc->service |= 0x80; | ||
230 | } | ||
231 | |||
232 | txdesc->length_high = (duration >> 8) & 0xff; | ||
233 | txdesc->length_low = duration & 0xff; | ||
234 | |||
235 | /* | ||
236 | * When preamble is enabled we should set the | ||
237 | * preamble bit for the signal. | ||
238 | */ | ||
239 | if (rt2x00_get_rate_preamble(rate->hw_value)) | ||
240 | txdesc->signal |= 0x08; | ||
241 | } | ||
242 | } | ||
243 | |||
244 | static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry, | ||
245 | struct txentry_desc *txdesc) | ||
246 | { | ||
247 | struct data_queue *queue = entry->queue; | ||
248 | struct rt2x00_dev *rt2x00dev = queue->rt2x00dev; | ||
249 | |||
250 | rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc); | ||
251 | |||
252 | /* | ||
253 | * All processing on the frame has been completed, this means | ||
254 | * it is now ready to be dumped to userspace through debugfs. | ||
255 | */ | ||
256 | rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb); | ||
257 | |||
258 | /* | ||
259 | * Check if we need to kick the queue, there are however a few rules | ||
260 | * 1) Don't kick beacon queue | ||
261 | * 2) Don't kick unless this is the last in frame in a burst. | ||
262 | * When the burst flag is set, this frame is always followed | ||
263 | * by another frame which in some way are related to eachother. | ||
264 | * This is true for fragments, RTS or CTS-to-self frames. | ||
265 | * 3) Rule 2 can be broken when the available entries | ||
266 | * in the queue are less then a certain threshold. | ||
267 | */ | ||
268 | if (entry->queue->qid == QID_BEACON) | ||
269 | return; | ||
270 | |||
271 | if (rt2x00queue_threshold(queue) || | ||
272 | !test_bit(ENTRY_TXD_BURST, &txdesc->flags)) | ||
273 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid); | ||
274 | } | ||
275 | |||
276 | int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb) | ||
277 | { | ||
278 | struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); | ||
279 | struct txentry_desc txdesc; | ||
280 | struct skb_frame_desc *skbdesc; | ||
281 | |||
282 | if (unlikely(rt2x00queue_full(queue))) | ||
283 | return -EINVAL; | ||
284 | |||
285 | if (__test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) { | ||
286 | ERROR(queue->rt2x00dev, | ||
287 | "Arrived at non-free entry in the non-full queue %d.\n" | ||
288 | "Please file bug report to %s.\n", | ||
289 | queue->qid, DRV_PROJECT); | ||
290 | return -EINVAL; | ||
291 | } | ||
292 | |||
293 | /* | ||
294 | * Copy all TX descriptor information into txdesc, | ||
295 | * after that we are free to use the skb->cb array | ||
296 | * for our information. | ||
297 | */ | ||
298 | entry->skb = skb; | ||
299 | rt2x00queue_create_tx_descriptor(entry, &txdesc); | ||
300 | |||
301 | /* | ||
302 | * skb->cb array is now ours and we are free to use it. | ||
303 | */ | ||
304 | skbdesc = get_skb_frame_desc(entry->skb); | ||
305 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
306 | skbdesc->entry = entry; | ||
307 | |||
308 | if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) { | ||
309 | __clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); | ||
310 | return -EIO; | ||
311 | } | ||
312 | |||
313 | if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags)) | ||
314 | rt2x00queue_map_txskb(queue->rt2x00dev, skb); | ||
315 | |||
316 | __set_bit(ENTRY_DATA_PENDING, &entry->flags); | ||
317 | |||
318 | rt2x00queue_index_inc(queue, Q_INDEX); | ||
319 | rt2x00queue_write_tx_descriptor(entry, &txdesc); | ||
320 | |||
321 | return 0; | ||
322 | } | ||
323 | |||
324 | int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev, | ||
325 | struct ieee80211_vif *vif) | ||
326 | { | ||
327 | struct rt2x00_intf *intf = vif_to_intf(vif); | ||
328 | struct skb_frame_desc *skbdesc; | ||
329 | struct txentry_desc txdesc; | ||
330 | __le32 desc[16]; | ||
331 | |||
332 | if (unlikely(!intf->beacon)) | ||
333 | return -ENOBUFS; | ||
334 | |||
335 | intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif); | ||
336 | if (!intf->beacon->skb) | ||
337 | return -ENOMEM; | ||
338 | |||
339 | /* | ||
340 | * Copy all TX descriptor information into txdesc, | ||
341 | * after that we are free to use the skb->cb array | ||
342 | * for our information. | ||
343 | */ | ||
344 | rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc); | ||
345 | |||
346 | /* | ||
347 | * For the descriptor we use a local array from where the | ||
348 | * driver can move it to the correct location required for | ||
349 | * the hardware. | ||
350 | */ | ||
351 | memset(desc, 0, sizeof(desc)); | ||
352 | |||
353 | /* | ||
354 | * Fill in skb descriptor | ||
355 | */ | ||
356 | skbdesc = get_skb_frame_desc(intf->beacon->skb); | ||
357 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
358 | skbdesc->desc = desc; | ||
359 | skbdesc->desc_len = intf->beacon->queue->desc_size; | ||
360 | skbdesc->entry = intf->beacon; | ||
361 | |||
362 | /* | ||
363 | * Write TX descriptor into reserved room in front of the beacon. | ||
364 | */ | ||
365 | rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc); | ||
366 | |||
367 | /* | ||
368 | * Send beacon to hardware. | ||
369 | * Also enable beacon generation, which might have been disabled | ||
370 | * by the driver during the config_beacon() callback function. | ||
371 | */ | ||
372 | rt2x00dev->ops->lib->write_beacon(intf->beacon); | ||
373 | rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON); | ||
374 | |||
375 | return 0; | ||
376 | } | ||
377 | |||
32 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, | 378 | struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev, |
33 | const unsigned int queue) | 379 | const enum data_queue_qid queue) |
34 | { | 380 | { |
35 | int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); | 381 | int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags); |
36 | 382 | ||
37 | if (queue < rt2x00dev->hw->queues && rt2x00dev->tx) | 383 | if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx) |
38 | return &rt2x00dev->tx[queue]; | 384 | return &rt2x00dev->tx[queue]; |
39 | 385 | ||
40 | if (!rt2x00dev->bcn) | 386 | if (!rt2x00dev->bcn) |
41 | return NULL; | 387 | return NULL; |
42 | 388 | ||
43 | if (queue == RT2X00_BCN_QUEUE_BEACON) | 389 | if (queue == QID_BEACON) |
44 | return &rt2x00dev->bcn[0]; | 390 | return &rt2x00dev->bcn[0]; |
45 | else if (queue == RT2X00_BCN_QUEUE_ATIM && atim) | 391 | else if (queue == QID_ATIM && atim) |
46 | return &rt2x00dev->bcn[1]; | 392 | return &rt2x00dev->bcn[1]; |
47 | 393 | ||
48 | return NULL; | 394 | return NULL; |
@@ -96,7 +442,6 @@ void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index) | |||
96 | 442 | ||
97 | spin_unlock_irqrestore(&queue->lock, irqflags); | 443 | spin_unlock_irqrestore(&queue->lock, irqflags); |
98 | } | 444 | } |
99 | EXPORT_SYMBOL_GPL(rt2x00queue_index_inc); | ||
100 | 445 | ||
101 | static void rt2x00queue_reset(struct data_queue *queue) | 446 | static void rt2x00queue_reset(struct data_queue *queue) |
102 | { | 447 | { |
@@ -153,6 +498,7 @@ static int rt2x00queue_alloc_entries(struct data_queue *queue, | |||
153 | rt2x00queue_reset(queue); | 498 | rt2x00queue_reset(queue); |
154 | 499 | ||
155 | queue->limit = qdesc->entry_num; | 500 | queue->limit = qdesc->entry_num; |
501 | queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10); | ||
156 | queue->data_size = qdesc->data_size; | 502 | queue->data_size = qdesc->data_size; |
157 | queue->desc_size = qdesc->desc_size; | 503 | queue->desc_size = qdesc->desc_size; |
158 | 504 | ||
@@ -185,12 +531,41 @@ static int rt2x00queue_alloc_entries(struct data_queue *queue, | |||
185 | return 0; | 531 | return 0; |
186 | } | 532 | } |
187 | 533 | ||
534 | static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev, | ||
535 | struct data_queue *queue) | ||
536 | { | ||
537 | unsigned int i; | ||
538 | |||
539 | if (!queue->entries) | ||
540 | return; | ||
541 | |||
542 | for (i = 0; i < queue->limit; i++) { | ||
543 | if (queue->entries[i].skb) | ||
544 | rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb); | ||
545 | } | ||
546 | } | ||
547 | |||
548 | static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev, | ||
549 | struct data_queue *queue) | ||
550 | { | ||
551 | unsigned int i; | ||
552 | struct sk_buff *skb; | ||
553 | |||
554 | for (i = 0; i < queue->limit; i++) { | ||
555 | skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]); | ||
556 | if (!skb) | ||
557 | return -ENOMEM; | ||
558 | queue->entries[i].skb = skb; | ||
559 | } | ||
560 | |||
561 | return 0; | ||
562 | } | ||
563 | |||
188 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) | 564 | int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) |
189 | { | 565 | { |
190 | struct data_queue *queue; | 566 | struct data_queue *queue; |
191 | int status; | 567 | int status; |
192 | 568 | ||
193 | |||
194 | status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx); | 569 | status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx); |
195 | if (status) | 570 | if (status) |
196 | goto exit; | 571 | goto exit; |
@@ -205,11 +580,14 @@ int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev) | |||
205 | if (status) | 580 | if (status) |
206 | goto exit; | 581 | goto exit; |
207 | 582 | ||
208 | if (!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) | 583 | if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) { |
209 | return 0; | 584 | status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1], |
585 | rt2x00dev->ops->atim); | ||
586 | if (status) | ||
587 | goto exit; | ||
588 | } | ||
210 | 589 | ||
211 | status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1], | 590 | status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx); |
212 | rt2x00dev->ops->atim); | ||
213 | if (status) | 591 | if (status) |
214 | goto exit; | 592 | goto exit; |
215 | 593 | ||
@@ -227,6 +605,8 @@ void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev) | |||
227 | { | 605 | { |
228 | struct data_queue *queue; | 606 | struct data_queue *queue; |
229 | 607 | ||
608 | rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx); | ||
609 | |||
230 | queue_for_each(rt2x00dev, queue) { | 610 | queue_for_each(rt2x00dev, queue) { |
231 | kfree(queue->entries); | 611 | kfree(queue->entries); |
232 | queue->entries = NULL; | 612 | queue->entries = NULL; |
@@ -255,11 +635,11 @@ int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) | |||
255 | /* | 635 | /* |
256 | * We need the following queues: | 636 | * We need the following queues: |
257 | * RX: 1 | 637 | * RX: 1 |
258 | * TX: hw->queues | 638 | * TX: ops->tx_queues |
259 | * Beacon: 1 | 639 | * Beacon: 1 |
260 | * Atim: 1 (if required) | 640 | * Atim: 1 (if required) |
261 | */ | 641 | */ |
262 | rt2x00dev->data_queues = 2 + rt2x00dev->hw->queues + req_atim; | 642 | rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim; |
263 | 643 | ||
264 | queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL); | 644 | queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL); |
265 | if (!queue) { | 645 | if (!queue) { |
@@ -272,7 +652,7 @@ int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) | |||
272 | */ | 652 | */ |
273 | rt2x00dev->rx = queue; | 653 | rt2x00dev->rx = queue; |
274 | rt2x00dev->tx = &queue[1]; | 654 | rt2x00dev->tx = &queue[1]; |
275 | rt2x00dev->bcn = &queue[1 + rt2x00dev->hw->queues]; | 655 | rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues]; |
276 | 656 | ||
277 | /* | 657 | /* |
278 | * Initialize queue parameters. | 658 | * Initialize queue parameters. |
@@ -280,7 +660,8 @@ int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) | |||
280 | * TX: qid = QID_AC_BE + index | 660 | * TX: qid = QID_AC_BE + index |
281 | * TX: cw_min: 2^5 = 32. | 661 | * TX: cw_min: 2^5 = 32. |
282 | * TX: cw_max: 2^10 = 1024. | 662 | * TX: cw_max: 2^10 = 1024. |
283 | * BCN & Atim: qid = QID_MGMT | 663 | * BCN: qid = QID_BEACON |
664 | * ATIM: qid = QID_ATIM | ||
284 | */ | 665 | */ |
285 | rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX); | 666 | rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX); |
286 | 667 | ||
@@ -288,9 +669,9 @@ int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev) | |||
288 | tx_queue_for_each(rt2x00dev, queue) | 669 | tx_queue_for_each(rt2x00dev, queue) |
289 | rt2x00queue_init(rt2x00dev, queue, qid++); | 670 | rt2x00queue_init(rt2x00dev, queue, qid++); |
290 | 671 | ||
291 | rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_MGMT); | 672 | rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON); |
292 | if (req_atim) | 673 | if (req_atim) |
293 | rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_MGMT); | 674 | rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM); |
294 | 675 | ||
295 | return 0; | 676 | return 0; |
296 | } | 677 | } |
diff --git a/drivers/net/wireless/rt2x00/rt2x00queue.h b/drivers/net/wireless/rt2x00/rt2x00queue.h index 7027c9f47d3f..8945945c892e 100644 --- a/drivers/net/wireless/rt2x00/rt2x00queue.h +++ b/drivers/net/wireless/rt2x00/rt2x00queue.h | |||
@@ -42,18 +42,32 @@ | |||
42 | /** | 42 | /** |
43 | * DOC: Number of entries per queue | 43 | * DOC: Number of entries per queue |
44 | * | 44 | * |
45 | * After research it was concluded that 12 entries in a RX and TX | 45 | * Under normal load without fragmentation 12 entries are sufficient |
46 | * queue would be sufficient. Although this is almost one third of | 46 | * without the queue being filled up to the maximum. When using fragmentation |
47 | * the amount the legacy driver allocated, the queues aren't getting | 47 | * and the queue threshold code we need to add some additional margins to |
48 | * filled to the maximum even when working with the maximum rate. | 48 | * make sure the queue will never (or only under extreme load) fill up |
49 | * completely. | ||
50 | * Since we don't use preallocated DMA having a large number of queue entries | ||
51 | * will have only minimal impact on the memory requirements for the queue. | ||
49 | */ | 52 | */ |
50 | #define RX_ENTRIES 12 | 53 | #define RX_ENTRIES 24 |
51 | #define TX_ENTRIES 12 | 54 | #define TX_ENTRIES 24 |
52 | #define BEACON_ENTRIES 1 | 55 | #define BEACON_ENTRIES 1 |
53 | #define ATIM_ENTRIES 1 | 56 | #define ATIM_ENTRIES 8 |
54 | 57 | ||
55 | /** | 58 | /** |
56 | * enum data_queue_qid: Queue identification | 59 | * enum data_queue_qid: Queue identification |
60 | * | ||
61 | * @QID_AC_BE: AC BE queue | ||
62 | * @QID_AC_BK: AC BK queue | ||
63 | * @QID_AC_VI: AC VI queue | ||
64 | * @QID_AC_VO: AC VO queue | ||
65 | * @QID_HCCA: HCCA queue | ||
66 | * @QID_MGMT: MGMT queue (prio queue) | ||
67 | * @QID_RX: RX queue | ||
68 | * @QID_OTHER: None of the above (don't use, only present for completeness) | ||
69 | * @QID_BEACON: Beacon queue (value unspecified, don't send it to device) | ||
70 | * @QID_ATIM: Atim queue (value unspeficied, don't send it to device) | ||
57 | */ | 71 | */ |
58 | enum data_queue_qid { | 72 | enum data_queue_qid { |
59 | QID_AC_BE = 0, | 73 | QID_AC_BE = 0, |
@@ -64,68 +78,55 @@ enum data_queue_qid { | |||
64 | QID_MGMT = 13, | 78 | QID_MGMT = 13, |
65 | QID_RX = 14, | 79 | QID_RX = 14, |
66 | QID_OTHER = 15, | 80 | QID_OTHER = 15, |
67 | }; | 81 | QID_BEACON, |
68 | 82 | QID_ATIM, | |
69 | /** | ||
70 | * enum rt2x00_bcn_queue: Beacon queue index | ||
71 | * | ||
72 | * Start counting with a high offset, this because this enumeration | ||
73 | * supplements &enum ieee80211_tx_queue and we should prevent value | ||
74 | * conflicts. | ||
75 | * | ||
76 | * @RT2X00_BCN_QUEUE_BEACON: Beacon queue | ||
77 | * @RT2X00_BCN_QUEUE_ATIM: Atim queue (sends frame after beacon) | ||
78 | */ | ||
79 | enum rt2x00_bcn_queue { | ||
80 | RT2X00_BCN_QUEUE_BEACON = 100, | ||
81 | RT2X00_BCN_QUEUE_ATIM = 101, | ||
82 | }; | 83 | }; |
83 | 84 | ||
84 | /** | 85 | /** |
85 | * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc | 86 | * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc |
86 | * | 87 | * |
87 | * @FRAME_DESC_DRIVER_GENERATED: Frame was generated inside driver | 88 | * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX |
88 | * and should not be reported back to mac80211 during txdone. | 89 | * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX |
89 | */ | 90 | */ |
90 | enum skb_frame_desc_flags { | 91 | enum skb_frame_desc_flags { |
91 | FRAME_DESC_DRIVER_GENERATED = 1 << 0, | 92 | SKBDESC_DMA_MAPPED_RX = (1 << 0), |
93 | SKBDESC_DMA_MAPPED_TX = (1 << 1), | ||
92 | }; | 94 | }; |
93 | 95 | ||
94 | /** | 96 | /** |
95 | * struct skb_frame_desc: Descriptor information for the skb buffer | 97 | * struct skb_frame_desc: Descriptor information for the skb buffer |
96 | * | 98 | * |
97 | * This structure is placed over the skb->cb array, this means that | 99 | * This structure is placed over the driver_data array, this means that |
98 | * this structure should not exceed the size of that array (48 bytes). | 100 | * this structure should not exceed the size of that array (40 bytes). |
99 | * | 101 | * |
100 | * @flags: Frame flags, see &enum skb_frame_desc_flags. | 102 | * @flags: Frame flags, see &enum skb_frame_desc_flags. |
101 | * @frame_type: Frame type, see &enum rt2x00_dump_type. | 103 | * @desc_len: Length of the frame descriptor. |
102 | * @data: Pointer to data part of frame (Start of ieee80211 header). | ||
103 | * @desc: Pointer to descriptor part of the frame. | 104 | * @desc: Pointer to descriptor part of the frame. |
104 | * Note that this pointer could point to something outside | 105 | * Note that this pointer could point to something outside |
105 | * of the scope of the skb->data pointer. | 106 | * of the scope of the skb->data pointer. |
106 | * @data_len: Length of the frame data. | 107 | * @skb_dma: (PCI-only) the DMA address associated with the sk buffer. |
107 | * @desc_len: Length of the frame descriptor. | ||
108 | |||
109 | * @entry: The entry to which this sk buffer belongs. | 108 | * @entry: The entry to which this sk buffer belongs. |
110 | */ | 109 | */ |
111 | struct skb_frame_desc { | 110 | struct skb_frame_desc { |
112 | unsigned int flags; | 111 | unsigned int flags; |
113 | 112 | ||
114 | unsigned int frame_type; | 113 | unsigned int desc_len; |
115 | |||
116 | void *data; | ||
117 | void *desc; | 114 | void *desc; |
118 | 115 | ||
119 | unsigned int data_len; | 116 | dma_addr_t skb_dma; |
120 | unsigned int desc_len; | ||
121 | 117 | ||
122 | struct queue_entry *entry; | 118 | struct queue_entry *entry; |
123 | }; | 119 | }; |
124 | 120 | ||
121 | /** | ||
122 | * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff. | ||
123 | * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc | ||
124 | */ | ||
125 | static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb) | 125 | static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb) |
126 | { | 126 | { |
127 | BUILD_BUG_ON(sizeof(struct skb_frame_desc) > sizeof(skb->cb)); | 127 | BUILD_BUG_ON(sizeof(struct skb_frame_desc) > |
128 | return (struct skb_frame_desc *)&skb->cb[0]; | 128 | IEEE80211_TX_INFO_DRIVER_DATA_SIZE); |
129 | return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data; | ||
129 | } | 130 | } |
130 | 131 | ||
131 | /** | 132 | /** |
@@ -145,6 +146,7 @@ enum rxdone_entry_desc_flags { | |||
145 | * | 146 | * |
146 | * Summary of information that has been read from the RX frame descriptor. | 147 | * Summary of information that has been read from the RX frame descriptor. |
147 | * | 148 | * |
149 | * @timestamp: RX Timestamp | ||
148 | * @signal: Signal of the received frame. | 150 | * @signal: Signal of the received frame. |
149 | * @rssi: RSSI of the received frame. | 151 | * @rssi: RSSI of the received frame. |
150 | * @size: Data size of the received frame. | 152 | * @size: Data size of the received frame. |
@@ -153,6 +155,7 @@ enum rxdone_entry_desc_flags { | |||
153 | 155 | ||
154 | */ | 156 | */ |
155 | struct rxdone_entry_desc { | 157 | struct rxdone_entry_desc { |
158 | u64 timestamp; | ||
156 | int signal; | 159 | int signal; |
157 | int rssi; | 160 | int rssi; |
158 | int size; | 161 | int size; |
@@ -161,18 +164,32 @@ struct rxdone_entry_desc { | |||
161 | }; | 164 | }; |
162 | 165 | ||
163 | /** | 166 | /** |
167 | * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc | ||
168 | * | ||
169 | * @TXDONE_UNKNOWN: Hardware could not determine success of transmission. | ||
170 | * @TXDONE_SUCCESS: Frame was successfully send | ||
171 | * @TXDONE_FAILURE: Frame was not successfully send | ||
172 | * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the | ||
173 | * frame transmission failed due to excessive retries. | ||
174 | */ | ||
175 | enum txdone_entry_desc_flags { | ||
176 | TXDONE_UNKNOWN = 1 << 0, | ||
177 | TXDONE_SUCCESS = 1 << 1, | ||
178 | TXDONE_FAILURE = 1 << 2, | ||
179 | TXDONE_EXCESSIVE_RETRY = 1 << 3, | ||
180 | }; | ||
181 | |||
182 | /** | ||
164 | * struct txdone_entry_desc: TX done entry descriptor | 183 | * struct txdone_entry_desc: TX done entry descriptor |
165 | * | 184 | * |
166 | * Summary of information that has been read from the TX frame descriptor | 185 | * Summary of information that has been read from the TX frame descriptor |
167 | * after the device is done with transmission. | 186 | * after the device is done with transmission. |
168 | * | 187 | * |
169 | * @control: Control structure which was used to transmit the frame. | 188 | * @flags: TX done flags (See &enum txdone_entry_desc_flags). |
170 | * @status: TX status (See &enum tx_status). | ||
171 | * @retry: Retry count. | 189 | * @retry: Retry count. |
172 | */ | 190 | */ |
173 | struct txdone_entry_desc { | 191 | struct txdone_entry_desc { |
174 | struct ieee80211_tx_control *control; | 192 | unsigned long flags; |
175 | int status; | ||
176 | int retry; | 193 | int retry; |
177 | }; | 194 | }; |
178 | 195 | ||
@@ -180,19 +197,25 @@ struct txdone_entry_desc { | |||
180 | * enum txentry_desc_flags: Status flags for TX entry descriptor | 197 | * enum txentry_desc_flags: Status flags for TX entry descriptor |
181 | * | 198 | * |
182 | * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. | 199 | * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame. |
200 | * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame. | ||
183 | * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate. | 201 | * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate. |
202 | * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame. | ||
184 | * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. | 203 | * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment. |
185 | * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. | 204 | * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted. |
186 | * @ENTRY_TXD_BURST: This frame belongs to the same burst event. | 205 | * @ENTRY_TXD_BURST: This frame belongs to the same burst event. |
187 | * @ENTRY_TXD_ACK: An ACK is required for this frame. | 206 | * @ENTRY_TXD_ACK: An ACK is required for this frame. |
207 | * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used. | ||
188 | */ | 208 | */ |
189 | enum txentry_desc_flags { | 209 | enum txentry_desc_flags { |
190 | ENTRY_TXD_RTS_FRAME, | 210 | ENTRY_TXD_RTS_FRAME, |
211 | ENTRY_TXD_CTS_FRAME, | ||
191 | ENTRY_TXD_OFDM_RATE, | 212 | ENTRY_TXD_OFDM_RATE, |
213 | ENTRY_TXD_FIRST_FRAGMENT, | ||
192 | ENTRY_TXD_MORE_FRAG, | 214 | ENTRY_TXD_MORE_FRAG, |
193 | ENTRY_TXD_REQ_TIMESTAMP, | 215 | ENTRY_TXD_REQ_TIMESTAMP, |
194 | ENTRY_TXD_BURST, | 216 | ENTRY_TXD_BURST, |
195 | ENTRY_TXD_ACK, | 217 | ENTRY_TXD_ACK, |
218 | ENTRY_TXD_RETRY_MODE, | ||
196 | }; | 219 | }; |
197 | 220 | ||
198 | /** | 221 | /** |
@@ -206,6 +229,7 @@ enum txentry_desc_flags { | |||
206 | * @length_low: PLCP length low word. | 229 | * @length_low: PLCP length low word. |
207 | * @signal: PLCP signal. | 230 | * @signal: PLCP signal. |
208 | * @service: PLCP service. | 231 | * @service: PLCP service. |
232 | * @retry_limit: Max number of retries. | ||
209 | * @aifs: AIFS value. | 233 | * @aifs: AIFS value. |
210 | * @ifs: IFS value. | 234 | * @ifs: IFS value. |
211 | * @cw_min: cwmin value. | 235 | * @cw_min: cwmin value. |
@@ -221,10 +245,11 @@ struct txentry_desc { | |||
221 | u16 signal; | 245 | u16 signal; |
222 | u16 service; | 246 | u16 service; |
223 | 247 | ||
224 | int aifs; | 248 | short retry_limit; |
225 | int ifs; | 249 | short aifs; |
226 | int cw_min; | 250 | short ifs; |
227 | int cw_max; | 251 | short cw_min; |
252 | short cw_max; | ||
228 | }; | 253 | }; |
229 | 254 | ||
230 | /** | 255 | /** |
@@ -239,12 +264,14 @@ struct txentry_desc { | |||
239 | * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data | 264 | * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data |
240 | * encryption or decryption. The entry should only be touched after | 265 | * encryption or decryption. The entry should only be touched after |
241 | * the device has signaled it is done with it. | 266 | * the device has signaled it is done with it. |
267 | * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting | ||
268 | * for the signal to start sending. | ||
242 | */ | 269 | */ |
243 | |||
244 | enum queue_entry_flags { | 270 | enum queue_entry_flags { |
245 | ENTRY_BCN_ASSIGNED, | 271 | ENTRY_BCN_ASSIGNED, |
246 | ENTRY_OWNER_DEVICE_DATA, | 272 | ENTRY_OWNER_DEVICE_DATA, |
247 | ENTRY_OWNER_DEVICE_CRYPTO, | 273 | ENTRY_OWNER_DEVICE_CRYPTO, |
274 | ENTRY_DATA_PENDING, | ||
248 | }; | 275 | }; |
249 | 276 | ||
250 | /** | 277 | /** |
@@ -302,6 +329,7 @@ enum queue_index { | |||
302 | * index corruption due to concurrency. | 329 | * index corruption due to concurrency. |
303 | * @count: Number of frames handled in the queue. | 330 | * @count: Number of frames handled in the queue. |
304 | * @limit: Maximum number of entries in the queue. | 331 | * @limit: Maximum number of entries in the queue. |
332 | * @threshold: Minimum number of free entries before queue is kicked by force. | ||
305 | * @length: Number of frames in queue. | 333 | * @length: Number of frames in queue. |
306 | * @index: Index pointers to entry positions in the queue, | 334 | * @index: Index pointers to entry positions in the queue, |
307 | * use &enum queue_index to get a specific index field. | 335 | * use &enum queue_index to get a specific index field. |
@@ -320,6 +348,7 @@ struct data_queue { | |||
320 | spinlock_t lock; | 348 | spinlock_t lock; |
321 | unsigned int count; | 349 | unsigned int count; |
322 | unsigned short limit; | 350 | unsigned short limit; |
351 | unsigned short threshold; | ||
323 | unsigned short length; | 352 | unsigned short length; |
324 | unsigned short index[Q_INDEX_MAX]; | 353 | unsigned short index[Q_INDEX_MAX]; |
325 | 354 | ||
@@ -369,7 +398,7 @@ struct data_queue_desc { | |||
369 | * the end of the TX queue array. | 398 | * the end of the TX queue array. |
370 | */ | 399 | */ |
371 | #define tx_queue_end(__dev) \ | 400 | #define tx_queue_end(__dev) \ |
372 | &(__dev)->tx[(__dev)->hw->queues] | 401 | &(__dev)->tx[(__dev)->ops->tx_queues] |
373 | 402 | ||
374 | /** | 403 | /** |
375 | * queue_loop - Loop through the queues within a specific range (HELPER MACRO). | 404 | * queue_loop - Loop through the queues within a specific range (HELPER MACRO). |
@@ -444,6 +473,15 @@ static inline int rt2x00queue_available(struct data_queue *queue) | |||
444 | } | 473 | } |
445 | 474 | ||
446 | /** | 475 | /** |
476 | * rt2x00queue_threshold - Check if the queue is below threshold | ||
477 | * @queue: Queue to check. | ||
478 | */ | ||
479 | static inline int rt2x00queue_threshold(struct data_queue *queue) | ||
480 | { | ||
481 | return rt2x00queue_available(queue) < queue->threshold; | ||
482 | } | ||
483 | |||
484 | /** | ||
447 | * rt2x00_desc_read - Read a word from the hardware descriptor. | 485 | * rt2x00_desc_read - Read a word from the hardware descriptor. |
448 | * @desc: Base descriptor address | 486 | * @desc: Base descriptor address |
449 | * @word: Word index from where the descriptor should be read. | 487 | * @word: Word index from where the descriptor should be read. |
diff --git a/drivers/net/wireless/rt2x00/rt2x00reg.h b/drivers/net/wireless/rt2x00/rt2x00reg.h index 0325bed2fbf5..7e88ce5651b9 100644 --- a/drivers/net/wireless/rt2x00/rt2x00reg.h +++ b/drivers/net/wireless/rt2x00/rt2x00reg.h | |||
@@ -27,17 +27,6 @@ | |||
27 | #define RT2X00REG_H | 27 | #define RT2X00REG_H |
28 | 28 | ||
29 | /* | 29 | /* |
30 | * TX result flags. | ||
31 | */ | ||
32 | enum tx_status { | ||
33 | TX_SUCCESS = 0, | ||
34 | TX_SUCCESS_RETRY = 1, | ||
35 | TX_FAIL_RETRY = 2, | ||
36 | TX_FAIL_INVALID = 3, | ||
37 | TX_FAIL_OTHER = 4, | ||
38 | }; | ||
39 | |||
40 | /* | ||
41 | * Antenna values | 30 | * Antenna values |
42 | */ | 31 | */ |
43 | enum antenna { | 32 | enum antenna { |
@@ -141,83 +130,107 @@ struct rt2x00_field32 { | |||
141 | 130 | ||
142 | /* | 131 | /* |
143 | * Power of two check, this will check | 132 | * Power of two check, this will check |
144 | * if the mask that has been given contains | 133 | * if the mask that has been given contains and contiguous set of bits. |
145 | * and contiguous set of bits. | 134 | * Note that we cannot use the is_power_of_2() function since this |
135 | * check must be done at compile-time. | ||
146 | */ | 136 | */ |
147 | #define is_power_of_two(x) ( !((x) & ((x)-1)) ) | 137 | #define is_power_of_two(x) ( !((x) & ((x)-1)) ) |
148 | #define low_bit_mask(x) ( ((x)-1) & ~(x) ) | 138 | #define low_bit_mask(x) ( ((x)-1) & ~(x) ) |
149 | #define is_valid_mask(x) is_power_of_two(1 + (x) + low_bit_mask(x)) | 139 | #define is_valid_mask(x) is_power_of_two(1 + (x) + low_bit_mask(x)) |
150 | 140 | ||
141 | /* | ||
142 | * Macro's to find first set bit in a variable. | ||
143 | * These macro's behaves the same as the __ffs() function with | ||
144 | * the most important difference that this is done during | ||
145 | * compile-time rather then run-time. | ||
146 | */ | ||
147 | #define compile_ffs2(__x) \ | ||
148 | __builtin_choose_expr(((__x) & 0x1), 0, 1) | ||
149 | |||
150 | #define compile_ffs4(__x) \ | ||
151 | __builtin_choose_expr(((__x) & 0x3), \ | ||
152 | (compile_ffs2((__x))), \ | ||
153 | (compile_ffs2((__x) >> 2) + 2)) | ||
154 | |||
155 | #define compile_ffs8(__x) \ | ||
156 | __builtin_choose_expr(((__x) & 0xf), \ | ||
157 | (compile_ffs4((__x))), \ | ||
158 | (compile_ffs4((__x) >> 4) + 4)) | ||
159 | |||
160 | #define compile_ffs16(__x) \ | ||
161 | __builtin_choose_expr(((__x) & 0xff), \ | ||
162 | (compile_ffs8((__x))), \ | ||
163 | (compile_ffs8((__x) >> 8) + 8)) | ||
164 | |||
165 | #define compile_ffs32(__x) \ | ||
166 | __builtin_choose_expr(((__x) & 0xffff), \ | ||
167 | (compile_ffs16((__x))), \ | ||
168 | (compile_ffs16((__x) >> 16) + 16)) | ||
169 | |||
170 | /* | ||
171 | * This macro will check the requirements for the FIELD{8,16,32} macros | ||
172 | * The mask should be a constant non-zero contiguous set of bits which | ||
173 | * does not exceed the given typelimit. | ||
174 | */ | ||
175 | #define FIELD_CHECK(__mask, __type) \ | ||
176 | BUILD_BUG_ON(!__builtin_constant_p(__mask) || \ | ||
177 | !(__mask) || \ | ||
178 | !is_valid_mask(__mask) || \ | ||
179 | (__mask) != (__type)(__mask)) \ | ||
180 | |||
151 | #define FIELD8(__mask) \ | 181 | #define FIELD8(__mask) \ |
152 | ({ \ | 182 | ({ \ |
153 | BUILD_BUG_ON(!(__mask) || \ | 183 | FIELD_CHECK(__mask, u8); \ |
154 | !is_valid_mask(__mask) || \ | ||
155 | (__mask) != (u8)(__mask)); \ | ||
156 | (struct rt2x00_field8) { \ | 184 | (struct rt2x00_field8) { \ |
157 | __ffs(__mask), (__mask) \ | 185 | compile_ffs8(__mask), (__mask) \ |
158 | }; \ | 186 | }; \ |
159 | }) | 187 | }) |
160 | 188 | ||
161 | #define FIELD16(__mask) \ | 189 | #define FIELD16(__mask) \ |
162 | ({ \ | 190 | ({ \ |
163 | BUILD_BUG_ON(!(__mask) || \ | 191 | FIELD_CHECK(__mask, u16); \ |
164 | !is_valid_mask(__mask) || \ | ||
165 | (__mask) != (u16)(__mask));\ | ||
166 | (struct rt2x00_field16) { \ | 192 | (struct rt2x00_field16) { \ |
167 | __ffs(__mask), (__mask) \ | 193 | compile_ffs16(__mask), (__mask) \ |
168 | }; \ | 194 | }; \ |
169 | }) | 195 | }) |
170 | 196 | ||
171 | #define FIELD32(__mask) \ | 197 | #define FIELD32(__mask) \ |
172 | ({ \ | 198 | ({ \ |
173 | BUILD_BUG_ON(!(__mask) || \ | 199 | FIELD_CHECK(__mask, u32); \ |
174 | !is_valid_mask(__mask) || \ | ||
175 | (__mask) != (u32)(__mask));\ | ||
176 | (struct rt2x00_field32) { \ | 200 | (struct rt2x00_field32) { \ |
177 | __ffs(__mask), (__mask) \ | 201 | compile_ffs32(__mask), (__mask) \ |
178 | }; \ | 202 | }; \ |
179 | }) | 203 | }) |
180 | 204 | ||
181 | static inline void rt2x00_set_field32(u32 *reg, | 205 | #define SET_FIELD(__reg, __type, __field, __value)\ |
182 | const struct rt2x00_field32 field, | 206 | ({ \ |
183 | const u32 value) | 207 | typecheck(__type, __field); \ |
184 | { | 208 | *(__reg) &= ~((__field).bit_mask); \ |
185 | *reg &= ~(field.bit_mask); | 209 | *(__reg) |= ((__value) << \ |
186 | *reg |= (value << field.bit_offset) & field.bit_mask; | 210 | ((__field).bit_offset)) & \ |
187 | } | 211 | ((__field).bit_mask); \ |
188 | 212 | }) | |
189 | static inline u32 rt2x00_get_field32(const u32 reg, | 213 | |
190 | const struct rt2x00_field32 field) | 214 | #define GET_FIELD(__reg, __type, __field) \ |
191 | { | 215 | ({ \ |
192 | return (reg & field.bit_mask) >> field.bit_offset; | 216 | typecheck(__type, __field); \ |
193 | } | 217 | ((__reg) & ((__field).bit_mask)) >> \ |
194 | 218 | ((__field).bit_offset); \ | |
195 | static inline void rt2x00_set_field16(u16 *reg, | 219 | }) |
196 | const struct rt2x00_field16 field, | 220 | |
197 | const u16 value) | 221 | #define rt2x00_set_field32(__reg, __field, __value) \ |
198 | { | 222 | SET_FIELD(__reg, struct rt2x00_field32, __field, __value) |
199 | *reg &= ~(field.bit_mask); | 223 | #define rt2x00_get_field32(__reg, __field) \ |
200 | *reg |= (value << field.bit_offset) & field.bit_mask; | 224 | GET_FIELD(__reg, struct rt2x00_field32, __field) |
201 | } | 225 | |
202 | 226 | #define rt2x00_set_field16(__reg, __field, __value) \ | |
203 | static inline u16 rt2x00_get_field16(const u16 reg, | 227 | SET_FIELD(__reg, struct rt2x00_field16, __field, __value) |
204 | const struct rt2x00_field16 field) | 228 | #define rt2x00_get_field16(__reg, __field) \ |
205 | { | 229 | GET_FIELD(__reg, struct rt2x00_field16, __field) |
206 | return (reg & field.bit_mask) >> field.bit_offset; | 230 | |
207 | } | 231 | #define rt2x00_set_field8(__reg, __field, __value) \ |
208 | 232 | SET_FIELD(__reg, struct rt2x00_field8, __field, __value) | |
209 | static inline void rt2x00_set_field8(u8 *reg, | 233 | #define rt2x00_get_field8(__reg, __field) \ |
210 | const struct rt2x00_field8 field, | 234 | GET_FIELD(__reg, struct rt2x00_field8, __field) |
211 | const u8 value) | ||
212 | { | ||
213 | *reg &= ~(field.bit_mask); | ||
214 | *reg |= (value << field.bit_offset) & field.bit_mask; | ||
215 | } | ||
216 | |||
217 | static inline u8 rt2x00_get_field8(const u8 reg, | ||
218 | const struct rt2x00_field8 field) | ||
219 | { | ||
220 | return (reg & field.bit_mask) >> field.bit_offset; | ||
221 | } | ||
222 | 235 | ||
223 | #endif /* RT2X00REG_H */ | 236 | #endif /* RT2X00REG_H */ |
diff --git a/drivers/net/wireless/rt2x00/rt2x00rfkill.c b/drivers/net/wireless/rt2x00/rt2x00rfkill.c index fcef9885ab5e..04b29716d356 100644 --- a/drivers/net/wireless/rt2x00/rt2x00rfkill.c +++ b/drivers/net/wireless/rt2x00/rt2x00rfkill.c | |||
@@ -23,7 +23,6 @@ | |||
23 | Abstract: rt2x00 rfkill routines. | 23 | Abstract: rt2x00 rfkill routines. |
24 | */ | 24 | */ |
25 | 25 | ||
26 | #include <linux/input-polldev.h> | ||
27 | #include <linux/kernel.h> | 26 | #include <linux/kernel.h> |
28 | #include <linux/module.h> | 27 | #include <linux/module.h> |
29 | #include <linux/rfkill.h> | 28 | #include <linux/rfkill.h> |
@@ -45,28 +44,51 @@ static int rt2x00rfkill_toggle_radio(void *data, enum rfkill_state state) | |||
45 | if (!test_bit(DEVICE_STARTED, &rt2x00dev->flags)) | 44 | if (!test_bit(DEVICE_STARTED, &rt2x00dev->flags)) |
46 | return 0; | 45 | return 0; |
47 | 46 | ||
48 | if (state == RFKILL_STATE_ON) { | 47 | if (state == RFKILL_STATE_UNBLOCKED) { |
49 | INFO(rt2x00dev, "Hardware button pressed, enabling radio.\n"); | 48 | INFO(rt2x00dev, "Hardware button pressed, enabling radio.\n"); |
50 | __clear_bit(DEVICE_DISABLED_RADIO_HW, &rt2x00dev->flags); | 49 | __clear_bit(DEVICE_DISABLED_RADIO_HW, &rt2x00dev->flags); |
51 | retval = rt2x00lib_enable_radio(rt2x00dev); | 50 | retval = rt2x00lib_enable_radio(rt2x00dev); |
52 | } else if (state == RFKILL_STATE_OFF) { | 51 | } else if (state == RFKILL_STATE_SOFT_BLOCKED) { |
53 | INFO(rt2x00dev, "Hardware button pressed, disabling radio.\n"); | 52 | INFO(rt2x00dev, "Hardware button pressed, disabling radio.\n"); |
54 | __set_bit(DEVICE_DISABLED_RADIO_HW, &rt2x00dev->flags); | 53 | __set_bit(DEVICE_DISABLED_RADIO_HW, &rt2x00dev->flags); |
55 | rt2x00lib_disable_radio(rt2x00dev); | 54 | rt2x00lib_disable_radio(rt2x00dev); |
55 | } else { | ||
56 | WARNING(rt2x00dev, "Received unexpected rfkill state %d.\n", | ||
57 | state); | ||
56 | } | 58 | } |
57 | 59 | ||
58 | return retval; | 60 | return retval; |
59 | } | 61 | } |
60 | 62 | ||
61 | static void rt2x00rfkill_poll(struct input_polled_dev *poll_dev) | 63 | static int rt2x00rfkill_get_state(void *data, enum rfkill_state *state) |
62 | { | 64 | { |
63 | struct rt2x00_dev *rt2x00dev = poll_dev->private; | 65 | struct rt2x00_dev *rt2x00dev = data; |
64 | int state = rt2x00dev->ops->lib->rfkill_poll(rt2x00dev); | ||
65 | 66 | ||
66 | if (rt2x00dev->rfkill->state != state) { | 67 | *state = rt2x00dev->rfkill->state; |
67 | input_report_key(poll_dev->input, KEY_WLAN, 1); | 68 | |
68 | input_report_key(poll_dev->input, KEY_WLAN, 0); | 69 | return 0; |
69 | } | 70 | } |
71 | |||
72 | static void rt2x00rfkill_poll(struct work_struct *work) | ||
73 | { | ||
74 | struct rt2x00_dev *rt2x00dev = | ||
75 | container_of(work, struct rt2x00_dev, rfkill_work.work); | ||
76 | int state; | ||
77 | |||
78 | if (!test_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state)) | ||
79 | return; | ||
80 | |||
81 | /* | ||
82 | * rfkill_poll reports 1 when the key has been pressed and the | ||
83 | * radio should be blocked. | ||
84 | */ | ||
85 | state = !rt2x00dev->ops->lib->rfkill_poll(rt2x00dev) ? | ||
86 | RFKILL_STATE_UNBLOCKED : RFKILL_STATE_SOFT_BLOCKED; | ||
87 | |||
88 | rfkill_force_state(rt2x00dev->rfkill, state); | ||
89 | |||
90 | queue_delayed_work(rt2x00dev->hw->workqueue, | ||
91 | &rt2x00dev->rfkill_work, RFKILL_POLL_INTERVAL); | ||
70 | } | 92 | } |
71 | 93 | ||
72 | void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev) | 94 | void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev) |
@@ -80,12 +102,6 @@ void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev) | |||
80 | return; | 102 | return; |
81 | } | 103 | } |
82 | 104 | ||
83 | if (input_register_polled_device(rt2x00dev->poll_dev)) { | ||
84 | ERROR(rt2x00dev, "Failed to register polled device.\n"); | ||
85 | rfkill_unregister(rt2x00dev->rfkill); | ||
86 | return; | ||
87 | } | ||
88 | |||
89 | __set_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state); | 105 | __set_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state); |
90 | 106 | ||
91 | /* | 107 | /* |
@@ -93,7 +109,7 @@ void rt2x00rfkill_register(struct rt2x00_dev *rt2x00dev) | |||
93 | * and correctly sends the signal to the rfkill layer about this | 109 | * and correctly sends the signal to the rfkill layer about this |
94 | * state. | 110 | * state. |
95 | */ | 111 | */ |
96 | rt2x00rfkill_poll(rt2x00dev->poll_dev); | 112 | rt2x00rfkill_poll(&rt2x00dev->rfkill_work.work); |
97 | } | 113 | } |
98 | 114 | ||
99 | void rt2x00rfkill_unregister(struct rt2x00_dev *rt2x00dev) | 115 | void rt2x00rfkill_unregister(struct rt2x00_dev *rt2x00dev) |
@@ -102,38 +118,13 @@ void rt2x00rfkill_unregister(struct rt2x00_dev *rt2x00dev) | |||
102 | !test_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state)) | 118 | !test_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state)) |
103 | return; | 119 | return; |
104 | 120 | ||
105 | input_unregister_polled_device(rt2x00dev->poll_dev); | 121 | cancel_delayed_work_sync(&rt2x00dev->rfkill_work); |
122 | |||
106 | rfkill_unregister(rt2x00dev->rfkill); | 123 | rfkill_unregister(rt2x00dev->rfkill); |
107 | 124 | ||
108 | __clear_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state); | 125 | __clear_bit(RFKILL_STATE_REGISTERED, &rt2x00dev->rfkill_state); |
109 | } | 126 | } |
110 | 127 | ||
111 | static struct input_polled_dev * | ||
112 | rt2x00rfkill_allocate_polldev(struct rt2x00_dev *rt2x00dev) | ||
113 | { | ||
114 | struct input_polled_dev *poll_dev; | ||
115 | |||
116 | poll_dev = input_allocate_polled_device(); | ||
117 | if (!poll_dev) | ||
118 | return NULL; | ||
119 | |||
120 | poll_dev->private = rt2x00dev; | ||
121 | poll_dev->poll = rt2x00rfkill_poll; | ||
122 | poll_dev->poll_interval = RFKILL_POLL_INTERVAL; | ||
123 | |||
124 | poll_dev->input->name = rt2x00dev->ops->name; | ||
125 | poll_dev->input->phys = wiphy_name(rt2x00dev->hw->wiphy); | ||
126 | poll_dev->input->id.bustype = BUS_HOST; | ||
127 | poll_dev->input->id.vendor = 0x1814; | ||
128 | poll_dev->input->id.product = rt2x00dev->chip.rt; | ||
129 | poll_dev->input->id.version = rt2x00dev->chip.rev; | ||
130 | poll_dev->input->dev.parent = wiphy_dev(rt2x00dev->hw->wiphy); | ||
131 | poll_dev->input->evbit[0] = BIT(EV_KEY); | ||
132 | set_bit(KEY_WLAN, poll_dev->input->keybit); | ||
133 | |||
134 | return poll_dev; | ||
135 | } | ||
136 | |||
137 | void rt2x00rfkill_allocate(struct rt2x00_dev *rt2x00dev) | 128 | void rt2x00rfkill_allocate(struct rt2x00_dev *rt2x00dev) |
138 | { | 129 | { |
139 | if (!test_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags)) | 130 | if (!test_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags)) |
@@ -150,14 +141,9 @@ void rt2x00rfkill_allocate(struct rt2x00_dev *rt2x00dev) | |||
150 | rt2x00dev->rfkill->data = rt2x00dev; | 141 | rt2x00dev->rfkill->data = rt2x00dev; |
151 | rt2x00dev->rfkill->state = -1; | 142 | rt2x00dev->rfkill->state = -1; |
152 | rt2x00dev->rfkill->toggle_radio = rt2x00rfkill_toggle_radio; | 143 | rt2x00dev->rfkill->toggle_radio = rt2x00rfkill_toggle_radio; |
144 | rt2x00dev->rfkill->get_state = rt2x00rfkill_get_state; | ||
153 | 145 | ||
154 | rt2x00dev->poll_dev = rt2x00rfkill_allocate_polldev(rt2x00dev); | 146 | INIT_DELAYED_WORK(&rt2x00dev->rfkill_work, rt2x00rfkill_poll); |
155 | if (!rt2x00dev->poll_dev) { | ||
156 | ERROR(rt2x00dev, "Failed to allocate polled device.\n"); | ||
157 | rfkill_free(rt2x00dev->rfkill); | ||
158 | rt2x00dev->rfkill = NULL; | ||
159 | return; | ||
160 | } | ||
161 | 147 | ||
162 | return; | 148 | return; |
163 | } | 149 | } |
@@ -168,32 +154,8 @@ void rt2x00rfkill_free(struct rt2x00_dev *rt2x00dev) | |||
168 | !test_bit(RFKILL_STATE_ALLOCATED, &rt2x00dev->rfkill_state)) | 154 | !test_bit(RFKILL_STATE_ALLOCATED, &rt2x00dev->rfkill_state)) |
169 | return; | 155 | return; |
170 | 156 | ||
171 | input_free_polled_device(rt2x00dev->poll_dev); | 157 | cancel_delayed_work_sync(&rt2x00dev->rfkill_work); |
172 | rt2x00dev->poll_dev = NULL; | ||
173 | 158 | ||
174 | rfkill_free(rt2x00dev->rfkill); | 159 | rfkill_free(rt2x00dev->rfkill); |
175 | rt2x00dev->rfkill = NULL; | 160 | rt2x00dev->rfkill = NULL; |
176 | } | 161 | } |
177 | |||
178 | void rt2x00rfkill_suspend(struct rt2x00_dev *rt2x00dev) | ||
179 | { | ||
180 | if (!test_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags) || | ||
181 | !test_bit(RFKILL_STATE_ALLOCATED, &rt2x00dev->rfkill_state)) | ||
182 | return; | ||
183 | |||
184 | input_free_polled_device(rt2x00dev->poll_dev); | ||
185 | rt2x00dev->poll_dev = NULL; | ||
186 | } | ||
187 | |||
188 | void rt2x00rfkill_resume(struct rt2x00_dev *rt2x00dev) | ||
189 | { | ||
190 | if (!test_bit(CONFIG_SUPPORT_HW_BUTTON, &rt2x00dev->flags) || | ||
191 | !test_bit(RFKILL_STATE_ALLOCATED, &rt2x00dev->rfkill_state)) | ||
192 | return; | ||
193 | |||
194 | rt2x00dev->poll_dev = rt2x00rfkill_allocate_polldev(rt2x00dev); | ||
195 | if (!rt2x00dev->poll_dev) { | ||
196 | ERROR(rt2x00dev, "Failed to allocate polled device.\n"); | ||
197 | return; | ||
198 | } | ||
199 | } | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index e5ceae805b57..83862e7f7aec 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -40,7 +40,7 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev, | |||
40 | void *buffer, const u16 buffer_length, | 40 | void *buffer, const u16 buffer_length, |
41 | const int timeout) | 41 | const int timeout) |
42 | { | 42 | { |
43 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); | 43 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); |
44 | int status; | 44 | int status; |
45 | unsigned int i; | 45 | unsigned int i; |
46 | unsigned int pipe = | 46 | unsigned int pipe = |
@@ -129,17 +129,12 @@ static void rt2x00usb_interrupt_txdone(struct urb *urb) | |||
129 | { | 129 | { |
130 | struct queue_entry *entry = (struct queue_entry *)urb->context; | 130 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
131 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 131 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
132 | struct queue_entry_priv_usb_tx *priv_tx = entry->priv_data; | ||
133 | struct txdone_entry_desc txdesc; | 132 | struct txdone_entry_desc txdesc; |
134 | __le32 *txd = (__le32 *)entry->skb->data; | ||
135 | u32 word; | ||
136 | 133 | ||
137 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || | 134 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || |
138 | !__test_and_clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) | 135 | !test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) |
139 | return; | 136 | return; |
140 | 137 | ||
141 | rt2x00_desc_read(txd, 0, &word); | ||
142 | |||
143 | /* | 138 | /* |
144 | * Remove the descriptor data from the buffer. | 139 | * Remove the descriptor data from the buffer. |
145 | */ | 140 | */ |
@@ -147,128 +142,116 @@ static void rt2x00usb_interrupt_txdone(struct urb *urb) | |||
147 | 142 | ||
148 | /* | 143 | /* |
149 | * Obtain the status about this packet. | 144 | * Obtain the status about this packet. |
145 | * Note that when the status is 0 it does not mean the | ||
146 | * frame was send out correctly. It only means the frame | ||
147 | * was succesfully pushed to the hardware, we have no | ||
148 | * way to determine the transmission status right now. | ||
149 | * (Only indirectly by looking at the failed TX counters | ||
150 | * in the register). | ||
150 | */ | 151 | */ |
151 | txdesc.status = !urb->status ? TX_SUCCESS : TX_FAIL_RETRY; | 152 | if (!urb->status) |
153 | __set_bit(TXDONE_UNKNOWN, &txdesc.flags); | ||
154 | else | ||
155 | __set_bit(TXDONE_FAILURE, &txdesc.flags); | ||
152 | txdesc.retry = 0; | 156 | txdesc.retry = 0; |
153 | txdesc.control = &priv_tx->control; | ||
154 | 157 | ||
155 | rt2x00lib_txdone(entry, &txdesc); | 158 | rt2x00lib_txdone(entry, &txdesc); |
156 | |||
157 | /* | ||
158 | * Make this entry available for reuse. | ||
159 | */ | ||
160 | entry->flags = 0; | ||
161 | rt2x00queue_index_inc(entry->queue, Q_INDEX_DONE); | ||
162 | |||
163 | /* | ||
164 | * If the data queue was full before the txdone handler | ||
165 | * we must make sure the packet queue in the mac80211 stack | ||
166 | * is reenabled when the txdone handler has finished. | ||
167 | */ | ||
168 | if (!rt2x00queue_full(entry->queue)) | ||
169 | ieee80211_wake_queue(rt2x00dev->hw, priv_tx->control.queue); | ||
170 | } | 159 | } |
171 | 160 | ||
172 | int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, | 161 | int rt2x00usb_write_tx_data(struct queue_entry *entry) |
173 | struct data_queue *queue, struct sk_buff *skb, | ||
174 | struct ieee80211_tx_control *control) | ||
175 | { | 162 | { |
176 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); | 163 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
177 | struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX); | 164 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); |
178 | struct queue_entry_priv_usb_tx *priv_tx = entry->priv_data; | 165 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
179 | struct skb_frame_desc *skbdesc; | 166 | struct skb_frame_desc *skbdesc; |
180 | u32 length; | 167 | u32 length; |
181 | 168 | ||
182 | if (rt2x00queue_full(queue)) | ||
183 | return -EINVAL; | ||
184 | |||
185 | if (test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) { | ||
186 | ERROR(rt2x00dev, | ||
187 | "Arrived at non-free entry in the non-full queue %d.\n" | ||
188 | "Please file bug report to %s.\n", | ||
189 | control->queue, DRV_PROJECT); | ||
190 | return -EINVAL; | ||
191 | } | ||
192 | |||
193 | /* | 169 | /* |
194 | * Add the descriptor in front of the skb. | 170 | * Add the descriptor in front of the skb. |
195 | */ | 171 | */ |
196 | skb_push(skb, queue->desc_size); | 172 | skb_push(entry->skb, entry->queue->desc_size); |
197 | memset(skb->data, 0, queue->desc_size); | 173 | memset(entry->skb->data, 0, entry->queue->desc_size); |
198 | 174 | ||
199 | /* | 175 | /* |
200 | * Fill in skb descriptor | 176 | * Fill in skb descriptor |
201 | */ | 177 | */ |
202 | skbdesc = get_skb_frame_desc(skb); | 178 | skbdesc = get_skb_frame_desc(entry->skb); |
203 | skbdesc->data = skb->data + queue->desc_size; | 179 | skbdesc->desc = entry->skb->data; |
204 | skbdesc->data_len = skb->len - queue->desc_size; | 180 | skbdesc->desc_len = entry->queue->desc_size; |
205 | skbdesc->desc = skb->data; | ||
206 | skbdesc->desc_len = queue->desc_size; | ||
207 | skbdesc->entry = entry; | ||
208 | |||
209 | memcpy(&priv_tx->control, control, sizeof(priv_tx->control)); | ||
210 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
211 | 181 | ||
212 | /* | 182 | /* |
213 | * USB devices cannot blindly pass the skb->len as the | 183 | * USB devices cannot blindly pass the skb->len as the |
214 | * length of the data to usb_fill_bulk_urb. Pass the skb | 184 | * length of the data to usb_fill_bulk_urb. Pass the skb |
215 | * to the driver to determine what the length should be. | 185 | * to the driver to determine what the length should be. |
216 | */ | 186 | */ |
217 | length = rt2x00dev->ops->lib->get_tx_data_len(rt2x00dev, skb); | 187 | length = rt2x00dev->ops->lib->get_tx_data_len(rt2x00dev, entry->skb); |
218 | |||
219 | /* | ||
220 | * Initialize URB and send the frame to the device. | ||
221 | */ | ||
222 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); | ||
223 | usb_fill_bulk_urb(priv_tx->urb, usb_dev, usb_sndbulkpipe(usb_dev, 1), | ||
224 | skb->data, length, rt2x00usb_interrupt_txdone, entry); | ||
225 | usb_submit_urb(priv_tx->urb, GFP_ATOMIC); | ||
226 | 188 | ||
227 | rt2x00queue_index_inc(queue, Q_INDEX); | 189 | usb_fill_bulk_urb(entry_priv->urb, usb_dev, |
190 | usb_sndbulkpipe(usb_dev, 1), | ||
191 | entry->skb->data, length, | ||
192 | rt2x00usb_interrupt_txdone, entry); | ||
228 | 193 | ||
229 | return 0; | 194 | return 0; |
230 | } | 195 | } |
231 | EXPORT_SYMBOL_GPL(rt2x00usb_write_tx_data); | 196 | EXPORT_SYMBOL_GPL(rt2x00usb_write_tx_data); |
232 | 197 | ||
233 | /* | 198 | static inline void rt2x00usb_kick_tx_entry(struct queue_entry *entry) |
234 | * RX data handlers. | ||
235 | */ | ||
236 | static struct sk_buff* rt2x00usb_alloc_rxskb(struct data_queue *queue) | ||
237 | { | 199 | { |
238 | struct sk_buff *skb; | 200 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
239 | unsigned int frame_size; | 201 | |
202 | if (__test_and_clear_bit(ENTRY_DATA_PENDING, &entry->flags)) | ||
203 | usb_submit_urb(entry_priv->urb, GFP_ATOMIC); | ||
204 | } | ||
205 | |||
206 | void rt2x00usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | ||
207 | const enum data_queue_qid qid) | ||
208 | { | ||
209 | struct data_queue *queue = rt2x00queue_get_queue(rt2x00dev, qid); | ||
210 | unsigned long irqflags; | ||
211 | unsigned int index; | ||
212 | unsigned int index_done; | ||
213 | unsigned int i; | ||
240 | 214 | ||
241 | /* | 215 | /* |
242 | * As alignment we use 2 and not NET_IP_ALIGN because we need | 216 | * Only protect the range we are going to loop over, |
243 | * to be sure we have 2 bytes room in the head. (NET_IP_ALIGN | 217 | * if during our loop a extra entry is set to pending |
244 | * can be 0 on some hardware). We use these 2 bytes for frame | 218 | * it should not be kicked during this run, since it |
245 | * alignment later, we assume that the chance that | 219 | * is part of another TX operation. |
246 | * header_size % 4 == 2 is bigger then header_size % 2 == 0 | ||
247 | * and thus optimize alignment by reserving the 2 bytes in | ||
248 | * advance. | ||
249 | */ | 220 | */ |
250 | frame_size = queue->data_size + queue->desc_size; | 221 | spin_lock_irqsave(&queue->lock, irqflags); |
251 | skb = dev_alloc_skb(queue->desc_size + frame_size + 2); | 222 | index = queue->index[Q_INDEX]; |
252 | if (!skb) | 223 | index_done = queue->index[Q_INDEX_DONE]; |
253 | return NULL; | 224 | spin_unlock_irqrestore(&queue->lock, irqflags); |
254 | |||
255 | skb_reserve(skb, queue->desc_size + 2); | ||
256 | skb_put(skb, frame_size); | ||
257 | 225 | ||
258 | return skb; | 226 | /* |
227 | * Start from the TX done pointer, this guarentees that we will | ||
228 | * send out all frames in the correct order. | ||
229 | */ | ||
230 | if (index_done < index) { | ||
231 | for (i = index_done; i < index; i++) | ||
232 | rt2x00usb_kick_tx_entry(&queue->entries[i]); | ||
233 | } else { | ||
234 | for (i = index_done; i < queue->limit; i++) | ||
235 | rt2x00usb_kick_tx_entry(&queue->entries[i]); | ||
236 | |||
237 | for (i = 0; i < index; i++) | ||
238 | rt2x00usb_kick_tx_entry(&queue->entries[i]); | ||
239 | } | ||
259 | } | 240 | } |
241 | EXPORT_SYMBOL_GPL(rt2x00usb_kick_tx_queue); | ||
260 | 242 | ||
243 | /* | ||
244 | * RX data handlers. | ||
245 | */ | ||
261 | static void rt2x00usb_interrupt_rxdone(struct urb *urb) | 246 | static void rt2x00usb_interrupt_rxdone(struct urb *urb) |
262 | { | 247 | { |
263 | struct queue_entry *entry = (struct queue_entry *)urb->context; | 248 | struct queue_entry *entry = (struct queue_entry *)urb->context; |
264 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | 249 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; |
265 | struct sk_buff *skb; | 250 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
266 | struct skb_frame_desc *skbdesc; | 251 | u8 rxd[32]; |
267 | struct rxdone_entry_desc rxdesc; | ||
268 | int header_size; | ||
269 | 252 | ||
270 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || | 253 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) || |
271 | !test_and_clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) | 254 | !test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) |
272 | return; | 255 | return; |
273 | 256 | ||
274 | /* | 257 | /* |
@@ -276,61 +259,22 @@ static void rt2x00usb_interrupt_rxdone(struct urb *urb) | |||
276 | * to be actually valid, or if the urb is signaling | 259 | * to be actually valid, or if the urb is signaling |
277 | * a problem. | 260 | * a problem. |
278 | */ | 261 | */ |
279 | if (urb->actual_length < entry->queue->desc_size || urb->status) | 262 | if (urb->actual_length < entry->queue->desc_size || urb->status) { |
280 | goto skip_entry; | 263 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); |
281 | 264 | usb_submit_urb(urb, GFP_ATOMIC); | |
282 | /* | 265 | return; |
283 | * Fill in skb descriptor | ||
284 | */ | ||
285 | skbdesc = get_skb_frame_desc(entry->skb); | ||
286 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
287 | skbdesc->entry = entry; | ||
288 | |||
289 | memset(&rxdesc, 0, sizeof(rxdesc)); | ||
290 | rt2x00dev->ops->lib->fill_rxdone(entry, &rxdesc); | ||
291 | |||
292 | /* | ||
293 | * The data behind the ieee80211 header must be | ||
294 | * aligned on a 4 byte boundary. | ||
295 | */ | ||
296 | header_size = ieee80211_get_hdrlen_from_skb(entry->skb); | ||
297 | if (header_size % 4 == 0) { | ||
298 | skb_push(entry->skb, 2); | ||
299 | memmove(entry->skb->data, entry->skb->data + 2, | ||
300 | entry->skb->len - 2); | ||
301 | skbdesc->data = entry->skb->data; | ||
302 | skb_trim(entry->skb,entry->skb->len - 2); | ||
303 | } | 266 | } |
304 | 267 | ||
305 | /* | 268 | /* |
306 | * Allocate a new sk buffer to replace the current one. | 269 | * Fill in desc fields of the skb descriptor |
307 | * If allocation fails, we should drop the current frame | ||
308 | * so we can recycle the existing sk buffer for the new frame. | ||
309 | */ | 270 | */ |
310 | skb = rt2x00usb_alloc_rxskb(entry->queue); | 271 | skbdesc->desc = rxd; |
311 | if (!skb) | 272 | skbdesc->desc_len = entry->queue->desc_size; |
312 | goto skip_entry; | ||
313 | 273 | ||
314 | /* | 274 | /* |
315 | * Send the frame to rt2x00lib for further processing. | 275 | * Send the frame to rt2x00lib for further processing. |
316 | */ | 276 | */ |
317 | rt2x00lib_rxdone(entry, &rxdesc); | 277 | rt2x00lib_rxdone(rt2x00dev, entry); |
318 | |||
319 | /* | ||
320 | * Replace current entry's skb with the newly allocated one, | ||
321 | * and reinitialize the urb. | ||
322 | */ | ||
323 | entry->skb = skb; | ||
324 | urb->transfer_buffer = entry->skb->data; | ||
325 | urb->transfer_buffer_length = entry->skb->len; | ||
326 | |||
327 | skip_entry: | ||
328 | if (test_bit(DEVICE_ENABLED_RADIO, &entry->queue->rt2x00dev->flags)) { | ||
329 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); | ||
330 | usb_submit_urb(urb, GFP_ATOMIC); | ||
331 | } | ||
332 | |||
333 | rt2x00queue_index_inc(entry->queue, Q_INDEX); | ||
334 | } | 278 | } |
335 | 279 | ||
336 | /* | 280 | /* |
@@ -338,27 +282,21 @@ skip_entry: | |||
338 | */ | 282 | */ |
339 | void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev) | 283 | void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev) |
340 | { | 284 | { |
341 | struct queue_entry_priv_usb_rx *priv_rx; | 285 | struct queue_entry_priv_usb *entry_priv; |
342 | struct queue_entry_priv_usb_tx *priv_tx; | 286 | struct queue_entry_priv_usb_bcn *bcn_priv; |
343 | struct queue_entry_priv_usb_bcn *priv_bcn; | ||
344 | struct data_queue *queue; | 287 | struct data_queue *queue; |
345 | unsigned int i; | 288 | unsigned int i; |
346 | 289 | ||
347 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_RX_CONTROL, 0x0000, 0x0000, | 290 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_RX_CONTROL, 0, 0, |
348 | REGISTER_TIMEOUT); | 291 | REGISTER_TIMEOUT); |
349 | 292 | ||
350 | /* | 293 | /* |
351 | * Cancel all queues. | 294 | * Cancel all queues. |
352 | */ | 295 | */ |
353 | for (i = 0; i < rt2x00dev->rx->limit; i++) { | 296 | queue_for_each(rt2x00dev, queue) { |
354 | priv_rx = rt2x00dev->rx->entries[i].priv_data; | ||
355 | usb_kill_urb(priv_rx->urb); | ||
356 | } | ||
357 | |||
358 | tx_queue_for_each(rt2x00dev, queue) { | ||
359 | for (i = 0; i < queue->limit; i++) { | 297 | for (i = 0; i < queue->limit; i++) { |
360 | priv_tx = queue->entries[i].priv_data; | 298 | entry_priv = queue->entries[i].priv_data; |
361 | usb_kill_urb(priv_tx->urb); | 299 | usb_kill_urb(entry_priv->urb); |
362 | } | 300 | } |
363 | } | 301 | } |
364 | 302 | ||
@@ -369,19 +307,9 @@ void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev) | |||
369 | return; | 307 | return; |
370 | 308 | ||
371 | for (i = 0; i < rt2x00dev->bcn->limit; i++) { | 309 | for (i = 0; i < rt2x00dev->bcn->limit; i++) { |
372 | priv_bcn = rt2x00dev->bcn->entries[i].priv_data; | 310 | bcn_priv = rt2x00dev->bcn->entries[i].priv_data; |
373 | usb_kill_urb(priv_bcn->urb); | 311 | if (bcn_priv->guardian_urb) |
374 | 312 | usb_kill_urb(bcn_priv->guardian_urb); | |
375 | if (priv_bcn->guardian_urb) | ||
376 | usb_kill_urb(priv_bcn->guardian_urb); | ||
377 | } | ||
378 | |||
379 | if (!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) | ||
380 | return; | ||
381 | |||
382 | for (i = 0; i < rt2x00dev->bcn[1].limit; i++) { | ||
383 | priv_tx = rt2x00dev->bcn[1].entries[i].priv_data; | ||
384 | usb_kill_urb(priv_tx->urb); | ||
385 | } | 313 | } |
386 | } | 314 | } |
387 | EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio); | 315 | EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio); |
@@ -392,16 +320,16 @@ EXPORT_SYMBOL_GPL(rt2x00usb_disable_radio); | |||
392 | void rt2x00usb_init_rxentry(struct rt2x00_dev *rt2x00dev, | 320 | void rt2x00usb_init_rxentry(struct rt2x00_dev *rt2x00dev, |
393 | struct queue_entry *entry) | 321 | struct queue_entry *entry) |
394 | { | 322 | { |
395 | struct usb_device *usb_dev = rt2x00dev_usb_dev(rt2x00dev); | 323 | struct usb_device *usb_dev = to_usb_device_intf(rt2x00dev->dev); |
396 | struct queue_entry_priv_usb_rx *priv_rx = entry->priv_data; | 324 | struct queue_entry_priv_usb *entry_priv = entry->priv_data; |
397 | 325 | ||
398 | usb_fill_bulk_urb(priv_rx->urb, usb_dev, | 326 | usb_fill_bulk_urb(entry_priv->urb, usb_dev, |
399 | usb_rcvbulkpipe(usb_dev, 1), | 327 | usb_rcvbulkpipe(usb_dev, 1), |
400 | entry->skb->data, entry->skb->len, | 328 | entry->skb->data, entry->skb->len, |
401 | rt2x00usb_interrupt_rxdone, entry); | 329 | rt2x00usb_interrupt_rxdone, entry); |
402 | 330 | ||
403 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); | 331 | __set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags); |
404 | usb_submit_urb(priv_rx->urb, GFP_ATOMIC); | 332 | usb_submit_urb(entry_priv->urb, GFP_ATOMIC); |
405 | } | 333 | } |
406 | EXPORT_SYMBOL_GPL(rt2x00usb_init_rxentry); | 334 | EXPORT_SYMBOL_GPL(rt2x00usb_init_rxentry); |
407 | 335 | ||
@@ -415,38 +343,31 @@ EXPORT_SYMBOL_GPL(rt2x00usb_init_txentry); | |||
415 | static int rt2x00usb_alloc_urb(struct rt2x00_dev *rt2x00dev, | 343 | static int rt2x00usb_alloc_urb(struct rt2x00_dev *rt2x00dev, |
416 | struct data_queue *queue) | 344 | struct data_queue *queue) |
417 | { | 345 | { |
418 | struct queue_entry_priv_usb_rx *priv_rx; | 346 | struct queue_entry_priv_usb *entry_priv; |
419 | struct queue_entry_priv_usb_tx *priv_tx; | 347 | struct queue_entry_priv_usb_bcn *bcn_priv; |
420 | struct queue_entry_priv_usb_bcn *priv_bcn; | ||
421 | struct urb *urb; | ||
422 | unsigned int guardian = | ||
423 | test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | ||
424 | unsigned int i; | 348 | unsigned int i; |
425 | 349 | ||
350 | for (i = 0; i < queue->limit; i++) { | ||
351 | entry_priv = queue->entries[i].priv_data; | ||
352 | entry_priv->urb = usb_alloc_urb(0, GFP_KERNEL); | ||
353 | if (!entry_priv->urb) | ||
354 | return -ENOMEM; | ||
355 | } | ||
356 | |||
426 | /* | 357 | /* |
427 | * Allocate the URB's | 358 | * If this is not the beacon queue or |
359 | * no guardian byte was required for the beacon, | ||
360 | * then we are done. | ||
428 | */ | 361 | */ |
362 | if (rt2x00dev->bcn != queue || | ||
363 | !test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags)) | ||
364 | return 0; | ||
365 | |||
429 | for (i = 0; i < queue->limit; i++) { | 366 | for (i = 0; i < queue->limit; i++) { |
430 | urb = usb_alloc_urb(0, GFP_KERNEL); | 367 | bcn_priv = queue->entries[i].priv_data; |
431 | if (!urb) | 368 | bcn_priv->guardian_urb = usb_alloc_urb(0, GFP_KERNEL); |
369 | if (!bcn_priv->guardian_urb) | ||
432 | return -ENOMEM; | 370 | return -ENOMEM; |
433 | |||
434 | if (queue->qid == QID_RX) { | ||
435 | priv_rx = queue->entries[i].priv_data; | ||
436 | priv_rx->urb = urb; | ||
437 | } else if (queue->qid == QID_MGMT && guardian) { | ||
438 | priv_bcn = queue->entries[i].priv_data; | ||
439 | priv_bcn->urb = urb; | ||
440 | |||
441 | urb = usb_alloc_urb(0, GFP_KERNEL); | ||
442 | if (!urb) | ||
443 | return -ENOMEM; | ||
444 | |||
445 | priv_bcn->guardian_urb = urb; | ||
446 | } else { | ||
447 | priv_tx = queue->entries[i].priv_data; | ||
448 | priv_tx->urb = urb; | ||
449 | } | ||
450 | } | 371 | } |
451 | 372 | ||
452 | return 0; | 373 | return 0; |
@@ -455,47 +376,39 @@ static int rt2x00usb_alloc_urb(struct rt2x00_dev *rt2x00dev, | |||
455 | static void rt2x00usb_free_urb(struct rt2x00_dev *rt2x00dev, | 376 | static void rt2x00usb_free_urb(struct rt2x00_dev *rt2x00dev, |
456 | struct data_queue *queue) | 377 | struct data_queue *queue) |
457 | { | 378 | { |
458 | struct queue_entry_priv_usb_rx *priv_rx; | 379 | struct queue_entry_priv_usb *entry_priv; |
459 | struct queue_entry_priv_usb_tx *priv_tx; | 380 | struct queue_entry_priv_usb_bcn *bcn_priv; |
460 | struct queue_entry_priv_usb_bcn *priv_bcn; | ||
461 | struct urb *urb; | ||
462 | unsigned int guardian = | ||
463 | test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags); | ||
464 | unsigned int i; | 381 | unsigned int i; |
465 | 382 | ||
466 | if (!queue->entries) | 383 | if (!queue->entries) |
467 | return; | 384 | return; |
468 | 385 | ||
469 | for (i = 0; i < queue->limit; i++) { | 386 | for (i = 0; i < queue->limit; i++) { |
470 | if (queue->qid == QID_RX) { | 387 | entry_priv = queue->entries[i].priv_data; |
471 | priv_rx = queue->entries[i].priv_data; | 388 | usb_kill_urb(entry_priv->urb); |
472 | urb = priv_rx->urb; | 389 | usb_free_urb(entry_priv->urb); |
473 | } else if (queue->qid == QID_MGMT && guardian) { | 390 | } |
474 | priv_bcn = queue->entries[i].priv_data; | ||
475 | |||
476 | usb_kill_urb(priv_bcn->guardian_urb); | ||
477 | usb_free_urb(priv_bcn->guardian_urb); | ||
478 | |||
479 | urb = priv_bcn->urb; | ||
480 | } else { | ||
481 | priv_tx = queue->entries[i].priv_data; | ||
482 | urb = priv_tx->urb; | ||
483 | } | ||
484 | 391 | ||
485 | usb_kill_urb(urb); | 392 | /* |
486 | usb_free_urb(urb); | 393 | * If this is not the beacon queue or |
487 | if (queue->entries[i].skb) | 394 | * no guardian byte was required for the beacon, |
488 | kfree_skb(queue->entries[i].skb); | 395 | * then we are done. |
396 | */ | ||
397 | if (rt2x00dev->bcn != queue || | ||
398 | !test_bit(DRIVER_REQUIRE_BEACON_GUARD, &rt2x00dev->flags)) | ||
399 | return; | ||
400 | |||
401 | for (i = 0; i < queue->limit; i++) { | ||
402 | bcn_priv = queue->entries[i].priv_data; | ||
403 | usb_kill_urb(bcn_priv->guardian_urb); | ||
404 | usb_free_urb(bcn_priv->guardian_urb); | ||
489 | } | 405 | } |
490 | } | 406 | } |
491 | 407 | ||
492 | int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev) | 408 | int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev) |
493 | { | 409 | { |
494 | struct data_queue *queue; | 410 | struct data_queue *queue; |
495 | struct sk_buff *skb; | 411 | int status; |
496 | unsigned int entry_size; | ||
497 | unsigned int i; | ||
498 | int uninitialized_var(status); | ||
499 | 412 | ||
500 | /* | 413 | /* |
501 | * Allocate DMA | 414 | * Allocate DMA |
@@ -506,18 +419,6 @@ int rt2x00usb_initialize(struct rt2x00_dev *rt2x00dev) | |||
506 | goto exit; | 419 | goto exit; |
507 | } | 420 | } |
508 | 421 | ||
509 | /* | ||
510 | * For the RX queue, skb's should be allocated. | ||
511 | */ | ||
512 | entry_size = rt2x00dev->rx->data_size + rt2x00dev->rx->desc_size; | ||
513 | for (i = 0; i < rt2x00dev->rx->limit; i++) { | ||
514 | skb = rt2x00usb_alloc_rxskb(rt2x00dev->rx); | ||
515 | if (!skb) | ||
516 | goto exit; | ||
517 | |||
518 | rt2x00dev->rx->entries[i].skb = skb; | ||
519 | } | ||
520 | |||
521 | return 0; | 422 | return 0; |
522 | 423 | ||
523 | exit: | 424 | exit: |
@@ -596,7 +497,7 @@ int rt2x00usb_probe(struct usb_interface *usb_intf, | |||
596 | usb_set_intfdata(usb_intf, hw); | 497 | usb_set_intfdata(usb_intf, hw); |
597 | 498 | ||
598 | rt2x00dev = hw->priv; | 499 | rt2x00dev = hw->priv; |
599 | rt2x00dev->dev = usb_intf; | 500 | rt2x00dev->dev = &usb_intf->dev; |
600 | rt2x00dev->ops = ops; | 501 | rt2x00dev->ops = ops; |
601 | rt2x00dev->hw = hw; | 502 | rt2x00dev->hw = hw; |
602 | mutex_init(&rt2x00dev->usb_cache_mutex); | 503 | mutex_init(&rt2x00dev->usb_cache_mutex); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.h b/drivers/net/wireless/rt2x00/rt2x00usb.h index 11e55180cbaf..aad794adf52c 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.h +++ b/drivers/net/wireless/rt2x00/rt2x00usb.h | |||
@@ -26,6 +26,12 @@ | |||
26 | #ifndef RT2X00USB_H | 26 | #ifndef RT2X00USB_H |
27 | #define RT2X00USB_H | 27 | #define RT2X00USB_H |
28 | 28 | ||
29 | #define to_usb_device_intf(d) \ | ||
30 | ({ \ | ||
31 | struct usb_interface *intf = to_usb_interface(d); \ | ||
32 | interface_to_usbdev(intf); \ | ||
33 | }) | ||
34 | |||
29 | /* | 35 | /* |
30 | * This variable should be used with the | 36 | * This variable should be used with the |
31 | * usb_driver structure initialization. | 37 | * usb_driver structure initialization. |
@@ -47,6 +53,20 @@ | |||
47 | #define REGISTER_TIMEOUT 500 | 53 | #define REGISTER_TIMEOUT 500 |
48 | #define REGISTER_TIMEOUT_FIRMWARE 1000 | 54 | #define REGISTER_TIMEOUT_FIRMWARE 1000 |
49 | 55 | ||
56 | /** | ||
57 | * REGISTER_TIMEOUT16 - Determine the timeout for 16bit register access | ||
58 | * @__datalen: Data length | ||
59 | */ | ||
60 | #define REGISTER_TIMEOUT16(__datalen) \ | ||
61 | ( REGISTER_TIMEOUT * ((__datalen) / sizeof(u16)) ) | ||
62 | |||
63 | /** | ||
64 | * REGISTER_TIMEOUT32 - Determine the timeout for 32bit register access | ||
65 | * @__datalen: Data length | ||
66 | */ | ||
67 | #define REGISTER_TIMEOUT32(__datalen) \ | ||
68 | ( REGISTER_TIMEOUT * ((__datalen) / sizeof(u32)) ) | ||
69 | |||
50 | /* | 70 | /* |
51 | * Cache size | 71 | * Cache size |
52 | */ | 72 | */ |
@@ -185,13 +205,12 @@ static inline int rt2x00usb_vendor_request_sw(struct rt2x00_dev *rt2x00dev, | |||
185 | * kmalloc for correct handling inside the kernel USB layer. | 205 | * kmalloc for correct handling inside the kernel USB layer. |
186 | */ | 206 | */ |
187 | static inline int rt2x00usb_eeprom_read(struct rt2x00_dev *rt2x00dev, | 207 | static inline int rt2x00usb_eeprom_read(struct rt2x00_dev *rt2x00dev, |
188 | __le16 *eeprom, const u16 lenght) | 208 | __le16 *eeprom, const u16 length) |
189 | { | 209 | { |
190 | int timeout = REGISTER_TIMEOUT * (lenght / sizeof(u16)); | ||
191 | |||
192 | return rt2x00usb_vendor_request(rt2x00dev, USB_EEPROM_READ, | 210 | return rt2x00usb_vendor_request(rt2x00dev, USB_EEPROM_READ, |
193 | USB_VENDOR_REQUEST_IN, 0, 0, | 211 | USB_VENDOR_REQUEST_IN, 0, 0, |
194 | eeprom, lenght, timeout); | 212 | eeprom, length, |
213 | REGISTER_TIMEOUT16(length)); | ||
195 | } | 214 | } |
196 | 215 | ||
197 | /* | 216 | /* |
@@ -199,55 +218,53 @@ static inline int rt2x00usb_eeprom_read(struct rt2x00_dev *rt2x00dev, | |||
199 | */ | 218 | */ |
200 | void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev); | 219 | void rt2x00usb_disable_radio(struct rt2x00_dev *rt2x00dev); |
201 | 220 | ||
202 | /* | ||
203 | * TX data handlers. | ||
204 | */ | ||
205 | int rt2x00usb_write_tx_data(struct rt2x00_dev *rt2x00dev, | ||
206 | struct data_queue *queue, struct sk_buff *skb, | ||
207 | struct ieee80211_tx_control *control); | ||
208 | |||
209 | /** | 221 | /** |
210 | * struct queue_entry_priv_usb_rx: Per RX entry USB specific information | 222 | * rt2x00usb_write_tx_data - Initialize URB for TX operation |
223 | * @entry: The entry where the frame is located | ||
211 | * | 224 | * |
212 | * @urb: Urb structure used for device communication. | 225 | * This function will initialize the URB and skb descriptor |
226 | * to prepare the entry for the actual TX operation. | ||
213 | */ | 227 | */ |
214 | struct queue_entry_priv_usb_rx { | 228 | int rt2x00usb_write_tx_data(struct queue_entry *entry); |
215 | struct urb *urb; | ||
216 | }; | ||
217 | 229 | ||
218 | /** | 230 | /** |
219 | * struct queue_entry_priv_usb_tx: Per TX entry USB specific information | 231 | * struct queue_entry_priv_usb: Per entry USB specific information |
220 | * | 232 | * |
221 | * @urb: Urb structure used for device communication. | 233 | * @urb: Urb structure used for device communication. |
222 | * @control: mac80211 control structure used to transmit data. | ||
223 | */ | 234 | */ |
224 | struct queue_entry_priv_usb_tx { | 235 | struct queue_entry_priv_usb { |
225 | struct urb *urb; | 236 | struct urb *urb; |
226 | |||
227 | struct ieee80211_tx_control control; | ||
228 | }; | 237 | }; |
229 | 238 | ||
230 | /** | 239 | /** |
231 | * struct queue_entry_priv_usb_tx: Per TX entry USB specific information | 240 | * struct queue_entry_priv_usb_bcn: Per TX entry USB specific information |
232 | * | 241 | * |
233 | * The first section should match &struct queue_entry_priv_usb_tx exactly. | 242 | * The first section should match &struct queue_entry_priv_usb exactly. |
234 | * rt2500usb can use this structure to send a guardian byte when working | 243 | * rt2500usb can use this structure to send a guardian byte when working |
235 | * with beacons. | 244 | * with beacons. |
236 | * | 245 | * |
237 | * @urb: Urb structure used for device communication. | 246 | * @urb: Urb structure used for device communication. |
238 | * @control: mac80211 control structure used to transmit data. | ||
239 | * @guardian_data: Set to 0, used for sending the guardian data. | 247 | * @guardian_data: Set to 0, used for sending the guardian data. |
240 | * @guardian_urb: Urb structure used to send the guardian data. | 248 | * @guardian_urb: Urb structure used to send the guardian data. |
241 | */ | 249 | */ |
242 | struct queue_entry_priv_usb_bcn { | 250 | struct queue_entry_priv_usb_bcn { |
243 | struct urb *urb; | 251 | struct urb *urb; |
244 | 252 | ||
245 | struct ieee80211_tx_control control; | ||
246 | |||
247 | unsigned int guardian_data; | 253 | unsigned int guardian_data; |
248 | struct urb *guardian_urb; | 254 | struct urb *guardian_urb; |
249 | }; | 255 | }; |
250 | 256 | ||
257 | /** | ||
258 | * rt2x00usb_kick_tx_queue - Kick data queue | ||
259 | * @rt2x00dev: Pointer to &struct rt2x00_dev | ||
260 | * @qid: Data queue to kick | ||
261 | * | ||
262 | * This will walk through all entries of the queue and push all pending | ||
263 | * frames to the hardware as a single burst. | ||
264 | */ | ||
265 | void rt2x00usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | ||
266 | const enum data_queue_qid qid); | ||
267 | |||
251 | /* | 268 | /* |
252 | * Device initialization handlers. | 269 | * Device initialization handlers. |
253 | */ | 270 | */ |
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index 580f90b63de7..f7c1f92c1448 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c | |||
@@ -330,6 +330,17 @@ static int rt61pci_blink_set(struct led_classdev *led_cdev, | |||
330 | 330 | ||
331 | return 0; | 331 | return 0; |
332 | } | 332 | } |
333 | |||
334 | static void rt61pci_init_led(struct rt2x00_dev *rt2x00dev, | ||
335 | struct rt2x00_led *led, | ||
336 | enum led_type type) | ||
337 | { | ||
338 | led->rt2x00dev = rt2x00dev; | ||
339 | led->type = type; | ||
340 | led->led_dev.brightness_set = rt61pci_brightness_set; | ||
341 | led->led_dev.blink_set = rt61pci_blink_set; | ||
342 | led->flags = LED_INITIALIZED; | ||
343 | } | ||
333 | #endif /* CONFIG_RT61PCI_LEDS */ | 344 | #endif /* CONFIG_RT61PCI_LEDS */ |
334 | 345 | ||
335 | /* | 346 | /* |
@@ -1018,49 +1029,35 @@ static int rt61pci_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
1018 | static void rt61pci_init_rxentry(struct rt2x00_dev *rt2x00dev, | 1029 | static void rt61pci_init_rxentry(struct rt2x00_dev *rt2x00dev, |
1019 | struct queue_entry *entry) | 1030 | struct queue_entry *entry) |
1020 | { | 1031 | { |
1021 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; | 1032 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
1033 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1022 | u32 word; | 1034 | u32 word; |
1023 | 1035 | ||
1024 | rt2x00_desc_read(priv_rx->desc, 5, &word); | 1036 | rt2x00_desc_read(entry_priv->desc, 5, &word); |
1025 | rt2x00_set_field32(&word, RXD_W5_BUFFER_PHYSICAL_ADDRESS, | 1037 | rt2x00_set_field32(&word, RXD_W5_BUFFER_PHYSICAL_ADDRESS, |
1026 | priv_rx->data_dma); | 1038 | skbdesc->skb_dma); |
1027 | rt2x00_desc_write(priv_rx->desc, 5, word); | 1039 | rt2x00_desc_write(entry_priv->desc, 5, word); |
1028 | 1040 | ||
1029 | rt2x00_desc_read(priv_rx->desc, 0, &word); | 1041 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
1030 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); | 1042 | rt2x00_set_field32(&word, RXD_W0_OWNER_NIC, 1); |
1031 | rt2x00_desc_write(priv_rx->desc, 0, word); | 1043 | rt2x00_desc_write(entry_priv->desc, 0, word); |
1032 | } | 1044 | } |
1033 | 1045 | ||
1034 | static void rt61pci_init_txentry(struct rt2x00_dev *rt2x00dev, | 1046 | static void rt61pci_init_txentry(struct rt2x00_dev *rt2x00dev, |
1035 | struct queue_entry *entry) | 1047 | struct queue_entry *entry) |
1036 | { | 1048 | { |
1037 | struct queue_entry_priv_pci_tx *priv_tx = entry->priv_data; | 1049 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
1038 | u32 word; | 1050 | u32 word; |
1039 | 1051 | ||
1040 | rt2x00_desc_read(priv_tx->desc, 1, &word); | 1052 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
1041 | rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1); | ||
1042 | rt2x00_desc_write(priv_tx->desc, 1, word); | ||
1043 | |||
1044 | rt2x00_desc_read(priv_tx->desc, 5, &word); | ||
1045 | rt2x00_set_field32(&word, TXD_W5_PID_TYPE, entry->queue->qid); | ||
1046 | rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE, entry->entry_idx); | ||
1047 | rt2x00_desc_write(priv_tx->desc, 5, word); | ||
1048 | |||
1049 | rt2x00_desc_read(priv_tx->desc, 6, &word); | ||
1050 | rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS, | ||
1051 | priv_tx->data_dma); | ||
1052 | rt2x00_desc_write(priv_tx->desc, 6, word); | ||
1053 | |||
1054 | rt2x00_desc_read(priv_tx->desc, 0, &word); | ||
1055 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); | 1053 | rt2x00_set_field32(&word, TXD_W0_VALID, 0); |
1056 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); | 1054 | rt2x00_set_field32(&word, TXD_W0_OWNER_NIC, 0); |
1057 | rt2x00_desc_write(priv_tx->desc, 0, word); | 1055 | rt2x00_desc_write(entry_priv->desc, 0, word); |
1058 | } | 1056 | } |
1059 | 1057 | ||
1060 | static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev) | 1058 | static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev) |
1061 | { | 1059 | { |
1062 | struct queue_entry_priv_pci_rx *priv_rx; | 1060 | struct queue_entry_priv_pci *entry_priv; |
1063 | struct queue_entry_priv_pci_tx *priv_tx; | ||
1064 | u32 reg; | 1061 | u32 reg; |
1065 | 1062 | ||
1066 | /* | 1063 | /* |
@@ -1082,28 +1079,28 @@ static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev) | |||
1082 | rt2x00dev->tx[0].desc_size / 4); | 1079 | rt2x00dev->tx[0].desc_size / 4); |
1083 | rt2x00pci_register_write(rt2x00dev, TX_RING_CSR1, reg); | 1080 | rt2x00pci_register_write(rt2x00dev, TX_RING_CSR1, reg); |
1084 | 1081 | ||
1085 | priv_tx = rt2x00dev->tx[0].entries[0].priv_data; | 1082 | entry_priv = rt2x00dev->tx[0].entries[0].priv_data; |
1086 | rt2x00pci_register_read(rt2x00dev, AC0_BASE_CSR, ®); | 1083 | rt2x00pci_register_read(rt2x00dev, AC0_BASE_CSR, ®); |
1087 | rt2x00_set_field32(®, AC0_BASE_CSR_RING_REGISTER, | 1084 | rt2x00_set_field32(®, AC0_BASE_CSR_RING_REGISTER, |
1088 | priv_tx->desc_dma); | 1085 | entry_priv->desc_dma); |
1089 | rt2x00pci_register_write(rt2x00dev, AC0_BASE_CSR, reg); | 1086 | rt2x00pci_register_write(rt2x00dev, AC0_BASE_CSR, reg); |
1090 | 1087 | ||
1091 | priv_tx = rt2x00dev->tx[1].entries[0].priv_data; | 1088 | entry_priv = rt2x00dev->tx[1].entries[0].priv_data; |
1092 | rt2x00pci_register_read(rt2x00dev, AC1_BASE_CSR, ®); | 1089 | rt2x00pci_register_read(rt2x00dev, AC1_BASE_CSR, ®); |
1093 | rt2x00_set_field32(®, AC1_BASE_CSR_RING_REGISTER, | 1090 | rt2x00_set_field32(®, AC1_BASE_CSR_RING_REGISTER, |
1094 | priv_tx->desc_dma); | 1091 | entry_priv->desc_dma); |
1095 | rt2x00pci_register_write(rt2x00dev, AC1_BASE_CSR, reg); | 1092 | rt2x00pci_register_write(rt2x00dev, AC1_BASE_CSR, reg); |
1096 | 1093 | ||
1097 | priv_tx = rt2x00dev->tx[2].entries[0].priv_data; | 1094 | entry_priv = rt2x00dev->tx[2].entries[0].priv_data; |
1098 | rt2x00pci_register_read(rt2x00dev, AC2_BASE_CSR, ®); | 1095 | rt2x00pci_register_read(rt2x00dev, AC2_BASE_CSR, ®); |
1099 | rt2x00_set_field32(®, AC2_BASE_CSR_RING_REGISTER, | 1096 | rt2x00_set_field32(®, AC2_BASE_CSR_RING_REGISTER, |
1100 | priv_tx->desc_dma); | 1097 | entry_priv->desc_dma); |
1101 | rt2x00pci_register_write(rt2x00dev, AC2_BASE_CSR, reg); | 1098 | rt2x00pci_register_write(rt2x00dev, AC2_BASE_CSR, reg); |
1102 | 1099 | ||
1103 | priv_tx = rt2x00dev->tx[3].entries[0].priv_data; | 1100 | entry_priv = rt2x00dev->tx[3].entries[0].priv_data; |
1104 | rt2x00pci_register_read(rt2x00dev, AC3_BASE_CSR, ®); | 1101 | rt2x00pci_register_read(rt2x00dev, AC3_BASE_CSR, ®); |
1105 | rt2x00_set_field32(®, AC3_BASE_CSR_RING_REGISTER, | 1102 | rt2x00_set_field32(®, AC3_BASE_CSR_RING_REGISTER, |
1106 | priv_tx->desc_dma); | 1103 | entry_priv->desc_dma); |
1107 | rt2x00pci_register_write(rt2x00dev, AC3_BASE_CSR, reg); | 1104 | rt2x00pci_register_write(rt2x00dev, AC3_BASE_CSR, reg); |
1108 | 1105 | ||
1109 | rt2x00pci_register_read(rt2x00dev, RX_RING_CSR, ®); | 1106 | rt2x00pci_register_read(rt2x00dev, RX_RING_CSR, ®); |
@@ -1113,10 +1110,10 @@ static int rt61pci_init_queues(struct rt2x00_dev *rt2x00dev) | |||
1113 | rt2x00_set_field32(®, RX_RING_CSR_RXD_WRITEBACK_SIZE, 4); | 1110 | rt2x00_set_field32(®, RX_RING_CSR_RXD_WRITEBACK_SIZE, 4); |
1114 | rt2x00pci_register_write(rt2x00dev, RX_RING_CSR, reg); | 1111 | rt2x00pci_register_write(rt2x00dev, RX_RING_CSR, reg); |
1115 | 1112 | ||
1116 | priv_rx = rt2x00dev->rx->entries[0].priv_data; | 1113 | entry_priv = rt2x00dev->rx->entries[0].priv_data; |
1117 | rt2x00pci_register_read(rt2x00dev, RX_BASE_CSR, ®); | 1114 | rt2x00pci_register_read(rt2x00dev, RX_BASE_CSR, ®); |
1118 | rt2x00_set_field32(®, RX_BASE_CSR_RING_REGISTER, | 1115 | rt2x00_set_field32(®, RX_BASE_CSR_RING_REGISTER, |
1119 | priv_rx->desc_dma); | 1116 | entry_priv->desc_dma); |
1120 | rt2x00pci_register_write(rt2x00dev, RX_BASE_CSR, reg); | 1117 | rt2x00pci_register_write(rt2x00dev, RX_BASE_CSR, reg); |
1121 | 1118 | ||
1122 | rt2x00pci_register_read(rt2x00dev, TX_DMA_DST_CSR, ®); | 1119 | rt2x00pci_register_read(rt2x00dev, TX_DMA_DST_CSR, ®); |
@@ -1294,25 +1291,32 @@ static int rt61pci_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1294 | return 0; | 1291 | return 0; |
1295 | } | 1292 | } |
1296 | 1293 | ||
1297 | static int rt61pci_init_bbp(struct rt2x00_dev *rt2x00dev) | 1294 | static int rt61pci_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
1298 | { | 1295 | { |
1299 | unsigned int i; | 1296 | unsigned int i; |
1300 | u16 eeprom; | ||
1301 | u8 reg_id; | ||
1302 | u8 value; | 1297 | u8 value; |
1303 | 1298 | ||
1304 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 1299 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
1305 | rt61pci_bbp_read(rt2x00dev, 0, &value); | 1300 | rt61pci_bbp_read(rt2x00dev, 0, &value); |
1306 | if ((value != 0xff) && (value != 0x00)) | 1301 | if ((value != 0xff) && (value != 0x00)) |
1307 | goto continue_csr_init; | 1302 | return 0; |
1308 | NOTICE(rt2x00dev, "Waiting for BBP register.\n"); | ||
1309 | udelay(REGISTER_BUSY_DELAY); | 1303 | udelay(REGISTER_BUSY_DELAY); |
1310 | } | 1304 | } |
1311 | 1305 | ||
1312 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | 1306 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); |
1313 | return -EACCES; | 1307 | return -EACCES; |
1308 | } | ||
1309 | |||
1310 | static int rt61pci_init_bbp(struct rt2x00_dev *rt2x00dev) | ||
1311 | { | ||
1312 | unsigned int i; | ||
1313 | u16 eeprom; | ||
1314 | u8 reg_id; | ||
1315 | u8 value; | ||
1316 | |||
1317 | if (unlikely(rt61pci_wait_bbp_ready(rt2x00dev))) | ||
1318 | return -EACCES; | ||
1314 | 1319 | ||
1315 | continue_csr_init: | ||
1316 | rt61pci_bbp_write(rt2x00dev, 3, 0x00); | 1320 | rt61pci_bbp_write(rt2x00dev, 3, 0x00); |
1317 | rt61pci_bbp_write(rt2x00dev, 15, 0x30); | 1321 | rt61pci_bbp_write(rt2x00dev, 15, 0x30); |
1318 | rt61pci_bbp_write(rt2x00dev, 21, 0xc8); | 1322 | rt61pci_bbp_write(rt2x00dev, 21, 0xc8); |
@@ -1361,7 +1365,8 @@ static void rt61pci_toggle_rx(struct rt2x00_dev *rt2x00dev, | |||
1361 | 1365 | ||
1362 | rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, ®); | 1366 | rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, ®); |
1363 | rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, | 1367 | rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, |
1364 | state == STATE_RADIO_RX_OFF); | 1368 | (state == STATE_RADIO_RX_OFF) || |
1369 | (state == STATE_RADIO_RX_OFF_LINK)); | ||
1365 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg); | 1370 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg); |
1366 | } | 1371 | } |
1367 | 1372 | ||
@@ -1413,17 +1418,10 @@ static int rt61pci_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
1413 | /* | 1418 | /* |
1414 | * Initialize all registers. | 1419 | * Initialize all registers. |
1415 | */ | 1420 | */ |
1416 | if (rt61pci_init_queues(rt2x00dev) || | 1421 | if (unlikely(rt61pci_init_queues(rt2x00dev) || |
1417 | rt61pci_init_registers(rt2x00dev) || | 1422 | rt61pci_init_registers(rt2x00dev) || |
1418 | rt61pci_init_bbp(rt2x00dev)) { | 1423 | rt61pci_init_bbp(rt2x00dev))) |
1419 | ERROR(rt2x00dev, "Register initialization failed.\n"); | ||
1420 | return -EIO; | 1424 | return -EIO; |
1421 | } | ||
1422 | |||
1423 | /* | ||
1424 | * Enable interrupts. | ||
1425 | */ | ||
1426 | rt61pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_ON); | ||
1427 | 1425 | ||
1428 | /* | 1426 | /* |
1429 | * Enable RX. | 1427 | * Enable RX. |
@@ -1455,11 +1453,6 @@ static void rt61pci_disable_radio(struct rt2x00_dev *rt2x00dev) | |||
1455 | rt2x00_set_field32(®, TX_CNTL_CSR_ABORT_TX_AC2, 1); | 1453 | rt2x00_set_field32(®, TX_CNTL_CSR_ABORT_TX_AC2, 1); |
1456 | rt2x00_set_field32(®, TX_CNTL_CSR_ABORT_TX_AC3, 1); | 1454 | rt2x00_set_field32(®, TX_CNTL_CSR_ABORT_TX_AC3, 1); |
1457 | rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg); | 1455 | rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg); |
1458 | |||
1459 | /* | ||
1460 | * Disable interrupts. | ||
1461 | */ | ||
1462 | rt61pci_toggle_irq(rt2x00dev, STATE_RADIO_IRQ_OFF); | ||
1463 | } | 1456 | } |
1464 | 1457 | ||
1465 | static int rt61pci_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state) | 1458 | static int rt61pci_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state) |
@@ -1467,7 +1460,6 @@ static int rt61pci_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state) | |||
1467 | u32 reg; | 1460 | u32 reg; |
1468 | unsigned int i; | 1461 | unsigned int i; |
1469 | char put_to_sleep; | 1462 | char put_to_sleep; |
1470 | char current_state; | ||
1471 | 1463 | ||
1472 | put_to_sleep = (state != STATE_AWAKE); | 1464 | put_to_sleep = (state != STATE_AWAKE); |
1473 | 1465 | ||
@@ -1483,16 +1475,12 @@ static int rt61pci_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state) | |||
1483 | */ | 1475 | */ |
1484 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 1476 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
1485 | rt2x00pci_register_read(rt2x00dev, MAC_CSR12, ®); | 1477 | rt2x00pci_register_read(rt2x00dev, MAC_CSR12, ®); |
1486 | current_state = | 1478 | state = rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE); |
1487 | rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE); | 1479 | if (state == !put_to_sleep) |
1488 | if (current_state == !put_to_sleep) | ||
1489 | return 0; | 1480 | return 0; |
1490 | msleep(10); | 1481 | msleep(10); |
1491 | } | 1482 | } |
1492 | 1483 | ||
1493 | NOTICE(rt2x00dev, "Device failed to enter state %d, " | ||
1494 | "current device state %d.\n", !put_to_sleep, current_state); | ||
1495 | |||
1496 | return -EBUSY; | 1484 | return -EBUSY; |
1497 | } | 1485 | } |
1498 | 1486 | ||
@@ -1510,11 +1498,13 @@ static int rt61pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1510 | break; | 1498 | break; |
1511 | case STATE_RADIO_RX_ON: | 1499 | case STATE_RADIO_RX_ON: |
1512 | case STATE_RADIO_RX_ON_LINK: | 1500 | case STATE_RADIO_RX_ON_LINK: |
1513 | rt61pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); | ||
1514 | break; | ||
1515 | case STATE_RADIO_RX_OFF: | 1501 | case STATE_RADIO_RX_OFF: |
1516 | case STATE_RADIO_RX_OFF_LINK: | 1502 | case STATE_RADIO_RX_OFF_LINK: |
1517 | rt61pci_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); | 1503 | rt61pci_toggle_rx(rt2x00dev, state); |
1504 | break; | ||
1505 | case STATE_RADIO_IRQ_ON: | ||
1506 | case STATE_RADIO_IRQ_OFF: | ||
1507 | rt61pci_toggle_irq(rt2x00dev, state); | ||
1518 | break; | 1508 | break; |
1519 | case STATE_DEEP_SLEEP: | 1509 | case STATE_DEEP_SLEEP: |
1520 | case STATE_SLEEP: | 1510 | case STATE_SLEEP: |
@@ -1527,6 +1517,10 @@ static int rt61pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1527 | break; | 1517 | break; |
1528 | } | 1518 | } |
1529 | 1519 | ||
1520 | if (unlikely(retval)) | ||
1521 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | ||
1522 | state, retval); | ||
1523 | |||
1530 | return retval; | 1524 | return retval; |
1531 | } | 1525 | } |
1532 | 1526 | ||
@@ -1535,8 +1529,7 @@ static int rt61pci_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1535 | */ | 1529 | */ |
1536 | static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1530 | static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1537 | struct sk_buff *skb, | 1531 | struct sk_buff *skb, |
1538 | struct txentry_desc *txdesc, | 1532 | struct txentry_desc *txdesc) |
1539 | struct ieee80211_tx_control *control) | ||
1540 | { | 1533 | { |
1541 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1534 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1542 | __le32 *txd = skbdesc->desc; | 1535 | __le32 *txd = skbdesc->desc; |
@@ -1552,6 +1545,7 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1552 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); | 1545 | rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max); |
1553 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); | 1546 | rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER); |
1554 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); | 1547 | rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1); |
1548 | rt2x00_set_field32(&word, TXD_W1_BUFFER_COUNT, 1); | ||
1555 | rt2x00_desc_write(txd, 1, word); | 1549 | rt2x00_desc_write(txd, 1, word); |
1556 | 1550 | ||
1557 | rt2x00_desc_read(txd, 2, &word); | 1551 | rt2x00_desc_read(txd, 2, &word); |
@@ -1562,14 +1556,22 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1562 | rt2x00_desc_write(txd, 2, word); | 1556 | rt2x00_desc_write(txd, 2, word); |
1563 | 1557 | ||
1564 | rt2x00_desc_read(txd, 5, &word); | 1558 | rt2x00_desc_read(txd, 5, &word); |
1559 | rt2x00_set_field32(&word, TXD_W5_PID_TYPE, skbdesc->entry->queue->qid); | ||
1560 | rt2x00_set_field32(&word, TXD_W5_PID_SUBTYPE, | ||
1561 | skbdesc->entry->entry_idx); | ||
1565 | rt2x00_set_field32(&word, TXD_W5_TX_POWER, | 1562 | rt2x00_set_field32(&word, TXD_W5_TX_POWER, |
1566 | TXPOWER_TO_DEV(rt2x00dev->tx_power)); | 1563 | TXPOWER_TO_DEV(rt2x00dev->tx_power)); |
1567 | rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1); | 1564 | rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1); |
1568 | rt2x00_desc_write(txd, 5, word); | 1565 | rt2x00_desc_write(txd, 5, word); |
1569 | 1566 | ||
1567 | rt2x00_desc_read(txd, 6, &word); | ||
1568 | rt2x00_set_field32(&word, TXD_W6_BUFFER_PHYSICAL_ADDRESS, | ||
1569 | skbdesc->skb_dma); | ||
1570 | rt2x00_desc_write(txd, 6, word); | ||
1571 | |||
1570 | if (skbdesc->desc_len > TXINFO_SIZE) { | 1572 | if (skbdesc->desc_len > TXINFO_SIZE) { |
1571 | rt2x00_desc_read(txd, 11, &word); | 1573 | rt2x00_desc_read(txd, 11, &word); |
1572 | rt2x00_set_field32(&word, TXD_W11_BUFFER_LENGTH0, skbdesc->data_len); | 1574 | rt2x00_set_field32(&word, TXD_W11_BUFFER_LENGTH0, skb->len); |
1573 | rt2x00_desc_write(txd, 11, word); | 1575 | rt2x00_desc_write(txd, 11, word); |
1574 | } | 1576 | } |
1575 | 1577 | ||
@@ -1586,10 +1588,9 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1586 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); | 1588 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1587 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1589 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1588 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1590 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1589 | !!(control->flags & | 1591 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); |
1590 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | ||
1591 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); | 1592 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); |
1592 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | 1593 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skb->len); |
1593 | rt2x00_set_field32(&word, TXD_W0_BURST, | 1594 | rt2x00_set_field32(&word, TXD_W0_BURST, |
1594 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); | 1595 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); |
1595 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); | 1596 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); |
@@ -1599,12 +1600,47 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1599 | /* | 1600 | /* |
1600 | * TX data initialization | 1601 | * TX data initialization |
1601 | */ | 1602 | */ |
1603 | static void rt61pci_write_beacon(struct queue_entry *entry) | ||
1604 | { | ||
1605 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
1606 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1607 | unsigned int beacon_base; | ||
1608 | u32 reg; | ||
1609 | |||
1610 | /* | ||
1611 | * Disable beaconing while we are reloading the beacon data, | ||
1612 | * otherwise we might be sending out invalid data. | ||
1613 | */ | ||
1614 | rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, ®); | ||
1615 | rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0); | ||
1616 | rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0); | ||
1617 | rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0); | ||
1618 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); | ||
1619 | |||
1620 | /* | ||
1621 | * Write entire beacon with descriptor to register. | ||
1622 | */ | ||
1623 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | ||
1624 | rt2x00pci_register_multiwrite(rt2x00dev, | ||
1625 | beacon_base, | ||
1626 | skbdesc->desc, skbdesc->desc_len); | ||
1627 | rt2x00pci_register_multiwrite(rt2x00dev, | ||
1628 | beacon_base + skbdesc->desc_len, | ||
1629 | entry->skb->data, entry->skb->len); | ||
1630 | |||
1631 | /* | ||
1632 | * Clean up beacon skb. | ||
1633 | */ | ||
1634 | dev_kfree_skb_any(entry->skb); | ||
1635 | entry->skb = NULL; | ||
1636 | } | ||
1637 | |||
1602 | static void rt61pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | 1638 | static void rt61pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
1603 | const unsigned int queue) | 1639 | const enum data_queue_qid queue) |
1604 | { | 1640 | { |
1605 | u32 reg; | 1641 | u32 reg; |
1606 | 1642 | ||
1607 | if (queue == RT2X00_BCN_QUEUE_BEACON) { | 1643 | if (queue == QID_BEACON) { |
1608 | /* | 1644 | /* |
1609 | * For Wi-Fi faily generated beacons between participating | 1645 | * For Wi-Fi faily generated beacons between participating |
1610 | * stations. Set TBTT phase adaptive adjustment step to 8us. | 1646 | * stations. Set TBTT phase adaptive adjustment step to 8us. |
@@ -1622,14 +1658,10 @@ static void rt61pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | |||
1622 | } | 1658 | } |
1623 | 1659 | ||
1624 | rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, ®); | 1660 | rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, ®); |
1625 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC0, | 1661 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC0, (queue == QID_AC_BE)); |
1626 | (queue == IEEE80211_TX_QUEUE_DATA0)); | 1662 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC1, (queue == QID_AC_BK)); |
1627 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC1, | 1663 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC2, (queue == QID_AC_VI)); |
1628 | (queue == IEEE80211_TX_QUEUE_DATA1)); | 1664 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC3, (queue == QID_AC_VO)); |
1629 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC2, | ||
1630 | (queue == IEEE80211_TX_QUEUE_DATA2)); | ||
1631 | rt2x00_set_field32(®, TX_CNTL_CSR_KICK_TX_AC3, | ||
1632 | (queue == IEEE80211_TX_QUEUE_DATA3)); | ||
1633 | rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg); | 1665 | rt2x00pci_register_write(rt2x00dev, TX_CNTL_CSR, reg); |
1634 | } | 1666 | } |
1635 | 1667 | ||
@@ -1680,14 +1712,13 @@ static int rt61pci_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1) | |||
1680 | static void rt61pci_fill_rxdone(struct queue_entry *entry, | 1712 | static void rt61pci_fill_rxdone(struct queue_entry *entry, |
1681 | struct rxdone_entry_desc *rxdesc) | 1713 | struct rxdone_entry_desc *rxdesc) |
1682 | { | 1714 | { |
1683 | struct queue_entry_priv_pci_rx *priv_rx = entry->priv_data; | 1715 | struct queue_entry_priv_pci *entry_priv = entry->priv_data; |
1684 | u32 word0; | 1716 | u32 word0; |
1685 | u32 word1; | 1717 | u32 word1; |
1686 | 1718 | ||
1687 | rt2x00_desc_read(priv_rx->desc, 0, &word0); | 1719 | rt2x00_desc_read(entry_priv->desc, 0, &word0); |
1688 | rt2x00_desc_read(priv_rx->desc, 1, &word1); | 1720 | rt2x00_desc_read(entry_priv->desc, 1, &word1); |
1689 | 1721 | ||
1690 | rxdesc->flags = 0; | ||
1691 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1722 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1692 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1723 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1693 | 1724 | ||
@@ -1701,7 +1732,6 @@ static void rt61pci_fill_rxdone(struct queue_entry *entry, | |||
1701 | rxdesc->rssi = rt61pci_agc_to_rssi(entry->queue->rt2x00dev, word1); | 1732 | rxdesc->rssi = rt61pci_agc_to_rssi(entry->queue->rt2x00dev, word1); |
1702 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1733 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1703 | 1734 | ||
1704 | rxdesc->dev_flags = 0; | ||
1705 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) | 1735 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
1706 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; | 1736 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; |
1707 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) | 1737 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
@@ -1716,7 +1746,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
1716 | struct data_queue *queue; | 1746 | struct data_queue *queue; |
1717 | struct queue_entry *entry; | 1747 | struct queue_entry *entry; |
1718 | struct queue_entry *entry_done; | 1748 | struct queue_entry *entry_done; |
1719 | struct queue_entry_priv_pci_tx *priv_tx; | 1749 | struct queue_entry_priv_pci *entry_priv; |
1720 | struct txdone_entry_desc txdesc; | 1750 | struct txdone_entry_desc txdesc; |
1721 | u32 word; | 1751 | u32 word; |
1722 | u32 reg; | 1752 | u32 reg; |
@@ -1761,8 +1791,8 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
1761 | continue; | 1791 | continue; |
1762 | 1792 | ||
1763 | entry = &queue->entries[index]; | 1793 | entry = &queue->entries[index]; |
1764 | priv_tx = entry->priv_data; | 1794 | entry_priv = entry->priv_data; |
1765 | rt2x00_desc_read(priv_tx->desc, 0, &word); | 1795 | rt2x00_desc_read(entry_priv->desc, 0, &word); |
1766 | 1796 | ||
1767 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || | 1797 | if (rt2x00_get_field32(word, TXD_W0_OWNER_NIC) || |
1768 | !rt2x00_get_field32(word, TXD_W0_VALID)) | 1798 | !rt2x00_get_field32(word, TXD_W0_VALID)) |
@@ -1777,20 +1807,31 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev) | |||
1777 | "TX status report missed for entry %d\n", | 1807 | "TX status report missed for entry %d\n", |
1778 | entry_done->entry_idx); | 1808 | entry_done->entry_idx); |
1779 | 1809 | ||
1780 | txdesc.status = TX_FAIL_OTHER; | 1810 | txdesc.flags = 0; |
1811 | __set_bit(TXDONE_UNKNOWN, &txdesc.flags); | ||
1781 | txdesc.retry = 0; | 1812 | txdesc.retry = 0; |
1782 | 1813 | ||
1783 | rt2x00pci_txdone(rt2x00dev, entry_done, &txdesc); | 1814 | rt2x00lib_txdone(entry_done, &txdesc); |
1784 | entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE); | 1815 | entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE); |
1785 | } | 1816 | } |
1786 | 1817 | ||
1787 | /* | 1818 | /* |
1788 | * Obtain the status about this packet. | 1819 | * Obtain the status about this packet. |
1789 | */ | 1820 | */ |
1790 | txdesc.status = rt2x00_get_field32(reg, STA_CSR4_TX_RESULT); | 1821 | txdesc.flags = 0; |
1822 | switch (rt2x00_get_field32(reg, STA_CSR4_TX_RESULT)) { | ||
1823 | case 0: /* Success, maybe with retry */ | ||
1824 | __set_bit(TXDONE_SUCCESS, &txdesc.flags); | ||
1825 | break; | ||
1826 | case 6: /* Failure, excessive retries */ | ||
1827 | __set_bit(TXDONE_EXCESSIVE_RETRY, &txdesc.flags); | ||
1828 | /* Don't break, this is a failed frame! */ | ||
1829 | default: /* Failure */ | ||
1830 | __set_bit(TXDONE_FAILURE, &txdesc.flags); | ||
1831 | } | ||
1791 | txdesc.retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); | 1832 | txdesc.retry = rt2x00_get_field32(reg, STA_CSR4_RETRY_COUNT); |
1792 | 1833 | ||
1793 | rt2x00pci_txdone(rt2x00dev, entry, &txdesc); | 1834 | rt2x00lib_txdone(entry, &txdesc); |
1794 | } | 1835 | } |
1795 | } | 1836 | } |
1796 | 1837 | ||
@@ -1976,7 +2017,7 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1976 | * To determine the RT chip we have to read the | 2017 | * To determine the RT chip we have to read the |
1977 | * PCI header of the device. | 2018 | * PCI header of the device. |
1978 | */ | 2019 | */ |
1979 | pci_read_config_word(rt2x00dev_pci(rt2x00dev), | 2020 | pci_read_config_word(to_pci_dev(rt2x00dev->dev), |
1980 | PCI_CONFIG_HEADER_DEVICE, &device); | 2021 | PCI_CONFIG_HEADER_DEVICE, &device); |
1981 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); | 2022 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); |
1982 | rt2x00pci_register_read(rt2x00dev, MAC_CSR0, ®); | 2023 | rt2x00pci_register_read(rt2x00dev, MAC_CSR0, ®); |
@@ -2078,31 +2119,11 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
2078 | rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom); | 2119 | rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom); |
2079 | value = rt2x00_get_field16(eeprom, EEPROM_LED_LED_MODE); | 2120 | value = rt2x00_get_field16(eeprom, EEPROM_LED_LED_MODE); |
2080 | 2121 | ||
2081 | rt2x00dev->led_radio.rt2x00dev = rt2x00dev; | 2122 | rt61pci_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
2082 | rt2x00dev->led_radio.type = LED_TYPE_RADIO; | 2123 | rt61pci_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC); |
2083 | rt2x00dev->led_radio.led_dev.brightness_set = | 2124 | if (value == LED_MODE_SIGNAL_STRENGTH) |
2084 | rt61pci_brightness_set; | 2125 | rt61pci_init_led(rt2x00dev, &rt2x00dev->led_qual, |
2085 | rt2x00dev->led_radio.led_dev.blink_set = | 2126 | LED_TYPE_QUALITY); |
2086 | rt61pci_blink_set; | ||
2087 | rt2x00dev->led_radio.flags = LED_INITIALIZED; | ||
2088 | |||
2089 | rt2x00dev->led_assoc.rt2x00dev = rt2x00dev; | ||
2090 | rt2x00dev->led_assoc.type = LED_TYPE_ASSOC; | ||
2091 | rt2x00dev->led_assoc.led_dev.brightness_set = | ||
2092 | rt61pci_brightness_set; | ||
2093 | rt2x00dev->led_assoc.led_dev.blink_set = | ||
2094 | rt61pci_blink_set; | ||
2095 | rt2x00dev->led_assoc.flags = LED_INITIALIZED; | ||
2096 | |||
2097 | if (value == LED_MODE_SIGNAL_STRENGTH) { | ||
2098 | rt2x00dev->led_qual.rt2x00dev = rt2x00dev; | ||
2099 | rt2x00dev->led_qual.type = LED_TYPE_QUALITY; | ||
2100 | rt2x00dev->led_qual.led_dev.brightness_set = | ||
2101 | rt61pci_brightness_set; | ||
2102 | rt2x00dev->led_qual.led_dev.blink_set = | ||
2103 | rt61pci_blink_set; | ||
2104 | rt2x00dev->led_qual.flags = LED_INITIALIZED; | ||
2105 | } | ||
2106 | 2127 | ||
2107 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value); | 2128 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value); |
2108 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0, | 2129 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0, |
@@ -2258,13 +2279,11 @@ static void rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
2258 | */ | 2279 | */ |
2259 | rt2x00dev->hw->flags = | 2280 | rt2x00dev->hw->flags = |
2260 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 2281 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | |
2261 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; | 2282 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
2283 | IEEE80211_HW_SIGNAL_DBM; | ||
2262 | rt2x00dev->hw->extra_tx_headroom = 0; | 2284 | rt2x00dev->hw->extra_tx_headroom = 0; |
2263 | rt2x00dev->hw->max_signal = MAX_SIGNAL; | ||
2264 | rt2x00dev->hw->max_rssi = MAX_RX_SSI; | ||
2265 | rt2x00dev->hw->queues = 4; | ||
2266 | 2285 | ||
2267 | SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_pci(rt2x00dev)->dev); | 2286 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
2268 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, | 2287 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
2269 | rt2x00_eeprom_addr(rt2x00dev, | 2288 | rt2x00_eeprom_addr(rt2x00dev, |
2270 | EEPROM_MAC_ADDR_0)); | 2289 | EEPROM_MAC_ADDR_0)); |
@@ -2327,9 +2346,10 @@ static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
2327 | rt61pci_probe_hw_mode(rt2x00dev); | 2346 | rt61pci_probe_hw_mode(rt2x00dev); |
2328 | 2347 | ||
2329 | /* | 2348 | /* |
2330 | * This device requires firmware. | 2349 | * This device requires firmware and DMA mapped skbs. |
2331 | */ | 2350 | */ |
2332 | __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags); | 2351 | __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags); |
2352 | __set_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags); | ||
2333 | 2353 | ||
2334 | /* | 2354 | /* |
2335 | * Set the rssi offset. | 2355 | * Set the rssi offset. |
@@ -2370,67 +2390,6 @@ static u64 rt61pci_get_tsf(struct ieee80211_hw *hw) | |||
2370 | return tsf; | 2390 | return tsf; |
2371 | } | 2391 | } |
2372 | 2392 | ||
2373 | static int rt61pci_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | ||
2374 | struct ieee80211_tx_control *control) | ||
2375 | { | ||
2376 | struct rt2x00_dev *rt2x00dev = hw->priv; | ||
2377 | struct rt2x00_intf *intf = vif_to_intf(control->vif); | ||
2378 | struct queue_entry_priv_pci_tx *priv_tx; | ||
2379 | struct skb_frame_desc *skbdesc; | ||
2380 | unsigned int beacon_base; | ||
2381 | u32 reg; | ||
2382 | |||
2383 | if (unlikely(!intf->beacon)) | ||
2384 | return -ENOBUFS; | ||
2385 | |||
2386 | priv_tx = intf->beacon->priv_data; | ||
2387 | memset(priv_tx->desc, 0, intf->beacon->queue->desc_size); | ||
2388 | |||
2389 | /* | ||
2390 | * Fill in skb descriptor | ||
2391 | */ | ||
2392 | skbdesc = get_skb_frame_desc(skb); | ||
2393 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
2394 | skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED; | ||
2395 | skbdesc->data = skb->data; | ||
2396 | skbdesc->data_len = skb->len; | ||
2397 | skbdesc->desc = priv_tx->desc; | ||
2398 | skbdesc->desc_len = intf->beacon->queue->desc_size; | ||
2399 | skbdesc->entry = intf->beacon; | ||
2400 | |||
2401 | /* | ||
2402 | * Disable beaconing while we are reloading the beacon data, | ||
2403 | * otherwise we might be sending out invalid data. | ||
2404 | */ | ||
2405 | rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, ®); | ||
2406 | rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0); | ||
2407 | rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0); | ||
2408 | rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0); | ||
2409 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); | ||
2410 | |||
2411 | /* | ||
2412 | * mac80211 doesn't provide the control->queue variable | ||
2413 | * for beacons. Set our own queue identification so | ||
2414 | * it can be used during descriptor initialization. | ||
2415 | */ | ||
2416 | control->queue = RT2X00_BCN_QUEUE_BEACON; | ||
2417 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
2418 | |||
2419 | /* | ||
2420 | * Write entire beacon with descriptor to register, | ||
2421 | * and kick the beacon generator. | ||
2422 | */ | ||
2423 | beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx); | ||
2424 | rt2x00pci_register_multiwrite(rt2x00dev, beacon_base, | ||
2425 | skbdesc->desc, skbdesc->desc_len); | ||
2426 | rt2x00pci_register_multiwrite(rt2x00dev, | ||
2427 | beacon_base + skbdesc->desc_len, | ||
2428 | skbdesc->data, skbdesc->data_len); | ||
2429 | rt61pci_kick_tx_queue(rt2x00dev, control->queue); | ||
2430 | |||
2431 | return 0; | ||
2432 | } | ||
2433 | |||
2434 | static const struct ieee80211_ops rt61pci_mac80211_ops = { | 2393 | static const struct ieee80211_ops rt61pci_mac80211_ops = { |
2435 | .tx = rt2x00mac_tx, | 2394 | .tx = rt2x00mac_tx, |
2436 | .start = rt2x00mac_start, | 2395 | .start = rt2x00mac_start, |
@@ -2446,7 +2405,6 @@ static const struct ieee80211_ops rt61pci_mac80211_ops = { | |||
2446 | .conf_tx = rt2x00mac_conf_tx, | 2405 | .conf_tx = rt2x00mac_conf_tx, |
2447 | .get_tx_stats = rt2x00mac_get_tx_stats, | 2406 | .get_tx_stats = rt2x00mac_get_tx_stats, |
2448 | .get_tsf = rt61pci_get_tsf, | 2407 | .get_tsf = rt61pci_get_tsf, |
2449 | .beacon_update = rt61pci_beacon_update, | ||
2450 | }; | 2408 | }; |
2451 | 2409 | ||
2452 | static const struct rt2x00lib_ops rt61pci_rt2x00_ops = { | 2410 | static const struct rt2x00lib_ops rt61pci_rt2x00_ops = { |
@@ -2466,6 +2424,7 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = { | |||
2466 | .link_tuner = rt61pci_link_tuner, | 2424 | .link_tuner = rt61pci_link_tuner, |
2467 | .write_tx_desc = rt61pci_write_tx_desc, | 2425 | .write_tx_desc = rt61pci_write_tx_desc, |
2468 | .write_tx_data = rt2x00pci_write_tx_data, | 2426 | .write_tx_data = rt2x00pci_write_tx_data, |
2427 | .write_beacon = rt61pci_write_beacon, | ||
2469 | .kick_tx_queue = rt61pci_kick_tx_queue, | 2428 | .kick_tx_queue = rt61pci_kick_tx_queue, |
2470 | .fill_rxdone = rt61pci_fill_rxdone, | 2429 | .fill_rxdone = rt61pci_fill_rxdone, |
2471 | .config_filter = rt61pci_config_filter, | 2430 | .config_filter = rt61pci_config_filter, |
@@ -2478,21 +2437,21 @@ static const struct data_queue_desc rt61pci_queue_rx = { | |||
2478 | .entry_num = RX_ENTRIES, | 2437 | .entry_num = RX_ENTRIES, |
2479 | .data_size = DATA_FRAME_SIZE, | 2438 | .data_size = DATA_FRAME_SIZE, |
2480 | .desc_size = RXD_DESC_SIZE, | 2439 | .desc_size = RXD_DESC_SIZE, |
2481 | .priv_size = sizeof(struct queue_entry_priv_pci_rx), | 2440 | .priv_size = sizeof(struct queue_entry_priv_pci), |
2482 | }; | 2441 | }; |
2483 | 2442 | ||
2484 | static const struct data_queue_desc rt61pci_queue_tx = { | 2443 | static const struct data_queue_desc rt61pci_queue_tx = { |
2485 | .entry_num = TX_ENTRIES, | 2444 | .entry_num = TX_ENTRIES, |
2486 | .data_size = DATA_FRAME_SIZE, | 2445 | .data_size = DATA_FRAME_SIZE, |
2487 | .desc_size = TXD_DESC_SIZE, | 2446 | .desc_size = TXD_DESC_SIZE, |
2488 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 2447 | .priv_size = sizeof(struct queue_entry_priv_pci), |
2489 | }; | 2448 | }; |
2490 | 2449 | ||
2491 | static const struct data_queue_desc rt61pci_queue_bcn = { | 2450 | static const struct data_queue_desc rt61pci_queue_bcn = { |
2492 | .entry_num = 4 * BEACON_ENTRIES, | 2451 | .entry_num = 4 * BEACON_ENTRIES, |
2493 | .data_size = 0, /* No DMA required for beacons */ | 2452 | .data_size = 0, /* No DMA required for beacons */ |
2494 | .desc_size = TXINFO_SIZE, | 2453 | .desc_size = TXINFO_SIZE, |
2495 | .priv_size = sizeof(struct queue_entry_priv_pci_tx), | 2454 | .priv_size = sizeof(struct queue_entry_priv_pci), |
2496 | }; | 2455 | }; |
2497 | 2456 | ||
2498 | static const struct rt2x00_ops rt61pci_ops = { | 2457 | static const struct rt2x00_ops rt61pci_ops = { |
@@ -2501,6 +2460,7 @@ static const struct rt2x00_ops rt61pci_ops = { | |||
2501 | .max_ap_intf = 4, | 2460 | .max_ap_intf = 4, |
2502 | .eeprom_size = EEPROM_SIZE, | 2461 | .eeprom_size = EEPROM_SIZE, |
2503 | .rf_size = RF_SIZE, | 2462 | .rf_size = RF_SIZE, |
2463 | .tx_queues = NUM_TX_QUEUES, | ||
2504 | .rx = &rt61pci_queue_rx, | 2464 | .rx = &rt61pci_queue_rx, |
2505 | .tx = &rt61pci_queue_tx, | 2465 | .tx = &rt61pci_queue_tx, |
2506 | .bcn = &rt61pci_queue_bcn, | 2466 | .bcn = &rt61pci_queue_bcn, |
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h index 3511bba7ff65..1004d5b899e6 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.h +++ b/drivers/net/wireless/rt2x00/rt61pci.h | |||
@@ -39,8 +39,6 @@ | |||
39 | * Signal information. | 39 | * Signal information. |
40 | * Defaul offset is required for RSSI <-> dBm conversion. | 40 | * Defaul offset is required for RSSI <-> dBm conversion. |
41 | */ | 41 | */ |
42 | #define MAX_SIGNAL 100 | ||
43 | #define MAX_RX_SSI -1 | ||
44 | #define DEFAULT_RSSI_OFFSET 120 | 42 | #define DEFAULT_RSSI_OFFSET 120 |
45 | 43 | ||
46 | /* | 44 | /* |
@@ -54,6 +52,11 @@ | |||
54 | #define RF_SIZE 0x0014 | 52 | #define RF_SIZE 0x0014 |
55 | 53 | ||
56 | /* | 54 | /* |
55 | * Number of TX queues. | ||
56 | */ | ||
57 | #define NUM_TX_QUEUES 4 | ||
58 | |||
59 | /* | ||
57 | * PCI registers. | 60 | * PCI registers. |
58 | */ | 61 | */ |
59 | 62 | ||
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index 6a62d6bb96fe..d383735ab8f2 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -74,10 +74,10 @@ static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev, | |||
74 | const unsigned int offset, | 74 | const unsigned int offset, |
75 | void *value, const u32 length) | 75 | void *value, const u32 length) |
76 | { | 76 | { |
77 | int timeout = REGISTER_TIMEOUT * (length / sizeof(u32)); | ||
78 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, | 77 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ, |
79 | USB_VENDOR_REQUEST_IN, offset, | 78 | USB_VENDOR_REQUEST_IN, offset, |
80 | value, length, timeout); | 79 | value, length, |
80 | REGISTER_TIMEOUT32(length)); | ||
81 | } | 81 | } |
82 | 82 | ||
83 | static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev, | 83 | static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev, |
@@ -102,10 +102,10 @@ static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev, | |||
102 | const unsigned int offset, | 102 | const unsigned int offset, |
103 | void *value, const u32 length) | 103 | void *value, const u32 length) |
104 | { | 104 | { |
105 | int timeout = REGISTER_TIMEOUT * (length / sizeof(u32)); | ||
106 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, | 105 | rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE, |
107 | USB_VENDOR_REQUEST_OUT, offset, | 106 | USB_VENDOR_REQUEST_OUT, offset, |
108 | value, length, timeout); | 107 | value, length, |
108 | REGISTER_TIMEOUT32(length)); | ||
109 | } | 109 | } |
110 | 110 | ||
111 | static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev) | 111 | static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev) |
@@ -341,6 +341,17 @@ static int rt73usb_blink_set(struct led_classdev *led_cdev, | |||
341 | 341 | ||
342 | return 0; | 342 | return 0; |
343 | } | 343 | } |
344 | |||
345 | static void rt73usb_init_led(struct rt2x00_dev *rt2x00dev, | ||
346 | struct rt2x00_led *led, | ||
347 | enum led_type type) | ||
348 | { | ||
349 | led->rt2x00dev = rt2x00dev; | ||
350 | led->type = type; | ||
351 | led->led_dev.brightness_set = rt73usb_brightness_set; | ||
352 | led->led_dev.blink_set = rt73usb_blink_set; | ||
353 | led->flags = LED_INITIALIZED; | ||
354 | } | ||
344 | #endif /* CONFIG_RT73USB_LEDS */ | 355 | #endif /* CONFIG_RT73USB_LEDS */ |
345 | 356 | ||
346 | /* | 357 | /* |
@@ -882,7 +893,6 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
882 | const char *ptr = data; | 893 | const char *ptr = data; |
883 | char *cache; | 894 | char *cache; |
884 | int buflen; | 895 | int buflen; |
885 | int timeout; | ||
886 | 896 | ||
887 | /* | 897 | /* |
888 | * Wait for stable hardware. | 898 | * Wait for stable hardware. |
@@ -913,14 +923,14 @@ static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
913 | 923 | ||
914 | for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) { | 924 | for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) { |
915 | buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE); | 925 | buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE); |
916 | timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32)); | ||
917 | 926 | ||
918 | memcpy(cache, ptr, buflen); | 927 | memcpy(cache, ptr, buflen); |
919 | 928 | ||
920 | rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE, | 929 | rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE, |
921 | USB_VENDOR_REQUEST_OUT, | 930 | USB_VENDOR_REQUEST_OUT, |
922 | FIRMWARE_IMAGE_BASE + i, 0, | 931 | FIRMWARE_IMAGE_BASE + i, 0, |
923 | cache, buflen, timeout); | 932 | cache, buflen, |
933 | REGISTER_TIMEOUT32(buflen)); | ||
924 | 934 | ||
925 | ptr += buflen; | 935 | ptr += buflen; |
926 | } | 936 | } |
@@ -1100,25 +1110,32 @@ static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1100 | return 0; | 1110 | return 0; |
1101 | } | 1111 | } |
1102 | 1112 | ||
1103 | static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev) | 1113 | static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev) |
1104 | { | 1114 | { |
1105 | unsigned int i; | 1115 | unsigned int i; |
1106 | u16 eeprom; | ||
1107 | u8 reg_id; | ||
1108 | u8 value; | 1116 | u8 value; |
1109 | 1117 | ||
1110 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 1118 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
1111 | rt73usb_bbp_read(rt2x00dev, 0, &value); | 1119 | rt73usb_bbp_read(rt2x00dev, 0, &value); |
1112 | if ((value != 0xff) && (value != 0x00)) | 1120 | if ((value != 0xff) && (value != 0x00)) |
1113 | goto continue_csr_init; | 1121 | return 0; |
1114 | NOTICE(rt2x00dev, "Waiting for BBP register.\n"); | ||
1115 | udelay(REGISTER_BUSY_DELAY); | 1122 | udelay(REGISTER_BUSY_DELAY); |
1116 | } | 1123 | } |
1117 | 1124 | ||
1118 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); | 1125 | ERROR(rt2x00dev, "BBP register access failed, aborting.\n"); |
1119 | return -EACCES; | 1126 | return -EACCES; |
1127 | } | ||
1128 | |||
1129 | static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev) | ||
1130 | { | ||
1131 | unsigned int i; | ||
1132 | u16 eeprom; | ||
1133 | u8 reg_id; | ||
1134 | u8 value; | ||
1135 | |||
1136 | if (unlikely(rt73usb_wait_bbp_ready(rt2x00dev))) | ||
1137 | return -EACCES; | ||
1120 | 1138 | ||
1121 | continue_csr_init: | ||
1122 | rt73usb_bbp_write(rt2x00dev, 3, 0x80); | 1139 | rt73usb_bbp_write(rt2x00dev, 3, 0x80); |
1123 | rt73usb_bbp_write(rt2x00dev, 15, 0x30); | 1140 | rt73usb_bbp_write(rt2x00dev, 15, 0x30); |
1124 | rt73usb_bbp_write(rt2x00dev, 21, 0xc8); | 1141 | rt73usb_bbp_write(rt2x00dev, 21, 0xc8); |
@@ -1168,7 +1185,8 @@ static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev, | |||
1168 | 1185 | ||
1169 | rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®); | 1186 | rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®); |
1170 | rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, | 1187 | rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, |
1171 | state == STATE_RADIO_RX_OFF); | 1188 | (state == STATE_RADIO_RX_OFF) || |
1189 | (state == STATE_RADIO_RX_OFF_LINK)); | ||
1172 | rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg); | 1190 | rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg); |
1173 | } | 1191 | } |
1174 | 1192 | ||
@@ -1177,11 +1195,9 @@ static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev) | |||
1177 | /* | 1195 | /* |
1178 | * Initialize all registers. | 1196 | * Initialize all registers. |
1179 | */ | 1197 | */ |
1180 | if (rt73usb_init_registers(rt2x00dev) || | 1198 | if (unlikely(rt73usb_init_registers(rt2x00dev) || |
1181 | rt73usb_init_bbp(rt2x00dev)) { | 1199 | rt73usb_init_bbp(rt2x00dev))) |
1182 | ERROR(rt2x00dev, "Register initialization failed.\n"); | ||
1183 | return -EIO; | 1200 | return -EIO; |
1184 | } | ||
1185 | 1201 | ||
1186 | return 0; | 1202 | return 0; |
1187 | } | 1203 | } |
@@ -1203,7 +1219,6 @@ static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state) | |||
1203 | u32 reg; | 1219 | u32 reg; |
1204 | unsigned int i; | 1220 | unsigned int i; |
1205 | char put_to_sleep; | 1221 | char put_to_sleep; |
1206 | char current_state; | ||
1207 | 1222 | ||
1208 | put_to_sleep = (state != STATE_AWAKE); | 1223 | put_to_sleep = (state != STATE_AWAKE); |
1209 | 1224 | ||
@@ -1219,16 +1234,12 @@ static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state) | |||
1219 | */ | 1234 | */ |
1220 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 1235 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
1221 | rt73usb_register_read(rt2x00dev, MAC_CSR12, ®); | 1236 | rt73usb_register_read(rt2x00dev, MAC_CSR12, ®); |
1222 | current_state = | 1237 | state = rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE); |
1223 | rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE); | 1238 | if (state == !put_to_sleep) |
1224 | if (current_state == !put_to_sleep) | ||
1225 | return 0; | 1239 | return 0; |
1226 | msleep(10); | 1240 | msleep(10); |
1227 | } | 1241 | } |
1228 | 1242 | ||
1229 | NOTICE(rt2x00dev, "Device failed to enter state %d, " | ||
1230 | "current device state %d.\n", !put_to_sleep, current_state); | ||
1231 | |||
1232 | return -EBUSY; | 1243 | return -EBUSY; |
1233 | } | 1244 | } |
1234 | 1245 | ||
@@ -1246,11 +1257,13 @@ static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1246 | break; | 1257 | break; |
1247 | case STATE_RADIO_RX_ON: | 1258 | case STATE_RADIO_RX_ON: |
1248 | case STATE_RADIO_RX_ON_LINK: | 1259 | case STATE_RADIO_RX_ON_LINK: |
1249 | rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); | ||
1250 | break; | ||
1251 | case STATE_RADIO_RX_OFF: | 1260 | case STATE_RADIO_RX_OFF: |
1252 | case STATE_RADIO_RX_OFF_LINK: | 1261 | case STATE_RADIO_RX_OFF_LINK: |
1253 | rt73usb_toggle_rx(rt2x00dev, STATE_RADIO_RX_OFF); | 1262 | rt73usb_toggle_rx(rt2x00dev, state); |
1263 | break; | ||
1264 | case STATE_RADIO_IRQ_ON: | ||
1265 | case STATE_RADIO_IRQ_OFF: | ||
1266 | /* No support, but no error either */ | ||
1254 | break; | 1267 | break; |
1255 | case STATE_DEEP_SLEEP: | 1268 | case STATE_DEEP_SLEEP: |
1256 | case STATE_SLEEP: | 1269 | case STATE_SLEEP: |
@@ -1263,6 +1276,10 @@ static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1263 | break; | 1276 | break; |
1264 | } | 1277 | } |
1265 | 1278 | ||
1279 | if (unlikely(retval)) | ||
1280 | ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n", | ||
1281 | state, retval); | ||
1282 | |||
1266 | return retval; | 1283 | return retval; |
1267 | } | 1284 | } |
1268 | 1285 | ||
@@ -1271,8 +1288,7 @@ static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev, | |||
1271 | */ | 1288 | */ |
1272 | static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | 1289 | static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, |
1273 | struct sk_buff *skb, | 1290 | struct sk_buff *skb, |
1274 | struct txentry_desc *txdesc, | 1291 | struct txentry_desc *txdesc) |
1275 | struct ieee80211_tx_control *control) | ||
1276 | { | 1292 | { |
1277 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); | 1293 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb); |
1278 | __le32 *txd = skbdesc->desc; | 1294 | __le32 *txd = skbdesc->desc; |
@@ -1317,16 +1333,59 @@ static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1317 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); | 1333 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); |
1318 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1334 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1319 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1335 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1320 | !!(control->flags & | 1336 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); |
1321 | IEEE80211_TXCTL_LONG_RETRY_LIMIT)); | ||
1322 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); | 1337 | rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0); |
1323 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, skbdesc->data_len); | 1338 | rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, |
1339 | skb->len - skbdesc->desc_len); | ||
1324 | rt2x00_set_field32(&word, TXD_W0_BURST2, | 1340 | rt2x00_set_field32(&word, TXD_W0_BURST2, |
1325 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); | 1341 | test_bit(ENTRY_TXD_BURST, &txdesc->flags)); |
1326 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); | 1342 | rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE); |
1327 | rt2x00_desc_write(txd, 0, word); | 1343 | rt2x00_desc_write(txd, 0, word); |
1328 | } | 1344 | } |
1329 | 1345 | ||
1346 | /* | ||
1347 | * TX data initialization | ||
1348 | */ | ||
1349 | static void rt73usb_write_beacon(struct queue_entry *entry) | ||
1350 | { | ||
1351 | struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev; | ||
1352 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | ||
1353 | unsigned int beacon_base; | ||
1354 | u32 reg; | ||
1355 | |||
1356 | /* | ||
1357 | * Add the descriptor in front of the skb. | ||
1358 | */ | ||
1359 | skb_push(entry->skb, entry->queue->desc_size); | ||
1360 | memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len); | ||
1361 | skbdesc->desc = entry->skb->data; | ||
1362 | |||
1363 | /* | ||
1364 | * Disable beaconing while we are reloading the beacon data, | ||
1365 | * otherwise we might be sending out invalid data. | ||
1366 | */ | ||
1367 | rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®); | ||
1368 | rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0); | ||
1369 | rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0); | ||
1370 | rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0); | ||
1371 | rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg); | ||
1372 | |||
1373 | /* | ||
1374 | * Write entire beacon with descriptor to register. | ||
1375 | */ | ||
1376 | beacon_base = HW_BEACON_OFFSET(entry->entry_idx); | ||
1377 | rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE, | ||
1378 | USB_VENDOR_REQUEST_OUT, beacon_base, 0, | ||
1379 | entry->skb->data, entry->skb->len, | ||
1380 | REGISTER_TIMEOUT32(entry->skb->len)); | ||
1381 | |||
1382 | /* | ||
1383 | * Clean up the beacon skb. | ||
1384 | */ | ||
1385 | dev_kfree_skb(entry->skb); | ||
1386 | entry->skb = NULL; | ||
1387 | } | ||
1388 | |||
1330 | static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, | 1389 | static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, |
1331 | struct sk_buff *skb) | 1390 | struct sk_buff *skb) |
1332 | { | 1391 | { |
@@ -1342,16 +1401,15 @@ static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev, | |||
1342 | return length; | 1401 | return length; |
1343 | } | 1402 | } |
1344 | 1403 | ||
1345 | /* | ||
1346 | * TX data initialization | ||
1347 | */ | ||
1348 | static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, | 1404 | static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, |
1349 | const unsigned int queue) | 1405 | const enum data_queue_qid queue) |
1350 | { | 1406 | { |
1351 | u32 reg; | 1407 | u32 reg; |
1352 | 1408 | ||
1353 | if (queue != RT2X00_BCN_QUEUE_BEACON) | 1409 | if (queue != QID_BEACON) { |
1410 | rt2x00usb_kick_tx_queue(rt2x00dev, queue); | ||
1354 | return; | 1411 | return; |
1412 | } | ||
1355 | 1413 | ||
1356 | /* | 1414 | /* |
1357 | * For Wi-Fi faily generated beacons between participating stations. | 1415 | * For Wi-Fi faily generated beacons between participating stations. |
@@ -1421,25 +1479,22 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry, | |||
1421 | { | 1479 | { |
1422 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); | 1480 | struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); |
1423 | __le32 *rxd = (__le32 *)entry->skb->data; | 1481 | __le32 *rxd = (__le32 *)entry->skb->data; |
1424 | unsigned int offset = entry->queue->desc_size + 2; | ||
1425 | u32 word0; | 1482 | u32 word0; |
1426 | u32 word1; | 1483 | u32 word1; |
1427 | 1484 | ||
1428 | /* | 1485 | /* |
1429 | * Copy descriptor to the available headroom inside the skbuffer. | 1486 | * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of |
1487 | * frame data in rt2x00usb. | ||
1430 | */ | 1488 | */ |
1431 | skb_push(entry->skb, offset); | 1489 | memcpy(skbdesc->desc, rxd, skbdesc->desc_len); |
1432 | memcpy(entry->skb->data, rxd, entry->queue->desc_size); | 1490 | rxd = (__le32 *)skbdesc->desc; |
1433 | rxd = (__le32 *)entry->skb->data; | ||
1434 | 1491 | ||
1435 | /* | 1492 | /* |
1436 | * The descriptor is now aligned to 4 bytes and thus it is | 1493 | * It is now safe to read the descriptor on all architectures. |
1437 | * now safe to read it on all architectures. | ||
1438 | */ | 1494 | */ |
1439 | rt2x00_desc_read(rxd, 0, &word0); | 1495 | rt2x00_desc_read(rxd, 0, &word0); |
1440 | rt2x00_desc_read(rxd, 1, &word1); | 1496 | rt2x00_desc_read(rxd, 1, &word1); |
1441 | 1497 | ||
1442 | rxdesc->flags = 0; | ||
1443 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) | 1498 | if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR)) |
1444 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; | 1499 | rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC; |
1445 | 1500 | ||
@@ -1453,25 +1508,16 @@ static void rt73usb_fill_rxdone(struct queue_entry *entry, | |||
1453 | rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1); | 1508 | rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1); |
1454 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); | 1509 | rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT); |
1455 | 1510 | ||
1456 | rxdesc->dev_flags = 0; | ||
1457 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) | 1511 | if (rt2x00_get_field32(word0, RXD_W0_OFDM)) |
1458 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; | 1512 | rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP; |
1459 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) | 1513 | if (rt2x00_get_field32(word0, RXD_W0_MY_BSS)) |
1460 | rxdesc->dev_flags |= RXDONE_MY_BSS; | 1514 | rxdesc->dev_flags |= RXDONE_MY_BSS; |
1461 | 1515 | ||
1462 | /* | 1516 | /* |
1463 | * Adjust the skb memory window to the frame boundaries. | 1517 | * Set skb pointers, and update frame information. |
1464 | */ | 1518 | */ |
1465 | skb_pull(entry->skb, offset + entry->queue->desc_size); | 1519 | skb_pull(entry->skb, entry->queue->desc_size); |
1466 | skb_trim(entry->skb, rxdesc->size); | 1520 | skb_trim(entry->skb, rxdesc->size); |
1467 | |||
1468 | /* | ||
1469 | * Set descriptor and data pointer. | ||
1470 | */ | ||
1471 | skbdesc->data = entry->skb->data; | ||
1472 | skbdesc->data_len = rxdesc->size; | ||
1473 | skbdesc->desc = rxd; | ||
1474 | skbdesc->desc_len = entry->queue->desc_size; | ||
1475 | } | 1521 | } |
1476 | 1522 | ||
1477 | /* | 1523 | /* |
@@ -1644,31 +1690,11 @@ static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1644 | #ifdef CONFIG_RT73USB_LEDS | 1690 | #ifdef CONFIG_RT73USB_LEDS |
1645 | rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom); | 1691 | rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom); |
1646 | 1692 | ||
1647 | rt2x00dev->led_radio.rt2x00dev = rt2x00dev; | 1693 | rt73usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO); |
1648 | rt2x00dev->led_radio.type = LED_TYPE_RADIO; | 1694 | rt73usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC); |
1649 | rt2x00dev->led_radio.led_dev.brightness_set = | 1695 | if (value == LED_MODE_SIGNAL_STRENGTH) |
1650 | rt73usb_brightness_set; | 1696 | rt73usb_init_led(rt2x00dev, &rt2x00dev->led_qual, |
1651 | rt2x00dev->led_radio.led_dev.blink_set = | 1697 | LED_TYPE_QUALITY); |
1652 | rt73usb_blink_set; | ||
1653 | rt2x00dev->led_radio.flags = LED_INITIALIZED; | ||
1654 | |||
1655 | rt2x00dev->led_assoc.rt2x00dev = rt2x00dev; | ||
1656 | rt2x00dev->led_assoc.type = LED_TYPE_ASSOC; | ||
1657 | rt2x00dev->led_assoc.led_dev.brightness_set = | ||
1658 | rt73usb_brightness_set; | ||
1659 | rt2x00dev->led_assoc.led_dev.blink_set = | ||
1660 | rt73usb_blink_set; | ||
1661 | rt2x00dev->led_assoc.flags = LED_INITIALIZED; | ||
1662 | |||
1663 | if (value == LED_MODE_SIGNAL_STRENGTH) { | ||
1664 | rt2x00dev->led_qual.rt2x00dev = rt2x00dev; | ||
1665 | rt2x00dev->led_qual.type = LED_TYPE_QUALITY; | ||
1666 | rt2x00dev->led_qual.led_dev.brightness_set = | ||
1667 | rt73usb_brightness_set; | ||
1668 | rt2x00dev->led_qual.led_dev.blink_set = | ||
1669 | rt73usb_blink_set; | ||
1670 | rt2x00dev->led_qual.flags = LED_INITIALIZED; | ||
1671 | } | ||
1672 | 1698 | ||
1673 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value); | 1699 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value); |
1674 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0, | 1700 | rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0, |
@@ -1846,13 +1872,11 @@ static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
1846 | */ | 1872 | */ |
1847 | rt2x00dev->hw->flags = | 1873 | rt2x00dev->hw->flags = |
1848 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | | 1874 | IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE | |
1849 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING; | 1875 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
1876 | IEEE80211_HW_SIGNAL_DBM; | ||
1850 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; | 1877 | rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE; |
1851 | rt2x00dev->hw->max_signal = MAX_SIGNAL; | ||
1852 | rt2x00dev->hw->max_rssi = MAX_RX_SSI; | ||
1853 | rt2x00dev->hw->queues = 4; | ||
1854 | 1878 | ||
1855 | SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev); | 1879 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
1856 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, | 1880 | SET_IEEE80211_PERM_ADDR(rt2x00dev->hw, |
1857 | rt2x00_eeprom_addr(rt2x00dev, | 1881 | rt2x00_eeprom_addr(rt2x00dev, |
1858 | EEPROM_MAC_ADDR_0)); | 1882 | EEPROM_MAC_ADDR_0)); |
@@ -1974,69 +1998,6 @@ static u64 rt73usb_get_tsf(struct ieee80211_hw *hw) | |||
1974 | #define rt73usb_get_tsf NULL | 1998 | #define rt73usb_get_tsf NULL |
1975 | #endif | 1999 | #endif |
1976 | 2000 | ||
1977 | static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb, | ||
1978 | struct ieee80211_tx_control *control) | ||
1979 | { | ||
1980 | struct rt2x00_dev *rt2x00dev = hw->priv; | ||
1981 | struct rt2x00_intf *intf = vif_to_intf(control->vif); | ||
1982 | struct skb_frame_desc *skbdesc; | ||
1983 | unsigned int beacon_base; | ||
1984 | unsigned int timeout; | ||
1985 | u32 reg; | ||
1986 | |||
1987 | if (unlikely(!intf->beacon)) | ||
1988 | return -ENOBUFS; | ||
1989 | |||
1990 | /* | ||
1991 | * Add the descriptor in front of the skb. | ||
1992 | */ | ||
1993 | skb_push(skb, intf->beacon->queue->desc_size); | ||
1994 | memset(skb->data, 0, intf->beacon->queue->desc_size); | ||
1995 | |||
1996 | /* | ||
1997 | * Fill in skb descriptor | ||
1998 | */ | ||
1999 | skbdesc = get_skb_frame_desc(skb); | ||
2000 | memset(skbdesc, 0, sizeof(*skbdesc)); | ||
2001 | skbdesc->flags |= FRAME_DESC_DRIVER_GENERATED; | ||
2002 | skbdesc->data = skb->data + intf->beacon->queue->desc_size; | ||
2003 | skbdesc->data_len = skb->len - intf->beacon->queue->desc_size; | ||
2004 | skbdesc->desc = skb->data; | ||
2005 | skbdesc->desc_len = intf->beacon->queue->desc_size; | ||
2006 | skbdesc->entry = intf->beacon; | ||
2007 | |||
2008 | /* | ||
2009 | * Disable beaconing while we are reloading the beacon data, | ||
2010 | * otherwise we might be sending out invalid data. | ||
2011 | */ | ||
2012 | rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®); | ||
2013 | rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0); | ||
2014 | rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0); | ||
2015 | rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0); | ||
2016 | rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg); | ||
2017 | |||
2018 | /* | ||
2019 | * mac80211 doesn't provide the control->queue variable | ||
2020 | * for beacons. Set our own queue identification so | ||
2021 | * it can be used during descriptor initialization. | ||
2022 | */ | ||
2023 | control->queue = RT2X00_BCN_QUEUE_BEACON; | ||
2024 | rt2x00lib_write_tx_desc(rt2x00dev, skb, control); | ||
2025 | |||
2026 | /* | ||
2027 | * Write entire beacon with descriptor to register, | ||
2028 | * and kick the beacon generator. | ||
2029 | */ | ||
2030 | beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx); | ||
2031 | timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32)); | ||
2032 | rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE, | ||
2033 | USB_VENDOR_REQUEST_OUT, beacon_base, 0, | ||
2034 | skb->data, skb->len, timeout); | ||
2035 | rt73usb_kick_tx_queue(rt2x00dev, control->queue); | ||
2036 | |||
2037 | return 0; | ||
2038 | } | ||
2039 | |||
2040 | static const struct ieee80211_ops rt73usb_mac80211_ops = { | 2001 | static const struct ieee80211_ops rt73usb_mac80211_ops = { |
2041 | .tx = rt2x00mac_tx, | 2002 | .tx = rt2x00mac_tx, |
2042 | .start = rt2x00mac_start, | 2003 | .start = rt2x00mac_start, |
@@ -2052,7 +2013,6 @@ static const struct ieee80211_ops rt73usb_mac80211_ops = { | |||
2052 | .conf_tx = rt2x00mac_conf_tx, | 2013 | .conf_tx = rt2x00mac_conf_tx, |
2053 | .get_tx_stats = rt2x00mac_get_tx_stats, | 2014 | .get_tx_stats = rt2x00mac_get_tx_stats, |
2054 | .get_tsf = rt73usb_get_tsf, | 2015 | .get_tsf = rt73usb_get_tsf, |
2055 | .beacon_update = rt73usb_beacon_update, | ||
2056 | }; | 2016 | }; |
2057 | 2017 | ||
2058 | static const struct rt2x00lib_ops rt73usb_rt2x00_ops = { | 2018 | static const struct rt2x00lib_ops rt73usb_rt2x00_ops = { |
@@ -2070,6 +2030,7 @@ static const struct rt2x00lib_ops rt73usb_rt2x00_ops = { | |||
2070 | .link_tuner = rt73usb_link_tuner, | 2030 | .link_tuner = rt73usb_link_tuner, |
2071 | .write_tx_desc = rt73usb_write_tx_desc, | 2031 | .write_tx_desc = rt73usb_write_tx_desc, |
2072 | .write_tx_data = rt2x00usb_write_tx_data, | 2032 | .write_tx_data = rt2x00usb_write_tx_data, |
2033 | .write_beacon = rt73usb_write_beacon, | ||
2073 | .get_tx_data_len = rt73usb_get_tx_data_len, | 2034 | .get_tx_data_len = rt73usb_get_tx_data_len, |
2074 | .kick_tx_queue = rt73usb_kick_tx_queue, | 2035 | .kick_tx_queue = rt73usb_kick_tx_queue, |
2075 | .fill_rxdone = rt73usb_fill_rxdone, | 2036 | .fill_rxdone = rt73usb_fill_rxdone, |
@@ -2083,21 +2044,21 @@ static const struct data_queue_desc rt73usb_queue_rx = { | |||
2083 | .entry_num = RX_ENTRIES, | 2044 | .entry_num = RX_ENTRIES, |
2084 | .data_size = DATA_FRAME_SIZE, | 2045 | .data_size = DATA_FRAME_SIZE, |
2085 | .desc_size = RXD_DESC_SIZE, | 2046 | .desc_size = RXD_DESC_SIZE, |
2086 | .priv_size = sizeof(struct queue_entry_priv_usb_rx), | 2047 | .priv_size = sizeof(struct queue_entry_priv_usb), |
2087 | }; | 2048 | }; |
2088 | 2049 | ||
2089 | static const struct data_queue_desc rt73usb_queue_tx = { | 2050 | static const struct data_queue_desc rt73usb_queue_tx = { |
2090 | .entry_num = TX_ENTRIES, | 2051 | .entry_num = TX_ENTRIES, |
2091 | .data_size = DATA_FRAME_SIZE, | 2052 | .data_size = DATA_FRAME_SIZE, |
2092 | .desc_size = TXD_DESC_SIZE, | 2053 | .desc_size = TXD_DESC_SIZE, |
2093 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | 2054 | .priv_size = sizeof(struct queue_entry_priv_usb), |
2094 | }; | 2055 | }; |
2095 | 2056 | ||
2096 | static const struct data_queue_desc rt73usb_queue_bcn = { | 2057 | static const struct data_queue_desc rt73usb_queue_bcn = { |
2097 | .entry_num = 4 * BEACON_ENTRIES, | 2058 | .entry_num = 4 * BEACON_ENTRIES, |
2098 | .data_size = MGMT_FRAME_SIZE, | 2059 | .data_size = MGMT_FRAME_SIZE, |
2099 | .desc_size = TXINFO_SIZE, | 2060 | .desc_size = TXINFO_SIZE, |
2100 | .priv_size = sizeof(struct queue_entry_priv_usb_tx), | 2061 | .priv_size = sizeof(struct queue_entry_priv_usb), |
2101 | }; | 2062 | }; |
2102 | 2063 | ||
2103 | static const struct rt2x00_ops rt73usb_ops = { | 2064 | static const struct rt2x00_ops rt73usb_ops = { |
@@ -2106,6 +2067,7 @@ static const struct rt2x00_ops rt73usb_ops = { | |||
2106 | .max_ap_intf = 4, | 2067 | .max_ap_intf = 4, |
2107 | .eeprom_size = EEPROM_SIZE, | 2068 | .eeprom_size = EEPROM_SIZE, |
2108 | .rf_size = RF_SIZE, | 2069 | .rf_size = RF_SIZE, |
2070 | .tx_queues = NUM_TX_QUEUES, | ||
2109 | .rx = &rt73usb_queue_rx, | 2071 | .rx = &rt73usb_queue_rx, |
2110 | .tx = &rt73usb_queue_tx, | 2072 | .tx = &rt73usb_queue_tx, |
2111 | .bcn = &rt73usb_queue_bcn, | 2073 | .bcn = &rt73usb_queue_bcn, |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h index 06d687425fef..148493501011 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.h +++ b/drivers/net/wireless/rt2x00/rt73usb.h | |||
@@ -39,8 +39,6 @@ | |||
39 | * Signal information. | 39 | * Signal information. |
40 | * Defaul offset is required for RSSI <-> dBm conversion. | 40 | * Defaul offset is required for RSSI <-> dBm conversion. |
41 | */ | 41 | */ |
42 | #define MAX_SIGNAL 100 | ||
43 | #define MAX_RX_SSI -1 | ||
44 | #define DEFAULT_RSSI_OFFSET 120 | 42 | #define DEFAULT_RSSI_OFFSET 120 |
45 | 43 | ||
46 | /* | 44 | /* |
@@ -54,6 +52,11 @@ | |||
54 | #define RF_SIZE 0x0014 | 52 | #define RF_SIZE 0x0014 |
55 | 53 | ||
56 | /* | 54 | /* |
55 | * Number of TX queues. | ||
56 | */ | ||
57 | #define NUM_TX_QUEUES 4 | ||
58 | |||
59 | /* | ||
57 | * USB registers. | 60 | * USB registers. |
58 | */ | 61 | */ |
59 | 62 | ||