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-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c190
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.c229
-rw-r--r--drivers/net/wireless/rt2x00/rt2500pci.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c135
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h44
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00config.c164
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00debug.c22
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00debug.h13
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c16
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00lib.h3
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00mac.c12
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00pci.h8
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c254
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h2
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c239
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.h2
18 files changed, 586 insertions, 753 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 1adca7a1b9dc..42bd38ac7a1d 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -188,43 +188,34 @@ static void rt2400pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
188} 188}
189 189
190#ifdef CONFIG_RT2X00_LIB_DEBUGFS 190#ifdef CONFIG_RT2X00_LIB_DEBUGFS
191#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
192
193static void rt2400pci_read_csr(struct rt2x00_dev *rt2x00dev,
194 const unsigned int word, u32 *data)
195{
196 rt2x00pci_register_read(rt2x00dev, CSR_OFFSET(word), data);
197}
198
199static void rt2400pci_write_csr(struct rt2x00_dev *rt2x00dev,
200 const unsigned int word, u32 data)
201{
202 rt2x00pci_register_write(rt2x00dev, CSR_OFFSET(word), data);
203}
204
205static const struct rt2x00debug rt2400pci_rt2x00debug = { 191static const struct rt2x00debug rt2400pci_rt2x00debug = {
206 .owner = THIS_MODULE, 192 .owner = THIS_MODULE,
207 .csr = { 193 .csr = {
208 .read = rt2400pci_read_csr, 194 .read = rt2x00pci_register_read,
209 .write = rt2400pci_write_csr, 195 .write = rt2x00pci_register_write,
196 .flags = RT2X00DEBUGFS_OFFSET,
197 .word_base = CSR_REG_BASE,
210 .word_size = sizeof(u32), 198 .word_size = sizeof(u32),
211 .word_count = CSR_REG_SIZE / sizeof(u32), 199 .word_count = CSR_REG_SIZE / sizeof(u32),
212 }, 200 },
213 .eeprom = { 201 .eeprom = {
214 .read = rt2x00_eeprom_read, 202 .read = rt2x00_eeprom_read,
215 .write = rt2x00_eeprom_write, 203 .write = rt2x00_eeprom_write,
204 .word_base = EEPROM_BASE,
216 .word_size = sizeof(u16), 205 .word_size = sizeof(u16),
217 .word_count = EEPROM_SIZE / sizeof(u16), 206 .word_count = EEPROM_SIZE / sizeof(u16),
218 }, 207 },
219 .bbp = { 208 .bbp = {
220 .read = rt2400pci_bbp_read, 209 .read = rt2400pci_bbp_read,
221 .write = rt2400pci_bbp_write, 210 .write = rt2400pci_bbp_write,
211 .word_base = BBP_BASE,
222 .word_size = sizeof(u8), 212 .word_size = sizeof(u8),
223 .word_count = BBP_SIZE / sizeof(u8), 213 .word_count = BBP_SIZE / sizeof(u8),
224 }, 214 },
225 .rf = { 215 .rf = {
226 .read = rt2x00_rf_read, 216 .read = rt2x00_rf_read,
227 .write = rt2400pci_rf_write, 217 .write = rt2400pci_rf_write,
218 .word_base = RF_BASE,
228 .word_size = sizeof(u32), 219 .word_size = sizeof(u32),
229 .word_count = RF_SIZE / sizeof(u32), 220 .word_count = RF_SIZE / sizeof(u32),
230 }, 221 },
@@ -396,12 +387,74 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
396 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 387 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
397 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 388 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
398 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 389 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
390
391 rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
392
393 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
394 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
395 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
396
397 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
398 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
399 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
400 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
401
402 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
403 rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);
404 rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);
405 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
399} 406}
400 407
401static void rt2400pci_config_phymode(struct rt2x00_dev *rt2x00dev, 408static void rt2400pci_config_ant(struct rt2x00_dev *rt2x00dev,
402 const int basic_rate_mask) 409 struct antenna_setup *ant)
403{ 410{
404 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask); 411 u8 r1;
412 u8 r4;
413
414 /*
415 * We should never come here because rt2x00lib is supposed
416 * to catch this and send us the correct antenna explicitely.
417 */
418 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
419 ant->tx == ANTENNA_SW_DIVERSITY);
420
421 rt2400pci_bbp_read(rt2x00dev, 4, &r4);
422 rt2400pci_bbp_read(rt2x00dev, 1, &r1);
423
424 /*
425 * Configure the TX antenna.
426 */
427 switch (ant->tx) {
428 case ANTENNA_HW_DIVERSITY:
429 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);
430 break;
431 case ANTENNA_A:
432 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);
433 break;
434 case ANTENNA_B:
435 default:
436 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);
437 break;
438 }
439
440 /*
441 * Configure the RX antenna.
442 */
443 switch (ant->rx) {
444 case ANTENNA_HW_DIVERSITY:
445 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
446 break;
447 case ANTENNA_A:
448 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);
449 break;
450 case ANTENNA_B:
451 default:
452 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
453 break;
454 }
455
456 rt2400pci_bbp_write(rt2x00dev, 4, r4);
457 rt2400pci_bbp_write(rt2x00dev, 1, r1);
405} 458}
406 459
407static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev, 460static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -460,56 +513,17 @@ static void rt2400pci_config_txpower(struct rt2x00_dev *rt2x00dev, int txpower)
460 rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower)); 513 rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower));
461} 514}
462 515
463static void rt2400pci_config_antenna(struct rt2x00_dev *rt2x00dev, 516static void rt2400pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
464 struct antenna_setup *ant) 517 struct rt2x00lib_conf *libconf)
465{ 518{
466 u8 r1; 519 u32 reg;
467 u8 r4;
468
469 /*
470 * We should never come here because rt2x00lib is supposed
471 * to catch this and send us the correct antenna explicitely.
472 */
473 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
474 ant->tx == ANTENNA_SW_DIVERSITY);
475
476 rt2400pci_bbp_read(rt2x00dev, 4, &r4);
477 rt2400pci_bbp_read(rt2x00dev, 1, &r1);
478
479 /*
480 * Configure the TX antenna.
481 */
482 switch (ant->tx) {
483 case ANTENNA_HW_DIVERSITY:
484 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);
485 break;
486 case ANTENNA_A:
487 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);
488 break;
489 case ANTENNA_B:
490 default:
491 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);
492 break;
493 }
494
495 /*
496 * Configure the RX antenna.
497 */
498 switch (ant->rx) {
499 case ANTENNA_HW_DIVERSITY:
500 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
501 break;
502 case ANTENNA_A:
503 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);
504 break;
505 case ANTENNA_B:
506 default:
507 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
508 break;
509 }
510 520
511 rt2400pci_bbp_write(rt2x00dev, 4, r4); 521 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
512 rt2400pci_bbp_write(rt2x00dev, 1, r1); 522 rt2x00_set_field32(&reg, CSR11_LONG_RETRY,
523 libconf->conf->long_frame_max_tx_count);
524 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,
525 libconf->conf->short_frame_max_tx_count);
526 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
513} 527}
514 528
515static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev, 529static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -517,20 +531,6 @@ static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
517{ 531{
518 u32 reg; 532 u32 reg;
519 533
520 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
521 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
522 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
523
524 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
525 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
526 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
527 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
528
529 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
530 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
531 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
532 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
533
534 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 534 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
535 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER); 535 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
536 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1); 536 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -548,16 +548,14 @@ static void rt2400pci_config(struct rt2x00_dev *rt2x00dev,
548 struct rt2x00lib_conf *libconf, 548 struct rt2x00lib_conf *libconf,
549 const unsigned int flags) 549 const unsigned int flags)
550{ 550{
551 if (flags & CONFIG_UPDATE_PHYMODE) 551 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
552 rt2400pci_config_phymode(rt2x00dev, libconf->basic_rates);
553 if (flags & CONFIG_UPDATE_CHANNEL)
554 rt2400pci_config_channel(rt2x00dev, &libconf->rf); 552 rt2400pci_config_channel(rt2x00dev, &libconf->rf);
555 if (flags & CONFIG_UPDATE_TXPOWER) 553 if (flags & IEEE80211_CONF_CHANGE_POWER)
556 rt2400pci_config_txpower(rt2x00dev, 554 rt2400pci_config_txpower(rt2x00dev,
557 libconf->conf->power_level); 555 libconf->conf->power_level);
558 if (flags & CONFIG_UPDATE_ANTENNA) 556 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
559 rt2400pci_config_antenna(rt2x00dev, &libconf->ant); 557 rt2400pci_config_retry_limit(rt2x00dev, libconf);
560 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 558 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
561 rt2400pci_config_duration(rt2x00dev, libconf); 559 rt2400pci_config_duration(rt2x00dev, libconf);
562} 560}
563 561
@@ -1502,20 +1500,6 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1502/* 1500/*
1503 * IEEE80211 stack callback functions. 1501 * IEEE80211 stack callback functions.
1504 */ 1502 */
1505static int rt2400pci_set_retry_limit(struct ieee80211_hw *hw,
1506 u32 short_retry, u32 long_retry)
1507{
1508 struct rt2x00_dev *rt2x00dev = hw->priv;
1509 u32 reg;
1510
1511 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
1512 rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);
1513 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);
1514 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
1515
1516 return 0;
1517}
1518
1519static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue, 1503static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue,
1520 const struct ieee80211_tx_queue_params *params) 1504 const struct ieee80211_tx_queue_params *params)
1521{ 1505{
@@ -1601,8 +1585,8 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = {
1601 .config_filter = rt2400pci_config_filter, 1585 .config_filter = rt2400pci_config_filter,
1602 .config_intf = rt2400pci_config_intf, 1586 .config_intf = rt2400pci_config_intf,
1603 .config_erp = rt2400pci_config_erp, 1587 .config_erp = rt2400pci_config_erp,
1588 .config_ant = rt2400pci_config_ant,
1604 .config = rt2400pci_config, 1589 .config = rt2400pci_config,
1605 .set_retry_limit = rt2400pci_set_retry_limit,
1606}; 1590};
1607 1591
1608static const struct data_queue_desc rt2400pci_queue_rx = { 1592static const struct data_queue_desc rt2400pci_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.h b/drivers/net/wireless/rt2x00/rt2400pci.h
index bbff381ce396..9aefda4ab3c2 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.h
+++ b/drivers/net/wireless/rt2x00/rt2400pci.h
@@ -46,7 +46,9 @@
46#define CSR_REG_SIZE 0x014c 46#define CSR_REG_SIZE 0x014c
47#define EEPROM_BASE 0x0000 47#define EEPROM_BASE 0x0000
48#define EEPROM_SIZE 0x0100 48#define EEPROM_SIZE 0x0100
49#define BBP_BASE 0x0000
49#define BBP_SIZE 0x0020 50#define BBP_SIZE 0x0020
51#define RF_BASE 0x0000
50#define RF_SIZE 0x0010 52#define RF_SIZE 0x0010
51 53
52/* 54/*
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.c b/drivers/net/wireless/rt2x00/rt2500pci.c
index 85b0387f46eb..928452f30c25 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.c
+++ b/drivers/net/wireless/rt2x00/rt2500pci.c
@@ -188,43 +188,34 @@ static void rt2500pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
188} 188}
189 189
190#ifdef CONFIG_RT2X00_LIB_DEBUGFS 190#ifdef CONFIG_RT2X00_LIB_DEBUGFS
191#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
192
193static void rt2500pci_read_csr(struct rt2x00_dev *rt2x00dev,
194 const unsigned int word, u32 *data)
195{
196 rt2x00pci_register_read(rt2x00dev, CSR_OFFSET(word), data);
197}
198
199static void rt2500pci_write_csr(struct rt2x00_dev *rt2x00dev,
200 const unsigned int word, u32 data)
201{
202 rt2x00pci_register_write(rt2x00dev, CSR_OFFSET(word), data);
203}
204
205static const struct rt2x00debug rt2500pci_rt2x00debug = { 191static const struct rt2x00debug rt2500pci_rt2x00debug = {
206 .owner = THIS_MODULE, 192 .owner = THIS_MODULE,
207 .csr = { 193 .csr = {
208 .read = rt2500pci_read_csr, 194 .read = rt2x00pci_register_read,
209 .write = rt2500pci_write_csr, 195 .write = rt2x00pci_register_write,
196 .flags = RT2X00DEBUGFS_OFFSET,
197 .word_base = CSR_REG_BASE,
210 .word_size = sizeof(u32), 198 .word_size = sizeof(u32),
211 .word_count = CSR_REG_SIZE / sizeof(u32), 199 .word_count = CSR_REG_SIZE / sizeof(u32),
212 }, 200 },
213 .eeprom = { 201 .eeprom = {
214 .read = rt2x00_eeprom_read, 202 .read = rt2x00_eeprom_read,
215 .write = rt2x00_eeprom_write, 203 .write = rt2x00_eeprom_write,
204 .word_base = EEPROM_BASE,
216 .word_size = sizeof(u16), 205 .word_size = sizeof(u16),
217 .word_count = EEPROM_SIZE / sizeof(u16), 206 .word_count = EEPROM_SIZE / sizeof(u16),
218 }, 207 },
219 .bbp = { 208 .bbp = {
220 .read = rt2500pci_bbp_read, 209 .read = rt2500pci_bbp_read,
221 .write = rt2500pci_bbp_write, 210 .write = rt2500pci_bbp_write,
211 .word_base = BBP_BASE,
222 .word_size = sizeof(u8), 212 .word_size = sizeof(u8),
223 .word_count = BBP_SIZE / sizeof(u8), 213 .word_count = BBP_SIZE / sizeof(u8),
224 }, 214 },
225 .rf = { 215 .rf = {
226 .read = rt2x00_rf_read, 216 .read = rt2x00_rf_read,
227 .write = rt2500pci_rf_write, 217 .write = rt2500pci_rf_write,
218 .word_base = RF_BASE,
228 .word_size = sizeof(u32), 219 .word_size = sizeof(u32),
229 .word_count = RF_SIZE / sizeof(u32), 220 .word_count = RF_SIZE / sizeof(u32),
230 }, 221 },
@@ -402,12 +393,94 @@ static void rt2500pci_config_erp(struct rt2x00_dev *rt2x00dev,
402 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 393 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
403 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 394 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
404 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 395 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
396
397 rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
398
399 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
400 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
401 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
402
403 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
404 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
405 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
406 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
407
408 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
409 rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);
410 rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);
411 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
405} 412}
406 413
407static void rt2500pci_config_phymode(struct rt2x00_dev *rt2x00dev, 414static void rt2500pci_config_ant(struct rt2x00_dev *rt2x00dev,
408 const int basic_rate_mask) 415 struct antenna_setup *ant)
409{ 416{
410 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask); 417 u32 reg;
418 u8 r14;
419 u8 r2;
420
421 /*
422 * We should never come here because rt2x00lib is supposed
423 * to catch this and send us the correct antenna explicitely.
424 */
425 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
426 ant->tx == ANTENNA_SW_DIVERSITY);
427
428 rt2x00pci_register_read(rt2x00dev, BBPCSR1, &reg);
429 rt2500pci_bbp_read(rt2x00dev, 14, &r14);
430 rt2500pci_bbp_read(rt2x00dev, 2, &r2);
431
432 /*
433 * Configure the TX antenna.
434 */
435 switch (ant->tx) {
436 case ANTENNA_A:
437 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0);
438 rt2x00_set_field32(&reg, BBPCSR1_CCK, 0);
439 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 0);
440 break;
441 case ANTENNA_B:
442 default:
443 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
444 rt2x00_set_field32(&reg, BBPCSR1_CCK, 2);
445 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 2);
446 break;
447 }
448
449 /*
450 * Configure the RX antenna.
451 */
452 switch (ant->rx) {
453 case ANTENNA_A:
454 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
455 break;
456 case ANTENNA_B:
457 default:
458 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
459 break;
460 }
461
462 /*
463 * RT2525E and RT5222 need to flip TX I/Q
464 */
465 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
466 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
467 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
468 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);
469 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);
470
471 /*
472 * RT2525E does not need RX I/Q Flip.
473 */
474 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
475 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
476 } else {
477 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);
478 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 0);
479 }
480
481 rt2x00pci_register_write(rt2x00dev, BBPCSR1, reg);
482 rt2500pci_bbp_write(rt2x00dev, 14, r14);
483 rt2500pci_bbp_write(rt2x00dev, 2, r2);
411} 484}
412 485
413static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev, 486static void rt2500pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -489,76 +562,17 @@ static void rt2500pci_config_txpower(struct rt2x00_dev *rt2x00dev,
489 rt2500pci_rf_write(rt2x00dev, 3, rf3); 562 rt2500pci_rf_write(rt2x00dev, 3, rf3);
490} 563}
491 564
492static void rt2500pci_config_antenna(struct rt2x00_dev *rt2x00dev, 565static void rt2500pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
493 struct antenna_setup *ant) 566 struct rt2x00lib_conf *libconf)
494{ 567{
495 u32 reg; 568 u32 reg;
496 u8 r14;
497 u8 r2;
498
499 /*
500 * We should never come here because rt2x00lib is supposed
501 * to catch this and send us the correct antenna explicitely.
502 */
503 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
504 ant->tx == ANTENNA_SW_DIVERSITY);
505
506 rt2x00pci_register_read(rt2x00dev, BBPCSR1, &reg);
507 rt2500pci_bbp_read(rt2x00dev, 14, &r14);
508 rt2500pci_bbp_read(rt2x00dev, 2, &r2);
509 569
510 /* 570 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
511 * Configure the TX antenna. 571 rt2x00_set_field32(&reg, CSR11_LONG_RETRY,
512 */ 572 libconf->conf->long_frame_max_tx_count);
513 switch (ant->tx) { 573 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,
514 case ANTENNA_A: 574 libconf->conf->short_frame_max_tx_count);
515 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 0); 575 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
516 rt2x00_set_field32(&reg, BBPCSR1_CCK, 0);
517 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 0);
518 break;
519 case ANTENNA_B:
520 default:
521 rt2x00_set_field8(&r2, BBP_R2_TX_ANTENNA, 2);
522 rt2x00_set_field32(&reg, BBPCSR1_CCK, 2);
523 rt2x00_set_field32(&reg, BBPCSR1_OFDM, 2);
524 break;
525 }
526
527 /*
528 * Configure the RX antenna.
529 */
530 switch (ant->rx) {
531 case ANTENNA_A:
532 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 0);
533 break;
534 case ANTENNA_B:
535 default:
536 rt2x00_set_field8(&r14, BBP_R14_RX_ANTENNA, 2);
537 break;
538 }
539
540 /*
541 * RT2525E and RT5222 need to flip TX I/Q
542 */
543 if (rt2x00_rf(&rt2x00dev->chip, RF2525E) ||
544 rt2x00_rf(&rt2x00dev->chip, RF5222)) {
545 rt2x00_set_field8(&r2, BBP_R2_TX_IQ_FLIP, 1);
546 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 1);
547 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 1);
548
549 /*
550 * RT2525E does not need RX I/Q Flip.
551 */
552 if (rt2x00_rf(&rt2x00dev->chip, RF2525E))
553 rt2x00_set_field8(&r14, BBP_R14_RX_IQ_FLIP, 0);
554 } else {
555 rt2x00_set_field32(&reg, BBPCSR1_CCK_FLIP, 0);
556 rt2x00_set_field32(&reg, BBPCSR1_OFDM_FLIP, 0);
557 }
558
559 rt2x00pci_register_write(rt2x00dev, BBPCSR1, reg);
560 rt2500pci_bbp_write(rt2x00dev, 14, r14);
561 rt2500pci_bbp_write(rt2x00dev, 2, r2);
562} 576}
563 577
564static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev, 578static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -566,20 +580,6 @@ static void rt2500pci_config_duration(struct rt2x00_dev *rt2x00dev,
566{ 580{
567 u32 reg; 581 u32 reg;
568 582
569 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
570 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
571 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
572
573 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
574 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
575 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
576 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
577
578 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
579 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
580 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
581 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
582
583 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 583 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
584 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER); 584 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
585 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1); 585 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -597,17 +597,16 @@ static void rt2500pci_config(struct rt2x00_dev *rt2x00dev,
597 struct rt2x00lib_conf *libconf, 597 struct rt2x00lib_conf *libconf,
598 const unsigned int flags) 598 const unsigned int flags)
599{ 599{
600 if (flags & CONFIG_UPDATE_PHYMODE) 600 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
601 rt2500pci_config_phymode(rt2x00dev, libconf->basic_rates);
602 if (flags & CONFIG_UPDATE_CHANNEL)
603 rt2500pci_config_channel(rt2x00dev, &libconf->rf, 601 rt2500pci_config_channel(rt2x00dev, &libconf->rf,
604 libconf->conf->power_level); 602 libconf->conf->power_level);
605 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 603 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
604 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
606 rt2500pci_config_txpower(rt2x00dev, 605 rt2500pci_config_txpower(rt2x00dev,
607 libconf->conf->power_level); 606 libconf->conf->power_level);
608 if (flags & CONFIG_UPDATE_ANTENNA) 607 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
609 rt2500pci_config_antenna(rt2x00dev, &libconf->ant); 608 rt2500pci_config_retry_limit(rt2x00dev, libconf);
610 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 609 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
611 rt2500pci_config_duration(rt2x00dev, libconf); 610 rt2500pci_config_duration(rt2x00dev, libconf);
612} 611}
613 612
@@ -1827,20 +1826,6 @@ static int rt2500pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1827/* 1826/*
1828 * IEEE80211 stack callback functions. 1827 * IEEE80211 stack callback functions.
1829 */ 1828 */
1830static int rt2500pci_set_retry_limit(struct ieee80211_hw *hw,
1831 u32 short_retry, u32 long_retry)
1832{
1833 struct rt2x00_dev *rt2x00dev = hw->priv;
1834 u32 reg;
1835
1836 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
1837 rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);
1838 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);
1839 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
1840
1841 return 0;
1842}
1843
1844static u64 rt2500pci_get_tsf(struct ieee80211_hw *hw) 1829static u64 rt2500pci_get_tsf(struct ieee80211_hw *hw)
1845{ 1830{
1846 struct rt2x00_dev *rt2x00dev = hw->priv; 1831 struct rt2x00_dev *rt2x00dev = hw->priv;
@@ -1901,8 +1886,8 @@ static const struct rt2x00lib_ops rt2500pci_rt2x00_ops = {
1901 .config_filter = rt2500pci_config_filter, 1886 .config_filter = rt2500pci_config_filter,
1902 .config_intf = rt2500pci_config_intf, 1887 .config_intf = rt2500pci_config_intf,
1903 .config_erp = rt2500pci_config_erp, 1888 .config_erp = rt2500pci_config_erp,
1889 .config_ant = rt2500pci_config_ant,
1904 .config = rt2500pci_config, 1890 .config = rt2500pci_config,
1905 .set_retry_limit = rt2500pci_set_retry_limit,
1906}; 1891};
1907 1892
1908static const struct data_queue_desc rt2500pci_queue_rx = { 1893static const struct data_queue_desc rt2500pci_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt2500pci.h b/drivers/net/wireless/rt2x00/rt2500pci.h
index 8c26bef6cf49..e135247f7f89 100644
--- a/drivers/net/wireless/rt2x00/rt2500pci.h
+++ b/drivers/net/wireless/rt2x00/rt2500pci.h
@@ -57,7 +57,9 @@
57#define CSR_REG_SIZE 0x0174 57#define CSR_REG_SIZE 0x0174
58#define EEPROM_BASE 0x0000 58#define EEPROM_BASE 0x0000
59#define EEPROM_SIZE 0x0200 59#define EEPROM_SIZE 0x0200
60#define BBP_BASE 0x0000
60#define BBP_SIZE 0x0040 61#define BBP_SIZE 0x0040
62#define RF_BASE 0x0000
61#define RF_SIZE 0x0014 63#define RF_SIZE 0x0014
62 64
63/* 65/*
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index d19bee43861d..639d5a2f84e2 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -245,43 +245,48 @@ rf_write:
245} 245}
246 246
247#ifdef CONFIG_RT2X00_LIB_DEBUGFS 247#ifdef CONFIG_RT2X00_LIB_DEBUGFS
248#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u16)) ) 248static void _rt2500usb_register_read(struct rt2x00_dev *rt2x00dev,
249 249 const unsigned int offset,
250static void rt2500usb_read_csr(struct rt2x00_dev *rt2x00dev, 250 u32 *value)
251 const unsigned int word, u32 *data)
252{ 251{
253 rt2500usb_register_read(rt2x00dev, CSR_OFFSET(word), (u16 *) data); 252 rt2500usb_register_read(rt2x00dev, offset, (u16 *)value);
254} 253}
255 254
256static void rt2500usb_write_csr(struct rt2x00_dev *rt2x00dev, 255static void _rt2500usb_register_write(struct rt2x00_dev *rt2x00dev,
257 const unsigned int word, u32 data) 256 const unsigned int offset,
257 u32 value)
258{ 258{
259 rt2500usb_register_write(rt2x00dev, CSR_OFFSET(word), data); 259 rt2500usb_register_write(rt2x00dev, offset, value);
260} 260}
261 261
262static const struct rt2x00debug rt2500usb_rt2x00debug = { 262static const struct rt2x00debug rt2500usb_rt2x00debug = {
263 .owner = THIS_MODULE, 263 .owner = THIS_MODULE,
264 .csr = { 264 .csr = {
265 .read = rt2500usb_read_csr, 265 .read = _rt2500usb_register_read,
266 .write = rt2500usb_write_csr, 266 .write = _rt2500usb_register_write,
267 .flags = RT2X00DEBUGFS_OFFSET,
268 .word_base = CSR_REG_BASE,
267 .word_size = sizeof(u16), 269 .word_size = sizeof(u16),
268 .word_count = CSR_REG_SIZE / sizeof(u16), 270 .word_count = CSR_REG_SIZE / sizeof(u16),
269 }, 271 },
270 .eeprom = { 272 .eeprom = {
271 .read = rt2x00_eeprom_read, 273 .read = rt2x00_eeprom_read,
272 .write = rt2x00_eeprom_write, 274 .write = rt2x00_eeprom_write,
275 .word_base = EEPROM_BASE,
273 .word_size = sizeof(u16), 276 .word_size = sizeof(u16),
274 .word_count = EEPROM_SIZE / sizeof(u16), 277 .word_count = EEPROM_SIZE / sizeof(u16),
275 }, 278 },
276 .bbp = { 279 .bbp = {
277 .read = rt2500usb_bbp_read, 280 .read = rt2500usb_bbp_read,
278 .write = rt2500usb_bbp_write, 281 .write = rt2500usb_bbp_write,
282 .word_base = BBP_BASE,
279 .word_size = sizeof(u8), 283 .word_size = sizeof(u8),
280 .word_count = BBP_SIZE / sizeof(u8), 284 .word_count = BBP_SIZE / sizeof(u8),
281 }, 285 },
282 .rf = { 286 .rf = {
283 .read = rt2x00_rf_read, 287 .read = rt2x00_rf_read,
284 .write = rt2500usb_rf_write, 288 .write = rt2500usb_rf_write,
289 .word_base = RF_BASE,
285 .word_size = sizeof(u32), 290 .word_size = sizeof(u32),
286 .word_count = RF_SIZE / sizeof(u32), 291 .word_count = RF_SIZE / sizeof(u32),
287 }, 292 },
@@ -423,57 +428,16 @@ static void rt2500usb_config_erp(struct rt2x00_dev *rt2x00dev,
423 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE, 428 rt2x00_set_field16(&reg, TXRX_CSR10_AUTORESPOND_PREAMBLE,
424 !!erp->short_preamble); 429 !!erp->short_preamble);
425 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg); 430 rt2500usb_register_write(rt2x00dev, TXRX_CSR10, reg);
426}
427
428static void rt2500usb_config_phymode(struct rt2x00_dev *rt2x00dev,
429 const int basic_rate_mask)
430{
431 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, basic_rate_mask);
432}
433 431
434static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev, 432 rt2500usb_register_write(rt2x00dev, TXRX_CSR11, erp->basic_rates);
435 struct rf_channel *rf, const int txpower)
436{
437 /*
438 * Set TXpower.
439 */
440 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
441 433
442 /* 434 rt2500usb_register_write(rt2x00dev, MAC_CSR10, erp->slot_time);
443 * For RT2525E we should first set the channel to half band higher. 435 rt2500usb_register_write(rt2x00dev, MAC_CSR11, erp->sifs);
444 */ 436 rt2500usb_register_write(rt2x00dev, MAC_CSR12, erp->eifs);
445 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
446 static const u32 vals[] = {
447 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
448 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
449 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
450 0x00000902, 0x00000906
451 };
452
453 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
454 if (rf->rf4)
455 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
456 }
457
458 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
459 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
460 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
461 if (rf->rf4)
462 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
463}
464
465static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
466 const int txpower)
467{
468 u32 rf3;
469
470 rt2x00_rf_read(rt2x00dev, 3, &rf3);
471 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
472 rt2500usb_rf_write(rt2x00dev, 3, rf3);
473} 437}
474 438
475static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev, 439static void rt2500usb_config_ant(struct rt2x00_dev *rt2x00dev,
476 struct antenna_setup *ant) 440 struct antenna_setup *ant)
477{ 441{
478 u8 r2; 442 u8 r2;
479 u8 r14; 443 u8 r14;
@@ -555,15 +519,52 @@ static void rt2500usb_config_antenna(struct rt2x00_dev *rt2x00dev,
555 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6); 519 rt2500usb_register_write(rt2x00dev, PHY_CSR6, csr6);
556} 520}
557 521
522static void rt2500usb_config_channel(struct rt2x00_dev *rt2x00dev,
523 struct rf_channel *rf, const int txpower)
524{
525 /*
526 * Set TXpower.
527 */
528 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
529
530 /*
531 * For RT2525E we should first set the channel to half band higher.
532 */
533 if (rt2x00_rf(&rt2x00dev->chip, RF2525E)) {
534 static const u32 vals[] = {
535 0x000008aa, 0x000008ae, 0x000008ae, 0x000008b2,
536 0x000008b2, 0x000008b6, 0x000008b6, 0x000008ba,
537 0x000008ba, 0x000008be, 0x000008b7, 0x00000902,
538 0x00000902, 0x00000906
539 };
540
541 rt2500usb_rf_write(rt2x00dev, 2, vals[rf->channel - 1]);
542 if (rf->rf4)
543 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
544 }
545
546 rt2500usb_rf_write(rt2x00dev, 1, rf->rf1);
547 rt2500usb_rf_write(rt2x00dev, 2, rf->rf2);
548 rt2500usb_rf_write(rt2x00dev, 3, rf->rf3);
549 if (rf->rf4)
550 rt2500usb_rf_write(rt2x00dev, 4, rf->rf4);
551}
552
553static void rt2500usb_config_txpower(struct rt2x00_dev *rt2x00dev,
554 const int txpower)
555{
556 u32 rf3;
557
558 rt2x00_rf_read(rt2x00dev, 3, &rf3);
559 rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
560 rt2500usb_rf_write(rt2x00dev, 3, rf3);
561}
562
558static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev, 563static void rt2500usb_config_duration(struct rt2x00_dev *rt2x00dev,
559 struct rt2x00lib_conf *libconf) 564 struct rt2x00lib_conf *libconf)
560{ 565{
561 u16 reg; 566 u16 reg;
562 567
563 rt2500usb_register_write(rt2x00dev, MAC_CSR10, libconf->slot_time);
564 rt2500usb_register_write(rt2x00dev, MAC_CSR11, libconf->sifs);
565 rt2500usb_register_write(rt2x00dev, MAC_CSR12, libconf->eifs);
566
567 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg); 568 rt2500usb_register_read(rt2x00dev, TXRX_CSR18, &reg);
568 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL, 569 rt2x00_set_field16(&reg, TXRX_CSR18_INTERVAL,
569 libconf->conf->beacon_int * 4); 570 libconf->conf->beacon_int * 4);
@@ -574,17 +575,14 @@ static void rt2500usb_config(struct rt2x00_dev *rt2x00dev,
574 struct rt2x00lib_conf *libconf, 575 struct rt2x00lib_conf *libconf,
575 const unsigned int flags) 576 const unsigned int flags)
576{ 577{
577 if (flags & CONFIG_UPDATE_PHYMODE) 578 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
578 rt2500usb_config_phymode(rt2x00dev, libconf->basic_rates);
579 if (flags & CONFIG_UPDATE_CHANNEL)
580 rt2500usb_config_channel(rt2x00dev, &libconf->rf, 579 rt2500usb_config_channel(rt2x00dev, &libconf->rf,
581 libconf->conf->power_level); 580 libconf->conf->power_level);
582 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 581 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
582 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
583 rt2500usb_config_txpower(rt2x00dev, 583 rt2500usb_config_txpower(rt2x00dev,
584 libconf->conf->power_level); 584 libconf->conf->power_level);
585 if (flags & CONFIG_UPDATE_ANTENNA) 585 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
586 rt2500usb_config_antenna(rt2x00dev, &libconf->ant);
587 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
588 rt2500usb_config_duration(rt2x00dev, libconf); 586 rt2500usb_config_duration(rt2x00dev, libconf);
589} 587}
590 588
@@ -1794,6 +1792,7 @@ static const struct rt2x00lib_ops rt2500usb_rt2x00_ops = {
1794 .config_filter = rt2500usb_config_filter, 1792 .config_filter = rt2500usb_config_filter,
1795 .config_intf = rt2500usb_config_intf, 1793 .config_intf = rt2500usb_config_intf,
1796 .config_erp = rt2500usb_config_erp, 1794 .config_erp = rt2500usb_config_erp,
1795 .config_ant = rt2500usb_config_ant,
1797 .config = rt2500usb_config, 1796 .config = rt2500usb_config,
1798}; 1797};
1799 1798
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.h b/drivers/net/wireless/rt2x00/rt2500usb.h
index 89e5ed24e4f7..dbb5d689e23d 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.h
+++ b/drivers/net/wireless/rt2x00/rt2500usb.h
@@ -57,7 +57,9 @@
57#define CSR_REG_SIZE 0x0100 57#define CSR_REG_SIZE 0x0100
58#define EEPROM_BASE 0x0000 58#define EEPROM_BASE 0x0000
59#define EEPROM_SIZE 0x006a 59#define EEPROM_SIZE 0x006a
60#define BBP_BASE 0x0000
60#define BBP_SIZE 0x0060 61#define BBP_SIZE 0x0060
62#define RF_BASE 0x0000
61#define RF_SIZE 0x0014 63#define RF_SIZE 0x0014
62 64
63/* 65/*
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 0887e895d5c1..f85eedbbad68 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -44,7 +44,7 @@
44/* 44/*
45 * Module information. 45 * Module information.
46 */ 46 */
47#define DRV_VERSION "2.2.1" 47#define DRV_VERSION "2.2.2"
48#define DRV_PROJECT "http://rt2x00.serialmonkey.com" 48#define DRV_PROJECT "http://rt2x00.serialmonkey.com"
49 49
50/* 50/*
@@ -348,13 +348,6 @@ struct rt2x00_intf {
348 spinlock_t lock; 348 spinlock_t lock;
349 349
350 /* 350 /*
351 * BSS configuration. Copied from the structure
352 * passed to us through the bss_info_changed()
353 * callback funtion.
354 */
355 struct ieee80211_bss_conf conf;
356
357 /*
358 * MAC of the device. 351 * MAC of the device.
359 */ 352 */
360 u8 mac[ETH_ALEN]; 353 u8 mac[ETH_ALEN];
@@ -433,18 +426,6 @@ struct rt2x00lib_conf {
433 426
434 struct rf_channel rf; 427 struct rf_channel rf;
435 struct channel_info channel; 428 struct channel_info channel;
436
437 struct antenna_setup ant;
438
439 enum ieee80211_band band;
440
441 u32 basic_rates;
442 u32 slot_time;
443
444 short sifs;
445 short pifs;
446 short difs;
447 short eifs;
448}; 429};
449 430
450/* 431/*
@@ -456,6 +437,15 @@ struct rt2x00lib_erp {
456 437
457 int ack_timeout; 438 int ack_timeout;
458 int ack_consume_time; 439 int ack_consume_time;
440
441 u64 basic_rates;
442
443 int slot_time;
444
445 short sifs;
446 short pifs;
447 short difs;
448 short eifs;
459}; 449};
460 450
461/* 451/*
@@ -589,19 +579,11 @@ struct rt2x00lib_ops {
589 579
590 void (*config_erp) (struct rt2x00_dev *rt2x00dev, 580 void (*config_erp) (struct rt2x00_dev *rt2x00dev,
591 struct rt2x00lib_erp *erp); 581 struct rt2x00lib_erp *erp);
582 void (*config_ant) (struct rt2x00_dev *rt2x00dev,
583 struct antenna_setup *ant);
592 void (*config) (struct rt2x00_dev *rt2x00dev, 584 void (*config) (struct rt2x00_dev *rt2x00dev,
593 struct rt2x00lib_conf *libconf, 585 struct rt2x00lib_conf *libconf,
594 const unsigned int flags); 586 const unsigned int changed_flags);
595#define CONFIG_UPDATE_PHYMODE ( 1 << 1 )
596#define CONFIG_UPDATE_CHANNEL ( 1 << 2 )
597#define CONFIG_UPDATE_TXPOWER ( 1 << 3 )
598#define CONFIG_UPDATE_ANTENNA ( 1 << 4 )
599#define CONFIG_UPDATE_SLOT_TIME ( 1 << 5 )
600#define CONFIG_UPDATE_BEACON_INT ( 1 << 6 )
601#define CONFIG_UPDATE_ALL 0xffff
602
603 int (*set_retry_limit) (struct ieee80211_hw *hw,
604 u32 short_limit, u32 long_limit);
605}; 587};
606 588
607/* 589/*
diff --git a/drivers/net/wireless/rt2x00/rt2x00config.c b/drivers/net/wireless/rt2x00/rt2x00config.c
index 7910147157b5..3e4eee3ab7d2 100644
--- a/drivers/net/wireless/rt2x00/rt2x00config.c
+++ b/drivers/net/wireless/rt2x00/rt2x00config.c
@@ -86,13 +86,14 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
86 erp.short_preamble = bss_conf->use_short_preamble; 86 erp.short_preamble = bss_conf->use_short_preamble;
87 erp.cts_protection = bss_conf->use_cts_prot; 87 erp.cts_protection = bss_conf->use_cts_prot;
88 88
89 erp.ack_timeout = PLCP + get_duration(ACK_SIZE, 10); 89 erp.slot_time = bss_conf->use_short_slot ? SHORT_SLOT_TIME : SLOT_TIME;
90 erp.ack_consume_time = SIFS + PLCP + get_duration(ACK_SIZE, 10); 90 erp.sifs = SIFS;
91 erp.pifs = bss_conf->use_short_slot ? SHORT_PIFS : PIFS;
92 erp.difs = bss_conf->use_short_slot ? SHORT_DIFS : DIFS;
93 erp.eifs = bss_conf->use_short_slot ? SHORT_EIFS : EIFS;
91 94
92 if (rt2x00dev->hw->conf.flags & IEEE80211_CONF_SHORT_SLOT_TIME) 95 erp.ack_timeout = PLCP + erp.difs + get_duration(ACK_SIZE, 10);
93 erp.ack_timeout += SHORT_DIFS; 96 erp.ack_consume_time = SIFS + PLCP + get_duration(ACK_SIZE, 10);
94 else
95 erp.ack_timeout += DIFS;
96 97
97 if (bss_conf->use_short_preamble) { 98 if (bss_conf->use_short_preamble) {
98 erp.ack_timeout += SHORT_PREAMBLE; 99 erp.ack_timeout += SHORT_PREAMBLE;
@@ -102,16 +103,18 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
102 erp.ack_consume_time += PREAMBLE; 103 erp.ack_consume_time += PREAMBLE;
103 } 104 }
104 105
106 erp.basic_rates = bss_conf->basic_rates;
107
105 rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp); 108 rt2x00dev->ops->lib->config_erp(rt2x00dev, &erp);
106} 109}
107 110
108void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev, 111void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
109 enum antenna rx, enum antenna tx) 112 enum antenna rx, enum antenna tx)
110{ 113{
111 struct rt2x00lib_conf libconf; 114 struct antenna_setup ant;
112 115
113 libconf.ant.rx = rx; 116 ant.rx = rx;
114 libconf.ant.tx = tx; 117 ant.tx = tx;
115 118
116 if (rx == rt2x00dev->link.ant.active.rx && 119 if (rx == rt2x00dev->link.ant.active.rx &&
117 tx == rt2x00dev->link.ant.active.tx) 120 tx == rt2x00dev->link.ant.active.tx)
@@ -129,111 +132,28 @@ void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
129 * The latter is required since we need to recalibrate the 132 * The latter is required since we need to recalibrate the
130 * noise-sensitivity ratio for the new setup. 133 * noise-sensitivity ratio for the new setup.
131 */ 134 */
132 rt2x00dev->ops->lib->config(rt2x00dev, &libconf, CONFIG_UPDATE_ANTENNA); 135 rt2x00dev->ops->lib->config_ant(rt2x00dev, &ant);
136
133 rt2x00lib_reset_link_tuner(rt2x00dev); 137 rt2x00lib_reset_link_tuner(rt2x00dev);
134 rt2x00_reset_link_ant_rssi(&rt2x00dev->link); 138 rt2x00_reset_link_ant_rssi(&rt2x00dev->link);
135 139
136 rt2x00dev->link.ant.active.rx = libconf.ant.rx; 140 memcpy(&rt2x00dev->link.ant.active, &ant, sizeof(ant));
137 rt2x00dev->link.ant.active.tx = libconf.ant.tx;
138 141
139 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags)) 142 if (test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
140 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON_LINK); 143 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON_LINK);
141} 144}
142 145
143static u32 rt2x00lib_get_basic_rates(struct ieee80211_supported_band *band)
144{
145 const struct rt2x00_rate *rate;
146 unsigned int i;
147 u32 mask = 0;
148
149 for (i = 0; i < band->n_bitrates; i++) {
150 rate = rt2x00_get_rate(band->bitrates[i].hw_value);
151 if (rate->flags & DEV_RATE_BASIC)
152 mask |= rate->ratemask;
153 }
154
155 return mask;
156}
157
158void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, 146void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
159 struct ieee80211_conf *conf, const int force_config) 147 struct ieee80211_conf *conf,
148 unsigned int ieee80211_flags)
160{ 149{
161 struct rt2x00lib_conf libconf; 150 struct rt2x00lib_conf libconf;
162 struct ieee80211_supported_band *band;
163 struct antenna_setup *default_ant = &rt2x00dev->default_ant;
164 struct antenna_setup *active_ant = &rt2x00dev->link.ant.active;
165 int flags = 0;
166 int short_slot_time;
167
168 /*
169 * In some situations we want to force all configurations
170 * to be reloaded (When resuming for instance).
171 */
172 if (force_config) {
173 flags = CONFIG_UPDATE_ALL;
174 goto config;
175 }
176
177 /*
178 * Check which configuration options have been
179 * updated and should be send to the device.
180 */
181 if (rt2x00dev->rx_status.band != conf->channel->band)
182 flags |= CONFIG_UPDATE_PHYMODE;
183 if (rt2x00dev->rx_status.freq != conf->channel->center_freq)
184 flags |= CONFIG_UPDATE_CHANNEL;
185 if (rt2x00dev->tx_power != conf->power_level)
186 flags |= CONFIG_UPDATE_TXPOWER;
187
188 /*
189 * Determining changes in the antenna setups request several checks:
190 * antenna_sel_{r,t}x = 0
191 * -> Does active_{r,t}x match default_{r,t}x
192 * -> Is default_{r,t}x SW_DIVERSITY
193 * antenna_sel_{r,t}x = 1/2
194 * -> Does active_{r,t}x match antenna_sel_{r,t}x
195 * The reason for not updating the antenna while SW diversity
196 * should be used is simple: Software diversity means that
197 * we should switch between the antenna's based on the
198 * quality. This means that the current antenna is good enough
199 * to work with untill the link tuner decides that an antenna
200 * switch should be performed.
201 */
202 if (default_ant->rx != ANTENNA_SW_DIVERSITY &&
203 default_ant->rx != active_ant->rx)
204 flags |= CONFIG_UPDATE_ANTENNA;
205 else if (active_ant->rx == ANTENNA_SW_DIVERSITY)
206 flags |= CONFIG_UPDATE_ANTENNA;
207
208 if (default_ant->tx != ANTENNA_SW_DIVERSITY &&
209 default_ant->tx != active_ant->tx)
210 flags |= CONFIG_UPDATE_ANTENNA;
211 else if (active_ant->tx == ANTENNA_SW_DIVERSITY)
212 flags |= CONFIG_UPDATE_ANTENNA;
213 151
214 /*
215 * The following configuration options are never
216 * stored anywhere and will always be updated.
217 */
218 flags |= CONFIG_UPDATE_SLOT_TIME;
219 flags |= CONFIG_UPDATE_BEACON_INT;
220
221 /*
222 * We have determined what options should be updated,
223 * now precalculate device configuration values depending
224 * on what configuration options need to be updated.
225 */
226config:
227 memset(&libconf, 0, sizeof(libconf)); 152 memset(&libconf, 0, sizeof(libconf));
228 153
229 if (flags & CONFIG_UPDATE_PHYMODE) { 154 libconf.conf = conf;
230 band = &rt2x00dev->bands[conf->channel->band];
231
232 libconf.band = conf->channel->band;
233 libconf.basic_rates = rt2x00lib_get_basic_rates(band);
234 }
235 155
236 if (flags & CONFIG_UPDATE_CHANNEL) { 156 if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL) {
237 memcpy(&libconf.rf, 157 memcpy(&libconf.rf,
238 &rt2x00dev->spec.channels[conf->channel->hw_value], 158 &rt2x00dev->spec.channels[conf->channel->hw_value],
239 sizeof(libconf.rf)); 159 sizeof(libconf.rf));
@@ -243,57 +163,21 @@ config:
243 sizeof(libconf.channel)); 163 sizeof(libconf.channel));
244 } 164 }
245 165
246 if (flags & CONFIG_UPDATE_ANTENNA) {
247 if (default_ant->rx != ANTENNA_SW_DIVERSITY)
248 libconf.ant.rx = default_ant->rx;
249 else if (active_ant->rx == ANTENNA_SW_DIVERSITY)
250 libconf.ant.rx = ANTENNA_B;
251 else
252 libconf.ant.rx = active_ant->rx;
253
254 if (default_ant->tx != ANTENNA_SW_DIVERSITY)
255 libconf.ant.tx = default_ant->tx;
256 else if (active_ant->tx == ANTENNA_SW_DIVERSITY)
257 libconf.ant.tx = ANTENNA_B;
258 else
259 libconf.ant.tx = active_ant->tx;
260 }
261
262 if (flags & CONFIG_UPDATE_SLOT_TIME) {
263 short_slot_time = conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME;
264
265 libconf.slot_time =
266 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME;
267 libconf.sifs = SIFS;
268 libconf.pifs = short_slot_time ? SHORT_PIFS : PIFS;
269 libconf.difs = short_slot_time ? SHORT_DIFS : DIFS;
270 libconf.eifs = short_slot_time ? SHORT_EIFS : EIFS;
271 }
272
273 libconf.conf = conf;
274
275 /* 166 /*
276 * Start configuration. 167 * Start configuration.
277 */ 168 */
278 rt2x00dev->ops->lib->config(rt2x00dev, &libconf, flags); 169 rt2x00dev->ops->lib->config(rt2x00dev, &libconf, ieee80211_flags);
279 170
280 /* 171 /*
281 * Some configuration changes affect the link quality 172 * Some configuration changes affect the link quality
282 * which means we need to reset the link tuner. 173 * which means we need to reset the link tuner.
283 */ 174 */
284 if (flags & (CONFIG_UPDATE_CHANNEL | CONFIG_UPDATE_ANTENNA)) 175 if (ieee80211_flags & IEEE80211_CONF_CHANGE_CHANNEL)
285 rt2x00lib_reset_link_tuner(rt2x00dev); 176 rt2x00lib_reset_link_tuner(rt2x00dev);
286 177
287 if (flags & CONFIG_UPDATE_PHYMODE) { 178 rt2x00dev->curr_band = conf->channel->band;
288 rt2x00dev->curr_band = conf->channel->band;
289 rt2x00dev->rx_status.band = conf->channel->band;
290 }
291
292 rt2x00dev->rx_status.freq = conf->channel->center_freq;
293 rt2x00dev->tx_power = conf->power_level; 179 rt2x00dev->tx_power = conf->power_level;
294 180
295 if (flags & CONFIG_UPDATE_ANTENNA) { 181 rt2x00dev->rx_status.band = conf->channel->band;
296 rt2x00dev->link.ant.active.rx = libconf.ant.rx; 182 rt2x00dev->rx_status.freq = conf->channel->center_freq;
297 rt2x00dev->link.ant.active.tx = libconf.ant.tx;
298 }
299} 183}
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.c b/drivers/net/wireless/rt2x00/rt2x00debug.c
index a31418a700c1..54dd10060bf1 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.c
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.c
@@ -424,16 +424,21 @@ static ssize_t rt2x00debug_read_##__name(struct file *file, \
424 const struct rt2x00debug *debug = intf->debug; \ 424 const struct rt2x00debug *debug = intf->debug; \
425 char line[16]; \ 425 char line[16]; \
426 size_t size; \ 426 size_t size; \
427 unsigned int index = intf->offset_##__name; \
427 __type value; \ 428 __type value; \
428 \ 429 \
429 if (*offset) \ 430 if (*offset) \
430 return 0; \ 431 return 0; \
431 \ 432 \
432 if (intf->offset_##__name >= debug->__name.word_count) \ 433 if (index >= debug->__name.word_count) \
433 return -EINVAL; \ 434 return -EINVAL; \
434 \ 435 \
435 debug->__name.read(intf->rt2x00dev, \ 436 if (debug->__name.flags & RT2X00DEBUGFS_OFFSET) \
436 intf->offset_##__name, &value); \ 437 index *= debug->__name.word_size; \
438 \
439 index += debug->__name.word_base; \
440 \
441 debug->__name.read(intf->rt2x00dev, index, &value); \
437 \ 442 \
438 size = sprintf(line, __format, value); \ 443 size = sprintf(line, __format, value); \
439 \ 444 \
@@ -454,12 +459,13 @@ static ssize_t rt2x00debug_write_##__name(struct file *file, \
454 const struct rt2x00debug *debug = intf->debug; \ 459 const struct rt2x00debug *debug = intf->debug; \
455 char line[16]; \ 460 char line[16]; \
456 size_t size; \ 461 size_t size; \
462 unsigned int index = intf->offset_##__name; \
457 __type value; \ 463 __type value; \
458 \ 464 \
459 if (*offset) \ 465 if (*offset) \
460 return 0; \ 466 return 0; \
461 \ 467 \
462 if (intf->offset_##__name >= debug->__name.word_count) \ 468 if (index >= debug->__name.word_count) \
463 return -EINVAL; \ 469 return -EINVAL; \
464 \ 470 \
465 if (copy_from_user(line, buf, length)) \ 471 if (copy_from_user(line, buf, length)) \
@@ -468,8 +474,12 @@ static ssize_t rt2x00debug_write_##__name(struct file *file, \
468 size = strlen(line); \ 474 size = strlen(line); \
469 value = simple_strtoul(line, NULL, 0); \ 475 value = simple_strtoul(line, NULL, 0); \
470 \ 476 \
471 debug->__name.write(intf->rt2x00dev, \ 477 if (debug->__name.flags & RT2X00DEBUGFS_OFFSET) \
472 intf->offset_##__name, value); \ 478 index *= debug->__name.word_size; \
479 \
480 index += debug->__name.word_base; \
481 \
482 debug->__name.write(intf->rt2x00dev, index, value); \
473 \ 483 \
474 *offset += size; \ 484 *offset += size; \
475 return size; \ 485 return size; \
diff --git a/drivers/net/wireless/rt2x00/rt2x00debug.h b/drivers/net/wireless/rt2x00/rt2x00debug.h
index c4ce895aa1c7..a92104dfee9a 100644
--- a/drivers/net/wireless/rt2x00/rt2x00debug.h
+++ b/drivers/net/wireless/rt2x00/rt2x00debug.h
@@ -28,6 +28,16 @@
28 28
29struct rt2x00_dev; 29struct rt2x00_dev;
30 30
31/**
32 * enum rt2x00debugfs_entry_flags: Flags for debugfs registry entry
33 *
34 * @RT2X00DEBUGFS_OFFSET: rt2x00lib should pass the register offset
35 * as argument when using the callback function read()/write()
36 */
37enum rt2x00debugfs_entry_flags {
38 RT2X00DEBUGFS_OFFSET = (1 << 0),
39};
40
31#define RT2X00DEBUGFS_REGISTER_ENTRY(__name, __type) \ 41#define RT2X00DEBUGFS_REGISTER_ENTRY(__name, __type) \
32struct reg##__name { \ 42struct reg##__name { \
33 void (*read)(struct rt2x00_dev *rt2x00dev, \ 43 void (*read)(struct rt2x00_dev *rt2x00dev, \
@@ -35,6 +45,9 @@ struct reg##__name { \
35 void (*write)(struct rt2x00_dev *rt2x00dev, \ 45 void (*write)(struct rt2x00_dev *rt2x00dev, \
36 const unsigned int word, __type data); \ 46 const unsigned int word, __type data); \
37 \ 47 \
48 unsigned int flags; \
49 \
50 unsigned int word_base; \
38 unsigned int word_size; \ 51 unsigned int word_size; \
39 unsigned int word_count; \ 52 unsigned int word_count; \
40} __name 53} __name
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index e1feab8b6b02..477a944167c4 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -417,7 +417,7 @@ static void rt2x00lib_intf_scheduled_iter(void *data, u8 *mac,
417 */ 417 */
418 spin_lock(&intf->lock); 418 spin_lock(&intf->lock);
419 419
420 memcpy(&conf, &intf->conf, sizeof(conf)); 420 memcpy(&conf, &vif->bss_conf, sizeof(conf));
421 delayed_flags = intf->delayed_flags; 421 delayed_flags = intf->delayed_flags;
422 intf->delayed_flags = 0; 422 intf->delayed_flags = 0;
423 423
@@ -1056,10 +1056,16 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
1056 */ 1056 */
1057 rt2x00dev->hw->vif_data_size = sizeof(struct rt2x00_intf); 1057 rt2x00dev->hw->vif_data_size = sizeof(struct rt2x00_intf);
1058 1058
1059 rt2x00dev->hw->wiphy->interface_modes = 1059 /*
1060 BIT(NL80211_IFTYPE_AP) | 1060 * Determine which operating modes are supported, all modes
1061 BIT(NL80211_IFTYPE_STATION) | 1061 * which require beaconing, depend on the availability of
1062 BIT(NL80211_IFTYPE_ADHOC); 1062 * beacon entries.
1063 */
1064 rt2x00dev->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1065 if (rt2x00dev->ops->bcn->entry_num > 0)
1066 rt2x00dev->hw->wiphy->interface_modes |=
1067 BIT(NL80211_IFTYPE_ADHOC) |
1068 BIT(NL80211_IFTYPE_AP);
1063 1069
1064 /* 1070 /*
1065 * Let the driver probe the device to detect the capabilities. 1071 * Let the driver probe the device to detect the capabilities.
diff --git a/drivers/net/wireless/rt2x00/rt2x00lib.h b/drivers/net/wireless/rt2x00/rt2x00lib.h
index 797eb619aa0a..9f214f89ba6d 100644
--- a/drivers/net/wireless/rt2x00/rt2x00lib.h
+++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
@@ -96,7 +96,8 @@ void rt2x00lib_config_erp(struct rt2x00_dev *rt2x00dev,
96void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev, 96void rt2x00lib_config_antenna(struct rt2x00_dev *rt2x00dev,
97 enum antenna rx, enum antenna tx); 97 enum antenna rx, enum antenna tx);
98void rt2x00lib_config(struct rt2x00_dev *rt2x00dev, 98void rt2x00lib_config(struct rt2x00_dev *rt2x00dev,
99 struct ieee80211_conf *conf, const int force_config); 99 struct ieee80211_conf *conf,
100 const unsigned int changed_flags);
100 101
101/** 102/**
102 * DOC: Queue handlers 103 * DOC: Queue handlers
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c
index b32d59eafaa3..8fc2315c5963 100644
--- a/drivers/net/wireless/rt2x00/rt2x00mac.c
+++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
@@ -349,15 +349,6 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
349 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) 349 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
350 return 0; 350 return 0;
351 351
352 if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS) {
353 rt2x00dev->ops->lib->set_retry_limit(hw,
354 conf->short_frame_max_tx_count,
355 conf->long_frame_max_tx_count);
356 }
357 changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
358 if (!changed)
359 return 0;
360
361 /* 352 /*
362 * Only change device state when the radio is enabled. It does not 353 * Only change device state when the radio is enabled. It does not
363 * matter what parameters we have configured when the radio is disabled 354 * matter what parameters we have configured when the radio is disabled
@@ -379,7 +370,7 @@ int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed)
379 * When we've just turned on the radio, we want to reprogram 370 * When we've just turned on the radio, we want to reprogram
380 * everything to ensure a consistent state 371 * everything to ensure a consistent state
381 */ 372 */
382 rt2x00lib_config(rt2x00dev, conf, !radio_on); 373 rt2x00lib_config(rt2x00dev, conf, changed);
383 374
384 /* Turn RX back on */ 375 /* Turn RX back on */
385 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON); 376 rt2x00lib_toggle_rx(rt2x00dev, STATE_RADIO_RX_ON);
@@ -643,7 +634,6 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
643 } 634 }
644 635
645 spin_lock(&intf->lock); 636 spin_lock(&intf->lock);
646 memcpy(&intf->conf, bss_conf, sizeof(*bss_conf));
647 if (delayed) { 637 if (delayed) {
648 intf->delayed_flags |= delayed; 638 intf->delayed_flags |= delayed;
649 schedule_work(&rt2x00dev->intf_work); 639 schedule_work(&rt2x00dev->intf_work);
diff --git a/drivers/net/wireless/rt2x00/rt2x00pci.h b/drivers/net/wireless/rt2x00/rt2x00pci.h
index 80bf97c03e2d..a83f45f784f2 100644
--- a/drivers/net/wireless/rt2x00/rt2x00pci.h
+++ b/drivers/net/wireless/rt2x00/rt2x00pci.h
@@ -58,7 +58,7 @@
58 * Register access. 58 * Register access.
59 */ 59 */
60static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev, 60static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
61 const unsigned long offset, 61 const unsigned int offset,
62 u32 *value) 62 u32 *value)
63{ 63{
64 *value = readl(rt2x00dev->csr.base + offset); 64 *value = readl(rt2x00dev->csr.base + offset);
@@ -66,14 +66,14 @@ static inline void rt2x00pci_register_read(struct rt2x00_dev *rt2x00dev,
66 66
67static inline void 67static inline void
68rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev, 68rt2x00pci_register_multiread(struct rt2x00_dev *rt2x00dev,
69 const unsigned long offset, 69 const unsigned int offset,
70 void *value, const u16 length) 70 void *value, const u16 length)
71{ 71{
72 memcpy_fromio(value, rt2x00dev->csr.base + offset, length); 72 memcpy_fromio(value, rt2x00dev->csr.base + offset, length);
73} 73}
74 74
75static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev, 75static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
76 const unsigned long offset, 76 const unsigned int offset,
77 u32 value) 77 u32 value)
78{ 78{
79 writel(value, rt2x00dev->csr.base + offset); 79 writel(value, rt2x00dev->csr.base + offset);
@@ -81,7 +81,7 @@ static inline void rt2x00pci_register_write(struct rt2x00_dev *rt2x00dev,
81 81
82static inline void 82static inline void
83rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev, 83rt2x00pci_register_multiwrite(struct rt2x00_dev *rt2x00dev,
84 const unsigned long offset, 84 const unsigned int offset,
85 const void *value, const u16 length) 85 const void *value, const u16 length)
86{ 86{
87 memcpy_toio(rt2x00dev->csr.base + offset, value, length); 87 memcpy_toio(rt2x00dev->csr.base + offset, value, length);
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 921dcd5064de..3f272793412a 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -228,43 +228,34 @@ static void rt61pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
228} 228}
229 229
230#ifdef CONFIG_RT2X00_LIB_DEBUGFS 230#ifdef CONFIG_RT2X00_LIB_DEBUGFS
231#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
232
233static void rt61pci_read_csr(struct rt2x00_dev *rt2x00dev,
234 const unsigned int word, u32 *data)
235{
236 rt2x00pci_register_read(rt2x00dev, CSR_OFFSET(word), data);
237}
238
239static void rt61pci_write_csr(struct rt2x00_dev *rt2x00dev,
240 const unsigned int word, u32 data)
241{
242 rt2x00pci_register_write(rt2x00dev, CSR_OFFSET(word), data);
243}
244
245static const struct rt2x00debug rt61pci_rt2x00debug = { 231static const struct rt2x00debug rt61pci_rt2x00debug = {
246 .owner = THIS_MODULE, 232 .owner = THIS_MODULE,
247 .csr = { 233 .csr = {
248 .read = rt61pci_read_csr, 234 .read = rt2x00pci_register_read,
249 .write = rt61pci_write_csr, 235 .write = rt2x00pci_register_write,
236 .flags = RT2X00DEBUGFS_OFFSET,
237 .word_base = CSR_REG_BASE,
250 .word_size = sizeof(u32), 238 .word_size = sizeof(u32),
251 .word_count = CSR_REG_SIZE / sizeof(u32), 239 .word_count = CSR_REG_SIZE / sizeof(u32),
252 }, 240 },
253 .eeprom = { 241 .eeprom = {
254 .read = rt2x00_eeprom_read, 242 .read = rt2x00_eeprom_read,
255 .write = rt2x00_eeprom_write, 243 .write = rt2x00_eeprom_write,
244 .word_base = EEPROM_BASE,
256 .word_size = sizeof(u16), 245 .word_size = sizeof(u16),
257 .word_count = EEPROM_SIZE / sizeof(u16), 246 .word_count = EEPROM_SIZE / sizeof(u16),
258 }, 247 },
259 .bbp = { 248 .bbp = {
260 .read = rt61pci_bbp_read, 249 .read = rt61pci_bbp_read,
261 .write = rt61pci_bbp_write, 250 .write = rt61pci_bbp_write,
251 .word_base = BBP_BASE,
262 .word_size = sizeof(u8), 252 .word_size = sizeof(u8),
263 .word_count = BBP_SIZE / sizeof(u8), 253 .word_count = BBP_SIZE / sizeof(u8),
264 }, 254 },
265 .rf = { 255 .rf = {
266 .read = rt2x00_rf_read, 256 .read = rt2x00_rf_read,
267 .write = rt61pci_rf_write, 257 .write = rt61pci_rf_write,
258 .word_base = RF_BASE,
268 .word_size = sizeof(u32), 259 .word_size = sizeof(u32),
269 .word_count = RF_SIZE / sizeof(u32), 260 .word_count = RF_SIZE / sizeof(u32),
270 }, 261 },
@@ -643,95 +634,18 @@ static void rt61pci_config_erp(struct rt2x00_dev *rt2x00dev,
643 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 634 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
644 !!erp->short_preamble); 635 !!erp->short_preamble);
645 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg); 636 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
646}
647
648
649static void rt61pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
650 struct rt2x00lib_conf *libconf)
651{
652 u16 eeprom;
653 short lna_gain = 0;
654
655 if (libconf->band == IEEE80211_BAND_2GHZ) {
656 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
657 lna_gain += 14;
658
659 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
660 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
661 } else {
662 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
663 lna_gain += 14;
664
665 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
666 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
667 }
668 637
669 rt2x00dev->lna_gain = lna_gain; 638 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
670}
671
672static void rt61pci_config_phymode(struct rt2x00_dev *rt2x00dev,
673 const int basic_rate_mask)
674{
675 rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
676}
677
678static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
679 struct rf_channel *rf, const int txpower)
680{
681 u8 r3;
682 u8 r94;
683 u8 smart;
684
685 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
686 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
687
688 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
689 rt2x00_rf(&rt2x00dev->chip, RF2527));
690
691 rt61pci_bbp_read(rt2x00dev, 3, &r3);
692 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
693 rt61pci_bbp_write(rt2x00dev, 3, r3);
694 639
695 r94 = 6; 640 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
696 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94)) 641 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
697 r94 += txpower - MAX_TXPOWER; 642 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
698 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
699 r94 += txpower;
700 rt61pci_bbp_write(rt2x00dev, 94, r94);
701
702 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
703 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
704 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
705 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
706
707 udelay(200);
708
709 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
710 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
711 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
712 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
713
714 udelay(200);
715
716 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
717 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
718 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
719 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
720
721 msleep(1);
722}
723
724static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
725 const int txpower)
726{
727 struct rf_channel rf;
728
729 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
730 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
731 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
732 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
733 643
734 rt61pci_config_channel(rt2x00dev, &rf, txpower); 644 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg);
645 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
646 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
647 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
648 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
735} 649}
736 650
737static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 651static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -906,8 +820,8 @@ static const struct antenna_sel antenna_sel_bg[] = {
906 { 98, { 0x48, 0x48 } }, 820 { 98, { 0x48, 0x48 } },
907}; 821};
908 822
909static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev, 823static void rt61pci_config_ant(struct rt2x00_dev *rt2x00dev,
910 struct antenna_setup *ant) 824 struct antenna_setup *ant)
911{ 825{
912 const struct antenna_sel *sel; 826 const struct antenna_sel *sel;
913 unsigned int lna; 827 unsigned int lna;
@@ -954,20 +868,105 @@ static void rt61pci_config_antenna(struct rt2x00_dev *rt2x00dev,
954 } 868 }
955} 869}
956 870
957static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev, 871static void rt61pci_config_lna_gain(struct rt2x00_dev *rt2x00dev,
872 struct rt2x00lib_conf *libconf)
873{
874 u16 eeprom;
875 short lna_gain = 0;
876
877 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) {
878 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
879 lna_gain += 14;
880
881 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
882 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
883 } else {
884 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags))
885 lna_gain += 14;
886
887 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
888 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
889 }
890
891 rt2x00dev->lna_gain = lna_gain;
892}
893
894static void rt61pci_config_channel(struct rt2x00_dev *rt2x00dev,
895 struct rf_channel *rf, const int txpower)
896{
897 u8 r3;
898 u8 r94;
899 u8 smart;
900
901 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
902 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
903
904 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
905 rt2x00_rf(&rt2x00dev->chip, RF2527));
906
907 rt61pci_bbp_read(rt2x00dev, 3, &r3);
908 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
909 rt61pci_bbp_write(rt2x00dev, 3, r3);
910
911 r94 = 6;
912 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
913 r94 += txpower - MAX_TXPOWER;
914 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
915 r94 += txpower;
916 rt61pci_bbp_write(rt2x00dev, 94, r94);
917
918 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
919 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
920 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
921 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
922
923 udelay(200);
924
925 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
926 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
927 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
928 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
929
930 udelay(200);
931
932 rt61pci_rf_write(rt2x00dev, 1, rf->rf1);
933 rt61pci_rf_write(rt2x00dev, 2, rf->rf2);
934 rt61pci_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
935 rt61pci_rf_write(rt2x00dev, 4, rf->rf4);
936
937 msleep(1);
938}
939
940static void rt61pci_config_txpower(struct rt2x00_dev *rt2x00dev,
941 const int txpower)
942{
943 struct rf_channel rf;
944
945 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
946 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
947 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
948 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
949
950 rt61pci_config_channel(rt2x00dev, &rf, txpower);
951}
952
953static void rt61pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
958 struct rt2x00lib_conf *libconf) 954 struct rt2x00lib_conf *libconf)
959{ 955{
960 u32 reg; 956 u32 reg;
961 957
962 rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg); 958 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
963 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time); 959 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT,
964 rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg); 960 libconf->conf->long_frame_max_tx_count);
961 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT,
962 libconf->conf->short_frame_max_tx_count);
963 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
964}
965 965
966 rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg); 966static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev,
967 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs); 967 struct rt2x00lib_conf *libconf)
968 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 968{
969 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs); 969 u32 reg;
970 rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
971 970
972 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg); 971 rt2x00pci_register_read(rt2x00dev, TXRX_CSR0, &reg);
973 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER); 972 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
@@ -990,16 +989,15 @@ static void rt61pci_config(struct rt2x00_dev *rt2x00dev,
990 /* Always recalculate LNA gain before changing configuration */ 989 /* Always recalculate LNA gain before changing configuration */
991 rt61pci_config_lna_gain(rt2x00dev, libconf); 990 rt61pci_config_lna_gain(rt2x00dev, libconf);
992 991
993 if (flags & CONFIG_UPDATE_PHYMODE) 992 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
994 rt61pci_config_phymode(rt2x00dev, libconf->basic_rates);
995 if (flags & CONFIG_UPDATE_CHANNEL)
996 rt61pci_config_channel(rt2x00dev, &libconf->rf, 993 rt61pci_config_channel(rt2x00dev, &libconf->rf,
997 libconf->conf->power_level); 994 libconf->conf->power_level);
998 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 995 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
996 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
999 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level); 997 rt61pci_config_txpower(rt2x00dev, libconf->conf->power_level);
1000 if (flags & CONFIG_UPDATE_ANTENNA) 998 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
1001 rt61pci_config_antenna(rt2x00dev, &libconf->ant); 999 rt61pci_config_retry_limit(rt2x00dev, libconf);
1002 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 1000 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
1003 rt61pci_config_duration(rt2x00dev, libconf); 1001 rt61pci_config_duration(rt2x00dev, libconf);
1004} 1002}
1005 1003
@@ -2628,20 +2626,6 @@ static int rt61pci_probe_hw(struct rt2x00_dev *rt2x00dev)
2628/* 2626/*
2629 * IEEE80211 stack callback functions. 2627 * IEEE80211 stack callback functions.
2630 */ 2628 */
2631static int rt61pci_set_retry_limit(struct ieee80211_hw *hw,
2632 u32 short_retry, u32 long_retry)
2633{
2634 struct rt2x00_dev *rt2x00dev = hw->priv;
2635 u32 reg;
2636
2637 rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
2638 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
2639 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
2640 rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
2641
2642 return 0;
2643}
2644
2645static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, 2629static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2646 const struct ieee80211_tx_queue_params *params) 2630 const struct ieee80211_tx_queue_params *params)
2647{ 2631{
@@ -2755,8 +2739,8 @@ static const struct rt2x00lib_ops rt61pci_rt2x00_ops = {
2755 .config_filter = rt61pci_config_filter, 2739 .config_filter = rt61pci_config_filter,
2756 .config_intf = rt61pci_config_intf, 2740 .config_intf = rt61pci_config_intf,
2757 .config_erp = rt61pci_config_erp, 2741 .config_erp = rt61pci_config_erp,
2742 .config_ant = rt61pci_config_ant,
2758 .config = rt61pci_config, 2743 .config = rt61pci_config,
2759 .set_retry_limit = rt61pci_set_retry_limit,
2760}; 2744};
2761 2745
2762static const struct data_queue_desc rt61pci_queue_rx = { 2746static const struct data_queue_desc rt61pci_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 8ec1451308cc..65fe3332364a 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -48,7 +48,9 @@
48#define CSR_REG_SIZE 0x04b0 48#define CSR_REG_SIZE 0x04b0
49#define EEPROM_BASE 0x0000 49#define EEPROM_BASE 0x0000
50#define EEPROM_SIZE 0x0100 50#define EEPROM_SIZE 0x0100
51#define BBP_BASE 0x0000
51#define BBP_SIZE 0x0080 52#define BBP_SIZE 0x0080
53#define RF_BASE 0x0000
52#define RF_SIZE 0x0014 54#define RF_SIZE 0x0014
53 55
54/* 56/*
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 69a4931a2fd3..767e3c98184c 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -249,43 +249,34 @@ rf_write:
249} 249}
250 250
251#ifdef CONFIG_RT2X00_LIB_DEBUGFS 251#ifdef CONFIG_RT2X00_LIB_DEBUGFS
252#define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
253
254static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
255 const unsigned int word, u32 *data)
256{
257 rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
258}
259
260static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
261 const unsigned int word, u32 data)
262{
263 rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
264}
265
266static const struct rt2x00debug rt73usb_rt2x00debug = { 252static const struct rt2x00debug rt73usb_rt2x00debug = {
267 .owner = THIS_MODULE, 253 .owner = THIS_MODULE,
268 .csr = { 254 .csr = {
269 .read = rt73usb_read_csr, 255 .read = rt73usb_register_read,
270 .write = rt73usb_write_csr, 256 .write = rt73usb_register_write,
257 .flags = RT2X00DEBUGFS_OFFSET,
258 .word_base = CSR_REG_BASE,
271 .word_size = sizeof(u32), 259 .word_size = sizeof(u32),
272 .word_count = CSR_REG_SIZE / sizeof(u32), 260 .word_count = CSR_REG_SIZE / sizeof(u32),
273 }, 261 },
274 .eeprom = { 262 .eeprom = {
275 .read = rt2x00_eeprom_read, 263 .read = rt2x00_eeprom_read,
276 .write = rt2x00_eeprom_write, 264 .write = rt2x00_eeprom_write,
265 .word_base = EEPROM_BASE,
277 .word_size = sizeof(u16), 266 .word_size = sizeof(u16),
278 .word_count = EEPROM_SIZE / sizeof(u16), 267 .word_count = EEPROM_SIZE / sizeof(u16),
279 }, 268 },
280 .bbp = { 269 .bbp = {
281 .read = rt73usb_bbp_read, 270 .read = rt73usb_bbp_read,
282 .write = rt73usb_bbp_write, 271 .write = rt73usb_bbp_write,
272 .word_base = BBP_BASE,
283 .word_size = sizeof(u8), 273 .word_size = sizeof(u8),
284 .word_count = BBP_SIZE / sizeof(u8), 274 .word_count = BBP_SIZE / sizeof(u8),
285 }, 275 },
286 .rf = { 276 .rf = {
287 .read = rt2x00_rf_read, 277 .read = rt2x00_rf_read,
288 .write = rt73usb_rf_write, 278 .write = rt73usb_rf_write,
279 .word_base = RF_BASE,
289 .word_size = sizeof(u32), 280 .word_size = sizeof(u32),
290 .word_count = RF_SIZE / sizeof(u32), 281 .word_count = RF_SIZE / sizeof(u32),
291 }, 282 },
@@ -669,87 +660,18 @@ static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
669 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 660 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
670 !!erp->short_preamble); 661 !!erp->short_preamble);
671 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg); 662 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
672}
673
674static void rt73usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
675 struct rt2x00lib_conf *libconf)
676{
677 u16 eeprom;
678 short lna_gain = 0;
679
680 if (libconf->band == IEEE80211_BAND_2GHZ) {
681 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
682 lna_gain += 14;
683
684 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
685 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
686 } else {
687 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
688 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
689 }
690
691 rt2x00dev->lna_gain = lna_gain;
692}
693
694static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
695 const int basic_rate_mask)
696{
697 rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
698}
699 663
700static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev, 664 rt73usb_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
701 struct rf_channel *rf, const int txpower)
702{
703 u8 r3;
704 u8 r94;
705 u8 smart;
706
707 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
708 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
709
710 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
711 rt2x00_rf(&rt2x00dev->chip, RF2527));
712
713 rt73usb_bbp_read(rt2x00dev, 3, &r3);
714 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
715 rt73usb_bbp_write(rt2x00dev, 3, r3);
716 665
717 r94 = 6; 666 rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
718 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94)) 667 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
719 r94 += txpower - MAX_TXPOWER; 668 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
720 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
721 r94 += txpower;
722 rt73usb_bbp_write(rt2x00dev, 94, r94);
723
724 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
725 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
726 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
727 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
728
729 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
730 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
731 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
732 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
733
734 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
735 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
736 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
737 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
738
739 udelay(10);
740}
741
742static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
743 const int txpower)
744{
745 struct rf_channel rf;
746
747 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
748 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
749 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
750 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
751 669
752 rt73usb_config_channel(rt2x00dev, &rf, txpower); 670 rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
671 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
672 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
673 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
674 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
753} 675}
754 676
755static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev, 677static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -869,8 +791,8 @@ static const struct antenna_sel antenna_sel_bg[] = {
869 { 98, { 0x48, 0x48 } }, 791 { 98, { 0x48, 0x48 } },
870}; 792};
871 793
872static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev, 794static void rt73usb_config_ant(struct rt2x00_dev *rt2x00dev,
873 struct antenna_setup *ant) 795 struct antenna_setup *ant)
874{ 796{
875 const struct antenna_sel *sel; 797 const struct antenna_sel *sel;
876 unsigned int lna; 798 unsigned int lna;
@@ -912,20 +834,98 @@ static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
912 rt73usb_config_antenna_2x(rt2x00dev, ant); 834 rt73usb_config_antenna_2x(rt2x00dev, ant);
913} 835}
914 836
915static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev, 837static void rt73usb_config_lna_gain(struct rt2x00_dev *rt2x00dev,
916 struct rt2x00lib_conf *libconf) 838 struct rt2x00lib_conf *libconf)
917{ 839{
840 u16 eeprom;
841 short lna_gain = 0;
842
843 if (libconf->conf->channel->band == IEEE80211_BAND_2GHZ) {
844 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
845 lna_gain += 14;
846
847 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
848 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
849 } else {
850 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
851 lna_gain -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
852 }
853
854 rt2x00dev->lna_gain = lna_gain;
855}
856
857static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
858 struct rf_channel *rf, const int txpower)
859{
860 u8 r3;
861 u8 r94;
862 u8 smart;
863
864 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
865 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
866
867 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
868 rt2x00_rf(&rt2x00dev->chip, RF2527));
869
870 rt73usb_bbp_read(rt2x00dev, 3, &r3);
871 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
872 rt73usb_bbp_write(rt2x00dev, 3, r3);
873
874 r94 = 6;
875 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
876 r94 += txpower - MAX_TXPOWER;
877 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
878 r94 += txpower;
879 rt73usb_bbp_write(rt2x00dev, 94, r94);
880
881 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
882 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
883 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
884 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
885
886 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
887 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
888 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
889 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
890
891 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
892 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
893 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
894 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
895
896 udelay(10);
897}
898
899static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
900 const int txpower)
901{
902 struct rf_channel rf;
903
904 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
905 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
906 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
907 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
908
909 rt73usb_config_channel(rt2x00dev, &rf, txpower);
910}
911
912static void rt73usb_config_retry_limit(struct rt2x00_dev *rt2x00dev,
913 struct rt2x00lib_conf *libconf)
914{
918 u32 reg; 915 u32 reg;
919 916
920 rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg); 917 rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
921 rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time); 918 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT,
922 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg); 919 libconf->conf->long_frame_max_tx_count);
920 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT,
921 libconf->conf->short_frame_max_tx_count);
922 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
923}
923 924
924 rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg); 925static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
925 rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs); 926 struct rt2x00lib_conf *libconf)
926 rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3); 927{
927 rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs); 928 u32 reg;
928 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
929 929
930 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg); 930 rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
931 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER); 931 rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
@@ -948,16 +948,15 @@ static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
948 /* Always recalculate LNA gain before changing configuration */ 948 /* Always recalculate LNA gain before changing configuration */
949 rt73usb_config_lna_gain(rt2x00dev, libconf); 949 rt73usb_config_lna_gain(rt2x00dev, libconf);
950 950
951 if (flags & CONFIG_UPDATE_PHYMODE) 951 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
952 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
953 if (flags & CONFIG_UPDATE_CHANNEL)
954 rt73usb_config_channel(rt2x00dev, &libconf->rf, 952 rt73usb_config_channel(rt2x00dev, &libconf->rf,
955 libconf->conf->power_level); 953 libconf->conf->power_level);
956 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL)) 954 if ((flags & IEEE80211_CONF_CHANGE_POWER) &&
955 !(flags & IEEE80211_CONF_CHANGE_CHANNEL))
957 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level); 956 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
958 if (flags & CONFIG_UPDATE_ANTENNA) 957 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
959 rt73usb_config_antenna(rt2x00dev, &libconf->ant); 958 rt73usb_config_retry_limit(rt2x00dev, libconf);
960 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 959 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
961 rt73usb_config_duration(rt2x00dev, libconf); 960 rt73usb_config_duration(rt2x00dev, libconf);
962} 961}
963 962
@@ -2209,20 +2208,6 @@ static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
2209/* 2208/*
2210 * IEEE80211 stack callback functions. 2209 * IEEE80211 stack callback functions.
2211 */ 2210 */
2212static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
2213 u32 short_retry, u32 long_retry)
2214{
2215 struct rt2x00_dev *rt2x00dev = hw->priv;
2216 u32 reg;
2217
2218 rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
2219 rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
2220 rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
2221 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
2222
2223 return 0;
2224}
2225
2226static int rt73usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, 2211static int rt73usb_conf_tx(struct ieee80211_hw *hw, u16 queue_idx,
2227 const struct ieee80211_tx_queue_params *params) 2212 const struct ieee80211_tx_queue_params *params)
2228{ 2213{
@@ -2345,8 +2330,8 @@ static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2345 .config_filter = rt73usb_config_filter, 2330 .config_filter = rt73usb_config_filter,
2346 .config_intf = rt73usb_config_intf, 2331 .config_intf = rt73usb_config_intf,
2347 .config_erp = rt73usb_config_erp, 2332 .config_erp = rt73usb_config_erp,
2333 .config_ant = rt73usb_config_ant,
2348 .config = rt73usb_config, 2334 .config = rt73usb_config,
2349 .set_retry_limit = rt73usb_set_retry_limit,
2350}; 2335};
2351 2336
2352static const struct data_queue_desc rt73usb_queue_rx = { 2337static const struct data_queue_desc rt73usb_queue_rx = {
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h
index 868386c457f6..46e1405eb0e2 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.h
+++ b/drivers/net/wireless/rt2x00/rt73usb.h
@@ -48,7 +48,9 @@
48#define CSR_REG_SIZE 0x04b0 48#define CSR_REG_SIZE 0x04b0
49#define EEPROM_BASE 0x0000 49#define EEPROM_BASE 0x0000
50#define EEPROM_SIZE 0x0100 50#define EEPROM_SIZE 0x0100
51#define BBP_BASE 0x0000
51#define BBP_SIZE 0x0080 52#define BBP_SIZE 0x0080
53#define RF_BASE 0x0000
52#define RF_SIZE 0x0014 54#define RF_SIZE 0x0014
53 55
54/* 56/*
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-07 22:59:43 -0500