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path: root/drivers/net/wireless/rt2x00/rt73usb.h
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt73usb.h')
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.h17
1 files changed, 16 insertions, 1 deletions
diff --git a/drivers/net/wireless/rt2x00/rt73usb.h b/drivers/net/wireless/rt2x00/rt73usb.h
index da62b4f091a7..3f9675655eb9 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.h
+++ b/drivers/net/wireless/rt2x00/rt73usb.h
@@ -114,6 +114,9 @@ struct hw_pairwise_ta_entry {
114#define HW_BEACON_BASE2 0x2600 114#define HW_BEACON_BASE2 0x2600
115#define HW_BEACON_BASE3 0x2700 115#define HW_BEACON_BASE3 0x2700
116 116
117#define HW_BEACON_OFFSET(__index) \
118 ( HW_BEACON_BASE0 + (__index * 0x0100) )
119
117/* 120/*
118 * MAC Control/Status Registers(CSR). 121 * MAC Control/Status Registers(CSR).
119 * Some values are set in TU, whereas 1 TU == 1024 us. 122 * Some values are set in TU, whereas 1 TU == 1024 us.
@@ -146,6 +149,11 @@ struct hw_pairwise_ta_entry {
146 149
147/* 150/*
148 * MAC_CSR3: STA MAC register 1. 151 * MAC_CSR3: STA MAC register 1.
152 * UNICAST_TO_ME_MASK:
153 * Used to mask off bits from byte 5 of the MAC address
154 * to determine the UNICAST_TO_ME bit for RX frames.
155 * The full mask is complemented by BSS_ID_MASK:
156 * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
149 */ 157 */
150#define MAC_CSR3 0x300c 158#define MAC_CSR3 0x300c
151#define MAC_CSR3_BYTE4 FIELD32(0x000000ff) 159#define MAC_CSR3_BYTE4 FIELD32(0x000000ff)
@@ -163,7 +171,14 @@ struct hw_pairwise_ta_entry {
163 171
164/* 172/*
165 * MAC_CSR5: BSSID register 1. 173 * MAC_CSR5: BSSID register 1.
166 * BSS_ID_MASK: 3: one BSSID, 0: 4 BSSID, 2 or 1: 2 BSSID. 174 * BSS_ID_MASK:
175 * This mask is used to mask off bits 0 and 1 of byte 5 of the
176 * BSSID. This will make sure that those bits will be ignored
177 * when determining the MY_BSS of RX frames.
178 * 0: 1-BSSID mode (BSS index = 0)
179 * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
180 * 2: 2-BSSID mode (BSS index: byte5, bit 1)
181 * 3: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
167 */ 182 */
168#define MAC_CSR5 0x3014 183#define MAC_CSR5 0x3014
169#define MAC_CSR5_BYTE4 FIELD32(0x000000ff) 184#define MAC_CSR5_BYTE4 FIELD32(0x000000ff)