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path: root/drivers/net/wireless/rt2x00/rt61pci.h
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.h')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.h18
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.h b/drivers/net/wireless/rt2x00/rt61pci.h
index 10519f8c5783..d291c0fe405c 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.h
+++ b/drivers/net/wireless/rt2x00/rt61pci.h
@@ -161,7 +161,9 @@ struct hw_pairwise_ta_entry {
161#define HW_BEACON_BASE1 0x2d00 161#define HW_BEACON_BASE1 0x2d00
162#define HW_BEACON_BASE2 0x2e00 162#define HW_BEACON_BASE2 0x2e00
163#define HW_BEACON_BASE3 0x2f00 163#define HW_BEACON_BASE3 0x2f00
164#define HW_BEACON_OFFSET 0x0100 164
165#define HW_BEACON_OFFSET(__index) \
166 ( HW_BEACON_BASE0 + (__index * 0x0100) )
165 167
166/* 168/*
167 * HOST-MCU shared memory. 169 * HOST-MCU shared memory.
@@ -234,6 +236,11 @@ struct hw_pairwise_ta_entry {
234 236
235/* 237/*
236 * MAC_CSR3: STA MAC register 1. 238 * MAC_CSR3: STA MAC register 1.
239 * UNICAST_TO_ME_MASK:
240 * Used to mask off bits from byte 5 of the MAC address
241 * to determine the UNICAST_TO_ME bit for RX frames.
242 * The full mask is complemented by BSS_ID_MASK:
243 * MASK = BSS_ID_MASK & UNICAST_TO_ME_MASK
237 */ 244 */
238#define MAC_CSR3 0x300c 245#define MAC_CSR3 0x300c
239#define MAC_CSR3_BYTE4 FIELD32(0x000000ff) 246#define MAC_CSR3_BYTE4 FIELD32(0x000000ff)
@@ -251,7 +258,14 @@ struct hw_pairwise_ta_entry {
251 258
252/* 259/*
253 * MAC_CSR5: BSSID register 1. 260 * MAC_CSR5: BSSID register 1.
254 * BSS_ID_MASK: 3: one BSSID, 0: 4 BSSID, 2 or 1: 2 BSSID. 261 * BSS_ID_MASK:
262 * This mask is used to mask off bits 0 and 1 of byte 5 of the
263 * BSSID. This will make sure that those bits will be ignored
264 * when determining the MY_BSS of RX frames.
265 * 0: 1-BSSID mode (BSS index = 0)
266 * 1: 2-BSSID mode (BSS index: Byte5, bit 0)
267 * 2: 2-BSSID mode (BSS index: byte5, bit 1)
268 * 3: 4-BSSID mode (BSS index: byte5, bit 0 - 1)
255 */ 269 */
256#define MAC_CSR5 0x3014 270#define MAC_CSR5 0x3014
257#define MAC_CSR5_BYTE4 FIELD32(0x000000ff) 271#define MAC_CSR5_BYTE4 FIELD32(0x000000ff)