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path: root/drivers/net/wireless/rt2x00/rt61pci.c
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt61pci.c30
1 files changed, 13 insertions, 17 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 1b0c70d65699..9e3a1ee426e2 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -1869,6 +1869,19 @@ static void rt61pci_write_beacon(struct queue_entry *entry)
1869 entry->skb->data, entry->skb->len); 1869 entry->skb->data, entry->skb->len);
1870 1870
1871 /* 1871 /*
1872 * Enable beaconing again.
1873 *
1874 * For Wi-Fi faily generated beacons between participating
1875 * stations. Set TBTT phase adaptive adjustment step to 8us.
1876 */
1877 rt2x00pci_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1878
1879 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1880 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1881 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1882 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
1883
1884 /*
1872 * Clean up beacon skb. 1885 * Clean up beacon skb.
1873 */ 1886 */
1874 dev_kfree_skb_any(entry->skb); 1887 dev_kfree_skb_any(entry->skb);
@@ -1880,23 +1893,6 @@ static void rt61pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1880{ 1893{
1881 u32 reg; 1894 u32 reg;
1882 1895
1883 if (queue == QID_BEACON) {
1884 /*
1885 * For Wi-Fi faily generated beacons between participating
1886 * stations. Set TBTT phase adaptive adjustment step to 8us.
1887 */
1888 rt2x00pci_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1889
1890 rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
1891 if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1892 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
1893 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
1894 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1895 rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
1896 }
1897 return;
1898 }
1899
1900 rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg); 1896 rt2x00pci_register_read(rt2x00dev, TX_CNTL_CSR, &reg);
1901 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC0, (queue == QID_AC_BE)); 1897 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC0, (queue == QID_AC_BE));
1902 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC1, (queue == QID_AC_BK)); 1898 rt2x00_set_field32(&reg, TX_CNTL_CSR_KICK_TX_AC1, (queue == QID_AC_BK));