diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800pci.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800pci.c | 71 |
1 files changed, 0 insertions, 71 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index 235376e9cb04..98aa426a3564 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c | |||
@@ -980,66 +980,6 @@ static int rt2800pci_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
980 | return rt2800_validate_eeprom(rt2x00dev); | 980 | return rt2800_validate_eeprom(rt2x00dev); |
981 | } | 981 | } |
982 | 982 | ||
983 | static int rt2800_enable_wlan_rt3290(struct rt2x00_dev *rt2x00dev) | ||
984 | { | ||
985 | u32 reg; | ||
986 | int i, count; | ||
987 | |||
988 | rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL, ®); | ||
989 | if (rt2x00_get_field32(reg, WLAN_EN)) | ||
990 | return 0; | ||
991 | |||
992 | rt2x00_set_field32(®, WLAN_GPIO_OUT_OE_BIT_ALL, 0xff); | ||
993 | rt2x00_set_field32(®, FRC_WL_ANT_SET, 1); | ||
994 | rt2x00_set_field32(®, WLAN_CLK_EN, 0); | ||
995 | rt2x00_set_field32(®, WLAN_EN, 1); | ||
996 | rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg); | ||
997 | |||
998 | udelay(REGISTER_BUSY_DELAY); | ||
999 | |||
1000 | count = 0; | ||
1001 | do { | ||
1002 | /* | ||
1003 | * Check PLL_LD & XTAL_RDY. | ||
1004 | */ | ||
1005 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | ||
1006 | rt2800_register_read(rt2x00dev, CMB_CTRL, ®); | ||
1007 | if (rt2x00_get_field32(reg, PLL_LD) && | ||
1008 | rt2x00_get_field32(reg, XTAL_RDY)) | ||
1009 | break; | ||
1010 | udelay(REGISTER_BUSY_DELAY); | ||
1011 | } | ||
1012 | |||
1013 | if (i >= REGISTER_BUSY_COUNT) { | ||
1014 | |||
1015 | if (count >= 10) | ||
1016 | return -EIO; | ||
1017 | |||
1018 | rt2800_register_write(rt2x00dev, 0x58, 0x018); | ||
1019 | udelay(REGISTER_BUSY_DELAY); | ||
1020 | rt2800_register_write(rt2x00dev, 0x58, 0x418); | ||
1021 | udelay(REGISTER_BUSY_DELAY); | ||
1022 | rt2800_register_write(rt2x00dev, 0x58, 0x618); | ||
1023 | udelay(REGISTER_BUSY_DELAY); | ||
1024 | count++; | ||
1025 | } else { | ||
1026 | count = 0; | ||
1027 | } | ||
1028 | |||
1029 | rt2800_register_read(rt2x00dev, WLAN_FUN_CTRL, ®); | ||
1030 | rt2x00_set_field32(®, PCIE_APP0_CLK_REQ, 0); | ||
1031 | rt2x00_set_field32(®, WLAN_CLK_EN, 1); | ||
1032 | rt2x00_set_field32(®, WLAN_RESET, 1); | ||
1033 | rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg); | ||
1034 | udelay(10); | ||
1035 | rt2x00_set_field32(®, WLAN_RESET, 0); | ||
1036 | rt2800_register_write(rt2x00dev, WLAN_FUN_CTRL, reg); | ||
1037 | udelay(10); | ||
1038 | rt2800_register_write(rt2x00dev, INT_SOURCE_CSR, 0x7fffffff); | ||
1039 | } while (count != 0); | ||
1040 | |||
1041 | return 0; | ||
1042 | } | ||
1043 | static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev) | 983 | static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev) |
1044 | { | 984 | { |
1045 | int retval; | 985 | int retval; |
@@ -1063,17 +1003,6 @@ static int rt2800pci_probe_hw(struct rt2x00_dev *rt2x00dev) | |||
1063 | return retval; | 1003 | return retval; |
1064 | 1004 | ||
1065 | /* | 1005 | /* |
1066 | * In probe phase call rt2800_enable_wlan_rt3290 to enable wlan | ||
1067 | * clk for rt3290. That avoid the MCU fail in start phase. | ||
1068 | */ | ||
1069 | if (rt2x00_rt(rt2x00dev, RT3290)) { | ||
1070 | retval = rt2800_enable_wlan_rt3290(rt2x00dev); | ||
1071 | |||
1072 | if (retval) | ||
1073 | return retval; | ||
1074 | } | ||
1075 | |||
1076 | /* | ||
1077 | * This device has multiple filters for control frames | 1006 | * This device has multiple filters for control frames |
1078 | * and has a separate filter for PS Poll frames. | 1007 | * and has a separate filter for PS Poll frames. |
1079 | */ | 1008 | */ |