1 files changed, 36 insertions, 130 deletions

diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index f08b6a37bf2d..7d4778d66e77 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -616,67 +616,13 @@ static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
 static int rt2800pci_write_tx_data(struct queue_entry* entry,
                                    struct txentry_desc *txdesc)
 {
-        struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
-        struct sk_buff *skb = entry->skb;
-        struct skb_frame_desc *skbdesc;
         int ret;
-        __le32 *txwi;
-        u32 word;
 
         ret = rt2x00pci_write_tx_data(entry, txdesc);
         if (ret)
                 return ret;
 
-        skbdesc = get_skb_frame_desc(skb);
-        txwi = (__le32 *)(skb->data - rt2x00dev->ops->extra_tx_headroom);
-
-        /*
-         * Initialize TX Info descriptor
-         */
-        rt2x00_desc_read(txwi, 0, &word);
-        rt2x00_set_field32(&word, TXWI_W0_FRAG,
-                           test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W0_MIMO_PS, 0);
-        rt2x00_set_field32(&word, TXWI_W0_CF_ACK, 0);
-        rt2x00_set_field32(&word, TXWI_W0_TS,
-                           test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W0_AMPDU,
-                           test_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W0_MPDU_DENSITY, txdesc->mpdu_density);
-        rt2x00_set_field32(&word, TXWI_W0_TX_OP, txdesc->ifs);
-        rt2x00_set_field32(&word, TXWI_W0_MCS, txdesc->mcs);
-        rt2x00_set_field32(&word, TXWI_W0_BW,
-                           test_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W0_SHORT_GI,
-                           test_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W0_STBC, txdesc->stbc);
-        rt2x00_set_field32(&word, TXWI_W0_PHYMODE, txdesc->rate_mode);
-        rt2x00_desc_write(txwi, 0, word);
-
-        rt2x00_desc_read(txwi, 1, &word);
-        rt2x00_set_field32(&word, TXWI_W1_ACK,
-                           test_bit(ENTRY_TXD_ACK, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W1_NSEQ,
-                           test_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags));
-        rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size);
-        rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
-                           test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
-                           txdesc->key_idx : 0xff);
-        rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
-                           txdesc->length);
-        rt2x00_set_field32(&word, TXWI_W1_PACKETID,
-                           skbdesc->entry->queue->qid + 1);
-        rt2x00_desc_write(txwi, 1, word);
-
-        /*
-         * Always write 0 to IV/EIV fields, hardware will insert the IV
-         * from the IVEIV register when TXD_W3_WIV is set to 0.
-         * When TXD_W3_WIV is set to 1 it will use the IV data
-         * from the descriptor. The TXWI_W1_WIRELESS_CLI_ID indicates which
-         * crypto entry in the registers should be used to encrypt the frame.
-         */
-        _rt2x00_desc_write(txwi, 2, 0 /* skbdesc->iv[0] */);
-        _rt2x00_desc_write(txwi, 3, 0 /* skbdesc->iv[1] */);
+        rt2800_write_txwi(entry->skb, txdesc);
 
         return 0;
 }
@@ -732,10 +678,10 @@ static void rt2800pci_write_tx_desc(struct rt2x00_dev *rt2x00dev,
 /*
  * TX data initialization
  */
-static void rt2800pci_write_beacon(struct queue_entry *entry)
+static void rt2800pci_write_beacon(struct queue_entry *entry,
+                                   struct txentry_desc *txdesc)
 {
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
-        struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
         unsigned int beacon_base;
         u32 reg;
 
@@ -748,15 +694,25 @@ static void rt2800pci_write_beacon(struct queue_entry *entry)
         rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
         /*
-         * Write entire beacon with descriptor to register.
+         * Add the TXWI for the beacon to the skb.
+         */
+        rt2800_write_txwi(entry->skb, txdesc);
+        skb_push(entry->skb, TXWI_DESC_SIZE);
+
+        /*
+         * Write entire beacon with TXWI to register.
          */
         beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
-        rt2800_register_multiwrite(rt2x00dev,
-                                      beacon_base,
-                                      skbdesc->desc, skbdesc->desc_len);
-        rt2800_register_multiwrite(rt2x00dev,
-                                      beacon_base + skbdesc->desc_len,
-                                      entry->skb->data, entry->skb->len);
+        rt2800_register_multiwrite(rt2x00dev, beacon_base,
+                                   entry->skb->data, entry->skb->len);
+
+        /*
+         * Enable beaconing again.
+         */
+        rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
+        rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
+        rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
+        rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
 
         /*
          * Clean up beacon skb.
@@ -770,18 +726,6 @@ static void rt2800pci_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
 {
         struct data_queue *queue;
         unsigned int idx, qidx = 0;
-        u32 reg;
-
-        if (queue_idx == QID_BEACON) {
-                rt2800_register_read(rt2x00dev, BCN_TIME_CFG, &reg);
-                if (!rt2x00_get_field32(reg, BCN_TIME_CFG_BEACON_GEN)) {
-                        rt2x00_set_field32(&reg, BCN_TIME_CFG_TSF_TICKING, 1);
-                        rt2x00_set_field32(&reg, BCN_TIME_CFG_TBTT_ENABLE, 1);
-                        rt2x00_set_field32(&reg, BCN_TIME_CFG_BEACON_GEN, 1);
-                        rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg);
-                }
-                return;
-        }
 
         if (queue_idx > QID_HCCA && queue_idx != QID_MGMT)
                 return;
@@ -824,34 +768,21 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
         struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
         struct queue_entry_priv_pci *entry_priv = entry->priv_data;
         __le32 *rxd = entry_priv->desc;
-        __le32 *rxwi = (__le32 *)entry->skb->data;
-        u32 rxd3;
-        u32 rxwi0;
-        u32 rxwi1;
-        u32 rxwi2;
-        u32 rxwi3;
-
-        rt2x00_desc_read(rxd, 3, &rxd3);
-        rt2x00_desc_read(rxwi, 0, &rxwi0);
-        rt2x00_desc_read(rxwi, 1, &rxwi1);
-        rt2x00_desc_read(rxwi, 2, &rxwi2);
-        rt2x00_desc_read(rxwi, 3, &rxwi3);
-
-        if (rt2x00_get_field32(rxd3, RXD_W3_CRC_ERROR))
+        u32 word;
+
+        rt2x00_desc_read(rxd, 3, &word);
+
+        if (rt2x00_get_field32(word, RXD_W3_CRC_ERROR))
                 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
 
-        if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
-                /*
-                 * Unfortunately we don't know the cipher type used during
-                 * decryption. This prevents us from correct providing
-                 * correct statistics through debugfs.
-                 */
-                rxdesc->cipher = rt2x00_get_field32(rxwi0, RXWI_W0_UDF);
-                rxdesc->cipher_status =
-                    rt2x00_get_field32(rxd3, RXD_W3_CIPHER_ERROR);
-        }
+        /*
+         * Unfortunately we don't know the cipher type used during
+         * decryption. This prevents us from correct providing
+         * correct statistics through debugfs.
+         */
+        rxdesc->cipher_status = rt2x00_get_field32(word, RXD_W3_CIPHER_ERROR);
 
-        if (rt2x00_get_field32(rxd3, RXD_W3_DECRYPTED)) {
+        if (rt2x00_get_field32(word, RXD_W3_DECRYPTED)) {
                 /*
                  * Hardware has stripped IV/EIV data from 802.11 frame during
                  * decryption. Unfortunately the descriptor doesn't contain
@@ -866,47 +797,22 @@ static void rt2800pci_fill_rxdone(struct queue_entry *entry,
                         rxdesc->flags |= RX_FLAG_MMIC_ERROR;
         }
 
-        if (rt2x00_get_field32(rxd3, RXD_W3_MY_BSS))
+        if (rt2x00_get_field32(word, RXD_W3_MY_BSS))
                 rxdesc->dev_flags |= RXDONE_MY_BSS;
 
-        if (rt2x00_get_field32(rxd3, RXD_W3_L2PAD))
+        if (rt2x00_get_field32(word, RXD_W3_L2PAD))
                 rxdesc->dev_flags |= RXDONE_L2PAD;
 
-        if (rt2x00_get_field32(rxwi1, RXWI_W1_SHORT_GI))
-                rxdesc->flags |= RX_FLAG_SHORT_GI;
-
-        if (rt2x00_get_field32(rxwi1, RXWI_W1_BW))
-                rxdesc->flags |= RX_FLAG_40MHZ;
-
-        /*
-         * Detect RX rate, always use MCS as signal type.
-         */
-        rxdesc->dev_flags |= RXDONE_SIGNAL_MCS;
-        rxdesc->rate_mode = rt2x00_get_field32(rxwi1, RXWI_W1_PHYMODE);
-        rxdesc->signal = rt2x00_get_field32(rxwi1, RXWI_W1_MCS);
-
         /*
-         * Mask of 0x8 bit to remove the short preamble flag.
+         * Process the RXWI structure that is at the start of the buffer.
          */
-        if (rxdesc->rate_mode == RATE_MODE_CCK)
-                rxdesc->signal &= ~0x8;
-
-        rxdesc->rssi =
-            (rt2x00_get_field32(rxwi2, RXWI_W2_RSSI0) +
-             rt2x00_get_field32(rxwi2, RXWI_W2_RSSI1)) / 2;
-
-        rxdesc->size = rt2x00_get_field32(rxwi0, RXWI_W0_MPDU_TOTAL_BYTE_COUNT);
+        rt2800_process_rxwi(entry->skb, rxdesc);
 
         /*
          * Set RX IDX in register to inform hardware that we have handled
          * this entry and it is available for reuse again.
          */
         rt2800_register_write(rt2x00dev, RX_CRX_IDX, entry->entry_idx);
-
-        /*
-         * Remove TXWI descriptor from start of buffer.
-         */
-        skb_pull(entry->skb, RXWI_DESC_SIZE);
 }
 
 /*