diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 91 |
1 files changed, 76 insertions, 15 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 2648f315a934..e37bbeab9233 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -41,9 +41,6 @@ | |||
41 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) | 41 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) |
42 | #include "rt2x00usb.h" | 42 | #include "rt2x00usb.h" |
43 | #endif | 43 | #endif |
44 | #if defined(CONFIG_RT2X00_LIB_PCI) || defined(CONFIG_RT2X00_LIB_PCI_MODULE) | ||
45 | #include "rt2x00pci.h" | ||
46 | #endif | ||
47 | #include "rt2800lib.h" | 44 | #include "rt2800lib.h" |
48 | #include "rt2800.h" | 45 | #include "rt2800.h" |
49 | #include "rt2800usb.h" | 46 | #include "rt2800usb.h" |
@@ -76,6 +73,23 @@ MODULE_LICENSE("GPL"); | |||
76 | rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \ | 73 | rt2800_regbusy_read((__dev), H2M_MAILBOX_CSR, \ |
77 | H2M_MAILBOX_CSR_OWNER, (__reg)) | 74 | H2M_MAILBOX_CSR_OWNER, (__reg)) |
78 | 75 | ||
76 | static inline bool rt2800_is_305x_soc(struct rt2x00_dev *rt2x00dev) | ||
77 | { | ||
78 | /* check for rt2872 on SoC */ | ||
79 | if (!rt2x00_is_soc(rt2x00dev) || | ||
80 | !rt2x00_rt(rt2x00dev, RT2872)) | ||
81 | return false; | ||
82 | |||
83 | /* we know for sure that these rf chipsets are used on rt305x boards */ | ||
84 | if (rt2x00_rf(rt2x00dev, RF3020) || | ||
85 | rt2x00_rf(rt2x00dev, RF3021) || | ||
86 | rt2x00_rf(rt2x00dev, RF3022)) | ||
87 | return true; | ||
88 | |||
89 | NOTICE(rt2x00dev, "Unknown RF chipset on rt305x\n"); | ||
90 | return false; | ||
91 | } | ||
92 | |||
79 | static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | 93 | static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, |
80 | const unsigned int word, const u8 value) | 94 | const unsigned int word, const u8 value) |
81 | { | 95 | { |
@@ -794,6 +808,11 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev, | |||
794 | TXPOWER_G_TO_DEV(info->tx_power1)); | 808 | TXPOWER_G_TO_DEV(info->tx_power1)); |
795 | rt2800_rfcsr_write(rt2x00dev, 12, rfcsr); | 809 | rt2800_rfcsr_write(rt2x00dev, 12, rfcsr); |
796 | 810 | ||
811 | rt2800_rfcsr_read(rt2x00dev, 13, &rfcsr); | ||
812 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, | ||
813 | TXPOWER_G_TO_DEV(info->tx_power2)); | ||
814 | rt2800_rfcsr_write(rt2x00dev, 13, rfcsr); | ||
815 | |||
797 | rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr); | 816 | rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr); |
798 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); | 817 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); |
799 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); | 818 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); |
@@ -849,7 +868,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
849 | } | 868 | } |
850 | 869 | ||
851 | rt2800_register_read(rt2x00dev, TX_BAND_CFG, ®); | 870 | rt2800_register_read(rt2x00dev, TX_BAND_CFG, ®); |
852 | rt2x00_set_field32(®, TX_BAND_CFG_HT40_PLUS, conf_is_ht40_plus(conf)); | 871 | rt2x00_set_field32(®, TX_BAND_CFG_HT40_MINUS, conf_is_ht40_minus(conf)); |
853 | rt2x00_set_field32(®, TX_BAND_CFG_A, rf->channel > 14); | 872 | rt2x00_set_field32(®, TX_BAND_CFG_A, rf->channel > 14); |
854 | rt2x00_set_field32(®, TX_BAND_CFG_BG, rf->channel <= 14); | 873 | rt2x00_set_field32(®, TX_BAND_CFG_BG, rf->channel <= 14); |
855 | rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg); | 874 | rt2800_register_write(rt2x00dev, TX_BAND_CFG, reg); |
@@ -882,7 +901,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
882 | rt2800_bbp_write(rt2x00dev, 4, bbp); | 901 | rt2800_bbp_write(rt2x00dev, 4, bbp); |
883 | 902 | ||
884 | rt2800_bbp_read(rt2x00dev, 3, &bbp); | 903 | rt2800_bbp_read(rt2x00dev, 3, &bbp); |
885 | rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf)); | 904 | rt2x00_set_field8(&bbp, BBP3_HT40_MINUS, conf_is_ht40_minus(conf)); |
886 | rt2800_bbp_write(rt2x00dev, 3, bbp); | 905 | rt2800_bbp_write(rt2x00dev, 3, bbp); |
887 | 906 | ||
888 | if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { | 907 | if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { |
@@ -1551,6 +1570,9 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
1551 | rt2800_wait_bbp_ready(rt2x00dev))) | 1570 | rt2800_wait_bbp_ready(rt2x00dev))) |
1552 | return -EACCES; | 1571 | return -EACCES; |
1553 | 1572 | ||
1573 | if (rt2800_is_305x_soc(rt2x00dev)) | ||
1574 | rt2800_bbp_write(rt2x00dev, 31, 0x08); | ||
1575 | |||
1554 | rt2800_bbp_write(rt2x00dev, 65, 0x2c); | 1576 | rt2800_bbp_write(rt2x00dev, 65, 0x2c); |
1555 | rt2800_bbp_write(rt2x00dev, 66, 0x38); | 1577 | rt2800_bbp_write(rt2x00dev, 66, 0x38); |
1556 | 1578 | ||
@@ -1571,6 +1593,9 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
1571 | rt2800_bbp_write(rt2x00dev, 79, 0x13); | 1593 | rt2800_bbp_write(rt2x00dev, 79, 0x13); |
1572 | rt2800_bbp_write(rt2x00dev, 80, 0x05); | 1594 | rt2800_bbp_write(rt2x00dev, 80, 0x05); |
1573 | rt2800_bbp_write(rt2x00dev, 81, 0x33); | 1595 | rt2800_bbp_write(rt2x00dev, 81, 0x33); |
1596 | } else if (rt2800_is_305x_soc(rt2x00dev)) { | ||
1597 | rt2800_bbp_write(rt2x00dev, 78, 0x0e); | ||
1598 | rt2800_bbp_write(rt2x00dev, 80, 0x08); | ||
1574 | } else { | 1599 | } else { |
1575 | rt2800_bbp_write(rt2x00dev, 81, 0x37); | 1600 | rt2800_bbp_write(rt2x00dev, 81, 0x37); |
1576 | } | 1601 | } |
@@ -1591,12 +1616,16 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
1591 | if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || | 1616 | if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || |
1592 | rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || | 1617 | rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || |
1593 | rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || | 1618 | rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || |
1594 | rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E)) | 1619 | rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || |
1620 | rt2800_is_305x_soc(rt2x00dev)) | ||
1595 | rt2800_bbp_write(rt2x00dev, 103, 0xc0); | 1621 | rt2800_bbp_write(rt2x00dev, 103, 0xc0); |
1596 | else | 1622 | else |
1597 | rt2800_bbp_write(rt2x00dev, 103, 0x00); | 1623 | rt2800_bbp_write(rt2x00dev, 103, 0x00); |
1598 | 1624 | ||
1599 | rt2800_bbp_write(rt2x00dev, 105, 0x05); | 1625 | if (rt2800_is_305x_soc(rt2x00dev)) |
1626 | rt2800_bbp_write(rt2x00dev, 105, 0x01); | ||
1627 | else | ||
1628 | rt2800_bbp_write(rt2x00dev, 105, 0x05); | ||
1600 | rt2800_bbp_write(rt2x00dev, 106, 0x35); | 1629 | rt2800_bbp_write(rt2x00dev, 106, 0x35); |
1601 | 1630 | ||
1602 | if (rt2x00_rt(rt2x00dev, RT3071) || | 1631 | if (rt2x00_rt(rt2x00dev, RT3071) || |
@@ -1613,11 +1642,6 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
1613 | rt2800_bbp_write(rt2x00dev, 138, value); | 1642 | rt2800_bbp_write(rt2x00dev, 138, value); |
1614 | } | 1643 | } |
1615 | 1644 | ||
1616 | if (rt2x00_rt(rt2x00dev, RT2872)) { | ||
1617 | rt2800_bbp_write(rt2x00dev, 31, 0x08); | ||
1618 | rt2800_bbp_write(rt2x00dev, 78, 0x0e); | ||
1619 | rt2800_bbp_write(rt2x00dev, 80, 0x08); | ||
1620 | } | ||
1621 | 1645 | ||
1622 | for (i = 0; i < EEPROM_BBP_SIZE; i++) { | 1646 | for (i = 0; i < EEPROM_BBP_SIZE; i++) { |
1623 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); | 1647 | rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom); |
@@ -1703,7 +1727,8 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
1703 | if (!rt2x00_rt(rt2x00dev, RT3070) && | 1727 | if (!rt2x00_rt(rt2x00dev, RT3070) && |
1704 | !rt2x00_rt(rt2x00dev, RT3071) && | 1728 | !rt2x00_rt(rt2x00dev, RT3071) && |
1705 | !rt2x00_rt(rt2x00dev, RT3090) && | 1729 | !rt2x00_rt(rt2x00dev, RT3090) && |
1706 | !rt2x00_rt(rt2x00dev, RT3390)) | 1730 | !rt2x00_rt(rt2x00dev, RT3390) && |
1731 | !rt2800_is_305x_soc(rt2x00dev)) | ||
1707 | return 0; | 1732 | return 0; |
1708 | 1733 | ||
1709 | /* | 1734 | /* |
@@ -1771,6 +1796,40 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
1771 | rt2800_rfcsr_write(rt2x00dev, 29, 0x8f); | 1796 | rt2800_rfcsr_write(rt2x00dev, 29, 0x8f); |
1772 | rt2800_rfcsr_write(rt2x00dev, 30, 0x20); | 1797 | rt2800_rfcsr_write(rt2x00dev, 30, 0x20); |
1773 | rt2800_rfcsr_write(rt2x00dev, 31, 0x0f); | 1798 | rt2800_rfcsr_write(rt2x00dev, 31, 0x0f); |
1799 | } else if (rt2800_is_305x_soc(rt2x00dev)) { | ||
1800 | rt2800_rfcsr_write(rt2x00dev, 0, 0x50); | ||
1801 | rt2800_rfcsr_write(rt2x00dev, 1, 0x01); | ||
1802 | rt2800_rfcsr_write(rt2x00dev, 2, 0xf7); | ||
1803 | rt2800_rfcsr_write(rt2x00dev, 3, 0x75); | ||
1804 | rt2800_rfcsr_write(rt2x00dev, 4, 0x40); | ||
1805 | rt2800_rfcsr_write(rt2x00dev, 5, 0x03); | ||
1806 | rt2800_rfcsr_write(rt2x00dev, 6, 0x02); | ||
1807 | rt2800_rfcsr_write(rt2x00dev, 7, 0x50); | ||
1808 | rt2800_rfcsr_write(rt2x00dev, 8, 0x39); | ||
1809 | rt2800_rfcsr_write(rt2x00dev, 9, 0x0f); | ||
1810 | rt2800_rfcsr_write(rt2x00dev, 10, 0x60); | ||
1811 | rt2800_rfcsr_write(rt2x00dev, 11, 0x21); | ||
1812 | rt2800_rfcsr_write(rt2x00dev, 12, 0x75); | ||
1813 | rt2800_rfcsr_write(rt2x00dev, 13, 0x75); | ||
1814 | rt2800_rfcsr_write(rt2x00dev, 14, 0x90); | ||
1815 | rt2800_rfcsr_write(rt2x00dev, 15, 0x58); | ||
1816 | rt2800_rfcsr_write(rt2x00dev, 16, 0xb3); | ||
1817 | rt2800_rfcsr_write(rt2x00dev, 17, 0x92); | ||
1818 | rt2800_rfcsr_write(rt2x00dev, 18, 0x2c); | ||
1819 | rt2800_rfcsr_write(rt2x00dev, 19, 0x02); | ||
1820 | rt2800_rfcsr_write(rt2x00dev, 20, 0xba); | ||
1821 | rt2800_rfcsr_write(rt2x00dev, 21, 0xdb); | ||
1822 | rt2800_rfcsr_write(rt2x00dev, 22, 0x00); | ||
1823 | rt2800_rfcsr_write(rt2x00dev, 23, 0x31); | ||
1824 | rt2800_rfcsr_write(rt2x00dev, 24, 0x08); | ||
1825 | rt2800_rfcsr_write(rt2x00dev, 25, 0x01); | ||
1826 | rt2800_rfcsr_write(rt2x00dev, 26, 0x25); | ||
1827 | rt2800_rfcsr_write(rt2x00dev, 27, 0x23); | ||
1828 | rt2800_rfcsr_write(rt2x00dev, 28, 0x13); | ||
1829 | rt2800_rfcsr_write(rt2x00dev, 29, 0x83); | ||
1830 | rt2800_rfcsr_write(rt2x00dev, 30, 0x00); | ||
1831 | rt2800_rfcsr_write(rt2x00dev, 31, 0x00); | ||
1832 | return 0; | ||
1774 | } | 1833 | } |
1775 | 1834 | ||
1776 | if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { | 1835 | if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { |
@@ -1986,7 +2045,6 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1986 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); | 2045 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); |
1987 | } else if (rt2x00_rt(rt2x00dev, RT2860) || | 2046 | } else if (rt2x00_rt(rt2x00dev, RT2860) || |
1988 | rt2x00_rt(rt2x00dev, RT2870) || | 2047 | rt2x00_rt(rt2x00dev, RT2870) || |
1989 | rt2x00_rt(rt2x00dev, RT2872) || | ||
1990 | rt2x00_rt(rt2x00dev, RT2872)) { | 2048 | rt2x00_rt(rt2x00dev, RT2872)) { |
1991 | /* | 2049 | /* |
1992 | * There is a max of 2 RX streams for RT28x0 series | 2050 | * There is a max of 2 RX streams for RT28x0 series |
@@ -2318,8 +2376,11 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
2318 | else | 2376 | else |
2319 | spec->ht.ht_supported = false; | 2377 | spec->ht.ht_supported = false; |
2320 | 2378 | ||
2379 | /* | ||
2380 | * Don't set IEEE80211_HT_CAP_SUP_WIDTH_20_40 for now as it causes | ||
2381 | * reception problems with HT40 capable 11n APs | ||
2382 | */ | ||
2321 | spec->ht.cap = | 2383 | spec->ht.cap = |
2322 | IEEE80211_HT_CAP_SUP_WIDTH_20_40 | | ||
2323 | IEEE80211_HT_CAP_GRN_FLD | | 2384 | IEEE80211_HT_CAP_GRN_FLD | |
2324 | IEEE80211_HT_CAP_SGI_20 | | 2385 | IEEE80211_HT_CAP_SGI_20 | |
2325 | IEEE80211_HT_CAP_SGI_40 | | 2386 | IEEE80211_HT_CAP_SGI_40 | |