diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 115 |
1 files changed, 68 insertions, 47 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index a45e027f2d1f..18d4d8e4ae6b 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -40,6 +40,9 @@ | |||
40 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) | 40 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) |
41 | #include "rt2x00usb.h" | 41 | #include "rt2x00usb.h" |
42 | #endif | 42 | #endif |
43 | #if defined(CONFIG_RT2X00_LIB_PCI) || defined(CONFIG_RT2X00_LIB_PCI_MODULE) | ||
44 | #include "rt2x00pci.h" | ||
45 | #endif | ||
43 | #include "rt2800lib.h" | 46 | #include "rt2800lib.h" |
44 | #include "rt2800.h" | 47 | #include "rt2800.h" |
45 | #include "rt2800usb.h" | 48 | #include "rt2800usb.h" |
@@ -89,7 +92,7 @@ static void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
89 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | 92 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); |
90 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | 93 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); |
91 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); | 94 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 0); |
92 | if (rt2x00_intf_is_pci(rt2x00dev)) | 95 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) |
93 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | 96 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); |
94 | 97 | ||
95 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | 98 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); |
@@ -118,7 +121,7 @@ static void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
118 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); | 121 | rt2x00_set_field32(®, BBP_CSR_CFG_REGNUM, word); |
119 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); | 122 | rt2x00_set_field32(®, BBP_CSR_CFG_BUSY, 1); |
120 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); | 123 | rt2x00_set_field32(®, BBP_CSR_CFG_READ_CONTROL, 1); |
121 | if (rt2x00_intf_is_pci(rt2x00dev)) | 124 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) |
122 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); | 125 | rt2x00_set_field32(®, BBP_CSR_CFG_BBP_RW_MODE, 1); |
123 | 126 | ||
124 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); | 127 | rt2800_register_write_lock(rt2x00dev, BBP_CSR_CFG, reg); |
@@ -218,9 +221,9 @@ void rt2800_mcu_request(struct rt2x00_dev *rt2x00dev, | |||
218 | u32 reg; | 221 | u32 reg; |
219 | 222 | ||
220 | /* | 223 | /* |
221 | * RT2880 and RT3052 don't support MCU requests. | 224 | * SOC devices don't support MCU requests. |
222 | */ | 225 | */ |
223 | if (rt2x00_rt(rt2x00dev, RT2880) || rt2x00_rt(rt2x00dev, RT3052)) | 226 | if (rt2x00_is_soc(rt2x00dev)) |
224 | return; | 227 | return; |
225 | 228 | ||
226 | mutex_lock(&rt2x00dev->csr_mutex); | 229 | mutex_lock(&rt2x00dev->csr_mutex); |
@@ -660,7 +663,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant) | |||
660 | switch ((int)ant->tx) { | 663 | switch ((int)ant->tx) { |
661 | case 1: | 664 | case 1: |
662 | rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0); | 665 | rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 0); |
663 | if (rt2x00_intf_is_pci(rt2x00dev)) | 666 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) |
664 | rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0); | 667 | rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, 0); |
665 | break; | 668 | break; |
666 | case 2: | 669 | case 2: |
@@ -895,7 +898,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
895 | rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf)); | 898 | rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf)); |
896 | rt2800_bbp_write(rt2x00dev, 3, bbp); | 899 | rt2800_bbp_write(rt2x00dev, 3, bbp); |
897 | 900 | ||
898 | if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) { | 901 | if (rt2x00_rt(rt2x00dev, RT2860) && |
902 | (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) { | ||
899 | if (conf_is_ht40(conf)) { | 903 | if (conf_is_ht40(conf)) { |
900 | rt2800_bbp_write(rt2x00dev, 69, 0x1a); | 904 | rt2800_bbp_write(rt2x00dev, 69, 0x1a); |
901 | rt2800_bbp_write(rt2x00dev, 70, 0x0a); | 905 | rt2800_bbp_write(rt2x00dev, 70, 0x0a); |
@@ -1057,8 +1061,9 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats); | |||
1057 | static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) | 1061 | static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) |
1058 | { | 1062 | { |
1059 | if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) { | 1063 | if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) { |
1060 | if (rt2x00_intf_is_usb(rt2x00dev) && | 1064 | if (rt2x00_is_usb(rt2x00dev) && |
1061 | rt2x00_rev(rt2x00dev) == RT3070_VERSION) | 1065 | rt2x00_rt(rt2x00dev, RT3070) && |
1066 | (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) | ||
1062 | return 0x1c + (2 * rt2x00dev->lna_gain); | 1067 | return 0x1c + (2 * rt2x00dev->lna_gain); |
1063 | else | 1068 | else |
1064 | return 0x2e + rt2x00dev->lna_gain; | 1069 | return 0x2e + rt2x00dev->lna_gain; |
@@ -1089,7 +1094,8 @@ EXPORT_SYMBOL_GPL(rt2800_reset_tuner); | |||
1089 | void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual, | 1094 | void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual, |
1090 | const u32 count) | 1095 | const u32 count) |
1091 | { | 1096 | { |
1092 | if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) | 1097 | if (rt2x00_rt(rt2x00dev, RT2860) && |
1098 | (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) | ||
1093 | return; | 1099 | return; |
1094 | 1100 | ||
1095 | /* | 1101 | /* |
@@ -1109,7 +1115,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1109 | u32 reg; | 1115 | u32 reg; |
1110 | unsigned int i; | 1116 | unsigned int i; |
1111 | 1117 | ||
1112 | if (rt2x00_intf_is_usb(rt2x00dev)) { | 1118 | if (rt2x00_is_usb(rt2x00dev)) { |
1113 | /* | 1119 | /* |
1114 | * Wait until BBP and RF are ready. | 1120 | * Wait until BBP and RF are ready. |
1115 | */ | 1121 | */ |
@@ -1128,7 +1134,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1128 | rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, ®); | 1134 | rt2800_register_read(rt2x00dev, PBF_SYS_CTRL, ®); |
1129 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, | 1135 | rt2800_register_write(rt2x00dev, PBF_SYS_CTRL, |
1130 | reg & ~0x00002000); | 1136 | reg & ~0x00002000); |
1131 | } else if (rt2x00_intf_is_pci(rt2x00dev)) | 1137 | } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) |
1132 | rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); | 1138 | rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x00000003); |
1133 | 1139 | ||
1134 | rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®); | 1140 | rt2800_register_read(rt2x00dev, MAC_SYS_CTRL, ®); |
@@ -1136,7 +1142,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1136 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1); | 1142 | rt2x00_set_field32(®, MAC_SYS_CTRL_RESET_BBP, 1); |
1137 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); | 1143 | rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, reg); |
1138 | 1144 | ||
1139 | if (rt2x00_intf_is_usb(rt2x00dev)) { | 1145 | if (rt2x00_is_usb(rt2x00dev)) { |
1140 | rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); | 1146 | rt2800_register_write(rt2x00dev, USB_DMA_CFG, 0x00000000); |
1141 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) | 1147 | #if defined(CONFIG_RT2X00_LIB_USB) || defined(CONFIG_RT2X00_LIB_USB_MODULE) |
1142 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, | 1148 | rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE, 0, |
@@ -1174,8 +1180,9 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1174 | rt2x00_set_field32(®, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0); | 1180 | rt2x00_set_field32(®, BCN_TIME_CFG_TX_TIME_COMPENSATE, 0); |
1175 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); | 1181 | rt2800_register_write(rt2x00dev, BCN_TIME_CFG, reg); |
1176 | 1182 | ||
1177 | if (rt2x00_intf_is_usb(rt2x00dev) && | 1183 | if (rt2x00_is_usb(rt2x00dev) && |
1178 | rt2x00_rev(rt2x00dev) == RT3070_VERSION) { | 1184 | rt2x00_rt(rt2x00dev, RT3070) && |
1185 | (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) { | ||
1179 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); | 1186 | rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); |
1180 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); | 1187 | rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00000000); |
1181 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); | 1188 | rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); |
@@ -1202,8 +1209,14 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1202 | 1209 | ||
1203 | rt2800_register_read(rt2x00dev, MAX_LEN_CFG, ®); | 1210 | rt2800_register_read(rt2x00dev, MAX_LEN_CFG, ®); |
1204 | rt2x00_set_field32(®, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE); | 1211 | rt2x00_set_field32(®, MAX_LEN_CFG_MAX_MPDU, AGGREGATION_SIZE); |
1205 | if (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION && | 1212 | if ((rt2x00_rt(rt2x00dev, RT2872) && |
1206 | rt2x00_rev(rt2x00dev) < RT3070_VERSION) | 1213 | (rt2x00_rev(rt2x00dev) >= RT2880E_VERSION)) || |
1214 | rt2x00_rt(rt2x00dev, RT2880) || | ||
1215 | rt2x00_rt(rt2x00dev, RT2883) || | ||
1216 | rt2x00_rt(rt2x00dev, RT2890) || | ||
1217 | rt2x00_rt(rt2x00dev, RT3052) || | ||
1218 | (rt2x00_rt(rt2x00dev, RT3070) && | ||
1219 | (rt2x00_rev(rt2x00dev) < RT3070_VERSION))) | ||
1207 | rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 2); | 1220 | rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 2); |
1208 | else | 1221 | else |
1209 | rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 1); | 1222 | rt2x00_set_field32(®, MAX_LEN_CFG_MAX_PSDU, 1); |
@@ -1293,7 +1306,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1293 | rt2x00_set_field32(®, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1); | 1306 | rt2x00_set_field32(®, GF40_PROT_CFG_TX_OP_ALLOW_GF40, 1); |
1294 | rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg); | 1307 | rt2800_register_write(rt2x00dev, GF40_PROT_CFG, reg); |
1295 | 1308 | ||
1296 | if (rt2x00_intf_is_usb(rt2x00dev)) { | 1309 | if (rt2x00_is_usb(rt2x00dev)) { |
1297 | rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006); | 1310 | rt2800_register_write(rt2x00dev, PBF_CFG, 0xf40006); |
1298 | 1311 | ||
1299 | rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®); | 1312 | rt2800_register_read(rt2x00dev, WPDMA_GLO_CFG, ®); |
@@ -1353,7 +1366,7 @@ int rt2800_init_registers(struct rt2x00_dev *rt2x00dev) | |||
1353 | rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0); | 1366 | rt2800_register_write(rt2x00dev, HW_BEACON_BASE6, 0); |
1354 | rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0); | 1367 | rt2800_register_write(rt2x00dev, HW_BEACON_BASE7, 0); |
1355 | 1368 | ||
1356 | if (rt2x00_intf_is_usb(rt2x00dev)) { | 1369 | if (rt2x00_is_usb(rt2x00dev)) { |
1357 | rt2800_register_read(rt2x00dev, USB_CYC_CFG, ®); | 1370 | rt2800_register_read(rt2x00dev, USB_CYC_CFG, ®); |
1358 | rt2x00_set_field32(®, USB_CYC_CFG_CLOCK_CYCLE, 30); | 1371 | rt2x00_set_field32(®, USB_CYC_CFG_CLOCK_CYCLE, 30); |
1359 | rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg); | 1372 | rt2800_register_write(rt2x00dev, USB_CYC_CFG, reg); |
@@ -1482,16 +1495,19 @@ int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev) | |||
1482 | rt2800_bbp_write(rt2x00dev, 103, 0x00); | 1495 | rt2800_bbp_write(rt2x00dev, 103, 0x00); |
1483 | rt2800_bbp_write(rt2x00dev, 105, 0x05); | 1496 | rt2800_bbp_write(rt2x00dev, 105, 0x05); |
1484 | 1497 | ||
1485 | if (rt2x00_rev(rt2x00dev) == RT2860C_VERSION) { | 1498 | if (rt2x00_rt(rt2x00dev, RT2860) && |
1499 | (rt2x00_rev(rt2x00dev) == RT2860C_VERSION)) { | ||
1486 | rt2800_bbp_write(rt2x00dev, 69, 0x16); | 1500 | rt2800_bbp_write(rt2x00dev, 69, 0x16); |
1487 | rt2800_bbp_write(rt2x00dev, 73, 0x12); | 1501 | rt2800_bbp_write(rt2x00dev, 73, 0x12); |
1488 | } | 1502 | } |
1489 | 1503 | ||
1490 | if (rt2x00_rev(rt2x00dev) > RT2860D_VERSION) | 1504 | if (rt2x00_rt(rt2x00dev, RT2860) && |
1505 | (rt2x00_rev(rt2x00dev) > RT2860D_VERSION)) | ||
1491 | rt2800_bbp_write(rt2x00dev, 84, 0x19); | 1506 | rt2800_bbp_write(rt2x00dev, 84, 0x19); |
1492 | 1507 | ||
1493 | if (rt2x00_intf_is_usb(rt2x00dev) && | 1508 | if (rt2x00_is_usb(rt2x00dev) && |
1494 | rt2x00_rev(rt2x00dev) == RT3070_VERSION) { | 1509 | rt2x00_rt(rt2x00dev, RT3070) && |
1510 | (rt2x00_rev(rt2x00dev) == RT3070_VERSION)) { | ||
1495 | rt2800_bbp_write(rt2x00dev, 70, 0x0a); | 1511 | rt2800_bbp_write(rt2x00dev, 70, 0x0a); |
1496 | rt2800_bbp_write(rt2x00dev, 84, 0x99); | 1512 | rt2800_bbp_write(rt2x00dev, 84, 0x99); |
1497 | rt2800_bbp_write(rt2x00dev, 105, 0x05); | 1513 | rt2800_bbp_write(rt2x00dev, 105, 0x05); |
@@ -1582,11 +1598,12 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
1582 | u8 rfcsr; | 1598 | u8 rfcsr; |
1583 | u8 bbp; | 1599 | u8 bbp; |
1584 | 1600 | ||
1585 | if (rt2x00_intf_is_usb(rt2x00dev) && | 1601 | if (rt2x00_is_usb(rt2x00dev) && |
1586 | rt2x00_rev(rt2x00dev) != RT3070_VERSION) | 1602 | rt2x00_rt(rt2x00dev, RT3070) && |
1603 | (rt2x00_rev(rt2x00dev) != RT3070_VERSION)) | ||
1587 | return 0; | 1604 | return 0; |
1588 | 1605 | ||
1589 | if (rt2x00_intf_is_pci(rt2x00dev)) { | 1606 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) { |
1590 | if (!rt2x00_rf(rt2x00dev, RF3020) && | 1607 | if (!rt2x00_rf(rt2x00dev, RF3020) && |
1591 | !rt2x00_rf(rt2x00dev, RF3021) && | 1608 | !rt2x00_rf(rt2x00dev, RF3021) && |
1592 | !rt2x00_rf(rt2x00dev, RF3022)) | 1609 | !rt2x00_rf(rt2x00dev, RF3022)) |
@@ -1603,7 +1620,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
1603 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); | 1620 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); |
1604 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | 1621 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); |
1605 | 1622 | ||
1606 | if (rt2x00_intf_is_usb(rt2x00dev)) { | 1623 | if (rt2x00_is_usb(rt2x00dev)) { |
1607 | rt2800_rfcsr_write(rt2x00dev, 4, 0x40); | 1624 | rt2800_rfcsr_write(rt2x00dev, 4, 0x40); |
1608 | rt2800_rfcsr_write(rt2x00dev, 5, 0x03); | 1625 | rt2800_rfcsr_write(rt2x00dev, 5, 0x03); |
1609 | rt2800_rfcsr_write(rt2x00dev, 6, 0x02); | 1626 | rt2800_rfcsr_write(rt2x00dev, 6, 0x02); |
@@ -1624,7 +1641,7 @@ int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
1624 | rt2800_rfcsr_write(rt2x00dev, 25, 0x01); | 1641 | rt2800_rfcsr_write(rt2x00dev, 25, 0x01); |
1625 | rt2800_rfcsr_write(rt2x00dev, 27, 0x03); | 1642 | rt2800_rfcsr_write(rt2x00dev, 27, 0x03); |
1626 | rt2800_rfcsr_write(rt2x00dev, 29, 0x1f); | 1643 | rt2800_rfcsr_write(rt2x00dev, 29, 0x1f); |
1627 | } else if (rt2x00_intf_is_pci(rt2x00dev)) { | 1644 | } else if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) { |
1628 | rt2800_rfcsr_write(rt2x00dev, 0, 0x50); | 1645 | rt2800_rfcsr_write(rt2x00dev, 0, 0x50); |
1629 | rt2800_rfcsr_write(rt2x00dev, 1, 0x01); | 1646 | rt2800_rfcsr_write(rt2x00dev, 1, 0x01); |
1630 | rt2800_rfcsr_write(rt2x00dev, 2, 0xf7); | 1647 | rt2800_rfcsr_write(rt2x00dev, 2, 0xf7); |
@@ -1754,7 +1771,12 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1754 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820); | 1771 | rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF2820); |
1755 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); | 1772 | rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word); |
1756 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); | 1773 | EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word); |
1757 | } else if (rt2x00_rev(rt2x00dev) < RT2883_VERSION) { | 1774 | } else if (rt2x00_rt(rt2x00dev, RT2860) || |
1775 | rt2x00_rt(rt2x00dev, RT2870) || | ||
1776 | rt2x00_rt(rt2x00dev, RT2872) || | ||
1777 | rt2x00_rt(rt2x00dev, RT2880) || | ||
1778 | (rt2x00_rt(rt2x00dev, RT2883) && | ||
1779 | (rt2x00_rev(rt2x00dev) < RT2883_VERSION))) { | ||
1758 | /* | 1780 | /* |
1759 | * There is a max of 2 RX streams for RT28x0 series | 1781 | * There is a max of 2 RX streams for RT28x0 series |
1760 | */ | 1782 | */ |
@@ -1853,25 +1875,24 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
1853 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); | 1875 | value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE); |
1854 | rt2800_register_read(rt2x00dev, MAC_CSR0, ®); | 1876 | rt2800_register_read(rt2x00dev, MAC_CSR0, ®); |
1855 | 1877 | ||
1856 | rt2x00_set_chip_rf(rt2x00dev, value, reg); | 1878 | rt2x00_set_chip(rt2x00dev, rt2x00_get_field32(reg, MAC_CSR0_CHIPSET), |
1857 | 1879 | value, rt2x00_get_field32(reg, MAC_CSR0_REVISION)); | |
1858 | if (rt2x00_intf_is_usb(rt2x00dev)) { | 1880 | |
1859 | /* | 1881 | if (!rt2x00_rt(rt2x00dev, RT2860) && |
1860 | * The check for rt2860 is not a typo, some rt2870 hardware | 1882 | !rt2x00_rt(rt2x00dev, RT2870) && |
1861 | * identifies itself as rt2860 in the CSR register. | 1883 | !rt2x00_rt(rt2x00dev, RT2872) && |
1862 | */ | 1884 | !rt2x00_rt(rt2x00dev, RT2880) && |
1863 | if (rt2x00_check_rev(rt2x00dev, 0xfff00000, 0x28600000) || | 1885 | !rt2x00_rt(rt2x00dev, RT2883) && |
1864 | rt2x00_check_rev(rt2x00dev, 0xfff00000, 0x28700000) || | 1886 | !rt2x00_rt(rt2x00dev, RT2890) && |
1865 | rt2x00_check_rev(rt2x00dev, 0xfff00000, 0x28800000)) { | 1887 | !rt2x00_rt(rt2x00dev, RT3052) && |
1866 | rt2x00_set_chip_rt(rt2x00dev, RT2870); | 1888 | !rt2x00_rt(rt2x00dev, RT3070) && |
1867 | } else if (rt2x00_check_rev(rt2x00dev, 0xffff0000, 0x30700000)) { | 1889 | !rt2x00_rt(rt2x00dev, RT3071) && |
1868 | rt2x00_set_chip_rt(rt2x00dev, RT3070); | 1890 | !rt2x00_rt(rt2x00dev, RT3090) && |
1869 | } else { | 1891 | !rt2x00_rt(rt2x00dev, RT3390) && |
1870 | ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); | 1892 | !rt2x00_rt(rt2x00dev, RT3572)) { |
1871 | return -ENODEV; | 1893 | ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); |
1872 | } | 1894 | return -ENODEV; |
1873 | } | 1895 | } |
1874 | rt2x00_print_chip(rt2x00dev); | ||
1875 | 1896 | ||
1876 | if (!rt2x00_rf(rt2x00dev, RF2820) && | 1897 | if (!rt2x00_rf(rt2x00dev, RF2820) && |
1877 | !rt2x00_rf(rt2x00dev, RF2850) && | 1898 | !rt2x00_rf(rt2x00dev, RF2850) && |
@@ -2039,7 +2060,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
2039 | /* | 2060 | /* |
2040 | * Disable powersaving as default on PCI devices. | 2061 | * Disable powersaving as default on PCI devices. |
2041 | */ | 2062 | */ |
2042 | if (rt2x00_intf_is_pci(rt2x00dev)) | 2063 | if (rt2x00_is_pci(rt2x00dev) || rt2x00_is_soc(rt2x00dev)) |
2043 | rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; | 2064 | rt2x00dev->hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT; |
2044 | 2065 | ||
2045 | /* | 2066 | /* |