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path: root/drivers/net/wireless/rt2x00/rt2800lib.c
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c80
1 files changed, 45 insertions, 35 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index c4cc624bbcf2..7deac4d2459f 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -5431,45 +5431,10 @@ static int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev)
5431 5431
5432static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev) 5432static int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
5433{ 5433{
5434 u32 reg;
5435 u16 value; 5434 u16 value;
5436 u16 eeprom; 5435 u16 eeprom;
5437 u32 rt;
5438 u32 rev;
5439 u16 rf; 5436 u16 rf;
5440 5437
5441 if (rt2x00_rt(rt2x00dev, RT3290))
5442 rt2800_register_read(rt2x00dev, MAC_CSR0_3290, &reg);
5443 else
5444 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
5445
5446 rt = rt2x00_get_field32(reg, MAC_CSR0_CHIPSET);
5447 rev = rt2x00_get_field32(reg, MAC_CSR0_REVISION);
5448
5449 switch (rt) {
5450 case RT2860:
5451 case RT2872:
5452 case RT2883:
5453 case RT3070:
5454 case RT3071:
5455 case RT3090:
5456 case RT3290:
5457 case RT3352:
5458 case RT3390:
5459 case RT3572:
5460 case RT5390:
5461 case RT5392:
5462 case RT5592:
5463 break;
5464 default:
5465 ERROR(rt2x00dev,
5466 "Invalid RT chipset 0x%04x, rev %04x detected.\n",
5467 rt, rev);
5468 return -ENODEV;
5469 }
5470
5471 rt2x00_set_rt(rt2x00dev, rt, rev);
5472
5473 /* 5438 /*
5474 * Read EEPROM word for configuration. 5439 * Read EEPROM word for configuration.
5475 */ 5440 */
@@ -6067,11 +6032,56 @@ static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
6067 return 0; 6032 return 0;
6068} 6033}
6069 6034
6035static int rt2800_probe_rt(struct rt2x00_dev *rt2x00dev)
6036{
6037 u32 reg;
6038 u32 rt;
6039 u32 rev;
6040
6041 if (rt2x00_rt(rt2x00dev, RT3290))
6042 rt2800_register_read(rt2x00dev, MAC_CSR0_3290, &reg);
6043 else
6044 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
6045
6046 rt = rt2x00_get_field32(reg, MAC_CSR0_CHIPSET);
6047 rev = rt2x00_get_field32(reg, MAC_CSR0_REVISION);
6048
6049 switch (rt) {
6050 case RT2860:
6051 case RT2872:
6052 case RT2883:
6053 case RT3070:
6054 case RT3071:
6055 case RT3090:
6056 case RT3290:
6057 case RT3352:
6058 case RT3390:
6059 case RT3572:
6060 case RT5390:
6061 case RT5392:
6062 case RT5592:
6063 break;
6064 default:
6065 ERROR(rt2x00dev,
6066 "Invalid RT chipset 0x%04x, rev %04x detected.\n",
6067 rt, rev);
6068 return -ENODEV;
6069 }
6070
6071 rt2x00_set_rt(rt2x00dev, rt, rev);
6072
6073 return 0;
6074}
6075
6070int rt2800_probe_hw(struct rt2x00_dev *rt2x00dev) 6076int rt2800_probe_hw(struct rt2x00_dev *rt2x00dev)
6071{ 6077{
6072 int retval; 6078 int retval;
6073 u32 reg; 6079 u32 reg;
6074 6080
6081 retval = rt2800_probe_rt(rt2x00dev);
6082 if (retval)
6083 return retval;
6084
6075 /* 6085 /*
6076 * Allocate eeprom data. 6086 * Allocate eeprom data.
6077 */ 6087 */