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path: root/drivers/net/wireless/rt2x00/rt2800.h
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800.h')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h49
1 files changed, 48 insertions, 1 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index 0b17934cf6a9..317b7807175e 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -63,7 +63,6 @@
63 */ 63 */
64#define REV_RT2860C 0x0100 64#define REV_RT2860C 0x0100
65#define REV_RT2860D 0x0101 65#define REV_RT2860D 0x0101
66#define REV_RT2870D 0x0101
67#define REV_RT2872E 0x0200 66#define REV_RT2872E 0x0200
68#define REV_RT3070E 0x0200 67#define REV_RT3070E 0x0200
69#define REV_RT3070F 0x0201 68#define REV_RT3070F 0x0201
@@ -99,6 +98,21 @@
99 */ 98 */
100 99
101/* 100/*
101 * E2PROM_CSR: PCI EEPROM control register.
102 * RELOAD: Write 1 to reload eeprom content.
103 * TYPE: 0: 93c46, 1:93c66.
104 * LOAD_STATUS: 1:loading, 0:done.
105 */
106#define E2PROM_CSR 0x0004
107#define E2PROM_CSR_DATA_CLOCK FIELD32(0x00000001)
108#define E2PROM_CSR_CHIP_SELECT FIELD32(0x00000002)
109#define E2PROM_CSR_DATA_IN FIELD32(0x00000004)
110#define E2PROM_CSR_DATA_OUT FIELD32(0x00000008)
111#define E2PROM_CSR_TYPE FIELD32(0x00000030)
112#define E2PROM_CSR_LOAD_STATUS FIELD32(0x00000040)
113#define E2PROM_CSR_RELOAD FIELD32(0x00000080)
114
115/*
102 * OPT_14: Unknown register used by rt3xxx devices. 116 * OPT_14: Unknown register used by rt3xxx devices.
103 */ 117 */
104#define OPT_14_CSR 0x0114 118#define OPT_14_CSR 0x0114
@@ -322,6 +336,39 @@
322#define RX_DRX_IDX 0x029c 336#define RX_DRX_IDX 0x029c
323 337
324/* 338/*
339 * USB_DMA_CFG
340 * RX_BULK_AGG_TIMEOUT: Rx Bulk Aggregation TimeOut in unit of 33ns.
341 * RX_BULK_AGG_LIMIT: Rx Bulk Aggregation Limit in unit of 256 bytes.
342 * PHY_CLEAR: phy watch dog enable.
343 * TX_CLEAR: Clear USB DMA TX path.
344 * TXOP_HALT: Halt TXOP count down when TX buffer is full.
345 * RX_BULK_AGG_EN: Enable Rx Bulk Aggregation.
346 * RX_BULK_EN: Enable USB DMA Rx.
347 * TX_BULK_EN: Enable USB DMA Tx.
348 * EP_OUT_VALID: OUT endpoint data valid.
349 * RX_BUSY: USB DMA RX FSM busy.
350 * TX_BUSY: USB DMA TX FSM busy.
351 */
352#define USB_DMA_CFG 0x02a0
353#define USB_DMA_CFG_RX_BULK_AGG_TIMEOUT FIELD32(0x000000ff)
354#define USB_DMA_CFG_RX_BULK_AGG_LIMIT FIELD32(0x0000ff00)
355#define USB_DMA_CFG_PHY_CLEAR FIELD32(0x00010000)
356#define USB_DMA_CFG_TX_CLEAR FIELD32(0x00080000)
357#define USB_DMA_CFG_TXOP_HALT FIELD32(0x00100000)
358#define USB_DMA_CFG_RX_BULK_AGG_EN FIELD32(0x00200000)
359#define USB_DMA_CFG_RX_BULK_EN FIELD32(0x00400000)
360#define USB_DMA_CFG_TX_BULK_EN FIELD32(0x00800000)
361#define USB_DMA_CFG_EP_OUT_VALID FIELD32(0x3f000000)
362#define USB_DMA_CFG_RX_BUSY FIELD32(0x40000000)
363#define USB_DMA_CFG_TX_BUSY FIELD32(0x80000000)
364
365/*
366 * US_CYC_CNT
367 */
368#define US_CYC_CNT 0x02a4
369#define US_CYC_CNT_CLOCK_CYCLE FIELD32(0x000000ff)
370
371/*
325 * PBF_SYS_CTRL 372 * PBF_SYS_CTRL
326 * HOST_RAM_WRITE: enable Host program ram write selection 373 * HOST_RAM_WRITE: enable Host program ram write selection
327 */ 374 */