diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2400pci.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2400pci.c | 125 |
1 files changed, 42 insertions, 83 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c index 78fca1bcc544..6a977679124d 100644 --- a/drivers/net/wireless/rt2x00/rt2400pci.c +++ b/drivers/net/wireless/rt2x00/rt2400pci.c | |||
@@ -49,20 +49,10 @@ | |||
49 | * the access attempt is considered to have failed, | 49 | * the access attempt is considered to have failed, |
50 | * and we will print an error. | 50 | * and we will print an error. |
51 | */ | 51 | */ |
52 | static u32 rt2400pci_bbp_check(struct rt2x00_dev *rt2x00dev) | 52 | #define WAIT_FOR_BBP(__dev, __reg) \ |
53 | { | 53 | rt2x00pci_regbusy_read((__dev), BBPCSR, BBPCSR_BUSY, (__reg)) |
54 | u32 reg; | 54 | #define WAIT_FOR_RF(__dev, __reg) \ |
55 | unsigned int i; | 55 | rt2x00pci_regbusy_read((__dev), RFCSR, RFCSR_BUSY, (__reg)) |
56 | |||
57 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | ||
58 | rt2x00pci_register_read(rt2x00dev, BBPCSR, ®); | ||
59 | if (!rt2x00_get_field32(reg, BBPCSR_BUSY)) | ||
60 | break; | ||
61 | udelay(REGISTER_BUSY_DELAY); | ||
62 | } | ||
63 | |||
64 | return reg; | ||
65 | } | ||
66 | 56 | ||
67 | static void rt2400pci_bbp_write(struct rt2x00_dev *rt2x00dev, | 57 | static void rt2400pci_bbp_write(struct rt2x00_dev *rt2x00dev, |
68 | const unsigned int word, const u8 value) | 58 | const unsigned int word, const u8 value) |
@@ -72,31 +62,20 @@ static void rt2400pci_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
72 | mutex_lock(&rt2x00dev->csr_mutex); | 62 | mutex_lock(&rt2x00dev->csr_mutex); |
73 | 63 | ||
74 | /* | 64 | /* |
75 | * Wait until the BBP becomes ready. | 65 | * Wait until the BBP becomes available, afterwards we |
66 | * can safely write the new data into the register. | ||
76 | */ | 67 | */ |
77 | reg = rt2400pci_bbp_check(rt2x00dev); | 68 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { |
78 | if (rt2x00_get_field32(reg, BBPCSR_BUSY)) | 69 | reg = 0; |
79 | goto exit_fail; | 70 | rt2x00_set_field32(®, BBPCSR_VALUE, value); |
80 | 71 | rt2x00_set_field32(®, BBPCSR_REGNUM, word); | |
81 | /* | 72 | rt2x00_set_field32(®, BBPCSR_BUSY, 1); |
82 | * Write the data into the BBP. | 73 | rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 1); |
83 | */ | 74 | |
84 | reg = 0; | 75 | rt2x00pci_register_write(rt2x00dev, BBPCSR, reg); |
85 | rt2x00_set_field32(®, BBPCSR_VALUE, value); | 76 | } |
86 | rt2x00_set_field32(®, BBPCSR_REGNUM, word); | ||
87 | rt2x00_set_field32(®, BBPCSR_BUSY, 1); | ||
88 | rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 1); | ||
89 | |||
90 | rt2x00pci_register_write(rt2x00dev, BBPCSR, reg); | ||
91 | |||
92 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
93 | |||
94 | return; | ||
95 | 77 | ||
96 | exit_fail: | ||
97 | mutex_unlock(&rt2x00dev->csr_mutex); | 78 | mutex_unlock(&rt2x00dev->csr_mutex); |
98 | |||
99 | ERROR(rt2x00dev, "BBPCSR register busy. Write failed.\n"); | ||
100 | } | 79 | } |
101 | 80 | ||
102 | static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev, | 81 | static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev, |
@@ -107,75 +86,55 @@ static void rt2400pci_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
107 | mutex_lock(&rt2x00dev->csr_mutex); | 86 | mutex_lock(&rt2x00dev->csr_mutex); |
108 | 87 | ||
109 | /* | 88 | /* |
110 | * Wait until the BBP becomes ready. | 89 | * Wait until the BBP becomes available, afterwards we |
90 | * can safely write the read request into the register. | ||
91 | * After the data has been written, we wait until hardware | ||
92 | * returns the correct value, if at any time the register | ||
93 | * doesn't become available in time, reg will be 0xffffffff | ||
94 | * which means we return 0xff to the caller. | ||
111 | */ | 95 | */ |
112 | reg = rt2400pci_bbp_check(rt2x00dev); | 96 | if (WAIT_FOR_BBP(rt2x00dev, ®)) { |
113 | if (rt2x00_get_field32(reg, BBPCSR_BUSY)) | 97 | reg = 0; |
114 | goto exit_fail; | 98 | rt2x00_set_field32(®, BBPCSR_REGNUM, word); |
99 | rt2x00_set_field32(®, BBPCSR_BUSY, 1); | ||
100 | rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 0); | ||
115 | 101 | ||
116 | /* | 102 | rt2x00pci_register_write(rt2x00dev, BBPCSR, reg); |
117 | * Write the request into the BBP. | ||
118 | */ | ||
119 | reg = 0; | ||
120 | rt2x00_set_field32(®, BBPCSR_REGNUM, word); | ||
121 | rt2x00_set_field32(®, BBPCSR_BUSY, 1); | ||
122 | rt2x00_set_field32(®, BBPCSR_WRITE_CONTROL, 0); | ||
123 | 103 | ||
124 | rt2x00pci_register_write(rt2x00dev, BBPCSR, reg); | 104 | WAIT_FOR_BBP(rt2x00dev, ®); |
125 | 105 | } | |
126 | /* | ||
127 | * Wait until the BBP becomes ready. | ||
128 | */ | ||
129 | reg = rt2400pci_bbp_check(rt2x00dev); | ||
130 | if (rt2x00_get_field32(reg, BBPCSR_BUSY)) | ||
131 | goto exit_fail; | ||
132 | 106 | ||
133 | *value = rt2x00_get_field32(reg, BBPCSR_VALUE); | 107 | *value = rt2x00_get_field32(reg, BBPCSR_VALUE); |
134 | 108 | ||
135 | mutex_unlock(&rt2x00dev->csr_mutex); | 109 | mutex_unlock(&rt2x00dev->csr_mutex); |
136 | |||
137 | return; | ||
138 | |||
139 | exit_fail: | ||
140 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
141 | |||
142 | ERROR(rt2x00dev, "BBPCSR register busy. Read failed.\n"); | ||
143 | *value = 0xff; | ||
144 | } | 110 | } |
145 | 111 | ||
146 | static void rt2400pci_rf_write(struct rt2x00_dev *rt2x00dev, | 112 | static void rt2400pci_rf_write(struct rt2x00_dev *rt2x00dev, |
147 | const unsigned int word, const u32 value) | 113 | const unsigned int word, const u32 value) |
148 | { | 114 | { |
149 | u32 reg; | 115 | u32 reg; |
150 | unsigned int i; | ||
151 | 116 | ||
152 | if (!word) | 117 | if (!word) |
153 | return; | 118 | return; |
154 | 119 | ||
155 | mutex_lock(&rt2x00dev->csr_mutex); | 120 | mutex_lock(&rt2x00dev->csr_mutex); |
156 | 121 | ||
157 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 122 | /* |
158 | rt2x00pci_register_read(rt2x00dev, RFCSR, ®); | 123 | * Wait until the RF becomes available, afterwards we |
159 | if (!rt2x00_get_field32(reg, RFCSR_BUSY)) | 124 | * can safely write the new data into the register. |
160 | goto rf_write; | 125 | */ |
161 | udelay(REGISTER_BUSY_DELAY); | 126 | if (WAIT_FOR_RF(rt2x00dev, ®)) { |
127 | reg = 0; | ||
128 | rt2x00_set_field32(®, RFCSR_VALUE, value); | ||
129 | rt2x00_set_field32(®, RFCSR_NUMBER_OF_BITS, 20); | ||
130 | rt2x00_set_field32(®, RFCSR_IF_SELECT, 0); | ||
131 | rt2x00_set_field32(®, RFCSR_BUSY, 1); | ||
132 | |||
133 | rt2x00pci_register_write(rt2x00dev, RFCSR, reg); | ||
134 | rt2x00_rf_write(rt2x00dev, word, value); | ||
162 | } | 135 | } |
163 | 136 | ||
164 | mutex_unlock(&rt2x00dev->csr_mutex); | 137 | mutex_unlock(&rt2x00dev->csr_mutex); |
165 | ERROR(rt2x00dev, "RFCSR register busy. Write failed.\n"); | ||
166 | return; | ||
167 | |||
168 | rf_write: | ||
169 | reg = 0; | ||
170 | rt2x00_set_field32(®, RFCSR_VALUE, value); | ||
171 | rt2x00_set_field32(®, RFCSR_NUMBER_OF_BITS, 20); | ||
172 | rt2x00_set_field32(®, RFCSR_IF_SELECT, 0); | ||
173 | rt2x00_set_field32(®, RFCSR_BUSY, 1); | ||
174 | |||
175 | rt2x00pci_register_write(rt2x00dev, RFCSR, reg); | ||
176 | rt2x00_rf_write(rt2x00dev, word, value); | ||
177 | |||
178 | mutex_unlock(&rt2x00dev->csr_mutex); | ||
179 | } | 138 | } |
180 | 139 | ||
181 | static void rt2400pci_eepromregister_read(struct eeprom_93cx6 *eeprom) | 140 | static void rt2400pci_eepromregister_read(struct eeprom_93cx6 *eeprom) |