1 files changed, 117 insertions, 48 deletions

diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 54ca49ad3472..2725f3c4442e 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -46,7 +46,7 @@
  * These indirect registers work with busy bits,
  * and we will try maximal REGISTER_BUSY_COUNT times to access
  * the register while taking a REGISTER_BUSY_DELAY us delay
- * between each attampt. When the busy bit is still set at that time,
+ * between each attempt. When the busy bit is still set at that time,
  * the access attempt is considered to have failed,
  * and we will print an error.
  */
@@ -305,9 +305,7 @@ static void rt2400pci_config_intf(struct rt2x00_dev *rt2x00dev,
                  * Enable synchronisation.
                  */
                 rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
-                rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
                 rt2x00_set_field32(&reg, CSR14_TSF_SYNC, conf->sync);
-                rt2x00_set_field32(&reg, CSR14_TBCN, 1);
                 rt2x00pci_register_write(rt2x00dev, CSR14, reg);
         }
 
@@ -647,6 +645,11 @@ static void rt2400pci_start_queue(struct data_queue *queue)
                 rt2x00pci_register_write(rt2x00dev, RXCSR0, reg);
                 break;
         case QID_BEACON:
+                /*
+                 * Allow the tbtt tasklet to be scheduled.
+                 */
+                tasklet_enable(&rt2x00dev->tbtt_tasklet);
+
                 rt2x00pci_register_read(rt2x00dev, CSR14, &reg);
                 rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
                 rt2x00_set_field32(&reg, CSR14_TBCN, 1);
@@ -708,6 +711,11 @@ static void rt2400pci_stop_queue(struct data_queue *queue)
                 rt2x00_set_field32(&reg, CSR14_TBCN, 0);
                 rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 0);
                 rt2x00pci_register_write(rt2x00dev, CSR14, reg);
+
+                /*
+                 * Wait for possibly running tbtt tasklets.
+                 */
+                tasklet_disable(&rt2x00dev->tbtt_tasklet);
                 break;
         default:
                 break;
@@ -963,9 +971,9 @@ static int rt2400pci_init_bbp(struct rt2x00_dev *rt2x00dev)
 static void rt2400pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
                                  enum dev_state state)
 {
-        int mask = (state == STATE_RADIO_IRQ_OFF) ||
-                   (state == STATE_RADIO_IRQ_OFF_ISR);
+        int mask = (state == STATE_RADIO_IRQ_OFF);
         u32 reg;
+        unsigned long flags;
 
         /*
          * When interrupts are being enabled, the interrupt registers
@@ -974,12 +982,20 @@ static void rt2400pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
         if (state == STATE_RADIO_IRQ_ON) {
                 rt2x00pci_register_read(rt2x00dev, CSR7, &reg);
                 rt2x00pci_register_write(rt2x00dev, CSR7, reg);
+
+                /*
+                 * Enable tasklets.
+                 */
+                tasklet_enable(&rt2x00dev->txstatus_tasklet);
+                tasklet_enable(&rt2x00dev->rxdone_tasklet);
         }
 
         /*
          * Only toggle the interrupts bits we are going to use.
          * Non-checked interrupt bits are disabled by default.
          */
+        spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
+
         rt2x00pci_register_read(rt2x00dev, CSR8, &reg);
         rt2x00_set_field32(&reg, CSR8_TBCN_EXPIRE, mask);
         rt2x00_set_field32(&reg, CSR8_TXDONE_TXRING, mask);
@@ -987,6 +1003,17 @@ static void rt2400pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
         rt2x00_set_field32(&reg, CSR8_TXDONE_PRIORING, mask);
         rt2x00_set_field32(&reg, CSR8_RXDONE, mask);
         rt2x00pci_register_write(rt2x00dev, CSR8, reg);
+
+        spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
+
+        if (state == STATE_RADIO_IRQ_OFF) {
+                /*
+                 * Ensure that all tasklets are finished before
+                 * disabling the interrupts.
+                 */
+                tasklet_disable(&rt2x00dev->txstatus_tasklet);
+                tasklet_disable(&rt2x00dev->rxdone_tasklet);
+        }
 }
 
 static int rt2400pci_enable_radio(struct rt2x00_dev *rt2x00dev)
@@ -1059,9 +1086,7 @@ static int rt2400pci_set_device_state(struct rt2x00_dev *rt2x00dev,
                 rt2400pci_disable_radio(rt2x00dev);
                 break;
         case STATE_RADIO_IRQ_ON:
-        case STATE_RADIO_IRQ_ON_ISR:
         case STATE_RADIO_IRQ_OFF:
-        case STATE_RADIO_IRQ_OFF_ISR:
                 rt2400pci_toggle_irq(rt2x00dev, state);
                 break;
         case STATE_DEEP_SLEEP:
@@ -1183,8 +1208,6 @@ static void rt2400pci_write_beacon(struct queue_entry *entry,
         /*
          * Enable beaconing again.
          */
-        rt2x00_set_field32(&reg, CSR14_TSF_COUNT, 1);
-        rt2x00_set_field32(&reg, CSR14_TBCN, 1);
         rt2x00_set_field32(&reg, CSR14_BEACON_GEN, 1);
         rt2x00pci_register_write(rt2x00dev, CSR14, reg);
 }
@@ -1289,57 +1312,71 @@ static void rt2400pci_txdone(struct rt2x00_dev *rt2x00dev,
         }
 }
 
-static irqreturn_t rt2400pci_interrupt_thread(int irq, void *dev_instance)
+static void rt2400pci_enable_interrupt(struct rt2x00_dev *rt2x00dev,
+                                       struct rt2x00_field32 irq_field)
 {
-        struct rt2x00_dev *rt2x00dev = dev_instance;
-        u32 reg = rt2x00dev->irqvalue[0];
+        unsigned long flags;
+        u32 reg;
 
         /*
-         * Handle interrupts, walk through all bits
-         * and run the tasks, the bits are checked in order of
-         * priority.
+         * Enable a single interrupt. The interrupt mask register
+         * access needs locking.
          */
+        spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
 
-        /*
-         * 1 - Beacon timer expired interrupt.
-         */
-        if (rt2x00_get_field32(reg, CSR7_TBCN_EXPIRE))
-                rt2x00lib_beacondone(rt2x00dev);
+        rt2x00pci_register_read(rt2x00dev, CSR8, &reg);
+        rt2x00_set_field32(&reg, irq_field, 0);
+        rt2x00pci_register_write(rt2x00dev, CSR8, reg);
 
-        /*
-         * 2 - Rx ring done interrupt.
-         */
-        if (rt2x00_get_field32(reg, CSR7_RXDONE))
-                rt2x00pci_rxdone(rt2x00dev);
+        spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
+}
 
-        /*
-         * 3 - Atim ring transmit done interrupt.
-         */
-        if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING))
-                rt2400pci_txdone(rt2x00dev, QID_ATIM);
+static void rt2400pci_txstatus_tasklet(unsigned long data)
+{
+        struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
+        u32 reg;
+        unsigned long flags;
 
         /*
-         * 4 - Priority ring transmit done interrupt.
+         * Handle all tx queues.
          */
-        if (rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING))
-                rt2400pci_txdone(rt2x00dev, QID_AC_VO);
+        rt2400pci_txdone(rt2x00dev, QID_ATIM);
+        rt2400pci_txdone(rt2x00dev, QID_AC_VO);
+        rt2400pci_txdone(rt2x00dev, QID_AC_VI);
 
         /*
-         * 5 - Tx ring transmit done interrupt.
+         * Enable all TXDONE interrupts again.
          */
-        if (rt2x00_get_field32(reg, CSR7_TXDONE_TXRING))
-                rt2400pci_txdone(rt2x00dev, QID_AC_VI);
+        spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
 
-        /* Enable interrupts again. */
-        rt2x00dev->ops->lib->set_device_state(rt2x00dev,
-                                              STATE_RADIO_IRQ_ON_ISR);
-        return IRQ_HANDLED;
+        rt2x00pci_register_read(rt2x00dev, CSR8, &reg);
+        rt2x00_set_field32(&reg, CSR8_TXDONE_TXRING, 0);
+        rt2x00_set_field32(&reg, CSR8_TXDONE_ATIMRING, 0);
+        rt2x00_set_field32(&reg, CSR8_TXDONE_PRIORING, 0);
+        rt2x00pci_register_write(rt2x00dev, CSR8, reg);
+
+        spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
+}
+
+static void rt2400pci_tbtt_tasklet(unsigned long data)
+{
+        struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
+        rt2x00lib_beacondone(rt2x00dev);
+        rt2400pci_enable_interrupt(rt2x00dev, CSR8_TBCN_EXPIRE);
+}
+
+static void rt2400pci_rxdone_tasklet(unsigned long data)
+{
+        struct rt2x00_dev *rt2x00dev = (struct rt2x00_dev *)data;
+        rt2x00pci_rxdone(rt2x00dev);
+        rt2400pci_enable_interrupt(rt2x00dev, CSR8_RXDONE);
 }
 
 static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
 {
         struct rt2x00_dev *rt2x00dev = dev_instance;
-        u32 reg;
+        u32 reg, mask;
+        unsigned long flags;
 
         /*
          * Get the interrupt sources & saved to local variable.
@@ -1354,14 +1391,44 @@ static irqreturn_t rt2400pci_interrupt(int irq, void *dev_instance)
         if (!test_bit(DEVICE_STATE_ENABLED_RADIO, &rt2x00dev->flags))
                 return IRQ_HANDLED;
 
-        /* Store irqvalues for use in the interrupt thread. */
-        rt2x00dev->irqvalue[0] = reg;
+        mask = reg;
 
-        /* Disable interrupts, will be enabled again in the interrupt thread. */
-        rt2x00dev->ops->lib->set_device_state(rt2x00dev,
-                                              STATE_RADIO_IRQ_OFF_ISR);
+        /*
+         * Schedule tasklets for interrupt handling.
+         */
+        if (rt2x00_get_field32(reg, CSR7_TBCN_EXPIRE))
+                tasklet_hi_schedule(&rt2x00dev->tbtt_tasklet);
 
-        return IRQ_WAKE_THREAD;
+        if (rt2x00_get_field32(reg, CSR7_RXDONE))
+                tasklet_schedule(&rt2x00dev->rxdone_tasklet);
+
+        if (rt2x00_get_field32(reg, CSR7_TXDONE_ATIMRING) ||
+            rt2x00_get_field32(reg, CSR7_TXDONE_PRIORING) ||
+            rt2x00_get_field32(reg, CSR7_TXDONE_TXRING)) {
+                tasklet_schedule(&rt2x00dev->txstatus_tasklet);
+                /*
+                 * Mask out all txdone interrupts.
+                 */
+                rt2x00_set_field32(&mask, CSR8_TXDONE_TXRING, 1);
+                rt2x00_set_field32(&mask, CSR8_TXDONE_ATIMRING, 1);
+                rt2x00_set_field32(&mask, CSR8_TXDONE_PRIORING, 1);
+        }
+
+        /*
+         * Disable all interrupts for which a tasklet was scheduled right now,
+         * the tasklet will reenable the appropriate interrupts.
+         */
+        spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags);
+
+        rt2x00pci_register_read(rt2x00dev, CSR8, &reg);
+        reg |= mask;
+        rt2x00pci_register_write(rt2x00dev, CSR8, reg);
+
+        spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags);
+
+
+
+        return IRQ_HANDLED;
 }
 
 /*
@@ -1655,7 +1722,9 @@ static const struct ieee80211_ops rt2400pci_mac80211_ops = {
 
 static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = {
         .irq_handler            = rt2400pci_interrupt,
-        .irq_handler_thread     = rt2400pci_interrupt_thread,
+        .txstatus_tasklet       = rt2400pci_txstatus_tasklet,
+        .tbtt_tasklet           = rt2400pci_tbtt_tasklet,
+        .rxdone_tasklet         = rt2400pci_rxdone_tasklet,
         .probe_hw               = rt2400pci_probe_hw,
         .initialize             = rt2x00pci_initialize,
         .uninitialize           = rt2x00pci_uninitialize,