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path: root/drivers/net/wireless/rt2x00/rt2400pci.c
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Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2400pci.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2400pci.c167
1 files changed, 80 insertions, 87 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2400pci.c b/drivers/net/wireless/rt2x00/rt2400pci.c
index 1adca7a1b9dc..e1891ebe5e5c 100644
--- a/drivers/net/wireless/rt2x00/rt2400pci.c
+++ b/drivers/net/wireless/rt2x00/rt2400pci.c
@@ -396,12 +396,74 @@ static void rt2400pci_config_erp(struct rt2x00_dev *rt2x00dev,
396 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84); 396 rt2x00_set_field32(&reg, ARCSR5_SERVICE, 0x84);
397 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110)); 397 rt2x00_set_field32(&reg, ARCSR2_LENGTH, get_duration(ACK_SIZE, 110));
398 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg); 398 rt2x00pci_register_write(rt2x00dev, ARCSR5, reg);
399
400 rt2x00pci_register_write(rt2x00dev, ARCSR1, erp->basic_rates);
401
402 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
403 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, erp->slot_time);
404 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
405
406 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
407 rt2x00_set_field32(&reg, CSR18_SIFS, erp->sifs);
408 rt2x00_set_field32(&reg, CSR18_PIFS, erp->pifs);
409 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
410
411 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
412 rt2x00_set_field32(&reg, CSR19_DIFS, erp->difs);
413 rt2x00_set_field32(&reg, CSR19_EIFS, erp->eifs);
414 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
399} 415}
400 416
401static void rt2400pci_config_phymode(struct rt2x00_dev *rt2x00dev, 417static void rt2400pci_config_ant(struct rt2x00_dev *rt2x00dev,
402 const int basic_rate_mask) 418 struct antenna_setup *ant)
403{ 419{
404 rt2x00pci_register_write(rt2x00dev, ARCSR1, basic_rate_mask); 420 u8 r1;
421 u8 r4;
422
423 /*
424 * We should never come here because rt2x00lib is supposed
425 * to catch this and send us the correct antenna explicitely.
426 */
427 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
428 ant->tx == ANTENNA_SW_DIVERSITY);
429
430 rt2400pci_bbp_read(rt2x00dev, 4, &r4);
431 rt2400pci_bbp_read(rt2x00dev, 1, &r1);
432
433 /*
434 * Configure the TX antenna.
435 */
436 switch (ant->tx) {
437 case ANTENNA_HW_DIVERSITY:
438 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);
439 break;
440 case ANTENNA_A:
441 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);
442 break;
443 case ANTENNA_B:
444 default:
445 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);
446 break;
447 }
448
449 /*
450 * Configure the RX antenna.
451 */
452 switch (ant->rx) {
453 case ANTENNA_HW_DIVERSITY:
454 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
455 break;
456 case ANTENNA_A:
457 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);
458 break;
459 case ANTENNA_B:
460 default:
461 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
462 break;
463 }
464
465 rt2400pci_bbp_write(rt2x00dev, 4, r4);
466 rt2400pci_bbp_write(rt2x00dev, 1, r1);
405} 467}
406 468
407static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev, 469static void rt2400pci_config_channel(struct rt2x00_dev *rt2x00dev,
@@ -460,56 +522,17 @@ static void rt2400pci_config_txpower(struct rt2x00_dev *rt2x00dev, int txpower)
460 rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower)); 522 rt2400pci_bbp_write(rt2x00dev, 3, TXPOWER_TO_DEV(txpower));
461} 523}
462 524
463static void rt2400pci_config_antenna(struct rt2x00_dev *rt2x00dev, 525static void rt2400pci_config_retry_limit(struct rt2x00_dev *rt2x00dev,
464 struct antenna_setup *ant) 526 struct rt2x00lib_conf *libconf)
465{ 527{
466 u8 r1; 528 u32 reg;
467 u8 r4;
468
469 /*
470 * We should never come here because rt2x00lib is supposed
471 * to catch this and send us the correct antenna explicitely.
472 */
473 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
474 ant->tx == ANTENNA_SW_DIVERSITY);
475
476 rt2400pci_bbp_read(rt2x00dev, 4, &r4);
477 rt2400pci_bbp_read(rt2x00dev, 1, &r1);
478
479 /*
480 * Configure the TX antenna.
481 */
482 switch (ant->tx) {
483 case ANTENNA_HW_DIVERSITY:
484 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 1);
485 break;
486 case ANTENNA_A:
487 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 0);
488 break;
489 case ANTENNA_B:
490 default:
491 rt2x00_set_field8(&r1, BBP_R1_TX_ANTENNA, 2);
492 break;
493 }
494
495 /*
496 * Configure the RX antenna.
497 */
498 switch (ant->rx) {
499 case ANTENNA_HW_DIVERSITY:
500 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
501 break;
502 case ANTENNA_A:
503 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 0);
504 break;
505 case ANTENNA_B:
506 default:
507 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
508 break;
509 }
510 529
511 rt2400pci_bbp_write(rt2x00dev, 4, r4); 530 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
512 rt2400pci_bbp_write(rt2x00dev, 1, r1); 531 rt2x00_set_field32(&reg, CSR11_LONG_RETRY,
532 libconf->conf->long_frame_max_tx_count);
533 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY,
534 libconf->conf->short_frame_max_tx_count);
535 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
513} 536}
514 537
515static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev, 538static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
@@ -517,20 +540,6 @@ static void rt2400pci_config_duration(struct rt2x00_dev *rt2x00dev,
517{ 540{
518 u32 reg; 541 u32 reg;
519 542
520 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
521 rt2x00_set_field32(&reg, CSR11_SLOT_TIME, libconf->slot_time);
522 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
523
524 rt2x00pci_register_read(rt2x00dev, CSR18, &reg);
525 rt2x00_set_field32(&reg, CSR18_SIFS, libconf->sifs);
526 rt2x00_set_field32(&reg, CSR18_PIFS, libconf->pifs);
527 rt2x00pci_register_write(rt2x00dev, CSR18, reg);
528
529 rt2x00pci_register_read(rt2x00dev, CSR19, &reg);
530 rt2x00_set_field32(&reg, CSR19_DIFS, libconf->difs);
531 rt2x00_set_field32(&reg, CSR19_EIFS, libconf->eifs);
532 rt2x00pci_register_write(rt2x00dev, CSR19, reg);
533
534 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg); 543 rt2x00pci_register_read(rt2x00dev, TXCSR1, &reg);
535 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER); 544 rt2x00_set_field32(&reg, TXCSR1_TSF_OFFSET, IEEE80211_HEADER);
536 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1); 545 rt2x00_set_field32(&reg, TXCSR1_AUTORESPONDER, 1);
@@ -548,16 +557,14 @@ static void rt2400pci_config(struct rt2x00_dev *rt2x00dev,
548 struct rt2x00lib_conf *libconf, 557 struct rt2x00lib_conf *libconf,
549 const unsigned int flags) 558 const unsigned int flags)
550{ 559{
551 if (flags & CONFIG_UPDATE_PHYMODE) 560 if (flags & IEEE80211_CONF_CHANGE_CHANNEL)
552 rt2400pci_config_phymode(rt2x00dev, libconf->basic_rates);
553 if (flags & CONFIG_UPDATE_CHANNEL)
554 rt2400pci_config_channel(rt2x00dev, &libconf->rf); 561 rt2400pci_config_channel(rt2x00dev, &libconf->rf);
555 if (flags & CONFIG_UPDATE_TXPOWER) 562 if (flags & IEEE80211_CONF_CHANGE_POWER)
556 rt2400pci_config_txpower(rt2x00dev, 563 rt2400pci_config_txpower(rt2x00dev,
557 libconf->conf->power_level); 564 libconf->conf->power_level);
558 if (flags & CONFIG_UPDATE_ANTENNA) 565 if (flags & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
559 rt2400pci_config_antenna(rt2x00dev, &libconf->ant); 566 rt2400pci_config_retry_limit(rt2x00dev, libconf);
560 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT)) 567 if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL)
561 rt2400pci_config_duration(rt2x00dev, libconf); 568 rt2400pci_config_duration(rt2x00dev, libconf);
562} 569}
563 570
@@ -1502,20 +1509,6 @@ static int rt2400pci_probe_hw(struct rt2x00_dev *rt2x00dev)
1502/* 1509/*
1503 * IEEE80211 stack callback functions. 1510 * IEEE80211 stack callback functions.
1504 */ 1511 */
1505static int rt2400pci_set_retry_limit(struct ieee80211_hw *hw,
1506 u32 short_retry, u32 long_retry)
1507{
1508 struct rt2x00_dev *rt2x00dev = hw->priv;
1509 u32 reg;
1510
1511 rt2x00pci_register_read(rt2x00dev, CSR11, &reg);
1512 rt2x00_set_field32(&reg, CSR11_LONG_RETRY, long_retry);
1513 rt2x00_set_field32(&reg, CSR11_SHORT_RETRY, short_retry);
1514 rt2x00pci_register_write(rt2x00dev, CSR11, reg);
1515
1516 return 0;
1517}
1518
1519static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue, 1512static int rt2400pci_conf_tx(struct ieee80211_hw *hw, u16 queue,
1520 const struct ieee80211_tx_queue_params *params) 1513 const struct ieee80211_tx_queue_params *params)
1521{ 1514{
@@ -1601,8 +1594,8 @@ static const struct rt2x00lib_ops rt2400pci_rt2x00_ops = {
1601 .config_filter = rt2400pci_config_filter, 1594 .config_filter = rt2400pci_config_filter,
1602 .config_intf = rt2400pci_config_intf, 1595 .config_intf = rt2400pci_config_intf,
1603 .config_erp = rt2400pci_config_erp, 1596 .config_erp = rt2400pci_config_erp,
1597 .config_ant = rt2400pci_config_ant,
1604 .config = rt2400pci_config, 1598 .config = rt2400pci_config,
1605 .set_retry_limit = rt2400pci_set_retry_limit,
1606}; 1599};
1607 1600
1608static const struct data_queue_desc rt2400pci_queue_rx = { 1601static const struct data_queue_desc rt2400pci_queue_rx = {
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-01 08:31:22 -0500