diff options
Diffstat (limited to 'drivers/net/wireless/p54/p54.h')
-rw-r--r-- | drivers/net/wireless/p54/p54.h | 148 |
1 files changed, 90 insertions, 58 deletions
diff --git a/drivers/net/wireless/p54/p54.h b/drivers/net/wireless/p54/p54.h index db3df947d8ed..19d085c73d7d 100644 --- a/drivers/net/wireless/p54/p54.h +++ b/drivers/net/wireless/p54/p54.h | |||
@@ -1,6 +1,3 @@ | |||
1 | #ifndef P54_H | ||
2 | #define P54_H | ||
3 | |||
4 | /* | 1 | /* |
5 | * Shared defines for all mac80211 Prism54 code | 2 | * Shared defines for all mac80211 Prism54 code |
6 | * | 3 | * |
@@ -14,39 +11,78 @@ | |||
14 | * published by the Free Software Foundation. | 11 | * published by the Free Software Foundation. |
15 | */ | 12 | */ |
16 | 13 | ||
14 | #ifndef P54_H | ||
15 | #define P54_H | ||
16 | |||
17 | #ifdef CONFIG_P54_LEDS | 17 | #ifdef CONFIG_P54_LEDS |
18 | #include <linux/leds.h> | 18 | #include <linux/leds.h> |
19 | #endif /* CONFIG_P54_LEDS */ | 19 | #endif /* CONFIG_P54_LEDS */ |
20 | 20 | ||
21 | enum p54_control_frame_types { | 21 | #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000 |
22 | P54_CONTROL_TYPE_SETUP = 0, | 22 | |
23 | P54_CONTROL_TYPE_SCAN, | 23 | #define BR_CODE_MIN 0x80000000 |
24 | P54_CONTROL_TYPE_TRAP, | 24 | #define BR_CODE_COMPONENT_ID 0x80000001 |
25 | P54_CONTROL_TYPE_DCFINIT, | 25 | #define BR_CODE_COMPONENT_VERSION 0x80000002 |
26 | P54_CONTROL_TYPE_RX_KEYCACHE, | 26 | #define BR_CODE_DEPENDENT_IF 0x80000003 |
27 | P54_CONTROL_TYPE_TIM, | 27 | #define BR_CODE_EXPOSED_IF 0x80000004 |
28 | P54_CONTROL_TYPE_PSM, | 28 | #define BR_CODE_DESCR 0x80000101 |
29 | P54_CONTROL_TYPE_TXCANCEL, | 29 | #define BR_CODE_MAX 0x8FFFFFFF |
30 | P54_CONTROL_TYPE_TXDONE, | 30 | #define BR_CODE_END_OF_BRA 0xFF0000FF |
31 | P54_CONTROL_TYPE_BURST, | 31 | #define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF |
32 | P54_CONTROL_TYPE_STAT_READBACK, | 32 | |
33 | P54_CONTROL_TYPE_BBP, | 33 | struct bootrec { |
34 | P54_CONTROL_TYPE_EEPROM_READBACK, | 34 | __le32 code; |
35 | P54_CONTROL_TYPE_LED, | 35 | __le32 len; |
36 | P54_CONTROL_TYPE_GPIO, | 36 | u32 data[10]; |
37 | P54_CONTROL_TYPE_TIMER, | 37 | } __packed; |
38 | P54_CONTROL_TYPE_MODULATION, | 38 | |
39 | P54_CONTROL_TYPE_SYNTH_CONFIG, | 39 | /* Interface role definitions */ |
40 | P54_CONTROL_TYPE_DETECTOR_VALUE, | 40 | #define BR_INTERFACE_ROLE_SERVER 0x0000 |
41 | P54_CONTROL_TYPE_XBOW_SYNTH_CFG, | 41 | #define BR_INTERFACE_ROLE_CLIENT 0x8000 |
42 | P54_CONTROL_TYPE_CCE_QUIET, | 42 | |
43 | P54_CONTROL_TYPE_PSM_STA_UNLOCK, | 43 | #define BR_DESC_PRIV_CAP_WEP BIT(0) |
44 | P54_CONTROL_TYPE_PCS, | 44 | #define BR_DESC_PRIV_CAP_TKIP BIT(1) |
45 | P54_CONTROL_TYPE_BT_BALANCER = 28, | 45 | #define BR_DESC_PRIV_CAP_MICHAEL BIT(2) |
46 | P54_CONTROL_TYPE_GROUP_ADDRESS_TABLE = 30, | 46 | #define BR_DESC_PRIV_CAP_CCX_CP BIT(3) |
47 | P54_CONTROL_TYPE_ARPTABLE = 31, | 47 | #define BR_DESC_PRIV_CAP_CCX_MIC BIT(4) |
48 | P54_CONTROL_TYPE_BT_OPTIONS = 35 | 48 | #define BR_DESC_PRIV_CAP_AESCCMP BIT(5) |
49 | }; | 49 | |
50 | struct bootrec_desc { | ||
51 | __le16 modes; | ||
52 | __le16 flags; | ||
53 | __le32 rx_start; | ||
54 | __le32 rx_end; | ||
55 | u8 headroom; | ||
56 | u8 tailroom; | ||
57 | u8 tx_queues; | ||
58 | u8 tx_depth; | ||
59 | u8 privacy_caps; | ||
60 | u8 rx_keycache_size; | ||
61 | u8 time_size; | ||
62 | u8 padding; | ||
63 | u8 rates[16]; | ||
64 | u8 padding2[4]; | ||
65 | __le16 rx_mtu; | ||
66 | } __packed; | ||
67 | |||
68 | #define FW_FMAC 0x464d4143 | ||
69 | #define FW_LM86 0x4c4d3836 | ||
70 | #define FW_LM87 0x4c4d3837 | ||
71 | #define FW_LM20 0x4c4d3230 | ||
72 | |||
73 | struct bootrec_comp_id { | ||
74 | __le32 fw_variant; | ||
75 | } __packed; | ||
76 | |||
77 | struct bootrec_comp_ver { | ||
78 | char fw_version[24]; | ||
79 | } __packed; | ||
80 | |||
81 | struct bootrec_end { | ||
82 | __le16 crc; | ||
83 | u8 padding[2]; | ||
84 | u8 md5[16]; | ||
85 | } __packed; | ||
50 | 86 | ||
51 | /* provide 16 bytes for the transport back-end */ | 87 | /* provide 16 bytes for the transport back-end */ |
52 | #define P54_TX_INFO_DATA_SIZE 16 | 88 | #define P54_TX_INFO_DATA_SIZE 16 |
@@ -55,34 +91,30 @@ enum p54_control_frame_types { | |||
55 | struct p54_tx_info { | 91 | struct p54_tx_info { |
56 | u32 start_addr; | 92 | u32 start_addr; |
57 | u32 end_addr; | 93 | u32 end_addr; |
58 | void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)]; | 94 | union { |
95 | void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)]; | ||
96 | struct { | ||
97 | u32 extra_len; | ||
98 | }; | ||
99 | }; | ||
59 | }; | 100 | }; |
60 | 101 | ||
61 | #define P54_MAX_CTRL_FRAME_LEN 0x1000 | 102 | #define P54_MAX_CTRL_FRAME_LEN 0x1000 |
62 | 103 | ||
63 | #define P54_HDR_FLAG_CONTROL BIT(15) | 104 | #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop) \ |
64 | #define P54_HDR_FLAG_CONTROL_OPSET (BIT(15) + BIT(0)) | 105 | do { \ |
65 | 106 | queue.aifs = cpu_to_le16(ai_fs); \ | |
66 | struct p54_hdr { | 107 | queue.cwmin = cpu_to_le16(cw_min); \ |
67 | __le16 flags; | 108 | queue.cwmax = cpu_to_le16(cw_max); \ |
68 | __le16 len; | 109 | queue.txop = cpu_to_le16(_txop); \ |
69 | __le32 req_id; | 110 | } while (0) |
70 | __le16 type; /* enum p54_control_frame_types */ | ||
71 | u8 rts_tries; | ||
72 | u8 tries; | ||
73 | u8 data[0]; | ||
74 | } __attribute__ ((packed)); | ||
75 | |||
76 | #define FREE_AFTER_TX(skb) \ | ||
77 | ((((struct p54_hdr *) ((struct sk_buff *) skb)->data)-> \ | ||
78 | flags) == cpu_to_le16(P54_HDR_FLAG_CONTROL_OPSET)) | ||
79 | 111 | ||
80 | struct p54_edcf_queue_param { | 112 | struct p54_edcf_queue_param { |
81 | __le16 aifs; | 113 | __le16 aifs; |
82 | __le16 cwmin; | 114 | __le16 cwmin; |
83 | __le16 cwmax; | 115 | __le16 cwmax; |
84 | __le16 txop; | 116 | __le16 txop; |
85 | } __attribute__ ((packed)); | 117 | } __packed; |
86 | 118 | ||
87 | struct p54_rssi_linear_approximation { | 119 | struct p54_rssi_linear_approximation { |
88 | s16 mul; | 120 | s16 mul; |
@@ -101,13 +133,6 @@ struct p54_cal_database { | |||
101 | 133 | ||
102 | #define EEPROM_READBACK_LEN 0x3fc | 134 | #define EEPROM_READBACK_LEN 0x3fc |
103 | 135 | ||
104 | #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000 | ||
105 | |||
106 | #define FW_FMAC 0x464d4143 | ||
107 | #define FW_LM86 0x4c4d3836 | ||
108 | #define FW_LM87 0x4c4d3837 | ||
109 | #define FW_LM20 0x4c4d3230 | ||
110 | |||
111 | enum fw_state { | 136 | enum fw_state { |
112 | FW_STATE_OFF, | 137 | FW_STATE_OFF, |
113 | FW_STATE_BOOTING, | 138 | FW_STATE_BOOTING, |
@@ -138,6 +163,7 @@ struct p54_common { | |||
138 | void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb); | 163 | void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb); |
139 | int (*open)(struct ieee80211_hw *dev); | 164 | int (*open)(struct ieee80211_hw *dev); |
140 | void (*stop)(struct ieee80211_hw *dev); | 165 | void (*stop)(struct ieee80211_hw *dev); |
166 | struct sk_buff_head tx_pending; | ||
141 | struct sk_buff_head tx_queue; | 167 | struct sk_buff_head tx_queue; |
142 | struct mutex conf_mutex; | 168 | struct mutex conf_mutex; |
143 | 169 | ||
@@ -156,6 +182,7 @@ struct p54_common { | |||
156 | 182 | ||
157 | /* (e)DCF / QOS state */ | 183 | /* (e)DCF / QOS state */ |
158 | bool use_short_slot; | 184 | bool use_short_slot; |
185 | spinlock_t tx_stats_lock; | ||
159 | struct ieee80211_tx_queue_stats tx_stats[8]; | 186 | struct ieee80211_tx_queue_stats tx_stats[8]; |
160 | struct p54_edcf_queue_param qos_params[8]; | 187 | struct p54_edcf_queue_param qos_params[8]; |
161 | 188 | ||
@@ -181,7 +208,7 @@ struct p54_common { | |||
181 | u32 tsf_low32, tsf_high32; | 208 | u32 tsf_low32, tsf_high32; |
182 | u32 basic_rate_mask; | 209 | u32 basic_rate_mask; |
183 | u16 aid; | 210 | u16 aid; |
184 | struct sk_buff *cached_beacon; | 211 | __le32 beacon_req_id; |
185 | 212 | ||
186 | /* cryptographic engine information */ | 213 | /* cryptographic engine information */ |
187 | u8 privacy_caps; | 214 | u8 privacy_caps; |
@@ -202,15 +229,20 @@ struct p54_common { | |||
202 | /* eeprom handling */ | 229 | /* eeprom handling */ |
203 | void *eeprom; | 230 | void *eeprom; |
204 | struct completion eeprom_comp; | 231 | struct completion eeprom_comp; |
232 | struct mutex eeprom_mutex; | ||
205 | }; | 233 | }; |
206 | 234 | ||
235 | /* interfaces for the drivers */ | ||
207 | int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb); | 236 | int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb); |
208 | void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb); | 237 | void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb); |
209 | int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw); | 238 | int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw); |
210 | int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len); | 239 | int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len); |
211 | int p54_read_eeprom(struct ieee80211_hw *dev); | 240 | int p54_read_eeprom(struct ieee80211_hw *dev); |
241 | |||
212 | struct ieee80211_hw *p54_init_common(size_t priv_data_len); | 242 | struct ieee80211_hw *p54_init_common(size_t priv_data_len); |
213 | int p54_register_common(struct ieee80211_hw *dev, struct device *pdev); | 243 | int p54_register_common(struct ieee80211_hw *dev, struct device *pdev); |
214 | void p54_free_common(struct ieee80211_hw *dev); | 244 | void p54_free_common(struct ieee80211_hw *dev); |
215 | 245 | ||
246 | void p54_unregister_common(struct ieee80211_hw *dev); | ||
247 | |||
216 | #endif /* P54_H */ | 248 | #endif /* P54_H */ |