diff options
Diffstat (limited to 'drivers/net/wireless/mwifiex/sta_cmdresp.c')
-rw-r--r-- | drivers/net/wireless/mwifiex/sta_cmdresp.c | 353 |
1 files changed, 160 insertions, 193 deletions
diff --git a/drivers/net/wireless/mwifiex/sta_cmdresp.c b/drivers/net/wireless/mwifiex/sta_cmdresp.c index 0d8618a8443f..4da19ed0f078 100644 --- a/drivers/net/wireless/mwifiex/sta_cmdresp.c +++ b/drivers/net/wireless/mwifiex/sta_cmdresp.c | |||
@@ -49,7 +49,7 @@ mwifiex_process_cmdresp_error(struct mwifiex_private *priv, | |||
49 | unsigned long flags; | 49 | unsigned long flags; |
50 | 50 | ||
51 | dev_err(adapter->dev, "CMD_RESP: cmd %#x error, result=%#x\n", | 51 | dev_err(adapter->dev, "CMD_RESP: cmd %#x error, result=%#x\n", |
52 | resp->command, resp->result); | 52 | resp->command, resp->result); |
53 | 53 | ||
54 | if (adapter->curr_cmd->wait_q_enabled) | 54 | if (adapter->curr_cmd->wait_q_enabled) |
55 | adapter->cmd_wait_q.status = -1; | 55 | adapter->cmd_wait_q.status = -1; |
@@ -57,13 +57,13 @@ mwifiex_process_cmdresp_error(struct mwifiex_private *priv, | |||
57 | switch (le16_to_cpu(resp->command)) { | 57 | switch (le16_to_cpu(resp->command)) { |
58 | case HostCmd_CMD_802_11_PS_MODE_ENH: | 58 | case HostCmd_CMD_802_11_PS_MODE_ENH: |
59 | pm = &resp->params.psmode_enh; | 59 | pm = &resp->params.psmode_enh; |
60 | dev_err(adapter->dev, "PS_MODE_ENH cmd failed: " | 60 | dev_err(adapter->dev, |
61 | "result=0x%x action=0x%X\n", | 61 | "PS_MODE_ENH cmd failed: result=0x%x action=0x%X\n", |
62 | resp->result, le16_to_cpu(pm->action)); | 62 | resp->result, le16_to_cpu(pm->action)); |
63 | /* We do not re-try enter-ps command in ad-hoc mode. */ | 63 | /* We do not re-try enter-ps command in ad-hoc mode. */ |
64 | if (le16_to_cpu(pm->action) == EN_AUTO_PS && | 64 | if (le16_to_cpu(pm->action) == EN_AUTO_PS && |
65 | (le16_to_cpu(pm->params.ps_bitmap) & BITMAP_STA_PS) && | 65 | (le16_to_cpu(pm->params.ps_bitmap) & BITMAP_STA_PS) && |
66 | priv->bss_mode == NL80211_IFTYPE_ADHOC) | 66 | priv->bss_mode == NL80211_IFTYPE_ADHOC) |
67 | adapter->ps_mode = MWIFIEX_802_11_POWER_MODE_CAM; | 67 | adapter->ps_mode = MWIFIEX_802_11_POWER_MODE_CAM; |
68 | 68 | ||
69 | break; | 69 | break; |
@@ -123,7 +123,7 @@ static int mwifiex_ret_802_11_rssi_info(struct mwifiex_private *priv, | |||
123 | struct mwifiex_ds_get_signal *signal) | 123 | struct mwifiex_ds_get_signal *signal) |
124 | { | 124 | { |
125 | struct host_cmd_ds_802_11_rssi_info_rsp *rssi_info_rsp = | 125 | struct host_cmd_ds_802_11_rssi_info_rsp *rssi_info_rsp = |
126 | &resp->params.rssi_info_rsp; | 126 | &resp->params.rssi_info_rsp; |
127 | 127 | ||
128 | priv->data_rssi_last = le16_to_cpu(rssi_info_rsp->data_rssi_last); | 128 | priv->data_rssi_last = le16_to_cpu(rssi_info_rsp->data_rssi_last); |
129 | priv->data_nf_last = le16_to_cpu(rssi_info_rsp->data_nf_last); | 129 | priv->data_nf_last = le16_to_cpu(rssi_info_rsp->data_nf_last); |
@@ -191,8 +191,8 @@ static int mwifiex_ret_802_11_snmp_mib(struct mwifiex_private *priv, | |||
191 | u32 ul_temp; | 191 | u32 ul_temp; |
192 | 192 | ||
193 | dev_dbg(priv->adapter->dev, "info: SNMP_RESP: oid value = %#x," | 193 | dev_dbg(priv->adapter->dev, "info: SNMP_RESP: oid value = %#x," |
194 | " query_type = %#x, buf size = %#x\n", | 194 | " query_type = %#x, buf size = %#x\n", |
195 | oid, query_type, le16_to_cpu(smib->buf_size)); | 195 | oid, query_type, le16_to_cpu(smib->buf_size)); |
196 | if (query_type == HostCmd_ACT_GEN_GET) { | 196 | if (query_type == HostCmd_ACT_GEN_GET) { |
197 | ul_temp = le16_to_cpu(*((__le16 *) (smib->value))); | 197 | ul_temp = le16_to_cpu(*((__le16 *) (smib->value))); |
198 | if (data_buf) | 198 | if (data_buf) |
@@ -327,31 +327,26 @@ static int mwifiex_ret_tx_rate_cfg(struct mwifiex_private *priv, | |||
327 | HostCmd_CMD_802_11_TX_RATE_QUERY, | 327 | HostCmd_CMD_802_11_TX_RATE_QUERY, |
328 | HostCmd_ACT_GEN_GET, 0, NULL); | 328 | HostCmd_ACT_GEN_GET, 0, NULL); |
329 | 329 | ||
330 | if (ds_rate) { | 330 | if (!ds_rate) |
331 | if (le16_to_cpu(rate_cfg->action) == HostCmd_ACT_GEN_GET) { | 331 | return ret; |
332 | if (priv->is_data_rate_auto) { | 332 | |
333 | ds_rate->is_rate_auto = 1; | 333 | if (le16_to_cpu(rate_cfg->action) == HostCmd_ACT_GEN_GET) { |
334 | } else { | 334 | if (priv->is_data_rate_auto) { |
335 | ds_rate->rate = mwifiex_get_rate_index(priv-> | 335 | ds_rate->is_rate_auto = 1; |
336 | bitmap_rates, | 336 | return ret; |
337 | sizeof(priv-> | 337 | } |
338 | bitmap_rates)); | 338 | ds_rate->rate = mwifiex_get_rate_index(priv->bitmap_rates, |
339 | if (ds_rate->rate >= | 339 | sizeof(priv->bitmap_rates)); |
340 | MWIFIEX_RATE_BITMAP_OFDM0 | 340 | |
341 | && ds_rate->rate <= | 341 | if (ds_rate->rate >= MWIFIEX_RATE_BITMAP_OFDM0 && |
342 | MWIFIEX_RATE_BITMAP_OFDM7) | 342 | ds_rate->rate <= MWIFIEX_RATE_BITMAP_OFDM7) |
343 | ds_rate->rate -= | 343 | ds_rate->rate -= (MWIFIEX_RATE_BITMAP_OFDM0 - |
344 | (MWIFIEX_RATE_BITMAP_OFDM0 - | 344 | MWIFIEX_RATE_INDEX_OFDM0); |
345 | MWIFIEX_RATE_INDEX_OFDM0); | 345 | |
346 | if (ds_rate->rate >= | 346 | if (ds_rate->rate >= MWIFIEX_RATE_BITMAP_MCS0 && |
347 | MWIFIEX_RATE_BITMAP_MCS0 | 347 | ds_rate->rate <= MWIFIEX_RATE_BITMAP_MCS127) |
348 | && ds_rate->rate <= | 348 | ds_rate->rate -= (MWIFIEX_RATE_BITMAP_MCS0 - |
349 | MWIFIEX_RATE_BITMAP_MCS127) | 349 | MWIFIEX_RATE_INDEX_MCS0); |
350 | ds_rate->rate -= | ||
351 | (MWIFIEX_RATE_BITMAP_MCS0 - | ||
352 | MWIFIEX_RATE_INDEX_MCS0); | ||
353 | } | ||
354 | } | ||
355 | } | 350 | } |
356 | 351 | ||
357 | return ret; | 352 | return ret; |
@@ -369,34 +364,32 @@ static int mwifiex_get_power_level(struct mwifiex_private *priv, void *data_buf) | |||
369 | struct mwifiex_types_power_group *pg_tlv_hdr; | 364 | struct mwifiex_types_power_group *pg_tlv_hdr; |
370 | struct mwifiex_power_group *pg; | 365 | struct mwifiex_power_group *pg; |
371 | 366 | ||
372 | if (data_buf) { | 367 | if (!data_buf) |
373 | pg_tlv_hdr = | 368 | return -1; |
374 | (struct mwifiex_types_power_group *) ((u8 *) data_buf | 369 | |
375 | + sizeof(struct host_cmd_ds_txpwr_cfg)); | 370 | pg_tlv_hdr = (struct mwifiex_types_power_group *) |
376 | pg = (struct mwifiex_power_group *) ((u8 *) pg_tlv_hdr + | 371 | ((u8 *) data_buf + sizeof(struct host_cmd_ds_txpwr_cfg)); |
377 | sizeof(struct mwifiex_types_power_group)); | 372 | pg = (struct mwifiex_power_group *) |
378 | length = pg_tlv_hdr->length; | 373 | ((u8 *) pg_tlv_hdr + sizeof(struct mwifiex_types_power_group)); |
379 | if (length > 0) { | 374 | length = pg_tlv_hdr->length; |
375 | if (length > 0) { | ||
376 | max_power = pg->power_max; | ||
377 | min_power = pg->power_min; | ||
378 | length -= sizeof(struct mwifiex_power_group); | ||
379 | } | ||
380 | while (length) { | ||
381 | pg++; | ||
382 | if (max_power < pg->power_max) | ||
380 | max_power = pg->power_max; | 383 | max_power = pg->power_max; |
381 | min_power = pg->power_min; | ||
382 | length -= sizeof(struct mwifiex_power_group); | ||
383 | } | ||
384 | while (length) { | ||
385 | pg++; | ||
386 | if (max_power < pg->power_max) | ||
387 | max_power = pg->power_max; | ||
388 | 384 | ||
389 | if (min_power > pg->power_min) | 385 | if (min_power > pg->power_min) |
390 | min_power = pg->power_min; | 386 | min_power = pg->power_min; |
391 | 387 | ||
392 | length -= sizeof(struct mwifiex_power_group); | 388 | length -= sizeof(struct mwifiex_power_group); |
393 | } | 389 | } |
394 | if (pg_tlv_hdr->length > 0) { | 390 | if (pg_tlv_hdr->length > 0) { |
395 | priv->min_tx_power_level = (u8) min_power; | 391 | priv->min_tx_power_level = (u8) min_power; |
396 | priv->max_tx_power_level = (u8) max_power; | 392 | priv->max_tx_power_level = (u8) max_power; |
397 | } | ||
398 | } else { | ||
399 | return -1; | ||
400 | } | 393 | } |
401 | 394 | ||
402 | return 0; | 395 | return 0; |
@@ -420,42 +413,38 @@ static int mwifiex_ret_tx_power_cfg(struct mwifiex_private *priv, | |||
420 | 413 | ||
421 | switch (action) { | 414 | switch (action) { |
422 | case HostCmd_ACT_GEN_GET: | 415 | case HostCmd_ACT_GEN_GET: |
423 | { | 416 | pg_tlv_hdr = (struct mwifiex_types_power_group *) |
424 | pg_tlv_hdr = | 417 | ((u8 *) txp_cfg + |
425 | (struct mwifiex_types_power_group *) ((u8 *) | 418 | sizeof(struct host_cmd_ds_txpwr_cfg)); |
426 | txp_cfg + | 419 | |
427 | sizeof | 420 | pg = (struct mwifiex_power_group *) |
428 | (struct | 421 | ((u8 *) pg_tlv_hdr + |
429 | host_cmd_ds_txpwr_cfg)); | 422 | sizeof(struct mwifiex_types_power_group)); |
430 | pg = (struct mwifiex_power_group *) ((u8 *) | 423 | |
431 | pg_tlv_hdr + | 424 | if (adapter->hw_status == MWIFIEX_HW_STATUS_INITIALIZING) |
432 | sizeof(struct | 425 | mwifiex_get_power_level(priv, txp_cfg); |
433 | mwifiex_types_power_group)); | 426 | |
434 | if (adapter->hw_status == | 427 | priv->tx_power_level = (u16) pg->power_min; |
435 | MWIFIEX_HW_STATUS_INITIALIZING) | 428 | break; |
436 | mwifiex_get_power_level(priv, txp_cfg); | 429 | |
437 | priv->tx_power_level = (u16) pg->power_min; | ||
438 | break; | ||
439 | } | ||
440 | case HostCmd_ACT_GEN_SET: | 430 | case HostCmd_ACT_GEN_SET: |
441 | if (le32_to_cpu(txp_cfg->mode)) { | 431 | if (!le32_to_cpu(txp_cfg->mode)) |
442 | pg_tlv_hdr = | 432 | break; |
443 | (struct mwifiex_types_power_group *) ((u8 *) | 433 | |
444 | txp_cfg + | 434 | pg_tlv_hdr = (struct mwifiex_types_power_group *) |
445 | sizeof | 435 | ((u8 *) txp_cfg + |
446 | (struct | 436 | sizeof(struct host_cmd_ds_txpwr_cfg)); |
447 | host_cmd_ds_txpwr_cfg)); | 437 | |
448 | pg = (struct mwifiex_power_group *) ((u8 *) pg_tlv_hdr | 438 | pg = (struct mwifiex_power_group *) |
449 | + | 439 | ((u8 *) pg_tlv_hdr + |
450 | sizeof(struct | 440 | sizeof(struct mwifiex_types_power_group)); |
451 | mwifiex_types_power_group)); | 441 | |
452 | if (pg->power_max == pg->power_min) | 442 | if (pg->power_max == pg->power_min) |
453 | priv->tx_power_level = (u16) pg->power_min; | 443 | priv->tx_power_level = (u16) pg->power_min; |
454 | } | ||
455 | break; | 444 | break; |
456 | default: | 445 | default: |
457 | dev_err(adapter->dev, "CMD_RESP: unknown cmd action %d\n", | 446 | dev_err(adapter->dev, "CMD_RESP: unknown cmd action %d\n", |
458 | action); | 447 | action); |
459 | return 0; | 448 | return 0; |
460 | } | 449 | } |
461 | dev_dbg(adapter->dev, | 450 | dev_dbg(adapter->dev, |
@@ -475,7 +464,7 @@ static int mwifiex_ret_802_11_mac_address(struct mwifiex_private *priv, | |||
475 | struct host_cmd_ds_command *resp) | 464 | struct host_cmd_ds_command *resp) |
476 | { | 465 | { |
477 | struct host_cmd_ds_802_11_mac_address *cmd_mac_addr = | 466 | struct host_cmd_ds_802_11_mac_address *cmd_mac_addr = |
478 | &resp->params.mac_addr; | 467 | &resp->params.mac_addr; |
479 | 468 | ||
480 | memcpy(priv->curr_addr, cmd_mac_addr->mac_addr, ETH_ALEN); | 469 | memcpy(priv->curr_addr, cmd_mac_addr->mac_addr, ETH_ALEN); |
481 | 470 | ||
@@ -560,7 +549,7 @@ static int mwifiex_ret_802_11_key_material(struct mwifiex_private *priv, | |||
560 | struct host_cmd_ds_command *resp) | 549 | struct host_cmd_ds_command *resp) |
561 | { | 550 | { |
562 | struct host_cmd_ds_802_11_key_material *key = | 551 | struct host_cmd_ds_802_11_key_material *key = |
563 | &resp->params.key_material; | 552 | &resp->params.key_material; |
564 | 553 | ||
565 | if (le16_to_cpu(key->action) == HostCmd_ACT_GEN_SET) { | 554 | if (le16_to_cpu(key->action) == HostCmd_ACT_GEN_SET) { |
566 | if ((le16_to_cpu(key->key_param_set.key_info) & KEY_MCAST)) { | 555 | if ((le16_to_cpu(key->key_param_set.key_info) & KEY_MCAST)) { |
@@ -591,17 +580,18 @@ static int mwifiex_ret_802_11d_domain_info(struct mwifiex_private *priv, | |||
591 | u16 action = le16_to_cpu(domain_info->action); | 580 | u16 action = le16_to_cpu(domain_info->action); |
592 | u8 no_of_triplet; | 581 | u8 no_of_triplet; |
593 | 582 | ||
594 | no_of_triplet = (u8) ((le16_to_cpu(domain->header.len) - | 583 | no_of_triplet = (u8) ((le16_to_cpu(domain->header.len) |
595 | IEEE80211_COUNTRY_STRING_LEN) / | 584 | - IEEE80211_COUNTRY_STRING_LEN) |
596 | sizeof(struct ieee80211_country_ie_triplet)); | 585 | / sizeof(struct ieee80211_country_ie_triplet)); |
597 | 586 | ||
598 | dev_dbg(priv->adapter->dev, "info: 11D Domain Info Resp:" | 587 | dev_dbg(priv->adapter->dev, |
599 | " no_of_triplet=%d\n", no_of_triplet); | 588 | "info: 11D Domain Info Resp: no_of_triplet=%d\n", |
589 | no_of_triplet); | ||
600 | 590 | ||
601 | if (no_of_triplet > MWIFIEX_MAX_TRIPLET_802_11D) { | 591 | if (no_of_triplet > MWIFIEX_MAX_TRIPLET_802_11D) { |
602 | dev_warn(priv->adapter->dev, | 592 | dev_warn(priv->adapter->dev, |
603 | "11D: invalid number of triplets %d " | 593 | "11D: invalid number of triplets %d returned\n", |
604 | "returned!!\n", no_of_triplet); | 594 | no_of_triplet); |
605 | return -1; | 595 | return -1; |
606 | } | 596 | } |
607 | 597 | ||
@@ -635,8 +625,8 @@ static int mwifiex_ret_802_11_rf_channel(struct mwifiex_private *priv, | |||
635 | 625 | ||
636 | if (priv->curr_bss_params.bss_descriptor.channel != new_channel) { | 626 | if (priv->curr_bss_params.bss_descriptor.channel != new_channel) { |
637 | dev_dbg(priv->adapter->dev, "cmd: Channel Switch: %d to %d\n", | 627 | dev_dbg(priv->adapter->dev, "cmd: Channel Switch: %d to %d\n", |
638 | priv->curr_bss_params.bss_descriptor.channel, | 628 | priv->curr_bss_params.bss_descriptor.channel, |
639 | new_channel); | 629 | new_channel); |
640 | /* Update the channel again */ | 630 | /* Update the channel again */ |
641 | priv->curr_bss_params.bss_descriptor.channel = new_channel; | 631 | priv->curr_bss_params.bss_descriptor.channel = new_channel; |
642 | } | 632 | } |
@@ -679,90 +669,70 @@ static int mwifiex_ret_reg_access(u16 type, struct host_cmd_ds_command *resp, | |||
679 | { | 669 | { |
680 | struct mwifiex_ds_reg_rw *reg_rw; | 670 | struct mwifiex_ds_reg_rw *reg_rw; |
681 | struct mwifiex_ds_read_eeprom *eeprom; | 671 | struct mwifiex_ds_read_eeprom *eeprom; |
672 | union reg { | ||
673 | struct host_cmd_ds_mac_reg_access *mac; | ||
674 | struct host_cmd_ds_bbp_reg_access *bbp; | ||
675 | struct host_cmd_ds_rf_reg_access *rf; | ||
676 | struct host_cmd_ds_pmic_reg_access *pmic; | ||
677 | struct host_cmd_ds_802_11_eeprom_access *eeprom; | ||
678 | } r; | ||
679 | |||
680 | if (!data_buf) | ||
681 | return 0; | ||
682 | 682 | ||
683 | if (data_buf) { | 683 | reg_rw = data_buf; |
684 | reg_rw = data_buf; | 684 | eeprom = data_buf; |
685 | eeprom = data_buf; | 685 | switch (type) { |
686 | switch (type) { | 686 | case HostCmd_CMD_MAC_REG_ACCESS: |
687 | case HostCmd_CMD_MAC_REG_ACCESS: | 687 | r.mac = (struct host_cmd_ds_mac_reg_access *) |
688 | { | 688 | &resp->params.mac_reg; |
689 | struct host_cmd_ds_mac_reg_access *reg; | 689 | reg_rw->offset = cpu_to_le32((u32) le16_to_cpu(r.mac->offset)); |
690 | reg = (struct host_cmd_ds_mac_reg_access *) | 690 | reg_rw->value = r.mac->value; |
691 | &resp->params.mac_reg; | 691 | break; |
692 | reg_rw->offset = cpu_to_le32( | 692 | case HostCmd_CMD_BBP_REG_ACCESS: |
693 | (u32) le16_to_cpu(reg->offset)); | 693 | r.bbp = (struct host_cmd_ds_bbp_reg_access *) |
694 | reg_rw->value = reg->value; | 694 | &resp->params.bbp_reg; |
695 | break; | 695 | reg_rw->offset = cpu_to_le32((u32) le16_to_cpu(r.bbp->offset)); |
696 | } | 696 | reg_rw->value = cpu_to_le32((u32) r.bbp->value); |
697 | case HostCmd_CMD_BBP_REG_ACCESS: | 697 | break; |
698 | { | 698 | |
699 | struct host_cmd_ds_bbp_reg_access *reg; | 699 | case HostCmd_CMD_RF_REG_ACCESS: |
700 | reg = (struct host_cmd_ds_bbp_reg_access *) | 700 | r.rf = (struct host_cmd_ds_rf_reg_access *) |
701 | &resp->params.bbp_reg; | 701 | &resp->params.rf_reg; |
702 | reg_rw->offset = cpu_to_le32( | 702 | reg_rw->offset = cpu_to_le32((u32) le16_to_cpu(r.rf->offset)); |
703 | (u32) le16_to_cpu(reg->offset)); | 703 | reg_rw->value = cpu_to_le32((u32) r.bbp->value); |
704 | reg_rw->value = cpu_to_le32((u32) reg->value); | 704 | break; |
705 | break; | 705 | case HostCmd_CMD_PMIC_REG_ACCESS: |
706 | } | 706 | r.pmic = (struct host_cmd_ds_pmic_reg_access *) |
707 | 707 | &resp->params.pmic_reg; | |
708 | case HostCmd_CMD_RF_REG_ACCESS: | 708 | reg_rw->offset = cpu_to_le32((u32) le16_to_cpu(r.pmic->offset)); |
709 | { | 709 | reg_rw->value = cpu_to_le32((u32) r.pmic->value); |
710 | struct host_cmd_ds_rf_reg_access *reg; | 710 | break; |
711 | reg = (struct host_cmd_ds_rf_reg_access *) | 711 | case HostCmd_CMD_CAU_REG_ACCESS: |
712 | &resp->params.rf_reg; | 712 | r.rf = (struct host_cmd_ds_rf_reg_access *) |
713 | reg_rw->offset = cpu_to_le32( | 713 | &resp->params.rf_reg; |
714 | (u32) le16_to_cpu(reg->offset)); | 714 | reg_rw->offset = cpu_to_le32((u32) le16_to_cpu(r.rf->offset)); |
715 | reg_rw->value = cpu_to_le32((u32) reg->value); | 715 | reg_rw->value = cpu_to_le32((u32) r.rf->value); |
716 | break; | 716 | break; |
717 | } | 717 | case HostCmd_CMD_802_11_EEPROM_ACCESS: |
718 | case HostCmd_CMD_PMIC_REG_ACCESS: | 718 | r.eeprom = (struct host_cmd_ds_802_11_eeprom_access *) |
719 | { | 719 | &resp->params.eeprom; |
720 | struct host_cmd_ds_pmic_reg_access *reg; | 720 | pr_debug("info: EEPROM read len=%x\n", r.eeprom->byte_count); |
721 | reg = (struct host_cmd_ds_pmic_reg_access *) | 721 | if (le16_to_cpu(eeprom->byte_count) < |
722 | &resp->params.pmic_reg; | 722 | le16_to_cpu(r.eeprom->byte_count)) { |
723 | reg_rw->offset = cpu_to_le32( | 723 | eeprom->byte_count = cpu_to_le16(0); |
724 | (u32) le16_to_cpu(reg->offset)); | 724 | pr_debug("info: EEPROM read length is too big\n"); |
725 | reg_rw->value = cpu_to_le32((u32) reg->value); | ||
726 | break; | ||
727 | } | ||
728 | case HostCmd_CMD_CAU_REG_ACCESS: | ||
729 | { | ||
730 | struct host_cmd_ds_rf_reg_access *reg; | ||
731 | reg = (struct host_cmd_ds_rf_reg_access *) | ||
732 | &resp->params.rf_reg; | ||
733 | reg_rw->offset = cpu_to_le32( | ||
734 | (u32) le16_to_cpu(reg->offset)); | ||
735 | reg_rw->value = cpu_to_le32((u32) reg->value); | ||
736 | break; | ||
737 | } | ||
738 | case HostCmd_CMD_802_11_EEPROM_ACCESS: | ||
739 | { | ||
740 | struct host_cmd_ds_802_11_eeprom_access | ||
741 | *cmd_eeprom = | ||
742 | (struct host_cmd_ds_802_11_eeprom_access | ||
743 | *) &resp->params.eeprom; | ||
744 | pr_debug("info: EEPROM read len=%x\n", | ||
745 | cmd_eeprom->byte_count); | ||
746 | if (le16_to_cpu(eeprom->byte_count) < | ||
747 | le16_to_cpu( | ||
748 | cmd_eeprom->byte_count)) { | ||
749 | eeprom->byte_count = cpu_to_le16(0); | ||
750 | pr_debug("info: EEPROM read " | ||
751 | "length is too big\n"); | ||
752 | return -1; | ||
753 | } | ||
754 | eeprom->offset = cmd_eeprom->offset; | ||
755 | eeprom->byte_count = cmd_eeprom->byte_count; | ||
756 | if (le16_to_cpu(eeprom->byte_count) > 0) | ||
757 | memcpy(&eeprom->value, | ||
758 | &cmd_eeprom->value, | ||
759 | le16_to_cpu(eeprom->byte_count)); | ||
760 | |||
761 | break; | ||
762 | } | ||
763 | default: | ||
764 | return -1; | 725 | return -1; |
765 | } | 726 | } |
727 | eeprom->offset = r.eeprom->offset; | ||
728 | eeprom->byte_count = r.eeprom->byte_count; | ||
729 | if (le16_to_cpu(eeprom->byte_count) > 0) | ||
730 | memcpy(&eeprom->value, &r.eeprom->value, | ||
731 | le16_to_cpu(r.eeprom->byte_count)); | ||
732 | |||
733 | break; | ||
734 | default: | ||
735 | return -1; | ||
766 | } | 736 | } |
767 | return 0; | 737 | return 0; |
768 | } | 738 | } |
@@ -778,7 +748,7 @@ static int mwifiex_ret_ibss_coalescing_status(struct mwifiex_private *priv, | |||
778 | struct host_cmd_ds_command *resp) | 748 | struct host_cmd_ds_command *resp) |
779 | { | 749 | { |
780 | struct host_cmd_ds_802_11_ibss_status *ibss_coal_resp = | 750 | struct host_cmd_ds_802_11_ibss_status *ibss_coal_resp = |
781 | &(resp->params.ibss_coalescing); | 751 | &(resp->params.ibss_coalescing); |
782 | u8 zero_mac[ETH_ALEN] = { 0, 0, 0, 0, 0, 0 }; | 752 | u8 zero_mac[ETH_ALEN] = { 0, 0, 0, 0, 0, 0 }; |
783 | 753 | ||
784 | if (le16_to_cpu(ibss_coal_resp->action) == HostCmd_ACT_GEN_SET) | 754 | if (le16_to_cpu(ibss_coal_resp->action) == HostCmd_ACT_GEN_SET) |
@@ -918,20 +888,17 @@ int mwifiex_process_sta_cmdresp(struct mwifiex_private *priv, u16 cmdresp_no, | |||
918 | case HostCmd_CMD_RECONFIGURE_TX_BUFF: | 888 | case HostCmd_CMD_RECONFIGURE_TX_BUFF: |
919 | adapter->tx_buf_size = (u16) le16_to_cpu(resp->params. | 889 | adapter->tx_buf_size = (u16) le16_to_cpu(resp->params. |
920 | tx_buf.buff_size); | 890 | tx_buf.buff_size); |
921 | adapter->tx_buf_size = (adapter->tx_buf_size / | 891 | adapter->tx_buf_size = (adapter->tx_buf_size |
922 | MWIFIEX_SDIO_BLOCK_SIZE) * | 892 | / MWIFIEX_SDIO_BLOCK_SIZE) |
923 | MWIFIEX_SDIO_BLOCK_SIZE; | 893 | * MWIFIEX_SDIO_BLOCK_SIZE; |
924 | adapter->curr_tx_buf_size = adapter->tx_buf_size; | 894 | adapter->curr_tx_buf_size = adapter->tx_buf_size; |
925 | dev_dbg(adapter->dev, | 895 | dev_dbg(adapter->dev, |
926 | "cmd: max_tx_buf_size=%d, tx_buf_size=%d\n", | 896 | "cmd: max_tx_buf_size=%d, tx_buf_size=%d\n", |
927 | adapter->max_tx_buf_size, adapter->tx_buf_size); | 897 | adapter->max_tx_buf_size, adapter->tx_buf_size); |
928 | 898 | ||
929 | if (adapter->if_ops.update_mp_end_port) | 899 | if (adapter->if_ops.update_mp_end_port) |
930 | adapter->if_ops.update_mp_end_port(adapter, | 900 | adapter->if_ops.update_mp_end_port(adapter, |
931 | le16_to_cpu(resp-> | 901 | le16_to_cpu(resp->params.tx_buf.mp_end_port)); |
932 | params. | ||
933 | tx_buf. | ||
934 | mp_end_port)); | ||
935 | break; | 902 | break; |
936 | case HostCmd_CMD_AMSDU_AGGR_CTRL: | 903 | case HostCmd_CMD_AMSDU_AGGR_CTRL: |
937 | ret = mwifiex_ret_amsdu_aggr_ctrl(resp, data_buf); | 904 | ret = mwifiex_ret_amsdu_aggr_ctrl(resp, data_buf); |
@@ -959,7 +926,7 @@ int mwifiex_process_sta_cmdresp(struct mwifiex_private *priv, u16 cmdresp_no, | |||
959 | break; | 926 | break; |
960 | default: | 927 | default: |
961 | dev_err(adapter->dev, "CMD_RESP: unknown cmd response %#x\n", | 928 | dev_err(adapter->dev, "CMD_RESP: unknown cmd response %#x\n", |
962 | resp->command); | 929 | resp->command); |
963 | break; | 930 | break; |
964 | } | 931 | } |
965 | 932 | ||