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-rw-r--r--drivers/net/wireless/iwlwifi/Kconfig20
-rw-r--r--drivers/net/wireless/iwlwifi/Makefile10
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-led.c433
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-led.h73
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.h17
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965-io.h426
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965-rs.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.c221
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-4965.h17
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-csr.h6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c8
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c26
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-hcmd.c30
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-io.h429
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-led.c447
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-led.h82
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c22
-rw-r--r--drivers/net/wireless/iwlwifi/iwl4965-base.c253
19 files changed, 1832 insertions, 696 deletions
diff --git a/drivers/net/wireless/iwlwifi/Kconfig b/drivers/net/wireless/iwlwifi/Kconfig
index 1ab14ed33f58..4bdb75ecb170 100644
--- a/drivers/net/wireless/iwlwifi/Kconfig
+++ b/drivers/net/wireless/iwlwifi/Kconfig
@@ -2,6 +2,13 @@ config IWLCORE
2 tristate "Intel Wireless Wifi Core" 2 tristate "Intel Wireless Wifi Core"
3 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL 3 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
4 4
5config IWLWIFI_LEDS
6 bool "Enable LEDS features in iwlwifi driver"
7 depends on IWLCORE && MAC80211_LEDS && LEDS_CLASS
8 ---help---
9 This option enables LEDS for the iwlwifi drivers
10
11
5config IWL4965 12config IWL4965
6 tristate "Intel Wireless WiFi 4965AGN" 13 tristate "Intel Wireless WiFi 4965AGN"
7 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL 14 depends on PCI && MAC80211 && WLAN_80211 && EXPERIMENTAL
@@ -37,6 +44,13 @@ config IWL4965_HT
37 This option enables IEEE 802.11n High Throughput features 44 This option enables IEEE 802.11n High Throughput features
38 for the iwl4965 driver. 45 for the iwl4965 driver.
39 46
47config IWL4965_LEDS
48 bool "Enable LEDS features in iwl4965 driver"
49 depends on IWL4965 && IWLWIFI_LEDS
50 ---help---
51 This option enables LEDS for the iwlwifi drivers
52
53
40config IWL4965_SPECTRUM_MEASUREMENT 54config IWL4965_SPECTRUM_MEASUREMENT
41 bool "Enable Spectrum Measurement in iwl4965 driver" 55 bool "Enable Spectrum Measurement in iwl4965 driver"
42 depends on IWL4965 56 depends on IWL4965
@@ -114,6 +128,12 @@ config IWL3945_SPECTRUM_MEASUREMENT
114 ---help--- 128 ---help---
115 This option will enable spectrum measurement for the iwl3945 driver. 129 This option will enable spectrum measurement for the iwl3945 driver.
116 130
131config IWL3945_LEDS
132 bool "Enable LEDS features in iwl3945 driver"
133 depends on IWL3945 && MAC80211_LEDS && LEDS_CLASS
134 ---help---
135 This option enables LEDS for the iwl3945 driver.
136
117config IWL3945_DEBUG 137config IWL3945_DEBUG
118 bool "Enable full debugging output in iwl3945 driver" 138 bool "Enable full debugging output in iwl3945 driver"
119 depends on IWL3945 139 depends on IWL3945
diff --git a/drivers/net/wireless/iwlwifi/Makefile b/drivers/net/wireless/iwlwifi/Makefile
index 6be8012a1743..64fca4d9ac76 100644
--- a/drivers/net/wireless/iwlwifi/Makefile
+++ b/drivers/net/wireless/iwlwifi/Makefile
@@ -5,8 +5,18 @@ ifeq ($(CONFIG_IWLWIFI_DEBUGFS),y)
5 iwlcore-objs += iwl-debugfs.o 5 iwlcore-objs += iwl-debugfs.o
6endif 6endif
7 7
8ifeq ($(CONFIG_IWLWIFI_LEDS),y)
9 iwlcore-objs += iwl-led.o
10endif
11
8obj-$(CONFIG_IWL3945) += iwl3945.o 12obj-$(CONFIG_IWL3945) += iwl3945.o
9iwl3945-objs = iwl3945-base.o iwl-3945.o iwl-3945-rs.o 13iwl3945-objs = iwl3945-base.o iwl-3945.o iwl-3945-rs.o
10 14
15ifeq ($(CONFIG_IWL3945_LEDS),y)
16 iwl3945-objs += iwl-3945-led.o
17endif
18
19
11obj-$(CONFIG_IWL4965) += iwl4965.o 20obj-$(CONFIG_IWL4965) += iwl4965.o
12iwl4965-objs = iwl4965-base.o iwl-4965.o iwl-4965-rs.o 21iwl4965-objs = iwl4965-base.o iwl-4965.o iwl-4965-rs.o
22
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.c b/drivers/net/wireless/iwlwifi/iwl-3945-led.c
new file mode 100644
index 000000000000..d200d08fb086
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.c
@@ -0,0 +1,433 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/version.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/dma-mapping.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <linux/netdevice.h>
37#include <linux/wireless.h>
38#include <net/mac80211.h>
39#include <linux/etherdevice.h>
40#include <asm/unaligned.h>
41
42#include "iwl-3945.h"
43#include "iwl-helpers.h"
44
45#define IWL_1MB_RATE (128 * 1024)
46#define IWL_LED_THRESHOLD (16)
47#define IWL_MAX_BLINK_TBL (10)
48
49static const struct {
50 u16 brightness;
51 u8 on_time;
52 u8 of_time;
53} blink_tbl[] =
54{
55 {300, 25, 25},
56 {200, 40, 40},
57 {100, 55, 55},
58 {70, 65, 65},
59 {50, 75, 75},
60 {20, 85, 85},
61 {15, 95, 95 },
62 {10, 110, 110},
63 {5, 130, 130},
64 {0, 167, 167}
65};
66
67static int iwl3945_led_cmd_callback(struct iwl3945_priv *priv,
68 struct iwl3945_cmd *cmd,
69 struct sk_buff *skb)
70{
71 return 1;
72}
73
74
75/* Send led command */
76static int iwl_send_led_cmd(struct iwl3945_priv *priv,
77 struct iwl3945_led_cmd *led_cmd)
78{
79 struct iwl3945_host_cmd cmd = {
80 .id = REPLY_LEDS_CMD,
81 .len = sizeof(struct iwl3945_led_cmd),
82 .data = led_cmd,
83 .meta.flags = CMD_ASYNC,
84 .meta.u.callback = iwl3945_led_cmd_callback
85 };
86
87 return iwl3945_send_cmd(priv, &cmd);
88}
89
90
91/* Set led on command */
92static int iwl3945_led_on(struct iwl3945_priv *priv, int led_id)
93{
94 struct iwl3945_led_cmd led_cmd = {
95 .id = led_id,
96 .on = IWL_LED_SOLID,
97 .off = 0,
98 .interval = IWL_DEF_LED_INTRVL
99 };
100 return iwl_send_led_cmd(priv, &led_cmd);
101}
102
103/* Set led on command */
104static int iwl3945_led_pattern(struct iwl3945_priv *priv, int led_id,
105 enum led_brightness brightness)
106{
107 struct iwl3945_led_cmd led_cmd = {
108 .id = led_id,
109 .on = brightness,
110 .off = brightness,
111 .interval = IWL_DEF_LED_INTRVL
112 };
113 if (brightness == LED_FULL) {
114 led_cmd.on = IWL_LED_SOLID;
115 led_cmd.off = 0;
116 }
117 return iwl_send_led_cmd(priv, &led_cmd);
118}
119
120/* Set led register off */
121static int iwl3945_led_on_reg(struct iwl3945_priv *priv, int led_id)
122{
123 IWL_DEBUG_LED("led on %d\n", led_id);
124 return iwl3945_led_on(priv, led_id);
125}
126
127/* Set led off command */
128static int iwl3945_led_off(struct iwl3945_priv *priv, int led_id)
129{
130 struct iwl3945_led_cmd led_cmd = {
131 .id = led_id,
132 .on = 0,
133 .off = 0,
134 .interval = IWL_DEF_LED_INTRVL
135 };
136 IWL_DEBUG_LED("led off %d\n", led_id);
137 return iwl_send_led_cmd(priv, &led_cmd);
138}
139
140/* Set led register off */
141static int iwl3945_led_off_reg(struct iwl3945_priv *priv, int led_id)
142{
143 iwl3945_led_off(priv, led_id);
144 return 0;
145}
146
147/* Set led blink command */
148static int iwl3945_led_not_solid(struct iwl3945_priv *priv, int led_id,
149 u8 brightness)
150{
151 struct iwl3945_led_cmd led_cmd = {
152 .id = led_id,
153 .on = brightness,
154 .off = brightness,
155 .interval = IWL_DEF_LED_INTRVL
156 };
157
158 return iwl_send_led_cmd(priv, &led_cmd);
159}
160
161
162/*
163 * brightness call back function for Tx/Rx LED
164 */
165static int iwl3945_led_associated(struct iwl3945_priv *priv, int led_id)
166{
167 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
168 !test_bit(STATUS_READY, &priv->status))
169 return 0;
170
171
172 /* start counting Tx/Rx bytes */
173 if (!priv->last_blink_time && priv->allow_blinking)
174 priv->last_blink_time = jiffies;
175 return 0;
176}
177
178/*
179 * brightness call back for association and radio
180 */
181static void iwl3945_led_brightness_set(struct led_classdev *led_cdev,
182 enum led_brightness brightness)
183{
184 struct iwl3945_led *led = container_of(led_cdev,
185 struct iwl3945_led, led_dev);
186 struct iwl3945_priv *priv = led->priv;
187
188 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
189 return;
190
191 switch (brightness) {
192 case LED_FULL:
193 if (led->type == IWL_LED_TRG_ASSOC) {
194 priv->allow_blinking = 1;
195 IWL_DEBUG_LED("MAC is associated\n");
196 }
197 if (led->led_on)
198 led->led_on(priv, IWL_LED_LINK);
199 break;
200 case LED_OFF:
201 if (led->type == IWL_LED_TRG_ASSOC) {
202 priv->allow_blinking = 0;
203 IWL_DEBUG_LED("MAC is disassociated\n");
204 }
205 if (led->led_off)
206 led->led_off(priv, IWL_LED_LINK);
207 break;
208 default:
209 if (led->led_pattern)
210 led->led_pattern(priv, IWL_LED_LINK, brightness);
211 break;
212 }
213}
214
215
216
217/*
218 * Register led class with the system
219 */
220static int iwl3945_led_register_led(struct iwl3945_priv *priv,
221 struct iwl3945_led *led,
222 enum led_type type, u8 set_led,
223 const char *name, char *trigger)
224{
225 struct device *device = wiphy_dev(priv->hw->wiphy);
226 int ret;
227
228 led->led_dev.name = name;
229 led->led_dev.brightness_set = iwl3945_led_brightness_set;
230 led->led_dev.default_trigger = trigger;
231
232 ret = led_classdev_register(device, &led->led_dev);
233 if (ret) {
234 IWL_ERROR("Error: failed to register led handler.\n");
235 return ret;
236 }
237
238 led->priv = priv;
239 led->type = type;
240 led->registered = 1;
241
242 if (set_led && led->led_on)
243 led->led_on(priv, IWL_LED_LINK);
244 return 0;
245}
246
247
248/*
249 * calculate blink rate according to last 2 sec Tx/Rx activities
250 */
251static inline u8 get_blink_rate(struct iwl3945_priv *priv)
252{
253 int index;
254 u8 blink_rate;
255
256 if (priv->rxtxpackets < IWL_LED_THRESHOLD)
257 index = 10;
258 else {
259 for (index = 0; index < IWL_MAX_BLINK_TBL; index++) {
260 if (priv->rxtxpackets > (blink_tbl[index].brightness *
261 IWL_1MB_RATE))
262 break;
263 }
264 }
265 /* if 0 frame is transfered */
266 if ((index == IWL_MAX_BLINK_TBL) || !priv->allow_blinking)
267 blink_rate = IWL_LED_SOLID;
268 else
269 blink_rate = blink_tbl[index].on_time;
270
271 return blink_rate;
272}
273
274static inline int is_rf_kill(struct iwl3945_priv *priv)
275{
276 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
277 test_bit(STATUS_RF_KILL_SW, &priv->status);
278}
279
280/*
281 * this function called from handler. Since setting Led command can
282 * happen very frequent we postpone led command to be called from
283 * REPLY handler so we know ucode is up
284 */
285void iwl3945_led_background(struct iwl3945_priv *priv)
286{
287 u8 blink_rate;
288
289 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
290 priv->last_blink_time = 0;
291 return;
292 }
293 if (is_rf_kill(priv)) {
294 priv->last_blink_time = 0;
295 return;
296 }
297
298 if (!priv->allow_blinking) {
299 priv->last_blink_time = 0;
300 if (priv->last_blink_rate != IWL_LED_SOLID) {
301 priv->last_blink_rate = IWL_LED_SOLID;
302 iwl3945_led_on(priv, IWL_LED_LINK);
303 }
304 return;
305 }
306 if (!priv->last_blink_time ||
307 !time_after(jiffies, priv->last_blink_time +
308 msecs_to_jiffies(1000)))
309 return;
310
311 blink_rate = get_blink_rate(priv);
312
313 /* call only if blink rate change */
314 if (blink_rate != priv->last_blink_rate) {
315 if (blink_rate != IWL_LED_SOLID) {
316 priv->last_blink_time = jiffies +
317 msecs_to_jiffies(1000);
318 iwl3945_led_not_solid(priv, IWL_LED_LINK, blink_rate);
319 } else {
320 priv->last_blink_time = 0;
321 iwl3945_led_on(priv, IWL_LED_LINK);
322 }
323 }
324
325 priv->last_blink_rate = blink_rate;
326 priv->rxtxpackets = 0;
327}
328
329
330/* Register all led handler */
331int iwl3945_led_register(struct iwl3945_priv *priv)
332{
333 char *trigger;
334 char name[32];
335 int ret;
336
337 priv->last_blink_rate = 0;
338 priv->rxtxpackets = 0;
339 priv->last_blink_time = 0;
340 priv->allow_blinking = 0;
341
342 trigger = ieee80211_get_radio_led_name(priv->hw);
343 snprintf(name, sizeof(name), "iwl-%s:radio",
344 wiphy_name(priv->hw->wiphy));
345
346 priv->led[IWL_LED_TRG_RADIO].led_on = iwl3945_led_on_reg;
347 priv->led[IWL_LED_TRG_RADIO].led_off = iwl3945_led_off_reg;
348 priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL;
349
350 ret = iwl3945_led_register_led(priv,
351 &priv->led[IWL_LED_TRG_RADIO],
352 IWL_LED_TRG_RADIO, 1,
353 name, trigger);
354 if (ret)
355 goto exit_fail;
356
357 trigger = ieee80211_get_assoc_led_name(priv->hw);
358 snprintf(name, sizeof(name), "iwl-%s:assoc",
359 wiphy_name(priv->hw->wiphy));
360
361 ret = iwl3945_led_register_led(priv,
362 &priv->led[IWL_LED_TRG_ASSOC],
363 IWL_LED_TRG_ASSOC, 0,
364 name, trigger);
365 /* for assoc always turn led on */
366 priv->led[IWL_LED_TRG_ASSOC].led_on = iwl3945_led_on_reg;
367 priv->led[IWL_LED_TRG_ASSOC].led_off = iwl3945_led_on_reg;
368 priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
369
370 if (ret)
371 goto exit_fail;
372
373 trigger = ieee80211_get_rx_led_name(priv->hw);
374 snprintf(name, sizeof(name), "iwl-%s:RX",
375 wiphy_name(priv->hw->wiphy));
376
377
378 ret = iwl3945_led_register_led(priv,
379 &priv->led[IWL_LED_TRG_RX],
380 IWL_LED_TRG_RX, 0,
381 name, trigger);
382
383 priv->led[IWL_LED_TRG_RX].led_on = iwl3945_led_associated;
384 priv->led[IWL_LED_TRG_RX].led_off = iwl3945_led_associated;
385 priv->led[IWL_LED_TRG_RX].led_pattern = iwl3945_led_pattern;
386
387 if (ret)
388 goto exit_fail;
389
390 trigger = ieee80211_get_tx_led_name(priv->hw);
391 snprintf(name, sizeof(name), "iwl-%s:TX",
392 wiphy_name(priv->hw->wiphy));
393 ret = iwl3945_led_register_led(priv,
394 &priv->led[IWL_LED_TRG_TX],
395 IWL_LED_TRG_TX, 0,
396 name, trigger);
397 priv->led[IWL_LED_TRG_TX].led_on = iwl3945_led_associated;
398 priv->led[IWL_LED_TRG_TX].led_off = iwl3945_led_associated;
399 priv->led[IWL_LED_TRG_TX].led_pattern = iwl3945_led_pattern;
400
401 if (ret)
402 goto exit_fail;
403
404 return 0;
405
406exit_fail:
407 iwl3945_led_unregister(priv);
408 return ret;
409}
410
411
412/* unregister led class */
413static void iwl3945_led_unregister_led(struct iwl3945_led *led, u8 set_led)
414{
415 if (!led->registered)
416 return;
417
418 led_classdev_unregister(&led->led_dev);
419
420 if (set_led)
421 led->led_dev.brightness_set(&led->led_dev, LED_OFF);
422 led->registered = 0;
423}
424
425/* Unregister all led handlers */
426void iwl3945_led_unregister(struct iwl3945_priv *priv)
427{
428 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0);
429 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RX], 0);
430 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_TX], 0);
431 iwl3945_led_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1);
432}
433
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-led.h b/drivers/net/wireless/iwlwifi/iwl-3945-led.h
new file mode 100644
index 000000000000..b1d2f6b8b259
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-led.h
@@ -0,0 +1,73 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#ifndef IWL3945_LEDS_H
28#define IWL3945_LEDS_H
29
30struct iwl3945_priv;
31
32#ifdef CONFIG_IWL3945_LEDS
33#define IWL_LED_SOLID 11
34#define IWL_LED_NAME_LEN 31
35#define IWL_DEF_LED_INTRVL __constant_cpu_to_le32(1000)
36
37#define IWL_LED_ACTIVITY (0<<1)
38#define IWL_LED_LINK (1<<1)
39
40enum led_type {
41 IWL_LED_TRG_TX,
42 IWL_LED_TRG_RX,
43 IWL_LED_TRG_ASSOC,
44 IWL_LED_TRG_RADIO,
45 IWL_LED_TRG_MAX,
46};
47
48#include <linux/leds.h>
49
50struct iwl3945_led {
51 struct iwl3945_priv *priv;
52 struct led_classdev led_dev;
53
54 int (*led_on) (struct iwl3945_priv *priv, int led_id);
55 int (*led_off) (struct iwl3945_priv *priv, int led_id);
56 int (*led_pattern) (struct iwl3945_priv *priv, int led_id,
57 enum led_brightness brightness);
58
59 enum led_type type;
60 unsigned int registered;
61};
62
63extern int iwl3945_led_register(struct iwl3945_priv *priv);
64extern void iwl3945_led_unregister(struct iwl3945_priv *priv);
65extern void iwl3945_led_background(struct iwl3945_priv *priv);
66
67#else
68static inline int iwl3945_led_register(struct iwl3945_priv *priv) { return 0; }
69static inline void iwl3945_led_unregister(struct iwl3945_priv *priv) {}
70static inline void iwl3945_led_background(struct iwl3945_priv *priv) {}
71#endif /* CONFIG_IWL3945_LEDS */
72
73#endif /* IWL3945_LEDS_H */
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index e116ed77c5ad..eb30819cddc4 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -358,6 +358,8 @@ void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_b
358 358
359 memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics)); 359 memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
360 360
361 iwl3945_led_background(priv);
362
361 priv->last_statistics_time = jiffies; 363 priv->last_statistics_time = jiffies;
362} 364}
363 365
@@ -640,6 +642,10 @@ static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
640 if (priv->add_radiotap) 642 if (priv->add_radiotap)
641 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats); 643 iwl3945_add_radiotap(priv, rxb->skb, rx_hdr, stats);
642 644
645#ifdef CONFIG_IWL3945_LEDS
646 if (is_data)
647 priv->rxtxpackets += len;
648#endif
643 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats); 649 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
644 rxb->skb = NULL; 650 rxb->skb = NULL;
645} 651}
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h
index 931c465f9e5e..d7ccf13b875d 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.h
@@ -44,6 +44,7 @@ extern struct pci_device_id iwl3945_hw_card_ids[];
44#include "iwl-prph.h" 44#include "iwl-prph.h"
45#include "iwl-3945-hw.h" 45#include "iwl-3945-hw.h"
46#include "iwl-3945-debug.h" 46#include "iwl-3945-debug.h"
47#include "iwl-3945-led.h"
47 48
48/* Change firmware file name, using "-" and incrementing number, 49/* Change firmware file name, using "-" and incrementing number,
49 * *only* when uCode interface or architecture changes so that it 50 * *only* when uCode interface or architecture changes so that it
@@ -777,13 +778,15 @@ struct iwl3945_priv {
777 struct iwl3945_init_alive_resp card_alive_init; 778 struct iwl3945_init_alive_resp card_alive_init;
778 struct iwl3945_alive_resp card_alive; 779 struct iwl3945_alive_resp card_alive;
779 780
780#ifdef LED 781#ifdef CONFIG_IWL4965_LEDS
781 /* LED related variables */ 782 struct iwl3945_led led[IWL_LED_TRG_MAX];
782 struct iwl3945_activity_blink activity; 783 unsigned long last_blink_time;
783 unsigned long led_packets; 784 u8 last_blink_rate;
784 int led_state; 785 u8 allow_blinking;
786 unsigned int rxtxpackets;
785#endif 787#endif
786 788
789
787 u16 active_rate; 790 u16 active_rate;
788 u16 active_rate_basic; 791 u16 active_rate_basic;
789 792
@@ -827,7 +830,7 @@ struct iwl3945_priv {
827 struct iwl3945_station_entry stations[IWL_STATION_COUNT]; 830 struct iwl3945_station_entry stations[IWL_STATION_COUNT];
828 831
829 /* Indication if ieee80211_ops->open has been called */ 832 /* Indication if ieee80211_ops->open has been called */
830 int is_open; 833 u8 is_open;
831 834
832 u8 mac80211_registered; 835 u8 mac80211_registered;
833 836
@@ -848,7 +851,7 @@ struct iwl3945_priv {
848 /* eeprom */ 851 /* eeprom */
849 struct iwl3945_eeprom eeprom; 852 struct iwl3945_eeprom eeprom;
850 853
851 int iw_mode; 854 enum ieee80211_if_types iw_mode;
852 855
853 struct sk_buff *ibss_beacon; 856 struct sk_buff *ibss_beacon;
854 857
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-io.h b/drivers/net/wireless/iwlwifi/iwl-4965-io.h
deleted file mode 100644
index fba7d03d4291..000000000000
--- a/drivers/net/wireless/iwlwifi/iwl-4965-io.h
+++ /dev/null
@@ -1,426 +0,0 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *
27 *****************************************************************************/
28
29#ifndef __iwl4965_io_h__
30#define __iwl4965_io_h__
31
32#include <linux/io.h>
33
34#include "iwl-debug.h"
35
36/*
37 * IO, register, and NIC memory access functions
38 *
39 * NOTE on naming convention and macro usage for these
40 *
41 * A single _ prefix before a an access function means that no state
42 * check or debug information is printed when that function is called.
43 *
44 * A double __ prefix before an access function means that state is checked
45 * and the current line number is printed in addition to any other debug output.
46 *
47 * The non-prefixed name is the #define that maps the caller into a
48 * #define that provides the caller's __LINE__ to the double prefix version.
49 *
50 * If you wish to call the function without any debug or state checking,
51 * you should use the single _ prefix version (as is used by dependent IO
52 * routines, for example _iwl4965_read_direct32 calls the non-check version of
53 * _iwl4965_read32.)
54 *
55 * These declarations are *extremely* useful in quickly isolating code deltas
56 * which result in misconfiguring of the hardware I/O. In combination with
57 * git-bisect and the IO debug level you can quickly determine the specific
58 * commit which breaks the IO sequence to the hardware.
59 *
60 */
61
62#define _iwl4965_write32(priv, ofs, val) writel((val), (priv)->hw_base + (ofs))
63#ifdef CONFIG_IWLWIFI_DEBUG
64static inline void __iwl4965_write32(const char *f, u32 l, struct iwl_priv *priv,
65 u32 ofs, u32 val)
66{
67 IWL_DEBUG_IO("write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l);
68 _iwl4965_write32(priv, ofs, val);
69}
70#define iwl4965_write32(priv, ofs, val) \
71 __iwl4965_write32(__FILE__, __LINE__, priv, ofs, val)
72#else
73#define iwl4965_write32(priv, ofs, val) _iwl4965_write32(priv, ofs, val)
74#endif
75
76#define _iwl4965_read32(priv, ofs) readl((priv)->hw_base + (ofs))
77#ifdef CONFIG_IWLWIFI_DEBUG
78static inline u32 __iwl4965_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs)
79{
80 IWL_DEBUG_IO("read_direct32(0x%08X) - %s %d\n", ofs, f, l);
81 return _iwl4965_read32(priv, ofs);
82}
83#define iwl4965_read32(priv, ofs) __iwl4965_read32(__FILE__, __LINE__, priv, ofs)
84#else
85#define iwl4965_read32(p, o) _iwl4965_read32(p, o)
86#endif
87
88static inline int _iwl4965_poll_bit(struct iwl_priv *priv, u32 addr,
89 u32 bits, u32 mask, int timeout)
90{
91 int i = 0;
92
93 do {
94 if ((_iwl4965_read32(priv, addr) & mask) == (bits & mask))
95 return i;
96 mdelay(10);
97 i += 10;
98 } while (i < timeout);
99
100 return -ETIMEDOUT;
101}
102#ifdef CONFIG_IWLWIFI_DEBUG
103static inline int __iwl4965_poll_bit(const char *f, u32 l,
104 struct iwl_priv *priv, u32 addr,
105 u32 bits, u32 mask, int timeout)
106{
107 int ret = _iwl4965_poll_bit(priv, addr, bits, mask, timeout);
108 IWL_DEBUG_IO("poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n",
109 addr, bits, mask,
110 unlikely(ret == -ETIMEDOUT)?"timeout":"", f, l);
111 return ret;
112}
113#define iwl4965_poll_bit(priv, addr, bits, mask, timeout) \
114 __iwl4965_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout)
115#else
116#define iwl4965_poll_bit(p, a, b, m, t) _iwl4965_poll_bit(p, a, b, m, t)
117#endif
118
119static inline void _iwl4965_set_bit(struct iwl_priv *priv, u32 reg, u32 mask)
120{
121 _iwl4965_write32(priv, reg, _iwl4965_read32(priv, reg) | mask);
122}
123#ifdef CONFIG_IWLWIFI_DEBUG
124static inline void __iwl4965_set_bit(const char *f, u32 l,
125 struct iwl_priv *priv, u32 reg, u32 mask)
126{
127 u32 val = _iwl4965_read32(priv, reg) | mask;
128 IWL_DEBUG_IO("set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
129 _iwl4965_write32(priv, reg, val);
130}
131#define iwl4965_set_bit(p, r, m) __iwl4965_set_bit(__FILE__, __LINE__, p, r, m)
132#else
133#define iwl4965_set_bit(p, r, m) _iwl4965_set_bit(p, r, m)
134#endif
135
136static inline void _iwl4965_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask)
137{
138 _iwl4965_write32(priv, reg, _iwl4965_read32(priv, reg) & ~mask);
139}
140#ifdef CONFIG_IWLWIFI_DEBUG
141static inline void __iwl4965_clear_bit(const char *f, u32 l,
142 struct iwl_priv *priv, u32 reg, u32 mask)
143{
144 u32 val = _iwl4965_read32(priv, reg) & ~mask;
145 IWL_DEBUG_IO("clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
146 _iwl4965_write32(priv, reg, val);
147}
148#define iwl4965_clear_bit(p, r, m) __iwl4965_clear_bit(__FILE__, __LINE__, p, r, m)
149#else
150#define iwl4965_clear_bit(p, r, m) _iwl4965_clear_bit(p, r, m)
151#endif
152
153static inline int _iwl4965_grab_nic_access(struct iwl_priv *priv)
154{
155 int ret;
156 u32 gp_ctl;
157
158#ifdef CONFIG_IWLWIFI_DEBUG
159 if (atomic_read(&priv->restrict_refcnt))
160 return 0;
161#endif
162 if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
163 test_bit(STATUS_RF_KILL_SW, &priv->status)) {
164 IWL_WARNING("WARNING: Requesting MAC access during RFKILL "
165 "wakes up NIC\n");
166
167 /* 10 msec allows time for NIC to complete its data save */
168 gp_ctl = _iwl4965_read32(priv, CSR_GP_CNTRL);
169 if (gp_ctl & CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY) {
170 IWL_DEBUG_RF_KILL("Wait for complete power-down, "
171 "gpctl = 0x%08x\n", gp_ctl);
172 mdelay(10);
173 } else
174 IWL_DEBUG_RF_KILL("power-down complete, "
175 "gpctl = 0x%08x\n", gp_ctl);
176 }
177
178 /* this bit wakes up the NIC */
179 _iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
180 ret = _iwl4965_poll_bit(priv, CSR_GP_CNTRL,
181 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
182 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
183 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50);
184 if (ret < 0) {
185 IWL_ERROR("MAC is in deep sleep!\n");
186 return -EIO;
187 }
188
189#ifdef CONFIG_IWLWIFI_DEBUG
190 atomic_inc(&priv->restrict_refcnt);
191#endif
192 return 0;
193}
194
195#ifdef CONFIG_IWLWIFI_DEBUG
196static inline int __iwl4965_grab_nic_access(const char *f, u32 l,
197 struct iwl_priv *priv)
198{
199 if (atomic_read(&priv->restrict_refcnt))
200 IWL_DEBUG_INFO("Grabbing access while already held at "
201 "line %d.\n", l);
202
203 IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l);
204 return _iwl4965_grab_nic_access(priv);
205}
206#define iwl4965_grab_nic_access(priv) \
207 __iwl4965_grab_nic_access(__FILE__, __LINE__, priv)
208#else
209#define iwl4965_grab_nic_access(priv) \
210 _iwl4965_grab_nic_access(priv)
211#endif
212
213static inline void _iwl4965_release_nic_access(struct iwl_priv *priv)
214{
215#ifdef CONFIG_IWLWIFI_DEBUG
216 if (atomic_dec_and_test(&priv->restrict_refcnt))
217#endif
218 _iwl4965_clear_bit(priv, CSR_GP_CNTRL,
219 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
220}
221#ifdef CONFIG_IWLWIFI_DEBUG
222static inline void __iwl4965_release_nic_access(const char *f, u32 l,
223 struct iwl_priv *priv)
224{
225 if (atomic_read(&priv->restrict_refcnt) <= 0)
226 IWL_ERROR("Release unheld nic access at line %d.\n", l);
227
228 IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l);
229 _iwl4965_release_nic_access(priv);
230}
231#define iwl4965_release_nic_access(priv) \
232 __iwl4965_release_nic_access(__FILE__, __LINE__, priv)
233#else
234#define iwl4965_release_nic_access(priv) \
235 _iwl4965_release_nic_access(priv)
236#endif
237
238static inline u32 _iwl4965_read_direct32(struct iwl_priv *priv, u32 reg)
239{
240 return _iwl4965_read32(priv, reg);
241}
242#ifdef CONFIG_IWLWIFI_DEBUG
243static inline u32 __iwl4965_read_direct32(const char *f, u32 l,
244 struct iwl_priv *priv, u32 reg)
245{
246 u32 value = _iwl4965_read_direct32(priv, reg);
247 if (!atomic_read(&priv->restrict_refcnt))
248 IWL_ERROR("Nic access not held from %s %d\n", f, l);
249 IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value,
250 f, l);
251 return value;
252}
253#define iwl4965_read_direct32(priv, reg) \
254 __iwl4965_read_direct32(__FILE__, __LINE__, priv, reg)
255#else
256#define iwl4965_read_direct32 _iwl4965_read_direct32
257#endif
258
259static inline void _iwl4965_write_direct32(struct iwl_priv *priv,
260 u32 reg, u32 value)
261{
262 _iwl4965_write32(priv, reg, value);
263}
264#ifdef CONFIG_IWLWIFI_DEBUG
265static void __iwl4965_write_direct32(u32 line,
266 struct iwl_priv *priv, u32 reg, u32 value)
267{
268 if (!atomic_read(&priv->restrict_refcnt))
269 IWL_ERROR("Nic access not held from line %d\n", line);
270 _iwl4965_write_direct32(priv, reg, value);
271}
272#define iwl4965_write_direct32(priv, reg, value) \
273 __iwl4965_write_direct32(__LINE__, priv, reg, value)
274#else
275#define iwl4965_write_direct32 _iwl4965_write_direct32
276#endif
277
278static inline void iwl4965_write_reg_buf(struct iwl_priv *priv,
279 u32 reg, u32 len, u32 *values)
280{
281 u32 count = sizeof(u32);
282
283 if ((priv != NULL) && (values != NULL)) {
284 for (; 0 < len; len -= count, reg += count, values++)
285 _iwl4965_write_direct32(priv, reg, *values);
286 }
287}
288
289static inline int _iwl4965_poll_direct_bit(struct iwl_priv *priv,
290 u32 addr, u32 mask, int timeout)
291{
292 int i = 0;
293
294 do {
295 if ((_iwl4965_read_direct32(priv, addr) & mask) == mask)
296 return i;
297 mdelay(10);
298 i += 10;
299 } while (i < timeout);
300
301 return -ETIMEDOUT;
302}
303
304#ifdef CONFIG_IWLWIFI_DEBUG
305static inline int __iwl4965_poll_direct_bit(const char *f, u32 l,
306 struct iwl_priv *priv,
307 u32 addr, u32 mask, int timeout)
308{
309 int ret = _iwl4965_poll_direct_bit(priv, addr, mask, timeout);
310
311 if (unlikely(ret == -ETIMEDOUT))
312 IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) - "
313 "timedout - %s %d\n", addr, mask, f, l);
314 else
315 IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) = 0x%08X "
316 "- %s %d\n", addr, mask, ret, f, l);
317 return ret;
318}
319#define iwl4965_poll_direct_bit(priv, addr, mask, timeout) \
320 __iwl4965_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout)
321#else
322#define iwl4965_poll_direct_bit _iwl4965_poll_direct_bit
323#endif
324
325static inline u32 _iwl4965_read_prph(struct iwl_priv *priv, u32 reg)
326{
327 _iwl4965_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
328 return _iwl4965_read_direct32(priv, HBUS_TARG_PRPH_RDAT);
329}
330#ifdef CONFIG_IWLWIFI_DEBUG
331static inline u32 __iwl4965_read_prph(u32 line, struct iwl_priv *priv, u32 reg)
332{
333 if (!atomic_read(&priv->restrict_refcnt))
334 IWL_ERROR("Nic access not held from line %d\n", line);
335 return _iwl4965_read_prph(priv, reg);
336}
337
338#define iwl4965_read_prph(priv, reg) \
339 __iwl4965_read_prph(__LINE__, priv, reg)
340#else
341#define iwl4965_read_prph _iwl4965_read_prph
342#endif
343
344static inline void _iwl4965_write_prph(struct iwl_priv *priv,
345 u32 addr, u32 val)
346{
347 _iwl4965_write_direct32(priv, HBUS_TARG_PRPH_WADDR,
348 ((addr & 0x0000FFFF) | (3 << 24)));
349 _iwl4965_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val);
350}
351#ifdef CONFIG_IWLWIFI_DEBUG
352static inline void __iwl4965_write_prph(u32 line, struct iwl_priv *priv,
353 u32 addr, u32 val)
354{
355 if (!atomic_read(&priv->restrict_refcnt))
356 IWL_ERROR("Nic access from line %d\n", line);
357 _iwl4965_write_prph(priv, addr, val);
358}
359
360#define iwl4965_write_prph(priv, addr, val) \
361 __iwl4965_write_prph(__LINE__, priv, addr, val);
362#else
363#define iwl4965_write_prph _iwl4965_write_prph
364#endif
365
366#define _iwl4965_set_bits_prph(priv, reg, mask) \
367 _iwl4965_write_prph(priv, reg, (_iwl4965_read_prph(priv, reg) | mask))
368#ifdef CONFIG_IWLWIFI_DEBUG
369static inline void __iwl4965_set_bits_prph(u32 line, struct iwl_priv *priv,
370 u32 reg, u32 mask)
371{
372 if (!atomic_read(&priv->restrict_refcnt))
373 IWL_ERROR("Nic access not held from line %d\n", line);
374
375 _iwl4965_set_bits_prph(priv, reg, mask);
376}
377#define iwl4965_set_bits_prph(priv, reg, mask) \
378 __iwl4965_set_bits_prph(__LINE__, priv, reg, mask)
379#else
380#define iwl4965_set_bits_prph _iwl4965_set_bits_prph
381#endif
382
383#define _iwl4965_set_bits_mask_prph(priv, reg, bits, mask) \
384 _iwl4965_write_prph(priv, reg, ((_iwl4965_read_prph(priv, reg) & mask) | bits))
385
386#ifdef CONFIG_IWLWIFI_DEBUG
387static inline void __iwl4965_set_bits_mask_prph(u32 line,
388 struct iwl_priv *priv, u32 reg, u32 bits, u32 mask)
389{
390 if (!atomic_read(&priv->restrict_refcnt))
391 IWL_ERROR("Nic access not held from line %d\n", line);
392 _iwl4965_set_bits_mask_prph(priv, reg, bits, mask);
393}
394#define iwl4965_set_bits_mask_prph(priv, reg, bits, mask) \
395 __iwl4965_set_bits_mask_prph(__LINE__, priv, reg, bits, mask)
396#else
397#define iwl4965_set_bits_mask_prph _iwl4965_set_bits_mask_prph
398#endif
399
400static inline void iwl4965_clear_bits_prph(struct iwl_priv
401 *priv, u32 reg, u32 mask)
402{
403 u32 val = _iwl4965_read_prph(priv, reg);
404 _iwl4965_write_prph(priv, reg, (val & ~mask));
405}
406
407static inline u32 iwl4965_read_targ_mem(struct iwl_priv *priv, u32 addr)
408{
409 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr);
410 return iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
411}
412
413static inline void iwl4965_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val)
414{
415 iwl4965_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
416 iwl4965_write_direct32(priv, HBUS_TARG_MEM_WDAT, val);
417}
418
419static inline void iwl4965_write_targ_mem_buf(struct iwl_priv *priv, u32 addr,
420 u32 len, u32 *values)
421{
422 iwl4965_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
423 for (; 0 < len; len -= sizeof(u32), values++)
424 iwl4965_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values);
425}
426#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965-rs.c b/drivers/net/wireless/iwlwifi/iwl-4965-rs.c
index 7d7ce7489ab5..735eadd57d18 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965-rs.c
@@ -397,7 +397,7 @@ static void rs_tl_turn_on_agg_for_tid(struct iwl_priv *priv,
397 DECLARE_MAC_BUF(mac); 397 DECLARE_MAC_BUF(mac);
398 398
399 spin_lock_bh(&sta->ampdu_mlme.ampdu_tx); 399 spin_lock_bh(&sta->ampdu_mlme.ampdu_tx);
400 state = sta->ampdu_mlme.tid_tx[tid].state; 400 state = sta->ampdu_mlme.tid_state_tx[tid];
401 spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx); 401 spin_unlock_bh(&sta->ampdu_mlme.ampdu_tx);
402 402
403 if (state == HT_AGG_STATE_IDLE && 403 if (state == HT_AGG_STATE_IDLE &&
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c
index 1db873b02f1e..e5f64d7fbfde 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.c
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.c
@@ -41,6 +41,7 @@
41#include "iwl-eeprom.h" 41#include "iwl-eeprom.h"
42#include "iwl-core.h" 42#include "iwl-core.h"
43#include "iwl-4965.h" 43#include "iwl-4965.h"
44#include "iwl-io.h"
44#include "iwl-helpers.h" 45#include "iwl-helpers.h"
45 46
46/* module parameters */ 47/* module parameters */
@@ -315,20 +316,20 @@ int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
315 unsigned long flags; 316 unsigned long flags;
316 317
317 spin_lock_irqsave(&priv->lock, flags); 318 spin_lock_irqsave(&priv->lock, flags);
318 rc = iwl4965_grab_nic_access(priv); 319 rc = iwl_grab_nic_access(priv);
319 if (rc) { 320 if (rc) {
320 spin_unlock_irqrestore(&priv->lock, flags); 321 spin_unlock_irqrestore(&priv->lock, flags);
321 return rc; 322 return rc;
322 } 323 }
323 324
324 /* stop Rx DMA */ 325 /* stop Rx DMA */
325 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 326 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
326 rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG, 327 rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
327 (1 << 24), 1000); 328 (1 << 24), 1000);
328 if (rc < 0) 329 if (rc < 0)
329 IWL_ERROR("Can't stop Rx DMA.\n"); 330 IWL_ERROR("Can't stop Rx DMA.\n");
330 331
331 iwl4965_release_nic_access(priv); 332 iwl_release_nic_access(priv);
332 spin_unlock_irqrestore(&priv->lock, flags); 333 spin_unlock_irqrestore(&priv->lock, flags);
333 334
334 return 0; 335 return 0;
@@ -372,7 +373,7 @@ static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
372 unsigned long flags; 373 unsigned long flags;
373 374
374 spin_lock_irqsave(&priv->lock, flags); 375 spin_lock_irqsave(&priv->lock, flags);
375 ret = iwl4965_grab_nic_access(priv); 376 ret = iwl_grab_nic_access(priv);
376 if (ret) { 377 if (ret) {
377 spin_unlock_irqrestore(&priv->lock, flags); 378 spin_unlock_irqrestore(&priv->lock, flags);
378 return ret; 379 return ret;
@@ -385,15 +386,15 @@ static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
385 &val); 386 &val);
386 387
387 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) 388 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
388 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 389 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
389 APMG_PS_CTRL_VAL_PWR_SRC_VAUX, 390 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
390 ~APMG_PS_CTRL_MSK_PWR_SRC); 391 ~APMG_PS_CTRL_MSK_PWR_SRC);
391 } else 392 } else
392 iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG, 393 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
393 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN, 394 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
394 ~APMG_PS_CTRL_MSK_PWR_SRC); 395 ~APMG_PS_CTRL_MSK_PWR_SRC);
395 396
396 iwl4965_release_nic_access(priv); 397 iwl_release_nic_access(priv);
397 spin_unlock_irqrestore(&priv->lock, flags); 398 spin_unlock_irqrestore(&priv->lock, flags);
398 399
399 return ret; 400 return ret;
@@ -406,7 +407,7 @@ static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
406 unsigned int rb_size; 407 unsigned int rb_size;
407 408
408 spin_lock_irqsave(&priv->lock, flags); 409 spin_lock_irqsave(&priv->lock, flags);
409 rc = iwl4965_grab_nic_access(priv); 410 rc = iwl_grab_nic_access(priv);
410 if (rc) { 411 if (rc) {
411 spin_unlock_irqrestore(&priv->lock, flags); 412 spin_unlock_irqrestore(&priv->lock, flags);
412 return rc; 413 return rc;
@@ -418,34 +419,34 @@ static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
418 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K; 419 rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
419 420
420 /* Stop Rx DMA */ 421 /* Stop Rx DMA */
421 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0); 422 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
422 423
423 /* Reset driver's Rx queue write index */ 424 /* Reset driver's Rx queue write index */
424 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); 425 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
425 426
426 /* Tell device where to find RBD circular buffer in DRAM */ 427 /* Tell device where to find RBD circular buffer in DRAM */
427 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG, 428 iwl_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
428 rxq->dma_addr >> 8); 429 rxq->dma_addr >> 8);
429 430
430 /* Tell device where in DRAM to update its Rx status */ 431 /* Tell device where in DRAM to update its Rx status */
431 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG, 432 iwl_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
432 (priv->hw_setting.shared_phys + 433 (priv->hw_setting.shared_phys +
433 offsetof(struct iwl4965_shared, val0)) >> 4); 434 offsetof(struct iwl4965_shared, val0)) >> 4);
434 435
435 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */ 436 /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
436 iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 437 iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
437 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL | 438 FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
438 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL | 439 FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
439 rb_size | 440 rb_size |
440 /*0x10 << 4 | */ 441 /*0x10 << 4 | */
441 (RX_QUEUE_SIZE_LOG << 442 (RX_QUEUE_SIZE_LOG <<
442 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT)); 443 FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
443 444
444 /* 445 /*
445 * iwl4965_write32(priv,CSR_INT_COAL_REG,0); 446 * iwl_write32(priv,CSR_INT_COAL_REG,0);
446 */ 447 */
447 448
448 iwl4965_release_nic_access(priv); 449 iwl_release_nic_access(priv);
449 spin_unlock_irqrestore(&priv->lock, flags); 450 spin_unlock_irqrestore(&priv->lock, flags);
450 451
451 return 0; 452 return 0;
@@ -458,13 +459,13 @@ static int iwl4965_kw_init(struct iwl_priv *priv)
458 int rc; 459 int rc;
459 460
460 spin_lock_irqsave(&priv->lock, flags); 461 spin_lock_irqsave(&priv->lock, flags);
461 rc = iwl4965_grab_nic_access(priv); 462 rc = iwl_grab_nic_access(priv);
462 if (rc) 463 if (rc)
463 goto out; 464 goto out;
464 465
465 iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG, 466 iwl_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
466 priv->kw.dma_addr >> 4); 467 priv->kw.dma_addr >> 4);
467 iwl4965_release_nic_access(priv); 468 iwl_release_nic_access(priv);
468out: 469out:
469 spin_unlock_irqrestore(&priv->lock, flags); 470 spin_unlock_irqrestore(&priv->lock, flags);
470 return rc; 471 return rc;
@@ -524,7 +525,7 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
524 525
525 spin_lock_irqsave(&priv->lock, flags); 526 spin_lock_irqsave(&priv->lock, flags);
526 527
527 rc = iwl4965_grab_nic_access(priv); 528 rc = iwl_grab_nic_access(priv);
528 if (unlikely(rc)) { 529 if (unlikely(rc)) {
529 IWL_ERROR("TX reset failed"); 530 IWL_ERROR("TX reset failed");
530 spin_unlock_irqrestore(&priv->lock, flags); 531 spin_unlock_irqrestore(&priv->lock, flags);
@@ -532,8 +533,8 @@ static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
532 } 533 }
533 534
534 /* Turn off all Tx DMA channels */ 535 /* Turn off all Tx DMA channels */
535 iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0); 536 iwl_write_prph(priv, KDR_SCD_TXFACT, 0);
536 iwl4965_release_nic_access(priv); 537 iwl_release_nic_access(priv);
537 spin_unlock_irqrestore(&priv->lock, flags); 538 spin_unlock_irqrestore(&priv->lock, flags);
538 539
539 /* Tell 4965 where to find the keep-warm buffer */ 540 /* Tell 4965 where to find the keep-warm buffer */
@@ -580,11 +581,11 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
580 /* nic_init */ 581 /* nic_init */
581 spin_lock_irqsave(&priv->lock, flags); 582 spin_lock_irqsave(&priv->lock, flags);
582 583
583 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS, 584 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
584 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); 585 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
585 586
586 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 587 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
587 rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL, 588 rc = iwl_poll_bit(priv, CSR_GP_CNTRL,
588 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 589 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
589 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); 590 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
590 if (rc < 0) { 591 if (rc < 0) {
@@ -593,26 +594,25 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
593 return rc; 594 return rc;
594 } 595 }
595 596
596 rc = iwl4965_grab_nic_access(priv); 597 rc = iwl_grab_nic_access(priv);
597 if (rc) { 598 if (rc) {
598 spin_unlock_irqrestore(&priv->lock, flags); 599 spin_unlock_irqrestore(&priv->lock, flags);
599 return rc; 600 return rc;
600 } 601 }
601 602
602 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG); 603 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
603 604
604 iwl4965_write_prph(priv, APMG_CLK_CTRL_REG, 605 iwl_write_prph(priv, APMG_CLK_CTRL_REG,
605 APMG_CLK_VAL_DMA_CLK_RQT | 606 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
606 APMG_CLK_VAL_BSM_CLK_RQT); 607 iwl_read_prph(priv, APMG_CLK_CTRL_REG);
607 iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
608 608
609 udelay(20); 609 udelay(20);
610 610
611 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 611 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
612 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 612 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
613 613
614 iwl4965_release_nic_access(priv); 614 iwl_release_nic_access(priv);
615 iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32); 615 iwl_write32(priv, CSR_INT_COALESCING, 512 / 32);
616 spin_unlock_irqrestore(&priv->lock, flags); 616 spin_unlock_irqrestore(&priv->lock, flags);
617 617
618 /* Determine HW type */ 618 /* Determine HW type */
@@ -648,26 +648,24 @@ int iwl4965_hw_nic_init(struct iwl_priv *priv)
648 648
649 /* set CSR_HW_CONFIG_REG for uCode use */ 649 /* set CSR_HW_CONFIG_REG for uCode use */
650 650
651 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG, 651 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
652 CSR49_HW_IF_CONFIG_REG_BIT_4965_R | 652 CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
653 CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI | 653 CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
654 CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI); 654 CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
655 655
656 rc = iwl4965_grab_nic_access(priv); 656 rc = iwl_grab_nic_access(priv);
657 if (rc < 0) { 657 if (rc < 0) {
658 spin_unlock_irqrestore(&priv->lock, flags); 658 spin_unlock_irqrestore(&priv->lock, flags);
659 IWL_DEBUG_INFO("Failed to init the card\n"); 659 IWL_DEBUG_INFO("Failed to init the card\n");
660 return rc; 660 return rc;
661 } 661 }
662 662
663 iwl4965_read_prph(priv, APMG_PS_CTRL_REG); 663 iwl_read_prph(priv, APMG_PS_CTRL_REG);
664 iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG, 664 iwl_set_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
665 APMG_PS_CTRL_VAL_RESET_REQ);
666 udelay(5); 665 udelay(5);
667 iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG, 666 iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG, APMG_PS_CTRL_VAL_RESET_REQ);
668 APMG_PS_CTRL_VAL_RESET_REQ);
669 667
670 iwl4965_release_nic_access(priv); 668 iwl_release_nic_access(priv);
671 spin_unlock_irqrestore(&priv->lock, flags); 669 spin_unlock_irqrestore(&priv->lock, flags);
672 670
673 iwl4965_hw_card_show_info(priv); 671 iwl4965_hw_card_show_info(priv);
@@ -720,16 +718,16 @@ int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
720 spin_lock_irqsave(&priv->lock, flags); 718 spin_lock_irqsave(&priv->lock, flags);
721 719
722 /* set stop master bit */ 720 /* set stop master bit */
723 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER); 721 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
724 722
725 reg_val = iwl4965_read32(priv, CSR_GP_CNTRL); 723 reg_val = iwl_read32(priv, CSR_GP_CNTRL);
726 724
727 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE == 725 if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
728 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE)) 726 (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
729 IWL_DEBUG_INFO("Card in power save, master is already " 727 IWL_DEBUG_INFO("Card in power save, master is already "
730 "stopped\n"); 728 "stopped\n");
731 else { 729 else {
732 rc = iwl4965_poll_bit(priv, CSR_RESET, 730 rc = iwl_poll_bit(priv, CSR_RESET,
733 CSR_RESET_REG_FLAG_MASTER_DISABLED, 731 CSR_RESET_REG_FLAG_MASTER_DISABLED,
734 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); 732 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
735 if (rc < 0) { 733 if (rc < 0) {
@@ -756,18 +754,17 @@ void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
756 /* Stop each Tx DMA channel, and wait for it to be idle */ 754 /* Stop each Tx DMA channel, and wait for it to be idle */
757 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) { 755 for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
758 spin_lock_irqsave(&priv->lock, flags); 756 spin_lock_irqsave(&priv->lock, flags);
759 if (iwl4965_grab_nic_access(priv)) { 757 if (iwl_grab_nic_access(priv)) {
760 spin_unlock_irqrestore(&priv->lock, flags); 758 spin_unlock_irqrestore(&priv->lock, flags);
761 continue; 759 continue;
762 } 760 }
763 761
764 iwl4965_write_direct32(priv, 762 iwl_write_direct32(priv,
765 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 763 IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
766 0x0); 764 iwl_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
767 iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG, 765 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
768 IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE 766 (txq_id), 200);
769 (txq_id), 200); 767 iwl_release_nic_access(priv);
770 iwl4965_release_nic_access(priv);
771 spin_unlock_irqrestore(&priv->lock, flags); 768 spin_unlock_irqrestore(&priv->lock, flags);
772 } 769 }
773 770
@@ -784,29 +781,29 @@ int iwl4965_hw_nic_reset(struct iwl_priv *priv)
784 781
785 spin_lock_irqsave(&priv->lock, flags); 782 spin_lock_irqsave(&priv->lock, flags);
786 783
787 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 784 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
788 785
789 udelay(10); 786 udelay(10);
790 787
791 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 788 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
792 rc = iwl4965_poll_bit(priv, CSR_RESET, 789 rc = iwl_poll_bit(priv, CSR_RESET,
793 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 790 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
794 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25); 791 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
795 792
796 udelay(10); 793 udelay(10);
797 794
798 rc = iwl4965_grab_nic_access(priv); 795 rc = iwl_grab_nic_access(priv);
799 if (!rc) { 796 if (!rc) {
800 iwl4965_write_prph(priv, APMG_CLK_EN_REG, 797 iwl_write_prph(priv, APMG_CLK_EN_REG,
801 APMG_CLK_VAL_DMA_CLK_RQT | 798 APMG_CLK_VAL_DMA_CLK_RQT |
802 APMG_CLK_VAL_BSM_CLK_RQT); 799 APMG_CLK_VAL_BSM_CLK_RQT);
803 800
804 udelay(10); 801 udelay(10);
805 802
806 iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG, 803 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
807 APMG_PCIDEV_STT_VAL_L1_ACT_DIS); 804 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
808 805
809 iwl4965_release_nic_access(priv); 806 iwl_release_nic_access(priv);
810 } 807 }
811 808
812 clear_bit(STATUS_HCMD_ACTIVE, &priv->status); 809 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
@@ -872,7 +869,7 @@ void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
872 int ret = 0; 869 int ret = 0;
873 870
874 spin_lock_irqsave(&priv->lock, flags); 871 spin_lock_irqsave(&priv->lock, flags);
875 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, 872 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
876 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 873 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
877 spin_unlock_irqrestore(&priv->lock, flags); 874 spin_unlock_irqrestore(&priv->lock, flags);
878 875
@@ -1733,9 +1730,9 @@ static void iwl4965_bg_txpower_work(struct work_struct *work)
1733 */ 1730 */
1734static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index) 1731static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
1735{ 1732{
1736 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 1733 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
1737 (index & 0xff) | (txq_id << 8)); 1734 (index & 0xff) | (txq_id << 8));
1738 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index); 1735 iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
1739} 1736}
1740 1737
1741/** 1738/**
@@ -1755,7 +1752,7 @@ static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
1755 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0; 1752 int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
1756 1753
1757 /* Set up and activate */ 1754 /* Set up and activate */
1758 iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id), 1755 iwl_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
1759 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) | 1756 (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
1760 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) | 1757 (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
1761 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) | 1758 (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
@@ -1807,46 +1804,46 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
1807 priv->chain_noise_data.delta_gain_code[i] = 1804 priv->chain_noise_data.delta_gain_code[i] =
1808 CHAIN_NOISE_DELTA_GAIN_INIT_VAL; 1805 CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
1809#endif /* CONFIG_IWL4965_SENSITIVITY*/ 1806#endif /* CONFIG_IWL4965_SENSITIVITY*/
1810 ret = iwl4965_grab_nic_access(priv); 1807 ret = iwl_grab_nic_access(priv);
1811 if (ret) { 1808 if (ret) {
1812 spin_unlock_irqrestore(&priv->lock, flags); 1809 spin_unlock_irqrestore(&priv->lock, flags);
1813 return ret; 1810 return ret;
1814 } 1811 }
1815 1812
1816 /* Clear 4965's internal Tx Scheduler data base */ 1813 /* Clear 4965's internal Tx Scheduler data base */
1817 priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR); 1814 priv->scd_base_addr = iwl_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
1818 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET; 1815 a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
1819 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4) 1816 for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
1820 iwl4965_write_targ_mem(priv, a, 0); 1817 iwl_write_targ_mem(priv, a, 0);
1821 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4) 1818 for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
1822 iwl4965_write_targ_mem(priv, a, 0); 1819 iwl_write_targ_mem(priv, a, 0);
1823 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4) 1820 for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
1824 iwl4965_write_targ_mem(priv, a, 0); 1821 iwl_write_targ_mem(priv, a, 0);
1825 1822
1826 /* Tel 4965 where to find Tx byte count tables */ 1823 /* Tel 4965 where to find Tx byte count tables */
1827 iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR, 1824 iwl_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
1828 (priv->hw_setting.shared_phys + 1825 (priv->hw_setting.shared_phys +
1829 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10); 1826 offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
1830 1827
1831 /* Disable chain mode for all queues */ 1828 /* Disable chain mode for all queues */
1832 iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0); 1829 iwl_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
1833 1830
1834 /* Initialize each Tx queue (including the command queue) */ 1831 /* Initialize each Tx queue (including the command queue) */
1835 for (i = 0; i < priv->hw_setting.max_txq_num; i++) { 1832 for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
1836 1833
1837 /* TFD circular buffer read/write indexes */ 1834 /* TFD circular buffer read/write indexes */
1838 iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0); 1835 iwl_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
1839 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8)); 1836 iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
1840 1837
1841 /* Max Tx Window size for Scheduler-ACK mode */ 1838 /* Max Tx Window size for Scheduler-ACK mode */
1842 iwl4965_write_targ_mem(priv, priv->scd_base_addr + 1839 iwl_write_targ_mem(priv, priv->scd_base_addr +
1843 SCD_CONTEXT_QUEUE_OFFSET(i), 1840 SCD_CONTEXT_QUEUE_OFFSET(i),
1844 (SCD_WIN_SIZE << 1841 (SCD_WIN_SIZE <<
1845 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 1842 SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
1846 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 1843 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
1847 1844
1848 /* Frame limit */ 1845 /* Frame limit */
1849 iwl4965_write_targ_mem(priv, priv->scd_base_addr + 1846 iwl_write_targ_mem(priv, priv->scd_base_addr +
1850 SCD_CONTEXT_QUEUE_OFFSET(i) + 1847 SCD_CONTEXT_QUEUE_OFFSET(i) +
1851 sizeof(u32), 1848 sizeof(u32),
1852 (SCD_FRAME_LIMIT << 1849 (SCD_FRAME_LIMIT <<
@@ -1854,11 +1851,11 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
1854 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 1851 SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
1855 1852
1856 } 1853 }
1857 iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK, 1854 iwl_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
1858 (1 << priv->hw_setting.max_txq_num) - 1); 1855 (1 << priv->hw_setting.max_txq_num) - 1);
1859 1856
1860 /* Activate all Tx DMA/FIFO channels */ 1857 /* Activate all Tx DMA/FIFO channels */
1861 iwl4965_write_prph(priv, KDR_SCD_TXFACT, 1858 iwl_write_prph(priv, KDR_SCD_TXFACT,
1862 SCD_TXFACT_REG_TXFIFO_MASK(0, 7)); 1859 SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
1863 1860
1864 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0); 1861 iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
@@ -1870,7 +1867,7 @@ int iwl4965_alive_notify(struct iwl_priv *priv)
1870 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0); 1867 iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
1871 } 1868 }
1872 1869
1873 iwl4965_release_nic_access(priv); 1870 iwl_release_nic_access(priv);
1874 spin_unlock_irqrestore(&priv->lock, flags); 1871 spin_unlock_irqrestore(&priv->lock, flags);
1875 1872
1876 return ret; 1873 return ret;
@@ -2929,22 +2926,22 @@ int iwl4965_hw_tx_queue_init(struct iwl_priv *priv, struct iwl4965_tx_queue *txq
2929 int txq_id = txq->q.id; 2926 int txq_id = txq->q.id;
2930 2927
2931 spin_lock_irqsave(&priv->lock, flags); 2928 spin_lock_irqsave(&priv->lock, flags);
2932 rc = iwl4965_grab_nic_access(priv); 2929 rc = iwl_grab_nic_access(priv);
2933 if (rc) { 2930 if (rc) {
2934 spin_unlock_irqrestore(&priv->lock, flags); 2931 spin_unlock_irqrestore(&priv->lock, flags);
2935 return rc; 2932 return rc;
2936 } 2933 }
2937 2934
2938 /* Circular buffer (TFD queue in DRAM) physical base address */ 2935 /* Circular buffer (TFD queue in DRAM) physical base address */
2939 iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), 2936 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
2940 txq->q.dma_addr >> 8); 2937 txq->q.dma_addr >> 8);
2941 2938
2942 /* Enable DMA channel, using same id as for TFD queue */ 2939 /* Enable DMA channel, using same id as for TFD queue */
2943 iwl4965_write_direct32( 2940 iwl_write_direct32(
2944 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 2941 priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
2945 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 2942 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
2946 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL); 2943 IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
2947 iwl4965_release_nic_access(priv); 2944 iwl_release_nic_access(priv);
2948 spin_unlock_irqrestore(&priv->lock, flags); 2945 spin_unlock_irqrestore(&priv->lock, flags);
2949 2946
2950 return 0; 2947 return 0;
@@ -3258,6 +3255,8 @@ void iwl4965_hw_rx_statistics(struct iwl_priv *priv, struct iwl4965_rx_mem_buffe
3258#endif 3255#endif
3259 } 3256 }
3260 3257
3258 iwl_leds_background(priv);
3259
3261 /* If the hardware hasn't reported a change in 3260 /* If the hardware hasn't reported a change in
3262 * temperature then don't bother computing a 3261 * temperature then don't bother computing a
3263 * calibrated temperature value */ 3262 * calibrated temperature value */
@@ -3539,10 +3538,6 @@ static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
3539 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats); 3538 ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
3540 priv->alloc_rxb_skb--; 3539 priv->alloc_rxb_skb--;
3541 rxb->skb = NULL; 3540 rxb->skb = NULL;
3542#ifdef LED
3543 priv->led_packets += len;
3544 iwl4965_setup_activity_timer(priv);
3545#endif
3546} 3541}
3547 3542
3548/* Calc max signal level (dBm) among 3 possible receivers */ 3543/* Calc max signal level (dBm) among 3 possible receivers */
@@ -4261,7 +4256,7 @@ static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
4261{ 4256{
4262 /* Simply stop the queue, but don't change any configuration; 4257 /* Simply stop the queue, but don't change any configuration;
4263 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */ 4258 * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
4264 iwl4965_write_prph(priv, 4259 iwl_write_prph(priv,
4265 KDR_SCD_QUEUE_STATUS_BITS(txq_id), 4260 KDR_SCD_QUEUE_STATUS_BITS(txq_id),
4266 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)| 4261 (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
4267 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN)); 4262 (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
@@ -4282,24 +4277,24 @@ static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
4282 return -EINVAL; 4277 return -EINVAL;
4283 } 4278 }
4284 4279
4285 ret = iwl4965_grab_nic_access(priv); 4280 ret = iwl_grab_nic_access(priv);
4286 if (ret) 4281 if (ret)
4287 return ret; 4282 return ret;
4288 4283
4289 iwl4965_tx_queue_stop_scheduler(priv, txq_id); 4284 iwl4965_tx_queue_stop_scheduler(priv, txq_id);
4290 4285
4291 iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id)); 4286 iwl_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4292 4287
4293 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff); 4288 priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
4294 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff); 4289 priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
4295 /* supposes that ssn_idx is valid (!= 0xFFF) */ 4290 /* supposes that ssn_idx is valid (!= 0xFFF) */
4296 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx); 4291 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4297 4292
4298 iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id)); 4293 iwl_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4299 iwl4965_txq_ctx_deactivate(priv, txq_id); 4294 iwl4965_txq_ctx_deactivate(priv, txq_id);
4300 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0); 4295 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
4301 4296
4302 iwl4965_release_nic_access(priv); 4297 iwl_release_nic_access(priv);
4303 4298
4304 return 0; 4299 return 0;
4305} 4300}
@@ -4434,14 +4429,14 @@ static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
4434 tbl_dw_addr = priv->scd_base_addr + 4429 tbl_dw_addr = priv->scd_base_addr +
4435 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id); 4430 SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
4436 4431
4437 tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr); 4432 tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
4438 4433
4439 if (txq_id & 0x1) 4434 if (txq_id & 0x1)
4440 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF); 4435 tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
4441 else 4436 else
4442 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000); 4437 tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
4443 4438
4444 iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw); 4439 iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
4445 4440
4446 return 0; 4441 return 0;
4447} 4442}
@@ -4471,7 +4466,7 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4471 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid); 4466 iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
4472 4467
4473 spin_lock_irqsave(&priv->lock, flags); 4468 spin_lock_irqsave(&priv->lock, flags);
4474 rc = iwl4965_grab_nic_access(priv); 4469 rc = iwl_grab_nic_access(priv);
4475 if (rc) { 4470 if (rc) {
4476 spin_unlock_irqrestore(&priv->lock, flags); 4471 spin_unlock_irqrestore(&priv->lock, flags);
4477 return rc; 4472 return rc;
@@ -4484,7 +4479,7 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4484 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id); 4479 iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
4485 4480
4486 /* Set this queue as a chain-building queue */ 4481 /* Set this queue as a chain-building queue */
4487 iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id)); 4482 iwl_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
4488 4483
4489 /* Place first TFD at index corresponding to start sequence number. 4484 /* Place first TFD at index corresponding to start sequence number.
4490 * Assumes that ssn_idx is valid (!= 0xFFF) */ 4485 * Assumes that ssn_idx is valid (!= 0xFFF) */
@@ -4493,22 +4488,22 @@ static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
4493 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx); 4488 iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
4494 4489
4495 /* Set up Tx window size and frame limit for this queue */ 4490 /* Set up Tx window size and frame limit for this queue */
4496 iwl4965_write_targ_mem(priv, 4491 iwl_write_targ_mem(priv,
4497 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id), 4492 priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
4498 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) & 4493 (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
4499 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK); 4494 SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
4500 4495
4501 iwl4965_write_targ_mem(priv, priv->scd_base_addr + 4496 iwl_write_targ_mem(priv, priv->scd_base_addr +
4502 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32), 4497 SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
4503 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) 4498 (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
4504 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK); 4499 & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
4505 4500
4506 iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id)); 4501 iwl_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
4507 4502
4508 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */ 4503 /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
4509 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1); 4504 iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
4510 4505
4511 iwl4965_release_nic_access(priv); 4506 iwl_release_nic_access(priv);
4512 spin_unlock_irqrestore(&priv->lock, flags); 4507 spin_unlock_irqrestore(&priv->lock, flags);
4513 4508
4514 return 0; 4509 return 0;
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.h b/drivers/net/wireless/iwlwifi/iwl-4965.h
index 960b53b20df8..069e591981b2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-4965.h
+++ b/drivers/net/wireless/iwlwifi/iwl-4965.h
@@ -45,6 +45,7 @@ extern struct pci_device_id iwl4965_hw_card_ids[];
45#include "iwl-csr.h" 45#include "iwl-csr.h"
46#include "iwl-prph.h" 46#include "iwl-prph.h"
47#include "iwl-debug.h" 47#include "iwl-debug.h"
48#include "iwl-led.h"
48 49
49/* Change firmware file name, using "-" and incrementing number, 50/* Change firmware file name, using "-" and incrementing number,
50 * *only* when uCode interface or architecture changes so that it 51 * *only* when uCode interface or architecture changes so that it
@@ -1050,11 +1051,12 @@ struct iwl_priv {
1050 struct iwl4965_init_alive_resp card_alive_init; 1051 struct iwl4965_init_alive_resp card_alive_init;
1051 struct iwl4965_alive_resp card_alive; 1052 struct iwl4965_alive_resp card_alive;
1052 1053
1053#ifdef LED 1054#ifdef CONFIG_IWL4965_LEDS
1054 /* LED related variables */ 1055 struct iwl4965_led led[IWL_LED_TRG_MAX];
1055 struct iwl4965_activity_blink activity; 1056 unsigned long last_blink_time;
1056 unsigned long led_packets; 1057 u8 last_blink_rate;
1057 int led_state; 1058 u8 allow_blinking;
1059 u64 led_tpt;
1058#endif 1060#endif
1059 1061
1060 u16 active_rate; 1062 u16 active_rate;
@@ -1127,7 +1129,7 @@ struct iwl_priv {
1127 struct iwl4965_station_entry stations[IWL_STATION_COUNT]; 1129 struct iwl4965_station_entry stations[IWL_STATION_COUNT];
1128 1130
1129 /* Indication if ieee80211_ops->open has been called */ 1131 /* Indication if ieee80211_ops->open has been called */
1130 int is_open; 1132 u8 is_open;
1131 1133
1132 u8 mac80211_registered; 1134 u8 mac80211_registered;
1133 1135
@@ -1148,7 +1150,7 @@ struct iwl_priv {
1148 /* eeprom */ 1150 /* eeprom */
1149 struct iwl4965_eeprom eeprom; 1151 struct iwl4965_eeprom eeprom;
1150 1152
1151 int iw_mode; 1153 enum ieee80211_if_types iw_mode;
1152 1154
1153 struct sk_buff *ibss_beacon; 1155 struct sk_buff *ibss_beacon;
1154 1156
@@ -1264,6 +1266,5 @@ extern const struct iwl_channel_info *iwl_get_channel_info(
1264 const struct iwl_priv *priv, enum ieee80211_band band, u16 channel); 1266 const struct iwl_priv *priv, enum ieee80211_band band, u16 channel);
1265 1267
1266/* Requires full declaration of iwl_priv before including */ 1268/* Requires full declaration of iwl_priv before including */
1267#include "iwl-4965-io.h"
1268 1269
1269#endif /* __iwl4965_4965_h__ */ 1270#endif /* __iwl4965_4965_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl-csr.h b/drivers/net/wireless/iwlwifi/iwl-csr.h
index f0a2c8d180f0..12725796ea5f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-csr.h
+++ b/drivers/net/wireless/iwlwifi/iwl-csr.h
@@ -93,6 +93,7 @@
93#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c) 93#define CSR_UCODE_DRV_GP1_CLR (CSR_BASE+0x05c)
94#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060) 94#define CSR_UCODE_DRV_GP2 (CSR_BASE+0x060)
95#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100) 95#define CSR_GIO_CHICKEN_BITS (CSR_BASE+0x100)
96#define CSR_LED_REG (CSR_BASE+0x094)
96 97
97/* Analog phase-lock-loop configuration (3945 only) 98/* Analog phase-lock-loop configuration (3945 only)
98 * Set bit 24. */ 99 * Set bit 24. */
@@ -214,6 +215,11 @@
214#define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000) 215#define CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX (0x00800000)
215#define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000) 216#define CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER (0x20000000)
216 217
218/* LED */
219#define CSR_LED_BSM_CTRL_MSK (0xFFFFFFDF)
220#define CSR_LED_REG_TRUN_ON (0x78)
221#define CSR_LED_REG_TRUN_OFF (0x38)
222
217/*=== HBUS (Host-side Bus) ===*/ 223/*=== HBUS (Host-side Bus) ===*/
218#define HBUS_BASE (0x400) 224#define HBUS_BASE (0x400)
219/* 225/*
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index c659bd3bc346..b2cc552de738 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -36,7 +36,7 @@
36 36
37#include "iwl-4965.h" 37#include "iwl-4965.h"
38#include "iwl-debug.h" 38#include "iwl-debug.h"
39#include "iwl-4965-io.h" 39#include "iwl-io.h"
40 40
41 41
42/* create and remove of files */ 42/* create and remove of files */
@@ -141,9 +141,9 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
141 printk(KERN_DEBUG "offset is: 0x%x\tlen is: 0x%x\n", 141 printk(KERN_DEBUG "offset is: 0x%x\tlen is: 0x%x\n",
142 priv->dbgfs->sram_offset, priv->dbgfs->sram_len); 142 priv->dbgfs->sram_offset, priv->dbgfs->sram_len);
143 143
144 iwl4965_grab_nic_access(priv); 144 iwl_grab_nic_access(priv);
145 for (i = priv->dbgfs->sram_len; i > 0; i -= 4) { 145 for (i = priv->dbgfs->sram_len; i > 0; i -= 4) {
146 val = iwl4965_read_targ_mem(priv, priv->dbgfs->sram_offset + \ 146 val = iwl_read_targ_mem(priv, priv->dbgfs->sram_offset + \
147 priv->dbgfs->sram_len - i); 147 priv->dbgfs->sram_len - i);
148 if (i < 4) { 148 if (i < 4) {
149 switch (i) { 149 switch (i) {
@@ -161,7 +161,7 @@ static ssize_t iwl_dbgfs_sram_read(struct file *file,
161 pos += sprintf(buf+pos, "0x%08x ", val); 161 pos += sprintf(buf+pos, "0x%08x ", val);
162 } 162 }
163 pos += sprintf(buf+pos, "\n"); 163 pos += sprintf(buf+pos, "\n");
164 iwl4965_release_nic_access(priv); 164 iwl_release_nic_access(priv);
165 165
166 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos); 166 ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
167 return ret; 167 return ret;
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 72cad56fbd93..a07d5dcb7abc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -73,7 +73,7 @@
73#include "iwl-core.h" 73#include "iwl-core.h"
74#include "iwl-debug.h" 74#include "iwl-debug.h"
75#include "iwl-eeprom.h" 75#include "iwl-eeprom.h"
76#include "iwl-4965-io.h" 76#include "iwl-io.h"
77 77
78/************************** EEPROM BANDS **************************** 78/************************** EEPROM BANDS ****************************
79 * 79 *
@@ -144,7 +144,7 @@ static const u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
144 144
145int iwlcore_eeprom_verify_signature(struct iwl_priv *priv) 145int iwlcore_eeprom_verify_signature(struct iwl_priv *priv)
146{ 146{
147 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP); 147 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
148 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) { 148 if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
149 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp); 149 IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
150 return -ENOENT; 150 return -ENOENT;
@@ -166,14 +166,14 @@ int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv)
166 166
167 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) { 167 for (count = 0; count < EEPROM_SEM_RETRY_LIMIT; count++) {
168 /* Request semaphore */ 168 /* Request semaphore */
169 iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG, 169 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
170 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 170 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
171 171
172 /* See if we got it */ 172 /* See if we got it */
173 ret = iwl4965_poll_bit(priv, CSR_HW_IF_CONFIG_REG, 173 ret = iwl_poll_bit(priv, CSR_HW_IF_CONFIG_REG,
174 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 174 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
175 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM, 175 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM,
176 EEPROM_SEM_TIMEOUT); 176 EEPROM_SEM_TIMEOUT);
177 if (ret >= 0) { 177 if (ret >= 0) {
178 IWL_DEBUG_IO("Acquired semaphore after %d tries.\n", 178 IWL_DEBUG_IO("Acquired semaphore after %d tries.\n",
179 count+1); 179 count+1);
@@ -187,7 +187,7 @@ EXPORT_SYMBOL(iwlcore_eeprom_acquire_semaphore);
187 187
188void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv) 188void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv)
189{ 189{
190 iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG, 190 iwl_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
191 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM); 191 CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
192 192
193} 193}
@@ -204,7 +204,7 @@ EXPORT_SYMBOL(iwlcore_eeprom_release_semaphore);
204int iwl_eeprom_init(struct iwl_priv *priv) 204int iwl_eeprom_init(struct iwl_priv *priv)
205{ 205{
206 u16 *e = (u16 *)&priv->eeprom; 206 u16 *e = (u16 *)&priv->eeprom;
207 u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP); 207 u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
208 u32 r; 208 u32 r;
209 int sz = sizeof(priv->eeprom); 209 int sz = sizeof(priv->eeprom);
210 int ret; 210 int ret;
@@ -231,12 +231,12 @@ int iwl_eeprom_init(struct iwl_priv *priv)
231 231
232 /* eeprom is an array of 16bit values */ 232 /* eeprom is an array of 16bit values */
233 for (addr = 0; addr < sz; addr += sizeof(u16)) { 233 for (addr = 0; addr < sz; addr += sizeof(u16)) {
234 _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1); 234 _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
235 _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD); 235 _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
236 236
237 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT; 237 for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
238 i += IWL_EEPROM_ACCESS_DELAY) { 238 i += IWL_EEPROM_ACCESS_DELAY) {
239 r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG); 239 r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
240 if (r & CSR_EEPROM_REG_READ_VALID_MSK) 240 if (r & CSR_EEPROM_REG_READ_VALID_MSK)
241 break; 241 break;
242 udelay(IWL_EEPROM_ACCESS_DELAY); 242 udelay(IWL_EEPROM_ACCESS_DELAY);
diff --git a/drivers/net/wireless/iwlwifi/iwl-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
index 559ff739961e..51c9949633e3 100644
--- a/drivers/net/wireless/iwlwifi/iwl-hcmd.c
+++ b/drivers/net/wireless/iwlwifi/iwl-hcmd.c
@@ -97,6 +97,31 @@ EXPORT_SYMBOL(get_cmd_string);
97 97
98#define HOST_COMPLETE_TIMEOUT (HZ / 2) 98#define HOST_COMPLETE_TIMEOUT (HZ / 2)
99 99
100static int iwl_generic_cmd_callback(struct iwl_priv *priv,
101 struct iwl_cmd *cmd, struct sk_buff *skb)
102{
103 struct iwl4965_rx_packet *pkt = NULL;
104
105 if (!skb) {
106 IWL_ERROR("Error: Response NULL in %s.\n",
107 get_cmd_string(cmd->hdr.cmd));
108 return 1;
109 }
110
111 pkt = (struct iwl4965_rx_packet *)skb->data;
112 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
113 IWL_ERROR("Bad return from %s (0x%08X)\n",
114 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
115 return 1;
116 }
117
118 IWL_DEBUG_HC("back from %s (0x%08X)\n",
119 get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
120
121 /* Let iwl_tx_complete free the response skb */
122 return 1;
123}
124
100static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd) 125static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
101{ 126{
102 int ret; 127 int ret;
@@ -106,8 +131,9 @@ static int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
106 /* An asynchronous command can not expect an SKB to be set. */ 131 /* An asynchronous command can not expect an SKB to be set. */
107 BUG_ON(cmd->meta.flags & CMD_WANT_SKB); 132 BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
108 133
109 /* An asynchronous command MUST have a callback. */ 134 /* Assign a generic callback if one is not provided */
110 BUG_ON(!cmd->meta.u.callback); 135 if (!cmd->meta.u.callback)
136 cmd->meta.u.callback = iwl_generic_cmd_callback;
111 137
112 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 138 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
113 return -EBUSY; 139 return -EBUSY;
diff --git a/drivers/net/wireless/iwlwifi/iwl-io.h b/drivers/net/wireless/iwlwifi/iwl-io.h
new file mode 100644
index 000000000000..5bc3df432d2d
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-io.h
@@ -0,0 +1,429 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
19 *
20 * The full GNU General Public License is included in this distribution in the
21 * file called LICENSE.
22 *
23 * Contact Information:
24 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
25 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 *
27 *****************************************************************************/
28
29#ifndef __iwl_io_h__
30#define __iwl_io_h__
31
32#include <linux/io.h>
33
34#include "iwl-debug.h"
35
36/*
37 * IO, register, and NIC memory access functions
38 *
39 * NOTE on naming convention and macro usage for these
40 *
41 * A single _ prefix before a an access function means that no state
42 * check or debug information is printed when that function is called.
43 *
44 * A double __ prefix before an access function means that state is checked
45 * and the current line number and caller function name are printed in addition
46 * to any other debug output.
47 *
48 * The non-prefixed name is the #define that maps the caller into a
49 * #define that provides the caller's name and __LINE__ to the double
50 * prefix version.
51 *
52 * If you wish to call the function without any debug or state checking,
53 * you should use the single _ prefix version (as is used by dependent IO
54 * routines, for example _iwl_read_direct32 calls the non-check version of
55 * _iwl_read32.)
56 *
57 * These declarations are *extremely* useful in quickly isolating code deltas
58 * which result in misconfiguring of the hardware I/O. In combination with
59 * git-bisect and the IO debug level you can quickly determine the specific
60 * commit which breaks the IO sequence to the hardware.
61 *
62 */
63
64#define _iwl_write32(priv, ofs, val) writel((val), (priv)->hw_base + (ofs))
65#ifdef CONFIG_IWLWIFI_DEBUG
66static inline void __iwl_write32(const char *f, u32 l, struct iwl_priv *priv,
67 u32 ofs, u32 val)
68{
69 IWL_DEBUG_IO("write32(0x%08X, 0x%08X) - %s %d\n", ofs, val, f, l);
70 _iwl_write32(priv, ofs, val);
71}
72#define iwl_write32(priv, ofs, val) \
73 __iwl_write32(__FILE__, __LINE__, priv, ofs, val)
74#else
75#define iwl_write32(priv, ofs, val) _iwl_write32(priv, ofs, val)
76#endif
77
78#define _iwl_read32(priv, ofs) readl((priv)->hw_base + (ofs))
79#ifdef CONFIG_IWLWIFI_DEBUG
80static inline u32 __iwl_read32(char *f, u32 l, struct iwl_priv *priv, u32 ofs)
81{
82 IWL_DEBUG_IO("read_direct32(0x%08X) - %s %d\n", ofs, f, l);
83 return _iwl_read32(priv, ofs);
84}
85#define iwl_read32(priv, ofs) __iwl_read32(__FILE__, __LINE__, priv, ofs)
86#else
87#define iwl_read32(p, o) _iwl_read32(p, o)
88#endif
89
90static inline int _iwl_poll_bit(struct iwl_priv *priv, u32 addr,
91 u32 bits, u32 mask, int timeout)
92{
93 int i = 0;
94
95 do {
96 if ((_iwl_read32(priv, addr) & mask) == (bits & mask))
97 return i;
98 mdelay(10);
99 i += 10;
100 } while (i < timeout);
101
102 return -ETIMEDOUT;
103}
104#ifdef CONFIG_IWLWIFI_DEBUG
105static inline int __iwl_poll_bit(const char *f, u32 l,
106 struct iwl_priv *priv, u32 addr,
107 u32 bits, u32 mask, int timeout)
108{
109 int ret = _iwl_poll_bit(priv, addr, bits, mask, timeout);
110 IWL_DEBUG_IO("poll_bit(0x%08X, 0x%08X, 0x%08X) - %s- %s %d\n",
111 addr, bits, mask,
112 unlikely(ret == -ETIMEDOUT)?"timeout":"", f, l);
113 return ret;
114}
115#define iwl_poll_bit(priv, addr, bits, mask, timeout) \
116 __iwl_poll_bit(__FILE__, __LINE__, priv, addr, bits, mask, timeout)
117#else
118#define iwl_poll_bit(p, a, b, m, t) _iwl_poll_bit(p, a, b, m, t)
119#endif
120
121static inline void _iwl_set_bit(struct iwl_priv *priv, u32 reg, u32 mask)
122{
123 _iwl_write32(priv, reg, _iwl_read32(priv, reg) | mask);
124}
125#ifdef CONFIG_IWLWIFI_DEBUG
126static inline void __iwl_set_bit(const char *f, u32 l,
127 struct iwl_priv *priv, u32 reg, u32 mask)
128{
129 u32 val = _iwl_read32(priv, reg) | mask;
130 IWL_DEBUG_IO("set_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
131 _iwl_write32(priv, reg, val);
132}
133#define iwl_set_bit(p, r, m) __iwl_set_bit(__FILE__, __LINE__, p, r, m)
134#else
135#define iwl_set_bit(p, r, m) _iwl_set_bit(p, r, m)
136#endif
137
138static inline void _iwl_clear_bit(struct iwl_priv *priv, u32 reg, u32 mask)
139{
140 _iwl_write32(priv, reg, _iwl_read32(priv, reg) & ~mask);
141}
142#ifdef CONFIG_IWLWIFI_DEBUG
143static inline void __iwl_clear_bit(const char *f, u32 l,
144 struct iwl_priv *priv, u32 reg, u32 mask)
145{
146 u32 val = _iwl_read32(priv, reg) & ~mask;
147 IWL_DEBUG_IO("clear_bit(0x%08X, 0x%08X) = 0x%08X\n", reg, mask, val);
148 _iwl_write32(priv, reg, val);
149}
150#define iwl_clear_bit(p, r, m) __iwl_clear_bit(__FILE__, __LINE__, p, r, m)
151#else
152#define iwl_clear_bit(p, r, m) _iwl_clear_bit(p, r, m)
153#endif
154
155static inline int _iwl_grab_nic_access(struct iwl_priv *priv)
156{
157 int ret;
158 u32 gp_ctl;
159
160#ifdef CONFIG_IWLWIFI_DEBUG
161 if (atomic_read(&priv->restrict_refcnt))
162 return 0;
163#endif
164 if (test_bit(STATUS_RF_KILL_HW, &priv->status) ||
165 test_bit(STATUS_RF_KILL_SW, &priv->status)) {
166 IWL_WARNING("WARNING: Requesting MAC access during RFKILL "
167 "wakes up NIC\n");
168
169 /* 10 msec allows time for NIC to complete its data save */
170 gp_ctl = _iwl_read32(priv, CSR_GP_CNTRL);
171 if (gp_ctl & CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY) {
172 IWL_DEBUG_RF_KILL("Wait for complete power-down, "
173 "gpctl = 0x%08x\n", gp_ctl);
174 mdelay(10);
175 } else
176 IWL_DEBUG_RF_KILL("power-down complete, "
177 "gpctl = 0x%08x\n", gp_ctl);
178 }
179
180 /* this bit wakes up the NIC */
181 _iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
182 ret = _iwl_poll_bit(priv, CSR_GP_CNTRL,
183 CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
184 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
185 CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 50);
186 if (ret < 0) {
187 IWL_ERROR("MAC is in deep sleep!\n");
188 return -EIO;
189 }
190
191#ifdef CONFIG_IWLWIFI_DEBUG
192 atomic_inc(&priv->restrict_refcnt);
193#endif
194 return 0;
195}
196
197#ifdef CONFIG_IWLWIFI_DEBUG
198static inline int __iwl_grab_nic_access(const char *f, u32 l,
199 struct iwl_priv *priv)
200{
201 if (atomic_read(&priv->restrict_refcnt))
202 IWL_ERROR("Grabbing access while already held %s %d.\n", f, l);
203
204 IWL_DEBUG_IO("grabbing nic access - %s %d\n", f, l);
205 return _iwl_grab_nic_access(priv);
206}
207#define iwl_grab_nic_access(priv) \
208 __iwl_grab_nic_access(__FILE__, __LINE__, priv)
209#else
210#define iwl_grab_nic_access(priv) \
211 _iwl_grab_nic_access(priv)
212#endif
213
214static inline void _iwl_release_nic_access(struct iwl_priv *priv)
215{
216#ifdef CONFIG_IWLWIFI_DEBUG
217 if (atomic_dec_and_test(&priv->restrict_refcnt))
218#endif
219 _iwl_clear_bit(priv, CSR_GP_CNTRL,
220 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
221}
222#ifdef CONFIG_IWLWIFI_DEBUG
223static inline void __iwl_release_nic_access(const char *f, u32 l,
224 struct iwl_priv *priv)
225{
226 if (atomic_read(&priv->restrict_refcnt) <= 0)
227 IWL_ERROR("Release unheld nic access at line %s %d.\n", f, l);
228
229 IWL_DEBUG_IO("releasing nic access - %s %d\n", f, l);
230 _iwl_release_nic_access(priv);
231}
232#define iwl_release_nic_access(priv) \
233 __iwl_release_nic_access(__FILE__, __LINE__, priv)
234#else
235#define iwl_release_nic_access(priv) \
236 _iwl_release_nic_access(priv)
237#endif
238
239static inline u32 _iwl_read_direct32(struct iwl_priv *priv, u32 reg)
240{
241 return _iwl_read32(priv, reg);
242}
243#ifdef CONFIG_IWLWIFI_DEBUG
244static inline u32 __iwl_read_direct32(const char *f, u32 l,
245 struct iwl_priv *priv, u32 reg)
246{
247 u32 value = _iwl_read_direct32(priv, reg);
248 if (!atomic_read(&priv->restrict_refcnt))
249 IWL_ERROR("Nic access not held from %s %d\n", f, l);
250 IWL_DEBUG_IO("read_direct32(0x%4X) = 0x%08x - %s %d \n", reg, value,
251 f, l);
252 return value;
253}
254#define iwl_read_direct32(priv, reg) \
255 __iwl_read_direct32(__FILE__, __LINE__, priv, reg)
256#else
257#define iwl_read_direct32 _iwl_read_direct32
258#endif
259
260static inline void _iwl_write_direct32(struct iwl_priv *priv,
261 u32 reg, u32 value)
262{
263 _iwl_write32(priv, reg, value);
264}
265#ifdef CONFIG_IWLWIFI_DEBUG
266static void __iwl_write_direct32(const char *f , u32 line,
267 struct iwl_priv *priv, u32 reg, u32 value)
268{
269 if (!atomic_read(&priv->restrict_refcnt))
270 IWL_ERROR("Nic access not held from %s line %d\n", f, line);
271 _iwl_write_direct32(priv, reg, value);
272}
273#define iwl_write_direct32(priv, reg, value) \
274 __iwl_write_direct32(__func__, __LINE__, priv, reg, value)
275#else
276#define iwl_write_direct32 _iwl_write_direct32
277#endif
278
279static inline void iwl_write_reg_buf(struct iwl_priv *priv,
280 u32 reg, u32 len, u32 *values)
281{
282 u32 count = sizeof(u32);
283
284 if ((priv != NULL) && (values != NULL)) {
285 for (; 0 < len; len -= count, reg += count, values++)
286 _iwl_write_direct32(priv, reg, *values);
287 }
288}
289
290static inline int _iwl_poll_direct_bit(struct iwl_priv *priv,
291 u32 addr, u32 mask, int timeout)
292{
293 int i = 0;
294
295 do {
296 if ((_iwl_read_direct32(priv, addr) & mask) == mask)
297 return i;
298 mdelay(10);
299 i += 10;
300 } while (i < timeout);
301
302 return -ETIMEDOUT;
303}
304
305#ifdef CONFIG_IWLWIFI_DEBUG
306static inline int __iwl_poll_direct_bit(const char *f, u32 l,
307 struct iwl_priv *priv,
308 u32 addr, u32 mask, int timeout)
309{
310 int ret = _iwl_poll_direct_bit(priv, addr, mask, timeout);
311
312 if (unlikely(ret == -ETIMEDOUT))
313 IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) - "
314 "timedout - %s %d\n", addr, mask, f, l);
315 else
316 IWL_DEBUG_IO("poll_direct_bit(0x%08X, 0x%08X) = 0x%08X "
317 "- %s %d\n", addr, mask, ret, f, l);
318 return ret;
319}
320#define iwl_poll_direct_bit(priv, addr, mask, timeout) \
321 __iwl_poll_direct_bit(__FILE__, __LINE__, priv, addr, mask, timeout)
322#else
323#define iwl_poll_direct_bit _iwl_poll_direct_bit
324#endif
325
326static inline u32 _iwl_read_prph(struct iwl_priv *priv, u32 reg)
327{
328 _iwl_write_direct32(priv, HBUS_TARG_PRPH_RADDR, reg | (3 << 24));
329 return _iwl_read_direct32(priv, HBUS_TARG_PRPH_RDAT);
330}
331#ifdef CONFIG_IWLWIFI_DEBUG
332static inline u32 __iwl_read_prph(const char *f, u32 line,
333 struct iwl_priv *priv, u32 reg)
334{
335 if (!atomic_read(&priv->restrict_refcnt))
336 IWL_ERROR("Nic access not held from %s line %d\n", f, line);
337 return _iwl_read_prph(priv, reg);
338}
339
340#define iwl_read_prph(priv, reg) \
341 __iwl_read_prph(__func__, __LINE__, priv, reg)
342#else
343#define iwl_read_prph _iwl_read_prph
344#endif
345
346static inline void _iwl_write_prph(struct iwl_priv *priv,
347 u32 addr, u32 val)
348{
349 _iwl_write_direct32(priv, HBUS_TARG_PRPH_WADDR,
350 ((addr & 0x0000FFFF) | (3 << 24)));
351 _iwl_write_direct32(priv, HBUS_TARG_PRPH_WDAT, val);
352}
353#ifdef CONFIG_IWLWIFI_DEBUG
354static inline void __iwl_write_prph(const char *f, u32 line,
355 struct iwl_priv *priv, u32 addr, u32 val)
356{
357 if (!atomic_read(&priv->restrict_refcnt))
358 IWL_ERROR("Nic access not held from %s line %d\n", f, line);
359 _iwl_write_prph(priv, addr, val);
360}
361
362#define iwl_write_prph(priv, addr, val) \
363 __iwl_write_prph(__func__, __LINE__, priv, addr, val);
364#else
365#define iwl_write_prph _iwl_write_prph
366#endif
367
368#define _iwl_set_bits_prph(priv, reg, mask) \
369 _iwl_write_prph(priv, reg, (_iwl_read_prph(priv, reg) | mask))
370#ifdef CONFIG_IWLWIFI_DEBUG
371static inline void __iwl_set_bits_prph(const char *f, u32 line,
372 struct iwl_priv *priv,
373 u32 reg, u32 mask)
374{
375 if (!atomic_read(&priv->restrict_refcnt))
376 IWL_ERROR("Nic access not held from %s line %d\n", f, line);
377
378 _iwl_set_bits_prph(priv, reg, mask);
379}
380#define iwl_set_bits_prph(priv, reg, mask) \
381 __iwl_set_bits_prph(__func__, __LINE__, priv, reg, mask)
382#else
383#define iwl_set_bits_prph _iwl_set_bits_prph
384#endif
385
386#define _iwl_set_bits_mask_prph(priv, reg, bits, mask) \
387 _iwl_write_prph(priv, reg, ((_iwl_read_prph(priv, reg) & mask) | bits))
388
389#ifdef CONFIG_IWLWIFI_DEBUG
390static inline void __iwl_set_bits_mask_prph(const char *f, u32 line,
391 struct iwl_priv *priv, u32 reg, u32 bits, u32 mask)
392{
393 if (!atomic_read(&priv->restrict_refcnt))
394 IWL_ERROR("Nic access not held from %s line %d\n", f, line);
395 _iwl_set_bits_mask_prph(priv, reg, bits, mask);
396}
397#define iwl_set_bits_mask_prph(priv, reg, bits, mask) \
398 __iwl_set_bits_mask_prph(__func__, __LINE__, priv, reg, bits, mask)
399#else
400#define iwl_set_bits_mask_prph _iwl_set_bits_mask_prph
401#endif
402
403static inline void iwl_clear_bits_prph(struct iwl_priv
404 *priv, u32 reg, u32 mask)
405{
406 u32 val = _iwl_read_prph(priv, reg);
407 _iwl_write_prph(priv, reg, (val & ~mask));
408}
409
410static inline u32 iwl_read_targ_mem(struct iwl_priv *priv, u32 addr)
411{
412 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, addr);
413 return iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
414}
415
416static inline void iwl_write_targ_mem(struct iwl_priv *priv, u32 addr, u32 val)
417{
418 iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
419 iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, val);
420}
421
422static inline void iwl_write_targ_mem_buf(struct iwl_priv *priv, u32 addr,
423 u32 len, u32 *values)
424{
425 iwl_write_direct32(priv, HBUS_TARG_MEM_WADDR, addr);
426 for (; 0 < len; len -= sizeof(u32), values++)
427 iwl_write_direct32(priv, HBUS_TARG_MEM_WDAT, *values);
428}
429#endif
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.c b/drivers/net/wireless/iwlwifi/iwl-led.c
new file mode 100644
index 000000000000..d59ad1844e25
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-led.c
@@ -0,0 +1,447 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/version.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/dma-mapping.h>
34#include <linux/delay.h>
35#include <linux/skbuff.h>
36#include <linux/netdevice.h>
37#include <linux/wireless.h>
38#include <net/mac80211.h>
39#include <linux/etherdevice.h>
40#include <asm/unaligned.h>
41
42#include "iwl-4965.h"
43#include "iwl-io.h"
44#include "iwl-core.h"
45#include "iwl-helpers.h"
46
47#define IWL_1MB_RATE (128 * 1024)
48#define IWL_LED_THRESHOLD (16)
49#define IWL_MAX_BLINK_TBL (10)
50
51static const struct {
52 u16 tpt;
53 u8 on_time;
54 u8 of_time;
55} blink_tbl[] =
56{
57 {300, 25, 25},
58 {200, 40, 40},
59 {100, 55, 55},
60 {70, 65, 65},
61 {50, 75, 75},
62 {20, 85, 85},
63 {15, 95, 95 },
64 {10, 110, 110},
65 {5, 130, 130},
66 {0, 167, 167}
67};
68
69static int iwl_led_cmd_callback(struct iwl_priv *priv,
70 struct iwl_cmd *cmd, struct sk_buff *skb)
71{
72 return 1;
73}
74
75
76/* Send led command */
77static int iwl_send_led_cmd(struct iwl_priv *priv,
78 struct iwl4965_led_cmd *led_cmd)
79{
80 struct iwl_host_cmd cmd = {
81 .id = REPLY_LEDS_CMD,
82 .len = sizeof(struct iwl4965_led_cmd),
83 .data = led_cmd,
84 .meta.flags = CMD_ASYNC,
85 .meta.u.callback = iwl_led_cmd_callback
86 };
87 u32 reg;
88
89 reg = iwl_read32(priv, CSR_LED_REG);
90 if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
91 iwl_write32(priv, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
92
93 return iwl_send_cmd(priv, &cmd);
94}
95
96
97/* Set led on command */
98static int iwl4965_led_on(struct iwl_priv *priv, int led_id)
99{
100 struct iwl4965_led_cmd led_cmd = {
101 .id = led_id,
102 .on = IWL_LED_SOLID,
103 .off = 0,
104 .interval = IWL_DEF_LED_INTRVL
105 };
106 return iwl_send_led_cmd(priv, &led_cmd);
107}
108
109/* Set led on command */
110static int iwl4965_led_pattern(struct iwl_priv *priv, int led_id,
111 enum led_brightness brightness)
112{
113 struct iwl4965_led_cmd led_cmd = {
114 .id = led_id,
115 .on = brightness,
116 .off = brightness,
117 .interval = IWL_DEF_LED_INTRVL
118 };
119 if (brightness == LED_FULL) {
120 led_cmd.on = IWL_LED_SOLID;
121 led_cmd.off = 0;
122 }
123 return iwl_send_led_cmd(priv, &led_cmd);
124}
125
126/* Set led register off */
127static int iwl4965_led_on_reg(struct iwl_priv *priv, int led_id)
128{
129 IWL_DEBUG_LED("led on %d\n", led_id);
130 iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
131 return 0;
132}
133
134#if 0
135/* Set led off command */
136int iwl4965_led_off(struct iwl_priv *priv, int led_id)
137{
138 struct iwl4965_led_cmd led_cmd = {
139 .id = led_id,
140 .on = 0,
141 .off = 0,
142 .interval = IWL_DEF_LED_INTRVL
143 };
144 IWL_DEBUG_LED("led off %d\n", led_id);
145 return iwl_send_led_cmd(priv, &led_cmd);
146}
147#endif
148
149
150/* Set led register off */
151static int iwl4965_led_off_reg(struct iwl_priv *priv, int led_id)
152{
153 IWL_DEBUG_LED("radio off\n");
154 iwl_write32(priv, CSR_LED_REG, CSR_LED_REG_TRUN_OFF);
155 return 0;
156}
157
158/* Set led blink command */
159static int iwl4965_led_not_solid(struct iwl_priv *priv, int led_id,
160 u8 brightness)
161{
162 struct iwl4965_led_cmd led_cmd = {
163 .id = led_id,
164 .on = brightness,
165 .off = brightness,
166 .interval = IWL_DEF_LED_INTRVL
167 };
168
169 return iwl_send_led_cmd(priv, &led_cmd);
170}
171
172
173/*
174 * brightness call back function for Tx/Rx LED
175 */
176static int iwl4965_led_associated(struct iwl_priv *priv, int led_id)
177{
178 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
179 !test_bit(STATUS_READY, &priv->status))
180 return 0;
181
182
183 /* start counting Tx/Rx bytes */
184 if (!priv->last_blink_time && priv->allow_blinking)
185 priv->last_blink_time = jiffies;
186 return 0;
187}
188
189/*
190 * brightness call back for association and radio
191 */
192static void iwl4965_led_brightness_set(struct led_classdev *led_cdev,
193 enum led_brightness brightness)
194{
195 struct iwl4965_led *led = container_of(led_cdev,
196 struct iwl4965_led, led_dev);
197 struct iwl_priv *priv = led->priv;
198
199 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
200 return;
201
202 switch (brightness) {
203 case LED_FULL:
204 if (led->type == IWL_LED_TRG_ASSOC)
205 priv->allow_blinking = 1;
206
207 if (led->led_on)
208 led->led_on(priv, IWL_LED_LINK);
209 break;
210 case LED_OFF:
211 if (led->type == IWL_LED_TRG_ASSOC)
212 priv->allow_blinking = 0;
213
214 if (led->led_off)
215 led->led_off(priv, IWL_LED_LINK);
216 break;
217 default:
218 if (led->led_pattern)
219 led->led_pattern(priv, IWL_LED_LINK, brightness);
220 break;
221 }
222}
223
224
225
226/*
227 * Register led class with the system
228 */
229static int iwl_leds_register_led(struct iwl_priv *priv,
230 struct iwl4965_led *led,
231 enum led_type type, u8 set_led,
232 const char *name, char *trigger)
233{
234 struct device *device = wiphy_dev(priv->hw->wiphy);
235 int ret;
236
237 led->led_dev.name = name;
238 led->led_dev.brightness_set = iwl4965_led_brightness_set;
239 led->led_dev.default_trigger = trigger;
240
241 ret = led_classdev_register(device, &led->led_dev);
242 if (ret) {
243 IWL_ERROR("Error: failed to register led handler.\n");
244 return ret;
245 }
246
247 led->priv = priv;
248 led->type = type;
249 led->registered = 1;
250
251 if (set_led && led->led_on)
252 led->led_on(priv, IWL_LED_LINK);
253 return 0;
254}
255
256
257/*
258 * calculate blink rate according to last 2 sec Tx/Rx activities
259 */
260static inline u8 get_blink_rate(struct iwl_priv *priv)
261{
262 int i;
263 u8 blink_rate;
264 u64 current_tpt = priv->tx_stats[2].bytes + priv->rx_stats[2].bytes;
265 s64 tpt = current_tpt - priv->led_tpt;
266
267 if (tpt < 0) /* wrapparound */
268 tpt = -tpt;
269
270 priv->led_tpt = current_tpt;
271
272 if (tpt < IWL_LED_THRESHOLD) {
273 i = IWL_MAX_BLINK_TBL;
274 } else {
275 for (i = 0; i < IWL_MAX_BLINK_TBL; i++)
276 if (tpt > (blink_tbl[i].tpt * IWL_1MB_RATE))
277 break;
278 }
279 /* if 0 frame is transfered */
280 if ((i == IWL_MAX_BLINK_TBL) || !priv->allow_blinking)
281 blink_rate = IWL_LED_SOLID;
282 else
283 blink_rate = blink_tbl[i].on_time;
284
285 return blink_rate;
286}
287
288static inline int is_rf_kill(struct iwl_priv *priv)
289{
290 return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
291 test_bit(STATUS_RF_KILL_SW, &priv->status);
292}
293
294/*
295 * this function called from handler. Since setting Led command can
296 * happen very frequent we postpone led command to be called from
297 * REPLY handler so we know ucode is up
298 */
299void iwl_leds_background(struct iwl_priv *priv)
300{
301 u8 blink_rate;
302
303 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
304 priv->last_blink_time = 0;
305 return;
306 }
307 if (is_rf_kill(priv)) {
308 priv->last_blink_time = 0;
309 return;
310 }
311
312 if (!priv->allow_blinking) {
313 priv->last_blink_time = 0;
314 if (priv->last_blink_rate != IWL_LED_SOLID) {
315 priv->last_blink_rate = IWL_LED_SOLID;
316 iwl4965_led_on(priv, IWL_LED_LINK);
317 }
318 return;
319 }
320 if (!priv->last_blink_time ||
321 !time_after(jiffies, priv->last_blink_time +
322 msecs_to_jiffies(1000)))
323 return;
324
325 blink_rate = get_blink_rate(priv);
326
327 /* call only if blink rate change */
328 if (blink_rate != priv->last_blink_rate) {
329 if (blink_rate != IWL_LED_SOLID) {
330 priv->last_blink_time = jiffies +
331 msecs_to_jiffies(1000);
332 iwl4965_led_not_solid(priv, IWL_LED_LINK, blink_rate);
333 } else {
334 priv->last_blink_time = 0;
335 iwl4965_led_on(priv, IWL_LED_LINK);
336 }
337 }
338
339 priv->last_blink_rate = blink_rate;
340}
341EXPORT_SYMBOL(iwl_leds_background);
342
343/* Register all led handler */
344int iwl_leds_register(struct iwl_priv *priv)
345{
346 char *trigger;
347 char name[32];
348 int ret;
349
350 priv->last_blink_rate = 0;
351 priv->led_tpt = 0;
352 priv->last_blink_time = 0;
353 priv->allow_blinking = 0;
354
355 trigger = ieee80211_get_radio_led_name(priv->hw);
356 snprintf(name, sizeof(name), "iwl-%s:radio",
357 wiphy_name(priv->hw->wiphy));
358
359 priv->led[IWL_LED_TRG_RADIO].led_on = iwl4965_led_on_reg;
360 priv->led[IWL_LED_TRG_RADIO].led_off = iwl4965_led_off_reg;
361 priv->led[IWL_LED_TRG_RADIO].led_pattern = NULL;
362
363 ret = iwl_leds_register_led(priv,
364 &priv->led[IWL_LED_TRG_RADIO],
365 IWL_LED_TRG_RADIO, 1,
366 name, trigger);
367 if (ret)
368 goto exit_fail;
369
370 trigger = ieee80211_get_assoc_led_name(priv->hw);
371 snprintf(name, sizeof(name), "iwl-%s:assoc",
372 wiphy_name(priv->hw->wiphy));
373
374 ret = iwl_leds_register_led(priv,
375 &priv->led[IWL_LED_TRG_ASSOC],
376 IWL_LED_TRG_ASSOC, 0,
377 name, trigger);
378 /* for assoc always turn led on */
379 priv->led[IWL_LED_TRG_ASSOC].led_on = iwl4965_led_on_reg;
380 priv->led[IWL_LED_TRG_ASSOC].led_off = iwl4965_led_on_reg;
381 priv->led[IWL_LED_TRG_ASSOC].led_pattern = NULL;
382
383 if (ret)
384 goto exit_fail;
385
386 trigger = ieee80211_get_rx_led_name(priv->hw);
387 snprintf(name, sizeof(name), "iwl-%s:RX",
388 wiphy_name(priv->hw->wiphy));
389
390
391 ret = iwl_leds_register_led(priv,
392 &priv->led[IWL_LED_TRG_RX],
393 IWL_LED_TRG_RX, 0,
394 name, trigger);
395
396 priv->led[IWL_LED_TRG_RX].led_on = iwl4965_led_associated;
397 priv->led[IWL_LED_TRG_RX].led_off = iwl4965_led_associated;
398 priv->led[IWL_LED_TRG_RX].led_pattern = iwl4965_led_pattern;
399
400 if (ret)
401 goto exit_fail;
402
403 trigger = ieee80211_get_tx_led_name(priv->hw);
404 snprintf(name, sizeof(name), "iwl-%s:TX",
405 wiphy_name(priv->hw->wiphy));
406 ret = iwl_leds_register_led(priv,
407 &priv->led[IWL_LED_TRG_TX],
408 IWL_LED_TRG_TX, 0,
409 name, trigger);
410 priv->led[IWL_LED_TRG_TX].led_on = iwl4965_led_associated;
411 priv->led[IWL_LED_TRG_TX].led_off = iwl4965_led_associated;
412 priv->led[IWL_LED_TRG_TX].led_pattern = iwl4965_led_pattern;
413
414 if (ret)
415 goto exit_fail;
416
417 return 0;
418
419exit_fail:
420 iwl_leds_unregister(priv);
421 return ret;
422}
423EXPORT_SYMBOL(iwl_leds_register);
424
425/* unregister led class */
426static void iwl_leds_unregister_led(struct iwl4965_led *led, u8 set_led)
427{
428 if (!led->registered)
429 return;
430
431 led_classdev_unregister(&led->led_dev);
432
433 if (set_led)
434 led->led_dev.brightness_set(&led->led_dev, LED_OFF);
435 led->registered = 0;
436}
437
438/* Unregister all led handlers */
439void iwl_leds_unregister(struct iwl_priv *priv)
440{
441 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_ASSOC], 0);
442 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_RX], 0);
443 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_TX], 0);
444 iwl_leds_unregister_led(&priv->led[IWL_LED_TRG_RADIO], 1);
445}
446EXPORT_SYMBOL(iwl_leds_unregister);
447
diff --git a/drivers/net/wireless/iwlwifi/iwl-led.h b/drivers/net/wireless/iwlwifi/iwl-led.h
new file mode 100644
index 000000000000..5bb04128cd65
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-led.h
@@ -0,0 +1,82 @@
1/******************************************************************************
2 *
3 * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * James P. Ketrenos <ipw2100-admin@linux.intel.com>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
26
27#ifndef __iwl_leds_h__
28#define __iwl_leds_h__
29
30
31struct iwl_priv;
32
33#ifdef CONFIG_IWLWIFI_LEDS
34#include <linux/leds.h>
35
36#define IWL_LED_SOLID 11
37#define IWL_LED_NAME_LEN 31
38#define IWL_DEF_LED_INTRVL __constant_cpu_to_le32(1000)
39
40#define IWL_LED_ACTIVITY (0<<1)
41#define IWL_LED_LINK (1<<1)
42
43enum led_type {
44 IWL_LED_TRG_TX,
45 IWL_LED_TRG_RX,
46 IWL_LED_TRG_ASSOC,
47 IWL_LED_TRG_RADIO,
48 IWL_LED_TRG_MAX,
49};
50
51
52struct iwl4965_led {
53 struct iwl_priv *priv;
54 struct led_classdev led_dev;
55
56 int (*led_on) (struct iwl_priv *priv, int led_id);
57 int (*led_off) (struct iwl_priv *priv, int led_id);
58 int (*led_pattern) (struct iwl_priv *priv, int led_id,
59 enum led_brightness brightness);
60
61 enum led_type type;
62 unsigned int registered;
63};
64
65int iwl_leds_register(struct iwl_priv *priv);
66void iwl_leds_unregister(struct iwl_priv *priv);
67void iwl_leds_background(struct iwl_priv *priv);
68
69#else
70static inline int iwl_leds_register(struct iwl_priv *priv)
71{
72 return 0;
73}
74static inline void iwl_leds_unregister(struct iwl_priv *priv)
75{
76}
77static inline void iwl_leds_background(struct iwl_priv *priv)
78{
79}
80
81#endif /* CONFIG_IWLWIFI_LEDS */
82#endif /* __iwl_leds_h__ */
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index 093b863ef904..ce8a31103eee 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -2058,6 +2058,8 @@ int iwl3945_is_network_packet(struct iwl3945_priv *priv, struct ieee80211_hdr *h
2058 return !compare_ether_addr(header->addr2, priv->bssid); 2058 return !compare_ether_addr(header->addr2, priv->bssid);
2059 /* packets to our adapter go through */ 2059 /* packets to our adapter go through */
2060 return !compare_ether_addr(header->addr1, priv->mac_addr); 2060 return !compare_ether_addr(header->addr1, priv->mac_addr);
2061 default:
2062 return 1;
2061 } 2063 }
2062 2064
2063 return 1; 2065 return 1;
@@ -2302,6 +2304,9 @@ static void iwl3945_connection_init_rx_config(struct iwl3945_priv *priv)
2302 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | 2304 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2303 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; 2305 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2304 break; 2306 break;
2307 default:
2308 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2309 break;
2305 } 2310 }
2306 2311
2307#if 0 2312#if 0
@@ -2481,8 +2486,12 @@ static void iwl3945_build_tx_cmd_basic(struct iwl3945_priv *priv,
2481 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); 2486 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2482 else 2487 else
2483 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); 2488 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2484 } else 2489 } else {
2485 cmd->cmd.tx.timeout.pm_frame_timeout = 0; 2490 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2491#ifdef CONFIG_IWL3945_LEDS
2492 priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
2493#endif
2494 }
2486 2495
2487 cmd->cmd.tx.driver_txop = 0; 2496 cmd->cmd.tx.driver_txop = 0;
2488 cmd->cmd.tx.tx_flags = tx_flags; 2497 cmd->cmd.tx.tx_flags = tx_flags;
@@ -5136,8 +5145,12 @@ static int iwl3945_init_geos(struct iwl3945_priv *priv)
5136 priv->bands[IEEE80211_BAND_2GHZ].n_channels, 5145 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5137 priv->bands[IEEE80211_BAND_5GHZ].n_channels); 5146 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5138 5147
5139 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ]; 5148 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5140 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ]; 5149 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5150 &priv->bands[IEEE80211_BAND_2GHZ];
5151 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5152 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5153 &priv->bands[IEEE80211_BAND_5GHZ];
5141 5154
5142 set_bit(STATUS_GEO_CONFIGURED, &priv->status); 5155 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5143 5156
@@ -5851,6 +5864,8 @@ static void iwl3945_alive_start(struct iwl3945_priv *priv)
5851 IWL_DEBUG_INFO("ALIVE processing complete.\n"); 5864 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5852 wake_up_interruptible(&priv->wait_command_queue); 5865 wake_up_interruptible(&priv->wait_command_queue);
5853 5866
5867 iwl3945_led_register(priv);
5868
5854 if (priv->error_recovering) 5869 if (priv->error_recovering)
5855 iwl3945_error_recovery(priv); 5870 iwl3945_error_recovery(priv);
5856 5871
@@ -5875,6 +5890,7 @@ static void __iwl3945_down(struct iwl3945_priv *priv)
5875 if (!exit_pending) 5890 if (!exit_pending)
5876 set_bit(STATUS_EXIT_PENDING, &priv->status); 5891 set_bit(STATUS_EXIT_PENDING, &priv->status);
5877 5892
5893 iwl3945_led_unregister(priv);
5878 iwl3945_clear_stations_table(priv); 5894 iwl3945_clear_stations_table(priv);
5879 5895
5880 /* Unblock any waiting calls */ 5896 /* Unblock any waiting calls */
diff --git a/drivers/net/wireless/iwlwifi/iwl4965-base.c b/drivers/net/wireless/iwlwifi/iwl4965-base.c
index 44cfd0274976..e487432ef56e 100644
--- a/drivers/net/wireless/iwlwifi/iwl4965-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl4965-base.c
@@ -48,6 +48,7 @@
48#include "iwl-eeprom.h" 48#include "iwl-eeprom.h"
49#include "iwl-core.h" 49#include "iwl-core.h"
50#include "iwl-4965.h" 50#include "iwl-4965.h"
51#include "iwl-io.h"
51#include "iwl-helpers.h" 52#include "iwl-helpers.h"
52 53
53static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv, 54static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
@@ -1792,6 +1793,8 @@ int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *heade
1792 return !compare_ether_addr(header->addr2, priv->bssid); 1793 return !compare_ether_addr(header->addr2, priv->bssid);
1793 /* packets to our adapter go through */ 1794 /* packets to our adapter go through */
1794 return !compare_ether_addr(header->addr1, priv->mac_addr); 1795 return !compare_ether_addr(header->addr1, priv->mac_addr);
1796 default:
1797 break;
1795 } 1798 }
1796 1799
1797 return 1; 1800 return 1;
@@ -2053,6 +2056,9 @@ static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
2053 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK | 2056 priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
2054 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK; 2057 RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
2055 break; 2058 break;
2059 default:
2060 IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
2061 break;
2056 } 2062 }
2057 2063
2058#if 0 2064#if 0
@@ -2238,8 +2244,9 @@ static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
2238 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3); 2244 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
2239 else 2245 else
2240 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2); 2246 cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
2241 } else 2247 } else {
2242 cmd->cmd.tx.timeout.pm_frame_timeout = 0; 2248 cmd->cmd.tx.timeout.pm_frame_timeout = 0;
2249 }
2243 2250
2244 cmd->cmd.tx.driver_txop = 0; 2251 cmd->cmd.tx.driver_txop = 0;
2245 cmd->cmd.tx.tx_flags = tx_flags; 2252 cmd->cmd.tx.tx_flags = tx_flags;
@@ -2615,7 +2622,7 @@ static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2615 /* FIXME: This is a workaround for AP */ 2622 /* FIXME: This is a workaround for AP */
2616 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) { 2623 if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
2617 spin_lock_irqsave(&priv->lock, flags); 2624 spin_lock_irqsave(&priv->lock, flags);
2618 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, 2625 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
2619 CSR_UCODE_SW_BIT_RFKILL); 2626 CSR_UCODE_SW_BIT_RFKILL);
2620 spin_unlock_irqrestore(&priv->lock, flags); 2627 spin_unlock_irqrestore(&priv->lock, flags);
2621 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0); 2628 iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
@@ -2625,7 +2632,7 @@ static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2625 } 2632 }
2626 2633
2627 spin_lock_irqsave(&priv->lock, flags); 2634 spin_lock_irqsave(&priv->lock, flags);
2628 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2635 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2629 2636
2630 clear_bit(STATUS_RF_KILL_SW, &priv->status); 2637 clear_bit(STATUS_RF_KILL_SW, &priv->status);
2631 spin_unlock_irqrestore(&priv->lock, flags); 2638 spin_unlock_irqrestore(&priv->lock, flags);
@@ -2634,9 +2641,9 @@ static void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
2634 msleep(10); 2641 msleep(10);
2635 2642
2636 spin_lock_irqsave(&priv->lock, flags); 2643 spin_lock_irqsave(&priv->lock, flags);
2637 iwl4965_read32(priv, CSR_UCODE_DRV_GP1); 2644 iwl_read32(priv, CSR_UCODE_DRV_GP1);
2638 if (!iwl4965_grab_nic_access(priv)) 2645 if (!iwl_grab_nic_access(priv))
2639 iwl4965_release_nic_access(priv); 2646 iwl_release_nic_access(priv);
2640 spin_unlock_irqrestore(&priv->lock, flags); 2647 spin_unlock_irqrestore(&priv->lock, flags);
2641 2648
2642 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) { 2649 if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
@@ -3513,35 +3520,35 @@ static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
3513 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED | 3520 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
3514 RF_CARD_DISABLED)) { 3521 RF_CARD_DISABLED)) {
3515 3522
3516 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, 3523 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3517 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 3524 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3518 3525
3519 if (!iwl4965_grab_nic_access(priv)) { 3526 if (!iwl_grab_nic_access(priv)) {
3520 iwl4965_write_direct32( 3527 iwl_write_direct32(
3521 priv, HBUS_TARG_MBX_C, 3528 priv, HBUS_TARG_MBX_C,
3522 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 3529 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3523 3530
3524 iwl4965_release_nic_access(priv); 3531 iwl_release_nic_access(priv);
3525 } 3532 }
3526 3533
3527 if (!(flags & RXON_CARD_DISABLED)) { 3534 if (!(flags & RXON_CARD_DISABLED)) {
3528 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, 3535 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
3529 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 3536 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
3530 if (!iwl4965_grab_nic_access(priv)) { 3537 if (!iwl_grab_nic_access(priv)) {
3531 iwl4965_write_direct32( 3538 iwl_write_direct32(
3532 priv, HBUS_TARG_MBX_C, 3539 priv, HBUS_TARG_MBX_C,
3533 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED); 3540 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
3534 3541
3535 iwl4965_release_nic_access(priv); 3542 iwl_release_nic_access(priv);
3536 } 3543 }
3537 } 3544 }
3538 3545
3539 if (flags & RF_CARD_DISABLED) { 3546 if (flags & RF_CARD_DISABLED) {
3540 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET, 3547 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
3541 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT); 3548 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
3542 iwl4965_read32(priv, CSR_UCODE_DRV_GP1); 3549 iwl_read32(priv, CSR_UCODE_DRV_GP1);
3543 if (!iwl4965_grab_nic_access(priv)) 3550 if (!iwl_grab_nic_access(priv))
3544 iwl4965_release_nic_access(priv); 3551 iwl_release_nic_access(priv);
3545 } 3552 }
3546 } 3553 }
3547 3554
@@ -3755,27 +3762,27 @@ int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_q
3755 3762
3756 /* If power-saving is in use, make sure device is awake */ 3763 /* If power-saving is in use, make sure device is awake */
3757 if (test_bit(STATUS_POWER_PMI, &priv->status)) { 3764 if (test_bit(STATUS_POWER_PMI, &priv->status)) {
3758 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1); 3765 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
3759 3766
3760 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { 3767 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
3761 iwl4965_set_bit(priv, CSR_GP_CNTRL, 3768 iwl_set_bit(priv, CSR_GP_CNTRL,
3762 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 3769 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
3763 goto exit_unlock; 3770 goto exit_unlock;
3764 } 3771 }
3765 3772
3766 rc = iwl4965_grab_nic_access(priv); 3773 rc = iwl_grab_nic_access(priv);
3767 if (rc) 3774 if (rc)
3768 goto exit_unlock; 3775 goto exit_unlock;
3769 3776
3770 /* Device expects a multiple of 8 */ 3777 /* Device expects a multiple of 8 */
3771 iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR, 3778 iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
3772 q->write & ~0x7); 3779 q->write & ~0x7);
3773 iwl4965_release_nic_access(priv); 3780 iwl_release_nic_access(priv);
3774 3781
3775 /* Else device is assumed to be awake */ 3782 /* Else device is assumed to be awake */
3776 } else 3783 } else
3777 /* Device expects a multiple of 8 */ 3784 /* Device expects a multiple of 8 */
3778 iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7); 3785 iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
3779 3786
3780 3787
3781 q->need_update = 0; 3788 q->need_update = 0;
@@ -4212,27 +4219,27 @@ static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
4212 /* wake up nic if it's powered down ... 4219 /* wake up nic if it's powered down ...
4213 * uCode will wake up, and interrupt us again, so next 4220 * uCode will wake up, and interrupt us again, so next
4214 * time we'll skip this part. */ 4221 * time we'll skip this part. */
4215 reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1); 4222 reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
4216 4223
4217 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) { 4224 if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
4218 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg); 4225 IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
4219 iwl4965_set_bit(priv, CSR_GP_CNTRL, 4226 iwl_set_bit(priv, CSR_GP_CNTRL,
4220 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 4227 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
4221 return rc; 4228 return rc;
4222 } 4229 }
4223 4230
4224 /* restore this queue's parameters in nic hardware. */ 4231 /* restore this queue's parameters in nic hardware. */
4225 rc = iwl4965_grab_nic_access(priv); 4232 rc = iwl_grab_nic_access(priv);
4226 if (rc) 4233 if (rc)
4227 return rc; 4234 return rc;
4228 iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 4235 iwl_write_direct32(priv, HBUS_TARG_WRPTR,
4229 txq->q.write_ptr | (txq_id << 8)); 4236 txq->q.write_ptr | (txq_id << 8));
4230 iwl4965_release_nic_access(priv); 4237 iwl_release_nic_access(priv);
4231 4238
4232 /* else not in power-save mode, uCode will never sleep when we're 4239 /* else not in power-save mode, uCode will never sleep when we're
4233 * trying to tx (during RFKILL, we're not trying to tx). */ 4240 * trying to tx (during RFKILL, we're not trying to tx). */
4234 } else 4241 } else
4235 iwl4965_write32(priv, HBUS_TARG_WRPTR, 4242 iwl_write32(priv, HBUS_TARG_WRPTR,
4236 txq->q.write_ptr | (txq_id << 8)); 4243 txq->q.write_ptr | (txq_id << 8));
4237 4244
4238 txq->need_update = 0; 4245 txq->need_update = 0;
@@ -4267,7 +4274,7 @@ static void iwl4965_enable_interrupts(struct iwl_priv *priv)
4267{ 4274{
4268 IWL_DEBUG_ISR("Enabling interrupts\n"); 4275 IWL_DEBUG_ISR("Enabling interrupts\n");
4269 set_bit(STATUS_INT_ENABLED, &priv->status); 4276 set_bit(STATUS_INT_ENABLED, &priv->status);
4270 iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK); 4277 iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
4271} 4278}
4272 4279
4273static inline void iwl4965_disable_interrupts(struct iwl_priv *priv) 4280static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
@@ -4275,12 +4282,12 @@ static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
4275 clear_bit(STATUS_INT_ENABLED, &priv->status); 4282 clear_bit(STATUS_INT_ENABLED, &priv->status);
4276 4283
4277 /* disable interrupts from uCode/NIC to host */ 4284 /* disable interrupts from uCode/NIC to host */
4278 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000); 4285 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4279 4286
4280 /* acknowledge/clear/reset any interrupts still pending 4287 /* acknowledge/clear/reset any interrupts still pending
4281 * from uCode or flow handler (Rx/Tx DMA) */ 4288 * from uCode or flow handler (Rx/Tx DMA) */
4282 iwl4965_write32(priv, CSR_INT, 0xffffffff); 4289 iwl_write32(priv, CSR_INT, 0xffffffff);
4283 iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff); 4290 iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
4284 IWL_DEBUG_ISR("Disabled interrupts\n"); 4291 IWL_DEBUG_ISR("Disabled interrupts\n");
4285} 4292}
4286 4293
@@ -4321,28 +4328,28 @@ static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
4321 return; 4328 return;
4322 } 4329 }
4323 4330
4324 rc = iwl4965_grab_nic_access(priv); 4331 rc = iwl_grab_nic_access(priv);
4325 if (rc) { 4332 if (rc) {
4326 IWL_WARNING("Can not read from adapter at this time.\n"); 4333 IWL_WARNING("Can not read from adapter at this time.\n");
4327 return; 4334 return;
4328 } 4335 }
4329 4336
4330 count = iwl4965_read_targ_mem(priv, base); 4337 count = iwl_read_targ_mem(priv, base);
4331 4338
4332 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 4339 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
4333 IWL_ERROR("Start IWL Error Log Dump:\n"); 4340 IWL_ERROR("Start IWL Error Log Dump:\n");
4334 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count); 4341 IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
4335 } 4342 }
4336 4343
4337 desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32)); 4344 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
4338 blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32)); 4345 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
4339 blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32)); 4346 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
4340 ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32)); 4347 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
4341 ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32)); 4348 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
4342 data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32)); 4349 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
4343 data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32)); 4350 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
4344 line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32)); 4351 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
4345 time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32)); 4352 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
4346 4353
4347 IWL_ERROR("Desc Time " 4354 IWL_ERROR("Desc Time "
4348 "data1 data2 line\n"); 4355 "data1 data2 line\n");
@@ -4352,7 +4359,7 @@ static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
4352 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2, 4359 IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
4353 ilink1, ilink2); 4360 ilink1, ilink2);
4354 4361
4355 iwl4965_release_nic_access(priv); 4362 iwl_release_nic_access(priv);
4356} 4363}
4357 4364
4358#define EVENT_START_OFFSET (4 * sizeof(u32)) 4365#define EVENT_START_OFFSET (4 * sizeof(u32))
@@ -4360,7 +4367,7 @@ static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
4360/** 4367/**
4361 * iwl4965_print_event_log - Dump error event log to syslog 4368 * iwl4965_print_event_log - Dump error event log to syslog
4362 * 4369 *
4363 * NOTE: Must be called with iwl4965_grab_nic_access() already obtained! 4370 * NOTE: Must be called with iwl_grab_nic_access() already obtained!
4364 */ 4371 */
4365static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx, 4372static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
4366 u32 num_events, u32 mode) 4373 u32 num_events, u32 mode)
@@ -4386,14 +4393,14 @@ static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
4386 /* "time" is actually "data" for mode 0 (no timestamp). 4393 /* "time" is actually "data" for mode 0 (no timestamp).
4387 * place event id # at far right for easier visual parsing. */ 4394 * place event id # at far right for easier visual parsing. */
4388 for (i = 0; i < num_events; i++) { 4395 for (i = 0; i < num_events; i++) {
4389 ev = iwl4965_read_targ_mem(priv, ptr); 4396 ev = iwl_read_targ_mem(priv, ptr);
4390 ptr += sizeof(u32); 4397 ptr += sizeof(u32);
4391 time = iwl4965_read_targ_mem(priv, ptr); 4398 time = iwl_read_targ_mem(priv, ptr);
4392 ptr += sizeof(u32); 4399 ptr += sizeof(u32);
4393 if (mode == 0) 4400 if (mode == 0)
4394 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */ 4401 IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
4395 else { 4402 else {
4396 data = iwl4965_read_targ_mem(priv, ptr); 4403 data = iwl_read_targ_mem(priv, ptr);
4397 ptr += sizeof(u32); 4404 ptr += sizeof(u32);
4398 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev); 4405 IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
4399 } 4406 }
@@ -4416,24 +4423,24 @@ static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
4416 return; 4423 return;
4417 } 4424 }
4418 4425
4419 rc = iwl4965_grab_nic_access(priv); 4426 rc = iwl_grab_nic_access(priv);
4420 if (rc) { 4427 if (rc) {
4421 IWL_WARNING("Can not read from adapter at this time.\n"); 4428 IWL_WARNING("Can not read from adapter at this time.\n");
4422 return; 4429 return;
4423 } 4430 }
4424 4431
4425 /* event log header */ 4432 /* event log header */
4426 capacity = iwl4965_read_targ_mem(priv, base); 4433 capacity = iwl_read_targ_mem(priv, base);
4427 mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32))); 4434 mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
4428 num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32))); 4435 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
4429 next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32))); 4436 next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
4430 4437
4431 size = num_wraps ? capacity : next_entry; 4438 size = num_wraps ? capacity : next_entry;
4432 4439
4433 /* bail out if nothing in log */ 4440 /* bail out if nothing in log */
4434 if (size == 0) { 4441 if (size == 0) {
4435 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n"); 4442 IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
4436 iwl4965_release_nic_access(priv); 4443 iwl_release_nic_access(priv);
4437 return; 4444 return;
4438 } 4445 }
4439 4446
@@ -4449,7 +4456,7 @@ static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
4449 /* (then/else) start at top of log */ 4456 /* (then/else) start at top of log */
4450 iwl4965_print_event_log(priv, 0, next_entry, mode); 4457 iwl4965_print_event_log(priv, 0, next_entry, mode);
4451 4458
4452 iwl4965_release_nic_access(priv); 4459 iwl_release_nic_access(priv);
4453} 4460}
4454 4461
4455/** 4462/**
@@ -4521,19 +4528,19 @@ static void iwl4965_irq_tasklet(struct iwl_priv *priv)
4521 /* Ack/clear/reset pending uCode interrupts. 4528 /* Ack/clear/reset pending uCode interrupts.
4522 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, 4529 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
4523 * and will clear only when CSR_FH_INT_STATUS gets cleared. */ 4530 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
4524 inta = iwl4965_read32(priv, CSR_INT); 4531 inta = iwl_read32(priv, CSR_INT);
4525 iwl4965_write32(priv, CSR_INT, inta); 4532 iwl_write32(priv, CSR_INT, inta);
4526 4533
4527 /* Ack/clear/reset pending flow-handler (DMA) interrupts. 4534 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
4528 * Any new interrupts that happen after this, either while we're 4535 * Any new interrupts that happen after this, either while we're
4529 * in this tasklet, or later, will show up in next ISR/tasklet. */ 4536 * in this tasklet, or later, will show up in next ISR/tasklet. */
4530 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); 4537 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4531 iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh); 4538 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
4532 4539
4533#ifdef CONFIG_IWLWIFI_DEBUG 4540#ifdef CONFIG_IWLWIFI_DEBUG
4534 if (iwl_debug_level & IWL_DL_ISR) { 4541 if (iwl_debug_level & IWL_DL_ISR) {
4535 /* just for debug */ 4542 /* just for debug */
4536 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); 4543 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4537 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", 4544 IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
4538 inta, inta_mask, inta_fh); 4545 inta, inta_mask, inta_fh);
4539 } 4546 }
@@ -4582,7 +4589,7 @@ static void iwl4965_irq_tasklet(struct iwl_priv *priv)
4582 /* HW RF KILL switch toggled */ 4589 /* HW RF KILL switch toggled */
4583 if (inta & CSR_INT_BIT_RF_KILL) { 4590 if (inta & CSR_INT_BIT_RF_KILL) {
4584 int hw_rf_kill = 0; 4591 int hw_rf_kill = 0;
4585 if (!(iwl4965_read32(priv, CSR_GP_CNTRL) & 4592 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
4586 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)) 4593 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4587 hw_rf_kill = 1; 4594 hw_rf_kill = 1;
4588 4595
@@ -4657,9 +4664,9 @@ static void iwl4965_irq_tasklet(struct iwl_priv *priv)
4657 4664
4658#ifdef CONFIG_IWLWIFI_DEBUG 4665#ifdef CONFIG_IWLWIFI_DEBUG
4659 if (iwl_debug_level & (IWL_DL_ISR)) { 4666 if (iwl_debug_level & (IWL_DL_ISR)) {
4660 inta = iwl4965_read32(priv, CSR_INT); 4667 inta = iwl_read32(priv, CSR_INT);
4661 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); 4668 inta_mask = iwl_read32(priv, CSR_INT_MASK);
4662 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); 4669 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4663 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " 4670 IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
4664 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); 4671 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
4665 } 4672 }
@@ -4681,12 +4688,12 @@ static irqreturn_t iwl4965_isr(int irq, void *data)
4681 * back-to-back ISRs and sporadic interrupts from our NIC. 4688 * back-to-back ISRs and sporadic interrupts from our NIC.
4682 * If we have something to service, the tasklet will re-enable ints. 4689 * If we have something to service, the tasklet will re-enable ints.
4683 * If we *don't* have something, we'll re-enable before leaving here. */ 4690 * If we *don't* have something, we'll re-enable before leaving here. */
4684 inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */ 4691 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
4685 iwl4965_write32(priv, CSR_INT_MASK, 0x00000000); 4692 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
4686 4693
4687 /* Discover which interrupts are active/pending */ 4694 /* Discover which interrupts are active/pending */
4688 inta = iwl4965_read32(priv, CSR_INT); 4695 inta = iwl_read32(priv, CSR_INT);
4689 inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS); 4696 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
4690 4697
4691 /* Ignore interrupt if there's nothing in NIC to service. 4698 /* Ignore interrupt if there's nothing in NIC to service.
4692 * This may be due to IRQ shared with another device, 4699 * This may be due to IRQ shared with another device,
@@ -5001,8 +5008,12 @@ int iwl4965_init_geos(struct iwl_priv *priv)
5001 priv->bands[IEEE80211_BAND_2GHZ].n_channels, 5008 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
5002 priv->bands[IEEE80211_BAND_5GHZ].n_channels); 5009 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
5003 5010
5004 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ]; 5011 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
5005 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ]; 5012 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
5013 &priv->bands[IEEE80211_BAND_2GHZ];
5014 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
5015 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
5016 &priv->bands[IEEE80211_BAND_5GHZ];
5006 5017
5007 set_bit(STATUS_GEO_CONFIGURED, &priv->status); 5018 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
5008 5019
@@ -5049,18 +5060,18 @@ static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
5049 5060
5050 IWL_DEBUG_INFO("ucode inst image size is %u\n", len); 5061 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5051 5062
5052 rc = iwl4965_grab_nic_access(priv); 5063 rc = iwl_grab_nic_access(priv);
5053 if (rc) 5064 if (rc)
5054 return rc; 5065 return rc;
5055 5066
5056 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND); 5067 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
5057 5068
5058 errcnt = 0; 5069 errcnt = 0;
5059 for (; len > 0; len -= sizeof(u32), image++) { 5070 for (; len > 0; len -= sizeof(u32), image++) {
5060 /* read data comes through single port, auto-incr addr */ 5071 /* read data comes through single port, auto-incr addr */
5061 /* NOTE: Use the debugless read so we don't flood kernel log 5072 /* NOTE: Use the debugless read so we don't flood kernel log
5062 * if IWL_DL_IO is set */ 5073 * if IWL_DL_IO is set */
5063 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT); 5074 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5064 if (val != le32_to_cpu(*image)) { 5075 if (val != le32_to_cpu(*image)) {
5065 IWL_ERROR("uCode INST section is invalid at " 5076 IWL_ERROR("uCode INST section is invalid at "
5066 "offset 0x%x, is 0x%x, s/b 0x%x\n", 5077 "offset 0x%x, is 0x%x, s/b 0x%x\n",
@@ -5072,7 +5083,7 @@ static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
5072 } 5083 }
5073 } 5084 }
5074 5085
5075 iwl4965_release_nic_access(priv); 5086 iwl_release_nic_access(priv);
5076 5087
5077 if (!errcnt) 5088 if (!errcnt)
5078 IWL_DEBUG_INFO 5089 IWL_DEBUG_INFO
@@ -5096,7 +5107,7 @@ static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
5096 5107
5097 IWL_DEBUG_INFO("ucode inst image size is %u\n", len); 5108 IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
5098 5109
5099 rc = iwl4965_grab_nic_access(priv); 5110 rc = iwl_grab_nic_access(priv);
5100 if (rc) 5111 if (rc)
5101 return rc; 5112 return rc;
5102 5113
@@ -5104,9 +5115,9 @@ static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
5104 /* read data comes through single port, auto-incr addr */ 5115 /* read data comes through single port, auto-incr addr */
5105 /* NOTE: Use the debugless read so we don't flood kernel log 5116 /* NOTE: Use the debugless read so we don't flood kernel log
5106 * if IWL_DL_IO is set */ 5117 * if IWL_DL_IO is set */
5107 iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, 5118 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
5108 i + RTC_INST_LOWER_BOUND); 5119 i + RTC_INST_LOWER_BOUND);
5109 val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT); 5120 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
5110 if (val != le32_to_cpu(*image)) { 5121 if (val != le32_to_cpu(*image)) {
5111#if 0 /* Enable this if you want to see details */ 5122#if 0 /* Enable this if you want to see details */
5112 IWL_ERROR("uCode INST section is invalid at " 5123 IWL_ERROR("uCode INST section is invalid at "
@@ -5120,7 +5131,7 @@ static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32
5120 } 5131 }
5121 } 5132 }
5122 5133
5123 iwl4965_release_nic_access(priv); 5134 iwl_release_nic_access(priv);
5124 5135
5125 return rc; 5136 return rc;
5126} 5137}
@@ -5187,11 +5198,11 @@ static int iwl4965_verify_bsm(struct iwl_priv *priv)
5187 IWL_DEBUG_INFO("Begin verify bsm\n"); 5198 IWL_DEBUG_INFO("Begin verify bsm\n");
5188 5199
5189 /* verify BSM SRAM contents */ 5200 /* verify BSM SRAM contents */
5190 val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG); 5201 val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
5191 for (reg = BSM_SRAM_LOWER_BOUND; 5202 for (reg = BSM_SRAM_LOWER_BOUND;
5192 reg < BSM_SRAM_LOWER_BOUND + len; 5203 reg < BSM_SRAM_LOWER_BOUND + len;
5193 reg += sizeof(u32), image ++) { 5204 reg += sizeof(u32), image ++) {
5194 val = iwl4965_read_prph(priv, reg); 5205 val = iwl_read_prph(priv, reg);
5195 if (val != le32_to_cpu(*image)) { 5206 if (val != le32_to_cpu(*image)) {
5196 IWL_ERROR("BSM uCode verification failed at " 5207 IWL_ERROR("BSM uCode verification failed at "
5197 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", 5208 "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
@@ -5268,42 +5279,42 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
5268 inst_len = priv->ucode_init.len; 5279 inst_len = priv->ucode_init.len;
5269 data_len = priv->ucode_init_data.len; 5280 data_len = priv->ucode_init_data.len;
5270 5281
5271 rc = iwl4965_grab_nic_access(priv); 5282 rc = iwl_grab_nic_access(priv);
5272 if (rc) 5283 if (rc)
5273 return rc; 5284 return rc;
5274 5285
5275 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 5286 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5276 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 5287 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5277 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); 5288 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
5278 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); 5289 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
5279 5290
5280 /* Fill BSM memory with bootstrap instructions */ 5291 /* Fill BSM memory with bootstrap instructions */
5281 for (reg_offset = BSM_SRAM_LOWER_BOUND; 5292 for (reg_offset = BSM_SRAM_LOWER_BOUND;
5282 reg_offset < BSM_SRAM_LOWER_BOUND + len; 5293 reg_offset < BSM_SRAM_LOWER_BOUND + len;
5283 reg_offset += sizeof(u32), image++) 5294 reg_offset += sizeof(u32), image++)
5284 _iwl4965_write_prph(priv, reg_offset, 5295 _iwl_write_prph(priv, reg_offset,
5285 le32_to_cpu(*image)); 5296 le32_to_cpu(*image));
5286 5297
5287 rc = iwl4965_verify_bsm(priv); 5298 rc = iwl4965_verify_bsm(priv);
5288 if (rc) { 5299 if (rc) {
5289 iwl4965_release_nic_access(priv); 5300 iwl_release_nic_access(priv);
5290 return rc; 5301 return rc;
5291 } 5302 }
5292 5303
5293 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ 5304 /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
5294 iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); 5305 iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
5295 iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG, 5306 iwl_write_prph(priv, BSM_WR_MEM_DST_REG,
5296 RTC_INST_LOWER_BOUND); 5307 RTC_INST_LOWER_BOUND);
5297 iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); 5308 iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
5298 5309
5299 /* Load bootstrap code into instruction SRAM now, 5310 /* Load bootstrap code into instruction SRAM now,
5300 * to prepare to load "initialize" uCode */ 5311 * to prepare to load "initialize" uCode */
5301 iwl4965_write_prph(priv, BSM_WR_CTRL_REG, 5312 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5302 BSM_WR_CTRL_REG_BIT_START); 5313 BSM_WR_CTRL_REG_BIT_START);
5303 5314
5304 /* Wait for load of bootstrap uCode to finish */ 5315 /* Wait for load of bootstrap uCode to finish */
5305 for (i = 0; i < 100; i++) { 5316 for (i = 0; i < 100; i++) {
5306 done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG); 5317 done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
5307 if (!(done & BSM_WR_CTRL_REG_BIT_START)) 5318 if (!(done & BSM_WR_CTRL_REG_BIT_START))
5308 break; 5319 break;
5309 udelay(10); 5320 udelay(10);
@@ -5317,10 +5328,10 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
5317 5328
5318 /* Enable future boot loads whenever power management unit triggers it 5329 /* Enable future boot loads whenever power management unit triggers it
5319 * (e.g. when powering back up after power-save shutdown) */ 5330 * (e.g. when powering back up after power-save shutdown) */
5320 iwl4965_write_prph(priv, BSM_WR_CTRL_REG, 5331 iwl_write_prph(priv, BSM_WR_CTRL_REG,
5321 BSM_WR_CTRL_REG_BIT_START_EN); 5332 BSM_WR_CTRL_REG_BIT_START_EN);
5322 5333
5323 iwl4965_release_nic_access(priv); 5334 iwl_release_nic_access(priv);
5324 5335
5325 return 0; 5336 return 0;
5326} 5337}
@@ -5328,7 +5339,7 @@ static int iwl4965_load_bsm(struct iwl_priv *priv)
5328static void iwl4965_nic_start(struct iwl_priv *priv) 5339static void iwl4965_nic_start(struct iwl_priv *priv)
5329{ 5340{
5330 /* Remove all resets to allow NIC to operate */ 5341 /* Remove all resets to allow NIC to operate */
5331 iwl4965_write32(priv, CSR_RESET, 0); 5342 iwl_write32(priv, CSR_RESET, 0);
5332} 5343}
5333 5344
5334 5345
@@ -5550,24 +5561,24 @@ static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
5550 pdata = priv->ucode_data_backup.p_addr >> 4; 5561 pdata = priv->ucode_data_backup.p_addr >> 4;
5551 5562
5552 spin_lock_irqsave(&priv->lock, flags); 5563 spin_lock_irqsave(&priv->lock, flags);
5553 rc = iwl4965_grab_nic_access(priv); 5564 rc = iwl_grab_nic_access(priv);
5554 if (rc) { 5565 if (rc) {
5555 spin_unlock_irqrestore(&priv->lock, flags); 5566 spin_unlock_irqrestore(&priv->lock, flags);
5556 return rc; 5567 return rc;
5557 } 5568 }
5558 5569
5559 /* Tell bootstrap uCode where to find image to load */ 5570 /* Tell bootstrap uCode where to find image to load */
5560 iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); 5571 iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
5561 iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); 5572 iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
5562 iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, 5573 iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
5563 priv->ucode_data.len); 5574 priv->ucode_data.len);
5564 5575
5565 /* Inst bytecount must be last to set up, bit 31 signals uCode 5576 /* Inst bytecount must be last to set up, bit 31 signals uCode
5566 * that all new ptr/size info is in place */ 5577 * that all new ptr/size info is in place */
5567 iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, 5578 iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
5568 priv->ucode_code.len | BSM_DRAM_INST_LOAD); 5579 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
5569 5580
5570 iwl4965_release_nic_access(priv); 5581 iwl_release_nic_access(priv);
5571 5582
5572 spin_unlock_irqrestore(&priv->lock, flags); 5583 spin_unlock_irqrestore(&priv->lock, flags);
5573 5584
@@ -5708,6 +5719,8 @@ static void iwl4965_alive_start(struct iwl_priv *priv)
5708 IWL_DEBUG_INFO("ALIVE processing complete.\n"); 5719 IWL_DEBUG_INFO("ALIVE processing complete.\n");
5709 wake_up_interruptible(&priv->wait_command_queue); 5720 wake_up_interruptible(&priv->wait_command_queue);
5710 5721
5722 iwl_leds_register(priv);
5723
5711 if (priv->error_recovering) 5724 if (priv->error_recovering)
5712 iwl4965_error_recovery(priv); 5725 iwl4965_error_recovery(priv);
5713 5726
@@ -5732,6 +5745,8 @@ static void __iwl4965_down(struct iwl_priv *priv)
5732 if (!exit_pending) 5745 if (!exit_pending)
5733 set_bit(STATUS_EXIT_PENDING, &priv->status); 5746 set_bit(STATUS_EXIT_PENDING, &priv->status);
5734 5747
5748 iwl_leds_unregister(priv);
5749
5735 iwlcore_clear_stations_table(priv); 5750 iwlcore_clear_stations_table(priv);
5736 5751
5737 /* Unblock any waiting calls */ 5752 /* Unblock any waiting calls */
@@ -5743,7 +5758,7 @@ static void __iwl4965_down(struct iwl_priv *priv)
5743 clear_bit(STATUS_EXIT_PENDING, &priv->status); 5758 clear_bit(STATUS_EXIT_PENDING, &priv->status);
5744 5759
5745 /* stop and reset the on-board processor */ 5760 /* stop and reset the on-board processor */
5746 iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 5761 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
5747 5762
5748 /* tell the device to stop sending interrupts */ 5763 /* tell the device to stop sending interrupts */
5749 iwl4965_disable_interrupts(priv); 5764 iwl4965_disable_interrupts(priv);
@@ -5779,7 +5794,7 @@ static void __iwl4965_down(struct iwl_priv *priv)
5779 STATUS_FW_ERROR; 5794 STATUS_FW_ERROR;
5780 5795
5781 spin_lock_irqsave(&priv->lock, flags); 5796 spin_lock_irqsave(&priv->lock, flags);
5782 iwl4965_clear_bit(priv, CSR_GP_CNTRL, 5797 iwl_clear_bit(priv, CSR_GP_CNTRL,
5783 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); 5798 CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
5784 spin_unlock_irqrestore(&priv->lock, flags); 5799 spin_unlock_irqrestore(&priv->lock, flags);
5785 5800
@@ -5787,17 +5802,17 @@ static void __iwl4965_down(struct iwl_priv *priv)
5787 iwl4965_hw_rxq_stop(priv); 5802 iwl4965_hw_rxq_stop(priv);
5788 5803
5789 spin_lock_irqsave(&priv->lock, flags); 5804 spin_lock_irqsave(&priv->lock, flags);
5790 if (!iwl4965_grab_nic_access(priv)) { 5805 if (!iwl_grab_nic_access(priv)) {
5791 iwl4965_write_prph(priv, APMG_CLK_DIS_REG, 5806 iwl_write_prph(priv, APMG_CLK_DIS_REG,
5792 APMG_CLK_VAL_DMA_CLK_RQT); 5807 APMG_CLK_VAL_DMA_CLK_RQT);
5793 iwl4965_release_nic_access(priv); 5808 iwl_release_nic_access(priv);
5794 } 5809 }
5795 spin_unlock_irqrestore(&priv->lock, flags); 5810 spin_unlock_irqrestore(&priv->lock, flags);
5796 5811
5797 udelay(5); 5812 udelay(5);
5798 5813
5799 iwl4965_hw_nic_stop_master(priv); 5814 iwl4965_hw_nic_stop_master(priv);
5800 iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET); 5815 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
5801 iwl4965_hw_nic_reset(priv); 5816 iwl4965_hw_nic_reset(priv);
5802 5817
5803 exit: 5818 exit:
@@ -5843,7 +5858,7 @@ static int __iwl4965_up(struct iwl_priv *priv)
5843 } 5858 }
5844 5859
5845 /* If platform's RF_KILL switch is NOT set to KILL */ 5860 /* If platform's RF_KILL switch is NOT set to KILL */
5846 if (iwl4965_read32(priv, CSR_GP_CNTRL) & 5861 if (iwl_read32(priv, CSR_GP_CNTRL) &
5847 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 5862 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
5848 clear_bit(STATUS_RF_KILL_HW, &priv->status); 5863 clear_bit(STATUS_RF_KILL_HW, &priv->status);
5849 else { 5864 else {
@@ -5854,7 +5869,7 @@ static int __iwl4965_up(struct iwl_priv *priv)
5854 } 5869 }
5855 } 5870 }
5856 5871
5857 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); 5872 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5858 5873
5859 rc = iwl4965_hw_nic_init(priv); 5874 rc = iwl4965_hw_nic_init(priv);
5860 if (rc) { 5875 if (rc) {
@@ -5863,17 +5878,17 @@ static int __iwl4965_up(struct iwl_priv *priv)
5863 } 5878 }
5864 5879
5865 /* make sure rfkill handshake bits are cleared */ 5880 /* make sure rfkill handshake bits are cleared */
5866 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 5881 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5867 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, 5882 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
5868 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 5883 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
5869 5884
5870 /* clear (again), then enable host interrupts */ 5885 /* clear (again), then enable host interrupts */
5871 iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF); 5886 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
5872 iwl4965_enable_interrupts(priv); 5887 iwl4965_enable_interrupts(priv);
5873 5888
5874 /* really make sure rfkill handshake bits are cleared */ 5889 /* really make sure rfkill handshake bits are cleared */
5875 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 5890 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5876 iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 5891 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
5877 5892
5878 /* Copy original ucode data image from disk into backup cache. 5893 /* Copy original ucode data image from disk into backup cache.
5879 * This will be used to initialize the on-board processor's 5894 * This will be used to initialize the on-board processor's
@@ -8073,11 +8088,11 @@ static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
8073 * 4. Read EEPROM 8088 * 4. Read EEPROM
8074 *****************/ 8089 *****************/
8075 /* nic init */ 8090 /* nic init */
8076 iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS, 8091 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
8077 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER); 8092 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
8078 8093
8079 iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE); 8094 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
8080 err = iwl4965_poll_bit(priv, CSR_GP_CNTRL, 8095 err = iwl_poll_bit(priv, CSR_GP_CNTRL,
8081 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 8096 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
8082 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000); 8097 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
8083 if (err < 0) { 8098 if (err < 0) {
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 15:53:13 -0500