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path: root/drivers/net/wireless/iwlwifi/pcie/trans.c
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Diffstat (limited to 'drivers/net/wireless/iwlwifi/pcie/trans.c')
-rw-r--r--drivers/net/wireless/iwlwifi/pcie/trans.c22
1 files changed, 12 insertions, 10 deletions
diff --git a/drivers/net/wireless/iwlwifi/pcie/trans.c b/drivers/net/wireless/iwlwifi/pcie/trans.c
index 1393bac0025c..3781b029e54a 100644
--- a/drivers/net/wireless/iwlwifi/pcie/trans.c
+++ b/drivers/net/wireless/iwlwifi/pcie/trans.c
@@ -174,6 +174,7 @@ static void iwl_pcie_apm_config(struct iwl_trans *trans)
174{ 174{
175 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans); 175 struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
176 u16 lctl; 176 u16 lctl;
177 u16 cap;
177 178
178 /* 179 /*
179 * HW bug W/A for instability in PCIe bus L0S->L1 transition. 180 * HW bug W/A for instability in PCIe bus L0S->L1 transition.
@@ -184,16 +185,17 @@ static void iwl_pcie_apm_config(struct iwl_trans *trans)
184 * power savings, even without L1. 185 * power savings, even without L1.
185 */ 186 */
186 pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl); 187 pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_LNKCTL, &lctl);
187 if (lctl & PCI_EXP_LNKCTL_ASPM_L1) { 188 if (lctl & PCI_EXP_LNKCTL_ASPM_L1)
188 /* L1-ASPM enabled; disable(!) L0S */
189 iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); 189 iwl_set_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
190 dev_info(trans->dev, "L1 Enabled; Disabling L0S\n"); 190 else
191 } else {
192 /* L1-ASPM disabled; enable(!) L0S */
193 iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED); 191 iwl_clear_bit(trans, CSR_GIO_REG, CSR_GIO_REG_VAL_L0S_ENABLED);
194 dev_info(trans->dev, "L1 Disabled; Enabling L0S\n");
195 }
196 trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S); 192 trans->pm_support = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
193
194 pcie_capability_read_word(trans_pcie->pci_dev, PCI_EXP_DEVCTL2, &cap);
195 trans->ltr_enabled = cap & PCI_EXP_DEVCTL2_LTR_EN;
196 dev_info(trans->dev, "L1 %sabled - LTR %sabled\n",
197 (lctl & PCI_EXP_LNKCTL_ASPM_L1) ? "En" : "Dis",
198 trans->ltr_enabled ? "En" : "Dis");
197} 199}
198 200
199/* 201/*
@@ -428,7 +430,7 @@ static int iwl_pcie_apm_stop_master(struct iwl_trans *trans)
428 ret = iwl_poll_bit(trans, CSR_RESET, 430 ret = iwl_poll_bit(trans, CSR_RESET,
429 CSR_RESET_REG_FLAG_MASTER_DISABLED, 431 CSR_RESET_REG_FLAG_MASTER_DISABLED,
430 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100); 432 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
431 if (ret) 433 if (ret < 0)
432 IWL_WARN(trans, "Master Disable Timed Out, 100 usec\n"); 434 IWL_WARN(trans, "Master Disable Timed Out, 100 usec\n");
433 435
434 IWL_DEBUG_INFO(trans, "stop master\n"); 436 IWL_DEBUG_INFO(trans, "stop master\n");
@@ -544,7 +546,7 @@ static int iwl_pcie_prepare_card_hw(struct iwl_trans *trans)
544 msleep(25); 546 msleep(25);
545 } 547 }
546 548
547 IWL_DEBUG_INFO(trans, "got NIC after %d iterations\n", iter); 549 IWL_ERR(trans, "Couldn't prepare the card\n");
548 550
549 return ret; 551 return ret;
550} 552}
@@ -1043,7 +1045,7 @@ static int iwl_trans_pcie_d3_resume(struct iwl_trans *trans,
1043 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 1045 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1044 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 1046 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1045 25000); 1047 25000);
1046 if (ret) { 1048 if (ret < 0) {
1047 IWL_ERR(trans, "Failed to resume the device (mac ready)\n"); 1049 IWL_ERR(trans, "Failed to resume the device (mac ready)\n");
1048 return ret; 1050 return ret;
1049 } 1051 }