diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl4965-base.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl4965-base.c | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl4965-base.c b/drivers/net/wireless/iwlwifi/iwl4965-base.c index 60174202ca1e..e74f71fdaf92 100644 --- a/drivers/net/wireless/iwlwifi/iwl4965-base.c +++ b/drivers/net/wireless/iwlwifi/iwl4965-base.c | |||
@@ -6002,11 +6002,11 @@ static int iwl_verify_bsm(struct iwl_priv *priv) | |||
6002 | IWL_DEBUG_INFO("Begin verify bsm\n"); | 6002 | IWL_DEBUG_INFO("Begin verify bsm\n"); |
6003 | 6003 | ||
6004 | /* verify BSM SRAM contents */ | 6004 | /* verify BSM SRAM contents */ |
6005 | val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG); | 6005 | val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG); |
6006 | for (reg = BSM_SRAM_LOWER_BOUND; | 6006 | for (reg = BSM_SRAM_LOWER_BOUND; |
6007 | reg < BSM_SRAM_LOWER_BOUND + len; | 6007 | reg < BSM_SRAM_LOWER_BOUND + len; |
6008 | reg += sizeof(u32), image ++) { | 6008 | reg += sizeof(u32), image ++) { |
6009 | val = iwl_read_restricted_reg(priv, reg); | 6009 | val = iwl_read_prph(priv, reg); |
6010 | if (val != le32_to_cpu(*image)) { | 6010 | if (val != le32_to_cpu(*image)) { |
6011 | IWL_ERROR("BSM uCode verification failed at " | 6011 | IWL_ERROR("BSM uCode verification failed at " |
6012 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", | 6012 | "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n", |
@@ -6087,16 +6087,16 @@ static int iwl_load_bsm(struct iwl_priv *priv) | |||
6087 | if (rc) | 6087 | if (rc) |
6088 | return rc; | 6088 | return rc; |
6089 | 6089 | ||
6090 | iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst); | 6090 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
6091 | iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata); | 6091 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); |
6092 | iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); | 6092 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len); |
6093 | iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); | 6093 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len); |
6094 | 6094 | ||
6095 | /* Fill BSM memory with bootstrap instructions */ | 6095 | /* Fill BSM memory with bootstrap instructions */ |
6096 | for (reg_offset = BSM_SRAM_LOWER_BOUND; | 6096 | for (reg_offset = BSM_SRAM_LOWER_BOUND; |
6097 | reg_offset < BSM_SRAM_LOWER_BOUND + len; | 6097 | reg_offset < BSM_SRAM_LOWER_BOUND + len; |
6098 | reg_offset += sizeof(u32), image++) | 6098 | reg_offset += sizeof(u32), image++) |
6099 | _iwl_write_restricted_reg(priv, reg_offset, | 6099 | _iwl_write_prph(priv, reg_offset, |
6100 | le32_to_cpu(*image)); | 6100 | le32_to_cpu(*image)); |
6101 | 6101 | ||
6102 | rc = iwl_verify_bsm(priv); | 6102 | rc = iwl_verify_bsm(priv); |
@@ -6106,19 +6106,19 @@ static int iwl_load_bsm(struct iwl_priv *priv) | |||
6106 | } | 6106 | } |
6107 | 6107 | ||
6108 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ | 6108 | /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */ |
6109 | iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0); | 6109 | iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0); |
6110 | iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG, | 6110 | iwl_write_prph(priv, BSM_WR_MEM_DST_REG, |
6111 | RTC_INST_LOWER_BOUND); | 6111 | RTC_INST_LOWER_BOUND); |
6112 | iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); | 6112 | iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32)); |
6113 | 6113 | ||
6114 | /* Load bootstrap code into instruction SRAM now, | 6114 | /* Load bootstrap code into instruction SRAM now, |
6115 | * to prepare to load "initialize" uCode */ | 6115 | * to prepare to load "initialize" uCode */ |
6116 | iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG, | 6116 | iwl_write_prph(priv, BSM_WR_CTRL_REG, |
6117 | BSM_WR_CTRL_REG_BIT_START); | 6117 | BSM_WR_CTRL_REG_BIT_START); |
6118 | 6118 | ||
6119 | /* Wait for load of bootstrap uCode to finish */ | 6119 | /* Wait for load of bootstrap uCode to finish */ |
6120 | for (i = 0; i < 100; i++) { | 6120 | for (i = 0; i < 100; i++) { |
6121 | done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG); | 6121 | done = iwl_read_prph(priv, BSM_WR_CTRL_REG); |
6122 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) | 6122 | if (!(done & BSM_WR_CTRL_REG_BIT_START)) |
6123 | break; | 6123 | break; |
6124 | udelay(10); | 6124 | udelay(10); |
@@ -6132,7 +6132,7 @@ static int iwl_load_bsm(struct iwl_priv *priv) | |||
6132 | 6132 | ||
6133 | /* Enable future boot loads whenever power management unit triggers it | 6133 | /* Enable future boot loads whenever power management unit triggers it |
6134 | * (e.g. when powering back up after power-save shutdown) */ | 6134 | * (e.g. when powering back up after power-save shutdown) */ |
6135 | iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG, | 6135 | iwl_write_prph(priv, BSM_WR_CTRL_REG, |
6136 | BSM_WR_CTRL_REG_BIT_START_EN); | 6136 | BSM_WR_CTRL_REG_BIT_START_EN); |
6137 | 6137 | ||
6138 | iwl_release_restricted_access(priv); | 6138 | iwl_release_restricted_access(priv); |
@@ -6387,14 +6387,14 @@ static int iwl_set_ucode_ptrs(struct iwl_priv *priv) | |||
6387 | } | 6387 | } |
6388 | 6388 | ||
6389 | /* Tell bootstrap uCode where to find image to load */ | 6389 | /* Tell bootstrap uCode where to find image to load */ |
6390 | iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst); | 6390 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); |
6391 | iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata); | 6391 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); |
6392 | iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | 6392 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, |
6393 | priv->ucode_data.len); | 6393 | priv->ucode_data.len); |
6394 | 6394 | ||
6395 | /* Inst bytecount must be last to set up, bit 31 signals uCode | 6395 | /* Inst bytecount must be last to set up, bit 31 signals uCode |
6396 | * that all new ptr/size info is in place */ | 6396 | * that all new ptr/size info is in place */ |
6397 | iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, | 6397 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, |
6398 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); | 6398 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); |
6399 | 6399 | ||
6400 | iwl_release_restricted_access(priv); | 6400 | iwl_release_restricted_access(priv); |
@@ -6639,7 +6639,7 @@ static void __iwl_down(struct iwl_priv *priv) | |||
6639 | 6639 | ||
6640 | spin_lock_irqsave(&priv->lock, flags); | 6640 | spin_lock_irqsave(&priv->lock, flags); |
6641 | if (!iwl_grab_restricted_access(priv)) { | 6641 | if (!iwl_grab_restricted_access(priv)) { |
6642 | iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG, | 6642 | iwl_write_prph(priv, APMG_CLK_DIS_REG, |
6643 | APMG_CLK_VAL_DMA_CLK_RQT); | 6643 | APMG_CLK_VAL_DMA_CLK_RQT); |
6644 | iwl_release_restricted_access(priv); | 6644 | iwl_release_restricted_access(priv); |
6645 | } | 6645 | } |
@@ -9300,7 +9300,7 @@ static void iwl_resume(struct iwl_priv *priv) | |||
9300 | iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); | 9300 | iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ); |
9301 | 9301 | ||
9302 | if (!iwl_grab_restricted_access(priv)) { | 9302 | if (!iwl_grab_restricted_access(priv)) { |
9303 | iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG, | 9303 | iwl_write_prph(priv, APMG_CLK_DIS_REG, |
9304 | APMG_CLK_VAL_DMA_CLK_RQT); | 9304 | APMG_CLK_VAL_DMA_CLK_RQT); |
9305 | iwl_release_restricted_access(priv); | 9305 | iwl_release_restricted_access(priv); |
9306 | } | 9306 | } |