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Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-pci.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-pci.c571
1 files changed, 571 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-pci.c b/drivers/net/wireless/iwlwifi/iwl-pci.c
new file mode 100644
index 000000000000..7328fbff7f7b
--- /dev/null
+++ b/drivers/net/wireless/iwlwifi/iwl-pci.c
@@ -0,0 +1,571 @@
1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2007 - 2011 Intel Corporation. All rights reserved.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
28 * Intel Linux Wireless <ilw@linux.intel.com>
29 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
33 * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved.
34 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
51 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
52 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
53 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
54 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
55 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
63#include <linux/pci.h>
64#include <linux/pci-aspm.h>
65
66#include "iwl-pci.h"
67#include "iwl-agn.h"
68#include "iwl-core.h"
69#include "iwl-io.h"
70
71/* PCI registers */
72#define PCI_CFG_RETRY_TIMEOUT 0x041
73#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
74#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
75
76struct iwl_pci_bus {
77 /* basic pci-network driver stuff */
78 struct pci_dev *pci_dev;
79
80 /* pci hardware address support */
81 void __iomem *hw_base;
82};
83
84#define IWL_BUS_GET_PCI_BUS(_iwl_bus) \
85 ((struct iwl_pci_bus *) ((_iwl_bus)->bus_specific))
86
87#define IWL_BUS_GET_PCI_DEV(_iwl_bus) \
88 ((IWL_BUS_GET_PCI_BUS(_iwl_bus))->pci_dev)
89
90static u16 iwl_pciexp_link_ctrl(struct iwl_bus *bus)
91{
92 int pos;
93 u16 pci_lnk_ctl;
94 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
95
96 pos = pci_find_capability(pci_dev, PCI_CAP_ID_EXP);
97 pci_read_config_word(pci_dev, pos + PCI_EXP_LNKCTL, &pci_lnk_ctl);
98 return pci_lnk_ctl;
99}
100
101static bool iwl_pci_is_pm_supported(struct iwl_bus *bus)
102{
103 u16 lctl = iwl_pciexp_link_ctrl(bus);
104
105 return !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
106}
107
108static void iwl_pci_apm_config(struct iwl_bus *bus)
109{
110 /*
111 * HW bug W/A for instability in PCIe bus L0S->L1 transition.
112 * Check if BIOS (or OS) enabled L1-ASPM on this device.
113 * If so (likely), disable L0S, so device moves directly L0->L1;
114 * costs negligible amount of power savings.
115 * If not (unlikely), enable L0S, so there is at least some
116 * power savings, even without L1.
117 */
118 u16 lctl = iwl_pciexp_link_ctrl(bus);
119
120 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
121 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
122 /* L1-ASPM enabled; disable(!) L0S */
123 iwl_set_bit(bus->priv, CSR_GIO_REG,
124 CSR_GIO_REG_VAL_L0S_ENABLED);
125 IWL_DEBUG_POWER(bus->priv, "L1 Enabled; Disabling L0S\n");
126 } else {
127 /* L1-ASPM disabled; enable(!) L0S */
128 iwl_clear_bit(bus->priv, CSR_GIO_REG,
129 CSR_GIO_REG_VAL_L0S_ENABLED);
130 IWL_DEBUG_POWER(bus->priv, "L1 Disabled; Enabling L0S\n");
131 }
132}
133
134static void iwl_pci_set_drv_data(struct iwl_bus *bus, void *drv_priv)
135{
136 pci_set_drvdata(IWL_BUS_GET_PCI_DEV(bus), drv_priv);
137}
138
139static struct device *iwl_pci_get_dev(const struct iwl_bus *bus)
140{
141 return &(IWL_BUS_GET_PCI_DEV(bus)->dev);
142}
143
144static unsigned int iwl_pci_get_irq(const struct iwl_bus *bus)
145{
146 return IWL_BUS_GET_PCI_DEV(bus)->irq;
147}
148
149static void iwl_pci_get_hw_id(struct iwl_bus *bus, char buf[],
150 int buf_len)
151{
152 struct pci_dev *pci_dev = IWL_BUS_GET_PCI_DEV(bus);
153
154 snprintf(buf, buf_len, "PCI ID: 0x%04X:0x%04X", pci_dev->device,
155 pci_dev->subsystem_device);
156}
157
158static void iwl_pci_write8(struct iwl_bus *bus, u32 ofs, u8 val)
159{
160 iowrite8(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
161}
162
163static void iwl_pci_write32(struct iwl_bus *bus, u32 ofs, u32 val)
164{
165 iowrite32(val, IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
166}
167
168static u32 iwl_pci_read32(struct iwl_bus *bus, u32 ofs)
169{
170 u32 val = ioread32(IWL_BUS_GET_PCI_BUS(bus)->hw_base + ofs);
171 return val;
172}
173
174static struct iwl_bus_ops pci_ops = {
175 .get_pm_support = iwl_pci_is_pm_supported,
176 .apm_config = iwl_pci_apm_config,
177 .set_drv_data = iwl_pci_set_drv_data,
178 .get_dev = iwl_pci_get_dev,
179 .get_irq = iwl_pci_get_irq,
180 .get_hw_id = iwl_pci_get_hw_id,
181 .write8 = iwl_pci_write8,
182 .write32 = iwl_pci_write32,
183 .read32 = iwl_pci_read32,
184};
185
186#define IWL_PCI_DEVICE(dev, subdev, cfg) \
187 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
188 .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
189 .driver_data = (kernel_ulong_t)&(cfg)
190
191/* Hardware specific file defines the PCI IDs table for that hardware module */
192static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
193 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
194 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
195 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
196 {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
197 {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
198 {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
199 {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
200 {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
201 {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
202 {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
203 {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
204 {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
205 {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
206 {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
207 {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
208 {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
209 {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
210 {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
211 {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
212 {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
213 {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
214 {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
215 {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
216 {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
217
218/* 5300 Series WiFi */
219 {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
220 {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
221 {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
222 {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
223 {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
224 {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
225 {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
226 {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
227 {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
228 {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
229 {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
230 {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
231
232/* 5350 Series WiFi/WiMax */
233 {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
234 {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
235 {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
236
237/* 5150 Series Wifi/WiMax */
238 {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
239 {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
240 {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
241 {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
242 {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
243 {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
244
245 {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
246 {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
247 {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
248 {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
249
250/* 6x00 Series */
251 {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
252 {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
253 {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
254 {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
255 {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
256 {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
257 {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
258 {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
259 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
260 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
261
262/* 6x05 Series */
263 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
264 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
265 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
266 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
267 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
268 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
269 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
270
271/* 6x30 Series */
272 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
273 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
274 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
275 {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
276 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
277 {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
278 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
279 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
280 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
281 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
282 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
283 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
284 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
285 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
286 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
287 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
288
289/* 6x50 WiFi/WiMax Series */
290 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
291 {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
292 {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
293 {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
294 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
295 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
296
297/* 6150 WiFi/WiMax Series */
298 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
299 {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
300 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
301 {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
302 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
303 {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
304
305/* 1000 Series WiFi */
306 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
307 {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
308 {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
309 {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
310 {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
311 {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
312 {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
313 {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
314 {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
315 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
316 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
317 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
318
319/* 100 Series WiFi */
320 {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
321 {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
322 {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
323 {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
324 {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
325 {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
326
327/* 130 Series WiFi */
328 {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
329 {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
330 {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
331 {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
332 {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
333 {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
334
335/* 2x00 Series */
336 {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
337 {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
338 {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
339 {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
340 {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
341 {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
342
343/* 2x30 Series */
344 {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
345 {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
346 {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
347 {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
348 {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
349 {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
350
351/* 6x35 Series */
352 {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
353 {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
354 {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
355 {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
356 {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
357 {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
358 {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
359 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
360 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
361
362/* 105 Series */
363 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
364 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
365 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
366 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
367 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
368 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
369
370/* 135 Series */
371 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
372 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
373 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
374 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
375 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
376 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
377
378 {0}
379};
380MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
381
382static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
383{
384 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
385 struct iwl_pci_bus *bus;
386 u8 rev_id;
387 u16 pci_cmd;
388 int err;
389
390 bus = kzalloc(sizeof(*bus), GFP_KERNEL);
391 if (!bus) {
392 pr_err("Couldn't allocate iwl_pci_bus");
393 err = -ENOMEM;
394 goto out_no_pci;
395 }
396
397 bus->pci_dev = pdev;
398
399 /* W/A - seems to solve weird behavior. We need to remove this if we
400 * don't want to stay in L1 all the time. This wastes a lot of power */
401 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
402 PCIE_LINK_STATE_CLKPM);
403
404 if (pci_enable_device(pdev)) {
405 err = -ENODEV;
406 goto out_no_pci;
407 }
408
409 pci_set_master(pdev);
410
411 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(36));
412 if (!err)
413 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(36));
414 if (err) {
415 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
416 if (!err)
417 err = pci_set_consistent_dma_mask(pdev,
418 DMA_BIT_MASK(32));
419 /* both attempts failed: */
420 if (err) {
421 pr_err("No suitable DMA available.\n");
422 goto out_pci_disable_device;
423 }
424 }
425
426 err = pci_request_regions(pdev, DRV_NAME);
427 if (err) {
428 pr_err("pci_request_regions failed");
429 goto out_pci_disable_device;
430 }
431
432 bus->hw_base = pci_iomap(pdev, 0, 0);
433 if (!bus->hw_base) {
434 pr_err("pci_iomap failed");
435 err = -ENODEV;
436 goto out_pci_release_regions;
437 }
438
439 pr_info("pci_resource_len = 0x%08llx\n",
440 (unsigned long long) pci_resource_len(pdev, 0));
441 pr_info("pci_resource_base = %p\n", bus->hw_base);
442
443 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
444 pr_info("HW Revision ID = 0x%X\n", rev_id);
445
446 /* We disable the RETRY_TIMEOUT register (0x41) to keep
447 * PCI Tx retries from interfering with C3 CPU state */
448 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
449
450 err = pci_enable_msi(pdev);
451 if (err) {
452 pr_err("pci_enable_msi failed");
453 goto out_iounmap;
454 }
455
456 /* TODO: Move this away, not needed if not MSI */
457 /* enable rfkill interrupt: hw bug w/a */
458 pci_read_config_word(pdev, PCI_COMMAND, &pci_cmd);
459 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
460 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
461 pci_write_config_word(pdev, PCI_COMMAND, pci_cmd);
462 }
463
464 err = iwl_probe((void *) bus, &pci_ops, cfg);
465 if (err)
466 goto out_disable_msi;
467 return 0;
468
469out_disable_msi:
470 pci_disable_msi(pdev);
471out_iounmap:
472 pci_iounmap(pdev, bus->hw_base);
473out_pci_release_regions:
474 pci_set_drvdata(pdev, NULL);
475 pci_release_regions(pdev);
476out_pci_disable_device:
477 pci_disable_device(pdev);
478out_no_pci:
479 kfree(bus);
480 return err;
481}
482
483static void iwl_pci_down(void *bus)
484{
485 struct iwl_pci_bus *pci_bus = (struct iwl_pci_bus *) bus;
486
487 pci_disable_msi(pci_bus->pci_dev);
488 pci_iounmap(pci_bus->pci_dev, pci_bus->hw_base);
489 pci_release_regions(pci_bus->pci_dev);
490 pci_disable_device(pci_bus->pci_dev);
491 pci_set_drvdata(pci_bus->pci_dev, NULL);
492
493 kfree(pci_bus);
494}
495
496static void __devexit iwl_pci_remove(struct pci_dev *pdev)
497{
498 struct iwl_priv *priv = pci_get_drvdata(pdev);
499
500 /* This can happen if probe failed */
501 if (unlikely(!priv))
502 return;
503
504 iwl_remove(priv);
505
506 iwl_pci_down(IWL_BUS_GET_PCI_BUS(&priv->bus));
507}
508
509#ifdef CONFIG_PM
510
511static int iwl_pci_suspend(struct device *device)
512{
513 struct pci_dev *pdev = to_pci_dev(device);
514 struct iwl_priv *priv = pci_get_drvdata(pdev);
515
516 return iwl_suspend(priv);
517}
518
519static int iwl_pci_resume(struct device *device)
520{
521 struct pci_dev *pdev = to_pci_dev(device);
522 struct iwl_priv *priv = pci_get_drvdata(pdev);
523
524 /*
525 * We disable the RETRY_TIMEOUT register (0x41) to keep
526 * PCI Tx retries from interfering with C3 CPU state.
527 */
528 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
529
530 return iwl_resume(priv);
531}
532
533static const struct dev_pm_ops iwl_dev_pm_ops = {
534 .suspend = iwl_pci_suspend,
535 .resume = iwl_pci_resume,
536 .freeze = iwl_pci_suspend,
537 .thaw = iwl_pci_resume,
538 .poweroff = iwl_pci_suspend,
539 .restore = iwl_pci_resume,
540};
541
542#define IWL_PM_OPS (&iwl_dev_pm_ops)
543
544#else
545
546#define IWL_PM_OPS NULL
547
548#endif
549
550static struct pci_driver iwl_pci_driver = {
551 .name = DRV_NAME,
552 .id_table = iwl_hw_card_ids,
553 .probe = iwl_pci_probe,
554 .remove = __devexit_p(iwl_pci_remove),
555 .driver.pm = IWL_PM_OPS,
556};
557
558int __must_check iwl_pci_register_driver(void)
559{
560 int ret;
561 ret = pci_register_driver(&iwl_pci_driver);
562 if (ret)
563 pr_err("Unable to initialize PCI module\n");
564
565 return ret;
566}
567
568void iwl_pci_unregister_driver(void)
569{
570 pci_unregister_driver(&iwl_pci_driver);
571}
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 11:50:16 -0500