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path: root/drivers/net/wireless/iwlwifi/iwl-eeprom.h
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Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-eeprom.h')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h25
1 files changed, 21 insertions, 4 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index d9b590625ae4..e3a279d2d0b6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -120,6 +120,17 @@ struct iwl_eeprom_channel {
120 s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ 120 s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */
121} __packed; 121} __packed;
122 122
123enum iwl_eeprom_enhanced_txpwr_flags {
124 IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0),
125 IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1),
126 IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2),
127 IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3),
128 IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4),
129 IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5),
130 IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6),
131 IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7),
132};
133
123/** 134/**
124 * iwl_eeprom_enhanced_txpwr structure 135 * iwl_eeprom_enhanced_txpwr structure
125 * This structure presents the enhanced regulatory tx power limit layout 136 * This structure presents the enhanced regulatory tx power limit layout
@@ -127,21 +138,23 @@ struct iwl_eeprom_channel {
127 * Enhanced regulatory tx power portion of eeprom image can be broken down 138 * Enhanced regulatory tx power portion of eeprom image can be broken down
128 * into individual structures; each one is 8 bytes in size and contain the 139 * into individual structures; each one is 8 bytes in size and contain the
129 * following information 140 * following information
130 * @common: (desc + channel) not used by driver, should _NOT_ be "zero" 141 * @flags: entry flags
142 * @channel: channel number
131 * @chain_a_max_pwr: chain a max power in 1/2 dBm 143 * @chain_a_max_pwr: chain a max power in 1/2 dBm
132 * @chain_b_max_pwr: chain b max power in 1/2 dBm 144 * @chain_b_max_pwr: chain b max power in 1/2 dBm
133 * @chain_c_max_pwr: chain c max power in 1/2 dBm 145 * @chain_c_max_pwr: chain c max power in 1/2 dBm
134 * @reserved: not used, should be "zero" 146 * @delta_20_in_40: 20-in-40 deltas (hi/lo)
135 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm 147 * @mimo2_max_pwr: mimo2 max power in 1/2 dBm
136 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm 148 * @mimo3_max_pwr: mimo3 max power in 1/2 dBm
137 * 149 *
138 */ 150 */
139struct iwl_eeprom_enhanced_txpwr { 151struct iwl_eeprom_enhanced_txpwr {
140 __le16 common; 152 u8 flags;
153 u8 channel;
141 s8 chain_a_max; 154 s8 chain_a_max;
142 s8 chain_b_max; 155 s8 chain_b_max;
143 s8 chain_c_max; 156 s8 chain_c_max;
144 s8 reserved; 157 u8 delta_20_in_40;
145 s8 mimo2_max; 158 s8 mimo2_max;
146 s8 mimo3_max; 159 s8 mimo3_max;
147} __packed; 160} __packed;
@@ -186,6 +199,8 @@ struct iwl_eeprom_enhanced_txpwr {
186#define EEPROM_LINK_CALIBRATION (2*0x67) 199#define EEPROM_LINK_CALIBRATION (2*0x67)
187#define EEPROM_LINK_PROCESS_ADJST (2*0x68) 200#define EEPROM_LINK_PROCESS_ADJST (2*0x68)
188#define EEPROM_LINK_OTHERS (2*0x69) 201#define EEPROM_LINK_OTHERS (2*0x69)
202#define EEPROM_LINK_TXP_LIMIT (2*0x6a)
203#define EEPROM_LINK_TXP_LIMIT_SIZE (2*0x6b)
189 204
190/* agn regulatory - indirect access */ 205/* agn regulatory - indirect access */
191#define EEPROM_REG_BAND_1_CHANNELS ((0x08)\ 206#define EEPROM_REG_BAND_1_CHANNELS ((0x08)\
@@ -389,6 +404,8 @@ struct iwl_eeprom_calib_info {
389#define INDIRECT_CALIBRATION 0x00040000 404#define INDIRECT_CALIBRATION 0x00040000
390#define INDIRECT_PROCESS_ADJST 0x00050000 405#define INDIRECT_PROCESS_ADJST 0x00050000
391#define INDIRECT_OTHERS 0x00060000 406#define INDIRECT_OTHERS 0x00060000
407#define INDIRECT_TXP_LIMIT 0x00070000
408#define INDIRECT_TXP_LIMIT_SIZE 0x00080000
392#define INDIRECT_ADDRESS 0x00100000 409#define INDIRECT_ADDRESS 0x00100000
393 410
394/* General */ 411/* General */